268 lines
12 KiB
Plaintext
268 lines
12 KiB
Plaintext
MODULE FDBACK2
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TITLE 'ABEL V4.10/4.20 EXAMPLE FILE DEMONSTRATING (1) REGISTER
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FEEDBACK AND (2) COMBINATORIAL FEEDBACK and INPUT/OUTPUT
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by ALEX KINE of DATA I/O CORPORATION, 10/4/91'
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@MESSAGE
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'1. Updated the version number in the TITLE to 4.10/4.20
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2. Simplified the discussion of the High-Z test for
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combinatorial I/O pins
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AK 3/16/92'
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@IF (0)
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{PURPOSE: To demonstrate the ABEL-HDL syntax used to
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access (1) feedback from registered outputs and
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(2) feedback from combinatorial outputs and
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input from a combinatorial I/O pin.
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STRUCTURE:This example file is divided into two main
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sections:
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I. PIN-TO-PIN and DETAILED REGISTER
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FEEDBACK
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II. COMBINATORIAL FEEDBACK and BIDIRECTIONAL
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I/O
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Both sections use application-independent
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equations to demonstrate feedback syntax, within
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the architectural constraints of the P22V10
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device. Feedback syntax in this example file will
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be equally applicable to truth table and state
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diagram designs, in various device architectures.
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Before we begin, we need to explain a few
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concepts relating to feedback. First, a
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"normalized" register feedback signal is an
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internal feedback signal that has been matched to
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the signal level measured at the corresponding
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output pin. ABEL-HDL uses dot-extension .FB to access
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"normalized" internal register feedback, in
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conjunction with pin-to-pin register syntax.
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Second, the alternative to using a
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"normalized" internal register feedback signal is
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to use "Q-feedback", which has the same signal
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level as the Q-output of the register. ABEL-HDL uses
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the .Q dot-extension to access "Q-feedback", in
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conjunction with detailed register syntax. When
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using ISTYPE 'REG_D,BUFFER', the Q-output of the
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register and the corresponding pin will be at the
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same signal level. On the other hand, when using
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ISTYPE 'REG_D,INVERT', the Q-output of the
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register will be the complement of the pin.}
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FDBACK2 device 'P22V10';
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"***************************************************************************
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" I. PIN-TO-PIN and DETAILED REGISTER FEEDBACK
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"***************************************************************************
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@IF (0)
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{Let's begin by looking at the input signals to the
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registered outputs. As shown under DECLARATIONS, this
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section uses only two inputs: CLOCK and INPUT. CLOCK will
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be used to synchronously clock each register. INPUT is a
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simple combinatorial input, which will be common to each
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registered output.
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The registered-output declarations fall into two
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categories: pin-to-pin and detailed syntax. Outputs REG,
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REG_BUF and REG_INV are examples of pin-to-pin register
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declaration syntax. Output REG is declared as ISTYPE 'REG'
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and will have the same input pin to output pin behavior,
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regardless of how its output polarity mux is configured.
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Outputs REG_BUF and REG_INV are subsets of output REG, in
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that their output mux's have been explicitly configured as
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BUFFER and INVERT, respectively. As we will see, all three
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outputs will have the same pin-to-pin response to identical
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inputs.
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Outputs D_BUF and D_INV are examples of detailed
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register declaration syntax. In contrast with the three
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previous outputs, which have identical pin-to-pin behavior,
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outputs D_BUF and D_INV will respond oppositely to identical
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inputs. While this is true for their "pin-to-pin" behavior,
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we will see that their internal feedback signals are
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identical.}
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DECLARATIONS
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"Inputs
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CLOCK pin 1;
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INPUT pin 2;
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"Outputs
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REG pin 23 istype 'REG';
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REG_BUF pin 22 istype 'REG,BUFFER';
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REG_INV pin 21 istype 'REG,INVERT';
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D_BUF pin 20 istype 'REG_D,BUFFER';
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D_INV pin 19 istype 'REG_D,INVERT';
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OUTPUT0 pin 18 istype 'COM';
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"Constants
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C,X,Z,H,L = .C.,.X.,.Z.,1,0;
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@IF (0)
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{Under EQUATIONS, we see two groups of equations, with
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identical inputs; the first group of outputs corresponds to
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the pin-to-pin registers and the second group corresponds to
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the detailed registers.
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Internal feedback from each register is then used as an
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input in the equation for combinatorial output OUTPUT0.
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Please take note of the difference in feedback syntax.
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Feedback from outputs REG, REG_BUF and REG_INV is accessed
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by adding a .FB dot-extension to each signal name, while
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feedback from outputs D_BUF and D_INV is accessed by adding
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a .Q dot-extension to each signal name.}
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EQUATIONS
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[REG,REG_BUF,REG_INV] := INPUT;
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[REG,REG_BUF,REG_INV].CLK = CLOCK;
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[D_BUF,D_INV].D = INPUT;
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[D_BUF,D_INV].CLK = CLOCK;
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OUTPUT0 = REG.FB & REG_BUF.FB & REG_INV.FB
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& D_BUF.Q & D_INV.Q;
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@IF (0)
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{Next, we use test vectors to verify the behavior of our
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example. Looking at the left side of the test vector
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header, we see the CLOCK and INPUT inputs only ; ABEL does
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not directly support use of the register feedback signals as
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test vector inputs.
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Looking at the right side of the test vector header, we
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see the signal name for each output. Using the default
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simulation trace option, we will only see the signals
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measured at the output pins and not the register feedback
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signals. One way to view the Q-output of each register is
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to select the "Macrocell" trace option in the simulation
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trace option menu. This will show the signal level at the
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Q-output of each register and at the corresponding output
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pin.
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Dot-extensions are not allowed in the test vector
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header; adding a .Q or .FB dot-extension to the signal name
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in the test vector header will result in a test vector
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failure, accompanied by one of the following messages:
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'.' found, 'H' expected
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or
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'.' found, 'L' expected
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or
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'.' found, 'Z' expected
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Once again, dot-extensions are not allowed in the test
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vector header; you must use the "Macrocell" trace option to
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view the internal register feedback.
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Looking at the test vectors, we confirm that outputs of
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REG, REG_BUF and REG_INV respond identically to inputs CLOCK
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and INPUT. In addition, we see that while their "pin-to-
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pin" responses are exact opposites, feedback from signal
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D_BUF is identical to feedback from D_INV.}
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TEST_VECTORS 'Example of Pin-to-Pin and Detailed Register Feedback'
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([CLOCK,INPUT] -> [REG,REG_BUF,REG_INV,D_BUF,D_INV,OUTPUT0])
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[ 0 , 0 ] -> [ X , X , X , X , X , X ]; "Power-up
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[ C , 0 ] -> [ L , L , L , L , H , L ]; "Begin Clocking
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[ C , 1 ] -> [ H , H , H , H , L , H ]; "
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[ 0 , 1 ] -> [ H , H , H , H , L , H ]; "Stop Clocking
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[ 0 , 0 ] -> [ H , H , H , H , L , H ]; "
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[ C , 0 ] -> [ L , L , L , L , H , L ]; "Resume Clocking
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"***************************************************************************
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" II. COMBINATORIAL FEEDBACK and BIDIRECTIONAL I/O
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"***************************************************************************
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@IF (0)
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{Under DECLARATIONS, we see two new inputs: OE and
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INPUT_IO. Signal OE will be used to control the output
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buffer of the bidirectional I/O signal, while INPUT_IO is
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an example of an I/O pin being used as a dedicated input.
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We also see three new outputs: COM_OUT, COM_IO and
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OUTPUT1. Signal COM_OUT is a dedicated combinatorial
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output, while COM_IO is both a combinatorial output and an
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input, dependent upon the level of input signal OE. When OE
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is high, COM_IO is an output; when OE is low, COM_IO is
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an input. Finally, OUTPUT1 is a dedicated combinatorial
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output that will use feedback from COM_OUT and COM_IO as
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its inputs.
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Please note that all three outputs are declared as
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ISTYPE 'COM' only. This is all the information that is
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generally required to describe a combinatorial output. Like
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output REG above, the pin-to-pin behavior of outputs
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COM_OUT, COM_IO and OUTPUT1 will be the same, regardless of
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how their output polarity mux's are configured.}
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DECLARATIONS
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"Inputs
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OE pin 3; "Output Enable
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INPUT_IO pin 17; "I/O pin used as dedicated input
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"Outputs
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COM_OUT pin 16 istype 'COM'; "Will provide .PIN feedback
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COM_IO pin 15 istype 'COM'; "Will function as I/O pin
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OUTPUT1 pin 14 istype 'COM';
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@IF (0)
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{Under EQUATIONS, we see that outputs COM_OUT and COM_IO
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have different output enable equations. COM_OUT.OE is set
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to one(1) in order to permanently enable its corresponding
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output buffer; COM_IO.OE uses input OE in order to configure
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it as either an input or an output.
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In the equation for OUTPUT1, we see the two most common
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ways of accessing combinatorial feedback. In the first
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case, we add a .PIN dot-extension to access feedback from
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output COM_OUT. In the second case, we use the default
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feedback path(pin feedback) for output COM_IO. By omitting
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an output enable equation for OUTPUT1, we allow the output
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buffer to default to the permanently enabled state.}
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EQUATIONS
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COM_OUT = INPUT_IO; "COM_OUT functions as a dedicated output.
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COM_OUT.OE = 1; "Optional output enable equation;
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"Default OE value is one(1)
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COM_IO = INPUT_IO; "COM_IO functions as an output when
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COM_IO .OE = OE; "OE is high and as an input when
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"OE is low.
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OUTPUT1 = COM_OUT.PIN & COM_IO ;
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@IF (0)
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{Finally, we use test vectors to verify the behavior of
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our example. Looking at the test vector header, we see that
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signal COM_IO is listed both as an input and as an output.
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When OE is high, vector input COM_IO is a don't care(X).
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When OE is low, vector output COM_IO is either a don't care or
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high-impedance(Z).}
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TEST_VECTORS 'Example of Combinatorial Feedback and Input-Output'
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([INPUT_IO, OE ,COM_IO] -> [COM_OUT,COM_IO,OUTPUT1])
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[ 0 , 1 , X ] -> [ L , L , L ]; "Output from COM_IO
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[ 1 , 1 , X ] -> [ H , H , H ]; "
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[ 1 , 0 , X ] -> [ H , Z , X ]; "Tri-state COM_IO
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[ 1 , 0 , 0 ] -> [ H , X , L ]; "Read Input from COM_IO
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[ 1 , 0 , 1 ] -> [ H , X , H ]; "
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[ 1 , 1 , X ] -> [ H , H , H ]; "Output from COM_IO
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[ 0 , 1 , X ] -> [ L , L , L ]; "
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END FDBACK2
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