145 lines
7.1 KiB
Plaintext
145 lines
7.1 KiB
Plaintext
This file contains more detailed descriptions of the examples included with
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the OPALjr package Version 2.01. To compile the examples from command line
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is shown for each example. Options from the DOS or Windows shell can be
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easily selected based on the discussion here.
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=============================================================================
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1) 6-Bit Cascadable Shift Register
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This is the best EQN format example provided with the package and should be
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understood before examining the more complex examples or designing your own
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files. This example uses both the = (combinatorial) and := (registered)
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assignments, as well as the output enable signal.This example does not have a
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device or pin numbers declared. Therefore, at the time of compilation both a
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device and automatic pin assignment should be specified. An appropriate
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device for this design is the gal16v8.
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To create a JEDEC map, type: eqn2jed -f -d gal16v8 6_shift
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==============================================================================
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2) 8-Bit Synchronous Cascadable Counter
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This design is an eight bit up-down counter design which can be cascaded with
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similar devices. This example illustrates combinatorial and registered
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signals, mixed signal polarities, and the XOR operator. Pin assignments have
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already been provided, but can be overridden with the -f option. Note that if
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the pin assignments are overridden, the pin polarity information will be kept
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in tact.
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The device name is also specified. Specifying a device in the equation file,
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avoids having to specify it during compilation. Notice that specifying the
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device during compilation overrides the device specified in the file. You can
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specify the device by using the -d option with the command line or by
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selecting one of the devices from the dialog box.
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This example is designed for the PAL20X8. The compiler EQN2JED can be run
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without any flags: eqn2jed 8_count
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To force the design to be placed on another device, simply specify the -d
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option, which will override any device name in the source file:
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eqn2jed -f -d pal20r8 8_count
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Executing this command will cause an error declaring that the design will not
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fit in the selected device. This is due to the fact that the design utilizes
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nine outputs, and the PAL20R8 only has eight.
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==============================================================================
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3) 10-Bit Synchronous Up/Down Counter
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This design is a more complex version of the 8-bit counter. It has more
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functionality, but lacks a carry out signal due to the limits of the device.
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The designer also used the mixed polarities slightly differently than the
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designer of the 8-bit counter.Since both the device and pin list have been
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specified, this design can be compiled with: eqn2jed 10_count
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==============================================================================
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4) 16-Bit to 4-Bit Priority Encoder
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This is a straightforward design. An encoder is a circuit that has a number of
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inputs, and encodes whichever line is high into its binary representation. A
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priority encoder also handles the case where multiple signals may be high
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simultaneously; it encodes the highest one.
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The only trick in this design is the equation for Y3, the highest bit. The
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desired equation would be:
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Y3 = D15 + D14 + D13 + D12 + D11 + D10 + D9 + D8
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but this would take eight product terms if programmed in that manner, so
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DeMorganís Law was applied to the equation so that it would fit into smaller
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devices. A similar decision was made with the ANY signal.
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This design is compiled by: eqn2jed 16_4_pri
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==============================================================================
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5) 16-Bit to 1-Bit Multiplexer
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This is the simplest design example included, implementing a 16-bit to 1-bit
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multiplexer via combinatorial logic.
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To compile this design, type: eqn2jed 16_1_mux
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==============================================================================
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6) Hexadecimal Decoder for a 7-Segment Display
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No set of examples is complete without this design for a 7-segment LED driver
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for hexadecimal inputs. This is a combinatorial design, utilizing mixed
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polarities and output enable equations.
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To run this example, type: eqn2jed hex_7seg
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=============================================================================
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7) 3-Bit Counter With 7-Segment Display Output
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This design is a three bit up-down counter which has a set of outputs for a
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7-segment LED. This example illustrates additional complexity, combinatorial
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and registered signals, and the use of @define for common subexpressions. By
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specifying a specific device in the equation file, we also avoid having to
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type -d device_name for every compilation.
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This example is designed for the GAL22V10. The compiler EQN2JED should be run
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with the -f flag to assign the pins, since the pins were left unassigned:
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eqn2jed -f 3_7seg
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To force the design to be placed on another device, simply specify the -d
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option, which will override any device name in the source file: eqn2jed -f -d
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pal20r8 3_7seg
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Executing this command will cause an error declaring that the design will not
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fit in the selected device. This is due to the fact that the design utilizes
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ten outputs, and the PAL20R8 only has eight.
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==============================================================================
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8) 15-Bit Up-Down Counter
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This design is a 15-bit up-down counter design which uses four state bits for
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a state-machine-like design. It shows the use of JK type registers and the
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@ues directive. Since it is such a large design, the MAPL128 device, which is
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an ideal part for large state machines, was selected. Note that the pins have
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been assigned within the file, and that both the state bits and the page bits
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have been assigned to buried registers. The advantage of buried registers is
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that external pins are not wasted for unneeded signals.This example was
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compiled into the EQN file format from an original design using a state
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machine in the OPAL file format.
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Since this design has been specifically written for the MAPL128, neither a
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device nor automatic pin assignment need to be specified on the command line.
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In general, if you are using a PLCC packaged device, it may be useful to
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specify the -j option to get a PLCC instead of a DIP diagram. For devices such
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as the MAPL128, which are available only in the PLCC package, the default is
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to use the PLCC diagram.
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eqn2jed 15_count
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After this command has been executed, examine the log file, which will be
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named 15_COUNT.LOG in the same directory. From the information presented in
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the log file, one can see that the design utilized the deviceís external pins
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reasonably well, using seven out a possible twenty-six. However, the file also
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shows that the internal product terms were not utilized nearly as well, making
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use of only twenty-five percent of the available terms. A designer will often
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try to fit the final design to many devices, and choose the cheapest or
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fastest of those available.
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==============================================================================
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