102 lines
3.9 KiB
Plaintext
102 lines
3.9 KiB
Plaintext
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OPL2PLA - OPAL design entry compiler V016
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Copyright (c) National Semiconductor Corporation 1991,1992
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Input Pins
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==========
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Pin name pin number arch visible default
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-------- ---------- ---- ------- -------
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a15 2 com visible
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a14 3 com visible
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a13 4 com visible
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Output Pins
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===========
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Pin name pin number arch visible default
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-------- ---------- ---- ------- -------
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/o0 12 com visible rst
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/o1 13 com visible rst
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/o2 14 com visible rst
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/o3 15 com visible rst
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/o4 16 com visible rst
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/o5 17 com visible rst
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/o6 18 com visible rst
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/o7 19 com visible rst
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set notations
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=============
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DECODE_IN = [a15,a14,a13]
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V059)
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Copyright (c) National Semiconductor Corporation 1990,1991
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Document file for decode3.eqn
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Device: 16L8
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Pin Label Type
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--- ----- ----
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2 a15 pos,com input
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3 a14 pos,com input
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4 a13 pos,com input
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12 /o0 neg,com output
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13 /o1 neg,com output
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14 /o2 neg,com output
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15 /o3 neg,com output
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16 /o4 neg,com output
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17 /o5 neg,com output
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18 /o6 neg,com output
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19 /o7 neg,com output
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V059)
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Copyright (c) National Semiconductor Corporation 1990,1991
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Device Utilization:
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No of dedicated inputs used : 3/10 (30.0%)
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No of dedicated outputs used : 2/2 (100.0%)
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No of feedbacks used as dedicated outputs : 6/6 (100.0%)
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------------------------------------------
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Pin Label Terms Usage
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------------------------------------------
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19 o7.oe 1/1 (100.0%)
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19 o7 6/7 (85.7%)
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18 o6.oe 1/1 (100.0%)
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18 o6 6/7 (85.7%)
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17 o5.oe 1/1 (100.0%)
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17 o5 6/7 (85.7%)
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16 o4.oe 1/1 (100.0%)
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16 o4 6/7 (85.7%)
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15 o3.oe 1/1 (100.0%)
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15 o3 6/7 (85.7%)
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14 o2.oe 1/1 (100.0%)
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14 o2 6/7 (85.7%)
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13 o1.oe 1/1 (100.0%)
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13 o1 6/7 (85.7%)
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12 o0.oe 1/1 (100.0%)
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12 o0 6/7 (85.7%)
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------------------------------------------
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Total Terms 64/64 (100.0%)
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------------------------------------------
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V059)
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Copyright (c) National Semiconductor Corporation 1990,1991
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Chip diagram (DIP)
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._____ _____.
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| \__/ |
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| 1 20 | VCC
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a15 | 2 19 | /o7
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a14 | 3 18 | /o6
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a13 | 4 17 | /o5
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| 5 16 | /o4
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| 6 15 | /o3
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| 7 14 | /o2
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| 8 13 | /o1
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| 9 12 | /o0
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GND | 10 11 |
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|______________|
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