*******************************************************************************
;       MAIN.ASM
;*******************************************************************************
; Copyright (c) 2002 SofTec Microsystems
; http://www.softecmicro.com/
;*******************************************************************************
;
; ADC Sample for SofTec Microsystems' IDB-HC08JK Demo Board (MC68HC908JK3 installed)
;
; This program configures the A/D peripheral to convert on A/D channel 9
; (PTD2, connected to the potentiometer) and displays the results on the LEDs
; on PTB[7..4], PTD[7..4]. Make sure that all of the "LED ENABLE" jumpers and the
; "POTENTIOMETER ENABLE" jumper are inserted.
;*******************************************************************************


            XDEF Entry, irq_isr, main, _Startup
;*******************************************************************************
; Registers definition
;*******************************************************************************
PTB     EQU $0001       ; Port B data register
PTD     EQU $0003       ; Port D data register
DDRB    EQU $0005       ; Port B data direction register
DDRD    EQU $0007       ; Port D data direction register
CONFIG1 EQU $001F       ; Configuration register 1
ADSCR   EQU $003C       ; ADC status and control register
ADR     EQU $003D       ; ADC data register
ADICLK  EQU $003E       ; ADC input clock register
          
;*******************************************************************************
DEFAULT_ROM             SECTION

;*******************************************************************************
; Peripheral Initialization
;*******************************************************************************
_Startup:
init:

        bset 0, CONFIG1                 ; Disables COP

        mov #$F0, DDRB                  ; Configures port B[7..4] as output             
        mov #$F0, DDRD                  ; Configures port D[7..4] as output             
        mov #$29, ADSCR                 ; Enables ADC channel 9 
        mov #$40, ADICLK                ; ADC input clock / 4 



;*******************************************************************************
; Entry Point
;*******************************************************************************
Entry:
main:

        rsp                             ; SP <- 0xFF
        cli                             ; Enables global interrupts 
        ;bsr init                        ; Peripheral initialization

main_loop:

        brclr 7, ADSCR ,main_loop       ; Waits for ADC end of conversion
        lda ADR                         ; Reads ADC value
        sta PTD                         ; Writes the high nibble on port D[7..4]
        nsa
        sta PTB                         ; Writes the low nibble on port B[7..4]
        
        bra main_loop                   ; Forever


;*******************************************************************************
; IRQ Interrupt Handler
; ---------------------
; This subroutine is needed to implement the "Halt" debugging command.
;*******************************************************************************

irq_isr:

        bil irq_isr                     ; Waits for the IRQ signal to go high
        swi                             ; Jumps to monitor code
        rti

            END