This commit is contained in:
@@ -23,86 +23,106 @@ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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#include "SoftwareSerial.h"
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#include <Arduino.h>
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#ifdef ESP32
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#define xt_rsil(a) (a)
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#define xt_wsr_ps(a)
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using namespace EspSoftwareSerial;
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#ifndef ESP32
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uint32_t UARTBase::m_savedPS = 0;
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#else
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portMUX_TYPE UARTBase::m_interruptsMux = portMUX_INITIALIZER_UNLOCKED;
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#endif
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ALWAYS_INLINE_ATTR inline void IRAM_ATTR UARTBase::disableInterrupts()
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{
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#ifndef ESP32
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m_savedPS = xt_rsil(15);
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#else
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taskENTER_CRITICAL(&m_interruptsMux);
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#endif
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}
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ALWAYS_INLINE_ATTR inline void IRAM_ATTR UARTBase::restoreInterrupts()
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{
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#ifndef ESP32
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xt_wsr_ps(m_savedPS);
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#else
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taskEXIT_CRITICAL(&m_interruptsMux);
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#endif
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}
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constexpr uint8_t BYTE_ALL_BITS_SET = ~static_cast<uint8_t>(0);
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SoftwareSerial::SoftwareSerial() {
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m_isrOverflow = false;
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UARTBase::UARTBase() {
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}
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SoftwareSerial::SoftwareSerial(int8_t rxPin, int8_t txPin, bool invert)
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UARTBase::UARTBase(int8_t rxPin, int8_t txPin, bool invert)
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{
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m_isrOverflow = false;
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m_rxPin = rxPin;
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m_txPin = txPin;
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m_invert = invert;
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}
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SoftwareSerial::~SoftwareSerial() {
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UARTBase::~UARTBase() {
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end();
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}
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bool SoftwareSerial::isValidGPIOpin(int8_t pin) {
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#if defined(ESP8266)
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return (pin >= 0 && pin <= 16) && !isFlashInterfacePin(pin);
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#elif defined(ESP32)
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return (pin >= 0 && pin <= 5) || (pin >= 12 && pin <= 19) ||
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(pin >= 21 && pin <= 23) || (pin >= 25 && pin <= 27) || (pin >= 32 && pin <= 35);
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#else
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return true;
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#endif
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void UARTBase::setRxGPIOPinMode() {
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if (m_rxValid) {
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pinMode(m_rxPin, m_rxGPIOHasPullUp && m_rxGPIOPullUpEnabled ? INPUT_PULLUP : INPUT);
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}
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}
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bool SoftwareSerial::isValidRxGPIOpin(int8_t pin) {
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return isValidGPIOpin(pin)
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#if defined(ESP8266)
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&& (pin != 16)
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#endif
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;
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void UARTBase::setTxGPIOPinMode() {
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if (m_txValid) {
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pinMode(m_txPin, m_txGPIOOpenDrain ? OUTPUT_OPEN_DRAIN : OUTPUT);
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}
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}
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void SoftwareSerial::begin(uint32_t baud, SoftwareSerialConfig config,
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void UARTBase::begin(uint32_t baud, Config config,
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int8_t rxPin, int8_t txPin,
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bool invert, int bufCapacity, int isrBufCapacity) {
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bool invert) {
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if (-1 != rxPin) m_rxPin = rxPin;
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if (-1 != txPin) m_txPin = txPin;
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m_oneWire = (m_rxPin == m_txPin);
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m_invert = invert;
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m_dataBits = 5 + (config & 07);
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m_parityMode = static_cast<SoftwareSerialParity>(config & 070);
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m_parityMode = static_cast<Parity>(config & 070);
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m_stopBits = 1 + ((config & 0300) ? 1 : 0);
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m_pduBits = m_dataBits + static_cast<bool>(m_parityMode) + m_stopBits;
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m_bitCycles = (ESP.getCpuFreqMHz() * 1000000UL + baud / 2) / baud;
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m_bitTicks = (microsToTicks(1000000UL) + baud / 2) / baud;
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m_intTxEnabled = true;
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if (isValidRxGPIOpin(m_rxPin)) {
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m_buffer.reset(new circular_queue<uint8_t>((bufCapacity > 0) ? bufCapacity : 64));
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if (m_parityMode)
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{
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m_parityBuffer.reset(new circular_queue<uint8_t>((m_buffer->capacity() + 7) / 8));
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m_parityInPos = m_parityOutPos = 1;
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}
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m_isrBuffer.reset(new circular_queue<uint32_t>((isrBufCapacity > 0) ?
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isrBufCapacity : m_buffer->capacity() * (2 + m_dataBits + static_cast<bool>(m_parityMode))));
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if (m_buffer && (!m_parityMode || m_parityBuffer) && m_isrBuffer) {
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m_rxValid = true;
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pinMode(m_rxPin, INPUT_PULLUP);
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}
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}
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if (isValidGPIOpin(m_txPin)) {
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m_txValid = true;
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if (!m_oneWire) {
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pinMode(m_txPin, OUTPUT);
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digitalWrite(m_txPin, !m_invert);
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}
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}
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if (!m_rxEnabled) { enableRx(true); }
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}
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void SoftwareSerial::end()
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void UARTBase::beginRx(bool hasPullUp, int bufCapacity, int isrBufCapacity) {
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m_rxGPIOHasPullUp = hasPullUp;
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m_rxReg = portInputRegister(digitalPinToPort(m_rxPin));
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m_rxBitMask = digitalPinToBitMask(m_rxPin);
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m_buffer.reset(new circular_queue<uint8_t>((bufCapacity > 0) ? bufCapacity : 64));
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if (m_parityMode)
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{
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m_parityBuffer.reset(new circular_queue<uint8_t>((m_buffer->capacity() + 7) / 8));
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m_parityInPos = m_parityOutPos = 1;
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}
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m_isrBuffer.reset(new circular_queue<uint32_t, UARTBase*>((isrBufCapacity > 0) ?
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isrBufCapacity : m_buffer->capacity() * (2 + m_dataBits + static_cast<bool>(m_parityMode))));
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if (m_buffer && (!m_parityMode || m_parityBuffer) && m_isrBuffer) {
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m_rxValid = true;
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setRxGPIOPinMode();
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}
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}
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void UARTBase::beginTx() {
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#if !defined(ESP8266)
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m_txReg = portOutputRegister(digitalPinToPort(m_txPin));
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#endif
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m_txBitMask = digitalPinToBitMask(m_txPin);
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m_txValid = true;
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if (!m_oneWire) {
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setTxGPIOPinMode();
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digitalWrite(m_txPin, !m_invert);
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}
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}
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void UARTBase::end()
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{
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enableRx(false);
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m_txValid = false;
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@@ -115,12 +135,12 @@ void SoftwareSerial::end()
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}
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}
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uint32_t SoftwareSerial::baudRate() {
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return ESP.getCpuFreqMHz() * 1000000UL / m_bitCycles;
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uint32_t UARTBase::baudRate() {
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return 1000000UL / ticksToMicros(m_bitTicks);
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}
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void SoftwareSerial::setTransmitEnablePin(int8_t txEnablePin) {
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if (isValidGPIOpin(txEnablePin)) {
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void UARTBase::setTransmitEnablePin(int8_t txEnablePin) {
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if (-1 != txEnablePin) {
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m_txEnableValid = true;
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m_txEnablePin = txEnablePin;
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pinMode(m_txEnablePin, OUTPUT);
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@@ -131,31 +151,41 @@ void SoftwareSerial::setTransmitEnablePin(int8_t txEnablePin) {
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}
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}
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void SoftwareSerial::enableIntTx(bool on) {
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void UARTBase::enableIntTx(bool on) {
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m_intTxEnabled = on;
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}
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void SoftwareSerial::enableTx(bool on) {
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void UARTBase::enableRxGPIOPullUp(bool on) {
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m_rxGPIOPullUpEnabled = on;
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setRxGPIOPinMode();
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}
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void UARTBase::enableTxGPIOOpenDrain(bool on) {
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m_txGPIOOpenDrain = on;
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setTxGPIOPinMode();
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}
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void UARTBase::enableTx(bool on) {
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if (m_txValid && m_oneWire) {
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if (on) {
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enableRx(false);
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pinMode(m_txPin, OUTPUT);
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setTxGPIOPinMode();
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digitalWrite(m_txPin, !m_invert);
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}
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else {
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pinMode(m_rxPin, INPUT_PULLUP);
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setRxGPIOPinMode();
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enableRx(true);
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}
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}
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}
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void SoftwareSerial::enableRx(bool on) {
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if (m_rxValid) {
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void UARTBase::enableRx(bool on) {
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if (m_rxValid && on != m_rxEnabled) {
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if (on) {
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m_rxCurBit = m_pduBits - 1;
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// Init to stop bit level and current cycle
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m_isrLastCycle = (ESP.getCycleCount() | 1) ^ m_invert;
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if (m_bitCycles >= (ESP.getCpuFreqMHz() * 1000000UL) / 74880UL)
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m_rxLastBit = m_pduBits - 1;
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// Init to stop bit level and current tick
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m_isrLastTick = (microsToTicks(micros()) | 1) ^ m_invert;
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if (m_bitTicks >= microsToTicks(1000000UL / 74880UL))
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attachInterruptArg(digitalPinToInterrupt(m_rxPin), reinterpret_cast<void (*)(void*)>(rxBitISR), this, CHANGE);
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else
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attachInterruptArg(digitalPinToInterrupt(m_rxPin), reinterpret_cast<void (*)(void*)>(rxBitSyncISR), this, m_invert ? RISING : FALLING);
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@@ -167,7 +197,7 @@ void SoftwareSerial::enableRx(bool on) {
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}
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}
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int SoftwareSerial::read() {
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int UARTBase::read() {
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if (!m_rxValid) { return -1; }
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if (!m_buffer->available()) {
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rxBits();
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@@ -187,9 +217,9 @@ int SoftwareSerial::read() {
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return val;
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}
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size_t SoftwareSerial::read(uint8_t* buffer, size_t size) {
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int UARTBase::read(uint8_t* buffer, size_t size) {
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if (!m_rxValid) { return 0; }
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size_t avail;
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int avail;
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if (0 == (avail = m_buffer->pop_n(buffer, size))) {
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rxBits();
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avail = m_buffer->pop_n(buffer, size);
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@@ -204,7 +234,7 @@ size_t SoftwareSerial::read(uint8_t* buffer, size_t size) {
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return avail;
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}
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size_t SoftwareSerial::readBytes(uint8_t* buffer, size_t size) {
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size_t UARTBase::readBytes(uint8_t* buffer, size_t size) {
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if (!m_rxValid || !size) { return 0; }
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size_t count = 0;
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auto start = millis();
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@@ -212,13 +242,17 @@ size_t SoftwareSerial::readBytes(uint8_t* buffer, size_t size) {
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auto readCnt = read(&buffer[count], size - count);
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count += readCnt;
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if (count >= size) break;
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if (readCnt) start = millis();
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else optimistic_yield(1000UL);
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if (readCnt) {
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start = millis();
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}
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else {
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optimistic_yield(1000UL);
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}
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} while (millis() - start < _timeout);
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return count;
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}
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int SoftwareSerial::available() {
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int UARTBase::available() {
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if (!m_rxValid) { return 0; }
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rxBits();
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int avail = m_buffer->available();
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@@ -228,66 +262,90 @@ int SoftwareSerial::available() {
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return avail;
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}
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void ICACHE_RAM_ATTR SoftwareSerial::preciseDelay(bool sync) {
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if (!sync)
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void UARTBase::lazyDelay() {
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// Reenable interrupts while delaying to avoid other tasks piling up
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if (!m_intTxEnabled) { restoreInterrupts(); }
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const auto expired = microsToTicks(micros()) - m_periodStart;
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const int32_t remaining = m_periodDuration - expired;
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const uint32_t ms = remaining > 0 ? ticksToMicros(remaining) / 1000UL : 0;
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if (ms > 0)
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{
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// Reenable interrupts while delaying to avoid other tasks piling up
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if (!m_intTxEnabled) { xt_wsr_ps(m_savedPS); }
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const auto expired = ESP.getCycleCount() - m_periodStart;
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const auto ms = (m_periodDuration - expired) / ESP.getCpuFreqMHz() / 1000UL;
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if (ms)
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{
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delay(ms);
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}
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else
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{
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do
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{
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optimistic_yield(10000UL);
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}
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while ((ESP.getCycleCount() - m_periodStart) < m_periodDuration);
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}
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// Disable interrupts again
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if (!m_intTxEnabled) { m_savedPS = xt_rsil(15); }
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delay(ms);
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}
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else
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{
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while ((ESP.getCycleCount() - m_periodStart) < m_periodDuration) {}
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optimistic_yield(10000UL);
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}
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m_periodDuration = 0;
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m_periodStart = ESP.getCycleCount();
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// Assure that below-ms part of delays are not elided
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preciseDelay();
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// Disable interrupts again if applicable
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if (!m_intTxEnabled) { disableInterrupts(); }
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}
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void ICACHE_RAM_ATTR SoftwareSerial::writePeriod(
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void IRAM_ATTR UARTBase::preciseDelay() {
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uint32_t ticks;
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do {
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ticks = microsToTicks(micros());
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} while ((ticks - m_periodStart) < m_periodDuration);
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m_periodDuration = 0;
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m_periodStart = ticks;
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}
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void IRAM_ATTR UARTBase::writePeriod(
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uint32_t dutyCycle, uint32_t offCycle, bool withStopBit) {
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preciseDelay(true);
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preciseDelay();
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if (dutyCycle)
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{
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digitalWrite(m_txPin, HIGH);
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#if defined(ESP8266)
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if (16 == m_txPin) {
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GP16O = 1;
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}
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else {
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GPOS = m_txBitMask;
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}
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#else
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*m_txReg = *m_txReg | m_txBitMask;
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#endif
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m_periodDuration += dutyCycle;
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if (offCycle || (withStopBit && !m_invert)) preciseDelay(!withStopBit || m_invert);
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if (offCycle || (withStopBit && !m_invert)) {
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if (!withStopBit || m_invert) {
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preciseDelay();
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}
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else {
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lazyDelay();
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}
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}
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}
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if (offCycle)
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{
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digitalWrite(m_txPin, LOW);
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#if defined(ESP8266)
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if (16 == m_txPin) {
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GP16O = 0;
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}
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else {
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GPOC = m_txBitMask;
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}
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#else
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*m_txReg = *m_txReg & ~m_txBitMask;
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#endif
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m_periodDuration += offCycle;
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if (withStopBit && m_invert) preciseDelay(false);
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if (withStopBit && m_invert) lazyDelay();
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}
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}
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size_t SoftwareSerial::write(uint8_t byte) {
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size_t UARTBase::write(uint8_t byte) {
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return write(&byte, 1);
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}
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size_t SoftwareSerial::write(uint8_t byte, SoftwareSerialParity parity) {
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size_t UARTBase::write(uint8_t byte, Parity parity) {
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return write(&byte, 1, parity);
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}
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size_t SoftwareSerial::write(const uint8_t* buffer, size_t size) {
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size_t UARTBase::write(const uint8_t* buffer, size_t size) {
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return write(buffer, size, m_parityMode);
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}
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size_t ICACHE_RAM_ATTR SoftwareSerial::write(const uint8_t* buffer, size_t size, SoftwareSerialParity parity) {
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size_t IRAM_ATTR UARTBase::write(const uint8_t* buffer, size_t size, Parity parity) {
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if (m_rxValid) { rxBits(); }
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if (!m_txValid) { return -1; }
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@@ -300,12 +358,12 @@ size_t ICACHE_RAM_ATTR SoftwareSerial::write(const uint8_t* buffer, size_t size,
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uint32_t offCycle = 0;
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if (!m_intTxEnabled) {
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// Disable interrupts in order to get a clean transmit timing
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m_savedPS = xt_rsil(15);
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disableInterrupts();
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}
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const uint32_t dataMask = ((1UL << m_dataBits) - 1);
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bool withStopBit = true;
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m_periodDuration = 0;
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m_periodStart = ESP.getCycleCount();
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m_periodStart = microsToTicks(micros());
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for (size_t cnt = 0; cnt < size; ++cnt) {
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uint8_t byte = pgm_read_byte(buffer + cnt) & dataMask;
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// push LSB start-data-parity-stop bit pattern into uint32_t
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@@ -317,24 +375,24 @@ size_t ICACHE_RAM_ATTR SoftwareSerial::write(const uint8_t* buffer, size_t size,
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uint32_t parityBit;
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switch (parity)
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{
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case SWSERIAL_PARITY_EVEN:
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case PARITY_EVEN:
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// from inverted, so use odd parity
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parityBit = byte;
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parityBit ^= parityBit >> 4;
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parityBit &= 0xf;
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parityBit = (0x9669 >> parityBit) & 1;
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break;
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case SWSERIAL_PARITY_ODD:
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case PARITY_ODD:
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// from inverted, so use even parity
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parityBit = byte;
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parityBit ^= parityBit >> 4;
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parityBit &= 0xf;
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parityBit = (0x6996 >> parityBit) & 1;
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break;
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case SWSERIAL_PARITY_MARK:
|
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case PARITY_MARK:
|
||||
parityBit = 0;
|
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break;
|
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case SWSERIAL_PARITY_SPACE:
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case PARITY_SPACE:
|
||||
// suppresses warning parityBit uninitialized
|
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default:
|
||||
parityBit = 1;
|
||||
@@ -356,18 +414,18 @@ size_t ICACHE_RAM_ATTR SoftwareSerial::write(const uint8_t* buffer, size_t size,
|
||||
dutyCycle = offCycle = 0;
|
||||
}
|
||||
if (b) {
|
||||
dutyCycle += m_bitCycles;
|
||||
dutyCycle += m_bitTicks;
|
||||
}
|
||||
else {
|
||||
offCycle += m_bitCycles;
|
||||
offCycle += m_bitTicks;
|
||||
}
|
||||
}
|
||||
withStopBit = true;
|
||||
}
|
||||
writePeriod(dutyCycle, offCycle, true);
|
||||
if (!m_intTxEnabled) {
|
||||
// restore the interrupt state
|
||||
xt_wsr_ps(m_savedPS);
|
||||
// restore the interrupt state if applicable
|
||||
restoreInterrupts();
|
||||
}
|
||||
if (m_txEnableValid) {
|
||||
digitalWrite(m_txEnablePin, LOW);
|
||||
@@ -375,7 +433,7 @@ size_t ICACHE_RAM_ATTR SoftwareSerial::write(const uint8_t* buffer, size_t size,
|
||||
return size;
|
||||
}
|
||||
|
||||
void SoftwareSerial::flush() {
|
||||
void UARTBase::flush() {
|
||||
if (!m_rxValid) { return; }
|
||||
m_buffer->flush();
|
||||
if (m_parityBuffer)
|
||||
@@ -385,13 +443,13 @@ void SoftwareSerial::flush() {
|
||||
}
|
||||
}
|
||||
|
||||
bool SoftwareSerial::overflow() {
|
||||
bool UARTBase::overflow() {
|
||||
bool res = m_overflow;
|
||||
m_overflow = false;
|
||||
return res;
|
||||
}
|
||||
|
||||
int SoftwareSerial::peek() {
|
||||
int UARTBase::peek() {
|
||||
if (!m_rxValid) { return -1; }
|
||||
if (!m_buffer->available()) {
|
||||
rxBits();
|
||||
@@ -402,8 +460,7 @@ int SoftwareSerial::peek() {
|
||||
return val;
|
||||
}
|
||||
|
||||
void SoftwareSerial::rxBits() {
|
||||
int isrAvail = m_isrBuffer->available();
|
||||
void UARTBase::rxBits() {
|
||||
#ifdef ESP8266
|
||||
if (m_isrOverflow.load()) {
|
||||
m_overflow = true;
|
||||
@@ -415,139 +472,150 @@ void SoftwareSerial::rxBits() {
|
||||
}
|
||||
#endif
|
||||
|
||||
// stop bit can go undetected if leading data bits are at same level
|
||||
// and there was also no next start bit yet, so one byte may be pending.
|
||||
// low-cost check first
|
||||
if (!isrAvail && m_rxCurBit >= -1 && m_rxCurBit < m_pduBits - m_stopBits) {
|
||||
uint32_t detectionCycles = (m_pduBits - m_stopBits - m_rxCurBit) * m_bitCycles;
|
||||
if (ESP.getCycleCount() - m_isrLastCycle > detectionCycles) {
|
||||
m_isrBuffer->for_each(m_isrBufferForEachDel);
|
||||
|
||||
// A stop bit can go undetected if leading data bits are at same level
|
||||
// and there was also no next start bit yet, so one word may be pending.
|
||||
// Check that there was no new ISR data received in the meantime, inserting an
|
||||
// extraneous stop level bit out of sequence breaks rx.
|
||||
if (m_rxLastBit < m_pduBits - 1) {
|
||||
const uint32_t detectionTicks = (m_pduBits - 1 - m_rxLastBit) * m_bitTicks;
|
||||
if (!m_isrBuffer->available() && microsToTicks(micros()) - m_isrLastTick > detectionTicks) {
|
||||
// Produce faux stop bit level, prevents start bit maldetection
|
||||
// cycle's LSB is repurposed for the level bit
|
||||
rxBits(((m_isrLastCycle + detectionCycles) | 1) ^ m_invert);
|
||||
// tick's LSB is repurposed for the level bit
|
||||
rxBits(((m_isrLastTick + detectionTicks) | 1) ^ m_invert);
|
||||
}
|
||||
}
|
||||
|
||||
m_isrBuffer->for_each([this](const uint32_t& isrCycle) { rxBits(isrCycle); });
|
||||
}
|
||||
|
||||
void SoftwareSerial::rxBits(const uint32_t& isrCycle) {
|
||||
bool level = (m_isrLastCycle & 1) ^ m_invert;
|
||||
void UARTBase::rxBits(const uint32_t isrTick) {
|
||||
const bool level = (m_isrLastTick & 1) ^ m_invert;
|
||||
|
||||
// error introduced by edge value in LSB of isrCycle is negligible
|
||||
int32_t cycles = isrCycle - m_isrLastCycle;
|
||||
m_isrLastCycle = isrCycle;
|
||||
// error introduced by edge value in LSB of isrTick is negligible
|
||||
uint32_t ticks = isrTick - m_isrLastTick;
|
||||
m_isrLastTick = isrTick;
|
||||
|
||||
uint8_t bits = cycles / m_bitCycles;
|
||||
if (cycles % m_bitCycles > (m_bitCycles >> 1)) ++bits;
|
||||
uint32_t bits = ticks / m_bitTicks;
|
||||
if (ticks % m_bitTicks > (m_bitTicks >> 1)) ++bits;
|
||||
while (bits > 0) {
|
||||
// start bit detection
|
||||
if (m_rxCurBit >= (m_pduBits - 1)) {
|
||||
// leading edge of start bit
|
||||
if (m_rxLastBit >= (m_pduBits - 1)) {
|
||||
// leading edge of start bit?
|
||||
if (level) break;
|
||||
m_rxCurBit = -1;
|
||||
m_rxLastBit = -1;
|
||||
--bits;
|
||||
continue;
|
||||
}
|
||||
// data bits
|
||||
if (m_rxCurBit >= -1 && m_rxCurBit < (m_dataBits - 1)) {
|
||||
int8_t dataBits = min(bits, static_cast<uint8_t>(m_dataBits - 1 - m_rxCurBit));
|
||||
m_rxCurBit += dataBits;
|
||||
if (m_rxLastBit < (m_dataBits - 1)) {
|
||||
uint8_t dataBits = min(bits, static_cast<uint32_t>(m_dataBits - 1 - m_rxLastBit));
|
||||
m_rxLastBit += dataBits;
|
||||
bits -= dataBits;
|
||||
m_rxCurByte >>= dataBits;
|
||||
if (level) { m_rxCurByte |= (BYTE_ALL_BITS_SET << (8 - dataBits)); }
|
||||
continue;
|
||||
}
|
||||
// parity bit
|
||||
if (m_parityMode && m_rxCurBit == (m_dataBits - 1)) {
|
||||
++m_rxCurBit;
|
||||
if (m_parityMode && m_rxLastBit == (m_dataBits - 1)) {
|
||||
++m_rxLastBit;
|
||||
--bits;
|
||||
m_rxCurParity = level;
|
||||
continue;
|
||||
}
|
||||
// stop bits
|
||||
if (m_rxCurBit < (m_pduBits - m_stopBits - 1)) {
|
||||
++m_rxCurBit;
|
||||
--bits;
|
||||
continue;
|
||||
}
|
||||
if (m_rxCurBit == (m_pduBits - m_stopBits - 1)) {
|
||||
// Store the received value in the buffer unless we have an overflow
|
||||
// if not high stop bit level, discard word
|
||||
if (level)
|
||||
{
|
||||
m_rxCurByte >>= (sizeof(uint8_t) * 8 - m_dataBits);
|
||||
if (!m_buffer->push(m_rxCurByte)) {
|
||||
m_overflow = true;
|
||||
}
|
||||
else {
|
||||
if (m_parityBuffer)
|
||||
// Store the received value in the buffer unless we have an overflow
|
||||
// if not high stop bit level, discard word
|
||||
if (bits >= static_cast<uint32_t>(m_pduBits - 1 - m_rxLastBit) && level) {
|
||||
m_rxCurByte >>= (sizeof(uint8_t) * 8 - m_dataBits);
|
||||
if (!m_buffer->push(m_rxCurByte)) {
|
||||
m_overflow = true;
|
||||
}
|
||||
else {
|
||||
if (m_parityBuffer)
|
||||
{
|
||||
if (m_rxCurParity) {
|
||||
m_parityBuffer->pushpeek() |= m_parityInPos;
|
||||
}
|
||||
else {
|
||||
m_parityBuffer->pushpeek() &= ~m_parityInPos;
|
||||
}
|
||||
m_parityInPos <<= 1;
|
||||
if (!m_parityInPos)
|
||||
{
|
||||
if (m_rxCurParity) {
|
||||
m_parityBuffer->pushpeek() |= m_parityInPos;
|
||||
}
|
||||
else {
|
||||
m_parityBuffer->pushpeek() &= ~m_parityInPos;
|
||||
}
|
||||
m_parityInPos <<= 1;
|
||||
if (!m_parityInPos)
|
||||
{
|
||||
m_parityBuffer->push();
|
||||
m_parityInPos = 1;
|
||||
}
|
||||
m_parityBuffer->push();
|
||||
m_parityInPos = 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
m_rxCurBit = m_pduBits;
|
||||
// reset to 0 is important for masked bit logic
|
||||
m_rxCurByte = 0;
|
||||
m_rxCurParity = false;
|
||||
break;
|
||||
}
|
||||
m_rxLastBit = m_pduBits - 1;
|
||||
// reset to 0 is important for masked bit logic
|
||||
m_rxCurByte = 0;
|
||||
m_rxCurParity = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void ICACHE_RAM_ATTR SoftwareSerial::rxBitISR(SoftwareSerial* self) {
|
||||
uint32_t curCycle = ESP.getCycleCount();
|
||||
bool level = digitalRead(self->m_rxPin);
|
||||
void IRAM_ATTR UARTBase::rxBitISR(UARTBase* self) {
|
||||
const bool level = *self->m_rxReg & self->m_rxBitMask;
|
||||
const uint32_t curTick = microsToTicks(micros());
|
||||
const bool empty = !self->m_isrBuffer->available();
|
||||
|
||||
// Store level and cycle in the buffer unless we have an overflow
|
||||
// cycle's LSB is repurposed for the level bit
|
||||
if (!self->m_isrBuffer->push((curCycle | 1U) ^ !level)) self->m_isrOverflow.store(true);
|
||||
// Store level and tick in the buffer unless we have an overflow
|
||||
// tick's LSB is repurposed for the level bit
|
||||
if (!self->m_isrBuffer->push((curTick | 1U) ^ !level)) self->m_isrOverflow.store(true);
|
||||
// Trigger rx callback only when receiver is starved
|
||||
if (empty) self->m_rxHandler();
|
||||
}
|
||||
|
||||
void ICACHE_RAM_ATTR SoftwareSerial::rxBitSyncISR(SoftwareSerial* self) {
|
||||
uint32_t start = ESP.getCycleCount();
|
||||
uint32_t wait = self->m_bitCycles - 172U;
|
||||
|
||||
void IRAM_ATTR UARTBase::rxBitSyncISR(UARTBase* self) {
|
||||
bool level = self->m_invert;
|
||||
// Store level and cycle in the buffer unless we have an overflow
|
||||
// cycle's LSB is repurposed for the level bit
|
||||
const uint32_t start = microsToTicks(micros());
|
||||
uint32_t wait = self->m_bitTicks;
|
||||
const bool empty = !self->m_isrBuffer->available();
|
||||
|
||||
// Store level and tick in the buffer unless we have an overflow
|
||||
// tick's LSB is repurposed for the level bit
|
||||
if (!self->m_isrBuffer->push(((start + wait) | 1U) ^ !level)) self->m_isrOverflow.store(true);
|
||||
|
||||
for (uint32_t i = 0; i < self->m_pduBits; ++i) {
|
||||
while (ESP.getCycleCount() - start < wait) {};
|
||||
wait += self->m_bitCycles;
|
||||
while (microsToTicks(micros()) - start < wait) {};
|
||||
wait += self->m_bitTicks;
|
||||
|
||||
// Store level and cycle in the buffer unless we have an overflow
|
||||
// cycle's LSB is repurposed for the level bit
|
||||
if (digitalRead(self->m_rxPin) != level)
|
||||
// Store level and tick in the buffer unless we have an overflow
|
||||
// tick's LSB is repurposed for the level bit
|
||||
if (static_cast<bool>(*self->m_rxReg & self->m_rxBitMask) != level)
|
||||
{
|
||||
if (!self->m_isrBuffer->push(((start + wait) | 1U) ^ level)) self->m_isrOverflow.store(true);
|
||||
level = !level;
|
||||
}
|
||||
}
|
||||
// Trigger rx callback only when receiver is starved
|
||||
if (empty) self->m_rxHandler();
|
||||
}
|
||||
|
||||
void SoftwareSerial::onReceive(Delegate<void(int available), void*> handler) {
|
||||
receiveHandler = handler;
|
||||
void UARTBase::onReceive(const Delegate<void(), void*>& handler) {
|
||||
disableInterrupts();
|
||||
m_rxHandler = handler;
|
||||
restoreInterrupts();
|
||||
}
|
||||
|
||||
void SoftwareSerial::perform_work() {
|
||||
if (!m_rxValid) { return; }
|
||||
rxBits();
|
||||
if (receiveHandler) {
|
||||
int avail = m_buffer->available();
|
||||
if (avail) { receiveHandler(avail); }
|
||||
}
|
||||
void UARTBase::onReceive(Delegate<void(), void*>&& handler) {
|
||||
disableInterrupts();
|
||||
m_rxHandler = std::move(handler);
|
||||
restoreInterrupts();
|
||||
}
|
||||
|
||||
#if __GNUC__ < 12
|
||||
// The template member functions below must be in IRAM, but due to a bug GCC doesn't currently
|
||||
// honor the attribute. Instead, it is possible to do explicit specialization and adorn
|
||||
// these with the IRAM attribute:
|
||||
// Delegate<>::operator (), circular_queue<>::available,
|
||||
// circular_queue<>::available_for_push, circular_queue<>::push_peek, circular_queue<>::push
|
||||
|
||||
template void IRAM_ATTR delegate::detail::DelegateImpl<void*, void>::operator()() const;
|
||||
template size_t IRAM_ATTR circular_queue<uint32_t, UARTBase*>::available() const;
|
||||
template bool IRAM_ATTR circular_queue<uint32_t, UARTBase*>::push(uint32_t&&);
|
||||
template bool IRAM_ATTR circular_queue<uint32_t, UARTBase*>::push(const uint32_t&);
|
||||
#endif // __GNUC__ < 12
|
||||
|
||||
|
||||
Reference in New Issue
Block a user