diff --git a/trunk/AVRProjects/00_ASM_Templates/ATTiny13a/tiny13a.avr b/trunk/AVRProjects/00_ASM_Templates/ATTiny13a/tiny13a.avr
new file mode 100644
index 00000000..79579ca5
--- /dev/null
+++ b/trunk/AVRProjects/00_ASM_Templates/ATTiny13a/tiny13a.avr
@@ -0,0 +1,40 @@
+;* ******************************************************** *
+;   ATtiny 13/45/85 Pin map
+;                           +-\/-+
+;         /Reset ADC0 PB5  1|o   |8  Vcc
+;                ADC3 PB3  2|    |7  PB2 ADC1 SCK
+;                ADC2 PB4  3|    |6  PB1 OC0B MISO AIN1
+;                     GND  4|    |5  PB0 OC0A MOSI AIN0
+;                           +----+
+;* ******************************************************** */
+
+; Define processor type on top of the source code
+;
+.DEVICE ATtiny13A
+; 9.6MHz:
+; LFuse: 0x7A; HFuse: 0x1F;
+; AVRDude: -U lfuse:w:0x7a:m -U hfuse:w:0x1f:m
+;
+; ******************************************************************
+
+; Int-Vector area
+.CSEG
+.ORG $0000
+	rjmp Setup	;Reset
+	reti		;INT0 		- External Int0 Vector
+	reti		;PCINT0 	- Pin Change Interrupt handler
+	reti		;TIM0_OVF	- Timer0 Overflow handler
+	reti		;EE_RDY		- EEPROM Ready Handler
+	reti		;ANA_COMP	- Analog Comparator Handler
+	reti		;TIM0_COMPA	- Timer0 Compare match A Handler
+	reti		;TIM0_COMPB	- Timer0 Compare match B Handler
+	reti		;WDT		- Watchdog Overflow Handler
+	reti		;ADC		- ADC Conversion Handler
+
+.ORG $000A
+Setup:
+	cli			; Disable Interrupts
+	ldi r16, low(RAMEND)
+	out SPL,r16 ;Set Stack Pointer to top of RAM
+Main:
+	rjmp Main	; infinite loop
diff --git a/trunk/AVRProjects/00_ASM_Templates/ATTiny13a/tiny13a.hex b/trunk/AVRProjects/00_ASM_Templates/ATTiny13a/tiny13a.hex
new file mode 100644
index 00000000..b3e04610
--- /dev/null
+++ b/trunk/AVRProjects/00_ASM_Templates/ATTiny13a/tiny13a.hex
@@ -0,0 +1,4 @@
+:020000020000FC
+:1000000009C018951895189518951895189518956C
+:0C00100018951895F8940FE90DBFFFCF6C
+:00000001FF
diff --git a/trunk/AVRProjects/00_ASM_Templates/ATTiny13a/tiny13a.lst b/trunk/AVRProjects/00_ASM_Templates/ATTiny13a/tiny13a.lst
new file mode 100644
index 00000000..349509b9
--- /dev/null
+++ b/trunk/AVRProjects/00_ASM_Templates/ATTiny13a/tiny13a.lst
@@ -0,0 +1,50 @@
+gavrasm Gerd's AVR assembler version 3.5 (C)2015 by DG4FAC
+----------------------------------------------------------
+Source file: tiny13a.avr
+Hex file:    tiny13a.hex
+Eeprom file: tiny13a.eep
+Compiled:    23.07.2021, 10:20:30
+Pass:        2
+     1: ;* ******************************************************** *
+     2: ;   ATtiny 13/45/85 Pin map
+     3: ;                           +-\/-+
+     4: ;         /Reset ADC0 PB5  1|o   |8  Vcc
+     5: ;                ADC3 PB3  2|    |7  PB2 ADC1 SCK
+     6: ;                ADC2 PB4  3|    |6  PB1 OC0B MISO AIN1
+     7: ;                     GND  4|    |5  PB0 OC0A MOSI AIN0
+     8: ;                           +----+
+     9: ;* ******************************************************** */
+    10: 
+    11: ; Define processor type on top of the source code
+    12: ;
+    13: .DEVICE ATtiny13A
+    14: 
+    15: ; Int-Vector area
+    16: .CSEG
+    17: .ORG $0000
+    18: 000000   C009  rjmp Setup	;Reset
+    19: 000001   9518  reti		;INT0 		- External Int0 Vector
+    20: 000002   9518  reti		;PCINT0 	- Pin Change Interrupt handler
+    21: 000003   9518  reti		;TIM0_OVF	- Timer0 Overflow handler
+    22: 000004   9518  reti		;EE_RDY		- EEPROM Ready Handler
+    23: 000005   9518  reti		;ANA_COMP	- Analog Comparator Handler
+    24: 000006   9518  reti		;TIM0_COMPA	- Timer0 Compare match A Handler
+    25: 000007   9518  reti		;TIM0_COMPB	- Timer0 Compare match B Handler
+    26: 000008   9518  reti		;WDT		- Watchdog Overflow Handler
+    27: 000009   9518  reti		;ADC		- ADC Conversion Handler
+    28: 
+    29: .ORG $000A
+    30: Setup:
+    31: 00000A   94F8  cli			; Disable Interrupts
+    32: 00000B   E90F  ldi r16, low(RAMEND)
+    33: 00000C   BF0D  out SPL,r16 ;Set Stack Pointer to top of RAM
+    34: Main:
+    35: 00000D   CFFF  rjmp Main	; infinite loop
+
+Program             :       14 words.
+Constants           :        0 words.
+Total program memory:       14 words.
+Eeprom space        :        0 bytes.
+Data segment        :        0 bytes.
+Compilation completed, no errors.
+Compilation endet 23.07.2021, 10:20:30
diff --git a/trunk/AVRProjects/00_ASM_Templates/ATTiny2313/tiny2313a.avr b/trunk/AVRProjects/00_ASM_Templates/ATTiny2313/tiny2313a.avr
new file mode 100644
index 00000000..bb0b2055
--- /dev/null
+++ b/trunk/AVRProjects/00_ASM_Templates/ATTiny2313/tiny2313a.avr
@@ -0,0 +1,49 @@
+;* ******************************************************** *
+;   ATtiny 2313/4313 Pin map
+;                           +-\/-+
+;              /Reset PA2  1|o   |20  Vcc
+;                 RXD PD0  2|    |19  PB7 SCK
+;                 TXD PD1  3|    |18  PB6 MISO
+;                     PA1  4|    |17  PB5 MOSI
+;					 PA0  5|    |16  PB4 OC1B
+;					 PD2  6|    |15  PB3 OC1A
+;					 PD3  7|    |14  PB2 OC0A
+;					 PD4  8|    |13  PB1 AIN1
+;				OC0B PD5  9|    |12  PB0 AIN0
+;					 GND 10|    |11  PD6
+;					       +----+
+;* ******************************************************** */
+
+; Define processor type on top of the source code
+;
+.DEVICE ATtiny2313A
+
+; Int-Vector area
+.CSEG
+.ORG $0000
+	rjmp Setup	; for all types
+	reti 		; External Int0 Vector, not used
+	reti 		; External Int1 Vector, not used
+	reti 		; Timer Tim1_Capt, not used
+	reti 		; Timer Tim1_CompA, not used
+	reti 		; Timer Tim1_Ovf, not used
+	reti 		; Timer Tim0_Ovf, used
+	reti 		; Usart_RXC, not used
+	reti 		; Usart_dre, not used
+	reti 		; Usart_TXC, not used
+	reti 		; ANA_COMP ; Analog Comparator Handler
+	reti 		; PCINT ; Pin Change Interrupt
+	reti 		; TIMER1_COMPB ; Timer1 Compare B Handler
+	reti 		; TIMER0_COMPA ; Timer0 Compare A Handler
+	reti 		; TIMER0_COMPB ; Timer0 Compare B Handler
+	reti 		; USI_START ; USI Start Handler
+	reti 		; USI_OVERFLOW ; USI Overflow Handler
+	reti 		; EE_READY ; EEPROM Ready Handler
+	reti 		; WDT_OVERFLOW ; Watchdog Overflow Handler
+
+Setup:
+	cli			; Disable Interrupts
+	ldi r16, low(RAMEND)
+	out SPL,r16 ;Set Stack Pointer to top of RAM
+Main:
+	rjmp Main	; infinite loop
diff --git a/trunk/AVRProjects/00_ASM_Templates/ATTiny2313/tiny2313a.hex b/trunk/AVRProjects/00_ASM_Templates/ATTiny2313/tiny2313a.hex
new file mode 100644
index 00000000..d1c0cb27
--- /dev/null
+++ b/trunk/AVRProjects/00_ASM_Templates/ATTiny2313/tiny2313a.hex
@@ -0,0 +1,5 @@
+:020000020000FC
+:1000000012C0189518951895189518951895189563
+:100010001895189518951895189518951895189578
+:0E002000189518951895F8940FED0DBFFFCFA9
+:00000001FF
diff --git a/trunk/AVRProjects/00_ASM_Templates/ATTiny2313/tiny2313a.lst b/trunk/AVRProjects/00_ASM_Templates/ATTiny2313/tiny2313a.lst
new file mode 100644
index 00000000..46072c54
--- /dev/null
+++ b/trunk/AVRProjects/00_ASM_Templates/ATTiny2313/tiny2313a.lst
@@ -0,0 +1,64 @@
+gavrasm Gerd's AVR assembler version 3.5 (C)2015 by DG4FAC
+----------------------------------------------------------
+Source file: tiny2313a_primo.avr
+Hex file:    tiny2313a_primo.hex
+Eeprom file: tiny2313a_primo.eep
+Compiled:    26.07.2016, 11:35:04
+Pass:        2
+     1: ;* ******************************************************** *
+     2: ;   ATtiny 2313/4313 Pin map
+     3: ;                           +-\/-+
+     4: ;              /Reset PA2  1|o   |20  Vcc
+     5: ;                 RXD PD0  2|    |19  PB7 SCK
+     6: ;                 TXD PD1  3|    |18  PB6 MISO
+     7: ;                     PA1  4|    |17  PB5 MOSI
+     8: ;					 PA0  5|    |16  PB4 OC1B
+     9: ;					 PD2  6|    |15  PB3 OC1A
+    10: ;					 PD3  7|    |14  PB2 OC0A
+    11: ;					 PD4  8|    |13  PB1 AIN1
+    12: ;				OC0B PD5  9|    |12  PB0 AIN0
+    13: ;					 GND 10|    |11  PD6
+    14: ;					       +----+
+    15: ;* ******************************************************** */
+    16: 
+    17: ; Define processor type on top of the source code
+    18: ;
+    19: .DEVICE ATtiny2313A
+    20: 
+    21: ; Int-Vector area
+    22: .CSEG
+    23: .ORG $0000
+    24: 000000   C012  rjmp Setup	; for all types
+    25: 000001   9518  reti 		; External Int0 Vector, not used
+    26: 000002   9518  reti 		; External Int1 Vector, not used
+    27: 000003   9518  reti 		; Timer Tim1_Capt, not used
+    28: 000004   9518  reti 		; Timer Tim1_CompA, not used
+    29: 000005   9518  reti 		; Timer Tim1_Ovf, not used
+    30: 000006   9518  reti 		; Timer Tim0_Ovf, used
+    31: 000007   9518  reti 		; Usart_RXC, not used
+    32: 000008   9518  reti 		; Usart_dre, not used
+    33: 000009   9518  reti 		; Usart_TXC, not used
+    34: 00000A   9518  reti 		; ANA_COMP ; Analog Comparator Handler
+    35: 00000B   9518  reti 		; PCINT ; Pin Change Interrupt
+    36: 00000C   9518  reti 		; TIMER1_COMPB ; Timer1 Compare B Handler
+    37: 00000D   9518  reti 		; TIMER0_COMPA ; Timer0 Compare A Handler
+    38: 00000E   9518  reti 		; TIMER0_COMPB ; Timer0 Compare B Handler
+    39: 00000F   9518  reti 		; USI_START ; USI Start Handler
+    40: 000010   9518  reti 		; USI_OVERFLOW ; USI Overflow Handler
+    41: 000011   9518  reti 		; EE_READY ; EEPROM Ready Handler
+    42: 000012   9518  reti 		; WDT_OVERFLOW ; Watchdog Overflow Handler
+    43: 
+    44: Setup:
+    45: 000013   94F8  cli			; Disable Interrupts
+    46: 000014   ED0F  ldi r16, low(RAMEND)
+    47: 000015   BF0D  out SPL,r16 ;Set Stack Pointer to top of RAM
+    48: Main:
+    49: 000016   CFFF  rjmp Main	; infinite loop
+
+Program             :       23 words.
+Constants           :        0 words.
+Total program memory:       23 words.
+Eeprom space        :        0 bytes.
+Data segment        :        0 bytes.
+Compilation completed, no errors.
+Compilation endet 26.07.2016, 11:35:04
diff --git a/trunk/AVRProjects/00_ASM_Templates/ATTiny45/tiny45.avr b/trunk/AVRProjects/00_ASM_Templates/ATTiny45/tiny45.avr
new file mode 100644
index 00000000..dc26f917
--- /dev/null
+++ b/trunk/AVRProjects/00_ASM_Templates/ATTiny45/tiny45.avr
@@ -0,0 +1,40 @@
+;* ******************************************************** *
+;   ATtiny 13/45/85 Pin map
+;                           +-\/-+
+;         /Reset ADC0 PB5  1|o   |8  Vcc
+;                ADC3 PB3  2|    |7  PB2 ADC1 SCK
+;                ADC2 PB4  3|    |6  PB1 OC0B MISO AIN1
+;                     GND  4|    |5  PB0 OC0A MOSI AIN0
+;                           +----+
+;* ******************************************************** */
+
+; Define processor type on top of the source code
+;
+.DEVICE ATtiny45
+
+; Int-Vector area
+.CSEG
+.ORG $0000
+	rjmp Setup	;Reset
+	reti		;INT0		- External Int0 Vector
+	reti		;PCINT0		- Pin Change Interrupt handler
+	reti		;TIM1_COMPA	- Timer1 Compare match A Handler
+	reti		;TIM1_OVF	- Timer1 Overflow handler
+	reti		;TIM0_OVF	- Timer0 Overflow handler
+	reti		;EE_RDY		- EEPROM Ready Handler
+	reti		;ANA_COMP	- Analog Comparator Handler
+	reti		;ADC		- ADC Conversion Handler
+	reti		;TIM1_COMPB	- Timer1 Compare match B Handler
+	reti		;TIM0_COMPA	- Timer0 Compare match A Handler
+	reti		;TIM0_COMPB	- Timer0 Compare match B Handler
+	reti		;WDT		- Watchdog Overflow Handler
+	reti		;USI_START	- USI Start
+	reti		;USI_OVF	- USI Overflow
+
+.ORG $000F
+Setup:
+	cli			; Disable Interrupts
+	ldi r16, low(RAMEND)
+	out SPL,r16 ;Set Stack Pointer to top of RAM
+Main:
+	rjmp Main	; infinite loop
diff --git a/trunk/AVRProjects/00_ASM_Templates/ATTiny45/tiny45.hex b/trunk/AVRProjects/00_ASM_Templates/ATTiny45/tiny45.hex
new file mode 100644
index 00000000..b7212ee5
--- /dev/null
+++ b/trunk/AVRProjects/00_ASM_Templates/ATTiny45/tiny45.hex
@@ -0,0 +1,5 @@
+:020000020000FC
+:100000000EC0189518951895189518951895189567
+:100010001895189518951895189518951895F89499
+:060020000FE50DBFFFCF4C
+:00000001FF
diff --git a/trunk/AVRProjects/00_ASM_Templates/ATTiny45/tiny45.lst b/trunk/AVRProjects/00_ASM_Templates/ATTiny45/tiny45.lst
new file mode 100644
index 00000000..fb6ad6f4
--- /dev/null
+++ b/trunk/AVRProjects/00_ASM_Templates/ATTiny45/tiny45.lst
@@ -0,0 +1,55 @@
+gavrasm Gerd's AVR assembler version 3.5 (C)2015 by DG4FAC
+----------------------------------------------------------
+Source file: tiny45_primo.avr
+Hex file:    tiny45_primo.hex
+Eeprom file: tiny45_primo.eep
+Compiled:    26.07.2016, 11:33:17
+Pass:        2
+     1: ;* ******************************************************** *
+     2: ;   ATtiny 13/45/85 Pin map
+     3: ;                           +-\/-+
+     4: ;         /Reset ADC0 PB5  1|o   |8  Vcc
+     5: ;                ADC3 PB3  2|    |7  PB2 ADC1 SCK
+     6: ;                ADC2 PB4  3|    |6  PB1 OC0B MISO AIN1
+     7: ;                     GND  4|    |5  PB0 OC0A MOSI AIN0
+     8: ;                           +----+
+     9: ;* ******************************************************** */
+    10: 
+    11: ; Define processor type on top of the source code
+    12: ;
+    13: .DEVICE ATtiny45
+    14: 
+    15: ; Int-Vector area
+    16: .CSEG
+    17: .ORG $0000
+    18: 000000   C00E  rjmp Setup	;Reset
+    19: 000001   9518  reti		;INT0		- External Int0 Vector
+    20: 000002   9518  reti		;PCINT0		- Pin Change Interrupt handler
+    21: 000003   9518  reti		;TIM1_COMPA	- Timer1 Compare match A Handler
+    22: 000004   9518  reti		;TIM1_OVF	- Timer1 Overflow handler
+    23: 000005   9518  reti		;TIM0_OVF	- Timer0 Overflow handler
+    24: 000006   9518  reti		;EE_RDY		- EEPROM Ready Handler
+    25: 000007   9518  reti		;ANA_COMP	- Analog Comparator Handler
+    26: 000008   9518  reti		;ADC		- ADC Conversion Handler
+    27: 000009   9518  reti		;TIM1_COMPB	- Timer1 Compare match B Handler
+    28: 00000A   9518  reti		;TIM0_COMPA	- Timer0 Compare match A Handler
+    29: 00000B   9518  reti		;TIM0_COMPB	- Timer0 Compare match B Handler
+    30: 00000C   9518  reti		;WDT		- Watchdog Overflow Handler
+    31: 00000D   9518  reti		;USI_START	- USI Start
+    32: 00000E   9518  reti		;USI_OVF	- USI Overflow
+    33: 
+    34: .ORG $000F
+    35: Setup:
+    36: 00000F   94F8  cli			; Disable Interrupts
+    37: 000010   E50F  ldi r16, low(RAMEND)
+    38: 000011   BF0D  out SPL,r16 ;Set Stack Pointer to top of RAM
+    39: Main:
+    40: 000012   CFFF  rjmp Main	; infinite loop
+
+Program             :       19 words.
+Constants           :        0 words.
+Total program memory:       19 words.
+Eeprom space        :        0 bytes.
+Data segment        :        0 bytes.
+Compilation completed, no errors.
+Compilation endet 26.07.2016, 11:33:17
diff --git a/trunk/AVRProjects/00_ASM_Templates/ATTiny85/tiny85.avr b/trunk/AVRProjects/00_ASM_Templates/ATTiny85/tiny85.avr
new file mode 100644
index 00000000..66d1f76d
--- /dev/null
+++ b/trunk/AVRProjects/00_ASM_Templates/ATTiny85/tiny85.avr
@@ -0,0 +1,40 @@
+;* ******************************************************** *
+;   ATtiny 13/45/85 Pin map
+;                           +-\/-+
+;         /Reset ADC0 PB5  1|o   |8  Vcc
+;                ADC3 PB3  2|    |7  PB2 ADC1 SCK
+;                ADC2 PB4  3|    |6  PB1 OC0B MISO AIN1
+;                     GND  4|    |5  PB0 OC0A MOSI AIN0
+;                           +----+
+;* ******************************************************** */
+
+; Define processor type on top of the source code
+;
+.DEVICE ATtiny85
+
+; Int-Vector area
+.CSEG
+.ORG $0000
+	rjmp Setup	;Reset
+	reti		;INT0		- External Int0 Vector
+	reti		;PCINT0		- Pin Change Interrupt handler
+	reti		;TIM1_COMPA	- Timer1 Compare match A Handler
+	reti		;TIM1_OVF	- Timer1 Overflow handler
+	reti		;TIM0_OVF	- Timer0 Overflow handler
+	reti		;EE_RDY		- EEPROM Ready Handler
+	reti		;ANA_COMP	- Analog Comparator Handler
+	reti		;ADC		- ADC Conversion Handler
+	reti		;TIM1_COMPB	- Timer1 Compare match B Handler
+	reti		;TIM0_COMPA	- Timer0 Compare match A Handler
+	reti		;TIM0_COMPB	- Timer0 Compare match B Handler
+	reti		;WDT		- Watchdog Overflow Handler
+	reti		;USI_START	- USI Start
+	reti		;USI_OVF	- USI Overflow
+
+.ORG $000F
+Setup:
+	cli			; Disable Interrupts
+	ldi r16, low(RAMEND)
+	out SPL,r16 ;Set Stack Pointer to top of RAM
+Main:
+	rjmp Main	; infinite loop
diff --git a/trunk/AVRProjects/00_ASM_Templates/ATTiny85/tiny85.hex b/trunk/AVRProjects/00_ASM_Templates/ATTiny85/tiny85.hex
new file mode 100644
index 00000000..b7212ee5
--- /dev/null
+++ b/trunk/AVRProjects/00_ASM_Templates/ATTiny85/tiny85.hex
@@ -0,0 +1,5 @@
+:020000020000FC
+:100000000EC0189518951895189518951895189567
+:100010001895189518951895189518951895F89499
+:060020000FE50DBFFFCF4C
+:00000001FF
diff --git a/trunk/AVRProjects/00_ASM_Templates/ATTiny85/tiny85.lst b/trunk/AVRProjects/00_ASM_Templates/ATTiny85/tiny85.lst
new file mode 100644
index 00000000..56b2f763
--- /dev/null
+++ b/trunk/AVRProjects/00_ASM_Templates/ATTiny85/tiny85.lst
@@ -0,0 +1,55 @@
+gavrasm Gerd's AVR assembler version 3.5 (C)2015 by DG4FAC
+----------------------------------------------------------
+Source file: tiny85_primo.avr
+Hex file:    tiny85_primo.hex
+Eeprom file: tiny85_primo.eep
+Compiled:    26.07.2016, 11:33:50
+Pass:        2
+     1: ;* ******************************************************** *
+     2: ;   ATtiny 13/45/85 Pin map
+     3: ;                           +-\/-+
+     4: ;         /Reset ADC0 PB5  1|o   |8  Vcc
+     5: ;                ADC3 PB3  2|    |7  PB2 ADC1 SCK
+     6: ;                ADC2 PB4  3|    |6  PB1 OC0B MISO AIN1
+     7: ;                     GND  4|    |5  PB0 OC0A MOSI AIN0
+     8: ;                           +----+
+     9: ;* ******************************************************** */
+    10: 
+    11: ; Define processor type on top of the source code
+    12: ;
+    13: .DEVICE ATtiny85
+    14: 
+    15: ; Int-Vector area
+    16: .CSEG
+    17: .ORG $0000
+    18: 000000   C00E  rjmp Setup	;Reset
+    19: 000001   9518  reti		;INT0		- External Int0 Vector
+    20: 000002   9518  reti		;PCINT0		- Pin Change Interrupt handler
+    21: 000003   9518  reti		;TIM1_COMPA	- Timer1 Compare match A Handler
+    22: 000004   9518  reti		;TIM1_OVF	- Timer1 Overflow handler
+    23: 000005   9518  reti		;TIM0_OVF	- Timer0 Overflow handler
+    24: 000006   9518  reti		;EE_RDY		- EEPROM Ready Handler
+    25: 000007   9518  reti		;ANA_COMP	- Analog Comparator Handler
+    26: 000008   9518  reti		;ADC		- ADC Conversion Handler
+    27: 000009   9518  reti		;TIM1_COMPB	- Timer1 Compare match B Handler
+    28: 00000A   9518  reti		;TIM0_COMPA	- Timer0 Compare match A Handler
+    29: 00000B   9518  reti		;TIM0_COMPB	- Timer0 Compare match B Handler
+    30: 00000C   9518  reti		;WDT		- Watchdog Overflow Handler
+    31: 00000D   9518  reti		;USI_START	- USI Start
+    32: 00000E   9518  reti		;USI_OVF	- USI Overflow
+    33: 
+    34: .ORG $000F
+    35: Setup:
+    36: 00000F   94F8  cli			; Disable Interrupts
+    37: 000010   E50F  ldi r16, low(RAMEND)
+    38: 000011   BF0D  out SPL,r16 ;Set Stack Pointer to top of RAM
+    39: Main:
+    40: 000012   CFFF  rjmp Main	; infinite loop
+
+Program             :       19 words.
+Constants           :        0 words.
+Total program memory:       19 words.
+Eeprom space        :        0 bytes.
+Data segment        :        0 bytes.
+Compilation completed, no errors.
+Compilation endet 26.07.2016, 11:33:50
diff --git a/trunk/AVRProjects/00_C_Templates/ATMega1284/main.c b/trunk/AVRProjects/00_C_Templates/ATMega1284/main.c
new file mode 100644
index 00000000..502e9cae
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATMega1284/main.c
@@ -0,0 +1,44 @@
+/* ******************************************************** *
+ *
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016
+ * Author:		Paolo Iocco
+ * ******************************************************** */
+/* ******************************************************** *
+   ATmega 1284 Pin map
+                           +-\/-+
+                     PB0  1|o   |40  PA0 ADC0
+                     PB1  2|    |39  PA1 ADC1
+                AIN0 PB2  3|    |38  PA2 ADC2
+           AIN1 OC0A PB3  4|    |37  PA3 ADC3
+		        OC0B PB4  5|    |36  PA4 ADC4
+				MOSI PB5  6|    |35  PA5 ADC5
+				MISO PB6  7|    |34  PA6 ADC6
+				SCK  PB7  8|    |33  PA7 ADC7
+                  /Reset  9|    |32  AREF
+					 VCC 10|    |31  GND
+					 GND 11|    |30  AVCC
+			       XTAL1 12|    |29  PC7
+                   XTAL2 13|    |28  PC6
+				RXD0 PD0 14|    |27  PC5
+				TXD0 PD1 15|    |26  PC4 
+				RXD1 PD2 16|    |25  PC3
+				TXD1 PD3 17|    |24  PC2 
+				OC1B PD4 18|    |23  PC1 SDA
+				OC1A PD5 19|    |22  PC0 SCL
+				OC2B PD6 20|    |21  PD7 OC2A
+					       +----+
+* ******************************************************** */
+
+#include "main.h"
+
+int main (void)
+{
+    while(1)
+	{
+		// Enter your code here
+    }
+	return(0);
+}
+
diff --git a/trunk/AVRProjects/00_C_Templates/ATMega1284/main.h b/trunk/AVRProjects/00_C_Templates/ATMega1284/main.h
new file mode 100644
index 00000000..6e53eb8a
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATMega1284/main.h
@@ -0,0 +1,18 @@
+/* ******************************************************** *
+ *															*
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016									*
+ * Author:		Paolo Iocco									*	
+ * ******************************************************** */
+ 
+#ifndef MAIN_H_
+#define MAIN_H_
+
+#include <avr/io.h>
+
+#ifndef F_CPU
+#define F_CPU 1000000L
+#endif
+
+#endif /* MAIN_H_ */
diff --git a/trunk/AVRProjects/00_C_Templates/ATMega1284/makefile b/trunk/AVRProjects/00_C_Templates/ATMega1284/makefile
new file mode 100644
index 00000000..261ed4ea
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATMega1284/makefile
@@ -0,0 +1,442 @@
+# Hey Emacs, this is a -*- makefile -*-
+#
+# WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al.
+# Released to the Public Domain
+# Please read the make user manual!
+#
+# Additional material for this makefile was submitted by:
+#  Tim Henigan
+#  Peter Fleury
+#  Reiner Patommel
+#  Sander Pool
+#  Frederik Rouleau
+#  Markus Pfaff
+#
+# On command line:
+#
+# make all = Make software.
+#
+# make clean = Clean out built project files.
+#
+# make coff = Convert ELF to AVR COFF (for use with AVR Studio 3.x or VMLAB).
+#
+# make extcoff = Convert ELF to AVR Extended COFF (for use with AVR Studio
+#                4.07 or greater).
+#
+# make program = Download the hex file to the device, using avrdude.  Please
+#                customize the avrdude settings below first!
+#
+# make filename.s = Just compile filename.c into the assembler code only
+#
+# To rebuild project do "make clean" then "make all".
+#
+
+# mth 2004/09 
+# Differences from WinAVR 20040720 sample:
+# - DEPFLAGS according to Eric Weddingtion's fix (avrfreaks/gcc-forum)
+# - F_OSC Define in CFLAGS and AFLAGS
+
+
+# MCU name
+MCU = atmega1284p
+
+# Main Oscillator Frequency
+# This is only used to define F_OSC in all assembler and c-sources.
+F_OSC = 4190000
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+# Target file name (without extension).
+TARGET = main
+
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = $(TARGET).c
+
+
+# List Assembler source files here.
+# Make them always end in a capital .S.  Files ending in a lowercase .s
+# will not be considered source files but generated files (assembler
+# output from the compiler), and will be deleted upon "make clean"!
+# Even though the DOS/Win* filesystem matches both .s and .S the same,
+# it will preserve the spelling of the filenames, and gcc itself does
+# care about how the name is spelled on its command-line.
+ASRC = 
+
+
+
+# Optimization level, can be [0, 1, 2, 3, s]. 
+# 0 = turn off optimization. s = optimize for size.
+# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+OPT = s
+
+# Debugging format.
+# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
+# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
+#DEBUG = stabs
+DEBUG = dwarf-2
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+EXTRAINCDIRS = 
+
+
+# Compiler flag to set the C Standard level.
+# c89   - "ANSI" C
+# gnu89 - c89 plus GCC extensions
+# c99   - ISO C99 standard (not yet fully implemented)
+# gnu99 - c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+# Place -D or -U options here
+CDEFS =
+
+# Place -I options here
+CINCS =
+
+
+# Compiler flags.
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT)
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+CFLAGS += -Wall -Wstrict-prototypes
+CFLAGS += -Wa,-adhlns=$(<:.c=.lst)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+CFLAGS += -DF_OSC=$(F_OSC)
+
+
+
+# Assembler flags.
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs 
+ASFLAGS += -DF_OSC=$(F_OSC)
+
+
+#Additional libraries.
+
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+PRINTF_LIB = 
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+SCANF_LIB = 
+
+MATH_LIB = -lm
+
+# External memory options
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+# Linker flags.
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+
+
+
+
+# Programming support using avrdude. Settings and variables.
+
+# Programming hardware: alf avr910 avrisp bascom bsd 
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+#AVRDUDE_PROGRAMMER = stk500
+AVRDUDE_PROGRAMMER = usbasp
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = usb    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude> 
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+
+# ---------------------------------------------------------------------------
+
+# Define directories, if needed.
+DIRAVR = c:/winavr
+DIRAVRBIN = $(DIRAVR)/bin
+DIRAVRUTILS = $(DIRAVR)/utils/bin
+DIRINC = .
+DIRLIB = $(DIRAVR)/avr/lib
+
+
+# Define programs and commands.
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+
+
+
+
+# Define Messages
+# English
+MSG_ERRORS_NONE = Errors: none
+MSG_BEGIN = -------- begin --------
+MSG_END = --------  end  --------
+MSG_SIZE_BEFORE = Size before: 
+MSG_SIZE_AFTER = Size after:
+MSG_COFF = Converting to AVR COFF:
+MSG_EXTENDED_COFF = Converting to AVR Extended COFF:
+MSG_FLASH = Creating load file for Flash:
+MSG_EEPROM = Creating load file for EEPROM:
+MSG_EXTENDED_LISTING = Creating Extended Listing:
+MSG_SYMBOL_TABLE = Creating Symbol Table:
+MSG_LINKING = Linking:
+MSG_COMPILING = Compiling:
+MSG_ASSEMBLING = Assembling:
+MSG_CLEANING = Cleaning project:
+
+
+
+
+# Define all object files.
+OBJ = $(SRC:.c=.o) $(ASRC:.S=.o) 
+
+# Define all listing files.
+LST = $(ASRC:.S=.lst) $(SRC:.c=.lst)
+
+
+# Compiler flags to generate dependency files.
+### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
+GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS)
+
+
+
+
+
+# Default target.
+#all: begin gccversion sizebefore build sizeafter finished end
+all: begin gccversion build size finished end
+
+build: elf hex eep lss sym
+
+elf: $(TARGET).elf
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss 
+sym: $(TARGET).sym
+
+
+
+# Eye candy.
+# AVR Studio 3.x does not check make's exit code but relies on
+# the following magic strings to be generated by the compile job.
+begin:
+	@echo
+	@echo $(MSG_BEGIN)
+
+finished:
+	@echo $(MSG_ERRORS_NONE)
+
+end:
+	@echo $(MSG_END)
+	@echo
+
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+sizebefore:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
+
+sizeafter:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
+
+size:
+	$(SIZE) -C --mcu=$(MCU) $(TARGET).elf
+
+# Display compiler version information.
+gccversion : 
+	@$(CC) --version
+
+
+
+# Program the device.  
+program: $(TARGET).hex $(TARGET).eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM)
+
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000 
+
+
+coff: $(TARGET).elf
+	@echo
+	@echo $(MSG_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	@echo
+	@echo $(MSG_EXTENDED_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+
+# Create final output files (.hex, .eep) from ELF output file.
+%.hex: %.elf
+	@echo
+	@echo $(MSG_FLASH) $@
+	$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+%.eep: %.elf
+	@echo
+	@echo $(MSG_EEPROM) $@
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+%.lss: %.elf
+	@echo
+	@echo $(MSG_EXTENDED_LISTING) $@
+	$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+%.sym: %.elf
+	@echo
+	@echo $(MSG_SYMBOL_TABLE) $@
+	$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+%.elf: $(OBJ)
+	@echo
+	@echo $(MSG_LINKING) $@
+	$(CC) $(ALL_CFLAGS) $(OBJ) --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+%.o : %.c
+	@echo
+	@echo $(MSG_COMPILING) $<
+	$(CC) -c $(ALL_CFLAGS) $< -o $@ 
+
+
+# Compile: create assembler files from C source files.
+%.s : %.c
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+%.o : %.S
+	@echo
+	@echo $(MSG_ASSEMBLING) $<
+	$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+
+
+# Target: clean project.
+clean: begin clean_list finished end
+
+clean_list :
+	@echo
+	@echo $(MSG_CLEANING)
+	$(REMOVE) $(TARGET).hex
+	$(REMOVE) $(TARGET).eep
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).cof
+	$(REMOVE) $(TARGET).elf
+	$(REMOVE) $(TARGET).map
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).a90
+	$(REMOVE) $(TARGET).sym
+	$(REMOVE) $(TARGET).lnk
+	$(REMOVE) $(TARGET).lss
+	$(REMOVE) $(OBJ)
+	$(REMOVE) $(LST)
+	$(REMOVE) $(SRC:.c=.s)
+	$(REMOVE) $(SRC:.c=.d)
+	$(REMOVE) .dep/*
+
+
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program
+ 
+
+ 
diff --git a/trunk/AVRProjects/00_C_Templates/ATMega168/main.c b/trunk/AVRProjects/00_C_Templates/ATMega168/main.c
new file mode 100644
index 00000000..841785e5
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATMega168/main.c
@@ -0,0 +1,38 @@
+/* ******************************************************** *
+ *
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016
+ * Author:		Paolo Iocco
+ * ******************************************************** */
+/* ******************************************************** *
+   ATtiny 88 / Mega 168 / Mega 328 Pin map
+                           +-\/-+
+              /Reset PC6  1|o   |28  PC5 ADC5 
+                 RXD PD0  2|    |27  PC4 ADC4
+                 TXD PD1  3|    |26  PC3 ADC3
+                     PD2  4|    |25  PC2 ADC2
+				OC2B PD3  5|    |24  PC1 ADC1
+					 PD4  6|    |23  PC0 ADC0
+					 VCC  7|    |22  GND
+					 GND  8|    |21  AREF
+				OSC1 PB6  9|    |20  VCC
+				OSC2 PB7 10|    |19  PB5 SCK
+				OC0B PD5 11|    |18  PB4 MISO
+		   AIN0 OC0A PD6 12|    |17  PB3 OC2A MOSI
+				AIN1 PD7 13|    |16  PB2 OC1B
+					 PB0 14|    |15  PB1 OC1A
+					       +----+
+* ******************************************************** */
+
+#include "main.h"
+
+int main (void)
+{
+    while(1)
+	{
+		// Enter your code here
+    }
+	return(0);
+}
+
diff --git a/trunk/AVRProjects/00_C_Templates/ATMega168/main.h b/trunk/AVRProjects/00_C_Templates/ATMega168/main.h
new file mode 100644
index 00000000..6e53eb8a
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATMega168/main.h
@@ -0,0 +1,18 @@
+/* ******************************************************** *
+ *															*
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016									*
+ * Author:		Paolo Iocco									*	
+ * ******************************************************** */
+ 
+#ifndef MAIN_H_
+#define MAIN_H_
+
+#include <avr/io.h>
+
+#ifndef F_CPU
+#define F_CPU 1000000L
+#endif
+
+#endif /* MAIN_H_ */
diff --git a/trunk/AVRProjects/00_C_Templates/ATMega168/makefile b/trunk/AVRProjects/00_C_Templates/ATMega168/makefile
new file mode 100644
index 00000000..bdfdd783
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATMega168/makefile
@@ -0,0 +1,441 @@
+# Hey Emacs, this is a -*- makefile -*-
+#
+# WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al.
+# Released to the Public Domain
+# Please read the make user manual!
+#
+# Additional material for this makefile was submitted by:
+#  Tim Henigan
+#  Peter Fleury
+#  Reiner Patommel
+#  Sander Pool
+#  Frederik Rouleau
+#  Markus Pfaff
+#
+# On command line:
+#
+# make all = Make software.
+#
+# make clean = Clean out built project files.
+#
+# make coff = Convert ELF to AVR COFF (for use with AVR Studio 3.x or VMLAB).
+#
+# make extcoff = Convert ELF to AVR Extended COFF (for use with AVR Studio
+#                4.07 or greater).
+#
+# make program = Download the hex file to the device, using avrdude.  Please
+#                customize the avrdude settings below first!
+#
+# make filename.s = Just compile filename.c into the assembler code only
+#
+# To rebuild project do "make clean" then "make all".
+#
+
+# mth 2004/09 
+# Differences from WinAVR 20040720 sample:
+# - DEPFLAGS according to Eric Weddingtion's fix (avrfreaks/gcc-forum)
+# - F_OSC Define in CFLAGS and AFLAGS
+
+
+# MCU name
+MCU = atmega168p
+
+# Main Oscillator Frequency
+# This is only used to define F_OSC in all assembler and c-sources.
+F_OSC = 8000000
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+# Target file name (without extension).
+TARGET = main
+
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = $(TARGET).c
+
+
+# List Assembler source files here.
+# Make them always end in a capital .S.  Files ending in a lowercase .s
+# will not be considered source files but generated files (assembler
+# output from the compiler), and will be deleted upon "make clean"!
+# Even though the DOS/Win* filesystem matches both .s and .S the same,
+# it will preserve the spelling of the filenames, and gcc itself does
+# care about how the name is spelled on its command-line.
+ASRC = 
+
+
+
+# Optimization level, can be [0, 1, 2, 3, s]. 
+# 0 = turn off optimization. s = optimize for size.
+# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+OPT = s
+
+# Debugging format.
+# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
+# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
+#DEBUG = stabs
+DEBUG = dwarf-2
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+EXTRAINCDIRS = 
+
+
+# Compiler flag to set the C Standard level.
+# c89   - "ANSI" C
+# gnu89 - c89 plus GCC extensions
+# c99   - ISO C99 standard (not yet fully implemented)
+# gnu99 - c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+# Place -D or -U options here
+CDEFS =
+
+# Place -I options here
+CINCS =
+
+
+# Compiler flags.
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT)
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+CFLAGS += -Wall -Wstrict-prototypes
+CFLAGS += -Wa,-adhlns=$(<:.c=.lst)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+CFLAGS += -DF_OSC=$(F_OSC)
+
+
+
+# Assembler flags.
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs 
+ASFLAGS += -DF_OSC=$(F_OSC)
+
+
+#Additional libraries.
+
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+PRINTF_LIB = 
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+SCANF_LIB = 
+
+MATH_LIB = -lm
+
+# External memory options
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+# Linker flags.
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+
+
+
+
+# Programming support using avrdude. Settings and variables.
+
+# Programming hardware: alf avr910 avrisp bascom bsd 
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+#AVRDUDE_PROGRAMMER = stk500
+AVRDUDE_PROGRAMMER = usbasp
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = usb    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude> 
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+# ---------------------------------------------------------------------------
+
+# Define directories, if needed.
+DIRAVR = c:/winavr
+DIRAVRBIN = $(DIRAVR)/bin
+DIRAVRUTILS = $(DIRAVR)/utils/bin
+DIRINC = .
+DIRLIB = $(DIRAVR)/avr/lib
+
+
+# Define programs and commands.
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+
+
+
+
+# Define Messages
+# English
+MSG_ERRORS_NONE = Errors: none
+MSG_BEGIN = -------- begin --------
+MSG_END = --------  end  --------
+MSG_SIZE_BEFORE = Size before: 
+MSG_SIZE_AFTER = Size after:
+MSG_COFF = Converting to AVR COFF:
+MSG_EXTENDED_COFF = Converting to AVR Extended COFF:
+MSG_FLASH = Creating load file for Flash:
+MSG_EEPROM = Creating load file for EEPROM:
+MSG_EXTENDED_LISTING = Creating Extended Listing:
+MSG_SYMBOL_TABLE = Creating Symbol Table:
+MSG_LINKING = Linking:
+MSG_COMPILING = Compiling:
+MSG_ASSEMBLING = Assembling:
+MSG_CLEANING = Cleaning project:
+
+
+
+
+# Define all object files.
+OBJ = $(SRC:.c=.o) $(ASRC:.S=.o) 
+
+# Define all listing files.
+LST = $(ASRC:.S=.lst) $(SRC:.c=.lst)
+
+
+# Compiler flags to generate dependency files.
+### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
+GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS)
+
+
+
+
+
+# Default target.
+#all: begin gccversion sizebefore build sizeafter finished end
+all: begin gccversion build size finished end
+
+build: elf hex eep lss sym
+
+elf: $(TARGET).elf
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss 
+sym: $(TARGET).sym
+
+
+
+# Eye candy.
+# AVR Studio 3.x does not check make's exit code but relies on
+# the following magic strings to be generated by the compile job.
+begin:
+	@echo
+	@echo $(MSG_BEGIN)
+
+finished:
+	@echo $(MSG_ERRORS_NONE)
+
+end:
+	@echo $(MSG_END)
+	@echo
+
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+sizebefore:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
+
+sizeafter:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
+
+size:
+	$(SIZE) -C --mcu=$(MCU) $(TARGET).elf
+
+# Display compiler version information.
+gccversion : 
+	@$(CC) --version
+
+
+
+# Program the device.  
+program: $(TARGET).hex $(TARGET).eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM)
+
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000 
+
+
+coff: $(TARGET).elf
+	@echo
+	@echo $(MSG_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	@echo
+	@echo $(MSG_EXTENDED_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+
+# Create final output files (.hex, .eep) from ELF output file.
+%.hex: %.elf
+	@echo
+	@echo $(MSG_FLASH) $@
+	$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+%.eep: %.elf
+	@echo
+	@echo $(MSG_EEPROM) $@
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+%.lss: %.elf
+	@echo
+	@echo $(MSG_EXTENDED_LISTING) $@
+	$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+%.sym: %.elf
+	@echo
+	@echo $(MSG_SYMBOL_TABLE) $@
+	$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+%.elf: $(OBJ)
+	@echo
+	@echo $(MSG_LINKING) $@
+	$(CC) $(ALL_CFLAGS) $(OBJ) --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+%.o : %.c
+	@echo
+	@echo $(MSG_COMPILING) $<
+	$(CC) -c $(ALL_CFLAGS) $< -o $@ 
+
+
+# Compile: create assembler files from C source files.
+%.s : %.c
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+%.o : %.S
+	@echo
+	@echo $(MSG_ASSEMBLING) $<
+	$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+
+
+# Target: clean project.
+clean: begin clean_list finished end
+
+clean_list :
+	@echo
+	@echo $(MSG_CLEANING)
+	$(REMOVE) $(TARGET).hex
+	$(REMOVE) $(TARGET).eep
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).cof
+	$(REMOVE) $(TARGET).elf
+	$(REMOVE) $(TARGET).map
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).a90
+	$(REMOVE) $(TARGET).sym
+	$(REMOVE) $(TARGET).lnk
+	$(REMOVE) $(TARGET).lss
+	$(REMOVE) $(OBJ)
+	$(REMOVE) $(LST)
+	$(REMOVE) $(SRC:.c=.s)
+	$(REMOVE) $(SRC:.c=.d)
+	$(REMOVE) .dep/*
+
+
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program
+ 
+
+ 
diff --git a/trunk/AVRProjects/00_C_Templates/ATMega328/main.c b/trunk/AVRProjects/00_C_Templates/ATMega328/main.c
new file mode 100644
index 00000000..841785e5
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATMega328/main.c
@@ -0,0 +1,38 @@
+/* ******************************************************** *
+ *
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016
+ * Author:		Paolo Iocco
+ * ******************************************************** */
+/* ******************************************************** *
+   ATtiny 88 / Mega 168 / Mega 328 Pin map
+                           +-\/-+
+              /Reset PC6  1|o   |28  PC5 ADC5 
+                 RXD PD0  2|    |27  PC4 ADC4
+                 TXD PD1  3|    |26  PC3 ADC3
+                     PD2  4|    |25  PC2 ADC2
+				OC2B PD3  5|    |24  PC1 ADC1
+					 PD4  6|    |23  PC0 ADC0
+					 VCC  7|    |22  GND
+					 GND  8|    |21  AREF
+				OSC1 PB6  9|    |20  VCC
+				OSC2 PB7 10|    |19  PB5 SCK
+				OC0B PD5 11|    |18  PB4 MISO
+		   AIN0 OC0A PD6 12|    |17  PB3 OC2A MOSI
+				AIN1 PD7 13|    |16  PB2 OC1B
+					 PB0 14|    |15  PB1 OC1A
+					       +----+
+* ******************************************************** */
+
+#include "main.h"
+
+int main (void)
+{
+    while(1)
+	{
+		// Enter your code here
+    }
+	return(0);
+}
+
diff --git a/trunk/AVRProjects/00_C_Templates/ATMega328/main.h b/trunk/AVRProjects/00_C_Templates/ATMega328/main.h
new file mode 100644
index 00000000..6e53eb8a
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATMega328/main.h
@@ -0,0 +1,18 @@
+/* ******************************************************** *
+ *															*
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016									*
+ * Author:		Paolo Iocco									*	
+ * ******************************************************** */
+ 
+#ifndef MAIN_H_
+#define MAIN_H_
+
+#include <avr/io.h>
+
+#ifndef F_CPU
+#define F_CPU 1000000L
+#endif
+
+#endif /* MAIN_H_ */
diff --git a/trunk/AVRProjects/00_C_Templates/ATMega328/makefile b/trunk/AVRProjects/00_C_Templates/ATMega328/makefile
new file mode 100644
index 00000000..6ca483c7
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATMega328/makefile
@@ -0,0 +1,441 @@
+# Hey Emacs, this is a -*- makefile -*-
+#
+# WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al.
+# Released to the Public Domain
+# Please read the make user manual!
+#
+# Additional material for this makefile was submitted by:
+#  Tim Henigan
+#  Peter Fleury
+#  Reiner Patommel
+#  Sander Pool
+#  Frederik Rouleau
+#  Markus Pfaff
+#
+# On command line:
+#
+# make all = Make software.
+#
+# make clean = Clean out built project files.
+#
+# make coff = Convert ELF to AVR COFF (for use with AVR Studio 3.x or VMLAB).
+#
+# make extcoff = Convert ELF to AVR Extended COFF (for use with AVR Studio
+#                4.07 or greater).
+#
+# make program = Download the hex file to the device, using avrdude.  Please
+#                customize the avrdude settings below first!
+#
+# make filename.s = Just compile filename.c into the assembler code only
+#
+# To rebuild project do "make clean" then "make all".
+#
+
+# mth 2004/09 
+# Differences from WinAVR 20040720 sample:
+# - DEPFLAGS according to Eric Weddingtion's fix (avrfreaks/gcc-forum)
+# - F_OSC Define in CFLAGS and AFLAGS
+
+
+# MCU name
+MCU = atmega328
+
+# Main Oscillator Frequency
+# This is only used to define F_OSC in all assembler and c-sources.
+F_OSC = 4190000
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+# Target file name (without extension).
+TARGET = main
+
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = $(TARGET).c
+
+
+# List Assembler source files here.
+# Make them always end in a capital .S.  Files ending in a lowercase .s
+# will not be considered source files but generated files (assembler
+# output from the compiler), and will be deleted upon "make clean"!
+# Even though the DOS/Win* filesystem matches both .s and .S the same,
+# it will preserve the spelling of the filenames, and gcc itself does
+# care about how the name is spelled on its command-line.
+ASRC = 
+
+
+
+# Optimization level, can be [0, 1, 2, 3, s]. 
+# 0 = turn off optimization. s = optimize for size.
+# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+OPT = s
+
+# Debugging format.
+# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
+# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
+#DEBUG = stabs
+DEBUG = dwarf-2
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+EXTRAINCDIRS = 
+
+
+# Compiler flag to set the C Standard level.
+# c89   - "ANSI" C
+# gnu89 - c89 plus GCC extensions
+# c99   - ISO C99 standard (not yet fully implemented)
+# gnu99 - c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+# Place -D or -U options here
+CDEFS =
+
+# Place -I options here
+CINCS =
+
+
+# Compiler flags.
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT)
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+CFLAGS += -Wall -Wstrict-prototypes
+CFLAGS += -Wa,-adhlns=$(<:.c=.lst)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+CFLAGS += -DF_OSC=$(F_OSC)
+
+
+
+# Assembler flags.
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs 
+ASFLAGS += -DF_OSC=$(F_OSC)
+
+
+#Additional libraries.
+
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+PRINTF_LIB = 
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+SCANF_LIB = 
+
+MATH_LIB = -lm
+
+# External memory options
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+# Linker flags.
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+
+
+
+
+# Programming support using avrdude. Settings and variables.
+
+# Programming hardware: alf avr910 avrisp bascom bsd 
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+#AVRDUDE_PROGRAMMER = stk500
+AVRDUDE_PROGRAMMER = usbasp
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = usb    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude> 
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+# ---------------------------------------------------------------------------
+
+# Define directories, if needed.
+DIRAVR = c:/winavr
+DIRAVRBIN = $(DIRAVR)/bin
+DIRAVRUTILS = $(DIRAVR)/utils/bin
+DIRINC = .
+DIRLIB = $(DIRAVR)/avr/lib
+
+
+# Define programs and commands.
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+
+
+
+
+# Define Messages
+# English
+MSG_ERRORS_NONE = Errors: none
+MSG_BEGIN = -------- begin --------
+MSG_END = --------  end  --------
+MSG_SIZE_BEFORE = Size before: 
+MSG_SIZE_AFTER = Size after:
+MSG_COFF = Converting to AVR COFF:
+MSG_EXTENDED_COFF = Converting to AVR Extended COFF:
+MSG_FLASH = Creating load file for Flash:
+MSG_EEPROM = Creating load file for EEPROM:
+MSG_EXTENDED_LISTING = Creating Extended Listing:
+MSG_SYMBOL_TABLE = Creating Symbol Table:
+MSG_LINKING = Linking:
+MSG_COMPILING = Compiling:
+MSG_ASSEMBLING = Assembling:
+MSG_CLEANING = Cleaning project:
+
+
+
+
+# Define all object files.
+OBJ = $(SRC:.c=.o) $(ASRC:.S=.o) 
+
+# Define all listing files.
+LST = $(ASRC:.S=.lst) $(SRC:.c=.lst)
+
+
+# Compiler flags to generate dependency files.
+### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
+GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS)
+
+
+
+
+
+# Default target.
+#all: begin gccversion sizebefore build sizeafter finished end
+all: begin gccversion build size finished end
+
+build: elf hex eep lss sym
+
+elf: $(TARGET).elf
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss 
+sym: $(TARGET).sym
+
+
+
+# Eye candy.
+# AVR Studio 3.x does not check make's exit code but relies on
+# the following magic strings to be generated by the compile job.
+begin:
+	@echo
+	@echo $(MSG_BEGIN)
+
+finished:
+	@echo $(MSG_ERRORS_NONE)
+
+end:
+	@echo $(MSG_END)
+	@echo
+
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+sizebefore:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
+
+sizeafter:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
+
+size:
+	$(SIZE) -C --mcu=$(MCU) $(TARGET).elf
+
+# Display compiler version information.
+gccversion : 
+	@$(CC) --version
+
+
+
+# Program the device.  
+program: $(TARGET).hex $(TARGET).eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM)
+
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000 
+
+
+coff: $(TARGET).elf
+	@echo
+	@echo $(MSG_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	@echo
+	@echo $(MSG_EXTENDED_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+
+# Create final output files (.hex, .eep) from ELF output file.
+%.hex: %.elf
+	@echo
+	@echo $(MSG_FLASH) $@
+	$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+%.eep: %.elf
+	@echo
+	@echo $(MSG_EEPROM) $@
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+%.lss: %.elf
+	@echo
+	@echo $(MSG_EXTENDED_LISTING) $@
+	$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+%.sym: %.elf
+	@echo
+	@echo $(MSG_SYMBOL_TABLE) $@
+	$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+%.elf: $(OBJ)
+	@echo
+	@echo $(MSG_LINKING) $@
+	$(CC) $(ALL_CFLAGS) $(OBJ) --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+%.o : %.c
+	@echo
+	@echo $(MSG_COMPILING) $<
+	$(CC) -c $(ALL_CFLAGS) $< -o $@ 
+
+
+# Compile: create assembler files from C source files.
+%.s : %.c
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+%.o : %.S
+	@echo
+	@echo $(MSG_ASSEMBLING) $<
+	$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+
+
+# Target: clean project.
+clean: begin clean_list finished end
+
+clean_list :
+	@echo
+	@echo $(MSG_CLEANING)
+	$(REMOVE) $(TARGET).hex
+	$(REMOVE) $(TARGET).eep
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).cof
+	$(REMOVE) $(TARGET).elf
+	$(REMOVE) $(TARGET).map
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).a90
+	$(REMOVE) $(TARGET).sym
+	$(REMOVE) $(TARGET).lnk
+	$(REMOVE) $(TARGET).lss
+	$(REMOVE) $(OBJ)
+	$(REMOVE) $(LST)
+	$(REMOVE) $(SRC:.c=.s)
+	$(REMOVE) $(SRC:.c=.d)
+	$(REMOVE) .dep/*
+
+
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program
+ 
+
+ 
diff --git a/trunk/AVRProjects/00_C_Templates/ATMega48/main.c b/trunk/AVRProjects/00_C_Templates/ATMega48/main.c
new file mode 100644
index 00000000..841785e5
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATMega48/main.c
@@ -0,0 +1,38 @@
+/* ******************************************************** *
+ *
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016
+ * Author:		Paolo Iocco
+ * ******************************************************** */
+/* ******************************************************** *
+   ATtiny 88 / Mega 168 / Mega 328 Pin map
+                           +-\/-+
+              /Reset PC6  1|o   |28  PC5 ADC5 
+                 RXD PD0  2|    |27  PC4 ADC4
+                 TXD PD1  3|    |26  PC3 ADC3
+                     PD2  4|    |25  PC2 ADC2
+				OC2B PD3  5|    |24  PC1 ADC1
+					 PD4  6|    |23  PC0 ADC0
+					 VCC  7|    |22  GND
+					 GND  8|    |21  AREF
+				OSC1 PB6  9|    |20  VCC
+				OSC2 PB7 10|    |19  PB5 SCK
+				OC0B PD5 11|    |18  PB4 MISO
+		   AIN0 OC0A PD6 12|    |17  PB3 OC2A MOSI
+				AIN1 PD7 13|    |16  PB2 OC1B
+					 PB0 14|    |15  PB1 OC1A
+					       +----+
+* ******************************************************** */
+
+#include "main.h"
+
+int main (void)
+{
+    while(1)
+	{
+		// Enter your code here
+    }
+	return(0);
+}
+
diff --git a/trunk/AVRProjects/00_C_Templates/ATMega48/main.h b/trunk/AVRProjects/00_C_Templates/ATMega48/main.h
new file mode 100644
index 00000000..6e53eb8a
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATMega48/main.h
@@ -0,0 +1,18 @@
+/* ******************************************************** *
+ *															*
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016									*
+ * Author:		Paolo Iocco									*	
+ * ******************************************************** */
+ 
+#ifndef MAIN_H_
+#define MAIN_H_
+
+#include <avr/io.h>
+
+#ifndef F_CPU
+#define F_CPU 1000000L
+#endif
+
+#endif /* MAIN_H_ */
diff --git a/trunk/AVRProjects/00_C_Templates/ATMega48/makefile b/trunk/AVRProjects/00_C_Templates/ATMega48/makefile
new file mode 100644
index 00000000..54f7eefd
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATMega48/makefile
@@ -0,0 +1,441 @@
+# Hey Emacs, this is a -*- makefile -*-
+#
+# WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al.
+# Released to the Public Domain
+# Please read the make user manual!
+#
+# Additional material for this makefile was submitted by:
+#  Tim Henigan
+#  Peter Fleury
+#  Reiner Patommel
+#  Sander Pool
+#  Frederik Rouleau
+#  Markus Pfaff
+#
+# On command line:
+#
+# make all = Make software.
+#
+# make clean = Clean out built project files.
+#
+# make coff = Convert ELF to AVR COFF (for use with AVR Studio 3.x or VMLAB).
+#
+# make extcoff = Convert ELF to AVR Extended COFF (for use with AVR Studio
+#                4.07 or greater).
+#
+# make program = Download the hex file to the device, using avrdude.  Please
+#                customize the avrdude settings below first!
+#
+# make filename.s = Just compile filename.c into the assembler code only
+#
+# To rebuild project do "make clean" then "make all".
+#
+
+# mth 2004/09 
+# Differences from WinAVR 20040720 sample:
+# - DEPFLAGS according to Eric Weddingtion's fix (avrfreaks/gcc-forum)
+# - F_OSC Define in CFLAGS and AFLAGS
+
+
+# MCU name
+MCU = atmega48v
+
+# Main Oscillator Frequency
+# This is only used to define F_OSC in all assembler and c-sources.
+F_OSC = 8000000
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+# Target file name (without extension).
+TARGET = main
+
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = $(TARGET).c
+
+
+# List Assembler source files here.
+# Make them always end in a capital .S.  Files ending in a lowercase .s
+# will not be considered source files but generated files (assembler
+# output from the compiler), and will be deleted upon "make clean"!
+# Even though the DOS/Win* filesystem matches both .s and .S the same,
+# it will preserve the spelling of the filenames, and gcc itself does
+# care about how the name is spelled on its command-line.
+ASRC = 
+
+
+
+# Optimization level, can be [0, 1, 2, 3, s]. 
+# 0 = turn off optimization. s = optimize for size.
+# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+OPT = s
+
+# Debugging format.
+# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
+# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
+#DEBUG = stabs
+DEBUG = dwarf-2
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+EXTRAINCDIRS = 
+
+
+# Compiler flag to set the C Standard level.
+# c89   - "ANSI" C
+# gnu89 - c89 plus GCC extensions
+# c99   - ISO C99 standard (not yet fully implemented)
+# gnu99 - c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+# Place -D or -U options here
+CDEFS =
+
+# Place -I options here
+CINCS =
+
+
+# Compiler flags.
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT)
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+CFLAGS += -Wall -Wstrict-prototypes
+CFLAGS += -Wa,-adhlns=$(<:.c=.lst)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+CFLAGS += -DF_OSC=$(F_OSC)
+
+
+
+# Assembler flags.
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs 
+ASFLAGS += -DF_OSC=$(F_OSC)
+
+
+#Additional libraries.
+
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+PRINTF_LIB = 
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+SCANF_LIB = 
+
+MATH_LIB = -lm
+
+# External memory options
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+# Linker flags.
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+
+
+
+
+# Programming support using avrdude. Settings and variables.
+
+# Programming hardware: alf avr910 avrisp bascom bsd 
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+#AVRDUDE_PROGRAMMER = stk500
+AVRDUDE_PROGRAMMER = usbasp
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = usb    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude> 
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+# ---------------------------------------------------------------------------
+
+# Define directories, if needed.
+DIRAVR = c:/winavr
+DIRAVRBIN = $(DIRAVR)/bin
+DIRAVRUTILS = $(DIRAVR)/utils/bin
+DIRINC = .
+DIRLIB = $(DIRAVR)/avr/lib
+
+
+# Define programs and commands.
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+
+
+
+
+# Define Messages
+# English
+MSG_ERRORS_NONE = Errors: none
+MSG_BEGIN = -------- begin --------
+MSG_END = --------  end  --------
+MSG_SIZE_BEFORE = Size before: 
+MSG_SIZE_AFTER = Size after:
+MSG_COFF = Converting to AVR COFF:
+MSG_EXTENDED_COFF = Converting to AVR Extended COFF:
+MSG_FLASH = Creating load file for Flash:
+MSG_EEPROM = Creating load file for EEPROM:
+MSG_EXTENDED_LISTING = Creating Extended Listing:
+MSG_SYMBOL_TABLE = Creating Symbol Table:
+MSG_LINKING = Linking:
+MSG_COMPILING = Compiling:
+MSG_ASSEMBLING = Assembling:
+MSG_CLEANING = Cleaning project:
+
+
+
+
+# Define all object files.
+OBJ = $(SRC:.c=.o) $(ASRC:.S=.o) 
+
+# Define all listing files.
+LST = $(ASRC:.S=.lst) $(SRC:.c=.lst)
+
+
+# Compiler flags to generate dependency files.
+### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
+GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS)
+
+
+
+
+
+# Default target.
+#all: begin gccversion sizebefore build sizeafter finished end
+all: begin gccversion build size finished end
+
+build: elf hex eep lss sym
+
+elf: $(TARGET).elf
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss 
+sym: $(TARGET).sym
+
+
+
+# Eye candy.
+# AVR Studio 3.x does not check make's exit code but relies on
+# the following magic strings to be generated by the compile job.
+begin:
+	@echo
+	@echo $(MSG_BEGIN)
+
+finished:
+	@echo $(MSG_ERRORS_NONE)
+
+end:
+	@echo $(MSG_END)
+	@echo
+
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+sizebefore:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
+
+sizeafter:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
+
+size:
+	$(SIZE) -C --mcu=$(MCU) $(TARGET).elf
+
+# Display compiler version information.
+gccversion : 
+	@$(CC) --version
+
+
+
+# Program the device.  
+program: $(TARGET).hex $(TARGET).eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM)
+
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000 
+
+
+coff: $(TARGET).elf
+	@echo
+	@echo $(MSG_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	@echo
+	@echo $(MSG_EXTENDED_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+
+# Create final output files (.hex, .eep) from ELF output file.
+%.hex: %.elf
+	@echo
+	@echo $(MSG_FLASH) $@
+	$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+%.eep: %.elf
+	@echo
+	@echo $(MSG_EEPROM) $@
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+%.lss: %.elf
+	@echo
+	@echo $(MSG_EXTENDED_LISTING) $@
+	$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+%.sym: %.elf
+	@echo
+	@echo $(MSG_SYMBOL_TABLE) $@
+	$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+%.elf: $(OBJ)
+	@echo
+	@echo $(MSG_LINKING) $@
+	$(CC) $(ALL_CFLAGS) $(OBJ) --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+%.o : %.c
+	@echo
+	@echo $(MSG_COMPILING) $<
+	$(CC) -c $(ALL_CFLAGS) $< -o $@ 
+
+
+# Compile: create assembler files from C source files.
+%.s : %.c
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+%.o : %.S
+	@echo
+	@echo $(MSG_ASSEMBLING) $<
+	$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+
+
+# Target: clean project.
+clean: begin clean_list finished end
+
+clean_list :
+	@echo
+	@echo $(MSG_CLEANING)
+	$(REMOVE) $(TARGET).hex
+	$(REMOVE) $(TARGET).eep
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).cof
+	$(REMOVE) $(TARGET).elf
+	$(REMOVE) $(TARGET).map
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).a90
+	$(REMOVE) $(TARGET).sym
+	$(REMOVE) $(TARGET).lnk
+	$(REMOVE) $(TARGET).lss
+	$(REMOVE) $(OBJ)
+	$(REMOVE) $(LST)
+	$(REMOVE) $(SRC:.c=.s)
+	$(REMOVE) $(SRC:.c=.d)
+	$(REMOVE) .dep/*
+
+
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program
+ 
+
+ 
diff --git a/trunk/AVRProjects/00_C_Templates/ATTiny13/main.c b/trunk/AVRProjects/00_C_Templates/ATTiny13/main.c
new file mode 100644
index 00000000..d61dc466
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATTiny13/main.c
@@ -0,0 +1,26 @@
+/* ******************************************************** *
+ *
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016
+ * Author:		Paolo Iocco
+ * ******************************************************** */
+/* ******************************************************** *
+   ATtiny 13/45/85 Pin map
+                           +-\/-+
+         /Reset ADC0 PB5  1|o   |8  Vcc
+                ADC3 PB3  2|    |7  PB2 ADC1 SCK
+                ADC2 PB4  3|    |6  PB1 OC0B MISO AIN1
+                     GND  4|    |5  PB0 OC0A MOSI AIN0
+                           +----+
+* ******************************************************** */
+
+#include "main.h"
+
+int main (void)
+{
+    while(1)
+	{
+		// Enter your code here
+    }
+}
diff --git a/trunk/AVRProjects/00_C_Templates/ATTiny13/main.h b/trunk/AVRProjects/00_C_Templates/ATTiny13/main.h
new file mode 100644
index 00000000..8c42d94d
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATTiny13/main.h
@@ -0,0 +1,18 @@
+/* ******************************************************** *
+ *															*
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016									*
+ * Author:		Paolo Iocco									*	
+ * ******************************************************** */
+ 
+#ifndef MAIN_H_
+#define MAIN_H_
+
+#include <avr/io.h>
+
+#ifndef F_CPU
+#define F_CPU 9600000L
+#endif
+
+#endif /* MAIN_H_ */
diff --git a/trunk/AVRProjects/00_C_Templates/ATTiny13/makefile b/trunk/AVRProjects/00_C_Templates/ATTiny13/makefile
new file mode 100644
index 00000000..c1ba6d20
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATTiny13/makefile
@@ -0,0 +1,441 @@
+# Hey Emacs, this is a -*- makefile -*-
+#
+# WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al.
+# Released to the Public Domain
+# Please read the make user manual!
+#
+# Additional material for this makefile was submitted by:
+#  Tim Henigan
+#  Peter Fleury
+#  Reiner Patommel
+#  Sander Pool
+#  Frederik Rouleau
+#  Markus Pfaff
+#
+# On command line:
+#
+# make all = Make software.
+#
+# make clean = Clean out built project files.
+#
+# make coff = Convert ELF to AVR COFF (for use with AVR Studio 3.x or VMLAB).
+#
+# make extcoff = Convert ELF to AVR Extended COFF (for use with AVR Studio
+#                4.07 or greater).
+#
+# make program = Download the hex file to the device, using avrdude.  Please
+#                customize the avrdude settings below first!
+#
+# make filename.s = Just compile filename.c into the assembler code only
+#
+# To rebuild project do "make clean" then "make all".
+#
+
+# mth 2004/09
+# Differences from WinAVR 20040720 sample:
+# - DEPFLAGS according to Eric Weddingtion's fix (avrfreaks/gcc-forum)
+# - F_OSC Define in CFLAGS and AFLAGS
+
+
+# MCU name
+MCU = attiny13
+
+# Main Oscillator Frequency
+# This is only used to define F_OSC in all assembler and c-sources.
+#F_OSC = 9600000
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+# Target file name (without extension).
+TARGET = main
+
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = $(TARGET).c
+
+
+# List Assembler source files here.
+# Make them always end in a capital .S.  Files ending in a lowercase .s
+# will not be considered source files but generated files (assembler
+# output from the compiler), and will be deleted upon "make clean"!
+# Even though the DOS/Win* filesystem matches both .s and .S the same,
+# it will preserve the spelling of the filenames, and gcc itself does
+# care about how the name is spelled on its command-line.
+ASRC =
+
+
+
+# Optimization level, can be [0, 1, 2, 3, s].
+# 0 = turn off optimization. s = optimize for size.
+# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+OPT = s
+
+# Debugging format.
+# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
+# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
+#DEBUG = stabs
+DEBUG = dwarf-2
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+EXTRAINCDIRS =
+
+
+# Compiler flag to set the C Standard level.
+# c89   - "ANSI" C
+# gnu89 - c89 plus GCC extensions
+# c99   - ISO C99 standard (not yet fully implemented)
+# gnu99 - c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+# Place -D or -U options here
+CDEFS =
+
+# Place -I options here
+CINCS =
+
+
+# Compiler flags.
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT)
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+CFLAGS += -Wall -Wstrict-prototypes
+CFLAGS += -Wa,-adhlns=$(<:.c=.lst)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+CFLAGS += -DF_OSC=$(F_OSC)
+
+
+
+# Assembler flags.
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs
+ASFLAGS += -DF_OSC=$(F_OSC)
+
+
+#Additional libraries.
+
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+PRINTF_LIB =
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+SCANF_LIB =
+
+MATH_LIB = -lm
+
+# External memory options
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+# Linker flags.
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+
+
+
+
+# Programming support using avrdude. Settings and variables.
+
+# Programming hardware: alf avr910 avrisp bascom bsd
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+#AVRDUDE_PROGRAMMER = stk500
+AVRDUDE_PROGRAMMER = usbasp
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = usb    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude>
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+# ---------------------------------------------------------------------------
+
+# Define directories, if needed.
+DIRAVR = c:/winavr
+DIRAVRBIN = $(DIRAVR)/bin
+DIRAVRUTILS = $(DIRAVR)/utils/bin
+DIRINC = .
+DIRLIB = $(DIRAVR)/avr/lib
+
+
+# Define programs and commands.
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+
+
+
+
+# Define Messages
+# English
+MSG_ERRORS_NONE = Errors: none
+MSG_BEGIN = -------- begin --------
+MSG_END = --------  end  --------
+MSG_SIZE_BEFORE = Size before:
+MSG_SIZE_AFTER = Size after:
+MSG_COFF = Converting to AVR COFF:
+MSG_EXTENDED_COFF = Converting to AVR Extended COFF:
+MSG_FLASH = Creating load file for Flash:
+MSG_EEPROM = Creating load file for EEPROM:
+MSG_EXTENDED_LISTING = Creating Extended Listing:
+MSG_SYMBOL_TABLE = Creating Symbol Table:
+MSG_LINKING = Linking:
+MSG_COMPILING = Compiling:
+MSG_ASSEMBLING = Assembling:
+MSG_CLEANING = Cleaning project:
+
+
+
+
+# Define all object files.
+OBJ = $(SRC:.c=.o) $(ASRC:.S=.o)
+
+# Define all listing files.
+LST = $(ASRC:.S=.lst) $(SRC:.c=.lst)
+
+
+# Compiler flags to generate dependency files.
+### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
+GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS)
+
+
+
+
+
+# Default target.
+#all: begin gccversion sizebefore build sizeafter finished end
+all: begin gccversion build size finished end
+
+build: elf hex eep lss sym
+
+elf: $(TARGET).elf
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss
+sym: $(TARGET).sym
+
+
+
+# Eye candy.
+# AVR Studio 3.x does not check make's exit code but relies on
+# the following magic strings to be generated by the compile job.
+begin:
+	@echo
+	@echo $(MSG_BEGIN)
+
+finished:
+	@echo $(MSG_ERRORS_NONE)
+
+end:
+	@echo $(MSG_END)
+	@echo
+
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+sizebefore:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
+
+sizeafter:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
+
+size:
+	$(SIZE) -C --mcu=$(MCU) $(TARGET).elf
+
+# Display compiler version information.
+gccversion :
+	@$(CC) --version
+
+
+
+# Program the device.
+program: $(TARGET).hex $(TARGET).eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM)
+
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000
+
+
+coff: $(TARGET).elf
+	@echo
+	@echo $(MSG_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	@echo
+	@echo $(MSG_EXTENDED_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+
+# Create final output files (.hex, .eep) from ELF output file.
+%.hex: %.elf
+	@echo
+	@echo $(MSG_FLASH) $@
+	$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+%.eep: %.elf
+	@echo
+	@echo $(MSG_EEPROM) $@
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+%.lss: %.elf
+	@echo
+	@echo $(MSG_EXTENDED_LISTING) $@
+	$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+%.sym: %.elf
+	@echo
+	@echo $(MSG_SYMBOL_TABLE) $@
+	$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+%.elf: $(OBJ)
+	@echo
+	@echo $(MSG_LINKING) $@
+	$(CC) $(ALL_CFLAGS) $(OBJ) --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+%.o : %.c
+	@echo
+	@echo $(MSG_COMPILING) $<
+	$(CC) -c $(ALL_CFLAGS) $< -o $@
+
+
+# Compile: create assembler files from C source files.
+%.s : %.c
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+%.o : %.S
+	@echo
+	@echo $(MSG_ASSEMBLING) $<
+	$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+
+
+# Target: clean project.
+clean: begin clean_list finished end
+
+clean_list :
+	@echo
+	@echo $(MSG_CLEANING)
+	$(REMOVE) $(TARGET).hex
+	$(REMOVE) $(TARGET).eep
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).cof
+	$(REMOVE) $(TARGET).elf
+	$(REMOVE) $(TARGET).map
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).a90
+	$(REMOVE) $(TARGET).sym
+	$(REMOVE) $(TARGET).lnk
+	$(REMOVE) $(TARGET).lss
+	$(REMOVE) $(OBJ)
+	$(REMOVE) $(LST)
+	$(REMOVE) $(SRC:.c=.s)
+	$(REMOVE) $(SRC:.c=.d)
+	$(REMOVE) .dep/*
+
+
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program
+
+
+
diff --git a/trunk/AVRProjects/00_C_Templates/ATTiny2313/main.c b/trunk/AVRProjects/00_C_Templates/ATTiny2313/main.c
new file mode 100644
index 00000000..1e754d67
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATTiny2313/main.c
@@ -0,0 +1,34 @@
+/* ******************************************************** *
+ *															*
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016									*
+ * Author:		Paolo Iocco									*	
+ * ******************************************************** */
+/* ******************************************************** *
+   ATtiny 2313/4313 Pin map
+                           +-\/-+
+              /Reset PA2  1|o   |20  Vcc
+                 RXD PD0  2|    |19  PB7 SCK
+                 TXD PD1  3|    |18  PB6 MISO
+                     PA1  4|    |17  PB5 MOSI
+					 PA0  5|    |16  PB4 OC1B
+					 PD2  6|    |15  PB3 OC1A
+					 PD3  7|    |14  PB2 OC0A
+					 PD4  8|    |13  PB1 AIN1
+				OC0B PD5  9|    |12  PB0 AIN0
+					 GND 10|    |11  PD6 
+					       +----+
+* ******************************************************** */
+
+#include "main.h"
+
+int main (void)
+{
+    while(1)
+	{
+		// Enter your code here
+    }
+	return(0);
+}
+
diff --git a/trunk/AVRProjects/00_C_Templates/ATTiny2313/main.h b/trunk/AVRProjects/00_C_Templates/ATTiny2313/main.h
new file mode 100644
index 00000000..6e53eb8a
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATTiny2313/main.h
@@ -0,0 +1,18 @@
+/* ******************************************************** *
+ *															*
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016									*
+ * Author:		Paolo Iocco									*	
+ * ******************************************************** */
+ 
+#ifndef MAIN_H_
+#define MAIN_H_
+
+#include <avr/io.h>
+
+#ifndef F_CPU
+#define F_CPU 1000000L
+#endif
+
+#endif /* MAIN_H_ */
diff --git a/trunk/AVRProjects/00_C_Templates/ATTiny2313/makefile b/trunk/AVRProjects/00_C_Templates/ATTiny2313/makefile
new file mode 100644
index 00000000..d3d8993d
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATTiny2313/makefile
@@ -0,0 +1,441 @@
+# Hey Emacs, this is a -*- makefile -*-
+#
+# WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al.
+# Released to the Public Domain
+# Please read the make user manual!
+#
+# Additional material for this makefile was submitted by:
+#  Tim Henigan
+#  Peter Fleury
+#  Reiner Patommel
+#  Sander Pool
+#  Frederik Rouleau
+#  Markus Pfaff
+#
+# On command line:
+#
+# make all = Make software.
+#
+# make clean = Clean out built project files.
+#
+# make coff = Convert ELF to AVR COFF (for use with AVR Studio 3.x or VMLAB).
+#
+# make extcoff = Convert ELF to AVR Extended COFF (for use with AVR Studio
+#                4.07 or greater).
+#
+# make program = Download the hex file to the device, using avrdude.  Please
+#                customize the avrdude settings below first!
+#
+# make filename.s = Just compile filename.c into the assembler code only
+#
+# To rebuild project do "make clean" then "make all".
+#
+
+# mth 2004/09 
+# Differences from WinAVR 20040720 sample:
+# - DEPFLAGS according to Eric Weddingtion's fix (avrfreaks/gcc-forum)
+# - F_OSC Define in CFLAGS and AFLAGS
+
+
+# MCU name
+MCU = attiny2313
+
+# Main Oscillator Frequency
+# This is only used to define F_OSC in all assembler and c-sources.
+F_OSC = 1000000
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+# Target file name (without extension).
+TARGET = main
+
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = $(TARGET).c
+
+
+# List Assembler source files here.
+# Make them always end in a capital .S.  Files ending in a lowercase .s
+# will not be considered source files but generated files (assembler
+# output from the compiler), and will be deleted upon "make clean"!
+# Even though the DOS/Win* filesystem matches both .s and .S the same,
+# it will preserve the spelling of the filenames, and gcc itself does
+# care about how the name is spelled on its command-line.
+ASRC = 
+
+
+
+# Optimization level, can be [0, 1, 2, 3, s]. 
+# 0 = turn off optimization. s = optimize for size.
+# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+OPT = s
+
+# Debugging format.
+# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
+# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
+#DEBUG = stabs
+DEBUG = dwarf-2
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+EXTRAINCDIRS = 
+
+
+# Compiler flag to set the C Standard level.
+# c89   - "ANSI" C
+# gnu89 - c89 plus GCC extensions
+# c99   - ISO C99 standard (not yet fully implemented)
+# gnu99 - c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+# Place -D or -U options here
+CDEFS =
+
+# Place -I options here
+CINCS =
+
+
+# Compiler flags.
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT)
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+CFLAGS += -Wall -Wstrict-prototypes
+CFLAGS += -Wa,-adhlns=$(<:.c=.lst)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+CFLAGS += -DF_OSC=$(F_OSC)
+
+
+
+# Assembler flags.
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs 
+ASFLAGS += -DF_OSC=$(F_OSC)
+
+
+#Additional libraries.
+
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+PRINTF_LIB = 
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+SCANF_LIB = 
+
+MATH_LIB = -lm
+
+# External memory options
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+# Linker flags.
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+
+
+
+
+# Programming support using avrdude. Settings and variables.
+
+# Programming hardware: alf avr910 avrisp bascom bsd 
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+#AVRDUDE_PROGRAMMER = stk500
+AVRDUDE_PROGRAMMER = usbasp
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = usb    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude> 
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+# ---------------------------------------------------------------------------
+
+# Define directories, if needed.
+DIRAVR = c:/winavr
+DIRAVRBIN = $(DIRAVR)/bin
+DIRAVRUTILS = $(DIRAVR)/utils/bin
+DIRINC = .
+DIRLIB = $(DIRAVR)/avr/lib
+
+
+# Define programs and commands.
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+
+
+
+
+# Define Messages
+# English
+MSG_ERRORS_NONE = Errors: none
+MSG_BEGIN = -------- begin --------
+MSG_END = --------  end  --------
+MSG_SIZE_BEFORE = Size before: 
+MSG_SIZE_AFTER = Size after:
+MSG_COFF = Converting to AVR COFF:
+MSG_EXTENDED_COFF = Converting to AVR Extended COFF:
+MSG_FLASH = Creating load file for Flash:
+MSG_EEPROM = Creating load file for EEPROM:
+MSG_EXTENDED_LISTING = Creating Extended Listing:
+MSG_SYMBOL_TABLE = Creating Symbol Table:
+MSG_LINKING = Linking:
+MSG_COMPILING = Compiling:
+MSG_ASSEMBLING = Assembling:
+MSG_CLEANING = Cleaning project:
+
+
+
+
+# Define all object files.
+OBJ = $(SRC:.c=.o) $(ASRC:.S=.o) 
+
+# Define all listing files.
+LST = $(ASRC:.S=.lst) $(SRC:.c=.lst)
+
+
+# Compiler flags to generate dependency files.
+### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
+GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS)
+
+
+
+
+
+# Default target.
+#all: begin gccversion sizebefore build sizeafter finished end
+all: begin gccversion build size finished end
+
+build: elf hex eep lss sym
+
+elf: $(TARGET).elf
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss 
+sym: $(TARGET).sym
+
+
+
+# Eye candy.
+# AVR Studio 3.x does not check make's exit code but relies on
+# the following magic strings to be generated by the compile job.
+begin:
+	@echo
+	@echo $(MSG_BEGIN)
+
+finished:
+	@echo $(MSG_ERRORS_NONE)
+
+end:
+	@echo $(MSG_END)
+	@echo
+
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+sizebefore:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
+
+sizeafter:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
+
+size:
+	$(SIZE) -C --mcu=$(MCU) $(TARGET).elf
+
+# Display compiler version information.
+gccversion : 
+	@$(CC) --version
+
+
+
+# Program the device.  
+program: $(TARGET).hex $(TARGET).eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM)
+
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000 
+
+
+coff: $(TARGET).elf
+	@echo
+	@echo $(MSG_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	@echo
+	@echo $(MSG_EXTENDED_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+
+# Create final output files (.hex, .eep) from ELF output file.
+%.hex: %.elf
+	@echo
+	@echo $(MSG_FLASH) $@
+	$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+%.eep: %.elf
+	@echo
+	@echo $(MSG_EEPROM) $@
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+%.lss: %.elf
+	@echo
+	@echo $(MSG_EXTENDED_LISTING) $@
+	$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+%.sym: %.elf
+	@echo
+	@echo $(MSG_SYMBOL_TABLE) $@
+	$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+%.elf: $(OBJ)
+	@echo
+	@echo $(MSG_LINKING) $@
+	$(CC) $(ALL_CFLAGS) $(OBJ) --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+%.o : %.c
+	@echo
+	@echo $(MSG_COMPILING) $<
+	$(CC) -c $(ALL_CFLAGS) $< -o $@ 
+
+
+# Compile: create assembler files from C source files.
+%.s : %.c
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+%.o : %.S
+	@echo
+	@echo $(MSG_ASSEMBLING) $<
+	$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+
+
+# Target: clean project.
+clean: begin clean_list finished end
+
+clean_list :
+	@echo
+	@echo $(MSG_CLEANING)
+	$(REMOVE) $(TARGET).hex
+	$(REMOVE) $(TARGET).eep
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).cof
+	$(REMOVE) $(TARGET).elf
+	$(REMOVE) $(TARGET).map
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).a90
+	$(REMOVE) $(TARGET).sym
+	$(REMOVE) $(TARGET).lnk
+	$(REMOVE) $(TARGET).lss
+	$(REMOVE) $(OBJ)
+	$(REMOVE) $(LST)
+	$(REMOVE) $(SRC:.c=.s)
+	$(REMOVE) $(SRC:.c=.d)
+	$(REMOVE) .dep/*
+
+
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program
+ 
+
+ 
diff --git a/trunk/AVRProjects/00_C_Templates/ATTiny45/main.c b/trunk/AVRProjects/00_C_Templates/ATTiny45/main.c
new file mode 100644
index 00000000..d61dc466
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATTiny45/main.c
@@ -0,0 +1,26 @@
+/* ******************************************************** *
+ *
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016
+ * Author:		Paolo Iocco
+ * ******************************************************** */
+/* ******************************************************** *
+   ATtiny 13/45/85 Pin map
+                           +-\/-+
+         /Reset ADC0 PB5  1|o   |8  Vcc
+                ADC3 PB3  2|    |7  PB2 ADC1 SCK
+                ADC2 PB4  3|    |6  PB1 OC0B MISO AIN1
+                     GND  4|    |5  PB0 OC0A MOSI AIN0
+                           +----+
+* ******************************************************** */
+
+#include "main.h"
+
+int main (void)
+{
+    while(1)
+	{
+		// Enter your code here
+    }
+}
diff --git a/trunk/AVRProjects/00_C_Templates/ATTiny45/main.h b/trunk/AVRProjects/00_C_Templates/ATTiny45/main.h
new file mode 100644
index 00000000..8c42d94d
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATTiny45/main.h
@@ -0,0 +1,18 @@
+/* ******************************************************** *
+ *															*
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016									*
+ * Author:		Paolo Iocco									*	
+ * ******************************************************** */
+ 
+#ifndef MAIN_H_
+#define MAIN_H_
+
+#include <avr/io.h>
+
+#ifndef F_CPU
+#define F_CPU 9600000L
+#endif
+
+#endif /* MAIN_H_ */
diff --git a/trunk/AVRProjects/00_C_Templates/ATTiny45/makefile b/trunk/AVRProjects/00_C_Templates/ATTiny45/makefile
new file mode 100644
index 00000000..c1d15a4c
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATTiny45/makefile
@@ -0,0 +1,441 @@
+# Hey Emacs, this is a -*- makefile -*-
+#
+# WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al.
+# Released to the Public Domain
+# Please read the make user manual!
+#
+# Additional material for this makefile was submitted by:
+#  Tim Henigan
+#  Peter Fleury
+#  Reiner Patommel
+#  Sander Pool
+#  Frederik Rouleau
+#  Markus Pfaff
+#
+# On command line:
+#
+# make all = Make software.
+#
+# make clean = Clean out built project files.
+#
+# make coff = Convert ELF to AVR COFF (for use with AVR Studio 3.x or VMLAB).
+#
+# make extcoff = Convert ELF to AVR Extended COFF (for use with AVR Studio
+#                4.07 or greater).
+#
+# make program = Download the hex file to the device, using avrdude.  Please
+#                customize the avrdude settings below first!
+#
+# make filename.s = Just compile filename.c into the assembler code only
+#
+# To rebuild project do "make clean" then "make all".
+#
+
+# mth 2004/09
+# Differences from WinAVR 20040720 sample:
+# - DEPFLAGS according to Eric Weddingtion's fix (avrfreaks/gcc-forum)
+# - F_OSC Define in CFLAGS and AFLAGS
+
+
+# MCU name
+MCU = attiny45
+
+# Main Oscillator Frequency
+# This is only used to define F_OSC in all assembler and c-sources.
+#F_OSC = 9600000
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+# Target file name (without extension).
+TARGET = main
+
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = $(TARGET).c
+
+
+# List Assembler source files here.
+# Make them always end in a capital .S.  Files ending in a lowercase .s
+# will not be considered source files but generated files (assembler
+# output from the compiler), and will be deleted upon "make clean"!
+# Even though the DOS/Win* filesystem matches both .s and .S the same,
+# it will preserve the spelling of the filenames, and gcc itself does
+# care about how the name is spelled on its command-line.
+ASRC =
+
+
+
+# Optimization level, can be [0, 1, 2, 3, s].
+# 0 = turn off optimization. s = optimize for size.
+# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+OPT = s
+
+# Debugging format.
+# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
+# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
+#DEBUG = stabs
+DEBUG = dwarf-2
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+EXTRAINCDIRS =
+
+
+# Compiler flag to set the C Standard level.
+# c89   - "ANSI" C
+# gnu89 - c89 plus GCC extensions
+# c99   - ISO C99 standard (not yet fully implemented)
+# gnu99 - c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+# Place -D or -U options here
+CDEFS =
+
+# Place -I options here
+CINCS =
+
+
+# Compiler flags.
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT)
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+CFLAGS += -Wall -Wstrict-prototypes
+CFLAGS += -Wa,-adhlns=$(<:.c=.lst)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+CFLAGS += -DF_OSC=$(F_OSC)
+
+
+
+# Assembler flags.
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs
+ASFLAGS += -DF_OSC=$(F_OSC)
+
+
+#Additional libraries.
+
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+PRINTF_LIB =
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+SCANF_LIB =
+
+MATH_LIB = -lm
+
+# External memory options
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+# Linker flags.
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+
+
+
+
+# Programming support using avrdude. Settings and variables.
+
+# Programming hardware: alf avr910 avrisp bascom bsd
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+#AVRDUDE_PROGRAMMER = stk500
+AVRDUDE_PROGRAMMER = usbasp
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = usb    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude>
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+# ---------------------------------------------------------------------------
+
+# Define directories, if needed.
+DIRAVR = c:/winavr
+DIRAVRBIN = $(DIRAVR)/bin
+DIRAVRUTILS = $(DIRAVR)/utils/bin
+DIRINC = .
+DIRLIB = $(DIRAVR)/avr/lib
+
+
+# Define programs and commands.
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+
+
+
+
+# Define Messages
+# English
+MSG_ERRORS_NONE = Errors: none
+MSG_BEGIN = -------- begin --------
+MSG_END = --------  end  --------
+MSG_SIZE_BEFORE = Size before:
+MSG_SIZE_AFTER = Size after:
+MSG_COFF = Converting to AVR COFF:
+MSG_EXTENDED_COFF = Converting to AVR Extended COFF:
+MSG_FLASH = Creating load file for Flash:
+MSG_EEPROM = Creating load file for EEPROM:
+MSG_EXTENDED_LISTING = Creating Extended Listing:
+MSG_SYMBOL_TABLE = Creating Symbol Table:
+MSG_LINKING = Linking:
+MSG_COMPILING = Compiling:
+MSG_ASSEMBLING = Assembling:
+MSG_CLEANING = Cleaning project:
+
+
+
+
+# Define all object files.
+OBJ = $(SRC:.c=.o) $(ASRC:.S=.o)
+
+# Define all listing files.
+LST = $(ASRC:.S=.lst) $(SRC:.c=.lst)
+
+
+# Compiler flags to generate dependency files.
+### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
+GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS)
+
+
+
+
+
+# Default target.
+#all: begin gccversion sizebefore build sizeafter finished end
+all: begin gccversion build size finished end
+
+build: elf hex eep lss sym
+
+elf: $(TARGET).elf
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss
+sym: $(TARGET).sym
+
+
+
+# Eye candy.
+# AVR Studio 3.x does not check make's exit code but relies on
+# the following magic strings to be generated by the compile job.
+begin:
+	@echo
+	@echo $(MSG_BEGIN)
+
+finished:
+	@echo $(MSG_ERRORS_NONE)
+
+end:
+	@echo $(MSG_END)
+	@echo
+
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+sizebefore:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
+
+sizeafter:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
+
+size:
+	$(SIZE) -C --mcu=$(MCU) $(TARGET).elf
+
+# Display compiler version information.
+gccversion :
+	@$(CC) --version
+
+
+
+# Program the device.
+program: $(TARGET).hex $(TARGET).eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM)
+
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000
+
+
+coff: $(TARGET).elf
+	@echo
+	@echo $(MSG_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	@echo
+	@echo $(MSG_EXTENDED_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+
+# Create final output files (.hex, .eep) from ELF output file.
+%.hex: %.elf
+	@echo
+	@echo $(MSG_FLASH) $@
+	$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+%.eep: %.elf
+	@echo
+	@echo $(MSG_EEPROM) $@
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+%.lss: %.elf
+	@echo
+	@echo $(MSG_EXTENDED_LISTING) $@
+	$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+%.sym: %.elf
+	@echo
+	@echo $(MSG_SYMBOL_TABLE) $@
+	$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+%.elf: $(OBJ)
+	@echo
+	@echo $(MSG_LINKING) $@
+	$(CC) $(ALL_CFLAGS) $(OBJ) --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+%.o : %.c
+	@echo
+	@echo $(MSG_COMPILING) $<
+	$(CC) -c $(ALL_CFLAGS) $< -o $@
+
+
+# Compile: create assembler files from C source files.
+%.s : %.c
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+%.o : %.S
+	@echo
+	@echo $(MSG_ASSEMBLING) $<
+	$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+
+
+# Target: clean project.
+clean: begin clean_list finished end
+
+clean_list :
+	@echo
+	@echo $(MSG_CLEANING)
+	$(REMOVE) $(TARGET).hex
+	$(REMOVE) $(TARGET).eep
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).cof
+	$(REMOVE) $(TARGET).elf
+	$(REMOVE) $(TARGET).map
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).a90
+	$(REMOVE) $(TARGET).sym
+	$(REMOVE) $(TARGET).lnk
+	$(REMOVE) $(TARGET).lss
+	$(REMOVE) $(OBJ)
+	$(REMOVE) $(LST)
+	$(REMOVE) $(SRC:.c=.s)
+	$(REMOVE) $(SRC:.c=.d)
+	$(REMOVE) .dep/*
+
+
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program
+
+
+
diff --git a/trunk/AVRProjects/00_C_Templates/ATTiny84/main.c b/trunk/AVRProjects/00_C_Templates/ATTiny84/main.c
new file mode 100644
index 00000000..af17c560
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATTiny84/main.c
@@ -0,0 +1,31 @@
+/* ******************************************************** *
+ *
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016
+ * Author:		Paolo Iocco
+ * ******************************************************** */
+/* ******************************************************** *
+   ATtiny 84 Pin map
+                           +-\/-+
+                     GND  1|o   |14  GND
+                     PB0  2|    |13  PA0 ADC0
+                     PB1  3|    |12  PA1 ADC1
+              /Reset PB3  4|    |11  PA2 ADC2
+			         PB2  5|    |10  PA3 ADC3
+				ADC7 PA7  6|    |9   PA4 ADC4 SCK
+		   MOSI ADC6 PA6  7|    |8   PA5 ADC5 MISO
+                           +----+
+* ******************************************************** */
+
+#include "main.h"
+
+int main (void)
+{
+    while(1)
+	{
+		// Enter your code here
+    }
+	return(0);
+}
+
diff --git a/trunk/AVRProjects/00_C_Templates/ATTiny84/main.h b/trunk/AVRProjects/00_C_Templates/ATTiny84/main.h
new file mode 100644
index 00000000..6e53eb8a
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATTiny84/main.h
@@ -0,0 +1,18 @@
+/* ******************************************************** *
+ *															*
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016									*
+ * Author:		Paolo Iocco									*	
+ * ******************************************************** */
+ 
+#ifndef MAIN_H_
+#define MAIN_H_
+
+#include <avr/io.h>
+
+#ifndef F_CPU
+#define F_CPU 1000000L
+#endif
+
+#endif /* MAIN_H_ */
diff --git a/trunk/AVRProjects/00_C_Templates/ATTiny84/makefile b/trunk/AVRProjects/00_C_Templates/ATTiny84/makefile
new file mode 100644
index 00000000..44d9bf30
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATTiny84/makefile
@@ -0,0 +1,441 @@
+# Hey Emacs, this is a -*- makefile -*-
+#
+# WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al.
+# Released to the Public Domain
+# Please read the make user manual!
+#
+# Additional material for this makefile was submitted by:
+#  Tim Henigan
+#  Peter Fleury
+#  Reiner Patommel
+#  Sander Pool
+#  Frederik Rouleau
+#  Markus Pfaff
+#
+# On command line:
+#
+# make all = Make software.
+#
+# make clean = Clean out built project files.
+#
+# make coff = Convert ELF to AVR COFF (for use with AVR Studio 3.x or VMLAB).
+#
+# make extcoff = Convert ELF to AVR Extended COFF (for use with AVR Studio
+#                4.07 or greater).
+#
+# make program = Download the hex file to the device, using avrdude.  Please
+#                customize the avrdude settings below first!
+#
+# make filename.s = Just compile filename.c into the assembler code only
+#
+# To rebuild project do "make clean" then "make all".
+#
+
+# mth 2004/09
+# Differences from WinAVR 20040720 sample:
+# - DEPFLAGS according to Eric Weddingtion's fix (avrfreaks/gcc-forum)
+# - F_OSC Define in CFLAGS and AFLAGS
+
+
+# MCU name
+MCU = attiny84
+
+# Main Oscillator Frequency
+# This is only used to define F_OSC in all assembler and c-sources.
+#F_OSC = 9600000
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+# Target file name (without extension).
+TARGET = main
+
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = $(TARGET).c
+
+
+# List Assembler source files here.
+# Make them always end in a capital .S.  Files ending in a lowercase .s
+# will not be considered source files but generated files (assembler
+# output from the compiler), and will be deleted upon "make clean"!
+# Even though the DOS/Win* filesystem matches both .s and .S the same,
+# it will preserve the spelling of the filenames, and gcc itself does
+# care about how the name is spelled on its command-line.
+ASRC =
+
+
+
+# Optimization level, can be [0, 1, 2, 3, s].
+# 0 = turn off optimization. s = optimize for size.
+# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+OPT = s
+
+# Debugging format.
+# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
+# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
+#DEBUG = stabs
+DEBUG = dwarf-2
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+EXTRAINCDIRS =
+
+
+# Compiler flag to set the C Standard level.
+# c89   - "ANSI" C
+# gnu89 - c89 plus GCC extensions
+# c99   - ISO C99 standard (not yet fully implemented)
+# gnu99 - c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+# Place -D or -U options here
+CDEFS =
+
+# Place -I options here
+CINCS =
+
+
+# Compiler flags.
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT)
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+CFLAGS += -Wall -Wstrict-prototypes
+CFLAGS += -Wa,-adhlns=$(<:.c=.lst)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+CFLAGS += -DF_OSC=$(F_OSC)
+
+
+
+# Assembler flags.
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs
+ASFLAGS += -DF_OSC=$(F_OSC)
+
+
+#Additional libraries.
+
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+PRINTF_LIB =
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+SCANF_LIB =
+
+MATH_LIB = -lm
+
+# External memory options
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+# Linker flags.
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+
+
+
+
+# Programming support using avrdude. Settings and variables.
+
+# Programming hardware: alf avr910 avrisp bascom bsd
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+#AVRDUDE_PROGRAMMER = stk500
+AVRDUDE_PROGRAMMER = usbasp
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = usb    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude>
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+# ---------------------------------------------------------------------------
+
+# Define directories, if needed.
+DIRAVR = c:/winavr
+DIRAVRBIN = $(DIRAVR)/bin
+DIRAVRUTILS = $(DIRAVR)/utils/bin
+DIRINC = .
+DIRLIB = $(DIRAVR)/avr/lib
+
+
+# Define programs and commands.
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+
+
+
+
+# Define Messages
+# English
+MSG_ERRORS_NONE = Errors: none
+MSG_BEGIN = -------- begin --------
+MSG_END = --------  end  --------
+MSG_SIZE_BEFORE = Size before:
+MSG_SIZE_AFTER = Size after:
+MSG_COFF = Converting to AVR COFF:
+MSG_EXTENDED_COFF = Converting to AVR Extended COFF:
+MSG_FLASH = Creating load file for Flash:
+MSG_EEPROM = Creating load file for EEPROM:
+MSG_EXTENDED_LISTING = Creating Extended Listing:
+MSG_SYMBOL_TABLE = Creating Symbol Table:
+MSG_LINKING = Linking:
+MSG_COMPILING = Compiling:
+MSG_ASSEMBLING = Assembling:
+MSG_CLEANING = Cleaning project:
+
+
+
+
+# Define all object files.
+OBJ = $(SRC:.c=.o) $(ASRC:.S=.o)
+
+# Define all listing files.
+LST = $(ASRC:.S=.lst) $(SRC:.c=.lst)
+
+
+# Compiler flags to generate dependency files.
+### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
+GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS)
+
+
+
+
+
+# Default target.
+#all: begin gccversion sizebefore build sizeafter finished end
+all: begin gccversion build size finished end
+
+build: elf hex eep lss sym
+
+elf: $(TARGET).elf
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss
+sym: $(TARGET).sym
+
+
+
+# Eye candy.
+# AVR Studio 3.x does not check make's exit code but relies on
+# the following magic strings to be generated by the compile job.
+begin:
+	@echo
+	@echo $(MSG_BEGIN)
+
+finished:
+	@echo $(MSG_ERRORS_NONE)
+
+end:
+	@echo $(MSG_END)
+	@echo
+
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+sizebefore:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
+
+sizeafter:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
+
+size:
+	$(SIZE) -C --mcu=$(MCU) $(TARGET).elf
+
+# Display compiler version information.
+gccversion :
+	@$(CC) --version
+
+
+
+# Program the device.
+program: $(TARGET).hex $(TARGET).eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM)
+
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000
+
+
+coff: $(TARGET).elf
+	@echo
+	@echo $(MSG_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	@echo
+	@echo $(MSG_EXTENDED_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+
+# Create final output files (.hex, .eep) from ELF output file.
+%.hex: %.elf
+	@echo
+	@echo $(MSG_FLASH) $@
+	$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+%.eep: %.elf
+	@echo
+	@echo $(MSG_EEPROM) $@
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+%.lss: %.elf
+	@echo
+	@echo $(MSG_EXTENDED_LISTING) $@
+	$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+%.sym: %.elf
+	@echo
+	@echo $(MSG_SYMBOL_TABLE) $@
+	$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+%.elf: $(OBJ)
+	@echo
+	@echo $(MSG_LINKING) $@
+	$(CC) $(ALL_CFLAGS) $(OBJ) --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+%.o : %.c
+	@echo
+	@echo $(MSG_COMPILING) $<
+	$(CC) -c $(ALL_CFLAGS) $< -o $@
+
+
+# Compile: create assembler files from C source files.
+%.s : %.c
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+%.o : %.S
+	@echo
+	@echo $(MSG_ASSEMBLING) $<
+	$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+
+
+# Target: clean project.
+clean: begin clean_list finished end
+
+clean_list :
+	@echo
+	@echo $(MSG_CLEANING)
+	$(REMOVE) $(TARGET).hex
+	$(REMOVE) $(TARGET).eep
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).cof
+	$(REMOVE) $(TARGET).elf
+	$(REMOVE) $(TARGET).map
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).a90
+	$(REMOVE) $(TARGET).sym
+	$(REMOVE) $(TARGET).lnk
+	$(REMOVE) $(TARGET).lss
+	$(REMOVE) $(OBJ)
+	$(REMOVE) $(LST)
+	$(REMOVE) $(SRC:.c=.s)
+	$(REMOVE) $(SRC:.c=.d)
+	$(REMOVE) .dep/*
+
+
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program
+
+
+
diff --git a/trunk/AVRProjects/00_C_Templates/ATTiny85/main.c b/trunk/AVRProjects/00_C_Templates/ATTiny85/main.c
new file mode 100644
index 00000000..d61dc466
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATTiny85/main.c
@@ -0,0 +1,26 @@
+/* ******************************************************** *
+ *
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016
+ * Author:		Paolo Iocco
+ * ******************************************************** */
+/* ******************************************************** *
+   ATtiny 13/45/85 Pin map
+                           +-\/-+
+         /Reset ADC0 PB5  1|o   |8  Vcc
+                ADC3 PB3  2|    |7  PB2 ADC1 SCK
+                ADC2 PB4  3|    |6  PB1 OC0B MISO AIN1
+                     GND  4|    |5  PB0 OC0A MOSI AIN0
+                           +----+
+* ******************************************************** */
+
+#include "main.h"
+
+int main (void)
+{
+    while(1)
+	{
+		// Enter your code here
+    }
+}
diff --git a/trunk/AVRProjects/00_C_Templates/ATTiny85/main.h b/trunk/AVRProjects/00_C_Templates/ATTiny85/main.h
new file mode 100644
index 00000000..8c42d94d
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATTiny85/main.h
@@ -0,0 +1,18 @@
+/* ******************************************************** *
+ *															*
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016									*
+ * Author:		Paolo Iocco									*	
+ * ******************************************************** */
+ 
+#ifndef MAIN_H_
+#define MAIN_H_
+
+#include <avr/io.h>
+
+#ifndef F_CPU
+#define F_CPU 9600000L
+#endif
+
+#endif /* MAIN_H_ */
diff --git a/trunk/AVRProjects/00_C_Templates/ATTiny85/makefile b/trunk/AVRProjects/00_C_Templates/ATTiny85/makefile
new file mode 100644
index 00000000..1d887f0c
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATTiny85/makefile
@@ -0,0 +1,441 @@
+# Hey Emacs, this is a -*- makefile -*-
+#
+# WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al.
+# Released to the Public Domain
+# Please read the make user manual!
+#
+# Additional material for this makefile was submitted by:
+#  Tim Henigan
+#  Peter Fleury
+#  Reiner Patommel
+#  Sander Pool
+#  Frederik Rouleau
+#  Markus Pfaff
+#
+# On command line:
+#
+# make all = Make software.
+#
+# make clean = Clean out built project files.
+#
+# make coff = Convert ELF to AVR COFF (for use with AVR Studio 3.x or VMLAB).
+#
+# make extcoff = Convert ELF to AVR Extended COFF (for use with AVR Studio
+#                4.07 or greater).
+#
+# make program = Download the hex file to the device, using avrdude.  Please
+#                customize the avrdude settings below first!
+#
+# make filename.s = Just compile filename.c into the assembler code only
+#
+# To rebuild project do "make clean" then "make all".
+#
+
+# mth 2004/09
+# Differences from WinAVR 20040720 sample:
+# - DEPFLAGS according to Eric Weddingtion's fix (avrfreaks/gcc-forum)
+# - F_OSC Define in CFLAGS and AFLAGS
+
+
+# MCU name
+MCU = attiny85
+
+# Main Oscillator Frequency
+# This is only used to define F_OSC in all assembler and c-sources.
+#F_OSC = 9600000
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+# Target file name (without extension).
+TARGET = main
+
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = $(TARGET).c
+
+
+# List Assembler source files here.
+# Make them always end in a capital .S.  Files ending in a lowercase .s
+# will not be considered source files but generated files (assembler
+# output from the compiler), and will be deleted upon "make clean"!
+# Even though the DOS/Win* filesystem matches both .s and .S the same,
+# it will preserve the spelling of the filenames, and gcc itself does
+# care about how the name is spelled on its command-line.
+ASRC =
+
+
+
+# Optimization level, can be [0, 1, 2, 3, s].
+# 0 = turn off optimization. s = optimize for size.
+# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+OPT = s
+
+# Debugging format.
+# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
+# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
+#DEBUG = stabs
+DEBUG = dwarf-2
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+EXTRAINCDIRS =
+
+
+# Compiler flag to set the C Standard level.
+# c89   - "ANSI" C
+# gnu89 - c89 plus GCC extensions
+# c99   - ISO C99 standard (not yet fully implemented)
+# gnu99 - c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+# Place -D or -U options here
+CDEFS =
+
+# Place -I options here
+CINCS =
+
+
+# Compiler flags.
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT)
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+CFLAGS += -Wall -Wstrict-prototypes
+CFLAGS += -Wa,-adhlns=$(<:.c=.lst)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+CFLAGS += -DF_OSC=$(F_OSC)
+
+
+
+# Assembler flags.
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs
+ASFLAGS += -DF_OSC=$(F_OSC)
+
+
+#Additional libraries.
+
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+PRINTF_LIB =
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+SCANF_LIB =
+
+MATH_LIB = -lm
+
+# External memory options
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+# Linker flags.
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+
+
+
+
+# Programming support using avrdude. Settings and variables.
+
+# Programming hardware: alf avr910 avrisp bascom bsd
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+#AVRDUDE_PROGRAMMER = stk500
+AVRDUDE_PROGRAMMER = usbasp
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = usb    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude>
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+# ---------------------------------------------------------------------------
+
+# Define directories, if needed.
+DIRAVR = c:/winavr
+DIRAVRBIN = $(DIRAVR)/bin
+DIRAVRUTILS = $(DIRAVR)/utils/bin
+DIRINC = .
+DIRLIB = $(DIRAVR)/avr/lib
+
+
+# Define programs and commands.
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+
+
+
+
+# Define Messages
+# English
+MSG_ERRORS_NONE = Errors: none
+MSG_BEGIN = -------- begin --------
+MSG_END = --------  end  --------
+MSG_SIZE_BEFORE = Size before:
+MSG_SIZE_AFTER = Size after:
+MSG_COFF = Converting to AVR COFF:
+MSG_EXTENDED_COFF = Converting to AVR Extended COFF:
+MSG_FLASH = Creating load file for Flash:
+MSG_EEPROM = Creating load file for EEPROM:
+MSG_EXTENDED_LISTING = Creating Extended Listing:
+MSG_SYMBOL_TABLE = Creating Symbol Table:
+MSG_LINKING = Linking:
+MSG_COMPILING = Compiling:
+MSG_ASSEMBLING = Assembling:
+MSG_CLEANING = Cleaning project:
+
+
+
+
+# Define all object files.
+OBJ = $(SRC:.c=.o) $(ASRC:.S=.o)
+
+# Define all listing files.
+LST = $(ASRC:.S=.lst) $(SRC:.c=.lst)
+
+
+# Compiler flags to generate dependency files.
+### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
+GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS)
+
+
+
+
+
+# Default target.
+#all: begin gccversion sizebefore build sizeafter finished end
+all: begin gccversion build size finished end
+
+build: elf hex eep lss sym
+
+elf: $(TARGET).elf
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss
+sym: $(TARGET).sym
+
+
+
+# Eye candy.
+# AVR Studio 3.x does not check make's exit code but relies on
+# the following magic strings to be generated by the compile job.
+begin:
+	@echo
+	@echo $(MSG_BEGIN)
+
+finished:
+	@echo $(MSG_ERRORS_NONE)
+
+end:
+	@echo $(MSG_END)
+	@echo
+
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+sizebefore:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
+
+sizeafter:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
+
+size:
+	$(SIZE) -C --mcu=$(MCU) $(TARGET).elf
+
+# Display compiler version information.
+gccversion :
+	@$(CC) --version
+
+
+
+# Program the device.
+program: $(TARGET).hex $(TARGET).eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM)
+
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000
+
+
+coff: $(TARGET).elf
+	@echo
+	@echo $(MSG_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	@echo
+	@echo $(MSG_EXTENDED_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+
+# Create final output files (.hex, .eep) from ELF output file.
+%.hex: %.elf
+	@echo
+	@echo $(MSG_FLASH) $@
+	$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+%.eep: %.elf
+	@echo
+	@echo $(MSG_EEPROM) $@
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+%.lss: %.elf
+	@echo
+	@echo $(MSG_EXTENDED_LISTING) $@
+	$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+%.sym: %.elf
+	@echo
+	@echo $(MSG_SYMBOL_TABLE) $@
+	$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+%.elf: $(OBJ)
+	@echo
+	@echo $(MSG_LINKING) $@
+	$(CC) $(ALL_CFLAGS) $(OBJ) --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+%.o : %.c
+	@echo
+	@echo $(MSG_COMPILING) $<
+	$(CC) -c $(ALL_CFLAGS) $< -o $@
+
+
+# Compile: create assembler files from C source files.
+%.s : %.c
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+%.o : %.S
+	@echo
+	@echo $(MSG_ASSEMBLING) $<
+	$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+
+
+# Target: clean project.
+clean: begin clean_list finished end
+
+clean_list :
+	@echo
+	@echo $(MSG_CLEANING)
+	$(REMOVE) $(TARGET).hex
+	$(REMOVE) $(TARGET).eep
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).cof
+	$(REMOVE) $(TARGET).elf
+	$(REMOVE) $(TARGET).map
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).a90
+	$(REMOVE) $(TARGET).sym
+	$(REMOVE) $(TARGET).lnk
+	$(REMOVE) $(TARGET).lss
+	$(REMOVE) $(OBJ)
+	$(REMOVE) $(LST)
+	$(REMOVE) $(SRC:.c=.s)
+	$(REMOVE) $(SRC:.c=.d)
+	$(REMOVE) .dep/*
+
+
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program
+
+
+
diff --git a/trunk/AVRProjects/00_C_Templates/ATTiny88/main.c b/trunk/AVRProjects/00_C_Templates/ATTiny88/main.c
new file mode 100644
index 00000000..841785e5
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATTiny88/main.c
@@ -0,0 +1,38 @@
+/* ******************************************************** *
+ *
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016
+ * Author:		Paolo Iocco
+ * ******************************************************** */
+/* ******************************************************** *
+   ATtiny 88 / Mega 168 / Mega 328 Pin map
+                           +-\/-+
+              /Reset PC6  1|o   |28  PC5 ADC5 
+                 RXD PD0  2|    |27  PC4 ADC4
+                 TXD PD1  3|    |26  PC3 ADC3
+                     PD2  4|    |25  PC2 ADC2
+				OC2B PD3  5|    |24  PC1 ADC1
+					 PD4  6|    |23  PC0 ADC0
+					 VCC  7|    |22  GND
+					 GND  8|    |21  AREF
+				OSC1 PB6  9|    |20  VCC
+				OSC2 PB7 10|    |19  PB5 SCK
+				OC0B PD5 11|    |18  PB4 MISO
+		   AIN0 OC0A PD6 12|    |17  PB3 OC2A MOSI
+				AIN1 PD7 13|    |16  PB2 OC1B
+					 PB0 14|    |15  PB1 OC1A
+					       +----+
+* ******************************************************** */
+
+#include "main.h"
+
+int main (void)
+{
+    while(1)
+	{
+		// Enter your code here
+    }
+	return(0);
+}
+
diff --git a/trunk/AVRProjects/00_C_Templates/ATTiny88/main.h b/trunk/AVRProjects/00_C_Templates/ATTiny88/main.h
new file mode 100644
index 00000000..8c42d94d
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATTiny88/main.h
@@ -0,0 +1,18 @@
+/* ******************************************************** *
+ *															*
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016									*
+ * Author:		Paolo Iocco									*	
+ * ******************************************************** */
+ 
+#ifndef MAIN_H_
+#define MAIN_H_
+
+#include <avr/io.h>
+
+#ifndef F_CPU
+#define F_CPU 9600000L
+#endif
+
+#endif /* MAIN_H_ */
diff --git a/trunk/AVRProjects/00_C_Templates/ATTiny88/makefile b/trunk/AVRProjects/00_C_Templates/ATTiny88/makefile
new file mode 100644
index 00000000..be7d56cf
--- /dev/null
+++ b/trunk/AVRProjects/00_C_Templates/ATTiny88/makefile
@@ -0,0 +1,441 @@
+# Hey Emacs, this is a -*- makefile -*-
+#
+# WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al.
+# Released to the Public Domain
+# Please read the make user manual!
+#
+# Additional material for this makefile was submitted by:
+#  Tim Henigan
+#  Peter Fleury
+#  Reiner Patommel
+#  Sander Pool
+#  Frederik Rouleau
+#  Markus Pfaff
+#
+# On command line:
+#
+# make all = Make software.
+#
+# make clean = Clean out built project files.
+#
+# make coff = Convert ELF to AVR COFF (for use with AVR Studio 3.x or VMLAB).
+#
+# make extcoff = Convert ELF to AVR Extended COFF (for use with AVR Studio
+#                4.07 or greater).
+#
+# make program = Download the hex file to the device, using avrdude.  Please
+#                customize the avrdude settings below first!
+#
+# make filename.s = Just compile filename.c into the assembler code only
+#
+# To rebuild project do "make clean" then "make all".
+#
+
+# mth 2004/09 
+# Differences from WinAVR 20040720 sample:
+# - DEPFLAGS according to Eric Weddingtion's fix (avrfreaks/gcc-forum)
+# - F_OSC Define in CFLAGS and AFLAGS
+
+
+# MCU name
+MCU = attiny88
+
+# Main Oscillator Frequency
+# This is only used to define F_OSC in all assembler and c-sources.
+F_OSC = 4190000
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+# Target file name (without extension).
+TARGET = main
+
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = $(TARGET).c
+
+
+# List Assembler source files here.
+# Make them always end in a capital .S.  Files ending in a lowercase .s
+# will not be considered source files but generated files (assembler
+# output from the compiler), and will be deleted upon "make clean"!
+# Even though the DOS/Win* filesystem matches both .s and .S the same,
+# it will preserve the spelling of the filenames, and gcc itself does
+# care about how the name is spelled on its command-line.
+ASRC = 
+
+
+
+# Optimization level, can be [0, 1, 2, 3, s]. 
+# 0 = turn off optimization. s = optimize for size.
+# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+OPT = s
+
+# Debugging format.
+# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
+# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
+#DEBUG = stabs
+DEBUG = dwarf-2
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+EXTRAINCDIRS = 
+
+
+# Compiler flag to set the C Standard level.
+# c89   - "ANSI" C
+# gnu89 - c89 plus GCC extensions
+# c99   - ISO C99 standard (not yet fully implemented)
+# gnu99 - c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+# Place -D or -U options here
+CDEFS =
+
+# Place -I options here
+CINCS =
+
+
+# Compiler flags.
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT)
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+CFLAGS += -Wall -Wstrict-prototypes
+CFLAGS += -Wa,-adhlns=$(<:.c=.lst)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+CFLAGS += -DF_OSC=$(F_OSC)
+
+
+
+# Assembler flags.
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs 
+ASFLAGS += -DF_OSC=$(F_OSC)
+
+
+#Additional libraries.
+
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+PRINTF_LIB = 
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+SCANF_LIB = 
+
+MATH_LIB = -lm
+
+# External memory options
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+# Linker flags.
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+
+
+
+
+# Programming support using avrdude. Settings and variables.
+
+# Programming hardware: alf avr910 avrisp bascom bsd 
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+#AVRDUDE_PROGRAMMER = stk500
+AVRDUDE_PROGRAMMER = usbasp
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = usb    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude> 
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+# ---------------------------------------------------------------------------
+
+# Define directories, if needed.
+DIRAVR = c:/winavr
+DIRAVRBIN = $(DIRAVR)/bin
+DIRAVRUTILS = $(DIRAVR)/utils/bin
+DIRINC = .
+DIRLIB = $(DIRAVR)/avr/lib
+
+
+# Define programs and commands.
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+
+
+
+
+# Define Messages
+# English
+MSG_ERRORS_NONE = Errors: none
+MSG_BEGIN = -------- begin --------
+MSG_END = --------  end  --------
+MSG_SIZE_BEFORE = Size before: 
+MSG_SIZE_AFTER = Size after:
+MSG_COFF = Converting to AVR COFF:
+MSG_EXTENDED_COFF = Converting to AVR Extended COFF:
+MSG_FLASH = Creating load file for Flash:
+MSG_EEPROM = Creating load file for EEPROM:
+MSG_EXTENDED_LISTING = Creating Extended Listing:
+MSG_SYMBOL_TABLE = Creating Symbol Table:
+MSG_LINKING = Linking:
+MSG_COMPILING = Compiling:
+MSG_ASSEMBLING = Assembling:
+MSG_CLEANING = Cleaning project:
+
+
+
+
+# Define all object files.
+OBJ = $(SRC:.c=.o) $(ASRC:.S=.o) 
+
+# Define all listing files.
+LST = $(ASRC:.S=.lst) $(SRC:.c=.lst)
+
+
+# Compiler flags to generate dependency files.
+### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
+GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS)
+
+
+
+
+
+# Default target.
+#all: begin gccversion sizebefore build sizeafter finished end
+all: begin gccversion build size finished end
+
+build: elf hex eep lss sym
+
+elf: $(TARGET).elf
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss 
+sym: $(TARGET).sym
+
+
+
+# Eye candy.
+# AVR Studio 3.x does not check make's exit code but relies on
+# the following magic strings to be generated by the compile job.
+begin:
+	@echo
+	@echo $(MSG_BEGIN)
+
+finished:
+	@echo $(MSG_ERRORS_NONE)
+
+end:
+	@echo $(MSG_END)
+	@echo
+
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+sizebefore:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
+
+sizeafter:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
+
+size:
+	$(SIZE) -C --mcu=$(MCU) $(TARGET).elf
+
+# Display compiler version information.
+gccversion : 
+	@$(CC) --version
+
+
+
+# Program the device.  
+program: $(TARGET).hex $(TARGET).eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM)
+
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000 
+
+
+coff: $(TARGET).elf
+	@echo
+	@echo $(MSG_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	@echo
+	@echo $(MSG_EXTENDED_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+
+# Create final output files (.hex, .eep) from ELF output file.
+%.hex: %.elf
+	@echo
+	@echo $(MSG_FLASH) $@
+	$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+%.eep: %.elf
+	@echo
+	@echo $(MSG_EEPROM) $@
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+%.lss: %.elf
+	@echo
+	@echo $(MSG_EXTENDED_LISTING) $@
+	$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+%.sym: %.elf
+	@echo
+	@echo $(MSG_SYMBOL_TABLE) $@
+	$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+%.elf: $(OBJ)
+	@echo
+	@echo $(MSG_LINKING) $@
+	$(CC) $(ALL_CFLAGS) $(OBJ) --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+%.o : %.c
+	@echo
+	@echo $(MSG_COMPILING) $<
+	$(CC) -c $(ALL_CFLAGS) $< -o $@ 
+
+
+# Compile: create assembler files from C source files.
+%.s : %.c
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+%.o : %.S
+	@echo
+	@echo $(MSG_ASSEMBLING) $<
+	$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+
+
+# Target: clean project.
+clean: begin clean_list finished end
+
+clean_list :
+	@echo
+	@echo $(MSG_CLEANING)
+	$(REMOVE) $(TARGET).hex
+	$(REMOVE) $(TARGET).eep
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).cof
+	$(REMOVE) $(TARGET).elf
+	$(REMOVE) $(TARGET).map
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).a90
+	$(REMOVE) $(TARGET).sym
+	$(REMOVE) $(TARGET).lnk
+	$(REMOVE) $(TARGET).lss
+	$(REMOVE) $(OBJ)
+	$(REMOVE) $(LST)
+	$(REMOVE) $(SRC:.c=.s)
+	$(REMOVE) $(SRC:.c=.d)
+	$(REMOVE) .dep/*
+
+
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program
+ 
+
+ 
diff --git a/trunk/AVRProjects/ATMega1284/.dep/main.o.d b/trunk/AVRProjects/ATMega1284/.dep/main.o.d
new file mode 100644
index 00000000..9d014f60
--- /dev/null
+++ b/trunk/AVRProjects/ATMega1284/.dep/main.o.d
@@ -0,0 +1,43 @@
+main.o: main.c \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\io.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\sfr_defs.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\inttypes.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\lib\gcc\avr\4.8.1\include\stdint.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\stdint.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iom1284p.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\portpins.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\common.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\version.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\fuse.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\lock.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\math.h
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\io.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\sfr_defs.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\inttypes.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\lib\gcc\avr\4.8.1\include\stdint.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\stdint.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iom1284p.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\portpins.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\common.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\version.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\fuse.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\lock.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\math.h:
diff --git a/trunk/AVRProjects/ATMega1284/main.c b/trunk/AVRProjects/ATMega1284/main.c
new file mode 100644
index 00000000..e6fe1733
--- /dev/null
+++ b/trunk/AVRProjects/ATMega1284/main.c
@@ -0,0 +1,50 @@
+/* ******************************************************** *
+ *
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016
+ * Author:		Paolo Iocco
+ * ******************************************************** */
+/* ******************************************************** *
+   ATmega 1284 Pin map
+                           +-\/-+
+                     PB0  1|o   |40  PA0 ADC0
+                     PB1  2|    |39  PA1 ADC1
+                AIN0 PB2  3|    |38  PA2 ADC2
+           AIN1 OC0A PB3  4|    |37  PA3 ADC3
+		        OC0B PB4  5|    |36  PA4 ADC4
+				MOSI PB5  6|    |35  PA5 ADC5
+				MISO PB6  7|    |34  PA6 ADC6
+				SCK  PB7  8|    |33  PA7 ADC7
+                  /Reset  9|    |32  AREF
+					 VCC 10|    |31  GND
+					 GND 11|    |30  AVCC
+			       XTAL1 12|    |29  PC7
+                   XTAL2 13|    |28  PC6
+				RXD0 PD0 14|    |27  PC5
+				TXD0 PD1 15|    |26  PC4 
+				RXD1 PD2 16|    |25  PC3
+				TXD1 PD3 17|    |24  PC2 
+				OC1B PD4 18|    |23  PC1 SDA
+				OC1A PD5 19|    |22  PC0 SCL
+				OC2B PD6 20|    |21  PD7 OC2A
+					       +----+
+* ******************************************************** */
+
+#include <avr/io.h>				
+#include <util/delay.h>			
+
+int main (void)					
+{
+	unsigned char zwischenspeicher;		
+	DDRB = 0b00000001;		
+	while(1)					
+	{
+		zwischenspeicher = PORTB;				
+		zwischenspeicher = zwischenspeicher ^ 0b00000001;	
+		PORTB = zwischenspeicher;				
+		_delay_ms(500);							
+	}							
+	return 0;					
+}
+
diff --git a/trunk/AVRProjects/ATMega1284/main.eep b/trunk/AVRProjects/ATMega1284/main.eep
new file mode 100644
index 00000000..1996e8fd
--- /dev/null
+++ b/trunk/AVRProjects/ATMega1284/main.eep
@@ -0,0 +1 @@
+:00000001FF
diff --git a/trunk/AVRProjects/ATMega1284/main.elf b/trunk/AVRProjects/ATMega1284/main.elf
new file mode 100644
index 00000000..ba593340
Binary files /dev/null and b/trunk/AVRProjects/ATMega1284/main.elf differ
diff --git a/trunk/AVRProjects/ATMega1284/main.hex b/trunk/AVRProjects/ATMega1284/main.hex
new file mode 100644
index 00000000..81263dac
--- /dev/null
+++ b/trunk/AVRProjects/ATMega1284/main.hex
@@ -0,0 +1,14 @@
+:100000000C9446000C9450000C9450000C9450003A
+:100010000C9450000C9450000C9450000C94500020
+:100020000C9450000C9450000C9450000C94500010
+:100030000C9450000C9450000C9450000C94500000
+:100040000C9450000C9450000C9450000C945000F0
+:100050000C9450000C9450000C9450000C945000E0
+:100060000C9450000C9450000C9450000C945000D0
+:100070000C9450000C9450000C9450000C945000C0
+:100080000C9450000C9450000C94500011241FBE8E
+:10009000CFEFD0E4DEBFCDBF0E9452000C946200CF
+:1000A0000C94000081E084B991E085B1892785B97D
+:1000B0002FE936E881E0215030408040E1F700C070
+:0800C0000000F3CFF894FFCF1C
+:00000001FF
diff --git a/trunk/AVRProjects/ATMega1284/main.lss b/trunk/AVRProjects/ATMega1284/main.lss
new file mode 100644
index 00000000..dff86297
--- /dev/null
+++ b/trunk/AVRProjects/ATMega1284/main.lss
@@ -0,0 +1,127 @@
+
+main.elf:     file format elf32-avr
+
+Sections:
+Idx Name          Size      VMA       LMA       File off  Algn
+  0 .data         00000000  00800100  000000c8  0000013c  2**0
+                  CONTENTS, ALLOC, LOAD, DATA
+  1 .text         000000c8  00000000  00000000  00000074  2**1
+                  CONTENTS, ALLOC, LOAD, READONLY, CODE
+  2 .comment      00000011  00000000  00000000  0000013c  2**0
+                  CONTENTS, READONLY
+  3 .debug_aranges 00000020  00000000  00000000  0000014d  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  4 .debug_info   00000119  00000000  00000000  0000016d  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  5 .debug_abbrev 000000d1  00000000  00000000  00000286  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  6 .debug_line   000000d7  00000000  00000000  00000357  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  7 .debug_frame  00000024  00000000  00000000  00000430  2**2
+                  CONTENTS, READONLY, DEBUGGING
+  8 .debug_str    00000137  00000000  00000000  00000454  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  9 .debug_loc    0000001f  00000000  00000000  0000058b  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 10 .debug_ranges 00000010  00000000  00000000  000005aa  2**0
+                  CONTENTS, READONLY, DEBUGGING
+
+Disassembly of section .text:
+
+00000000 <__vectors>:
+   0:	0c 94 46 00 	jmp	0x8c	; 0x8c <__ctors_end>
+   4:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+   8:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+   c:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  10:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  14:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  18:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  1c:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  20:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  24:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  28:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  2c:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  30:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  34:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  38:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  3c:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  40:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  44:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  48:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  4c:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  50:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  54:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  58:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  5c:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  60:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  64:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  68:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  6c:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  70:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  74:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  78:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  7c:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  80:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  84:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+  88:	0c 94 50 00 	jmp	0xa0	; 0xa0 <__bad_interrupt>
+
+0000008c <__ctors_end>:
+  8c:	11 24       	eor	r1, r1
+  8e:	1f be       	out	0x3f, r1	; 63
+  90:	cf ef       	ldi	r28, 0xFF	; 255
+  92:	d0 e4       	ldi	r29, 0x40	; 64
+  94:	de bf       	out	0x3e, r29	; 62
+  96:	cd bf       	out	0x3d, r28	; 61
+  98:	0e 94 52 00 	call	0xa4	; 0xa4 <main>
+  9c:	0c 94 62 00 	jmp	0xc4	; 0xc4 <_exit>
+
+000000a0 <__bad_interrupt>:
+  a0:	0c 94 00 00 	jmp	0	; 0x0 <__vectors>
+
+000000a4 <main>:
+#include <util/delay.h>			
+
+int main (void)					
+{
+	unsigned char zwischenspeicher;		
+	DDRB = 0b00000001;		
+  a4:	81 e0       	ldi	r24, 0x01	; 1
+  a6:	84 b9       	out	0x04, r24	; 4
+	while(1)					
+	{
+		zwischenspeicher = PORTB;				
+		zwischenspeicher = zwischenspeicher ^ 0b00000001;	
+  a8:	91 e0       	ldi	r25, 0x01	; 1
+{
+	unsigned char zwischenspeicher;		
+	DDRB = 0b00000001;		
+	while(1)					
+	{
+		zwischenspeicher = PORTB;				
+  aa:	85 b1       	in	r24, 0x05	; 5
+		zwischenspeicher = zwischenspeicher ^ 0b00000001;	
+  ac:	89 27       	eor	r24, r25
+		PORTB = zwischenspeicher;				
+  ae:	85 b9       	out	0x05, r24	; 5
+	#else
+		//round up by default
+		__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
+	#endif
+
+	__builtin_avr_delay_cycles(__ticks_dc);
+  b0:	2f e9       	ldi	r18, 0x9F	; 159
+  b2:	36 e8       	ldi	r19, 0x86	; 134
+  b4:	81 e0       	ldi	r24, 0x01	; 1
+  b6:	21 50       	subi	r18, 0x01	; 1
+  b8:	30 40       	sbci	r19, 0x00	; 0
+  ba:	80 40       	sbci	r24, 0x00	; 0
+  bc:	e1 f7       	brne	.-8      	; 0xb6 <main+0x12>
+  be:	00 c0       	rjmp	.+0      	; 0xc0 <main+0x1c>
+  c0:	00 00       	nop
+  c2:	f3 cf       	rjmp	.-26     	; 0xaa <main+0x6>
+
+000000c4 <_exit>:
+  c4:	f8 94       	cli
+
+000000c6 <__stop_program>:
+  c6:	ff cf       	rjmp	.-2      	; 0xc6 <__stop_program>
diff --git a/trunk/AVRProjects/ATMega1284/main.lst b/trunk/AVRProjects/ATMega1284/main.lst
new file mode 100644
index 00000000..c687f079
--- /dev/null
+++ b/trunk/AVRProjects/ATMega1284/main.lst
@@ -0,0 +1,245 @@
+   1               		.file	"main.c"
+   2               	__SP_H__ = 0x3e
+   3               	__SP_L__ = 0x3d
+   4               	__SREG__ = 0x3f
+   5               	__RAMPZ__ = 0x3b
+   6               	__tmp_reg__ = 0
+   7               	__zero_reg__ = 1
+   8               		.text
+   9               	.Ltext0:
+  10               		.cfi_sections	.debug_frame
+  11               		.section	.text.startup,"ax",@progbits
+  12               	.global	main
+  14               	main:
+  15               	.LFB6:
+  16               		.file 1 "main.c"
+   1:main.c        **** #include <avr/io.h>				
+   2:main.c        **** #include <util/delay.h>			
+   3:main.c        **** 
+   4:main.c        **** int main (void)					
+   5:main.c        **** {
+  17               		.loc 1 5 0
+  18               		.cfi_startproc
+  19               	/* prologue: function */
+  20               	/* frame size = 0 */
+  21               	/* stack size = 0 */
+  22               	.L__stack_usage = 0
+   6:main.c        **** 	unsigned char zwischenspeicher;		
+   7:main.c        **** 	DDRB = 0b00000001;		
+  23               		.loc 1 7 0
+  24 0000 81E0      		ldi r24,lo8(1)
+  25 0002 84B9      		out 0x4,r24
+   8:main.c        **** 	while(1)					
+   9:main.c        **** 	{
+  10:main.c        **** 		zwischenspeicher = PORTB;				
+  11:main.c        **** 		zwischenspeicher = zwischenspeicher ^ 0b00000001;	
+  26               		.loc 1 11 0
+  27 0004 91E0      		ldi r25,lo8(1)
+  28               	.L2:
+  10:main.c        **** 		zwischenspeicher = zwischenspeicher ^ 0b00000001;	
+  29               		.loc 1 10 0 discriminator 1
+  30 0006 85B1      		in r24,0x5
+  31               	.LVL0:
+  32               		.loc 1 11 0 discriminator 1
+  33 0008 8927      		eor r24,r25
+  34               	.LVL1:
+  12:main.c        **** 		PORTB = zwischenspeicher;				
+  35               		.loc 1 12 0 discriminator 1
+  36 000a 85B9      		out 0x5,r24
+  37               	.LVL2:
+  38               	.LBB4:
+  39               	.LBB5:
+  40               		.file 2 "e:\\progs\\arduino-1.7.4\\hardware\\tools\\avr\\avr\\include\\util\\delay.h"
+   1:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /* Copyright (c) 2002, Marek Michalkiewicz
+   2:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Copyright (c) 2004,2005,2007 Joerg Wunsch
+   3:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Copyright (c) 2007  Florin-Viorel Petrov
+   4:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    All rights reserved.
+   5:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+   6:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Redistribution and use in source and binary forms, with or without
+   7:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    modification, are permitted provided that the following conditions are met:
+   8:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+   9:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    * Redistributions of source code must retain the above copyright
+  10:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      notice, this list of conditions and the following disclaimer.
+  11:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  12:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    * Redistributions in binary form must reproduce the above copyright
+  13:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      notice, this list of conditions and the following disclaimer in
+  14:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      the documentation and/or other materials provided with the
+  15:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      distribution.
+  16:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  17:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    * Neither the name of the copyright holders nor the names of
+  18:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      contributors may be used to endorse or promote products derived
+  19:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      from this software without specific prior written permission.
+  20:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  21:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  22:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  23:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  24:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  25:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  26:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  27:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  28:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  29:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  30:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+  31:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   POSSIBILITY OF SUCH DAMAGE. */
+  32:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  33:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /* $Id$ */
+  34:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  35:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef _UTIL_DELAY_H_
+  36:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #define _UTIL_DELAY_H_ 1
+  37:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  38:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef __HAS_DELAY_CYCLES
+  39:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #define __HAS_DELAY_CYCLES 1
+  40:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  41:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  42:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #include <inttypes.h>
+  43:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #include <util/delay_basic.h>
+  44:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #include <math.h>
+  45:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  46:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /** \file */
+  47:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /** \defgroup util_delay <util/delay.h>: Convenience functions for busy-wait delay loops
+  48:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \code
+  49:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     #define F_CPU 1000000UL  // 1 MHz
+  50:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     //#define F_CPU 14.7456E6
+  51:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     #include <util/delay.h>
+  52:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \endcode
+  53:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  54:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \note As an alternative method, it is possible to pass the
+  55:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     F_CPU macro down to the compiler from the Makefile.
+  56:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     Obviously, in that case, no \c \#define statement should be
+  57:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     used.
+  58:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  59:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     The functions in this header file are wrappers around the basic
+  60:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     busy-wait functions from <util/delay_basic.h>.  They are meant as
+  61:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     convenience functions where actual time values can be specified
+  62:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     rather than a number of cycles to wait for.  The idea behind is
+  63:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     that compile-time constant expressions will be eliminated by
+  64:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     compiler optimization so floating-point expressions can be used
+  65:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     to calculate the number of delay cycles needed based on the CPU
+  66:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     frequency passed by the macro F_CPU.
+  67:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  68:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \note In order for these functions to work as intended, compiler
+  69:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     optimizations <em>must</em> be enabled, and the delay time
+  70:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     <em>must</em> be an expression that is a known constant at
+  71:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     compile-time.  If these requirements are not met, the resulting
+  72:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     delay will be much longer (and basically unpredictable), and
+  73:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     applications that otherwise do not use floating-point calculations
+  74:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     will experience severe code bloat by the floating-point library
+  75:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     routines linked into the application.
+  76:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  77:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     The functions available allow the specification of microsecond, and
+  78:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     millisecond delays directly, using the application-supplied macro
+  79:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     F_CPU as the CPU clock frequency (in Hertz).
+  80:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  81:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** */
+  82:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  83:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #if !defined(__DOXYGEN__)
+  84:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** static inline void _delay_us(double __us) __attribute__((always_inline));
+  85:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** static inline void _delay_ms(double __ms) __attribute__((always_inline));
+  86:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  87:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  88:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef F_CPU
+  89:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /* prevent compiler error by supplying a default */
+  90:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** # warning "F_CPU not defined for <util/delay.h>"
+  91:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** # define F_CPU 1000000UL
+  92:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  93:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  94:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef __OPTIMIZE__
+  95:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** # warning "Compiler optimizations disabled; functions from <util/delay.h> won't work as designed"
+  96:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  97:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  98:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #if __HAS_DELAY_CYCLES && defined(__OPTIMIZE__) && \
+  99:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   !defined(__DELAY_BACKWARD_COMPATIBLE__) &&	   \
+ 100:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   __STDC_HOSTED__
+ 101:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #  include <math.h>
+ 102:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+ 103:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 104:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /**
+ 105:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    \ingroup util_delay
+ 106:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 107:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Perform a delay of \c __ms milliseconds, using _delay_loop_2().
+ 108:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 109:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    The macro F_CPU is supposed to be defined to a
+ 110:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    constant defining the CPU clock frequency (in Hertz).
+ 111:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 112:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    The maximal possible delay is 262.14 ms / F_CPU in MHz.
+ 113:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 114:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    When the user request delay which exceed the maximum possible one,
+ 115:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    _delay_ms() provides a decreased resolution functionality. In this
+ 116:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    mode _delay_ms() will work with a resolution of 1/10 ms, providing
+ 117:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    delays up to 6.5535 seconds (independent from CPU frequency).  The
+ 118:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    user will not be informed about decreased resolution.
+ 119:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 120:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    If the avr-gcc toolchain has __builtin_avr_delay_cycles(unsigned long)
+ 121:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    support, maximal possible delay is 4294967.295 ms/ F_CPU in MHz. For
+ 122:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    values greater than the maximal possible delay, overflows results in
+ 123:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    no delay i.e., 0ms.
+ 124:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 125:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Conversion of __us into clock cycles may not always result in integer.
+ 126:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    By default, the clock cycles rounded up to next integer. This ensures that
+ 127:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    the user gets atleast __us microseconds of delay.
+ 128:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 129:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Alternatively, user can define __DELAY_ROUND_DOWN__ and __DELAY_ROUND_CLOSEST__
+ 130:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    to round down and round to closest integer.
+ 131:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 132:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Note: The new implementation of _delay_ms(double __ms) with 
+ 133:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     __builtin_avr_delay_cycles(unsigned long) support is not backward compatible. 
+ 134:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    User can define __DELAY_BACKWARD_COMPATIBLE__ to get a backward compatible delay.
+ 135:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Also, the backward compatible
+ 136:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    algorithm will be chosen if the code is compiled in a <em>freestanding
+ 137:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    environment</em> (GCC option \c -ffreestanding), as the math functions
+ 138:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    required for rounding are not available to the compiler then.
+ 139:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 140:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****  */
+ 141:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** void
+ 142:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** _delay_ms(double __ms)
+ 143:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** {
+ 144:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	double __tmp ; 
+ 145:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #if __HAS_DELAY_CYCLES && defined(__OPTIMIZE__) && \
+ 146:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   !defined(__DELAY_BACKWARD_COMPATIBLE__) &&	   \
+ 147:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   __STDC_HOSTED__
+ 148:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	uint32_t __ticks_dc;
+ 149:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	extern void __builtin_avr_delay_cycles(unsigned long);
+ 150:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	__tmp = ((F_CPU) / 1e3) * __ms;
+ 151:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 152:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#if defined(__DELAY_ROUND_DOWN__)
+ 153:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		__ticks_dc = (uint32_t)fabs(__tmp);
+ 154:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 155:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#elif defined(__DELAY_ROUND_CLOSEST__)
+ 156:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		__ticks_dc = (uint32_t)(fabs(__tmp)+0.5);
+ 157:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 158:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#else
+ 159:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		//round up by default
+ 160:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
+ 161:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#endif
+ 162:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 163:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	__builtin_avr_delay_cycles(__ticks_dc);
+  41               		.loc 2 163 0 discriminator 1
+  42 000c 2FE9      		ldi r18,lo8(99999)
+  43 000e 36E8      		ldi r19,hi8(99999)
+  44 0010 81E0      		ldi r24,hlo8(99999)
+  45 0012 2150      		1: subi r18,1
+  46 0014 3040      		sbci r19,0
+  47 0016 8040      		sbci r24,0
+  48 0018 01F4      		brne 1b
+  49               	.LVL3:
+  50 001a 00C0      		rjmp .
+  51 001c 0000      		nop
+  52 001e 00C0      		rjmp .L2
+  53               	.LBE5:
+  54               	.LBE4:
+  55               		.cfi_endproc
+  56               	.LFE6:
+  58               		.text
+  59               	.Letext0:
+  60               		.file 3 "e:\\progs\\arduino-1.7.4\\hardware\\tools\\avr\\avr\\include\\stdint.h"
+DEFINED SYMBOLS
+                            *ABS*:00000000 main.c
+C:\Users\q242695\AppData\Local\Temp\ccaDJnRY.s:2      *ABS*:0000003e __SP_H__
+C:\Users\q242695\AppData\Local\Temp\ccaDJnRY.s:3      *ABS*:0000003d __SP_L__
+C:\Users\q242695\AppData\Local\Temp\ccaDJnRY.s:4      *ABS*:0000003f __SREG__
+C:\Users\q242695\AppData\Local\Temp\ccaDJnRY.s:5      *ABS*:0000003b __RAMPZ__
+C:\Users\q242695\AppData\Local\Temp\ccaDJnRY.s:6      *ABS*:00000000 __tmp_reg__
+C:\Users\q242695\AppData\Local\Temp\ccaDJnRY.s:7      *ABS*:00000001 __zero_reg__
+C:\Users\q242695\AppData\Local\Temp\ccaDJnRY.s:14     .text.startup:00000000 main
+
+NO UNDEFINED SYMBOLS
diff --git a/trunk/AVRProjects/ATMega1284/main.map b/trunk/AVRProjects/ATMega1284/main.map
new file mode 100644
index 00000000..9ed2f402
--- /dev/null
+++ b/trunk/AVRProjects/ATMega1284/main.map
@@ -0,0 +1,447 @@
+Archive member included because of file (symbol)
+
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_exit.o)
+                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o (exit)
+
+Memory Configuration
+
+Name             Origin             Length             Attributes
+text             0x00000000         0x00020000         xr
+data             0x00800100         0x0000ff00         rw !x
+eeprom           0x00810000         0x00010000         rw !x
+fuse             0x00820000         0x00000400         rw !x
+lock             0x00830000         0x00000400         rw !x
+signature        0x00840000         0x00000400         rw !x
+*default*        0x00000000         0xffffffff
+
+Linker script and memory map
+
+Address of section .data set to 0x800100
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o
+LOAD main.o
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libm.a
+START GROUP
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libm.a
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a
+END GROUP
+
+.hash
+ *(.hash)
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+ *(.gnu.version)
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+ *(.gnu.version_d)
+
+.gnu.version_r
+ *(.gnu.version_r)
+
+.rel.init
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+.rela.init
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+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o
+main                                              main.o
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o
diff --git a/trunk/AVRProjects/ATMega1284/main.sym b/trunk/AVRProjects/ATMega1284/main.sym
new file mode 100644
index 00000000..4b71a5c7
--- /dev/null
+++ b/trunk/AVRProjects/ATMega1284/main.sym
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diff --git a/trunk/AVRProjects/ATMega1284/makefile b/trunk/AVRProjects/ATMega1284/makefile
new file mode 100644
index 00000000..261ed4ea
--- /dev/null
+++ b/trunk/AVRProjects/ATMega1284/makefile
@@ -0,0 +1,442 @@
+# Hey Emacs, this is a -*- makefile -*-
+#
+# WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al.
+# Released to the Public Domain
+# Please read the make user manual!
+#
+# Additional material for this makefile was submitted by:
+#  Tim Henigan
+#  Peter Fleury
+#  Reiner Patommel
+#  Sander Pool
+#  Frederik Rouleau
+#  Markus Pfaff
+#
+# On command line:
+#
+# make all = Make software.
+#
+# make clean = Clean out built project files.
+#
+# make coff = Convert ELF to AVR COFF (for use with AVR Studio 3.x or VMLAB).
+#
+# make extcoff = Convert ELF to AVR Extended COFF (for use with AVR Studio
+#                4.07 or greater).
+#
+# make program = Download the hex file to the device, using avrdude.  Please
+#                customize the avrdude settings below first!
+#
+# make filename.s = Just compile filename.c into the assembler code only
+#
+# To rebuild project do "make clean" then "make all".
+#
+
+# mth 2004/09 
+# Differences from WinAVR 20040720 sample:
+# - DEPFLAGS according to Eric Weddingtion's fix (avrfreaks/gcc-forum)
+# - F_OSC Define in CFLAGS and AFLAGS
+
+
+# MCU name
+MCU = atmega1284p
+
+# Main Oscillator Frequency
+# This is only used to define F_OSC in all assembler and c-sources.
+F_OSC = 4190000
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+# Target file name (without extension).
+TARGET = main
+
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = $(TARGET).c
+
+
+# List Assembler source files here.
+# Make them always end in a capital .S.  Files ending in a lowercase .s
+# will not be considered source files but generated files (assembler
+# output from the compiler), and will be deleted upon "make clean"!
+# Even though the DOS/Win* filesystem matches both .s and .S the same,
+# it will preserve the spelling of the filenames, and gcc itself does
+# care about how the name is spelled on its command-line.
+ASRC = 
+
+
+
+# Optimization level, can be [0, 1, 2, 3, s]. 
+# 0 = turn off optimization. s = optimize for size.
+# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+OPT = s
+
+# Debugging format.
+# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
+# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
+#DEBUG = stabs
+DEBUG = dwarf-2
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+EXTRAINCDIRS = 
+
+
+# Compiler flag to set the C Standard level.
+# c89   - "ANSI" C
+# gnu89 - c89 plus GCC extensions
+# c99   - ISO C99 standard (not yet fully implemented)
+# gnu99 - c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+# Place -D or -U options here
+CDEFS =
+
+# Place -I options here
+CINCS =
+
+
+# Compiler flags.
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT)
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+CFLAGS += -Wall -Wstrict-prototypes
+CFLAGS += -Wa,-adhlns=$(<:.c=.lst)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+CFLAGS += -DF_OSC=$(F_OSC)
+
+
+
+# Assembler flags.
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs 
+ASFLAGS += -DF_OSC=$(F_OSC)
+
+
+#Additional libraries.
+
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+PRINTF_LIB = 
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+SCANF_LIB = 
+
+MATH_LIB = -lm
+
+# External memory options
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+# Linker flags.
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+
+
+
+
+# Programming support using avrdude. Settings and variables.
+
+# Programming hardware: alf avr910 avrisp bascom bsd 
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+#AVRDUDE_PROGRAMMER = stk500
+AVRDUDE_PROGRAMMER = usbasp
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = usb    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude> 
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+
+# ---------------------------------------------------------------------------
+
+# Define directories, if needed.
+DIRAVR = c:/winavr
+DIRAVRBIN = $(DIRAVR)/bin
+DIRAVRUTILS = $(DIRAVR)/utils/bin
+DIRINC = .
+DIRLIB = $(DIRAVR)/avr/lib
+
+
+# Define programs and commands.
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+
+
+
+
+# Define Messages
+# English
+MSG_ERRORS_NONE = Errors: none
+MSG_BEGIN = -------- begin --------
+MSG_END = --------  end  --------
+MSG_SIZE_BEFORE = Size before: 
+MSG_SIZE_AFTER = Size after:
+MSG_COFF = Converting to AVR COFF:
+MSG_EXTENDED_COFF = Converting to AVR Extended COFF:
+MSG_FLASH = Creating load file for Flash:
+MSG_EEPROM = Creating load file for EEPROM:
+MSG_EXTENDED_LISTING = Creating Extended Listing:
+MSG_SYMBOL_TABLE = Creating Symbol Table:
+MSG_LINKING = Linking:
+MSG_COMPILING = Compiling:
+MSG_ASSEMBLING = Assembling:
+MSG_CLEANING = Cleaning project:
+
+
+
+
+# Define all object files.
+OBJ = $(SRC:.c=.o) $(ASRC:.S=.o) 
+
+# Define all listing files.
+LST = $(ASRC:.S=.lst) $(SRC:.c=.lst)
+
+
+# Compiler flags to generate dependency files.
+### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
+GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS)
+
+
+
+
+
+# Default target.
+#all: begin gccversion sizebefore build sizeafter finished end
+all: begin gccversion build size finished end
+
+build: elf hex eep lss sym
+
+elf: $(TARGET).elf
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss 
+sym: $(TARGET).sym
+
+
+
+# Eye candy.
+# AVR Studio 3.x does not check make's exit code but relies on
+# the following magic strings to be generated by the compile job.
+begin:
+	@echo
+	@echo $(MSG_BEGIN)
+
+finished:
+	@echo $(MSG_ERRORS_NONE)
+
+end:
+	@echo $(MSG_END)
+	@echo
+
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+sizebefore:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
+
+sizeafter:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
+
+size:
+	$(SIZE) -C --mcu=$(MCU) $(TARGET).elf
+
+# Display compiler version information.
+gccversion : 
+	@$(CC) --version
+
+
+
+# Program the device.  
+program: $(TARGET).hex $(TARGET).eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM)
+
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000 
+
+
+coff: $(TARGET).elf
+	@echo
+	@echo $(MSG_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	@echo
+	@echo $(MSG_EXTENDED_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+
+# Create final output files (.hex, .eep) from ELF output file.
+%.hex: %.elf
+	@echo
+	@echo $(MSG_FLASH) $@
+	$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+%.eep: %.elf
+	@echo
+	@echo $(MSG_EEPROM) $@
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+%.lss: %.elf
+	@echo
+	@echo $(MSG_EXTENDED_LISTING) $@
+	$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+%.sym: %.elf
+	@echo
+	@echo $(MSG_SYMBOL_TABLE) $@
+	$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+%.elf: $(OBJ)
+	@echo
+	@echo $(MSG_LINKING) $@
+	$(CC) $(ALL_CFLAGS) $(OBJ) --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+%.o : %.c
+	@echo
+	@echo $(MSG_COMPILING) $<
+	$(CC) -c $(ALL_CFLAGS) $< -o $@ 
+
+
+# Compile: create assembler files from C source files.
+%.s : %.c
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+%.o : %.S
+	@echo
+	@echo $(MSG_ASSEMBLING) $<
+	$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+
+
+# Target: clean project.
+clean: begin clean_list finished end
+
+clean_list :
+	@echo
+	@echo $(MSG_CLEANING)
+	$(REMOVE) $(TARGET).hex
+	$(REMOVE) $(TARGET).eep
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).cof
+	$(REMOVE) $(TARGET).elf
+	$(REMOVE) $(TARGET).map
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).a90
+	$(REMOVE) $(TARGET).sym
+	$(REMOVE) $(TARGET).lnk
+	$(REMOVE) $(TARGET).lss
+	$(REMOVE) $(OBJ)
+	$(REMOVE) $(LST)
+	$(REMOVE) $(SRC:.c=.s)
+	$(REMOVE) $(SRC:.c=.d)
+	$(REMOVE) .dep/*
+
+
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program
+ 
+
+ 
diff --git a/trunk/AVRProjects/ATMega168/.dep/main.o.d b/trunk/AVRProjects/ATMega168/.dep/main.o.d
new file mode 100644
index 00000000..1a8a825c
--- /dev/null
+++ b/trunk/AVRProjects/ATMega168/.dep/main.o.d
@@ -0,0 +1,46 @@
+main.o: main.c \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\io.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\sfr_defs.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\inttypes.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\lib\gcc\avr\4.8.1\include\stdint.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\stdint.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iom168p.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\portpins.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\common.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\version.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\fuse.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\lock.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\math.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\setbaud.h
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\io.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\sfr_defs.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\inttypes.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\lib\gcc\avr\4.8.1\include\stdint.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\stdint.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iom168p.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\portpins.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\common.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\version.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\fuse.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\lock.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\math.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\setbaud.h:
diff --git a/trunk/AVRProjects/ATMega168/Example_Serial/Makefile b/trunk/AVRProjects/ATMega168/Example_Serial/Makefile
new file mode 100644
index 00000000..3cafdd53
--- /dev/null
+++ b/trunk/AVRProjects/ATMega168/Example_Serial/Makefile
@@ -0,0 +1,509 @@
+# Hey Emacs, this is a -*- makefile -*-
+#----------------------------------------------------------------------------
+# WinAVR Makefile Template written by Eric B. Weddington, Jörg Wunsch, et al.
+#
+# Released to the Public Domain
+#
+# Additional material for this makefile was written by:
+# Peter Fleury
+# Tim Henigan
+# Colin O'Flynn
+# Reiner Patommel
+# Markus Pfaff
+# Sander Pool
+# Frederik Rouleau
+#
+#----------------------------------------------------------------------------
+# On command line:
+#
+# make all = Make software.
+#
+# make clean = Clean out built project files.
+#
+# make coff = Convert ELF to AVR COFF.
+#
+# make extcoff = Convert ELF to AVR Extended COFF.
+#
+# make program = Download the hex file to the device, using avrdude.
+#                Please customize the avrdude settings below first!
+#
+# make debug = Start either simulavr or avarice as specified for debugging, 
+#              with avr-gdb or avr-insight as the front end for debugging.
+#
+# make filename.s = Just compile filename.c into the assembler code only.
+#
+# make filename.i = Create a preprocessed source file for use in submitting
+#                   bug reports to the GCC project.
+#
+# To rebuild project do "make clean" then "make all".
+#----------------------------------------------------------------------------
+
+
+# MCU name
+MCU = atmega168
+
+
+# Processor frequency.
+#     This will define a symbol, F_CPU, in all source code files equal to the 
+#     processor frequency. You can then use this symbol in your source code to 
+#     calculate timings. Do NOT tack on a 'UL' at the end, this will be done
+#     automatically to create a 32-bit value in your source code.
+F_CPU = 8000000
+
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+
+# Target file name (without extension).
+TARGET = basic-in-atmega168
+
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = $(TARGET).c
+
+
+# List Assembler source files here.
+#     Make them always end in a capital .S.  Files ending in a lowercase .s
+#     will not be considered source files but generated files (assembler
+#     output from the compiler), and will be deleted upon "make clean"!
+#     Even though the DOS/Win* filesystem matches both .s and .S the same,
+#     it will preserve the spelling of the filenames, and gcc itself does
+#     care about how the name is spelled on its command-line.
+ASRC = 
+
+
+# Optimization level, can be [0, 1, 2, 3, s]. 
+#     0 = turn off optimization. s = optimize for size.
+#     (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+OPT = s
+
+
+# Debugging format.
+#     Native formats for AVR-GCC's -g are dwarf-2 [default] or stabs.
+#     AVR Studio 4.10 requires dwarf-2.
+#     AVR [Extended] COFF format requires stabs, plus an avr-objcopy run.
+DEBUG = dwarf-2
+
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+#     Use forward slashes for directory separators.
+#     For a directory that has spaces, enclose it in quotes.
+EXTRAINCDIRS = 
+
+
+# Compiler flag to set the C Standard level.
+#     c89   = "ANSI" C
+#     gnu89 = c89 plus GCC extensions
+#     c99   = ISO C99 standard (not yet fully implemented)
+#     gnu99 = c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+
+# Place -D or -U options here
+CDEFS = -DF_CPU=$(F_CPU)UL
+
+
+# Place -I options here
+CINCS =
+
+
+
+#---------------- Compiler Options ----------------
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT)
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+CFLAGS += -Wall -Wstrict-prototypes
+CFLAGS += -Wa,-adhlns=$(<:.c=.lst)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+
+
+#---------------- Assembler Options ----------------
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs 
+
+
+#---------------- Library Options ----------------
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+# If this is left blank, then it will use the Standard printf version.
+PRINTF_LIB = 
+#PRINTF_LIB = $(PRINTF_LIB_MIN)
+#PRINTF_LIB = $(PRINTF_LIB_FLOAT)
+
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+# If this is left blank, then it will use the Standard scanf version.
+SCANF_LIB = 
+#SCANF_LIB = $(SCANF_LIB_MIN)
+#SCANF_LIB = $(SCANF_LIB_FLOAT)
+
+
+MATH_LIB = -lm
+
+
+
+#---------------- External Memory Options ----------------
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+
+
+#---------------- Linker Options ----------------
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+
+
+
+#---------------- Programming Options (avrdude) ----------------
+
+# Programming hardware: alf avr910 avrisp bascom bsd 
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+AVRDUDE_PROGRAMMER = stk200
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = lpt1
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude> 
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+#---------------- Debugging Options ----------------
+
+# For simulavr only - target MCU frequency.
+DEBUG_MFREQ = $(F_CPU)
+
+# Set the DEBUG_UI to either gdb or insight.
+# DEBUG_UI = gdb
+DEBUG_UI = insight
+
+# Set the debugging back-end to either avarice, simulavr.
+DEBUG_BACKEND = avarice
+#DEBUG_BACKEND = simulavr
+
+# GDB Init Filename.
+GDBINIT_FILE = __avr_gdbinit
+
+# When using avarice settings for the JTAG
+JTAG_DEV = /dev/com1
+
+# Debugging port used to communicate between GDB / avarice / simulavr.
+DEBUG_PORT = 4242
+
+# Debugging host used to communicate between GDB / avarice / simulavr, normally
+#     just set to localhost unless doing some sort of crazy debugging when 
+#     avarice is running on a different computer.
+DEBUG_HOST = localhost
+
+
+
+#============================================================================
+
+
+# Define programs and commands.
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+WINSHELL = cmd
+
+
+# Define Messages
+# English
+MSG_ERRORS_NONE = Errors: none
+MSG_BEGIN = -------- begin --------
+MSG_END = --------  end  --------
+MSG_SIZE_BEFORE = Size before: 
+MSG_SIZE_AFTER = Size after:
+MSG_COFF = Converting to AVR COFF:
+MSG_EXTENDED_COFF = Converting to AVR Extended COFF:
+MSG_FLASH = Creating load file for Flash:
+MSG_EEPROM = Creating load file for EEPROM:
+MSG_EXTENDED_LISTING = Creating Extended Listing:
+MSG_SYMBOL_TABLE = Creating Symbol Table:
+MSG_LINKING = Linking:
+MSG_COMPILING = Compiling:
+MSG_ASSEMBLING = Assembling:
+MSG_CLEANING = Cleaning project:
+
+
+
+
+# Define all object files.
+OBJ = $(SRC:.c=.o) $(ASRC:.S=.o) 
+
+# Define all listing files.
+LST = $(SRC:.c=.lst) $(ASRC:.S=.lst) 
+
+
+# Compiler flags to generate dependency files.
+GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
+
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS)
+
+
+
+
+
+# Default target.
+all: begin gccversion sizebefore build sizeafter end
+
+build: elf hex eep lss sym
+
+elf: $(TARGET).elf
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss 
+sym: $(TARGET).sym
+
+
+
+# Eye candy.
+# AVR Studio 3.x does not check make's exit code but relies on
+# the following magic strings to be generated by the compile job.
+begin:
+	@echo
+	@echo $(MSG_BEGIN)
+
+end:
+	@echo $(MSG_END)
+	@echo
+
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+AVRMEM = avr-mem.sh $(TARGET).elf $(MCU)
+
+sizebefore:
+	@if test -f $(TARGET).elf; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); \
+	$(AVRMEM) 2>/dev/null; echo; fi
+
+sizeafter:
+	@if test -f $(TARGET).elf; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); \
+	$(AVRMEM) 2>/dev/null; echo; fi
+
+
+
+# Display compiler version information.
+gccversion : 
+	@$(CC) --version
+
+
+
+# Program the device.  
+program: $(TARGET).hex $(TARGET).eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM)
+
+
+# Generate avr-gdb config/init file which does the following:
+#     define the reset signal, load the target file, connect to target, and set 
+#     a breakpoint at main().
+gdb-config: 
+	@$(REMOVE) $(GDBINIT_FILE)
+	@echo define reset >> $(GDBINIT_FILE)
+	@echo SIGNAL SIGHUP >> $(GDBINIT_FILE)
+	@echo end >> $(GDBINIT_FILE)
+	@echo file $(TARGET).elf >> $(GDBINIT_FILE)
+	@echo target remote $(DEBUG_HOST):$(DEBUG_PORT)  >> $(GDBINIT_FILE)
+ifeq ($(DEBUG_BACKEND),simulavr)
+	@echo load  >> $(GDBINIT_FILE)
+endif	
+	@echo break main >> $(GDBINIT_FILE)
+	
+debug: gdb-config $(TARGET).elf
+ifeq ($(DEBUG_BACKEND), avarice)
+	@echo Starting AVaRICE - Press enter when "waiting to connect" message displays.
+	@$(WINSHELL) /c start avarice --jtag $(JTAG_DEV) --erase --program --file \
+	$(TARGET).elf $(DEBUG_HOST):$(DEBUG_PORT)
+	@$(WINSHELL) /c pause
+	
+else
+	@$(WINSHELL) /c start simulavr --gdbserver --device $(MCU) --clock-freq \
+	$(DEBUG_MFREQ) --port $(DEBUG_PORT)
+endif
+	@$(WINSHELL) /c start avr-$(DEBUG_UI) --command=$(GDBINIT_FILE)
+	
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000 
+
+
+coff: $(TARGET).elf
+	@echo
+	@echo $(MSG_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	@echo
+	@echo $(MSG_EXTENDED_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+
+# Create final output files (.hex, .eep) from ELF output file.
+%.hex: %.elf
+	@echo
+	@echo $(MSG_FLASH) $@
+	$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+%.eep: %.elf
+	@echo
+	@echo $(MSG_EEPROM) $@
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+%.lss: %.elf
+	@echo
+	@echo $(MSG_EXTENDED_LISTING) $@
+	$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+%.sym: %.elf
+	@echo
+	@echo $(MSG_SYMBOL_TABLE) $@
+	$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+%.elf: $(OBJ)
+	@echo
+	@echo $(MSG_LINKING) $@
+	$(CC) $(ALL_CFLAGS) $^ --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+%.o : %.c
+	@echo
+	@echo $(MSG_COMPILING) $<
+	$(CC) -c $(ALL_CFLAGS) $< -o $@ 
+
+
+# Compile: create assembler files from C source files.
+%.s : %.c
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+%.o : %.S
+	@echo
+	@echo $(MSG_ASSEMBLING) $<
+	$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+# Create preprocessed source for use in sending a bug report.
+%.i : %.c
+	$(CC) -E -mmcu=$(MCU) -I. $(CFLAGS) $< -o $@ 
+
+
+# Target: clean project.
+clean: begin clean_list end
+
+clean_list :
+	@echo
+	@echo $(MSG_CLEANING)
+	$(REMOVE) $(TARGET).hex
+	$(REMOVE) $(TARGET).eep
+	$(REMOVE) $(TARGET).cof
+	$(REMOVE) $(TARGET).elf
+	$(REMOVE) $(TARGET).map
+	$(REMOVE) $(TARGET).sym
+	$(REMOVE) $(TARGET).lss
+	$(REMOVE) $(OBJ)
+	$(REMOVE) $(LST)
+	$(REMOVE) $(SRC:.c=.s)
+	$(REMOVE) $(SRC:.c=.d)
+	$(REMOVE) .dep/*
+
+
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program debug gdb-config
+
+
+
diff --git a/trunk/AVRProjects/ATMega168/Example_Serial/basic-in-atmega168.c b/trunk/AVRProjects/ATMega168/Example_Serial/basic-in-atmega168.c
new file mode 100644
index 00000000..c72430ba
--- /dev/null
+++ b/trunk/AVRProjects/ATMega168/Example_Serial/basic-in-atmega168.c
@@ -0,0 +1,97 @@
+/*
+    5-10-07
+    Copyright Spark Fun Electronics© 2007
+    Nathan Seidle
+    nathan at sparkfun.com
+    
+    Example basic printf input/output
+*/
+
+#include <stdio.h>
+#include <avr/io.h>
+
+#define FOSC 16000000
+#define BAUD 9600
+#define MYUBRR FOSC/16/BAUD-1
+
+#define sbi(var, mask)   ((var) |= (uint8_t)(1 << mask))
+#define cbi(var, mask)   ((var) &= (uint8_t)~(1 << mask))
+
+#define STATUS_LED 0
+
+//Define functions
+//======================
+void ioinit(void);      // initializes IO
+static int uart_putchar(char c, FILE *stream);
+uint8_t uart_getchar(void);
+
+static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL, _FDEV_SETUP_WRITE);
+
+void delay_ms(uint16_t x); // general purpose delay
+//======================
+
+int main (void)
+{
+	uint8_t key_press;
+	
+    ioinit(); //Setup IO pins and defaults
+
+	printf("Waiting for input:\n");
+
+    while(1)
+    {
+		key_press = uart_getchar();
+		
+		printf("I heard : %c\n", key_press);
+		
+		if(key_press == 'g') printf("  GO!\n");
+		if(key_press == 'X') printf("  EXIT\n");
+		if(key_press == 13) printf("  RETURN\n");
+    }
+   
+    return(0);
+}
+
+void ioinit (void)
+{
+    //1 = output, 0 = input
+    DDRB = 0b11101111; //PB4 = MISO 
+    DDRC = 0b11111111; //
+    DDRD = 0b11111110; //PORTD (RX on PD0)
+
+    //USART Baud rate: 9600
+    UBRR0H = MYUBRR >> 8;
+    UBRR0L = MYUBRR;
+    UCSR0B = (1<<RXEN0)|(1<<TXEN0);
+    
+    stdout = &mystdout; //Required for printf init
+}
+
+static int uart_putchar(char c, FILE *stream)
+{
+    if (c == '\n') uart_putchar('\r', stream);
+  
+    loop_until_bit_is_set(UCSR0A, UDRE0);
+    UDR0 = c;
+    
+    return 0;
+}
+
+uint8_t uart_getchar(void)
+{
+    while( !(UCSR0A & (1<<RXC0)) );
+    return(UDR0);
+}
+
+//General short delays
+void delay_ms(uint16_t x)
+{
+  uint8_t y, z;
+  for ( ; x > 0 ; x--){
+    for ( y = 0 ; y < 80 ; y++){
+      for ( z = 0 ; z < 40 ; z++){
+        asm volatile ("nop");
+      }
+    }
+  }
+}
\ No newline at end of file
diff --git a/trunk/AVRProjects/ATMega168/main.c b/trunk/AVRProjects/ATMega168/main.c
new file mode 100644
index 00000000..675b62df
--- /dev/null
+++ b/trunk/AVRProjects/ATMega168/main.c
@@ -0,0 +1,138 @@
+/* ******************************************************** *
+ *
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016
+ * Author:		Paolo Iocco
+ * ******************************************************** */
+/* ******************************************************** *
+   ATtiny 88 / Mega 168 / Mega 328 Pin map
+                           +-\/-+
+              /Reset PC6  1|o   |28  PC5 ADC5 
+                 RXD PD0  2|    |27  PC4 ADC4
+                 TXD PD1  3|    |26  PC3 ADC3
+                     PD2  4|    |25  PC2 ADC2
+				OC2B PD3  5|    |24  PC1 ADC1
+					 PD4  6|    |23  PC0 ADC0
+					 VCC  7|    |22  GND
+					 GND  8|    |21  AREF
+				OSC1 PB6  9|    |20  VCC
+				OSC2 PB7 10|    |19  PB5 SCK
+				OC0B PD5 11|    |18  PB4 MISO
+		   AIN0 OC0A PD6 12|    |17  PB3 OC2A MOSI
+				AIN1 PD7 13|    |16  PB2 OC1B
+					 PB0 14|    |15  PB1 OC1A
+					       +----+
+* ******************************************************** */
+
+#ifndef F_CPU
+#define F_CPU 8000000
+#endif
+
+#include <avr/io.h>				
+#include <util/delay.h>	
+#define BAUD 9600
+#define m168p
+#include <util/setbaud.h>
+
+/* Definizioni per il m168p */
+#ifdef m168p 
+#define UCSRA UCSR0A
+#define UCSRB UCSR0B
+#define UCSRC UCSR0C
+#define UBRRH UBRR0H
+#define UBRRL UBRR0L
+#define U2X U2X0
+#define UDRE UDRE0
+#define UDR UDR0
+#endif
+/* fine definizioni per il m168p*/
+
+/* Inizializza la porta seriale */
+void uart_init(void)   
+{
+    UBRRH = UBRRH_VALUE;
+   UBRRL = UBRRL_VALUE;
+#if USE_2X0
+   UCSRA |= (1 << U2X);
+#else
+   UCSRA &= ~(1 << U2X);
+#endif
+   
+   UCSRC= _BV(UCSZ01) | _BV(UCSZ00); // 8 N 1
+   UCSRB= (1<<TXEN0); 
+   // UCSRB= (1<<RXEN0)|(1<<TXEN0);
+}
+
+/* uart_putc(): scrive un carattere sulla porta seriale*/
+int uart_putc(unsigned char c)
+{
+    while (!(UCSRA & (1<<UDRE))) { /* warten bis Senden moeglich */
+    }                              
+    UDR = c;                      /* sende Zeichen */
+    return 0;
+}
+
+/* uart_puts(): scrive una stringa sulla porta seriale*/
+void uart_puts (char *s)
+{
+    while (*s) {   
+        uart_putc(*s);
+        s++;
+    }
+}
+
+/* Funzioni oer il display Digole */
+
+/* Main - Programma principale*/
+int main (void)
+{
+    unsigned char zwischenspeicher;
+    DDRC = 0b00000001;
+
+    uart_init();
+    _delay_ms(3000);
+    uart_puts("CL");
+    uart_puts("DSS");
+    uart_putc(0);
+    uart_puts("TT* Love  Silvia *\n");	
+    uart_puts("TRT");
+    uart_puts("TT* Love  Silvia *\n");		
+    uart_puts("TRT");
+    uart_puts("TT* Love  Silvia *\n");	
+    uart_puts("TRT");
+    uart_puts("TT* Love  Silvia *\n");	
+    uart_puts("TRT");
+    uart_puts("TT* Love  Silvia *\n");	
+    uart_puts("TRT");
+    
+    /*
+    uart_puts("SF");
+    uart_putc(6);
+    uart_puts("TT12345678901234567890123456789012\n");
+
+    uart_puts("SF");
+    uart_putc(10);
+    uart_puts("TRT");
+    uart_puts("TT123456789012345678901\n");	
+
+    uart_puts("SF");
+    uart_putc(0);
+    uart_puts("TRT");
+    uart_puts("TT1234567890123456\n");	
+
+    uart_puts("SF");
+    uart_putc(18);
+    uart_puts("TRT");
+    uart_puts("TT12345678901234\n");	
+	*/
+	
+    while(1) {
+      zwischenspeicher = PORTC;
+      zwischenspeicher = zwischenspeicher ^ 0b00000001;
+      PORTC = zwischenspeicher;
+      _delay_ms(500);
+    }
+    return 0;
+}
+
diff --git a/trunk/AVRProjects/ATMega168/main.eep b/trunk/AVRProjects/ATMega168/main.eep
new file mode 100644
index 00000000..1996e8fd
--- /dev/null
+++ b/trunk/AVRProjects/ATMega168/main.eep
@@ -0,0 +1 @@
+:00000001FF
diff --git a/trunk/AVRProjects/ATMega168/main.elf b/trunk/AVRProjects/ATMega168/main.elf
new file mode 100644
index 00000000..f7e44200
Binary files /dev/null and b/trunk/AVRProjects/ATMega168/main.elf differ
diff --git a/trunk/AVRProjects/ATMega168/main.hex b/trunk/AVRProjects/ATMega168/main.hex
new file mode 100644
index 00000000..e84f408d
--- /dev/null
+++ b/trunk/AVRProjects/ATMega168/main.hex
@@ -0,0 +1,28 @@
+:100000000C9434000C9449000C9449000C94490061
+:100010000C9449000C9449000C9449000C9449003C
+:100020000C9449000C9449000C9449000C9449002C
+:100030000C9449000C9449000C9449000C9449001C
+:100040000C9449000C9449000C9449000C9449000C
+:100050000C9449000C9449000C9449000C944900FC
+:100060000C9449000C94490011241FBECFEFD4E03A
+:10007000DEBFCDBF11E0A0E0B1E0E2E8F1E002C0F8
+:1000800005900D92A032B107D9F70E9471000C942F
+:10009000BF000C9400001092C50083E38093C4005D
+:1000A000E0ECF0E080818D7F808386E08093C20069
+:1000B00088E08093C10008959091C00095FFFCCF27
+:1000C0008093C60080E090E00895CF93DF93EC0129
+:1000D0008991882319F00E945C00FACFDF91CF91BB
+:1000E000089581E087B90E944B002FEF3DE389E43A
+:1000F000215030408040E1F700C0000080E091E0F6
+:100100000E94650083E091E00E94650080E00E940B
+:100110005C0087E091E00E9465008BE191E00E9425
+:10012000650087E091E00E9465008BE191E00E940C
+:10013000650087E091E00E9465008BE191E00E94FC
+:10014000650087E091E00E9465008BE191E00E94EC
+:10015000650087E091E00E9465008BE191E00E94DC
+:10016000650091E088B1892788B92FEF34E38CE0EE
+:10017000215030408040E1F700C00000F3CFF894F8
+:02018000FFCFAF
+:10018200434C004453530054542A204C6F7665204C
+:100192002053696C766961202A0A00545254000087
+:00000001FF
diff --git a/trunk/AVRProjects/ATMega168/main.lss b/trunk/AVRProjects/ATMega168/main.lss
new file mode 100644
index 00000000..d1fe584a
--- /dev/null
+++ b/trunk/AVRProjects/ATMega168/main.lss
@@ -0,0 +1,268 @@
+
+main.elf:     file format elf32-avr
+
+Sections:
+Idx Name          Size      VMA       LMA       File off  Algn
+  0 .data         00000020  00800100  00000182  000001f6  2**0
+                  CONTENTS, ALLOC, LOAD, DATA
+  1 .text         00000182  00000000  00000000  00000074  2**1
+                  CONTENTS, ALLOC, LOAD, READONLY, CODE
+  2 .comment      00000011  00000000  00000000  00000216  2**0
+                  CONTENTS, READONLY
+  3 .debug_aranges 00000028  00000000  00000000  00000227  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  4 .debug_info   00000340  00000000  00000000  0000024f  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  5 .debug_abbrev 00000168  00000000  00000000  0000058f  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  6 .debug_line   00000117  00000000  00000000  000006f7  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  7 .debug_frame  00000060  00000000  00000000  00000810  2**2
+                  CONTENTS, READONLY, DEBUGGING
+  8 .debug_str    00000153  00000000  00000000  00000870  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  9 .debug_loc    000000bf  00000000  00000000  000009c3  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 10 .debug_ranges 00000018  00000000  00000000  00000a82  2**0
+                  CONTENTS, READONLY, DEBUGGING
+
+Disassembly of section .text:
+
+00000000 <__vectors>:
+   0:	0c 94 34 00 	jmp	0x68	; 0x68 <__ctors_end>
+   4:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+   8:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+   c:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  10:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  14:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  18:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  1c:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  20:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  24:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  28:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  2c:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  30:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  34:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  38:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  3c:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  40:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  44:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  48:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  4c:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  50:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  54:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  58:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  5c:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  60:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+  64:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
+
+00000068 <__ctors_end>:
+  68:	11 24       	eor	r1, r1
+  6a:	1f be       	out	0x3f, r1	; 63
+  6c:	cf ef       	ldi	r28, 0xFF	; 255
+  6e:	d4 e0       	ldi	r29, 0x04	; 4
+  70:	de bf       	out	0x3e, r29	; 62
+  72:	cd bf       	out	0x3d, r28	; 61
+
+00000074 <__do_copy_data>:
+  74:	11 e0       	ldi	r17, 0x01	; 1
+  76:	a0 e0       	ldi	r26, 0x00	; 0
+  78:	b1 e0       	ldi	r27, 0x01	; 1
+  7a:	e2 e8       	ldi	r30, 0x82	; 130
+  7c:	f1 e0       	ldi	r31, 0x01	; 1
+  7e:	02 c0       	rjmp	.+4      	; 0x84 <__do_copy_data+0x10>
+  80:	05 90       	lpm	r0, Z+
+  82:	0d 92       	st	X+, r0
+  84:	a0 32       	cpi	r26, 0x20	; 32
+  86:	b1 07       	cpc	r27, r17
+  88:	d9 f7       	brne	.-10     	; 0x80 <__do_copy_data+0xc>
+  8a:	0e 94 71 00 	call	0xe2	; 0xe2 <main>
+  8e:	0c 94 bf 00 	jmp	0x17e	; 0x17e <_exit>
+
+00000092 <__bad_interrupt>:
+  92:	0c 94 00 00 	jmp	0	; 0x0 <__vectors>
+
+00000096 <uart_init>:
+/* fine definizioni per il m168p*/
+
+/* Inizializza la porta seriale */
+void uart_init(void)   
+{
+    UBRRH = UBRRH_VALUE;
+  96:	10 92 c5 00 	sts	0x00C5, r1
+   UBRRL = UBRRL_VALUE;
+  9a:	83 e3       	ldi	r24, 0x33	; 51
+  9c:	80 93 c4 00 	sts	0x00C4, r24
+#if USE_2X0
+   UCSRA |= (1 << U2X);
+#else
+   UCSRA &= ~(1 << U2X);
+  a0:	e0 ec       	ldi	r30, 0xC0	; 192
+  a2:	f0 e0       	ldi	r31, 0x00	; 0
+  a4:	80 81       	ld	r24, Z
+  a6:	8d 7f       	andi	r24, 0xFD	; 253
+  a8:	80 83       	st	Z, r24
+#endif
+   
+   UCSRC= _BV(UCSZ01) | _BV(UCSZ00); // 8 N 1
+  aa:	86 e0       	ldi	r24, 0x06	; 6
+  ac:	80 93 c2 00 	sts	0x00C2, r24
+   UCSRB= (1<<TXEN0); 
+  b0:	88 e0       	ldi	r24, 0x08	; 8
+  b2:	80 93 c1 00 	sts	0x00C1, r24
+  b6:	08 95       	ret
+
+000000b8 <uart_putc>:
+}
+
+/* uart_putc(): scrive un carattere sulla porta seriale*/
+int uart_putc(unsigned char c)
+{
+    while (!(UCSRA & (1<<UDRE))) { /* warten bis Senden moeglich */
+  b8:	90 91 c0 00 	lds	r25, 0x00C0
+  bc:	95 ff       	sbrs	r25, 5
+  be:	fc cf       	rjmp	.-8      	; 0xb8 <uart_putc>
+    }                              
+    UDR = c;                      /* sende Zeichen */
+  c0:	80 93 c6 00 	sts	0x00C6, r24
+    return 0;
+}
+  c4:	80 e0       	ldi	r24, 0x00	; 0
+  c6:	90 e0       	ldi	r25, 0x00	; 0
+  c8:	08 95       	ret
+
+000000ca <uart_puts>:
+
+/* uart_puts(): scrive una stringa sulla porta seriale*/
+void uart_puts (char *s)
+{
+  ca:	cf 93       	push	r28
+  cc:	df 93       	push	r29
+  ce:	ec 01       	movw	r28, r24
+    while (*s) {   
+  d0:	89 91       	ld	r24, Y+
+  d2:	88 23       	and	r24, r24
+  d4:	19 f0       	breq	.+6      	; 0xdc <uart_puts+0x12>
+        uart_putc(*s);
+  d6:	0e 94 5c 00 	call	0xb8	; 0xb8 <uart_putc>
+  da:	fa cf       	rjmp	.-12     	; 0xd0 <uart_puts+0x6>
+        s++;
+    }
+}
+  dc:	df 91       	pop	r29
+  de:	cf 91       	pop	r28
+  e0:	08 95       	ret
+
+000000e2 <main>:
+
+/* Main - Programma principale*/
+int main (void)
+{
+    unsigned char zwischenspeicher;
+    DDRC = 0b00000001;
+  e2:	81 e0       	ldi	r24, 0x01	; 1
+  e4:	87 b9       	out	0x07, r24	; 7
+
+    uart_init();
+  e6:	0e 94 4b 00 	call	0x96	; 0x96 <uart_init>
+	#else
+		//round up by default
+		__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
+	#endif
+
+	__builtin_avr_delay_cycles(__ticks_dc);
+  ea:	2f ef       	ldi	r18, 0xFF	; 255
+  ec:	3d e3       	ldi	r19, 0x3D	; 61
+  ee:	89 e4       	ldi	r24, 0x49	; 73
+  f0:	21 50       	subi	r18, 0x01	; 1
+  f2:	30 40       	sbci	r19, 0x00	; 0
+  f4:	80 40       	sbci	r24, 0x00	; 0
+  f6:	e1 f7       	brne	.-8      	; 0xf0 <main+0xe>
+  f8:	00 c0       	rjmp	.+0      	; 0xfa <main+0x18>
+  fa:	00 00       	nop
+    _delay_ms(3000);
+    uart_puts("CL");
+  fc:	80 e0       	ldi	r24, 0x00	; 0
+  fe:	91 e0       	ldi	r25, 0x01	; 1
+ 100:	0e 94 65 00 	call	0xca	; 0xca <uart_puts>
+    uart_puts("DSS");
+ 104:	83 e0       	ldi	r24, 0x03	; 3
+ 106:	91 e0       	ldi	r25, 0x01	; 1
+ 108:	0e 94 65 00 	call	0xca	; 0xca <uart_puts>
+    uart_putc(0);
+ 10c:	80 e0       	ldi	r24, 0x00	; 0
+ 10e:	0e 94 5c 00 	call	0xb8	; 0xb8 <uart_putc>
+    uart_puts("TT* Love  Silvia *\n");	
+ 112:	87 e0       	ldi	r24, 0x07	; 7
+ 114:	91 e0       	ldi	r25, 0x01	; 1
+ 116:	0e 94 65 00 	call	0xca	; 0xca <uart_puts>
+    uart_puts("TRT");
+ 11a:	8b e1       	ldi	r24, 0x1B	; 27
+ 11c:	91 e0       	ldi	r25, 0x01	; 1
+ 11e:	0e 94 65 00 	call	0xca	; 0xca <uart_puts>
+    uart_puts("TT* Love  Silvia *\n");		
+ 122:	87 e0       	ldi	r24, 0x07	; 7
+ 124:	91 e0       	ldi	r25, 0x01	; 1
+ 126:	0e 94 65 00 	call	0xca	; 0xca <uart_puts>
+    uart_puts("TRT");
+ 12a:	8b e1       	ldi	r24, 0x1B	; 27
+ 12c:	91 e0       	ldi	r25, 0x01	; 1
+ 12e:	0e 94 65 00 	call	0xca	; 0xca <uart_puts>
+    uart_puts("TT* Love  Silvia *\n");	
+ 132:	87 e0       	ldi	r24, 0x07	; 7
+ 134:	91 e0       	ldi	r25, 0x01	; 1
+ 136:	0e 94 65 00 	call	0xca	; 0xca <uart_puts>
+    uart_puts("TRT");
+ 13a:	8b e1       	ldi	r24, 0x1B	; 27
+ 13c:	91 e0       	ldi	r25, 0x01	; 1
+ 13e:	0e 94 65 00 	call	0xca	; 0xca <uart_puts>
+    uart_puts("TT* Love  Silvia *\n");	
+ 142:	87 e0       	ldi	r24, 0x07	; 7
+ 144:	91 e0       	ldi	r25, 0x01	; 1
+ 146:	0e 94 65 00 	call	0xca	; 0xca <uart_puts>
+    uart_puts("TRT");
+ 14a:	8b e1       	ldi	r24, 0x1B	; 27
+ 14c:	91 e0       	ldi	r25, 0x01	; 1
+ 14e:	0e 94 65 00 	call	0xca	; 0xca <uart_puts>
+    uart_puts("TT* Love  Silvia *\n");	
+ 152:	87 e0       	ldi	r24, 0x07	; 7
+ 154:	91 e0       	ldi	r25, 0x01	; 1
+ 156:	0e 94 65 00 	call	0xca	; 0xca <uart_puts>
+    uart_puts("TRT");
+ 15a:	8b e1       	ldi	r24, 0x1B	; 27
+ 15c:	91 e0       	ldi	r25, 0x01	; 1
+ 15e:	0e 94 65 00 	call	0xca	; 0xca <uart_puts>
+    uart_puts("TT12345678901234\n");	
+	*/
+	
+    while(1) {
+      zwischenspeicher = PORTC;
+      zwischenspeicher = zwischenspeicher ^ 0b00000001;
+ 162:	91 e0       	ldi	r25, 0x01	; 1
+    uart_puts("TRT");
+    uart_puts("TT12345678901234\n");	
+	*/
+	
+    while(1) {
+      zwischenspeicher = PORTC;
+ 164:	88 b1       	in	r24, 0x08	; 8
+      zwischenspeicher = zwischenspeicher ^ 0b00000001;
+ 166:	89 27       	eor	r24, r25
+      PORTC = zwischenspeicher;
+ 168:	88 b9       	out	0x08, r24	; 8
+ 16a:	2f ef       	ldi	r18, 0xFF	; 255
+ 16c:	34 e3       	ldi	r19, 0x34	; 52
+ 16e:	8c e0       	ldi	r24, 0x0C	; 12
+ 170:	21 50       	subi	r18, 0x01	; 1
+ 172:	30 40       	sbci	r19, 0x00	; 0
+ 174:	80 40       	sbci	r24, 0x00	; 0
+ 176:	e1 f7       	brne	.-8      	; 0x170 <main+0x8e>
+ 178:	00 c0       	rjmp	.+0      	; 0x17a <main+0x98>
+ 17a:	00 00       	nop
+ 17c:	f3 cf       	rjmp	.-26     	; 0x164 <main+0x82>
+
+0000017e <_exit>:
+ 17e:	f8 94       	cli
+
+00000180 <__stop_program>:
+ 180:	ff cf       	rjmp	.-2      	; 0x180 <__stop_program>
diff --git a/trunk/AVRProjects/ATMega168/main.lst b/trunk/AVRProjects/ATMega168/main.lst
new file mode 100644
index 00000000..fe8db4ae
--- /dev/null
+++ b/trunk/AVRProjects/ATMega168/main.lst
@@ -0,0 +1,528 @@
+   1               		.file	"main.c"
+   2               	__SP_H__ = 0x3e
+   3               	__SP_L__ = 0x3d
+   4               	__SREG__ = 0x3f
+   5               	__tmp_reg__ = 0
+   6               	__zero_reg__ = 1
+   7               		.text
+   8               	.Ltext0:
+   9               		.cfi_sections	.debug_frame
+  10               	.global	uart_init
+  12               	uart_init:
+  13               	.LFB6:
+  14               		.file 1 "main.c"
+   1:main.c        **** #ifndef F_CPU
+   2:main.c        **** #define F_CPU 8000000
+   3:main.c        **** #endif
+   4:main.c        **** 
+   5:main.c        **** #include <avr/io.h>				
+   6:main.c        **** #include <util/delay.h>	
+   7:main.c        **** #define BAUD 9600
+   8:main.c        **** #define m168p
+   9:main.c        **** #include <util/setbaud.h>
+  10:main.c        **** 
+  11:main.c        **** /* Definizioni per il m168p */
+  12:main.c        **** #ifdef m168p 
+  13:main.c        **** #define UCSRA UCSR0A
+  14:main.c        **** #define UCSRB UCSR0B
+  15:main.c        **** #define UCSRC UCSR0C
+  16:main.c        **** #define UBRRH UBRR0H
+  17:main.c        **** #define UBRRL UBRR0L
+  18:main.c        **** #define U2X U2X0
+  19:main.c        **** #define UDRE UDRE0
+  20:main.c        **** #define UDR UDR0
+  21:main.c        **** #endif
+  22:main.c        **** /* fine definizioni per il m168p*/
+  23:main.c        **** 
+  24:main.c        **** /* Inizializza la porta seriale */
+  25:main.c        **** void uart_init(void)   
+  26:main.c        **** {
+  15               		.loc 1 26 0
+  16               		.cfi_startproc
+  17               	/* prologue: function */
+  18               	/* frame size = 0 */
+  19               	/* stack size = 0 */
+  20               	.L__stack_usage = 0
+  27:main.c        ****     UBRRH = UBRRH_VALUE;
+  21               		.loc 1 27 0
+  22 0000 1092 C500 		sts 197,__zero_reg__
+  28:main.c        ****    UBRRL = UBRRL_VALUE;
+  23               		.loc 1 28 0
+  24 0004 83E3      		ldi r24,lo8(51)
+  25 0006 8093 C400 		sts 196,r24
+  29:main.c        **** #if USE_2X0
+  30:main.c        ****    UCSRA |= (1 << U2X);
+  31:main.c        **** #else
+  32:main.c        ****    UCSRA &= ~(1 << U2X);
+  26               		.loc 1 32 0
+  27 000a E0EC      		ldi r30,lo8(-64)
+  28 000c F0E0      		ldi r31,0
+  29 000e 8081      		ld r24,Z
+  30 0010 8D7F      		andi r24,lo8(-3)
+  31 0012 8083      		st Z,r24
+  33:main.c        **** #endif
+  34:main.c        ****    
+  35:main.c        ****    UCSRC= _BV(UCSZ01) | _BV(UCSZ00); // 8 N 1
+  32               		.loc 1 35 0
+  33 0014 86E0      		ldi r24,lo8(6)
+  34 0016 8093 C200 		sts 194,r24
+  36:main.c        ****    UCSRB= (1<<TXEN0); 
+  35               		.loc 1 36 0
+  36 001a 88E0      		ldi r24,lo8(8)
+  37 001c 8093 C100 		sts 193,r24
+  38 0020 0895      		ret
+  39               		.cfi_endproc
+  40               	.LFE6:
+  42               	.global	uart_putc
+  44               	uart_putc:
+  45               	.LFB7:
+  37:main.c        ****    // UCSRB= (1<<RXEN0)|(1<<TXEN0);
+  38:main.c        **** }
+  39:main.c        **** 
+  40:main.c        **** /* uart_putc(): scrive un carattere sulla porta seriale*/
+  41:main.c        **** int uart_putc(unsigned char c)
+  42:main.c        **** {
+  46               		.loc 1 42 0
+  47               		.cfi_startproc
+  48               	/* prologue: function */
+  49               	/* frame size = 0 */
+  50               	/* stack size = 0 */
+  51               	.L__stack_usage = 0
+  52               	.LVL0:
+  53               	.L4:
+  43:main.c        ****     while (!(UCSRA & (1<<UDRE))) { /* warten bis Senden moeglich */
+  54               		.loc 1 43 0 discriminator 1
+  55 0022 9091 C000 		lds r25,192
+  56 0026 95FF      		sbrs r25,5
+  57 0028 00C0      		rjmp .L4
+  44:main.c        ****     }                              
+  45:main.c        ****     UDR = c;                      /* sende Zeichen */
+  58               		.loc 1 45 0
+  59 002a 8093 C600 		sts 198,r24
+  46:main.c        ****     return 0;
+  47:main.c        **** }
+  60               		.loc 1 47 0
+  61 002e 80E0      		ldi r24,0
+  62 0030 90E0      		ldi r25,0
+  63               	.LVL1:
+  64 0032 0895      		ret
+  65               		.cfi_endproc
+  66               	.LFE7:
+  68               	.global	uart_puts
+  70               	uart_puts:
+  71               	.LFB8:
+  48:main.c        **** 
+  49:main.c        **** /* uart_puts(): scrive una stringa sulla porta seriale*/
+  50:main.c        **** void uart_puts (char *s)
+  51:main.c        **** {
+  72               		.loc 1 51 0
+  73               		.cfi_startproc
+  74               	.LVL2:
+  75 0034 CF93      		push r28
+  76               	.LCFI0:
+  77               		.cfi_def_cfa_offset 3
+  78               		.cfi_offset 28, -2
+  79 0036 DF93      		push r29
+  80               	.LCFI1:
+  81               		.cfi_def_cfa_offset 4
+  82               		.cfi_offset 29, -3
+  83               	/* prologue: function */
+  84               	/* frame size = 0 */
+  85               	/* stack size = 2 */
+  86               	.L__stack_usage = 2
+  87 0038 EC01      		movw r28,r24
+  88               	.LVL3:
+  89               	.L7:
+  52:main.c        ****     while (*s) {   
+  90               		.loc 1 52 0 discriminator 1
+  91 003a 8991      		ld r24,Y+
+  92               	.LVL4:
+  93 003c 8823      		tst r24
+  94 003e 01F0      		breq .L9
+  53:main.c        ****         uart_putc(*s);
+  95               		.loc 1 53 0
+  96 0040 0E94 0000 		call uart_putc
+  97               	.LVL5:
+  98 0044 00C0      		rjmp .L7
+  99               	.LVL6:
+ 100               	.L9:
+ 101               	/* epilogue start */
+  54:main.c        ****         s++;
+  55:main.c        ****     }
+  56:main.c        **** }
+ 102               		.loc 1 56 0
+ 103 0046 DF91      		pop r29
+ 104 0048 CF91      		pop r28
+ 105               	.LVL7:
+ 106 004a 0895      		ret
+ 107               		.cfi_endproc
+ 108               	.LFE8:
+ 110               		.section	.rodata.str1.1,"aMS",@progbits,1
+ 111               	.LC0:
+ 112 0000 434C 00   		.string	"CL"
+ 113               	.LC1:
+ 114 0003 4453 5300 		.string	"DSS"
+ 115               	.LC2:
+ 116 0007 5454 2A20 		.string	"TT* Love  Silvia *\n"
+ 116      4C6F 7665 
+ 116      2020 5369 
+ 116      6C76 6961 
+ 116      202A 0A00 
+ 117               	.LC3:
+ 118 001b 5452 5400 		.string	"TRT"
+ 119               		.section	.text.startup,"ax",@progbits
+ 120               	.global	main
+ 122               	main:
+ 123               	.LFB9:
+  57:main.c        **** 
+  58:main.c        **** /* Funzioni oer il display Digole */
+  59:main.c        **** 
+  60:main.c        **** /* Main - Programma principale*/
+  61:main.c        **** int main (void)
+  62:main.c        **** {
+ 124               		.loc 1 62 0
+ 125               		.cfi_startproc
+ 126               	/* prologue: function */
+ 127               	/* frame size = 0 */
+ 128               	/* stack size = 0 */
+ 129               	.L__stack_usage = 0
+  63:main.c        ****     unsigned char zwischenspeicher;
+  64:main.c        ****     DDRC = 0b00000001;
+ 130               		.loc 1 64 0
+ 131 0000 81E0      		ldi r24,lo8(1)
+ 132 0002 87B9      		out 0x7,r24
+  65:main.c        **** 
+  66:main.c        ****     uart_init();
+ 133               		.loc 1 66 0
+ 134 0004 0E94 0000 		call uart_init
+ 135               	.LVL8:
+ 136               	.LBB6:
+ 137               	.LBB7:
+ 138               		.file 2 "e:\\progs\\arduino-1.7.4\\hardware\\tools\\avr\\avr\\include\\util\\delay.h"
+   1:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /* Copyright (c) 2002, Marek Michalkiewicz
+   2:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Copyright (c) 2004,2005,2007 Joerg Wunsch
+   3:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Copyright (c) 2007  Florin-Viorel Petrov
+   4:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    All rights reserved.
+   5:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+   6:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Redistribution and use in source and binary forms, with or without
+   7:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    modification, are permitted provided that the following conditions are met:
+   8:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+   9:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    * Redistributions of source code must retain the above copyright
+  10:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      notice, this list of conditions and the following disclaimer.
+  11:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  12:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    * Redistributions in binary form must reproduce the above copyright
+  13:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      notice, this list of conditions and the following disclaimer in
+  14:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      the documentation and/or other materials provided with the
+  15:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      distribution.
+  16:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  17:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    * Neither the name of the copyright holders nor the names of
+  18:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      contributors may be used to endorse or promote products derived
+  19:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      from this software without specific prior written permission.
+  20:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  21:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  22:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  23:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  24:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  25:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  26:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  27:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  28:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  29:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  30:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+  31:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   POSSIBILITY OF SUCH DAMAGE. */
+  32:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  33:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /* $Id$ */
+  34:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  35:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef _UTIL_DELAY_H_
+  36:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #define _UTIL_DELAY_H_ 1
+  37:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  38:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef __HAS_DELAY_CYCLES
+  39:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #define __HAS_DELAY_CYCLES 1
+  40:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  41:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  42:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #include <inttypes.h>
+  43:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #include <util/delay_basic.h>
+  44:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #include <math.h>
+  45:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  46:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /** \file */
+  47:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /** \defgroup util_delay <util/delay.h>: Convenience functions for busy-wait delay loops
+  48:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \code
+  49:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     #define F_CPU 1000000UL  // 1 MHz
+  50:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     //#define F_CPU 14.7456E6
+  51:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     #include <util/delay.h>
+  52:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \endcode
+  53:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  54:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \note As an alternative method, it is possible to pass the
+  55:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     F_CPU macro down to the compiler from the Makefile.
+  56:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     Obviously, in that case, no \c \#define statement should be
+  57:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     used.
+  58:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  59:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     The functions in this header file are wrappers around the basic
+  60:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     busy-wait functions from <util/delay_basic.h>.  They are meant as
+  61:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     convenience functions where actual time values can be specified
+  62:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     rather than a number of cycles to wait for.  The idea behind is
+  63:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     that compile-time constant expressions will be eliminated by
+  64:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     compiler optimization so floating-point expressions can be used
+  65:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     to calculate the number of delay cycles needed based on the CPU
+  66:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     frequency passed by the macro F_CPU.
+  67:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  68:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \note In order for these functions to work as intended, compiler
+  69:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     optimizations <em>must</em> be enabled, and the delay time
+  70:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     <em>must</em> be an expression that is a known constant at
+  71:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     compile-time.  If these requirements are not met, the resulting
+  72:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     delay will be much longer (and basically unpredictable), and
+  73:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     applications that otherwise do not use floating-point calculations
+  74:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     will experience severe code bloat by the floating-point library
+  75:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     routines linked into the application.
+  76:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  77:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     The functions available allow the specification of microsecond, and
+  78:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     millisecond delays directly, using the application-supplied macro
+  79:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     F_CPU as the CPU clock frequency (in Hertz).
+  80:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  81:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** */
+  82:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  83:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #if !defined(__DOXYGEN__)
+  84:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** static inline void _delay_us(double __us) __attribute__((always_inline));
+  85:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** static inline void _delay_ms(double __ms) __attribute__((always_inline));
+  86:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  87:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  88:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef F_CPU
+  89:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /* prevent compiler error by supplying a default */
+  90:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** # warning "F_CPU not defined for <util/delay.h>"
+  91:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** # define F_CPU 1000000UL
+  92:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  93:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  94:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef __OPTIMIZE__
+  95:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** # warning "Compiler optimizations disabled; functions from <util/delay.h> won't work as designed"
+  96:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  97:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  98:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #if __HAS_DELAY_CYCLES && defined(__OPTIMIZE__) && \
+  99:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   !defined(__DELAY_BACKWARD_COMPATIBLE__) &&	   \
+ 100:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   __STDC_HOSTED__
+ 101:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #  include <math.h>
+ 102:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+ 103:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 104:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /**
+ 105:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    \ingroup util_delay
+ 106:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 107:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Perform a delay of \c __ms milliseconds, using _delay_loop_2().
+ 108:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 109:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    The macro F_CPU is supposed to be defined to a
+ 110:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    constant defining the CPU clock frequency (in Hertz).
+ 111:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 112:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    The maximal possible delay is 262.14 ms / F_CPU in MHz.
+ 113:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 114:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    When the user request delay which exceed the maximum possible one,
+ 115:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    _delay_ms() provides a decreased resolution functionality. In this
+ 116:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    mode _delay_ms() will work with a resolution of 1/10 ms, providing
+ 117:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    delays up to 6.5535 seconds (independent from CPU frequency).  The
+ 118:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    user will not be informed about decreased resolution.
+ 119:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 120:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    If the avr-gcc toolchain has __builtin_avr_delay_cycles(unsigned long)
+ 121:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    support, maximal possible delay is 4294967.295 ms/ F_CPU in MHz. For
+ 122:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    values greater than the maximal possible delay, overflows results in
+ 123:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    no delay i.e., 0ms.
+ 124:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 125:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Conversion of __us into clock cycles may not always result in integer.
+ 126:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    By default, the clock cycles rounded up to next integer. This ensures that
+ 127:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    the user gets atleast __us microseconds of delay.
+ 128:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 129:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Alternatively, user can define __DELAY_ROUND_DOWN__ and __DELAY_ROUND_CLOSEST__
+ 130:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    to round down and round to closest integer.
+ 131:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 132:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Note: The new implementation of _delay_ms(double __ms) with 
+ 133:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     __builtin_avr_delay_cycles(unsigned long) support is not backward compatible. 
+ 134:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    User can define __DELAY_BACKWARD_COMPATIBLE__ to get a backward compatible delay.
+ 135:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Also, the backward compatible
+ 136:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    algorithm will be chosen if the code is compiled in a <em>freestanding
+ 137:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    environment</em> (GCC option \c -ffreestanding), as the math functions
+ 138:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    required for rounding are not available to the compiler then.
+ 139:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 140:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****  */
+ 141:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** void
+ 142:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** _delay_ms(double __ms)
+ 143:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** {
+ 144:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	double __tmp ; 
+ 145:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #if __HAS_DELAY_CYCLES && defined(__OPTIMIZE__) && \
+ 146:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   !defined(__DELAY_BACKWARD_COMPATIBLE__) &&	   \
+ 147:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   __STDC_HOSTED__
+ 148:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	uint32_t __ticks_dc;
+ 149:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	extern void __builtin_avr_delay_cycles(unsigned long);
+ 150:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	__tmp = ((F_CPU) / 1e3) * __ms;
+ 151:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 152:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#if defined(__DELAY_ROUND_DOWN__)
+ 153:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		__ticks_dc = (uint32_t)fabs(__tmp);
+ 154:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 155:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#elif defined(__DELAY_ROUND_CLOSEST__)
+ 156:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		__ticks_dc = (uint32_t)(fabs(__tmp)+0.5);
+ 157:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 158:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#else
+ 159:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		//round up by default
+ 160:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
+ 161:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#endif
+ 162:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 163:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	__builtin_avr_delay_cycles(__ticks_dc);
+ 139               		.loc 2 163 0
+ 140 0008 2FEF      		ldi r18,lo8(4799999)
+ 141 000a 3DE3      		ldi r19,hi8(4799999)
+ 142 000c 89E4      		ldi r24,hlo8(4799999)
+ 143 000e 2150      		1: subi r18,1
+ 144 0010 3040      		sbci r19,0
+ 145 0012 8040      		sbci r24,0
+ 146 0014 01F4      		brne 1b
+ 147 0016 00C0      		rjmp .
+ 148 0018 0000      		nop
+ 149               	.LBE7:
+ 150               	.LBE6:
+  67:main.c        ****     _delay_ms(3000);
+  68:main.c        ****     uart_puts("CL");
+ 151               		.loc 1 68 0
+ 152 001a 80E0      		ldi r24,lo8(.LC0)
+ 153 001c 90E0      		ldi r25,hi8(.LC0)
+ 154 001e 0E94 0000 		call uart_puts
+ 155               	.LVL9:
+  69:main.c        ****     uart_puts("DSS");
+ 156               		.loc 1 69 0
+ 157 0022 80E0      		ldi r24,lo8(.LC1)
+ 158 0024 90E0      		ldi r25,hi8(.LC1)
+ 159 0026 0E94 0000 		call uart_puts
+ 160               	.LVL10:
+  70:main.c        ****     uart_putc(0);
+ 161               		.loc 1 70 0
+ 162 002a 80E0      		ldi r24,0
+ 163 002c 0E94 0000 		call uart_putc
+ 164               	.LVL11:
+  71:main.c        ****     uart_puts("TT* Love  Silvia *\n");	
+ 165               		.loc 1 71 0
+ 166 0030 80E0      		ldi r24,lo8(.LC2)
+ 167 0032 90E0      		ldi r25,hi8(.LC2)
+ 168 0034 0E94 0000 		call uart_puts
+ 169               	.LVL12:
+  72:main.c        ****     uart_puts("TRT");
+ 170               		.loc 1 72 0
+ 171 0038 80E0      		ldi r24,lo8(.LC3)
+ 172 003a 90E0      		ldi r25,hi8(.LC3)
+ 173 003c 0E94 0000 		call uart_puts
+ 174               	.LVL13:
+  73:main.c        ****     uart_puts("TT* Love  Silvia *\n");		
+ 175               		.loc 1 73 0
+ 176 0040 80E0      		ldi r24,lo8(.LC2)
+ 177 0042 90E0      		ldi r25,hi8(.LC2)
+ 178 0044 0E94 0000 		call uart_puts
+ 179               	.LVL14:
+  74:main.c        ****     uart_puts("TRT");
+ 180               		.loc 1 74 0
+ 181 0048 80E0      		ldi r24,lo8(.LC3)
+ 182 004a 90E0      		ldi r25,hi8(.LC3)
+ 183 004c 0E94 0000 		call uart_puts
+ 184               	.LVL15:
+  75:main.c        ****     uart_puts("TT* Love  Silvia *\n");	
+ 185               		.loc 1 75 0
+ 186 0050 80E0      		ldi r24,lo8(.LC2)
+ 187 0052 90E0      		ldi r25,hi8(.LC2)
+ 188 0054 0E94 0000 		call uart_puts
+ 189               	.LVL16:
+  76:main.c        ****     uart_puts("TRT");
+ 190               		.loc 1 76 0
+ 191 0058 80E0      		ldi r24,lo8(.LC3)
+ 192 005a 90E0      		ldi r25,hi8(.LC3)
+ 193 005c 0E94 0000 		call uart_puts
+ 194               	.LVL17:
+  77:main.c        ****     uart_puts("TT* Love  Silvia *\n");	
+ 195               		.loc 1 77 0
+ 196 0060 80E0      		ldi r24,lo8(.LC2)
+ 197 0062 90E0      		ldi r25,hi8(.LC2)
+ 198 0064 0E94 0000 		call uart_puts
+ 199               	.LVL18:
+  78:main.c        ****     uart_puts("TRT");
+ 200               		.loc 1 78 0
+ 201 0068 80E0      		ldi r24,lo8(.LC3)
+ 202 006a 90E0      		ldi r25,hi8(.LC3)
+ 203 006c 0E94 0000 		call uart_puts
+ 204               	.LVL19:
+  79:main.c        ****     uart_puts("TT* Love  Silvia *\n");	
+ 205               		.loc 1 79 0
+ 206 0070 80E0      		ldi r24,lo8(.LC2)
+ 207 0072 90E0      		ldi r25,hi8(.LC2)
+ 208 0074 0E94 0000 		call uart_puts
+ 209               	.LVL20:
+  80:main.c        ****     uart_puts("TRT");
+ 210               		.loc 1 80 0
+ 211 0078 80E0      		ldi r24,lo8(.LC3)
+ 212 007a 90E0      		ldi r25,hi8(.LC3)
+ 213 007c 0E94 0000 		call uart_puts
+ 214               	.LVL21:
+  81:main.c        ****     
+  82:main.c        ****     /*
+  83:main.c        ****     uart_puts("SF");
+  84:main.c        ****     uart_putc(6);
+  85:main.c        ****     uart_puts("TT12345678901234567890123456789012\n");
+  86:main.c        **** 
+  87:main.c        ****     uart_puts("SF");
+  88:main.c        ****     uart_putc(10);
+  89:main.c        ****     uart_puts("TRT");
+  90:main.c        ****     uart_puts("TT123456789012345678901\n");	
+  91:main.c        **** 
+  92:main.c        ****     uart_puts("SF");
+  93:main.c        ****     uart_putc(0);
+  94:main.c        ****     uart_puts("TRT");
+  95:main.c        ****     uart_puts("TT1234567890123456\n");	
+  96:main.c        **** 
+  97:main.c        ****     uart_puts("SF");
+  98:main.c        ****     uart_putc(18);
+  99:main.c        ****     uart_puts("TRT");
+ 100:main.c        ****     uart_puts("TT12345678901234\n");	
+ 101:main.c        **** 	*/
+ 102:main.c        **** 	
+ 103:main.c        ****     while(1) {
+ 104:main.c        ****       zwischenspeicher = PORTC;
+ 105:main.c        ****       zwischenspeicher = zwischenspeicher ^ 0b00000001;
+ 215               		.loc 1 105 0
+ 216 0080 91E0      		ldi r25,lo8(1)
+ 217               	.L11:
+ 104:main.c        ****       zwischenspeicher = zwischenspeicher ^ 0b00000001;
+ 218               		.loc 1 104 0 discriminator 1
+ 219 0082 88B1      		in r24,0x8
+ 220               	.LVL22:
+ 221               		.loc 1 105 0 discriminator 1
+ 222 0084 8927      		eor r24,r25
+ 223               	.LVL23:
+ 106:main.c        ****       PORTC = zwischenspeicher;
+ 224               		.loc 1 106 0 discriminator 1
+ 225 0086 88B9      		out 0x8,r24
+ 226               	.LVL24:
+ 227               	.LBB8:
+ 228               	.LBB9:
+ 229               		.loc 2 163 0 discriminator 1
+ 230 0088 2FEF      		ldi r18,lo8(799999)
+ 231 008a 34E3      		ldi r19,hi8(799999)
+ 232 008c 8CE0      		ldi r24,hlo8(799999)
+ 233 008e 2150      		1: subi r18,1
+ 234 0090 3040      		sbci r19,0
+ 235 0092 8040      		sbci r24,0
+ 236 0094 01F4      		brne 1b
+ 237               	.LVL25:
+ 238 0096 00C0      		rjmp .
+ 239 0098 0000      		nop
+ 240 009a 00C0      		rjmp .L11
+ 241               	.LBE9:
+ 242               	.LBE8:
+ 243               		.cfi_endproc
+ 244               	.LFE9:
+ 246               		.text
+ 247               	.Letext0:
+ 248               		.file 3 "e:\\progs\\arduino-1.7.4\\hardware\\tools\\avr\\avr\\include\\stdint.h"
+DEFINED SYMBOLS
+                            *ABS*:00000000 main.c
+C:\Users\q242695\AppData\Local\Temp\cc4MGEr5.s:2      *ABS*:0000003e __SP_H__
+C:\Users\q242695\AppData\Local\Temp\cc4MGEr5.s:3      *ABS*:0000003d __SP_L__
+C:\Users\q242695\AppData\Local\Temp\cc4MGEr5.s:4      *ABS*:0000003f __SREG__
+C:\Users\q242695\AppData\Local\Temp\cc4MGEr5.s:5      *ABS*:00000000 __tmp_reg__
+C:\Users\q242695\AppData\Local\Temp\cc4MGEr5.s:6      *ABS*:00000001 __zero_reg__
+C:\Users\q242695\AppData\Local\Temp\cc4MGEr5.s:12     .text:00000000 uart_init
+C:\Users\q242695\AppData\Local\Temp\cc4MGEr5.s:44     .text:00000022 uart_putc
+C:\Users\q242695\AppData\Local\Temp\cc4MGEr5.s:70     .text:00000034 uart_puts
+C:\Users\q242695\AppData\Local\Temp\cc4MGEr5.s:122    .text.startup:00000000 main
+
+UNDEFINED SYMBOLS
+__do_copy_data
diff --git a/trunk/AVRProjects/ATMega168/main.map b/trunk/AVRProjects/ATMega168/main.map
new file mode 100644
index 00000000..4570ca14
--- /dev/null
+++ b/trunk/AVRProjects/ATMega168/main.map
@@ -0,0 +1,463 @@
+Archive member included to satisfy reference by file (symbol)
+
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a(_exit.o)
+                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o (exit)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a(_copy_data.o)
+                              main.o (__do_copy_data)
+
+Memory Configuration
+
+Name             Origin             Length             Attributes
+text             0x00000000         0x00020000         xr
+data             0x00800060         0x0000ffa0         rw !x
+eeprom           0x00810000         0x00010000         rw !x
+fuse             0x00820000         0x00000400         rw !x
+lock             0x00830000         0x00000400         rw !x
+signature        0x00840000         0x00000400         rw !x
+*default*        0x00000000         0xffffffff
+
+Linker script and memory map
+
+Address of section .data set to 0x800100
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+LOAD main.o
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5\libm.a
+START GROUP
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5\libm.a
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5\libc.a
+END GROUP
+
+.hash
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+ *(.gnu.version_r)
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+ *(.vectors)
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+                0x00000000                __vector_default
+                0x00000000                __vectors
+ *(.vectors)
+ *(.progmem.gcc*)
+                0x00000068                . = ALIGN (0x2)
+                0x00000068                __trampolines_start = .
+ *(.trampolines)
+ .trampolines   0x00000068        0x0 linker stubs
+ *(.trampolines*)
+                0x00000068                __trampolines_end = .
+ *(.progmem*)
+                0x00000068                . = ALIGN (0x2)
+ *(.jumptables)
+ *(.jumptables*)
+ *(.lowtext)
+ *(.lowtext*)
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+ *(.ctors)
+                0x00000068                __ctors_end = .
+                0x00000068                __dtors_start = .
+ *(.dtors)
+                0x00000068                __dtors_end = .
+ SORT(*)(.ctors)
+ SORT(*)(.dtors)
+ *(.init0)
+ .init0         0x00000068        0x0 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+                0x00000068                __init
+ *(.init0)
+ *(.init1)
+ *(.init1)
+ *(.init2)
+ .init2         0x00000068        0xc e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+ *(.init2)
+ *(.init3)
+ *(.init3)
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+                0x00000074                __do_copy_data
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+ *(.init9)
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+                0x00000092                __vector_22
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+                0x00000092                __vector_16
+                0x00000092                __vector_18
+                0x00000092                __vector_20
+ .text          0x00000096       0x4c main.o
+                0x00000096                uart_init
+                0x000000b8                uart_putc
+                0x000000ca                uart_puts
+ .text          0x000000e2        0x0 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a(_exit.o)
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+                0x000000e2                . = ALIGN (0x2)
+ *(.text.*)
+ .text.startup  0x000000e2       0x9c main.o
+                0x000000e2                main
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+ .text.libgcc.div
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+ .text.libgcc   0x0000017e        0x0 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a(_exit.o)
+ .text.libgcc.prologue
+                0x0000017e        0x0 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a(_exit.o)
+ .text.libgcc.builtins
+                0x0000017e        0x0 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a(_exit.o)
+ .text.libgcc.fmul
+                0x0000017e        0x0 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a(_exit.o)
+ .text.libgcc.fixed
+                0x0000017e        0x0 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a(_exit.o)
+ .text.libgcc.mul
+                0x0000017e        0x0 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a(_copy_data.o)
+ .text.libgcc.div
+                0x0000017e        0x0 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a(_copy_data.o)
+ .text.libgcc   0x0000017e        0x0 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a(_copy_data.o)
+ .text.libgcc.prologue
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+ .text.libgcc.builtins
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+ .text.libgcc.fmul
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+ .text.libgcc.fixed
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+                0x0000017e                exit
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+ *(.fini0)
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+
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+ *(.data*)
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+                0x00800100       0x1f main.o
+ *(.gnu.linkonce.d*)
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+                0x00800120                PROVIDE (__data_end, .)
+
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+ *(.bss)
+ .bss           0x00800120        0x0 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+ .bss           0x00800120        0x0 main.o
+ .bss           0x00800120        0x0 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a(_exit.o)
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+ *(.bss*)
+ *(COMMON)
+                0x00800120                PROVIDE (__bss_end, .)
+                0x00000182                __data_load_start = LOADADDR (.data)
+                0x000001a2                __data_load_end = (__data_load_start + SIZEOF (.data))
+
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+
+.stab.index
+ *(.stab.index)
+
+.stab.indexstr
+ *(.stab.indexstr)
+
+.comment        0x00000000       0x11
+ *(.comment)
+ .comment       0x00000000       0x11 main.o
+                                 0x12 (size before relaxing)
+
+.note.gnu.build-id
+ *(.note.gnu.build-id)
+
+.debug
+ *(.debug)
+
+.line
+ *(.line)
+
+.debug_srcinfo
+ *(.debug_srcinfo)
+
+.debug_sfnames
+ *(.debug_sfnames)
+
+.debug_aranges  0x00000000       0x28
+ *(.debug_aranges)
+ .debug_aranges
+                0x00000000       0x28 main.o
+
+.debug_pubnames
+ *(.debug_pubnames)
+
+.debug_info     0x00000000      0x340
+ *(.debug_info .gnu.linkonce.wi.*)
+ .debug_info    0x00000000      0x340 main.o
+
+.debug_abbrev   0x00000000      0x168
+ *(.debug_abbrev)
+ .debug_abbrev  0x00000000      0x168 main.o
+
+.debug_line     0x00000000      0x117
+ *(.debug_line .debug_line.* .debug_line_end)
+ .debug_line    0x00000000      0x117 main.o
+
+.debug_frame    0x00000000       0x60
+ *(.debug_frame)
+ .debug_frame   0x00000000       0x60 main.o
+
+.debug_str      0x00000000      0x153
+ *(.debug_str)
+ .debug_str     0x00000000      0x153 main.o
+                                0x18c (size before relaxing)
+
+.debug_loc      0x00000000       0xbf
+ *(.debug_loc)
+ .debug_loc     0x00000000       0xbf main.o
+
+.debug_macinfo
+ *(.debug_macinfo)
+
+.debug_weaknames
+ *(.debug_weaknames)
+
+.debug_funcnames
+ *(.debug_funcnames)
+
+.debug_typenames
+ *(.debug_typenames)
+
+.debug_varnames
+ *(.debug_varnames)
+
+.debug_pubtypes
+ *(.debug_pubtypes)
+
+.debug_ranges   0x00000000       0x18
+ *(.debug_ranges)
+ .debug_ranges  0x00000000       0x18 main.o
+
+.debug_macro
+ *(.debug_macro)
+OUTPUT(main.elf elf32-avr)
+LOAD linker stubs
+
+Cross Reference Table
+
+Symbol                                            File
+__bad_interrupt                                   e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__data_end                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a(_copy_data.o)
+__data_load_start                                 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a(_copy_data.o)
+__data_start                                      e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a(_copy_data.o)
+__do_copy_data                                    e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a(_copy_data.o)
+                                                  main.o
+__heap_end                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__init                                            e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__stack                                           e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_1                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_10                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_11                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_12                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_13                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_14                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_15                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_16                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_17                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_18                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_19                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_2                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_20                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_21                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_22                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_23                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_24                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_25                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_3                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_4                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_5                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_6                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_7                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_8                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_9                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vector_default                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+__vectors                                         e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+_exit                                             e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a(_exit.o)
+exit                                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a(_exit.o)
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+main                                              main.o
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm168p.o
+uart_init                                         main.o
+uart_putc                                         main.o
+uart_puts                                         main.o
diff --git a/trunk/AVRProjects/ATMega168/main.sym b/trunk/AVRProjects/ATMega168/main.sym
new file mode 100644
index 00000000..2f4691d7
--- /dev/null
+++ b/trunk/AVRProjects/ATMega168/main.sym
@@ -0,0 +1,58 @@
+00000000 W __heap_end
+00000000 a __tmp_reg__
+00000000 W __vector_default
+00000000 T __vectors
+00000001 a __zero_reg__
+0000003d a __SP_L__
+0000003e a __SP_H__
+0000003f a __SREG__
+00000068 T __ctors_end
+00000068 T __ctors_start
+00000068 T __dtors_end
+00000068 T __dtors_start
+00000068 W __init
+00000068 T __trampolines_end
+00000068 T __trampolines_start
+00000074 T __do_copy_data
+00000092 T __bad_interrupt
+00000092 W __vector_1
+00000092 W __vector_10
+00000092 W __vector_11
+00000092 W __vector_12
+00000092 W __vector_13
+00000092 W __vector_14
+00000092 W __vector_15
+00000092 W __vector_16
+00000092 W __vector_17
+00000092 W __vector_18
+00000092 W __vector_19
+00000092 W __vector_2
+00000092 W __vector_20
+00000092 W __vector_21
+00000092 W __vector_22
+00000092 W __vector_23
+00000092 W __vector_24
+00000092 W __vector_25
+00000092 W __vector_3
+00000092 W __vector_4
+00000092 W __vector_5
+00000092 W __vector_6
+00000092 W __vector_7
+00000092 W __vector_8
+00000092 W __vector_9
+00000096 T uart_init
+000000b8 T uart_putc
+000000ca T uart_puts
+000000e2 T main
+0000017e T _exit
+0000017e W exit
+00000180 t __stop_program
+00000182 A __data_load_start
+00000182 T _etext
+000001a2 A __data_load_end
+000004ff W __stack
+00800100 D __data_start
+00800120 D __data_end
+00800120 D _edata
+00800120 T _end
+00810000 T __eeprom_end
diff --git a/trunk/AVRProjects/ATMega168/makefile b/trunk/AVRProjects/ATMega168/makefile
new file mode 100644
index 00000000..bdfdd783
--- /dev/null
+++ b/trunk/AVRProjects/ATMega168/makefile
@@ -0,0 +1,441 @@
+# Hey Emacs, this is a -*- makefile -*-
+#
+# WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al.
+# Released to the Public Domain
+# Please read the make user manual!
+#
+# Additional material for this makefile was submitted by:
+#  Tim Henigan
+#  Peter Fleury
+#  Reiner Patommel
+#  Sander Pool
+#  Frederik Rouleau
+#  Markus Pfaff
+#
+# On command line:
+#
+# make all = Make software.
+#
+# make clean = Clean out built project files.
+#
+# make coff = Convert ELF to AVR COFF (for use with AVR Studio 3.x or VMLAB).
+#
+# make extcoff = Convert ELF to AVR Extended COFF (for use with AVR Studio
+#                4.07 or greater).
+#
+# make program = Download the hex file to the device, using avrdude.  Please
+#                customize the avrdude settings below first!
+#
+# make filename.s = Just compile filename.c into the assembler code only
+#
+# To rebuild project do "make clean" then "make all".
+#
+
+# mth 2004/09 
+# Differences from WinAVR 20040720 sample:
+# - DEPFLAGS according to Eric Weddingtion's fix (avrfreaks/gcc-forum)
+# - F_OSC Define in CFLAGS and AFLAGS
+
+
+# MCU name
+MCU = atmega168p
+
+# Main Oscillator Frequency
+# This is only used to define F_OSC in all assembler and c-sources.
+F_OSC = 8000000
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+# Target file name (without extension).
+TARGET = main
+
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = $(TARGET).c
+
+
+# List Assembler source files here.
+# Make them always end in a capital .S.  Files ending in a lowercase .s
+# will not be considered source files but generated files (assembler
+# output from the compiler), and will be deleted upon "make clean"!
+# Even though the DOS/Win* filesystem matches both .s and .S the same,
+# it will preserve the spelling of the filenames, and gcc itself does
+# care about how the name is spelled on its command-line.
+ASRC = 
+
+
+
+# Optimization level, can be [0, 1, 2, 3, s]. 
+# 0 = turn off optimization. s = optimize for size.
+# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+OPT = s
+
+# Debugging format.
+# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
+# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
+#DEBUG = stabs
+DEBUG = dwarf-2
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+EXTRAINCDIRS = 
+
+
+# Compiler flag to set the C Standard level.
+# c89   - "ANSI" C
+# gnu89 - c89 plus GCC extensions
+# c99   - ISO C99 standard (not yet fully implemented)
+# gnu99 - c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+# Place -D or -U options here
+CDEFS =
+
+# Place -I options here
+CINCS =
+
+
+# Compiler flags.
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT)
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+CFLAGS += -Wall -Wstrict-prototypes
+CFLAGS += -Wa,-adhlns=$(<:.c=.lst)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+CFLAGS += -DF_OSC=$(F_OSC)
+
+
+
+# Assembler flags.
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs 
+ASFLAGS += -DF_OSC=$(F_OSC)
+
+
+#Additional libraries.
+
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+PRINTF_LIB = 
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+SCANF_LIB = 
+
+MATH_LIB = -lm
+
+# External memory options
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+# Linker flags.
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+
+
+
+
+# Programming support using avrdude. Settings and variables.
+
+# Programming hardware: alf avr910 avrisp bascom bsd 
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+#AVRDUDE_PROGRAMMER = stk500
+AVRDUDE_PROGRAMMER = usbasp
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = usb    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude> 
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+# ---------------------------------------------------------------------------
+
+# Define directories, if needed.
+DIRAVR = c:/winavr
+DIRAVRBIN = $(DIRAVR)/bin
+DIRAVRUTILS = $(DIRAVR)/utils/bin
+DIRINC = .
+DIRLIB = $(DIRAVR)/avr/lib
+
+
+# Define programs and commands.
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+
+
+
+
+# Define Messages
+# English
+MSG_ERRORS_NONE = Errors: none
+MSG_BEGIN = -------- begin --------
+MSG_END = --------  end  --------
+MSG_SIZE_BEFORE = Size before: 
+MSG_SIZE_AFTER = Size after:
+MSG_COFF = Converting to AVR COFF:
+MSG_EXTENDED_COFF = Converting to AVR Extended COFF:
+MSG_FLASH = Creating load file for Flash:
+MSG_EEPROM = Creating load file for EEPROM:
+MSG_EXTENDED_LISTING = Creating Extended Listing:
+MSG_SYMBOL_TABLE = Creating Symbol Table:
+MSG_LINKING = Linking:
+MSG_COMPILING = Compiling:
+MSG_ASSEMBLING = Assembling:
+MSG_CLEANING = Cleaning project:
+
+
+
+
+# Define all object files.
+OBJ = $(SRC:.c=.o) $(ASRC:.S=.o) 
+
+# Define all listing files.
+LST = $(ASRC:.S=.lst) $(SRC:.c=.lst)
+
+
+# Compiler flags to generate dependency files.
+### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
+GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS)
+
+
+
+
+
+# Default target.
+#all: begin gccversion sizebefore build sizeafter finished end
+all: begin gccversion build size finished end
+
+build: elf hex eep lss sym
+
+elf: $(TARGET).elf
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss 
+sym: $(TARGET).sym
+
+
+
+# Eye candy.
+# AVR Studio 3.x does not check make's exit code but relies on
+# the following magic strings to be generated by the compile job.
+begin:
+	@echo
+	@echo $(MSG_BEGIN)
+
+finished:
+	@echo $(MSG_ERRORS_NONE)
+
+end:
+	@echo $(MSG_END)
+	@echo
+
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+sizebefore:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
+
+sizeafter:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
+
+size:
+	$(SIZE) -C --mcu=$(MCU) $(TARGET).elf
+
+# Display compiler version information.
+gccversion : 
+	@$(CC) --version
+
+
+
+# Program the device.  
+program: $(TARGET).hex $(TARGET).eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM)
+
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000 
+
+
+coff: $(TARGET).elf
+	@echo
+	@echo $(MSG_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	@echo
+	@echo $(MSG_EXTENDED_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+
+# Create final output files (.hex, .eep) from ELF output file.
+%.hex: %.elf
+	@echo
+	@echo $(MSG_FLASH) $@
+	$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+%.eep: %.elf
+	@echo
+	@echo $(MSG_EEPROM) $@
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+%.lss: %.elf
+	@echo
+	@echo $(MSG_EXTENDED_LISTING) $@
+	$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+%.sym: %.elf
+	@echo
+	@echo $(MSG_SYMBOL_TABLE) $@
+	$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+%.elf: $(OBJ)
+	@echo
+	@echo $(MSG_LINKING) $@
+	$(CC) $(ALL_CFLAGS) $(OBJ) --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+%.o : %.c
+	@echo
+	@echo $(MSG_COMPILING) $<
+	$(CC) -c $(ALL_CFLAGS) $< -o $@ 
+
+
+# Compile: create assembler files from C source files.
+%.s : %.c
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+%.o : %.S
+	@echo
+	@echo $(MSG_ASSEMBLING) $<
+	$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+
+
+# Target: clean project.
+clean: begin clean_list finished end
+
+clean_list :
+	@echo
+	@echo $(MSG_CLEANING)
+	$(REMOVE) $(TARGET).hex
+	$(REMOVE) $(TARGET).eep
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).cof
+	$(REMOVE) $(TARGET).elf
+	$(REMOVE) $(TARGET).map
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).a90
+	$(REMOVE) $(TARGET).sym
+	$(REMOVE) $(TARGET).lnk
+	$(REMOVE) $(TARGET).lss
+	$(REMOVE) $(OBJ)
+	$(REMOVE) $(LST)
+	$(REMOVE) $(SRC:.c=.s)
+	$(REMOVE) $(SRC:.c=.d)
+	$(REMOVE) .dep/*
+
+
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program
+ 
+
+ 
diff --git a/trunk/AVRProjects/ATMega328/.dep/main.o.d b/trunk/AVRProjects/ATMega328/.dep/main.o.d
new file mode 100644
index 00000000..531adca1
--- /dev/null
+++ b/trunk/AVRProjects/ATMega328/.dep/main.o.d
@@ -0,0 +1,46 @@
+main.o: main.c \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\io.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\sfr_defs.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\inttypes.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\lib\gcc\avr\4.8.1\include\stdint.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\stdint.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iom328.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iom328p.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\portpins.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\common.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\version.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\fuse.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\lock.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\math.h
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\io.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\sfr_defs.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\inttypes.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\lib\gcc\avr\4.8.1\include\stdint.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\stdint.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iom328.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iom328p.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\portpins.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\common.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\version.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\fuse.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\lock.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\math.h:
diff --git a/trunk/AVRProjects/ATMega328/main.c b/trunk/AVRProjects/ATMega328/main.c
new file mode 100644
index 00000000..9d1b2c72
--- /dev/null
+++ b/trunk/AVRProjects/ATMega328/main.c
@@ -0,0 +1,44 @@
+/* ******************************************************** *
+ *
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016
+ * Author:		Paolo Iocco
+ * ******************************************************** */
+/* ******************************************************** *
+   ATtiny 88 / Mega 168 / Mega 328 Pin map
+                           +-\/-+
+              /Reset PC6  1|o   |28  PC5 ADC5 
+                 RXD PD0  2|    |27  PC4 ADC4
+                 TXD PD1  3|    |26  PC3 ADC3
+                     PD2  4|    |25  PC2 ADC2
+				OC2B PD3  5|    |24  PC1 ADC1
+					 PD4  6|    |23  PC0 ADC0
+					 VCC  7|    |22  GND
+					 GND  8|    |21  AREF
+				OSC1 PB6  9|    |20  VCC
+				OSC2 PB7 10|    |19  PB5 SCK
+				OC0B PD5 11|    |18  PB4 MISO
+		   AIN0 OC0A PD6 12|    |17  PB3 OC2A MOSI
+				AIN1 PD7 13|    |16  PB2 OC1B
+					 PB0 14|    |15  PB1 OC1A
+					       +----+
+* ******************************************************** */
+
+#include <avr/io.h>				
+#include <util/delay.h>			
+
+int main (void)					
+{
+	unsigned char zwischenspeicher;		
+	DDRB = 0b00000100;		
+	while(1)					
+	{
+		zwischenspeicher = PORTB;				
+		zwischenspeicher = zwischenspeicher ^ 0b00000100;	
+		PORTB = zwischenspeicher;				
+		_delay_ms(500);							
+	}							
+	return 0;					
+}
+
diff --git a/trunk/AVRProjects/ATMega328/main.eep b/trunk/AVRProjects/ATMega328/main.eep
new file mode 100644
index 00000000..1996e8fd
--- /dev/null
+++ b/trunk/AVRProjects/ATMega328/main.eep
@@ -0,0 +1 @@
+:00000001FF
diff --git a/trunk/AVRProjects/ATMega328/main.elf b/trunk/AVRProjects/ATMega328/main.elf
new file mode 100644
index 00000000..f74f8837
Binary files /dev/null and b/trunk/AVRProjects/ATMega328/main.elf differ
diff --git a/trunk/AVRProjects/ATMega328/main.hex b/trunk/AVRProjects/ATMega328/main.hex
new file mode 100644
index 00000000..a2364de1
--- /dev/null
+++ b/trunk/AVRProjects/ATMega328/main.hex
@@ -0,0 +1,12 @@
+:100000000C9434000C943E000C943E000C943E0082
+:100010000C943E000C943E000C943E000C943E0068
+:100020000C943E000C943E000C943E000C943E0058
+:100030000C943E000C943E000C943E000C943E0048
+:100040000C943E000C943E000C943E000C943E0038
+:100050000C943E000C943E000C943E000C943E0028
+:100060000C943E000C943E0011241FBECFEFD8E04C
+:10007000DEBFCDBF0E9440000C9450000C940000E5
+:1000800084E084B994E085B1892785B92FE936E801
+:1000900081E0215030408040E1F700C00000F3CF04
+:0400A000F894FFCF02
+:00000001FF
diff --git a/trunk/AVRProjects/ATMega328/main.lss b/trunk/AVRProjects/ATMega328/main.lss
new file mode 100644
index 00000000..c90bd2ba
--- /dev/null
+++ b/trunk/AVRProjects/ATMega328/main.lss
@@ -0,0 +1,118 @@
+
+main.elf:     file format elf32-avr
+
+Sections:
+Idx Name          Size      VMA       LMA       File off  Algn
+  0 .data         00000000  00800100  000000a4  00000118  2**0
+                  CONTENTS, ALLOC, LOAD, DATA
+  1 .text         000000a4  00000000  00000000  00000074  2**1
+                  CONTENTS, ALLOC, LOAD, READONLY, CODE
+  2 .comment      00000011  00000000  00000000  00000118  2**0
+                  CONTENTS, READONLY
+  3 .debug_aranges 00000020  00000000  00000000  00000129  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  4 .debug_info   00000119  00000000  00000000  00000149  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  5 .debug_abbrev 000000d1  00000000  00000000  00000262  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  6 .debug_line   000000d7  00000000  00000000  00000333  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  7 .debug_frame  00000024  00000000  00000000  0000040c  2**2
+                  CONTENTS, READONLY, DEBUGGING
+  8 .debug_str    00000134  00000000  00000000  00000430  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  9 .debug_loc    0000001f  00000000  00000000  00000564  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 10 .debug_ranges 00000010  00000000  00000000  00000583  2**0
+                  CONTENTS, READONLY, DEBUGGING
+
+Disassembly of section .text:
+
+00000000 <__vectors>:
+   0:	0c 94 34 00 	jmp	0x68	; 0x68 <__ctors_end>
+   4:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+   8:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+   c:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  10:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  14:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  18:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  1c:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  20:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  24:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  28:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  2c:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  30:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  34:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  38:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  3c:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  40:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  44:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  48:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  4c:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  50:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  54:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  58:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  5c:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  60:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+  64:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
+
+00000068 <__ctors_end>:
+  68:	11 24       	eor	r1, r1
+  6a:	1f be       	out	0x3f, r1	; 63
+  6c:	cf ef       	ldi	r28, 0xFF	; 255
+  6e:	d8 e0       	ldi	r29, 0x08	; 8
+  70:	de bf       	out	0x3e, r29	; 62
+  72:	cd bf       	out	0x3d, r28	; 61
+  74:	0e 94 40 00 	call	0x80	; 0x80 <main>
+  78:	0c 94 50 00 	jmp	0xa0	; 0xa0 <_exit>
+
+0000007c <__bad_interrupt>:
+  7c:	0c 94 00 00 	jmp	0	; 0x0 <__vectors>
+
+00000080 <main>:
+#include <util/delay.h>			
+
+int main (void)					
+{
+	unsigned char zwischenspeicher;		
+	DDRB = 0b00000100;		
+  80:	84 e0       	ldi	r24, 0x04	; 4
+  82:	84 b9       	out	0x04, r24	; 4
+	while(1)					
+	{
+		zwischenspeicher = PORTB;				
+		zwischenspeicher = zwischenspeicher ^ 0b00000100;	
+  84:	94 e0       	ldi	r25, 0x04	; 4
+{
+	unsigned char zwischenspeicher;		
+	DDRB = 0b00000100;		
+	while(1)					
+	{
+		zwischenspeicher = PORTB;				
+  86:	85 b1       	in	r24, 0x05	; 5
+		zwischenspeicher = zwischenspeicher ^ 0b00000100;	
+  88:	89 27       	eor	r24, r25
+		PORTB = zwischenspeicher;				
+  8a:	85 b9       	out	0x05, r24	; 5
+	#else
+		//round up by default
+		__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
+	#endif
+
+	__builtin_avr_delay_cycles(__ticks_dc);
+  8c:	2f e9       	ldi	r18, 0x9F	; 159
+  8e:	36 e8       	ldi	r19, 0x86	; 134
+  90:	81 e0       	ldi	r24, 0x01	; 1
+  92:	21 50       	subi	r18, 0x01	; 1
+  94:	30 40       	sbci	r19, 0x00	; 0
+  96:	80 40       	sbci	r24, 0x00	; 0
+  98:	e1 f7       	brne	.-8      	; 0x92 <main+0x12>
+  9a:	00 c0       	rjmp	.+0      	; 0x9c <main+0x1c>
+  9c:	00 00       	nop
+  9e:	f3 cf       	rjmp	.-26     	; 0x86 <main+0x6>
+
+000000a0 <_exit>:
+  a0:	f8 94       	cli
+
+000000a2 <__stop_program>:
+  a2:	ff cf       	rjmp	.-2      	; 0xa2 <__stop_program>
diff --git a/trunk/AVRProjects/ATMega328/main.lst b/trunk/AVRProjects/ATMega328/main.lst
new file mode 100644
index 00000000..e1e72484
--- /dev/null
+++ b/trunk/AVRProjects/ATMega328/main.lst
@@ -0,0 +1,243 @@
+   1               		.file	"main.c"
+   2               	__SP_H__ = 0x3e
+   3               	__SP_L__ = 0x3d
+   4               	__SREG__ = 0x3f
+   5               	__tmp_reg__ = 0
+   6               	__zero_reg__ = 1
+   7               		.text
+   8               	.Ltext0:
+   9               		.cfi_sections	.debug_frame
+  10               		.section	.text.startup,"ax",@progbits
+  11               	.global	main
+  13               	main:
+  14               	.LFB6:
+  15               		.file 1 "main.c"
+   1:main.c        **** #include <avr/io.h>				
+   2:main.c        **** #include <util/delay.h>			
+   3:main.c        **** 
+   4:main.c        **** int main (void)					
+   5:main.c        **** {
+  16               		.loc 1 5 0
+  17               		.cfi_startproc
+  18               	/* prologue: function */
+  19               	/* frame size = 0 */
+  20               	/* stack size = 0 */
+  21               	.L__stack_usage = 0
+   6:main.c        **** 	unsigned char zwischenspeicher;		
+   7:main.c        **** 	DDRB = 0b00000100;		
+  22               		.loc 1 7 0
+  23 0000 84E0      		ldi r24,lo8(4)
+  24 0002 84B9      		out 0x4,r24
+   8:main.c        **** 	while(1)					
+   9:main.c        **** 	{
+  10:main.c        **** 		zwischenspeicher = PORTB;				
+  11:main.c        **** 		zwischenspeicher = zwischenspeicher ^ 0b00000100;	
+  25               		.loc 1 11 0
+  26 0004 94E0      		ldi r25,lo8(4)
+  27               	.L2:
+  10:main.c        **** 		zwischenspeicher = zwischenspeicher ^ 0b00000100;	
+  28               		.loc 1 10 0 discriminator 1
+  29 0006 85B1      		in r24,0x5
+  30               	.LVL0:
+  31               		.loc 1 11 0 discriminator 1
+  32 0008 8927      		eor r24,r25
+  33               	.LVL1:
+  12:main.c        **** 		PORTB = zwischenspeicher;				
+  34               		.loc 1 12 0 discriminator 1
+  35 000a 85B9      		out 0x5,r24
+  36               	.LVL2:
+  37               	.LBB4:
+  38               	.LBB5:
+  39               		.file 2 "e:\\progs\\arduino-1.7.4\\hardware\\tools\\avr\\avr\\include\\util\\delay.h"
+   1:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /* Copyright (c) 2002, Marek Michalkiewicz
+   2:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Copyright (c) 2004,2005,2007 Joerg Wunsch
+   3:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Copyright (c) 2007  Florin-Viorel Petrov
+   4:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    All rights reserved.
+   5:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+   6:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Redistribution and use in source and binary forms, with or without
+   7:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    modification, are permitted provided that the following conditions are met:
+   8:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+   9:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    * Redistributions of source code must retain the above copyright
+  10:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      notice, this list of conditions and the following disclaimer.
+  11:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  12:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    * Redistributions in binary form must reproduce the above copyright
+  13:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      notice, this list of conditions and the following disclaimer in
+  14:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      the documentation and/or other materials provided with the
+  15:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      distribution.
+  16:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  17:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    * Neither the name of the copyright holders nor the names of
+  18:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      contributors may be used to endorse or promote products derived
+  19:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      from this software without specific prior written permission.
+  20:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  21:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  22:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  23:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  24:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  25:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  26:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  27:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  28:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  29:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  30:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+  31:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   POSSIBILITY OF SUCH DAMAGE. */
+  32:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  33:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /* $Id$ */
+  34:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  35:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef _UTIL_DELAY_H_
+  36:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #define _UTIL_DELAY_H_ 1
+  37:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  38:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef __HAS_DELAY_CYCLES
+  39:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #define __HAS_DELAY_CYCLES 1
+  40:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  41:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  42:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #include <inttypes.h>
+  43:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #include <util/delay_basic.h>
+  44:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #include <math.h>
+  45:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  46:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /** \file */
+  47:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /** \defgroup util_delay <util/delay.h>: Convenience functions for busy-wait delay loops
+  48:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \code
+  49:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     #define F_CPU 1000000UL  // 1 MHz
+  50:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     //#define F_CPU 14.7456E6
+  51:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     #include <util/delay.h>
+  52:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \endcode
+  53:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  54:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \note As an alternative method, it is possible to pass the
+  55:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     F_CPU macro down to the compiler from the Makefile.
+  56:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     Obviously, in that case, no \c \#define statement should be
+  57:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     used.
+  58:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  59:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     The functions in this header file are wrappers around the basic
+  60:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     busy-wait functions from <util/delay_basic.h>.  They are meant as
+  61:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     convenience functions where actual time values can be specified
+  62:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     rather than a number of cycles to wait for.  The idea behind is
+  63:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     that compile-time constant expressions will be eliminated by
+  64:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     compiler optimization so floating-point expressions can be used
+  65:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     to calculate the number of delay cycles needed based on the CPU
+  66:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     frequency passed by the macro F_CPU.
+  67:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  68:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \note In order for these functions to work as intended, compiler
+  69:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     optimizations <em>must</em> be enabled, and the delay time
+  70:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     <em>must</em> be an expression that is a known constant at
+  71:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     compile-time.  If these requirements are not met, the resulting
+  72:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     delay will be much longer (and basically unpredictable), and
+  73:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     applications that otherwise do not use floating-point calculations
+  74:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     will experience severe code bloat by the floating-point library
+  75:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     routines linked into the application.
+  76:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  77:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     The functions available allow the specification of microsecond, and
+  78:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     millisecond delays directly, using the application-supplied macro
+  79:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     F_CPU as the CPU clock frequency (in Hertz).
+  80:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  81:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** */
+  82:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  83:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #if !defined(__DOXYGEN__)
+  84:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** static inline void _delay_us(double __us) __attribute__((always_inline));
+  85:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** static inline void _delay_ms(double __ms) __attribute__((always_inline));
+  86:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  87:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  88:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef F_CPU
+  89:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /* prevent compiler error by supplying a default */
+  90:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** # warning "F_CPU not defined for <util/delay.h>"
+  91:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** # define F_CPU 1000000UL
+  92:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  93:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  94:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef __OPTIMIZE__
+  95:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** # warning "Compiler optimizations disabled; functions from <util/delay.h> won't work as designed"
+  96:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  97:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  98:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #if __HAS_DELAY_CYCLES && defined(__OPTIMIZE__) && \
+  99:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   !defined(__DELAY_BACKWARD_COMPATIBLE__) &&	   \
+ 100:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   __STDC_HOSTED__
+ 101:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #  include <math.h>
+ 102:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+ 103:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 104:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /**
+ 105:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    \ingroup util_delay
+ 106:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 107:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Perform a delay of \c __ms milliseconds, using _delay_loop_2().
+ 108:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 109:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    The macro F_CPU is supposed to be defined to a
+ 110:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    constant defining the CPU clock frequency (in Hertz).
+ 111:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 112:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    The maximal possible delay is 262.14 ms / F_CPU in MHz.
+ 113:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 114:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    When the user request delay which exceed the maximum possible one,
+ 115:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    _delay_ms() provides a decreased resolution functionality. In this
+ 116:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    mode _delay_ms() will work with a resolution of 1/10 ms, providing
+ 117:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    delays up to 6.5535 seconds (independent from CPU frequency).  The
+ 118:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    user will not be informed about decreased resolution.
+ 119:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 120:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    If the avr-gcc toolchain has __builtin_avr_delay_cycles(unsigned long)
+ 121:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    support, maximal possible delay is 4294967.295 ms/ F_CPU in MHz. For
+ 122:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    values greater than the maximal possible delay, overflows results in
+ 123:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    no delay i.e., 0ms.
+ 124:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 125:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Conversion of __us into clock cycles may not always result in integer.
+ 126:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    By default, the clock cycles rounded up to next integer. This ensures that
+ 127:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    the user gets atleast __us microseconds of delay.
+ 128:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 129:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Alternatively, user can define __DELAY_ROUND_DOWN__ and __DELAY_ROUND_CLOSEST__
+ 130:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    to round down and round to closest integer.
+ 131:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 132:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Note: The new implementation of _delay_ms(double __ms) with 
+ 133:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     __builtin_avr_delay_cycles(unsigned long) support is not backward compatible. 
+ 134:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    User can define __DELAY_BACKWARD_COMPATIBLE__ to get a backward compatible delay.
+ 135:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Also, the backward compatible
+ 136:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    algorithm will be chosen if the code is compiled in a <em>freestanding
+ 137:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    environment</em> (GCC option \c -ffreestanding), as the math functions
+ 138:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    required for rounding are not available to the compiler then.
+ 139:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 140:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****  */
+ 141:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** void
+ 142:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** _delay_ms(double __ms)
+ 143:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** {
+ 144:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	double __tmp ; 
+ 145:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #if __HAS_DELAY_CYCLES && defined(__OPTIMIZE__) && \
+ 146:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   !defined(__DELAY_BACKWARD_COMPATIBLE__) &&	   \
+ 147:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   __STDC_HOSTED__
+ 148:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	uint32_t __ticks_dc;
+ 149:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	extern void __builtin_avr_delay_cycles(unsigned long);
+ 150:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	__tmp = ((F_CPU) / 1e3) * __ms;
+ 151:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 152:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#if defined(__DELAY_ROUND_DOWN__)
+ 153:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		__ticks_dc = (uint32_t)fabs(__tmp);
+ 154:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 155:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#elif defined(__DELAY_ROUND_CLOSEST__)
+ 156:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		__ticks_dc = (uint32_t)(fabs(__tmp)+0.5);
+ 157:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 158:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#else
+ 159:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		//round up by default
+ 160:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
+ 161:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#endif
+ 162:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 163:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	__builtin_avr_delay_cycles(__ticks_dc);
+  40               		.loc 2 163 0 discriminator 1
+  41 000c 2FE9      		ldi r18,lo8(99999)
+  42 000e 36E8      		ldi r19,hi8(99999)
+  43 0010 81E0      		ldi r24,hlo8(99999)
+  44 0012 2150      		1: subi r18,1
+  45 0014 3040      		sbci r19,0
+  46 0016 8040      		sbci r24,0
+  47 0018 01F4      		brne 1b
+  48               	.LVL3:
+  49 001a 00C0      		rjmp .
+  50 001c 0000      		nop
+  51 001e 00C0      		rjmp .L2
+  52               	.LBE5:
+  53               	.LBE4:
+  54               		.cfi_endproc
+  55               	.LFE6:
+  57               		.text
+  58               	.Letext0:
+  59               		.file 3 "e:\\progs\\arduino-1.7.4\\hardware\\tools\\avr\\avr\\include\\stdint.h"
+DEFINED SYMBOLS
+                            *ABS*:00000000 main.c
+C:\Users\q242695\AppData\Local\Temp\cc6uM2d3.s:2      *ABS*:0000003e __SP_H__
+C:\Users\q242695\AppData\Local\Temp\cc6uM2d3.s:3      *ABS*:0000003d __SP_L__
+C:\Users\q242695\AppData\Local\Temp\cc6uM2d3.s:4      *ABS*:0000003f __SREG__
+C:\Users\q242695\AppData\Local\Temp\cc6uM2d3.s:5      *ABS*:00000000 __tmp_reg__
+C:\Users\q242695\AppData\Local\Temp\cc6uM2d3.s:6      *ABS*:00000001 __zero_reg__
+C:\Users\q242695\AppData\Local\Temp\cc6uM2d3.s:13     .text.startup:00000000 main
+
+NO UNDEFINED SYMBOLS
diff --git a/trunk/AVRProjects/ATMega328/main.map b/trunk/AVRProjects/ATMega328/main.map
new file mode 100644
index 00000000..d68730d3
--- /dev/null
+++ b/trunk/AVRProjects/ATMega328/main.map
@@ -0,0 +1,429 @@
+Archive member included to satisfy reference by file (symbol)
+
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a(_exit.o)
+                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm328.o (exit)
+
+Memory Configuration
+
+Name             Origin             Length             Attributes
+text             0x00000000         0x00020000         xr
+data             0x00800060         0x0000ffa0         rw !x
+eeprom           0x00810000         0x00010000         rw !x
+fuse             0x00820000         0x00000400         rw !x
+lock             0x00830000         0x00000400         rw !x
+signature        0x00840000         0x00000400         rw !x
+*default*        0x00000000         0xffffffff
+
+Linker script and memory map
+
+Address of section .data set to 0x800100
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm328.o
+LOAD main.o
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5\libm.a
+START GROUP
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5\libm.a
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5\libc.a
+END GROUP
+
+.hash
+ *(.hash)
+
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+exit                                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr5\libgcc.a(_exit.o)
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm328.o
+main                                              main.o
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr5/crtm328.o
diff --git a/trunk/AVRProjects/ATMega328/main.sym b/trunk/AVRProjects/ATMega328/main.sym
new file mode 100644
index 00000000..795fdd92
--- /dev/null
+++ b/trunk/AVRProjects/ATMega328/main.sym
@@ -0,0 +1,52 @@
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diff --git a/trunk/AVRProjects/ATMega328/makefile b/trunk/AVRProjects/ATMega328/makefile
new file mode 100644
index 00000000..6ca483c7
--- /dev/null
+++ b/trunk/AVRProjects/ATMega328/makefile
@@ -0,0 +1,441 @@
+# Hey Emacs, this is a -*- makefile -*-
+#
+# WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al.
+# Released to the Public Domain
+# Please read the make user manual!
+#
+# Additional material for this makefile was submitted by:
+#  Tim Henigan
+#  Peter Fleury
+#  Reiner Patommel
+#  Sander Pool
+#  Frederik Rouleau
+#  Markus Pfaff
+#
+# On command line:
+#
+# make all = Make software.
+#
+# make clean = Clean out built project files.
+#
+# make coff = Convert ELF to AVR COFF (for use with AVR Studio 3.x or VMLAB).
+#
+# make extcoff = Convert ELF to AVR Extended COFF (for use with AVR Studio
+#                4.07 or greater).
+#
+# make program = Download the hex file to the device, using avrdude.  Please
+#                customize the avrdude settings below first!
+#
+# make filename.s = Just compile filename.c into the assembler code only
+#
+# To rebuild project do "make clean" then "make all".
+#
+
+# mth 2004/09 
+# Differences from WinAVR 20040720 sample:
+# - DEPFLAGS according to Eric Weddingtion's fix (avrfreaks/gcc-forum)
+# - F_OSC Define in CFLAGS and AFLAGS
+
+
+# MCU name
+MCU = atmega328
+
+# Main Oscillator Frequency
+# This is only used to define F_OSC in all assembler and c-sources.
+F_OSC = 4190000
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+# Target file name (without extension).
+TARGET = main
+
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = $(TARGET).c
+
+
+# List Assembler source files here.
+# Make them always end in a capital .S.  Files ending in a lowercase .s
+# will not be considered source files but generated files (assembler
+# output from the compiler), and will be deleted upon "make clean"!
+# Even though the DOS/Win* filesystem matches both .s and .S the same,
+# it will preserve the spelling of the filenames, and gcc itself does
+# care about how the name is spelled on its command-line.
+ASRC = 
+
+
+
+# Optimization level, can be [0, 1, 2, 3, s]. 
+# 0 = turn off optimization. s = optimize for size.
+# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+OPT = s
+
+# Debugging format.
+# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
+# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
+#DEBUG = stabs
+DEBUG = dwarf-2
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+EXTRAINCDIRS = 
+
+
+# Compiler flag to set the C Standard level.
+# c89   - "ANSI" C
+# gnu89 - c89 plus GCC extensions
+# c99   - ISO C99 standard (not yet fully implemented)
+# gnu99 - c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+# Place -D or -U options here
+CDEFS =
+
+# Place -I options here
+CINCS =
+
+
+# Compiler flags.
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT)
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+CFLAGS += -Wall -Wstrict-prototypes
+CFLAGS += -Wa,-adhlns=$(<:.c=.lst)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+CFLAGS += -DF_OSC=$(F_OSC)
+
+
+
+# Assembler flags.
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs 
+ASFLAGS += -DF_OSC=$(F_OSC)
+
+
+#Additional libraries.
+
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+PRINTF_LIB = 
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+SCANF_LIB = 
+
+MATH_LIB = -lm
+
+# External memory options
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+# Linker flags.
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+
+
+
+
+# Programming support using avrdude. Settings and variables.
+
+# Programming hardware: alf avr910 avrisp bascom bsd 
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+#AVRDUDE_PROGRAMMER = stk500
+AVRDUDE_PROGRAMMER = usbasp
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = usb    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude> 
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+# ---------------------------------------------------------------------------
+
+# Define directories, if needed.
+DIRAVR = c:/winavr
+DIRAVRBIN = $(DIRAVR)/bin
+DIRAVRUTILS = $(DIRAVR)/utils/bin
+DIRINC = .
+DIRLIB = $(DIRAVR)/avr/lib
+
+
+# Define programs and commands.
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+
+
+
+
+# Define Messages
+# English
+MSG_ERRORS_NONE = Errors: none
+MSG_BEGIN = -------- begin --------
+MSG_END = --------  end  --------
+MSG_SIZE_BEFORE = Size before: 
+MSG_SIZE_AFTER = Size after:
+MSG_COFF = Converting to AVR COFF:
+MSG_EXTENDED_COFF = Converting to AVR Extended COFF:
+MSG_FLASH = Creating load file for Flash:
+MSG_EEPROM = Creating load file for EEPROM:
+MSG_EXTENDED_LISTING = Creating Extended Listing:
+MSG_SYMBOL_TABLE = Creating Symbol Table:
+MSG_LINKING = Linking:
+MSG_COMPILING = Compiling:
+MSG_ASSEMBLING = Assembling:
+MSG_CLEANING = Cleaning project:
+
+
+
+
+# Define all object files.
+OBJ = $(SRC:.c=.o) $(ASRC:.S=.o) 
+
+# Define all listing files.
+LST = $(ASRC:.S=.lst) $(SRC:.c=.lst)
+
+
+# Compiler flags to generate dependency files.
+### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
+GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS)
+
+
+
+
+
+# Default target.
+#all: begin gccversion sizebefore build sizeafter finished end
+all: begin gccversion build size finished end
+
+build: elf hex eep lss sym
+
+elf: $(TARGET).elf
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss 
+sym: $(TARGET).sym
+
+
+
+# Eye candy.
+# AVR Studio 3.x does not check make's exit code but relies on
+# the following magic strings to be generated by the compile job.
+begin:
+	@echo
+	@echo $(MSG_BEGIN)
+
+finished:
+	@echo $(MSG_ERRORS_NONE)
+
+end:
+	@echo $(MSG_END)
+	@echo
+
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+sizebefore:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
+
+sizeafter:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
+
+size:
+	$(SIZE) -C --mcu=$(MCU) $(TARGET).elf
+
+# Display compiler version information.
+gccversion : 
+	@$(CC) --version
+
+
+
+# Program the device.  
+program: $(TARGET).hex $(TARGET).eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM)
+
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000 
+
+
+coff: $(TARGET).elf
+	@echo
+	@echo $(MSG_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	@echo
+	@echo $(MSG_EXTENDED_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+
+# Create final output files (.hex, .eep) from ELF output file.
+%.hex: %.elf
+	@echo
+	@echo $(MSG_FLASH) $@
+	$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+%.eep: %.elf
+	@echo
+	@echo $(MSG_EEPROM) $@
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+%.lss: %.elf
+	@echo
+	@echo $(MSG_EXTENDED_LISTING) $@
+	$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+%.sym: %.elf
+	@echo
+	@echo $(MSG_SYMBOL_TABLE) $@
+	$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+%.elf: $(OBJ)
+	@echo
+	@echo $(MSG_LINKING) $@
+	$(CC) $(ALL_CFLAGS) $(OBJ) --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+%.o : %.c
+	@echo
+	@echo $(MSG_COMPILING) $<
+	$(CC) -c $(ALL_CFLAGS) $< -o $@ 
+
+
+# Compile: create assembler files from C source files.
+%.s : %.c
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+%.o : %.S
+	@echo
+	@echo $(MSG_ASSEMBLING) $<
+	$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+
+
+# Target: clean project.
+clean: begin clean_list finished end
+
+clean_list :
+	@echo
+	@echo $(MSG_CLEANING)
+	$(REMOVE) $(TARGET).hex
+	$(REMOVE) $(TARGET).eep
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).cof
+	$(REMOVE) $(TARGET).elf
+	$(REMOVE) $(TARGET).map
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).a90
+	$(REMOVE) $(TARGET).sym
+	$(REMOVE) $(TARGET).lnk
+	$(REMOVE) $(TARGET).lss
+	$(REMOVE) $(OBJ)
+	$(REMOVE) $(LST)
+	$(REMOVE) $(SRC:.c=.s)
+	$(REMOVE) $(SRC:.c=.d)
+	$(REMOVE) .dep/*
+
+
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program
+ 
+
+ 
diff --git a/trunk/AVRProjects/ATMega48/.dep/main.o.d b/trunk/AVRProjects/ATMega48/.dep/main.o.d
new file mode 100644
index 00000000..0bb21193
--- /dev/null
+++ b/trunk/AVRProjects/ATMega48/.dep/main.o.d
@@ -0,0 +1,48 @@
+main.o: main.c main.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\io.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\sfr_defs.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\inttypes.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\lib\gcc\avr\4.8.1\include\stdint.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\stdint.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iom48.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iomx8.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\portpins.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\common.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\version.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\fuse.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\lock.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\math.h
+
+main.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\io.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\sfr_defs.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\inttypes.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\lib\gcc\avr\4.8.1\include\stdint.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\stdint.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iom48.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iomx8.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\portpins.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\common.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\version.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\fuse.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\lock.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\math.h:
diff --git a/trunk/AVRProjects/ATMega48/main.c b/trunk/AVRProjects/ATMega48/main.c
new file mode 100644
index 00000000..679fd398
--- /dev/null
+++ b/trunk/AVRProjects/ATMega48/main.c
@@ -0,0 +1,45 @@
+/* ******************************************************** *
+ *
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016
+ * Author:		Paolo Iocco
+ * ******************************************************** */
+/* ******************************************************** *
+   ATtiny 88 / Mega 168 / Mega 328 Pin map
+                           +-\/-+
+              /Reset PC6  1|o   |28  PC5 ADC5
+                 RXD PD0  2|    |27  PC4 ADC4
+                 TXD PD1  3|    |26  PC3 ADC3
+                     PD2  4|    |25  PC2 ADC2
+				OC2B PD3  5|    |24  PC1 ADC1
+					 PD4  6|    |23  PC0 ADC0
+					 VCC  7|    |22  GND
+					 GND  8|    |21  AREF
+				OSC1 PB6  9|    |20  VCC
+				OSC2 PB7 10|    |19  PB5 SCK
+				OC0B PD5 11|    |18  PB4 MISO
+		   AIN0 OC0A PD6 12|    |17  PB3 OC2A MOSI
+				AIN1 PD7 13|    |16  PB2 OC1B
+					 PB0 14|    |15  PB1 OC1A
+					       +----+
+* ******************************************************** */
+
+#include "main.h"
+#include <avr/io.h>
+#include <util/delay.h>
+
+int main (void)
+{
+	unsigned char zwischenspeicher;
+	DDRB = 0b00000100;
+	while(1)
+	{
+		zwischenspeicher = PORTB;
+		zwischenspeicher = zwischenspeicher ^ 0b00000100;
+		PORTB = zwischenspeicher;
+		_delay_ms(500);
+	}
+	return 0;
+}
+
diff --git a/trunk/AVRProjects/ATMega48/main.eep b/trunk/AVRProjects/ATMega48/main.eep
new file mode 100644
index 00000000..1996e8fd
--- /dev/null
+++ b/trunk/AVRProjects/ATMega48/main.eep
@@ -0,0 +1 @@
+:00000001FF
diff --git a/trunk/AVRProjects/ATMega48/main.elf b/trunk/AVRProjects/ATMega48/main.elf
new file mode 100644
index 00000000..a5593e85
Binary files /dev/null and b/trunk/AVRProjects/ATMega48/main.elf differ
diff --git a/trunk/AVRProjects/ATMega48/main.h b/trunk/AVRProjects/ATMega48/main.h
new file mode 100644
index 00000000..6e53eb8a
--- /dev/null
+++ b/trunk/AVRProjects/ATMega48/main.h
@@ -0,0 +1,18 @@
+/* ******************************************************** *
+ *															*
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016									*
+ * Author:		Paolo Iocco									*	
+ * ******************************************************** */
+ 
+#ifndef MAIN_H_
+#define MAIN_H_
+
+#include <avr/io.h>
+
+#ifndef F_CPU
+#define F_CPU 1000000L
+#endif
+
+#endif /* MAIN_H_ */
diff --git a/trunk/AVRProjects/ATMega48/main.hex b/trunk/AVRProjects/ATMega48/main.hex
new file mode 100644
index 00000000..be7e58d7
--- /dev/null
+++ b/trunk/AVRProjects/ATMega48/main.hex
@@ -0,0 +1,8 @@
+:1000000019C020C01FC01EC01DC01CC01BC01AC00C
+:1000100019C018C017C016C015C014C013C012C034
+:1000200011C010C00FC00EC00DC00CC00BC00AC064
+:1000300009C008C011241FBECFEFD2E0DEBFCDBF84
+:1000400002D011C0DDCF84E084B994E085B1892766
+:1000500085B92FE936E881E0215030408040E1F752
+:0A00600000C00000F3CFF894FFCFBA
+:00000001FF
diff --git a/trunk/AVRProjects/ATMega48/main.lss b/trunk/AVRProjects/ATMega48/main.lss
new file mode 100644
index 00000000..170b8ae7
--- /dev/null
+++ b/trunk/AVRProjects/ATMega48/main.lss
@@ -0,0 +1,118 @@
+
+main.elf:     file format elf32-avr
+
+Sections:
+Idx Name          Size      VMA       LMA       File off  Algn
+  0 .data         00000000  00800100  0000006a  000000de  2**0
+                  CONTENTS, ALLOC, LOAD, DATA
+  1 .text         0000006a  00000000  00000000  00000074  2**1
+                  CONTENTS, ALLOC, LOAD, READONLY, CODE
+  2 .comment      00000011  00000000  00000000  000000de  2**0
+                  CONTENTS, READONLY
+  3 .debug_aranges 00000020  00000000  00000000  000000ef  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  4 .debug_info   00000119  00000000  00000000  0000010f  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  5 .debug_abbrev 000000d1  00000000  00000000  00000228  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  6 .debug_line   000000d9  00000000  00000000  000002f9  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  7 .debug_frame  00000024  00000000  00000000  000003d4  2**2
+                  CONTENTS, READONLY, DEBUGGING
+  8 .debug_str    00000132  00000000  00000000  000003f8  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  9 .debug_loc    0000001f  00000000  00000000  0000052a  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 10 .debug_ranges 00000010  00000000  00000000  00000549  2**0
+                  CONTENTS, READONLY, DEBUGGING
+
+Disassembly of section .text:
+
+00000000 <__vectors>:
+   0:	19 c0       	rjmp	.+50     	; 0x34 <__ctors_end>
+   2:	20 c0       	rjmp	.+64     	; 0x44 <__bad_interrupt>
+   4:	1f c0       	rjmp	.+62     	; 0x44 <__bad_interrupt>
+   6:	1e c0       	rjmp	.+60     	; 0x44 <__bad_interrupt>
+   8:	1d c0       	rjmp	.+58     	; 0x44 <__bad_interrupt>
+   a:	1c c0       	rjmp	.+56     	; 0x44 <__bad_interrupt>
+   c:	1b c0       	rjmp	.+54     	; 0x44 <__bad_interrupt>
+   e:	1a c0       	rjmp	.+52     	; 0x44 <__bad_interrupt>
+  10:	19 c0       	rjmp	.+50     	; 0x44 <__bad_interrupt>
+  12:	18 c0       	rjmp	.+48     	; 0x44 <__bad_interrupt>
+  14:	17 c0       	rjmp	.+46     	; 0x44 <__bad_interrupt>
+  16:	16 c0       	rjmp	.+44     	; 0x44 <__bad_interrupt>
+  18:	15 c0       	rjmp	.+42     	; 0x44 <__bad_interrupt>
+  1a:	14 c0       	rjmp	.+40     	; 0x44 <__bad_interrupt>
+  1c:	13 c0       	rjmp	.+38     	; 0x44 <__bad_interrupt>
+  1e:	12 c0       	rjmp	.+36     	; 0x44 <__bad_interrupt>
+  20:	11 c0       	rjmp	.+34     	; 0x44 <__bad_interrupt>
+  22:	10 c0       	rjmp	.+32     	; 0x44 <__bad_interrupt>
+  24:	0f c0       	rjmp	.+30     	; 0x44 <__bad_interrupt>
+  26:	0e c0       	rjmp	.+28     	; 0x44 <__bad_interrupt>
+  28:	0d c0       	rjmp	.+26     	; 0x44 <__bad_interrupt>
+  2a:	0c c0       	rjmp	.+24     	; 0x44 <__bad_interrupt>
+  2c:	0b c0       	rjmp	.+22     	; 0x44 <__bad_interrupt>
+  2e:	0a c0       	rjmp	.+20     	; 0x44 <__bad_interrupt>
+  30:	09 c0       	rjmp	.+18     	; 0x44 <__bad_interrupt>
+  32:	08 c0       	rjmp	.+16     	; 0x44 <__bad_interrupt>
+
+00000034 <__ctors_end>:
+  34:	11 24       	eor	r1, r1
+  36:	1f be       	out	0x3f, r1	; 63
+  38:	cf ef       	ldi	r28, 0xFF	; 255
+  3a:	d2 e0       	ldi	r29, 0x02	; 2
+  3c:	de bf       	out	0x3e, r29	; 62
+  3e:	cd bf       	out	0x3d, r28	; 61
+  40:	02 d0       	rcall	.+4      	; 0x46 <main>
+  42:	11 c0       	rjmp	.+34     	; 0x66 <_exit>
+
+00000044 <__bad_interrupt>:
+  44:	dd cf       	rjmp	.-70     	; 0x0 <__vectors>
+
+00000046 <main>:
+#include <util/delay.h>
+
+int main (void)
+{
+	unsigned char zwischenspeicher;
+	DDRB = 0b00000100;
+  46:	84 e0       	ldi	r24, 0x04	; 4
+  48:	84 b9       	out	0x04, r24	; 4
+	while(1)
+	{
+		zwischenspeicher = PORTB;
+		zwischenspeicher = zwischenspeicher ^ 0b00000100;
+  4a:	94 e0       	ldi	r25, 0x04	; 4
+{
+	unsigned char zwischenspeicher;
+	DDRB = 0b00000100;
+	while(1)
+	{
+		zwischenspeicher = PORTB;
+  4c:	85 b1       	in	r24, 0x05	; 5
+		zwischenspeicher = zwischenspeicher ^ 0b00000100;
+  4e:	89 27       	eor	r24, r25
+		PORTB = zwischenspeicher;
+  50:	85 b9       	out	0x05, r24	; 5
+	#else
+		//round up by default
+		__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
+	#endif
+
+	__builtin_avr_delay_cycles(__ticks_dc);
+  52:	2f e9       	ldi	r18, 0x9F	; 159
+  54:	36 e8       	ldi	r19, 0x86	; 134
+  56:	81 e0       	ldi	r24, 0x01	; 1
+  58:	21 50       	subi	r18, 0x01	; 1
+  5a:	30 40       	sbci	r19, 0x00	; 0
+  5c:	80 40       	sbci	r24, 0x00	; 0
+  5e:	e1 f7       	brne	.-8      	; 0x58 <main+0x12>
+  60:	00 c0       	rjmp	.+0      	; 0x62 <main+0x1c>
+  62:	00 00       	nop
+  64:	f3 cf       	rjmp	.-26     	; 0x4c <main+0x6>
+
+00000066 <_exit>:
+  66:	f8 94       	cli
+
+00000068 <__stop_program>:
+  68:	ff cf       	rjmp	.-2      	; 0x68 <__stop_program>
diff --git a/trunk/AVRProjects/ATMega48/main.lst b/trunk/AVRProjects/ATMega48/main.lst
new file mode 100644
index 00000000..2ae9169a
--- /dev/null
+++ b/trunk/AVRProjects/ATMega48/main.lst
@@ -0,0 +1,271 @@
+   1               		.file	"main.c"
+   2               	__SP_H__ = 0x3e
+   3               	__SP_L__ = 0x3d
+   4               	__SREG__ = 0x3f
+   5               	__tmp_reg__ = 0
+   6               	__zero_reg__ = 1
+   7               		.text
+   8               	.Ltext0:
+   9               		.cfi_sections	.debug_frame
+  10               		.section	.text.startup,"ax",@progbits
+  11               	.global	main
+  13               	main:
+  14               	.LFB6:
+  15               		.file 1 "main.c"
+   1:main.c        **** /* ******************************************************** *
+   2:main.c        ****  *
+   3:main.c        ****  * Simple Template for ATMEL Microcontroller				*
+   4:main.c        ****  * -------------------------------------------------------- *
+   5:main.c        ****  * Created on: 	25.07.2016
+   6:main.c        ****  * Author:		Paolo Iocco
+   7:main.c        ****  * ******************************************************** */
+   8:main.c        **** /* ******************************************************** *
+   9:main.c        ****    ATtiny 88 / Mega 168 / Mega 328 Pin map
+  10:main.c        ****                            +-\/-+
+  11:main.c        ****               /Reset PC6  1|o   |28  PC5 ADC5
+  12:main.c        ****                  RXD PD0  2|    |27  PC4 ADC4
+  13:main.c        ****                  TXD PD1  3|    |26  PC3 ADC3
+  14:main.c        ****                      PD2  4|    |25  PC2 ADC2
+  15:main.c        **** 				OC2B PD3  5|    |24  PC1 ADC1
+  16:main.c        **** 					 PD4  6|    |23  PC0 ADC0
+  17:main.c        **** 					 VCC  7|    |22  GND
+  18:main.c        **** 					 GND  8|    |21  AREF
+  19:main.c        **** 				OSC1 PB6  9|    |20  VCC
+  20:main.c        **** 				OSC2 PB7 10|    |19  PB5 SCK
+  21:main.c        **** 				OC0B PD5 11|    |18  PB4 MISO
+  22:main.c        **** 		   AIN0 OC0A PD6 12|    |17  PB3 OC2A MOSI
+  23:main.c        **** 				AIN1 PD7 13|    |16  PB2 OC1B
+  24:main.c        **** 					 PB0 14|    |15  PB1 OC1A
+  25:main.c        **** 					       +----+
+  26:main.c        **** * ******************************************************** */
+  27:main.c        **** 
+  28:main.c        **** #include "main.h"
+  29:main.c        **** #include <avr/io.h>
+  30:main.c        **** #include <util/delay.h>
+  31:main.c        **** 
+  32:main.c        **** int main (void)
+  33:main.c        **** {
+  16               		.loc 1 33 0
+  17               		.cfi_startproc
+  18               	/* prologue: function */
+  19               	/* frame size = 0 */
+  20               	/* stack size = 0 */
+  21               	.L__stack_usage = 0
+  34:main.c        **** 	unsigned char zwischenspeicher;
+  35:main.c        **** 	DDRB = 0b00000100;
+  22               		.loc 1 35 0
+  23 0000 84E0      		ldi r24,lo8(4)
+  24 0002 84B9      		out 0x4,r24
+  36:main.c        **** 	while(1)
+  37:main.c        **** 	{
+  38:main.c        **** 		zwischenspeicher = PORTB;
+  39:main.c        **** 		zwischenspeicher = zwischenspeicher ^ 0b00000100;
+  25               		.loc 1 39 0
+  26 0004 94E0      		ldi r25,lo8(4)
+  27               	.L2:
+  38:main.c        **** 		zwischenspeicher = zwischenspeicher ^ 0b00000100;
+  28               		.loc 1 38 0 discriminator 1
+  29 0006 85B1      		in r24,0x5
+  30               	.LVL0:
+  31               		.loc 1 39 0 discriminator 1
+  32 0008 8927      		eor r24,r25
+  33               	.LVL1:
+  40:main.c        **** 		PORTB = zwischenspeicher;
+  34               		.loc 1 40 0 discriminator 1
+  35 000a 85B9      		out 0x5,r24
+  36               	.LVL2:
+  37               	.LBB4:
+  38               	.LBB5:
+  39               		.file 2 "e:\\progs\\arduino-1.7.4\\hardware\\tools\\avr\\avr\\include\\util\\delay.h"
+   1:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /* Copyright (c) 2002, Marek Michalkiewicz
+   2:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Copyright (c) 2004,2005,2007 Joerg Wunsch
+   3:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Copyright (c) 2007  Florin-Viorel Petrov
+   4:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    All rights reserved.
+   5:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+   6:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Redistribution and use in source and binary forms, with or without
+   7:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    modification, are permitted provided that the following conditions are met:
+   8:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+   9:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    * Redistributions of source code must retain the above copyright
+  10:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      notice, this list of conditions and the following disclaimer.
+  11:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  12:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    * Redistributions in binary form must reproduce the above copyright
+  13:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      notice, this list of conditions and the following disclaimer in
+  14:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      the documentation and/or other materials provided with the
+  15:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      distribution.
+  16:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  17:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    * Neither the name of the copyright holders nor the names of
+  18:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      contributors may be used to endorse or promote products derived
+  19:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      from this software without specific prior written permission.
+  20:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  21:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  22:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  23:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  24:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  25:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  26:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  27:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  28:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  29:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  30:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+  31:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   POSSIBILITY OF SUCH DAMAGE. */
+  32:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  33:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /* $Id$ */
+  34:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  35:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef _UTIL_DELAY_H_
+  36:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #define _UTIL_DELAY_H_ 1
+  37:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  38:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef __HAS_DELAY_CYCLES
+  39:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #define __HAS_DELAY_CYCLES 1
+  40:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  41:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  42:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #include <inttypes.h>
+  43:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #include <util/delay_basic.h>
+  44:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #include <math.h>
+  45:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  46:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /** \file */
+  47:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /** \defgroup util_delay <util/delay.h>: Convenience functions for busy-wait delay loops
+  48:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \code
+  49:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     #define F_CPU 1000000UL  // 1 MHz
+  50:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     //#define F_CPU 14.7456E6
+  51:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     #include <util/delay.h>
+  52:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \endcode
+  53:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  54:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \note As an alternative method, it is possible to pass the
+  55:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     F_CPU macro down to the compiler from the Makefile.
+  56:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     Obviously, in that case, no \c \#define statement should be
+  57:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     used.
+  58:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  59:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     The functions in this header file are wrappers around the basic
+  60:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     busy-wait functions from <util/delay_basic.h>.  They are meant as
+  61:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     convenience functions where actual time values can be specified
+  62:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     rather than a number of cycles to wait for.  The idea behind is
+  63:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     that compile-time constant expressions will be eliminated by
+  64:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     compiler optimization so floating-point expressions can be used
+  65:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     to calculate the number of delay cycles needed based on the CPU
+  66:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     frequency passed by the macro F_CPU.
+  67:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  68:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \note In order for these functions to work as intended, compiler
+  69:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     optimizations <em>must</em> be enabled, and the delay time
+  70:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     <em>must</em> be an expression that is a known constant at
+  71:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     compile-time.  If these requirements are not met, the resulting
+  72:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     delay will be much longer (and basically unpredictable), and
+  73:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     applications that otherwise do not use floating-point calculations
+  74:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     will experience severe code bloat by the floating-point library
+  75:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     routines linked into the application.
+  76:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  77:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     The functions available allow the specification of microsecond, and
+  78:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     millisecond delays directly, using the application-supplied macro
+  79:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     F_CPU as the CPU clock frequency (in Hertz).
+  80:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  81:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** */
+  82:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  83:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #if !defined(__DOXYGEN__)
+  84:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** static inline void _delay_us(double __us) __attribute__((always_inline));
+  85:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** static inline void _delay_ms(double __ms) __attribute__((always_inline));
+  86:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  87:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  88:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef F_CPU
+  89:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /* prevent compiler error by supplying a default */
+  90:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** # warning "F_CPU not defined for <util/delay.h>"
+  91:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** # define F_CPU 1000000UL
+  92:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  93:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  94:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef __OPTIMIZE__
+  95:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** # warning "Compiler optimizations disabled; functions from <util/delay.h> won't work as designed"
+  96:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  97:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  98:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #if __HAS_DELAY_CYCLES && defined(__OPTIMIZE__) && \
+  99:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   !defined(__DELAY_BACKWARD_COMPATIBLE__) &&	   \
+ 100:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   __STDC_HOSTED__
+ 101:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #  include <math.h>
+ 102:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+ 103:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 104:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /**
+ 105:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    \ingroup util_delay
+ 106:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 107:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Perform a delay of \c __ms milliseconds, using _delay_loop_2().
+ 108:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 109:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    The macro F_CPU is supposed to be defined to a
+ 110:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    constant defining the CPU clock frequency (in Hertz).
+ 111:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 112:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    The maximal possible delay is 262.14 ms / F_CPU in MHz.
+ 113:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 114:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    When the user request delay which exceed the maximum possible one,
+ 115:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    _delay_ms() provides a decreased resolution functionality. In this
+ 116:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    mode _delay_ms() will work with a resolution of 1/10 ms, providing
+ 117:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    delays up to 6.5535 seconds (independent from CPU frequency).  The
+ 118:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    user will not be informed about decreased resolution.
+ 119:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 120:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    If the avr-gcc toolchain has __builtin_avr_delay_cycles(unsigned long)
+ 121:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    support, maximal possible delay is 4294967.295 ms/ F_CPU in MHz. For
+ 122:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    values greater than the maximal possible delay, overflows results in
+ 123:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    no delay i.e., 0ms.
+ 124:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 125:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Conversion of __us into clock cycles may not always result in integer.
+ 126:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    By default, the clock cycles rounded up to next integer. This ensures that
+ 127:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    the user gets atleast __us microseconds of delay.
+ 128:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 129:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Alternatively, user can define __DELAY_ROUND_DOWN__ and __DELAY_ROUND_CLOSEST__
+ 130:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    to round down and round to closest integer.
+ 131:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 132:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Note: The new implementation of _delay_ms(double __ms) with 
+ 133:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     __builtin_avr_delay_cycles(unsigned long) support is not backward compatible. 
+ 134:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    User can define __DELAY_BACKWARD_COMPATIBLE__ to get a backward compatible delay.
+ 135:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Also, the backward compatible
+ 136:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    algorithm will be chosen if the code is compiled in a <em>freestanding
+ 137:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    environment</em> (GCC option \c -ffreestanding), as the math functions
+ 138:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    required for rounding are not available to the compiler then.
+ 139:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 140:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****  */
+ 141:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** void
+ 142:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** _delay_ms(double __ms)
+ 143:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** {
+ 144:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	double __tmp ; 
+ 145:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #if __HAS_DELAY_CYCLES && defined(__OPTIMIZE__) && \
+ 146:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   !defined(__DELAY_BACKWARD_COMPATIBLE__) &&	   \
+ 147:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   __STDC_HOSTED__
+ 148:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	uint32_t __ticks_dc;
+ 149:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	extern void __builtin_avr_delay_cycles(unsigned long);
+ 150:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	__tmp = ((F_CPU) / 1e3) * __ms;
+ 151:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 152:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#if defined(__DELAY_ROUND_DOWN__)
+ 153:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		__ticks_dc = (uint32_t)fabs(__tmp);
+ 154:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 155:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#elif defined(__DELAY_ROUND_CLOSEST__)
+ 156:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		__ticks_dc = (uint32_t)(fabs(__tmp)+0.5);
+ 157:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 158:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#else
+ 159:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		//round up by default
+ 160:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
+ 161:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#endif
+ 162:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 163:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	__builtin_avr_delay_cycles(__ticks_dc);
+  40               		.loc 2 163 0 discriminator 1
+  41 000c 2FE9      		ldi r18,lo8(99999)
+  42 000e 36E8      		ldi r19,hi8(99999)
+  43 0010 81E0      		ldi r24,hlo8(99999)
+  44 0012 2150      		1: subi r18,1
+  45 0014 3040      		sbci r19,0
+  46 0016 8040      		sbci r24,0
+  47 0018 01F4      		brne 1b
+  48               	.LVL3:
+  49 001a 00C0      		rjmp .
+  50 001c 0000      		nop
+  51 001e 00C0      		rjmp .L2
+  52               	.LBE5:
+  53               	.LBE4:
+  54               		.cfi_endproc
+  55               	.LFE6:
+  57               		.text
+  58               	.Letext0:
+  59               		.file 3 "e:\\progs\\arduino-1.7.4\\hardware\\tools\\avr\\avr\\include\\stdint.h"
+DEFINED SYMBOLS
+                            *ABS*:00000000 main.c
+C:\Users\q242695\AppData\Local\Temp\cckLBHgu.s:2      *ABS*:0000003e __SP_H__
+C:\Users\q242695\AppData\Local\Temp\cckLBHgu.s:3      *ABS*:0000003d __SP_L__
+C:\Users\q242695\AppData\Local\Temp\cckLBHgu.s:4      *ABS*:0000003f __SREG__
+C:\Users\q242695\AppData\Local\Temp\cckLBHgu.s:5      *ABS*:00000000 __tmp_reg__
+C:\Users\q242695\AppData\Local\Temp\cckLBHgu.s:6      *ABS*:00000001 __zero_reg__
+C:\Users\q242695\AppData\Local\Temp\cckLBHgu.s:13     .text.startup:00000000 main
+
+NO UNDEFINED SYMBOLS
diff --git a/trunk/AVRProjects/ATMega48/main.map b/trunk/AVRProjects/ATMega48/main.map
new file mode 100644
index 00000000..049ded57
--- /dev/null
+++ b/trunk/AVRProjects/ATMega48/main.map
@@ -0,0 +1,429 @@
+Archive member included to satisfy reference by file (symbol)
+
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr4\libgcc.a(_exit.o)
+                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o (exit)
+
+Memory Configuration
+
+Name             Origin             Length             Attributes
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+data             0x00800060         0x0000ffa0         rw !x
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+signature        0x00840000         0x00000400         rw !x
+*default*        0x00000000         0xffffffff
+
+Linker script and memory map
+
+Address of section .data set to 0x800100
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+LOAD main.o
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4\libm.a
+START GROUP
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr4\libgcc.a
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4\libm.a
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4\libc.a
+END GROUP
+
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+                0x00000000                __vector_default
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+                0x00000034                __init
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+ .debug_abbrev  0x00000000       0xd1 main.o
+
+.debug_line     0x00000000       0xd9
+ *(.debug_line .debug_line.* .debug_line_end)
+ .debug_line    0x00000000       0xd9 main.o
+
+.debug_frame    0x00000000       0x24
+ *(.debug_frame)
+ .debug_frame   0x00000000       0x24 main.o
+
+.debug_str      0x00000000      0x132
+ *(.debug_str)
+ .debug_str     0x00000000      0x132 main.o
+                                0x166 (size before relaxing)
+
+.debug_loc      0x00000000       0x1f
+ *(.debug_loc)
+ .debug_loc     0x00000000       0x1f main.o
+
+.debug_macinfo
+ *(.debug_macinfo)
+
+.debug_weaknames
+ *(.debug_weaknames)
+
+.debug_funcnames
+ *(.debug_funcnames)
+
+.debug_typenames
+ *(.debug_typenames)
+
+.debug_varnames
+ *(.debug_varnames)
+
+.debug_pubtypes
+ *(.debug_pubtypes)
+
+.debug_ranges   0x00000000       0x10
+ *(.debug_ranges)
+ .debug_ranges  0x00000000       0x10 main.o
+
+.debug_macro
+ *(.debug_macro)
+OUTPUT(main.elf elf32-avr)
+LOAD linker stubs
+
+Cross Reference Table
+
+Symbol                                            File
+__bad_interrupt                                   e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__heap_end                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__init                                            e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__stack                                           e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_1                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_10                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_11                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_12                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_13                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_14                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_15                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_16                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_17                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_18                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_19                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_2                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_20                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_21                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_22                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_23                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_24                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_25                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_3                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_4                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_5                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_6                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_7                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_8                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_9                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vector_default                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+__vectors                                         e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+_exit                                             e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr4\libgcc.a(_exit.o)
+exit                                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr4\libgcc.a(_exit.o)
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
+main                                              main.o
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr4/crtm48.o
diff --git a/trunk/AVRProjects/ATMega48/main.sym b/trunk/AVRProjects/ATMega48/main.sym
new file mode 100644
index 00000000..bd4c81a4
--- /dev/null
+++ b/trunk/AVRProjects/ATMega48/main.sym
@@ -0,0 +1,52 @@
+00000000 W __heap_end
+00000000 a __tmp_reg__
+00000000 W __vector_default
+00000000 T __vectors
+00000001 a __zero_reg__
+00000034 T __ctors_end
+00000034 T __ctors_start
+00000034 T __dtors_end
+00000034 T __dtors_start
+00000034 W __init
+00000034 T __trampolines_end
+00000034 T __trampolines_start
+0000003d a __SP_L__
+0000003e a __SP_H__
+0000003f a __SREG__
+00000044 T __bad_interrupt
+00000044 W __vector_1
+00000044 W __vector_10
+00000044 W __vector_11
+00000044 W __vector_12
+00000044 W __vector_13
+00000044 W __vector_14
+00000044 W __vector_15
+00000044 W __vector_16
+00000044 W __vector_17
+00000044 W __vector_18
+00000044 W __vector_19
+00000044 W __vector_2
+00000044 W __vector_20
+00000044 W __vector_21
+00000044 W __vector_22
+00000044 W __vector_23
+00000044 W __vector_24
+00000044 W __vector_25
+00000044 W __vector_3
+00000044 W __vector_4
+00000044 W __vector_5
+00000044 W __vector_6
+00000044 W __vector_7
+00000044 W __vector_8
+00000044 W __vector_9
+00000046 T main
+00000066 T _exit
+00000066 W exit
+00000068 t __stop_program
+0000006a A __data_load_end
+0000006a A __data_load_start
+0000006a T _etext
+000002ff W __stack
+00800100 D _edata
+00800100 T _end
+00810000 T __eeprom_end
diff --git a/trunk/AVRProjects/ATMega48/makefile b/trunk/AVRProjects/ATMega48/makefile
new file mode 100644
index 00000000..46f8b11f
--- /dev/null
+++ b/trunk/AVRProjects/ATMega48/makefile
@@ -0,0 +1,441 @@
+# Hey Emacs, this is a -*- makefile -*-
+#
+# WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al.
+# Released to the Public Domain
+# Please read the make user manual!
+#
+# Additional material for this makefile was submitted by:
+#  Tim Henigan
+#  Peter Fleury
+#  Reiner Patommel
+#  Sander Pool
+#  Frederik Rouleau
+#  Markus Pfaff
+#
+# On command line:
+#
+# make all = Make software.
+#
+# make clean = Clean out built project files.
+#
+# make coff = Convert ELF to AVR COFF (for use with AVR Studio 3.x or VMLAB).
+#
+# make extcoff = Convert ELF to AVR Extended COFF (for use with AVR Studio
+#                4.07 or greater).
+#
+# make program = Download the hex file to the device, using avrdude.  Please
+#                customize the avrdude settings below first!
+#
+# make filename.s = Just compile filename.c into the assembler code only
+#
+# To rebuild project do "make clean" then "make all".
+#
+
+# mth 2004/09 
+# Differences from WinAVR 20040720 sample:
+# - DEPFLAGS according to Eric Weddingtion's fix (avrfreaks/gcc-forum)
+# - F_OSC Define in CFLAGS and AFLAGS
+
+
+# MCU name
+MCU = atmega48
+
+# Main Oscillator Frequency
+# This is only used to define F_OSC in all assembler and c-sources.
+F_OSC = 8000000
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+# Target file name (without extension).
+TARGET = main
+
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = $(TARGET).c
+
+
+# List Assembler source files here.
+# Make them always end in a capital .S.  Files ending in a lowercase .s
+# will not be considered source files but generated files (assembler
+# output from the compiler), and will be deleted upon "make clean"!
+# Even though the DOS/Win* filesystem matches both .s and .S the same,
+# it will preserve the spelling of the filenames, and gcc itself does
+# care about how the name is spelled on its command-line.
+ASRC = 
+
+
+
+# Optimization level, can be [0, 1, 2, 3, s]. 
+# 0 = turn off optimization. s = optimize for size.
+# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+OPT = s
+
+# Debugging format.
+# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
+# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
+#DEBUG = stabs
+DEBUG = dwarf-2
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+EXTRAINCDIRS = 
+
+
+# Compiler flag to set the C Standard level.
+# c89   - "ANSI" C
+# gnu89 - c89 plus GCC extensions
+# c99   - ISO C99 standard (not yet fully implemented)
+# gnu99 - c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+# Place -D or -U options here
+CDEFS =
+
+# Place -I options here
+CINCS =
+
+
+# Compiler flags.
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT)
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+CFLAGS += -Wall -Wstrict-prototypes
+CFLAGS += -Wa,-adhlns=$(<:.c=.lst)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+CFLAGS += -DF_OSC=$(F_OSC)
+
+
+
+# Assembler flags.
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs 
+ASFLAGS += -DF_OSC=$(F_OSC)
+
+
+#Additional libraries.
+
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+PRINTF_LIB = 
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+SCANF_LIB = 
+
+MATH_LIB = -lm
+
+# External memory options
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+# Linker flags.
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+
+
+
+
+# Programming support using avrdude. Settings and variables.
+
+# Programming hardware: alf avr910 avrisp bascom bsd 
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+#AVRDUDE_PROGRAMMER = stk500
+AVRDUDE_PROGRAMMER = usbasp
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = usb    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude> 
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+# ---------------------------------------------------------------------------
+
+# Define directories, if needed.
+DIRAVR = c:/winavr
+DIRAVRBIN = $(DIRAVR)/bin
+DIRAVRUTILS = $(DIRAVR)/utils/bin
+DIRINC = .
+DIRLIB = $(DIRAVR)/avr/lib
+
+
+# Define programs and commands.
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+
+
+
+
+# Define Messages
+# English
+MSG_ERRORS_NONE = Errors: none
+MSG_BEGIN = -------- begin --------
+MSG_END = --------  end  --------
+MSG_SIZE_BEFORE = Size before: 
+MSG_SIZE_AFTER = Size after:
+MSG_COFF = Converting to AVR COFF:
+MSG_EXTENDED_COFF = Converting to AVR Extended COFF:
+MSG_FLASH = Creating load file for Flash:
+MSG_EEPROM = Creating load file for EEPROM:
+MSG_EXTENDED_LISTING = Creating Extended Listing:
+MSG_SYMBOL_TABLE = Creating Symbol Table:
+MSG_LINKING = Linking:
+MSG_COMPILING = Compiling:
+MSG_ASSEMBLING = Assembling:
+MSG_CLEANING = Cleaning project:
+
+
+
+
+# Define all object files.
+OBJ = $(SRC:.c=.o) $(ASRC:.S=.o) 
+
+# Define all listing files.
+LST = $(ASRC:.S=.lst) $(SRC:.c=.lst)
+
+
+# Compiler flags to generate dependency files.
+### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
+GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS)
+
+
+
+
+
+# Default target.
+#all: begin gccversion sizebefore build sizeafter finished end
+all: begin gccversion build size finished end
+
+build: elf hex eep lss sym
+
+elf: $(TARGET).elf
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss 
+sym: $(TARGET).sym
+
+
+
+# Eye candy.
+# AVR Studio 3.x does not check make's exit code but relies on
+# the following magic strings to be generated by the compile job.
+begin:
+	@echo
+	@echo $(MSG_BEGIN)
+
+finished:
+	@echo $(MSG_ERRORS_NONE)
+
+end:
+	@echo $(MSG_END)
+	@echo
+
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+sizebefore:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
+
+sizeafter:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
+
+size:
+	$(SIZE) -C --mcu=$(MCU) $(TARGET).elf
+
+# Display compiler version information.
+gccversion : 
+	@$(CC) --version
+
+
+
+# Program the device.  
+program: $(TARGET).hex $(TARGET).eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM)
+
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000 
+
+
+coff: $(TARGET).elf
+	@echo
+	@echo $(MSG_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	@echo
+	@echo $(MSG_EXTENDED_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+
+# Create final output files (.hex, .eep) from ELF output file.
+%.hex: %.elf
+	@echo
+	@echo $(MSG_FLASH) $@
+	$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+%.eep: %.elf
+	@echo
+	@echo $(MSG_EEPROM) $@
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+%.lss: %.elf
+	@echo
+	@echo $(MSG_EXTENDED_LISTING) $@
+	$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+%.sym: %.elf
+	@echo
+	@echo $(MSG_SYMBOL_TABLE) $@
+	$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+%.elf: $(OBJ)
+	@echo
+	@echo $(MSG_LINKING) $@
+	$(CC) $(ALL_CFLAGS) $(OBJ) --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+%.o : %.c
+	@echo
+	@echo $(MSG_COMPILING) $<
+	$(CC) -c $(ALL_CFLAGS) $< -o $@ 
+
+
+# Compile: create assembler files from C source files.
+%.s : %.c
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+%.o : %.S
+	@echo
+	@echo $(MSG_ASSEMBLING) $<
+	$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+
+
+# Target: clean project.
+clean: begin clean_list finished end
+
+clean_list :
+	@echo
+	@echo $(MSG_CLEANING)
+	$(REMOVE) $(TARGET).hex
+	$(REMOVE) $(TARGET).eep
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).cof
+	$(REMOVE) $(TARGET).elf
+	$(REMOVE) $(TARGET).map
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).a90
+	$(REMOVE) $(TARGET).sym
+	$(REMOVE) $(TARGET).lnk
+	$(REMOVE) $(TARGET).lss
+	$(REMOVE) $(OBJ)
+	$(REMOVE) $(LST)
+	$(REMOVE) $(SRC:.c=.s)
+	$(REMOVE) $(SRC:.c=.d)
+	$(REMOVE) .dep/*
+
+
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program
+ 
+
+ 
diff --git a/trunk/AVRProjects/ATTiny13/.dep/main.o.d b/trunk/AVRProjects/ATTiny13/.dep/main.o.d
new file mode 100644
index 00000000..d2f034a3
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny13/.dep/main.o.d
@@ -0,0 +1,35 @@
+main.o: main.c main.h a:\hardware\tools\avr\avr\include\avr\io.h \
+ a:\hardware\tools\avr\avr\include\avr\sfr_defs.h \
+ a:\hardware\tools\avr\avr\include\inttypes.h \
+ a:\hardware\tools\avr\lib\gcc\avr\4.9.2\include\stdint.h \
+ a:\hardware\tools\avr\avr\include\stdint.h \
+ a:\hardware\tools\avr\avr\include\avr\iotn13.h \
+ a:\hardware\tools\avr\avr\include\avr\portpins.h \
+ a:\hardware\tools\avr\avr\include\avr\common.h \
+ a:\hardware\tools\avr\avr\include\avr\version.h \
+ a:\hardware\tools\avr\avr\include\avr\fuse.h \
+ a:\hardware\tools\avr\avr\include\avr\lock.h
+
+main.h:
+
+a:\hardware\tools\avr\avr\include\avr\io.h:
+
+a:\hardware\tools\avr\avr\include\avr\sfr_defs.h:
+
+a:\hardware\tools\avr\avr\include\inttypes.h:
+
+a:\hardware\tools\avr\lib\gcc\avr\4.9.2\include\stdint.h:
+
+a:\hardware\tools\avr\avr\include\stdint.h:
+
+a:\hardware\tools\avr\avr\include\avr\iotn13.h:
+
+a:\hardware\tools\avr\avr\include\avr\portpins.h:
+
+a:\hardware\tools\avr\avr\include\avr\common.h:
+
+a:\hardware\tools\avr\avr\include\avr\version.h:
+
+a:\hardware\tools\avr\avr\include\avr\fuse.h:
+
+a:\hardware\tools\avr\avr\include\avr\lock.h:
diff --git a/trunk/AVRProjects/ATTiny13/main.c b/trunk/AVRProjects/ATTiny13/main.c
new file mode 100644
index 00000000..c89e0e9e
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny13/main.c
@@ -0,0 +1,67 @@
+/* ******************************************************** *
+ *
+ * Simple program with avr-gcc and ATtiny13
+ * -------------------------------------------------------- *
+ * Created on: 	07.06.2016
+ * Author:		Paolo Iocco
+ * ******************************************************** */
+/* ******************************************************** *
+    ATtiny 13/45/85 Pin map
+                           +--\/--+
+         /Reset ADC0 PB5  -|1°   8|-  Vcc
+                ADC3 PB3  -|2    7|-  PB2 ADC1 SCK
+                ADC2 PB4  -|3    6|-  PB1 OC0B MISO AIN1
+                     GND  -|4    5|-  PB0 OC0A MOSI AIN0
+                           +------+
+* ********************************************************* */
+
+#include "main.h"
+
+void adc_setup (void)
+{
+    // Set the ADC input to PB2/ADC1
+    ADMUX |= (1 << MUX0);
+    ADMUX |= (1 << ADLAR);
+    // Set the prescaler to clock/128 & enable ADC
+    ADCSRA |= (1 << ADPS1) | (1 << ADPS0) | (1 << ADEN);
+}
+
+int adc_read (void)
+{
+    // Start the conversion
+    ADCSRA |= (1 << ADSC);
+    // Wait for it to finish
+    while (ADCSRA & (1 << ADSC));
+    return ADCH;
+}
+
+void pwm_setup (void)
+{
+	// Set Timer 0 prescaler to clock/8.
+	// At 9.6 MHz this is 1.2 MHz.
+	TCCR0B |= (1 << CS01) | (1 << CS00);
+	// Set to 'Fast PWM' mode
+	TCCR0A |= (1 << WGM01) | (1 << WGM00);
+	// Clear OC0B output on compare match, upwards counting.
+	TCCR0A |= (1 << COM0B1);
+}
+
+void pwm_write (int val)
+{
+    OCR0B = val;
+}
+
+int main (void)
+{
+    int adc_in;
+    // LED is an output.
+    DDRB |= (1 << LED);
+    adc_setup();
+    pwm_setup();
+    while (1) {
+        // Get the ADC value
+        adc_in = adc_read();
+        // Now write it to the PWM counter
+        pwm_write(adc_in);
+    }
+}
diff --git a/trunk/AVRProjects/ATTiny13/main.eep b/trunk/AVRProjects/ATTiny13/main.eep
new file mode 100644
index 00000000..1996e8fd
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny13/main.eep
@@ -0,0 +1 @@
+:00000001FF
diff --git a/trunk/AVRProjects/ATTiny13/main.elf b/trunk/AVRProjects/ATTiny13/main.elf
new file mode 100644
index 00000000..82a8229a
Binary files /dev/null and b/trunk/AVRProjects/ATTiny13/main.elf differ
diff --git a/trunk/AVRProjects/ATTiny13/main.h b/trunk/AVRProjects/ATTiny13/main.h
new file mode 100644
index 00000000..38af9774
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny13/main.h
@@ -0,0 +1,18 @@
+/*
+ * main.h
+ *
+ *  Created on: 20.07.2016
+ *      Author: q242695
+ */
+#ifndef MAIN_H_
+#define MAIN_H_
+
+#include <avr/io.h>
+
+#ifndef F_CPU
+#define F_CPU 9600000L
+#endif
+
+#define LED PB3
+
+#endif /* MAIN_H_ */
diff --git a/trunk/AVRProjects/ATTiny13/main.hex b/trunk/AVRProjects/ATTiny13/main.hex
new file mode 100644
index 00000000..bd7e1ea3
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny13/main.hex
@@ -0,0 +1,8 @@
+:1000000009C00EC00DC00CC00BC00AC009C008C09A
+:1000100007C006C011241FBECFE9CDBF1AD01FC034
+:10002000EFCF389A3D9A86B1836886B90895369A9B
+:100030003699FECF85B190E0089583B7836083BF82
+:100040008FB583608FBD8FB580628FBD089589BDE8
+:100050000895BB9AE6DFF1DFEADF89BDFDCFF894B2
+:02006000FFCFD0
+:00000001FF
diff --git a/trunk/AVRProjects/ATTiny13/main.lss b/trunk/AVRProjects/ATTiny13/main.lss
new file mode 100644
index 00000000..00114762
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny13/main.lss
@@ -0,0 +1,149 @@
+
+main.elf:     file format elf32-avr
+
+Sections:
+Idx Name          Size      VMA       LMA       File off  Algn
+  0 .text         00000062  00000000  00000000  00000074  2**1
+                  CONTENTS, ALLOC, LOAD, READONLY, CODE
+  1 .data         00000000  00800060  00000062  000000d6  2**0
+                  CONTENTS, ALLOC, LOAD, DATA
+  2 .comment      00000011  00000000  00000000  000000d6  2**0
+                  CONTENTS, READONLY
+  3 .note.gnu.avr.deviceinfo 0000003c  00000000  00000000  000000e8  2**2
+                  CONTENTS, READONLY
+  4 .debug_aranges 00000028  00000000  00000000  00000124  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  5 .debug_info   00000410  00000000  00000000  0000014c  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  6 .debug_abbrev 0000037f  00000000  00000000  0000055c  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  7 .debug_line   0000010a  00000000  00000000  000008db  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  8 .debug_frame  00000064  00000000  00000000  000009e8  2**2
+                  CONTENTS, READONLY, DEBUGGING
+  9 .debug_str    00000217  00000000  00000000  00000a4c  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 10 .debug_ranges 00000018  00000000  00000000  00000c63  2**0
+                  CONTENTS, READONLY, DEBUGGING
+
+Disassembly of section .text:
+
+00000000 <__vectors>:
+   0:	09 c0       	rjmp	.+18     	; 0x14 <__ctors_end>
+   2:	0e c0       	rjmp	.+28     	; 0x20 <__bad_interrupt>
+   4:	0d c0       	rjmp	.+26     	; 0x20 <__bad_interrupt>
+   6:	0c c0       	rjmp	.+24     	; 0x20 <__bad_interrupt>
+   8:	0b c0       	rjmp	.+22     	; 0x20 <__bad_interrupt>
+   a:	0a c0       	rjmp	.+20     	; 0x20 <__bad_interrupt>
+   c:	09 c0       	rjmp	.+18     	; 0x20 <__bad_interrupt>
+   e:	08 c0       	rjmp	.+16     	; 0x20 <__bad_interrupt>
+  10:	07 c0       	rjmp	.+14     	; 0x20 <__bad_interrupt>
+  12:	06 c0       	rjmp	.+12     	; 0x20 <__bad_interrupt>
+
+00000014 <__ctors_end>:
+  14:	11 24       	eor	r1, r1
+  16:	1f be       	out	0x3f, r1	; 63
+  18:	cf e9       	ldi	r28, 0x9F	; 159
+  1a:	cd bf       	out	0x3d, r28	; 61
+  1c:	1a d0       	rcall	.+52     	; 0x52 <main>
+  1e:	1f c0       	rjmp	.+62     	; 0x5e <_exit>
+
+00000020 <__bad_interrupt>:
+  20:	ef cf       	rjmp	.-34     	; 0x0 <__vectors>
+
+00000022 <adc_setup>:
+#include "main.h"
+
+void adc_setup (void)
+{
+    // Set the ADC input to PB2/ADC1
+    ADMUX |= (1 << MUX0);
+  22:	38 9a       	sbi	0x07, 0	; 7
+    ADMUX |= (1 << ADLAR);
+  24:	3d 9a       	sbi	0x07, 5	; 7
+    // Set the prescaler to clock/128 & enable ADC
+    ADCSRA |= (1 << ADPS1) | (1 << ADPS0) | (1 << ADEN);
+  26:	86 b1       	in	r24, 0x06	; 6
+  28:	83 68       	ori	r24, 0x83	; 131
+  2a:	86 b9       	out	0x06, r24	; 6
+  2c:	08 95       	ret
+
+0000002e <adc_read>:
+}
+
+int adc_read (void)
+{
+    // Start the conversion
+    ADCSRA |= (1 << ADSC);
+  2e:	36 9a       	sbi	0x06, 6	; 6
+    // Wait for it to finish
+    while (ADCSRA & (1 << ADSC));
+  30:	36 99       	sbic	0x06, 6	; 6
+  32:	fe cf       	rjmp	.-4      	; 0x30 <adc_read+0x2>
+    return ADCH;
+  34:	85 b1       	in	r24, 0x05	; 5
+}
+  36:	90 e0       	ldi	r25, 0x00	; 0
+  38:	08 95       	ret
+
+0000003a <pwm_setup>:
+
+void pwm_setup (void)
+{
+	// Set Timer 0 prescaler to clock/8.
+	// At 9.6 MHz this is 1.2 MHz.
+	TCCR0B |= (1 << CS01) | (1 << CS00);
+  3a:	83 b7       	in	r24, 0x33	; 51
+  3c:	83 60       	ori	r24, 0x03	; 3
+  3e:	83 bf       	out	0x33, r24	; 51
+	// Set to 'Fast PWM' mode
+	TCCR0A |= (1 << WGM01) | (1 << WGM00);
+  40:	8f b5       	in	r24, 0x2f	; 47
+  42:	83 60       	ori	r24, 0x03	; 3
+  44:	8f bd       	out	0x2f, r24	; 47
+	// Clear OC0B output on compare match, upwards counting.
+	TCCR0A |= (1 << COM0B1);
+  46:	8f b5       	in	r24, 0x2f	; 47
+  48:	80 62       	ori	r24, 0x20	; 32
+  4a:	8f bd       	out	0x2f, r24	; 47
+  4c:	08 95       	ret
+
+0000004e <pwm_write>:
+}
+
+void pwm_write (int val)
+{
+    OCR0B = val;
+  4e:	89 bd       	out	0x29, r24	; 41
+  50:	08 95       	ret
+
+00000052 <main>:
+
+int main (void)
+{
+    int adc_in;
+    // LED is an output.
+    DDRB |= (1 << LED);
+  52:	bb 9a       	sbi	0x17, 3	; 23
+    adc_setup();
+  54:	e6 df       	rcall	.-52     	; 0x22 <adc_setup>
+    pwm_setup();
+  56:	f1 df       	rcall	.-30     	; 0x3a <pwm_setup>
+    while (1) {
+        // Get the ADC value
+        adc_in = adc_read();
+  58:	ea df       	rcall	.-44     	; 0x2e <adc_read>
+	TCCR0A |= (1 << COM0B1);
+}
+
+void pwm_write (int val)
+{
+    OCR0B = val;
+  5a:	89 bd       	out	0x29, r24	; 41
+  5c:	fd cf       	rjmp	.-6      	; 0x58 <main+0x6>
+
+0000005e <_exit>:
+  5e:	f8 94       	cli
+
+00000060 <__stop_program>:
+  60:	ff cf       	rjmp	.-2      	; 0x60 <__stop_program>
diff --git a/trunk/AVRProjects/ATTiny13/main.lst b/trunk/AVRProjects/ATTiny13/main.lst
new file mode 100644
index 00000000..3071ea63
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny13/main.lst
@@ -0,0 +1,201 @@
+   1               		.file	"main.c"
+   2               	__SP_L__ = 0x3d
+   3               	__SREG__ = 0x3f
+   4               	__tmp_reg__ = 0
+   5               	__zero_reg__ = 1
+   6               		.text
+   7               	.Ltext0:
+   8               		.cfi_sections	.debug_frame
+   9               	.global	adc_setup
+  11               	adc_setup:
+  12               	.LFB0:
+  13               		.file 1 "main.c"
+   1:main.c        **** /* ******************************************************** *
+   2:main.c        ****  *
+   3:main.c        ****  * Simple program with avr-gcc and ATtiny13
+   4:main.c        ****  * -------------------------------------------------------- *
+   5:main.c        ****  * Created on: 	07.06.2016
+   6:main.c        ****  * Author:		Paolo Iocco
+   7:main.c        ****  * ******************************************************** */
+   8:main.c        **** /* ******************************************************** *
+   9:main.c        ****     ATtiny 13/45/85 Pin map
+  10:main.c        ****                            +--\/--+
+  11:main.c        ****          /Reset ADC0 PB5  -|1°   8|-  Vcc
+  12:main.c        ****                 ADC3 PB3  -|2    7|-  PB2 ADC1 SCK
+  13:main.c        ****                 ADC2 PB4  -|3    6|-  PB1 OC0B MISO AIN1
+  14:main.c        ****                      GND  -|4    5|-  PB0 OC0A MOSI AIN0
+  15:main.c        ****                            +------+
+  16:main.c        **** * ********************************************************* */
+  17:main.c        **** 
+  18:main.c        **** #include "main.h"
+  19:main.c        **** 
+  20:main.c        **** void adc_setup (void)
+  21:main.c        **** {
+  14               		.loc 1 21 0
+  15               		.cfi_startproc
+  16               	/* prologue: function */
+  17               	/* frame size = 0 */
+  18               	/* stack size = 0 */
+  19               	.L__stack_usage = 0
+  22:main.c        ****     // Set the ADC input to PB2/ADC1
+  23:main.c        ****     ADMUX |= (1 << MUX0);
+  20               		.loc 1 23 0
+  21 0000 389A      		sbi 0x7,0
+  24:main.c        ****     ADMUX |= (1 << ADLAR);
+  22               		.loc 1 24 0
+  23 0002 3D9A      		sbi 0x7,5
+  25:main.c        ****     // Set the prescaler to clock/128 & enable ADC
+  26:main.c        ****     ADCSRA |= (1 << ADPS1) | (1 << ADPS0) | (1 << ADEN);
+  24               		.loc 1 26 0
+  25 0004 86B1      		in r24,0x6
+  26 0006 8368      		ori r24,lo8(-125)
+  27 0008 86B9      		out 0x6,r24
+  28 000a 0895      		ret
+  29               		.cfi_endproc
+  30               	.LFE0:
+  32               	.global	adc_read
+  34               	adc_read:
+  35               	.LFB1:
+  27:main.c        **** }
+  28:main.c        **** 
+  29:main.c        **** int adc_read (void)
+  30:main.c        **** {
+  36               		.loc 1 30 0
+  37               		.cfi_startproc
+  38               	/* prologue: function */
+  39               	/* frame size = 0 */
+  40               	/* stack size = 0 */
+  41               	.L__stack_usage = 0
+  31:main.c        ****     // Start the conversion
+  32:main.c        ****     ADCSRA |= (1 << ADSC);
+  42               		.loc 1 32 0
+  43 000c 369A      		sbi 0x6,6
+  44               	.L3:
+  33:main.c        ****     // Wait for it to finish
+  34:main.c        ****     while (ADCSRA & (1 << ADSC));
+  45               		.loc 1 34 0 discriminator 1
+  46 000e 3699      		sbic 0x6,6
+  47 0010 00C0      		rjmp .L3
+  35:main.c        ****     return ADCH;
+  48               		.loc 1 35 0
+  49 0012 85B1      		in r24,0x5
+  36:main.c        **** }
+  50               		.loc 1 36 0
+  51 0014 90E0      		ldi r25,0
+  52 0016 0895      		ret
+  53               		.cfi_endproc
+  54               	.LFE1:
+  56               	.global	pwm_setup
+  58               	pwm_setup:
+  59               	.LFB2:
+  37:main.c        **** 
+  38:main.c        **** void pwm_setup (void)
+  39:main.c        **** {
+  60               		.loc 1 39 0
+  61               		.cfi_startproc
+  62               	/* prologue: function */
+  63               	/* frame size = 0 */
+  64               	/* stack size = 0 */
+  65               	.L__stack_usage = 0
+  40:main.c        **** 	// Set Timer 0 prescaler to clock/8.
+  41:main.c        **** 	// At 9.6 MHz this is 1.2 MHz.
+  42:main.c        **** 	TCCR0B |= (1 << CS01) | (1 << CS00);
+  66               		.loc 1 42 0
+  67 0018 83B7      		in r24,0x33
+  68 001a 8360      		ori r24,lo8(3)
+  69 001c 83BF      		out 0x33,r24
+  43:main.c        **** 	// Set to 'Fast PWM' mode
+  44:main.c        **** 	TCCR0A |= (1 << WGM01) | (1 << WGM00);
+  70               		.loc 1 44 0
+  71 001e 8FB5      		in r24,0x2f
+  72 0020 8360      		ori r24,lo8(3)
+  73 0022 8FBD      		out 0x2f,r24
+  45:main.c        **** 	// Clear OC0B output on compare match, upwards counting.
+  46:main.c        **** 	TCCR0A |= (1 << COM0B1);
+  74               		.loc 1 46 0
+  75 0024 8FB5      		in r24,0x2f
+  76 0026 8062      		ori r24,lo8(32)
+  77 0028 8FBD      		out 0x2f,r24
+  78 002a 0895      		ret
+  79               		.cfi_endproc
+  80               	.LFE2:
+  82               	.global	pwm_write
+  84               	pwm_write:
+  85               	.LFB3:
+  47:main.c        **** }
+  48:main.c        **** 
+  49:main.c        **** void pwm_write (int val)
+  50:main.c        **** {
+  86               		.loc 1 50 0
+  87               		.cfi_startproc
+  88               	.LVL0:
+  89               	/* prologue: function */
+  90               	/* frame size = 0 */
+  91               	/* stack size = 0 */
+  92               	.L__stack_usage = 0
+  51:main.c        ****     OCR0B = val;
+  93               		.loc 1 51 0
+  94 002c 89BD      		out 0x29,r24
+  95 002e 0895      		ret
+  96               		.cfi_endproc
+  97               	.LFE3:
+  99               		.section	.text.startup,"ax",@progbits
+ 100               	.global	main
+ 102               	main:
+ 103               	.LFB4:
+  52:main.c        **** }
+  53:main.c        **** 
+  54:main.c        **** int main (void)
+  55:main.c        **** {
+ 104               		.loc 1 55 0
+ 105               		.cfi_startproc
+ 106               	/* prologue: function */
+ 107               	/* frame size = 0 */
+ 108               	/* stack size = 0 */
+ 109               	.L__stack_usage = 0
+  56:main.c        ****     int adc_in;
+  57:main.c        ****     // LED is an output.
+  58:main.c        ****     DDRB |= (1 << LED);
+ 110               		.loc 1 58 0
+ 111 0000 BB9A      		sbi 0x17,3
+  59:main.c        ****     adc_setup();
+ 112               		.loc 1 59 0
+ 113 0002 00D0      		rcall adc_setup
+ 114               	.LVL1:
+  60:main.c        ****     pwm_setup();
+ 115               		.loc 1 60 0
+ 116 0004 00D0      		rcall pwm_setup
+ 117               	.LVL2:
+ 118               	.L9:
+  61:main.c        ****     while (1) {
+  62:main.c        ****         // Get the ADC value
+  63:main.c        ****         adc_in = adc_read();
+ 119               		.loc 1 63 0 discriminator 1
+ 120 0006 00D0      		rcall adc_read
+ 121               	.LVL3:
+ 122               	.LBB4:
+ 123               	.LBB5:
+  51:main.c        **** }
+ 124               		.loc 1 51 0 discriminator 1
+ 125 0008 89BD      		out 0x29,r24
+ 126 000a 00C0      		rjmp .L9
+ 127               	.LBE5:
+ 128               	.LBE4:
+ 129               		.cfi_endproc
+ 130               	.LFE4:
+ 132               		.text
+ 133               	.Letext0:
+ 134               		.file 2 "a:\\hardware\\tools\\avr\\avr\\include\\stdint.h"
+DEFINED SYMBOLS
+                            *ABS*:00000000 main.c
+C:\Users\q242695\AppData\Local\Temp\ccY7rbVv.s:2      *ABS*:0000003d __SP_L__
+C:\Users\q242695\AppData\Local\Temp\ccY7rbVv.s:3      *ABS*:0000003f __SREG__
+C:\Users\q242695\AppData\Local\Temp\ccY7rbVv.s:4      *ABS*:00000000 __tmp_reg__
+C:\Users\q242695\AppData\Local\Temp\ccY7rbVv.s:5      *ABS*:00000001 __zero_reg__
+C:\Users\q242695\AppData\Local\Temp\ccY7rbVv.s:11     .text:00000000 adc_setup
+C:\Users\q242695\AppData\Local\Temp\ccY7rbVv.s:34     .text:0000000c adc_read
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+C:\Users\q242695\AppData\Local\Temp\ccY7rbVv.s:102    .text.startup:00000000 main
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diff --git a/trunk/AVRProjects/ATTiny13/main.map b/trunk/AVRProjects/ATTiny13/main.map
new file mode 100644
index 00000000..15203392
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny13/main.map
@@ -0,0 +1,427 @@
+Archive member included to satisfy reference by file (symbol)
+
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+Linker script and memory map
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+LOAD a:/hardware/tools/avr/bin/../lib/gcc/avr/4.9.2/../../../../avr/lib/avr25/tiny-stack/crtattiny13.o
+LOAD main.o
+LOAD a:/hardware/tools/avr/bin/../lib/gcc/avr/4.9.2/../../../../avr/lib/avr25/tiny-stack\libm.a
+START GROUP
+LOAD a:/hardware/tools/avr/bin/../lib/gcc/avr/4.9.2/avr25/tiny-stack\libgcc.a
+LOAD a:/hardware/tools/avr/bin/../lib/gcc/avr/4.9.2/../../../../avr/lib/avr25/tiny-stack\libm.a
+LOAD a:/hardware/tools/avr/bin/../lib/gcc/avr/4.9.2/../../../../avr/lib/avr25/tiny-stack\libc.a
+LOAD a:/hardware/tools/avr/bin/../lib/gcc/avr/4.9.2/../../../../avr/lib/avr25/tiny-stack\libattiny13.a
+END GROUP
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+OUTPUT(main.elf elf32-avr)
+LOAD linker stubs
+
+Cross Reference Table
+
+Symbol                                            File
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+__bad_interrupt                                   a:/hardware/tools/avr/bin/../lib/gcc/avr/4.9.2/../../../../avr/lib/avr25/tiny-stack/crtattiny13.o
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+_exit                                             a:/hardware/tools/avr/bin/../lib/gcc/avr/4.9.2/avr25/tiny-stack\libgcc.a(_exit.o)
+adc_read                                          main.o
+adc_setup                                         main.o
+exit                                              a:/hardware/tools/avr/bin/../lib/gcc/avr/4.9.2/avr25/tiny-stack\libgcc.a(_exit.o)
+                                                  a:/hardware/tools/avr/bin/../lib/gcc/avr/4.9.2/../../../../avr/lib/avr25/tiny-stack/crtattiny13.o
+main                                              main.o
+                                                  a:/hardware/tools/avr/bin/../lib/gcc/avr/4.9.2/../../../../avr/lib/avr25/tiny-stack/crtattiny13.o
+pwm_setup                                         main.o
+pwm_write                                         main.o
diff --git a/trunk/AVRProjects/ATTiny13/main.sym b/trunk/AVRProjects/ATTiny13/main.sym
new file mode 100644
index 00000000..29b1c788
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny13/main.sym
@@ -0,0 +1,46 @@
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diff --git a/trunk/AVRProjects/ATTiny13/makefile b/trunk/AVRProjects/ATTiny13/makefile
new file mode 100644
index 00000000..c1ba6d20
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny13/makefile
@@ -0,0 +1,441 @@
+# Hey Emacs, this is a -*- makefile -*-
+#
+# WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al.
+# Released to the Public Domain
+# Please read the make user manual!
+#
+# Additional material for this makefile was submitted by:
+#  Tim Henigan
+#  Peter Fleury
+#  Reiner Patommel
+#  Sander Pool
+#  Frederik Rouleau
+#  Markus Pfaff
+#
+# On command line:
+#
+# make all = Make software.
+#
+# make clean = Clean out built project files.
+#
+# make coff = Convert ELF to AVR COFF (for use with AVR Studio 3.x or VMLAB).
+#
+# make extcoff = Convert ELF to AVR Extended COFF (for use with AVR Studio
+#                4.07 or greater).
+#
+# make program = Download the hex file to the device, using avrdude.  Please
+#                customize the avrdude settings below first!
+#
+# make filename.s = Just compile filename.c into the assembler code only
+#
+# To rebuild project do "make clean" then "make all".
+#
+
+# mth 2004/09
+# Differences from WinAVR 20040720 sample:
+# - DEPFLAGS according to Eric Weddingtion's fix (avrfreaks/gcc-forum)
+# - F_OSC Define in CFLAGS and AFLAGS
+
+
+# MCU name
+MCU = attiny13
+
+# Main Oscillator Frequency
+# This is only used to define F_OSC in all assembler and c-sources.
+#F_OSC = 9600000
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+# Target file name (without extension).
+TARGET = main
+
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = $(TARGET).c
+
+
+# List Assembler source files here.
+# Make them always end in a capital .S.  Files ending in a lowercase .s
+# will not be considered source files but generated files (assembler
+# output from the compiler), and will be deleted upon "make clean"!
+# Even though the DOS/Win* filesystem matches both .s and .S the same,
+# it will preserve the spelling of the filenames, and gcc itself does
+# care about how the name is spelled on its command-line.
+ASRC =
+
+
+
+# Optimization level, can be [0, 1, 2, 3, s].
+# 0 = turn off optimization. s = optimize for size.
+# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+OPT = s
+
+# Debugging format.
+# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
+# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
+#DEBUG = stabs
+DEBUG = dwarf-2
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+EXTRAINCDIRS =
+
+
+# Compiler flag to set the C Standard level.
+# c89   - "ANSI" C
+# gnu89 - c89 plus GCC extensions
+# c99   - ISO C99 standard (not yet fully implemented)
+# gnu99 - c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+# Place -D or -U options here
+CDEFS =
+
+# Place -I options here
+CINCS =
+
+
+# Compiler flags.
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT)
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+CFLAGS += -Wall -Wstrict-prototypes
+CFLAGS += -Wa,-adhlns=$(<:.c=.lst)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+CFLAGS += -DF_OSC=$(F_OSC)
+
+
+
+# Assembler flags.
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs
+ASFLAGS += -DF_OSC=$(F_OSC)
+
+
+#Additional libraries.
+
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+PRINTF_LIB =
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+SCANF_LIB =
+
+MATH_LIB = -lm
+
+# External memory options
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+# Linker flags.
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+
+
+
+
+# Programming support using avrdude. Settings and variables.
+
+# Programming hardware: alf avr910 avrisp bascom bsd
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+#AVRDUDE_PROGRAMMER = stk500
+AVRDUDE_PROGRAMMER = usbasp
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = usb    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude>
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+# ---------------------------------------------------------------------------
+
+# Define directories, if needed.
+DIRAVR = c:/winavr
+DIRAVRBIN = $(DIRAVR)/bin
+DIRAVRUTILS = $(DIRAVR)/utils/bin
+DIRINC = .
+DIRLIB = $(DIRAVR)/avr/lib
+
+
+# Define programs and commands.
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+
+
+
+
+# Define Messages
+# English
+MSG_ERRORS_NONE = Errors: none
+MSG_BEGIN = -------- begin --------
+MSG_END = --------  end  --------
+MSG_SIZE_BEFORE = Size before:
+MSG_SIZE_AFTER = Size after:
+MSG_COFF = Converting to AVR COFF:
+MSG_EXTENDED_COFF = Converting to AVR Extended COFF:
+MSG_FLASH = Creating load file for Flash:
+MSG_EEPROM = Creating load file for EEPROM:
+MSG_EXTENDED_LISTING = Creating Extended Listing:
+MSG_SYMBOL_TABLE = Creating Symbol Table:
+MSG_LINKING = Linking:
+MSG_COMPILING = Compiling:
+MSG_ASSEMBLING = Assembling:
+MSG_CLEANING = Cleaning project:
+
+
+
+
+# Define all object files.
+OBJ = $(SRC:.c=.o) $(ASRC:.S=.o)
+
+# Define all listing files.
+LST = $(ASRC:.S=.lst) $(SRC:.c=.lst)
+
+
+# Compiler flags to generate dependency files.
+### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
+GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS)
+
+
+
+
+
+# Default target.
+#all: begin gccversion sizebefore build sizeafter finished end
+all: begin gccversion build size finished end
+
+build: elf hex eep lss sym
+
+elf: $(TARGET).elf
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss
+sym: $(TARGET).sym
+
+
+
+# Eye candy.
+# AVR Studio 3.x does not check make's exit code but relies on
+# the following magic strings to be generated by the compile job.
+begin:
+	@echo
+	@echo $(MSG_BEGIN)
+
+finished:
+	@echo $(MSG_ERRORS_NONE)
+
+end:
+	@echo $(MSG_END)
+	@echo
+
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+sizebefore:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
+
+sizeafter:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
+
+size:
+	$(SIZE) -C --mcu=$(MCU) $(TARGET).elf
+
+# Display compiler version information.
+gccversion :
+	@$(CC) --version
+
+
+
+# Program the device.
+program: $(TARGET).hex $(TARGET).eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM)
+
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000
+
+
+coff: $(TARGET).elf
+	@echo
+	@echo $(MSG_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	@echo
+	@echo $(MSG_EXTENDED_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+
+# Create final output files (.hex, .eep) from ELF output file.
+%.hex: %.elf
+	@echo
+	@echo $(MSG_FLASH) $@
+	$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+%.eep: %.elf
+	@echo
+	@echo $(MSG_EEPROM) $@
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+%.lss: %.elf
+	@echo
+	@echo $(MSG_EXTENDED_LISTING) $@
+	$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+%.sym: %.elf
+	@echo
+	@echo $(MSG_SYMBOL_TABLE) $@
+	$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+%.elf: $(OBJ)
+	@echo
+	@echo $(MSG_LINKING) $@
+	$(CC) $(ALL_CFLAGS) $(OBJ) --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+%.o : %.c
+	@echo
+	@echo $(MSG_COMPILING) $<
+	$(CC) -c $(ALL_CFLAGS) $< -o $@
+
+
+# Compile: create assembler files from C source files.
+%.s : %.c
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+%.o : %.S
+	@echo
+	@echo $(MSG_ASSEMBLING) $<
+	$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+
+
+# Target: clean project.
+clean: begin clean_list finished end
+
+clean_list :
+	@echo
+	@echo $(MSG_CLEANING)
+	$(REMOVE) $(TARGET).hex
+	$(REMOVE) $(TARGET).eep
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).cof
+	$(REMOVE) $(TARGET).elf
+	$(REMOVE) $(TARGET).map
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).a90
+	$(REMOVE) $(TARGET).sym
+	$(REMOVE) $(TARGET).lnk
+	$(REMOVE) $(TARGET).lss
+	$(REMOVE) $(OBJ)
+	$(REMOVE) $(LST)
+	$(REMOVE) $(SRC:.c=.s)
+	$(REMOVE) $(SRC:.c=.d)
+	$(REMOVE) .dep/*
+
+
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program
+
+
+
diff --git a/trunk/AVRProjects/ATTiny13a-primo_asm/tiny13a_primo.avr b/trunk/AVRProjects/ATTiny13a-primo_asm/tiny13a_primo.avr
new file mode 100644
index 00000000..bf1aad5b
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny13a-primo_asm/tiny13a_primo.avr
@@ -0,0 +1,36 @@
+;* ******************************************************** *
+;   ATtiny 13/45/85 Pin map
+;                           +--\/--+
+;         /Reset ADC0 PB5  -|1°   8|-  Vcc
+;                ADC3 PB3  -|2    7|-  PB2 ADC1 SCK
+;                ADC2 PB4  -|3    6|-  PB1 OC0B MISO AIN1
+;                     GND  -|4    5|-  PB0 OC0A MOSI AIN0
+;                           +------+
+;* ******************************************************** */
+
+; Define processor type on top of the source code
+;
+;.DEVICE ATtiny13A
+.include "tn13def.inc"
+
+; Int-Vector area
+.CSEG
+.ORG $0000
+	rjmp Setup	;Reset
+	reti		;INT0 		- External Int0 Vector
+	reti		;PCINT0 	- Pin Change Interrupt handler
+	reti		;TIM0_OVF	- Timer0 Overflow handler
+	reti		;EE_RDY		- EEPROM Ready Handler
+	reti		;ANA_COMP	- Analog Comparator Handler
+	reti		;TIM0_COMPA	- Timer0 Compare match A Handler
+	reti		;TIM0_COMPB	- Timer0 Compare match B Handler
+	reti		;WDT		- Watchdog Overflow Handler
+	reti		;ADC		- ADC Conversion Handler
+
+.ORG $000A
+Setup:
+	cli			; Disable Interrupts
+	ldi r16, low(RAMEND)
+	out SPL,r16 ; Set Stack Pointer to top of RAM
+Main:
+	rjmp Main	; infinite loop
diff --git a/trunk/AVRProjects/ATTiny13a-primo_asm/tiny13a_primo.hex b/trunk/AVRProjects/ATTiny13a-primo_asm/tiny13a_primo.hex
new file mode 100644
index 00000000..b3e04610
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny13a-primo_asm/tiny13a_primo.hex
@@ -0,0 +1,4 @@
+:020000020000FC
+:1000000009C018951895189518951895189518956C
+:0C00100018951895F8940FE90DBFFFCF6C
+:00000001FF
diff --git a/trunk/AVRProjects/ATTiny13a-primo_asm/tiny13a_primo.lst b/trunk/AVRProjects/ATTiny13a-primo_asm/tiny13a_primo.lst
new file mode 100644
index 00000000..598b93a1
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny13a-primo_asm/tiny13a_primo.lst
@@ -0,0 +1,50 @@
+gavrasm Gerd's AVR assembler version 3.5 (C)2015 by DG4FAC
+----------------------------------------------------------
+Source file: tiny13a_primo.avr
+Hex file:    tiny13a_primo.hex
+Eeprom file: tiny13a_primo.eep
+Compiled:    08.11.2019, 14:49:53
+Pass:        2
+     1: ;* ******************************************************** *
+     2: ;   ATtiny 13/45/85 Pin map
+     3: ;                           +--\/--+
+     4: ;         /Reset ADC0 PB5  -|1°   8|-  Vcc
+     5: ;                ADC3 PB3  -|2    7|-  PB2 ADC1 SCK
+     6: ;                ADC2 PB4  -|3    6|-  PB1 OC0B MISO AIN1
+     7: ;                     GND  -|4    5|-  PB0 OC0A MOSI AIN0
+     8: ;                           +------+
+     9: ;* ******************************************************** */
+    10: 
+    11: ; Define processor type on top of the source code
+    12: ;
+    13: .DEVICE ATtiny13A
+    14: 
+    15: ; Int-Vector area
+    16: .CSEG
+    17: .ORG $0000
+    18: 000000   C009  rjmp Setup	;Reset
+    19: 000001   9518  reti		;INT0 		- External Int0 Vector
+    20: 000002   9518  reti		;PCINT0 	- Pin Change Interrupt handler
+    21: 000003   9518  reti		;TIM0_OVF	- Timer0 Overflow handler
+    22: 000004   9518  reti		;EE_RDY		- EEPROM Ready Handler
+    23: 000005   9518  reti		;ANA_COMP	- Analog Comparator Handler
+    24: 000006   9518  reti		;TIM0_COMPA	- Timer0 Compare match A Handler
+    25: 000007   9518  reti		;TIM0_COMPB	- Timer0 Compare match B Handler
+    26: 000008   9518  reti		;WDT		- Watchdog Overflow Handler
+    27: 000009   9518  reti		;ADC		- ADC Conversion Handler
+    28: 
+    29: .ORG $000A
+    30: Setup:
+    31: 00000A   94F8  cli			; Disable Interrupts
+    32: 00000B   E90F  ldi r16, low(RAMEND)
+    33: 00000C   BF0D  out SPL,r16 ; Set Stack Pointer to top of RAM
+    34: Main:
+    35: 00000D   CFFF  rjmp Main	; infinite loop
+
+Program             :       14 words.
+Constants           :        0 words.
+Total program memory:       14 words.
+Eeprom space        :        0 bytes.
+Data segment        :        0 bytes.
+Compilation completed, no errors.
+Compilation endet 08.11.2019, 14:49:53
diff --git a/trunk/AVRProjects/ATTiny2313-primo_asm/tiny2313a_primo.avr b/trunk/AVRProjects/ATTiny2313-primo_asm/tiny2313a_primo.avr
new file mode 100644
index 00000000..bb0b2055
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-primo_asm/tiny2313a_primo.avr
@@ -0,0 +1,49 @@
+;* ******************************************************** *
+;   ATtiny 2313/4313 Pin map
+;                           +-\/-+
+;              /Reset PA2  1|o   |20  Vcc
+;                 RXD PD0  2|    |19  PB7 SCK
+;                 TXD PD1  3|    |18  PB6 MISO
+;                     PA1  4|    |17  PB5 MOSI
+;					 PA0  5|    |16  PB4 OC1B
+;					 PD2  6|    |15  PB3 OC1A
+;					 PD3  7|    |14  PB2 OC0A
+;					 PD4  8|    |13  PB1 AIN1
+;				OC0B PD5  9|    |12  PB0 AIN0
+;					 GND 10|    |11  PD6
+;					       +----+
+;* ******************************************************** */
+
+; Define processor type on top of the source code
+;
+.DEVICE ATtiny2313A
+
+; Int-Vector area
+.CSEG
+.ORG $0000
+	rjmp Setup	; for all types
+	reti 		; External Int0 Vector, not used
+	reti 		; External Int1 Vector, not used
+	reti 		; Timer Tim1_Capt, not used
+	reti 		; Timer Tim1_CompA, not used
+	reti 		; Timer Tim1_Ovf, not used
+	reti 		; Timer Tim0_Ovf, used
+	reti 		; Usart_RXC, not used
+	reti 		; Usart_dre, not used
+	reti 		; Usart_TXC, not used
+	reti 		; ANA_COMP ; Analog Comparator Handler
+	reti 		; PCINT ; Pin Change Interrupt
+	reti 		; TIMER1_COMPB ; Timer1 Compare B Handler
+	reti 		; TIMER0_COMPA ; Timer0 Compare A Handler
+	reti 		; TIMER0_COMPB ; Timer0 Compare B Handler
+	reti 		; USI_START ; USI Start Handler
+	reti 		; USI_OVERFLOW ; USI Overflow Handler
+	reti 		; EE_READY ; EEPROM Ready Handler
+	reti 		; WDT_OVERFLOW ; Watchdog Overflow Handler
+
+Setup:
+	cli			; Disable Interrupts
+	ldi r16, low(RAMEND)
+	out SPL,r16 ;Set Stack Pointer to top of RAM
+Main:
+	rjmp Main	; infinite loop
diff --git a/trunk/AVRProjects/ATTiny2313-primo_asm/tiny2313a_primo.hex b/trunk/AVRProjects/ATTiny2313-primo_asm/tiny2313a_primo.hex
new file mode 100644
index 00000000..d1c0cb27
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-primo_asm/tiny2313a_primo.hex
@@ -0,0 +1,5 @@
+:020000020000FC
+:1000000012C0189518951895189518951895189563
+:100010001895189518951895189518951895189578
+:0E002000189518951895F8940FED0DBFFFCFA9
+:00000001FF
diff --git a/trunk/AVRProjects/ATTiny2313-primo_asm/tiny2313a_primo.lst b/trunk/AVRProjects/ATTiny2313-primo_asm/tiny2313a_primo.lst
new file mode 100644
index 00000000..46072c54
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-primo_asm/tiny2313a_primo.lst
@@ -0,0 +1,64 @@
+gavrasm Gerd's AVR assembler version 3.5 (C)2015 by DG4FAC
+----------------------------------------------------------
+Source file: tiny2313a_primo.avr
+Hex file:    tiny2313a_primo.hex
+Eeprom file: tiny2313a_primo.eep
+Compiled:    26.07.2016, 11:35:04
+Pass:        2
+     1: ;* ******************************************************** *
+     2: ;   ATtiny 2313/4313 Pin map
+     3: ;                           +-\/-+
+     4: ;              /Reset PA2  1|o   |20  Vcc
+     5: ;                 RXD PD0  2|    |19  PB7 SCK
+     6: ;                 TXD PD1  3|    |18  PB6 MISO
+     7: ;                     PA1  4|    |17  PB5 MOSI
+     8: ;					 PA0  5|    |16  PB4 OC1B
+     9: ;					 PD2  6|    |15  PB3 OC1A
+    10: ;					 PD3  7|    |14  PB2 OC0A
+    11: ;					 PD4  8|    |13  PB1 AIN1
+    12: ;				OC0B PD5  9|    |12  PB0 AIN0
+    13: ;					 GND 10|    |11  PD6
+    14: ;					       +----+
+    15: ;* ******************************************************** */
+    16: 
+    17: ; Define processor type on top of the source code
+    18: ;
+    19: .DEVICE ATtiny2313A
+    20: 
+    21: ; Int-Vector area
+    22: .CSEG
+    23: .ORG $0000
+    24: 000000   C012  rjmp Setup	; for all types
+    25: 000001   9518  reti 		; External Int0 Vector, not used
+    26: 000002   9518  reti 		; External Int1 Vector, not used
+    27: 000003   9518  reti 		; Timer Tim1_Capt, not used
+    28: 000004   9518  reti 		; Timer Tim1_CompA, not used
+    29: 000005   9518  reti 		; Timer Tim1_Ovf, not used
+    30: 000006   9518  reti 		; Timer Tim0_Ovf, used
+    31: 000007   9518  reti 		; Usart_RXC, not used
+    32: 000008   9518  reti 		; Usart_dre, not used
+    33: 000009   9518  reti 		; Usart_TXC, not used
+    34: 00000A   9518  reti 		; ANA_COMP ; Analog Comparator Handler
+    35: 00000B   9518  reti 		; PCINT ; Pin Change Interrupt
+    36: 00000C   9518  reti 		; TIMER1_COMPB ; Timer1 Compare B Handler
+    37: 00000D   9518  reti 		; TIMER0_COMPA ; Timer0 Compare A Handler
+    38: 00000E   9518  reti 		; TIMER0_COMPB ; Timer0 Compare B Handler
+    39: 00000F   9518  reti 		; USI_START ; USI Start Handler
+    40: 000010   9518  reti 		; USI_OVERFLOW ; USI Overflow Handler
+    41: 000011   9518  reti 		; EE_READY ; EEPROM Ready Handler
+    42: 000012   9518  reti 		; WDT_OVERFLOW ; Watchdog Overflow Handler
+    43: 
+    44: Setup:
+    45: 000013   94F8  cli			; Disable Interrupts
+    46: 000014   ED0F  ldi r16, low(RAMEND)
+    47: 000015   BF0D  out SPL,r16 ;Set Stack Pointer to top of RAM
+    48: Main:
+    49: 000016   CFFF  rjmp Main	; infinite loop
+
+Program             :       23 words.
+Constants           :        0 words.
+Total program memory:       23 words.
+Eeprom space        :        0 bytes.
+Data segment        :        0 bytes.
+Compilation completed, no errors.
+Compilation endet 26.07.2016, 11:35:04
diff --git a/trunk/AVRProjects/ATTiny2313-usb/License.txt b/trunk/AVRProjects/ATTiny2313-usb/License.txt
new file mode 100644
index 00000000..818433ec
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/License.txt
@@ -0,0 +1,674 @@
+                    GNU GENERAL PUBLIC LICENSE
+                       Version 3, 29 June 2007
+
+ Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
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+  15. Disclaimer of Warranty.
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+  17. Interpretation of Sections 15 and 16.
+
+  If the disclaimer of warranty and limitation of liability provided
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+copy of the Program in return for a fee.
+
+                     END OF TERMS AND CONDITIONS
+
+            How to Apply These Terms to Your New Programs
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+    This program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
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+
+The hypothetical commands `show w' and `show c' should show the appropriate
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+  You should also get your employer (if you work as a programmer) or school,
+if any, to sign a "copyright disclaimer" for the program, if necessary.
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+<http://www.gnu.org/licenses/>.
+
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+may consider it more useful to permit linking proprietary applications with
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diff --git a/trunk/AVRProjects/ATTiny2313-usb/Makefile b/trunk/AVRProjects/ATTiny2313-usb/Makefile
new file mode 100644
index 00000000..0e25c9ea
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/Makefile
@@ -0,0 +1,51 @@
+# WinAVR cross-compiler toolchain is used here
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+DUDE = avrdude
+
+# If you are not using ATtiny2313 and the USBtiny programmer, 
+# update the lines below to match your configuration
+CFLAGS = -Wall -Os -Iusbdrv -mmcu=attiny2313
+OBJFLAGS = -j .text -j .data -O ihex
+DUDEFLAGS = -p attiny2313 -c usbtiny -v
+
+# Object files for the firmware (usbdrv/oddebug.o not strictly needed I think)
+OBJECTS = usbdrv/usbdrv.o usbdrv/oddebug.o usbdrv/usbdrvasm.o main.o
+
+# Command-line client
+CMDLINE = usbtest.exe
+
+# By default, build the firmware and command-line client, but do not flash
+all: main.hex $(CMDLINE)
+
+# With this, you can flash the firmware by just typing "make flash" on command-line
+flash: main.hex
+	$(DUDE) $(DUDEFLAGS) -U flash:w:$<
+
+# One-liner to compile the command-line client from usbtest.c
+$(CMDLINE): usbtest.c
+	gcc -I ./libusb/include -L ./libusb/lib/gcc -O -Wall usbtest.c -o usbtest.exe -lusb
+
+# Housekeeping if you want it
+clean:
+	$(RM) *.o *.hex *.elf usbdrv/*.o
+
+# From .elf file to .hex
+%.hex: %.elf
+	$(OBJCOPY) $(OBJFLAGS) $< $@
+
+# Main.elf requires additional objects to the firmware, not just main.o
+main.elf: $(OBJECTS)
+	$(CC) $(CFLAGS) $(OBJECTS) -o $@
+
+# Without this dependance, .o files will not be recompiled if you change 
+# the config! I spent a few hours debugging because of this...
+$(OBJECTS): usbdrv/usbconfig.h
+
+# From C source to .o object file
+%.o: %.c	
+	$(CC) $(CFLAGS) -c $< -o $@
+
+# From assembler source to .o object file
+%.o: %.S
+	$(CC) $(CFLAGS) -x assembler-with-cpp -c $< -o $@
diff --git a/trunk/AVRProjects/ATTiny2313-usb/README.txt b/trunk/AVRProjects/ATTiny2313-usb/README.txt
new file mode 100644
index 00000000..21898d4b
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/README.txt
@@ -0,0 +1,13 @@
+This is the source code package for AVR ATtiny USB Tutorial by Joonas Pihlajamaa, published at Code and Life blog, http://codeandlife.com:
+
+http://codeandlife.com/2012/01/22/avr-attiny-usb-tutorial-part-1/
+http://codeandlife.com/2012/01/25/avr-attiny-usb-tutorial-part-2/
+http://codeandlife.com/2012/01/29/avr-attiny-usb-tutorial-part-3/
+http://codeandlife.com/2012/02/04/avr-attiny-usb-tutorial-part-4/
+ 
+
+The subfolders contain parts of libusb-win32 available at http://sourceforge.net/apps/trac/libusb-win32/wiki and V-USB library available at http://www.obdev.at/avrusb/ and their contents are copyrighted by their respective authors. My productions in the root folder are published under GNU GPL v3 (see License.txt).
+
+I hope you have fun with this project!
+
+- Joonas Pihlajamaa
\ No newline at end of file
diff --git a/trunk/AVRProjects/ATTiny2313-usb/driver/USBexample.inf b/trunk/AVRProjects/ATTiny2313-usb/driver/USBexample.inf
new file mode 100644
index 00000000..e2cb6d8f
Binary files /dev/null and b/trunk/AVRProjects/ATTiny2313-usb/driver/USBexample.inf differ
diff --git a/trunk/AVRProjects/ATTiny2313-usb/driver/amd64/libusb0.dll b/trunk/AVRProjects/ATTiny2313-usb/driver/amd64/libusb0.dll
new file mode 100644
index 00000000..f916b089
Binary files /dev/null and b/trunk/AVRProjects/ATTiny2313-usb/driver/amd64/libusb0.dll differ
diff --git a/trunk/AVRProjects/ATTiny2313-usb/driver/amd64/libusb0.sys b/trunk/AVRProjects/ATTiny2313-usb/driver/amd64/libusb0.sys
new file mode 100644
index 00000000..0718dfb7
Binary files /dev/null and b/trunk/AVRProjects/ATTiny2313-usb/driver/amd64/libusb0.sys differ
diff --git a/trunk/AVRProjects/ATTiny2313-usb/driver/ia64/libusb0.dll b/trunk/AVRProjects/ATTiny2313-usb/driver/ia64/libusb0.dll
new file mode 100644
index 00000000..292df278
Binary files /dev/null and b/trunk/AVRProjects/ATTiny2313-usb/driver/ia64/libusb0.dll differ
diff --git a/trunk/AVRProjects/ATTiny2313-usb/driver/ia64/libusb0.sys b/trunk/AVRProjects/ATTiny2313-usb/driver/ia64/libusb0.sys
new file mode 100644
index 00000000..f17914b8
Binary files /dev/null and b/trunk/AVRProjects/ATTiny2313-usb/driver/ia64/libusb0.sys differ
diff --git a/trunk/AVRProjects/ATTiny2313-usb/driver/installer_x64.exe b/trunk/AVRProjects/ATTiny2313-usb/driver/installer_x64.exe
new file mode 100644
index 00000000..c38919ee
Binary files /dev/null and b/trunk/AVRProjects/ATTiny2313-usb/driver/installer_x64.exe differ
diff --git a/trunk/AVRProjects/ATTiny2313-usb/driver/installer_x86.exe b/trunk/AVRProjects/ATTiny2313-usb/driver/installer_x86.exe
new file mode 100644
index 00000000..030ec300
Binary files /dev/null and b/trunk/AVRProjects/ATTiny2313-usb/driver/installer_x86.exe differ
diff --git a/trunk/AVRProjects/ATTiny2313-usb/driver/license/libusb0/installer_license.txt b/trunk/AVRProjects/ATTiny2313-usb/driver/license/libusb0/installer_license.txt
new file mode 100644
index 00000000..6128be63
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/driver/license/libusb0/installer_license.txt
@@ -0,0 +1,851 @@
+Copyright (c) 2002-2004 Stephan Meyer, <ste_meyer@web.de>
+Copyright (c) 2000-2004 Johannes Erdfelt, <johannes@erdfelt.com>
+Copyright (c) 2000-2004 Thomas Sailer, <sailer@ife.ee.ethz.ch>
+Copyright (c) 2010 Travis Robinson, <libusbdotnet@gmail.com>
+
+This software is distributed under the following licenses:
+Driver:      GNU General Public License (GPL)
+Library, Test Files, Installer:    GNU Lesser General Public License (LGPL)
+
+***********************************************************************
+                    GNU GENERAL PUBLIC LICENSE
+                       Version 3, 29 June 2007
+
+ Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
+ Everyone is permitted to copy and distribute verbatim copies
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+
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+                   GNU LESSER GENERAL PUBLIC LICENSE
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+   accompanying uncombined form of the same work.
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+
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+
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+Library.
+
diff --git a/trunk/AVRProjects/ATTiny2313-usb/driver/x86/libusb0.sys b/trunk/AVRProjects/ATTiny2313-usb/driver/x86/libusb0.sys
new file mode 100644
index 00000000..5322e5b9
Binary files /dev/null and b/trunk/AVRProjects/ATTiny2313-usb/driver/x86/libusb0.sys differ
diff --git a/trunk/AVRProjects/ATTiny2313-usb/driver/x86/libusb0_x86.dll b/trunk/AVRProjects/ATTiny2313-usb/driver/x86/libusb0_x86.dll
new file mode 100644
index 00000000..6e475b90
Binary files /dev/null and b/trunk/AVRProjects/ATTiny2313-usb/driver/x86/libusb0_x86.dll differ
diff --git a/trunk/AVRProjects/ATTiny2313-usb/libusb/AUTHORS.txt b/trunk/AVRProjects/ATTiny2313-usb/libusb/AUTHORS.txt
new file mode 100644
index 00000000..6edc318e
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/libusb/AUTHORS.txt
@@ -0,0 +1,16 @@
+
+Library, Test Programs:
+
+Stephan Meyer, <ste_meyer@web.de>
+Johannes Erdfelt, <johannes@erdfelt.com>
+Thomas Sailer, <sailer@ife.ee.ethz.ch>
+
+Drivers, Installer:
+
+Stephan Meyer, <ste_meyer@web.de>
+Travis Robinson, <libusbdotnet@gmail.com>
+
+Testing, Technical support:
+
+Xiaofan Chen, <xiaofanc@gmail.com>
+
diff --git a/trunk/AVRProjects/ATTiny2313-usb/libusb/COPYING_GPL.txt b/trunk/AVRProjects/ATTiny2313-usb/libusb/COPYING_GPL.txt
new file mode 100644
index 00000000..818433ec
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/libusb/COPYING_GPL.txt
@@ -0,0 +1,674 @@
+                    GNU GENERAL PUBLIC LICENSE
+                       Version 3, 29 June 2007
+
+ Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+                            Preamble
+
+  The GNU General Public License is a free, copyleft license for
+software and other kinds of works.
+
+  The licenses for most software and other practical works are designed
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+  Developers that use the GNU GPL protect your rights with two steps:
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+                     END OF TERMS AND CONDITIONS
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+    <program>  Copyright (C) <year>  <name of author>
+    This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+    This is free software, and you are welcome to redistribute it
+    under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License.  Of course, your program's commands
+might be different; for a GUI interface, you would use an "about box".
+
+  You should also get your employer (if you work as a programmer) or school,
+if any, to sign a "copyright disclaimer" for the program, if necessary.
+For more information on this, and how to apply and follow the GNU GPL, see
+<http://www.gnu.org/licenses/>.
+
+  The GNU General Public License does not permit incorporating your program
+into proprietary programs.  If your program is a subroutine library, you
+may consider it more useful to permit linking proprietary applications with
+the library.  If this is what you want to do, use the GNU Lesser General
+Public License instead of this License.  But first, please read
+<http://www.gnu.org/philosophy/why-not-lgpl.html>.
diff --git a/trunk/AVRProjects/ATTiny2313-usb/libusb/COPYING_LGPL.txt b/trunk/AVRProjects/ATTiny2313-usb/libusb/COPYING_LGPL.txt
new file mode 100644
index 00000000..b14ca0a5
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/libusb/COPYING_LGPL.txt
@@ -0,0 +1,165 @@
+                   GNU LESSER GENERAL PUBLIC LICENSE
+                       Version 3, 29 June 2007
+
+ Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+
+  This version of the GNU Lesser General Public License incorporates
+the terms and conditions of version 3 of the GNU General Public
+License, supplemented by the additional permissions listed below.
+
+  0. Additional Definitions.
+
+  As used herein, "this License" refers to version 3 of the GNU Lesser
+General Public License, and the "GNU GPL" refers to version 3 of the GNU
+General Public License.
+
+  "The Library" refers to a covered work governed by this License,
+other than an Application or a Combined Work as defined below.
+
+  An "Application" is any work that makes use of an interface provided
+by the Library, but which is not otherwise based on the Library.
+Defining a subclass of a class defined by the Library is deemed a mode
+of using an interface provided by the Library.
+
+  A "Combined Work" is a work produced by combining or linking an
+Application with the Library.  The particular version of the Library
+with which the Combined Work was made is also called the "Linked
+Version".
+
+  The "Minimal Corresponding Source" for a Combined Work means the
+Corresponding Source for the Combined Work, excluding any source code
+for portions of the Combined Work that, considered in isolation, are
+based on the Application, and not on the Linked Version.
+
+  The "Corresponding Application Code" for a Combined Work means the
+object code and/or source code for the Application, including any data
+and utility programs needed for reproducing the Combined Work from the
+Application, but excluding the System Libraries of the Combined Work.
+
+  1. Exception to Section 3 of the GNU GPL.
+
+  You may convey a covered work under sections 3 and 4 of this License
+without being bound by section 3 of the GNU GPL.
+
+  2. Conveying Modified Versions.
+
+  If you modify a copy of the Library, and, in your modifications, a
+facility refers to a function or data to be supplied by an Application
+that uses the facility (other than as an argument passed when the
+facility is invoked), then you may convey a copy of the modified
+version:
+
+   a) under this License, provided that you make a good faith effort to
+   ensure that, in the event an Application does not supply the
+   function or data, the facility still operates, and performs
+   whatever part of its purpose remains meaningful, or
+
+   b) under the GNU GPL, with none of the additional permissions of
+   this License applicable to that copy.
+
+  3. Object Code Incorporating Material from Library Header Files.
+
+  The object code form of an Application may incorporate material from
+a header file that is part of the Library.  You may convey such object
+code under terms of your choice, provided that, if the incorporated
+material is not limited to numerical parameters, data structure
+layouts and accessors, or small macros, inline functions and templates
+(ten or fewer lines in length), you do both of the following:
+
+   a) Give prominent notice with each copy of the object code that the
+   Library is used in it and that the Library and its use are
+   covered by this License.
+
+   b) Accompany the object code with a copy of the GNU GPL and this license
+   document.
+
+  4. Combined Works.
+
+  You may convey a Combined Work under terms of your choice that,
+taken together, effectively do not restrict modification of the
+portions of the Library contained in the Combined Work and reverse
+engineering for debugging such modifications, if you also do each of
+the following:
+
+   a) Give prominent notice with each copy of the Combined Work that
+   the Library is used in it and that the Library and its use are
+   covered by this License.
+
+   b) Accompany the Combined Work with a copy of the GNU GPL and this license
+   document.
+
+   c) For a Combined Work that displays copyright notices during
+   execution, include the copyright notice for the Library among
+   these notices, as well as a reference directing the user to the
+   copies of the GNU GPL and this license document.
+
+   d) Do one of the following:
+
+       0) Convey the Minimal Corresponding Source under the terms of this
+       License, and the Corresponding Application Code in a form
+       suitable for, and under terms that permit, the user to
+       recombine or relink the Application with a modified version of
+       the Linked Version to produce a modified Combined Work, in the
+       manner specified by section 6 of the GNU GPL for conveying
+       Corresponding Source.
+
+       1) Use a suitable shared library mechanism for linking with the
+       Library.  A suitable mechanism is one that (a) uses at run time
+       a copy of the Library already present on the user's computer
+       system, and (b) will operate properly with a modified version
+       of the Library that is interface-compatible with the Linked
+       Version.
+
+   e) Provide Installation Information, but only if you would otherwise
+   be required to provide such information under section 6 of the
+   GNU GPL, and only to the extent that such information is
+   necessary to install and execute a modified version of the
+   Combined Work produced by recombining or relinking the
+   Application with a modified version of the Linked Version. (If
+   you use option 4d0, the Installation Information must accompany
+   the Minimal Corresponding Source and Corresponding Application
+   Code. If you use option 4d1, you must provide the Installation
+   Information in the manner specified by section 6 of the GNU GPL
+   for conveying Corresponding Source.)
+
+  5. Combined Libraries.
+
+  You may place library facilities that are a work based on the
+Library side by side in a single library together with other library
+facilities that are not Applications and are not covered by this
+License, and convey such a combined library under terms of your
+choice, if you do both of the following:
+
+   a) Accompany the combined library with a copy of the same work based
+   on the Library, uncombined with any other library facilities,
+   conveyed under the terms of this License.
+
+   b) Give prominent notice with the combined library that part of it
+   is a work based on the Library, and explaining where to find the
+   accompanying uncombined form of the same work.
+
+  6. Revised Versions of the GNU Lesser General Public License.
+
+  The Free Software Foundation may publish revised and/or new versions
+of the GNU Lesser General Public License from time to time. Such new
+versions will be similar in spirit to the present version, but may
+differ in detail to address new problems or concerns.
+
+  Each version is given a distinguishing version number. If the
+Library as you received it specifies that a certain numbered version
+of the GNU Lesser General Public License "or any later version"
+applies to it, you have the option of following the terms and
+conditions either of that published version or of any later version
+published by the Free Software Foundation. If the Library as you
+received it does not specify a version number of the GNU Lesser
+General Public License, you may choose any version of the GNU Lesser
+General Public License ever published by the Free Software Foundation.
+
+  If the Library as you received it specifies that a proxy can decide
+whether future versions of the GNU Lesser General Public License shall
+apply, that proxy's public statement of acceptance of any version is
+permanent authorization for you to choose that version for the
+Library.
diff --git a/trunk/AVRProjects/ATTiny2313-usb/libusb/README.txt b/trunk/AVRProjects/ATTiny2313-usb/libusb/README.txt
new file mode 100644
index 00000000..fd0b29e6
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/libusb/README.txt
@@ -0,0 +1,12 @@
+
+This is libusb-win32 (http://libusb-win32.sourceforge.net) version 1.2.6.0. 
+Libusb-win32 is a library that allows userspace application to access USB 
+devices on Windows operation systems (Win2k, WinXP, Vista, Win7). 
+It is derived from and fully API compatible to libusb available at 
+http://libusb.sourceforge.net.
+
+For more information visit the project's web site at:
+
+http://libusb-win32.sourceforge.net
+http://sourceforge.net/projects/libusb-win32
+
diff --git a/trunk/AVRProjects/ATTiny2313-usb/libusb/include/lusb0_usb.h b/trunk/AVRProjects/ATTiny2313-usb/libusb/include/lusb0_usb.h
new file mode 100644
index 00000000..320349bb
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/libusb/include/lusb0_usb.h
@@ -0,0 +1,427 @@
+#ifndef __USB_H__
+#define __USB_H__
+
+#include <stdlib.h>
+#include <windows.h>
+
+/*
+ * 'interface' is defined somewhere in the Windows header files. This macro
+ * is deleted here to avoid conflicts and compile errors.
+ */
+
+#ifdef interface
+#undef interface
+#endif
+
+/*
+ * PATH_MAX from limits.h can't be used on Windows if the dll and
+ * import libraries are build/used by different compilers
+ */
+
+#define LIBUSB_PATH_MAX 512
+
+
+/*
+ * USB spec information
+ *
+ * This is all stuff grabbed from various USB specs and is pretty much
+ * not subject to change
+ */
+
+/*
+ * Device and/or Interface Class codes
+ */
+#define USB_CLASS_PER_INTERFACE		0	/* for DeviceClass */
+#define USB_CLASS_AUDIO			      1
+#define USB_CLASS_COMM			      2
+#define USB_CLASS_HID			        3
+#define USB_CLASS_PRINTER		      7
+#define USB_CLASS_MASS_STORAGE		8
+#define USB_CLASS_HUB			        9
+#define USB_CLASS_DATA			      10
+#define USB_CLASS_VENDOR_SPEC		  0xff
+
+/*
+ * Descriptor types
+ */
+#define USB_DT_DEVICE			0x01
+#define USB_DT_CONFIG			0x02
+#define USB_DT_STRING			0x03
+#define USB_DT_INTERFACE	0x04
+#define USB_DT_ENDPOINT		0x05
+
+#define USB_DT_HID			0x21
+#define USB_DT_REPORT		0x22
+#define USB_DT_PHYSICAL	0x23
+#define USB_DT_HUB			0x29
+
+/*
+ * Descriptor sizes per descriptor type
+ */
+#define USB_DT_DEVICE_SIZE		18
+#define USB_DT_CONFIG_SIZE		9
+#define USB_DT_INTERFACE_SIZE		9
+#define USB_DT_ENDPOINT_SIZE		7
+#define USB_DT_ENDPOINT_AUDIO_SIZE	9	/* Audio extension */
+#define USB_DT_HUB_NONVAR_SIZE		7
+
+
+/* ensure byte-packed structures */
+#include <pshpack1.h>
+
+
+/* All standard descriptors have these 2 fields in common */
+struct usb_descriptor_header
+{
+    unsigned char  bLength;
+    unsigned char  bDescriptorType;
+};
+
+/* String descriptor */
+struct usb_string_descriptor
+{
+    unsigned char  bLength;
+    unsigned char  bDescriptorType;
+    unsigned short wData[1];
+};
+
+/* HID descriptor */
+struct usb_hid_descriptor
+{
+    unsigned char  bLength;
+    unsigned char  bDescriptorType;
+    unsigned short bcdHID;
+    unsigned char  bCountryCode;
+    unsigned char  bNumDescriptors;
+};
+
+/* Endpoint descriptor */
+#define USB_MAXENDPOINTS	32
+struct usb_endpoint_descriptor
+{
+    unsigned char  bLength;
+    unsigned char  bDescriptorType;
+    unsigned char  bEndpointAddress;
+    unsigned char  bmAttributes;
+    unsigned short wMaxPacketSize;
+    unsigned char  bInterval;
+    unsigned char  bRefresh;
+    unsigned char  bSynchAddress;
+
+    unsigned char *extra;	/* Extra descriptors */
+    int extralen;
+};
+
+#define USB_ENDPOINT_ADDRESS_MASK	0x0f    /* in bEndpointAddress */
+#define USB_ENDPOINT_DIR_MASK		  0x80
+
+#define USB_ENDPOINT_TYPE_MASK		0x03    /* in bmAttributes */
+#define USB_ENDPOINT_TYPE_CONTROL	    0
+#define USB_ENDPOINT_TYPE_ISOCHRONOUS	1
+#define USB_ENDPOINT_TYPE_BULK		    2
+#define USB_ENDPOINT_TYPE_INTERRUPT	  3
+
+/* Interface descriptor */
+#define USB_MAXINTERFACES	32
+struct usb_interface_descriptor
+{
+    unsigned char  bLength;
+    unsigned char  bDescriptorType;
+    unsigned char  bInterfaceNumber;
+    unsigned char  bAlternateSetting;
+    unsigned char  bNumEndpoints;
+    unsigned char  bInterfaceClass;
+    unsigned char  bInterfaceSubClass;
+    unsigned char  bInterfaceProtocol;
+    unsigned char  iInterface;
+
+    struct usb_endpoint_descriptor *endpoint;
+
+    unsigned char *extra;	/* Extra descriptors */
+    int extralen;
+};
+
+#define USB_MAXALTSETTING	128	/* Hard limit */
+
+struct usb_interface
+{
+    struct usb_interface_descriptor *altsetting;
+
+    int num_altsetting;
+};
+
+/* Configuration descriptor information.. */
+#define USB_MAXCONFIG		8
+struct usb_config_descriptor
+{
+    unsigned char  bLength;
+    unsigned char  bDescriptorType;
+    unsigned short wTotalLength;
+    unsigned char  bNumInterfaces;
+    unsigned char  bConfigurationValue;
+    unsigned char  iConfiguration;
+    unsigned char  bmAttributes;
+    unsigned char  MaxPower;
+
+    struct usb_interface *interface;
+
+    unsigned char *extra;	/* Extra descriptors */
+    int extralen;
+};
+
+/* Device descriptor */
+struct usb_device_descriptor
+{
+    unsigned char  bLength;
+    unsigned char  bDescriptorType;
+    unsigned short bcdUSB;
+    unsigned char  bDeviceClass;
+    unsigned char  bDeviceSubClass;
+    unsigned char  bDeviceProtocol;
+    unsigned char  bMaxPacketSize0;
+    unsigned short idVendor;
+    unsigned short idProduct;
+    unsigned short bcdDevice;
+    unsigned char  iManufacturer;
+    unsigned char  iProduct;
+    unsigned char  iSerialNumber;
+    unsigned char  bNumConfigurations;
+};
+
+struct usb_ctrl_setup
+{
+    unsigned char  bRequestType;
+    unsigned char  bRequest;
+    unsigned short wValue;
+    unsigned short wIndex;
+    unsigned short wLength;
+};
+
+/*
+ * Standard requests
+ */
+#define USB_REQ_GET_STATUS		    0x00
+#define USB_REQ_CLEAR_FEATURE	    0x01
+/* 0x02 is reserved */
+#define USB_REQ_SET_FEATURE		    0x03
+/* 0x04 is reserved */
+#define USB_REQ_SET_ADDRESS		    0x05
+#define USB_REQ_GET_DESCRIPTOR		0x06
+#define USB_REQ_SET_DESCRIPTOR		0x07
+#define USB_REQ_GET_CONFIGURATION	0x08
+#define USB_REQ_SET_CONFIGURATION	0x09
+#define USB_REQ_GET_INTERFACE		  0x0A
+#define USB_REQ_SET_INTERFACE		  0x0B
+#define USB_REQ_SYNCH_FRAME		    0x0C
+
+#define USB_TYPE_STANDARD		(0x00 << 5)
+#define USB_TYPE_CLASS			(0x01 << 5)
+#define USB_TYPE_VENDOR			(0x02 << 5)
+#define USB_TYPE_RESERVED		(0x03 << 5)
+
+#define USB_RECIP_DEVICE		0x00
+#define USB_RECIP_INTERFACE	0x01
+#define USB_RECIP_ENDPOINT	0x02
+#define USB_RECIP_OTHER			0x03
+
+/*
+ * Various libusb API related stuff
+ */
+
+#define USB_ENDPOINT_IN			0x80
+#define USB_ENDPOINT_OUT		0x00
+
+/* Error codes */
+#define USB_ERROR_BEGIN			500000
+
+/*
+ * This is supposed to look weird. This file is generated from autoconf
+ * and I didn't want to make this too complicated.
+ */
+#define USB_LE16_TO_CPU(x)
+
+/*
+ * Device reset types for usb_reset_ex.
+ * http://msdn.microsoft.com/en-us/library/ff537269%28VS.85%29.aspx
+ * http://msdn.microsoft.com/en-us/library/ff537243%28v=vs.85%29.aspx
+ */
+#define USB_RESET_TYPE_RESET_PORT (1 << 0)
+#define USB_RESET_TYPE_CYCLE_PORT (1 << 1)
+#define USB_RESET_TYPE_FULL_RESET (USB_RESET_TYPE_CYCLE_PORT | USB_RESET_TYPE_RESET_PORT)
+
+
+/* Data types */
+/* struct usb_device; */
+/* struct usb_bus; */
+
+struct usb_device
+{
+    struct usb_device *next, *prev;
+
+    char filename[LIBUSB_PATH_MAX];
+
+    struct usb_bus *bus;
+
+    struct usb_device_descriptor descriptor;
+    struct usb_config_descriptor *config;
+
+    void *dev;		/* Darwin support */
+
+    unsigned char devnum;
+
+    unsigned char num_children;
+    struct usb_device **children;
+};
+
+struct usb_bus
+{
+    struct usb_bus *next, *prev;
+
+    char dirname[LIBUSB_PATH_MAX];
+
+    struct usb_device *devices;
+    unsigned long location;
+
+    struct usb_device *root_dev;
+};
+
+/* Version information, Windows specific */
+struct usb_version
+{
+    struct
+    {
+        int major;
+        int minor;
+        int micro;
+        int nano;
+    } dll;
+    struct
+    {
+        int major;
+        int minor;
+        int micro;
+        int nano;
+    } driver;
+};
+
+
+struct usb_dev_handle;
+typedef struct usb_dev_handle usb_dev_handle;
+
+/* Variables */
+#ifndef __USB_C__
+#define usb_busses usb_get_busses()
+#endif
+
+
+
+#include <poppack.h>
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+    /* Function prototypes */
+
+    /* usb.c */
+    usb_dev_handle *usb_open(struct usb_device *dev);
+    int usb_close(usb_dev_handle *dev);
+    int usb_get_string(usb_dev_handle *dev, int index, int langid, char *buf,
+                       size_t buflen);
+    int usb_get_string_simple(usb_dev_handle *dev, int index, char *buf,
+                              size_t buflen);
+
+    /* descriptors.c */
+    int usb_get_descriptor_by_endpoint(usb_dev_handle *udev, int ep,
+                                       unsigned char type, unsigned char index,
+                                       void *buf, int size);
+    int usb_get_descriptor(usb_dev_handle *udev, unsigned char type,
+                           unsigned char index, void *buf, int size);
+
+    /* <arch>.c */
+    int usb_bulk_write(usb_dev_handle *dev, int ep, char *bytes, int size,
+                       int timeout);
+    int usb_bulk_read(usb_dev_handle *dev, int ep, char *bytes, int size,
+                      int timeout);
+    int usb_interrupt_write(usb_dev_handle *dev, int ep, char *bytes, int size,
+                            int timeout);
+    int usb_interrupt_read(usb_dev_handle *dev, int ep, char *bytes, int size,
+                           int timeout);
+    int usb_control_msg(usb_dev_handle *dev, int requesttype, int request,
+                        int value, int index, char *bytes, int size,
+                        int timeout);
+    int usb_set_configuration(usb_dev_handle *dev, int configuration);
+    int usb_claim_interface(usb_dev_handle *dev, int interface);
+    int usb_release_interface(usb_dev_handle *dev, int interface);
+    int usb_set_altinterface(usb_dev_handle *dev, int alternate);
+    int usb_resetep(usb_dev_handle *dev, unsigned int ep);
+    int usb_clear_halt(usb_dev_handle *dev, unsigned int ep);
+    int usb_reset(usb_dev_handle *dev);
+    int usb_reset_ex(usb_dev_handle *dev, unsigned int reset_type);
+
+    char *usb_strerror(void);
+
+    void usb_init(void);
+    void usb_set_debug(int level);
+    int usb_find_busses(void);
+    int usb_find_devices(void);
+    struct usb_device *usb_device(usb_dev_handle *dev);
+    struct usb_bus *usb_get_busses(void);
+
+
+    /* Windows specific functions */
+
+#define LIBUSB_HAS_INSTALL_SERVICE_NP 1
+    int usb_install_service_np(void);
+    void CALLBACK usb_install_service_np_rundll(HWND wnd, HINSTANCE instance,
+            LPSTR cmd_line, int cmd_show);
+
+#define LIBUSB_HAS_UNINSTALL_SERVICE_NP 1
+    int usb_uninstall_service_np(void);
+    void CALLBACK usb_uninstall_service_np_rundll(HWND wnd, HINSTANCE instance,
+            LPSTR cmd_line, int cmd_show);
+
+#define LIBUSB_HAS_INSTALL_DRIVER_NP 1
+    int usb_install_driver_np(const char *inf_file);
+    void CALLBACK usb_install_driver_np_rundll(HWND wnd, HINSTANCE instance,
+            LPSTR cmd_line, int cmd_show);
+
+#define LIBUSB_HAS_TOUCH_INF_FILE_NP 1
+    int usb_touch_inf_file_np(const char *inf_file);
+    void CALLBACK usb_touch_inf_file_np_rundll(HWND wnd, HINSTANCE instance,
+            LPSTR cmd_line, int cmd_show);
+
+#define LIBUSB_HAS_INSTALL_NEEDS_RESTART_NP 1
+    int usb_install_needs_restart_np(void);
+
+#define LIBUSB_HAS_INSTALL_NP 1
+    int usb_install_npW(HWND hwnd, HINSTANCE instance, LPCWSTR cmd_line, int starg_arg);
+    int usb_install_npA(HWND hwnd, HINSTANCE instance, LPCSTR cmd_line, int starg_arg);
+	#define usb_install_np usb_install_npA
+    void CALLBACK usb_install_np_rundll(HWND wnd, HINSTANCE instance, 
+            LPSTR cmd_line, int cmd_show);
+
+    const struct usb_version *usb_get_version(void);
+
+    int usb_isochronous_setup_async(usb_dev_handle *dev, void **context,
+                                    unsigned char ep, int pktsize);
+    int usb_bulk_setup_async(usb_dev_handle *dev, void **context,
+                             unsigned char ep);
+    int usb_interrupt_setup_async(usb_dev_handle *dev, void **context,
+                                  unsigned char ep);
+
+    int usb_submit_async(void *context, char *bytes, int size);
+    int usb_reap_async(void *context, int timeout);
+    int usb_reap_async_nocancel(void *context, int timeout);
+    int usb_cancel_async(void *context);
+    int usb_free_async(void **context);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USB_H__ */
+
diff --git a/trunk/AVRProjects/ATTiny2313-usb/libusb/include/usb.h b/trunk/AVRProjects/ATTiny2313-usb/libusb/include/usb.h
new file mode 100644
index 00000000..320349bb
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/libusb/include/usb.h
@@ -0,0 +1,427 @@
+#ifndef __USB_H__
+#define __USB_H__
+
+#include <stdlib.h>
+#include <windows.h>
+
+/*
+ * 'interface' is defined somewhere in the Windows header files. This macro
+ * is deleted here to avoid conflicts and compile errors.
+ */
+
+#ifdef interface
+#undef interface
+#endif
+
+/*
+ * PATH_MAX from limits.h can't be used on Windows if the dll and
+ * import libraries are build/used by different compilers
+ */
+
+#define LIBUSB_PATH_MAX 512
+
+
+/*
+ * USB spec information
+ *
+ * This is all stuff grabbed from various USB specs and is pretty much
+ * not subject to change
+ */
+
+/*
+ * Device and/or Interface Class codes
+ */
+#define USB_CLASS_PER_INTERFACE		0	/* for DeviceClass */
+#define USB_CLASS_AUDIO			      1
+#define USB_CLASS_COMM			      2
+#define USB_CLASS_HID			        3
+#define USB_CLASS_PRINTER		      7
+#define USB_CLASS_MASS_STORAGE		8
+#define USB_CLASS_HUB			        9
+#define USB_CLASS_DATA			      10
+#define USB_CLASS_VENDOR_SPEC		  0xff
+
+/*
+ * Descriptor types
+ */
+#define USB_DT_DEVICE			0x01
+#define USB_DT_CONFIG			0x02
+#define USB_DT_STRING			0x03
+#define USB_DT_INTERFACE	0x04
+#define USB_DT_ENDPOINT		0x05
+
+#define USB_DT_HID			0x21
+#define USB_DT_REPORT		0x22
+#define USB_DT_PHYSICAL	0x23
+#define USB_DT_HUB			0x29
+
+/*
+ * Descriptor sizes per descriptor type
+ */
+#define USB_DT_DEVICE_SIZE		18
+#define USB_DT_CONFIG_SIZE		9
+#define USB_DT_INTERFACE_SIZE		9
+#define USB_DT_ENDPOINT_SIZE		7
+#define USB_DT_ENDPOINT_AUDIO_SIZE	9	/* Audio extension */
+#define USB_DT_HUB_NONVAR_SIZE		7
+
+
+/* ensure byte-packed structures */
+#include <pshpack1.h>
+
+
+/* All standard descriptors have these 2 fields in common */
+struct usb_descriptor_header
+{
+    unsigned char  bLength;
+    unsigned char  bDescriptorType;
+};
+
+/* String descriptor */
+struct usb_string_descriptor
+{
+    unsigned char  bLength;
+    unsigned char  bDescriptorType;
+    unsigned short wData[1];
+};
+
+/* HID descriptor */
+struct usb_hid_descriptor
+{
+    unsigned char  bLength;
+    unsigned char  bDescriptorType;
+    unsigned short bcdHID;
+    unsigned char  bCountryCode;
+    unsigned char  bNumDescriptors;
+};
+
+/* Endpoint descriptor */
+#define USB_MAXENDPOINTS	32
+struct usb_endpoint_descriptor
+{
+    unsigned char  bLength;
+    unsigned char  bDescriptorType;
+    unsigned char  bEndpointAddress;
+    unsigned char  bmAttributes;
+    unsigned short wMaxPacketSize;
+    unsigned char  bInterval;
+    unsigned char  bRefresh;
+    unsigned char  bSynchAddress;
+
+    unsigned char *extra;	/* Extra descriptors */
+    int extralen;
+};
+
+#define USB_ENDPOINT_ADDRESS_MASK	0x0f    /* in bEndpointAddress */
+#define USB_ENDPOINT_DIR_MASK		  0x80
+
+#define USB_ENDPOINT_TYPE_MASK		0x03    /* in bmAttributes */
+#define USB_ENDPOINT_TYPE_CONTROL	    0
+#define USB_ENDPOINT_TYPE_ISOCHRONOUS	1
+#define USB_ENDPOINT_TYPE_BULK		    2
+#define USB_ENDPOINT_TYPE_INTERRUPT	  3
+
+/* Interface descriptor */
+#define USB_MAXINTERFACES	32
+struct usb_interface_descriptor
+{
+    unsigned char  bLength;
+    unsigned char  bDescriptorType;
+    unsigned char  bInterfaceNumber;
+    unsigned char  bAlternateSetting;
+    unsigned char  bNumEndpoints;
+    unsigned char  bInterfaceClass;
+    unsigned char  bInterfaceSubClass;
+    unsigned char  bInterfaceProtocol;
+    unsigned char  iInterface;
+
+    struct usb_endpoint_descriptor *endpoint;
+
+    unsigned char *extra;	/* Extra descriptors */
+    int extralen;
+};
+
+#define USB_MAXALTSETTING	128	/* Hard limit */
+
+struct usb_interface
+{
+    struct usb_interface_descriptor *altsetting;
+
+    int num_altsetting;
+};
+
+/* Configuration descriptor information.. */
+#define USB_MAXCONFIG		8
+struct usb_config_descriptor
+{
+    unsigned char  bLength;
+    unsigned char  bDescriptorType;
+    unsigned short wTotalLength;
+    unsigned char  bNumInterfaces;
+    unsigned char  bConfigurationValue;
+    unsigned char  iConfiguration;
+    unsigned char  bmAttributes;
+    unsigned char  MaxPower;
+
+    struct usb_interface *interface;
+
+    unsigned char *extra;	/* Extra descriptors */
+    int extralen;
+};
+
+/* Device descriptor */
+struct usb_device_descriptor
+{
+    unsigned char  bLength;
+    unsigned char  bDescriptorType;
+    unsigned short bcdUSB;
+    unsigned char  bDeviceClass;
+    unsigned char  bDeviceSubClass;
+    unsigned char  bDeviceProtocol;
+    unsigned char  bMaxPacketSize0;
+    unsigned short idVendor;
+    unsigned short idProduct;
+    unsigned short bcdDevice;
+    unsigned char  iManufacturer;
+    unsigned char  iProduct;
+    unsigned char  iSerialNumber;
+    unsigned char  bNumConfigurations;
+};
+
+struct usb_ctrl_setup
+{
+    unsigned char  bRequestType;
+    unsigned char  bRequest;
+    unsigned short wValue;
+    unsigned short wIndex;
+    unsigned short wLength;
+};
+
+/*
+ * Standard requests
+ */
+#define USB_REQ_GET_STATUS		    0x00
+#define USB_REQ_CLEAR_FEATURE	    0x01
+/* 0x02 is reserved */
+#define USB_REQ_SET_FEATURE		    0x03
+/* 0x04 is reserved */
+#define USB_REQ_SET_ADDRESS		    0x05
+#define USB_REQ_GET_DESCRIPTOR		0x06
+#define USB_REQ_SET_DESCRIPTOR		0x07
+#define USB_REQ_GET_CONFIGURATION	0x08
+#define USB_REQ_SET_CONFIGURATION	0x09
+#define USB_REQ_GET_INTERFACE		  0x0A
+#define USB_REQ_SET_INTERFACE		  0x0B
+#define USB_REQ_SYNCH_FRAME		    0x0C
+
+#define USB_TYPE_STANDARD		(0x00 << 5)
+#define USB_TYPE_CLASS			(0x01 << 5)
+#define USB_TYPE_VENDOR			(0x02 << 5)
+#define USB_TYPE_RESERVED		(0x03 << 5)
+
+#define USB_RECIP_DEVICE		0x00
+#define USB_RECIP_INTERFACE	0x01
+#define USB_RECIP_ENDPOINT	0x02
+#define USB_RECIP_OTHER			0x03
+
+/*
+ * Various libusb API related stuff
+ */
+
+#define USB_ENDPOINT_IN			0x80
+#define USB_ENDPOINT_OUT		0x00
+
+/* Error codes */
+#define USB_ERROR_BEGIN			500000
+
+/*
+ * This is supposed to look weird. This file is generated from autoconf
+ * and I didn't want to make this too complicated.
+ */
+#define USB_LE16_TO_CPU(x)
+
+/*
+ * Device reset types for usb_reset_ex.
+ * http://msdn.microsoft.com/en-us/library/ff537269%28VS.85%29.aspx
+ * http://msdn.microsoft.com/en-us/library/ff537243%28v=vs.85%29.aspx
+ */
+#define USB_RESET_TYPE_RESET_PORT (1 << 0)
+#define USB_RESET_TYPE_CYCLE_PORT (1 << 1)
+#define USB_RESET_TYPE_FULL_RESET (USB_RESET_TYPE_CYCLE_PORT | USB_RESET_TYPE_RESET_PORT)
+
+
+/* Data types */
+/* struct usb_device; */
+/* struct usb_bus; */
+
+struct usb_device
+{
+    struct usb_device *next, *prev;
+
+    char filename[LIBUSB_PATH_MAX];
+
+    struct usb_bus *bus;
+
+    struct usb_device_descriptor descriptor;
+    struct usb_config_descriptor *config;
+
+    void *dev;		/* Darwin support */
+
+    unsigned char devnum;
+
+    unsigned char num_children;
+    struct usb_device **children;
+};
+
+struct usb_bus
+{
+    struct usb_bus *next, *prev;
+
+    char dirname[LIBUSB_PATH_MAX];
+
+    struct usb_device *devices;
+    unsigned long location;
+
+    struct usb_device *root_dev;
+};
+
+/* Version information, Windows specific */
+struct usb_version
+{
+    struct
+    {
+        int major;
+        int minor;
+        int micro;
+        int nano;
+    } dll;
+    struct
+    {
+        int major;
+        int minor;
+        int micro;
+        int nano;
+    } driver;
+};
+
+
+struct usb_dev_handle;
+typedef struct usb_dev_handle usb_dev_handle;
+
+/* Variables */
+#ifndef __USB_C__
+#define usb_busses usb_get_busses()
+#endif
+
+
+
+#include <poppack.h>
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+    /* Function prototypes */
+
+    /* usb.c */
+    usb_dev_handle *usb_open(struct usb_device *dev);
+    int usb_close(usb_dev_handle *dev);
+    int usb_get_string(usb_dev_handle *dev, int index, int langid, char *buf,
+                       size_t buflen);
+    int usb_get_string_simple(usb_dev_handle *dev, int index, char *buf,
+                              size_t buflen);
+
+    /* descriptors.c */
+    int usb_get_descriptor_by_endpoint(usb_dev_handle *udev, int ep,
+                                       unsigned char type, unsigned char index,
+                                       void *buf, int size);
+    int usb_get_descriptor(usb_dev_handle *udev, unsigned char type,
+                           unsigned char index, void *buf, int size);
+
+    /* <arch>.c */
+    int usb_bulk_write(usb_dev_handle *dev, int ep, char *bytes, int size,
+                       int timeout);
+    int usb_bulk_read(usb_dev_handle *dev, int ep, char *bytes, int size,
+                      int timeout);
+    int usb_interrupt_write(usb_dev_handle *dev, int ep, char *bytes, int size,
+                            int timeout);
+    int usb_interrupt_read(usb_dev_handle *dev, int ep, char *bytes, int size,
+                           int timeout);
+    int usb_control_msg(usb_dev_handle *dev, int requesttype, int request,
+                        int value, int index, char *bytes, int size,
+                        int timeout);
+    int usb_set_configuration(usb_dev_handle *dev, int configuration);
+    int usb_claim_interface(usb_dev_handle *dev, int interface);
+    int usb_release_interface(usb_dev_handle *dev, int interface);
+    int usb_set_altinterface(usb_dev_handle *dev, int alternate);
+    int usb_resetep(usb_dev_handle *dev, unsigned int ep);
+    int usb_clear_halt(usb_dev_handle *dev, unsigned int ep);
+    int usb_reset(usb_dev_handle *dev);
+    int usb_reset_ex(usb_dev_handle *dev, unsigned int reset_type);
+
+    char *usb_strerror(void);
+
+    void usb_init(void);
+    void usb_set_debug(int level);
+    int usb_find_busses(void);
+    int usb_find_devices(void);
+    struct usb_device *usb_device(usb_dev_handle *dev);
+    struct usb_bus *usb_get_busses(void);
+
+
+    /* Windows specific functions */
+
+#define LIBUSB_HAS_INSTALL_SERVICE_NP 1
+    int usb_install_service_np(void);
+    void CALLBACK usb_install_service_np_rundll(HWND wnd, HINSTANCE instance,
+            LPSTR cmd_line, int cmd_show);
+
+#define LIBUSB_HAS_UNINSTALL_SERVICE_NP 1
+    int usb_uninstall_service_np(void);
+    void CALLBACK usb_uninstall_service_np_rundll(HWND wnd, HINSTANCE instance,
+            LPSTR cmd_line, int cmd_show);
+
+#define LIBUSB_HAS_INSTALL_DRIVER_NP 1
+    int usb_install_driver_np(const char *inf_file);
+    void CALLBACK usb_install_driver_np_rundll(HWND wnd, HINSTANCE instance,
+            LPSTR cmd_line, int cmd_show);
+
+#define LIBUSB_HAS_TOUCH_INF_FILE_NP 1
+    int usb_touch_inf_file_np(const char *inf_file);
+    void CALLBACK usb_touch_inf_file_np_rundll(HWND wnd, HINSTANCE instance,
+            LPSTR cmd_line, int cmd_show);
+
+#define LIBUSB_HAS_INSTALL_NEEDS_RESTART_NP 1
+    int usb_install_needs_restart_np(void);
+
+#define LIBUSB_HAS_INSTALL_NP 1
+    int usb_install_npW(HWND hwnd, HINSTANCE instance, LPCWSTR cmd_line, int starg_arg);
+    int usb_install_npA(HWND hwnd, HINSTANCE instance, LPCSTR cmd_line, int starg_arg);
+	#define usb_install_np usb_install_npA
+    void CALLBACK usb_install_np_rundll(HWND wnd, HINSTANCE instance, 
+            LPSTR cmd_line, int cmd_show);
+
+    const struct usb_version *usb_get_version(void);
+
+    int usb_isochronous_setup_async(usb_dev_handle *dev, void **context,
+                                    unsigned char ep, int pktsize);
+    int usb_bulk_setup_async(usb_dev_handle *dev, void **context,
+                             unsigned char ep);
+    int usb_interrupt_setup_async(usb_dev_handle *dev, void **context,
+                                  unsigned char ep);
+
+    int usb_submit_async(void *context, char *bytes, int size);
+    int usb_reap_async(void *context, int timeout);
+    int usb_reap_async_nocancel(void *context, int timeout);
+    int usb_cancel_async(void *context);
+    int usb_free_async(void **context);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USB_H__ */
+
diff --git a/trunk/AVRProjects/ATTiny2313-usb/libusb/installer_license.txt b/trunk/AVRProjects/ATTiny2313-usb/libusb/installer_license.txt
new file mode 100644
index 00000000..6128be63
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/libusb/installer_license.txt
@@ -0,0 +1,851 @@
+Copyright (c) 2002-2004 Stephan Meyer, <ste_meyer@web.de>
+Copyright (c) 2000-2004 Johannes Erdfelt, <johannes@erdfelt.com>
+Copyright (c) 2000-2004 Thomas Sailer, <sailer@ife.ee.ethz.ch>
+Copyright (c) 2010 Travis Robinson, <libusbdotnet@gmail.com>
+
+This software is distributed under the following licenses:
+Driver:      GNU General Public License (GPL)
+Library, Test Files, Installer:    GNU Lesser General Public License (LGPL)
+
+***********************************************************************
+                    GNU GENERAL PUBLIC LICENSE
+                       Version 3, 29 June 2007
+
+ Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+                            Preamble
+
+  The GNU General Public License is a free, copyleft license for
+software and other kinds of works.
+
+  The licenses for most software and other practical works are designed
+to take away your freedom to share and change the works.  By contrast,
+the GNU General Public License is intended to guarantee your freedom to
+share and change all versions of a program--to make sure it remains free
+software for all its users.  We, the Free Software Foundation, use the
+GNU General Public License for most of our software; it applies also to
+any other work released this way by its authors.  You can apply it to
+your programs, too.
+
+  When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+them if you wish), that you receive source code or can get it if you
+want it, that you can change the software or use pieces of it in new
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+
+  To protect your rights, we need to prevent others from denying you
+these rights or asking you to surrender the rights.  Therefore, you have
+certain responsibilities if you distribute copies of the software, or if
+you modify it: responsibilities to respect the freedom of others.
+
+  For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must pass on to the recipients the same
+freedoms that you received.  You must make sure that they, too, receive
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+
+  Developers that use the GNU GPL protect your rights with two steps:
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+
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diff --git a/trunk/AVRProjects/ATTiny2313-usb/libusb/lib/bcc/libusb.lib b/trunk/AVRProjects/ATTiny2313-usb/libusb/lib/bcc/libusb.lib
new file mode 100644
index 00000000..86c0cede
Binary files /dev/null and b/trunk/AVRProjects/ATTiny2313-usb/libusb/lib/bcc/libusb.lib differ
diff --git a/trunk/AVRProjects/ATTiny2313-usb/libusb/lib/dynamic/libusb_dyn.c b/trunk/AVRProjects/ATTiny2313-usb/libusb/lib/dynamic/libusb_dyn.c
new file mode 100644
index 00000000..f0fac9a2
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/libusb/lib/dynamic/libusb_dyn.c
@@ -0,0 +1,497 @@
+/* LIBUSB-WIN32, Generic Windows USB Library
+ * Copyright (c) 2002-2005 Stephan Meyer <ste_meyer@web.de>
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+
+#include <windows.h>
+#include <errno.h>
+
+#include "usb.h"
+
+#define LIBUSB_DLL_NAME "libusb0.dll"
+
+
+typedef usb_dev_handle * (*usb_open_t)(struct usb_device *dev);
+typedef int (*usb_close_t)(usb_dev_handle *dev);
+typedef int (*usb_get_string_t)(usb_dev_handle *dev, int index, int langid,
+                                char *buf, size_t buflen);
+typedef int (*usb_get_string_simple_t)(usb_dev_handle *dev, int index,
+                                       char *buf, size_t buflen);
+typedef int (*usb_get_descriptor_by_endpoint_t)(usb_dev_handle *udev, int ep,
+        unsigned char type,
+        unsigned char index,
+        void *buf, int size);
+typedef int (*usb_get_descriptor_t)(usb_dev_handle *udev, unsigned char type,
+                                    unsigned char index, void *buf, int size);
+typedef int (*usb_bulk_write_t)(usb_dev_handle *dev, int ep, char *bytes,
+                                int size, int timeout);
+typedef int (*usb_bulk_read_t)(usb_dev_handle *dev, int ep, char *bytes,
+                               int size, int timeout);
+typedef int (*usb_interrupt_write_t)(usb_dev_handle *dev, int ep, char *bytes,
+                                     int size, int timeout);
+typedef int (*usb_interrupt_read_t)(usb_dev_handle *dev, int ep, char *bytes,
+                                    int size, int timeout);
+typedef int (*usb_control_msg_t)(usb_dev_handle *dev, int requesttype,
+                                 int request, int value, int index,
+                                 char *bytes, int size, int timeout);
+typedef int (*usb_set_configuration_t)(usb_dev_handle *dev, int configuration);
+typedef int (*usb_claim_interface_t)(usb_dev_handle *dev, int interface);
+typedef int (*usb_release_interface_t)(usb_dev_handle *dev, int interface);
+typedef int (*usb_set_altinterface_t)(usb_dev_handle *dev, int alternate);
+typedef int (*usb_resetep_t)(usb_dev_handle *dev, unsigned int ep);
+typedef int (*usb_clear_halt_t)(usb_dev_handle *dev, unsigned int ep);
+typedef int (*usb_reset_t)(usb_dev_handle *dev);
+typedef int (*usb_reset_ex_t)(usb_dev_handle *dev, unsigned int reset_type);
+typedef char * (*usb_strerror_t)(void);
+typedef void (*usb_init_t)(void);
+typedef void (*usb_set_debug_t)(int level);
+typedef int (*usb_find_busses_t)(void);
+typedef int (*usb_find_devices_t)(void);
+typedef struct usb_device * (*usb_device_t)(usb_dev_handle *dev);
+typedef struct usb_bus * (*usb_get_busses_t)(void);
+typedef int (*usb_install_service_np_t)(void);
+typedef int (*usb_uninstall_service_np_t)(void);
+typedef int (*usb_install_driver_np_t)(const char *inf_file);
+typedef const struct usb_version * (*usb_get_version_t)(void);
+typedef int (*usb_isochronous_setup_async_t)(usb_dev_handle *dev,
+        void **context,
+        unsigned char ep, int pktsize);
+typedef int (*usb_bulk_setup_async_t)(usb_dev_handle *dev, void **context,
+                                      unsigned char ep);
+typedef int (*usb_interrupt_setup_async_t)(usb_dev_handle *dev, void **context,
+        unsigned char ep);
+typedef int (*usb_submit_async_t)(void *context, char *bytes, int size);
+typedef int (*usb_reap_async_t)(void *context, int timeout);
+typedef int (*usb_free_async_t)(void **context);
+
+
+static usb_open_t _usb_open = NULL;
+static usb_close_t _usb_close = NULL;
+static usb_get_string_t _usb_get_string = NULL;
+static usb_get_string_simple_t _usb_get_string_simple = NULL;
+static usb_get_descriptor_by_endpoint_t _usb_get_descriptor_by_endpoint = NULL;
+static usb_get_descriptor_t _usb_get_descriptor = NULL;
+static usb_bulk_write_t _usb_bulk_write = NULL;
+static usb_bulk_read_t _usb_bulk_read = NULL;
+static usb_interrupt_write_t _usb_interrupt_write = NULL;
+static usb_interrupt_read_t _usb_interrupt_read = NULL;
+static usb_control_msg_t _usb_control_msg = NULL;
+static usb_set_configuration_t _usb_set_configuration = NULL;
+static usb_claim_interface_t _usb_claim_interface = NULL;
+static usb_release_interface_t _usb_release_interface = NULL;
+static usb_set_altinterface_t _usb_set_altinterface = NULL;
+static usb_resetep_t _usb_resetep = NULL;
+static usb_clear_halt_t _usb_clear_halt = NULL;
+static usb_reset_t _usb_reset = NULL;
+static usb_reset_ex_t _usb_reset_ex = NULL;
+static usb_strerror_t _usb_strerror = NULL;
+static usb_init_t _usb_init = NULL;
+static usb_set_debug_t _usb_set_debug = NULL;
+static usb_find_busses_t _usb_find_busses = NULL;
+static usb_find_devices_t _usb_find_devices = NULL;
+static usb_device_t _usb_device = NULL;
+static usb_get_busses_t _usb_get_busses = NULL;
+static usb_install_service_np_t _usb_install_service_np = NULL;
+static usb_uninstall_service_np_t _usb_uninstall_service_np = NULL;
+static usb_install_driver_np_t _usb_install_driver_np = NULL;
+static usb_get_version_t _usb_get_version = NULL;
+static usb_isochronous_setup_async_t _usb_isochronous_setup_async = NULL;
+static usb_bulk_setup_async_t _usb_bulk_setup_async = NULL;
+static usb_interrupt_setup_async_t _usb_interrupt_setup_async = NULL;
+static usb_submit_async_t _usb_submit_async = NULL;
+static usb_reap_async_t _usb_reap_async = NULL;
+static usb_free_async_t _usb_free_async = NULL;
+
+
+
+
+void usb_init(void)
+{
+    HINSTANCE libusb_dll  = LoadLibrary(LIBUSB_DLL_NAME);
+
+    if (!libusb_dll)
+        return;
+
+    _usb_open = (usb_open_t)
+                GetProcAddress(libusb_dll, "usb_open");
+    _usb_close = (usb_close_t)
+                 GetProcAddress(libusb_dll, "usb_close");
+    _usb_get_string = (usb_get_string_t)
+                      GetProcAddress(libusb_dll, "usb_get_string");
+    _usb_get_string_simple = (usb_get_string_simple_t)
+                             GetProcAddress(libusb_dll, "usb_get_string_simple");
+    _usb_get_descriptor_by_endpoint = (usb_get_descriptor_by_endpoint_t)
+                                      GetProcAddress(libusb_dll, "usb_get_descriptor_by_endpoint");
+    _usb_get_descriptor = (usb_get_descriptor_t)
+                          GetProcAddress(libusb_dll, "usb_get_descriptor");
+    _usb_bulk_write = (usb_bulk_write_t)
+                      GetProcAddress(libusb_dll, "usb_bulk_write");
+    _usb_bulk_read = (usb_bulk_read_t)
+                     GetProcAddress(libusb_dll, "usb_bulk_read");
+    _usb_interrupt_write = (usb_interrupt_write_t)
+                           GetProcAddress(libusb_dll, "usb_interrupt_write");
+    _usb_interrupt_read = (usb_interrupt_read_t)
+                          GetProcAddress(libusb_dll, "usb_interrupt_read");
+    _usb_control_msg = (usb_control_msg_t)
+                       GetProcAddress(libusb_dll, "usb_control_msg");
+    _usb_set_configuration = (usb_set_configuration_t)
+                             GetProcAddress(libusb_dll, "usb_set_configuration");
+    _usb_claim_interface = (usb_claim_interface_t)
+                           GetProcAddress(libusb_dll, "usb_claim_interface");
+    _usb_release_interface = (usb_release_interface_t)
+                             GetProcAddress(libusb_dll, "usb_release_interface");
+    _usb_set_altinterface = (usb_set_altinterface_t)
+                            GetProcAddress(libusb_dll, "usb_set_altinterface");
+    _usb_resetep = (usb_resetep_t)
+                   GetProcAddress(libusb_dll, "usb_resetep");
+    _usb_clear_halt = (usb_clear_halt_t)
+                      GetProcAddress(libusb_dll, "usb_clear_halt");
+    _usb_reset = (usb_reset_t)
+                 GetProcAddress(libusb_dll, "usb_reset");
+    _usb_reset_ex = (usb_reset_ex_t)
+                 GetProcAddress(libusb_dll, "usb_reset_ex");
+    _usb_strerror = (usb_strerror_t)
+                    GetProcAddress(libusb_dll, "usb_strerror");
+    _usb_init = (usb_init_t)
+                GetProcAddress(libusb_dll, "usb_init");
+    _usb_set_debug = (usb_set_debug_t)
+                     GetProcAddress(libusb_dll, "usb_set_debug");
+    _usb_find_busses = (usb_find_busses_t)
+                       GetProcAddress(libusb_dll, "usb_find_busses");
+    _usb_find_devices = (usb_find_devices_t)
+                        GetProcAddress(libusb_dll, "usb_find_devices");
+    _usb_device = (usb_device_t)
+                  GetProcAddress(libusb_dll, "usb_device");
+    _usb_get_busses = (usb_get_busses_t)
+                      GetProcAddress(libusb_dll, "usb_get_busses");
+    _usb_install_service_np = (usb_install_service_np_t)
+                              GetProcAddress(libusb_dll, "usb_install_service_np");
+    _usb_uninstall_service_np = (usb_uninstall_service_np_t)
+                                GetProcAddress(libusb_dll, "usb_uninstall_service_np");
+    _usb_install_driver_np = (usb_install_driver_np_t)
+                             GetProcAddress(libusb_dll, "usb_install_driver_np");
+    _usb_get_version = (usb_get_version_t)
+                       GetProcAddress(libusb_dll, "usb_get_version");
+    _usb_isochronous_setup_async = (usb_isochronous_setup_async_t)
+                                   GetProcAddress(libusb_dll, "usb_isochronous_setup_async");
+    _usb_bulk_setup_async = (usb_bulk_setup_async_t)
+                            GetProcAddress(libusb_dll, "usb_bulk_setup_async");
+    _usb_interrupt_setup_async = (usb_interrupt_setup_async_t)
+                                 GetProcAddress(libusb_dll, "usb_interrupt_setup_async");
+    _usb_submit_async = (usb_submit_async_t)
+                        GetProcAddress(libusb_dll, "usb_submit_async");
+    _usb_reap_async = (usb_reap_async_t)
+                      GetProcAddress(libusb_dll, "usb_reap_async");
+    _usb_free_async = (usb_free_async_t)
+                      GetProcAddress(libusb_dll, "usb_free_async");
+
+    if (_usb_init)
+        _usb_init();
+}
+
+usb_dev_handle *usb_open(struct usb_device *dev)
+{
+    if (_usb_open)
+        return _usb_open(dev);
+    else
+        return NULL;
+}
+
+int usb_close(usb_dev_handle *dev)
+{
+    if (_usb_close)
+        return _usb_close(dev);
+    else
+        return -ENOFILE;
+}
+
+int usb_get_string(usb_dev_handle *dev, int index, int langid, char *buf,
+                   size_t buflen)
+{
+    if (_usb_get_string)
+        return _usb_get_string(dev, index, langid, buf, buflen);
+    else
+        return -ENOFILE;
+}
+
+int usb_get_string_simple(usb_dev_handle *dev, int index, char *buf,
+                          size_t buflen)
+{
+    if (_usb_get_string_simple)
+        return _usb_get_string_simple(dev, index, buf, buflen);
+    else
+        return -ENOFILE;
+}
+
+int usb_get_descriptor_by_endpoint(usb_dev_handle *udev, int ep,
+                                   unsigned char type, unsigned char index,
+                                   void *buf, int size)
+{
+    if (_usb_get_descriptor_by_endpoint)
+        return _usb_get_descriptor_by_endpoint(udev, ep, type, index, buf, size);
+    else
+        return -ENOFILE;
+}
+
+int usb_get_descriptor(usb_dev_handle *udev, unsigned char type,
+                       unsigned char index, void *buf, int size)
+{
+    if (_usb_get_descriptor)
+        return _usb_get_descriptor(udev, type, index, buf, size);
+    else
+        return -ENOFILE;
+}
+
+int usb_bulk_write(usb_dev_handle *dev, int ep, char *bytes, int size,
+                   int timeout)
+{
+    if (_usb_bulk_write)
+        return _usb_bulk_write(dev, ep, bytes, size, timeout);
+    else
+        return -ENOFILE;
+}
+
+int usb_bulk_read(usb_dev_handle *dev, int ep, char *bytes, int size,
+                  int timeout)
+{
+    if (_usb_bulk_read)
+        return _usb_bulk_read(dev, ep, bytes, size, timeout);
+    else
+        return -ENOFILE;
+}
+
+int usb_interrupt_write(usb_dev_handle *dev, int ep, char *bytes, int size,
+                        int timeout)
+{
+    if (_usb_interrupt_write)
+        return _usb_interrupt_write(dev, ep, bytes, size, timeout);
+    else
+        return -ENOFILE;
+}
+
+int usb_interrupt_read(usb_dev_handle *dev, int ep, char *bytes, int size,
+                       int timeout)
+{
+    if (_usb_interrupt_read)
+        return _usb_interrupt_read(dev, ep, bytes, size, timeout);
+    else
+        return -ENOFILE;
+}
+
+int usb_control_msg(usb_dev_handle *dev, int requesttype, int request,
+                    int value, int index, char *bytes, int size,
+                    int timeout)
+{
+    if (_usb_control_msg)
+        return _usb_control_msg(dev, requesttype, request, value, index, bytes,
+                                size, timeout);
+    else
+        return -ENOFILE;
+}
+
+int usb_set_configuration(usb_dev_handle *dev, int configuration)
+{
+    if (_usb_set_configuration)
+        return _usb_set_configuration(dev, configuration);
+    else
+        return -ENOFILE;
+}
+
+int usb_claim_interface(usb_dev_handle *dev, int interface)
+{
+    if (_usb_claim_interface)
+        return _usb_claim_interface(dev, interface);
+    else
+        return -ENOFILE;
+}
+
+int usb_release_interface(usb_dev_handle *dev, int interface)
+{
+    if (_usb_release_interface)
+        return _usb_release_interface(dev, interface);
+    else
+        return -ENOFILE;
+}
+
+int usb_set_altinterface(usb_dev_handle *dev, int alternate)
+{
+    if (_usb_set_altinterface)
+        return _usb_set_altinterface(dev, alternate);
+    else
+        return -ENOFILE;
+}
+
+int usb_resetep(usb_dev_handle *dev, unsigned int ep)
+{
+    if (_usb_resetep)
+        return _usb_resetep(dev, ep);
+    else
+        return -ENOFILE;
+}
+
+int usb_clear_halt(usb_dev_handle *dev, unsigned int ep)
+{
+    if (_usb_clear_halt)
+        return _usb_clear_halt(dev, ep);
+    else
+        return -ENOFILE;
+}
+
+int usb_reset(usb_dev_handle *dev)
+{
+    if (_usb_reset)
+        return _usb_reset(dev);
+    else
+        return -ENOFILE;
+}
+
+int usb_reset_ex(usb_dev_handle *dev, unsigned int reset_type)
+{
+    if (_usb_reset_ex)
+        return _usb_reset_ex(dev, reset_type);
+    else
+        return -ENOFILE;
+}
+
+char *usb_strerror(void)
+{
+    if (_usb_strerror)
+        return _usb_strerror();
+    else
+        return NULL;
+}
+
+void usb_set_debug(int level)
+{
+    if (_usb_set_debug)
+        return _usb_set_debug(level);
+}
+
+int usb_find_busses(void)
+{
+    if (_usb_find_busses)
+        return _usb_find_busses();
+    else
+        return -ENOFILE;
+}
+
+int usb_find_devices(void)
+{
+    if (_usb_find_devices)
+        return _usb_find_devices();
+    else
+        return -ENOFILE;
+}
+
+struct usb_device *usb_device(usb_dev_handle *dev)
+{
+    if (_usb_device)
+        return _usb_device(dev);
+    else
+        return NULL;
+}
+
+struct usb_bus *usb_get_busses(void)
+{
+    if (_usb_get_busses)
+        return _usb_get_busses();
+    else
+        return NULL;
+}
+
+int usb_install_service_np(void)
+{
+    if (_usb_install_service_np)
+        return _usb_install_service_np();
+    else
+        return -ENOFILE;
+}
+
+int usb_uninstall_service_np(void)
+{
+    if (_usb_uninstall_service_np)
+        return _usb_uninstall_service_np();
+    else
+        return -ENOFILE;
+}
+
+int usb_install_driver_np(const char *inf_file)
+{
+    if (_usb_install_driver_np)
+        return _usb_install_driver_np(inf_file);
+    else
+        return -ENOFILE;
+}
+
+const struct usb_version *usb_get_version(void)
+{
+    if (_usb_get_version)
+        return _usb_get_version();
+    else
+        return NULL;
+}
+
+int usb_isochronous_setup_async(usb_dev_handle *dev, void **context,
+                                unsigned char ep, int pktsize)
+{
+    if (_usb_isochronous_setup_async)
+        return _usb_isochronous_setup_async(dev, context, ep, pktsize);
+    else
+        return -ENOFILE;
+}
+
+int usb_bulk_setup_async(usb_dev_handle *dev, void **context,
+                         unsigned char ep)
+{
+    if (_usb_bulk_setup_async)
+        return _usb_bulk_setup_async(dev, context, ep);
+    else
+        return -ENOFILE;
+}
+
+int usb_interrupt_setup_async(usb_dev_handle *dev, void **context,
+                              unsigned char ep)
+{
+    if (_usb_interrupt_setup_async)
+        return _usb_interrupt_setup_async(dev, context, ep);
+    else
+        return -ENOFILE;
+}
+
+int usb_submit_async(void *context, char *bytes, int size)
+{
+    if (_usb_submit_async)
+        return _usb_submit_async(context, bytes, size);
+    else
+        return -ENOFILE;
+}
+
+int usb_reap_async(void *context, int timeout)
+{
+    if (_usb_reap_async)
+        return _usb_reap_async(context, timeout);
+    else
+        return -ENOFILE;
+}
+
+int usb_free_async(void **context)
+{
+    if (_usb_free_async)
+        return _usb_free_async(context);
+    else
+        return -ENOFILE;
+}
diff --git a/trunk/AVRProjects/ATTiny2313-usb/libusb/lib/msvc/libusb.lib b/trunk/AVRProjects/ATTiny2313-usb/libusb/lib/msvc/libusb.lib
new file mode 100644
index 00000000..64ac6f79
Binary files /dev/null and b/trunk/AVRProjects/ATTiny2313-usb/libusb/lib/msvc/libusb.lib differ
diff --git a/trunk/AVRProjects/ATTiny2313-usb/libusb/lib/msvc_i64/libusb.lib b/trunk/AVRProjects/ATTiny2313-usb/libusb/lib/msvc_i64/libusb.lib
new file mode 100644
index 00000000..21c73d5e
Binary files /dev/null and b/trunk/AVRProjects/ATTiny2313-usb/libusb/lib/msvc_i64/libusb.lib differ
diff --git a/trunk/AVRProjects/ATTiny2313-usb/libusb/lib/msvc_x64/libusb.lib b/trunk/AVRProjects/ATTiny2313-usb/libusb/lib/msvc_x64/libusb.lib
new file mode 100644
index 00000000..dfdaad05
Binary files /dev/null and b/trunk/AVRProjects/ATTiny2313-usb/libusb/lib/msvc_x64/libusb.lib differ
diff --git a/trunk/AVRProjects/ATTiny2313-usb/libusb/libusb-win32-changelog-1.2.6.0.txt b/trunk/AVRProjects/ATTiny2313-usb/libusb/libusb-win32-changelog-1.2.6.0.txt
new file mode 100644
index 00000000..30b72ae0
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/libusb/libusb-win32-changelog-1.2.6.0.txt
@@ -0,0 +1,239 @@
+LibUsb-Win32 Change Log
+V1.2.6.0 (01/17/2012)
+==============================================
+* Official release.
+
+* Removed ISO maximum transfer size restrictions/transfer spltting.
+
+* Fixed inf-wizard device notification issue.
+
+V1.2.5.0 (07/23/2011)
+==============================================
+* Official release.
+
+V1.2.4.9 (07/13/2011) - SNAPSHOT RELEASE
+==============================================
+* Updated GCC lib file 'libusb.a'
+
+V1.2.4.8 (07/12/2011) - SNAPSHOT RELEASE
+==============================================
+* Added new public api function 'usb_reset_ex'. This is an extended 
+  device reset function which allows developers to specify a port reset, a 
+  port cycle, or both. 
+
+* Added new public defines 'USB_RESET_TYPE_XXX' for 'usb_reset_ex' 
+  function. 
+
+V1.2.4.7 (07/02/2011) - SNAPSHOT RELEASE
+==============================================
+* Sync transfers which specify a zero (0) timeout are now considered to be 
+  INFINITE. 
+
+V1.2.4.6 (05/12/2011) - SNAPSHOT RELEASE
+==============================================
+* Added device interface registration. This provides identical 
+  functionality to the "DeviceInterfaceGUIDs" supported by WinUSB and 
+  libusbK. A device interface guid can be specified in the .inf file. They 
+  can be used to quickly locate a usb device or set of USB devices using 
+  the setup api as well as device notification registration. 
+
+* New IOCTL codes added to for native libusbK/WinUSB compatibility.
+  NOTE: These IOCTLs are currently used only by libusbK.dll.
+  o LIBUSB_IOCTL_QUERY_DEVICE_INFORMATION
+  o LIBUSB_IOCTL_SET_PIPE_POLICY
+  o LIBUSB_IOCTL_GET_PIPE_POLICY
+  o LIBUSB_IOCTL_SET_POWER_POLICY
+  o LIBUSB_IOCTL_GET_POWER_POLICY
+  o LIBUSB_IOCTL_CONTROL_WRITE
+  o LIBUSB_IOCTL_CONTROL_READ
+  o LIBUSB_IOCTL_FLUSH_PIPE
+  o LIBUSBK_IOCTL_CLAIM_INTERFACE
+  o LIBUSBK_IOCTL_RELEASE_INTERFACE
+  o LIBUSBK_IOCTL_RELEASE_ALL_INTERFACES
+  o LIBUSBK_IOCTL_SET_INTERFACE
+  o LIBUSBK_IOCTL_GET_INTERFACE
+
+* Renamed main header file (usb.h) to lusb0_usb.h. This eliminates 
+  conflicts with the main WDK usb include as well as making the 
+  libusb-win32 header more distinguishable from other usb library header 
+  files. 
+
+* Added device descriptor caching and active/first config descriptor 
+  caching. Descriptor caching prevents unnecessary control requests from 
+  interrupting devices that could potentially be in-use. It also makes 
+  libusb0.sys more compliant with usb libraries targeting platform where 
+  descriptor caching is done automatically. (linux/mac)
+  
+* Upgraded to libwdi v1.1.1
+  o Zadig UI improvements
+  o wdi-simple now handles certificate related operations
+  o New NSIS (Nullsoft Scriptable Install System) script sample
+  o improved INNO Setup script sample
+  o libusbK support
+  o autogeneration and self-signing of a .cat file, to prevent further security
+    prompts during driver installation on Vista and later.
+    for more information, see http://libwdi-cps.akeo.ie
+  o disable restore point creation during installation
+  o Visual Studio 2010 support and overall MS file cleanup
+  o use of the Kerberos/e2fsprogs parser in Zadig instead of libconfig
+
+V1.2.4.0 (04/11/2011)
+=======================
+* Removed get configuration request from the core driver 
+  set_configuration function.  This caused problems with
+  some non-compliant usb devices.
+
+* Added device descriptor dump to test applications.
+
+V1.2.3.0 (03/16/2011)
+=======================
+* Fixed bug-id 3117686 reported by Tim Schuerewegen.
+
+* Added LIBUSB_IOCTL_GET_OBJECT_NAME.  This new IOCTL code retrieves object
+  from the driver.  The only valid object name index is 0.  Index 0 is
+  returns the devices plug and play registry key pathname.
+
+* Removed maximum timeout restriction for vendor class requests.
+
+V1.2.2.0 (10/02/2010)
+=======================
+* Added install-filter-win.exe.  A gui installer for device filters.
+
+* Added new libusb0.dll function usb_install_np_rundll().  This function
+  is designed for rundll32.exe and takes the same parameters as
+  install-filter.exe.
+
+* Updated install-filter.exe.  This application has several new features.
+  Type "install-filter --help" for more details.
+
+* Updated libusb-win32-devel-filter package.  This package is once again
+  available for download as a setup.exe.
+
+* Updated libusb-win32 "bin" package format.  inf-wizard.exe has been moved
+  up one directory.
+
+* Updated driver_installer_template.iss example. This is an Inno Setup
+  Script showing how to create your own setup.exe for installing your
+  application and driver.
+
+* Fixed missing byte order marker in inf-wizard.exe .inf files. (libwdi)
+
+* Fixed auto-configuration issue when there is more than one driver in the
+  stack.
+
+* Fixed BSOD when using the filter driver with devices that are auto
+  suspended by other drivers in the stack.
+  
+* Fixed BSOD for devices with endpoints that have '0' for wMaxPacketSize.
+
+* Fixed BSOD when cancelling large transfers on high speed devices.
+
+  
+V1.2.1.0 (07/28/2010)
+=======================
+* Updated bulk.c to include async i/o example code.
+
+* Fixed usb_install_driver_np() issue with inf-wizard generated infs.
+
+* Fixed inf2cat.exe issue with inf-wizard generated infs.
+  
+* Added 'Install Now' feature to inf-wizard. (libwdi)
+
+* Added embedded libusb-win32 binaries to inf-wizard. (libwdi)
+
+* Added libwdi (http://www.libusb.org/wiki/libwdi) to inf-wizard. 
+
+* Added get cached configuration request to usb_open(). This is a new
+  control code that involves no device i/o and allows 
+  usb_set_configuration() to be omitted if the driver has already
+  configured it.
+
+* Fixed set_configuration() failure for devices that do not properly
+  support get_configuration().
+
+V1.2.0.0 (07/07/2010)
+=======================
+* First signed driver release! The libusb-win32 kernel driver (libusb0.sys)
+  can now be used on x64 Windows machines that require signed drivers. 
+
+* Fixed 2128187 reported by Tim Green. usb_get_descriptor() can fail
+  because the given buffer of 8 bytes is too small.
+
+* Fixed 2928293 reported by Tim Green. Sometimes the call to 
+  usb_fetch_and_parse_descriptors() in usb_find_devices() can fail. This 
+  patch moves the LIST_ADD to after a successful read of the device's 
+  configuration descriptors.
+
+* Fixed issue causing libusb-win32 to not act as power policy owner
+  when it should.
+
+* Fixed issue in which on rare occasion, a libusb-win32 filter device could
+  run as a "normal" device.
+  
+* Fixed filter driver issue for device using wudfr.sys.
+
+* Added large transfer splitting to driver (bulk, int, iso). NOTE:
+  The dll continues to break transfers in the same manner it always has.
+
+
+V1.1.14.3 (06/12/2010)
+=======================
+* Remove get_configuration() request from usb_open().  This caused claim
+  interface to fail when used as a filter driver.
+  
+V1.1.14.0 (06/01/2010)
+=======================
+* Updated logging functions and standardized log message display format.
+
+* Updated inf-wizard to use the new directory format for the libusb-win32
+  binaries.
+
+* Updated package directories to reflect the winddk BUILDARCH env variable.
+  (i64 := ia64, x64 := amd64)
+  
+* Added request to get the current configuration in usb_open().
+
+* Fixed 2960644 (reported by farthen) crash on shutdown with x64 based
+  systems while using inf files for each libusb device.
+
+* Added additional log message only included in debug/chk builds.
+  
+* Updated default log levels to highest verbose level for debug builds.
+
+* Added test signing support to the libusb-win32 make.cmd. This allows
+  libusb0.sys and libusb0.dll to be signed with a digital signature.
+  (see make.cmd for mmore details)
+
+* Added MSVC 2008 project files
+
+* Moved version defines to an include file (libusb_version.h)
+  This file is generated from libusb_version_h.in with "make.cmd makever"
+
+* Removed all "dist" commands from cyg/mingw makefile.  Instead use "make.cmd"
+  in the "ddk_make" directory.
+
+* Fixed filter setup not running in 64bit mode
+
+* Fixed 64bit inf-wizard, testlibusb-win builds
+
+* Added set initial config value #1 when the driver is not a filter.
+  optionally, the initial configuration value can be specified in the inf
+  file: HKR,,"InitialConfigValue",0x00010001,<your config value>
+
+* Added support for querying device registry keys 
+ (LIBUSB_IOCTL_GET_CUSTOM_REG_PROPERTY)
+
+* Added support for querying device properties 
+ (LIBUSB_IOCTL_GET_DEVICE_PROPERTY)
+
+* Fixed possible race condition in kernel add_device()
+
+* Updated default ddk build version number to 1.1.14.0 to facilitate
+  Microsoft WHQL submission.
+
+* Added DDK build distribution system.  Official libusb-win32 releases 
+ (after 0.1.12.2) are built using Microsoft's WinDDK.  (see make.cmd)
+
+* Fixed 2658937 (reported by Tim Roberts) The libusb-win32 driver always
+  acts as a power policy owner.
+
diff --git a/trunk/AVRProjects/ATTiny2313-usb/main.c b/trunk/AVRProjects/ATTiny2313-usb/main.c
new file mode 100644
index 00000000..0b76075c
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/main.c
@@ -0,0 +1,93 @@
+/**
+ * Project: AVR ATtiny USB Tutorial at http://codeandlife.com/
+ * Author: Joonas Pihlajamaa, joonas.pihlajamaa@iki.fi
+ * Inspired by V-USB example code by Christian Starkjohann
+ * Copyright: (C) 2012 by Joonas Pihlajamaa
+ * License: GNU GPL v3 (see License.txt)
+ */
+#include <avr/io.h>
+#include <avr/interrupt.h>
+#include <avr/wdt.h>
+
+#include "usbdrv.h"
+
+#define F_CPU 12000000L
+#include <util/delay.h>
+
+#define USB_LED_OFF 0
+#define USB_LED_ON  1
+#define USB_DATA_OUT 2
+#define USB_DATA_WRITE 3
+#define USB_DATA_IN 4
+
+static uchar replyBuf[16] = "Hello, USB!";
+static uchar dataReceived = 0, dataLength = 0; // for USB_DATA_IN
+
+// this gets called when custom control message is received
+USB_PUBLIC uchar usbFunctionSetup(uchar data[8]) {
+	usbRequest_t *rq = (void *)data; // cast data to correct type
+	
+	switch(rq->bRequest) { // custom command is in the bRequest field
+    case USB_LED_ON:
+		PORTB |= 1; // turn LED on
+		return 0;
+	case USB_LED_OFF: 
+		PORTB &= ~1; // turn LED off
+		return 0;
+    case USB_DATA_OUT: // send data to PC
+        usbMsgPtr = replyBuf;
+        return sizeof(replyBuf);
+	case USB_DATA_WRITE: // modify reply buffer
+		replyBuf[7] = rq->wValue.bytes[0];
+		replyBuf[8] = rq->wValue.bytes[1];
+		replyBuf[9] = rq->wIndex.bytes[0];
+		replyBuf[10] = rq->wIndex.bytes[1];
+		return 0;
+    case USB_DATA_IN: // receive data from PC
+		dataLength  = (uchar)rq->wLength.word;
+        dataReceived = 0;
+		
+		if(dataLength  > sizeof(replyBuf)) // limit to buffer size
+			dataLength  = sizeof(replyBuf);
+			
+		return USB_NO_MSG; // usbFunctionWrite will be called now
+    }
+
+    return 0; // should not get here
+}
+
+// This gets called when data is sent from PC to the device
+USB_PUBLIC uchar usbFunctionWrite(uchar *data, uchar len) {
+	uchar i;
+			
+	for(i = 0; dataReceived < dataLength && i < len; i++, dataReceived++)
+		replyBuf[dataReceived] = data[i];
+		
+    return (dataReceived == dataLength); // 1 if we received it all, 0 if not
+}
+
+int main() {
+	uchar i;
+
+	DDRB = 1; // PB0 as output
+	
+    wdt_enable(WDTO_1S); // enable 1s watchdog timer
+
+    usbInit();
+	
+    usbDeviceDisconnect(); // enforce re-enumeration
+    for(i = 0; i<250; i++) { // wait 500 ms
+        wdt_reset(); // keep the watchdog happy
+        _delay_ms(2);
+    }
+    usbDeviceConnect();
+	
+    sei(); // Enable interrupts after re-enumeration
+	
+    while(1) {
+        wdt_reset(); // keep the watchdog happy
+        usbPoll();
+    }
+	
+    return 0;
+}
diff --git a/trunk/AVRProjects/ATTiny2313-usb/main.elf b/trunk/AVRProjects/ATTiny2313-usb/main.elf
new file mode 100644
index 00000000..fe61b998
Binary files /dev/null and b/trunk/AVRProjects/ATTiny2313-usb/main.elf differ
diff --git a/trunk/AVRProjects/ATTiny2313-usb/main.hex b/trunk/AVRProjects/ATTiny2313-usb/main.hex
new file mode 100644
index 00000000..19255a24
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/main.hex
@@ -0,0 +1,103 @@
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diff --git a/trunk/AVRProjects/ATTiny2313-usb/schematic.png b/trunk/AVRProjects/ATTiny2313-usb/schematic.png
new file mode 100644
index 00000000..188acfff
Binary files /dev/null and b/trunk/AVRProjects/ATTiny2313-usb/schematic.png differ
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/Changelog.txt b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/Changelog.txt
new file mode 100644
index 00000000..5fae8f32
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/Changelog.txt
@@ -0,0 +1,318 @@
+This file documents changes in the firmware-only USB driver for atmel's AVR
+microcontrollers. New entries are always appended to the end of the file.
+Scroll down to the bottom to see the most recent changes.
+
+2005-04-01:
+  - Implemented endpoint 1 as interrupt-in endpoint.
+  - Moved all configuration options to usbconfig.h which is not part of the
+    driver.
+  - Changed interface for usbVendorSetup().
+  - Fixed compatibility with ATMega8 device.
+  - Various minor optimizations.
+
+2005-04-11:
+  - Changed interface to application: Use usbFunctionSetup(), usbFunctionRead()
+    and usbFunctionWrite() now. Added configuration options to choose which
+    of these functions to compile in.
+  - Assembler module delivers receive data non-inverted now.
+  - Made register and bit names compatible with more AVR devices.
+
+2005-05-03:
+  - Allow address of usbRxBuf on any memory page as long as the buffer does
+    not cross 256 byte page boundaries.
+  - Better device compatibility: works with Mega88 now.
+  - Code optimization in debugging module.
+  - Documentation updates.
+
+2006-01-02:
+  - Added (free) default Vendor- and Product-IDs bought from voti.nl.
+  - Added USBID-License.txt file which defines the rules for using the free
+    shared VID/PID pair.
+  - Added Readme.txt to the usbdrv directory which clarifies administrative
+    issues.
+
+2006-01-25:
+  - Added "configured state" to become more standards compliant.
+  - Added "HALT" state for interrupt endpoint.
+  - Driver passes the "USB Command Verifier" test from usb.org now.
+  - Made "serial number" a configuration option.
+  - Minor optimizations, we now recommend compiler option "-Os" for best
+    results.
+  - Added a version number to usbdrv.h
+
+2006-02-03:
+  - New configuration variable USB_BUFFER_SECTION for the memory section where
+    the USB rx buffer will go. This defaults to ".bss" if not defined. Since
+    this buffer MUST NOT cross 256 byte pages (not even touch a page at the
+    end), the user may want to pass a linker option similar to
+    "-Wl,--section-start=.mybuffer=0x800060".
+  - Provide structure for usbRequest_t.
+  - New defines for USB constants.
+  - Prepared for HID implementations.
+  - Increased data size limit for interrupt transfers to 8 bytes.
+  - New macro usbInterruptIsReady() to query interrupt buffer state.
+
+2006-02-18:
+  - Ensure that the data token which is sent as an ack to an OUT transfer is
+    always zero sized. This fixes a bug where the host reports an error after
+    sending an out transfer to the device, although all data arrived at the
+    device.
+  - Updated docs in usbdrv.h to reflect changed API in usbFunctionWrite().
+
+* Release 2006-02-20
+
+  - Give a compiler warning when compiling with debugging turned on.
+  - Added Oleg Semyonov's changes for IAR-cc compatibility.
+  - Added new (optional) functions usbDeviceConnect() and usbDeviceDisconnect()
+    (also thanks to Oleg!).
+  - Rearranged tests in usbPoll() to save a couple of instructions in the most
+    likely case that no actions are pending.
+  - We need a delay between the SET ADDRESS request until the new address
+    becomes active. This delay was handled in usbPoll() until now. Since the
+    spec says that the delay must not exceed 2ms, previous versions required
+    aggressive polling during the enumeration phase. We have now moved the
+    handling of the delay into the interrupt routine.
+  - We must not reply with NAK to a SETUP transaction. We can only achieve this
+    by making sure that the rx buffer is empty when SETUP tokens are expected.
+    We therefore don't pass zero sized data packets from the status phase of
+    a transfer to usbPoll(). This change MAY cause troubles if you rely on
+    receiving a less than 8 bytes long packet in usbFunctionWrite() to
+    identify the end of a transfer. usbFunctionWrite() will NEVER be called
+    with a zero length.
+
+* Release 2006-03-14
+
+  - Improved IAR C support: tiny memory model, more devices
+  - Added template usbconfig.h file under the name usbconfig-prototype.h
+
+* Release 2006-03-26
+
+  - Added provision for one more interrupt-in endpoint (endpoint 3).
+  - Added provision for one interrupt-out endpoint (endpoint 1).
+  - Added flowcontrol macros for USB.
+  - Added provision for custom configuration descriptor.
+  - Allow ANY two port bits for D+ and D-.
+  - Merged (optional) receive endpoint number into global usbRxToken variable.
+  - Use USB_CFG_IOPORTNAME instead of USB_CFG_IOPORT. We now construct the
+    variable name from the single port letter instead of computing the address
+    of related ports from the output-port address.
+
+* Release 2006-06-26
+
+  - Updated documentation in usbdrv.h and usbconfig-prototype.h to reflect the
+    new features.
+  - Removed "#warning" directives because IAR does not understand them. Use
+    unused static variables instead to generate a warning.
+  - Do not include <avr/io.h> when compiling with IAR.
+  - Introduced USB_CFG_DESCR_PROPS_* in usbconfig.h to configure how each
+    USB descriptor should be handled. It is now possible to provide descriptor
+    data in Flash, RAM or dynamically at runtime.
+  - STALL is now a status in usbTxLen* instead of a message. We can now conform
+    to the spec and leave the stall status pending until it is cleared.
+  - Made usbTxPacketCnt1 and usbTxPacketCnt3 public. This allows the
+    application code to reset data toggling on interrupt pipes.
+
+* Release 2006-07-18
+
+  - Added an #if !defined __ASSEMBLER__ to the warning in usbdrv.h. This fixes
+    an assembler error.
+  - usbDeviceDisconnect() takes pull-up resistor to high impedance now.
+
+* Release 2007-02-01
+
+  - Merged in some code size improvements from usbtiny (thanks to Dick
+    Streefland for these optimizations!)
+  - Special alignment requirement for usbRxBuf not required any more. Thanks
+    again to Dick Streefland for this hint!
+  - Reverted to "#warning" instead of unused static variables -- new versions
+    of IAR CC should handle this directive.
+  - Changed Open Source license to GNU GPL v2 in order to make linking against
+    other free libraries easier. We no longer require publication of the
+    circuit diagrams, but we STRONGLY encourage it. If you improve the driver
+    itself, PLEASE grant us a royalty free license to your changes for our
+    commercial license.
+
+* Release 2007-03-29
+
+  - New configuration option "USB_PUBLIC" in usbconfig.h.
+  - Set USB version number to 1.10 instead of 1.01.
+  - Code used USB_CFG_DESCR_PROPS_STRING_DEVICE and
+    USB_CFG_DESCR_PROPS_STRING_PRODUCT inconsistently. Changed all occurrences
+    to USB_CFG_DESCR_PROPS_STRING_PRODUCT.
+  - New assembler module for 16.5 MHz RC oscillator clock with PLL in receiver
+    code.
+  - New assembler module for 16 MHz crystal.
+  - usbdrvasm.S contains common code only, clock-specific parts have been moved
+    to usbdrvasm12.S, usbdrvasm16.S and usbdrvasm165.S respectively.
+
+* Release 2007-06-25
+
+  - 16 MHz module: Do SE0 check in stuffed bits as well.
+
+* Release 2007-07-07
+
+  - Define hi8(x) for IAR compiler to limit result to 8 bits. This is necessary
+    for negative values.
+  - Added 15 MHz module contributed by V. Bosch.
+  - Interrupt vector name can now be configured. This is useful if somebody
+    wants to use a different hardware interrupt than INT0.
+
+* Release 2007-08-07
+
+  - Moved handleIn3 routine in usbdrvasm16.S so that relative jump range is
+    not exceeded.
+  - More config options: USB_RX_USER_HOOK(), USB_INITIAL_DATATOKEN,
+    USB_COUNT_SOF
+  - USB_INTR_PENDING can now be a memory address, not just I/O
+
+* Release 2007-09-19
+
+  - Split out common parts of assembler modules into separate include file
+  - Made endpoint numbers configurable so that given interface definitions
+    can be matched. See USB_CFG_EP3_NUMBER in usbconfig-prototype.h.
+  - Store endpoint number for interrupt/bulk-out so that usbFunctionWriteOut()
+    can handle any number of endpoints.
+  - Define usbDeviceConnect() and usbDeviceDisconnect() even if no
+    USB_CFG_PULLUP_IOPORTNAME is defined. Directly set D+ and D- to 0 in this
+    case.
+
+* Release 2007-12-01
+
+  - Optimize usbDeviceConnect() and usbDeviceDisconnect() for less code size
+    when USB_CFG_PULLUP_IOPORTNAME is not defined.
+
+* Release 2007-12-13
+
+  - Renamed all include-only assembler modules from *.S to *.inc so that
+    people don't add them to their project sources.
+  - Distribute leap bits in tx loop more evenly for 16 MHz module.
+  - Use "macro" and "endm" instead of ".macro" and ".endm" for IAR
+  - Avoid compiler warnings for constant expr range by casting some values in
+    USB descriptors.
+
+* Release 2008-01-21
+
+  - Fixed bug in 15 and 16 MHz module where the new address set with
+    SET_ADDRESS was already accepted at the next NAK or ACK we send, not at
+    the next data packet we send. This caused problems when the host polled
+    too fast. Thanks to Alexander Neumann for his help and patience debugging
+    this issue!
+
+* Release 2008-02-05
+
+  - Fixed bug in 16.5 MHz module where a register was used in the interrupt
+    handler before it was pushed. This bug was introduced with version
+    2007-09-19 when common parts were moved to a separate file.
+  - Optimized CRC routine (thanks to Reimar Doeffinger).
+
+* Release 2008-02-16
+
+  - Removed outdated IAR compatibility stuff (code sections).
+  - Added hook macros for USB_RESET_HOOK() and USB_SET_ADDRESS_HOOK().
+  - Added optional routine usbMeasureFrameLength() for calibration of the
+    internal RC oscillator.
+
+* Release 2008-02-28
+
+  - USB_INITIAL_DATATOKEN defaults to USBPID_DATA1 now, which means that we
+    start with sending USBPID_DATA0.
+  - Changed defaults in usbconfig-prototype.h
+  - Added free USB VID/PID pair for MIDI class devices
+  - Restructured AVR-USB as separate package, not part of PowerSwitch any more.
+
+* Release 2008-04-18
+
+  - Restructured usbdrv.c so that it is easier to read and understand.
+  - Better code optimization with gcc 4.
+  - If a second interrupt in endpoint is enabled, also add it to config
+    descriptor.
+  - Added config option for long transfers (above 254 bytes), see
+    USB_CFG_LONG_TRANSFERS in usbconfig.h.
+  - Added 20 MHz module contributed by Jeroen Benschop.
+
+* Release 2008-05-13
+
+  - Fixed bug in libs-host/hiddata.c function usbhidGetReport(): length
+    was not incremented, pointer to length was incremented instead.
+  - Added code to command line tool(s) which claims an interface. This code
+    is disabled by default, but may be necessary on newer Linux kernels.
+  - Added usbconfig.h option "USB_CFG_CHECK_DATA_TOGGLING".
+  - New header "usbportability.h" prepares ports to other development
+    environments.
+  - Long transfers (above 254 bytes) did not work when usbFunctionRead() was
+    used to supply the data. Fixed this bug. [Thanks to Alexander Neumann!]
+  - In hiddata.c (example code for sending/receiving data over HID), use
+    USB_RECIP_DEVICE instead of USB_RECIP_INTERFACE for control transfers so
+    that we need not claim the interface.
+  - in usbPoll() loop 20 times polling for RESET state instead of 10 times.
+    This accounts for the higher clock rates we now support.
+  - Added a module for 12.8 MHz RC oscillator with PLL in receiver loop.
+  - Added hook to SOF code so that oscillator can be tuned to USB frame clock.
+  - Added timeout to waitForJ loop. Helps preventing unexpected hangs.
+  - Added example code for oscillator tuning to libs-device (thanks to
+    Henrik Haftmann for the idea to this routine).
+  - Implemented option USB_CFG_SUPPRESS_INTR_CODE.
+
+* Release 2008-10-22
+
+  - Fixed libs-device/osctune.h: OSCCAL is memory address on ATMega88 and
+    similar, not offset of 0x20 needs to be added.
+  - Allow distribution under GPLv3 for those who have to link against other
+    code distributed under GPLv3.
+
+* Release 2008-11-26
+
+  - Removed libusb-win32 dependency for hid-data example in Makefile.windows.
+    It was never required and confused many people.
+  - Added extern uchar usbRxToken to usbdrv.h.
+  - Integrated a module with CRC checks at 18 MHz by Lukas Schrittwieser.
+
+* Release 2009-03-23
+
+  - Hid-mouse example used settings from hid-data example, fixed that.
+  - Renamed project to V-USB due to a trademark issue with Atmel(r).
+  - Changed CommercialLicense.txt and USBID-License.txt to make the
+    background of USB ID registration clearer.
+
+* Release 2009-04-15
+
+  - Changed CommercialLicense.txt to reflect the new range of PIDs from
+    Jason Kotzin.
+  - Removed USBID-License.txt in favor of USB-IDs-for-free.txt and
+    USB-ID-FAQ.txt
+  - Fixed a bug in the 12.8 MHz module: End Of Packet decection was made in
+    the center between bit 0 and 1 of each byte. This is where the data lines
+    are expected to change and the sampled data may therefore be nonsense.
+    We therefore check EOP ONLY if bits 0 AND 1 have both been read as 0 on D-.
+  - Fixed a bitstuffing problem in the 16 MHz module: If bit 6 was stuffed,
+    the unstuffing code in the receiver routine was 1 cycle too long. If
+    multiple bytes had the unstuffing in bit 6, the error summed up until the
+    receiver was out of sync.
+  - Included option for faster CRC routine.
+    Thanks to Slawomir Fras (BoskiDialer) for this code!
+  - Updated bits in Configuration Descriptor's bmAttributes according to
+    USB 1.1 (in particular bit 7, it is a must-be-set bit now).
+
+* Release 2009-08-22
+
+  - Moved first DBG1() after odDebugInit() in all examples.
+  - Use vector INT0_vect instead of SIG_INTERRUPT0 if defined. This makes
+    V-USB compatible with the new "p" suffix devices (e.g. ATMega328p).
+  - USB_CFG_CLOCK_KHZ setting is now required in usbconfig.h (no default any
+    more).
+  - New option USB_CFG_DRIVER_FLASH_PAGE allows boot loaders on devices with
+    more than 64 kB flash.
+  - Built-in configuration descriptor allows custom definition for second
+    endpoint now.
+
+* Release 2010-07-15
+
+  - Fixed bug in usbDriverSetup() which prevented descriptor sizes above 255
+    bytes.
+  - Avoid a compiler warning for unused parameter in usbHandleResetHook() when
+    compiler option -Wextra is enabled.
+  - Fixed wrong hex value for some IDs in USB-IDs-for-free.txt.
+  - Keep a define for USBATTR_BUSPOWER, although the flag does not exist
+    in USB 1.1 any more. Set it to 0. This is for backward compatibility.
+
+* Release 2012-01-09
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/CommercialLicense.txt b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/CommercialLicense.txt
new file mode 100644
index 00000000..11d07d9d
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/CommercialLicense.txt
@@ -0,0 +1,166 @@
+V-USB Driver Software License Agreement
+Version 2009-08-03
+
+THIS LICENSE AGREEMENT GRANTS YOU CERTAIN RIGHTS IN A SOFTWARE. YOU CAN
+ENTER INTO THIS AGREEMENT AND ACQUIRE THE RIGHTS OUTLINED BELOW BY PAYING
+THE AMOUNT ACCORDING TO SECTION 4 ("PAYMENT") TO OBJECTIVE DEVELOPMENT.
+
+
+1 DEFINITIONS
+
+1.1 "OBJECTIVE DEVELOPMENT" shall mean OBJECTIVE DEVELOPMENT Software GmbH,
+Grosse Schiffgasse 1A/7, 1020 Wien, AUSTRIA.
+
+1.2 "You" shall mean the Licensee.
+
+1.3 "V-USB" shall mean all files included in the package distributed under
+the name "vusb" by OBJECTIVE DEVELOPMENT (http://www.obdev.at/vusb/)
+unless otherwise noted. This includes the firmware-only USB device
+implementation for Atmel AVR microcontrollers, some simple device examples
+and host side software examples and libraries.
+
+
+2 LICENSE GRANTS
+
+2.1 Source Code. OBJECTIVE DEVELOPMENT shall furnish you with the source
+code of V-USB.
+
+2.2 Distribution and Use. OBJECTIVE DEVELOPMENT grants you the
+non-exclusive right to use, copy and distribute V-USB with your hardware
+product(s), restricted by the limitations in section 3 below.
+
+2.3 Modifications. OBJECTIVE DEVELOPMENT grants you the right to modify
+the source code and your copy of V-USB according to your needs.
+
+2.4 USB IDs. OBJECTIVE DEVELOPMENT furnishes you with one or two USB
+Product ID(s), sent to you in e-mail. These Product IDs are reserved
+exclusively for you. OBJECTIVE DEVELOPMENT has obtained USB Product ID
+ranges under the Vendor ID 5824 from Wouter van Ooijen (Van Ooijen
+Technische Informatica, www.voti.nl) and under the Vendor ID 8352 from
+Jason Kotzin (Clay Logic, www.claylogic.com). Both owners of the Vendor IDs
+have obtained these IDs from the USB Implementers Forum, Inc.
+(www.usb.org). OBJECTIVE DEVELOPMENT disclaims all liability which might
+arise from the assignment of USB IDs.
+
+2.5 USB Certification. Although not part of this agreement, we want to make
+it clear that you cannot become USB certified when you use V-USB or a USB
+Product ID assigned by OBJECTIVE DEVELOPMENT. AVR microcontrollers don't
+meet the electrical specifications required by the USB specification and
+the USB Implementers Forum certifies only members who bought a Vendor ID of
+their own.
+
+
+3 LICENSE RESTRICTIONS
+
+3.1 Number of Units. Only one of the following three definitions is
+applicable. Which one is determined by the amount you pay to OBJECTIVE
+DEVELOPMENT, see section 4 ("Payment") below.
+
+Hobby License: You may use V-USB according to section 2 above in no more
+than 5 hardware units. These units must not be sold for profit.
+
+Entry Level License: You may use V-USB according to section 2 above in no
+more than 150 hardware units.
+
+Professional License: You may use V-USB according to section 2 above in
+any number of hardware units, except for large scale production ("unlimited
+fair use"). Quantities below 10,000 units are not considered large scale
+production. If your reach quantities which are obviously large scale
+production, you must pay a license fee of 0.10 EUR per unit for all units
+above 10,000.
+
+3.2 Rental. You may not rent, lease, or lend V-USB or otherwise encumber
+any copy of V-USB, or any of the rights granted herein.
+
+3.3 Transfer. You may not transfer your rights under this Agreement to
+another party without OBJECTIVE DEVELOPMENT's prior written consent. If
+such consent is obtained, you may permanently transfer this License to
+another party. The recipient of such transfer must agree to all terms and
+conditions of this Agreement.
+
+3.4 Reservation of Rights. OBJECTIVE DEVELOPMENT retains all rights not
+expressly granted.
+
+3.5 Non-Exclusive Rights. Your license rights under this Agreement are
+non-exclusive.
+
+3.6 Third Party Rights. This Agreement cannot grant you rights controlled
+by third parties. In particular, you are not allowed to use the USB logo or
+other trademarks owned by the USB Implementers Forum, Inc. without their
+consent. Since such consent depends on USB certification, it should be
+noted that V-USB will not pass certification because it does not
+implement checksum verification and the microcontroller ports do not meet
+the electrical specifications.
+
+
+4 PAYMENT
+
+The payment amount depends on the variation of this agreement (according to
+section 3.1) into which you want to enter. Concrete prices are listed on
+OBJECTIVE DEVELOPMENT's web site, usually at
+http://www.obdev.at/vusb/license.html. You agree to pay the amount listed
+there to OBJECTIVE DEVELOPMENT or OBJECTIVE DEVELOPMENT's payment processor
+or reseller.
+
+
+5 COPYRIGHT AND OWNERSHIP
+
+V-USB is protected by copyright laws and international copyright
+treaties, as well as other intellectual property laws and treaties. V-USB
+is licensed, not sold.
+
+
+6 TERM AND TERMINATION
+
+6.1 Term. This Agreement shall continue indefinitely. However, OBJECTIVE
+DEVELOPMENT may terminate this Agreement and revoke the granted license and
+USB-IDs if you fail to comply with any of its terms and conditions.
+
+6.2 Survival of Terms. All provisions regarding secrecy, confidentiality
+and limitation of liability shall survive termination of this agreement.
+
+
+7 DISCLAIMER OF WARRANTY AND LIABILITY
+
+LIMITED WARRANTY. V-USB IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY
+KIND. TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, OBJECTIVE
+DEVELOPMENT AND ITS SUPPLIERS HEREBY DISCLAIM ALL WARRANTIES, EITHER
+EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND
+NON-INFRINGEMENT, WITH REGARD TO V-USB, AND THE PROVISION OF OR FAILURE
+TO PROVIDE SUPPORT SERVICES. THIS LIMITED WARRANTY GIVES YOU SPECIFIC LEGAL
+RIGHTS. YOU MAY HAVE OTHERS, WHICH VARY FROM STATE/JURISDICTION TO
+STATE/JURISDICTION.
+
+LIMITATION OF LIABILITY. TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW,
+IN NO EVENT SHALL OBJECTIVE DEVELOPMENT OR ITS SUPPLIERS BE LIABLE FOR ANY
+SPECIAL, INCIDENTAL, INDIRECT, OR CONSEQUENTIAL DAMAGES WHATSOEVER
+(INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
+BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR ANY OTHER PECUNIARY
+LOSS) ARISING OUT OF THE USE OF OR INABILITY TO USE V-USB OR THE
+PROVISION OF OR FAILURE TO PROVIDE SUPPORT SERVICES, EVEN IF OBJECTIVE
+DEVELOPMENT HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN ANY
+CASE, OBJECTIVE DEVELOPMENT'S ENTIRE LIABILITY UNDER ANY PROVISION OF THIS
+AGREEMENT SHALL BE LIMITED TO THE AMOUNT ACTUALLY PAID BY YOU FOR V-USB.
+
+
+8 MISCELLANEOUS TERMS
+
+8.1 Marketing. OBJECTIVE DEVELOPMENT has the right to mention for marketing
+purposes that you entered into this agreement.
+
+8.2 Entire Agreement. This document represents the entire agreement between
+OBJECTIVE DEVELOPMENT and you. It may only be modified in writing signed by
+an authorized representative of both, OBJECTIVE DEVELOPMENT and you.
+
+8.3 Severability. In case a provision of these terms and conditions should
+be or become partly or entirely invalid, ineffective, or not executable,
+the validity of all other provisions shall not be affected.
+
+8.4 Applicable Law. This agreement is governed by the laws of the Republic
+of Austria.
+
+8.5 Responsible Courts. The responsible courts in Vienna/Austria will have
+exclusive jurisdiction regarding all disputes in connection with this
+agreement.
+
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/License.txt b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/License.txt
new file mode 100644
index 00000000..4460cfba
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/License.txt
@@ -0,0 +1,361 @@
+OBJECTIVE DEVELOPMENT GmbH's V-USB driver software is distributed under the
+terms and conditions of the GNU GPL version 2 or the GNU GPL version 3. It is
+your choice whether you apply the terms of version 2 or version 3. The full
+text of GPLv2 is included below. In addition to the requirements in the GPL,
+we STRONGLY ENCOURAGE you to do the following:
+
+(1) Publish your entire project on a web site and drop us a note with the URL.
+Use the form at http://www.obdev.at/vusb/feedback.html for your submission.
+
+(2) Adhere to minimum publication standards. Please include AT LEAST:
+    - a circuit diagram in PDF, PNG or GIF format
+    - full source code for the host software
+    - a Readme.txt file in ASCII format which describes the purpose of the
+      project and what can be found in which directories and which files
+    - a reference to http://www.obdev.at/vusb/
+
+(3) If you improve the driver firmware itself, please give us a free license
+to your modifications for our commercial license offerings.
+
+
+
+                    GNU GENERAL PUBLIC LICENSE
+                       Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+                       59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+                            Preamble
+
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+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this.  Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+
+                            NO WARRANTY
+
+  11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE RISK AS
+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+
+  12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+                     END OF TERMS AND CONDITIONS
+
+            How to Apply These Terms to Your New Programs
+
+  If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+  To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+    <one line to give the program's name and a brief idea of what it does.>
+    Copyright (C) <year>  <name of author>
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+    Gnomovision version 69, Copyright (C) year name of author
+    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+    This is free software, and you are welcome to redistribute it
+    under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License.  Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  Here is a sample; alter the names:
+
+  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+  `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+  <signature of Ty Coon>, 1 April 1989
+  Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs.  If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library.  If this is what you want to do, use the GNU Library General
+Public License instead of this License.
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/Readme.txt b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/Readme.txt
new file mode 100644
index 00000000..970dc66b
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/Readme.txt
@@ -0,0 +1,172 @@
+This is the Readme file to Objective Development's firmware-only USB driver
+for Atmel AVR microcontrollers. For more information please visit
+http://www.obdev.at/vusb/
+
+This directory contains the USB firmware only. Copy it as-is to your own
+project and add all .c and .S files to your project (these files are marked
+with an asterisk in the list below). Then copy usbconfig-prototype.h as
+usbconfig.h to your project and edit it according to your configuration.
+
+
+TECHNICAL DOCUMENTATION
+=======================
+The technical documentation (API) for the firmware driver is contained in the
+file "usbdrv.h". Please read all of it carefully! Configuration options are
+documented in "usbconfig-prototype.h".
+
+The driver consists of the following files:
+  Readme.txt ............. The file you are currently reading.
+  Changelog.txt .......... Release notes for all versions of the driver.
+  usbdrv.h ............... Driver interface definitions and technical docs.
+* usbdrv.c ............... High level language part of the driver. Link this
+                           module to your code!
+* usbdrvasm.S ............ Assembler part of the driver. This module is mostly
+                           a stub and includes one of the usbdrvasm*.S files
+                           depending on processor clock. Link this module to
+                           your code!
+  usbdrvasm*.inc ......... Assembler routines for particular clock frequencies.
+                           Included by usbdrvasm.S, don't link it directly!
+  asmcommon.inc .......... Common assembler routines. Included by
+                           usbdrvasm*.inc, don't link it directly!
+  usbconfig-prototype.h .. Prototype for your own usbdrv.h file.
+* oddebug.c .............. Debug functions. Only used when DEBUG_LEVEL is
+                           defined to a value greater than 0. Link this module
+                           to your code!
+  oddebug.h .............. Interface definitions of the debug module.
+  usbportability.h ....... Header with compiler-dependent stuff.
+  usbdrvasm.asm .......... Compatibility stub for IAR-C-compiler. Use this
+                           module instead of usbdrvasm.S when you assembler
+                           with IAR's tools.
+  License.txt ............ Open Source license for this driver.
+  CommercialLicense.txt .. Optional commercial license for this driver.
+  USB-ID-FAQ.txt ......... General infos about USB Product- and Vendor-IDs.
+  USB-IDs-for-free.txt ... List and terms of use for free shared PIDs.
+
+(*) ... These files should be linked to your project.
+
+
+CPU CORE CLOCK FREQUENCY
+========================
+We supply assembler modules for clock frequencies of 12 MHz, 12.8 MHz, 15 MHz,
+16 MHz, 16.5 MHz 18 MHz and 20 MHz. Other clock rates are not supported. The
+actual clock rate must be configured in usbconfig.h.
+
+12 MHz Clock
+This is the traditional clock rate of V-USB because it's the lowest clock
+rate where the timing constraints of the USB spec can be met.
+
+15 MHz Clock
+Similar to 12 MHz, but some NOPs inserted. On the other hand, the higher clock
+rate allows for some loops which make the resulting code size somewhat smaller
+than the 12 MHz version.
+
+16 MHz Clock
+This clock rate has been added for users of the Arduino board and other
+ready-made boards which come with a fixed 16 MHz crystal. It's also an option
+if you need the slightly higher clock rate for performance reasons. Since
+16 MHz is not divisible by the USB low speed bit clock of 1.5 MHz, the code
+is somewhat tricky and has to insert a leap cycle every third byte.
+
+12.8 MHz and 16.5 MHz Clock
+The assembler modules for these clock rates differ from the other modules
+because they have been built for an RC oscillator with only 1% precision. The
+receiver code inserts leap cycles to compensate for clock deviations. 1% is
+also the precision which can be achieved by calibrating the internal RC
+oscillator of the AVR. Please note that only AVRs with internal 64 MHz PLL
+oscillator can reach 16.5 MHz with the RC oscillator. This includes the very
+popular ATTiny25, ATTiny45, ATTiny85 series as well as the ATTiny26. Almost
+all AVRs can reach 12.8 MHz, although this is outside the specified range.
+
+See the EasyLogger example at http://www.obdev.at/vusb/easylogger.html for
+code which calibrates the RC oscillator based on the USB frame clock.
+
+18 MHz Clock
+This module is closer to the USB specification because it performs an on the
+fly CRC check for incoming packets. Packets with invalid checksum are
+discarded as required by the spec. If you also implement checks for data
+PID toggling on application level (see option USB_CFG_CHECK_DATA_TOGGLING
+in usbconfig.h for more info), this ensures data integrity. Due to the CRC
+tables and alignment requirements, this code is bigger than modules for other
+clock rates. To activate this module, you must define USB_CFG_CHECK_CRC to 1
+and USB_CFG_CLOCK_KHZ to 18000 in usbconfig.h.
+
+20 MHz Clock
+This module is for people who won't do it with less than the maximum. Since
+20 MHz is not divisible by the USB low speed bit clock of 1.5 MHz, the code
+uses similar tricks as the 16 MHz module to insert leap cycles.
+
+
+USB IDENTIFIERS
+===============
+Every USB device needs a vendor- and a product-identifier (VID and PID). VIDs
+are obtained from usb.org for a price of 1,500 USD. Once you have a VID, you
+can assign PIDs at will.
+
+Since an entry level cost of 1,500 USD is too high for most small companies
+and hobbyists, we provide some VID/PID pairs for free. See the file
+USB-IDs-for-free.txt for details.
+
+Objective Development also has some license offerings which include product
+IDs. See http://www.obdev.at/vusb/ for details.
+
+
+DEVELOPMENT SYSTEM
+==================
+This driver has been developed and optimized for the GNU compiler version 3
+and 4. We recommend that you use the GNU compiler suite because it is freely
+available. V-USB has also been ported to the IAR compiler and assembler. It
+has been tested with IAR 4.10B/W32 and 4.12A/W32 on an ATmega8 with the
+"small" and "tiny" memory model. Not every release is tested with IAR CC and
+the driver may therefore fail to compile with IAR. Please note that gcc is
+more efficient for usbdrv.c because this module has been deliberately
+optimized for gcc.
+
+Gcc version 3 produces smaller code than version 4 due to new optimizing
+capabilities which don't always improve things on 8 bit CPUs. The code size
+generated by gcc 4 can be reduced with the compiler options
+-fno-move-loop-invariants, -fno-tree-scev-cprop and
+-fno-inline-small-functions in addition to -Os. On devices with more than
+8k of flash memory, we also recommend the linker option --relax (written as
+-Wl,--relax for gcc) to convert absolute calls into relative where possible.
+
+For more information about optimizing options see:
+
+    http://www.tty1.net/blog/2008-04-29-avr-gcc-optimisations_en.html
+
+These optimizations are good for gcc 4.x. Version 3.x of gcc does not support
+most of these options and produces good code anyway.
+
+
+USING V-USB FOR FREE
+====================
+The AVR firmware driver is published under the GNU General Public License
+Version 2 (GPL2) and the GNU General Public License Version 3 (GPL3). It is
+your choice whether you apply the terms of version 2 or version 3.
+
+If you decide for the free GPL2 or GPL3, we STRONGLY ENCOURAGE you to do the
+following things IN ADDITION to the obligations from the GPL:
+
+(1) Publish your entire project on a web site and drop us a note with the URL.
+Use the form at http://www.obdev.at/vusb/feedback.html for your submission.
+If you don't have a web site, you can publish the project in obdev's
+documentation wiki at
+http://www.obdev.at/goto.php?t=vusb-wiki&p=hosted-projects.
+
+(2) Adhere to minimum publication standards. Please include AT LEAST:
+    - a circuit diagram in PDF, PNG or GIF format
+    - full source code for the host software
+    - a Readme.txt file in ASCII format which describes the purpose of the
+      project and what can be found in which directories and which files
+    - a reference to http://www.obdev.at/vusb/
+
+(3) If you improve the driver firmware itself, please give us a free license
+to your modifications for our commercial license offerings.
+
+
+COMMERCIAL LICENSES FOR V-USB
+=============================
+If you don't want to publish your source code under the terms of the GPL,
+you can simply pay money for V-USB. As an additional benefit you get
+USB PIDs for free, reserved exclusively to you. See the file
+"CommercialLicense.txt" for details.
+
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/USB-ID-FAQ.txt b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/USB-ID-FAQ.txt
new file mode 100644
index 00000000..d1de8fb6
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/USB-ID-FAQ.txt
@@ -0,0 +1,149 @@
+Version 2009-08-22
+
+==========================
+WHY DO WE NEED THESE IDs?
+==========================
+
+USB is more than a low level protocol for data transport. It also defines a
+common set of requests which must be understood by all devices. And as part
+of these common requests, the specification defines data structures, the
+USB Descriptors, which are used to describe the properties of the device.
+
+From the perspective of an operating system, it is therefore possible to find
+out basic properties of a device (such as e.g. the manufacturer and the name
+of the device) without a device-specific driver. This is essential because
+the operating system can choose a driver to load based on this information
+(Plug-And-Play).
+
+Among the most important properties in the Device Descriptor are the USB
+Vendor- and Product-ID. Both are 16 bit integers. The most simple form of
+driver matching is based on these IDs. The driver announces the Vendor- and
+Product-IDs of the devices it can handle and the operating system loads the
+appropriate driver when the device is connected.
+
+It is obvious that this technique only works if the pair Vendor- plus
+Product-ID is unique: Only devices which require the same driver can have the
+same pair of IDs.
+
+
+=====================================================
+HOW DOES THE USB STANDARD ENSURE THAT IDs ARE UNIQUE?
+=====================================================
+
+Since it is so important that USB IDs are unique, the USB Implementers Forum,
+Inc. (usb.org) needs a way to enforce this legally. It is not forbidden by
+law to build a device and assign it any random numbers as IDs. Usb.org
+therefore needs an agreement to regulate the use of USB IDs. The agreement
+binds only parties who agreed to it, of course. Everybody else is free to use
+any numbers for their IDs.
+
+So how can usb.org ensure that every manufacturer of USB devices enters into
+an agreement with them? They do it via trademark licensing. Usb.org has
+registered the trademark "USB", all associated logos and related terms. If
+you want to put an USB logo on your product or claim that it is USB
+compliant, you must license these trademarks from usb.org. And this is where
+you enter into an agreement. See the "USB-IF Trademark License Agreement and
+Usage Guidelines for the USB-IF Logo" at
+http://www.usb.org/developers/logo_license/.
+
+Licensing the USB trademarks requires that you buy a USB Vendor-ID from
+usb.org (one-time fee of ca. 2,000 USD), that you become a member of usb.org
+(yearly fee of ca. 4,000 USD) and that you meet all the technical
+specifications from the USB spec.
+
+This means that most hobbyists and small companies will never be able to
+become USB compliant, just because membership is so expensive. And you can't
+be compliant with a driver based on V-USB anyway, because the AVR's port pins
+don't meet the electrical specifications for USB. So, in principle, all
+hobbyists and small companies are free to choose any random numbers for their
+IDs. They have nothing to lose...
+
+There is one exception worth noting, though: If you use a sub-component which
+implements USB, the vendor of the sub-components may guarantee USB
+compliance. This might apply to some or all of FTDI's solutions.
+
+
+=======================================================================
+WHY SHOULD YOU OBTAIN USB IDs EVEN IF YOU DON'T LICENSE USB TRADEMARKS?
+=======================================================================
+
+You have learned in the previous section that you are free to choose any
+numbers for your IDs anyway. So why not do exactly this? There is still the
+technical issue. If you choose IDs which are already in use by somebody else,
+operating systems will load the wrong drivers and your device won't work.
+Even if you choose IDs which are not currently in use, they may be in use in
+the next version of the operating system or even after an automatic update.
+
+So what you need is a pair of Vendor- and Product-IDs for which you have the
+guarantee that no USB compliant product uses them. This implies that no
+operating system will ever ship with drivers responsible for these IDs.
+
+
+==============================================
+HOW DOES OBJECTIVE DEVELOPMENT HANDLE USB IDs?
+==============================================
+
+Objective Development gives away pairs of USB-IDs with their V-USB licenses.
+In order to ensure that these IDs are unique, Objective Development has an
+agreement with the company/person who has bought the USB Vendor-ID from
+usb.org. This agreement ensures that a range of USB Product-IDs is reserved
+for assignment by Objective Development and that the owner of the Vendor-ID
+won't give it to anybody else.
+
+This means that you have to trust three parties to ensure uniqueness of
+your IDs:
+
+  - Objective Development, that they don't give the same PID to more than
+    one person.
+  - The owner of the Vendor-ID that they don't assign PIDs from the range
+    assigned to Objective Development to anybody else.
+  - Usb.org that they don't assign the same Vendor-ID a second time.
+
+
+==================================
+WHO IS THE OWNER OF THE VENDOR-ID?
+==================================
+
+Objective Development has obtained ranges of USB Product-IDs under two
+Vendor-IDs: Under Vendor-ID 5824 from Wouter van Ooijen (Van Ooijen
+Technische Informatica, www.voti.nl) and under Vendor-ID 8352 from Jason
+Kotzin (Clay Logic, www.claylogic.com). Both VID owners have received their
+Vendor-ID directly from usb.org.
+
+
+=========================================================================
+CAN I USE USB-IDs FROM OBJECTIVE DEVELOPMENT WITH OTHER DRIVERS/HARDWARE?
+=========================================================================
+
+The short answer is: Yes. All you get is a guarantee that the IDs are never
+assigned to anybody else. What more do you need?
+
+
+============================
+WHAT ABOUT SHARED ID PAIRS?
+============================
+
+Objective Development has reserved some PID/VID pairs for shared use. You
+have no guarantee of uniqueness for them, except that no USB compliant device
+uses them. In order to avoid technical problems, we must ensure that all
+devices with the same pair of IDs use the same driver on kernel level. For
+details, see the file USB-IDs-for-free.txt.
+
+
+======================================================
+I HAVE HEARD THAT SUB-LICENSING OF USB-IDs IS ILLEGAL?
+======================================================
+
+A 16 bit integer number cannot be protected by copyright laws. It is not
+sufficiently complex. And since none of the parties involved entered into the
+USB-IF Trademark License Agreement, we are not bound by this agreement. So
+there is no reason why it should be illegal to sub-license USB-IDs.
+
+
+=============================================
+WHO IS LIABLE IF THERE ARE INCOMPATIBILITIES?
+=============================================
+
+Objective Development disclaims all liabilities which might arise from the
+assignment of IDs. If you guarantee product features to your customers
+without proper disclaimer, YOU are liable for that.
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/USB-IDs-for-free.txt b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/USB-IDs-for-free.txt
new file mode 100644
index 00000000..d46517d8
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/USB-IDs-for-free.txt
@@ -0,0 +1,154 @@
+Version 2009-08-22
+
+===========================
+FREE USB-IDs FOR SHARED USE
+===========================
+
+Objective Development has reserved a set of USB Product-IDs for use according
+to the guidelines outlined below. For more information about the concept of
+USB IDs please see the file USB-ID-FAQ.txt. Objective Development guarantees
+that the IDs listed below are not used by any USB compliant devices.
+
+
+====================
+MECHANISM OF SHARING
+====================
+
+From a technical point of view, two different devices can share the same USB
+Vendor- and Product-ID if they require the same driver on operating system
+level. We make use of this fact by assigning separate IDs for various device
+classes. On application layer, devices must be distinguished by their textual
+name or serial number. We offer separate sets of IDs for discrimination by
+textual name and for serial number.
+
+Examples for shared use of USB IDs are included with V-USB in the "examples"
+subdirectory.
+
+
+======================================
+IDs FOR DISCRIMINATION BY TEXTUAL NAME
+======================================
+
+If you use one of the IDs listed below, your device and host-side software
+must conform to these rules:
+
+(1) The USB device MUST provide a textual representation of the manufacturer
+and product identification. The manufacturer identification MUST be available
+at least in USB language 0x0409 (English/US).
+
+(2) The textual manufacturer identification MUST contain either an Internet
+domain name (e.g. "mycompany.com") registered and owned by you, or an e-mail
+address under your control (e.g. "myname@gmx.net"). You can embed the domain
+name or e-mail address in any string you like, e.g.  "Objective Development
+http://www.obdev.at/vusb/".
+
+(3) You are responsible for retaining ownership of the domain or e-mail
+address for as long as any of your products are in use.
+
+(4) You may choose any string for the textual product identification, as long
+as this string is unique within the scope of your textual manufacturer
+identification.
+
+(5) Application side device look-up MUST be based on the textual manufacturer
+and product identification in addition to VID/PID matching. The driver
+matching MUST be a comparison of the entire strings, NOT a sub-string match.
+
+(6) For devices which implement a particular USB device class (e.g. HID), the
+operating system's default class driver MUST be used. If an operating system
+driver for Vendor Class devices is needed, this driver must be libusb or
+libusb-win32 (see http://libusb.org/ and
+http://libusb-win32.sourceforge.net/).
+
+Table if IDs for discrimination by textual name:
+
+PID dec (hex) | VID dec (hex) | Description of use
+==============+===============+============================================
+1500 (0x05dc) | 5824 (0x16c0) | For Vendor Class devices with libusb
+--------------+---------------+--------------------------------------------
+1503 (0x05df) | 5824 (0x16c0) | For generic HID class devices (which are
+              |               | NOT mice, keyboards or joysticks)
+--------------+---------------+--------------------------------------------
+1505 (0x05e1) | 5824 (0x16c0) | For CDC-ACM class devices (modems)
+--------------+---------------+--------------------------------------------
+1508 (0x05e4) | 5824 (0x16c0) | For MIDI class devices
+--------------+---------------+--------------------------------------------
+
+Note that Windows caches the textual product- and vendor-description for
+mice, keyboards and joysticks. Name-bsed discrimination is therefore not
+recommended for these device classes.
+
+
+=======================================
+IDs FOR DISCRIMINATION BY SERIAL NUMBER
+=======================================
+
+If you use one of the IDs listed below, your device and host-side software
+must conform to these rules:
+
+(1) The USB device MUST provide a textual representation of the serial
+number, unless ONLY the operating system's default class driver is used.
+The serial number string MUST be available at least in USB language 0x0409
+(English/US).
+
+(2) The serial number MUST start with either an Internet domain name (e.g.
+"mycompany.com") registered and owned by you, or an e-mail address under your
+control (e.g. "myname@gmx.net"), both terminated with a colon (":") character.
+You MAY append any string you like for further discrimination of your devices.
+
+(3) You are responsible for retaining ownership of the domain or e-mail
+address for as long as any of your products are in use.
+
+(5) Application side device look-up MUST be based on the serial number string
+in addition to VID/PID matching. The matching must start at the first
+character of the serial number string and include the colon character
+terminating your domain or e-mail address. It MAY stop anywhere after that.
+
+(6) For devices which implement a particular USB device class (e.g. HID), the
+operating system's default class driver MUST be used. If an operating system
+driver for Vendor Class devices is needed, this driver must be libusb or
+libusb-win32 (see http://libusb.org/ and
+http://libusb-win32.sourceforge.net/).
+
+(7) If ONLY the operating system's default class driver is used, e.g. for
+mice, keyboards, joysticks, CDC or MIDI devices and no discrimination by an
+application is needed, the serial number may be omitted.
+
+
+Table if IDs for discrimination by serial number string:
+
+PID dec (hex)  | VID dec (hex) | Description of use
+===============+===============+===========================================
+10200 (0x27d8) | 5824 (0x16c0) | For Vendor Class devices with libusb
+---------------+---------------+-------------------------------------------
+10201 (0x27d9) | 5824 (0x16c0) | For generic HID class devices (which are
+               |               | NOT mice, keyboards or joysticks)
+---------------+---------------+-------------------------------------------
+10202 (0x27da) | 5824 (0x16c0) | For USB Mice
+---------------+---------------+-------------------------------------------
+10203 (0x27db) | 5824 (0x16c0) | For USB Keyboards
+---------------+---------------+-------------------------------------------
+10204 (0x27dc) | 5824 (0x16c0) | For USB Joysticks
+---------------+---------------+-------------------------------------------
+10205 (0x27dd) | 5824 (0x16c0) | For CDC-ACM class devices (modems)
+---------------+---------------+-------------------------------------------
+10206 (0x27de) | 5824 (0x16c0) | For MIDI class devices
+---------------+---------------+-------------------------------------------
+
+
+=================
+ORIGIN OF USB-IDs
+=================
+
+OBJECTIVE DEVELOPMENT Software GmbH has obtained all VID/PID pairs listed
+here from Wouter van Ooijen (see www.voti.nl) for exclusive disposition.
+Wouter van Ooijen has obtained the VID from the USB Implementers Forum, Inc.
+(see www.usb.org). The VID is registered for the company name "Van Ooijen
+Technische Informatica".
+
+
+==========
+DISCLAIMER
+==========
+
+OBJECTIVE DEVELOPMENT Software GmbH disclaims all liability for any
+problems which are caused by the shared use of these VID/PID pairs.
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/asmcommon.inc b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/asmcommon.inc
new file mode 100644
index 00000000..07d692be
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/asmcommon.inc
@@ -0,0 +1,188 @@
+/* Name: asmcommon.inc
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2007-11-05
+ * Tabsize: 4
+ * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * Revision: $Id$
+ */
+
+/* Do not link this file! Link usbdrvasm.S instead, which includes the
+ * appropriate implementation!
+ */
+
+/*
+General Description:
+This file contains assembler code which is shared among the USB driver
+implementations for different CPU cocks. Since the code must be inserted
+in the middle of the module, it's split out into this file and #included.
+
+Jump destinations called from outside:
+    sofError: Called when no start sequence was found.
+    se0: Called when a package has been successfully received.
+    overflow: Called when receive buffer overflows.
+    doReturn: Called after sending data.
+
+Outside jump destinations used by this module:
+    waitForJ: Called to receive an already arriving packet.
+    sendAckAndReti:
+    sendNakAndReti:
+    sendCntAndReti:
+    usbSendAndReti:
+
+The following macros must be defined before this file is included:
+    .macro POP_STANDARD
+    .endm
+    .macro POP_RETI
+    .endm
+*/
+
+#define token   x1
+
+overflow:
+    ldi     x2, 1<<USB_INTR_PENDING_BIT
+    USB_STORE_PENDING(x2)       ; clear any pending interrupts
+ignorePacket:
+    clr     token
+    rjmp    storeTokenAndReturn
+
+;----------------------------------------------------------------------------
+; Processing of received packet (numbers in brackets are cycles after center of SE0)
+;----------------------------------------------------------------------------
+;This is the only non-error exit point for the software receiver loop
+;we don't check any CRCs here because there is no time left.
+se0:
+    subi    cnt, USB_BUFSIZE    ;[5]
+    neg     cnt                 ;[6]
+    sub     YL, cnt             ;[7]
+    sbci    YH, 0               ;[8]
+    ldi     x2, 1<<USB_INTR_PENDING_BIT ;[9]
+    USB_STORE_PENDING(x2)       ;[10] clear pending intr and check flag later. SE0 should be over.
+    ld      token, y            ;[11]
+    cpi     token, USBPID_DATA0 ;[13]
+    breq    handleData          ;[14]
+    cpi     token, USBPID_DATA1 ;[15]
+    breq    handleData          ;[16]
+    lds     shift, usbDeviceAddr;[17]
+    ldd     x2, y+1             ;[19] ADDR and 1 bit endpoint number
+    lsl     x2                  ;[21] shift out 1 bit endpoint number
+    cpse    x2, shift           ;[22]
+    rjmp    ignorePacket        ;[23]
+/* only compute endpoint number in x3 if required later */
+#if USB_CFG_HAVE_INTRIN_ENDPOINT || USB_CFG_IMPLEMENT_FN_WRITEOUT
+    ldd     x3, y+2             ;[24] endpoint number + crc
+    rol     x3                  ;[26] shift in LSB of endpoint
+#endif
+    cpi     token, USBPID_IN    ;[27]
+    breq    handleIn            ;[28]
+    cpi     token, USBPID_SETUP ;[29]
+    breq    handleSetupOrOut    ;[30]
+    cpi     token, USBPID_OUT   ;[31]
+    brne    ignorePacket        ;[32] must be ack, nak or whatever
+;   rjmp    handleSetupOrOut    ; fallthrough
+
+;Setup and Out are followed by a data packet two bit times (16 cycles) after
+;the end of SE0. The sync code allows up to 40 cycles delay from the start of
+;the sync pattern until the first bit is sampled. That's a total of 56 cycles.
+handleSetupOrOut:               ;[32]
+#if USB_CFG_IMPLEMENT_FN_WRITEOUT   /* if we have data for endpoint != 0, set usbCurrentTok to address */
+    andi    x3, 0xf             ;[32]
+    breq    storeTokenAndReturn ;[33]
+    mov     token, x3           ;[34] indicate that this is endpoint x OUT
+#endif
+storeTokenAndReturn:
+    sts     usbCurrentTok, token;[35]
+doReturn:
+    POP_STANDARD                ;[37] 12...16 cycles
+    USB_LOAD_PENDING(YL)        ;[49]
+    sbrc    YL, USB_INTR_PENDING_BIT;[50] check whether data is already arriving
+    rjmp    waitForJ            ;[51] save the pops and pushes -- a new interrupt is already pending
+sofError:
+    POP_RETI                    ;macro call
+    reti
+
+handleData:
+#if USB_CFG_CHECK_CRC
+    CRC_CLEANUP_AND_CHECK       ; jumps to ignorePacket if CRC error
+#endif
+    lds     shift, usbCurrentTok;[18]
+    tst     shift               ;[20]
+    breq    doReturn            ;[21]
+    lds     x2, usbRxLen        ;[22]
+    tst     x2                  ;[24]
+    brne    sendNakAndReti      ;[25]
+; 2006-03-11: The following two lines fix a problem where the device was not
+; recognized if usbPoll() was called less frequently than once every 4 ms.
+    cpi     cnt, 4              ;[26] zero sized data packets are status phase only -- ignore and ack
+    brmi    sendAckAndReti      ;[27] keep rx buffer clean -- we must not NAK next SETUP
+#if USB_CFG_CHECK_DATA_TOGGLING
+    sts     usbCurrentDataToken, token  ; store for checking by C code
+#endif
+    sts     usbRxLen, cnt       ;[28] store received data, swap buffers
+    sts     usbRxToken, shift   ;[30]
+    lds     x2, usbInputBufOffset;[32] swap buffers
+    ldi     cnt, USB_BUFSIZE    ;[34]
+    sub     cnt, x2             ;[35]
+    sts     usbInputBufOffset, cnt;[36] buffers now swapped
+    rjmp    sendAckAndReti      ;[38] 40 + 17 = 57 until SOP
+
+handleIn:
+;We don't send any data as long as the C code has not processed the current
+;input data and potentially updated the output data. That's more efficient
+;in terms of code size than clearing the tx buffers when a packet is received.
+    lds     x1, usbRxLen        ;[30]
+    cpi     x1, 1               ;[32] negative values are flow control, 0 means "buffer free"
+    brge    sendNakAndReti      ;[33] unprocessed input packet?
+    ldi     x1, USBPID_NAK      ;[34] prepare value for usbTxLen
+#if USB_CFG_HAVE_INTRIN_ENDPOINT
+    andi    x3, 0xf             ;[35] x3 contains endpoint
+#if USB_CFG_SUPPRESS_INTR_CODE
+    brne    sendNakAndReti      ;[36]
+#else
+    brne    handleIn1           ;[36]
+#endif
+#endif
+    lds     cnt, usbTxLen       ;[37]
+    sbrc    cnt, 4              ;[39] all handshake tokens have bit 4 set
+    rjmp    sendCntAndReti      ;[40] 42 + 16 = 58 until SOP
+    sts     usbTxLen, x1        ;[41] x1 == USBPID_NAK from above
+    ldi     YL, lo8(usbTxBuf)   ;[43]
+    ldi     YH, hi8(usbTxBuf)   ;[44]
+    rjmp    usbSendAndReti      ;[45] 57 + 12 = 59 until SOP
+
+; Comment about when to set usbTxLen to USBPID_NAK:
+; We should set it back when we receive the ACK from the host. This would
+; be simple to implement: One static variable which stores whether the last
+; tx was for endpoint 0 or 1 and a compare in the receiver to distinguish the
+; ACK. However, we set it back immediately when we send the package,
+; assuming that no error occurs and the host sends an ACK. We save one byte
+; RAM this way and avoid potential problems with endless retries. The rest of
+; the driver assumes error-free transfers anyway.
+
+#if !USB_CFG_SUPPRESS_INTR_CODE && USB_CFG_HAVE_INTRIN_ENDPOINT /* placed here due to relative jump range */
+handleIn1:                      ;[38]
+#if USB_CFG_HAVE_INTRIN_ENDPOINT3
+; 2006-06-10 as suggested by O.Tamura: support second INTR IN / BULK IN endpoint
+    cpi     x3, USB_CFG_EP3_NUMBER;[38]
+    breq    handleIn3           ;[39]
+#endif
+    lds     cnt, usbTxLen1      ;[40]
+    sbrc    cnt, 4              ;[42] all handshake tokens have bit 4 set
+    rjmp    sendCntAndReti      ;[43] 47 + 16 = 63 until SOP
+    sts     usbTxLen1, x1       ;[44] x1 == USBPID_NAK from above
+    ldi     YL, lo8(usbTxBuf1)  ;[46]
+    ldi     YH, hi8(usbTxBuf1)  ;[47]
+    rjmp    usbSendAndReti      ;[48] 50 + 12 = 62 until SOP
+
+#if USB_CFG_HAVE_INTRIN_ENDPOINT3
+handleIn3:
+    lds     cnt, usbTxLen3      ;[41]
+    sbrc    cnt, 4              ;[43]
+    rjmp    sendCntAndReti      ;[44] 49 + 16 = 65 until SOP
+    sts     usbTxLen3, x1       ;[45] x1 == USBPID_NAK from above
+    ldi     YL, lo8(usbTxBuf3)  ;[47]
+    ldi     YH, hi8(usbTxBuf3)  ;[48]
+    rjmp    usbSendAndReti      ;[49] 51 + 12 = 63 until SOP
+#endif
+#endif
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/oddebug.c b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/oddebug.c
new file mode 100644
index 00000000..466e68f4
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/oddebug.c
@@ -0,0 +1,50 @@
+/* Name: oddebug.c
+ * Project: AVR library
+ * Author: Christian Starkjohann
+ * Creation Date: 2005-01-16
+ * Tabsize: 4
+ * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * This Revision: $Id$
+ */
+
+#include "oddebug.h"
+
+#if DEBUG_LEVEL > 0
+
+#warning "Never compile production devices with debugging enabled"
+
+static void uartPutc(char c)
+{
+    while(!(ODDBG_USR & (1 << ODDBG_UDRE)));    /* wait for data register empty */
+    ODDBG_UDR = c;
+}
+
+static uchar    hexAscii(uchar h)
+{
+    h &= 0xf;
+    if(h >= 10)
+        h += 'a' - (uchar)10 - '0';
+    h += '0';
+    return h;
+}
+
+static void printHex(uchar c)
+{
+    uartPutc(hexAscii(c >> 4));
+    uartPutc(hexAscii(c));
+}
+
+void    odDebug(uchar prefix, uchar *data, uchar len)
+{
+    printHex(prefix);
+    uartPutc(':');
+    while(len--){
+        uartPutc(' ');
+        printHex(*data++);
+    }
+    uartPutc('\r');
+    uartPutc('\n');
+}
+
+#endif
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/oddebug.h b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/oddebug.h
new file mode 100644
index 00000000..c56af1c3
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/oddebug.h
@@ -0,0 +1,123 @@
+/* Name: oddebug.h
+ * Project: AVR library
+ * Author: Christian Starkjohann
+ * Creation Date: 2005-01-16
+ * Tabsize: 4
+ * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * This Revision: $Id$
+ */
+
+#ifndef __oddebug_h_included__
+#define __oddebug_h_included__
+
+/*
+General Description:
+This module implements a function for debug logs on the serial line of the
+AVR microcontroller. Debugging can be configured with the define
+'DEBUG_LEVEL'. If this macro is not defined or defined to 0, all debugging
+calls are no-ops. If it is 1, DBG1 logs will appear, but not DBG2. If it is
+2, DBG1 and DBG2 logs will be printed.
+
+A debug log consists of a label ('prefix') to indicate which debug log created
+the output and a memory block to dump in hex ('data' and 'len').
+*/
+
+
+#ifndef F_CPU
+#   define  F_CPU   12000000    /* 12 MHz */
+#endif
+
+/* make sure we have the UART defines: */
+#include "usbportability.h"
+
+#ifndef uchar
+#   define  uchar   unsigned char
+#endif
+
+#if DEBUG_LEVEL > 0 && !(defined TXEN || defined TXEN0) /* no UART in device */
+#   warning "Debugging disabled because device has no UART"
+#   undef   DEBUG_LEVEL
+#endif
+
+#ifndef DEBUG_LEVEL
+#   define  DEBUG_LEVEL 0
+#endif
+
+/* ------------------------------------------------------------------------- */
+
+#if DEBUG_LEVEL > 0
+#   define  DBG1(prefix, data, len) odDebug(prefix, data, len)
+#else
+#   define  DBG1(prefix, data, len)
+#endif
+
+#if DEBUG_LEVEL > 1
+#   define  DBG2(prefix, data, len) odDebug(prefix, data, len)
+#else
+#   define  DBG2(prefix, data, len)
+#endif
+
+/* ------------------------------------------------------------------------- */
+
+#if DEBUG_LEVEL > 0
+extern void odDebug(uchar prefix, uchar *data, uchar len);
+
+/* Try to find our control registers; ATMEL likes to rename these */
+
+#if defined UBRR
+#   define  ODDBG_UBRR  UBRR
+#elif defined UBRRL
+#   define  ODDBG_UBRR  UBRRL
+#elif defined UBRR0
+#   define  ODDBG_UBRR  UBRR0
+#elif defined UBRR0L
+#   define  ODDBG_UBRR  UBRR0L
+#endif
+
+#if defined UCR
+#   define  ODDBG_UCR   UCR
+#elif defined UCSRB
+#   define  ODDBG_UCR   UCSRB
+#elif defined UCSR0B
+#   define  ODDBG_UCR   UCSR0B
+#endif
+
+#if defined TXEN
+#   define  ODDBG_TXEN  TXEN
+#else
+#   define  ODDBG_TXEN  TXEN0
+#endif
+
+#if defined USR
+#   define  ODDBG_USR   USR
+#elif defined UCSRA
+#   define  ODDBG_USR   UCSRA
+#elif defined UCSR0A
+#   define  ODDBG_USR   UCSR0A
+#endif
+
+#if defined UDRE
+#   define  ODDBG_UDRE  UDRE
+#else
+#   define  ODDBG_UDRE  UDRE0
+#endif
+
+#if defined UDR
+#   define  ODDBG_UDR   UDR
+#elif defined UDR0
+#   define  ODDBG_UDR   UDR0
+#endif
+
+static inline void  odDebugInit(void)
+{
+    ODDBG_UCR |= (1<<ODDBG_TXEN);
+    ODDBG_UBRR = F_CPU / (19200 * 16L) - 1;
+}
+#else
+#   define odDebugInit()
+#endif
+
+/* ------------------------------------------------------------------------- */
+
+#endif /* __oddebug_h_included__ */
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbconfig-prototype.h b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbconfig-prototype.h
new file mode 100644
index 00000000..826f026f
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbconfig-prototype.h
@@ -0,0 +1,376 @@
+/* Name: usbconfig.h
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2005-04-01
+ * Tabsize: 4
+ * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * This Revision: $Id$
+ */
+
+#ifndef __usbconfig_h_included__
+#define __usbconfig_h_included__
+
+/*
+General Description:
+This file is an example configuration (with inline documentation) for the USB
+driver. It configures V-USB for USB D+ connected to Port D bit 2 (which is
+also hardware interrupt 0 on many devices) and USB D- to Port D bit 4. You may
+wire the lines to any other port, as long as D+ is also wired to INT0 (or any
+other hardware interrupt, as long as it is the highest level interrupt, see
+section at the end of this file).
++ To create your own usbconfig.h file, copy this file to your project's
++ firmware source directory) and rename it to "usbconfig.h".
++ Then edit it accordingly.
+*/
+
+/* ---------------------------- Hardware Config ---------------------------- */
+
+#define USB_CFG_IOPORTNAME      D
+/* This is the port where the USB bus is connected. When you configure it to
+ * "B", the registers PORTB, PINB and DDRB will be used.
+ */
+#define USB_CFG_DMINUS_BIT      4
+/* This is the bit number in USB_CFG_IOPORT where the USB D- line is connected.
+ * This may be any bit in the port.
+ */
+#define USB_CFG_DPLUS_BIT       2
+/* This is the bit number in USB_CFG_IOPORT where the USB D+ line is connected.
+ * This may be any bit in the port. Please note that D+ must also be connected
+ * to interrupt pin INT0! [You can also use other interrupts, see section
+ * "Optional MCU Description" below, or you can connect D- to the interrupt, as
+ * it is required if you use the USB_COUNT_SOF feature. If you use D- for the
+ * interrupt, the USB interrupt will also be triggered at Start-Of-Frame
+ * markers every millisecond.]
+ */
+#define USB_CFG_CLOCK_KHZ       (F_CPU/1000)
+/* Clock rate of the AVR in kHz. Legal values are 12000, 12800, 15000, 16000,
+ * 16500, 18000 and 20000. The 12.8 MHz and 16.5 MHz versions of the code
+ * require no crystal, they tolerate +/- 1% deviation from the nominal
+ * frequency. All other rates require a precision of 2000 ppm and thus a
+ * crystal!
+ * Since F_CPU should be defined to your actual clock rate anyway, you should
+ * not need to modify this setting.
+ */
+#define USB_CFG_CHECK_CRC       0
+/* Define this to 1 if you want that the driver checks integrity of incoming
+ * data packets (CRC checks). CRC checks cost quite a bit of code size and are
+ * currently only available for 18 MHz crystal clock. You must choose
+ * USB_CFG_CLOCK_KHZ = 18000 if you enable this option.
+ */
+
+/* ----------------------- Optional Hardware Config ------------------------ */
+
+/* #define USB_CFG_PULLUP_IOPORTNAME   D */
+/* If you connect the 1.5k pullup resistor from D- to a port pin instead of
+ * V+, you can connect and disconnect the device from firmware by calling
+ * the macros usbDeviceConnect() and usbDeviceDisconnect() (see usbdrv.h).
+ * This constant defines the port on which the pullup resistor is connected.
+ */
+/* #define USB_CFG_PULLUP_BIT          4 */
+/* This constant defines the bit number in USB_CFG_PULLUP_IOPORT (defined
+ * above) where the 1.5k pullup resistor is connected. See description
+ * above for details.
+ */
+
+/* --------------------------- Functional Range ---------------------------- */
+
+#define USB_CFG_HAVE_INTRIN_ENDPOINT    0
+/* Define this to 1 if you want to compile a version with two endpoints: The
+ * default control endpoint 0 and an interrupt-in endpoint (any other endpoint
+ * number).
+ */
+#define USB_CFG_HAVE_INTRIN_ENDPOINT3   0
+/* Define this to 1 if you want to compile a version with three endpoints: The
+ * default control endpoint 0, an interrupt-in endpoint 3 (or the number
+ * configured below) and a catch-all default interrupt-in endpoint as above.
+ * You must also define USB_CFG_HAVE_INTRIN_ENDPOINT to 1 for this feature.
+ */
+#define USB_CFG_EP3_NUMBER              3
+/* If the so-called endpoint 3 is used, it can now be configured to any other
+ * endpoint number (except 0) with this macro. Default if undefined is 3.
+ */
+/* #define USB_INITIAL_DATATOKEN           USBPID_DATA1 */
+/* The above macro defines the startup condition for data toggling on the
+ * interrupt/bulk endpoints 1 and 3. Defaults to USBPID_DATA1.
+ * Since the token is toggled BEFORE sending any data, the first packet is
+ * sent with the oposite value of this configuration!
+ */
+#define USB_CFG_IMPLEMENT_HALT          0
+/* Define this to 1 if you also want to implement the ENDPOINT_HALT feature
+ * for endpoint 1 (interrupt endpoint). Although you may not need this feature,
+ * it is required by the standard. We have made it a config option because it
+ * bloats the code considerably.
+ */
+#define USB_CFG_SUPPRESS_INTR_CODE      0
+/* Define this to 1 if you want to declare interrupt-in endpoints, but don't
+ * want to send any data over them. If this macro is defined to 1, functions
+ * usbSetInterrupt() and usbSetInterrupt3() are omitted. This is useful if
+ * you need the interrupt-in endpoints in order to comply to an interface
+ * (e.g. HID), but never want to send any data. This option saves a couple
+ * of bytes in flash memory and the transmit buffers in RAM.
+ */
+#define USB_CFG_INTR_POLL_INTERVAL      10
+/* If you compile a version with endpoint 1 (interrupt-in), this is the poll
+ * interval. The value is in milliseconds and must not be less than 10 ms for
+ * low speed devices.
+ */
+#define USB_CFG_IS_SELF_POWERED         0
+/* Define this to 1 if the device has its own power supply. Set it to 0 if the
+ * device is powered from the USB bus.
+ */
+#define USB_CFG_MAX_BUS_POWER           100
+/* Set this variable to the maximum USB bus power consumption of your device.
+ * The value is in milliamperes. [It will be divided by two since USB
+ * communicates power requirements in units of 2 mA.]
+ */
+#define USB_CFG_IMPLEMENT_FN_WRITE      0
+/* Set this to 1 if you want usbFunctionWrite() to be called for control-out
+ * transfers. Set it to 0 if you don't need it and want to save a couple of
+ * bytes.
+ */
+#define USB_CFG_IMPLEMENT_FN_READ       0
+/* Set this to 1 if you need to send control replies which are generated
+ * "on the fly" when usbFunctionRead() is called. If you only want to send
+ * data from a static buffer, set it to 0 and return the data from
+ * usbFunctionSetup(). This saves a couple of bytes.
+ */
+#define USB_CFG_IMPLEMENT_FN_WRITEOUT   0
+/* Define this to 1 if you want to use interrupt-out (or bulk out) endpoints.
+ * You must implement the function usbFunctionWriteOut() which receives all
+ * interrupt/bulk data sent to any endpoint other than 0. The endpoint number
+ * can be found in 'usbRxToken'.
+ */
+#define USB_CFG_HAVE_FLOWCONTROL        0
+/* Define this to 1 if you want flowcontrol over USB data. See the definition
+ * of the macros usbDisableAllRequests() and usbEnableAllRequests() in
+ * usbdrv.h.
+ */
+#define USB_CFG_DRIVER_FLASH_PAGE       0
+/* If the device has more than 64 kBytes of flash, define this to the 64 k page
+ * where the driver's constants (descriptors) are located. Or in other words:
+ * Define this to 1 for boot loaders on the ATMega128.
+ */
+#define USB_CFG_LONG_TRANSFERS          0
+/* Define this to 1 if you want to send/receive blocks of more than 254 bytes
+ * in a single control-in or control-out transfer. Note that the capability
+ * for long transfers increases the driver size.
+ */
+/* #define USB_RX_USER_HOOK(data, len)     if(usbRxToken == (uchar)USBPID_SETUP) blinkLED(); */
+/* This macro is a hook if you want to do unconventional things. If it is
+ * defined, it's inserted at the beginning of received message processing.
+ * If you eat the received message and don't want default processing to
+ * proceed, do a return after doing your things. One possible application
+ * (besides debugging) is to flash a status LED on each packet.
+ */
+/* #define USB_RESET_HOOK(resetStarts)     if(!resetStarts){hadUsbReset();} */
+/* This macro is a hook if you need to know when an USB RESET occurs. It has
+ * one parameter which distinguishes between the start of RESET state and its
+ * end.
+ */
+/* #define USB_SET_ADDRESS_HOOK()              hadAddressAssigned(); */
+/* This macro (if defined) is executed when a USB SET_ADDRESS request was
+ * received.
+ */
+#define USB_COUNT_SOF                   0
+/* define this macro to 1 if you need the global variable "usbSofCount" which
+ * counts SOF packets. This feature requires that the hardware interrupt is
+ * connected to D- instead of D+.
+ */
+/* #ifdef __ASSEMBLER__
+ * macro myAssemblerMacro
+ *     in      YL, TCNT0
+ *     sts     timer0Snapshot, YL
+ *     endm
+ * #endif
+ * #define USB_SOF_HOOK                    myAssemblerMacro
+ * This macro (if defined) is executed in the assembler module when a
+ * Start Of Frame condition is detected. It is recommended to define it to
+ * the name of an assembler macro which is defined here as well so that more
+ * than one assembler instruction can be used. The macro may use the register
+ * YL and modify SREG. If it lasts longer than a couple of cycles, USB messages
+ * immediately after an SOF pulse may be lost and must be retried by the host.
+ * What can you do with this hook? Since the SOF signal occurs exactly every
+ * 1 ms (unless the host is in sleep mode), you can use it to tune OSCCAL in
+ * designs running on the internal RC oscillator.
+ * Please note that Start Of Frame detection works only if D- is wired to the
+ * interrupt, not D+. THIS IS DIFFERENT THAN MOST EXAMPLES!
+ */
+#define USB_CFG_CHECK_DATA_TOGGLING     0
+/* define this macro to 1 if you want to filter out duplicate data packets
+ * sent by the host. Duplicates occur only as a consequence of communication
+ * errors, when the host does not receive an ACK. Please note that you need to
+ * implement the filtering yourself in usbFunctionWriteOut() and
+ * usbFunctionWrite(). Use the global usbCurrentDataToken and a static variable
+ * for each control- and out-endpoint to check for duplicate packets.
+ */
+#define USB_CFG_HAVE_MEASURE_FRAME_LENGTH   0
+/* define this macro to 1 if you want the function usbMeasureFrameLength()
+ * compiled in. This function can be used to calibrate the AVR's RC oscillator.
+ */
+#define USB_USE_FAST_CRC                0
+/* The assembler module has two implementations for the CRC algorithm. One is
+ * faster, the other is smaller. This CRC routine is only used for transmitted
+ * messages where timing is not critical. The faster routine needs 31 cycles
+ * per byte while the smaller one needs 61 to 69 cycles. The faster routine
+ * may be worth the 32 bytes bigger code size if you transmit lots of data and
+ * run the AVR close to its limit.
+ */
+
+/* -------------------------- Device Description --------------------------- */
+
+#define  USB_CFG_VENDOR_ID       0xc0, 0x16 /* = 0x16c0 = 5824 = voti.nl */
+/* USB vendor ID for the device, low byte first. If you have registered your
+ * own Vendor ID, define it here. Otherwise you may use one of obdev's free
+ * shared VID/PID pairs. Be sure to read USB-IDs-for-free.txt for rules!
+ * *** IMPORTANT NOTE ***
+ * This template uses obdev's shared VID/PID pair for Vendor Class devices
+ * with libusb: 0x16c0/0x5dc.  Use this VID/PID pair ONLY if you understand
+ * the implications!
+ */
+#define  USB_CFG_DEVICE_ID       0xdc, 0x05 /* = 0x05dc = 1500 */
+/* This is the ID of the product, low byte first. It is interpreted in the
+ * scope of the vendor ID. If you have registered your own VID with usb.org
+ * or if you have licensed a PID from somebody else, define it here. Otherwise
+ * you may use one of obdev's free shared VID/PID pairs. See the file
+ * USB-IDs-for-free.txt for details!
+ * *** IMPORTANT NOTE ***
+ * This template uses obdev's shared VID/PID pair for Vendor Class devices
+ * with libusb: 0x16c0/0x5dc.  Use this VID/PID pair ONLY if you understand
+ * the implications!
+ */
+#define USB_CFG_DEVICE_VERSION  0x00, 0x01
+/* Version number of the device: Minor number first, then major number.
+ */
+#define USB_CFG_VENDOR_NAME     'o', 'b', 'd', 'e', 'v', '.', 'a', 't'
+#define USB_CFG_VENDOR_NAME_LEN 8
+/* These two values define the vendor name returned by the USB device. The name
+ * must be given as a list of characters under single quotes. The characters
+ * are interpreted as Unicode (UTF-16) entities.
+ * If you don't want a vendor name string, undefine these macros.
+ * ALWAYS define a vendor name containing your Internet domain name if you use
+ * obdev's free shared VID/PID pair. See the file USB-IDs-for-free.txt for
+ * details.
+ */
+#define USB_CFG_DEVICE_NAME     'T', 'e', 'm', 'p', 'l', 'a', 't', 'e'
+#define USB_CFG_DEVICE_NAME_LEN 8
+/* Same as above for the device name. If you don't want a device name, undefine
+ * the macros. See the file USB-IDs-for-free.txt before you assign a name if
+ * you use a shared VID/PID.
+ */
+/*#define USB_CFG_SERIAL_NUMBER   'N', 'o', 'n', 'e' */
+/*#define USB_CFG_SERIAL_NUMBER_LEN   0 */
+/* Same as above for the serial number. If you don't want a serial number,
+ * undefine the macros.
+ * It may be useful to provide the serial number through other means than at
+ * compile time. See the section about descriptor properties below for how
+ * to fine tune control over USB descriptors such as the string descriptor
+ * for the serial number.
+ */
+#define USB_CFG_DEVICE_CLASS        0xff    /* set to 0 if deferred to interface */
+#define USB_CFG_DEVICE_SUBCLASS     0
+/* See USB specification if you want to conform to an existing device class.
+ * Class 0xff is "vendor specific".
+ */
+#define USB_CFG_INTERFACE_CLASS     0   /* define class here if not at device level */
+#define USB_CFG_INTERFACE_SUBCLASS  0
+#define USB_CFG_INTERFACE_PROTOCOL  0
+/* See USB specification if you want to conform to an existing device class or
+ * protocol. The following classes must be set at interface level:
+ * HID class is 3, no subclass and protocol required (but may be useful!)
+ * CDC class is 2, use subclass 2 and protocol 1 for ACM
+ */
+/* #define USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH    42 */
+/* Define this to the length of the HID report descriptor, if you implement
+ * an HID device. Otherwise don't define it or define it to 0.
+ * If you use this define, you must add a PROGMEM character array named
+ * "usbHidReportDescriptor" to your code which contains the report descriptor.
+ * Don't forget to keep the array and this define in sync!
+ */
+
+/* #define USB_PUBLIC static */
+/* Use the define above if you #include usbdrv.c instead of linking against it.
+ * This technique saves a couple of bytes in flash memory.
+ */
+
+/* ------------------- Fine Control over USB Descriptors ------------------- */
+/* If you don't want to use the driver's default USB descriptors, you can
+ * provide our own. These can be provided as (1) fixed length static data in
+ * flash memory, (2) fixed length static data in RAM or (3) dynamically at
+ * runtime in the function usbFunctionDescriptor(). See usbdrv.h for more
+ * information about this function.
+ * Descriptor handling is configured through the descriptor's properties. If
+ * no properties are defined or if they are 0, the default descriptor is used.
+ * Possible properties are:
+ *   + USB_PROP_IS_DYNAMIC: The data for the descriptor should be fetched
+ *     at runtime via usbFunctionDescriptor(). If the usbMsgPtr mechanism is
+ *     used, the data is in FLASH by default. Add property USB_PROP_IS_RAM if
+ *     you want RAM pointers.
+ *   + USB_PROP_IS_RAM: The data returned by usbFunctionDescriptor() or found
+ *     in static memory is in RAM, not in flash memory.
+ *   + USB_PROP_LENGTH(len): If the data is in static memory (RAM or flash),
+ *     the driver must know the descriptor's length. The descriptor itself is
+ *     found at the address of a well known identifier (see below).
+ * List of static descriptor names (must be declared PROGMEM if in flash):
+ *   char usbDescriptorDevice[];
+ *   char usbDescriptorConfiguration[];
+ *   char usbDescriptorHidReport[];
+ *   char usbDescriptorString0[];
+ *   int usbDescriptorStringVendor[];
+ *   int usbDescriptorStringDevice[];
+ *   int usbDescriptorStringSerialNumber[];
+ * Other descriptors can't be provided statically, they must be provided
+ * dynamically at runtime.
+ *
+ * Descriptor properties are or-ed or added together, e.g.:
+ * #define USB_CFG_DESCR_PROPS_DEVICE   (USB_PROP_IS_RAM | USB_PROP_LENGTH(18))
+ *
+ * The following descriptors are defined:
+ *   USB_CFG_DESCR_PROPS_DEVICE
+ *   USB_CFG_DESCR_PROPS_CONFIGURATION
+ *   USB_CFG_DESCR_PROPS_STRINGS
+ *   USB_CFG_DESCR_PROPS_STRING_0
+ *   USB_CFG_DESCR_PROPS_STRING_VENDOR
+ *   USB_CFG_DESCR_PROPS_STRING_PRODUCT
+ *   USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER
+ *   USB_CFG_DESCR_PROPS_HID
+ *   USB_CFG_DESCR_PROPS_HID_REPORT
+ *   USB_CFG_DESCR_PROPS_UNKNOWN (for all descriptors not handled by the driver)
+ *
+ * Note about string descriptors: String descriptors are not just strings, they
+ * are Unicode strings prefixed with a 2 byte header. Example:
+ * int  serialNumberDescriptor[] = {
+ *     USB_STRING_DESCRIPTOR_HEADER(6),
+ *     'S', 'e', 'r', 'i', 'a', 'l'
+ * };
+ */
+
+#define USB_CFG_DESCR_PROPS_DEVICE                  0
+#define USB_CFG_DESCR_PROPS_CONFIGURATION           0
+#define USB_CFG_DESCR_PROPS_STRINGS                 0
+#define USB_CFG_DESCR_PROPS_STRING_0                0
+#define USB_CFG_DESCR_PROPS_STRING_VENDOR           0
+#define USB_CFG_DESCR_PROPS_STRING_PRODUCT          0
+#define USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER    0
+#define USB_CFG_DESCR_PROPS_HID                     0
+#define USB_CFG_DESCR_PROPS_HID_REPORT              0
+#define USB_CFG_DESCR_PROPS_UNKNOWN                 0
+
+/* ----------------------- Optional MCU Description ------------------------ */
+
+/* The following configurations have working defaults in usbdrv.h. You
+ * usually don't need to set them explicitly. Only if you want to run
+ * the driver on a device which is not yet supported or with a compiler
+ * which is not fully supported (such as IAR C) or if you use a differnt
+ * interrupt than INT0, you may have to define some of these.
+ */
+/* #define USB_INTR_CFG            MCUCR */
+/* #define USB_INTR_CFG_SET        ((1 << ISC00) | (1 << ISC01)) */
+/* #define USB_INTR_CFG_CLR        0 */
+/* #define USB_INTR_ENABLE         GIMSK */
+/* #define USB_INTR_ENABLE_BIT     INT0 */
+/* #define USB_INTR_PENDING        GIFR */
+/* #define USB_INTR_PENDING_BIT    INTF0 */
+/* #define USB_INTR_VECTOR         INT0_vect */
+
+#endif /* __usbconfig_h_included__ */
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbconfig.h b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbconfig.h
new file mode 100644
index 00000000..f3681acb
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbconfig.h
@@ -0,0 +1,377 @@
+/* Name: usbconfig.h
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2005-04-01
+ * Tabsize: 4
+ * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * This Revision: $Id$
+ */
+
+#ifndef __usbconfig_h_included__
+#define __usbconfig_h_included__
+
+/*
+General Description:
+This file is an example configuration (with inline documentation) for the USB
+driver. It configures V-USB for USB D+ connected to Port D bit 2 (which is
+also hardware interrupt 0 on many devices) and USB D- to Port D bit 4. You may
+wire the lines to any other port, as long as D+ is also wired to INT0 (or any
+other hardware interrupt, as long as it is the highest level interrupt, see
+section at the end of this file).
++ To create your own usbconfig.h file, copy this file to your project's
++ firmware source directory) and rename it to "usbconfig.h".
++ Then edit it accordingly.
+*/
+
+/* ---------------------------- Hardware Config ---------------------------- */
+
+#define USB_CFG_IOPORTNAME      D
+/* This is the port where the USB bus is connected. When you configure it to
+ * "B", the registers PORTB, PINB and DDRB will be used.
+ */
+#define USB_CFG_DMINUS_BIT      3
+/* This is the bit number in USB_CFG_IOPORT where the USB D- line is connected.
+ * This may be any bit in the port.
+ */
+#define USB_CFG_DPLUS_BIT       2
+/* This is the bit number in USB_CFG_IOPORT where the USB D+ line is connected.
+ * This may be any bit in the port. Please note that D+ must also be connected
+ * to interrupt pin INT0! [You can also use other interrupts, see section
+ * "Optional MCU Description" below, or you can connect D- to the interrupt, as
+ * it is required if you use the USB_COUNT_SOF feature. If you use D- for the
+ * interrupt, the USB interrupt will also be triggered at Start-Of-Frame
+ * markers every millisecond.]
+ */
+#define USB_CFG_CLOCK_KHZ       12000
+/* Clock rate of the AVR in kHz. Legal values are 12000, 12800, 15000, 16000,
+ * 16500, 18000 and 20000. The 12.8 MHz and 16.5 MHz versions of the code
+ * require no crystal, they tolerate +/- 1% deviation from the nominal
+ * frequency. All other rates require a precision of 2000 ppm and thus a
+ * crystal!
+ * Since F_CPU should be defined to your actual clock rate anyway, you should
+ * not need to modify this setting.
+ */
+#define USB_CFG_CHECK_CRC       0
+/* Define this to 1 if you want that the driver checks integrity of incoming
+ * data packets (CRC checks). CRC checks cost quite a bit of code size and are
+ * currently only available for 18 MHz crystal clock. You must choose
+ * USB_CFG_CLOCK_KHZ = 18000 if you enable this option.
+ */
+
+/* ----------------------- Optional Hardware Config ------------------------ */
+
+/* #define USB_CFG_PULLUP_IOPORTNAME   D */
+/* If you connect the 1.5k pullup resistor from D- to a port pin instead of
+ * V+, you can connect and disconnect the device from firmware by calling
+ * the macros usbDeviceConnect() and usbDeviceDisconnect() (see usbdrv.h).
+ * This constant defines the port on which the pullup resistor is connected.
+ */
+/* #define USB_CFG_PULLUP_BIT          4 */
+/* This constant defines the bit number in USB_CFG_PULLUP_IOPORT (defined
+ * above) where the 1.5k pullup resistor is connected. See description
+ * above for details.
+ */
+
+/* --------------------------- Functional Range ---------------------------- */
+
+#define USB_CFG_HAVE_INTRIN_ENDPOINT    0
+/* Define this to 1 if you want to compile a version with two endpoints: The
+ * default control endpoint 0 and an interrupt-in endpoint (any other endpoint
+ * number).
+ */
+#define USB_CFG_HAVE_INTRIN_ENDPOINT3   0
+/* Define this to 1 if you want to compile a version with three endpoints: The
+ * default control endpoint 0, an interrupt-in endpoint 3 (or the number
+ * configured below) and a catch-all default interrupt-in endpoint as above.
+ * You must also define USB_CFG_HAVE_INTRIN_ENDPOINT to 1 for this feature.
+ */
+#define USB_CFG_EP3_NUMBER              3
+/* If the so-called endpoint 3 is used, it can now be configured to any other
+ * endpoint number (except 0) with this macro. Default if undefined is 3.
+ */
+/* #define USB_INITIAL_DATATOKEN           USBPID_DATA1 */
+/* The above macro defines the startup condition for data toggling on the
+ * interrupt/bulk endpoints 1 and 3. Defaults to USBPID_DATA1.
+ * Since the token is toggled BEFORE sending any data, the first packet is
+ * sent with the oposite value of this configuration!
+ */
+#define USB_CFG_IMPLEMENT_HALT          0
+/* Define this to 1 if you also want to implement the ENDPOINT_HALT feature
+ * for endpoint 1 (interrupt endpoint). Although you may not need this feature,
+ * it is required by the standard. We have made it a config option because it
+ * bloats the code considerably.
+ */
+#define USB_CFG_SUPPRESS_INTR_CODE      0
+/* Define this to 1 if you want to declare interrupt-in endpoints, but don't
+ * want to send any data over them. If this macro is defined to 1, functions
+ * usbSetInterrupt() and usbSetInterrupt3() are omitted. This is useful if
+ * you need the interrupt-in endpoints in order to comply to an interface
+ * (e.g. HID), but never want to send any data. This option saves a couple
+ * of bytes in flash memory and the transmit buffers in RAM.
+ */
+#define USB_CFG_INTR_POLL_INTERVAL      10
+/* If you compile a version with endpoint 1 (interrupt-in), this is the poll
+ * interval. The value is in milliseconds and must not be less than 10 ms for
+ * low speed devices.
+ */
+#define USB_CFG_IS_SELF_POWERED         0
+/* Define this to 1 if the device has its own power supply. Set it to 0 if the
+ * device is powered from the USB bus.
+ */
+#define USB_CFG_MAX_BUS_POWER           50
+/* Set this variable to the maximum USB bus power consumption of your device.
+ * The value is in milliamperes. [It will be divided by two since USB
+ * communicates power requirements in units of 2 mA.]
+ */
+#define USB_CFG_IMPLEMENT_FN_WRITE      1
+/* Set this to 1 if you want usbFunctionWrite() to be called for control-out
+ * transfers. Set it to 0 if you don't need it and want to save a couple of
+ * bytes.
+ */
+#define USB_CFG_IMPLEMENT_FN_READ       0
+/* Set this to 1 if you need to send control replies which are generated
+ * "on the fly" when usbFunctionRead() is called. If you only want to send
+ * data from a static buffer, set it to 0 and return the data from
+ * usbFunctionSetup(). This saves a couple of bytes.
+ */
+#define USB_CFG_IMPLEMENT_FN_WRITEOUT   0
+/* Define this to 1 if you want to use interrupt-out (or bulk out) endpoints.
+ * You must implement the function usbFunctionWriteOut() which receives all
+ * interrupt/bulk data sent to any endpoint other than 0. The endpoint number
+ * can be found in 'usbRxToken'.
+ */
+#define USB_CFG_HAVE_FLOWCONTROL        0
+/* Define this to 1 if you want flowcontrol over USB data. See the definition
+ * of the macros usbDisableAllRequests() and usbEnableAllRequests() in
+ * usbdrv.h.
+ */
+#define USB_CFG_DRIVER_FLASH_PAGE       0
+/* If the device has more than 64 kBytes of flash, define this to the 64 k page
+ * where the driver's constants (descriptors) are located. Or in other words:
+ * Define this to 1 for boot loaders on the ATMega128.
+ */
+#define USB_CFG_LONG_TRANSFERS          0
+/* Define this to 1 if you want to send/receive blocks of more than 254 bytes
+ * in a single control-in or control-out transfer. Note that the capability
+ * for long transfers increases the driver size.
+ */
+/* #define USB_RX_USER_HOOK(data, len)     if(usbRxToken == (uchar)USBPID_SETUP) blinkLED(); */
+/* This macro is a hook if you want to do unconventional things. If it is
+ * defined, it's inserted at the beginning of received message processing.
+ * If you eat the received message and don't want default processing to
+ * proceed, do a return after doing your things. One possible application
+ * (besides debugging) is to flash a status LED on each packet.
+ */
+/* #define USB_RESET_HOOK(resetStarts)     if(!resetStarts){hadUsbReset();} */
+/* This macro is a hook if you need to know when an USB RESET occurs. It has
+ * one parameter which distinguishes between the start of RESET state and its
+ * end.
+ */
+/* #define USB_SET_ADDRESS_HOOK()              hadAddressAssigned(); */
+/* This macro (if defined) is executed when a USB SET_ADDRESS request was
+ * received.
+ */
+#define USB_COUNT_SOF                   0
+/* define this macro to 1 if you need the global variable "usbSofCount" which
+ * counts SOF packets. This feature requires that the hardware interrupt is
+ * connected to D- instead of D+.
+ */
+/* #ifdef __ASSEMBLER__
+ * macro myAssemblerMacro
+ *     in      YL, TCNT0
+ *     sts     timer0Snapshot, YL
+ *     endm
+ * #endif
+ * #define USB_SOF_HOOK                    myAssemblerMacro
+ * This macro (if defined) is executed in the assembler module when a
+ * Start Of Frame condition is detected. It is recommended to define it to
+ * the name of an assembler macro which is defined here as well so that more
+ * than one assembler instruction can be used. The macro may use the register
+ * YL and modify SREG. If it lasts longer than a couple of cycles, USB messages
+ * immediately after an SOF pulse may be lost and must be retried by the host.
+ * What can you do with this hook? Since the SOF signal occurs exactly every
+ * 1 ms (unless the host is in sleep mode), you can use it to tune OSCCAL in
+ * designs running on the internal RC oscillator.
+ * Please note that Start Of Frame detection works only if D- is wired to the
+ * interrupt, not D+. THIS IS DIFFERENT THAN MOST EXAMPLES!
+ */
+#define USB_CFG_CHECK_DATA_TOGGLING     0
+/* define this macro to 1 if you want to filter out duplicate data packets
+ * sent by the host. Duplicates occur only as a consequence of communication
+ * errors, when the host does not receive an ACK. Please note that you need to
+ * implement the filtering yourself in usbFunctionWriteOut() and
+ * usbFunctionWrite(). Use the global usbCurrentDataToken and a static variable
+ * for each control- and out-endpoint to check for duplicate packets.
+ */
+#define USB_CFG_HAVE_MEASURE_FRAME_LENGTH   0
+/* define this macro to 1 if you want the function usbMeasureFrameLength()
+ * compiled in. This function can be used to calibrate the AVR's RC oscillator.
+ */
+#define USB_USE_FAST_CRC                0
+/* The assembler module has two implementations for the CRC algorithm. One is
+ * faster, the other is smaller. This CRC routine is only used for transmitted
+ * messages where timing is not critical. The faster routine needs 31 cycles
+ * per byte while the smaller one needs 61 to 69 cycles. The faster routine
+ * may be worth the 32 bytes bigger code size if you transmit lots of data and
+ * run the AVR close to its limit.
+ */
+
+/* -------------------------- Device Description --------------------------- */
+
+#define  USB_CFG_VENDOR_ID       0xc0, 0x16 /* = 0x16c0 = 5824 = voti.nl */
+/* USB vendor ID for the device, low byte first. If you have registered your
+ * own Vendor ID, define it here. Otherwise you may use one of obdev's free
+ * shared VID/PID pairs. Be sure to read USB-IDs-for-free.txt for rules!
+ * *** IMPORTANT NOTE ***
+ * This template uses obdev's shared VID/PID pair for Vendor Class devices
+ * with libusb: 0x16c0/0x5dc.  Use this VID/PID pair ONLY if you understand
+ * the implications!
+ */
+#define  USB_CFG_DEVICE_ID       0xdc, 0x05 /* = 0x05dc = 1500 */
+/* This is the ID of the product, low byte first. It is interpreted in the
+ * scope of the vendor ID. If you have registered your own VID with usb.org
+ * or if you have licensed a PID from somebody else, define it here. Otherwise
+ * you may use one of obdev's free shared VID/PID pairs. See the file
+ * USB-IDs-for-free.txt for details!
+ * *** IMPORTANT NOTE ***
+ * This template uses obdev's shared VID/PID pair for Vendor Class devices
+ * with libusb: 0x16c0/0x5dc.  Use this VID/PID pair ONLY if you understand
+ * the implications!
+ */
+#define USB_CFG_DEVICE_VERSION  0x00, 0x01
+/* Version number of the device: Minor number first, then major number.
+ */
+#define USB_CFG_VENDOR_NAME     'c', 'o', 'd', 'e', 'a', 'n', 'd', 'l', \
+								'i', 'f', 'e', '.', 'c', 'o', 'm'
+#define USB_CFG_VENDOR_NAME_LEN 15
+/* These two values define the vendor name returned by the USB device. The name
+ * must be given as a list of characters under single quotes. The characters
+ * are interpreted as Unicode (UTF-16) entities.
+ * If you don't want a vendor name string, undefine these macros.
+ * ALWAYS define a vendor name containing your Internet domain name if you use
+ * obdev's free shared VID/PID pair. See the file USB-IDs-for-free.txt for
+ * details.
+ */
+#define USB_CFG_DEVICE_NAME     'U', 'S', 'B', 'e', 'x', 'a', 'm', 'p', 'l', 'e'
+#define USB_CFG_DEVICE_NAME_LEN 10
+/* Same as above for the device name. If you don't want a device name, undefine
+ * the macros. See the file USB-IDs-for-free.txt before you assign a name if
+ * you use a shared VID/PID.
+ */
+/*#define USB_CFG_SERIAL_NUMBER   'N', 'o', 'n', 'e' */
+/*#define USB_CFG_SERIAL_NUMBER_LEN   0 */
+/* Same as above for the serial number. If you don't want a serial number,
+ * undefine the macros.
+ * It may be useful to provide the serial number through other means than at
+ * compile time. See the section about descriptor properties below for how
+ * to fine tune control over USB descriptors such as the string descriptor
+ * for the serial number.
+ */
+#define USB_CFG_DEVICE_CLASS        0xff    /* set to 0 if deferred to interface */
+#define USB_CFG_DEVICE_SUBCLASS     0
+/* See USB specification if you want to conform to an existing device class.
+ * Class 0xff is "vendor specific".
+ */
+#define USB_CFG_INTERFACE_CLASS     0   /* define class here if not at device level */
+#define USB_CFG_INTERFACE_SUBCLASS  0
+#define USB_CFG_INTERFACE_PROTOCOL  0
+/* See USB specification if you want to conform to an existing device class or
+ * protocol. The following classes must be set at interface level:
+ * HID class is 3, no subclass and protocol required (but may be useful!)
+ * CDC class is 2, use subclass 2 and protocol 1 for ACM
+ */
+/* #define USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH    42 */
+/* Define this to the length of the HID report descriptor, if you implement
+ * an HID device. Otherwise don't define it or define it to 0.
+ * If you use this define, you must add a PROGMEM character array named
+ * "usbHidReportDescriptor" to your code which contains the report descriptor.
+ * Don't forget to keep the array and this define in sync!
+ */
+
+/* #define USB_PUBLIC static */
+/* Use the define above if you #include usbdrv.c instead of linking against it.
+ * This technique saves a couple of bytes in flash memory.
+ */
+
+/* ------------------- Fine Control over USB Descriptors ------------------- */
+/* If you don't want to use the driver's default USB descriptors, you can
+ * provide our own. These can be provided as (1) fixed length static data in
+ * flash memory, (2) fixed length static data in RAM or (3) dynamically at
+ * runtime in the function usbFunctionDescriptor(). See usbdrv.h for more
+ * information about this function.
+ * Descriptor handling is configured through the descriptor's properties. If
+ * no properties are defined or if they are 0, the default descriptor is used.
+ * Possible properties are:
+ *   + USB_PROP_IS_DYNAMIC: The data for the descriptor should be fetched
+ *     at runtime via usbFunctionDescriptor(). If the usbMsgPtr mechanism is
+ *     used, the data is in FLASH by default. Add property USB_PROP_IS_RAM if
+ *     you want RAM pointers.
+ *   + USB_PROP_IS_RAM: The data returned by usbFunctionDescriptor() or found
+ *     in static memory is in RAM, not in flash memory.
+ *   + USB_PROP_LENGTH(len): If the data is in static memory (RAM or flash),
+ *     the driver must know the descriptor's length. The descriptor itself is
+ *     found at the address of a well known identifier (see below).
+ * List of static descriptor names (must be declared PROGMEM if in flash):
+ *   char usbDescriptorDevice[];
+ *   char usbDescriptorConfiguration[];
+ *   char usbDescriptorHidReport[];
+ *   char usbDescriptorString0[];
+ *   int usbDescriptorStringVendor[];
+ *   int usbDescriptorStringDevice[];
+ *   int usbDescriptorStringSerialNumber[];
+ * Other descriptors can't be provided statically, they must be provided
+ * dynamically at runtime.
+ *
+ * Descriptor properties are or-ed or added together, e.g.:
+ * #define USB_CFG_DESCR_PROPS_DEVICE   (USB_PROP_IS_RAM | USB_PROP_LENGTH(18))
+ *
+ * The following descriptors are defined:
+ *   USB_CFG_DESCR_PROPS_DEVICE
+ *   USB_CFG_DESCR_PROPS_CONFIGURATION
+ *   USB_CFG_DESCR_PROPS_STRINGS
+ *   USB_CFG_DESCR_PROPS_STRING_0
+ *   USB_CFG_DESCR_PROPS_STRING_VENDOR
+ *   USB_CFG_DESCR_PROPS_STRING_PRODUCT
+ *   USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER
+ *   USB_CFG_DESCR_PROPS_HID
+ *   USB_CFG_DESCR_PROPS_HID_REPORT
+ *   USB_CFG_DESCR_PROPS_UNKNOWN (for all descriptors not handled by the driver)
+ *
+ * Note about string descriptors: String descriptors are not just strings, they
+ * are Unicode strings prefixed with a 2 byte header. Example:
+ * int  serialNumberDescriptor[] = {
+ *     USB_STRING_DESCRIPTOR_HEADER(6),
+ *     'S', 'e', 'r', 'i', 'a', 'l'
+ * };
+ */
+
+#define USB_CFG_DESCR_PROPS_DEVICE                  0
+#define USB_CFG_DESCR_PROPS_CONFIGURATION           0
+#define USB_CFG_DESCR_PROPS_STRINGS                 0
+#define USB_CFG_DESCR_PROPS_STRING_0                0
+#define USB_CFG_DESCR_PROPS_STRING_VENDOR           0
+#define USB_CFG_DESCR_PROPS_STRING_PRODUCT          0
+#define USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER    0
+#define USB_CFG_DESCR_PROPS_HID                     0
+#define USB_CFG_DESCR_PROPS_HID_REPORT              0
+#define USB_CFG_DESCR_PROPS_UNKNOWN                 0
+
+/* ----------------------- Optional MCU Description ------------------------ */
+
+/* The following configurations have working defaults in usbdrv.h. You
+ * usually don't need to set them explicitly. Only if you want to run
+ * the driver on a device which is not yet supported or with a compiler
+ * which is not fully supported (such as IAR C) or if you use a differnt
+ * interrupt than INT0, you may have to define some of these.
+ */
+/* #define USB_INTR_CFG            MCUCR */
+/* #define USB_INTR_CFG_SET        ((1 << ISC00) | (1 << ISC01)) */
+/* #define USB_INTR_CFG_CLR        0 */
+/* #define USB_INTR_ENABLE         GIMSK */
+/* #define USB_INTR_ENABLE_BIT     INT0 */
+/* #define USB_INTR_PENDING        GIFR */
+/* #define USB_INTR_PENDING_BIT    INTF0 */
+/* #define USB_INTR_VECTOR         INT0_vect */
+
+#endif /* __usbconfig_h_included__ */
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrv.c b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrv.c
new file mode 100644
index 00000000..55944075
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrv.c
@@ -0,0 +1,628 @@
+/* Name: usbdrv.c
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2004-12-29
+ * Tabsize: 4
+ * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * This Revision: $Id$
+ */
+
+#include "usbportability.h"
+#include "usbdrv.h"
+#include "oddebug.h"
+
+/*
+General Description:
+This module implements the C-part of the USB driver. See usbdrv.h for a
+documentation of the entire driver.
+*/
+
+/* ------------------------------------------------------------------------- */
+
+/* raw USB registers / interface to assembler code: */
+uchar usbRxBuf[2*USB_BUFSIZE];  /* raw RX buffer: PID, 8 bytes data, 2 bytes CRC */
+uchar       usbInputBufOffset;  /* offset in usbRxBuf used for low level receiving */
+uchar       usbDeviceAddr;      /* assigned during enumeration, defaults to 0 */
+uchar       usbNewDeviceAddr;   /* device ID which should be set after status phase */
+uchar       usbConfiguration;   /* currently selected configuration. Administered by driver, but not used */
+volatile schar usbRxLen;        /* = 0; number of bytes in usbRxBuf; 0 means free, -1 for flow control */
+uchar       usbCurrentTok;      /* last token received or endpoint number for last OUT token if != 0 */
+uchar       usbRxToken;         /* token for data we received; or endpont number for last OUT */
+volatile uchar usbTxLen = USBPID_NAK;   /* number of bytes to transmit with next IN token or handshake token */
+uchar       usbTxBuf[USB_BUFSIZE];/* data to transmit with next IN, free if usbTxLen contains handshake token */
+#if USB_COUNT_SOF
+volatile uchar  usbSofCount;    /* incremented by assembler module every SOF */
+#endif
+#if USB_CFG_HAVE_INTRIN_ENDPOINT && !USB_CFG_SUPPRESS_INTR_CODE
+usbTxStatus_t  usbTxStatus1;
+#   if USB_CFG_HAVE_INTRIN_ENDPOINT3
+usbTxStatus_t  usbTxStatus3;
+#   endif
+#endif
+#if USB_CFG_CHECK_DATA_TOGGLING
+uchar       usbCurrentDataToken;/* when we check data toggling to ignore duplicate packets */
+#endif
+
+/* USB status registers / not shared with asm code */
+uchar               *usbMsgPtr;     /* data to transmit next -- ROM or RAM address */
+static usbMsgLen_t  usbMsgLen = USB_NO_MSG; /* remaining number of bytes */
+static uchar        usbMsgFlags;    /* flag values see below */
+
+#define USB_FLG_MSGPTR_IS_ROM   (1<<6)
+#define USB_FLG_USE_USER_RW     (1<<7)
+
+/*
+optimizing hints:
+- do not post/pre inc/dec integer values in operations
+- assign value of USB_READ_FLASH() to register variables and don't use side effects in arg
+- use narrow scope for variables which should be in X/Y/Z register
+- assign char sized expressions to variables to force 8 bit arithmetics
+*/
+
+/* -------------------------- String Descriptors --------------------------- */
+
+#if USB_CFG_DESCR_PROPS_STRINGS == 0
+
+#if USB_CFG_DESCR_PROPS_STRING_0 == 0
+#undef USB_CFG_DESCR_PROPS_STRING_0
+#define USB_CFG_DESCR_PROPS_STRING_0    sizeof(usbDescriptorString0)
+PROGMEM const char usbDescriptorString0[] = { /* language descriptor */
+    4,          /* sizeof(usbDescriptorString0): length of descriptor in bytes */
+    3,          /* descriptor type */
+    0x09, 0x04, /* language index (0x0409 = US-English) */
+};
+#endif
+
+#if USB_CFG_DESCR_PROPS_STRING_VENDOR == 0 && USB_CFG_VENDOR_NAME_LEN
+#undef USB_CFG_DESCR_PROPS_STRING_VENDOR
+#define USB_CFG_DESCR_PROPS_STRING_VENDOR   sizeof(usbDescriptorStringVendor)
+PROGMEM const int  usbDescriptorStringVendor[] = {
+    USB_STRING_DESCRIPTOR_HEADER(USB_CFG_VENDOR_NAME_LEN),
+    USB_CFG_VENDOR_NAME
+};
+#endif
+
+#if USB_CFG_DESCR_PROPS_STRING_PRODUCT == 0 && USB_CFG_DEVICE_NAME_LEN
+#undef USB_CFG_DESCR_PROPS_STRING_PRODUCT
+#define USB_CFG_DESCR_PROPS_STRING_PRODUCT   sizeof(usbDescriptorStringDevice)
+PROGMEM const int  usbDescriptorStringDevice[] = {
+    USB_STRING_DESCRIPTOR_HEADER(USB_CFG_DEVICE_NAME_LEN),
+    USB_CFG_DEVICE_NAME
+};
+#endif
+
+#if USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER == 0 && USB_CFG_SERIAL_NUMBER_LEN
+#undef USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER
+#define USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER    sizeof(usbDescriptorStringSerialNumber)
+PROGMEM const int usbDescriptorStringSerialNumber[] = {
+    USB_STRING_DESCRIPTOR_HEADER(USB_CFG_SERIAL_NUMBER_LEN),
+    USB_CFG_SERIAL_NUMBER
+};
+#endif
+
+#endif  /* USB_CFG_DESCR_PROPS_STRINGS == 0 */
+
+/* --------------------------- Device Descriptor --------------------------- */
+
+#if USB_CFG_DESCR_PROPS_DEVICE == 0
+#undef USB_CFG_DESCR_PROPS_DEVICE
+#define USB_CFG_DESCR_PROPS_DEVICE  sizeof(usbDescriptorDevice)
+PROGMEM const char usbDescriptorDevice[] = {    /* USB device descriptor */
+    18,         /* sizeof(usbDescriptorDevice): length of descriptor in bytes */
+    USBDESCR_DEVICE,        /* descriptor type */
+    0x10, 0x01,             /* USB version supported */
+    USB_CFG_DEVICE_CLASS,
+    USB_CFG_DEVICE_SUBCLASS,
+    0,                      /* protocol */
+    8,                      /* max packet size */
+    /* the following two casts affect the first byte of the constant only, but
+     * that's sufficient to avoid a warning with the default values.
+     */
+    (char)USB_CFG_VENDOR_ID,/* 2 bytes */
+    (char)USB_CFG_DEVICE_ID,/* 2 bytes */
+    USB_CFG_DEVICE_VERSION, /* 2 bytes */
+    USB_CFG_DESCR_PROPS_STRING_VENDOR != 0 ? 1 : 0,         /* manufacturer string index */
+    USB_CFG_DESCR_PROPS_STRING_PRODUCT != 0 ? 2 : 0,        /* product string index */
+    USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER != 0 ? 3 : 0,  /* serial number string index */
+    1,          /* number of configurations */
+};
+#endif
+
+/* ----------------------- Configuration Descriptor ------------------------ */
+
+#if USB_CFG_DESCR_PROPS_HID_REPORT != 0 && USB_CFG_DESCR_PROPS_HID == 0
+#undef USB_CFG_DESCR_PROPS_HID
+#define USB_CFG_DESCR_PROPS_HID     9   /* length of HID descriptor in config descriptor below */
+#endif
+
+#if USB_CFG_DESCR_PROPS_CONFIGURATION == 0
+#undef USB_CFG_DESCR_PROPS_CONFIGURATION
+#define USB_CFG_DESCR_PROPS_CONFIGURATION   sizeof(usbDescriptorConfiguration)
+PROGMEM const char usbDescriptorConfiguration[] = {    /* USB configuration descriptor */
+    9,          /* sizeof(usbDescriptorConfiguration): length of descriptor in bytes */
+    USBDESCR_CONFIG,    /* descriptor type */
+    18 + 7 * USB_CFG_HAVE_INTRIN_ENDPOINT + 7 * USB_CFG_HAVE_INTRIN_ENDPOINT3 +
+                (USB_CFG_DESCR_PROPS_HID & 0xff), 0,
+                /* total length of data returned (including inlined descriptors) */
+    1,          /* number of interfaces in this configuration */
+    1,          /* index of this configuration */
+    0,          /* configuration name string index */
+#if USB_CFG_IS_SELF_POWERED
+    (1 << 7) | USBATTR_SELFPOWER,       /* attributes */
+#else
+    (1 << 7),                           /* attributes */
+#endif
+    USB_CFG_MAX_BUS_POWER/2,            /* max USB current in 2mA units */
+/* interface descriptor follows inline: */
+    9,          /* sizeof(usbDescrInterface): length of descriptor in bytes */
+    USBDESCR_INTERFACE, /* descriptor type */
+    0,          /* index of this interface */
+    0,          /* alternate setting for this interface */
+    USB_CFG_HAVE_INTRIN_ENDPOINT + USB_CFG_HAVE_INTRIN_ENDPOINT3, /* endpoints excl 0: number of endpoint descriptors to follow */
+    USB_CFG_INTERFACE_CLASS,
+    USB_CFG_INTERFACE_SUBCLASS,
+    USB_CFG_INTERFACE_PROTOCOL,
+    0,          /* string index for interface */
+#if (USB_CFG_DESCR_PROPS_HID & 0xff)    /* HID descriptor */
+    9,          /* sizeof(usbDescrHID): length of descriptor in bytes */
+    USBDESCR_HID,   /* descriptor type: HID */
+    0x01, 0x01, /* BCD representation of HID version */
+    0x00,       /* target country code */
+    0x01,       /* number of HID Report (or other HID class) Descriptor infos to follow */
+    0x22,       /* descriptor type: report */
+    USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH, 0,  /* total length of report descriptor */
+#endif
+#if USB_CFG_HAVE_INTRIN_ENDPOINT    /* endpoint descriptor for endpoint 1 */
+    7,          /* sizeof(usbDescrEndpoint) */
+    USBDESCR_ENDPOINT,  /* descriptor type = endpoint */
+    (char)0x81, /* IN endpoint number 1 */
+    0x03,       /* attrib: Interrupt endpoint */
+    8, 0,       /* maximum packet size */
+    USB_CFG_INTR_POLL_INTERVAL, /* in ms */
+#endif
+#if USB_CFG_HAVE_INTRIN_ENDPOINT3   /* endpoint descriptor for endpoint 3 */
+    7,          /* sizeof(usbDescrEndpoint) */
+    USBDESCR_ENDPOINT,  /* descriptor type = endpoint */
+    (char)(0x80 | USB_CFG_EP3_NUMBER), /* IN endpoint number 3 */
+    0x03,       /* attrib: Interrupt endpoint */
+    8, 0,       /* maximum packet size */
+    USB_CFG_INTR_POLL_INTERVAL, /* in ms */
+#endif
+};
+#endif
+
+/* ------------------------------------------------------------------------- */
+
+static inline void  usbResetDataToggling(void)
+{
+#if USB_CFG_HAVE_INTRIN_ENDPOINT && !USB_CFG_SUPPRESS_INTR_CODE
+    USB_SET_DATATOKEN1(USB_INITIAL_DATATOKEN);  /* reset data toggling for interrupt endpoint */
+#   if USB_CFG_HAVE_INTRIN_ENDPOINT3
+    USB_SET_DATATOKEN3(USB_INITIAL_DATATOKEN);  /* reset data toggling for interrupt endpoint */
+#   endif
+#endif
+}
+
+static inline void  usbResetStall(void)
+{
+#if USB_CFG_IMPLEMENT_HALT && USB_CFG_HAVE_INTRIN_ENDPOINT
+        usbTxLen1 = USBPID_NAK;
+#if USB_CFG_HAVE_INTRIN_ENDPOINT3
+        usbTxLen3 = USBPID_NAK;
+#endif
+#endif
+}
+
+/* ------------------------------------------------------------------------- */
+
+#if !USB_CFG_SUPPRESS_INTR_CODE
+#if USB_CFG_HAVE_INTRIN_ENDPOINT
+static void usbGenericSetInterrupt(uchar *data, uchar len, usbTxStatus_t *txStatus)
+{
+uchar   *p;
+char    i;
+
+#if USB_CFG_IMPLEMENT_HALT
+    if(usbTxLen1 == USBPID_STALL)
+        return;
+#endif
+    if(txStatus->len & 0x10){   /* packet buffer was empty */
+        txStatus->buffer[0] ^= USBPID_DATA0 ^ USBPID_DATA1; /* toggle token */
+    }else{
+        txStatus->len = USBPID_NAK; /* avoid sending outdated (overwritten) interrupt data */
+    }
+    p = txStatus->buffer + 1;
+    i = len;
+    do{                         /* if len == 0, we still copy 1 byte, but that's no problem */
+        *p++ = *data++;
+    }while(--i > 0);            /* loop control at the end is 2 bytes shorter than at beginning */
+    usbCrc16Append(&txStatus->buffer[1], len);
+    txStatus->len = len + 4;    /* len must be given including sync byte */
+    DBG2(0x21 + (((int)txStatus >> 3) & 3), txStatus->buffer, len + 3);
+}
+
+USB_PUBLIC void usbSetInterrupt(uchar *data, uchar len)
+{
+    usbGenericSetInterrupt(data, len, &usbTxStatus1);
+}
+#endif
+
+#if USB_CFG_HAVE_INTRIN_ENDPOINT3
+USB_PUBLIC void usbSetInterrupt3(uchar *data, uchar len)
+{
+    usbGenericSetInterrupt(data, len, &usbTxStatus3);
+}
+#endif
+#endif /* USB_CFG_SUPPRESS_INTR_CODE */
+
+/* ------------------ utilities for code following below ------------------- */
+
+/* Use defines for the switch statement so that we can choose between an
+ * if()else if() and a switch/case based implementation. switch() is more
+ * efficient for a LARGE set of sequential choices, if() is better in all other
+ * cases.
+ */
+#if USB_CFG_USE_SWITCH_STATEMENT
+#   define SWITCH_START(cmd)       switch(cmd){{
+#   define SWITCH_CASE(value)      }break; case (value):{
+#   define SWITCH_CASE2(v1,v2)     }break; case (v1): case(v2):{
+#   define SWITCH_CASE3(v1,v2,v3)  }break; case (v1): case(v2): case(v3):{
+#   define SWITCH_DEFAULT          }break; default:{
+#   define SWITCH_END              }}
+#else
+#   define SWITCH_START(cmd)       {uchar _cmd = cmd; if(0){
+#   define SWITCH_CASE(value)      }else if(_cmd == (value)){
+#   define SWITCH_CASE2(v1,v2)     }else if(_cmd == (v1) || _cmd == (v2)){
+#   define SWITCH_CASE3(v1,v2,v3)  }else if(_cmd == (v1) || _cmd == (v2) || (_cmd == v3)){
+#   define SWITCH_DEFAULT          }else{
+#   define SWITCH_END              }}
+#endif
+
+#ifndef USB_RX_USER_HOOK
+#define USB_RX_USER_HOOK(data, len)
+#endif
+#ifndef USB_SET_ADDRESS_HOOK
+#define USB_SET_ADDRESS_HOOK()
+#endif
+
+/* ------------------------------------------------------------------------- */
+
+/* We use if() instead of #if in the macro below because #if can't be used
+ * in macros and the compiler optimizes constant conditions anyway.
+ * This may cause problems with undefined symbols if compiled without
+ * optimizing!
+ */
+#define GET_DESCRIPTOR(cfgProp, staticName)         \
+    if(cfgProp){                                    \
+        if((cfgProp) & USB_PROP_IS_RAM)             \
+            flags = 0;                              \
+        if((cfgProp) & USB_PROP_IS_DYNAMIC){        \
+            len = usbFunctionDescriptor(rq);        \
+        }else{                                      \
+            len = USB_PROP_LENGTH(cfgProp);         \
+            usbMsgPtr = (uchar *)(staticName);      \
+        }                                           \
+    }
+
+/* usbDriverDescriptor() is similar to usbFunctionDescriptor(), but used
+ * internally for all types of descriptors.
+ */
+static inline usbMsgLen_t usbDriverDescriptor(usbRequest_t *rq)
+{
+usbMsgLen_t len = 0;
+uchar       flags = USB_FLG_MSGPTR_IS_ROM;
+
+    SWITCH_START(rq->wValue.bytes[1])
+    SWITCH_CASE(USBDESCR_DEVICE)    /* 1 */
+        GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_DEVICE, usbDescriptorDevice)
+    SWITCH_CASE(USBDESCR_CONFIG)    /* 2 */
+        GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_CONFIGURATION, usbDescriptorConfiguration)
+    SWITCH_CASE(USBDESCR_STRING)    /* 3 */
+#if USB_CFG_DESCR_PROPS_STRINGS & USB_PROP_IS_DYNAMIC
+        if(USB_CFG_DESCR_PROPS_STRINGS & USB_PROP_IS_RAM)
+            flags = 0;
+        len = usbFunctionDescriptor(rq);
+#else   /* USB_CFG_DESCR_PROPS_STRINGS & USB_PROP_IS_DYNAMIC */
+        SWITCH_START(rq->wValue.bytes[0])
+        SWITCH_CASE(0)
+            GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_STRING_0, usbDescriptorString0)
+        SWITCH_CASE(1)
+            GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_STRING_VENDOR, usbDescriptorStringVendor)
+        SWITCH_CASE(2)
+            GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_STRING_PRODUCT, usbDescriptorStringDevice)
+        SWITCH_CASE(3)
+            GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER, usbDescriptorStringSerialNumber)
+        SWITCH_DEFAULT
+            if(USB_CFG_DESCR_PROPS_UNKNOWN & USB_PROP_IS_DYNAMIC){
+                len = usbFunctionDescriptor(rq);
+            }
+        SWITCH_END
+#endif  /* USB_CFG_DESCR_PROPS_STRINGS & USB_PROP_IS_DYNAMIC */
+#if USB_CFG_DESCR_PROPS_HID_REPORT  /* only support HID descriptors if enabled */
+    SWITCH_CASE(USBDESCR_HID)       /* 0x21 */
+        GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_HID, usbDescriptorConfiguration + 18)
+    SWITCH_CASE(USBDESCR_HID_REPORT)/* 0x22 */
+        GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_HID_REPORT, usbDescriptorHidReport)
+#endif
+    SWITCH_DEFAULT
+        if(USB_CFG_DESCR_PROPS_UNKNOWN & USB_PROP_IS_DYNAMIC){
+            len = usbFunctionDescriptor(rq);
+        }
+    SWITCH_END
+    usbMsgFlags = flags;
+    return len;
+}
+
+/* ------------------------------------------------------------------------- */
+
+/* usbDriverSetup() is similar to usbFunctionSetup(), but it's used for
+ * standard requests instead of class and custom requests.
+ */
+static inline usbMsgLen_t usbDriverSetup(usbRequest_t *rq)
+{
+usbMsgLen_t len = 0;
+uchar   *dataPtr = usbTxBuf + 9;    /* there are 2 bytes free space at the end of the buffer */
+uchar   value = rq->wValue.bytes[0];
+#if USB_CFG_IMPLEMENT_HALT
+uchar   index = rq->wIndex.bytes[0];
+#endif
+
+    dataPtr[0] = 0; /* default reply common to USBRQ_GET_STATUS and USBRQ_GET_INTERFACE */
+    SWITCH_START(rq->bRequest)
+    SWITCH_CASE(USBRQ_GET_STATUS)           /* 0 */
+        uchar recipient = rq->bmRequestType & USBRQ_RCPT_MASK;  /* assign arith ops to variables to enforce byte size */
+        if(USB_CFG_IS_SELF_POWERED && recipient == USBRQ_RCPT_DEVICE)
+            dataPtr[0] =  USB_CFG_IS_SELF_POWERED;
+#if USB_CFG_IMPLEMENT_HALT
+        if(recipient == USBRQ_RCPT_ENDPOINT && index == 0x81)   /* request status for endpoint 1 */
+            dataPtr[0] = usbTxLen1 == USBPID_STALL;
+#endif
+        dataPtr[1] = 0;
+        len = 2;
+#if USB_CFG_IMPLEMENT_HALT
+    SWITCH_CASE2(USBRQ_CLEAR_FEATURE, USBRQ_SET_FEATURE)    /* 1, 3 */
+        if(value == 0 && index == 0x81){    /* feature 0 == HALT for endpoint == 1 */
+            usbTxLen1 = rq->bRequest == USBRQ_CLEAR_FEATURE ? USBPID_NAK : USBPID_STALL;
+            usbResetDataToggling();
+        }
+#endif
+    SWITCH_CASE(USBRQ_SET_ADDRESS)          /* 5 */
+        usbNewDeviceAddr = value;
+        USB_SET_ADDRESS_HOOK();
+    SWITCH_CASE(USBRQ_GET_DESCRIPTOR)       /* 6 */
+        len = usbDriverDescriptor(rq);
+        goto skipMsgPtrAssignment;
+    SWITCH_CASE(USBRQ_GET_CONFIGURATION)    /* 8 */
+        dataPtr = &usbConfiguration;  /* send current configuration value */
+        len = 1;
+    SWITCH_CASE(USBRQ_SET_CONFIGURATION)    /* 9 */
+        usbConfiguration = value;
+        usbResetStall();
+    SWITCH_CASE(USBRQ_GET_INTERFACE)        /* 10 */
+        len = 1;
+#if USB_CFG_HAVE_INTRIN_ENDPOINT && !USB_CFG_SUPPRESS_INTR_CODE
+    SWITCH_CASE(USBRQ_SET_INTERFACE)        /* 11 */
+        usbResetDataToggling();
+        usbResetStall();
+#endif
+    SWITCH_DEFAULT                          /* 7=SET_DESCRIPTOR, 12=SYNC_FRAME */
+        /* Should we add an optional hook here? */
+    SWITCH_END
+    usbMsgPtr = dataPtr;
+skipMsgPtrAssignment:
+    return len;
+}
+
+/* ------------------------------------------------------------------------- */
+
+/* usbProcessRx() is called for every message received by the interrupt
+ * routine. It distinguishes between SETUP and DATA packets and processes
+ * them accordingly.
+ */
+static inline void usbProcessRx(uchar *data, uchar len)
+{
+usbRequest_t    *rq = (void *)data;
+
+/* usbRxToken can be:
+ * 0x2d 00101101 (USBPID_SETUP for setup data)
+ * 0xe1 11100001 (USBPID_OUT: data phase of setup transfer)
+ * 0...0x0f for OUT on endpoint X
+ */
+    DBG2(0x10 + (usbRxToken & 0xf), data, len + 2); /* SETUP=1d, SETUP-DATA=11, OUTx=1x */
+    USB_RX_USER_HOOK(data, len)
+#if USB_CFG_IMPLEMENT_FN_WRITEOUT
+    if(usbRxToken < 0x10){  /* OUT to endpoint != 0: endpoint number in usbRxToken */
+        usbFunctionWriteOut(data, len);
+        return;
+    }
+#endif
+    if(usbRxToken == (uchar)USBPID_SETUP){
+        if(len != 8)    /* Setup size must be always 8 bytes. Ignore otherwise. */
+            return;
+        usbMsgLen_t replyLen;
+        usbTxBuf[0] = USBPID_DATA0;         /* initialize data toggling */
+        usbTxLen = USBPID_NAK;              /* abort pending transmit */
+        usbMsgFlags = 0;
+        uchar type = rq->bmRequestType & USBRQ_TYPE_MASK;
+        if(type != USBRQ_TYPE_STANDARD){    /* standard requests are handled by driver */
+            replyLen = usbFunctionSetup(data);
+        }else{
+            replyLen = usbDriverSetup(rq);
+        }
+#if USB_CFG_IMPLEMENT_FN_READ || USB_CFG_IMPLEMENT_FN_WRITE
+        if(replyLen == USB_NO_MSG){         /* use user-supplied read/write function */
+            /* do some conditioning on replyLen, but on IN transfers only */
+            if((rq->bmRequestType & USBRQ_DIR_MASK) != USBRQ_DIR_HOST_TO_DEVICE){
+                if(sizeof(replyLen) < sizeof(rq->wLength.word)){ /* help compiler with optimizing */
+                    replyLen = rq->wLength.bytes[0];
+                }else{
+                    replyLen = rq->wLength.word;
+                }
+            }
+            usbMsgFlags = USB_FLG_USE_USER_RW;
+        }else   /* The 'else' prevents that we limit a replyLen of USB_NO_MSG to the maximum transfer len. */
+#endif
+        if(sizeof(replyLen) < sizeof(rq->wLength.word)){ /* help compiler with optimizing */
+            if(!rq->wLength.bytes[1] && replyLen > rq->wLength.bytes[0])    /* limit length to max */
+                replyLen = rq->wLength.bytes[0];
+        }else{
+            if(replyLen > rq->wLength.word)     /* limit length to max */
+                replyLen = rq->wLength.word;
+        }
+        usbMsgLen = replyLen;
+    }else{  /* usbRxToken must be USBPID_OUT, which means data phase of setup (control-out) */
+#if USB_CFG_IMPLEMENT_FN_WRITE
+        if(usbMsgFlags & USB_FLG_USE_USER_RW){
+            uchar rval = usbFunctionWrite(data, len);
+            if(rval == 0xff){   /* an error occurred */
+                usbTxLen = USBPID_STALL;
+            }else if(rval != 0){    /* This was the final package */
+                usbMsgLen = 0;  /* answer with a zero-sized data packet */
+            }
+        }
+#endif
+    }
+}
+
+/* ------------------------------------------------------------------------- */
+
+/* This function is similar to usbFunctionRead(), but it's also called for
+ * data handled automatically by the driver (e.g. descriptor reads).
+ */
+static uchar usbDeviceRead(uchar *data, uchar len)
+{
+    if(len > 0){    /* don't bother app with 0 sized reads */
+#if USB_CFG_IMPLEMENT_FN_READ
+        if(usbMsgFlags & USB_FLG_USE_USER_RW){
+            len = usbFunctionRead(data, len);
+        }else
+#endif
+        {
+            uchar i = len, *r = usbMsgPtr;
+            if(usbMsgFlags & USB_FLG_MSGPTR_IS_ROM){    /* ROM data */
+                do{
+                    uchar c = USB_READ_FLASH(r);    /* assign to char size variable to enforce byte ops */
+                    *data++ = c;
+                    r++;
+                }while(--i);
+            }else{  /* RAM data */
+                do{
+                    *data++ = *r++;
+                }while(--i);
+            }
+            usbMsgPtr = r;
+        }
+    }
+    return len;
+}
+
+/* ------------------------------------------------------------------------- */
+
+/* usbBuildTxBlock() is called when we have data to transmit and the
+ * interrupt routine's transmit buffer is empty.
+ */
+static inline void usbBuildTxBlock(void)
+{
+usbMsgLen_t wantLen;
+uchar       len;
+
+    wantLen = usbMsgLen;
+    if(wantLen > 8)
+        wantLen = 8;
+    usbMsgLen -= wantLen;
+    usbTxBuf[0] ^= USBPID_DATA0 ^ USBPID_DATA1; /* DATA toggling */
+    len = usbDeviceRead(usbTxBuf + 1, wantLen);
+    if(len <= 8){           /* valid data packet */
+        usbCrc16Append(&usbTxBuf[1], len);
+        len += 4;           /* length including sync byte */
+        if(len < 12)        /* a partial package identifies end of message */
+            usbMsgLen = USB_NO_MSG;
+    }else{
+        len = USBPID_STALL;   /* stall the endpoint */
+        usbMsgLen = USB_NO_MSG;
+    }
+    usbTxLen = len;
+    DBG2(0x20, usbTxBuf, len-1);
+}
+
+/* ------------------------------------------------------------------------- */
+
+static inline void usbHandleResetHook(uchar notResetState)
+{
+#ifdef USB_RESET_HOOK
+static uchar    wasReset;
+uchar           isReset = !notResetState;
+
+    if(wasReset != isReset){
+        USB_RESET_HOOK(isReset);
+        wasReset = isReset;
+    }
+#else
+    notResetState = notResetState;  // avoid compiler warning
+#endif
+}
+
+/* ------------------------------------------------------------------------- */
+
+USB_PUBLIC void usbPoll(void)
+{
+schar   len;
+uchar   i;
+
+    len = usbRxLen - 3;
+    if(len >= 0){
+/* We could check CRC16 here -- but ACK has already been sent anyway. If you
+ * need data integrity checks with this driver, check the CRC in your app
+ * code and report errors back to the host. Since the ACK was already sent,
+ * retries must be handled on application level.
+ * unsigned crc = usbCrc16(buffer + 1, usbRxLen - 3);
+ */
+        usbProcessRx(usbRxBuf + USB_BUFSIZE + 1 - usbInputBufOffset, len);
+#if USB_CFG_HAVE_FLOWCONTROL
+        if(usbRxLen > 0)    /* only mark as available if not inactivated */
+            usbRxLen = 0;
+#else
+        usbRxLen = 0;       /* mark rx buffer as available */
+#endif
+    }
+    if(usbTxLen & 0x10){    /* transmit system idle */
+        if(usbMsgLen != USB_NO_MSG){    /* transmit data pending? */
+            usbBuildTxBlock();
+        }
+    }
+    for(i = 20; i > 0; i--){
+        uchar usbLineStatus = USBIN & USBMASK;
+        if(usbLineStatus != 0)  /* SE0 has ended */
+            goto isNotReset;
+    }
+    /* RESET condition, called multiple times during reset */
+    usbNewDeviceAddr = 0;
+    usbDeviceAddr = 0;
+    usbResetStall();
+    DBG1(0xff, 0, 0);
+isNotReset:
+    usbHandleResetHook(i);
+}
+
+/* ------------------------------------------------------------------------- */
+
+USB_PUBLIC void usbInit(void)
+{
+#if USB_INTR_CFG_SET != 0
+    USB_INTR_CFG |= USB_INTR_CFG_SET;
+#endif
+#if USB_INTR_CFG_CLR != 0
+    USB_INTR_CFG &= ~(USB_INTR_CFG_CLR);
+#endif
+    USB_INTR_ENABLE |= (1 << USB_INTR_ENABLE_BIT);
+    usbResetDataToggling();
+#if USB_CFG_HAVE_INTRIN_ENDPOINT && !USB_CFG_SUPPRESS_INTR_CODE
+    usbTxLen1 = USBPID_NAK;
+#if USB_CFG_HAVE_INTRIN_ENDPOINT3
+    usbTxLen3 = USBPID_NAK;
+#endif
+#endif
+}
+
+/* ------------------------------------------------------------------------- */
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrv.h b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrv.h
new file mode 100644
index 00000000..cd0445cb
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrv.h
@@ -0,0 +1,736 @@
+/* Name: usbdrv.h
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2004-12-29
+ * Tabsize: 4
+ * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * This Revision: $Id$
+ */
+
+#ifndef __usbdrv_h_included__
+#define __usbdrv_h_included__
+#include "usbconfig.h"
+#include "usbportability.h"
+
+/*
+Hardware Prerequisites:
+=======================
+USB lines D+ and D- MUST be wired to the same I/O port. We recommend that D+
+triggers the interrupt (best achieved by using INT0 for D+), but it is also
+possible to trigger the interrupt from D-. If D- is used, interrupts are also
+triggered by SOF packets. D- requires a pull-up of 1.5k to +3.5V (and the
+device must be powered at 3.5V) to identify as low-speed USB device. A
+pull-down or pull-up of 1M SHOULD be connected from D+ to +3.5V to prevent
+interference when no USB master is connected. If you use Zener diodes to limit
+the voltage on D+ and D-, you MUST use a pull-down resistor, not a pull-up.
+We use D+ as interrupt source and not D- because it does not trigger on
+keep-alive and RESET states. If you want to count keep-alive events with
+USB_COUNT_SOF, you MUST use D- as an interrupt source.
+
+As a compile time option, the 1.5k pull-up resistor on D- can be made
+switchable to allow the device to disconnect at will. See the definition of
+usbDeviceConnect() and usbDeviceDisconnect() further down in this file.
+
+Please adapt the values in usbconfig.h according to your hardware!
+
+The device MUST be clocked at exactly 12 MHz, 15 MHz, 16 MHz or 20 MHz
+or at 12.8 MHz resp. 16.5 MHz +/- 1%. See usbconfig-prototype.h for details.
+
+
+Limitations:
+============
+Robustness with respect to communication errors:
+The driver assumes error-free communication. It DOES check for errors in
+the PID, but does NOT check bit stuffing errors, SE0 in middle of a byte,
+token CRC (5 bit) and data CRC (16 bit). CRC checks can not be performed due
+to timing constraints: We must start sending a reply within 7 bit times.
+Bit stuffing and misplaced SE0 would have to be checked in real-time, but CPU
+performance does not permit that. The driver does not check Data0/Data1
+toggling, but application software can implement the check.
+
+Input characteristics:
+Since no differential receiver circuit is used, electrical interference
+robustness may suffer. The driver samples only one of the data lines with
+an ordinary I/O pin's input characteristics. However, since this is only a
+low speed USB implementation and the specification allows for 8 times the
+bit rate over the same hardware, we should be on the safe side. Even the spec
+requires detection of asymmetric states at high bit rate for SE0 detection.
+
+Number of endpoints:
+The driver supports the following endpoints:
+
+- Endpoint 0, the default control endpoint.
+- Any number of interrupt- or bulk-out endpoints. The data is sent to
+  usbFunctionWriteOut() and USB_CFG_IMPLEMENT_FN_WRITEOUT must be defined
+  to 1 to activate this feature. The endpoint number can be found in the
+  global variable 'usbRxToken'.
+- One default interrupt- or bulk-in endpoint. This endpoint is used for
+  interrupt- or bulk-in transfers which are not handled by any other endpoint.
+  You must define USB_CFG_HAVE_INTRIN_ENDPOINT in order to activate this
+  feature and call usbSetInterrupt() to send interrupt/bulk data.
+- One additional interrupt- or bulk-in endpoint. This was endpoint 3 in
+  previous versions of this driver but can now be configured to any endpoint
+  number. You must define USB_CFG_HAVE_INTRIN_ENDPOINT3 in order to activate
+  this feature and call usbSetInterrupt3() to send interrupt/bulk data. The
+  endpoint number can be set with USB_CFG_EP3_NUMBER.
+
+Please note that the USB standard forbids bulk endpoints for low speed devices!
+Most operating systems allow them anyway, but the AVR will spend 90% of the CPU
+time in the USB interrupt polling for bulk data.
+
+Maximum data payload:
+Data payload of control in and out transfers may be up to 254 bytes. In order
+to accept payload data of out transfers, you need to implement
+'usbFunctionWrite()'.
+
+USB Suspend Mode supply current:
+The USB standard limits power consumption to 500uA when the bus is in suspend
+mode. This is not a problem for self-powered devices since they don't need
+bus power anyway. Bus-powered devices can achieve this only by putting the
+CPU in sleep mode. The driver does not implement suspend handling by itself.
+However, the application may implement activity monitoring and wakeup from
+sleep. The host sends regular SE0 states on the bus to keep it active. These
+SE0 states can be detected by using D- as the interrupt source. Define
+USB_COUNT_SOF to 1 and use the global variable usbSofCount to check for bus
+activity.
+
+Operation without an USB master:
+The driver behaves neutral without connection to an USB master if D- reads
+as 1. To avoid spurious interrupts, we recommend a high impedance (e.g. 1M)
+pull-down or pull-up resistor on D+ (interrupt). If Zener diodes are used,
+use a pull-down. If D- becomes statically 0, the driver may block in the
+interrupt routine.
+
+Interrupt latency:
+The application must ensure that the USB interrupt is not disabled for more
+than 25 cycles (this is for 12 MHz, faster clocks allow longer latency).
+This implies that all interrupt routines must either have the "ISR_NOBLOCK"
+attribute set (see "avr/interrupt.h") or be written in assembler with "sei"
+as the first instruction.
+
+Maximum interrupt duration / CPU cycle consumption:
+The driver handles all USB communication during the interrupt service
+routine. The routine will not return before an entire USB message is received
+and the reply is sent. This may be up to ca. 1200 cycles @ 12 MHz (= 100us) if
+the host conforms to the standard. The driver will consume CPU cycles for all
+USB messages, even if they address another (low-speed) device on the same bus.
+
+*/
+
+/* ------------------------------------------------------------------------- */
+/* --------------------------- Module Interface ---------------------------- */
+/* ------------------------------------------------------------------------- */
+
+#define USBDRV_VERSION  20120109
+/* This define uniquely identifies a driver version. It is a decimal number
+ * constructed from the driver's release date in the form YYYYMMDD. If the
+ * driver's behavior or interface changes, you can use this constant to
+ * distinguish versions. If it is not defined, the driver's release date is
+ * older than 2006-01-25.
+ */
+
+
+#ifndef USB_PUBLIC
+#define USB_PUBLIC
+#endif
+/* USB_PUBLIC is used as declaration attribute for all functions exported by
+ * the USB driver. The default is no attribute (see above). You may define it
+ * to static either in usbconfig.h or from the command line if you include
+ * usbdrv.c instead of linking against it. Including the C module of the driver
+ * directly in your code saves a couple of bytes in flash memory.
+ */
+
+#ifndef __ASSEMBLER__
+#ifndef uchar
+#define uchar   unsigned char
+#endif
+#ifndef schar
+#define schar   signed char
+#endif
+/* shortcuts for well defined 8 bit integer types */
+
+#if USB_CFG_LONG_TRANSFERS  /* if more than 254 bytes transfer size required */
+#   define usbMsgLen_t unsigned
+#else
+#   define usbMsgLen_t uchar
+#endif
+/* usbMsgLen_t is the data type used for transfer lengths. By default, it is
+ * defined to uchar, allowing a maximum of 254 bytes (255 is reserved for
+ * USB_NO_MSG below). If the usbconfig.h defines USB_CFG_LONG_TRANSFERS to 1,
+ * a 16 bit data type is used, allowing up to 16384 bytes (the rest is used
+ * for flags in the descriptor configuration).
+ */
+#define USB_NO_MSG  ((usbMsgLen_t)-1)   /* constant meaning "no message" */
+
+struct usbRequest;  /* forward declaration */
+
+USB_PUBLIC void usbInit(void);
+/* This function must be called before interrupts are enabled and the main
+ * loop is entered. We exepct that the PORT and DDR bits for D+ and D- have
+ * not been changed from their default status (which is 0). If you have changed
+ * them, set both back to 0 (configure them as input with no internal pull-up).
+ */
+USB_PUBLIC void usbPoll(void);
+/* This function must be called at regular intervals from the main loop.
+ * Maximum delay between calls is somewhat less than 50ms (USB timeout for
+ * accepting a Setup message). Otherwise the device will not be recognized.
+ * Please note that debug outputs through the UART take ~ 0.5ms per byte
+ * at 19200 bps.
+ */
+extern uchar *usbMsgPtr;
+/* This variable may be used to pass transmit data to the driver from the
+ * implementation of usbFunctionWrite(). It is also used internally by the
+ * driver for standard control requests.
+ */
+USB_PUBLIC usbMsgLen_t usbFunctionSetup(uchar data[8]);
+/* This function is called when the driver receives a SETUP transaction from
+ * the host which is not answered by the driver itself (in practice: class and
+ * vendor requests). All control transfers start with a SETUP transaction where
+ * the host communicates the parameters of the following (optional) data
+ * transfer. The SETUP data is available in the 'data' parameter which can
+ * (and should) be casted to 'usbRequest_t *' for a more user-friendly access
+ * to parameters.
+ *
+ * If the SETUP indicates a control-in transfer, you should provide the
+ * requested data to the driver. There are two ways to transfer this data:
+ * (1) Set the global pointer 'usbMsgPtr' to the base of the static RAM data
+ * block and return the length of the data in 'usbFunctionSetup()'. The driver
+ * will handle the rest. Or (2) return USB_NO_MSG in 'usbFunctionSetup()'. The
+ * driver will then call 'usbFunctionRead()' when data is needed. See the
+ * documentation for usbFunctionRead() for details.
+ *
+ * If the SETUP indicates a control-out transfer, the only way to receive the
+ * data from the host is through the 'usbFunctionWrite()' call. If you
+ * implement this function, you must return USB_NO_MSG in 'usbFunctionSetup()'
+ * to indicate that 'usbFunctionWrite()' should be used. See the documentation
+ * of this function for more information. If you just want to ignore the data
+ * sent by the host, return 0 in 'usbFunctionSetup()'.
+ *
+ * Note that calls to the functions usbFunctionRead() and usbFunctionWrite()
+ * are only done if enabled by the configuration in usbconfig.h.
+ */
+USB_PUBLIC usbMsgLen_t usbFunctionDescriptor(struct usbRequest *rq);
+/* You need to implement this function ONLY if you provide USB descriptors at
+ * runtime (which is an expert feature). It is very similar to
+ * usbFunctionSetup() above, but it is called only to request USB descriptor
+ * data. See the documentation of usbFunctionSetup() above for more info.
+ */
+#if USB_CFG_HAVE_INTRIN_ENDPOINT
+USB_PUBLIC void usbSetInterrupt(uchar *data, uchar len);
+/* This function sets the message which will be sent during the next interrupt
+ * IN transfer. The message is copied to an internal buffer and must not exceed
+ * a length of 8 bytes. The message may be 0 bytes long just to indicate the
+ * interrupt status to the host.
+ * If you need to transfer more bytes, use a control read after the interrupt.
+ */
+#define usbInterruptIsReady()   (usbTxLen1 & 0x10)
+/* This macro indicates whether the last interrupt message has already been
+ * sent. If you set a new interrupt message before the old was sent, the
+ * message already buffered will be lost.
+ */
+#if USB_CFG_HAVE_INTRIN_ENDPOINT3
+USB_PUBLIC void usbSetInterrupt3(uchar *data, uchar len);
+#define usbInterruptIsReady3()   (usbTxLen3 & 0x10)
+/* Same as above for endpoint 3 */
+#endif
+#endif /* USB_CFG_HAVE_INTRIN_ENDPOINT */
+#if USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH    /* simplified interface for backward compatibility */
+#define usbHidReportDescriptor  usbDescriptorHidReport
+/* should be declared as: PROGMEM char usbHidReportDescriptor[]; */
+/* If you implement an HID device, you need to provide a report descriptor.
+ * The HID report descriptor syntax is a bit complex. If you understand how
+ * report descriptors are constructed, we recommend that you use the HID
+ * Descriptor Tool from usb.org, see http://www.usb.org/developers/hidpage/.
+ * Otherwise you should probably start with a working example.
+ */
+#endif  /* USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH */
+#if USB_CFG_IMPLEMENT_FN_WRITE
+USB_PUBLIC uchar usbFunctionWrite(uchar *data, uchar len);
+/* This function is called by the driver to provide a control transfer's
+ * payload data (control-out). It is called in chunks of up to 8 bytes. The
+ * total count provided in the current control transfer can be obtained from
+ * the 'length' property in the setup data. If an error occurred during
+ * processing, return 0xff (== -1). The driver will answer the entire transfer
+ * with a STALL token in this case. If you have received the entire payload
+ * successfully, return 1. If you expect more data, return 0. If you don't
+ * know whether the host will send more data (you should know, the total is
+ * provided in the usbFunctionSetup() call!), return 1.
+ * NOTE: If you return 0xff for STALL, 'usbFunctionWrite()' may still be called
+ * for the remaining data. You must continue to return 0xff for STALL in these
+ * calls.
+ * In order to get usbFunctionWrite() called, define USB_CFG_IMPLEMENT_FN_WRITE
+ * to 1 in usbconfig.h and return 0xff in usbFunctionSetup()..
+ */
+#endif /* USB_CFG_IMPLEMENT_FN_WRITE */
+#if USB_CFG_IMPLEMENT_FN_READ
+USB_PUBLIC uchar usbFunctionRead(uchar *data, uchar len);
+/* This function is called by the driver to ask the application for a control
+ * transfer's payload data (control-in). It is called in chunks of up to 8
+ * bytes each. You should copy the data to the location given by 'data' and
+ * return the actual number of bytes copied. If you return less than requested,
+ * the control-in transfer is terminated. If you return 0xff, the driver aborts
+ * the transfer with a STALL token.
+ * In order to get usbFunctionRead() called, define USB_CFG_IMPLEMENT_FN_READ
+ * to 1 in usbconfig.h and return 0xff in usbFunctionSetup()..
+ */
+#endif /* USB_CFG_IMPLEMENT_FN_READ */
+
+extern uchar usbRxToken;    /* may be used in usbFunctionWriteOut() below */
+#if USB_CFG_IMPLEMENT_FN_WRITEOUT
+USB_PUBLIC void usbFunctionWriteOut(uchar *data, uchar len);
+/* This function is called by the driver when data is received on an interrupt-
+ * or bulk-out endpoint. The endpoint number can be found in the global
+ * variable usbRxToken. You must define USB_CFG_IMPLEMENT_FN_WRITEOUT to 1 in
+ * usbconfig.h to get this function called.
+ */
+#endif /* USB_CFG_IMPLEMENT_FN_WRITEOUT */
+#ifdef USB_CFG_PULLUP_IOPORTNAME
+#define usbDeviceConnect()      ((USB_PULLUP_DDR |= (1<<USB_CFG_PULLUP_BIT)), \
+                                  (USB_PULLUP_OUT |= (1<<USB_CFG_PULLUP_BIT)))
+#define usbDeviceDisconnect()   ((USB_PULLUP_DDR &= ~(1<<USB_CFG_PULLUP_BIT)), \
+                                  (USB_PULLUP_OUT &= ~(1<<USB_CFG_PULLUP_BIT)))
+#else /* USB_CFG_PULLUP_IOPORTNAME */
+#define usbDeviceConnect()      (USBDDR &= ~(1<<USBMINUS))
+#define usbDeviceDisconnect()   (USBDDR |= (1<<USBMINUS))
+#endif /* USB_CFG_PULLUP_IOPORTNAME */
+/* The macros usbDeviceConnect() and usbDeviceDisconnect() (intended to look
+ * like a function) connect resp. disconnect the device from the host's USB.
+ * If the constants USB_CFG_PULLUP_IOPORT and USB_CFG_PULLUP_BIT are defined
+ * in usbconfig.h, a disconnect consists of removing the pull-up resisitor
+ * from D-, otherwise the disconnect is done by brute-force pulling D- to GND.
+ * This does not conform to the spec, but it works.
+ * Please note that the USB interrupt must be disabled while the device is
+ * in disconnected state, or the interrupt handler will hang! You can either
+ * turn off the USB interrupt selectively with
+ *     USB_INTR_ENABLE &= ~(1 << USB_INTR_ENABLE_BIT)
+ * or use cli() to disable interrupts globally.
+ */
+extern unsigned usbCrc16(unsigned data, uchar len);
+#define usbCrc16(data, len) usbCrc16((unsigned)(data), len)
+/* This function calculates the binary complement of the data CRC used in
+ * USB data packets. The value is used to build raw transmit packets.
+ * You may want to use this function for data checksums or to verify received
+ * data. We enforce 16 bit calling conventions for compatibility with IAR's
+ * tiny memory model.
+ */
+extern unsigned usbCrc16Append(unsigned data, uchar len);
+#define usbCrc16Append(data, len)    usbCrc16Append((unsigned)(data), len)
+/* This function is equivalent to usbCrc16() above, except that it appends
+ * the 2 bytes CRC (lowbyte first) in the 'data' buffer after reading 'len'
+ * bytes.
+ */
+#if USB_CFG_HAVE_MEASURE_FRAME_LENGTH
+extern unsigned usbMeasureFrameLength(void);
+/* This function MUST be called IMMEDIATELY AFTER USB reset and measures 1/7 of
+ * the number of CPU cycles during one USB frame minus one low speed bit
+ * length. In other words: return value = 1499 * (F_CPU / 10.5 MHz)
+ * Since this is a busy wait, you MUST disable all interrupts with cli() before
+ * calling this function.
+ * This can be used to calibrate the AVR's RC oscillator.
+ */
+#endif
+extern uchar    usbConfiguration;
+/* This value contains the current configuration set by the host. The driver
+ * allows setting and querying of this variable with the USB SET_CONFIGURATION
+ * and GET_CONFIGURATION requests, but does not use it otherwise.
+ * You may want to reflect the "configured" status with a LED on the device or
+ * switch on high power parts of the circuit only if the device is configured.
+ */
+#if USB_COUNT_SOF
+extern volatile uchar   usbSofCount;
+/* This variable is incremented on every SOF packet. It is only available if
+ * the macro USB_COUNT_SOF is defined to a value != 0.
+ */
+#endif
+#if USB_CFG_CHECK_DATA_TOGGLING
+extern uchar    usbCurrentDataToken;
+/* This variable can be checked in usbFunctionWrite() and usbFunctionWriteOut()
+ * to ignore duplicate packets.
+ */
+#endif
+
+#define USB_STRING_DESCRIPTOR_HEADER(stringLength) ((2*(stringLength)+2) | (3<<8))
+/* This macro builds a descriptor header for a string descriptor given the
+ * string's length. See usbdrv.c for an example how to use it.
+ */
+#if USB_CFG_HAVE_FLOWCONTROL
+extern volatile schar   usbRxLen;
+#define usbDisableAllRequests()     usbRxLen = -1
+/* Must be called from usbFunctionWrite(). This macro disables all data input
+ * from the USB interface. Requests from the host are answered with a NAK
+ * while they are disabled.
+ */
+#define usbEnableAllRequests()      usbRxLen = 0
+/* May only be called if requests are disabled. This macro enables input from
+ * the USB interface after it has been disabled with usbDisableAllRequests().
+ */
+#define usbAllRequestsAreDisabled() (usbRxLen < 0)
+/* Use this macro to find out whether requests are disabled. It may be needed
+ * to ensure that usbEnableAllRequests() is never called when requests are
+ * enabled.
+ */
+#endif
+
+#define USB_SET_DATATOKEN1(token)   usbTxBuf1[0] = token
+#define USB_SET_DATATOKEN3(token)   usbTxBuf3[0] = token
+/* These two macros can be used by application software to reset data toggling
+ * for interrupt-in endpoints 1 and 3. Since the token is toggled BEFORE
+ * sending data, you must set the opposite value of the token which should come
+ * first.
+ */
+
+#endif  /* __ASSEMBLER__ */
+
+
+/* ------------------------------------------------------------------------- */
+/* ----------------- Definitions for Descriptor Properties ----------------- */
+/* ------------------------------------------------------------------------- */
+/* This is advanced stuff. See usbconfig-prototype.h for more information
+ * about the various methods to define USB descriptors. If you do nothing,
+ * the default descriptors will be used.
+ */
+#define USB_PROP_IS_DYNAMIC     (1 << 14)
+/* If this property is set for a descriptor, usbFunctionDescriptor() will be
+ * used to obtain the particular descriptor. Data directly returned via
+ * usbMsgPtr are FLASH data by default, combine (OR) with USB_PROP_IS_RAM to
+ * return RAM data.
+ */
+#define USB_PROP_IS_RAM         (1 << 15)
+/* If this property is set for a descriptor, the data is read from RAM
+ * memory instead of Flash. The property is used for all methods to provide
+ * external descriptors.
+ */
+#define USB_PROP_LENGTH(len)    ((len) & 0x3fff)
+/* If a static external descriptor is used, this is the total length of the
+ * descriptor in bytes.
+ */
+
+/* all descriptors which may have properties: */
+#ifndef USB_CFG_DESCR_PROPS_DEVICE
+#define USB_CFG_DESCR_PROPS_DEVICE                  0
+#endif
+#ifndef USB_CFG_DESCR_PROPS_CONFIGURATION
+#define USB_CFG_DESCR_PROPS_CONFIGURATION           0
+#endif
+#ifndef USB_CFG_DESCR_PROPS_STRINGS
+#define USB_CFG_DESCR_PROPS_STRINGS                 0
+#endif
+#ifndef USB_CFG_DESCR_PROPS_STRING_0
+#define USB_CFG_DESCR_PROPS_STRING_0                0
+#endif
+#ifndef USB_CFG_DESCR_PROPS_STRING_VENDOR
+#define USB_CFG_DESCR_PROPS_STRING_VENDOR           0
+#endif
+#ifndef USB_CFG_DESCR_PROPS_STRING_PRODUCT
+#define USB_CFG_DESCR_PROPS_STRING_PRODUCT          0
+#endif
+#ifndef USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER
+#define USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER    0
+#endif
+#ifndef USB_CFG_DESCR_PROPS_HID
+#define USB_CFG_DESCR_PROPS_HID                     0
+#endif
+#if !(USB_CFG_DESCR_PROPS_HID_REPORT)
+#   undef USB_CFG_DESCR_PROPS_HID_REPORT
+#   if USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH /* do some backward compatibility tricks */
+#       define USB_CFG_DESCR_PROPS_HID_REPORT       USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH
+#   else
+#       define USB_CFG_DESCR_PROPS_HID_REPORT       0
+#   endif
+#endif
+#ifndef USB_CFG_DESCR_PROPS_UNKNOWN
+#define USB_CFG_DESCR_PROPS_UNKNOWN                 0
+#endif
+
+/* ------------------ forward declaration of descriptors ------------------- */
+/* If you use external static descriptors, they must be stored in global
+ * arrays as declared below:
+ */
+#ifndef __ASSEMBLER__
+extern
+#if !(USB_CFG_DESCR_PROPS_DEVICE & USB_PROP_IS_RAM)
+PROGMEM
+#endif
+const char usbDescriptorDevice[];
+
+extern
+#if !(USB_CFG_DESCR_PROPS_CONFIGURATION & USB_PROP_IS_RAM)
+PROGMEM
+#endif
+const char usbDescriptorConfiguration[];
+
+extern
+#if !(USB_CFG_DESCR_PROPS_HID_REPORT & USB_PROP_IS_RAM)
+PROGMEM
+#endif
+const char usbDescriptorHidReport[];
+
+extern
+#if !(USB_CFG_DESCR_PROPS_STRING_0 & USB_PROP_IS_RAM)
+PROGMEM
+#endif
+const char usbDescriptorString0[];
+
+extern
+#if !(USB_CFG_DESCR_PROPS_STRING_VENDOR & USB_PROP_IS_RAM)
+PROGMEM
+#endif
+const int usbDescriptorStringVendor[];
+
+extern
+#if !(USB_CFG_DESCR_PROPS_STRING_PRODUCT & USB_PROP_IS_RAM)
+PROGMEM
+#endif
+const int usbDescriptorStringDevice[];
+
+extern
+#if !(USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER & USB_PROP_IS_RAM)
+PROGMEM
+#endif
+const int usbDescriptorStringSerialNumber[];
+
+#endif /* __ASSEMBLER__ */
+
+/* ------------------------------------------------------------------------- */
+/* ------------------------ General Purpose Macros ------------------------- */
+/* ------------------------------------------------------------------------- */
+
+#define USB_CONCAT(a, b)            a ## b
+#define USB_CONCAT_EXPANDED(a, b)   USB_CONCAT(a, b)
+
+#define USB_OUTPORT(name)           USB_CONCAT(PORT, name)
+#define USB_INPORT(name)            USB_CONCAT(PIN, name)
+#define USB_DDRPORT(name)           USB_CONCAT(DDR, name)
+/* The double-define trick above lets us concatenate strings which are
+ * defined by macros.
+ */
+
+/* ------------------------------------------------------------------------- */
+/* ------------------------- Constant definitions -------------------------- */
+/* ------------------------------------------------------------------------- */
+
+#if !defined __ASSEMBLER__ && (!defined USB_CFG_VENDOR_ID || !defined USB_CFG_DEVICE_ID)
+#warning "You should define USB_CFG_VENDOR_ID and USB_CFG_DEVICE_ID in usbconfig.h"
+/* If the user has not defined IDs, we default to obdev's free IDs.
+ * See USB-IDs-for-free.txt for details.
+ */
+#endif
+
+/* make sure we have a VID and PID defined, byte order is lowbyte, highbyte */
+#ifndef USB_CFG_VENDOR_ID
+#   define  USB_CFG_VENDOR_ID   0xc0, 0x16  /* = 0x16c0 = 5824 = voti.nl */
+#endif
+
+#ifndef USB_CFG_DEVICE_ID
+#   if USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH
+#       define USB_CFG_DEVICE_ID    0xdf, 0x05  /* = 0x5df = 1503, shared PID for HIDs */
+#   elif USB_CFG_INTERFACE_CLASS == 2
+#       define USB_CFG_DEVICE_ID    0xe1, 0x05  /* = 0x5e1 = 1505, shared PID for CDC Modems */
+#   else
+#       define USB_CFG_DEVICE_ID    0xdc, 0x05  /* = 0x5dc = 1500, obdev's free PID */
+#   endif
+#endif
+
+/* Derive Output, Input and DataDirection ports from port names */
+#ifndef USB_CFG_IOPORTNAME
+#error "You must define USB_CFG_IOPORTNAME in usbconfig.h, see usbconfig-prototype.h"
+#endif
+
+#define USBOUT          USB_OUTPORT(USB_CFG_IOPORTNAME)
+#define USB_PULLUP_OUT  USB_OUTPORT(USB_CFG_PULLUP_IOPORTNAME)
+#define USBIN           USB_INPORT(USB_CFG_IOPORTNAME)
+#define USBDDR          USB_DDRPORT(USB_CFG_IOPORTNAME)
+#define USB_PULLUP_DDR  USB_DDRPORT(USB_CFG_PULLUP_IOPORTNAME)
+
+#define USBMINUS    USB_CFG_DMINUS_BIT
+#define USBPLUS     USB_CFG_DPLUS_BIT
+#define USBIDLE     (1<<USB_CFG_DMINUS_BIT) /* value representing J state */
+#define USBMASK     ((1<<USB_CFG_DPLUS_BIT) | (1<<USB_CFG_DMINUS_BIT))  /* mask for USB I/O bits */
+
+/* defines for backward compatibility with older driver versions: */
+#define USB_CFG_IOPORT          USB_OUTPORT(USB_CFG_IOPORTNAME)
+#ifdef USB_CFG_PULLUP_IOPORTNAME
+#define USB_CFG_PULLUP_IOPORT   USB_OUTPORT(USB_CFG_PULLUP_IOPORTNAME)
+#endif
+
+#ifndef USB_CFG_EP3_NUMBER  /* if not defined in usbconfig.h */
+#define USB_CFG_EP3_NUMBER  3
+#endif
+
+#ifndef USB_CFG_HAVE_INTRIN_ENDPOINT3
+#define USB_CFG_HAVE_INTRIN_ENDPOINT3   0
+#endif
+
+#define USB_BUFSIZE     11  /* PID, 8 bytes data, 2 bytes CRC */
+
+/* ----- Try to find registers and bits responsible for ext interrupt 0 ----- */
+
+#ifndef USB_INTR_CFG    /* allow user to override our default */
+#   if defined  EICRA
+#       define USB_INTR_CFG EICRA
+#   else
+#       define USB_INTR_CFG MCUCR
+#   endif
+#endif
+#ifndef USB_INTR_CFG_SET    /* allow user to override our default */
+#   if defined(USB_COUNT_SOF) || defined(USB_SOF_HOOK)
+#       define USB_INTR_CFG_SET (1 << ISC01)                    /* cfg for falling edge */
+        /* If any SOF logic is used, the interrupt must be wired to D- where
+         * we better trigger on falling edge
+         */
+#   else
+#       define USB_INTR_CFG_SET ((1 << ISC00) | (1 << ISC01))   /* cfg for rising edge */
+#   endif
+#endif
+#ifndef USB_INTR_CFG_CLR    /* allow user to override our default */
+#   define USB_INTR_CFG_CLR 0    /* no bits to clear */
+#endif
+
+#ifndef USB_INTR_ENABLE     /* allow user to override our default */
+#   if defined GIMSK
+#       define USB_INTR_ENABLE  GIMSK
+#   elif defined EIMSK
+#       define USB_INTR_ENABLE  EIMSK
+#   else
+#       define USB_INTR_ENABLE  GICR
+#   endif
+#endif
+#ifndef USB_INTR_ENABLE_BIT /* allow user to override our default */
+#   define USB_INTR_ENABLE_BIT  INT0
+#endif
+
+#ifndef USB_INTR_PENDING    /* allow user to override our default */
+#   if defined  EIFR
+#       define USB_INTR_PENDING EIFR
+#   else
+#       define USB_INTR_PENDING GIFR
+#   endif
+#endif
+#ifndef USB_INTR_PENDING_BIT    /* allow user to override our default */
+#   define USB_INTR_PENDING_BIT INTF0
+#endif
+
+/*
+The defines above don't work for the following chips
+at90c8534: no ISC0?, no PORTB, can't find a data sheet
+at86rf401: no PORTB, no MCUCR etc, low clock rate
+atmega103: no ISC0? (maybe omission in header, can't find data sheet)
+atmega603: not defined in avr-libc
+at43usb320, at43usb355, at76c711: have USB anyway
+at94k: is different...
+
+at90s1200, attiny11, attiny12, attiny15, attiny28: these have no RAM
+*/
+
+/* ------------------------------------------------------------------------- */
+/* ----------------- USB Specification Constants and Types ----------------- */
+/* ------------------------------------------------------------------------- */
+
+/* USB Token values */
+#define USBPID_SETUP    0x2d
+#define USBPID_OUT      0xe1
+#define USBPID_IN       0x69
+#define USBPID_DATA0    0xc3
+#define USBPID_DATA1    0x4b
+
+#define USBPID_ACK      0xd2
+#define USBPID_NAK      0x5a
+#define USBPID_STALL    0x1e
+
+#ifndef USB_INITIAL_DATATOKEN
+#define USB_INITIAL_DATATOKEN   USBPID_DATA1
+#endif
+
+#ifndef __ASSEMBLER__
+
+typedef struct usbTxStatus{
+    volatile uchar   len;
+    uchar   buffer[USB_BUFSIZE];
+}usbTxStatus_t;
+
+extern usbTxStatus_t   usbTxStatus1, usbTxStatus3;
+#define usbTxLen1   usbTxStatus1.len
+#define usbTxBuf1   usbTxStatus1.buffer
+#define usbTxLen3   usbTxStatus3.len
+#define usbTxBuf3   usbTxStatus3.buffer
+
+
+typedef union usbWord{
+    unsigned    word;
+    uchar       bytes[2];
+}usbWord_t;
+
+typedef struct usbRequest{
+    uchar       bmRequestType;
+    uchar       bRequest;
+    usbWord_t   wValue;
+    usbWord_t   wIndex;
+    usbWord_t   wLength;
+}usbRequest_t;
+/* This structure matches the 8 byte setup request */
+#endif
+
+/* bmRequestType field in USB setup:
+ * d t t r r r r r, where
+ * d ..... direction: 0=host->device, 1=device->host
+ * t ..... type: 0=standard, 1=class, 2=vendor, 3=reserved
+ * r ..... recipient: 0=device, 1=interface, 2=endpoint, 3=other
+ */
+
+/* USB setup recipient values */
+#define USBRQ_RCPT_MASK         0x1f
+#define USBRQ_RCPT_DEVICE       0
+#define USBRQ_RCPT_INTERFACE    1
+#define USBRQ_RCPT_ENDPOINT     2
+
+/* USB request type values */
+#define USBRQ_TYPE_MASK         0x60
+#define USBRQ_TYPE_STANDARD     (0<<5)
+#define USBRQ_TYPE_CLASS        (1<<5)
+#define USBRQ_TYPE_VENDOR       (2<<5)
+
+/* USB direction values: */
+#define USBRQ_DIR_MASK              0x80
+#define USBRQ_DIR_HOST_TO_DEVICE    (0<<7)
+#define USBRQ_DIR_DEVICE_TO_HOST    (1<<7)
+
+/* USB Standard Requests */
+#define USBRQ_GET_STATUS        0
+#define USBRQ_CLEAR_FEATURE     1
+#define USBRQ_SET_FEATURE       3
+#define USBRQ_SET_ADDRESS       5
+#define USBRQ_GET_DESCRIPTOR    6
+#define USBRQ_SET_DESCRIPTOR    7
+#define USBRQ_GET_CONFIGURATION 8
+#define USBRQ_SET_CONFIGURATION 9
+#define USBRQ_GET_INTERFACE     10
+#define USBRQ_SET_INTERFACE     11
+#define USBRQ_SYNCH_FRAME       12
+
+/* USB descriptor constants */
+#define USBDESCR_DEVICE         1
+#define USBDESCR_CONFIG         2
+#define USBDESCR_STRING         3
+#define USBDESCR_INTERFACE      4
+#define USBDESCR_ENDPOINT       5
+#define USBDESCR_HID            0x21
+#define USBDESCR_HID_REPORT     0x22
+#define USBDESCR_HID_PHYS       0x23
+
+//#define USBATTR_BUSPOWER        0x80  // USB 1.1 does not define this value any more
+#define USBATTR_BUSPOWER        0
+#define USBATTR_SELFPOWER       0x40
+#define USBATTR_REMOTEWAKE      0x20
+
+/* USB HID Requests */
+#define USBRQ_HID_GET_REPORT    0x01
+#define USBRQ_HID_GET_IDLE      0x02
+#define USBRQ_HID_GET_PROTOCOL  0x03
+#define USBRQ_HID_SET_REPORT    0x09
+#define USBRQ_HID_SET_IDLE      0x0a
+#define USBRQ_HID_SET_PROTOCOL  0x0b
+
+/* ------------------------------------------------------------------------- */
+
+#endif /* __usbdrv_h_included__ */
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm.S b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm.S
new file mode 100644
index 00000000..4e6158ca
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm.S
@@ -0,0 +1,393 @@
+/* Name: usbdrvasm.S
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2007-06-13
+ * Tabsize: 4
+ * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * Revision: $Id$
+ */
+
+/*
+General Description:
+This module is the assembler part of the USB driver. This file contains
+general code (preprocessor acrobatics and CRC computation) and then includes
+the file appropriate for the given clock rate.
+*/
+
+#define __SFR_OFFSET 0      /* used by avr-libc's register definitions */
+#include "usbportability.h"
+#include "usbdrv.h"         /* for common defs */
+
+/* register names */
+#define x1      r16
+#define x2      r17
+#define shift   r18
+#define cnt     r19
+#define x3      r20
+#define x4      r21
+#define x5		r22
+#define bitcnt  x5
+#define phase   x4
+#define leap    x4
+
+/* Some assembler dependent definitions and declarations: */
+
+#ifdef __IAR_SYSTEMS_ASM__
+    extern  usbRxBuf, usbDeviceAddr, usbNewDeviceAddr, usbInputBufOffset
+    extern  usbCurrentTok, usbRxLen, usbRxToken, usbTxLen
+    extern  usbTxBuf, usbTxStatus1, usbTxStatus3
+#   if USB_COUNT_SOF
+        extern usbSofCount
+#   endif
+    public  usbCrc16
+    public  usbCrc16Append
+
+    COMMON  INTVEC
+#   ifndef USB_INTR_VECTOR
+        ORG     INT0_vect
+#   else /* USB_INTR_VECTOR */
+        ORG     USB_INTR_VECTOR
+#       undef   USB_INTR_VECTOR
+#   endif /* USB_INTR_VECTOR */
+#   define  USB_INTR_VECTOR usbInterruptHandler
+    rjmp    USB_INTR_VECTOR
+    RSEG    CODE
+
+#else /* __IAR_SYSTEMS_ASM__ */
+
+#   ifndef USB_INTR_VECTOR /* default to hardware interrupt INT0 */
+#       ifdef INT0_vect
+#           define USB_INTR_VECTOR  INT0_vect       // this is the "new" define for the vector
+#       else
+#           define USB_INTR_VECTOR  SIG_INTERRUPT0  // this is the "old" vector
+#       endif
+#   endif
+    .text
+    .global USB_INTR_VECTOR
+    .type   USB_INTR_VECTOR, @function
+    .global usbCrc16
+    .global usbCrc16Append
+#endif /* __IAR_SYSTEMS_ASM__ */
+
+
+#if USB_INTR_PENDING < 0x40 /* This is an I/O address, use in and out */
+#   define  USB_LOAD_PENDING(reg)   in reg, USB_INTR_PENDING
+#   define  USB_STORE_PENDING(reg)  out USB_INTR_PENDING, reg
+#else   /* It's a memory address, use lds and sts */
+#   define  USB_LOAD_PENDING(reg)   lds reg, USB_INTR_PENDING
+#   define  USB_STORE_PENDING(reg)  sts USB_INTR_PENDING, reg
+#endif
+
+#define usbTxLen1   usbTxStatus1
+#define usbTxBuf1   (usbTxStatus1 + 1)
+#define usbTxLen3   usbTxStatus3
+#define usbTxBuf3   (usbTxStatus3 + 1)
+
+
+;----------------------------------------------------------------------------
+; Utility functions
+;----------------------------------------------------------------------------
+
+#ifdef __IAR_SYSTEMS_ASM__
+/* Register assignments for usbCrc16 on IAR cc */
+/* Calling conventions on IAR:
+ * First parameter passed in r16/r17, second in r18/r19 and so on.
+ * Callee must preserve r4-r15, r24-r29 (r28/r29 is frame pointer)
+ * Result is passed in r16/r17
+ * In case of the "tiny" memory model, pointers are only 8 bit with no
+ * padding. We therefore pass argument 1 as "16 bit unsigned".
+ */
+RTMODEL "__rt_version", "3"
+/* The line above will generate an error if cc calling conventions change.
+ * The value "3" above is valid for IAR 4.10B/W32
+ */
+#   define argLen   r18 /* argument 2 */
+#   define argPtrL  r16 /* argument 1 */
+#   define argPtrH  r17 /* argument 1 */
+
+#   define resCrcL  r16 /* result */
+#   define resCrcH  r17 /* result */
+
+#   define ptrL     ZL
+#   define ptrH     ZH
+#   define ptr      Z
+#   define byte     r22
+#   define bitCnt   r19
+#   define polyL    r20
+#   define polyH    r21
+#   define scratch  r23
+
+#else  /* __IAR_SYSTEMS_ASM__ */ 
+/* Register assignments for usbCrc16 on gcc */
+/* Calling conventions on gcc:
+ * First parameter passed in r24/r25, second in r22/23 and so on.
+ * Callee must preserve r1-r17, r28/r29
+ * Result is passed in r24/r25
+ */
+#   define argLen   r22 /* argument 2 */
+#   define argPtrL  r24 /* argument 1 */
+#   define argPtrH  r25 /* argument 1 */
+
+#   define resCrcL  r24 /* result */
+#   define resCrcH  r25 /* result */
+
+#   define ptrL     XL
+#   define ptrH     XH
+#   define ptr      x
+#   define byte     r18
+#   define bitCnt   r19
+#   define polyL    r20
+#   define polyH    r21
+#   define scratch  r23
+
+#endif
+
+#if USB_USE_FAST_CRC
+
+; This implementation is faster, but has bigger code size
+; Thanks to Slawomir Fras (BoskiDialer) for this code!
+; It implements the following C pseudo-code:
+; unsigned table(unsigned char x)
+; {
+; unsigned    value;
+; 
+;     value = (unsigned)x << 6;
+;     value ^= (unsigned)x << 7;
+;     if(parity(x))
+;         value ^= 0xc001;
+;     return value;
+; }
+; unsigned usbCrc16(unsigned char *argPtr, unsigned char argLen)
+; {
+; unsigned crc = 0xffff;
+; 
+;     while(argLen--)
+;         crc = table(lo8(crc) ^ *argPtr++) ^ hi8(crc);
+;     return ~crc;
+; }
+
+; extern unsigned usbCrc16(unsigned char *argPtr, unsigned char argLen);
+;   argPtr  r24+25 / r16+r17
+;   argLen  r22 / r18
+; temp variables:
+;   byte    r18 / r22
+;   scratch r23
+;   resCrc  r24+r25 / r16+r17
+;   ptr     X / Z
+usbCrc16:
+    mov     ptrL, argPtrL
+    mov     ptrH, argPtrH
+    ldi     resCrcL, 0xFF
+    ldi     resCrcH, 0xFF
+    rjmp    usbCrc16LoopTest
+usbCrc16ByteLoop:
+    ld      byte, ptr+
+    eor     resCrcL, byte   ; resCrcL is now 'x' in table()
+    mov     byte, resCrcL   ; compute parity of 'x'
+    swap    byte
+    eor     byte, resCrcL
+    mov     scratch, byte
+    lsr     byte
+    lsr     byte
+    eor     byte, scratch
+    inc     byte
+    lsr     byte
+    andi    byte, 1         ; byte is now parity(x)
+    mov     scratch, resCrcL
+    mov     resCrcL, resCrcH
+    eor     resCrcL, byte   ; low byte of if(parity(x)) value ^= 0xc001;
+    neg     byte
+    andi    byte, 0xc0
+    mov     resCrcH, byte   ; high byte of if(parity(x)) value ^= 0xc001;
+    clr     byte
+    lsr     scratch
+    ror     byte
+    eor     resCrcH, scratch
+    eor     resCrcL, byte
+    lsr     scratch
+    ror     byte
+    eor     resCrcH, scratch
+    eor     resCrcL, byte
+usbCrc16LoopTest:
+    subi    argLen, 1
+    brsh    usbCrc16ByteLoop
+    com     resCrcL
+    com     resCrcH
+    ret
+
+#else   /* USB_USE_FAST_CRC */
+
+; This implementation is slower, but has less code size
+;
+; extern unsigned usbCrc16(unsigned char *argPtr, unsigned char argLen);
+;   argPtr  r24+25 / r16+r17
+;   argLen  r22 / r18
+; temp variables:
+;   byte    r18 / r22
+;   bitCnt  r19
+;   poly    r20+r21
+;   scratch r23
+;   resCrc  r24+r25 / r16+r17
+;   ptr     X / Z
+usbCrc16:
+    mov     ptrL, argPtrL
+    mov     ptrH, argPtrH
+    ldi     resCrcL, 0
+    ldi     resCrcH, 0
+    ldi     polyL, lo8(0xa001)
+    ldi     polyH, hi8(0xa001)
+    com     argLen      ; argLen = -argLen - 1: modified loop to ensure that carry is set
+    ldi     bitCnt, 0   ; loop counter with starnd condition = end condition
+    rjmp    usbCrcLoopEntry
+usbCrcByteLoop:
+    ld      byte, ptr+
+    eor     resCrcL, byte
+usbCrcBitLoop:
+    ror     resCrcH     ; carry is always set here (see brcs jumps to here)
+    ror     resCrcL
+    brcs    usbCrcNoXor
+    eor     resCrcL, polyL
+    eor     resCrcH, polyH
+usbCrcNoXor:
+    subi    bitCnt, 224 ; (8 * 224) % 256 = 0; this loop iterates 8 times
+    brcs    usbCrcBitLoop
+usbCrcLoopEntry:
+    subi    argLen, -1
+    brcs    usbCrcByteLoop
+usbCrcReady:
+    ret
+; Thanks to Reimar Doeffinger for optimizing this CRC routine!
+
+#endif /* USB_USE_FAST_CRC */
+
+; extern unsigned usbCrc16Append(unsigned char *data, unsigned char len);
+usbCrc16Append:
+    rcall   usbCrc16
+    st      ptr+, resCrcL
+    st      ptr+, resCrcH
+    ret
+
+#undef argLen
+#undef argPtrL
+#undef argPtrH
+#undef resCrcL
+#undef resCrcH
+#undef ptrL
+#undef ptrH
+#undef ptr
+#undef byte
+#undef bitCnt
+#undef polyL
+#undef polyH
+#undef scratch
+
+
+#if USB_CFG_HAVE_MEASURE_FRAME_LENGTH
+#ifdef __IAR_SYSTEMS_ASM__
+/* Register assignments for usbMeasureFrameLength on IAR cc */
+/* Calling conventions on IAR:
+ * First parameter passed in r16/r17, second in r18/r19 and so on.
+ * Callee must preserve r4-r15, r24-r29 (r28/r29 is frame pointer)
+ * Result is passed in r16/r17
+ * In case of the "tiny" memory model, pointers are only 8 bit with no
+ * padding. We therefore pass argument 1 as "16 bit unsigned".
+ */
+#   define resL     r16
+#   define resH     r17
+#   define cnt16L   r30
+#   define cnt16H   r31
+#   define cntH     r18
+
+#else  /* __IAR_SYSTEMS_ASM__ */ 
+/* Register assignments for usbMeasureFrameLength on gcc */
+/* Calling conventions on gcc:
+ * First parameter passed in r24/r25, second in r22/23 and so on.
+ * Callee must preserve r1-r17, r28/r29
+ * Result is passed in r24/r25
+ */
+#   define resL     r24
+#   define resH     r25
+#   define cnt16L   r24
+#   define cnt16H   r25
+#   define cntH     r26
+#endif
+#   define cnt16    cnt16L
+
+; extern unsigned usbMeasurePacketLength(void);
+; returns time between two idle strobes in multiples of 7 CPU clocks
+.global usbMeasureFrameLength
+usbMeasureFrameLength:
+    ldi     cntH, 6         ; wait ~ 10 ms for D- == 0
+    clr     cnt16L
+    clr     cnt16H
+usbMFTime16:
+    dec     cntH
+    breq    usbMFTimeout
+usbMFWaitStrobe:            ; first wait for D- == 0 (idle strobe)
+    sbiw    cnt16, 1        ;[0] [6]
+    breq    usbMFTime16     ;[2]
+    sbic    USBIN, USBMINUS ;[3]
+    rjmp    usbMFWaitStrobe ;[4]
+usbMFWaitIdle:              ; then wait until idle again
+    sbis    USBIN, USBMINUS ;1 wait for D- == 1
+    rjmp    usbMFWaitIdle   ;2
+    ldi     cnt16L, 1       ;1 represents cycles so far
+    clr     cnt16H          ;1
+usbMFWaitLoop:
+    in      cntH, USBIN     ;[0] [7]
+    adiw    cnt16, 1        ;[1]
+    breq    usbMFTimeout    ;[3]
+    andi    cntH, USBMASK   ;[4]
+    brne    usbMFWaitLoop   ;[5]
+usbMFTimeout:
+#if resL != cnt16L
+    mov     resL, cnt16L
+    mov     resH, cnt16H
+#endif
+    ret
+
+#undef resL
+#undef resH
+#undef cnt16
+#undef cnt16L
+#undef cnt16H
+#undef cntH
+
+#endif  /* USB_CFG_HAVE_MEASURE_FRAME_LENGTH */
+
+;----------------------------------------------------------------------------
+; Now include the clock rate specific code
+;----------------------------------------------------------------------------
+
+#ifndef USB_CFG_CLOCK_KHZ
+#   ifdef F_CPU
+#       define USB_CFG_CLOCK_KHZ (F_CPU/1000)
+#   else
+#       error "USB_CFG_CLOCK_KHZ not defined in usbconfig.h and no F_CPU set!"
+#   endif
+#endif
+
+#if USB_CFG_CHECK_CRC   /* separate dispatcher for CRC type modules */
+#   if USB_CFG_CLOCK_KHZ == 18000
+#       include "usbdrvasm18-crc.inc"
+#   else
+#       error "USB_CFG_CLOCK_KHZ is not one of the supported crc-rates!"
+#   endif
+#else   /* USB_CFG_CHECK_CRC */
+#   if USB_CFG_CLOCK_KHZ == 12000
+#       include "usbdrvasm12.inc"
+#   elif USB_CFG_CLOCK_KHZ == 12800
+#       include "usbdrvasm128.inc"
+#   elif USB_CFG_CLOCK_KHZ == 15000
+#       include "usbdrvasm15.inc"
+#   elif USB_CFG_CLOCK_KHZ == 16000
+#       include "usbdrvasm16.inc"
+#   elif USB_CFG_CLOCK_KHZ == 16500
+#       include "usbdrvasm165.inc"
+#   elif USB_CFG_CLOCK_KHZ == 20000
+#       include "usbdrvasm20.inc"
+#   else
+#       error "USB_CFG_CLOCK_KHZ is not one of the supported non-crc-rates!"
+#   endif
+#endif /* USB_CFG_CHECK_CRC */
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm.asm b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm.asm
new file mode 100644
index 00000000..9cc4e4d7
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm.asm
@@ -0,0 +1,21 @@
+/* Name: usbdrvasm.asm
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2006-03-01
+ * Tabsize: 4
+ * Copyright: (c) 2006 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * This Revision: $Id$
+ */
+
+/*
+General Description:
+The IAR compiler/assembler system prefers assembler files with file extension
+".asm". We simply provide this file as an alias for usbdrvasm.S.
+
+Thanks to Oleg Semyonov for his help with the IAR tools port!
+*/
+
+#include "usbdrvasm.S"
+
+end
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm12.inc b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm12.inc
new file mode 100644
index 00000000..cb74ceb7
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm12.inc
@@ -0,0 +1,393 @@
+/* Name: usbdrvasm12.inc
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2004-12-29
+ * Tabsize: 4
+ * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * This Revision: $Id$
+ */
+
+/* Do not link this file! Link usbdrvasm.S instead, which includes the
+ * appropriate implementation!
+ */
+
+/*
+General Description:
+This file is the 12 MHz version of the asssembler part of the USB driver. It
+requires a 12 MHz crystal (not a ceramic resonator and not a calibrated RC
+oscillator).
+
+See usbdrv.h for a description of the entire driver.
+
+Since almost all of this code is timing critical, don't change unless you
+really know what you are doing! Many parts require not only a maximum number
+of CPU cycles, but even an exact number of cycles!
+
+
+Timing constraints according to spec (in bit times):
+timing subject                                      min max    CPUcycles
+---------------------------------------------------------------------------
+EOP of OUT/SETUP to sync pattern of DATA0 (both rx) 2   16     16-128
+EOP of IN to sync pattern of DATA0 (rx, then tx)    2   7.5    16-60
+DATAx (rx) to ACK/NAK/STALL (tx)                    2   7.5    16-60
+*/
+
+;Software-receiver engine. Strict timing! Don't change unless you can preserve timing!
+;interrupt response time: 4 cycles + insn running = 7 max if interrupts always enabled
+;max allowable interrupt latency: 34 cycles -> max 25 cycles interrupt disable
+;max stack usage: [ret(2), YL, SREG, YH, shift, x1, x2, x3, cnt, x4] = 11 bytes
+;Numbers in brackets are maximum cycles since SOF.
+USB_INTR_VECTOR:
+;order of registers pushed: YL, SREG [sofError], YH, shift, x1, x2, x3, cnt
+    push    YL              ;2 [35] push only what is necessary to sync with edge ASAP
+    in      YL, SREG        ;1 [37]
+    push    YL              ;2 [39]
+;----------------------------------------------------------------------------
+; Synchronize with sync pattern:
+;----------------------------------------------------------------------------
+;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
+;sync up with J to K edge during sync pattern -- use fastest possible loops
+;The first part waits at most 1 bit long since we must be in sync pattern.
+;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
+;waitForJ, ensure that this prerequisite is met.
+waitForJ:
+    inc     YL
+    sbis    USBIN, USBMINUS
+    brne    waitForJ        ; just make sure we have ANY timeout
+waitForK:
+;The following code results in a sampling window of 1/4 bit which meets the spec.
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+#if USB_COUNT_SOF
+    lds     YL, usbSofCount
+    inc     YL
+    sts     usbSofCount, YL
+#endif  /* USB_COUNT_SOF */
+#ifdef USB_SOF_HOOK
+    USB_SOF_HOOK
+#endif
+    rjmp    sofError
+foundK:
+;{3, 5} after falling D- edge, average delay: 4 cycles [we want 4 for center sampling]
+;we have 1 bit time for setup purposes, then sample again. Numbers in brackets
+;are cycles from center of first sync (double K) bit after the instruction
+    push    YH                  ;2 [2]
+    lds     YL, usbInputBufOffset;2 [4]
+    clr     YH                  ;1 [5]
+    subi    YL, lo8(-(usbRxBuf));1 [6]
+    sbci    YH, hi8(-(usbRxBuf));1 [7]
+
+    sbis    USBIN, USBMINUS ;1 [8] we want two bits K [sample 1 cycle too early]
+    rjmp    haveTwoBitsK    ;2 [10]
+    pop     YH              ;2 [11] undo the push from before
+    rjmp    waitForK        ;2 [13] this was not the end of sync, retry
+haveTwoBitsK:
+;----------------------------------------------------------------------------
+; push more registers and initialize values while we sample the first bits:
+;----------------------------------------------------------------------------
+    push    shift           ;2 [16]
+    push    x1              ;2 [12]
+    push    x2              ;2 [14]
+
+    in      x1, USBIN       ;1 [17] <-- sample bit 0
+    ldi     shift, 0xff     ;1 [18]
+    bst     x1, USBMINUS    ;1 [19]
+    bld     shift, 0        ;1 [20]
+    push    x3              ;2 [22]
+    push    cnt             ;2 [24]
+    
+    in      x2, USBIN       ;1 [25] <-- sample bit 1
+    ser     x3              ;1 [26] [inserted init instruction]
+    eor     x1, x2          ;1 [27]
+    bst     x1, USBMINUS    ;1 [28]
+    bld     shift, 1        ;1 [29]
+    ldi     cnt, USB_BUFSIZE;1 [30] [inserted init instruction]
+    rjmp    rxbit2          ;2 [32]
+
+;----------------------------------------------------------------------------
+; Receiver loop (numbers in brackets are cycles within byte after instr)
+;----------------------------------------------------------------------------
+
+unstuff0:               ;1 (branch taken)
+    andi    x3, ~0x01   ;1 [15]
+    mov     x1, x2      ;1 [16] x2 contains last sampled (stuffed) bit
+    in      x2, USBIN   ;1 [17] <-- sample bit 1 again
+    ori     shift, 0x01 ;1 [18]
+    rjmp    didUnstuff0 ;2 [20]
+
+unstuff1:               ;1 (branch taken)
+    mov     x2, x1      ;1 [21] x1 contains last sampled (stuffed) bit
+    andi    x3, ~0x02   ;1 [22]
+    ori     shift, 0x02 ;1 [23]
+    nop                 ;1 [24]
+    in      x1, USBIN   ;1 [25] <-- sample bit 2 again
+    rjmp    didUnstuff1 ;2 [27]
+
+unstuff2:               ;1 (branch taken)
+    andi    x3, ~0x04   ;1 [29]
+    ori     shift, 0x04 ;1 [30]
+    mov     x1, x2      ;1 [31] x2 contains last sampled (stuffed) bit
+    nop                 ;1 [32]
+    in      x2, USBIN   ;1 [33] <-- sample bit 3
+    rjmp    didUnstuff2 ;2 [35]
+
+unstuff3:               ;1 (branch taken)
+    in      x2, USBIN   ;1 [34] <-- sample stuffed bit 3 [one cycle too late]
+    andi    x3, ~0x08   ;1 [35]
+    ori     shift, 0x08 ;1 [36]
+    rjmp    didUnstuff3 ;2 [38]
+
+unstuff4:               ;1 (branch taken)
+    andi    x3, ~0x10   ;1 [40]
+    in      x1, USBIN   ;1 [41] <-- sample stuffed bit 4
+    ori     shift, 0x10 ;1 [42]
+    rjmp    didUnstuff4 ;2 [44]
+
+unstuff5:               ;1 (branch taken)
+    andi    x3, ~0x20   ;1 [48]
+    in      x2, USBIN   ;1 [49] <-- sample stuffed bit 5
+    ori     shift, 0x20 ;1 [50]
+    rjmp    didUnstuff5 ;2 [52]
+
+unstuff6:               ;1 (branch taken)
+    andi    x3, ~0x40   ;1 [56]
+    in      x1, USBIN   ;1 [57] <-- sample stuffed bit 6
+    ori     shift, 0x40 ;1 [58]
+    rjmp    didUnstuff6 ;2 [60]
+
+; extra jobs done during bit interval:
+; bit 0:    store, clear [SE0 is unreliable here due to bit dribbling in hubs]
+; bit 1:    se0 check
+; bit 2:    overflow check
+; bit 3:    recovery from delay [bit 0 tasks took too long]
+; bit 4:    none
+; bit 5:    none
+; bit 6:    none
+; bit 7:    jump, eor
+rxLoop:
+    eor     x3, shift   ;1 [0] reconstruct: x3 is 0 at bit locations we changed, 1 at others
+    in      x1, USBIN   ;1 [1] <-- sample bit 0
+    st      y+, x3      ;2 [3] store data
+    ser     x3          ;1 [4]
+    nop                 ;1 [5]
+    eor     x2, x1      ;1 [6]
+    bst     x2, USBMINUS;1 [7]
+    bld     shift, 0    ;1 [8]
+    in      x2, USBIN   ;1 [9] <-- sample bit 1 (or possibly bit 0 stuffed)
+    andi    x2, USBMASK ;1 [10]
+    breq    se0         ;1 [11] SE0 check for bit 1
+    andi    shift, 0xf9 ;1 [12]
+didUnstuff0:
+    breq    unstuff0    ;1 [13]
+    eor     x1, x2      ;1 [14]
+    bst     x1, USBMINUS;1 [15]
+    bld     shift, 1    ;1 [16]
+rxbit2:
+    in      x1, USBIN   ;1 [17] <-- sample bit 2 (or possibly bit 1 stuffed)
+    andi    shift, 0xf3 ;1 [18]
+    breq    unstuff1    ;1 [19] do remaining work for bit 1
+didUnstuff1:
+    subi    cnt, 1      ;1 [20]
+    brcs    overflow    ;1 [21] loop control
+    eor     x2, x1      ;1 [22]
+    bst     x2, USBMINUS;1 [23]
+    bld     shift, 2    ;1 [24]
+    in      x2, USBIN   ;1 [25] <-- sample bit 3 (or possibly bit 2 stuffed)
+    andi    shift, 0xe7 ;1 [26]
+    breq    unstuff2    ;1 [27]
+didUnstuff2:
+    eor     x1, x2      ;1 [28]
+    bst     x1, USBMINUS;1 [29]
+    bld     shift, 3    ;1 [30]
+didUnstuff3:
+    andi    shift, 0xcf ;1 [31]
+    breq    unstuff3    ;1 [32]
+    in      x1, USBIN   ;1 [33] <-- sample bit 4
+    eor     x2, x1      ;1 [34]
+    bst     x2, USBMINUS;1 [35]
+    bld     shift, 4    ;1 [36]
+didUnstuff4:
+    andi    shift, 0x9f ;1 [37]
+    breq    unstuff4    ;1 [38]
+    nop2                ;2 [40]
+    in      x2, USBIN   ;1 [41] <-- sample bit 5
+    eor     x1, x2      ;1 [42]
+    bst     x1, USBMINUS;1 [43]
+    bld     shift, 5    ;1 [44]
+didUnstuff5:
+    andi    shift, 0x3f ;1 [45]
+    breq    unstuff5    ;1 [46]
+    nop2                ;2 [48]
+    in      x1, USBIN   ;1 [49] <-- sample bit 6
+    eor     x2, x1      ;1 [50]
+    bst     x2, USBMINUS;1 [51]
+    bld     shift, 6    ;1 [52]
+didUnstuff6:
+    cpi     shift, 0x02 ;1 [53]
+    brlo    unstuff6    ;1 [54]
+    nop2                ;2 [56]
+    in      x2, USBIN   ;1 [57] <-- sample bit 7
+    eor     x1, x2      ;1 [58]
+    bst     x1, USBMINUS;1 [59]
+    bld     shift, 7    ;1 [60]
+didUnstuff7:
+    cpi     shift, 0x04 ;1 [61]
+    brsh    rxLoop      ;2 [63] loop control
+unstuff7:
+    andi    x3, ~0x80   ;1 [63]
+    ori     shift, 0x80 ;1 [64]
+    in      x2, USBIN   ;1 [65] <-- sample stuffed bit 7
+    nop                 ;1 [66]
+    rjmp    didUnstuff7 ;2 [68]
+
+macro POP_STANDARD ; 12 cycles
+    pop     cnt
+    pop     x3
+    pop     x2
+    pop     x1
+    pop     shift
+    pop     YH
+    endm
+macro POP_RETI     ; 5 cycles
+    pop     YL
+    out     SREG, YL
+    pop     YL
+    endm
+
+#include "asmcommon.inc"
+
+;----------------------------------------------------------------------------
+; Transmitting data
+;----------------------------------------------------------------------------
+
+txByteLoop:
+txBitloop:
+stuffN1Delay:                   ;     [03]
+    ror     shift               ;[-5] [11] [59]
+    brcc    doExorN1            ;[-4]      [60]
+    subi    x4, 1               ;[-3]
+    brne    commonN1            ;[-2]
+    lsl     shift               ;[-1] compensate ror after rjmp stuffDelay
+    nop                         ;[00] stuffing consists of just waiting 8 cycles
+    rjmp    stuffN1Delay        ;[01] after ror, C bit is reliably clear
+
+sendNakAndReti:                 ;0 [-19] 19 cycles until SOP
+    ldi     x3, USBPID_NAK      ;1 [-18]
+    rjmp    usbSendX3           ;2 [-16]
+sendAckAndReti:                 ;0 [-19] 19 cycles until SOP
+    ldi     x3, USBPID_ACK      ;1 [-18]
+    rjmp    usbSendX3           ;2 [-16]
+sendCntAndReti:                 ;0 [-17] 17 cycles until SOP
+    mov     x3, cnt             ;1 [-16]
+usbSendX3:                      ;0 [-16]
+    ldi     YL, 20              ;1 [-15] 'x3' is R20
+    ldi     YH, 0               ;1 [-14]
+    ldi     cnt, 2              ;1 [-13]
+;   rjmp    usbSendAndReti      fallthrough
+
+; USB spec says:
+; idle = J
+; J = (D+ = 0), (D- = 1) or USBOUT = 0x01
+; K = (D+ = 1), (D- = 0) or USBOUT = 0x02
+; Spec allows 7.5 bit times from EOP to SOP for replies (= 60 cycles)
+
+;usbSend:
+;pointer to data in 'Y'
+;number of bytes in 'cnt' -- including sync byte
+;uses: x1...x2, x4, shift, cnt, Y [x1 = mirror USBOUT, x2 = USBMASK, x4 = bitstuff cnt]
+;Numbers in brackets are time since first bit of sync pattern is sent (start of instruction)
+usbSendAndReti:
+    in      x2, USBDDR          ;[-12] 12 cycles until SOP
+    ori     x2, USBMASK         ;[-11]
+    sbi     USBOUT, USBMINUS    ;[-10] prepare idle state; D+ and D- must have been 0 (no pullups)
+    out     USBDDR, x2          ;[-8] <--- acquire bus
+    in      x1, USBOUT          ;[-7] port mirror for tx loop
+    ldi     shift, 0x40         ;[-6] sync byte is first byte sent (we enter loop after ror)
+    ldi     x2, USBMASK         ;[-5]
+    push    x4                  ;[-4]
+doExorN1:
+    eor     x1, x2              ;[-2] [06] [62]
+    ldi     x4, 6               ;[-1] [07] [63]
+commonN1:
+stuffN2Delay:
+    out     USBOUT, x1          ;[00] [08] [64] <--- set bit
+    ror     shift               ;[01]
+    brcc    doExorN2            ;[02]
+    subi    x4, 1               ;[03]
+    brne    commonN2            ;[04]
+    lsl     shift               ;[05] compensate ror after rjmp stuffDelay
+    rjmp    stuffN2Delay        ;[06] after ror, C bit is reliably clear
+doExorN2:
+    eor     x1, x2              ;[04] [12]
+    ldi     x4, 6               ;[05] [13]
+commonN2:
+    nop                         ;[06] [14]
+    subi    cnt, 171            ;[07] [15] trick: (3 * 171) & 0xff = 1
+    out     USBOUT, x1          ;[08] [16] <--- set bit
+    brcs    txBitloop           ;[09]      [25] [41]
+
+stuff6Delay:
+    ror     shift               ;[42] [50]
+    brcc    doExor6             ;[43]
+    subi    x4, 1               ;[44]
+    brne    common6             ;[45]
+    lsl     shift               ;[46] compensate ror after rjmp stuffDelay
+    nop                         ;[47] stuffing consists of just waiting 8 cycles
+    rjmp    stuff6Delay         ;[48] after ror, C bit is reliably clear
+doExor6:
+    eor     x1, x2              ;[45] [53]
+    ldi     x4, 6               ;[46]
+common6:
+stuff7Delay:
+    ror     shift               ;[47] [55]
+    out     USBOUT, x1          ;[48] <--- set bit
+    brcc    doExor7             ;[49]
+    subi    x4, 1               ;[50]
+    brne    common7             ;[51]
+    lsl     shift               ;[52] compensate ror after rjmp stuffDelay
+    rjmp    stuff7Delay         ;[53] after ror, C bit is reliably clear
+doExor7:
+    eor     x1, x2              ;[51] [59]
+    ldi     x4, 6               ;[52]
+common7:
+    ld      shift, y+           ;[53]
+    tst     cnt                 ;[55]
+    out     USBOUT, x1          ;[56] <--- set bit
+    brne    txByteLoop          ;[57]
+
+;make SE0:
+    cbr     x1, USBMASK         ;[58] prepare SE0 [spec says EOP may be 15 to 18 cycles]
+    lds     x2, usbNewDeviceAddr;[59]
+    lsl     x2                  ;[61] we compare with left shifted address
+    subi    YL, 2 + 20          ;[62] Only assign address on data packets, not ACK/NAK in x3
+    sbci    YH, 0               ;[63]
+    out     USBOUT, x1          ;[00] <-- out SE0 -- from now 2 bits = 16 cycles until bus idle
+;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
+;set address only after data packet was sent, not after handshake
+    breq    skipAddrAssign      ;[01]
+    sts     usbDeviceAddr, x2   ; if not skipped: SE0 is one cycle longer
+skipAddrAssign:
+;end of usbDeviceAddress transfer
+    ldi     x2, 1<<USB_INTR_PENDING_BIT;[03] int0 occurred during TX -- clear pending flag
+    USB_STORE_PENDING(x2)       ;[04]
+    ori     x1, USBIDLE         ;[05]
+    in      x2, USBDDR          ;[06]
+    cbr     x2, USBMASK         ;[07] set both pins to input
+    mov     x3, x1              ;[08]
+    cbr     x3, USBMASK         ;[09] configure no pullup on both pins
+    pop     x4                  ;[10]
+    nop2                        ;[12]
+    nop2                        ;[14]
+    out     USBOUT, x1          ;[16] <-- out J (idle) -- end of SE0 (EOP signal)
+    out     USBDDR, x2          ;[17] <-- release bus now
+    out     USBOUT, x3          ;[18] <-- ensure no pull-up resistors are active
+    rjmp    doReturn
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm128.inc b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm128.inc
new file mode 100644
index 00000000..122cc757
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm128.inc
@@ -0,0 +1,750 @@
+/* Name: usbdrvasm128.inc
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2008-10-11
+ * Tabsize: 4
+ * Copyright: (c) 2008 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * This Revision: $Id$
+ */
+
+/* Do not link this file! Link usbdrvasm.S instead, which includes the
+ * appropriate implementation!
+ */
+
+/*
+General Description:
+This file is the 12.8 MHz version of the USB driver. It is intended for use
+with the internal RC oscillator. Although 12.8 MHz is outside the guaranteed
+calibration range of the oscillator, almost all AVRs can reach this frequency.
+This version contains a phase locked loop in the receiver routine to cope with
+slight clock rate deviations of up to +/- 1%.
+
+See usbdrv.h for a description of the entire driver.
+
+LIMITATIONS
+===========
+Although it may seem very handy to save the crystal and use the internal
+RC oscillator of the CPU, this method (and this module) has some serious
+limitations:
+(1) The guaranteed calibration range of the oscillator is only 8.1 MHz.
+They typical range is 14.5 MHz and most AVRs can actually reach this rate.
+(2) Writing EEPROM and Flash may be unreliable (short data lifetime) since
+the write procedure is timed from the RC oscillator.
+(3) End Of Packet detection (SE0) should be in bit 1, bit it is only checked
+if bits 0 and 1 both read as 0 on D- and D+ read as 0 in the middle. This may
+cause problems with old hubs which delay SE0 by up to one cycle.
+(4) Code size is much larger than that of the other modules.
+
+Since almost all of this code is timing critical, don't change unless you
+really know what you are doing! Many parts require not only a maximum number
+of CPU cycles, but even an exact number of cycles!
+
+Implementation notes:
+======================
+min frequency: 67 cycles for 8 bit -> 12.5625 MHz
+max frequency: 69.286 cycles for 8 bit -> 12.99 MHz
+nominal frequency: 12.77 MHz ( = sqrt(min * max))
+
+sampling positions: (next even number in range [+/- 0.5])
+cycle index range: 0 ... 66
+bits:
+.5, 8.875, 17.25, 25.625, 34, 42.375, 50.75, 59.125
+[0/1], [9], [17], [25/+26], [34], [+42/43], [51], [59]
+
+bit number:     0   1   2   3   4   5   6   7
+spare cycles    1   2   1   2   1   1   1   0
+
+operations to perform:      duration cycle
+                            ----------------
+    eor     fix, shift          1 -> 00
+    andi    phase, USBMASK      1 -> 08
+    breq    se0                 1 -> 16 (moved to 11)
+    st      y+, data            2 -> 24, 25
+    mov     data, fix           1 -> 33
+    ser     data                1 -> 41
+    subi    cnt, 1              1 -> 49
+    brcs    overflow            1 -> 50
+
+layout of samples and operations:
+[##] = sample bit
+<##> = sample phase
+*##* = operation
+
+0:  *00* [01]  02   03   04  <05>  06   07
+1:  *08* [09]  10   11   12  <13>  14   15  *16*
+2:  [17]  18   19   20  <21>  22   23
+3:  *24* *25* [26]  27   28   29  <30>  31   32
+4:  *33* [34]  35   36   37  <38>  39   40
+5:  *41* [42]  43   44   45  <46>  47   48
+6:  *49* *50* [51]  52   53   54  <55>  56   57   58
+7:  [59]  60   61   62  <63>  64   65   66
+*****************************************************************************/
+
+/* we prefer positive expressions (do if condition) instead of negative
+ * (skip if condition), therefore use defines for skip instructions:
+ */
+#define ifioclr sbis
+#define ifioset sbic
+#define ifrclr  sbrs
+#define ifrset  sbrc
+
+/* The registers "fix" and "data" swap their meaning during the loop. Use
+ * defines to keep their name constant.
+ */
+#define fix     x2
+#define data    x1
+#undef phase        /* phase has a default definition to x4 */
+#define phase   x3
+
+
+USB_INTR_VECTOR:
+;order of registers pushed: YL, SREG [sofError], YH, shift, x1, x2, x3, cnt, r0
+    push    YL              ;2 push only what is necessary to sync with edge ASAP
+    in      YL, SREG        ;1
+    push    YL              ;2
+;----------------------------------------------------------------------------
+; Synchronize with sync pattern:
+;----------------------------------------------------------------------------
+;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
+;sync up with J to K edge during sync pattern -- use fastest possible loops
+;The first part waits at most 1 bit long since we must be in sync pattern.
+;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
+;waitForJ, ensure that this prerequisite is met.
+waitForJ:
+    inc     YL
+    sbis    USBIN, USBMINUS
+    brne    waitForJ        ; just make sure we have ANY timeout
+waitForK:
+;The following code results in a sampling window of 1/4 bit which meets the spec.
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS ;[0]
+    rjmp    foundK          ;[1]
+#if USB_COUNT_SOF
+    lds     YL, usbSofCount
+    inc     YL
+    sts     usbSofCount, YL
+#endif  /* USB_COUNT_SOF */
+#ifdef USB_SOF_HOOK
+    USB_SOF_HOOK
+#endif
+    rjmp    sofError
+
+foundK:
+;{3, 5} after falling D- edge, average delay: 4 cycles [we want 4 for center sampling]
+;we have 1 bit time for setup purposes, then sample again. Numbers in brackets
+;are cycles from center of first sync (double K) bit after the instruction
+    push    YH                  ;[2]
+    lds     YL, usbInputBufOffset;[4]
+    clr     YH                  ;[6]
+    subi    YL, lo8(-(usbRxBuf));[7]
+    sbci    YH, hi8(-(usbRxBuf));[8]
+
+    sbis    USBIN, USBMINUS     ;[9] we want two bits K [we want to sample at 8 + 4 - 1.5 = 10.5]
+    rjmp    haveTwoBitsK        ;[10]
+    pop     YH                  ;[11] undo the push from before
+    rjmp    waitForK            ;[13] this was not the end of sync, retry
+haveTwoBitsK:
+;----------------------------------------------------------------------------
+; push more registers and initialize values while we sample the first bits:
+;----------------------------------------------------------------------------
+#define fix     x2
+#define data    x1
+
+    push    shift               ;[12]
+    push    x1                  ;[14]
+    push    x2                  ;[16]
+    ldi     shift, 0x80         ;[18] prevent bit-unstuffing but init low bits to 0
+    ifioset USBIN, USBMINUS     ;[19] [01] <--- bit 0 [10.5 + 8 = 18.5]
+    ori     shift, 1<<0         ;[02]
+    push    x3                  ;[03]
+    push    cnt                 ;[05]
+    push    r0                  ;[07]
+    ifioset USBIN, USBMINUS     ;[09] <--- bit 1
+    ori     shift, 1<<1         ;[10]
+    ser     fix                 ;[11]
+    ldi     cnt, USB_BUFSIZE    ;[12]
+    mov     data, shift         ;[13]
+    lsl     shift               ;[14]
+    nop2                        ;[15]
+    ifioset USBIN, USBMINUS     ;[17] <--- bit 2
+    ori     data, 3<<2          ;[18] store in bit 2 AND bit 3
+    eor     shift, data         ;[19] do nrzi decoding
+    andi    data, 1<<3          ;[20]
+    in      phase, USBIN        ;[21] <- phase
+    brne    jumpToEntryAfterSet ;[22] if USBMINS at bit 3 was 1
+    nop                         ;[23]
+    rjmp    entryAfterClr       ;[24]
+jumpToEntryAfterSet:
+    rjmp    entryAfterSet       ;[24]
+
+;----------------------------------------------------------------------------
+; Receiver loop (numbers in brackets are cycles within byte after instr)
+;----------------------------------------------------------------------------
+#undef  fix
+#define  fix    x1
+#undef  data
+#define data    x2
+
+bit7IsSet:
+    ifrclr  phase, USBMINUS     ;[62] check phase only if D- changed
+    lpm                         ;[63]
+    in      phase, USBIN        ;[64] <- phase (one cycle too late)
+    ori     shift, 1 << 7       ;[65]
+    nop                         ;[66]
+;;;;rjmp    bit0AfterSet        ; -> [00] == [67] moved block up to save jump
+bit0AfterSet:
+    eor     fix, shift          ;[00]
+#undef  fix
+#define fix     x2
+#undef  data
+#define data    x1  /* we now have result in data, fix is reset to 0xff */
+    ifioclr USBIN, USBMINUS     ;[01] <--- sample 0
+    rjmp    bit0IsClr           ;[02]
+    andi    shift, ~(7 << 0)    ;[03]
+    breq    unstuff0s           ;[04]
+    in      phase, USBIN        ;[05] <- phase
+    rjmp    bit1AfterSet        ;[06]
+unstuff0s:
+    in      phase, USBIN        ;[06] <- phase (one cycle too late)
+    andi    fix, ~(1 << 0)      ;[07]
+    ifioclr USBIN, USBMINUS     ;[00]
+    ifioset USBIN, USBPLUS      ;[01]
+    rjmp    bit0IsClr           ;[02] executed if first expr false or second true
+se0AndStore:                    ; executed only if both bits 0
+    st      y+, x1              ;[15/17] cycles after start of byte
+    rjmp    se0                 ;[17/19]
+
+bit0IsClr:
+    ifrset  phase, USBMINUS     ;[04] check phase only if D- changed
+    lpm                         ;[05]
+    in      phase, USBIN        ;[06] <- phase (one cycle too late)
+    ori     shift, 1 << 0       ;[07]
+bit1AfterClr:
+    andi    phase, USBMASK      ;[08]
+    ifioset USBIN, USBMINUS     ;[09] <--- sample 1
+    rjmp    bit1IsSet           ;[10]
+    breq    se0AndStore         ;[11] if D- was 0 in bits 0 AND 1 and D+ was 0 in between, we have SE0
+    andi    shift, ~(7 << 1)    ;[12]
+    in      phase, USBIN        ;[13] <- phase
+    breq    unstuff1c           ;[14]
+    rjmp    bit2AfterClr        ;[15]
+unstuff1c:
+    andi    fix, ~(1 << 1)      ;[16]
+    nop2                        ;[08]
+    nop2                        ;[10]
+bit1IsSet:
+    ifrclr  phase, USBMINUS     ;[12] check phase only if D- changed
+    lpm                         ;[13]
+    in      phase, USBIN        ;[14] <- phase (one cycle too late)
+    ori     shift, 1 << 1       ;[15]
+    nop                         ;[16]
+bit2AfterSet:
+    ifioclr USBIN, USBMINUS     ;[17] <--- sample 2
+    rjmp    bit2IsClr           ;[18]
+    andi    shift, ~(7 << 2)    ;[19]
+    breq    unstuff2s           ;[20]
+    in      phase, USBIN        ;[21] <- phase
+    rjmp    bit3AfterSet        ;[22]
+unstuff2s:
+    in      phase, USBIN        ;[22] <- phase (one cycle too late)
+    andi    fix, ~(1 << 2)      ;[23]
+    nop2                        ;[16]
+    nop2                        ;[18]
+bit2IsClr:
+    ifrset  phase, USBMINUS     ;[20] check phase only if D- changed
+    lpm                         ;[21]
+    in      phase, USBIN        ;[22] <- phase (one cycle too late)
+    ori     shift, 1 << 2       ;[23]
+bit3AfterClr:
+    st      y+, data            ;[24]
+entryAfterClr:
+    ifioset USBIN, USBMINUS     ;[26] <--- sample 3
+    rjmp    bit3IsSet           ;[27]
+    andi    shift, ~(7 << 3)    ;[28]
+    breq    unstuff3c           ;[29]
+    in      phase, USBIN        ;[30] <- phase
+    rjmp    bit4AfterClr        ;[31]
+unstuff3c:
+    in      phase, USBIN        ;[31] <- phase (one cycle too late)
+    andi    fix, ~(1 << 3)      ;[32]
+    nop2                        ;[25]
+    nop2                        ;[27]
+bit3IsSet:
+    ifrclr  phase, USBMINUS     ;[29] check phase only if D- changed
+    lpm                         ;[30]
+    in      phase, USBIN        ;[31] <- phase (one cycle too late)
+    ori     shift, 1 << 3       ;[32]
+bit4AfterSet:
+    mov     data, fix           ;[33] undo this move by swapping defines
+#undef  fix
+#define fix     x1
+#undef  data
+#define data    x2
+    ifioclr USBIN, USBMINUS     ;[34] <--- sample 4
+    rjmp    bit4IsClr           ;[35]
+    andi    shift, ~(7 << 4)    ;[36]
+    breq    unstuff4s           ;[37]
+    in      phase, USBIN        ;[38] <- phase
+    rjmp    bit5AfterSet        ;[39]
+unstuff4s:
+    in      phase, USBIN        ;[39] <- phase (one cycle too late)
+    andi    fix, ~(1 << 4)      ;[40]
+    nop2                        ;[33]
+    nop2                        ;[35]
+bit4IsClr:
+    ifrset  phase, USBMINUS     ;[37] check phase only if D- changed
+    lpm                         ;[38]
+    in      phase, USBIN        ;[39] <- phase (one cycle too late)
+    ori     shift, 1 << 4       ;[40]
+bit5AfterClr:
+    ser     data                ;[41]
+    ifioset USBIN, USBMINUS     ;[42] <--- sample 5
+    rjmp    bit5IsSet           ;[43]
+    andi    shift, ~(7 << 5)    ;[44]
+    breq    unstuff5c           ;[45]
+    in      phase, USBIN        ;[46] <- phase
+    rjmp    bit6AfterClr        ;[47]
+unstuff5c:
+    in      phase, USBIN        ;[47] <- phase (one cycle too late)
+    andi    fix, ~(1 << 5)      ;[48]
+    nop2                        ;[41]
+    nop2                        ;[43]
+bit5IsSet:
+    ifrclr  phase, USBMINUS     ;[45] check phase only if D- changed
+    lpm                         ;[46]
+    in      phase, USBIN        ;[47] <- phase (one cycle too late)
+    ori     shift, 1 << 5       ;[48]
+bit6AfterSet:
+    subi    cnt, 1              ;[49]
+    brcs    jumpToOverflow      ;[50]
+    ifioclr USBIN, USBMINUS     ;[51] <--- sample 6
+    rjmp    bit6IsClr           ;[52]
+    andi    shift, ~(3 << 6)    ;[53]
+    cpi     shift, 2            ;[54]
+    in      phase, USBIN        ;[55] <- phase
+    brlt    unstuff6s           ;[56]
+    rjmp    bit7AfterSet        ;[57]
+
+jumpToOverflow:
+    rjmp    overflow
+
+unstuff6s:
+    andi    fix, ~(1 << 6)      ;[50]
+    lpm                         ;[51]
+bit6IsClr:
+    ifrset  phase, USBMINUS     ;[54] check phase only if D- changed
+    lpm                         ;[55]
+    in      phase, USBIN        ;[56] <- phase (one cycle too late)
+    ori     shift, 1 << 6       ;[57]
+    nop                         ;[58]
+bit7AfterClr:
+    ifioset USBIN, USBMINUS     ;[59] <--- sample 7
+    rjmp    bit7IsSet           ;[60]
+    andi    shift, ~(1 << 7)    ;[61]
+    cpi     shift, 4            ;[62]
+    in      phase, USBIN        ;[63] <- phase
+    brlt    unstuff7c           ;[64]
+    rjmp    bit0AfterClr        ;[65] -> [00] == [67]
+unstuff7c:
+    andi    fix, ~(1 << 7)      ;[58]
+    nop                         ;[59]
+    rjmp    bit7IsSet           ;[60]
+
+bit7IsClr:
+    ifrset  phase, USBMINUS     ;[62] check phase only if D- changed
+    lpm                         ;[63]
+    in      phase, USBIN        ;[64] <- phase (one cycle too late)
+    ori     shift, 1 << 7       ;[65]
+    nop                         ;[66]
+;;;;rjmp    bit0AfterClr        ; -> [00] == [67] moved block up to save jump
+bit0AfterClr:
+    eor     fix, shift          ;[00]
+#undef  fix
+#define fix     x2
+#undef  data
+#define data    x1  /* we now have result in data, fix is reset to 0xff */
+    ifioset USBIN, USBMINUS     ;[01] <--- sample 0
+    rjmp    bit0IsSet           ;[02]
+    andi    shift, ~(7 << 0)    ;[03]
+    breq    unstuff0c           ;[04]
+    in      phase, USBIN        ;[05] <- phase
+    rjmp    bit1AfterClr        ;[06]
+unstuff0c:
+    in      phase, USBIN        ;[06] <- phase (one cycle too late)
+    andi    fix, ~(1 << 0)      ;[07]
+    ifioclr USBIN, USBMINUS     ;[00]
+    ifioset USBIN, USBPLUS      ;[01]
+    rjmp    bit0IsSet           ;[02] executed if first expr false or second true
+    rjmp    se0AndStore         ;[03] executed only if both bits 0
+bit0IsSet:
+    ifrclr  phase, USBMINUS     ;[04] check phase only if D- changed
+    lpm                         ;[05]
+    in      phase, USBIN        ;[06] <- phase (one cycle too late)
+    ori     shift, 1 << 0       ;[07]
+bit1AfterSet:
+    andi    shift, ~(7 << 1)    ;[08] compensated by "ori shift, 1<<1" if bit1IsClr
+    ifioclr USBIN, USBMINUS     ;[09] <--- sample 1
+    rjmp    bit1IsClr           ;[10]
+    breq    unstuff1s           ;[11]
+    nop2                        ;[12] do not check for SE0 if bit 0 was 1
+    in      phase, USBIN        ;[14] <- phase (one cycle too late)
+    rjmp    bit2AfterSet        ;[15]
+unstuff1s:
+    in      phase, USBIN        ;[13] <- phase
+    andi    fix, ~(1 << 1)      ;[14]
+    lpm                         ;[07]
+    nop2                        ;[10]
+bit1IsClr:
+    ifrset  phase, USBMINUS     ;[12] check phase only if D- changed
+    lpm                         ;[13]
+    in      phase, USBIN        ;[14] <- phase (one cycle too late)
+    ori     shift, 1 << 1       ;[15]
+    nop                         ;[16]
+bit2AfterClr:
+    ifioset USBIN, USBMINUS     ;[17] <--- sample 2
+    rjmp    bit2IsSet           ;[18]
+    andi    shift, ~(7 << 2)    ;[19]
+    breq    unstuff2c           ;[20]
+    in      phase, USBIN        ;[21] <- phase
+    rjmp    bit3AfterClr        ;[22]
+unstuff2c:
+    in      phase, USBIN        ;[22] <- phase (one cycle too late)
+    andi    fix, ~(1 << 2)      ;[23]
+    nop2                        ;[16]
+    nop2                        ;[18]
+bit2IsSet:
+    ifrclr  phase, USBMINUS     ;[20] check phase only if D- changed
+    lpm                         ;[21]
+    in      phase, USBIN        ;[22] <- phase (one cycle too late)
+    ori     shift, 1 << 2       ;[23]
+bit3AfterSet:
+    st      y+, data            ;[24]
+entryAfterSet:
+    ifioclr USBIN, USBMINUS     ;[26] <--- sample 3
+    rjmp    bit3IsClr           ;[27]
+    andi    shift, ~(7 << 3)    ;[28]
+    breq    unstuff3s           ;[29]
+    in      phase, USBIN        ;[30] <- phase
+    rjmp    bit4AfterSet        ;[31]
+unstuff3s:
+    in      phase, USBIN        ;[31] <- phase (one cycle too late)
+    andi    fix, ~(1 << 3)      ;[32]
+    nop2                        ;[25]
+    nop2                        ;[27]
+bit3IsClr:
+    ifrset  phase, USBMINUS     ;[29] check phase only if D- changed
+    lpm                         ;[30]
+    in      phase, USBIN        ;[31] <- phase (one cycle too late)
+    ori     shift, 1 << 3       ;[32]
+bit4AfterClr:
+    mov     data, fix           ;[33] undo this move by swapping defines
+#undef  fix
+#define fix     x1
+#undef  data
+#define data    x2
+    ifioset USBIN, USBMINUS     ;[34] <--- sample 4
+    rjmp    bit4IsSet           ;[35]
+    andi    shift, ~(7 << 4)    ;[36]
+    breq    unstuff4c           ;[37]
+    in      phase, USBIN        ;[38] <- phase
+    rjmp    bit5AfterClr        ;[39]
+unstuff4c:
+    in      phase, USBIN        ;[39] <- phase (one cycle too late)
+    andi    fix, ~(1 << 4)      ;[40]
+    nop2                        ;[33]
+    nop2                        ;[35]
+bit4IsSet:
+    ifrclr  phase, USBMINUS     ;[37] check phase only if D- changed
+    lpm                         ;[38]
+    in      phase, USBIN        ;[39] <- phase (one cycle too late)
+    ori     shift, 1 << 4       ;[40]
+bit5AfterSet:
+    ser     data                ;[41]
+    ifioclr USBIN, USBMINUS     ;[42] <--- sample 5
+    rjmp    bit5IsClr           ;[43]
+    andi    shift, ~(7 << 5)    ;[44]
+    breq    unstuff5s           ;[45]
+    in      phase, USBIN        ;[46] <- phase
+    rjmp    bit6AfterSet        ;[47]
+unstuff5s:
+    in      phase, USBIN        ;[47] <- phase (one cycle too late)
+    andi    fix, ~(1 << 5)      ;[48]
+    nop2                        ;[41]
+    nop2                        ;[43]
+bit5IsClr:
+    ifrset  phase, USBMINUS     ;[45] check phase only if D- changed
+    lpm                         ;[46]
+    in      phase, USBIN        ;[47] <- phase (one cycle too late)
+    ori     shift, 1 << 5       ;[48]
+bit6AfterClr:
+    subi    cnt, 1              ;[49]
+    brcs    overflow            ;[50]
+    ifioset USBIN, USBMINUS     ;[51] <--- sample 6
+    rjmp    bit6IsSet           ;[52]
+    andi    shift, ~(3 << 6)    ;[53]
+    cpi     shift, 2            ;[54]
+    in      phase, USBIN        ;[55] <- phase
+    brlt    unstuff6c           ;[56]
+    rjmp    bit7AfterClr        ;[57]
+unstuff6c:
+    andi    fix, ~(1 << 6)      ;[50]
+    lpm                         ;[51]
+bit6IsSet:
+    ifrclr  phase, USBMINUS     ;[54] check phase only if D- changed
+    lpm                         ;[55]
+    in      phase, USBIN        ;[56] <- phase (one cycle too late)
+    ori     shift, 1 << 6       ;[57]
+bit7AfterSet:
+    ifioclr USBIN, USBMINUS     ;[59] <--- sample 7
+    rjmp    bit7IsClr           ;[60]
+    andi    shift, ~(1 << 7)    ;[61]
+    cpi     shift, 4            ;[62]
+    in      phase, USBIN        ;[63] <- phase
+    brlt    unstuff7s           ;[64]
+    rjmp    bit0AfterSet        ;[65] -> [00] == [67]
+unstuff7s:
+    andi    fix, ~(1 << 7)      ;[58]
+    nop                         ;[59]
+    rjmp    bit7IsClr           ;[60]
+
+macro POP_STANDARD ; 14 cycles
+    pop     r0
+    pop     cnt
+    pop     x3
+    pop     x2
+    pop     x1
+    pop     shift
+    pop     YH
+    endm
+macro POP_RETI     ; 5 cycles
+    pop     YL
+    out     SREG, YL
+    pop     YL
+    endm
+
+#include "asmcommon.inc"
+
+;----------------------------------------------------------------------------
+; Transmitting data
+;----------------------------------------------------------------------------
+
+txByteLoop:
+txBitloop:
+stuffN1Delay:                   ;     [03]
+    ror     shift               ;[-5] [11] [63]
+    brcc    doExorN1            ;[-4]      [64]
+    subi    x3, 1               ;[-3]
+    brne    commonN1            ;[-2]
+    lsl     shift               ;[-1] compensate ror after rjmp stuffDelay
+    nop                         ;[00] stuffing consists of just waiting 8 cycles
+    rjmp    stuffN1Delay        ;[01] after ror, C bit is reliably clear
+
+sendNakAndReti:
+    ldi     cnt, USBPID_NAK ;[-19]
+    rjmp    sendCntAndReti  ;[-18]
+sendAckAndReti:
+    ldi     cnt, USBPID_ACK ;[-17]
+sendCntAndReti:
+    mov     r0, cnt         ;[-16]
+    ldi     YL, 0           ;[-15] R0 address is 0
+    ldi     YH, 0           ;[-14]
+    ldi     cnt, 2          ;[-13]
+;   rjmp    usbSendAndReti      fallthrough
+
+; USB spec says:
+; idle = J
+; J = (D+ = 0), (D- = 1) or USBOUT = 0x01
+; K = (D+ = 1), (D- = 0) or USBOUT = 0x02
+; Spec allows 7.5 bit times from EOP to SOP for replies (= 60 cycles)
+
+;usbSend:
+;pointer to data in 'Y'
+;number of bytes in 'cnt' -- including sync byte
+;uses: x1...x3, shift, cnt, Y [x1 = mirror USBOUT, x2 = USBMASK, x3 = bitstuff cnt]
+;Numbers in brackets are time since first bit of sync pattern is sent (start of instruction)
+usbSendAndReti:
+    in      x2, USBDDR          ;[-10] 10 cycles until SOP
+    ori     x2, USBMASK         ;[-9]
+    sbi     USBOUT, USBMINUS    ;[-8] prepare idle state; D+ and D- must have been 0 (no pullups)
+    out     USBDDR, x2          ;[-6] <--- acquire bus
+    in      x1, USBOUT          ;[-5] port mirror for tx loop
+    ldi     shift, 0x40         ;[-4] sync byte is first byte sent (we enter loop after ror)
+    ldi     x2, USBMASK         ;[-3]
+doExorN1:
+    eor     x1, x2              ;[-2] [06] [62]
+    ldi     x3, 6               ;[-1] [07] [63]
+commonN1:
+stuffN2Delay:
+    out     USBOUT, x1          ;[00] [08] [64] <--- set bit
+    ror     shift               ;[01]
+    brcc    doExorN2            ;[02]
+    subi    x3, 1               ;[03]
+    brne    commonN2            ;[04]
+    lsl     shift               ;[05] compensate ror after rjmp stuffDelay
+    rjmp    stuffN2Delay        ;[06] after ror, C bit is reliably clear
+doExorN2:
+    eor     x1, x2              ;[04] [12]
+    ldi     x3, 6               ;[05] [13]
+commonN2:
+    nop2                        ;[06] [14]
+    subi    cnt, 171            ;[08] [16] trick: (3 * 171) & 0xff = 1
+    out     USBOUT, x1          ;[09] [17] <--- set bit
+    brcs    txBitloop           ;[10]      [27] [44]
+
+stuff6Delay:
+    ror     shift               ;[45] [53]
+    brcc    doExor6             ;[46]
+    subi    x3, 1               ;[47]
+    brne    common6             ;[48]
+    lsl     shift               ;[49] compensate ror after rjmp stuffDelay
+    nop                         ;[50] stuffing consists of just waiting 8 cycles
+    rjmp    stuff6Delay         ;[51] after ror, C bit is reliably clear
+doExor6:
+    eor     x1, x2              ;[48] [56]
+    ldi     x3, 6               ;[49]
+common6:
+stuff7Delay:
+    ror     shift               ;[50] [58]
+    out     USBOUT, x1          ;[51] <--- set bit
+    brcc    doExor7             ;[52]
+    subi    x3, 1               ;[53]
+    brne    common7             ;[54]
+    lsl     shift               ;[55] compensate ror after rjmp stuffDelay
+    rjmp    stuff7Delay         ;[56] after ror, C bit is reliably clear
+doExor7:
+    eor     x1, x2              ;[54] [62]
+    ldi     x3, 6               ;[55]
+common7:
+    ld      shift, y+           ;[56]
+    nop                         ;[58]
+    tst     cnt                 ;[59]
+    out     USBOUT, x1          ;[60] [00]<--- set bit
+    brne    txByteLoop          ;[61] [01]
+;make SE0:
+    cbr     x1, USBMASK         ;[02] prepare SE0 [spec says EOP may be 15 to 18 cycles]
+    lds     x2, usbNewDeviceAddr;[03]
+    lsl     x2                  ;[05] we compare with left shifted address
+    subi    YL, 2 + 0           ;[06] Only assign address on data packets, not ACK/NAK in r0
+    sbci    YH, 0               ;[07]
+    out     USBOUT, x1          ;[00] <-- out SE0 -- from now 2 bits = 16 cycles until bus idle
+;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
+;set address only after data packet was sent, not after handshake
+    breq    skipAddrAssign      ;[01]
+    sts     usbDeviceAddr, x2   ; if not skipped: SE0 is one cycle longer
+skipAddrAssign:
+;end of usbDeviceAddress transfer
+    ldi     x2, 1<<USB_INTR_PENDING_BIT;[03] int0 occurred during TX -- clear pending flag
+    USB_STORE_PENDING(x2)       ;[04]
+    ori     x1, USBIDLE         ;[05]
+    in      x2, USBDDR          ;[06]
+    cbr     x2, USBMASK         ;[07] set both pins to input
+    mov     x3, x1              ;[08]
+    cbr     x3, USBMASK         ;[09] configure no pullup on both pins
+    lpm                         ;[10]
+    lpm                         ;[13]
+    out     USBOUT, x1          ;[16] <-- out J (idle) -- end of SE0 (EOP signal)
+    out     USBDDR, x2          ;[17] <-- release bus now
+    out     USBOUT, x3          ;[18] <-- ensure no pull-up resistors are active
+    rjmp    doReturn
+
+
+
+/*****************************************************************************
+The following PHP script generates a code skeleton for the receiver routine:
+
+<?php
+
+function printCmdBuffer($thisBit)
+{
+global $cycle;
+
+    $nextBit = ($thisBit + 1) % 8;
+    $s = ob_get_contents();
+    ob_end_clean();
+    $s = str_replace("#", $thisBit, $s);
+    $s = str_replace("@", $nextBit, $s);
+    $lines = explode("\n", $s);
+    for($i = 0; $i < count($lines); $i++){
+        $s = $lines[$i];
+        if(ereg("\\[([0-9-][0-9])\\]", $s, $regs)){
+            $c = $cycle + (int)$regs[1];
+            $s = ereg_replace("\\[[0-9-][0-9]\\]", sprintf("[%02d]", $c), $s);
+        }
+        if(strlen($s) > 0)
+            echo "$s\n";
+    }
+}
+
+function printBit($isAfterSet, $bitNum)
+{
+    ob_start();
+    if($isAfterSet){
+?>
+    ifioclr USBIN, USBMINUS     ;[00] <--- sample
+    rjmp    bit#IsClr           ;[01]
+    andi    shift, ~(7 << #)    ;[02]
+    breq    unstuff#s           ;[03]
+    in      phase, USBIN        ;[04] <- phase
+    rjmp    bit@AfterSet        ;[05]
+unstuff#s:
+    in      phase, USBIN        ;[05] <- phase (one cycle too late)
+    andi    fix, ~(1 << #)      ;[06]
+    nop2                        ;[-1]
+    nop2                        ;[01]
+bit#IsClr:
+    ifrset  phase, USBMINUS     ;[03] check phase only if D- changed
+    lpm                         ;[04]
+    in      phase, USBIN        ;[05] <- phase (one cycle too late)
+    ori     shift, 1 << #       ;[06]
+<?php
+    }else{
+?>
+    ifioset USBIN, USBMINUS     ;[00] <--- sample
+    rjmp    bit#IsSet           ;[01]
+    andi    shift, ~(7 << #)    ;[02]
+    breq    unstuff#c           ;[03]
+    in      phase, USBIN        ;[04] <- phase
+    rjmp    bit@AfterClr        ;[05]
+unstuff#c:
+    in      phase, USBIN        ;[05] <- phase (one cycle too late)
+    andi    fix, ~(1 << #)      ;[06]
+    nop2                        ;[-1]
+    nop2                        ;[01]
+bit#IsSet:
+    ifrclr  phase, USBMINUS     ;[03] check phase only if D- changed
+    lpm                         ;[04]
+    in      phase, USBIN        ;[05] <- phase (one cycle too late)
+    ori     shift, 1 << #       ;[06]
+<?php
+    }
+    printCmdBuffer($bitNum);
+}
+
+$bitStartCycles = array(1, 9, 17, 26, 34, 42, 51, 59);
+for($i = 0; $i < 16; $i++){
+    $bit = $i % 8;
+    $emitClrCode = ($i + (int)($i / 8)) % 2;
+    $cycle = $bitStartCycles[$bit];
+    if($emitClrCode){
+        printf("bit%dAfterClr:\n", $bit);
+    }else{
+        printf("bit%dAfterSet:\n", $bit);
+    }
+    ob_start();
+    echo "    *****                       ;[-1]\n";
+    printCmdBuffer($bit);
+    printBit(!$emitClrCode, $bit);
+    if($i == 7)
+        echo "\n";
+}
+
+?>
+*****************************************************************************/
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm15.inc b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm15.inc
new file mode 100644
index 00000000..ce103916
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm15.inc
@@ -0,0 +1,423 @@
+/* Name: usbdrvasm15.inc
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: contributed by V. Bosch
+ * Creation Date: 2007-08-06
+ * Tabsize: 4
+ * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * Revision: $Id$
+ */
+
+/* Do not link this file! Link usbdrvasm.S instead, which includes the
+ * appropriate implementation!
+ */
+
+/*
+General Description:
+This file is the 15 MHz version of the asssembler part of the USB driver. It
+requires a 15 MHz crystal (not a ceramic resonator and not a calibrated RC
+oscillator).
+
+See usbdrv.h for a description of the entire driver.
+
+Since almost all of this code is timing critical, don't change unless you
+really know what you are doing! Many parts require not only a maximum number
+of CPU cycles, but even an exact number of cycles!
+*/
+
+;max stack usage: [ret(2), YL, SREG, YH, bitcnt, shift, x1, x2, x3, x4, cnt] = 12 bytes
+;nominal frequency: 15 MHz -> 10.0 cycles per bit, 80.0 cycles per byte
+; Numbers in brackets are clocks counted from center of last sync bit
+; when instruction starts
+
+;----------------------------------------------------------------------------
+; order of registers pushed: 
+;	YL, SREG [sofError] YH, shift, x1, x2, x3, bitcnt, cnt, x4
+;----------------------------------------------------------------------------
+USB_INTR_VECTOR:              
+    push    YL                   ;2 	push only what is necessary to sync with edge ASAP
+    in      YL, SREG             ;1 
+    push    YL                   ;2 
+;----------------------------------------------------------------------------
+; Synchronize with sync pattern:
+;
+;   sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
+;   sync up with J to K edge during sync pattern -- use fastest possible loops
+;The first part waits at most 1 bit long since we must be in sync pattern.
+;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
+;waitForJ, ensure that this prerequisite is met.
+waitForJ:
+    inc     YL
+    sbis    USBIN, USBMINUS
+    brne    waitForJ        ; just make sure we have ANY timeout
+;-------------------------------------------------------------------------------
+; The following code results in a sampling window of < 1/4 bit 
+;	which meets the spec.
+;-------------------------------------------------------------------------------
+waitForK:			 ;- 
+    sbis    USBIN, USBMINUS      ;1 [00] <-- sample
+    rjmp    foundK               ;2 [01]
+    sbis    USBIN, USBMINUS	 ;	 <-- sample
+    rjmp    foundK
+    sbis    USBIN, USBMINUS	 ;	 <-- sample
+    rjmp    foundK
+    sbis    USBIN, USBMINUS	 ;	 <-- sample
+    rjmp    foundK
+    sbis    USBIN, USBMINUS	 ;	 <-- sample
+    rjmp    foundK
+    sbis    USBIN, USBMINUS	 ;	 <-- sample
+    rjmp    foundK
+#if USB_COUNT_SOF
+    lds     YL, usbSofCount
+    inc     YL
+    sts     usbSofCount, YL
+#endif  /* USB_COUNT_SOF */
+#ifdef USB_SOF_HOOK
+    USB_SOF_HOOK
+#endif
+    rjmp    sofError
+;------------------------------------------------------------------------------
+; {3, 5} after falling D- edge, average delay: 4 cycles [we want 5 for 
+;	center sampling] 
+; 	we have 1 bit time for setup purposes, then sample again. 
+;	Numbers in brackets are cycles from center of first sync (double K) 
+;	bit after the instruction
+;------------------------------------------------------------------------------
+foundK:                          ;- [02]
+    lds     YL, usbInputBufOffset;2 [03+04]	tx loop
+    push    YH                   ;2 [05+06]
+    clr     YH                   ;1 [07]
+    subi    YL, lo8(-(usbRxBuf)) ;1 [08] 	[rx loop init]
+    sbci    YH, hi8(-(usbRxBuf)) ;1 [09] 	[rx loop init]
+    push    shift                ;2 [10+11]
+    ser	    shift		 ;1 [12]
+    sbis    USBIN, USBMINUS      ;1 [-1] [13] <--sample:we want two bits K (sample 1 cycle too early)
+    rjmp    haveTwoBitsK         ;2 [00] [14]
+    pop     shift                ;2 	 [15+16] undo the push from before
+    pop     YH 			 ;2 	 [17+18] undo the push from before
+    rjmp    waitForK             ;2 	 [19+20] this was not the end of sync, retry
+; The entire loop from waitForK until rjmp waitForK above must not exceed two
+; bit times (= 20 cycles).
+
+;----------------------------------------------------------------------------
+; push more registers and initialize values while we sample the first bits:
+;----------------------------------------------------------------------------
+haveTwoBitsK:			;- [01]
+    push    x1              	;2 [02+03]
+    push    x2              	;2 [04+05]
+    push    x3              	;2 [06+07]
+    push    bitcnt              ;2 [08+09]	
+    in      x1, USBIN       	;1 [00] [10] <-- sample bit 0
+    bst     x1, USBMINUS    	;1 [01]
+    bld     shift, 0        	;1 [02]
+    push    cnt             	;2 [03+04]
+    ldi     cnt, USB_BUFSIZE	;1 [05] 
+    push    x4              	;2 [06+07] tx loop
+    rjmp    rxLoop          	;2 [08]
+;----------------------------------------------------------------------------
+; Receiver loop (numbers in brackets are cycles within byte after instr)
+;----------------------------------------------------------------------------
+unstuff0:               	;- [07] (branch taken)
+    andi    x3, ~0x01   	;1 [08]
+    mov     x1, x2      	;1 [09] x2 contains last sampled (stuffed) bit
+    in      x2, USBIN   	;1 [00] [10] <-- sample bit 1 again
+    andi    x2, USBMASK 	;1 [01]
+    breq    se0Hop         	;1 [02] SE0 check for bit 1 
+    ori     shift, 0x01 	;1 [03] 0b00000001
+    nop				;1 [04]
+    rjmp    didUnstuff0 	;2 [05]
+;-----------------------------------------------------
+unstuff1:               	;- [05] (branch taken)
+    mov     x2, x1      	;1 [06] x1 contains last sampled (stuffed) bit
+    andi    x3, ~0x02   	;1 [07]
+    ori     shift, 0x02 	;1 [08] 0b00000010
+    nop                 	;1 [09]
+    in      x1, USBIN   	;1 [00] [10] <-- sample bit 2 again
+    andi    x1, USBMASK 	;1 [01]
+    breq    se0Hop         	;1 [02] SE0 check for bit 2 
+    rjmp    didUnstuff1 	;2 [03]
+;-----------------------------------------------------
+unstuff2:               	;- [05] (branch taken)
+    andi    x3, ~0x04   	;1 [06]
+    ori     shift, 0x04 	;1 [07] 0b00000100
+    mov     x1, x2      	;1 [08] x2 contains last sampled (stuffed) bit
+    nop                 	;1 [09]
+    in      x2, USBIN   	;1 [00] [10] <-- sample bit 3
+    andi    x2, USBMASK 	;1 [01]
+    breq    se0Hop         	;1 [02] SE0 check for bit 3 
+    rjmp    didUnstuff2 	;2 [03]
+;-----------------------------------------------------
+unstuff3:               	;- [00] [10]  (branch taken)
+    in      x2, USBIN   	;1 [01] [11] <-- sample stuffed bit 3 one cycle too late
+    andi    x2, USBMASK 	;1 [02]
+    breq    se0Hop         	;1 [03] SE0 check for stuffed bit 3 
+    andi    x3, ~0x08   	;1 [04]
+    ori     shift, 0x08 	;1 [05] 0b00001000
+    rjmp    didUnstuff3 	;2 [06]
+;----------------------------------------------------------------------------
+; extra jobs done during bit interval:
+;
+; bit 0:    store, clear [SE0 is unreliable here due to bit dribbling in hubs], 
+; 		overflow check, jump to the head of rxLoop
+; bit 1:    SE0 check
+; bit 2:    SE0 check, recovery from delay [bit 0 tasks took too long]
+; bit 3:    SE0 check, recovery from delay [bit 0 tasks took too long]
+; bit 4:    SE0 check, none
+; bit 5:    SE0 check, none
+; bit 6:    SE0 check, none
+; bit 7:    SE0 check, reconstruct: x3 is 0 at bit locations we changed, 1 at others
+;----------------------------------------------------------------------------
+rxLoop:				;- [09]
+    in      x2, USBIN   	;1 [00] [10] <-- sample bit 1 (or possibly bit 0 stuffed)
+    andi    x2, USBMASK 	;1 [01]
+    brne    SkipSe0Hop		;1 [02]
+se0Hop:				;- [02]
+    rjmp    se0         	;2 [03] SE0 check for bit 1 
+SkipSe0Hop:			;- [03]
+    ser     x3          	;1 [04]
+    andi    shift, 0xf9 	;1 [05] 0b11111001
+    breq    unstuff0    	;1 [06]
+didUnstuff0:			;- [06]
+    eor     x1, x2      	;1 [07]
+    bst     x1, USBMINUS	;1 [08]
+    bld     shift, 1    	;1 [09] 
+    in      x1, USBIN   	;1 [00] [10] <-- sample bit 2 (or possibly bit 1 stuffed)
+    andi    x1, USBMASK 	;1 [01]
+    breq    se0Hop         	;1 [02] SE0 check for bit 2 
+    andi    shift, 0xf3 	;1 [03] 0b11110011
+    breq    unstuff1    	;1 [04] do remaining work for bit 1
+didUnstuff1:			;- [04]
+    eor     x2, x1      	;1 [05]
+    bst     x2, USBMINUS	;1 [06]
+    bld     shift, 2    	;1 [07]
+    nop2			;2 [08+09]
+    in      x2, USBIN   	;1 [00] [10] <-- sample bit 3 (or possibly bit 2 stuffed)
+    andi    x2, USBMASK 	;1 [01]
+    breq    se0Hop         	;1 [02] SE0 check for bit 3 
+    andi    shift, 0xe7 	;1 [03] 0b11100111
+    breq    unstuff2    	;1 [04]
+didUnstuff2:			;- [04]
+    eor     x1, x2      	;1 [05]
+    bst     x1, USBMINUS	;1 [06]
+    bld     shift, 3    	;1 [07]
+didUnstuff3:			;- [07]
+    andi    shift, 0xcf 	;1 [08] 0b11001111
+    breq    unstuff3    	;1 [09]
+    in      x1, USBIN   	;1 [00] [10] <-- sample bit 4
+    andi    x1, USBMASK 	;1 [01]
+    breq    se0Hop         	;1 [02] SE0 check for bit 4
+    eor     x2, x1      	;1 [03]
+    bst     x2, USBMINUS	;1 [04]
+    bld     shift, 4    	;1 [05]
+didUnstuff4:			;- [05]
+    andi    shift, 0x9f 	;1 [06] 0b10011111
+    breq    unstuff4    	;1 [07]
+    nop2			;2 [08+09]
+    in      x2, USBIN   	;1 [00] [10] <-- sample bit 5
+    andi    x2, USBMASK 	;1 [01]
+    breq    se0         	;1 [02] SE0 check for bit 5
+    eor     x1, x2      	;1 [03]
+    bst     x1, USBMINUS	;1 [04]
+    bld     shift, 5    	;1 [05]
+didUnstuff5:			;- [05]
+    andi    shift, 0x3f 	;1 [06] 0b00111111
+    breq    unstuff5    	;1 [07]
+    nop2			;2 [08+09]
+    in      x1, USBIN   	;1 [00] [10] <-- sample bit 6
+    andi    x1, USBMASK 	;1 [01]
+    breq    se0         	;1 [02] SE0 check for bit 6
+    eor     x2, x1      	;1 [03]
+    bst     x2, USBMINUS	;1 [04]
+    bld     shift, 6   	 	;1 [05]
+didUnstuff6:			;- [05]
+    cpi     shift, 0x02 	;1 [06] 0b00000010
+    brlo    unstuff6    	;1 [07]
+    nop2			;2 [08+09]
+    in      x2, USBIN   	;1 [00] [10] <-- sample bit 7
+    andi    x2, USBMASK 	;1 [01]
+    breq    se0         	;1 [02] SE0 check for bit 7
+    eor     x1, x2      	;1 [03]
+    bst     x1, USBMINUS	;1 [04]
+    bld     shift, 7    	;1 [05]
+didUnstuff7:			;- [05] 
+    cpi     shift, 0x04 	;1 [06] 0b00000100
+    brlo    unstuff7		;1 [07]
+    eor     x3, shift   	;1 [08] reconstruct: x3 is 0 at bit locations we changed, 1 at others
+    nop				;1 [09]
+    in      x1, USBIN   	;1 [00]	[10] <-- sample bit 0
+    st      y+, x3      	;2 [01+02] store data
+    eor     x2, x1      	;1 [03]
+    bst     x2, USBMINUS	;1 [04]
+    bld     shift, 0    	;1 [05]
+    subi    cnt, 1		;1 [06]
+    brcs    overflow	;1 [07]
+    rjmp    rxLoop		;2 [08]
+;-----------------------------------------------------
+unstuff4:               	;- [08] 
+    andi    x3, ~0x10   	;1 [09]
+    in      x1, USBIN   	;1 [00] [10] <-- sample stuffed bit 4
+    andi    x1, USBMASK 	;1 [01]
+    breq    se0         	;1 [02] SE0 check for stuffed bit 4
+    ori     shift, 0x10 	;1 [03]
+    rjmp    didUnstuff4 	;2 [04]
+;-----------------------------------------------------
+unstuff5:               	;- [08] 
+    ori     shift, 0x20 	;1 [09]
+    in      x2, USBIN   	;1 [00] [10] <-- sample stuffed bit 5
+    andi    x2, USBMASK 	;1 [01]
+    breq    se0         	;1 [02] SE0 check for stuffed bit 5
+    andi    x3, ~0x20   	;1 [03]
+    rjmp    didUnstuff5		;2 [04]
+;-----------------------------------------------------
+unstuff6:               	;- [08] 
+    andi    x3, ~0x40   	;1 [09]
+    in      x1, USBIN   	;1 [00] [10] <-- sample stuffed bit 6
+    andi    x1, USBMASK 	;1 [01]
+    breq    se0         	;1 [02] SE0 check for stuffed bit 6
+    ori     shift, 0x40 	;1 [03]
+    rjmp    didUnstuff6 	;2 [04]
+;-----------------------------------------------------
+unstuff7:			;- [08]
+    andi    x3, ~0x80   	;1 [09]
+    in      x2, USBIN   	;1 [00] [10] <-- sample stuffed bit 7
+    andi    x2, USBMASK 	;1 [01]
+    breq    se0         	;1 [02] SE0 check for stuffed bit 7
+    ori     shift, 0x80 	;1 [03]
+    rjmp    didUnstuff7 	;2 [04]
+    
+macro POP_STANDARD ; 16 cycles
+    pop     x4    
+    pop     cnt
+    pop     bitcnt
+    pop     x3
+    pop     x2
+    pop     x1
+    pop     shift
+    pop     YH
+    endm
+macro POP_RETI     ; 5 cycles
+    pop     YL
+    out     SREG, YL
+    pop     YL
+    endm
+
+#include "asmcommon.inc"
+
+;---------------------------------------------------------------------------
+; USB spec says:
+; idle = J
+; J = (D+ = 0), (D- = 1)
+; K = (D+ = 1), (D- = 0)
+; Spec allows 7.5 bit times from EOP to SOP for replies
+;---------------------------------------------------------------------------
+bitstuffN:		    	;- [04]
+    eor     x1, x4          	;1 [05]
+    clr	    x2			;1 [06]
+    nop				;1 [07]
+    rjmp    didStuffN       	;1 [08]
+;---------------------------------------------------------------------------    
+bitstuff6:		    	;- [04]
+    eor     x1, x4          	;1 [05]
+    clr	    x2			;1 [06]
+    rjmp    didStuff6       	;1 [07]
+;---------------------------------------------------------------------------
+bitstuff7:		    	;- [02]
+    eor     x1, x4          	;1 [03]
+    clr	    x2			;1 [06]
+    nop			    	;1 [05]
+    rjmp    didStuff7       	;1 [06]
+;---------------------------------------------------------------------------
+sendNakAndReti:			;- [-19]
+    ldi     x3, USBPID_NAK  	;1 [-18]
+    rjmp    sendX3AndReti   	;1 [-17]
+;---------------------------------------------------------------------------
+sendAckAndReti:			;- [-17]
+    ldi     cnt, USBPID_ACK 	;1 [-16]
+sendCntAndReti:			;- [-16]
+    mov     x3, cnt         	;1 [-15]
+sendX3AndReti:			;- [-15]
+    ldi     YL, 20          	;1 [-14] x3==r20 address is 20
+    ldi     YH, 0           	;1 [-13]
+    ldi     cnt, 2          	;1 [-12]
+;   rjmp    usbSendAndReti      fallthrough
+;---------------------------------------------------------------------------
+;usbSend:
+;pointer to data in 'Y'
+;number of bytes in 'cnt' -- including sync byte [range 2 ... 12]
+;uses: x1...x4, btcnt, shift, cnt, Y
+;Numbers in brackets are time since first bit of sync pattern is sent
+;We need not to match the transfer rate exactly because the spec demands 
+;only 1.5% precision anyway.
+usbSendAndReti:             	;- [-13] 13 cycles until SOP
+    in      x2, USBDDR      	;1 [-12]
+    ori     x2, USBMASK     	;1 [-11]
+    sbi     USBOUT, USBMINUS	;2 [-09-10] prepare idle state; D+ and D- must have been 0 (no pullups)
+    in      x1, USBOUT      	;1 [-08] port mirror for tx loop
+    out     USBDDR, x2      	;1 [-07] <- acquire bus
+	; need not init x2 (bitstuff history) because sync starts with 0 
+    ldi     x4, USBMASK     	;1 [-06] 	exor mask
+    ldi     shift, 0x80     	;1 [-05] 	sync byte is first byte sent
+    ldi     bitcnt, 6    	;1 [-04] 
+txBitLoop:		    	;- [-04] [06]
+    sbrs    shift, 0        	;1 [-03] [07]
+    eor     x1, x4          	;1 [-02] [08] 
+    ror     shift           	;1 [-01] [09]  
+didStuffN:		    	;-       [09]
+    out     USBOUT, x1      	;1 [00]  [10] <-- out N
+    ror     x2              	;1 [01]
+    cpi     x2, 0xfc        	;1 [02]
+    brcc    bitstuffN       	;1 [03]
+    dec     bitcnt          	;1 [04]
+    brne    txBitLoop       	;1 [05]
+    sbrs    shift, 0        	;1 [06]
+    eor     x1, x4          	;1 [07]
+    ror     shift           	;1 [08]
+didStuff6:			;- [08]
+    nop				;1 [09]
+    out     USBOUT, x1      	;1 [00] [10] <-- out 6
+    ror     x2              	;1 [01] 
+    cpi     x2, 0xfc        	;1 [02]
+    brcc    bitstuff6       	;1 [03]
+    sbrs    shift, 0        	;1 [04]
+    eor     x1, x4          	;1 [05]
+    ror     shift           	;1 [06]
+    ror     x2              	;1 [07]
+didStuff7:			;- [07]
+    ldi     bitcnt, 6    	;1 [08]
+    cpi     x2, 0xfc        	;1 [09]
+    out     USBOUT, x1      	;1 [00] [10] <-- out 7
+    brcc    bitstuff7       	;1 [01]
+    ld      shift, y+       	;2 [02+03]
+    dec     cnt             	;1 [04]
+    brne    txBitLoop      	;1 [05]
+makeSE0:
+    cbr     x1, USBMASK     	;1 [06] 	prepare SE0 [spec says EOP may be 19 to 23 cycles]
+    lds     x2, usbNewDeviceAddr;2 [07+08]
+    lsl     x2                  ;1 [09] we compare with left shifted address
+;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
+;set address only after data packet was sent, not after handshake
+    out     USBOUT, x1      	;1 [00] [10] <-- out SE0-- from now 2 bits==20 cycl. until bus idle
+    subi    YL, 20 + 2          ;1 [01] Only assign address on data packets, not ACK/NAK in x3
+    sbci    YH, 0           	;1 [02]
+    breq    skipAddrAssign  	;1 [03]
+    sts     usbDeviceAddr, x2	;2 [04+05] if not skipped: SE0 is one cycle longer
+;----------------------------------------------------------------------------
+;end of usbDeviceAddress transfer
+skipAddrAssign:				;- [03/04]
+    ldi     x2, 1<<USB_INTR_PENDING_BIT	;1 [05] int0 occurred during TX -- clear pending flag
+    USB_STORE_PENDING(x2)           ;1 [06]
+    ori     x1, USBIDLE     		;1 [07]
+    in      x2, USBDDR      		;1 [08]
+    cbr     x2, USBMASK     		;1 [09] set both pins to input
+    mov     x3, x1          		;1 [10]
+    cbr     x3, USBMASK     		;1 [11] configure no pullup on both pins
+    ldi     x4, 3           		;1 [12]
+se0Delay:				;- [12] [15] 
+    dec     x4              		;1 [13] [16] 
+    brne    se0Delay        		;1 [14] [17] 
+    nop2				;2      [18+19]
+    out     USBOUT, x1      		;1      [20] <--out J (idle) -- end of SE0 (EOP sig.)
+    out     USBDDR, x2      		;1      [21] <--release bus now
+    out     USBOUT, x3      		;1      [22] <--ensure no pull-up resistors are active
+    rjmp    doReturn			;1	[23]
+;---------------------------------------------------------------------------
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm16.inc b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm16.inc
new file mode 100644
index 00000000..4c00faa2
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm16.inc
@@ -0,0 +1,346 @@
+/* Name: usbdrvasm16.inc
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2007-06-15
+ * Tabsize: 4
+ * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * Revision: $Id$
+ */
+
+/* Do not link this file! Link usbdrvasm.S instead, which includes the
+ * appropriate implementation!
+ */
+
+/*
+General Description:
+This file is the 16 MHz version of the asssembler part of the USB driver. It
+requires a 16 MHz crystal (not a ceramic resonator and not a calibrated RC
+oscillator).
+
+See usbdrv.h for a description of the entire driver.
+
+Since almost all of this code is timing critical, don't change unless you
+really know what you are doing! Many parts require not only a maximum number
+of CPU cycles, but even an exact number of cycles!
+*/
+
+;max stack usage: [ret(2), YL, SREG, YH, bitcnt, shift, x1, x2, x3, x4, cnt] = 12 bytes
+;nominal frequency: 16 MHz -> 10.6666666 cycles per bit, 85.333333333 cycles per byte
+; Numbers in brackets are clocks counted from center of last sync bit
+; when instruction starts
+
+USB_INTR_VECTOR:
+;order of registers pushed: YL, SREG YH, [sofError], bitcnt, shift, x1, x2, x3, x4, cnt
+    push    YL                  ;[-25] push only what is necessary to sync with edge ASAP
+    in      YL, SREG            ;[-23]
+    push    YL                  ;[-22]
+    push    YH                  ;[-20]
+;----------------------------------------------------------------------------
+; Synchronize with sync pattern:
+;----------------------------------------------------------------------------
+;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
+;sync up with J to K edge during sync pattern -- use fastest possible loops
+;The first part waits at most 1 bit long since we must be in sync pattern.
+;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
+;waitForJ, ensure that this prerequisite is met.
+waitForJ:
+    inc     YL
+    sbis    USBIN, USBMINUS
+    brne    waitForJ        ; just make sure we have ANY timeout
+waitForK:
+;The following code results in a sampling window of < 1/4 bit which meets the spec.
+    sbis    USBIN, USBMINUS     ;[-15]
+    rjmp    foundK              ;[-14]
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+#if USB_COUNT_SOF
+    lds     YL, usbSofCount
+    inc     YL
+    sts     usbSofCount, YL
+#endif  /* USB_COUNT_SOF */
+#ifdef USB_SOF_HOOK
+    USB_SOF_HOOK
+#endif
+    rjmp    sofError
+foundK:                         ;[-12]
+;{3, 5} after falling D- edge, average delay: 4 cycles [we want 5 for center sampling]
+;we have 1 bit time for setup purposes, then sample again. Numbers in brackets
+;are cycles from center of first sync (double K) bit after the instruction
+    push    bitcnt              ;[-12]
+;   [---]                       ;[-11]
+    lds     YL, usbInputBufOffset;[-10]
+;   [---]                       ;[-9]
+    clr     YH                  ;[-8]
+    subi    YL, lo8(-(usbRxBuf));[-7] [rx loop init]
+    sbci    YH, hi8(-(usbRxBuf));[-6] [rx loop init]
+    push    shift               ;[-5]
+;   [---]                       ;[-4]
+    ldi     bitcnt, 0x55        ;[-3] [rx loop init]
+    sbis    USBIN, USBMINUS     ;[-2] we want two bits K (sample 2 cycles too early)
+    rjmp    haveTwoBitsK        ;[-1]
+    pop     shift               ;[0] undo the push from before
+    pop     bitcnt              ;[2] undo the push from before
+    rjmp    waitForK            ;[4] this was not the end of sync, retry
+; The entire loop from waitForK until rjmp waitForK above must not exceed two
+; bit times (= 21 cycles).
+
+;----------------------------------------------------------------------------
+; push more registers and initialize values while we sample the first bits:
+;----------------------------------------------------------------------------
+haveTwoBitsK:
+    push    x1              ;[1]
+    push    x2              ;[3]
+    push    x3              ;[5]
+    ldi     shift, 0        ;[7]
+    ldi     x3, 1<<4        ;[8] [rx loop init] first sample is inverse bit, compensate that
+    push    x4              ;[9] == leap
+
+    in      x1, USBIN       ;[11] <-- sample bit 0
+    andi    x1, USBMASK     ;[12]
+    bst     x1, USBMINUS    ;[13]
+    bld     shift, 7        ;[14]
+    push    cnt             ;[15]
+    ldi     leap, 0         ;[17] [rx loop init]
+    ldi     cnt, USB_BUFSIZE;[18] [rx loop init]
+    rjmp    rxbit1          ;[19] arrives at [21]
+
+;----------------------------------------------------------------------------
+; Receiver loop (numbers in brackets are cycles within byte after instr)
+;----------------------------------------------------------------------------
+
+; duration of unstuffing code should be 10.66666667 cycles. We adjust "leap"
+; accordingly to approximate this value in the long run.
+
+unstuff6:
+    andi    x2, USBMASK ;[03]
+    ori     x3, 1<<6    ;[04] will not be shifted any more
+    andi    shift, ~0x80;[05]
+    mov     x1, x2      ;[06] sampled bit 7 is actually re-sampled bit 6
+    subi    leap, -1    ;[07] total duration = 11 bits -> subtract 1/3
+    rjmp    didUnstuff6 ;[08]
+
+unstuff7:
+    ori     x3, 1<<7    ;[09] will not be shifted any more
+    in      x2, USBIN   ;[00] [10]  re-sample bit 7
+    andi    x2, USBMASK ;[01]
+    andi    shift, ~0x80;[02]
+    subi    leap, 2     ;[03] total duration = 10 bits -> add 1/3
+    rjmp    didUnstuff7 ;[04]
+
+unstuffEven:
+    ori     x3, 1<<6    ;[09] will be shifted right 6 times for bit 0
+    in      x1, USBIN   ;[00] [10]
+    andi    shift, ~0x80;[01]
+    andi    x1, USBMASK ;[02]
+    breq    se0         ;[03]
+    subi    leap, -1    ;[04] total duration = 11 bits -> subtract 1/3
+    nop2                ;[05]
+    rjmp    didUnstuffE ;[06]
+
+unstuffOdd:
+    ori     x3, 1<<5    ;[09] will be shifted right 4 times for bit 1
+    in      x2, USBIN   ;[00] [10]
+    andi    shift, ~0x80;[01]
+    andi    x2, USBMASK ;[02]
+    breq    se0         ;[03]
+    subi    leap, -1    ;[04] total duration = 11 bits -> subtract 1/3
+    nop2                ;[05]
+    rjmp    didUnstuffO ;[06]
+
+rxByteLoop:
+    andi    x1, USBMASK ;[03]
+    eor     x2, x1      ;[04]
+    subi    leap, 1     ;[05]
+    brpl    skipLeap    ;[06]
+    subi    leap, -3    ;1 one leap cycle every 3rd byte -> 85 + 1/3 cycles per byte
+    nop                 ;1
+skipLeap:
+    subi    x2, 1       ;[08]
+    ror     shift       ;[09]
+didUnstuff6:
+    cpi     shift, 0xfc ;[10]
+    in      x2, USBIN   ;[00] [11] <-- sample bit 7
+    brcc    unstuff6    ;[01]
+    andi    x2, USBMASK ;[02]
+    eor     x1, x2      ;[03]
+    subi    x1, 1       ;[04]
+    ror     shift       ;[05]
+didUnstuff7:
+    cpi     shift, 0xfc ;[06]
+    brcc    unstuff7    ;[07]
+    eor     x3, shift   ;[08] reconstruct: x3 is 1 at bit locations we changed, 0 at others
+    st      y+, x3      ;[09] store data
+rxBitLoop:
+    in      x1, USBIN   ;[00] [11] <-- sample bit 0/2/4
+    andi    x1, USBMASK ;[01]
+    eor     x2, x1      ;[02]
+    andi    x3, 0x3f    ;[03] topmost two bits reserved for 6 and 7
+    subi    x2, 1       ;[04]
+    ror     shift       ;[05]
+    cpi     shift, 0xfc ;[06]
+    brcc    unstuffEven ;[07]
+didUnstuffE:
+    lsr     x3          ;[08]
+    lsr     x3          ;[09]
+rxbit1:
+    in      x2, USBIN   ;[00] [10] <-- sample bit 1/3/5
+    andi    x2, USBMASK ;[01]
+    breq    se0         ;[02]
+    eor     x1, x2      ;[03]
+    subi    x1, 1       ;[04]
+    ror     shift       ;[05]
+    cpi     shift, 0xfc ;[06]
+    brcc    unstuffOdd  ;[07]
+didUnstuffO:
+    subi    bitcnt, 0xab;[08] == addi 0x55, 0x55 = 0x100/3
+    brcs    rxBitLoop   ;[09]
+
+    subi    cnt, 1      ;[10]
+    in      x1, USBIN   ;[00] [11] <-- sample bit 6
+    brcc    rxByteLoop  ;[01]
+    rjmp    overflow
+
+macro POP_STANDARD ; 14 cycles
+    pop     cnt
+    pop     x4
+    pop     x3
+    pop     x2
+    pop     x1
+    pop     shift
+    pop     bitcnt
+    endm
+macro POP_RETI     ; 7 cycles
+    pop     YH
+    pop     YL
+    out     SREG, YL
+    pop     YL
+    endm
+
+#include "asmcommon.inc"
+
+; USB spec says:
+; idle = J
+; J = (D+ = 0), (D- = 1)
+; K = (D+ = 1), (D- = 0)
+; Spec allows 7.5 bit times from EOP to SOP for replies
+
+bitstuffN:
+    eor     x1, x4          ;[5]
+    ldi     x2, 0           ;[6]
+    nop2                    ;[7]
+    nop                     ;[9]
+    out     USBOUT, x1      ;[10] <-- out
+    rjmp    didStuffN       ;[0]
+    
+bitstuff6:
+    eor     x1, x4          ;[5]
+    ldi     x2, 0           ;[6] Carry is zero due to brcc
+    rol     shift           ;[7] compensate for ror shift at branch destination
+    rjmp    didStuff6       ;[8]
+
+bitstuff7:
+    ldi     x2, 0           ;[2] Carry is zero due to brcc
+    rjmp    didStuff7       ;[3]
+
+
+sendNakAndReti:
+    ldi     x3, USBPID_NAK  ;[-18]
+    rjmp    sendX3AndReti   ;[-17]
+sendAckAndReti:
+    ldi     cnt, USBPID_ACK ;[-17]
+sendCntAndReti:
+    mov     x3, cnt         ;[-16]
+sendX3AndReti:
+    ldi     YL, 20          ;[-15] x3==r20 address is 20
+    ldi     YH, 0           ;[-14]
+    ldi     cnt, 2          ;[-13]
+;   rjmp    usbSendAndReti      fallthrough
+
+;usbSend:
+;pointer to data in 'Y'
+;number of bytes in 'cnt' -- including sync byte [range 2 ... 12]
+;uses: x1...x4, btcnt, shift, cnt, Y
+;Numbers in brackets are time since first bit of sync pattern is sent
+;We don't match the transfer rate exactly (don't insert leap cycles every third
+;byte) because the spec demands only 1.5% precision anyway.
+usbSendAndReti:             ; 12 cycles until SOP
+    in      x2, USBDDR      ;[-12]
+    ori     x2, USBMASK     ;[-11]
+    sbi     USBOUT, USBMINUS;[-10] prepare idle state; D+ and D- must have been 0 (no pullups)
+    in      x1, USBOUT      ;[-8] port mirror for tx loop
+    out     USBDDR, x2      ;[-7] <- acquire bus
+; need not init x2 (bitstuff history) because sync starts with 0
+    ldi     x4, USBMASK     ;[-6] exor mask
+    ldi     shift, 0x80     ;[-5] sync byte is first byte sent
+txByteLoop:
+    ldi     bitcnt, 0x35    ;[-4] [6] binary 0011 0101
+txBitLoop:
+    sbrs    shift, 0        ;[-3] [7]
+    eor     x1, x4          ;[-2] [8]
+    out     USBOUT, x1      ;[-1] [9] <-- out N
+    ror     shift           ;[0] [10]
+    ror     x2              ;[1]
+didStuffN:
+    cpi     x2, 0xfc        ;[2]
+    brcc    bitstuffN       ;[3]
+    lsr     bitcnt          ;[4]
+    brcc    txBitLoop       ;[5]
+    brne    txBitLoop       ;[6]
+
+    sbrs    shift, 0        ;[7]
+    eor     x1, x4          ;[8]
+didStuff6:
+    out     USBOUT, x1      ;[-1] [9] <-- out 6
+    ror     shift           ;[0] [10]
+    ror     x2              ;[1]
+    cpi     x2, 0xfc        ;[2]
+    brcc    bitstuff6       ;[3]
+    ror     shift           ;[4]
+didStuff7:
+    ror     x2              ;[5]
+    sbrs    x2, 7           ;[6]
+    eor     x1, x4          ;[7]
+    nop                     ;[8]
+    cpi     x2, 0xfc        ;[9]
+    out     USBOUT, x1      ;[-1][10] <-- out 7
+    brcc    bitstuff7       ;[0] [11]
+    ld      shift, y+       ;[1]
+    dec     cnt             ;[3]
+    brne    txByteLoop      ;[4]
+;make SE0:
+    cbr     x1, USBMASK     ;[5] prepare SE0 [spec says EOP may be 21 to 25 cycles]
+    lds     x2, usbNewDeviceAddr;[6]
+    lsl     x2              ;[8] we compare with left shifted address
+    subi    YL, 20 + 2      ;[9] Only assign address on data packets, not ACK/NAK in x3
+    sbci    YH, 0           ;[10]
+    out     USBOUT, x1      ;[11] <-- out SE0 -- from now 2 bits = 22 cycles until bus idle
+;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
+;set address only after data packet was sent, not after handshake
+    breq    skipAddrAssign  ;[0]
+    sts     usbDeviceAddr, x2; if not skipped: SE0 is one cycle longer
+skipAddrAssign:
+;end of usbDeviceAddress transfer
+    ldi     x2, 1<<USB_INTR_PENDING_BIT;[2] int0 occurred during TX -- clear pending flag
+    USB_STORE_PENDING(x2)   ;[3]
+    ori     x1, USBIDLE     ;[4]
+    in      x2, USBDDR      ;[5]
+    cbr     x2, USBMASK     ;[6] set both pins to input
+    mov     x3, x1          ;[7]
+    cbr     x3, USBMASK     ;[8] configure no pullup on both pins
+    ldi     x4, 4           ;[9]
+se0Delay:
+    dec     x4              ;[10] [13] [16] [19]
+    brne    se0Delay        ;[11] [14] [17] [20]
+    out     USBOUT, x1      ;[21] <-- out J (idle) -- end of SE0 (EOP signal)
+    out     USBDDR, x2      ;[22] <-- release bus now
+    out     USBOUT, x3      ;[23] <-- ensure no pull-up resistors are active
+    rjmp    doReturn
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm165.inc b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm165.inc
new file mode 100644
index 00000000..d8a95ba6
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm165.inc
@@ -0,0 +1,453 @@
+/* Name: usbdrvasm165.inc
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2007-04-22
+ * Tabsize: 4
+ * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * Revision: $Id$
+ */
+
+/* Do not link this file! Link usbdrvasm.S instead, which includes the
+ * appropriate implementation!
+ */
+
+/*
+General Description:
+This file is the 16.5 MHz version of the USB driver. It is intended for the
+ATTiny45 and similar controllers running on 16.5 MHz internal RC oscillator.
+This version contains a phase locked loop in the receiver routine to cope with
+slight clock rate deviations of up to +/- 1%.
+
+See usbdrv.h for a description of the entire driver.
+
+Since almost all of this code is timing critical, don't change unless you
+really know what you are doing! Many parts require not only a maximum number
+of CPU cycles, but even an exact number of cycles!
+*/
+
+;Software-receiver engine. Strict timing! Don't change unless you can preserve timing!
+;interrupt response time: 4 cycles + insn running = 7 max if interrupts always enabled
+;max allowable interrupt latency: 59 cycles -> max 52 cycles interrupt disable
+;max stack usage: [ret(2), r0, SREG, YL, YH, shift, x1, x2, x3, x4, cnt] = 12 bytes
+;nominal frequency: 16.5 MHz -> 11 cycles per bit
+; 16.3125 MHz < F_CPU < 16.6875 MHz (+/- 1.1%)
+; Numbers in brackets are clocks counted from center of last sync bit
+; when instruction starts
+
+
+USB_INTR_VECTOR:
+;order of registers pushed: YL, SREG [sofError], r0, YH, shift, x1, x2, x3, x4, cnt
+    push    YL                  ;[-23] push only what is necessary to sync with edge ASAP
+    in      YL, SREG            ;[-21]
+    push    YL                  ;[-20]
+;----------------------------------------------------------------------------
+; Synchronize with sync pattern:
+;----------------------------------------------------------------------------
+;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
+;sync up with J to K edge during sync pattern -- use fastest possible loops
+;The first part waits at most 1 bit long since we must be in sync pattern.
+;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
+;waitForJ, ensure that this prerequisite is met.
+waitForJ:
+    inc     YL
+    sbis    USBIN, USBMINUS
+    brne    waitForJ        ; just make sure we have ANY timeout
+waitForK:
+;The following code results in a sampling window of < 1/4 bit which meets the spec.
+    sbis    USBIN, USBMINUS     ;[-15]
+    rjmp    foundK              ;[-14]
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+#if USB_COUNT_SOF
+    lds     YL, usbSofCount
+    inc     YL
+    sts     usbSofCount, YL
+#endif  /* USB_COUNT_SOF */
+#ifdef USB_SOF_HOOK
+    USB_SOF_HOOK
+#endif
+    rjmp    sofError
+foundK:                         ;[-12]
+;{3, 5} after falling D- edge, average delay: 4 cycles [we want 5 for center sampling]
+;we have 1 bit time for setup purposes, then sample again. Numbers in brackets
+;are cycles from center of first sync (double K) bit after the instruction
+    push    r0                  ;[-12]
+;   [---]                       ;[-11]
+    push    YH                  ;[-10]
+;   [---]                       ;[-9]
+    lds     YL, usbInputBufOffset;[-8]
+;   [---]                       ;[-7]
+    clr     YH                  ;[-6]
+    subi    YL, lo8(-(usbRxBuf));[-5] [rx loop init]
+    sbci    YH, hi8(-(usbRxBuf));[-4] [rx loop init]
+    mov     r0, x2              ;[-3] [rx loop init]
+    sbis    USBIN, USBMINUS     ;[-2] we want two bits K (sample 2 cycles too early)
+    rjmp    haveTwoBitsK        ;[-1]
+    pop     YH                  ;[0] undo the pushes from before
+    pop     r0                  ;[2]
+    rjmp    waitForK            ;[4] this was not the end of sync, retry
+; The entire loop from waitForK until rjmp waitForK above must not exceed two
+; bit times (= 22 cycles).
+
+;----------------------------------------------------------------------------
+; push more registers and initialize values while we sample the first bits:
+;----------------------------------------------------------------------------
+haveTwoBitsK:               ;[1]
+    push    shift           ;[1]
+    push    x1              ;[3]
+    push    x2              ;[5]
+    push    x3              ;[7]
+    ldi     shift, 0xff     ;[9] [rx loop init]
+    ori     x3, 0xff        ;[10] [rx loop init] == ser x3, clear zero flag
+
+    in      x1, USBIN       ;[11] <-- sample bit 0
+    bst     x1, USBMINUS    ;[12]
+    bld     shift, 0        ;[13]
+    push    x4              ;[14] == phase
+;   [---]                   ;[15]
+    push    cnt             ;[16]
+;   [---]                   ;[17]
+    ldi     phase, 0        ;[18] [rx loop init]
+    ldi     cnt, USB_BUFSIZE;[19] [rx loop init]
+    rjmp    rxbit1          ;[20]
+;   [---]                   ;[21]
+
+;----------------------------------------------------------------------------
+; Receiver loop (numbers in brackets are cycles within byte after instr)
+;----------------------------------------------------------------------------
+/*
+byte oriented operations done during loop:
+bit 0: store data
+bit 1: SE0 check
+bit 2: overflow check
+bit 3: catch up
+bit 4: rjmp to achieve conditional jump range
+bit 5: PLL
+bit 6: catch up
+bit 7: jump, fixup bitstuff
+; 87 [+ 2] cycles
+------------------------------------------------------------------
+*/
+continueWithBit5:
+    in      x2, USBIN       ;[055] <-- bit 5
+    eor     r0, x2          ;[056]
+    or      phase, r0       ;[057]
+    sbrc    phase, USBMINUS ;[058]
+    lpm                     ;[059] optional nop3; modifies r0
+    in      phase, USBIN    ;[060] <-- phase
+    eor     x1, x2          ;[061]
+    bst     x1, USBMINUS    ;[062]
+    bld     shift, 5        ;[063]
+    andi    shift, 0x3f     ;[064]
+    in      x1, USBIN       ;[065] <-- bit 6
+    breq    unstuff5        ;[066] *** unstuff escape
+    eor     phase, x1       ;[067]
+    eor     x2, x1          ;[068]
+    bst     x2, USBMINUS    ;[069]
+    bld     shift, 6        ;[070]
+didUnstuff6:                ;[   ]
+    in      r0, USBIN       ;[071] <-- phase
+    cpi     shift, 0x02     ;[072]
+    brlo    unstuff6        ;[073] *** unstuff escape
+didUnstuff5:                ;[   ]
+    nop2                    ;[074]
+;   [---]                   ;[075]
+    in      x2, USBIN       ;[076] <-- bit 7
+    eor     x1, x2          ;[077]
+    bst     x1, USBMINUS    ;[078]
+    bld     shift, 7        ;[079]
+didUnstuff7:                ;[   ]
+    eor     r0, x2          ;[080]
+    or      phase, r0       ;[081]
+    in      r0, USBIN       ;[082] <-- phase
+    cpi     shift, 0x04     ;[083]
+    brsh    rxLoop          ;[084]
+;   [---]                   ;[085]
+unstuff7:                   ;[   ]
+    andi    x3, ~0x80       ;[085]
+    ori     shift, 0x80     ;[086]
+    in      x2, USBIN       ;[087] <-- sample stuffed bit 7
+    nop                     ;[088]
+    rjmp    didUnstuff7     ;[089]
+;   [---]                   ;[090]
+                            ;[080]
+
+unstuff5:                   ;[067]
+    eor     phase, x1       ;[068]
+    andi    x3, ~0x20       ;[069]
+    ori     shift, 0x20     ;[070]
+    in      r0, USBIN       ;[071] <-- phase
+    mov     x2, x1          ;[072]
+    nop                     ;[073]
+    nop2                    ;[074]
+;   [---]                   ;[075]
+    in      x1, USBIN       ;[076] <-- bit 6
+    eor     r0, x1          ;[077]
+    or      phase, r0       ;[078]
+    eor     x2, x1          ;[079]
+    bst     x2, USBMINUS    ;[080]
+    bld     shift, 6        ;[081] no need to check bitstuffing, we just had one
+    in      r0, USBIN       ;[082] <-- phase
+    rjmp    didUnstuff5     ;[083]
+;   [---]                   ;[084]
+                            ;[074]
+
+unstuff6:                   ;[074]
+    andi    x3, ~0x40       ;[075]
+    in      x1, USBIN       ;[076] <-- bit 6 again
+    ori     shift, 0x40     ;[077]
+    nop2                    ;[078]
+;   [---]                   ;[079]
+    rjmp    didUnstuff6     ;[080]
+;   [---]                   ;[081]
+                            ;[071]
+
+unstuff0:                   ;[013]
+    eor     r0, x2          ;[014]
+    or      phase, r0       ;[015]
+    andi    x2, USBMASK     ;[016] check for SE0
+    in      r0, USBIN       ;[017] <-- phase
+    breq    didUnstuff0     ;[018] direct jump to se0 would be too long
+    andi    x3, ~0x01       ;[019]
+    ori     shift, 0x01     ;[020]
+    mov     x1, x2          ;[021] mov existing sample
+    in      x2, USBIN       ;[022] <-- bit 1 again
+    rjmp    didUnstuff0     ;[023]
+;   [---]                   ;[024]
+                            ;[014]
+
+unstuff1:                   ;[024]
+    eor     r0, x1          ;[025]
+    or      phase, r0       ;[026]
+    andi    x3, ~0x02       ;[027]
+    in      r0, USBIN       ;[028] <-- phase
+    ori     shift, 0x02     ;[029]
+    mov     x2, x1          ;[030]
+    rjmp    didUnstuff1     ;[031]
+;   [---]                   ;[032]
+                            ;[022]
+
+unstuff2:                   ;[035]
+    eor     r0, x2          ;[036]
+    or      phase, r0       ;[037]
+    andi    x3, ~0x04       ;[038]
+    in      r0, USBIN       ;[039] <-- phase
+    ori     shift, 0x04     ;[040]
+    mov     x1, x2          ;[041]
+    rjmp    didUnstuff2     ;[042]
+;   [---]                   ;[043]
+                            ;[033]
+
+unstuff3:                   ;[043]
+    in      x2, USBIN       ;[044] <-- bit 3 again
+    eor     r0, x2          ;[045]
+    or      phase, r0       ;[046]
+    andi    x3, ~0x08       ;[047]
+    ori     shift, 0x08     ;[048]
+    nop                     ;[049]
+    in      r0, USBIN       ;[050] <-- phase
+    rjmp    didUnstuff3     ;[051]
+;   [---]                   ;[052]
+                            ;[042]
+
+unstuff4:                   ;[053]
+    andi    x3, ~0x10       ;[054]
+    in      x1, USBIN       ;[055] <-- bit 4 again
+    ori     shift, 0x10     ;[056]
+    rjmp    didUnstuff4     ;[057]
+;   [---]                   ;[058]
+                            ;[048]
+
+rxLoop:                     ;[085]
+    eor     x3, shift       ;[086] reconstruct: x3 is 0 at bit locations we changed, 1 at others
+    in      x1, USBIN       ;[000] <-- bit 0
+    st      y+, x3          ;[001]
+;   [---]                   ;[002]
+    eor     r0, x1          ;[003]
+    or      phase, r0       ;[004]
+    eor     x2, x1          ;[005]
+    in      r0, USBIN       ;[006] <-- phase
+    ser     x3              ;[007]
+    bst     x2, USBMINUS    ;[008]
+    bld     shift, 0        ;[009]
+    andi    shift, 0xf9     ;[010]
+rxbit1:                     ;[   ]
+    in      x2, USBIN       ;[011] <-- bit 1
+    breq    unstuff0        ;[012] *** unstuff escape
+    andi    x2, USBMASK     ;[013] SE0 check for bit 1
+didUnstuff0:                ;[   ] Z only set if we detected SE0 in bitstuff
+    breq    se0             ;[014]
+    eor     r0, x2          ;[015]
+    or      phase, r0       ;[016]
+    in      r0, USBIN       ;[017] <-- phase
+    eor     x1, x2          ;[018]
+    bst     x1, USBMINUS    ;[019]
+    bld     shift, 1        ;[020]
+    andi    shift, 0xf3     ;[021]
+didUnstuff1:                ;[   ]
+    in      x1, USBIN       ;[022] <-- bit 2
+    breq    unstuff1        ;[023] *** unstuff escape
+    eor     r0, x1          ;[024]
+    or      phase, r0       ;[025]
+    subi    cnt, 1          ;[026] overflow check
+    brcs    overflow        ;[027]
+    in      r0, USBIN       ;[028] <-- phase
+    eor     x2, x1          ;[029]
+    bst     x2, USBMINUS    ;[030]
+    bld     shift, 2        ;[031]
+    andi    shift, 0xe7     ;[032]
+didUnstuff2:                ;[   ]
+    in      x2, USBIN       ;[033] <-- bit 3
+    breq    unstuff2        ;[034] *** unstuff escape
+    eor     r0, x2          ;[035]
+    or      phase, r0       ;[036]
+    eor     x1, x2          ;[037]
+    bst     x1, USBMINUS    ;[038]
+    in      r0, USBIN       ;[039] <-- phase
+    bld     shift, 3        ;[040]
+    andi    shift, 0xcf     ;[041]
+didUnstuff3:                ;[   ]
+    breq    unstuff3        ;[042] *** unstuff escape
+    nop                     ;[043]
+    in      x1, USBIN       ;[044] <-- bit 4
+    eor     x2, x1          ;[045]
+    bst     x2, USBMINUS    ;[046]
+    bld     shift, 4        ;[047]
+didUnstuff4:                ;[   ]
+    eor     r0, x1          ;[048]
+    or      phase, r0       ;[049]
+    in      r0, USBIN       ;[050] <-- phase
+    andi    shift, 0x9f     ;[051]
+    breq    unstuff4        ;[052] *** unstuff escape
+    rjmp    continueWithBit5;[053]
+;   [---]                   ;[054]
+
+macro POP_STANDARD ; 16 cycles
+    pop     cnt
+    pop     x4
+    pop     x3
+    pop     x2
+    pop     x1
+    pop     shift
+    pop     YH
+    pop     r0
+    endm
+macro POP_RETI     ; 5 cycles
+    pop     YL
+    out     SREG, YL
+    pop     YL
+    endm
+
+#include "asmcommon.inc"
+
+
+; USB spec says:
+; idle = J
+; J = (D+ = 0), (D- = 1)
+; K = (D+ = 1), (D- = 0)
+; Spec allows 7.5 bit times from EOP to SOP for replies
+
+bitstuff7:
+    eor     x1, x4          ;[4]
+    ldi     x2, 0           ;[5]
+    nop2                    ;[6] C is zero (brcc)
+    rjmp    didStuff7       ;[8]
+
+bitstuffN:
+    eor     x1, x4          ;[5]
+    ldi     x2, 0           ;[6]
+    lpm                     ;[7] 3 cycle NOP, modifies r0
+    out     USBOUT, x1      ;[10] <-- out
+    rjmp    didStuffN       ;[0]
+
+#define bitStatus   x3
+
+sendNakAndReti:
+    ldi     cnt, USBPID_NAK ;[-19]
+    rjmp    sendCntAndReti  ;[-18]
+sendAckAndReti:
+    ldi     cnt, USBPID_ACK ;[-17]
+sendCntAndReti:
+    mov     r0, cnt         ;[-16]
+    ldi     YL, 0           ;[-15] R0 address is 0
+    ldi     YH, 0           ;[-14]
+    ldi     cnt, 2          ;[-13]
+;   rjmp    usbSendAndReti      fallthrough
+
+;usbSend:
+;pointer to data in 'Y'
+;number of bytes in 'cnt' -- including sync byte [range 2 ... 12]
+;uses: x1...x4, shift, cnt, Y
+;Numbers in brackets are time since first bit of sync pattern is sent
+usbSendAndReti:             ; 12 cycles until SOP
+    in      x2, USBDDR      ;[-12]
+    ori     x2, USBMASK     ;[-11]
+    sbi     USBOUT, USBMINUS;[-10] prepare idle state; D+ and D- must have been 0 (no pullups)
+    in      x1, USBOUT      ;[-8] port mirror for tx loop
+    out     USBDDR, x2      ;[-7] <- acquire bus
+; need not init x2 (bitstuff history) because sync starts with 0
+    ldi     x4, USBMASK     ;[-6] exor mask
+    ldi     shift, 0x80     ;[-5] sync byte is first byte sent
+    ldi     bitStatus, 0xff ;[-4] init bit loop counter, works for up to 12 bytes
+byteloop:
+bitloop:
+    sbrs    shift, 0        ;[8] [-3]
+    eor     x1, x4          ;[9] [-2]
+    out     USBOUT, x1      ;[10] [-1] <-- out
+    ror     shift           ;[0]
+    ror     x2              ;[1]
+didStuffN:
+    cpi     x2, 0xfc        ;[2]
+    brcc    bitstuffN       ;[3]
+    nop                     ;[4]
+    subi    bitStatus, 37   ;[5] 256 / 7 ~=~ 37
+    brcc    bitloop         ;[6] when we leave the loop, bitStatus has almost the initial value
+    sbrs    shift, 0        ;[7]
+    eor     x1, x4          ;[8]
+    ror     shift           ;[9]
+didStuff7:
+    out     USBOUT, x1      ;[10] <-- out
+    ror     x2              ;[0]
+    cpi     x2, 0xfc        ;[1]
+    brcc    bitstuff7       ;[2]
+    ld      shift, y+       ;[3]
+    dec     cnt             ;[5]
+    brne    byteloop        ;[6]
+;make SE0:
+    cbr     x1, USBMASK     ;[7] prepare SE0 [spec says EOP may be 21 to 25 cycles]
+    lds     x2, usbNewDeviceAddr;[8]
+    lsl     x2              ;[10] we compare with left shifted address
+    out     USBOUT, x1      ;[11] <-- out SE0 -- from now 2 bits = 22 cycles until bus idle
+;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
+;set address only after data packet was sent, not after handshake
+    subi    YL, 2           ;[0] Only assign address on data packets, not ACK/NAK in r0
+    sbci    YH, 0           ;[1]
+    breq    skipAddrAssign  ;[2]
+    sts     usbDeviceAddr, x2; if not skipped: SE0 is one cycle longer
+skipAddrAssign:
+;end of usbDeviceAddress transfer
+    ldi     x2, 1<<USB_INTR_PENDING_BIT;[4] int0 occurred during TX -- clear pending flag
+    USB_STORE_PENDING(x2)   ;[5]
+    ori     x1, USBIDLE     ;[6]
+    in      x2, USBDDR      ;[7]
+    cbr     x2, USBMASK     ;[8] set both pins to input
+    mov     x3, x1          ;[9]
+    cbr     x3, USBMASK     ;[10] configure no pullup on both pins
+    ldi     x4, 4           ;[11]
+se0Delay:
+    dec     x4              ;[12] [15] [18] [21]
+    brne    se0Delay        ;[13] [16] [19] [22]
+    out     USBOUT, x1      ;[23] <-- out J (idle) -- end of SE0 (EOP signal)
+    out     USBDDR, x2      ;[24] <-- release bus now
+    out     USBOUT, x3      ;[25] <-- ensure no pull-up resistors are active
+    rjmp    doReturn
+
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm18-crc.inc b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm18-crc.inc
new file mode 100644
index 00000000..dde09da0
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm18-crc.inc
@@ -0,0 +1,707 @@
+/* Name: usbdrvasm18.inc
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Lukas Schrittwieser (based on 20 MHz usbdrvasm20.inc by Jeroen Benschop)
+ * Creation Date: 2009-01-20
+ * Tabsize: 4
+ * Copyright: (c) 2008 by Lukas Schrittwieser and OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * Revision: $Id$
+ */
+
+/* Do not link this file! Link usbdrvasm.S instead, which includes the
+ * appropriate implementation!
+ */
+
+/*
+General Description:
+This file is the 18 MHz version of the asssembler part of the USB driver. It
+requires a 18 MHz crystal (not a ceramic resonator and not a calibrated RC
+oscillator).
+
+See usbdrv.h for a description of the entire driver.
+
+Since almost all of this code is timing critical, don't change unless you
+really know what you are doing! Many parts require not only a maximum number
+of CPU cycles, but even an exact number of cycles!
+*/
+
+
+;max stack usage: [ret(2), YL, SREG, YH, [sofError], bitcnt(x5), shift, x1, x2, x3, x4, cnt, ZL, ZH] = 14 bytes
+;nominal frequency: 18 MHz -> 12 cycles per bit
+; Numbers in brackets are clocks counted from center of last sync bit
+; when instruction starts
+;register use in receive loop to receive the data bytes:
+; shift assembles the byte currently being received
+; x1 holds the D+ and D- line state
+; x2 holds the previous line state
+; cnt holds the number of bytes left in the receive buffer
+; x3 holds the higher crc byte (see algorithm below)
+; x4 is used as temporary register for the crc algorithm
+; x5 is used for unstuffing: when unstuffing the last received bit is inverted in shift (to prevent further
+;    unstuffing calls. In the same time the corresponding bit in x5 is cleared to mark the bit as beening iverted
+; zl lower crc value and crc table index
+; zh used for crc table accesses
+
+;--------------------------------------------------------------------------------------------------------------
+; CRC mods:
+;  table driven crc checker, Z points to table in prog space
+;   ZL is the lower crc byte, x3 is the higher crc byte
+;	x4 is used as temp register to store different results
+;	the initialization of the crc register is not 0xFFFF but 0xFE54. This is because during the receipt of the
+;	first data byte an virtual zero data byte is added to the crc register, this results in the correct initial
+;	value of 0xFFFF at beginning of the second data byte before the first data byte is added to the crc.
+;	The magic number 0xFE54 results form the crc table: At tabH[0x54] = 0xFF = crcH (required) and
+;	tabL[0x54] = 0x01  ->  crcL = 0x01 xor 0xFE = 0xFF
+;  bitcnt is renamed to x5 and is used for unstuffing purposes, the unstuffing works like in the 12MHz version
+;--------------------------------------------------------------------------------------------------------------
+; CRC algorithm:
+;	The crc register is formed by x3 (higher byte) and ZL (lower byte). The algorithm uses a 'reversed' form
+;	i.e. that it takes the least significant bit first and shifts to the right. So in fact the highest order
+;	bit seen from the polynomial devision point of view is the lsb of ZL. (If this sounds strange to you i
+;	propose a research on CRC :-) )
+;	Each data byte received is xored to ZL, the lower crc byte. This byte now builds the crc
+;	table index. Next the new high byte is loaded from the table and stored in x4 until we have space in x3
+;	(its destination).
+;	Afterwards the lower table is loaded from the table and stored in ZL (the old index is overwritten as
+;	we don't need it anymore. In fact this is a right shift by 8 bits.) Now the old crc high value is xored
+;	to ZL, this is the second shift of the old crc value. Now x4 (the temp reg) is moved to x3 and the crc
+; 	calculation is done.
+;	Prior to the first byte the two CRC register have to be initialized to 0xFFFF (as defined in usb spec)
+;	however the crc engine also runs during the receipt of the first byte, therefore x3 and zl are initialized
+;	to a magic number which results in a crc value of 0xFFFF after the first complete byte.
+;
+;	This algorithm is split into the extra cycles of the different bits:
+;	bit7:	XOR the received byte to ZL
+;	bit5:	load the new high byte to x4
+;	bit6:	load the lower xor byte from the table, xor zl and x3, store result in zl (=the new crc low value)
+;			move x4 (the new high byte) to x3, the crc value is ready
+;
+
+
+macro POP_STANDARD ; 18 cycles
+    pop		ZH
+    pop		ZL
+	pop     cnt
+    pop     x5
+    pop     x3
+    pop     x2
+    pop     x1
+    pop     shift
+    pop     x4
+    endm
+macro POP_RETI     ; 7 cycles
+    pop     YH
+    pop     YL
+    out     SREG, YL
+    pop     YL
+    endm
+
+macro CRC_CLEANUP_AND_CHECK
+	; the last byte has already been xored with the lower crc byte, we have to do the table lookup and xor
+	; x3 is the higher crc byte, zl the lower one
+	ldi		ZH, hi8(usbCrcTableHigh);[+1] get the new high byte from the table
+	lpm		x2, Z				;[+2][+3][+4]
+	ldi		ZH, hi8(usbCrcTableLow);[+5] get the new low xor byte from the table
+	lpm		ZL, Z				;[+6][+7][+8]
+	eor		ZL, x3				;[+7] xor the old high byte with the value from the table, x2:ZL now holds the crc value
+	cpi		ZL, 0x01			;[+8] if the crc is ok we have a fixed remainder value of 0xb001 in x2:ZL (see usb spec)
+	brne	ignorePacket		;[+9] detected a crc fault -> paket is ignored and retransmitted by the host
+	cpi		x2, 0xb0			;[+10]
+	brne	ignorePacket		;[+11] detected a crc fault -> paket is ignored and retransmitted by the host
+    endm
+
+
+USB_INTR_VECTOR:
+;order of registers pushed: YL, SREG, YH, [sofError], x4, shift, x1, x2, x3, x5, cnt, ZL, ZH
+    push    YL                  ;[-28] push only what is necessary to sync with edge ASAP
+    in      YL, SREG            ;[-26]
+    push    YL                  ;[-25]
+    push    YH                  ;[-23]
+;----------------------------------------------------------------------------
+; Synchronize with sync pattern:
+;----------------------------------------------------------------------------
+;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
+;sync up with J to K edge during sync pattern -- use fastest possible loops
+;The first part waits at most 1 bit long since we must be in sync pattern.
+;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
+;waitForJ, ensure that this prerequisite is met.
+waitForJ:
+    inc     YL
+    sbis    USBIN, USBMINUS
+    brne    waitForJ        ; just make sure we have ANY timeout
+waitForK:
+;The following code results in a sampling window of < 1/4 bit which meets the spec.
+    sbis    USBIN, USBMINUS     ;[-17]
+    rjmp    foundK              ;[-16]
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+#if USB_COUNT_SOF
+    lds     YL, usbSofCount
+    inc     YL
+    sts     usbSofCount, YL
+#endif  /* USB_COUNT_SOF */
+#ifdef USB_SOF_HOOK
+    USB_SOF_HOOK
+#endif
+    rjmp    sofError
+foundK:                         ;[-15]
+;{3, 5} after falling D- edge, average delay: 4 cycles
+;bit0 should be at 30  (2.5 bits) for center sampling. Currently at 4 so 26 cylces till bit 0 sample
+;use 1 bit time for setup purposes, then sample again. Numbers in brackets
+;are cycles from center of first sync (double K) bit after the instruction
+    push    x4                  ;[-14]
+;   [---]                       ;[-13]
+    lds     YL, usbInputBufOffset;[-12] used to toggle the two usb receive buffers
+;   [---]                       ;[-11]
+    clr     YH                  ;[-10]
+    subi    YL, lo8(-(usbRxBuf));[-9] [rx loop init]
+    sbci    YH, hi8(-(usbRxBuf));[-8] [rx loop init]
+    push    shift               ;[-7]
+;   [---]                       ;[-6]
+    ldi		shift, 0x80			;[-5] the last bit is the end of byte marker for the pid receiver loop
+    clc			      	      	;[-4] the carry has to be clear for receipt of pid bit 0
+    sbis    USBIN, USBMINUS     ;[-3] we want two bits K (sample 3 cycles too early)
+    rjmp    haveTwoBitsK        ;[-2]
+    pop     shift               ;[-1] undo the push from before
+    pop     x4                  ;[1]
+    rjmp    waitForK            ;[3] this was not the end of sync, retry
+; The entire loop from waitForK until rjmp waitForK above must not exceed two
+; bit times (= 24 cycles).
+
+;----------------------------------------------------------------------------
+; push more registers and initialize values while we sample the first bits:
+;----------------------------------------------------------------------------
+haveTwoBitsK:
+    push    x1                  ;[0]
+    push    x2                  ;[2]
+    push    x3                  ;[4] crc high byte
+    ldi     x2, 1<<USBPLUS      ;[6] [rx loop init] current line state is K state. D+=="1", D-=="0"
+    push    x5                  ;[7]
+    push    cnt                 ;[9]
+    ldi     cnt, USB_BUFSIZE    ;[11]
+
+
+;--------------------------------------------------------------------------------------------------------------
+; receives the pid byte
+; there is no real unstuffing algorithm implemented here as a stuffing bit is impossible in the pid byte.
+; That's because the last four bits of the byte are the inverted of the first four bits. If we detect a
+; unstuffing condition something went wrong and abort
+; shift has to be initialized to 0x80
+;--------------------------------------------------------------------------------------------------------------
+
+; pid bit 0 - used for even more register saving (we need the z pointer)
+	in      x1, USBIN           ;[0] sample line state
+    andi    x1, USBMASK         ;[1] filter only D+ and D- bits
+    eor		x2, x1				;[2] generate inverted of actual bit
+	sbrc	x2, USBMINUS		;[3] if the bit is set we received a zero
+	sec							;[4]
+	ror		shift				;[5] we perform no unstuffing check here as this is the first bit
+	mov		x2, x1				;[6]
+	push	ZL					;[7]
+								;[8]
+	push	ZH					;[9]
+								;[10]
+	ldi		x3, 0xFE			;[11] x3 is the high order crc value
+
+
+bitloopPid:						
+	in      x1, USBIN           ;[0] sample line state
+   	andi    x1, USBMASK         ;[1] filter only D+ and D- bits
+    breq    nse0                ;[2] both lines are low so handle se0	
+	eor		x2, x1				;[3] generate inverted of actual bit
+	sbrc	x2, USBMINUS		;[4] set the carry if we received a zero
+	sec							;[5]
+	ror		shift				;[6]
+	ldi		ZL, 0x54			;[7] ZL is the low order crc value
+	ser		x4					;[8] the is no bit stuffing check here as the pid bit can't be stuffed. if so
+								; some error occured. In this case the paket is discarded later on anyway.
+	mov		x2, x1				;[9] prepare for the next cycle
+	brcc	bitloopPid			;[10] while 0s drop out of shift we get the next bit
+	eor		x4, shift			;[11] invert all bits in shift and store result in x4
+
+;--------------------------------------------------------------------------------------------------------------
+; receives data bytes and calculates the crc
+; the last USBIN state has to be in x2
+; this is only the first half, due to branch distanc limitations the second half of the loop is near the end
+; of this asm file
+;--------------------------------------------------------------------------------------------------------------
+
+rxDataStart:
+    in      x1, USBIN           ;[0] sample line state (note: a se0 check is not useful due to bit dribbling)
+    ser		x5					;[1] prepare the unstuff marker register
+    eor		x2, x1             	;[2] generates the inverted of the actual bit
+    bst		x2, USBMINUS       	;[3] copy the bit from x2
+    bld		shift, 0	        ;[4] and store it in shift
+    mov		x2, shift	     	;[5] make a copy of shift for unstuffing check
+    andi	x2, 0xF9	      	;[6] mask the last six bits, if we got six zeros (which are six ones in fact)
+    breq	unstuff0	      	;[7] then Z is set now and we branch to the unstuffing handler
+didunstuff0:
+	subi    cnt, 1         		;[8] cannot use dec because it doesn't affect the carry flag
+    brcs    nOverflow    		;[9] Too many bytes received. Ignore packet							
+    st		Y+, x4				;[10] store the last received byte
+								;[11] st needs two cycles
+
+; bit1							
+	in		x2, USBIN			;[0] sample line state
+    andi	x1, USBMASK			;[1] check for se0 during bit 0
+    breq	nse0				;[2]
+    andi	x2, USBMASK			;[3] check se0 during bit 1
+    breq	nse0				;[4]
+	eor		x1, x2				;[5]
+    bst		x1, USBMINUS		;[6]
+    bld 	shift, 1	 		;[7]
+    mov		x1, shift			;[8]
+    andi	x1, 0xF3			;[9]
+    breq	unstuff1			;[10]
+didunstuff1:
+	nop							;[11]	
+
+; bit2
+	in      x1, USBIN           ;[0] sample line state
+    andi	x1, USBMASK			;[1] check for se0 (as there is nothing else to do here
+	breq	nOverflow	 		;[2]
+    eor		x2, x1              ;[3] generates the inverted of the actual bit
+    bst		x2, USBMINUS		;[4]
+    bld		shift, 2			;[5] store the bit
+    mov		x2, shift			;[6]
+    andi	x2, 0xE7			;[7] if we have six zeros here (which means six 1 in the stream)
+    breq	unstuff2			;[8] the next bit is a stuffing bit
+didunstuff2:
+	nop2						;[9]
+								;[10]
+	nop							;[11]					
+					
+; bit3							
+	in		x2, USBIN			;[0] sample line state
+    andi	x2, USBMASK			;[1] check for se0
+    breq	nOverflow           ;[2]
+    eor		x1, x2				;[3]
+    bst		x1, USBMINUS		;[4]
+    bld 	shift, 3	 		;[5]
+    mov		x1, shift			;[6]
+    andi	x1, 0xCF			;[7]
+    breq	unstuff3			;[8]
+didunstuff3:
+	nop							;[9]
+	rjmp 	rxDataBit4			;[10]
+								;[11]				
+
+; the avr branch instructions allow an offset of +63 insturction only, so we need this
+; 'local copy' of se0
+nse0:		
+	rjmp	se0					;[4]
+								;[5]
+; the same same as for se0 is needed for overflow and StuffErr
+nOverflow:
+stuffErr:
+	rjmp	overflow
+
+
+unstuff0:						;[8] this is the branch delay of breq unstuffX
+	andi	x1, USBMASK			;[9] do an se0 check here (if the last crc byte ends with 5 one's we might end up here
+	breq	didunstuff0			;[10] event tough the message is complete -> jump back and store the byte
+	ori		shift, 0x01			;[11] invert the last received bit to prevent furhter unstuffing
+	in		x2, USBIN			;[0] we have some free cycles so we could check for bit stuffing errors
+	andi	x5, 0xFE			;[1] mark this bit as inverted (will be corrected before storing shift)
+	eor		x1, x2				;[2] x1 and x2 have to be different because the stuff bit is always a zero
+	andi	x1, USBMASK			;[3] mask the interesting bits
+	breq	stuffErr			;[4] if the stuff bit is a 1-bit something went wrong
+	mov 	x1, x2				;[5] the next bit expects the last state to be in x1
+	rjmp 	didunstuff0			;[6]
+								;[7] jump delay of rjmp didunstuffX	
+
+unstuff1:						;[11] this is the jump delay of breq unstuffX
+	in		x1, USBIN			;[0] we have some free cycles so we could check for bit stuffing errors
+	ori		shift, 0x02			;[1] invert the last received bit to prevent furhter unstuffing
+	andi	x5, 0xFD			;[2] mark this bit as inverted (will be corrected before storing shift)
+	eor		x2, x1				;[3] x1 and x2 have to be different because the stuff bit is always a zero
+	andi	x2, USBMASK			;[4] mask the interesting bits
+	breq	stuffErr			;[5] if the stuff bit is a 1-bit something went wrong
+	mov 	x2, x1				;[6] the next bit expects the last state to be in x2
+	nop2						;[7]
+								;[8]
+	rjmp 	didunstuff1			;[9]
+								;[10] jump delay of rjmp didunstuffX		
+
+unstuff2:						;[9] this is the jump delay of breq unstuffX
+	ori		shift, 0x04			;[10] invert the last received bit to prevent furhter unstuffing
+	andi	x5, 0xFB			;[11] mark this bit as inverted (will be corrected before storing shift)
+	in		x2, USBIN			;[0] we have some free cycles so we could check for bit stuffing errors
+	eor		x1, x2				;[1] x1 and x2 have to be different because the stuff bit is always a zero
+	andi	x1, USBMASK			;[2] mask the interesting bits
+	breq	stuffErr			;[3] if the stuff bit is a 1-bit something went wrong
+	mov 	x1, x2				;[4] the next bit expects the last state to be in x1
+	nop2						;[5]
+								;[6]
+	rjmp 	didunstuff2			;[7]
+								;[8] jump delay of rjmp didunstuffX	
+
+unstuff3:						;[9] this is the jump delay of breq unstuffX
+	ori		shift, 0x08			;[10] invert the last received bit to prevent furhter unstuffing
+	andi	x5, 0xF7			;[11] mark this bit as inverted (will be corrected before storing shift)
+	in		x1, USBIN			;[0] we have some free cycles so we could check for bit stuffing errors
+	eor		x2, x1				;[1] x1 and x2 have to be different because the stuff bit is always a zero
+	andi	x2, USBMASK			;[2] mask the interesting bits
+	breq	stuffErr			;[3] if the stuff bit is a 1-bit something went wrong
+	mov 	x2, x1				;[4] the next bit expects the last state to be in x2
+	nop2						;[5]
+								;[6]
+	rjmp 	didunstuff3			;[7]
+								;[8] jump delay of rjmp didunstuffX			
+
+
+
+; the include has to be here due to branch distance restirctions
+#define __USE_CRC__
+#include "asmcommon.inc"
+
+	
+
+; USB spec says:
+; idle = J
+; J = (D+ = 0), (D- = 1)
+; K = (D+ = 1), (D- = 0)
+; Spec allows 7.5 bit times from EOP to SOP for replies
+; 7.5 bit times is 90 cycles. ...there is plenty of time
+
+
+sendNakAndReti:
+    ldi     x3, USBPID_NAK  ;[-18]
+    rjmp    sendX3AndReti   ;[-17]
+sendAckAndReti:
+    ldi     cnt, USBPID_ACK ;[-17]
+sendCntAndReti:
+    mov     x3, cnt         ;[-16]
+sendX3AndReti:
+    ldi     YL, 20          ;[-15] x3==r20 address is 20
+    ldi     YH, 0           ;[-14]
+    ldi     cnt, 2          ;[-13]
+;   rjmp    usbSendAndReti      fallthrough
+
+;usbSend:
+;pointer to data in 'Y'
+;number of bytes in 'cnt' -- including sync byte [range 2 ... 12]
+;uses: x1...x4, btcnt, shift, cnt, Y
+;Numbers in brackets are time since first bit of sync pattern is sent
+
+usbSendAndReti:             ; 12 cycles until SOP
+    in      x2, USBDDR      ;[-12]
+    ori     x2, USBMASK     ;[-11]
+    sbi     USBOUT, USBMINUS;[-10] prepare idle state; D+ and D- must have been 0 (no pullups)
+    in      x1, USBOUT      ;[-8] port mirror for tx loop
+    out     USBDDR, x2      ;[-6] <- acquire bus
+	ldi		x2, 0			;[-6] init x2 (bitstuff history) because sync starts with 0
+    ldi     x4, USBMASK     ;[-5] exor mask
+    ldi     shift, 0x80     ;[-4] sync byte is first byte sent
+txByteLoop:
+    ldi     bitcnt, 0x40    ;[-3]=[9]     binary 01000000
+txBitLoop:					; the loop sends the first 7 bits of the byte
+    sbrs    shift, 0        ;[-2]=[10] if we have to send a 1 don't change the line state
+    eor     x1, x4          ;[-1]=[11]
+    out     USBOUT, x1      ;[0]
+    ror     shift           ;[1]
+    ror     x2              ;[2] transfers the last sent bit to the stuffing history
+didStuffN:
+    nop	                    ;[3]
+    nop                     ;[4]
+    cpi     x2, 0xfc        ;[5] if we sent six consecutive ones
+    brcc    bitstuffN       ;[6]
+    lsr     bitcnt          ;[7]
+    brne    txBitLoop       ;[8] restart the loop while the 1 is still in the bitcount
+
+; transmit bit 7
+    sbrs    shift, 0        ;[9]
+    eor     x1, x4          ;[10]
+didStuff7:
+    ror     shift           ;[11]
+	out     USBOUT, x1      ;[0] transfer bit 7 to the pins
+    ror     x2              ;[1] move the bit into the stuffing history	
+    cpi     x2, 0xfc        ;[2]
+    brcc    bitstuff7       ;[3]
+    ld      shift, y+       ;[4] get next byte to transmit
+    dec     cnt             ;[5] decrement byte counter
+    brne    txByteLoop      ;[7] if we have more bytes start next one
+    						;[8] branch delay
+    						
+;make SE0:
+    cbr     x1, USBMASK     ;[8] 		prepare SE0 [spec says EOP may be 25 to 30 cycles]
+    lds     x2, usbNewDeviceAddr;[9]
+    lsl     x2              ;[11] 		we compare with left shifted address
+    out     USBOUT, x1      ;[0] 		<-- out SE0 -- from now 2 bits = 24 cycles until bus idle
+    subi    YL, 20 + 2      ;[1] 		Only assign address on data packets, not ACK/NAK in x3
+    sbci    YH, 0           ;[2]
+;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
+;set address only after data packet was sent, not after handshake
+    breq    skipAddrAssign  ;[3]
+    sts     usbDeviceAddr, x2		; if not skipped: SE0 is one cycle longer
+skipAddrAssign:
+;end of usbDeviceAddress transfer
+    ldi     x2, 1<<USB_INTR_PENDING_BIT;[5] int0 occurred during TX -- clear pending flag
+    USB_STORE_PENDING(x2)   ;[6]
+    ori     x1, USBIDLE     ;[7]
+    in      x2, USBDDR      ;[8]
+    cbr     x2, USBMASK     ;[9] set both pins to input
+    mov     x3, x1          ;[10]
+    cbr     x3, USBMASK     ;[11] configure no pullup on both pins
+    ldi     x4, 4           ;[12]
+se0Delay:
+    dec     x4              ;[13] [16] [19] [22]
+    brne    se0Delay        ;[14] [17] [20] [23]
+    out     USBOUT, x1      ;[24] <-- out J (idle) -- end of SE0 (EOP signal)
+    out     USBDDR, x2      ;[25] <-- release bus now
+    out     USBOUT, x3      ;[26] <-- ensure no pull-up resistors are active
+    rjmp    doReturn
+
+bitstuffN:
+    eor     x1, x4          ;[8] generate a zero
+    ldi     x2, 0           ;[9] reset the bit stuffing history
+    nop2                    ;[10]
+    out     USBOUT, x1      ;[0] <-- send the stuffing bit
+    rjmp    didStuffN       ;[1]
+
+bitstuff7:
+    eor     x1, x4          ;[5]
+    ldi     x2, 0           ;[6] reset bit stuffing history
+    clc						;[7] fill a zero into the shift register
+    rol     shift           ;[8] compensate for ror shift at branch destination
+    rjmp    didStuff7       ;[9]
+    						;[10] jump delay
+
+;--------------------------------------------------------------------------------------------------------------
+; receives data bytes and calculates the crc
+; second half of the data byte receiver loop
+; most parts of the crc algorithm are here
+;--------------------------------------------------------------------------------------------------------------
+
+nOverflow2:
+	rjmp overflow
+
+rxDataBit4:
+	in      x1, USBIN           ;[0] sample line state
+    andi	x1, USBMASK			;[1] check for se0
+    breq	nOverflow2			;[2]
+    eor		x2, x1              ;[3]
+    bst		x2, USBMINUS		;[4]
+    bld		shift, 4			;[5]
+    mov		x2, shift			;[6]
+    andi	x2, 0x9F			;[7]
+    breq	unstuff4			;[8]
+didunstuff4:
+	nop2						;[9][10]
+	nop							;[11]
+
+; bit5							
+	in		x2, USBIN			;[0] sample line state
+    ldi		ZH, hi8(usbCrcTableHigh);[1] use the table for the higher byte
+    eor		x1, x2				;[2]
+    bst		x1, USBMINUS		;[3]
+    bld 	shift, 5	 		;[4]
+    mov		x1, shift			;[5]
+    andi	x1, 0x3F			;[6]
+    breq	unstuff5			;[7]
+didunstuff5:
+	lpm		x4, Z				;[8] load the higher crc xor-byte and store it for later use
+								;[9] lpm needs 3 cycles
+								;[10]			
+	ldi		ZH, hi8(usbCrcTableLow);[11] load the lower crc xor byte adress
+
+; bit6	    					
+	in      x1, USBIN           ;[0] sample line state
+    eor		x2, x1              ;[1]
+    bst		x2, USBMINUS		;[2]
+    bld		shift, 6			;[3]
+    mov		x2, shift			;[4]
+    andi	x2, 0x7E			;[5]
+    breq	unstuff6			;[6]
+didunstuff6:
+	lpm		ZL, Z				;[7] load the lower xor crc byte
+								;[8] lpm needs 3 cycles
+	    						;[9]
+	eor		ZL, x3				;[10] xor the old high crc byte with the low xor-byte
+	mov		x3, x4				;[11] move the new high order crc value from temp to its destination
+			
+; bit7							
+	in		x2, USBIN			;[0] sample line state
+    eor		x1, x2				;[1]
+    bst		x1, USBMINUS		;[2]
+    bld 	shift, 7	 		;[3] now shift holds the complete but inverted data byte
+    mov		x1, shift			;[4]
+    andi	x1, 0xFC			;[5]
+    breq	unstuff7			;[6]
+didunstuff7:
+	eor		x5, shift			;[7] x5 marks all bits which have not been inverted by the unstuffing subs
+	mov		x4, x5				;[8] keep a copy of the data byte it will be stored during next bit0
+	eor		ZL, x4				;[9] feed the actual byte into the crc algorithm
+	rjmp	rxDataStart			;[10] next byte
+								;[11] during the reception of the next byte this one will be fed int the crc algorithm
+
+unstuff4:						;[9] this is the jump delay of rjmp unstuffX
+	ori		shift, 0x10			;[10] invert the last received bit to prevent furhter unstuffing
+	andi	x5, 0xEF			;[11] mark this bit as inverted (will be corrected before storing shift)
+	in		x2, USBIN			;[0] we have some free cycles so we could check for bit stuffing errors
+	eor		x1, x2				;[1] x1 and x2 have to be different because the stuff bit is always a zero
+	andi	x1, USBMASK			;[2] mask the interesting bits
+	breq	stuffErr2			;[3] if the stuff bit is a 1-bit something went wrong
+	mov 	x1, x2				;[4] the next bit expects the last state to be in x1
+	nop2						;[5]
+								;[6]
+	rjmp 	didunstuff4			;[7]
+								;[8] jump delay of rjmp didunstuffX	
+
+unstuff5:						;[8] this is the jump delay of rjmp unstuffX
+	nop							;[9]
+	ori		shift, 0x20			;[10] invert the last received bit to prevent furhter unstuffing
+	andi	x5, 0xDF			;[11] mark this bit as inverted (will be corrected before storing shift)
+	in		x1, USBIN			;[0] we have some free cycles so we could check for bit stuffing errors
+	eor		x2, x1				;[1] x1 and x2 have to be different because the stuff bit is always a zero
+	andi	x2, USBMASK			;[2] mask the interesting bits
+	breq	stuffErr2			;[3] if the stuff bit is a 1-bit something went wrong
+	mov 	x2, x1				;[4] the next bit expects the last state to be in x2
+	nop							;[5]
+	rjmp 	didunstuff5			;[6]
+								;[7] jump delay of rjmp didunstuffX													
+
+unstuff6:						;[7] this is the jump delay of rjmp unstuffX
+	nop2						;[8]
+								;[9]
+	ori		shift, 0x40			;[10] invert the last received bit to prevent furhter unstuffing
+	andi	x5, 0xBF			;[11] mark this bit as inverted (will be corrected before storing shift)
+	in		x2, USBIN			;[0] we have some free cycles so we could check for bit stuffing errors
+	eor		x1, x2				;[1] x1 and x2 have to be different because the stuff bit is always a zero
+	andi	x1, USBMASK			;[2] mask the interesting bits
+	breq	stuffErr2			;[3] if the stuff bit is a 1-bit something went wrong
+	mov 	x1, x2				;[4] the next bit expects the last state to be in x1
+	rjmp 	didunstuff6			;[5]
+								;[6] jump delay of rjmp didunstuffX	
+
+unstuff7:						;[7] this is the jump delay of rjmp unstuffX
+	nop							;[8]
+	nop							;[9]
+	ori		shift, 0x80			;[10] invert the last received bit to prevent furhter unstuffing
+	andi	x5, 0x7F			;[11] mark this bit as inverted (will be corrected before storing shift)
+	in		x1, USBIN			;[0] we have some free cycles so we could check for bit stuffing errors
+	eor		x2, x1				;[1] x1 and x2 have to be different because the stuff bit is always a zero
+	andi	x2, USBMASK			;[2] mask the interesting bits
+	breq	stuffErr2			;[3] if the stuff bit is a 1-bit something went wrong
+	mov 	x2, x1				;[4] the next bit expects the last state to be in x2
+	rjmp 	didunstuff7			;[5]
+								;[6] jump delay of rjmp didunstuff7
+
+; local copy of the stuffErr desitnation for the second half of the receiver loop
+stuffErr2:
+	rjmp	stuffErr
+
+;--------------------------------------------------------------------------------------------------------------
+; The crc table follows. It has to be aligned to enable a fast loading of the needed bytes.
+; There are two tables of 256 entries each, the low and the high byte table.
+; Table values were generated with the following C code:
+/*
+#include <stdio.h>
+int main (int argc, char **argv)
+{
+	int i, j;
+	for (i=0; i<512; i++){
+		unsigned short crc = i & 0xff;
+		for(j=0; j<8; j++) crc = (crc >> 1) ^ ((crc & 1) ? 0xa001 : 0);
+		if((i & 7) == 0) printf("\n.byte ");
+		printf("0x%02x, ", (i > 0xff ? (crc >> 8) : crc) & 0xff);
+		if(i == 255) printf("\n");
+	}
+	return 0;
+}
+
+// Use the following algorithm to compute CRC values:
+ushort computeCrc(uchar *msg, uchar msgLen)
+{
+    uchar i;
+	ushort crc = 0xffff;
+	for(i = 0; i < msgLen; i++)
+		crc = usbCrcTable16[lo8(crc) ^ msg[i]] ^ hi8(crc);
+    return crc;
+}
+*/
+
+.balign 256
+usbCrcTableLow:	
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+
+; .balign 256
+usbCrcTableHigh:
+.byte 0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2
+.byte 0xC6, 0x06, 0x07, 0xC7, 0x05, 0xC5, 0xC4, 0x04
+.byte 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E
+.byte 0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09, 0x08, 0xC8
+.byte 0xD8, 0x18, 0x19, 0xD9, 0x1B, 0xDB, 0xDA, 0x1A
+.byte 0x1E, 0xDE, 0xDF, 0x1F, 0xDD, 0x1D, 0x1C, 0xDC
+.byte 0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6
+.byte 0xD2, 0x12, 0x13, 0xD3, 0x11, 0xD1, 0xD0, 0x10
+.byte 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32
+.byte 0x36, 0xF6, 0xF7, 0x37, 0xF5, 0x35, 0x34, 0xF4
+.byte 0x3C, 0xFC, 0xFD, 0x3D, 0xFF, 0x3F, 0x3E, 0xFE
+.byte 0xFA, 0x3A, 0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38
+.byte 0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A, 0xEA
+.byte 0xEE, 0x2E, 0x2F, 0xEF, 0x2D, 0xED, 0xEC, 0x2C
+.byte 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26
+.byte 0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0
+.byte 0xA0, 0x60, 0x61, 0xA1, 0x63, 0xA3, 0xA2, 0x62
+.byte 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4
+.byte 0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F, 0x6E, 0xAE
+.byte 0xAA, 0x6A, 0x6B, 0xAB, 0x69, 0xA9, 0xA8, 0x68
+.byte 0x78, 0xB8, 0xB9, 0x79, 0xBB, 0x7B, 0x7A, 0xBA
+.byte 0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C
+.byte 0xB4, 0x74, 0x75, 0xB5, 0x77, 0xB7, 0xB6, 0x76
+.byte 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0
+.byte 0x50, 0x90, 0x91, 0x51, 0x93, 0x53, 0x52, 0x92
+.byte 0x96, 0x56, 0x57, 0x97, 0x55, 0x95, 0x94, 0x54
+.byte 0x9C, 0x5C, 0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E
+.byte 0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58, 0x98
+.byte 0x88, 0x48, 0x49, 0x89, 0x4B, 0x8B, 0x8A, 0x4A
+.byte 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C
+.byte 0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86
+.byte 0x82, 0x42, 0x43, 0x83, 0x41, 0x81, 0x80, 0x40	
+
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm20.inc b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm20.inc
new file mode 100644
index 00000000..0c746795
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbdrvasm20.inc
@@ -0,0 +1,360 @@
+/* Name: usbdrvasm20.inc
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Jeroen Benschop
+ * Based on usbdrvasm16.inc from Christian Starkjohann
+ * Creation Date: 2008-03-05
+ * Tabsize: 4
+ * Copyright: (c) 2008 by Jeroen Benschop and OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * Revision: $Id$
+ */
+
+/* Do not link this file! Link usbdrvasm.S instead, which includes the
+ * appropriate implementation!
+ */
+
+/*
+General Description:
+This file is the 20 MHz version of the asssembler part of the USB driver. It
+requires a 20 MHz crystal (not a ceramic resonator and not a calibrated RC
+oscillator).
+
+See usbdrv.h for a description of the entire driver.
+
+Since almost all of this code is timing critical, don't change unless you
+really know what you are doing! Many parts require not only a maximum number
+of CPU cycles, but even an exact number of cycles!
+*/
+
+#define leap2   x3
+#ifdef __IAR_SYSTEMS_ASM__
+#define nextInst    $+2
+#else
+#define nextInst    .+0
+#endif
+
+;max stack usage: [ret(2), YL, SREG, YH, bitcnt, shift, x1, x2, x3, x4, cnt] = 12 bytes
+;nominal frequency: 20 MHz -> 13.333333 cycles per bit, 106.666667 cycles per byte
+; Numbers in brackets are clocks counted from center of last sync bit
+; when instruction starts
+;register use in receive loop:
+; shift assembles the byte currently being received
+; x1 holds the D+ and D- line state
+; x2 holds the previous line state
+; x4 (leap)  is used to add a leap cycle once every three bytes received
+; X3 (leap2) is used to add a leap cycle once every three stuff bits received
+; bitcnt is used to determine when a stuff bit is due
+; cnt holds the number of bytes left in the receive buffer
+
+USB_INTR_VECTOR:
+;order of registers pushed: YL, SREG YH, [sofError], bitcnt, shift, x1, x2, x3, x4, cnt
+    push    YL                  ;[-28] push only what is necessary to sync with edge ASAP
+    in      YL, SREG            ;[-26]
+    push    YL                  ;[-25]
+    push    YH                  ;[-23]
+;----------------------------------------------------------------------------
+; Synchronize with sync pattern:
+;----------------------------------------------------------------------------
+;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
+;sync up with J to K edge during sync pattern -- use fastest possible loops
+;The first part waits at most 1 bit long since we must be in sync pattern.
+;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
+;waitForJ, ensure that this prerequisite is met.
+waitForJ:
+    inc     YL
+    sbis    USBIN, USBMINUS
+    brne    waitForJ        ; just make sure we have ANY timeout
+waitForK:
+;The following code results in a sampling window of < 1/4 bit which meets the spec.
+    sbis    USBIN, USBMINUS     ;[-19]
+    rjmp    foundK              ;[-18]
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+#if USB_COUNT_SOF
+    lds     YL, usbSofCount
+    inc     YL
+    sts     usbSofCount, YL
+#endif  /* USB_COUNT_SOF */
+#ifdef USB_SOF_HOOK
+    USB_SOF_HOOK
+#endif
+    rjmp    sofError
+foundK:                         ;[-16]
+;{3, 5} after falling D- edge, average delay: 4 cycles
+;bit0 should be at 34 for center sampling. Currently at 4 so 30 cylces till bit 0 sample
+;use 1 bit time for setup purposes, then sample again. Numbers in brackets
+;are cycles from center of first sync (double K) bit after the instruction
+    push    bitcnt              ;[-16]
+;   [---]                       ;[-15]
+    lds     YL, usbInputBufOffset;[-14]
+;   [---]                       ;[-13]
+    clr     YH                  ;[-12]
+    subi    YL, lo8(-(usbRxBuf));[-11] [rx loop init]
+    sbci    YH, hi8(-(usbRxBuf));[-10] [rx loop init]
+    push    shift               ;[-9]
+;   [---]                       ;[-8]
+    ldi     shift,0x40          ;[-7] set msb to "1" so processing bit7 can be detected
+    nop2                        ;[-6]
+;   [---]                       ;[-5]
+    ldi     bitcnt, 5           ;[-4] [rx loop init]
+    sbis    USBIN, USBMINUS     ;[-3] we want two bits K (sample 3 cycles too early)
+    rjmp    haveTwoBitsK        ;[-2]
+    pop     shift               ;[-1] undo the push from before
+    pop     bitcnt              ;[1] 
+    rjmp    waitForK            ;[3] this was not the end of sync, retry
+; The entire loop from waitForK until rjmp waitForK above must not exceed two
+; bit times (= 27 cycles).
+
+;----------------------------------------------------------------------------
+; push more registers and initialize values while we sample the first bits:
+;----------------------------------------------------------------------------
+haveTwoBitsK:
+    push    x1                  ;[0]
+    push    x2                  ;[2]
+    push    x3                  ;[4] (leap2)
+    ldi     leap2, 0x55         ;[6] add leap cycle on 2nd,5th,8th,... stuff bit
+    push    x4                  ;[7] == leap
+    ldi     leap, 0x55          ;[9] skip leap cycle on 2nd,5th,8th,... byte received
+    push    cnt                 ;[10]
+    ldi     cnt, USB_BUFSIZE    ;[12] [rx loop init]
+    ldi     x2, 1<<USBPLUS      ;[13] current line state is K state. D+=="1", D-=="0"
+bit0:       
+    in      x1, USBIN           ;[0] sample line state
+    andi    x1, USBMASK         ;[1] filter only D+ and D- bits
+    rjmp    handleBit           ;[2] make bit0 14 cycles long
+
+;----------------------------------------------------------------------------
+; Process bit7. However, bit 6 still may need unstuffing.
+;----------------------------------------------------------------------------
+
+b6checkUnstuff:
+    dec     bitcnt              ;[9]
+    breq    unstuff6            ;[10]
+bit7:
+    subi    cnt, 1              ;[11] cannot use dec becaus it does not affect the carry flag
+    brcs    overflow            ;[12] Too many bytes received. Ignore packet
+    in      x1, USBIN           ;[0] sample line state
+    andi    x1, USBMASK         ;[1] filter only D+ and D- bits
+    cpse    x1, x2              ;[2] when previous line state equals current line state, handle "1"
+    rjmp    b7handle0           ;[3] when line state differs, handle "0"
+    sec                         ;[4]
+    ror     shift               ;[5] shift "1" into the data
+    st      y+, shift           ;[6] store the data into the buffer
+    ldi     shift, 0x40         ;[7] reset data for receiving the next byte
+    subi    leap, 0x55          ;[9] trick to introduce a leap cycle every 3 bytes
+    brcc    nextInst            ;[10 or 11] it will fail after 85 bytes. However low speed can only receive 11
+    dec     bitcnt              ;[11 or 12]
+    brne    bit0                ;[12 or 13]
+    ldi     x1, 1               ;[13 or 14] unstuffing bit 7
+    in      bitcnt, USBIN       ;[0] sample stuff bit
+    rjmp    unstuff             ;[1]
+
+b7handle0:
+    mov     x2,x1               ;[5] Set x2 to current line state
+    ldi     bitcnt, 6           ;[6]
+    lsr     shift               ;[7] shift "0" into the data
+    st      y+, shift           ;[8] store data into the buffer
+    ldi     shift, 0x40         ;[10] reset data for receiving the next byte
+    subi    leap, 0x55          ;[11] trick to introduce a leap cycle every 3 bytes
+    brcs    bit0                ;[12] it will fail after 85 bytes. However low speed can only receive 11
+    rjmp    bit0                ;[13]
+
+
+;----------------------------------------------------------------------------
+; Handle unstuff
+; x1==0xFF indicate unstuffing bit6
+;----------------------------------------------------------------------------
+
+unstuff6:
+    ldi     x1,0xFF             ;[12] indicate unstuffing bit 6
+    in      bitcnt, USBIN       ;[0]  sample stuff bit
+    nop                         ;[1]  fix timing
+unstuff:                        ;b0-5  b6   b7
+    mov     x2,bitcnt           ;[3]  [2]  [3]  Set x2 to match line state
+    subi    leap2, 0x55         ;[4]  [3]  [4]  delay loop
+    brcs    nextInst            ;[5]  [4]  [5]  add one cycle every three stuff bits
+    sbci    leap2,0             ;[6]  [5]  [6]
+    ldi     bitcnt,6            ;[7]  [6]  [7]  reset bit stuff counter
+    andi    x2, USBMASK         ;[8]  [7]  [8] only keep D+ and D-
+    cpi     x1,0                ;[9]  [8]  [9]
+    brmi    bit7                ;[10] [9]  [10] finished unstuffing bit6 When x1<0
+    breq    bitloop             ;[11] ---  [11] finished unstuffing bit0-5 when x1=0
+    nop                         ;---  ---  [12]
+    in      x1, USBIN           ;---  ---  [0] sample line state for bit0
+    andi    x1, USBMASK         ;---  ---  [1] filter only D+ and D- bits
+    rjmp    handleBit           ;---  ---  [2] make bit0 14 cycles long
+
+;----------------------------------------------------------------------------
+; Receiver loop (numbers in brackets are cycles within byte after instr)
+;----------------------------------------------------------------------------
+bitloop:
+    in      x1, USBIN           ;[0] sample line state
+    andi    x1, USBMASK         ;[1] filter only D+ and D- bits
+    breq    se0                 ;[2] both lines are low so handle se0
+handleBit:
+    cpse    x1, x2              ;[3] when previous line state equals current line state, handle "1"
+    rjmp    handle0             ;[4] when line state differs, handle "0"
+    sec                         ;[5]
+    ror     shift               ;[6] shift "1" into the data
+    brcs    b6checkUnstuff      ;[7] When after shift C is set, next bit is bit7
+    nop2                        ;[8]
+    dec     bitcnt              ;[10]
+    brne    bitloop             ;[11]
+    ldi     x1,0                ;[12] indicate unstuff for bit other than bit6 or bit7
+    in      bitcnt, USBIN       ;[0] sample stuff bit
+    rjmp    unstuff             ;[1]
+
+handle0:
+    mov     x2, x1              ;[6] Set x2 to current line state
+    ldi     bitcnt, 6           ;[7] reset unstuff counter. 
+    lsr     shift               ;[8] shift "0" into the data
+    brcs    bit7                ;[9] When after shift C is set, next bit is bit7
+    nop                         ;[10]
+    rjmp    bitloop             ;[11] 
+    
+;----------------------------------------------------------------------------
+; End of receive loop. Now start handling EOP
+;----------------------------------------------------------------------------
+
+macro POP_STANDARD ; 14 cycles
+    pop     cnt
+    pop     x4
+    pop     x3
+    pop     x2
+    pop     x1
+    pop     shift
+    pop     bitcnt
+    endm
+macro POP_RETI     ; 7 cycles
+    pop     YH
+    pop     YL
+    out     SREG, YL
+    pop     YL
+    endm
+
+
+
+#include "asmcommon.inc"
+
+; USB spec says:
+; idle = J
+; J = (D+ = 0), (D- = 1)
+; K = (D+ = 1), (D- = 0)
+; Spec allows 7.5 bit times from EOP to SOP for replies
+; 7.5 bit times is 100 cycles. This implementation arrives a bit later at se0
+; then specified in the include file but there is plenty of time
+
+bitstuffN:
+    eor     x1, x4          ;[8]
+    ldi     x2, 0           ;[9]
+    nop2                    ;[10]
+    out     USBOUT, x1      ;[12] <-- out
+    rjmp    didStuffN       ;[0]
+    
+bitstuff7:
+    eor     x1, x4          ;[6]
+    ldi     x2, 0           ;[7] Carry is zero due to brcc
+    rol     shift           ;[8] compensate for ror shift at branch destination
+    nop2                    ;[9]
+    rjmp    didStuff7       ;[11]
+
+sendNakAndReti:
+    ldi     x3, USBPID_NAK  ;[-18]
+    rjmp    sendX3AndReti   ;[-17]
+sendAckAndReti:
+    ldi     cnt, USBPID_ACK ;[-17]
+sendCntAndReti:
+    mov     x3, cnt         ;[-16]
+sendX3AndReti:
+    ldi     YL, 20          ;[-15] x3==r20 address is 20
+    ldi     YH, 0           ;[-14]
+    ldi     cnt, 2          ;[-13]
+;   rjmp    usbSendAndReti      fallthrough
+
+;usbSend:
+;pointer to data in 'Y'
+;number of bytes in 'cnt' -- including sync byte [range 2 ... 12]
+;uses: x1...x4, btcnt, shift, cnt, Y
+;Numbers in brackets are time since first bit of sync pattern is sent
+;We don't match the transfer rate exactly (don't insert leap cycles every third
+;byte) because the spec demands only 1.5% precision anyway.
+usbSendAndReti:             ; 12 cycles until SOP
+    in      x2, USBDDR      ;[-12]
+    ori     x2, USBMASK     ;[-11]
+    sbi     USBOUT, USBMINUS;[-10] prepare idle state; D+ and D- must have been 0 (no pullups)
+    in      x1, USBOUT      ;[-8] port mirror for tx loop
+    out     USBDDR, x2      ;[-7] <- acquire bus
+; need not init x2 (bitstuff history) because sync starts with 0
+    ldi     x4, USBMASK     ;[-6] exor mask
+    ldi     shift, 0x80     ;[-5] sync byte is first byte sent
+txByteLoop:
+    ldi     bitcnt, 0x49    ;[-4]        [10] binary 01001001
+txBitLoop:
+    sbrs    shift, 0        ;[-3] [10]   [11]
+    eor     x1, x4          ;[-2] [11]   [12]
+    out     USBOUT, x1      ;[-1] [12]   [13]   <-- out N
+    ror     shift           ;[0]  [13]   [14]
+    ror     x2              ;[1]
+didStuffN:
+    nop2                    ;[2]
+    nop                     ;[4]
+    cpi     x2, 0xfc        ;[5]
+    brcc    bitstuffN       ;[6]
+    lsr     bitcnt          ;[7]
+    brcc    txBitLoop       ;[8]
+    brne    txBitLoop       ;[9]
+
+    sbrs    shift, 0        ;[10]
+    eor     x1, x4          ;[11]
+didStuff7:
+    out     USBOUT, x1      ;[-1] [13] <-- out 7
+    ror     shift           ;[0] [14]
+    ror     x2              ;[1]
+    nop                     ;[2]
+    cpi     x2, 0xfc        ;[3]
+    brcc    bitstuff7       ;[4]
+    ld      shift, y+       ;[5]
+    dec     cnt             ;[7]
+    brne    txByteLoop      ;[8]
+;make SE0:
+    cbr     x1, USBMASK     ;[9] prepare SE0 [spec says EOP may be 25 to 30 cycles]
+    lds     x2, usbNewDeviceAddr;[10]
+    lsl     x2              ;[12] we compare with left shifted address
+    out     USBOUT, x1      ;[13] <-- out SE0 -- from now 2 bits = 22 cycles until bus idle
+    subi    YL, 20 + 2      ;[0] Only assign address on data packets, not ACK/NAK in x3
+    sbci    YH, 0           ;[1]
+;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
+;set address only after data packet was sent, not after handshake
+    breq    skipAddrAssign  ;[2]
+    sts     usbDeviceAddr, x2; if not skipped: SE0 is one cycle longer
+skipAddrAssign:
+;end of usbDeviceAddress transfer
+    ldi     x2, 1<<USB_INTR_PENDING_BIT;[4] int0 occurred during TX -- clear pending flag
+    USB_STORE_PENDING(x2)   ;[5]
+    ori     x1, USBIDLE     ;[6]
+    in      x2, USBDDR      ;[7]
+    cbr     x2, USBMASK     ;[8] set both pins to input
+    mov     x3, x1          ;[9]
+    cbr     x3, USBMASK     ;[10] configure no pullup on both pins
+    ldi     x4, 5           ;[11]
+se0Delay:
+    dec     x4              ;[12] [15] [18] [21] [24]
+    brne    se0Delay        ;[13] [16] [19] [22] [25]
+    out     USBOUT, x1      ;[26] <-- out J (idle) -- end of SE0 (EOP signal)
+    out     USBDDR, x2      ;[27] <-- release bus now
+    out     USBOUT, x3      ;[28] <-- ensure no pull-up resistors are active
+    rjmp    doReturn
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbportability.h b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbportability.h
new file mode 100644
index 00000000..a1ea93b4
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbdrv/usbportability.h
@@ -0,0 +1,144 @@
+/* Name: usbportability.h
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2008-06-17
+ * Tabsize: 4
+ * Copyright: (c) 2008 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * This Revision: $Id$
+ */
+
+/*
+General Description:
+This header is intended to contain all (or at least most of) the compiler
+and library dependent stuff. The C code is written for avr-gcc and avr-libc.
+The API of other development environments is converted to gcc's and avr-libc's
+API by means of defines.
+
+This header also contains all system includes since they depend on the
+development environment.
+
+Thanks to Oleg Semyonov for his help with the IAR tools port!
+*/
+
+#ifndef __usbportability_h_INCLUDED__
+#define __usbportability_h_INCLUDED__
+
+/* We check explicitly for IAR and CodeVision. Default is avr-gcc/avr-libc. */
+
+/* ------------------------------------------------------------------------- */
+#if defined __IAR_SYSTEMS_ICC__ || defined __IAR_SYSTEMS_ASM__  /* check for IAR */
+/* ------------------------------------------------------------------------- */
+
+#ifndef ENABLE_BIT_DEFINITIONS
+#   define ENABLE_BIT_DEFINITIONS	1   /* Enable bit definitions */
+#endif
+
+/* Include IAR headers */
+#include <ioavr.h>
+#ifndef __IAR_SYSTEMS_ASM__
+#   include <inavr.h>
+#endif
+
+#define __attribute__(arg)  /* not supported on IAR */
+
+#ifdef __IAR_SYSTEMS_ASM__
+#   define __ASSEMBLER__    /* IAR does not define standard macro for asm */
+#endif
+
+#ifdef __HAS_ELPM__
+#   define PROGMEM __farflash
+#else
+#   define PROGMEM __flash
+#endif
+
+#define USB_READ_FLASH(addr)    (*(PROGMEM char *)(addr))
+
+/* The following definitions are not needed by the driver, but may be of some
+ * help if you port a gcc based project to IAR.
+ */
+#define cli()       __disable_interrupt()
+#define sei()       __enable_interrupt()
+#define wdt_reset() __watchdog_reset()
+#define _BV(x)      (1 << (x))
+
+/* assembler compatibility macros */
+#define nop2    rjmp    $+2 /* jump to next instruction */
+#define XL      r26
+#define XH      r27
+#define YL      r28
+#define YH      r29
+#define ZL      r30
+#define ZH      r31
+#define lo8(x)  LOW(x)
+#define hi8(x)  (((x)>>8) & 0xff)   /* not HIGH to allow XLINK to make a proper range check */
+
+/* Depending on the device you use, you may get problems with the way usbdrv.h
+ * handles the differences between devices. Since IAR does not use #defines
+ * for MCU registers, we can't check for the existence of a particular
+ * register with an #ifdef. If the autodetection mechanism fails, include
+ * definitions for the required USB_INTR_* macros in your usbconfig.h. See
+ * usbconfig-prototype.h and usbdrv.h for details.
+ */
+
+/* ------------------------------------------------------------------------- */
+#elif __CODEVISIONAVR__ /* check for CodeVision AVR */
+/* ------------------------------------------------------------------------- */
+/* This port is not working (yet) */
+
+/* #define F_CPU   _MCU_CLOCK_FREQUENCY_    seems to be defined automatically */
+
+#include <io.h>
+#include <delay.h>
+
+#define __attribute__(arg)  /* not supported on IAR */
+
+#define PROGMEM                 __flash
+#define USB_READ_FLASH(addr)    (*(PROGMEM char *)(addr))
+
+#ifndef __ASSEMBLER__
+static inline void  cli(void)
+{
+    #asm("cli");
+}
+static inline void  sei(void)
+{
+    #asm("sei");
+}
+#endif
+#define _delay_ms(t)    delay_ms(t)
+#define _BV(x)          (1 << (x))
+#define USB_CFG_USE_SWITCH_STATEMENT 1  /* macro for if() cascase fails for unknown reason */
+
+#define macro   .macro
+#define endm    .endmacro
+#define nop2    rjmp    .+0 /* jump to next instruction */
+
+/* ------------------------------------------------------------------------- */
+#else   /* default development environment is avr-gcc/avr-libc */
+/* ------------------------------------------------------------------------- */
+
+#include <avr/io.h>
+#ifdef __ASSEMBLER__
+#   define _VECTOR(N)   __vector_ ## N   /* io.h does not define this for asm */
+#else
+#   include <avr/pgmspace.h>
+#endif
+
+#if USB_CFG_DRIVER_FLASH_PAGE
+#   define USB_READ_FLASH(addr)    pgm_read_byte_far(((long)USB_CFG_DRIVER_FLASH_PAGE << 16) | (long)(addr))
+#else
+#   define USB_READ_FLASH(addr)    pgm_read_byte(addr)
+#endif
+
+#define macro   .macro
+#define endm    .endm
+#define nop2    rjmp    .+0 /* jump to next instruction */
+
+#endif  /* development environment */
+
+/* for conveniecne, ensure that PRG_RDB exists */
+#ifndef PRG_RDB
+#   define PRG_RDB(addr)    USB_READ_FLASH(addr)
+#endif
+#endif  /* __usbportability_h_INCLUDED__ */
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbtest.c b/trunk/AVRProjects/ATTiny2313-usb/usbtest.c
new file mode 100644
index 00000000..1c42cda0
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313-usb/usbtest.c
@@ -0,0 +1,168 @@
+/**
+ * Project: AVR ATtiny USB Tutorial at http://codeandlife.com/
+ * Author: Joonas Pihlajamaa, joonas.pihlajamaa@iki.fi
+ * Based on V-USB example code by Christian Starkjohann
+ * Copyright: (C) 2012 by Joonas Pihlajamaa
+ * License: GNU GPL v3 (see License.txt)
+ */
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+// this is libusb, see http://libusb.sourceforge.net/ 
+#include <usb.h>
+
+// same as in main.c
+#define USB_LED_OFF 0
+#define USB_LED_ON  1
+#define USB_DATA_OUT 2
+#define USB_DATA_WRITE 3
+#define USB_DATA_IN 4
+
+// used to get descriptor strings for device identification 
+static int usbGetDescriptorString(usb_dev_handle *dev, int index, int langid, 
+                                  char *buf, int buflen) {
+    char buffer[256];
+    int rval, i;
+
+	// make standard request GET_DESCRIPTOR, type string and given index 
+    // (e.g. dev->iProduct)
+	rval = usb_control_msg(dev, 
+        USB_TYPE_STANDARD | USB_RECIP_DEVICE | USB_ENDPOINT_IN, 
+        USB_REQ_GET_DESCRIPTOR, (USB_DT_STRING << 8) + index, langid, 
+        buffer, sizeof(buffer), 1000);
+        
+    if(rval < 0) // error
+		return rval;
+	
+    // rval should be bytes read, but buffer[0] contains the actual response size
+	if((unsigned char)buffer[0] < rval)
+		rval = (unsigned char)buffer[0]; // string is shorter than bytes read
+	
+	if(buffer[1] != USB_DT_STRING) // second byte is the data type
+		return 0; // invalid return type
+		
+	// we're dealing with UTF-16LE here so actual chars is half of rval,
+	// and index 0 doesn't count
+	rval /= 2;
+	
+	// lossy conversion to ISO Latin1 
+	for(i = 1; i < rval && i < buflen; i++) {
+		if(buffer[2 * i + 1] == 0)
+			buf[i-1] = buffer[2 * i];
+		else
+			buf[i-1] = '?'; // outside of ISO Latin1 range
+	}
+	buf[i-1] = 0;
+	
+	return i-1;
+}
+
+static usb_dev_handle * usbOpenDevice(int vendor, char *vendorName, 
+                                      int product, char *productName) {
+	struct usb_bus *bus;
+	struct usb_device *dev;
+	char devVendor[256], devProduct[256];
+    
+	usb_dev_handle * handle = NULL;
+	
+	usb_init();
+	usb_find_busses();
+	usb_find_devices();
+	
+	for(bus=usb_get_busses(); bus; bus=bus->next) {
+		for(dev=bus->devices; dev; dev=dev->next) {			
+			if(dev->descriptor.idVendor != vendor ||
+               dev->descriptor.idProduct != product)
+                continue;
+                
+            // we need to open the device in order to query strings 
+            if(!(handle = usb_open(dev))) {
+                fprintf(stderr, "Warning: cannot open USB device: %s\n",
+                    usb_strerror());
+                continue;
+            }
+            
+            // get vendor name 
+            if(usbGetDescriptorString(handle, dev->descriptor.iManufacturer, 0x0409, devVendor, sizeof(devVendor)) < 0) {
+                fprintf(stderr, 
+                    "Warning: cannot query manufacturer for device: %s\n", 
+                    usb_strerror());
+                usb_close(handle);
+                continue;
+            }
+            
+            // get product name 
+            if(usbGetDescriptorString(handle, dev->descriptor.iProduct, 
+               0x0409, devProduct, sizeof(devVendor)) < 0) {
+                fprintf(stderr, 
+                    "Warning: cannot query product for device: %s\n", 
+                    usb_strerror());
+                usb_close(handle);
+                continue;
+            }
+            
+            if(strcmp(devVendor, vendorName) == 0 && 
+               strcmp(devProduct, productName) == 0)
+                return handle;
+            else
+                usb_close(handle);
+		}
+	}
+	
+	return NULL;
+}
+
+int main(int argc, char **argv) {
+	usb_dev_handle *handle = NULL;
+    int nBytes = 0;
+    char buffer[256];
+
+	if(argc < 2) {
+		printf("Usage:\n");
+		printf("usbtext.exe on\n");
+		printf("usbtext.exe off\n");
+		printf("usbtext.exe out\n");
+		printf("usbtext.exe write\n");
+		printf("usbtext.exe in <string>\n");
+		exit(1);
+	}
+	
+	handle = usbOpenDevice(0x16C0, "codeandlife.com", 0x05DC, "USBexample");
+	
+	if(handle == NULL) {
+		fprintf(stderr, "Could not find USB device!\n");
+		exit(1);
+	}
+
+	if(strcmp(argv[1], "on") == 0) {
+		nBytes = usb_control_msg(handle, 
+            USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_ENDPOINT_IN, 
+			USB_LED_ON, 0, 0, (char *)buffer, sizeof(buffer), 5000);
+	} else if(strcmp(argv[1], "off") == 0) {
+		nBytes = usb_control_msg(handle, 
+            USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_ENDPOINT_IN, 
+			USB_LED_OFF, 0, 0, (char *)buffer, sizeof(buffer), 5000);
+	} else if(strcmp(argv[1], "out") == 0) {
+		nBytes = usb_control_msg(handle, 
+            USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_ENDPOINT_IN, 
+			USB_DATA_OUT, 0, 0, (char *)buffer, sizeof(buffer), 5000);
+        printf("Got %d bytes: %s\n", nBytes, buffer);
+	} else if(strcmp(argv[1], "write") == 0) {
+		nBytes = usb_control_msg(handle, 
+            USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_ENDPOINT_IN, 
+			USB_DATA_WRITE, 'T' + ('E' << 8), 'S' + ('T' << 8), 
+            (char *)buffer, sizeof(buffer), 5000);
+	} else if(strcmp(argv[1], "in") == 0 && argc > 2) {
+		nBytes = usb_control_msg(handle, 
+            USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_ENDPOINT_OUT, 
+			USB_DATA_IN, 0, 0, argv[2], strlen(argv[2])+1, 5000);
+	}
+	
+	if(nBytes < 0)
+		fprintf(stderr, "USB error: %s\n", usb_strerror());
+		
+	usb_close(handle);
+	
+	return 0;
+}
diff --git a/trunk/AVRProjects/ATTiny2313-usb/usbtest.exe b/trunk/AVRProjects/ATTiny2313-usb/usbtest.exe
new file mode 100644
index 00000000..1bf4b641
Binary files /dev/null and b/trunk/AVRProjects/ATTiny2313-usb/usbtest.exe differ
diff --git a/trunk/AVRProjects/ATTiny2313/.dep/main.o.d b/trunk/AVRProjects/ATTiny2313/.dep/main.o.d
new file mode 100644
index 00000000..58825681
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313/.dep/main.o.d
@@ -0,0 +1,37 @@
+main.o: main.c \
+  c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/avr/io.h \
+  c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/avr/sfr_defs.h \
+  c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/inttypes.h \
+  c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/stdint.h \
+  c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/avr/iotn2313.h \
+  c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/avr/portpins.h \
+  c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/avr/common.h \
+  c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/avr/version.h \
+  c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/avr/fuse.h \
+  c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/avr/lock.h \
+  c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/util/delay.h \
+  c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/util/delay_basic.h
+
+c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/avr/io.h:
+
+c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/avr/sfr_defs.h:
+
+c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/inttypes.h:
+
+c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/stdint.h:
+
+c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/avr/iotn2313.h:
+
+c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/avr/portpins.h:
+
+c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/avr/common.h:
+
+c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/avr/version.h:
+
+c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/avr/fuse.h:
+
+c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/avr/lock.h:
+
+c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/util/delay.h:
+
+c:/program\ files/winavr-20100110/lib/gcc/../../avr/include/util/delay_basic.h:
diff --git a/trunk/AVRProjects/ATTiny2313/main.c b/trunk/AVRProjects/ATTiny2313/main.c
new file mode 100644
index 00000000..ef303b0b
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313/main.c
@@ -0,0 +1,41 @@
+/* ******************************************************** *
+ *															*
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016									*
+ * Author:		Paolo Iocco									*	
+ * ******************************************************** */
+/* ******************************************************** *
+   ATtiny 2313/4313 Pin map
+                           +-\/-+
+              /Reset PA2  1|o   |20  Vcc
+                 RXD PD0  2|    |19  PB7 SCK
+                 TXD PD1  3|    |18  PB6 MISO
+                     PA1  4|    |17  PB5 MOSI
+					 PA0  5|    |16  PB4 OC1B
+					 PD2  6|    |15  PB3 OC1A
+					 PD3  7|    |14  PB2 OC0A
+					 PD4  8|    |13  PB1 AIN1
+				OC0B PD5  9|    |12  PB0 AIN0
+					 GND 10|    |11  PD6 
+					       +----+
+* ******************************************************** */
+
+//#define F_CPU = 8000000
+#include <avr/io.h>				
+#include <util/delay.h>			
+
+int main (void)					
+{
+	unsigned char zwischenspeicher;		
+	DDRB = 0b00000001;		
+	while(1)					
+	{
+		zwischenspeicher = PORTB;				
+		zwischenspeicher = zwischenspeicher ^ 0b00000001;	
+		PORTB = zwischenspeicher;				
+		_delay_ms(500);							
+	}							
+	return 0;					
+}
+
diff --git a/trunk/AVRProjects/ATTiny2313/main.eep b/trunk/AVRProjects/ATTiny2313/main.eep
new file mode 100644
index 00000000..1996e8fd
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313/main.eep
@@ -0,0 +1 @@
+:00000001FF
diff --git a/trunk/AVRProjects/ATTiny2313/main.elf b/trunk/AVRProjects/ATTiny2313/main.elf
new file mode 100644
index 00000000..da3c0533
Binary files /dev/null and b/trunk/AVRProjects/ATTiny2313/main.elf differ
diff --git a/trunk/AVRProjects/ATTiny2313/main.hex b/trunk/AVRProjects/ATTiny2313/main.hex
new file mode 100644
index 00000000..7ea9cca2
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313/main.hex
@@ -0,0 +1,7 @@
+:1000000012C017C016C015C014C013C012C011C052
+:1000100010C00FC00EC00DC00CC00BC00AC009C07C
+:1000200008C007C006C011241FBECFEDCDBF02D04F
+:1000300011C0E6CF81E087BB41E029E130E088B321
+:10004000842788BB88E893E1F9013197F1F701979C
+:08005000D9F7F5CFF894FFCFBA
+:00000001FF
diff --git a/trunk/AVRProjects/ATTiny2313/main.lss b/trunk/AVRProjects/ATTiny2313/main.lss
new file mode 100644
index 00000000..3e9e2d2a
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313/main.lss
@@ -0,0 +1,119 @@
+
+main.elf:     file format elf32-avr
+
+Sections:
+Idx Name          Size      VMA       LMA       File off  Algn
+  0 .text         00000058  00000000  00000000  00000054  2**1
+                  CONTENTS, ALLOC, LOAD, READONLY, CODE
+  1 .debug_aranges 00000020  00000000  00000000  000000ac  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  2 .debug_pubnames 0000001b  00000000  00000000  000000cc  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  3 .debug_info   0000011f  00000000  00000000  000000e7  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  4 .debug_abbrev 000000c1  00000000  00000000  00000206  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  5 .debug_line   00000150  00000000  00000000  000002c7  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  6 .debug_frame  00000020  00000000  00000000  00000418  2**2
+                  CONTENTS, READONLY, DEBUGGING
+  7 .debug_str    000000c7  00000000  00000000  00000438  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  8 .debug_loc    0000003b  00000000  00000000  000004ff  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  9 .debug_ranges 00000048  00000000  00000000  0000053a  2**0
+                  CONTENTS, READONLY, DEBUGGING
+
+Disassembly of section .text:
+
+00000000 <__vectors>:
+   0:	12 c0       	rjmp	.+36     	; 0x26 <__ctors_end>
+   2:	17 c0       	rjmp	.+46     	; 0x32 <__bad_interrupt>
+   4:	16 c0       	rjmp	.+44     	; 0x32 <__bad_interrupt>
+   6:	15 c0       	rjmp	.+42     	; 0x32 <__bad_interrupt>
+   8:	14 c0       	rjmp	.+40     	; 0x32 <__bad_interrupt>
+   a:	13 c0       	rjmp	.+38     	; 0x32 <__bad_interrupt>
+   c:	12 c0       	rjmp	.+36     	; 0x32 <__bad_interrupt>
+   e:	11 c0       	rjmp	.+34     	; 0x32 <__bad_interrupt>
+  10:	10 c0       	rjmp	.+32     	; 0x32 <__bad_interrupt>
+  12:	0f c0       	rjmp	.+30     	; 0x32 <__bad_interrupt>
+  14:	0e c0       	rjmp	.+28     	; 0x32 <__bad_interrupt>
+  16:	0d c0       	rjmp	.+26     	; 0x32 <__bad_interrupt>
+  18:	0c c0       	rjmp	.+24     	; 0x32 <__bad_interrupt>
+  1a:	0b c0       	rjmp	.+22     	; 0x32 <__bad_interrupt>
+  1c:	0a c0       	rjmp	.+20     	; 0x32 <__bad_interrupt>
+  1e:	09 c0       	rjmp	.+18     	; 0x32 <__bad_interrupt>
+  20:	08 c0       	rjmp	.+16     	; 0x32 <__bad_interrupt>
+  22:	07 c0       	rjmp	.+14     	; 0x32 <__bad_interrupt>
+  24:	06 c0       	rjmp	.+12     	; 0x32 <__bad_interrupt>
+
+00000026 <__ctors_end>:
+  26:	11 24       	eor	r1, r1
+  28:	1f be       	out	0x3f, r1	; 63
+  2a:	cf ed       	ldi	r28, 0xDF	; 223
+  2c:	cd bf       	out	0x3d, r28	; 61
+  2e:	02 d0       	rcall	.+4      	; 0x34 <main>
+  30:	11 c0       	rjmp	.+34     	; 0x54 <_exit>
+
+00000032 <__bad_interrupt>:
+  32:	e6 cf       	rjmp	.-52     	; 0x0 <__vectors>
+
+00000034 <main>:
+#include <util/delay.h>			
+
+int main (void)					
+{
+	unsigned char zwischenspeicher;		
+	DDRA = 0b00000001;		
+  34:	81 e0       	ldi	r24, 0x01	; 1
+  36:	8a bb       	out	0x1a, r24	; 26
+	while(1)					
+	{
+		zwischenspeicher = PORTA;				
+		zwischenspeicher = zwischenspeicher ^ 0b00000001;	
+  38:	41 e0       	ldi	r20, 0x01	; 1
+    milliseconds can be achieved.
+ */
+void
+_delay_loop_2(uint16_t __count)
+{
+	__asm__ volatile (
+  3a:	29 e1       	ldi	r18, 0x19	; 25
+  3c:	30 e0       	ldi	r19, 0x00	; 0
+{
+	unsigned char zwischenspeicher;		
+	DDRA = 0b00000001;		
+	while(1)					
+	{
+		zwischenspeicher = PORTA;				
+  3e:	8b b3       	in	r24, 0x1b	; 27
+		zwischenspeicher = zwischenspeicher ^ 0b00000001;	
+  40:	84 27       	eor	r24, r20
+		PORTA = zwischenspeicher;				
+  42:	8b bb       	out	0x1b, r24	; 27
+  44:	88 e8       	ldi	r24, 0x88	; 136
+  46:	93 e1       	ldi	r25, 0x13	; 19
+  48:	f9 01       	movw	r30, r18
+  4a:	31 97       	sbiw	r30, 0x01	; 1
+  4c:	f1 f7       	brne	.-4      	; 0x4a <__SREG__+0xb>
+		__ticks = (uint16_t) (__ms * 10.0);
+		while(__ticks)
+		{
+			// wait 1/10 ms
+			_delay_loop_2(((F_CPU) / 4e3) / 10);
+			__ticks --;
+  4e:	01 97       	sbiw	r24, 0x01	; 1
+		__ticks = 1;
+	else if (__tmp > 65535)
+	{
+		//	__ticks = requested delay in 1/10 ms
+		__ticks = (uint16_t) (__ms * 10.0);
+		while(__ticks)
+  50:	d9 f7       	brne	.-10     	; 0x48 <__SREG__+0x9>
+  52:	f5 cf       	rjmp	.-22     	; 0x3e <__SP_H__>
+
+00000054 <_exit>:
+  54:	f8 94       	cli
+
+00000056 <__stop_program>:
+  56:	ff cf       	rjmp	.-2      	; 0x56 <__stop_program>
diff --git a/trunk/AVRProjects/ATTiny2313/main.lst b/trunk/AVRProjects/ATTiny2313/main.lst
new file mode 100644
index 00000000..8fe8212c
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313/main.lst
@@ -0,0 +1,77 @@
+   1               		.file	"main.c"
+   2               	__SREG__ = 0x3f
+   3               	__SP_H__ = 0x3e
+   4               	__SP_L__ = 0x3d
+   5               	__CCP__  = 0x34
+   6               	__tmp_reg__ = 0
+   7               	__zero_reg__ = 1
+  15               	.Ltext0:
+  16               	.global	main
+  18               	main:
+  19               	.LFB6:
+  20               	.LM1:
+  21               	/* prologue: function */
+  22               	/* frame size = 0 */
+  23               	.LM2:
+  24 0000 81E0      		ldi r24,lo8(1)
+  25 0002 87BB      		out 55-32,r24
+  26               	.LM3:
+  27 0004 41E0      		ldi r20,lo8(1)
+  28               	.LBB12:
+  29               	.LBB13:
+  30               	.LBB14:
+  31               	.LBB15:
+  32               	.LM4:
+  33 0006 29E1      		ldi r18,lo8(25)
+  34 0008 30E0      		ldi r19,hi8(25)
+  35               	.LVL0:
+  36               	.L3:
+  37               	.LBE15:
+  38               	.LBE14:
+  39               	.LBE13:
+  40               	.LBE12:
+  41               	.LM5:
+  42 000a 88B3      		in r24,56-32
+  43               	.LVL1:
+  44               	.LM6:
+  45 000c 8427      		eor r24,r20
+  46               	.LM7:
+  47 000e 88BB      		out 56-32,r24
+  48 0010 88E8      		ldi r24,lo8(5000)
+  49 0012 93E1      		ldi r25,hi8(5000)
+  50               	.LVL2:
+  51               	.L2:
+  52               	.LBB19:
+  53               	.LBB18:
+  54               	.LBB17:
+  55               	.LBB16:
+  56               	.LM8:
+  57 0014 F901      		movw r30,r18
+  58               	/* #APP */
+  59               	 ;  105 "c:/program files/winavr-20100110/lib/gcc/../../avr/include/util/delay_basic.h" 1
+  60 0016 3197      		1: sbiw r30,1
+  61 0018 01F4      		brne 1b
+  62               	 ;  0 "" 2
+  63               	/* #NOAPP */
+  64               	.LBE16:
+  65               	.LBE17:
+  66               	.LM9:
+  67 001a 0197      		sbiw r24,1
+  68               	.LM10:
+  69 001c 01F4      		brne .L2
+  70 001e 00C0      		rjmp .L3
+  71               	.LBE18:
+  72               	.LBE19:
+  73               	.LFE6:
+  99               	.Letext0:
+DEFINED SYMBOLS
+                            *ABS*:00000000 main.c
+C:\Users\q242695\AppData\Local\Temp/cctiMnOb.s:2      *ABS*:0000003f __SREG__
+C:\Users\q242695\AppData\Local\Temp/cctiMnOb.s:3      *ABS*:0000003e __SP_H__
+C:\Users\q242695\AppData\Local\Temp/cctiMnOb.s:4      *ABS*:0000003d __SP_L__
+C:\Users\q242695\AppData\Local\Temp/cctiMnOb.s:5      *ABS*:00000034 __CCP__
+C:\Users\q242695\AppData\Local\Temp/cctiMnOb.s:6      *ABS*:00000000 __tmp_reg__
+C:\Users\q242695\AppData\Local\Temp/cctiMnOb.s:7      *ABS*:00000001 __zero_reg__
+C:\Users\q242695\AppData\Local\Temp/cctiMnOb.s:18     .text:00000000 main
+
+NO UNDEFINED SYMBOLS
diff --git a/trunk/AVRProjects/ATTiny2313/main.map b/trunk/AVRProjects/ATTiny2313/main.map
new file mode 100644
index 00000000..8ffa1941
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313/main.map
@@ -0,0 +1,378 @@
+Archive member included because of file (symbol)
+
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr25\libgcc.a(_exit.o)
+                              c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o (exit)
+
+Memory Configuration
+
+Name             Origin             Length             Attributes
+text             0x00000000         0x00002000         xr
+data             0x00800060         0x0000ffa0         rw !x
+eeprom           0x00810000         0x00010000         rw !x
+fuse             0x00820000         0x00000400         rw !x
+lock             0x00830000         0x00000400         rw !x
+signature        0x00840000         0x00000400         rw !x
+*default*        0x00000000         0xffffffff
+
+Linker script and memory map
+
+LOAD c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+LOAD main.o
+LOAD c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25\libm.a
+LOAD c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr25\libgcc.a
+LOAD c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25\libc.a
+LOAD c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr25\libgcc.a
+
+.hash
+ *(.hash)
+
+.dynsym
+ *(.dynsym)
+
+.dynstr
+ *(.dynstr)
+
+.gnu.version
+ *(.gnu.version)
+
+.gnu.version_d
+ *(.gnu.version_d)
+
+.gnu.version_r
+ *(.gnu.version_r)
+
+.rel.init
+ *(.rel.init)
+
+.rela.init
+ *(.rela.init)
+
+.rel.text
+ *(.rel.text)
+ *(.rel.text.*)
+ *(.rel.gnu.linkonce.t*)
+
+.rela.text
+ *(.rela.text)
+ *(.rela.text.*)
+ *(.rela.gnu.linkonce.t*)
+
+.rel.fini
+ *(.rel.fini)
+
+.rela.fini
+ *(.rela.fini)
+
+.rel.rodata
+ *(.rel.rodata)
+ *(.rel.rodata.*)
+ *(.rel.gnu.linkonce.r*)
+
+.rela.rodata
+ *(.rela.rodata)
+ *(.rela.rodata.*)
+ *(.rela.gnu.linkonce.r*)
+
+.rel.data
+ *(.rel.data)
+ *(.rel.data.*)
+ *(.rel.gnu.linkonce.d*)
+
+.rela.data
+ *(.rela.data)
+ *(.rela.data.*)
+ *(.rela.gnu.linkonce.d*)
+
+.rel.ctors
+ *(.rel.ctors)
+
+.rela.ctors
+ *(.rela.ctors)
+
+.rel.dtors
+ *(.rel.dtors)
+
+.rela.dtors
+ *(.rela.dtors)
+
+.rel.got
+ *(.rel.got)
+
+.rela.got
+ *(.rela.got)
+
+.rel.bss
+ *(.rel.bss)
+
+.rela.bss
+ *(.rela.bss)
+
+.rel.plt
+ *(.rel.plt)
+
+.rela.plt
+ *(.rela.plt)
+
+.text           0x00000000       0x58
+ *(.vectors)
+ .vectors       0x00000000       0x26 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+                0x00000000                __vectors
+                0x00000000                __vector_default
+ *(.vectors)
+ *(.progmem.gcc*)
+ *(.progmem*)
+                0x00000026                . = ALIGN (0x2)
+                0x00000026                __trampolines_start = .
+ *(.trampolines)
+ .trampolines   0x00000026        0x0 linker stubs
+ *(.trampolines*)
+                0x00000026                __trampolines_end = .
+ *(.jumptables)
+ *(.jumptables*)
+ *(.lowtext)
+ *(.lowtext*)
+                0x00000026                __ctors_start = .
+ *(.ctors)
+                0x00000026                __ctors_end = .
+                0x00000026                __dtors_start = .
+ *(.dtors)
+                0x00000026                __dtors_end = .
+ SORT(*)(.ctors)
+ SORT(*)(.dtors)
+ *(.init0)
+ .init0         0x00000026        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+                0x00000026                __init
+ *(.init0)
+ *(.init1)
+ *(.init1)
+ *(.init2)
+ .init2         0x00000026        0x8 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+ *(.init2)
+ *(.init3)
+ *(.init3)
+ *(.init4)
+ *(.init4)
+ *(.init5)
+ *(.init5)
+ *(.init6)
+ *(.init6)
+ *(.init7)
+ *(.init7)
+ *(.init8)
+ *(.init8)
+ *(.init9)
+ .init9         0x0000002e        0x4 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+ *(.init9)
+ *(.text)
+ .text          0x00000032        0x2 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+                0x00000032                __vector_1
+                0x00000032                __vector_12
+                0x00000032                __bad_interrupt
+                0x00000032                __vector_6
+                0x00000032                __vector_3
+                0x00000032                __vector_11
+                0x00000032                __vector_13
+                0x00000032                __vector_17
+                0x00000032                __vector_7
+                0x00000032                __vector_5
+                0x00000032                __vector_4
+                0x00000032                __vector_9
+                0x00000032                __vector_2
+                0x00000032                __vector_15
+                0x00000032                __vector_8
+                0x00000032                __vector_14
+                0x00000032                __vector_10
+                0x00000032                __vector_16
+                0x00000032                __vector_18
+ .text          0x00000034       0x20 main.o
+                0x00000034                main
+ .text          0x00000054        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr25\libgcc.a(_exit.o)
+                0x00000054                . = ALIGN (0x2)
+ *(.text.*)
+ .text.libgcc   0x00000054        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr25\libgcc.a(_exit.o)
+                0x00000054                . = ALIGN (0x2)
+ *(.fini9)
+ .fini9         0x00000054        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr25\libgcc.a(_exit.o)
+                0x00000054                exit
+                0x00000054                _exit
+ *(.fini9)
+ *(.fini8)
+ *(.fini8)
+ *(.fini7)
+ *(.fini7)
+ *(.fini6)
+ *(.fini6)
+ *(.fini5)
+ *(.fini5)
+ *(.fini4)
+ *(.fini4)
+ *(.fini3)
+ *(.fini3)
+ *(.fini2)
+ *(.fini2)
+ *(.fini1)
+ *(.fini1)
+ *(.fini0)
+ .fini0         0x00000054        0x4 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr25\libgcc.a(_exit.o)
+ *(.fini0)
+                0x00000058                _etext = .
+
+.data           0x00800060        0x0 load address 0x00000058
+                0x00800060                PROVIDE (__data_start, .)
+ *(.data)
+ .data          0x00800060        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+ .data          0x00800060        0x0 main.o
+ .data          0x00800060        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr25\libgcc.a(_exit.o)
+ *(.data*)
+ *(.rodata)
+ *(.rodata*)
+ *(.gnu.linkonce.d*)
+                0x00800060                . = ALIGN (0x2)
+                0x00800060                _edata = .
+                0x00800060                PROVIDE (__data_end, .)
+
+.bss            0x00800060        0x0
+                0x00800060                PROVIDE (__bss_start, .)
+ *(.bss)
+ .bss           0x00800060        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+ .bss           0x00800060        0x0 main.o
+ .bss           0x00800060        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr25\libgcc.a(_exit.o)
+ *(.bss*)
+ *(COMMON)
+                0x00800060                PROVIDE (__bss_end, .)
+                0x00000058                __data_load_start = LOADADDR (.data)
+                0x00000058                __data_load_end = (__data_load_start + SIZEOF (.data))
+
+.noinit         0x00800060        0x0
+                0x00800060                PROVIDE (__noinit_start, .)
+ *(.noinit*)
+                0x00800060                PROVIDE (__noinit_end, .)
+                0x00800060                _end = .
+                0x00800060                PROVIDE (__heap_start, .)
+
+.eeprom         0x00810000        0x0
+ *(.eeprom*)
+                0x00810000                __eeprom_end = .
+
+.fuse
+ *(.fuse)
+ *(.lfuse)
+ *(.hfuse)
+ *(.efuse)
+
+.lock
+ *(.lock*)
+
+.signature
+ *(.signature*)
+
+.stab
+ *(.stab)
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+.stabstr
+ *(.stabstr)
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+.stab.excl
+ *(.stab.excl)
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+ *(.stab.exclstr)
+
+.stab.index
+ *(.stab.index)
+
+.stab.indexstr
+ *(.stab.indexstr)
+
+.comment
+ *(.comment)
+
+.debug
+ *(.debug)
+
+.line
+ *(.line)
+
+.debug_srcinfo
+ *(.debug_srcinfo)
+
+.debug_sfnames
+ *(.debug_sfnames)
+
+.debug_aranges  0x00000000       0x20
+ *(.debug_aranges)
+ .debug_aranges
+                0x00000000       0x20 main.o
+
+.debug_pubnames
+                0x00000000       0x1b
+ *(.debug_pubnames)
+ .debug_pubnames
+                0x00000000       0x1b main.o
+
+.debug_info     0x00000000      0x11f
+ *(.debug_info)
+ .debug_info    0x00000000      0x11f main.o
+ *(.gnu.linkonce.wi.*)
+
+.debug_abbrev   0x00000000       0xc1
+ *(.debug_abbrev)
+ .debug_abbrev  0x00000000       0xc1 main.o
+
+.debug_line     0x00000000      0x150
+ *(.debug_line)
+ .debug_line    0x00000000      0x150 main.o
+
+.debug_frame    0x00000000       0x20
+ *(.debug_frame)
+ .debug_frame   0x00000000       0x20 main.o
+
+.debug_str      0x00000000       0xc7
+ *(.debug_str)
+ .debug_str     0x00000000       0xc7 main.o
+                                 0xfb (size before relaxing)
+
+.debug_loc      0x00000000       0x3b
+ *(.debug_loc)
+ .debug_loc     0x00000000       0x3b main.o
+
+.debug_macinfo
+ *(.debug_macinfo)
+OUTPUT(main.elf elf32-avr)
+LOAD linker stubs
+
+.debug_ranges   0x00000000       0x48
+ .debug_ranges  0x00000000       0x48 main.o
+
+Cross Reference Table
+
+Symbol                                            File
+__bad_interrupt                                   c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__heap_end                                        c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__init                                            c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__stack                                           c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__vector_1                                        c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__vector_10                                       c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__vector_11                                       c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__vector_12                                       c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__vector_13                                       c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__vector_14                                       c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__vector_15                                       c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__vector_16                                       c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__vector_17                                       c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__vector_18                                       c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__vector_2                                        c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__vector_3                                        c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__vector_4                                        c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__vector_5                                        c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__vector_6                                        c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__vector_7                                        c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__vector_8                                        c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__vector_9                                        c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__vector_default                                  c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+__vectors                                         c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+_exit                                             c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr25\libgcc.a(_exit.o)
+exit                                              c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr25\libgcc.a(_exit.o)
+                                                  c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
+main                                              main.o
+                                                  c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr25/crttn2313.o
diff --git a/trunk/AVRProjects/ATTiny2313/main.sym b/trunk/AVRProjects/ATTiny2313/main.sym
new file mode 100644
index 00000000..88b359d4
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313/main.sym
@@ -0,0 +1,46 @@
+00000000 W __heap_end
+00000000 a __tmp_reg__
+00000000 W __vector_default
+00000000 T __vectors
+00000001 a __zero_reg__
+00000026 T __ctors_end
+00000026 T __ctors_start
+00000026 T __dtors_end
+00000026 T __dtors_start
+00000026 W __init
+00000026 T __trampolines_end
+00000026 T __trampolines_start
+00000032 T __bad_interrupt
+00000032 W __vector_1
+00000032 W __vector_10
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+00000032 W __vector_13
+00000032 W __vector_14
+00000032 W __vector_15
+00000032 W __vector_16
+00000032 W __vector_17
+00000032 W __vector_18
+00000032 W __vector_2
+00000032 W __vector_3
+00000032 W __vector_4
+00000032 W __vector_5
+00000032 W __vector_6
+00000032 W __vector_7
+00000032 W __vector_8
+00000032 W __vector_9
+00000034 a __CCP__
+00000034 T main
+0000003d a __SP_L__
+0000003e a __SP_H__
+0000003f a __SREG__
+00000054 T _exit
+00000054 W exit
+00000056 t __stop_program
+00000058 A __data_load_end
+00000058 A __data_load_start
+00000058 T _etext
+000000df W __stack
+00800060 T _edata
+00800060 N _end
+00810000 N __eeprom_end
diff --git a/trunk/AVRProjects/ATTiny2313/makefile b/trunk/AVRProjects/ATTiny2313/makefile
new file mode 100644
index 00000000..d3d8993d
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny2313/makefile
@@ -0,0 +1,441 @@
+# Hey Emacs, this is a -*- makefile -*-
+#
+# WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al.
+# Released to the Public Domain
+# Please read the make user manual!
+#
+# Additional material for this makefile was submitted by:
+#  Tim Henigan
+#  Peter Fleury
+#  Reiner Patommel
+#  Sander Pool
+#  Frederik Rouleau
+#  Markus Pfaff
+#
+# On command line:
+#
+# make all = Make software.
+#
+# make clean = Clean out built project files.
+#
+# make coff = Convert ELF to AVR COFF (for use with AVR Studio 3.x or VMLAB).
+#
+# make extcoff = Convert ELF to AVR Extended COFF (for use with AVR Studio
+#                4.07 or greater).
+#
+# make program = Download the hex file to the device, using avrdude.  Please
+#                customize the avrdude settings below first!
+#
+# make filename.s = Just compile filename.c into the assembler code only
+#
+# To rebuild project do "make clean" then "make all".
+#
+
+# mth 2004/09 
+# Differences from WinAVR 20040720 sample:
+# - DEPFLAGS according to Eric Weddingtion's fix (avrfreaks/gcc-forum)
+# - F_OSC Define in CFLAGS and AFLAGS
+
+
+# MCU name
+MCU = attiny2313
+
+# Main Oscillator Frequency
+# This is only used to define F_OSC in all assembler and c-sources.
+F_OSC = 1000000
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+# Target file name (without extension).
+TARGET = main
+
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = $(TARGET).c
+
+
+# List Assembler source files here.
+# Make them always end in a capital .S.  Files ending in a lowercase .s
+# will not be considered source files but generated files (assembler
+# output from the compiler), and will be deleted upon "make clean"!
+# Even though the DOS/Win* filesystem matches both .s and .S the same,
+# it will preserve the spelling of the filenames, and gcc itself does
+# care about how the name is spelled on its command-line.
+ASRC = 
+
+
+
+# Optimization level, can be [0, 1, 2, 3, s]. 
+# 0 = turn off optimization. s = optimize for size.
+# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+OPT = s
+
+# Debugging format.
+# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
+# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
+#DEBUG = stabs
+DEBUG = dwarf-2
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+EXTRAINCDIRS = 
+
+
+# Compiler flag to set the C Standard level.
+# c89   - "ANSI" C
+# gnu89 - c89 plus GCC extensions
+# c99   - ISO C99 standard (not yet fully implemented)
+# gnu99 - c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+# Place -D or -U options here
+CDEFS =
+
+# Place -I options here
+CINCS =
+
+
+# Compiler flags.
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT)
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+CFLAGS += -Wall -Wstrict-prototypes
+CFLAGS += -Wa,-adhlns=$(<:.c=.lst)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+CFLAGS += -DF_OSC=$(F_OSC)
+
+
+
+# Assembler flags.
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs 
+ASFLAGS += -DF_OSC=$(F_OSC)
+
+
+#Additional libraries.
+
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+PRINTF_LIB = 
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+SCANF_LIB = 
+
+MATH_LIB = -lm
+
+# External memory options
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+# Linker flags.
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+
+
+
+
+# Programming support using avrdude. Settings and variables.
+
+# Programming hardware: alf avr910 avrisp bascom bsd 
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+#AVRDUDE_PROGRAMMER = stk500
+AVRDUDE_PROGRAMMER = usbasp
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = usb    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude> 
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+# ---------------------------------------------------------------------------
+
+# Define directories, if needed.
+DIRAVR = c:/winavr
+DIRAVRBIN = $(DIRAVR)/bin
+DIRAVRUTILS = $(DIRAVR)/utils/bin
+DIRINC = .
+DIRLIB = $(DIRAVR)/avr/lib
+
+
+# Define programs and commands.
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+
+
+
+
+# Define Messages
+# English
+MSG_ERRORS_NONE = Errors: none
+MSG_BEGIN = -------- begin --------
+MSG_END = --------  end  --------
+MSG_SIZE_BEFORE = Size before: 
+MSG_SIZE_AFTER = Size after:
+MSG_COFF = Converting to AVR COFF:
+MSG_EXTENDED_COFF = Converting to AVR Extended COFF:
+MSG_FLASH = Creating load file for Flash:
+MSG_EEPROM = Creating load file for EEPROM:
+MSG_EXTENDED_LISTING = Creating Extended Listing:
+MSG_SYMBOL_TABLE = Creating Symbol Table:
+MSG_LINKING = Linking:
+MSG_COMPILING = Compiling:
+MSG_ASSEMBLING = Assembling:
+MSG_CLEANING = Cleaning project:
+
+
+
+
+# Define all object files.
+OBJ = $(SRC:.c=.o) $(ASRC:.S=.o) 
+
+# Define all listing files.
+LST = $(ASRC:.S=.lst) $(SRC:.c=.lst)
+
+
+# Compiler flags to generate dependency files.
+### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
+GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS)
+
+
+
+
+
+# Default target.
+#all: begin gccversion sizebefore build sizeafter finished end
+all: begin gccversion build size finished end
+
+build: elf hex eep lss sym
+
+elf: $(TARGET).elf
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss 
+sym: $(TARGET).sym
+
+
+
+# Eye candy.
+# AVR Studio 3.x does not check make's exit code but relies on
+# the following magic strings to be generated by the compile job.
+begin:
+	@echo
+	@echo $(MSG_BEGIN)
+
+finished:
+	@echo $(MSG_ERRORS_NONE)
+
+end:
+	@echo $(MSG_END)
+	@echo
+
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+sizebefore:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
+
+sizeafter:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
+
+size:
+	$(SIZE) -C --mcu=$(MCU) $(TARGET).elf
+
+# Display compiler version information.
+gccversion : 
+	@$(CC) --version
+
+
+
+# Program the device.  
+program: $(TARGET).hex $(TARGET).eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM)
+
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000 
+
+
+coff: $(TARGET).elf
+	@echo
+	@echo $(MSG_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	@echo
+	@echo $(MSG_EXTENDED_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+
+# Create final output files (.hex, .eep) from ELF output file.
+%.hex: %.elf
+	@echo
+	@echo $(MSG_FLASH) $@
+	$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+%.eep: %.elf
+	@echo
+	@echo $(MSG_EEPROM) $@
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+%.lss: %.elf
+	@echo
+	@echo $(MSG_EXTENDED_LISTING) $@
+	$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+%.sym: %.elf
+	@echo
+	@echo $(MSG_SYMBOL_TABLE) $@
+	$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+%.elf: $(OBJ)
+	@echo
+	@echo $(MSG_LINKING) $@
+	$(CC) $(ALL_CFLAGS) $(OBJ) --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+%.o : %.c
+	@echo
+	@echo $(MSG_COMPILING) $<
+	$(CC) -c $(ALL_CFLAGS) $< -o $@ 
+
+
+# Compile: create assembler files from C source files.
+%.s : %.c
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+%.o : %.S
+	@echo
+	@echo $(MSG_ASSEMBLING) $<
+	$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+
+
+# Target: clean project.
+clean: begin clean_list finished end
+
+clean_list :
+	@echo
+	@echo $(MSG_CLEANING)
+	$(REMOVE) $(TARGET).hex
+	$(REMOVE) $(TARGET).eep
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).cof
+	$(REMOVE) $(TARGET).elf
+	$(REMOVE) $(TARGET).map
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).a90
+	$(REMOVE) $(TARGET).sym
+	$(REMOVE) $(TARGET).lnk
+	$(REMOVE) $(TARGET).lss
+	$(REMOVE) $(OBJ)
+	$(REMOVE) $(LST)
+	$(REMOVE) $(SRC:.c=.s)
+	$(REMOVE) $(SRC:.c=.d)
+	$(REMOVE) .dep/*
+
+
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program
+ 
+
+ 
diff --git a/trunk/AVRProjects/ATTiny45-primo_asm/tiny45_primo.avr b/trunk/AVRProjects/ATTiny45-primo_asm/tiny45_primo.avr
new file mode 100644
index 00000000..dc26f917
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny45-primo_asm/tiny45_primo.avr
@@ -0,0 +1,40 @@
+;* ******************************************************** *
+;   ATtiny 13/45/85 Pin map
+;                           +-\/-+
+;         /Reset ADC0 PB5  1|o   |8  Vcc
+;                ADC3 PB3  2|    |7  PB2 ADC1 SCK
+;                ADC2 PB4  3|    |6  PB1 OC0B MISO AIN1
+;                     GND  4|    |5  PB0 OC0A MOSI AIN0
+;                           +----+
+;* ******************************************************** */
+
+; Define processor type on top of the source code
+;
+.DEVICE ATtiny45
+
+; Int-Vector area
+.CSEG
+.ORG $0000
+	rjmp Setup	;Reset
+	reti		;INT0		- External Int0 Vector
+	reti		;PCINT0		- Pin Change Interrupt handler
+	reti		;TIM1_COMPA	- Timer1 Compare match A Handler
+	reti		;TIM1_OVF	- Timer1 Overflow handler
+	reti		;TIM0_OVF	- Timer0 Overflow handler
+	reti		;EE_RDY		- EEPROM Ready Handler
+	reti		;ANA_COMP	- Analog Comparator Handler
+	reti		;ADC		- ADC Conversion Handler
+	reti		;TIM1_COMPB	- Timer1 Compare match B Handler
+	reti		;TIM0_COMPA	- Timer0 Compare match A Handler
+	reti		;TIM0_COMPB	- Timer0 Compare match B Handler
+	reti		;WDT		- Watchdog Overflow Handler
+	reti		;USI_START	- USI Start
+	reti		;USI_OVF	- USI Overflow
+
+.ORG $000F
+Setup:
+	cli			; Disable Interrupts
+	ldi r16, low(RAMEND)
+	out SPL,r16 ;Set Stack Pointer to top of RAM
+Main:
+	rjmp Main	; infinite loop
diff --git a/trunk/AVRProjects/ATTiny45-primo_asm/tiny45_primo.hex b/trunk/AVRProjects/ATTiny45-primo_asm/tiny45_primo.hex
new file mode 100644
index 00000000..b7212ee5
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny45-primo_asm/tiny45_primo.hex
@@ -0,0 +1,5 @@
+:020000020000FC
+:100000000EC0189518951895189518951895189567
+:100010001895189518951895189518951895F89499
+:060020000FE50DBFFFCF4C
+:00000001FF
diff --git a/trunk/AVRProjects/ATTiny45-primo_asm/tiny45_primo.lst b/trunk/AVRProjects/ATTiny45-primo_asm/tiny45_primo.lst
new file mode 100644
index 00000000..fb6ad6f4
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny45-primo_asm/tiny45_primo.lst
@@ -0,0 +1,55 @@
+gavrasm Gerd's AVR assembler version 3.5 (C)2015 by DG4FAC
+----------------------------------------------------------
+Source file: tiny45_primo.avr
+Hex file:    tiny45_primo.hex
+Eeprom file: tiny45_primo.eep
+Compiled:    26.07.2016, 11:33:17
+Pass:        2
+     1: ;* ******************************************************** *
+     2: ;   ATtiny 13/45/85 Pin map
+     3: ;                           +-\/-+
+     4: ;         /Reset ADC0 PB5  1|o   |8  Vcc
+     5: ;                ADC3 PB3  2|    |7  PB2 ADC1 SCK
+     6: ;                ADC2 PB4  3|    |6  PB1 OC0B MISO AIN1
+     7: ;                     GND  4|    |5  PB0 OC0A MOSI AIN0
+     8: ;                           +----+
+     9: ;* ******************************************************** */
+    10: 
+    11: ; Define processor type on top of the source code
+    12: ;
+    13: .DEVICE ATtiny45
+    14: 
+    15: ; Int-Vector area
+    16: .CSEG
+    17: .ORG $0000
+    18: 000000   C00E  rjmp Setup	;Reset
+    19: 000001   9518  reti		;INT0		- External Int0 Vector
+    20: 000002   9518  reti		;PCINT0		- Pin Change Interrupt handler
+    21: 000003   9518  reti		;TIM1_COMPA	- Timer1 Compare match A Handler
+    22: 000004   9518  reti		;TIM1_OVF	- Timer1 Overflow handler
+    23: 000005   9518  reti		;TIM0_OVF	- Timer0 Overflow handler
+    24: 000006   9518  reti		;EE_RDY		- EEPROM Ready Handler
+    25: 000007   9518  reti		;ANA_COMP	- Analog Comparator Handler
+    26: 000008   9518  reti		;ADC		- ADC Conversion Handler
+    27: 000009   9518  reti		;TIM1_COMPB	- Timer1 Compare match B Handler
+    28: 00000A   9518  reti		;TIM0_COMPA	- Timer0 Compare match A Handler
+    29: 00000B   9518  reti		;TIM0_COMPB	- Timer0 Compare match B Handler
+    30: 00000C   9518  reti		;WDT		- Watchdog Overflow Handler
+    31: 00000D   9518  reti		;USI_START	- USI Start
+    32: 00000E   9518  reti		;USI_OVF	- USI Overflow
+    33: 
+    34: .ORG $000F
+    35: Setup:
+    36: 00000F   94F8  cli			; Disable Interrupts
+    37: 000010   E50F  ldi r16, low(RAMEND)
+    38: 000011   BF0D  out SPL,r16 ;Set Stack Pointer to top of RAM
+    39: Main:
+    40: 000012   CFFF  rjmp Main	; infinite loop
+
+Program             :       19 words.
+Constants           :        0 words.
+Total program memory:       19 words.
+Eeprom space        :        0 bytes.
+Data segment        :        0 bytes.
+Compilation completed, no errors.
+Compilation endet 26.07.2016, 11:33:17
diff --git a/trunk/AVRProjects/ATTiny84/.dep/main.o.d b/trunk/AVRProjects/ATTiny84/.dep/main.o.d
new file mode 100644
index 00000000..978e11e0
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny84/.dep/main.o.d
@@ -0,0 +1,49 @@
+main.o: main.c \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\io.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\sfr_defs.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\inttypes.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\lib\gcc\avr\4.8.1\include\stdint.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\stdint.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iotn84.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iotnx4.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\portpins.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\common.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\version.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\fuse.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\lock.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\math.h \
+ ../00_Lib/nokia_5110.h
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\io.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\sfr_defs.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\inttypes.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\lib\gcc\avr\4.8.1\include\stdint.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\stdint.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iotn84.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iotnx4.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\portpins.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\common.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\version.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\fuse.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\lock.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\math.h:
+
+../00_Lib/nokia_5110.h:
diff --git a/trunk/AVRProjects/ATTiny84/.dep/nokia_5110.o.d b/trunk/AVRProjects/ATTiny84/.dep/nokia_5110.o.d
new file mode 100644
index 00000000..f3989687
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny84/.dep/nokia_5110.o.d
@@ -0,0 +1,49 @@
+../00_Lib/nokia_5110.o: ../00_Lib/nokia_5110.c \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\io.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\sfr_defs.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\inttypes.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\lib\gcc\avr\4.8.1\include\stdint.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\stdint.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iotn84.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iotnx4.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\portpins.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\common.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\version.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\fuse.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\lock.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\math.h \
+ ../00_Lib/nokia_5110.h
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\io.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\sfr_defs.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\inttypes.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\lib\gcc\avr\4.8.1\include\stdint.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\stdint.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iotn84.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iotnx4.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\portpins.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\common.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\version.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\fuse.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\lock.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\math.h:
+
+../00_Lib/nokia_5110.h:
diff --git a/trunk/AVRProjects/ATTiny84/main.c b/trunk/AVRProjects/ATTiny84/main.c
new file mode 100644
index 00000000..4ffe8a1f
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny84/main.c
@@ -0,0 +1,72 @@
+/* ******************************************************** *
+ *															*
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016									*
+ * Author:		Paolo Iocco									*	
+ * ******************************************************** */
+/* ******************************************************** *
+   ATtiny 84 Pin map
+                           +-\/-+
+                     GND  1|o   |14  GND
+                     PB0  2|    |13  PA0 ADC0
+                     PB1  3|    |12  PA1 ADC1
+              /Reset PB3  4|    |11  PA2 ADC2
+			         PB2  5|    |10  PA3 ADC3
+				ADC7 PA7  6|    |9   PA4 ADC4 SCK
+		   MOSI ADC6 PA6  7|    |8   PA5 ADC5 MISO
+                           +----+
+* ******************************************************** */
+
+#define F_CPU 1000000L
+#define CONFIG_DISPLAY
+
+#define __DELAY_BACKWARD_COMPATIBLE__	
+#include <avr/io.h>		
+#include <util/delay.h>	
+#include "../00_Lib/nokia_5110.h"
+	
+
+int main (void)					
+{
+	unsigned char zwischenspeicher;		
+	DDRB = 0b00000001;
+	DDRA = 0b00011111;
+
+	LCD_init();       //LCD initialization
+	LCD_clear();      //clear the LCD
+
+	LCD_write_char('*');
+	LCD_write_byte(0,1);
+	LCD_write_byte(0,1);
+	LCD_write_char('L');
+	LCD_write_char('o');
+	LCD_write_char('v');
+	LCD_write_char('e');
+	LCD_write_byte(0,1);
+	LCD_write_byte(0,1);
+	LCD_write_byte(0,1);
+	LCD_write_byte(0,1);
+	LCD_write_byte(0,1);
+	LCD_write_char('S');
+	LCD_write_char('i');
+	LCD_write_char('l');
+	LCD_write_char('v');
+	LCD_write_char('i');
+	LCD_write_char('a');
+	LCD_write_byte(0,1);
+	LCD_write_byte(0,1);
+	LCD_write_char('*');
+	
+	LCD_write_english_string(0,1,"LOVE");
+
+	while(1)					
+	{
+		zwischenspeicher = PORTB;				
+		zwischenspeicher = zwischenspeicher ^ 0b00000001;	
+		PORTB = zwischenspeicher;				
+		_delay_ms(500);							
+	}							
+	return 0;					
+}
+
diff --git a/trunk/AVRProjects/ATTiny84/main.eep b/trunk/AVRProjects/ATTiny84/main.eep
new file mode 100644
index 00000000..1996e8fd
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny84/main.eep
@@ -0,0 +1 @@
+:00000001FF
diff --git a/trunk/AVRProjects/ATTiny84/main.elf b/trunk/AVRProjects/ATTiny84/main.elf
new file mode 100644
index 00000000..a8efd3f7
Binary files /dev/null and b/trunk/AVRProjects/ATTiny84/main.elf differ
diff --git a/trunk/AVRProjects/ATTiny84/main.hex b/trunk/AVRProjects/ATTiny84/main.hex
new file mode 100644
index 00000000..3fa30d67
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny84/main.hex
@@ -0,0 +1,132 @@
+:1000000010C022C021C020C01FC01EC01DC01CC007
+:100010001BC01AC019C018C017C016C015C014C024
+:1000200013C011241FBECFE5D2E0DEBFCDBF12E06A
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+:1004D000C9F3950F50E0551FAA27EE27FF27BB272A
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+:100560005F3FECF3983EDCF3869577956795B795FA
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+:1005E000880F991F009729F076956795B8F37105E4
+:0C05F000B9F7802D952F0895F894FFCFE7
+:1005FC000000000000000000002F000000000700B9
+:10060C00070000147F147F1400242A7F2A12006232
+:10061C0064081323003649552250000005030000DE
+:10062C0000001C224100000041221C000014083E66
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+:10064C000808080800006060000000201008040280
+:10065C00003E5149453E0000427F4000004261513E
+:10066C004946002141454B31001814127F100027D8
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+:10068C0000364949493600064949291E00003636CC
+:10069C00000000005636000000081422410000142F
+:1006AC00141414140000412214080002015109060C
+:1006BC0000324959513E007C1211127C007F49498D
+:1006CC004936003E41414122007F4141221C007FBE
+:1006DC0049494941007F09090901003E4149497ACC
+:1006EC00007F0808087F0000417F41000020404146
+:1006FC003F01007F08142241007F40404040007FB2
+:10070C00020C027F007F0408107F003E4141413EF5
+:10071C00007F09090906003E4151215E007F09193D
+:10072C0029460046494949310001017F0101003F3A
+:10073C004040403F001F2040201F003F4038403FBA
+:10074C00006314081463000708700807006151491E
+:10075C00454300007F41410000552A552A550000B1
+:10076C0041417F000004020102040040404040402F
+:10077C00000001020400002054545478007F4844C7
+:10078C00443800384444442000384444487F0038FE
+:10079C005454541800087E0901020018A4A4A47C27
+:1007AC00007F080404780000447D400000408084F1
+:1007BC007D00007F102844000000417F4000007C39
+:1007CC0004180478007C0804047800384444443845
+:1007DC0000FC242424180018242418FC007C080491
+:1007EC00040800485454542000043F444020003C6A
+:1007FC004040207C001C2040201C003C4030403CF1
+:10080C00004428102844001CA0A0A07C0044645480
+:0E081C004C441414141414144C4F5645000090
+:00000001FF
diff --git a/trunk/AVRProjects/ATTiny84/main.lss b/trunk/AVRProjects/ATTiny84/main.lss
new file mode 100644
index 00000000..ba20d959
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny84/main.lss
@@ -0,0 +1,1151 @@
+
+main.elf:     file format elf32-avr
+
+Sections:
+Idx Name          Size      VMA       LMA       File off  Algn
+  0 .text         000005fc  00000000  00000000  00000074  2**1
+                  CONTENTS, ALLOC, LOAD, READONLY, CODE
+  1 .data         0000022e  00800060  000005fc  00000670  2**0
+                  CONTENTS, ALLOC, LOAD, DATA
+  2 .comment      00000011  00000000  00000000  0000089e  2**0
+                  CONTENTS, READONLY
+  3 .debug_aranges 00000040  00000000  00000000  000008af  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  4 .debug_info   00000a93  00000000  00000000  000008ef  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  5 .debug_abbrev 000003a3  00000000  00000000  00001382  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  6 .debug_line   000002df  00000000  00000000  00001725  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  7 .debug_frame  000001c8  00000000  00000000  00001a04  2**2
+                  CONTENTS, READONLY, DEBUGGING
+  8 .debug_str    00000252  00000000  00000000  00001bcc  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  9 .debug_loc    0000074c  00000000  00000000  00001e1e  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 10 .debug_ranges 00000058  00000000  00000000  0000256a  2**0
+                  CONTENTS, READONLY, DEBUGGING
+
+Disassembly of section .text:
+
+00000000 <__vectors>:
+   0:	10 c0       	rjmp	.+32     	; 0x22 <__ctors_end>
+   2:	22 c0       	rjmp	.+68     	; 0x48 <__bad_interrupt>
+   4:	21 c0       	rjmp	.+66     	; 0x48 <__bad_interrupt>
+   6:	20 c0       	rjmp	.+64     	; 0x48 <__bad_interrupt>
+   8:	1f c0       	rjmp	.+62     	; 0x48 <__bad_interrupt>
+   a:	1e c0       	rjmp	.+60     	; 0x48 <__bad_interrupt>
+   c:	1d c0       	rjmp	.+58     	; 0x48 <__bad_interrupt>
+   e:	1c c0       	rjmp	.+56     	; 0x48 <__bad_interrupt>
+  10:	1b c0       	rjmp	.+54     	; 0x48 <__bad_interrupt>
+  12:	1a c0       	rjmp	.+52     	; 0x48 <__bad_interrupt>
+  14:	19 c0       	rjmp	.+50     	; 0x48 <__bad_interrupt>
+  16:	18 c0       	rjmp	.+48     	; 0x48 <__bad_interrupt>
+  18:	17 c0       	rjmp	.+46     	; 0x48 <__bad_interrupt>
+  1a:	16 c0       	rjmp	.+44     	; 0x48 <__bad_interrupt>
+  1c:	15 c0       	rjmp	.+42     	; 0x48 <__bad_interrupt>
+  1e:	14 c0       	rjmp	.+40     	; 0x48 <__bad_interrupt>
+  20:	13 c0       	rjmp	.+38     	; 0x48 <__bad_interrupt>
+
+00000022 <__ctors_end>:
+  22:	11 24       	eor	r1, r1
+  24:	1f be       	out	0x3f, r1	; 63
+  26:	cf e5       	ldi	r28, 0x5F	; 95
+  28:	d2 e0       	ldi	r29, 0x02	; 2
+  2a:	de bf       	out	0x3e, r29	; 62
+  2c:	cd bf       	out	0x3d, r28	; 61
+
+0000002e <__do_copy_data>:
+  2e:	12 e0       	ldi	r17, 0x02	; 2
+  30:	a0 e6       	ldi	r26, 0x60	; 96
+  32:	b0 e0       	ldi	r27, 0x00	; 0
+  34:	ec ef       	ldi	r30, 0xFC	; 252
+  36:	f5 e0       	ldi	r31, 0x05	; 5
+  38:	02 c0       	rjmp	.+4      	; 0x3e <__SP_H__>
+  3a:	05 90       	lpm	r0, Z+
+  3c:	0d 92       	st	X+, r0
+  3e:	ae 38       	cpi	r26, 0x8E	; 142
+  40:	b1 07       	cpc	r27, r17
+  42:	d9 f7       	brne	.-10     	; 0x3a <__do_copy_data+0xc>
+  44:	2b d1       	rcall	.+598    	; 0x29c <main>
+  46:	d8 c2       	rjmp	.+1456   	; 0x5f8 <_exit>
+
+00000048 <__bad_interrupt>:
+  48:	db cf       	rjmp	.-74     	; 0x0 <__vectors>
+
+0000004a <delay_1us>:
+    can be achieved.
+*/
+void
+_delay_loop_1(uint8_t __count)
+{
+	__asm__ volatile (
+  4a:	81 e0       	ldi	r24, 0x01	; 1
+  4c:	8a 95       	dec	r24
+  4e:	f1 f7       	brne	.-4      	; 0x4c <delay_1us+0x2>
+  50:	08 95       	ret
+
+00000052 <delay_1ms>:
+    milliseconds can be achieved.
+ */
+void
+_delay_loop_2(uint16_t __count)
+{
+	__asm__ volatile (
+  52:	8a ef       	ldi	r24, 0xFA	; 250
+  54:	90 e0       	ldi	r25, 0x00	; 0
+  56:	01 97       	sbiw	r24, 0x01	; 1
+  58:	f1 f7       	brne	.-4      	; 0x56 <delay_1ms+0x4>
+  5a:	08 95       	ret
+
+0000005c <delay_nms>:
+{
+	_delay_ms(1);
+}
+  
+void delay_nms(unsigned int n)       //delay nms
+{
+  5c:	8f 92       	push	r8
+  5e:	9f 92       	push	r9
+  60:	af 92       	push	r10
+  62:	bf 92       	push	r11
+  64:	cf 92       	push	r12
+  66:	df 92       	push	r13
+  68:	ef 92       	push	r14
+  6a:	ff 92       	push	r15
+	_delay_ms(n);
+  6c:	bc 01       	movw	r22, r24
+  6e:	80 e0       	ldi	r24, 0x00	; 0
+  70:	90 e0       	ldi	r25, 0x00	; 0
+  72:	90 d1       	rcall	.+800    	; 0x394 <__floatunsisf>
+  74:	4b 01       	movw	r8, r22
+  76:	5c 01       	movw	r10, r24
+
+	__builtin_avr_delay_cycles(__ticks_dc);
+
+#else
+	uint16_t __ticks;
+	__tmp = ((F_CPU) / 4e3) * __ms;
+  78:	20 e0       	ldi	r18, 0x00	; 0
+  7a:	30 e0       	ldi	r19, 0x00	; 0
+  7c:	4a e7       	ldi	r20, 0x7A	; 122
+  7e:	53 e4       	ldi	r21, 0x43	; 67
+  80:	17 d2       	rcall	.+1070   	; 0x4b0 <__mulsf3>
+  82:	6b 01       	movw	r12, r22
+  84:	7c 01       	movw	r14, r24
+	if (__tmp < 1.0)
+  86:	20 e0       	ldi	r18, 0x00	; 0
+  88:	30 e0       	ldi	r19, 0x00	; 0
+  8a:	40 e8       	ldi	r20, 0x80	; 128
+  8c:	5f e3       	ldi	r21, 0x3F	; 63
+  8e:	52 d1       	rcall	.+676    	; 0x334 <__cmpsf2>
+  90:	87 fd       	sbrc	r24, 7
+  92:	20 c0       	rjmp	.+64     	; 0xd4 <delay_nms+0x78>
+		__ticks = 1;
+	else if (__tmp > 65535)
+  94:	20 e0       	ldi	r18, 0x00	; 0
+  96:	3f ef       	ldi	r19, 0xFF	; 255
+  98:	4f e7       	ldi	r20, 0x7F	; 127
+  9a:	57 e4       	ldi	r21, 0x47	; 71
+  9c:	c7 01       	movw	r24, r14
+  9e:	b6 01       	movw	r22, r12
+  a0:	03 d2       	rcall	.+1030   	; 0x4a8 <__gesf2>
+  a2:	18 16       	cp	r1, r24
+  a4:	9c f4       	brge	.+38     	; 0xcc <delay_nms+0x70>
+	{
+		//	__ticks = requested delay in 1/10 ms
+		__ticks = (uint16_t) (__ms * 10.0);
+  a6:	20 e0       	ldi	r18, 0x00	; 0
+  a8:	30 e0       	ldi	r19, 0x00	; 0
+  aa:	40 e2       	ldi	r20, 0x20	; 32
+  ac:	51 e4       	ldi	r21, 0x41	; 65
+  ae:	c5 01       	movw	r24, r10
+  b0:	b4 01       	movw	r22, r8
+  b2:	fe d1       	rcall	.+1020   	; 0x4b0 <__mulsf3>
+  b4:	43 d1       	rcall	.+646    	; 0x33c <__fixunssfsi>
+  b6:	29 e1       	ldi	r18, 0x19	; 25
+  b8:	30 e0       	ldi	r19, 0x00	; 0
+		while(__ticks)
+  ba:	61 15       	cp	r22, r1
+  bc:	71 05       	cpc	r23, r1
+  be:	79 f0       	breq	.+30     	; 0xde <delay_nms+0x82>
+  c0:	c9 01       	movw	r24, r18
+  c2:	01 97       	sbiw	r24, 0x01	; 1
+  c4:	f1 f7       	brne	.-4      	; 0xc2 <delay_nms+0x66>
+		{
+			// wait 1/10 ms
+			_delay_loop_2(((F_CPU) / 4e3) / 10);
+			__ticks --;
+  c6:	61 50       	subi	r22, 0x01	; 1
+  c8:	71 09       	sbc	r23, r1
+  ca:	f7 cf       	rjmp	.-18     	; 0xba <delay_nms+0x5e>
+		}
+		return;
+	}
+	else
+		__ticks = (uint16_t)__tmp;
+  cc:	c7 01       	movw	r24, r14
+  ce:	b6 01       	movw	r22, r12
+  d0:	35 d1       	rcall	.+618    	; 0x33c <__fixunssfsi>
+  d2:	02 c0       	rjmp	.+4      	; 0xd8 <delay_nms+0x7c>
+
+#else
+	uint16_t __ticks;
+	__tmp = ((F_CPU) / 4e3) * __ms;
+	if (__tmp < 1.0)
+		__ticks = 1;
+  d4:	61 e0       	ldi	r22, 0x01	; 1
+  d6:	70 e0       	ldi	r23, 0x00	; 0
+  d8:	cb 01       	movw	r24, r22
+  da:	01 97       	sbiw	r24, 0x01	; 1
+  dc:	f1 f7       	brne	.-4      	; 0xda <delay_nms+0x7e>
+}
+  de:	ff 90       	pop	r15
+  e0:	ef 90       	pop	r14
+  e2:	df 90       	pop	r13
+  e4:	cf 90       	pop	r12
+  e6:	bf 90       	pop	r11
+  e8:	af 90       	pop	r10
+  ea:	9f 90       	pop	r9
+  ec:	8f 90       	pop	r8
+  ee:	08 95       	ret
+
+000000f0 <LCD_write_byte>:
+created date        2014-01-08
+-----------------------------------------------------------------------*/  
+void LCD_write_byte(unsigned char dat, unsigned char command)
+{
+	unsigned char i;
+    LCD_CE_clr;
+  f0:	db 98       	cbi	0x1b, 3	; 27
+    
+	if (command == 0)
+  f2:	61 11       	cpse	r22, r1
+  f4:	02 c0       	rjmp	.+4      	; 0xfa <LCD_write_byte+0xa>
+		LCD_DC_clr;
+  f6:	da 98       	cbi	0x1b, 2	; 27
+  f8:	01 c0       	rjmp	.+2      	; 0xfc <LCD_write_byte+0xc>
+    else
+		LCD_DC_set;
+  fa:	da 9a       	sbi	0x1b, 2	; 27
+					command -> command (0) /data (1)
+
+created date        2014-01-08
+-----------------------------------------------------------------------*/  
+void LCD_write_byte(unsigned char dat, unsigned char command)
+{
+  fc:	98 e0       	ldi	r25, 0x08	; 8
+    else
+		LCD_DC_set;
+
+	for(i=0;i<8;i++)
+	{
+		if(dat&0x80)
+  fe:	87 ff       	sbrs	r24, 7
+ 100:	02 c0       	rjmp	.+4      	; 0x106 <LCD_write_byte+0x16>
+			SDIN_set;
+ 102:	d9 9a       	sbi	0x1b, 1	; 27
+ 104:	01 c0       	rjmp	.+2      	; 0x108 <LCD_write_byte+0x18>
+		else
+			SDIN_clr;
+ 106:	d9 98       	cbi	0x1b, 1	; 27
+		SCLK_clr;
+ 108:	d8 98       	cbi	0x1b, 0	; 27
+		dat = dat << 1;
+ 10a:	88 0f       	add	r24, r24
+		//delay_1us();
+        SCLK_set;
+ 10c:	d8 9a       	sbi	0x1b, 0	; 27
+ 10e:	91 50       	subi	r25, 0x01	; 1
+	if (command == 0)
+		LCD_DC_clr;
+    else
+		LCD_DC_set;
+
+	for(i=0;i<8;i++)
+ 110:	b1 f7       	brne	.-20     	; 0xfe <LCD_write_byte+0xe>
+		dat = dat << 1;
+		//delay_1us();
+        SCLK_set;
+        //delay_1us();
+	}
+    LCD_CE_set;
+ 112:	db 9a       	sbi	0x1b, 3	; 27
+ 114:	08 95       	ret
+
+00000116 <LCD_clear>:
+input parmenter:	None
+
+created date        2014-01-08
+-----------------------------------------------------------------------*/ 
+void LCD_clear(void)          
+{
+ 116:	cf 93       	push	r28
+ 118:	df 93       	push	r29
+	unsigned int i;
+
+    LCD_write_byte(0x0c, 0);			
+ 11a:	60 e0       	ldi	r22, 0x00	; 0
+ 11c:	8c e0       	ldi	r24, 0x0C	; 12
+ 11e:	e8 df       	rcall	.-48     	; 0xf0 <LCD_write_byte>
+    LCD_write_byte(0x80, 0);			
+ 120:	60 e0       	ldi	r22, 0x00	; 0
+ 122:	80 e8       	ldi	r24, 0x80	; 128
+ 124:	e5 df       	rcall	.-54     	; 0xf0 <LCD_write_byte>
+ 126:	c8 ef       	ldi	r28, 0xF8	; 248
+ 128:	d1 e0       	ldi	r29, 0x01	; 1
+
+    for (i=0; i<504; i++)
+	{
+		LCD_write_byte(0, 1);
+ 12a:	61 e0       	ldi	r22, 0x01	; 1
+ 12c:	80 e0       	ldi	r24, 0x00	; 0
+ 12e:	e0 df       	rcall	.-64     	; 0xf0 <LCD_write_byte>
+ 130:	21 97       	sbiw	r28, 0x01	; 1
+	unsigned int i;
+
+    LCD_write_byte(0x0c, 0);			
+    LCD_write_byte(0x80, 0);			
+
+    for (i=0; i<504; i++)
+ 132:	d9 f7       	brne	.-10     	; 0x12a <LCD_clear+0x14>
+	{
+		LCD_write_byte(0, 1);
+	}		
+}
+ 134:	df 91       	pop	r29
+ 136:	cf 91       	pop	r28
+ 138:	08 95       	ret
+
+0000013a <LCD_init>:
+
+created date        2014-01-08
+-----------------------------------------------------------------------*/ 
+void LCD_init(void)                 
+{
+	DDRA|=0X1F;    
+ 13a:	8a b3       	in	r24, 0x1a	; 26
+ 13c:	8f 61       	ori	r24, 0x1F	; 31
+ 13e:	8a bb       	out	0x1a, r24	; 26
+
+    LCD_RST_clr;
+ 140:	dc 98       	cbi	0x1b, 4	; 27
+    delay_1us();
+ 142:	83 df       	rcall	.-250    	; 0x4a <delay_1us>
+    LCD_RST_set;
+ 144:	dc 9a       	sbi	0x1b, 4	; 27
+    
+    LCD_CE_clr;
+ 146:	db 98       	cbi	0x1b, 3	; 27
+    delay_1us();
+ 148:	80 df       	rcall	.-256    	; 0x4a <delay_1us>
+    LCD_CE_set;
+ 14a:	db 9a       	sbi	0x1b, 3	; 27
+    delay_1us();
+ 14c:	7e df       	rcall	.-260    	; 0x4a <delay_1us>
+
+    LCD_write_byte(0x21, 0);		// set LCD mode
+ 14e:	60 e0       	ldi	r22, 0x00	; 0
+ 150:	81 e2       	ldi	r24, 0x21	; 33
+ 152:	ce df       	rcall	.-100    	; 0xf0 <LCD_write_byte>
+	LCD_write_byte(0xC8, 0);		// set bias voltage
+ 154:	60 e0       	ldi	r22, 0x00	; 0
+ 156:	88 ec       	ldi	r24, 0xC8	; 200
+ 158:	cb df       	rcall	.-106    	; 0xf0 <LCD_write_byte>
+    LCD_write_byte(0x06, 0);		// temperature correction
+ 15a:	60 e0       	ldi	r22, 0x00	; 0
+ 15c:	86 e0       	ldi	r24, 0x06	; 6
+ 15e:	c8 df       	rcall	.-112    	; 0xf0 <LCD_write_byte>
+    LCD_write_byte(0x13, 0);		// 1:48
+ 160:	60 e0       	ldi	r22, 0x00	; 0
+ 162:	83 e1       	ldi	r24, 0x13	; 19
+ 164:	c5 df       	rcall	.-118    	; 0xf0 <LCD_write_byte>
+    LCD_write_byte(0x20, 0);		// use bias command
+ 166:	60 e0       	ldi	r22, 0x00	; 0
+ 168:	80 e2       	ldi	r24, 0x20	; 32
+ 16a:	c2 df       	rcall	.-124    	; 0xf0 <LCD_write_byte>
+    LCD_clear();	            	// clear the LCD
+ 16c:	d4 df       	rcall	.-88     	; 0x116 <LCD_clear>
+    LCD_write_byte(0x0c, 0);		// set LCD mode,display normally
+ 16e:	60 e0       	ldi	r22, 0x00	; 0
+ 170:	8c e0       	ldi	r24, 0x0C	; 12
+ 172:	be df       	rcall	.-132    	; 0xf0 <LCD_write_byte>
+        
+    LCD_CE_clr;    
+ 174:	db 98       	cbi	0x1b, 3	; 27
+ 176:	08 95       	ret
+
+00000178 <LCD_set_XY>:
+					Y       -> 0­5
+					
+created date        2014-01-08
+-----------------------------------------------------------------------*/ 
+void LCD_set_XY(unsigned char X, unsigned char Y)
+{
+ 178:	cf 93       	push	r28
+ 17a:	c8 2f       	mov	r28, r24
+ 17c:	86 2f       	mov	r24, r22
+	LCD_write_byte(0x40 | Y, 0);	// column
+ 17e:	60 e0       	ldi	r22, 0x00	; 0
+ 180:	80 64       	ori	r24, 0x40	; 64
+ 182:	b6 df       	rcall	.-148    	; 0xf0 <LCD_write_byte>
+    LCD_write_byte(0x80 | X, 0);	// row
+ 184:	60 e0       	ldi	r22, 0x00	; 0
+ 186:	8c 2f       	mov	r24, r28
+ 188:	80 68       	ori	r24, 0x80	; 128
+}
+ 18a:	cf 91       	pop	r28
+created date        2014-01-08
+-----------------------------------------------------------------------*/ 
+void LCD_set_XY(unsigned char X, unsigned char Y)
+{
+	LCD_write_byte(0x40 | Y, 0);	// column
+    LCD_write_byte(0x80 | X, 0);	// row
+ 18c:	b1 cf       	rjmp	.-158    	; 0xf0 <LCD_write_byte>
+
+0000018e <LCD_write_char>:
+input parameter:	c   	-> char to display
+					
+created date        2014-01-08
+-----------------------------------------------------------------------*/ 
+void LCD_write_char(unsigned char c)
+{
+ 18e:	0f 93       	push	r16
+ 190:	1f 93       	push	r17
+ 192:	cf 93       	push	r28
+ 194:	df 93       	push	r29
+    unsigned char line;
+
+    c -= 32;
+ 196:	80 52       	subi	r24, 0x20	; 32
+ 198:	90 e0       	ldi	r25, 0x00	; 0
+ 19a:	66 e0       	ldi	r22, 0x06	; 6
+ 19c:	70 e0       	ldi	r23, 0x00	; 0
+ 19e:	1b d2       	rcall	.+1078   	; 0x5d6 <__mulhi3>
+ 1a0:	8c 01       	movw	r16, r24
+ 1a2:	00 5a       	subi	r16, 0xA0	; 160
+ 1a4:	1f 4f       	sbci	r17, 0xFF	; 255
+ 1a6:	c0 e0       	ldi	r28, 0x00	; 0
+ 1a8:	d0 e0       	ldi	r29, 0x00	; 0
+ 1aa:	f8 01       	movw	r30, r16
+ 1ac:	ec 0f       	add	r30, r28
+ 1ae:	fd 1f       	adc	r31, r29
+    for (line=0; line<6; line++)
+		LCD_write_byte(font6x8[c][line], 1);
+ 1b0:	61 e0       	ldi	r22, 0x01	; 1
+ 1b2:	80 81       	ld	r24, Z
+ 1b4:	9d df       	rcall	.-198    	; 0xf0 <LCD_write_byte>
+ 1b6:	21 96       	adiw	r28, 0x01	; 1
+void LCD_write_char(unsigned char c)
+{
+    unsigned char line;
+
+    c -= 32;
+    for (line=0; line<6; line++)
+ 1b8:	c6 30       	cpi	r28, 0x06	; 6
+ 1ba:	d1 05       	cpc	r29, r1
+ 1bc:	b1 f7       	brne	.-20     	; 0x1aa <LCD_write_char+0x1c>
+		LCD_write_byte(font6x8[c][line], 1);
+}
+ 1be:	df 91       	pop	r29
+ 1c0:	cf 91       	pop	r28
+ 1c2:	1f 91       	pop	r17
+ 1c4:	0f 91       	pop	r16
+ 1c6:	08 95       	ret
+
+000001c8 <LCD_write_english_string>:
+					s		-> String to display
+					
+created date        2014-01-08
+-----------------------------------------------------------------------*/ 
+void LCD_write_english_string(unsigned char X,unsigned char Y, unsigned char *s)
+{
+ 1c8:	0f 93       	push	r16
+ 1ca:	1f 93       	push	r17
+ 1cc:	cf 93       	push	r28
+ 1ce:	df 93       	push	r29
+ 1d0:	00 d0       	rcall	.+0      	; 0x1d2 <LCD_write_english_string+0xa>
+ 1d2:	cd b7       	in	r28, 0x3d	; 61
+ 1d4:	de b7       	in	r29, 0x3e	; 62
+	LCD_set_XY(X,Y);
+ 1d6:	49 83       	std	Y+1, r20	; 0x01
+ 1d8:	5a 83       	std	Y+2, r21	; 0x02
+ 1da:	ce df       	rcall	.-100    	; 0x178 <LCD_set_XY>
+ 1dc:	49 81       	ldd	r20, Y+1	; 0x01
+ 1de:	04 2f       	mov	r16, r20
+ 1e0:	5a 81       	ldd	r21, Y+2	; 0x02
+ 1e2:	15 2f       	mov	r17, r21
+    while (*s)
+ 1e4:	f8 01       	movw	r30, r16
+ 1e6:	81 91       	ld	r24, Z+
+ 1e8:	8f 01       	movw	r16, r30
+ 1ea:	88 23       	and	r24, r24
+ 1ec:	11 f0       	breq	.+4      	; 0x1f2 <LCD_write_english_string+0x2a>
+    {
+        LCD_write_char(*s);
+ 1ee:	cf df       	rcall	.-98     	; 0x18e <LCD_write_char>
+ 1f0:	f9 cf       	rjmp	.-14     	; 0x1e4 <LCD_write_english_string+0x1c>
+        s++;
+    }
+}
+ 1f2:	0f 90       	pop	r0
+ 1f4:	0f 90       	pop	r0
+ 1f6:	df 91       	pop	r29
+ 1f8:	cf 91       	pop	r28
+ 1fa:	1f 91       	pop	r17
+ 1fc:	0f 91       	pop	r16
+ 1fe:	08 95       	ret
+
+00000200 <LCD_draw_bmp_pixel>:
+					Pix_y   -> width
+					
+created date        2014-01-08
+-----------------------------------------------------------------------*/   
+void LCD_draw_bmp_pixel(unsigned char X,unsigned char Y,unsigned char *map, unsigned char Pix_x,unsigned char Pix_y)
+{
+ 200:	6f 92       	push	r6
+ 202:	7f 92       	push	r7
+ 204:	8f 92       	push	r8
+ 206:	9f 92       	push	r9
+ 208:	af 92       	push	r10
+ 20a:	bf 92       	push	r11
+ 20c:	cf 92       	push	r12
+ 20e:	df 92       	push	r13
+ 210:	ef 92       	push	r14
+ 212:	ff 92       	push	r15
+ 214:	0f 93       	push	r16
+ 216:	1f 93       	push	r17
+ 218:	cf 93       	push	r28
+ 21a:	df 93       	push	r29
+ 21c:	68 2e       	mov	r6, r24
+ 21e:	76 2e       	mov	r7, r22
+    unsigned int i,n;
+    unsigned char row;
+    
+    if (Pix_y%8==0) row=Pix_y/8;     //calculate how many line are needed
+ 220:	80 2f       	mov	r24, r16
+ 222:	87 70       	andi	r24, 0x07	; 7
+ 224:	06 95       	lsr	r16
+ 226:	06 95       	lsr	r16
+ 228:	06 95       	lsr	r16
+ 22a:	81 11       	cpse	r24, r1
+    else row=Pix_y/8+1;
+ 22c:	0f 5f       	subi	r16, 0xFF	; 255
+ 22e:	c2 2e       	mov	r12, r18
+ 230:	d1 2c       	mov	r13, r1
+ 232:	ea 01       	movw	r28, r20
+ 234:	aa 24       	eor	r10, r10
+ 236:	bb 24       	eor	r11, r11
+ 238:	a4 1a       	sub	r10, r20
+ 23a:	b5 0a       	sbc	r11, r21
+    
+    for (n=0;n<row;n++)
+ 23c:	e1 2c       	mov	r14, r1
+ 23e:	f1 2c       	mov	r15, r1
+ 240:	10 e0       	ldi	r17, 0x00	; 0
+ 242:	67 2d       	mov	r22, r7
+ 244:	6e 0d       	add	r22, r14
+ 246:	e0 16       	cp	r14, r16
+ 248:	f1 06       	cpc	r15, r17
+ 24a:	b8 f4       	brcc	.+46     	; 0x27a <__stack+0x1b>
+    {
+		LCD_set_XY(X,Y);
+ 24c:	86 2d       	mov	r24, r6
+ 24e:	94 df       	rcall	.-216    	; 0x178 <LCD_set_XY>
+		for(i=0; i<Pix_x; i++)
+ 250:	4e 01       	movw	r8, r28
+ 252:	94 01       	movw	r18, r8
+ 254:	2a 0d       	add	r18, r10
+ 256:	3b 1d       	adc	r19, r11
+ 258:	2c 15       	cp	r18, r12
+ 25a:	3d 05       	cpc	r19, r13
+ 25c:	30 f4       	brcc	.+12     	; 0x26a <__stack+0xb>
+        {
+			LCD_write_byte(map[i+n*Pix_x], 1);
+ 25e:	61 e0       	ldi	r22, 0x01	; 1
+ 260:	f4 01       	movw	r30, r8
+ 262:	81 91       	ld	r24, Z+
+ 264:	4f 01       	movw	r8, r30
+ 266:	44 df       	rcall	.-376    	; 0xf0 <LCD_write_byte>
+ 268:	f4 cf       	rjmp	.-24     	; 0x252 <LCD_draw_bmp_pixel+0x52>
+    unsigned char row;
+    
+    if (Pix_y%8==0) row=Pix_y/8;     //calculate how many line are needed
+    else row=Pix_y/8+1;
+    
+    for (n=0;n<row;n++)
+ 26a:	ff ef       	ldi	r31, 0xFF	; 255
+ 26c:	ef 1a       	sub	r14, r31
+ 26e:	ff 0a       	sbc	r15, r31
+ 270:	cc 0d       	add	r28, r12
+ 272:	dd 1d       	adc	r29, r13
+ 274:	ac 18       	sub	r10, r12
+ 276:	bd 08       	sbc	r11, r13
+ 278:	e4 cf       	rjmp	.-56     	; 0x242 <LCD_draw_bmp_pixel+0x42>
+        {
+			LCD_write_byte(map[i+n*Pix_x], 1);
+        }
+		Y++;                         // next line
+    }      
+}
+ 27a:	df 91       	pop	r29
+ 27c:	cf 91       	pop	r28
+ 27e:	1f 91       	pop	r17
+ 280:	0f 91       	pop	r16
+ 282:	ff 90       	pop	r15
+ 284:	ef 90       	pop	r14
+ 286:	df 90       	pop	r13
+ 288:	cf 90       	pop	r12
+ 28a:	bf 90       	pop	r11
+ 28c:	af 90       	pop	r10
+ 28e:	9f 90       	pop	r9
+ 290:	8f 90       	pop	r8
+ 292:	7f 90       	pop	r7
+ 294:	6f 90       	pop	r6
+ 296:	08 95       	ret
+
+00000298 <LCD_pixel>:
+
+  Return value :  None.
+
+--------------------------------------------------------------------------------------------------*/
+void LCD_pixel (unsigned char x, unsigned char y, LcdPixelMode mode)
+{
+ 298:	08 95       	ret
+
+0000029a <LCD_line>:
+
+  Return value :  None.
+
+--------------------------------------------------------------------------------------------------*/
+void LCD_line (unsigned char x1, unsigned char y1, unsigned char x2, unsigned char y2, LcdPixelMode mode)
+{
+ 29a:	08 95       	ret
+
+0000029c <main>:
+	
+
+int main (void)					
+{
+	unsigned char zwischenspeicher;		
+	DDRB = 0b00000001;
+ 29c:	81 e0       	ldi	r24, 0x01	; 1
+ 29e:	87 bb       	out	0x17, r24	; 23
+	DDRA = 0b00011111;
+ 2a0:	8f e1       	ldi	r24, 0x1F	; 31
+ 2a2:	8a bb       	out	0x1a, r24	; 26
+
+	LCD_init();       //LCD initialization
+ 2a4:	4a df       	rcall	.-364    	; 0x13a <LCD_init>
+	LCD_clear();      //clear the LCD
+ 2a6:	37 df       	rcall	.-402    	; 0x116 <LCD_clear>
+
+	LCD_write_char('*');
+ 2a8:	8a e2       	ldi	r24, 0x2A	; 42
+ 2aa:	71 df       	rcall	.-286    	; 0x18e <LCD_write_char>
+	LCD_write_byte(0,1);
+ 2ac:	61 e0       	ldi	r22, 0x01	; 1
+ 2ae:	80 e0       	ldi	r24, 0x00	; 0
+ 2b0:	1f df       	rcall	.-450    	; 0xf0 <LCD_write_byte>
+	LCD_write_byte(0,1);
+ 2b2:	61 e0       	ldi	r22, 0x01	; 1
+ 2b4:	80 e0       	ldi	r24, 0x00	; 0
+ 2b6:	1c df       	rcall	.-456    	; 0xf0 <LCD_write_byte>
+	LCD_write_char('L');
+ 2b8:	8c e4       	ldi	r24, 0x4C	; 76
+ 2ba:	69 df       	rcall	.-302    	; 0x18e <LCD_write_char>
+	LCD_write_char('o');
+ 2bc:	8f e6       	ldi	r24, 0x6F	; 111
+ 2be:	67 df       	rcall	.-306    	; 0x18e <LCD_write_char>
+	LCD_write_char('v');
+ 2c0:	86 e7       	ldi	r24, 0x76	; 118
+ 2c2:	65 df       	rcall	.-310    	; 0x18e <LCD_write_char>
+	LCD_write_char('e');
+ 2c4:	85 e6       	ldi	r24, 0x65	; 101
+ 2c6:	63 df       	rcall	.-314    	; 0x18e <LCD_write_char>
+	LCD_write_byte(0,1);
+ 2c8:	61 e0       	ldi	r22, 0x01	; 1
+ 2ca:	80 e0       	ldi	r24, 0x00	; 0
+ 2cc:	11 df       	rcall	.-478    	; 0xf0 <LCD_write_byte>
+	LCD_write_byte(0,1);
+ 2ce:	61 e0       	ldi	r22, 0x01	; 1
+ 2d0:	80 e0       	ldi	r24, 0x00	; 0
+ 2d2:	0e df       	rcall	.-484    	; 0xf0 <LCD_write_byte>
+	LCD_write_byte(0,1);
+ 2d4:	61 e0       	ldi	r22, 0x01	; 1
+ 2d6:	80 e0       	ldi	r24, 0x00	; 0
+ 2d8:	0b df       	rcall	.-490    	; 0xf0 <LCD_write_byte>
+	LCD_write_byte(0,1);
+ 2da:	61 e0       	ldi	r22, 0x01	; 1
+ 2dc:	80 e0       	ldi	r24, 0x00	; 0
+ 2de:	08 df       	rcall	.-496    	; 0xf0 <LCD_write_byte>
+	LCD_write_byte(0,1);
+ 2e0:	61 e0       	ldi	r22, 0x01	; 1
+ 2e2:	80 e0       	ldi	r24, 0x00	; 0
+ 2e4:	05 df       	rcall	.-502    	; 0xf0 <LCD_write_byte>
+	LCD_write_char('S');
+ 2e6:	83 e5       	ldi	r24, 0x53	; 83
+ 2e8:	52 df       	rcall	.-348    	; 0x18e <LCD_write_char>
+	LCD_write_char('i');
+ 2ea:	89 e6       	ldi	r24, 0x69	; 105
+ 2ec:	50 df       	rcall	.-352    	; 0x18e <LCD_write_char>
+	LCD_write_char('l');
+ 2ee:	8c e6       	ldi	r24, 0x6C	; 108
+ 2f0:	4e df       	rcall	.-356    	; 0x18e <LCD_write_char>
+	LCD_write_char('v');
+ 2f2:	86 e7       	ldi	r24, 0x76	; 118
+ 2f4:	4c df       	rcall	.-360    	; 0x18e <LCD_write_char>
+	LCD_write_char('i');
+ 2f6:	89 e6       	ldi	r24, 0x69	; 105
+ 2f8:	4a df       	rcall	.-364    	; 0x18e <LCD_write_char>
+	LCD_write_char('a');
+ 2fa:	81 e6       	ldi	r24, 0x61	; 97
+ 2fc:	48 df       	rcall	.-368    	; 0x18e <LCD_write_char>
+	LCD_write_byte(0,1);
+ 2fe:	61 e0       	ldi	r22, 0x01	; 1
+ 300:	80 e0       	ldi	r24, 0x00	; 0
+ 302:	f6 de       	rcall	.-532    	; 0xf0 <LCD_write_byte>
+	LCD_write_byte(0,1);
+ 304:	61 e0       	ldi	r22, 0x01	; 1
+ 306:	80 e0       	ldi	r24, 0x00	; 0
+ 308:	f3 de       	rcall	.-538    	; 0xf0 <LCD_write_byte>
+	LCD_write_char('*');
+ 30a:	8a e2       	ldi	r24, 0x2A	; 42
+ 30c:	40 df       	rcall	.-384    	; 0x18e <LCD_write_char>
+	
+	LCD_write_english_string(0,1,"LOVE");
+ 30e:	48 e8       	ldi	r20, 0x88	; 136
+ 310:	52 e0       	ldi	r21, 0x02	; 2
+ 312:	61 e0       	ldi	r22, 0x01	; 1
+ 314:	80 e0       	ldi	r24, 0x00	; 0
+ 316:	58 df       	rcall	.-336    	; 0x1c8 <LCD_write_english_string>
+
+	while(1)					
+	{
+		zwischenspeicher = PORTB;				
+		zwischenspeicher = zwischenspeicher ^ 0b00000001;	
+ 318:	41 e0       	ldi	r20, 0x01	; 1
+ 31a:	29 e1       	ldi	r18, 0x19	; 25
+ 31c:	30 e0       	ldi	r19, 0x00	; 0
+	
+	LCD_write_english_string(0,1,"LOVE");
+
+	while(1)					
+	{
+		zwischenspeicher = PORTB;				
+ 31e:	88 b3       	in	r24, 0x18	; 24
+		zwischenspeicher = zwischenspeicher ^ 0b00000001;	
+ 320:	84 27       	eor	r24, r20
+		PORTB = zwischenspeicher;				
+ 322:	88 bb       	out	0x18, r24	; 24
+ 324:	88 e8       	ldi	r24, 0x88	; 136
+ 326:	93 e1       	ldi	r25, 0x13	; 19
+ 328:	f9 01       	movw	r30, r18
+ 32a:	31 97       	sbiw	r30, 0x01	; 1
+ 32c:	f1 f7       	brne	.-4      	; 0x32a <main+0x8e>
+ 32e:	01 97       	sbiw	r24, 0x01	; 1
+	else if (__tmp > 65535)
+	{
+		//	__ticks = requested delay in 1/10 ms
+		__ticks = (uint16_t) (__ms * 10.0);
+		while(__ticks)
+ 330:	d9 f7       	brne	.-10     	; 0x328 <main+0x8c>
+ 332:	f5 cf       	rjmp	.-22     	; 0x31e <main+0x82>
+
+00000334 <__cmpsf2>:
+ 334:	6c d0       	rcall	.+216    	; 0x40e <__fp_cmp>
+ 336:	08 f4       	brcc	.+2      	; 0x33a <__cmpsf2+0x6>
+ 338:	81 e0       	ldi	r24, 0x01	; 1
+ 33a:	08 95       	ret
+
+0000033c <__fixunssfsi>:
+ 33c:	94 d0       	rcall	.+296    	; 0x466 <__fp_splitA>
+ 33e:	88 f0       	brcs	.+34     	; 0x362 <__fixunssfsi+0x26>
+ 340:	9f 57       	subi	r25, 0x7F	; 127
+ 342:	90 f0       	brcs	.+36     	; 0x368 <__fixunssfsi+0x2c>
+ 344:	b9 2f       	mov	r27, r25
+ 346:	99 27       	eor	r25, r25
+ 348:	b7 51       	subi	r27, 0x17	; 23
+ 34a:	a0 f0       	brcs	.+40     	; 0x374 <__fixunssfsi+0x38>
+ 34c:	d1 f0       	breq	.+52     	; 0x382 <__fixunssfsi+0x46>
+ 34e:	66 0f       	add	r22, r22
+ 350:	77 1f       	adc	r23, r23
+ 352:	88 1f       	adc	r24, r24
+ 354:	99 1f       	adc	r25, r25
+ 356:	1a f0       	brmi	.+6      	; 0x35e <__fixunssfsi+0x22>
+ 358:	ba 95       	dec	r27
+ 35a:	c9 f7       	brne	.-14     	; 0x34e <__fixunssfsi+0x12>
+ 35c:	12 c0       	rjmp	.+36     	; 0x382 <__fixunssfsi+0x46>
+ 35e:	b1 30       	cpi	r27, 0x01	; 1
+ 360:	81 f0       	breq	.+32     	; 0x382 <__fixunssfsi+0x46>
+ 362:	9b d0       	rcall	.+310    	; 0x49a <__fp_zero>
+ 364:	b1 e0       	ldi	r27, 0x01	; 1
+ 366:	08 95       	ret
+ 368:	98 c0       	rjmp	.+304    	; 0x49a <__fp_zero>
+ 36a:	67 2f       	mov	r22, r23
+ 36c:	78 2f       	mov	r23, r24
+ 36e:	88 27       	eor	r24, r24
+ 370:	b8 5f       	subi	r27, 0xF8	; 248
+ 372:	39 f0       	breq	.+14     	; 0x382 <__fixunssfsi+0x46>
+ 374:	b9 3f       	cpi	r27, 0xF9	; 249
+ 376:	cc f3       	brlt	.-14     	; 0x36a <__fixunssfsi+0x2e>
+ 378:	86 95       	lsr	r24
+ 37a:	77 95       	ror	r23
+ 37c:	67 95       	ror	r22
+ 37e:	b3 95       	inc	r27
+ 380:	d9 f7       	brne	.-10     	; 0x378 <__fixunssfsi+0x3c>
+ 382:	3e f4       	brtc	.+14     	; 0x392 <__fixunssfsi+0x56>
+ 384:	90 95       	com	r25
+ 386:	80 95       	com	r24
+ 388:	70 95       	com	r23
+ 38a:	61 95       	neg	r22
+ 38c:	7f 4f       	sbci	r23, 0xFF	; 255
+ 38e:	8f 4f       	sbci	r24, 0xFF	; 255
+ 390:	9f 4f       	sbci	r25, 0xFF	; 255
+ 392:	08 95       	ret
+
+00000394 <__floatunsisf>:
+ 394:	e8 94       	clt
+ 396:	09 c0       	rjmp	.+18     	; 0x3aa <__floatsisf+0x12>
+
+00000398 <__floatsisf>:
+ 398:	97 fb       	bst	r25, 7
+ 39a:	3e f4       	brtc	.+14     	; 0x3aa <__floatsisf+0x12>
+ 39c:	90 95       	com	r25
+ 39e:	80 95       	com	r24
+ 3a0:	70 95       	com	r23
+ 3a2:	61 95       	neg	r22
+ 3a4:	7f 4f       	sbci	r23, 0xFF	; 255
+ 3a6:	8f 4f       	sbci	r24, 0xFF	; 255
+ 3a8:	9f 4f       	sbci	r25, 0xFF	; 255
+ 3aa:	99 23       	and	r25, r25
+ 3ac:	a9 f0       	breq	.+42     	; 0x3d8 <__floatsisf+0x40>
+ 3ae:	f9 2f       	mov	r31, r25
+ 3b0:	96 e9       	ldi	r25, 0x96	; 150
+ 3b2:	bb 27       	eor	r27, r27
+ 3b4:	93 95       	inc	r25
+ 3b6:	f6 95       	lsr	r31
+ 3b8:	87 95       	ror	r24
+ 3ba:	77 95       	ror	r23
+ 3bc:	67 95       	ror	r22
+ 3be:	b7 95       	ror	r27
+ 3c0:	f1 11       	cpse	r31, r1
+ 3c2:	f8 cf       	rjmp	.-16     	; 0x3b4 <__floatsisf+0x1c>
+ 3c4:	fa f4       	brpl	.+62     	; 0x404 <__floatsisf+0x6c>
+ 3c6:	bb 0f       	add	r27, r27
+ 3c8:	11 f4       	brne	.+4      	; 0x3ce <__floatsisf+0x36>
+ 3ca:	60 ff       	sbrs	r22, 0
+ 3cc:	1b c0       	rjmp	.+54     	; 0x404 <__floatsisf+0x6c>
+ 3ce:	6f 5f       	subi	r22, 0xFF	; 255
+ 3d0:	7f 4f       	sbci	r23, 0xFF	; 255
+ 3d2:	8f 4f       	sbci	r24, 0xFF	; 255
+ 3d4:	9f 4f       	sbci	r25, 0xFF	; 255
+ 3d6:	16 c0       	rjmp	.+44     	; 0x404 <__floatsisf+0x6c>
+ 3d8:	88 23       	and	r24, r24
+ 3da:	11 f0       	breq	.+4      	; 0x3e0 <__floatsisf+0x48>
+ 3dc:	96 e9       	ldi	r25, 0x96	; 150
+ 3de:	11 c0       	rjmp	.+34     	; 0x402 <__floatsisf+0x6a>
+ 3e0:	77 23       	and	r23, r23
+ 3e2:	21 f0       	breq	.+8      	; 0x3ec <__floatsisf+0x54>
+ 3e4:	9e e8       	ldi	r25, 0x8E	; 142
+ 3e6:	87 2f       	mov	r24, r23
+ 3e8:	76 2f       	mov	r23, r22
+ 3ea:	05 c0       	rjmp	.+10     	; 0x3f6 <__floatsisf+0x5e>
+ 3ec:	66 23       	and	r22, r22
+ 3ee:	71 f0       	breq	.+28     	; 0x40c <__floatsisf+0x74>
+ 3f0:	96 e8       	ldi	r25, 0x86	; 134
+ 3f2:	86 2f       	mov	r24, r22
+ 3f4:	70 e0       	ldi	r23, 0x00	; 0
+ 3f6:	60 e0       	ldi	r22, 0x00	; 0
+ 3f8:	2a f0       	brmi	.+10     	; 0x404 <__floatsisf+0x6c>
+ 3fa:	9a 95       	dec	r25
+ 3fc:	66 0f       	add	r22, r22
+ 3fe:	77 1f       	adc	r23, r23
+ 400:	88 1f       	adc	r24, r24
+ 402:	da f7       	brpl	.-10     	; 0x3fa <__floatsisf+0x62>
+ 404:	88 0f       	add	r24, r24
+ 406:	96 95       	lsr	r25
+ 408:	87 95       	ror	r24
+ 40a:	97 f9       	bld	r25, 7
+ 40c:	08 95       	ret
+
+0000040e <__fp_cmp>:
+ 40e:	99 0f       	add	r25, r25
+ 410:	00 08       	sbc	r0, r0
+ 412:	55 0f       	add	r21, r21
+ 414:	aa 0b       	sbc	r26, r26
+ 416:	e0 e8       	ldi	r30, 0x80	; 128
+ 418:	fe ef       	ldi	r31, 0xFE	; 254
+ 41a:	16 16       	cp	r1, r22
+ 41c:	17 06       	cpc	r1, r23
+ 41e:	e8 07       	cpc	r30, r24
+ 420:	f9 07       	cpc	r31, r25
+ 422:	c0 f0       	brcs	.+48     	; 0x454 <__fp_cmp+0x46>
+ 424:	12 16       	cp	r1, r18
+ 426:	13 06       	cpc	r1, r19
+ 428:	e4 07       	cpc	r30, r20
+ 42a:	f5 07       	cpc	r31, r21
+ 42c:	98 f0       	brcs	.+38     	; 0x454 <__fp_cmp+0x46>
+ 42e:	62 1b       	sub	r22, r18
+ 430:	73 0b       	sbc	r23, r19
+ 432:	84 0b       	sbc	r24, r20
+ 434:	95 0b       	sbc	r25, r21
+ 436:	39 f4       	brne	.+14     	; 0x446 <__fp_cmp+0x38>
+ 438:	0a 26       	eor	r0, r26
+ 43a:	61 f0       	breq	.+24     	; 0x454 <__fp_cmp+0x46>
+ 43c:	23 2b       	or	r18, r19
+ 43e:	24 2b       	or	r18, r20
+ 440:	25 2b       	or	r18, r21
+ 442:	21 f4       	brne	.+8      	; 0x44c <__fp_cmp+0x3e>
+ 444:	08 95       	ret
+ 446:	0a 26       	eor	r0, r26
+ 448:	09 f4       	brne	.+2      	; 0x44c <__fp_cmp+0x3e>
+ 44a:	a1 40       	sbci	r26, 0x01	; 1
+ 44c:	a6 95       	lsr	r26
+ 44e:	8f ef       	ldi	r24, 0xFF	; 255
+ 450:	81 1d       	adc	r24, r1
+ 452:	81 1d       	adc	r24, r1
+ 454:	08 95       	ret
+
+00000456 <__fp_split3>:
+ 456:	57 fd       	sbrc	r21, 7
+ 458:	90 58       	subi	r25, 0x80	; 128
+ 45a:	44 0f       	add	r20, r20
+ 45c:	55 1f       	adc	r21, r21
+ 45e:	59 f0       	breq	.+22     	; 0x476 <__fp_splitA+0x10>
+ 460:	5f 3f       	cpi	r21, 0xFF	; 255
+ 462:	71 f0       	breq	.+28     	; 0x480 <__fp_splitA+0x1a>
+ 464:	47 95       	ror	r20
+
+00000466 <__fp_splitA>:
+ 466:	88 0f       	add	r24, r24
+ 468:	97 fb       	bst	r25, 7
+ 46a:	99 1f       	adc	r25, r25
+ 46c:	61 f0       	breq	.+24     	; 0x486 <__fp_splitA+0x20>
+ 46e:	9f 3f       	cpi	r25, 0xFF	; 255
+ 470:	79 f0       	breq	.+30     	; 0x490 <__fp_splitA+0x2a>
+ 472:	87 95       	ror	r24
+ 474:	08 95       	ret
+ 476:	12 16       	cp	r1, r18
+ 478:	13 06       	cpc	r1, r19
+ 47a:	14 06       	cpc	r1, r20
+ 47c:	55 1f       	adc	r21, r21
+ 47e:	f2 cf       	rjmp	.-28     	; 0x464 <__fp_split3+0xe>
+ 480:	46 95       	lsr	r20
+ 482:	f1 df       	rcall	.-30     	; 0x466 <__fp_splitA>
+ 484:	08 c0       	rjmp	.+16     	; 0x496 <__fp_splitA+0x30>
+ 486:	16 16       	cp	r1, r22
+ 488:	17 06       	cpc	r1, r23
+ 48a:	18 06       	cpc	r1, r24
+ 48c:	99 1f       	adc	r25, r25
+ 48e:	f1 cf       	rjmp	.-30     	; 0x472 <__fp_splitA+0xc>
+ 490:	86 95       	lsr	r24
+ 492:	71 05       	cpc	r23, r1
+ 494:	61 05       	cpc	r22, r1
+ 496:	08 94       	sec
+ 498:	08 95       	ret
+
+0000049a <__fp_zero>:
+ 49a:	e8 94       	clt
+
+0000049c <__fp_szero>:
+ 49c:	bb 27       	eor	r27, r27
+ 49e:	66 27       	eor	r22, r22
+ 4a0:	77 27       	eor	r23, r23
+ 4a2:	cb 01       	movw	r24, r22
+ 4a4:	97 f9       	bld	r25, 7
+ 4a6:	08 95       	ret
+
+000004a8 <__gesf2>:
+ 4a8:	b2 df       	rcall	.-156    	; 0x40e <__fp_cmp>
+ 4aa:	08 f4       	brcc	.+2      	; 0x4ae <__gesf2+0x6>
+ 4ac:	8f ef       	ldi	r24, 0xFF	; 255
+ 4ae:	08 95       	ret
+
+000004b0 <__mulsf3>:
+ 4b0:	0a d0       	rcall	.+20     	; 0x4c6 <__mulsf3x>
+ 4b2:	80 c0       	rjmp	.+256    	; 0x5b4 <__fp_round>
+ 4b4:	71 d0       	rcall	.+226    	; 0x598 <__fp_pscA>
+ 4b6:	28 f0       	brcs	.+10     	; 0x4c2 <__mulsf3+0x12>
+ 4b8:	76 d0       	rcall	.+236    	; 0x5a6 <__fp_pscB>
+ 4ba:	18 f0       	brcs	.+6      	; 0x4c2 <__mulsf3+0x12>
+ 4bc:	95 23       	and	r25, r21
+ 4be:	09 f0       	breq	.+2      	; 0x4c2 <__mulsf3+0x12>
+ 4c0:	62 c0       	rjmp	.+196    	; 0x586 <__fp_inf>
+ 4c2:	67 c0       	rjmp	.+206    	; 0x592 <__fp_nan>
+ 4c4:	eb cf       	rjmp	.-42     	; 0x49c <__fp_szero>
+
+000004c6 <__mulsf3x>:
+ 4c6:	c7 df       	rcall	.-114    	; 0x456 <__fp_split3>
+ 4c8:	a8 f3       	brcs	.-22     	; 0x4b4 <__mulsf3+0x4>
+
+000004ca <__mulsf3_pse>:
+ 4ca:	99 23       	and	r25, r25
+ 4cc:	d9 f3       	breq	.-10     	; 0x4c4 <__mulsf3+0x14>
+ 4ce:	55 23       	and	r21, r21
+ 4d0:	c9 f3       	breq	.-14     	; 0x4c4 <__mulsf3+0x14>
+ 4d2:	95 0f       	add	r25, r21
+ 4d4:	50 e0       	ldi	r21, 0x00	; 0
+ 4d6:	55 1f       	adc	r21, r21
+ 4d8:	aa 27       	eor	r26, r26
+ 4da:	ee 27       	eor	r30, r30
+ 4dc:	ff 27       	eor	r31, r31
+ 4de:	bb 27       	eor	r27, r27
+ 4e0:	00 24       	eor	r0, r0
+ 4e2:	08 94       	sec
+ 4e4:	67 95       	ror	r22
+ 4e6:	20 f4       	brcc	.+8      	; 0x4f0 <__mulsf3_pse+0x26>
+ 4e8:	e2 0f       	add	r30, r18
+ 4ea:	f3 1f       	adc	r31, r19
+ 4ec:	b4 1f       	adc	r27, r20
+ 4ee:	0a 1e       	adc	r0, r26
+ 4f0:	22 0f       	add	r18, r18
+ 4f2:	33 1f       	adc	r19, r19
+ 4f4:	44 1f       	adc	r20, r20
+ 4f6:	aa 1f       	adc	r26, r26
+ 4f8:	66 95       	lsr	r22
+ 4fa:	a9 f7       	brne	.-22     	; 0x4e6 <__mulsf3_pse+0x1c>
+ 4fc:	77 95       	ror	r23
+ 4fe:	30 f4       	brcc	.+12     	; 0x50c <__mulsf3_pse+0x42>
+ 500:	f3 0f       	add	r31, r19
+ 502:	b4 1f       	adc	r27, r20
+ 504:	0a 1e       	adc	r0, r26
+ 506:	12 1e       	adc	r1, r18
+ 508:	08 f4       	brcc	.+2      	; 0x50c <__mulsf3_pse+0x42>
+ 50a:	63 95       	inc	r22
+ 50c:	33 0f       	add	r19, r19
+ 50e:	44 1f       	adc	r20, r20
+ 510:	aa 1f       	adc	r26, r26
+ 512:	22 1f       	adc	r18, r18
+ 514:	76 95       	lsr	r23
+ 516:	99 f7       	brne	.-26     	; 0x4fe <__mulsf3_pse+0x34>
+ 518:	87 95       	ror	r24
+ 51a:	20 f4       	brcc	.+8      	; 0x524 <__mulsf3_pse+0x5a>
+ 51c:	b4 0f       	add	r27, r20
+ 51e:	0a 1e       	adc	r0, r26
+ 520:	12 1e       	adc	r1, r18
+ 522:	63 1f       	adc	r22, r19
+ 524:	44 0f       	add	r20, r20
+ 526:	aa 1f       	adc	r26, r26
+ 528:	22 1f       	adc	r18, r18
+ 52a:	33 1f       	adc	r19, r19
+ 52c:	86 95       	lsr	r24
+ 52e:	a9 f7       	brne	.-22     	; 0x51a <__mulsf3_pse+0x50>
+ 530:	86 2f       	mov	r24, r22
+ 532:	71 2d       	mov	r23, r1
+ 534:	60 2d       	mov	r22, r0
+ 536:	11 24       	eor	r1, r1
+ 538:	9f 57       	subi	r25, 0x7F	; 127
+ 53a:	50 40       	sbci	r21, 0x00	; 0
+ 53c:	8a f0       	brmi	.+34     	; 0x560 <__mulsf3_pse+0x96>
+ 53e:	e1 f0       	breq	.+56     	; 0x578 <__mulsf3_pse+0xae>
+ 540:	88 23       	and	r24, r24
+ 542:	4a f0       	brmi	.+18     	; 0x556 <__mulsf3_pse+0x8c>
+ 544:	ee 0f       	add	r30, r30
+ 546:	ff 1f       	adc	r31, r31
+ 548:	bb 1f       	adc	r27, r27
+ 54a:	66 1f       	adc	r22, r22
+ 54c:	77 1f       	adc	r23, r23
+ 54e:	88 1f       	adc	r24, r24
+ 550:	91 50       	subi	r25, 0x01	; 1
+ 552:	50 40       	sbci	r21, 0x00	; 0
+ 554:	a9 f7       	brne	.-22     	; 0x540 <__mulsf3_pse+0x76>
+ 556:	9e 3f       	cpi	r25, 0xFE	; 254
+ 558:	51 05       	cpc	r21, r1
+ 55a:	70 f0       	brcs	.+28     	; 0x578 <__mulsf3_pse+0xae>
+ 55c:	14 c0       	rjmp	.+40     	; 0x586 <__fp_inf>
+ 55e:	9e cf       	rjmp	.-196    	; 0x49c <__fp_szero>
+ 560:	5f 3f       	cpi	r21, 0xFF	; 255
+ 562:	ec f3       	brlt	.-6      	; 0x55e <__mulsf3_pse+0x94>
+ 564:	98 3e       	cpi	r25, 0xE8	; 232
+ 566:	dc f3       	brlt	.-10     	; 0x55e <__mulsf3_pse+0x94>
+ 568:	86 95       	lsr	r24
+ 56a:	77 95       	ror	r23
+ 56c:	67 95       	ror	r22
+ 56e:	b7 95       	ror	r27
+ 570:	f7 95       	ror	r31
+ 572:	e7 95       	ror	r30
+ 574:	9f 5f       	subi	r25, 0xFF	; 255
+ 576:	c1 f7       	brne	.-16     	; 0x568 <__mulsf3_pse+0x9e>
+ 578:	fe 2b       	or	r31, r30
+ 57a:	88 0f       	add	r24, r24
+ 57c:	91 1d       	adc	r25, r1
+ 57e:	96 95       	lsr	r25
+ 580:	87 95       	ror	r24
+ 582:	97 f9       	bld	r25, 7
+ 584:	08 95       	ret
+
+00000586 <__fp_inf>:
+ 586:	97 f9       	bld	r25, 7
+ 588:	9f 67       	ori	r25, 0x7F	; 127
+ 58a:	80 e8       	ldi	r24, 0x80	; 128
+ 58c:	70 e0       	ldi	r23, 0x00	; 0
+ 58e:	60 e0       	ldi	r22, 0x00	; 0
+ 590:	08 95       	ret
+
+00000592 <__fp_nan>:
+ 592:	9f ef       	ldi	r25, 0xFF	; 255
+ 594:	80 ec       	ldi	r24, 0xC0	; 192
+ 596:	08 95       	ret
+
+00000598 <__fp_pscA>:
+ 598:	00 24       	eor	r0, r0
+ 59a:	0a 94       	dec	r0
+ 59c:	16 16       	cp	r1, r22
+ 59e:	17 06       	cpc	r1, r23
+ 5a0:	18 06       	cpc	r1, r24
+ 5a2:	09 06       	cpc	r0, r25
+ 5a4:	08 95       	ret
+
+000005a6 <__fp_pscB>:
+ 5a6:	00 24       	eor	r0, r0
+ 5a8:	0a 94       	dec	r0
+ 5aa:	12 16       	cp	r1, r18
+ 5ac:	13 06       	cpc	r1, r19
+ 5ae:	14 06       	cpc	r1, r20
+ 5b0:	05 06       	cpc	r0, r21
+ 5b2:	08 95       	ret
+
+000005b4 <__fp_round>:
+ 5b4:	09 2e       	mov	r0, r25
+ 5b6:	03 94       	inc	r0
+ 5b8:	00 0c       	add	r0, r0
+ 5ba:	11 f4       	brne	.+4      	; 0x5c0 <__fp_round+0xc>
+ 5bc:	88 23       	and	r24, r24
+ 5be:	52 f0       	brmi	.+20     	; 0x5d4 <__fp_round+0x20>
+ 5c0:	bb 0f       	add	r27, r27
+ 5c2:	40 f4       	brcc	.+16     	; 0x5d4 <__fp_round+0x20>
+ 5c4:	bf 2b       	or	r27, r31
+ 5c6:	11 f4       	brne	.+4      	; 0x5cc <__fp_round+0x18>
+ 5c8:	60 ff       	sbrs	r22, 0
+ 5ca:	04 c0       	rjmp	.+8      	; 0x5d4 <__fp_round+0x20>
+ 5cc:	6f 5f       	subi	r22, 0xFF	; 255
+ 5ce:	7f 4f       	sbci	r23, 0xFF	; 255
+ 5d0:	8f 4f       	sbci	r24, 0xFF	; 255
+ 5d2:	9f 4f       	sbci	r25, 0xFF	; 255
+ 5d4:	08 95       	ret
+
+000005d6 <__mulhi3>:
+ 5d6:	00 24       	eor	r0, r0
+ 5d8:	55 27       	eor	r21, r21
+ 5da:	04 c0       	rjmp	.+8      	; 0x5e4 <__mulhi3+0xe>
+ 5dc:	08 0e       	add	r0, r24
+ 5de:	59 1f       	adc	r21, r25
+ 5e0:	88 0f       	add	r24, r24
+ 5e2:	99 1f       	adc	r25, r25
+ 5e4:	00 97       	sbiw	r24, 0x00	; 0
+ 5e6:	29 f0       	breq	.+10     	; 0x5f2 <__mulhi3+0x1c>
+ 5e8:	76 95       	lsr	r23
+ 5ea:	67 95       	ror	r22
+ 5ec:	b8 f3       	brcs	.-18     	; 0x5dc <__mulhi3+0x6>
+ 5ee:	71 05       	cpc	r23, r1
+ 5f0:	b9 f7       	brne	.-18     	; 0x5e0 <__mulhi3+0xa>
+ 5f2:	80 2d       	mov	r24, r0
+ 5f4:	95 2f       	mov	r25, r21
+ 5f6:	08 95       	ret
+
+000005f8 <_exit>:
+ 5f8:	f8 94       	cli
+
+000005fa <__stop_program>:
+ 5fa:	ff cf       	rjmp	.-2      	; 0x5fa <__stop_program>
diff --git a/trunk/AVRProjects/ATTiny84/main.lst b/trunk/AVRProjects/ATTiny84/main.lst
new file mode 100644
index 00000000..81b1917f
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny84/main.lst
@@ -0,0 +1,536 @@
+   1               		.file	"main.c"
+   2               	__SP_H__ = 0x3e
+   3               	__SP_L__ = 0x3d
+   4               	__SREG__ = 0x3f
+   5               	__tmp_reg__ = 0
+   6               	__zero_reg__ = 1
+   7               		.text
+   8               	.Ltext0:
+   9               		.cfi_sections	.debug_frame
+  10               		.section	.rodata.str1.1,"aMS",@progbits,1
+  11               	.LC0:
+  12 0000 4C4F 5645 		.string	"LOVE"
+  12      00
+  13               		.section	.text.startup,"ax",@progbits
+  14               	.global	main
+  16               	main:
+  17               	.LFB6:
+  18               		.file 1 "main.c"
+   1:main.c        **** #define F_CPU 1000000L
+   2:main.c        **** #define CONFIG_DISPLAY
+   3:main.c        **** 
+   4:main.c        **** #define __DELAY_BACKWARD_COMPATIBLE__	
+   5:main.c        **** #include <avr/io.h>		
+   6:main.c        **** #include <util/delay.h>	
+   7:main.c        **** #include "../00_Lib/nokia_5110.h"
+   8:main.c        **** 	
+   9:main.c        **** 
+  10:main.c        **** int main (void)					
+  11:main.c        **** {
+  19               		.loc 1 11 0
+  20               		.cfi_startproc
+  21               	/* prologue: function */
+  22               	/* frame size = 0 */
+  23               	/* stack size = 0 */
+  24               	.L__stack_usage = 0
+  12:main.c        **** 	unsigned char zwischenspeicher;		
+  13:main.c        **** 	DDRB = 0b00000001;
+  25               		.loc 1 13 0
+  26 0000 81E0      		ldi r24,lo8(1)
+  27 0002 87BB      		out 0x17,r24
+  14:main.c        **** 	DDRA = 0b00011111;
+  28               		.loc 1 14 0
+  29 0004 8FE1      		ldi r24,lo8(31)
+  30 0006 8ABB      		out 0x1a,r24
+  15:main.c        **** 
+  16:main.c        **** 	LCD_init();       //LCD initialization
+  31               		.loc 1 16 0
+  32 0008 00D0      		rcall LCD_init
+  33               	.LVL0:
+  17:main.c        **** 	LCD_clear();      //clear the LCD
+  34               		.loc 1 17 0
+  35 000a 00D0      		rcall LCD_clear
+  36               	.LVL1:
+  18:main.c        **** 
+  19:main.c        **** 	LCD_write_char('*');
+  37               		.loc 1 19 0
+  38 000c 8AE2      		ldi r24,lo8(42)
+  39 000e 00D0      		rcall LCD_write_char
+  40               	.LVL2:
+  20:main.c        **** 	LCD_write_byte(0,1);
+  41               		.loc 1 20 0
+  42 0010 61E0      		ldi r22,lo8(1)
+  43 0012 80E0      		ldi r24,0
+  44 0014 00D0      		rcall LCD_write_byte
+  45               	.LVL3:
+  21:main.c        **** 	LCD_write_byte(0,1);
+  46               		.loc 1 21 0
+  47 0016 61E0      		ldi r22,lo8(1)
+  48 0018 80E0      		ldi r24,0
+  49 001a 00D0      		rcall LCD_write_byte
+  50               	.LVL4:
+  22:main.c        **** 	LCD_write_char('L');
+  51               		.loc 1 22 0
+  52 001c 8CE4      		ldi r24,lo8(76)
+  53 001e 00D0      		rcall LCD_write_char
+  54               	.LVL5:
+  23:main.c        **** 	LCD_write_char('o');
+  55               		.loc 1 23 0
+  56 0020 8FE6      		ldi r24,lo8(111)
+  57 0022 00D0      		rcall LCD_write_char
+  58               	.LVL6:
+  24:main.c        **** 	LCD_write_char('v');
+  59               		.loc 1 24 0
+  60 0024 86E7      		ldi r24,lo8(118)
+  61 0026 00D0      		rcall LCD_write_char
+  62               	.LVL7:
+  25:main.c        **** 	LCD_write_char('e');
+  63               		.loc 1 25 0
+  64 0028 85E6      		ldi r24,lo8(101)
+  65 002a 00D0      		rcall LCD_write_char
+  66               	.LVL8:
+  26:main.c        **** 	LCD_write_byte(0,1);
+  67               		.loc 1 26 0
+  68 002c 61E0      		ldi r22,lo8(1)
+  69 002e 80E0      		ldi r24,0
+  70 0030 00D0      		rcall LCD_write_byte
+  71               	.LVL9:
+  27:main.c        **** 	LCD_write_byte(0,1);
+  72               		.loc 1 27 0
+  73 0032 61E0      		ldi r22,lo8(1)
+  74 0034 80E0      		ldi r24,0
+  75 0036 00D0      		rcall LCD_write_byte
+  76               	.LVL10:
+  28:main.c        **** 	LCD_write_byte(0,1);
+  77               		.loc 1 28 0
+  78 0038 61E0      		ldi r22,lo8(1)
+  79 003a 80E0      		ldi r24,0
+  80 003c 00D0      		rcall LCD_write_byte
+  81               	.LVL11:
+  29:main.c        **** 	LCD_write_byte(0,1);
+  82               		.loc 1 29 0
+  83 003e 61E0      		ldi r22,lo8(1)
+  84 0040 80E0      		ldi r24,0
+  85 0042 00D0      		rcall LCD_write_byte
+  86               	.LVL12:
+  30:main.c        **** 	LCD_write_byte(0,1);
+  87               		.loc 1 30 0
+  88 0044 61E0      		ldi r22,lo8(1)
+  89 0046 80E0      		ldi r24,0
+  90 0048 00D0      		rcall LCD_write_byte
+  91               	.LVL13:
+  31:main.c        **** 	LCD_write_char('S');
+  92               		.loc 1 31 0
+  93 004a 83E5      		ldi r24,lo8(83)
+  94 004c 00D0      		rcall LCD_write_char
+  95               	.LVL14:
+  32:main.c        **** 	LCD_write_char('i');
+  96               		.loc 1 32 0
+  97 004e 89E6      		ldi r24,lo8(105)
+  98 0050 00D0      		rcall LCD_write_char
+  99               	.LVL15:
+  33:main.c        **** 	LCD_write_char('l');
+ 100               		.loc 1 33 0
+ 101 0052 8CE6      		ldi r24,lo8(108)
+ 102 0054 00D0      		rcall LCD_write_char
+ 103               	.LVL16:
+  34:main.c        **** 	LCD_write_char('v');
+ 104               		.loc 1 34 0
+ 105 0056 86E7      		ldi r24,lo8(118)
+ 106 0058 00D0      		rcall LCD_write_char
+ 107               	.LVL17:
+  35:main.c        **** 	LCD_write_char('i');
+ 108               		.loc 1 35 0
+ 109 005a 89E6      		ldi r24,lo8(105)
+ 110 005c 00D0      		rcall LCD_write_char
+ 111               	.LVL18:
+  36:main.c        **** 	LCD_write_char('a');
+ 112               		.loc 1 36 0
+ 113 005e 81E6      		ldi r24,lo8(97)
+ 114 0060 00D0      		rcall LCD_write_char
+ 115               	.LVL19:
+  37:main.c        **** 	LCD_write_byte(0,1);
+ 116               		.loc 1 37 0
+ 117 0062 61E0      		ldi r22,lo8(1)
+ 118 0064 80E0      		ldi r24,0
+ 119 0066 00D0      		rcall LCD_write_byte
+ 120               	.LVL20:
+  38:main.c        **** 	LCD_write_byte(0,1);
+ 121               		.loc 1 38 0
+ 122 0068 61E0      		ldi r22,lo8(1)
+ 123 006a 80E0      		ldi r24,0
+ 124 006c 00D0      		rcall LCD_write_byte
+ 125               	.LVL21:
+  39:main.c        **** 	LCD_write_char('*');
+ 126               		.loc 1 39 0
+ 127 006e 8AE2      		ldi r24,lo8(42)
+ 128 0070 00D0      		rcall LCD_write_char
+ 129               	.LVL22:
+  40:main.c        **** 	
+  41:main.c        **** 	LCD_write_english_string(0,1,"LOVE");
+ 130               		.loc 1 41 0
+ 131 0072 40E0      		ldi r20,lo8(.LC0)
+ 132 0074 50E0      		ldi r21,hi8(.LC0)
+ 133 0076 61E0      		ldi r22,lo8(1)
+ 134 0078 80E0      		ldi r24,0
+ 135 007a 00D0      		rcall LCD_write_english_string
+ 136               	.LVL23:
+  42:main.c        **** 
+  43:main.c        **** 	while(1)					
+  44:main.c        **** 	{
+  45:main.c        **** 		zwischenspeicher = PORTB;				
+  46:main.c        **** 		zwischenspeicher = zwischenspeicher ^ 0b00000001;	
+ 137               		.loc 1 46 0
+ 138 007c 41E0      		ldi r20,lo8(1)
+ 139               	.LBB12:
+ 140               	.LBB13:
+ 141               	.LBB14:
+ 142               	.LBB15:
+ 143               		.file 2 "e:\\progs\\arduino-1.7.4\\hardware\\tools\\avr\\avr\\include\\util\\delay_basic.h"
+   1:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** /* Copyright (c) 2002, Marek Michalkiewicz
+   2:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****    Copyright (c) 2007 Joerg Wunsch
+   3:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****    All rights reserved.
+   4:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 
+   5:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****    Redistribution and use in source and binary forms, with or without
+   6:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****    modification, are permitted provided that the following conditions are met:
+   7:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 
+   8:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****    * Redistributions of source code must retain the above copyright
+   9:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****      notice, this list of conditions and the following disclaimer.
+  10:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 
+  11:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****    * Redistributions in binary form must reproduce the above copyright
+  12:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****      notice, this list of conditions and the following disclaimer in
+  13:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****      the documentation and/or other materials provided with the
+  14:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****      distribution.
+  15:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 
+  16:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****    * Neither the name of the copyright holders nor the names of
+  17:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****      contributors may be used to endorse or promote products derived
+  18:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****      from this software without specific prior written permission.
+  19:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 
+  20:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  21:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  22:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  23:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  24:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  25:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  26:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  27:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  28:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  29:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+  30:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****   POSSIBILITY OF SUCH DAMAGE. */
+  31:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 
+  32:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** /* $Id$ */
+  33:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 
+  34:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** #ifndef _UTIL_DELAY_BASIC_H_
+  35:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** #define _UTIL_DELAY_BASIC_H_ 1
+  36:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 
+  37:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** #include <inttypes.h>
+  38:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 
+  39:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** #if !defined(__DOXYGEN__)
+  40:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** static inline void _delay_loop_1(uint8_t __count) __attribute__((always_inline));
+  41:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** static inline void _delay_loop_2(uint16_t __count) __attribute__((always_inline));
+  42:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** #endif
+  43:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 
+  44:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** /** \file */
+  45:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** /** \defgroup util_delay_basic <util/delay_basic.h>: Basic busy-wait delay loops
+  46:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     \code
+  47:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     #include <util/delay_basic.h>
+  48:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     \endcode
+  49:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 
+  50:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     The functions in this header file implement simple delay loops
+  51:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     that perform a busy-waiting.  They are typically used to
+  52:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     facilitate short delays in the program execution.  They are
+  53:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     implemented as count-down loops with a well-known CPU cycle
+  54:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     count per loop iteration.  As such, no other processing can
+  55:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     occur simultaneously.  It should be kept in mind that the
+  56:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     functions described here do not disable interrupts.
+  57:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 
+  58:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     In general, for long delays, the use of hardware timers is
+  59:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     much preferrable, as they free the CPU, and allow for
+  60:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     concurrent processing of other events while the timer is
+  61:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     running.  However, in particular for very short delays, the
+  62:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     overhead of setting up a hardware timer is too much compared
+  63:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     to the overall delay time.
+  64:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 
+  65:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     Two inline functions are provided for the actual delay algorithms.
+  66:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 
+  67:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** */
+  68:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 
+  69:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** /** \ingroup util_delay_basic
+  70:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 
+  71:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     Delay loop using an 8-bit counter \c __count, so up to 256
+  72:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     iterations are possible.  (The value 256 would have to be passed
+  73:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     as 0.)  The loop executes three CPU cycles per iteration, not
+  74:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     including the overhead the compiler needs to setup the counter
+  75:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     register.
+  76:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 
+  77:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     Thus, at a CPU speed of 1 MHz, delays of up to 768 microseconds
+  78:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     can be achieved.
+  79:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** */
+  80:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** void
+  81:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** _delay_loop_1(uint8_t __count)
+  82:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** {
+  83:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 	__asm__ volatile (
+  84:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 		"1: dec %0" "\n\t"
+  85:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 		"brne 1b"
+  86:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 		: "=r" (__count)
+  87:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 		: "0" (__count)
+  88:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 	);
+  89:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** }
+  90:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 
+  91:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** /** \ingroup util_delay_basic
+  92:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 
+  93:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     Delay loop using a 16-bit counter \c __count, so up to 65536
+  94:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     iterations are possible.  (The value 65536 would have to be
+  95:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     passed as 0.)  The loop executes four CPU cycles per iteration,
+  96:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     not including the overhead the compiler requires to setup the
+  97:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     counter register pair.
+  98:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 
+  99:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     Thus, at a CPU speed of 1 MHz, delays of up to about 262.1
+ 100:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****     milliseconds can be achieved.
+ 101:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h ****  */
+ 102:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** void
+ 103:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** _delay_loop_2(uint16_t __count)
+ 104:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** {
+ 105:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h **** 	__asm__ volatile (
+ 144               		.loc 2 105 0
+ 145 007e 29E1      		ldi r18,lo8(25)
+ 146 0080 30E0      		ldi r19,0
+ 147               	.L3:
+ 148               	.LBE15:
+ 149               	.LBE14:
+ 150               	.LBE13:
+ 151               	.LBE12:
+  45:main.c        **** 		zwischenspeicher = zwischenspeicher ^ 0b00000001;	
+ 152               		.loc 1 45 0 discriminator 1
+ 153 0082 88B3      		in r24,0x18
+ 154               	.LVL24:
+ 155               		.loc 1 46 0 discriminator 1
+ 156 0084 8427      		eor r24,r20
+ 157               	.LVL25:
+  47:main.c        **** 		PORTB = zwischenspeicher;				
+ 158               		.loc 1 47 0 discriminator 1
+ 159 0086 88BB      		out 0x18,r24
+ 160               	.LVL26:
+ 161 0088 88E8      		ldi r24,lo8(-120)
+ 162 008a 93E1      		ldi r25,lo8(19)
+ 163               	.LVL27:
+ 164               	.L4:
+ 165               	.LBB19:
+ 166               	.LBB18:
+ 167               	.LBB17:
+ 168               	.LBB16:
+ 169               		.loc 2 105 0
+ 170 008c F901      		movw r30,r18
+ 171               	/* #APP */
+ 172               	 ;  105 "e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h" 1
+ 173 008e 3197      		1: sbiw r30,1
+ 174 0090 01F4      		brne 1b
+ 175               	 ;  0 "" 2
+ 176               	.LVL28:
+ 177               	/* #NOAPP */
+ 178 0092 0197      		sbiw r24,1
+ 179               	.LVL29:
+ 180               	.LBE16:
+ 181               	.LBE17:
+ 182               		.file 3 "e:\\progs\\arduino-1.7.4\\hardware\\tools\\avr\\avr\\include\\util\\delay.h"
+   1:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /* Copyright (c) 2002, Marek Michalkiewicz
+   2:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Copyright (c) 2004,2005,2007 Joerg Wunsch
+   3:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Copyright (c) 2007  Florin-Viorel Petrov
+   4:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    All rights reserved.
+   5:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+   6:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Redistribution and use in source and binary forms, with or without
+   7:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    modification, are permitted provided that the following conditions are met:
+   8:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+   9:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    * Redistributions of source code must retain the above copyright
+  10:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      notice, this list of conditions and the following disclaimer.
+  11:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  12:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    * Redistributions in binary form must reproduce the above copyright
+  13:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      notice, this list of conditions and the following disclaimer in
+  14:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      the documentation and/or other materials provided with the
+  15:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      distribution.
+  16:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  17:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    * Neither the name of the copyright holders nor the names of
+  18:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      contributors may be used to endorse or promote products derived
+  19:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      from this software without specific prior written permission.
+  20:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  21:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  22:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  23:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  24:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  25:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  26:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  27:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  28:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  29:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  30:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+  31:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   POSSIBILITY OF SUCH DAMAGE. */
+  32:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  33:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /* $Id$ */
+  34:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  35:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef _UTIL_DELAY_H_
+  36:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #define _UTIL_DELAY_H_ 1
+  37:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  38:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef __HAS_DELAY_CYCLES
+  39:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #define __HAS_DELAY_CYCLES 1
+  40:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  41:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  42:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #include <inttypes.h>
+  43:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #include <util/delay_basic.h>
+  44:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #include <math.h>
+  45:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  46:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /** \file */
+  47:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /** \defgroup util_delay <util/delay.h>: Convenience functions for busy-wait delay loops
+  48:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \code
+  49:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     #define F_CPU 1000000UL  // 1 MHz
+  50:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     //#define F_CPU 14.7456E6
+  51:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     #include <util/delay.h>
+  52:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \endcode
+  53:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  54:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \note As an alternative method, it is possible to pass the
+  55:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     F_CPU macro down to the compiler from the Makefile.
+  56:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     Obviously, in that case, no \c \#define statement should be
+  57:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     used.
+  58:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  59:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     The functions in this header file are wrappers around the basic
+  60:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     busy-wait functions from <util/delay_basic.h>.  They are meant as
+  61:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     convenience functions where actual time values can be specified
+  62:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     rather than a number of cycles to wait for.  The idea behind is
+  63:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     that compile-time constant expressions will be eliminated by
+  64:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     compiler optimization so floating-point expressions can be used
+  65:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     to calculate the number of delay cycles needed based on the CPU
+  66:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     frequency passed by the macro F_CPU.
+  67:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  68:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \note In order for these functions to work as intended, compiler
+  69:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     optimizations <em>must</em> be enabled, and the delay time
+  70:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     <em>must</em> be an expression that is a known constant at
+  71:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     compile-time.  If these requirements are not met, the resulting
+  72:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     delay will be much longer (and basically unpredictable), and
+  73:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     applications that otherwise do not use floating-point calculations
+  74:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     will experience severe code bloat by the floating-point library
+  75:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     routines linked into the application.
+  76:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  77:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     The functions available allow the specification of microsecond, and
+  78:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     millisecond delays directly, using the application-supplied macro
+  79:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     F_CPU as the CPU clock frequency (in Hertz).
+  80:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  81:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** */
+  82:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  83:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #if !defined(__DOXYGEN__)
+  84:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** static inline void _delay_us(double __us) __attribute__((always_inline));
+  85:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** static inline void _delay_ms(double __ms) __attribute__((always_inline));
+  86:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  87:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  88:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef F_CPU
+  89:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /* prevent compiler error by supplying a default */
+  90:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** # warning "F_CPU not defined for <util/delay.h>"
+  91:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** # define F_CPU 1000000UL
+  92:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  93:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  94:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef __OPTIMIZE__
+  95:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** # warning "Compiler optimizations disabled; functions from <util/delay.h> won't work as designed"
+  96:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  97:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  98:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #if __HAS_DELAY_CYCLES && defined(__OPTIMIZE__) && \
+  99:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   !defined(__DELAY_BACKWARD_COMPATIBLE__) &&	   \
+ 100:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   __STDC_HOSTED__
+ 101:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #  include <math.h>
+ 102:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+ 103:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 104:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /**
+ 105:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    \ingroup util_delay
+ 106:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 107:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Perform a delay of \c __ms milliseconds, using _delay_loop_2().
+ 108:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 109:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    The macro F_CPU is supposed to be defined to a
+ 110:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    constant defining the CPU clock frequency (in Hertz).
+ 111:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 112:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    The maximal possible delay is 262.14 ms / F_CPU in MHz.
+ 113:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 114:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    When the user request delay which exceed the maximum possible one,
+ 115:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    _delay_ms() provides a decreased resolution functionality. In this
+ 116:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    mode _delay_ms() will work with a resolution of 1/10 ms, providing
+ 117:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    delays up to 6.5535 seconds (independent from CPU frequency).  The
+ 118:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    user will not be informed about decreased resolution.
+ 119:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 120:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    If the avr-gcc toolchain has __builtin_avr_delay_cycles(unsigned long)
+ 121:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    support, maximal possible delay is 4294967.295 ms/ F_CPU in MHz. For
+ 122:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    values greater than the maximal possible delay, overflows results in
+ 123:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    no delay i.e., 0ms.
+ 124:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 125:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Conversion of __us into clock cycles may not always result in integer.
+ 126:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    By default, the clock cycles rounded up to next integer. This ensures that
+ 127:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    the user gets atleast __us microseconds of delay.
+ 128:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 129:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Alternatively, user can define __DELAY_ROUND_DOWN__ and __DELAY_ROUND_CLOSEST__
+ 130:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    to round down and round to closest integer.
+ 131:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 132:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Note: The new implementation of _delay_ms(double __ms) with 
+ 133:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     __builtin_avr_delay_cycles(unsigned long) support is not backward compatible. 
+ 134:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    User can define __DELAY_BACKWARD_COMPATIBLE__ to get a backward compatible delay.
+ 135:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Also, the backward compatible
+ 136:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    algorithm will be chosen if the code is compiled in a <em>freestanding
+ 137:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    environment</em> (GCC option \c -ffreestanding), as the math functions
+ 138:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    required for rounding are not available to the compiler then.
+ 139:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 140:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****  */
+ 141:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** void
+ 142:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** _delay_ms(double __ms)
+ 143:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** {
+ 144:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	double __tmp ; 
+ 145:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #if __HAS_DELAY_CYCLES && defined(__OPTIMIZE__) && \
+ 146:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   !defined(__DELAY_BACKWARD_COMPATIBLE__) &&	   \
+ 147:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   __STDC_HOSTED__
+ 148:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	uint32_t __ticks_dc;
+ 149:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	extern void __builtin_avr_delay_cycles(unsigned long);
+ 150:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	__tmp = ((F_CPU) / 1e3) * __ms;
+ 151:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 152:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#if defined(__DELAY_ROUND_DOWN__)
+ 153:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		__ticks_dc = (uint32_t)fabs(__tmp);
+ 154:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 155:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#elif defined(__DELAY_ROUND_CLOSEST__)
+ 156:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		__ticks_dc = (uint32_t)(fabs(__tmp)+0.5);
+ 157:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 158:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#else
+ 159:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		//round up by default
+ 160:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
+ 161:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#endif
+ 162:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 163:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	__builtin_avr_delay_cycles(__ticks_dc);
+ 164:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 165:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #else
+ 166:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	uint16_t __ticks;
+ 167:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	__tmp = ((F_CPU) / 4e3) * __ms;
+ 168:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	if (__tmp < 1.0)
+ 169:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		__ticks = 1;
+ 170:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	else if (__tmp > 65535)
+ 171:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	{
+ 172:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		//	__ticks = requested delay in 1/10 ms
+ 173:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		__ticks = (uint16_t) (__ms * 10.0);
+ 174:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		while(__ticks)
+ 183               		.loc 3 174 0
+ 184 0094 01F4      		brne .L4
+ 185 0096 00C0      		rjmp .L3
+ 186               	.LBE18:
+ 187               	.LBE19:
+ 188               		.cfi_endproc
+ 189               	.LFE6:
+ 191               		.text
+ 192               	.Letext0:
+ 193               		.file 4 "e:\\progs\\arduino-1.7.4\\hardware\\tools\\avr\\avr\\include\\stdint.h"
+ 194               		.file 5 "../00_Lib/nokia_5110.h"
+DEFINED SYMBOLS
+                            *ABS*:00000000 main.c
+C:\Users\q242695\AppData\Local\Temp\ccq6mhBU.s:2      *ABS*:0000003e __SP_H__
+C:\Users\q242695\AppData\Local\Temp\ccq6mhBU.s:3      *ABS*:0000003d __SP_L__
+C:\Users\q242695\AppData\Local\Temp\ccq6mhBU.s:4      *ABS*:0000003f __SREG__
+C:\Users\q242695\AppData\Local\Temp\ccq6mhBU.s:5      *ABS*:00000000 __tmp_reg__
+C:\Users\q242695\AppData\Local\Temp\ccq6mhBU.s:6      *ABS*:00000001 __zero_reg__
+C:\Users\q242695\AppData\Local\Temp\ccq6mhBU.s:16     .text.startup:00000000 main
+
+UNDEFINED SYMBOLS
+LCD_init
+LCD_clear
+LCD_write_char
+LCD_write_byte
+LCD_write_english_string
+__do_copy_data
diff --git a/trunk/AVRProjects/ATTiny84/main.map b/trunk/AVRProjects/ATTiny84/main.map
new file mode 100644
index 00000000..9a1e5f7a
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny84/main.map
@@ -0,0 +1,666 @@
+Archive member included to satisfy reference by file (symbol)
+
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(cmpsf2.o)
+                              ../00_Lib/nokia_5110.o (__ltsf2)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(fixunssfsi.o)
+                              ../00_Lib/nokia_5110.o (__fixunssfsi)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(floatsisf.o)
+                              ../00_Lib/nokia_5110.o (__floatunsisf)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(fp_cmp.o)
+                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(cmpsf2.o) (__fp_cmp)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(fp_split3.o)
+                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(fixunssfsi.o) (__fp_splitA)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(fp_zero.o)
+                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(fixunssfsi.o) (__fp_zero)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(gesf2.o)
+                              ../00_Lib/nokia_5110.o (__gtsf2)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(mulsf3.o)
+                              ../00_Lib/nokia_5110.o (__mulsf3)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(mulsf3x.o)
+                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(mulsf3.o) (__mulsf3x)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(fp_inf.o)
+                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(mulsf3x.o) (__fp_inf)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(fp_nan.o)
+                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(mulsf3x.o) (__fp_nan)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(fp_pscA.o)
+                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(mulsf3x.o) (__fp_pscA)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(fp_pscB.o)
+                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(mulsf3x.o) (__fp_pscB)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(fp_round.o)
+                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a(mulsf3.o) (__fp_round)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr25\libgcc.a(_mulhi3.o)
+                              ../00_Lib/nokia_5110.o (__mulhi3)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr25\libgcc.a(_exit.o)
+                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn84.o (exit)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr25\libgcc.a(_copy_data.o)
+                              main.o (__do_copy_data)
+
+Memory Configuration
+
+Name             Origin             Length             Attributes
+text             0x00000000         0x00002000         xr
+data             0x00800060         0x0000ffa0         rw !x
+eeprom           0x00810000         0x00010000         rw !x
+fuse             0x00820000         0x00000400         rw !x
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+Symbol                                            File
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+                                                  main.o
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+                                                  main.o
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+                                                  ../00_Lib/nokia_5110.o
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+__vector_5                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn84.o
+__vector_6                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn84.o
+__vector_7                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn84.o
+__vector_8                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn84.o
+__vector_9                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn84.o
+__vector_default                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn84.o
+__vectors                                         e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn84.o
+_exit                                             e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr25\libgcc.a(_exit.o)
+delay_1ms                                         ../00_Lib/nokia_5110.o
+delay_1us                                         ../00_Lib/nokia_5110.o
+delay_nms                                         ../00_Lib/nokia_5110.o
+exit                                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr25\libgcc.a(_exit.o)
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn84.o
+main                                              main.o
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn84.o
diff --git a/trunk/AVRProjects/ATTiny84/main.sym b/trunk/AVRProjects/ATTiny84/main.sym
new file mode 100644
index 00000000..aeca4d5b
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny84/main.sym
@@ -0,0 +1,88 @@
+00000000 W __heap_end
+00000000 a __tmp_reg__
+00000000 a __tmp_reg__
+00000000 W __vector_default
+00000000 T __vectors
+00000001 a __zero_reg__
+00000001 a __zero_reg__
+00000022 T __ctors_end
+00000022 T __ctors_start
+00000022 T __dtors_end
+00000022 T __dtors_start
+00000022 W __init
+00000022 T __trampolines_end
+00000022 T __trampolines_start
+0000002e T __do_copy_data
+0000003d a __SP_L__
+0000003d a __SP_L__
+0000003e a __SP_H__
+0000003e a __SP_H__
+0000003f a __SREG__
+0000003f a __SREG__
+00000048 T __bad_interrupt
+00000048 W __vector_1
+00000048 W __vector_10
+00000048 W __vector_11
+00000048 W __vector_12
+00000048 W __vector_13
+00000048 W __vector_14
+00000048 W __vector_15
+00000048 W __vector_16
+00000048 W __vector_2
+00000048 W __vector_3
+00000048 W __vector_4
+00000048 W __vector_5
+00000048 W __vector_6
+00000048 W __vector_7
+00000048 W __vector_8
+00000048 W __vector_9
+0000004a T delay_1us
+00000052 T delay_1ms
+0000005c T delay_nms
+000000f0 T LCD_write_byte
+00000116 T LCD_clear
+0000013a T LCD_init
+00000178 T LCD_set_XY
+0000018e T LCD_write_char
+000001c8 T LCD_write_english_string
+00000200 T LCD_draw_bmp_pixel
+0000025f W __stack
+00000298 T LCD_pixel
+0000029a T LCD_line
+0000029c T main
+00000334 T __cmpsf2
+00000334 T __eqsf2
+00000334 T __lesf2
+00000334 T __ltsf2
+00000334 T __nesf2
+0000033c T __fixunssfsi
+00000394 T __floatunsisf
+00000398 T __floatsisf
+0000040e T __fp_cmp
+00000456 T __fp_split3
+00000466 T __fp_splitA
+0000049a T __fp_zero
+0000049c T __fp_szero
+000004a8 T __gesf2
+000004a8 T __gtsf2
+000004b0 T __mulsf3
+000004c6 T __mulsf3x
+000004ca T __mulsf3_pse
+00000586 T __fp_inf
+00000592 T __fp_nan
+00000598 T __fp_pscA
+000005a6 T __fp_pscB
+000005b4 T __fp_round
+000005d6 T __mulhi3
+000005f8 T _exit
+000005f8 W exit
+000005fa t __stop_program
+000005fc A __data_load_start
+000005fc T _etext
+0000082a A __data_load_end
+00800060 D __data_start
+00800060 d font6x8
+0080028e D __data_end
+0080028e D _edata
+0080028e D _end
+00810000 D __eeprom_end
diff --git a/trunk/AVRProjects/ATTiny84/makefile b/trunk/AVRProjects/ATTiny84/makefile
new file mode 100644
index 00000000..a506afe6
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny84/makefile
@@ -0,0 +1,444 @@
+# Hey Emacs, this is a -*- makefile -*-
+#
+# WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al.
+# Released to the Public Domain
+# Please read the make user manual!
+#
+# Additional material for this makefile was submitted by:
+#  Tim Henigan
+#  Peter Fleury
+#  Reiner Patommel
+#  Sander Pool
+#  Frederik Rouleau
+#  Markus Pfaff
+#
+# On command line:
+#
+# make all = Make software.
+#
+# make clean = Clean out built project files.
+#
+# make coff = Convert ELF to AVR COFF (for use with AVR Studio 3.x or VMLAB).
+#
+# make extcoff = Convert ELF to AVR Extended COFF (for use with AVR Studio
+#                4.07 or greater).
+#
+# make program = Download the hex file to the device, using avrdude.  Please
+#                customize the avrdude settings below first!
+#
+# make filename.s = Just compile filename.c into the assembler code only
+#
+# To rebuild project do "make clean" then "make all".
+#
+
+# mth 2004/09 
+# Differences from WinAVR 20040720 sample:
+# - DEPFLAGS according to Eric Weddingtion's fix (avrfreaks/gcc-forum)
+# - F_OSC Define in CFLAGS and AFLAGS
+
+
+# MCU name
+MCU = attiny84
+
+# Main Oscillator Frequency
+# This is only used to define F_OSC in all assembler and c-sources.
+F_OSC = 4190000
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+# Target file name (without extension).
+TARGET = main
+
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = $(TARGET).c
+
+#ifeq ($(CONFIG_DISPLAY),y)
+  SRC += ../00_Lib/nokia_5110.c
+#endif
+
+# List Assembler source files here.
+# Make them always end in a capital .S.  Files ending in a lowercase .s
+# will not be considered source files but generated files (assembler
+# output from the compiler), and will be deleted upon "make clean"!
+# Even though the DOS/Win* filesystem matches both .s and .S the same,
+# it will preserve the spelling of the filenames, and gcc itself does
+# care about how the name is spelled on its command-line.
+ASRC = 
+
+
+
+# Optimization level, can be [0, 1, 2, 3, s]. 
+# 0 = turn off optimization. s = optimize for size.
+# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+OPT = s
+
+# Debugging format.
+# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
+# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
+#DEBUG = stabs
+DEBUG = dwarf-2
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+EXTRAINCDIRS = 
+
+
+# Compiler flag to set the C Standard level.
+# c89   - "ANSI" C
+# gnu89 - c89 plus GCC extensions
+# c99   - ISO C99 standard (not yet fully implemented)
+# gnu99 - c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+# Place -D or -U options here
+CDEFS =
+
+# Place -I options here
+CINCS =
+
+
+# Compiler flags.
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT)
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+CFLAGS += -Wall -Wstrict-prototypes
+CFLAGS += -Wa,-adhlns=$(<:.c=.lst)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+CFLAGS += -DF_OSC=$(F_OSC)
+
+
+
+# Assembler flags.
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs 
+ASFLAGS += -DF_OSC=$(F_OSC)
+
+
+#Additional libraries.
+
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+PRINTF_LIB = 
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+SCANF_LIB = 
+
+MATH_LIB = -lm
+
+# External memory options
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+# Linker flags.
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+
+
+
+
+# Programming support using avrdude. Settings and variables.
+
+# Programming hardware: alf avr910 avrisp bascom bsd 
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+#AVRDUDE_PROGRAMMER = stk500
+AVRDUDE_PROGRAMMER = usbasp
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = usb    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude> 
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+# ---------------------------------------------------------------------------
+
+# Define directories, if needed.
+DIRAVR = c:/winavr
+DIRAVRBIN = $(DIRAVR)/bin
+DIRAVRUTILS = $(DIRAVR)/utils/bin
+DIRINC = .
+DIRLIB = $(DIRAVR)/avr/lib
+
+
+# Define programs and commands.
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+
+
+
+
+# Define Messages
+# English
+MSG_ERRORS_NONE = Errors: none
+MSG_BEGIN = -------- begin --------
+MSG_END = --------  end  --------
+MSG_SIZE_BEFORE = Size before: 
+MSG_SIZE_AFTER = Size after:
+MSG_COFF = Converting to AVR COFF:
+MSG_EXTENDED_COFF = Converting to AVR Extended COFF:
+MSG_FLASH = Creating load file for Flash:
+MSG_EEPROM = Creating load file for EEPROM:
+MSG_EXTENDED_LISTING = Creating Extended Listing:
+MSG_SYMBOL_TABLE = Creating Symbol Table:
+MSG_LINKING = Linking:
+MSG_COMPILING = Compiling:
+MSG_ASSEMBLING = Assembling:
+MSG_CLEANING = Cleaning project:
+
+
+
+
+# Define all object files.
+OBJ = $(SRC:.c=.o) $(ASRC:.S=.o) 
+
+# Define all listing files.
+LST = $(ASRC:.S=.lst) $(SRC:.c=.lst)
+
+
+# Compiler flags to generate dependency files.
+### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
+GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS)
+
+
+
+
+
+# Default target.
+#all: begin gccversion sizebefore build sizeafter finished end
+all: begin gccversion build size finished end
+
+build: elf hex eep lss sym
+
+elf: $(TARGET).elf
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss 
+sym: $(TARGET).sym
+
+
+
+# Eye candy.
+# AVR Studio 3.x does not check make's exit code but relies on
+# the following magic strings to be generated by the compile job.
+begin:
+	@echo
+	@echo $(MSG_BEGIN)
+
+finished:
+	@echo $(MSG_ERRORS_NONE)
+
+end:
+	@echo $(MSG_END)
+	@echo
+
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+sizebefore:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
+
+sizeafter:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
+
+size:
+	$(SIZE) -C --mcu=$(MCU) $(TARGET).elf
+
+# Display compiler version information.
+gccversion : 
+	@$(CC) --version
+
+
+
+# Program the device.  
+program: $(TARGET).hex $(TARGET).eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM)
+
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000 
+
+
+coff: $(TARGET).elf
+	@echo
+	@echo $(MSG_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	@echo
+	@echo $(MSG_EXTENDED_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+
+# Create final output files (.hex, .eep) from ELF output file.
+%.hex: %.elf
+	@echo
+	@echo $(MSG_FLASH) $@
+	$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+%.eep: %.elf
+	@echo
+	@echo $(MSG_EEPROM) $@
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+%.lss: %.elf
+	@echo
+	@echo $(MSG_EXTENDED_LISTING) $@
+	$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+%.sym: %.elf
+	@echo
+	@echo $(MSG_SYMBOL_TABLE) $@
+	$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+%.elf: $(OBJ)
+	@echo
+	@echo $(MSG_LINKING) $@
+	$(CC) $(ALL_CFLAGS) $(OBJ) --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+%.o : %.c
+	@echo
+	@echo $(MSG_COMPILING) $<
+	$(CC) -c $(ALL_CFLAGS) $< -o $@ 
+
+
+# Compile: create assembler files from C source files.
+%.s : %.c
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+%.o : %.S
+	@echo
+	@echo $(MSG_ASSEMBLING) $<
+	$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+
+
+# Target: clean project.
+clean: begin clean_list finished end
+
+clean_list :
+	@echo
+	@echo $(MSG_CLEANING)
+	$(REMOVE) $(TARGET).hex
+	$(REMOVE) $(TARGET).eep
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).cof
+	$(REMOVE) $(TARGET).elf
+	$(REMOVE) $(TARGET).map
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).a90
+	$(REMOVE) $(TARGET).sym
+	$(REMOVE) $(TARGET).lnk
+	$(REMOVE) $(TARGET).lss
+	$(REMOVE) $(OBJ)
+	$(REMOVE) $(LST)
+	$(REMOVE) $(SRC:.c=.s)
+	$(REMOVE) $(SRC:.c=.d)
+	$(REMOVE) .dep/*
+
+
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program
+ 
+
+ 
diff --git a/trunk/AVRProjects/ATTiny85-primo_asm/tiny85_primo.avr b/trunk/AVRProjects/ATTiny85-primo_asm/tiny85_primo.avr
new file mode 100644
index 00000000..66d1f76d
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny85-primo_asm/tiny85_primo.avr
@@ -0,0 +1,40 @@
+;* ******************************************************** *
+;   ATtiny 13/45/85 Pin map
+;                           +-\/-+
+;         /Reset ADC0 PB5  1|o   |8  Vcc
+;                ADC3 PB3  2|    |7  PB2 ADC1 SCK
+;                ADC2 PB4  3|    |6  PB1 OC0B MISO AIN1
+;                     GND  4|    |5  PB0 OC0A MOSI AIN0
+;                           +----+
+;* ******************************************************** */
+
+; Define processor type on top of the source code
+;
+.DEVICE ATtiny85
+
+; Int-Vector area
+.CSEG
+.ORG $0000
+	rjmp Setup	;Reset
+	reti		;INT0		- External Int0 Vector
+	reti		;PCINT0		- Pin Change Interrupt handler
+	reti		;TIM1_COMPA	- Timer1 Compare match A Handler
+	reti		;TIM1_OVF	- Timer1 Overflow handler
+	reti		;TIM0_OVF	- Timer0 Overflow handler
+	reti		;EE_RDY		- EEPROM Ready Handler
+	reti		;ANA_COMP	- Analog Comparator Handler
+	reti		;ADC		- ADC Conversion Handler
+	reti		;TIM1_COMPB	- Timer1 Compare match B Handler
+	reti		;TIM0_COMPA	- Timer0 Compare match A Handler
+	reti		;TIM0_COMPB	- Timer0 Compare match B Handler
+	reti		;WDT		- Watchdog Overflow Handler
+	reti		;USI_START	- USI Start
+	reti		;USI_OVF	- USI Overflow
+
+.ORG $000F
+Setup:
+	cli			; Disable Interrupts
+	ldi r16, low(RAMEND)
+	out SPL,r16 ;Set Stack Pointer to top of RAM
+Main:
+	rjmp Main	; infinite loop
diff --git a/trunk/AVRProjects/ATTiny85-primo_asm/tiny85_primo.hex b/trunk/AVRProjects/ATTiny85-primo_asm/tiny85_primo.hex
new file mode 100644
index 00000000..b7212ee5
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny85-primo_asm/tiny85_primo.hex
@@ -0,0 +1,5 @@
+:020000020000FC
+:100000000EC0189518951895189518951895189567
+:100010001895189518951895189518951895F89499
+:060020000FE50DBFFFCF4C
+:00000001FF
diff --git a/trunk/AVRProjects/ATTiny85-primo_asm/tiny85_primo.lst b/trunk/AVRProjects/ATTiny85-primo_asm/tiny85_primo.lst
new file mode 100644
index 00000000..56b2f763
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny85-primo_asm/tiny85_primo.lst
@@ -0,0 +1,55 @@
+gavrasm Gerd's AVR assembler version 3.5 (C)2015 by DG4FAC
+----------------------------------------------------------
+Source file: tiny85_primo.avr
+Hex file:    tiny85_primo.hex
+Eeprom file: tiny85_primo.eep
+Compiled:    26.07.2016, 11:33:50
+Pass:        2
+     1: ;* ******************************************************** *
+     2: ;   ATtiny 13/45/85 Pin map
+     3: ;                           +-\/-+
+     4: ;         /Reset ADC0 PB5  1|o   |8  Vcc
+     5: ;                ADC3 PB3  2|    |7  PB2 ADC1 SCK
+     6: ;                ADC2 PB4  3|    |6  PB1 OC0B MISO AIN1
+     7: ;                     GND  4|    |5  PB0 OC0A MOSI AIN0
+     8: ;                           +----+
+     9: ;* ******************************************************** */
+    10: 
+    11: ; Define processor type on top of the source code
+    12: ;
+    13: .DEVICE ATtiny85
+    14: 
+    15: ; Int-Vector area
+    16: .CSEG
+    17: .ORG $0000
+    18: 000000   C00E  rjmp Setup	;Reset
+    19: 000001   9518  reti		;INT0		- External Int0 Vector
+    20: 000002   9518  reti		;PCINT0		- Pin Change Interrupt handler
+    21: 000003   9518  reti		;TIM1_COMPA	- Timer1 Compare match A Handler
+    22: 000004   9518  reti		;TIM1_OVF	- Timer1 Overflow handler
+    23: 000005   9518  reti		;TIM0_OVF	- Timer0 Overflow handler
+    24: 000006   9518  reti		;EE_RDY		- EEPROM Ready Handler
+    25: 000007   9518  reti		;ANA_COMP	- Analog Comparator Handler
+    26: 000008   9518  reti		;ADC		- ADC Conversion Handler
+    27: 000009   9518  reti		;TIM1_COMPB	- Timer1 Compare match B Handler
+    28: 00000A   9518  reti		;TIM0_COMPA	- Timer0 Compare match A Handler
+    29: 00000B   9518  reti		;TIM0_COMPB	- Timer0 Compare match B Handler
+    30: 00000C   9518  reti		;WDT		- Watchdog Overflow Handler
+    31: 00000D   9518  reti		;USI_START	- USI Start
+    32: 00000E   9518  reti		;USI_OVF	- USI Overflow
+    33: 
+    34: .ORG $000F
+    35: Setup:
+    36: 00000F   94F8  cli			; Disable Interrupts
+    37: 000010   E50F  ldi r16, low(RAMEND)
+    38: 000011   BF0D  out SPL,r16 ;Set Stack Pointer to top of RAM
+    39: Main:
+    40: 000012   CFFF  rjmp Main	; infinite loop
+
+Program             :       19 words.
+Constants           :        0 words.
+Total program memory:       19 words.
+Eeprom space        :        0 bytes.
+Data segment        :        0 bytes.
+Compilation completed, no errors.
+Compilation endet 26.07.2016, 11:33:50
diff --git a/trunk/AVRProjects/ATTiny88/.dep/main.o.d b/trunk/AVRProjects/ATTiny88/.dep/main.o.d
new file mode 100644
index 00000000..6afa47e0
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny88/.dep/main.o.d
@@ -0,0 +1,43 @@
+main.o: main.c \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\io.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\sfr_defs.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\inttypes.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\lib\gcc\avr\4.8.1\include\stdint.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\stdint.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iotn88.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\portpins.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\common.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\version.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\fuse.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\lock.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h \
+ e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\math.h
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\io.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\sfr_defs.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\inttypes.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\lib\gcc\avr\4.8.1\include\stdint.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\stdint.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\iotn88.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\portpins.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\common.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\version.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\fuse.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\avr\lock.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay_basic.h:
+
+e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\math.h:
diff --git a/trunk/AVRProjects/ATTiny88/main.c b/trunk/AVRProjects/ATTiny88/main.c
new file mode 100644
index 00000000..9d1b2c72
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny88/main.c
@@ -0,0 +1,44 @@
+/* ******************************************************** *
+ *
+ * Simple Template for ATMEL Microcontroller				*
+ * -------------------------------------------------------- *
+ * Created on: 	25.07.2016
+ * Author:		Paolo Iocco
+ * ******************************************************** */
+/* ******************************************************** *
+   ATtiny 88 / Mega 168 / Mega 328 Pin map
+                           +-\/-+
+              /Reset PC6  1|o   |28  PC5 ADC5 
+                 RXD PD0  2|    |27  PC4 ADC4
+                 TXD PD1  3|    |26  PC3 ADC3
+                     PD2  4|    |25  PC2 ADC2
+				OC2B PD3  5|    |24  PC1 ADC1
+					 PD4  6|    |23  PC0 ADC0
+					 VCC  7|    |22  GND
+					 GND  8|    |21  AREF
+				OSC1 PB6  9|    |20  VCC
+				OSC2 PB7 10|    |19  PB5 SCK
+				OC0B PD5 11|    |18  PB4 MISO
+		   AIN0 OC0A PD6 12|    |17  PB3 OC2A MOSI
+				AIN1 PD7 13|    |16  PB2 OC1B
+					 PB0 14|    |15  PB1 OC1A
+					       +----+
+* ******************************************************** */
+
+#include <avr/io.h>				
+#include <util/delay.h>			
+
+int main (void)					
+{
+	unsigned char zwischenspeicher;		
+	DDRB = 0b00000100;		
+	while(1)					
+	{
+		zwischenspeicher = PORTB;				
+		zwischenspeicher = zwischenspeicher ^ 0b00000100;	
+		PORTB = zwischenspeicher;				
+		_delay_ms(500);							
+	}							
+	return 0;					
+}
+
diff --git a/trunk/AVRProjects/ATTiny88/main.eep b/trunk/AVRProjects/ATTiny88/main.eep
new file mode 100644
index 00000000..1996e8fd
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny88/main.eep
@@ -0,0 +1 @@
+:00000001FF
diff --git a/trunk/AVRProjects/ATTiny88/main.elf b/trunk/AVRProjects/ATTiny88/main.elf
new file mode 100644
index 00000000..a8dee2d3
Binary files /dev/null and b/trunk/AVRProjects/ATTiny88/main.elf differ
diff --git a/trunk/AVRProjects/ATTiny88/main.hex b/trunk/AVRProjects/ATTiny88/main.hex
new file mode 100644
index 00000000..f7e115a4
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny88/main.hex
@@ -0,0 +1,7 @@
+:1000000013C01AC019C018C017C016C015C014C03C
+:1000100013C012C011C010C00FC00EC00DC00CC064
+:100020000BC00AC009C008C011241FBECFEFD2E028
+:10003000DEBFCDBF02D011C0E3CF84E084B994E02D
+:1000400085B1892785B92FE936E881E02150304014
+:0E0050008040E1F700C00000F3CFF894FFCF2E
+:00000001FF
diff --git a/trunk/AVRProjects/ATTiny88/main.lss b/trunk/AVRProjects/ATTiny88/main.lss
new file mode 100644
index 00000000..cc104ccb
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny88/main.lss
@@ -0,0 +1,112 @@
+
+main.elf:     file format elf32-avr
+
+Sections:
+Idx Name          Size      VMA       LMA       File off  Algn
+  0 .data         00000000  00800100  0000005e  000000d2  2**0
+                  CONTENTS, ALLOC, LOAD, DATA
+  1 .text         0000005e  00000000  00000000  00000074  2**1
+                  CONTENTS, ALLOC, LOAD, READONLY, CODE
+  2 .comment      00000011  00000000  00000000  000000d2  2**0
+                  CONTENTS, READONLY
+  3 .debug_aranges 00000020  00000000  00000000  000000e3  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  4 .debug_info   00000119  00000000  00000000  00000103  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  5 .debug_abbrev 000000d1  00000000  00000000  0000021c  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  6 .debug_line   000000d7  00000000  00000000  000002ed  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  7 .debug_frame  00000024  00000000  00000000  000003c4  2**2
+                  CONTENTS, READONLY, DEBUGGING
+  8 .debug_str    00000132  00000000  00000000  000003e8  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  9 .debug_loc    0000001f  00000000  00000000  0000051a  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 10 .debug_ranges 00000010  00000000  00000000  00000539  2**0
+                  CONTENTS, READONLY, DEBUGGING
+
+Disassembly of section .text:
+
+00000000 <__vectors>:
+   0:	13 c0       	rjmp	.+38     	; 0x28 <__ctors_end>
+   2:	1a c0       	rjmp	.+52     	; 0x38 <__bad_interrupt>
+   4:	19 c0       	rjmp	.+50     	; 0x38 <__bad_interrupt>
+   6:	18 c0       	rjmp	.+48     	; 0x38 <__bad_interrupt>
+   8:	17 c0       	rjmp	.+46     	; 0x38 <__bad_interrupt>
+   a:	16 c0       	rjmp	.+44     	; 0x38 <__bad_interrupt>
+   c:	15 c0       	rjmp	.+42     	; 0x38 <__bad_interrupt>
+   e:	14 c0       	rjmp	.+40     	; 0x38 <__bad_interrupt>
+  10:	13 c0       	rjmp	.+38     	; 0x38 <__bad_interrupt>
+  12:	12 c0       	rjmp	.+36     	; 0x38 <__bad_interrupt>
+  14:	11 c0       	rjmp	.+34     	; 0x38 <__bad_interrupt>
+  16:	10 c0       	rjmp	.+32     	; 0x38 <__bad_interrupt>
+  18:	0f c0       	rjmp	.+30     	; 0x38 <__bad_interrupt>
+  1a:	0e c0       	rjmp	.+28     	; 0x38 <__bad_interrupt>
+  1c:	0d c0       	rjmp	.+26     	; 0x38 <__bad_interrupt>
+  1e:	0c c0       	rjmp	.+24     	; 0x38 <__bad_interrupt>
+  20:	0b c0       	rjmp	.+22     	; 0x38 <__bad_interrupt>
+  22:	0a c0       	rjmp	.+20     	; 0x38 <__bad_interrupt>
+  24:	09 c0       	rjmp	.+18     	; 0x38 <__bad_interrupt>
+  26:	08 c0       	rjmp	.+16     	; 0x38 <__bad_interrupt>
+
+00000028 <__ctors_end>:
+  28:	11 24       	eor	r1, r1
+  2a:	1f be       	out	0x3f, r1	; 63
+  2c:	cf ef       	ldi	r28, 0xFF	; 255
+  2e:	d2 e0       	ldi	r29, 0x02	; 2
+  30:	de bf       	out	0x3e, r29	; 62
+  32:	cd bf       	out	0x3d, r28	; 61
+  34:	02 d0       	rcall	.+4      	; 0x3a <main>
+  36:	11 c0       	rjmp	.+34     	; 0x5a <_exit>
+
+00000038 <__bad_interrupt>:
+  38:	e3 cf       	rjmp	.-58     	; 0x0 <__vectors>
+
+0000003a <main>:
+#include <util/delay.h>			
+
+int main (void)					
+{
+	unsigned char zwischenspeicher;		
+	DDRB = 0b00000100;		
+  3a:	84 e0       	ldi	r24, 0x04	; 4
+  3c:	84 b9       	out	0x04, r24	; 4
+	while(1)					
+	{
+		zwischenspeicher = PORTB;				
+		zwischenspeicher = zwischenspeicher ^ 0b00000100;	
+  3e:	94 e0       	ldi	r25, 0x04	; 4
+{
+	unsigned char zwischenspeicher;		
+	DDRB = 0b00000100;		
+	while(1)					
+	{
+		zwischenspeicher = PORTB;				
+  40:	85 b1       	in	r24, 0x05	; 5
+		zwischenspeicher = zwischenspeicher ^ 0b00000100;	
+  42:	89 27       	eor	r24, r25
+		PORTB = zwischenspeicher;				
+  44:	85 b9       	out	0x05, r24	; 5
+	#else
+		//round up by default
+		__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
+	#endif
+
+	__builtin_avr_delay_cycles(__ticks_dc);
+  46:	2f e9       	ldi	r18, 0x9F	; 159
+  48:	36 e8       	ldi	r19, 0x86	; 134
+  4a:	81 e0       	ldi	r24, 0x01	; 1
+  4c:	21 50       	subi	r18, 0x01	; 1
+  4e:	30 40       	sbci	r19, 0x00	; 0
+  50:	80 40       	sbci	r24, 0x00	; 0
+  52:	e1 f7       	brne	.-8      	; 0x4c <__SREG__+0xd>
+  54:	00 c0       	rjmp	.+0      	; 0x56 <__SREG__+0x17>
+  56:	00 00       	nop
+  58:	f3 cf       	rjmp	.-26     	; 0x40 <__SREG__+0x1>
+
+0000005a <_exit>:
+  5a:	f8 94       	cli
+
+0000005c <__stop_program>:
+  5c:	ff cf       	rjmp	.-2      	; 0x5c <__stop_program>
diff --git a/trunk/AVRProjects/ATTiny88/main.lst b/trunk/AVRProjects/ATTiny88/main.lst
new file mode 100644
index 00000000..dff2c4fb
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny88/main.lst
@@ -0,0 +1,243 @@
+   1               		.file	"main.c"
+   2               	__SP_H__ = 0x3e
+   3               	__SP_L__ = 0x3d
+   4               	__SREG__ = 0x3f
+   5               	__tmp_reg__ = 0
+   6               	__zero_reg__ = 1
+   7               		.text
+   8               	.Ltext0:
+   9               		.cfi_sections	.debug_frame
+  10               		.section	.text.startup,"ax",@progbits
+  11               	.global	main
+  13               	main:
+  14               	.LFB6:
+  15               		.file 1 "main.c"
+   1:main.c        **** #include <avr/io.h>				
+   2:main.c        **** #include <util/delay.h>			
+   3:main.c        **** 
+   4:main.c        **** int main (void)					
+   5:main.c        **** {
+  16               		.loc 1 5 0
+  17               		.cfi_startproc
+  18               	/* prologue: function */
+  19               	/* frame size = 0 */
+  20               	/* stack size = 0 */
+  21               	.L__stack_usage = 0
+   6:main.c        **** 	unsigned char zwischenspeicher;		
+   7:main.c        **** 	DDRB = 0b00000100;		
+  22               		.loc 1 7 0
+  23 0000 84E0      		ldi r24,lo8(4)
+  24 0002 84B9      		out 0x4,r24
+   8:main.c        **** 	while(1)					
+   9:main.c        **** 	{
+  10:main.c        **** 		zwischenspeicher = PORTB;				
+  11:main.c        **** 		zwischenspeicher = zwischenspeicher ^ 0b00000100;	
+  25               		.loc 1 11 0
+  26 0004 94E0      		ldi r25,lo8(4)
+  27               	.L2:
+  10:main.c        **** 		zwischenspeicher = zwischenspeicher ^ 0b00000100;	
+  28               		.loc 1 10 0 discriminator 1
+  29 0006 85B1      		in r24,0x5
+  30               	.LVL0:
+  31               		.loc 1 11 0 discriminator 1
+  32 0008 8927      		eor r24,r25
+  33               	.LVL1:
+  12:main.c        **** 		PORTB = zwischenspeicher;				
+  34               		.loc 1 12 0 discriminator 1
+  35 000a 85B9      		out 0x5,r24
+  36               	.LVL2:
+  37               	.LBB4:
+  38               	.LBB5:
+  39               		.file 2 "e:\\progs\\arduino-1.7.4\\hardware\\tools\\avr\\avr\\include\\util\\delay.h"
+   1:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /* Copyright (c) 2002, Marek Michalkiewicz
+   2:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Copyright (c) 2004,2005,2007 Joerg Wunsch
+   3:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Copyright (c) 2007  Florin-Viorel Petrov
+   4:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    All rights reserved.
+   5:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+   6:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Redistribution and use in source and binary forms, with or without
+   7:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    modification, are permitted provided that the following conditions are met:
+   8:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+   9:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    * Redistributions of source code must retain the above copyright
+  10:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      notice, this list of conditions and the following disclaimer.
+  11:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  12:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    * Redistributions in binary form must reproduce the above copyright
+  13:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      notice, this list of conditions and the following disclaimer in
+  14:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      the documentation and/or other materials provided with the
+  15:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      distribution.
+  16:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  17:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    * Neither the name of the copyright holders nor the names of
+  18:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      contributors may be used to endorse or promote products derived
+  19:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****      from this software without specific prior written permission.
+  20:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  21:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  22:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  23:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  24:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  25:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  26:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  27:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  28:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  29:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  30:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+  31:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   POSSIBILITY OF SUCH DAMAGE. */
+  32:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  33:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /* $Id$ */
+  34:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  35:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef _UTIL_DELAY_H_
+  36:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #define _UTIL_DELAY_H_ 1
+  37:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  38:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef __HAS_DELAY_CYCLES
+  39:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #define __HAS_DELAY_CYCLES 1
+  40:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  41:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  42:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #include <inttypes.h>
+  43:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #include <util/delay_basic.h>
+  44:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #include <math.h>
+  45:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  46:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /** \file */
+  47:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /** \defgroup util_delay <util/delay.h>: Convenience functions for busy-wait delay loops
+  48:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \code
+  49:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     #define F_CPU 1000000UL  // 1 MHz
+  50:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     //#define F_CPU 14.7456E6
+  51:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     #include <util/delay.h>
+  52:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \endcode
+  53:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  54:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \note As an alternative method, it is possible to pass the
+  55:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     F_CPU macro down to the compiler from the Makefile.
+  56:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     Obviously, in that case, no \c \#define statement should be
+  57:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     used.
+  58:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  59:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     The functions in this header file are wrappers around the basic
+  60:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     busy-wait functions from <util/delay_basic.h>.  They are meant as
+  61:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     convenience functions where actual time values can be specified
+  62:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     rather than a number of cycles to wait for.  The idea behind is
+  63:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     that compile-time constant expressions will be eliminated by
+  64:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     compiler optimization so floating-point expressions can be used
+  65:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     to calculate the number of delay cycles needed based on the CPU
+  66:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     frequency passed by the macro F_CPU.
+  67:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  68:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     \note In order for these functions to work as intended, compiler
+  69:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     optimizations <em>must</em> be enabled, and the delay time
+  70:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     <em>must</em> be an expression that is a known constant at
+  71:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     compile-time.  If these requirements are not met, the resulting
+  72:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     delay will be much longer (and basically unpredictable), and
+  73:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     applications that otherwise do not use floating-point calculations
+  74:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     will experience severe code bloat by the floating-point library
+  75:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     routines linked into the application.
+  76:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  77:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     The functions available allow the specification of microsecond, and
+  78:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     millisecond delays directly, using the application-supplied macro
+  79:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     F_CPU as the CPU clock frequency (in Hertz).
+  80:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  81:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** */
+  82:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  83:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #if !defined(__DOXYGEN__)
+  84:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** static inline void _delay_us(double __us) __attribute__((always_inline));
+  85:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** static inline void _delay_ms(double __ms) __attribute__((always_inline));
+  86:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  87:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  88:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef F_CPU
+  89:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /* prevent compiler error by supplying a default */
+  90:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** # warning "F_CPU not defined for <util/delay.h>"
+  91:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** # define F_CPU 1000000UL
+  92:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  93:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  94:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #ifndef __OPTIMIZE__
+  95:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** # warning "Compiler optimizations disabled; functions from <util/delay.h> won't work as designed"
+  96:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+  97:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+  98:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #if __HAS_DELAY_CYCLES && defined(__OPTIMIZE__) && \
+  99:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   !defined(__DELAY_BACKWARD_COMPATIBLE__) &&	   \
+ 100:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   __STDC_HOSTED__
+ 101:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #  include <math.h>
+ 102:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #endif
+ 103:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 104:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** /**
+ 105:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    \ingroup util_delay
+ 106:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 107:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Perform a delay of \c __ms milliseconds, using _delay_loop_2().
+ 108:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 109:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    The macro F_CPU is supposed to be defined to a
+ 110:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    constant defining the CPU clock frequency (in Hertz).
+ 111:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 112:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    The maximal possible delay is 262.14 ms / F_CPU in MHz.
+ 113:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 114:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    When the user request delay which exceed the maximum possible one,
+ 115:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    _delay_ms() provides a decreased resolution functionality. In this
+ 116:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    mode _delay_ms() will work with a resolution of 1/10 ms, providing
+ 117:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    delays up to 6.5535 seconds (independent from CPU frequency).  The
+ 118:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    user will not be informed about decreased resolution.
+ 119:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 120:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    If the avr-gcc toolchain has __builtin_avr_delay_cycles(unsigned long)
+ 121:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    support, maximal possible delay is 4294967.295 ms/ F_CPU in MHz. For
+ 122:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    values greater than the maximal possible delay, overflows results in
+ 123:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    no delay i.e., 0ms.
+ 124:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 125:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Conversion of __us into clock cycles may not always result in integer.
+ 126:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    By default, the clock cycles rounded up to next integer. This ensures that
+ 127:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    the user gets atleast __us microseconds of delay.
+ 128:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 129:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Alternatively, user can define __DELAY_ROUND_DOWN__ and __DELAY_ROUND_CLOSEST__
+ 130:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    to round down and round to closest integer.
+ 131:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 132:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Note: The new implementation of _delay_ms(double __ms) with 
+ 133:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****     __builtin_avr_delay_cycles(unsigned long) support is not backward compatible. 
+ 134:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    User can define __DELAY_BACKWARD_COMPATIBLE__ to get a backward compatible delay.
+ 135:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    Also, the backward compatible
+ 136:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    algorithm will be chosen if the code is compiled in a <em>freestanding
+ 137:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    environment</em> (GCC option \c -ffreestanding), as the math functions
+ 138:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****    required for rounding are not available to the compiler then.
+ 139:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 140:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****  */
+ 141:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** void
+ 142:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** _delay_ms(double __ms)
+ 143:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** {
+ 144:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	double __tmp ; 
+ 145:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** #if __HAS_DELAY_CYCLES && defined(__OPTIMIZE__) && \
+ 146:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   !defined(__DELAY_BACKWARD_COMPATIBLE__) &&	   \
+ 147:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h ****   __STDC_HOSTED__
+ 148:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	uint32_t __ticks_dc;
+ 149:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	extern void __builtin_avr_delay_cycles(unsigned long);
+ 150:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	__tmp = ((F_CPU) / 1e3) * __ms;
+ 151:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 152:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#if defined(__DELAY_ROUND_DOWN__)
+ 153:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		__ticks_dc = (uint32_t)fabs(__tmp);
+ 154:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 155:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#elif defined(__DELAY_ROUND_CLOSEST__)
+ 156:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		__ticks_dc = (uint32_t)(fabs(__tmp)+0.5);
+ 157:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 158:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#else
+ 159:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		//round up by default
+ 160:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 		__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
+ 161:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	#endif
+ 162:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 
+ 163:e:\progs\arduino-1.7.4\hardware\tools\avr\avr\include\util\delay.h **** 	__builtin_avr_delay_cycles(__ticks_dc);
+  40               		.loc 2 163 0 discriminator 1
+  41 000c 2FE9      		ldi r18,lo8(99999)
+  42 000e 36E8      		ldi r19,hi8(99999)
+  43 0010 81E0      		ldi r24,hlo8(99999)
+  44 0012 2150      		1: subi r18,1
+  45 0014 3040      		sbci r19,0
+  46 0016 8040      		sbci r24,0
+  47 0018 01F4      		brne 1b
+  48               	.LVL3:
+  49 001a 00C0      		rjmp .
+  50 001c 0000      		nop
+  51 001e 00C0      		rjmp .L2
+  52               	.LBE5:
+  53               	.LBE4:
+  54               		.cfi_endproc
+  55               	.LFE6:
+  57               		.text
+  58               	.Letext0:
+  59               		.file 3 "e:\\progs\\arduino-1.7.4\\hardware\\tools\\avr\\avr\\include\\stdint.h"
+DEFINED SYMBOLS
+                            *ABS*:00000000 main.c
+C:\Users\q242695\AppData\Local\Temp\ccXYyRJn.s:2      *ABS*:0000003e __SP_H__
+C:\Users\q242695\AppData\Local\Temp\ccXYyRJn.s:3      *ABS*:0000003d __SP_L__
+C:\Users\q242695\AppData\Local\Temp\ccXYyRJn.s:4      *ABS*:0000003f __SREG__
+C:\Users\q242695\AppData\Local\Temp\ccXYyRJn.s:5      *ABS*:00000000 __tmp_reg__
+C:\Users\q242695\AppData\Local\Temp\ccXYyRJn.s:6      *ABS*:00000001 __zero_reg__
+C:\Users\q242695\AppData\Local\Temp\ccXYyRJn.s:13     .text.startup:00000000 main
+
+NO UNDEFINED SYMBOLS
diff --git a/trunk/AVRProjects/ATTiny88/main.map b/trunk/AVRProjects/ATTiny88/main.map
new file mode 100644
index 00000000..6852b22e
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny88/main.map
@@ -0,0 +1,417 @@
+Archive member included to satisfy reference by file (symbol)
+
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr25\libgcc.a(_exit.o)
+                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o (exit)
+
+Memory Configuration
+
+Name             Origin             Length             Attributes
+text             0x00000000         0x00002000         xr
+data             0x00800060         0x0000ffa0         rw !x
+eeprom           0x00810000         0x00010000         rw !x
+fuse             0x00820000         0x00000400         rw !x
+lock             0x00830000         0x00000400         rw !x
+signature        0x00840000         0x00000400         rw !x
+*default*        0x00000000         0xffffffff
+
+Linker script and memory map
+
+Address of section .data set to 0x800100
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+LOAD main.o
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a
+START GROUP
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr25\libgcc.a
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libm.a
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25\libc.a
+END GROUP
+
+.hash
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+ *(.init9)
+ *(.text)
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+                0x00000038                __vector_10
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+                0x00000038                __vector_18
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+ .text          0x0000003a        0x0 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr25\libgcc.a(_exit.o)
+                0x0000003a                . = ALIGN (0x2)
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+                0x0000003a                main
+ .text.libgcc.mul
+                0x0000005a        0x0 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr25\libgcc.a(_exit.o)
+ .text.libgcc.div
+                0x0000005a        0x0 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr25\libgcc.a(_exit.o)
+ .text.libgcc   0x0000005a        0x0 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr25\libgcc.a(_exit.o)
+ .text.libgcc.prologue
+                0x0000005a        0x0 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr25\libgcc.a(_exit.o)
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+ .text.libgcc.fmul
+                0x0000005a        0x0 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr25\libgcc.a(_exit.o)
+ .text.libgcc.fixed
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+ *(.fini0)
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+
+.data           0x00800100        0x0 load address 0x0000005e
+                0x00800100                PROVIDE (__data_start, .)
+ *(.data)
+ .data          0x00800100        0x0 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+ .data          0x00800100        0x0 main.o
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+ *(.data*)
+ *(.rodata)
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+ *(.gnu.linkonce.d*)
+                0x00800100                . = ALIGN (0x2)
+                0x00800100                _edata = .
+                0x00800100                PROVIDE (__data_end, .)
+
+.bss            0x00800100        0x0
+                0x00800100                PROVIDE (__bss_start, .)
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+ .bss           0x00800100        0x0 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr25\libgcc.a(_exit.o)
+ *(.bss*)
+ *(COMMON)
+                0x00800100                PROVIDE (__bss_end, .)
+                0x0000005e                __data_load_start = LOADADDR (.data)
+                0x0000005e                __data_load_end = (__data_load_start + SIZEOF (.data))
+
+.noinit         0x00800100        0x0
+                0x00800100                PROVIDE (__noinit_start, .)
+ *(.noinit*)
+                0x00800100                PROVIDE (__noinit_end, .)
+                0x00800100                _end = .
+                0x00800100                PROVIDE (__heap_start, .)
+
+.eeprom         0x00810000        0x0
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+
+.fuse
+ *(.fuse)
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+ *(.hfuse)
+ *(.efuse)
+
+.lock
+ *(.lock*)
+
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+ *(.signature*)
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+ *(.stab)
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+ *(.comment)
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+                                 0x12 (size before relaxing)
+
+.note.gnu.build-id
+ *(.note.gnu.build-id)
+
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+ *(.debug)
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+ *(.debug_aranges)
+ .debug_aranges
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+
+.debug_pubnames
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+ *(.debug_info .gnu.linkonce.wi.*)
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+
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+
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+ *(.debug_line .debug_line.* .debug_line_end)
+ .debug_line    0x00000000       0xd7 main.o
+
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+ *(.debug_frame)
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+
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+                                0x166 (size before relaxing)
+
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+.debug_macro
+ *(.debug_macro)
+OUTPUT(main.elf elf32-avr)
+LOAD linker stubs
+
+Cross Reference Table
+
+Symbol                                            File
+__bad_interrupt                                   e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__heap_end                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__init                                            e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__stack                                           e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__vector_1                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__vector_10                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__vector_11                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__vector_12                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__vector_13                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__vector_14                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__vector_15                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__vector_16                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__vector_17                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__vector_18                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__vector_19                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__vector_2                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__vector_3                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__vector_4                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__vector_5                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__vector_6                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__vector_7                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__vector_8                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__vector_9                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__vector_default                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+__vectors                                         e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+_exit                                             e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr25\libgcc.a(_exit.o)
+exit                                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr25\libgcc.a(_exit.o)
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
+main                                              main.o
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr25/crttn88.o
diff --git a/trunk/AVRProjects/ATTiny88/main.sym b/trunk/AVRProjects/ATTiny88/main.sym
new file mode 100644
index 00000000..78895fdd
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny88/main.sym
@@ -0,0 +1,46 @@
+00000000 W __heap_end
+00000000 a __tmp_reg__
+00000000 W __vector_default
+00000000 T __vectors
+00000001 a __zero_reg__
+00000028 T __ctors_end
+00000028 T __ctors_start
+00000028 T __dtors_end
+00000028 T __dtors_start
+00000028 W __init
+00000028 T __trampolines_end
+00000028 T __trampolines_start
+00000038 T __bad_interrupt
+00000038 W __vector_1
+00000038 W __vector_10
+00000038 W __vector_11
+00000038 W __vector_12
+00000038 W __vector_13
+00000038 W __vector_14
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+00000038 W __vector_16
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+00000038 W __vector_2
+00000038 W __vector_3
+00000038 W __vector_4
+00000038 W __vector_5
+00000038 W __vector_6
+00000038 W __vector_7
+00000038 W __vector_8
+00000038 W __vector_9
+0000003a T main
+0000003d a __SP_L__
+0000003e a __SP_H__
+0000003f a __SREG__
+0000005a T _exit
+0000005a W exit
+0000005c t __stop_program
+0000005e A __data_load_end
+0000005e A __data_load_start
+0000005e T _etext
+000002ff W __stack
+00800100 D _edata
+00800100 T _end
+00810000 T __eeprom_end
diff --git a/trunk/AVRProjects/ATTiny88/makefile b/trunk/AVRProjects/ATTiny88/makefile
new file mode 100644
index 00000000..be7d56cf
--- /dev/null
+++ b/trunk/AVRProjects/ATTiny88/makefile
@@ -0,0 +1,441 @@
+# Hey Emacs, this is a -*- makefile -*-
+#
+# WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al.
+# Released to the Public Domain
+# Please read the make user manual!
+#
+# Additional material for this makefile was submitted by:
+#  Tim Henigan
+#  Peter Fleury
+#  Reiner Patommel
+#  Sander Pool
+#  Frederik Rouleau
+#  Markus Pfaff
+#
+# On command line:
+#
+# make all = Make software.
+#
+# make clean = Clean out built project files.
+#
+# make coff = Convert ELF to AVR COFF (for use with AVR Studio 3.x or VMLAB).
+#
+# make extcoff = Convert ELF to AVR Extended COFF (for use with AVR Studio
+#                4.07 or greater).
+#
+# make program = Download the hex file to the device, using avrdude.  Please
+#                customize the avrdude settings below first!
+#
+# make filename.s = Just compile filename.c into the assembler code only
+#
+# To rebuild project do "make clean" then "make all".
+#
+
+# mth 2004/09 
+# Differences from WinAVR 20040720 sample:
+# - DEPFLAGS according to Eric Weddingtion's fix (avrfreaks/gcc-forum)
+# - F_OSC Define in CFLAGS and AFLAGS
+
+
+# MCU name
+MCU = attiny88
+
+# Main Oscillator Frequency
+# This is only used to define F_OSC in all assembler and c-sources.
+F_OSC = 4190000
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+# Target file name (without extension).
+TARGET = main
+
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = $(TARGET).c
+
+
+# List Assembler source files here.
+# Make them always end in a capital .S.  Files ending in a lowercase .s
+# will not be considered source files but generated files (assembler
+# output from the compiler), and will be deleted upon "make clean"!
+# Even though the DOS/Win* filesystem matches both .s and .S the same,
+# it will preserve the spelling of the filenames, and gcc itself does
+# care about how the name is spelled on its command-line.
+ASRC = 
+
+
+
+# Optimization level, can be [0, 1, 2, 3, s]. 
+# 0 = turn off optimization. s = optimize for size.
+# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+OPT = s
+
+# Debugging format.
+# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
+# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
+#DEBUG = stabs
+DEBUG = dwarf-2
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+EXTRAINCDIRS = 
+
+
+# Compiler flag to set the C Standard level.
+# c89   - "ANSI" C
+# gnu89 - c89 plus GCC extensions
+# c99   - ISO C99 standard (not yet fully implemented)
+# gnu99 - c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+# Place -D or -U options here
+CDEFS =
+
+# Place -I options here
+CINCS =
+
+
+# Compiler flags.
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT)
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+CFLAGS += -Wall -Wstrict-prototypes
+CFLAGS += -Wa,-adhlns=$(<:.c=.lst)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+CFLAGS += -DF_OSC=$(F_OSC)
+
+
+
+# Assembler flags.
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs 
+ASFLAGS += -DF_OSC=$(F_OSC)
+
+
+#Additional libraries.
+
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+PRINTF_LIB = 
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+SCANF_LIB = 
+
+MATH_LIB = -lm
+
+# External memory options
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+# Linker flags.
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+
+
+
+
+# Programming support using avrdude. Settings and variables.
+
+# Programming hardware: alf avr910 avrisp bascom bsd 
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+#AVRDUDE_PROGRAMMER = stk500
+AVRDUDE_PROGRAMMER = usbasp
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = usb    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude> 
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+# ---------------------------------------------------------------------------
+
+# Define directories, if needed.
+DIRAVR = c:/winavr
+DIRAVRBIN = $(DIRAVR)/bin
+DIRAVRUTILS = $(DIRAVR)/utils/bin
+DIRINC = .
+DIRLIB = $(DIRAVR)/avr/lib
+
+
+# Define programs and commands.
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+
+
+
+
+# Define Messages
+# English
+MSG_ERRORS_NONE = Errors: none
+MSG_BEGIN = -------- begin --------
+MSG_END = --------  end  --------
+MSG_SIZE_BEFORE = Size before: 
+MSG_SIZE_AFTER = Size after:
+MSG_COFF = Converting to AVR COFF:
+MSG_EXTENDED_COFF = Converting to AVR Extended COFF:
+MSG_FLASH = Creating load file for Flash:
+MSG_EEPROM = Creating load file for EEPROM:
+MSG_EXTENDED_LISTING = Creating Extended Listing:
+MSG_SYMBOL_TABLE = Creating Symbol Table:
+MSG_LINKING = Linking:
+MSG_COMPILING = Compiling:
+MSG_ASSEMBLING = Assembling:
+MSG_CLEANING = Cleaning project:
+
+
+
+
+# Define all object files.
+OBJ = $(SRC:.c=.o) $(ASRC:.S=.o) 
+
+# Define all listing files.
+LST = $(ASRC:.S=.lst) $(SRC:.c=.lst)
+
+
+# Compiler flags to generate dependency files.
+### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
+GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS)
+
+
+
+
+
+# Default target.
+#all: begin gccversion sizebefore build sizeafter finished end
+all: begin gccversion build size finished end
+
+build: elf hex eep lss sym
+
+elf: $(TARGET).elf
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss 
+sym: $(TARGET).sym
+
+
+
+# Eye candy.
+# AVR Studio 3.x does not check make's exit code but relies on
+# the following magic strings to be generated by the compile job.
+begin:
+	@echo
+	@echo $(MSG_BEGIN)
+
+finished:
+	@echo $(MSG_ERRORS_NONE)
+
+end:
+	@echo $(MSG_END)
+	@echo
+
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+sizebefore:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi
+
+sizeafter:
+	@if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi
+
+size:
+	$(SIZE) -C --mcu=$(MCU) $(TARGET).elf
+
+# Display compiler version information.
+gccversion : 
+	@$(CC) --version
+
+
+
+# Program the device.  
+program: $(TARGET).hex $(TARGET).eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM)
+
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000 
+
+
+coff: $(TARGET).elf
+	@echo
+	@echo $(MSG_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	@echo
+	@echo $(MSG_EXTENDED_COFF) $(TARGET).cof
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+
+# Create final output files (.hex, .eep) from ELF output file.
+%.hex: %.elf
+	@echo
+	@echo $(MSG_FLASH) $@
+	$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+%.eep: %.elf
+	@echo
+	@echo $(MSG_EEPROM) $@
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+%.lss: %.elf
+	@echo
+	@echo $(MSG_EXTENDED_LISTING) $@
+	$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+%.sym: %.elf
+	@echo
+	@echo $(MSG_SYMBOL_TABLE) $@
+	$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+%.elf: $(OBJ)
+	@echo
+	@echo $(MSG_LINKING) $@
+	$(CC) $(ALL_CFLAGS) $(OBJ) --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+%.o : %.c
+	@echo
+	@echo $(MSG_COMPILING) $<
+	$(CC) -c $(ALL_CFLAGS) $< -o $@ 
+
+
+# Compile: create assembler files from C source files.
+%.s : %.c
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+%.o : %.S
+	@echo
+	@echo $(MSG_ASSEMBLING) $<
+	$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+
+
+# Target: clean project.
+clean: begin clean_list finished end
+
+clean_list :
+	@echo
+	@echo $(MSG_CLEANING)
+	$(REMOVE) $(TARGET).hex
+	$(REMOVE) $(TARGET).eep
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).cof
+	$(REMOVE) $(TARGET).elf
+	$(REMOVE) $(TARGET).map
+	$(REMOVE) $(TARGET).obj
+	$(REMOVE) $(TARGET).a90
+	$(REMOVE) $(TARGET).sym
+	$(REMOVE) $(TARGET).lnk
+	$(REMOVE) $(TARGET).lss
+	$(REMOVE) $(OBJ)
+	$(REMOVE) $(LST)
+	$(REMOVE) $(SRC:.c=.s)
+	$(REMOVE) $(SRC:.c=.d)
+	$(REMOVE) .dep/*
+
+
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program
+ 
+
+ 
diff --git a/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_Emu.asm b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_Emu.asm
new file mode 100644
index 00000000..76b198a5
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_Emu.asm
@@ -0,0 +1,3187 @@
+;
+;
+;   6 5 0 2   E M U L A T O R
+;
+; An AVR emulates a 6502 with >2MHz speed
+;
+; Copyright (C) 2013-2015  Klaus Dormann
+;
+; This program is free software: you can redistribute it and/or modify
+; it under the terms of the GNU General Public License as published by
+; the Free Software Foundation, either version 3 of the License, or
+; (at your option) any later version.
+;
+; This program is distributed in the hope that it will be useful,
+; but WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+; GNU General Public License for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with this program.  If not, see <http://www.gnu.org/licenses/>.
+;
+; contact info at http://2m5.de or email K@2m5.de
+;
+#define   version "0.83b"   ;makes a printable version number
+;
+; version history:
+;  0.8   24-jan-13   1st version distributed for testing
+;  0.81  04-mar-13   added binary load/save/autoload support for applications
+;                    added 6502_Emu_config.inc for all reconfigurable items.
+;                    split cpu core into 6502_Emu_NMOS.inc to support change to CMOS
+;                    added timer 1 access, tested and fixed all interrupts
+;                    added countdown timer & interrupt vector register
+;                    added optional software flow control to rx buffer
+;                    improved terminal support for backspace and delete key
+;  0.82  20-jul-13   added CMOS core (65C02 instructions and disassembly)
+;  0.83  17-may-14   added breakpoint support to debugger
+;                    added SPI support to IO module, DMA for SPI & I2C
+;  0.83a 17-aug-14   changed interrupt disabled in real mode to honor NMI & single step
+;                    fixed diag stop continuing until 10ms interrupt, now immediate
+;                    fixed invalid opcode message broken by check for breakpoint
+;  0.83b 24-jan-15   fixed ATMega32 interrupt table, fixed break hanging on some terminals
+;                    reduced interrupt latency caused by the monitor waiting for tx buffer
+;                    
+;
+; ATMEGA16 & ATMEGA32 fuse settings:
+;   16 MHz crystal
+;   JTAGEN unprogrammed
+;   BOD enabled - 4,0V
+;   Preserve EEPROM - protect non volatile program memory, else clears all saved programs
+;
+; related docs: http://2m5.de/6502_Emu/index.htm
+;
+; description of hardware:
+;   porta0:7  -> address bus high : IO chip select latches
+;   portb0:7  -> address bus low  : IO address & IO R/W : SPI & slave select latch
+;   portc0:7  <> data bus         : I2C bus switch
+;   portd0:1  RS232 monitor & ACIA emulation
+;   portd2    <- ~NMI (INT0) / optional IO-select 3
+;   portd3    <- ~IRQ (INT1) 
+;   portd4    -> ~RD_RAM (/OE at SRAM)
+;   portd5    -> ~WR_RAM (/WE at SRAM)
+;                         /CE tied low at SRAM
+;   portd6    -> IO-select 1
+;   portd7    -> phi2 (OC2) / optional IO-select 2
+;
+;             pullups required for MNI, IRQ, weak pullups for WR_RAM, RD_RAM
+;
+;             optional weak pullups or pulldowns on IO selects and 
+;             IO busses to reset external hardware during high-Z
+;   
+;   timer0    debugger 20ms timer: ctc interrupt
+;             debugger single step: overflow interrupt
+;   timer2    optional 1 MHz phase 2 output on OC2
+;
+
+; The following notes apply to the NMOS emulation core:
+;
+;   Emulation is documented instructions only !
+;
+;   Invalid 6502 instructions will cause a halt with message.
+;
+;   Decimal mode emulation will emulate documented behavior only:
+;   a decimal result & carry-flag is valid if both operands were valid BCD
+;
+;   negative, overflow & zero-flags may be altered after a decimal add
+;   or subtract, but have no valid meaning and may not be identical to real
+;   hardware. The result of a decimal operation with non decimal operands
+;   (any nibble >9) may not match the result of a hardware 6502
+;
+; In the CMOS emulation core all instructions are valid and if not defined
+;   otherwise, will be executed as NOP instructions of various length in bytes
+;   and cycles depending on the decode mechanism in the original CMOS core.
+;
+;   A decimal operation with valid decimal numbers will have a valid result
+;   and valid NZC flags. The result and flags of decimal add or subtract with 
+;   invalid BCD operands may not match a real 65C02.
+
+ 
+            .NOLIST
+            .include "sam.inc"
+            .LIST
+ 
+
+;****************************
+;
+; C O N F I G U R A T I O N
+;
+;****************************
+.set config_part=1
+.include "6502_Emu_config.inc"
+
+;configuration based clock constants
+.equ  cycle_time_tns    = (10000000000 / Osc_Hz) ;1/10 ns cpu clock duration
+.equ  ten_ms            = ((Osc_Hz - 51200) / 102400) ;10ms OCR0 value rounded
+
+;configuration based baudrate constants and error checking
+.equ UBRR_value = ((Osc_Hz + Baud * 8) / (Baud * 16) - 1)  ; rounded
+.equ Baud_error = ((1000 * Osc_Hz / (16 * (UBRR_value + 1)) / Baud) - 1000) ;0/00 deviation
+.if ((Baud_error > 10) || (Baud_error < -10)) ; +/-10 0/00 acceptable
+  .error "Unsafe baudrate - at current cpu clock the deviation is > 1%!"
+.endif
+
+;configuration based serial EEPROM constants
+.ifdef eep_adr
+   .if eep_adr < 8
+      .ifdef spi_sel
+         .ifdef spi_vat
+            .equ spi_eep_adr = spi_idle^(1<<eep_adr)
+         .else
+            .equ spi_eep_adr = eep_adr
+         .endif
+         .equ eep_vld = 1
+      .endif
+   .else
+      .ifdef i2c_sel
+         .equ i2c_eep_adr = eep_adr
+         .equ eep_vld = 1
+      .endif
+   .endif
+.endif
+
+; reserved registers
+;
+; (I): used during interrupt, (C): interrupt to program communication
+; (E): Register of the emulated CPU
+; (D)  used by the debug monitor - must be preserved except Z (Z is saved
+;      before main is called)
+;
+; 
+; 0x00 non immediate
+.DEF  c           =r0         ; GPR3
+.DEF  d           =r1         ; GPR4
+.DEF  e           =r2         ; GPR5
+.DEF  f           =r3         ; GPR6
+; 0x04
+.DEF  k           =r4         ; (I) GPR2 during interrupt
+.DEF  allon       =r5         ; const 0xff
+.DEF  one         =r6         ; const 1
+.DEF  zero        =r7         ; const 0
+; 0x08
+.DEF  regx        =r8         ; (E) index X
+.DEF  regy        =r9         ; (E) index Y
+.DEF  operand     =r10        ; memory operand
+.DEF  spointer    =r11        ; (E) stack pointer
+; 0x0c
+.DEF  clear       =r12        ; precharged cbus clear
+.DEF  readmem     =r13        ; precharged cbus read memory
+.DEF  writemem    =r14        ; precharged cbus write memory
+.DEF  s           =r15        ; (I) SREG save during interrupt
+; 0x10 immediate
+.DEF  a           =r16        ; immediate GPR
+.DEF  b           =r17        ; immediate GPR2
+.DEF  i           =r18        ; (I) immediate GPR during interrupt
+.DEF  flags       =r19        ; (D) flags 
+.equ  deb_on  = 0             ;     debugger running if set, else stopped
+                              ;     acia emulation disconnected if set
+.equ  emu_run = 1             ;     emulator running if set, else stopped
+.equ  deb_act = 2             ;     deb instance started if set - locks T0 cmp start
+.equ  rvs_vid = 3             ;     reverse video if set, else normal video
+.equ  op_ind  = 4             ;     operand indirect if set, operand direct if cleared
+                              ;     needed for instruction retry in IO emulation (register busy) 
+.equ  modify  = 5             ;     extended memory address locked until rewrite
+.equ  string  = 6             ;     allow lower case input for string
+.equ  dma_rpt = 7             ;     DMA interrrupt modifier
+; 0x14
+.DEF  unused_r20  =r20        ; unused
+.DEF  rega        =r21        ; (E) accumulator
+.DEF  stat2       =r22        ; (E) processor flags 6502 only 0V1BDI00
+.DEF  stat        =r23        ; (E) processor flags AVR compatible (ITHSV)NZC
+; 0x18 immediate word
+.DEF  pcl         =r24        ; (E) program counter low
+.DEF  pch         =r25        ; (E) program counter high
+;     x                       ; word GPR / (I) buffer index (rx/tx)
+; 0x1c
+;     y                       ; operand address, (D) buffer index
+#define     oplow       yl
+#define     ophigh      yh
+#define     opointer    y
+;     z                       ; instruction decode
+#define     opcode      zl
+#define     oc_tabh     zh    ; restore when used as index
+#define     oc_vector   z
+
+;
+; internal EEPROM usage
+;
+.ESEG
+.ifdef   eep_adr
+   ;non volatile program storage control structure for external I2C EEPROM
+   .org  1
+   eep_string: .byte 50          ;string to send to program on autoload
+                                 ;0xff marks end
+   .org  0xff
+   eep_auto:   .byte 1           ;autoload program number, 0xff = none
+   eep_pat:    .byte 256         ;program allocation table, 0xff = slot free
+                                 ;0x00 - 0xfe = program number in slot
+.endif
+
+.macro      align             ;align to (1<<@0)
+alignfromhere:
+      .if (alignfromhere & ((1<<@0)-1))   ;if not already aligned
+         .org  (alignfromhere & (0xffff<<@0)) + (1<<@0)
+      .endif
+.endmacro
+;
+; SRAM usage
+;
+.DSEG
+;(D) command line buffer
+cmd_buf:    .byte 48          ;48 character command line buffer
+cmd_end:    .byte 1           ;+1 for end of string marker
+cmd_inx:    .byte 1           ;input index to cmd_buf
+cmd_esc_timer:                ;10ms increments to discard esc sequence
+            .byte 1           ;bit 7 = 0:true escape, 1:discarded esc seq
+cmd_reg_timer:                ;timer to refresh register display
+            .byte 1
+lmem_display:
+            .byte 2           ;last memory block displayed
+lmem_write: .byte 2           ;last memory address written +1
+lmem_disas: .byte 2           ;last memory address disassembled +1
+sp_save:    .byte 2           ;saved sp for mainloop to allow subs to exit
+adr_limit:  .byte 2           ;maximum address +1 accepted in deb_adr
+rstflag:    .byte 1           ;reset flags from mcucsr
+prog_num:   .byte 1           ;program number for EEP save/load, 0xff if closed
+brkpt_lo:   .byte 10          ;breakpoint address low
+brkpt_hi:   .byte 10          ;breakpoint address high
+brkpt_op:   .byte 10          ;breakpoint original opcode
+;I/O emulation
+;global
+irq_mask:   .byte 1           ;interrupt mask, bit set if enabled, default 0b00000001
+                              ;bit 7=tx empty, 6=rx full, 0=10ms tick,
+irq_flag:   .byte 1           ;interrupt flags, bit set if pending
+                              ;bit 7=tx empty, 6=rx full, 0=10ms tick
+;timer 1
+timer_ena:  .byte 1           ;t0 & t1 interrupt enable bits
+t1_adr:     .byte 1           ;index to t1 register
+t1_ctrl:    .byte 1           ;readback value of TCCR1
+;tick (10ms) countdown timer
+tcdn_count: .byte 1           ;countdown to flag/interrupt
+tcdn_top:   .byte 1           ;reload value at bottom
+;diagnostic
+selftest:   .byte 1           ;selftest register, force bits 2=reset, 1=NMI, 0=IRQ
+;I2C
+i2c_statreg:
+            .byte 1           ;status, bit 7=interrupt, 6=ack, 5=stuck, 4=set EEP 
+                              ;3=read ack pending, 2=speed 400kHz, 1=start, 0=stop  
+;LCD
+lcd_flags:  .byte 1           ;0xff=usable, 0=busy timeout
+
+;SPI
+spi_cmd:    .byte 1           ;save for slave select hold
+spi_rdat:   .byte 1           ;data in SPI shifter after last write
+
+;DMA
+dma_last_cmd:
+            .byte 1           ;command in progress | last successful command + 0x10
+                              ;| 0xff= can't continue
+dma_tab_index:
+            .byte 1           ;index to block transfer table, 0xff if trashed
+;dma block transfer table:
+;        SPI            I2C            EEPROM
+;  byte  slave address  -don't care-   program number
+;  word  start address  start address  start address
+;  word  byte count     byte count     end address
+;  word  temp count     temp count     -don't care-  
+dma_tab:    .byte 7
+
+;RS232 Buffers
+usart_ena:  .byte 1           ;usart interrupt enable bits
+tx_inx:     .byte 1           ;input index to tx fifo
+tx_fill:    .byte 1           ;fill level in tx fifo (0 = empty)
+rx_inx:     .byte 1           ;input index to rx fifo
+rx_fill:    .byte 1           ;fill level in rx fifo (0 = empty)
+flow_cmd:   .byte 1           ;XON/XOFF - bit 7: 1=done, 0=pending
+            align 8           ;buffers on page boundary
+tx_buf:     .byte 256         ;transmit fifo
+rx_buf:     .byte 256         ;receive fifo
+
+
+; end of SRAM
+
+.CSEG
+;
+; Definition of Hardware
+;
+; Address Bus
+.EQU  abuslo      = portb
+.EQU  aloddr      = ddrb
+.EQU  abushi      = porta
+.EQU  ahiddr      = ddra
+; Data Bus
+.EQU  dbusin      = pinc
+.EQU  dbusout     = portc
+.EQU  dbusddr     = ddrc
+; Control Bus
+.EQU  cbusin      = pind
+.EQU  cbus        = portd
+.EQU  cbusddr     = ddrd
+; External Interrupts
+.EQU  ibus        = gicr
+.ifdef   nmi_ena
+   .EQU  IRQ_ena     = 0b11000000   ;enable IRQ
+   .EQU  IRQ_dis     = 0b01000000   ;disable IRQ
+.else
+   .EQU  IRQ_ena     = 0b10000000   ;enable IRQ
+   .EQU  IRQ_dis     = 0b00000000   ;disable IRQ
+.endif
+.EQU  NMI_dis     = 0   ;disable both during monitor
+; USART
+.EQU  usart_txi_dis  = 0b10011000   ;RXCIE, RXEN, TXEN
+.EQU  usart_txi_ena  = 0b10111000   ;RXCIE, UDRIE, RXEN, TXEN
+
+.macro      addi
+            subi  @0,-@1            ;subtract the negative of an immediate value
+.endmacro
+.macro      addiw ;(RdL:RdH, k)
+            subi  @0l,low(-@1)      ;word subtract the negative of an immediate value  
+            sbci  @0h,high(-@1)
+.endmacro 
+
+;
+; wait_ns  waittime in ns , cyles already used 
+;
+;     cycles already used will be subtracted from the delay
+;     the waittime resolution is 1 cycle (delay from exact to +1 cycle)
+;     the maximum delay at 20MHz (50ns/clock) is 750ns
+;
+.macro      wait_ns
+      .set cycles = ((@0 * 10 + cycle_time_tns - 1) / cycle_time_tns - @1)
+      .if (cycles > 15)
+        .error "MACRO wait_ns - too many cycles to burn"
+      .else
+        .if (cycles > 0)
+          .if   (cycles & 8)
+            rjmp  pc+1
+            rjmp  pc+1
+            rjmp  pc+1
+            rjmp  pc+1
+          .endif
+          .if   (cycles & 4)
+            rjmp  pc+1
+            rjmp  pc+1
+          .endif
+          .if   (cycles & 2)
+            rjmp  pc+1
+          .endif
+          .if   (cycles & 1)
+            nop
+          .endif
+        .endif
+      .endif
+.endmacro
+; wait_data_valid  cycles already used
+#define     wait_data_valid   wait_ns data_valid_ns,
+
+; print string - debugger
+.macro   PrintStr ;@0 = message pointer
+   ldi   zl,low(@0*2)
+   ldi   zh,high(@0*2)
+   rcall prtstr
+.endmacro
+.macro   PrintStr_far ;@0 = message pointer
+   ldi   zl,low(@0*2)
+   ldi   zh,high(@0*2)
+   call  prtstr
+.endmacro
+
+
+;*****************************************************************
+;
+; reset and interrupt vectors according to µc type
+;
+;*****************************************************************
+
+#ifdef _M16DEF_INC_
+   jmp   reset       ; Reset handler
+   rjmp  NMI         ; INT0 handler
+   nop
+   rjmp  IRQ         ; INT1 handler
+   nop
+   jmp   illegalint  ; Timer2 compare match
+   jmp   illegalint  ; Timer2 overflow
+   .ifdef iomap
+      jmp   t1_icr      ; Timer1 capture event
+      jmp   t1_ocra     ; Timer1 compare match A 
+      jmp   t1_ocrb     ; Timer1 compare match B
+      jmp   t1_ovi      ; Timer1 overflow handler
+   .else
+      jmp   illegalint  ; Timer1 capture event
+      jmp   illegalint  ; Timer1 compare match A 
+      jmp   illegalint  ; Timer1 compare match B
+      jmp   illegalint  ; Timer1 overflow handler
+   .endif
+   jmp   t0_ovi      ; Timer0 overflow handler - debugger single step
+   jmp   illegalint  ; SPI - Serial transfer complete
+   rjmp  rx_int      ; USART - RX complete
+   nop
+   rjmp  tx_udre     ; USART - data register empty
+   nop
+   jmp   illegalint  ; USART - TX complete
+   jmp   illegalint  ; ADC conversion complete
+   jmp   illegalint  ; EEPROM ready
+   jmp   illegalint  ; Analog comparator
+   jmp   illegalint  ; TWI serial interface
+   jmp   illegalint  ; INT2 handler
+   jmp   t0_cmi      ; Timer0 compare match - debugger 10ms timer
+   jmp   illegalint  ; SPM ready
+#endif
+#ifdef _M32DEF_INC_
+   jmp   reset       ; Reset handler
+   rjmp  NMI         ; INT0 handler
+   nop
+   rjmp  IRQ         ; INT1 handler
+   nop
+   jmp   illegalint  ; INT2 handler
+   jmp   illegalint  ; Timer2 compare match
+   jmp   illegalint  ; Timer2 overflow
+   .ifdef iomap
+      jmp   t1_icr      ; Timer1 capture event
+      jmp   t1_ocra     ; Timer1 compare match A 
+      jmp   t1_ocrb     ; Timer1 compare match B
+      jmp   t1_ovi      ; Timer1 overflow handler
+   .else
+      jmp   illegalint  ; Timer1 capture event
+      jmp   illegalint  ; Timer1 compare match A 
+      jmp   illegalint  ; Timer1 compare match B
+      jmp   illegalint  ; Timer1 overflow handler
+   .endif
+   jmp   t0_cmi      ; Timer0 compare match - debugger 10ms timer
+   jmp   t0_ovi      ; Timer0 overflow handler - debugger single step
+   jmp   illegalint  ; SPI - Serial transfer complete
+   rjmp  rx_int      ; USART - RX complete
+   nop
+   rjmp  tx_udre     ; USART - data register empty
+   nop
+   jmp   illegalint  ; USART - TX complete
+   jmp   illegalint  ; ADC conversion complete
+   jmp   illegalint  ; EEPROM ready
+   jmp   illegalint  ; Analog comparator
+   jmp   illegalint  ; TWI serial interface
+   jmp   illegalint  ; SPM ready
+#endif
+.if pc < 0x2a
+   .error "unknown device - interrupt vectors could not be built!"
+.endif
+
+;*****************************************************************
+;
+; RS232 buffer
+;
+;*****************************************************************
+;
+; RX complete interrupt - rx fifo input
+;
+rx_int:
+   in    s,sreg
+   push  xl
+   push  xh
+   in    k,ucsra
+   in    i,udr
+   sbrs  k,fe              ;no stop bit = possible break
+   ifs_and  rx_break
+   cpi   i,0               ;break should have all bits 0
+   ifeq     rx_break
+      sbr   flags,(1<<deb_on) ;turn debugging on
+      cbr   flags,(1<<emu_run) ;stop emulation
+      lds   i,irq_flag        ;clear ACIA TDRE & RDRF
+      cbr   i,0b11000000
+      sts   irq_flag,i
+      lds   k,irq_mask        ;other interrupts pending & enabled?
+      and   i,k
+      ifeq  rx_break_irq
+         cbi   cbusddr,3         ;clear any pending acia interrupts
+      end   rx_break_irq
+      sts   rx_fill,zero      ;clear buffer
+      sts   tx_fill,zero
+      do    rx_brk_wait
+         sbis  pind,0            ;exit after RX pin returns to idle
+      loop  rx_brk_wait
+      push  a
+      call crlf
+      pop   a
+      ldi   i,27              ;force escape
+   end      rx_break
+   lds   k,rx_fill         ;check buffer full
+   inc   k
+   ifne  rx_no_overrun
+      ldi   xh,high(rx_buf)   ;load buffer index
+      lds   xl,rx_inx
+      st    x+,i              ;store data
+      sts   rx_inx,xl         ;store pointers
+      sts   rx_fill,k
+   end   rx_no_overrun
+   .ifdef flowlo
+      mov   i,k
+      cpi   i,flowhi          ;buffer upper watermark?
+      ifsh  rx_flow
+         lds   i,flow_cmd
+         cpi   i,0x93         ;xoff done?
+         ifne  rx_send_xoff
+            ldi   i,0x13         ;post xoff pending
+            sts   flow_cmd,i
+             ldi   i,usart_txi_ena  ;notify transmitter
+            out   ucsrb,i
+            .ifdef irq_dis_real
+               sts   usart_ena,i
+            .endif
+         end   rx_send_xoff
+      end   rx_flow
+   .endif
+   .ifdef iomap                  ;acia emulation
+      sbrc  flags,deb_on         ;acia connected?
+      ifs   rx_acia_on
+         lds   i,irq_mask        ;check acia RDRF IRQ enabled
+         andi  i,0b01000000
+         ifne  rx_int_ena
+            sbi   cbusddr,3      ;set IRQ
+         end   rx_int_ena
+         lds   i,irq_flag
+         sbr   i,0b01000000   ;set RDRF 
+         sts   irq_flag,i        ;store status
+      end   rx_acia_on       
+   .endif
+   pop   xh
+   pop   xl
+   out   sreg,s
+   reti
+
+;
+; RS232 transmit register empty interrupt, tx fifo output
+;
+tx_udre:
+   in    s,sreg
+   push  xl
+   push  xh
+   lds   k,tx_fill         ;no more bytes available?
+   .ifdef flowlo
+      lds   i,flow_cmd        ;do flowcontrol
+      tst   i                 ;already sent?
+      ifpl  tx_flow
+         out   udr,i             ;send xon/xoff
+         ori   i,0x80            ;mark sent
+         sts   flow_cmd,i
+         tst   k
+      else  tx_flow
+         ldi   xh,high(tx_buf)   ;send data
+         lds   xl,tx_inx         ;calc output index
+         sub   xl,k
+         ld    i,x               ;load from fifo head
+         out   udr,i
+         dec   k                 ;update pointer
+      end   tx_flow
+   .else
+      ldi   xh,high(tx_buf)
+      lds   xl,tx_inx         ;calc output index
+      sub   xl,k
+      ld    i,x               ;load from fifo head
+      out   udr,i
+      dec   k                 ;update pointer
+   .endif
+   ifeq  tx_fifo_empty
+      ldi   i,usart_txi_dis   ;tx buffer empty - stop rupt
+      out   ucsrb,i
+      .ifdef irq_dis_real
+         sts   usart_ena,i
+      .endif
+   end   tx_fifo_empty
+   sts   tx_fill,k
+   .ifdef iomap                  ;acia emulation
+      sbrc  flags,deb_on         ;acia connected?
+      ifs   tx_acia_on
+         lds   i,irq_mask        ;check TDRE IRQ enabled
+         andi  i,0b10000000
+         ifne  tx_int_ena
+            sbi   cbusddr,3      ;set IRQ
+         end   tx_int_ena
+         lds   i,irq_flag
+         sbr   i,0b10000000   ;set TDRE
+         sts   irq_flag,i     ;store status
+      end   tx_acia_on       
+   .endif
+   pop   xh
+   pop   xl
+   out   sreg,s
+   reti
+
+; Messages part 1 (optimizing empty space before opcode table for CMOS)
+; some words available if rx/tx maximum size and DMA (16 more for NMOS)
+;                              word count, X = don't use in part 1 ---> ;##
+;.ifdef cmos_core
+;stp_instr:     .db   "STP - Emulator halted",0                          ; X
+;.else
+;inv_instr:     .db   "Illegal Opcode ",0                                ; X
+;.endif
+;emu_msg:       .db   13,10,13,10,core_string," Emulator V",version,0    ; X
+;built_msg:     .db   " built ",__DATE__," ",__TIME__,0                  ;14
+load_wait:     .db   13,10,"Loading, <ESC> to abort",13,10,0            ;14
+load_abort:    .db   " Load aborted",0                                  ; 7
+;err_chksum:    .db   " Checksum failed",0,0                             ; 9
+rs_vect_empty: .db   13,10,"Check reset vector",0,0                     ;11
+reset_msg:     .db   "  Reset",0                                        ; 4
+bpt_clrd_msg:  .db   10,13,"All breakpoints cleared",0                  ;13
+bpt_info:      .db   10,13,"Breakpoints  (slot#:address)",13,10,0,0     ;17
+;bpt_info_none: .db   10,13,"No breakpoints active",0                    ;12
+bpt_slot_full: .db   10,13,"No more breakpoint slots available",0,0     ;19
+.ifndef irq_dis_real       ;+53 words available (6 less for NMOS)
+load_ok:       .db   13,"Load OK",0,0                                   ; 5
+err_nonhex:    .db   " Non-Hex data in record",0                        ;12
+err_func:      .db   " Invalid function or count in record",0,0         ;19
+illegal_int:   .db   13,10,"AVR Illegal Interrupt",0                    ;12
+back_line:     .db   13,27,91,"K",27,91,"1A",0,0                        ; 5
+.endif
+
+;**************************************************
+;
+; 6502 emulation core
+;
+;**************************************************
+      .ifdef cmos_core
+         .include "6502_Emu_CMOS.inc"
+      .else
+         .include "6502_Emu_NMOS.inc"
+      .endif
+
+;**************************************************
+;
+; I/O page (iomap) address decode - emulated I/O
+;
+;**************************************************
+      .ifdef iomap
+         .include "6502_Emu_IO.inc"
+      .endif
+
+;**************************************************
+;
+; Monitor / Debugger Interrupts
+;
+;**************************************************
+
+;
+; an illegal interrupt has occured
+;
+illegalint:
+   PrintStr illegal_int
+   do    i_stop     
+   loop  i_stop      ; reset required
+
+;
+; Timer 0 compare match A - 10ms CTC interrupt
+;
+t0_cmi:
+   in    s,sreg
+   lds   i,cmd_esc_timer   ;service esc sequence timer
+   mov   k,i
+   andi  i,0x7f
+   ifne  t0_esc_expired
+      dec   k
+      sts   cmd_esc_timer,k
+   end   t0_esc_expired
+   lds   i,cmd_reg_timer   ;service register refresh timer
+   tst   i
+   ifne  t0_reg_expired
+      dec   i
+      sts   cmd_reg_timer,i
+   end   t0_reg_expired
+
+   lds   i,irq_flag        ;check 10 ms timer
+   sbr   i,1               ;set tick flag
+   lds   k,tcdn_count      ;update tcdn count
+   dec   k                 ;expired?
+   ifeq  t0_tcdn_expired
+      lds   k,tcdn_top        ;reset tcdn count
+      sbr   i,2               ;set tcdn flag
+   end   t0_tcdn_expired
+   sts   tcdn_count,k      ;save count
+   sts   irq_flag,i        ;save flags
+   lds   k,irq_mask        ;tick or tcdn IRQ enabled?
+   and   i,k
+   ifne  t0_tcdn_irq
+      sbi   cbusddr,3         ;set IRQ
+   end   t0_tcdn_irq
+
+   sbrc  flags,deb_act     ;no debugger instance active
+   ifs_and  debug_start
+   sbrs  flags,deb_on      ;debug mode
+   ifs      debug_start
+      .if defined(spi_sel) || defined(i2c_sel)
+         sbrs  flags,dma_rpt     ;interupt during dma transfer?
+         ifs   t0_dma
+            cbr   flags,(1<<dma_rpt)
+            sts   dma_tab+1,zl      ;save current dma memory address
+            sts   dma_tab+2,zh
+            sts   dma_tab+5,xl      ;save dma count in progress
+            sts   dma_tab+6,xh
+            cbr   flags,(1<<modify) ;unlock extended memory address after modify
+            out   dbusddr,zero      ;switch back to read mode
+            out   cbus,readmem      ;OE to RAM
+            ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+            sbiw  pch:pcl,2         ;prepare for instruction retry
+            sbrs  flags,op_ind      ;3 byte instruction if direct
+         end   t0_dma
+      .endif
+      sbiw  pch:pcl,1      ;adjust PC to next opcode
+      sbr   flags,(1<<deb_act)  ;prevent double_activation
+      ldi   a,NMI_dis      ;no emulator interrupts during monitor
+      out   ibus,a
+      pop   a              ;discard return address from stack
+      pop   a
+      sei
+      rjmp  debugger
+   end      debug_start
+   out   sreg,s
+   reti
+;
+; Timer 0 overflow interrupt - single step
+;
+t0_ovi:
+   ldi   a,NMI_dis         ;no emulator interrupts during monitor
+   out   ibus,a
+   sbiw  pch:pcl,1         ;adjust PC to next opcode
+   pop   a                 ;discard return address from stack
+   pop   a
+   sei
+   rjmp  end_command
+
+.ifdef cmos_core
+; STP instruction handling
+deb_stop:
+   ldi   flags,(1<<deb_on)|(1<<deb_act)
+   lds   a,irq_flag        ;disconnect acia, clear TDRE & RDRF
+   cbr   a,0b11000000
+   sts   irq_flag,zero
+   lds   c,irq_mask        ;no other internal IRQ pending & enabled?
+   and   a,c
+   ifeq  inv_op_irq_clear
+      cbi   cbusddr,3         ;clear irq
+   end  inv_op_irq_clear
+   ldi   a,NMI_dis         ;no emulator interrupts during monitor
+   out   ibus,a
+   .ifdef irq_dis_real
+      ldi   a,0b11            ;enable t0 interrupts (tick, single step)
+      out   timsk,a
+      lds   a,usart_ena       ;enable usart interrupts
+      out   ucsrb,a
+   .endif
+   sbiw  pch:pcl,2         ;position to current instruction
+   out   tifr,one          ;cancel single step interrupt (tov0)
+   sei
+   rcall brkpt_chk_pc
+   iftc  deb_stop_unexp    ;skip if breakpoint
+      rcall show_regs
+      PrintStr stp_instr      ;"STP - Emulator halted"
+      adiw  pch:pcl,1         ;position to next instruction
+   end   deb_stop_unexp
+   rjmp  end_command
+.else
+; illegal opcode handling 
+deb_inv_op:
+   ldi   flags,(1<<deb_on)|(1<<deb_act)
+   lds   a,irq_flag        ;disconnect acia, clear TDRE & RDRF
+   cbr   a,0b11000000
+   sts   irq_flag,zero
+   lds   c,irq_mask        ;no other internal IRQ pending & enabled?
+   and   a,c
+   ifeq  inv_op_irq_clear
+      cbi   cbusddr,3         ;clear irq
+   end  inv_op_irq_clear
+   ldi   a,NMI_dis      ;no emulator interrupts during monitor
+   out   ibus,a
+   .ifdef irq_dis_real
+      ldi   a,0b11            ;enable t0 interrupts (tick, single step)
+      out   timsk,a
+      lds   a,usart_ena       ;enable usart interrupts
+      out   ucsrb,a
+   .endif
+   sbiw  pch:pcl,2         ;position to current instruction
+   out   tifr,one          ;cancel single step interrupt (tov0)
+   sei
+   cpi   opcode,0xdb       ;potential breakpoint
+   ifne_or  deb_stop_unexp
+   rcall brkpt_chk_pc
+   iftc     deb_stop_unexp ;skip if breakpoint
+      mov   d,opcode          ;temporary save opcode
+      rcall show_regs
+      PrintStr inv_instr      ;"Illegal Opcode "
+      mov   a,d
+      rcall PrintHex
+      adiw  pch:pcl,1         ;position to next instruction
+   end      deb_stop_unexp
+   rjmp  end_command
+.endif
+   
+;**************************************************
+;
+; Reset
+;
+;**************************************************
+
+; reset all IO extension registers
+rs_IO_ext:
+   .set io_sel_direct = 0
+   .set rs_ddr_done = 0
+;set ddr for 1st IO register configured
+.macro   rs_set_ddr   
+   .if   rs_ddr_done == 0
+      out   ahiddr,allon      ;activate io select output
+      .ifdef  nmi_ena
+         ldi   a,0b11110000      ;Memory R/W signals + IO-select 1-2
+      .else
+         ldi   a,0b11110100      ;Memory R/W signals + IO-select 1-3
+      .endif
+      out   cbusddr,a         ;activate io select strobe
+      .set rs_ddr_done = 1
+   .endif
+.endmacro
+;reset external IO select registers
+.macro   rs_set_iosel      ;@0 = ios#_default, @1 = cbus_pin#
+   .ifdef @0
+      .if   io_sel_direct != @1
+         ldi   b,@0
+         out   abushi,b
+         sbi   cbus,@1
+         rs_set_ddr
+         cbi   cbus,@1
+      .endif
+   .endif
+.endmacro
+;reset spi slave select register (& its IO select register)
+   .ifdef spi_sel
+      ldi   a,spi_idle        ;reset slave select pins
+      out   spi_out,a         ;precharge slave sel (abuslo)
+      set_io_select spi_sel   ;precharge io select register
+      ena_io_select
+      ldi   a,~(1<<spi_miso)  ;set all output exept miso
+      out   spi_ddr,a         ;activate spi output
+      rs_set_ddr
+      nop2                    ;wait 2 cycles 
+      dis_spi_select          ;end SPI register strobe
+   .endif
+   out   cbus,clear        ;clear IO select
+   out   aloddr,allon      ;set abuslo output (spi_ddr)
+   out   spcr,zero         ;clear SPI hardware
+   out   spsr,zero
+;reset IO select register if configured and not already done
+   rs_set_iosel ios1_default,6
+   rs_set_iosel ios2_default,7
+   rs_set_iosel ios3_default,2
+   rs_set_ddr              ;if none of the above
+;hw reset to IO ICs if configured
+   .ifdef iomap
+      .ifdef   io_reset_pin
+         set_io_reset   io_reset_pin
+         out   abushi,b
+         out   cbus,clear
+      .endif
+   .endif
+   ret
+;
+; *********** HARDWARE RESET VECTOR ****************
+;
+reset:
+   ldi   a,high(ramend)    ;set Stack-Pointer
+   out   sph,a
+   ldi   a,low(ramend)
+   out   spl,a
+
+;setup of constant regs
+   clr   allon
+   dec   allon    ;0xff
+   clr   one
+   inc   one      ;1
+   clr   zero     ;0
+   ldi   a,0b00110000      ;cbus inactive const
+   mov   clear,a
+   ldi   a,0b00100000      ;cbus memory /OE const
+   mov   readmem,a
+   ldi   a,0b00010000      ;cbus memory /WE const
+   mov   writemem,a
+   ldi   oc_tabh,high(oc_tab) ;vector to opcode translation
+
+;setup processor bus
+   rcall rs_IO_ext         ;reset IO extension registers
+   ldi   a,0b100           ;globaly disable pullups
+   out   sfior,a
+   ldi   a,0b0010          ;IRQ=low level, NMI=falling edge
+   out   mcucr,a
+   .ifdef phi2_ena         ;phase 2 output on OC2 (1 MHz)
+      out   tcnt2,zero        ;timer 2 init
+      ldi   a,0x7             ;500µs @ 16MHz
+      out   ocr2,a
+      ldi   a,0b00011001      ;timer 2 ctc, toggle OC2, clock / 1
+      out   tccr2,a
+   .endif
+   
+   sts   rx_fill,zero      ;initialize fifos
+   sts   tx_fill,zero
+   ldi   a,0x11            ;send xon if enabled
+   sts   flow_cmd,a        ;
+   ldi   a,low(cmd_buf)    ;initialize command buffer
+   sts   cmd_inx,a
+   ldi   a,0x80            ;initialize esc timer
+   sts   cmd_esc_timer,a
+   sts   prog_num,allon    ;mark eep as closed
+   ldi   a,low(UBRR_value) ;set Baudrate
+   out   ubrrl,a
+   ldi   a,high(UBRR_value)
+   out   ubrrh,a
+   ldi   a,usart_txi_dis   ;rx,tx, rxcie enable
+   out   ucsrb,a
+   .ifdef irq_dis_real
+      sts   usart_ena,a
+   .endif
+   out   tcnt0,zero        ;timer 0 init
+   ldi   a,ten_ms
+   out   ocr0,a
+   ldi   a,0b00001101      ;timer 0 ctc, clock / 1024
+   out   tccr0,a
+   out   tcnt0,zero
+   ldi   a,0b11            ;t0 compare match interrupt enable
+   out   tifr,a
+   out   timsk,a
+   ldi   flags,(1<<deb_on)|(1<<deb_act)
+   sei
+   rcall crlf
+
+;clearing the emulated machine if power on or brownout
+   in    a,mcucsr             ;borf or porf
+   andi  a,0b101
+   ifne  clear_mem
+      clr   zl                ;clear memory
+      clr   zh
+      out   cbus,clear        ;prepare to write memory
+      out   dbusddr,allon
+      do     memory_clear
+         out   abuslo,zl         ;next address
+         out   abushi,zh
+         out   cbus,writemem     ;WE, ~OE
+         out   dbusout,zero      ;write data
+         out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+         adiw  z,1
+      loopne memory_clear
+      out   dbusddr,zero      ;prepare to read
+      out   cbus,readmem      ;OE / read mode back on
+      ldi   yl,low(brkpt_lo)  ;clear breakpoints
+      ldi   yh,high(brkpt_lo)
+      do       brkpt_reset
+         st    y+,allon
+         cpi   yl,low(brkpt_op)
+      loopne   brkpt_reset
+   else  clear_mem
+      rcall crlf
+      rcall show_regs
+      PrintStr reset_msg      ;"  Reset"
+   end   clear_mem
+
+   rcall soft_reset
+
+   PrintStr emu_msg        ;13,10,"6502 emulator  Vx.xxx"
+   PrintStr built_msg      ;" built ",__DATE__
+
+; load & run on power on
+; if a program is selected for autoload
+   .ifdef eep_vld
+      in    a,mcucsr          ;borf or porf
+      andi  a,0b101
+      ifne  rspo_autoload
+         out   eearh,zero     ;read eep autoload byte
+         out   eearl,allon
+         out   eecr,one
+         in    a,eedr
+         out   eearl,zero     ;protect
+         cpi   a,0xff         ;test autoload program set
+         ifne  reset_autoload
+            sts   prog_num,a
+            rcall eep_load_prog
+            tst   a           ;load O.K.
+            ifeq  eep_load_ok
+               rcall load_reset_vector
+               tst   pch         ;valid PC?
+               ifne  pc_load_ok
+                  in    d,sreg            ;atomic modify receive buffer
+                  cli
+                  ldi   yh,high(rx_buf)   ;setup rx buffer address
+                  ldi   yl,0
+                  mov   c,one             ;string address
+                  do       eep_load_string
+                     out   eearl,c           ;read internal EEPROM
+                     out   eecr,one
+                     in    a,eedr
+                     cpi   a,0xff            ;string end?
+                  exiteq   eep_load_string
+                     cpi   a,92              ;backslash?
+                     ifeq  eep_load_special
+                        inc   c
+                        out   eearl,c           ;read internal EEPROM
+                        out   eecr,one
+                        in    a,eedr
+                        cpi   a,0xff            ;string end?
+                  exiteq   eep_load_string
+                        cpi   a,'r'             ;carriage return?
+                        ifeq  eep_auto_cr
+                           ldi   a,13
+                        end   eep_auto_cr
+                        cpi   a,'q'             ;double quote?
+                        ifeq  eep_auto_quote
+                           ldi   a,34
+                        end   eep_auto_quote
+                     end   eep_load_special
+                     st    y+,a              ;store in rx buffer
+                     inc   c                 ;next EEPROM address
+                  loop     eep_load_string
+                  sts   rx_inx,yl         ;save buffer pointers
+                  sts   rx_fill,yl
+                  out   sreg,d            ;restore interrupt enable
+                  out   eearl,zero        ;protect internal EEPROM
+                  rcall crlf
+                  cli
+                  ldi   flags,(1<<emu_run)   ;run program
+                  in    a,mcucsr          ;HW reset complete
+                  andi  a,0xe0            ;mask out reset flags
+                  out   mcucsr,a          ;clear in mcucsr
+                  rjmp  end_exit
+               else  pc_load_ok
+                  PrintStr rs_vect_empty     ;13,10,"Check reset vector"
+               end   pc_load_ok
+            end   eep_load_ok
+         end   reset_autoload
+      end   rspo_autoload
+   .endif
+   in    a,mcucsr          ;HW reset complete
+   andi  a,0xe0            ;mask out reset flags
+   out   mcucsr,a          ;clear in mcucsr
+;*********************************************************
+;
+; Monitor / Debugger main loop
+;
+;     bypasses buffers/timers when interrupts are disabled
+;     updates/uses timer 0 to discard escape sequences
+;     updates/uses timer 0 to refresh register display
+;     samples input, translates to upper case
+;     allows backspace & escape (erase last/all input)
+;     parses & executes commandline on carriage return
+;
+;*********************************************************
+   ldi   a,10      ;linefeed
+   rcall PrintChr
+   rcall show_regs
+   rcall show_prompt
+
+debugger:      ;entry from t0 cmp match
+   do    debug_main
+      do    deb_wait4input
+; disabled update of esc & showprompt timer
+         ifid_and  deb_timer_update ;disabled timer update 
+         in    yh,tifr
+         sbrs  yh,ocf0
+         ifs       deb_timer_update
+            ldi   yh,0b10           ;clear t1 oc flag
+            out   tifr,yh
+            lds   yl,cmd_esc_timer  ;test escape timer expired
+            andi  yl,0x7f
+            ifne  deb_esc_timer_update
+               lds   yl,cmd_esc_timer
+               dec   yl
+               sts   cmd_esc_timer,yl
+            end   deb_esc_timer_update
+            lds   yl,cmd_reg_timer  ;test register timer expired
+            tst   yl
+            ifne  deb_reg_timer_update
+               dec   yl
+               sts   cmd_reg_timer,yl
+            end   deb_reg_timer_update
+         end       deb_timer_update
+; new line triggered by true <ESC> based on timer
+         lds   yl,cmd_esc_timer ;test escape timer expired
+         tst   yl
+         ifeq  deb_true_esc
+            ldi   yl,0x80           ;flag line cleared
+            sts   cmd_esc_timer,yl
+            cbr   flags,(1<<string) ;enable case translation
+            rcall show_regs         ;redraw registers & prompt
+            rcall show_prompt
+            rcall erase2eol
+            ldi   yh,low(cmd_buf)   ;ready for next command
+            sts   cmd_inx,yh
+         end   deb_true_esc
+; show registers in prompt based on refresh timer
+         lds   yh,cmd_reg_timer
+         tst   yh                ;show register timer expired &
+         ifeq_and deb_show_regs
+         cpi   yl,0x80           ;no active escape sequence
+         ifeq     deb_show_regs
+            sbrs  flags,emu_run
+            ifs   deb_regs_run
+               rcall escape            ;save position - esc7
+               ldi   a,'7'
+               rcall PrintChr
+               rcall show_regs         ;show registers at beginning of line
+               rcall show_prompt
+               rcall escape            ;restore position - esc7
+               ldi   a,'8'
+               rcall PrintChr
+            else  deb_regs_run
+               sts   cmd_reg_timer,allon  ;no changes expected soon
+            end   deb_regs_run
+         end      deb_show_regs
+; read RS232
+         in    d,sreg      ;preserve sreg interrupt enable
+         cli
+         lds   c,rx_fill   ;check buffer
+         tst   c
+         ifne  deb_read_buf
+            lds   yl,rx_inx      ;prepare address to read rx fifo
+            ldi   yh,high(rx_buf)
+            sub   yl,c
+            ld    a,y            ;read
+            dec   c              ;update pointer
+            sts   rx_fill,c
+            .ifdef flowlo
+               mov   i,c
+               cpi   i,flowlo          ;buffer lower watermark?
+               iflo  deb_flow
+                  lds   i,flow_cmd
+                  cpi   i,0x91         ;xon done?
+                  ifne  deb_send_xon
+                     ldi   i,0x11         ;post xon pending
+                     sts   flow_cmd,i
+                     ldi   i,usart_txi_ena ;notify transmitter
+                     out   ucsrb,i
+                     .ifdef irq_dis_real
+                        sts   usart_ena,i
+                     .endif
+                 end  deb_send_xon
+               end   deb_flow
+            .endif
+            out   sreg,d
+            exit  deb_wait4input
+         else  deb_read_buf
+            out   sreg,d
+            ifid_and  deb_read_direct
+            sbis  ucsra,rxc      
+            ifs       deb_read_direct
+               in    a,udr        ;read direct if disabled & buffer empty
+               exit  deb_wait4input
+            else      deb_read_direct
+               sbrc  flags,emu_run     ;allow emulator to run
+               exit  debug_main
+            end       deb_read_direct
+         end   deb_read_buf
+      loop  deb_wait4input
+; process command buffer input
+      lds   yl,cmd_esc_timer
+      andi  yl,0x07f             ;discard esc sequence chars
+      ifne  deb_esc_seq
+         in    d,sreg
+         cli
+         lds   yl,cmd_esc_timer
+         sbr   yl,0b10000000     ;flag esc sequence
+         sts   cmd_esc_timer,yl
+         out   sreg,d
+      else  deb_esc_seq
+         ldi   yh,high(cmd_buf)  ;load command buffer index high
+         lds   yl,cmd_inx
+         cpi   a,0x7f            ;delete?
+         ifeq  deb_del2bs
+            ldi   a,8               ;replace with backspace
+         end   deb_del2bs
+         cpi   a,8               ;backspace?
+         ifeq  deb_bs
+            cpi   yl,low(cmd_buf)   ;prevent underrun
+            ifne   deb_bs_ok
+               rcall PrintChr          ;perform erase
+               rcall space
+               ldi   a,8
+               rcall PrintChr
+               dec   yl
+               ld    a,y               ;deleted character
+               cpi   a,34              ;is quote?
+               ifeq  deb_bs_quote
+                  ldi   a,(1<<string)     ;toggle case translation
+                  eor   flags,a
+               end   deb_bs_quote
+            end   deb_bs_ok
+            ldi   a,0            ;mark non-printable
+         end    deb_bs
+         cpi   a,' '             ;test printable character &
+         ifsh_and deb_echo
+         cpi   yl,cmd_end        ;prevent overrun
+         iflo     deb_echo
+            cpi   a,'a'          ;test for lower case
+            ifsh_and deb_lower_case
+            cpi   a,'z'+1
+            iflo_and deb_lower_case
+            sbrc  flags,string   ;conversion enabled?
+            ifs      deb_lower_case
+               subi  a,0x20          ;convert to upper case
+            end      deb_lower_case
+            rcall PrintChr
+            st    y+,a
+         end      deb_echo
+         sts   cmd_inx,yl
+; <">
+         cpi   a,34              ;test for string input
+         ifeq  deb_string_mark
+            ldi   b,(1<<string)  ;switch case translation
+            eor   flags,b
+         end   deb_string_mark
+; <ESC>
+         cpi   a,27              ;test for escape
+         ifeq  deb_esc
+            ifid  deb_esc_disabled
+               ldi   yh,0b10        ;reset t0 compare match
+               out   tifr,yh        ;if disabled 
+            end   deb_esc_disabled
+            ldi   yh,6              ;further chars within 50-60ms     
+            sts   cmd_esc_timer,yh  ;discarded as esc sequence
+         end   deb_esc
+; <TAB>            
+         cpi   a,9               ;test for tab (step 1 instruction)
+         ifeq_and deb_step
+         sbrc  flags,emu_run     ;must be stopped
+         ifs      deb_step
+            rcall show_regs      ;show command to be executed
+            movw  y,pch:pcl
+            rcall disasm
+            .ifndef cmos_core
+               cpi   b,7            ;invalid opcode?
+               ifeq  deb_step_inv
+                  rjmp  end_command
+               end   deb_step_inv
+            .endif
+            cli                  ;force t0 overflow at end of instruction
+            out   tcnt0,allon    ;overflow next count
+            ldi   a,0b00001001   ;timer 0 ctc, clock / 1
+            out   tccr0,a
+            ldi   a,0b00001101   ;timer 0 ctc, clock / 1024
+            out   tccr0,a
+            rjmp  emu_start      ;executes also breakpointed opcodes
+         end      deb_step
+; <CR>
+         cpi   a,13              ;test for carriage return
+         ifeq_far deb_cr
+            cpi   yl,low(cmd_buf)   ;test empty commandline
+            ifeq  deb_empty
+               ld    a,y               ;test for previous M or D
+               cpi   a,'M'
+               ifeq_or  deb_shortcut
+               cpi   a,'D'
+               ifeq     deb_shortcut
+                  PrintStr back_line      ;seamless output
+                  adiw  y,1               ;keep M or D
+                  ldi   a,'+'
+                  st    y+,a
+               end      deb_shortcut
+            end   deb_empty
+            st    y,zero            ;mark end of commandline
+            cbr   flags,(1<<string) ;enable case translation
+;**************************************************
+;
+; parsing & executing commandline
+;
+;************************************************** 
+            in    a,spl             ;save sp - allows sub to exit
+            sts   sp_save,a
+            in    a,sph
+            sts   sp_save+1,a
+            ldi   yl,low(cmd_buf)   ;ready to parse command
+            sts   cmd_inx,yl        ;reset next commandline
+            ld    a,y+
+;
+; A = alter register   Syntax:Arbb<CR>|APwwww<CR>
+;     r    = register A X Y P S F
+;            accu indexX indexY PC SP flags(proc.status)
+;     bb   = hex byte of data
+;     wwww = hex word of data, leading zeroes can be omitted
+;
+            cpi   a,'A'
+            ifeq  alter_reg
+               ld    a,y+      ;get register
+;alter accumulator
+               cpi   a,'A'     ;accumulator
+               ifeq  alter_rega
+                  rcall get_byte
+                  mov   rega,a
+                  rjmp  end_command
+               end   alter_rega
+;alter X index register
+               cpi   a,'X'     ;index register X
+               ifeq  alter_regx
+                  rcall get_byte
+                  mov   regx,a
+                  rjmp  end_command
+               end   alter_regx
+;alter Y index register
+               cpi   a,'Y'     ;index register Y
+               ifeq  alter_regy
+                  rcall get_byte
+                  mov   regy,a
+                  rjmp  end_command
+               end   alter_regy
+;alter stack pointer
+               cpi   a,'S'     ;stack pointer
+               ifeq  alter_spointer
+                  rcall get_byte
+                  mov   spointer,a
+                  rjmp  end_command
+               end   alter_spointer
+;alter flags (prcocessor status)
+               cpi   a,'F'     ;flags = processor status
+               ifeq  alter_status
+                  rcall get_byte
+                  mov   stat2,a
+                  mov   stat,stat2        ;restore AVR format
+                  andi  stat,0b11         ;------ZC
+                  bst   stat2,7           ;>---->
+                  bld   stat,2            ;-----N--
+                  ori   stat2,0b0100000   ;  1      (always 1)
+                  andi  stat2,0b1101100   ;-V1BDI-- (Break cleared)
+                  rjmp  end_command
+               end   alter_status
+;alter program counter
+               cpi   a,'P'     ;program counter
+               ifeq  alter_pc
+                  rcall get_adr
+                  movw  pch:pcl,z
+                  rjmp  end_command
+               end   alter_pc
+               rjmp  invalid_command
+            end   alter_reg
+;
+; B = breakpoint utility
+;     BI<cr>      = information - list active breakpoints by slot number
+;     BSaaaa<cr>  = set breakpoint at address aaaa, leading zeros can be omitted
+;     BC#<cr>     = clear breakpoint slot #, #=0-9, #=A for all
+;
+            cpi   a,'B'
+            ifeq_far br_util
+               ld    a,y+              
+               cpi   a,'I'
+               ifeq  br_info
+                  ld    a,y+           ;check validity (no parms)
+                  cpse  a,zero
+                  rjmp  invalid_command
+                  rcall brkpt_info
+                  rjmp  end_command
+               end   br_info
+               cpi   a,'S'
+               ifeq  br_set
+                  rcall get_adr
+                  ldi   yl,low(brkpt_lo)  ;address already set?
+                  ldi   yh,high(brkpt_lo)
+                  do       br_set_already
+                     ld    a,y+
+                     cp    a,zl
+                     ifeq_and br_already_set
+                     ldd   a,y+9
+                     cp    a,zh
+                     ifeq     br_already_set
+                        rcall brkpt_info
+                        rjmp  end_command
+                     end      br_already_set
+                     cpi   yl,low(brkpt_hi)
+                  loopne   br_set_already
+                  ldi   yl,low(brkpt_lo)  ;free slot?
+                  do       br_set_free
+                     ld    a,y+
+                     cp    a,allon
+                     ifeq_and br_set_slot
+                     ldd   a,y+9
+                     cp    a,allon
+                     ifeq     br_set_slot
+                        sbiw  y,1
+                        st    y,zl              ;set new breakpoint address
+                        std   y+10,zh
+                        out   abuslo,zl         ;fetch original opcode
+                        out   abushi,zh
+                        wait_data_valid 0       ;0ns minimum @ 16MHz
+                        in    a,dbusin
+                        std   y+20,a            ;set original opcode
+                        ldi   a,0xdb            ;replace with STP opcode
+                        out   cbus,writemem     ;WE, ~OE
+                        out   dbusout,a         ;precharge write
+                        out   dbusddr,allon     ;dbus = output
+                        out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+                        out   dbusddr,zero      ;dbus = input
+                        out   cbus,readmem      ;OE / read mode back on
+                        rcall brkpt_info
+                        rjmp  end_command
+                     end      br_set_slot
+                     cpi   yl,low(brkpt_hi)
+                  loopne   br_set_free
+                  PrintStr bpt_slot_full  ;10,13,"No more breakpoint slots available"
+                  rcall brkpt_info
+                  rjmp  end_command
+               end   br_set
+               cpi   a,'C'
+               ifeq  br_clr         ;get slot# or all
+                  do     br_clr_parse
+                     ld    a,y+
+                     tst   a              ;premature end of input
+                     breq  br_inv_cmd
+                     cpi   a,32           ;skip blanks
+                  loopeq br_clr_parse
+                  ld    c,y+           ;check validity (1 parameter)
+                  cpse  c,zero
+                  rjmp  invalid_command
+                  sbiw  y,1
+                  cpi   a,'A'
+                  ifeq  br_clr_all
+                     rcall brkpt_clr_all
+                     tst   c
+                     ifeq  br_clr_none_msg
+                        PrintStr bpt_info_none  ;10,13,"No breakpoints active"
+                     end   br_clr_none_msg
+                     rjmp  end_command
+                  end   br_clr_all
+                  subi  a,'0'           ;0-9?
+                  cpi   a,10
+                  iflo  br_clr_slot
+                     ldi   yl,low(brkpt_lo)  ;select breakpoint
+                     add   yl,a
+                     ldi   yh,high(brkpt_lo)
+                     adc   yh,zero
+                     rcall brkpt_clr_one
+                     rcall brkpt_info
+                     rjmp  end_command
+                  end   br_clr_slot
+               end   br_clr
+br_inv_cmd:    rjmp  invalid_command
+            end      br_util
+
+
+;
+; D = disassemble memory   Syntax: D(aaaa|+)<CR>
+;     aaaa = address, leading zeros can be omitted
+;     + = next, disassembles 20 instructions
+;
+            cpi   a,'D'
+            ifeq  show_disasm
+               ld    a,y+              
+               cpi   a,'+'
+               ifeq  dis_next
+                  ld    a,y+           ;no parameter after +
+                  cpse  a,zero
+                  rjmp  invalid_command
+                  lds   yl,lmem_disas     ;load previous address
+                  lds   yh,lmem_disas+1
+               else   dis_next
+                  sbiw  y,1               ;allow immediate hex
+                  rcall get_adr           ;get Address
+                  movw  y,z
+               end   dis_next
+               ldi   a,10              ;count
+               sbrc  flags,emu_run
+                  ldi   a,6               ;reduce count if running
+               do     dis_loop
+                  push  a
+                  rcall crlf
+                  mov   a,yh              ;show address
+                  rcall PrintHex
+                  mov   a,yl
+                  rcall PrintHex
+                  rcall space
+                  rcall disasm
+                  pop   a
+                  dec   a
+               loopne dis_loop            
+               sts   lmem_disas,yl     ;load previous address
+               sts   lmem_disas+1,yh
+               rjmp  end_command
+            end   show_disasm
+            .ifdef   eep_vld
+;
+; E = I2C EEPROM non volatile program storage utility
+;     EI<cr>   = information on programs stored and free slots
+;     ESpp<cr> = save program from RS232 input to EEPROM
+;     ELpp<cr> = load program from EEPROM to RAM
+;     EDpp<cr> = delete program in EEPROM
+;     EApp"C\rLOAD $xx\rRUN\r"<cr>
+;              = autoload program, send string on power on
+;                either parameter may be omitted
+;                FF = no autoload, "" (empty string) = send nothing
+;       pp     = program number 00 - FE
+;
+               cpi   a,'E'
+               ifeq_far eep_util
+                  ld    a,y+
+;EEPROM information
+                  cpi   a,'I'
+                  ifeq  eep_info
+                     ld    a,y+           ;check validity (no parms)
+                     cpse  a,zero
+                     rjmp  invalid_command
+                     rcall eep_auto_info
+                     rcall eep_cmd_info
+                     rjmp  end_command
+                  end   eep_info
+;EEPROM save
+                  cpi   a,'S'
+                  ifeq_far eep_save
+                     rcall get_byte          ;get prog#
+                     cpi   a,0xff
+                     ifeq  eep_save_inv_cmd
+                        rjmp  invalid_command
+                     end   eep_save_inv_cmd
+                     sts   prog_num,a
+                     rcall eep_open
+                     ldi   yl,0              ;initial slot allocation
+                     ldi   yh,0
+                     out   eearh,one         ;upper bytes in internal EEPROM
+                     PrintStr save_wait      ;13,10,"Saving, <ESC> to abort",13,10
+                     do    eep_save_record
+                        do     eep_wait_colon    ;wait for start of record
+                           rcall read_serial_esc
+                           cpi   a,':'
+                        loopne eep_wait_colon
+                        clr   xh             ;checksum
+                        rcall read_byte_esc  ;read & save count
+                        mov   xl,a
+                        rcall eep_write
+                        ldi   a,13
+                        rcall PrintChr
+                        rcall read_byte_esc  ;read  address high
+                        tst   xl             ;count 0?
+                        ifne  eep_save_adr   ;show & save address for count >0
+                           rcall eep_prsv       ;address high, read next
+                           rcall eep_prsv       ;address low, read function
+                           cpi   a,0            ;load function?
+                           ifeq  eep_save_data
+                              do     eep_save_data_loop
+                                 rcall read_byte_esc     ;read & save data
+                                 rcall eep_write
+                                 dec   xl
+                              loopne eep_save_data_loop
+                              rcall read_byte_esc     ;test checksum
+                              tst   xh
+                              ifne  eep_save_error_checksum
+                                 PrintStr err_chksum     ;" Checksum failed"
+                                 rjmp  eep_write_err
+                              end   eep_save_error_checksum
+                           else  eep_save_data
+                              PrintStr err_func       ;" Invalid function or count in record"
+                              rjmp  eep_write_err
+                           end   eep_save_data
+                        else  eep_save_adr      ;show & save PC
+                           rcall eep_prsv          ;PCH, read next
+                           rcall eep_prsv          ;PCL, read function
+                           cpi   a,1               ;end of record function?
+                           ifeq  eep_save_complete
+                              PrintStr save_ok        ;13,"Save OK"
+                              rjmp  eep_write_close
+                           else  eep_save_complete
+                              PrintStr err_func       ;" Invalid function or count in record"
+                              rjmp  eep_write_err
+                           end   eep_save_complete
+                        end  eep_save_adr
+                     loop  eep_save_record
+eep_prsv:            ; Output to RS232 & EEP
+                     push  a
+                     rcall PrintHex       ;show address
+                     pop   a
+                     rcall eep_write      ;save address
+                     rjmp  read_byte_esc  ;get next byte
+                  end      eep_save
+;EEPROM load
+                  cpi   a,'L'
+                  ifeq  eep_load
+                     rcall get_byte
+                     cpi   a,0xff
+                     breq  eep_inv_cmd
+                     sts   prog_num,a
+                     rcall brkpt_clr_all  ;clear all breakpoints
+                     rcall eep_load_prog
+                     rjmp  end_command
+eep_inv_cmd:         rjmp  invalid_command
+                  end   eep_load
+;EEPROM delete
+                  cpi   a,'D'
+                  ifeq  eep_del
+                     rcall get_byte
+                     cpi   a,0xff
+                     breq  eep_inv_cmd
+                     clr   c              ;loopcount 256 slots
+                     clr   b              ;slotcount
+                     out   eearh,one
+                     do       eep_del_loop
+                        out   eearl,c        ;find prog#
+                        out   eecr,one
+                        in    d,eedr
+                        cp    d,a
+                        ifeq  eep_del_slot
+                           out   eedr,allon     ;mark free
+                           in    d,sreg         ;atomic write sequence
+                           cli
+                           sbi   eecr,eemwe
+                           sbi   eecr,eewe
+                           out   sreg,d
+                           inc   b              ;count slots
+                           do    eep_del_wait   ;write complete?
+                              sbic  eecr,eewe
+                           loop  eep_del_wait
+                        end   eep_del_slot
+                        inc   c              ;all slots done?
+                     loopne   eep_del_loop
+                     out   eearl,zero        ;set to unused address
+                     out   eearh,zero
+                     tst   b              ;count?
+                     ifne  eep_del_free
+                        rcall crlf    
+                        mov   a,b
+                        rcall PrintHex          ;slotcount
+                        PrintStr eep_info3      ;" slots free"
+                        ldi   a,'d'
+                        rcall PrintChr
+                     else  eep_del_free
+                        mov   b,a
+                        PrintStr eep_prog       ;10,13,"Program "
+                        mov   a,b
+                        rcall PrintHex          ;prog#
+                        PrintStr eep_notfound   ;" not found"
+                     end   eep_del_free
+                     rjmp  end_command
+                  end   eep_del
+;EEPROM autoload
+                  cpi   a,'A'
+                  ifeq  eep_autoload
+                     out   eearh,zero     ;write eep lower page
+                     do       eep_auto_parse
+                        ld    a,y+
+                        tst   a              ;end of input
+                        breq  eep_inv_cmd    ;needs at least 1 parameter
+                        cpi   a,' '          ;skip blanks
+                     loopeq   eep_auto_parse
+                     cpi   a,34           ;begin of string
+                     ifne  eep_auto_number
+                        rcall get_wbyte
+                        out   eearl,allon
+                        rcall eep_auto_write
+                        do       eep_auto_parse2
+                           ld    a,y+
+                           cpi   a,' '          ;skip blanks
+                        loopeq   eep_auto_parse2
+                     end   eep_auto_number
+                     tst   a              ;end of input
+                     ifne  eep_auto_next
+                        cpi   a,34
+                        brne  eep_auto_invalid  ;only valid input is string
+                        ldi   b,eep_string
+                        do       eep_auto_string
+                           ld    a,y+
+                           tst   a              ;end of command?
+                           ifeq_or  eep_string_end
+                           cpi   a,34           ;closing quotes
+                           ifeq     eep_string_end
+                              ldi   a,0xff      ;end of string marker
+                           end      eep_string_end
+                           out   eearl,b
+                           rcall eep_auto_write
+                           inc   b              ;next EEPROM address
+                           cpi   a,0xff         ;end marker?
+                        loopne   eep_auto_string
+                     end   eep_auto_next
+                     rcall eep_auto_info
+                     out   eearl,zero     ;protect eep from unintentional writes
+                     rjmp  end_command
+eep_auto_invalid:    rjmp  invalid_command
+                  end   eep_autoload
+               end      eep_util
+            .endif
+;        
+; M = show memory   Syntax: M(aaaa|+|-|)<CR>
+;     aaaa = address, leading zeros can be omitted
+;     + = next block, - = previous block, <CR> = same block 
+;     displays 0x100 (0x40) Bytes at full line address
+;
+            cpi   a,'M'   
+            ifeq_far show_mem
+               out   cbus,readmem      ;prepare to read
+               lds   zl,lmem_display   ;load previous address
+               lds   zh,lmem_display+1
+               ld    a,y+              
+               tst   a                 ;no address - show same
+               breq  skip_get_adr
+               cpi   a,'+'
+               ifeq  show_next
+                  sbrc  flags,emu_run
+                  ifs   show_nxt_100
+                     inc   zh
+                  else  show_nxt_100
+                     addiw  z,0x40        ;reduce bytes if running
+                  end   show_nxt_100
+                  ld    a,y+           ;no parameter after +
+                  tst   a
+                  breq  skip_get_adr
+                  rjmp  invalid_command
+               end   show_next
+               cpi   a,'-'
+               ifeq  show_previous
+                  sbrc  flags,emu_run
+                  ifs   show_prev_100
+                     dec   zh
+                  else  show_prev_100
+                     subi  zl,0x40        ;reduce bytes if running
+                     sbc   zh,zero
+                  end   show_prev_100
+                  mov   d,a
+                  ld    a,y+           ;no parameter after -
+                  tst   a
+                  breq  skip_get_adr
+                  rjmp  invalid_command
+               end   show_previous
+               sbiw  y,1            ;allow immediate hex
+               rcall get_adr        ;get Address
+skip_get_adr:
+               andi  zl,0xe0        ;mask full lines only
+               mov   a,zl
+               sbrc  flags,emu_run
+                  addi  a,0x40         ;reduce bytes if running
+               mov   d,a
+               sts   lmem_display,zl
+               sts   lmem_display+1,zh
+               do    show_mem_line
+                  rcall crlf
+                  mov   a,zh           ;show address
+                  rcall PrintHex
+                  mov   a,zl
+                  rcall PrintHex
+                  rcall colon            
+                  do     show_mem_data      
+                     out   abuslo,zl      ;memory fetch
+                     out   abushi,zh
+                     clt                  ;clear reverse video
+                     wait_data_valid 1    ;60ns minimum @ 16MHz
+                     in    a,dbusin
+                     cpi   a,0xdb         ;is potential breakpoint?
+                     ifeq  show_mem_brk
+                        rcall brkpt_chk
+                     end   show_mem_brk
+                     rcall RevHex
+                     adiw  z,1
+                     ldi   a,3            ;seperate words with spaces
+                     and   a,zl
+                  loopne show_mem_data
+                     rcall space
+                     ldi   a,31           ;new line after 32 bytes              
+                     and   a,zl
+                  loopne show_mem_data
+                  cp    zl,d           ;0x100 bytes displayed?
+               loopne show_mem_line
+               rjmp  end_command
+            end   show_mem
+;
+; W = Write memory   Syntax: W(aaaa|+) bb..bb<CR>
+;     aaaa = address, leading zeros can be omitted
+;     + = write next byte(s)
+;     bb = bytes of data, may be separated with spaces
+;
+            cpi   a,'W'
+            ifeq  write_mem
+               ld    a,y+              
+               cpi   a,'+'
+               ifeq  write_next
+                  lds   zl,lmem_write     ;load previous next address
+                  lds   zh,lmem_write+1
+               else  write_next
+                  sbiw  y,1               ;allow immediate hex
+                  rcall get_wadr          ;get write address
+                  sts   lmem_display,zl   ;save for next display
+                  sts   lmem_display+1,zh
+               end   write_next
+               mov   d,yl
+               do    write_mem_dryrun  ;syntax check before write
+                  ld    a,y+
+                  tst   a                 ;end of write
+                  exiteq write_mem_dryrun
+               cpi   a,32              ;skip space
+               loopeq write_mem_dryrun
+                  rcall get_wbyte         ;get data
+               loop  write_mem_dryrun
+               mov   yl,d
+               out   cbus,clear        ;readmode off
+               out   dbusddr,allon     ;dbus = output
+               do    write_mem_realrun  ;real write
+                  ld    a,y+
+                  tst   a                 ;end of write
+                  exiteq write_mem_realrun
+               cpi   a,32              ;skip space
+               loopeq write_mem_realrun
+                  rcall get_wbyte         ;get data
+                  rcall brkpt_chk_write   ;check write to breakpoint
+                  out   abuslo,zl 
+                  out   abushi,zh
+                  out   cbus,writemem     ;WE, ~OE
+                  out   dbusout,a         ;dbus write
+                  adiw  z,1
+                  out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+               loop  write_mem_realrun      
+               out   dbusddr,zero      ;dbus = input
+               out   cbus,readmem      ;OE / read mode back on
+               sts   lmem_write,zl
+               sts   lmem_write+1,zh
+               rjmp  end_command
+            end   write_mem
+;
+; L = Load Intel Hex Record   Syntax: L<CR>
+;     loads records to memory, <ESC> to abort
+;
+            cpi   a,'L'
+            ifeq_far load_mem
+               ld    a,y+           ;check validity (no parms)
+               cpse  a,zero
+               rjmp  invalid_command
+               cbr   flags,(1<<emu_run) ;force emulator halted  
+               rcall brkpt_clr_all  ;clear all breakpoints
+               PrintStr load_wait
+               do    load_mem_record
+                  do     wait_colon    ;wait for start of record
+                     rcall read_serial_esc
+                     cpi   a,':'
+                  loopne wait_colon
+                  clr   xh             ;checksum
+                  rcall read_byte_esc  ;read count
+                  mov   xl,a
+                  ldi   a,13
+                  rcall PrintChr
+                  rcall read_byte_esc  ;read address - big endian
+                  mov   zh,a
+                  rcall PrintHex
+                  rcall read_byte_esc
+                  mov   zl,a
+                  rcall PrintHex
+                  rcall read_byte_esc  ;read function
+                  cpi   a,0            ;load function
+                  ifeq_and load_mem_data
+                  tst   xl             ;count > 0
+                  ifne     load_mem_data
+                     out   cbus,clear        ;readmode off
+                     out   dbusddr,allon     ;dbus = output
+                     do     load_data
+                        rcall read_byte_esc     ;read data
+                        out   abuslo,zl 
+                        out   abushi,zh
+                        out   cbus,writemem     ;WE, ~OE
+                        out   dbusout,a         ;dbus write
+                        adiw  z,1
+                        out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+                        dec   xl
+                     loopne load_data
+                     out   dbusddr,zero      ;dbus = input
+                     out   cbus,readmem      ;OE / read mode back on
+                     rcall read_byte_esc     ;read checksum
+                     tst   xh
+                     ifne  load_error_checksum
+                        PrintStr err_chksum     ;" Checksum failed"
+                        rjmp  discard_serial_stream
+                     end   load_error_checksum
+                  else     load_mem_data
+                     cpi   a,1               ;end of record function
+                     ifeq  load_complete
+                        tst   zh                ;address is valid PC?
+                        ifne  load_pc
+                           movw  pcl:pch,z         ;set PC
+                        end   load_pc
+                        PrintStr load_ok        ;13,"Load OK"
+                        rjmp  discard_serial_stream   ;OK message - wait for eol
+                     else  load_complete
+                        PrintStr err_func       ;" Invalid function or count in record"
+                        rjmp  discard_serial_stream
+                     end   load_complete
+                  end      load_mem_data
+               loop  load_mem_record
+               rjmp  end_command
+            end      load_mem
+;
+; H = Halt Emulator execution   Syntax: H<CR>
+;
+            cpi   a,'H'
+            ifeq  halt_emu
+               ld    a,y+           ;check validity (no parms)
+               cpse  a,zero
+               rjmp  invalid_command
+               cbr   flags,(1<<emu_run)   
+               rjmp  end_command
+            end   halt_emu
+;
+; G = Go/Start Emulator execution   Syntax: G<CR>
+;
+            cpi   a,'G'
+            ifeq  start_emu
+               ld    a,y+           ;check validity (no parms)
+               cpse  a,zero
+               rjmp  invalid_command
+               ldi   yl,low(cmd_buf)
+               sts   cmd_inx,yl
+               ldi   a,10        ;linefeed
+               rcall PrintChr
+               rcall show_regs
+               sbr   flags,(1<<emu_run)   
+               rcall show_prompt
+               cli                        ;debug instance exiting
+               cbr   flags,(1<<deb_act)   ;allow t0 to call again
+emu_start:
+               out   abuslo,pcl        ;opcode fetch - no interrupts
+               out   abushi,pch
+                     ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+                     IRQ_restore             ;enable NMI, IRQ if allowed
+               wait_data_valid 5       ;300ns minimum @ 16MHz
+               in    opcode,dbusin
+               cpi   opcode,0xdb       ;potential breakpoint?
+               ifeq  emu_start_brk
+                  rcall brkpt_chk_pc      ;get original opcode
+               end   emu_start_brk
+               adiw  pch:pcl,1         ;pc -> op low
+               out   abuslo,pcl        ;operand address low prefetch
+               out   abushi,pch
+               wait_data_valid 5       ;300ns minimum @ 16MHz 
+                     adiw  pch:pcl,1         ;pc -> op high
+                     ijmp                    ;execute opcode
+            end   start_emu
+;
+; X = Exit Debugger / start Emulator execution   Syntax: X<CR>
+;
+            cpi   a,'X'
+            ifeq  exit_deb
+               ld    a,y+           ;check validity (no parms)
+               cpse  a,zero
+               rjmp  invalid_command
+               rcall crlf   
+               cli
+               ldi   flags,(1<<emu_run)   ;clear all other flags
+               rjmp  emu_start
+            end   exit_deb
+;
+; R = Reset emulation registers & set PC to reset vector   Syntax: R<CR>
+;
+            cpi   a,'R'
+            ifeq  deb_reset
+               ld    a,y+           ;check validity (no parms)
+               cpse  a,zero
+               rjmp  invalid_command
+               rcall soft_reset
+               rjmp  end_command
+            end   deb_reset
+
+;**************************************************
+;
+; end parsing & executing commandline
+;
+;************************************************** 
+ 
+; Invalid command
+
+invalid_command:
+            sbiw  y,1               ;caused by?
+            ld    a,y
+            cpse  a,zero            ;end of line?
+            adiw  y,1               ;last character not eol
+            ldi   a,'?'             ;mark invalid commannd
+            st    y,a
+            ldi   yl,low(cmd_buf)
+            rcall show_regs
+            rcall show_prompt
+            do    deb_invalid
+               ld    a,y+
+               rcall PrintChr
+               cpi   a,34              ;test for string input
+               ifeq  inv_string_mark
+                  ldi   b,(1<<string)  ;switch case translation
+                  eor   flags,b
+               end   inv_string_mark
+               cpi   a,'?'
+            loopne   deb_invalid
+            sts   cmd_inx,yl
+            rcall erase2eol         ;esc[K - clear rest of line
+         
+            rjmp  debug_main        ;loop with invalid command
+            
+; Valid command            
+            
+end_command:                  ;new prompt
+            ldi   yl,low(cmd_buf)
+            sts   cmd_inx,yl
+            ldi   a,10        ;linefeed
+            rcall PrintChr
+            rcall show_regs
+            rcall show_prompt
+         end      deb_cr
+      end   deb_esc_seq
+   loop  debug_main
+   cli                        ;debug instance exiting
+   cbr   flags,(1<<deb_act)   ;allow t0 to call again
+end_exit:
+   ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+   IRQ_restore                ;allow NMI, IRQ only if allowed
+   op_decode                  ;start processing
+ 
+;*****************************************************************
+;
+; debugger/monitor output to terminal
+;
+;*****************************************************************
+
+; Hex Output to RS232, reverse video if T flag
+RevHex:     push  a
+            swap  a
+            rcall revx_dgt
+            pop   a
+revx_dgt:   andi  a,0x0f
+            addi  a,'0'           ;ASCII "0-9"
+            cpi   a,'9'+1         ;ASCII "A-F"
+            brlo  RevChr
+            addi  a,7
+
+RevChr:     brtc  PrintChr          ;print character reverse video if t set
+            sbrc  flags,rvs_vid
+            ifs   rvs_video_off
+               sbr   flags,(1<<rvs_vid)
+               push  a
+               rcall esc91             ;ESC[7m - reverse video character on
+               ldi   a,'7'
+               rcall prtc
+               ldi   a,'m'
+               rcall prtc
+               pop   a                 ;print saved character
+            end   rvs_video_off
+            rjmp  prtc
+
+erase2eol:  rcall esc91             ;ESC[K - clear rest of line
+            ldi   a,'K'
+            rjmp  prtc
+
+esc91:      rcall escape            ;ESC[
+            ldi   a,91
+            rjmp  prtc
+
+escape:     ldi   a,27              ;ESC
+            rjmp  prtc
+
+space:      ldi   a,0x20            ;print space
+            rjmp  PrintChr
+
+colon:      ldi   a,0x3a
+            rjmp  PrintChr
+
+crlf:       ldi   a,10              ;print carriage return, linefeed
+            rcall PrintChr
+            ldi   a,13
+            rjmp  PrintChr
+
+; Print String (called by PrintStr Macro)
+prtstr:
+   do    print_string
+      lpm   a,z+
+      tst   a
+      exiteq print_string
+      rcall PrintChr
+   loop  print_string
+   ret
+
+; Hex Output to RS232
+PrintHex:   push  a
+            swap  a
+            rcall prtx_dgt
+            pop   a
+prtx_dgt:   andi  a,0x0f
+            addi  a,'0'           ;ASCII "0-9"
+            cpi   a,'9'+1         ;ASCII "A-F"
+            brlo  PrintChr
+            addi  a,7
+
+; Character output to RS232
+PrintChr:
+   sbrs  flags,rvs_vid
+   ifs   reverse_video_off
+      push  a
+      cbr   flags,(1<<rvs_vid)
+      rcall esc91             ;ESC[m - character video attributes off
+      ldi   a,'m'
+      rcall prtc
+      pop   a
+   end   reverse_video_off
+prtc:                   ;bypass of rvs video mode check
+      push  yl
+      push  yh
+   ifie  prt_fifo       ;fifo only when enabled
+      push  c
+      lds   yl,tx_inx      ;load buffer pointer
+      ldi   yh,high(tx_buf)
+      do     prt_fifo_full    ;wait for space in fifo
+         lds   c,tx_fill
+         inc   c              ;check for overflow
+      loopeq prt_fifo_full
+      cli
+      lds   c,tx_fill
+      ldi   i,usart_txi_ena   ;notify transmitter
+      out   ucsrb,i
+      .ifdef irq_dis_real
+         sts   usart_ena,i
+      .endif
+      st    y+,a           ;store in fifo
+      inc   c              ;update pointers
+      sts   tx_inx,yl
+      sts   tx_fill,c
+      sei
+      pop   c
+   else  prt_fifo 
+      lds   k,tx_fill         ;empty buffer before printing direct?
+      do       prt_fifo_disabled
+         tst   k
+      exiteq   prt_fifo_disabled
+         ldi   yh,high(tx_buf)
+         lds   yl,tx_inx         ;calc output index
+         sub   yl,k
+         ld    i,y               ;load from fifo head
+         do    prt_fifo_wait_udre
+            sbis  ucsra,udre
+         loop  prt_fifo_wait_udre
+         out   udr,i
+         dec   k                 ;update pointer
+      loop     prt_fifo_disabled
+      sts   tx_fill,k         ;buffer now empty
+      ldi   i,usart_txi_dis   ;stop rupt
+      out   ucsrb,i
+      .ifdef irq_dis_real
+         sts   usart_ena,i
+      .endif
+      do    prt_wait_udre     ;direct output
+         sbis  ucsra,udre
+      loop  prt_wait_udre
+      out   udr,a
+   end   prt_fifo
+   pop   yh
+   pop   yl
+   ret
+
+;*****************************************************************
+;
+; Soft Reset
+;     clears pending interrupts, emulated registers & status
+;     loads reset vector to PC
+;
+;*****************************************************************
+
+soft_reset:
+   sts   irq_mask,zero     ;disable all internal IRQ
+   sts   irq_flag,zero
+   cbi   cbusddr,3
+   sbrc  flags,deb_on      ;acia connected?
+   ifs   sr_chk_tdre
+      ldi   a,tx_fill      ;tx buffer full?
+      inc   a
+      ifne  sr_set_tdre
+         ldi   a,0b10000000   ;set tx buffer empty
+         sts   irq_flag,a
+      end   sr_set_tdre
+   end   sr_chk_tdre
+   .ifdef   iomap
+      call  io_reset             ;reset IO
+      ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+   .endif
+   sts   selftest,zero     ;clear diag forced interrupts
+   .ifdef  nmi_ena
+      ldi   a,0b11110000      ;Memory R/W signals + IO-select 1-2
+   .else
+      ldi   a,0b11110100      ;Memory R/W signals + IO-select 1-3
+   .endif
+   out   cbusddr,a
+   ldi   a,0xc0            ;clear pending int0, int1 (NMI, IRQ)
+   out   gifr,a
+   sts   dma_last_cmd,allon   ;dma setup required
+   clr   rega              ;clear registers
+   clr   regx
+   clr   regy
+   mov   spointer,allon
+   clr   stat
+   ldi   stat2,0b00100100  ;B=0, D=0, I=1
+load_reset_vector:
+   ldi   oplow,low(0xfffc) ;reset vector
+   ldi   ophigh,high(0xfffc)
+   out   abuslo,oplow      ;indirect address low prefetch
+   out   abushi,ophigh
+   wait_data_valid 1       ;60ns minimum @ 16MHz 
+         adiw  opointer,1  ;pc -> adr high
+   in    pcl,dbusin        ;save low pointer to pc     
+   out   abuslo,oplow      ;fetch high pointer to pc
+   wait_data_valid 0       ;0ns minimum @ 16MHz
+   in    pch,dbusin        ;point to new pc
+   ret
+;*****************************************************************
+;
+; show 6502 registers
+;
+;     shows register, sets refresh to 500ms
+;     output: 1ss pppp aa Xxx Yyy ffffffff r>
+;     ss = stack pointer, pppp = program counter, aa = accumulator
+;     xx = Index X, yy = Index Y, ffffffff = bitwise processor status
+;     r  = runmode                           (1 = reverse video)
+;
+;*****************************************************************
+
+show_regs:
+   ldi   a,50            ;refresh timer 500ms (50 * 10)
+   sts   cmd_reg_timer,a
+   ldi   a,13            ;return
+   rcall PrintChr
+   ldi   a,'1'           ;stackpointer
+   rcall PrintChr
+   mov   a,spointer
+   rcall PrintHex
+   rcall space
+   sbrs  flags,emu_run
+   ifs   show_reg_run   ;show breakpoint if halted
+      clt
+   else  show_reg_run
+      rcall brkpt_chk_pc
+   end   show_reg_run
+   mov   a,pch           ;program counter
+   rcall RevHex
+   mov   a,pcl
+   rcall RevHex
+   rcall space
+   mov   a,rega          ;accumulator
+   rcall PrintHex
+   rcall space
+   ldi   a,'x'           ;index register X
+   rcall PrintChr
+   mov   a,regx
+   rcall PrintHex
+   rcall space
+   ldi   a,'y'           ;index register y
+   rcall PrintChr
+   mov   a,regy
+   rcall PrintHex
+   rcall space   
+   ldi   a,'N'           ;processor status
+   bst   stat,2
+   rcall RevChr
+   ldi   a,'V'
+   bst   stat2,6
+   rcall RevChr
+   ldi   a,'-'           ;don´t care
+   rcall PrintChr
+   ldi   a,'B'           ;only on stack
+   rcall PrintChr
+   ldi   a,'D'
+   bst   stat2,3
+   rcall RevChr
+   ldi   a,'I'
+   bst   stat2,2
+   rcall RevChr
+   ldi   a,'Z'
+   bst   stat,1
+   rcall RevChr
+   ldi   a,'C'
+   bst   stat,0
+   rcall RevChr
+   rjmp  space
+
+show_prompt:
+   sbrs  flags,emu_run
+   ifs   show_runmode
+      ldi   a,'G'          ;go / running
+   else  show_runmode
+      ldi   a,'H'          ;halted / stopped
+   end   show_runmode
+   rcall PrintChr
+   ldi   a,'>'
+   rjmp  PrintChr
+
+;*****************************************************************
+;
+; disassemble instruction
+;
+;     expects addresss in y
+;     returns b = 7 if invalid instruction
+;     uses a c d z
+;
+;*****************************************************************
+
+disasm:
+   out   abuslo,yl         ;memory fetch
+   out   abushi,yh
+   clr   d                 ;load index to opcode table
+   clt                     ;clear reverse video
+   movw  z,y
+   wait_data_valid 3       ;180ns minimum @ 16MHz
+   in    a,dbusin
+   cpi   a,0xdb            ;is potential breakpoint?
+   ifeq  show_dis_brk
+      rcall brkpt_chk
+      movw  y,z
+   end   show_dis_brk
+   mov   c,a               ;opcode
+   adiw  y,1               ;next byte
+   lsl   c                 ;*4 / each entry 4 bytes
+   rol   d
+   lsl   c
+   rol   d
+   ldi   zl,low(dis_opcode<<1)
+   ldi   zh,high(dis_opcode<<1)
+   add   zl,c
+   adc   zh,d
+   lpm   a,z+              ;show mnemonics
+   rcall RevChr
+   lpm   a,z+
+   rcall RevChr
+   lpm   a,z+
+   rcall RevChr
+   rcall space
+   lpm   b,z               ;show addressing
+   andi  b,0b1100000       ;mask prefix
+   cpi   b,0b0100000       
+   ifeq  dis_immediate
+      ldi   a,'#'
+      rcall PrintChr
+   end   dis_immediate
+   cpi   b,0b1000000
+   ifeq  dis_pre_indirect
+      ldi   a,'('
+      rcall PrintChr
+   end   dis_pre_indirect
+   cpi   b,0b1100000
+   ifeq  dis_bitnum
+      in    a,dbusin          ;opcode -> bitnum
+      swap  a
+      andi  a,7
+      addi  a,'0'
+      rcall PrintChr
+      ldi   a,','
+      rcall PrintChr
+   end   dis_bitnum
+   lpm   b,z
+   andi  b,0b0011000       ;mask op addressing
+   cpi   b,0b0001000             
+   ifeq  dis_data_one      ;zero page or immediate
+      out   abuslo,yl         ;memory fetch
+      out   abushi,yh
+      adiw  y,1
+      wait_data_valid 1       ;60ns minimum @ 16MHz
+      in    a,dbusin
+      rcall PrintHex
+   end   dis_data_one
+   cpi   b,0b0010000             
+   ifeq  dis_data_abs      ;2 Byte absolute (reverse order)
+      out   abuslo,yl         ;memory fetch
+      out   abushi,yh
+      adiw  y,1
+      wait_data_valid 1       ;60ns minimum @ 16MHz
+      in    c,dbusin
+      out   abuslo,yl         ;memory fetch
+      out   abushi,yh
+      adiw  y,1
+      wait_data_valid 1       ;60ns minimum @ 16MHz
+      in    a,dbusin
+      rcall PrintHex
+      mov   a,c
+      rcall PrintHex
+   end   dis_data_abs
+   cpi   b,0b0011000             
+   ifeq  dis_data_rel      ;1 Byte relative (calculated absolute)
+      rcall dis_rel
+   end   dis_data_rel
+   lpm   b,z
+   andi  b,0b0000111       ;mask suffix
+   cpi   b,0b001           ;,X
+   ifeq  dis_x
+      ldi   a,','
+      rcall PrintChr
+      ldi   a,'X'
+      rcall PrintChr
+   end   dis_x
+   cpi   b,0b010           ;,Y
+   ifeq  dis_y
+      ldi   a,','
+      rcall PrintChr
+      ldi   a,'Y'
+      rcall PrintChr
+   end   dis_y
+   cpi   b,0b011           ;)
+   ifeq  dis_i
+      ldi   a,')'
+      rcall PrintChr
+   end   dis_i
+   cpi   b,0b100           ;,X)
+   ifeq  dis_xi
+      ldi   a,','
+      rcall PrintChr
+      ldi   a,'X'
+      rcall PrintChr
+      ldi   a,')'
+      rcall PrintChr
+   end   dis_xi
+   cpi   b,0b101           ;),Y
+   ifeq  dis_iy
+      ldi   a,')'
+      rcall PrintChr
+      ldi   a,','
+      rcall PrintChr
+      ldi   a,'Y'
+      rcall PrintChr
+   end   dis_iy
+   cpi   b,0b110           ;A
+   ifeq  dis_a
+      ldi   a,'A'
+      rcall PrintChr
+   end   dis_a
+   cpi   b,0b111           ;invalid instruction or BBR/BBS
+   ifeq  dis_nv
+      .ifdef cmos_core
+         ldi   a,','
+         rcall PrintChr
+         rcall dis_rel
+      .else
+         PrintStr inv_instr
+      .endif
+   end   dis_nv
+   ret
+
+;fetch relative address and display as absolute
+dis_rel:
+   out   abuslo,yl         ;memory fetch
+   out   abushi,yh
+   adiw  y,1
+   clr   a
+   wait_data_valid 2       ;120ns minimum @ 16MHz
+   in    c,dbusin
+   tst   c
+   ifmi  dis_rel_sign
+      dec   a                 ;extend sign to high
+   end   dis_rel_sign
+   add   c,yl              ;calculate & show absolute
+   adc   a,yh
+   rcall PrintHex
+   mov   a,c
+   rjmp  PrintHex
+
+;*****************************************************************
+;
+; get hex parameters
+;
+;*****************************************************************
+
+;ASCII to hex nibble conversion
+get_hex:
+   subi  a,'0'           ;hex 0-9
+   cpi   a,10
+   ifsh  hex_a_f
+      cpi   a,17         ;non hex >0 <A
+      brlo  inv_cmd
+      subi  a,'A'-'0'-10 ;hex A-F
+      cpi   a,16         ;non hex >F
+      brsh  inv_cmd
+   end   hex_a_f
+   ret
+;
+; get 1 hex byte from commandline
+;     expects 2 Hex digits, eol
+;     returns hex byte in a
+;
+get_byte:
+   do     byte_parse
+      ld    a,y+
+      tst   a            ;premature end of input
+      breq  inv_cmd
+      cpi   a,32         ;skip blanks
+   loopeq byte_parse
+   rcall get_hex        ;high nibble
+   mov   c,a
+   swap  c
+   ld    a,y+
+   tst   a
+   breq  inv_cmd
+   rcall get_hex        ;low nibble
+   or    a,c
+   ld    d,y+           ;end of line?
+   tst   d
+   brne  inv_cmd
+   ret               
+;
+; get nth hex byte from commandline
+;     expects 2 Hex digits
+;     returns hex byte in a
+;
+get_wbyte:
+   rcall get_hex        ;high nibble
+   mov   c,a
+   swap  c
+   ld    a,y+
+   tst   a
+   breq  inv_cmd
+   rcall get_hex        ;low nibble
+   or    a,c
+   ret               
+
+inv_cmd:
+   lds   a,sp_save      ;restore sp to main loop
+   out   spl,a
+   lds   a,sp_save+1
+   out   sph,a
+   rjmp  invalid_command   ;immediate end of command
+
+;
+; get hex address from commandline, single parameter
+;     expects y pointing to 1-4 hex digits, end of line
+;     uses a b
+;     returns address in z
+;
+get_adr:
+   do     adr_parse
+      ld    a,y+
+      tst   a               ;premature end of input
+      breq  inv_cmd
+      cpi   a,32            ;skip blanks
+   loopeq adr_parse
+   rcall get_hex        ;1st nibble
+   clr   zh
+   mov   zl,a
+   do        adr_nibble
+      ld    a,y+            ;next nibble
+      tst   a
+      exiteq adr_nibble
+      rcall get_hex
+      ldi   b,4
+      do    adr_shift_nibble
+         lsl   zl
+         rol   zh
+         brcs  inv_cmd        ;exceeds 16bit
+         dec   b
+      loopne adr_shift_nibble
+      or    zl,a
+   loop      adr_nibble
+   ret               
+;
+; get hex address from commandline, multiple parameter
+;     expects 1-4 hex digits, space
+;     returns address in z
+;
+get_wadr:
+   do     wadr_parse
+      ld    a,y+
+      tst   a                 ;premature end of input
+      breq  inv_cmd
+      cpi   a,32              ;skip blanks
+   loopeq wadr_parse
+   rcall get_hex           ;1st nibble
+   clr   zh
+   mov   zl,a
+   do        wadr_nibble
+      ld    a,y+              ;next nibble
+      cpi   a,32
+      exiteq wadr_nibble
+      rcall get_hex
+      ldi   b,4
+      do    wadr_shift_nibble
+         lsl   zl
+         rol   zh
+         brcs  inv_cmd           ;exceeds 16bit
+         dec   b
+      loopne wadr_shift_nibble
+      or    zl,a
+   loop      wadr_nibble
+   ret               
+
+;*****************************************************************
+;
+; breakpoint utilities
+;
+;*****************************************************************
+;
+; breakpoint info - list active breakpoints
+;     uses a c y z
+;
+brkpt_info:
+   ldi   yl,low(brkpt_lo)  ;any breakpoints active?
+   ldi   yh,high(brkpt_lo)
+   clr   c
+   do       br_find_actv
+      ldd   zh,y+10           ;brkpt_hi set?
+      cpse  zh,allon
+      inc   c
+      ld    zl,y+             ;brkpt_lo set?
+      cpse  zl,allon
+      inc   c
+      cpi   yl,low(brkpt_hi)
+   loopne   br_find_actv
+   cpse  c,zero
+   ifs   br_info_none
+      PrintStr bpt_info_none  ;10,13,"No breakpoints active"
+   else  br_info_none
+      PrintStr bpt_info       ;10,13,"Breakpoints  (slot#:address)",13,10
+      ldi   yl,low(brkpt_lo)  ;find breakpoints
+      do       br_info_all
+         ld    zl,y              ;brkpt_lo set?
+         ldd   zh,y+10           ;brkpt_hi set?
+         cp    zl,allon
+         ifne_or  br_info_slot
+         cp    zh,allon
+         ifne     br_info_slot
+            rcall space
+            mov   a,yl              ;slot#
+            subi  a,low(brkpt_lo) - '0'
+            rcall PrintChr
+            rcall colon
+            mov   a,zh              ;address
+            rcall PrintHex
+            mov   a,zl
+            rcall PrintHex
+         end      br_info_slot
+         adiw  y,1               ;next slot
+         cpi   yl,low(brkpt_hi)
+      loopne   br_info_all
+   end   br_info_none
+   ret
+;
+; clear all breakpoints
+;     uses a y z
+;     returns c = count of slots cleared
+;
+brkpt_clr_all:
+   ldi   yl,low(brkpt_lo)  ;find breakpoints
+   ldi   yh,high(brkpt_lo)
+   clr   c
+   do       br_clr_all_slots
+      rcall brkpt_clr_one
+      adiw  y,1               ;next slot
+      cpi   yl,low(brkpt_hi)
+   loopne   br_clr_all_slots
+   tst   c
+   ifne  br_clr_all_msg
+      PrintStr bpt_clrd_msg   ;10,13,"All breakpoints cleared"
+   end   br_clr_all_msg
+   ret
+;
+; clear 1 breakpoint slot
+;     uses a y z
+;     returns c+1 if slot was active / got cleared
+;
+brkpt_clr_one:
+   ld    zl,y              ;brkpt_lo set?
+   ldd   zh,y+10           ;brkpt_hi set?
+   cp    zl,allon
+   ifne_or  br_clr_one_slot
+   cp    zh,allon
+   ifne     br_clr_one_slot
+      ;write original opcode back to its RAM location
+      ldd   a,y+20            ;brkpt_op
+      out   abuslo,zl 
+      out   abushi,zh
+      out   cbus,writemem     ;WE, ~OE
+      out   dbusout,a         ;dbus write
+      out   dbusddr,allon     ;dbus = output
+      out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+      out   dbusddr,zero      ;dbus = input
+      out   cbus,readmem      ;OE / read mode back on
+      st    y,allon           ;reset brkpt_lo
+      std   y+10,allon        ;reset brkpt_hi
+      inc   c
+   end      br_clr_one_slot
+   ret
+;
+; check STP is breakpoint
+;     expects current address in z
+;     on match replace a with original opcode
+;      "   "   set T flag to signal reverse video
+;     uses c y
+;
+brkpt_chk:
+   ldi   yl,low(brkpt_lo)  ;match breakpoint address
+   ldi   yh,high(brkpt_lo)
+   do       br_chk_adr
+      ld    c,y+              ;brkpt_lo match?
+      cp    c,zl
+      ifeq_and br_slot_match
+      ldd   c,y+9             ;brkpt_hi match?
+      cp    c,zh
+      ifeq     br_slot_match
+         cp    zl,allon
+         ifne_or  br_slot_valid
+         cp    zh,allon
+         ifne     br_slot_valid
+            ldd   a,y+19            ;show original opcode
+            set                     ;signal breakpoint = reverse video
+         end      br_slot_valid
+         ret
+      end      br_slot_match
+      cpi   yl,low(brkpt_hi)
+   loopne   br_chk_adr
+   ret
+;
+; check PC is breakpoint
+;     expects current address in pcl:pch
+;     on match replace opcode with original opcode
+;     T flag = breakpoint true/false
+;     uses c
+;
+brkpt_chk_pc:
+   push  yl
+   push  yh
+   ldi   yl,low(brkpt_lo)  ;match breakpoint address
+   ldi   yh,high(brkpt_lo)
+   clt
+   do       br_pc_adr
+      ld    c,y+              ;brkpt_lo match?
+      cp    c,pcl
+      ifeq_and br_pc_match
+      ldd   c,y+9             ;brkpt_hi match?
+      cp    c,pch
+      ifeq     br_pc_match
+         cp    pcl,allon
+         ifne_or  br_pc_valid
+         cp    pch,allon
+         ifne     br_pc_valid
+            ldd   opcode,y+19       ;show original opcode
+            set                     ;signal breakpoint = reverse video
+         end      br_pc_valid
+         rjmp  br_chkp_exit
+      end      br_pc_match
+      cpi   yl,low(brkpt_hi)
+   loopne   br_pc_adr
+br_chkp_exit:
+   pop   yh
+   pop   yl
+   ret
+;
+; check write memory to breakpoint address
+;     expects current address in z
+;     on match saves a as original opcode
+;      "   "   replaces a with STP opcode
+;     uses c
+;
+brkpt_chk_write:
+   push  yl
+   push  yh
+   ldi   yl,low(brkpt_lo)  ;match breakpoint address
+   ldi   yh,high(brkpt_lo)
+   do       br_chkw_adr
+      ld    c,y+              ;brkpt_lo match?
+      cp    c,zl
+      ifeq_and br_slotw_match
+      ldd   c,y+9             ;brkpt_hi match?
+      cp    c,zh
+      ifeq     br_slotw_match
+         cp    zl,allon
+         ifne_or  br_slotw_valid
+         cp    zh,allon
+         ifne     br_slotw_valid
+            std   y+19,a            ;save original opcode
+            ldi   a,0xdb            ;write STP opcode to memory
+         end      br_slotw_valid
+         rjmp  br_chkw_exit
+      end      br_slotw_match
+      cpi   yl,low(brkpt_hi)
+   loopne   br_chkw_adr
+br_chkw_exit:
+   pop   yh
+   pop   yl
+   ret
+;
+;*****************************************************************
+;
+; load and EEPROM save
+;
+;*****************************************************************
+;
+; RS232 read from RX fifo or direct and exit on <ESC>
+;     uses d, (i with cli)
+;     updates checksum in xh
+;     returns data in a
+;
+read_serial_esc:
+   push  yl
+   push  yh
+;   push  c
+   do    wait_ser_data
+      in    d,sreg      ;preserve sreg interrupt enable
+      cli
+      lds   i,rx_fill   ;check buffer
+      tst   i
+      ifne  esc_read_buf
+         lds   yl,rx_inx      ;prepare address to read rx fifo
+         ldi   yh,high(rx_buf)
+         sub   yl,i
+         ld    a,y            ;read
+         dec   i              ;update pointer
+         sts   rx_fill,i
+         .ifdef flowlo
+;            mov   i,c
+            cpi   i,flowlo          ;buffer lower watermark?
+            iflo  esc_flow
+               lds   i,flow_cmd
+               cpi   i,0x91         ;xon done?
+               ifne  esc_send_xon
+                  ldi   i,0x11         ;post xon pending
+                  sts   flow_cmd,i
+                  ldi   i,usart_txi_ena ;notify transmitter
+                  out   ucsrb,i
+                  .ifdef irq_dis_real
+                     sts   usart_ena,i
+                  .endif
+               end  esc_send_xon
+            end   esc_flow
+         .endif
+         out   sreg,d
+         exit  wait_ser_data
+      else  esc_read_buf
+         out   sreg,d
+         ifid_and  esc_read_direct
+         sbis  ucsra,rxc      
+         ifs       esc_read_direct
+            in    a,udr        ;read direct if disabled & buffer empty
+            exit  wait_ser_data
+         end       esc_read_direct
+      end   esc_read_buf
+   loop  wait_ser_data
+;   pop   c
+   pop   yh
+   pop   yl
+   cpi   a,27
+   ifeq  read_abort
+      .ifdef eep_vld
+         lds   a,prog_num     ;I2C close required?
+         cpi   a,0xff
+         ifeq  esc_read_load
+            PrintStr load_abort  ;" Load aborted"
+            rjmp  skip_main
+         else  esc_read_load
+            PrintStr save_abort  ;" Save aborted"
+eep_close_err:             ;close SPI/I2C after abort or error
+            jmp  eep_write_err
+         end   esc_read_load
+      .else
+         PrintStr load_abort  ;" Load aborted"
+         rjmp  skip_main
+      .endif
+   end  read_abort
+ret
+
+;load hex nibble
+load_hex:
+   rcall read_serial_esc
+   subi  a,'0'           ;hex 0-9
+   cpi   a,10
+   ifsh  load_a_f
+      cpi   a,17         ;non hex >0 <A
+      brlo  inv_hex
+      subi  a,'A'-'0'-10 ;hex A-F
+      cpi   a,16         ;non hex >F
+      brsh  inv_hex
+   end   load_a_f
+   ret
+;non hex message
+inv_hex:
+   PrintStr err_nonhex  ;" Non-Hex data in record"
+.ifdef eep_vld
+   lds   a,prog_num     ;SPI/I2C close required?
+   cpi   a,0xff
+   brne  eep_close_err
+.endif
+;
+; RS232 discard from RX fifo or direct with escape timer
+;     uses a, d, (i with cli)
+;
+; wait for eof (skip remaining records)
+discard_serial_stream:
+   ldi   yl,6        ;continuous data within 50ms will be discarded
+   sts   cmd_esc_timer,yl
+   do    discard_serial
+      in    d,sreg      ;preserve sreg interrupt enable
+      cli
+      lds   i,rx_fill   ;check buffer
+      tst   i
+      ifne  disc_read_buf
+         lds   yl,rx_inx      ;prepare address to read rx fifo
+         ldi   yh,high(rx_buf)
+         sub   yl,c
+         ld    a,y            ;read
+         dec   i              ;update pointer
+         sts   rx_fill,i
+         .ifdef flowlo
+;            mov   i,c
+            cpi   i,flowlo          ;buffer lower watermark?
+            iflo  disc_flow
+               lds   i,flow_cmd
+               cpi   i,0x91         ;xon done?
+               ifne  disc_send_xon
+                  ldi   i,0x11         ;post xon pending
+                  sts   flow_cmd,i
+                  ldi   i,usart_txi_ena ;notify transmitter
+                  out   ucsrb,i
+                  .ifdef irq_dis_real
+                     sts   usart_ena,i
+                  .endif
+               end  disc_send_xon
+            end   disc_flow
+         .endif
+         out   sreg,d
+         ldi   yl,6           ;further characters
+         sts   cmd_esc_timer,yl
+         cpi   a,13           ;EOL
+         ifeq  disc_read_keepalive
+            ldi   a,0
+            rcall PrintChr
+         end   disc_read_keepalive
+      else  disc_read_buf
+         out   sreg,d
+         ifid_and  disc_read_direct
+         sbis  ucsra,rxc      
+         ifs       disc_read_direct
+            in    a,udr       ;read direct if disabled & buffer empty
+            ldi   yl,6        ;further characters
+            sts   cmd_esc_timer,yl
+            cpi   a,13
+            ifeq  disc_read_keepalive2
+               ldi   a,0
+               rcall PrintChr
+            end   disc_read_keepalive2
+         end       disc_read_direct
+      end   disc_read_buf
+      ifid_and disc_timer_update ;disabled timer update 
+      in    yh,tifr
+      sbrs  yh,ocf0
+      ifs      disc_timer_update
+         ldi   yh,0b10           ;clear t1 oc flag
+         out   tifr,yh
+         lds   yl,cmd_esc_timer  ;test escape timer expired
+         andi  yl,0x7f
+         ifne  disc_esc_timer_update
+            lds   yl,cmd_esc_timer
+            dec   yl
+            sts   cmd_esc_timer,yl
+         end   disc_esc_timer_update
+      end      disc_timer_update
+      lds   yl,cmd_esc_timer
+      tst   yl
+   exiteq   discard_serial
+   loop     discard_serial
+   ldi   yl,0x80           ;re-init
+   sts   cmd_esc_timer,yl
+; return to mainloop
+skip_main:
+   .ifdef eep_vld
+      call eep_close
+   .else
+      out   dbusddr,zero      ;dbus = input
+      out   cbus,readmem      ;OE / read mode back on
+   .endif
+   lds   a,sp_save         ;restore sp to main loop
+   out   spl,a
+   lds   a,sp_save+1
+   out   sph,a
+   sbrc  flags,deb_act     ;on error
+      rjmp  end_command       ;debugger or
+   rcall crlf 
+   rjmp  end_exit          ;next instruction
+;
+; Read Hex Byte from RX fifo or direct and exit on <ESC>
+read_byte_esc:
+   ;push  c
+   rcall load_hex       ;high nibble
+   swap  a        
+   mov   c,a
+   rcall load_hex       ;low nibble
+   or    a,c
+   ;pop   c
+   add   xh,a           ;update checksum
+   ret
+
+.ifdef eep_vld
+; EEPROM info - show directory
+eep_cmd_info:
+   PrintStr eep_info2   ;" - "
+   clr   c              ;count free slots
+   clr   a
+   out   eearh,one
+   do       eep_get_free
+      out   eearl,c
+      out   eecr,one
+      in    b,eedr
+      cp    b,allon
+      ifeq  eep_inc_free
+         inc   a           ;+1 for every free block
+         ifeq  eep_100_free
+            ldi   a,'1'       ;0x100 free slots
+            rcall PrintChr
+            clr   a
+         end   eep_100_free
+      end   eep_inc_free
+      inc   c   
+   loopne   eep_get_free
+   rcall PrintHex       ;2 digits free slots
+   PrintStr eep_info3   ;" slots free"
+   ldi   zl,1           ;progs/line, next index
+   clr   b              ;lowest prog# not listed
+   do    eep_list
+      ldi   a,0xff         ;prog#, max to init
+      do    eep_pslots
+         out   eearl,c        ;scan all slots
+         out   eecr,one
+         in    d,eedr
+         cp    d,b            ;not already listed?
+         ifsh  eep_next
+            cp    d,a            ;count same, new if lower
+            ifeq  eep_inc_same
+               inc   yl             ;count slots
+            end   eep_inc_same
+            iflo  eep_find_low
+               ldi   yl,1           ;1st slot
+               mov   a,d            ;new lowest prog# to list
+            end   eep_find_low
+         end   eep_next
+         inc   c                 ;loop for 256 slots
+      loopne   eep_pslots
+      cpi   a,0xff            ;no more progs to list
+    exiteq  eep_list
+      mov   b,a
+      dec   zl                ;max progs per line?
+      ifeq  eep_list_index
+         PrintStr eep_info4   ;"prog#/slots  "
+         ldi   zl,10          ;next 10 progs on this line
+         mov   a,b            ;restore a
+      end   eep_list_index
+      inc   b                 ;next lowest prog#
+      rcall PrintHex          ;prog#
+      ldi   a,'/'
+      rcall PrintChr
+      mov   a,yl
+      rcall PrintHex          ;slotcount
+      rcall space
+   loop     eep_list
+   out   eearh,zero     ;protect eep from unintentional writes
+   out   eearl,zero
+   ret
+   
+eep_auto_info:
+   PrintStr eep_info1   ;crlf,"EEPROM autoload "
+   out   eearh,zero     ;read eep autoload byte
+   out   eearl,allon
+   out   eecr,one
+   in    a,eedr
+   cpi   a,0xff         ;test autoload program set
+   ifeq  eep_no_auto
+      PrintStr eep_none    ;"none"
+   else  eep_no_auto
+      rcall PrintHex       ;program number
+      mov   c,one             ;beginning of string
+      out   eearl,c
+      out   eecr,one
+      in    b,eedr
+      cpi   b,0xff         ;string present?
+      ifne  eep_auto_info_string
+         rcall space
+         ldi   a,34           ;quote
+         rcall PrintChr
+         mov   a,b
+         do       eep_auto_info_str2
+            rcall PrintChr
+            inc   c
+            out   eearl,c
+            out   eecr,one
+            in    a,eedr
+            cpi   a,0xff         ;string end?
+         loopne   eep_auto_info_str2
+         ldi   a,34
+         rcall PrintChr
+      end   eep_auto_info_string
+   end   eep_no_auto
+   ret
+
+; internal EEPROM write byte
+eep_auto_write:
+   out   eedr,a
+   in    c,sreg         ;atomic write sequence
+   cli
+   sbi   eecr,eemwe
+   sbi   eecr,eewe
+   out   sreg,c
+   do    eep_auto_wait  ;write complete?
+      sbic  eecr,eewe
+   loop  eep_auto_wait
+   ret
+.endif
+
+; Messages part 2 (part 1 moved before opcode table to reduce empty space)
+;                              word count, X = don't use in part 1 ---> ;##
+.ifdef cmos_core
+stp_instr:     .db   "STP - Emulator halted",0                          ; X
+.else
+inv_instr:     .db   "Illegal Opcode ",0                                ; X
+.endif
+emu_msg:       .db   13,10,13,10,core_string," Emulator V",version,0    ; X
+built_msg:     .db   " built ",__DATE__," ",__TIME__,0                  ;14
+;load_wait:     .db   13,10,"Loading, <ESC> to abort",13,10,0            ;14
+;load_abort:    .db   " Load aborted",0                                  ; 7
+err_chksum:    .db   " Checksum failed",0,0                             ; 9
+;rs_vect_empty: .db   13,10,"Check reset vector",0,0                     ;11
+;reset_msg:     .db   "  Reset",0                                        ; 4
+;bpt_clrd_msg:  .db   10,13,"All breakpoints cleared",0                  ;13
+;bpt_info:      .db   10,13,"Breakpoints  (slot#:address)",13,10,0,0     ;17
+bpt_info_none: .db   10,13,"No breakpoints active",0                    ;12
+;bpt_slot_full: .db   10,13,"No more breakpoint slots available",0,0     ;19
+.ifdef irq_dis_real    ;more messages not in part 1
+load_ok:       .db   13,"Load OK",0,0                                   ; 5
+err_nonhex:    .db   " Non-Hex data in record",0                        ;12
+err_func:      .db   " Invalid function or count in record",0,0         ;19
+illegal_int:   .db   13,10,"AVR Illegal Interrupt",0                    ;12
+back_line:     .db   13,27,91,"K",27,91,"1A",0,0                        ; 5
+.endif
+
+
+;verify minimum versions of includes
+;required versions
+.if   io_version < 831
+   .error "6502_Emu_IO.inc is below the required minimum version!"
+.endif
+.ifdef   cmos_core
+   .if   core_version < 831
+      .error "6502_Emu_CMOS.inc is below the required minimum version!"
+   .endif
+.else
+   .if   core_version < 831
+      .error "6502_Emu_NMOS.inc is below the required minimum version!"
+   .endif
+.endif
+.if   config_version < 830
+   .error "6502_Emu_config.inc is below the required minimum version!"
+.endif
+.if   sam_version < 810
+   .error "sam.inc is below the required minimum version!"
+.endif
+;above base versions
+.if   io_version > 832
+   .error "6502_Emu_IO.inc is above the base version!"
+.endif
+.ifdef   cmos_core
+   .if   core_version > 832
+      .error "6502_Emu_CMOS.inc is above the base version!"
+   .endif
+.else
+   .if   core_version > 832
+      .error "6502_Emu_NMOS.inc is above the base version!"
+   .endif
+.endif
+.if   config_version > 832
+;   .error "6502_Emu_config.inc is above the base version!"
+.endif
+.if   sam_version > 832
+   .error "sam.inc is above the base version!"
+.endif
+;recommended versions
+.if   io_version < 832
+   .warning "6502_Emu_IO.inc is below the recommended minimum version!"
+.endif
+.ifdef   cmos_core
+   .if   core_version < 831
+      .warning "6502_Emu_CMOS.inc is below the recommended minimum version!"
+   .endif
+.else
+   .if   core_version < 831
+      .warning "6502_Emu_NMOS.inc is below the recommended minimum version!"
+   .endif
+.endif
+.if   config_version < 830
+   .warning "6502_Emu_config.inc is below the recommended minimum version!"
+.endif
+.if   sam_version < 810
+   .warning "sam.inc is below the recommended minimum version!"
+.endif
diff --git a/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_Emu_CMOS.inc b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_Emu_CMOS.inc
new file mode 100644
index 00000000..b40ef47b
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_Emu_CMOS.inc
@@ -0,0 +1,2298 @@
+;
+; 6502 EMULATOR include
+;
+;     C M O S   c o r e   a.k.a. 65C02
+;
+; Copyright (C) 2013-2014  Klaus Dormann
+;
+; This program is free software: you can redistribute it and/or modify
+; it under the terms of the GNU General Public License as published by
+; the Free Software Foundation, either version 3 of the License, or
+; (at your option) any later version.
+;
+; This program is distributed in the hope that it will be useful,
+; but WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+; GNU General Public License for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with this program.  If not, see <http://www.gnu.org/licenses/>.
+;
+;
+.set  core_version = 831
+#define core_string "65C02" ;identify CMOS core in version message
+
+;*****************************************************************
+;
+; 6502 emulation disassembly table
+;
+;*****************************************************************
+;addressing modes
+.equ  op_s     = 0b0000000 ;single (implied) - TAX
+.equ  op_a     = 0b0010000 ;absolute - LDA abs
+.equ  op_x     = 0b0010001 ;absolute indexed X - LDA abs,x
+.equ  op_y     = 0b0010010 ;absolute indexed Y - LDA abs,y
+.equ  op_i     = 0b1010011 ;absolute indirect - JMP (abs)
+.equ  op_m     = 0b0101000 ;immediate - LDA #
+.equ  op_r     = 0b0011000 ;relative to PC - BEQ rel
+.equ  op_z     = 0b0001000 ;zero page - LDA zp
+.equ  op_zxi   = 0b1001100 ;zero page indexed X indirect LDA (zp,x)
+.equ  op_zx    = 0b0001001 ;zero page indexed X - LDA zp,x
+.equ  op_zy    = 0b0001010 ;zero page indexed Y - LDA zp,y
+.equ  op_ziy   = 0b1001101 ;zero page indidrect indexed Y - LDA (zp),y
+.equ  op_sa    = 0b0000110 ;single accumulator - ASL A
+;  additional CMOS addressing modes
+.equ  op_zi    = 0b1001011 ;zero page indidrect - LDA (zp)
+.equ  op_xi    = 0b1010100 ;absolute indexed X indirect - JMP (abs,x)
+.equ  op_bz    = 0b1101000 ;bitnum, zero page - RMB bit,zp
+.equ  op_bzr   = 0b1101111 ;bitnum, zero page, relative - BBR bit,zp,rel
+;                0b00_____  no prefix
+;                0b01_____  # - immediate
+;                0b10_____  ( - opening indirect
+;                0b11_____  bitnumber, - SMB, RMB, BBS, BBR
+;                0b__00___  no data - implied
+;                0b__01___  1 Byte - zero page or immediate
+;                0b__10___  2 Bytes - absolute
+;                0b__11___  1 Byte relative - calculated absolute
+;                0b____000  no suffix
+;                0b____001  ,X - indexed X
+;                0b____010  ,Y - indexed Y
+;                0b____011  ) - closing indirect
+;                0b____100  ,X) - indexed X indirect
+;                0b____101  ),Y - indirect indexed Y
+;                0b____110  A - implied accumulator
+;                0b____111  ,1 Byte relative - calculated absolute (BBS, BBR)
+
+dis_opcode: .db   "BRK",op_s
+            .db   "ORA",op_zxi
+            .db   "NOP",op_z
+            .db   "NOP",op_s
+            .db   "TSB",op_z
+            .db   "ORA",op_z
+            .db   "ASL",op_z
+            .db   "RMB",op_bz
+            .db   "PHP",op_s
+            .db   "ORA",op_m
+            .db   "ASL",op_sa
+            .db   "NOP",op_s
+            .db   "TSB",op_a
+            .db   "ORA",op_a
+            .db   "ASL",op_a
+            .db   "BBR",op_bzr
+
+            .db   "BPL",op_r
+            .db   "ORA",op_ziy
+            .db   "ORA",op_zi
+            .db   "NOP",op_s
+            .db   "TRB",op_z
+            .db   "ORA",op_zx
+            .db   "ASL",op_zx
+            .db   "RMB",op_bz
+            .db   "CLC",op_s
+            .db   "ORA",op_y
+            .db   "INC",op_sa
+            .db   "NOP",op_s
+            .db   "TRB",op_a
+            .db   "ORA",op_x
+            .db   "ASL",op_x
+            .db   "BBR",op_bzr
+
+            .db   "JSR",op_a
+            .db   "AND",op_zxi
+            .db   "NOP",op_z
+            .db   "NOP",op_s
+            .db   "BIT",op_z
+            .db   "AND",op_z
+            .db   "ROL",op_z
+            .db   "RMB",op_bz
+            .db   "PLP",op_s
+            .db   "AND",op_m
+            .db   "ROL",op_sa
+            .db   "NOP",op_s
+            .db   "BIT",op_a
+            .db   "AND",op_a
+            .db   "ROL",op_a
+            .db   "BBR",op_bzr
+
+            .db   "BMI",op_r
+            .db   "AND",op_ziy
+            .db   "AND",op_zi
+            .db   "NOP",op_s
+            .db   "BIT",op_zx
+            .db   "AND",op_zx
+            .db   "ROL",op_zx
+            .db   "RMB",op_bz
+            .db   "SEC",op_s
+            .db   "AND",op_y
+            .db   "DEC",op_sa
+            .db   "NOP",op_s
+            .db   "BIT",op_x
+            .db   "AND",op_x
+            .db   "ROL",op_x
+            .db   "BBR",op_bzr
+
+            .db   "RTI",op_s
+            .db   "EOR",op_zxi
+            .db   "NOP",op_z
+            .db   "NOP",op_s
+            .db   "NOP",op_z
+            .db   "EOR",op_z
+            .db   "LSR",op_z
+            .db   "RMB",op_bz
+            .db   "PHA",op_s
+            .db   "EOR",op_m
+            .db   "LSR",op_sa
+            .db   "NOP",op_s
+            .db   "JMP",op_a
+            .db   "EOR",op_a
+            .db   "LSR",op_a
+            .db   "BBR",op_bzr
+
+            .db   "BVC",op_r
+            .db   "EOR",op_ziy
+            .db   "EOR",op_zi
+            .db   "NOP",op_s
+            .db   "NOP",op_z
+            .db   "EOR",op_zx
+            .db   "LSR",op_zx
+            .db   "RMB",op_bz
+            .db   "CLI",op_s
+            .db   "EOR",op_y
+            .db   "PHY",op_s
+            .db   "NOP",op_s
+            .db   "NOP",op_a
+            .db   "EOR",op_x
+            .db   "LSR",op_x
+            .db   "BBR",op_bzr
+
+            .db   "RTS",op_s
+            .db   "ADC",op_zxi
+            .db   "NOP",op_z
+            .db   "NOP",op_s
+            .db   "STZ",op_z
+            .db   "ADC",op_z
+            .db   "ROR",op_z
+            .db   "RMB",op_bz
+            .db   "PLA",op_s
+            .db   "ADC",op_m
+            .db   "ROR",op_sa
+            .db   "NOP",op_s
+            .db   "JMP",op_i
+            .db   "ADC",op_a
+            .db   "ROR",op_a
+            .db   "BBR",op_bzr
+
+            .db   "BVS",op_r
+            .db   "ADC",op_ziy
+            .db   "ADC",op_zi
+            .db   "NOP",op_s
+            .db   "STZ",op_zx
+            .db   "ADC",op_zx
+            .db   "ROR",op_zx
+            .db   "RMB",op_bz
+            .db   "SEI",op_s
+            .db   "ADC",op_y
+            .db   "PLY",op_s
+            .db   "NOP",op_s
+            .db   "JMP",op_xi
+            .db   "ADC",op_x
+            .db   "ROR",op_x
+            .db   "BBR",op_bzr
+
+            .db   "BRA",op_r
+            .db   "STA",op_zxi
+            .db   "NOP",op_z
+            .db   "NOP",op_s
+            .db   "STY",op_z
+            .db   "STA",op_z
+            .db   "STX",op_z
+            .db   "SMB",op_bz
+            .db   "DEY",op_s
+            .db   "BIT",op_m
+            .db   "TXA",op_s
+            .db   "NOP",op_s
+            .db   "STY",op_a
+            .db   "STA",op_a
+            .db   "STX",op_a
+            .db   "BBS",op_bzr
+
+            .db   "BCC",op_r
+            .db   "STA",op_ziy
+            .db   "STA",op_zi
+            .db   "NOP",op_s
+            .db   "STY",op_zx
+            .db   "STA",op_zx
+            .db   "STX",op_zy
+            .db   "SMB",op_bz
+            .db   "TYA",op_s
+            .db   "STA",op_y
+            .db   "TXS",op_s
+            .db   "NOP",op_s
+            .db   "STZ",op_a
+            .db   "STA",op_x
+            .db   "STZ",op_x
+            .db   "BBS",op_bzr
+
+            .db   "LDY",op_m
+            .db   "LDA",op_zxi
+            .db   "LDX",op_m
+            .db   "NOP",op_s
+            .db   "LDY",op_z
+            .db   "LDA",op_z
+            .db   "LDX",op_z
+            .db   "SMB",op_bz
+            .db   "TAY",op_s
+            .db   "LDA",op_m
+            .db   "TAX",op_s
+            .db   "NOP",op_s
+            .db   "LDY",op_a
+            .db   "LDA",op_a
+            .db   "LDX",op_a
+            .db   "BBS",op_bzr
+
+            .db   "BCS",op_r
+            .db   "LDA",op_ziy
+            .db   "LDA",op_zi
+            .db   "NOP",op_s
+            .db   "LDY",op_zx
+            .db   "LDA",op_zx
+            .db   "LDX",op_zy
+            .db   "SMB",op_bz
+            .db   "CLV",op_s
+            .db   "LDA",op_y
+            .db   "TSX",op_s
+            .db   "NOP",op_s
+            .db   "LDY",op_x
+            .db   "LDA",op_x
+            .db   "LDX",op_y
+            .db   "BBS",op_bzr
+
+            .db   "CPY",op_m
+            .db   "CMP",op_zxi
+            .db   "NOP",op_z
+            .db   "NOP",op_s
+            .db   "CPY",op_z
+            .db   "CMP",op_z
+            .db   "DEC",op_z
+            .db   "SMB",op_bz
+            .db   "INY",op_s
+            .db   "CMP",op_m
+            .db   "DEX",op_s
+            .db   "WAI",op_s
+            .db   "CPY",op_a
+            .db   "CMP",op_a
+            .db   "DEC",op_a
+            .db   "BBS",op_bzr
+
+            .db   "BNE",op_r
+            .db   "CMP",op_ziy
+            .db   "CMP",op_zi
+            .db   "NOP",op_s
+            .db   "NOP",op_z
+            .db   "CMP",op_zx
+            .db   "DEC",op_zx
+            .db   "SMB",op_bz
+            .db   "CLD",op_s
+            .db   "CMP",op_y
+            .db   "PHX",op_s
+            .db   "STP",op_s
+            .db   "NOP",op_a
+            .db   "CMP",op_x
+            .db   "DEC",op_x
+            .db   "BBS",op_bzr
+
+            .db   "CPX",op_m
+            .db   "SBC",op_zxi
+            .db   "NOP",op_z
+            .db   "NOP",op_s
+            .db   "CPX",op_z
+            .db   "SBC",op_z
+            .db   "INC",op_z
+            .db   "SMB",op_bz
+            .db   "INX",op_s
+            .db   "SBC",op_m
+            .db   "NOP",op_s
+            .db   "NOP",op_s
+            .db   "CPX",op_a
+            .db   "SBC",op_a
+            .db   "INC",op_a
+            .db   "BBS",op_bzr
+
+            .db   "BEQ",op_r
+            .db   "SBC",op_ziy
+            .db   "SBC",op_zi
+            .db   "NOP",op_s
+            .db   "NOP",op_z
+            .db   "SBC",op_zx
+            .db   "INC",op_zx
+            .db   "SMB",op_bz
+            .db   "SED",op_s
+            .db   "SBC",op_y
+            .db   "PLX",op_s
+            .db   "NOP",op_s
+            .db   "NOP",op_a
+            .db   "SBC",op_x
+            .db   "INC",op_x
+            .db   "BBS",op_bzr
+
+;*****************************************************************
+;
+; 6 5 0 2   e m u l a t i o n   m a c r o s
+;
+;*****************************************************************
+
+;
+; op_decode
+;
+; opcode fetch and decode, prefetch low operand
+.macro      op_decode
+            out   abuslo,pcl        ;opcode fetch
+            out   abushi,pch
+                  sei                     ;allow emulation INT, NMI
+                  adiw  pch:pcl,1         ;pc -> op low
+                  cli
+            wait_data_valid 4       ;240 minimum @ 16MHz
+            in    opcode,dbusin
+
+            out   abuslo,pcl        ;operand address low prefetch
+            out   abushi,pch
+            wait_data_valid 6       ;360ns minimum @ 16MHz 
+                  adiw  pch:pcl,1         ;pc -> op high
+                  ijmp                    ;execute opcode
+.endmacro
+
+;op decode after single, opcode already fetched
+.macro      op_decode_single
+            sei                     ;allow emulation INT, NMI
+            out   abuslo,pcl        ;operand address low prefetch
+            cli
+            out   abushi,pch
+            wait_data_valid 6       ;360ns minimum @ 16MHz 
+                  adiw  pch:pcl,1         ;pc -> op high
+                  ijmp                    ;execute opcode
+.endmacro
+
+; address generate relative
+.macro      adgen_r
+            rjmp  no_branch         ;condition false
+            .ifndef BRA_r
+               .equ BRA_r = pc
+            .endif
+            in    operand,dbusin
+            clr   a                 ;expand sign bit
+            sbrc  operand,7         ;negative?
+            dec   a
+            add   pcl,operand       ;set new PC
+            adc   pch,a
+no_branch:  op_decode
+.endmacro
+
+; address generate absolute
+.macro      adgen_a
+            in    oplow,dbusin     
+            out   abuslo,pcl        ;operand high address fetch
+            out   abushi,pch
+                  adiw  pch:pcl,1         ;pc -> next instruction
+                  cbr   flags,(1<<op_ind) ;operand address is direct
+            wait_data_valid 3       ;180ns minimum @ 16MHz
+            in    ophigh,dbusin
+.endmacro
+
+; address generate abs,X
+.macro      adgen_x     ;@0 = op_label xxx_
+            .equ  @0x = pc
+            in    oplow,dbusin     
+            out   abuslo,pcl        ;operand high address fetch
+            out   abushi,pch
+                  adiw  pch:pcl,1         ;pc -> next instruction
+                  cbr   flags,(1<<op_ind) ;operand address is direct
+                  add   oplow,regx
+            wait_data_valid 4       ;240ns minimum @ 16MHz
+            in    ophigh,dbusin
+            adc   ophigh,zero
+            rjmp  @0o               ;fetch operand
+.endmacro
+
+; address generate abs,Y
+.macro      adgen_y     ;@0 = op_label xxx_
+            .equ  @0y = pc
+            in    oplow,dbusin     
+            out   abuslo,pcl        ;operand high address fetch
+            out   abushi,pch
+                  adiw  pch:pcl,1         ;pc -> next instruction
+                  cbr   flags,(1<<op_ind) ;operand address is direct
+                  add   oplow,regy
+            wait_data_valid 4       ;240ns minimum @ 16MHz
+            in    ophigh,dbusin
+            adc   ophigh,zero
+            rjmp  @0o               ;fetch operand
+.endmacro
+
+;address generate (ZP) indirect
+.macro      adgen_zi      ;@0 = op_label xxx_
+            .equ  @0zi = pc
+            in    oplow,dbusin
+            out   abuslo,oplow      ;indirect low address fetch
+            out   abushi,zero
+                  inc   oplow
+                  sbr   flags,(1<<op_ind)  ;operand address is indirect
+;                  brne  pc+2
+;                  rjmp  zp_wrap           ;exceeded end of zeropage
+            wait_data_valid 2       ;120ns minimum @ 16MHz
+            in    a,dbusin
+            out   abuslo,oplow      ;indirect high address fetch
+                  mov   oplow,a
+            wait_data_valid 1       ;60ns minimum @ 16MHz
+            in    ophigh,dbusin
+            rjmp  @0o
+.endmacro
+
+;address generate (ZP,X) indexed indirect
+.macro      adgen_zxi     ;@0 = op_label xxx_
+            .equ  @0zxi = pc
+            in    oplow,dbusin
+            add   oplow,regx
+            out   abuslo,oplow      ;indirect low address fetch
+            out   abushi,zero
+                  inc   oplow
+                  sbr   flags,(1<<op_ind)  ;operand address is indirect
+;                  brne  pc+2
+;                  rjmp  zp_wrap           ;exceeded end of zeropage
+            wait_data_valid 2       ;120ns minimum @ 16MHz
+            in    a,dbusin
+            out   abuslo,oplow      ;indirect high address fetch
+                  mov   oplow,a
+            wait_data_valid 1       ;60ns minimum @ 16MHz
+            in    ophigh,dbusin
+            rjmp  @0o
+.endmacro
+
+;address generate (ZP),Y indirect indexed
+.macro      adgen_ziy     ;@0 = op_label xxx_
+            .equ  @0ziy = pc
+            in    oplow,dbusin
+            out   abuslo,oplow      ;indirect low address fetch
+            out   abushi,zero
+                  inc   oplow
+                  sbr   flags,(1<<op_ind)  ;operand address is indirect
+;                  brne  pc+2
+;                  rjmp  zp_wrap           ;exceeded end of zeropage
+            wait_data_valid 2       ;120ns minimum @ 16MHz
+            in    a,dbusin
+            out   abuslo,oplow      ;indirect high address fetch
+                  mov   oplow,a
+                  add   oplow,regy
+            wait_data_valid 2       ;120ns minimum @ 16MHz
+            in    ophigh,dbusin
+            adc   ophigh,zero
+            rjmp  @0o
+.endmacro
+
+;address generate ZP,X and operand fetch 
+.macro      adgen_zx     ;@0 = op_label xxx_
+            .equ  @0zx = pc
+            in    oplow,dbusin
+            add   oplow,regx
+            out   abuslo,oplow      ;operand fetch
+            out   abushi,zero
+            wait_data_valid 3       ;180ns minimum @ 16MHz
+               clr   ophigh
+               rjmp  @0m
+.endmacro
+
+;address generate ZP,Y and operand fetch 
+.macro      adgen_zy     ;@0 = op_label xxx_
+            .equ  @0zy = pc
+            in    oplow,dbusin
+            add   oplow,regy
+            out   abuslo,oplow      ;operand fetch
+            out   abushi,zero
+            wait_data_valid 3       ;180ns minimum @ 16MHz
+               clr   ophigh
+               rjmp  @0m
+.endmacro
+
+;address generate ZP absolute and operand fetch 
+.macro      adgen_z     ;@0 = op_label xxx_
+            .equ  @0z = pc
+            in    oplow,dbusin
+            out   abuslo,oplow      ;operand fetch
+            out   abushi,zero
+            wait_data_valid 3       ;180ns minimum @ 16MHz
+               clr   ophigh
+               rjmp  @0m
+.endmacro
+
+; operand fetch from memory 
+.macro      op_fetch
+            out   abuslo,oplow      ;operand fetch
+            out   abushi,ophigh
+         .ifdef iomap
+            wait_data_valid 3       ;180ns minimum @ 16MHz
+                  cpi   ophigh,iomap      ;internal io?
+                  brne  skip_IO
+            rcall ioread            ;ioread returns data in operand
+            rjmp  pc+2              ;skip reading from dbus   
+         .else
+            wait_data_valid 0       ;0ns minimum @ 16MHz
+         .endif
+skip_IO:
+.endmacro
+
+; operand fetch from memory for modify op (extended memory address lock)
+.macro      op_fetch_modify
+            out   abuslo,oplow      ;operand fetch
+            out   abushi,ophigh
+         .ifdef iomap
+            wait_data_valid 3       ;180ns minimum @ 16MHz
+                  cpi   ophigh,iomap      ;internal io?
+                  brne  skip_IO
+            rcall iomodify          ;ioread returns data in operand
+            rjmp  pc+2              ;skip reading from dbus   
+         .else
+            wait_data_valid 0       ;0ns minimum @ 16MHz
+         .endif
+skip_IO:
+.endmacro
+
+; register fetch from memory 
+.macro      reg_fetch ;@0 = register
+            out   abuslo,oplow      ;register fetch
+            out   abushi,ophigh
+         .ifdef iomap
+            wait_data_valid 3       ;180ns minimum @ 16MHz
+                  cpi   ophigh,iomap      ;internal io?
+                  brne  skip_IO
+            rcall ioread            ;ioread returns data in operand
+            mov   @0,operand  
+            rjmp  pc+2              ;skip reading from dbus   
+         .else
+            wait_data_valid 0       ;0ns minimum @ 16MHz
+         .endif
+skip_IO:
+.endmacro
+
+;flag generating macro
+.macro      flags_gen_nz            ;@0 = register
+            out   sreg,stat         ;keep C
+            tst   @0                ;generate NZ
+            in    stat,sreg         ;save NZ, keep C
+.endmacro
+
+;IRQ enable/disable
+.macro      IRQ_restore             ;sets IRQ according to I-flag
+            .ifdef irq_dis_real     ;+7 if enabled, +5 if disabled
+               sbrs  stat2,2        ;IRQ disabled?
+               rjmp  IRQ_rest_ena 
+                  ldi   a,IRQ_dis
+                  out   ibus,a
+                  out   timsk,one         ;only TOV0 (single step) stays enabled
+                  ldi   a,0b11000         ;no USART interrupts, only RX & TX enable
+               rjmp  IRQ_rest_exit
+IRQ_rest_ena: 
+                  ldi   a,IRQ_ena         ;enable IRQ
+                  out   ibus,a
+                  lds   a,timer_ena       ;enable timers interrupts
+                  out   timsk,a
+                  lds   a,usart_ena       ;enable usart interrupts
+IRQ_rest_exit:
+               out   ucsrb,a
+            .else
+               ldi   a,IRQ_ena
+               sbrc  stat2,2           ;disable if I-flag set
+               ldi   a,IRQ_dis
+               out   ibus,a
+            .endif
+.endmacro
+
+; store modified operand to memory
+.macro      store_modify            ;write to previous read address
+         .ifdef iomap               ;test internal I/O
+            cpi   ophigh,iomap
+            breq  do_io
+         .endif
+         .ifdef rommap              ;test write-protect
+            cpi   ophigh,rommap
+            brsh  skip_store
+         .endif   
+            out   cbus,writemem     ;WE, ~OE
+            out   dbusout,operand   ;precharge write
+            out   dbusddr,allon     ;output data valid
+            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+            out   dbusddr,zero      ;data hold ends after 60ns
+            out   cbus,readmem      ;OE / read mode back on
+skip_store:
+            op_decode               ;next instruction
+
+         .ifdef iomap
+do_io:      rjmp  iowrite
+         .endif
+.endmacro
+
+;address generate store ZP,X
+.macro      adgen_s_zx     ;@0 = op_label xxx_
+            .equ  @0zx = pc
+            in    oplow,dbusin
+            add   oplow,regx
+            out   abuslo,oplow      ;operand fetch
+            out   abushi,zero
+            rjmp  @0m
+.endmacro
+
+;address generate store ZP,Y
+.macro      adgen_s_zy     ;@0 = op_label xxx_
+            .equ  @0zy = pc
+            in    oplow,dbusin
+            add   oplow,regy
+            out   abuslo,oplow      ;operand fetch
+            out   abushi,zero
+            rjmp  @0m
+.endmacro
+
+;address generate store ZP absolute
+.macro      adgen_s_z     ;@0 = op_label xxx_
+            .equ  @0z = pc
+            in    oplow,dbusin
+            out   abuslo,oplow
+            out   abushi,zero
+            rjmp  @0m
+.endmacro
+
+; store register
+.macro      store_reg  ;@0 = register, @1 = zp_entry STx_m
+            out   abuslo,oplow 
+            out   abushi,ophigh
+         .ifdef iomap               ;test internal I/O
+            cpi   ophigh,iomap
+            breq  do_io
+         .endif    
+         .ifdef rommap              ;test write-protect
+            cpi   ophigh,rommap
+            brsh  skip_store
+         .endif   
+            .equ  @1 = pc
+            out   cbus,writemem     ;WE, ~OE
+            out   dbusout,@0        ;precharge write
+            out   dbusddr,allon     ;output data valid
+            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+            out   dbusddr,zero      ;data hold ends after 60ns
+            out   cbus,readmem      ;OE / read mode back on
+skip_store:
+            op_decode               ;next instruction
+
+         .ifdef iomap
+do_io:      mov   operand,@0
+            rjmp  iowrite
+         .endif
+.endmacro
+
+;fetch zp operand for BBR and set bitmask
+.macro      fetch_z_BBR    ;@0 = bit number
+            in    oplow,dbusin
+            out   abuslo,oplow      ;ZP operand fetch
+            out   abushi,zero
+            wait_data_valid 3       ;180ns minimum @ 16MHz
+                  ldi   a,1<<@0           ;set bitmask
+                  rjmp  BBR_o
+.endmacro
+
+;fetch zp operand for BBS and set bitmask
+.macro      fetch_z_BBS    ;@0 = bit number
+            in    oplow,dbusin
+            out   abuslo,oplow      ;ZP operand fetch
+            out   abushi,zero
+            wait_data_valid 3       ;180ns minimum @ 16MHz
+                  ldi   a,1<<@0           ;set bitmask
+                  rjmp  BBS_o
+.endmacro
+
+;fetch zp operand for RMB and set bitmask
+.macro      fetch_z_RMB    ;@0 = bit number
+            in    oplow,dbusin
+            out   abuslo,oplow      ;ZP operand fetch
+            out   abushi,zero
+            wait_data_valid 3       ;180ns minimum @ 16MHz
+                  ldi   a,~(1<<@0)        ;set bitmask
+                  rjmp  RMB_o
+.endmacro
+
+;fetch zp operand for SMB and set bitmask
+.macro      fetch_z_SMB    ;@0 = bit number
+            in    oplow,dbusin
+            out   abuslo,oplow      ;ZP operand fetch
+            out   abushi,zero
+            wait_data_valid 3       ;180ns minimum @ 16MHz
+                  ldi   a,1<<@0           ;set bitmask
+                  rjmp  SMB_o
+.endmacro
+
+;*****************************************************************
+;
+; 6 5 0 2   e m u l a t i o n
+;
+;*****************************************************************
+;
+; ***** IRQ pin low interrupt *****
+;
+IRQ:
+         .if defined(spi_sel) || defined(i2c_sel)
+            sbrs  flags,dma_rpt     ;NMI during dma transfer?
+            ifs   IRQ_dma
+               cbr   flags,(1<<dma_rpt)
+               sts   dma_tab+1,zl      ;save current dma memory address
+               sts   dma_tab+2,zh
+               sts   dma_tab+5,xl      ;save dma count in progress
+               sts   dma_tab+6,xh
+               cbr   flags,(1<<modify) ;unlock extended memory address after modify
+               out   dbusddr,zero      ;switch back to read mode
+               out   cbus,readmem      ;OE to RAM
+               ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+               sbiw  pch:pcl,2         ;prepare for instruction retry
+               sbrs  flags,op_ind      ;3 byte instruction if direct
+            end   IRQ_dma
+         .endif
+            sbiw  pch:pcl,1         ;adjust PC (discard prefetch)
+            out   abuslo,allon      ;new PC high fetch from irq vector
+            out   abushi,allon
+                  ldi   zl,0xfe     ;preload vector low  
+                  ldi   a,IRQ_dis
+                  out   ibus,a
+                  .ifdef irq_dis_real     ;+3
+                     out   timsk,one         ;only TOV0 (single step) stays enabled
+                     ldi   a,0b11000         ;no USART interrupts, only RX & TX enable
+                     out   ucsrb,a
+                  .endif
+                  ;status merge while we are waiting for data
+                  mov   a,stat            ;merge status in 6502 format
+                  andi  a,0b11            ;------ZC
+            wait_data_valid 5       ;300ns minimum @ 16MHz
+            in    ophigh,dbusin
+            out   abuslo,zl         ;new PC low fetch from irq vector
+                  ;status merge while we are waiting for data
+                  bst   stat,2            ;<----<
+                  bld   a,7               ;N-------
+                  or    a,stat2           ;-V1BDI--
+                  sbr   stat2,0b100       ;I=1 (IRQ disabled)
+                  cbr   stat2,0b1000      ;D=0 (clear decimal mode)
+            wait_data_valid 5       ;300ns minimum @ 16MHz
+            in    oplow,dbusin
+            
+            out   abuslo,spointer   ;push pch
+            out   abushi,one
+            dec   spointer
+            out   cbus,writemem     ;WE, ~OE
+            out   dbusout,pch       ;precharge write
+            out   dbusddr,allon     ;output data valid
+            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+
+            out   abuslo,spointer   ;push pcl
+            dec   spointer
+            out   cbus,writemem     ;WE
+            out   dbusout,pcl       ;write
+            out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+
+            out   abuslo,spointer   ;push status
+            dec   spointer
+            out   cbus,writemem     ;WE
+            out   dbusout,a         ;write
+            out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+            out   dbusddr,zero      ;data hold ends after 60ns
+            out   cbus,readmem      ;OE / read mode back on
+
+            movw  pcl,oplow         ;load new PC
+
+            ldi   a,low(ramend)     ;discard AVR return address
+            out   spl,a
+
+            op_decode               ;next instruction
+
+;
+; ***** NMI pin high to low edge interrupt *****
+;
+NMI:
+         .if defined(spi_sel) || defined(i2c_sel)
+            sbrs  flags,dma_rpt     ;NMI during dma transfer?
+            ifs   NMI_dma
+               cbr   flags,(1<<dma_rpt)
+               sts   dma_tab+1,zl      ;save current dma memory address
+               sts   dma_tab+2,zh
+               sts   dma_tab+5,xl      ;save dma count in progress
+               sts   dma_tab+6,xh
+               cbr   flags,(1<<modify) ;unlock extended memory address after modify
+               out   dbusddr,zero      ;switch back to read mode
+               out   cbus,readmem      ;OE to RAM
+               ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+               sbiw  pch:pcl,2         ;prepare for instruction retry
+               sbrs  flags,op_ind      ;3 byte instruction if direct
+            end   NMI_dma
+         .endif
+            sbiw  pch:pcl,1         ;adjust PC (discard prefetch)
+            ldi   zl,0xfb           ;vector high first
+            out   abuslo,zl         ;new PC high fetch from irq vector
+            out   abushi,allon
+                  ldi   zl,0xfa     ;preload vector low  
+                  ldi   a,IRQ_dis
+                  out   ibus,a
+                  .ifdef irq_dis_real     ;+3
+                     out   timsk,one         ;only TOV0 (single step) stays enabled
+                     ldi   a,0b11000         ;no USART interrupts, only RX & TX enable
+                     out   ucsrb,a
+                  .endif
+                  ;status merge while we are waiting for data
+                  mov   a,stat            ;merge status in 6502 format
+                  andi  a,0b11            ;------ZC
+            wait_data_valid 5       ;300ns minimum @ 16MHz
+            in    ophigh,dbusin
+            out   abuslo,zl         ;new PC low fetch from irq vector
+                  ;status merge while we are waiting for data
+                  bst   stat,2            ;<----<
+                  bld   a,7               ;N-------
+                  or    a,stat2           ;-V1BDI--
+                  sbr   stat2,0b100       ;I=1 (IRQ disabled)
+                  cbr   stat2,0b1000      ;D=0 (clear decimal mode)
+            wait_data_valid 5       ;300ns minimum @ 16MHz
+            in    oplow,dbusin
+            
+            out   abuslo,spointer   ;push pch
+            out   abushi,one
+            dec   spointer
+            out   cbus,writemem     ;WE, ~OE
+            out   dbusout,pch       ;precharge write
+            out   dbusddr,allon     ;output data valid
+            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+
+            out   abuslo,spointer   ;push pcl
+            dec   spointer
+            out   cbus,writemem     ;WE
+            out   dbusout,pcl       ;write
+            out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+
+            out   abuslo,spointer   ;push status
+            dec   spointer
+            out   cbus,writemem     ;WE
+            out   dbusout,a         ;write
+            out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+            out   dbusddr,zero      ;data hold ends after 60ns
+            out   cbus,readmem      ;OE / read mode back on
+
+            movw  pcl,oplow         ;load new PC
+
+            ldi   a,low(ramend)     ;discard AVR return address
+            out   spl,a
+
+            op_decode               ;next instruction
+
+;
+; opcode template
+;
+; operand adressing modes:
+; a    absolute - LDA abs                     
+; x    absolute indexed X - LDA abs,x
+; y    absolute indexed Y - LDA abs,y
+; i    absolute indirect - JMP (abs)
+; s    single (implied) - TAX
+; m    immediate - LDA #
+; r    relative to PC - BEQ rel
+; z    zero page - LDA zp
+; zxi  zero page indexed X indirect - LDA (zp,x)
+; zx   zero page indexed X - LDA zp,x
+; zy   zero page indexed Y - LDA zp,y
+; ziy  zero page indirect indexed Y - LDA (zp),y
+;   additional CMOS addressing modes
+; zi   zero page indirect - LDA (zp)
+; xi   absolute indexed X indirect - JMP (abs,x)
+; zr   zero page, relative - BBRbit zp,rel
+;
+; adressing mode is added as suffix to the original opcode
+; examples: LDA_ziy, BEQ_r, TAX_s, JMP_a
+
+;*****************************************************************
+;
+; Implied adressing instructions
+;     Register, Stack
+;
+;*****************************************************************
+
+; opcode:         ASL A
+ASL_s:      in    opcode,dbusin     ;next opcode
+
+            lsl   rega              ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+
+            op_decode_single        ;next instruction
+
+; opcode:         CLC
+CLC_s:      in    opcode,dbusin     ;next opcode
+
+            cbr   stat,1            ;AVR emulated OP
+
+            op_decode_single        ;next instruction
+
+; opcode:         CLD
+CLD_s:      in    opcode,dbusin     ;next opcode
+
+            cbr   stat2,0b1000      ;AVR emulated OP
+
+            op_decode_single        ;next instruction
+
+; opcode:         CLI
+CLI_s:      in    opcode,dbusin     ;next opcode
+
+            cbr   stat2,0b100
+            ldi   a,IRQ_ena
+            out   ibus,a
+            .ifdef irq_dis_real     ;+6
+               lds   a,timer_ena       ;enable timers interrupts
+               out   timsk,a
+               lds   a,usart_ena       ;enable usart interrupts
+               out   ucsrb,a
+            .endif
+
+            op_decode_single        ;next instruction
+
+; opcode:         CLV
+CLV_s:      in    opcode,dbusin     ;next opcode
+
+            cbr   stat2,0b1000000   ;AVR emulated OP
+
+            op_decode_single        ;next instruction
+
+; opcode:         DEC A
+DEC_s:      in    opcode,dbusin     ;next opcode
+
+            out   sreg,stat         ;keep C
+            dec   rega              ;AVR emulated OP
+            in    stat,sreg         ;save NZ, keep C
+
+            op_decode_single        ;next instruction
+
+; opcode:         DEX
+DEX_s:      in    opcode,dbusin     ;next opcode
+
+            out   sreg,stat         ;keep C
+            dec   regx              ;AVR emulated OP
+            in    stat,sreg         ;save NZ, keep C
+
+            op_decode_single        ;next instruction
+
+; opcode:         DEX
+DEY_s:      in    opcode,dbusin     ;next opcode
+
+            out   sreg,stat         ;keep C
+            dec   regy              ;AVR emulated OP
+            in    stat,sreg         ;save NZ, keep C
+
+            op_decode_single        ;next instruction
+
+; opcode:         INC A
+INC_s:      in    opcode,dbusin     ;next opcode
+
+            out   sreg,stat         ;keep C
+            inc   rega              ;AVR emulated OP
+            in    stat,sreg         ;save NZ, keep C
+
+            op_decode_single        ;next instruction
+
+; opcode:         INX
+INX_s:      in    opcode,dbusin     ;next opcode
+
+            out   sreg,stat         ;keep C
+            inc   regx              ;AVR emulated OP
+            in    stat,sreg         ;save NZ, keep C
+
+            op_decode_single        ;next instruction
+
+; opcode:         INY
+INY_s:      in    opcode,dbusin     ;next opcode
+
+            out   sreg,stat         ;keep C
+            inc   regy              ;AVR emulated OP
+            in    stat,sreg         ;save NZ, keep C
+
+            op_decode_single        ;next instruction
+
+; opcode:         LSR A
+LSR_s:      in    opcode,dbusin     ;next opcode
+
+            lsr   rega              ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+
+            op_decode_single        ;next instruction
+
+; opcode:         NOP
+; additional NOPs in the CMOS core replace invalid opcodes
+NOP38_s:    wait_ns  2000,30        ;3 byte, 8 6502 cycles
+            ldi   a,10              ;burn 30 cycles
+NOP_delay:  dec   a
+            brne  NOP_delay
+
+NOP34_s:    wait_ns  500,4          ;3 byte, 4 6502 cycles
+            adiw  pch:pcl,1
+            rjmp  NOP23_s
+
+NOP24_s:    wait_ns  500,0          ;2 byte, 4 6502 cycles
+NOP23_s:    wait_ns  500,0          ;2 byte, 3 6502 cycles
+NOP22_s:    wait_ns  1000,15        ;2 byte, 2 6502 cycles
+
+            op_decode               ;next instruction
+
+NOP_s:      wait_ns  500,3          ;1 byte, 2 6502 cycles
+NOP11_s:    wait_ns  500,11         ;1 byte, 1 6502 cycle
+
+            in    opcode,dbusin     ;next opcode
+            op_decode_single        ;next instruction
+
+; opcode:         PHA
+PHA_s:      in    opcode,dbusin     ;next opcode
+
+            out   abuslo,spointer   ;load address from SP
+            out   abushi,one
+            dec   spointer
+            out   cbus,writemem     ;WE, ~OE
+            out   dbusout,rega      ;precharge write
+            out   dbusddr,allon     ;output data valid
+            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+            out   dbusddr,zero      ;data hold ends after 60ns
+            out   cbus,readmem      ;OE / read mode back on
+
+            op_decode_single        ;next instruction
+
+; opcode:         PHX
+PHX_s:      in    opcode,dbusin     ;next opcode
+
+            out   abuslo,spointer   ;load address from SP
+            out   abushi,one
+            dec   spointer
+            out   cbus,writemem     ;WE, ~OE
+            out   dbusout,regx      ;precharge write
+            out   dbusddr,allon     ;output data valid
+            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+            out   dbusddr,zero      ;data hold ends after 60ns
+            out   cbus,readmem      ;OE / read mode back on
+
+            op_decode_single        ;next instruction
+
+; opcode:         PHY
+PHY_s:      in    opcode,dbusin     ;next opcode
+
+            out   abuslo,spointer   ;load address from SP
+            out   abushi,one
+            dec   spointer
+            out   cbus,writemem     ;WE, ~OE
+            out   dbusout,regy      ;precharge write
+            out   dbusddr,allon     ;output data valid
+            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+            out   dbusddr,zero      ;data hold ends after 60ns
+            out   cbus,readmem      ;OE / read mode back on
+
+            op_decode_single        ;next instruction
+
+; opcode:         PHP
+PHP_s:      in    opcode,dbusin     ;next opcode
+
+            mov   a,stat            ;merge status in 6502 format
+            andi  a,0b11            ;------ZC
+            bst   stat,2            ;<----<
+            bld   a,7               ;N-------
+            or    a,stat2           ;-V1BDI--
+            ori   a,0b110000        ;  ^^=1 (pushed by software)
+
+            out   abuslo,spointer   ;load address from SP
+            out   abushi,one
+            dec   spointer
+            out   cbus,writemem     ;WE, ~OE
+            out   dbusout,a         ;precharge write
+            out   dbusddr,allon     ;output data valid
+            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+            out   dbusddr,zero      ;data hold ends after 60ns
+            out   cbus,readmem      ;OE / read mode back on
+
+            op_decode_single        ;next instruction
+
+; opcode:         PLA
+PLA_s:      in    opcode,dbusin     ;next opcode
+
+            inc   spointer          
+            out   abuslo,spointer   ;load address from SP
+            out   abushi,one
+            wait_data_valid 0       ;0ns minimum @ 16MHz
+            in    rega,dbusin
+            flags_gen_nz rega
+
+            op_decode_single        ;next instruction
+
+; opcode:         PLX
+PLX_s:      in    opcode,dbusin     ;next opcode
+
+            inc   spointer          
+            out   abuslo,spointer   ;load address from SP
+            out   abushi,one
+            wait_data_valid 0       ;0ns minimum @ 16MHz
+            in    regx,dbusin
+            flags_gen_nz regx
+
+            op_decode_single        ;next instruction
+
+; opcode:         PLY
+PLY_s:      in    opcode,dbusin     ;next opcode
+
+            inc   spointer          
+            out   abuslo,spointer   ;load address from SP
+            out   abushi,one
+            wait_data_valid 0       ;0ns minimum @ 16MHz
+            in    regy,dbusin
+            flags_gen_nz regy
+
+            op_decode_single        ;next instruction
+
+; opcode:         PLP
+PLP_s:      in    opcode,dbusin     ;next opcode
+
+            inc   spointer          
+            out   abuslo,spointer   ;load address from SP
+            out   abushi,one
+            wait_data_valid 0       ;0ns minimum @ 16MHz
+            in    stat2,dbusin
+
+            IRQ_restore
+
+            mov   stat,stat2        ;restore AVR format
+            andi  stat,0b11         ;------ZC
+            bst   stat2,7           ;>---->
+            bld   stat,2            ;-----N--
+
+            andi  stat2,0b1101100   ;-V1BDI-- (Break cleared)
+            ori   stat2,0b0100000   ;  ^=1 (set unused)
+
+            op_decode_single        ;next instruction
+
+; opcode:         ROL A
+ROL_s:      in    opcode,dbusin     ;next opcode
+
+            out   sreg,stat         ;get C
+            rol   rega              ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+
+            op_decode_single        ;next instruction
+
+; opcode:         ROR A
+ROR_s:      in    opcode,dbusin     ;next opcode
+
+            out   sreg,stat         ;get C
+            ror   rega              ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+
+            op_decode_single        ;next instruction
+
+; opcode:         SEC
+SEC_s:      in    opcode,dbusin     ;next opcode
+
+            sbr   stat,1            ;AVR emulated OP
+
+            op_decode_single        ;next instruction
+
+; opcode:         SED
+SED_s:      in    opcode,dbusin     ;next opcode
+
+            sbr   stat2,0b1000      ;AVR emulated OP
+
+            op_decode_single        ;next instruction
+
+; opcode:         SEI
+SEI_s:      in    opcode,dbusin     ;next opcode
+
+            sbr   stat2,0b100       ;AVR emulated OP
+            ldi   a,IRQ_dis
+            out   ibus,a
+            .ifdef irq_dis_real     ;+3
+               out   timsk,one         ;only TOV0 (single step) stays enabled
+               ldi   a,0b11000         ;no USART interrupts, only RX & TX enable
+               out   ucsrb,a
+            .endif
+
+            op_decode_single        ;next instruction
+
+; opcode:         STP
+STP_s:      jmp   deb_stop          ;halt execution & display registers
+
+; opcode:         TAX
+TAX_s:      in    opcode,dbusin     ;next opcode
+
+            mov   regx,rega         ;AVR emulated OP
+            flags_gen_nz regx
+
+            op_decode_single        ;next instruction
+
+; opcode:         TAY
+TAY_s:      in    opcode,dbusin     ;next opcode
+
+            mov   regy,rega         ;AVR emulated OP
+            flags_gen_nz regy
+
+            op_decode_single        ;next instruction
+
+; opcode:         TSX
+TSX_s:      in    opcode,dbusin     ;next opcode
+
+            mov   regx,spointer     ;AVR emulated OP
+            flags_gen_nz regx
+
+            op_decode_single        ;next instruction
+
+; opcode:         TXA
+TXA_s:      in    opcode,dbusin     ;next opcode
+
+            mov   rega,regx         ;AVR emulated OP
+            flags_gen_nz rega
+
+            op_decode_single        ;next instruction
+
+; opcode:         TXS
+TXS_s:      in    opcode,dbusin     ;next opcode
+
+            mov   spointer,regx     ;AVR emulated OP
+                                    ;flags are not changed 
+
+            op_decode_single        ;next instruction
+
+; opcode:         TYA
+TYA_s:      in    opcode,dbusin     ;next opcode
+
+            mov   rega,regy         ;AVR emulated OP
+            flags_gen_nz rega
+
+            op_decode_single        ;next instruction
+
+; opcode:         WAI
+WAI_s:      in    opcode,dbusin     ;get ready for next instruction
+            out   abuslo,pcl        ;operand address low prefetch
+            out   abushi,pch
+                  wait_data_valid 10       ;600ns minimum @ 16MHz
+            adiw  pch:pcl,1
+
+            sbrs  stat2,2           ;if interrupts disabled
+            rjmp  WAI_hold
+
+            sbis  cbusin,3          ;no IRQ pending
+            ijmp                    ;execute next opcode
+
+         .ifdef irq_dis_real
+            do    WAI_loop_dis
+               sbic  cbusin,3       ;wait direct IRQ               
+            loop  WAI_loop_dis
+            ijmp                    ;execute next opcode
+         .endif
+
+WAI_hold:   sei                     ;wait for interrupts
+            sbiw  pch:pcl,2         ;discard prefetch on interrupt
+            do    WAI_loop
+               sbic  cbusin,3       ;or direct IRQ               
+            loop  WAI_loop
+            cli
+            adiw  pch:pcl,2         ;use prefetch on direct IRQ
+
+WAI_direct: ijmp                    ;execute next opcode
+
+;*****************************************************************
+;
+; Program counter
+;     instructions modifying the PC
+;
+;*****************************************************************
+
+; opcode:         BBR
+BBR0_zr:    fetch_z_BBR  0
+BBR1_zr:    fetch_z_BBR  1
+BBR2_zr:    fetch_z_BBR  2
+BBR3_zr:    fetch_z_BBR  3
+BBR4_zr:    fetch_z_BBR  4
+BBR5_zr:    fetch_z_BBR  5
+BBR6_zr:    fetch_z_BBR  6
+BBR7_zr:    fetch_z_BBR  7
+
+BBR_o:      in    operand,dbusin
+            out   abuslo,pcl        ;relative branch address fetch
+            out   abushi,pch
+                  adiw  pch:pcl,1         ;pc -> next instruction
+                  and   a,operand         ;test masked bit
+                  brne  BBR_n             ;skip branch if 1
+            wait_data_valid 4       ;240ns minimum @ 16MHz
+
+            in    operand,dbusin
+            clr   a                 ;expand sign bit
+            sbrc  operand,7         ;negative?
+            dec   a
+            add   pcl,operand       ;set new PC
+            adc   pch,a
+
+BBR_n:      op_decode
+            
+; opcode:         BBS
+BBS0_zr:    fetch_z_BBS  0
+BBS1_zr:    fetch_z_BBS  1
+BBS2_zr:    fetch_z_BBS  2
+BBS3_zr:    fetch_z_BBS  3
+BBS4_zr:    fetch_z_BBS  4
+BBS5_zr:    fetch_z_BBS  5
+BBS6_zr:    fetch_z_BBS  6
+BBS7_zr:    fetch_z_BBS  7
+
+BBS_o:      in    operand,dbusin
+            out   abuslo,pcl        ;relative branch address fetch
+            out   abushi,pch
+                  adiw  pch:pcl,1         ;pc -> next instruction
+                  and   a,operand         ;test masked bit
+                  breq  BBS_n             ;skip branch if 0
+            wait_data_valid 4       ;240ns minimum @ 16MHz
+
+            in    operand,dbusin
+            clr   a                 ;expand sign bit
+            sbrc  operand,7         ;negative?
+            dec   a
+            add   pcl,operand       ;set new PC
+            adc   pch,a
+
+BBS_n:      op_decode
+
+; opcode:         BCC
+BCC_r:      sbrc  stat,0
+            adgen_r                 ;branch if skip
+
+; opcode:         BCS
+BCS_r:      sbrs  stat,0
+            adgen_r                 ;branch if skip
+
+; opcode:         BEQ
+BEQ_r:      sbrs  stat,1
+            adgen_r                 ;branch if skip
+
+; opcode:         BMI
+BMI_r:      sbrs  stat,2
+            adgen_r                 ;branch if skip
+
+; opcode:         BNE
+BNE_r:      sbrc  stat,1
+            adgen_r                 ;branch if skip
+
+; opcode:         BPL
+BPL_r:      sbrc  stat,2
+            adgen_r                 ;branch if skip
+
+; opcode:         BVC
+BVC_r:      sbrc  stat2,6
+            adgen_r                 ;branch if skip
+
+; opcode:         BVS
+BVS_r:      sbrs  stat2,6
+            adgen_r                 ;branch if skip
+
+; opcode:         JMP
+JMP_xi:     in    oplow,dbusin      ;save low pointer to pc     
+            out   abuslo,pcl        ;fetch high pointer to pc
+            out   abushi,pch
+                  mov   pcl,oplow
+                  add   pcl,regx
+            wait_data_valid 2       ;120ns minimum @ 16MHz
+            in    pch,dbusin        ;point to new pc
+            adc   pch,zero
+            out   abuslo,pcl        ;fetch pc low  
+            out   abushi,pch
+            wait_data_valid 4       ;240ns minimum @ 16MHz
+                  adiw  pch:pcl,1
+                  rjmp  JMP_a
+
+JMP_i:      in    oplow,dbusin      ;save low pointer to pc     
+            out   abuslo,pcl        ;fetch high pointer to pc
+            out   abushi,pch
+                  mov   pcl,oplow
+            wait_data_valid 1       ;60ns minimum @ 16MHz
+            in    pch,dbusin        ;point to new pc
+
+            out   abuslo,pcl        ;fetch pc low  
+            out   abushi,pch
+                  adiw  pch:pcl,1
+            wait_data_valid 2       ;120ns minimum @ 16MHz
+
+JMP_a:      in    oplow,dbusin      ;save pc low   
+            out   abuslo,pcl        ;fetch pc high
+            out   abushi,pch
+                  mov   pcl,oplow
+            wait_data_valid 1       ;60ns minimum @ 16MHz
+            in    pch,dbusin        ;load new pc
+
+            op_decode               ;next instruction
+
+; opcode:         JSR
+JSR_a:      in    oplow,dbusin      ;save new PC as operand address
+            out   abuslo,pcl        ;new PC high fetch
+            out   abushi,pch
+                                    ;pc++ skipped
+            wait_data_valid 0       ;0ns minimum @ 16MHz
+            in    ophigh,dbusin
+            
+            out   abuslo,spointer   ;push pch
+            out   abushi,one
+            dec   spointer
+            out   cbus,writemem     ;WE, ~OE
+            out   dbusout,pch       ;precharge write
+            out   dbusddr,allon     ;output data valid
+            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+
+            out   abuslo,spointer   ;push pcl
+            dec   spointer
+            out   cbus,writemem     ;WE
+            out   dbusout,pcl       ;precharge write
+            out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+            out   dbusddr,zero      ;data hold ends after 60ns
+            out   cbus,readmem      ;OE / read mode back on
+
+            movw  pcl,oplow         ;load new PC
+
+            op_decode               ;next instruction
+
+; opcode:         RTS
+RTS_s:      inc   spointer          
+            out   abuslo,spointer   ;pull pcl
+            out   abushi,one
+                  inc   spointer          
+            wait_data_valid 1       ;60ns minimum @ 16MHz
+            in    pcl,dbusin
+            out   abuslo,spointer   ;pull pch
+            wait_data_valid 0       ;0ns minimum @ 16MHz
+            in    pch,dbusin
+            adiw  pch:pcl,1         ;point to next instruction
+
+RTI_skip_WAI:
+            op_decode               ;next instruction
+
+; opcode:         RTI
+RTI_s:      inc   spointer          
+            out   abuslo,spointer   ;pull status
+            out   abushi,one
+                  inc   spointer
+            wait_data_valid 1       ;60ns minimum @ 16MHz
+            in    stat2,dbusin
+            out   abuslo,spointer   ;pull pcl
+                  inc   spointer          
+                  ;status restore while we are waiting for data
+                  IRQ_restore
+                  mov   stat,stat2        ;restore AVR format
+            wait_data_valid 6       ;360ns minimum @ 16MHz
+            in    pcl,dbusin
+            out   abuslo,spointer   ;pull pch
+                  ;status restore while we are waiting for data
+                  andi  stat,0b11         ;------ZC
+                  bst   stat2,7           ;>---->
+                  bld   stat,2            ;-----N--
+                  andi  stat2,0b1101100   ;-V1BDI-- (Break cleared)
+                  ori   stat2,0b0100000   ;  ^=1 (set unused)
+            wait_data_valid 5       ;300ns minimum @ 16MHz
+            in    pch,dbusin
+
+            out   abuslo,pcl        ;opcode fetch
+            out   abushi,pch
+                  adiw  pch:pcl,1         ;pc -> op low
+            wait_data_valid 2       ;120ns minimum @ 16MHz
+            in    opcode,dbusin
+            cpi   opcode,0xcb       ;wait?
+            breq  RTI_skip_WAI
+
+            op_decode_single
+
+; opcode:         BRK
+BRK_s:           ;save new PC as operand address
+            out   abuslo,allon      ;new PC high fetch from irq vector
+            out   abushi,allon
+                  ldi   zl,0xfe     ;preload vector low   
+                  ldi   a,IRQ_dis
+                  out   ibus,a
+                  .ifdef irq_dis_real     ;+3
+                     out   timsk,one         ;only TOV0 (single step) stays enabled
+                     ldi   a,0b11000         ;no USART interrupts, only RX & TX enable
+                     out   ucsrb,a
+                  .endif
+                  ;status merge while we are waiting for data
+                  mov   a,stat            ;merge status in 6502 format
+                  andi  a,0b11            ;------ZC
+            wait_data_valid 5       ;300ns minimum @ 16MHz
+            in    ophigh,dbusin
+            out   abuslo,zl         ;new PC low fetch from irq vector
+                  ;status merge while we are waiting for data
+                  bst   stat,2            ;<----<
+                  bld   a,7               ;N-------
+                  or    a,stat2           ;-V1BDI--
+                  sbr   a,0b110000        ;  ^^=1 (pushed by Break)
+                  sbr   stat2,0b100       ;I=1 (IRQ disabled)
+                  cbr   stat2,0b1000      ;D=0 (clear decimal mode)
+            wait_data_valid 6       ;360ns minimum @ 16MHz
+            in    oplow,dbusin
+            
+            out   abuslo,spointer   ;push pch
+            out   abushi,one
+            dec   spointer
+            out   cbus,writemem     ;WE, ~OE
+            out   dbusout,pch       ;precharge write
+            out   dbusddr,allon     ;output data valid
+            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+
+            out   abuslo,spointer   ;push pcl
+            dec   spointer
+            out   cbus,writemem     ;WE
+            out   dbusout,pcl       ;write
+            out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+
+            out   abuslo,spointer   ;push status
+            dec   spointer
+            out   cbus,writemem     ;WE
+            out   dbusout,a         ;write
+            out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+            out   dbusddr,zero      ;data hold ends after 60ns
+            out   cbus,readmem      ;OE / read mode back on
+
+            movw  pcl,oplow         ;load new PC
+
+            op_decode               ;next instruction
+
+
+;
+; instruction decode vector table
+;
+            align 8           ;align to page boundary
+
+oc_tab:     rjmp  BRK_s       ;0x00
+            rjmp  ORA_zxi 
+            rjmp  NOP22_s 
+            rjmp  NOP11_s 
+            rjmp  TSB_z 
+            rjmp  ORA_z 
+            rjmp  ASL_z 
+            rjmp  RMB0_z 
+            rjmp  PHP_s 
+            rjmp  ORA_m 
+            rjmp  ASL_s 
+            rjmp  NOP11_s 
+            rjmp  TSB_a 
+            rjmp  ORA_a 
+            rjmp  ASL_a 
+            rjmp  BBR0_zr 
+            rjmp  BPL_r       ;0x10
+            rjmp  ORA_ziy 
+            rjmp  ORA_zi 
+            rjmp  NOP11_s 
+            rjmp  TRB_z 
+            rjmp  ORA_zx 
+            rjmp  ASL_zx 
+            rjmp  RMB1_z 
+            rjmp  CLC_s 
+            rjmp  ORA_y 
+            rjmp  INC_s 
+            rjmp  NOP11_s 
+            rjmp  TRB_a 
+            rjmp  ORA_x 
+            rjmp  ASL_x 
+            rjmp  BBR1_zr 
+            rjmp  JSR_a       ;0x20
+            rjmp  AND_zxi 
+            rjmp  NOP22_s 
+            rjmp  NOP11_s 
+            rjmp  BIT_z 
+            rjmp  AND_z 
+            rjmp  ROL_z 
+            rjmp  RMB2_z 
+            rjmp  PLP_s 
+            rjmp  AND_m 
+            rjmp  ROL_s 
+            rjmp  NOP11_s 
+            rjmp  BIT_a
+            rjmp  AND_a 
+            rjmp  ROL_a
+            rjmp  BBR2_zr
+            rjmp  BMI_r       ;0x30
+            rjmp  AND_ziy 
+            rjmp  AND_zi
+            rjmp  NOP11_s 
+            rjmp  BIT_zx 
+            rjmp  AND_zx 
+            rjmp  ROL_zx 
+            rjmp  RMB3_z 
+            rjmp  SEC_s
+            rjmp  AND_y
+            rjmp  DEC_s
+            rjmp  NOP11_s 
+            rjmp  BIT_x 
+            rjmp  AND_x 
+            rjmp  ROL_x
+            rjmp  BBR3_zr
+            rjmp  RTI_s       ;0x40
+            rjmp  EOR_zxi 
+            rjmp  NOP22_s 
+            rjmp  NOP11_s 
+            rjmp  NOP23_s 
+            rjmp  EOR_z 
+            rjmp  LSR_z 
+            rjmp  RMB4_z 
+            rjmp  PHA_s 
+            rjmp  EOR_m 
+            rjmp  LSR_s 
+            rjmp  NOP11_s 
+            rjmp  JMP_a
+            rjmp  EOR_a 
+            rjmp  LSR_a 
+            rjmp  BBR4_zr
+            rjmp  BVC_r       ;0x50
+            rjmp  EOR_ziy 
+            rjmp  EOR_zi 
+            rjmp  NOP11_s 
+            rjmp  NOP24_s 
+            rjmp  EOR_zx 
+            rjmp  LSR_zx 
+            rjmp  RMB5_z 
+            rjmp  CLI_s 
+            rjmp  EOR_y 
+            rjmp  PHY_s 
+            rjmp  NOP11_s 
+            rjmp  NOP38_s 
+            rjmp  EOR_x 
+            rjmp  LSR_x 
+            rjmp  BBR5_zr
+            rjmp  RTS_s       ;0x60
+            rjmp  ADC_zxi 
+            rjmp  NOP22_s
+            rjmp  NOP11_s 
+            rjmp  STZ_z 
+            rjmp  ADC_z 
+            rjmp  ROR_z 
+            rjmp  RMB6_z
+            rjmp  PLA_s 
+            rjmp  ADC_m 
+            rjmp  ROR_s 
+            rjmp  NOP11_s 
+            rjmp  JMP_i 
+            rjmp  ADC_a 
+            rjmp  ROR_a 
+            rjmp  BBR6_zr 
+            rjmp  BVS_r       ;0x70
+            rjmp  ADC_ziy 
+            rjmp  ADC_zi 
+            rjmp  NOP11_s 
+            rjmp  STZ_zx 
+            rjmp  ADC_zx 
+            rjmp  ROR_zx 
+            rjmp  RMB7_z
+            rjmp  SEI_s 
+            rjmp  ADC_y 
+            rjmp  PLY_s 
+            rjmp  NOP11_s 
+            rjmp  JMP_xi 
+            rjmp  ADC_x 
+            rjmp  ROR_x 
+            rjmp  BBR7_zr
+            rjmp  BRA_r       ;0x80
+            rjmp  STA_zxi 
+            rjmp  NOP22_s 
+            rjmp  NOP11_s 
+            rjmp  STY_z 
+            rjmp  STA_z 
+            rjmp  STX_z 
+            rjmp  SMB0_z
+            rjmp  DEY_s
+            rjmp  BIT_m2      ;flags anomaly! 
+            rjmp  TXA_s 
+            rjmp  NOP11_s 
+            rjmp  STY_a 
+            rjmp  STA_a 
+            rjmp  STX_a 
+            rjmp  BBS0_zr
+            rjmp  BCC_r       ;0x90
+            rjmp  STA_ziy 
+            rjmp  STA_zi 
+            rjmp  NOP11_s 
+            rjmp  STY_zx 
+            rjmp  STA_zx 
+            rjmp  STX_zy 
+            rjmp  SMB1_z 
+            rjmp  TYA_s 
+            rjmp  STA_y 
+            rjmp  TXS_s 
+            rjmp  NOP11_s 
+            rjmp  STZ_a 
+            rjmp  STA_x 
+            rjmp  STZ_x 
+            rjmp  BBS1_zr 
+            rjmp  LDY_m       ;0xa0
+            rjmp  LDA_zxi 
+            rjmp  LDX_m 
+            rjmp  NOP11_s 
+            rjmp  LDY_z 
+            rjmp  LDA_z 
+            rjmp  LDX_z 
+            rjmp  SMB2_z 
+            rjmp  TAY_s 
+            rjmp  LDA_m 
+            rjmp  TAX_s 
+            rjmp  NOP11_s 
+            rjmp  LDY_a
+            rjmp  LDA_a 
+            rjmp  LDX_a 
+            rjmp  BBS2_zr 
+            rjmp  BCS_r       ;0xb0
+            rjmp  LDA_ziy 
+            rjmp  LDA_zi 
+            rjmp  NOP11_s 
+            rjmp  LDY_zx 
+            rjmp  LDA_zx 
+            rjmp  LDX_zy 
+            rjmp  SMB3_z 
+            rjmp  CLV_s 
+            rjmp  LDA_y 
+            rjmp  TSX_s 
+            rjmp  NOP11_s 
+            rjmp  LDY_x 
+            rjmp  LDA_x 
+            rjmp  LDX_y 
+            rjmp  BBS3_zr 
+            rjmp  CPY_m       ;0xc0
+            rjmp  CMP_zxi 
+            rjmp  NOP22_s 
+            rjmp  NOP11_s 
+            rjmp  CPY_z 
+            rjmp  CMP_z 
+            rjmp  DEC_z 
+            rjmp  SMB4_z
+            rjmp  INY_s 
+            rjmp  CMP_m 
+            rjmp  DEX_s 
+            rjmp  WAI_s 
+            rjmp  CPY_a 
+            rjmp  CMP_a 
+            rjmp  DEC_a 
+            rjmp  BBS4_zr
+            rjmp  BNE_r       ;0xd0
+            rjmp  CMP_ziy 
+            rjmp  CMP_zi 
+            rjmp  NOP11_s 
+            rjmp  NOP24_s 
+            rjmp  CMP_zx 
+            rjmp  DEC_zx 
+            rjmp  SMB5_z
+            rjmp  CLD_s 
+            rjmp  CMP_y 
+            rjmp  PHX_s 
+            rjmp  STP_s 
+            rjmp  NOP34_s 
+            rjmp  CMP_x
+            rjmp  DEC_x 
+            rjmp  BBS5_zr
+            rjmp  CPX_m       ;0xe0
+            rjmp  SBC_zxi 
+            rjmp  NOP22_s 
+            rjmp  NOP11_s 
+            rjmp  CPX_z 
+            rjmp  SBC_z 
+            rjmp  INC_z 
+            rjmp  SMB6_z
+            rjmp  INX_s 
+            rjmp  SBC_m 
+            rjmp  NOP_s 
+            rjmp  NOP11_s 
+            rjmp  CPX_a 
+            rjmp  SBC_a 
+            rjmp  INC_a 
+            rjmp  BBS6_zr
+            rjmp  BEQ_r       ;0xf0
+            rjmp  SBC_ziy 
+            rjmp  SBC_zi 
+            rjmp  NOP11_s 
+            rjmp  NOP24_s 
+            rjmp  SBC_zx 
+            rjmp  INC_zx 
+            rjmp  SMB7_z
+            rjmp  SED_s 
+            rjmp  SBC_y 
+            rjmp  PLX_s 
+            rjmp  NOP11_s 
+            rjmp  NOP34_s 
+            rjmp  SBC_x 
+            rjmp  INC_x 
+            rjmp  BBS7_zr
+
+
+;*****************************************************************
+;
+; Memory read instructions
+;     Load, arithmetic & logical
+;
+;*****************************************************************
+
+; opcode:         ADC
+            adgen_x     ADC_        ;abs,X
+            adgen_y     ADC_        ;abs,Y
+            adgen_zi    ADC_        ;(ZP) indirect
+            adgen_zxi   ADC_        ;(ZP,X) indexed indirect
+            adgen_ziy   ADC_        ;(ZP),Y indirect indexed
+            adgen_zx    ADC_        ;ZP,X
+            adgen_z     ADC_        ;ZP absolute
+ADC_a:      adgen_a                 ;absolute
+
+ADC_o:      op_fetch                ;common entry after address generate
+ADC_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+
+            sbrc  stat2,3           ;test decimal flag
+            rjmp  ADC_d
+            out   sreg,stat         ;get C
+            adc   rega,operand      ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+            bst   stat,3            ;save V
+            bld   stat2,6
+
+            op_decode               ;next instruction
+
+ADC_d:      addi  rega,0x66         ;decimal correction
+            out   sreg,stat
+            adc   rega,operand
+            in    stat,sreg
+            brcs  ADC_d2            ;MSD
+            subi  rega,0x60
+            out   sreg,stat
+ADC_d2:     brhs  ADC_d3            ;LSD
+            subi  rega,0x06
+ADC_d3:     flags_gen_nz rega       ;CMOS requires NZC to be valid in BCD mode
+                                    ;V is absolutely useless in BCD mode
+                                    ;so V is not valid anyway
+            op_decode               ;next instruction
+
+; opcode:         AND
+            adgen_x     AND_        ;abs,X
+            adgen_y     AND_        ;abs,Y
+            adgen_zi    AND_        ;(ZP) indirect
+            adgen_zxi   AND_        ;(ZP,X) indexed indirect
+            adgen_ziy   AND_        ;(ZP),Y indirect indexed
+            adgen_zx    AND_        ;ZP,X
+            adgen_z     AND_        ;ZP absolute
+AND_a:      adgen_a                 ;absolute
+
+AND_o:      op_fetch                ;common entry after address generate
+AND_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+
+            out   sreg,stat         ;keep C
+            and   rega,operand      ;AVR emulated OP
+            in    stat,sreg         ;save NZ, keep C
+
+            op_decode               ;next instruction
+
+; opcode:         BIT
+            adgen_x     BIT_        ;abs,X
+            adgen_zx    BIT_        ;ZP,X
+            adgen_z     BIT_        ;ZP absolute
+BIT_a:      adgen_a                 ;absolute
+
+BIT_o:      op_fetch                ;common entry after address generate
+BIT_m:      in    operand,dbusin
+
+            mov   a,rega            ;keep A
+            out   sreg,stat         ;keep C
+            and   a,operand         ;A & M -> Z
+            in    stat,sreg
+            bst   operand,6         ;M6 -> V
+            bld   stat2,6
+            bst   operand,7         ;M7 -> N
+            bld   stat,2
+
+            op_decode               ;next instruction
+
+BIT_m2:     in    operand,dbusin    ;true immediate op will not modify VN
+
+            and   operand,rega      ;A & M -> Z
+            in    a,sreg
+            bst   a,1               ;save Z
+            bld   stat,1
+
+            op_decode               ;next instruction
+
+
+; opcode:         CMP
+; a compare in a 6502 works with reversed carry opposed to an AVR
+; the reason: a 6502 performs an add with complemented operand as a compare
+            adgen_x     CMP_        ;abs,X
+            adgen_y     CMP_        ;abs,Y
+            adgen_zi    CMP_        ;(ZP) indirect
+            adgen_zxi   CMP_        ;(ZP,X) indexed indirect
+            adgen_ziy   CMP_        ;(ZP),Y indirect indexed
+            adgen_zx    CMP_        ;ZP,X
+            adgen_z     CMP_        ;ZP absolute
+CMP_a:      adgen_a                 ;absolute
+
+CMP_o:      op_fetch                ;common entry after address generate
+CMP_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+
+            cp    rega,operand      ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+            eor   stat,one          ;invert C
+
+            op_decode               ;next instruction
+
+; opcode:         CPX
+; a compare in a 6502 works with reversed carry opposed to an AVR
+; the reason: a 6502 performs an add with complemented operand as a compare
+            adgen_z     CPX_        ;ZP absolute
+CPX_a:      adgen_a                 ;absolute
+
+CPX_o:      op_fetch                ;common entry after address generate
+CPX_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+
+            cp    regx,operand      ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+            eor   stat,one          ;invert C
+
+            op_decode               ;next instruction
+
+; opcode:         CPY
+; a compare in a 6502 works with reversed carry opposed to an AVR
+; the reason: a 6502 performs an add with complemented operand as a compare
+            adgen_z     CPY_        ;ZP absolute
+CPY_a:      adgen_a                 ;absolute
+
+CPY_o:      op_fetch                ;common entry after address generate
+CPY_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+
+            cp    regy,operand      ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+            eor   stat,one          ;invert C
+
+            op_decode               ;next instruction
+
+; opcode:         EOR
+            adgen_x     EOR_        ;abs,X
+            adgen_y     EOR_        ;abs,Y
+            adgen_zi    EOR_        ;(ZP) indirect
+            adgen_zxi   EOR_        ;(ZP,X) indexed indirect
+            adgen_ziy   EOR_        ;(ZP),Y indirect indexed
+            adgen_zx    EOR_        ;ZP,X
+            adgen_z     EOR_            ;ZP absolute
+EOR_a:      adgen_a                 ;absolute
+
+EOR_o:      op_fetch                ;common entry after address generate
+EOR_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+
+            out   sreg,stat         ;keep C
+            eor   rega,operand      ;AVR emulated OP
+            in    stat,sreg         ;save NZ, keep C
+
+            op_decode               ;next instruction
+
+; opcode:         LDA
+            adgen_x     LDA_        ;abs,X
+            adgen_y     LDA_        ;abs,Y
+            adgen_zi    LDA_        ;(ZP) indirect
+            adgen_zxi   LDA_        ;(ZP,X) indexed indirect
+            adgen_ziy   LDA_        ;(ZP),Y indirect indexed
+            adgen_zx    LDA_        ;ZP,X
+            adgen_z     LDA_        ;ZP absolute
+LDA_a:      adgen_a                 ;absolute
+
+LDA_o:      reg_fetch rega          ;common entry after address generate
+LDA_m:      in    rega,dbusin       ;same for immediate
+
+            flags_gen_nz rega
+
+            op_decode               ;next instruction
+
+; opcode:         LDX
+            adgen_y     LDX_        ;abs,Y
+            adgen_zy    LDX_        ;ZP,Y
+            adgen_z     LDX_        ;ZP absolute
+LDX_a:      adgen_a                 ;absolute
+
+LDX_o:      reg_fetch regx          ;common entry after address generate
+LDX_m:      in    regx,dbusin       ;same for immediate
+
+            flags_gen_nz regx
+
+            op_decode               ;next instruction
+
+; opcode:         LDY
+            adgen_x     LDY_        ;abs,X
+            adgen_zx    LDY_        ;ZP,X
+            adgen_z     LDY_        ;ZP absolute
+LDY_a:      adgen_a                 ;absolute
+
+LDY_o:      reg_fetch regy          ;common entry after address generate
+LDY_m:      in    regy,dbusin       ;same for immediate
+
+            flags_gen_nz regy
+
+            op_decode               ;next instruction
+
+; opcode:         ORA
+            adgen_x     ORA_        ;abs,X
+            adgen_y     ORA_        ;abs,Y
+            adgen_zi    ORA_        ;(ZP) indirect
+            adgen_zxi   ORA_        ;(ZP,X) indexed indirect
+            adgen_ziy   ORA_        ;(ZP),Y indirect indexed
+            adgen_zx    ORA_        ;ZP,X
+            adgen_z     ORA_        ;ZP absolute
+ORA_a:      adgen_a                 ;absolute
+
+ORA_o:      op_fetch                ;common entry after address generate
+ORA_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+
+            out   sreg,stat         ;keep C
+            or    rega,operand      ;AVR emulated OP
+            in    stat,sreg         ;save NZ, keep C
+
+            op_decode               ;next instruction
+
+; opcode:         SBC
+; subtraction in a 6502 works with reversed carry, borrow = !carry
+; the reason: a 6502 performs an add with complemented operand during subtract
+            adgen_x     SBC_        ;abs,X
+            adgen_y     SBC_        ;abs,Y
+            adgen_zi    SBC_        ;(ZP) indirect
+            adgen_zxi   SBC_        ;(ZP,X) indexed indirect
+            adgen_ziy   SBC_        ;(ZP),Y indirect indexed
+            adgen_zx    SBC_        ;ZP,X
+            adgen_z     SBC_        ;ZP absolute
+SBC_a:      adgen_a                 ;absolute
+
+SBC_o:      op_fetch                ;common entry after address generate
+SBC_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+
+            com   operand
+            out   sreg,stat         ;get C
+            adc   rega,operand      ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+            bst   stat,3            ;save V
+            bld   stat2,6
+
+            sbrs  stat2,3           ;test decimal flag
+            rjmp  SBC_d             ;skip decimal mode correction
+
+            brcs  SBC_d2            ;MSD correction
+            subi  rega,0x60
+            out   sreg,stat
+SBC_d2:     brhs  SBC_d3            ;LSD correction
+            subi  rega,0x06
+SBC_d3:     flags_gen_nz rega       ;CMOS requires NZC to be valid in BCD mode
+                                    ;V is absolutely useless in BCD mode
+                                    ;so V is not valid anyway
+SBC_d:      op_decode               ;next instruction
+
+
+;*****************************************************************
+;
+; Modify memory instructions
+;     Shift, increment & decrement, test & (re)set bits
+;
+;*****************************************************************
+
+; opcode:         ASL
+            adgen_x     ASL_        ;abs,X
+            adgen_zx    ASL_        ;ZP,X
+            adgen_z     ASL_        ;ZP absolute
+ASL_a:      adgen_a                 ;absolute
+
+ASL_o:      op_fetch_modify         ;common entry after address generate
+ASL_m:      in    operand,dbusin    ;operand prefetched (z, zx, zy)
+
+            lsl   operand           ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+
+            store_modify
+
+; opcode:         LSR
+            adgen_x     LSR_        ;abs,X
+            adgen_zx    LSR_        ;ZP,X
+            adgen_z     LSR_        ;ZP absolute
+LSR_a:      adgen_a                 ;absolute
+
+LSR_o:      op_fetch_modify         ;common entry after address generate
+LSR_m:      in    operand,dbusin    ;operand prefetched (z, zx, zy)
+
+            lsr   operand           ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+
+            store_modify
+
+; opcode:         ROL
+            adgen_x     ROL_        ;abs,X
+            adgen_zx    ROL_        ;ZP,X
+            adgen_z     ROL_        ;ZP absolute
+ROL_a:      adgen_a                 ;absolute
+
+ROL_o:      op_fetch_modify         ;common entry after address generate
+ROL_m:      in    operand,dbusin    ;operand prefetched (z, zx, zy)
+
+            out   sreg,stat         ;get C
+            rol   operand           ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+
+            store_modify
+
+; opcode:         ROR
+            adgen_x     ROR_        ;abs,X
+            adgen_zx    ROR_        ;ZP,X
+            adgen_z     ROR_        ;ZP absolute
+ROR_a:      adgen_a                 ;absolute
+
+ROR_o:      op_fetch_modify         ;common entry after address generate
+ROR_m:      in    operand,dbusin    ;operand prefetched (z, zx, zy)
+
+            out   sreg,stat         ;get C
+            ror   operand           ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+
+            store_modify
+
+; opcode:         DEC
+            adgen_x     DEC_        ;abs,X
+            adgen_zx    DEC_        ;ZP,X
+            adgen_z     DEC_        ;ZP absolute
+DEC_a:      adgen_a                 ;absolute
+
+DEC_o:      op_fetch_modify         ;common entry after address generate
+DEC_m:      in    operand,dbusin    ;operand prefetched (z, zx, zy)
+
+            out   sreg,stat         ;keep C
+            dec   operand           ;AVR emulated OP
+            in    stat,sreg         ;save NZ, keep C
+
+            store_modify
+
+; opcode:         INC
+            adgen_x     INC_        ;abs,X
+            adgen_zx    INC_        ;ZP,X
+            adgen_z     INC_        ;ZP absolute
+INC_a:      adgen_a                 ;absolute
+
+INC_o:      op_fetch_modify         ;common entry after address generate
+INC_m:      in    operand,dbusin    ;operand prefetched (z, zx, zy)
+
+            out   sreg,stat         ;keep C
+            inc   operand           ;AVR emulated OP
+            in    stat,sreg         ;save NZ, keep C
+
+            store_modify
+
+; opcode:         RMB
+RMB0_z:     fetch_z_RMB 0
+RMB1_z:     fetch_z_RMB 1
+RMB2_z:     fetch_z_RMB 2
+RMB3_z:     fetch_z_RMB 3
+RMB4_z:     fetch_z_RMB 4
+RMB5_z:     fetch_z_RMB 5
+RMB6_z:     fetch_z_RMB 6
+RMB7_z:     fetch_z_RMB 7
+
+RMB_o:      in    operand,dbusin    ;clear bit not in bitmask
+            and   operand,a
+                                    ;no need to check for IO/ROM
+            out   cbus,writemem     ;WE, ~OE
+            out   dbusout,operand   ;precharge write
+            out   dbusddr,allon     ;output data valid
+            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+            out   dbusddr,zero      ;data hold ends after 60ns
+            out   cbus,readmem      ;OE / read mode back on
+
+            op_decode               ;next instruction
+
+; opcode:         SMB
+SMB0_z:     fetch_z_SMB 0
+SMB1_z:     fetch_z_SMB 1
+SMB2_z:     fetch_z_SMB 2
+SMB3_z:     fetch_z_SMB 3
+SMB4_z:     fetch_z_SMB 4
+SMB5_z:     fetch_z_SMB 5
+SMB6_z:     fetch_z_SMB 6
+SMB7_z:     fetch_z_SMB 7
+
+SMB_o:      in    operand,dbusin    ;set bit in bitmask
+            or    operand,a
+                                    ;no need to check for IO/ROM
+            out   cbus,writemem     ;WE, ~OE
+            out   dbusout,operand   ;precharge write
+            out   dbusddr,allon     ;output data valid
+            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+            out   dbusddr,zero      ;data hold ends after 60ns
+            out   cbus,readmem      ;OE / read mode back on
+
+            op_decode               ;next instruction
+
+; opcode:         TRB
+            adgen_z     TRB_        ;ZP absolute
+TRB_a:      adgen_a                 ;absolute
+
+TRB_o:      op_fetch_modify         ;common entry after address generate
+TRB_m:      in    operand,dbusin
+
+            mov   a,rega            ;test A bits with memory
+            and   a,operand         ;A & M -> Z
+            in    a,sreg            ;move only Z to flags
+            bst   a,1
+            bld   stat,1
+            
+            mov   a,rega            ;clear A bits in memory
+            eor   a,allon
+            and   operand,a
+            
+            store_modify
+
+; opcode:         TSB
+            adgen_z     TSB_        ;ZP absolute
+TSB_a:      adgen_a                 ;absolute
+
+TSB_o:      op_fetch_modify         ;common entry after address generate
+TSB_m:      in    operand,dbusin
+
+            mov   a,rega            ;test A bits with memory
+            and   a,operand         ;A & M -> Z
+            in    a,sreg            ;move only Z to flags
+            bst   a,1
+            bld   stat,1
+            
+            mov   a,rega            ;clear A bits in memory
+            or    operand,a
+            
+            store_modify
+            
+
+;*****************************************************************
+;
+; Memory write instructions
+;     Store register
+;
+;*****************************************************************
+
+; opcode:         STA
+            adgen_x     STA_        ;abs,X
+            adgen_y     STA_        ;abs,Y
+            adgen_zi    STA_        ;(ZP) indirect
+            adgen_zxi   STA_        ;(ZP,X) indexed indirect
+            adgen_ziy   STA_        ;(ZP),Y indirect indexed
+            adgen_zx    STA_        ;ZP,X
+            adgen_z     STA_        ;ZP absolute
+STA_a:      adgen_a                 ;absolute
+
+STA_o:      store_reg rega,STA_m    ;common entry after address generate
+
+; opcode:         STX
+            adgen_zy    STX_        ;ZP,y
+            adgen_z     STX_        ;ZP absolute
+STX_a:      adgen_a                 ;absolute
+
+STX_o:      store_reg regx,STX_m    ;common entry after address generate
+
+; opcode:         STY
+            adgen_s_zx  STY_        ;ZP,x
+            adgen_s_z   STY_        ;ZP absolute
+STY_a:      adgen_a                 ;absolute
+
+STY_o:      store_reg regy,STY_m    ;common entry after address generate
+
+; opcode:         STZ
+            adgen_x     STZ_        ;abs,X
+            adgen_s_zx  STZ_        ;ZP,x
+            adgen_s_z   STZ_        ;ZP absolute
+STZ_a:      adgen_a                 ;absolute
+
+STZ_o:      store_reg zero,STZ_m    ;common entry after address generate
+
diff --git a/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_Emu_IO.inc b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_Emu_IO.inc
new file mode 100644
index 00000000..638246f5
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_Emu_IO.inc
@@ -0,0 +1,2807 @@
+;
+; 6502 EMULATOR include
+;     I/O page (iomap) address decode & emulated I/O
+;
+; Copyright (C) 2013-2015  Klaus Dormann
+;
+; This program is free software: you can redistribute it and/or modify
+; it under the terms of the GNU General Public License as published by
+; the Free Software Foundation, either version 3 of the License, or
+; (at your option) any later version.
+;
+; This program is distributed in the hope that it will be useful,
+; but WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+; GNU General Public License for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with this program.  If not, see <http://www.gnu.org/licenses/>.
+;
+.set  io_version = 832
+;*****************************************************************
+;
+; IO macros
+;
+;*****************************************************************
+
+;I/O address least significant nibble address decode 
+;
+;@0 = table of 16 addresses for decoded nibble (0x0 - 0xf)
+.macro   io_adr_dec
+   .if (@0 & 0xff) > 0xf0
+      .error "Address decode table @0 crosses a page boundary!"
+   .endif
+   ldi   zh,high(@0)       ;register address decode
+   mov   zl,oplow          ;lower byte
+   andi  zl,0xf            ;lower 4 bits
+   addi  zl,low(@0)        ;add offset
+   ijmp                    ;address specific code
+.endmacro
+
+;macro set IO select pin
+;
+;@0 = io_strobe pin direct (1-3) or extended (10-17, 20-27, 30-37)
+.macro   set_io_select
+   out   cbus,clear        ;turn off -OE to RAM
+   .set io_select = @0
+   .if   io_select > 3     ;generate strobe
+      .set  io_select = io_select -10
+      .if   io_select < 8 
+         ldi   b,ios1_default    ;precharge IO-select register  
+         .set  io_strobe_pol = !((ios1_default >> io_select) & 1)
+         .set  io_sel_direct = 6 ;bit to enable extension register
+      .else
+         .set  io_select = io_select -10
+         .if   io_select < 8 
+            ldi   b,ios2_default    ;precharge IO-select register
+            .set  io_strobe_pol = !((ios2_default >> io_select) & 1)
+            .set  io_sel_direct = 7 ;bit to enable extension register
+         .else
+            .set  io_select = io_select -10
+            ldi   b,ios3_default    ;precharge IO-select register
+            .set  io_strobe_pol = !((ios3_default >> io_select) & 1)
+            .set  io_sel_direct = 2 ;bit to enable extension register
+         .endif
+      .endif
+      out   abushi,b      
+      sbi   cbus,io_sel_direct   ;make register transparent
+   .else
+      .set io_sel_direct = 0
+      .if (io_select == 3)       ;translate to pin
+         .set io_select = 2
+      .else
+         .set io_select = io_select + 5
+      .endif
+   .endif
+.endmacro
+
+;macro set IO selectpin and keep reset pin low
+;
+;@0 io_strobe pin direct (1-3) or extended (10-17, 20-27, 30-37)
+.macro   set_io_reset
+   out   cbus,clear        ;turn off -OE to RAM
+   .set io_select = @0
+   .if   io_select > 3     ;generate strobe
+      .set  io_select = io_select -10
+      .if   io_select < 8 
+         ldi   b,ios1_default    ;precharge IO-select register  
+         .set  io_strobe_pol = !((ios1_default >> io_select) & 1)
+         .set  io_sel_direct = 6 ;bit to enable extension register
+      .else
+         .set  io_select = io_select -10
+         .if   io_select < 8 
+            ldi   b,ios2_default    ;precharge IO-select register
+            .set  io_strobe_pol = !((ios2_default >> io_select) & 1)
+            .set  io_sel_direct = 7 ;bit to enable extension register
+         .else
+            .set  io_select = io_select -10
+            ldi   b,ios3_default    ;precharge IO-select register
+            .set  io_strobe_pol = !((ios3_default >> io_select) & 1)
+            .set  io_sel_direct = 2 ;bit to enable extension register
+         .endif
+      .endif
+      .ifdef io_reset_pin
+         .if   (@0 & 0x30) == (io_reset_pin & 0x30)
+            cbr   b,(1 << (io_reset_pin & 7))
+         .endif
+      .endif
+      out   abushi,b      
+      sbi   cbus,io_sel_direct   ;make register transparent
+   .else
+      .set io_sel_direct = 0
+      .if (io_select == 3)       ;translate to pin
+         .set io_select = 2
+      .else
+         .set io_select = io_select + 5
+      .endif
+   .endif
+.endmacro
+
+;macro prepare IO select pin
+;use with make_io_select, precharges yl & yh with strobe
+;
+;@0 = io_strobe pin direct (1-3) or extended (10-17, 20-27, 30-37)
+.macro   prep_io_select
+   .set io_select = @0
+   .if   io_select > 3     ;generate strobe
+      .set  io_select = io_select -10
+      .if   io_select < 8 
+         ldi   b,ios1_default    ;precharge IO-select register  
+         ldi   yl,ios1_default^(1<<io_select)
+         .set  io_strobe_pol = !((ios1_default >> io_select) & 1)
+         .set  io_sel_direct = 6 ;bit to enable extension register
+      .else
+         .set  io_select = io_select -10
+         .if   io_select < 8 
+            ldi   b,ios2_default    ;precharge IO-select register
+            ldi   yl,ios2_default^(1<<io_select)
+            .set  io_strobe_pol = !((ios2_default >> io_select) & 1)
+            .set  io_sel_direct = 7 ;bit to enable extension register
+         .else
+            .set  io_select = io_select -10
+            ldi   b,ios3_default    ;precharge IO-select register
+            ldi   yl,ios3_default^(1<<io_select)
+            .set  io_strobe_pol = !((ios3_default >> io_select) & 1)
+            .set  io_sel_direct = 2 ;bit to enable extension register
+         .endif
+      .endif
+      ldi   yh,0x30|(1<<io_sel_direct)
+   .else
+      .set io_sel_direct = 0
+      .if (io_select == 3)       ;translate to pin
+         .set io_select = 2
+      .else
+         .set io_select = io_select + 5
+      .endif
+      ldi   yh,0x30|(1<<io_select)
+   .endif
+.endmacro
+
+;macro make IO select pin
+;
+.macro   make_io_select
+   .if (io_sel_direct > 0)
+      out   abushi,yl      
+   .endif
+   out   cbus,yh
+.endmacro
+
+;macro enable IO select pin
+;
+.macro   ena_io_select
+   .if (io_sel_direct > 0)
+      .if io_strobe_pol
+         sbi   abushi,io_select     ;strobe high
+      .else
+         cbi   abushi,io_select     ;strobe low
+      .endif
+   .else
+      sbi   cbus,io_select       ;strobe high
+   .endif
+.endmacro
+
+;macro disable IO select pin
+;
+.macro   dis_io_select
+   .if (io_sel_direct > 0)
+      out   abushi,b             ;end strobe
+   .else
+      out   cbus,clear           ;end strobe
+   .endif
+.endmacro
+
+;macro disable SPI select pin
+;
+.macro   dis_spi_select
+   .if (io_sel_direct > 0)
+      out   abushi,b             ;end strobe if io extension
+   .endif
+;must be followed by
+;  out cbus,{readmem|clear}
+.endmacro
+
+;macro SPI wait for spdr complete
+;
+.macro   wait_spi
+wait_spdr:
+   sbis  spsr,spif
+   rjmp  wait_spdr
+.endmacro
+
+;macro out @0 to SPI and wait for spdr complete
+;
+.macro   out_spi
+   out   spdr,@0
+wait_spdr:
+   sbis  spsr,spif
+   rjmp  wait_spdr
+.endmacro
+
+;macro in @0 from SPI and wait for data ready
+;
+.macro   in_spi
+   out   spdr,allon
+wait_spdr:
+   sbis  spsr,spif
+   rjmp  wait_spdr
+   in    @0,spdr
+.endmacro
+
+;macro parallel read
+;
+;@0 minimum read strobe in ns, max 800ns 
+;  maximum time to data valid is @0 -1/2 clock, -32ns
+.macro   par_rd
+   sbi   abuslo,7          ;generate R/-W if needed
+   ena_io_select
+   wait_ns   @0,1
+   dis_io_select
+   in    operand,dbusin       ;data latched during previous cycle
+   out   cbus,readmem         ;IO-select off & read mode back on
+   ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+   ret
+.endmacro
+
+;macro parallel write
+;
+;@0 minimum write strobe duration in ns, max 800ns
+.macro   par_wrt
+   cbi   abuslo,7          ;generate R/-W if needed
+   out   dbusout,operand   ;precharge data to be written
+   out   dbusddr,allon     ;data write mode
+   ena_io_select
+   wait_ns   @0,1
+   dis_io_select
+   out   dbusddr,zero      ;data hold ends
+.endmacro
+
+;parallel pre read macro - data to a, no return
+;
+;@0 minimum read strobe in ns, max 800ns 
+;  maximum time to data valid is @0 -1/2 clock, -32ns
+.macro   par_pre_rd  
+   sbi   abuslo,7          ;generate R/-W
+   ena_io_select
+   wait_ns   @0,1
+   dis_io_select
+   in    a,dbusin       ;data latched during previous cycle
+.endmacro
+
+;phase 2 synchronisation macro
+;  next instruction after macro is at tcnt=7, OC2=1
+;
+;           you are here | at end of macro
+;           _ _ _ _ _ _ _V_                 _ _
+; Phi2  _ _|               |_ _ _ _ _ _ _ _|
+;
+; tcnt  6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1
+;
+; 500ns/phase, 62.5ns/count
+
+.macro   phi2_sync
+phi2_syncloop:
+      in    zl,tcnt2     
+      sbic  pind,7            ;wait for phi2 low
+   rjmp  phi2_syncloop
+   clr   zh
+   subi  zl,low(-phi2_synctable) ;calculate offset cycles
+   sbci  zh,high(-phi2_synctable)             
+   ijmp
+
+;  .if (PC & 0xff) > 0xf8   ;keep table on same page - avoid adc zh,zero
+;      .org  (PC + 0x100) & 0xff00
+;   .endif
+phi2_synctable:            ;delay -1 cycle for each count in tcnt
+   nop                     ;0/1 - tcnt=0/OC2=1                  
+   nop                     ;1/1
+   nop                     ;2/1
+   nop                     ;3/1
+   nop                     ;4/1
+   nop                     ;5/1
+   nop                     ;6/1
+;  next                     7/1 - output to next cycle, input from previous cycle
+.endmacro
+
+.macro   nop2              ;2 cycle nop
+   rjmp  pc+1
+.endmacro
+
+;macro phase 2 synchronized read
+;
+;
+;              data latched 1/2 clock ahead of IN +
+;      address valid +                            |
+;     after sync +   |                            |
+;                |   |    _ _ _ _ _ _ _ _ _ _ _ _ | _ _ 
+; chip select _ _|_ _|_ _|                        |    |_ _
+;         _ _ _ _V_  |              _ _ _ _ _ _ _ V        
+; Phi2             |_V_ _ _ _ _ _ _|               |_ _ _ _
+;
+; tcnt    3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3
+;
+.macro   phi2_rd
+   phi2_sync
+   sbi   abuslo,7          ;7/1 generate R/-W - tcnt=7/OC2=1
+   ena_io_select           ;1/0 CS strobe >300ns before phi2
+   nop2                    ;3/0
+   nop2                    ;5/0
+   nop2                    ;7/0
+   nop2                    ;1/1
+   nop2                    ;3/1
+   nop2                    ;5/1
+   nop                     ;7/1
+   in    operand,dbusin    ;0/0 input latched at 7/1 +30ns
+   dis_io_select           ;1/0 end strobe 125ns after phi2 te
+   out   cbus,readmem      ;IO-select off & read mode back on
+   ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+   ret
+.endmacro
+
+;macro phase 2 synchronized write
+;
+;                    output data valid +
+;      address valid +                 |
+;     after sync +   |                 |
+;                |   |    _ _ _ _ _ _ _|_ _ _ _ _ _ _ 
+; chip select _ _|_ _|_ _|             |             |_ _ _
+;         _ _ _ _V_  |              _ _V_ _ _ _ _ _        
+; Phi2             |_V_ _ _ _ _ _ _|               |_ _ _ _
+;
+; tcnt    3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3
+;
+.macro   phi2_wrt
+   phi2_sync
+   cbi   abuslo,7          ;7/1 generate R/-W - tcnt=7/OC2=1
+   ena_io_select           ;1/0 CS strobe high >300ns before phi2
+   nop2                    ;3/0
+   nop2                    ;5/0
+   nop                     ;7/0
+   out   dbusout,operand   ;0/1 precharge data to be written
+   out   dbusddr,allon     ;1/1 write data valid 125 ns after phi2 le
+   nop2                    ;2/1
+   nop2                    ;4/1
+   nop2                    ;6/1
+   dis_io_select           ;0/0 end strobe 60ns after phi2 te
+   out   dbusddr,zero      ;data hold ends
+   rjmp  iw_exit           ;next instruction
+.endmacro
+
+;****************************************************************
+;
+; Begin IO address decode after load, store or modify instruction
+;
+;****************************************************************
+
+;address decode for higher nibble of internally mapped address
+iomodify:
+   sbr   flags,(1<<modify) ;lock extended memory address until rewrite
+ioread:
+   ldi   zh,high(ior_tab)
+   mov   zl,oplow          ;lower byte 
+   andi  zl,0xf0           ;upper 4 bits
+   swap  zl                ;to low position
+   addi  zl,low(ior_tab)   ;add offset
+   ijmp                    ;address specific code
+
+;address decode for higher nibble of internally mapped address
+iowrite:
+   ldi   zh,high(iow_tab)
+   mov   zl,oplow          ;lower address byte
+   andi  zl,0xf0           ;upper 4 bits
+   swap  zl                ;to low position
+   addi  zl,low(iow_tab)   ;add offset
+   ijmp                    ;address specific code
+
+;**************************************************************
+;
+; IO RESET
+;
+;**************************************************************
+io_reset:   
+   cli
+;   in    a,timsk        ;no timer interrupts for reset delays
+;   cbr   a,0b11
+;   out   timsk,a
+   out   timsk,zero     ;no timer interrupts for reset delays
+   ldi   a,0b00000101   ;timer 0 ctc off, clock / 1024
+   out   tccr0,a
+
+   call  rs_IO_ext      ;reset IO extension registers
+
+;*** custom IO resets go here ***
+   rcall t1_rs          ;reset timer 1
+   rcall irq_rs         ;reset interrupts & flags
+   rcall lcd_rs         ;reset character LCD
+   rcall spi_rs         ;reset SPI bus if present
+   rcall i2c_rs         ;reset I2C bus if present
+   ; spi reset with IO expansion select reset (as early as possible)
+   io_modules_reset     ;defined by a macro in 6502_Emu_config.inc
+
+;end of reset sequence - restore t0, end HW reset strobe
+   out   tcnt0,zero        ;timer 0 init
+   ldi   a,ten_ms
+   out   ocr0,a
+   ldi   a,0b00001101      ;timer 0 ctc, clock / 1024
+   out   tccr0,a
+   out   tcnt0,zero
+
+   .ifdef   io_reset_pin
+      ldi   a,10              ;wait 100ms
+      do       reset_delay
+         in    c,tifr
+         sbrs  c,ocf0
+         ifs   reset_10ms_expired
+            ldi   b,(1 << ocf0)
+            out   tifr,b            ;clear flag
+            dec   a                 ;next 10ms
+      exiteq   reset_delay
+         end   reset_10ms_expired
+      loop     reset_delay
+      set_io_select  io_reset_pin
+      out   cbus,clear
+   .endif   
+
+   out   tcnt0,zero        ;restart t0
+   out   tifr,allon        ;clear all timer flags
+   ldi   a,0b11            ;t0 compare match & overflow interrupt enable
+;   in    a,timsk
+;   sbr   a,0b11
+   out   timsk,a
+   sts   timer_ena,a
+   out   cbus,readmem      ;OE / read mode back on
+   sei
+   ret
+
+.ifdef lcd_sel
+;*****************************************************************
+;
+;character LCD IO
+;
+;  LCD address pin 7 (0=write, 1=read), pin 0 (0=cmd/busy, 1=data)
+;  automatic busy scan for address 0 & 1 if lcd responded during reset
+;  raw access at 2 & 3
+
+lcd_rd:                 ;referenced from ior_tab = address
+   set_io_select lcd_sel
+   lds   a,lcd_flags    ;lcd responded during reset?
+   tst   a
+   ifne_and lcd_rd_scan
+   sbrc  oplow,1        ;address 0 or 1 / not 2 or 3?
+   ifs      lcd_rd_scan ;scan busy flag
+      cbi   abuslo,0       ;status register
+;      do    lcd_rd_busy
+      par_pre_rd 450
+      sbrc  a,7            ;test status busy
+      rjmp  ir_retry       ;on busy
+;      loop  lcd_rd_busy
+      out   abuslo,oplow   ;back to original address
+      ldi   a,32           ;delay 96 cycles = 6µs
+      do     lcd_rd_adr    ;for older hd44780 requiring 
+         dec   a           ;extra time after busy
+      loopne lcd_rd_adr    ;to increment RAM address
+   end      lcd_rd_scan
+   par_rd 450           ;450ns enable strobe
+
+lcd_wrt:                ;referenced from iow_tab = address
+   set_io_select lcd_sel
+   lds   a,lcd_flags    ;lcd responded during reset?
+   tst   a
+   ifne_and lcd_wrt_scan
+   sbrc  oplow,1        ;address 0 or 1 / not 2 or 3?
+   ifs      lcd_wrt_scan   ;scan busy flag
+      cbi   abuslo,0       ;status register
+;      do    lcd_wrt_busy
+         par_pre_rd 450
+         sbrc  a,7            ;test status busy
+         rjmp  iw_retry       ;on busy
+;      loop  lcd_wrt_busy
+      out   abuslo,oplow   ;back to original address
+      ldi   a,32           ;delay 96 cycles = 6µs
+      do     lcd_wrt_adr   ; for older hd44780 requiring 
+         dec   a           ; extra time after busy
+      loopne lcd_wrt_adr ; to increment RAM address
+   end      lcd_wrt_scan
+
+   par_wrt 450          ;450ns enable strobe
+   rjmp  iw_exit        ;next instruction
+
+lcd_rs:
+; character LCD - check presence
+   ldi   a,0x30         ;reset LCD 8-bit mode
+   mov   operand,a
+   out   abuslo,zero    ;-w & -rs (write command)
+   sts   lcd_flags,allon ;set lcd usable
+   set_io_reset lcd_sel     ;select lcd strobe
+   ldi   a,0x15         ;15ms power up delay
+   rcall lcd_rs_force   ;write 8-bit mode
+   ldi   a,0xbf         ;4.1ms delay
+   rcall lcd_rs_force   ;repeat write 8-bit mode
+   ldi   a,0xfd         ;100µs delay
+   rcall lcd_rs_force   ;repeat write 8-bit mode
+                        ;continue init checking busy
+   ldi   zl,low(lcd_init<<1) 
+   ldi   zh,high(lcd_init<<1)
+   ldi   oplow,0        ;command register
+   do       lcd_rs_init 
+      lpm   a,z+
+      tst   a           ;end of string?
+   exiteq   lcd_rs_init
+      cpi   a,0xff      ;switch to data register?
+      ifeq  lcd_rs_text
+         ldi   oplow,1  
+      else  lcd_rs_text
+         rcall lcd_rs_wrt
+      end   lcd_rs_text
+   loop     lcd_rs_init
+   ldi   oplow,0        ;verify text on LCD
+   ldi   a,0x80         ;cursor position 0
+   rcall lcd_rs_wrt
+   ldi   zl,low((lcd_init<<1)+5) 
+   ldi   zh,high((lcd_init<<1)+5)
+   ldi   oplow,1
+   do       lcd_rs_readback
+      rcall lcd_rs_rd
+      lpm   a,z+
+      tst   a
+   exiteq   lcd_rs_readback
+      cp    a,operand
+      ifne  lcd_rs_rd_fail
+         sts   lcd_flags,zero
+      end   lcd_rs_rd_fail
+   loop     lcd_rs_readback
+   lds   a,lcd_flags    ;message, if LCD failed
+   tst   a
+   ifeq  lcd_rs_fail
+      PrintStr_far lcd_fail
+   end   lcd_rs_fail
+   ret
+
+lcd_init:        ;8 bit bus, 2 display lines
+                 ;    ;display on, cursor off
+                 ;    ;   ;clear & home position
+                 ;    ;   ; ;position increment, no shift
+                 ;    ;   ; ; ;switch to data (internal)
+            .db  0x38,0xc,1,6,0xff,core_string," Emu V",version,0
+lcd_fail:   .db   13,10,"LCD reset failed",0,0
+            
+; subroutines for lcd reset - keep within io_select for lcd
+lcd_rs_force:        ;delayed forced write to lcd 
+   out   tcnt0,a
+   do       rs_lcd_delay
+      in    a,tcnt0
+      tst   a
+   loopne   rs_lcd_delay
+   rjmp  lcd_rs_fwrt
+
+lcd_rs_wrt:          ;write to lcd with timeout on busy
+   out   tcnt0,zero
+   mov   operand,a
+   cbi   abuslo,0    ;set status register
+   do    lcd_rs_busy
+      in    a,tcnt0        ;busy timeout? 
+      cpi   a,0x9c         ;>10ms?
+      ifeq  lcd_rs_timeout
+         sts   lcd_flags,zero
+         ret
+      end   lcd_rs_timeout
+      par_pre_rd 450
+      sbrc  a,7            ;test status busy
+   loop  lcd_rs_busy
+   ldi   a,32           ;delay 96 cycles = 6µs
+   do     lcd_rs_adr    ; for older hd44780 requiring 
+      dec   a           ; extra time after busy
+   loopne lcd_rs_adr    ; to increment RAM address
+lcd_rs_fwrt:
+   out   abuslo,oplow   ;set register
+   par_wrt 450          ;write with 450ns strobe
+   ret
+
+lcd_rs_rd:           ;read from lcd with timeout on busy
+   out   tcnt0,zero
+   cbi   abuslo,0    ;set status register
+   do    lcd_rs_rd_busy
+      in    a,tcnt0        ;busy timeout? 
+      cpi   a,0x9c         ;>10ms?
+      ifeq  lcd_rs_rd_timeout
+         sts   lcd_flags,zero
+         ret
+      end   lcd_rs_rd_timeout
+      par_pre_rd 450
+      sbrc  a,7            ;test status busy
+   loop  lcd_rs_rd_busy
+   ldi   a,32           ;delay 96 cycles = 6µs
+   do     lcd_rs_rd_adr ; for older hd44780 requiring 
+      dec   a           ; extra time after busy
+   loopne lcd_rs_rd_adr ; to increment RAM address
+   out   abuslo,oplow   ;set register
+   par_pre_rd  450      ;read with 450ns strobe
+   mov   operand,a
+   ret
+.endif
+
+;*****************************************************************
+;
+; emulated 6551 ACIA - data register only
+;
+; ACIA is not available, when the debugger is using the RS232 interface
+; use exit command (X) to enable ACIA, use break to return to the debugger
+;
+;data register, TX on write, RX on read both with 256 byte FIFO buffer
+acia_rx:
+   lds   a,irq_flag
+   cbr   a,0b01000000   ;clear rdrf
+   lds   c,irq_mask     ;other interrupts pending & enabled?
+   and   c,a
+   ifeq  rx_irq_clear
+      .ifdef ena_diag
+         lds   c,selftest
+         sbrs  c,0            ;forced IRQ by selftest
+      .endif
+      cbi   cbusddr,3      ;clear IRQ
+   end   rx_irq_clear
+   clr   operand        ;default response
+   sbrc  flags,deb_on   ;acia disconnected?
+   ifs   acia_rx_ena
+      lds   c,rx_fill      ;precharge rx level
+      .ifdef irq_dis_real
+         sbrs  stat2,2        ;interrupts disabled?
+         ifs   acia_rx_bypass
+            sbis  ucsra,udre     ;UDR available?
+            ifs_and  acia_rx_tx
+            lds   d,tx_fill      ;empty buffer?
+            tst   d
+            ifne     acia_rx_tx
+               ldi   xh,high(tx_buf)
+               lds   xl,tx_inx      ;calc output index
+               sub   xl,d
+               ld    b,x            ;load from fifo head
+               out   udr,b
+               dec   d              ;update pointer
+               ifeq  acia_rx_tx_empty
+                  ldi   b,usart_txi_dis ;tx buffer now empty
+                  out   ucsrb,b
+                  sts   usart_ena,b
+               end   acia_rx_tx_empty
+               sts   tx_fill,d
+            end      acia_rx_tx
+            lds   b,irq_mask     ;check TDRE IRQ enabled
+            andi  b,0b10000000
+            ifne  acia_rx_tx_int_ena
+               sbi   cbusddr,3   ;set IRQ
+            end   acia_rx_tx_int_ena
+            lds   b,irq_flag
+            sbr   b,0b10000000   ;set TDRE
+            sts   irq_flag,b     ;store status
+            tst   c              ;buffer empty?
+            ifeq  acia_rx_direct
+               sbic  ucsra,rxc      ;data waiting in UDR?  
+                  in    operand,udr    ;read direct if disabled & buffer empty
+            end   acia_rx_direct
+         end   acia_rx_bypass
+      .endif
+      tst   c     ;buffer empty?
+      ifne  acia_rx_empty
+         lds   xl,rx_inx      ;prepare address to read rx fifo
+         ldi   xh,high(rx_buf)
+         sub   xl,c
+         ld    operand,x      ;read
+         dec   c     ;update pointer
+         sts   rx_fill,c
+         ifne  acia_rx_more
+            lds   b,irq_mask     ;check acia irq enabled
+            andi  b,0b01000000   ;RDRF IRQ enabled ?
+            ifne  acia_rx_int
+               sbi   cbusddr,3      ;set IRQ
+            end   acia_rx_int
+            sbr   a,0b01000000   ;set rdrf - more rx data
+         end   acia_rx_more
+         .ifdef flowlo
+            mov   i,c
+            cpi   i,flowlo          ;buffer lower watermark?
+            iflo  acia_flow
+               lds   i,flow_cmd
+               cpi   i,0x91         ;xon done?
+               ifne  acia_send_xon
+                  ldi   i,0x11         ;post xon pending
+                  sts   flow_cmd,i
+                  ldi   i,usart_txi_ena ;notify transmitter
+                  out   ucsrb,i
+                  .ifdef irq_dis_real
+                     sts   usart_ena,i
+                  .endif
+               end  acia_send_xon
+            end   acia_flow
+         .endif
+      end      acia_rx_empty
+      sts   irq_flag,a
+   end   acia_rx_ena
+   ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+   ret
+
+acia_tx:
+   lds   c,tx_fill      ;precharge level
+   .ifdef irq_dis_real
+      sbrs  stat2,2        ;interrupts disabled?
+      ifs_and  acia_tx_bypass
+      sbis  ucsra,udre     ;UDR empty?
+      ifs      acia_tx_bypass
+         cbr   flags,(1<<deb_on) ;force connect
+         tst   c              ;data in buffer
+         ifne  acia_tx_filled
+            ldi   xh,high(tx_buf)
+            lds   xl,tx_inx      ;calc output index
+            sub   xl,c
+            ld    d,x            ;load from fifo head
+            out   udr,d
+            dec   c
+         else  acia_tx_filled
+            out   udr,operand    ;direct output
+            rjmp  iw_exit
+         end   acia_tx_filled
+      end   acia_tx_bypass
+   .endif
+   sbrc  flags,deb_on   ;acia connected?
+iw_retry_ext:
+      rjmp  iw_retry       ;disconnected - loop until buffer is available
+   inc   c              ;space in buffer ?
+   breq  iw_retry_ext   ;full - loop until buffer is available
+   lds   a,irq_flag
+   cbr   a,0b10000000   ;clear tdre
+   lds   d,irq_mask     ;other interrupts pending & enabled?
+   and   d,a
+   ifeq  tx_irq_clear
+      .ifdef ena_diag
+         lds   d,selftest
+         sbrs  d,0            ;forced IRQ by selftest
+      .endif
+      cbi   cbusddr,3      ;clear IRQ
+   end   tx_irq_clear
+
+   ldi   i,usart_txi_ena ;notify transmitter
+   out   ucsrb,i
+   .ifdef irq_dis_real
+      sts   usart_ena,i
+   .endif
+   lds   xl,tx_inx      ;load pointer
+   ldi   xh,high(tx_buf)
+   st    x+,operand     ;send data to fifo
+   sts   tx_inx,xl      ;save index
+   sts   tx_fill,c
+   inc   c     ;more tx fifo available?
+   ifne  acia_tx_more
+      lds   b,irq_mask     ;TDRE IRQ enabled
+      andi  b,0b10000000
+      ifne  acia_tx_int
+         sbi   cbusddr,3      ;set IRQ
+      end   acia_tx_int
+      sbr   a,0b10000000   ;set tdre - tx buffer available
+   end  acia_tx_more
+   sts   irq_flag,a
+   rjmp  iw_exit
+
+;**************************************************************
+;
+; Timer 1 registers
+;
+;  no output or input pins available, internal operations only
+;  see ATMega datasheet for register and bit functionality
+;
+; write address register, then read or write data register
+;  output high byte first, automatic decrement to low byte
+;  input low byte first, automatic increment to high byte
+;  
+;  0 = ICR1L      1 = ICR1H      2 = OCR1BL     3 = OCR1BH
+;  4 = OCR1AL     5 = OCR1AH     6 = TCNT1L     7 = TCNT1H
+;  8 = combined TCCR1 (merged TCCR1A, TCCR1B, SFIOR)
+;
+;TCCR1 bit assignment
+;write [WGM13|WGM12|WGM11|WGM10|PSR10|CS12|CS11|CS10]
+;read  [WGM13|WGM12|WGM11|WGM10|  0  |CS12|CS11|CS10]
+
+t1r_adr:
+   lds   operand,t1_adr       ;respond with current address
+   ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+   ret
+
+t1w_adr:
+   sts   t1_adr,operand
+   rjmp  iw_exit
+
+t1r_data:
+   lds   xl,t1_adr
+   cpi   xl,8            ;TCCR1?
+   iflo  t1r_data_word
+      addi  xl,0x46        ;add memory offset to t1 registers
+      ldi   xh,0
+      ld    operand,x
+      lds   xl,t1_adr
+      eor   xl,one         ;switch between low & high byte
+      sts   t1_adr,xl
+   else  t1r_data_word
+      ifeq  t1r_data_ctl
+         lds   operand,t1_ctrl
+      else  t1r_data_ctl
+         clr   operand
+      end   t1r_data_ctl
+   end   t1r_data_word
+   ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+   ret
+
+t1w_data:
+   lds   xl,t1_adr
+   cpi   xl,8            ;TCCR1?
+   iflo  t1w_data_word
+      addi  xl,0x46        ;add memory offset to t1 registers
+      ldi   xh,0
+      st    x,operand
+      lds   xl,t1_adr
+      eor   xl,one         ;switch between high & low byte
+      sts   t1_adr,xl
+   else  t1w_data_word
+      ifeq  t1w_data_ctl
+         mov   a,operand      ;test prescaler bits valid
+         andi  a,7            ;mask clock select bits
+         mov   b,operand
+         andi  b,0xf7         ;strip psr10 - is write only
+         sts   t1_ctrl,b      ;store for readback
+         andi  b,0x30         ;mask wgm11:10
+         swap  b              ;move into position
+         out   TCCR1A,b
+         mov   b,operand      ;mask wgm13:12
+         andi  b,0xc0
+         swap  b              ;move into position
+         lsl   b
+         or    a,b            ;merge with clock select
+         out   TCCR1B,a
+         in    a,SFIOR        ;move psr10 to sfior
+         bst   operand,3
+         bld   a,0
+         out   SFIOR,a
+      end   t1w_data_ctl
+   end   t1w_data_word
+   rjmp  iw_exit
+
+t1_rs:
+   out   TCCR1A,zero    ;stop timer
+   out   TCCR1B,zero
+   sts   t1_adr,zero    ;clear regs
+   sts   t1_ctrl,zero
+   ret
+
+;timer 1 interrupts
+t1_ovi:
+   lds   i,irq_flag     ;set t1 overflow
+   sbr   i,(1<<2)
+   sts   irq_flag,i
+   sbi   cbusddr,3      ;set IRQ
+   reti
+t1_ocra:
+   lds   i,irq_flag     ;set t1 output compare flag A
+   sbr   i,(1<<4)
+   sts   irq_flag,i
+   sbi   cbusddr,3      ;set IRQ
+   reti
+t1_ocrb:
+   lds   i,irq_flag     ;set t1 output compare flag B
+   sbr   i,(1<<3)
+   sts   irq_flag,i
+   sbi   cbusddr,3      ;set IRQ
+   reti
+t1_icr:
+   lds   i,irq_flag     ;set t1 input compare flag
+   sbr   i,(1<<5)
+   sts   irq_flag,i
+   sbi   cbusddr,3      ;set IRQ
+   reti
+
+;tick countdown timer
+;write # of ticks (10ms) to flag/interrupt
+;read remaining ticks to next flag/interrupt
+;reloads last countdown at bottom - periodic countdown
+tcdn_r:
+   lds   operand,tcdn_count   ;respond with remaining ticks
+   ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+   ret
+
+tcdn_w:
+   sts   tcdn_count,operand   ;store current count
+   sts   tcdn_top,operand     ;store periodic count
+   rjmp  iw_exit
+
+;interrupt mask register
+;allows avr internal io-flags to cause an IRQ on the 6502 cpu
+;write:[TDRE|RDRF|ICF1|OCF1A|OCF1B|TOV1|tcdn|tick]
+; read:[TDRE|RDRF|ICF1|OCF1A|OCF1B|TOV1|tcdn|tick]
+;tick = periodic 10ms interrupt (t0 ctc)
+;tcdn = tick countdown interrupt
+;T1 related masks - see ATMega datasheet
+;RDRF: set if receiver fifo has data - cleared if buffer empty
+;TDRE: set if transmitter fifo not full - cleared if buffer full
+ir_mask:
+   lds   operand,irq_mask     ;respond with current mask
+   ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+   ret
+
+iw_mask:
+   mov   a,operand            ;set t1 mask
+   andi  a,0x3c
+   ori   a,0b11               ;precharge timsk with t0 ie
+   sts   timer_ena,a
+   .ifdef irq_dis_real
+      sbrs  stat2,2              ;immediate only if not disabled
+   .endif
+   out   timsk,a
+   mov   a,operand            ;save mask
+   sts   irq_mask,a
+;   in    b,tifr               ;check pending flags enabled
+;   andi  b,0x3c
+   lds   d,irq_flag
+;   or    d,b                  ;merge t1 & saved           
+   and   d,a
+   tst   d
+   ifeq  mask_irq_clear       ;all masked flags serviced?
+      cbi   cbusddr,3            ;clear IRQ 
+   else  mask_irq_clear
+      sbi   cbusddr,3            ;set IRQ pending
+   end   mask_irq_clear
+   rjmp  iw_exit
+
+
+;interrupt flag register
+;avr internal io-flags
+;write:[ -  | -  |ICF1|OCF1A|OCF1B|TOV1|tcdn|tick]
+; read:[TDRE|RDRF|ICF1|OCF1A|OCF1B|TOV1|tcdn|tick]
+;tick: periodic 10ms interrupt (t0 ctc) - write 1 to clear
+;tcdn: tick countdown reached 0 - write 1 to clear
+;T1 related masks - see ATMega datasheet - write 1 to clear
+;RDRF: set if ACIA receiver fifo has data - cleared if empty
+;TDRE: set if ACIA transmitter fifo not full - cleared if full
+ir_flag:
+   lds   operand,irq_flag     ;respond with pending flags
+   in    a,tifr               ;get t1 flags
+   andi  a,0x3c
+   or    operand,a            ;merge to saved flags
+   ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+   ret
+
+iw_flag:
+   mov   a,operand            ;clear t1 flags
+   andi  a,0x3c
+   out   tifr,a
+   in    b,tifr               ;keep pending flags
+   andi  b,0x3c
+   mov   a,operand            ;clear saved flags
+   andi  a,0b00111111         ;ACIA can not be cleared
+   eor   a,allon              ;reverse mask
+   lds   d,irq_flag
+   or    d,b                  ;merge t1 & saved
+   and   d,a                  ;mask over flags
+   sts   irq_flag,d
+   lds   c,irq_mask           ;check remaining enabled
+   and   d,c
+   ifeq  flag_irq_clear       ;all flags serviced?
+      cbi   cbusddr,3            ;clear IRQ 
+   end   flag_irq_clear
+   rjmp  iw_exit
+
+;interrupt vector register
+;avr internal io interrupt vectors, read only
+;reading the vector clears the corresponding flag except
+;external IRQ must be cleared at the source
+;RDRF & TDRE are cleared by writing or reading the ACIA data reg
+; 0 = external IRQ - low on IRQ input pin
+; 2 = tick  - periodic 10ms interrupt (t0 ctc)
+; 4 = tcdn  - tick countdown reached 0
+; 6 = TOV1  - timer 1 overflow
+; 8 = OCF1B - timer 1 output compare register b match
+;10 = OCF1A - timer 1 output compare register a match
+;12 = ICF1  - timer 1 input capture register match
+;14 = RDRF  - ACIA receive data register full
+;16 = TDRE  - ACIA transmit data register empty
+ir_vector:
+   clr   operand              ;initialize vector
+   lds   c,irq_flag           ;read pending flags
+   lds   d,irq_mask           ;mask with enabled interrupts
+   mov   b,c                  ;make 6 enabled
+   and   b,d
+   ifne  ir_vect_internal
+      set                        ;precharge to set bit
+      mov   a,b
+      andi  a,0xf0               ;interrupt source 2^2?
+      ifne  ir_vect_b2
+         mov   b,a                  ;isolate bit group
+         bld   operand,2            ;add 2^2
+      end   ir_vect_b2
+      mov   a,b
+      andi  a,0xcc               ;interrupt source 2^1?
+      ifne  ir_vect_b1
+         mov   b,a                  ;isolate bit group
+         bld   operand,1            ;add 2^1
+      end   ir_vect_b1
+      mov   a,b
+      andi  a,0xaa               ;interrupt source 2^0?
+      ifne  ir_vect_b0
+         mov   b,a                  ;isolate bit group
+         bld   operand,0            ;add 2^0
+      end   ir_vect_b0
+      inc   operand              ;make vector 2 4 6 ... 16
+      lsl   operand
+      eor   b,allon              ;clear flag
+      sbr   b,0b11000000         ;can't clear RDRF & TDRE
+      and   c,b
+      sts   irq_flag,c
+      and   d,c                  ;all enabled flags done?
+      ifeq  ir_vect_clr_int
+         cbi   cbusddr,3            ;clear IRQ 
+      end   ir_vect_clr_int
+   end   ir_vect_internal
+   ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+   ret
+
+;diag selftest register
+;allows setting of external control lines if enabled
+;enter debugger, query debugger running, query DMA available
+;write:[DEB| - | - | - | - |RES|NMI|IRQ]
+;        + start debugger, halt emulation
+; read:[DEB| 1 | 0 | 0 | 0 | 0 |NMI|IRQ]
+;        |   + IO version >= 0.83 (has DMA)
+;        + debugger currently running, ACIA disconnected
+ir_diag:
+   lds   operand,selftest  ;respond with saved selftest flags
+   ldi   a,0b1000000       ;mark current IO version
+   sbrc  flags,deb_on      ;mark debugger is running
+      sbr   a,0b10000000
+   or    operand,a
+   ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+   ret
+
+iw_diag:
+   sbrs  operand,7         ;test enter diag
+   ifs   iw_diag_enter
+      andi  flags,(1<<string) ;stop emulation, keep string
+      sbr   flags,0b101       ;debugging on & active
+      lds   a,irq_flag        ;clear ACIA TDRE & RDRF
+      cbr   a,0b11000000
+      sts   irq_flag,a
+      lds   c,irq_mask        ;other interrupts pending & enabled?
+      and   a,c
+      ifeq  iw_diag_irq
+         cbi   cbusddr,3         ;clear any pending acia interrupts
+      end   iw_diag_irq
+      ldi   yh,high(rx_buf)   ;load buffer index
+      ldi   yl,0              ;purge buffer
+      ldi   a,10              ;start with a linefeed 
+      st    y+,a              ;store data
+      ldi   a,27              ;force escape
+      st    y+,a              ;store data
+      sts   rx_inx,yl         ;store pointers
+      sts   rx_fill,yl
+      ;*** test diag stop immediate
+;      sbr   flags,(1<<deb_act)  ;prevent double_activation
+      ldi   a,NMI_dis      ;no emulator interrupts during monitor
+      out   ibus,a
+      .ifdef irq_dis_real
+         ldi   a,0b11            ;enable t0 interrupts (tick, single step)
+         out   timsk,a
+         lds   a,usart_ena       ;enable usart interrupts
+         out   ucsrb,a
+      .endif
+      sei
+      rjmp  debugger
+      ;*** test diag stop immediate
+   end   iw_diag_enter
+.ifdef ena_diag
+   sbrc  operand,2         ;test force reset
+   rjmp  diag_reset        ;currently emulated
+   sbrc  operand,1         ;test force NMI
+   sbi   cbusddr,2         ;set low (open drain)
+   sbrs  operand,1         ;test clear NMI
+   cbi   cbusddr,2         ;release high (open drain)
+   sbrc  operand,0         ;test force IRQ
+   sbi   cbusddr,3         ;set low (open drain)
+   sbrs  operand,0         ;test clear IRQ
+   cbi   cbusddr,3         ;set low (open drain)
+   mov   a,operand         ;mask last 2 bits
+   andi  a,3
+   sts   selftest,a        ;save for read
+   rjmp  iw_exit
+
+diag_reset:
+   call soft_reset
+.endif
+   rjmp  iw_exit
+
+;reset of interrupt masks and flags
+irq_rs:
+;   in    a,timsk           ;clear t1 mask
+;   cbr   a,0x3c
+;   out   timsk,a
+;   ldi   a,0x3c            ;clear t1 flags
+;   out   tifr,a
+   cbi   cbusddr,3         ;clear IRQ
+   cbi   cbusddr,2         ;clear NMI
+   sts   selftest,zero     ;clear saved flags
+   sts   irq_mask,zero
+   ldi   a,0x80            ;TDRE remains active
+   sts   irq_flag,a
+   ret
+
+;*****************************************************************
+;
+; common IO exits (unused addresses and retry on busy)
+;
+;*****************************************************************
+
+;retrying a read I/O instruction until the data becomes available
+ir_retry:
+   pop   a        ;discard return address
+   pop   a
+
+;retrying a write I/O instruction until the register (buffer) becomes available
+iw_retry:
+   sbiw  pch:pcl,2         ;prepare for instruction retry
+   sbrs  flags,op_ind      ;3 byte instruction if direct
+   sbiw  pch:pcl,1
+
+;no mapping for write or normal exit
+iw_exit:
+   cbr   flags,(1<<modify) ;unlock extended memory address after modify
+   out   cbus,readmem      ;OE / read mode back on
+   ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+   op_decode
+
+;no mapping for read
+ir_exit:
+   ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+rs_exit:
+   ret
+
+.ifndef lcd_sel   
+   .equ lcd_rd  = ir_exit
+   .equ lcd_wrt = iw_exit
+   .equ lcd_rs  = rs_exit
+.endif
+
+;**************************************************************
+;
+; I/O address decode tables and customizable IO modules
+; part 2 of configuration
+;
+;**************************************************************
+;
+.set config_part = 2
+.include "6502_Emu_config.inc"
+
+;read address decode of internally mapped registers
+iordreg:
+   io_adr_dec  ior_int_tab
+    
+;write address decode of internally mapped registers
+iowtreg:
+   io_adr_dec  iow_int_tab
+
+.ifdef spi_sel
+;********************************************************************
+;
+;     SPI
+;
+;********************************************************************
+;fixed definitions for the SPI interface - port share with abuslo
+.EQU  spi_in      =pinb       ; SPI input
+.EQU  spi_ddr     =ddrb       ; SPI DDR,
+.EQU  spi_out     =portb      ; SPI output
+.EQU  spi_sck     =7          ; spi clock output
+.EQU  spi_miso    =6          ; master input
+.EQU  spi_mosi    =5          ; master output
+;     spi_ss      =0-4        ; spi slave select
+
+;SPI command - write SPCR, SPSR, slave select hold
+;w    [  x  |SSHLD|DORD |SPI2X|CPOL |CPHA |SPR1 |SPR0 ]
+;                          >-----------------------v
+;SPSR [  0  |  0  |  0  |  0  |  0  |  0  |  0  |SPI2X]
+;
+;SPCR [  0  |  0  |DORD |  1  |CPOL |CPHA |SPR1 |SPR0 ]
+; --> [SPIE | SPE |DORD |MSTR |CPOL |CPHA |SPR1 |SPR0 ]
+spw_cmd:
+   sbrc  operand,6         ;test clearing sshld
+   ifs_and  spw_cmd_sshld
+   lds   a,spi_cmd
+   sbrs  a,6               ;test sshld not already clear 
+   ifs      spw_cmd_sshld 
+      ldi   a,spi_idle        ;turn off ss
+      out   abuslo,a
+      sbi   spcr,spe          ;enable SPI
+      set_io_select spi_sel
+      ena_io_select
+      dis_spi_select          ;latch spi interface
+      cbi   spcr,spe          ;stop spi
+      out   cbus,readmem      ;clear IO ext select & set read mode
+   end   spw_cmd_sshld 
+   sts   spi_cmd,operand   ;save slave select hold   
+   mov   a,operand         ;charge with forced bits
+   sbr   a,(1<<mstr)       ;always master
+   cbr   a,(1<<spie|1<<spe) ;no interrupt enable & no spi enable
+   out   spcr,a
+   out   spsr,zero
+   sbrc  operand,4         ;test SPI2X
+      out   spsr,one          ;SPI2X is set
+   rjmp  iw_exit
+
+;SPI data - r/w SPDR
+;
+spw_data:
+   .ifdef   spi_vat        ;do slave address translation
+      mov   zl,oplow
+      andi  zl,7              ;A0:2 only
+      addi  zl,low(spi_vss<<1)
+      ldi   zh,high(spi_vss<<1)
+      lpm   c,z
+      out   spi_out,c
+   .endif
+   sbi   spcr,spe          ;enable SPI
+   set_io_select spi_sel
+   ena_io_select
+   out   spdr,operand      ;write data
+   ldi   a,spi_idle        ;prepare to turn off ss
+   lds   c,spi_cmd         ;get slave select hold
+   wait_spi
+   in    d,spdr            ;read incoming data
+   sts   spi_rdat,d
+   sbrs  c,6               ;slave select hold?
+      out   abuslo,a          ;end slave select
+   dis_spi_select          ;latch spi interface
+   cbi   spcr,spe          ;stop spi
+   out   cbus,readmem      ;clear IO ext select & set read mode
+   rjmp  iw_exit
+spr_data:
+   .ifdef   spi_vat        ;do slave address translation
+      mov   zl,oplow
+      andi  zl,7              ;A0:2 only
+      addi  zl,low(spi_vss<<1)
+      ldi   zh,high(spi_vss<<1)
+      lpm   c,z
+      out   spi_out,c
+   .endif
+   sbi   spcr,spe          ;enable SPI
+   set_io_select spi_sel
+   ena_io_select
+   out   spdr,allon        ;dummy write
+   ldi   a,spi_idle        ;prepare to turn off ss
+   lds   c,spi_cmd         ;get slave select hold
+   wait_spi
+   in    operand,spdr      ;read incoming data
+   sbrs  c,6               ;slave select hold?
+      out   abuslo,a          ;end slave select
+   dis_spi_select          ;latch spi interface
+   cbi   spcr,spe          ;stop spi
+   out   cbus,readmem      ;clear IO ext select & set read mode
+   ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+   ret
+
+;read data received during last write of the SPI
+spr_dat_lst:
+   lds   operand,spi_rdat
+   ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+   ret
+
+;SPI reset
+spi_rs:
+   ldi   a,spi_idle        ;no slave selected
+   out   spi_out,a
+   ldi   a,0b01010011      ;enable, master, dead slow
+   out   spsr,zero         ;clear double speed
+   out   spcr,a
+   set_io_reset   spi_sel
+   ena_io_select
+   out_spi zero            ;8 clocks to nobody
+   in_spi a                ;check MISO pulled high
+   cpi   a,0xff
+   ifne  spi_rs_fail
+      PrintStr_far spi_fail
+   end   spi_rs_fail
+   dis_spi_select          ;latch spi interface
+   out   cbus,readmem      ;clear IO ext select & set read mode
+   sts   spi_cmd,zero      ;set default
+   ldi   a,0x10            ;master & default
+   out   spcr,a
+   ret
+spi_fail:   .db   13,10,"SPI bus stuck",0
+
+;DMA SPI read block
+dma_spi_rb:
+   lds   a,spi_cmd         ;verify slave select hold
+   sbrs  a,6
+   ifs   dma_spi_rssh
+      lds   a,dma_last_cmd    ;verify last command and parameters
+      lds   b,dma_tab_index
+      cpi   a,3               ;current SPI read block (retry)?
+      ifeq  spi_drb_retry
+         lds   xl,dma_tab+5            ;load in progress block count
+         lds   xh,dma_tab+6
+         rjmp  dma_spi_rb1
+      end   spi_drb_retry
+      cpi   a,0x13            ;previous SPI read block?
+      ifeq_or  spi_drb
+      cpi   a,0               ;previous set block address table?
+      ifeq_and spi_drb
+      cpi   b,5               ;block address table valid?
+      ifeq     spi_drb
+         lds   xl,dma_tab+3      ;load block count
+         lds   xh,dma_tab+4
+         rjmp  dma_spi_rb1
+      end      spi_drb
+   end   dma_spi_rssh
+   sts   dma_last_cmd,allon ;mark invalid sequence of command
+   rjmp  iw_exit
+dma_spi_rb1:
+   sts   dma_last_cmd,operand ;mark command in progress
+   .ifdef   spi_vat        ;do slave address translation
+      lds   zl,dma_tab
+      andi  zl,7              ;A0:2 only
+      addi  zl,low(spi_vss<<1)
+      ldi   zh,high(spi_vss<<1)
+      lpm   c,z
+   .else
+      lds   c,dma_tab         ;load slave select
+   .endif
+   lds   zl,dma_tab+1         ;load memory address
+   lds   zh,dma_tab+2
+   in    a,spcr            ;load SPCR values
+   mov   d,a               ;disabled
+   sbr   a,(1<<spe)
+   mov   e,a               ;enabled
+   out   cbus,clear        ;readmode off
+   prep_io_select spi_sel
+   out   dbusddr,allon     ;prepare to write mem
+   in    a,timsk           ;block single step on retry
+   cbr   a,1<<toie0
+   out   timsk,a
+   sbr   flags,(1<<dma_rpt) ;set dma interrupt modifier
+   do       spi_drb_loop
+;      .ifdef irq_dis_real
+;         sbrs  stat2,2           ;all interrupts disable
+;      .endif
+      sei
+      ;read SPI
+      out   spi_out,c         ;slave select
+      cli
+      out   spcr,e            ;enable SPI
+      make_io_select
+      in_spi a                ;read incoming data
+      dis_spi_select          ;latch spi interface
+      out   spcr,d            ;disable spi
+      out   cbus,clear
+      ;write memory
+      out   abuslo,zl         ;set memory address
+      out   abushi,zh
+      out   cbus,writemem     ;WE, ~OE
+      out   dbusout,a         ;dbus write
+      adiw  z,1
+      out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+      sbiw  x,1
+   loopne   spi_drb_loop
+   out   dbusddr,zero      ;end writing memory
+   sts   dma_tab+1,zl      ;save next memory address
+   sts   dma_tab+2,zh
+   ldi   a,0x13            ;last successful command was read
+   sts   dma_last_cmd,a
+   in    a,timsk           ;undo block single step
+   sbr   a,1<<toie0
+   out   timsk,a
+   cbr   flags,(1<<dma_rpt) ;clear dma interrupt modifier
+   rjmp  iw_exit
+;DMA SPI write block
+dma_spi_wb:
+   lds   a,spi_cmd         ;verify slave select hold
+   sbrs  a,6
+   ifs   dma_spi_wssh
+      lds   a,dma_last_cmd    ;verify last command and parameters
+      lds   b,dma_tab_index
+      cpi   a,2               ;current SPI read block (retry)?
+      ifeq  spi_dwb_retry
+         lds   xl,dma_tab+5      ;load in progress block count
+         lds   xh,dma_tab+6
+         rjmp  dma_spi_wb1
+      end   spi_dwb_retry
+      cpi   a,0x12            ;previous SPI read block?
+      ifeq_or  spi_dwb
+      cpi   a,0               ;previous set block address table?
+      ifeq_and spi_dwb
+      cpi   b,5               ;block address table valid?
+      ifeq     spi_dwb
+         lds   xl,dma_tab+3      ;load block count
+         lds   xh,dma_tab+4
+         rjmp  dma_spi_wb1
+      end      spi_dwb
+   end   dma_spi_wssh
+   sts   dma_last_cmd,allon ;mark invalid sequence of command
+   rjmp  iw_exit
+dma_spi_wb1:
+   sts   dma_last_cmd,operand ;mark command in progress
+   .ifdef   spi_vat        ;do slave address translation
+      lds   zl,dma_tab
+      andi  zl,7              ;A0:2 only
+      addi  zl,low(spi_vss<<1)
+      ldi   zh,high(spi_vss<<1)
+      lpm   c,z
+   .else
+      lds   c,dma_tab         ;load slave select
+   .endif
+   lds   zl,dma_tab+1      ;load memory address
+   lds   zh,dma_tab+2
+   in    a,spcr            ;load SPCR values
+   mov   d,a               ;disabled
+   sbr   a,(1<<spe)
+   mov   e,a               ;enabled
+   prep_io_select spi_sel
+   in    a,timsk           ;block single step on retry
+   cbr   a,1<<toie0
+   out   timsk,a
+   sbr   flags,(1<<dma_rpt) ;set dma interrupt modifier
+   do       spi_dwb_loop
+      ;read memory
+      out   abuslo,zl
+      out   abushi,zh
+;      .ifdef irq_dis_real
+;         sbrs  stat2,2           ;all interrupts disable
+;      .endif
+            sei
+            nop
+            cli
+            adiw  z,1
+      wait_data_valid 4
+      in    a,dbusin
+      ;write SPI
+      out   spi_out,c         ;slave select
+      out   spcr,e            ;enable SPI
+      make_io_select
+      out_spi a               ;write data to spi
+      dis_spi_select          ;latch spi interface
+      out   spcr,d            ;stop spi
+      out   cbus,readmem
+      sbiw  x,1
+   loopne   spi_dwb_loop
+   sts   dma_tab+1,zl      ;save next memory address
+   sts   dma_tab+2,zh
+   ldi   a,0x12            ;last successful command was read
+   sts   dma_last_cmd,a
+   in    a,timsk           ;undo block single step
+   sbr   a,1<<toie0
+   out   timsk,a
+   cbr   flags,(1<<dma_rpt) ;clear dma interrupt modifier
+   rjmp  iw_exit
+.else
+   .equ  spw_cmd     = iw_exit
+   .equ  spw_data    = iw_exit
+   .equ  dma_spi_wb  = dma_cmd_inv
+   .equ  spr_data    = ir_exit
+   .equ  spr_dat_lst = ir_exit
+   .equ  dma_spi_rb  = dma_cmd_inv
+   .equ  spi_rs      = rs_exit
+.endif
+
+;********************************************************************
+;
+;     DMA for SPI, I2C and EEPROM or SD card load & save
+;
+;********************************************************************
+dmw_cmd:
+   mov   a,operand
+   cpi   a,dma_ct_end-dma_cmd_tab
+   iflo  dmw_cmd_valid
+      ldi   zl,low(dma_cmd_tab)
+      add   zl,a
+      ldi   zh,high(dma_cmd_tab)
+      adc   zh,zero
+      ijmp
+   end   dmw_cmd_valid
+dma_cmd_inv:
+   sts   dma_last_cmd,allon   ;set invalid command
+   rjmp  iw_exit
+dma_cmd_tab:                  ;table of valid DMA commands
+   rjmp  dma_set_tab   
+   rjmp  dma_set_tab
+   rjmp  dma_spi_wb
+   rjmp  dma_spi_rb
+   rjmp  dma_i2c_wb
+   rjmp  dma_i2c_rb
+   rjmp  dma_eep_save
+   rjmp  dma_eep_load
+dma_ct_end:
+
+;dma set block transfer table:
+;        SPI (cmd=0)    I2C (cmd=1)    EEPROM (cmd=0)
+;  byte  slave address  don't care     program number
+;  word  start address  start address  start address
+;  word  byte count     byte count     end address
+
+dma_set_tab:
+   sts   dma_tab_index,operand ;1 = skip 1st byte
+   sts   dma_last_cmd,operand       
+   rjmp  iw_exit
+
+;dma read block transfer status
+dmr_stat:
+   lds   operand,dma_last_cmd ;dummy response
+   ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+   ret
+
+;dma write block transfer table
+dmw_data:
+   lds   a,dma_last_cmd    ;set tab?
+   cpi   a,2   
+   iflo_and dmw_data_valid
+   lds   a,dma_tab_index
+   cpi   a,5               ;tab not already filled?
+   iflo     dmw_data_valid
+      ldi   zl,low(dma_tab)
+      ldi   zh,high(dma_tab)
+      add   zl,a
+      adc   zh,zero
+      st    z,operand
+      inc   a
+      sts   dma_tab_index,a
+      rjmp  iw_exit
+   end      dmw_data_valid
+   sts   dma_last_cmd,allon   ;invalid sequence
+   sts   dma_tab_index,allon
+   rjmp  iw_exit
+
+;dma read block transfer table
+;  used on load from EEPROM to fetch end address
+dmr_data:
+   lds   a,dma_tab_index
+   cpi   a,5               ;end of tab?
+   ifsh     dmr_tab_end
+      mov   a,zero            ;start over
+   end   dmr_tab_end
+   ldi   zl,low(dma_tab)
+   ldi   zh,high(dma_tab)
+   add   zl,a
+   adc   zh,zero
+   ld    operand,z
+   inc   a
+   sts   dma_tab_index,a
+   sts   dma_last_cmd,allon   ;can't continue
+   ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+   ret
+
+.ifdef i2c_sel
+;********************************************************************
+;
+;     TWI / I2C
+;
+;********************************************************************
+;
+;  TWI / I2C Hardware        VCC
+;                             +
+;                             |
+;   repeat for each signal    |
+;                            .-.
+;                            | |
+;             1/4 74HC4066   | |2k7
+;                   .---.    '-'
+;                   |   |     |
+;  o----------------|/ -|-----o--------------------o
+;   PortC 0:3   I/O |   | I/O    SCL/SDA/-INT/-RESET
+;                   '---'     |
+;                     |CTL
+;  >------------------+       |
+;   TWI activate
+;                             o
+;        optional Interrupt   | -INT only
+;                             |
+;                             |
+;  <---------------------->|--+
+;   -IRQ or -NMI in    Schottky
+;
+;define your I2C interface
+;i2c_sel defined in main file
+.EQU  i2c_in      =dbusin     ; I2C input
+.EQU  i2c_ddr     =dbusddr    ; I2C DDR
+.EQU  i2c_out     =dbusout    ; I2C output
+.EQU  i2c_scl     =0          ; clock i/o
+.EQU  i2c_sda     =1          ; data i/o
+.EQU  i2c_int     =2          ; -interrupt input (optional to detect i2c int)
+.EQU  i2c_res     =3          ; -reset output (optional to reset i2c slaves)
+; # of clocks for 400kHz SCL phase (1/2 clock) @ Osc_Hz rounded up
+.EQU  i2c_clk     =((Osc_Hz / 2 - 1) / 400000) + 1
+#define i2c_data a
+;used registers a (data), b (timing), zl (status), e (io select default)  
+
+;
+; open i2c interface
+;
+i2c_open:
+   set_io_select i2c_sel
+i2c_open_rs:
+   out   dbusout,allon     ;float all outputs high
+   out   dbusddr,allon     ;(discharge low cap)
+   mov   e,b
+   out   dbusddr,zero
+   out   dbusout,zero      ;open collector drive via ddr
+   ena_io_select
+   ret
+
+;
+; read i2c data
+;
+;     send ack before reading except on 1st read
+i2c_data_rd:   
+   lds   zl,i2c_statreg    ;load parameters
+   sbrc  zl,0              ;test interface stopped
+   ifs   i2c_read_ok
+      rcall i2c_open
+      bst   zl,2              ;set speed
+      clc                     ;ack
+      sbrc  zl,3              ;read ack required?
+         rcall i2c_putack
+      rcall i2c_read
+      mov   operand,i2c_data
+      sbr   zl,0b1000         ;set read ack required
+      sts   i2c_statreg,zl    ;save status
+      .if (io_sel_direct > 0)
+         out   abushi,e          ;close i2c interface
+      .endif
+      out   cbus,readmem      ;clear IO select & set read mode
+   else  i2c_read_ok
+      mov   operand,zero
+   end   i2c_read_ok
+   ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+   ret
+;
+; write i2c data if not stopped or previous read
+; write i2c address if start condition
+;
+;     if nak response (slave not ready/present) send stop
+i2c_data_wrt:
+   lds   zl,i2c_statreg    ;load parameters
+   bst   zl,2              ;set speed
+   sbrs  zl,1              ;start pending?
+   ifs   i2c_adr
+      mov   a,operand
+      rcall i2c_open
+      sec                     ;nak
+      sbrc  zl,3              ;read ack outstanding?
+         rcall i2c_putack
+      mov   i2c_data,operand
+      .ifdef i2c_eep_adr
+         cpi   i2c_data,eep_adr  ;protect nv program EEPROM
+         ifeq  i2c_eep_protect
+            sec
+         else  i2c_eep_protect
+            rcall i2c_start
+         end   i2c_eep_protect
+      .else
+         rcall i2c_start
+      .endif
+      andi  zl,0b100          ;keep speed, clear the rest
+      ifcc  i2c_start_ack
+         sbr   zl,0b1000000      ;set ack
+      else  i2c_start_ack
+         cbr   zl,0b1000000      ;clear ack
+         sbr   zl,0b1            ;set stop
+         rcall i2c_stop
+      end   i2c_start_ack
+      sts   i2c_statreg,zl
+      .if (io_sel_direct > 0)
+         out   abushi,e          ;close i2c interface
+      .endif
+      out   cbus,readmem      ;clear IO select & set read mode
+      rjmp  iw_exit
+   end   i2c_adr
+   mov   a,zl
+   andi  a,0b1001          ;not stopped and not read?
+   ifeq  i2_wrt_ok
+      rcall i2c_open
+      mov   i2c_data,operand
+      rcall i2c_write
+      andi  zl,0b100          ;keep speed, clear the rest
+      ifcc  i2c_write_ack
+         sbr   zl,0b1000000      ;set ack
+      else  i2c_write_ack
+         cbr   zl,0b1000000      ;clear ack
+         sbr   zl,0b1            ;set stop
+         rcall i2c_stop
+      end   i2c_write_ack
+      sts   i2c_statreg,zl
+      .if (io_sel_direct > 0)
+         out   abushi,e          ;close i2c interface
+      .endif
+      out   cbus,readmem      ;clear IO select & set read mode
+      rjmp  iw_exit
+   end   i2_wrt_ok
+   rjmp  iw_exit
+
+;
+;  write i2c command
+;
+;0=send stop, nak & stop if pending read
+;1=set start(next data write = address), speed 100kHz
+;2=set start(next data write = address), speed 400kHz
+;3=send reset (9 naks), optional hw reset
+;  allow sufficient time after resetting hardware 
+;
+i2c_cmd:
+   lds   zl,i2c_statreg
+   mov   a,operand
+   cpi   a,3
+   iflo  i2c_cmd_012
+      cpi   a,1
+      iflo  i2c_cmd_stop      ;command code 0 - send stop
+         rcall i2c_send_stop
+         rjmp  i2c_cmd_exit
+      end   i2c_cmd_stop 
+      ifeq  i2c_start_100     ;command code 1 - set start 100kHz 
+         cbr   zl,0b100       ;speed 100 kHz
+         sbrc  zl,5           ;bus not stuck?        
+            rcall i2c_reset   ;stuck bus requires a reset
+         sbrs  zl,5           ;bus still stuck?
+            sbr   zl,0b10     ;OK to start
+         rjmp  i2c_cmd_exit
+      end   i2c_start_100     ;command code 2 - set start 400kHz
+      cbr   zl,0b100          ;speed 100 kHz for reset
+      sbrc  zl,5              ;bus not stuck?        
+         rcall i2c_reset      ;stuck bus requires a reset
+      sbrs  zl,5              ;bus still stuck?
+         sbr   zl,0b110       ;OK to start with 400kHz
+      rjmp  i2c_cmd_exit
+   end   i2c_cmd_012
+   ifeq  i2c_cmd_reset        ;command code 3 - reset i2c bus
+      rcall i2c_reset
+   end   i2c_cmd_reset
+i2c_cmd_exit:
+   sts   i2c_statreg,zl
+   rjmp  iw_exit
+
+;stop i2c
+i2c_send_stop:
+   sbrc  zl,0              ;not already stopped?
+   ifs   i2c_not_stop
+      rcall i2c_open
+      bst   zl,2              ;set speed
+      sec                     ;nak
+      sbrc  zl,3              ;read ack outstanding?
+         rcall i2c_putack
+      andi  zl,0b100          ;keep speed, clear the rest
+      sbr   zl,0b1            ;set stop
+      rcall i2c_stop
+      .if (io_sel_direct > 0)
+         out   abushi,e          ;close i2c interface
+      .endif
+      out   cbus,readmem      ;clear IO select & set read mode
+   end   i2c_not_stop
+   ret
+
+;
+; read i2c status
+;
+;  [ IRQ | ACK |Stuck|  0  |Read |Speed|Start|Stop ]
+;IRQ:    1=I2C Interrupt pending
+;ACK:    1=slave acknowledge - device present/ready
+;Stuck:  1=SCL or SDA stuck - interface needs reset
+;  0
+;Read:   1=Send read acknowledge pending
+;Speed:  1=400kHz, 0=100kHz
+;Start:  1=next write = address
+;Stop:   1=interface stopped
+i2c_stat:
+   lds   zl,i2c_statreg    ;load status
+   rcall i2c_open
+   sbis  i2c_in,i2c_int    ;skip if no interrupt
+      sbr   zl,0b10000000     ;merge interrupt to status
+   mov   operand,zl
+   .if (io_sel_direct > 0)
+      out   abushi,e          ;close i2c interface
+   .endif
+   out   cbus,readmem      ;clear IO select & set read mode
+   ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+   ret
+   
+;
+; I2C reset - mark unusable if stuck
+;
+i2c_rs:
+   set_io_reset   i2c_sel
+   rcall i2c_open_rs
+   rcall i2c_reset_rs
+   sts   i2c_statreg,zl
+   sbrs  zl,5           ;message, if I2C stuck
+   ifs   i2c_rs_fail
+      PrintStr_far i2c_fail
+   end   i2c_rs_fail
+   ret
+i2c_fail:   .db   13,10,"I2C bus stuck",0
+
+;DMA I2C read block
+dma_i2c_rb:
+   lds   a,dma_last_cmd
+   lds   b,dma_tab_index
+   cpi   a,5               ;current i2c read block (retry)?
+   ifeq  i2c_drb_retry
+      lds   xl,dma_tab+5            ;load in progress block count
+      lds   xh,dma_tab+6
+      rjmp  dma_i2c_rb1
+   end   i2c_drb_retry
+   cpi   a,0x15            ;previous i2c read block?
+   ifeq_or  i2c_drb
+   cpi   a,1               ;previous set block address table?
+   ifeq_and i2c_drb
+   cpi   b,5               ;block address table valid?
+   ifeq     i2c_drb
+      lds   xl,dma_tab+3      ;load block count
+      lds   xh,dma_tab+4
+      rjmp  dma_i2c_rb1
+   end      i2c_drb
+dma_i2c_rbfail:
+   sts   dma_last_cmd,allon ;mark invalid sequence of command
+   rjmp  iw_exit
+dma_i2c_rb1:
+   sts   dma_last_cmd,operand ;mark command in progress
+   lds   zl,dma_tab+1      ;load memory address
+   lds   zh,dma_tab+2
+
+   lds   yl,i2c_statreg    ;load current I2C status
+   sbrc  yl,0              ;test interface stopped
+      rjmp  dma_i2c_rbfail
+   out   cbus,clear        ;readmode off
+   rcall i2c_open
+   in    c,cbus            ;save I2C register enable
+   in    d,abushi          ;save I2C enable
+   bst   yl,2              ;set speed
+   clc                     ;ack
+   sbrc  yl,3              ;read ack required?
+      rcall i2c_putack
+   sbr   yl,0b1000         ;set read ack required
+   sts   i2c_statreg,yl    ;save status
+   in    a,timsk           ;block single step on retry
+   cbr   a,1<<toie0
+   out   timsk,a
+   sbr   flags,(1<<dma_rpt) ;set dma interrupt modifier
+   do       i2c_drb_loop
+      ;continue reading I2C
+      rcall i2c_read
+      .if (io_sel_direct > 0)
+         out   abushi,e          ;close i2c interface
+      .endif
+      out   cbus,clear        ;clear IO select
+      ;write memory
+      out   dbusddr,allon     ;prepare to write mem
+      out   abuslo,zl         ;set memory address
+      out   abushi,zh
+      out   cbus,writemem     ;WE, ~OE
+      out   dbusout,a         ;dbus write
+      adiw  z,1
+      out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+      sbiw  x,1
+   exiteq   i2c_drb_loop
+      ;read i2c
+      out   dbusout,allon     ;float all outputs high
+;      .ifdef irq_dis_real
+;         sbrs  stat2,2           ;all interrupts disable
+;      .endif
+      sei
+      out   dbusddr,zero
+      cli
+      out   dbusout,zero      ;open collector drive via ddr
+      out   abushi,d          ;reenable I2C bus 
+      out   cbus,c
+      clc
+      bst   yl,2              ;set speed
+      rcall i2c_putack
+   loop     i2c_drb_loop
+   out   dbusddr,zero      ;end writing to memory
+   sts   dma_tab+1,zl      ;save next memory address
+   sts   dma_tab+2,zh
+   ldi   a,0x15            ;last successful command was read
+   sts   dma_last_cmd,a
+   in    a,timsk           ;undo block single step
+   sbr   a,1<<toie0
+   out   timsk,a
+   cbr   flags,(1<<dma_rpt) ;clear dma interrupt modifier
+   rjmp  iw_exit
+
+;DMA I2C write block
+dma_i2c_wb:
+   lds   a,dma_last_cmd
+   lds   b,dma_tab_index
+   cpi   a,4               ;current i2c read block (retry)?
+   ifeq  i2c_dwb_retry
+      lds   xl,dma_tab+5      ;load in progress block count
+      lds   xh,dma_tab+6
+      rjmp  dma_i2c_wb1
+   end   i2c_dwb_retry
+   cpi   a,0x14            ;previous i2c read block?
+   ifeq_or  i2c_dwb
+   cpi   a,1               ;previous set block address table?
+   ifeq_and i2c_dwb
+   cpi   b,5               ;block address table valid?
+   ifeq     i2c_dwb
+      lds   xl,dma_tab+3      ;load block count
+      lds   xh,dma_tab+4
+      rjmp  dma_i2c_wb1
+   end      i2c_dwb
+dma_i2c_rwfail:
+   sts   dma_last_cmd,allon ;mark invalid sequence of command
+   rjmp  iw_exit
+dma_i2c_wb1:
+   sts   dma_last_cmd,operand ;mark command in progress
+   lds   zl,dma_tab+1      ;load memory address
+   lds   zh,dma_tab+2
+   prep_io_select i2c_sel
+   mov   e,b               ;save I2C register idle
+   mov   d,yl              ;save I2C register active
+   mov   c,yh              ;save I2C register enable
+   lds   yl,i2c_statreg    ;load I2C status
+   mov   a,yl
+   andi  a,0b1001          ;not stopped and not read?
+   brne  dma_i2c_rwfail
+   in    a,timsk           ;block single step on retry
+   cbr   a,1<<toie0
+   out   timsk,a
+   sbr   flags,(1<<dma_rpt) ;set dma interrupt modifier
+   do       i2c_dwb_loop
+      ;read memory
+      out   abuslo,zl
+      out   abushi,zh
+;      .ifdef irq_dis_real
+;         sbrs  stat2,2           ;all interrupts disable
+;      .endif
+            sei
+            nop
+            cli
+            adiw  z,1
+            bst   yl,2              ;set speed
+      wait_data_valid 5
+      in    a,dbusin
+      ;write i2c
+      out   cbus,clear
+      out   dbusout,allon     ;float all outputs high
+      out   dbusddr,allon     ;(discharge low cap)
+      out   dbusddr,zero
+      out   dbusout,zero      ;open collector drive via ddr
+      out   abushi,d          ;reenable I2C bus 
+      out   cbus,c
+      rcall i2c_write
+   ifcc  i2c_dwb_ack
+      .if (io_sel_direct > 0)
+         out   abushi,e          ;close i2c interface
+      .endif
+      out   cbus,readmem      ;clear IO select & set read mode
+      sbiw  x,1
+   loopne   i2c_dwb_loop
+      ldi   a,0x14            ;last successful command was read
+   else  i2c_dwb_ack
+      andi  yl,0b100          ;keep speed, clear ack & the rest
+      sbr   yl,0b1            ;set stop
+      sts   i2c_statreg,yl
+      rcall i2c_stop
+      .if (io_sel_direct > 0)
+         out   abushi,e          ;close i2c interface
+      .endif
+      out   cbus,readmem
+      mov   a,allon           ;mark dma failed unless...
+      sbiw  x,1
+      ifeq  i2c_dwb_end_nak   ;...it is at the end of the block
+         ldi   a,0x14
+      end   i2c_dwb_end_nak
+   end   i2c_dwb_ack
+   sts   dma_last_cmd,a
+   sts   dma_tab+1,zl      ;save next memory address
+   sts   dma_tab+2,zh
+   in    a,timsk           ;undo block single step
+   sbr   a,1<<toie0
+   out   timsk,a
+   cbr   flags,(1<<dma_rpt) ;clear dma interrupt modifier
+   rjmp  iw_exit
+
+;*********************
+
+
+;
+; wait_i2c  @0 = # of cycles, @1 = cyles already used 
+;
+;     i2c clock delay for 400 kHz (100kHz if T clear)
+;     
+;
+.macro      wait_i2c
+      .set cycles = (@0 - 2) - @1       ;400 kHz delay -BRTS -used     
+      .if (cycles > 2)
+        .set  loop_cycles = (cycles / 3)      
+        ldi   b,loop_cycles
+        brts  i2c_400kHz
+        ldi   b,loop_cycles + @0        ;add 3* delay (100 kHz))
+i2c_400kHz:
+        dec   b
+        brne  pc-1
+        .set  cycles = (cycles - (loop_cycles * 3))
+      .else
+        .set  loop_cycles = @0
+        brts  i2c_400kHz
+        ldi   b,loop_cycles           ;add 3* delay (100 kHz)
+        dec   b
+        brne  pc-1
+        nop                           ;compensate branch not taken
+i2c_400kHz:
+      .endif
+      .if (cycles > 0)
+        .if   (cycles & 4)
+          rjmp  pc+1
+          rjmp  pc+1
+        .endif
+        .if   (cycles & 2)
+          rjmp  pc+1
+        .endif
+        .if   (cycles & 1)
+          nop
+        .endif
+      .endif
+.endmacro
+;
+; i2c macros - single master
+;   allow clock stretching but no collision detection
+;
+.macro      sda1        ;set sda high, single master
+            cbi   i2c_ddr,i2c_sda
+.endmacro 
+.macro      scl1        ;set scl high, wait scl high
+            cbi   i2c_ddr,i2c_scl
+            sbis  i2c_in,i2c_scl    ;subtract 2 clocks
+            rjmp  pc-1              ;in next wait_ns
+.endmacro
+.macro      sda0        ;set sda low
+            sbi   i2c_ddr,i2c_sda
+.endmacro
+.macro      scl0        ;set scl low
+            sbi   i2c_ddr,i2c_scl
+.endmacro
+
+;
+; i2c interface reset & check for stuck bus
+;
+i2c_reset:
+   rcall i2c_open
+i2c_reset_rs:
+   sbi   i2c_ddr,i2c_res   ;optional hw reset
+   wait_i2c 190,0          ;allow reset to disengage slaves
+   clr   zl                ;clear all
+   sbic  i2c_in,i2c_scl    ;SCL stuck low?
+   ifs   i2c_stuck         ;set interface not usable status
+      sbr   zl,0b100001       ;set stop & stuck
+   else  i2c_stuck         ;reset for devices without hw-reset
+      clt                     ;set low speed
+      ldi   i2c_data,0xff     ;9 clocks with nak
+      rcall i2c_write
+      sbic  i2c_in,i2c_sda    ;SDA stuck low?
+      ifs   i2c_sda_stuck
+         sbr   zl,0b100001       ;set stop & stuck
+      else  i2c_sda_stuck
+         sbr   zl,0b1            ;set stop
+      end   i2c_sda_stuck
+      rcall i2c_stop
+   end   i2c_stuck
+   cbi   i2c_ddr,i2c_res   ;end optional hw reset
+   .if (io_sel_direct > 0)
+      out   abushi,e          ;close i2c interface
+   .endif
+   out   cbus,readmem      ;clear IO select & set read mode
+   ret
+
+;
+; i2c start with address
+;
+;     start -> slave,  i2c_data -> slave address
+;     slave ack -> SREG.C     
+;
+i2c_start:  sbic  i2c_in,i2c_sda    ;clock previous ack
+            ifs   start_prev_ack
+               scl0
+               wait_i2c i2c_clk,2      ;scl1
+               scl1
+               wait_i2c i2c_clk/2,4    ;scl1-sda0    
+            end   start_prev_ack    
+            sda0
+            wait_i2c i2c_clk/2,4    ;sec-rol-scl0
+;
+; i2c write: i2c_data -> slave data, slave ack -> SREG,C
+;
+i2c_write:  sec                     ;mark incomplete
+            rol   i2c_data
+i_wrtloop:  scl0
+            wait_i2c i2c_clk/2,4    ;brcc-(nop)-sdax
+            brcc  i_wrt0            ;data bit = 0
+            nop                     ;sda set after 4 clocks
+            sda1
+            rjmp  i_wrt1
+i_wrt0:     sda0
+            rjmp  i_wrt1            ;nop 2 clocks
+i_wrt1:     wait_i2c i2c_clk/2,4    ;rjmp-scl1
+            scl1
+            wait_i2c i2c_clk,7      ;scl1-lsl-brne-(nop)-scl0
+            lsl   i2c_data
+            brne  i_wrtloop
+            nop
+
+i2c_getack: scl0
+            wait_i2c i2c_clk/2,2    ;sda1
+            sda1                    ;release sda after write
+            wait_i2c i2c_clk/2,2    ;scl1
+            scl1
+            wait_i2c i2c_clk/2,3    ;scl1-clc
+            clc
+            sbic  i2c_in,i2c_sda
+            sec
+            ret
+;
+; i2c read: slave data -> i2c_data, 
+;
+i2c_read:   ldi   i2c_data,1        ;precharge register full marker
+i_rdloop:   wait_i2c i2c_clk/2,7    ;sbic-(sec)-rol-brcc-scl0
+            scl0
+            wait_i2c i2c_clk/2,2    ;sda1
+            sda1                    ;clear sda out from prev. putack
+            wait_i2c i2c_clk/2,2    ;scl1
+            scl1
+            wait_i2c i2c_clk/2,3    ;scl1-clc    
+            clc
+            sbic  i2c_in,i2c_sda
+            sec
+            rol   i2c_data
+            brcc  i_rdloop          ;precharged bit hasn't arrived
+            ret
+;
+; i2c putack: SREG,C -> slave ack
+;
+i2c_putack: scl0
+            wait_i2c i2c_clk/2,4    ;brcc-(nop)-sdax
+            brcc  i_pack1
+            nop                     ;compensate brcc
+            sda1
+            rjmp  i_pack2
+i_pack1:    sda0
+            rjmp  i_pack2           ;nop 2 clocks
+i_pack2:    wait_i2c i2c_clk/2,4    ;rjmp-scl1
+            scl1
+            wait_i2c i2c_clk/2,5    ;scl1-ret-rcall-ldi+wait(-7)-scl0
+            ret
+;
+; i2c stop
+;
+i2c_stop:   wait_i2c i2c_clk/2,6    ;scl1+wait(-5)-ret-rcall-scl0
+            scl0
+            wait_i2c i2c_clk/2,2    ;sda0
+            sda0
+            wait_i2c i2c_clk/2,2    ;scl1
+            scl1
+            wait_i2c i2c_clk/2,4    ;scl1-sda1
+            sda1
+            ret
+.else
+   .equ i2c_data_wrt = iw_exit
+   .equ i2c_cmd      = iw_exit
+   .equ i2c_data_rd  = ir_exit
+   .equ i2c_stat     = ir_exit
+   .equ i2c_rs       = rs_exit
+   .equ dma_i2c_wb   = dma_cmd_inv
+   .equ dma_i2c_rb   = dma_cmd_inv
+.endif
+
+.ifdef eep_vld
+;*****************************************************
+;
+; external SPI/I2C EEPROM as non volatile program storage
+;
+;*****************************************************
+;
+; EEP open - check spi/i2c bus & EEPROM presence
+eep_open:
+   .ifdef spi_eep_adr
+      out   spsr,one          ;speed 8MHz, mode 0, enabled
+      ldi   a,0x50
+      out   spcr,a
+      ldi   a,spi_eep_adr
+      out   spi_out,a
+      set_io_select spi_sel
+      ena_io_select
+      mov   e,b               ;deselcted IO (abushi)
+      ldi   a,5               ;command: read status register
+      out_spi a
+      in_spi a
+      in    f,spi_out         ;selected slave (abuslo a.k.a. spi_out)
+      ldi   b,spi_idle        ;stop slave select
+      out   spi_out,b
+      cpi   a,0xff            ;MISO open?
+      breq  eep_no_device
+   .else
+      set                     ;speed 400kHz
+      rcall i2c_open
+      sbis  i2c_in,i2c_scl    ;SCL stuck low?
+      rjmp  eep_no_device
+      ldi   i2c_data,0xff     ;9 clocks with nak
+      rcall i2c_write
+      sbis  i2c_in,i2c_sda    ;SDA stuck low?
+      rjmp  eep_no_device
+      rcall i2c_stop
+      ldi   a,eep_adr         ;test device present
+      rcall i2c_start
+      brcs  eep_no_device
+      rcall i2c_stop
+   .endif
+   .if (io_sel_direct > 0)
+      in    d,abushi          ;selected IO exp. (abushi)
+   .endif
+   in    c,cbus            ;selected IO (cbus)
+   ret 
+eep_no_device:
+   PrintStr err_no_eep     ;" SPI/I2C EEPROM not found"
+   jmp   skip_main
+;
+; EEPROM write 1 Byte, select new slot if necessary
+;
+eep_write:
+   tst   yl            ;need new slot?
+   ifeq  eep_new_slot
+      lds   yl,prog_num
+      do       eep_find_slot
+         do    eep_write_wait ;previous write complete?
+            sbic  eecr,eewe
+         loop  eep_write_wait
+         out   eearl,yh       ;read slot to find prog#
+         out   eecr,one
+         in    b,eedr
+         cp    b,yl           ;overwrite same
+      exiteq   eep_find_slot
+         inc   b              ;new free slot
+         ifeq  eep_slot_allocate
+            out   eedr,yl        ;write prog#
+            in    b,sreg         ;atomic write sequence
+            cli
+            sbi   eecr,eemwe
+            sbi   eecr,eewe
+            out   sreg,b
+      exit     eep_find_slot
+         end   eep_slot_allocate
+         inc   yh             ;all slots done?
+         breq  eep_full
+      loop     eep_find_slot
+      ldi   yl,0
+   end   eep_new_slot
+   cpi   yl,0           ;new slot?
+   ifeq_or  eep_write_open
+   cpi   yl,128         ;new page_write?
+   ifeq     eep_write_open
+      push  a
+      ;open next eeprom page for write
+      .ifdef spi_eep_adr
+      ldi   b,spi_idle
+         do       eep_write_ready
+            out   spi_out,f   ;set slave select
+            ldi   a,5         ;command: read status
+            out_spi a
+            in_spi a          ;get status
+            out   spi_out,b   ;end slave select
+            andi  a,1         ;write in progress
+         loopne   eep_write_ready
+         out   spi_out,f   ;set slave select
+         ldi   a,6         ;command: write enable
+         out_spi a
+         out   spi_out,b   ;end slave select
+         out   spi_out,f   ;set slave select
+         ldi   a,2         ;command: write
+         out_spi a
+         out_spi yh        ;send write address
+         out_spi yl
+      .else
+         do       eep_write_ready
+            ldi   a,eep_adr
+            rcall i2c_start   ;may need timeout if dead EEPROM
+         loopcs   eep_write_ready
+         mov   a,yh        ;send write address
+         rcall i2c_write
+         mov   a,yl
+         rcall i2c_write
+      .endif
+      pop   a
+   end      eep_write_open
+   ;write data
+   .ifdef spi_eep_adr
+      out_spi a
+   .else
+      rcall i2c_write
+   .endif
+   cpi   yl,127      ;EEP write buffer filled?
+   ifeq_or eep_write_buf
+   cpi   yl,255      ;EEP write buffer filled?
+   ifeq    eep_write_buf
+      ;end of page - internal eep write
+      .ifdef spi_eep_adr
+         ldi   a,spi_idle  ;stop slave select
+         out   spi_out,a
+      .else
+         rcall i2c_stop    ;write buffer
+      .endif
+   end     eep_write_buf
+   adiw  y,1
+   breq  eep_full  
+   ret
+
+eep_full:               ;no more slots
+   PrintStr err_eep_full   ;" EEPROM full"
+;
+; EEP error during save
+;
+eep_write_err:          ;close after errors
+   .ifdef spi_eep_adr
+      ldi   a,spi_idle     ;stop slave select
+      out   spi_out,a
+   .else
+      rcall i2c_stop
+   .endif
+   ldi   yh,0           ;free all slots for this prog#
+   rcall eep_int_close
+   jmp   discard_serial_stream   ;skip remaining input, end of command
+;
+; EEP write close
+;
+eep_write_close:
+   .ifdef spi_eep_adr
+      ldi   a,spi_idle     ;close spi interface
+      out   spi_out,a
+   .else
+      rcall i2c_stop
+   .endif
+   tst   yl             ;slot already incremented?
+   ifne  eep_close_nxt_slot
+      inc   yh
+   end   eep_close_nxt_slot
+   tst   yh             ;was last slot?
+   ifne  eep_close_last_slot
+      rcall eep_int_close
+   end   eep_close_last_slot
+   sbrc  flags,deb_act     ;outside debugger
+      jmp   discard_serial_stream   ;skip remaining input, end of command
+
+;general close SPI/I2C EEPROM
+eep_close:
+   ;disconnect SPI/I2C, connect RAM
+   .ifdef spi_eep_adr
+      out   dbusddr,zero      ;dbus = output
+   .endif
+   .if (io_sel_direct > 0)
+      out   abushi,e
+   .endif
+   out   cbus,readmem      ;clear IO select & set read mode
+   out   eearl,zero        ;set to unused address
+   out   eearh,zero
+   sts   prog_num,allon    ;load/save ended
+   ;restore SPI parameters from last spi_cmd
+   .ifdef spi_eep_adr
+      lds   b,spi_cmd
+      out   spsr,zero
+      sbrc  b,4               ;test SPI2X
+         out   spsr,one          ;SPI2X is set
+      sbr   b,(1<<mstr)       ;always master
+      cbr   b,(1<<spie|1<<spe) ;no interrupt enable & no spi enable
+      out   spcr,b
+   .endif
+   ret
+
+;vacate unused slots for this prog#
+eep_int_close:
+   lds   yl,prog_num
+   do       eep_find_slot2
+      do    eep_write_wait2
+         sbic  eecr,eewe      ;previous write complete?
+      loop  eep_write_wait2
+      out   eearl,yh       ;read slot to find prog#
+      out   eecr,one
+      in    d,eedr
+      cp    d,yl           ;remaining slot for prog#
+      ifeq  eep_free_slot
+         out   eedr,allon     ;mark free
+         in    d,sreg         ;atomic write sequence
+         cli
+         sbi   eecr,eemwe
+         sbi   eecr,eewe
+         out   sreg,d
+      end   eep_free_slot
+      inc   yh             ;all slots done?
+   loopne   eep_find_slot2
+   do    eep_write_wait4
+      sbic  eecr,eewe      ;last internal write complete?
+   loop  eep_write_wait4
+   ret
+
+;
+; load program from SPI/I2C EEPROM
+;
+eep_load_prog:
+   PrintStr eep_prog       ;10,13,"Program "
+   lds   a,prog_num        ;prog#
+   rcall PrintHex
+   cbr   flags,(1<<emu_run) ;force emulator halted  
+   clr   xl                ;check prog exists
+   out   eearh,one
+   lds   a,prog_num
+   do       eep_scan_loop
+      out   eearl,xl       ;read slot pointer
+      out   eecr,one
+      in    d,eedr
+      cp    d,a            ;prog# match?
+   exiteq   eep_scan_loop
+      inc   xl             ;all slots done?
+      ifeq  eep_load_bad_prog
+         PrintStr eep_notfound   ;" not found"
+         ldi   a,1
+         rjmp  eep_close
+      end   eep_load_bad_prog
+   loop     eep_scan_loop
+   rcall eep_open
+   ldi   yl,0           ;start reading from 1st slot
+   ldi   yh,0
+   rcall eep_read
+   tst   a
+   ifeq  eep_file_incompat
+      PrintStr bad_format  ;" incompatible format"
+      ldi   a,1
+      rjmp  eep_close
+   end   eep_file_incompat
+   mov   xl,a
+   do       eep_load_loop
+      rcall eep_read       ;read address
+      mov   zh,a           ;big endian
+      rcall eep_read
+      mov   zl,a
+      .ifdef spi_eep_adr
+         out   dbusddr,allon
+      .endif
+      do       eep_load_byte
+         rcall eep_read
+         ;disconnect SPI/I2C, connect RAM
+         .if (io_sel_direct > 0)
+            out   abushi,e          ;disable IO select
+         .endif
+         out   cbus,clear        ;disable IO select
+         .ifdef spi_eep_adr
+            cbi   spcr,spe
+         .else
+            out   dbusddr,allon     ;dbus = output
+         .endif
+         out   abuslo,zl 
+         out   abushi,zh
+         out   cbus,writemem     ;WE, ~OE
+         out   dbusout,a         ;dbus write
+         adiw  z,1
+         out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+         ;connect SPI/I2C
+         .if (io_sel_direct > 0)
+            out   abushi,d          ;prepare IO select
+         .endif
+        .ifdef spi_eep_adr
+            out   spi_out,f         ;set slave select
+            sbi   spcr,spe
+         .else
+            out   dbusout,allon     ;float all outputs high
+            out   dbusddr,zero
+            out   dbusout,zero      ;open collector drive via ddr
+         .endif
+         out   cbus,c            ;activate IO select
+         dec   xl                ;record counter expired
+      loopne   eep_load_byte
+      rcall eep_read       ;read count
+      mov   xl,a
+      tst   xl
+   loopne   eep_load_loop
+   rcall eep_read          ;read PCH
+   tst   a                 ;is valid?
+   ifne  eep_load_pc
+      mov   pch,a             ;set PC
+      rcall eep_read
+      mov   pcl,a
+   end   eep_load_pc
+   PrintStr eep_loaded     ;" loaded"
+   .ifdef spi_eep_adr
+      ldi   a,spi_idle     ;close spi slave
+      out   spi_out,a
+   .else
+      sec                  ;nak & stop
+      rcall i2c_putack
+      rcall i2c_stop
+   .endif
+   ldi   a,0               ;post returncode OK
+   rjmp eep_close
+
+; EEPROM read 1 Byte, select new slot if necessary
+eep_read:
+   tst   yl                ;need to open next slot?
+   ifeq  eep_next_slot
+      tst   yh             ;1st slot?
+      ifne  eep_read_first
+         .ifdef spi_eep_adr
+            ldi   a,spi_idle     ;close spi slave
+            out   spi_out,a
+         .else
+            sec                  ;nak & stop
+            rcall i2c_putack
+            rcall i2c_stop
+         .endif
+      end   eep_read_first
+      lds   a,prog_num
+      do       eep_find_prog
+         out   eearl,yh       ;read slot to find prog#
+         out   eecr,one
+         in    b,eedr
+         cp    b,a            ;match?
+      exiteq   eep_find_prog
+         inc   yh             ;all slots done?
+         breq  eep_read_overrun
+      loop     eep_find_prog
+      .ifdef spi_eep_adr
+         out   spi_out,f      ;set slave select
+         ldi   a,3            ;command: read eep
+         out_spi a
+         out_spi yh
+         out_spi yl
+      .else
+         do       eep_read_ready
+            ldi   a,eep_adr
+            rcall i2c_start      ;may need timeout if dead EEPROM
+         loopcs   eep_read_ready
+         mov   a,yh
+         rcall i2c_write
+         mov   a,yl
+         rcall i2c_write
+         ldi   a,eep_adr+1    ;switch to read
+         rcall i2c_start
+      .endif
+      .ifndef spi_eep_adr
+   else  eep_next_slot
+         clc                  ;ack
+         rcall i2c_putack
+      .endif
+   end   eep_next_slot
+   ;read data byte
+   .ifdef spi_eep_adr
+      in_spi a
+   .else
+      rcall i2c_read
+   .endif
+   adiw  y,1         ;next
+   ret
+; overran the last slot, no ending count 0x00
+eep_read_overrun:
+   PrintStr err_corrupt    ;" corrupted"
+   pop   a                 ;remove return address
+   pop   a
+   ldi   a,1               ;post returncode fail
+   sbrc  flags,deb_act
+      rjmp  eep_close
+   rjmp  eep_app_read_exit
+
+;dma save program
+dma_eep_save:
+   lds   a,dma_last_cmd
+   lds   b,dma_tab_index
+   sts   dma_last_cmd,allon ;mark invalid sequence of command
+   cpi   a,0               ;previous set block address table?
+   ifne_or  eep_ds_inv
+   cpi   b,5               ;block address table valid?
+   ifne_or  eep_ds_inv
+   lds   a,dma_tab         ;program number valid?
+   cpi   a,0xff
+   ifeq     eep_ds_inv
+      rjmp  iw_exit           ;exit - invalid parameters
+   end      eep_ds_inv
+   sts   prog_num,a
+   in    b,spl             ;save sp - allows sub to exit
+   sts   sp_save,b
+   in    b,sph
+   sts   sp_save+1,b
+   rcall eep_open
+   PrintStr eep_prog       ;10,13,"Program "
+   lds   a,prog_num        ;prog#
+   rcall PrintHex
+   lds   zl,dma_tab+1      ;load memory address
+   lds   zh,dma_tab+2
+   lds   xl,dma_tab+3      ;load block count
+   lds   xh,dma_tab+4
+   ldi   yl,0              ;initial slot allocation
+   ldi   yh,0
+   out   eearh,one
+   ldi   a,0               ;set app save marker
+   rcall eep_write
+   mov   a,xl              ;calculate count from end address
+   sub   a,zl
+   rcall eep_write
+   mov   a,xh
+   sbc   a,zh
+   rcall eep_write
+   do       eep_app_save_data
+      cp    xl,zl
+      ifeq  eep_app_save_adr
+         cp    xh,zh
+   exiteq   eep_app_save_data
+      end   eep_app_save_adr
+      ;disconnect SPI/I2C, connect RAM
+      .if (io_sel_direct > 0)
+         out   abushi,e          ;disable IO sel. exp.
+      .endif
+      out   cbus,readmem      ;disable IO select
+      .ifdef spi_eep_adr
+         cbi   spcr,spe       ;disable SPI
+      .endif
+      out   abuslo,zl         ;read from RAM
+      out   abushi,zh
+            adiw  z,1            ;next address
+      wait_data_valid 1
+      in    a,dbusin
+      ;connect SPI/I2C
+      out   cbus,clear
+      .if (io_sel_direct > 0)
+         out   abushi,d          ;prepare IO select
+      .endif
+      .ifdef spi_eep_adr
+         out   spi_out,f         ;select slave
+         sbi   spcr,spe          ;enable SPI
+      .else
+         out   dbusout,allon     ;float all outputs high
+         out   dbusddr,allon     ;(discharge low cap)
+         out   dbusddr,zero
+         out   dbusout,zero      ;open collector drive via ddr
+      .endif
+      out   cbus,c            ;set IO select
+       ena_io_select
+      rcall eep_write         ;store in EEPROM
+   loop     eep_app_save_data
+   .ifndef spi_eep_adr
+      lds      zl,i2c_statreg    ;set ack
+      sbr      zl,0b1000000
+      sts      i2c_statreg,zl
+   .endif
+   rcall eep_write_close
+   PrintStr eep_saved      ;" saved"
+   rcall crlf
+   ldi   a,0x16            ;last successful command was read
+   sts   dma_last_cmd,a
+   rjmp  iw_exit
+
+;dma load program
+dma_eep_load:
+   lds   a,dma_last_cmd
+   lds   b,dma_tab_index
+   sts   dma_last_cmd,allon ;mark invalid sequence of command
+   cpi   a,0               ;previous set block address table?
+   ifne_or  eep_dl_inv
+   cpi   b,3               ;block address table valid?
+   ifne_or  eep_dl_inv
+   lds   a,dma_tab         ;program number valid?
+   cpi   a,0xff
+   ifeq     eep_dl_inv
+      rjmp  iw_exit           ;exit - invalid parameters
+   end      eep_dl_inv
+   sts   prog_num,a
+   PrintStr eep_prog       ;10,13,"Program "
+   lds   a,prog_num        ;prog#
+   rcall PrintHex
+   clr   c        ;check prog exists
+   out   eearh,one
+   lds   a,prog_num
+   do       eep_app_scan_loop
+      out   eearl,c        ;read slot pointer
+      out   eecr,one
+      in    d,eedr
+      cp    d,a            ;prog# match?
+   exiteq   eep_app_scan_loop
+      inc   c              ;all slots done?
+      ifeq  eep_app_load_bad_prog
+         PrintStr eep_notfound  ;" not found"
+         rjmp  eep_app_read_exit
+      end   eep_app_load_bad_prog
+   loop     eep_app_scan_loop
+   rcall eep_open
+   ldi   yl,0           ;start reading from 1st slot
+   ldi   yh,0
+   rcall eep_read
+   tst   a
+   ifne  eep_app_file_incompat
+      PrintStr bad_format  ;" incompatible format"
+      rjmp  eep_app_read_exit2
+   end   eep_app_file_incompat
+   lds   zl,dma_tab+1      ;load memory address
+   lds   zh,dma_tab+2
+   rcall eep_read             ;read count - set end address
+   mov   xl,a
+   rcall eep_read
+   mov   xh,a
+   add   xl,zl
+   sts   dma_tab+3,xl
+   adc   xh,zh
+   sts   dma_tab+4,xh
+   .ifdef spi_eep_adr
+      out   dbusddr,allon
+   .endif
+   do       eep_app_load_loop
+      cp    xl,zl
+      ifeq  eep_app_load_adr
+         cp    xh,zh
+   exiteq   eep_app_load_loop
+      end   eep_app_load_adr
+      rcall eep_read
+      ;disconnect SPI/I2C, connect RAM
+      .if (io_sel_direct > 0)
+         out   abushi,e          ;disable IO select
+      .endif
+      out   cbus,clear        ;disable IO select
+      .ifdef spi_eep_adr
+         cbi   spcr,spe          ;disable SPI
+      .else
+         out   dbusddr,allon     ;dbus = output
+      .endif
+      out   abuslo,zl         ;set write address 
+      out   abushi,zh
+      out   cbus,writemem     ;WE, ~OE
+      out   dbusout,a         ;dbus write
+      adiw  z,1               ;next address
+      out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+      ;connect SPI/I2C
+      .if (io_sel_direct > 0)
+         out   abushi,d          ;prepare IO select
+      .endif
+      .ifdef spi_eep_adr
+         out   spi_out,f         ;set slave select = EEP
+         sbi   spcr,spe          ;enable SPI
+      .else
+         out   dbusout,allon     ;float all outputs high
+         out   dbusddr,zero
+         out   dbusout,zero      ;open collector drive via ddr
+      .endif
+      out   cbus,c            ;set IO select
+   loop     eep_app_load_loop
+   PrintStr eep_loaded     ;" loaded"
+   ldi   a,0x17            ;last successful command was read
+   sts   dma_last_cmd,a
+   .ifndef spi_eep_adr
+      lds   a,i2c_statreg
+      sbr   a,0b1000000       ;set ack
+      sts   i2c_statreg,a
+   .endif
+eep_app_read_exit2:
+   .ifdef spi_eep_adr
+      ldi   a,spi_idle     ;close spi slave
+      out   spi_out,a
+   .else
+      sec                  ;nak & stop
+      rcall i2c_putack
+      rcall i2c_stop
+   .endif
+eep_app_read_exit:
+   rcall crlf
+   rcall eep_close
+   rjmp  iw_exit
+
+eep_info1:     .db   13,10,"EEPROM autoload ",0,0
+eep_info2:     .db   " - ",0
+eep_info3:     .db   " slots free",0
+eep_info4:     .db   13,10,"prog#/slots  ",0
+eep_none:      .db   "none",0,0
+eep_notfound:  .db   " not found",0,0
+eep_prog:      .db   13,10,"Program ",0,0
+eep_loaded:    .db   " loaded",0
+eep_saved:     .db   " saved",0,0
+err_eep_full:  .db   " EEPROM full",0,0
+   .ifdef spi_eep_adr
+err_no_eep:    .db   13,10,"SPI EEPROM not found",0,0
+   .else
+err_no_eep:    .db   13,10,"I2C EEPROM not found",0,0
+   .endif
+err_corrupt:   .db   " corrupted",0,0
+save_wait:     .db   13,10,"Saving, <ESC> to abort",13,10,0,0
+save_ok:       .db   13,"Save OK",0,0
+save_abort:    .db   " Save aborted",0
+bad_format:    .db   " incompatible format",0,0
+
+.else
+   .equ  dma_eep_load   = dma_cmd_inv
+   .equ  dma_eep_save   = dma_cmd_inv
+.endif
+
diff --git a/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_Emu_NMOS.inc b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_Emu_NMOS.inc
new file mode 100644
index 00000000..e1009bde
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_Emu_NMOS.inc
@@ -0,0 +1,1928 @@
+;
+; 6502 EMULATOR include
+;
+;     N M O S   c o r e
+;
+; Copyright (C) 2013-2014  Klaus Dormann
+;
+; This program is free software: you can redistribute it and/or modify
+; it under the terms of the GNU General Public License as published by
+; the Free Software Foundation, either version 3 of the License, or
+; (at your option) any later version.
+;
+; This program is distributed in the hope that it will be useful,
+; but WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+; GNU General Public License for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with this program.  If not, see <http://www.gnu.org/licenses/>.
+;
+;
+.set  core_version = 831
+#define core_string "N6502" ;identify NMOS core in version message
+
+;*****************************************************************
+;
+; 6502 emulation disassembly table
+;
+;*****************************************************************
+;addressing modes
+.equ  op_nv    = 0b0000111 ;invalid
+.equ  op_s     = 0b0000000 ;single (implied) - TAX
+.equ  op_a     = 0b0010000 ;absolute - LDA abs
+.equ  op_x     = 0b0010001 ;absolute indexed X - LDA abs,x
+.equ  op_y     = 0b0010010 ;absolute indexed Y - LDA abs,y
+.equ  op_i     = 0b1010011 ;absolute indirect - JMP (abs)
+.equ  op_m     = 0b0101000 ;immediate - LDA #
+.equ  op_r     = 0b0011000 ;relative to PC - BEQ rel
+.equ  op_z     = 0b0001000 ;zero page - LDA zp
+.equ  op_zxi   = 0b1001100 ;zero page indexed X indirect LDA (zp,x)
+.equ  op_zx    = 0b0001001 ;zero page indexed X - LDA zp,x
+.equ  op_zy    = 0b0001010 ;zero page indexed Y - LDA zp,y
+.equ  op_ziy   = 0b1001101 ;zero page indidrect indexed Y - LDA (zp),y
+.equ  op_sa    = 0b0000110 ;single accumulator - ASL A
+;                0b00_____  no prefix
+;                0b01_____  # - immediate
+;                0b10_____  ( - opening indirect
+;                0b__00___  no data - implied
+;                0b__01___  1 Byte - zero page or immediate
+;                0b__10___  2 Bytes - absolute
+;                0b__11___  1 Byte relative - calculated absolute
+;                0b____000  no suffix
+;                0b____001  ,X - indexed X
+;                0b____010  ,Y - indexed Y
+;                0b____011  ) - closing indirect
+;                0b____100  ,X) - indexed X indirect
+;                0b____101  ),Y - indirect indexed Y
+;                0b____110  A - implied accumulator
+;                0b____111  Invalid Instruction
+
+dis_opcode: .db   "BRK",op_s
+            .db   "ORA",op_zxi
+            .db   "?02",op_nv
+            .db   "?03",op_nv
+            .db   "?04",op_nv
+            .db   "ORA",op_z
+            .db   "ASL",op_z
+            .db   "?07",op_nv
+            .db   "PHP",op_s
+            .db   "ORA",op_m
+            .db   "ASL",op_sa
+            .db   "?0B",op_nv
+            .db   "?0C",op_nv
+            .db   "ORA",op_a
+            .db   "ASL",op_a
+            .db   "?0F",op_nv
+
+            .db   "BPL",op_r
+            .db   "ORA",op_ziy
+            .db   "?12",op_nv
+            .db   "?13",op_nv
+            .db   "?14",op_nv
+            .db   "ORA",op_zx
+            .db   "ASL",op_zx
+            .db   "?17",op_nv
+            .db   "CLC",op_s
+            .db   "ORA",op_y
+            .db   "?1A",op_nv
+            .db   "?1B",op_nv
+            .db   "?1C",op_nv
+            .db   "ORA",op_x
+            .db   "ASL",op_x
+            .db   "?1F",op_nv
+
+            .db   "JSR",op_a
+            .db   "AND",op_zxi
+            .db   "?22",op_nv
+            .db   "?23",op_nv
+            .db   "BIT",op_z
+            .db   "AND",op_z
+            .db   "ROL",op_z
+            .db   "?27",op_nv
+            .db   "PLP",op_s
+            .db   "AND",op_m
+            .db   "ROL",op_sa
+            .db   "?2B",op_nv
+            .db   "BIT",op_a
+            .db   "AND",op_a
+            .db   "ROL",op_a
+            .db   "?2F",op_nv
+
+            .db   "BMI",op_r
+            .db   "AND",op_ziy
+            .db   "?32",op_nv
+            .db   "?33",op_nv
+            .db   "?34",op_nv
+            .db   "AND",op_zx
+            .db   "ROL",op_zx
+            .db   "?37",op_nv
+            .db   "SEC",op_s
+            .db   "AND",op_y
+            .db   "?3A",op_nv
+            .db   "?3B",op_nv
+            .db   "?3C",op_nv
+            .db   "AND",op_x
+            .db   "ROL",op_x
+            .db   "?3F",op_nv
+
+            .db   "RTI",op_s
+            .db   "EOR",op_zxi
+            .db   "?42",op_nv
+            .db   "?43",op_nv
+            .db   "?44",op_nv
+            .db   "EOR",op_z
+            .db   "LSR",op_z
+            .db   "?47",op_nv
+            .db   "PHA",op_s
+            .db   "EOR",op_m
+            .db   "LSR",op_sa
+            .db   "?4B",op_nv
+            .db   "JMP",op_a
+            .db   "EOR",op_a
+            .db   "LSR",op_a
+            .db   "?4F",op_nv
+
+            .db   "BVC",op_r
+            .db   "EOR",op_ziy
+            .db   "?52",op_nv
+            .db   "?53",op_nv
+            .db   "?54",op_nv
+            .db   "EOR",op_zx
+            .db   "LSR",op_zx
+            .db   "?57",op_nv
+            .db   "CLI",op_s
+            .db   "EOR",op_y
+            .db   "?5A",op_nv
+            .db   "?5B",op_nv
+            .db   "?5C",op_nv
+            .db   "EOR",op_x
+            .db   "LSR",op_x
+            .db   "?5F",op_nv
+
+            .db   "RTS",op_s
+            .db   "ADC",op_zxi
+            .db   "?62",op_nv
+            .db   "?63",op_nv
+            .db   "?64",op_nv
+            .db   "ADC",op_z
+            .db   "ROR",op_z
+            .db   "?67",op_nv
+            .db   "PLA",op_s
+            .db   "ADC",op_m
+            .db   "ROR",op_sa
+            .db   "?6B",op_nv
+            .db   "JMP",op_i
+            .db   "ADC",op_a
+            .db   "ROR",op_a
+            .db   "?6F",op_nv
+
+            .db   "BVS",op_r
+            .db   "ADC",op_ziy
+            .db   "?72",op_nv
+            .db   "?73",op_nv
+            .db   "?74",op_nv
+            .db   "ADC",op_zx
+            .db   "ROR",op_zx
+            .db   "?77",op_nv
+            .db   "SEI",op_s
+            .db   "ADC",op_y
+            .db   "?7A",op_nv
+            .db   "?7B",op_nv
+            .db   "?7C",op_nv
+            .db   "ADC",op_x
+            .db   "ROR",op_x
+            .db   "?7F",op_nv
+
+            .db   "?80",op_nv
+            .db   "STA",op_zxi
+            .db   "?82",op_nv
+            .db   "?83",op_nv
+            .db   "STY",op_z
+            .db   "STA",op_z
+            .db   "STX",op_z
+            .db   "?87",op_nv
+            .db   "DEY",op_s
+            .db   "?89",op_nv
+            .db   "TXA",op_s
+            .db   "?8B",op_nv
+            .db   "STY",op_a
+            .db   "STA",op_a
+            .db   "STX",op_a
+            .db   "?8F",op_nv
+
+            .db   "BCC",op_r
+            .db   "STA",op_ziy
+            .db   "?92",op_nv
+            .db   "?93",op_nv
+            .db   "STY",op_zx
+            .db   "STA",op_zx
+            .db   "STX",op_zy
+            .db   "?97",op_nv
+            .db   "TYA",op_s
+            .db   "STA",op_y
+            .db   "TXS",op_s
+            .db   "?9B",op_nv
+            .db   "?9C",op_nv
+            .db   "STA",op_x
+            .db   "?9E",op_nv
+            .db   "?9F",op_nv
+
+            .db   "LDY",op_m
+            .db   "LDA",op_zxi
+            .db   "LDX",op_m
+            .db   "?A3",op_nv
+            .db   "LDY",op_z
+            .db   "LDA",op_z
+            .db   "LDX",op_z
+            .db   "?A7",op_nv
+            .db   "TAY",op_s
+            .db   "LDA",op_m
+            .db   "TAX",op_s
+            .db   "?AB",op_nv
+            .db   "LDY",op_a
+            .db   "LDA",op_a
+            .db   "LDX",op_a
+            .db   "?AF",op_nv
+
+            .db   "BCS",op_r
+            .db   "LDA",op_ziy
+            .db   "?B2",op_nv
+            .db   "?B3",op_nv
+            .db   "LDY",op_zx
+            .db   "LDA",op_zx
+            .db   "LDX",op_zy
+            .db   "?B7",op_nv
+            .db   "CLV",op_s
+            .db   "LDA",op_y
+            .db   "TSX",op_s
+            .db   "?BB",op_nv
+            .db   "LDY",op_x
+            .db   "LDA",op_x
+            .db   "LDX",op_y
+            .db   "?BF",op_nv
+
+            .db   "CPY",op_m
+            .db   "CMP",op_zxi
+            .db   "?C2",op_nv
+            .db   "?C3",op_nv
+            .db   "CPY",op_z
+            .db   "CMP",op_z
+            .db   "DEC",op_z
+            .db   "?C7",op_nv
+            .db   "INY",op_s
+            .db   "CMP",op_m
+            .db   "DEX",op_s
+            .db   "?CB",op_nv
+            .db   "CPY",op_a
+            .db   "CMP",op_a
+            .db   "DEC",op_a
+            .db   "?CF",op_nv
+
+            .db   "BNE",op_r
+            .db   "CMP",op_ziy
+            .db   "?D2",op_nv
+            .db   "?D3",op_nv
+            .db   "?D4",op_nv
+            .db   "CMP",op_zx
+            .db   "DEC",op_zx
+            .db   "?D7",op_nv
+            .db   "CLD",op_s
+            .db   "CMP",op_y
+            .db   "?DA",op_nv
+            .db   "?DB",op_nv
+            .db   "?DC",op_nv
+            .db   "CMP",op_x
+            .db   "DEC",op_x
+            .db   "?DF",op_nv
+
+            .db   "CPX",op_m
+            .db   "SBC",op_zxi
+            .db   "?E2",op_nv
+            .db   "?E3",op_nv
+            .db   "CPX",op_z
+            .db   "SBC",op_z
+            .db   "INC",op_z
+            .db   "?E7",op_nv
+            .db   "INX",op_s
+            .db   "SBC",op_m
+            .db   "NOP",op_s
+            .db   "?EB",op_nv
+            .db   "CPX",op_a
+            .db   "SBC",op_a
+            .db   "INC",op_a
+            .db   "?EF",op_nv
+
+            .db   "BEQ",op_r
+            .db   "SBC",op_ziy
+            .db   "?F2",op_nv
+            .db   "?F3",op_nv
+            .db   "?F4",op_nv
+            .db   "SBC",op_zx
+            .db   "INC",op_zx
+            .db   "?F7",op_nv
+            .db   "SED",op_s
+            .db   "SBC",op_y
+            .db   "?FA",op_nv
+            .db   "?FB",op_nv
+            .db   "?FC",op_nv
+            .db   "SBC",op_x
+            .db   "INC",op_x
+            .db   "?FF",op_nv
+
+;*****************************************************************
+;
+; 6 5 0 2   e m u l a t i o n   m a c r o s
+;
+;*****************************************************************
+
+;
+; op_decode
+;
+; opcode fetch and decode, prefetch low operand
+.macro      op_decode
+            out   abuslo,pcl        ;opcode fetch
+            out   abushi,pch
+            sei                     ;allow emulation INT, NMI
+            adiw  pch:pcl,1         ;pc -> op low
+            cli
+            wait_data_valid 4       ;240 minimum @ 16MHz
+            in    opcode,dbusin
+
+            out   abuslo,pcl        ;operand address low prefetch
+            out   abushi,pch
+            wait_data_valid 6       ;360ns minimum @ 16MHz 
+                  adiw  pch:pcl,1         ;pc -> op high
+                  ijmp                    ;execute opcode
+.endmacro
+
+;op decode after single, opcode already fetched
+.macro      op_decode_single
+            sei                     ;allow emulation INT, NMI
+            out   abuslo,pcl        ;operand address low prefetch
+            cli
+            out   abushi,pch
+            wait_data_valid 6       ;360ns minimum @ 16MHz 
+                  adiw  pch:pcl,1         ;pc -> op high
+                  ijmp                    ;execute opcode
+.endmacro
+
+; address generate relative
+.macro      adgen_r
+            rjmp  no_branch         ;condition false
+            in    operand,dbusin
+            clr   a                 ;expand sign bit
+            sbrc  operand,7         ;negative?
+            dec   a
+            add   pcl,operand       ;set new PC
+            adc   pch,a
+no_branch:  op_decode
+.endmacro
+
+; address generate absolute
+.macro      adgen_a
+            in    oplow,dbusin     
+            out   abuslo,pcl        ;operand high address fetch
+            out   abushi,pch
+                  adiw  pch:pcl,1         ;pc -> next instruction
+                  cbr   flags,(1<<op_ind) ;operand address is direct
+            wait_data_valid 3       ;180ns minimum @ 16MHz
+            in    ophigh,dbusin
+.endmacro
+
+; address generate abs,X
+.macro      adgen_x     ;@0 = op_label xxx_
+            .equ  @0x = pc
+            in    oplow,dbusin     
+            out   abuslo,pcl        ;operand high address fetch
+            out   abushi,pch
+                  adiw  pch:pcl,1         ;pc -> next instruction
+                  cbr   flags,(1<<op_ind) ;operand address is direct
+                  add   oplow,regx
+            wait_data_valid 4       ;240ns minimum @ 16MHz
+            in    ophigh,dbusin
+            adc   ophigh,zero
+            rjmp  @0o               ;fetch operand
+.endmacro
+
+; address generate abs,Y
+.macro      adgen_y     ;@0 = op_label xxx_
+            .equ  @0y = pc
+            in    oplow,dbusin     
+            out   abuslo,pcl        ;operand high address fetch
+            out   abushi,pch
+                  adiw  pch:pcl,1         ;pc -> next instruction
+                  cbr   flags,(1<<op_ind) ;operand address is direct
+                  add   oplow,regy
+            wait_data_valid 4       ;240ns minimum @ 16MHz
+            in    ophigh,dbusin
+            adc   ophigh,zero
+            rjmp  @0o               ;fetch operand
+.endmacro
+
+;address generate (ZP,X) indexed indirect
+.macro      adgen_zxi     ;@0 = op_label xxx_
+            .equ  @0zxi = pc
+            in    oplow,dbusin
+            add   oplow,regx
+            out   abuslo,oplow      ;indirect low address fetch
+            out   abushi,zero
+                  inc   oplow
+                  sbr   flags,(1<<op_ind)  ;operand address is indirect
+;                  brne  pc+2
+;                  rjmp  zp_wrap           ;exceeded end of zeropage
+            wait_data_valid 2       ;120ns minimum @ 16MHz
+            in    a,dbusin
+            out   abuslo,oplow      ;indirect high address fetch
+                  mov   oplow,a
+            wait_data_valid 1       ;60ns minimum @ 16MHz
+            in    ophigh,dbusin
+            rjmp  @0o
+.endmacro
+
+;address generate (ZP),Y indirect indexed
+.macro      adgen_ziy     ;@0 = op_label xxx_
+            .equ  @0ziy = pc
+            in    oplow,dbusin
+            out   abuslo,oplow      ;indirect low address fetch
+            out   abushi,zero
+                  inc   oplow
+                  sbr   flags,(1<<op_ind)  ;operand address is indirect
+;                  brne  pc+2
+;                  rjmp  zp_wrap           ;exceeded end of zeropage
+            wait_data_valid 2       ;120ns minimum @ 16MHz
+            in    a,dbusin
+            out   abuslo,oplow      ;indirect high address fetch
+                  mov   oplow,a
+                  add   oplow,regy
+            wait_data_valid 2       ;120ns minimum @ 16MHz
+            in    ophigh,dbusin
+            adc   ophigh,zero
+            rjmp  @0o
+.endmacro
+
+;address generate ZP,X and operand fetch 
+.macro      adgen_zx     ;@0 = op_label xxx_
+            .equ  @0zx = pc
+            in    oplow,dbusin
+            add   oplow,regx
+            out   abuslo,oplow      ;operand fetch
+            out   abushi,zero
+            wait_data_valid 3       ;180ns minimum @ 16MHz
+               clr   ophigh
+               rjmp  @0m
+.endmacro
+
+;address generate ZP,Y and operand fetch 
+.macro      adgen_zy     ;@0 = op_label xxx_
+            .equ  @0zy = pc
+            in    oplow,dbusin
+            add   oplow,regy
+            out   abuslo,oplow      ;operand fetch
+            out   abushi,zero
+            wait_data_valid 3       ;180ns minimum @ 16MHz
+               clr   ophigh
+               rjmp  @0m
+.endmacro
+
+;address generate ZP absolute and operand fetch 
+.macro      adgen_z     ;@0 = op_label xxx_
+            .equ  @0z = pc
+            in    oplow,dbusin
+            out   abuslo,oplow      ;operand fetch
+            out   abushi,zero
+            wait_data_valid 3       ;180ns minimum @ 16MHz
+               clr   ophigh
+               rjmp  @0m
+.endmacro
+
+; operand fetch from memory 
+.macro      op_fetch
+            out   abuslo,oplow      ;operand fetch
+            out   abushi,ophigh
+         .ifdef iomap
+            wait_data_valid 3       ;180ns minimum @ 16MHz
+                  cpi   ophigh,iomap      ;internal io?
+                  brne  skip_IO
+            rcall ioread            ;ioread returns data in operand
+            rjmp  pc+2              ;skip reading from dbus   
+         .else
+            wait_data_valid 0       ;0ns minimum @ 16MHz
+         .endif
+skip_IO:
+.endmacro
+
+; operand fetch from memory for modify op (extended memory address lock)
+.macro      op_fetch_modify
+            out   abuslo,oplow      ;operand fetch
+            out   abushi,ophigh
+         .ifdef iomap
+            wait_data_valid 3       ;180ns minimum @ 16MHz
+                  cpi   ophigh,iomap      ;internal io?
+                  brne  skip_IO
+            rcall iomodify          ;ioread returns data in operand
+            rjmp  pc+2              ;skip reading from dbus   
+         .else
+            wait_data_valid 0       ;0ns minimum @ 16MHz
+         .endif
+skip_IO:
+.endmacro
+
+; register fetch from memory 
+.macro      reg_fetch ;@0 = register
+            out   abuslo,oplow      ;register fetch
+            out   abushi,ophigh
+         .ifdef iomap
+            wait_data_valid 3       ;180ns minimum @ 16MHz
+                  cpi   ophigh,iomap      ;internal io?
+                  brne  skip_IO
+            rcall ioread            ;ioread returns data in operand
+            mov   @0,operand  
+            rjmp  pc+2              ;skip reading from dbus   
+         .else
+            wait_data_valid 0       ;0ns minimum @ 16MHz
+         .endif
+skip_IO:
+.endmacro
+
+;flag generating macro
+.macro      flags_gen_nz            ;@0 = register
+            out   sreg,stat         ;keep C
+            tst   @0                ;generate NZ
+            in    stat,sreg         ;save NZ, keep C
+.endmacro
+
+;IRQ enable/disable
+.macro      IRQ_restore             ;sets IRQ according to I-flag
+            .ifdef irq_dis_real     ;+7 if enabled, +5 if disabled
+               sbrs  stat2,2        ;IRQ disabled?
+               rjmp  IRQ_rest_ena 
+                  ldi   a,IRQ_dis
+                  out   ibus,a
+                  out   timsk,one         ;only TOV0 (single step) stays enabled
+                  ldi   a,0b11000         ;no USART interrupts, only RX & TX enable
+               rjmp  IRQ_rest_exit
+IRQ_rest_ena: 
+                  ldi   a,IRQ_ena         ;enable IRQ
+                  out   ibus,a
+                  lds   a,timer_ena       ;enable timers interrupts
+                  out   timsk,a
+                  lds   a,usart_ena       ;enable usart interrupts
+IRQ_rest_exit:
+               out   ucsrb,a
+            .else
+               ldi   a,IRQ_ena
+               sbrc  stat2,2           ;disable if I-flag set
+               ldi   a,IRQ_dis
+               out   ibus,a
+            .endif
+.endmacro
+
+; store modified operand to memory
+.macro      store_modify            ;write to previous read address
+         .ifdef iomap               ;test internal I/O
+            cpi   ophigh,iomap
+            breq  do_io
+         .endif
+         .ifdef rommap              ;test write-protect
+            cpi   ophigh,rommap
+            brsh  skip_store
+         .endif   
+            out   cbus,writemem     ;WE, ~OE
+            out   dbusout,operand   ;precharge write
+            out   dbusddr,allon     ;output data valid
+            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+            out   dbusddr,zero      ;data hold ends after 60ns
+            out   cbus,readmem      ;OE / read mode back on
+skip_store:
+            op_decode               ;next instruction
+
+         .ifdef iomap
+do_io:      rjmp  iowrite
+         .endif
+.endmacro
+
+;address generate store ZP,X
+.macro      adgen_s_zx     ;@0 = op_label xxx_
+            .equ  @0zx = pc
+            in    oplow,dbusin
+            add   oplow,regx
+            out   abuslo,oplow      ;operand fetch
+            out   abushi,zero
+            rjmp  @0m
+.endmacro
+
+;address generate store ZP,Y
+.macro      adgen_s_zy     ;@0 = op_label xxx_
+            .equ  @0zy = pc
+            in    oplow,dbusin
+            add   oplow,regy
+            out   abuslo,oplow      ;operand fetch
+            out   abushi,zero
+            rjmp  @0m
+.endmacro
+
+;address generate store ZP absolute
+.macro      adgen_s_z     ;@0 = op_label xxx_
+            .equ  @0z = pc
+            in    oplow,dbusin
+            out   abuslo,oplow
+            out   abushi,zero
+            rjmp  @0m
+.endmacro
+
+; store register
+.macro      store_reg  ;@0 = register, @1 = zp_entry STx_m
+            out   abuslo,oplow 
+            out   abushi,ophigh
+         .ifdef iomap               ;test internal I/O
+            cpi   ophigh,iomap
+            breq  do_io
+         .endif    
+         .ifdef rommap              ;test write-protect
+            cpi   ophigh,rommap
+            brsh  skip_store
+         .endif   
+            .equ  @1 = pc
+            out   cbus,writemem     ;WE, ~OE
+            out   dbusout,@0        ;precharge write
+            out   dbusddr,allon     ;output data valid
+            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+            out   dbusddr,zero      ;data hold ends after 60ns
+            out   cbus,readmem      ;OE / read mode back on
+skip_store:
+            op_decode               ;next instruction
+
+         .ifdef iomap
+do_io:      mov   operand,@0
+            rjmp  iowrite
+         .endif
+.endmacro
+
+;*****************************************************************
+;
+; 6 5 0 2   e m u l a t i o n
+;
+;*****************************************************************
+;
+; ***** IRQ pin low interrupt *****
+;
+IRQ:
+         .if defined(spi_sel) || defined(i2c_sel)
+            sbrs  flags,dma_rpt     ;NMI during dma transfer?
+            ifs   IRQ_dma
+               cbr   flags,(1<<dma_rpt)
+               sts   dma_tab+1,zl      ;save current dma memory address
+               sts   dma_tab+2,zh
+               sts   dma_tab+5,xl      ;save dma count in progress
+               sts   dma_tab+6,xh
+               cbr   flags,(1<<modify) ;unlock extended memory address after modify
+               out   dbusddr,zero      ;switch back to read mode
+               out   cbus,readmem      ;OE to RAM
+               ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+               sbiw  pch:pcl,2         ;prepare for instruction retry
+               sbrs  flags,op_ind      ;3 byte instruction if direct
+            end   IRQ_dma
+         .endif
+            sbiw  pch:pcl,1         ;adjust PC (discard prefetch)
+            out   abuslo,allon      ;new PC high fetch from irq vector
+            out   abushi,allon
+                  ldi   zl,0xfe     ;preload vector low  
+                  ldi   a,IRQ_dis
+                  out   ibus,a
+                   .ifdef irq_dis_real     ;+3
+                     out   timsk,one         ;only TOV0 (single step) stays enabled
+                     ldi   a,0b11000         ;no USART interrupts, only RX & TX enable
+                     out   ucsrb,a
+                  .endif
+                 ;status merge while we are waiting for data
+                  mov   a,stat            ;merge status in 6502 format
+                  andi  a,0b11            ;------ZC
+            wait_data_valid 5       ;300ns minimum @ 16MHz
+            in    ophigh,dbusin
+            out   abuslo,zl         ;new PC low fetch from irq vector
+                  ;status merge while we are waiting for data
+                  bst   stat,2            ;<----<
+                  bld   a,7               ;N-------
+                  or    a,stat2           ;-V1BDI--
+                  sbr   stat2,0b100       ;I=1 (IRQ disabled)
+            wait_data_valid 4       ;240ns minimum @ 16MHz
+            in    oplow,dbusin
+            
+            out   abuslo,spointer   ;push pch
+            out   abushi,one
+            dec   spointer
+            out   cbus,writemem     ;WE, ~OE
+            out   dbusout,pch       ;precharge write
+            out   dbusddr,allon     ;output data valid
+            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+
+            out   abuslo,spointer   ;push pcl
+            dec   spointer
+            out   cbus,writemem     ;WE
+            out   dbusout,pcl       ;write
+            out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+
+            out   abuslo,spointer   ;push status
+            dec   spointer
+            out   cbus,writemem     ;WE
+            out   dbusout,a         ;write
+            out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+            out   dbusddr,zero      ;data hold ends after 60ns
+            out   cbus,readmem      ;OE / read mode back on
+
+            movw  pcl,oplow         ;load new PC
+
+            ldi   a,low(ramend)     ;discard AVR return address
+            out   spl,a
+
+            op_decode               ;next instruction
+
+;
+; ***** NMI pin high to low edge interrupt *****
+;
+NMI:
+         .if defined(spi_sel) || defined(i2c_sel)
+            sbrs  flags,dma_rpt     ;NMI during dma transfer?
+            ifs   NMI_dma
+               cbr   flags,(1<<dma_rpt)
+               sts   dma_tab+1,zl      ;save current dma memory address
+               sts   dma_tab+2,zh
+               sts   dma_tab+5,xl      ;save dma count in progress
+               sts   dma_tab+6,xh
+               cbr   flags,(1<<modify) ;unlock extended memory address after modify
+               out   dbusddr,zero      ;switch back to read mode
+               out   cbus,readmem      ;OE to RAM
+               ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+               sbiw  pch:pcl,2         ;prepare for instruction retry
+               sbrs  flags,op_ind      ;3 byte instruction if direct
+            end   NMI_dma
+         .endif
+            sbiw  pch:pcl,1         ;adjust PC (discard prefetch)
+            ldi   zl,0xfb           ;vector high first
+            out   abuslo,zl         ;new PC high fetch from irq vector
+            out   abushi,allon
+                  ldi   zl,0xfa     ;preload vector low  
+                  ldi   a,IRQ_dis
+                  out   ibus,a
+                   .ifdef irq_dis_real     ;+3
+                     out   timsk,one         ;only TOV0 (single step) stays enabled
+                     ldi   a,0b11000         ;no USART interrupts, only RX & TX enable
+                     out   ucsrb,a
+                  .endif
+                 ;status merge while we are waiting for data
+                  mov   a,stat            ;merge status in 6502 format
+                  andi  a,0b11            ;------ZC
+            wait_data_valid 5       ;300ns minimum @ 16MHz
+            in    ophigh,dbusin
+            out   abuslo,zl         ;new PC low fetch from irq vector
+                  ;status merge while we are waiting for data
+                  bst   stat,2            ;<----<
+                  bld   a,7               ;N-------
+                  or    a,stat2           ;-V1BDI--
+                  sbr   stat2,0b100       ;I=1 (IRQ disabled)
+            wait_data_valid 4       ;240ns minimum @ 16MHz
+            in    oplow,dbusin
+            
+            out   abuslo,spointer   ;push pch
+            out   abushi,one
+            dec   spointer
+            out   cbus,writemem     ;WE, ~OE
+            out   dbusout,pch       ;precharge write
+            out   dbusddr,allon     ;output data valid
+            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+
+            out   abuslo,spointer   ;push pcl
+            dec   spointer
+            out   cbus,writemem     ;WE
+            out   dbusout,pcl       ;write
+            out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+
+            out   abuslo,spointer   ;push status
+            dec   spointer
+            out   cbus,writemem     ;WE
+            out   dbusout,a         ;write
+            out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+            out   dbusddr,zero      ;data hold ends after 60ns
+            out   cbus,readmem      ;OE / read mode back on
+
+            movw  pcl,oplow         ;load new PC
+
+            ldi   a,low(ramend)     ;discard AVR return address
+            out   spl,a
+
+            op_decode               ;next instruction
+
+;
+; opcode template
+;
+; operand adressing modes:
+; a    absolute - LDA abs                     
+; x    absolute indexed X - LDA abs,x
+; y    absolute indexed Y - LDA abs,y
+; i    absolute indirect - JMP (abs)
+; s    single (implied) - TAX
+; m    immediate - LDA #
+; r    relative to PC - BEQ rel
+; z    zero page - LDA zp
+; zxi  zero page indexed X indirect - LDA (zp,x)
+; zx   zero page indexed X - LDA zp,x
+; zy   zero page indexed Y - LDA zp,y
+; ziy  zero page indirect indexed Y - LDA (zp),y
+;
+; adressing mode is added as suffix to the original opcode
+; examples: LDA_ziy, BEQ_r, TAX_s, JMP_a
+
+;*****************************************************************
+;
+; Implied adressing instructions
+;     Register, Stack
+;
+;*****************************************************************
+
+; opcode:         ASL A
+ASL_s:      in    opcode,dbusin     ;next opcode
+
+            lsl   rega              ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+
+            op_decode_single        ;next instruction
+
+; opcode:         CLC
+CLC_s:      in    opcode,dbusin     ;next opcode
+
+            cbr   stat,1            ;AVR emulated OP
+
+            op_decode_single        ;next instruction
+
+; opcode:         CLD
+CLD_s:      in    opcode,dbusin     ;next opcode
+
+            cbr   stat2,0b1000      ;AVR emulated OP
+
+            op_decode_single        ;next instruction
+
+; opcode:         CLI
+CLI_s:      in    opcode,dbusin     ;next opcode
+
+            cbr   stat2,0b100
+            ldi   a,IRQ_ena
+            out   ibus,a
+            .ifdef irq_dis_real     ;+6
+               lds   a,timer_ena       ;enable timers interrupts
+               out   timsk,a
+               lds   a,usart_ena       ;enable usart interrupts
+               out   ucsrb,a
+            .endif
+
+            op_decode_single        ;next instruction
+
+; opcode:         CLV
+CLV_s:      in    opcode,dbusin     ;next opcode
+
+            cbr   stat2,0b1000000   ;AVR emulated OP
+
+            op_decode_single        ;next instruction
+
+; opcode:         DEX
+DEX_s:      in    opcode,dbusin     ;next opcode
+
+            out   sreg,stat         ;keep C
+            dec   regx              ;AVR emulated OP
+            in    stat,sreg         ;save NZ, keep C
+
+            op_decode_single        ;next instruction
+
+; opcode:         DEX
+DEY_s:      in    opcode,dbusin     ;next opcode
+
+            out   sreg,stat         ;keep C
+            dec   regy              ;AVR emulated OP
+            in    stat,sreg         ;save NZ, keep C
+
+            op_decode_single        ;next instruction
+
+; opcode:         INX
+INX_s:      in    opcode,dbusin     ;next opcode
+
+            out   sreg,stat         ;keep C
+            inc   regx              ;AVR emulated OP
+            in    stat,sreg         ;save NZ, keep C
+
+            op_decode_single        ;next instruction
+
+; opcode:         INY
+INY_s:      in    opcode,dbusin     ;next opcode
+
+            out   sreg,stat         ;keep C
+            inc   regy              ;AVR emulated OP
+            in    stat,sreg         ;save NZ, keep C
+
+            op_decode_single        ;next instruction
+
+; opcode:         LSR A
+LSR_s:      in    opcode,dbusin     ;next opcode
+
+            lsr   rega              ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+
+            op_decode_single        ;next instruction
+
+; opcode:         NOP
+NOP_s:      in    opcode,dbusin     ;next opcode
+
+            wait_ns  1000,11        ;2 6502 cycles
+
+            op_decode_single        ;next instruction
+
+; opcode:         PHA
+PHA_s:      in    opcode,dbusin     ;next opcode
+
+            out   abuslo,spointer   ;load address from SP
+            out   abushi,one
+            dec   spointer
+            out   cbus,writemem     ;WE, ~OE
+            out   dbusout,rega      ;precharge write
+            out   dbusddr,allon     ;output data valid
+            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+            out   dbusddr,zero      ;data hold ends after 60ns
+            out   cbus,readmem      ;OE / read mode back on
+
+            op_decode_single        ;next instruction
+
+; opcode:         PHP
+PHP_s:      in    opcode,dbusin     ;next opcode
+
+            mov   a,stat            ;merge status in 6502 format
+            andi  a,0b11            ;------ZC
+            bst   stat,2            ;<----<
+            bld   a,7               ;N-------
+            or    a,stat2           ;-V1BDI--
+            ori   a,0b110000        ;  ^^=1 (pushed by software)
+
+            out   abuslo,spointer   ;load address from SP
+            out   abushi,one
+            dec   spointer
+            out   cbus,writemem     ;WE, ~OE
+            out   dbusout,a         ;precharge write
+            out   dbusddr,allon     ;output data valid
+            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+            out   dbusddr,zero      ;data hold ends after 60ns
+            out   cbus,readmem      ;OE / read mode back on
+
+            op_decode_single        ;next instruction
+
+; opcode:         PLA
+PLA_s:      in    opcode,dbusin     ;next opcode
+
+            inc   spointer          
+            out   abuslo,spointer   ;load address from SP
+            out   abushi,one
+            wait_data_valid 0       ;0ns minimum @ 16MHz
+            in    rega,dbusin
+            flags_gen_nz rega
+
+            op_decode_single        ;next instruction
+
+; opcode:         PLP
+PLP_s:      in    opcode,dbusin     ;next opcode
+
+            inc   spointer          
+            out   abuslo,spointer   ;load address from SP
+            out   abushi,one
+            wait_data_valid 0       ;0ns minimum @ 16MHz
+            in    stat2,dbusin
+
+            IRQ_restore
+
+            mov   stat,stat2        ;restore AVR format
+            andi  stat,0b11         ;------ZC
+            bst   stat2,7           ;>---->
+            bld   stat,2            ;-----N--
+
+            andi  stat2,0b1101100   ;-V1BDI-- (Break cleared)
+            ori   stat2,0b0100000   ;  ^=1 (set unused)
+
+            op_decode_single        ;next instruction
+
+; opcode:         ROL A
+ROL_s:      in    opcode,dbusin     ;next opcode
+
+            out   sreg,stat         ;get C
+            rol   rega              ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+
+            op_decode_single        ;next instruction
+
+; opcode:         ROR A
+ROR_s:      in    opcode,dbusin     ;next opcode
+
+            out   sreg,stat         ;get C
+            ror   rega              ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+
+            op_decode_single        ;next instruction
+
+; opcode:         SEC
+SEC_s:      in    opcode,dbusin     ;next opcode
+
+            sbr   stat,1            ;AVR emulated OP
+
+            op_decode_single        ;next instruction
+
+; opcode:         SED
+SED_s:      in    opcode,dbusin     ;next opcode
+
+            sbr   stat2,0b1000      ;AVR emulated OP
+
+            op_decode_single        ;next instruction
+
+; opcode:         SEI
+SEI_s:      in    opcode,dbusin     ;next opcode
+
+            sbr   stat2,0b100       ;AVR emulated OP
+            ldi   a,IRQ_dis         ;only NMI stays enabled
+            out   ibus,a
+            .ifdef irq_dis_real     ;+3
+               out   timsk,one         ;only TOV0 (single step) stays enabled
+               ldi   a,0b11000         ;no USART interrupts, only RX & TX enable
+               out   ucsrb,a
+            .endif
+
+            op_decode_single        ;next instruction
+
+; opcode:         TAX
+TAX_s:      in    opcode,dbusin     ;next opcode
+
+            mov   regx,rega         ;AVR emulated OP
+            flags_gen_nz regx
+
+            op_decode_single        ;next instruction
+
+; opcode:         TAY
+TAY_s:      in    opcode,dbusin     ;next opcode
+
+            mov   regy,rega         ;AVR emulated OP
+            flags_gen_nz regy
+
+            op_decode_single        ;next instruction
+
+; opcode:         TSX
+TSX_s:      in    opcode,dbusin     ;next opcode
+
+            mov   regx,spointer     ;AVR emulated OP
+            flags_gen_nz regx
+
+            op_decode_single        ;next instruction
+
+; opcode:         TXA
+TXA_s:      in    opcode,dbusin     ;next opcode
+
+            mov   rega,regx         ;AVR emulated OP
+            flags_gen_nz rega
+
+            op_decode_single        ;next instruction
+
+; opcode:         TXS
+TXS_s:      in    opcode,dbusin     ;next opcode
+
+            mov   spointer,regx     ;AVR emulated OP
+                                    ;flags are not changed 
+
+            op_decode_single        ;next instruction
+
+; opcode:         TYA
+TYA_s:      in    opcode,dbusin     ;next opcode
+
+            mov   rega,regy         ;AVR emulated OP
+            flags_gen_nz rega
+
+            op_decode_single        ;next instruction
+
+;*****************************************************************
+;
+; Program counter
+;     instructions modifying the PC
+;
+;*****************************************************************
+
+; opcode:         BCC
+BCC_r:      sbrc  stat,0
+            adgen_r                 ;branch if skip
+
+; opcode:         BCS
+BCS_r:      sbrs  stat,0
+            adgen_r                 ;branch if skip
+
+; opcode:         BEQ
+BEQ_r:      sbrs  stat,1
+            adgen_r                 ;branch if skip
+
+; opcode:         BMI
+BMI_r:      sbrs  stat,2
+            adgen_r                 ;branch if skip
+
+; opcode:         BNE
+BNE_r:      sbrc  stat,1
+            adgen_r                 ;branch if skip
+
+; opcode:         BPL
+BPL_r:      sbrc  stat,2
+            adgen_r                 ;branch if skip
+
+; opcode:         BVC
+BVC_r:      sbrc  stat2,6
+            adgen_r                 ;branch if skip
+
+; opcode:         BVS
+BVS_r:      sbrs  stat2,6
+            adgen_r                 ;branch if skip
+
+; opcode:         JMP
+JMP_i:      in    oplow,dbusin      ;save low pointer to pc     
+            out   abuslo,pcl        ;fetch high pointer to pc
+            out   abushi,pch
+                  mov   pcl,oplow
+            wait_data_valid 1       ;60ns minimum @ 16MHz
+            in    pch,dbusin        ;point to new pc
+
+            out   abuslo,pcl        ;fetch pc low  
+            out   abushi,pch
+                  adiw  pch:pcl,1
+            wait_data_valid 2       ;120ns minimum @ 16MHz
+
+JMP_a:      in    oplow,dbusin      ;save pc low   
+            out   abuslo,pcl        ;fetch pc high
+            out   abushi,pch
+                  mov   pcl,oplow
+            wait_data_valid 1       ;60ns minimum @ 16MHz
+            in    pch,dbusin        ;load new pc
+
+            op_decode               ;next instruction
+
+; opcode:         JSR
+JSR_a:      in    oplow,dbusin      ;save new PC as operand address
+            out   abuslo,pcl        ;new PC high fetch
+            out   abushi,pch
+                                    ;pc++ skipped
+            wait_data_valid 0       ;0ns minimum @ 16MHz
+            in    ophigh,dbusin
+            
+            out   abuslo,spointer   ;push pch
+            out   abushi,one
+            dec   spointer
+            out   cbus,writemem     ;WE, ~OE
+            out   dbusout,pch       ;precharge write
+            out   dbusddr,allon     ;output data valid
+            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+
+            out   abuslo,spointer   ;push pcl
+            dec   spointer
+            out   cbus,writemem     ;WE
+            out   dbusout,pcl       ;precharge write
+            out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+            out   dbusddr,zero      ;data hold ends after 60ns
+            out   cbus,readmem      ;OE / read mode back on
+
+            movw  pcl,oplow         ;load new PC
+
+            op_decode               ;next instruction
+
+; opcode:         RTS
+RTS_s:      inc   spointer          
+            out   abuslo,spointer   ;pull pcl
+            out   abushi,one
+                  inc   spointer          
+            wait_data_valid 1       ;60ns minimum @ 16MHz
+            in    pcl,dbusin
+            out   abuslo,spointer   ;pull pch
+            wait_data_valid 0       ;0ns minimum @ 16MHz
+            in    pch,dbusin
+            adiw  pch:pcl,1         ;point to next instruction
+
+            op_decode               ;next instruction
+
+; opcode:         RTI
+RTI_s:      inc   spointer          
+            out   abuslo,spointer   ;pull status
+            out   abushi,one
+                  inc   spointer
+            wait_data_valid 1       ;60ns minimum @ 16MHz
+            in    stat2,dbusin
+            out   abuslo,spointer   ;pull pcl
+                  inc   spointer          
+                  ;status restore while we are waiting for data
+                  IRQ_restore
+                  mov   stat,stat2        ;restore AVR format
+            wait_data_valid 6       ;360ns minimum @ 16MHz
+            in    pcl,dbusin
+            out   abuslo,spointer   ;pull pch
+                  ;status restore while we are waiting for data
+                  andi  stat,0b11         ;------ZC
+                  bst   stat2,7           ;>---->
+                  bld   stat,2            ;-----N--
+                  andi  stat2,0b1101100   ;-V1BDI-- (Break cleared)
+                  ori   stat2,0b0100000   ;  ^=1 (set unused)
+            wait_data_valid 5       ;300ns minimum @ 16MHz
+            in    pch,dbusin
+
+            op_decode               ;next instruction
+
+; opcode:         BRK
+BRK_s:           ;save new PC as operand address
+            out   abuslo,allon      ;new PC high fetch from irq vector
+            out   abushi,allon
+                  ldi   zl,0xfe     ;preload vector low   
+                  ldi   a,IRQ_dis
+                  out   ibus,a
+                  .ifdef irq_dis_real     ;+3
+                     out   timsk,one         ;only TOV0 (single step) stays enabled
+                     ldi   a,0b11000         ;no USART interrupts, only RX & TX enable
+                     out   ucsrb,a
+                  .endif
+                  ;status merge while we are waiting for data
+                  mov   a,stat            ;merge status in 6502 format
+                  andi  a,0b11            ;------ZC
+            wait_data_valid 5       ;300ns minimum @ 16MHz
+            in    ophigh,dbusin
+            out   abuslo,zl         ;new PC low fetch from irq vector
+                  ;status merge while we are waiting for data
+                  bst   stat,2            ;<----<
+                  bld   a,7               ;N-------
+                  or    a,stat2           ;-V1BDI--
+                  sbr   a,0b110000        ;  ^^=1 (pushed by Break)
+                  sbr   stat2,0b100       ;I=1 (IRQ disabled)
+            wait_data_valid 5       ;300ns minimum @ 16MHz
+            in    oplow,dbusin
+            
+            out   abuslo,spointer   ;push pch
+            out   abushi,one
+            dec   spointer
+            out   cbus,writemem     ;WE, ~OE
+            out   dbusout,pch       ;precharge write
+            out   dbusddr,allon     ;output data valid
+            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+
+            out   abuslo,spointer   ;push pcl
+            dec   spointer
+            out   cbus,writemem     ;WE
+            out   dbusout,pcl       ;write
+            out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+
+            out   abuslo,spointer   ;push status
+            dec   spointer
+            out   cbus,writemem     ;WE
+            out   dbusout,a         ;write
+            out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+            out   dbusddr,zero      ;data hold ends after 60ns
+            out   cbus,readmem      ;OE / read mode back on
+
+            movw  pcl,oplow         ;load new PC
+
+            op_decode               ;next instruction
+
+
+;
+; instruction decode vector table
+;
+            align 8           ;align to page boundary
+
+oc_tab:     rjmp  BRK_s       ;0x00
+            rjmp  ORA_zxi 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  ORA_z 
+            rjmp  ASL_z 
+            rjmp  illegalop 
+            rjmp  PHP_s 
+            rjmp  ORA_m 
+            rjmp  ASL_s 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  ORA_a 
+            rjmp  ASL_a 
+            rjmp  illegalop 
+            rjmp  BPL_r       ;0x10
+            rjmp  ORA_ziy 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  ORA_zx 
+            rjmp  ASL_zx 
+            rjmp  illegalop 
+            rjmp  CLC_s 
+            rjmp  ORA_y 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  ORA_x 
+            rjmp  ASL_x 
+            rjmp  illegalop 
+            rjmp  JSR_a       ;0x20
+            rjmp  AND_zxi 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  BIT_z 
+            rjmp  AND_z 
+            rjmp  ROL_z 
+            rjmp  illegalop 
+            rjmp  PLP_s 
+            rjmp  AND_m 
+            rjmp  ROL_s 
+            rjmp  illegalop 
+            rjmp  BIT_a
+            rjmp  AND_a 
+            rjmp  ROL_a
+            rjmp  illegalop 
+            rjmp  BMI_r       ;0x30
+            rjmp  AND_ziy 
+            rjmp  illegalop
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  AND_zx 
+            rjmp  ROL_zx 
+            rjmp  illegalop 
+            rjmp  SEC_s
+            rjmp  AND_y
+            rjmp  illegalop
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  AND_x 
+            rjmp  ROL_x
+            rjmp  illegalop 
+            rjmp  RTI_s       ;0x40
+            rjmp  EOR_zxi 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  EOR_z 
+            rjmp  LSR_z 
+            rjmp  illegalop 
+            rjmp  PHA_s 
+            rjmp  EOR_m 
+            rjmp  LSR_s 
+            rjmp  illegalop 
+            rjmp  JMP_a
+            rjmp  EOR_a 
+            rjmp  LSR_a 
+            rjmp  illegalop 
+            rjmp  BVC_r       ;0x50
+            rjmp  EOR_ziy 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  EOR_zx 
+            rjmp  LSR_zx 
+            rjmp  illegalop 
+            rjmp  CLI_s 
+            rjmp  EOR_y 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  EOR_x 
+            rjmp  LSR_x 
+            rjmp  illegalop 
+            rjmp  RTS_s       ;0x60
+            rjmp  ADC_zxi 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  ADC_z 
+            rjmp  ROR_z 
+            rjmp  illegalop 
+            rjmp  PLA_s 
+            rjmp  ADC_m 
+            rjmp  ROR_s 
+            rjmp  illegalop 
+            rjmp  JMP_i 
+            rjmp  ADC_a 
+            rjmp  ROR_a 
+            rjmp  illegalop 
+            rjmp  BVS_r       ;0x70
+            rjmp  ADC_ziy 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  ADC_zx 
+            rjmp  ROR_zx 
+            rjmp  illegalop 
+            rjmp  SEI_s 
+            rjmp  ADC_y 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  ADC_x 
+            rjmp  ROR_x 
+            rjmp  illegalop 
+            rjmp  illegalop   ;0x80
+            rjmp  STA_zxi 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  STY_z 
+            rjmp  STA_z 
+            rjmp  STX_z 
+            rjmp  illegalop 
+            rjmp  DEY_s
+            rjmp  illegalop 
+            rjmp  TXA_s 
+            rjmp  illegalop 
+            rjmp  STY_a 
+            rjmp  STA_a 
+            rjmp  STX_a 
+            rjmp  illegalop 
+            rjmp  BCC_r       ;0x90
+            rjmp  STA_ziy 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  STY_zx 
+            rjmp  STA_zx 
+            rjmp  STX_zy 
+            rjmp  illegalop 
+            rjmp  TYA_s 
+            rjmp  STA_y 
+            rjmp  TXS_s 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  STA_x 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  LDY_m       ;0xa0
+            rjmp  LDA_zxi 
+            rjmp  LDX_m 
+            rjmp  illegalop 
+            rjmp  LDY_z 
+            rjmp  LDA_z 
+            rjmp  LDX_z 
+            rjmp  illegalop 
+            rjmp  TAY_s 
+            rjmp  LDA_m 
+            rjmp  TAX_s 
+            rjmp  illegalop 
+            rjmp  LDY_a
+            rjmp  LDA_a 
+            rjmp  LDX_a 
+            rjmp  illegalop 
+            rjmp  BCS_r       ;0xb0
+            rjmp  LDA_ziy 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  LDY_zx 
+            rjmp  LDA_zx 
+            rjmp  LDX_zy 
+            rjmp  illegalop 
+            rjmp  CLV_s 
+            rjmp  LDA_y 
+            rjmp  TSX_s 
+            rjmp  illegalop 
+            rjmp  LDY_x 
+            rjmp  LDA_x 
+            rjmp  LDX_y 
+            rjmp  illegalop 
+            rjmp  CPY_m       ;0xc0
+            rjmp  CMP_zxi 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  CPY_z 
+            rjmp  CMP_z 
+            rjmp  DEC_z 
+            rjmp  illegalop 
+            rjmp  INY_s 
+            rjmp  CMP_m 
+            rjmp  DEX_s 
+            rjmp  illegalop 
+            rjmp  CPY_a 
+            rjmp  CMP_a 
+            rjmp  DEC_a 
+            rjmp  illegalop 
+            rjmp  BNE_r       ;0xd0
+            rjmp  CMP_ziy 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  CMP_zx 
+            rjmp  DEC_zx 
+            rjmp  illegalop 
+            rjmp  CLD_s 
+            rjmp  CMP_y 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  CMP_x
+            rjmp  DEC_x 
+            rjmp  illegalop 
+            rjmp  CPX_m       ;0xe0
+            rjmp  SBC_zxi 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  CPX_z 
+            rjmp  SBC_z 
+            rjmp  INC_z 
+            rjmp  illegalop 
+            rjmp  INX_s 
+            rjmp  SBC_m 
+            rjmp  NOP_s 
+            rjmp  illegalop 
+            rjmp  CPX_a 
+            rjmp  SBC_a 
+            rjmp  INC_a 
+            rjmp  illegalop 
+            rjmp  BEQ_r       ;0xf0
+            rjmp  SBC_ziy 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  SBC_zx 
+            rjmp  INC_zx 
+            rjmp  illegalop 
+            rjmp  SED_s 
+            rjmp  SBC_y 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  illegalop 
+            rjmp  SBC_x 
+            rjmp  INC_x 
+            rjmp  illegalop 
+;*****************************************************************
+;
+; Exceptions
+;
+;*****************************************************************
+
+; illegal opcode
+illegalop:
+   jmp  deb_inv_op     ;extension
+
+; indirect addresspointer exceeded end of zeropage - NOT IMPLEMENTED
+;zp_wrap:    rjmp  zp_wrap     ;diag will be added later
+
+; stackpointer exceeded end of stackpage - NOT IMPLEMENTED!
+; sp_wrap:    rjmp  sp_wrap     ;diag will be added later
+
+; attempt to write to protected romspace - NOT implemented
+;rom_wrt:    rjmp  rom_wrt     ;diag will be added later
+
+;*****************************************************************
+;
+; Memory read instructions
+;     Load, arithmetic & logical
+;
+;*****************************************************************
+
+; opcode:         ADC
+            adgen_x     ADC_        ;abs,X
+            adgen_y     ADC_        ;abs,Y
+            adgen_zxi   ADC_        ;(ZP,X) indexed indirect
+            adgen_ziy   ADC_        ;(ZP),Y indirect indexed
+            adgen_zx    ADC_        ;ZP,X
+            adgen_z     ADC_        ;ZP absolute
+ADC_a:      adgen_a                 ;absolute
+
+ADC_o:      op_fetch                ;common entry after address generate
+ADC_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+
+            sbrc  stat2,3           ;test decimal flag
+            rjmp  ADC_d
+            out   sreg,stat         ;get C
+            adc   rega,operand      ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+            bst   stat,3            ;save V
+            bld   stat2,6
+
+ADC_d3:     op_decode               ;next instruction
+
+ADC_d:      addi  rega,0x66         ;decimal correction
+            out   sreg,stat
+            adc   rega,operand
+            in    stat,sreg
+            brcs  ADC_d2            ;MSD
+            subi  rega,0x60
+            out   sreg,stat
+ADC_d2:     brhs  ADC_d3            ;LSD
+            subi  rega,0x06
+            rjmp  ADC_d3
+
+; opcode:         AND
+            adgen_x     AND_        ;abs,X
+            adgen_y     AND_        ;abs,Y
+            adgen_zxi   AND_        ;(ZP,X) indexed indirect
+            adgen_ziy   AND_        ;(ZP),Y indirect indexed
+            adgen_zx    AND_        ;ZP,X
+            adgen_z     AND_        ;ZP absolute
+AND_a:      adgen_a                 ;absolute
+
+AND_o:      op_fetch                ;common entry after address generate
+AND_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+
+            out   sreg,stat         ;keep C
+            and   rega,operand      ;AVR emulated OP
+            in    stat,sreg         ;save NZ, keep C
+
+            op_decode               ;next instruction
+
+; opcode:         BIT
+            adgen_z     BIT_        ;ZP absolute
+BIT_a:      adgen_a                 ;absolute
+
+BIT_o:      op_fetch                ;common entry after address generate
+BIT_m:      in    operand,dbusin
+
+            mov   a,rega            ;keep A
+            out   sreg,stat         ;keep C
+            and   a,operand         ;A & M -> Z
+            in    stat,sreg
+            bst   operand,6         ;M6 -> V
+            bld   stat2,6
+            bst   operand,7         ;M7 -> N
+            bld   stat,2
+
+            op_decode               ;next instruction
+
+; opcode:         CMP
+; a compare in a 6502 works with reversed carry opposed to an AVR
+; the reason: a 6502 performs an add with complemented operand as a compare
+            adgen_x     CMP_        ;abs,X
+            adgen_y     CMP_        ;abs,Y
+            adgen_zxi   CMP_        ;(ZP,X) indexed indirect
+            adgen_ziy   CMP_        ;(ZP),Y indirect indexed
+            adgen_zx    CMP_        ;ZP,X
+            adgen_z     CMP_        ;ZP absolute
+CMP_a:      adgen_a                 ;absolute
+
+CMP_o:      op_fetch                ;common entry after address generate
+CMP_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+
+            cp    rega,operand      ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+            eor   stat,one          ;invert C
+
+            op_decode               ;next instruction
+
+; opcode:         CPX
+; a compare in a 6502 works with reversed carry opposed to an AVR
+; the reason: a 6502 performs an add with complemented operand as a compare
+            adgen_z     CPX_        ;ZP absolute
+CPX_a:      adgen_a                 ;absolute
+
+CPX_o:      op_fetch                ;common entry after address generate
+CPX_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+
+            cp    regx,operand      ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+            eor   stat,one          ;invert C
+
+            op_decode               ;next instruction
+
+; opcode:         CPY
+; a compare in a 6502 works with reversed carry opposed to an AVR
+; the reason: a 6502 performs an add with complemented operand as a compare
+            adgen_z     CPY_        ;ZP absolute
+CPY_a:      adgen_a                 ;absolute
+
+CPY_o:      op_fetch                ;common entry after address generate
+CPY_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+
+            cp    regy,operand      ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+            eor   stat,one          ;invert C
+
+            op_decode               ;next instruction
+
+; opcode:         EOR
+            adgen_x     EOR_        ;abs,X
+            adgen_y     EOR_        ;abs,Y
+            adgen_zxi   EOR_        ;(ZP,X) indexed indirect
+            adgen_ziy   EOR_        ;(ZP),Y indirect indexed
+            adgen_zx    EOR_        ;ZP,X
+            adgen_z     EOR_            ;ZP absolute
+EOR_a:      adgen_a                 ;absolute
+
+EOR_o:      op_fetch                ;common entry after address generate
+EOR_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+
+            out   sreg,stat         ;keep C
+            eor   rega,operand      ;AVR emulated OP
+            in    stat,sreg         ;save NZ, keep C
+
+            op_decode               ;next instruction
+
+; opcode:         LDA
+            adgen_x     LDA_        ;abs,X
+            adgen_y     LDA_        ;abs,Y
+            adgen_zxi   LDA_        ;(ZP,X) indexed indirect
+            adgen_ziy   LDA_        ;(ZP),Y indirect indexed
+            adgen_zx    LDA_        ;ZP,X
+            adgen_z     LDA_        ;ZP absolute
+LDA_a:      adgen_a                 ;absolute
+
+LDA_o:      reg_fetch rega          ;common entry after address generate
+LDA_m:      in    rega,dbusin       ;same for immediate
+
+            flags_gen_nz rega
+
+            op_decode               ;next instruction
+
+; opcode:         LDX
+            adgen_y     LDX_        ;abs,Y
+            adgen_zy    LDX_        ;ZP,Y
+            adgen_z     LDX_        ;ZP absolute
+LDX_a:      adgen_a                 ;absolute
+
+LDX_o:      reg_fetch regx          ;common entry after address generate
+LDX_m:      in    regx,dbusin       ;same for immediate
+
+            flags_gen_nz regx
+
+            op_decode               ;next instruction
+
+; opcode:         LDY
+            adgen_x     LDY_        ;abs,X
+            adgen_zx    LDY_        ;ZP,X
+            adgen_z     LDY_        ;ZP absolute
+LDY_a:      adgen_a                 ;absolute
+
+LDY_o:      reg_fetch regy          ;common entry after address generate
+LDY_m:      in    regy,dbusin       ;same for immediate
+
+            flags_gen_nz regy
+
+            op_decode               ;next instruction
+
+; opcode:         ORA
+            adgen_x     ORA_        ;abs,X
+            adgen_y     ORA_        ;abs,Y
+            adgen_zxi   ORA_        ;(ZP,X) indexed indirect
+            adgen_ziy   ORA_        ;(ZP),Y indirect indexed
+            adgen_zx    ORA_        ;ZP,X
+            adgen_z     ORA_        ;ZP absolute
+ORA_a:      adgen_a                 ;absolute
+
+ORA_o:      op_fetch                ;common entry after address generate
+ORA_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+
+            out   sreg,stat         ;keep C
+            or    rega,operand      ;AVR emulated OP
+            in    stat,sreg         ;save NZ, keep C
+
+            op_decode               ;next instruction
+
+; opcode:         SBC
+; subtraction in a 6502 works with reversed carry, borrow = !carry
+; the reason: a 6502 performs an add with complemented operand during subtract
+            adgen_x     SBC_        ;abs,X
+            adgen_y     SBC_        ;abs,Y
+            adgen_zxi   SBC_        ;(ZP,X) indexed indirect
+            adgen_ziy   SBC_        ;(ZP),Y indirect indexed
+            adgen_zx    SBC_        ;ZP,X
+            adgen_z     SBC_        ;ZP absolute
+SBC_a:      adgen_a                 ;absolute
+
+SBC_o:      op_fetch                ;common entry after address generate
+SBC_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+
+            com   operand
+            out   sreg,stat         ;get C
+            adc   rega,operand      ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+            bst   stat,3            ;save V
+            bld   stat2,6
+
+            sbrs  stat2,3           ;test decimal flag
+            rjmp  SBC_d             ;skip decimal mode correction
+
+            brcs  SBC_d2            ;MSD correction
+            subi  rega,0x60
+            out   sreg,stat
+SBC_d2:     brhs  SBC_d             ;LSD correction
+            subi  rega,0x06
+
+SBC_d:      op_decode               ;next instruction
+
+
+;*****************************************************************
+;
+; Modify memory instructions
+;     Shift, increment & decrement
+;
+;*****************************************************************
+
+; opcode:         ASL
+            adgen_x     ASL_        ;abs,X
+            adgen_zx    ASL_        ;ZP,X
+            adgen_z     ASL_        ;ZP absolute
+ASL_a:      adgen_a                 ;absolute
+
+ASL_o:      op_fetch_modify         ;common entry after address generate
+ASL_m:      in    operand,dbusin    ;operand prefetched (z, zx, zy)
+
+            lsl   operand           ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+
+            store_modify
+
+; opcode:         LSR
+            adgen_x     LSR_        ;abs,X
+            adgen_zx    LSR_        ;ZP,X
+            adgen_z     LSR_        ;ZP absolute
+LSR_a:      adgen_a                 ;absolute
+
+LSR_o:      op_fetch_modify         ;common entry after address generate
+LSR_m:      in    operand,dbusin    ;operand prefetched (z, zx, zy)
+
+            lsr   operand           ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+
+            store_modify
+
+; opcode:         ROL
+            adgen_x     ROL_        ;abs,X
+            adgen_zx    ROL_        ;ZP,X
+            adgen_z     ROL_        ;ZP absolute
+ROL_a:      adgen_a                 ;absolute
+
+ROL_o:      op_fetch_modify         ;common entry after address generate
+ROL_m:      in    operand,dbusin    ;operand prefetched (z, zx, zy)
+
+            out   sreg,stat         ;get C
+            rol   operand           ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+
+            store_modify
+
+; opcode:         ROR
+            adgen_x     ROR_        ;abs,X
+            adgen_zx    ROR_        ;ZP,X
+            adgen_z     ROR_        ;ZP absolute
+ROR_a:      adgen_a                 ;absolute
+
+ROR_o:      op_fetch_modify         ;common entry after address generate
+ROR_m:      in    operand,dbusin    ;operand prefetched (z, zx, zy)
+
+            out   sreg,stat         ;get C
+            ror   operand           ;AVR emulated OP
+            in    stat,sreg         ;save NZC
+
+            store_modify
+
+; opcode:         DEC
+            adgen_x     DEC_        ;abs,X
+            adgen_zx    DEC_        ;ZP,X
+            adgen_z     DEC_        ;ZP absolute
+DEC_a:      adgen_a                 ;absolute
+
+DEC_o:      op_fetch_modify         ;common entry after address generate
+DEC_m:      in    operand,dbusin    ;operand prefetched (z, zx, zy)
+
+            out   sreg,stat         ;keep C
+            dec   operand           ;AVR emulated OP
+            in    stat,sreg         ;save NZ, keep C
+
+            store_modify
+
+; opcode:         INC
+            adgen_x     INC_        ;abs,X
+            adgen_zx    INC_        ;ZP,X
+            adgen_z     INC_        ;ZP absolute
+INC_a:      adgen_a                 ;absolute
+
+INC_o:      op_fetch_modify         ;common entry after address generate
+INC_m:      in    operand,dbusin    ;operand prefetched (z, zx, zy)
+
+            out   sreg,stat         ;keep C
+            inc   operand           ;AVR emulated OP
+            in    stat,sreg         ;save NZ, keep C
+
+            store_modify
+
+;*****************************************************************
+;
+; Memory write instructions
+;     Store register
+;
+;*****************************************************************
+
+; opcode:         STA
+            adgen_x     STA_        ;abs,X
+            adgen_y     STA_        ;abs,Y
+            adgen_zxi   STA_        ;(ZP,X) indexed indirect
+            adgen_ziy   STA_        ;(ZP),Y indirect indexed
+            adgen_zx    STA_        ;ZP,X
+            adgen_z     STA_        ;ZP absolute
+STA_a:      adgen_a                 ;absolute
+
+STA_o:      store_reg rega,STA_m    ;common entry after address generate
+
+; opcode:         STX
+            adgen_zy    STX_        ;ZP,y
+            adgen_z     STX_        ;ZP absolute
+STX_a:      adgen_a                 ;absolute
+
+STX_o:      store_reg regx,STX_m    ;common entry after address generate
+
+; opcode:         STY
+            adgen_s_zx  STY_        ;ZP,x
+            adgen_s_z   STY_        ;ZP absolute
+STY_a:      adgen_a                 ;absolute
+
+STY_o:      store_reg regy,STY_m    ;common entry after address generate
+
diff --git a/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_Emu_config.inc b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_Emu_config.inc
new file mode 100644
index 00000000..8eefd053
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_Emu_config.inc
@@ -0,0 +1,387 @@
+.if config_part == 1 ;invoked from 6502_Emu.asm
+
+;*********************************************************************
+;
+; 6502 Emulator Configuration
+;
+; This file should preserve your personal configuration when upgrading
+; the source code.
+;
+;*********************************************************************
+.set  config_version = 831
+
+;ATMega platform - ATMega16 or ATMega32
+;  ATMega32 may be required due to flash size for configured features 
+.IFNDEF   SIGNATURE_000  ;not already defined per default device in Atmel Studio >4
+   .NOLIST
+   ;.INCLUDE "m16def.inc"
+   .INCLUDE "m32def.inc"
+   .LIST
+.ENDIF
+
+;AVR clock speed 
+.equ  Osc_Hz            = 16000000    ;16 MHz
+
+;external SRAM waittime between applying address and data stable
+.set  data_valid_ns     = 180
+;  the time is calculated as follows:
+;    RAM access time + AVR input sync latch (1/2 clock)
+;    + input & output propagation delay (~ 2 * 15ns)
+;    for a 62256-80 on an AVR at 16MHz: 80 + 62,5 / 2 + 15 + 15
+;    only change if RAM is slower than 120ns
+;    in most cases at least 3 waitcycles are used for housekeeping anyway
+
+;Baudrate
+.equ BAUD  = 38400      ;maximum standard rate with <1% deviation @ 16MHz
+ 
+;RS232 software flow control watermarks, disabled if undefined
+;  the buffer max is 255 bytes
+;  RX only to prevent overruning applications input capacity
+.equ flowlo = 128       ;low watermark, send XON if less buffer used
+.equ flowhi = 192       ;high watermark, send XOFF if reached
+
+;select emulator core CMOS 65C02, NMOS 6502 if undefined
+;.equ cmos_core = 1
+
+;interrupt disable mode real, virtual if undefined
+;.equ irq_dis_real = 1
+;  virtual = background interrupts always allowed = always full control,
+;            no atomic timing for disabled instruction sequence.
+;  real    = absolutely no interrupts allowed when disabled except single step and NMI,
+;            program must not have extended disable periods, atomic timing is enforced,
+;            reset button mandatory to recover the monitor/debugger when I bit remains set.
+
+;ROM load & write protect page boundary - RAM at this page and above is write protected
+;adds 2 cycles (125ns) to instructions writing to memory (stores & modifying memory)
+;.equ rommap    = 0xc0      
+
+;**** IO ****
+;internal IO access page (RS232, Timers, Latches) - disabled if undefined
+.equ iomap     = 0xbf
+;   Can be configured overlapping ROM-space if no operand fetch from the same page
+;   is required. Instruction fetch including immediate operands will always be
+;   served from RAM (used as peudo-ROM) - writes and reads of nonimmediate operands
+;   will be to and from IO-space.
+;   setting iomap to page zero is not allowed.
+
+; enable phi2 output on portd7, disabled if undefined
+; required to drive 65xx IO chips 
+.equ phi2_ena  = 1
+
+; enable NMI input on portd2, disabled if undefined
+;.ifndef irq_dis_real
+   .equ nmi_ena   = 1
+;.endif
+
+;**** IO select expansion registers ****
+;define inactive values of IO-select pins on IO-select expansion registers
+;defines the opposite value as strobe polarity for each IO select pin
+
+.equ  ios1_default = 0b10000001        ;IO select pin 1 expansion default
+;io select bits 10 = -74HC573 input latch
+;               11 = 74HC573 output latch
+;               12 = HD44780 compatible character LCD
+;               13 = 65xx IO
+;               14 = I2C connect (74hc4066)
+;               15 = XMEM select
+;               16 = SPI select
+;               17 = -IO reset
+
+.ifndef  phi2_ena       ;not available if phi2 uses cbus pin 7
+   ;.equ  ios2_default = 0b00000000    ;IO select pin 2 expansion default
+   ;io select bits 20 =
+   ;               21 = 
+   ;               22 = 
+   ;               23 = 
+   ;               24 = 
+   ;               25 = 
+   ;               26 = 
+   ;               27 = 
+.endif
+
+.ifndef  nmi_ena        ;not available if NMI uses cbus pin 2
+   ;.equ  ios3_default = 0b00000000    ;IO select pin 3 expansion default
+   ;io select bits 30 =
+   ;               31 = 
+   ;               32 = 
+   ;               33 = 
+   ;               34 = 
+   ;               35 = 
+   ;               36 = 
+   ;               37 = 
+.endif
+
+;**** IO select for builtin modules ****
+; enable SPI module and define IO select signal for SPI, disabled if undefined
+.equ spi_sel   = 16     ;IO select register 1, pin 6
+
+; enable I2C module and define IO select signal for I2C, disabled if undefined
+.equ i2c_sel   = 14     ;IO select register 1, pin 4
+
+; enable LCD module and define IO select signal for LCD, disabled if undefined
+.equ lcd_sel   = 12     ;IO select register 1, pin 2
+
+; IO selects of the addon IO modules in part 2 of the configuration
+
+;**** SPI software address translation ****
+;translate IO-address to slave select 
+;reset state, must be defined
+.equ spi_idle  = 0b11111   ;all slaves inactive
+;.equ spi_idle  = 0xf       ;unused address for hardware translation
+;SS bit 0      = -SD card
+;SS bit 1      = -74HC165 parallel input shifter
+;SS bit 2      = -74HC595 parallel output shifter
+;SS bit 3      = -25LC512 SPI EEPROM 64kB
+;SS bit 4      = -unused
+
+;enable spi virtual address translation, disabled if undefined
+.equ spi_vat = 1           
+
+;oplow BCD to SS pin table
+.macro   spi_virt_ss
+;  x0 = SD card on bit0 (-cs) & bit4 (+oe)
+;  x1 = 74HC165 on bit1 (-sh/+ld -oe)
+   .db 0b00001^spi_idle,0b00010^spi_idle
+;  x2 = 74HC595 on bit2 (+rck)
+;  x3 = 25LC512 EEPROM on bit 3 (-cs)
+;   .db 0b00100^spi_idle,0b01000^spi_idle
+   .db 0b00100^spi_idle,spi_idle ;EEPROM masked
+;  x4 unused
+;  x5 inactive
+   .db 0b10000^spi_idle,spi_idle
+;  x6 inactive
+;  x7 inactive
+   .db spi_idle,spi_idle
+.endmacro
+
+;**** IO resets ****
+;a reset pin can be defined and must reside on an IO-select expansion register
+;this pin is strobed low during reset if defined
+.equ  io_reset_pin = 17
+
+;definition for io modules with a reset vector
+.macro   io_modules_reset 
+   rcall ltch_rs        ;reset 74HC573
+.endmacro
+
+;**** miscelaneous ****
+;64kB serial EEPROM reserved for non volatile program storage
+;eep_adr >= 8 = I2C slave adr.; eep_adr < 8 = SPI device adr.
+;none if undefined
+;.equ  eep_adr = 0xa0       ;I2C EEPROM
+.equ  eep_adr = 3          ;SPI EEPROM
+
+; self diag register enable, allow force IRQ, NMI, RESET
+; should stay undefined to prevent you from shooting yourself in the foot
+.equ ena_diag  = 1
+
+.endif
+.if config_part == 2 ;invoked from 6502_Emu_IO.inc
+
+;**************************************************************
+;
+; I/O address decode tables
+; assign internal or external IO modules
+;
+;**************************************************************
+
+   align 4           ;keep each table on same page
+
+; I/O address table, reserve 0x10 addresses at a time
+;     larger chunks can be defined by pointing sequential addresses
+;     to the same entry point
+; read address table
+ior_tab:
+   rjmp  ir_exit     ;0x
+   rjmp  ir_exit     ;1x
+   rjmp  ir_exit     ;2x
+   rjmp  ir_exit     ;3x
+   rjmp  ir_exit     ;4x
+   rjmp  ir_exit     ;5x
+   rjmp  ir_exit     ;6x
+   rjmp  ir_exit     ;7x
+   rjmp  ir_exit     ;8x
+   rjmp  spr_data    ;9x   SPI data register
+   rjmp  io65xx_rd   ;Ax   65xx IO chip RAM
+   rjmp  io65xx_rd   ;Bx   65xx IO chip
+   rjmp  ltch_rd     ;Cx   74HC573 latch(es)
+   rjmp  lcd_rd      ;Dx   character LCD
+   rjmp  iorE0       ;Ex - subdecoded 0xe0 - 0xef
+   rjmp  iordreg     ;Fx - internal emulated registers
+
+; write address table
+iow_tab:
+   rjmp  iw_exit     ;0x
+   rjmp  iw_exit     ;1x
+   rjmp  iw_exit     ;2x
+   rjmp  iw_exit     ;3x
+   rjmp  iw_exit     ;4x
+   rjmp  iw_exit     ;5x
+   rjmp  iw_exit     ;6x
+   rjmp  iw_exit     ;7x
+   rjmp  iw_exit     ;8x
+   rjmp  spw_data    ;9x   SPI data register
+   rjmp  io65xx_wrt  ;Ax   65xx IO chip (RAM)
+   rjmp  io65xx_wrt  ;Bx   65xx IO chip
+   rjmp  ltch_wrt    ;Cx   74HC573 latch(es)
+   rjmp  lcd_wrt     ;Dx   character LCD
+   rjmp  iowE0       ;Ex - subdecoded 0xe0 - 0xef
+   rjmp  iowtreg     ;Fx - internal emulated registers
+
+; sub address decode tables
+; - select 1 from a range of 0x10 addresses
+
+; subdecode 0xe0 - 0xef
+; read address decode table iorE0 (0xe0 - 0xef)
+iorE0_tab:
+   rjmp  ir_exit     ;0
+   rjmp  ir_exit     ;1
+   rjmp  ir_exit     ;2
+   rjmp  ir_exit     ;3
+   rjmp  ir_exit     ;4
+   rjmp  ir_exit     ;5
+   rjmp  ir_exit     ;6
+   rjmp  ir_exit     ;7
+   rjmp  ir_exit     ;8
+   rjmp  ir_exit     ;9
+   rjmp  ir_exit     ;A
+   rjmp  ir_exit     ;B
+   rjmp  ir_exit     ;C
+   rjmp  ir_exit     ;D
+   rjmp  ir_exit     ;E
+   rjmp  ir_exit     ;F
+
+
+; write address decode table iowE0 (0xe0 - 0xef)
+iowE0_tab:
+   rjmp  iw_exit     ;0
+   rjmp  iw_exit     ;1
+   rjmp  iw_exit     ;2
+   rjmp  iw_exit     ;3
+   rjmp  iw_exit     ;4
+   rjmp  iw_exit     ;5
+   rjmp  iw_exit     ;6
+   rjmp  iw_exit     ;7
+   rjmp  iw_exit     ;8
+   rjmp  iw_exit     ;9
+   rjmp  iw_exit     ;A
+   rjmp  iw_exit     ;B
+   rjmp  iw_exit     ;C
+   rjmp  iw_exit     ;D
+   rjmp  iw_exit     ;E
+   rjmp  iw_exit     ;F
+
+; internal I/O table, subgroup of range defined by 
+; iordreg / iowtreg
+; read internal register address table
+ior_int_tab:
+   rjmp  acia_rx     ;0 - ACIA receive data register
+   rjmp  tcdn_r      ;1 - 10ms tick countdown timer
+   rjmp  i2c_stat    ;2 - i2c read status
+   rjmp  i2c_data_rd ;3 - i2c read data register
+   rjmp  t1r_adr     ;4 - timer 1 register address
+   rjmp  t1r_data    ;5 - timer 1 data
+   rjmp  spr_dat_lst ;6 - spi data after last write
+   rjmp  dmr_stat    ;7 - dma status
+   rjmp  dmr_data    ;8 - dma parameter data
+   rjmp  ir_exit     ;9
+   rjmp  ir_exit     ;A
+   rjmp  ir_exit     ;B
+   rjmp  ir_diag     ;C - diag selftest register
+   rjmp  ir_vector   ;D - global internal IRQ vector
+   rjmp  ir_mask     ;E - global internal IRQ mask
+   rjmp  ir_flag     ;F - global internal IRQ flags
+
+; write internal register address
+iow_int_tab:
+   rjmp  acia_tx     ;0 - ACIA transmit data register
+   rjmp  tcdn_w      ;1 - 10ms tick countdown timer
+   rjmp  i2c_cmd     ;2 - i2c command register 
+   rjmp  i2c_data_wrt ;3 - i2c write data register
+   rjmp  t1w_adr     ;4 - timer 1 register address
+   rjmp  t1w_data    ;5 - timer 1 data
+   rjmp  spw_cmd     ;6 - spi command register
+   rjmp  dmw_cmd     ;7 - dma command register
+   rjmp  dmw_data    ;8 - dma parameter data
+   rjmp  iw_exit     ;9
+   rjmp  iw_exit     ;A
+   rjmp  iw_exit     ;B
+   rjmp  iw_diag     ;C - diag selftest register
+   rjmp  iw_exit     ;D - read only IRQ vector
+   rjmp  iw_mask     ;E - global internal IRQ mask
+   rjmp  iw_flag     ;F - global internal IRQ flags
+
+
+;check address decode table alignment for missing or extra entry
+.if (pc & 0xf)
+   .error "Address decode tables are misaligned!"
+.endif
+
+;SPI address to slave select translation
+.ifdef spi_vat
+spi_vss:
+   spi_virt_ss
+.endif
+
+;**************************************************************
+;
+; IO address decoder
+;
+;**************************************************************
+
+;decoding bits 0-3 of an IO address
+
+iorE0:                  ;read decode for 0xe0 - 0xef
+   io_adr_dec  iorE0_tab
+
+iowE0:                  ;write decode for 0xe0 - 0xef
+   io_adr_dec  iowE0_tab
+
+;**************************************************************
+;
+; parallel IO modules
+;
+; examples: 74HC573 latch IO, Phi2 synced IO
+;
+;**************************************************************
+
+;IO to 74HC573 latch
+;
+;  multiple latches require individual IO-selects. these can be set by
+;  software address decode or hardware decoder 74HC237 (up to 8 latches,
+;  up to 4 each mixed r/w)
+
+ltch_rd:
+   set_io_select 10     ;read with strobe low io select extension reg 1, pin 0
+   par_rd 100           ;min 60ns to data valid (3state output enable time OE - Q)
+                        ;+ 1/2 clock (31.3ns) avr input latch delay
+                   
+ltch_wrt:
+   set_io_select 11     ;write with strobe high io select extension reg 1, pin 1
+   par_wrt 60           ;min 60ns enable strobe (propagation delay time LE - Q)
+   rjmp  iw_exit        ;next instruction
+
+ltch_rs:
+   clr   operand        ;clear 74hc573 output latch
+   set_io_reset 11      ;select latch strobe
+   par_wrt 60           ;write operand with strobe
+   ret                        
+
+;*****************************************************************
+;
+;IO to 65xx chip using phi2
+;
+io65xx_rd:
+   set_io_select 13     ;read with strobe on io select extension reg 1, pin 3
+   phi2_rd              ;timed read synchronized to phi2 (OC2)
+                   
+io65xx_wrt:
+   set_io_select 13     ;write with strobe on io select extension reg 1, pin 3
+   phi2_wrt             ;timed write synchronized to phi2 (OC2)
+
+;no software reset - hardware reset driven by reset pin
+
+
+;.org pc + 0x400         ;test sufficient space for custom modules
+
+.endif
diff --git a/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_emu.eep b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_emu.eep
new file mode 100644
index 00000000..1996e8fd
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_emu.eep
@@ -0,0 +1 @@
+:00000001FF
diff --git a/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_emu.hex b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_emu.hex
new file mode 100644
index 00000000..75daa03e
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_emu.hex
@@ -0,0 +1,923 @@
+:020000020000FC
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diff --git a/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_emu.lst b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_emu.lst
new file mode 100644
index 00000000..aa2c0fec
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_emu.lst
@@ -0,0 +1,10529 @@
+
+AVRASM ver. 2.1.43  6502_emu.asm Thu Feb 25 10:55:57 2016
+
+6502_emu.asm(100): Including file 'sam.inc'
+6502_emu.asm(110): Including file '6502_Emu_config.inc'
+6502_Emu_config.inc(18): Including file 'm32def.inc'
+6502_emu.asm(642): Including file '6502_Emu_NMOS.inc'
+6502_emu.asm(651): Including file '6502_Emu_IO.inc'
+6502_Emu_IO.inc(1173): Including file '6502_Emu_config.inc'
+                 
+                 
+                 ;
+                 ;   6 5 0 2   E M U L A T O R
+                 ;
+                 ; An AVR emulates a 6502 with >2MHz speed
+                 ;
+                 ; Copyright (C) 2013-2015  Klaus Dormann
+                 ;
+                 ; This program is free software: you can redistribute it and/or modify
+                 ; it under the terms of the GNU General Public License as published by
+                 ; the Free Software Foundation, either version 3 of the License, or
+                 ; (at your option) any later version.
+                 ;
+                 ; This program is distributed in the hope that it will be useful,
+                 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
+                 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+                 ; GNU General Public License for more details.
+                 ;
+                 ; You should have received a copy of the GNU General Public License
+                 ; along with this program.  If not, see <http://www.gnu.org/licenses/>.
+                 ;
+                 ; contact info at http://2m5.de or email K@2m5.de
+                 ;
+                 #define   version "0.83b"   ;makes a printable version number
+                 ;
+                 ; version history:
+                 ;  0.8   24-jan-13   1st version distributed for testing
+                 ;  0.81  04-mar-13   added binary load/save/autoload support for applications
+                 ;                    added 6502_Emu_config.inc for all reconfigurable items.
+                 ;                    split cpu core into 6502_Emu_NMOS.inc to support change to CMOS
+                 ;                    added timer 1 access, tested and fixed all interrupts
+                 ;                    added countdown timer & interrupt vector register
+                 ;                    added optional software flow control to rx buffer
+                 ;                    improved terminal support for backspace and delete key
+                 ;  0.82  20-jul-13   added CMOS core (65C02 instructions and disassembly)
+                 ;  0.83  17-may-14   added breakpoint support to debugger
+                 ;                    added SPI support to IO module, DMA for SPI & I2C
+                 ;  0.83a 17-aug-14   changed interrupt disabled in real mode to honor NMI & single step
+                 ;                    fixed diag stop continuing until 10ms interrupt, now immediate
+                 ;                    fixed invalid opcode message broken by check for breakpoint
+                 ;  0.83b 24-jan-15   fixed ATMega32 interrupt table, fixed break hanging on some terminals
+                 ;                    reduced interrupt latency caused by the monitor waiting for tx buffer
+                 ;                    
+                 ;
+                 ; ATMEGA16 & ATMEGA32 fuse settings:
+                 ;   16 MHz crystal
+                 ;   JTAGEN unprogrammed
+                 ;   BOD enabled - 4,0V
+                 ;   Preserve EEPROM - protect non volatile program memory, else clears all saved programs
+                 ;
+                 ; related docs: http://2m5.de/6502_Emu/index.htm
+                 ;
+                 ; description of hardware:
+                 ;   porta0:7  -> address bus high : IO chip select latches
+                 ;   portb0:7  -> address bus low  : IO address & IO R/W : SPI & slave select latch
+                 ;   portc0:7  <> data bus         : I2C bus switch
+                 ;   portd0:1  RS232 monitor & ACIA emulation
+                 ;   portd2    <- ~NMI (INT0) / optional IO-select 3
+                 ;   portd3    <- ~IRQ (INT1) 
+                 ;   portd4    -> ~RD_RAM (/OE at SRAM)
+                 ;   portd5    -> ~WR_RAM (/WE at SRAM)
+                 ;                         /CE tied low at SRAM
+                 ;   portd6    -> IO-select 1
+                 ;   portd7    -> phi2 (OC2) / optional IO-select 2
+                 ;
+                 ;             pullups required for MNI, IRQ, weak pullups for WR_RAM, RD_RAM
+                 ;
+                 ;             optional weak pullups or pulldowns on IO selects and 
+                 ;             IO busses to reset external hardware during high-Z
+                 ;   
+                 ;   timer0    debugger 20ms timer: ctc interrupt
+                 ;             debugger single step: overflow interrupt
+                 ;   timer2    optional 1 MHz phase 2 output on OC2
+                 ;
+                 
+                 ; The following notes apply to the NMOS emulation core:
+                 ;
+                 ;   Emulation is documented instructions only !
+                 ;
+                 ;   Invalid 6502 instructions will cause a halt with message.
+                 ;
+                 ;   Decimal mode emulation will emulate documented behavior only:
+                 ;   a decimal result & carry-flag is valid if both operands were valid BCD
+                 ;
+                 ;   negative, overflow & zero-flags may be altered after a decimal add
+                 ;   or subtract, but have no valid meaning and may not be identical to real
+                 ;   hardware. The result of a decimal operation with non decimal operands
+                 ;   (any nibble >9) may not match the result of a hardware 6502
+                 ;
+                 ; In the CMOS emulation core all instructions are valid and if not defined
+                 ;   otherwise, will be executed as NOP instructions of various length in bytes
+                 ;   and cycles depending on the decode mechanism in the original CMOS core.
+                 ;
+                 ;   A decimal operation with valid decimal numbers will have a valid result
+                 ;   and valid NZC flags. The result and flags of decimal add or subtract with 
+                 ;   invalid BCD operands may not match a real 65C02.
+                 
+                  
+                             .LIST
+                  
+                 
+                 ;****************************
+                 ;
+                 ; C O N F I G U R A T I O N
+                 ;
+                 ;****************************
+                 .set config_part=1
+                 .include "6502_Emu_config.inc"
+                 
+                 
+                 ;*********************************************************************
+                 ;
+                 ; 6502 Emulator Configuration
+                 ;
+                 ; This file should preserve your personal configuration when upgrading
+                 ; the source code.
+                 ;
+                 ;*********************************************************************
+                 .set  config_version = 831
+                 
+                 ;ATMega platform - ATMega16 or ATMega32
+                 ;  ATMega32 may be required due to flash size for configured features 
+                 .IFNDEF   SIGNATURE_000  ;not already defined per default device in Atmel Studio >4
+                    .LIST
+                 .ENDIF
+                 
+                 ;AVR clock speed 
+                 .equ  Osc_Hz            = 16000000    ;16 MHz
+                 
+                 ;external SRAM waittime between applying address and data stable
+                 .set  data_valid_ns     = 180
+                 ;  the time is calculated as follows:
+                 ;    RAM access time + AVR input sync latch (1/2 clock)
+                 ;    + input & output propagation delay (~ 2 * 15ns)
+                 ;    for a 62256-80 on an AVR at 16MHz: 80 + 62,5 / 2 + 15 + 15
+                 ;    only change if RAM is slower than 120ns
+                 ;    in most cases at least 3 waitcycles are used for housekeeping anyway
+                 
+                 ;Baudrate
+                 .equ BAUD  = 38400      ;maximum standard rate with <1% deviation @ 16MHz
+                  
+                 ;RS232 software flow control watermarks, disabled if undefined
+                 ;  the buffer max is 255 bytes
+                 ;  RX only to prevent overruning applications input capacity
+                 .equ flowlo = 128       ;low watermark, send XON if less buffer used
+                 .equ flowhi = 192       ;high watermark, send XOFF if reached
+                 
+                 ;select emulator core CMOS 65C02, NMOS 6502 if undefined
+                 ;.equ cmos_core = 1
+                 
+                 ;interrupt disable mode real, virtual if undefined
+                 ;.equ irq_dis_real = 1
+                 ;  virtual = background interrupts always allowed = always full control,
+                 ;            no atomic timing for disabled instruction sequence.
+                 ;  real    = absolutely no interrupts allowed when disabled except single step and NMI,
+                 ;            program must not have extended disable periods, atomic timing is enforced,
+                 ;            reset button mandatory to recover the monitor/debugger when I bit remains set.
+                 
+                 ;ROM load & write protect page boundary - RAM at this page and above is write protected
+                 ;adds 2 cycles (125ns) to instructions writing to memory (stores & modifying memory)
+                 ;.equ rommap    = 0xc0      
+                 
+                 ;**** IO ****
+                 ;internal IO access page (RS232, Timers, Latches) - disabled if undefined
+                 .equ iomap     = 0xbf
+                 ;   Can be configured overlapping ROM-space if no operand fetch from the same page
+                 ;   is required. Instruction fetch including immediate operands will always be
+                 ;   served from RAM (used as peudo-ROM) - writes and reads of nonimmediate operands
+                 ;   will be to and from IO-space.
+                 ;   setting iomap to page zero is not allowed.
+                 
+                 ; enable phi2 output on portd7, disabled if undefined
+                 ; required to drive 65xx IO chips 
+                 .equ phi2_ena  = 1
+                 
+                 ; enable NMI input on portd2, disabled if undefined
+                 ;.ifndef irq_dis_real
+                    .equ nmi_ena   = 1
+                 ;.endif
+                 
+                 ;**** IO select expansion registers ****
+                 ;define inactive values of IO-select pins on IO-select expansion registers
+                 ;defines the opposite value as strobe polarity for each IO select pin
+                 
+                 .equ  ios1_default = 0b10000001        ;IO select pin 1 expansion default
+                 ;io select bits 10 = -74HC573 input latch
+                 ;               11 = 74HC573 output latch
+                 ;               12 = HD44780 compatible character LCD
+                 ;               13 = 65xx IO
+                 ;               14 = I2C connect (74hc4066)
+                 ;               15 = XMEM select
+                 ;               16 = SPI select
+                 ;               17 = -IO reset
+                 
+                 .ifndef  phi2_ena       ;not available if phi2 uses cbus pin 7
+                 .endif
+                 
+                 .ifndef  nmi_ena        ;not available if NMI uses cbus pin 2
+                 .endif
+                 
+                 ;**** IO select for builtin modules ****
+                 ; enable SPI module and define IO select signal for SPI, disabled if undefined
+                 .equ spi_sel   = 16     ;IO select register 1, pin 6
+                 
+                 ; enable I2C module and define IO select signal for I2C, disabled if undefined
+                 .equ i2c_sel   = 14     ;IO select register 1, pin 4
+                 
+                 ; enable LCD module and define IO select signal for LCD, disabled if undefined
+                 .equ lcd_sel   = 12     ;IO select register 1, pin 2
+                 
+                 ; IO selects of the addon IO modules in part 2 of the configuration
+                 
+                 ;**** SPI software address translation ****
+                 ;translate IO-address to slave select 
+                 ;reset state, must be defined
+                 .equ spi_idle  = 0b11111   ;all slaves inactive
+                 ;.equ spi_idle  = 0xf       ;unused address for hardware translation
+                 ;SS bit 0      = -SD card
+                 ;SS bit 1      = -74HC165 parallel input shifter
+                 ;SS bit 2      = -74HC595 parallel output shifter
+                 ;SS bit 3      = -25LC512 SPI EEPROM 64kB
+                 ;SS bit 4      = -unused
+                 
+                 ;enable spi virtual address translation, disabled if undefined
+                 .equ spi_vat = 1           
+                 
+                 ;oplow BCD to SS pin table
+                 .macro   spi_virt_ss
+                 ;  x0 = SD card on bit0 (-cs) & bit4 (+oe)
+                 ;  x1 = 74HC165 on bit1 (-sh/+ld -oe)
+                    .db 0b00001^spi_idle,0b00010^spi_idle
+                 ;  x2 = 74HC595 on bit2 (+rck)
+                 ;  x3 = 25LC512 EEPROM on bit 3 (-cs)
+                 ;   .db 0b00100^spi_idle,0b01000^spi_idle
+                    .db 0b00100^spi_idle,spi_idle ;EEPROM masked
+                 ;  x4 unused
+                 ;  x5 inactive
+                    .db 0b10000^spi_idle,spi_idle
+                 ;  x6 inactive
+                 ;  x7 inactive
+                    .db spi_idle,spi_idle
+                 .endmacro
+                 
+                 ;**** IO resets ****
+                 ;a reset pin can be defined and must reside on an IO-select expansion register
+                 ;this pin is strobed low during reset if defined
+                 .equ  io_reset_pin = 17
+                 
+                 ;definition for io modules with a reset vector
+                 .macro   io_modules_reset 
+                    rcall ltch_rs        ;reset 74HC573
+                 .endmacro
+                 
+                 ;**** miscelaneous ****
+                 ;64kB serial EEPROM reserved for non volatile program storage
+                 ;eep_adr >= 8 = I2C slave adr.; eep_adr < 8 = SPI device adr.
+                 ;none if undefined
+                 ;.equ  eep_adr = 0xa0       ;I2C EEPROM
+                 .equ  eep_adr = 3          ;SPI EEPROM
+                 
+                 ; self diag register enable, allow force IRQ, NMI, RESET
+                 ; should stay undefined to prevent you from shooting yourself in the foot
+                 .equ ena_diag  = 1
+                 
+                 .endif
+                 .if config_part == 2 ;invoked from 6502_Emu_IO.inc
+                 .if (pc & 0xf)
+                 .endif
+                 .ifdef spi_vat
+                 .endif
+                 .endif
+                 
+                 ;configuration based clock constants
+                 .equ  cycle_time_tns    = (10000000000 / Osc_Hz) ;1/10 ns cpu clock duration
+                 .equ  ten_ms            = ((Osc_Hz - 51200) / 102400) ;10ms OCR0 value rounded
+                 
+                 ;configuration based baudrate constants and error checking
+                 .equ UBRR_value = ((Osc_Hz + Baud * 8) / (Baud * 16) - 1)  ; rounded
+                 .equ Baud_error = ((1000 * Osc_Hz / (16 * (UBRR_value + 1)) / Baud) - 1000) ;0/00 deviation
+                 .if ((Baud_error > 10) || (Baud_error < -10)) ; +/-10 0/00 acceptable
+                 .endif
+                 
+                 ;configuration based serial EEPROM constants
+                 .ifdef eep_adr
+                    .if eep_adr < 8
+                       .ifdef spi_sel
+                          .ifdef spi_vat
+                             .equ spi_eep_adr = spi_idle^(1<<eep_adr)
+                          .else
+                          .endif
+                          .equ eep_vld = 1
+                       .endif
+                    .else
+                       .ifdef i2c_sel
+                       .endif
+                    .endif
+                 .endif
+                 
+                 ; reserved registers
+                 ;
+                 ; (I): used during interrupt, (C): interrupt to program communication
+                 ; (E): Register of the emulated CPU
+                 ; (D)  used by the debug monitor - must be preserved except Z (Z is saved
+                 ;      before main is called)
+                 ;
+                 ; 
+                 ; 0x00 non immediate
+                 .DEF  c           =r0         ; GPR3
+                 .DEF  d           =r1         ; GPR4
+                 .DEF  e           =r2         ; GPR5
+                 .DEF  f           =r3         ; GPR6
+                 ; 0x04
+                 .DEF  k           =r4         ; (I) GPR2 during interrupt
+                 .DEF  allon       =r5         ; const 0xff
+                 .DEF  one         =r6         ; const 1
+                 .DEF  zero        =r7         ; const 0
+                 ; 0x08
+                 .DEF  regx        =r8         ; (E) index X
+                 .DEF  regy        =r9         ; (E) index Y
+                 .DEF  operand     =r10        ; memory operand
+                 .DEF  spointer    =r11        ; (E) stack pointer
+                 ; 0x0c
+                 .DEF  clear       =r12        ; precharged cbus clear
+                 .DEF  readmem     =r13        ; precharged cbus read memory
+                 .DEF  writemem    =r14        ; precharged cbus write memory
+                 .DEF  s           =r15        ; (I) SREG save during interrupt
+                 ; 0x10 immediate
+                 .DEF  a           =r16        ; immediate GPR
+                 .DEF  b           =r17        ; immediate GPR2
+                 .DEF  i           =r18        ; (I) immediate GPR during interrupt
+                 .DEF  flags       =r19        ; (D) flags 
+                 .equ  deb_on  = 0             ;     debugger running if set, else stopped
+                                               ;     acia emulation disconnected if set
+                 .equ  emu_run = 1             ;     emulator running if set, else stopped
+                 .equ  deb_act = 2             ;     deb instance started if set - locks T0 cmp start
+                 .equ  rvs_vid = 3             ;     reverse video if set, else normal video
+                 .equ  op_ind  = 4             ;     operand indirect if set, operand direct if cleared
+                                               ;     needed for instruction retry in IO emulation (register busy) 
+                 .equ  modify  = 5             ;     extended memory address locked until rewrite
+                 .equ  string  = 6             ;     allow lower case input for string
+                 .equ  dma_rpt = 7             ;     DMA interrrupt modifier
+                 ; 0x14
+                 .DEF  unused_r20  =r20        ; unused
+                 .DEF  rega        =r21        ; (E) accumulator
+                 .DEF  stat2       =r22        ; (E) processor flags 6502 only 0V1BDI00
+                 .DEF  stat        =r23        ; (E) processor flags AVR compatible (ITHSV)NZC
+                 ; 0x18 immediate word
+                 .DEF  pcl         =r24        ; (E) program counter low
+                 .DEF  pch         =r25        ; (E) program counter high
+                 ;     x                       ; word GPR / (I) buffer index (rx/tx)
+                 ; 0x1c
+                 ;     y                       ; operand address, (D) buffer index
+                 #define     oplow       yl
+                 #define     ophigh      yh
+                 #define     opointer    y
+                 ;     z                       ; instruction decode
+                 #define     opcode      zl
+                 #define     oc_tabh     zh    ; restore when used as index
+                 #define     oc_vector   z
+                 
+                 ;
+                 ; internal EEPROM usage
+                 ;
+                 .ESEG
+                 .ifdef   eep_adr
+                    ;non volatile program storage control structure for external I2C EEPROM
+                    .org  1
+000001              eep_string: .byte 50          ;string to send to program on autoload
+                                                  ;0xff marks end
+                    .org  0xff
+0000ff              eep_auto:   .byte 1           ;autoload program number, 0xff = none
+000100              eep_pat:    .byte 256         ;program allocation table, 0xff = slot free
+                                                  ;0x00 - 0xfe = program number in slot
+                 .endif
+                 
+                 .macro      align             ;align to (1<<@0)
+                 alignfromhere:
+                       .if (alignfromhere & ((1<<@0)-1))   ;if not already aligned
+                          .org  (alignfromhere & (0xffff<<@0)) + (1<<@0)
+                       .endif
+                 .endmacro
+                 ;
+                 ; SRAM usage
+                 ;
+                 .DSEG
+                 ;(D) command line buffer
+000060           cmd_buf:    .byte 48          ;48 character command line buffer
+000090           cmd_end:    .byte 1           ;+1 for end of string marker
+000091           cmd_inx:    .byte 1           ;input index to cmd_buf
+                 cmd_esc_timer:                ;10ms increments to discard esc sequence
+000092                       .byte 1           ;bit 7 = 0:true escape, 1:discarded esc seq
+                 cmd_reg_timer:                ;timer to refresh register display
+000093                       .byte 1
+                 lmem_display:
+000094                       .byte 2           ;last memory block displayed
+000096           lmem_write: .byte 2           ;last memory address written +1
+000098           lmem_disas: .byte 2           ;last memory address disassembled +1
+00009a           sp_save:    .byte 2           ;saved sp for mainloop to allow subs to exit
+00009c           adr_limit:  .byte 2           ;maximum address +1 accepted in deb_adr
+00009e           rstflag:    .byte 1           ;reset flags from mcucsr
+00009f           prog_num:   .byte 1           ;program number for EEP save/load, 0xff if closed
+0000a0           brkpt_lo:   .byte 10          ;breakpoint address low
+0000aa           brkpt_hi:   .byte 10          ;breakpoint address high
+0000b4           brkpt_op:   .byte 10          ;breakpoint original opcode
+                 ;I/O emulation
+                 ;global
+0000be           irq_mask:   .byte 1           ;interrupt mask, bit set if enabled, default 0b00000001
+                                               ;bit 7=tx empty, 6=rx full, 0=10ms tick,
+0000bf           irq_flag:   .byte 1           ;interrupt flags, bit set if pending
+                                               ;bit 7=tx empty, 6=rx full, 0=10ms tick
+                 ;timer 1
+0000c0           timer_ena:  .byte 1           ;t0 & t1 interrupt enable bits
+0000c1           t1_adr:     .byte 1           ;index to t1 register
+0000c2           t1_ctrl:    .byte 1           ;readback value of TCCR1
+                 ;tick (10ms) countdown timer
+0000c3           tcdn_count: .byte 1           ;countdown to flag/interrupt
+0000c4           tcdn_top:   .byte 1           ;reload value at bottom
+                 ;diagnostic
+0000c5           selftest:   .byte 1           ;selftest register, force bits 2=reset, 1=NMI, 0=IRQ
+                 ;I2C
+                 i2c_statreg:
+0000c6                       .byte 1           ;status, bit 7=interrupt, 6=ack, 5=stuck, 4=set EEP 
+                                               ;3=read ack pending, 2=speed 400kHz, 1=start, 0=stop  
+                 ;LCD
+0000c7           lcd_flags:  .byte 1           ;0xff=usable, 0=busy timeout
+                 
+                 ;SPI
+0000c8           spi_cmd:    .byte 1           ;save for slave select hold
+0000c9           spi_rdat:   .byte 1           ;data in SPI shifter after last write
+                 
+                 ;DMA
+                 dma_last_cmd:
+0000ca                       .byte 1           ;command in progress | last successful command + 0x10
+                                               ;| 0xff= can't continue
+                 dma_tab_index:
+0000cb                       .byte 1           ;index to block transfer table, 0xff if trashed
+                 ;dma block transfer table:
+                 ;        SPI            I2C            EEPROM
+                 ;  byte  slave address  -don't care-   program number
+                 ;  word  start address  start address  start address
+                 ;  word  byte count     byte count     end address
+                 ;  word  temp count     temp count     -don't care-  
+0000cc           dma_tab:    .byte 7
+                 
+                 ;RS232 Buffers
+0000d3           usart_ena:  .byte 1           ;usart interrupt enable bits
+0000d4           tx_inx:     .byte 1           ;input index to tx fifo
+0000d5           tx_fill:    .byte 1           ;fill level in tx fifo (0 = empty)
+0000d6           rx_inx:     .byte 1           ;input index to rx fifo
+0000d7           rx_fill:    .byte 1           ;fill level in rx fifo (0 = empty)
+0000d8           flow_cmd:   .byte 1           ;XON/XOFF - bit 7: 1=done, 0=pending
+                             align 8           ;buffers on page boundary
+000100           tx_buf:     .byte 256         ;transmit fifo
+000200           rx_buf:     .byte 256         ;receive fifo
+                 
+                 
+                 ; end of SRAM
+                 
+                 .CSEG
+                 ;
+                 ; Definition of Hardware
+                 ;
+                 ; Address Bus
+                 .EQU  abuslo      = portb
+                 .EQU  aloddr      = ddrb
+                 .EQU  abushi      = porta
+                 .EQU  ahiddr      = ddra
+                 ; Data Bus
+                 .EQU  dbusin      = pinc
+                 .EQU  dbusout     = portc
+                 .EQU  dbusddr     = ddrc
+                 ; Control Bus
+                 .EQU  cbusin      = pind
+                 .EQU  cbus        = portd
+                 .EQU  cbusddr     = ddrd
+                 ; External Interrupts
+                 .EQU  ibus        = gicr
+                 .ifdef   nmi_ena
+                    .EQU  IRQ_ena     = 0b11000000   ;enable IRQ
+                    .EQU  IRQ_dis     = 0b01000000   ;disable IRQ
+                 .else
+                 .endif
+                 .EQU  NMI_dis     = 0   ;disable both during monitor
+                 ; USART
+                 .EQU  usart_txi_dis  = 0b10011000   ;RXCIE, RXEN, TXEN
+                 .EQU  usart_txi_ena  = 0b10111000   ;RXCIE, UDRIE, RXEN, TXEN
+                 
+                 .macro      addi
+                             subi  @0,-@1            ;subtract the negative of an immediate value
+                 .endmacro
+                 .macro      addiw ;(RdL:RdH, k)
+                             subi  @0l,low(-@1)      ;word subtract the negative of an immediate value  
+                             sbci  @0h,high(-@1)
+                 .endmacro 
+                 
+                 ;
+                 ; wait_ns  waittime in ns , cyles already used 
+                 ;
+                 ;     cycles already used will be subtracted from the delay
+                 ;     the waittime resolution is 1 cycle (delay from exact to +1 cycle)
+                 ;     the maximum delay at 20MHz (50ns/clock) is 750ns
+                 ;
+                 .macro      wait_ns
+                       .set cycles = ((@0 * 10 + cycle_time_tns - 1) / cycle_time_tns - @1)
+                       .if (cycles > 15)
+                         .error "MACRO wait_ns - too many cycles to burn"
+                       .else
+                         .if (cycles > 0)
+                           .if   (cycles & 8)
+                             rjmp  pc+1
+                             rjmp  pc+1
+                             rjmp  pc+1
+                             rjmp  pc+1
+                           .endif
+                           .if   (cycles & 4)
+                             rjmp  pc+1
+                             rjmp  pc+1
+                           .endif
+                           .if   (cycles & 2)
+                             rjmp  pc+1
+                           .endif
+                           .if   (cycles & 1)
+                             nop
+                           .endif
+                         .endif
+                       .endif
+                 .endmacro
+                 ; wait_data_valid  cycles already used
+                 #define     wait_data_valid   wait_ns data_valid_ns,
+                 
+                 ; print string - debugger
+                 .macro   PrintStr ;@0 = message pointer
+                    ldi   zl,low(@0*2)
+                    ldi   zh,high(@0*2)
+                    rcall prtstr
+                 .endmacro
+                 .macro   PrintStr_far ;@0 = message pointer
+                    ldi   zl,low(@0*2)
+                    ldi   zh,high(@0*2)
+                    call  prtstr
+                 .endmacro
+                 
+                 
+                 ;*****************************************************************
+                 ;
+                 ; reset and interrupt vectors according to µc type
+                 ;
+                 ;*****************************************************************
+                 
+                 #ifdef _M16DEF_INC_
+                 #endif
+                 #ifdef _M32DEF_INC_
+000000 940c 1582    jmp   reset       ; Reset handler
+000002 c364         rjmp  NMI         ; INT0 handler
+000003 0000         nop
+000004 c322         rjmp  IRQ         ; INT1 handler
+000005 0000         nop
+000006 940c 14fe    jmp   illegalint  ; INT2 handler
+000008 940c 14fe    jmp   illegalint  ; Timer2 compare match
+00000a 940c 14fe    jmp   illegalint  ; Timer2 overflow
+                    .ifdef iomap
+00000c 940c 0dbe       jmp   t1_icr      ; Timer1 capture event
+00000e 940c 0db0       jmp   t1_ocra     ; Timer1 compare match A 
+000010 940c 0db7       jmp   t1_ocrb     ; Timer1 compare match B
+000012 940c 0da9       jmp   t1_ovi      ; Timer1 overflow handler
+                    .else
+                    .endif
+000014 940c 1502    jmp   t0_cmi      ; Timer0 compare match - debugger 10ms timer
+000016 940c 1544    jmp   t0_ovi      ; Timer0 overflow handler - debugger single step
+000018 940c 14fe    jmp   illegalint  ; SPI - Serial transfer complete
+00001a c00f         rjmp  rx_int      ; USART - RX complete
+00001b 0000         nop
+00001c c055         rjmp  tx_udre     ; USART - data register empty
+00001d 0000         nop
+00001e 940c 14fe    jmp   illegalint  ; USART - TX complete
+000020 940c 14fe    jmp   illegalint  ; ADC conversion complete
+000022 940c 14fe    jmp   illegalint  ; EEPROM ready
+000024 940c 14fe    jmp   illegalint  ; Analog comparator
+000026 940c 14fe    jmp   illegalint  ; TWI serial interface
+000028 940c 14fe    jmp   illegalint  ; SPM ready
+                 #endif
+                 .if pc < 0x2a
+                 .endif
+                 
+                 ;*****************************************************************
+                 ;
+                 ; RS232 buffer
+                 ;
+                 ;*****************************************************************
+                 ;
+                 ; RX complete interrupt - rx fifo input
+                 ;
+                 rx_int:
+00002a b6ff         in    s,sreg
+00002b 93af         push  xl
+00002c 93bf         push  xh
+00002d b04b         in    k,ucsra
+00002e b12c         in    i,udr
+00002f fe44         sbrs  k,fe              ;no stop bit = possible break
+000030 c019         ifs_and  rx_break
+000031 3020         cpi   i,0               ;break should have all bits 0
+000032 f4b9         ifeq     rx_break
+000033 6031            sbr   flags,(1<<deb_on) ;turn debugging on
+000034 7f3d            cbr   flags,(1<<emu_run) ;stop emulation
+000035 9120 00bf       lds   i,irq_flag        ;clear ACIA TDRE & RDRF
+000037 732f            cbr   i,0b11000000
+000038 9320 00bf       sts   irq_flag,i
+00003a 9040 00be       lds   k,irq_mask        ;other interrupts pending & enabled?
+00003c 2124            and   i,k
+00003d f409            ifeq  rx_break_irq
+00003e 988b               cbi   cbusddr,3         ;clear any pending acia interrupts
+                       end   rx_break_irq
+00003f 9270 00d7       sts   rx_fill,zero      ;clear buffer
+000041 9270 00d5       sts   tx_fill,zero
+                       do    rx_brk_wait
+000043 9b80               sbis  pind,0            ;exit after RX pin returns to idle
+000044 cffe            loop  rx_brk_wait
+000045 930f            push  a
+000046 940e 197f       call crlf
+000048 910f            pop   a
+000049 e12b            ldi   i,27              ;force escape
+                    end      rx_break
+00004a 9040 00d7    lds   k,rx_fill         ;check buffer full
+00004c 9443         inc   k
+00004d f041         ifne  rx_no_overrun
+00004e e0b2            ldi   xh,high(rx_buf)   ;load buffer index
+00004f 91a0 00d6       lds   xl,rx_inx
+000051 932d            st    x+,i              ;store data
+000052 93a0 00d6       sts   rx_inx,xl         ;store pointers
+000054 9240 00d7       sts   rx_fill,k
+                    end   rx_no_overrun
+                    .ifdef flowlo
+000056 2d24            mov   i,k
+000057 3c20            cpi   i,flowhi          ;buffer upper watermark?
+000058 f048            ifsh  rx_flow
+000059 9120 00d8          lds   i,flow_cmd
+00005b 3923               cpi   i,0x93         ;xoff done?
+00005c f029               ifne  rx_send_xoff
+00005d e123                  ldi   i,0x13         ;post xoff pending
+00005e 9320 00d8             sts   flow_cmd,i
+000060 eb28                   ldi   i,usart_txi_ena  ;notify transmitter
+000061 b92a                  out   ucsrb,i
+                             .ifdef irq_dis_real
+                             .endif
+                          end   rx_send_xoff
+                       end   rx_flow
+                    .endif
+                    .ifdef iomap                  ;acia emulation
+000062 fd30            sbrc  flags,deb_on         ;acia connected?
+000063 c00a            ifs   rx_acia_on
+000064 9120 00be          lds   i,irq_mask        ;check acia RDRF IRQ enabled
+000066 7420               andi  i,0b01000000
+000067 f009               ifne  rx_int_ena
+000068 9a8b                  sbi   cbusddr,3      ;set IRQ
+                          end   rx_int_ena
+000069 9120 00bf          lds   i,irq_flag
+00006b 6420               sbr   i,0b01000000   ;set RDRF 
+00006c 9320 00bf          sts   irq_flag,i        ;store status
+                       end   rx_acia_on       
+                    .endif
+00006e 91bf         pop   xh
+00006f 91af         pop   xl
+000070 beff         out   sreg,s
+000071 9518         reti
+                 
+                 ;
+                 ; RS232 transmit register empty interrupt, tx fifo output
+                 ;
+                 tx_udre:
+000072 b6ff         in    s,sreg
+000073 93af         push  xl
+000074 93bf         push  xh
+000075 9040 00d5    lds   k,tx_fill         ;no more bytes available?
+                    .ifdef flowlo
+000077 9120 00d8       lds   i,flow_cmd        ;do flowcontrol
+000079 2322            tst   i                 ;already sent?
+00007a f032            ifpl  tx_flow
+00007b b92c               out   udr,i             ;send xon/xoff
+00007c 6820               ori   i,0x80            ;mark sent
+00007d 9320 00d8          sts   flow_cmd,i
+00007f 2044               tst   k
+000080 c007            else  tx_flow
+000081 e0b1               ldi   xh,high(tx_buf)   ;send data
+000082 91a0 00d4          lds   xl,tx_inx         ;calc output index
+000084 19a4               sub   xl,k
+000085 912c               ld    i,x               ;load from fifo head
+000086 b92c               out   udr,i
+000087 944a               dec   k                 ;update pointer
+                       end   tx_flow
+                    .else
+                    .endif
+000088 f411         ifeq  tx_fifo_empty
+000089 e928            ldi   i,usart_txi_dis   ;tx buffer empty - stop rupt
+00008a b92a            out   ucsrb,i
+                       .ifdef irq_dis_real
+                       .endif
+                    end   tx_fifo_empty
+00008b 9240 00d5    sts   tx_fill,k
+                    .ifdef iomap                  ;acia emulation
+00008d fd30            sbrc  flags,deb_on         ;acia connected?
+00008e c00a            ifs   tx_acia_on
+00008f 9120 00be          lds   i,irq_mask        ;check TDRE IRQ enabled
+000091 7820               andi  i,0b10000000
+000092 f009               ifne  tx_int_ena
+000093 9a8b                  sbi   cbusddr,3      ;set IRQ
+                          end   tx_int_ena
+000094 9120 00bf          lds   i,irq_flag
+000096 6820               sbr   i,0b10000000   ;set TDRE
+000097 9320 00bf          sts   irq_flag,i     ;store status
+                       end   tx_acia_on       
+                    .endif
+000099 91bf         pop   xh
+00009a 91af         pop   xl
+00009b beff         out   sreg,s
+00009c 9518         reti
+                 
+                 ; Messages part 1 (optimizing empty space before opcode table for CMOS)
+                 ; some words available if rx/tx maximum size and DMA (16 more for NMOS)
+                 ;                              word count, X = don't use in part 1 ---> ;##
+                 ;.ifdef cmos_core
+                 ;stp_instr:     .db   "STP - Emulator halted",0                          ; X
+                 ;.else
+                 ;inv_instr:     .db   "Illegal Opcode ",0                                ; X
+                 ;.endif
+                 ;emu_msg:       .db   13,10,13,10,core_string," Emulator V",version,0    ; X
+                 ;built_msg:     .db   " built ",__DATE__," ",__TIME__,0                  ;14
+00009d 0a0d
+00009e 6f4c
+00009f 6461
+0000a0 6e69
+0000a1 2c67
+0000a2 3c20
+0000a3 5345
+0000a4 3e43
+0000a5 7420
+0000a6 206f
+0000a7 6261
+0000a8 726f
+0000a9 0d74
+0000aa 000a      load_wait:     .db   13,10,"Loading, <ESC> to abort",13,10,0            ;14
+0000ab 4c20
+0000ac 616f
+0000ad 2064
+0000ae 6261
+0000af 726f
+0000b0 6574
+0000b1 0064      load_abort:    .db   " Load aborted",0                                  ; 7
+                 ;err_chksum:    .db   " Checksum failed",0,0                             ; 9
+0000b2 0a0d
+0000b3 6843
+0000b4 6365
+0000b5 206b
+0000b6 6572
+0000b7 6573
+0000b8 2074
+0000b9 6576
+0000ba 7463
+0000bb 726f
+0000bc 0000      rs_vect_empty: .db   13,10,"Check reset vector",0,0                     ;11
+0000bd 2020
+0000be 6552
+0000bf 6573
+0000c0 0074      reset_msg:     .db   "  Reset",0                                        ; 4
+0000c1 0d0a
+0000c2 6c41
+0000c3 206c
+0000c4 7262
+0000c5 6165
+0000c6 706b
+0000c7 696f
+0000c8 746e
+0000c9 2073
+0000ca 6c63
+0000cb 6165
+0000cc 6572
+0000cd 0064      bpt_clrd_msg:  .db   10,13,"All breakpoints cleared",0                  ;13
+0000ce 0d0a
+0000cf 7242
+0000d0 6165
+0000d1 706b
+0000d2 696f
+0000d3 746e
+0000d4 2073
+0000d5 2820
+0000d6 6c73
+0000d7 746f
+0000d8 3a23
+0000d9 6461
+0000da 7264
+0000db 7365
+0000dc 2973
+0000dd 0a0d
+0000de 0000      bpt_info:      .db   10,13,"Breakpoints  (slot#:address)",13,10,0,0     ;17
+                 ;bpt_info_none: .db   10,13,"No breakpoints active",0                    ;12
+0000df 0d0a
+0000e0 6f4e
+0000e1 6d20
+0000e2 726f
+0000e3 2065
+0000e4 7262
+0000e5 6165
+0000e6 706b
+0000e7 696f
+0000e8 746e
+0000e9 7320
+0000ea 6f6c
+0000eb 7374
+0000ec 6120
+0000ed 6176
+0000ee 6c69
+0000ef 6261
+0000f0 656c
+0000f1 0000      bpt_slot_full: .db   10,13,"No more breakpoint slots available",0,0     ;19
+                 .ifndef irq_dis_real       ;+53 words available (6 less for NMOS)
+0000f2 4c0d
+0000f3 616f
+0000f4 2064
+0000f5 4b4f
+0000f6 0000      load_ok:       .db   13,"Load OK",0,0                                   ; 5
+0000f7 4e20
+0000f8 6e6f
+0000f9 482d
+0000fa 7865
+0000fb 6420
+0000fc 7461
+0000fd 2061
+0000fe 6e69
+0000ff 7220
+000100 6365
+000101 726f
+000102 0064      err_nonhex:    .db   " Non-Hex data in record",0                        ;12
+000103 4920
+000104 766e
+000105 6c61
+000106 6469
+000107 6620
+000108 6e75
+000109 7463
+00010a 6f69
+00010b 206e
+00010c 726f
+00010d 6320
+00010e 756f
+00010f 746e
+000110 6920
+000111 206e
+000112 6572
+000113 6f63
+000114 6472
+000115 0000      err_func:      .db   " Invalid function or count in record",0,0         ;19
+000116 0a0d
+000117 5641
+000118 2052
+000119 6c49
+00011a 656c
+00011b 6167
+00011c 206c
+00011d 6e49
+00011e 6574
+00011f 7272
+000120 7075
+000121 0074      illegal_int:   .db   13,10,"AVR Illegal Interrupt",0                    ;12
+000122 1b0d
+000123 4b5b
+000124 5b1b
+000125 4131
+000126 0000      back_line:     .db   13,27,91,"K",27,91,"1A",0,0                        ; 5
+                 .endif
+                 
+                 ;**************************************************
+                 ;
+                 ; 6502 emulation core
+                 ;
+                 ;**************************************************
+                       .ifdef cmos_core
+                       .else
+                          .include "6502_Emu_NMOS.inc"
+                 
+                 ; 6502 EMULATOR include
+                 ;
+                 ;     N M O S   c o r e
+                 ;
+                 ; Copyright (C) 2013-2014  Klaus Dormann
+                 ;
+                 ; This program is free software: you can redistribute it and/or modify
+                 ; it under the terms of the GNU General Public License as published by
+                 ; the Free Software Foundation, either version 3 of the License, or
+                 ; (at your option) any later version.
+                 ;
+                 ; This program is distributed in the hope that it will be useful,
+                 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
+                 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+                 ; GNU General Public License for more details.
+                 ;
+                 ; You should have received a copy of the GNU General Public License
+                 ; along with this program.  If not, see <http://www.gnu.org/licenses/>.
+                 ;
+                 ;
+                 .set  core_version = 831
+                 #define core_string "N6502" ;identify NMOS core in version message
+                 
+                 ;*****************************************************************
+                 ;
+                 ; 6502 emulation disassembly table
+                 ;
+                 ;*****************************************************************
+                 ;addressing modes
+                 .equ  op_nv    = 0b0000111 ;invalid
+                 .equ  op_s     = 0b0000000 ;single (implied) - TAX
+                 .equ  op_a     = 0b0010000 ;absolute - LDA abs
+                 .equ  op_x     = 0b0010001 ;absolute indexed X - LDA abs,x
+                 .equ  op_y     = 0b0010010 ;absolute indexed Y - LDA abs,y
+                 .equ  op_i     = 0b1010011 ;absolute indirect - JMP (abs)
+                 .equ  op_m     = 0b0101000 ;immediate - LDA #
+                 .equ  op_r     = 0b0011000 ;relative to PC - BEQ rel
+                 .equ  op_z     = 0b0001000 ;zero page - LDA zp
+                 .equ  op_zxi   = 0b1001100 ;zero page indexed X indirect LDA (zp,x)
+                 .equ  op_zx    = 0b0001001 ;zero page indexed X - LDA zp,x
+                 .equ  op_zy    = 0b0001010 ;zero page indexed Y - LDA zp,y
+                 .equ  op_ziy   = 0b1001101 ;zero page indidrect indexed Y - LDA (zp),y
+                 .equ  op_sa    = 0b0000110 ;single accumulator - ASL A
+                 ;                0b00_____  no prefix
+                 ;                0b01_____  # - immediate
+                 ;                0b10_____  ( - opening indirect
+                 ;                0b__00___  no data - implied
+                 ;                0b__01___  1 Byte - zero page or immediate
+                 ;                0b__10___  2 Bytes - absolute
+                 ;                0b__11___  1 Byte relative - calculated absolute
+                 ;                0b____000  no suffix
+                 ;                0b____001  ,X - indexed X
+                 ;                0b____010  ,Y - indexed Y
+                 ;                0b____011  ) - closing indirect
+                 ;                0b____100  ,X) - indexed X indirect
+                 ;                0b____101  ),Y - indirect indexed Y
+                 ;                0b____110  A - implied accumulator
+                 ;                0b____111  Invalid Instruction
+                 
+000127 5242
+000128 004b      dis_opcode: .db   "BRK",op_s
+000129 524f
+00012a 4c41                  .db   "ORA",op_zxi
+00012b 303f
+00012c 0732                  .db   "?02",op_nv
+00012d 303f
+00012e 0733                  .db   "?03",op_nv
+00012f 303f
+000130 0734                  .db   "?04",op_nv
+000131 524f
+000132 0841                  .db   "ORA",op_z
+000133 5341
+000134 084c                  .db   "ASL",op_z
+000135 303f
+000136 0737                  .db   "?07",op_nv
+000137 4850
+000138 0050                  .db   "PHP",op_s
+000139 524f
+00013a 2841                  .db   "ORA",op_m
+00013b 5341
+00013c 064c                  .db   "ASL",op_sa
+00013d 303f
+00013e 0742                  .db   "?0B",op_nv
+00013f 303f
+000140 0743                  .db   "?0C",op_nv
+000141 524f
+000142 1041                  .db   "ORA",op_a
+000143 5341
+000144 104c                  .db   "ASL",op_a
+000145 303f
+000146 0746                  .db   "?0F",op_nv
+                 
+000147 5042
+000148 184c                  .db   "BPL",op_r
+000149 524f
+00014a 4d41                  .db   "ORA",op_ziy
+00014b 313f
+00014c 0732                  .db   "?12",op_nv
+00014d 313f
+00014e 0733                  .db   "?13",op_nv
+00014f 313f
+000150 0734                  .db   "?14",op_nv
+000151 524f
+000152 0941                  .db   "ORA",op_zx
+000153 5341
+000154 094c                  .db   "ASL",op_zx
+000155 313f
+000156 0737                  .db   "?17",op_nv
+000157 4c43
+000158 0043                  .db   "CLC",op_s
+000159 524f
+00015a 1241                  .db   "ORA",op_y
+00015b 313f
+00015c 0741                  .db   "?1A",op_nv
+00015d 313f
+00015e 0742                  .db   "?1B",op_nv
+00015f 313f
+000160 0743                  .db   "?1C",op_nv
+000161 524f
+000162 1141                  .db   "ORA",op_x
+000163 5341
+000164 114c                  .db   "ASL",op_x
+000165 313f
+000166 0746                  .db   "?1F",op_nv
+                 
+000167 534a
+000168 1052                  .db   "JSR",op_a
+000169 4e41
+00016a 4c44                  .db   "AND",op_zxi
+00016b 323f
+00016c 0732                  .db   "?22",op_nv
+00016d 323f
+00016e 0733                  .db   "?23",op_nv
+00016f 4942
+000170 0854                  .db   "BIT",op_z
+000171 4e41
+000172 0844                  .db   "AND",op_z
+000173 4f52
+000174 084c                  .db   "ROL",op_z
+000175 323f
+000176 0737                  .db   "?27",op_nv
+000177 4c50
+000178 0050                  .db   "PLP",op_s
+000179 4e41
+00017a 2844                  .db   "AND",op_m
+00017b 4f52
+00017c 064c                  .db   "ROL",op_sa
+00017d 323f
+00017e 0742                  .db   "?2B",op_nv
+00017f 4942
+000180 1054                  .db   "BIT",op_a
+000181 4e41
+000182 1044                  .db   "AND",op_a
+000183 4f52
+000184 104c                  .db   "ROL",op_a
+000185 323f
+000186 0746                  .db   "?2F",op_nv
+                 
+000187 4d42
+000188 1849                  .db   "BMI",op_r
+000189 4e41
+00018a 4d44                  .db   "AND",op_ziy
+00018b 333f
+00018c 0732                  .db   "?32",op_nv
+00018d 333f
+00018e 0733                  .db   "?33",op_nv
+00018f 333f
+000190 0734                  .db   "?34",op_nv
+000191 4e41
+000192 0944                  .db   "AND",op_zx
+000193 4f52
+000194 094c                  .db   "ROL",op_zx
+000195 333f
+000196 0737                  .db   "?37",op_nv
+000197 4553
+000198 0043                  .db   "SEC",op_s
+000199 4e41
+00019a 1244                  .db   "AND",op_y
+00019b 333f
+00019c 0741                  .db   "?3A",op_nv
+00019d 333f
+00019e 0742                  .db   "?3B",op_nv
+00019f 333f
+0001a0 0743                  .db   "?3C",op_nv
+0001a1 4e41
+0001a2 1144                  .db   "AND",op_x
+0001a3 4f52
+0001a4 114c                  .db   "ROL",op_x
+0001a5 333f
+0001a6 0746                  .db   "?3F",op_nv
+                 
+0001a7 5452
+0001a8 0049                  .db   "RTI",op_s
+0001a9 4f45
+0001aa 4c52                  .db   "EOR",op_zxi
+0001ab 343f
+0001ac 0732                  .db   "?42",op_nv
+0001ad 343f
+0001ae 0733                  .db   "?43",op_nv
+0001af 343f
+0001b0 0734                  .db   "?44",op_nv
+0001b1 4f45
+0001b2 0852                  .db   "EOR",op_z
+0001b3 534c
+0001b4 0852                  .db   "LSR",op_z
+0001b5 343f
+0001b6 0737                  .db   "?47",op_nv
+0001b7 4850
+0001b8 0041                  .db   "PHA",op_s
+0001b9 4f45
+0001ba 2852                  .db   "EOR",op_m
+0001bb 534c
+0001bc 0652                  .db   "LSR",op_sa
+0001bd 343f
+0001be 0742                  .db   "?4B",op_nv
+0001bf 4d4a
+0001c0 1050                  .db   "JMP",op_a
+0001c1 4f45
+0001c2 1052                  .db   "EOR",op_a
+0001c3 534c
+0001c4 1052                  .db   "LSR",op_a
+0001c5 343f
+0001c6 0746                  .db   "?4F",op_nv
+                 
+0001c7 5642
+0001c8 1843                  .db   "BVC",op_r
+0001c9 4f45
+0001ca 4d52                  .db   "EOR",op_ziy
+0001cb 353f
+0001cc 0732                  .db   "?52",op_nv
+0001cd 353f
+0001ce 0733                  .db   "?53",op_nv
+0001cf 353f
+0001d0 0734                  .db   "?54",op_nv
+0001d1 4f45
+0001d2 0952                  .db   "EOR",op_zx
+0001d3 534c
+0001d4 0952                  .db   "LSR",op_zx
+0001d5 353f
+0001d6 0737                  .db   "?57",op_nv
+0001d7 4c43
+0001d8 0049                  .db   "CLI",op_s
+0001d9 4f45
+0001da 1252                  .db   "EOR",op_y
+0001db 353f
+0001dc 0741                  .db   "?5A",op_nv
+0001dd 353f
+0001de 0742                  .db   "?5B",op_nv
+0001df 353f
+0001e0 0743                  .db   "?5C",op_nv
+0001e1 4f45
+0001e2 1152                  .db   "EOR",op_x
+0001e3 534c
+0001e4 1152                  .db   "LSR",op_x
+0001e5 353f
+0001e6 0746                  .db   "?5F",op_nv
+                 
+0001e7 5452
+0001e8 0053                  .db   "RTS",op_s
+0001e9 4441
+0001ea 4c43                  .db   "ADC",op_zxi
+0001eb 363f
+0001ec 0732                  .db   "?62",op_nv
+0001ed 363f
+0001ee 0733                  .db   "?63",op_nv
+0001ef 363f
+0001f0 0734                  .db   "?64",op_nv
+0001f1 4441
+0001f2 0843                  .db   "ADC",op_z
+0001f3 4f52
+0001f4 0852                  .db   "ROR",op_z
+0001f5 363f
+0001f6 0737                  .db   "?67",op_nv
+0001f7 4c50
+0001f8 0041                  .db   "PLA",op_s
+0001f9 4441
+0001fa 2843                  .db   "ADC",op_m
+0001fb 4f52
+0001fc 0652                  .db   "ROR",op_sa
+0001fd 363f
+0001fe 0742                  .db   "?6B",op_nv
+0001ff 4d4a
+000200 5350                  .db   "JMP",op_i
+000201 4441
+000202 1043                  .db   "ADC",op_a
+000203 4f52
+000204 1052                  .db   "ROR",op_a
+000205 363f
+000206 0746                  .db   "?6F",op_nv
+                 
+000207 5642
+000208 1853                  .db   "BVS",op_r
+000209 4441
+00020a 4d43                  .db   "ADC",op_ziy
+00020b 373f
+00020c 0732                  .db   "?72",op_nv
+00020d 373f
+00020e 0733                  .db   "?73",op_nv
+00020f 373f
+000210 0734                  .db   "?74",op_nv
+000211 4441
+000212 0943                  .db   "ADC",op_zx
+000213 4f52
+000214 0952                  .db   "ROR",op_zx
+000215 373f
+000216 0737                  .db   "?77",op_nv
+000217 4553
+000218 0049                  .db   "SEI",op_s
+000219 4441
+00021a 1243                  .db   "ADC",op_y
+00021b 373f
+00021c 0741                  .db   "?7A",op_nv
+00021d 373f
+00021e 0742                  .db   "?7B",op_nv
+00021f 373f
+000220 0743                  .db   "?7C",op_nv
+000221 4441
+000222 1143                  .db   "ADC",op_x
+000223 4f52
+000224 1152                  .db   "ROR",op_x
+000225 373f
+000226 0746                  .db   "?7F",op_nv
+                 
+000227 383f
+000228 0730                  .db   "?80",op_nv
+000229 5453
+00022a 4c41                  .db   "STA",op_zxi
+00022b 383f
+00022c 0732                  .db   "?82",op_nv
+00022d 383f
+00022e 0733                  .db   "?83",op_nv
+00022f 5453
+000230 0859                  .db   "STY",op_z
+000231 5453
+000232 0841                  .db   "STA",op_z
+000233 5453
+000234 0858                  .db   "STX",op_z
+000235 383f
+000236 0737                  .db   "?87",op_nv
+000237 4544
+000238 0059                  .db   "DEY",op_s
+000239 383f
+00023a 0739                  .db   "?89",op_nv
+00023b 5854
+00023c 0041                  .db   "TXA",op_s
+00023d 383f
+00023e 0742                  .db   "?8B",op_nv
+00023f 5453
+000240 1059                  .db   "STY",op_a
+000241 5453
+000242 1041                  .db   "STA",op_a
+000243 5453
+000244 1058                  .db   "STX",op_a
+000245 383f
+000246 0746                  .db   "?8F",op_nv
+                 
+000247 4342
+000248 1843                  .db   "BCC",op_r
+000249 5453
+00024a 4d41                  .db   "STA",op_ziy
+00024b 393f
+00024c 0732                  .db   "?92",op_nv
+00024d 393f
+00024e 0733                  .db   "?93",op_nv
+00024f 5453
+000250 0959                  .db   "STY",op_zx
+000251 5453
+000252 0941                  .db   "STA",op_zx
+000253 5453
+000254 0a58                  .db   "STX",op_zy
+000255 393f
+000256 0737                  .db   "?97",op_nv
+000257 5954
+000258 0041                  .db   "TYA",op_s
+000259 5453
+00025a 1241                  .db   "STA",op_y
+00025b 5854
+00025c 0053                  .db   "TXS",op_s
+00025d 393f
+00025e 0742                  .db   "?9B",op_nv
+00025f 393f
+000260 0743                  .db   "?9C",op_nv
+000261 5453
+000262 1141                  .db   "STA",op_x
+000263 393f
+000264 0745                  .db   "?9E",op_nv
+000265 393f
+000266 0746                  .db   "?9F",op_nv
+                 
+000267 444c
+000268 2859                  .db   "LDY",op_m
+000269 444c
+00026a 4c41                  .db   "LDA",op_zxi
+00026b 444c
+00026c 2858                  .db   "LDX",op_m
+00026d 413f
+00026e 0733                  .db   "?A3",op_nv
+00026f 444c
+000270 0859                  .db   "LDY",op_z
+000271 444c
+000272 0841                  .db   "LDA",op_z
+000273 444c
+000274 0858                  .db   "LDX",op_z
+000275 413f
+000276 0737                  .db   "?A7",op_nv
+000277 4154
+000278 0059                  .db   "TAY",op_s
+000279 444c
+00027a 2841                  .db   "LDA",op_m
+00027b 4154
+00027c 0058                  .db   "TAX",op_s
+00027d 413f
+00027e 0742                  .db   "?AB",op_nv
+00027f 444c
+000280 1059                  .db   "LDY",op_a
+000281 444c
+000282 1041                  .db   "LDA",op_a
+000283 444c
+000284 1058                  .db   "LDX",op_a
+000285 413f
+000286 0746                  .db   "?AF",op_nv
+                 
+000287 4342
+000288 1853                  .db   "BCS",op_r
+000289 444c
+00028a 4d41                  .db   "LDA",op_ziy
+00028b 423f
+00028c 0732                  .db   "?B2",op_nv
+00028d 423f
+00028e 0733                  .db   "?B3",op_nv
+00028f 444c
+000290 0959                  .db   "LDY",op_zx
+000291 444c
+000292 0941                  .db   "LDA",op_zx
+000293 444c
+000294 0a58                  .db   "LDX",op_zy
+000295 423f
+000296 0737                  .db   "?B7",op_nv
+000297 4c43
+000298 0056                  .db   "CLV",op_s
+000299 444c
+00029a 1241                  .db   "LDA",op_y
+00029b 5354
+00029c 0058                  .db   "TSX",op_s
+00029d 423f
+00029e 0742                  .db   "?BB",op_nv
+00029f 444c
+0002a0 1159                  .db   "LDY",op_x
+0002a1 444c
+0002a2 1141                  .db   "LDA",op_x
+0002a3 444c
+0002a4 1258                  .db   "LDX",op_y
+0002a5 423f
+0002a6 0746                  .db   "?BF",op_nv
+                 
+0002a7 5043
+0002a8 2859                  .db   "CPY",op_m
+0002a9 4d43
+0002aa 4c50                  .db   "CMP",op_zxi
+0002ab 433f
+0002ac 0732                  .db   "?C2",op_nv
+0002ad 433f
+0002ae 0733                  .db   "?C3",op_nv
+0002af 5043
+0002b0 0859                  .db   "CPY",op_z
+0002b1 4d43
+0002b2 0850                  .db   "CMP",op_z
+0002b3 4544
+0002b4 0843                  .db   "DEC",op_z
+0002b5 433f
+0002b6 0737                  .db   "?C7",op_nv
+0002b7 4e49
+0002b8 0059                  .db   "INY",op_s
+0002b9 4d43
+0002ba 2850                  .db   "CMP",op_m
+0002bb 4544
+0002bc 0058                  .db   "DEX",op_s
+0002bd 433f
+0002be 0742                  .db   "?CB",op_nv
+0002bf 5043
+0002c0 1059                  .db   "CPY",op_a
+0002c1 4d43
+0002c2 1050                  .db   "CMP",op_a
+0002c3 4544
+0002c4 1043                  .db   "DEC",op_a
+0002c5 433f
+0002c6 0746                  .db   "?CF",op_nv
+                 
+0002c7 4e42
+0002c8 1845                  .db   "BNE",op_r
+0002c9 4d43
+0002ca 4d50                  .db   "CMP",op_ziy
+0002cb 443f
+0002cc 0732                  .db   "?D2",op_nv
+0002cd 443f
+0002ce 0733                  .db   "?D3",op_nv
+0002cf 443f
+0002d0 0734                  .db   "?D4",op_nv
+0002d1 4d43
+0002d2 0950                  .db   "CMP",op_zx
+0002d3 4544
+0002d4 0943                  .db   "DEC",op_zx
+0002d5 443f
+0002d6 0737                  .db   "?D7",op_nv
+0002d7 4c43
+0002d8 0044                  .db   "CLD",op_s
+0002d9 4d43
+0002da 1250                  .db   "CMP",op_y
+0002db 443f
+0002dc 0741                  .db   "?DA",op_nv
+0002dd 443f
+0002de 0742                  .db   "?DB",op_nv
+0002df 443f
+0002e0 0743                  .db   "?DC",op_nv
+0002e1 4d43
+0002e2 1150                  .db   "CMP",op_x
+0002e3 4544
+0002e4 1143                  .db   "DEC",op_x
+0002e5 443f
+0002e6 0746                  .db   "?DF",op_nv
+                 
+0002e7 5043
+0002e8 2858                  .db   "CPX",op_m
+0002e9 4253
+0002ea 4c43                  .db   "SBC",op_zxi
+0002eb 453f
+0002ec 0732                  .db   "?E2",op_nv
+0002ed 453f
+0002ee 0733                  .db   "?E3",op_nv
+0002ef 5043
+0002f0 0858                  .db   "CPX",op_z
+0002f1 4253
+0002f2 0843                  .db   "SBC",op_z
+0002f3 4e49
+0002f4 0843                  .db   "INC",op_z
+0002f5 453f
+0002f6 0737                  .db   "?E7",op_nv
+0002f7 4e49
+0002f8 0058                  .db   "INX",op_s
+0002f9 4253
+0002fa 2843                  .db   "SBC",op_m
+0002fb 4f4e
+0002fc 0050                  .db   "NOP",op_s
+0002fd 453f
+0002fe 0742                  .db   "?EB",op_nv
+0002ff 5043
+000300 1058                  .db   "CPX",op_a
+000301 4253
+000302 1043                  .db   "SBC",op_a
+000303 4e49
+000304 1043                  .db   "INC",op_a
+000305 453f
+000306 0746                  .db   "?EF",op_nv
+                 
+000307 4542
+000308 1851                  .db   "BEQ",op_r
+000309 4253
+00030a 4d43                  .db   "SBC",op_ziy
+00030b 463f
+00030c 0732                  .db   "?F2",op_nv
+00030d 463f
+00030e 0733                  .db   "?F3",op_nv
+00030f 463f
+000310 0734                  .db   "?F4",op_nv
+000311 4253
+000312 0943                  .db   "SBC",op_zx
+000313 4e49
+000314 0943                  .db   "INC",op_zx
+000315 463f
+000316 0737                  .db   "?F7",op_nv
+000317 4553
+000318 0044                  .db   "SED",op_s
+000319 4253
+00031a 1243                  .db   "SBC",op_y
+00031b 463f
+00031c 0741                  .db   "?FA",op_nv
+00031d 463f
+00031e 0742                  .db   "?FB",op_nv
+00031f 463f
+000320 0743                  .db   "?FC",op_nv
+000321 4253
+000322 1143                  .db   "SBC",op_x
+000323 4e49
+000324 1143                  .db   "INC",op_x
+000325 463f
+000326 0746                  .db   "?FF",op_nv
+                 
+                 ;*****************************************************************
+                 ;
+                 ; 6 5 0 2   e m u l a t i o n   m a c r o s
+                 ;
+                 ;*****************************************************************
+                 
+                 ;
+                 ; op_decode
+                 ;
+                 ; opcode fetch and decode, prefetch low operand
+                 .macro      op_decode
+                             out   abuslo,pcl        ;opcode fetch
+                             out   abushi,pch
+                             sei                     ;allow emulation INT, NMI
+                             adiw  pch:pcl,1         ;pc -> op low
+                             cli
+                             wait_data_valid 4       ;240 minimum @ 16MHz
+                             in    opcode,dbusin
+                 
+                             out   abuslo,pcl        ;operand address low prefetch
+                             out   abushi,pch
+                             wait_data_valid 6       ;360ns minimum @ 16MHz 
+                                   adiw  pch:pcl,1         ;pc -> op high
+                                   ijmp                    ;execute opcode
+                 .endmacro
+                 
+                 ;op decode after single, opcode already fetched
+                 .macro      op_decode_single
+                             sei                     ;allow emulation INT, NMI
+                             out   abuslo,pcl        ;operand address low prefetch
+                             cli
+                             out   abushi,pch
+                             wait_data_valid 6       ;360ns minimum @ 16MHz 
+                                   adiw  pch:pcl,1         ;pc -> op high
+                                   ijmp                    ;execute opcode
+                 .endmacro
+                 
+                 ; address generate relative
+                 .macro      adgen_r
+                             rjmp  no_branch         ;condition false
+                             in    operand,dbusin
+                             clr   a                 ;expand sign bit
+                             sbrc  operand,7         ;negative?
+                             dec   a
+                             add   pcl,operand       ;set new PC
+                             adc   pch,a
+                 no_branch:  op_decode
+                 .endmacro
+                 
+                 ; address generate absolute
+                 .macro      adgen_a
+                             in    oplow,dbusin     
+                             out   abuslo,pcl        ;operand high address fetch
+                             out   abushi,pch
+                                   adiw  pch:pcl,1         ;pc -> next instruction
+                                   cbr   flags,(1<<op_ind) ;operand address is direct
+                             wait_data_valid 3       ;180ns minimum @ 16MHz
+                             in    ophigh,dbusin
+                 .endmacro
+                 
+                 ; address generate abs,X
+                 .macro      adgen_x     ;@0 = op_label xxx_
+                             .equ  @0x = pc
+                             in    oplow,dbusin     
+                             out   abuslo,pcl        ;operand high address fetch
+                             out   abushi,pch
+                                   adiw  pch:pcl,1         ;pc -> next instruction
+                                   cbr   flags,(1<<op_ind) ;operand address is direct
+                                   add   oplow,regx
+                             wait_data_valid 4       ;240ns minimum @ 16MHz
+                             in    ophigh,dbusin
+                             adc   ophigh,zero
+                             rjmp  @0o               ;fetch operand
+                 .endmacro
+                 
+                 ; address generate abs,Y
+                 .macro      adgen_y     ;@0 = op_label xxx_
+                             .equ  @0y = pc
+                             in    oplow,dbusin     
+                             out   abuslo,pcl        ;operand high address fetch
+                             out   abushi,pch
+                                   adiw  pch:pcl,1         ;pc -> next instruction
+                                   cbr   flags,(1<<op_ind) ;operand address is direct
+                                   add   oplow,regy
+                             wait_data_valid 4       ;240ns minimum @ 16MHz
+                             in    ophigh,dbusin
+                             adc   ophigh,zero
+                             rjmp  @0o               ;fetch operand
+                 .endmacro
+                 
+                 ;address generate (ZP,X) indexed indirect
+                 .macro      adgen_zxi     ;@0 = op_label xxx_
+                             .equ  @0zxi = pc
+                             in    oplow,dbusin
+                             add   oplow,regx
+                             out   abuslo,oplow      ;indirect low address fetch
+                             out   abushi,zero
+                                   inc   oplow
+                                   sbr   flags,(1<<op_ind)  ;operand address is indirect
+                 ;                  brne  pc+2
+                 ;                  rjmp  zp_wrap           ;exceeded end of zeropage
+                             wait_data_valid 2       ;120ns minimum @ 16MHz
+                             in    a,dbusin
+                             out   abuslo,oplow      ;indirect high address fetch
+                                   mov   oplow,a
+                             wait_data_valid 1       ;60ns minimum @ 16MHz
+                             in    ophigh,dbusin
+                             rjmp  @0o
+                 .endmacro
+                 
+                 ;address generate (ZP),Y indirect indexed
+                 .macro      adgen_ziy     ;@0 = op_label xxx_
+                             .equ  @0ziy = pc
+                             in    oplow,dbusin
+                             out   abuslo,oplow      ;indirect low address fetch
+                             out   abushi,zero
+                                   inc   oplow
+                                   sbr   flags,(1<<op_ind)  ;operand address is indirect
+                 ;                  brne  pc+2
+                 ;                  rjmp  zp_wrap           ;exceeded end of zeropage
+                             wait_data_valid 2       ;120ns minimum @ 16MHz
+                             in    a,dbusin
+                             out   abuslo,oplow      ;indirect high address fetch
+                                   mov   oplow,a
+                                   add   oplow,regy
+                             wait_data_valid 2       ;120ns minimum @ 16MHz
+                             in    ophigh,dbusin
+                             adc   ophigh,zero
+                             rjmp  @0o
+                 .endmacro
+                 
+                 ;address generate ZP,X and operand fetch 
+                 .macro      adgen_zx     ;@0 = op_label xxx_
+                             .equ  @0zx = pc
+                             in    oplow,dbusin
+                             add   oplow,regx
+                             out   abuslo,oplow      ;operand fetch
+                             out   abushi,zero
+                             wait_data_valid 3       ;180ns minimum @ 16MHz
+                                clr   ophigh
+                                rjmp  @0m
+                 .endmacro
+                 
+                 ;address generate ZP,Y and operand fetch 
+                 .macro      adgen_zy     ;@0 = op_label xxx_
+                             .equ  @0zy = pc
+                             in    oplow,dbusin
+                             add   oplow,regy
+                             out   abuslo,oplow      ;operand fetch
+                             out   abushi,zero
+                             wait_data_valid 3       ;180ns minimum @ 16MHz
+                                clr   ophigh
+                                rjmp  @0m
+                 .endmacro
+                 
+                 ;address generate ZP absolute and operand fetch 
+                 .macro      adgen_z     ;@0 = op_label xxx_
+                             .equ  @0z = pc
+                             in    oplow,dbusin
+                             out   abuslo,oplow      ;operand fetch
+                             out   abushi,zero
+                             wait_data_valid 3       ;180ns minimum @ 16MHz
+                                clr   ophigh
+                                rjmp  @0m
+                 .endmacro
+                 
+                 ; operand fetch from memory 
+                 .macro      op_fetch
+                             out   abuslo,oplow      ;operand fetch
+                             out   abushi,ophigh
+                          .ifdef iomap
+                             wait_data_valid 3       ;180ns minimum @ 16MHz
+                                   cpi   ophigh,iomap      ;internal io?
+                                   brne  skip_IO
+                             rcall ioread            ;ioread returns data in operand
+                             rjmp  pc+2              ;skip reading from dbus   
+                          .else
+                             wait_data_valid 0       ;0ns minimum @ 16MHz
+                          .endif
+                 skip_IO:
+                 .endmacro
+                 
+                 ; operand fetch from memory for modify op (extended memory address lock)
+                 .macro      op_fetch_modify
+                             out   abuslo,oplow      ;operand fetch
+                             out   abushi,ophigh
+                          .ifdef iomap
+                             wait_data_valid 3       ;180ns minimum @ 16MHz
+                                   cpi   ophigh,iomap      ;internal io?
+                                   brne  skip_IO
+                             rcall iomodify          ;ioread returns data in operand
+                             rjmp  pc+2              ;skip reading from dbus   
+                          .else
+                             wait_data_valid 0       ;0ns minimum @ 16MHz
+                          .endif
+                 skip_IO:
+                 .endmacro
+                 
+                 ; register fetch from memory 
+                 .macro      reg_fetch ;@0 = register
+                             out   abuslo,oplow      ;register fetch
+                             out   abushi,ophigh
+                          .ifdef iomap
+                             wait_data_valid 3       ;180ns minimum @ 16MHz
+                                   cpi   ophigh,iomap      ;internal io?
+                                   brne  skip_IO
+                             rcall ioread            ;ioread returns data in operand
+                             mov   @0,operand  
+                             rjmp  pc+2              ;skip reading from dbus   
+                          .else
+                             wait_data_valid 0       ;0ns minimum @ 16MHz
+                          .endif
+                 skip_IO:
+                 .endmacro
+                 
+                 ;flag generating macro
+                 .macro      flags_gen_nz            ;@0 = register
+                             out   sreg,stat         ;keep C
+                             tst   @0                ;generate NZ
+                             in    stat,sreg         ;save NZ, keep C
+                 .endmacro
+                 
+                 ;IRQ enable/disable
+                 .macro      IRQ_restore             ;sets IRQ according to I-flag
+                             .ifdef irq_dis_real     ;+7 if enabled, +5 if disabled
+                                sbrs  stat2,2        ;IRQ disabled?
+                                rjmp  IRQ_rest_ena 
+                                   ldi   a,IRQ_dis
+                                   out   ibus,a
+                                   out   timsk,one         ;only TOV0 (single step) stays enabled
+                                   ldi   a,0b11000         ;no USART interrupts, only RX & TX enable
+                                rjmp  IRQ_rest_exit
+                 IRQ_rest_ena: 
+                                   ldi   a,IRQ_ena         ;enable IRQ
+                                   out   ibus,a
+                                   lds   a,timer_ena       ;enable timers interrupts
+                                   out   timsk,a
+                                   lds   a,usart_ena       ;enable usart interrupts
+                 IRQ_rest_exit:
+                                out   ucsrb,a
+                             .else
+                                ldi   a,IRQ_ena
+                                sbrc  stat2,2           ;disable if I-flag set
+                                ldi   a,IRQ_dis
+                                out   ibus,a
+                             .endif
+                 .endmacro
+                 
+                 ; store modified operand to memory
+                 .macro      store_modify            ;write to previous read address
+                          .ifdef iomap               ;test internal I/O
+                             cpi   ophigh,iomap
+                             breq  do_io
+                          .endif
+                          .ifdef rommap              ;test write-protect
+                             cpi   ophigh,rommap
+                             brsh  skip_store
+                          .endif   
+                             out   cbus,writemem     ;WE, ~OE
+                             out   dbusout,operand   ;precharge write
+                             out   dbusddr,allon     ;output data valid
+                             out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+                             out   dbusddr,zero      ;data hold ends after 60ns
+                             out   cbus,readmem      ;OE / read mode back on
+                 skip_store:
+                             op_decode               ;next instruction
+                 
+                          .ifdef iomap
+                 do_io:      rjmp  iowrite
+                          .endif
+                 .endmacro
+                 
+                 ;address generate store ZP,X
+                 .macro      adgen_s_zx     ;@0 = op_label xxx_
+                             .equ  @0zx = pc
+                             in    oplow,dbusin
+                             add   oplow,regx
+                             out   abuslo,oplow      ;operand fetch
+                             out   abushi,zero
+                             rjmp  @0m
+                 .endmacro
+                 
+                 ;address generate store ZP,Y
+                 .macro      adgen_s_zy     ;@0 = op_label xxx_
+                             .equ  @0zy = pc
+                             in    oplow,dbusin
+                             add   oplow,regy
+                             out   abuslo,oplow      ;operand fetch
+                             out   abushi,zero
+                             rjmp  @0m
+                 .endmacro
+                 
+                 ;address generate store ZP absolute
+                 .macro      adgen_s_z     ;@0 = op_label xxx_
+                             .equ  @0z = pc
+                             in    oplow,dbusin
+                             out   abuslo,oplow
+                             out   abushi,zero
+                             rjmp  @0m
+                 .endmacro
+                 
+                 ; store register
+                 .macro      store_reg  ;@0 = register, @1 = zp_entry STx_m
+                             out   abuslo,oplow 
+                             out   abushi,ophigh
+                          .ifdef iomap               ;test internal I/O
+                             cpi   ophigh,iomap
+                             breq  do_io
+                          .endif    
+                          .ifdef rommap              ;test write-protect
+                             cpi   ophigh,rommap
+                             brsh  skip_store
+                          .endif   
+                             .equ  @1 = pc
+                             out   cbus,writemem     ;WE, ~OE
+                             out   dbusout,@0        ;precharge write
+                             out   dbusddr,allon     ;output data valid
+                             out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+                             out   dbusddr,zero      ;data hold ends after 60ns
+                             out   cbus,readmem      ;OE / read mode back on
+                 skip_store:
+                             op_decode               ;next instruction
+                 
+                          .ifdef iomap
+                 do_io:      mov   operand,@0
+                             rjmp  iowrite
+                          .endif
+                 .endmacro
+                 
+                 ;*****************************************************************
+                 ;
+                 ; 6 5 0 2   e m u l a t i o n
+                 ;
+                 ;*****************************************************************
+                 ;
+                 ; ***** IRQ pin low interrupt *****
+                 ;
+                 IRQ:
+                          .if defined(spi_sel) || defined(i2c_sel)
+000327 ff37                  sbrs  flags,dma_rpt     ;NMI during dma transfer?
+000328 c00f                  ifs   IRQ_dma
+000329 773f                     cbr   flags,(1<<dma_rpt)
+00032a 93e0 00cd                sts   dma_tab+1,zl      ;save current dma memory address
+00032c 93f0 00ce                sts   dma_tab+2,zh
+00032e 93a0 00d1                sts   dma_tab+5,xl      ;save dma count in progress
+000330 93b0 00d2                sts   dma_tab+6,xh
+000332 7d3f                     cbr   flags,(1<<modify) ;unlock extended memory address after modify
+000333 ba74                     out   dbusddr,zero      ;switch back to read mode
+000334 bad2                     out   cbus,readmem      ;OE to RAM
+000335 e0f6                     ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+000336 9702                     sbiw  pch:pcl,2         ;prepare for instruction retry
+000337 ff34                     sbrs  flags,op_ind      ;3 byte instruction if direct
+                             end   IRQ_dma
+                          .endif
+000338 9701                  sbiw  pch:pcl,1         ;adjust PC (discard prefetch)
+000339 ba58                  out   abuslo,allon      ;new PC high fetch from irq vector
+00033a ba5b                  out   abushi,allon
+00033b efee                        ldi   zl,0xfe     ;preload vector low  
+00033c e400                        ldi   a,IRQ_dis
+00033d bf0b                        out   ibus,a
+                                    .ifdef irq_dis_real     ;+3
+                                   .endif
+                                  ;status merge while we are waiting for data
+00033e 2f07                        mov   a,stat            ;merge status in 6502 format
+00033f 7003                        andi  a,0b11            ;------ZC
+                             wait_data_valid 5       ;300ns minimum @ 16MHz
+000340 b3d3                  in    ophigh,dbusin
+000341 bbe8                  out   abuslo,zl         ;new PC low fetch from irq vector
+                                   ;status merge while we are waiting for data
+000342 fb72                        bst   stat,2            ;<----<
+000343 f907                        bld   a,7               ;N-------
+000344 2b06                        or    a,stat2           ;-V1BDI--
+000345 6064                        sbr   stat2,0b100       ;I=1 (IRQ disabled)
+                             wait_data_valid 4       ;240ns minimum @ 16MHz
+000346 b3c3                  in    oplow,dbusin
+                             
+000347 bab8                  out   abuslo,spointer   ;push pch
+000348 ba6b                  out   abushi,one
+000349 94ba                  dec   spointer
+00034a bae2                  out   cbus,writemem     ;WE, ~OE
+00034b bb95                  out   dbusout,pch       ;precharge write
+00034c ba54                  out   dbusddr,allon     ;output data valid
+00034d bac2                  out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+                 
+00034e bab8                  out   abuslo,spointer   ;push pcl
+00034f 94ba                  dec   spointer
+000350 bae2                  out   cbus,writemem     ;WE
+000351 bb85                  out   dbusout,pcl       ;write
+000352 bac2                  out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+                 
+000353 bab8                  out   abuslo,spointer   ;push status
+000354 94ba                  dec   spointer
+000355 bae2                  out   cbus,writemem     ;WE
+000356 bb05                  out   dbusout,a         ;write
+000357 bac2                  out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+000358 ba74                  out   dbusddr,zero      ;data hold ends after 60ns
+000359 bad2                  out   cbus,readmem      ;OE / read mode back on
+                 
+00035a 01ce                  movw  pcl,oplow         ;load new PC
+                 
+00035b e50f                  ldi   a,low(ramend)     ;discard AVR return address
+00035c bf0d                  out   spl,a
+                 
+00035d bb88
+00035e bb9b
+00035f 9478
+000360 9601
+000361 94f8
+000362 b3e3
+000363 bb88
+000364 bb9b
+000365 9601
+000366 9409                  op_decode               ;next instruction
+                 
+                 ;
+                 ; ***** NMI pin high to low edge interrupt *****
+                 ;
+                 NMI:
+                          .if defined(spi_sel) || defined(i2c_sel)
+000367 ff37                  sbrs  flags,dma_rpt     ;NMI during dma transfer?
+000368 c00f                  ifs   NMI_dma
+000369 773f                     cbr   flags,(1<<dma_rpt)
+00036a 93e0 00cd                sts   dma_tab+1,zl      ;save current dma memory address
+00036c 93f0 00ce                sts   dma_tab+2,zh
+00036e 93a0 00d1                sts   dma_tab+5,xl      ;save dma count in progress
+000370 93b0 00d2                sts   dma_tab+6,xh
+000372 7d3f                     cbr   flags,(1<<modify) ;unlock extended memory address after modify
+000373 ba74                     out   dbusddr,zero      ;switch back to read mode
+000374 bad2                     out   cbus,readmem      ;OE to RAM
+000375 e0f6                     ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+000376 9702                     sbiw  pch:pcl,2         ;prepare for instruction retry
+000377 ff34                     sbrs  flags,op_ind      ;3 byte instruction if direct
+                             end   NMI_dma
+                          .endif
+000378 9701                  sbiw  pch:pcl,1         ;adjust PC (discard prefetch)
+000379 efeb                  ldi   zl,0xfb           ;vector high first
+00037a bbe8                  out   abuslo,zl         ;new PC high fetch from irq vector
+00037b ba5b                  out   abushi,allon
+00037c efea                        ldi   zl,0xfa     ;preload vector low  
+00037d e400                        ldi   a,IRQ_dis
+00037e bf0b                        out   ibus,a
+                                    .ifdef irq_dis_real     ;+3
+                                   .endif
+                                  ;status merge while we are waiting for data
+00037f 2f07                        mov   a,stat            ;merge status in 6502 format
+000380 7003                        andi  a,0b11            ;------ZC
+                             wait_data_valid 5       ;300ns minimum @ 16MHz
+000381 b3d3                  in    ophigh,dbusin
+000382 bbe8                  out   abuslo,zl         ;new PC low fetch from irq vector
+                                   ;status merge while we are waiting for data
+000383 fb72                        bst   stat,2            ;<----<
+000384 f907                        bld   a,7               ;N-------
+000385 2b06                        or    a,stat2           ;-V1BDI--
+000386 6064                        sbr   stat2,0b100       ;I=1 (IRQ disabled)
+                             wait_data_valid 4       ;240ns minimum @ 16MHz
+000387 b3c3                  in    oplow,dbusin
+                             
+000388 bab8                  out   abuslo,spointer   ;push pch
+000389 ba6b                  out   abushi,one
+00038a 94ba                  dec   spointer
+00038b bae2                  out   cbus,writemem     ;WE, ~OE
+00038c bb95                  out   dbusout,pch       ;precharge write
+00038d ba54                  out   dbusddr,allon     ;output data valid
+00038e bac2                  out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+                 
+00038f bab8                  out   abuslo,spointer   ;push pcl
+000390 94ba                  dec   spointer
+000391 bae2                  out   cbus,writemem     ;WE
+000392 bb85                  out   dbusout,pcl       ;write
+000393 bac2                  out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+                 
+000394 bab8                  out   abuslo,spointer   ;push status
+000395 94ba                  dec   spointer
+000396 bae2                  out   cbus,writemem     ;WE
+000397 bb05                  out   dbusout,a         ;write
+000398 bac2                  out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+000399 ba74                  out   dbusddr,zero      ;data hold ends after 60ns
+00039a bad2                  out   cbus,readmem      ;OE / read mode back on
+                 
+00039b 01ce                  movw  pcl,oplow         ;load new PC
+                 
+00039c e50f                  ldi   a,low(ramend)     ;discard AVR return address
+00039d bf0d                  out   spl,a
+                 
+00039e bb88
+00039f bb9b
+0003a0 9478
+0003a1 9601
+0003a2 94f8
+0003a3 b3e3
+0003a4 bb88
+0003a5 bb9b
+0003a6 9601
+0003a7 9409                  op_decode               ;next instruction
+                 
+                 ;
+                 ; opcode template
+                 ;
+                 ; operand adressing modes:
+                 ; a    absolute - LDA abs                     
+                 ; x    absolute indexed X - LDA abs,x
+                 ; y    absolute indexed Y - LDA abs,y
+                 ; i    absolute indirect - JMP (abs)
+                 ; s    single (implied) - TAX
+                 ; m    immediate - LDA #
+                 ; r    relative to PC - BEQ rel
+                 ; z    zero page - LDA zp
+                 ; zxi  zero page indexed X indirect - LDA (zp,x)
+                 ; zx   zero page indexed X - LDA zp,x
+                 ; zy   zero page indexed Y - LDA zp,y
+                 ; ziy  zero page indirect indexed Y - LDA (zp),y
+                 ;
+                 ; adressing mode is added as suffix to the original opcode
+                 ; examples: LDA_ziy, BEQ_r, TAX_s, JMP_a
+                 
+                 ;*****************************************************************
+                 ;
+                 ; Implied adressing instructions
+                 ;     Register, Stack
+                 ;
+                 ;*****************************************************************
+                 
+                 ; opcode:         ASL A
+0003a8 b3e3      ASL_s:      in    opcode,dbusin     ;next opcode
+                 
+0003a9 0f55                  lsl   rega              ;AVR emulated OP
+0003aa b77f                  in    stat,sreg         ;save NZC
+                 
+0003ab 9478
+0003ac bb88
+0003ad 94f8
+0003ae bb9b
+0003af 9601
+0003b0 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         CLC
+0003b1 b3e3      CLC_s:      in    opcode,dbusin     ;next opcode
+                 
+0003b2 7f7e                  cbr   stat,1            ;AVR emulated OP
+                 
+0003b3 9478
+0003b4 bb88
+0003b5 94f8
+0003b6 bb9b
+0003b7 9601
+0003b8 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         CLD
+0003b9 b3e3      CLD_s:      in    opcode,dbusin     ;next opcode
+                 
+0003ba 7f67                  cbr   stat2,0b1000      ;AVR emulated OP
+                 
+0003bb 9478
+0003bc bb88
+0003bd 94f8
+0003be bb9b
+0003bf 9601
+0003c0 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         CLI
+0003c1 b3e3      CLI_s:      in    opcode,dbusin     ;next opcode
+                 
+0003c2 7f6b                  cbr   stat2,0b100
+0003c3 ec00                  ldi   a,IRQ_ena
+0003c4 bf0b                  out   ibus,a
+                             .ifdef irq_dis_real     ;+6
+                             .endif
+                 
+0003c5 9478
+0003c6 bb88
+0003c7 94f8
+0003c8 bb9b
+0003c9 9601
+0003ca 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         CLV
+0003cb b3e3      CLV_s:      in    opcode,dbusin     ;next opcode
+                 
+0003cc 7b6f                  cbr   stat2,0b1000000   ;AVR emulated OP
+                 
+0003cd 9478
+0003ce bb88
+0003cf 94f8
+0003d0 bb9b
+0003d1 9601
+0003d2 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         DEX
+0003d3 b3e3      DEX_s:      in    opcode,dbusin     ;next opcode
+                 
+0003d4 bf7f                  out   sreg,stat         ;keep C
+0003d5 948a                  dec   regx              ;AVR emulated OP
+0003d6 b77f                  in    stat,sreg         ;save NZ, keep C
+                 
+0003d7 9478
+0003d8 bb88
+0003d9 94f8
+0003da bb9b
+0003db 9601
+0003dc 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         DEX
+0003dd b3e3      DEY_s:      in    opcode,dbusin     ;next opcode
+                 
+0003de bf7f                  out   sreg,stat         ;keep C
+0003df 949a                  dec   regy              ;AVR emulated OP
+0003e0 b77f                  in    stat,sreg         ;save NZ, keep C
+                 
+0003e1 9478
+0003e2 bb88
+0003e3 94f8
+0003e4 bb9b
+0003e5 9601
+0003e6 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         INX
+0003e7 b3e3      INX_s:      in    opcode,dbusin     ;next opcode
+                 
+0003e8 bf7f                  out   sreg,stat         ;keep C
+0003e9 9483                  inc   regx              ;AVR emulated OP
+0003ea b77f                  in    stat,sreg         ;save NZ, keep C
+                 
+0003eb 9478
+0003ec bb88
+0003ed 94f8
+0003ee bb9b
+0003ef 9601
+0003f0 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         INY
+0003f1 b3e3      INY_s:      in    opcode,dbusin     ;next opcode
+                 
+0003f2 bf7f                  out   sreg,stat         ;keep C
+0003f3 9493                  inc   regy              ;AVR emulated OP
+0003f4 b77f                  in    stat,sreg         ;save NZ, keep C
+                 
+0003f5 9478
+0003f6 bb88
+0003f7 94f8
+0003f8 bb9b
+0003f9 9601
+0003fa 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         LSR A
+0003fb b3e3      LSR_s:      in    opcode,dbusin     ;next opcode
+                 
+0003fc 9556                  lsr   rega              ;AVR emulated OP
+0003fd b77f                  in    stat,sreg         ;save NZC
+                 
+0003fe 9478
+0003ff bb88
+000400 94f8
+000401 bb9b
+000402 9601
+000403 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         NOP
+000404 b3e3      NOP_s:      in    opcode,dbusin     ;next opcode
+                 
+000405 c000
+000406 c000
+000407 0000                  wait_ns  1000,11        ;2 6502 cycles
+                 
+000408 9478
+000409 bb88
+00040a 94f8
+00040b bb9b
+00040c 9601
+00040d 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         PHA
+00040e b3e3      PHA_s:      in    opcode,dbusin     ;next opcode
+                 
+00040f bab8                  out   abuslo,spointer   ;load address from SP
+000410 ba6b                  out   abushi,one
+000411 94ba                  dec   spointer
+000412 bae2                  out   cbus,writemem     ;WE, ~OE
+000413 bb55                  out   dbusout,rega      ;precharge write
+000414 ba54                  out   dbusddr,allon     ;output data valid
+000415 bac2                  out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+000416 ba74                  out   dbusddr,zero      ;data hold ends after 60ns
+000417 bad2                  out   cbus,readmem      ;OE / read mode back on
+                 
+000418 9478
+000419 bb88
+00041a 94f8
+00041b bb9b
+00041c 9601
+00041d 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         PHP
+00041e b3e3      PHP_s:      in    opcode,dbusin     ;next opcode
+                 
+00041f 2f07                  mov   a,stat            ;merge status in 6502 format
+000420 7003                  andi  a,0b11            ;------ZC
+000421 fb72                  bst   stat,2            ;<----<
+000422 f907                  bld   a,7               ;N-------
+000423 2b06                  or    a,stat2           ;-V1BDI--
+000424 6300                  ori   a,0b110000        ;  ^^=1 (pushed by software)
+                 
+000425 bab8                  out   abuslo,spointer   ;load address from SP
+000426 ba6b                  out   abushi,one
+000427 94ba                  dec   spointer
+000428 bae2                  out   cbus,writemem     ;WE, ~OE
+000429 bb05                  out   dbusout,a         ;precharge write
+00042a ba54                  out   dbusddr,allon     ;output data valid
+00042b bac2                  out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+00042c ba74                  out   dbusddr,zero      ;data hold ends after 60ns
+00042d bad2                  out   cbus,readmem      ;OE / read mode back on
+                 
+00042e 9478
+00042f bb88
+000430 94f8
+000431 bb9b
+000432 9601
+000433 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         PLA
+000434 b3e3      PLA_s:      in    opcode,dbusin     ;next opcode
+                 
+000435 94b3                  inc   spointer          
+000436 bab8                  out   abuslo,spointer   ;load address from SP
+000437 ba6b                  out   abushi,one
+000438 c000
+000439 0000                  wait_data_valid 0       ;0ns minimum @ 16MHz
+00043a b353                  in    rega,dbusin
+00043b bf7f
+00043c 2355
+00043d b77f                  flags_gen_nz rega
+                 
+00043e 9478
+00043f bb88
+000440 94f8
+000441 bb9b
+000442 9601
+000443 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         PLP
+000444 b3e3      PLP_s:      in    opcode,dbusin     ;next opcode
+                 
+000445 94b3                  inc   spointer          
+000446 bab8                  out   abuslo,spointer   ;load address from SP
+000447 ba6b                  out   abushi,one
+000448 c000
+000449 0000                  wait_data_valid 0       ;0ns minimum @ 16MHz
+00044a b363                  in    stat2,dbusin
+                 
+00044b ec00
+00044c fd62
+00044d e400
+00044e bf0b                  IRQ_restore
+                 
+00044f 2f76                  mov   stat,stat2        ;restore AVR format
+000450 7073                  andi  stat,0b11         ;------ZC
+000451 fb67                  bst   stat2,7           ;>---->
+000452 f972                  bld   stat,2            ;-----N--
+                 
+000453 766c                  andi  stat2,0b1101100   ;-V1BDI-- (Break cleared)
+000454 6260                  ori   stat2,0b0100000   ;  ^=1 (set unused)
+                 
+000455 9478
+000456 bb88
+000457 94f8
+000458 bb9b
+000459 9601
+00045a 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         ROL A
+00045b b3e3      ROL_s:      in    opcode,dbusin     ;next opcode
+                 
+00045c bf7f                  out   sreg,stat         ;get C
+00045d 1f55                  rol   rega              ;AVR emulated OP
+00045e b77f                  in    stat,sreg         ;save NZC
+                 
+00045f 9478
+000460 bb88
+000461 94f8
+000462 bb9b
+000463 9601
+000464 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         ROR A
+000465 b3e3      ROR_s:      in    opcode,dbusin     ;next opcode
+                 
+000466 bf7f                  out   sreg,stat         ;get C
+000467 9557                  ror   rega              ;AVR emulated OP
+000468 b77f                  in    stat,sreg         ;save NZC
+                 
+000469 9478
+00046a bb88
+00046b 94f8
+00046c bb9b
+00046d 9601
+00046e 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         SEC
+00046f b3e3      SEC_s:      in    opcode,dbusin     ;next opcode
+                 
+000470 6071                  sbr   stat,1            ;AVR emulated OP
+                 
+000471 9478
+000472 bb88
+000473 94f8
+000474 bb9b
+000475 9601
+000476 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         SED
+000477 b3e3      SED_s:      in    opcode,dbusin     ;next opcode
+                 
+000478 6068                  sbr   stat2,0b1000      ;AVR emulated OP
+                 
+000479 9478
+00047a bb88
+00047b 94f8
+00047c bb9b
+00047d 9601
+00047e 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         SEI
+00047f b3e3      SEI_s:      in    opcode,dbusin     ;next opcode
+                 
+000480 6064                  sbr   stat2,0b100       ;AVR emulated OP
+000481 e400                  ldi   a,IRQ_dis         ;only NMI stays enabled
+000482 bf0b                  out   ibus,a
+                             .ifdef irq_dis_real     ;+3
+                             .endif
+                 
+000483 9478
+000484 bb88
+000485 94f8
+000486 bb9b
+000487 9601
+000488 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         TAX
+000489 b3e3      TAX_s:      in    opcode,dbusin     ;next opcode
+                 
+00048a 2e85                  mov   regx,rega         ;AVR emulated OP
+00048b bf7f
+00048c 2088
+00048d b77f                  flags_gen_nz regx
+                 
+00048e 9478
+00048f bb88
+000490 94f8
+000491 bb9b
+000492 9601
+000493 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         TAY
+000494 b3e3      TAY_s:      in    opcode,dbusin     ;next opcode
+                 
+000495 2e95                  mov   regy,rega         ;AVR emulated OP
+000496 bf7f
+000497 2099
+000498 b77f                  flags_gen_nz regy
+                 
+000499 9478
+00049a bb88
+00049b 94f8
+00049c bb9b
+00049d 9601
+00049e 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         TSX
+00049f b3e3      TSX_s:      in    opcode,dbusin     ;next opcode
+                 
+0004a0 2c8b                  mov   regx,spointer     ;AVR emulated OP
+0004a1 bf7f
+0004a2 2088
+0004a3 b77f                  flags_gen_nz regx
+                 
+0004a4 9478
+0004a5 bb88
+0004a6 94f8
+0004a7 bb9b
+0004a8 9601
+0004a9 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         TXA
+0004aa b3e3      TXA_s:      in    opcode,dbusin     ;next opcode
+                 
+0004ab 2d58                  mov   rega,regx         ;AVR emulated OP
+0004ac bf7f
+0004ad 2355
+0004ae b77f                  flags_gen_nz rega
+                 
+0004af 9478
+0004b0 bb88
+0004b1 94f8
+0004b2 bb9b
+0004b3 9601
+0004b4 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         TXS
+0004b5 b3e3      TXS_s:      in    opcode,dbusin     ;next opcode
+                 
+0004b6 2cb8                  mov   spointer,regx     ;AVR emulated OP
+                                                     ;flags are not changed 
+                 
+0004b7 9478
+0004b8 bb88
+0004b9 94f8
+0004ba bb9b
+0004bb 9601
+0004bc 9409                  op_decode_single        ;next instruction
+                 
+                 ; opcode:         TYA
+0004bd b3e3      TYA_s:      in    opcode,dbusin     ;next opcode
+                 
+0004be 2d59                  mov   rega,regy         ;AVR emulated OP
+0004bf bf7f
+0004c0 2355
+0004c1 b77f                  flags_gen_nz rega
+                 
+0004c2 9478
+0004c3 bb88
+0004c4 94f8
+0004c5 bb9b
+0004c6 9601
+0004c7 9409                  op_decode_single        ;next instruction
+                 
+                 ;*****************************************************************
+                 ;
+                 ; Program counter
+                 ;     instructions modifying the PC
+                 ;
+                 ;*****************************************************************
+                 
+                 ; opcode:         BCC
+0004c8 fd70      BCC_r:      sbrc  stat,0
+0004c9 c006
+0004ca b2a3
+0004cb 2700
+0004cc fca7
+0004cd 950a
+0004ce 0d8a
+0004cf 1f90
+0004d0 bb88
+0004d1 bb9b
+0004d2 9478
+0004d3 9601
+0004d4 94f8
+0004d5 b3e3
+0004d6 bb88
+0004d7 bb9b
+0004d8 9601
+0004d9 9409                  adgen_r                 ;branch if skip
+                 
+                 ; opcode:         BCS
+0004da ff70      BCS_r:      sbrs  stat,0
+0004db c006
+0004dc b2a3
+0004dd 2700
+0004de fca7
+0004df 950a
+0004e0 0d8a
+0004e1 1f90
+0004e2 bb88
+0004e3 bb9b
+0004e4 9478
+0004e5 9601
+0004e6 94f8
+0004e7 b3e3
+0004e8 bb88
+0004e9 bb9b
+0004ea 9601
+0004eb 9409                  adgen_r                 ;branch if skip
+                 
+                 ; opcode:         BEQ
+0004ec ff71      BEQ_r:      sbrs  stat,1
+0004ed c006
+0004ee b2a3
+0004ef 2700
+0004f0 fca7
+0004f1 950a
+0004f2 0d8a
+0004f3 1f90
+0004f4 bb88
+0004f5 bb9b
+0004f6 9478
+0004f7 9601
+0004f8 94f8
+0004f9 b3e3
+0004fa bb88
+0004fb bb9b
+0004fc 9601
+0004fd 9409                  adgen_r                 ;branch if skip
+                 
+                 ; opcode:         BMI
+0004fe ff72      BMI_r:      sbrs  stat,2
+0004ff c006
+000500 b2a3
+000501 2700
+000502 fca7
+000503 950a
+000504 0d8a
+000505 1f90
+000506 bb88
+000507 bb9b
+000508 9478
+000509 9601
+00050a 94f8
+00050b b3e3
+00050c bb88
+00050d bb9b
+00050e 9601
+00050f 9409                  adgen_r                 ;branch if skip
+                 
+                 ; opcode:         BNE
+000510 fd71      BNE_r:      sbrc  stat,1
+000511 c006
+000512 b2a3
+000513 2700
+000514 fca7
+000515 950a
+000516 0d8a
+000517 1f90
+000518 bb88
+000519 bb9b
+00051a 9478
+00051b 9601
+00051c 94f8
+00051d b3e3
+00051e bb88
+00051f bb9b
+000520 9601
+000521 9409                  adgen_r                 ;branch if skip
+                 
+                 ; opcode:         BPL
+000522 fd72      BPL_r:      sbrc  stat,2
+000523 c006
+000524 b2a3
+000525 2700
+000526 fca7
+000527 950a
+000528 0d8a
+000529 1f90
+00052a bb88
+00052b bb9b
+00052c 9478
+00052d 9601
+00052e 94f8
+00052f b3e3
+000530 bb88
+000531 bb9b
+000532 9601
+000533 9409                  adgen_r                 ;branch if skip
+                 
+                 ; opcode:         BVC
+000534 fd66      BVC_r:      sbrc  stat2,6
+000535 c006
+000536 b2a3
+000537 2700
+000538 fca7
+000539 950a
+00053a 0d8a
+00053b 1f90
+00053c bb88
+00053d bb9b
+00053e 9478
+00053f 9601
+000540 94f8
+000541 b3e3
+000542 bb88
+000543 bb9b
+000544 9601
+000545 9409                  adgen_r                 ;branch if skip
+                 
+                 ; opcode:         BVS
+000546 ff66      BVS_r:      sbrs  stat2,6
+000547 c006
+000548 b2a3
+000549 2700
+00054a fca7
+00054b 950a
+00054c 0d8a
+00054d 1f90
+00054e bb88
+00054f bb9b
+000550 9478
+000551 9601
+000552 94f8
+000553 b3e3
+000554 bb88
+000555 bb9b
+000556 9601
+000557 9409                  adgen_r                 ;branch if skip
+                 
+                 ; opcode:         JMP
+000558 b3c3      JMP_i:      in    oplow,dbusin      ;save low pointer to pc     
+000559 bb88                  out   abuslo,pcl        ;fetch high pointer to pc
+00055a bb9b                  out   abushi,pch
+00055b 2f8c                        mov   pcl,oplow
+00055c c000                  wait_data_valid 1       ;60ns minimum @ 16MHz
+00055d b393                  in    pch,dbusin        ;point to new pc
+                 
+00055e bb88                  out   abuslo,pcl        ;fetch pc low  
+00055f bb9b                  out   abushi,pch
+000560 9601                        adiw  pch:pcl,1
+000561 0000                  wait_data_valid 2       ;120ns minimum @ 16MHz
+                 
+000562 b3c3      JMP_a:      in    oplow,dbusin      ;save pc low   
+000563 bb88                  out   abuslo,pcl        ;fetch pc high
+000564 bb9b                  out   abushi,pch
+000565 2f8c                        mov   pcl,oplow
+000566 c000                  wait_data_valid 1       ;60ns minimum @ 16MHz
+000567 b393                  in    pch,dbusin        ;load new pc
+                 
+000568 bb88
+000569 bb9b
+00056a 9478
+00056b 9601
+00056c 94f8
+00056d b3e3
+00056e bb88
+00056f bb9b
+000570 9601
+000571 9409                  op_decode               ;next instruction
+                 
+                 ; opcode:         JSR
+000572 b3c3      JSR_a:      in    oplow,dbusin      ;save new PC as operand address
+000573 bb88                  out   abuslo,pcl        ;new PC high fetch
+000574 bb9b                  out   abushi,pch
+                                                     ;pc++ skipped
+000575 c000
+000576 0000                  wait_data_valid 0       ;0ns minimum @ 16MHz
+000577 b3d3                  in    ophigh,dbusin
+                             
+000578 bab8                  out   abuslo,spointer   ;push pch
+000579 ba6b                  out   abushi,one
+00057a 94ba                  dec   spointer
+00057b bae2                  out   cbus,writemem     ;WE, ~OE
+00057c bb95                  out   dbusout,pch       ;precharge write
+00057d ba54                  out   dbusddr,allon     ;output data valid
+00057e bac2                  out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+                 
+00057f bab8                  out   abuslo,spointer   ;push pcl
+000580 94ba                  dec   spointer
+000581 bae2                  out   cbus,writemem     ;WE
+000582 bb85                  out   dbusout,pcl       ;precharge write
+000583 bac2                  out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+000584 ba74                  out   dbusddr,zero      ;data hold ends after 60ns
+000585 bad2                  out   cbus,readmem      ;OE / read mode back on
+                 
+000586 01ce                  movw  pcl,oplow         ;load new PC
+                 
+000587 bb88
+000588 bb9b
+000589 9478
+00058a 9601
+00058b 94f8
+00058c b3e3
+00058d bb88
+00058e bb9b
+00058f 9601
+000590 9409                  op_decode               ;next instruction
+                 
+                 ; opcode:         RTS
+000591 94b3      RTS_s:      inc   spointer          
+000592 bab8                  out   abuslo,spointer   ;pull pcl
+000593 ba6b                  out   abushi,one
+000594 94b3                        inc   spointer          
+000595 c000                  wait_data_valid 1       ;60ns minimum @ 16MHz
+000596 b383                  in    pcl,dbusin
+000597 bab8                  out   abuslo,spointer   ;pull pch
+000598 c000
+000599 0000                  wait_data_valid 0       ;0ns minimum @ 16MHz
+00059a b393                  in    pch,dbusin
+00059b 9601                  adiw  pch:pcl,1         ;point to next instruction
+                 
+00059c bb88
+00059d bb9b
+00059e 9478
+00059f 9601
+0005a0 94f8
+0005a1 b3e3
+0005a2 bb88
+0005a3 bb9b
+0005a4 9601
+0005a5 9409                  op_decode               ;next instruction
+                 
+                 ; opcode:         RTI
+0005a6 94b3      RTI_s:      inc   spointer          
+0005a7 bab8                  out   abuslo,spointer   ;pull status
+0005a8 ba6b                  out   abushi,one
+0005a9 94b3                        inc   spointer
+0005aa c000                  wait_data_valid 1       ;60ns minimum @ 16MHz
+0005ab b363                  in    stat2,dbusin
+0005ac bab8                  out   abuslo,spointer   ;pull pcl
+0005ad 94b3                        inc   spointer          
+                                   ;status restore while we are waiting for data
+0005ae ec00
+0005af fd62
+0005b0 e400
+0005b1 bf0b                        IRQ_restore
+0005b2 2f76                        mov   stat,stat2        ;restore AVR format
+                             wait_data_valid 6       ;360ns minimum @ 16MHz
+0005b3 b383                  in    pcl,dbusin
+0005b4 bab8                  out   abuslo,spointer   ;pull pch
+                                   ;status restore while we are waiting for data
+0005b5 7073                        andi  stat,0b11         ;------ZC
+0005b6 fb67                        bst   stat2,7           ;>---->
+0005b7 f972                        bld   stat,2            ;-----N--
+0005b8 766c                        andi  stat2,0b1101100   ;-V1BDI-- (Break cleared)
+0005b9 6260                        ori   stat2,0b0100000   ;  ^=1 (set unused)
+                             wait_data_valid 5       ;300ns minimum @ 16MHz
+0005ba b393                  in    pch,dbusin
+                 
+0005bb bb88
+0005bc bb9b
+0005bd 9478
+0005be 9601
+0005bf 94f8
+0005c0 b3e3
+0005c1 bb88
+0005c2 bb9b
+0005c3 9601
+0005c4 9409                  op_decode               ;next instruction
+                 
+                 ; opcode:         BRK
+                 BRK_s:           ;save new PC as operand address
+0005c5 ba58                  out   abuslo,allon      ;new PC high fetch from irq vector
+0005c6 ba5b                  out   abushi,allon
+0005c7 efee                        ldi   zl,0xfe     ;preload vector low   
+0005c8 e400                        ldi   a,IRQ_dis
+0005c9 bf0b                        out   ibus,a
+                                   .ifdef irq_dis_real     ;+3
+                                   .endif
+                                   ;status merge while we are waiting for data
+0005ca 2f07                        mov   a,stat            ;merge status in 6502 format
+0005cb 7003                        andi  a,0b11            ;------ZC
+                             wait_data_valid 5       ;300ns minimum @ 16MHz
+0005cc b3d3                  in    ophigh,dbusin
+0005cd bbe8                  out   abuslo,zl         ;new PC low fetch from irq vector
+                                   ;status merge while we are waiting for data
+0005ce fb72                        bst   stat,2            ;<----<
+0005cf f907                        bld   a,7               ;N-------
+0005d0 2b06                        or    a,stat2           ;-V1BDI--
+0005d1 6300                        sbr   a,0b110000        ;  ^^=1 (pushed by Break)
+0005d2 6064                        sbr   stat2,0b100       ;I=1 (IRQ disabled)
+                             wait_data_valid 5       ;300ns minimum @ 16MHz
+0005d3 b3c3                  in    oplow,dbusin
+                             
+0005d4 bab8                  out   abuslo,spointer   ;push pch
+0005d5 ba6b                  out   abushi,one
+0005d6 94ba                  dec   spointer
+0005d7 bae2                  out   cbus,writemem     ;WE, ~OE
+0005d8 bb95                  out   dbusout,pch       ;precharge write
+0005d9 ba54                  out   dbusddr,allon     ;output data valid
+0005da bac2                  out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+                 
+0005db bab8                  out   abuslo,spointer   ;push pcl
+0005dc 94ba                  dec   spointer
+0005dd bae2                  out   cbus,writemem     ;WE
+0005de bb85                  out   dbusout,pcl       ;write
+0005df bac2                  out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+                 
+0005e0 bab8                  out   abuslo,spointer   ;push status
+0005e1 94ba                  dec   spointer
+0005e2 bae2                  out   cbus,writemem     ;WE
+0005e3 bb05                  out   dbusout,a         ;write
+0005e4 bac2                  out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+0005e5 ba74                  out   dbusddr,zero      ;data hold ends after 60ns
+0005e6 bad2                  out   cbus,readmem      ;OE / read mode back on
+                 
+0005e7 01ce                  movw  pcl,oplow         ;load new PC
+                 
+0005e8 bb88
+0005e9 bb9b
+0005ea 9478
+0005eb 9601
+0005ec 94f8
+0005ed b3e3
+0005ee bb88
+0005ef bb9b
+0005f0 9601
+0005f1 9409                  op_decode               ;next instruction
+                 
+                 
+                 ;
+                 ; instruction decode vector table
+                 ;
+                             align 8           ;align to page boundary
+                 
+000600 cfc4      oc_tab:     rjmp  BRK_s       ;0x00
+000601 c37b                  rjmp  ORA_zxi 
+000602 c0fd                  rjmp  illegalop 
+000603 c0fc                  rjmp  illegalop 
+000604 c0fb                  rjmp  illegalop 
+000605 c398                  rjmp  ORA_z 
+000606 c421                  rjmp  ASL_z 
+000607 c0f8                  rjmp  illegalop 
+000608 ce15                  rjmp  PHP_s 
+000609 c3a5                  rjmp  ORA_m 
+00060a cd9d                  rjmp  ASL_s 
+00060b c0f4                  rjmp  illegalop 
+00060c c0f3                  rjmp  illegalop 
+00060d c395                  rjmp  ORA_a 
+00060e c41e                  rjmp  ASL_a 
+00060f c0f0                  rjmp  illegalop 
+000610 cf11                  rjmp  BPL_r       ;0x10
+000611 c378                  rjmp  ORA_ziy 
+000612 c0ed                  rjmp  illegalop 
+000613 c0ec                  rjmp  illegalop 
+000614 c0eb                  rjmp  illegalop 
+000615 c382                  rjmp  ORA_zx 
+000616 c40b                  rjmp  ASL_zx 
+000617 c0e8                  rjmp  illegalop 
+000618 cd98                  rjmp  CLC_s 
+000619 c35a                  rjmp  ORA_y 
+00061a c0e5                  rjmp  illegalop 
+00061b c0e4                  rjmp  illegalop 
+00061c c0e3                  rjmp  illegalop 
+00061d c34d                  rjmp  ORA_x 
+00061e c3fa                  rjmp  ASL_x 
+00061f c0e0                  rjmp  illegalop 
+000620 cf51                  rjmp  JSR_a       ;0x20
+000621 c152                  rjmp  AND_zxi 
+000622 c0dd                  rjmp  illegalop 
+000623 c0dc                  rjmp  illegalop 
+000624 c18f                  rjmp  BIT_z 
+000625 c16f                  rjmp  AND_z 
+000626 c46d                  rjmp  ROL_z 
+000627 c0d8                  rjmp  illegalop 
+000628 ce1b                  rjmp  PLP_s 
+000629 c17c                  rjmp  AND_m 
+00062a ce30                  rjmp  ROL_s 
+00062b c0d4                  rjmp  illegalop 
+00062c c18c                  rjmp  BIT_a
+00062d c16c                  rjmp  AND_a 
+00062e c46a                  rjmp  ROL_a
+00062f c0d0                  rjmp  illegalop 
+000630 cecd                  rjmp  BMI_r       ;0x30
+000631 c14f                  rjmp  AND_ziy 
+000632 c0cd                  rjmp  illegalop
+000633 c0cc                  rjmp  illegalop 
+000634 c0cb                  rjmp  illegalop 
+000635 c159                  rjmp  AND_zx 
+000636 c457                  rjmp  ROL_zx 
+000637 c0c8                  rjmp  illegalop 
+000638 ce36                  rjmp  SEC_s
+000639 c131                  rjmp  AND_y
+00063a c0c5                  rjmp  illegalop
+00063b c0c4                  rjmp  illegalop 
+00063c c0c3                  rjmp  illegalop 
+00063d c124                  rjmp  AND_x 
+00063e c446                  rjmp  ROL_x
+00063f c0c0                  rjmp  illegalop 
+000640 cf65                  rjmp  RTI_s       ;0x40
+000641 c238                  rjmp  EOR_zxi 
+000642 c0bd                  rjmp  illegalop 
+000643 c0bc                  rjmp  illegalop 
+000644 c0bb                  rjmp  illegalop 
+000645 c255                  rjmp  EOR_z 
+000646 c417                  rjmp  LSR_z 
+000647 c0b8                  rjmp  illegalop 
+000648 cdc5                  rjmp  PHA_s 
+000649 c262                  rjmp  EOR_m 
+00064a cdb0                  rjmp  LSR_s 
+00064b c0b4                  rjmp  illegalop 
+00064c cf15                  rjmp  JMP_a
+00064d c252                  rjmp  EOR_a 
+00064e c414                  rjmp  LSR_a 
+00064f c0b0                  rjmp  illegalop 
+000650 cee3                  rjmp  BVC_r       ;0x50
+000651 c235                  rjmp  EOR_ziy 
+000652 c0ad                  rjmp  illegalop 
+000653 c0ac                  rjmp  illegalop 
+000654 c0ab                  rjmp  illegalop 
+000655 c23f                  rjmp  EOR_zx 
+000656 c401                  rjmp  LSR_zx 
+000657 c0a8                  rjmp  illegalop 
+000658 cd68                  rjmp  CLI_s 
+000659 c217                  rjmp  EOR_y 
+00065a c0a5                  rjmp  illegalop 
+00065b c0a4                  rjmp  illegalop 
+00065c c0a3                  rjmp  illegalop 
+00065d c20a                  rjmp  EOR_x 
+00065e c3f0                  rjmp  LSR_x 
+00065f c0a0                  rjmp  illegalop 
+000660 cf30                  rjmp  RTS_s       ;0x60
+000661 c0b2                  rjmp  ADC_zxi 
+000662 c09d                  rjmp  illegalop 
+000663 c09c                  rjmp  illegalop 
+000664 c09b                  rjmp  illegalop 
+000665 c0cf                  rjmp  ADC_z 
+000666 c464                  rjmp  ROR_z 
+000667 c098                  rjmp  illegalop 
+000668 cdcb                  rjmp  PLA_s 
+000669 c0dc                  rjmp  ADC_m 
+00066a cdfa                  rjmp  ROR_s 
+00066b c094                  rjmp  illegalop 
+00066c ceeb                  rjmp  JMP_i 
+00066d c0cc                  rjmp  ADC_a 
+00066e c461                  rjmp  ROR_a 
+00066f c090                  rjmp  illegalop 
+000670 ced5                  rjmp  BVS_r       ;0x70
+000671 c0af                  rjmp  ADC_ziy 
+000672 c08d                  rjmp  illegalop 
+000673 c08c                  rjmp  illegalop 
+000674 c08b                  rjmp  illegalop 
+000675 c0b9                  rjmp  ADC_zx 
+000676 c44e                  rjmp  ROR_zx 
+000677 c088                  rjmp  illegalop 
+000678 ce06                  rjmp  SEI_s 
+000679 c091                  rjmp  ADC_y 
+00067a c085                  rjmp  illegalop 
+00067b c084                  rjmp  illegalop 
+00067c c083                  rjmp  illegalop 
+00067d c084                  rjmp  ADC_x 
+00067e c43d                  rjmp  ROR_x 
+00067f c080                  rjmp  illegalop 
+000680 c07f                  rjmp  illegalop   ;0x80
+000681 c4f1                  rjmp  STA_zxi 
+000682 c07d                  rjmp  illegalop 
+000683 c07c                  rjmp  illegalop 
+000684 c55c                  rjmp  STY_z 
+000685 c50e                  rjmp  STA_z 
+000686 c534                  rjmp  STX_z 
+000687 c078                  rjmp  illegalop 
+000688 cd54                  rjmp  DEY_s
+000689 c076                  rjmp  illegalop 
+00068a ce1f                  rjmp  TXA_s 
+00068b c074                  rjmp  illegalop 
+00068c c558                  rjmp  STY_a 
+00068d c50b                  rjmp  STA_a 
+00068e c531                  rjmp  STX_a 
+00068f c070                  rjmp  illegalop 
+000690 ce37                  rjmp  BCC_r       ;0x90
+000691 c4ee                  rjmp  STA_ziy 
+000692 c06d                  rjmp  illegalop 
+000693 c06c                  rjmp  illegalop 
+000694 c547                  rjmp  STY_zx 
+000695 c4f8                  rjmp  STA_zx 
+000696 c51e                  rjmp  STX_zy 
+000697 c068                  rjmp  illegalop 
+000698 ce24                  rjmp  TYA_s 
+000699 c4d0                  rjmp  STA_y 
+00069a ce1a                  rjmp  TXS_s 
+00069b c064                  rjmp  illegalop 
+00069c c063                  rjmp  illegalop 
+00069d c4c3                  rjmp  STA_x 
+00069e c061                  rjmp  illegalop 
+00069f c060                  rjmp  illegalop 
+0006a0 c2bc                  rjmp  LDY_m       ;0xa0
+0006a1 c22a                  rjmp  LDA_zxi 
+0006a2 c28b                  rjmp  LDX_m 
+0006a3 c05c                  rjmp  illegalop 
+0006a4 c2a6                  rjmp  LDY_z 
+0006a5 c247                  rjmp  LDA_z 
+0006a6 c275                  rjmp  LDX_z 
+0006a7 c058                  rjmp  illegalop 
+0006a8 cdeb                  rjmp  TAY_s 
+0006a9 c255                  rjmp  LDA_m 
+0006aa cdde                  rjmp  TAX_s 
+0006ab c054                  rjmp  illegalop 
+0006ac c2a3                  rjmp  LDY_a
+0006ad c244                  rjmp  LDA_a 
+0006ae c272                  rjmp  LDX_a 
+0006af c050                  rjmp  illegalop 
+0006b0 ce29                  rjmp  BCS_r       ;0xb0
+0006b1 c227                  rjmp  LDA_ziy 
+0006b2 c04d                  rjmp  illegalop 
+0006b3 c04c                  rjmp  illegalop 
+0006b4 c290                  rjmp  LDY_zx 
+0006b5 c231                  rjmp  LDA_zx 
+0006b6 c25f                  rjmp  LDX_zy 
+0006b7 c048                  rjmp  illegalop 
+0006b8 cd12                  rjmp  CLV_s 
+0006b9 c209                  rjmp  LDA_y 
+0006ba cde4                  rjmp  TSX_s 
+0006bb c044                  rjmp  illegalop 
+0006bc c27f                  rjmp  LDY_x 
+0006bd c1fc                  rjmp  LDA_x 
+0006be c24e                  rjmp  LDX_y 
+0006bf c040                  rjmp  illegalop 
+0006c0 c199                  rjmp  CPY_m       ;0xc0
+0006c1 c128                  rjmp  CMP_zxi 
+0006c2 c03d                  rjmp  illegalop 
+0006c3 c03c                  rjmp  illegalop 
+0006c4 c184                  rjmp  CPY_z 
+0006c5 c145                  rjmp  CMP_z 
+0006c6 c43b                  rjmp  DEC_z 
+0006c7 c038                  rjmp  illegalop 
+0006c8 cd28                  rjmp  INY_s 
+0006c9 c152                  rjmp  CMP_m 
+0006ca cd08                  rjmp  DEX_s 
+0006cb c034                  rjmp  illegalop 
+0006cc c181                  rjmp  CPY_a 
+0006cd c142                  rjmp  CMP_a 
+0006ce c438                  rjmp  DEC_a 
+0006cf c030                  rjmp  illegalop 
+0006d0 ce3f                  rjmp  BNE_r       ;0xd0
+0006d1 c125                  rjmp  CMP_ziy 
+0006d2 c02d                  rjmp  illegalop 
+0006d3 c02c                  rjmp  illegalop 
+0006d4 c02b                  rjmp  illegalop 
+0006d5 c12f                  rjmp  CMP_zx 
+0006d6 c425                  rjmp  DEC_zx 
+0006d7 c028                  rjmp  illegalop 
+0006d8 cce0                  rjmp  CLD_s 
+0006d9 c107                  rjmp  CMP_y 
+0006da c025                  rjmp  illegalop 
+0006db c024                  rjmp  illegalop 
+0006dc c023                  rjmp  illegalop 
+0006dd c0fa                  rjmp  CMP_x
+0006de c414                  rjmp  DEC_x 
+0006df c020                  rjmp  illegalop 
+0006e0 c15a                  rjmp  CPX_m       ;0xe0
+0006e1 c2ed                  rjmp  SBC_zxi 
+0006e2 c01d                  rjmp  illegalop 
+0006e3 c01c                  rjmp  illegalop 
+0006e4 c145                  rjmp  CPX_z 
+0006e5 c30a                  rjmp  SBC_z 
+0006e6 c452                  rjmp  INC_z 
+0006e7 c018                  rjmp  illegalop 
+0006e8 ccfe                  rjmp  INX_s 
+0006e9 c317                  rjmp  SBC_m 
+0006ea cd19                  rjmp  NOP_s 
+0006eb c014                  rjmp  illegalop 
+0006ec c142                  rjmp  CPX_a 
+0006ed c307                  rjmp  SBC_a 
+0006ee c44f                  rjmp  INC_a 
+0006ef c010                  rjmp  illegalop 
+0006f0 cdfb                  rjmp  BEQ_r       ;0xf0
+0006f1 c2ea                  rjmp  SBC_ziy 
+0006f2 c00d                  rjmp  illegalop 
+0006f3 c00c                  rjmp  illegalop 
+0006f4 c00b                  rjmp  illegalop 
+0006f5 c2f4                  rjmp  SBC_zx 
+0006f6 c43c                  rjmp  INC_zx 
+0006f7 c008                  rjmp  illegalop 
+0006f8 cd7e                  rjmp  SED_s 
+0006f9 c2cc                  rjmp  SBC_y 
+0006fa c005                  rjmp  illegalop 
+0006fb c004                  rjmp  illegalop 
+0006fc c003                  rjmp  illegalop 
+0006fd c2bf                  rjmp  SBC_x 
+0006fe c42b                  rjmp  INC_x 
+0006ff c000                  rjmp  illegalop 
+                 ;*****************************************************************
+                 ;
+                 ; Exceptions
+                 ;
+                 ;*****************************************************************
+                 
+                 ; illegal opcode
+                 illegalop:
+000700 940c 154b    jmp  deb_inv_op     ;extension
+                 
+                 ; indirect addresspointer exceeded end of zeropage - NOT IMPLEMENTED
+                 ;zp_wrap:    rjmp  zp_wrap     ;diag will be added later
+                 
+                 ; stackpointer exceeded end of stackpage - NOT IMPLEMENTED!
+                 ; sp_wrap:    rjmp  sp_wrap     ;diag will be added later
+                 
+                 ; attempt to write to protected romspace - NOT implemented
+                 ;rom_wrt:    rjmp  rom_wrt     ;diag will be added later
+                 
+                 ;*****************************************************************
+                 ;
+                 ; Memory read instructions
+                 ;     Load, arithmetic & logical
+                 ;
+                 ;*****************************************************************
+                 
+                 ; opcode:         ADC
+000702 b3c3
+000703 bb88
+000704 bb9b
+000705 9601
+000706 7e3f
+000707 0dc8
+000708 b3d3
+000709 1dd7
+00070a c035                  adgen_x     ADC_        ;abs,X
+00070b b3c3
+00070c bb88
+00070d bb9b
+00070e 9601
+00070f 7e3f
+000710 0dc9
+000711 b3d3
+000712 1dd7
+000713 c02c                  adgen_y     ADC_        ;abs,Y
+000714 b3c3
+000715 0dc8
+000716 bbc8
+000717 ba7b
+000718 95c3
+000719 6130
+00071a 0000
+00071b b303
+00071c bbc8
+00071d 2fc0
+00071e c000
+00071f b3d3
+000720 c01f                  adgen_zxi   ADC_        ;(ZP,X) indexed indirect
+000721 b3c3
+000722 bbc8
+000723 ba7b
+000724 95c3
+000725 6130
+000726 0000
+000727 b303
+000728 bbc8
+000729 2fc0
+00072a 0dc9
+00072b 0000
+00072c b3d3
+00072d 1dd7
+00072e c011                  adgen_ziy   ADC_        ;(ZP),Y indirect indexed
+00072f b3c3
+000730 0dc8
+000731 bbc8
+000732 ba7b
+000733 27dd
+000734 c011                  adgen_zx    ADC_        ;ZP,X
+000735 b3c3
+000736 bbc8
+000737 ba7b
+000738 27dd
+000739 c00c                  adgen_z     ADC_        ;ZP absolute
+00073a b3c3
+00073b bb88
+00073c bb9b
+00073d 9601
+00073e 7e3f
+00073f b3d3      ADC_a:      adgen_a                 ;absolute
+                 
+000740 bbc8
+000741 bbdb
+000742 3bdf
+000743 f411
+000744 d4bd
+000745 c001      ADC_o:      op_fetch                ;common entry after address generate
+000746 b2a3      ADC_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+                 
+000747 fd63                  sbrc  stat2,3           ;test decimal flag
+000748 c00f                  rjmp  ADC_d
+000749 bf7f                  out   sreg,stat         ;get C
+00074a 1d5a                  adc   rega,operand      ;AVR emulated OP
+00074b b77f                  in    stat,sreg         ;save NZC
+00074c fb73                  bst   stat,3            ;save V
+00074d f966                  bld   stat2,6
+                 
+00074e bb88
+00074f bb9b
+000750 9478
+000751 9601
+000752 94f8
+000753 b3e3
+000754 bb88
+000755 bb9b
+000756 9601
+000757 9409      ADC_d3:     op_decode               ;next instruction
+                 
+000758 595a      ADC_d:      addi  rega,0x66         ;decimal correction
+000759 bf7f                  out   sreg,stat
+00075a 1d5a                  adc   rega,operand
+00075b b77f                  in    stat,sreg
+00075c f010                  brcs  ADC_d2            ;MSD
+00075d 5650                  subi  rega,0x60
+00075e bf7f                  out   sreg,stat
+00075f f375      ADC_d2:     brhs  ADC_d3            ;LSD
+000760 5056                  subi  rega,0x06
+000761 cfec                  rjmp  ADC_d3
+                 
+                 ; opcode:         AND
+000762 b3c3
+000763 bb88
+000764 bb9b
+000765 9601
+000766 7e3f
+000767 0dc8
+000768 b3d3
+000769 1dd7
+00076a c035                  adgen_x     AND_        ;abs,X
+00076b b3c3
+00076c bb88
+00076d bb9b
+00076e 9601
+00076f 7e3f
+000770 0dc9
+000771 b3d3
+000772 1dd7
+000773 c02c                  adgen_y     AND_        ;abs,Y
+000774 b3c3
+000775 0dc8
+000776 bbc8
+000777 ba7b
+000778 95c3
+000779 6130
+00077a 0000
+00077b b303
+00077c bbc8
+00077d 2fc0
+00077e c000
+00077f b3d3
+000780 c01f                  adgen_zxi   AND_        ;(ZP,X) indexed indirect
+000781 b3c3
+000782 bbc8
+000783 ba7b
+000784 95c3
+000785 6130
+000786 0000
+000787 b303
+000788 bbc8
+000789 2fc0
+00078a 0dc9
+00078b 0000
+00078c b3d3
+00078d 1dd7
+00078e c011                  adgen_ziy   AND_        ;(ZP),Y indirect indexed
+00078f b3c3
+000790 0dc8
+000791 bbc8
+000792 ba7b
+000793 27dd
+000794 c011                  adgen_zx    AND_        ;ZP,X
+000795 b3c3
+000796 bbc8
+000797 ba7b
+000798 27dd
+000799 c00c                  adgen_z     AND_        ;ZP absolute
+00079a b3c3
+00079b bb88
+00079c bb9b
+00079d 9601
+00079e 7e3f
+00079f b3d3      AND_a:      adgen_a                 ;absolute
+                 
+0007a0 bbc8
+0007a1 bbdb
+0007a2 3bdf
+0007a3 f411
+0007a4 d45d
+0007a5 c001      AND_o:      op_fetch                ;common entry after address generate
+0007a6 b2a3      AND_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+                 
+0007a7 bf7f                  out   sreg,stat         ;keep C
+0007a8 215a                  and   rega,operand      ;AVR emulated OP
+0007a9 b77f                  in    stat,sreg         ;save NZ, keep C
+                 
+0007aa bb88
+0007ab bb9b
+0007ac 9478
+0007ad 9601
+0007ae 94f8
+0007af b3e3
+0007b0 bb88
+0007b1 bb9b
+0007b2 9601
+0007b3 9409                  op_decode               ;next instruction
+                 
+                 ; opcode:         BIT
+0007b4 b3c3
+0007b5 bbc8
+0007b6 ba7b
+0007b7 27dd
+0007b8 c00c                  adgen_z     BIT_        ;ZP absolute
+0007b9 b3c3
+0007ba bb88
+0007bb bb9b
+0007bc 9601
+0007bd 7e3f
+0007be b3d3      BIT_a:      adgen_a                 ;absolute
+                 
+0007bf bbc8
+0007c0 bbdb
+0007c1 3bdf
+0007c2 f411
+0007c3 d43e
+0007c4 c001      BIT_o:      op_fetch                ;common entry after address generate
+0007c5 b2a3      BIT_m:      in    operand,dbusin
+                 
+0007c6 2f05                  mov   a,rega            ;keep A
+0007c7 bf7f                  out   sreg,stat         ;keep C
+0007c8 210a                  and   a,operand         ;A & M -> Z
+0007c9 b77f                  in    stat,sreg
+0007ca faa6                  bst   operand,6         ;M6 -> V
+0007cb f966                  bld   stat2,6
+0007cc faa7                  bst   operand,7         ;M7 -> N
+0007cd f972                  bld   stat,2
+                 
+0007ce bb88
+0007cf bb9b
+0007d0 9478
+0007d1 9601
+0007d2 94f8
+0007d3 b3e3
+0007d4 bb88
+0007d5 bb9b
+0007d6 9601
+0007d7 9409                  op_decode               ;next instruction
+                 
+                 ; opcode:         CMP
+                 ; a compare in a 6502 works with reversed carry opposed to an AVR
+                 ; the reason: a 6502 performs an add with complemented operand as a compare
+0007d8 b3c3
+0007d9 bb88
+0007da bb9b
+0007db 9601
+0007dc 7e3f
+0007dd 0dc8
+0007de b3d3
+0007df 1dd7
+0007e0 c035                  adgen_x     CMP_        ;abs,X
+0007e1 b3c3
+0007e2 bb88
+0007e3 bb9b
+0007e4 9601
+0007e5 7e3f
+0007e6 0dc9
+0007e7 b3d3
+0007e8 1dd7
+0007e9 c02c                  adgen_y     CMP_        ;abs,Y
+0007ea b3c3
+0007eb 0dc8
+0007ec bbc8
+0007ed ba7b
+0007ee 95c3
+0007ef 6130
+0007f0 0000
+0007f1 b303
+0007f2 bbc8
+0007f3 2fc0
+0007f4 c000
+0007f5 b3d3
+0007f6 c01f                  adgen_zxi   CMP_        ;(ZP,X) indexed indirect
+0007f7 b3c3
+0007f8 bbc8
+0007f9 ba7b
+0007fa 95c3
+0007fb 6130
+0007fc 0000
+0007fd b303
+0007fe bbc8
+0007ff 2fc0
+000800 0dc9
+000801 0000
+000802 b3d3
+000803 1dd7
+000804 c011                  adgen_ziy   CMP_        ;(ZP),Y indirect indexed
+000805 b3c3
+000806 0dc8
+000807 bbc8
+000808 ba7b
+000809 27dd
+00080a c011                  adgen_zx    CMP_        ;ZP,X
+00080b b3c3
+00080c bbc8
+00080d ba7b
+00080e 27dd
+00080f c00c                  adgen_z     CMP_        ;ZP absolute
+000810 b3c3
+000811 bb88
+000812 bb9b
+000813 9601
+000814 7e3f
+000815 b3d3      CMP_a:      adgen_a                 ;absolute
+                 
+000816 bbc8
+000817 bbdb
+000818 3bdf
+000819 f411
+00081a d3e7
+00081b c001      CMP_o:      op_fetch                ;common entry after address generate
+00081c b2a3      CMP_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+                 
+00081d 155a                  cp    rega,operand      ;AVR emulated OP
+00081e b77f                  in    stat,sreg         ;save NZC
+00081f 2576                  eor   stat,one          ;invert C
+                 
+000820 bb88
+000821 bb9b
+000822 9478
+000823 9601
+000824 94f8
+000825 b3e3
+000826 bb88
+000827 bb9b
+000828 9601
+000829 9409                  op_decode               ;next instruction
+                 
+                 ; opcode:         CPX
+                 ; a compare in a 6502 works with reversed carry opposed to an AVR
+                 ; the reason: a 6502 performs an add with complemented operand as a compare
+00082a b3c3
+00082b bbc8
+00082c ba7b
+00082d 27dd
+00082e c00c                  adgen_z     CPX_        ;ZP absolute
+00082f b3c3
+000830 bb88
+000831 bb9b
+000832 9601
+000833 7e3f
+000834 b3d3      CPX_a:      adgen_a                 ;absolute
+                 
+000835 bbc8
+000836 bbdb
+000837 3bdf
+000838 f411
+000839 d3c8
+00083a c001      CPX_o:      op_fetch                ;common entry after address generate
+00083b b2a3      CPX_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+                 
+00083c 148a                  cp    regx,operand      ;AVR emulated OP
+00083d b77f                  in    stat,sreg         ;save NZC
+00083e 2576                  eor   stat,one          ;invert C
+                 
+00083f bb88
+000840 bb9b
+000841 9478
+000842 9601
+000843 94f8
+000844 b3e3
+000845 bb88
+000846 bb9b
+000847 9601
+000848 9409                  op_decode               ;next instruction
+                 
+                 ; opcode:         CPY
+                 ; a compare in a 6502 works with reversed carry opposed to an AVR
+                 ; the reason: a 6502 performs an add with complemented operand as a compare
+000849 b3c3
+00084a bbc8
+00084b ba7b
+00084c 27dd
+00084d c00c                  adgen_z     CPY_        ;ZP absolute
+00084e b3c3
+00084f bb88
+000850 bb9b
+000851 9601
+000852 7e3f
+000853 b3d3      CPY_a:      adgen_a                 ;absolute
+                 
+000854 bbc8
+000855 bbdb
+000856 3bdf
+000857 f411
+000858 d3a9
+000859 c001      CPY_o:      op_fetch                ;common entry after address generate
+00085a b2a3      CPY_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+                 
+00085b 149a                  cp    regy,operand      ;AVR emulated OP
+00085c b77f                  in    stat,sreg         ;save NZC
+00085d 2576                  eor   stat,one          ;invert C
+                 
+00085e bb88
+00085f bb9b
+000860 9478
+000861 9601
+000862 94f8
+000863 b3e3
+000864 bb88
+000865 bb9b
+000866 9601
+000867 9409                  op_decode               ;next instruction
+                 
+                 ; opcode:         EOR
+000868 b3c3
+000869 bb88
+00086a bb9b
+00086b 9601
+00086c 7e3f
+00086d 0dc8
+00086e b3d3
+00086f 1dd7
+000870 c035                  adgen_x     EOR_        ;abs,X
+000871 b3c3
+000872 bb88
+000873 bb9b
+000874 9601
+000875 7e3f
+000876 0dc9
+000877 b3d3
+000878 1dd7
+000879 c02c                  adgen_y     EOR_        ;abs,Y
+00087a b3c3
+00087b 0dc8
+00087c bbc8
+00087d ba7b
+00087e 95c3
+00087f 6130
+000880 0000
+000881 b303
+000882 bbc8
+000883 2fc0
+000884 c000
+000885 b3d3
+000886 c01f                  adgen_zxi   EOR_        ;(ZP,X) indexed indirect
+000887 b3c3
+000888 bbc8
+000889 ba7b
+00088a 95c3
+00088b 6130
+00088c 0000
+00088d b303
+00088e bbc8
+00088f 2fc0
+000890 0dc9
+000891 0000
+000892 b3d3
+000893 1dd7
+000894 c011                  adgen_ziy   EOR_        ;(ZP),Y indirect indexed
+000895 b3c3
+000896 0dc8
+000897 bbc8
+000898 ba7b
+000899 27dd
+00089a c011                  adgen_zx    EOR_        ;ZP,X
+00089b b3c3
+00089c bbc8
+00089d ba7b
+00089e 27dd
+00089f c00c                  adgen_z     EOR_            ;ZP absolute
+0008a0 b3c3
+0008a1 bb88
+0008a2 bb9b
+0008a3 9601
+0008a4 7e3f
+0008a5 b3d3      EOR_a:      adgen_a                 ;absolute
+                 
+0008a6 bbc8
+0008a7 bbdb
+0008a8 3bdf
+0008a9 f411
+0008aa d357
+0008ab c001      EOR_o:      op_fetch                ;common entry after address generate
+0008ac b2a3      EOR_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+                 
+0008ad bf7f                  out   sreg,stat         ;keep C
+0008ae 255a                  eor   rega,operand      ;AVR emulated OP
+0008af b77f                  in    stat,sreg         ;save NZ, keep C
+                 
+0008b0 bb88
+0008b1 bb9b
+0008b2 9478
+0008b3 9601
+0008b4 94f8
+0008b5 b3e3
+0008b6 bb88
+0008b7 bb9b
+0008b8 9601
+0008b9 9409                  op_decode               ;next instruction
+                 
+                 ; opcode:         LDA
+0008ba b3c3
+0008bb bb88
+0008bc bb9b
+0008bd 9601
+0008be 7e3f
+0008bf 0dc8
+0008c0 b3d3
+0008c1 1dd7
+0008c2 c035                  adgen_x     LDA_        ;abs,X
+0008c3 b3c3
+0008c4 bb88
+0008c5 bb9b
+0008c6 9601
+0008c7 7e3f
+0008c8 0dc9
+0008c9 b3d3
+0008ca 1dd7
+0008cb c02c                  adgen_y     LDA_        ;abs,Y
+0008cc b3c3
+0008cd 0dc8
+0008ce bbc8
+0008cf ba7b
+0008d0 95c3
+0008d1 6130
+0008d2 0000
+0008d3 b303
+0008d4 bbc8
+0008d5 2fc0
+0008d6 c000
+0008d7 b3d3
+0008d8 c01f                  adgen_zxi   LDA_        ;(ZP,X) indexed indirect
+0008d9 b3c3
+0008da bbc8
+0008db ba7b
+0008dc 95c3
+0008dd 6130
+0008de 0000
+0008df b303
+0008e0 bbc8
+0008e1 2fc0
+0008e2 0dc9
+0008e3 0000
+0008e4 b3d3
+0008e5 1dd7
+0008e6 c011                  adgen_ziy   LDA_        ;(ZP),Y indirect indexed
+0008e7 b3c3
+0008e8 0dc8
+0008e9 bbc8
+0008ea ba7b
+0008eb 27dd
+0008ec c012                  adgen_zx    LDA_        ;ZP,X
+0008ed b3c3
+0008ee bbc8
+0008ef ba7b
+0008f0 27dd
+0008f1 c00d                  adgen_z     LDA_        ;ZP absolute
+0008f2 b3c3
+0008f3 bb88
+0008f4 bb9b
+0008f5 9601
+0008f6 7e3f
+0008f7 b3d3      LDA_a:      adgen_a                 ;absolute
+                 
+0008f8 bbc8
+0008f9 bbdb
+0008fa 3bdf
+0008fb f419
+0008fc d305
+0008fd 2d5a
+0008fe c001      LDA_o:      reg_fetch rega          ;common entry after address generate
+0008ff b353      LDA_m:      in    rega,dbusin       ;same for immediate
+                 
+000900 bf7f
+000901 2355
+000902 b77f                  flags_gen_nz rega
+                 
+000903 bb88
+000904 bb9b
+000905 9478
+000906 9601
+000907 94f8
+000908 b3e3
+000909 bb88
+00090a bb9b
+00090b 9601
+00090c 9409                  op_decode               ;next instruction
+                 
+                 ; opcode:         LDX
+00090d b3c3
+00090e bb88
+00090f bb9b
+000910 9601
+000911 7e3f
+000912 0dc9
+000913 b3d3
+000914 1dd7
+000915 c011                  adgen_y     LDX_        ;abs,Y
+000916 b3c3
+000917 0dc9
+000918 bbc8
+000919 ba7b
+00091a 27dd
+00091b c012                  adgen_zy    LDX_        ;ZP,Y
+00091c b3c3
+00091d bbc8
+00091e ba7b
+00091f 27dd
+000920 c00d                  adgen_z     LDX_        ;ZP absolute
+000921 b3c3
+000922 bb88
+000923 bb9b
+000924 9601
+000925 7e3f
+000926 b3d3      LDX_a:      adgen_a                 ;absolute
+                 
+000927 bbc8
+000928 bbdb
+000929 3bdf
+00092a f419
+00092b d2d6
+00092c 2c8a
+00092d c001      LDX_o:      reg_fetch regx          ;common entry after address generate
+00092e b283      LDX_m:      in    regx,dbusin       ;same for immediate
+                 
+00092f bf7f
+000930 2088
+000931 b77f                  flags_gen_nz regx
+                 
+000932 bb88
+000933 bb9b
+000934 9478
+000935 9601
+000936 94f8
+000937 b3e3
+000938 bb88
+000939 bb9b
+00093a 9601
+00093b 9409                  op_decode               ;next instruction
+                 
+                 ; opcode:         LDY
+00093c b3c3
+00093d bb88
+00093e bb9b
+00093f 9601
+000940 7e3f
+000941 0dc8
+000942 b3d3
+000943 1dd7
+000944 c011                  adgen_x     LDY_        ;abs,X
+000945 b3c3
+000946 0dc8
+000947 bbc8
+000948 ba7b
+000949 27dd
+00094a c012                  adgen_zx    LDY_        ;ZP,X
+00094b b3c3
+00094c bbc8
+00094d ba7b
+00094e 27dd
+00094f c00d                  adgen_z     LDY_        ;ZP absolute
+000950 b3c3
+000951 bb88
+000952 bb9b
+000953 9601
+000954 7e3f
+000955 b3d3      LDY_a:      adgen_a                 ;absolute
+                 
+000956 bbc8
+000957 bbdb
+000958 3bdf
+000959 f419
+00095a d2a7
+00095b 2c9a
+00095c c001      LDY_o:      reg_fetch regy          ;common entry after address generate
+00095d b293      LDY_m:      in    regy,dbusin       ;same for immediate
+                 
+00095e bf7f
+00095f 2099
+000960 b77f                  flags_gen_nz regy
+                 
+000961 bb88
+000962 bb9b
+000963 9478
+000964 9601
+000965 94f8
+000966 b3e3
+000967 bb88
+000968 bb9b
+000969 9601
+00096a 9409                  op_decode               ;next instruction
+                 
+                 ; opcode:         ORA
+00096b b3c3
+00096c bb88
+00096d bb9b
+00096e 9601
+00096f 7e3f
+000970 0dc8
+000971 b3d3
+000972 1dd7
+000973 c035                  adgen_x     ORA_        ;abs,X
+000974 b3c3
+000975 bb88
+000976 bb9b
+000977 9601
+000978 7e3f
+000979 0dc9
+00097a b3d3
+00097b 1dd7
+00097c c02c                  adgen_y     ORA_        ;abs,Y
+00097d b3c3
+00097e 0dc8
+00097f bbc8
+000980 ba7b
+000981 95c3
+000982 6130
+000983 0000
+000984 b303
+000985 bbc8
+000986 2fc0
+000987 c000
+000988 b3d3
+000989 c01f                  adgen_zxi   ORA_        ;(ZP,X) indexed indirect
+00098a b3c3
+00098b bbc8
+00098c ba7b
+00098d 95c3
+00098e 6130
+00098f 0000
+000990 b303
+000991 bbc8
+000992 2fc0
+000993 0dc9
+000994 0000
+000995 b3d3
+000996 1dd7
+000997 c011                  adgen_ziy   ORA_        ;(ZP),Y indirect indexed
+000998 b3c3
+000999 0dc8
+00099a bbc8
+00099b ba7b
+00099c 27dd
+00099d c011                  adgen_zx    ORA_        ;ZP,X
+00099e b3c3
+00099f bbc8
+0009a0 ba7b
+0009a1 27dd
+0009a2 c00c                  adgen_z     ORA_        ;ZP absolute
+0009a3 b3c3
+0009a4 bb88
+0009a5 bb9b
+0009a6 9601
+0009a7 7e3f
+0009a8 b3d3      ORA_a:      adgen_a                 ;absolute
+                 
+0009a9 bbc8
+0009aa bbdb
+0009ab 3bdf
+0009ac f411
+0009ad d254
+0009ae c001      ORA_o:      op_fetch                ;common entry after address generate
+0009af b2a3      ORA_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+                 
+0009b0 bf7f                  out   sreg,stat         ;keep C
+0009b1 295a                  or    rega,operand      ;AVR emulated OP
+0009b2 b77f                  in    stat,sreg         ;save NZ, keep C
+                 
+0009b3 bb88
+0009b4 bb9b
+0009b5 9478
+0009b6 9601
+0009b7 94f8
+0009b8 b3e3
+0009b9 bb88
+0009ba bb9b
+0009bb 9601
+0009bc 9409                  op_decode               ;next instruction
+                 
+                 ; opcode:         SBC
+                 ; subtraction in a 6502 works with reversed carry, borrow = !carry
+                 ; the reason: a 6502 performs an add with complemented operand during subtract
+0009bd b3c3
+0009be bb88
+0009bf bb9b
+0009c0 9601
+0009c1 7e3f
+0009c2 0dc8
+0009c3 b3d3
+0009c4 1dd7
+0009c5 c035                  adgen_x     SBC_        ;abs,X
+0009c6 b3c3
+0009c7 bb88
+0009c8 bb9b
+0009c9 9601
+0009ca 7e3f
+0009cb 0dc9
+0009cc b3d3
+0009cd 1dd7
+0009ce c02c                  adgen_y     SBC_        ;abs,Y
+0009cf b3c3
+0009d0 0dc8
+0009d1 bbc8
+0009d2 ba7b
+0009d3 95c3
+0009d4 6130
+0009d5 0000
+0009d6 b303
+0009d7 bbc8
+0009d8 2fc0
+0009d9 c000
+0009da b3d3
+0009db c01f                  adgen_zxi   SBC_        ;(ZP,X) indexed indirect
+0009dc b3c3
+0009dd bbc8
+0009de ba7b
+0009df 95c3
+0009e0 6130
+0009e1 0000
+0009e2 b303
+0009e3 bbc8
+0009e4 2fc0
+0009e5 0dc9
+0009e6 0000
+0009e7 b3d3
+0009e8 1dd7
+0009e9 c011                  adgen_ziy   SBC_        ;(ZP),Y indirect indexed
+0009ea b3c3
+0009eb 0dc8
+0009ec bbc8
+0009ed ba7b
+0009ee 27dd
+0009ef c011                  adgen_zx    SBC_        ;ZP,X
+0009f0 b3c3
+0009f1 bbc8
+0009f2 ba7b
+0009f3 27dd
+0009f4 c00c                  adgen_z     SBC_        ;ZP absolute
+0009f5 b3c3
+0009f6 bb88
+0009f7 bb9b
+0009f8 9601
+0009f9 7e3f
+0009fa b3d3      SBC_a:      adgen_a                 ;absolute
+                 
+0009fb bbc8
+0009fc bbdb
+0009fd 3bdf
+0009fe f411
+0009ff d202
+000a00 c001      SBC_o:      op_fetch                ;common entry after address generate
+000a01 b2a3      SBC_m:      in    operand,dbusin    ;immediate & operand prefetched (z, zx, zy)
+                 
+000a02 94a0                  com   operand
+000a03 bf7f                  out   sreg,stat         ;get C
+000a04 1d5a                  adc   rega,operand      ;AVR emulated OP
+000a05 b77f                  in    stat,sreg         ;save NZC
+000a06 fb73                  bst   stat,3            ;save V
+000a07 f966                  bld   stat2,6
+                 
+000a08 ff63                  sbrs  stat2,3           ;test decimal flag
+000a09 c005                  rjmp  SBC_d             ;skip decimal mode correction
+                 
+000a0a f010                  brcs  SBC_d2            ;MSD correction
+000a0b 5650                  subi  rega,0x60
+000a0c bf7f                  out   sreg,stat
+000a0d f00d      SBC_d2:     brhs  SBC_d             ;LSD correction
+000a0e 5056                  subi  rega,0x06
+                 
+000a0f bb88
+000a10 bb9b
+000a11 9478
+000a12 9601
+000a13 94f8
+000a14 b3e3
+000a15 bb88
+000a16 bb9b
+000a17 9601
+000a18 9409      SBC_d:      op_decode               ;next instruction
+                 
+                 
+                 ;*****************************************************************
+                 ;
+                 ; Modify memory instructions
+                 ;     Shift, increment & decrement
+                 ;
+                 ;*****************************************************************
+                 
+                 ; opcode:         ASL
+000a19 b3c3
+000a1a bb88
+000a1b bb9b
+000a1c 9601
+000a1d 7e3f
+000a1e 0dc8
+000a1f b3d3
+000a20 1dd7
+000a21 c011                  adgen_x     ASL_        ;abs,X
+000a22 b3c3
+000a23 0dc8
+000a24 bbc8
+000a25 ba7b
+000a26 27dd
+000a27 c011                  adgen_zx    ASL_        ;ZP,X
+000a28 b3c3
+000a29 bbc8
+000a2a ba7b
+000a2b 27dd
+000a2c c00c                  adgen_z     ASL_        ;ZP absolute
+000a2d b3c3
+000a2e bb88
+000a2f bb9b
+000a30 9601
+000a31 7e3f
+000a32 b3d3      ASL_a:      adgen_a                 ;absolute
+                 
+000a33 bbc8
+000a34 bbdb
+000a35 3bdf
+000a36 f411
+000a37 d1c9
+000a38 c001      ASL_o:      op_fetch_modify         ;common entry after address generate
+000a39 b2a3      ASL_m:      in    operand,dbusin    ;operand prefetched (z, zx, zy)
+                 
+000a3a 0caa                  lsl   operand           ;AVR emulated OP
+000a3b b77f                  in    stat,sreg         ;save NZC
+                 
+000a3c 3bdf
+000a3d f081
+000a3e bae2
+000a3f baa5
+000a40 ba54
+000a41 bac2
+000a42 ba74
+000a43 bad2
+000a44 bb88
+000a45 bb9b
+000a46 9478
+000a47 9601
+000a48 94f8
+000a49 b3e3
+000a4a bb88
+000a4b bb9b
+000a4c 9601
+000a4d 9409
+000a4e c1b9                  store_modify
+                 
+                 ; opcode:         LSR
+000a4f b3c3
+000a50 bb88
+000a51 bb9b
+000a52 9601
+000a53 7e3f
+000a54 0dc8
+000a55 b3d3
+000a56 1dd7
+000a57 c011                  adgen_x     LSR_        ;abs,X
+000a58 b3c3
+000a59 0dc8
+000a5a bbc8
+000a5b ba7b
+000a5c 27dd
+000a5d c011                  adgen_zx    LSR_        ;ZP,X
+000a5e b3c3
+000a5f bbc8
+000a60 ba7b
+000a61 27dd
+000a62 c00c                  adgen_z     LSR_        ;ZP absolute
+000a63 b3c3
+000a64 bb88
+000a65 bb9b
+000a66 9601
+000a67 7e3f
+000a68 b3d3      LSR_a:      adgen_a                 ;absolute
+                 
+000a69 bbc8
+000a6a bbdb
+000a6b 3bdf
+000a6c f411
+000a6d d193
+000a6e c001      LSR_o:      op_fetch_modify         ;common entry after address generate
+000a6f b2a3      LSR_m:      in    operand,dbusin    ;operand prefetched (z, zx, zy)
+                 
+000a70 94a6                  lsr   operand           ;AVR emulated OP
+000a71 b77f                  in    stat,sreg         ;save NZC
+                 
+000a72 3bdf
+000a73 f081
+000a74 bae2
+000a75 baa5
+000a76 ba54
+000a77 bac2
+000a78 ba74
+000a79 bad2
+000a7a bb88
+000a7b bb9b
+000a7c 9478
+000a7d 9601
+000a7e 94f8
+000a7f b3e3
+000a80 bb88
+000a81 bb9b
+000a82 9601
+000a83 9409
+000a84 c183                  store_modify
+                 
+                 ; opcode:         ROL
+000a85 b3c3
+000a86 bb88
+000a87 bb9b
+000a88 9601
+000a89 7e3f
+000a8a 0dc8
+000a8b b3d3
+000a8c 1dd7
+000a8d c011                  adgen_x     ROL_        ;abs,X
+000a8e b3c3
+000a8f 0dc8
+000a90 bbc8
+000a91 ba7b
+000a92 27dd
+000a93 c011                  adgen_zx    ROL_        ;ZP,X
+000a94 b3c3
+000a95 bbc8
+000a96 ba7b
+000a97 27dd
+000a98 c00c                  adgen_z     ROL_        ;ZP absolute
+000a99 b3c3
+000a9a bb88
+000a9b bb9b
+000a9c 9601
+000a9d 7e3f
+000a9e b3d3      ROL_a:      adgen_a                 ;absolute
+                 
+000a9f bbc8
+000aa0 bbdb
+000aa1 3bdf
+000aa2 f411
+000aa3 d15d
+000aa4 c001      ROL_o:      op_fetch_modify         ;common entry after address generate
+000aa5 b2a3      ROL_m:      in    operand,dbusin    ;operand prefetched (z, zx, zy)
+                 
+000aa6 bf7f                  out   sreg,stat         ;get C
+000aa7 1caa                  rol   operand           ;AVR emulated OP
+000aa8 b77f                  in    stat,sreg         ;save NZC
+                 
+000aa9 3bdf
+000aaa f081
+000aab bae2
+000aac baa5
+000aad ba54
+000aae bac2
+000aaf ba74
+000ab0 bad2
+000ab1 bb88
+000ab2 bb9b
+000ab3 9478
+000ab4 9601
+000ab5 94f8
+000ab6 b3e3
+000ab7 bb88
+000ab8 bb9b
+000ab9 9601
+000aba 9409
+000abb c14c                  store_modify
+                 
+                 ; opcode:         ROR
+000abc b3c3
+000abd bb88
+000abe bb9b
+000abf 9601
+000ac0 7e3f
+000ac1 0dc8
+000ac2 b3d3
+000ac3 1dd7
+000ac4 c011                  adgen_x     ROR_        ;abs,X
+000ac5 b3c3
+000ac6 0dc8
+000ac7 bbc8
+000ac8 ba7b
+000ac9 27dd
+000aca c011                  adgen_zx    ROR_        ;ZP,X
+000acb b3c3
+000acc bbc8
+000acd ba7b
+000ace 27dd
+000acf c00c                  adgen_z     ROR_        ;ZP absolute
+000ad0 b3c3
+000ad1 bb88
+000ad2 bb9b
+000ad3 9601
+000ad4 7e3f
+000ad5 b3d3      ROR_a:      adgen_a                 ;absolute
+                 
+000ad6 bbc8
+000ad7 bbdb
+000ad8 3bdf
+000ad9 f411
+000ada d126
+000adb c001      ROR_o:      op_fetch_modify         ;common entry after address generate
+000adc b2a3      ROR_m:      in    operand,dbusin    ;operand prefetched (z, zx, zy)
+                 
+000add bf7f                  out   sreg,stat         ;get C
+000ade 94a7                  ror   operand           ;AVR emulated OP
+000adf b77f                  in    stat,sreg         ;save NZC
+                 
+000ae0 3bdf
+000ae1 f081
+000ae2 bae2
+000ae3 baa5
+000ae4 ba54
+000ae5 bac2
+000ae6 ba74
+000ae7 bad2
+000ae8 bb88
+000ae9 bb9b
+000aea 9478
+000aeb 9601
+000aec 94f8
+000aed b3e3
+000aee bb88
+000aef bb9b
+000af0 9601
+000af1 9409
+000af2 c115                  store_modify
+                 
+                 ; opcode:         DEC
+000af3 b3c3
+000af4 bb88
+000af5 bb9b
+000af6 9601
+000af7 7e3f
+000af8 0dc8
+000af9 b3d3
+000afa 1dd7
+000afb c011                  adgen_x     DEC_        ;abs,X
+000afc b3c3
+000afd 0dc8
+000afe bbc8
+000aff ba7b
+000b00 27dd
+000b01 c011                  adgen_zx    DEC_        ;ZP,X
+000b02 b3c3
+000b03 bbc8
+000b04 ba7b
+000b05 27dd
+000b06 c00c                  adgen_z     DEC_        ;ZP absolute
+000b07 b3c3
+000b08 bb88
+000b09 bb9b
+000b0a 9601
+000b0b 7e3f
+000b0c b3d3      DEC_a:      adgen_a                 ;absolute
+                 
+000b0d bbc8
+000b0e bbdb
+000b0f 3bdf
+000b10 f411
+000b11 d0ef
+000b12 c001      DEC_o:      op_fetch_modify         ;common entry after address generate
+000b13 b2a3      DEC_m:      in    operand,dbusin    ;operand prefetched (z, zx, zy)
+                 
+000b14 bf7f                  out   sreg,stat         ;keep C
+000b15 94aa                  dec   operand           ;AVR emulated OP
+000b16 b77f                  in    stat,sreg         ;save NZ, keep C
+                 
+000b17 3bdf
+000b18 f081
+000b19 bae2
+000b1a baa5
+000b1b ba54
+000b1c bac2
+000b1d ba74
+000b1e bad2
+000b1f bb88
+000b20 bb9b
+000b21 9478
+000b22 9601
+000b23 94f8
+000b24 b3e3
+000b25 bb88
+000b26 bb9b
+000b27 9601
+000b28 9409
+000b29 c0de                  store_modify
+                 
+                 ; opcode:         INC
+000b2a b3c3
+000b2b bb88
+000b2c bb9b
+000b2d 9601
+000b2e 7e3f
+000b2f 0dc8
+000b30 b3d3
+000b31 1dd7
+000b32 c011                  adgen_x     INC_        ;abs,X
+000b33 b3c3
+000b34 0dc8
+000b35 bbc8
+000b36 ba7b
+000b37 27dd
+000b38 c011                  adgen_zx    INC_        ;ZP,X
+000b39 b3c3
+000b3a bbc8
+000b3b ba7b
+000b3c 27dd
+000b3d c00c                  adgen_z     INC_        ;ZP absolute
+000b3e b3c3
+000b3f bb88
+000b40 bb9b
+000b41 9601
+000b42 7e3f
+000b43 b3d3      INC_a:      adgen_a                 ;absolute
+                 
+000b44 bbc8
+000b45 bbdb
+000b46 3bdf
+000b47 f411
+000b48 d0b8
+000b49 c001      INC_o:      op_fetch_modify         ;common entry after address generate
+000b4a b2a3      INC_m:      in    operand,dbusin    ;operand prefetched (z, zx, zy)
+                 
+000b4b bf7f                  out   sreg,stat         ;keep C
+000b4c 94a3                  inc   operand           ;AVR emulated OP
+000b4d b77f                  in    stat,sreg         ;save NZ, keep C
+                 
+000b4e 3bdf
+000b4f f081
+000b50 bae2
+000b51 baa5
+000b52 ba54
+000b53 bac2
+000b54 ba74
+000b55 bad2
+000b56 bb88
+000b57 bb9b
+000b58 9478
+000b59 9601
+000b5a 94f8
+000b5b b3e3
+000b5c bb88
+000b5d bb9b
+000b5e 9601
+000b5f 9409
+000b60 c0a7                  store_modify
+                 
+                 ;*****************************************************************
+                 ;
+                 ; Memory write instructions
+                 ;     Store register
+                 ;
+                 ;*****************************************************************
+                 
+                 ; opcode:         STA
+000b61 b3c3
+000b62 bb88
+000b63 bb9b
+000b64 9601
+000b65 7e3f
+000b66 0dc8
+000b67 b3d3
+000b68 1dd7
+000b69 c035                  adgen_x     STA_        ;abs,X
+000b6a b3c3
+000b6b bb88
+000b6c bb9b
+000b6d 9601
+000b6e 7e3f
+000b6f 0dc9
+000b70 b3d3
+000b71 1dd7
+000b72 c02c                  adgen_y     STA_        ;abs,Y
+000b73 b3c3
+000b74 0dc8
+000b75 bbc8
+000b76 ba7b
+000b77 95c3
+000b78 6130
+000b79 0000
+000b7a b303
+000b7b bbc8
+000b7c 2fc0
+000b7d c000
+000b7e b3d3
+000b7f c01f                  adgen_zxi   STA_        ;(ZP,X) indexed indirect
+000b80 b3c3
+000b81 bbc8
+000b82 ba7b
+000b83 95c3
+000b84 6130
+000b85 0000
+000b86 b303
+000b87 bbc8
+000b88 2fc0
+000b89 0dc9
+000b8a 0000
+000b8b b3d3
+000b8c 1dd7
+000b8d c011                  adgen_ziy   STA_        ;(ZP),Y indirect indexed
+000b8e b3c3
+000b8f 0dc8
+000b90 bbc8
+000b91 ba7b
+000b92 27dd
+000b93 c00f                  adgen_zx    STA_        ;ZP,X
+000b94 b3c3
+000b95 bbc8
+000b96 ba7b
+000b97 27dd
+000b98 c00a                  adgen_z     STA_        ;ZP absolute
+000b99 b3c3
+000b9a bb88
+000b9b bb9b
+000b9c 9601
+000b9d 7e3f
+000b9e b3d3      STA_a:      adgen_a                 ;absolute
+                 
+000b9f bbc8
+000ba0 bbdb
+000ba1 3bdf
+000ba2 f081
+000ba3 bae2
+000ba4 bb55
+000ba5 ba54
+000ba6 bac2
+000ba7 ba74
+000ba8 bad2
+000ba9 bb88
+000baa bb9b
+000bab 9478
+000bac 9601
+000bad 94f8
+000bae b3e3
+000baf bb88
+000bb0 bb9b
+000bb1 9601
+000bb2 9409
+000bb3 2ea5
+000bb4 c053      STA_o:      store_reg rega,STA_m    ;common entry after address generate
+                 
+                 ; opcode:         STX
+000bb5 b3c3
+000bb6 0dc9
+000bb7 bbc8
+000bb8 ba7b
+000bb9 27dd
+000bba c00f                  adgen_zy    STX_        ;ZP,y
+000bbb b3c3
+000bbc bbc8
+000bbd ba7b
+000bbe 27dd
+000bbf c00a                  adgen_z     STX_        ;ZP absolute
+000bc0 b3c3
+000bc1 bb88
+000bc2 bb9b
+000bc3 9601
+000bc4 7e3f
+000bc5 b3d3      STX_a:      adgen_a                 ;absolute
+                 
+000bc6 bbc8
+000bc7 bbdb
+000bc8 3bdf
+000bc9 f081
+000bca bae2
+000bcb ba85
+000bcc ba54
+000bcd bac2
+000bce ba74
+000bcf bad2
+000bd0 bb88
+000bd1 bb9b
+000bd2 9478
+000bd3 9601
+000bd4 94f8
+000bd5 b3e3
+000bd6 bb88
+000bd7 bb9b
+000bd8 9601
+000bd9 9409
+000bda 2ca8
+000bdb c02c      STX_o:      store_reg regx,STX_m    ;common entry after address generate
+                 
+                 ; opcode:         STY
+000bdc b3c3
+000bdd 0dc8
+000bde bbc8
+000bdf ba7b
+000be0 c00e                  adgen_s_zx  STY_        ;ZP,x
+000be1 b3c3
+000be2 bbc8
+000be3 ba7b
+000be4 c00a                  adgen_s_z   STY_        ;ZP absolute
+000be5 b3c3
+000be6 bb88
+000be7 bb9b
+000be8 9601
+000be9 7e3f
+000bea b3d3      STY_a:      adgen_a                 ;absolute
+                 
+000beb bbc8
+000bec bbdb
+000bed 3bdf
+000bee f081
+000bef bae2
+000bf0 ba95
+000bf1 ba54
+000bf2 bac2
+000bf3 ba74
+000bf4 bad2
+000bf5 bb88
+000bf6 bb9b
+000bf7 9478
+000bf8 9601
+000bf9 94f8
+000bfa b3e3
+000bfb bb88
+000bfc bb9b
+000bfd 9601
+000bfe 9409
+000bff 2ca9
+000c00 c007      STY_o:      store_reg regy,STY_m    ;common entry after address generate
+                 
+                       .endif
+                 
+                 ;**************************************************
+                 ;
+                 ; I/O page (iomap) address decode - emulated I/O
+                 ;
+                 ;**************************************************
+                       .ifdef iomap
+                          .include "6502_Emu_IO.inc"
+                 
+                 ; 6502 EMULATOR include
+                 ;     I/O page (iomap) address decode & emulated I/O
+                 ;
+                 ; Copyright (C) 2013-2015  Klaus Dormann
+                 ;
+                 ; This program is free software: you can redistribute it and/or modify
+                 ; it under the terms of the GNU General Public License as published by
+                 ; the Free Software Foundation, either version 3 of the License, or
+                 ; (at your option) any later version.
+                 ;
+                 ; This program is distributed in the hope that it will be useful,
+                 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
+                 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+                 ; GNU General Public License for more details.
+                 ;
+                 ; You should have received a copy of the GNU General Public License
+                 ; along with this program.  If not, see <http://www.gnu.org/licenses/>.
+                 ;
+                 .set  io_version = 832
+                 ;*****************************************************************
+                 ;
+                 ; IO macros
+                 ;
+                 ;*****************************************************************
+                 
+                 ;I/O address least significant nibble address decode 
+                 ;
+                 ;@0 = table of 16 addresses for decoded nibble (0x0 - 0xf)
+                 .macro   io_adr_dec
+                    .if (@0 & 0xff) > 0xf0
+                       .error "Address decode table @0 crosses a page boundary!"
+                    .endif
+                    ldi   zh,high(@0)       ;register address decode
+                    mov   zl,oplow          ;lower byte
+                    andi  zl,0xf            ;lower 4 bits
+                    addi  zl,low(@0)        ;add offset
+                    ijmp                    ;address specific code
+                 .endmacro
+                 
+                 ;macro set IO select pin
+                 ;
+                 ;@0 = io_strobe pin direct (1-3) or extended (10-17, 20-27, 30-37)
+                 .macro   set_io_select
+                    out   cbus,clear        ;turn off -OE to RAM
+                    .set io_select = @0
+                    .if   io_select > 3     ;generate strobe
+                       .set  io_select = io_select -10
+                       .if   io_select < 8 
+                          ldi   b,ios1_default    ;precharge IO-select register  
+                          .set  io_strobe_pol = !((ios1_default >> io_select) & 1)
+                          .set  io_sel_direct = 6 ;bit to enable extension register
+                       .else
+                          .set  io_select = io_select -10
+                          .if   io_select < 8 
+                             ldi   b,ios2_default    ;precharge IO-select register
+                             .set  io_strobe_pol = !((ios2_default >> io_select) & 1)
+                             .set  io_sel_direct = 7 ;bit to enable extension register
+                          .else
+                             .set  io_select = io_select -10
+                             ldi   b,ios3_default    ;precharge IO-select register
+                             .set  io_strobe_pol = !((ios3_default >> io_select) & 1)
+                             .set  io_sel_direct = 2 ;bit to enable extension register
+                          .endif
+                       .endif
+                       out   abushi,b      
+                       sbi   cbus,io_sel_direct   ;make register transparent
+                    .else
+                       .set io_sel_direct = 0
+                       .if (io_select == 3)       ;translate to pin
+                          .set io_select = 2
+                       .else
+                          .set io_select = io_select + 5
+                       .endif
+                    .endif
+                 .endmacro
+                 
+                 ;macro set IO selectpin and keep reset pin low
+                 ;
+                 ;@0 io_strobe pin direct (1-3) or extended (10-17, 20-27, 30-37)
+                 .macro   set_io_reset
+                    out   cbus,clear        ;turn off -OE to RAM
+                    .set io_select = @0
+                    .if   io_select > 3     ;generate strobe
+                       .set  io_select = io_select -10
+                       .if   io_select < 8 
+                          ldi   b,ios1_default    ;precharge IO-select register  
+                          .set  io_strobe_pol = !((ios1_default >> io_select) & 1)
+                          .set  io_sel_direct = 6 ;bit to enable extension register
+                       .else
+                          .set  io_select = io_select -10
+                          .if   io_select < 8 
+                             ldi   b,ios2_default    ;precharge IO-select register
+                             .set  io_strobe_pol = !((ios2_default >> io_select) & 1)
+                             .set  io_sel_direct = 7 ;bit to enable extension register
+                          .else
+                             .set  io_select = io_select -10
+                             ldi   b,ios3_default    ;precharge IO-select register
+                             .set  io_strobe_pol = !((ios3_default >> io_select) & 1)
+                             .set  io_sel_direct = 2 ;bit to enable extension register
+                          .endif
+                       .endif
+                       .ifdef io_reset_pin
+                          .if   (@0 & 0x30) == (io_reset_pin & 0x30)
+                             cbr   b,(1 << (io_reset_pin & 7))
+                          .endif
+                       .endif
+                       out   abushi,b      
+                       sbi   cbus,io_sel_direct   ;make register transparent
+                    .else
+                       .set io_sel_direct = 0
+                       .if (io_select == 3)       ;translate to pin
+                          .set io_select = 2
+                       .else
+                          .set io_select = io_select + 5
+                       .endif
+                    .endif
+                 .endmacro
+                 
+                 ;macro prepare IO select pin
+                 ;use with make_io_select, precharges yl & yh with strobe
+                 ;
+                 ;@0 = io_strobe pin direct (1-3) or extended (10-17, 20-27, 30-37)
+                 .macro   prep_io_select
+                    .set io_select = @0
+                    .if   io_select > 3     ;generate strobe
+                       .set  io_select = io_select -10
+                       .if   io_select < 8 
+                          ldi   b,ios1_default    ;precharge IO-select register  
+                          ldi   yl,ios1_default^(1<<io_select)
+                          .set  io_strobe_pol = !((ios1_default >> io_select) & 1)
+                          .set  io_sel_direct = 6 ;bit to enable extension register
+                       .else
+                          .set  io_select = io_select -10
+                          .if   io_select < 8 
+                             ldi   b,ios2_default    ;precharge IO-select register
+                             ldi   yl,ios2_default^(1<<io_select)
+                             .set  io_strobe_pol = !((ios2_default >> io_select) & 1)
+                             .set  io_sel_direct = 7 ;bit to enable extension register
+                          .else
+                             .set  io_select = io_select -10
+                             ldi   b,ios3_default    ;precharge IO-select register
+                             ldi   yl,ios3_default^(1<<io_select)
+                             .set  io_strobe_pol = !((ios3_default >> io_select) & 1)
+                             .set  io_sel_direct = 2 ;bit to enable extension register
+                          .endif
+                       .endif
+                       ldi   yh,0x30|(1<<io_sel_direct)
+                    .else
+                       .set io_sel_direct = 0
+                       .if (io_select == 3)       ;translate to pin
+                          .set io_select = 2
+                       .else
+                          .set io_select = io_select + 5
+                       .endif
+                       ldi   yh,0x30|(1<<io_select)
+                    .endif
+                 .endmacro
+                 
+                 ;macro make IO select pin
+                 ;
+                 .macro   make_io_select
+                    .if (io_sel_direct > 0)
+                       out   abushi,yl      
+                    .endif
+                    out   cbus,yh
+                 .endmacro
+                 
+                 ;macro enable IO select pin
+                 ;
+                 .macro   ena_io_select
+                    .if (io_sel_direct > 0)
+                       .if io_strobe_pol
+                          sbi   abushi,io_select     ;strobe high
+                       .else
+                          cbi   abushi,io_select     ;strobe low
+                       .endif
+                    .else
+                       sbi   cbus,io_select       ;strobe high
+                    .endif
+                 .endmacro
+                 
+                 ;macro disable IO select pin
+                 ;
+                 .macro   dis_io_select
+                    .if (io_sel_direct > 0)
+                       out   abushi,b             ;end strobe
+                    .else
+                       out   cbus,clear           ;end strobe
+                    .endif
+                 .endmacro
+                 
+                 ;macro disable SPI select pin
+                 ;
+                 .macro   dis_spi_select
+                    .if (io_sel_direct > 0)
+                       out   abushi,b             ;end strobe if io extension
+                    .endif
+                 ;must be followed by
+                 ;  out cbus,{readmem|clear}
+                 .endmacro
+                 
+                 ;macro SPI wait for spdr complete
+                 ;
+                 .macro   wait_spi
+                 wait_spdr:
+                    sbis  spsr,spif
+                    rjmp  wait_spdr
+                 .endmacro
+                 
+                 ;macro out @0 to SPI and wait for spdr complete
+                 ;
+                 .macro   out_spi
+                    out   spdr,@0
+                 wait_spdr:
+                    sbis  spsr,spif
+                    rjmp  wait_spdr
+                 .endmacro
+                 
+                 ;macro in @0 from SPI and wait for data ready
+                 ;
+                 .macro   in_spi
+                    out   spdr,allon
+                 wait_spdr:
+                    sbis  spsr,spif
+                    rjmp  wait_spdr
+                    in    @0,spdr
+                 .endmacro
+                 
+                 ;macro parallel read
+                 ;
+                 ;@0 minimum read strobe in ns, max 800ns 
+                 ;  maximum time to data valid is @0 -1/2 clock, -32ns
+                 .macro   par_rd
+                    sbi   abuslo,7          ;generate R/-W if needed
+                    ena_io_select
+                    wait_ns   @0,1
+                    dis_io_select
+                    in    operand,dbusin       ;data latched during previous cycle
+                    out   cbus,readmem         ;IO-select off & read mode back on
+                    ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+                    ret
+                 .endmacro
+                 
+                 ;macro parallel write
+                 ;
+                 ;@0 minimum write strobe duration in ns, max 800ns
+                 .macro   par_wrt
+                    cbi   abuslo,7          ;generate R/-W if needed
+                    out   dbusout,operand   ;precharge data to be written
+                    out   dbusddr,allon     ;data write mode
+                    ena_io_select
+                    wait_ns   @0,1
+                    dis_io_select
+                    out   dbusddr,zero      ;data hold ends
+                 .endmacro
+                 
+                 ;parallel pre read macro - data to a, no return
+                 ;
+                 ;@0 minimum read strobe in ns, max 800ns 
+                 ;  maximum time to data valid is @0 -1/2 clock, -32ns
+                 .macro   par_pre_rd  
+                    sbi   abuslo,7          ;generate R/-W
+                    ena_io_select
+                    wait_ns   @0,1
+                    dis_io_select
+                    in    a,dbusin       ;data latched during previous cycle
+                 .endmacro
+                 
+                 ;phase 2 synchronisation macro
+                 ;  next instruction after macro is at tcnt=7, OC2=1
+                 ;
+                 ;           you are here | at end of macro
+                 ;           _ _ _ _ _ _ _V_                 _ _
+                 ; Phi2  _ _|               |_ _ _ _ _ _ _ _|
+                 ;
+                 ; tcnt  6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1
+                 ;
+                 ; 500ns/phase, 62.5ns/count
+                 
+                 .macro   phi2_sync
+                 phi2_syncloop:
+                       in    zl,tcnt2     
+                       sbic  pind,7            ;wait for phi2 low
+                    rjmp  phi2_syncloop
+                    clr   zh
+                    subi  zl,low(-phi2_synctable) ;calculate offset cycles
+                    sbci  zh,high(-phi2_synctable)             
+                    ijmp
+                 
+                 ;  .if (PC & 0xff) > 0xf8   ;keep table on same page - avoid adc zh,zero
+                 ;      .org  (PC + 0x100) & 0xff00
+                 ;   .endif
+                 phi2_synctable:            ;delay -1 cycle for each count in tcnt
+                    nop                     ;0/1 - tcnt=0/OC2=1                  
+                    nop                     ;1/1
+                    nop                     ;2/1
+                    nop                     ;3/1
+                    nop                     ;4/1
+                    nop                     ;5/1
+                    nop                     ;6/1
+                 ;  next                     7/1 - output to next cycle, input from previous cycle
+                 .endmacro
+                 
+                 .macro   nop2              ;2 cycle nop
+                    rjmp  pc+1
+                 .endmacro
+                 
+                 ;macro phase 2 synchronized read
+                 ;
+                 ;
+                 ;              data latched 1/2 clock ahead of IN +
+                 ;      address valid +                            |
+                 ;     after sync +   |                            |
+                 ;                |   |    _ _ _ _ _ _ _ _ _ _ _ _ | _ _ 
+                 ; chip select _ _|_ _|_ _|                        |    |_ _
+                 ;         _ _ _ _V_  |              _ _ _ _ _ _ _ V        
+                 ; Phi2             |_V_ _ _ _ _ _ _|               |_ _ _ _
+                 ;
+                 ; tcnt    3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3
+                 ;
+                 .macro   phi2_rd
+                    phi2_sync
+                    sbi   abuslo,7          ;7/1 generate R/-W - tcnt=7/OC2=1
+                    ena_io_select           ;1/0 CS strobe >300ns before phi2
+                    nop2                    ;3/0
+                    nop2                    ;5/0
+                    nop2                    ;7/0
+                    nop2                    ;1/1
+                    nop2                    ;3/1
+                    nop2                    ;5/1
+                    nop                     ;7/1
+                    in    operand,dbusin    ;0/0 input latched at 7/1 +30ns
+                    dis_io_select           ;1/0 end strobe 125ns after phi2 te
+                    out   cbus,readmem      ;IO-select off & read mode back on
+                    ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+                    ret
+                 .endmacro
+                 
+                 ;macro phase 2 synchronized write
+                 ;
+                 ;                    output data valid +
+                 ;      address valid +                 |
+                 ;     after sync +   |                 |
+                 ;                |   |    _ _ _ _ _ _ _|_ _ _ _ _ _ _ 
+                 ; chip select _ _|_ _|_ _|             |             |_ _ _
+                 ;         _ _ _ _V_  |              _ _V_ _ _ _ _ _        
+                 ; Phi2             |_V_ _ _ _ _ _ _|               |_ _ _ _
+                 ;
+                 ; tcnt    3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3
+                 ;
+                 .macro   phi2_wrt
+                    phi2_sync
+                    cbi   abuslo,7          ;7/1 generate R/-W - tcnt=7/OC2=1
+                    ena_io_select           ;1/0 CS strobe high >300ns before phi2
+                    nop2                    ;3/0
+                    nop2                    ;5/0
+                    nop                     ;7/0
+                    out   dbusout,operand   ;0/1 precharge data to be written
+                    out   dbusddr,allon     ;1/1 write data valid 125 ns after phi2 le
+                    nop2                    ;2/1
+                    nop2                    ;4/1
+                    nop2                    ;6/1
+                    dis_io_select           ;0/0 end strobe 60ns after phi2 te
+                    out   dbusddr,zero      ;data hold ends
+                    rjmp  iw_exit           ;next instruction
+                 .endmacro
+                 
+                 ;****************************************************************
+                 ;
+                 ; Begin IO address decode after load, store or modify instruction
+                 ;
+                 ;****************************************************************
+                 
+                 ;address decode for higher nibble of internally mapped address
+                 iomodify:
+000c01 6230         sbr   flags,(1<<modify) ;lock extended memory address until rewrite
+                 ioread:
+000c02 e0fe         ldi   zh,high(ior_tab)
+000c03 2fec         mov   zl,oplow          ;lower byte 
+000c04 7fe0         andi  zl,0xf0           ;upper 4 bits
+000c05 95e2         swap  zl                ;to low position
+000c06 58e0         addi  zl,low(ior_tab)   ;add offset
+000c07 9409         ijmp                    ;address specific code
+                 
+                 ;address decode for higher nibble of internally mapped address
+                 iowrite:
+000c08 e0fe         ldi   zh,high(iow_tab)
+000c09 2fec         mov   zl,oplow          ;lower address byte
+000c0a 7fe0         andi  zl,0xf0           ;upper 4 bits
+000c0b 95e2         swap  zl                ;to low position
+000c0c 57e0         addi  zl,low(iow_tab)   ;add offset
+000c0d 9409         ijmp                    ;address specific code
+                 
+                 ;**************************************************************
+                 ;
+                 ; IO RESET
+                 ;
+                 ;**************************************************************
+                 io_reset:   
+000c0e 94f8         cli
+                 ;   in    a,timsk        ;no timer interrupts for reset delays
+                 ;   cbr   a,0b11
+                 ;   out   timsk,a
+000c0f be79         out   timsk,zero     ;no timer interrupts for reset delays
+000c10 e005         ldi   a,0b00000101   ;timer 0 ctc off, clock / 1024
+000c11 bf03         out   tccr0,a
+                 
+000c12 940e 1568    call  rs_IO_ext      ;reset IO extension registers
+                 
+                 ;*** custom IO resets go here ***
+000c14 d18d         rcall t1_rs          ;reset timer 1
+000c15 d243         rcall irq_rs         ;reset interrupts & flags
+000c16 d068         rcall lcd_rs         ;reset character LCD
+000c17 d396         rcall spi_rs         ;reset SPI bus if present
+000c18 d526         rcall i2c_rs         ;reset I2C bus if present
+                    ; spi reset with IO expansion select reset (as early as possible)
+000c19 d2eb         io_modules_reset     ;defined by a macro in 6502_Emu_config.inc
+                 
+                 ;end of reset sequence - restore t0, end HW reset strobe
+000c1a be72         out   tcnt0,zero        ;timer 0 init
+000c1b e90b         ldi   a,ten_ms
+000c1c bf0c         out   ocr0,a
+000c1d e00d         ldi   a,0b00001101      ;timer 0 ctc, clock / 1024
+000c1e bf03         out   tccr0,a
+000c1f be72         out   tcnt0,zero
+                 
+                    .ifdef   io_reset_pin
+000c20 e00a            ldi   a,10              ;wait 100ms
+                       do       reset_delay
+000c21 b608               in    c,tifr
+000c22 fe01               sbrs  c,ocf0
+000c23 c004               ifs   reset_10ms_expired
+000c24 e012                  ldi   b,(1 << ocf0)
+000c25 bf18                  out   tifr,b            ;clear flag
+000c26 950a                  dec   a                 ;next 10ms
+000c27 f009            exiteq   reset_delay
+                          end   reset_10ms_expired
+000c28 cff8            loop     reset_delay
+000c29 bac2
+000c2a e811
+000c2b bb1b
+000c2c 9a96            set_io_select  io_reset_pin
+000c2d bac2            out   cbus,clear
+                    .endif   
+                 
+000c2e be72         out   tcnt0,zero        ;restart t0
+000c2f be58         out   tifr,allon        ;clear all timer flags
+000c30 e003         ldi   a,0b11            ;t0 compare match & overflow interrupt enable
+                 ;   in    a,timsk
+                 ;   sbr   a,0b11
+000c31 bf09         out   timsk,a
+000c32 9300 00c0    sts   timer_ena,a
+000c34 bad2         out   cbus,readmem      ;OE / read mode back on
+000c35 9478         sei
+000c36 9508         ret
+                 
+                 .ifdef lcd_sel
+                 ;*****************************************************************
+                 ;
+                 ;character LCD IO
+                 ;
+                 ;  LCD address pin 7 (0=write, 1=read), pin 0 (0=cmd/busy, 1=data)
+                 ;  automatic busy scan for address 0 & 1 if lcd responded during reset
+                 ;  raw access at 2 & 3
+                 
+                 lcd_rd:                 ;referenced from ior_tab = address
+000c37 bac2
+000c38 e811
+000c39 bb1b
+000c3a 9a96         set_io_select lcd_sel
+000c3b 9100 00c7    lds   a,lcd_flags    ;lcd responded during reset?
+000c3d 2300         tst   a
+000c3e f089         ifne_and lcd_rd_scan
+000c3f fdc1         sbrc  oplow,1        ;address 0 or 1 / not 2 or 3?
+000c40 c00f         ifs      lcd_rd_scan ;scan busy flag
+000c41 98c0            cbi   abuslo,0       ;status register
+                 ;      do    lcd_rd_busy
+000c42 9ac7
+000c43 9ada
+000c44 c000
+000c45 c000
+000c46 c000
+000c47 0000
+000c48 bb1b
+000c49 b303            par_pre_rd 450
+000c4a fd07            sbrc  a,7            ;test status busy
+000c4b c217            rjmp  ir_retry       ;on busy
+                 ;      loop  lcd_rd_busy
+000c4c bbc8            out   abuslo,oplow   ;back to original address
+000c4d e200            ldi   a,32           ;delay 96 cycles = 6µs
+                       do     lcd_rd_adr    ;for older hd44780 requiring 
+000c4e 950a               dec   a           ;extra time after busy
+000c4f f7f1            loopne lcd_rd_adr    ;to increment RAM address
+                    end      lcd_rd_scan
+000c50 9ac7
+000c51 9ada
+000c52 c000
+000c53 c000
+000c54 c000
+000c55 0000
+000c56 bb1b
+000c57 b2a3
+000c58 bad2
+000c59 e0f6
+000c5a 9508         par_rd 450           ;450ns enable strobe
+                 
+                 lcd_wrt:                ;referenced from iow_tab = address
+000c5b bac2
+000c5c e811
+000c5d bb1b
+000c5e 9a96         set_io_select lcd_sel
+000c5f 9100 00c7    lds   a,lcd_flags    ;lcd responded during reset?
+000c61 2300         tst   a
+000c62 f089         ifne_and lcd_wrt_scan
+000c63 fdc1         sbrc  oplow,1        ;address 0 or 1 / not 2 or 3?
+000c64 c00f         ifs      lcd_wrt_scan   ;scan busy flag
+000c65 98c0            cbi   abuslo,0       ;status register
+                 ;      do    lcd_wrt_busy
+000c66 9ac7
+000c67 9ada
+000c68 c000
+000c69 c000
+000c6a c000
+000c6b 0000
+000c6c bb1b
+000c6d b303               par_pre_rd 450
+000c6e fd07               sbrc  a,7            ;test status busy
+000c6f c1f5               rjmp  iw_retry       ;on busy
+                 ;      loop  lcd_wrt_busy
+000c70 bbc8            out   abuslo,oplow   ;back to original address
+000c71 e200            ldi   a,32           ;delay 96 cycles = 6µs
+                       do     lcd_wrt_adr   ; for older hd44780 requiring 
+000c72 950a               dec   a           ; extra time after busy
+000c73 f7f1            loopne lcd_wrt_adr ; to increment RAM address
+                    end      lcd_wrt_scan
+                 
+000c74 98c7
+000c75 baa5
+000c76 ba54
+000c77 9ada
+000c78 c000
+000c79 c000
+000c7a c000
+000c7b 0000
+000c7c bb1b
+000c7d ba74         par_wrt 450          ;450ns enable strobe
+000c7e c1e9         rjmp  iw_exit        ;next instruction
+                 
+                 lcd_rs:
+                 ; character LCD - check presence
+000c7f e300         ldi   a,0x30         ;reset LCD 8-bit mode
+000c80 2ea0         mov   operand,a
+000c81 ba78         out   abuslo,zero    ;-w & -rs (write command)
+000c82 9250 00c7    sts   lcd_flags,allon ;set lcd usable
+000c84 bac2
+000c85 e811
+000c86 bb1b
+000c87 9a96         set_io_reset lcd_sel     ;select lcd strobe
+000c88 e105         ldi   a,0x15         ;15ms power up delay
+000c89 d03d         rcall lcd_rs_force   ;write 8-bit mode
+000c8a eb0f         ldi   a,0xbf         ;4.1ms delay
+000c8b d03b         rcall lcd_rs_force   ;repeat write 8-bit mode
+000c8c ef0d         ldi   a,0xfd         ;100µs delay
+000c8d d039         rcall lcd_rs_force   ;repeat write 8-bit mode
+                                         ;continue init checking busy
+000c8e e6e4         ldi   zl,low(lcd_init<<1) 
+000c8f e1f9         ldi   zh,high(lcd_init<<1)
+000c90 e0c0         ldi   oplow,0        ;command register
+                    do       lcd_rs_init 
+000c91 9105            lpm   a,z+
+000c92 2300            tst   a           ;end of string?
+000c93 f031         exiteq   lcd_rs_init
+000c94 3f0f            cpi   a,0xff      ;switch to data register?
+000c95 f411            ifeq  lcd_rs_text
+000c96 e0c1               ldi   oplow,1  
+000c97 c001            else  lcd_rs_text
+000c98 d033               rcall lcd_rs_wrt
+                       end   lcd_rs_text
+000c99 cff7         loop     lcd_rs_init
+000c9a e0c0         ldi   oplow,0        ;verify text on LCD
+000c9b e800         ldi   a,0x80         ;cursor position 0
+000c9c d02f         rcall lcd_rs_wrt
+000c9d e6e9         ldi   zl,low((lcd_init<<1)+5) 
+000c9e e1f9         ldi   zh,high((lcd_init<<1)+5)
+000c9f e0c1         ldi   oplow,1
+                    do       lcd_rs_readback
+000ca0 d04d            rcall lcd_rs_rd
+000ca1 9105            lpm   a,z+
+000ca2 2300            tst   a
+000ca3 f029         exiteq   lcd_rs_readback
+000ca4 150a            cp    a,operand
+000ca5 f011            ifne  lcd_rs_rd_fail
+000ca6 9270 00c7          sts   lcd_flags,zero
+                       end   lcd_rs_rd_fail
+000ca8 cff7         loop     lcd_rs_readback
+000ca9 9100 00c7    lds   a,lcd_flags    ;message, if LCD failed
+000cab 2300         tst   a
+000cac f421         ifeq  lcd_rs_fail
+000cad e7ea
+000cae e1f9
+000caf 940e 1983       PrintStr_far lcd_fail
+                    end   lcd_rs_fail
+000cb1 9508         ret
+                 
+                 lcd_init:        ;8 bit bus, 2 display lines
+                                  ;    ;display on, cursor off
+                                  ;    ;   ;clear & home position
+                                  ;    ;   ; ;position increment, no shift
+                                  ;    ;   ; ; ;switch to data (internal)
+000cb2 0c38
+000cb3 0601
+000cb4 4eff
+000cb5 3536
+000cb6 3230
+000cb7 4520
+000cb8 756d
+000cb9 5620
+000cba 2e30
+000cbb 3338
+000cbc 0062                  .db  0x38,0xc,1,6,0xff,core_string," Emu V",version,0
+000cbd 0a0d
+000cbe 434c
+000cbf 2044
+000cc0 6572
+000cc1 6573
+000cc2 2074
+000cc3 6166
+000cc4 6c69
+000cc5 6465
+000cc6 0000      lcd_fail:   .db   13,10,"LCD reset failed",0,0
+                             
+                 ; subroutines for lcd reset - keep within io_select for lcd
+                 lcd_rs_force:        ;delayed forced write to lcd 
+000cc7 bf02         out   tcnt0,a
+                    do       rs_lcd_delay
+000cc8 b702            in    a,tcnt0
+000cc9 2300            tst   a
+000cca f7e9         loopne   rs_lcd_delay
+000ccb c016         rjmp  lcd_rs_fwrt
+                 
+                 lcd_rs_wrt:          ;write to lcd with timeout on busy
+000ccc be72         out   tcnt0,zero
+000ccd 2ea0         mov   operand,a
+000cce 98c0         cbi   abuslo,0    ;set status register
+                    do    lcd_rs_busy
+000ccf b702            in    a,tcnt0        ;busy timeout? 
+000cd0 390c            cpi   a,0x9c         ;>10ms?
+000cd1 f419            ifeq  lcd_rs_timeout
+000cd2 9270 00c7          sts   lcd_flags,zero
+000cd4 9508               ret
+                       end   lcd_rs_timeout
+000cd5 9ac7
+000cd6 9ada
+000cd7 c000
+000cd8 c000
+000cd9 c000
+000cda 0000
+000cdb bb1b
+000cdc b303            par_pre_rd 450
+000cdd fd07            sbrc  a,7            ;test status busy
+000cde cff0         loop  lcd_rs_busy
+000cdf e200         ldi   a,32           ;delay 96 cycles = 6µs
+                    do     lcd_rs_adr    ; for older hd44780 requiring 
+000ce0 950a            dec   a           ; extra time after busy
+000ce1 f7f1         loopne lcd_rs_adr    ; to increment RAM address
+                 lcd_rs_fwrt:
+000ce2 bbc8         out   abuslo,oplow   ;set register
+000ce3 98c7
+000ce4 baa5
+000ce5 ba54
+000ce6 9ada
+000ce7 c000
+000ce8 c000
+000ce9 c000
+000cea 0000
+000ceb bb1b
+000cec ba74         par_wrt 450          ;write with 450ns strobe
+000ced 9508         ret
+                 
+                 lcd_rs_rd:           ;read from lcd with timeout on busy
+000cee be72         out   tcnt0,zero
+000cef 98c0         cbi   abuslo,0    ;set status register
+                    do    lcd_rs_rd_busy
+000cf0 b702            in    a,tcnt0        ;busy timeout? 
+000cf1 390c            cpi   a,0x9c         ;>10ms?
+000cf2 f419            ifeq  lcd_rs_rd_timeout
+000cf3 9270 00c7          sts   lcd_flags,zero
+000cf5 9508               ret
+                       end   lcd_rs_rd_timeout
+000cf6 9ac7
+000cf7 9ada
+000cf8 c000
+000cf9 c000
+000cfa c000
+000cfb 0000
+000cfc bb1b
+000cfd b303            par_pre_rd 450
+000cfe fd07            sbrc  a,7            ;test status busy
+000cff cff0         loop  lcd_rs_rd_busy
+000d00 e200         ldi   a,32           ;delay 96 cycles = 6µs
+                    do     lcd_rs_rd_adr ; for older hd44780 requiring 
+000d01 950a            dec   a           ; extra time after busy
+000d02 f7f1         loopne lcd_rs_rd_adr ; to increment RAM address
+000d03 bbc8         out   abuslo,oplow   ;set register
+000d04 9ac7
+000d05 9ada
+000d06 c000
+000d07 c000
+000d08 c000
+000d09 0000
+000d0a bb1b
+000d0b b303         par_pre_rd  450      ;read with 450ns strobe
+000d0c 2ea0         mov   operand,a
+000d0d 9508         ret
+                 .endif
+                 
+                 ;*****************************************************************
+                 ;
+                 ; emulated 6551 ACIA - data register only
+                 ;
+                 ; ACIA is not available, when the debugger is using the RS232 interface
+                 ; use exit command (X) to enable ACIA, use break to return to the debugger
+                 ;
+                 ;data register, TX on write, RX on read both with 256 byte FIFO buffer
+                 acia_rx:
+000d0e 9100 00bf    lds   a,irq_flag
+000d10 7b0f         cbr   a,0b01000000   ;clear rdrf
+000d11 9000 00be    lds   c,irq_mask     ;other interrupts pending & enabled?
+000d13 2200         and   c,a
+000d14 f421         ifeq  rx_irq_clear
+                       .ifdef ena_diag
+000d15 9000 00c5          lds   c,selftest
+000d17 fe00               sbrs  c,0            ;forced IRQ by selftest
+                       .endif
+000d18 988b            cbi   cbusddr,3      ;clear IRQ
+                    end   rx_irq_clear
+000d19 24aa         clr   operand        ;default response
+000d1a fd30         sbrc  flags,deb_on   ;acia disconnected?
+000d1b c021         ifs   acia_rx_ena
+000d1c 9000 00d7       lds   c,rx_fill      ;precharge rx level
+                       .ifdef irq_dis_real
+                       .endif
+000d1e 2000            tst   c     ;buffer empty?
+000d1f f0d9            ifne  acia_rx_empty
+000d20 91a0 00d6          lds   xl,rx_inx      ;prepare address to read rx fifo
+000d22 e0b2               ldi   xh,high(rx_buf)
+000d23 19a0               sub   xl,c
+000d24 90ac               ld    operand,x      ;read
+000d25 940a               dec   c     ;update pointer
+000d26 9200 00d7          sts   rx_fill,c
+000d28 f031               ifne  acia_rx_more
+000d29 9110 00be             lds   b,irq_mask     ;check acia irq enabled
+000d2b 7410                  andi  b,0b01000000   ;RDRF IRQ enabled ?
+000d2c f009                  ifne  acia_rx_int
+000d2d 9a8b                     sbi   cbusddr,3      ;set IRQ
+                             end   acia_rx_int
+000d2e 6400                  sbr   a,0b01000000   ;set rdrf - more rx data
+                          end   acia_rx_more
+                          .ifdef flowlo
+000d2f 2d20                  mov   i,c
+000d30 3820                  cpi   i,flowlo          ;buffer lower watermark?
+000d31 f448                  iflo  acia_flow
+000d32 9120 00d8                lds   i,flow_cmd
+000d34 3921                     cpi   i,0x91         ;xon done?
+000d35 f029                     ifne  acia_send_xon
+000d36 e121                        ldi   i,0x11         ;post xon pending
+000d37 9320 00d8                   sts   flow_cmd,i
+000d39 eb28                        ldi   i,usart_txi_ena ;notify transmitter
+000d3a b92a                        out   ucsrb,i
+                                   .ifdef irq_dis_real
+                                   .endif
+                                end  acia_send_xon
+                             end   acia_flow
+                          .endif
+                       end      acia_rx_empty
+000d3b 9300 00bf       sts   irq_flag,a
+                    end   acia_rx_ena
+000d3d e0f6         ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+000d3e 9508         ret
+                 
+                 acia_tx:
+000d3f 9000 00d5    lds   c,tx_fill      ;precharge level
+                    .ifdef irq_dis_real
+                    .endif
+000d41 fd30         sbrc  flags,deb_on   ;acia connected?
+                 iw_retry_ext:
+000d42 c122            rjmp  iw_retry       ;disconnected - loop until buffer is available
+000d43 9403         inc   c              ;space in buffer ?
+000d44 f3e9         breq  iw_retry_ext   ;full - loop until buffer is available
+000d45 9100 00bf    lds   a,irq_flag
+000d47 770f         cbr   a,0b10000000   ;clear tdre
+000d48 9010 00be    lds   d,irq_mask     ;other interrupts pending & enabled?
+000d4a 2210         and   d,a
+000d4b f421         ifeq  tx_irq_clear
+                       .ifdef ena_diag
+000d4c 9010 00c5          lds   d,selftest
+000d4e fe10               sbrs  d,0            ;forced IRQ by selftest
+                       .endif
+000d4f 988b            cbi   cbusddr,3      ;clear IRQ
+                    end   tx_irq_clear
+                 
+000d50 eb28         ldi   i,usart_txi_ena ;notify transmitter
+000d51 b92a         out   ucsrb,i
+                    .ifdef irq_dis_real
+                    .endif
+000d52 91a0 00d4    lds   xl,tx_inx      ;load pointer
+000d54 e0b1         ldi   xh,high(tx_buf)
+000d55 92ad         st    x+,operand     ;send data to fifo
+000d56 93a0 00d4    sts   tx_inx,xl      ;save index
+000d58 9200 00d5    sts   tx_fill,c
+000d5a 9403         inc   c     ;more tx fifo available?
+000d5b f031         ifne  acia_tx_more
+000d5c 9110 00be       lds   b,irq_mask     ;TDRE IRQ enabled
+000d5e 7810            andi  b,0b10000000
+000d5f f009            ifne  acia_tx_int
+000d60 9a8b               sbi   cbusddr,3      ;set IRQ
+                       end   acia_tx_int
+000d61 6800            sbr   a,0b10000000   ;set tdre - tx buffer available
+                    end  acia_tx_more
+000d62 9300 00bf    sts   irq_flag,a
+000d64 c103         rjmp  iw_exit
+                 
+                 ;**************************************************************
+                 ;
+                 ; Timer 1 registers
+                 ;
+                 ;  no output or input pins available, internal operations only
+                 ;  see ATMega datasheet for register and bit functionality
+                 ;
+                 ; write address register, then read or write data register
+                 ;  output high byte first, automatic decrement to low byte
+                 ;  input low byte first, automatic increment to high byte
+                 ;  
+                 ;  0 = ICR1L      1 = ICR1H      2 = OCR1BL     3 = OCR1BH
+                 ;  4 = OCR1AL     5 = OCR1AH     6 = TCNT1L     7 = TCNT1H
+                 ;  8 = combined TCCR1 (merged TCCR1A, TCCR1B, SFIOR)
+                 ;
+                 ;TCCR1 bit assignment
+                 ;write [WGM13|WGM12|WGM11|WGM10|PSR10|CS12|CS11|CS10]
+                 ;read  [WGM13|WGM12|WGM11|WGM10|  0  |CS12|CS11|CS10]
+                 
+                 t1r_adr:
+000d65 90a0 00c1    lds   operand,t1_adr       ;respond with current address
+000d67 e0f6         ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+000d68 9508         ret
+                 
+                 t1w_adr:
+000d69 92a0 00c1    sts   t1_adr,operand
+000d6b c0fc         rjmp  iw_exit
+                 
+                 t1r_data:
+000d6c 91a0 00c1    lds   xl,t1_adr
+000d6e 30a8         cpi   xl,8            ;TCCR1?
+000d6f f448         iflo  t1r_data_word
+000d70 5baa            addi  xl,0x46        ;add memory offset to t1 registers
+000d71 e0b0            ldi   xh,0
+000d72 90ac            ld    operand,x
+000d73 91a0 00c1       lds   xl,t1_adr
+000d75 25a6            eor   xl,one         ;switch between low & high byte
+000d76 93a0 00c1       sts   t1_adr,xl
+000d78 c005         else  t1r_data_word
+000d79 f419            ifeq  t1r_data_ctl
+000d7a 90a0 00c2          lds   operand,t1_ctrl
+000d7c c001            else  t1r_data_ctl
+000d7d 24aa               clr   operand
+                       end   t1r_data_ctl
+                    end   t1r_data_word
+000d7e e0f6         ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+000d7f 9508         ret
+                 
+                 t1w_data:
+000d80 91a0 00c1    lds   xl,t1_adr
+000d82 30a8         cpi   xl,8            ;TCCR1?
+000d83 f448         iflo  t1w_data_word
+000d84 5baa            addi  xl,0x46        ;add memory offset to t1 registers
+000d85 e0b0            ldi   xh,0
+000d86 92ac            st    x,operand
+000d87 91a0 00c1       lds   xl,t1_adr
+000d89 25a6            eor   xl,one         ;switch between high & low byte
+000d8a 93a0 00c1       sts   t1_adr,xl
+000d8c c014         else  t1w_data_word
+000d8d f499            ifeq  t1w_data_ctl
+000d8e 2d0a               mov   a,operand      ;test prescaler bits valid
+000d8f 7007               andi  a,7            ;mask clock select bits
+000d90 2d1a               mov   b,operand
+000d91 7f17               andi  b,0xf7         ;strip psr10 - is write only
+000d92 9310 00c2          sts   t1_ctrl,b      ;store for readback
+000d94 7310               andi  b,0x30         ;mask wgm11:10
+000d95 9512               swap  b              ;move into position
+000d96 bd1f               out   TCCR1A,b
+000d97 2d1a               mov   b,operand      ;mask wgm13:12
+000d98 7c10               andi  b,0xc0
+000d99 9512               swap  b              ;move into position
+000d9a 0f11               lsl   b
+000d9b 2b01               or    a,b            ;merge with clock select
+000d9c bd0e               out   TCCR1B,a
+000d9d b700               in    a,SFIOR        ;move psr10 to sfior
+000d9e faa3               bst   operand,3
+000d9f f900               bld   a,0
+000da0 bf00               out   SFIOR,a
+                       end   t1w_data_ctl
+                    end   t1w_data_word
+000da1 c0c6         rjmp  iw_exit
+                 
+                 t1_rs:
+000da2 bc7f         out   TCCR1A,zero    ;stop timer
+000da3 bc7e         out   TCCR1B,zero
+000da4 9270 00c1    sts   t1_adr,zero    ;clear regs
+000da6 9270 00c2    sts   t1_ctrl,zero
+000da8 9508         ret
+                 
+                 ;timer 1 interrupts
+                 t1_ovi:
+000da9 9120 00bf    lds   i,irq_flag     ;set t1 overflow
+000dab 6024         sbr   i,(1<<2)
+000dac 9320 00bf    sts   irq_flag,i
+000dae 9a8b         sbi   cbusddr,3      ;set IRQ
+000daf 9518         reti
+                 t1_ocra:
+000db0 9120 00bf    lds   i,irq_flag     ;set t1 output compare flag A
+000db2 6120         sbr   i,(1<<4)
+000db3 9320 00bf    sts   irq_flag,i
+000db5 9a8b         sbi   cbusddr,3      ;set IRQ
+000db6 9518         reti
+                 t1_ocrb:
+000db7 9120 00bf    lds   i,irq_flag     ;set t1 output compare flag B
+000db9 6028         sbr   i,(1<<3)
+000dba 9320 00bf    sts   irq_flag,i
+000dbc 9a8b         sbi   cbusddr,3      ;set IRQ
+000dbd 9518         reti
+                 t1_icr:
+000dbe 9120 00bf    lds   i,irq_flag     ;set t1 input compare flag
+000dc0 6220         sbr   i,(1<<5)
+000dc1 9320 00bf    sts   irq_flag,i
+000dc3 9a8b         sbi   cbusddr,3      ;set IRQ
+000dc4 9518         reti
+                 
+                 ;tick countdown timer
+                 ;write # of ticks (10ms) to flag/interrupt
+                 ;read remaining ticks to next flag/interrupt
+                 ;reloads last countdown at bottom - periodic countdown
+                 tcdn_r:
+000dc5 90a0 00c3    lds   operand,tcdn_count   ;respond with remaining ticks
+000dc7 e0f6         ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+000dc8 9508         ret
+                 
+                 tcdn_w:
+000dc9 92a0 00c3    sts   tcdn_count,operand   ;store current count
+000dcb 92a0 00c4    sts   tcdn_top,operand     ;store periodic count
+000dcd c09a         rjmp  iw_exit
+                 
+                 ;interrupt mask register
+                 ;allows avr internal io-flags to cause an IRQ on the 6502 cpu
+                 ;write:[TDRE|RDRF|ICF1|OCF1A|OCF1B|TOV1|tcdn|tick]
+                 ; read:[TDRE|RDRF|ICF1|OCF1A|OCF1B|TOV1|tcdn|tick]
+                 ;tick = periodic 10ms interrupt (t0 ctc)
+                 ;tcdn = tick countdown interrupt
+                 ;T1 related masks - see ATMega datasheet
+                 ;RDRF: set if receiver fifo has data - cleared if buffer empty
+                 ;TDRE: set if transmitter fifo not full - cleared if buffer full
+                 ir_mask:
+000dce 90a0 00be    lds   operand,irq_mask     ;respond with current mask
+000dd0 e0f6         ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+000dd1 9508         ret
+                 
+                 iw_mask:
+000dd2 2d0a         mov   a,operand            ;set t1 mask
+000dd3 730c         andi  a,0x3c
+000dd4 6003         ori   a,0b11               ;precharge timsk with t0 ie
+000dd5 9300 00c0    sts   timer_ena,a
+                    .ifdef irq_dis_real
+                    .endif
+000dd7 bf09         out   timsk,a
+000dd8 2d0a         mov   a,operand            ;save mask
+000dd9 9300 00be    sts   irq_mask,a
+                 ;   in    b,tifr               ;check pending flags enabled
+                 ;   andi  b,0x3c
+000ddb 9010 00bf    lds   d,irq_flag
+                 ;   or    d,b                  ;merge t1 & saved           
+000ddd 2210         and   d,a
+000dde 2011         tst   d
+000ddf f411         ifeq  mask_irq_clear       ;all masked flags serviced?
+000de0 988b            cbi   cbusddr,3            ;clear IRQ 
+000de1 c001         else  mask_irq_clear
+000de2 9a8b            sbi   cbusddr,3            ;set IRQ pending
+                    end   mask_irq_clear
+000de3 c084         rjmp  iw_exit
+                 
+                 
+                 ;interrupt flag register
+                 ;avr internal io-flags
+                 ;write:[ -  | -  |ICF1|OCF1A|OCF1B|TOV1|tcdn|tick]
+                 ; read:[TDRE|RDRF|ICF1|OCF1A|OCF1B|TOV1|tcdn|tick]
+                 ;tick: periodic 10ms interrupt (t0 ctc) - write 1 to clear
+                 ;tcdn: tick countdown reached 0 - write 1 to clear
+                 ;T1 related masks - see ATMega datasheet - write 1 to clear
+                 ;RDRF: set if ACIA receiver fifo has data - cleared if empty
+                 ;TDRE: set if ACIA transmitter fifo not full - cleared if full
+                 ir_flag:
+000de4 90a0 00bf    lds   operand,irq_flag     ;respond with pending flags
+000de6 b708         in    a,tifr               ;get t1 flags
+000de7 730c         andi  a,0x3c
+000de8 2aa0         or    operand,a            ;merge to saved flags
+000de9 e0f6         ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+000dea 9508         ret
+                 
+                 iw_flag:
+000deb 2d0a         mov   a,operand            ;clear t1 flags
+000dec 730c         andi  a,0x3c
+000ded bf08         out   tifr,a
+000dee b718         in    b,tifr               ;keep pending flags
+000def 731c         andi  b,0x3c
+000df0 2d0a         mov   a,operand            ;clear saved flags
+000df1 730f         andi  a,0b00111111         ;ACIA can not be cleared
+000df2 2505         eor   a,allon              ;reverse mask
+000df3 9010 00bf    lds   d,irq_flag
+000df5 2a11         or    d,b                  ;merge t1 & saved
+000df6 2210         and   d,a                  ;mask over flags
+000df7 9210 00bf    sts   irq_flag,d
+000df9 9000 00be    lds   c,irq_mask           ;check remaining enabled
+000dfb 2010         and   d,c
+000dfc f409         ifeq  flag_irq_clear       ;all flags serviced?
+000dfd 988b            cbi   cbusddr,3            ;clear IRQ 
+                    end   flag_irq_clear
+000dfe c069         rjmp  iw_exit
+                 
+                 ;interrupt vector register
+                 ;avr internal io interrupt vectors, read only
+                 ;reading the vector clears the corresponding flag except
+                 ;external IRQ must be cleared at the source
+                 ;RDRF & TDRE are cleared by writing or reading the ACIA data reg
+                 ; 0 = external IRQ - low on IRQ input pin
+                 ; 2 = tick  - periodic 10ms interrupt (t0 ctc)
+                 ; 4 = tcdn  - tick countdown reached 0
+                 ; 6 = TOV1  - timer 1 overflow
+                 ; 8 = OCF1B - timer 1 output compare register b match
+                 ;10 = OCF1A - timer 1 output compare register a match
+                 ;12 = ICF1  - timer 1 input capture register match
+                 ;14 = RDRF  - ACIA receive data register full
+                 ;16 = TDRE  - ACIA transmit data register empty
+                 ir_vector:
+000dff 24aa         clr   operand              ;initialize vector
+000e00 9000 00bf    lds   c,irq_flag           ;read pending flags
+000e02 9010 00be    lds   d,irq_mask           ;mask with enabled interrupts
+000e04 2d10         mov   b,c                  ;make 6 enabled
+000e05 2111         and   b,d
+000e06 f0d1         ifne  ir_vect_internal
+000e07 9468            set                        ;precharge to set bit
+000e08 2f01            mov   a,b
+000e09 7f00            andi  a,0xf0               ;interrupt source 2^2?
+000e0a f011            ifne  ir_vect_b2
+000e0b 2f10               mov   b,a                  ;isolate bit group
+000e0c f8a2               bld   operand,2            ;add 2^2
+                       end   ir_vect_b2
+000e0d 2f01            mov   a,b
+000e0e 7c0c            andi  a,0xcc               ;interrupt source 2^1?
+000e0f f011            ifne  ir_vect_b1
+000e10 2f10               mov   b,a                  ;isolate bit group
+000e11 f8a1               bld   operand,1            ;add 2^1
+                       end   ir_vect_b1
+000e12 2f01            mov   a,b
+000e13 7a0a            andi  a,0xaa               ;interrupt source 2^0?
+000e14 f011            ifne  ir_vect_b0
+000e15 2f10               mov   b,a                  ;isolate bit group
+000e16 f8a0               bld   operand,0            ;add 2^0
+                       end   ir_vect_b0
+000e17 94a3            inc   operand              ;make vector 2 4 6 ... 16
+000e18 0caa            lsl   operand
+000e19 2515            eor   b,allon              ;clear flag
+000e1a 6c10            sbr   b,0b11000000         ;can't clear RDRF & TDRE
+000e1b 2201            and   c,b
+000e1c 9200 00bf       sts   irq_flag,c
+000e1e 2010            and   d,c                  ;all enabled flags done?
+000e1f f409            ifeq  ir_vect_clr_int
+000e20 988b               cbi   cbusddr,3            ;clear IRQ 
+                       end   ir_vect_clr_int
+                    end   ir_vect_internal
+000e21 e0f6         ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+000e22 9508         ret
+                 
+                 ;diag selftest register
+                 ;allows setting of external control lines if enabled
+                 ;enter debugger, query debugger running, query DMA available
+                 ;write:[DEB| - | - | - | - |RES|NMI|IRQ]
+                 ;        + start debugger, halt emulation
+                 ; read:[DEB| 1 | 0 | 0 | 0 | 0 |NMI|IRQ]
+                 ;        |   + IO version >= 0.83 (has DMA)
+                 ;        + debugger currently running, ACIA disconnected
+                 ir_diag:
+000e23 90a0 00c5    lds   operand,selftest  ;respond with saved selftest flags
+000e25 e400         ldi   a,0b1000000       ;mark current IO version
+000e26 fd30         sbrc  flags,deb_on      ;mark debugger is running
+000e27 6800            sbr   a,0b10000000
+000e28 2aa0         or    operand,a
+000e29 e0f6         ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+000e2a 9508         ret
+                 
+                 iw_diag:
+000e2b fea7         sbrs  operand,7         ;test enter diag
+000e2c c01a         ifs   iw_diag_enter
+000e2d 7430            andi  flags,(1<<string) ;stop emulation, keep string
+000e2e 6035            sbr   flags,0b101       ;debugging on & active
+000e2f 9100 00bf       lds   a,irq_flag        ;clear ACIA TDRE & RDRF
+000e31 730f            cbr   a,0b11000000
+000e32 9300 00bf       sts   irq_flag,a
+000e34 9000 00be       lds   c,irq_mask        ;other interrupts pending & enabled?
+000e36 2100            and   a,c
+000e37 f409            ifeq  iw_diag_irq
+000e38 988b               cbi   cbusddr,3         ;clear any pending acia interrupts
+                       end   iw_diag_irq
+000e39 e0d2            ldi   yh,high(rx_buf)   ;load buffer index
+000e3a e0c0            ldi   yl,0              ;purge buffer
+000e3b e00a            ldi   a,10              ;start with a linefeed 
+000e3c 9309            st    y+,a              ;store data
+000e3d e10b            ldi   a,27              ;force escape
+000e3e 9309            st    y+,a              ;store data
+000e3f 93c0 00d6       sts   rx_inx,yl         ;store pointers
+000e41 93c0 00d7       sts   rx_fill,yl
+                       ;*** test diag stop immediate
+                 ;      sbr   flags,(1<<deb_act)  ;prevent double_activation
+000e43 e000            ldi   a,NMI_dis      ;no emulator interrupts during monitor
+000e44 bf0b            out   ibus,a
+                       .ifdef irq_dis_real
+                       .endif
+000e45 9478            sei
+000e46 c7dd            rjmp  debugger
+                       ;*** test diag stop immediate
+                    end   iw_diag_enter
+                 .ifdef ena_diag
+000e47 fca2         sbrc  operand,2         ;test force reset
+000e48 c00d         rjmp  diag_reset        ;currently emulated
+000e49 fca1         sbrc  operand,1         ;test force NMI
+000e4a 9a8a         sbi   cbusddr,2         ;set low (open drain)
+000e4b fea1         sbrs  operand,1         ;test clear NMI
+000e4c 988a         cbi   cbusddr,2         ;release high (open drain)
+000e4d fca0         sbrc  operand,0         ;test force IRQ
+000e4e 9a8b         sbi   cbusddr,3         ;set low (open drain)
+000e4f fea0         sbrs  operand,0         ;test clear IRQ
+000e50 988b         cbi   cbusddr,3         ;set low (open drain)
+000e51 2d0a         mov   a,operand         ;mask last 2 bits
+000e52 7003         andi  a,3
+000e53 9300 00c5    sts   selftest,a        ;save for read
+000e55 c012         rjmp  iw_exit
+                 
+                 diag_reset:
+000e56 940e 19cb    call soft_reset
+                 .endif
+000e58 c00f         rjmp  iw_exit
+                 
+                 ;reset of interrupt masks and flags
+                 irq_rs:
+                 ;   in    a,timsk           ;clear t1 mask
+                 ;   cbr   a,0x3c
+                 ;   out   timsk,a
+                 ;   ldi   a,0x3c            ;clear t1 flags
+                 ;   out   tifr,a
+000e59 988b         cbi   cbusddr,3         ;clear IRQ
+000e5a 988a         cbi   cbusddr,2         ;clear NMI
+000e5b 9270 00c5    sts   selftest,zero     ;clear saved flags
+000e5d 9270 00be    sts   irq_mask,zero
+000e5f e800         ldi   a,0x80            ;TDRE remains active
+000e60 9300 00bf    sts   irq_flag,a
+000e62 9508         ret
+                 
+                 ;*****************************************************************
+                 ;
+                 ; common IO exits (unused addresses and retry on busy)
+                 ;
+                 ;*****************************************************************
+                 
+                 ;retrying a read I/O instruction until the data becomes available
+                 ir_retry:
+000e63 910f         pop   a        ;discard return address
+000e64 910f         pop   a
+                 
+                 ;retrying a write I/O instruction until the register (buffer) becomes available
+                 iw_retry:
+000e65 9702         sbiw  pch:pcl,2         ;prepare for instruction retry
+000e66 ff34         sbrs  flags,op_ind      ;3 byte instruction if direct
+000e67 9701         sbiw  pch:pcl,1
+                 
+                 ;no mapping for write or normal exit
+                 iw_exit:
+000e68 7d3f         cbr   flags,(1<<modify) ;unlock extended memory address after modify
+000e69 bad2         out   cbus,readmem      ;OE / read mode back on
+000e6a e0f6         ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+000e6b bb88
+000e6c bb9b
+000e6d 9478
+000e6e 9601
+000e6f 94f8
+000e70 b3e3
+000e71 bb88
+000e72 bb9b
+000e73 9601
+000e74 9409         op_decode
+                 
+                 ;no mapping for read
+                 ir_exit:
+000e75 e0f6         ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+                 rs_exit:
+000e76 9508         ret
+                 
+                 .ifndef lcd_sel   
+                 .endif
+                 
+                 ;**************************************************************
+                 ;
+                 ; I/O address decode tables and customizable IO modules
+                 ; part 2 of configuration
+                 ;
+                 ;**************************************************************
+                 ;
+                 .set config_part = 2
+                 .include "6502_Emu_config.inc"
+                 
+                 .IFNDEF   SIGNATURE_000  ;not already defined per default device in Atmel Studio >4
+                 .ENDIF
+                 .ifndef  phi2_ena       ;not available if phi2 uses cbus pin 7
+                 .endif
+                 .ifndef  nmi_ena        ;not available if NMI uses cbus pin 2
+                 .endif
+                 .endif
+                 .if config_part == 2 ;invoked from 6502_Emu_IO.inc
+                 
+                 ;**************************************************************
+                 ;
+                 ; I/O address decode tables
+                 ; assign internal or external IO modules
+                 ;
+                 ;**************************************************************
+                 
+                    align 4           ;keep each table on same page
+                 
+                 ; I/O address table, reserve 0x10 addresses at a time
+                 ;     larger chunks can be defined by pointing sequential addresses
+                 ;     to the same entry point
+                 ; read address table
+                 ior_tab:
+000e80 cff4         rjmp  ir_exit     ;0x
+000e81 cff3         rjmp  ir_exit     ;1x
+000e82 cff2         rjmp  ir_exit     ;2x
+000e83 cff1         rjmp  ir_exit     ;3x
+000e84 cff0         rjmp  ir_exit     ;4x
+000e85 cfef         rjmp  ir_exit     ;5x
+000e86 cfee         rjmp  ir_exit     ;6x
+000e87 cfed         rjmp  ir_exit     ;7x
+000e88 cfec         rjmp  ir_exit     ;8x
+000e89 c106         rjmp  spr_data    ;9x   SPI data register
+000e8a c086         rjmp  io65xx_rd   ;Ax   65xx IO chip RAM
+000e8b c085         rjmp  io65xx_rd   ;Bx   65xx IO chip
+000e8c c061         rjmp  ltch_rd     ;Cx   74HC573 latch(es)
+000e8d cda9         rjmp  lcd_rd      ;Dx   character LCD
+000e8e c055         rjmp  iorE0       ;Ex - subdecoded 0xe0 - 0xef
+000e8f c0c0         rjmp  iordreg     ;Fx - internal emulated registers
+                 
+                 ; write address table
+                 iow_tab:
+000e90 cfd7         rjmp  iw_exit     ;0x
+000e91 cfd6         rjmp  iw_exit     ;1x
+000e92 cfd5         rjmp  iw_exit     ;2x
+000e93 cfd4         rjmp  iw_exit     ;3x
+000e94 cfd3         rjmp  iw_exit     ;4x
+000e95 cfd2         rjmp  iw_exit     ;5x
+000e96 cfd1         rjmp  iw_exit     ;6x
+000e97 cfd0         rjmp  iw_exit     ;7x
+000e98 cfcf         rjmp  iw_exit     ;8x
+000e99 c0db         rjmp  spw_data    ;9x   SPI data register
+000e9a c096         rjmp  io65xx_wrt  ;Ax   65xx IO chip (RAM)
+000e9b c095         rjmp  io65xx_wrt  ;Bx   65xx IO chip
+000e9c c05d         rjmp  ltch_wrt    ;Cx   74HC573 latch(es)
+000e9d cdbd         rjmp  lcd_wrt     ;Dx   character LCD
+000e9e c04a         rjmp  iowE0       ;Ex - subdecoded 0xe0 - 0xef
+000e9f c0b5         rjmp  iowtreg     ;Fx - internal emulated registers
+                 
+                 ; sub address decode tables
+                 ; - select 1 from a range of 0x10 addresses
+                 
+                 ; subdecode 0xe0 - 0xef
+                 ; read address decode table iorE0 (0xe0 - 0xef)
+                 iorE0_tab:
+000ea0 cfd4         rjmp  ir_exit     ;0
+000ea1 cfd3         rjmp  ir_exit     ;1
+000ea2 cfd2         rjmp  ir_exit     ;2
+000ea3 cfd1         rjmp  ir_exit     ;3
+000ea4 cfd0         rjmp  ir_exit     ;4
+000ea5 cfcf         rjmp  ir_exit     ;5
+000ea6 cfce         rjmp  ir_exit     ;6
+000ea7 cfcd         rjmp  ir_exit     ;7
+000ea8 cfcc         rjmp  ir_exit     ;8
+000ea9 cfcb         rjmp  ir_exit     ;9
+000eaa cfca         rjmp  ir_exit     ;A
+000eab cfc9         rjmp  ir_exit     ;B
+000eac cfc8         rjmp  ir_exit     ;C
+000ead cfc7         rjmp  ir_exit     ;D
+000eae cfc6         rjmp  ir_exit     ;E
+000eaf cfc5         rjmp  ir_exit     ;F
+                 
+                 
+                 ; write address decode table iowE0 (0xe0 - 0xef)
+                 iowE0_tab:
+000eb0 cfb7         rjmp  iw_exit     ;0
+000eb1 cfb6         rjmp  iw_exit     ;1
+000eb2 cfb5         rjmp  iw_exit     ;2
+000eb3 cfb4         rjmp  iw_exit     ;3
+000eb4 cfb3         rjmp  iw_exit     ;4
+000eb5 cfb2         rjmp  iw_exit     ;5
+000eb6 cfb1         rjmp  iw_exit     ;6
+000eb7 cfb0         rjmp  iw_exit     ;7
+000eb8 cfaf         rjmp  iw_exit     ;8
+000eb9 cfae         rjmp  iw_exit     ;9
+000eba cfad         rjmp  iw_exit     ;A
+000ebb cfac         rjmp  iw_exit     ;B
+000ebc cfab         rjmp  iw_exit     ;C
+000ebd cfaa         rjmp  iw_exit     ;D
+000ebe cfa9         rjmp  iw_exit     ;E
+000ebf cfa8         rjmp  iw_exit     ;F
+                 
+                 ; internal I/O table, subgroup of range defined by 
+                 ; iordreg / iowtreg
+                 ; read internal register address table
+                 ior_int_tab:
+000ec0 ce4d         rjmp  acia_rx     ;0 - ACIA receive data register
+000ec1 cf03         rjmp  tcdn_r      ;1 - 10ms tick countdown timer
+000ec2 c272         rjmp  i2c_stat    ;2 - i2c read status
+000ec3 c20a         rjmp  i2c_data_rd ;3 - i2c read data register
+000ec4 cea0         rjmp  t1r_adr     ;4 - timer 1 register address
+000ec5 cea6         rjmp  t1r_data    ;5 - timer 1 data
+000ec6 c0e3         rjmp  spr_dat_lst ;6 - spi data after last write
+000ec7 c1d0         rjmp  dmr_stat    ;7 - dma status
+000ec8 c1e9         rjmp  dmr_data    ;8 - dma parameter data
+000ec9 cfab         rjmp  ir_exit     ;9
+000eca cfaa         rjmp  ir_exit     ;A
+000ecb cfa9         rjmp  ir_exit     ;B
+000ecc cf56         rjmp  ir_diag     ;C - diag selftest register
+000ecd cf31         rjmp  ir_vector   ;D - global internal IRQ vector
+000ece ceff         rjmp  ir_mask     ;E - global internal IRQ mask
+000ecf cf14         rjmp  ir_flag     ;F - global internal IRQ flags
+                 
+                 ; write internal register address
+                 iow_int_tab:
+000ed0 ce6e         rjmp  acia_tx     ;0 - ACIA transmit data register
+000ed1 cef7         rjmp  tcdn_w      ;1 - 10ms tick countdown timer
+000ed2 c23a         rjmp  i2c_cmd     ;2 - i2c command register 
+000ed3 c20e         rjmp  i2c_data_wrt ;3 - i2c write data register
+000ed4 ce94         rjmp  t1w_adr     ;4 - timer 1 register address
+000ed5 ceaa         rjmp  t1w_data    ;5 - timer 1 data
+000ed6 c083         rjmp  spw_cmd     ;6 - spi command register
+000ed7 c1a8         rjmp  dmw_cmd     ;7 - dma command register
+000ed8 c1c3         rjmp  dmw_data    ;8 - dma parameter data
+000ed9 cf8e         rjmp  iw_exit     ;9
+000eda cf8d         rjmp  iw_exit     ;A
+000edb cf8c         rjmp  iw_exit     ;B
+000edc cf4e         rjmp  iw_diag     ;C - diag selftest register
+000edd cf8a         rjmp  iw_exit     ;D - read only IRQ vector
+000ede cef3         rjmp  iw_mask     ;E - global internal IRQ mask
+000edf cf0b         rjmp  iw_flag     ;F - global internal IRQ flags
+                 
+                 
+                 ;check address decode table alignment for missing or extra entry
+                 .if (pc & 0xf)
+                 .endif
+                 
+                 ;SPI address to slave select translation
+                 .ifdef spi_vat
+                 spi_vss:
+000ee0 1d1e
+000ee1 1f1b
+000ee2 1f0f
+000ee3 1f1f         spi_virt_ss
+                 .endif
+                 
+                 ;**************************************************************
+                 ;
+                 ; IO address decoder
+                 ;
+                 ;**************************************************************
+                 
+                 ;decoding bits 0-3 of an IO address
+                 
+                 iorE0:                  ;read decode for 0xe0 - 0xef
+000ee4 e0fe
+000ee5 2fec
+000ee6 70ef
+000ee7 56e0
+000ee8 9409         io_adr_dec  iorE0_tab
+                 
+                 iowE0:                  ;write decode for 0xe0 - 0xef
+000ee9 e0fe
+000eea 2fec
+000eeb 70ef
+000eec 55e0
+000eed 9409         io_adr_dec  iowE0_tab
+                 
+                 ;**************************************************************
+                 ;
+                 ; parallel IO modules
+                 ;
+                 ; examples: 74HC573 latch IO, Phi2 synced IO
+                 ;
+                 ;**************************************************************
+                 
+                 ;IO to 74HC573 latch
+                 ;
+                 ;  multiple latches require individual IO-selects. these can be set by
+                 ;  software address decode or hardware decoder 74HC237 (up to 8 latches,
+                 ;  up to 4 each mixed r/w)
+                 
+                 ltch_rd:
+000eee bac2
+000eef e811
+000ef0 bb1b
+000ef1 9a96         set_io_select 10     ;read with strobe low io select extension reg 1, pin 0
+000ef2 9ac7
+000ef3 98d8
+000ef4 0000
+000ef5 bb1b
+000ef6 b2a3
+000ef7 bad2
+000ef8 e0f6
+000ef9 9508         par_rd 100           ;min 60ns to data valid (3state output enable time OE - Q)
+                                         ;+ 1/2 clock (31.3ns) avr input latch delay
+                                    
+                 ltch_wrt:
+000efa bac2
+000efb e811
+000efc bb1b
+000efd 9a96         set_io_select 11     ;write with strobe high io select extension reg 1, pin 1
+000efe 98c7
+000eff baa5
+000f00 ba54
+000f01 9ad9
+000f02 bb1b
+000f03 ba74         par_wrt 60           ;min 60ns enable strobe (propagation delay time LE - Q)
+000f04 cf63         rjmp  iw_exit        ;next instruction
+                 
+                 ltch_rs:
+000f05 24aa         clr   operand        ;clear 74hc573 output latch
+000f06 bac2
+000f07 e811
+000f08 bb1b
+000f09 9a96         set_io_reset 11      ;select latch strobe
+000f0a 98c7
+000f0b baa5
+000f0c ba54
+000f0d 9ad9
+000f0e bb1b
+000f0f ba74         par_wrt 60           ;write operand with strobe
+000f10 9508         ret                        
+                 
+                 ;*****************************************************************
+                 ;
+                 ;IO to 65xx chip using phi2
+                 ;
+                 io65xx_rd:
+000f11 bac2
+000f12 e811
+000f13 bb1b
+000f14 9a96         set_io_select 13     ;read with strobe on io select extension reg 1, pin 3
+000f15 b5e4
+000f16 9987
+000f17 cffd
+000f18 27ff
+000f19 5ee4
+000f1a 4ff0
+000f1b 9409
+000f1c 0000
+000f1d 0000
+000f1e 0000
+000f1f 0000
+000f20 0000
+000f21 0000
+000f22 0000
+000f23 9ac7
+000f24 9adb
+000f25 c000
+000f26 c000
+000f27 c000
+000f28 c000
+000f29 c000
+000f2a c000
+000f2b 0000
+000f2c b2a3
+000f2d bb1b
+000f2e bad2
+000f2f e0f6
+000f30 9508         phi2_rd              ;timed read synchronized to phi2 (OC2)
+                                    
+                 io65xx_wrt:
+000f31 bac2
+000f32 e811
+000f33 bb1b
+000f34 9a96         set_io_select 13     ;write with strobe on io select extension reg 1, pin 3
+000f35 b5e4
+000f36 9987
+000f37 cffd
+000f38 27ff
+000f39 5ce4
+000f3a 4ff0
+000f3b 9409
+000f3c 0000
+000f3d 0000
+000f3e 0000
+000f3f 0000
+000f40 0000
+000f41 0000
+000f42 0000
+000f43 98c7
+000f44 9adb
+000f45 c000
+000f46 c000
+000f47 0000
+000f48 baa5
+000f49 ba54
+000f4a c000
+000f4b c000
+000f4c c000
+000f4d bb1b
+000f4e ba74
+000f4f cf18         phi2_wrt             ;timed write synchronized to phi2 (OC2)
+                 
+                 ;no software reset - hardware reset driven by reset pin
+                 
+                 
+                 ;.org pc + 0x400         ;test sufficient space for custom modules
+                 
+                 .endif
+                 
+                 ;read address decode of internally mapped registers
+                 iordreg:
+000f50 e0fe
+000f51 2fec
+000f52 70ef
+000f53 54e0
+000f54 9409         io_adr_dec  ior_int_tab
+                     
+                 ;write address decode of internally mapped registers
+                 iowtreg:
+000f55 e0fe
+000f56 2fec
+000f57 70ef
+000f58 53e0
+000f59 9409         io_adr_dec  iow_int_tab
+                 
+                 .ifdef spi_sel
+                 ;********************************************************************
+                 ;
+                 ;     SPI
+                 ;
+                 ;********************************************************************
+                 ;fixed definitions for the SPI interface - port share with abuslo
+                 .EQU  spi_in      =pinb       ; SPI input
+                 .EQU  spi_ddr     =ddrb       ; SPI DDR,
+                 .EQU  spi_out     =portb      ; SPI output
+                 .EQU  spi_sck     =7          ; spi clock output
+                 .EQU  spi_miso    =6          ; master input
+                 .EQU  spi_mosi    =5          ; master output
+                 ;     spi_ss      =0-4        ; spi slave select
+                 
+                 ;SPI command - write SPCR, SPSR, slave select hold
+                 ;w    [  x  |SSHLD|DORD |SPI2X|CPOL |CPHA |SPR1 |SPR0 ]
+                 ;                          >-----------------------v
+                 ;SPSR [  0  |  0  |  0  |  0  |  0  |  0  |  0  |SPI2X]
+                 ;
+                 ;SPCR [  0  |  0  |DORD |  1  |CPOL |CPHA |SPR1 |SPR0 ]
+                 ; --> [SPIE | SPE |DORD |MSTR |CPOL |CPHA |SPR1 |SPR0 ]
+                 spw_cmd:
+000f5a fca6         sbrc  operand,6         ;test clearing sshld
+000f5b c00f         ifs_and  spw_cmd_sshld
+000f5c 9100 00c8    lds   a,spi_cmd
+000f5e ff06         sbrs  a,6               ;test sshld not already clear 
+000f5f c00b         ifs      spw_cmd_sshld 
+000f60 e10f            ldi   a,spi_idle        ;turn off ss
+000f61 bb08            out   abuslo,a
+000f62 9a6e            sbi   spcr,spe          ;enable SPI
+000f63 bac2
+000f64 e811
+000f65 bb1b
+000f66 9a96            set_io_select spi_sel
+000f67 9ade            ena_io_select
+000f68 bb1b            dis_spi_select          ;latch spi interface
+000f69 986e            cbi   spcr,spe          ;stop spi
+000f6a bad2            out   cbus,readmem      ;clear IO ext select & set read mode
+                    end   spw_cmd_sshld 
+000f6b 92a0 00c8    sts   spi_cmd,operand   ;save slave select hold   
+000f6d 2d0a         mov   a,operand         ;charge with forced bits
+000f6e 6100         sbr   a,(1<<mstr)       ;always master
+000f6f 730f         cbr   a,(1<<spie|1<<spe) ;no interrupt enable & no spi enable
+000f70 b90d         out   spcr,a
+000f71 b87e         out   spsr,zero
+000f72 fca4         sbrc  operand,4         ;test SPI2X
+000f73 b86e            out   spsr,one          ;SPI2X is set
+000f74 cef3         rjmp  iw_exit
+                 
+                 ;SPI data - r/w SPDR
+                 ;
+                 spw_data:
+                    .ifdef   spi_vat        ;do slave address translation
+000f75 2fec            mov   zl,oplow
+000f76 70e7            andi  zl,7              ;A0:2 only
+000f77 54e0            addi  zl,low(spi_vss<<1)
+000f78 e1fd            ldi   zh,high(spi_vss<<1)
+000f79 9004            lpm   c,z
+000f7a ba08            out   spi_out,c
+                    .endif
+000f7b 9a6e         sbi   spcr,spe          ;enable SPI
+000f7c bac2
+000f7d e811
+000f7e bb1b
+000f7f 9a96         set_io_select spi_sel
+000f80 9ade         ena_io_select
+000f81 b8af         out   spdr,operand      ;write data
+000f82 e10f         ldi   a,spi_idle        ;prepare to turn off ss
+000f83 9000 00c8    lds   c,spi_cmd         ;get slave select hold
+000f85 9b77
+000f86 cffe         wait_spi
+000f87 b01f         in    d,spdr            ;read incoming data
+000f88 9210 00c9    sts   spi_rdat,d
+000f8a fe06         sbrs  c,6               ;slave select hold?
+000f8b bb08            out   abuslo,a          ;end slave select
+000f8c bb1b         dis_spi_select          ;latch spi interface
+000f8d 986e         cbi   spcr,spe          ;stop spi
+000f8e bad2         out   cbus,readmem      ;clear IO ext select & set read mode
+000f8f ced8         rjmp  iw_exit
+                 spr_data:
+                    .ifdef   spi_vat        ;do slave address translation
+000f90 2fec            mov   zl,oplow
+000f91 70e7            andi  zl,7              ;A0:2 only
+000f92 54e0            addi  zl,low(spi_vss<<1)
+000f93 e1fd            ldi   zh,high(spi_vss<<1)
+000f94 9004            lpm   c,z
+000f95 ba08            out   spi_out,c
+                    .endif
+000f96 9a6e         sbi   spcr,spe          ;enable SPI
+000f97 bac2
+000f98 e811
+000f99 bb1b
+000f9a 9a96         set_io_select spi_sel
+000f9b 9ade         ena_io_select
+000f9c b85f         out   spdr,allon        ;dummy write
+000f9d e10f         ldi   a,spi_idle        ;prepare to turn off ss
+000f9e 9000 00c8    lds   c,spi_cmd         ;get slave select hold
+000fa0 9b77
+000fa1 cffe         wait_spi
+000fa2 b0af         in    operand,spdr      ;read incoming data
+000fa3 fe06         sbrs  c,6               ;slave select hold?
+000fa4 bb08            out   abuslo,a          ;end slave select
+000fa5 bb1b         dis_spi_select          ;latch spi interface
+000fa6 986e         cbi   spcr,spe          ;stop spi
+000fa7 bad2         out   cbus,readmem      ;clear IO ext select & set read mode
+000fa8 e0f6         ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+000fa9 9508         ret
+                 
+                 ;read data received during last write of the SPI
+                 spr_dat_lst:
+000faa 90a0 00c9    lds   operand,spi_rdat
+000fac e0f6         ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+000fad 9508         ret
+                 
+                 ;SPI reset
+                 spi_rs:
+000fae e10f         ldi   a,spi_idle        ;no slave selected
+000faf bb08         out   spi_out,a
+000fb0 e503         ldi   a,0b01010011      ;enable, master, dead slow
+000fb1 b87e         out   spsr,zero         ;clear double speed
+000fb2 b90d         out   spcr,a
+000fb3 bac2
+000fb4 e811
+000fb5 7f1d
+000fb6 bb1b
+000fb7 9a96         set_io_reset   spi_sel
+000fb8 9ade         ena_io_select
+000fb9 b87f
+000fba 9b77
+000fbb cffe         out_spi zero            ;8 clocks to nobody
+000fbc b85f
+000fbd 9b77
+000fbe cffe
+000fbf b10f         in_spi a                ;check MISO pulled high
+000fc0 3f0f         cpi   a,0xff
+000fc1 f021         ifne  spi_rs_fail
+000fc2 e9ea
+000fc3 e1ff
+000fc4 940e 1983       PrintStr_far spi_fail
+                    end   spi_rs_fail
+000fc6 bb1b         dis_spi_select          ;latch spi interface
+000fc7 bad2         out   cbus,readmem      ;clear IO ext select & set read mode
+000fc8 9270 00c8    sts   spi_cmd,zero      ;set default
+000fca e100         ldi   a,0x10            ;master & default
+000fcb b90d         out   spcr,a
+000fcc 9508         ret
+000fcd 0a0d
+000fce 5053
+000fcf 2049
+000fd0 7562
+000fd1 2073
+000fd2 7473
+000fd3 6375
+000fd4 006b      spi_fail:   .db   13,10,"SPI bus stuck",0
+                 
+                 ;DMA SPI read block
+                 dma_spi_rb:
+000fd5 9100 00c8    lds   a,spi_cmd         ;verify slave select hold
+000fd7 ff06         sbrs  a,6
+000fd8 c016         ifs   dma_spi_rssh
+000fd9 9100 00ca       lds   a,dma_last_cmd    ;verify last command and parameters
+000fdb 9110 00cb       lds   b,dma_tab_index
+000fdd 3003            cpi   a,3               ;current SPI read block (retry)?
+000fde f429            ifeq  spi_drb_retry
+000fdf 91a0 00d1          lds   xl,dma_tab+5            ;load in progress block count
+000fe1 91b0 00d2          lds   xh,dma_tab+6
+000fe3 c00e               rjmp  dma_spi_rb1
+                       end   spi_drb_retry
+000fe4 3103            cpi   a,0x13            ;previous SPI read block?
+000fe5 f021            ifeq_or  spi_drb
+000fe6 3000            cpi   a,0               ;previous set block address table?
+000fe7 f439            ifeq_and spi_drb
+000fe8 3015            cpi   b,5               ;block address table valid?
+000fe9 f429            ifeq     spi_drb
+000fea 91a0 00cf          lds   xl,dma_tab+3      ;load block count
+000fec 91b0 00d0          lds   xh,dma_tab+4
+000fee c003               rjmp  dma_spi_rb1
+                       end      spi_drb
+                    end   dma_spi_rssh
+000fef 9250 00ca    sts   dma_last_cmd,allon ;mark invalid sequence of command
+000ff1 ce76         rjmp  iw_exit
+                 dma_spi_rb1:
+000ff2 92a0 00ca    sts   dma_last_cmd,operand ;mark command in progress
+                    .ifdef   spi_vat        ;do slave address translation
+000ff4 91e0 00cc       lds   zl,dma_tab
+000ff6 70e7            andi  zl,7              ;A0:2 only
+000ff7 54e0            addi  zl,low(spi_vss<<1)
+000ff8 e1fd            ldi   zh,high(spi_vss<<1)
+000ff9 9004            lpm   c,z
+                    .else
+                    .endif
+000ffa 91e0 00cd    lds   zl,dma_tab+1         ;load memory address
+000ffc 91f0 00ce    lds   zh,dma_tab+2
+000ffe b10d         in    a,spcr            ;load SPCR values
+000fff 2e10         mov   d,a               ;disabled
+001000 6400         sbr   a,(1<<spe)
+001001 2e20         mov   e,a               ;enabled
+001002 bac2         out   cbus,clear        ;readmode off
+001003 e811
+001004 ecc1
+001005 e7d0         prep_io_select spi_sel
+001006 ba54         out   dbusddr,allon     ;prepare to write mem
+001007 b709         in    a,timsk           ;block single step on retry
+001008 7f0e         cbr   a,1<<toie0
+001009 bf09         out   timsk,a
+00100a 6830         sbr   flags,(1<<dma_rpt) ;set dma interrupt modifier
+                    do       spi_drb_loop
+                 ;      .ifdef irq_dis_real
+                 ;         sbrs  stat2,2           ;all interrupts disable
+                 ;      .endif
+00100b 9478            sei
+                       ;read SPI
+00100c ba08            out   spi_out,c         ;slave select
+00100d 94f8            cli
+00100e b82d            out   spcr,e            ;enable SPI
+00100f bbcb
+001010 bbd2            make_io_select
+001011 b85f
+001012 9b77
+001013 cffe
+001014 b10f            in_spi a                ;read incoming data
+001015 bb1b            dis_spi_select          ;latch spi interface
+001016 b81d            out   spcr,d            ;disable spi
+001017 bac2            out   cbus,clear
+                       ;write memory
+001018 bbe8            out   abuslo,zl         ;set memory address
+001019 bbfb            out   abushi,zh
+00101a bae2            out   cbus,writemem     ;WE, ~OE
+00101b bb05            out   dbusout,a         ;dbus write
+00101c 9631            adiw  z,1
+00101d bac2            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+00101e 9711            sbiw  x,1
+00101f f759         loopne   spi_drb_loop
+001020 ba74         out   dbusddr,zero      ;end writing memory
+001021 93e0 00cd    sts   dma_tab+1,zl      ;save next memory address
+001023 93f0 00ce    sts   dma_tab+2,zh
+001025 e103         ldi   a,0x13            ;last successful command was read
+001026 9300 00ca    sts   dma_last_cmd,a
+001028 b709         in    a,timsk           ;undo block single step
+001029 6001         sbr   a,1<<toie0
+00102a bf09         out   timsk,a
+00102b 773f         cbr   flags,(1<<dma_rpt) ;clear dma interrupt modifier
+00102c ce3b         rjmp  iw_exit
+                 ;DMA SPI write block
+                 dma_spi_wb:
+00102d 9100 00c8    lds   a,spi_cmd         ;verify slave select hold
+00102f ff06         sbrs  a,6
+001030 c016         ifs   dma_spi_wssh
+001031 9100 00ca       lds   a,dma_last_cmd    ;verify last command and parameters
+001033 9110 00cb       lds   b,dma_tab_index
+001035 3002            cpi   a,2               ;current SPI read block (retry)?
+001036 f429            ifeq  spi_dwb_retry
+001037 91a0 00d1          lds   xl,dma_tab+5      ;load in progress block count
+001039 91b0 00d2          lds   xh,dma_tab+6
+00103b c00e               rjmp  dma_spi_wb1
+                       end   spi_dwb_retry
+00103c 3102            cpi   a,0x12            ;previous SPI read block?
+00103d f021            ifeq_or  spi_dwb
+00103e 3000            cpi   a,0               ;previous set block address table?
+00103f f439            ifeq_and spi_dwb
+001040 3015            cpi   b,5               ;block address table valid?
+001041 f429            ifeq     spi_dwb
+001042 91a0 00cf          lds   xl,dma_tab+3      ;load block count
+001044 91b0 00d0          lds   xh,dma_tab+4
+001046 c003               rjmp  dma_spi_wb1
+                       end      spi_dwb
+                    end   dma_spi_wssh
+001047 9250 00ca    sts   dma_last_cmd,allon ;mark invalid sequence of command
+001049 ce1e         rjmp  iw_exit
+                 dma_spi_wb1:
+00104a 92a0 00ca    sts   dma_last_cmd,operand ;mark command in progress
+                    .ifdef   spi_vat        ;do slave address translation
+00104c 91e0 00cc       lds   zl,dma_tab
+00104e 70e7            andi  zl,7              ;A0:2 only
+00104f 54e0            addi  zl,low(spi_vss<<1)
+001050 e1fd            ldi   zh,high(spi_vss<<1)
+001051 9004            lpm   c,z
+                    .else
+                    .endif
+001052 91e0 00cd    lds   zl,dma_tab+1      ;load memory address
+001054 91f0 00ce    lds   zh,dma_tab+2
+001056 b10d         in    a,spcr            ;load SPCR values
+001057 2e10         mov   d,a               ;disabled
+001058 6400         sbr   a,(1<<spe)
+001059 2e20         mov   e,a               ;enabled
+00105a e811
+00105b ecc1
+00105c e7d0         prep_io_select spi_sel
+00105d b709         in    a,timsk           ;block single step on retry
+00105e 7f0e         cbr   a,1<<toie0
+00105f bf09         out   timsk,a
+001060 6830         sbr   flags,(1<<dma_rpt) ;set dma interrupt modifier
+                    do       spi_dwb_loop
+                       ;read memory
+001061 bbe8            out   abuslo,zl
+001062 bbfb            out   abushi,zh
+                 ;      .ifdef irq_dis_real
+                 ;         sbrs  stat2,2           ;all interrupts disable
+                 ;      .endif
+001063 9478                  sei
+001064 0000                  nop
+001065 94f8                  cli
+001066 9631                  adiw  z,1
+                       wait_data_valid 4
+001067 b303            in    a,dbusin
+                       ;write SPI
+001068 ba08            out   spi_out,c         ;slave select
+001069 b82d            out   spcr,e            ;enable SPI
+00106a bbcb
+00106b bbd2            make_io_select
+00106c b90f
+00106d 9b77
+00106e cffe            out_spi a               ;write data to spi
+00106f bb1b            dis_spi_select          ;latch spi interface
+001070 b81d            out   spcr,d            ;stop spi
+001071 bad2            out   cbus,readmem
+001072 9711            sbiw  x,1
+001073 f769         loopne   spi_dwb_loop
+001074 93e0 00cd    sts   dma_tab+1,zl      ;save next memory address
+001076 93f0 00ce    sts   dma_tab+2,zh
+001078 e102         ldi   a,0x12            ;last successful command was read
+001079 9300 00ca    sts   dma_last_cmd,a
+00107b b709         in    a,timsk           ;undo block single step
+00107c 6001         sbr   a,1<<toie0
+00107d bf09         out   timsk,a
+00107e 773f         cbr   flags,(1<<dma_rpt) ;clear dma interrupt modifier
+00107f cde8         rjmp  iw_exit
+                 .else
+                 .endif
+                 
+                 ;********************************************************************
+                 ;
+                 ;     DMA for SPI, I2C and EEPROM or SD card load & save
+                 ;
+                 ;********************************************************************
+                 dmw_cmd:
+001080 2d0a         mov   a,operand
+001081 3008         cpi   a,dma_ct_end-dma_cmd_tab
+001082 f428         iflo  dmw_cmd_valid
+001083 e8eb            ldi   zl,low(dma_cmd_tab)
+001084 0fe0            add   zl,a
+001085 e1f0            ldi   zh,high(dma_cmd_tab)
+001086 1df7            adc   zh,zero
+001087 9409            ijmp
+                    end   dmw_cmd_valid
+                 dma_cmd_inv:
+001088 9250 00ca    sts   dma_last_cmd,allon   ;set invalid command
+00108a cddd         rjmp  iw_exit
+                 dma_cmd_tab:                  ;table of valid DMA commands
+00108b c007         rjmp  dma_set_tab   
+00108c c006         rjmp  dma_set_tab
+00108d cf9f         rjmp  dma_spi_wb
+00108e cf46         rjmp  dma_spi_rb
+00108f c11c         rjmp  dma_i2c_wb
+001090 c0c5         rjmp  dma_i2c_rb
+001091 c351         rjmp  dma_eep_save
+001092 c39e         rjmp  dma_eep_load
+                 dma_ct_end:
+                 
+                 ;dma set block transfer table:
+                 ;        SPI (cmd=0)    I2C (cmd=1)    EEPROM (cmd=0)
+                 ;  byte  slave address  don't care     program number
+                 ;  word  start address  start address  start address
+                 ;  word  byte count     byte count     end address
+                 
+                 dma_set_tab:
+001093 92a0 00cb    sts   dma_tab_index,operand ;1 = skip 1st byte
+001095 92a0 00ca    sts   dma_last_cmd,operand       
+001097 cdd0         rjmp  iw_exit
+                 
+                 ;dma read block transfer status
+                 dmr_stat:
+001098 90a0 00ca    lds   operand,dma_last_cmd ;dummy response
+00109a e0f6         ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+00109b 9508         ret
+                 
+                 ;dma write block transfer table
+                 dmw_data:
+00109c 9100 00ca    lds   a,dma_last_cmd    ;set tab?
+00109e 3002         cpi   a,2   
+00109f f468         iflo_and dmw_data_valid
+0010a0 9100 00cb    lds   a,dma_tab_index
+0010a2 3005         cpi   a,5               ;tab not already filled?
+0010a3 f448         iflo     dmw_data_valid
+0010a4 ecec            ldi   zl,low(dma_tab)
+0010a5 e0f0            ldi   zh,high(dma_tab)
+0010a6 0fe0            add   zl,a
+0010a7 1df7            adc   zh,zero
+0010a8 82a0            st    z,operand
+0010a9 9503            inc   a
+0010aa 9300 00cb       sts   dma_tab_index,a
+0010ac cdbb            rjmp  iw_exit
+                    end      dmw_data_valid
+0010ad 9250 00ca    sts   dma_last_cmd,allon   ;invalid sequence
+0010af 9250 00cb    sts   dma_tab_index,allon
+0010b1 cdb6         rjmp  iw_exit
+                 
+                 ;dma read block transfer table
+                 ;  used on load from EEPROM to fetch end address
+                 dmr_data:
+0010b2 9100 00cb    lds   a,dma_tab_index
+0010b4 3005         cpi   a,5               ;end of tab?
+0010b5 f008         ifsh     dmr_tab_end
+0010b6 2d07            mov   a,zero            ;start over
+                    end   dmr_tab_end
+0010b7 ecec         ldi   zl,low(dma_tab)
+0010b8 e0f0         ldi   zh,high(dma_tab)
+0010b9 0fe0         add   zl,a
+0010ba 1df7         adc   zh,zero
+0010bb 80a0         ld    operand,z
+0010bc 9503         inc   a
+0010bd 9300 00cb    sts   dma_tab_index,a
+0010bf 9250 00ca    sts   dma_last_cmd,allon   ;can't continue
+0010c1 e0f6         ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+0010c2 9508         ret
+                 
+                 .ifdef i2c_sel
+                 ;********************************************************************
+                 ;
+                 ;     TWI / I2C
+                 ;
+                 ;********************************************************************
+                 ;
+                 ;  TWI / I2C Hardware        VCC
+                 ;                             +
+                 ;                             |
+                 ;   repeat for each signal    |
+                 ;                            .-.
+                 ;                            | |
+                 ;             1/4 74HC4066   | |2k7
+                 ;                   .---.    '-'
+                 ;                   |   |     |
+                 ;  o----------------|/ -|-----o--------------------o
+                 ;   PortC 0:3   I/O |   | I/O    SCL/SDA/-INT/-RESET
+                 ;                   '---'     |
+                 ;                     |CTL
+                 ;  >------------------+       |
+                 ;   TWI activate
+                 ;                             o
+                 ;        optional Interrupt   | -INT only
+                 ;                             |
+                 ;                             |
+                 ;  <---------------------->|--+
+                 ;   -IRQ or -NMI in    Schottky
+                 ;
+                 ;define your I2C interface
+                 ;i2c_sel defined in main file
+                 .EQU  i2c_in      =dbusin     ; I2C input
+                 .EQU  i2c_ddr     =dbusddr    ; I2C DDR
+                 .EQU  i2c_out     =dbusout    ; I2C output
+                 .EQU  i2c_scl     =0          ; clock i/o
+                 .EQU  i2c_sda     =1          ; data i/o
+                 .EQU  i2c_int     =2          ; -interrupt input (optional to detect i2c int)
+                 .EQU  i2c_res     =3          ; -reset output (optional to reset i2c slaves)
+                 ; # of clocks for 400kHz SCL phase (1/2 clock) @ Osc_Hz rounded up
+                 .EQU  i2c_clk     =((Osc_Hz / 2 - 1) / 400000) + 1
+                 #define i2c_data a
+                 ;used registers a (data), b (timing), zl (status), e (io select default)  
+                 
+                 ;
+                 ; open i2c interface
+                 ;
+                 i2c_open:
+0010c3 bac2
+0010c4 e811
+0010c5 bb1b
+0010c6 9a96         set_io_select i2c_sel
+                 i2c_open_rs:
+0010c7 ba55         out   dbusout,allon     ;float all outputs high
+0010c8 ba54         out   dbusddr,allon     ;(discharge low cap)
+0010c9 2e21         mov   e,b
+0010ca ba74         out   dbusddr,zero
+0010cb ba75         out   dbusout,zero      ;open collector drive via ddr
+0010cc 9adc         ena_io_select
+0010cd 9508         ret
+                 
+                 ;
+                 ; read i2c data
+                 ;
+                 ;     send ack before reading except on 1st read
+                 i2c_data_rd:   
+0010ce 91e0 00c6    lds   zl,i2c_statreg    ;load parameters
+0010d0 fde0         sbrc  zl,0              ;test interface stopped
+0010d1 c00d         ifs   i2c_read_ok
+0010d2 dff0            rcall i2c_open
+0010d3 fbe2            bst   zl,2              ;set speed
+0010d4 9488            clc                     ;ack
+0010d5 fde3            sbrc  zl,3              ;read ack required?
+0010d6 d1bf               rcall i2c_putack
+0010d7 d19c            rcall i2c_read
+0010d8 2ea0            mov   operand,i2c_data
+0010d9 60e8            sbr   zl,0b1000         ;set read ack required
+0010da 93e0 00c6       sts   i2c_statreg,zl    ;save status
+                       .if (io_sel_direct > 0)
+0010dc ba2b               out   abushi,e          ;close i2c interface
+                       .endif
+0010dd bad2            out   cbus,readmem      ;clear IO select & set read mode
+0010de c001         else  i2c_read_ok
+0010df 2ca7            mov   operand,zero
+                    end   i2c_read_ok
+0010e0 e0f6         ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+0010e1 9508         ret
+                 ;
+                 ; write i2c data if not stopped or previous read
+                 ; write i2c address if start condition
+                 ;
+                 ;     if nak response (slave not ready/present) send stop
+                 i2c_data_wrt:
+0010e2 91e0 00c6    lds   zl,i2c_statreg    ;load parameters
+0010e4 fbe2         bst   zl,2              ;set speed
+0010e5 ffe1         sbrs  zl,1              ;start pending?
+0010e6 c013         ifs   i2c_adr
+0010e7 2d0a            mov   a,operand
+0010e8 dfda            rcall i2c_open
+0010e9 9408            sec                     ;nak
+0010ea fde3            sbrc  zl,3              ;read ack outstanding?
+0010eb d1aa               rcall i2c_putack
+0010ec 2d0a            mov   i2c_data,operand
+                       .ifdef i2c_eep_adr
+                       .else
+0010ed d133               rcall i2c_start
+                       .endif
+0010ee 70e4            andi  zl,0b100          ;keep speed, clear the rest
+0010ef f010            ifcc  i2c_start_ack
+0010f0 64e0               sbr   zl,0b1000000      ;set ack
+0010f1 c003            else  i2c_start_ack
+0010f2 7bef               cbr   zl,0b1000000      ;clear ack
+0010f3 60e1               sbr   zl,0b1            ;set stop
+0010f4 d1bd               rcall i2c_stop
+                       end   i2c_start_ack
+0010f5 93e0 00c6       sts   i2c_statreg,zl
+                       .if (io_sel_direct > 0)
+0010f7 ba2b               out   abushi,e          ;close i2c interface
+                       .endif
+0010f8 bad2            out   cbus,readmem      ;clear IO select & set read mode
+0010f9 cd6e            rjmp  iw_exit
+                    end   i2c_adr
+0010fa 2f0e         mov   a,zl
+0010fb 7009         andi  a,0b1001          ;not stopped and not read?
+0010fc f479         ifeq  i2_wrt_ok
+0010fd dfc5            rcall i2c_open
+0010fe 2d0a            mov   i2c_data,operand
+0010ff d13a            rcall i2c_write
+001100 70e4            andi  zl,0b100          ;keep speed, clear the rest
+001101 f010            ifcc  i2c_write_ack
+001102 64e0               sbr   zl,0b1000000      ;set ack
+001103 c003            else  i2c_write_ack
+001104 7bef               cbr   zl,0b1000000      ;clear ack
+001105 60e1               sbr   zl,0b1            ;set stop
+001106 d1ab               rcall i2c_stop
+                       end   i2c_write_ack
+001107 93e0 00c6       sts   i2c_statreg,zl
+                       .if (io_sel_direct > 0)
+001109 ba2b               out   abushi,e          ;close i2c interface
+                       .endif
+00110a bad2            out   cbus,readmem      ;clear IO select & set read mode
+00110b cd5c            rjmp  iw_exit
+                    end   i2_wrt_ok
+00110c cd5b         rjmp  iw_exit
+                 
+                 ;
+                 ;  write i2c command
+                 ;
+                 ;0=send stop, nak & stop if pending read
+                 ;1=set start(next data write = address), speed 100kHz
+                 ;2=set start(next data write = address), speed 400kHz
+                 ;3=send reset (9 naks), optional hw reset
+                 ;  allow sufficient time after resetting hardware 
+                 ;
+                 i2c_cmd:
+00110d 91e0 00c6    lds   zl,i2c_statreg
+00110f 2d0a         mov   a,operand
+001110 3003         cpi   a,3
+001111 f488         iflo  i2c_cmd_012
+001112 3001            cpi   a,1
+001113 f410            iflo  i2c_cmd_stop      ;command code 0 - send stop
+001114 d013               rcall i2c_send_stop
+001115 c00f               rjmp  i2c_cmd_exit
+                       end   i2c_cmd_stop 
+001116 f431            ifeq  i2c_start_100     ;command code 1 - set start 100kHz 
+001117 7feb               cbr   zl,0b100       ;speed 100 kHz
+001118 fde5               sbrc  zl,5           ;bus not stuck?        
+001119 d0ed                  rcall i2c_reset   ;stuck bus requires a reset
+00111a ffe5               sbrs  zl,5           ;bus still stuck?
+00111b 60e2                  sbr   zl,0b10     ;OK to start
+00111c c008               rjmp  i2c_cmd_exit
+                       end   i2c_start_100     ;command code 2 - set start 400kHz
+00111d 7feb            cbr   zl,0b100          ;speed 100 kHz for reset
+00111e fde5            sbrc  zl,5              ;bus not stuck?        
+00111f d0e7               rcall i2c_reset      ;stuck bus requires a reset
+001120 ffe5            sbrs  zl,5              ;bus still stuck?
+001121 60e6               sbr   zl,0b110       ;OK to start with 400kHz
+001122 c002            rjmp  i2c_cmd_exit
+                    end   i2c_cmd_012
+001123 f409         ifeq  i2c_cmd_reset        ;command code 3 - reset i2c bus
+001124 d0e2            rcall i2c_reset
+                    end   i2c_cmd_reset
+                 i2c_cmd_exit:
+001125 93e0 00c6    sts   i2c_statreg,zl
+001127 cd40         rjmp  iw_exit
+                 
+                 ;stop i2c
+                 i2c_send_stop:
+001128 fde0         sbrc  zl,0              ;not already stopped?
+001129 c00a         ifs   i2c_not_stop
+00112a df98            rcall i2c_open
+00112b fbe2            bst   zl,2              ;set speed
+00112c 9408            sec                     ;nak
+00112d fde3            sbrc  zl,3              ;read ack outstanding?
+00112e d167               rcall i2c_putack
+00112f 70e4            andi  zl,0b100          ;keep speed, clear the rest
+001130 60e1            sbr   zl,0b1            ;set stop
+001131 d180            rcall i2c_stop
+                       .if (io_sel_direct > 0)
+001132 ba2b               out   abushi,e          ;close i2c interface
+                       .endif
+001133 bad2            out   cbus,readmem      ;clear IO select & set read mode
+                    end   i2c_not_stop
+001134 9508         ret
+                 
+                 ;
+                 ; read i2c status
+                 ;
+                 ;  [ IRQ | ACK |Stuck|  0  |Read |Speed|Start|Stop ]
+                 ;IRQ:    1=I2C Interrupt pending
+                 ;ACK:    1=slave acknowledge - device present/ready
+                 ;Stuck:  1=SCL or SDA stuck - interface needs reset
+                 ;  0
+                 ;Read:   1=Send read acknowledge pending
+                 ;Speed:  1=400kHz, 0=100kHz
+                 ;Start:  1=next write = address
+                 ;Stop:   1=interface stopped
+                 i2c_stat:
+001135 91e0 00c6    lds   zl,i2c_statreg    ;load status
+001137 df8b         rcall i2c_open
+001138 9b9a         sbis  i2c_in,i2c_int    ;skip if no interrupt
+001139 68e0            sbr   zl,0b10000000     ;merge interrupt to status
+00113a 2eae         mov   operand,zl
+                    .if (io_sel_direct > 0)
+00113b ba2b            out   abushi,e          ;close i2c interface
+                    .endif
+00113c bad2         out   cbus,readmem      ;clear IO select & set read mode
+00113d e0f6         ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+00113e 9508         ret
+                    
+                 ;
+                 ; I2C reset - mark unusable if stuck
+                 ;
+                 i2c_rs:
+00113f bac2
+001140 e811
+001141 bb1b
+001142 9a96         set_io_reset   i2c_sel
+001143 df83         rcall i2c_open_rs
+001144 d0c3         rcall i2c_reset_rs
+001145 93e0 00c6    sts   i2c_statreg,zl
+001147 ffe5         sbrs  zl,5           ;message, if I2C stuck
+001148 c004         ifs   i2c_rs_fail
+001149 e9ec
+00114a e2f2
+00114b 940e 1983       PrintStr_far i2c_fail
+                    end   i2c_rs_fail
+00114d 9508         ret
+00114e 0a0d
+00114f 3249
+001150 2043
+001151 7562
+001152 2073
+001153 7473
+001154 6375
+001155 006b      i2c_fail:   .db   13,10,"I2C bus stuck",0
+                 
+                 ;DMA I2C read block
+                 dma_i2c_rb:
+001156 9100 00ca    lds   a,dma_last_cmd
+001158 9110 00cb    lds   b,dma_tab_index
+00115a 3005         cpi   a,5               ;current i2c read block (retry)?
+00115b f429         ifeq  i2c_drb_retry
+00115c 91a0 00d1       lds   xl,dma_tab+5            ;load in progress block count
+00115e 91b0 00d2       lds   xh,dma_tab+6
+001160 c00e            rjmp  dma_i2c_rb1
+                    end   i2c_drb_retry
+001161 3105         cpi   a,0x15            ;previous i2c read block?
+001162 f021         ifeq_or  i2c_drb
+001163 3001         cpi   a,1               ;previous set block address table?
+001164 f439         ifeq_and i2c_drb
+001165 3015         cpi   b,5               ;block address table valid?
+001166 f429         ifeq     i2c_drb
+001167 91a0 00cf       lds   xl,dma_tab+3      ;load block count
+001169 91b0 00d0       lds   xh,dma_tab+4
+00116b c003            rjmp  dma_i2c_rb1
+                    end      i2c_drb
+                 dma_i2c_rbfail:
+00116c 9250 00ca    sts   dma_last_cmd,allon ;mark invalid sequence of command
+00116e ccf9         rjmp  iw_exit
+                 dma_i2c_rb1:
+00116f 92a0 00ca    sts   dma_last_cmd,operand ;mark command in progress
+001171 91e0 00cd    lds   zl,dma_tab+1      ;load memory address
+001173 91f0 00ce    lds   zh,dma_tab+2
+                 
+001175 91c0 00c6    lds   yl,i2c_statreg    ;load current I2C status
+001177 fdc0         sbrc  yl,0              ;test interface stopped
+001178 cff3            rjmp  dma_i2c_rbfail
+001179 bac2         out   cbus,clear        ;readmode off
+00117a df48         rcall i2c_open
+00117b b202         in    c,cbus            ;save I2C register enable
+00117c b21b         in    d,abushi          ;save I2C enable
+00117d fbc2         bst   yl,2              ;set speed
+00117e 9488         clc                     ;ack
+00117f fdc3         sbrc  yl,3              ;read ack required?
+001180 d115            rcall i2c_putack
+001181 60c8         sbr   yl,0b1000         ;set read ack required
+001182 93c0 00c6    sts   i2c_statreg,yl    ;save status
+001184 b709         in    a,timsk           ;block single step on retry
+001185 7f0e         cbr   a,1<<toie0
+001186 bf09         out   timsk,a
+001187 6830         sbr   flags,(1<<dma_rpt) ;set dma interrupt modifier
+                    do       i2c_drb_loop
+                       ;continue reading I2C
+001188 d0eb            rcall i2c_read
+                       .if (io_sel_direct > 0)
+001189 ba2b               out   abushi,e          ;close i2c interface
+                       .endif
+00118a bac2            out   cbus,clear        ;clear IO select
+                       ;write memory
+00118b ba54            out   dbusddr,allon     ;prepare to write mem
+00118c bbe8            out   abuslo,zl         ;set memory address
+00118d bbfb            out   abushi,zh
+00118e bae2            out   cbus,writemem     ;WE, ~OE
+00118f bb05            out   dbusout,a         ;dbus write
+001190 9631            adiw  z,1
+001191 bac2            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+001192 9711            sbiw  x,1
+001193 f059         exiteq   i2c_drb_loop
+                       ;read i2c
+001194 ba55            out   dbusout,allon     ;float all outputs high
+                 ;      .ifdef irq_dis_real
+                 ;         sbrs  stat2,2           ;all interrupts disable
+                 ;      .endif
+001195 9478            sei
+001196 ba74            out   dbusddr,zero
+001197 94f8            cli
+001198 ba75            out   dbusout,zero      ;open collector drive via ddr
+001199 ba1b            out   abushi,d          ;reenable I2C bus 
+00119a ba02            out   cbus,c
+00119b 9488            clc
+00119c fbc2            bst   yl,2              ;set speed
+00119d d0f8            rcall i2c_putack
+00119e cfe9         loop     i2c_drb_loop
+00119f ba74         out   dbusddr,zero      ;end writing to memory
+0011a0 93e0 00cd    sts   dma_tab+1,zl      ;save next memory address
+0011a2 93f0 00ce    sts   dma_tab+2,zh
+0011a4 e105         ldi   a,0x15            ;last successful command was read
+0011a5 9300 00ca    sts   dma_last_cmd,a
+0011a7 b709         in    a,timsk           ;undo block single step
+0011a8 6001         sbr   a,1<<toie0
+0011a9 bf09         out   timsk,a
+0011aa 773f         cbr   flags,(1<<dma_rpt) ;clear dma interrupt modifier
+0011ab ccbc         rjmp  iw_exit
+                 
+                 ;DMA I2C write block
+                 dma_i2c_wb:
+0011ac 9100 00ca    lds   a,dma_last_cmd
+0011ae 9110 00cb    lds   b,dma_tab_index
+0011b0 3004         cpi   a,4               ;current i2c read block (retry)?
+0011b1 f429         ifeq  i2c_dwb_retry
+0011b2 91a0 00d1       lds   xl,dma_tab+5      ;load in progress block count
+0011b4 91b0 00d2       lds   xh,dma_tab+6
+0011b6 c00e            rjmp  dma_i2c_wb1
+                    end   i2c_dwb_retry
+0011b7 3104         cpi   a,0x14            ;previous i2c read block?
+0011b8 f021         ifeq_or  i2c_dwb
+0011b9 3001         cpi   a,1               ;previous set block address table?
+0011ba f439         ifeq_and i2c_dwb
+0011bb 3015         cpi   b,5               ;block address table valid?
+0011bc f429         ifeq     i2c_dwb
+0011bd 91a0 00cf       lds   xl,dma_tab+3      ;load block count
+0011bf 91b0 00d0       lds   xh,dma_tab+4
+0011c1 c003            rjmp  dma_i2c_wb1
+                    end      i2c_dwb
+                 dma_i2c_rwfail:
+0011c2 9250 00ca    sts   dma_last_cmd,allon ;mark invalid sequence of command
+0011c4 cca3         rjmp  iw_exit
+                 dma_i2c_wb1:
+0011c5 92a0 00ca    sts   dma_last_cmd,operand ;mark command in progress
+0011c7 91e0 00cd    lds   zl,dma_tab+1      ;load memory address
+0011c9 91f0 00ce    lds   zh,dma_tab+2
+0011cb e811
+0011cc e9c1
+0011cd e7d0         prep_io_select i2c_sel
+0011ce 2e21         mov   e,b               ;save I2C register idle
+0011cf 2e1c         mov   d,yl              ;save I2C register active
+0011d0 2e0d         mov   c,yh              ;save I2C register enable
+0011d1 91c0 00c6    lds   yl,i2c_statreg    ;load I2C status
+0011d3 2f0c         mov   a,yl
+0011d4 7009         andi  a,0b1001          ;not stopped and not read?
+0011d5 f761         brne  dma_i2c_rwfail
+0011d6 b709         in    a,timsk           ;block single step on retry
+0011d7 7f0e         cbr   a,1<<toie0
+0011d8 bf09         out   timsk,a
+0011d9 6830         sbr   flags,(1<<dma_rpt) ;set dma interrupt modifier
+                    do       i2c_dwb_loop
+                       ;read memory
+0011da bbe8            out   abuslo,zl
+0011db bbfb            out   abushi,zh
+                 ;      .ifdef irq_dis_real
+                 ;         sbrs  stat2,2           ;all interrupts disable
+                 ;      .endif
+0011dc 9478                  sei
+0011dd 0000                  nop
+0011de 94f8                  cli
+0011df 9631                  adiw  z,1
+0011e0 fbc2                  bst   yl,2              ;set speed
+                       wait_data_valid 5
+0011e1 b303            in    a,dbusin
+                       ;write i2c
+0011e2 bac2            out   cbus,clear
+0011e3 ba55            out   dbusout,allon     ;float all outputs high
+0011e4 ba54            out   dbusddr,allon     ;(discharge low cap)
+0011e5 ba74            out   dbusddr,zero
+0011e6 ba75            out   dbusout,zero      ;open collector drive via ddr
+0011e7 ba1b            out   abushi,d          ;reenable I2C bus 
+0011e8 ba02            out   cbus,c
+0011e9 d050            rcall i2c_write
+0011ea f030         ifcc  i2c_dwb_ack
+                       .if (io_sel_direct > 0)
+0011eb ba2b               out   abushi,e          ;close i2c interface
+                       .endif
+0011ec bad2            out   cbus,readmem      ;clear IO select & set read mode
+0011ed 9711            sbiw  x,1
+0011ee f759         loopne   i2c_dwb_loop
+0011ef e104            ldi   a,0x14            ;last successful command was read
+0011f0 c00b         else  i2c_dwb_ack
+0011f1 70c4            andi  yl,0b100          ;keep speed, clear ack & the rest
+0011f2 60c1            sbr   yl,0b1            ;set stop
+0011f3 93c0 00c6       sts   i2c_statreg,yl
+0011f5 d0bc            rcall i2c_stop
+                       .if (io_sel_direct > 0)
+0011f6 ba2b               out   abushi,e          ;close i2c interface
+                       .endif
+0011f7 bad2            out   cbus,readmem
+0011f8 2d05            mov   a,allon           ;mark dma failed unless...
+0011f9 9711            sbiw  x,1
+0011fa f409            ifeq  i2c_dwb_end_nak   ;...it is at the end of the block
+0011fb e104               ldi   a,0x14
+                       end   i2c_dwb_end_nak
+                    end   i2c_dwb_ack
+0011fc 9300 00ca    sts   dma_last_cmd,a
+0011fe 93e0 00cd    sts   dma_tab+1,zl      ;save next memory address
+001200 93f0 00ce    sts   dma_tab+2,zh
+001202 b709         in    a,timsk           ;undo block single step
+001203 6001         sbr   a,1<<toie0
+001204 bf09         out   timsk,a
+001205 773f         cbr   flags,(1<<dma_rpt) ;clear dma interrupt modifier
+001206 cc61         rjmp  iw_exit
+                 
+                 ;*********************
+                 
+                 
+                 ;
+                 ; wait_i2c  @0 = # of cycles, @1 = cyles already used 
+                 ;
+                 ;     i2c clock delay for 400 kHz (100kHz if T clear)
+                 ;     
+                 ;
+                 .macro      wait_i2c
+                       .set cycles = (@0 - 2) - @1       ;400 kHz delay -BRTS -used     
+                       .if (cycles > 2)
+                         .set  loop_cycles = (cycles / 3)      
+                         ldi   b,loop_cycles
+                         brts  i2c_400kHz
+                         ldi   b,loop_cycles + @0        ;add 3* delay (100 kHz))
+                 i2c_400kHz:
+                         dec   b
+                         brne  pc-1
+                         .set  cycles = (cycles - (loop_cycles * 3))
+                       .else
+                         .set  loop_cycles = @0
+                         brts  i2c_400kHz
+                         ldi   b,loop_cycles           ;add 3* delay (100 kHz)
+                         dec   b
+                         brne  pc-1
+                         nop                           ;compensate branch not taken
+                 i2c_400kHz:
+                       .endif
+                       .if (cycles > 0)
+                         .if   (cycles & 4)
+                           rjmp  pc+1
+                           rjmp  pc+1
+                         .endif
+                         .if   (cycles & 2)
+                           rjmp  pc+1
+                         .endif
+                         .if   (cycles & 1)
+                           nop
+                         .endif
+                       .endif
+                 .endmacro
+                 ;
+                 ; i2c macros - single master
+                 ;   allow clock stretching but no collision detection
+                 ;
+                 .macro      sda1        ;set sda high, single master
+                             cbi   i2c_ddr,i2c_sda
+                 .endmacro 
+                 .macro      scl1        ;set scl high, wait scl high
+                             cbi   i2c_ddr,i2c_scl
+                             sbis  i2c_in,i2c_scl    ;subtract 2 clocks
+                             rjmp  pc-1              ;in next wait_ns
+                 .endmacro
+                 .macro      sda0        ;set sda low
+                             sbi   i2c_ddr,i2c_sda
+                 .endmacro
+                 .macro      scl0        ;set scl low
+                             sbi   i2c_ddr,i2c_scl
+                 .endmacro
+                 
+                 ;
+                 ; i2c interface reset & check for stuck bus
+                 ;
+                 i2c_reset:
+001207 debb         rcall i2c_open
+                 i2c_reset_rs:
+001208 9aa3         sbi   i2c_ddr,i2c_res   ;optional hw reset
+001209 e31e
+00120a f00e
+00120b ef1c
+00120c 951a
+00120d f7f1
+00120e c000         wait_i2c 190,0          ;allow reset to disengage slaves
+00120f 27ee         clr   zl                ;clear all
+001210 9998         sbic  i2c_in,i2c_scl    ;SCL stuck low?
+001211 c002         ifs   i2c_stuck         ;set interface not usable status
+001212 62e1            sbr   zl,0b100001       ;set stop & stuck
+001213 c009         else  i2c_stuck         ;reset for devices without hw-reset
+001214 94e8            clt                     ;set low speed
+001215 ef0f            ldi   i2c_data,0xff     ;9 clocks with nak
+001216 d023            rcall i2c_write
+001217 9999            sbic  i2c_in,i2c_sda    ;SDA stuck low?
+001218 c002            ifs   i2c_sda_stuck
+001219 62e1               sbr   zl,0b100001       ;set stop & stuck
+00121a c001            else  i2c_sda_stuck
+00121b 60e1               sbr   zl,0b1            ;set stop
+                       end   i2c_sda_stuck
+00121c d095            rcall i2c_stop
+                    end   i2c_stuck
+00121d 98a3         cbi   i2c_ddr,i2c_res   ;end optional hw reset
+                    .if (io_sel_direct > 0)
+00121e ba2b            out   abushi,e          ;close i2c interface
+                    .endif
+00121f bad2         out   cbus,readmem      ;clear IO select & set read mode
+001220 9508         ret
+                 
+                 ;
+                 ; i2c start with address
+                 ;
+                 ;     start -> slave,  i2c_data -> slave address
+                 ;     slave ack -> SREG.C     
+                 ;
+001221 9999      i2c_start:  sbic  i2c_in,i2c_sda    ;clock previous ack
+001222 c010                  ifs   start_prev_ack
+001223 9aa0                     scl0
+001224 e015
+001225 f00e
+001226 e119
+001227 951a
+001228 f7f1
+001229 0000                     wait_i2c i2c_clk,2      ;scl1
+00122a 98a0
+00122b 9b98
+00122c cffe                     scl1
+00122d e011
+00122e f00e
+00122f e01b
+001230 951a
+001231 f7f1
+001232 0000                     wait_i2c i2c_clk/2,4    ;scl1-sda0    
+                             end   start_prev_ack    
+001233 9aa1                  sda0
+001234 e011
+001235 f00e
+001236 e01b
+001237 951a
+001238 f7f1
+001239 0000                  wait_i2c i2c_clk/2,4    ;sec-rol-scl0
+                 ;
+                 ; i2c write: i2c_data -> slave data, slave ack -> SREG,C
+                 ;
+00123a 9408      i2c_write:  sec                     ;mark incomplete
+00123b 1f00                  rol   i2c_data
+00123c 9aa0      i_wrtloop:  scl0
+00123d e011
+00123e f00e
+00123f e01b
+001240 951a
+001241 f7f1
+001242 0000                  wait_i2c i2c_clk/2,4    ;brcc-(nop)-sdax
+001243 f418                  brcc  i_wrt0            ;data bit = 0
+001244 0000                  nop                     ;sda set after 4 clocks
+001245 98a1                  sda1
+001246 c002                  rjmp  i_wrt1
+001247 9aa1      i_wrt0:     sda0
+001248 c000                  rjmp  i_wrt1            ;nop 2 clocks
+001249 e011
+00124a f00e
+00124b e01b
+00124c 951a
+00124d f7f1
+00124e 0000      i_wrt1:     wait_i2c i2c_clk/2,4    ;rjmp-scl1
+00124f 98a0
+001250 9b98
+001251 cffe                  scl1
+001252 e013
+001253 f00e
+001254 e117
+001255 951a
+001256 f7f1
+001257 c000                  wait_i2c i2c_clk,7      ;scl1-lsl-brne-(nop)-scl0
+001258 0f00                  lsl   i2c_data
+001259 f711                  brne  i_wrtloop
+00125a 0000                  nop
+                 
+00125b 9aa0      i2c_getack: scl0
+00125c e012
+00125d f00e
+00125e e01c
+00125f 951a
+001260 f7f1                  wait_i2c i2c_clk/2,2    ;sda1
+001261 98a1                  sda1                    ;release sda after write
+001262 e012
+001263 f00e
+001264 e01c
+001265 951a
+001266 f7f1                  wait_i2c i2c_clk/2,2    ;scl1
+001267 98a0
+001268 9b98
+001269 cffe                  scl1
+00126a e011
+00126b f00e
+00126c e01b
+00126d 951a
+00126e f7f1
+00126f c000                  wait_i2c i2c_clk/2,3    ;scl1-clc
+001270 9488                  clc
+001271 9999                  sbic  i2c_in,i2c_sda
+001272 9408                  sec
+001273 9508                  ret
+                 ;
+                 ; i2c read: slave data -> i2c_data, 
+                 ;
+001274 e001      i2c_read:   ldi   i2c_data,1        ;precharge register full marker
+001275 f026
+001276 e01a
+001277 951a
+001278 f7f1
+001279 0000
+00127a 0000      i_rdloop:   wait_i2c i2c_clk/2,7    ;sbic-(sec)-rol-brcc-scl0
+00127b 9aa0                  scl0
+00127c e012
+00127d f00e
+00127e e01c
+00127f 951a
+001280 f7f1                  wait_i2c i2c_clk/2,2    ;sda1
+001281 98a1                  sda1                    ;clear sda out from prev. putack
+001282 e012
+001283 f00e
+001284 e01c
+001285 951a
+001286 f7f1                  wait_i2c i2c_clk/2,2    ;scl1
+001287 98a0
+001288 9b98
+001289 cffe                  scl1
+00128a e011
+00128b f00e
+00128c e01b
+00128d 951a
+00128e f7f1
+00128f c000                  wait_i2c i2c_clk/2,3    ;scl1-clc    
+001290 9488                  clc
+001291 9999                  sbic  i2c_in,i2c_sda
+001292 9408                  sec
+001293 1f00                  rol   i2c_data
+001294 f700                  brcc  i_rdloop          ;precharged bit hasn't arrived
+001295 9508                  ret
+                 ;
+                 ; i2c putack: SREG,C -> slave ack
+                 ;
+001296 9aa0      i2c_putack: scl0
+001297 e011
+001298 f00e
+001299 e01b
+00129a 951a
+00129b f7f1
+00129c 0000                  wait_i2c i2c_clk/2,4    ;brcc-(nop)-sdax
+00129d f418                  brcc  i_pack1
+00129e 0000                  nop                     ;compensate brcc
+00129f 98a1                  sda1
+0012a0 c002                  rjmp  i_pack2
+0012a1 9aa1      i_pack1:    sda0
+0012a2 c000                  rjmp  i_pack2           ;nop 2 clocks
+0012a3 e011
+0012a4 f00e
+0012a5 e01b
+0012a6 951a
+0012a7 f7f1
+0012a8 0000      i_pack2:    wait_i2c i2c_clk/2,4    ;rjmp-scl1
+0012a9 98a0
+0012aa 9b98
+0012ab cffe                  scl1
+0012ac e011
+0012ad f00e
+0012ae e01b
+0012af 951a
+0012b0 f7f1                  wait_i2c i2c_clk/2,5    ;scl1-ret-rcall-ldi+wait(-7)-scl0
+0012b1 9508                  ret
+                 ;
+                 ; i2c stop
+                 ;
+0012b2 f026
+0012b3 e01a
+0012b4 951a
+0012b5 f7f1
+0012b6 0000
+0012b7 c000      i2c_stop:   wait_i2c i2c_clk/2,6    ;scl1+wait(-5)-ret-rcall-scl0
+0012b8 9aa0                  scl0
+0012b9 e012
+0012ba f00e
+0012bb e01c
+0012bc 951a
+0012bd f7f1                  wait_i2c i2c_clk/2,2    ;sda0
+0012be 9aa1                  sda0
+0012bf e012
+0012c0 f00e
+0012c1 e01c
+0012c2 951a
+0012c3 f7f1                  wait_i2c i2c_clk/2,2    ;scl1
+0012c4 98a0
+0012c5 9b98
+0012c6 cffe                  scl1
+0012c7 e011
+0012c8 f00e
+0012c9 e01b
+0012ca 951a
+0012cb f7f1
+0012cc 0000                  wait_i2c i2c_clk/2,4    ;scl1-sda1
+0012cd 98a1                  sda1
+0012ce 9508                  ret
+                 .else
+                 .endif
+                 
+                 .ifdef eep_vld
+                 ;*****************************************************
+                 ;
+                 ; external SPI/I2C EEPROM as non volatile program storage
+                 ;
+                 ;*****************************************************
+                 ;
+                 ; EEP open - check spi/i2c bus & EEPROM presence
+                 eep_open:
+                    .ifdef spi_eep_adr
+0012cf b86e            out   spsr,one          ;speed 8MHz, mode 0, enabled
+0012d0 e500            ldi   a,0x50
+0012d1 b90d            out   spcr,a
+0012d2 e107            ldi   a,spi_eep_adr
+0012d3 bb08            out   spi_out,a
+0012d4 bac2
+0012d5 e811
+0012d6 bb1b
+0012d7 9a96            set_io_select spi_sel
+0012d8 9ade            ena_io_select
+0012d9 2e21            mov   e,b               ;deselcted IO (abushi)
+0012da e005            ldi   a,5               ;command: read status register
+0012db b90f
+0012dc 9b77
+0012dd cffe            out_spi a
+0012de b85f
+0012df 9b77
+0012e0 cffe
+0012e1 b10f            in_spi a
+0012e2 b238            in    f,spi_out         ;selected slave (abuslo a.k.a. spi_out)
+0012e3 e11f            ldi   b,spi_idle        ;stop slave select
+0012e4 bb18            out   spi_out,b
+0012e5 3f0f            cpi   a,0xff            ;MISO open?
+0012e6 f019            breq  eep_no_device
+                    .else
+                    .endif
+                    .if (io_sel_direct > 0)
+0012e7 b21b            in    d,abushi          ;selected IO exp. (abushi)
+                    .endif
+0012e8 b202         in    c,cbus            ;selected IO (cbus)
+0012e9 9508         ret 
+                 eep_no_device:
+0012ea e8ee
+0012eb e2f9
+0012ec d696         PrintStr err_no_eep     ;" SPI/I2C EEPROM not found"
+0012ed 940c 1c25    jmp   skip_main
+                 ;
+                 ; EEPROM write 1 Byte, select new slot if necessary
+                 ;
+                 eep_write:
+0012ef 23cc         tst   yl            ;need new slot?
+0012f0 f4b1         ifeq  eep_new_slot
+0012f1 91c0 009f       lds   yl,prog_num
+                       do       eep_find_slot
+                          do    eep_write_wait ;previous write complete?
+0012f3 99e1                  sbic  eecr,eewe
+0012f4 cffe               loop  eep_write_wait
+0012f5 bbde               out   eearl,yh       ;read slot to find prog#
+0012f6 ba6c               out   eecr,one
+0012f7 b31d               in    b,eedr
+0012f8 171c               cp    b,yl           ;overwrite same
+0012f9 f061            exiteq   eep_find_slot
+0012fa 9513               inc   b              ;new free slot
+0012fb f439               ifeq  eep_slot_allocate
+0012fc bbcd                  out   eedr,yl        ;write prog#
+0012fd b71f                  in    b,sreg         ;atomic write sequence
+0012fe 94f8                  cli
+0012ff 9ae2                  sbi   eecr,eemwe
+001300 9ae1                  sbi   eecr,eewe
+001301 bf1f                  out   sreg,b
+001302 c003            exit     eep_find_slot
+                          end   eep_slot_allocate
+001303 95d3               inc   yh             ;all slots done?
+001304 f191               breq  eep_full
+001305 cfed            loop     eep_find_slot
+001306 e0c0            ldi   yl,0
+                    end   eep_new_slot
+001307 30c0         cpi   yl,0           ;new slot?
+001308 f011         ifeq_or  eep_write_open
+001309 38c0         cpi   yl,128         ;new page_write?
+00130a f501         ifeq     eep_write_open
+00130b 930f            push  a
+                       ;open next eeprom page for write
+                       .ifdef spi_eep_adr
+00130c e11f            ldi   b,spi_idle
+                          do       eep_write_ready
+00130d ba38                  out   spi_out,f   ;set slave select
+00130e e005                  ldi   a,5         ;command: read status
+00130f b90f
+001310 9b77
+001311 cffe                  out_spi a
+001312 b85f
+001313 9b77
+001314 cffe
+001315 b10f                  in_spi a          ;get status
+001316 bb18                  out   spi_out,b   ;end slave select
+001317 7001                  andi  a,1         ;write in progress
+001318 f7a1               loopne   eep_write_ready
+001319 ba38               out   spi_out,f   ;set slave select
+00131a e006               ldi   a,6         ;command: write enable
+00131b b90f
+00131c 9b77
+00131d cffe               out_spi a
+00131e bb18               out   spi_out,b   ;end slave select
+00131f ba38               out   spi_out,f   ;set slave select
+001320 e002               ldi   a,2         ;command: write
+001321 b90f
+001322 9b77
+001323 cffe               out_spi a
+001324 b9df
+001325 9b77
+001326 cffe               out_spi yh        ;send write address
+001327 b9cf
+001328 9b77
+001329 cffe               out_spi yl
+                       .else
+                       .endif
+00132a 910f            pop   a
+                    end      eep_write_open
+                    ;write data
+                    .ifdef spi_eep_adr
+00132b b90f
+00132c 9b77
+00132d cffe            out_spi a
+                    .else
+                    .endif
+00132e 37cf         cpi   yl,127      ;EEP write buffer filled?
+00132f f011         ifeq_or eep_write_buf
+001330 3fcf         cpi   yl,255      ;EEP write buffer filled?
+001331 f411         ifeq    eep_write_buf
+                       ;end of page - internal eep write
+                       .ifdef spi_eep_adr
+001332 e10f               ldi   a,spi_idle  ;stop slave select
+001333 bb08               out   spi_out,a
+                       .else
+                       .endif
+                    end     eep_write_buf
+001334 9621         adiw  y,1
+001335 f009         breq  eep_full  
+001336 9508         ret
+                 
+                 eep_full:               ;no more slots
+001337 e8e0
+001338 e2f9
+001339 d649         PrintStr err_eep_full   ;" EEPROM full"
+                 ;
+                 ; EEP error during save
+                 ;
+                 eep_write_err:          ;close after errors
+                    .ifdef spi_eep_adr
+00133a e10f            ldi   a,spi_idle     ;stop slave select
+00133b bb08            out   spi_out,a
+                    .else
+                    .endif
+00133c e0d0         ldi   yh,0           ;free all slots for this prog#
+00133d d01d         rcall eep_int_close
+00133e 940c 1bdd    jmp   discard_serial_stream   ;skip remaining input, end of command
+                 ;
+                 ; EEP write close
+                 ;
+                 eep_write_close:
+                    .ifdef spi_eep_adr
+001340 e10f            ldi   a,spi_idle     ;close spi interface
+001341 bb08            out   spi_out,a
+                    .else
+                    .endif
+001342 23cc         tst   yl             ;slot already incremented?
+001343 f009         ifne  eep_close_nxt_slot
+001344 95d3            inc   yh
+                    end   eep_close_nxt_slot
+001345 23dd         tst   yh             ;was last slot?
+001346 f009         ifne  eep_close_last_slot
+001347 d013            rcall eep_int_close
+                    end   eep_close_last_slot
+001348 fd32         sbrc  flags,deb_act     ;outside debugger
+001349 940c 1bdd       jmp   discard_serial_stream   ;skip remaining input, end of command
+                 
+                 ;general close SPI/I2C EEPROM
+                 eep_close:
+                    ;disconnect SPI/I2C, connect RAM
+                    .ifdef spi_eep_adr
+00134b ba74            out   dbusddr,zero      ;dbus = output
+                    .endif
+                    .if (io_sel_direct > 0)
+00134c ba2b            out   abushi,e
+                    .endif
+00134d bad2         out   cbus,readmem      ;clear IO select & set read mode
+00134e ba7e         out   eearl,zero        ;set to unused address
+00134f ba7f         out   eearh,zero
+001350 9250 009f    sts   prog_num,allon    ;load/save ended
+                    ;restore SPI parameters from last spi_cmd
+                    .ifdef spi_eep_adr
+001352 9110 00c8       lds   b,spi_cmd
+001354 b87e            out   spsr,zero
+001355 fd14            sbrc  b,4               ;test SPI2X
+001356 b86e               out   spsr,one          ;SPI2X is set
+001357 6110            sbr   b,(1<<mstr)       ;always master
+001358 731f            cbr   b,(1<<spie|1<<spe) ;no interrupt enable & no spi enable
+001359 b91d            out   spcr,b
+                    .endif
+00135a 9508         ret
+                 
+                 ;vacate unused slots for this prog#
+                 eep_int_close:
+00135b 91c0 009f    lds   yl,prog_num
+                    do       eep_find_slot2
+                       do    eep_write_wait2
+00135d 99e1               sbic  eecr,eewe      ;previous write complete?
+00135e cffe            loop  eep_write_wait2
+00135f bbde            out   eearl,yh       ;read slot to find prog#
+001360 ba6c            out   eecr,one
+001361 b21d            in    d,eedr
+001362 161c            cp    d,yl           ;remaining slot for prog#
+001363 f431            ifeq  eep_free_slot
+001364 ba5d               out   eedr,allon     ;mark free
+001365 b61f               in    d,sreg         ;atomic write sequence
+001366 94f8               cli
+001367 9ae2               sbi   eecr,eemwe
+001368 9ae1               sbi   eecr,eewe
+001369 be1f               out   sreg,d
+                       end   eep_free_slot
+00136a 95d3            inc   yh             ;all slots done?
+00136b f789         loopne   eep_find_slot2
+                    do    eep_write_wait4
+00136c 99e1            sbic  eecr,eewe      ;last internal write complete?
+00136d cffe         loop  eep_write_wait4
+00136e 9508         ret
+                 
+                 ;
+                 ; load program from SPI/I2C EEPROM
+                 ;
+                 eep_load_prog:
+00136f e6e4
+001370 e2f9
+001371 d611         PrintStr eep_prog       ;10,13,"Program "
+001372 9100 009f    lds   a,prog_num        ;prog#
+001374 d614         rcall PrintHex
+001375 7f3d         cbr   flags,(1<<emu_run) ;force emulator halted  
+001376 27aa         clr   xl                ;check prog exists
+001377 ba6f         out   eearh,one
+001378 9100 009f    lds   a,prog_num
+                    do       eep_scan_loop
+00137a bbae            out   eearl,xl       ;read slot pointer
+00137b ba6c            out   eecr,one
+00137c b21d            in    d,eedr
+00137d 1610            cp    d,a            ;prog# match?
+00137e f041         exiteq   eep_scan_loop
+00137f 95a3            inc   xl             ;all slots done?
+001380 f429            ifeq  eep_load_bad_prog
+001381 e5e8
+001382 e2f9
+001383 d5ff               PrintStr eep_notfound   ;" not found"
+001384 e001               ldi   a,1
+001385 cfc5               rjmp  eep_close
+                       end   eep_load_bad_prog
+001386 cff3         loop     eep_scan_loop
+001387 df47         rcall eep_open
+001388 e0c0         ldi   yl,0           ;start reading from 1st slot
+001389 e0d0         ldi   yh,0
+00138a d02e         rcall eep_read
+00138b 2300         tst   a
+00138c f429         ifeq  eep_file_incompat
+00138d eee6
+00138e e2f9
+00138f d5f3            PrintStr bad_format  ;" incompatible format"
+001390 e001            ldi   a,1
+001391 cfb9            rjmp  eep_close
+                    end   eep_file_incompat
+001392 2fa0         mov   xl,a
+                    do       eep_load_loop
+001393 d025            rcall eep_read       ;read address
+001394 2ff0            mov   zh,a           ;big endian
+001395 d023            rcall eep_read
+001396 2fe0            mov   zl,a
+                       .ifdef spi_eep_adr
+001397 ba54               out   dbusddr,allon
+                       .endif
+                       do       eep_load_byte
+001398 d020               rcall eep_read
+                          ;disconnect SPI/I2C, connect RAM
+                          .if (io_sel_direct > 0)
+001399 ba2b                  out   abushi,e          ;disable IO select
+                          .endif
+00139a bac2               out   cbus,clear        ;disable IO select
+                          .ifdef spi_eep_adr
+00139b 986e                  cbi   spcr,spe
+                          .else
+                          .endif
+00139c bbe8               out   abuslo,zl 
+00139d bbfb               out   abushi,zh
+00139e bae2               out   cbus,writemem     ;WE, ~OE
+00139f bb05               out   dbusout,a         ;dbus write
+0013a0 9631               adiw  z,1
+0013a1 bac2               out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+                          ;connect SPI/I2C
+                          .if (io_sel_direct > 0)
+0013a2 ba1b                  out   abushi,d          ;prepare IO select
+                          .endif
+                         .ifdef spi_eep_adr
+0013a3 ba38                  out   spi_out,f         ;set slave select
+0013a4 9a6e                  sbi   spcr,spe
+                          .else
+                          .endif
+0013a5 ba02               out   cbus,c            ;activate IO select
+0013a6 95aa               dec   xl                ;record counter expired
+0013a7 f781            loopne   eep_load_byte
+0013a8 d010            rcall eep_read       ;read count
+0013a9 2fa0            mov   xl,a
+0013aa 23aa            tst   xl
+0013ab f739         loopne   eep_load_loop
+0013ac d00c         rcall eep_read          ;read PCH
+0013ad 2300         tst   a                 ;is valid?
+0013ae f019         ifne  eep_load_pc
+0013af 2f90            mov   pch,a             ;set PC
+0013b0 d008            rcall eep_read
+0013b1 2f80            mov   pcl,a
+                    end   eep_load_pc
+0013b2 e7e0
+0013b3 e2f9
+0013b4 d5ce         PrintStr eep_loaded     ;" loaded"
+                    .ifdef spi_eep_adr
+0013b5 e10f            ldi   a,spi_idle     ;close spi slave
+0013b6 bb08            out   spi_out,a
+                    .else
+                    .endif
+0013b7 e000         ldi   a,0               ;post returncode OK
+0013b8 cf92         rjmp eep_close
+                 
+                 ; EEPROM read 1 Byte, select new slot if necessary
+                 eep_read:
+0013b9 23cc         tst   yl                ;need to open next slot?
+0013ba f4c9         ifeq  eep_next_slot
+0013bb 23dd            tst   yh             ;1st slot?
+0013bc f011            ifne  eep_read_first
+                          .ifdef spi_eep_adr
+0013bd e10f                  ldi   a,spi_idle     ;close spi slave
+0013be bb08                  out   spi_out,a
+                          .else
+                          .endif
+                       end   eep_read_first
+0013bf 9100 009f       lds   a,prog_num
+                       do       eep_find_prog
+0013c1 bbde               out   eearl,yh       ;read slot to find prog#
+0013c2 ba6c               out   eecr,one
+0013c3 b31d               in    b,eedr
+0013c4 1710               cp    b,a            ;match?
+0013c5 f019            exiteq   eep_find_prog
+0013c6 95d3               inc   yh             ;all slots done?
+0013c7 f091               breq  eep_read_overrun
+0013c8 cff8            loop     eep_find_prog
+                       .ifdef spi_eep_adr
+0013c9 ba38               out   spi_out,f      ;set slave select
+0013ca e003               ldi   a,3            ;command: read eep
+0013cb b90f
+0013cc 9b77
+0013cd cffe               out_spi a
+0013ce b9df
+0013cf 9b77
+0013d0 cffe               out_spi yh
+0013d1 b9cf
+0013d2 9b77
+0013d3 cffe               out_spi yl
+                       .else
+                       .endif
+                       .ifndef spi_eep_adr
+                       .endif
+                    end   eep_next_slot
+                    ;read data byte
+                    .ifdef spi_eep_adr
+0013d4 b85f
+0013d5 9b77
+0013d6 cffe
+0013d7 b10f            in_spi a
+                    .else
+                    .endif
+0013d8 9621         adiw  y,1         ;next
+0013d9 9508         ret
+                 ; overran the last slot, no ending count 0x00
+                 eep_read_overrun:
+0013da eae6
+0013db e2f9
+0013dc d5a6         PrintStr err_corrupt    ;" corrupted"
+0013dd 910f         pop   a                 ;remove return address
+0013de 910f         pop   a
+0013df e001         ldi   a,1               ;post returncode fail
+0013e0 fd32         sbrc  flags,deb_act
+0013e1 cf69            rjmp  eep_close
+0013e2 c0a9         rjmp  eep_app_read_exit
+                 
+                 ;dma save program
+                 dma_eep_save:
+0013e3 9100 00ca    lds   a,dma_last_cmd
+0013e5 9110 00cb    lds   b,dma_tab_index
+0013e7 9250 00ca    sts   dma_last_cmd,allon ;mark invalid sequence of command
+0013e9 3000         cpi   a,0               ;previous set block address table?
+0013ea f431         ifne_or  eep_ds_inv
+0013eb 3015         cpi   b,5               ;block address table valid?
+0013ec f421         ifne_or  eep_ds_inv
+0013ed 9100 00cc    lds   a,dma_tab         ;program number valid?
+0013ef 3f0f         cpi   a,0xff
+0013f0 f409         ifeq     eep_ds_inv
+0013f1 ca76            rjmp  iw_exit           ;exit - invalid parameters
+                    end      eep_ds_inv
+0013f2 9300 009f    sts   prog_num,a
+0013f4 b71d         in    b,spl             ;save sp - allows sub to exit
+0013f5 9310 009a    sts   sp_save,b
+0013f7 b71e         in    b,sph
+0013f8 9310 009b    sts   sp_save+1,b
+0013fa ded4         rcall eep_open
+0013fb e6e4
+0013fc e2f9
+0013fd d585         PrintStr eep_prog       ;10,13,"Program "
+0013fe 9100 009f    lds   a,prog_num        ;prog#
+001400 d588         rcall PrintHex
+001401 91e0 00cd    lds   zl,dma_tab+1      ;load memory address
+001403 91f0 00ce    lds   zh,dma_tab+2
+001405 91a0 00cf    lds   xl,dma_tab+3      ;load block count
+001407 91b0 00d0    lds   xh,dma_tab+4
+001409 e0c0         ldi   yl,0              ;initial slot allocation
+00140a e0d0         ldi   yh,0
+00140b ba6f         out   eearh,one
+00140c e000         ldi   a,0               ;set app save marker
+00140d dee1         rcall eep_write
+00140e 2f0a         mov   a,xl              ;calculate count from end address
+00140f 1b0e         sub   a,zl
+001410 dede         rcall eep_write
+001411 2f0b         mov   a,xh
+001412 0b0f         sbc   a,zh
+001413 dedb         rcall eep_write
+                    do       eep_app_save_data
+001414 17ae            cp    xl,zl
+001415 f411            ifeq  eep_app_save_adr
+001416 17bf               cp    xh,zh
+001417 f081         exiteq   eep_app_save_data
+                       end   eep_app_save_adr
+                       ;disconnect SPI/I2C, connect RAM
+                       .if (io_sel_direct > 0)
+001418 ba2b               out   abushi,e          ;disable IO sel. exp.
+                       .endif
+001419 bad2            out   cbus,readmem      ;disable IO select
+                       .ifdef spi_eep_adr
+00141a 986e               cbi   spcr,spe       ;disable SPI
+                       .endif
+00141b bbe8            out   abuslo,zl         ;read from RAM
+00141c bbfb            out   abushi,zh
+00141d 9631                  adiw  z,1            ;next address
+00141e c000            wait_data_valid 1
+00141f b303            in    a,dbusin
+                       ;connect SPI/I2C
+001420 bac2            out   cbus,clear
+                       .if (io_sel_direct > 0)
+001421 ba1b               out   abushi,d          ;prepare IO select
+                       .endif
+                       .ifdef spi_eep_adr
+001422 ba38               out   spi_out,f         ;select slave
+001423 9a6e               sbi   spcr,spe          ;enable SPI
+                       .else
+                       .endif
+001424 ba02            out   cbus,c            ;set IO select
+001425 9ade             ena_io_select
+001426 dec8            rcall eep_write         ;store in EEPROM
+001427 cfec         loop     eep_app_save_data
+                    .ifndef spi_eep_adr
+                    .endif
+001428 df17         rcall eep_write_close
+001429 e7e8
+00142a e2f9
+00142b d557         PrintStr eep_saved      ;" saved"
+00142c d552         rcall crlf
+00142d e106         ldi   a,0x16            ;last successful command was read
+00142e 9300 00ca    sts   dma_last_cmd,a
+001430 ca37         rjmp  iw_exit
+                 
+                 ;dma load program
+                 dma_eep_load:
+001431 9100 00ca    lds   a,dma_last_cmd
+001433 9110 00cb    lds   b,dma_tab_index
+001435 9250 00ca    sts   dma_last_cmd,allon ;mark invalid sequence of command
+001437 3000         cpi   a,0               ;previous set block address table?
+001438 f431         ifne_or  eep_dl_inv
+001439 3013         cpi   b,3               ;block address table valid?
+00143a f421         ifne_or  eep_dl_inv
+00143b 9100 00cc    lds   a,dma_tab         ;program number valid?
+00143d 3f0f         cpi   a,0xff
+00143e f409         ifeq     eep_dl_inv
+00143f ca28            rjmp  iw_exit           ;exit - invalid parameters
+                    end      eep_dl_inv
+001440 9300 009f    sts   prog_num,a
+001442 e6e4
+001443 e2f9
+001444 d53e         PrintStr eep_prog       ;10,13,"Program "
+001445 9100 009f    lds   a,prog_num        ;prog#
+001447 d541         rcall PrintHex
+001448 2400         clr   c        ;check prog exists
+001449 ba6f         out   eearh,one
+00144a 9100 009f    lds   a,prog_num
+                    do       eep_app_scan_loop
+00144c ba0e            out   eearl,c        ;read slot pointer
+00144d ba6c            out   eecr,one
+00144e b21d            in    d,eedr
+00144f 1610            cp    d,a            ;prog# match?
+001450 f039         exiteq   eep_app_scan_loop
+001451 9403            inc   c              ;all slots done?
+001452 f421            ifeq  eep_app_load_bad_prog
+001453 e5e8
+001454 e2f9
+001455 d52d               PrintStr eep_notfound  ;" not found"
+001456 c035               rjmp  eep_app_read_exit
+                       end   eep_app_load_bad_prog
+001457 cff4         loop     eep_app_scan_loop
+001458 de76         rcall eep_open
+001459 e0c0         ldi   yl,0           ;start reading from 1st slot
+00145a e0d0         ldi   yh,0
+00145b df5d         rcall eep_read
+00145c 2300         tst   a
+00145d f021         ifne  eep_app_file_incompat
+00145e eee6
+00145f e2f9
+001460 d522            PrintStr bad_format  ;" incompatible format"
+001461 c028            rjmp  eep_app_read_exit2
+                    end   eep_app_file_incompat
+001462 91e0 00cd    lds   zl,dma_tab+1      ;load memory address
+001464 91f0 00ce    lds   zh,dma_tab+2
+001466 df52         rcall eep_read             ;read count - set end address
+001467 2fa0         mov   xl,a
+001468 df50         rcall eep_read
+001469 2fb0         mov   xh,a
+00146a 0fae         add   xl,zl
+00146b 93a0 00cf    sts   dma_tab+3,xl
+00146d 1fbf         adc   xh,zh
+00146e 93b0 00d0    sts   dma_tab+4,xh
+                    .ifdef spi_eep_adr
+001470 ba54            out   dbusddr,allon
+                    .endif
+                    do       eep_app_load_loop
+001471 17ae            cp    xl,zl
+001472 f411            ifeq  eep_app_load_adr
+001473 17bf               cp    xh,zh
+001474 f079         exiteq   eep_app_load_loop
+                       end   eep_app_load_adr
+001475 df43            rcall eep_read
+                       ;disconnect SPI/I2C, connect RAM
+                       .if (io_sel_direct > 0)
+001476 ba2b               out   abushi,e          ;disable IO select
+                       .endif
+001477 bac2            out   cbus,clear        ;disable IO select
+                       .ifdef spi_eep_adr
+001478 986e               cbi   spcr,spe          ;disable SPI
+                       .else
+                       .endif
+001479 bbe8            out   abuslo,zl         ;set write address 
+00147a bbfb            out   abushi,zh
+00147b bae2            out   cbus,writemem     ;WE, ~OE
+00147c bb05            out   dbusout,a         ;dbus write
+00147d 9631            adiw  z,1               ;next address
+00147e bac2            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+                       ;connect SPI/I2C
+                       .if (io_sel_direct > 0)
+00147f ba1b               out   abushi,d          ;prepare IO select
+                       .endif
+                       .ifdef spi_eep_adr
+001480 ba38               out   spi_out,f         ;set slave select = EEP
+001481 9a6e               sbi   spcr,spe          ;enable SPI
+                       .else
+                       .endif
+001482 ba02            out   cbus,c            ;set IO select
+001483 cfed         loop     eep_app_load_loop
+001484 e7e0
+001485 e2f9
+001486 d4fc         PrintStr eep_loaded     ;" loaded"
+001487 e107         ldi   a,0x17            ;last successful command was read
+001488 9300 00ca    sts   dma_last_cmd,a
+                    .ifndef spi_eep_adr
+                    .endif
+                 eep_app_read_exit2:
+                    .ifdef spi_eep_adr
+00148a e10f            ldi   a,spi_idle     ;close spi slave
+00148b bb08            out   spi_out,a
+                    .else
+                    .endif
+                 eep_app_read_exit:
+00148c d4f2         rcall crlf
+00148d debd         rcall eep_close
+00148e c9d9         rjmp  iw_exit
+                 
+00148f 0a0d
+001490 4545
+001491 5250
+001492 4d4f
+001493 6120
+001494 7475
+001495 6c6f
+001496 616f
+001497 2064
+001498 0000      eep_info1:     .db   13,10,"EEPROM autoload ",0,0
+001499 2d20
+00149a 0020      eep_info2:     .db   " - ",0
+00149b 7320
+00149c 6f6c
+00149d 7374
+00149e 6620
+00149f 6572
+0014a0 0065      eep_info3:     .db   " slots free",0
+0014a1 0a0d
+0014a2 7270
+0014a3 676f
+0014a4 2f23
+0014a5 6c73
+0014a6 746f
+0014a7 2073
+0014a8 0020      eep_info4:     .db   13,10,"prog#/slots  ",0
+0014a9 6f6e
+0014aa 656e
+0014ab 0000      eep_none:      .db   "none",0,0
+0014ac 6e20
+0014ad 746f
+0014ae 6620
+0014af 756f
+0014b0 646e
+0014b1 0000      eep_notfound:  .db   " not found",0,0
+0014b2 0a0d
+0014b3 7250
+0014b4 676f
+0014b5 6172
+0014b6 206d
+0014b7 0000      eep_prog:      .db   13,10,"Program ",0,0
+0014b8 6c20
+0014b9 616f
+0014ba 6564
+0014bb 0064      eep_loaded:    .db   " loaded",0
+0014bc 7320
+0014bd 7661
+0014be 6465
+0014bf 0000      eep_saved:     .db   " saved",0,0
+0014c0 4520
+0014c1 5045
+0014c2 4f52
+0014c3 204d
+0014c4 7566
+0014c5 6c6c
+0014c6 0000      err_eep_full:  .db   " EEPROM full",0,0
+                    .ifdef spi_eep_adr
+0014c7 0a0d
+0014c8 5053
+0014c9 2049
+0014ca 4545
+0014cb 5250
+0014cc 4d4f
+0014cd 6e20
+0014ce 746f
+0014cf 6620
+0014d0 756f
+0014d1 646e
+0014d2 0000      err_no_eep:    .db   13,10,"SPI EEPROM not found",0,0
+                    .else
+                    .endif
+0014d3 6320
+0014d4 726f
+0014d5 7572
+0014d6 7470
+0014d7 6465
+0014d8 0000      err_corrupt:   .db   " corrupted",0,0
+0014d9 0a0d
+0014da 6153
+0014db 6976
+0014dc 676e
+0014dd 202c
+0014de 453c
+0014df 4353
+0014e0 203e
+0014e1 6f74
+0014e2 6120
+0014e3 6f62
+0014e4 7472
+0014e5 0a0d
+0014e6 0000      save_wait:     .db   13,10,"Saving, <ESC> to abort",13,10,0,0
+0014e7 530d
+0014e8 7661
+0014e9 2065
+0014ea 4b4f
+0014eb 0000      save_ok:       .db   13,"Save OK",0,0
+0014ec 5320
+0014ed 7661
+0014ee 2065
+0014ef 6261
+0014f0 726f
+0014f1 6574
+0014f2 0064      save_abort:    .db   " Save aborted",0
+0014f3 6920
+0014f4 636e
+0014f5 6d6f
+0014f6 6170
+0014f7 6974
+0014f8 6c62
+0014f9 2065
+0014fa 6f66
+0014fb 6d72
+0014fc 7461
+0014fd 0000      bad_format:    .db   " incompatible format",0,0
+                 
+                 .else
+                 .endif
+                 
+                       .endif
+                 
+                 ;**************************************************
+                 ;
+                 ; Monitor / Debugger Interrupts
+                 ;
+                 ;**************************************************
+                 
+                 ;
+                 ; an illegal interrupt has occured
+                 ;
+                 illegalint:
+0014fe e2ec
+0014ff e0f2
+001500 d482         PrintStr illegal_int
+                    do    i_stop     
+001501 cfff         loop  i_stop      ; reset required
+                 
+                 ;
+                 ; Timer 0 compare match A - 10ms CTC interrupt
+                 ;
+                 t0_cmi:
+001502 b6ff         in    s,sreg
+001503 9120 0092    lds   i,cmd_esc_timer   ;service esc sequence timer
+001505 2e42         mov   k,i
+001506 772f         andi  i,0x7f
+001507 f019         ifne  t0_esc_expired
+001508 944a            dec   k
+001509 9240 0092       sts   cmd_esc_timer,k
+                    end   t0_esc_expired
+00150b 9120 0093    lds   i,cmd_reg_timer   ;service register refresh timer
+00150d 2322         tst   i
+00150e f019         ifne  t0_reg_expired
+00150f 952a            dec   i
+001510 9320 0093       sts   cmd_reg_timer,i
+                    end   t0_reg_expired
+                 
+001512 9120 00bf    lds   i,irq_flag        ;check 10 ms timer
+001514 6021         sbr   i,1               ;set tick flag
+001515 9040 00c3    lds   k,tcdn_count      ;update tcdn count
+001517 944a         dec   k                 ;expired?
+001518 f419         ifeq  t0_tcdn_expired
+001519 9040 00c4       lds   k,tcdn_top        ;reset tcdn count
+00151b 6022            sbr   i,2               ;set tcdn flag
+                    end   t0_tcdn_expired
+00151c 9240 00c3    sts   tcdn_count,k      ;save count
+00151e 9320 00bf    sts   irq_flag,i        ;save flags
+001520 9040 00be    lds   k,irq_mask        ;tick or tcdn IRQ enabled?
+001522 2124         and   i,k
+001523 f009         ifne  t0_tcdn_irq
+001524 9a8b            sbi   cbusddr,3         ;set IRQ
+                    end   t0_tcdn_irq
+                 
+001525 fd32         sbrc  flags,deb_act     ;no debugger instance active
+001526 c01b         ifs_and  debug_start
+001527 ff30         sbrs  flags,deb_on      ;debug mode
+001528 c019         ifs      debug_start
+                       .if defined(spi_sel) || defined(i2c_sel)
+001529 ff37               sbrs  flags,dma_rpt     ;interupt during dma transfer?
+00152a c00f               ifs   t0_dma
+00152b 773f                  cbr   flags,(1<<dma_rpt)
+00152c 93e0 00cd             sts   dma_tab+1,zl      ;save current dma memory address
+00152e 93f0 00ce             sts   dma_tab+2,zh
+001530 93a0 00d1             sts   dma_tab+5,xl      ;save dma count in progress
+001532 93b0 00d2             sts   dma_tab+6,xh
+001534 7d3f                  cbr   flags,(1<<modify) ;unlock extended memory address after modify
+001535 ba74                  out   dbusddr,zero      ;switch back to read mode
+001536 bad2                  out   cbus,readmem      ;OE to RAM
+001537 e0f6                  ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+001538 9702                  sbiw  pch:pcl,2         ;prepare for instruction retry
+001539 ff34                  sbrs  flags,op_ind      ;3 byte instruction if direct
+                          end   t0_dma
+                       .endif
+00153a 9701            sbiw  pch:pcl,1      ;adjust PC to next opcode
+00153b 6034            sbr   flags,(1<<deb_act)  ;prevent double_activation
+00153c e000            ldi   a,NMI_dis      ;no emulator interrupts during monitor
+00153d bf0b            out   ibus,a
+00153e 910f            pop   a              ;discard return address from stack
+00153f 910f            pop   a
+001540 9478            sei
+001541 c0e2            rjmp  debugger
+                    end      debug_start
+001542 beff         out   sreg,s
+001543 9518         reti
+                 ;
+                 ; Timer 0 overflow interrupt - single step
+                 ;
+                 t0_ovi:
+001544 e000         ldi   a,NMI_dis         ;no emulator interrupts during monitor
+001545 bf0b         out   ibus,a
+001546 9701         sbiw  pch:pcl,1         ;adjust PC to next opcode
+001547 910f         pop   a                 ;discard return address from stack
+001548 910f         pop   a
+001549 9478         sei
+00154a c3fa         rjmp  end_command
+                 
+                 .ifdef cmos_core
+                    .ifdef irq_dis_real
+                    .endif
+                 .else
+                 ; illegal opcode handling 
+                 deb_inv_op:
+00154b e035         ldi   flags,(1<<deb_on)|(1<<deb_act)
+00154c 9100 00bf    lds   a,irq_flag        ;disconnect acia, clear TDRE & RDRF
+00154e 730f         cbr   a,0b11000000
+00154f 9270 00bf    sts   irq_flag,zero
+001551 9000 00be    lds   c,irq_mask        ;no other internal IRQ pending & enabled?
+001553 2100         and   a,c
+001554 f409         ifeq  inv_op_irq_clear
+001555 988b            cbi   cbusddr,3         ;clear irq
+                    end  inv_op_irq_clear
+001556 e000         ldi   a,NMI_dis      ;no emulator interrupts during monitor
+001557 bf0b         out   ibus,a
+                    .ifdef irq_dis_real
+                    .endif
+001558 9702         sbiw  pch:pcl,2         ;position to current instruction
+001559 be68         out   tifr,one          ;cancel single step interrupt (tov0)
+00155a 9478         sei
+00155b 3deb         cpi   opcode,0xdb       ;potential breakpoint
+00155c f411         ifne_or  deb_stop_unexp
+00155d d609         rcall brkpt_chk_pc
+00155e f046         iftc     deb_stop_unexp ;skip if breakpoint
+00155f 2e1e            mov   d,opcode          ;temporary save opcode
+001560 d494            rcall show_regs
+001561 e3ec
+001562 e3f9
+001563 d41f            PrintStr inv_instr      ;"Illegal Opcode "
+001564 2d01            mov   a,d
+001565 d423            rcall PrintHex
+001566 9601            adiw  pch:pcl,1         ;position to next instruction
+                    end      deb_stop_unexp
+001567 c3dd         rjmp  end_command
+                 .endif
+                    
+                 ;**************************************************
+                 ;
+                 ; Reset
+                 ;
+                 ;**************************************************
+                 
+                 ; reset all IO extension registers
+                 rs_IO_ext:
+                    .set io_sel_direct = 0
+                    .set rs_ddr_done = 0
+                 ;set ddr for 1st IO register configured
+                 .macro   rs_set_ddr   
+                    .if   rs_ddr_done == 0
+                       out   ahiddr,allon      ;activate io select output
+                       .ifdef  nmi_ena
+                          ldi   a,0b11110000      ;Memory R/W signals + IO-select 1-2
+                       .else
+                          ldi   a,0b11110100      ;Memory R/W signals + IO-select 1-3
+                       .endif
+                       out   cbusddr,a         ;activate io select strobe
+                       .set rs_ddr_done = 1
+                    .endif
+                 .endmacro
+                 ;reset external IO select registers
+                 .macro   rs_set_iosel      ;@0 = ios#_default, @1 = cbus_pin#
+                    .ifdef @0
+                       .if   io_sel_direct != @1
+                          ldi   b,@0
+                          out   abushi,b
+                          sbi   cbus,@1
+                          rs_set_ddr
+                          cbi   cbus,@1
+                       .endif
+                    .endif
+                 .endmacro
+                 ;reset spi slave select register (& its IO select register)
+                    .ifdef spi_sel
+001568 e10f            ldi   a,spi_idle        ;reset slave select pins
+001569 bb08            out   spi_out,a         ;precharge slave sel (abuslo)
+00156a bac2
+00156b e811
+00156c bb1b
+00156d 9a96            set_io_select spi_sel   ;precharge io select register
+00156e 9ade            ena_io_select
+00156f eb0f            ldi   a,~(1<<spi_miso)  ;set all output exept miso
+001570 bb07            out   spi_ddr,a         ;activate spi output
+001571 ba5a
+001572 ef00
+001573 bb01            rs_set_ddr
+001574 c000            nop2                    ;wait 2 cycles 
+001575 bb1b            dis_spi_select          ;end SPI register strobe
+                    .endif
+001576 bac2         out   cbus,clear        ;clear IO select
+001577 ba57         out   aloddr,allon      ;set abuslo output (spi_ddr)
+001578 b87d         out   spcr,zero         ;clear SPI hardware
+001579 b87e         out   spsr,zero
+                 ;reset IO select register if configured and not already done
+                    rs_set_iosel ios1_default,6
+                    rs_set_iosel ios2_default,7
+                    rs_set_iosel ios3_default,2
+                    rs_set_ddr              ;if none of the above
+                 ;hw reset to IO ICs if configured
+                    .ifdef iomap
+                       .ifdef   io_reset_pin
+00157a bac2
+00157b e811
+00157c 7f1d
+00157d bb1b
+00157e 9a96               set_io_reset   io_reset_pin
+00157f bb1b               out   abushi,b
+001580 bac2               out   cbus,clear
+                       .endif
+                    .endif
+001581 9508         ret
+                 ;
+                 ; *********** HARDWARE RESET VECTOR ****************
+                 ;
+                 reset:
+001582 e008         ldi   a,high(ramend)    ;set Stack-Pointer
+001583 bf0e         out   sph,a
+001584 e50f         ldi   a,low(ramend)
+001585 bf0d         out   spl,a
+                 
+                 ;setup of constant regs
+001586 2455         clr   allon
+001587 945a         dec   allon    ;0xff
+001588 2466         clr   one
+001589 9463         inc   one      ;1
+00158a 2477         clr   zero     ;0
+00158b e300         ldi   a,0b00110000      ;cbus inactive const
+00158c 2ec0         mov   clear,a
+00158d e200         ldi   a,0b00100000      ;cbus memory /OE const
+00158e 2ed0         mov   readmem,a
+00158f e100         ldi   a,0b00010000      ;cbus memory /WE const
+001590 2ee0         mov   writemem,a
+001591 e0f6         ldi   oc_tabh,high(oc_tab) ;vector to opcode translation
+                 
+                 ;setup processor bus
+001592 dfd5         rcall rs_IO_ext         ;reset IO extension registers
+001593 e004         ldi   a,0b100           ;globaly disable pullups
+001594 bf00         out   sfior,a
+001595 e002         ldi   a,0b0010          ;IRQ=low level, NMI=falling edge
+001596 bf05         out   mcucr,a
+                    .ifdef phi2_ena         ;phase 2 output on OC2 (1 MHz)
+001597 bc74            out   tcnt2,zero        ;timer 2 init
+001598 e007            ldi   a,0x7             ;500µs @ 16MHz
+001599 bd03            out   ocr2,a
+00159a e109            ldi   a,0b00011001      ;timer 2 ctc, toggle OC2, clock / 1
+00159b bd05            out   tccr2,a
+                    .endif
+                    
+00159c 9270 00d7    sts   rx_fill,zero      ;initialize fifos
+00159e 9270 00d5    sts   tx_fill,zero
+0015a0 e101         ldi   a,0x11            ;send xon if enabled
+0015a1 9300 00d8    sts   flow_cmd,a        ;
+0015a3 e600         ldi   a,low(cmd_buf)    ;initialize command buffer
+0015a4 9300 0091    sts   cmd_inx,a
+0015a6 e800         ldi   a,0x80            ;initialize esc timer
+0015a7 9300 0092    sts   cmd_esc_timer,a
+0015a9 9250 009f    sts   prog_num,allon    ;mark eep as closed
+0015ab e109         ldi   a,low(UBRR_value) ;set Baudrate
+0015ac b909         out   ubrrl,a
+0015ad e000         ldi   a,high(UBRR_value)
+0015ae bd00         out   ubrrh,a
+0015af e908         ldi   a,usart_txi_dis   ;rx,tx, rxcie enable
+0015b0 b90a         out   ucsrb,a
+                    .ifdef irq_dis_real
+                    .endif
+0015b1 be72         out   tcnt0,zero        ;timer 0 init
+0015b2 e90b         ldi   a,ten_ms
+0015b3 bf0c         out   ocr0,a
+0015b4 e00d         ldi   a,0b00001101      ;timer 0 ctc, clock / 1024
+0015b5 bf03         out   tccr0,a
+0015b6 be72         out   tcnt0,zero
+0015b7 e003         ldi   a,0b11            ;t0 compare match interrupt enable
+0015b8 bf08         out   tifr,a
+0015b9 bf09         out   timsk,a
+0015ba e035         ldi   flags,(1<<deb_on)|(1<<deb_act)
+0015bb 9478         sei
+0015bc d3c2         rcall crlf
+                 
+                 ;clearing the emulated machine if power on or brownout
+0015bd b704         in    a,mcucsr             ;borf or porf
+0015be 7005         andi  a,0b101
+0015bf f099         ifne  clear_mem
+0015c0 27ee            clr   zl                ;clear memory
+0015c1 27ff            clr   zh
+0015c2 bac2            out   cbus,clear        ;prepare to write memory
+0015c3 ba54            out   dbusddr,allon
+                       do     memory_clear
+0015c4 bbe8               out   abuslo,zl         ;next address
+0015c5 bbfb               out   abushi,zh
+0015c6 bae2               out   cbus,writemem     ;WE, ~OE
+0015c7 ba75               out   dbusout,zero      ;write data
+0015c8 bac2               out   cbus,clear        ;~WE / write cycle ends 120ns/16MHz
+0015c9 9631               adiw  z,1
+0015ca f7c9            loopne memory_clear
+0015cb ba74            out   dbusddr,zero      ;prepare to read
+0015cc bad2            out   cbus,readmem      ;OE / read mode back on
+0015cd eac0            ldi   yl,low(brkpt_lo)  ;clear breakpoints
+0015ce e0d0            ldi   yh,high(brkpt_lo)
+                       do       brkpt_reset
+0015cf 9259               st    y+,allon
+0015d0 3bc4               cpi   yl,low(brkpt_op)
+0015d1 f7e9            loopne   brkpt_reset
+0015d2 c005         else  clear_mem
+0015d3 d3ab            rcall crlf
+0015d4 d420            rcall show_regs
+0015d5 e7ea
+0015d6 e0f1
+0015d7 d3ab            PrintStr reset_msg      ;"  Reset"
+                    end   clear_mem
+                 
+0015d8 d3f2         rcall soft_reset
+                 
+0015d9 e4ec
+0015da e3f9
+0015db d3a7         PrintStr emu_msg        ;13,10,"6502 emulator  Vx.xxx"
+0015dc e6e6
+0015dd e3f9
+0015de d3a4         PrintStr built_msg      ;" built ",__DATE__
+                 
+                 ; load & run on power on
+                 ; if a program is selected for autoload
+                    .ifdef eep_vld
+0015df b704            in    a,mcucsr          ;borf or porf
+0015e0 7005            andi  a,0b101
+0015e1 f1d9            ifne  rspo_autoload
+0015e2 ba7f               out   eearh,zero     ;read eep autoload byte
+0015e3 ba5e               out   eearl,allon
+0015e4 ba6c               out   eecr,one
+0015e5 b30d               in    a,eedr
+0015e6 ba7e               out   eearl,zero     ;protect
+0015e7 3f0f               cpi   a,0xff         ;test autoload program set
+0015e8 f1a1               ifne  reset_autoload
+0015e9 9300 009f             sts   prog_num,a
+0015eb dd83                  rcall eep_load_prog
+0015ec 2300                  tst   a           ;load O.K.
+0015ed f579                  ifeq  eep_load_ok
+0015ee d3fa                     rcall load_reset_vector
+0015ef 2399                     tst   pch         ;valid PC?
+0015f0 f149                     ifne  pc_load_ok
+0015f1 b61f                        in    d,sreg            ;atomic modify receive buffer
+0015f2 94f8                        cli
+0015f3 e0d2                        ldi   yh,high(rx_buf)   ;setup rx buffer address
+0015f4 e0c0                        ldi   yl,0
+0015f5 2c06                        mov   c,one             ;string address
+                                   do       eep_load_string
+0015f6 ba0e                           out   eearl,c           ;read internal EEPROM
+0015f7 ba6c                           out   eecr,one
+0015f8 b30d                           in    a,eedr
+0015f9 3f0f                           cpi   a,0xff            ;string end?
+0015fa f089                        exiteq   eep_load_string
+0015fb 350c                           cpi   a,92              ;backslash?
+0015fc f461                           ifeq  eep_load_special
+0015fd 9403                              inc   c
+0015fe ba0e                              out   eearl,c           ;read internal EEPROM
+0015ff ba6c                              out   eecr,one
+001600 b30d                              in    a,eedr
+001601 3f0f                              cpi   a,0xff            ;string end?
+001602 f049                        exiteq   eep_load_string
+001603 3702                              cpi   a,'r'             ;carriage return?
+001604 f409                              ifeq  eep_auto_cr
+001605 e00d                                 ldi   a,13
+                                         end   eep_auto_cr
+001606 3701                              cpi   a,'q'             ;double quote?
+001607 f409                              ifeq  eep_auto_quote
+001608 e202                                 ldi   a,34
+                                         end   eep_auto_quote
+                                      end   eep_load_special
+001609 9309                           st    y+,a              ;store in rx buffer
+00160a 9403                           inc   c                 ;next EEPROM address
+00160b cfea                        loop     eep_load_string
+00160c 93c0 00d6                   sts   rx_inx,yl         ;save buffer pointers
+00160e 93c0 00d7                   sts   rx_fill,yl
+001610 be1f                        out   sreg,d            ;restore interrupt enable
+001611 ba7e                        out   eearl,zero        ;protect internal EEPROM
+001612 d36c                        rcall crlf
+001613 94f8                        cli
+001614 e032                        ldi   flags,(1<<emu_run)   ;run program
+001615 b704                        in    a,mcucsr          ;HW reset complete
+001616 7e00                        andi  a,0xe0            ;mask out reset flags
+001617 bf04                        out   mcucsr,a          ;clear in mcucsr
+001618 c336                        rjmp  end_exit
+001619 c003                     else  pc_load_ok
+00161a e6e4
+00161b e0f1
+00161c d366                        PrintStr rs_vect_empty     ;13,10,"Check reset vector"
+                                end   pc_load_ok
+                             end   eep_load_ok
+                          end   reset_autoload
+                       end   rspo_autoload
+                    .endif
+00161d b704         in    a,mcucsr          ;HW reset complete
+00161e 7e00         andi  a,0xe0            ;mask out reset flags
+00161f bf04         out   mcucsr,a          ;clear in mcucsr
+                 ;*********************************************************
+                 ;
+                 ; Monitor / Debugger main loop
+                 ;
+                 ;     bypasses buffers/timers when interrupts are disabled
+                 ;     updates/uses timer 0 to discard escape sequences
+                 ;     updates/uses timer 0 to refresh register display
+                 ;     samples input, translates to upper case
+                 ;     allows backspace & escape (erase last/all input)
+                 ;     parses & executes commandline on carriage return
+                 ;
+                 ;*********************************************************
+001620 e00a         ldi   a,10      ;linefeed
+001621 d370         rcall PrintChr
+001622 d3d2         rcall show_regs
+001623 d409         rcall show_prompt
+                 
+                 debugger:      ;entry from t0 cmp match
+                    do    debug_main
+                       do    deb_wait4input
+                 ; disabled update of esc & showprompt timer
+001624 f0af               ifid_and  deb_timer_update ;disabled timer update 
+001625 b7d8               in    yh,tifr
+001626 ffd1               sbrs  yh,ocf0
+001627 c012               ifs       deb_timer_update
+001628 e0d2                  ldi   yh,0b10           ;clear t1 oc flag
+001629 bfd8                  out   tifr,yh
+00162a 91c0 0092             lds   yl,cmd_esc_timer  ;test escape timer expired
+00162c 77cf                  andi  yl,0x7f
+00162d f029                  ifne  deb_esc_timer_update
+00162e 91c0 0092                lds   yl,cmd_esc_timer
+001630 95ca                     dec   yl
+001631 93c0 0092                sts   cmd_esc_timer,yl
+                             end   deb_esc_timer_update
+001633 91c0 0093             lds   yl,cmd_reg_timer  ;test register timer expired
+001635 23cc                  tst   yl
+001636 f019                  ifne  deb_reg_timer_update
+001637 95ca                     dec   yl
+001638 93c0 0093                sts   cmd_reg_timer,yl
+                             end   deb_reg_timer_update
+                          end       deb_timer_update
+                 ; new line triggered by true <ESC> based on timer
+00163a 91c0 0092          lds   yl,cmd_esc_timer ;test escape timer expired
+00163c 23cc               tst   yl
+00163d f451               ifeq  deb_true_esc
+00163e e8c0                  ldi   yl,0x80           ;flag line cleared
+00163f 93c0 0092             sts   cmd_esc_timer,yl
+001641 7b3f                  cbr   flags,(1<<string) ;enable case translation
+001642 d3b2                  rcall show_regs         ;redraw registers & prompt
+001643 d3e9                  rcall show_prompt
+001644 d32e                  rcall erase2eol
+001645 e6d0                  ldi   yh,low(cmd_buf)   ;ready for next command
+001646 93d0 0091             sts   cmd_inx,yh
+                          end   deb_true_esc
+                 ; show registers in prompt based on refresh timer
+001648 91d0 0093          lds   yh,cmd_reg_timer
+00164a 23dd               tst   yh                ;show register timer expired &
+00164b f479               ifeq_and deb_show_regs
+00164c 38c0               cpi   yl,0x80           ;no active escape sequence
+00164d f469               ifeq     deb_show_regs
+00164e ff31                  sbrs  flags,emu_run
+00164f c009                  ifs   deb_regs_run
+001650 d328                     rcall escape            ;save position - esc7
+001651 e307                     ldi   a,'7'
+001652 d33f                     rcall PrintChr
+001653 d3a1                     rcall show_regs         ;show registers at beginning of line
+001654 d3d8                     rcall show_prompt
+001655 d323                     rcall escape            ;restore position - esc7
+001656 e308                     ldi   a,'8'
+001657 d33a                     rcall PrintChr
+001658 c002                  else  deb_regs_run
+001659 9250 0093                sts   cmd_reg_timer,allon  ;no changes expected soon
+                             end   deb_regs_run
+                          end      deb_show_regs
+                 ; read RS232
+00165b b61f               in    d,sreg      ;preserve sreg interrupt enable
+00165c 94f8               cli
+00165d 9000 00d7          lds   c,rx_fill   ;check buffer
+00165f 2000               tst   c
+001660 f0b9               ifne  deb_read_buf
+001661 91c0 00d6             lds   yl,rx_inx      ;prepare address to read rx fifo
+001663 e0d2                  ldi   yh,high(rx_buf)
+001664 19c0                  sub   yl,c
+001665 8108                  ld    a,y            ;read
+001666 940a                  dec   c              ;update pointer
+001667 9200 00d7             sts   rx_fill,c
+                             .ifdef flowlo
+001669 2d20                     mov   i,c
+00166a 3820                     cpi   i,flowlo          ;buffer lower watermark?
+00166b f448                     iflo  deb_flow
+00166c 9120 00d8                   lds   i,flow_cmd
+00166e 3921                        cpi   i,0x91         ;xon done?
+00166f f029                        ifne  deb_send_xon
+001670 e121                           ldi   i,0x11         ;post xon pending
+001671 9320 00d8                      sts   flow_cmd,i
+001673 eb28                           ldi   i,usart_txi_ena ;notify transmitter
+001674 b92a                           out   ucsrb,i
+                                      .ifdef irq_dis_real
+                                      .endif
+                                  end  deb_send_xon
+                                end   deb_flow
+                             .endif
+001675 be1f                  out   sreg,d
+001676 c00b                  exit  deb_wait4input
+001677 c009               else  deb_read_buf
+001678 be1f                  out   sreg,d
+001679 f02f                  ifid_and  deb_read_direct
+00167a 9b5f                  sbis  ucsra,rxc      
+00167b c003                  ifs       deb_read_direct
+00167c b10c                     in    a,udr        ;read direct if disabled & buffer empty
+00167d c004                     exit  deb_wait4input
+00167e c002                  else      deb_read_direct
+00167f fd31                     sbrc  flags,emu_run     ;allow emulator to run
+001680 c2cc                     exit  debug_main
+                             end       deb_read_direct
+                          end   deb_read_buf
+001681 cfa2            loop  deb_wait4input
+                 ; process command buffer input
+001682 91c0 0092       lds   yl,cmd_esc_timer
+001684 77cf            andi  yl,0x07f             ;discard esc sequence chars
+001685 f049            ifne  deb_esc_seq
+001686 b61f               in    d,sreg
+001687 94f8               cli
+001688 91c0 0092          lds   yl,cmd_esc_timer
+00168a 68c0               sbr   yl,0b10000000     ;flag esc sequence
+00168b 93c0 0092          sts   cmd_esc_timer,yl
+00168d be1f               out   sreg,d
+00168e c2bd            else  deb_esc_seq
+00168f e0d0               ldi   yh,high(cmd_buf)  ;load command buffer index high
+001690 91c0 0091          lds   yl,cmd_inx
+001692 370f               cpi   a,0x7f            ;delete?
+001693 f409               ifeq  deb_del2bs
+001694 e008                  ldi   a,8               ;replace with backspace
+                          end   deb_del2bs
+001695 3008               cpi   a,8               ;backspace?
+001696 f469               ifeq  deb_bs
+001697 36c0                  cpi   yl,low(cmd_buf)   ;prevent underrun
+001698 f051                  ifne   deb_bs_ok
+001699 d2f8                     rcall PrintChr          ;perform erase
+00169a d2e0                     rcall space
+00169b e008                     ldi   a,8
+00169c d2f5                     rcall PrintChr
+00169d 95ca                     dec   yl
+00169e 8108                     ld    a,y               ;deleted character
+00169f 3202                     cpi   a,34              ;is quote?
+0016a0 f411                     ifeq  deb_bs_quote
+0016a1 e400                        ldi   a,(1<<string)     ;toggle case translation
+0016a2 2730                        eor   flags,a
+                                end   deb_bs_quote
+                             end   deb_bs_ok
+0016a3 e000                  ldi   a,0            ;mark non-printable
+                          end    deb_bs
+0016a4 3200               cpi   a,' '             ;test printable character &
+0016a5 f058               ifsh_and deb_echo
+0016a6 39c0               cpi   yl,cmd_end        ;prevent overrun
+0016a7 f448               iflo     deb_echo
+0016a8 3601                  cpi   a,'a'          ;test for lower case
+0016a9 f028                  ifsh_and deb_lower_case
+0016aa 370b                  cpi   a,'z'+1
+0016ab f418                  iflo_and deb_lower_case
+0016ac fd36                  sbrc  flags,string   ;conversion enabled?
+0016ad c001                  ifs      deb_lower_case
+0016ae 5200                     subi  a,0x20          ;convert to upper case
+                             end      deb_lower_case
+0016af d2e2                  rcall PrintChr
+0016b0 9309                  st    y+,a
+                          end      deb_echo
+0016b1 93c0 0091          sts   cmd_inx,yl
+                 ; <">
+0016b3 3202               cpi   a,34              ;test for string input
+0016b4 f411               ifeq  deb_string_mark
+0016b5 e410                  ldi   b,(1<<string)  ;switch case translation
+0016b6 2731                  eor   flags,b
+                          end   deb_string_mark
+                 ; <ESC>
+0016b7 310b               cpi   a,27              ;test for escape
+0016b8 f431               ifeq  deb_esc
+0016b9 f017                  ifid  deb_esc_disabled
+0016ba e0d2                     ldi   yh,0b10        ;reset t0 compare match
+0016bb bfd8                     out   tifr,yh        ;if disabled 
+                             end   deb_esc_disabled
+0016bc e0d6                  ldi   yh,6              ;further chars within 50-60ms     
+0016bd 93d0 0092             sts   cmd_esc_timer,yh  ;discarded as esc sequence
+                          end   deb_esc
+                 ; <TAB>            
+0016bf 3009               cpi   a,9               ;test for tab (step 1 instruction)
+0016c0 f479               ifeq_and deb_step
+0016c1 fd31               sbrc  flags,emu_run     ;must be stopped
+0016c2 c00d               ifs      deb_step
+0016c3 d331                  rcall show_regs      ;show command to be executed
+0016c4 01ec                  movw  y,pch:pcl
+0016c5 d36f                  rcall disasm
+                             .ifndef cmos_core
+0016c6 3017                     cpi   b,7            ;invalid opcode?
+0016c7 f409                     ifeq  deb_step_inv
+0016c8 c27c                        rjmp  end_command
+                                end   deb_step_inv
+                             .endif
+0016c9 94f8                  cli                  ;force t0 overflow at end of instruction
+0016ca be52                  out   tcnt0,allon    ;overflow next count
+0016cb e009                  ldi   a,0b00001001   ;timer 0 ctc, clock / 1
+0016cc bf03                  out   tccr0,a
+0016cd e00d                  ldi   a,0b00001101   ;timer 0 ctc, clock / 1024
+0016ce bf03                  out   tccr0,a
+0016cf c240                  rjmp  emu_start      ;executes also breakpointed opcodes
+                          end      deb_step
+                 ; <CR>
+0016d0 300d               cpi   a,13              ;test for carriage return
+0016d1 f009
+0016d2 c279               ifeq_far deb_cr
+0016d3 36c0                  cpi   yl,low(cmd_buf)   ;test empty commandline
+0016d4 f459                  ifeq  deb_empty
+0016d5 8108                     ld    a,y               ;test for previous M or D
+0016d6 340d                     cpi   a,'M'
+0016d7 f011                     ifeq_or  deb_shortcut
+0016d8 3404                     cpi   a,'D'
+0016d9 f431                     ifeq     deb_shortcut
+0016da e4e4
+0016db e0f2
+0016dc d2a6                        PrintStr back_line      ;seamless output
+0016dd 9621                        adiw  y,1               ;keep M or D
+0016de e20b                        ldi   a,'+'
+0016df 9309                        st    y+,a
+                                end      deb_shortcut
+                             end   deb_empty
+0016e0 8278                  st    y,zero            ;mark end of commandline
+0016e1 7b3f                  cbr   flags,(1<<string) ;enable case translation
+                 ;**************************************************
+                 ;
+                 ; parsing & executing commandline
+                 ;
+                 ;************************************************** 
+0016e2 b70d                  in    a,spl             ;save sp - allows sub to exit
+0016e3 9300 009a             sts   sp_save,a
+0016e5 b70e                  in    a,sph
+0016e6 9300 009b             sts   sp_save+1,a
+0016e8 e6c0                  ldi   yl,low(cmd_buf)   ;ready to parse command
+0016e9 93c0 0091             sts   cmd_inx,yl        ;reset next commandline
+0016eb 9109                  ld    a,y+
+                 ;
+                 ; A = alter register   Syntax:Arbb<CR>|APwwww<CR>
+                 ;     r    = register A X Y P S F
+                 ;            accu indexX indexY PC SP flags(proc.status)
+                 ;     bb   = hex byte of data
+                 ;     wwww = hex word of data, leading zeroes can be omitted
+                 ;
+0016ec 3401                  cpi   a,'A'
+0016ed f531                  ifeq  alter_reg
+0016ee 9109                     ld    a,y+      ;get register
+                 ;alter accumulator
+0016ef 3401                     cpi   a,'A'     ;accumulator
+0016f0 f419                     ifeq  alter_rega
+0016f1 d3d0                        rcall get_byte
+0016f2 2f50                        mov   rega,a
+0016f3 c251                        rjmp  end_command
+                                end   alter_rega
+                 ;alter X index register
+0016f4 3508                     cpi   a,'X'     ;index register X
+0016f5 f419                     ifeq  alter_regx
+0016f6 d3cb                        rcall get_byte
+0016f7 2e80                        mov   regx,a
+0016f8 c24c                        rjmp  end_command
+                                end   alter_regx
+                 ;alter Y index register
+0016f9 3509                     cpi   a,'Y'     ;index register Y
+0016fa f419                     ifeq  alter_regy
+0016fb d3c6                        rcall get_byte
+0016fc 2e90                        mov   regy,a
+0016fd c247                        rjmp  end_command
+                                end   alter_regy
+                 ;alter stack pointer
+0016fe 3503                     cpi   a,'S'     ;stack pointer
+0016ff f419                     ifeq  alter_spointer
+001700 d3c1                        rcall get_byte
+001701 2eb0                        mov   spointer,a
+001702 c242                        rjmp  end_command
+                                end   alter_spointer
+                 ;alter flags (prcocessor status)
+001703 3406                     cpi   a,'F'     ;flags = processor status
+001704 f449                     ifeq  alter_status
+001705 d3bc                        rcall get_byte
+001706 2f60                        mov   stat2,a
+001707 2f76                        mov   stat,stat2        ;restore AVR format
+001708 7073                        andi  stat,0b11         ;------ZC
+001709 fb67                        bst   stat2,7           ;>---->
+00170a f972                        bld   stat,2            ;-----N--
+00170b 6260                        ori   stat2,0b0100000   ;  1      (always 1)
+00170c 766c                        andi  stat2,0b1101100   ;-V1BDI-- (Break cleared)
+00170d c237                        rjmp  end_command
+                                end   alter_status
+                 ;alter program counter
+00170e 3500                     cpi   a,'P'     ;program counter
+00170f f419                     ifeq  alter_pc
+001710 d3d2                        rcall get_adr
+001711 01cf                        movw  pch:pcl,z
+001712 c232                        rjmp  end_command
+                                end   alter_pc
+001713 c21c                     rjmp  invalid_command
+                             end   alter_reg
+                 ;
+                 ; B = breakpoint utility
+                 ;     BI<cr>      = information - list active breakpoints by slot number
+                 ;     BSaaaa<cr>  = set breakpoint at address aaaa, leading zeros can be omitted
+                 ;     BC#<cr>     = clear breakpoint slot #, #=0-9, #=A for all
+                 ;
+001714 3402                  cpi   a,'B'
+001715 f009
+001716 c056                  ifeq_far br_util
+001717 9109                     ld    a,y+              
+001718 3409                     cpi   a,'I'
+001719 f429                     ifeq  br_info
+00171a 9109                        ld    a,y+           ;check validity (no parms)
+00171b 1107                        cpse  a,zero
+00171c c213                        rjmp  invalid_command
+00171d d3ef                        rcall brkpt_info
+00171e c226                        rjmp  end_command
+                                end   br_info
+00171f 3503                     cpi   a,'S'
+001720 f569                     ifeq  br_set
+001721 d3c1                        rcall get_adr
+001722 eac0                        ldi   yl,low(brkpt_lo)  ;address already set?
+001723 e0d0                        ldi   yh,high(brkpt_lo)
+                                   do       br_set_already
+001724 9109                           ld    a,y+
+001725 170e                           cp    a,zl
+001726 f429                           ifeq_and br_already_set
+001727 8509                           ldd   a,y+9
+001728 170f                           cp    a,zh
+001729 f411                           ifeq     br_already_set
+00172a d3e2                              rcall brkpt_info
+00172b c219                              rjmp  end_command
+                                      end      br_already_set
+00172c 3aca                           cpi   yl,low(brkpt_hi)
+00172d f7b1                        loopne   br_set_already
+00172e eac0                        ldi   yl,low(brkpt_lo)  ;free slot?
+                                   do       br_set_free
+00172f 9109                           ld    a,y+
+001730 1505                           cp    a,allon
+001731 f4a9                           ifeq_and br_set_slot
+001732 8509                           ldd   a,y+9
+001733 1505                           cp    a,allon
+001734 f491                           ifeq     br_set_slot
+001735 9721                              sbiw  y,1
+001736 83e8                              st    y,zl              ;set new breakpoint address
+001737 87fa                              std   y+10,zh
+001738 bbe8                              out   abuslo,zl         ;fetch original opcode
+001739 bbfb                              out   abushi,zh
+00173a c000
+00173b 0000                              wait_data_valid 0       ;0ns minimum @ 16MHz
+00173c b303                              in    a,dbusin
+00173d 8b0c                              std   y+20,a            ;set original opcode
+00173e ed0b                              ldi   a,0xdb            ;replace with STP opcode
+00173f bae2                              out   cbus,writemem     ;WE, ~OE
+001740 bb05                              out   dbusout,a         ;precharge write
+001741 ba54                              out   dbusddr,allon     ;dbus = output
+001742 bac2                              out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+001743 ba74                              out   dbusddr,zero      ;dbus = input
+001744 bad2                              out   cbus,readmem      ;OE / read mode back on
+001745 d3c7                              rcall brkpt_info
+001746 c1fe                              rjmp  end_command
+                                      end      br_set_slot
+001747 3aca                           cpi   yl,low(brkpt_hi)
+001748 f731                        loopne   br_set_free
+001749 ebee
+00174a e0f1
+00174b d237                        PrintStr bpt_slot_full  ;10,13,"No more breakpoint slots available"
+00174c d3c0                        rcall brkpt_info
+00174d c1f7                        rjmp  end_command
+                                end   br_set
+00174e 3403                     cpi   a,'C'
+00174f f4e1                     ifeq  br_clr         ;get slot# or all
+                                   do     br_clr_parse
+001750 9109                           ld    a,y+
+001751 2300                           tst   a              ;premature end of input
+001752 f0c9                           breq  br_inv_cmd
+001753 3200                           cpi   a,32           ;skip blanks
+001754 f3d9                        loopeq br_clr_parse
+001755 9009                        ld    c,y+           ;check validity (1 parameter)
+001756 1007                        cpse  c,zero
+001757 c1d8                        rjmp  invalid_command
+001758 9721                        sbiw  y,1
+001759 3401                        cpi   a,'A'
+00175a f439                        ifeq  br_clr_all
+00175b d3d9                           rcall brkpt_clr_all
+00175c 2000                           tst   c
+00175d f419                           ifeq  br_clr_none_msg
+00175e e9e4
+00175f e3f9
+001760 d222                              PrintStr bpt_info_none  ;10,13,"No breakpoints active"
+                                      end   br_clr_none_msg
+001761 c1e3                           rjmp  end_command
+                                   end   br_clr_all
+001762 5300                        subi  a,'0'           ;0-9?
+001763 300a                        cpi   a,10
+001764 f438                        iflo  br_clr_slot
+001765 eac0                           ldi   yl,low(brkpt_lo)  ;select breakpoint
+001766 0fc0                           add   yl,a
+001767 e0d0                           ldi   yh,high(brkpt_lo)
+001768 1dd7                           adc   yh,zero
+001769 d3d8                           rcall brkpt_clr_one
+00176a d3a2                           rcall brkpt_info
+00176b c1d9                           rjmp  end_command
+                                   end   br_clr_slot
+                                end   br_clr
+00176c c1c3      br_inv_cmd:    rjmp  invalid_command
+                             end      br_util
+                 
+                 
+                 ;
+                 ; D = disassemble memory   Syntax: D(aaaa|+)<CR>
+                 ;     aaaa = address, leading zeros can be omitted
+                 ;     + = next, disassembles 20 instructions
+                 ;
+00176d 3404                  cpi   a,'D'
+00176e f509                  ifeq  show_disasm
+00176f 9109                     ld    a,y+              
+001770 320b                     cpi   a,'+'
+001771 f441                     ifeq  dis_next
+001772 9109                        ld    a,y+           ;no parameter after +
+001773 1107                        cpse  a,zero
+001774 c1bb                        rjmp  invalid_command
+001775 91c0 0098                   lds   yl,lmem_disas     ;load previous address
+001777 91d0 0099                   lds   yh,lmem_disas+1
+001779 c003                     else   dis_next
+00177a 9721                        sbiw  y,1               ;allow immediate hex
+00177b d367                        rcall get_adr           ;get Address
+00177c 01ef                        movw  y,z
+                                end   dis_next
+00177d e00a                     ldi   a,10              ;count
+00177e fd31                     sbrc  flags,emu_run
+00177f e006                        ldi   a,6               ;reduce count if running
+                                do     dis_loop
+001780 930f                        push  a
+001781 d1fd                        rcall crlf
+001782 2f0d                        mov   a,yh              ;show address
+001783 d205                        rcall PrintHex
+001784 2f0c                        mov   a,yl
+001785 d203                        rcall PrintHex
+001786 d1f4                        rcall space
+001787 d2ad                        rcall disasm
+001788 910f                        pop   a
+001789 950a                        dec   a
+00178a f7a9                     loopne dis_loop            
+00178b 93c0 0098                sts   lmem_disas,yl     ;load previous address
+00178d 93d0 0099                sts   lmem_disas+1,yh
+00178f c1b5                     rjmp  end_command
+                             end   show_disasm
+                             .ifdef   eep_vld
+                 ;
+                 ; E = I2C EEPROM non volatile program storage utility
+                 ;     EI<cr>   = information on programs stored and free slots
+                 ;     ESpp<cr> = save program from RS232 input to EEPROM
+                 ;     ELpp<cr> = load program from EEPROM to RAM
+                 ;     EDpp<cr> = delete program in EEPROM
+                 ;     EApp"C\rLOAD $xx\rRUN\r"<cr>
+                 ;              = autoload program, send string on power on
+                 ;                either parameter may be omitted
+                 ;                FF = no autoload, "" (empty string) = send nothing
+                 ;       pp     = program number 00 - FE
+                 ;
+001790 3405                     cpi   a,'E'
+001791 f009
+001792 c0ab                     ifeq_far eep_util
+001793 9109                        ld    a,y+
+                 ;EEPROM information
+001794 3409                        cpi   a,'I'
+001795 f431                        ifeq  eep_info
+001796 9109                           ld    a,y+           ;check validity (no parms)
+001797 1107                           cpse  a,zero
+001798 c197                           rjmp  invalid_command
+001799 d4d9                           rcall eep_auto_info
+00179a d49d                           rcall eep_cmd_info
+00179b c1a9                           rjmp  end_command
+                                   end   eep_info
+                 ;EEPROM save
+00179c 3503                        cpi   a,'S'
+00179d f009
+00179e c041                        ifeq_far eep_save
+00179f d322                           rcall get_byte          ;get prog#
+0017a0 3f0f                           cpi   a,0xff
+0017a1 f409                           ifeq  eep_save_inv_cmd
+0017a2 c18d                              rjmp  invalid_command
+                                      end   eep_save_inv_cmd
+0017a3 9300 009f                      sts   prog_num,a
+0017a5 db29                           rcall eep_open
+0017a6 e0c0                           ldi   yl,0              ;initial slot allocation
+0017a7 e0d0                           ldi   yh,0
+0017a8 ba6f                           out   eearh,one         ;upper bytes in internal EEPROM
+0017a9 ebe2
+0017aa e2f9
+0017ab d1d7                           PrintStr save_wait      ;13,10,"Saving, <ESC> to abort",13,10
+                                      do    eep_save_record
+                                         do     eep_wait_colon    ;wait for start of record
+0017ac d3e7                                 rcall read_serial_esc
+0017ad 330a                                 cpi   a,':'
+0017ae f7e9                              loopne eep_wait_colon
+0017af 27bb                              clr   xh             ;checksum
+0017b0 d480                              rcall read_byte_esc  ;read & save count
+0017b1 2fa0                              mov   xl,a
+0017b2 db3c                              rcall eep_write
+0017b3 e00d                              ldi   a,13
+0017b4 d1dd                              rcall PrintChr
+0017b5 d47b                              rcall read_byte_esc  ;read  address high
+0017b6 23aa                              tst   xl             ;count 0?
+0017b7 f0a9                              ifne  eep_save_adr   ;show & save address for count >0
+0017b8 d022                                 rcall eep_prsv       ;address high, read next
+0017b9 d021                                 rcall eep_prsv       ;address low, read function
+0017ba 3000                                 cpi   a,0            ;load function?
+0017bb f461                                 ifeq  eep_save_data
+                                               do     eep_save_data_loop
+0017bc d474                                       rcall read_byte_esc     ;read & save data
+0017bd db31                                       rcall eep_write
+0017be 95aa                                       dec   xl
+0017bf f7e1                                    loopne eep_save_data_loop
+0017c0 d470                                    rcall read_byte_esc     ;test checksum
+0017c1 23bb                                    tst   xh
+0017c2 f021                                    ifne  eep_save_error_checksum
+0017c3 e8e2
+0017c4 e3f9
+0017c5 d1bd                                       PrintStr err_chksum     ;" Checksum failed"
+0017c6 cb73                                       rjmp  eep_write_err
+                                               end   eep_save_error_checksum
+0017c7 c004                                 else  eep_save_data
+0017c8 e0e6
+0017c9 e0f2
+0017ca d1b8                                    PrintStr err_func       ;" Invalid function or count in record"
+0017cb cb6e                                    rjmp  eep_write_err
+                                            end   eep_save_data
+0017cc c00d                              else  eep_save_adr      ;show & save PC
+0017cd d00d                                 rcall eep_prsv          ;PCH, read next
+0017ce d00c                                 rcall eep_prsv          ;PCL, read function
+0017cf 3001                                 cpi   a,1               ;end of record function?
+0017d0 f429                                 ifeq  eep_save_complete
+0017d1 ecee
+0017d2 e2f9
+0017d3 d1af                                    PrintStr save_ok        ;13,"Save OK"
+0017d4 cb6b                                    rjmp  eep_write_close
+0017d5 c004                                 else  eep_save_complete
+0017d6 e0e6
+0017d7 e0f2
+0017d8 d1aa                                    PrintStr err_func       ;" Invalid function or count in record"
+0017d9 cb60                                    rjmp  eep_write_err
+                                            end   eep_save_complete
+                                         end  eep_save_adr
+0017da cfd1                           loop  eep_save_record
+                 eep_prsv:            ; Output to RS232 & EEP
+0017db 930f                           push  a
+0017dc d1ac                           rcall PrintHex       ;show address
+0017dd 910f                           pop   a
+0017de db10                           rcall eep_write      ;save address
+0017df c451                           rjmp  read_byte_esc  ;get next byte
+                                   end      eep_save
+                 ;EEPROM load
+0017e0 340c                        cpi   a,'L'
+0017e1 f449                        ifeq  eep_load
+0017e2 d2df                           rcall get_byte
+0017e3 3f0f                           cpi   a,0xff
+0017e4 f029                           breq  eep_inv_cmd
+0017e5 9300 009f                      sts   prog_num,a
+0017e7 d34d                           rcall brkpt_clr_all  ;clear all breakpoints
+0017e8 db86                           rcall eep_load_prog
+0017e9 c15b                           rjmp  end_command
+0017ea c145      eep_inv_cmd:         rjmp  invalid_command
+                                   end   eep_load
+                 ;EEPROM delete
+0017eb 3404                        cpi   a,'D'
+0017ec f569                        ifeq  eep_del
+0017ed d2d4                           rcall get_byte
+0017ee 3f0f                           cpi   a,0xff
+0017ef f3d1                           breq  eep_inv_cmd
+0017f0 2400                           clr   c              ;loopcount 256 slots
+0017f1 2711                           clr   b              ;slotcount
+0017f2 ba6f                           out   eearh,one
+                                      do       eep_del_loop
+0017f3 ba0e                              out   eearl,c        ;find prog#
+0017f4 ba6c                              out   eecr,one
+0017f5 b21d                              in    d,eedr
+0017f6 1610                              cp    d,a
+0017f7 f449                              ifeq  eep_del_slot
+0017f8 ba5d                                 out   eedr,allon     ;mark free
+0017f9 b61f                                 in    d,sreg         ;atomic write sequence
+0017fa 94f8                                 cli
+0017fb 9ae2                                 sbi   eecr,eemwe
+0017fc 9ae1                                 sbi   eecr,eewe
+0017fd be1f                                 out   sreg,d
+0017fe 9513                                 inc   b              ;count slots
+                                            do    eep_del_wait   ;write complete?
+0017ff 99e1                                    sbic  eecr,eewe
+001800 cffe                                 loop  eep_del_wait
+                                         end   eep_del_slot
+001801 9403                              inc   c              ;all slots done?
+001802 f781                           loopne   eep_del_loop
+001803 ba7e                           out   eearl,zero        ;set to unused address
+001804 ba7f                           out   eearh,zero
+001805 2311                           tst   b              ;count?
+001806 f049                           ifne  eep_del_free
+001807 d177                              rcall crlf    
+001808 2f01                              mov   a,b
+001809 d17f                              rcall PrintHex          ;slotcount
+00180a e3e6
+00180b e2f9
+00180c d176                              PrintStr eep_info3      ;" slots free"
+00180d e604                              ldi   a,'d'
+00180e d183                              rcall PrintChr
+00180f c009                           else  eep_del_free
+001810 2f10                              mov   b,a
+001811 e6e4
+001812 e2f9
+001813 d16f                              PrintStr eep_prog       ;10,13,"Program "
+001814 2f01                              mov   a,b
+001815 d173                              rcall PrintHex          ;prog#
+001816 e5e8
+001817 e2f9
+001818 d16a                              PrintStr eep_notfound   ;" not found"
+                                      end   eep_del_free
+001819 c12b                           rjmp  end_command
+                                   end   eep_del
+                 ;EEPROM autoload
+00181a 3401                        cpi   a,'A'
+00181b f511                        ifeq  eep_autoload
+00181c ba7f                           out   eearh,zero     ;write eep lower page
+                                      do       eep_auto_parse
+00181d 9109                              ld    a,y+
+00181e 2300                              tst   a              ;end of input
+00181f f251                              breq  eep_inv_cmd    ;needs at least 1 parameter
+001820 3200                              cpi   a,' '          ;skip blanks
+001821 f3d9                           loopeq   eep_auto_parse
+001822 3202                           cpi   a,34           ;begin of string
+001823 f031                           ifne  eep_auto_number
+001824 d2ae                              rcall get_wbyte
+001825 ba5e                              out   eearl,allon
+001826 d46e                              rcall eep_auto_write
+                                         do       eep_auto_parse2
+001827 9109                                 ld    a,y+
+001828 3200                                 cpi   a,' '          ;skip blanks
+001829 f3e9                              loopeq   eep_auto_parse2
+                                      end   eep_auto_number
+00182a 2300                           tst   a              ;end of input
+00182b f071                           ifne  eep_auto_next
+00182c 3202                              cpi   a,34
+00182d f479                              brne  eep_auto_invalid  ;only valid input is string
+00182e e011                              ldi   b,eep_string
+                                         do       eep_auto_string
+00182f 9109                                 ld    a,y+
+001830 2300                                 tst   a              ;end of command?
+001831 f011                                 ifeq_or  eep_string_end
+001832 3202                                 cpi   a,34           ;closing quotes
+001833 f409                                 ifeq     eep_string_end
+001834 ef0f                                    ldi   a,0xff      ;end of string marker
+                                            end      eep_string_end
+001835 bb1e                                 out   eearl,b
+001836 d45e                                 rcall eep_auto_write
+001837 9513                                 inc   b              ;next EEPROM address
+001838 3f0f                                 cpi   a,0xff         ;end marker?
+001839 f7a9                              loopne   eep_auto_string
+                                      end   eep_auto_next
+00183a d438                           rcall eep_auto_info
+00183b ba7e                           out   eearl,zero     ;protect eep from unintentional writes
+00183c c108                           rjmp  end_command
+00183d c0f2      eep_auto_invalid:    rjmp  invalid_command
+                                   end   eep_autoload
+                                end      eep_util
+                             .endif
+                 ;        
+                 ; M = show memory   Syntax: M(aaaa|+|-|)<CR>
+                 ;     aaaa = address, leading zeros can be omitted
+                 ;     + = next block, - = previous block, <CR> = same block 
+                 ;     displays 0x100 (0x40) Bytes at full line address
+                 ;
+00183e 340d                  cpi   a,'M'   
+00183f f009
+001840 c046                  ifeq_far show_mem
+001841 bad2                     out   cbus,readmem      ;prepare to read
+001842 91e0 0094                lds   zl,lmem_display   ;load previous address
+001844 91f0 0095                lds   zh,lmem_display+1
+001846 9109                     ld    a,y+              
+001847 2300                     tst   a                 ;no address - show same
+001848 f0d9                     breq  skip_get_adr
+001849 320b                     cpi   a,'+'
+00184a f451                     ifeq  show_next
+00184b fd31                        sbrc  flags,emu_run
+00184c c002                        ifs   show_nxt_100
+00184d 95f3                           inc   zh
+00184e c002                        else  show_nxt_100
+00184f 5ce0
+001850 4fff                           addiw  z,0x40        ;reduce bytes if running
+                                   end   show_nxt_100
+001851 9109                        ld    a,y+           ;no parameter after +
+001852 2300                        tst   a
+001853 f081                        breq  skip_get_adr
+001854 c0db                        rjmp  invalid_command
+                                end   show_next
+001855 320d                     cpi   a,'-'
+001856 f459                     ifeq  show_previous
+001857 fd31                        sbrc  flags,emu_run
+001858 c002                        ifs   show_prev_100
+001859 95fa                           dec   zh
+00185a c002                        else  show_prev_100
+00185b 54e0                           subi  zl,0x40        ;reduce bytes if running
+00185c 09f7                           sbc   zh,zero
+                                   end   show_prev_100
+00185d 2e10                        mov   d,a
+00185e 9109                        ld    a,y+           ;no parameter after -
+00185f 2300                        tst   a
+001860 f019                        breq  skip_get_adr
+001861 c0ce                        rjmp  invalid_command
+                                end   show_previous
+001862 9721                     sbiw  y,1            ;allow immediate hex
+001863 d27f                     rcall get_adr        ;get Address
+                 skip_get_adr:
+001864 7ee0                     andi  zl,0xe0        ;mask full lines only
+001865 2f0e                     mov   a,zl
+001866 fd31                     sbrc  flags,emu_run
+001867 5c00                        addi  a,0x40         ;reduce bytes if running
+001868 2e10                     mov   d,a
+001869 93e0 0094                sts   lmem_display,zl
+00186b 93f0 0095                sts   lmem_display+1,zh
+                                do    show_mem_line
+00186d d111                        rcall crlf
+00186e 2f0f                        mov   a,zh           ;show address
+00186f d119                        rcall PrintHex
+001870 2f0e                        mov   a,zl
+001871 d117                        rcall PrintHex
+001872 d10a                        rcall colon            
+                                   do     show_mem_data      
+001873 bbe8                           out   abuslo,zl      ;memory fetch
+001874 bbfb                           out   abushi,zh
+001875 94e8                           clt                  ;clear reverse video
+001876 c000                           wait_data_valid 1    ;60ns minimum @ 16MHz
+001877 b303                           in    a,dbusin
+001878 3d0b                           cpi   a,0xdb         ;is potential breakpoint?
+001879 f409                           ifeq  show_mem_brk
+00187a d2da                              rcall brkpt_chk
+                                      end   show_mem_brk
+00187b d0e2                           rcall RevHex
+00187c 9631                           adiw  z,1
+00187d e003                           ldi   a,3            ;seperate words with spaces
+00187e 230e                           and   a,zl
+00187f f799                        loopne show_mem_data
+001880 d0fa                           rcall space
+001881 e10f                           ldi   a,31           ;new line after 32 bytes              
+001882 230e                           and   a,zl
+001883 f779                        loopne show_mem_data
+001884 15e1                        cp    zl,d           ;0x100 bytes displayed?
+001885 f739                     loopne show_mem_line
+001886 c0be                     rjmp  end_command
+                             end   show_mem
+                 ;
+                 ; W = Write memory   Syntax: W(aaaa|+) bb..bb<CR>
+                 ;     aaaa = address, leading zeros can be omitted
+                 ;     + = write next byte(s)
+                 ;     bb = bytes of data, may be separated with spaces
+                 ;
+001887 3507                  cpi   a,'W'
+001888 f571                  ifeq  write_mem
+001889 9109                     ld    a,y+              
+00188a 320b                     cpi   a,'+'
+00188b f429                     ifeq  write_next
+00188c 91e0 0096                   lds   zl,lmem_write     ;load previous next address
+00188e 91f0 0097                   lds   zh,lmem_write+1
+001890 c006                     else  write_next
+001891 9721                        sbiw  y,1               ;allow immediate hex
+001892 d265                        rcall get_wadr          ;get write address
+001893 93e0 0094                   sts   lmem_display,zl   ;save for next display
+001895 93f0 0095                   sts   lmem_display+1,zh
+                                end   write_next
+001897 2e1c                     mov   d,yl
+                                do    write_mem_dryrun  ;syntax check before write
+001898 9109                        ld    a,y+
+001899 2300                        tst   a                 ;end of write
+00189a f021                        exiteq write_mem_dryrun
+00189b 3200                     cpi   a,32              ;skip space
+00189c f3d9                     loopeq write_mem_dryrun
+00189d d235                        rcall get_wbyte         ;get data
+00189e cff9                     loop  write_mem_dryrun
+00189f 2dc1                     mov   yl,d
+0018a0 bac2                     out   cbus,clear        ;readmode off
+0018a1 ba54                     out   dbusddr,allon     ;dbus = output
+                                do    write_mem_realrun  ;real write
+0018a2 9109                        ld    a,y+
+0018a3 2300                        tst   a                 ;end of write
+0018a4 f059                        exiteq write_mem_realrun
+0018a5 3200                     cpi   a,32              ;skip space
+0018a6 f3d9                     loopeq write_mem_realrun
+0018a7 d22b                        rcall get_wbyte         ;get data
+0018a8 d2d5                        rcall brkpt_chk_write   ;check write to breakpoint
+0018a9 bbe8                        out   abuslo,zl 
+0018aa bbfb                        out   abushi,zh
+0018ab bae2                        out   cbus,writemem     ;WE, ~OE
+0018ac bb05                        out   dbusout,a         ;dbus write
+0018ad 9631                        adiw  z,1
+0018ae bac2                        out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+0018af cff2                     loop  write_mem_realrun      
+0018b0 ba74                     out   dbusddr,zero      ;dbus = input
+0018b1 bad2                     out   cbus,readmem      ;OE / read mode back on
+0018b2 93e0 0096                sts   lmem_write,zl
+0018b4 93f0 0097                sts   lmem_write+1,zh
+0018b6 c08e                     rjmp  end_command
+                             end   write_mem
+                 ;
+                 ; L = Load Intel Hex Record   Syntax: L<CR>
+                 ;     loads records to memory, <ESC> to abort
+                 ;
+0018b7 340c                  cpi   a,'L'
+0018b8 f009
+0018b9 c040                  ifeq_far load_mem
+0018ba 9109                     ld    a,y+           ;check validity (no parms)
+0018bb 1107                     cpse  a,zero
+0018bc c073                     rjmp  invalid_command
+0018bd 7f3d                     cbr   flags,(1<<emu_run) ;force emulator halted  
+0018be d276                     rcall brkpt_clr_all  ;clear all breakpoints
+0018bf e3ea
+0018c0 e0f1
+0018c1 d0c1                     PrintStr load_wait
+                                do    load_mem_record
+                                   do     wait_colon    ;wait for start of record
+0018c2 d2d1                           rcall read_serial_esc
+0018c3 330a                           cpi   a,':'
+0018c4 f7e9                        loopne wait_colon
+0018c5 27bb                        clr   xh             ;checksum
+0018c6 d36a                        rcall read_byte_esc  ;read count
+0018c7 2fa0                        mov   xl,a
+0018c8 e00d                        ldi   a,13
+0018c9 d0c8                        rcall PrintChr
+0018ca d366                        rcall read_byte_esc  ;read address - big endian
+0018cb 2ff0                        mov   zh,a
+0018cc d0bc                        rcall PrintHex
+0018cd d363                        rcall read_byte_esc
+0018ce 2fe0                        mov   zl,a
+0018cf d0b9                        rcall PrintHex
+0018d0 d360                        rcall read_byte_esc  ;read function
+0018d1 3000                        cpi   a,0            ;load function
+0018d2 f4b9                        ifeq_and load_mem_data
+0018d3 23aa                        tst   xl             ;count > 0
+0018d4 f0a9                        ifne     load_mem_data
+0018d5 bac2                           out   cbus,clear        ;readmode off
+0018d6 ba54                           out   dbusddr,allon     ;dbus = output
+                                      do     load_data
+0018d7 d359                              rcall read_byte_esc     ;read data
+0018d8 bbe8                              out   abuslo,zl 
+0018d9 bbfb                              out   abushi,zh
+0018da bae2                              out   cbus,writemem     ;WE, ~OE
+0018db bb05                              out   dbusout,a         ;dbus write
+0018dc 9631                              adiw  z,1
+0018dd bac2                              out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+0018de 95aa                              dec   xl
+0018df f7b9                           loopne load_data
+0018e0 ba74                           out   dbusddr,zero      ;dbus = input
+0018e1 bad2                           out   cbus,readmem      ;OE / read mode back on
+0018e2 d34e                           rcall read_byte_esc     ;read checksum
+0018e3 23bb                           tst   xh
+0018e4 f021                           ifne  load_error_checksum
+0018e5 e8e2
+0018e6 e3f9
+0018e7 d09b                              PrintStr err_chksum     ;" Checksum failed"
+0018e8 c2f4                              rjmp  discard_serial_stream
+                                      end   load_error_checksum
+0018e9 c00e                        else     load_mem_data
+0018ea 3001                           cpi   a,1               ;end of record function
+0018eb f441                           ifeq  load_complete
+0018ec 23ff                              tst   zh                ;address is valid PC?
+0018ed f009                              ifne  load_pc
+0018ee 01cf                                 movw  pcl:pch,z         ;set PC
+                                         end   load_pc
+0018ef eee4
+0018f0 e0f1
+0018f1 d091                              PrintStr load_ok        ;13,"Load OK"
+0018f2 c2ea                              rjmp  discard_serial_stream   ;OK message - wait for eol
+0018f3 c004                           else  load_complete
+0018f4 e0e6
+0018f5 e0f2
+0018f6 d08c                              PrintStr err_func       ;" Invalid function or count in record"
+0018f7 c2e5                              rjmp  discard_serial_stream
+                                      end   load_complete
+                                   end      load_mem_data
+0018f8 cfc9                     loop  load_mem_record
+0018f9 c04b                     rjmp  end_command
+                             end      load_mem
+                 ;
+                 ; H = Halt Emulator execution   Syntax: H<CR>
+                 ;
+0018fa 3408                  cpi   a,'H'
+0018fb f429                  ifeq  halt_emu
+0018fc 9109                     ld    a,y+           ;check validity (no parms)
+0018fd 1107                     cpse  a,zero
+0018fe c031                     rjmp  invalid_command
+0018ff 7f3d                     cbr   flags,(1<<emu_run)   
+001900 c044                     rjmp  end_command
+                             end   halt_emu
+                 ;
+                 ; G = Go/Start Emulator execution   Syntax: G<CR>
+                 ;
+001901 3407                  cpi   a,'G'
+001902 f4e9                  ifeq  start_emu
+001903 9109                     ld    a,y+           ;check validity (no parms)
+001904 1107                     cpse  a,zero
+001905 c02a                     rjmp  invalid_command
+001906 e6c0                     ldi   yl,low(cmd_buf)
+001907 93c0 0091                sts   cmd_inx,yl
+001909 e00a                     ldi   a,10        ;linefeed
+00190a d087                     rcall PrintChr
+00190b d0e9                     rcall show_regs
+00190c 6032                     sbr   flags,(1<<emu_run)   
+00190d d11f                     rcall show_prompt
+00190e 94f8                     cli                        ;debug instance exiting
+00190f 7f3b                     cbr   flags,(1<<deb_act)   ;allow t0 to call again
+                 emu_start:
+001910 bb88                     out   abuslo,pcl        ;opcode fetch - no interrupts
+001911 bb9b                     out   abushi,pch
+001912 e0f6                           ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+001913 ec00
+001914 fd62
+001915 e400
+001916 bf0b                           IRQ_restore             ;enable NMI, IRQ if allowed
+                                wait_data_valid 5       ;300ns minimum @ 16MHz
+001917 b3e3                     in    opcode,dbusin
+001918 3deb                     cpi   opcode,0xdb       ;potential breakpoint?
+001919 f409                     ifeq  emu_start_brk
+00191a d24c                        rcall brkpt_chk_pc      ;get original opcode
+                                end   emu_start_brk
+00191b 9601                     adiw  pch:pcl,1         ;pc -> op low
+00191c bb88                     out   abuslo,pcl        ;operand address low prefetch
+00191d bb9b                     out   abushi,pch
+                                wait_data_valid 5       ;300ns minimum @ 16MHz 
+00191e 9601                           adiw  pch:pcl,1         ;pc -> op high
+00191f 9409                           ijmp                    ;execute opcode
+                             end   start_emu
+                 ;
+                 ; X = Exit Debugger / start Emulator execution   Syntax: X<CR>
+                 ;
+001920 3508                  cpi   a,'X'
+001921 f439                  ifeq  exit_deb
+001922 9109                     ld    a,y+           ;check validity (no parms)
+001923 1107                     cpse  a,zero
+001924 c00b                     rjmp  invalid_command
+001925 d059                     rcall crlf   
+001926 94f8                     cli
+001927 e032                     ldi   flags,(1<<emu_run)   ;clear all other flags
+001928 cfe7                     rjmp  emu_start
+                             end   exit_deb
+                 ;
+                 ; R = Reset emulation registers & set PC to reset vector   Syntax: R<CR>
+                 ;
+001929 3502                  cpi   a,'R'
+00192a f429                  ifeq  deb_reset
+00192b 9109                     ld    a,y+           ;check validity (no parms)
+00192c 1107                     cpse  a,zero
+00192d c002                     rjmp  invalid_command
+00192e d09c                     rcall soft_reset
+00192f c015                     rjmp  end_command
+                             end   deb_reset
+                 
+                 ;**************************************************
+                 ;
+                 ; end parsing & executing commandline
+                 ;
+                 ;************************************************** 
+                  
+                 ; Invalid command
+                 
+                 invalid_command:
+001930 9721                  sbiw  y,1               ;caused by?
+001931 8108                  ld    a,y
+001932 1107                  cpse  a,zero            ;end of line?
+001933 9621                  adiw  y,1               ;last character not eol
+001934 e30f                  ldi   a,'?'             ;mark invalid commannd
+001935 8308                  st    y,a
+001936 e6c0                  ldi   yl,low(cmd_buf)
+001937 d0bd                  rcall show_regs
+001938 d0f4                  rcall show_prompt
+                             do    deb_invalid
+001939 9109                     ld    a,y+
+00193a d057                     rcall PrintChr
+00193b 3202                     cpi   a,34              ;test for string input
+00193c f411                     ifeq  inv_string_mark
+00193d e410                        ldi   b,(1<<string)  ;switch case translation
+00193e 2731                        eor   flags,b
+                                end   inv_string_mark
+00193f 330f                     cpi   a,'?'
+001940 f7c1                  loopne   deb_invalid
+001941 93c0 0091             sts   cmd_inx,yl
+001943 d02f                  rcall erase2eol         ;esc[K - clear rest of line
+                          
+001944 ccdf                  rjmp  debug_main        ;loop with invalid command
+                             
+                 ; Valid command            
+                             
+                 end_command:                  ;new prompt
+001945 e6c0                  ldi   yl,low(cmd_buf)
+001946 93c0 0091             sts   cmd_inx,yl
+001948 e00a                  ldi   a,10        ;linefeed
+001949 d048                  rcall PrintChr
+00194a d0aa                  rcall show_regs
+00194b d0e1                  rcall show_prompt
+                          end      deb_cr
+                       end   deb_esc_seq
+00194c ccd7         loop  debug_main
+00194d 94f8         cli                        ;debug instance exiting
+00194e 7f3b         cbr   flags,(1<<deb_act)   ;allow t0 to call again
+                 end_exit:
+00194f e0f6         ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+001950 ec00
+001951 fd62
+001952 e400
+001953 bf0b         IRQ_restore                ;allow NMI, IRQ only if allowed
+001954 bb88
+001955 bb9b
+001956 9478
+001957 9601
+001958 94f8
+001959 b3e3
+00195a bb88
+00195b bb9b
+00195c 9601
+00195d 9409         op_decode                  ;start processing
+                  
+                 ;*****************************************************************
+                 ;
+                 ; debugger/monitor output to terminal
+                 ;
+                 ;*****************************************************************
+                 
+                 ; Hex Output to RS232, reverse video if T flag
+00195e 930f      RevHex:     push  a
+00195f 9502                  swap  a
+001960 d001                  rcall revx_dgt
+001961 910f                  pop   a
+001962 700f      revx_dgt:   andi  a,0x0f
+001963 5d00                  addi  a,'0'           ;ASCII "0-9"
+001964 330a                  cpi   a,'9'+1         ;ASCII "A-F"
+001965 f008                  brlo  RevChr
+001966 5f09                  addi  a,7
+                 
+001967 f556      RevChr:     brtc  PrintChr          ;print character reverse video if t set
+001968 fd33                  sbrc  flags,rvs_vid
+001969 c008                  ifs   rvs_video_off
+00196a 6038                     sbr   flags,(1<<rvs_vid)
+00196b 930f                     push  a
+00196c d009                     rcall esc91             ;ESC[7m - reverse video character on
+00196d e307                     ldi   a,'7'
+00196e d02b                     rcall prtc
+00196f e60d                     ldi   a,'m'
+001970 d029                     rcall prtc
+001971 910f                     pop   a                 ;print saved character
+                             end   rvs_video_off
+001972 c027                  rjmp  prtc
+                 
+001973 d002      erase2eol:  rcall esc91             ;ESC[K - clear rest of line
+001974 e40b                  ldi   a,'K'
+001975 c024                  rjmp  prtc
+                 
+001976 d002      esc91:      rcall escape            ;ESC[
+001977 e50b                  ldi   a,91
+001978 c021                  rjmp  prtc
+                 
+001979 e10b      escape:     ldi   a,27              ;ESC
+00197a c01f                  rjmp  prtc
+                 
+00197b e200      space:      ldi   a,0x20            ;print space
+00197c c015                  rjmp  PrintChr
+                 
+00197d e30a      colon:      ldi   a,0x3a
+00197e c013                  rjmp  PrintChr
+                 
+00197f e00a      crlf:       ldi   a,10              ;print carriage return, linefeed
+001980 d011                  rcall PrintChr
+001981 e00d                  ldi   a,13
+001982 c00f                  rjmp  PrintChr
+                 
+                 ; Print String (called by PrintStr Macro)
+                 prtstr:
+                    do    print_string
+001983 9105            lpm   a,z+
+001984 2300            tst   a
+001985 f011            exiteq print_string
+001986 d00b            rcall PrintChr
+001987 cffb         loop  print_string
+001988 9508         ret
+                 
+                 ; Hex Output to RS232
+001989 930f      PrintHex:   push  a
+00198a 9502                  swap  a
+00198b d001                  rcall prtx_dgt
+00198c 910f                  pop   a
+00198d 700f      prtx_dgt:   andi  a,0x0f
+00198e 5d00                  addi  a,'0'           ;ASCII "0-9"
+00198f 330a                  cpi   a,'9'+1         ;ASCII "A-F"
+001990 f008                  brlo  PrintChr
+001991 5f09                  addi  a,7
+                 
+                 ; Character output to RS232
+                 PrintChr:
+001992 ff33         sbrs  flags,rvs_vid
+001993 c006         ifs   reverse_video_off
+001994 930f            push  a
+001995 7f37            cbr   flags,(1<<rvs_vid)
+001996 dfdf            rcall esc91             ;ESC[m - character video attributes off
+001997 e60d            ldi   a,'m'
+001998 d001            rcall prtc
+001999 910f            pop   a
+                    end   reverse_video_off
+                 prtc:                   ;bypass of rvs video mode check
+00199a 93cf            push  yl
+00199b 93df            push  yh
+00199c f4b7         ifie  prt_fifo       ;fifo only when enabled
+00199d 920f            push  c
+00199e 91c0 00d4       lds   yl,tx_inx      ;load buffer pointer
+0019a0 e0d1            ldi   yh,high(tx_buf)
+                       do     prt_fifo_full    ;wait for space in fifo
+0019a1 9000 00d5          lds   c,tx_fill
+0019a3 9403               inc   c              ;check for overflow
+0019a4 f3e1            loopeq prt_fifo_full
+0019a5 94f8            cli
+0019a6 9000 00d5       lds   c,tx_fill
+0019a8 eb28            ldi   i,usart_txi_ena   ;notify transmitter
+0019a9 b92a            out   ucsrb,i
+                       .ifdef irq_dis_real
+                       .endif
+0019aa 9309            st    y+,a           ;store in fifo
+0019ab 9403            inc   c              ;update pointers
+0019ac 93c0 00d4       sts   tx_inx,yl
+0019ae 9200 00d5       sts   tx_fill,c
+0019b0 9478            sei
+0019b1 900f            pop   c
+0019b2 c015         else  prt_fifo 
+0019b3 9040 00d5       lds   k,tx_fill         ;empty buffer before printing direct?
+                       do       prt_fifo_disabled
+0019b5 2044               tst   k
+0019b6 f051            exiteq   prt_fifo_disabled
+0019b7 e0d1               ldi   yh,high(tx_buf)
+0019b8 91c0 00d4          lds   yl,tx_inx         ;calc output index
+0019ba 19c4               sub   yl,k
+0019bb 8128               ld    i,y               ;load from fifo head
+                          do    prt_fifo_wait_udre
+0019bc 9b5d                  sbis  ucsra,udre
+0019bd cffe               loop  prt_fifo_wait_udre
+0019be b92c               out   udr,i
+0019bf 944a               dec   k                 ;update pointer
+0019c0 cff4            loop     prt_fifo_disabled
+0019c1 9240 00d5       sts   tx_fill,k         ;buffer now empty
+0019c3 e928            ldi   i,usart_txi_dis   ;stop rupt
+0019c4 b92a            out   ucsrb,i
+                       .ifdef irq_dis_real
+                       .endif
+                       do    prt_wait_udre     ;direct output
+0019c5 9b5d               sbis  ucsra,udre
+0019c6 cffe            loop  prt_wait_udre
+0019c7 b90c            out   udr,a
+                    end   prt_fifo
+0019c8 91df         pop   yh
+0019c9 91cf         pop   yl
+0019ca 9508         ret
+                 
+                 ;*****************************************************************
+                 ;
+                 ; Soft Reset
+                 ;     clears pending interrupts, emulated registers & status
+                 ;     loads reset vector to PC
+                 ;
+                 ;*****************************************************************
+                 
+                 soft_reset:
+0019cb 9270 00be    sts   irq_mask,zero     ;disable all internal IRQ
+0019cd 9270 00bf    sts   irq_flag,zero
+0019cf 988b         cbi   cbusddr,3
+0019d0 fd30         sbrc  flags,deb_on      ;acia connected?
+0019d1 c006         ifs   sr_chk_tdre
+0019d2 ed05            ldi   a,tx_fill      ;tx buffer full?
+0019d3 9503            inc   a
+0019d4 f019            ifne  sr_set_tdre
+0019d5 e800               ldi   a,0b10000000   ;set tx buffer empty
+0019d6 9300 00bf          sts   irq_flag,a
+                       end   sr_set_tdre
+                    end   sr_chk_tdre
+                    .ifdef   iomap
+0019d8 940e 0c0e       call  io_reset             ;reset IO
+0019da e0f6            ldi   oc_tabh,high(oc_tab) ;restore zh as opcode table
+                    .endif
+0019db 9270 00c5    sts   selftest,zero     ;clear diag forced interrupts
+                    .ifdef  nmi_ena
+0019dd ef00            ldi   a,0b11110000      ;Memory R/W signals + IO-select 1-2
+                    .else
+                    .endif
+0019de bb01         out   cbusddr,a
+0019df ec00         ldi   a,0xc0            ;clear pending int0, int1 (NMI, IRQ)
+0019e0 bf0a         out   gifr,a
+0019e1 9250 00ca    sts   dma_last_cmd,allon   ;dma setup required
+0019e3 2755         clr   rega              ;clear registers
+0019e4 2488         clr   regx
+0019e5 2499         clr   regy
+0019e6 2cb5         mov   spointer,allon
+0019e7 2777         clr   stat
+0019e8 e264         ldi   stat2,0b00100100  ;B=0, D=0, I=1
+                 load_reset_vector:
+0019e9 efcc         ldi   oplow,low(0xfffc) ;reset vector
+0019ea efdf         ldi   ophigh,high(0xfffc)
+0019eb bbc8         out   abuslo,oplow      ;indirect address low prefetch
+0019ec bbdb         out   abushi,ophigh
+0019ed c000         wait_data_valid 1       ;60ns minimum @ 16MHz 
+0019ee 9621               adiw  opointer,1  ;pc -> adr high
+0019ef b383         in    pcl,dbusin        ;save low pointer to pc     
+0019f0 bbc8         out   abuslo,oplow      ;fetch high pointer to pc
+0019f1 c000
+0019f2 0000         wait_data_valid 0       ;0ns minimum @ 16MHz
+0019f3 b393         in    pch,dbusin        ;point to new pc
+0019f4 9508         ret
+                 ;*****************************************************************
+                 ;
+                 ; show 6502 registers
+                 ;
+                 ;     shows register, sets refresh to 500ms
+                 ;     output: 1ss pppp aa Xxx Yyy ffffffff r>
+                 ;     ss = stack pointer, pppp = program counter, aa = accumulator
+                 ;     xx = Index X, yy = Index Y, ffffffff = bitwise processor status
+                 ;     r  = runmode                           (1 = reverse video)
+                 ;
+                 ;*****************************************************************
+                 
+                 show_regs:
+0019f5 e302         ldi   a,50            ;refresh timer 500ms (50 * 10)
+0019f6 9300 0093    sts   cmd_reg_timer,a
+0019f8 e00d         ldi   a,13            ;return
+0019f9 df98         rcall PrintChr
+0019fa e301         ldi   a,'1'           ;stackpointer
+0019fb df96         rcall PrintChr
+0019fc 2d0b         mov   a,spointer
+0019fd df8b         rcall PrintHex
+0019fe df7c         rcall space
+0019ff ff31         sbrs  flags,emu_run
+001a00 c002         ifs   show_reg_run   ;show breakpoint if halted
+001a01 94e8            clt
+001a02 c001         else  show_reg_run
+001a03 d163            rcall brkpt_chk_pc
+                    end   show_reg_run
+001a04 2f09         mov   a,pch           ;program counter
+001a05 df58         rcall RevHex
+001a06 2f08         mov   a,pcl
+001a07 df56         rcall RevHex
+001a08 df72         rcall space
+001a09 2f05         mov   a,rega          ;accumulator
+001a0a df7e         rcall PrintHex
+001a0b df6f         rcall space
+001a0c e708         ldi   a,'x'           ;index register X
+001a0d df84         rcall PrintChr
+001a0e 2d08         mov   a,regx
+001a0f df79         rcall PrintHex
+001a10 df6a         rcall space
+001a11 e709         ldi   a,'y'           ;index register y
+001a12 df7f         rcall PrintChr
+001a13 2d09         mov   a,regy
+001a14 df74         rcall PrintHex
+001a15 df65         rcall space   
+001a16 e40e         ldi   a,'N'           ;processor status
+001a17 fb72         bst   stat,2
+001a18 df4e         rcall RevChr
+001a19 e506         ldi   a,'V'
+001a1a fb66         bst   stat2,6
+001a1b df4b         rcall RevChr
+001a1c e20d         ldi   a,'-'           ;don´t care
+001a1d df74         rcall PrintChr
+001a1e e402         ldi   a,'B'           ;only on stack
+001a1f df72         rcall PrintChr
+001a20 e404         ldi   a,'D'
+001a21 fb63         bst   stat2,3
+001a22 df44         rcall RevChr
+001a23 e409         ldi   a,'I'
+001a24 fb62         bst   stat2,2
+001a25 df41         rcall RevChr
+001a26 e50a         ldi   a,'Z'
+001a27 fb71         bst   stat,1
+001a28 df3e         rcall RevChr
+001a29 e403         ldi   a,'C'
+001a2a fb70         bst   stat,0
+001a2b df3b         rcall RevChr
+001a2c cf4e         rjmp  space
+                 
+                 show_prompt:
+001a2d ff31         sbrs  flags,emu_run
+001a2e c002         ifs   show_runmode
+001a2f e407            ldi   a,'G'          ;go / running
+001a30 c001         else  show_runmode
+001a31 e408            ldi   a,'H'          ;halted / stopped
+                    end   show_runmode
+001a32 df5f         rcall PrintChr
+001a33 e30e         ldi   a,'>'
+001a34 cf5d         rjmp  PrintChr
+                 
+                 ;*****************************************************************
+                 ;
+                 ; disassemble instruction
+                 ;
+                 ;     expects addresss in y
+                 ;     returns b = 7 if invalid instruction
+                 ;     uses a c d z
+                 ;
+                 ;*****************************************************************
+                 
+                 disasm:
+001a35 bbc8         out   abuslo,yl         ;memory fetch
+001a36 bbdb         out   abushi,yh
+001a37 2411         clr   d                 ;load index to opcode table
+001a38 94e8         clt                     ;clear reverse video
+001a39 01fe         movw  z,y
+                    wait_data_valid 3       ;180ns minimum @ 16MHz
+001a3a b303         in    a,dbusin
+001a3b 3d0b         cpi   a,0xdb            ;is potential breakpoint?
+001a3c f411         ifeq  show_dis_brk
+001a3d d117            rcall brkpt_chk
+001a3e 01ef            movw  y,z
+                    end   show_dis_brk
+001a3f 2e00         mov   c,a               ;opcode
+001a40 9621         adiw  y,1               ;next byte
+001a41 0c00         lsl   c                 ;*4 / each entry 4 bytes
+001a42 1c11         rol   d
+001a43 0c00         lsl   c
+001a44 1c11         rol   d
+001a45 e4ee         ldi   zl,low(dis_opcode<<1)
+001a46 e0f2         ldi   zh,high(dis_opcode<<1)
+001a47 0de0         add   zl,c
+001a48 1df1         adc   zh,d
+001a49 9105         lpm   a,z+              ;show mnemonics
+001a4a df1c         rcall RevChr
+001a4b 9105         lpm   a,z+
+001a4c df1a         rcall RevChr
+001a4d 9105         lpm   a,z+
+001a4e df18         rcall RevChr
+001a4f df2b         rcall space
+001a50 9114         lpm   b,z               ;show addressing
+001a51 7610         andi  b,0b1100000       ;mask prefix
+001a52 3210         cpi   b,0b0100000       
+001a53 f411         ifeq  dis_immediate
+001a54 e203            ldi   a,'#'
+001a55 df3c            rcall PrintChr
+                    end   dis_immediate
+001a56 3410         cpi   b,0b1000000
+001a57 f411         ifeq  dis_pre_indirect
+001a58 e208            ldi   a,'('
+001a59 df38            rcall PrintChr
+                    end   dis_pre_indirect
+001a5a 3610         cpi   b,0b1100000
+001a5b f439         ifeq  dis_bitnum
+001a5c b303            in    a,dbusin          ;opcode -> bitnum
+001a5d 9502            swap  a
+001a5e 7007            andi  a,7
+001a5f 5d00            addi  a,'0'
+001a60 df31            rcall PrintChr
+001a61 e20c            ldi   a,','
+001a62 df2f            rcall PrintChr
+                    end   dis_bitnum
+001a63 9114         lpm   b,z
+001a64 7118         andi  b,0b0011000       ;mask op addressing
+001a65 3018         cpi   b,0b0001000             
+001a66 f431         ifeq  dis_data_one      ;zero page or immediate
+001a67 bbc8            out   abuslo,yl         ;memory fetch
+001a68 bbdb            out   abushi,yh
+001a69 9621            adiw  y,1
+001a6a c000            wait_data_valid 1       ;60ns minimum @ 16MHz
+001a6b b303            in    a,dbusin
+001a6c df1c            rcall PrintHex
+                    end   dis_data_one
+001a6d 3110         cpi   b,0b0010000             
+001a6e f469         ifeq  dis_data_abs      ;2 Byte absolute (reverse order)
+001a6f bbc8            out   abuslo,yl         ;memory fetch
+001a70 bbdb            out   abushi,yh
+001a71 9621            adiw  y,1
+001a72 c000            wait_data_valid 1       ;60ns minimum @ 16MHz
+001a73 b203            in    c,dbusin
+001a74 bbc8            out   abuslo,yl         ;memory fetch
+001a75 bbdb            out   abushi,yh
+001a76 9621            adiw  y,1
+001a77 c000            wait_data_valid 1       ;60ns minimum @ 16MHz
+001a78 b303            in    a,dbusin
+001a79 df0f            rcall PrintHex
+001a7a 2d00            mov   a,c
+001a7b df0d            rcall PrintHex
+                    end   dis_data_abs
+001a7c 3118         cpi   b,0b0011000             
+001a7d f409         ifeq  dis_data_rel      ;1 Byte relative (calculated absolute)
+001a7e d02c            rcall dis_rel
+                    end   dis_data_rel
+001a7f 9114         lpm   b,z
+001a80 7017         andi  b,0b0000111       ;mask suffix
+001a81 3011         cpi   b,0b001           ;,X
+001a82 f421         ifeq  dis_x
+001a83 e20c            ldi   a,','
+001a84 df0d            rcall PrintChr
+001a85 e508            ldi   a,'X'
+001a86 df0b            rcall PrintChr
+                    end   dis_x
+001a87 3012         cpi   b,0b010           ;,Y
+001a88 f421         ifeq  dis_y
+001a89 e20c            ldi   a,','
+001a8a df07            rcall PrintChr
+001a8b e509            ldi   a,'Y'
+001a8c df05            rcall PrintChr
+                    end   dis_y
+001a8d 3013         cpi   b,0b011           ;)
+001a8e f411         ifeq  dis_i
+001a8f e209            ldi   a,')'
+001a90 df01            rcall PrintChr
+                    end   dis_i
+001a91 3014         cpi   b,0b100           ;,X)
+001a92 f431         ifeq  dis_xi
+001a93 e20c            ldi   a,','
+001a94 defd            rcall PrintChr
+001a95 e508            ldi   a,'X'
+001a96 defb            rcall PrintChr
+001a97 e209            ldi   a,')'
+001a98 def9            rcall PrintChr
+                    end   dis_xi
+001a99 3015         cpi   b,0b101           ;),Y
+001a9a f431         ifeq  dis_iy
+001a9b e209            ldi   a,')'
+001a9c def5            rcall PrintChr
+001a9d e20c            ldi   a,','
+001a9e def3            rcall PrintChr
+001a9f e509            ldi   a,'Y'
+001aa0 def1            rcall PrintChr
+                    end   dis_iy
+001aa1 3016         cpi   b,0b110           ;A
+001aa2 f411         ifeq  dis_a
+001aa3 e401            ldi   a,'A'
+001aa4 deed            rcall PrintChr
+                    end   dis_a
+001aa5 3017         cpi   b,0b111           ;invalid instruction or BBR/BBS
+001aa6 f419         ifeq  dis_nv
+                       .ifdef cmos_core
+                       .else
+001aa7 e3ec
+001aa8 e3f9
+001aa9 ded9               PrintStr inv_instr
+                       .endif
+                    end   dis_nv
+001aaa 9508         ret
+                 
+                 ;fetch relative address and display as absolute
+                 dis_rel:
+001aab bbc8         out   abuslo,yl         ;memory fetch
+001aac bbdb         out   abushi,yh
+001aad 9621         adiw  y,1
+001aae 2700         clr   a
+001aaf 0000         wait_data_valid 2       ;120ns minimum @ 16MHz
+001ab0 b203         in    c,dbusin
+001ab1 2000         tst   c
+001ab2 f40a         ifmi  dis_rel_sign
+001ab3 950a            dec   a                 ;extend sign to high
+                    end   dis_rel_sign
+001ab4 0e0c         add   c,yl              ;calculate & show absolute
+001ab5 1f0d         adc   a,yh
+001ab6 ded2         rcall PrintHex
+001ab7 2d00         mov   a,c
+001ab8 ced0         rjmp  PrintHex
+                 
+                 ;*****************************************************************
+                 ;
+                 ; get hex parameters
+                 ;
+                 ;*****************************************************************
+                 
+                 ;ASCII to hex nibble conversion
+                 get_hex:
+001ab9 5300         subi  a,'0'           ;hex 0-9
+001aba 300a         cpi   a,10
+001abb f028         ifsh  hex_a_f
+001abc 3101            cpi   a,17         ;non hex >0 <A
+001abd f0f0            brlo  inv_cmd
+001abe 5007            subi  a,'A'-'0'-10 ;hex A-F
+001abf 3100            cpi   a,16         ;non hex >F
+001ac0 f4d8            brsh  inv_cmd
+                    end   hex_a_f
+001ac1 9508         ret
+                 ;
+                 ; get 1 hex byte from commandline
+                 ;     expects 2 Hex digits, eol
+                 ;     returns hex byte in a
+                 ;
+                 get_byte:
+                    do     byte_parse
+001ac2 9109            ld    a,y+
+001ac3 2300            tst   a            ;premature end of input
+001ac4 f0b9            breq  inv_cmd
+001ac5 3200            cpi   a,32         ;skip blanks
+001ac6 f3d9         loopeq byte_parse
+001ac7 dff1         rcall get_hex        ;high nibble
+001ac8 2e00         mov   c,a
+001ac9 9402         swap  c
+001aca 9109         ld    a,y+
+001acb 2300         tst   a
+001acc f079         breq  inv_cmd
+001acd dfeb         rcall get_hex        ;low nibble
+001ace 2900         or    a,c
+001acf 9019         ld    d,y+           ;end of line?
+001ad0 2011         tst   d
+001ad1 f451         brne  inv_cmd
+001ad2 9508         ret               
+                 ;
+                 ; get nth hex byte from commandline
+                 ;     expects 2 Hex digits
+                 ;     returns hex byte in a
+                 ;
+                 get_wbyte:
+001ad3 dfe5         rcall get_hex        ;high nibble
+001ad4 2e00         mov   c,a
+001ad5 9402         swap  c
+001ad6 9109         ld    a,y+
+001ad7 2300         tst   a
+001ad8 f019         breq  inv_cmd
+001ad9 dfdf         rcall get_hex        ;low nibble
+001ada 2900         or    a,c
+001adb 9508         ret               
+                 
+                 inv_cmd:
+001adc 9100 009a    lds   a,sp_save      ;restore sp to main loop
+001ade bf0d         out   spl,a
+001adf 9100 009b    lds   a,sp_save+1
+001ae1 bf0e         out   sph,a
+001ae2 ce4d         rjmp  invalid_command   ;immediate end of command
+                 
+                 ;
+                 ; get hex address from commandline, single parameter
+                 ;     expects y pointing to 1-4 hex digits, end of line
+                 ;     uses a b
+                 ;     returns address in z
+                 ;
+                 get_adr:
+                    do     adr_parse
+001ae3 9109            ld    a,y+
+001ae4 2300            tst   a               ;premature end of input
+001ae5 f3b1            breq  inv_cmd
+001ae6 3200            cpi   a,32            ;skip blanks
+001ae7 f3d9         loopeq adr_parse
+001ae8 dfd0         rcall get_hex        ;1st nibble
+001ae9 27ff         clr   zh
+001aea 2fe0         mov   zl,a
+                    do        adr_nibble
+001aeb 9109            ld    a,y+            ;next nibble
+001aec 2300            tst   a
+001aed f049            exiteq adr_nibble
+001aee dfca            rcall get_hex
+001aef e014            ldi   b,4
+                       do    adr_shift_nibble
+001af0 0fee               lsl   zl
+001af1 1fff               rol   zh
+001af2 f348               brcs  inv_cmd        ;exceeds 16bit
+001af3 951a               dec   b
+001af4 f7d9            loopne adr_shift_nibble
+001af5 2be0            or    zl,a
+001af6 cff4         loop      adr_nibble
+001af7 9508         ret               
+                 ;
+                 ; get hex address from commandline, multiple parameter
+                 ;     expects 1-4 hex digits, space
+                 ;     returns address in z
+                 ;
+                 get_wadr:
+                    do     wadr_parse
+001af8 9109            ld    a,y+
+001af9 2300            tst   a                 ;premature end of input
+001afa f309            breq  inv_cmd
+001afb 3200            cpi   a,32              ;skip blanks
+001afc f3d9         loopeq wadr_parse
+001afd dfbb         rcall get_hex           ;1st nibble
+001afe 27ff         clr   zh
+001aff 2fe0         mov   zl,a
+                    do        wadr_nibble
+001b00 9109            ld    a,y+              ;next nibble
+001b01 3200            cpi   a,32
+001b02 f049            exiteq wadr_nibble
+001b03 dfb5            rcall get_hex
+001b04 e014            ldi   b,4
+                       do    wadr_shift_nibble
+001b05 0fee               lsl   zl
+001b06 1fff               rol   zh
+001b07 f2a0               brcs  inv_cmd           ;exceeds 16bit
+001b08 951a               dec   b
+001b09 f7d9            loopne wadr_shift_nibble
+001b0a 2be0            or    zl,a
+001b0b cff4         loop      wadr_nibble
+001b0c 9508         ret               
+                 
+                 ;*****************************************************************
+                 ;
+                 ; breakpoint utilities
+                 ;
+                 ;*****************************************************************
+                 ;
+                 ; breakpoint info - list active breakpoints
+                 ;     uses a c y z
+                 ;
+                 brkpt_info:
+001b0d eac0         ldi   yl,low(brkpt_lo)  ;any breakpoints active?
+001b0e e0d0         ldi   yh,high(brkpt_lo)
+001b0f 2400         clr   c
+                    do       br_find_actv
+001b10 85fa            ldd   zh,y+10           ;brkpt_hi set?
+001b11 11f5            cpse  zh,allon
+001b12 9403            inc   c
+001b13 91e9            ld    zl,y+             ;brkpt_lo set?
+001b14 11e5            cpse  zl,allon
+001b15 9403            inc   c
+001b16 3aca            cpi   yl,low(brkpt_hi)
+001b17 f7c1         loopne   br_find_actv
+001b18 1007         cpse  c,zero
+001b19 c004         ifs   br_info_none
+001b1a e9e4
+001b1b e3f9
+001b1c de66            PrintStr bpt_info_none  ;10,13,"No breakpoints active"
+001b1d c016         else  br_info_none
+001b1e e9ec
+001b1f e0f1
+001b20 de62            PrintStr bpt_info       ;10,13,"Breakpoints  (slot#:address)",13,10
+001b21 eac0            ldi   yl,low(brkpt_lo)  ;find breakpoints
+                       do       br_info_all
+001b22 81e8               ld    zl,y              ;brkpt_lo set?
+001b23 85fa               ldd   zh,y+10           ;brkpt_hi set?
+001b24 15e5               cp    zl,allon
+001b25 f411               ifne_or  br_info_slot
+001b26 15f5               cp    zh,allon
+001b27 f049               ifne     br_info_slot
+001b28 de52                  rcall space
+001b29 2f0c                  mov   a,yl              ;slot#
+001b2a 5700                  subi  a,low(brkpt_lo) - '0'
+001b2b de66                  rcall PrintChr
+001b2c de50                  rcall colon
+001b2d 2f0f                  mov   a,zh              ;address
+001b2e de5a                  rcall PrintHex
+001b2f 2f0e                  mov   a,zl
+001b30 de58                  rcall PrintHex
+                          end      br_info_slot
+001b31 9621               adiw  y,1               ;next slot
+001b32 3aca               cpi   yl,low(brkpt_hi)
+001b33 f771            loopne   br_info_all
+                    end   br_info_none
+001b34 9508         ret
+                 ;
+                 ; clear all breakpoints
+                 ;     uses a y z
+                 ;     returns c = count of slots cleared
+                 ;
+                 brkpt_clr_all:
+001b35 eac0         ldi   yl,low(brkpt_lo)  ;find breakpoints
+001b36 e0d0         ldi   yh,high(brkpt_lo)
+001b37 2400         clr   c
+                    do       br_clr_all_slots
+001b38 d009            rcall brkpt_clr_one
+001b39 9621            adiw  y,1               ;next slot
+001b3a 3aca            cpi   yl,low(brkpt_hi)
+001b3b f7e1         loopne   br_clr_all_slots
+001b3c 2000         tst   c
+001b3d f019         ifne  br_clr_all_msg
+001b3e e8e2
+001b3f e0f1
+001b40 de42            PrintStr bpt_clrd_msg   ;10,13,"All breakpoints cleared"
+                    end   br_clr_all_msg
+001b41 9508         ret
+                 ;
+                 ; clear 1 breakpoint slot
+                 ;     uses a y z
+                 ;     returns c+1 if slot was active / got cleared
+                 ;
+                 brkpt_clr_one:
+001b42 81e8         ld    zl,y              ;brkpt_lo set?
+001b43 85fa         ldd   zh,y+10           ;brkpt_hi set?
+001b44 15e5         cp    zl,allon
+001b45 f411         ifne_or  br_clr_one_slot
+001b46 15f5         cp    zh,allon
+001b47 f061         ifne     br_clr_one_slot
+                       ;write original opcode back to its RAM location
+001b48 890c            ldd   a,y+20            ;brkpt_op
+001b49 bbe8            out   abuslo,zl 
+001b4a bbfb            out   abushi,zh
+001b4b bae2            out   cbus,writemem     ;WE, ~OE
+001b4c bb05            out   dbusout,a         ;dbus write
+001b4d ba54            out   dbusddr,allon     ;dbus = output
+001b4e bac2            out   cbus,clear        ;~WE / write cycle ends 180ns/16MHz
+001b4f ba74            out   dbusddr,zero      ;dbus = input
+001b50 bad2            out   cbus,readmem      ;OE / read mode back on
+001b51 8258            st    y,allon           ;reset brkpt_lo
+001b52 865a            std   y+10,allon        ;reset brkpt_hi
+001b53 9403            inc   c
+                    end      br_clr_one_slot
+001b54 9508         ret
+                 ;
+                 ; check STP is breakpoint
+                 ;     expects current address in z
+                 ;     on match replace a with original opcode
+                 ;      "   "   set T flag to signal reverse video
+                 ;     uses c y
+                 ;
+                 brkpt_chk:
+001b55 eac0         ldi   yl,low(brkpt_lo)  ;match breakpoint address
+001b56 e0d0         ldi   yh,high(brkpt_lo)
+                    do       br_chk_adr
+001b57 9009            ld    c,y+              ;brkpt_lo match?
+001b58 160e            cp    c,zl
+001b59 f451            ifeq_and br_slot_match
+001b5a 8409            ldd   c,y+9             ;brkpt_hi match?
+001b5b 160f            cp    c,zh
+001b5c f439            ifeq     br_slot_match
+001b5d 15e5               cp    zl,allon
+001b5e f411               ifne_or  br_slot_valid
+001b5f 15f5               cp    zh,allon
+001b60 f011               ifne     br_slot_valid
+001b61 890b                  ldd   a,y+19            ;show original opcode
+001b62 9468                  set                     ;signal breakpoint = reverse video
+                          end      br_slot_valid
+001b63 9508               ret
+                       end      br_slot_match
+001b64 3aca            cpi   yl,low(brkpt_hi)
+001b65 f789         loopne   br_chk_adr
+001b66 9508         ret
+                 ;
+                 ; check PC is breakpoint
+                 ;     expects current address in pcl:pch
+                 ;     on match replace opcode with original opcode
+                 ;     T flag = breakpoint true/false
+                 ;     uses c
+                 ;
+                 brkpt_chk_pc:
+001b67 93cf         push  yl
+001b68 93df         push  yh
+001b69 eac0         ldi   yl,low(brkpt_lo)  ;match breakpoint address
+001b6a e0d0         ldi   yh,high(brkpt_lo)
+001b6b 94e8         clt
+                    do       br_pc_adr
+001b6c 9009            ld    c,y+              ;brkpt_lo match?
+001b6d 1608            cp    c,pcl
+001b6e f451            ifeq_and br_pc_match
+001b6f 8409            ldd   c,y+9             ;brkpt_hi match?
+001b70 1609            cp    c,pch
+001b71 f439            ifeq     br_pc_match
+001b72 1585               cp    pcl,allon
+001b73 f411               ifne_or  br_pc_valid
+001b74 1595               cp    pch,allon
+001b75 f011               ifne     br_pc_valid
+001b76 89eb                  ldd   opcode,y+19       ;show original opcode
+001b77 9468                  set                     ;signal breakpoint = reverse video
+                          end      br_pc_valid
+001b78 c002               rjmp  br_chkp_exit
+                       end      br_pc_match
+001b79 3aca            cpi   yl,low(brkpt_hi)
+001b7a f789         loopne   br_pc_adr
+                 br_chkp_exit:
+001b7b 91df         pop   yh
+001b7c 91cf         pop   yl
+001b7d 9508         ret
+                 ;
+                 ; check write memory to breakpoint address
+                 ;     expects current address in z
+                 ;     on match saves a as original opcode
+                 ;      "   "   replaces a with STP opcode
+                 ;     uses c
+                 ;
+                 brkpt_chk_write:
+001b7e 93cf         push  yl
+001b7f 93df         push  yh
+001b80 eac0         ldi   yl,low(brkpt_lo)  ;match breakpoint address
+001b81 e0d0         ldi   yh,high(brkpt_lo)
+                    do       br_chkw_adr
+001b82 9009            ld    c,y+              ;brkpt_lo match?
+001b83 160e            cp    c,zl
+001b84 f451            ifeq_and br_slotw_match
+001b85 8409            ldd   c,y+9             ;brkpt_hi match?
+001b86 160f            cp    c,zh
+001b87 f439            ifeq     br_slotw_match
+001b88 15e5               cp    zl,allon
+001b89 f411               ifne_or  br_slotw_valid
+001b8a 15f5               cp    zh,allon
+001b8b f011               ifne     br_slotw_valid
+001b8c 8b0b                  std   y+19,a            ;save original opcode
+001b8d ed0b                  ldi   a,0xdb            ;write STP opcode to memory
+                          end      br_slotw_valid
+001b8e c002               rjmp  br_chkw_exit
+                       end      br_slotw_match
+001b8f 3aca            cpi   yl,low(brkpt_hi)
+001b90 f789         loopne   br_chkw_adr
+                 br_chkw_exit:
+001b91 91df         pop   yh
+001b92 91cf         pop   yl
+001b93 9508         ret
+                 ;
+                 ;*****************************************************************
+                 ;
+                 ; load and EEPROM save
+                 ;
+                 ;*****************************************************************
+                 ;
+                 ; RS232 read from RX fifo or direct and exit on <ESC>
+                 ;     uses d, (i with cli)
+                 ;     updates checksum in xh
+                 ;     returns data in a
+                 ;
+                 read_serial_esc:
+001b94 93cf         push  yl
+001b95 93df         push  yh
+                 ;   push  c
+                    do    wait_ser_data
+001b96 b61f            in    d,sreg      ;preserve sreg interrupt enable
+001b97 94f8            cli
+001b98 9120 00d7       lds   i,rx_fill   ;check buffer
+001b9a 2322            tst   i
+001b9b f0b1            ifne  esc_read_buf
+001b9c 91c0 00d6          lds   yl,rx_inx      ;prepare address to read rx fifo
+001b9e e0d2               ldi   yh,high(rx_buf)
+001b9f 1bc2               sub   yl,i
+001ba0 8108               ld    a,y            ;read
+001ba1 952a               dec   i              ;update pointer
+001ba2 9320 00d7          sts   rx_fill,i
+                          .ifdef flowlo
+                 ;            mov   i,c
+001ba4 3820                  cpi   i,flowlo          ;buffer lower watermark?
+001ba5 f448                  iflo  esc_flow
+001ba6 9120 00d8                lds   i,flow_cmd
+001ba8 3921                     cpi   i,0x91         ;xon done?
+001ba9 f029                     ifne  esc_send_xon
+001baa e121                        ldi   i,0x11         ;post xon pending
+001bab 9320 00d8                   sts   flow_cmd,i
+001bad eb28                        ldi   i,usart_txi_ena ;notify transmitter
+001bae b92a                        out   ucsrb,i
+                                   .ifdef irq_dis_real
+                                   .endif
+                                end  esc_send_xon
+                             end   esc_flow
+                          .endif
+001baf be1f               out   sreg,d
+001bb0 c008               exit  wait_ser_data
+001bb1 c006            else  esc_read_buf
+001bb2 be1f               out   sreg,d
+001bb3 f027               ifid_and  esc_read_direct
+001bb4 9b5f               sbis  ucsra,rxc      
+001bb5 c002               ifs       esc_read_direct
+001bb6 b10c                  in    a,udr        ;read direct if disabled & buffer empty
+001bb7 c001                  exit  wait_ser_data
+                          end       esc_read_direct
+                       end   esc_read_buf
+001bb8 cfdd         loop  wait_ser_data
+                 ;   pop   c
+001bb9 91df         pop   yh
+001bba 91cf         pop   yl
+001bbb 310b         cpi   a,27
+001bbc f471         ifeq  read_abort
+                       .ifdef eep_vld
+001bbd 9100 009f          lds   a,prog_num     ;I2C close required?
+001bbf 3f0f               cpi   a,0xff
+001bc0 f429               ifeq  esc_read_load
+001bc1 e5e6
+001bc2 e0f1
+001bc3 ddbf                  PrintStr load_abort  ;" Load aborted"
+001bc4 c060                  rjmp  skip_main
+001bc5 c005               else  esc_read_load
+001bc6 ede8
+001bc7 e2f9
+001bc8 ddba                  PrintStr save_abort  ;" Save aborted"
+                 eep_close_err:             ;close SPI/I2C after abort or error
+001bc9 940c 133a             jmp  eep_write_err
+                          end   esc_read_load
+                       .else
+                       .endif
+                    end  read_abort
+001bcb 9508      ret
+                 
+                 ;load hex nibble
+                 load_hex:
+001bcc dfc7         rcall read_serial_esc
+001bcd 5300         subi  a,'0'           ;hex 0-9
+001bce 300a         cpi   a,10
+001bcf f028         ifsh  load_a_f
+001bd0 3101            cpi   a,17         ;non hex >0 <A
+001bd1 f020            brlo  inv_hex
+001bd2 5007            subi  a,'A'-'0'-10 ;hex A-F
+001bd3 3100            cpi   a,16         ;non hex >F
+001bd4 f408            brsh  inv_hex
+                    end   load_a_f
+001bd5 9508         ret
+                 ;non hex message
+                 inv_hex:
+001bd6 eeee
+001bd7 e0f1
+001bd8 ddaa         PrintStr err_nonhex  ;" Non-Hex data in record"
+                 .ifdef eep_vld
+001bd9 9100 009f    lds   a,prog_num     ;SPI/I2C close required?
+001bdb 3f0f         cpi   a,0xff
+001bdc f761         brne  eep_close_err
+                 .endif
+                 ;
+                 ; RS232 discard from RX fifo or direct with escape timer
+                 ;     uses a, d, (i with cli)
+                 ;
+                 ; wait for eof (skip remaining records)
+                 discard_serial_stream:
+001bdd e0c6         ldi   yl,6        ;continuous data within 50ms will be discarded
+001bde 93c0 0092    sts   cmd_esc_timer,yl
+                    do    discard_serial
+001be0 b61f            in    d,sreg      ;preserve sreg interrupt enable
+001be1 94f8            cli
+001be2 9120 00d7       lds   i,rx_fill   ;check buffer
+001be4 2322            tst   i
+001be5 f0e1            ifne  disc_read_buf
+001be6 91c0 00d6          lds   yl,rx_inx      ;prepare address to read rx fifo
+001be8 e0d2               ldi   yh,high(rx_buf)
+001be9 19c0               sub   yl,c
+001bea 8108               ld    a,y            ;read
+001beb 952a               dec   i              ;update pointer
+001bec 9320 00d7          sts   rx_fill,i
+                          .ifdef flowlo
+                 ;            mov   i,c
+001bee 3820                  cpi   i,flowlo          ;buffer lower watermark?
+001bef f448                  iflo  disc_flow
+001bf0 9120 00d8                lds   i,flow_cmd
+001bf2 3921                     cpi   i,0x91         ;xon done?
+001bf3 f029                     ifne  disc_send_xon
+001bf4 e121                        ldi   i,0x11         ;post xon pending
+001bf5 9320 00d8                   sts   flow_cmd,i
+001bf7 eb28                        ldi   i,usart_txi_ena ;notify transmitter
+001bf8 b92a                        out   ucsrb,i
+                                   .ifdef irq_dis_real
+                                   .endif
+                                end  disc_send_xon
+                             end   disc_flow
+                          .endif
+001bf9 be1f               out   sreg,d
+001bfa e0c6               ldi   yl,6           ;further characters
+001bfb 93c0 0092          sts   cmd_esc_timer,yl
+001bfd 300d               cpi   a,13           ;EOL
+001bfe f411               ifeq  disc_read_keepalive
+001bff e000                  ldi   a,0
+001c00 dd91                  rcall PrintChr
+                          end   disc_read_keepalive
+001c01 c00c            else  disc_read_buf
+001c02 be1f               out   sreg,d
+001c03 f057               ifid_and  disc_read_direct
+001c04 9b5f               sbis  ucsra,rxc      
+001c05 c008               ifs       disc_read_direct
+001c06 b10c                  in    a,udr       ;read direct if disabled & buffer empty
+001c07 e0c6                  ldi   yl,6        ;further characters
+001c08 93c0 0092             sts   cmd_esc_timer,yl
+001c0a 300d                  cpi   a,13
+001c0b f411                  ifeq  disc_read_keepalive2
+001c0c e000                     ldi   a,0
+001c0d dd84                     rcall PrintChr
+                             end   disc_read_keepalive2
+                          end       disc_read_direct
+                       end   disc_read_buf
+001c0e f077            ifid_and disc_timer_update ;disabled timer update 
+001c0f b7d8            in    yh,tifr
+001c10 ffd1            sbrs  yh,ocf0
+001c11 c00b            ifs      disc_timer_update
+001c12 e0d2               ldi   yh,0b10           ;clear t1 oc flag
+001c13 bfd8               out   tifr,yh
+001c14 91c0 0092          lds   yl,cmd_esc_timer  ;test escape timer expired
+001c16 77cf               andi  yl,0x7f
+001c17 f029               ifne  disc_esc_timer_update
+001c18 91c0 0092             lds   yl,cmd_esc_timer
+001c1a 95ca                  dec   yl
+001c1b 93c0 0092             sts   cmd_esc_timer,yl
+                          end   disc_esc_timer_update
+                       end      disc_timer_update
+001c1d 91c0 0092       lds   yl,cmd_esc_timer
+001c1f 23cc            tst   yl
+001c20 f009         exiteq   discard_serial
+001c21 cfbe         loop     discard_serial
+001c22 e8c0         ldi   yl,0x80           ;re-init
+001c23 93c0 0092    sts   cmd_esc_timer,yl
+                 ; return to mainloop
+                 skip_main:
+                    .ifdef eep_vld
+001c25 940e 134b       call eep_close
+                    .else
+                    .endif
+001c27 9100 009a    lds   a,sp_save         ;restore sp to main loop
+001c29 bf0d         out   spl,a
+001c2a 9100 009b    lds   a,sp_save+1
+001c2c bf0e         out   sph,a
+001c2d fd32         sbrc  flags,deb_act     ;on error
+001c2e cd16            rjmp  end_command       ;debugger or
+001c2f dd4f         rcall crlf 
+001c30 cd1e         rjmp  end_exit          ;next instruction
+                 ;
+                 ; Read Hex Byte from RX fifo or direct and exit on <ESC>
+                 read_byte_esc:
+                    ;push  c
+001c31 df9a         rcall load_hex       ;high nibble
+001c32 9502         swap  a        
+001c33 2e00         mov   c,a
+001c34 df97         rcall load_hex       ;low nibble
+001c35 2900         or    a,c
+                    ;pop   c
+001c36 0fb0         add   xh,a           ;update checksum
+001c37 9508         ret
+                 
+                 .ifdef eep_vld
+                 ; EEPROM info - show directory
+                 eep_cmd_info:
+001c38 e3e2
+001c39 e2f9
+001c3a dd48         PrintStr eep_info2   ;" - "
+001c3b 2400         clr   c              ;count free slots
+001c3c 2700         clr   a
+001c3d ba6f         out   eearh,one
+                    do       eep_get_free
+001c3e ba0e            out   eearl,c
+001c3f ba6c            out   eecr,one
+001c40 b31d            in    b,eedr
+001c41 1515            cp    b,allon
+001c42 f429            ifeq  eep_inc_free
+001c43 9503               inc   a           ;+1 for every free block
+001c44 f419               ifeq  eep_100_free
+001c45 e301                  ldi   a,'1'       ;0x100 free slots
+001c46 dd4b                  rcall PrintChr
+001c47 2700                  clr   a
+                          end   eep_100_free
+                       end   eep_inc_free
+001c48 9403            inc   c   
+001c49 f7a1         loopne   eep_get_free
+001c4a dd3e         rcall PrintHex       ;2 digits free slots
+001c4b e3e6
+001c4c e2f9
+001c4d dd35         PrintStr eep_info3   ;" slots free"
+001c4e e0e1         ldi   zl,1           ;progs/line, next index
+001c4f 2711         clr   b              ;lowest prog# not listed
+                    do    eep_list
+001c50 ef0f            ldi   a,0xff         ;prog#, max to init
+                       do    eep_pslots
+001c51 ba0e               out   eearl,c        ;scan all slots
+001c52 ba6c               out   eecr,one
+001c53 b21d               in    d,eedr
+001c54 1611               cp    d,b            ;not already listed?
+001c55 f030               ifsh  eep_next
+001c56 1610                  cp    d,a            ;count same, new if lower
+001c57 f409                  ifeq  eep_inc_same
+001c58 95c3                     inc   yl             ;count slots
+                             end   eep_inc_same
+001c59 f410                  iflo  eep_find_low
+001c5a e0c1                     ldi   yl,1           ;1st slot
+001c5b 2d01                     mov   a,d            ;new lowest prog# to list
+                             end   eep_find_low
+                          end   eep_next
+001c5c 9403               inc   c                 ;loop for 256 slots
+001c5d f799            loopne   eep_pslots
+001c5e 3f0f            cpi   a,0xff            ;no more progs to list
+001c5f f081          exiteq  eep_list
+001c60 2f10            mov   b,a
+001c61 95ea            dec   zl                ;max progs per line?
+001c62 f429            ifeq  eep_list_index
+001c63 e4e2
+001c64 e2f9
+001c65 dd1d               PrintStr eep_info4   ;"prog#/slots  "
+001c66 e0ea               ldi   zl,10          ;next 10 progs on this line
+001c67 2f01               mov   a,b            ;restore a
+                       end   eep_list_index
+001c68 9513            inc   b                 ;next lowest prog#
+001c69 dd1f            rcall PrintHex          ;prog#
+001c6a e20f            ldi   a,'/'
+001c6b dd26            rcall PrintChr
+001c6c 2f0c            mov   a,yl
+001c6d dd1b            rcall PrintHex          ;slotcount
+001c6e dd0c            rcall space
+001c6f cfe0         loop     eep_list
+001c70 ba7f         out   eearh,zero     ;protect eep from unintentional writes
+001c71 ba7e         out   eearl,zero
+001c72 9508         ret
+                    
+                 eep_auto_info:
+001c73 e1ee
+001c74 e2f9
+001c75 dd0d         PrintStr eep_info1   ;crlf,"EEPROM autoload "
+001c76 ba7f         out   eearh,zero     ;read eep autoload byte
+001c77 ba5e         out   eearl,allon
+001c78 ba6c         out   eecr,one
+001c79 b30d         in    a,eedr
+001c7a 3f0f         cpi   a,0xff         ;test autoload program set
+001c7b f421         ifeq  eep_no_auto
+001c7c e5e2
+001c7d e2f9
+001c7e dd04            PrintStr eep_none    ;"none"
+001c7f c014         else  eep_no_auto
+001c80 dd08            rcall PrintHex       ;program number
+001c81 2c06            mov   c,one             ;beginning of string
+001c82 ba0e            out   eearl,c
+001c83 ba6c            out   eecr,one
+001c84 b31d            in    b,eedr
+001c85 3f1f            cpi   b,0xff         ;string present?
+001c86 f069            ifne  eep_auto_info_string
+001c87 dcf3               rcall space
+001c88 e202               ldi   a,34           ;quote
+001c89 dd08               rcall PrintChr
+001c8a 2f01               mov   a,b
+                          do       eep_auto_info_str2
+001c8b dd06                  rcall PrintChr
+001c8c 9403                  inc   c
+001c8d ba0e                  out   eearl,c
+001c8e ba6c                  out   eecr,one
+001c8f b30d                  in    a,eedr
+001c90 3f0f                  cpi   a,0xff         ;string end?
+001c91 f7c9               loopne   eep_auto_info_str2
+001c92 e202               ldi   a,34
+001c93 dcfe               rcall PrintChr
+                       end   eep_auto_info_string
+                    end   eep_no_auto
+001c94 9508         ret
+                 
+                 ; internal EEPROM write byte
+                 eep_auto_write:
+001c95 bb0d         out   eedr,a
+001c96 b60f         in    c,sreg         ;atomic write sequence
+001c97 94f8         cli
+001c98 9ae2         sbi   eecr,eemwe
+001c99 9ae1         sbi   eecr,eewe
+001c9a be0f         out   sreg,c
+                    do    eep_auto_wait  ;write complete?
+001c9b 99e1            sbic  eecr,eewe
+001c9c cffe         loop  eep_auto_wait
+001c9d 9508         ret
+                 .endif
+                 
+                 ; Messages part 2 (part 1 moved before opcode table to reduce empty space)
+                 ;                              word count, X = don't use in part 1 ---> ;##
+                 .ifdef cmos_core
+                 .else
+001c9e 6c49
+001c9f 656c
+001ca0 6167
+001ca1 206c
+001ca2 704f
+001ca3 6f63
+001ca4 6564
+001ca5 0020      inv_instr:     .db   "Illegal Opcode ",0                                ; X
+                 .endif
+001ca6 0a0d
+001ca7 0a0d
+001ca8 364e
+001ca9 3035
+001caa 2032
+001cab 6d45
+001cac 6c75
+001cad 7461
+001cae 726f
+001caf 5620
+001cb0 2e30
+001cb1 3338
+001cb2 0062      emu_msg:       .db   13,10,13,10,core_string," Emulator V",version,0    ; X
+001cb3 6220
+001cb4 6975
+001cb5 746c
+001cb6 4620
+001cb7 6265
+001cb8 3220
+001cb9 2035
+001cba 3032
+001cbb 3631
+001cbc 3120
+001cbd 3a30
+001cbe 3535
+001cbf 353a
+001cc0 0037      built_msg:     .db   " built ",__DATE__," ",__TIME__,0                  ;14
+                 ;load_wait:     .db   13,10,"Loading, <ESC> to abort",13,10,0            ;14
+                 ;load_abort:    .db   " Load aborted",0                                  ; 7
+001cc1 4320
+001cc2 6568
+001cc3 6b63
+001cc4 7573
+001cc5 206d
+001cc6 6166
+001cc7 6c69
+001cc8 6465
+001cc9 0000      err_chksum:    .db   " Checksum failed",0,0                             ; 9
+                 ;rs_vect_empty: .db   13,10,"Check reset vector",0,0                     ;11
+                 ;reset_msg:     .db   "  Reset",0                                        ; 4
+                 ;bpt_clrd_msg:  .db   10,13,"All breakpoints cleared",0                  ;13
+                 ;bpt_info:      .db   10,13,"Breakpoints  (slot#:address)",13,10,0,0     ;17
+001cca 0d0a
+001ccb 6f4e
+001ccc 6220
+001ccd 6572
+001cce 6b61
+001ccf 6f70
+001cd0 6e69
+001cd1 7374
+001cd2 6120
+001cd3 7463
+001cd4 7669
+001cd5 0065      bpt_info_none: .db   10,13,"No breakpoints active",0                    ;12
+                 ;bpt_slot_full: .db   10,13,"No more breakpoint slots available",0,0     ;19
+                 .ifdef irq_dis_real    ;more messages not in part 1
+                 .endif
+                 
+                 
+                 ;verify minimum versions of includes
+                 ;required versions
+                 .if   io_version < 831
+                 .endif
+                 .ifdef   cmos_core
+                    .if   core_version < 831
+                    .endif
+                 .else
+                    .if   core_version < 831
+                    .endif
+                 .endif
+                 .if   config_version < 830
+                 .endif
+                 .if   sam_version < 810
+                 .endif
+                 ;above base versions
+                 .if   io_version > 832
+                 .endif
+                 .ifdef   cmos_core
+                    .if   core_version > 832
+                    .endif
+                 .else
+                    .if   core_version > 832
+                    .endif
+                 .endif
+                 .if   config_version > 832
+                 .endif
+                 .if   sam_version > 832
+                 .endif
+                 ;recommended versions
+                 .if   io_version < 832
+                 .endif
+                 .ifdef   cmos_core
+                    .if   core_version < 831
+                    .endif
+                 .else
+                    .if   core_version < 831
+                    .endif
+                 .endif
+                 .if   config_version < 830
+                 .endif
+                 .if   sam_version < 810
+                 .endif
+
+
+RESOURCE USE INFORMATION
+------------------------
+
+Notice:
+The register and instruction counts are symbol table hit counts,
+and hence implicitly used resources are not counted, eg, the
+'lpm' instruction without operands implicitly uses r0 and z,
+none of which are counted.
+
+x,y,z are separate entities in the symbol table and are
+counted separately from r26..r31 here.
+
+.dseg memory usage only counts static data declared with .byte
+
+ATmega32 register use summary:
+r0 : 123 r1 :  71 r2 :  20 r3 :   8 r4 :  27 r5 :  93 r6 :  43 r7 : 191 
+r8 :  56 r9 :  33 r10: 145 r11:  45 r12:  64 r13:  45 r14:  32 r15:   6 
+r16: 884 r17: 237 r18: 106 r19: 129 r20:   0 r21:  34 r22:  42 r23:  96 
+r24: 343 r25: 340 r26:  55 r27:  33 r28: 460 r29: 256 r30: 285 r31: 160 
+x  :  11 y  :  96 z  :  31 
+Registers used: 34 out of 35 (97.1%)
+
+ATmega32 instruction use summary:
+.lds  :   0 .sts  :   0 adc   :  50 add   :  74 adiw  : 175 and   :  16 
+andi  :  60 asr   :   0 bclr  :   0 bld   :  15 brbc  : 196 brbs  : 118 
+brcc  :   3 brcs  :   4 break :   0 breq  :  26 brge  :   0 brhc  :   0 
+brhs  :   2 brid  :   0 brie  :   0 brlo  :   4 brlt  :   0 brmi  :   0 
+brne  :  44 brpl  :   0 brsh  :   2 brtc  :   1 brts  :  21 brvc  :   0 
+brvs  :   0 bset  :   0 bst   :  24 call  :   8 cbi   :  41 cbr   :  86 
+clc   :   5 clh   :   0 cli   :  84 cln   :   0 clr   :  77 cls   :   0 
+clt   :   5 clv   :   0 clz   :   0 com   :   1 cp    :  38 cpc   :   0 
+cpi   : 198 cpse  :  13 dec   :  73 eor   :  11 fmul  :   0 fmuls :   0 
+fmulsu:   0 icall :   0 ijmp  :  74 in    : 413 inc   :  58 jmp   :  22 
+ld    :  52 ldd   :  11 ldi   : 480 lds   : 165 lpm   :  20 lsl   :   9 
+lsr   :   2 mov   : 151 movw  :  10 mul   :   0 muls  :   0 mulsu :   0 
+neg   :   0 nop   :  78 or    :  14 ori   :   6 out   :1116 pop   :  29 
+push  :  21 rcall : 340 ret   :  64 reti  :   7 rjmp  : 830 rol   :   8 
+ror   :   2 sbc   :   2 sbci  :   3 sbi   :  83 sbic  :  12 sbis  :  32 
+sbiw  :  21 sbr   :  68 sbrc  :  56 sbrs  :  35 sec   :   5 seh   :   0 
+sei   :  75 sen   :   0 ser   :   0 ses   :   0 set   :   3 sev   :   0 
+sez   :   0 sleep :   0 spm   :   0 st    :  15 std   :   4 sts   : 163 
+sub   :   7 subi  :  34 swap  :  10 tst   :  65 wdr   :   0 
+Instructions used: 75 out of 113 (66.4%)
+
+ATmega32 memory use summary [bytes]:
+Segment   Begin    End      Code   Data   Used    Size   Use%
+---------------------------------------------------------------
+[.cseg] 0x000000 0x0039ac  13002   1716  14718   32768  44.9%
+[.dseg] 0x000060 0x000300      0    633    633    2048  30.9%
+[.eseg] 0x000001 0x000200      0    307    307    1024  30.0%
+
+Assembly complete, 0 errors, 0 warnings
diff --git a/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_emu.map b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_emu.map
new file mode 100644
index 00000000..10a48357
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_emu.map
@@ -0,0 +1,2064 @@
+
+AVRASM ver. 2.1.43  6502_emu.asm Thu Feb 25 10:55:57 2016
+
+
+SET  sam_version  0000032a
+SET  config_part  00000002
+SET  config_version 0000033f
+EQU  SIGNATURE_000 0000001e
+EQU  SIGNATURE_001 00000095
+EQU  SIGNATURE_002 00000002
+EQU  SREG         0000003f
+EQU  SPL          0000003d
+EQU  SPH          0000003e
+EQU  OCR0         0000003c
+EQU  GICR         0000003b
+EQU  GIFR         0000003a
+EQU  TIMSK        00000039
+EQU  TIFR         00000038
+EQU  SPMCR        00000037
+EQU  TWCR         00000036
+EQU  MCUCR        00000035
+EQU  MCUCSR       00000034
+EQU  TCCR0        00000033
+EQU  TCNT0        00000032
+EQU  OSCCAL       00000031
+EQU  OCDR         00000031
+EQU  SFIOR        00000030
+EQU  TCCR1A       0000002f
+EQU  TCCR1B       0000002e
+EQU  TCNT1L       0000002c
+EQU  TCNT1H       0000002d
+EQU  OCR1AL       0000002a
+EQU  OCR1AH       0000002b
+EQU  OCR1BL       00000028
+EQU  OCR1BH       00000029
+EQU  ICR1L        00000026
+EQU  ICR1H        00000027
+EQU  TCCR2        00000025
+EQU  TCNT2        00000024
+EQU  OCR2         00000023
+EQU  ASSR         00000022
+EQU  WDTCR        00000021
+EQU  UBRRH        00000020
+EQU  UCSRC        00000020
+EQU  EEARL        0000001e
+EQU  EEARH        0000001f
+EQU  EEDR         0000001d
+EQU  EECR         0000001c
+EQU  PORTA        0000001b
+EQU  DDRA         0000001a
+EQU  PINA         00000019
+EQU  PORTB        00000018
+EQU  DDRB         00000017
+EQU  PINB         00000016
+EQU  PORTC        00000015
+EQU  DDRC         00000014
+EQU  PINC         00000013
+EQU  PORTD        00000012
+EQU  DDRD         00000011
+EQU  PIND         00000010
+EQU  SPDR         0000000f
+EQU  SPSR         0000000e
+EQU  SPCR         0000000d
+EQU  UDR          0000000c
+EQU  UCSRA        0000000b
+EQU  UCSRB        0000000a
+EQU  UBRRL        00000009
+EQU  ACSR         00000008
+EQU  ADMUX        00000007
+EQU  ADCSRA       00000006
+EQU  ADCH         00000005
+EQU  ADCL         00000004
+EQU  TWDR         00000003
+EQU  TWAR         00000002
+EQU  TWSR         00000001
+EQU  TWBR         00000000
+EQU  EEDR0        00000000
+EQU  EEDR1        00000001
+EQU  EEDR2        00000002
+EQU  EEDR3        00000003
+EQU  EEDR4        00000004
+EQU  EEDR5        00000005
+EQU  EEDR6        00000006
+EQU  EEDR7        00000007
+EQU  EERE         00000000
+EQU  EEWE         00000001
+EQU  EEMWE        00000002
+EQU  EERIE        00000003
+EQU  WDP0         00000000
+EQU  WDP1         00000001
+EQU  WDP2         00000002
+EQU  WDE          00000003
+EQU  WDTOE        00000004
+EQU  WDDE         00000004
+EQU  GIMSK        0000003b
+EQU  IVCE         00000000
+EQU  IVSEL        00000001
+EQU  INT2         00000005
+EQU  INT0         00000006
+EQU  INT1         00000007
+EQU  INTF2        00000005
+EQU  INTF0        00000006
+EQU  INTF1        00000007
+EQU  ISC00        00000000
+EQU  ISC01        00000001
+EQU  ISC10        00000002
+EQU  ISC11        00000003
+EQU  ISC2         00000006
+EQU  CS00         00000000
+EQU  CS01         00000001
+EQU  CS02         00000002
+EQU  WGM01        00000003
+EQU  CTC0         00000003
+EQU  COM00        00000004
+EQU  COM01        00000005
+EQU  WGM00        00000006
+EQU  PWM0         00000006
+EQU  FOC0         00000007
+EQU  TCNT0_0      00000000
+EQU  TCNT0_1      00000001
+EQU  TCNT0_2      00000002
+EQU  TCNT0_3      00000003
+EQU  TCNT0_4      00000004
+EQU  TCNT0_5      00000005
+EQU  TCNT0_6      00000006
+EQU  TCNT0_7      00000007
+EQU  OCR0_0       00000000
+EQU  OCR0_1       00000001
+EQU  OCR0_2       00000002
+EQU  OCR0_3       00000003
+EQU  OCR0_4       00000004
+EQU  OCR0_5       00000005
+EQU  OCR0_6       00000006
+EQU  OCR0_7       00000007
+EQU  TOIE0        00000000
+EQU  OCIE0        00000001
+EQU  TOV0         00000000
+EQU  OCF0         00000001
+EQU  TOIE2        00000006
+EQU  OCIE2        00000007
+EQU  TOV2         00000006
+EQU  OCF2         00000007
+EQU  CS20         00000000
+EQU  CS21         00000001
+EQU  CS22         00000002
+EQU  WGM21        00000003
+EQU  CTC2         00000003
+EQU  COM20        00000004
+EQU  COM21        00000005
+EQU  WGM20        00000006
+EQU  PWM2         00000006
+EQU  FOC2         00000007
+EQU  TCNT2_0      00000000
+EQU  TCNT2_1      00000001
+EQU  TCNT2_2      00000002
+EQU  TCNT2_3      00000003
+EQU  TCNT2_4      00000004
+EQU  TCNT2_5      00000005
+EQU  TCNT2_6      00000006
+EQU  TCNT2_7      00000007
+EQU  OCR2_0       00000000
+EQU  OCR2_1       00000001
+EQU  OCR2_2       00000002
+EQU  OCR2_3       00000003
+EQU  OCR2_4       00000004
+EQU  OCR2_5       00000005
+EQU  OCR2_6       00000006
+EQU  OCR2_7       00000007
+EQU  TCR2UB       00000000
+EQU  OCR2UB       00000001
+EQU  TCN2UB       00000002
+EQU  AS2          00000003
+EQU  TOIE1        00000002
+EQU  OCIE1B       00000003
+EQU  OCIE1A       00000004
+EQU  TICIE1       00000005
+EQU  TOV1         00000002
+EQU  OCF1B        00000003
+EQU  OCF1A        00000004
+EQU  ICF1         00000005
+EQU  WGM10        00000000
+EQU  PWM10        00000000
+EQU  WGM11        00000001
+EQU  PWM11        00000001
+EQU  FOC1B        00000002
+EQU  FOC1A        00000003
+EQU  COM1B0       00000004
+EQU  COM1B1       00000005
+EQU  COM1A0       00000006
+EQU  COM1A1       00000007
+EQU  CS10         00000000
+EQU  CS11         00000001
+EQU  CS12         00000002
+EQU  WGM12        00000003
+EQU  CTC10        00000003
+EQU  CTC1         00000003
+EQU  WGM13        00000004
+EQU  CTC11        00000004
+EQU  ICES1        00000006
+EQU  ICNC1        00000007
+EQU  SPDR0        00000000
+EQU  SPDR1        00000001
+EQU  SPDR2        00000002
+EQU  SPDR3        00000003
+EQU  SPDR4        00000004
+EQU  SPDR5        00000005
+EQU  SPDR6        00000006
+EQU  SPDR7        00000007
+EQU  SPI2X        00000000
+EQU  WCOL         00000006
+EQU  SPIF         00000007
+EQU  SPR0         00000000
+EQU  SPR1         00000001
+EQU  CPHA         00000002
+EQU  CPOL         00000003
+EQU  MSTR         00000004
+EQU  DORD         00000005
+EQU  SPE          00000006
+EQU  SPIE         00000007
+EQU  UDR0         00000000
+EQU  UDR1         00000001
+EQU  UDR2         00000002
+EQU  UDR3         00000003
+EQU  UDR4         00000004
+EQU  UDR5         00000005
+EQU  UDR6         00000006
+EQU  UDR7         00000007
+EQU  USR          0000000b
+EQU  MPCM         00000000
+EQU  U2X          00000001
+EQU  UPE          00000002
+EQU  PE           00000002
+EQU  DOR          00000003
+EQU  FE           00000004
+EQU  UDRE         00000005
+EQU  TXC          00000006
+EQU  RXC          00000007
+EQU  UCR          0000000a
+EQU  TXB8         00000000
+EQU  RXB8         00000001
+EQU  UCSZ2        00000002
+EQU  CHR9         00000002
+EQU  TXEN         00000003
+EQU  RXEN         00000004
+EQU  UDRIE        00000005
+EQU  TXCIE        00000006
+EQU  RXCIE        00000007
+EQU  UCPOL        00000000
+EQU  UCSZ0        00000001
+EQU  UCSZ1        00000002
+EQU  USBS         00000003
+EQU  UPM0         00000004
+EQU  UPM1         00000005
+EQU  UMSEL        00000006
+EQU  URSEL        00000007
+EQU  UBRRHI       00000020
+EQU  ACME         00000003
+EQU  ACIS0        00000000
+EQU  ACIS1        00000001
+EQU  ACIC         00000002
+EQU  ACIE         00000003
+EQU  ACI          00000004
+EQU  ACO          00000005
+EQU  ACBG         00000006
+EQU  ACD          00000007
+EQU  MUX0         00000000
+EQU  MUX1         00000001
+EQU  MUX2         00000002
+EQU  MUX3         00000003
+EQU  MUX4         00000004
+EQU  ADLAR        00000005
+EQU  REFS0        00000006
+EQU  REFS1        00000007
+EQU  ADCSR        00000006
+EQU  ADPS0        00000000
+EQU  ADPS1        00000001
+EQU  ADPS2        00000002
+EQU  ADIE         00000003
+EQU  ADIF         00000004
+EQU  ADATE        00000005
+EQU  ADFR         00000005
+EQU  ADSC         00000006
+EQU  ADEN         00000007
+EQU  ADCH0        00000000
+EQU  ADCH1        00000001
+EQU  ADCH2        00000002
+EQU  ADCH3        00000003
+EQU  ADCH4        00000004
+EQU  ADCH5        00000005
+EQU  ADCH6        00000006
+EQU  ADCH7        00000007
+EQU  ADCL0        00000000
+EQU  ADCL1        00000001
+EQU  ADCL2        00000002
+EQU  ADCL3        00000003
+EQU  ADCL4        00000004
+EQU  ADCL5        00000005
+EQU  ADCL6        00000006
+EQU  ADCL7        00000007
+EQU  ADTS0        00000005
+EQU  ADTS1        00000006
+EQU  ADTS2        00000007
+EQU  PORTA0       00000000
+EQU  PA0          00000000
+EQU  PORTA1       00000001
+EQU  PA1          00000001
+EQU  PORTA2       00000002
+EQU  PA2          00000002
+EQU  PORTA3       00000003
+EQU  PA3          00000003
+EQU  PORTA4       00000004
+EQU  PA4          00000004
+EQU  PORTA5       00000005
+EQU  PA5          00000005
+EQU  PORTA6       00000006
+EQU  PA6          00000006
+EQU  PORTA7       00000007
+EQU  PA7          00000007
+EQU  DDA0         00000000
+EQU  DDA1         00000001
+EQU  DDA2         00000002
+EQU  DDA3         00000003
+EQU  DDA4         00000004
+EQU  DDA5         00000005
+EQU  DDA6         00000006
+EQU  DDA7         00000007
+EQU  PINA0        00000000
+EQU  PINA1        00000001
+EQU  PINA2        00000002
+EQU  PINA3        00000003
+EQU  PINA4        00000004
+EQU  PINA5        00000005
+EQU  PINA6        00000006
+EQU  PINA7        00000007
+EQU  PORTB0       00000000
+EQU  PB0          00000000
+EQU  PORTB1       00000001
+EQU  PB1          00000001
+EQU  PORTB2       00000002
+EQU  PB2          00000002
+EQU  PORTB3       00000003
+EQU  PB3          00000003
+EQU  PORTB4       00000004
+EQU  PB4          00000004
+EQU  PORTB5       00000005
+EQU  PB5          00000005
+EQU  PORTB6       00000006
+EQU  PB6          00000006
+EQU  PORTB7       00000007
+EQU  PB7          00000007
+EQU  DDB0         00000000
+EQU  DDB1         00000001
+EQU  DDB2         00000002
+EQU  DDB3         00000003
+EQU  DDB4         00000004
+EQU  DDB5         00000005
+EQU  DDB6         00000006
+EQU  DDB7         00000007
+EQU  PINB0        00000000
+EQU  PINB1        00000001
+EQU  PINB2        00000002
+EQU  PINB3        00000003
+EQU  PINB4        00000004
+EQU  PINB5        00000005
+EQU  PINB6        00000006
+EQU  PINB7        00000007
+EQU  PORTC0       00000000
+EQU  PC0          00000000
+EQU  PORTC1       00000001
+EQU  PC1          00000001
+EQU  PORTC2       00000002
+EQU  PC2          00000002
+EQU  PORTC3       00000003
+EQU  PC3          00000003
+EQU  PORTC4       00000004
+EQU  PC4          00000004
+EQU  PORTC5       00000005
+EQU  PC5          00000005
+EQU  PORTC6       00000006
+EQU  PC6          00000006
+EQU  PORTC7       00000007
+EQU  PC7          00000007
+EQU  DDC0         00000000
+EQU  DDC1         00000001
+EQU  DDC2         00000002
+EQU  DDC3         00000003
+EQU  DDC4         00000004
+EQU  DDC5         00000005
+EQU  DDC6         00000006
+EQU  DDC7         00000007
+EQU  PINC0        00000000
+EQU  PINC1        00000001
+EQU  PINC2        00000002
+EQU  PINC3        00000003
+EQU  PINC4        00000004
+EQU  PINC5        00000005
+EQU  PINC6        00000006
+EQU  PINC7        00000007
+EQU  PORTD0       00000000
+EQU  PD0          00000000
+EQU  PORTD1       00000001
+EQU  PD1          00000001
+EQU  PORTD2       00000002
+EQU  PD2          00000002
+EQU  PORTD3       00000003
+EQU  PD3          00000003
+EQU  PORTD4       00000004
+EQU  PD4          00000004
+EQU  PORTD5       00000005
+EQU  PD5          00000005
+EQU  PORTD6       00000006
+EQU  PD6          00000006
+EQU  PORTD7       00000007
+EQU  PD7          00000007
+EQU  DDD0         00000000
+EQU  DDD1         00000001
+EQU  DDD2         00000002
+EQU  DDD3         00000003
+EQU  DDD4         00000004
+EQU  DDD5         00000005
+EQU  DDD6         00000006
+EQU  DDD7         00000007
+EQU  PIND0        00000000
+EQU  PIND1        00000001
+EQU  PIND2        00000002
+EQU  PIND3        00000003
+EQU  PIND4        00000004
+EQU  PIND5        00000005
+EQU  PIND6        00000006
+EQU  PIND7        00000007
+EQU  SREG_C       00000000
+EQU  SREG_Z       00000001
+EQU  SREG_N       00000002
+EQU  SREG_V       00000003
+EQU  SREG_S       00000004
+EQU  SREG_H       00000005
+EQU  SREG_T       00000006
+EQU  SREG_I       00000007
+EQU  SM0          00000004
+EQU  SM1          00000005
+EQU  SM2          00000006
+EQU  SE           00000007
+EQU  MCUSR        00000034
+EQU  PORF         00000000
+EQU  EXTRF        00000001
+EQU  BORF         00000002
+EQU  WDRF         00000003
+EQU  JTRF         00000004
+EQU  JTD          00000007
+EQU  CAL0         00000000
+EQU  CAL1         00000001
+EQU  CAL2         00000002
+EQU  CAL3         00000003
+EQU  CAL4         00000004
+EQU  CAL5         00000005
+EQU  CAL6         00000006
+EQU  CAL7         00000007
+EQU  PSR10        00000000
+EQU  PSR2         00000001
+EQU  PUD          00000002
+EQU  SPMEN        00000000
+EQU  PGERS        00000001
+EQU  PGWRT        00000002
+EQU  BLBSET       00000003
+EQU  RWWSRE       00000004
+EQU  ASRE         00000004
+EQU  RWWSB        00000006
+EQU  ASB          00000006
+EQU  SPMIE        00000007
+EQU  TWBR0        00000000
+EQU  TWBR1        00000001
+EQU  TWBR2        00000002
+EQU  TWBR3        00000003
+EQU  TWBR4        00000004
+EQU  TWBR5        00000005
+EQU  TWBR6        00000006
+EQU  TWBR7        00000007
+EQU  TWIE         00000000
+EQU  TWEN         00000002
+EQU  TWWC         00000003
+EQU  TWSTO        00000004
+EQU  TWSTA        00000005
+EQU  TWEA         00000006
+EQU  TWINT        00000007
+EQU  TWPS0        00000000
+EQU  TWPS1        00000001
+EQU  TWS3         00000003
+EQU  TWS4         00000004
+EQU  TWS5         00000005
+EQU  TWS6         00000006
+EQU  TWS7         00000007
+EQU  TWD0         00000000
+EQU  TWD1         00000001
+EQU  TWD2         00000002
+EQU  TWD3         00000003
+EQU  TWD4         00000004
+EQU  TWD5         00000005
+EQU  TWD6         00000006
+EQU  TWD7         00000007
+EQU  TWGCE        00000000
+EQU  TWA0         00000001
+EQU  TWA1         00000002
+EQU  TWA2         00000003
+EQU  TWA3         00000004
+EQU  TWA4         00000005
+EQU  TWA5         00000006
+EQU  TWA6         00000007
+EQU  LB1          00000000
+EQU  LB2          00000001
+EQU  BLB01        00000002
+EQU  BLB02        00000003
+EQU  BLB11        00000004
+EQU  BLB12        00000005
+EQU  CKSEL0       00000000
+EQU  CKSEL1       00000001
+EQU  CKSEL2       00000002
+EQU  CKSEL3       00000003
+EQU  BODEN        00000006
+EQU  BODLEVEL     00000007
+EQU  BOOTRST      00000000
+EQU  BOOTSZ0      00000001
+EQU  BOOTSZ1      00000002
+EQU  EESAVE       00000003
+EQU  SPIEN        00000005
+EQU  JTAGEN       00000006
+EQU  OCDEN        00000007
+DEF  XH           r27
+DEF  XL           r26
+DEF  YH           r29
+DEF  YL           r28
+DEF  ZH           r31
+DEF  ZL           r30
+EQU  FLASHEND     00003fff
+EQU  IOEND        0000003f
+EQU  SRAM_START   00000060
+EQU  SRAM_SIZE    00000800
+EQU  RAMEND       0000085f
+EQU  XRAMEND      00000000
+EQU  E2END        000003ff
+EQU  EEPROMEND    000003ff
+EQU  EEADRBITS    0000000a
+EQU  NRWW_START_ADDR 00003800
+EQU  NRWW_STOP_ADDR 00003fff
+EQU  RWW_START_ADDR 00000000
+EQU  RWW_STOP_ADDR 000037ff
+EQU  PAGESIZE     00000040
+EQU  FIRSTBOOTSTART 00003f00
+EQU  SECONDBOOTSTART 00003e00
+EQU  THIRDBOOTSTART 00003c00
+EQU  FOURTHBOOTSTART 00003800
+EQU  SMALLBOOTSTART 00003f00
+EQU  LARGEBOOTSTART 00003800
+EQU  INT0addr     00000002
+EQU  INT1addr     00000004
+EQU  INT2addr     00000006
+EQU  OC2addr      00000008
+EQU  OVF2addr     0000000a
+EQU  ICP1addr     0000000c
+EQU  OC1Aaddr     0000000e
+EQU  OC1Baddr     00000010
+EQU  OVF1addr     00000012
+EQU  OC0addr      00000014
+EQU  OVF0addr     00000016
+EQU  SPIaddr      00000018
+EQU  URXCaddr     0000001a
+EQU  UDREaddr     0000001c
+EQU  UTXCaddr     0000001e
+EQU  ADCCaddr     00000020
+EQU  ERDYaddr     00000022
+EQU  ACIaddr      00000024
+EQU  TWIaddr      00000026
+EQU  SPMRaddr     00000028
+EQU  INT_VECTORS_SIZE 0000002a
+EQU  Osc_Hz       00f42400
+SET  data_valid_ns 000000b4
+EQU  BAUD         00009600
+EQU  flowlo       00000080
+EQU  flowhi       000000c0
+EQU  iomap        000000bf
+EQU  phi2_ena     00000001
+EQU  nmi_ena      00000001
+EQU  ios1_default 00000081
+EQU  spi_sel      00000010
+EQU  i2c_sel      0000000e
+EQU  lcd_sel      0000000c
+EQU  spi_idle     0000001f
+EQU  spi_vat      00000001
+EQU  io_reset_pin 00000011
+EQU  eep_adr      00000003
+EQU  ena_diag     00000001
+EQU  cycle_time_tns 00000271
+EQU  ten_ms       0000009b
+EQU  UBRR_value   00000019
+EQU  Baud_error   00000001
+EQU  spi_eep_adr  00000017
+EQU  eep_vld      00000001
+DEF  c            r0
+DEF  d            r1
+DEF  e            r2
+DEF  f            r3
+DEF  k            r4
+DEF  allon        r5
+DEF  one          r6
+DEF  zero         r7
+DEF  regx         r8
+DEF  regy         r9
+DEF  operand      r10
+DEF  spointer     r11
+DEF  clear        r12
+DEF  readmem      r13
+DEF  writemem     r14
+DEF  s            r15
+DEF  a            r16
+DEF  b            r17
+DEF  i            r18
+DEF  flags        r19
+EQU  deb_on       00000000
+EQU  emu_run      00000001
+EQU  deb_act      00000002
+EQU  rvs_vid      00000003
+EQU  op_ind       00000004
+EQU  modify       00000005
+EQU  string       00000006
+EQU  dma_rpt      00000007
+DEF  unused_r20   r20
+DEF  rega         r21
+DEF  stat2        r22
+DEF  stat         r23
+DEF  pcl          r24
+DEF  pch          r25
+ESEG eep_string   00000001
+ESEG eep_auto     000000ff
+ESEG eep_pat      00000100
+DSEG cmd_buf      00000060
+DSEG cmd_end      00000090
+DSEG cmd_inx      00000091
+DSEG cmd_esc_timer 00000092
+DSEG cmd_reg_timer 00000093
+DSEG lmem_display 00000094
+DSEG lmem_write   00000096
+DSEG lmem_disas   00000098
+DSEG sp_save      0000009a
+DSEG adr_limit    0000009c
+DSEG rstflag      0000009e
+DSEG prog_num     0000009f
+DSEG brkpt_lo     000000a0
+DSEG brkpt_hi     000000aa
+DSEG brkpt_op     000000b4
+DSEG irq_mask     000000be
+DSEG irq_flag     000000bf
+DSEG timer_ena    000000c0
+DSEG t1_adr       000000c1
+DSEG t1_ctrl      000000c2
+DSEG tcdn_count   000000c3
+DSEG tcdn_top     000000c4
+DSEG selftest     000000c5
+DSEG i2c_statreg  000000c6
+DSEG lcd_flags    000000c7
+DSEG spi_cmd      000000c8
+DSEG spi_rdat     000000c9
+DSEG dma_last_cmd 000000ca
+DSEG dma_tab_index 000000cb
+DSEG dma_tab      000000cc
+DSEG usart_ena    000000d3
+DSEG tx_inx       000000d4
+DSEG tx_fill      000000d5
+DSEG rx_inx       000000d6
+DSEG rx_fill      000000d7
+DSEG flow_cmd     000000d8
+DSEG alignfromhere@align@1868 000000d9
+DSEG tx_buf       00000100
+DSEG rx_buf       00000200
+EQU  abuslo       00000018
+EQU  aloddr       00000017
+EQU  abushi       0000001b
+EQU  ahiddr       0000001a
+EQU  dbusin       00000013
+EQU  dbusout      00000015
+EQU  dbusddr      00000014
+EQU  cbusin       00000010
+EQU  cbus         00000012
+EQU  cbusddr      00000011
+EQU  ibus         0000003b
+EQU  IRQ_ena      000000c0
+EQU  IRQ_dis      00000040
+EQU  NMI_dis      00000000
+EQU  usart_txi_dis 00000098
+EQU  usart_txi_ena 000000b8
+CSEG reset        00001582
+CSEG NMI          00000367
+CSEG IRQ          00000327
+CSEG illegalint   000014fe
+CSEG t1_icr       00000dbe
+CSEG t1_ocra      00000db0
+CSEG t1_ocrb      00000db7
+CSEG t1_ovi       00000da9
+CSEG t0_cmi       00001502
+CSEG t0_ovi       00001544
+CSEG rx_int       0000002a
+CSEG tx_udre      00000072
+EQU  rx_break     0000004a
+EQU  t_rx_break   00000033
+EQU  rx_break_irq 0000003f
+EQU  t_rx_break_irq 0000003e
+EQU  l_rx_break_irq 0000003f
+EQU  rx_brk_wait  00000043
+EQU  x_rx_brk_wait 00000045
+CSEG crlf         0000197f
+EQU  l_rx_break   0000004a
+EQU  rx_no_overrun 00000056
+EQU  t_rx_no_overrun 0000004e
+EQU  l_rx_no_overrun 00000056
+EQU  rx_flow      00000062
+EQU  t_rx_flow    00000059
+EQU  rx_send_xoff 00000062
+EQU  t_rx_send_xoff 0000005d
+EQU  l_rx_send_xoff 00000062
+EQU  l_rx_flow    00000062
+EQU  rx_acia_on   0000006e
+EQU  t_rx_acia_on 00000064
+EQU  rx_int_ena   00000069
+EQU  t_rx_int_ena 00000068
+EQU  l_rx_int_ena 00000069
+EQU  l_rx_acia_on 0000006e
+EQU  tx_flow      00000081
+EQU  t_tx_flow    0000007b
+EQU  l_tx_flow    00000088
+EQU  tx_fifo_empty 0000008b
+EQU  t_tx_fifo_empty 00000089
+EQU  l_tx_fifo_empty 0000008b
+EQU  tx_acia_on   00000099
+EQU  t_tx_acia_on 0000008f
+EQU  tx_int_ena   00000094
+EQU  t_tx_int_ena 00000093
+EQU  l_tx_int_ena 00000094
+EQU  l_tx_acia_on 00000099
+CSEG load_wait    0000009d
+CSEG load_abort   000000ab
+CSEG rs_vect_empty 000000b2
+CSEG reset_msg    000000bd
+CSEG bpt_clrd_msg 000000c1
+CSEG bpt_info     000000ce
+CSEG bpt_slot_full 000000df
+CSEG load_ok      000000f2
+CSEG err_nonhex   000000f7
+CSEG err_func     00000103
+CSEG illegal_int  00000116
+CSEG back_line    00000122
+SET  core_version 0000033f
+EQU  op_nv        00000007
+EQU  op_s         00000000
+EQU  op_a         00000010
+EQU  op_x         00000011
+EQU  op_y         00000012
+EQU  op_i         00000053
+EQU  op_m         00000028
+EQU  op_r         00000018
+EQU  op_z         00000008
+EQU  op_zxi       0000004c
+EQU  op_zx        00000009
+EQU  op_zy        0000000a
+EQU  op_ziy       0000004d
+EQU  op_sa        00000006
+CSEG dis_opcode   00000127
+EQU  IRQ_dma      00000338
+EQU  t_IRQ_dma    00000329
+CSEG oc_tab       00000600
+EQU  l_IRQ_dma    00000338
+SET  cycles       00000001
+EQU  NMI_dma      00000378
+EQU  t_NMI_dma    00000369
+EQU  l_NMI_dma    00000378
+CSEG ASL_s        000003a8
+CSEG CLC_s        000003b1
+CSEG CLD_s        000003b9
+CSEG CLI_s        000003c1
+CSEG CLV_s        000003cb
+CSEG DEX_s        000003d3
+CSEG DEY_s        000003dd
+CSEG INX_s        000003e7
+CSEG INY_s        000003f1
+CSEG LSR_s        000003fb
+CSEG NOP_s        00000404
+CSEG PHA_s        0000040e
+CSEG PHP_s        0000041e
+CSEG PLA_s        00000434
+CSEG PLP_s        00000444
+CSEG ROL_s        0000045b
+CSEG ROR_s        00000465
+CSEG SEC_s        0000046f
+CSEG SED_s        00000477
+CSEG SEI_s        0000047f
+CSEG TAX_s        00000489
+CSEG TAY_s        00000494
+CSEG TSX_s        0000049f
+CSEG TXA_s        000004aa
+CSEG TXS_s        000004b5
+CSEG TYA_s        000004bd
+CSEG BCC_r        000004c8
+CSEG no_branch@adgen_r@4732 000004d0
+CSEG BCS_r        000004da
+CSEG no_branch@adgen_r@4811 000004e2
+CSEG BEQ_r        000004ec
+CSEG no_branch@adgen_r@4890 000004f4
+CSEG BMI_r        000004fe
+CSEG no_branch@adgen_r@4969 00000506
+CSEG BNE_r        00000510
+CSEG no_branch@adgen_r@5048 00000518
+CSEG BPL_r        00000522
+CSEG no_branch@adgen_r@5127 0000052a
+CSEG BVC_r        00000534
+CSEG no_branch@adgen_r@5206 0000053c
+CSEG BVS_r        00000546
+CSEG no_branch@adgen_r@5285 0000054e
+CSEG JMP_i        00000558
+CSEG JMP_a        00000562
+CSEG JSR_a        00000572
+CSEG RTS_s        00000591
+CSEG RTI_s        000005a6
+CSEG BRK_s        000005c5
+CSEG alignfromhere@align@6133 000005f2
+EQU  ORA_zxi      0000097d
+CSEG illegalop    00000700
+EQU  ORA_z        0000099e
+EQU  ASL_z        00000a28
+CSEG ORA_m        000009af
+CSEG ORA_a        000009a3
+CSEG ASL_a        00000a2d
+EQU  ORA_ziy      0000098a
+EQU  ORA_zx       00000998
+EQU  ASL_zx       00000a22
+EQU  ORA_y        00000974
+EQU  ORA_x        0000096b
+EQU  ASL_x        00000a19
+EQU  AND_zxi      00000774
+EQU  BIT_z        000007b4
+EQU  AND_z        00000795
+EQU  ROL_z        00000a94
+CSEG AND_m        000007a6
+CSEG BIT_a        000007b9
+CSEG AND_a        0000079a
+CSEG ROL_a        00000a99
+EQU  AND_ziy      00000781
+EQU  AND_zx       0000078f
+EQU  ROL_zx       00000a8e
+EQU  AND_y        0000076b
+EQU  AND_x        00000762
+EQU  ROL_x        00000a85
+EQU  EOR_zxi      0000087a
+EQU  EOR_z        0000089b
+EQU  LSR_z        00000a5e
+CSEG EOR_m        000008ac
+CSEG EOR_a        000008a0
+CSEG LSR_a        00000a63
+EQU  EOR_ziy      00000887
+EQU  EOR_zx       00000895
+EQU  LSR_zx       00000a58
+EQU  EOR_y        00000871
+EQU  EOR_x        00000868
+EQU  LSR_x        00000a4f
+EQU  ADC_zxi      00000714
+EQU  ADC_z        00000735
+EQU  ROR_z        00000acb
+CSEG ADC_m        00000746
+CSEG ADC_a        0000073a
+CSEG ROR_a        00000ad0
+EQU  ADC_ziy      00000721
+EQU  ADC_zx       0000072f
+EQU  ROR_zx       00000ac5
+EQU  ADC_y        0000070b
+EQU  ADC_x        00000702
+EQU  ROR_x        00000abc
+EQU  STA_zxi      00000b73
+EQU  STY_z        00000be1
+EQU  STA_z        00000b94
+EQU  STX_z        00000bbb
+CSEG STY_a        00000be5
+CSEG STA_a        00000b99
+CSEG STX_a        00000bc0
+EQU  STA_ziy      00000b80
+EQU  STY_zx       00000bdc
+EQU  STA_zx       00000b8e
+EQU  STX_zy       00000bb5
+EQU  STA_y        00000b6a
+EQU  STA_x        00000b61
+CSEG LDY_m        0000095d
+EQU  LDA_zxi      000008cc
+CSEG LDX_m        0000092e
+EQU  LDY_z        0000094b
+EQU  LDA_z        000008ed
+EQU  LDX_z        0000091c
+CSEG LDA_m        000008ff
+CSEG LDY_a        00000950
+CSEG LDA_a        000008f2
+CSEG LDX_a        00000921
+EQU  LDA_ziy      000008d9
+EQU  LDY_zx       00000945
+EQU  LDA_zx       000008e7
+EQU  LDX_zy       00000916
+EQU  LDA_y        000008c3
+EQU  LDY_x        0000093c
+EQU  LDA_x        000008ba
+EQU  LDX_y        0000090d
+CSEG CPY_m        0000085a
+EQU  CMP_zxi      000007ea
+EQU  CPY_z        00000849
+EQU  CMP_z        0000080b
+EQU  DEC_z        00000b02
+CSEG CMP_m        0000081c
+CSEG CPY_a        0000084e
+CSEG CMP_a        00000810
+CSEG DEC_a        00000b07
+EQU  CMP_ziy      000007f7
+EQU  CMP_zx       00000805
+EQU  DEC_zx       00000afc
+EQU  CMP_y        000007e1
+EQU  CMP_x        000007d8
+EQU  DEC_x        00000af3
+CSEG CPX_m        0000083b
+EQU  SBC_zxi      000009cf
+EQU  CPX_z        0000082a
+EQU  SBC_z        000009f0
+EQU  INC_z        00000b39
+CSEG SBC_m        00000a01
+CSEG CPX_a        0000082f
+CSEG SBC_a        000009f5
+CSEG INC_a        00000b3e
+EQU  SBC_ziy      000009dc
+EQU  SBC_zx       000009ea
+EQU  INC_zx       00000b33
+EQU  SBC_y        000009c6
+EQU  SBC_x        000009bd
+EQU  INC_x        00000b2a
+CSEG deb_inv_op   0000154b
+CSEG ADC_o        00000740
+CSEG ioread       00000c02
+CSEG skip_IO@op_fetch@6748 00000746
+CSEG ADC_d        00000758
+CSEG ADC_d3       0000074e
+CSEG ADC_d2       0000075f
+CSEG AND_o        000007a0
+CSEG skip_IO@op_fetch@7204 000007a6
+CSEG BIT_m        000007c5
+CSEG BIT_o        000007bf
+CSEG skip_IO@op_fetch@7389 000007c5
+CSEG CMP_o        00000816
+CSEG skip_IO@op_fetch@7834 0000081c
+CSEG CPX_o        00000835
+CSEG skip_IO@op_fetch@8021 0000083b
+CSEG CPY_o        00000854
+CSEG skip_IO@op_fetch@8208 0000085a
+CSEG EOR_o        000008a6
+CSEG skip_IO@op_fetch@8646 000008ac
+CSEG LDA_o        000008f8
+CSEG skip_IO@reg_fetch@9084 000008ff
+CSEG LDX_o        00000927
+CSEG skip_IO@reg_fetch@9348 0000092e
+CSEG LDY_o        00000956
+CSEG skip_IO@reg_fetch@9612 0000095d
+CSEG ORA_o        000009a9
+CSEG skip_IO@op_fetch@10054 000009af
+CSEG SBC_o        000009fb
+CSEG skip_IO@op_fetch@10494 00000a01
+CSEG SBC_d        00000a0f
+CSEG SBC_d2       00000a0d
+CSEG ASL_o        00000a33
+CSEG ASL_m        00000a39
+CSEG iomodify     00000c01
+CSEG skip_IO@op_fetch_modify@10774 00000a39
+CSEG skip_store@store_modify@10819 00000a44
+CSEG do_io@store_modify@10819 00000a4e
+CSEG iowrite      00000c08
+CSEG LSR_o        00000a69
+CSEG LSR_m        00000a6f
+CSEG skip_IO@op_fetch_modify@11055 00000a6f
+CSEG skip_store@store_modify@11100 00000a7a
+CSEG do_io@store_modify@11100 00000a84
+CSEG ROL_o        00000a9f
+CSEG ROL_m        00000aa5
+CSEG skip_IO@op_fetch_modify@11336 00000aa5
+CSEG skip_store@store_modify@11382 00000ab1
+CSEG do_io@store_modify@11382 00000abb
+CSEG ROR_o        00000ad6
+CSEG ROR_m        00000adc
+CSEG skip_IO@op_fetch_modify@11618 00000adc
+CSEG skip_store@store_modify@11664 00000ae8
+CSEG do_io@store_modify@11664 00000af2
+CSEG DEC_o        00000b0d
+CSEG DEC_m        00000b13
+CSEG skip_IO@op_fetch_modify@11900 00000b13
+CSEG skip_store@store_modify@11946 00000b1f
+CSEG do_io@store_modify@11946 00000b29
+CSEG INC_o        00000b44
+CSEG INC_m        00000b4a
+CSEG skip_IO@op_fetch_modify@12182 00000b4a
+CSEG skip_store@store_modify@12228 00000b56
+CSEG do_io@store_modify@12228 00000b60
+CSEG STA_o        00000b9f
+EQU  STA_m        00000ba3
+CSEG skip_store@store_reg@12649 00000ba9
+CSEG do_io@store_reg@12649 00000bb3
+EQU  STX_m        00000bca
+CSEG STX_o        00000bc6
+CSEG skip_store@store_reg@12850 00000bd0
+CSEG do_io@store_reg@12850 00000bda
+EQU  STY_m        00000bef
+CSEG STY_o        00000beb
+CSEG skip_store@store_reg@12997 00000bf5
+CSEG do_io@store_reg@12997 00000bff
+SET  io_version   00000340
+CSEG ior_tab      00000e80
+CSEG iow_tab      00000e90
+CSEG io_reset     00000c0e
+CSEG rs_IO_ext    00001568
+CSEG t1_rs        00000da2
+CSEG irq_rs       00000e59
+CSEG lcd_rs       00000c7f
+CSEG spi_rs       00000fae
+CSEG i2c_rs       0000113f
+CSEG ltch_rs      00000f05
+EQU  reset_delay  00000c21
+EQU  reset_10ms_expired 00000c28
+EQU  t_reset_10ms_expired 00000c24
+EQU  x_reset_delay 00000c29
+EQU  l_reset_10ms_expired 00000c28
+SET  io_select    00000007
+SET  io_strobe_pol 00000000
+SET  io_sel_direct 00000006
+CSEG lcd_rd       00000c37
+EQU  lcd_rd_scan  00000c50
+EQU  t_lcd_rd_scan 00000c41
+CSEG ir_retry     00000e63
+EQU  lcd_rd_adr   00000c4e
+EQU  l_lcd_rd_scan 00000c50
+CSEG lcd_wrt      00000c5b
+EQU  lcd_wrt_scan 00000c74
+EQU  t_lcd_wrt_scan 00000c65
+CSEG iw_retry     00000e65
+EQU  lcd_wrt_adr  00000c72
+EQU  l_lcd_wrt_scan 00000c74
+CSEG iw_exit      00000e68
+CSEG lcd_rs_force 00000cc7
+CSEG lcd_init     00000cb2
+EQU  lcd_rs_init  00000c91
+EQU  x_lcd_rs_init 00000c9a
+EQU  lcd_rs_text  00000c98
+EQU  t_lcd_rs_text 00000c96
+EQU  l_lcd_rs_text 00000c99
+CSEG lcd_rs_wrt   00000ccc
+EQU  lcd_rs_readback 00000ca0
+CSEG lcd_rs_rd    00000cee
+EQU  x_lcd_rs_readback 00000ca9
+EQU  lcd_rs_rd_fail 00000ca8
+EQU  t_lcd_rs_rd_fail 00000ca6
+EQU  l_lcd_rs_rd_fail 00000ca8
+EQU  lcd_rs_fail  00000cb1
+EQU  t_lcd_rs_fail 00000cad
+CSEG lcd_fail     00000cbd
+CSEG prtstr       00001983
+EQU  l_lcd_rs_fail 00000cb1
+EQU  rs_lcd_delay 00000cc8
+CSEG lcd_rs_fwrt  00000ce2
+EQU  lcd_rs_busy  00000ccf
+EQU  lcd_rs_timeout 00000cd5
+EQU  t_lcd_rs_timeout 00000cd2
+EQU  l_lcd_rs_timeout 00000cd5
+EQU  x_lcd_rs_busy 00000cdf
+EQU  lcd_rs_adr   00000ce0
+EQU  lcd_rs_rd_busy 00000cf0
+EQU  lcd_rs_rd_timeout 00000cf6
+EQU  t_lcd_rs_rd_timeout 00000cf3
+EQU  l_lcd_rs_rd_timeout 00000cf6
+EQU  x_lcd_rs_rd_busy 00000d00
+EQU  lcd_rs_rd_adr 00000d01
+CSEG acia_rx      00000d0e
+EQU  rx_irq_clear 00000d19
+EQU  t_rx_irq_clear 00000d15
+EQU  l_rx_irq_clear 00000d19
+EQU  acia_rx_ena  00000d3d
+EQU  t_acia_rx_ena 00000d1c
+EQU  acia_rx_empty 00000d3b
+EQU  t_acia_rx_empty 00000d20
+EQU  acia_rx_more 00000d2f
+EQU  t_acia_rx_more 00000d29
+EQU  acia_rx_int  00000d2e
+EQU  t_acia_rx_int 00000d2d
+EQU  l_acia_rx_int 00000d2e
+EQU  l_acia_rx_more 00000d2f
+EQU  acia_flow    00000d3b
+EQU  t_acia_flow  00000d32
+EQU  acia_send_xon 00000d3b
+EQU  t_acia_send_xon 00000d36
+EQU  l_acia_send_xon 00000d3b
+EQU  l_acia_flow  00000d3b
+EQU  l_acia_rx_empty 00000d3b
+EQU  l_acia_rx_ena 00000d3d
+CSEG acia_tx      00000d3f
+CSEG iw_retry_ext 00000d42
+EQU  tx_irq_clear 00000d50
+EQU  t_tx_irq_clear 00000d4c
+EQU  l_tx_irq_clear 00000d50
+EQU  acia_tx_more 00000d62
+EQU  t_acia_tx_more 00000d5c
+EQU  acia_tx_int  00000d61
+EQU  t_acia_tx_int 00000d60
+EQU  l_acia_tx_int 00000d61
+EQU  l_acia_tx_more 00000d62
+CSEG t1r_adr      00000d65
+CSEG t1w_adr      00000d69
+CSEG t1r_data     00000d6c
+EQU  t1r_data_word 00000d79
+EQU  t_t1r_data_word 00000d70
+EQU  l_t1r_data_word 00000d7e
+EQU  t1r_data_ctl 00000d7d
+EQU  t_t1r_data_ctl 00000d7a
+EQU  l_t1r_data_ctl 00000d7e
+CSEG t1w_data     00000d80
+EQU  t1w_data_word 00000d8d
+EQU  t_t1w_data_word 00000d84
+EQU  l_t1w_data_word 00000da1
+EQU  t1w_data_ctl 00000da1
+EQU  t_t1w_data_ctl 00000d8e
+EQU  l_t1w_data_ctl 00000da1
+CSEG tcdn_r       00000dc5
+CSEG tcdn_w       00000dc9
+CSEG ir_mask      00000dce
+CSEG iw_mask      00000dd2
+EQU  mask_irq_clear 00000de2
+EQU  t_mask_irq_clear 00000de0
+EQU  l_mask_irq_clear 00000de3
+CSEG ir_flag      00000de4
+CSEG iw_flag      00000deb
+EQU  flag_irq_clear 00000dfe
+EQU  t_flag_irq_clear 00000dfd
+EQU  l_flag_irq_clear 00000dfe
+CSEG ir_vector    00000dff
+EQU  ir_vect_internal 00000e21
+EQU  t_ir_vect_internal 00000e07
+EQU  ir_vect_b2   00000e0d
+EQU  t_ir_vect_b2 00000e0b
+EQU  l_ir_vect_b2 00000e0d
+EQU  ir_vect_b1   00000e12
+EQU  t_ir_vect_b1 00000e10
+EQU  l_ir_vect_b1 00000e12
+EQU  ir_vect_b0   00000e17
+EQU  t_ir_vect_b0 00000e15
+EQU  l_ir_vect_b0 00000e17
+EQU  ir_vect_clr_int 00000e21
+EQU  t_ir_vect_clr_int 00000e20
+EQU  l_ir_vect_clr_int 00000e21
+EQU  l_ir_vect_internal 00000e21
+CSEG ir_diag      00000e23
+CSEG iw_diag      00000e2b
+EQU  iw_diag_enter 00000e47
+EQU  t_iw_diag_enter 00000e2d
+EQU  iw_diag_irq  00000e39
+EQU  t_iw_diag_irq 00000e38
+EQU  l_iw_diag_irq 00000e39
+CSEG debugger     00001624
+EQU  l_iw_diag_enter 00000e47
+CSEG diag_reset   00000e56
+CSEG soft_reset   000019cb
+CSEG ir_exit      00000e75
+CSEG rs_exit      00000e76
+CSEG alignfromhere@align@15529 00000e77
+CSEG spr_data     00000f90
+CSEG io65xx_rd    00000f11
+CSEG ltch_rd      00000eee
+CSEG iorE0        00000ee4
+CSEG iordreg      00000f50
+CSEG spw_data     00000f75
+CSEG io65xx_wrt   00000f31
+CSEG ltch_wrt     00000efa
+CSEG iowE0        00000ee9
+CSEG iowtreg      00000f55
+CSEG iorE0_tab    00000ea0
+CSEG iowE0_tab    00000eb0
+CSEG ior_int_tab  00000ec0
+CSEG i2c_stat     00001135
+CSEG i2c_data_rd  000010ce
+CSEG spr_dat_lst  00000faa
+CSEG dmr_stat     00001098
+CSEG dmr_data     000010b2
+CSEG iow_int_tab  00000ed0
+CSEG i2c_cmd      0000110d
+CSEG i2c_data_wrt 000010e2
+CSEG spw_cmd      00000f5a
+CSEG dmw_cmd      00001080
+CSEG dmw_data     0000109c
+CSEG spi_vss      00000ee0
+CSEG phi2_syncloop@phi2_sync@16060 00000f15
+CSEG phi2_synctable@phi2_sync@16060 00000f1c
+CSEG phi2_syncloop@phi2_sync@16173 00000f35
+CSEG phi2_synctable@phi2_sync@16173 00000f3c
+EQU  spi_in       00000016
+EQU  spi_ddr      00000017
+EQU  spi_out      00000018
+EQU  spi_sck      00000007
+EQU  spi_miso     00000006
+EQU  spi_mosi     00000005
+EQU  spw_cmd_sshld 00000f6b
+EQU  t_spw_cmd_sshld 00000f60
+EQU  l_spw_cmd_sshld 00000f6b
+CSEG wait_spdr@wait_spi@16462 00000f85
+CSEG wait_spdr@wait_spi@16545 00000fa0
+CSEG wait_spdr@out_spi@16631 00000fba
+CSEG wait_spdr@in_spi@16638 00000fbd
+EQU  spi_rs_fail  00000fc6
+EQU  t_spi_rs_fail 00000fc2
+CSEG spi_fail     00000fcd
+EQU  l_spi_rs_fail 00000fc6
+CSEG dma_spi_rb   00000fd5
+EQU  dma_spi_rssh 00000fef
+EQU  t_dma_spi_rssh 00000fd9
+EQU  spi_drb_retry 00000fe4
+EQU  t_spi_drb_retry 00000fdf
+CSEG dma_spi_rb1  00000ff2
+EQU  l_spi_drb_retry 00000fe4
+EQU  t_spi_drb    00000fea
+EQU  spi_drb      00000fef
+EQU  l_spi_drb    00000fef
+EQU  l_dma_spi_rssh 00000fef
+EQU  spi_drb_loop 0000100b
+CSEG wait_spdr@in_spi@16827 00001012
+CSEG dma_spi_wb   0000102d
+EQU  dma_spi_wssh 00001047
+EQU  t_dma_spi_wssh 00001031
+EQU  spi_dwb_retry 0000103c
+EQU  t_spi_dwb_retry 00001037
+CSEG dma_spi_wb1  0000104a
+EQU  l_spi_dwb_retry 0000103c
+EQU  t_spi_dwb    00001042
+EQU  spi_dwb      00001047
+EQU  l_spi_dwb    00001047
+EQU  l_dma_spi_wssh 00001047
+EQU  spi_dwb_loop 00001061
+CSEG wait_spdr@out_spi@17043 0000106d
+CSEG dma_ct_end   00001093
+CSEG dma_cmd_tab  0000108b
+EQU  dmw_cmd_valid 00001088
+EQU  t_dmw_cmd_valid 00001083
+EQU  l_dmw_cmd_valid 00001088
+CSEG dma_cmd_inv  00001088
+CSEG dma_set_tab  00001093
+CSEG dma_i2c_wb   000011ac
+CSEG dma_i2c_rb   00001156
+CSEG dma_eep_save 000013e3
+CSEG dma_eep_load 00001431
+EQU  dmw_data_valid 000010ad
+EQU  t_dmw_data_valid 000010a4
+EQU  l_dmw_data_valid 000010ad
+EQU  dmr_tab_end  000010b7
+EQU  t_dmr_tab_end 000010b6
+EQU  l_dmr_tab_end 000010b7
+EQU  i2c_in       00000013
+EQU  i2c_ddr      00000014
+EQU  i2c_out      00000015
+EQU  i2c_scl      00000000
+EQU  i2c_sda      00000001
+EQU  i2c_int      00000002
+EQU  i2c_res      00000003
+EQU  i2c_clk      00000014
+CSEG i2c_open     000010c3
+CSEG i2c_open_rs  000010c7
+EQU  i2c_read_ok  000010df
+EQU  t_i2c_read_ok 000010d2
+CSEG i2c_putack   00001296
+CSEG i2c_read     00001274
+EQU  l_i2c_read_ok 000010e0
+EQU  i2c_adr      000010fa
+EQU  t_i2c_adr    000010e7
+CSEG i2c_start    00001221
+EQU  i2c_start_ack 000010f2
+EQU  t_i2c_start_ack 000010f0
+EQU  l_i2c_start_ack 000010f5
+CSEG i2c_stop     000012b2
+EQU  l_i2c_adr    000010fa
+EQU  i2_wrt_ok    0000110c
+EQU  t_i2_wrt_ok  000010fd
+CSEG i2c_write    0000123a
+EQU  i2c_write_ack 00001104
+EQU  t_i2c_write_ack 00001102
+EQU  l_i2c_write_ack 00001107
+EQU  l_i2_wrt_ok  0000110c
+EQU  i2c_cmd_012  00001123
+EQU  t_i2c_cmd_012 00001112
+EQU  i2c_cmd_stop 00001116
+EQU  t_i2c_cmd_stop 00001114
+CSEG i2c_send_stop 00001128
+CSEG i2c_cmd_exit 00001125
+EQU  l_i2c_cmd_stop 00001116
+EQU  i2c_start_100 0000111d
+EQU  t_i2c_start_100 00001117
+CSEG i2c_reset    00001207
+EQU  l_i2c_start_100 0000111d
+EQU  l_i2c_cmd_012 00001123
+EQU  i2c_cmd_reset 00001125
+EQU  t_i2c_cmd_reset 00001124
+EQU  l_i2c_cmd_reset 00001125
+EQU  i2c_not_stop 00001134
+EQU  t_i2c_not_stop 0000112a
+EQU  l_i2c_not_stop 00001134
+CSEG i2c_reset_rs 00001208
+EQU  i2c_rs_fail  0000114d
+EQU  t_i2c_rs_fail 00001149
+CSEG i2c_fail     0000114e
+EQU  l_i2c_rs_fail 0000114d
+EQU  i2c_drb_retry 00001161
+EQU  t_i2c_drb_retry 0000115c
+CSEG dma_i2c_rb1  0000116f
+EQU  l_i2c_drb_retry 00001161
+EQU  t_i2c_drb    00001167
+EQU  i2c_drb      0000116c
+EQU  l_i2c_drb    0000116c
+CSEG dma_i2c_rbfail 0000116c
+EQU  i2c_drb_loop 00001188
+EQU  x_i2c_drb_loop 0000119f
+EQU  i2c_dwb_retry 000011b7
+EQU  t_i2c_dwb_retry 000011b2
+CSEG dma_i2c_wb1  000011c5
+EQU  l_i2c_dwb_retry 000011b7
+EQU  t_i2c_dwb    000011bd
+EQU  i2c_dwb      000011c2
+EQU  l_i2c_dwb    000011c2
+CSEG dma_i2c_rwfail 000011c2
+EQU  i2c_dwb_loop 000011da
+EQU  i2c_dwb_ack  000011f1
+EQU  t_i2c_dwb_ack 000011eb
+EQU  l_i2c_dwb_ack 000011fc
+EQU  i2c_dwb_end_nak 000011fc
+EQU  t_i2c_dwb_end_nak 000011fb
+EQU  l_i2c_dwb_end_nak 000011fc
+SET  loop_cycles  00000001
+CSEG i2c_400kHz@wait_i2c@18081 0000120c
+EQU  i2c_stuck    00001214
+EQU  t_i2c_stuck  00001212
+EQU  l_i2c_stuck  0000121d
+EQU  i2c_sda_stuck 0000121b
+EQU  t_i2c_sda_stuck 00001219
+EQU  l_i2c_sda_stuck 0000121c
+EQU  start_prev_ack 00001233
+EQU  t_start_prev_ack 00001223
+CSEG i2c_400kHz@wait_i2c@18184 00001227
+CSEG i2c_400kHz@wait_i2c@18224 00001230
+EQU  l_start_prev_ack 00001233
+CSEG i2c_400kHz@wait_i2c@18270 00001237
+CSEG i_wrtloop    0000123c
+CSEG i2c_400kHz@wait_i2c@18313 00001240
+CSEG i_wrt0       00001247
+CSEG i_wrt1       00001249
+CSEG i2c_400kHz@wait_i2c@18359 0000124c
+CSEG i2c_400kHz@wait_i2c@18399 00001255
+CSEG i2c_getack   0000125b
+CSEG i2c_400kHz@wait_i2c@18441 0000125f
+CSEG i2c_400kHz@wait_i2c@18479 00001265
+CSEG i2c_400kHz@wait_i2c@18519 0000126d
+CSEG i_rdloop     00001275
+CSEG i2c_400kHz@wait_i2c@18561 0000127a
+CSEG i2c_400kHz@wait_i2c@18599 0000127f
+CSEG i2c_400kHz@wait_i2c@18637 00001285
+CSEG i2c_400kHz@wait_i2c@18677 0000128d
+CSEG i2c_400kHz@wait_i2c@18724 0000129a
+CSEG i_pack1      000012a1
+CSEG i_pack2      000012a3
+CSEG i2c_400kHz@wait_i2c@18770 000012a6
+CSEG i2c_400kHz@wait_i2c@18810 000012af
+CSEG i2c_400kHz@wait_i2c@18848 000012b7
+CSEG i2c_400kHz@wait_i2c@18886 000012bc
+CSEG i2c_400kHz@wait_i2c@18924 000012c2
+CSEG i2c_400kHz@wait_i2c@18964 000012ca
+CSEG eep_open     000012cf
+CSEG wait_spdr@out_spi@19076 000012dc
+CSEG wait_spdr@in_spi@19083 000012df
+CSEG eep_no_device 000012ea
+CSEG err_no_eep   000014c7
+CSEG skip_main    00001c25
+CSEG eep_write    000012ef
+EQU  eep_new_slot 00001307
+EQU  t_eep_new_slot 000012f1
+EQU  eep_find_slot 000012f3
+EQU  eep_write_wait 000012f3
+EQU  x_eep_write_wait 000012f5
+EQU  x_eep_find_slot 00001306
+EQU  eep_slot_allocate 00001303
+EQU  t_eep_slot_allocate 000012fc
+EQU  l_eep_slot_allocate 00001303
+CSEG eep_full     00001337
+EQU  l_eep_new_slot 00001307
+EQU  t_eep_write_open 0000130b
+EQU  eep_write_open 0000132b
+EQU  eep_write_ready 0000130d
+CSEG wait_spdr@out_spi@19218 00001310
+CSEG wait_spdr@in_spi@19225 00001313
+CSEG wait_spdr@out_spi@19241 0000131c
+CSEG wait_spdr@out_spi@19251 00001322
+CSEG wait_spdr@out_spi@19258 00001325
+CSEG wait_spdr@out_spi@19265 00001328
+EQU  l_eep_write_open 0000132b
+CSEG wait_spdr@out_spi@19293 0000132c
+EQU  t_eep_write_buf 00001332
+EQU  eep_write_buf 00001334
+EQU  l_eep_write_buf 00001334
+CSEG err_eep_full 000014c0
+CSEG eep_write_err 0000133a
+CSEG eep_int_close 0000135b
+CSEG discard_serial_stream 00001bdd
+CSEG eep_write_close 00001340
+EQU  eep_close_nxt_slot 00001345
+EQU  t_eep_close_nxt_slot 00001344
+EQU  l_eep_close_nxt_slot 00001345
+EQU  eep_close_last_slot 00001348
+EQU  t_eep_close_last_slot 00001347
+EQU  l_eep_close_last_slot 00001348
+CSEG eep_close    0000134b
+EQU  eep_find_slot2 0000135d
+EQU  eep_write_wait2 0000135d
+EQU  x_eep_write_wait2 0000135f
+EQU  eep_free_slot 0000136a
+EQU  t_eep_free_slot 00001364
+EQU  l_eep_free_slot 0000136a
+EQU  eep_write_wait4 0000136c
+EQU  x_eep_write_wait4 0000136e
+CSEG eep_load_prog 0000136f
+CSEG eep_prog     000014b2
+CSEG PrintHex     00001989
+EQU  eep_scan_loop 0000137a
+EQU  x_eep_scan_loop 00001387
+EQU  eep_load_bad_prog 00001386
+EQU  t_eep_load_bad_prog 00001381
+CSEG eep_notfound 000014ac
+EQU  l_eep_load_bad_prog 00001386
+CSEG eep_read     000013b9
+EQU  eep_file_incompat 00001392
+EQU  t_eep_file_incompat 0000138d
+CSEG bad_format   000014f3
+EQU  l_eep_file_incompat 00001392
+EQU  eep_load_loop 00001393
+EQU  eep_load_byte 00001398
+EQU  eep_load_pc  000013b2
+EQU  t_eep_load_pc 000013af
+EQU  l_eep_load_pc 000013b2
+CSEG eep_loaded   000014b8
+EQU  eep_next_slot 000013d4
+EQU  t_eep_next_slot 000013bb
+EQU  eep_read_first 000013bf
+EQU  t_eep_read_first 000013bd
+EQU  l_eep_read_first 000013bf
+EQU  eep_find_prog 000013c1
+EQU  x_eep_find_prog 000013c9
+CSEG eep_read_overrun 000013da
+CSEG wait_spdr@out_spi@19705 000013cc
+CSEG wait_spdr@out_spi@19712 000013cf
+CSEG wait_spdr@out_spi@19719 000013d2
+EQU  l_eep_next_slot 000013d4
+CSEG wait_spdr@in_spi@19753 000013d5
+CSEG err_corrupt  000014d3
+CSEG eep_app_read_exit 0000148c
+EQU  t_eep_ds_inv 000013f1
+EQU  eep_ds_inv   000013f2
+EQU  l_eep_ds_inv 000013f2
+EQU  eep_app_save_data 00001414
+EQU  eep_app_save_adr 00001418
+EQU  t_eep_app_save_adr 00001416
+EQU  x_eep_app_save_data 00001428
+EQU  l_eep_app_save_adr 00001418
+CSEG eep_saved    000014bc
+EQU  t_eep_dl_inv 0000143f
+EQU  eep_dl_inv   00001440
+EQU  l_eep_dl_inv 00001440
+EQU  eep_app_scan_loop 0000144c
+EQU  x_eep_app_scan_loop 00001458
+EQU  eep_app_load_bad_prog 00001457
+EQU  t_eep_app_load_bad_prog 00001453
+EQU  l_eep_app_load_bad_prog 00001457
+EQU  eep_app_file_incompat 00001462
+EQU  t_eep_app_file_incompat 0000145e
+CSEG eep_app_read_exit2 0000148a
+EQU  l_eep_app_file_incompat 00001462
+EQU  eep_app_load_loop 00001471
+EQU  eep_app_load_adr 00001475
+EQU  t_eep_app_load_adr 00001473
+EQU  x_eep_app_load_loop 00001484
+EQU  l_eep_app_load_adr 00001475
+CSEG eep_info1    0000148f
+CSEG eep_info2    00001499
+CSEG eep_info3    0000149b
+CSEG eep_info4    000014a1
+CSEG eep_none     000014a9
+CSEG save_wait    000014d9
+CSEG save_ok      000014e7
+CSEG save_abort   000014ec
+EQU  i_stop       00001501
+EQU  x_i_stop     00001502
+EQU  t0_esc_expired 0000150b
+EQU  t_t0_esc_expired 00001508
+EQU  l_t0_esc_expired 0000150b
+EQU  t0_reg_expired 00001512
+EQU  t_t0_reg_expired 0000150f
+EQU  l_t0_reg_expired 00001512
+EQU  t0_tcdn_expired 0000151c
+EQU  t_t0_tcdn_expired 00001519
+EQU  l_t0_tcdn_expired 0000151c
+EQU  t0_tcdn_irq  00001525
+EQU  t_t0_tcdn_irq 00001524
+EQU  l_t0_tcdn_irq 00001525
+EQU  debug_start  00001542
+EQU  t_debug_start 00001529
+EQU  t0_dma       0000153a
+EQU  t_t0_dma     0000152b
+EQU  l_t0_dma     0000153a
+EQU  l_debug_start 00001542
+CSEG end_command  00001945
+EQU  inv_op_irq_clear 00001556
+EQU  t_inv_op_irq_clear 00001555
+EQU  l_inv_op_irq_clear 00001556
+EQU  t_deb_stop_unexp 0000155f
+CSEG brkpt_chk_pc 00001b67
+EQU  deb_stop_unexp 00001567
+CSEG show_regs    000019f5
+CSEG inv_instr    00001c9e
+EQU  l_deb_stop_unexp 00001567
+SET  rs_ddr_done  00000001
+EQU  clear_mem    000015d3
+EQU  t_clear_mem  000015c0
+EQU  memory_clear 000015c4
+EQU  brkpt_reset  000015cf
+EQU  l_clear_mem  000015d8
+CSEG emu_msg      00001ca6
+CSEG built_msg    00001cb3
+EQU  rspo_autoload 0000161d
+EQU  t_rspo_autoload 000015e2
+EQU  reset_autoload 0000161d
+EQU  t_reset_autoload 000015e9
+EQU  eep_load_ok  0000161d
+EQU  t_eep_load_ok 000015ee
+CSEG load_reset_vector 000019e9
+EQU  pc_load_ok   0000161a
+EQU  t_pc_load_ok 000015f1
+EQU  eep_load_string 000015f6
+EQU  x_eep_load_string 0000160c
+EQU  eep_load_special 00001609
+EQU  t_eep_load_special 000015fd
+EQU  eep_auto_cr  00001606
+EQU  t_eep_auto_cr 00001605
+EQU  l_eep_auto_cr 00001606
+EQU  eep_auto_quote 00001609
+EQU  t_eep_auto_quote 00001608
+EQU  l_eep_auto_quote 00001609
+EQU  l_eep_load_special 00001609
+CSEG end_exit     0000194f
+EQU  l_pc_load_ok 0000161d
+EQU  l_eep_load_ok 0000161d
+EQU  l_reset_autoload 0000161d
+EQU  l_rspo_autoload 0000161d
+CSEG PrintChr     00001992
+CSEG show_prompt  00001a2d
+EQU  debug_main   00001624
+EQU  deb_wait4input 00001624
+EQU  deb_timer_update 0000163a
+EQU  t_deb_timer_update 00001628
+EQU  deb_esc_timer_update 00001633
+EQU  t_deb_esc_timer_update 0000162e
+EQU  l_deb_esc_timer_update 00001633
+EQU  deb_reg_timer_update 0000163a
+EQU  t_deb_reg_timer_update 00001637
+EQU  l_deb_reg_timer_update 0000163a
+EQU  l_deb_timer_update 0000163a
+EQU  deb_true_esc 00001648
+EQU  t_deb_true_esc 0000163e
+CSEG erase2eol    00001973
+EQU  l_deb_true_esc 00001648
+EQU  deb_show_regs 0000165b
+EQU  t_deb_show_regs 0000164e
+EQU  deb_regs_run 00001659
+EQU  t_deb_regs_run 00001650
+CSEG escape       00001979
+EQU  l_deb_regs_run 0000165b
+EQU  l_deb_show_regs 0000165b
+EQU  deb_read_buf 00001678
+EQU  t_deb_read_buf 00001661
+EQU  deb_flow     00001675
+EQU  t_deb_flow   0000166c
+EQU  deb_send_xon 00001675
+EQU  t_deb_send_xon 00001670
+EQU  l_deb_send_xon 00001675
+EQU  l_deb_flow   00001675
+EQU  x_deb_wait4input 00001682
+EQU  l_deb_read_buf 00001681
+EQU  deb_read_direct 0000167f
+EQU  t_deb_read_direct 0000167c
+EQU  l_deb_read_direct 00001681
+EQU  x_debug_main 0000194d
+EQU  deb_esc_seq  0000168f
+EQU  t_deb_esc_seq 00001686
+EQU  l_deb_esc_seq 0000194c
+EQU  deb_del2bs   00001695
+EQU  t_deb_del2bs 00001694
+EQU  l_deb_del2bs 00001695
+EQU  deb_bs       000016a4
+EQU  t_deb_bs     00001697
+EQU  deb_bs_ok    000016a3
+EQU  t_deb_bs_ok  00001699
+CSEG space        0000197b
+EQU  deb_bs_quote 000016a3
+EQU  t_deb_bs_quote 000016a1
+EQU  l_deb_bs_quote 000016a3
+EQU  l_deb_bs_ok  000016a3
+EQU  l_deb_bs     000016a4
+EQU  deb_echo     000016b1
+EQU  t_deb_echo   000016a8
+EQU  deb_lower_case 000016af
+EQU  t_deb_lower_case 000016ae
+EQU  l_deb_lower_case 000016af
+EQU  l_deb_echo   000016b1
+EQU  deb_string_mark 000016b7
+EQU  t_deb_string_mark 000016b5
+EQU  l_deb_string_mark 000016b7
+EQU  deb_esc      000016bf
+EQU  t_deb_esc    000016b9
+EQU  deb_esc_disabled 000016bc
+EQU  t_deb_esc_disabled 000016ba
+EQU  l_deb_esc_disabled 000016bc
+EQU  l_deb_esc    000016bf
+EQU  deb_step     000016d0
+EQU  t_deb_step   000016c3
+CSEG disasm       00001a35
+EQU  deb_step_inv 000016c9
+EQU  t_deb_step_inv 000016c8
+EQU  l_deb_step_inv 000016c9
+CSEG emu_start    00001910
+EQU  l_deb_step   000016d0
+EQU  deb_cr       0000194c
+EQU  t_deb_cr     000016d3
+EQU  deb_empty    000016e0
+EQU  t_deb_empty  000016d5
+EQU  t_deb_shortcut 000016da
+EQU  deb_shortcut 000016e0
+EQU  l_deb_shortcut 000016e0
+EQU  l_deb_empty  000016e0
+EQU  alter_reg    00001714
+EQU  t_alter_reg  000016ee
+EQU  alter_rega   000016f4
+EQU  t_alter_rega 000016f1
+CSEG get_byte     00001ac2
+EQU  l_alter_rega 000016f4
+EQU  alter_regx   000016f9
+EQU  t_alter_regx 000016f6
+EQU  l_alter_regx 000016f9
+EQU  alter_regy   000016fe
+EQU  t_alter_regy 000016fb
+EQU  l_alter_regy 000016fe
+EQU  alter_spointer 00001703
+EQU  t_alter_spointer 00001700
+EQU  l_alter_spointer 00001703
+EQU  alter_status 0000170e
+EQU  t_alter_status 00001705
+EQU  l_alter_status 0000170e
+EQU  alter_pc     00001713
+EQU  t_alter_pc   00001710
+CSEG get_adr      00001ae3
+EQU  l_alter_pc   00001713
+CSEG invalid_command 00001930
+EQU  l_alter_reg  00001714
+EQU  br_util      0000176d
+EQU  t_br_util    00001717
+EQU  br_info      0000171f
+EQU  t_br_info    0000171a
+CSEG brkpt_info   00001b0d
+EQU  l_br_info    0000171f
+EQU  br_set       0000174e
+EQU  t_br_set     00001721
+EQU  br_set_already 00001724
+EQU  br_already_set 0000172c
+EQU  t_br_already_set 0000172a
+EQU  l_br_already_set 0000172c
+EQU  br_set_free  0000172f
+EQU  br_set_slot  00001747
+EQU  t_br_set_slot 00001735
+EQU  l_br_set_slot 00001747
+EQU  l_br_set     0000174e
+EQU  br_clr       0000176c
+EQU  t_br_clr     00001750
+EQU  br_clr_parse 00001750
+CSEG br_inv_cmd   0000176c
+EQU  br_clr_all   00001762
+EQU  t_br_clr_all 0000175b
+CSEG brkpt_clr_all 00001b35
+EQU  br_clr_none_msg 00001761
+EQU  t_br_clr_none_msg 0000175e
+CSEG bpt_info_none 00001cca
+EQU  l_br_clr_none_msg 00001761
+EQU  l_br_clr_all 00001762
+EQU  br_clr_slot  0000176c
+EQU  t_br_clr_slot 00001765
+CSEG brkpt_clr_one 00001b42
+EQU  l_br_clr_slot 0000176c
+EQU  l_br_clr     0000176c
+EQU  l_br_util    0000176d
+EQU  show_disasm  00001790
+EQU  t_show_disasm 0000176f
+EQU  dis_next     0000177a
+EQU  t_dis_next   00001772
+EQU  l_dis_next   0000177d
+EQU  dis_loop     00001780
+EQU  l_show_disasm 00001790
+EQU  eep_util     0000183e
+EQU  t_eep_util   00001793
+EQU  eep_info     0000179c
+EQU  t_eep_info   00001796
+CSEG eep_auto_info 00001c73
+CSEG eep_cmd_info 00001c38
+EQU  l_eep_info   0000179c
+EQU  eep_save     000017e0
+EQU  t_eep_save   0000179f
+EQU  eep_save_inv_cmd 000017a3
+EQU  t_eep_save_inv_cmd 000017a2
+EQU  l_eep_save_inv_cmd 000017a3
+EQU  eep_save_record 000017ac
+EQU  eep_wait_colon 000017ac
+CSEG read_serial_esc 00001b94
+CSEG read_byte_esc 00001c31
+EQU  eep_save_adr 000017cd
+EQU  t_eep_save_adr 000017b8
+CSEG eep_prsv     000017db
+EQU  eep_save_data 000017c8
+EQU  t_eep_save_data 000017bc
+EQU  eep_save_data_loop 000017bc
+EQU  eep_save_error_checksum 000017c7
+EQU  t_eep_save_error_checksum 000017c3
+CSEG err_chksum   00001cc1
+EQU  l_eep_save_error_checksum 000017c7
+EQU  l_eep_save_data 000017cc
+EQU  l_eep_save_adr 000017da
+EQU  eep_save_complete 000017d6
+EQU  t_eep_save_complete 000017d1
+EQU  l_eep_save_complete 000017da
+EQU  x_eep_save_record 000017db
+EQU  l_eep_save   000017e0
+EQU  eep_load     000017eb
+EQU  t_eep_load   000017e2
+CSEG eep_inv_cmd  000017ea
+EQU  l_eep_load   000017eb
+EQU  eep_del      0000181a
+EQU  t_eep_del    000017ed
+EQU  eep_del_loop 000017f3
+EQU  eep_del_slot 00001801
+EQU  t_eep_del_slot 000017f8
+EQU  eep_del_wait 000017ff
+EQU  x_eep_del_wait 00001801
+EQU  l_eep_del_slot 00001801
+EQU  eep_del_free 00001810
+EQU  t_eep_del_free 00001807
+EQU  l_eep_del_free 00001819
+EQU  l_eep_del    0000181a
+EQU  eep_autoload 0000183e
+EQU  t_eep_autoload 0000181c
+EQU  eep_auto_parse 0000181d
+EQU  eep_auto_number 0000182a
+EQU  t_eep_auto_number 00001824
+CSEG get_wbyte    00001ad3
+CSEG eep_auto_write 00001c95
+EQU  eep_auto_parse2 00001827
+EQU  l_eep_auto_number 0000182a
+EQU  eep_auto_next 0000183a
+EQU  t_eep_auto_next 0000182c
+CSEG eep_auto_invalid 0000183d
+EQU  eep_auto_string 0000182f
+EQU  t_eep_string_end 00001834
+EQU  eep_string_end 00001835
+EQU  l_eep_string_end 00001835
+EQU  l_eep_auto_next 0000183a
+EQU  l_eep_autoload 0000183e
+EQU  l_eep_util   0000183e
+EQU  show_mem     00001887
+EQU  t_show_mem   00001841
+CSEG skip_get_adr 00001864
+EQU  show_next    00001855
+EQU  t_show_next  0000184b
+EQU  show_nxt_100 0000184f
+EQU  t_show_nxt_100 0000184d
+EQU  l_show_nxt_100 00001851
+EQU  l_show_next  00001855
+EQU  show_previous 00001862
+EQU  t_show_previous 00001857
+EQU  show_prev_100 0000185b
+EQU  t_show_prev_100 00001859
+EQU  l_show_prev_100 0000185d
+EQU  l_show_previous 00001862
+EQU  show_mem_line 0000186d
+CSEG colon        0000197d
+EQU  show_mem_data 00001873
+EQU  show_mem_brk 0000187b
+EQU  t_show_mem_brk 0000187a
+CSEG brkpt_chk    00001b55
+EQU  l_show_mem_brk 0000187b
+CSEG RevHex       0000195e
+EQU  l_show_mem   00001887
+EQU  write_mem    000018b7
+EQU  t_write_mem  00001889
+EQU  write_next   00001891
+EQU  t_write_next 0000188c
+EQU  l_write_next 00001897
+CSEG get_wadr     00001af8
+EQU  write_mem_dryrun 00001898
+EQU  x_write_mem_dryrun 0000189f
+EQU  write_mem_realrun 000018a2
+EQU  x_write_mem_realrun 000018b0
+CSEG brkpt_chk_write 00001b7e
+EQU  l_write_mem  000018b7
+EQU  load_mem     000018fa
+EQU  t_load_mem   000018ba
+EQU  load_mem_record 000018c2
+EQU  wait_colon   000018c2
+EQU  load_mem_data 000018ea
+EQU  t_load_mem_data 000018d5
+EQU  load_data    000018d7
+EQU  load_error_checksum 000018e9
+EQU  t_load_error_checksum 000018e5
+EQU  l_load_error_checksum 000018e9
+EQU  l_load_mem_data 000018f8
+EQU  load_complete 000018f4
+EQU  t_load_complete 000018ec
+EQU  load_pc      000018ef
+EQU  t_load_pc    000018ee
+EQU  l_load_pc    000018ef
+EQU  l_load_complete 000018f8
+EQU  x_load_mem_record 000018f9
+EQU  l_load_mem   000018fa
+EQU  halt_emu     00001901
+EQU  t_halt_emu   000018fc
+EQU  l_halt_emu   00001901
+EQU  start_emu    00001920
+EQU  t_start_emu  00001903
+EQU  emu_start_brk 0000191b
+EQU  t_emu_start_brk 0000191a
+EQU  l_emu_start_brk 0000191b
+EQU  l_start_emu  00001920
+EQU  exit_deb     00001929
+EQU  t_exit_deb   00001922
+EQU  l_exit_deb   00001929
+EQU  deb_reset    00001930
+EQU  t_deb_reset  0000192b
+EQU  l_deb_reset  00001930
+EQU  deb_invalid  00001939
+EQU  inv_string_mark 0000193f
+EQU  t_inv_string_mark 0000193d
+EQU  l_inv_string_mark 0000193f
+EQU  l_deb_cr     0000194c
+CSEG revx_dgt     00001962
+CSEG RevChr       00001967
+EQU  rvs_video_off 00001972
+EQU  t_rvs_video_off 0000196a
+CSEG esc91        00001976
+CSEG prtc         0000199a
+EQU  l_rvs_video_off 00001972
+EQU  print_string 00001983
+EQU  x_print_string 00001988
+CSEG prtx_dgt     0000198d
+EQU  reverse_video_off 0000199a
+EQU  t_reverse_video_off 00001994
+EQU  l_reverse_video_off 0000199a
+EQU  prt_fifo     000019b3
+EQU  t_prt_fifo   0000199d
+EQU  prt_fifo_full 000019a1
+EQU  l_prt_fifo   000019c8
+EQU  prt_fifo_disabled 000019b5
+EQU  x_prt_fifo_disabled 000019c1
+EQU  prt_fifo_wait_udre 000019bc
+EQU  x_prt_fifo_wait_udre 000019be
+EQU  prt_wait_udre 000019c5
+EQU  x_prt_wait_udre 000019c7
+EQU  sr_chk_tdre  000019d8
+EQU  t_sr_chk_tdre 000019d2
+EQU  sr_set_tdre  000019d8
+EQU  t_sr_set_tdre 000019d5
+EQU  l_sr_set_tdre 000019d8
+EQU  l_sr_chk_tdre 000019d8
+EQU  show_reg_run 00001a03
+EQU  t_show_reg_run 00001a01
+EQU  l_show_reg_run 00001a04
+EQU  show_runmode 00001a31
+EQU  t_show_runmode 00001a2f
+EQU  l_show_runmode 00001a32
+EQU  show_dis_brk 00001a3f
+EQU  t_show_dis_brk 00001a3d
+EQU  l_show_dis_brk 00001a3f
+EQU  dis_immediate 00001a56
+EQU  t_dis_immediate 00001a54
+EQU  l_dis_immediate 00001a56
+EQU  dis_pre_indirect 00001a5a
+EQU  t_dis_pre_indirect 00001a58
+EQU  l_dis_pre_indirect 00001a5a
+EQU  dis_bitnum   00001a63
+EQU  t_dis_bitnum 00001a5c
+EQU  l_dis_bitnum 00001a63
+EQU  dis_data_one 00001a6d
+EQU  t_dis_data_one 00001a67
+EQU  l_dis_data_one 00001a6d
+EQU  dis_data_abs 00001a7c
+EQU  t_dis_data_abs 00001a6f
+EQU  l_dis_data_abs 00001a7c
+EQU  dis_data_rel 00001a7f
+EQU  t_dis_data_rel 00001a7e
+CSEG dis_rel      00001aab
+EQU  l_dis_data_rel 00001a7f
+EQU  dis_x        00001a87
+EQU  t_dis_x      00001a83
+EQU  l_dis_x      00001a87
+EQU  dis_y        00001a8d
+EQU  t_dis_y      00001a89
+EQU  l_dis_y      00001a8d
+EQU  dis_i        00001a91
+EQU  t_dis_i      00001a8f
+EQU  l_dis_i      00001a91
+EQU  dis_xi       00001a99
+EQU  t_dis_xi     00001a93
+EQU  l_dis_xi     00001a99
+EQU  dis_iy       00001aa1
+EQU  t_dis_iy     00001a9b
+EQU  l_dis_iy     00001aa1
+EQU  dis_a        00001aa5
+EQU  t_dis_a      00001aa3
+EQU  l_dis_a      00001aa5
+EQU  dis_nv       00001aaa
+EQU  t_dis_nv     00001aa7
+EQU  l_dis_nv     00001aaa
+EQU  dis_rel_sign 00001ab4
+EQU  t_dis_rel_sign 00001ab3
+EQU  l_dis_rel_sign 00001ab4
+CSEG get_hex      00001ab9
+EQU  hex_a_f      00001ac1
+EQU  t_hex_a_f    00001abc
+CSEG inv_cmd      00001adc
+EQU  l_hex_a_f    00001ac1
+EQU  byte_parse   00001ac2
+EQU  adr_parse    00001ae3
+EQU  adr_nibble   00001aeb
+EQU  x_adr_nibble 00001af7
+EQU  adr_shift_nibble 00001af0
+EQU  wadr_parse   00001af8
+EQU  wadr_nibble  00001b00
+EQU  x_wadr_nibble 00001b0c
+EQU  wadr_shift_nibble 00001b05
+EQU  br_find_actv 00001b10
+EQU  br_info_none 00001b1e
+EQU  t_br_info_none 00001b1a
+EQU  l_br_info_none 00001b34
+EQU  br_info_all  00001b22
+EQU  t_br_info_slot 00001b28
+EQU  br_info_slot 00001b31
+EQU  l_br_info_slot 00001b31
+EQU  br_clr_all_slots 00001b38
+EQU  br_clr_all_msg 00001b41
+EQU  t_br_clr_all_msg 00001b3e
+EQU  l_br_clr_all_msg 00001b41
+EQU  t_br_clr_one_slot 00001b48
+EQU  br_clr_one_slot 00001b54
+EQU  l_br_clr_one_slot 00001b54
+EQU  br_chk_adr   00001b57
+EQU  br_slot_match 00001b64
+EQU  t_br_slot_match 00001b5d
+EQU  t_br_slot_valid 00001b61
+EQU  br_slot_valid 00001b63
+EQU  l_br_slot_valid 00001b63
+EQU  l_br_slot_match 00001b64
+EQU  br_pc_adr    00001b6c
+EQU  br_pc_match  00001b79
+EQU  t_br_pc_match 00001b72
+EQU  t_br_pc_valid 00001b76
+EQU  br_pc_valid  00001b78
+EQU  l_br_pc_valid 00001b78
+CSEG br_chkp_exit 00001b7b
+EQU  l_br_pc_match 00001b79
+EQU  br_chkw_adr  00001b82
+EQU  br_slotw_match 00001b8f
+EQU  t_br_slotw_match 00001b88
+EQU  t_br_slotw_valid 00001b8c
+EQU  br_slotw_valid 00001b8e
+EQU  l_br_slotw_valid 00001b8e
+CSEG br_chkw_exit 00001b91
+EQU  l_br_slotw_match 00001b8f
+EQU  wait_ser_data 00001b96
+EQU  esc_read_buf 00001bb2
+EQU  t_esc_read_buf 00001b9c
+EQU  esc_flow     00001baf
+EQU  t_esc_flow   00001ba6
+EQU  esc_send_xon 00001baf
+EQU  t_esc_send_xon 00001baa
+EQU  l_esc_send_xon 00001baf
+EQU  l_esc_flow   00001baf
+EQU  x_wait_ser_data 00001bb9
+EQU  l_esc_read_buf 00001bb8
+EQU  esc_read_direct 00001bb8
+EQU  t_esc_read_direct 00001bb6
+EQU  l_esc_read_direct 00001bb8
+EQU  read_abort   00001bcb
+EQU  t_read_abort 00001bbd
+EQU  esc_read_load 00001bc6
+EQU  t_esc_read_load 00001bc1
+EQU  l_esc_read_load 00001bcb
+CSEG eep_close_err 00001bc9
+EQU  l_read_abort 00001bcb
+CSEG load_hex     00001bcc
+EQU  load_a_f     00001bd5
+EQU  t_load_a_f   00001bd0
+CSEG inv_hex      00001bd6
+EQU  l_load_a_f   00001bd5
+EQU  discard_serial 00001be0
+EQU  disc_read_buf 00001c02
+EQU  t_disc_read_buf 00001be6
+EQU  disc_flow    00001bf9
+EQU  t_disc_flow  00001bf0
+EQU  disc_send_xon 00001bf9
+EQU  t_disc_send_xon 00001bf4
+EQU  l_disc_send_xon 00001bf9
+EQU  l_disc_flow  00001bf9
+EQU  disc_read_keepalive 00001c01
+EQU  t_disc_read_keepalive 00001bff
+EQU  l_disc_read_keepalive 00001c01
+EQU  l_disc_read_buf 00001c0e
+EQU  disc_read_direct 00001c0e
+EQU  t_disc_read_direct 00001c06
+EQU  disc_read_keepalive2 00001c0e
+EQU  t_disc_read_keepalive2 00001c0c
+EQU  l_disc_read_keepalive2 00001c0e
+EQU  l_disc_read_direct 00001c0e
+EQU  disc_timer_update 00001c1d
+EQU  t_disc_timer_update 00001c12
+EQU  disc_esc_timer_update 00001c1d
+EQU  t_disc_esc_timer_update 00001c18
+EQU  l_disc_esc_timer_update 00001c1d
+EQU  l_disc_timer_update 00001c1d
+EQU  x_discard_serial 00001c22
+EQU  eep_get_free 00001c3e
+EQU  eep_inc_free 00001c48
+EQU  t_eep_inc_free 00001c43
+EQU  eep_100_free 00001c48
+EQU  t_eep_100_free 00001c45
+EQU  l_eep_100_free 00001c48
+EQU  l_eep_inc_free 00001c48
+EQU  eep_list     00001c50
+EQU  eep_pslots   00001c51
+EQU  eep_next     00001c5c
+EQU  t_eep_next   00001c56
+EQU  eep_inc_same 00001c59
+EQU  t_eep_inc_same 00001c58
+EQU  l_eep_inc_same 00001c59
+EQU  eep_find_low 00001c5c
+EQU  t_eep_find_low 00001c5a
+EQU  l_eep_find_low 00001c5c
+EQU  l_eep_next   00001c5c
+EQU  x_eep_list   00001c70
+EQU  eep_list_index 00001c68
+EQU  t_eep_list_index 00001c63
+EQU  l_eep_list_index 00001c68
+EQU  eep_no_auto  00001c80
+EQU  t_eep_no_auto 00001c7c
+EQU  l_eep_no_auto 00001c94
+EQU  eep_auto_info_string 00001c94
+EQU  t_eep_auto_info_string 00001c87
+EQU  eep_auto_info_str2 00001c8b
+EQU  l_eep_auto_info_string 00001c94
+EQU  eep_auto_wait 00001c9b
+EQU  x_eep_auto_wait 00001c9d
diff --git a/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_emu.obj b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_emu.obj
new file mode 100644
index 00000000..2009ff82
Binary files /dev/null and b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/6502_emu.obj differ
diff --git a/trunk/AVRProjects/AVR_6502/6502_Emu_328p/avrBuild.bat b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/avrBuild.bat
new file mode 100644
index 00000000..9eb427f2
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/avrBuild.bat
@@ -0,0 +1 @@
+avrasm2 -fI -W+ie -C V2E 6502_emu.asm -o 6502_emu.hex -d 6502_emu.obj -e 6502_emu.eep -w -m 6502_emu.map -S labels.tmp -l 6502_emu.lst
diff --git a/trunk/AVRProjects/AVR_6502/6502_Emu_328p/labels.tmp b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/labels.tmp
new file mode 100644
index 00000000..5c213c5e
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/labels.tmp
@@ -0,0 +1,395 @@
+<ASSEMBLER_INFO>
+ <VERSION>2.1.43</VERSION>
+ <DEVICE>ATmega32</DEVICE>
+ <WORKING_DIR>E:\0_AVRProjects\AVR_6502\6502_Emu_328p</WORKING_DIR>
+ <INCLUDE_PATH>
+  <DIR></DIR>
+ </INCLUDE_PATH>
+ <SOURCE_FILE>6502_emu.asm</SOURCE_FILE>
+ <INCLUDED_FILES>
+  <FILE>sam.inc</FILE>
+  <FILE>6502_Emu_config.inc</FILE>
+  <FILE>m32def.inc</FILE>
+  <FILE>6502_Emu_NMOS.inc</FILE>
+  <FILE>6502_Emu_IO.inc</FILE>
+ </INCLUDED_FILES>
+ <OBJECT_FILES>
+  <FILE>6502_emu.obj</FILE>
+ </OBJECT_FILES>
+ <HEX_FILES>
+  <FILE>6502_emu.hex</FILE>
+  <FILE>6502_emu.eep</FILE>
+ </HEX_FILES>
+ <OUTPUT_FILES>
+  <FILE>6502_emu.map</FILE>
+  <FILE>6502_emu.lst</FILE>
+ </OUTPUT_FILES>
+ <LABELS>
+  <eep_string><FILE>6502_emu.asm</FILE><LINE>211</LINE></eep_string>
+  <eep_auto><FILE>6502_emu.asm</FILE><LINE>214</LINE></eep_auto>
+  <eep_pat><FILE>6502_emu.asm</FILE><LINE>215</LINE></eep_pat>
+  <cmd_buf><FILE>6502_emu.asm</FILE><LINE>230</LINE></cmd_buf>
+  <cmd_end><FILE>6502_emu.asm</FILE><LINE>231</LINE></cmd_end>
+  <cmd_inx><FILE>6502_emu.asm</FILE><LINE>232</LINE></cmd_inx>
+  <cmd_esc_timer><FILE>6502_emu.asm</FILE><LINE>233</LINE></cmd_esc_timer>
+  <cmd_reg_timer><FILE>6502_emu.asm</FILE><LINE>235</LINE></cmd_reg_timer>
+  <lmem_display><FILE>6502_emu.asm</FILE><LINE>237</LINE></lmem_display>
+  <lmem_write><FILE>6502_emu.asm</FILE><LINE>239</LINE></lmem_write>
+  <lmem_disas><FILE>6502_emu.asm</FILE><LINE>240</LINE></lmem_disas>
+  <sp_save><FILE>6502_emu.asm</FILE><LINE>241</LINE></sp_save>
+  <adr_limit><FILE>6502_emu.asm</FILE><LINE>242</LINE></adr_limit>
+  <rstflag><FILE>6502_emu.asm</FILE><LINE>243</LINE></rstflag>
+  <prog_num><FILE>6502_emu.asm</FILE><LINE>244</LINE></prog_num>
+  <brkpt_lo><FILE>6502_emu.asm</FILE><LINE>245</LINE></brkpt_lo>
+  <brkpt_hi><FILE>6502_emu.asm</FILE><LINE>246</LINE></brkpt_hi>
+  <brkpt_op><FILE>6502_emu.asm</FILE><LINE>247</LINE></brkpt_op>
+  <irq_mask><FILE>6502_emu.asm</FILE><LINE>250</LINE></irq_mask>
+  <irq_flag><FILE>6502_emu.asm</FILE><LINE>252</LINE></irq_flag>
+  <timer_ena><FILE>6502_emu.asm</FILE><LINE>255</LINE></timer_ena>
+  <t1_adr><FILE>6502_emu.asm</FILE><LINE>256</LINE></t1_adr>
+  <t1_ctrl><FILE>6502_emu.asm</FILE><LINE>257</LINE></t1_ctrl>
+  <tcdn_count><FILE>6502_emu.asm</FILE><LINE>259</LINE></tcdn_count>
+  <tcdn_top><FILE>6502_emu.asm</FILE><LINE>260</LINE></tcdn_top>
+  <selftest><FILE>6502_emu.asm</FILE><LINE>262</LINE></selftest>
+  <i2c_statreg><FILE>6502_emu.asm</FILE><LINE>264</LINE></i2c_statreg>
+  <lcd_flags><FILE>6502_emu.asm</FILE><LINE>268</LINE></lcd_flags>
+  <spi_cmd><FILE>6502_emu.asm</FILE><LINE>271</LINE></spi_cmd>
+  <spi_rdat><FILE>6502_emu.asm</FILE><LINE>272</LINE></spi_rdat>
+  <dma_last_cmd><FILE>6502_emu.asm</FILE><LINE>275</LINE></dma_last_cmd>
+  <dma_tab_index><FILE>6502_emu.asm</FILE><LINE>278</LINE></dma_tab_index>
+  <dma_tab><FILE>6502_emu.asm</FILE><LINE>286</LINE></dma_tab>
+  <usart_ena><FILE>6502_emu.asm</FILE><LINE>289</LINE></usart_ena>
+  <tx_inx><FILE>6502_emu.asm</FILE><LINE>290</LINE></tx_inx>
+  <tx_fill><FILE>6502_emu.asm</FILE><LINE>291</LINE></tx_fill>
+  <rx_inx><FILE>6502_emu.asm</FILE><LINE>292</LINE></rx_inx>
+  <rx_fill><FILE>6502_emu.asm</FILE><LINE>293</LINE></rx_fill>
+  <flow_cmd><FILE>6502_emu.asm</FILE><LINE>294</LINE></flow_cmd>
+  <tx_buf><FILE>6502_emu.asm</FILE><LINE>296</LINE></tx_buf>
+  <rx_buf><FILE>6502_emu.asm</FILE><LINE>297</LINE></rx_buf>
+  <reset><FILE>6502_emu.asm</FILE><LINE>881</LINE></reset>
+  <NMI><FILE>6502_Emu_NMOS.inc</FILE><LINE>744</LINE></NMI>
+  <IRQ><FILE>6502_Emu_NMOS.inc</FILE><LINE>670</LINE></IRQ>
+  <illegalint><FILE>6502_emu.asm</FILE><LINE>663</LINE></illegalint>
+  <t1_icr><FILE>6502_Emu_IO.inc</FILE><LINE>890</LINE></t1_icr>
+  <t1_ocra><FILE>6502_Emu_IO.inc</FILE><LINE>878</LINE></t1_ocra>
+  <t1_ocrb><FILE>6502_Emu_IO.inc</FILE><LINE>884</LINE></t1_ocrb>
+  <t1_ovi><FILE>6502_Emu_IO.inc</FILE><LINE>872</LINE></t1_ovi>
+  <t0_cmi><FILE>6502_emu.asm</FILE><LINE>671</LINE></t0_cmi>
+  <t0_ovi><FILE>6502_emu.asm</FILE><LINE>737</LINE></t0_ovi>
+  <rx_int><FILE>6502_emu.asm</FILE><LINE>475</LINE></rx_int>
+  <tx_udre><FILE>6502_emu.asm</FILE><LINE>552</LINE></tx_udre>
+  <crlf><FILE>6502_emu.asm</FILE><LINE>2065</LINE></crlf>
+  <load_wait><FILE>6502_emu.asm</FILE><LINE>617</LINE></load_wait>
+  <load_abort><FILE>6502_emu.asm</FILE><LINE>618</LINE></load_abort>
+  <rs_vect_empty><FILE>6502_emu.asm</FILE><LINE>620</LINE></rs_vect_empty>
+  <reset_msg><FILE>6502_emu.asm</FILE><LINE>621</LINE></reset_msg>
+  <bpt_clrd_msg><FILE>6502_emu.asm</FILE><LINE>622</LINE></bpt_clrd_msg>
+  <bpt_info><FILE>6502_emu.asm</FILE><LINE>623</LINE></bpt_info>
+  <bpt_slot_full><FILE>6502_emu.asm</FILE><LINE>625</LINE></bpt_slot_full>
+  <load_ok><FILE>6502_emu.asm</FILE><LINE>627</LINE></load_ok>
+  <err_nonhex><FILE>6502_emu.asm</FILE><LINE>628</LINE></err_nonhex>
+  <err_func><FILE>6502_emu.asm</FILE><LINE>629</LINE></err_func>
+  <illegal_int><FILE>6502_emu.asm</FILE><LINE>630</LINE></illegal_int>
+  <back_line><FILE>6502_emu.asm</FILE><LINE>631</LINE></back_line>
+  <dis_opcode><FILE>6502_Emu_NMOS.inc</FILE><LINE>61</LINE></dis_opcode>
+  <oc_tab><FILE>6502_Emu_NMOS.inc</FILE><LINE>1290</LINE></oc_tab>
+  <ASL_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>844</LINE></ASL_s>
+  <CLC_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>852</LINE></CLC_s>
+  <CLD_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>859</LINE></CLD_s>
+  <CLI_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>866</LINE></CLI_s>
+  <CLV_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>881</LINE></CLV_s>
+  <DEX_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>888</LINE></DEX_s>
+  <DEY_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>897</LINE></DEY_s>
+  <INX_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>906</LINE></INX_s>
+  <INY_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>915</LINE></INY_s>
+  <LSR_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>924</LINE></LSR_s>
+  <NOP_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>932</LINE></NOP_s>
+  <PHA_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>939</LINE></PHA_s>
+  <PHP_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>954</LINE></PHP_s>
+  <PLA_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>976</LINE></PLA_s>
+  <PLP_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>988</LINE></PLP_s>
+  <ROL_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>1009</LINE></ROL_s>
+  <ROR_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>1018</LINE></ROR_s>
+  <SEC_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>1027</LINE></SEC_s>
+  <SED_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>1034</LINE></SED_s>
+  <SEI_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>1041</LINE></SEI_s>
+  <TAX_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>1055</LINE></TAX_s>
+  <TAY_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>1063</LINE></TAY_s>
+  <TSX_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>1071</LINE></TSX_s>
+  <TXA_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>1079</LINE></TXA_s>
+  <TXS_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>1087</LINE></TXS_s>
+  <TYA_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>1095</LINE></TYA_s>
+  <BCC_r><FILE>6502_Emu_NMOS.inc</FILE><LINE>1110</LINE></BCC_r>
+  <BCS_r><FILE>6502_Emu_NMOS.inc</FILE><LINE>1114</LINE></BCS_r>
+  <BEQ_r><FILE>6502_Emu_NMOS.inc</FILE><LINE>1118</LINE></BEQ_r>
+  <BMI_r><FILE>6502_Emu_NMOS.inc</FILE><LINE>1122</LINE></BMI_r>
+  <BNE_r><FILE>6502_Emu_NMOS.inc</FILE><LINE>1126</LINE></BNE_r>
+  <BPL_r><FILE>6502_Emu_NMOS.inc</FILE><LINE>1130</LINE></BPL_r>
+  <BVC_r><FILE>6502_Emu_NMOS.inc</FILE><LINE>1134</LINE></BVC_r>
+  <BVS_r><FILE>6502_Emu_NMOS.inc</FILE><LINE>1138</LINE></BVS_r>
+  <JMP_i><FILE>6502_Emu_NMOS.inc</FILE><LINE>1142</LINE></JMP_i>
+  <JMP_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1154</LINE></JMP_a>
+  <JSR_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1164</LINE></JSR_a>
+  <RTS_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>1192</LINE></RTS_s>
+  <RTI_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>1206</LINE></RTI_s>
+  <BRK_s><FILE>6502_Emu_NMOS.inc</FILE><LINE>1232</LINE></BRK_s>
+  <illegalop><FILE>6502_Emu_NMOS.inc</FILE><LINE>1553</LINE></illegalop>
+  <ORA_m><FILE>6502_Emu_NMOS.inc</FILE><LINE>1761</LINE></ORA_m>
+  <ORA_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1758</LINE></ORA_a>
+  <ASL_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1813</LINE></ASL_a>
+  <AND_m><FILE>6502_Emu_NMOS.inc</FILE><LINE>1615</LINE></AND_m>
+  <BIT_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1625</LINE></BIT_a>
+  <AND_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1612</LINE></AND_a>
+  <ROL_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1841</LINE></ROL_a>
+  <EOR_m><FILE>6502_Emu_NMOS.inc</FILE><LINE>1701</LINE></EOR_m>
+  <EOR_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1698</LINE></EOR_a>
+  <LSR_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1827</LINE></LSR_a>
+  <ADC_m><FILE>6502_Emu_NMOS.inc</FILE><LINE>1582</LINE></ADC_m>
+  <ADC_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1579</LINE></ADC_a>
+  <ROR_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1856</LINE></ROR_a>
+  <STY_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1925</LINE></STY_a>
+  <STA_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1911</LINE></STA_a>
+  <STX_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1918</LINE></STX_a>
+  <LDY_m><FILE>6502_Emu_NMOS.inc</FILE><LINE>1745</LINE></LDY_m>
+  <LDX_m><FILE>6502_Emu_NMOS.inc</FILE><LINE>1732</LINE></LDX_m>
+  <LDA_m><FILE>6502_Emu_NMOS.inc</FILE><LINE>1719</LINE></LDA_m>
+  <LDY_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1742</LINE></LDY_a>
+  <LDA_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1716</LINE></LDA_a>
+  <LDX_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1729</LINE></LDX_a>
+  <CPY_m><FILE>6502_Emu_NMOS.inc</FILE><LINE>1683</LINE></CPY_m>
+  <CMP_m><FILE>6502_Emu_NMOS.inc</FILE><LINE>1653</LINE></CMP_m>
+  <CPY_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1680</LINE></CPY_a>
+  <CMP_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1650</LINE></CMP_a>
+  <DEC_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1871</LINE></DEC_a>
+  <CPX_m><FILE>6502_Emu_NMOS.inc</FILE><LINE>1668</LINE></CPX_m>
+  <SBC_m><FILE>6502_Emu_NMOS.inc</FILE><LINE>1781</LINE></SBC_m>
+  <CPX_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1665</LINE></CPX_a>
+  <SBC_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1778</LINE></SBC_a>
+  <INC_a><FILE>6502_Emu_NMOS.inc</FILE><LINE>1886</LINE></INC_a>
+  <deb_inv_op><FILE>6502_emu.asm</FILE><LINE>778</LINE></deb_inv_op>
+  <ADC_o><FILE>6502_Emu_NMOS.inc</FILE><LINE>1581</LINE></ADC_o>
+  <ioread><FILE>6502_Emu_IO.inc</FILE><LINE>378</LINE></ioread>
+  <ADC_d><FILE>6502_Emu_NMOS.inc</FILE><LINE>1594</LINE></ADC_d>
+  <ADC_d3><FILE>6502_Emu_NMOS.inc</FILE><LINE>1592</LINE></ADC_d3>
+  <ADC_d2><FILE>6502_Emu_NMOS.inc</FILE><LINE>1601</LINE></ADC_d2>
+  <AND_o><FILE>6502_Emu_NMOS.inc</FILE><LINE>1614</LINE></AND_o>
+  <BIT_m><FILE>6502_Emu_NMOS.inc</FILE><LINE>1628</LINE></BIT_m>
+  <BIT_o><FILE>6502_Emu_NMOS.inc</FILE><LINE>1627</LINE></BIT_o>
+  <CMP_o><FILE>6502_Emu_NMOS.inc</FILE><LINE>1652</LINE></CMP_o>
+  <CPX_o><FILE>6502_Emu_NMOS.inc</FILE><LINE>1667</LINE></CPX_o>
+  <CPY_o><FILE>6502_Emu_NMOS.inc</FILE><LINE>1682</LINE></CPY_o>
+  <EOR_o><FILE>6502_Emu_NMOS.inc</FILE><LINE>1700</LINE></EOR_o>
+  <LDA_o><FILE>6502_Emu_NMOS.inc</FILE><LINE>1718</LINE></LDA_o>
+  <LDX_o><FILE>6502_Emu_NMOS.inc</FILE><LINE>1731</LINE></LDX_o>
+  <LDY_o><FILE>6502_Emu_NMOS.inc</FILE><LINE>1744</LINE></LDY_o>
+  <ORA_o><FILE>6502_Emu_NMOS.inc</FILE><LINE>1760</LINE></ORA_o>
+  <SBC_o><FILE>6502_Emu_NMOS.inc</FILE><LINE>1780</LINE></SBC_o>
+  <SBC_d><FILE>6502_Emu_NMOS.inc</FILE><LINE>1799</LINE></SBC_d>
+  <SBC_d2><FILE>6502_Emu_NMOS.inc</FILE><LINE>1796</LINE></SBC_d2>
+  <ASL_o><FILE>6502_Emu_NMOS.inc</FILE><LINE>1815</LINE></ASL_o>
+  <ASL_m><FILE>6502_Emu_NMOS.inc</FILE><LINE>1816</LINE></ASL_m>
+  <iomodify><FILE>6502_Emu_IO.inc</FILE><LINE>376</LINE></iomodify>
+  <iowrite><FILE>6502_Emu_IO.inc</FILE><LINE>387</LINE></iowrite>
+  <LSR_o><FILE>6502_Emu_NMOS.inc</FILE><LINE>1829</LINE></LSR_o>
+  <LSR_m><FILE>6502_Emu_NMOS.inc</FILE><LINE>1830</LINE></LSR_m>
+  <ROL_o><FILE>6502_Emu_NMOS.inc</FILE><LINE>1843</LINE></ROL_o>
+  <ROL_m><FILE>6502_Emu_NMOS.inc</FILE><LINE>1844</LINE></ROL_m>
+  <ROR_o><FILE>6502_Emu_NMOS.inc</FILE><LINE>1858</LINE></ROR_o>
+  <ROR_m><FILE>6502_Emu_NMOS.inc</FILE><LINE>1859</LINE></ROR_m>
+  <DEC_o><FILE>6502_Emu_NMOS.inc</FILE><LINE>1873</LINE></DEC_o>
+  <DEC_m><FILE>6502_Emu_NMOS.inc</FILE><LINE>1874</LINE></DEC_m>
+  <INC_o><FILE>6502_Emu_NMOS.inc</FILE><LINE>1888</LINE></INC_o>
+  <INC_m><FILE>6502_Emu_NMOS.inc</FILE><LINE>1889</LINE></INC_m>
+  <STA_o><FILE>6502_Emu_NMOS.inc</FILE><LINE>1913</LINE></STA_o>
+  <STX_o><FILE>6502_Emu_NMOS.inc</FILE><LINE>1920</LINE></STX_o>
+  <STY_o><FILE>6502_Emu_NMOS.inc</FILE><LINE>1927</LINE></STY_o>
+  <ior_tab><FILE>6502_Emu_config.inc</FILE><LINE>194</LINE></ior_tab>
+  <iow_tab><FILE>6502_Emu_config.inc</FILE><LINE>213</LINE></iow_tab>
+  <io_reset><FILE>6502_Emu_IO.inc</FILE><LINE>400</LINE></io_reset>
+  <rs_IO_ext><FILE>6502_emu.asm</FILE><LINE>820</LINE></rs_IO_ext>
+  <t1_rs><FILE>6502_Emu_IO.inc</FILE><LINE>864</LINE></t1_rs>
+  <irq_rs><FILE>6502_Emu_IO.inc</FILE><LINE>1115</LINE></irq_rs>
+  <lcd_rs><FILE>6502_Emu_IO.inc</FILE><LINE>508</LINE></lcd_rs>
+  <spi_rs><FILE>6502_Emu_IO.inc</FILE><LINE>1288</LINE></spi_rs>
+  <i2c_rs><FILE>6502_Emu_IO.inc</FILE><LINE>1804</LINE></i2c_rs>
+  <ltch_rs><FILE>6502_Emu_config.inc</FILE><LINE>364</LINE></ltch_rs>
+  <lcd_rd><FILE>6502_Emu_IO.inc</FILE><LINE>464</LINE></lcd_rd>
+  <ir_retry><FILE>6502_Emu_IO.inc</FILE><LINE>1136</LINE></ir_retry>
+  <lcd_wrt><FILE>6502_Emu_IO.inc</FILE><LINE>485</LINE></lcd_wrt>
+  <iw_retry><FILE>6502_Emu_IO.inc</FILE><LINE>1141</LINE></iw_retry>
+  <iw_exit><FILE>6502_Emu_IO.inc</FILE><LINE>1147</LINE></iw_exit>
+  <lcd_rs_force><FILE>6502_Emu_IO.inc</FILE><LINE>568</LINE></lcd_rs_force>
+  <lcd_init><FILE>6502_Emu_IO.inc</FILE><LINE>559</LINE></lcd_init>
+  <lcd_rs_wrt><FILE>6502_Emu_IO.inc</FILE><LINE>576</LINE></lcd_rs_wrt>
+  <lcd_rs_rd><FILE>6502_Emu_IO.inc</FILE><LINE>599</LINE></lcd_rs_rd>
+  <lcd_fail><FILE>6502_Emu_IO.inc</FILE><LINE>565</LINE></lcd_fail>
+  <prtstr><FILE>6502_emu.asm</FILE><LINE>2071</LINE></prtstr>
+  <lcd_rs_fwrt><FILE>6502_Emu_IO.inc</FILE><LINE>594</LINE></lcd_rs_fwrt>
+  <acia_rx><FILE>6502_Emu_IO.inc</FILE><LINE>630</LINE></acia_rx>
+  <acia_tx><FILE>6502_Emu_IO.inc</FILE><LINE>721</LINE></acia_tx>
+  <iw_retry_ext><FILE>6502_Emu_IO.inc</FILE><LINE>744</LINE></iw_retry_ext>
+  <t1r_adr><FILE>6502_Emu_IO.inc</FILE><LINE>801</LINE></t1r_adr>
+  <t1w_adr><FILE>6502_Emu_IO.inc</FILE><LINE>806</LINE></t1w_adr>
+  <t1r_data><FILE>6502_Emu_IO.inc</FILE><LINE>810</LINE></t1r_data>
+  <t1w_data><FILE>6502_Emu_IO.inc</FILE><LINE>830</LINE></t1w_data>
+  <tcdn_r><FILE>6502_Emu_IO.inc</FILE><LINE>901</LINE></tcdn_r>
+  <tcdn_w><FILE>6502_Emu_IO.inc</FILE><LINE>906</LINE></tcdn_w>
+  <ir_mask><FILE>6502_Emu_IO.inc</FILE><LINE>920</LINE></ir_mask>
+  <iw_mask><FILE>6502_Emu_IO.inc</FILE><LINE>925</LINE></iw_mask>
+  <ir_flag><FILE>6502_Emu_IO.inc</FILE><LINE>959</LINE></ir_flag>
+  <iw_flag><FILE>6502_Emu_IO.inc</FILE><LINE>967</LINE></iw_flag>
+  <ir_vector><FILE>6502_Emu_IO.inc</FILE><LINE>1001</LINE></ir_vector>
+  <ir_diag><FILE>6502_Emu_IO.inc</FILE><LINE>1049</LINE></ir_diag>
+  <iw_diag><FILE>6502_Emu_IO.inc</FILE><LINE>1058</LINE></iw_diag>
+  <debugger><FILE>6502_emu.asm</FILE><LINE>1070</LINE></debugger>
+  <diag_reset><FILE>6502_Emu_IO.inc</FILE><LINE>1109</LINE></diag_reset>
+  <soft_reset><FILE>6502_emu.asm</FILE><LINE>2164</LINE></soft_reset>
+  <ir_exit><FILE>6502_Emu_IO.inc</FILE><LINE>1154</LINE></ir_exit>
+  <rs_exit><FILE>6502_Emu_IO.inc</FILE><LINE>1156</LINE></rs_exit>
+  <spr_data><FILE>6502_Emu_IO.inc</FILE><LINE>1256</LINE></spr_data>
+  <io65xx_rd><FILE>6502_Emu_config.inc</FILE><LINE>374</LINE></io65xx_rd>
+  <ltch_rd><FILE>6502_Emu_config.inc</FILE><LINE>354</LINE></ltch_rd>
+  <iorE0><FILE>6502_Emu_config.inc</FILE><LINE>334</LINE></iorE0>
+  <iordreg><FILE>6502_Emu_IO.inc</FILE><LINE>1176</LINE></iordreg>
+  <spw_data><FILE>6502_Emu_IO.inc</FILE><LINE>1232</LINE></spw_data>
+  <io65xx_wrt><FILE>6502_Emu_config.inc</FILE><LINE>378</LINE></io65xx_wrt>
+  <ltch_wrt><FILE>6502_Emu_config.inc</FILE><LINE>359</LINE></ltch_wrt>
+  <iowE0><FILE>6502_Emu_config.inc</FILE><LINE>337</LINE></iowE0>
+  <iowtreg><FILE>6502_Emu_IO.inc</FILE><LINE>1180</LINE></iowtreg>
+  <iorE0_tab><FILE>6502_Emu_config.inc</FILE><LINE>236</LINE></iorE0_tab>
+  <iowE0_tab><FILE>6502_Emu_config.inc</FILE><LINE>256</LINE></iowE0_tab>
+  <ior_int_tab><FILE>6502_Emu_config.inc</FILE><LINE>277</LINE></ior_int_tab>
+  <i2c_stat><FILE>6502_Emu_IO.inc</FILE><LINE>1788</LINE></i2c_stat>
+  <i2c_data_rd><FILE>6502_Emu_IO.inc</FILE><LINE>1630</LINE></i2c_data_rd>
+  <spr_dat_lst><FILE>6502_Emu_IO.inc</FILE><LINE>1282</LINE></spr_dat_lst>
+  <dmr_stat><FILE>6502_Emu_IO.inc</FILE><LINE>1524</LINE></dmr_stat>
+  <dmr_data><FILE>6502_Emu_IO.inc</FILE><LINE>1552</LINE></dmr_data>
+  <iow_int_tab><FILE>6502_Emu_config.inc</FILE><LINE>296</LINE></iow_int_tab>
+  <i2c_cmd><FILE>6502_Emu_IO.inc</FILE><LINE>1725</LINE></i2c_cmd>
+  <i2c_data_wrt><FILE>6502_Emu_IO.inc</FILE><LINE>1657</LINE></i2c_data_wrt>
+  <spw_cmd><FILE>6502_Emu_IO.inc</FILE><LINE>1205</LINE></spw_cmd>
+  <dmw_cmd><FILE>6502_Emu_IO.inc</FILE><LINE>1488</LINE></dmw_cmd>
+  <dmw_data><FILE>6502_Emu_IO.inc</FILE><LINE>1530</LINE></dmw_data>
+  <spi_vss><FILE>6502_Emu_config.inc</FILE><LINE>322</LINE></spi_vss>
+  <spi_fail><FILE>6502_Emu_IO.inc</FILE><LINE>1308</LINE></spi_fail>
+  <dma_spi_rb><FILE>6502_Emu_IO.inc</FILE><LINE>1311</LINE></dma_spi_rb>
+  <dma_spi_rb1><FILE>6502_Emu_IO.inc</FILE><LINE>1336</LINE></dma_spi_rb1>
+  <dma_spi_wb><FILE>6502_Emu_IO.inc</FILE><LINE>1394</LINE></dma_spi_wb>
+  <dma_spi_wb1><FILE>6502_Emu_IO.inc</FILE><LINE>1419</LINE></dma_spi_wb1>
+  <dma_ct_end><FILE>6502_Emu_IO.inc</FILE><LINE>1510</LINE></dma_ct_end>
+  <dma_cmd_tab><FILE>6502_Emu_IO.inc</FILE><LINE>1501</LINE></dma_cmd_tab>
+  <dma_cmd_inv><FILE>6502_Emu_IO.inc</FILE><LINE>1498</LINE></dma_cmd_inv>
+  <dma_set_tab><FILE>6502_Emu_IO.inc</FILE><LINE>1518</LINE></dma_set_tab>
+  <dma_i2c_wb><FILE>6502_Emu_IO.inc</FILE><LINE>1905</LINE></dma_i2c_wb>
+  <dma_i2c_rb><FILE>6502_Emu_IO.inc</FILE><LINE>1817</LINE></dma_i2c_rb>
+  <dma_eep_save><FILE>6502_Emu_IO.inc</FILE><LINE>2582</LINE></dma_eep_save>
+  <dma_eep_load><FILE>6502_Emu_IO.inc</FILE><LINE>2669</LINE></dma_eep_load>
+  <i2c_open><FILE>6502_Emu_IO.inc</FILE><LINE>1615</LINE></i2c_open>
+  <i2c_open_rs><FILE>6502_Emu_IO.inc</FILE><LINE>1617</LINE></i2c_open_rs>
+  <i2c_putack><FILE>6502_Emu_IO.inc</FILE><LINE>2155</LINE></i2c_putack>
+  <i2c_read><FILE>6502_Emu_IO.inc</FILE><LINE>2138</LINE></i2c_read>
+  <i2c_start><FILE>6502_Emu_IO.inc</FILE><LINE>2096</LINE></i2c_start>
+  <i2c_stop><FILE>6502_Emu_IO.inc</FILE><LINE>2170</LINE></i2c_stop>
+  <i2c_write><FILE>6502_Emu_IO.inc</FILE><LINE>2108</LINE></i2c_write>
+  <i2c_send_stop><FILE>6502_Emu_IO.inc</FILE><LINE>1758</LINE></i2c_send_stop>
+  <i2c_cmd_exit><FILE>6502_Emu_IO.inc</FILE><LINE>1753</LINE></i2c_cmd_exit>
+  <i2c_reset><FILE>6502_Emu_IO.inc</FILE><LINE>2062</LINE></i2c_reset>
+  <i2c_reset_rs><FILE>6502_Emu_IO.inc</FILE><LINE>2064</LINE></i2c_reset_rs>
+  <i2c_fail><FILE>6502_Emu_IO.inc</FILE><LINE>1814</LINE></i2c_fail>
+  <dma_i2c_rb1><FILE>6502_Emu_IO.inc</FILE><LINE>1839</LINE></dma_i2c_rb1>
+  <dma_i2c_rbfail><FILE>6502_Emu_IO.inc</FILE><LINE>1836</LINE></dma_i2c_rbfail>
+  <dma_i2c_wb1><FILE>6502_Emu_IO.inc</FILE><LINE>1927</LINE></dma_i2c_wb1>
+  <dma_i2c_rwfail><FILE>6502_Emu_IO.inc</FILE><LINE>1924</LINE></dma_i2c_rwfail>
+  <i_wrtloop><FILE>6502_Emu_IO.inc</FILE><LINE>2110</LINE></i_wrtloop>
+  <i_wrt0><FILE>6502_Emu_IO.inc</FILE><LINE>2116</LINE></i_wrt0>
+  <i_wrt1><FILE>6502_Emu_IO.inc</FILE><LINE>2118</LINE></i_wrt1>
+  <i2c_getack><FILE>6502_Emu_IO.inc</FILE><LINE>2125</LINE></i2c_getack>
+  <i_rdloop><FILE>6502_Emu_IO.inc</FILE><LINE>2139</LINE></i_rdloop>
+  <i_pack1><FILE>6502_Emu_IO.inc</FILE><LINE>2161</LINE></i_pack1>
+  <i_pack2><FILE>6502_Emu_IO.inc</FILE><LINE>2163</LINE></i_pack2>
+  <eep_open><FILE>6502_Emu_IO.inc</FILE><LINE>2197</LINE></eep_open>
+  <eep_no_device><FILE>6502_Emu_IO.inc</FILE><LINE>2235</LINE></eep_no_device>
+  <err_no_eep><FILE>6502_Emu_IO.inc</FILE><LINE>2793</LINE></err_no_eep>
+  <skip_main><FILE>6502_emu.asm</FILE><LINE>2960</LINE></skip_main>
+  <eep_write><FILE>6502_Emu_IO.inc</FILE><LINE>2241</LINE></eep_write>
+  <eep_full><FILE>6502_Emu_IO.inc</FILE><LINE>2328</LINE></eep_full>
+  <err_eep_full><FILE>6502_Emu_IO.inc</FILE><LINE>2791</LINE></err_eep_full>
+  <eep_write_err><FILE>6502_Emu_IO.inc</FILE><LINE>2333</LINE></eep_write_err>
+  <eep_int_close><FILE>6502_Emu_IO.inc</FILE><LINE>2390</LINE></eep_int_close>
+  <discard_serial_stream><FILE>6502_emu.asm</FILE><LINE>2884</LINE></discard_serial_stream>
+  <eep_write_close><FILE>6502_Emu_IO.inc</FILE><LINE>2346</LINE></eep_write_close>
+  <eep_close><FILE>6502_Emu_IO.inc</FILE><LINE>2365</LINE></eep_close>
+  <eep_load_prog><FILE>6502_Emu_IO.inc</FILE><LINE>2418</LINE></eep_load_prog>
+  <eep_prog><FILE>6502_Emu_IO.inc</FILE><LINE>2788</LINE></eep_prog>
+  <PrintHex><FILE>6502_emu.asm</FILE><LINE>2081</LINE></PrintHex>
+  <eep_notfound><FILE>6502_Emu_IO.inc</FILE><LINE>2787</LINE></eep_notfound>
+  <eep_read><FILE>6502_Emu_IO.inc</FILE><LINE>2515</LINE></eep_read>
+  <bad_format><FILE>6502_Emu_IO.inc</FILE><LINE>2801</LINE></bad_format>
+  <eep_loaded><FILE>6502_Emu_IO.inc</FILE><LINE>2789</LINE></eep_loaded>
+  <eep_read_overrun><FILE>6502_Emu_IO.inc</FILE><LINE>2572</LINE></eep_read_overrun>
+  <err_corrupt><FILE>6502_Emu_IO.inc</FILE><LINE>2797</LINE></err_corrupt>
+  <eep_app_read_exit><FILE>6502_Emu_IO.inc</FILE><LINE>2777</LINE></eep_app_read_exit>
+  <eep_saved><FILE>6502_Emu_IO.inc</FILE><LINE>2790</LINE></eep_saved>
+  <eep_app_read_exit2><FILE>6502_Emu_IO.inc</FILE><LINE>2768</LINE></eep_app_read_exit2>
+  <eep_info1><FILE>6502_Emu_IO.inc</FILE><LINE>2782</LINE></eep_info1>
+  <eep_info2><FILE>6502_Emu_IO.inc</FILE><LINE>2783</LINE></eep_info2>
+  <eep_info3><FILE>6502_Emu_IO.inc</FILE><LINE>2784</LINE></eep_info3>
+  <eep_info4><FILE>6502_Emu_IO.inc</FILE><LINE>2785</LINE></eep_info4>
+  <eep_none><FILE>6502_Emu_IO.inc</FILE><LINE>2786</LINE></eep_none>
+  <save_wait><FILE>6502_Emu_IO.inc</FILE><LINE>2798</LINE></save_wait>
+  <save_ok><FILE>6502_Emu_IO.inc</FILE><LINE>2799</LINE></save_ok>
+  <save_abort><FILE>6502_Emu_IO.inc</FILE><LINE>2800</LINE></save_abort>
+  <end_command><FILE>6502_emu.asm</FILE><LINE>2000</LINE></end_command>
+  <brkpt_chk_pc><FILE>6502_emu.asm</FILE><LINE>2716</LINE></brkpt_chk_pc>
+  <show_regs><FILE>6502_emu.asm</FILE><LINE>2221</LINE></show_regs>
+  <inv_instr><FILE>6502_emu.asm</FILE><LINE>3108</LINE></inv_instr>
+  <emu_msg><FILE>6502_emu.asm</FILE><LINE>3110</LINE></emu_msg>
+  <built_msg><FILE>6502_emu.asm</FILE><LINE>3111</LINE></built_msg>
+  <load_reset_vector><FILE>6502_emu.asm</FILE><LINE>2197</LINE></load_reset_vector>
+  <end_exit><FILE>6502_emu.asm</FILE><LINE>2012</LINE></end_exit>
+  <PrintChr><FILE>6502_emu.asm</FILE><LINE>2092</LINE></PrintChr>
+  <show_prompt><FILE>6502_emu.asm</FILE><LINE>2279</LINE></show_prompt>
+  <erase2eol><FILE>6502_emu.asm</FILE><LINE>2048</LINE></erase2eol>
+  <escape><FILE>6502_emu.asm</FILE><LINE>2056</LINE></escape>
+  <space><FILE>6502_emu.asm</FILE><LINE>2059</LINE></space>
+  <disasm><FILE>6502_emu.asm</FILE><LINE>2300</LINE></disasm>
+  <emu_start><FILE>6502_emu.asm</FILE><LINE>1922</LINE></emu_start>
+  <get_byte><FILE>6502_emu.asm</FILE><LINE>2480</LINE></get_byte>
+  <get_adr><FILE>6502_emu.asm</FILE><LINE>2528</LINE></get_adr>
+  <invalid_command><FILE>6502_emu.asm</FILE><LINE>1973</LINE></invalid_command>
+  <brkpt_info><FILE>6502_emu.asm</FILE><LINE>2593</LINE></brkpt_info>
+  <br_inv_cmd><FILE>6502_emu.asm</FILE><LINE>1449</LINE></br_inv_cmd>
+  <brkpt_clr_all><FILE>6502_emu.asm</FILE><LINE>2639</LINE></brkpt_clr_all>
+  <bpt_info_none><FILE>6502_emu.asm</FILE><LINE>3119</LINE></bpt_info_none>
+  <brkpt_clr_one><FILE>6502_emu.asm</FILE><LINE>2658</LINE></brkpt_clr_one>
+  <eep_auto_info><FILE>6502_emu.asm</FILE><LINE>3054</LINE></eep_auto_info>
+  <eep_cmd_info><FILE>6502_emu.asm</FILE><LINE>2990</LINE></eep_cmd_info>
+  <read_serial_esc><FILE>6502_emu.asm</FILE><LINE>2790</LINE></read_serial_esc>
+  <read_byte_esc><FILE>6502_emu.asm</FILE><LINE>2977</LINE></read_byte_esc>
+  <eep_prsv><FILE>6502_emu.asm</FILE><LINE>1578</LINE></eep_prsv>
+  <err_chksum><FILE>6502_emu.asm</FILE><LINE>3114</LINE></err_chksum>
+  <eep_inv_cmd><FILE>6502_emu.asm</FILE><LINE>1595</LINE></eep_inv_cmd>
+  <get_wbyte><FILE>6502_emu.asm</FILE><LINE>2504</LINE></get_wbyte>
+  <eep_auto_write><FILE>6502_emu.asm</FILE><LINE>3090</LINE></eep_auto_write>
+  <eep_auto_invalid><FILE>6502_emu.asm</FILE><LINE>1686</LINE></eep_auto_invalid>
+  <skip_get_adr><FILE>6502_emu.asm</FILE><LINE>1734</LINE></skip_get_adr>
+  <colon><FILE>6502_emu.asm</FILE><LINE>2062</LINE></colon>
+  <brkpt_chk><FILE>6502_emu.asm</FILE><LINE>2687</LINE></brkpt_chk>
+  <RevHex><FILE>6502_emu.asm</FILE><LINE>2024</LINE></RevHex>
+  <get_wadr><FILE>6502_emu.asm</FILE><LINE>2558</LINE></get_wadr>
+  <brkpt_chk_write><FILE>6502_emu.asm</FILE><LINE>2751</LINE></brkpt_chk_write>
+  <revx_dgt><FILE>6502_emu.asm</FILE><LINE>2028</LINE></revx_dgt>
+  <RevChr><FILE>6502_emu.asm</FILE><LINE>2034</LINE></RevChr>
+  <esc91><FILE>6502_emu.asm</FILE><LINE>2052</LINE></esc91>
+  <prtc><FILE>6502_emu.asm</FILE><LINE>2102</LINE></prtc>
+  <prtx_dgt><FILE>6502_emu.asm</FILE><LINE>2085</LINE></prtx_dgt>
+  <dis_rel><FILE>6502_emu.asm</FILE><LINE>2440</LINE></dis_rel>
+  <get_hex><FILE>6502_emu.asm</FILE><LINE>2464</LINE></get_hex>
+  <inv_cmd><FILE>6502_emu.asm</FILE><LINE>2515</LINE></inv_cmd>
+  <br_chkp_exit><FILE>6502_emu.asm</FILE><LINE>2740</LINE></br_chkp_exit>
+  <br_chkw_exit><FILE>6502_emu.asm</FILE><LINE>2774</LINE></br_chkw_exit>
+  <eep_close_err><FILE>6502_emu.asm</FILE><LINE>2848</LINE></eep_close_err>
+  <load_hex><FILE>6502_emu.asm</FILE><LINE>2859</LINE></load_hex>
+  <inv_hex><FILE>6502_emu.asm</FILE><LINE>2872</LINE></inv_hex>
+ </LABELS>
+</ASSEMBLER_INFO>
diff --git a/trunk/AVRProjects/AVR_6502/6502_Emu_328p/license.txt b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/license.txt
new file mode 100644
index 00000000..818433ec
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/license.txt
@@ -0,0 +1,674 @@
+                    GNU GENERAL PUBLIC LICENSE
+                       Version 3, 29 June 2007
+
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diff --git a/trunk/AVRProjects/AVR_6502/6502_Emu_328p/m32def.inc b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/m32def.inc
new file mode 100644
index 00000000..82f5b930
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/m32def.inc
@@ -0,0 +1,815 @@
+;***** THIS IS A MACHINE GENERATED FILE - DO NOT EDIT ********************
+;***** Created: 2011-02-09 12:03 ******* Source: ATmega32.xml ************
+;*************************************************************************
+;* A P P L I C A T I O N   N O T E   F O R   T H E   A V R   F A M I L Y
+;* 
+;* Number            : AVR000
+;* File Name         : "m32def.inc"
+;* Title             : Register/Bit Definitions for the ATmega32
+;* Date              : 2011-02-09
+;* Version           : 2.35
+;* Support E-mail    : avr@atmel.com
+;* Target MCU        : ATmega32
+;* 
+;* DESCRIPTION
+;* When including this file in the assembly program file, all I/O register 
+;* names and I/O register bit names appearing in the data book can be used.
+;* In addition, the six registers forming the three data pointers X, Y and 
+;* Z have been assigned names XL - ZH. Highest RAM address for Internal 
+;* SRAM is also defined 
+;* 
+;* The Register names are represented by their hexadecimal address.
+;* 
+;* The Register Bit names are represented by their bit number (0-7).
+;* 
+;* Please observe the difference in using the bit names with instructions
+;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc"
+;* (skip if bit in register set/cleared). The following example illustrates
+;* this:
+;* 
+;* in    r16,PORTB             ;read PORTB latch
+;* sbr   r16,(1<<PB6)+(1<<PB5) ;set PB6 and PB5 (use masks, not bit#)
+;* out   PORTB,r16             ;output to PORTB
+;* 
+;* in    r16,TIFR              ;read the Timer Interrupt Flag Register
+;* sbrc  r16,TOV0              ;test the overflow flag (use bit#)
+;* rjmp  TOV0_is_set           ;jump if set
+;* ...                         ;otherwise do something else
+;*************************************************************************
+
+#ifndef _M32DEF_INC_
+#define _M32DEF_INC_
+
+
+#pragma partinc 0
+
+; ***** SPECIFY DEVICE ***************************************************
+.device ATmega32
+#pragma AVRPART ADMIN PART_NAME ATmega32
+.equ	SIGNATURE_000	= 0x1e
+.equ	SIGNATURE_001	= 0x95
+.equ	SIGNATURE_002	= 0x02
+
+#pragma AVRPART CORE CORE_VERSION V2E
+
+
+; ***** I/O REGISTER DEFINITIONS *****************************************
+; NOTE:
+; Definitions marked "MEMORY MAPPED"are extended I/O ports
+; and cannot be used with IN/OUT instructions
+.equ	SREG	= 0x3f
+.equ	SPL	= 0x3d
+.equ	SPH	= 0x3e
+.equ	OCR0	= 0x3c
+.equ	GICR	= 0x3b
+.equ	GIFR	= 0x3a
+.equ	TIMSK	= 0x39
+.equ	TIFR	= 0x38
+.equ	SPMCR	= 0x37
+.equ	TWCR	= 0x36
+.equ	MCUCR	= 0x35
+.equ	MCUCSR	= 0x34
+.equ	TCCR0	= 0x33
+.equ	TCNT0	= 0x32
+.equ	OSCCAL	= 0x31
+.equ	OCDR	= 0x31
+.equ	SFIOR	= 0x30
+.equ	TCCR1A	= 0x2f
+.equ	TCCR1B	= 0x2e
+.equ	TCNT1L	= 0x2c
+.equ	TCNT1H	= 0x2d
+.equ	OCR1AL	= 0x2a
+.equ	OCR1AH	= 0x2b
+.equ	OCR1BL	= 0x28
+.equ	OCR1BH	= 0x29
+.equ	ICR1L	= 0x26
+.equ	ICR1H	= 0x27
+.equ	TCCR2	= 0x25
+.equ	TCNT2	= 0x24
+.equ	OCR2	= 0x23
+.equ	ASSR	= 0x22
+.equ	WDTCR	= 0x21
+.equ	UBRRH	= 0x20
+.equ	UCSRC	= 0x20
+.equ	EEARL	= 0x1e
+.equ	EEARH	= 0x1f
+.equ	EEDR	= 0x1d
+.equ	EECR	= 0x1c
+.equ	PORTA	= 0x1b
+.equ	DDRA	= 0x1a
+.equ	PINA	= 0x19
+.equ	PORTB	= 0x18
+.equ	DDRB	= 0x17
+.equ	PINB	= 0x16
+.equ	PORTC	= 0x15
+.equ	DDRC	= 0x14
+.equ	PINC	= 0x13
+.equ	PORTD	= 0x12
+.equ	DDRD	= 0x11
+.equ	PIND	= 0x10
+.equ	SPDR	= 0x0f
+.equ	SPSR	= 0x0e
+.equ	SPCR	= 0x0d
+.equ	UDR	= 0x0c
+.equ	UCSRA	= 0x0b
+.equ	UCSRB	= 0x0a
+.equ	UBRRL	= 0x09
+.equ	ACSR	= 0x08
+.equ	ADMUX	= 0x07
+.equ	ADCSRA	= 0x06
+.equ	ADCH	= 0x05
+.equ	ADCL	= 0x04
+.equ	TWDR	= 0x03
+.equ	TWAR	= 0x02
+.equ	TWSR	= 0x01
+.equ	TWBR	= 0x00
+
+
+; ***** BIT DEFINITIONS **************************************************
+
+; ***** EEPROM ***********************
+; EEDR - EEPROM Data Register
+.equ	EEDR0	= 0	; EEPROM Data Register bit 0
+.equ	EEDR1	= 1	; EEPROM Data Register bit 1
+.equ	EEDR2	= 2	; EEPROM Data Register bit 2
+.equ	EEDR3	= 3	; EEPROM Data Register bit 3
+.equ	EEDR4	= 4	; EEPROM Data Register bit 4
+.equ	EEDR5	= 5	; EEPROM Data Register bit 5
+.equ	EEDR6	= 6	; EEPROM Data Register bit 6
+.equ	EEDR7	= 7	; EEPROM Data Register bit 7
+
+; EECR - EEPROM Control Register
+.equ	EERE	= 0	; EEPROM Read Enable
+.equ	EEWE	= 1	; EEPROM Write Enable
+.equ	EEMWE	= 2	; EEPROM Master Write Enable
+.equ	EERIE	= 3	; EEPROM Ready Interrupt Enable
+
+
+; ***** WATCHDOG *********************
+; WDTCR - Watchdog Timer Control Register
+.equ	WDP0	= 0	; Watch Dog Timer Prescaler bit 0
+.equ	WDP1	= 1	; Watch Dog Timer Prescaler bit 1
+.equ	WDP2	= 2	; Watch Dog Timer Prescaler bit 2
+.equ	WDE	= 3	; Watch Dog Enable
+.equ	WDTOE	= 4	; RW
+.equ	WDDE	= WDTOE	; For compatibility
+
+
+; ***** EXTERNAL_INTERRUPT ***********
+; GICR - General Interrupt Control Register
+.equ	GIMSK	= GICR	; For compatibility
+.equ	IVCE	= 0	; Interrupt Vector Change Enable
+.equ	IVSEL	= 1	; Interrupt Vector Select
+.equ	INT2	= 5	; External Interrupt Request 2 Enable
+.equ	INT0	= 6	; External Interrupt Request 0 Enable
+.equ	INT1	= 7	; External Interrupt Request 1 Enable
+
+; GIFR - General Interrupt Flag Register
+.equ	INTF2	= 5	; External Interrupt Flag 2
+.equ	INTF0	= 6	; External Interrupt Flag 0
+.equ	INTF1	= 7	; External Interrupt Flag 1
+
+; MCUCR - General Interrupt Control Register
+.equ	ISC00	= 0	; Interrupt Sense Control 0 Bit 0
+.equ	ISC01	= 1	; Interrupt Sense Control 0 Bit 1
+.equ	ISC10	= 2	; Interrupt Sense Control 1 Bit 0
+.equ	ISC11	= 3	; Interrupt Sense Control 1 Bit 1
+
+; MCUCSR - MCU Control And Status Register
+.equ	ISC2	= 6	; Interrupt Sense Control 2
+
+
+; ***** TIMER_COUNTER_0 **************
+; TCCR0 - Timer/Counter Control Register
+.equ	CS00	= 0	; Clock Select 1
+.equ	CS01	= 1	; Clock Select 1
+.equ	CS02	= 2	; Clock Select 2
+.equ	WGM01	= 3	; Waveform Generation Mode 1
+.equ	CTC0	= WGM01	; For compatibility
+.equ	COM00	= 4	; Compare match Output Mode 0
+.equ	COM01	= 5	; Compare Match Output Mode 1
+.equ	WGM00	= 6	; Waveform Generation Mode
+.equ	PWM0	= WGM00	; For compatibility
+.equ	FOC0	= 7	; Force Output Compare
+
+; TCNT0 - Timer/Counter Register
+.equ	TCNT0_0	= 0	; 
+.equ	TCNT0_1	= 1	; 
+.equ	TCNT0_2	= 2	; 
+.equ	TCNT0_3	= 3	; 
+.equ	TCNT0_4	= 4	; 
+.equ	TCNT0_5	= 5	; 
+.equ	TCNT0_6	= 6	; 
+.equ	TCNT0_7	= 7	; 
+
+; OCR0 - Output Compare Register
+.equ	OCR0_0	= 0	; 
+.equ	OCR0_1	= 1	; 
+.equ	OCR0_2	= 2	; 
+.equ	OCR0_3	= 3	; 
+.equ	OCR0_4	= 4	; 
+.equ	OCR0_5	= 5	; 
+.equ	OCR0_6	= 6	; 
+.equ	OCR0_7	= 7	; 
+
+; TIMSK - Timer/Counter Interrupt Mask Register
+.equ	TOIE0	= 0	; Timer/Counter0 Overflow Interrupt Enable
+.equ	OCIE0	= 1	; Timer/Counter0 Output Compare Match Interrupt register
+
+; TIFR - Timer/Counter Interrupt Flag register
+.equ	TOV0	= 0	; Timer/Counter0 Overflow Flag
+.equ	OCF0	= 1	; Output Compare Flag 0
+
+
+; ***** TIMER_COUNTER_2 **************
+; TIMSK - Timer/Counter Interrupt Mask register
+.equ	TOIE2	= 6	; Timer/Counter2 Overflow Interrupt Enable
+.equ	OCIE2	= 7	; Timer/Counter2 Output Compare Match Interrupt Enable
+
+; TIFR - Timer/Counter Interrupt Flag Register
+.equ	TOV2	= 6	; Timer/Counter2 Overflow Flag
+.equ	OCF2	= 7	; Output Compare Flag 2
+
+; TCCR2 - Timer/Counter2 Control Register
+.equ	CS20	= 0	; Clock Select bit 0
+.equ	CS21	= 1	; Clock Select bit 1
+.equ	CS22	= 2	; Clock Select bit 2
+.equ	WGM21	= 3	; Clear Timer/Counter2 on Compare Match
+.equ	CTC2	= WGM21	; For compatibility
+.equ	COM20	= 4	; Compare Output Mode bit 0
+.equ	COM21	= 5	; Compare Output Mode bit 1
+.equ	WGM20	= 6	; Pulse Width Modulator Enable
+.equ	PWM2	= WGM20	; For compatibility
+.equ	FOC2	= 7	; Force Output Compare
+
+; TCNT2 - Timer/Counter2
+.equ	TCNT2_0	= 0	; Timer/Counter 2 bit 0
+.equ	TCNT2_1	= 1	; Timer/Counter 2 bit 1
+.equ	TCNT2_2	= 2	; Timer/Counter 2 bit 2
+.equ	TCNT2_3	= 3	; Timer/Counter 2 bit 3
+.equ	TCNT2_4	= 4	; Timer/Counter 2 bit 4
+.equ	TCNT2_5	= 5	; Timer/Counter 2 bit 5
+.equ	TCNT2_6	= 6	; Timer/Counter 2 bit 6
+.equ	TCNT2_7	= 7	; Timer/Counter 2 bit 7
+
+; OCR2 - Timer/Counter2 Output Compare Register
+.equ	OCR2_0	= 0	; Timer/Counter2 Output Compare Register Bit 0
+.equ	OCR2_1	= 1	; Timer/Counter2 Output Compare Register Bit 1
+.equ	OCR2_2	= 2	; Timer/Counter2 Output Compare Register Bit 2
+.equ	OCR2_3	= 3	; Timer/Counter2 Output Compare Register Bit 3
+.equ	OCR2_4	= 4	; Timer/Counter2 Output Compare Register Bit 4
+.equ	OCR2_5	= 5	; Timer/Counter2 Output Compare Register Bit 5
+.equ	OCR2_6	= 6	; Timer/Counter2 Output Compare Register Bit 6
+.equ	OCR2_7	= 7	; Timer/Counter2 Output Compare Register Bit 7
+
+; ASSR - Asynchronous Status Register
+.equ	TCR2UB	= 0	; Timer/counter Control Register2 Update Busy
+.equ	OCR2UB	= 1	; Output Compare Register2 Update Busy
+.equ	TCN2UB	= 2	; Timer/Counter2 Update Busy
+.equ	AS2	= 3	; Asynchronous Timer/counter2
+
+
+; ***** TIMER_COUNTER_1 **************
+; TIMSK - Timer/Counter Interrupt Mask Register
+.equ	TOIE1	= 2	; Timer/Counter1 Overflow Interrupt Enable
+.equ	OCIE1B	= 3	; Timer/Counter1 Output CompareB Match Interrupt Enable
+.equ	OCIE1A	= 4	; Timer/Counter1 Output CompareA Match Interrupt Enable
+.equ	TICIE1	= 5	; Timer/Counter1 Input Capture Interrupt Enable
+
+; TIFR - Timer/Counter Interrupt Flag register
+.equ	TOV1	= 2	; Timer/Counter1 Overflow Flag
+.equ	OCF1B	= 3	; Output Compare Flag 1B
+.equ	OCF1A	= 4	; Output Compare Flag 1A
+.equ	ICF1	= 5	; Input Capture Flag 1
+
+; TCCR1A - Timer/Counter1 Control Register A
+.equ	WGM10	= 0	; Waveform Generation Mode
+.equ	PWM10	= WGM10	; For compatibility
+.equ	WGM11	= 1	; Waveform Generation Mode
+.equ	PWM11	= WGM11	; For compatibility
+.equ	FOC1B	= 2	; Force Output Compare 1B
+.equ	FOC1A	= 3	; Force Output Compare 1A
+.equ	COM1B0	= 4	; Compare Output Mode 1B, bit 0
+.equ	COM1B1	= 5	; Compare Output Mode 1B, bit 1
+.equ	COM1A0	= 6	; Compare Ouput Mode 1A, bit 0
+.equ	COM1A1	= 7	; Compare Output Mode 1A, bit 1
+
+; TCCR1B - Timer/Counter1 Control Register B
+.equ	CS10	= 0	; Prescaler source of Timer/Counter 1
+.equ	CS11	= 1	; Prescaler source of Timer/Counter 1
+.equ	CS12	= 2	; Prescaler source of Timer/Counter 1
+.equ	WGM12	= 3	; Waveform Generation Mode
+.equ	CTC10	= WGM12	; For compatibility
+.equ	CTC1	= WGM12	; For compatibility
+.equ	WGM13	= 4	; Waveform Generation Mode
+.equ	CTC11	= WGM13	; For compatibility
+.equ	ICES1	= 6	; Input Capture 1 Edge Select
+.equ	ICNC1	= 7	; Input Capture 1 Noise Canceler
+
+
+; ***** SPI **************************
+; SPDR - SPI Data Register
+.equ	SPDR0	= 0	; SPI Data Register bit 0
+.equ	SPDR1	= 1	; SPI Data Register bit 1
+.equ	SPDR2	= 2	; SPI Data Register bit 2
+.equ	SPDR3	= 3	; SPI Data Register bit 3
+.equ	SPDR4	= 4	; SPI Data Register bit 4
+.equ	SPDR5	= 5	; SPI Data Register bit 5
+.equ	SPDR6	= 6	; SPI Data Register bit 6
+.equ	SPDR7	= 7	; SPI Data Register bit 7
+
+; SPSR - SPI Status Register
+.equ	SPI2X	= 0	; Double SPI Speed Bit
+.equ	WCOL	= 6	; Write Collision Flag
+.equ	SPIF	= 7	; SPI Interrupt Flag
+
+; SPCR - SPI Control Register
+.equ	SPR0	= 0	; SPI Clock Rate Select 0
+.equ	SPR1	= 1	; SPI Clock Rate Select 1
+.equ	CPHA	= 2	; Clock Phase
+.equ	CPOL	= 3	; Clock polarity
+.equ	MSTR	= 4	; Master/Slave Select
+.equ	DORD	= 5	; Data Order
+.equ	SPE	= 6	; SPI Enable
+.equ	SPIE	= 7	; SPI Interrupt Enable
+
+
+; ***** USART ************************
+; UDR - USART I/O Data Register
+.equ	UDR0	= 0	; USART I/O Data Register bit 0
+.equ	UDR1	= 1	; USART I/O Data Register bit 1
+.equ	UDR2	= 2	; USART I/O Data Register bit 2
+.equ	UDR3	= 3	; USART I/O Data Register bit 3
+.equ	UDR4	= 4	; USART I/O Data Register bit 4
+.equ	UDR5	= 5	; USART I/O Data Register bit 5
+.equ	UDR6	= 6	; USART I/O Data Register bit 6
+.equ	UDR7	= 7	; USART I/O Data Register bit 7
+
+; UCSRA - USART Control and Status Register A
+.equ	USR	= UCSRA	; For compatibility
+.equ	MPCM	= 0	; Multi-processor Communication Mode
+.equ	U2X	= 1	; Double the USART transmission speed
+.equ	UPE	= 2	; Parity Error
+.equ	PE	= UPE	; For compatibility
+.equ	DOR	= 3	; Data overRun
+.equ	FE	= 4	; Framing Error
+.equ	UDRE	= 5	; USART Data Register Empty
+.equ	TXC	= 6	; USART Transmitt Complete
+.equ	RXC	= 7	; USART Receive Complete
+
+; UCSRB - USART Control and Status Register B
+.equ	UCR	= UCSRB	; For compatibility
+.equ	TXB8	= 0	; Transmit Data Bit 8
+.equ	RXB8	= 1	; Receive Data Bit 8
+.equ	UCSZ2	= 2	; Character Size
+.equ	CHR9	= UCSZ2	; For compatibility
+.equ	TXEN	= 3	; Transmitter Enable
+.equ	RXEN	= 4	; Receiver Enable
+.equ	UDRIE	= 5	; USART Data register Empty Interrupt Enable
+.equ	TXCIE	= 6	; TX Complete Interrupt Enable
+.equ	RXCIE	= 7	; RX Complete Interrupt Enable
+
+; UCSRC - USART Control and Status Register C
+.equ	UCPOL	= 0	; Clock Polarity
+.equ	UCSZ0	= 1	; Character Size
+.equ	UCSZ1	= 2	; Character Size
+.equ	USBS	= 3	; Stop Bit Select
+.equ	UPM0	= 4	; Parity Mode Bit 0
+.equ	UPM1	= 5	; Parity Mode Bit 1
+.equ	UMSEL	= 6	; USART Mode Select
+.equ	URSEL	= 7	; Register Select
+
+.equ	UBRRHI	= UBRRH	; For compatibility
+
+; ***** ANALOG_COMPARATOR ************
+; SFIOR - Special Function IO Register
+.equ	ACME	= 3	; Analog Comparator Multiplexer Enable
+
+; ACSR - Analog Comparator Control And Status Register
+.equ	ACIS0	= 0	; Analog Comparator Interrupt Mode Select bit 0
+.equ	ACIS1	= 1	; Analog Comparator Interrupt Mode Select bit 1
+.equ	ACIC	= 2	; Analog Comparator Input Capture Enable
+.equ	ACIE	= 3	; Analog Comparator Interrupt Enable
+.equ	ACI	= 4	; Analog Comparator Interrupt Flag
+.equ	ACO	= 5	; Analog Compare Output
+.equ	ACBG	= 6	; Analog Comparator Bandgap Select
+.equ	ACD	= 7	; Analog Comparator Disable
+
+
+; ***** AD_CONVERTER *****************
+; ADMUX - The ADC multiplexer Selection Register
+.equ	MUX0	= 0	; Analog Channel and Gain Selection Bits
+.equ	MUX1	= 1	; Analog Channel and Gain Selection Bits
+.equ	MUX2	= 2	; Analog Channel and Gain Selection Bits
+.equ	MUX3	= 3	; Analog Channel and Gain Selection Bits
+.equ	MUX4	= 4	; Analog Channel and Gain Selection Bits
+.equ	ADLAR	= 5	; Left Adjust Result
+.equ	REFS0	= 6	; Reference Selection Bit 0
+.equ	REFS1	= 7	; Reference Selection Bit 1
+
+; ADCSRA - The ADC Control and Status register
+.equ	ADCSR	= ADCSRA	; For compatibility
+.equ	ADPS0	= 0	; ADC  Prescaler Select Bits
+.equ	ADPS1	= 1	; ADC  Prescaler Select Bits
+.equ	ADPS2	= 2	; ADC  Prescaler Select Bits
+.equ	ADIE	= 3	; ADC Interrupt Enable
+.equ	ADIF	= 4	; ADC Interrupt Flag
+.equ	ADATE	= 5	; When this bit is written to one,the Timer/Counter2 prescaler will be reset.The bit will be cleared by hardware after the operation is performed.Writing a zero to this bit will have no effect.This bit will always be read as zero if Timer/Counter2 is clocked by the internal CPU clock.If this bit is written when Timer/Counter2 is operating in asynchronous mode,the bit will remain one until the prescaler has been reset.
+.equ	ADFR	= ADATE	; For compatibility
+.equ	ADSC	= 6	; ADC Start Conversion
+.equ	ADEN	= 7	; ADC Enable
+
+; ADCH - ADC Data Register High Byte
+.equ	ADCH0	= 0	; ADC Data Register High Byte Bit 0
+.equ	ADCH1	= 1	; ADC Data Register High Byte Bit 1
+.equ	ADCH2	= 2	; ADC Data Register High Byte Bit 2
+.equ	ADCH3	= 3	; ADC Data Register High Byte Bit 3
+.equ	ADCH4	= 4	; ADC Data Register High Byte Bit 4
+.equ	ADCH5	= 5	; ADC Data Register High Byte Bit 5
+.equ	ADCH6	= 6	; ADC Data Register High Byte Bit 6
+.equ	ADCH7	= 7	; ADC Data Register High Byte Bit 7
+
+; ADCL - ADC Data Register Low Byte
+.equ	ADCL0	= 0	; ADC Data Register Low Byte Bit 0
+.equ	ADCL1	= 1	; ADC Data Register Low Byte Bit 1
+.equ	ADCL2	= 2	; ADC Data Register Low Byte Bit 2
+.equ	ADCL3	= 3	; ADC Data Register Low Byte Bit 3
+.equ	ADCL4	= 4	; ADC Data Register Low Byte Bit 4
+.equ	ADCL5	= 5	; ADC Data Register Low Byte Bit 5
+.equ	ADCL6	= 6	; ADC Data Register Low Byte Bit 6
+.equ	ADCL7	= 7	; ADC Data Register Low Byte Bit 7
+
+; SFIOR - Special Function IO Register
+.equ	ADTS0	= 5	; ADC Auto Trigger Source 0
+.equ	ADTS1	= 6	; ADC Auto Trigger Source 1
+.equ	ADTS2	= 7	; ADC Auto Trigger Source 2
+
+
+; ***** PORTA ************************
+; PORTA - Port A Data Register
+.equ	PORTA0	= 0	; Port A Data Register bit 0
+.equ	PA0	= 0	; For compatibility
+.equ	PORTA1	= 1	; Port A Data Register bit 1
+.equ	PA1	= 1	; For compatibility
+.equ	PORTA2	= 2	; Port A Data Register bit 2
+.equ	PA2	= 2	; For compatibility
+.equ	PORTA3	= 3	; Port A Data Register bit 3
+.equ	PA3	= 3	; For compatibility
+.equ	PORTA4	= 4	; Port A Data Register bit 4
+.equ	PA4	= 4	; For compatibility
+.equ	PORTA5	= 5	; Port A Data Register bit 5
+.equ	PA5	= 5	; For compatibility
+.equ	PORTA6	= 6	; Port A Data Register bit 6
+.equ	PA6	= 6	; For compatibility
+.equ	PORTA7	= 7	; Port A Data Register bit 7
+.equ	PA7	= 7	; For compatibility
+
+; DDRA - Port A Data Direction Register
+.equ	DDA0	= 0	; Data Direction Register, Port A, bit 0
+.equ	DDA1	= 1	; Data Direction Register, Port A, bit 1
+.equ	DDA2	= 2	; Data Direction Register, Port A, bit 2
+.equ	DDA3	= 3	; Data Direction Register, Port A, bit 3
+.equ	DDA4	= 4	; Data Direction Register, Port A, bit 4
+.equ	DDA5	= 5	; Data Direction Register, Port A, bit 5
+.equ	DDA6	= 6	; Data Direction Register, Port A, bit 6
+.equ	DDA7	= 7	; Data Direction Register, Port A, bit 7
+
+; PINA - Port A Input Pins
+.equ	PINA0	= 0	; Input Pins, Port A bit 0
+.equ	PINA1	= 1	; Input Pins, Port A bit 1
+.equ	PINA2	= 2	; Input Pins, Port A bit 2
+.equ	PINA3	= 3	; Input Pins, Port A bit 3
+.equ	PINA4	= 4	; Input Pins, Port A bit 4
+.equ	PINA5	= 5	; Input Pins, Port A bit 5
+.equ	PINA6	= 6	; Input Pins, Port A bit 6
+.equ	PINA7	= 7	; Input Pins, Port A bit 7
+
+
+; ***** PORTB ************************
+; PORTB - Port B Data Register
+.equ	PORTB0	= 0	; Port B Data Register bit 0
+.equ	PB0	= 0	; For compatibility
+.equ	PORTB1	= 1	; Port B Data Register bit 1
+.equ	PB1	= 1	; For compatibility
+.equ	PORTB2	= 2	; Port B Data Register bit 2
+.equ	PB2	= 2	; For compatibility
+.equ	PORTB3	= 3	; Port B Data Register bit 3
+.equ	PB3	= 3	; For compatibility
+.equ	PORTB4	= 4	; Port B Data Register bit 4
+.equ	PB4	= 4	; For compatibility
+.equ	PORTB5	= 5	; Port B Data Register bit 5
+.equ	PB5	= 5	; For compatibility
+.equ	PORTB6	= 6	; Port B Data Register bit 6
+.equ	PB6	= 6	; For compatibility
+.equ	PORTB7	= 7	; Port B Data Register bit 7
+.equ	PB7	= 7	; For compatibility
+
+; DDRB - Port B Data Direction Register
+.equ	DDB0	= 0	; Port B Data Direction Register bit 0
+.equ	DDB1	= 1	; Port B Data Direction Register bit 1
+.equ	DDB2	= 2	; Port B Data Direction Register bit 2
+.equ	DDB3	= 3	; Port B Data Direction Register bit 3
+.equ	DDB4	= 4	; Port B Data Direction Register bit 4
+.equ	DDB5	= 5	; Port B Data Direction Register bit 5
+.equ	DDB6	= 6	; Port B Data Direction Register bit 6
+.equ	DDB7	= 7	; Port B Data Direction Register bit 7
+
+; PINB - Port B Input Pins
+.equ	PINB0	= 0	; Port B Input Pins bit 0
+.equ	PINB1	= 1	; Port B Input Pins bit 1
+.equ	PINB2	= 2	; Port B Input Pins bit 2
+.equ	PINB3	= 3	; Port B Input Pins bit 3
+.equ	PINB4	= 4	; Port B Input Pins bit 4
+.equ	PINB5	= 5	; Port B Input Pins bit 5
+.equ	PINB6	= 6	; Port B Input Pins bit 6
+.equ	PINB7	= 7	; Port B Input Pins bit 7
+
+
+; ***** PORTC ************************
+; PORTC - Port C Data Register
+.equ	PORTC0	= 0	; Port C Data Register bit 0
+.equ	PC0	= 0	; For compatibility
+.equ	PORTC1	= 1	; Port C Data Register bit 1
+.equ	PC1	= 1	; For compatibility
+.equ	PORTC2	= 2	; Port C Data Register bit 2
+.equ	PC2	= 2	; For compatibility
+.equ	PORTC3	= 3	; Port C Data Register bit 3
+.equ	PC3	= 3	; For compatibility
+.equ	PORTC4	= 4	; Port C Data Register bit 4
+.equ	PC4	= 4	; For compatibility
+.equ	PORTC5	= 5	; Port C Data Register bit 5
+.equ	PC5	= 5	; For compatibility
+.equ	PORTC6	= 6	; Port C Data Register bit 6
+.equ	PC6	= 6	; For compatibility
+.equ	PORTC7	= 7	; Port C Data Register bit 7
+.equ	PC7	= 7	; For compatibility
+
+; DDRC - Port C Data Direction Register
+.equ	DDC0	= 0	; Port C Data Direction Register bit 0
+.equ	DDC1	= 1	; Port C Data Direction Register bit 1
+.equ	DDC2	= 2	; Port C Data Direction Register bit 2
+.equ	DDC3	= 3	; Port C Data Direction Register bit 3
+.equ	DDC4	= 4	; Port C Data Direction Register bit 4
+.equ	DDC5	= 5	; Port C Data Direction Register bit 5
+.equ	DDC6	= 6	; Port C Data Direction Register bit 6
+.equ	DDC7	= 7	; Port C Data Direction Register bit 7
+
+; PINC - Port C Input Pins
+.equ	PINC0	= 0	; Port C Input Pins bit 0
+.equ	PINC1	= 1	; Port C Input Pins bit 1
+.equ	PINC2	= 2	; Port C Input Pins bit 2
+.equ	PINC3	= 3	; Port C Input Pins bit 3
+.equ	PINC4	= 4	; Port C Input Pins bit 4
+.equ	PINC5	= 5	; Port C Input Pins bit 5
+.equ	PINC6	= 6	; Port C Input Pins bit 6
+.equ	PINC7	= 7	; Port C Input Pins bit 7
+
+
+; ***** PORTD ************************
+; PORTD - Port D Data Register
+.equ	PORTD0	= 0	; Port D Data Register bit 0
+.equ	PD0	= 0	; For compatibility
+.equ	PORTD1	= 1	; Port D Data Register bit 1
+.equ	PD1	= 1	; For compatibility
+.equ	PORTD2	= 2	; Port D Data Register bit 2
+.equ	PD2	= 2	; For compatibility
+.equ	PORTD3	= 3	; Port D Data Register bit 3
+.equ	PD3	= 3	; For compatibility
+.equ	PORTD4	= 4	; Port D Data Register bit 4
+.equ	PD4	= 4	; For compatibility
+.equ	PORTD5	= 5	; Port D Data Register bit 5
+.equ	PD5	= 5	; For compatibility
+.equ	PORTD6	= 6	; Port D Data Register bit 6
+.equ	PD6	= 6	; For compatibility
+.equ	PORTD7	= 7	; Port D Data Register bit 7
+.equ	PD7	= 7	; For compatibility
+
+; DDRD - Port D Data Direction Register
+.equ	DDD0	= 0	; Port D Data Direction Register bit 0
+.equ	DDD1	= 1	; Port D Data Direction Register bit 1
+.equ	DDD2	= 2	; Port D Data Direction Register bit 2
+.equ	DDD3	= 3	; Port D Data Direction Register bit 3
+.equ	DDD4	= 4	; Port D Data Direction Register bit 4
+.equ	DDD5	= 5	; Port D Data Direction Register bit 5
+.equ	DDD6	= 6	; Port D Data Direction Register bit 6
+.equ	DDD7	= 7	; Port D Data Direction Register bit 7
+
+; PIND - Port D Input Pins
+.equ	PIND0	= 0	; Port D Input Pins bit 0
+.equ	PIND1	= 1	; Port D Input Pins bit 1
+.equ	PIND2	= 2	; Port D Input Pins bit 2
+.equ	PIND3	= 3	; Port D Input Pins bit 3
+.equ	PIND4	= 4	; Port D Input Pins bit 4
+.equ	PIND5	= 5	; Port D Input Pins bit 5
+.equ	PIND6	= 6	; Port D Input Pins bit 6
+.equ	PIND7	= 7	; Port D Input Pins bit 7
+
+
+; ***** CPU **************************
+; SREG - Status Register
+.equ	SREG_C	= 0	; Carry Flag
+.equ	SREG_Z	= 1	; Zero Flag
+.equ	SREG_N	= 2	; Negative Flag
+.equ	SREG_V	= 3	; Two's Complement Overflow Flag
+.equ	SREG_S	= 4	; Sign Bit
+.equ	SREG_H	= 5	; Half Carry Flag
+.equ	SREG_T	= 6	; Bit Copy Storage
+.equ	SREG_I	= 7	; Global Interrupt Enable
+
+; MCUCR - MCU Control Register
+;.equ	ISC00	= 0	; Interrupt Sense Control 0 Bit 0
+;.equ	ISC01	= 1	; Interrupt Sense Control 0 Bit 1
+;.equ	ISC10	= 2	; Interrupt Sense Control 1 Bit 0
+;.equ	ISC11	= 3	; Interrupt Sense Control 1 Bit 1
+.equ	SM0	= 4	; Sleep Mode Select
+.equ	SM1	= 5	; Sleep Mode Select
+.equ	SM2	= 6	; Sleep Mode Select
+.equ	SE	= 7	; Sleep Enable
+
+; MCUCSR - MCU Control And Status Register
+.equ	MCUSR	= MCUCSR	; For compatibility
+.equ	PORF	= 0	; Power-on reset flag
+.equ	EXTRF	= 1	; External Reset Flag
+.equ	BORF	= 2	; Brown-out Reset Flag
+.equ	WDRF	= 3	; Watchdog Reset Flag
+.equ	JTRF	= 4	; JTAG Reset Flag
+.equ	JTD	= 7	; JTAG Interface Disable
+
+; OSCCAL - Oscillator Calibration Value
+.equ	CAL0	= 0	; Oscillator Calibration Value Bit0
+.equ	CAL1	= 1	; Oscillator Calibration Value Bit1
+.equ	CAL2	= 2	; Oscillator Calibration Value Bit2
+.equ	CAL3	= 3	; Oscillator Calibration Value Bit3
+.equ	CAL4	= 4	; Oscillator Calibration Value Bit4
+.equ	CAL5	= 5	; Oscillator Calibration Value Bit5
+.equ	CAL6	= 6	; Oscillator Calibration Value Bit6
+.equ	CAL7	= 7	; Oscillator Calibration Value Bit7
+
+; SFIOR - Special Function IO Register
+.equ	PSR10	= 0	; Prescaler Reset Timer/Counter1&0
+.equ	PSR2	= 1	; Prescaler Reset Timer/Counter2
+.equ	PUD	= 2	; Pull-up Disable
+
+
+; ***** BOOT_LOAD ********************
+; SPMCR - Store Program Memory Control Register
+.equ	SPMEN	= 0	; Store Program Memory Enable
+.equ	PGERS	= 1	; Page Erase
+.equ	PGWRT	= 2	; Page Write
+.equ	BLBSET	= 3	; Boot Lock Bit Set
+.equ	RWWSRE	= 4	; Read While Write secion read enable
+.equ	ASRE	= RWWSRE	; For compatibility
+.equ	RWWSB	= 6	; Read While Write Section Busy
+.equ	ASB	= RWWSB	; For compatibility
+.equ	SPMIE	= 7	; SPM Interrupt Enable
+
+
+; ***** TWI **************************
+; TWBR - TWI Bit Rate register
+.equ	TWBR0	= 0	; 
+.equ	TWBR1	= 1	; 
+.equ	TWBR2	= 2	; 
+.equ	TWBR3	= 3	; 
+.equ	TWBR4	= 4	; 
+.equ	TWBR5	= 5	; 
+.equ	TWBR6	= 6	; 
+.equ	TWBR7	= 7	; 
+
+; TWCR - TWI Control Register
+.equ	TWIE	= 0	; TWI Interrupt Enable
+.equ	TWEN	= 2	; TWI Enable Bit
+.equ	TWWC	= 3	; TWI Write Collition Flag
+.equ	TWSTO	= 4	; TWI Stop Condition Bit
+.equ	TWSTA	= 5	; TWI Start Condition Bit
+.equ	TWEA	= 6	; TWI Enable Acknowledge Bit
+.equ	TWINT	= 7	; TWI Interrupt Flag
+
+; TWSR - TWI Status Register
+.equ	TWPS0	= 0	; TWI Prescaler bits
+.equ	TWPS1	= 1	; TWI Prescaler bits
+.equ	TWS3	= 3	; TWI Status
+.equ	TWS4	= 4	; TWI Status
+.equ	TWS5	= 5	; TWI Status
+.equ	TWS6	= 6	; TWI Status
+.equ	TWS7	= 7	; TWI Status
+
+; TWDR - TWI Data register
+.equ	TWD0	= 0	; TWI Data Register Bit 0
+.equ	TWD1	= 1	; TWI Data Register Bit 1
+.equ	TWD2	= 2	; TWI Data Register Bit 2
+.equ	TWD3	= 3	; TWI Data Register Bit 3
+.equ	TWD4	= 4	; TWI Data Register Bit 4
+.equ	TWD5	= 5	; TWI Data Register Bit 5
+.equ	TWD6	= 6	; TWI Data Register Bit 6
+.equ	TWD7	= 7	; TWI Data Register Bit 7
+
+; TWAR - TWI (Slave) Address register
+.equ	TWGCE	= 0	; TWI General Call Recognition Enable Bit
+.equ	TWA0	= 1	; TWI (Slave) Address register Bit 0
+.equ	TWA1	= 2	; TWI (Slave) Address register Bit 1
+.equ	TWA2	= 3	; TWI (Slave) Address register Bit 2
+.equ	TWA3	= 4	; TWI (Slave) Address register Bit 3
+.equ	TWA4	= 5	; TWI (Slave) Address register Bit 4
+.equ	TWA5	= 6	; TWI (Slave) Address register Bit 5
+.equ	TWA6	= 7	; TWI (Slave) Address register Bit 6
+
+
+
+; ***** LOCKSBITS ********************************************************
+.equ	LB1	= 0	; Lock bit
+.equ	LB2	= 1	; Lock bit
+.equ	BLB01	= 2	; Boot Lock bit
+.equ	BLB02	= 3	; Boot Lock bit
+.equ	BLB11	= 4	; Boot lock bit
+.equ	BLB12	= 5	; Boot lock bit
+
+
+; ***** FUSES ************************************************************
+; LOW fuse bits
+.equ	CKSEL0	= 0	; Select Clock Source
+.equ	CKSEL1	= 1	; Select Clock Source
+.equ	CKSEL2	= 2	; Select Clock Source
+.equ	CKSEL3	= 3	; Select Clock Source
+.equ	BODEN	= 6	; Brown out detector enable
+.equ	BODLEVEL	= 7	; Brown out detector trigger level
+
+; HIGH fuse bits
+.equ	BOOTRST	= 0	; Select Reset Vector
+.equ	BOOTSZ0	= 1	; Select Boot Size
+.equ	BOOTSZ1	= 2	; Select Boot Size
+.equ	EESAVE	= 3	; EEPROM memory is preserved through chip erase
+.equ	SPIEN	= 5	; Enable Serial programming and Data Downloading
+.equ	JTAGEN	= 6	; Enable JTAG
+.equ	OCDEN	= 7	; Enable OCD
+
+
+
+; ***** CPU REGISTER DEFINITIONS *****************************************
+.def	XH	= r27
+.def	XL	= r26
+.def	YH	= r29
+.def	YL	= r28
+.def	ZH	= r31
+.def	ZL	= r30
+
+
+
+; ***** DATA MEMORY DECLARATIONS *****************************************
+.equ	FLASHEND	= 0x3fff	; Note: Word address
+.equ	IOEND	= 0x003f
+.equ	SRAM_START	= 0x0060
+.equ	SRAM_SIZE	= 2048
+.equ	RAMEND	= 0x085f
+.equ	XRAMEND	= 0x0000
+.equ	E2END	= 0x03ff
+.equ	EEPROMEND	= 0x03ff
+.equ	EEADRBITS	= 10
+#pragma AVRPART MEMORY PROG_FLASH 32768
+#pragma AVRPART MEMORY EEPROM 1024
+#pragma AVRPART MEMORY INT_SRAM SIZE 2048
+#pragma AVRPART MEMORY INT_SRAM START_ADDR 0x60
+
+
+
+; ***** BOOTLOADER DECLARATIONS ******************************************
+.equ	NRWW_START_ADDR	= 0x3800
+.equ	NRWW_STOP_ADDR	= 0x3fff
+.equ	RWW_START_ADDR	= 0x0
+.equ	RWW_STOP_ADDR	= 0x37ff
+.equ	PAGESIZE	= 64
+.equ	FIRSTBOOTSTART	= 0x3f00
+.equ	SECONDBOOTSTART	= 0x3e00
+.equ	THIRDBOOTSTART	= 0x3c00
+.equ	FOURTHBOOTSTART	= 0x3800
+.equ	SMALLBOOTSTART	= FIRSTBOOTSTART
+.equ	LARGEBOOTSTART	= FOURTHBOOTSTART
+
+
+
+; ***** INTERRUPT VECTORS ************************************************
+.equ	INT0addr	= 0x0002	; External Interrupt Request 0
+.equ	INT1addr	= 0x0004	; External Interrupt Request 1
+.equ	INT2addr	= 0x0006	; External Interrupt Request 2
+.equ	OC2addr	= 0x0008	; Timer/Counter2 Compare Match
+.equ	OVF2addr	= 0x000a	; Timer/Counter2 Overflow
+.equ	ICP1addr	= 0x000c	; Timer/Counter1 Capture Event
+.equ	OC1Aaddr	= 0x000e	; Timer/Counter1 Compare Match A
+.equ	OC1Baddr	= 0x0010	; Timer/Counter1 Compare Match B
+.equ	OVF1addr	= 0x0012	; Timer/Counter1 Overflow
+.equ	OC0addr	= 0x0014	; Timer/Counter0 Compare Match
+.equ	OVF0addr	= 0x0016	; Timer/Counter0 Overflow
+.equ	SPIaddr	= 0x0018	; Serial Transfer Complete
+.equ	URXCaddr	= 0x001a	; USART, Rx Complete
+.equ	UDREaddr	= 0x001c	; USART Data Register Empty
+.equ	UTXCaddr	= 0x001e	; USART, Tx Complete
+.equ	ADCCaddr	= 0x0020	; ADC Conversion Complete
+.equ	ERDYaddr	= 0x0022	; EEPROM Ready
+.equ	ACIaddr	= 0x0024	; Analog Comparator
+.equ	TWIaddr	= 0x0026	; 2-wire Serial Interface
+.equ	SPMRaddr	= 0x0028	; Store Program Memory Ready
+
+.equ	INT_VECTORS_SIZE	= 42	; size in words
+
+#endif  /* _M32DEF_INC_ */
+
+; ***** END OF FILE ******************************************************
diff --git a/trunk/AVRProjects/AVR_6502/6502_Emu_328p/sam.inc b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/sam.inc
new file mode 100644
index 00000000..5a2d9fee
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/6502_Emu_328p/sam.inc
@@ -0,0 +1,371 @@
+;***************************************************************
+;
+;   structured assembly macros (SAM)
+;
+;***************************************************************
+; Copyright (C) 2010-2013  Klaus Dormann
+;
+; This program is free software: you can redistribute it and/or modify
+; it under the terms of the GNU General Public License as published by
+; the Free Software Foundation, either version 3 of the License, or
+; (at your option) any later version.
+;
+; This program is distributed in the hope that it will be useful,
+; but WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+; GNU General Public License for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with this program.  If not, see <http://www.gnu.org/licenses/>.
+;
+; contact info at http://2m5.de or email K@2m5.de
+;
+.set  sam_version = 810
+; Version: 26.12.2010
+; requires a current version of AVRASM2
+; see "sam_examples.asm" for usage examples
+; 
+;
+;----------------------------------------------------------------
+;
+; IF-(THEN)-ELSE-END
+;
+;   All need a common label as the last and mostly only parameter.
+;   Further if-then-else-end can be nested by asigning a different label.
+;   The macros create additional labels as needed:
+;     for example @0 = test creates t_test & l_test
+;     test   = end of the THEN case
+;     t_test = begin of the THEN case
+;     l_test = end of the ELSE case
+;   Condition dependent code execution:
+;     true   = code after the IFxx or IFxx_far macro is executed
+;     false  = code after the ELSE macro is executed, if ELSE exists
+;     all    = remainder of the code is skipped up to the END macro
+;
+;
+; IFxx(_yy) (<bit>,)<label>
+;                    label  of the next matching ELSE or END macro
+;             bit   = on IFBS or IFBC - bit # in SREG
+;      _yy  nothing = last or only IF implying THEN
+;      _far         = THEN with long code (branch would be out of range)
+;      _and         = multiple conditions, immediately jumps to END/ELSE if false
+;      _or          = multiple conditions, immediately jumps to THEN if true
+;   xx ...          = identical to BRxx instruction used with compares or any
+;                     instruction altering the SREG
+;   s               = skip - used with SBIx, SBRx or CPSE
+;
+;
+; IFxx <label> translated to the underlying IFBS or IFBC
+;
+; SREG.C - bit 0, carry, no carry, lower, same or higher
+;
+#define     ifcs        ifbs        0,
+#define     ifcs_far    ifbs_far    0,
+#define     ifcs_and    ifbs_and    0,
+#define     ifcs_or     ifbs_or     0,
+#define     ifcc        ifbc        0,
+#define     ifcc_far    ifbc_far    0,
+#define     ifcc_and    ifbc_and    0,
+#define     ifcc_or     ifbc_or     0,
+#define     iflo        ifbs        0,
+#define     iflo_far    ifbs_far    0,
+#define     iflo_and    ifbs_and    0,
+#define     iflo_or     ifbs_or     0,
+#define     ifsh        ifbc        0,
+#define     ifsh_far    ifbc_far    0,
+#define     ifsh_and    ifbc_and    0,
+#define     ifsh_or     ifbc_or     0,
+;
+; SREG.Z - bit 1, equal, not equal
+;
+#define     ifeq        ifbs        1,
+#define     ifeq_far    ifbs_far    1,
+#define     ifeq_and    ifbs_and    1,
+#define     ifeq_or     ifbs_or     1,
+#define     ifne        ifbc        1,
+#define     ifne_far    ifbc_far    1,
+#define     ifne_and    ifbc_and    1,
+#define     ifne_or     ifbc_or     1,
+;
+; SREG.N - bit 2, minus, plus
+;
+#define     ifmi        ifbs        2,
+#define     ifmi_far    ifbs_far    2,
+#define     ifmi_and    ifbs_and    2,
+#define     ifmi_or     ifbs_or     2,
+#define     ifpl        ifbc        2,
+#define     ifpl_far    ifbc_far    2,
+#define     ifpl_and    ifbc_and    2,
+#define     ifpl_or     ifbc_or     2,
+;
+; SREG.V - bit 3, overflow, no overflow
+;
+#define     ifvs        ifbs        3,
+#define     ifvs_far    ifbs_far    3,
+#define     ifvs_and    ifbs_and    3,
+#define     ifvs_or     ifbs_or     3,
+#define     ifvc        ifbc        3,
+#define     ifvc_far    ifbc_far    3,
+#define     ifvc_and    ifbc_and    3,
+#define     ifvc_or     ifbc_or     3,
+;
+; SREG.S - bit 4, less than (signed), greater or equal (signed)
+;
+#define     iflt        ifbs        4,
+#define     iflt_far    ifbs_far    4,
+#define     iflt_and    ifbs_and    4,
+#define     iflt_or     ifbs_or     4,
+#define     ifge        ifbc        4,
+#define     ifge_far    ifbc_far    4,
+#define     ifge_and    ifbc_and    4,
+#define     ifge_or     ifbc_or     4,
+;
+; SREG.H - bit 5, half carry, no half carry
+;
+#define     ifhs        ifbs        5,
+#define     ifhs_far    ifbs_far    5,
+#define     ifhs_and    ifbs_and    5,
+#define     ifhs_or     ifbs_or     5,
+#define     ifhc        ifbc        5,
+#define     ifhc_far    ifbc_far    5,
+#define     ifhc_and    ifbc_and    5,
+#define     ifhc_or     ifbc_or     5,
+;
+; SREG.T - bit 6, T flag set, T flag clear
+;
+#define     ifts        ifbs        6,
+#define     ifts_far    ifbs_far    6,
+#define     ifts_and    ifbs_and    6,
+#define     ifts_or     ifbs_or     6,
+#define     iftc        ifbc        6,
+#define     iftc_far    ifbc_far    6,
+#define     iftc_and    ifbc_and    6,
+#define     iftc_or     ifbc_or     6,
+;
+; SREG.I - bit 7, interrupt enabled, interrupt disabled
+;
+#define     ifie        ifbs        7,
+#define     ifie_far    ifbs_far    7,
+#define     ifie_and    ifbs_and    7,
+#define     ifie_or     ifbs_or     7,
+#define     ifid        ifbc        7,
+#define     ifid_far    ifbc_far    7,
+#define     ifid_and    ifbc_and    7,
+#define     ifid_or     ifbc_or     7,
+
+;
+; IFBC <bit>,<label> - if bit is clear in SREG
+;
+.macro      ifbc
+            brbs  @0,@1
+            .equ  t_@1 = PC
+.endmacro
+.macro      ifbc_far 
+            brbc  @0,pc+2
+            rjmp  @1
+            .equ  t_@1 = PC
+.endmacro
+.macro      ifbc_and
+            brbs  @0,@1
+.endmacro
+.macro      ifbc_or
+            brbc  @0,t_@1
+.endmacro
+;
+; IFBS <bit>,<label> - if bit is set in SREG
+;
+.macro      ifbs
+            brbc  @0,@1
+            .equ  t_@1 = PC
+.endmacro
+.macro      ifbs_far 
+            brbs  @0,pc+2
+            rjmp  @1
+            .equ  t_@1 = PC
+.endmacro
+.macro      ifbs_and
+            brbc  @0,@1
+.endmacro
+.macro      ifbs_or
+            brbs  @0,t_@1
+.endmacro
+;
+; IFS <label> - if skip
+;
+.macro      ifs
+            rjmp  @0
+            .equ  t_@0 = PC
+.endmacro
+; ifs is always far - just for completeness
+.macro      ifs_far 
+            rjmp  @0
+            .equ  t_@0 = PC
+.endmacro
+.macro      ifs_and
+            rjmp  @0
+.endmacro
+.macro      ifs_or
+            rjmp  pc+2
+            rjmp  t_@0
+.endmacro
+;
+; ELSE <label>
+;       label  of the matching IFxx & END macro 
+;
+.macro      else
+            rjmp  l_@0
+  .equ      @0 = PC
+.endmacro
+;
+; END <label>
+;      label  of the previous matching IFxx or ELSE macro
+;
+.macro      end
+  .ifdef    @0
+    .equ    l_@0 = PC
+  .else
+    .equ    @0 = PC
+  .endif
+.endmacro
+;
+;----------------------------------------------------------------
+;
+; DO-LOOPxx or DO-(EXIT|EXITxx)-LOOP
+;
+;   All need a common label as the last and mostly only parameter.
+;   Further do-loops can be nested by asigning a different label.
+;   The macros create an additional label as needed:
+;     for example <label> = main creates x_main
+;     main   = begin of loop
+;     x_main = end of loop (used by EXIT)
+;
+;   LOOPxx can only be used at the end of the do as an immediate
+;   loop, if condition xx is true similar to a loop-while statement.
+;   Multiple LOOPxx can be used to loop on multiple conditions. LOOPxx
+;   is suitable to construct typical FOR-NEXT loops and WHILE cases.
+;
+;   To be able to exit a loop at any point, you need to use the EXITxx macro.
+;   This allows the construction of typical UNTIL cases. For everything else
+;   including anded conditions to loop or exit and whenever LOOPxx or EXITxx
+;   branches are out of range, use EXIT inside an if-block. Multiple EXITxx
+;   or EXIT macros can be used and mixed in one loop. 
+;
+;   EXITxx or EXIT require one and only one LOOP macro (not LOOPxx) to set
+;   the exit label. LOOPxx and LOOP can not be mixed.
+;
+;
+;
+; DO <label>
+;     label  of the matching EXIT & LOOP or LOOPxx macros
+;
+.macro      do
+  .equ      @0 = PC
+.endmacro
+;
+; EXIT <label>
+;       label  of the matching DO & LOOP macros
+;
+.macro      exit
+            rjmp  x_@0
+.endmacro
+;
+; LOOP <label>
+;       label  of the matching DO & EXIT macros
+;
+.macro      loop
+            rjmp  @0
+  .equ      x_@0 = PC
+.endmacro
+;
+;
+; LOOPxx <label> translated to the underlying LOOPBS or LOOPBC
+;         label  of the matching DO macro
+; EXITxx <label> translated to the underlying EXITBS or EXITBC
+;         label  of the matching LOOP macro
+;
+; SREG.C - bit 0, carry, no carry, lower, same or higher
+;
+#define     loopcs      loopbs     0,
+#define     loopcc      loopbc     0,
+#define     looplo      loopbs     0,
+#define     loopsh      loopbc     0,
+#define     exitcs      exitbs     0,
+#define     exitcc      exitbc     0,
+#define     exitlo      exitbs     0,
+#define     exitsh      exitbc     0,
+;
+; SREG.Z - bit 1, equal, not equal
+;
+#define     loopeq      loopbs     1,
+#define     loopne      loopbc     1,
+#define     exiteq      exitbs     1,
+#define     exitne      exitbc     1,
+;
+; SREG.N - bit 2, minus, plus
+;
+#define     loopmi      loopbs     2,
+#define     looppl      loopbc     2,
+#define     exitmi      exitbs     2,
+#define     exitpl      exitbc     2,
+;
+; SREG.V - bit 3, overflow, no overflow
+;
+#define     loopvs      loopbs     3,
+#define     loopvc      loopbc     3,
+#define     exitvs      exitbs     3,
+#define     exitvc      exitbc     3,
+;
+; SREG.S - bit 4, less than (signed), greater or equal (signed)
+;
+#define     looplt      loopbs     4,
+#define     loopge      loopbc     4,
+#define     exitlt      exitbs     4,
+#define     exitge      exitbc     4,
+;
+; SREG.H - bit 5, half carry, no half carry
+;
+#define     loophs      loopbs     5,
+#define     loophc      loopbc     5,
+#define     exiths      exitbs     5,
+#define     exithc      exitbc     5,
+;
+; SREG.T - bit 6, T flag set, T flag clear
+;
+#define     loopts      loopbs     6,
+#define     looptc      loopbc     6,
+#define     exitts      exitbs     6,
+#define     exittc      exitbc     6,
+;
+; SREG.I - bit 7, interrupt enabled, interrupt disabled
+;
+#define     loopie      loopbs     7,
+#define     loopid      loopbc     7,
+#define     exitie      exitbs     7,
+#define     exitid      exitbc     7,
+;
+; LOOPBC <bit>,<label> - loop if bit is clear in SREG
+;
+.macro      loopbc
+            brbc  @0,@1
+.endmacro
+;
+; LOOPBS <bit>,<label> - loop if bit is set in SREG
+;
+.macro      loopbs
+            brbs  @0,@1
+.endmacro
+;
+; EXITBC <bit>,<label> - exit if bit is clear in SREG
+;
+.macro      exitbc
+            brbc  @0,x_@1
+.endmacro
+;
+; EXITBS <bit>,<label> - exit if bit is set in SREG
+;
+.macro      exitbs
+            brbs  @0,x_@1
+.endmacro
+
+
+
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVR 65C02 Emulator.pdf b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVR 65C02 Emulator.pdf
new file mode 100644
index 00000000..bcf2e215
Binary files /dev/null and b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVR 65C02 Emulator.pdf differ
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVR6502.BIN b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVR6502.BIN
new file mode 100644
index 00000000..2fe73b33
Binary files /dev/null and b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVR6502.BIN differ
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AV2SR.INC b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AV2SR.INC
new file mode 100644
index 00000000..be65dfa4
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AV2SR.INC
@@ -0,0 +1,135 @@
+; AVSR to SR conversion table
+
+.cseg
+.org 0x1B00
+
+tav2sr:
+
+	.db	0x00, 0x01	; 00 & 01
+	.db	0x02, 0x03	; 02 & 03
+	.db	0x80, 0x81	; 04 & 05
+	.db	0x82, 0x83	; 06 & 07
+	.db	0x00, 0x01	; 08 & 09
+	.db	0x02, 0x03	; 0A & 0B
+	.db	0x80, 0x81	; 0C & 0D
+	.db	0x82, 0x83	; 0E & 0F
+	.db	0x00, 0x01	; 10 & 11
+	.db	0x02, 0x03	; 12 & 13
+	.db	0x80, 0x81	; 14 & 15
+	.db	0x82, 0x83	; 16 & 17
+	.db	0x00, 0x01	; 18 & 19
+	.db	0x02, 0x03	; 1A & 1B
+	.db	0x80, 0x81	; 1C & 1D
+	.db	0x82, 0x83	; 1E & 1F
+	.db	0x00, 0x01	; 20 & 21
+	.db	0x02, 0x03	; 22 & 23
+	.db	0x80, 0x81	; 24 & 25
+	.db	0x82, 0x83	; 26 & 27
+	.db	0x00, 0x01	; 28 & 29
+	.db	0x02, 0x03	; 2A & 2B
+	.db	0x80, 0x81	; 2C & 2D
+	.db	0x82, 0x83	; 2E & 2F
+	.db	0x00, 0x01	; 30 & 31
+	.db	0x02, 0x03	; 32 & 33
+	.db	0x80, 0x81	; 34 & 35
+	.db	0x82, 0x83	; 36 & 37
+	.db	0x00, 0x01	; 38 & 39
+	.db	0x02, 0x03	; 3A & 3B
+	.db	0x80, 0x81	; 3C & 3D
+	.db	0x82, 0x83	; 3E & 3F
+	.db	0x40, 0x41	; 40 & 41
+	.db	0x42, 0x43	; 42 & 43
+	.db	0xC0, 0xC1	; 44 & 45
+	.db	0xC2, 0xC3	; 46 & 47
+	.db	0x40, 0x41	; 48 & 49
+	.db	0x42, 0x43	; 4A & 4B
+	.db	0xC0, 0xC1	; 4C & 4D
+	.db	0xC2, 0xC3	; 4E & 4F
+	.db	0x40, 0x41	; 50 & 51
+	.db	0x42, 0x43	; 52 & 53
+	.db	0xC0, 0xC1	; 54 & 55
+	.db	0xC2, 0xC3	; 56 & 57
+	.db	0x40, 0x41	; 58 & 59
+	.db	0x42, 0x43	; 5A & 5B
+	.db	0xC0, 0xC1	; 5C & 5D
+	.db	0xC2, 0xC3	; 5E & 5F
+	.db	0x40, 0x41	; 60 & 61
+	.db	0x42, 0x43	; 62 & 63
+	.db	0xC0, 0xC1	; 64 & 65
+	.db	0xC2, 0xC3	; 66 & 67
+	.db	0x40, 0x41	; 68 & 69
+	.db	0x42, 0x43	; 6A & 6B
+	.db	0xC0, 0xC1	; 6C & 6D
+	.db	0xC2, 0xC3	; 6E & 6F
+	.db	0x40, 0x41	; 70 & 71
+	.db	0x42, 0x43	; 72 & 73
+	.db	0xC0, 0xC1	; 74 & 75
+	.db	0xC2, 0xC3	; 76 & 77
+	.db	0x40, 0x41	; 78 & 79
+	.db	0x42, 0x43	; 7A & 7B
+	.db	0xC0, 0xC1	; 7C & 7D
+	.db	0xC2, 0xC3	; 7E & 7F
+	.db	0x00, 0x01	; 80 & 81
+	.db	0x02, 0x03	; 82 & 83
+	.db	0x80, 0x81	; 84 & 85
+	.db	0x82, 0x83	; 86 & 87
+	.db	0x00, 0x01	; 88 & 89
+	.db	0x02, 0x03	; 8A & 8B
+	.db	0x80, 0x81	; 8C & 8D
+	.db	0x82, 0x83	; 8E & 8F
+	.db	0x00, 0x01	; 90 & 91
+	.db	0x02, 0x03	; 92 & 93
+	.db	0x80, 0x81	; 94 & 95
+	.db	0x82, 0x83	; 96 & 97
+	.db	0x00, 0x01	; 98 & 99
+	.db	0x02, 0x03	; 9A & 9B
+	.db	0x80, 0x81	; 9C & 9D
+	.db	0x82, 0x83	; 9E & 9F
+	.db	0x00, 0x01	; A0 & A1
+	.db	0x02, 0x03	; A2 & A3
+	.db	0x80, 0x81	; A4 & A5
+	.db	0x82, 0x83	; A6 & A7
+	.db	0x00, 0x01	; A8 & A9
+	.db	0x02, 0x03	; AA & AB
+	.db	0x80, 0x81	; AC & AD
+	.db	0x82, 0x83	; AE & AF
+	.db	0x00, 0x01	; B0 & B1
+	.db	0x02, 0x03	; B2 & B3
+	.db	0x80, 0x81	; B4 & B5
+	.db	0x82, 0x83	; B6 & B7
+	.db	0x00, 0x01	; B8 & B9
+	.db	0x02, 0x03	; BA & BB
+	.db	0x80, 0x81	; BC & BD
+	.db	0x82, 0x83	; BE & BF
+	.db	0x40, 0x41	; C0 & C1
+	.db	0x42, 0x43	; C2 & C3
+	.db	0xC0, 0xC1	; C4 & C5
+	.db	0xC2, 0xC3	; C6 & C7
+	.db	0x40, 0x41	; C8 & C9
+	.db	0x42, 0x43	; CA & CB
+	.db	0xC0, 0xC1	; CC & CD
+	.db	0xC2, 0xC3	; CE & CF
+	.db	0x40, 0x41	; D0 & D1
+	.db	0x42, 0x43	; D2 & D3
+	.db	0xC0, 0xC1	; D4 & D5
+	.db	0xC2, 0xC3	; D6 & D7
+	.db	0x40, 0x41	; D8 & D9
+	.db	0x42, 0x43	; DA & DB
+	.db	0xC0, 0xC1	; DC & DD
+	.db	0xC2, 0xC3	; DE & DF
+	.db	0x40, 0x41	; E0 & E1
+	.db	0x42, 0x43	; E2 & E3
+	.db	0xC0, 0xC1	; E4 & E5
+	.db	0xC2, 0xC3	; E6 & E7
+	.db	0x40, 0x41	; E8 & E9
+	.db	0x42, 0x43	; EA & EB
+	.db	0xC0, 0xC1	; EC & ED
+	.db	0xC2, 0xC3	; EE & EF
+	.db	0x40, 0x41	; F0 & F1
+	.db	0x42, 0x43	; F2 & F3
+	.db	0xC0, 0xC1	; F4 & F5
+	.db	0xC2, 0xC3	; F6 & F7
+	.db	0x40, 0x41	; F8 & F9
+	.db	0x42, 0x43	; FA & FB
+	.db	0xC0, 0xC1	; FC & FD
+	.db	0xC2, 0xC3	; FE & FF
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502.aps b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502.aps
new file mode 100644
index 00000000..27426c2c
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502.aps
@@ -0,0 +1 @@
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diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502.hex b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502.hex
new file mode 100644
index 00000000..468b7f1c
--- /dev/null
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+:10E5A000E7F7C7D72636061666764656D9C9F9E97B
+:10E5B0009989B9A95848786818083828CBDBEBFB4B
+:10E5C0008B9BABBB4A5A6A7A0A1A2A3AFDEDDDCD1B
+:10E5D000BDAD9D8D7C6C5C4C3C2C1C0CEFFFCFDFEB
+:0CE5E000AFBF8F9F6E7E4E5E2E3E0E1E63
+:00000001FF
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502.lst b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502.lst
new file mode 100644
index 00000000..f4bec0ad
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502.lst
@@ -0,0 +1,38818 @@
+
+AVRASM ver. 2.1.42  C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\avr6502.asm Tue Jul 23 19:18:19 2013
+
+C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\avr6502.asm(12): Including file 'C:\Program Files\Atmel\AVR Tools\AvrAssembler2\Appnotes\m1284Pdef.inc'
+C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\avr6502.asm(30): Including file 'C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\av2sr.inc'
+C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\avr6502.asm(31): Including file 'C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\sr2av.inc'
+C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\avr6502.asm(32): Including file 'C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\opcjmp.inc'
+C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\avr6502.asm(33): Including file 'C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\ioexe.inc'
+C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\avr6502.asm(34): Including file 'C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\sbcrom.inc'
+C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\avr6502.asm(143): Including file 'C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm'
+C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\avr6502.asm(146): Including file 'C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm'
+C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\avr6502.asm(147): Including file 'C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm'
+                 
+                 
+                 ;
+                 ; By Daryl Rictor (c)2012
+                 ;
+                 ; 16k - 256 byte RAM
+                 ; 48k ROM (in flash)
+                 ; IO @ 3Fxx
+                 
+                 ;******************************************************************************
+                 ; include AVRASM definitions
+                 ;******************************************************************************
+                 .include "m1284Pdef.inc"
+                 
+                 ;***** Created: 2011-08-25 20:59 ******* Source: ATmega1284P.xml *********
+                 ;*************************************************************************
+                 ;* A P P L I C A T I O N   N O T E   F O R   T H E   A V R   F A M I L Y
+                 ;* 
+                 ;* Number            : AVR000
+                 ;* File Name         : "m1284Pdef.inc"
+                 ;* Title             : Register/Bit Definitions for the ATmega1284P
+                 ;* Date              : 2011-08-25
+                 ;* Version           : 2.35
+                 ;* Support E-mail    : avr@atmel.com
+                 ;* Target MCU        : ATmega1284P
+                 ;* 
+                 ;* DESCRIPTION
+                 ;* When including this file in the assembly program file, all I/O register 
+                 ;* names and I/O register bit names appearing in the data book can be used.
+                 ;* In addition, the six registers forming the three data pointers X, Y and 
+                 ;* Z have been assigned names XL - ZH. Highest RAM address for Internal 
+                 ;* SRAM is also defined 
+                 ;* 
+                 ;* The Register names are represented by their hexadecimal address.
+                 ;* 
+                 ;* The Register Bit names are represented by their bit number (0-7).
+                 ;* 
+                 ;* Please observe the difference in using the bit names with instructions
+                 ;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc"
+                 ;* (skip if bit in register set/cleared). The following example illustrates
+                 ;* this:
+                 ;* 
+                 ;* in    r16,PORTB             ;read PORTB latch
+                 ;* sbr   r16,(1<<PB6)+(1<<PB5) ;set PB6 and PB5 (use masks, not bit#)
+                 ;* out   PORTB,r16             ;output to PORTB
+                 ;* 
+                 ;* in    r16,TIFR              ;read the Timer Interrupt Flag Register
+                 ;* sbrc  r16,TOV0              ;test the overflow flag (use bit#)
+                 ;* rjmp  TOV0_is_set           ;jump if set
+                 ;* ...                         ;otherwise do something else
+                 ;*************************************************************************
+                 
+                 #ifndef _M1284PDEF_INC_
+                 #define _M1284PDEF_INC_
+                 
+                 
+                 #pragma partinc 0
+                 
+                 ; ***** SPECIFY DEVICE ***************************************************
+                 .device ATmega1284P
+                 #pragma AVRPART ADMIN PART_NAME ATmega1284P
+                 .equ	SIGNATURE_000	= 0x1e
+                 .equ	SIGNATURE_001	= 0x97
+                 .equ	SIGNATURE_002	= 0x05
+                 
+                 #pragma AVRPART CORE CORE_VERSION V2E
+                 
+                 
+                 ; ***** I/O REGISTER DEFINITIONS *****************************************
+                 ; NOTE:
+                 ; Definitions marked "MEMORY MAPPED"are extended I/O ports
+                 ; and cannot be used with IN/OUT instructions
+                 .equ	UDR1	= 0xce	; MEMORY MAPPED
+                 .equ	UBRR1L	= 0xcc	; MEMORY MAPPED
+                 .equ	UBRR1H	= 0xcd	; MEMORY MAPPED
+                 .equ	UCSR1C	= 0xca	; MEMORY MAPPED
+                 .equ	UCSR1B	= 0xc9	; MEMORY MAPPED
+                 .equ	UCSR1A	= 0xc8	; MEMORY MAPPED
+                 .equ	UDR0	= 0xc6	; MEMORY MAPPED
+                 .equ	UBRR0L	= 0xc4	; MEMORY MAPPED
+                 .equ	UBRR0H	= 0xc5	; MEMORY MAPPED
+                 .equ	UCSR0C	= 0xc2	; MEMORY MAPPED
+                 .equ	UCSR0B	= 0xc1	; MEMORY MAPPED
+                 .equ	UCSR0A	= 0xc0	; MEMORY MAPPED
+                 .equ	TWAMR	= 0xbd	; MEMORY MAPPED
+                 .equ	TWCR	= 0xbc	; MEMORY MAPPED
+                 .equ	TWDR	= 0xbb	; MEMORY MAPPED
+                 .equ	TWAR	= 0xba	; MEMORY MAPPED
+                 .equ	TWSR	= 0xb9	; MEMORY MAPPED
+                 .equ	TWBR	= 0xb8	; MEMORY MAPPED
+                 .equ	ASSR	= 0xb6	; MEMORY MAPPED
+                 .equ	OCR2B	= 0xb4	; MEMORY MAPPED
+                 .equ	OCR2A	= 0xb3	; MEMORY MAPPED
+                 .equ	TCNT2	= 0xb2	; MEMORY MAPPED
+                 .equ	TCCR2B	= 0xb1	; MEMORY MAPPED
+                 .equ	TCCR2A	= 0xb0	; MEMORY MAPPED
+                 .equ	OCR3BL	= 0x9a	; MEMORY MAPPED
+                 .equ	OCR3BH	= 0x9b	; MEMORY MAPPED
+                 .equ	OCR3AL	= 0x98	; MEMORY MAPPED
+                 .equ	OCR3AH	= 0x99	; MEMORY MAPPED
+                 .equ	ICR3L	= 0x96	; MEMORY MAPPED
+                 .equ	ICR3H	= 0x97	; MEMORY MAPPED
+                 .equ	TCNT3L	= 0x94	; MEMORY MAPPED
+                 .equ	TCNT3H	= 0x95	; MEMORY MAPPED
+                 .equ	TCCR3C	= 0x92	; MEMORY MAPPED
+                 .equ	TCCR3B	= 0x91	; MEMORY MAPPED
+                 .equ	TCCR3A	= 0x90	; MEMORY MAPPED
+                 .equ	OCR1BL	= 0x8a	; MEMORY MAPPED
+                 .equ	OCR1BH	= 0x8b	; MEMORY MAPPED
+                 .equ	OCR1AL	= 0x88	; MEMORY MAPPED
+                 .equ	OCR1AH	= 0x89	; MEMORY MAPPED
+                 .equ	ICR1L	= 0x86	; MEMORY MAPPED
+                 .equ	ICR1H	= 0x87	; MEMORY MAPPED
+                 .equ	TCNT1L	= 0x84	; MEMORY MAPPED
+                 .equ	TCNT1H	= 0x85	; MEMORY MAPPED
+                 .equ	TCCR1C	= 0x82	; MEMORY MAPPED
+                 .equ	TCCR1B	= 0x81	; MEMORY MAPPED
+                 .equ	TCCR1A	= 0x80	; MEMORY MAPPED
+                 .equ	DIDR1	= 0x7f	; MEMORY MAPPED
+                 .equ	DIDR0	= 0x7e	; MEMORY MAPPED
+                 .equ	ADMUX	= 0x7c	; MEMORY MAPPED
+                 .equ	ADCSRB	= 0x7b	; MEMORY MAPPED
+                 .equ	ADCSRA	= 0x7a	; MEMORY MAPPED
+                 .equ	ADCH	= 0x79	; MEMORY MAPPED
+                 .equ	ADCL	= 0x78	; MEMORY MAPPED
+                 .equ	PCMSK3	= 0x73	; MEMORY MAPPED
+                 .equ	TIMSK3	= 0x71	; MEMORY MAPPED
+                 .equ	TIMSK2	= 0x70	; MEMORY MAPPED
+                 .equ	TIMSK1	= 0x6f	; MEMORY MAPPED
+                 .equ	TIMSK0	= 0x6e	; MEMORY MAPPED
+                 .equ	PCMSK2	= 0x6d	; MEMORY MAPPED
+                 .equ	PCMSK1	= 0x6c	; MEMORY MAPPED
+                 .equ	PCMSK0	= 0x6b	; MEMORY MAPPED
+                 .equ	EICRA	= 0x69	; MEMORY MAPPED
+                 .equ	PCICR	= 0x68	; MEMORY MAPPED
+                 .equ	OSCCAL	= 0x66	; MEMORY MAPPED
+                 .equ	PRR1	= 0x65	; MEMORY MAPPED
+                 .equ	PRR0	= 0x64	; MEMORY MAPPED
+                 .equ	CLKPR	= 0x61	; MEMORY MAPPED
+                 .equ	WDTCSR	= 0x60	; MEMORY MAPPED
+                 .equ	SREG	= 0x3f
+                 .equ	SPL	= 0x3d
+                 .equ	SPH	= 0x3e
+                 .equ	RAMPZ	= 0x3b
+                 .equ	SPMCSR	= 0x37
+                 .equ	MCUCR	= 0x35
+                 .equ	MCUSR	= 0x34
+                 .equ	SMCR	= 0x33
+                 .equ	OCDR	= 0x31
+                 .equ	ACSR	= 0x30
+                 .equ	SPDR	= 0x2e
+                 .equ	SPSR	= 0x2d
+                 .equ	SPCR	= 0x2c
+                 .equ	GPIOR2	= 0x2b
+                 .equ	GPIOR1	= 0x2a
+                 .equ	OCR0B	= 0x28
+                 .equ	OCR0A	= 0x27
+                 .equ	TCNT0	= 0x26
+                 .equ	TCCR0B	= 0x25
+                 .equ	TCCR0A	= 0x24
+                 .equ	GTCCR	= 0x23
+                 .equ	EEARH	= 0x22
+                 .equ	EEARL	= 0x21
+                 .equ	EEDR	= 0x20
+                 .equ	EECR	= 0x1f
+                 .equ	GPIOR0	= 0x1e
+                 .equ	EIMSK	= 0x1d
+                 .equ	EIFR	= 0x1c
+                 .equ	PCIFR	= 0x1b
+                 .equ	TIFR3	= 0x18
+                 .equ	TIFR2	= 0x17
+                 .equ	TIFR1	= 0x16
+                 .equ	TIFR0	= 0x15
+                 .equ	PORTD	= 0x0b
+                 .equ	DDRD	= 0x0a
+                 .equ	PIND	= 0x09
+                 .equ	PORTC	= 0x08
+                 .equ	DDRC	= 0x07
+                 .equ	PINC	= 0x06
+                 .equ	PORTB	= 0x05
+                 .equ	DDRB	= 0x04
+                 .equ	PINB	= 0x03
+                 .equ	PORTA	= 0x02
+                 .equ	DDRA	= 0x01
+                 .equ	PINA	= 0x00
+                 
+                 
+                 ; ***** BIT DEFINITIONS **************************************************
+                 
+                 ; ***** ANALOG_COMPARATOR ************
+                 ; ADCSRB - ADC Control and Status Register B
+                 .equ	ACME	= 6	; Analog Comparator Multiplexer Enable
+                 
+                 ; ACSR - Analog Comparator Control And Status Register
+                 .equ	ACIS0	= 0	; Analog Comparator Interrupt Mode Select bit 0
+                 .equ	ACIS1	= 1	; Analog Comparator Interrupt Mode Select bit 1
+                 .equ	ACIC	= 2	; Analog Comparator Input Capture Enable
+                 .equ	ACIE	= 3	; Analog Comparator Interrupt Enable
+                 .equ	ACI	= 4	; Analog Comparator Interrupt Flag
+                 .equ	ACO	= 5	; Analog Compare Output
+                 .equ	ACBG	= 6	; Analog Comparator Bandgap Select
+                 .equ	ACD	= 7	; Analog Comparator Disable
+                 
+                 ; DIDR1 - Digital Input Disable Register 1
+                 .equ	AIN0D	= 0	; AIN0 Digital Input Disable
+                 .equ	AIN1D	= 1	; AIN1 Digital Input Disable
+                 
+                 
+                 ; ***** USART0 ***********************
+                 ; UDR0 - USART I/O Data Register
+                 .equ	UDR0_0	= 0	; USART I/O Data Register bit 0
+                 .equ	UDR0_1	= 1	; USART I/O Data Register bit 1
+                 .equ	UDR0_2	= 2	; USART I/O Data Register bit 2
+                 .equ	UDR0_3	= 3	; USART I/O Data Register bit 3
+                 .equ	UDR0_4	= 4	; USART I/O Data Register bit 4
+                 .equ	UDR0_5	= 5	; USART I/O Data Register bit 5
+                 .equ	UDR0_6	= 6	; USART I/O Data Register bit 6
+                 .equ	UDR0_7	= 7	; USART I/O Data Register bit 7
+                 
+                 ; UCSR0A - USART Control and Status Register A
+                 .equ	MPCM0	= 0	; Multi-processor Communication Mode
+                 .equ	U2X0	= 1	; Double the USART transmission speed
+                 .equ	UPE0	= 2	; Parity Error
+                 .equ	DOR0	= 3	; Data overRun
+                 .equ	FE0	= 4	; Framing Error
+                 .equ	UDRE0	= 5	; USART Data Register Empty
+                 .equ	TXC0	= 6	; USART Transmitt Complete
+                 .equ	RXC0	= 7	; USART Receive Complete
+                 
+                 ; UCSR0B - USART Control and Status Register B
+                 .equ	TXB80	= 0	; Transmit Data Bit 8
+                 .equ	RXB80	= 1	; Receive Data Bit 8
+                 .equ	UCSZ02	= 2	; Character Size
+                 .equ	TXEN0	= 3	; Transmitter Enable
+                 .equ	RXEN0	= 4	; Receiver Enable
+                 .equ	UDRIE0	= 5	; USART Data register Empty Interrupt Enable
+                 .equ	TXCIE0	= 6	; TX Complete Interrupt Enable
+                 .equ	RXCIE0	= 7	; RX Complete Interrupt Enable
+                 
+                 ; UCSR0C - USART Control and Status Register C
+                 .equ	UCPOL0	= 0	; Clock Polarity
+                 .equ	UCSZ00	= 1	; Character Size
+                 .equ	UCPHA0	= UCSZ00	; For compatibility
+                 .equ	UCSZ01	= 2	; Character Size
+                 .equ	UDORD0	= UCSZ01	; For compatibility
+                 .equ	USBS0	= 3	; Stop Bit Select
+                 .equ	UPM00	= 4	; Parity Mode Bit 0
+                 .equ	UPM01	= 5	; Parity Mode Bit 1
+                 .equ	UMSEL00	= 6	; USART Mode Select
+                 .equ	UMSEL0	= UMSEL00	; For compatibility
+                 .equ	UMSEL01	= 7	; USART Mode Select
+                 .equ	UMSEL1	= UMSEL01	; For compatibility
+                 
+                 ; UBRR0H - USART Baud Rate Register High Byte
+                 .equ	UBRR8	= 0	; USART Baud Rate Register bit 8
+                 .equ	UBRR9	= 1	; USART Baud Rate Register bit 9
+                 .equ	UBRR10	= 2	; USART Baud Rate Register bit 10
+                 .equ	UBRR11	= 3	; USART Baud Rate Register bit 11
+                 
+                 ; UBRR0L - USART Baud Rate Register Low Byte
+                 .equ	_UBRR0	= 0	; USART Baud Rate Register bit 0
+                 .equ	_UBRR1	= 1	; USART Baud Rate Register bit 1
+                 .equ	UBRR2	= 2	; USART Baud Rate Register bit 2
+                 .equ	UBRR3	= 3	; USART Baud Rate Register bit 3
+                 .equ	UBRR4	= 4	; USART Baud Rate Register bit 4
+                 .equ	UBRR5	= 5	; USART Baud Rate Register bit 5
+                 .equ	UBRR6	= 6	; USART Baud Rate Register bit 6
+                 .equ	UBRR7	= 7	; USART Baud Rate Register bit 7
+                 
+                 
+                 ; ***** PORTA ************************
+                 ; PORTA - Port A Data Register
+                 .equ	PORTA0	= 0	; Port A Data Register bit 0
+                 .equ	PA0	= 0	; For compatibility
+                 .equ	PORTA1	= 1	; Port A Data Register bit 1
+                 .equ	PA1	= 1	; For compatibility
+                 .equ	PORTA2	= 2	; Port A Data Register bit 2
+                 .equ	PA2	= 2	; For compatibility
+                 .equ	PORTA3	= 3	; Port A Data Register bit 3
+                 .equ	PA3	= 3	; For compatibility
+                 .equ	PORTA4	= 4	; Port A Data Register bit 4
+                 .equ	PA4	= 4	; For compatibility
+                 .equ	PORTA5	= 5	; Port A Data Register bit 5
+                 .equ	PA5	= 5	; For compatibility
+                 .equ	PORTA6	= 6	; Port A Data Register bit 6
+                 .equ	PA6	= 6	; For compatibility
+                 .equ	PORTA7	= 7	; Port A Data Register bit 7
+                 .equ	PA7	= 7	; For compatibility
+                 
+                 ; DDRA - Port A Data Direction Register
+                 .equ	DDA0	= 0	; Data Direction Register, Port A, bit 0
+                 .equ	DDA1	= 1	; Data Direction Register, Port A, bit 1
+                 .equ	DDA2	= 2	; Data Direction Register, Port A, bit 2
+                 .equ	DDA3	= 3	; Data Direction Register, Port A, bit 3
+                 .equ	DDA4	= 4	; Data Direction Register, Port A, bit 4
+                 .equ	DDA5	= 5	; Data Direction Register, Port A, bit 5
+                 .equ	DDA6	= 6	; Data Direction Register, Port A, bit 6
+                 .equ	DDA7	= 7	; Data Direction Register, Port A, bit 7
+                 
+                 ; PINA - Port A Input Pins
+                 .equ	PINA0	= 0	; Input Pins, Port A bit 0
+                 .equ	PINA1	= 1	; Input Pins, Port A bit 1
+                 .equ	PINA2	= 2	; Input Pins, Port A bit 2
+                 .equ	PINA3	= 3	; Input Pins, Port A bit 3
+                 .equ	PINA4	= 4	; Input Pins, Port A bit 4
+                 .equ	PINA5	= 5	; Input Pins, Port A bit 5
+                 .equ	PINA6	= 6	; Input Pins, Port A bit 6
+                 .equ	PINA7	= 7	; Input Pins, Port A bit 7
+                 
+                 
+                 ; ***** PORTB ************************
+                 ; PORTB - Port B Data Register
+                 .equ	PORTB0	= 0	; Port B Data Register bit 0
+                 .equ	PB0	= 0	; For compatibility
+                 .equ	PORTB1	= 1	; Port B Data Register bit 1
+                 .equ	PB1	= 1	; For compatibility
+                 .equ	PORTB2	= 2	; Port B Data Register bit 2
+                 .equ	PB2	= 2	; For compatibility
+                 .equ	PORTB3	= 3	; Port B Data Register bit 3
+                 .equ	PB3	= 3	; For compatibility
+                 .equ	PORTB4	= 4	; Port B Data Register bit 4
+                 .equ	PB4	= 4	; For compatibility
+                 .equ	PORTB5	= 5	; Port B Data Register bit 5
+                 .equ	PB5	= 5	; For compatibility
+                 .equ	PORTB6	= 6	; Port B Data Register bit 6
+                 .equ	PB6	= 6	; For compatibility
+                 .equ	PORTB7	= 7	; Port B Data Register bit 7
+                 .equ	PB7	= 7	; For compatibility
+                 
+                 ; DDRB - Port B Data Direction Register
+                 .equ	DDB0	= 0	; Port B Data Direction Register bit 0
+                 .equ	DDB1	= 1	; Port B Data Direction Register bit 1
+                 .equ	DDB2	= 2	; Port B Data Direction Register bit 2
+                 .equ	DDB3	= 3	; Port B Data Direction Register bit 3
+                 .equ	DDB4	= 4	; Port B Data Direction Register bit 4
+                 .equ	DDB5	= 5	; Port B Data Direction Register bit 5
+                 .equ	DDB6	= 6	; Port B Data Direction Register bit 6
+                 .equ	DDB7	= 7	; Port B Data Direction Register bit 7
+                 
+                 ; PINB - Port B Input Pins
+                 .equ	PINB0	= 0	; Port B Input Pins bit 0
+                 .equ	PINB1	= 1	; Port B Input Pins bit 1
+                 .equ	PINB2	= 2	; Port B Input Pins bit 2
+                 .equ	PINB3	= 3	; Port B Input Pins bit 3
+                 .equ	PINB4	= 4	; Port B Input Pins bit 4
+                 .equ	PINB5	= 5	; Port B Input Pins bit 5
+                 .equ	PINB6	= 6	; Port B Input Pins bit 6
+                 .equ	PINB7	= 7	; Port B Input Pins bit 7
+                 
+                 
+                 ; ***** PORTC ************************
+                 ; PORTC - Port C Data Register
+                 .equ	PORTC0	= 0	; Port C Data Register bit 0
+                 .equ	PC0	= 0	; For compatibility
+                 .equ	PORTC1	= 1	; Port C Data Register bit 1
+                 .equ	PC1	= 1	; For compatibility
+                 .equ	PORTC2	= 2	; Port C Data Register bit 2
+                 .equ	PC2	= 2	; For compatibility
+                 .equ	PORTC3	= 3	; Port C Data Register bit 3
+                 .equ	PC3	= 3	; For compatibility
+                 .equ	PORTC4	= 4	; Port C Data Register bit 4
+                 .equ	PC4	= 4	; For compatibility
+                 .equ	PORTC5	= 5	; Port C Data Register bit 5
+                 .equ	PC5	= 5	; For compatibility
+                 .equ	PORTC6	= 6	; Port C Data Register bit 6
+                 .equ	PC6	= 6	; For compatibility
+                 .equ	PORTC7	= 7	; Port C Data Register bit 7
+                 .equ	PC7	= 7	; For compatibility
+                 
+                 ; DDRC - Port C Data Direction Register
+                 .equ	DDC0	= 0	; Port C Data Direction Register bit 0
+                 .equ	DDC1	= 1	; Port C Data Direction Register bit 1
+                 .equ	DDC2	= 2	; Port C Data Direction Register bit 2
+                 .equ	DDC3	= 3	; Port C Data Direction Register bit 3
+                 .equ	DDC4	= 4	; Port C Data Direction Register bit 4
+                 .equ	DDC5	= 5	; Port C Data Direction Register bit 5
+                 .equ	DDC6	= 6	; Port C Data Direction Register bit 6
+                 .equ	DDC7	= 7	; Port C Data Direction Register bit 7
+                 
+                 ; PINC - Port C Input Pins
+                 .equ	PINC0	= 0	; Port C Input Pins bit 0
+                 .equ	PINC1	= 1	; Port C Input Pins bit 1
+                 .equ	PINC2	= 2	; Port C Input Pins bit 2
+                 .equ	PINC3	= 3	; Port C Input Pins bit 3
+                 .equ	PINC4	= 4	; Port C Input Pins bit 4
+                 .equ	PINC5	= 5	; Port C Input Pins bit 5
+                 .equ	PINC6	= 6	; Port C Input Pins bit 6
+                 .equ	PINC7	= 7	; Port C Input Pins bit 7
+                 
+                 
+                 ; ***** PORTD ************************
+                 ; PORTD - Port D Data Register
+                 .equ	PORTD0	= 0	; Port D Data Register bit 0
+                 .equ	PD0	= 0	; For compatibility
+                 .equ	PORTD1	= 1	; Port D Data Register bit 1
+                 .equ	PD1	= 1	; For compatibility
+                 .equ	PORTD2	= 2	; Port D Data Register bit 2
+                 .equ	PD2	= 2	; For compatibility
+                 .equ	PORTD3	= 3	; Port D Data Register bit 3
+                 .equ	PD3	= 3	; For compatibility
+                 .equ	PORTD4	= 4	; Port D Data Register bit 4
+                 .equ	PD4	= 4	; For compatibility
+                 .equ	PORTD5	= 5	; Port D Data Register bit 5
+                 .equ	PD5	= 5	; For compatibility
+                 .equ	PORTD6	= 6	; Port D Data Register bit 6
+                 .equ	PD6	= 6	; For compatibility
+                 .equ	PORTD7	= 7	; Port D Data Register bit 7
+                 .equ	PD7	= 7	; For compatibility
+                 
+                 ; DDRD - Port D Data Direction Register
+                 .equ	DDD0	= 0	; Port D Data Direction Register bit 0
+                 .equ	DDD1	= 1	; Port D Data Direction Register bit 1
+                 .equ	DDD2	= 2	; Port D Data Direction Register bit 2
+                 .equ	DDD3	= 3	; Port D Data Direction Register bit 3
+                 .equ	DDD4	= 4	; Port D Data Direction Register bit 4
+                 .equ	DDD5	= 5	; Port D Data Direction Register bit 5
+                 .equ	DDD6	= 6	; Port D Data Direction Register bit 6
+                 .equ	DDD7	= 7	; Port D Data Direction Register bit 7
+                 
+                 ; PIND - Port D Input Pins
+                 .equ	PIND0	= 0	; Port D Input Pins bit 0
+                 .equ	PIND1	= 1	; Port D Input Pins bit 1
+                 .equ	PIND2	= 2	; Port D Input Pins bit 2
+                 .equ	PIND3	= 3	; Port D Input Pins bit 3
+                 .equ	PIND4	= 4	; Port D Input Pins bit 4
+                 .equ	PIND5	= 5	; Port D Input Pins bit 5
+                 .equ	PIND6	= 6	; Port D Input Pins bit 6
+                 .equ	PIND7	= 7	; Port D Input Pins bit 7
+                 
+                 
+                 ; ***** TIMER_COUNTER_0 **************
+                 ; TIMSK0 - Timer/Counter0 Interrupt Mask Register
+                 .equ	TOIE0	= 0	; Timer/Counter0 Overflow Interrupt Enable
+                 .equ	OCIE0A	= 1	; Timer/Counter0 Output Compare Match A Interrupt Enable
+                 .equ	OCIE0B	= 2	; Timer/Counter0 Output Compare Match B Interrupt Enable
+                 
+                 ; TIFR0 - Timer/Counter0 Interrupt Flag register
+                 .equ	TOV0	= 0	; Timer/Counter0 Overflow Flag
+                 .equ	OCF0A	= 1	; Timer/Counter0 Output Compare Flag 0A
+                 .equ	OCF0B	= 2	; Timer/Counter0 Output Compare Flag 0B
+                 
+                 ; TCCR0A - Timer/Counter  Control Register A
+                 .equ	WGM00	= 0	; Waveform Generation Mode
+                 .equ	WGM01	= 1	; Waveform Generation Mode
+                 .equ	COM0B0	= 4	; Compare Output Mode, Fast PWm
+                 .equ	COM0B1	= 5	; Compare Output Mode, Fast PWm
+                 .equ	COM0A0	= 6	; Compare Output Mode, Phase Correct PWM Mode
+                 .equ	COM0A1	= 7	; Compare Output Mode, Phase Correct PWM Mode
+                 
+                 ; TCCR0B - Timer/Counter Control Register B
+                 .equ	CS00	= 0	; Clock Select
+                 .equ	CS01	= 1	; Clock Select
+                 .equ	CS02	= 2	; Clock Select
+                 .equ	WGM02	= 3	; 
+                 .equ	FOC0B	= 6	; Force Output Compare B
+                 .equ	FOC0A	= 7	; Force Output Compare A
+                 
+                 ; TCNT0 - Timer/Counter0
+                 .equ	TCNT0_0	= 0	; 
+                 .equ	TCNT0_1	= 1	; 
+                 .equ	TCNT0_2	= 2	; 
+                 .equ	TCNT0_3	= 3	; 
+                 .equ	TCNT0_4	= 4	; 
+                 .equ	TCNT0_5	= 5	; 
+                 .equ	TCNT0_6	= 6	; 
+                 .equ	TCNT0_7	= 7	; 
+                 
+                 ; OCR0A - Timer/Counter0 Output Compare Register
+                 .equ	OCR0A_0	= 0	; 
+                 .equ	OCR0A_1	= 1	; 
+                 .equ	OCR0A_2	= 2	; 
+                 .equ	OCR0A_3	= 3	; 
+                 .equ	OCR0A_4	= 4	; 
+                 .equ	OCR0A_5	= 5	; 
+                 .equ	OCR0A_6	= 6	; 
+                 .equ	OCR0A_7	= 7	; 
+                 
+                 ; OCR0B - Timer/Counter0 Output Compare Register
+                 .equ	OCR0B_0	= 0	; 
+                 .equ	OCR0B_1	= 1	; 
+                 .equ	OCR0B_2	= 2	; 
+                 .equ	OCR0B_3	= 3	; 
+                 .equ	OCR0B_4	= 4	; 
+                 .equ	OCR0B_5	= 5	; 
+                 .equ	OCR0B_6	= 6	; 
+                 .equ	OCR0B_7	= 7	; 
+                 
+                 ; GTCCR - General Timer/Counter Control Register
+                 .equ	PSRSYNC	= 0	; Prescaler Reset Timer/Counter1 and Timer/Counter0
+                 .equ	PSR10	= PSRSYNC	; For compatibility
+                 .equ	TSM	= 7	; Timer/Counter Synchronization Mode
+                 
+                 
+                 ; ***** TIMER_COUNTER_1 **************
+                 ; TIMSK1 - Timer/Counter1 Interrupt Mask Register
+                 .equ	TOIE1	= 0	; Timer/Counter1 Overflow Interrupt Enable
+                 .equ	OCIE1A	= 1	; Timer/Counter1 Output Compare A Match Interrupt Enable
+                 .equ	OCIE1B	= 2	; Timer/Counter1 Output Compare B Match Interrupt Enable
+                 .equ	ICIE1	= 5	; Timer/Counter1 Input Capture Interrupt Enable
+                 
+                 ; TIFR1 - Timer/Counter Interrupt Flag register
+                 .equ	TOV1	= 0	; Timer/Counter1 Overflow Flag
+                 .equ	OCF1A	= 1	; Timer/Counter1 Output Compare A Match Flag
+                 .equ	OCF1B	= 2	; Timer/Counter1 Output Compare B Match Flag
+                 .equ	ICF1	= 5	; Timer/Counter1 Input Capture Flag
+                 
+                 ; TCCR1A - Timer/Counter1 Control Register A
+                 .equ	WGM10	= 0	; Pulse Width Modulator Select Bit 0
+                 .equ	PWM10	= WGM10	; For compatibility
+                 .equ	WGM11	= 1	; Pulse Width Modulator Select Bit 1
+                 .equ	PWM11	= WGM11	; For compatibility
+                 .equ	COM1B0	= 4	; Comparet Ouput Mode 1B, bit 0
+                 .equ	COM1B1	= 5	; Compare Output Mode 1B, bit 1
+                 .equ	COM1A0	= 6	; Comparet Ouput Mode 1A, bit 0
+                 .equ	COM1A1	= 7	; Compare Output Mode 1A, bit 1
+                 
+                 ; TCCR1B - Timer/Counter1 Control Register B
+                 .equ	CS10	= 0	; Clock Select bit 0
+                 .equ	CS11	= 1	; Clock Select 1 bit 1
+                 .equ	CS12	= 2	; Clock Select1 bit 2
+                 .equ	WGM12	= 3	; Waveform Generation Mode Bit 2
+                 .equ	CTC1	= WGM12	; For compatibility
+                 .equ	WGM13	= 4	; Waveform Generation Mode Bit 3
+                 .equ	ICES1	= 6	; Input Capture 1 Edge Select
+                 .equ	ICNC1	= 7	; Input Capture 1 Noise Canceler
+                 
+                 ; TCCR1C - Timer/Counter1 Control Register C
+                 .equ	FOC1B	= 6	; Force Output Compare for Channel B
+                 .equ	FOC1A	= 7	; Force Output Compare for Channel A
+                 
+                 
+                 ; ***** TIMER_COUNTER_2 **************
+                 ; TIMSK2 - Timer/Counter Interrupt Mask register
+                 .equ	TOIE2	= 0	; Timer/Counter2 Overflow Interrupt Enable
+                 .equ	TOIE2A	= TOIE2	; For compatibility
+                 .equ	OCIE2A	= 1	; Timer/Counter2 Output Compare Match A Interrupt Enable
+                 .equ	OCIE2B	= 2	; Timer/Counter2 Output Compare Match B Interrupt Enable
+                 
+                 ; TIFR2 - Timer/Counter Interrupt Flag Register
+                 .equ	TOV2	= 0	; Timer/Counter2 Overflow Flag
+                 .equ	OCF2A	= 1	; Output Compare Flag 2A
+                 .equ	OCF2B	= 2	; Output Compare Flag 2B
+                 
+                 ; TCCR2A - Timer/Counter2 Control Register A
+                 .equ	WGM20	= 0	; Waveform Genration Mode
+                 .equ	WGM21	= 1	; Waveform Genration Mode
+                 .equ	COM2B0	= 4	; Compare Output Mode bit 0
+                 .equ	COM2B1	= 5	; Compare Output Mode bit 1
+                 .equ	COM2A0	= 6	; Compare Output Mode bit 1
+                 .equ	COM2A1	= 7	; Compare Output Mode bit 1
+                 
+                 ; TCCR2B - Timer/Counter2 Control Register B
+                 .equ	CS20	= 0	; Clock Select bit 0
+                 .equ	CS21	= 1	; Clock Select bit 1
+                 .equ	CS22	= 2	; Clock Select bit 2
+                 .equ	WGM22	= 3	; Waveform Generation Mode
+                 .equ	FOC2B	= 6	; Force Output Compare B
+                 .equ	FOC2A	= 7	; Force Output Compare A
+                 
+                 ; TCNT2 - Timer/Counter2
+                 .equ	TCNT2_0	= 0	; Timer/Counter 2 bit 0
+                 .equ	TCNT2_1	= 1	; Timer/Counter 2 bit 1
+                 .equ	TCNT2_2	= 2	; Timer/Counter 2 bit 2
+                 .equ	TCNT2_3	= 3	; Timer/Counter 2 bit 3
+                 .equ	TCNT2_4	= 4	; Timer/Counter 2 bit 4
+                 .equ	TCNT2_5	= 5	; Timer/Counter 2 bit 5
+                 .equ	TCNT2_6	= 6	; Timer/Counter 2 bit 6
+                 .equ	TCNT2_7	= 7	; Timer/Counter 2 bit 7
+                 
+                 ; OCR2A - Timer/Counter2 Output Compare Register A
+                 .equ	OCR2A_0	= 0	; Timer/Counter2 Output Compare Register Bit 0
+                 .equ	OCR2A_1	= 1	; Timer/Counter2 Output Compare Register Bit 1
+                 .equ	OCR2A_2	= 2	; Timer/Counter2 Output Compare Register Bit 2
+                 .equ	OCR2A_3	= 3	; Timer/Counter2 Output Compare Register Bit 3
+                 .equ	OCR2A_4	= 4	; Timer/Counter2 Output Compare Register Bit 4
+                 .equ	OCR2A_5	= 5	; Timer/Counter2 Output Compare Register Bit 5
+                 .equ	OCR2A_6	= 6	; Timer/Counter2 Output Compare Register Bit 6
+                 .equ	OCR2A_7	= 7	; Timer/Counter2 Output Compare Register Bit 7
+                 
+                 ; OCR2B - Timer/Counter2 Output Compare Register B
+                 .equ	OCR2B_0	= 0	; Timer/Counter2 Output Compare Register Bit 0
+                 .equ	OCR2B_1	= 1	; Timer/Counter2 Output Compare Register Bit 1
+                 .equ	OCR2B_2	= 2	; Timer/Counter2 Output Compare Register Bit 2
+                 .equ	OCR2B_3	= 3	; Timer/Counter2 Output Compare Register Bit 3
+                 .equ	OCR2B_4	= 4	; Timer/Counter2 Output Compare Register Bit 4
+                 .equ	OCR2B_5	= 5	; Timer/Counter2 Output Compare Register Bit 5
+                 .equ	OCR2B_6	= 6	; Timer/Counter2 Output Compare Register Bit 6
+                 .equ	OCR2B_7	= 7	; Timer/Counter2 Output Compare Register Bit 7
+                 
+                 ; ASSR - Asynchronous Status Register
+                 .equ	TCR2BUB	= 0	; Timer/Counter Control Register2 Update Busy
+                 .equ	TCR2AUB	= 1	; Timer/Counter Control Register2 Update Busy
+                 .equ	OCR2BUB	= 2	; Output Compare Register 2 Update Busy
+                 .equ	OCR2AUB	= 3	; Output Compare Register2 Update Busy
+                 .equ	TCN2UB	= 4	; Timer/Counter2 Update Busy
+                 .equ	AS2	= 5	; Asynchronous Timer/Counter2
+                 .equ	EXCLK	= 6	; Enable External Clock Input
+                 
+                 ; GTCCR - General Timer Counter Control register
+                 .equ	PSRASY	= 1	; Prescaler Reset Timer/Counter2
+                 .equ	PSR2	= PSRASY	; For compatibility
+                 ;.equ	TSM	= 7	; Timer/Counter Synchronization Mode
+                 
+                 
+                 ; ***** TIMER_COUNTER_3 **************
+                 ; TIMSK3 - Timer/Counter3 Interrupt Mask Register
+                 .equ	TOIE3	= 0	; Timer/Counter3 Overflow Interrupt Enable
+                 .equ	OCIE3A	= 1	; Timer/Counter3 Output Compare A Match Interrupt Enable
+                 .equ	OCIE3B	= 2	; Timer/Counter3 Output Compare B Match Interrupt Enable
+                 .equ	ICIE3	= 5	; Timer/Counter3 Input Capture Interrupt Enable
+                 
+                 ; TIFR3 - Timer/Counter Interrupt Flag register
+                 .equ	TOV3	= 0	; Timer/Counter3 Overflow Flag
+                 .equ	OCF3A	= 1	; Timer/Counter3 Output Compare A Match Flag
+                 .equ	OCF3B	= 2	; Timer/Counter3 Output Compare B Match Flag
+                 .equ	ICF3	= 5	; Timer/Counter3 Input Capture Flag
+                 
+                 ; TCCR3A - Timer/Counter3 Control Register A
+                 .equ	WGM30	= 0	; Pulse Width Modulator Select Bit 0
+                 .equ	WGM31	= 1	; Pulse Width Modulator Select Bit 1
+                 .equ	COM3B0	= 4	; Comparet Ouput Mode 3B, bit 0
+                 .equ	COM3B1	= 5	; Compare Output Mode 3B, bit 1
+                 .equ	COM3A0	= 6	; Comparet Ouput Mode 3A, bit 0
+                 .equ	COM3A1	= 7	; Compare Output Mode 3A, bit 1
+                 
+                 ; TCCR3B - Timer/Counter3 Control Register B
+                 .equ	CS30	= 0	; Clock Select bit 0
+                 .equ	CS31	= 1	; Clock Select 3 bit 1
+                 .equ	CS32	= 2	; Clock Select3 bit 2
+                 .equ	WGM32	= 3	; Waveform Generation Mode Bit 2
+                 .equ	WGM33	= 4	; Waveform Generation Mode Bit 3
+                 .equ	ICES3	= 6	; Input Capture 3 Edge Select
+                 .equ	ICNC3	= 7	; Input Capture 3 Noise Canceler
+                 
+                 ; TCCR3C - Timer/Counter3 Control Register C
+                 .equ	FOC3B	= 6	; Force Output Compare for Channel B
+                 .equ	FOC3A	= 7	; Force Output Compare for Channel A
+                 
+                 ; OCR3BH - Timer/Counter3 Output Compare Register B High Byte
+                 .equ	OCR3AH0	= 0	; Timer/Counter3 Output Compare Register High Byte bit 0
+                 .equ	OCR3AH1	= 1	; Timer/Counter3 Output Compare Register High Byte bit 1
+                 .equ	OCR3AH2	= 2	; Timer/Counter3 Output Compare Register High Byte bit 2
+                 .equ	OCR3AH3	= 3	; Timer/Counter3 Output Compare Register High Byte bit 3
+                 .equ	OCR3AH4	= 4	; Timer/Counter3 Output Compare Register High Byte bit 4
+                 .equ	OCR3AH5	= 5	; Timer/Counter3 Output Compare Register High Byte bit 5
+                 .equ	OCR3AH6	= 6	; Timer/Counter3 Output Compare Register High Byte bit 6
+                 .equ	OCR3AH7	= 7	; Timer/Counter3 Output Compare Register High Byte bit 7
+                 
+                 ; OCR3BL - Timer/Counter3 Output Compare Register B Low Byte
+                 .equ	OCR3AL0	= 0	; Timer/Counter3 Output Compare Register Low Byte Bit 0
+                 .equ	OCR3AL1	= 1	; Timer/Counter3 Output Compare Register Low Byte Bit 1
+                 .equ	OCR3AL2	= 2	; Timer/Counter3 Output Compare Register Low Byte Bit 2
+                 .equ	OCR3AL3	= 3	; Timer/Counter3 Output Compare Register Low Byte Bit 3
+                 .equ	OCR3AL4	= 4	; Timer/Counter3 Output Compare Register Low Byte Bit 4
+                 .equ	OCR3AL5	= 5	; Timer/Counter3 Output Compare Register Low Byte Bit 5
+                 .equ	OCR3AL6	= 6	; Timer/Counter3 Output Compare Register Low Byte Bit 6
+                 .equ	OCR3AL7	= 7	; Timer/Counter3 Output Compare Register Low Byte Bit 7
+                 
+                 
+                 ; ***** BOOT_LOAD ********************
+                 ; SPMCSR - Store Program Memory Control Register
+                 .equ	SPMEN	= 0	; Store Program Memory Enable
+                 .equ	PGERS	= 1	; Page Erase
+                 .equ	PGWRT	= 2	; Page Write
+                 .equ	BLBSET	= 3	; Boot Lock Bit Set
+                 .equ	RWWSRE	= 4	; Read While Write section read enable
+                 .equ	SIGRD	= 5	; Signature Row Read
+                 .equ	RWWSB	= 6	; Read While Write Section Busy
+                 .equ	SPMIE	= 7	; SPM Interrupt Enable
+                 
+                 
+                 ; ***** EXTERNAL_INTERRUPT ***********
+                 ; EICRA - External Interrupt Control Register A
+                 .equ	ISC00	= 0	; External Interrupt Sense Control Bit
+                 .equ	ISC01	= 1	; External Interrupt Sense Control Bit
+                 .equ	ISC10	= 2	; External Interrupt Sense Control Bit
+                 .equ	ISC11	= 3	; External Interrupt Sense Control Bit
+                 .equ	ISC20	= 4	; External Interrupt Sense Control Bit
+                 .equ	ISC21	= 5	; External Interrupt Sense Control Bit
+                 
+                 ; EIMSK - External Interrupt Mask Register
+                 .equ	INT0	= 0	; External Interrupt Request 0 Enable
+                 .equ	INT1	= 1	; External Interrupt Request 1 Enable
+                 .equ	INT2	= 2	; External Interrupt Request 2 Enable
+                 
+                 ; EIFR - External Interrupt Flag Register
+                 .equ	INTF0	= 0	; External Interrupt Flag 0
+                 .equ	INTF1	= 1	; External Interrupt Flag 1
+                 .equ	INTF2	= 2	; External Interrupt Flag 2
+                 
+                 ; PCICR - Pin Change Interrupt Control Register
+                 .equ	PCIE0	= 0	; Pin Change Interrupt Enable 0
+                 .equ	PCIE1	= 1	; Pin Change Interrupt Enable 1
+                 .equ	PCIE2	= 2	; Pin Change Interrupt Enable 2
+                 .equ	PCIE3	= 3	; Pin Change Interrupt Enable 3
+                 
+                 ; PCIFR - Pin Change Interrupt Flag Register
+                 .equ	PCIF0	= 0	; Pin Change Interrupt Flag 0
+                 .equ	PCIF1	= 1	; Pin Change Interrupt Flag 1
+                 .equ	PCIF2	= 2	; Pin Change Interrupt Flag 2
+                 .equ	PCIF3	= 3	; Pin Change Interrupt Flag 3
+                 
+                 ; PCMSK3 - Pin Change Mask Register 3
+                 .equ	PCINT24	= 0	; Pin Change Enable Mask 24
+                 .equ	PCINT25	= 1	; Pin Change Enable Mask 25
+                 .equ	PCINT26	= 2	; Pin Change Enable Mask 26
+                 .equ	PCINT27	= 3	; Pin Change Enable Mask 27
+                 .equ	PCINT28	= 4	; Pin Change Enable Mask 28
+                 .equ	PCINT29	= 5	; Pin Change Enable Mask 29
+                 .equ	PCINT30	= 6	; Pin Change Enable Mask 30
+                 .equ	PCINT31	= 7	; Pin Change Enable Mask 31
+                 
+                 ; PCMSK2 - Pin Change Mask Register 2
+                 .equ	PCINT16	= 0	; Pin Change Enable Mask 16
+                 .equ	PCINT17	= 1	; Pin Change Enable Mask 17
+                 .equ	PCINT18	= 2	; Pin Change Enable Mask 18
+                 .equ	PCINT19	= 3	; Pin Change Enable Mask 19
+                 .equ	PCINT20	= 4	; Pin Change Enable Mask 20
+                 .equ	PCINT21	= 5	; Pin Change Enable Mask 21
+                 .equ	PCINT22	= 6	; Pin Change Enable Mask 22
+                 .equ	PCINT23	= 7	; Pin Change Enable Mask 23
+                 
+                 ; PCMSK1 - Pin Change Mask Register 1
+                 .equ	PCINT8	= 0	; Pin Change Enable Mask 8
+                 .equ	PCINT9	= 1	; Pin Change Enable Mask 9
+                 .equ	PCINT10	= 2	; Pin Change Enable Mask 10
+                 .equ	PCINT11	= 3	; Pin Change Enable Mask 11
+                 .equ	PCINT12	= 4	; Pin Change Enable Mask 12
+                 .equ	PCINT13	= 5	; Pin Change Enable Mask 13
+                 .equ	PCINT14	= 6	; Pin Change Enable Mask 14
+                 .equ	PCINT15	= 7	; Pin Change Enable Mask 15
+                 
+                 ; PCMSK0 - Pin Change Mask Register 0
+                 .equ	PCINT0	= 0	; Pin Change Enable Mask 0
+                 .equ	PCINT1	= 1	; Pin Change Enable Mask 1
+                 .equ	PCINT2	= 2	; Pin Change Enable Mask 2
+                 .equ	PCINT3	= 3	; Pin Change Enable Mask 3
+                 .equ	PCINT4	= 4	; Pin Change Enable Mask 4
+                 .equ	PCINT5	= 5	; Pin Change Enable Mask 5
+                 .equ	PCINT6	= 6	; Pin Change Enable Mask 6
+                 .equ	PCINT7	= 7	; Pin Change Enable Mask 7
+                 
+                 
+                 ; ***** AD_CONVERTER *****************
+                 ; ADMUX - The ADC multiplexer Selection Register
+                 .equ	MUX0	= 0	; Analog Channel and Gain Selection Bits
+                 .equ	MUX1	= 1	; Analog Channel and Gain Selection Bits
+                 .equ	MUX2	= 2	; Analog Channel and Gain Selection Bits
+                 .equ	MUX3	= 3	; Analog Channel and Gain Selection Bits
+                 .equ	MUX4	= 4	; Analog Channel and Gain Selection Bits
+                 .equ	ADLAR	= 5	; Left Adjust Result
+                 .equ	REFS0	= 6	; Reference Selection Bit 0
+                 .equ	REFS1	= 7	; Reference Selection Bit 1
+                 
+                 ; ADCSRA - The ADC Control and Status register A
+                 .equ	ADPS0	= 0	; ADC  Prescaler Select Bits
+                 .equ	ADPS1	= 1	; ADC  Prescaler Select Bits
+                 .equ	ADPS2	= 2	; ADC  Prescaler Select Bits
+                 .equ	ADIE	= 3	; ADC Interrupt Enable
+                 .equ	ADIF	= 4	; ADC Interrupt Flag
+                 .equ	ADATE	= 5	; ADC  Auto Trigger Enable
+                 .equ	ADSC	= 6	; ADC Start Conversion
+                 .equ	ADEN	= 7	; ADC Enable
+                 
+                 ; ADCSRB - The ADC Control and Status register B
+                 .equ	ADTS0	= 0	; ADC Auto Trigger Source bit 0
+                 .equ	ADTS1	= 1	; ADC Auto Trigger Source bit 1
+                 .equ	ADTS2	= 2	; ADC Auto Trigger Source bit 2
+                 ;.equ	ACME	= 6	; 
+                 
+                 ; ADCH - ADC Data Register High Byte
+                 .equ	ADCH0	= 0	; ADC Data Register High Byte Bit 0
+                 .equ	ADCH1	= 1	; ADC Data Register High Byte Bit 1
+                 .equ	ADCH2	= 2	; ADC Data Register High Byte Bit 2
+                 .equ	ADCH3	= 3	; ADC Data Register High Byte Bit 3
+                 .equ	ADCH4	= 4	; ADC Data Register High Byte Bit 4
+                 .equ	ADCH5	= 5	; ADC Data Register High Byte Bit 5
+                 .equ	ADCH6	= 6	; ADC Data Register High Byte Bit 6
+                 .equ	ADCH7	= 7	; ADC Data Register High Byte Bit 7
+                 
+                 ; ADCL - ADC Data Register Low Byte
+                 .equ	ADCL0	= 0	; ADC Data Register Low Byte Bit 0
+                 .equ	ADCL1	= 1	; ADC Data Register Low Byte Bit 1
+                 .equ	ADCL2	= 2	; ADC Data Register Low Byte Bit 2
+                 .equ	ADCL3	= 3	; ADC Data Register Low Byte Bit 3
+                 .equ	ADCL4	= 4	; ADC Data Register Low Byte Bit 4
+                 .equ	ADCL5	= 5	; ADC Data Register Low Byte Bit 5
+                 .equ	ADCL6	= 6	; ADC Data Register Low Byte Bit 6
+                 .equ	ADCL7	= 7	; ADC Data Register Low Byte Bit 7
+                 
+                 ; DIDR0 - Digital Input Disable Register
+                 .equ	ADC0D	= 0	; 
+                 .equ	ADC1D	= 1	; 
+                 .equ	ADC2D	= 2	; 
+                 .equ	ADC3D	= 3	; 
+                 .equ	ADC4D	= 4	; 
+                 .equ	ADC5D	= 5	; 
+                 .equ	ADC6D	= 6	; 
+                 .equ	ADC7D	= 7	; 
+                 
+                 
+                 ; ***** JTAG *************************
+                 ; OCDR - On-Chip Debug Related Register in I/O Memory
+                 .equ	OCDR0	= 0	; On-Chip Debug Register Bit 0
+                 .equ	OCDR1	= 1	; On-Chip Debug Register Bit 1
+                 .equ	OCDR2	= 2	; On-Chip Debug Register Bit 2
+                 .equ	OCDR3	= 3	; On-Chip Debug Register Bit 3
+                 .equ	OCDR4	= 4	; On-Chip Debug Register Bit 4
+                 .equ	OCDR5	= 5	; On-Chip Debug Register Bit 5
+                 .equ	OCDR6	= 6	; On-Chip Debug Register Bit 6
+                 .equ	OCDR7	= 7	; On-Chip Debug Register Bit 7
+                 .equ	IDRD	= OCDR7	; For compatibility
+                 
+                 ; MCUCR - MCU Control Register
+                 .equ	JTD	= 7	; JTAG Interface Disable
+                 
+                 ; MCUSR - MCU Status Register
+                 .equ	JTRF	= 4	; JTAG Reset Flag
+                 
+                 
+                 ; ***** EEPROM ***********************
+                 ; EEARH - EEPROM Address Register Low Byte
+                 .equ	EEAR8	= 0	; EEPROM Read/Write Access Bit 8
+                 .equ	EEAR9	= 1	; EEPROM Read/Write Access Bit 9
+                 .equ	EEAR10	= 2	; EEPROM Read/Write Access Bit 10
+                 .equ	EEAR11	= 3	; EEPROM Read/Write Access Bit 11
+                 
+                 ; EEARL - EEPROM Address Register Low Byte
+                 .equ	EEAR0	= 0	; EEPROM Read/Write Access Bit 0
+                 .equ	EEAR1	= 1	; EEPROM Read/Write Access Bit 1
+                 .equ	EEAR2	= 2	; EEPROM Read/Write Access Bit 2
+                 .equ	EEAR3	= 3	; EEPROM Read/Write Access Bit 3
+                 .equ	EEAR4	= 4	; EEPROM Read/Write Access Bit 4
+                 .equ	EEAR5	= 5	; EEPROM Read/Write Access Bit 5
+                 .equ	EEAR6	= 6	; EEPROM Read/Write Access Bit 6
+                 .equ	EEAR7	= 7	; EEPROM Read/Write Access Bit 7
+                 
+                 ; EEDR - EEPROM Data Register
+                 .equ	EEDR0	= 0	; EEPROM Data Register bit 0
+                 .equ	EEDR1	= 1	; EEPROM Data Register bit 1
+                 .equ	EEDR2	= 2	; EEPROM Data Register bit 2
+                 .equ	EEDR3	= 3	; EEPROM Data Register bit 3
+                 .equ	EEDR4	= 4	; EEPROM Data Register bit 4
+                 .equ	EEDR5	= 5	; EEPROM Data Register bit 5
+                 .equ	EEDR6	= 6	; EEPROM Data Register bit 6
+                 .equ	EEDR7	= 7	; EEPROM Data Register bit 7
+                 
+                 ; EECR - EEPROM Control Register
+                 .equ	EERE	= 0	; EEPROM Read Enable
+                 .equ	EEPE	= 1	; EEPROM Write Enable
+                 .equ	EEMPE	= 2	; EEPROM Master Write Enable
+                 .equ	EERIE	= 3	; EEPROM Ready Interrupt Enable
+                 .equ	EEPM0	= 4	; EEPROM Programming Mode Bit 0
+                 .equ	EEPM1	= 5	; EEPROM Programming Mode Bit 1
+                 
+                 
+                 ; ***** TWI **************************
+                 ; TWAMR - TWI (Slave) Address Mask Register
+                 .equ	TWAM0	= 1	; 
+                 .equ	TWAMR0	= TWAM0	; For compatibility
+                 .equ	TWAM1	= 2	; 
+                 .equ	TWAMR1	= TWAM1	; For compatibility
+                 .equ	TWAM2	= 3	; 
+                 .equ	TWAMR2	= TWAM2	; For compatibility
+                 .equ	TWAM3	= 4	; 
+                 .equ	TWAMR3	= TWAM3	; For compatibility
+                 .equ	TWAM4	= 5	; 
+                 .equ	TWAMR4	= TWAM4	; For compatibility
+                 .equ	TWAM5	= 6	; 
+                 .equ	TWAMR5	= TWAM5	; For compatibility
+                 .equ	TWAM6	= 7	; 
+                 .equ	TWAMR6	= TWAM6	; For compatibility
+                 
+                 ; TWBR - TWI Bit Rate register
+                 .equ	TWBR0	= 0	; 
+                 .equ	TWBR1	= 1	; 
+                 .equ	TWBR2	= 2	; 
+                 .equ	TWBR3	= 3	; 
+                 .equ	TWBR4	= 4	; 
+                 .equ	TWBR5	= 5	; 
+                 .equ	TWBR6	= 6	; 
+                 .equ	TWBR7	= 7	; 
+                 
+                 ; TWCR - TWI Control Register
+                 .equ	TWIE	= 0	; TWI Interrupt Enable
+                 .equ	TWEN	= 2	; TWI Enable Bit
+                 .equ	TWWC	= 3	; TWI Write Collition Flag
+                 .equ	TWSTO	= 4	; TWI Stop Condition Bit
+                 .equ	TWSTA	= 5	; TWI Start Condition Bit
+                 .equ	TWEA	= 6	; TWI Enable Acknowledge Bit
+                 .equ	TWINT	= 7	; TWI Interrupt Flag
+                 
+                 ; TWSR - TWI Status Register
+                 .equ	TWPS0	= 0	; TWI Prescaler
+                 .equ	TWPS1	= 1	; TWI Prescaler
+                 .equ	TWS3	= 3	; TWI Status
+                 .equ	TWS4	= 4	; TWI Status
+                 .equ	TWS5	= 5	; TWI Status
+                 .equ	TWS6	= 6	; TWI Status
+                 .equ	TWS7	= 7	; TWI Status
+                 
+                 ; TWDR - TWI Data register
+                 .equ	TWD0	= 0	; TWI Data Register Bit 0
+                 .equ	TWD1	= 1	; TWI Data Register Bit 1
+                 .equ	TWD2	= 2	; TWI Data Register Bit 2
+                 .equ	TWD3	= 3	; TWI Data Register Bit 3
+                 .equ	TWD4	= 4	; TWI Data Register Bit 4
+                 .equ	TWD5	= 5	; TWI Data Register Bit 5
+                 .equ	TWD6	= 6	; TWI Data Register Bit 6
+                 .equ	TWD7	= 7	; TWI Data Register Bit 7
+                 
+                 ; TWAR - TWI (Slave) Address register
+                 .equ	TWGCE	= 0	; TWI General Call Recognition Enable Bit
+                 .equ	TWA0	= 1	; TWI (Slave) Address register Bit 0
+                 .equ	TWA1	= 2	; TWI (Slave) Address register Bit 1
+                 .equ	TWA2	= 3	; TWI (Slave) Address register Bit 2
+                 .equ	TWA3	= 4	; TWI (Slave) Address register Bit 3
+                 .equ	TWA4	= 5	; TWI (Slave) Address register Bit 4
+                 .equ	TWA5	= 6	; TWI (Slave) Address register Bit 5
+                 .equ	TWA6	= 7	; TWI (Slave) Address register Bit 6
+                 
+                 
+                 ; ***** USART1 ***********************
+                 ; UDR1 - USART I/O Data Register
+                 .equ	UDR1_0	= 0	; USART I/O Data Register bit 0
+                 .equ	UDR1_1	= 1	; USART I/O Data Register bit 1
+                 .equ	UDR1_2	= 2	; USART I/O Data Register bit 2
+                 .equ	UDR1_3	= 3	; USART I/O Data Register bit 3
+                 .equ	UDR1_4	= 4	; USART I/O Data Register bit 4
+                 .equ	UDR1_5	= 5	; USART I/O Data Register bit 5
+                 .equ	UDR1_6	= 6	; USART I/O Data Register bit 6
+                 .equ	UDR1_7	= 7	; USART I/O Data Register bit 7
+                 
+                 ; UCSR1A - USART Control and Status Register A
+                 .equ	MPCM1	= 0	; Multi-processor Communication Mode
+                 .equ	U2X1	= 1	; Double the USART transmission speed
+                 .equ	UPE1	= 2	; Parity Error
+                 .equ	DOR1	= 3	; Data overRun
+                 .equ	FE1	= 4	; Framing Error
+                 .equ	UDRE1	= 5	; USART Data Register Empty
+                 .equ	TXC1	= 6	; USART Transmitt Complete
+                 .equ	RXC1	= 7	; USART Receive Complete
+                 
+                 ; UCSR1B - USART Control and Status Register B
+                 .equ	TXB81	= 0	; Transmit Data Bit 8
+                 .equ	RXB81	= 1	; Receive Data Bit 8
+                 .equ	UCSZ12	= 2	; Character Size
+                 .equ	TXEN1	= 3	; Transmitter Enable
+                 .equ	RXEN1	= 4	; Receiver Enable
+                 .equ	UDRIE1	= 5	; USART Data register Empty Interrupt Enable
+                 .equ	TXCIE1	= 6	; TX Complete Interrupt Enable
+                 .equ	RXCIE1	= 7	; RX Complete Interrupt Enable
+                 
+                 ; UCSR1C - USART Control and Status Register C
+                 .equ	UCPOL1	= 0	; Clock Polarity
+                 .equ	UCSZ10	= 1	; Character Size
+                 .equ	UCPHA1	= UCSZ10	; For compatibility
+                 .equ	UCSZ11	= 2	; Character Size
+                 .equ	UDORD1	= UCSZ11	; For compatibility
+                 .equ	USBS1	= 3	; Stop Bit Select
+                 .equ	UPM10	= 4	; Parity Mode Bit 0
+                 .equ	UPM11	= 5	; Parity Mode Bit 1
+                 .equ	UMSEL10	= 6	; USART Mode Select
+                 .equ	UMSEL11	= 7	; USART Mode Select
+                 
+                 ; UBRR1H - USART Baud Rate Register High Byte
+                 .equ	UBRR_8	= 0	; USART Baud Rate Register bit 8
+                 .equ	UBRR_9	= 1	; USART Baud Rate Register bit 9
+                 .equ	UBRR_10	= 2	; USART Baud Rate Register bit 10
+                 .equ	UBRR_11	= 3	; USART Baud Rate Register bit 11
+                 
+                 ; UBRR1L - USART Baud Rate Register Low Byte
+                 .equ	UBRR_0	= 0	; USART Baud Rate Register bit 0
+                 .equ	UBRR_1	= 1	; USART Baud Rate Register bit 1
+                 .equ	UBRR_2	= 2	; USART Baud Rate Register bit 2
+                 .equ	UBRR_3	= 3	; USART Baud Rate Register bit 3
+                 .equ	UBRR_4	= 4	; USART Baud Rate Register bit 4
+                 .equ	UBRR_5	= 5	; USART Baud Rate Register bit 5
+                 .equ	UBRR_6	= 6	; USART Baud Rate Register bit 6
+                 .equ	UBRR_7	= 7	; USART Baud Rate Register bit 7
+                 
+                 
+                 ; ***** SPI **************************
+                 ; SPDR - SPI Data Register
+                 .equ	SPDR0	= 0	; SPI Data Register bit 0
+                 .equ	SPDR1	= 1	; SPI Data Register bit 1
+                 .equ	SPDR2	= 2	; SPI Data Register bit 2
+                 .equ	SPDR3	= 3	; SPI Data Register bit 3
+                 .equ	SPDR4	= 4	; SPI Data Register bit 4
+                 .equ	SPDR5	= 5	; SPI Data Register bit 5
+                 .equ	SPDR6	= 6	; SPI Data Register bit 6
+                 .equ	SPDR7	= 7	; SPI Data Register bit 7
+                 
+                 ; SPSR - SPI Status Register
+                 .equ	SPI2X	= 0	; Double SPI Speed Bit
+                 .equ	WCOL	= 6	; Write Collision Flag
+                 .equ	SPIF	= 7	; SPI Interrupt Flag
+                 
+                 ; SPCR - SPI Control Register
+                 .equ	SPR0	= 0	; SPI Clock Rate Select 0
+                 .equ	SPR1	= 1	; SPI Clock Rate Select 1
+                 .equ	CPHA	= 2	; Clock Phase
+                 .equ	CPOL	= 3	; Clock polarity
+                 .equ	MSTR	= 4	; Master/Slave Select
+                 .equ	DORD	= 5	; Data Order
+                 .equ	SPE	= 6	; SPI Enable
+                 .equ	SPIE	= 7	; SPI Interrupt Enable
+                 
+                 
+                 ; ***** WATCHDOG *********************
+                 ; WDTCSR - Watchdog Timer Control Register
+                 .equ	WDP0	= 0	; Watch Dog Timer Prescaler bit 0
+                 .equ	WDP1	= 1	; Watch Dog Timer Prescaler bit 1
+                 .equ	WDP2	= 2	; Watch Dog Timer Prescaler bit 2
+                 .equ	WDE	= 3	; Watch Dog Enable
+                 .equ	WDCE	= 4	; Watchdog Change Enable
+                 .equ	WDP3	= 5	; Watchdog Timer Prescaler Bit 3
+                 .equ	WDIE	= 6	; Watchdog Timeout Interrupt Enable
+                 .equ	WDIF	= 7	; Watchdog Timeout Interrupt Flag
+                 
+                 
+                 ; ***** CPU **************************
+                 ; SREG - Status Register
+                 .equ	SREG_C	= 0	; Carry Flag
+                 .equ	SREG_Z	= 1	; Zero Flag
+                 .equ	SREG_N	= 2	; Negative Flag
+                 .equ	SREG_V	= 3	; Two's Complement Overflow Flag
+                 .equ	SREG_S	= 4	; Sign Bit
+                 .equ	SREG_H	= 5	; Half Carry Flag
+                 .equ	SREG_T	= 6	; Bit Copy Storage
+                 .equ	SREG_I	= 7	; Global Interrupt Enable
+                 
+                 ; MCUCR - MCU Control Register
+                 .equ	IVCE	= 0	; Interrupt Vector Change Enable
+                 .equ	IVSEL	= 1	; Interrupt Vector Select
+                 .equ	PUD	= 4	; Pull-up disable
+                 .equ	BODSE	= 5	; BOD Power Down in Sleep Enable
+                 .equ	BODS	= 6	; BOD Power Down in Sleep
+                 ;.equ	JTD	= 7	; JTAG Interface Disable
+                 
+                 ; MCUSR - MCU Status Register
+                 .equ	PORF	= 0	; Power-on reset flag
+                 .equ	EXTRF	= 1	; External Reset Flag
+                 .equ	BORF	= 2	; Brown-out Reset Flag
+                 .equ	WDRF	= 3	; Watchdog Reset Flag
+                 ;.equ	JTRF	= 4	; JTAG Reset Flag
+                 
+                 ; OSCCAL - Oscillator Calibration Value
+                 .equ	CAL0	= 0	; Oscillator Calibration Value Bit0
+                 .equ	CAL1	= 1	; Oscillator Calibration Value Bit1
+                 .equ	CAL2	= 2	; Oscillator Calibration Value Bit2
+                 .equ	CAL3	= 3	; Oscillator Calibration Value Bit3
+                 .equ	CAL4	= 4	; Oscillator Calibration Value Bit4
+                 .equ	CAL5	= 5	; Oscillator Calibration Value Bit5
+                 .equ	CAL6	= 6	; Oscillator Calibration Value Bit6
+                 .equ	CAL7	= 7	; Oscillator Calibration Value Bit7
+                 
+                 ; CLKPR - 
+                 .equ	CLKPS0	= 0	; 
+                 .equ	CLKPS1	= 1	; 
+                 .equ	CLKPS2	= 2	; 
+                 .equ	CLKPS3	= 3	; 
+                 .equ	CLKPCE	= 7	; 
+                 
+                 ; SMCR - Sleep Mode Control Register
+                 .equ	SE	= 0	; Sleep Enable
+                 .equ	SM0	= 1	; Sleep Mode Select bit 0
+                 .equ	SM1	= 2	; Sleep Mode Select bit 1
+                 .equ	SM2	= 3	; Sleep Mode Select bit 2
+                 
+                 ; RAMPZ - RAM Page Z Select Register
+                 .equ	RAMPZ0	= 0	; RAM Page Z Select Register Bit 0
+                 
+                 ; GPIOR2 - General Purpose IO Register 2
+                 .equ	GPIOR20	= 0	; General Purpose IO Register 2 bit 0
+                 .equ	GPIOR21	= 1	; General Purpose IO Register 2 bit 1
+                 .equ	GPIOR22	= 2	; General Purpose IO Register 2 bit 2
+                 .equ	GPIOR23	= 3	; General Purpose IO Register 2 bit 3
+                 .equ	GPIOR24	= 4	; General Purpose IO Register 2 bit 4
+                 .equ	GPIOR25	= 5	; General Purpose IO Register 2 bit 5
+                 .equ	GPIOR26	= 6	; General Purpose IO Register 2 bit 6
+                 .equ	GPIOR27	= 7	; General Purpose IO Register 2 bit 7
+                 
+                 ; GPIOR1 - General Purpose IO Register 1
+                 .equ	GPIOR10	= 0	; General Purpose IO Register 1 bit 0
+                 .equ	GPIOR11	= 1	; General Purpose IO Register 1 bit 1
+                 .equ	GPIOR12	= 2	; General Purpose IO Register 1 bit 2
+                 .equ	GPIOR13	= 3	; General Purpose IO Register 1 bit 3
+                 .equ	GPIOR14	= 4	; General Purpose IO Register 1 bit 4
+                 .equ	GPIOR15	= 5	; General Purpose IO Register 1 bit 5
+                 .equ	GPIOR16	= 6	; General Purpose IO Register 1 bit 6
+                 .equ	GPIOR17	= 7	; General Purpose IO Register 1 bit 7
+                 
+                 ; GPIOR0 - General Purpose IO Register 0
+                 .equ	GPIOR00	= 0	; General Purpose IO Register 0 bit 0
+                 .equ	GPIOR01	= 1	; General Purpose IO Register 0 bit 1
+                 .equ	GPIOR02	= 2	; General Purpose IO Register 0 bit 2
+                 .equ	GPIOR03	= 3	; General Purpose IO Register 0 bit 3
+                 .equ	GPIOR04	= 4	; General Purpose IO Register 0 bit 4
+                 .equ	GPIOR05	= 5	; General Purpose IO Register 0 bit 5
+                 .equ	GPIOR06	= 6	; General Purpose IO Register 0 bit 6
+                 .equ	GPIOR07	= 7	; General Purpose IO Register 0 bit 7
+                 
+                 ; PRR0 - Power Reduction Register0
+                 .equ	PRADC	= 0	; Power Reduction ADC
+                 .equ	PRUSART0	= 1	; Power Reduction USART 0
+                 .equ	PRSPI	= 2	; Power Reduction Serial Peripheral Interface
+                 .equ	PRTIM1	= 3	; Power Reduction Timer/Counter1
+                 .equ	PRUSART1	= 4	; Power Reduction USART 1
+                 .equ	PRTIM0	= 5	; Power Reduction Timer/Counter0
+                 .equ	PRTIM2	= 6	; Power Reduction Timer/Counter2
+                 .equ	PRTWI	= 7	; Power Reduction TWI
+                 
+                 ; PRR1 - Power Reduction Register1
+                 .equ	PRTIM3	= 0	; Power Reduction Timer/Counter3
+                 
+                 
+                 
+                 ; ***** LOCKSBITS ********************************************************
+                 .equ	LB1	= 0	; Lock bit
+                 .equ	LB2	= 1	; Lock bit
+                 .equ	BLB01	= 2	; Boot Lock bit
+                 .equ	BLB02	= 3	; Boot Lock bit
+                 .equ	BLB11	= 4	; Boot lock bit
+                 .equ	BLB12	= 5	; Boot lock bit
+                 
+                 
+                 ; ***** FUSES ************************************************************
+                 ; LOW fuse bits
+                 .equ	CKSEL0	= 0	; Select Clock Source
+                 .equ	CKSEL1	= 1	; Select Clock Source
+                 .equ	CKSEL2	= 2	; Select Clock Source
+                 .equ	CKSEL3	= 3	; Select Clock Source
+                 .equ	SUT0	= 4	; Select start-up time
+                 .equ	SUT1	= 5	; Select start-up time
+                 .equ	CKOUT	= 6	; Clock output
+                 .equ	CKDIV8	= 7	; Divide clock by 8
+                 
+                 ; HIGH fuse bits
+                 .equ	BOOTRST	= 0	; Select Reset Vector
+                 .equ	BOOTSZ0	= 1	; Select Boot Size
+                 .equ	BOOTSZ1	= 2	; Select Boot Size
+                 .equ	EESAVE	= 3	; EEPROM memory is preserved through chip erase
+                 .equ	WDTON	= 4	; Watchdog timer always on
+                 .equ	SPIEN	= 5	; Enable Serial programming and Data Downloading
+                 .equ	JTAGEN	= 6	; Enable JTAG
+                 .equ	OCDEN	= 7	; Enable OCD
+                 
+                 ; EXTENDED fuse bits
+                 .equ	BODLEVEL0	= 0	; Brown-out Detector trigger level
+                 .equ	BODLEVEL1	= 1	; Brown-out Detector trigger level
+                 .equ	BODLEVEL2	= 2	; Brown-out Detector trigger level
+                 
+                 
+                 
+                 ; ***** CPU REGISTER DEFINITIONS *****************************************
+                 .def	XH	= r27
+                 .def	XL	= r26
+                 .def	YH	= r29
+                 .def	YL	= r28
+                 .def	ZH	= r31
+                 .def	ZL	= r30
+                 
+                 
+                 
+                 ; ***** DATA MEMORY DECLARATIONS *****************************************
+                 .equ	FLASHEND	= 0xffff	; Note: Word address
+                 .equ	IOEND	= 0x00ff
+                 .equ	SRAM_START	= 0x0100
+                 .equ	SRAM_SIZE	= 16384
+                 .equ	RAMEND	= 0x40ff
+                 .equ	XRAMEND	= 0x0000
+                 .equ	E2END	= 0x0fff
+                 .equ	EEPROMEND	= 0x0fff
+                 .equ	EEADRBITS	= 12
+                 #pragma AVRPART MEMORY PROG_FLASH 131072
+                 #pragma AVRPART MEMORY EEPROM 4096
+                 #pragma AVRPART MEMORY INT_SRAM SIZE 16384
+                 #pragma AVRPART MEMORY INT_SRAM START_ADDR 0x100
+                 
+                 
+                 
+                 ; ***** BOOTLOADER DECLARATIONS ******************************************
+                 .equ	NRWW_START_ADDR	= 0xf000
+                 .equ	NRWW_STOP_ADDR	= 0xffff
+                 .equ	RWW_START_ADDR	= 0x0
+                 .equ	RWW_STOP_ADDR	= 0xefff
+                 .equ	PAGESIZE	= 128
+                 .equ	FIRSTBOOTSTART	= 0xfe00
+                 .equ	SECONDBOOTSTART	= 0xfc00
+                 .equ	THIRDBOOTSTART	= 0xf800
+                 .equ	FOURTHBOOTSTART	= 0xf000
+                 .equ	SMALLBOOTSTART	= FIRSTBOOTSTART
+                 .equ	LARGEBOOTSTART	= FOURTHBOOTSTART
+                 
+                 
+                 
+                 ; ***** INTERRUPT VECTORS ************************************************
+                 .equ	INT0addr	= 0x0002	; External Interrupt Request 0
+                 .equ	INT1addr	= 0x0004	; External Interrupt Request 1
+                 .equ	INT2addr	= 0x0006	; External Interrupt Request 2
+                 .equ	PCI0addr	= 0x0008	; Pin Change Interrupt Request 0
+                 .equ	PCI1addr	= 0x000a	; Pin Change Interrupt Request 1
+                 .equ	PCI2addr	= 0x000c	; Pin Change Interrupt Request 2
+                 .equ	PCI3addr	= 0x000e	; Pin Change Interrupt Request 3
+                 .equ	WDTaddr	= 0x0010	; Watchdog Time-out Interrupt
+                 .equ	OC2Aaddr	= 0x0012	; Timer/Counter2 Compare Match A
+                 .equ	OC2Baddr	= 0x0014	; Timer/Counter2 Compare Match B
+                 .equ	OVF2addr	= 0x0016	; Timer/Counter2 Overflow
+                 .equ	ICP1addr	= 0x0018	; Timer/Counter1 Capture Event
+                 .equ	OC1Aaddr	= 0x001a	; Timer/Counter1 Compare Match A
+                 .equ	OC1Baddr	= 0x001c	; Timer/Counter1 Compare Match B
+                 .equ	OVF1addr	= 0x001e	; Timer/Counter1 Overflow
+                 .equ	OC0Aaddr	= 0x0020	; Timer/Counter0 Compare Match A
+                 .equ	OC0Baddr	= 0x0022	; Timer/Counter0 Compare Match B
+                 .equ	OVF0addr	= 0x0024	; Timer/Counter0 Overflow
+                 .equ	SPIaddr	= 0x0026	; SPI Serial Transfer Complete
+                 .equ	URXC0addr	= 0x0028	; USART0, Rx Complete
+                 .equ	UDRE0addr	= 0x002a	; USART0 Data register Empty
+                 .equ	UTXC0addr	= 0x002c	; USART0, Tx Complete
+                 .equ	ACIaddr	= 0x002e	; Analog Comparator
+                 .equ	ADCCaddr	= 0x0030	; ADC Conversion Complete
+                 .equ	ERDYaddr	= 0x0032	; EEPROM Ready
+                 .equ	TWIaddr	= 0x0034	; 2-wire Serial Interface
+                 .equ	SPMRaddr	= 0x0036	; Store Program Memory Read
+                 .equ	URXC1addr	= 0x0038	; USART1 RX complete
+                 .equ	UDRE1addr	= 0x003a	; USART1 Data Register Empty
+                 .equ	UTXC1addr	= 0x003c	; USART1 TX complete
+                 .equ	ICP3addr	= 0x003e	; Timer/Counter3 Capture Event
+                 .equ	OC3Aaddr	= 0x0040	; Timer/Counter3 Compare Match A
+                 .equ	OC3Baddr	= 0x0042	; Timer/Counter3 Compare Match B
+                 .equ	OVF3addr	= 0x0044	; Timer/Counter3 Overflow
+                 
+                 .equ	INT_VECTORS_SIZE	= 70	; size in words
+                 
+                 #endif  /* _M1284PDEF_INC_ */
+                 
+                 ; ***** END OF FILE ******************************************************
+                 
+                 ;******************************************************************************
+                 ; Set Register definitions
+                 ;******************************************************************************
+                 .def  i		= R16
+                 .def  j		= R17
+                 .def  zero	= R2
+                 .def  one	= R3
+                 .def  mmap  = R4
+                 
+                 .def  free1 = R12				; unused register pair
+                 .def  free2 = R13
+                 
+                 ;******************************************************************************
+                 ; Load Lower Flash Tables starting at 0x1B00 (below ROM image)
+                 ;******************************************************************************
+                 
+                 .include	"av2sr.inc"
+                 
+                 
+                 .cseg
+                 .org 0x1B00
+                 
+                 tav2sr:
+                 
+001b00 0100      	.db	0x00, 0x01	; 00 & 01
+001b01 0302      	.db	0x02, 0x03	; 02 & 03
+001b02 8180      	.db	0x80, 0x81	; 04 & 05
+001b03 8382      	.db	0x82, 0x83	; 06 & 07
+001b04 0100      	.db	0x00, 0x01	; 08 & 09
+001b05 0302      	.db	0x02, 0x03	; 0A & 0B
+001b06 8180      	.db	0x80, 0x81	; 0C & 0D
+001b07 8382      	.db	0x82, 0x83	; 0E & 0F
+001b08 0100      	.db	0x00, 0x01	; 10 & 11
+001b09 0302      	.db	0x02, 0x03	; 12 & 13
+001b0a 8180      	.db	0x80, 0x81	; 14 & 15
+001b0b 8382      	.db	0x82, 0x83	; 16 & 17
+001b0c 0100      	.db	0x00, 0x01	; 18 & 19
+001b0d 0302      	.db	0x02, 0x03	; 1A & 1B
+001b0e 8180      	.db	0x80, 0x81	; 1C & 1D
+001b0f 8382      	.db	0x82, 0x83	; 1E & 1F
+001b10 0100      	.db	0x00, 0x01	; 20 & 21
+001b11 0302      	.db	0x02, 0x03	; 22 & 23
+001b12 8180      	.db	0x80, 0x81	; 24 & 25
+001b13 8382      	.db	0x82, 0x83	; 26 & 27
+001b14 0100      	.db	0x00, 0x01	; 28 & 29
+001b15 0302      	.db	0x02, 0x03	; 2A & 2B
+001b16 8180      	.db	0x80, 0x81	; 2C & 2D
+001b17 8382      	.db	0x82, 0x83	; 2E & 2F
+001b18 0100      	.db	0x00, 0x01	; 30 & 31
+001b19 0302      	.db	0x02, 0x03	; 32 & 33
+001b1a 8180      	.db	0x80, 0x81	; 34 & 35
+001b1b 8382      	.db	0x82, 0x83	; 36 & 37
+001b1c 0100      	.db	0x00, 0x01	; 38 & 39
+001b1d 0302      	.db	0x02, 0x03	; 3A & 3B
+001b1e 8180      	.db	0x80, 0x81	; 3C & 3D
+001b1f 8382      	.db	0x82, 0x83	; 3E & 3F
+001b20 4140      	.db	0x40, 0x41	; 40 & 41
+001b21 4342      	.db	0x42, 0x43	; 42 & 43
+001b22 c1c0      	.db	0xC0, 0xC1	; 44 & 45
+001b23 c3c2      	.db	0xC2, 0xC3	; 46 & 47
+001b24 4140      	.db	0x40, 0x41	; 48 & 49
+001b25 4342      	.db	0x42, 0x43	; 4A & 4B
+001b26 c1c0      	.db	0xC0, 0xC1	; 4C & 4D
+001b27 c3c2      	.db	0xC2, 0xC3	; 4E & 4F
+001b28 4140      	.db	0x40, 0x41	; 50 & 51
+001b29 4342      	.db	0x42, 0x43	; 52 & 53
+001b2a c1c0      	.db	0xC0, 0xC1	; 54 & 55
+001b2b c3c2      	.db	0xC2, 0xC3	; 56 & 57
+001b2c 4140      	.db	0x40, 0x41	; 58 & 59
+001b2d 4342      	.db	0x42, 0x43	; 5A & 5B
+001b2e c1c0      	.db	0xC0, 0xC1	; 5C & 5D
+001b2f c3c2      	.db	0xC2, 0xC3	; 5E & 5F
+001b30 4140      	.db	0x40, 0x41	; 60 & 61
+001b31 4342      	.db	0x42, 0x43	; 62 & 63
+001b32 c1c0      	.db	0xC0, 0xC1	; 64 & 65
+001b33 c3c2      	.db	0xC2, 0xC3	; 66 & 67
+001b34 4140      	.db	0x40, 0x41	; 68 & 69
+001b35 4342      	.db	0x42, 0x43	; 6A & 6B
+001b36 c1c0      	.db	0xC0, 0xC1	; 6C & 6D
+001b37 c3c2      	.db	0xC2, 0xC3	; 6E & 6F
+001b38 4140      	.db	0x40, 0x41	; 70 & 71
+001b39 4342      	.db	0x42, 0x43	; 72 & 73
+001b3a c1c0      	.db	0xC0, 0xC1	; 74 & 75
+001b3b c3c2      	.db	0xC2, 0xC3	; 76 & 77
+001b3c 4140      	.db	0x40, 0x41	; 78 & 79
+001b3d 4342      	.db	0x42, 0x43	; 7A & 7B
+001b3e c1c0      	.db	0xC0, 0xC1	; 7C & 7D
+001b3f c3c2      	.db	0xC2, 0xC3	; 7E & 7F
+001b40 0100      	.db	0x00, 0x01	; 80 & 81
+001b41 0302      	.db	0x02, 0x03	; 82 & 83
+001b42 8180      	.db	0x80, 0x81	; 84 & 85
+001b43 8382      	.db	0x82, 0x83	; 86 & 87
+001b44 0100      	.db	0x00, 0x01	; 88 & 89
+001b45 0302      	.db	0x02, 0x03	; 8A & 8B
+001b46 8180      	.db	0x80, 0x81	; 8C & 8D
+001b47 8382      	.db	0x82, 0x83	; 8E & 8F
+001b48 0100      	.db	0x00, 0x01	; 90 & 91
+001b49 0302      	.db	0x02, 0x03	; 92 & 93
+001b4a 8180      	.db	0x80, 0x81	; 94 & 95
+001b4b 8382      	.db	0x82, 0x83	; 96 & 97
+001b4c 0100      	.db	0x00, 0x01	; 98 & 99
+001b4d 0302      	.db	0x02, 0x03	; 9A & 9B
+001b4e 8180      	.db	0x80, 0x81	; 9C & 9D
+001b4f 8382      	.db	0x82, 0x83	; 9E & 9F
+001b50 0100      	.db	0x00, 0x01	; A0 & A1
+001b51 0302      	.db	0x02, 0x03	; A2 & A3
+001b52 8180      	.db	0x80, 0x81	; A4 & A5
+001b53 8382      	.db	0x82, 0x83	; A6 & A7
+001b54 0100      	.db	0x00, 0x01	; A8 & A9
+001b55 0302      	.db	0x02, 0x03	; AA & AB
+001b56 8180      	.db	0x80, 0x81	; AC & AD
+001b57 8382      	.db	0x82, 0x83	; AE & AF
+001b58 0100      	.db	0x00, 0x01	; B0 & B1
+001b59 0302      	.db	0x02, 0x03	; B2 & B3
+001b5a 8180      	.db	0x80, 0x81	; B4 & B5
+001b5b 8382      	.db	0x82, 0x83	; B6 & B7
+001b5c 0100      	.db	0x00, 0x01	; B8 & B9
+001b5d 0302      	.db	0x02, 0x03	; BA & BB
+001b5e 8180      	.db	0x80, 0x81	; BC & BD
+001b5f 8382      	.db	0x82, 0x83	; BE & BF
+001b60 4140      	.db	0x40, 0x41	; C0 & C1
+001b61 4342      	.db	0x42, 0x43	; C2 & C3
+001b62 c1c0      	.db	0xC0, 0xC1	; C4 & C5
+001b63 c3c2      	.db	0xC2, 0xC3	; C6 & C7
+001b64 4140      	.db	0x40, 0x41	; C8 & C9
+001b65 4342      	.db	0x42, 0x43	; CA & CB
+001b66 c1c0      	.db	0xC0, 0xC1	; CC & CD
+001b67 c3c2      	.db	0xC2, 0xC3	; CE & CF
+001b68 4140      	.db	0x40, 0x41	; D0 & D1
+001b69 4342      	.db	0x42, 0x43	; D2 & D3
+001b6a c1c0      	.db	0xC0, 0xC1	; D4 & D5
+001b6b c3c2      	.db	0xC2, 0xC3	; D6 & D7
+001b6c 4140      	.db	0x40, 0x41	; D8 & D9
+001b6d 4342      	.db	0x42, 0x43	; DA & DB
+001b6e c1c0      	.db	0xC0, 0xC1	; DC & DD
+001b6f c3c2      	.db	0xC2, 0xC3	; DE & DF
+001b70 4140      	.db	0x40, 0x41	; E0 & E1
+001b71 4342      	.db	0x42, 0x43	; E2 & E3
+001b72 c1c0      	.db	0xC0, 0xC1	; E4 & E5
+001b73 c3c2      	.db	0xC2, 0xC3	; E6 & E7
+001b74 4140      	.db	0x40, 0x41	; E8 & E9
+001b75 4342      	.db	0x42, 0x43	; EA & EB
+001b76 c1c0      	.db	0xC0, 0xC1	; EC & ED
+001b77 c3c2      	.db	0xC2, 0xC3	; EE & EF
+001b78 4140      	.db	0x40, 0x41	; F0 & F1
+001b79 4342      	.db	0x42, 0x43	; F2 & F3
+001b7a c1c0      	.db	0xC0, 0xC1	; F4 & F5
+001b7b c3c2      	.db	0xC2, 0xC3	; F6 & F7
+001b7c 4140      	.db	0x40, 0x41	; F8 & F9
+001b7d 4342      	.db	0x42, 0x43	; FA & FB
+001b7e c1c0      	.db	0xC0, 0xC1	; FC & FD
+001b7f c3c2      	.db	0xC2, 0xC3	; FE & FF
+                 .include	"sr2av.inc"
+                 
+                 
+                 .cseg
+                 .org 0x1C00
+                 
+                 tsr2av:
+                 
+001c00 8180      	.db	0x80, 0x81	; 00 & 01
+001c01 8382      	.db	0x82, 0x83	; 02 & 03
+001c02 0100      	.db	0x00, 0x01	; 04 & 05
+001c03 0302      	.db	0x02, 0x03	; 06 & 07
+001c04 8180      	.db	0x80, 0x81	; 08 & 09
+001c05 8382      	.db	0x82, 0x83	; 0A & 0B
+001c06 0100      	.db	0x00, 0x01	; 0C & 0D
+001c07 0302      	.db	0x02, 0x03	; 0E & 0F
+001c08 8180      	.db	0x80, 0x81	; 10 & 11
+001c09 8382      	.db	0x82, 0x83	; 12 & 13
+001c0a 0100      	.db	0x00, 0x01	; 14 & 15
+001c0b 0302      	.db	0x02, 0x03	; 16 & 17
+001c0c 8180      	.db	0x80, 0x81	; 18 & 19
+001c0d 8382      	.db	0x82, 0x83	; 1A & 1B
+001c0e 0100      	.db	0x00, 0x01	; 1C & 1D
+001c0f 0302      	.db	0x02, 0x03	; 1E & 1F
+001c10 8180      	.db	0x80, 0x81	; 20 & 21
+001c11 8382      	.db	0x82, 0x83	; 22 & 23
+001c12 0100      	.db	0x00, 0x01	; 24 & 25
+001c13 0302      	.db	0x02, 0x03	; 26 & 27
+001c14 8180      	.db	0x80, 0x81	; 28 & 29
+001c15 8382      	.db	0x82, 0x83	; 2A & 2B
+001c16 0100      	.db	0x00, 0x01	; 2C & 2D
+001c17 0302      	.db	0x02, 0x03	; 2E & 2F
+001c18 8180      	.db	0x80, 0x81	; 30 & 31
+001c19 8382      	.db	0x82, 0x83	; 32 & 33
+001c1a 0100      	.db	0x00, 0x01	; 34 & 35
+001c1b 0302      	.db	0x02, 0x03	; 36 & 37
+001c1c 8180      	.db	0x80, 0x81	; 38 & 39
+001c1d 8382      	.db	0x82, 0x83	; 3A & 3B
+001c1e 0100      	.db	0x00, 0x01	; 3C & 3D
+001c1f 0302      	.db	0x02, 0x03	; 3E & 3F
+001c20 c1c0      	.db	0xC0, 0xC1	; 40 & 41
+001c21 c3c2      	.db	0xC2, 0xC3	; 42 & 43
+001c22 4140      	.db	0x40, 0x41	; 44 & 45
+001c23 4342      	.db	0x42, 0x43	; 46 & 47
+001c24 c1c0      	.db	0xC0, 0xC1	; 48 & 49
+001c25 c3c2      	.db	0xC2, 0xC3	; 4A & 4B
+001c26 4140      	.db	0x40, 0x41	; 4C & 4D
+001c27 4342      	.db	0x42, 0x43	; 4E & 4F
+001c28 c1c0      	.db	0xC0, 0xC1	; 50 & 51
+001c29 c3c2      	.db	0xC2, 0xC3	; 52 & 53
+001c2a 4140      	.db	0x40, 0x41	; 54 & 55
+001c2b 4342      	.db	0x42, 0x43	; 56 & 57
+001c2c c1c0      	.db	0xC0, 0xC1	; 58 & 59
+001c2d c3c2      	.db	0xC2, 0xC3	; 5A & 5B
+001c2e 4140      	.db	0x40, 0x41	; 5C & 5D
+001c2f 4342      	.db	0x42, 0x43	; 5E & 5F
+001c30 c1c0      	.db	0xC0, 0xC1	; 60 & 61
+001c31 c3c2      	.db	0xC2, 0xC3	; 62 & 63
+001c32 4140      	.db	0x40, 0x41	; 64 & 65
+001c33 4342      	.db	0x42, 0x43	; 66 & 67
+001c34 c1c0      	.db	0xC0, 0xC1	; 68 & 69
+001c35 c3c2      	.db	0xC2, 0xC3	; 6A & 6B
+001c36 4140      	.db	0x40, 0x41	; 6C & 6D
+001c37 4342      	.db	0x42, 0x43	; 6E & 6F
+001c38 c1c0      	.db	0xC0, 0xC1	; 70 & 71
+001c39 c3c2      	.db	0xC2, 0xC3	; 72 & 73
+001c3a 4140      	.db	0x40, 0x41	; 74 & 75
+001c3b 4342      	.db	0x42, 0x43	; 76 & 77
+001c3c c1c0      	.db	0xC0, 0xC1	; 78 & 79
+001c3d c3c2      	.db	0xC2, 0xC3	; 7A & 7B
+001c3e 4140      	.db	0x40, 0x41	; 7C & 7D
+001c3f 4342      	.db	0x42, 0x43	; 7E & 7F
+001c40 8584      	.db	0x84, 0x85	; 80 & 81
+001c41 8786      	.db	0x86, 0x87	; 82 & 83
+001c42 0504      	.db	0x04, 0x05	; 84 & 85
+001c43 0706      	.db	0x06, 0x07	; 86 & 87
+001c44 8584      	.db	0x84, 0x85	; 88 & 89
+001c45 8786      	.db	0x86, 0x87	; 8A & 8B
+001c46 0504      	.db	0x04, 0x05	; 8C & 8D
+001c47 0706      	.db	0x06, 0x07	; 8E & 8F
+001c48 8584      	.db	0x84, 0x85	; 90 & 91
+001c49 8786      	.db	0x86, 0x87	; 92 & 93
+001c4a 0504      	.db	0x04, 0x05	; 94 & 95
+001c4b 0706      	.db	0x06, 0x07	; 96 & 97
+001c4c 8584      	.db	0x84, 0x85	; 98 & 99
+001c4d 8786      	.db	0x86, 0x87	; 9A & 9B
+001c4e 0504      	.db	0x04, 0x05	; 9C & 9D
+001c4f 0706      	.db	0x06, 0x07	; 9E & 9F
+001c50 8584      	.db	0x84, 0x85	; A0 & A1
+001c51 8786      	.db	0x86, 0x87	; A2 & A3
+001c52 0504      	.db	0x04, 0x05	; A4 & A5
+001c53 0706      	.db	0x06, 0x07	; A6 & A7
+001c54 8584      	.db	0x84, 0x85	; A8 & A9
+001c55 8786      	.db	0x86, 0x87	; AA & AB
+001c56 0504      	.db	0x04, 0x05	; AC & AD
+001c57 0706      	.db	0x06, 0x07	; AE & AF
+001c58 8584      	.db	0x84, 0x85	; B0 & B1
+001c59 8786      	.db	0x86, 0x87	; B2 & B3
+001c5a 0504      	.db	0x04, 0x05	; B4 & B5
+001c5b 0706      	.db	0x06, 0x07	; B6 & B7
+001c5c 8584      	.db	0x84, 0x85	; B8 & B9
+001c5d 8786      	.db	0x86, 0x87	; BA & BB
+001c5e 0504      	.db	0x04, 0x05	; BC & BD
+001c5f 0706      	.db	0x06, 0x07	; BE & BF
+001c60 c5c4      	.db	0xC4, 0xC5	; C0 & C1
+001c61 c7c6      	.db	0xC6, 0xC7	; C2 & C3
+001c62 4544      	.db	0x44, 0x45	; C4 & C5
+001c63 4746      	.db	0x46, 0x47	; C6 & C7
+001c64 c5c4      	.db	0xC4, 0xC5	; C8 & C9
+001c65 c7c6      	.db	0xC6, 0xC7	; CA & CB
+001c66 4544      	.db	0x44, 0x45	; CC & CD
+001c67 4746      	.db	0x46, 0x47	; CE & CF
+001c68 c5c4      	.db	0xC4, 0xC5	; D0 & D1
+001c69 c7c6      	.db	0xC6, 0xC7	; D2 & D3
+001c6a 4544      	.db	0x44, 0x45	; D4 & D5
+001c6b 4746      	.db	0x46, 0x47	; D6 & D7
+001c6c c5c4      	.db	0xC4, 0xC5	; D8 & D9
+001c6d c7c6      	.db	0xC6, 0xC7	; DA & DB
+001c6e 4544      	.db	0x44, 0x45	; DC & DD
+001c6f 4746      	.db	0x46, 0x47	; DE & DF
+001c70 c5c4      	.db	0xC4, 0xC5	; E0 & E1
+001c71 c7c6      	.db	0xC6, 0xC7	; E2 & E3
+001c72 4544      	.db	0x44, 0x45	; E4 & E5
+001c73 4746      	.db	0x46, 0x47	; E6 & E7
+001c74 c5c4      	.db	0xC4, 0xC5	; E8 & E9
+001c75 c7c6      	.db	0xC6, 0xC7	; EA & EB
+001c76 4544      	.db	0x44, 0x45	; EC & ED
+001c77 4746      	.db	0x46, 0x47	; EE & EF
+001c78 c5c4      	.db	0xC4, 0xC5	; F0 & F1
+001c79 c7c6      	.db	0xC6, 0xC7	; F2 & F3
+001c7a 4544      	.db	0x44, 0x45	; F4 & F5
+001c7b 4746      	.db	0x46, 0x47	; F6 & F7
+001c7c c5c4      	.db	0xC4, 0xC5	; F8 & F9
+001c7d c7c6      	.db	0xC6, 0xC7	; FA & FB
+001c7e 4544      	.db	0x44, 0x45	; FC & FD
+001c7f 4746      	.db	0x46, 0x47	; FE & FF
+                 .include	"opcjmp.inc"
+                 
+                 
+                 .cseg
+                 .org	0x1D00
+                 
+                 ;**********************
+                 ; Opcode jump table
+                 ;**********************
+                 
+                 opctbl:
+001d00 940c 8085 	jmp	_BRK_IMP		;00
+001d02 940c 80ab 	jmp	_ORA_INDX		;01
+001d04 940c 805d 	jmp	_INV2			;02
+001d06 940c 804a 	jmp	_INV			;03
+001d08 940c 80e3 	jmp	_TSB_ZPG		;04
+001d0a 940c 810e 	jmp	_ORA_ZPG		;05
+001d0c 940c 8135 	jmp	_ASL_ZPG		;06
+001d0e 940c 815d 	jmp	_RMB0_ZPG		;07
+001d10 940c 8183 	jmp	_PHP_IMP		;08
+001d12 940c 819d 	jmp	_ORA_IMM		;09
+001d14 940c 81c2 	jmp	_ASL_IMP		;0A
+001d16 940c 804a 	jmp	_INV			;0B
+001d18 940c 81d8 	jmp	_TSB_ABS		;0C
+001d1a 940c 8223 	jmp	_ORA_ABS		;0D
+001d1c 940c 8258 	jmp	_ASL_ABS		;0E
+001d1e 940c 82a0 	jmp	_BBR0_REL		;0F
+001d20 940c 82d1 	jmp	_BPL_REL		;10
+001d22 940c 8311 	jmp	_ORA_INDY		;11
+001d24 940c 834a 	jmp	_ORA_IND		;12
+001d26 940c 804a 	jmp	_INV			;13
+001d28 940c 8381 	jmp	_TRB_ZPG		;14
+001d2a 940c 83ae 	jmp	_ORA_ZPGX		;15
+001d2c 940c 83d6 	jmp	_ASL_ZPGX		;16
+001d2e 940c 83ff 	jmp	_RMB1_ZPG		;17
+001d30 940c 8425 	jmp	_CLC_IMP		;18
+001d32 940c 8439 	jmp	_ORA_ABSY		;19
+001d34 940c 8470 	jmp	_INC_IMP		;1A
+001d36 940c 804a 	jmp	_INV			;1B
+001d38 940c 8486 	jmp	_TRB_ABS		;1C
+001d3a 940c 84d3 	jmp	_ORA_ABSX		;1D
+001d3c 940c 850a 	jmp	_ASL_ABSX		;1E
+001d3e 940c 8554 	jmp	_BBR1_REL		;1F
+001d40 940c 8585 	jmp	_JSR_ABS		;20
+001d42 940c 85af 	jmp	_AND_INDX		;21
+001d44 940c 805d 	jmp	_INV2			;22
+001d46 940c 804a 	jmp	_INV			;23
+001d48 940c 85e7 	jmp	_BIT_ZPG		;24
+001d4a 940c 8613 	jmp	_AND_ZPG		;25
+001d4c 940c 863a 	jmp	_ROL_ZPG		;26
+001d4e 940c 8662 	jmp	_RMB2_ZPG		;27
+001d50 940c 8688 	jmp	_PLP_IMP		;28
+001d52 940c 86a3 	jmp	_AND_IMM		;29
+001d54 940c 86c8 	jmp	_ROL_IMP		;2A
+001d56 940c 804a 	jmp	_INV			;2B
+001d58 940c 86de 	jmp	_BIT_ABS		;2C
+001d5a 940c 8718 	jmp	_AND_ABS		;2D
+001d5c 940c 874d 	jmp	_ROL_ABS		;2E
+001d5e 940c 8795 	jmp	_BBR2_REL		;2F
+001d60 940c 87c6 	jmp	_BMI_REL		;30
+001d62 940c 8806 	jmp	_AND_INDY		;31
+001d64 940c 883f 	jmp	_AND_IND		;32
+001d66 940c 804a 	jmp	_INV			;33
+001d68 940c 8876 	jmp	_BIT_ZPGX		;34
+001d6a 940c 88a3 	jmp	_AND_ZPGX		;35
+001d6c 940c 88cb 	jmp	_ROL_ZPGX		;36
+001d6e 940c 88f4 	jmp	_RMB3_ZPG		;37
+001d70 940c 891a 	jmp	_SEC_IMP		;38
+001d72 940c 892e 	jmp	_AND_ABSY		;39
+001d74 940c 8965 	jmp	_DEC_IMP		;3A
+001d76 940c 804a 	jmp	_INV			;3B
+001d78 940c 897b 	jmp	_BIT_ABSX		;3C
+001d7a 940c 89b7 	jmp	_AND_ABSX		;3D
+001d7c 940c 89ee 	jmp	_ROL_ABSX		;3E
+001d7e 940c 8a38 	jmp	_BBR3_REL		;3F
+001d80 940c 8a69 	jmp	_RTI_IMP		;40
+001d82 940c 8a86 	jmp	_EOR_INDX		;41
+001d84 940c 805d 	jmp	_INV2			;42
+001d86 940c 804a 	jmp	_INV			;43
+001d88 940c 805d 	jmp	_INV2			;44
+001d8a 940c 8abe 	jmp	_EOR_ZPG		;45
+001d8c 940c 8ae5 	jmp	_LSR_ZPG		;46
+001d8e 940c 8b0d 	jmp	_RMB4_ZPG		;47
+001d90 940c 8b33 	jmp	_PHA_IMP		;48
+001d92 940c 8b48 	jmp	_EOR_IMM		;49
+001d94 940c 8b6d 	jmp	_LSR_IMP		;4A
+001d96 940c 804a 	jmp	_INV			;4B
+001d98 940c 8b83 	jmp	_JMP_ABS		;4C
+001d9a 940c 8ba8 	jmp	_EOR_ABS		;4D
+001d9c 940c 8bdd 	jmp	_LSR_ABS		;4E
+001d9e 940c 8c25 	jmp	_BBR4_REL		;4F
+001da0 940c 8c56 	jmp	_BVC_REL		;50
+001da2 940c 8c96 	jmp	_EOR_INDY		;51
+001da4 940c 8ccf 	jmp	_EOR_IND		;52
+001da6 940c 804a 	jmp	_INV			;53
+001da8 940c 805d 	jmp	_INV2			;54
+001daa 940c 8d06 	jmp	_EOR_ZPGX		;55
+001dac 940c 8d2e 	jmp	_LSR_ZPGX		;56
+001dae 940c 8d57 	jmp	_RMB5_ZPG		;57
+001db0 940c 8d7d 	jmp	_CLI_IMP		;58
+001db2 940c 8d92 	jmp	_EOR_ABSY		;59
+001db4 940c 8dc9 	jmp	_PHY_IMP		;5A
+001db6 940c 804a 	jmp	_INV			;5B
+001db8 940c 8071 	jmp	_INV3			;5C
+001dba 940c 8dde 	jmp	_EOR_ABSX		;5D
+001dbc 940c 8e15 	jmp	_LSR_ABSX		;5E
+001dbe 940c 8e5f 	jmp	_BBR5_REL		;5F
+001dc0 940c 8e90 	jmp	_RTS_IMP		;60
+001dc2 940c 8ea8 	jmp	_ADC_INDX		;61
+001dc4 940c 805d 	jmp	_INV2			;62
+001dc6 940c 804a 	jmp	_INV			;63
+001dc8 940c 8ef2 	jmp	_STZ_ZPG		;64
+001dca 940c 8f17 	jmp	_ADC_ZPG		;65
+001dcc 940c 8f50 	jmp	_ROR_ZPG		;66
+001dce 940c 8f78 	jmp	_RMB6_ZPG		;67
+001dd0 940c 8f9e 	jmp	_PLA_IMP		;68
+001dd2 940c 8fb6 	jmp	_ADC_IMM		;69
+001dd4 940c 8fed 	jmp	_ROR_IMP		;6A
+001dd6 940c 804a 	jmp	_INV			;6B
+001dd8 940c 9003 	jmp	_JMP_JIND		;6C
+001dda 940c 9038 	jmp	_ADC_ABS		;6D
+001ddc 940c 907f 	jmp	_ROR_ABS		;6E
+001dde 940c 90c7 	jmp	_BBR6_REL		;6F
+001de0 940c 90f8 	jmp	_BVS_REL		;70
+001de2 940c 9138 	jmp	_ADC_INDY		;71
+001de4 940c 9183 	jmp	_ADC_IND		;72
+001de6 940c 804a 	jmp	_INV			;73
+001de8 940c 91cc 	jmp	_STZ_ZPGX		;74
+001dea 940c 91f2 	jmp	_ADC_ZPGX		;75
+001dec 940c 922c 	jmp	_ROR_ZPGX		;76
+001dee 940c 9255 	jmp	_RMB7_ZPG		;77
+001df0 940c 927b 	jmp	_SEI_IMP		;78
+001df2 940c 9290 	jmp	_ADC_ABSY		;79
+001df4 940c 92d9 	jmp	_PLY_IMP		;7A
+001df6 940c 804a 	jmp	_INV			;7B
+001df8 940c 92f1 	jmp	_JMP_JINDX		;7C
+001dfa 940c 9328 	jmp	_ADC_ABSX		;7D
+001dfc 940c 9371 	jmp	_ROR_ABSX		;7E
+001dfe 940c 93bb 	jmp	_BBR7_REL		;7F
+001e00 940c 93ec 	jmp	_BRA_REL		;80
+001e02 940c 9416 	jmp	_STA_INDX		;81
+001e04 940c 805d 	jmp	_INV2			;82
+001e06 940c 804a 	jmp	_INV			;83
+001e08 940c 944f 	jmp	_STY_ZPG		;84
+001e0a 940c 9474 	jmp	_STA_ZPG		;85
+001e0c 940c 9499 	jmp	_STX_ZPG		;86
+001e0e 940c 94be 	jmp	_SMB0_ZPG		;87
+001e10 940c 94e4 	jmp	_DEY_IMP		;88
+001e12 940c 94fa 	jmp	_BIT_IMM		;89
+001e14 940c 9521 	jmp	_TXA_IMP		;8A
+001e16 940c 804a 	jmp	_INV			;8B
+001e18 940c 9538 	jmp	_STY_ABS		;8C
+001e1a 940c 956e 	jmp	_STA_ABS		;8D
+001e1c 940c 95a4 	jmp	_STX_ABS		;8E
+001e1e 940c 95da 	jmp	_BBS0_REL		;8F
+001e20 940c 960b 	jmp	_BCC_REL		;90
+001e22 940c 964b 	jmp	_STA_INDY		;91
+001e24 940c 9685 	jmp	_STA_IND		;92
+001e26 940c 804a 	jmp	_INV			;93
+001e28 940c 96bd 	jmp	_STY_ZPGX		;94
+001e2a 940c 96e3 	jmp	_STA_ZPGX		;95
+001e2c 940c 9709 	jmp	_STX_ZPGY		;96
+001e2e 940c 972f 	jmp	_SMB1_ZPG		;97
+001e30 940c 9755 	jmp	_TYA_IMP		;98
+001e32 940c 976c 	jmp	_STA_ABSY		;99
+001e34 940c 97a4 	jmp	_TXS_IMP		;9A
+001e36 940c 804a 	jmp	_INV			;9B
+001e38 940c 97b8 	jmp	_STZ_ABS		;9C
+001e3a 940c 97ee 	jmp	_STA_ABSX		;9D
+001e3c 940c 9826 	jmp	_STZ_ABSX		;9E
+001e3e 940c 985e 	jmp	_BBS1_REL		;9F
+001e40 940c 988f 	jmp	_LDY_IMM		;A0
+001e42 940c 98b5 	jmp	_LDA_INDX		;A1
+001e44 940c 98ee 	jmp	_LDX_IMM		;A2
+001e46 940c 804a 	jmp	_INV			;A3
+001e48 940c 9914 	jmp	_LDY_ZPG		;A4
+001e4a 940c 993c 	jmp	_LDA_ZPG		;A5
+001e4c 940c 9964 	jmp	_LDX_ZPG		;A6
+001e4e 940c 998c 	jmp	_SMB2_ZPG		;A7
+001e50 940c 99b2 	jmp	_TAY_IMP		;A8
+001e52 940c 99c9 	jmp	_LDA_IMM		;A9
+001e54 940c 99ef 	jmp	_TAX_IMP		;AA
+001e56 940c 804a 	jmp	_INV			;AB
+001e58 940c 9a06 	jmp	_LDY_ABS		;AC
+001e5a 940c 9a3c 	jmp	_LDA_ABS		;AD
+001e5c 940c 9a72 	jmp	_LDX_ABS		;AE
+001e5e 940c 9aa8 	jmp	_BBS2_REL		;AF
+001e60 940c 9ad9 	jmp	_BCS_REL		;B0
+001e62 940c 9b19 	jmp	_LDA_INDY		;B1
+001e64 940c 9b53 	jmp	_LDA_IND		;B2
+001e66 940c 804a 	jmp	_INV			;B3
+001e68 940c 9b8b 	jmp	_LDY_ZPGX		;B4
+001e6a 940c 9bb4 	jmp	_LDA_ZPGX		;B5
+001e6c 940c 9bdd 	jmp	_LDX_ZPGY		;B6
+001e6e 940c 9c06 	jmp	_SMB3_ZPG		;B7
+001e70 940c 9c2c 	jmp	_CLV_IMP		;B8
+001e72 940c 9c40 	jmp	_LDA_ABSY		;B9
+001e74 940c 9c78 	jmp	_TSX_IMP		;BA
+001e76 940c 804a 	jmp	_INV			;BB
+001e78 940c 9c8f 	jmp	_LDY_ABSX		;BC
+001e7a 940c 9cc7 	jmp	_LDA_ABSX		;BD
+001e7c 940c 9cff 	jmp	_LDX_ABSY		;BE
+001e7e 940c 9d37 	jmp	_BBS3_REL		;BF
+001e80 940c 9d68 	jmp	_CPY_IMM		;C0
+001e82 940c 9d8e 	jmp	_CMP_INDX		;C1
+001e84 940c 805d 	jmp	_INV2			;C2
+001e86 940c 804a 	jmp	_INV			;C3
+001e88 940c 9dc7 	jmp	_CPY_ZPG		;C4
+001e8a 940c 9def 	jmp	_CMP_ZPG		;C5
+001e8c 940c 9e17 	jmp	_DEC_ZPG		;C6
+001e8e 940c 9e3f 	jmp	_SMB4_ZPG		;C7
+001e90 940c 9e65 	jmp	_INY_IMP		;C8
+001e92 940c 9e7b 	jmp	_CMP_IMM		;C9
+001e94 940c 9ea1 	jmp	_DEX_IMP		;CA
+001e96 940c 9eb7 	jmp	_WAI_IMP		;CB
+001e98 940c 9ecb 	jmp	_CPY_ABS		;CC
+001e9a 940c 9f01 	jmp	_CMP_ABS		;CD
+001e9c 940c 9f37 	jmp	_DEC_ABS		;CE
+001e9e 940c 9f7f 	jmp	_BBS4_REL		;CF
+001ea0 940c 9fb0 	jmp	_BNE_REL		;D0
+001ea2 940c 9ff0 	jmp	_CMP_INDY		;D1
+001ea4 940c a02a 	jmp	_CMP_IND		;D2
+001ea6 940c 804a 	jmp	_INV			;D3
+001ea8 940c 805d 	jmp	_INV2			;D4
+001eaa 940c a062 	jmp	_CMP_ZPGX		;D5
+001eac 940c a08b 	jmp	_DEC_ZPGX		;D6
+001eae 940c a0b4 	jmp	_SMB5_ZPG		;D7
+001eb0 940c a0da 	jmp	_CLD_IMP		;D8
+001eb2 940c a0ee 	jmp	_CMP_ABSY		;D9
+001eb4 940c a126 	jmp	_PHX_IMP		;DA
+001eb6 940c a13b 	jmp	_STP_IMP		;DB
+001eb8 940c 8071 	jmp	_INV3			;DC
+001eba 940c a13c 	jmp	_CMP_ABSX		;DD
+001ebc 940c a174 	jmp	_DEC_ABSX		;DE
+001ebe 940c a1be 	jmp	_BBS5_REL		;DF
+001ec0 940c a1ef 	jmp	_CPX_IMM		;E0
+001ec2 940c a215 	jmp	_SBC_INDX		;E1
+001ec4 940c 805d 	jmp	_INV2			;E2
+001ec6 940c 804a 	jmp	_INV			;E3
+001ec8 940c a25e 	jmp	_CPX_ZPG		;E4
+001eca 940c a286 	jmp	_SBC_ZPG		;E5
+001ecc 940c a2be 	jmp	_INC_ZPG		;E6
+001ece 940c a2e6 	jmp	_SMB6_ZPG		;E7
+001ed0 940c a30c 	jmp	_INX_IMP		;E8
+001ed2 940c a322 	jmp	_SBC_IMM		;E9
+001ed4 940c a358 	jmp	_NOP_IMP		;EA
+001ed6 940c 804a 	jmp	_INV			;EB
+001ed8 940c a36b 	jmp	_CPX_ABS		;EC
+001eda 940c a3a1 	jmp	_SBC_ABS		;ED
+001edc 940c a3e7 	jmp	_INC_ABS		;EE
+001ede 940c a42f 	jmp	_BBS6_REL		;EF
+001ee0 940c a460 	jmp	_BEQ_REL		;F0
+001ee2 940c a4a0 	jmp	_SBC_INDY		;F1
+001ee4 940c a4ea 	jmp	_SBC_IND		;F2
+001ee6 940c 804a 	jmp	_INV			;F3
+001ee8 940c 805d 	jmp	_INV2			;F4
+001eea 940c a532 	jmp	_SBC_ZPGX		;F5
+001eec 940c a56b 	jmp	_INC_ZPGX		;F6
+001eee 940c a594 	jmp	_SMB7_ZPG		;F7
+001ef0 940c a5ba 	jmp	_SED_IMP		;F8
+001ef2 940c a5ce 	jmp	_SBC_ABSY		;F9
+001ef4 940c a616 	jmp	_PLX_IMP		;FA
+001ef6 940c 804a 	jmp	_INV			;FB
+001ef8 940c 8071 	jmp	_INV3			;FC
+001efa 940c a62e 	jmp	_SBC_ABSX		;FD
+001efc 940c a676 	jmp	_INC_ABSX		;FE
+001efe 940c a6c0 	jmp	_BBS7_REL		;FF
+                 
+                 .include	"ioexe.inc"
+                 
+                 
+                 .cseg
+                 .org 0x1F80
+                 
+                 ioexe:
+                 
+001f80 eaea      	.db	0xEA, 0xEA	; 00 & 01
+001f81 eaea      	.db	0xEA, 0xEA	; 02 & 03
+001f82 eaea      	.db	0xEA, 0xEA	; 04 & 05
+001f83 eaea      	.db	0xEA, 0xEA	; 06 & 07
+001f84 eaea      	.db	0xEA, 0xEA	; 08 & 09
+001f85 eaea      	.db	0xEA, 0xEA	; 0A & 0B
+001f86 eaea      	.db	0xEA, 0xEA	; 0C & 0D
+001f87 eaea      	.db	0xEA, 0xEA	; 0E & 0F
+001f88 eaea      	.db	0xEA, 0xEA	; 10 & 11
+001f89 eaea      	.db	0xEA, 0xEA	; 12 & 13
+001f8a eaea      	.db	0xEA, 0xEA	; 14 & 15
+001f8b eaea      	.db	0xEA, 0xEA	; 16 & 17
+001f8c eaea      	.db	0xEA, 0xEA	; 18 & 19
+001f8d eaea      	.db	0xEA, 0xEA	; 1A & 1B
+001f8e eaea      	.db	0xEA, 0xEA	; 1C & 1D
+001f8f eaea      	.db	0xEA, 0xEA	; 1E & 1F
+001f90 eaea      	.db	0xEA, 0xEA	; 20 & 21
+001f91 eaea      	.db	0xEA, 0xEA	; 22 & 23
+001f92 eaea      	.db	0xEA, 0xEA	; 24 & 25
+001f93 eaea      	.db	0xEA, 0xEA	; 26 & 27
+001f94 eaea      	.db	0xEA, 0xEA	; 28 & 29
+001f95 eaea      	.db	0xEA, 0xEA	; 2A & 2B
+001f96 eaea      	.db	0xEA, 0xEA	; 2C & 2D
+001f97 eaea      	.db	0xEA, 0xEA	; 2E & 2F
+001f98 eaea      	.db	0xEA, 0xEA	; 30 & 31
+001f99 eaea      	.db	0xEA, 0xEA	; 32 & 33
+001f9a eaea      	.db	0xEA, 0xEA	; 34 & 35
+001f9b eaea      	.db	0xEA, 0xEA	; 36 & 37
+001f9c eaea      	.db	0xEA, 0xEA	; 38 & 39
+001f9d eaea      	.db	0xEA, 0xEA	; 3A & 3B
+001f9e eaea      	.db	0xEA, 0xEA	; 3C & 3D
+001f9f eaea      	.db	0xEA, 0xEA	; 3E & 3F
+001fa0 eaea      	.db	0xEA, 0xEA	; 40 & 41
+001fa1 eaea      	.db	0xEA, 0xEA	; 42 & 43
+001fa2 eaea      	.db	0xEA, 0xEA	; 44 & 45
+001fa3 eaea      	.db	0xEA, 0xEA	; 46 & 47
+001fa4 eaea      	.db	0xEA, 0xEA	; 48 & 49
+001fa5 eaea      	.db	0xEA, 0xEA	; 4A & 4B
+001fa6 eaea      	.db	0xEA, 0xEA	; 4C & 4D
+001fa7 eaea      	.db	0xEA, 0xEA	; 4E & 4F
+001fa8 eaea      	.db	0xEA, 0xEA	; 50 & 51
+001fa9 eaea      	.db	0xEA, 0xEA	; 52 & 53
+001faa eaea      	.db	0xEA, 0xEA	; 54 & 55
+001fab eaea      	.db	0xEA, 0xEA	; 56 & 57
+001fac eaea      	.db	0xEA, 0xEA	; 58 & 59
+001fad eaea      	.db	0xEA, 0xEA	; 5A & 5B
+001fae eaea      	.db	0xEA, 0xEA	; 5C & 5D
+001faf eaea      	.db	0xEA, 0xEA	; 5E & 5F
+001fb0 eaea      	.db	0xEA, 0xEA	; 60 & 61
+001fb1 eaea      	.db	0xEA, 0xEA	; 62 & 63
+001fb2 eaea      	.db	0xEA, 0xEA	; 64 & 65
+001fb3 eaea      	.db	0xEA, 0xEA	; 66 & 67
+001fb4 eaea      	.db	0xEA, 0xEA	; 68 & 69
+001fb5 eaea      	.db	0xEA, 0xEA	; 6A & 6B
+001fb6 eaea      	.db	0xEA, 0xEA	; 6C & 6D
+001fb7 eaea      	.db	0xEA, 0xEA	; 6E & 6F
+001fb8 eaea      	.db	0xEA, 0xEA	; 70 & 71
+001fb9 eaea      	.db	0xEA, 0xEA	; 72 & 73
+001fba eaea      	.db	0xEA, 0xEA	; 74 & 75
+001fbb eaea      	.db	0xEA, 0xEA	; 76 & 77
+001fbc eaea      	.db	0xEA, 0xEA	; 78 & 79
+001fbd eaea      	.db	0xEA, 0xEA	; 7A & 7B
+001fbe eaea      	.db	0xEA, 0xEA	; 7C & 7D
+001fbf eaea      	.db	0xEA, 0xEA	; 7E & 7F
+001fc0 eaea      	.db	0xEA, 0xEA	; 80 & 81
+001fc1 eaea      	.db	0xEA, 0xEA	; 82 & 83
+001fc2 eaea      	.db	0xEA, 0xEA	; 84 & 85
+001fc3 eaea      	.db	0xEA, 0xEA	; 86 & 87
+001fc4 eaea      	.db	0xEA, 0xEA	; 88 & 89
+001fc5 eaea      	.db	0xEA, 0xEA	; 8A & 8B
+001fc6 eaea      	.db	0xEA, 0xEA	; 8C & 8D
+001fc7 eaea      	.db	0xEA, 0xEA	; 8E & 8F
+001fc8 eaea      	.db	0xEA, 0xEA	; 90 & 91
+001fc9 eaea      	.db	0xEA, 0xEA	; 92 & 93
+001fca eaea      	.db	0xEA, 0xEA	; 94 & 95
+001fcb eaea      	.db	0xEA, 0xEA	; 96 & 97
+001fcc eaea      	.db	0xEA, 0xEA	; 98 & 99
+001fcd eaea      	.db	0xEA, 0xEA	; 9A & 9B
+001fce eaea      	.db	0xEA, 0xEA	; 9C & 9D
+001fcf eaea      	.db	0xEA, 0xEA	; 9E & 9F
+001fd0 eaea      	.db	0xEA, 0xEA	; A0 & A1
+001fd1 eaea      	.db	0xEA, 0xEA	; A2 & A3
+001fd2 eaea      	.db	0xEA, 0xEA	; A4 & A5
+001fd3 eaea      	.db	0xEA, 0xEA	; A6 & A7
+001fd4 eaea      	.db	0xEA, 0xEA	; A8 & A9
+001fd5 eaea      	.db	0xEA, 0xEA	; AA & AB
+001fd6 eaea      	.db	0xEA, 0xEA	; AC & AD
+001fd7 eaea      	.db	0xEA, 0xEA	; AE & AF
+001fd8 eaea      	.db	0xEA, 0xEA	; B0 & B1
+001fd9 eaea      	.db	0xEA, 0xEA	; B2 & B3
+001fda eaea      	.db	0xEA, 0xEA	; B4 & B5
+001fdb eaea      	.db	0xEA, 0xEA	; B6 & B7
+001fdc eaea      	.db	0xEA, 0xEA	; B8 & B9
+001fdd eaea      	.db	0xEA, 0xEA	; BA & BB
+001fde eaea      	.db	0xEA, 0xEA	; BC & BD
+001fdf eaea      	.db	0xEA, 0xEA	; BE & BF
+001fe0 eaea      	.db	0xEA, 0xEA	; C0 & C1
+001fe1 eaea      	.db	0xEA, 0xEA	; C2 & C3
+001fe2 eaea      	.db	0xEA, 0xEA	; C4 & C5
+001fe3 eaea      	.db	0xEA, 0xEA	; C6 & C7
+001fe4 eaea      	.db	0xEA, 0xEA	; C8 & C9
+001fe5 eaea      	.db	0xEA, 0xEA	; CA & CB
+001fe6 eaea      	.db	0xEA, 0xEA	; CC & CD
+001fe7 eaea      	.db	0xEA, 0xEA	; CE & CF
+001fe8 eaea      	.db	0xEA, 0xEA	; D0 & D1
+001fe9 eaea      	.db	0xEA, 0xEA	; D2 & D3
+001fea eaea      	.db	0xEA, 0xEA	; D4 & D5
+001feb eaea      	.db	0xEA, 0xEA	; D6 & D7
+001fec eaea      	.db	0xEA, 0xEA	; D8 & D9
+001fed eaea      	.db	0xEA, 0xEA	; DA & DB
+001fee eaea      	.db	0xEA, 0xEA	; DC & DD
+001fef eaea      	.db	0xEA, 0xEA	; DE & DF
+001ff0 eaea      	.db	0xEA, 0xEA	; E0 & E1
+001ff1 eaea      	.db	0xEA, 0xEA	; E2 & E3
+001ff2 eaea      	.db	0xEA, 0xEA	; E4 & E5
+001ff3 eaea      	.db	0xEA, 0xEA	; E6 & E7
+001ff4 eaea      	.db	0xEA, 0xEA	; E8 & E9
+001ff5 eaea      	.db	0xEA, 0xEA	; EA & EB
+001ff6 eaea      	.db	0xEA, 0xEA	; EC & ED
+001ff7 eaea      	.db	0xEA, 0xEA	; EE & EF
+001ff8 eaea      	.db	0xEA, 0xEA	; F0 & F1
+001ff9 eaea      	.db	0xEA, 0xEA	; F2 & F3
+001ffa eaea      	.db	0xEA, 0xEA	; F4 & F5
+001ffb eaea      	.db	0xEA, 0xEA	; F6 & F7
+001ffc eaea      	.db	0xEA, 0xEA	; F8 & F9
+001ffd eaea      	.db	0xEA, 0xEA	; FA & FB
+001ffe eaea      	.db	0xEA, 0xEA	; FC & FD
+001fff eaea      	.db	0xEA, 0xEA	; FE & FF
+                 .include	"sbcrom.inc"
+                 
+                 IMAGE:
+                 
+002000 0053
+002001 0000
+002002 0000
+002003 0000
+002004 0000
+002005 0000
+002006 0000
+002007 0000              .db 0x53, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002008 0000
+002009 0000
+00200a 0000
+00200b 0000
+00200c 0000
+00200d 0000
+00200e 0000
+00200f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002010 0000
+002011 0000
+002012 0000
+002013 0000
+002014 0000
+002015 0000
+002016 0000
+002017 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002018 0000
+002019 0000
+00201a 0000
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+00201f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002020 0000
+002021 0000
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+002027 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002028 0000
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+00202f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002030 0000
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+002033 0000
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+002037 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002038 0000
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+00203f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002040 0000
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+002043 0000
+002044 0000
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+002047 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002048 0000
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+00204f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002050 0000
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+002053 0000
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+002057 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002058 0000
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+002060 0000
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+002067 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002068 0000
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+002070 0000
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+002077 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002078 0000
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+002080 0000
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+002087 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002088 0000
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+002090 0000
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+002097 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002098 0000
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+0020a0 0000
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+0020a7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0020a8 0000
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+0020af 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0020b0 0000
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+0020b8 0000
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+0020c0 0000
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+0020c7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0020c8 0000
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+0020d0 0000
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+0020d8 0000
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+0020e0 0000
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+0020e7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0020e8 0000
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+0020f0 0000
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+0020f8 0000
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+002100 0000
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+002110 0000
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+002150 0000
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+0021a0 0000
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+002200 0000
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+002245 0000
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+002247 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002248 0000
+002249 0000
+00224a 0000
+00224b 0000
+00224c 0000
+00224d 0000
+00224e 0000
+00224f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002250 0000
+002251 0000
+002252 0000
+002253 0000
+002254 0000
+002255 0000
+002256 0000
+002257 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002258 0000
+002259 0000
+00225a 0000
+00225b 0000
+00225c 0000
+00225d 0000
+00225e 0000
+00225f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002260 0000
+002261 0000
+002262 0000
+002263 0000
+002264 0000
+002265 0000
+002266 0000
+002267 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002268 0000
+002269 0000
+00226a 0000
+00226b 0000
+00226c 0000
+00226d 0000
+00226e 0000
+00226f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002270 0000
+002271 0000
+002272 0000
+002273 0000
+002274 0000
+002275 0000
+002276 0000
+002277 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002278 0000
+002279 0000
+00227a 0000
+00227b 0000
+00227c 0000
+00227d 0000
+00227e 0000
+00227f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002280 0000
+002281 0000
+002282 0000
+002283 0000
+002284 0000
+002285 0000
+002286 0000
+002287 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002288 0000
+002289 0000
+00228a 0000
+00228b 0000
+00228c 0000
+00228d 0000
+00228e 0000
+00228f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002290 0000
+002291 0000
+002292 0000
+002293 0000
+002294 0000
+002295 0000
+002296 0000
+002297 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002298 0000
+002299 0000
+00229a 0000
+00229b 0000
+00229c 0000
+00229d 0000
+00229e 0000
+00229f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0022a0 0000
+0022a1 0000
+0022a2 0000
+0022a3 0000
+0022a4 0000
+0022a5 0000
+0022a6 0000
+0022a7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0022a8 0000
+0022a9 0000
+0022aa 0000
+0022ab 0000
+0022ac 0000
+0022ad 0000
+0022ae 0000
+0022af 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0022b0 0000
+0022b1 0000
+0022b2 0000
+0022b3 0000
+0022b4 0000
+0022b5 0000
+0022b6 0000
+0022b7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0022b8 0000
+0022b9 0000
+0022ba 0000
+0022bb 0000
+0022bc 0000
+0022bd 0000
+0022be 0000
+0022bf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0022c0 0000
+0022c1 0000
+0022c2 0000
+0022c3 0000
+0022c4 0000
+0022c5 0000
+0022c6 0000
+0022c7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0022c8 0000
+0022c9 0000
+0022ca 0000
+0022cb 0000
+0022cc 0000
+0022cd 0000
+0022ce 0000
+0022cf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0022d0 0000
+0022d1 0000
+0022d2 0000
+0022d3 0000
+0022d4 0000
+0022d5 0000
+0022d6 0000
+0022d7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0022d8 0000
+0022d9 0000
+0022da 0000
+0022db 0000
+0022dc 0000
+0022dd 0000
+0022de 0000
+0022df 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0022e0 0000
+0022e1 0000
+0022e2 0000
+0022e3 0000
+0022e4 0000
+0022e5 0000
+0022e6 0000
+0022e7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0022e8 0000
+0022e9 0000
+0022ea 0000
+0022eb 0000
+0022ec 0000
+0022ed 0000
+0022ee 0000
+0022ef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0022f0 0000
+0022f1 0000
+0022f2 0000
+0022f3 0000
+0022f4 0000
+0022f5 0000
+0022f6 0000
+0022f7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0022f8 0000
+0022f9 0000
+0022fa 0000
+0022fb 0000
+0022fc 0000
+0022fd 0000
+0022fe 0000
+0022ff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002300 0000
+002301 0000
+002302 0000
+002303 0000
+002304 0000
+002305 0000
+002306 0000
+002307 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002308 0000
+002309 0000
+00230a 0000
+00230b 0000
+00230c 0000
+00230d 0000
+00230e 0000
+00230f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002310 0000
+002311 0000
+002312 0000
+002313 0000
+002314 0000
+002315 0000
+002316 0000
+002317 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002318 0000
+002319 0000
+00231a 0000
+00231b 0000
+00231c 0000
+00231d 0000
+00231e 0000
+00231f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002320 0000
+002321 0000
+002322 0000
+002323 0000
+002324 0000
+002325 0000
+002326 0000
+002327 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002328 0000
+002329 0000
+00232a 0000
+00232b 0000
+00232c 0000
+00232d 0000
+00232e 0000
+00232f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002330 0000
+002331 0000
+002332 0000
+002333 0000
+002334 0000
+002335 0000
+002336 0000
+002337 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002338 0000
+002339 0000
+00233a 0000
+00233b 0000
+00233c 0000
+00233d 0000
+00233e 0000
+00233f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002340 0000
+002341 0000
+002342 0000
+002343 0000
+002344 0000
+002345 0000
+002346 0000
+002347 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002348 0000
+002349 0000
+00234a 0000
+00234b 0000
+00234c 0000
+00234d 0000
+00234e 0000
+00234f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002350 0000
+002351 0000
+002352 0000
+002353 0000
+002354 0000
+002355 0000
+002356 0000
+002357 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002358 0000
+002359 0000
+00235a 0000
+00235b 0000
+00235c 0000
+00235d 0000
+00235e 0000
+00235f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002360 0000
+002361 0000
+002362 0000
+002363 0000
+002364 0000
+002365 0000
+002366 0000
+002367 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002368 0000
+002369 0000
+00236a 0000
+00236b 0000
+00236c 0000
+00236d 0000
+00236e 0000
+00236f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002370 0000
+002371 0000
+002372 0000
+002373 0000
+002374 0000
+002375 0000
+002376 0000
+002377 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002378 0000
+002379 0000
+00237a 0000
+00237b 0000
+00237c 0000
+00237d 0000
+00237e 0000
+00237f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002380 0000
+002381 0000
+002382 0000
+002383 0000
+002384 0000
+002385 0000
+002386 0000
+002387 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002388 0000
+002389 0000
+00238a 0000
+00238b 0000
+00238c 0000
+00238d 0000
+00238e 0000
+00238f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002390 0000
+002391 0000
+002392 0000
+002393 0000
+002394 0000
+002395 0000
+002396 0000
+002397 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002398 0000
+002399 0000
+00239a 0000
+00239b 0000
+00239c 0000
+00239d 0000
+00239e 0000
+00239f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0023a0 0000
+0023a1 0000
+0023a2 0000
+0023a3 0000
+0023a4 0000
+0023a5 0000
+0023a6 0000
+0023a7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0023a8 0000
+0023a9 0000
+0023aa 0000
+0023ab 0000
+0023ac 0000
+0023ad 0000
+0023ae 0000
+0023af 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0023b0 0000
+0023b1 0000
+0023b2 0000
+0023b3 0000
+0023b4 0000
+0023b5 0000
+0023b6 0000
+0023b7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0023b8 0000
+0023b9 0000
+0023ba 0000
+0023bb 0000
+0023bc 0000
+0023bd 0000
+0023be 0000
+0023bf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0023c0 0000
+0023c1 0000
+0023c2 0000
+0023c3 0000
+0023c4 0000
+0023c5 0000
+0023c6 0000
+0023c7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0023c8 0000
+0023c9 0000
+0023ca 0000
+0023cb 0000
+0023cc 0000
+0023cd 0000
+0023ce 0000
+0023cf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0023d0 0000
+0023d1 0000
+0023d2 0000
+0023d3 0000
+0023d4 0000
+0023d5 0000
+0023d6 0000
+0023d7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0023d8 0000
+0023d9 0000
+0023da 0000
+0023db 0000
+0023dc 0000
+0023dd 0000
+0023de 0000
+0023df 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0023e0 0000
+0023e1 0000
+0023e2 0000
+0023e3 0000
+0023e4 0000
+0023e5 0000
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+0023e7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0023e8 0000
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+0023ea 0000
+0023eb 0000
+0023ec 0000
+0023ed 0000
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+0023ef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0023f0 0000
+0023f1 0000
+0023f2 0000
+0023f3 0000
+0023f4 0000
+0023f5 0000
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+0023f7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0023f8 0000
+0023f9 0000
+0023fa 0000
+0023fb 0000
+0023fc 0000
+0023fd 0000
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+0023ff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002400 0000
+002401 0000
+002402 0000
+002403 0000
+002404 0000
+002405 0000
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+002407 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002408 0000
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+00240a 0000
+00240b 0000
+00240c 0000
+00240d 0000
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+00240f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002410 0000
+002411 0000
+002412 0000
+002413 0000
+002414 0000
+002415 0000
+002416 0000
+002417 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002418 0000
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+00241c 0000
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+00241f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002420 0000
+002421 0000
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+002423 0000
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+002425 0000
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+002427 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002428 0000
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+00242c 0000
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+00242f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002430 0000
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+002437 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002438 0000
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+00243f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002440 0000
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+002447 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002448 0000
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+00244f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002450 0000
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+002457 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002458 0000
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+00245f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002460 0000
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+002467 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002468 0000
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+00246d 0000
+00246e 0000
+00246f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002470 0000
+002471 0000
+002472 0000
+002473 0000
+002474 0000
+002475 0000
+002476 0000
+002477 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002478 0000
+002479 0000
+00247a 0000
+00247b 0000
+00247c 0000
+00247d 0000
+00247e 0000
+00247f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002480 0000
+002481 0000
+002482 0000
+002483 0000
+002484 0000
+002485 0000
+002486 0000
+002487 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002488 0000
+002489 0000
+00248a 0000
+00248b 0000
+00248c 0000
+00248d 0000
+00248e 0000
+00248f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002490 0000
+002491 0000
+002492 0000
+002493 0000
+002494 0000
+002495 0000
+002496 0000
+002497 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002498 0000
+002499 0000
+00249a 0000
+00249b 0000
+00249c 0000
+00249d 0000
+00249e 0000
+00249f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0024a0 0000
+0024a1 0000
+0024a2 0000
+0024a3 0000
+0024a4 0000
+0024a5 0000
+0024a6 0000
+0024a7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0024a8 0000
+0024a9 0000
+0024aa 0000
+0024ab 0000
+0024ac 0000
+0024ad 0000
+0024ae 0000
+0024af 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0024b0 0000
+0024b1 0000
+0024b2 0000
+0024b3 0000
+0024b4 0000
+0024b5 0000
+0024b6 0000
+0024b7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0024b8 0000
+0024b9 0000
+0024ba 0000
+0024bb 0000
+0024bc 0000
+0024bd 0000
+0024be 0000
+0024bf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0024c0 0000
+0024c1 0000
+0024c2 0000
+0024c3 0000
+0024c4 0000
+0024c5 0000
+0024c6 0000
+0024c7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0024c8 0000
+0024c9 0000
+0024ca 0000
+0024cb 0000
+0024cc 0000
+0024cd 0000
+0024ce 0000
+0024cf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0024d0 0000
+0024d1 0000
+0024d2 0000
+0024d3 0000
+0024d4 0000
+0024d5 0000
+0024d6 0000
+0024d7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0024d8 0000
+0024d9 0000
+0024da 0000
+0024db 0000
+0024dc 0000
+0024dd 0000
+0024de 0000
+0024df 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0024e0 0000
+0024e1 0000
+0024e2 0000
+0024e3 0000
+0024e4 0000
+0024e5 0000
+0024e6 0000
+0024e7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0024e8 0000
+0024e9 0000
+0024ea 0000
+0024eb 0000
+0024ec 0000
+0024ed 0000
+0024ee 0000
+0024ef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0024f0 0000
+0024f1 0000
+0024f2 0000
+0024f3 0000
+0024f4 0000
+0024f5 0000
+0024f6 0000
+0024f7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0024f8 0000
+0024f9 0000
+0024fa 0000
+0024fb 0000
+0024fc 0000
+0024fd 0000
+0024fe 0000
+0024ff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002500 0000
+002501 0000
+002502 0000
+002503 0000
+002504 0000
+002505 0000
+002506 0000
+002507 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002508 0000
+002509 0000
+00250a 0000
+00250b 0000
+00250c 0000
+00250d 0000
+00250e 0000
+00250f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002510 0000
+002511 0000
+002512 0000
+002513 0000
+002514 0000
+002515 0000
+002516 0000
+002517 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002518 0000
+002519 0000
+00251a 0000
+00251b 0000
+00251c 0000
+00251d 0000
+00251e 0000
+00251f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002520 0000
+002521 0000
+002522 0000
+002523 0000
+002524 0000
+002525 0000
+002526 0000
+002527 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002528 0000
+002529 0000
+00252a 0000
+00252b 0000
+00252c 0000
+00252d 0000
+00252e 0000
+00252f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002530 0000
+002531 0000
+002532 0000
+002533 0000
+002534 0000
+002535 0000
+002536 0000
+002537 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002538 0000
+002539 0000
+00253a 0000
+00253b 0000
+00253c 0000
+00253d 0000
+00253e 0000
+00253f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002540 0000
+002541 0000
+002542 0000
+002543 0000
+002544 0000
+002545 0000
+002546 0000
+002547 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002548 0000
+002549 0000
+00254a 0000
+00254b 0000
+00254c 0000
+00254d 0000
+00254e 0000
+00254f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002550 0000
+002551 0000
+002552 0000
+002553 0000
+002554 0000
+002555 0000
+002556 0000
+002557 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002558 0000
+002559 0000
+00255a 0000
+00255b 0000
+00255c 0000
+00255d 0000
+00255e 0000
+00255f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002560 0000
+002561 0000
+002562 0000
+002563 0000
+002564 0000
+002565 0000
+002566 0000
+002567 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002568 0000
+002569 0000
+00256a 0000
+00256b 0000
+00256c 0000
+00256d 0000
+00256e 0000
+00256f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002570 0000
+002571 0000
+002572 0000
+002573 0000
+002574 0000
+002575 0000
+002576 0000
+002577 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002578 0000
+002579 0000
+00257a 0000
+00257b 0000
+00257c 0000
+00257d 0000
+00257e 0000
+00257f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002580 0000
+002581 0000
+002582 0000
+002583 0000
+002584 0000
+002585 0000
+002586 0000
+002587 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002588 0000
+002589 0000
+00258a 0000
+00258b 0000
+00258c 0000
+00258d 0000
+00258e 0000
+00258f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002590 0000
+002591 0000
+002592 0000
+002593 0000
+002594 0000
+002595 0000
+002596 0000
+002597 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002598 0000
+002599 0000
+00259a 0000
+00259b 0000
+00259c 0000
+00259d 0000
+00259e 0000
+00259f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0025a0 0000
+0025a1 0000
+0025a2 0000
+0025a3 0000
+0025a4 0000
+0025a5 0000
+0025a6 0000
+0025a7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0025a8 0000
+0025a9 0000
+0025aa 0000
+0025ab 0000
+0025ac 0000
+0025ad 0000
+0025ae 0000
+0025af 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0025b0 0000
+0025b1 0000
+0025b2 0000
+0025b3 0000
+0025b4 0000
+0025b5 0000
+0025b6 0000
+0025b7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0025b8 0000
+0025b9 0000
+0025ba 0000
+0025bb 0000
+0025bc 0000
+0025bd 0000
+0025be 0000
+0025bf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0025c0 0000
+0025c1 0000
+0025c2 0000
+0025c3 0000
+0025c4 0000
+0025c5 0000
+0025c6 0000
+0025c7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0025c8 0000
+0025c9 0000
+0025ca 0000
+0025cb 0000
+0025cc 0000
+0025cd 0000
+0025ce 0000
+0025cf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0025d0 0000
+0025d1 0000
+0025d2 0000
+0025d3 0000
+0025d4 0000
+0025d5 0000
+0025d6 0000
+0025d7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0025d8 0000
+0025d9 0000
+0025da 0000
+0025db 0000
+0025dc 0000
+0025dd 0000
+0025de 0000
+0025df 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0025e0 0000
+0025e1 0000
+0025e2 0000
+0025e3 0000
+0025e4 0000
+0025e5 0000
+0025e6 0000
+0025e7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0025e8 0000
+0025e9 0000
+0025ea 0000
+0025eb 0000
+0025ec 0000
+0025ed 0000
+0025ee 0000
+0025ef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0025f0 0000
+0025f1 0000
+0025f2 0000
+0025f3 0000
+0025f4 0000
+0025f5 0000
+0025f6 0000
+0025f7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0025f8 0000
+0025f9 0000
+0025fa 0000
+0025fb 0000
+0025fc 0000
+0025fd 0000
+0025fe 0000
+0025ff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002600 0000
+002601 0000
+002602 0000
+002603 0000
+002604 0000
+002605 0000
+002606 0000
+002607 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002608 0000
+002609 0000
+00260a 0000
+00260b 0000
+00260c 0000
+00260d 0000
+00260e 0000
+00260f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002610 0000
+002611 0000
+002612 0000
+002613 0000
+002614 0000
+002615 0000
+002616 0000
+002617 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002618 0000
+002619 0000
+00261a 0000
+00261b 0000
+00261c 0000
+00261d 0000
+00261e 0000
+00261f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002620 0000
+002621 0000
+002622 0000
+002623 0000
+002624 0000
+002625 0000
+002626 0000
+002627 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002628 0000
+002629 0000
+00262a 0000
+00262b 0000
+00262c 0000
+00262d 0000
+00262e 0000
+00262f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002630 0000
+002631 0000
+002632 0000
+002633 0000
+002634 0000
+002635 0000
+002636 0000
+002637 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002638 0000
+002639 0000
+00263a 0000
+00263b 0000
+00263c 0000
+00263d 0000
+00263e 0000
+00263f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002640 0000
+002641 0000
+002642 0000
+002643 0000
+002644 0000
+002645 0000
+002646 0000
+002647 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002648 0000
+002649 0000
+00264a 0000
+00264b 0000
+00264c 0000
+00264d 0000
+00264e 0000
+00264f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002650 0000
+002651 0000
+002652 0000
+002653 0000
+002654 0000
+002655 0000
+002656 0000
+002657 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002658 0000
+002659 0000
+00265a 0000
+00265b 0000
+00265c 0000
+00265d 0000
+00265e 0000
+00265f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002660 0000
+002661 0000
+002662 0000
+002663 0000
+002664 0000
+002665 0000
+002666 0000
+002667 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002668 0000
+002669 0000
+00266a 0000
+00266b 0000
+00266c 0000
+00266d 0000
+00266e 0000
+00266f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002670 0000
+002671 0000
+002672 0000
+002673 0000
+002674 0000
+002675 0000
+002676 0000
+002677 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002678 0000
+002679 0000
+00267a 0000
+00267b 0000
+00267c 0000
+00267d 0000
+00267e 0000
+00267f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002680 0000
+002681 0000
+002682 0000
+002683 0000
+002684 0000
+002685 0000
+002686 0000
+002687 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002688 0000
+002689 0000
+00268a 0000
+00268b 0000
+00268c 0000
+00268d 0000
+00268e 0000
+00268f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002690 0000
+002691 0000
+002692 0000
+002693 0000
+002694 0000
+002695 0000
+002696 0000
+002697 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002698 0000
+002699 0000
+00269a 0000
+00269b 0000
+00269c 0000
+00269d 0000
+00269e 0000
+00269f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0026a0 0000
+0026a1 0000
+0026a2 0000
+0026a3 0000
+0026a4 0000
+0026a5 0000
+0026a6 0000
+0026a7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0026a8 0000
+0026a9 0000
+0026aa 0000
+0026ab 0000
+0026ac 0000
+0026ad 0000
+0026ae 0000
+0026af 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0026b0 0000
+0026b1 0000
+0026b2 0000
+0026b3 0000
+0026b4 0000
+0026b5 0000
+0026b6 0000
+0026b7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0026b8 0000
+0026b9 0000
+0026ba 0000
+0026bb 0000
+0026bc 0000
+0026bd 0000
+0026be 0000
+0026bf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0026c0 0000
+0026c1 0000
+0026c2 0000
+0026c3 0000
+0026c4 0000
+0026c5 0000
+0026c6 0000
+0026c7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0026c8 0000
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+0026ca 0000
+0026cb 0000
+0026cc 0000
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+0026cf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0026d0 0000
+0026d1 0000
+0026d2 0000
+0026d3 0000
+0026d4 0000
+0026d5 0000
+0026d6 0000
+0026d7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0026d8 0000
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+0026da 0000
+0026db 0000
+0026dc 0000
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+0026df 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0026e0 0000
+0026e1 0000
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+0026e3 0000
+0026e4 0000
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+0026e7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0026e8 0000
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+0026ea 0000
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+0026ef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0026f0 0000
+0026f1 0000
+0026f2 0000
+0026f3 0000
+0026f4 0000
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+0026f7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0026f8 0000
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+0026fa 0000
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+0026ff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002700 0000
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+002703 0000
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+002707 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002708 0000
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+00270f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002710 0000
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+002713 0000
+002714 0000
+002715 0000
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+002717 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002718 0000
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+00271f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002720 0000
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+002727 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002728 0000
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+00272a 0000
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+00272f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002730 0000
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+002737 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002738 0000
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+00273f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002740 0000
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+002743 0000
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+002747 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002748 0000
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+00274f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002750 0000
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+002757 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002758 0000
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+00275f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002760 0000
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+002767 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002768 0000
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+002770 0000
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+002778 0000
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+002780 0000
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+002788 0000
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+002790 0000
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+002798 0000
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+0027a0 0000
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+0027a8 0000
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+0027b0 0000
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+0027b8 0000
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+0027c0 0000
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+0027c8 0000
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+0027d0 0000
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+0027d8 0000
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+0027e0 0000
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+0027e8 0000
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+0027f0 0000
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+0027f8 0000
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+002800 0000
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+002808 0000
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+002810 0000
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+002818 0000
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+002820 0000
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+002827 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002828 0000
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+002830 0000
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+002838 0000
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+002840 0000
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+002848 0000
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+002850 0000
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+002858 0000
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+002860 0000
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+002868 0000
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+002870 0000
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+002880 0000
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+002888 0000
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+002890 0000
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+002898 0000
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+0028a0 0000
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+0028a8 0000
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+0028b8 0000
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+0028bf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0028c0 0000
+0028c1 0000
+0028c2 0000
+0028c3 0000
+0028c4 0000
+0028c5 0000
+0028c6 0000
+0028c7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0028c8 0000
+0028c9 0000
+0028ca 0000
+0028cb 0000
+0028cc 0000
+0028cd 0000
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+0028cf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0028d0 0000
+0028d1 0000
+0028d2 0000
+0028d3 0000
+0028d4 0000
+0028d5 0000
+0028d6 0000
+0028d7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0028d8 0000
+0028d9 0000
+0028da 0000
+0028db 0000
+0028dc 0000
+0028dd 0000
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+0028df 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0028e0 0000
+0028e1 0000
+0028e2 0000
+0028e3 0000
+0028e4 0000
+0028e5 0000
+0028e6 0000
+0028e7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0028e8 0000
+0028e9 0000
+0028ea 0000
+0028eb 0000
+0028ec 0000
+0028ed 0000
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+0028ef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0028f0 0000
+0028f1 0000
+0028f2 0000
+0028f3 0000
+0028f4 0000
+0028f5 0000
+0028f6 0000
+0028f7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0028f8 0000
+0028f9 0000
+0028fa 0000
+0028fb 0000
+0028fc 0000
+0028fd 0000
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+0028ff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002900 0000
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+002903 0000
+002904 0000
+002905 0000
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+002907 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002908 0000
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+00290a 0000
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+00290f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002910 0000
+002911 0000
+002912 0000
+002913 0000
+002914 0000
+002915 0000
+002916 0000
+002917 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002918 0000
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+00291a 0000
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+00291f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002920 0000
+002921 0000
+002922 0000
+002923 0000
+002924 0000
+002925 0000
+002926 0000
+002927 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002928 0000
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+00292f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002930 0000
+002931 0000
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+002933 0000
+002934 0000
+002935 0000
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+002937 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002938 0000
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+00293f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002940 0000
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+002942 0000
+002943 0000
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+002947 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002948 0000
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+00294a 0000
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+00294f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002950 0000
+002951 0000
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+002953 0000
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+002955 0000
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+002957 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002958 0000
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+00295f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002960 0000
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+002967 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002968 0000
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+00296f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002970 0000
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+002973 0000
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+002977 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002978 0000
+002979 0000
+00297a 0000
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+00297f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002980 0000
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+002983 0000
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+002987 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002988 0000
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+00298a 0000
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+00298f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002990 0000
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+002997 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002998 0000
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+0029a0 0000
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+0029a7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0029a8 0000
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+0029af 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0029b0 0000
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+0029b7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0029b8 0000
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+0029bf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0029c0 0000
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+0029c7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0029c8 0000
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+0029d0 0000
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+0029d7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0029d8 0000
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+0029e0 0000
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+0029e7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0029e8 0000
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+0029f0 0000
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+0029f7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0029f8 0000
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+0029ff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002a00 0000
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+002a08 0000
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+002a10 0000
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+002a18 0000
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+002a20 0000
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+002a27 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002a28 0000
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+002a30 0000
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+002a38 0000
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+002a40 0000
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+002a48 0000
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+002a50 0000
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+002a58 0000
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+002a60 0000
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+002a68 0000
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+002a70 0000
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+002a78 0000
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+002a80 0000
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+002a90 0000
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+002a98 0000
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+002aa8 0000
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+002ab0 0000
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+002ab8 0000
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+002ac0 0000
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+002ac8 0000
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+002ad0 0000
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+002ad8 0000
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+002adf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002ae0 0000
+002ae1 0000
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+002ae3 0000
+002ae4 0000
+002ae5 0000
+002ae6 0000
+002ae7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002ae8 0000
+002ae9 0000
+002aea 0000
+002aeb 0000
+002aec 0000
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+002aee 0000
+002aef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002af0 0000
+002af1 0000
+002af2 0000
+002af3 0000
+002af4 0000
+002af5 0000
+002af6 0000
+002af7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002af8 0000
+002af9 0000
+002afa 0000
+002afb 0000
+002afc 0000
+002afd 0000
+002afe 0000
+002aff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002b00 0000
+002b01 0000
+002b02 0000
+002b03 0000
+002b04 0000
+002b05 0000
+002b06 0000
+002b07 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002b08 0000
+002b09 0000
+002b0a 0000
+002b0b 0000
+002b0c 0000
+002b0d 0000
+002b0e 0000
+002b0f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002b10 0000
+002b11 0000
+002b12 0000
+002b13 0000
+002b14 0000
+002b15 0000
+002b16 0000
+002b17 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002b18 0000
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+002b1a 0000
+002b1b 0000
+002b1c 0000
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+002b1e 0000
+002b1f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002b20 0000
+002b21 0000
+002b22 0000
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+002b24 0000
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+002b27 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002b28 0000
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+002b2a 0000
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+002b2f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002b30 0000
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+002b37 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002b38 0000
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+002b3f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002b40 0000
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+002b47 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002b48 0000
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+002b4a 0000
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+002b4f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002b50 0000
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+002b57 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002b58 0000
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+002b5f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002b60 0000
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+002b67 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002b68 0000
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+002b6f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002b70 0000
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+002b77 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002b78 0000
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+002b7f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002b80 0000
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+002b87 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002b88 0000
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+002b8f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002b90 0000
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+002b97 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002b98 0000
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+002b9f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002ba0 0000
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+002ba7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002ba8 0000
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+002baf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002bb0 0000
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+002bb7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002bb8 0000
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+002bc0 0000
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+002bc7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002bc8 0000
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+002bd0 0000
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+002bd7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002bd8 0000
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+002be0 0000
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+002be7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002be8 0000
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+002bef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002bf0 0000
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+002bf7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002bf8 0000
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+002bff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002c00 0000
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+002c07 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002c08 0000
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+002c0a 0000
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+002c0f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002c10 0000
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+002c17 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002c18 0000
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+002c1a 0000
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+002c1f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002c20 0000
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+002c27 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002c28 0000
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+002c2a 0000
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+002c2f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002c30 0000
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+002c37 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002c38 0000
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+002c3f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002c40 0000
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+002c47 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002c48 0000
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+002c50 0000
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+002c57 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002c58 0000
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+002c60 0000
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+002c68 0000
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+002c70 0000
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+002c78 0000
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+002c80 0000
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+002c88 0000
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+002c90 0000
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+002c98 0000
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+002ce8 0000
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+002ced 0000
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+002cef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002cf0 0000
+002cf1 0000
+002cf2 0000
+002cf3 0000
+002cf4 0000
+002cf5 0000
+002cf6 0000
+002cf7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002cf8 0000
+002cf9 0000
+002cfa 0000
+002cfb 0000
+002cfc 0000
+002cfd 0000
+002cfe 0000
+002cff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002d00 0000
+002d01 0000
+002d02 0000
+002d03 0000
+002d04 0000
+002d05 0000
+002d06 0000
+002d07 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002d08 0000
+002d09 0000
+002d0a 0000
+002d0b 0000
+002d0c 0000
+002d0d 0000
+002d0e 0000
+002d0f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002d10 0000
+002d11 0000
+002d12 0000
+002d13 0000
+002d14 0000
+002d15 0000
+002d16 0000
+002d17 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002d18 0000
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+002d1a 0000
+002d1b 0000
+002d1c 0000
+002d1d 0000
+002d1e 0000
+002d1f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002d20 0000
+002d21 0000
+002d22 0000
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+002d24 0000
+002d25 0000
+002d26 0000
+002d27 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002d28 0000
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+002d2a 0000
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+002d2c 0000
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+002d2f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002d30 0000
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+002d37 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002d38 0000
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+002d3f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002d40 0000
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+002d47 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002d48 0000
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+002d4f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002d50 0000
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+002d57 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002d58 0000
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+002d5f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002d60 0000
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+002d67 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002d68 0000
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+002d6f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002d70 0000
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+002d77 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002d78 0000
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+002d7f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002d80 0000
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+002d87 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002d88 0000
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+002d8f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002d90 0000
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+002d97 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002d98 0000
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+002d9f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002da0 0000
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+002da7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002da8 0000
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+002daf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002db0 0000
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+002db7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002db8 0000
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+002dc0 0000
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+002dc7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002dc8 0000
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+002dd0 0000
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+002dd7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002dd8 0000
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+002de0 0000
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+002de8 0000
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+002df0 0000
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+002df7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002df8 0000
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+002dff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002e00 0000
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+002e07 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002e08 0000
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+002e0f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002e10 0000
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+002e18 0000
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+002e1f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002e20 0000
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+002e27 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002e28 0000
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+002e30 0000
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+002e38 0000
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+002e40 0000
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+002e48 0000
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+002e50 0000
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+002e58 0000
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+002e60 0000
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+002e68 0000
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+002e70 0000
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+002e80 0000
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+002e90 0000
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+002ef8 0000
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+002eff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002f00 0000
+002f01 0000
+002f02 0000
+002f03 0000
+002f04 0000
+002f05 0000
+002f06 0000
+002f07 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002f08 0000
+002f09 0000
+002f0a 0000
+002f0b 0000
+002f0c 0000
+002f0d 0000
+002f0e 0000
+002f0f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002f10 0000
+002f11 0000
+002f12 0000
+002f13 0000
+002f14 0000
+002f15 0000
+002f16 0000
+002f17 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002f18 0000
+002f19 0000
+002f1a 0000
+002f1b 0000
+002f1c 0000
+002f1d 0000
+002f1e 0000
+002f1f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002f20 0000
+002f21 0000
+002f22 0000
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+002f24 0000
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+002f27 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002f28 0000
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+002f2a 0000
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+002f2e 0000
+002f2f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002f30 0000
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+002f35 0000
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+002f37 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002f38 0000
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+002f3f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002f40 0000
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+002f47 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002f48 0000
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+002f4a 0000
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+002f4f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002f50 0000
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+002f57 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002f58 0000
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+002f5a 0000
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+002f5f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002f60 0000
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+002f67 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002f68 0000
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+002f6f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002f70 0000
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+002f77 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002f78 0000
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+002f7f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+002f80 0000
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+002f88 0000
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+002f90 0000
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+002fa0 0000
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+002fa8 0000
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+002fb0 0000
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+002fb8 0000
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+003000 0000
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+003008 0000
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+003020 0000
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+003030 0000
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+003040 0000
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+003050 0000
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+003058 0000
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+003060 0000
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+003070 0000
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+003090 0000
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+003118 0000
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+003590 0000
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+0039c0 0000
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+0039c7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0039c8 0000
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+0039d0 0000
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+0039d7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0039d8 0000
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+0039e0 0000
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+0039e7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0039e8 0000
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+0039ef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0039f0 0000
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+0039f7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0039f8 0000
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+0039ff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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+003bd0 0000
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+003bd7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+003bd8 0000
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+003bdf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+003be0 0000
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+003be7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+003be8 0000
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+003bef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+003bf0 0000
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+003bf7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+003bf8 0000
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+003bff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+003c00 0000
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+003c07 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+003c08 0000
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+003c10 0000
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+003c17 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+003c18 0000
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+003c1f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+003c20 0000
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+003c27 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+003c28 0000
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+003c30 0000
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+003c38 0000
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+003c40 0000
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+003c48 0000
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+003c50 0000
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+003c58 0000
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+003c60 0000
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+003c70 0000
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+003c80 0000
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+003c88 0000
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+003c90 0000
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+003fef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+003ff0 0000
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+003ff3 0000
+003ff4 0000
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+003ff7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+003ff8 0000
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+003ffa 0000
+003ffb 0000
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+003ffe 0000
+003fff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004000 0000
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+004003 0000
+004004 0000
+004005 0000
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+004007 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004008 0000
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+00400a 0000
+00400b 0000
+00400c 0000
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+00400f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004010 0000
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+004013 0000
+004014 0000
+004015 0000
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+004017 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004018 0000
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+00401f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004020 0000
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+004022 0000
+004023 0000
+004024 0000
+004025 0000
+004026 0000
+004027 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004028 0000
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+00402f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004030 0000
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+004033 0000
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+004035 0000
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+004037 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004038 0000
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+00403f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004040 0000
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+004043 0000
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+004047 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004048 0000
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+00404f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004050 0000
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+004057 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004058 0000
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+00405f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004060 0000
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+004067 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004068 0000
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+00406f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004070 0000
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+004077 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004078 0000
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+00407f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004080 0000
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+004087 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004088 0000
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+00408f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004090 0000
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+004097 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004098 0000
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+00409f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0040a0 0000
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+0040a7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0040a8 0000
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+0040af 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0040b0 0000
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+0040b7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0040b8 0000
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+0040bf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0040c0 0000
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+0040c7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0040c8 0000
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+0040d0 0000
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+0040d7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0040d8 0000
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+0040e0 0000
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+0040e7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0040e8 0000
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+0040f0 0000
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+0040f7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0040f8 0000
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+0040ff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004100 0000
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+004108 0000
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+004110 0000
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+004118 0000
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+004120 0000
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+004128 0000
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+004130 0000
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+004138 0000
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+004140 0000
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+004148 0000
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+004150 0000
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+004158 0000
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+004160 0000
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+004168 0000
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+004170 0000
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+004178 0000
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+004180 0000
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+004188 0000
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+004190 0000
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+004198 0000
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+004200 0000
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+004208 0000
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+00420d 0000
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+00420f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004210 0000
+004211 0000
+004212 0000
+004213 0000
+004214 0000
+004215 0000
+004216 0000
+004217 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004218 0000
+004219 0000
+00421a 0000
+00421b 0000
+00421c 0000
+00421d 0000
+00421e 0000
+00421f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004220 0000
+004221 0000
+004222 0000
+004223 0000
+004224 0000
+004225 0000
+004226 0000
+004227 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004228 0000
+004229 0000
+00422a 0000
+00422b 0000
+00422c 0000
+00422d 0000
+00422e 0000
+00422f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004230 0000
+004231 0000
+004232 0000
+004233 0000
+004234 0000
+004235 0000
+004236 0000
+004237 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004238 0000
+004239 0000
+00423a 0000
+00423b 0000
+00423c 0000
+00423d 0000
+00423e 0000
+00423f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004240 0000
+004241 0000
+004242 0000
+004243 0000
+004244 0000
+004245 0000
+004246 0000
+004247 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004248 0000
+004249 0000
+00424a 0000
+00424b 0000
+00424c 0000
+00424d 0000
+00424e 0000
+00424f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004250 0000
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+004252 0000
+004253 0000
+004254 0000
+004255 0000
+004256 0000
+004257 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004258 0000
+004259 0000
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+00425c 0000
+00425d 0000
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+00425f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004260 0000
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+004263 0000
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+004265 0000
+004266 0000
+004267 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004268 0000
+004269 0000
+00426a 0000
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+00426d 0000
+00426e 0000
+00426f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004270 0000
+004271 0000
+004272 0000
+004273 0000
+004274 0000
+004275 0000
+004276 0000
+004277 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004278 0000
+004279 0000
+00427a 0000
+00427b 0000
+00427c 0000
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+00427f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004280 0000
+004281 0000
+004282 0000
+004283 0000
+004284 0000
+004285 0000
+004286 0000
+004287 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004288 0000
+004289 0000
+00428a 0000
+00428b 0000
+00428c 0000
+00428d 0000
+00428e 0000
+00428f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004290 0000
+004291 0000
+004292 0000
+004293 0000
+004294 0000
+004295 0000
+004296 0000
+004297 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004298 0000
+004299 0000
+00429a 0000
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+00429c 0000
+00429d 0000
+00429e 0000
+00429f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0042a0 0000
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+0042a3 0000
+0042a4 0000
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+0042a6 0000
+0042a7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0042a8 0000
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+0042ac 0000
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+0042af 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0042b0 0000
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+0042b2 0000
+0042b3 0000
+0042b4 0000
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+0042b6 0000
+0042b7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0042b8 0000
+0042b9 0000
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+0042bf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0042c0 0000
+0042c1 0000
+0042c2 0000
+0042c3 0000
+0042c4 0000
+0042c5 0000
+0042c6 0000
+0042c7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0042c8 0000
+0042c9 0000
+0042ca 0000
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+0042cc 0000
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+0042cf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0042d0 0000
+0042d1 0000
+0042d2 0000
+0042d3 0000
+0042d4 0000
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+0042d6 0000
+0042d7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0042d8 0000
+0042d9 0000
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+0042df 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0042e0 0000
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+0042e2 0000
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+0042e7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0042e8 0000
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+0042ef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0042f0 0000
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+0042f2 0000
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+0042f7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0042f8 0000
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+0042ff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004300 0000
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+004302 0000
+004303 0000
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+004307 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004308 0000
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+00430f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004310 0000
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+004317 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004318 0000
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+00431a 0000
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+00431f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004320 0000
+004321 0000
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+004323 0000
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+004326 0000
+004327 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004328 0000
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+00432a 0000
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+00432c 0000
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+00432f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004330 0000
+004331 0000
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+004333 0000
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+004336 0000
+004337 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004338 0000
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+00433f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004340 0000
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+004347 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004348 0000
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+00434f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004350 0000
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+004357 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004358 0000
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+00435f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004360 0000
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+004367 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004368 0000
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+00436e 0000
+00436f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004370 0000
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+004377 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004378 0000
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+00437c 0000
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+00437f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004380 0000
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+004387 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004388 0000
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+00438e 0000
+00438f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004390 0000
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+004393 0000
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+004396 0000
+004397 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004398 0000
+004399 0000
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+00439f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0043a0 0000
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+0043a7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0043a8 0000
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+0043af 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0043b0 0000
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+0043b7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0043b8 0000
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+0043bf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0043c0 0000
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+0043c7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0043c8 0000
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+0043cf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0043d0 0000
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+0043d7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0043d8 0000
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+0043e0 0000
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+0043e8 0000
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+0043ef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0043f0 0000
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+0043f7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0043f8 0000
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+0043ff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004400 0000
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+004407 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004408 0000
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+004410 0000
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+004417 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004418 0000
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+004420 0000
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+004427 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004428 0000
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+00442f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004430 0000
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+004433 0000
+004434 0000
+004435 0000
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+004437 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004438 0000
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+00443f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004440 0000
+004441 0000
+004442 0000
+004443 0000
+004444 0000
+004445 0000
+004446 0000
+004447 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004448 0000
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+00444f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004450 0000
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+004453 0000
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+004457 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004458 0000
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+00445f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004460 0000
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+004467 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004468 0000
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+00446f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004470 0000
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+004477 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004478 0000
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+00447f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004480 0000
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+004487 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004488 0000
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+00448f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004490 0000
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+004497 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004498 0000
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+00449f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0044a0 0000
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+0044a7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0044a8 0000
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+0044af 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0044b0 0000
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+0044b7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0044b8 0000
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+0044bf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0044c0 0000
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+0044c7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0044c8 0000
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+0044d0 0000
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+0044d7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0044d8 0000
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+0044e0 0000
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+0044e7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0044e8 0000
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+0044ef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0044f0 0000
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+0044f7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0044f8 0000
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+004500 0000
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+004508 0000
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+004510 0000
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+004518 0000
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+004520 0000
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+004528 0000
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+004530 0000
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+004540 0000
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+004550 0000
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+004560 0000
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+004570 0000
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+004580 0000
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+004588 0000
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+004590 0000
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+004598 0000
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+0045a8 0000
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+0045c0 0000
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+0045c8 0000
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+0045d0 0000
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+0045f0 0000
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+004608 0000
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+004648 0000
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+00464d 0000
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+00464f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004650 0000
+004651 0000
+004652 0000
+004653 0000
+004654 0000
+004655 0000
+004656 0000
+004657 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004658 0000
+004659 0000
+00465a 0000
+00465b 0000
+00465c 0000
+00465d 0000
+00465e 0000
+00465f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004660 0000
+004661 0000
+004662 0000
+004663 0000
+004664 0000
+004665 0000
+004666 0000
+004667 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004668 0000
+004669 0000
+00466a 0000
+00466b 0000
+00466c 0000
+00466d 0000
+00466e 0000
+00466f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004670 0000
+004671 0000
+004672 0000
+004673 0000
+004674 0000
+004675 0000
+004676 0000
+004677 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004678 0000
+004679 0000
+00467a 0000
+00467b 0000
+00467c 0000
+00467d 0000
+00467e 0000
+00467f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004680 0000
+004681 0000
+004682 0000
+004683 0000
+004684 0000
+004685 0000
+004686 0000
+004687 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004688 0000
+004689 0000
+00468a 0000
+00468b 0000
+00468c 0000
+00468d 0000
+00468e 0000
+00468f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004690 0000
+004691 0000
+004692 0000
+004693 0000
+004694 0000
+004695 0000
+004696 0000
+004697 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004698 0000
+004699 0000
+00469a 0000
+00469b 0000
+00469c 0000
+00469d 0000
+00469e 0000
+00469f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0046a0 0000
+0046a1 0000
+0046a2 0000
+0046a3 0000
+0046a4 0000
+0046a5 0000
+0046a6 0000
+0046a7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0046a8 0000
+0046a9 0000
+0046aa 0000
+0046ab 0000
+0046ac 0000
+0046ad 0000
+0046ae 0000
+0046af 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0046b0 0000
+0046b1 0000
+0046b2 0000
+0046b3 0000
+0046b4 0000
+0046b5 0000
+0046b6 0000
+0046b7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0046b8 0000
+0046b9 0000
+0046ba 0000
+0046bb 0000
+0046bc 0000
+0046bd 0000
+0046be 0000
+0046bf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0046c0 0000
+0046c1 0000
+0046c2 0000
+0046c3 0000
+0046c4 0000
+0046c5 0000
+0046c6 0000
+0046c7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0046c8 0000
+0046c9 0000
+0046ca 0000
+0046cb 0000
+0046cc 0000
+0046cd 0000
+0046ce 0000
+0046cf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0046d0 0000
+0046d1 0000
+0046d2 0000
+0046d3 0000
+0046d4 0000
+0046d5 0000
+0046d6 0000
+0046d7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0046d8 0000
+0046d9 0000
+0046da 0000
+0046db 0000
+0046dc 0000
+0046dd 0000
+0046de 0000
+0046df 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0046e0 0000
+0046e1 0000
+0046e2 0000
+0046e3 0000
+0046e4 0000
+0046e5 0000
+0046e6 0000
+0046e7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0046e8 0000
+0046e9 0000
+0046ea 0000
+0046eb 0000
+0046ec 0000
+0046ed 0000
+0046ee 0000
+0046ef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0046f0 0000
+0046f1 0000
+0046f2 0000
+0046f3 0000
+0046f4 0000
+0046f5 0000
+0046f6 0000
+0046f7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0046f8 0000
+0046f9 0000
+0046fa 0000
+0046fb 0000
+0046fc 0000
+0046fd 0000
+0046fe 0000
+0046ff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004700 0000
+004701 0000
+004702 0000
+004703 0000
+004704 0000
+004705 0000
+004706 0000
+004707 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004708 0000
+004709 0000
+00470a 0000
+00470b 0000
+00470c 0000
+00470d 0000
+00470e 0000
+00470f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004710 0000
+004711 0000
+004712 0000
+004713 0000
+004714 0000
+004715 0000
+004716 0000
+004717 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004718 0000
+004719 0000
+00471a 0000
+00471b 0000
+00471c 0000
+00471d 0000
+00471e 0000
+00471f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004720 0000
+004721 0000
+004722 0000
+004723 0000
+004724 0000
+004725 0000
+004726 0000
+004727 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004728 0000
+004729 0000
+00472a 0000
+00472b 0000
+00472c 0000
+00472d 0000
+00472e 0000
+00472f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004730 0000
+004731 0000
+004732 0000
+004733 0000
+004734 0000
+004735 0000
+004736 0000
+004737 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004738 0000
+004739 0000
+00473a 0000
+00473b 0000
+00473c 0000
+00473d 0000
+00473e 0000
+00473f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004740 0000
+004741 0000
+004742 0000
+004743 0000
+004744 0000
+004745 0000
+004746 0000
+004747 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004748 0000
+004749 0000
+00474a 0000
+00474b 0000
+00474c 0000
+00474d 0000
+00474e 0000
+00474f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004750 0000
+004751 0000
+004752 0000
+004753 0000
+004754 0000
+004755 0000
+004756 0000
+004757 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004758 0000
+004759 0000
+00475a 0000
+00475b 0000
+00475c 0000
+00475d 0000
+00475e 0000
+00475f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004760 0000
+004761 0000
+004762 0000
+004763 0000
+004764 0000
+004765 0000
+004766 0000
+004767 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004768 0000
+004769 0000
+00476a 0000
+00476b 0000
+00476c 0000
+00476d 0000
+00476e 0000
+00476f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004770 0000
+004771 0000
+004772 0000
+004773 0000
+004774 0000
+004775 0000
+004776 0000
+004777 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004778 0000
+004779 0000
+00477a 0000
+00477b 0000
+00477c 0000
+00477d 0000
+00477e 0000
+00477f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004780 0000
+004781 0000
+004782 0000
+004783 0000
+004784 0000
+004785 0000
+004786 0000
+004787 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004788 0000
+004789 0000
+00478a 0000
+00478b 0000
+00478c 0000
+00478d 0000
+00478e 0000
+00478f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004790 0000
+004791 0000
+004792 0000
+004793 0000
+004794 0000
+004795 0000
+004796 0000
+004797 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004798 0000
+004799 0000
+00479a 0000
+00479b 0000
+00479c 0000
+00479d 0000
+00479e 0000
+00479f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0047a0 0000
+0047a1 0000
+0047a2 0000
+0047a3 0000
+0047a4 0000
+0047a5 0000
+0047a6 0000
+0047a7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0047a8 0000
+0047a9 0000
+0047aa 0000
+0047ab 0000
+0047ac 0000
+0047ad 0000
+0047ae 0000
+0047af 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0047b0 0000
+0047b1 0000
+0047b2 0000
+0047b3 0000
+0047b4 0000
+0047b5 0000
+0047b6 0000
+0047b7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0047b8 0000
+0047b9 0000
+0047ba 0000
+0047bb 0000
+0047bc 0000
+0047bd 0000
+0047be 0000
+0047bf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0047c0 0000
+0047c1 0000
+0047c2 0000
+0047c3 0000
+0047c4 0000
+0047c5 0000
+0047c6 0000
+0047c7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0047c8 0000
+0047c9 0000
+0047ca 0000
+0047cb 0000
+0047cc 0000
+0047cd 0000
+0047ce 0000
+0047cf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0047d0 0000
+0047d1 0000
+0047d2 0000
+0047d3 0000
+0047d4 0000
+0047d5 0000
+0047d6 0000
+0047d7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0047d8 0000
+0047d9 0000
+0047da 0000
+0047db 0000
+0047dc 0000
+0047dd 0000
+0047de 0000
+0047df 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0047e0 0000
+0047e1 0000
+0047e2 0000
+0047e3 0000
+0047e4 0000
+0047e5 0000
+0047e6 0000
+0047e7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0047e8 0000
+0047e9 0000
+0047ea 0000
+0047eb 0000
+0047ec 0000
+0047ed 0000
+0047ee 0000
+0047ef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0047f0 0000
+0047f1 0000
+0047f2 0000
+0047f3 0000
+0047f4 0000
+0047f5 0000
+0047f6 0000
+0047f7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0047f8 0000
+0047f9 0000
+0047fa 0000
+0047fb 0000
+0047fc 0000
+0047fd 0000
+0047fe 0000
+0047ff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004800 0000
+004801 0000
+004802 0000
+004803 0000
+004804 0000
+004805 0000
+004806 0000
+004807 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004808 0000
+004809 0000
+00480a 0000
+00480b 0000
+00480c 0000
+00480d 0000
+00480e 0000
+00480f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004810 0000
+004811 0000
+004812 0000
+004813 0000
+004814 0000
+004815 0000
+004816 0000
+004817 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004818 0000
+004819 0000
+00481a 0000
+00481b 0000
+00481c 0000
+00481d 0000
+00481e 0000
+00481f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004820 0000
+004821 0000
+004822 0000
+004823 0000
+004824 0000
+004825 0000
+004826 0000
+004827 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004828 0000
+004829 0000
+00482a 0000
+00482b 0000
+00482c 0000
+00482d 0000
+00482e 0000
+00482f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004830 0000
+004831 0000
+004832 0000
+004833 0000
+004834 0000
+004835 0000
+004836 0000
+004837 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004838 0000
+004839 0000
+00483a 0000
+00483b 0000
+00483c 0000
+00483d 0000
+00483e 0000
+00483f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004840 0000
+004841 0000
+004842 0000
+004843 0000
+004844 0000
+004845 0000
+004846 0000
+004847 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004848 0000
+004849 0000
+00484a 0000
+00484b 0000
+00484c 0000
+00484d 0000
+00484e 0000
+00484f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004850 0000
+004851 0000
+004852 0000
+004853 0000
+004854 0000
+004855 0000
+004856 0000
+004857 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004858 0000
+004859 0000
+00485a 0000
+00485b 0000
+00485c 0000
+00485d 0000
+00485e 0000
+00485f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004860 0000
+004861 0000
+004862 0000
+004863 0000
+004864 0000
+004865 0000
+004866 0000
+004867 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004868 0000
+004869 0000
+00486a 0000
+00486b 0000
+00486c 0000
+00486d 0000
+00486e 0000
+00486f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004870 0000
+004871 0000
+004872 0000
+004873 0000
+004874 0000
+004875 0000
+004876 0000
+004877 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004878 0000
+004879 0000
+00487a 0000
+00487b 0000
+00487c 0000
+00487d 0000
+00487e 0000
+00487f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004880 0000
+004881 0000
+004882 0000
+004883 0000
+004884 0000
+004885 0000
+004886 0000
+004887 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004888 0000
+004889 0000
+00488a 0000
+00488b 0000
+00488c 0000
+00488d 0000
+00488e 0000
+00488f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004890 0000
+004891 0000
+004892 0000
+004893 0000
+004894 0000
+004895 0000
+004896 0000
+004897 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004898 0000
+004899 0000
+00489a 0000
+00489b 0000
+00489c 0000
+00489d 0000
+00489e 0000
+00489f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0048a0 0000
+0048a1 0000
+0048a2 0000
+0048a3 0000
+0048a4 0000
+0048a5 0000
+0048a6 0000
+0048a7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0048a8 0000
+0048a9 0000
+0048aa 0000
+0048ab 0000
+0048ac 0000
+0048ad 0000
+0048ae 0000
+0048af 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0048b0 0000
+0048b1 0000
+0048b2 0000
+0048b3 0000
+0048b4 0000
+0048b5 0000
+0048b6 0000
+0048b7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0048b8 0000
+0048b9 0000
+0048ba 0000
+0048bb 0000
+0048bc 0000
+0048bd 0000
+0048be 0000
+0048bf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0048c0 0000
+0048c1 0000
+0048c2 0000
+0048c3 0000
+0048c4 0000
+0048c5 0000
+0048c6 0000
+0048c7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0048c8 0000
+0048c9 0000
+0048ca 0000
+0048cb 0000
+0048cc 0000
+0048cd 0000
+0048ce 0000
+0048cf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0048d0 0000
+0048d1 0000
+0048d2 0000
+0048d3 0000
+0048d4 0000
+0048d5 0000
+0048d6 0000
+0048d7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0048d8 0000
+0048d9 0000
+0048da 0000
+0048db 0000
+0048dc 0000
+0048dd 0000
+0048de 0000
+0048df 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0048e0 0000
+0048e1 0000
+0048e2 0000
+0048e3 0000
+0048e4 0000
+0048e5 0000
+0048e6 0000
+0048e7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0048e8 0000
+0048e9 0000
+0048ea 0000
+0048eb 0000
+0048ec 0000
+0048ed 0000
+0048ee 0000
+0048ef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0048f0 0000
+0048f1 0000
+0048f2 0000
+0048f3 0000
+0048f4 0000
+0048f5 0000
+0048f6 0000
+0048f7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0048f8 0000
+0048f9 0000
+0048fa 0000
+0048fb 0000
+0048fc 0000
+0048fd 0000
+0048fe 0000
+0048ff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004900 0000
+004901 0000
+004902 0000
+004903 0000
+004904 0000
+004905 0000
+004906 0000
+004907 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004908 0000
+004909 0000
+00490a 0000
+00490b 0000
+00490c 0000
+00490d 0000
+00490e 0000
+00490f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004910 0000
+004911 0000
+004912 0000
+004913 0000
+004914 0000
+004915 0000
+004916 0000
+004917 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004918 0000
+004919 0000
+00491a 0000
+00491b 0000
+00491c 0000
+00491d 0000
+00491e 0000
+00491f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004920 0000
+004921 0000
+004922 0000
+004923 0000
+004924 0000
+004925 0000
+004926 0000
+004927 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004928 0000
+004929 0000
+00492a 0000
+00492b 0000
+00492c 0000
+00492d 0000
+00492e 0000
+00492f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004930 0000
+004931 0000
+004932 0000
+004933 0000
+004934 0000
+004935 0000
+004936 0000
+004937 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004938 0000
+004939 0000
+00493a 0000
+00493b 0000
+00493c 0000
+00493d 0000
+00493e 0000
+00493f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004940 0000
+004941 0000
+004942 0000
+004943 0000
+004944 0000
+004945 0000
+004946 0000
+004947 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004948 0000
+004949 0000
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+00494c 0000
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+00494f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004950 0000
+004951 0000
+004952 0000
+004953 0000
+004954 0000
+004955 0000
+004956 0000
+004957 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004958 0000
+004959 0000
+00495a 0000
+00495b 0000
+00495c 0000
+00495d 0000
+00495e 0000
+00495f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004960 0000
+004961 0000
+004962 0000
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+004964 0000
+004965 0000
+004966 0000
+004967 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004968 0000
+004969 0000
+00496a 0000
+00496b 0000
+00496c 0000
+00496d 0000
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+00496f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004970 0000
+004971 0000
+004972 0000
+004973 0000
+004974 0000
+004975 0000
+004976 0000
+004977 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004978 0000
+004979 0000
+00497a 0000
+00497b 0000
+00497c 0000
+00497d 0000
+00497e 0000
+00497f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004980 0000
+004981 0000
+004982 0000
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+004984 0000
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+004986 0000
+004987 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004988 0000
+004989 0000
+00498a 0000
+00498b 0000
+00498c 0000
+00498d 0000
+00498e 0000
+00498f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004990 0000
+004991 0000
+004992 0000
+004993 0000
+004994 0000
+004995 0000
+004996 0000
+004997 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004998 0000
+004999 0000
+00499a 0000
+00499b 0000
+00499c 0000
+00499d 0000
+00499e 0000
+00499f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0049a0 0000
+0049a1 0000
+0049a2 0000
+0049a3 0000
+0049a4 0000
+0049a5 0000
+0049a6 0000
+0049a7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0049a8 0000
+0049a9 0000
+0049aa 0000
+0049ab 0000
+0049ac 0000
+0049ad 0000
+0049ae 0000
+0049af 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0049b0 0000
+0049b1 0000
+0049b2 0000
+0049b3 0000
+0049b4 0000
+0049b5 0000
+0049b6 0000
+0049b7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0049b8 0000
+0049b9 0000
+0049ba 0000
+0049bb 0000
+0049bc 0000
+0049bd 0000
+0049be 0000
+0049bf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0049c0 0000
+0049c1 0000
+0049c2 0000
+0049c3 0000
+0049c4 0000
+0049c5 0000
+0049c6 0000
+0049c7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0049c8 0000
+0049c9 0000
+0049ca 0000
+0049cb 0000
+0049cc 0000
+0049cd 0000
+0049ce 0000
+0049cf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0049d0 0000
+0049d1 0000
+0049d2 0000
+0049d3 0000
+0049d4 0000
+0049d5 0000
+0049d6 0000
+0049d7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0049d8 0000
+0049d9 0000
+0049da 0000
+0049db 0000
+0049dc 0000
+0049dd 0000
+0049de 0000
+0049df 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0049e0 0000
+0049e1 0000
+0049e2 0000
+0049e3 0000
+0049e4 0000
+0049e5 0000
+0049e6 0000
+0049e7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0049e8 0000
+0049e9 0000
+0049ea 0000
+0049eb 0000
+0049ec 0000
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+0049ee 0000
+0049ef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0049f0 0000
+0049f1 0000
+0049f2 0000
+0049f3 0000
+0049f4 0000
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+0049f6 0000
+0049f7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0049f8 0000
+0049f9 0000
+0049fa 0000
+0049fb 0000
+0049fc 0000
+0049fd 0000
+0049fe 0000
+0049ff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004a00 0000
+004a01 0000
+004a02 0000
+004a03 0000
+004a04 0000
+004a05 0000
+004a06 0000
+004a07 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004a08 0000
+004a09 0000
+004a0a 0000
+004a0b 0000
+004a0c 0000
+004a0d 0000
+004a0e 0000
+004a0f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004a10 0000
+004a11 0000
+004a12 0000
+004a13 0000
+004a14 0000
+004a15 0000
+004a16 0000
+004a17 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004a18 0000
+004a19 0000
+004a1a 0000
+004a1b 0000
+004a1c 0000
+004a1d 0000
+004a1e 0000
+004a1f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004a20 0000
+004a21 0000
+004a22 0000
+004a23 0000
+004a24 0000
+004a25 0000
+004a26 0000
+004a27 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004a28 0000
+004a29 0000
+004a2a 0000
+004a2b 0000
+004a2c 0000
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+004a2e 0000
+004a2f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004a30 0000
+004a31 0000
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+004a33 0000
+004a34 0000
+004a35 0000
+004a36 0000
+004a37 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004a38 0000
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+004a3a 0000
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+004a3e 0000
+004a3f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004a40 0000
+004a41 0000
+004a42 0000
+004a43 0000
+004a44 0000
+004a45 0000
+004a46 0000
+004a47 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004a48 0000
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+004a4a 0000
+004a4b 0000
+004a4c 0000
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+004a4e 0000
+004a4f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004a50 0000
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+004a54 0000
+004a55 0000
+004a56 0000
+004a57 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004a58 0000
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+004a5a 0000
+004a5b 0000
+004a5c 0000
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+004a5f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004a60 0000
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+004a62 0000
+004a63 0000
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+004a67 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004a68 0000
+004a69 0000
+004a6a 0000
+004a6b 0000
+004a6c 0000
+004a6d 0000
+004a6e 0000
+004a6f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004a70 0000
+004a71 0000
+004a72 0000
+004a73 0000
+004a74 0000
+004a75 0000
+004a76 0000
+004a77 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004a78 0000
+004a79 0000
+004a7a 0000
+004a7b 0000
+004a7c 0000
+004a7d 0000
+004a7e 0000
+004a7f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004a80 0000
+004a81 0000
+004a82 0000
+004a83 0000
+004a84 0000
+004a85 0000
+004a86 0000
+004a87 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004a88 0000
+004a89 0000
+004a8a 0000
+004a8b 0000
+004a8c 0000
+004a8d 0000
+004a8e 0000
+004a8f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004a90 0000
+004a91 0000
+004a92 0000
+004a93 0000
+004a94 0000
+004a95 0000
+004a96 0000
+004a97 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004a98 0000
+004a99 0000
+004a9a 0000
+004a9b 0000
+004a9c 0000
+004a9d 0000
+004a9e 0000
+004a9f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004aa0 0000
+004aa1 0000
+004aa2 0000
+004aa3 0000
+004aa4 0000
+004aa5 0000
+004aa6 0000
+004aa7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004aa8 0000
+004aa9 0000
+004aaa 0000
+004aab 0000
+004aac 0000
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+004aaf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ab0 0000
+004ab1 0000
+004ab2 0000
+004ab3 0000
+004ab4 0000
+004ab5 0000
+004ab6 0000
+004ab7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ab8 0000
+004ab9 0000
+004aba 0000
+004abb 0000
+004abc 0000
+004abd 0000
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+004abf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ac0 0000
+004ac1 0000
+004ac2 0000
+004ac3 0000
+004ac4 0000
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+004ac7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ac8 0000
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+004aca 0000
+004acb 0000
+004acc 0000
+004acd 0000
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+004acf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ad0 0000
+004ad1 0000
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+004ad4 0000
+004ad5 0000
+004ad6 0000
+004ad7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ad8 0000
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+004ada 0000
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+004adc 0000
+004add 0000
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+004adf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ae0 0000
+004ae1 0000
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+004ae3 0000
+004ae4 0000
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+004ae7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ae8 0000
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+004aea 0000
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+004aec 0000
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+004aee 0000
+004aef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004af0 0000
+004af1 0000
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+004af4 0000
+004af5 0000
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+004af7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004af8 0000
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+004afa 0000
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+004afd 0000
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+004aff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004b00 0000
+004b01 0000
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+004b04 0000
+004b05 0000
+004b06 0000
+004b07 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004b08 0000
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+004b0a 0000
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+004b0c 0000
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+004b0e 0000
+004b0f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004b10 0000
+004b11 0000
+004b12 0000
+004b13 0000
+004b14 0000
+004b15 0000
+004b16 0000
+004b17 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004b18 0000
+004b19 0000
+004b1a 0000
+004b1b 0000
+004b1c 0000
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+004b1e 0000
+004b1f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004b20 0000
+004b21 0000
+004b22 0000
+004b23 0000
+004b24 0000
+004b25 0000
+004b26 0000
+004b27 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004b28 0000
+004b29 0000
+004b2a 0000
+004b2b 0000
+004b2c 0000
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+004b2e 0000
+004b2f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004b30 0000
+004b31 0000
+004b32 0000
+004b33 0000
+004b34 0000
+004b35 0000
+004b36 0000
+004b37 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004b38 0000
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+004b3a 0000
+004b3b 0000
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+004b3f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004b40 0000
+004b41 0000
+004b42 0000
+004b43 0000
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+004b47 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004b48 0000
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+004b4a 0000
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+004b4f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004b50 0000
+004b51 0000
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+004b57 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004b58 0000
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+004b5a 0000
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+004b5f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004b60 0000
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+004b67 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004b68 0000
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+004b6a 0000
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+004b6f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004b70 0000
+004b71 0000
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+004b77 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004b78 0000
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+004b7a 0000
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+004b7e 0000
+004b7f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004b80 0000
+004b81 0000
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+004b87 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004b88 0000
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+004b8a 0000
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+004b8f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004b90 0000
+004b91 0000
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+004b96 0000
+004b97 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004b98 0000
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+004b9f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ba0 0000
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+004ba7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ba8 0000
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+004baf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004bb0 0000
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+004bb7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004bb8 0000
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+004bbf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004bc0 0000
+004bc1 0000
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+004bc7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004bc8 0000
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+004bcf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004bd0 0000
+004bd1 0000
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+004bd7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004bd8 0000
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+004bdf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004be0 0000
+004be1 0000
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+004be7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004be8 0000
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+004bef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004bf0 0000
+004bf1 0000
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+004bf7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004bf8 0000
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+004bff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004c00 0000
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+004c07 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004c08 0000
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+004c0a 0000
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+004c10 0000
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+004c17 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004c18 0000
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+004c1a 0000
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+004c20 0000
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+004c27 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004c28 0000
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+004c2a 0000
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+004c30 0000
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+004c38 0000
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+004c40 0000
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+004c48 0000
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+004c50 0000
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+004c58 0000
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+004c60 0000
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+004c68 0000
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+004c70 0000
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+004c78 0000
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+004c7d 0000
+004c7e 0000
+004c7f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004c80 0000
+004c81 0000
+004c82 0000
+004c83 0000
+004c84 0000
+004c85 0000
+004c86 0000
+004c87 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004c88 0000
+004c89 0000
+004c8a 0000
+004c8b 0000
+004c8c 0000
+004c8d 0000
+004c8e 0000
+004c8f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004c90 0000
+004c91 0000
+004c92 0000
+004c93 0000
+004c94 0000
+004c95 0000
+004c96 0000
+004c97 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004c98 0000
+004c99 0000
+004c9a 0000
+004c9b 0000
+004c9c 0000
+004c9d 0000
+004c9e 0000
+004c9f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ca0 0000
+004ca1 0000
+004ca2 0000
+004ca3 0000
+004ca4 0000
+004ca5 0000
+004ca6 0000
+004ca7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ca8 0000
+004ca9 0000
+004caa 0000
+004cab 0000
+004cac 0000
+004cad 0000
+004cae 0000
+004caf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004cb0 0000
+004cb1 0000
+004cb2 0000
+004cb3 0000
+004cb4 0000
+004cb5 0000
+004cb6 0000
+004cb7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004cb8 0000
+004cb9 0000
+004cba 0000
+004cbb 0000
+004cbc 0000
+004cbd 0000
+004cbe 0000
+004cbf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004cc0 0000
+004cc1 0000
+004cc2 0000
+004cc3 0000
+004cc4 0000
+004cc5 0000
+004cc6 0000
+004cc7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004cc8 0000
+004cc9 0000
+004cca 0000
+004ccb 0000
+004ccc 0000
+004ccd 0000
+004cce 0000
+004ccf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004cd0 0000
+004cd1 0000
+004cd2 0000
+004cd3 0000
+004cd4 0000
+004cd5 0000
+004cd6 0000
+004cd7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004cd8 0000
+004cd9 0000
+004cda 0000
+004cdb 0000
+004cdc 0000
+004cdd 0000
+004cde 0000
+004cdf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ce0 0000
+004ce1 0000
+004ce2 0000
+004ce3 0000
+004ce4 0000
+004ce5 0000
+004ce6 0000
+004ce7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ce8 0000
+004ce9 0000
+004cea 0000
+004ceb 0000
+004cec 0000
+004ced 0000
+004cee 0000
+004cef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004cf0 0000
+004cf1 0000
+004cf2 0000
+004cf3 0000
+004cf4 0000
+004cf5 0000
+004cf6 0000
+004cf7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004cf8 0000
+004cf9 0000
+004cfa 0000
+004cfb 0000
+004cfc 0000
+004cfd 0000
+004cfe 0000
+004cff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004d00 0000
+004d01 0000
+004d02 0000
+004d03 0000
+004d04 0000
+004d05 0000
+004d06 0000
+004d07 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004d08 0000
+004d09 0000
+004d0a 0000
+004d0b 0000
+004d0c 0000
+004d0d 0000
+004d0e 0000
+004d0f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004d10 0000
+004d11 0000
+004d12 0000
+004d13 0000
+004d14 0000
+004d15 0000
+004d16 0000
+004d17 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004d18 0000
+004d19 0000
+004d1a 0000
+004d1b 0000
+004d1c 0000
+004d1d 0000
+004d1e 0000
+004d1f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004d20 0000
+004d21 0000
+004d22 0000
+004d23 0000
+004d24 0000
+004d25 0000
+004d26 0000
+004d27 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004d28 0000
+004d29 0000
+004d2a 0000
+004d2b 0000
+004d2c 0000
+004d2d 0000
+004d2e 0000
+004d2f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004d30 0000
+004d31 0000
+004d32 0000
+004d33 0000
+004d34 0000
+004d35 0000
+004d36 0000
+004d37 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004d38 0000
+004d39 0000
+004d3a 0000
+004d3b 0000
+004d3c 0000
+004d3d 0000
+004d3e 0000
+004d3f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004d40 0000
+004d41 0000
+004d42 0000
+004d43 0000
+004d44 0000
+004d45 0000
+004d46 0000
+004d47 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004d48 0000
+004d49 0000
+004d4a 0000
+004d4b 0000
+004d4c 0000
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+004d4e 0000
+004d4f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004d50 0000
+004d51 0000
+004d52 0000
+004d53 0000
+004d54 0000
+004d55 0000
+004d56 0000
+004d57 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004d58 0000
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+004d5a 0000
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+004d5f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004d60 0000
+004d61 0000
+004d62 0000
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+004d64 0000
+004d65 0000
+004d66 0000
+004d67 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004d68 0000
+004d69 0000
+004d6a 0000
+004d6b 0000
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+004d6f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004d70 0000
+004d71 0000
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+004d77 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004d78 0000
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+004d7a 0000
+004d7b 0000
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+004d7e 0000
+004d7f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004d80 0000
+004d81 0000
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+004d84 0000
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+004d87 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004d88 0000
+004d89 0000
+004d8a 0000
+004d8b 0000
+004d8c 0000
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+004d8f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004d90 0000
+004d91 0000
+004d92 0000
+004d93 0000
+004d94 0000
+004d95 0000
+004d96 0000
+004d97 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004d98 0000
+004d99 0000
+004d9a 0000
+004d9b 0000
+004d9c 0000
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+004d9f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004da0 0000
+004da1 0000
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+004da4 0000
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+004da7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004da8 0000
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+004dac 0000
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+004daf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004db0 0000
+004db1 0000
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+004db7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004db8 0000
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+004dbf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004dc0 0000
+004dc1 0000
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+004dc7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004dc8 0000
+004dc9 0000
+004dca 0000
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+004dcf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004dd0 0000
+004dd1 0000
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+004dd4 0000
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+004dd7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004dd8 0000
+004dd9 0000
+004dda 0000
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+004ddf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004de0 0000
+004de1 0000
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+004de7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004de8 0000
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+004dea 0000
+004deb 0000
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+004ded 0000
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+004def 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004df0 0000
+004df1 0000
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+004df7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004df8 0000
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+004dfa 0000
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+004dfe 0000
+004dff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004e00 0000
+004e01 0000
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+004e07 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004e08 0000
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+004e0a 0000
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+004e0f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004e10 0000
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+004e17 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004e18 0000
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+004e1a 0000
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+004e1f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004e20 0000
+004e21 0000
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+004e27 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004e28 0000
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+004e2a 0000
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+004e2f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004e30 0000
+004e31 0000
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+004e37 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004e38 0000
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+004e3f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004e40 0000
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+004e47 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004e48 0000
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+004e50 0000
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+004e58 0000
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+004e60 0000
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+004e68 0000
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+004e70 0000
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+004e78 0000
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+004e80 0000
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+004e88 0000
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+004e8d 0000
+004e8e 0000
+004e8f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004e90 0000
+004e91 0000
+004e92 0000
+004e93 0000
+004e94 0000
+004e95 0000
+004e96 0000
+004e97 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004e98 0000
+004e99 0000
+004e9a 0000
+004e9b 0000
+004e9c 0000
+004e9d 0000
+004e9e 0000
+004e9f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ea0 0000
+004ea1 0000
+004ea2 0000
+004ea3 0000
+004ea4 0000
+004ea5 0000
+004ea6 0000
+004ea7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ea8 0000
+004ea9 0000
+004eaa 0000
+004eab 0000
+004eac 0000
+004ead 0000
+004eae 0000
+004eaf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004eb0 0000
+004eb1 0000
+004eb2 0000
+004eb3 0000
+004eb4 0000
+004eb5 0000
+004eb6 0000
+004eb7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004eb8 0000
+004eb9 0000
+004eba 0000
+004ebb 0000
+004ebc 0000
+004ebd 0000
+004ebe 0000
+004ebf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ec0 0000
+004ec1 0000
+004ec2 0000
+004ec3 0000
+004ec4 0000
+004ec5 0000
+004ec6 0000
+004ec7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ec8 0000
+004ec9 0000
+004eca 0000
+004ecb 0000
+004ecc 0000
+004ecd 0000
+004ece 0000
+004ecf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ed0 0000
+004ed1 0000
+004ed2 0000
+004ed3 0000
+004ed4 0000
+004ed5 0000
+004ed6 0000
+004ed7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ed8 0000
+004ed9 0000
+004eda 0000
+004edb 0000
+004edc 0000
+004edd 0000
+004ede 0000
+004edf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ee0 0000
+004ee1 0000
+004ee2 0000
+004ee3 0000
+004ee4 0000
+004ee5 0000
+004ee6 0000
+004ee7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ee8 0000
+004ee9 0000
+004eea 0000
+004eeb 0000
+004eec 0000
+004eed 0000
+004eee 0000
+004eef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ef0 0000
+004ef1 0000
+004ef2 0000
+004ef3 0000
+004ef4 0000
+004ef5 0000
+004ef6 0000
+004ef7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004ef8 0000
+004ef9 0000
+004efa 0000
+004efb 0000
+004efc 0000
+004efd 0000
+004efe 0000
+004eff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+004f00 00a9
+004f01 b785
+004f02 fd85
+004f03 a2d8
+004f04 9aff
+004f05 c8a2
+004f06 b286
+004f07 c120              .db 0xA9, 0x00, 0x85, 0xB7, 0x85, 0xFD, 0xD8, 0xA2, 0xFF, 0x9A, 0xA2, 0xC8, 0x86, 0xB2, 0x20, 0xC1
+004f08 20a1
+004f09 a2ad
+004f0a 43c9
+004f0b 12d0
+004f0c 1fa2
+004f0d 26bd
+004f0e 95a4
+004f0f ca50              .db 0xA1, 0x20, 0xAD, 0xA2, 0xC9, 0x43, 0xD0, 0x12, 0xA2, 0x1F, 0xBD, 0x26, 0xA4, 0x95, 0x50, 0xCA
+004f10 f810
+004f11 1ba2
+004f12 dc86
+004f13 cca9
+004f14 19d0
+004f15 45c9
+004f16 0ed0
+004f17 cb20              .db 0x10, 0xF8, 0xA2, 0x1B, 0x86, 0xDC, 0xA9, 0xCC, 0xD0, 0x19, 0xC9, 0x45, 0xD0, 0x0E, 0x20, 0xCB
+004f18 389f
+004f19 01a9
+004f1a b7e5
+004f1b b785
+004f1c eea9
+004f1d 07d0
+004f1e 40c9
+004f1f 0bd0              .db 0x9F, 0x38, 0xA9, 0x01, 0xE5, 0xB7, 0x85, 0xB7, 0xA9, 0xEE, 0xD0, 0x07, 0xC9, 0x40, 0xD0, 0x0B
+004f20 bf20
+004f21 85a0
+004f22 85fb
+004f23 85fa
+004f24 d0f9
+004f25 c9bb
+004f26 d00d
+004f27 2009              .db 0x20, 0xBF, 0xA0, 0x85, 0xFB, 0x85, 0xFA, 0x85, 0xF9, 0xD0, 0xBB, 0xC9, 0x0D, 0xD0, 0x09, 0x20
+004f28 a065
+004f29 8520
+004f2a 4ca1
+004f2b 9f07
+004f2c 41c9
+004f2d 0ef0
+004f2e 42c9
+004f2f 07d0              .db 0x65, 0xA0, 0x20, 0x85, 0xA1, 0x4C, 0x07, 0x9F, 0xC9, 0x41, 0xF0, 0x0E, 0xC9, 0x42, 0xD0, 0x07
+004f30 a320
+004f31 a9a1
+004f32 d0bb
+004f33 4cdc
+004f34 9f00
+004f35 f76c
+004f36 a603
+004f37 30b5              .db 0x20, 0xA3, 0xA1, 0xA9, 0xBB, 0xD0, 0xDC, 0x4C, 0x00, 0x9F, 0x6C, 0xF7, 0x03, 0xA6, 0xB5, 0x30
+004f38 a559
+004f39 f0b0
+004f3a e008
+004f3b d008
+004f3c c504
+004f3d f0e6
+004f3e f62e
+004f3f c9e3              .db 0x59, 0xA5, 0xB0, 0xF0, 0x08, 0xE0, 0x08, 0xD0, 0x04, 0xC5, 0xE6, 0xF0, 0x2E, 0xF6, 0xE3, 0xC9
+004f40 d001
+004f41 f602
+004f42 50e3
+004f43 a01e
+004f44 a50f
+004f45 d9b1
+004f46 0060
+004f47 03f0              .db 0x01, 0xD0, 0x02, 0xF6, 0xE3, 0x50, 0x1E, 0xA0, 0x0F, 0xA5, 0xB1, 0xD9, 0x60, 0x00, 0xF0, 0x03
+004f48 1088
+004f49 b9f8
+004f4a a457
+004f4b e4d5
+004f4c 0490
+004f4d e694
+004f4e e495
+004f4f 0818              .db 0x88, 0x10, 0xF8, 0xB9, 0x57, 0xA4, 0xD5, 0xE4, 0x90, 0x04, 0x94, 0xE6, 0x95, 0xE4, 0x18, 0x08
+004f50 e575
+004f51 e595
+004f52 e028
+004f53 f004
+004f54 3003
+004f55 602e
+004f56 e8a5
+004f57 dd85              .db 0x75, 0xE5, 0x95, 0xE5, 0x28, 0xE0, 0x04, 0xF0, 0x03, 0x30, 0x2E, 0x60, 0xA5, 0xE8, 0x85, 0xDD
+004f58 00a9
+004f59 b585
+004f5a 6520
+004f5b 20a0
+004f5c 9fcb
+004f5d 1920
+004f5e 209f
+004f5f 9fcb              .db 0xA9, 0x00, 0x85, 0xB5, 0x20, 0x65, 0xA0, 0x20, 0xCB, 0x9F, 0x20, 0x19, 0x9F, 0x20, 0xCB, 0x9F
+004f60 08a9
+004f61 b585
+004f62 4b20
+004f63 4ca0
+004f64 a11f
+004f65 f9e0
+004f66 0bd0
+004f67 60a5              .db 0xA9, 0x08, 0x85, 0xB5, 0x20, 0x4B, 0xA0, 0x4C, 0x1F, 0xA1, 0xE0, 0xF9, 0xD0, 0x0B, 0xA5, 0x60
+004f68 b1c5
+004f69 04d0
+004f6a 00a9
+004f6b b485
+004f6c 5060
+004f6d a0fd
+004f6e a507
+004f6f d9b1              .db 0xC5, 0xB1, 0xD0, 0x04, 0xA9, 0x00, 0x85, 0xB4, 0x60, 0x50, 0xFD, 0xA0, 0x07, 0xA5, 0xB1, 0xD9
+004f70 0060
+004f71 05f0
+004f72 f088
+004f73 10f1
+004f74 b9f6
+004f75 a457
+004f76 e2d5
+004f77 0290              .db 0x60, 0x00, 0xF0, 0x05, 0x88, 0xF0, 0xF1, 0x10, 0xF6, 0xB9, 0x57, 0xA4, 0xD5, 0xE2, 0x90, 0x02
+004f78 e295
+004f79 b5c6
+004f7a fba9
+004f7b b5c5
+004f7c 03f0
+004f7d 3f20
+004f7e e6a0
+004f7f 60b5              .db 0x95, 0xE2, 0xC6, 0xB5, 0xA9, 0xFB, 0xC5, 0xB5, 0xF0, 0x03, 0x20, 0x3F, 0xA0, 0xE6, 0xB5, 0x60
+004f80 08c9
+004f81 12b0
+004f82 0f20
+004f83 a2a1
+004f84 b51f
+004f85 c550
+004f86 f0fa
+004f87 ca03              .db 0xC9, 0x08, 0xB0, 0x12, 0x20, 0x0F, 0xA1, 0xA2, 0x1F, 0xB5, 0x50, 0xC5, 0xFA, 0xF0, 0x03, 0xCA
+004f88 f710
+004f89 fb86
+004f8a b086
+004f8b 064c
+004f8c a29e
+004f8d a910
+004f8e 9500
+004f8f cade              .db 0x10, 0xF7, 0x86, 0xFB, 0x86, 0xB0, 0x4C, 0x06, 0x9E, 0xA2, 0x10, 0xA9, 0x00, 0x95, 0xDE, 0xCA
+004f90 fb10
+004f91 10a9
+004f92 b085
+004f93 b0c6
+004f94 0110
+004f95 2060
+004f96 a038
+004f97 b0a4              .db 0x10, 0xFB, 0xA9, 0x10, 0x85, 0xB0, 0xC6, 0xB0, 0x10, 0x01, 0x60, 0x20, 0x38, 0xA0, 0xA4, 0xB0
+004f98 08a2
+004f99 b686
+004f9a 08c0
+004f9b 4110
+004f9c 06c0
+004f9d 2e10
+004f9e 04c0
+004f9f 1f10              .db 0xA2, 0x08, 0x86, 0xB6, 0xC0, 0x08, 0x10, 0x41, 0xC0, 0x06, 0x10, 0x2E, 0xC0, 0x04, 0x10, 0x1F
+004fa0 01c0
+004fa1 09f0
+004fa2 0e10
+004fa3 a720
+004fa4 d09f
+004fa5 f0fb
+004fa6 20d9
+004fa7 9fb5              .db 0xC0, 0x01, 0xF0, 0x09, 0x10, 0x0E, 0x20, 0xA7, 0x9F, 0xD0, 0xFB, 0xF0, 0xD9, 0x20, 0xB5, 0x9F
+004fa8 fbd0
+004fa9 d2f0
+004faa 04a2
+004fab b686
+004fac b520
+004fad d09f
+004fae f0fb
+004faf 20c7              .db 0xD0, 0xFB, 0xF0, 0xD2, 0xA2, 0x04, 0x86, 0xB6, 0x20, 0xB5, 0x9F, 0xD0, 0xFB, 0xF0, 0xC7, 0x20
+004fb0 9fb5
+004fb1 b6a5
+004fb2 04c9
+004fb3 f7d0
+004fb4 bcf0
+004fb5 10a2
+004fb6 b686
+004fb7 a720              .db 0xB5, 0x9F, 0xA5, 0xB6, 0xC9, 0x04, 0xD0, 0xF7, 0xF0, 0xBC, 0xA2, 0x10, 0x86, 0xB6, 0x20, 0xA7
+004fb8 a59f
+004fb9 c9b6
+004fba d008
+004fbb f0f7
+004fbc a2ad
+004fbd 8606
+004fbe 20b6
+004fbf 9fe3              .db 0x9F, 0xA5, 0xB6, 0xC9, 0x08, 0xD0, 0xF7, 0xF0, 0xAD, 0xA2, 0x06, 0x86, 0xB6, 0x20, 0xE3, 0x9F
+004fc0 0550
+004fc1 0330
+004fc2 6d20
+004fc3 209e
+004fc4 a038
+004fc5 b6c6
+004fc6 b6a5
+004fc7 05c9              .db 0x50, 0x05, 0x30, 0x03, 0x20, 0x6D, 0x9E, 0x20, 0x38, 0xA0, 0xC6, 0xB6, 0xA5, 0xB6, 0xC9, 0x05
+004fc8 ebf0
+004fc9 e320
+004fca 709f
+004fcb 308f
+004fcc 208d
+004fcd 9e6d
+004fce b1a5
+004fcf f029              .db 0xF0, 0xEB, 0x20, 0xE3, 0x9F, 0x70, 0x8F, 0x30, 0x8D, 0x20, 0x6D, 0x9E, 0xA5, 0xB1, 0x29, 0xF0
+004fd0 20c9
+004fd1 eef0
+004fd2 264c
+004fd3 209f
+004fd4 9fe3
+004fd5 0330
+004fd6 6d20
+004fd7 209e              .db 0xC9, 0x20, 0xF0, 0xEE, 0x4C, 0x26, 0x9F, 0x20, 0xE3, 0x9F, 0x30, 0x03, 0x20, 0x6D, 0x9E, 0x20
+004fd8 a038
+004fd9 b6c6
+004fda 2060
+004fdb 9fe3
+004fdc 0290
+004fdd f950
+004fde 0730
+004fdf 2008              .db 0x38, 0xA0, 0xC6, 0xB6, 0x60, 0x20, 0xE3, 0x9F, 0x90, 0x02, 0x50, 0xF9, 0x30, 0x07, 0x08, 0x20
+004fe0 9e6d
+004fe1 5028
+004fe2 20f0
+004fe3 a038
+004fe4 b6c6
+004fe5 a260
+004fe6 380f
+004fe7 60b4              .db 0x6D, 0x9E, 0x28, 0x50, 0xF0, 0x20, 0x38, 0xA0, 0xC6, 0xB6, 0x60, 0xA2, 0x0F, 0x38, 0xB4, 0x60
+004fe8 77a9
+004fe9 50f5
+004fea 6095
+004feb 5094
+004fec a938
+004fed f577
+004fee 9550
+004fef ca50              .db 0xA9, 0x77, 0xF5, 0x50, 0x95, 0x60, 0x94, 0x50, 0x38, 0xA9, 0x77, 0xF5, 0x50, 0x95, 0x50, 0xCA
+004ff0 eb10
+004ff1 a560
+004ff2 a6b1
+004ff3 18b6
+004ff4 467d
+004ff5 85a4
+004ff6 29b1
+004ff7 d088              .db 0x10, 0xEB, 0x60, 0xA5, 0xB1, 0xA6, 0xB6, 0x18, 0x7D, 0x46, 0xA4, 0x85, 0xB1, 0x29, 0x88, 0xD0
+004ff8 a542
+004ff9 a2b1
+004ffa ca20
+004ffb 0e30
+004ffc 50d5
+004ffd f9d0
+004ffe 10e0
+004fff 3330              .db 0x42, 0xA5, 0xB1, 0xA2, 0x20, 0xCA, 0x30, 0x0E, 0xD5, 0x50, 0xD0, 0xF9, 0xE0, 0x10, 0x30, 0x33
+005000 7fa9
+005001 0169
+005002 0170
+005003 a5b8
+005004 30b5
+005005 c924
+005006 1008
+005007 4820              .db 0xA9, 0x7F, 0x69, 0x01, 0x70, 0x01, 0xB8, 0xA5, 0xB5, 0x30, 0x24, 0xC9, 0x08, 0x10, 0x20, 0x48
+005008 a908
+005009 85f9
+00500a 85b5
+00500b 20b4
+00500c a065
+00500d cb20
+00500e 209f
+00500f 9f22              .db 0x08, 0xA9, 0xF9, 0x85, 0xB5, 0x85, 0xB4, 0x20, 0x65, 0xA0, 0x20, 0xCB, 0x9F, 0x20, 0x22, 0x9F
+005010 4820
+005011 28a0
+005012 8568
+005013 a5b5
+005014 30b4
+005015 3804
+005016 ffa9
+005017 1860              .db 0x20, 0x48, 0xA0, 0x28, 0x68, 0x85, 0xB5, 0xA5, 0xB4, 0x30, 0x04, 0x38, 0xA9, 0xFF, 0x60, 0x18
+005018 00a9
+005019 a960
+00501a 18ff
+00501b 60b8
+00501c b0a6
+00501d 50b5
+00501e b185
+00501f 2060              .db 0xA9, 0x00, 0x60, 0xA9, 0xFF, 0x18, 0xB8, 0x60, 0xA6, 0xB0, 0xB5, 0x50, 0x85, 0xB1, 0x60, 0x20
+005020 a065
+005021 cb20
+005022 209f
+005023 9f22
+005024 cb20
+005025 ba9f
+005026 b386
+005027 b2a6              .db 0x65, 0xA0, 0x20, 0xCB, 0x9F, 0x20, 0x22, 0x9F, 0x20, 0xCB, 0x9F, 0xBA, 0x86, 0xB3, 0xA6, 0xB2
+005028 689a
+005029 b685
+00502a 8568
+00502b aab0
+00502c 9568
+00502d 6850
+00502e 68aa
+00502f b185              .db 0x9A, 0x68, 0x85, 0xB6, 0x68, 0x85, 0xB0, 0xAA, 0x68, 0x95, 0x50, 0x68, 0xAA, 0x68, 0x85, 0xB1
+005030 5095
+005031 8a4c
+005032 baa0
+005033 b386
+005034 b2a6
+005035 a59a
+005036 48b1
+005037 a2a8              .db 0x95, 0x50, 0x4C, 0x8A, 0xA0, 0xBA, 0x86, 0xB3, 0xA6, 0xB2, 0x9A, 0xA5, 0xB1, 0x48, 0xA8, 0xA2
+005038 d51f
+005039 f050
+00503a ca03
+00503b f910
+00503c cca9
+00503d 5095
+00503e 488a
+00503f b0a6              .db 0x1F, 0xD5, 0x50, 0xF0, 0x03, 0xCA, 0x10, 0xF9, 0xA9, 0xCC, 0x95, 0x50, 0x8A, 0x48, 0xA6, 0xB0
+005040 50b5
+005041 5094
+005042 8a48
+005043 a548
+005044 48b6
+005045 86ba
+005046 a6b2
+005047 9ab3              .db 0xB5, 0x50, 0x94, 0x50, 0x48, 0x8A, 0x48, 0xA5, 0xB6, 0x48, 0xBA, 0x86, 0xB2, 0xA6, 0xB3, 0x9A
+005048 a460
+005049 ece4
+00504a a457
+00504b 04d0
+00504c 00a9
+00504d 0af0
+00504e e3a6
+00504f 06d0              .db 0x60, 0xA4, 0xE4, 0xEC, 0x57, 0xA4, 0xD0, 0x04, 0xA9, 0x00, 0xF0, 0x0A, 0xA6, 0xE3, 0xD0, 0x06
+005050 eea6
+005051 02d0
+005052 ffa9
+005053 04a2
+005054 b586
+005055 fac5
+005056 0c90
+005057 0af0              .db 0xA6, 0xEE, 0xD0, 0x02, 0xA9, 0xFF, 0xA2, 0x04, 0x86, 0xB5, 0xC5, 0xFA, 0x90, 0x0C, 0xF0, 0x0A
+005058 fa85
+005059 b0a5
+00505a fb85
+00505b b1a5
+00505c f985
+00505d 2ea9
+00505e f44c
+00505f a6a4              .db 0x85, 0xFA, 0xA5, 0xB0, 0x85, 0xFB, 0xA5, 0xB1, 0x85, 0xF9, 0xA9, 0x2E, 0x4C, 0xF4, 0xA4, 0xA6
+005060 30dc
+005061 a51c
+005062 ddf9
+005063 a467
+005064 11d0
+005065 bdca
+005066 a467
+005067 fb85              .db 0xDC, 0x30, 0x1C, 0xA5, 0xF9, 0xDD, 0x67, 0xA4, 0xD0, 0x11, 0xCA, 0xBD, 0x67, 0xA4, 0x85, 0xFB
+005068 bdca
+005069 a467
+00506a f985
+00506b 86ca
+00506c d0dc
+00506d a91c
+00506e 85ff
+00506f a2dc              .db 0xCA, 0xBD, 0x67, 0xA4, 0x85, 0xF9, 0xCA, 0x86, 0xDC, 0xD0, 0x1C, 0xA9, 0xFF, 0x85, 0xDC, 0xA2
+005070 860c
+005071 86b5
+005072 a2fa
+005073 2014
+005074 9f1b
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+005263 a904
+005264 8d59
+005265 040b
+005266 e6a9
+005267 0c8d              .db 0x07, 0x04, 0xA9, 0xA4, 0x8D, 0x08, 0x04, 0xA9, 0x59, 0x8D, 0x0B, 0x04, 0xA9, 0xE6, 0x8D, 0x0C
+005268 a904
+005269 8d82
+00526a 0409
+00526b e6a9
+00526c 0a8d
+00526d 6004
+00526e c0ad
+00526f 293f              .db 0x04, 0xA9, 0x82, 0x8D, 0x09, 0x04, 0xA9, 0xE6, 0x8D, 0x0A, 0x04, 0x60, 0xAD, 0xC0, 0x3F, 0x29
+005270 f080
+005271 adf9
+005272 3fc6
+005273 1860
+005274 c0ad
+005275 293f
+005276 f080
+005277 ad04              .db 0x80, 0xF0, 0xF9, 0xAD, 0xC6, 0x3F, 0x60, 0x18, 0xAD, 0xC0, 0x3F, 0x29, 0x80, 0xF0, 0x04, 0xAD
+005278 3fc6
+005279 6038
+00527a ad48
+00527b 3fc0
+00527c 2029
+00527d f9f0
+00527e 8d68
+00527f 3fc6              .db 0xC6, 0x3F, 0x38, 0x60, 0x48, 0xAD, 0xC0, 0x3F, 0x29, 0x20, 0xF0, 0xF9, 0x68, 0x8D, 0xC6, 0x3F
+005280 a960
+005281 200d
+005282 a4f4
+005283 0aa9
+005284 ea80
+005285 e720
+005286 90a4
+005287 c905              .db 0x60, 0xA9, 0x0D, 0x20, 0xF4, 0xA4, 0xA9, 0x0A, 0x80, 0xEA, 0x20, 0xE7, 0xA4, 0x90, 0x05, 0xC9
+005288 f003
+005289 1801
+00528a 0060
+00528b 0000
+00528c 0000
+00528d 0000
+00528e 0000
+00528f 0000              .db 0x03, 0xF0, 0x01, 0x18, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+005290 0000
+005291 0000
+005292 0000
+005293 0000
+005294 0000
+005295 0000
+005296 0000
+005297 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+005298 0000
+005299 0000
+00529a 0000
+00529b 0000
+00529c 0000
+00529d 0000
+00529e 0000
+00529f 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0052a0 0000
+0052a1 0000
+0052a2 0000
+0052a3 0000
+0052a4 0000
+0052a5 0000
+0052a6 0000
+0052a7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0052a8 0000
+0052a9 0000
+0052aa 0000
+0052ab 0000
+0052ac 0000
+0052ad 0000
+0052ae 0000
+0052af 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0052b0 0000
+0052b1 0000
+0052b2 0000
+0052b3 0000
+0052b4 0000
+0052b5 0000
+0052b6 0000
+0052b7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0052b8 0000
+0052b9 0000
+0052ba 0000
+0052bb 0000
+0052bc 0000
+0052bd 0000
+0052be 0000
+0052bf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0052c0 0000
+0052c1 0000
+0052c2 0000
+0052c3 0000
+0052c4 0000
+0052c5 0000
+0052c6 0000
+0052c7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0052c8 0000
+0052c9 0000
+0052ca 0000
+0052cb 0000
+0052cc 0000
+0052cd 0000
+0052ce 0000
+0052cf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0052d0 0000
+0052d1 0000
+0052d2 0000
+0052d3 0000
+0052d4 0000
+0052d5 0000
+0052d6 0000
+0052d7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0052d8 0000
+0052d9 0000
+0052da 0000
+0052db 0000
+0052dc 0000
+0052dd 0000
+0052de 0000
+0052df 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0052e0 0000
+0052e1 0000
+0052e2 0000
+0052e3 0000
+0052e4 0000
+0052e5 0000
+0052e6 0000
+0052e7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0052e8 0000
+0052e9 0000
+0052ea 0000
+0052eb 0000
+0052ec 0000
+0052ed 0000
+0052ee 0000
+0052ef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0052f0 0000
+0052f1 0000
+0052f2 0000
+0052f3 0000
+0052f4 0000
+0052f5 0000
+0052f6 0000
+0052f7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0052f8 0000
+0052f9 0000
+0052fa 0000
+0052fb 0000
+0052fc 0000
+0052fd 0000
+0052fe 0000
+0052ff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+005300 4cea
+005301 13ba
+005302 4cea
+005303 13ca
+005304 0004
+005305 5ed2
+005306 1b5a
+005307 007f              .db 0xEA, 0x4C, 0xBA, 0x13, 0xEA, 0x4C, 0xCA, 0x13, 0x04, 0x00, 0xD2, 0x5E, 0x5A, 0x1B, 0x7F, 0x00
+005308 3e80
+005309 009f
+00530a 01ff
+00530b 0100
+00530c 001f
+00530d 0001
+00530e 1b65
+00530f 1b65              .db 0x80, 0x3E, 0x9F, 0x00, 0xFF, 0x01, 0x00, 0x01, 0x1F, 0x00, 0x01, 0x00, 0x65, 0x1B, 0x65, 0x1B
+005310 1331
+005311 eaea
+005312 4c83
+005313 d449
+005314 0000
+005315 042c
+005316 afb1
+005317 e648              .db 0x31, 0x13, 0xEA, 0xEA, 0x83, 0x4C, 0x49, 0xD4, 0x00, 0x00, 0x2C, 0x04, 0xB1, 0xAF, 0x48, 0xE6
+005318 d0af
+005319 e602
+00531a b1b0
+00531b e6af
+00531c d0af
+00531d e602
+00531e cab0
+00531f 95ca              .db 0xAF, 0xD0, 0x02, 0xE6, 0xB0, 0xB1, 0xAF, 0xE6, 0xAF, 0xD0, 0x02, 0xE6, 0xB0, 0xCA, 0xCA, 0x95
+005320 6801
+005321 0095
+005322 01a0
+005323 afb1
+005324 b385
+005325 b188
+005326 85af
+005327 18b2              .db 0x01, 0x68, 0x95, 0x00, 0xA0, 0x01, 0xB1, 0xAF, 0x85, 0xB3, 0x88, 0xB1, 0xAF, 0x85, 0xB2, 0x18
+005328 afa5
+005329 0269
+00532a af85
+00532b 0290
+00532c b0e6
+00532d b14c
+00532e 8400
+00532f 4c43              .db 0xA5, 0xAF, 0x69, 0x02, 0x85, 0xAF, 0x90, 0x02, 0xE6, 0xB0, 0x4C, 0xB1, 0x00, 0x84, 0x43, 0x4C
+005330 d449
+005331 0424
+005332 0466
+005333 afb1
+005334 9848
+005335 cbf0
+005336 850a
+005337 b5a6              .db 0x49, 0xD4, 0x24, 0x04, 0x66, 0x04, 0xB1, 0xAF, 0x48, 0x98, 0xF0, 0xCB, 0x0A, 0x85, 0xA6, 0xB5
+005338 9900
+005339 00a7
+00533a c8e8
+00533b a6c4
+00533c f5d0
+00533d 00a0
+00533e 8760
+00533f 5845              .db 0x00, 0x99, 0xA7, 0x00, 0xE8, 0xC8, 0xC4, 0xA6, 0xD0, 0xF5, 0xA0, 0x00, 0x60, 0x87, 0x45, 0x58
+005340 4345
+005341 5455
+005342 5dc5
+005343 8904
+005344 b504
+005345 8500
+005346 b5b2
+005347 8501              .db 0x45, 0x43, 0x55, 0x54, 0xC5, 0x5D, 0x04, 0x89, 0x04, 0xB5, 0x00, 0x85, 0xB2, 0xB5, 0x01, 0x85
+005348 e8b3
+005349 4ce8
+00534a 00b1
+00534b 4286
+00534c 4152
+00534d 434e
+00534e 7dc8
+00534f a104              .db 0xB3, 0xE8, 0xE8, 0x4C, 0xB1, 0x00, 0x86, 0x42, 0x52, 0x41, 0x4E, 0x43, 0xC8, 0x7D, 0x04, 0xA1
+005350 1804
+005351 afb1
+005352 af65
+005353 c848
+005354 afb1
+005355 b065
+005356 b085
+005357 8568              .db 0x04, 0x18, 0xB1, 0xAF, 0x65, 0xAF, 0x48, 0xC8, 0xB1, 0xAF, 0x65, 0xB0, 0x85, 0xB0, 0x68, 0x85
+005358 4caf
+005359 0446
+00535a 3087
+00535b 5242
+00535c 4e41
+00535d c843
+00535e 0496
+00535f 04c0              .db 0xAF, 0x4C, 0x46, 0x04, 0x87, 0x30, 0x42, 0x52, 0x41, 0x4E, 0x43, 0xC8, 0x96, 0x04, 0xC0, 0x04
+005360 e8e8
+005361 feb5
+005362 ff15
+005363 d9f0
+005364 a518
+005365 69af
+005366 8502
+005367 90af              .db 0xE8, 0xE8, 0xB5, 0xFE, 0x15, 0xFF, 0xF0, 0xD9, 0x18, 0xA5, 0xAF, 0x69, 0x02, 0x85, 0xAF, 0x90
+005368 e602
+005369 4cb0
+00536a 0444
+00536b 2886
+00536c 4f4c
+00536d 504f
+00536e b4a9
+00536f e104              .db 0x02, 0xE6, 0xB0, 0x4C, 0x44, 0x04, 0x86, 0x28, 0x4C, 0x4F, 0x4F, 0x50, 0xA9, 0xB4, 0x04, 0xE1
+005370 8604
+005371 bab6
+005372 01fe
+005373 d001
+005374 fe03
+005375 0102
+005376 bd18
+005377 0103              .db 0x04, 0x86, 0xB6, 0xBA, 0xFE, 0x01, 0x01, 0xD0, 0x03, 0xFE, 0x02, 0x01, 0x18, 0xBD, 0x03, 0x01
+005378 01fd
+005379 bd01
+00537a 0104
+00537b 02fd
+00537c a601
+00537d 0ab6
+00537e a390
+00537f 6868              .db 0xFD, 0x01, 0x01, 0xBD, 0x04, 0x01, 0xFD, 0x02, 0x01, 0xA6, 0xB6, 0x0A, 0x90, 0xA3, 0x68, 0x68
+005380 6868
+005381 c84c
+005382 8704
+005383 2b28
+005384 4f4c
+005385 504f
+005386 d6a9
+005387 1104              .db 0x68, 0x68, 0x4C, 0xC8, 0x04, 0x87, 0x28, 0x2B, 0x4C, 0x4F, 0x4F, 0x50, 0xA9, 0xD6, 0x04, 0x11
+005388 e805
+005389 86e8
+00538a b5b6
+00538b 48ff
+00538c b548
+00538d bafe
+00538e e8e8
+00538f 7d18              .db 0x05, 0xE8, 0xE8, 0x86, 0xB6, 0xB5, 0xFF, 0x48, 0x48, 0xB5, 0xFE, 0xBA, 0xE8, 0xE8, 0x18, 0x7D
+005390 0101
+005391 019d
+005392 6801
+005393 027d
+005394 9d01
+005395 0102
+005396 1068
+005397 18bd              .db 0x01, 0x01, 0x9D, 0x01, 0x01, 0x68, 0x7D, 0x02, 0x01, 0x9D, 0x02, 0x01, 0x68, 0x10, 0xBD, 0x18
+005398 01bd
+005399 fd01
+00539a 0103
+00539b 02bd
+00539c fd01
+00539d 0104
+00539e f94c
+00539f 8404              .db 0xBD, 0x01, 0x01, 0xFD, 0x03, 0x01, 0xBD, 0x02, 0x01, 0xFD, 0x04, 0x01, 0x4C, 0xF9, 0x04, 0x84
+0053a0 4428
+0053a1 a94f
+0053a2 0505
+0053a3 0548
+0053a4 03b5
+0053a5 b548
+0053a6 4802
+0053a7 01b5              .db 0x28, 0x44, 0x4F, 0xA9, 0x05, 0x05, 0x48, 0x05, 0xB5, 0x03, 0x48, 0xB5, 0x02, 0x48, 0xB5, 0x01
+0053a8 b548
+0053a9 4800
+0053aa e8e8
+0053ab e8e8
+0053ac 444c
+0053ad 8104
+0053ae 3fc9
+0053af d505              .db 0x48, 0xB5, 0x00, 0x48, 0xE8, 0xE8, 0xE8, 0xE8, 0x4C, 0x44, 0x04, 0x81, 0xC9, 0x3F, 0x05, 0xD5
+0053b0 8507
+0053b1 4944
+0053b2 4947
+0053b3 5bd4
+0053b4 6b05
+0053b5 3805
+0053b6 02b5
+0053b7 30e9              .db 0x07, 0x85, 0x44, 0x49, 0x47, 0x49, 0xD4, 0x5B, 0x05, 0x6B, 0x05, 0x38, 0xB5, 0x02, 0xE9, 0x30
+0053b8 1830
+0053b9 0ac9
+0053ba 0730
+0053bb e938
+0053bc c907
+0053bd 300a
+0053be d50d
+0053bf 1000              .db 0x30, 0x18, 0xC9, 0x0A, 0x30, 0x07, 0x38, 0xE9, 0x07, 0xC9, 0x0A, 0x30, 0x0D, 0xD5, 0x00, 0x10
+0053c0 9509
+0053c1 a902
+0053c2 4801
+0053c3 4c98
+0053c4 043f
+0053c5 4898
+0053c6 e8e8
+0053c7 3f4c              .db 0x09, 0x95, 0x02, 0xA9, 0x01, 0x48, 0x98, 0x4C, 0x3F, 0x04, 0x98, 0x48, 0xE8, 0xE8, 0x4C, 0x3F
+0053c8 8604
+0053c9 4628
+0053ca 4e49
+0053cb a944
+0053cc 0561
+0053cd 059c
+0053ce 02a9
+0053cf 6c20              .db 0x04, 0x86, 0x28, 0x46, 0x49, 0x4E, 0x44, 0xA9, 0x61, 0x05, 0x9C, 0x05, 0xA9, 0x02, 0x20, 0x6C
+0053d0 8604
+0053d1 a0b6
+0053d2 b100
+0053d3 51a7
+0053d4 29a9
+0053d5 d03f
+0053d6 c82d
+0053d7 a7b1              .db 0x04, 0x86, 0xB6, 0xA0, 0x00, 0xB1, 0xA7, 0x51, 0xA9, 0x29, 0x3F, 0xD0, 0x2D, 0xC8, 0xB1, 0xA7
+0053d8 a951
+0053d9 d00a
+0053da 9023
+0053db a6f6
+0053dc cab6
+0053dd caca
+0053de 18ca
+0053df 6998              .db 0x51, 0xA9, 0x0A, 0xD0, 0x23, 0x90, 0xF6, 0xA6, 0xB6, 0xCA, 0xCA, 0xCA, 0xCA, 0x18, 0x98, 0x69
+0053e0 6505
+0053e1 95a7
+0053e2 a002
+0053e3 9800
+0053e4 a865
+0053e5 0395
+0053e6 0194
+0053e7 a7b1              .db 0x05, 0x65, 0xA7, 0x95, 0x02, 0xA0, 0x00, 0x98, 0x65, 0xA8, 0x95, 0x03, 0x94, 0x01, 0xB1, 0xA7
+0053e8 0095
+0053e9 01a9
+0053ea 4c48
+0053eb 043d
+0053ec 05b0
+0053ed b1c8
+0053ee 10a7
+0053ef c8fb              .db 0x95, 0x00, 0xA9, 0x01, 0x48, 0x4C, 0x3D, 0x04, 0xB0, 0x05, 0xC8, 0xB1, 0xA7, 0x10, 0xFB, 0xC8
+0053f0 a7b1
+0053f1 c8aa
+0053f2 a7b1
+0053f3 a885
+0053f4 a786
+0053f5 a705
+0053f6 b5d0
+0053f7 b6a6              .db 0xB1, 0xA7, 0xAA, 0xC8, 0xB1, 0xA7, 0x85, 0xA8, 0x86, 0xA7, 0x05, 0xA7, 0xD0, 0xB5, 0xA6, 0xB6
+0053f8 00a9
+0053f9 4c48
+0053fa 043d
+0053fb 4587
+0053fc 434e
+0053fd 4f4c
+0053fe c553
+0053ff 0591              .db 0xA9, 0x00, 0x48, 0x4C, 0x3D, 0x04, 0x87, 0x45, 0x4E, 0x43, 0x4C, 0x4F, 0x53, 0xC5, 0x91, 0x05
+005400 0602
+005401 02a9
+005402 6c20
+005403 8a04
+005404 e938
+005405 aa08
+005406 0394
+005407 0194              .db 0x02, 0x06, 0xA9, 0x02, 0x20, 0x6C, 0x04, 0x8A, 0x38, 0xE9, 0x08, 0xAA, 0x94, 0x03, 0x94, 0x01
+005408 c888
+005409 a9b1
+00540a a7c5
+00540b f9f0
+00540c 0494
+00540d a9b1
+00540e 0ed0
+00540f 0294              .db 0x88, 0xC8, 0xB1, 0xA9, 0xC5, 0xA7, 0xF0, 0xF9, 0x94, 0x04, 0xB1, 0xA9, 0xD0, 0x0E, 0x94, 0x02
+005410 0094
+005411 d598
+005412 d004
+005413 f602
+005414 4c02
+005415 0444
+005416 0294
+005417 c5c8              .db 0x94, 0x00, 0x98, 0xD5, 0x04, 0xD0, 0x02, 0xF6, 0x02, 0x4C, 0x44, 0x04, 0x94, 0x02, 0xC8, 0xC5
+005418 d0a7
+005419 94e7
+00541a 4c00
+00541b 0444
+00541c 4584
+00541d 494d
+00541e f6d4
+00541f 6405              .db 0xA7, 0xD0, 0xE7, 0x94, 0x00, 0x4C, 0x44, 0x04, 0x84, 0x45, 0x4D, 0x49, 0xD4, 0xF6, 0x05, 0x64
+005420 8317
+005421 454b
+005422 38d9
+005423 6c06
+005424 8917
+005425 543f
+005426 5245
+005427 494d              .db 0x17, 0x83, 0x4B, 0x45, 0xD9, 0x38, 0x06, 0x6C, 0x17, 0x89, 0x3F, 0x54, 0x45, 0x52, 0x4D, 0x49
+005428 414e
+005429 41cc
+00542a 7206
+00542b 8217
+00542c d243
+00542d 0649
+00542e 177b
+00542f 4385              .db 0x4E, 0x41, 0xCC, 0x41, 0x06, 0x72, 0x17, 0x82, 0x43, 0xD2, 0x49, 0x06, 0x7B, 0x17, 0x85, 0x43
+005430 4f4d
+005431 c556
+005432 0657
+005433 0668
+005434 03a9
+005435 6c20
+005436 c404
+005437 d0a7              .db 0x4D, 0x4F, 0x56, 0xC5, 0x57, 0x06, 0x68, 0x06, 0xA9, 0x03, 0x20, 0x6C, 0x04, 0xC4, 0xA7, 0xD0
+005438 c607
+005439 10a8
+00543a 4c03
+00543b 0444
+00543c abb1
+00543d a991
+00543e d0c8
+00543f e6ee              .db 0x07, 0xC6, 0xA8, 0x10, 0x03, 0x4C, 0x44, 0x04, 0xB1, 0xAB, 0x91, 0xA9, 0xC8, 0xD0, 0xEE, 0xE6
+005440 e6ac
+005441 4caa
+005442 066d
+005443 5582
+005444 5eaa
+005445 8d06
+005446 a906
+005447 8500              .db 0xAC, 0xE6, 0xAA, 0x4C, 0x6D, 0x06, 0x82, 0x55, 0xAA, 0x5E, 0x06, 0x8D, 0x06, 0xA9, 0x00, 0x85
+005448 a0a7
+005449 5610
+00544a 7603
+00544b 9002
+00544c 180d
+00544d a885
+00544e a7a5
+00544f 0075              .db 0xA7, 0xA0, 0x10, 0x56, 0x03, 0x76, 0x02, 0x90, 0x0D, 0x18, 0x85, 0xA8, 0xA5, 0xA7, 0x75, 0x00
+005450 a785
+005451 a8a5
+005452 0175
+005453 666a
+005454 76a7
+005455 7603
+005456 8802
+005457 e7d0              .db 0x85, 0xA7, 0xA5, 0xA8, 0x75, 0x01, 0x6A, 0x66, 0xA7, 0x76, 0x03, 0x76, 0x02, 0x88, 0xD0, 0xE7
+005458 0195
+005459 a7a5
+00545a 0095
+00545b 444c
+00545c 8204
+00545d af55
+00545e 0686
+00545f 06c0              .db 0x95, 0x01, 0xA5, 0xA7, 0x95, 0x00, 0x4C, 0x44, 0x04, 0x82, 0x55, 0xAF, 0x86, 0x06, 0xC0, 0x06
+005460 b538
+005461 f502
+005462 b500
+005463 f503
+005464 b001
+005465 a92e
+005466 8511
+005467 36a7              .db 0x38, 0xB5, 0x02, 0xF5, 0x00, 0xB5, 0x03, 0xF5, 0x01, 0xB0, 0x2E, 0xA9, 0x11, 0x85, 0xA7, 0x36
+005468 3604
+005469 c605
+00546a f0a7
+00546b 362c
+00546c 3602
+00546d 6403
+00546e 26a8
+00546f 38a8              .db 0x04, 0x36, 0x05, 0xC6, 0xA7, 0xF0, 0x2C, 0x36, 0x02, 0x36, 0x03, 0x64, 0xA8, 0x26, 0xA8, 0x38
+005470 02b5
+005471 00f5
+005472 a985
+005473 03b5
+005474 01f5
+005475 a5a8
+005476 e9a8
+005477 9000              .db 0xB5, 0x02, 0xF5, 0x00, 0x85, 0xA9, 0xB5, 0x03, 0xF5, 0x01, 0xA8, 0xA5, 0xA8, 0xE9, 0x00, 0x90
+005478 a5de
+005479 95a9
+00547a 9402
+00547b 8003
+00547c a9d6
+00547d 95ff
+00547e 9502
+00547f 9503              .db 0xDE, 0xA5, 0xA9, 0x95, 0x02, 0x94, 0x03, 0x80, 0xD6, 0xA9, 0xFF, 0x95, 0x02, 0x95, 0x03, 0x95
+005480 9504
+005481 e805
+005482 4ce8
+005483 089a
+005484 4183
+005485 c44e
+005486 06b9
+005487 0710              .db 0x04, 0x95, 0x05, 0xE8, 0xE8, 0x4C, 0x9A, 0x08, 0x83, 0x41, 0x4E, 0xC4, 0xB9, 0x06, 0x10, 0x07
+005488 00b5
+005489 0235
+00548a b548
+00548b 3501
+00548c e803
+00548d 4ce8
+00548e 043f
+00548f 4f82              .db 0xB5, 0x00, 0x35, 0x02, 0x48, 0xB5, 0x01, 0x35, 0x03, 0xE8, 0xE8, 0x4C, 0x3F, 0x04, 0x82, 0x4F
+005490 08d2
+005491 2507
+005492 b507
+005493 1500
+005494 4802
+005495 01b5
+005496 0315
+005497 e8e8              .db 0xD2, 0x08, 0x07, 0x25, 0x07, 0xB5, 0x00, 0x15, 0x02, 0x48, 0xB5, 0x01, 0x15, 0x03, 0xE8, 0xE8
+005498 3f4c
+005499 8304
+00549a 4f58
+00549b 1ed2
+00549c 3b07
+00549d b507
+00549e 5500
+00549f 4802              .db 0x4C, 0x3F, 0x04, 0x83, 0x58, 0x4F, 0xD2, 0x1E, 0x07, 0x3B, 0x07, 0xB5, 0x00, 0x55, 0x02, 0x48
+0054a0 01b5
+0054a1 0355
+0054a2 e8e8
+0054a3 3f4c
+0054a4 8304
+0054a5 5053
+0054a6 33c0
+0054a7 5107              .db 0xB5, 0x01, 0x55, 0x03, 0xE8, 0xE8, 0x4C, 0x3F, 0x04, 0x83, 0x53, 0x50, 0xC0, 0x33, 0x07, 0x51
+0054a8 8a07
+0054a9 a948
+0054aa 4c00
+0054ab 043d
+0054ac 5383
+0054ad a150
+0054ae 0749
+0054af 0760              .db 0x07, 0x8A, 0x48, 0xA9, 0x00, 0x4C, 0x3D, 0x04, 0x83, 0x53, 0x50, 0xA1, 0x49, 0x07, 0x60, 0x07
+0054b0 06a0
+0054b1 b4b1
+0054b2 4caa
+0054b3 0444
+0054b4 5283
+0054b5 a150
+0054b6 0758
+0054b7 0770              .db 0xA0, 0x06, 0xB1, 0xB4, 0xAA, 0x4C, 0x44, 0x04, 0x83, 0x52, 0x50, 0xA1, 0x58, 0x07, 0x70, 0x07
+0054b8 b686
+0054b9 08a0
+0054ba b4b1
+0054bb 9aaa
+0054bc b6a6
+0054bd 444c
+0054be 8204
+0054bf d33b              .db 0x86, 0xB6, 0xA0, 0x08, 0xB1, 0xB4, 0xAA, 0x9A, 0xA6, 0xB6, 0x4C, 0x44, 0x04, 0x82, 0x3B, 0xD3
+0054c0 0768
+0054c1 0784
+0054c2 8568
+0054c3 68af
+0054c4 b085
+0054c5 444c
+0054c6 8504
+0054c7 454c              .db 0x68, 0x07, 0x84, 0x07, 0x68, 0x85, 0xAF, 0x68, 0x85, 0xB0, 0x4C, 0x44, 0x04, 0x85, 0x4C, 0x45
+0054c8 5641
+0054c9 7dc5
+0054ca 9707
+0054cb 8607
+0054cc bab6
+0054cd 01bd
+0054ce 9d01
+0054cf 0103              .db 0x41, 0x56, 0xC5, 0x7D, 0x07, 0x97, 0x07, 0x86, 0xB6, 0xBA, 0xBD, 0x01, 0x01, 0x9D, 0x03, 0x01
+0054d0 02bd
+0054d1 9d01
+0054d2 0104
+0054d3 b6a6
+0054d4 444c
+0054d5 8204
+0054d6 d23e
+0054d7 078d              .db 0xBD, 0x02, 0x01, 0x9D, 0x04, 0x01, 0xA6, 0xB6, 0x4C, 0x44, 0x04, 0x82, 0x3E, 0xD2, 0x8D, 0x07
+0054d8 07b2
+0054d9 01b5
+0054da b548
+0054db 4800
+0054dc e8e8
+0054dd 444c
+0054de 8204
+0054df be52              .db 0xB2, 0x07, 0xB5, 0x01, 0x48, 0xB5, 0x00, 0x48, 0xE8, 0xE8, 0x4C, 0x44, 0x04, 0x82, 0x52, 0xBE
+0054e0 07ab
+0054e1 07c4
+0054e2 caca
+0054e3 9568
+0054e4 6800
+0054e5 0195
+0054e6 444c
+0054e7 8104              .db 0xAB, 0x07, 0xC4, 0x07, 0xCA, 0xCA, 0x68, 0x95, 0x00, 0x68, 0x95, 0x01, 0x4C, 0x44, 0x04, 0x81
+0054e8 bdd2
+0054e9 d507
+0054ea 8607
+0054eb bab6
+0054ec 01bd
+0054ed 4801
+0054ee 02bd
+0054ef a601              .db 0xD2, 0xBD, 0x07, 0xD5, 0x07, 0x86, 0xB6, 0xBA, 0xBD, 0x01, 0x01, 0x48, 0xBD, 0x02, 0x01, 0xA6
+0054f0 4cb6
+0054f1 043d
+0054f2 3082
+0054f3 cfbd
+0054f4 eb07
+0054f5 b507
+0054f6 9401
+0054f7 1501              .db 0xB6, 0x4C, 0x3D, 0x04, 0x82, 0x30, 0xBD, 0xCF, 0x07, 0xEB, 0x07, 0xB5, 0x01, 0x94, 0x01, 0x15
+0054f8 d000
+0054f9 c801
+0054fa 0094
+0054fb 444c
+0054fc 8204
+0054fd bc30
+0054fe 07e4
+0054ff 0800              .db 0x00, 0xD0, 0x01, 0xC8, 0x94, 0x00, 0x4C, 0x44, 0x04, 0x82, 0x30, 0xBC, 0xE4, 0x07, 0x00, 0x08
+005500 0116
+005501 2a98
+005502 0194
+005503 0095
+005504 444c
+005505 8104
+005506 f9ab
+005507 1107              .db 0x16, 0x01, 0x98, 0x2A, 0x94, 0x01, 0x95, 0x00, 0x4C, 0x44, 0x04, 0x81, 0xAB, 0xF9, 0x07, 0x11
+005508 1808
+005509 00b5
+00550a 0275
+00550b 0295
+00550c 01b5
+00550d 0375
+00550e 0395
+00550f e8e8              .db 0x08, 0x18, 0xB5, 0x00, 0x75, 0x02, 0x95, 0x02, 0xB5, 0x01, 0x75, 0x03, 0x95, 0x03, 0xE8, 0xE8
+005510 444c
+005511 8204
+005512 ab44
+005513 080b
+005514 082a
+005515 b518
+005516 7502
+005517 9506              .db 0x4C, 0x44, 0x04, 0x82, 0x44, 0xAB, 0x0B, 0x08, 0x2A, 0x08, 0x18, 0xB5, 0x02, 0x75, 0x06, 0x95
+005518 b506
+005519 7503
+00551a 9507
+00551b b507
+00551c 7500
+00551d 9504
+00551e b504
+00551f 7501              .db 0x06, 0xB5, 0x03, 0x75, 0x07, 0x95, 0x07, 0xB5, 0x00, 0x75, 0x04, 0x95, 0x04, 0xB5, 0x01, 0x75
+005520 9505
+005521 4c05
+005522 0554
+005523 4d85
+005524 4e49
+005525 d355
+005526 0823
+005527 0850              .db 0x05, 0x95, 0x05, 0x4C, 0x54, 0x05, 0x85, 0x4D, 0x49, 0x4E, 0x55, 0xD3, 0x23, 0x08, 0x50, 0x08
+005528 9838
+005529 00f5
+00552a 0095
+00552b f598
+00552c 9501
+00552d 4c01
+00552e 0444
+00552f 4486              .db 0x38, 0x98, 0xF5, 0x00, 0x95, 0x00, 0x98, 0xF5, 0x01, 0x95, 0x01, 0x4C, 0x44, 0x04, 0x86, 0x44
+005530 494d
+005531 554e
+005532 46d3
+005533 6908
+005534 3808
+005535 f598
+005536 9502
+005537 9802              .db 0x4D, 0x49, 0x4E, 0x55, 0xD3, 0x46, 0x08, 0x69, 0x08, 0x38, 0x98, 0xF5, 0x02, 0x95, 0x02, 0x98
+005538 03f5
+005539 0395
+00553a 514c
+00553b 8408
+00553c 564f
+00553d d245
+00553e 085e
+00553f 0880              .db 0xF5, 0x03, 0x95, 0x03, 0x4C, 0x51, 0x08, 0x84, 0x4F, 0x56, 0x45, 0xD2, 0x5E, 0x08, 0x80, 0x08
+005540 02b5
+005541 b548
+005542 4c03
+005543 043d
+005544 4484
+005545 4f52
+005546 77d0
+005547 5608              .db 0xB5, 0x02, 0x48, 0xB5, 0x03, 0x4C, 0x3D, 0x04, 0x84, 0x44, 0x52, 0x4F, 0xD0, 0x77, 0x08, 0x56
+005548 8405
+005549 5753
+00554a d041
+00554b 0888
+00554c 089a
+00554d 02b5
+00554e b548
+00554f 9500              .db 0x05, 0x84, 0x53, 0x57, 0x41, 0xD0, 0x88, 0x08, 0x9A, 0x08, 0xB5, 0x02, 0x48, 0xB5, 0x00, 0x95
+005550 b502
+005551 b403
+005552 9401
+005553 4c03
+005554 043f
+005555 4483
+005556 d055
+005557 0891              .db 0x02, 0xB5, 0x03, 0xB4, 0x01, 0x94, 0x03, 0x4C, 0x3F, 0x04, 0x83, 0x44, 0x55, 0xD0, 0x91, 0x08
+005558 08b2
+005559 00b5
+00555a b548
+00555b 4c01
+00555c 043d
+00555d 2b82
+00555e aaa1
+00555f c108              .db 0xB2, 0x08, 0xB5, 0x00, 0x48, 0xB5, 0x01, 0x4C, 0x3D, 0x04, 0x82, 0x2B, 0xA1, 0xAA, 0x08, 0xC1
+005560 1808
+005561 00a1
+005562 0275
+005563 0081
+005564 00f6
+005565 02d0
+005566 01f6
+005567 00a1              .db 0x08, 0x18, 0xA1, 0x00, 0x75, 0x02, 0x81, 0x00, 0xF6, 0x00, 0xD0, 0x02, 0xF6, 0x01, 0xA1, 0x00
+005568 0375
+005569 0081
+00556a 544c
+00556b 8105
+00556c 4f54
+00556d 4747
+00556e c54c
+00556f 08ba              .db 0x75, 0x03, 0x81, 0x00, 0x4C, 0x54, 0x05, 0x81, 0x54, 0x4F, 0x47, 0x47, 0x4C, 0xC5, 0xBA, 0x08
+005570 08e2
+005571 02a1
+005572 0055
+005573 0281
+005574 544c
+005575 8105
+005576 d7c0
+005577 f108              .db 0xE2, 0x08, 0xA1, 0x02, 0x55, 0x00, 0x81, 0x02, 0x4C, 0x54, 0x05, 0x81, 0xC0, 0xD7, 0x08, 0xF1
+005578 a108
+005579 4800
+00557a 00f6
+00557b 02d0
+00557c 01f6
+00557d 00a1
+00557e 3f4c
+00557f 8204              .db 0x08, 0xA1, 0x00, 0x48, 0xF6, 0x00, 0xD0, 0x02, 0xF6, 0x01, 0xA1, 0x00, 0x4C, 0x3F, 0x04, 0x82
+005580 c043
+005581 08eb
+005582 0906
+005583 00a1
+005584 0095
+005585 0194
+005586 444c
+005587 8104              .db 0x43, 0xC0, 0xEB, 0x08, 0x06, 0x09, 0xA1, 0x00, 0x95, 0x00, 0x94, 0x01, 0x4C, 0x44, 0x04, 0x81
+005588 ffa1
+005589 1508
+00558a b509
+00558b 8102
+00558c f600
+00558d d000
+00558e f602
+00558f b501              .db 0xA1, 0xFF, 0x08, 0x15, 0x09, 0xB5, 0x02, 0x81, 0x00, 0xF6, 0x00, 0xD0, 0x02, 0xF6, 0x01, 0xB5
+005590 8103
+005591 4c00
+005592 0554
+005593 4382
+005594 0fa1
+005595 2d09
+005596 b509
+005597 8102              .db 0x03, 0x81, 0x00, 0x4C, 0x54, 0x05, 0x82, 0x43, 0xA1, 0x0F, 0x09, 0x2D, 0x09, 0xB5, 0x02, 0x81
+005598 4c00
+005599 0554
+00559a bac1
+00559b 0926
+00559c 094c
+00559d 0cb5
+00559e 0c71
+00559f 0acb              .db 0x00, 0x4C, 0x54, 0x05, 0xC1, 0xBA, 0x26, 0x09, 0x4C, 0x09, 0xB5, 0x0C, 0x71, 0x0C, 0xCB, 0x0A
+0055a0 08ef
+0055a1 0abe
+0055a2 0913
+0055a3 11a9
+0055a4 0d36
+0055a5 0d85
+0055a6 b0a5
+0055a7 a548              .db 0xEF, 0x08, 0xBE, 0x0A, 0x13, 0x09, 0xA9, 0x11, 0x36, 0x0D, 0x85, 0x0D, 0xA5, 0xB0, 0x48, 0xA5
+0055a8 48af
+0055a9 a518
+0055aa 69b2
+0055ab 8502
+0055ac 98af
+0055ad b365
+0055ae b085
+0055af 444c              .db 0xAF, 0x48, 0x18, 0xA5, 0xB2, 0x69, 0x02, 0x85, 0xAF, 0x98, 0x65, 0xB3, 0x85, 0xB0, 0x4C, 0x44
+0055b0 c104
+0055b1 34bb
+0055b2 4c09
+0055b3 dd09
+0055b4 120c
+0055b5 820d
+0055b6 4a07
+0055b7 280d              .db 0x04, 0xC1, 0xBB, 0x34, 0x09, 0x4C, 0x09, 0xDD, 0x0C, 0x12, 0x0D, 0x82, 0x07, 0x4A, 0x0D, 0x28
+0055b8 820d
+0055b9 8807
+0055ba 4f43
+0055bb 534e
+0055bc 4154
+0055bd d44e
+0055be 0961
+0055bf 094c              .db 0x0D, 0x82, 0x07, 0x88, 0x43, 0x4F, 0x4E, 0x53, 0x54, 0x41, 0x4E, 0xD4, 0x61, 0x09, 0x4C, 0x09
+0055c0 11a9
+0055c1 0d4a
+0055c2 0b4c
+0055c3 0d85
+0055c4 02a0
+0055c5 b2b1
+0055c6 c848
+0055c7 b2b1              .db 0xA9, 0x11, 0x4A, 0x0D, 0x4C, 0x0B, 0x85, 0x0D, 0xA0, 0x02, 0xB1, 0xB2, 0x48, 0xC8, 0xB1, 0xB2
+0055c8 3d4c
+0055c9 8804
+0055ca 4156
+0055cb 4952
+0055cc 4241
+0055cd c54c
+0055ce 0973
+0055cf 094c              .db 0x4C, 0x3D, 0x04, 0x88, 0x56, 0x41, 0x52, 0x49, 0x41, 0x42, 0x4C, 0xC5, 0x73, 0x09, 0x4C, 0x09
+0055d0 097e
+0055d1 0d85
+0055d2 a518
+0055d3 69b2
+0055d4 4802
+0055d5 6598
+0055d6 4cb3
+0055d7 043d              .db 0x7E, 0x09, 0x85, 0x0D, 0x18, 0xA5, 0xB2, 0x69, 0x02, 0x48, 0x98, 0x65, 0xB3, 0x4C, 0x3D, 0x04
+0055d8 5584
+0055d9 4553
+0055da 93d2
+0055db 4c09
+0055dc 7e09
+0055dd 8509
+0055de a00d
+0055df 1802              .db 0x84, 0x55, 0x53, 0x45, 0xD2, 0x93, 0x09, 0x4C, 0x09, 0x7E, 0x09, 0x85, 0x0D, 0xA0, 0x02, 0x18
+0055e0 b2b1
+0055e1 b465
+0055e2 a948
+0055e3 6500
+0055e4 4cb5
+0055e5 043d
+0055e6 b081
+0055e7 09b0              .db 0xB1, 0xB2, 0x65, 0xB4, 0x48, 0xA9, 0x00, 0x65, 0xB5, 0x4C, 0x3D, 0x04, 0x81, 0xB0, 0xB0, 0x09
+0055e8 0988
+0055e9 0000
+0055ea b181
+0055eb 09cc
+0055ec 0988
+0055ed 0001
+0055ee b281
+0055ef 09d4              .db 0x88, 0x09, 0x00, 0x00, 0x81, 0xB1, 0xCC, 0x09, 0x88, 0x09, 0x01, 0x00, 0x81, 0xB2, 0xD4, 0x09
+0055f0 0988
+0055f1 0002
+0055f2 b381
+0055f3 09dc
+0055f4 0988
+0055f5 0003
+0055f6 4282
+0055f7 e4cc              .db 0x88, 0x09, 0x02, 0x00, 0x81, 0xB3, 0xDC, 0x09, 0x88, 0x09, 0x03, 0x00, 0x82, 0x42, 0xCC, 0xE4
+0055f8 8809
+0055f9 2009
+0055fa 8300
+0055fb 2f43
+0055fc eccc
+0055fd 8809
+0055fe 4009
+0055ff 8500              .db 0x09, 0x88, 0x09, 0x20, 0x00, 0x83, 0x43, 0x2F, 0xCC, 0xEC, 0x09, 0x88, 0x09, 0x40, 0x00, 0x85
+005600 4946
+005601 5352
+005602 f5d4
+005603 8809
+005604 6009
+005605 853a
+005606 494c
+005607 494d              .db 0x46, 0x49, 0x52, 0x53, 0xD4, 0xF5, 0x09, 0x88, 0x09, 0x60, 0x3A, 0x85, 0x4C, 0x49, 0x4D, 0x49
+005608 ffd4
+005609 8809
+00560a 8009
+00560b 853e
+00560c 2f42
+00560d 5542
+00560e 0bc6
+00560f 880a              .db 0xD4, 0xFF, 0x09, 0x88, 0x09, 0x80, 0x3E, 0x85, 0x42, 0x2F, 0x42, 0x55, 0xC6, 0x0B, 0x0A, 0x88
+005610 8009
+005611 8500
+005612 2f42
+005613 4353
+005614 17d2
+005615 880a
+005616 0809
+005617 8700              .db 0x09, 0x80, 0x00, 0x85, 0x42, 0x2F, 0x53, 0x43, 0xD2, 0x17, 0x0A, 0x88, 0x09, 0x08, 0x00, 0x87
+005618 4f2b
+005619 4952
+00561a 4947
+00561b 23ce
+00561c 4c0a
+00561d 2a09
+00561e 0004
+00561f 0f04              .db 0x2B, 0x4F, 0x52, 0x49, 0x47, 0x49, 0xCE, 0x23, 0x0A, 0x4C, 0x09, 0x2A, 0x04, 0x00, 0x04, 0x0F
+005620 8208
+005621 8307
+005622 4954
+005623 2fc2
+005624 bd0a
+005625 0a09
+005626 5785
+005627 4449              .db 0x08, 0x82, 0x07, 0x83, 0x54, 0x49, 0xC2, 0x2F, 0x0A, 0xBD, 0x09, 0x0A, 0x85, 0x57, 0x49, 0x44
+005628 c854
+005629 0a43
+00562a 09bd
+00562b 870c
+00562c 4157
+00562d 4e52
+00562e 4e49
+00562f 4cc7              .db 0x54, 0xC8, 0x43, 0x0A, 0xBD, 0x09, 0x0C, 0x87, 0x57, 0x41, 0x52, 0x4E, 0x49, 0x4E, 0xC7, 0x4C
+005630 bd0a
+005631 0e09
+005632 4685
+005633 4e45
+005634 c543
+005635 0a57
+005636 09bd
+005637 8210              .db 0x0A, 0xBD, 0x09, 0x0E, 0x85, 0x46, 0x45, 0x4E, 0x43, 0xC5, 0x57, 0x0A, 0xBD, 0x09, 0x10, 0x82
+005638 d044
+005639 0a64
+00563a 09bd
+00563b 8812
+00563c 4f56
+00563d 2d43
+00563e 494c
+00563f cb4e              .db 0x44, 0xD0, 0x64, 0x0A, 0xBD, 0x09, 0x12, 0x88, 0x56, 0x4F, 0x43, 0x2D, 0x4C, 0x49, 0x4E, 0xCB
+005640 0a6f
+005641 09bd
+005642 8314
+005643 4c42
+005644 77cb
+005645 bd0a
+005646 1609
+005647 4982              .db 0x6F, 0x0A, 0xBD, 0x09, 0x14, 0x83, 0x42, 0x4C, 0xCB, 0x77, 0x0A, 0xBD, 0x09, 0x16, 0x82, 0x49
+005648 85ce
+005649 bd0a
+00564a 1809
+00564b 4f83
+00564c d455
+00564d 0a8e
+00564e 09bd
+00564f 831a              .db 0xCE, 0x85, 0x0A, 0xBD, 0x09, 0x18, 0x83, 0x4F, 0x55, 0xD4, 0x8E, 0x0A, 0xBD, 0x09, 0x1A, 0x83
+005650 4353
+005651 96d2
+005652 bd0a
+005653 1c09
+005654 4f86
+005655 4646
+005656 4553
+005657 9fd4              .db 0x53, 0x43, 0xD2, 0x96, 0x0A, 0xBD, 0x09, 0x1C, 0x86, 0x4F, 0x46, 0x46, 0x53, 0x45, 0xD4, 0x9F
+005658 bd0a
+005659 1e09
+00565a 4387
+00565b 4e4f
+00565c 4554
+00565d d458
+00565e 0aa8
+00565f 09bd              .db 0x0A, 0xBD, 0x09, 0x1E, 0x87, 0x43, 0x4F, 0x4E, 0x54, 0x45, 0x58, 0xD4, 0xA8, 0x0A, 0xBD, 0x09
+005660 8720
+005661 5543
+005662 5252
+005663 4e45
+005664 b4d4
+005665 bd0a
+005666 2209
+005667 5385              .db 0x20, 0x87, 0x43, 0x55, 0x52, 0x52, 0x45, 0x4E, 0xD4, 0xB4, 0x0A, 0xBD, 0x09, 0x22, 0x85, 0x53
+005668 4154
+005669 c554
+00566a 0ac1
+00566b 09bd
+00566c 8424
+00566d 4142
+00566e c553
+00566f 0ace              .db 0x54, 0x41, 0x54, 0xC5, 0xC1, 0x0A, 0xBD, 0x09, 0x24, 0x84, 0x42, 0x41, 0x53, 0xC5, 0xCE, 0x0A
+005670 09bd
+005671 8326
+005672 5044
+005673 d9cc
+005674 bd0a
+005675 2809
+005676 4683
+005677 c44c              .db 0xBD, 0x09, 0x26, 0x83, 0x44, 0x50, 0xCC, 0xD9, 0x0A, 0xBD, 0x09, 0x28, 0x83, 0x46, 0x4C, 0xC4
+005678 0ae3
+005679 09bd
+00567a 832a
+00567b 5343
+00567c ecd0
+00567d bd0a
+00567e 2c09
+00567f 5282              .db 0xE3, 0x0A, 0xBD, 0x09, 0x2A, 0x83, 0x43, 0x53, 0xD0, 0xEC, 0x0A, 0xBD, 0x09, 0x2C, 0x82, 0x52
+005680 f5a3
+005681 bd0a
+005682 2e09
+005683 4883
+005684 c44c
+005685 0afe
+005686 09bd
+005687 8230              .db 0xA3, 0xF5, 0x0A, 0xBD, 0x09, 0x2E, 0x83, 0x48, 0x4C, 0xC4, 0xFE, 0x0A, 0xBD, 0x09, 0x30, 0x82
+005688 ab31
+005689 0b06
+00568a 094c
+00568b 09d8
+00568c 080f
+00568d 0782
+00568e 3282
+00568f 0fab              .db 0x31, 0xAB, 0x06, 0x0B, 0x4C, 0x09, 0xD8, 0x09, 0x0F, 0x08, 0x82, 0x07, 0x82, 0x32, 0xAB, 0x0F
+005690 4c0b
+005691 e009
+005692 0f09
+005693 8208
+005694 8407
+005695 4548
+005696 c552
+005697 0b1c              .db 0x0B, 0x4C, 0x09, 0xE0, 0x09, 0x0F, 0x08, 0x82, 0x07, 0x84, 0x48, 0x45, 0x52, 0xC5, 0x1C, 0x0B
+005698 094c
+005699 0a74
+00569a 08ef
+00569b 0782
+00569c 4185
+00569d 4c4c
+00569e d44f
+00569f 0b29              .db 0x4C, 0x09, 0x74, 0x0A, 0xEF, 0x08, 0x82, 0x07, 0x85, 0x41, 0x4C, 0x4C, 0x4F, 0xD4, 0x29, 0x0B
+0056a0 094c
+0056a1 0a74
+0056a2 08bf
+0056a3 0782
+0056a4 ac81
+0056a5 0b38
+0056a6 094c
+0056a7 0b30              .db 0x4C, 0x09, 0x74, 0x0A, 0xBF, 0x08, 0x82, 0x07, 0x81, 0xAC, 0x38, 0x0B, 0x4C, 0x09, 0x30, 0x0B
+0056a8 0913
+0056a9 09e0
+0056aa 0b40
+0056ab 0782
+0056ac 4382
+0056ad 48ac
+0056ae 4c0b
+0056af 3009              .db 0x13, 0x09, 0xE0, 0x09, 0x40, 0x0B, 0x82, 0x07, 0x82, 0x43, 0xAC, 0x48, 0x0B, 0x4C, 0x09, 0x30
+0056b0 2b0b
+0056b1 d809
+0056b2 4009
+0056b3 820b
+0056b4 8107
+0056b5 58ad
+0056b6 4c0b
+0056b7 4e09              .db 0x0B, 0x2B, 0x09, 0xD8, 0x09, 0x40, 0x0B, 0x82, 0x07, 0x81, 0xAD, 0x58, 0x0B, 0x4C, 0x09, 0x4E
+0056b8 0f08
+0056b9 8208
+0056ba 8107
+0056bb 69bd
+0056bc 4c0b
+0056bd 6d09
+0056be e90b
+0056bf 8207              .db 0x08, 0x0F, 0x08, 0x82, 0x07, 0x81, 0xBD, 0x69, 0x0B, 0x4C, 0x09, 0x6D, 0x0B, 0xE9, 0x07, 0x82
+0056c0 8207
+0056c1 bc55
+0056c2 0b75
+0056c3 094c
+0056c4 0b6d
+0056c5 07fe
+0056c6 0782
+0056c7 bc81              .db 0x07, 0x82, 0x55, 0xBC, 0x75, 0x0B, 0x4C, 0x09, 0x6D, 0x0B, 0xFE, 0x07, 0x82, 0x07, 0x81, 0xBC
+0056c8 0b81
+0056c9 0b94
+0056ca b538
+0056cb f502
+0056cc b500
+0056cd f503
+0056ce 9401
+0056cf 5003              .db 0x81, 0x0B, 0x94, 0x0B, 0x38, 0xB5, 0x02, 0xF5, 0x00, 0xB5, 0x03, 0xF5, 0x01, 0x94, 0x03, 0x50
+0056d0 4902
+0056d1 1080
+0056d2 c801
+0056d3 0294
+0056d4 564c
+0056d5 8105
+0056d6 8ebe
+0056d7 4c0b              .db 0x02, 0x49, 0x80, 0x10, 0x01, 0xC8, 0x94, 0x02, 0x4C, 0x56, 0x05, 0x81, 0xBE, 0x8E, 0x0B, 0x4C
+0056d8 9809
+0056d9 9208
+0056da 820b
+0056db 8307
+0056dc 4f52
+0056dd abd4
+0056de 4c0b
+0056df b009              .db 0x09, 0x98, 0x08, 0x92, 0x0B, 0x82, 0x07, 0x83, 0x52, 0x4F, 0xD4, 0xAB, 0x0B, 0x4C, 0x09, 0xB0
+0056e0 9807
+0056e1 c208
+0056e2 9807
+0056e3 8208
+0056e4 8507
+0056e5 5053
+0056e6 4341
+0056e7 b7c5              .db 0x07, 0x98, 0x08, 0xC2, 0x07, 0x98, 0x08, 0x82, 0x07, 0x85, 0x53, 0x50, 0x41, 0x43, 0xC5, 0xB7
+0056e8 4c0b
+0056e9 f109
+0056ea 3f09
+0056eb 8206
+0056ec 8407
+0056ed 442d
+0056ee d055
+0056ef 0bc9              .db 0x0B, 0x4C, 0x09, 0xF1, 0x09, 0x3F, 0x06, 0x82, 0x07, 0x84, 0x2D, 0x44, 0x55, 0xD0, 0xC9, 0x0B
+0056f0 094c
+0056f1 08b0
+0056f2 04be
+0056f3 0004
+0056f4 08b0
+0056f5 0782
+0056f6 5488
+0056f7 4152              .db 0x4C, 0x09, 0xB0, 0x08, 0xBE, 0x04, 0x04, 0x00, 0xB0, 0x08, 0x82, 0x07, 0x88, 0x54, 0x52, 0x41
+0056f8 4556
+0056f9 5352
+0056fa d9c5
+0056fb 4c0b
+0056fc 9809
+0056fd 7e08
+0056fe 0f08
+0056ff 6408              .db 0x56, 0x45, 0x52, 0x53, 0xC5, 0xD9, 0x0B, 0x4C, 0x09, 0x98, 0x08, 0x7E, 0x08, 0x0F, 0x08, 0x64
+005700 7f04
+005701 087e
+005702 0904
+005703 0b92
+005704 04be
+005705 fff1
+005706 0898
+005707 088f              .db 0x04, 0x7F, 0x7E, 0x08, 0x04, 0x09, 0x92, 0x0B, 0xBE, 0x04, 0xF1, 0xFF, 0x98, 0x08, 0x8F, 0x08
+005708 0782
+005709 4c86
+00570a 5441
+00570b 5345
+00570c ecd4
+00570d 4c0b
+00570e cb09
+00570f ef0a              .db 0x82, 0x07, 0x86, 0x4C, 0x41, 0x54, 0x45, 0x53, 0xD4, 0xEC, 0x0B, 0x4C, 0x09, 0xCB, 0x0A, 0xEF
+005710 ef08
+005711 8208
+005712 8307
+005713 464c
+005714 12c1
+005715 4c0c
+005716 6409
+005717 0404              .db 0x08, 0xEF, 0x08, 0x82, 0x07, 0x83, 0x4C, 0x46, 0xC1, 0x12, 0x0C, 0x4C, 0x09, 0x64, 0x04, 0x04
+005718 0b6d
+005719 0782
+00571a 4383
+00571b c146
+00571c 0c25
+00571d 094c
+00571e 09e0
+00571f 0b6d              .db 0x6D, 0x0B, 0x82, 0x07, 0x83, 0x43, 0x46, 0xC1, 0x25, 0x0C, 0x4C, 0x09, 0xE0, 0x09, 0x6D, 0x0B
+005720 0782
+005721 4e83
+005722 c146
+005723 0c34
+005724 094c
+005725 0464
+005726 6d05
+005727 2a0b              .db 0x82, 0x07, 0x83, 0x4E, 0x46, 0xC1, 0x34, 0x0C, 0x4C, 0x09, 0x64, 0x04, 0x05, 0x6D, 0x0B, 0x2A
+005728 ff04
+005729 f7ff
+00572a 820b
+00572b 8307
+00572c 4650
+00572d 42c1
+00572e 4c0c
+00572f d809              .db 0x04, 0xFF, 0xFF, 0xF7, 0x0B, 0x82, 0x07, 0x83, 0x50, 0x46, 0xC1, 0x42, 0x0C, 0x4C, 0x09, 0xD8
+005730 f709
+005731 640b
+005732 0504
+005733 080f
+005734 0782
+005735 2184
+005736 5343
+005737 57d0              .db 0x09, 0xF7, 0x0B, 0x64, 0x04, 0x05, 0x0F, 0x08, 0x82, 0x07, 0x84, 0x21, 0x43, 0x53, 0xD0, 0x57
+005738 4c0c
+005739 4f09
+00573a fb07
+00573b 130a
+00573c 8209
+00573d 8607
+00573e 453f
+00573f 5252              .db 0x0C, 0x4C, 0x09, 0x4F, 0x07, 0xFB, 0x0A, 0x13, 0x09, 0x82, 0x07, 0x86, 0x3F, 0x45, 0x52, 0x52
+005740 d24f
+005741 0c6a
+005742 094c
+005743 0898
+005744 04be
+005745 0008
+005746 1140
+005747 049f              .db 0x4F, 0xD2, 0x6A, 0x0C, 0x4C, 0x09, 0x98, 0x08, 0xBE, 0x04, 0x08, 0x00, 0x40, 0x11, 0x9F, 0x04
+005748 0004
+005749 088f
+00574a 0782
+00574b 3f85
+00574c 4f43
+00574d d04d
+00574e 0c7b
+00574f 094c              .db 0x04, 0x00, 0x8F, 0x08, 0x82, 0x07, 0x85, 0x3F, 0x43, 0x4F, 0x4D, 0xD0, 0x7B, 0x0C, 0x4C, 0x09
+005750 0ad6
+005751 08ef
+005752 07e9
+005753 0464
+005754 8411
+005755 820c
+005756 8507
+005757 453f              .db 0xD6, 0x0A, 0xEF, 0x08, 0xE9, 0x07, 0x64, 0x04, 0x11, 0x84, 0x0C, 0x82, 0x07, 0x85, 0x3F, 0x45
+005758 4558
+005759 96c3
+00575a 4c0c
+00575b d609
+00575c ef0a
+00575d 6408
+00575e 1204
+00575f 0c84              .db 0x58, 0x45, 0xC3, 0x96, 0x0C, 0x4C, 0x09, 0xD6, 0x0A, 0xEF, 0x08, 0x64, 0x04, 0x12, 0x84, 0x0C
+005760 0782
+005761 3f86
+005762 4150
+005763 5249
+005764 add3
+005765 4c0c
+005766 6d09
+005767 640b              .db 0x82, 0x07, 0x86, 0x3F, 0x50, 0x41, 0x49, 0x52, 0xD3, 0xAD, 0x0C, 0x4C, 0x09, 0x6D, 0x0B, 0x64
+005768 1304
+005769 0c84
+00576a 0782
+00576b 3f84
+00576c 5343
+00576d c2d0
+00576e 4c0c
+00576f 4f09              .db 0x04, 0x13, 0x84, 0x0C, 0x82, 0x07, 0x84, 0x3F, 0x43, 0x53, 0xD0, 0xC2, 0x0C, 0x4C, 0x09, 0x4F
+005770 fb07
+005771 ef0a
+005772 6d08
+005773 640b
+005774 1404
+005775 0c84
+005776 0782
+005777 3f88              .db 0x07, 0xFB, 0x0A, 0xEF, 0x08, 0x6D, 0x0B, 0x64, 0x04, 0x14, 0x84, 0x0C, 0x82, 0x07, 0x88, 0x3F
+005778 4f4c
+005779 4441
+00577a 4e49
+00577b d6c7
+00577c 4c0c
+00577d 8b09
+00577e ef0a
+00577f e908              .db 0x4C, 0x4F, 0x41, 0x44, 0x49, 0x4E, 0xC7, 0xD6, 0x0C, 0x4C, 0x09, 0x8B, 0x0A, 0xEF, 0x08, 0xE9
+005780 6407
+005781 1604
+005782 0c84
+005783 0782
+005784 4387
+005785 4d4f
+005786 4950
+005787 c54c              .db 0x07, 0x64, 0x04, 0x16, 0x84, 0x0C, 0x82, 0x07, 0x87, 0x43, 0x4F, 0x4D, 0x50, 0x49, 0x4C, 0xC5
+005788 0cee
+005789 094c
+00578a 0c9e
+00578b 07c2
+00578c 08b0
+00578d 0b21
+00578e 07b0
+00578f 08ef              .db 0xEE, 0x0C, 0x4C, 0x09, 0x9E, 0x0C, 0xC2, 0x07, 0xB0, 0x08, 0x21, 0x0B, 0xB0, 0x07, 0xEF, 0x08
+005790 0b4c
+005791 0782
+005792 dbc1
+005793 0d08
+005794 094c
+005795 09d0
+005796 0ad6
+005797 0913              .db 0x4C, 0x0B, 0x82, 0x07, 0xC1, 0xDB, 0x08, 0x0D, 0x4C, 0x09, 0xD0, 0x09, 0xD6, 0x0A, 0x13, 0x09
+005798 0782
+005799 dd81
+00579a 0d24
+00579b 094c
+00579c 0464
+00579d d6c0
+00579e 130a
+00579f 8209              .db 0x82, 0x07, 0x81, 0xDD, 0x24, 0x0D, 0x4C, 0x09, 0x64, 0x04, 0xC0, 0xD6, 0x0A, 0x13, 0x09, 0x82
+0057a0 8607
+0057a1 4d53
+0057a2 4455
+0057a3 c547
+0057a4 0d32
+0057a5 094c
+0057a6 0c1b
+0057a7 0464              .db 0x07, 0x86, 0x53, 0x4D, 0x55, 0x44, 0x47, 0xC5, 0x32, 0x0D, 0x4C, 0x09, 0x1B, 0x0C, 0x64, 0x04
+0057a8 e020
+0057a9 8208
+0057aa 8307
+0057ab 4548
+0057ac 41d8
+0057ad 4c0d
+0057ae 6409
+0057af 1004              .db 0x20, 0xE0, 0x08, 0x82, 0x07, 0x83, 0x48, 0x45, 0xD8, 0x41, 0x0D, 0x4C, 0x09, 0x64, 0x04, 0x10
+0057b0 0ae0
+0057b1 0913
+0057b2 0782
+0057b3 4487
+0057b4 4345
+0057b5 4d49
+0057b6 cc41
+0057b7 0d55              .db 0xE0, 0x0A, 0x13, 0x09, 0x82, 0x07, 0x87, 0x44, 0x45, 0x43, 0x49, 0x4D, 0x41, 0xCC, 0x55, 0x0D
+0057b8 094c
+0057b9 0464
+0057ba e00a
+0057bb 130a
+0057bc 8209
+0057bd 8707
+0057be 3b28
+0057bf 4f43              .db 0x4C, 0x09, 0x64, 0x04, 0x0A, 0xE0, 0x0A, 0x13, 0x09, 0x82, 0x07, 0x87, 0x28, 0x3B, 0x43, 0x4F
+0057c0 4544
+0057c1 66a9
+0057c2 4c0d
+0057c3 c209
+0057c4 1b07
+0057c5 5d0c
+0057c6 3a0c
+0057c7 130c              .db 0x44, 0x45, 0xA9, 0x66, 0x0D, 0x4C, 0x09, 0xC2, 0x07, 0x1B, 0x0C, 0x5D, 0x0C, 0x3A, 0x0C, 0x13
+0057c8 8209
+0057c9 c507
+0057ca 433b
+0057cb 444f
+0057cc 7bc5
+0057cd 4c0d
+0057ce dd09
+0057cf 120c              .db 0x09, 0x82, 0x07, 0xC5, 0x3B, 0x43, 0x4F, 0x44, 0xC5, 0x7B, 0x0D, 0x4C, 0x09, 0xDD, 0x0C, 0x12
+0057d0 850d
+0057d1 280d
+0057d2 4a0d
+0057d3 820d
+0057d4 8707
+0057d5 423c
+0057d6 4955
+0057d7 444c              .db 0x0D, 0x85, 0x0D, 0x28, 0x0D, 0x4A, 0x0D, 0x82, 0x07, 0x87, 0x3C, 0x42, 0x55, 0x49, 0x4C, 0x44
+0057d8 93d3
+0057d9 4c0d
+0057da d009
+0057db 7e09
+0057dc 8209
+0057dd 8507
+0057de 4f44
+0057df 5345              .db 0xD3, 0x93, 0x0D, 0x4C, 0x09, 0xD0, 0x09, 0x7E, 0x09, 0x82, 0x07, 0x85, 0x44, 0x4F, 0x45, 0x53
+0057e0 a9be
+0057e1 4c0d
+0057e2 c209
+0057e3 1b07
+0057e4 5d0c
+0057e5 130c
+0057e6 8509
+0057e7 a50d              .db 0xBE, 0xA9, 0x0D, 0x4C, 0x09, 0xC2, 0x07, 0x1B, 0x0C, 0x5D, 0x0C, 0x13, 0x09, 0x85, 0x0D, 0xA5
+0057e8 48b0
+0057e9 afa5
+0057ea a048
+0057eb b102
+0057ec 85b2
+0057ed c8af
+0057ee b2b1
+0057ef b085              .db 0xB0, 0x48, 0xA5, 0xAF, 0x48, 0xA0, 0x02, 0xB1, 0xB2, 0x85, 0xAF, 0xC8, 0xB1, 0xB2, 0x85, 0xB0
+0057f0 a518
+0057f1 69b2
+0057f2 4804
+0057f3 b3a5
+0057f4 0069
+0057f5 3d4c
+0057f6 8504
+0057f7 4f43              .db 0x18, 0xA5, 0xB2, 0x69, 0x04, 0x48, 0xA5, 0xB3, 0x69, 0x00, 0x4C, 0x3D, 0x04, 0x85, 0x43, 0x4F
+0057f8 4e55
+0057f9 bbd4
+0057fa 4c0d
+0057fb b009
+0057fc 1408
+0057fd 980b
+0057fe 0408
+0057ff 8209              .db 0x55, 0x4E, 0xD4, 0xBB, 0x0D, 0x4C, 0x09, 0xB0, 0x08, 0x14, 0x0B, 0x98, 0x08, 0x04, 0x09, 0x82
+005800 8407
+005801 5954
+005802 c550
+005803 0ded
+005804 094c
+005805 0be0
+005806 04be
+005807 0018              .db 0x07, 0x84, 0x54, 0x59, 0x50, 0xC5, 0xED, 0x0D, 0x4C, 0x09, 0xE0, 0x0B, 0xBE, 0x04, 0x18, 0x00
+005808 087e
+005809 080f
+00580a 0898
+00580b 0546
+00580c 055f
+00580d 0904
+00580e 063f
+00580f 04df              .db 0x7E, 0x08, 0x0F, 0x08, 0x98, 0x08, 0x46, 0x05, 0x5F, 0x05, 0x04, 0x09, 0x3F, 0x06, 0xDF, 0x04
+005810 fff8
+005811 049f
+005812 0004
+005813 088f
+005814 0782
+005815 2d89
+005816 5254
+005817 4941              .db 0xF8, 0xFF, 0x9F, 0x04, 0x04, 0x00, 0x8F, 0x08, 0x82, 0x07, 0x89, 0x2D, 0x54, 0x52, 0x41, 0x49
+005818 494c
+005819 c74e
+00581a 0e01
+00581b 094c
+00581c 08b0
+00581d 09d0
+00581e 0546
+00581f 087e              .db 0x4C, 0x49, 0x4E, 0xC7, 0x01, 0x0E, 0x4C, 0x09, 0xB0, 0x08, 0xD0, 0x09, 0x46, 0x05, 0x7E, 0x08
+005820 087e
+005821 080f
+005822 09d8
+005823 0b6d
+005824 0904
+005825 09f1
+005826 0b6d
+005827 04be              .db 0x7E, 0x08, 0x0F, 0x08, 0xD8, 0x09, 0x6D, 0x0B, 0x04, 0x09, 0xF1, 0x09, 0x6D, 0x0B, 0xBE, 0x04
+005828 0008
+005829 0795
+00582a 049f
+00582b 0006
+00582c 09d8
+00582d 0b6d
+00582e 04df
+00582f ffe0              .db 0x08, 0x00, 0x95, 0x07, 0x9F, 0x04, 0x06, 0x00, 0xD8, 0x09, 0x6D, 0x0B, 0xDF, 0x04, 0xE0, 0xFF
+005830 0782
+005831 2884
+005832 222e
+005833 2aa9
+005834 4c0e
+005835 d309
+005836 f507
+005837 b00d              .db 0x82, 0x07, 0x84, 0x28, 0x2E, 0x22, 0xA9, 0x2A, 0x0E, 0x4C, 0x09, 0xD3, 0x07, 0xF5, 0x0D, 0xB0
+005838 1408
+005839 c20b
+00583a 0f07
+00583b b008
+00583c 0807
+00583d 820e
+00583e c207
+00583f a22e              .db 0x08, 0x14, 0x0B, 0xC2, 0x07, 0x0F, 0x08, 0xB0, 0x07, 0x08, 0x0E, 0x82, 0x07, 0xC2, 0x2E, 0xA2
+005840 0e62
+005841 094c
+005842 0464
+005843 d622
+005844 ef0a
+005845 be08
+005846 1404
+005847 1200              .db 0x62, 0x0E, 0x4C, 0x09, 0x64, 0x04, 0x22, 0xD6, 0x0A, 0xEF, 0x08, 0xBE, 0x04, 0x14, 0x00, 0x12
+005848 690d
+005849 e30e
+00584a 300f
+00584b 040b
+00584c 1409
+00584d 400b
+00584e 9f0b
+00584f 0a04              .db 0x0D, 0x69, 0x0E, 0xE3, 0x0F, 0x30, 0x0B, 0x04, 0x09, 0x14, 0x0B, 0x40, 0x0B, 0x9F, 0x04, 0x0A
+005850 e300
+005851 300f
+005852 f50b
+005853 080d
+005854 820e
+005855 8607
+005856 5845
+005857 4550              .db 0x00, 0xE3, 0x0F, 0x30, 0x0B, 0xF5, 0x0D, 0x08, 0x0E, 0x82, 0x07, 0x86, 0x45, 0x58, 0x50, 0x45
+005858 d443
+005859 0e7d
+00585a 094c
+00585b 087e
+00585c 080f
+00585d 087e
+00585e 0546
+00585f 0647              .db 0x43, 0xD4, 0x7D, 0x0E, 0x4C, 0x09, 0x7E, 0x08, 0x0F, 0x08, 0x7E, 0x08, 0x46, 0x05, 0x47, 0x06
+005860 08b0
+005861 0464
+005862 390e
+005863 ef0a
+005864 7908
+005865 be0b
+005866 1f04
+005867 8f00              .db 0xB0, 0x08, 0x64, 0x04, 0x0E, 0x39, 0x0A, 0xEF, 0x08, 0x79, 0x0B, 0xBE, 0x04, 0x1F, 0x00, 0x8F
+005868 6408
+005869 0804
+00586a 087e
+00586b 055f
+00586c 0b79
+00586d 08b0
+00586e 07c2
+00586f 09e0              .db 0x08, 0x64, 0x04, 0x08, 0x7E, 0x08, 0x5F, 0x05, 0x79, 0x0B, 0xB0, 0x08, 0xC2, 0x07, 0xE0, 0x09
+005870 0b6d
+005871 080f
+005872 07b0
+005873 0b6d
+005874 049f
+005875 0027
+005876 08b0
+005877 0464              .db 0x6D, 0x0B, 0x0F, 0x08, 0xB0, 0x07, 0x6D, 0x0B, 0x9F, 0x04, 0x27, 0x00, 0xB0, 0x08, 0x64, 0x04
+005878 790d
+005879 be0b
+00587a 0e04
+00587b 9500
+00587c 8f07
+00587d f108
+00587e d009
+00587f 9f09              .db 0x0D, 0x79, 0x0B, 0xBE, 0x04, 0x0E, 0x00, 0x95, 0x07, 0x8F, 0x08, 0xF1, 0x09, 0xD0, 0x09, 0x9F
+005880 0404
+005881 b000
+005882 5f08
+005883 2b05
+005884 d009
+005885 5f09
+005886 1405
+005887 130b              .db 0x04, 0x04, 0x00, 0xB0, 0x08, 0x5F, 0x05, 0x2B, 0x09, 0xD0, 0x09, 0x5F, 0x05, 0x14, 0x0B, 0x13
+005888 3f09
+005889 df06
+00588a a904
+00588b 8fff
+00588c 8208
+00588d 8507
+00588e 5551
+00588f 5245              .db 0x09, 0x3F, 0x06, 0xDF, 0x04, 0xA9, 0xFF, 0x8F, 0x08, 0x82, 0x07, 0x85, 0x51, 0x55, 0x45, 0x52
+005890 abd9
+005891 4c0e
+005892 4909
+005893 ef0a
+005894 6408
+005895 5004
+005896 0eb4
+005897 09d0              .db 0xD9, 0xAB, 0x0E, 0x4C, 0x09, 0x49, 0x0A, 0xEF, 0x08, 0x64, 0x04, 0x50, 0xB4, 0x0E, 0xD0, 0x09
+005898 0a93
+005899 0913
+00589a 0782
+00589b 80c1
+00589c 0f1b
+00589d 094c
+00589e 0a8b
+00589f 08ef              .db 0x93, 0x0A, 0x13, 0x09, 0x82, 0x07, 0xC1, 0x80, 0x1B, 0x0F, 0x4C, 0x09, 0x8B, 0x0A, 0xEF, 0x08
+0058a0 04be
+0058a1 002a
+0058a2 09d8
+0058a3 0a8b
+0058a4 08bf
+0058a5 09d0
+0058a6 0a93
+0058a7 0913              .db 0xBE, 0x04, 0x2A, 0x00, 0xD8, 0x09, 0x8B, 0x0A, 0xBF, 0x08, 0xD0, 0x09, 0x93, 0x0A, 0x13, 0x09
+0058a8 0a8b
+0058a9 08ef
+0058aa 09d0
+0058ab 0a2b
+0058ac 06be
+0058ad 088f
+0058ae 07e9
+0058af 04be              .db 0x8B, 0x0A, 0xEF, 0x08, 0xD0, 0x09, 0x2B, 0x0A, 0xBE, 0x06, 0x8F, 0x08, 0xE9, 0x07, 0xBE, 0x04
+0058b0 0008
+0058b1 0cb5
+0058b2 07c2
+0058b3 088f
+0058b4 049f
+0058b5 0006
+0058b6 07c2
+0058b7 088f              .db 0x08, 0x00, 0xB5, 0x0C, 0xC2, 0x07, 0x8F, 0x08, 0x9F, 0x04, 0x06, 0x00, 0xC2, 0x07, 0x8F, 0x08
+0058b8 0782
+0058b9 4684
+0058ba 4c49
+0058bb 36cc
+0058bc 4c0f
+0058bd 9809
+0058be b008
+0058bf 7e07              .db 0x82, 0x07, 0x84, 0x46, 0x49, 0x4C, 0xCC, 0x36, 0x0F, 0x4C, 0x09, 0x98, 0x08, 0xB0, 0x07, 0x7E
+0058c0 2b08
+0058c1 b009
+0058c2 1408
+0058c3 c20b
+0058c4 d807
+0058c5 6d09
+0058c6 660b
+0058c7 8206              .db 0x08, 0x2B, 0x09, 0xB0, 0x08, 0x14, 0x0B, 0xC2, 0x07, 0xD8, 0x09, 0x6D, 0x0B, 0x66, 0x06, 0x82
+0058c8 8507
+0058c9 5245
+0058ca 5341
+0058cb 72c5
+0058cc 4c0f
+0058cd d009
+0058ce 7909
+0058cf 820f              .db 0x07, 0x85, 0x45, 0x52, 0x41, 0x53, 0xC5, 0x72, 0x0F, 0x4C, 0x09, 0xD0, 0x09, 0x79, 0x0F, 0x82
+0058d0 8607
+0058d1 4c42
+0058d2 4e41
+0058d3 d34b
+0058d4 0f91
+0058d5 094c
+0058d6 09f1
+0058d7 0f79              .db 0x07, 0x86, 0x42, 0x4C, 0x41, 0x4E, 0x4B, 0xD3, 0x91, 0x0F, 0x4C, 0x09, 0xF1, 0x09, 0x79, 0x0F
+0058d8 0782
+0058d9 4884
+0058da 4c4f
+0058db a1c4
+0058dc 4c0f
+0058dd 2a09
+0058de ff04
+0058df 0cff              .db 0x82, 0x07, 0x84, 0x48, 0x4F, 0x4C, 0xC4, 0xA1, 0x0F, 0x4C, 0x09, 0x2A, 0x04, 0xFF, 0xFF, 0x0C
+0058e0 bf0b
+0058e1 0c08
+0058e2 ef0b
+0058e3 2b08
+0058e4 8209
+0058e5 8307
+0058e6 4150
+0058e7 b2c4              .db 0x0B, 0xBF, 0x08, 0x0C, 0x0B, 0xEF, 0x08, 0x2B, 0x09, 0x82, 0x07, 0x83, 0x50, 0x41, 0xC4, 0xB2
+0058e8 4c0f
+0058e9 3009
+0058ea 640b
+0058eb 4404
+0058ec 080f
+0058ed 0782
+0058ee 5784
+0058ef 524f              .db 0x0F, 0x4C, 0x09, 0x30, 0x0B, 0x64, 0x04, 0x44, 0x0F, 0x08, 0x82, 0x07, 0x84, 0x57, 0x4F, 0x52
+0058f0 cbc4
+0058f1 4c0f
+0058f2 8b09
+0058f3 ef0a
+0058f4 be08
+0058f5 0c04
+0058f6 8b00
+0058f7 ef0a              .db 0xC4, 0xCB, 0x0F, 0x4C, 0x09, 0x8B, 0x0A, 0xEF, 0x08, 0xBE, 0x04, 0x0C, 0x00, 0x8B, 0x0A, 0xEF
+0058f8 4808
+0058f9 9f16
+0058fa 0604
+0058fb 4900
+0058fc ef0a
+0058fd 9308
+0058fe ef0a
+0058ff 0f08              .db 0x08, 0x48, 0x16, 0x9F, 0x04, 0x06, 0x00, 0x49, 0x0A, 0xEF, 0x08, 0x93, 0x0A, 0xEF, 0x08, 0x0F
+005900 9808
+005901 0008
+005902 3006
+005903 640b
+005904 2204
+005905 0faa
+005906 0a93
+005907 08bf              .db 0x08, 0x98, 0x08, 0x00, 0x06, 0x30, 0x0B, 0x64, 0x04, 0x22, 0xAA, 0x0F, 0x93, 0x0A, 0xBF, 0x08
+005908 087e
+005909 0b6d
+00590a 07b0
+00590b 07d3
+00590c 0b30
+00590d 092b
+00590e 080f
+00590f 0b30              .db 0x7E, 0x08, 0x6D, 0x0B, 0xB0, 0x07, 0xD3, 0x07, 0x30, 0x0B, 0x2B, 0x09, 0x0F, 0x08, 0x30, 0x0B
+005910 0b14
+005911 07c2
+005912 0666
+005913 0782
+005914 5585
+005915 5050
+005916 d245
+005917 0fdc              .db 0x14, 0x0B, 0xC2, 0x07, 0x66, 0x06, 0x82, 0x07, 0x85, 0x55, 0x50, 0x50, 0x45, 0xD2, 0xDC, 0x0F
+005918 094c
+005919 087e
+00591a 080f
+00591b 0898
+00591c 0546
+00591d 055f
+00591e 0904
+00591f 0464              .db 0x4C, 0x09, 0x7E, 0x08, 0x0F, 0x08, 0x98, 0x08, 0x46, 0x05, 0x5F, 0x05, 0x04, 0x09, 0x64, 0x04
+005920 af5f
+005921 be0b
+005922 0904
+005923 5f00
+005924 6405
+005925 2004
+005926 08e0
+005927 04df              .db 0x5F, 0xAF, 0x0B, 0xBE, 0x04, 0x09, 0x00, 0x5F, 0x05, 0x64, 0x04, 0x20, 0xE0, 0x08, 0xDF, 0x04
+005928 ffea
+005929 0782
+00592a 2888
+00592b 554e
+00592c 424d
+00592d 5245
+00592e 28a9
+00592f 4c10              .db 0xEA, 0xFF, 0x82, 0x07, 0x88, 0x28, 0x4E, 0x55, 0x4D, 0x42, 0x45, 0x52, 0xA9, 0x28, 0x10, 0x4C
+005930 1409
+005931 b00b
+005932 b008
+005933 0407
+005934 e009
+005935 ef0a
+005936 6908
+005937 be05              .db 0x09, 0x14, 0x0B, 0xB0, 0x08, 0xB0, 0x07, 0x04, 0x09, 0xE0, 0x0A, 0xEF, 0x08, 0x69, 0x05, 0xBE
+005938 2c04
+005939 9800
+00593a e008
+00593b ef0a
+00593c 8b08
+00593d 8f06
+00593e bd08
+00593f e00b              .db 0x04, 0x2C, 0x00, 0x98, 0x08, 0xE0, 0x0A, 0xEF, 0x08, 0x8B, 0x06, 0x8F, 0x08, 0xBD, 0x0B, 0xE0
+005940 ef0a
+005941 8b08
+005942 2806
+005943 e908
+005944 ef0a
+005945 1408
+005946 be0b
+005947 0804              .db 0x0A, 0xEF, 0x08, 0x8B, 0x06, 0x28, 0x08, 0xE9, 0x0A, 0xEF, 0x08, 0x14, 0x0B, 0xBE, 0x04, 0x08
+005948 d800
+005949 e909
+00594a bf0a
+00594b c208
+00594c 9f07
+00594d c604
+00594e c2ff
+00594f 8207              .db 0x00, 0xD8, 0x09, 0xE9, 0x0A, 0xBF, 0x08, 0xC2, 0x07, 0x9F, 0x04, 0xC6, 0xFF, 0xC2, 0x07, 0x82
+005950 8607
+005951 554e
+005952 424d
+005953 d245
+005954 1054
+005955 094c
+005956 09d0
+005957 09d0              .db 0x07, 0x86, 0x4E, 0x55, 0x4D, 0x42, 0x45, 0xD2, 0x54, 0x10, 0x4C, 0x09, 0xD0, 0x09, 0xD0, 0x09
+005958 0bbd
+005959 08b0
+00595a 0b14
+00595b 0904
+00595c 0464
+00595d 792d
+00595e b00b
+00595f b008              .db 0xBD, 0x0B, 0xB0, 0x08, 0x14, 0x0B, 0x04, 0x09, 0x64, 0x04, 0x2D, 0x79, 0x0B, 0xB0, 0x08, 0xB0
+005960 0f07
+005961 2a08
+005962 ff04
+005963 e9ff
+005964 130a
+005965 5f09
+005966 b010
+005967 0408              .db 0x07, 0x0F, 0x08, 0x2A, 0x04, 0xFF, 0xFF, 0xE9, 0x0A, 0x13, 0x09, 0x5F, 0x10, 0xB0, 0x08, 0x04
+005968 f109
+005969 6d09
+00596a be0b
+00596b 1504
+00596c b000
+00596d 0408
+00596e 6409
+00596f 2e04              .db 0x09, 0xF1, 0x09, 0x6D, 0x0B, 0xBE, 0x04, 0x15, 0x00, 0xB0, 0x08, 0x04, 0x09, 0x64, 0x04, 0x2E
+005970 0b6d
+005971 09d0
+005972 0c84
+005973 09d0
+005974 049f
+005975 ffdd
+005976 088f
+005977 07c2              .db 0x6D, 0x0B, 0xD0, 0x09, 0x84, 0x0C, 0xD0, 0x09, 0x9F, 0x04, 0xDD, 0xFF, 0x8F, 0x08, 0xC2, 0x07
+005978 04be
+005979 0004
+00597a 0867
+00597b 0782
+00597c 2d85
+00597d 4946
+00597e c44e
+00597f 10a1              .db 0xBE, 0x04, 0x04, 0x00, 0x67, 0x08, 0x82, 0x07, 0x85, 0x2D, 0x46, 0x49, 0x4E, 0xC4, 0xA1, 0x10
+005980 094c
+005981 09f1
+005982 0fe3
+005983 0b30
+005984 0df5
+005985 1030
+005986 0b30
+005987 0abe              .db 0x4C, 0x09, 0xF1, 0x09, 0xE3, 0x0F, 0x30, 0x0B, 0xF5, 0x0D, 0x30, 0x10, 0x30, 0x0B, 0xBE, 0x0A
+005988 08ef
+005989 08ef
+00598a 059a
+00598b 08b0
+00598c 07e9
+00598d 04be
+00598e 000a
+00598f 088f              .db 0xEF, 0x08, 0xEF, 0x08, 0x9A, 0x05, 0xB0, 0x08, 0xE9, 0x07, 0xBE, 0x04, 0x0A, 0x00, 0x8F, 0x08
+005990 0b30
+005991 0c1b
+005992 059a
+005993 0782
+005994 2887
+005995 4241
+005996 524f
+005997 a954              .db 0x30, 0x0B, 0x1B, 0x0C, 0x9A, 0x05, 0x82, 0x07, 0x87, 0x28, 0x41, 0x42, 0x4F, 0x52, 0x54, 0xA9
+005998 10f8
+005999 094c
+00599a 1390
+00599b 0782
+00599c 4585
+00599d 5252
+00599e d24f
+00599f 1128              .db 0xF8, 0x10, 0x4C, 0x09, 0x90, 0x13, 0x82, 0x07, 0x85, 0x45, 0x52, 0x52, 0x4F, 0xD2, 0x28, 0x11
+0059a0 094c
+0059a1 0a61
+0059a2 08ef
+0059a3 07fe
+0059a4 04be
+0059a5 0004
+0059a6 1132
+0059a7 0b30              .db 0x4C, 0x09, 0x61, 0x0A, 0xEF, 0x08, 0xFE, 0x07, 0xBE, 0x04, 0x04, 0x00, 0x32, 0x11, 0x30, 0x0B
+0059a8 0df5
+0059a9 0e08
+0059aa 0e69
+0059ab 2004
+0059ac 3f20
+0059ad df20
+0059ae 5e16
+0059af 8f07              .db 0xF5, 0x0D, 0x08, 0x0E, 0x69, 0x0E, 0x04, 0x20, 0x20, 0x3F, 0x20, 0xDF, 0x16, 0x5E, 0x07, 0x8F
+0059b0 8f08
+0059b1 9308
+0059b2 ef0a
+0059b3 8b08
+0059b4 ef0a
+0059b5 6108
+0059b6 8213
+0059b7 8307              .db 0x08, 0x8F, 0x08, 0x93, 0x0A, 0xEF, 0x08, 0x8B, 0x0A, 0xEF, 0x08, 0x61, 0x13, 0x82, 0x07, 0x83
+0059b8 4449
+0059b9 38ae
+0059ba 4c11
+0059bb d109
+0059bc 640f
+0059bd 2004
+0059be 0464
+0059bf 795f              .db 0x49, 0x44, 0xAE, 0x38, 0x11, 0x4C, 0x09, 0xD1, 0x0F, 0x64, 0x04, 0x20, 0x64, 0x04, 0x5F, 0x79
+0059c0 b00f
+0059c1 5d08
+0059c2 2b0c
+0059c3 7e0c
+0059c4 6d08
+0059c5 d10b
+0059c6 980f
+0059c7 6608              .db 0x0F, 0xB0, 0x08, 0x5D, 0x0C, 0x2B, 0x0C, 0x7E, 0x08, 0x6D, 0x0B, 0xD1, 0x0F, 0x98, 0x08, 0x66
+0059c8 d106
+0059c9 f50f
+0059ca 640d
+0059cb 1f04
+0059cc 070e
+0059cd 0e08
+0059ce 0bd1
+0059cf 0782              .db 0x06, 0xD1, 0x0F, 0xF5, 0x0D, 0x64, 0x04, 0x1F, 0x0E, 0x07, 0x08, 0x0E, 0xD1, 0x0B, 0x82, 0x07
+0059d0 4386
+0059d1 4552
+0059d2 5441
+0059d3 6fc5
+0059d4 4c11
+0059d5 4909
+0059d6 300a
+0059d7 640b              .db 0x86, 0x43, 0x52, 0x45, 0x41, 0x54, 0xC5, 0x6F, 0x11, 0x4C, 0x09, 0x49, 0x0A, 0x30, 0x0B, 0x64
+0059d8 a004
+0059d9 080f
+0059da 0b86
+0059db 09e0
+0059dc 0c84
+0059dd 1100
+0059de 04be
+0059df 000f              .db 0x04, 0xA0, 0x0F, 0x08, 0x86, 0x0B, 0xE0, 0x09, 0x84, 0x0C, 0x00, 0x11, 0xBE, 0x04, 0x0F, 0x00
+0059e0 088f
+0059e1 0c48
+0059e2 1175
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+0059e8 0408
+0059e9 5409
+0059ea ef0a
+0059eb 4508
+0059ec 1414
+0059ed 400b
+0059ee 740b
+0059ef 040a              .db 0x08, 0x04, 0x09, 0x54, 0x0A, 0xEF, 0x08, 0x45, 0x14, 0x14, 0x0B, 0x40, 0x0B, 0x74, 0x0A, 0x04
+0059f0 6409
+0059f1 fd04
+0059f2 0b79
+0059f3 0b40
+0059f4 08b0
+0059f5 0464
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+0059f7 3008              .db 0x09, 0x64, 0x04, 0xFD, 0x79, 0x0B, 0x40, 0x0B, 0xB0, 0x08, 0x64, 0x04, 0xA0, 0xE0, 0x08, 0x30
+0059f8 d80b
+0059f9 6d09
+0059fa 640b
+0059fb 8004
+0059fc 08e0
+0059fd 0c1b
+0059fe 0b4c
+0059ff 0acb              .db 0x0B, 0xD8, 0x09, 0x6D, 0x0B, 0x64, 0x04, 0x80, 0xE0, 0x08, 0x1B, 0x0C, 0x4C, 0x0B, 0xCB, 0x0A
+005a00 08ef
+005a01 0913
+005a02 0b30
+005a03 0b21
+005a04 0b4c
+005a05 0782
+005a06 5bc9
+005a07 4f43              .db 0xEF, 0x08, 0x13, 0x09, 0x30, 0x0B, 0x21, 0x0B, 0x4C, 0x0B, 0x82, 0x07, 0xC9, 0x5B, 0x43, 0x4F
+005a08 504d
+005a09 4c49
+005a0a dd45
+005a0b 11a0
+005a0c 094c
+005a0d 1100
+005a0e 07e9
+005a0f 09d0              .db 0x4D, 0x50, 0x49, 0x4C, 0x45, 0xDD, 0xA0, 0x11, 0x4C, 0x09, 0x00, 0x11, 0xE9, 0x07, 0xD0, 0x09
+005a10 0c84
+005a11 088f
+005a12 0c3a
+005a13 0b4c
+005a14 0782
+005a15 4cc7
+005a16 5449
+005a17 5245              .db 0x84, 0x0C, 0x8F, 0x08, 0x3A, 0x0C, 0x4C, 0x0B, 0x82, 0x07, 0xC7, 0x4C, 0x49, 0x54, 0x45, 0x52
+005a18 cc41
+005a19 120c
+005a1a 094c
+005a1b 0ad6
+005a1c 08ef
+005a1d 04be
+005a1e 0008
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+005a20 042a
+005a21 0b4c
+005a22 0782
+005a23 44c8
+005a24 494c
+005a25 4554
+005a26 4152
+005a27 2acc              .db 0x2A, 0x04, 0x4C, 0x0B, 0x82, 0x07, 0xC8, 0x44, 0x4C, 0x49, 0x54, 0x45, 0x52, 0x41, 0xCC, 0x2A
+005a28 4c12
+005a29 d609
+005a2a ef0a
+005a2b be08
+005a2c 0804
+005a2d 9800
+005a2e 3408
+005a2f 3412              .db 0x12, 0x4C, 0x09, 0xD6, 0x0A, 0xEF, 0x08, 0xBE, 0x04, 0x08, 0x00, 0x98, 0x08, 0x34, 0x12, 0x34
+005a30 8212
+005a31 8607
+005a32 533f
+005a33 4154
+005a34 cb43
+005a35 1246
+005a36 094c
+005a37 0464              .db 0x12, 0x82, 0x07, 0x86, 0x3F, 0x53, 0x54, 0x41, 0x43, 0xCB, 0x46, 0x12, 0x4C, 0x09, 0x64, 0x04
+005a38 4f9f
+005a39 8607
+005a3a d80b
+005a3b 8409
+005a3c 4f0c
+005a3d 6407
+005a3e 2004
+005a3f 0b86              .db 0x9F, 0x4F, 0x07, 0x86, 0x0B, 0xD8, 0x09, 0x84, 0x0C, 0x4F, 0x07, 0x64, 0x04, 0x20, 0x86, 0x0B
+005a40 0464
+005a41 8407
+005a42 820c
+005a43 8907
+005a44 4e49
+005a45 4554
+005a46 5052
+005a47 4552              .db 0x64, 0x04, 0x07, 0x84, 0x0C, 0x82, 0x07, 0x89, 0x49, 0x4E, 0x54, 0x45, 0x52, 0x50, 0x52, 0x45
+005a48 63d4
+005a49 4c12
+005a4a 0009
+005a4b be11
+005a4c 1e04
+005a4d d600
+005a4e ef0a
+005a4f 9208              .db 0xD4, 0x63, 0x12, 0x4C, 0x09, 0x00, 0x11, 0xBE, 0x04, 0x1E, 0x00, 0xD6, 0x0A, 0xEF, 0x08, 0x92
+005a50 be0b
+005a51 0a04
+005a52 3a00
+005a53 4c0c
+005a54 9f0b
+005a55 0604
+005a56 3a00
+005a57 870c              .db 0x0B, 0xBE, 0x04, 0x0A, 0x00, 0x3A, 0x0C, 0x4C, 0x0B, 0x9F, 0x04, 0x06, 0x00, 0x3A, 0x0C, 0x87
+005a58 6c04
+005a59 9f12
+005a5a 1c04
+005a5b 3000
+005a5c aa0b
+005a5d e910
+005a5e ef0a
+005a5f 1408              .db 0x04, 0x6C, 0x12, 0x9F, 0x04, 0x1C, 0x00, 0x30, 0x0B, 0xAA, 0x10, 0xE9, 0x0A, 0xEF, 0x08, 0x14
+005a60 be0b
+005a61 0804
+005a62 5100
+005a63 9f12
+005a64 0604
+005a65 8f00
+005a66 3408
+005a67 6c12              .db 0x0B, 0xBE, 0x04, 0x08, 0x00, 0x51, 0x12, 0x9F, 0x04, 0x06, 0x00, 0x8F, 0x08, 0x34, 0x12, 0x6C
+005a68 9f12
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+005a6a 89ff
+005a6b 4d49
+005a6c 454d
+005a6d 4944
+005a6e 5441
+005a6f 87c5              .db 0x12, 0x9F, 0x04, 0xC2, 0xFF, 0x89, 0x49, 0x4D, 0x4D, 0x45, 0x44, 0x49, 0x41, 0x54, 0xC5, 0x87
+005a70 4c12
+005a71 1b09
+005a72 640c
+005a73 4004
+005a74 08e0
+005a75 0782
+005a76 568a
+005a77 434f              .db 0x12, 0x4C, 0x09, 0x1B, 0x0C, 0x64, 0x04, 0x40, 0xE0, 0x08, 0x82, 0x07, 0x8A, 0x56, 0x4F, 0x43
+005a78 4241
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+005a7a 5241
+005a7b d5d9
+005a7c 4c12
+005a7d b309
+005a7e 2a0d
+005a7f 8104              .db 0x41, 0x42, 0x55, 0x4C, 0x41, 0x52, 0xD9, 0xD5, 0x12, 0x4C, 0x09, 0xB3, 0x0D, 0x2A, 0x04, 0x81
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+005a82 ef0a
+005a83 3a08
+005a84 4c0c
+005a85 300b
+005a86 820b
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+005a88 4c08
+005a89 820b
+005a8a 130a
+005a8b c309
+005a8c 210d
+005a8d be0b
+005a8e 130a
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+005a91 4f46
+005a92 5452
+005a93 ecc8
+005a94 cf12
+005a95 190d
+005a96 8113
+005a97 5aa0              .db 0x07, 0xC5, 0x46, 0x4F, 0x52, 0x54, 0xC8, 0xEC, 0x12, 0xCF, 0x0D, 0x19, 0x13, 0x81, 0xA0, 0x5A
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+005a9a 4544
+005a9b 4946
+005a9c 494e
+005a9d 4954
+005a9e 4e4f
+005a9f 21d3              .db 0x1B, 0x00, 0x00, 0x8B, 0x44, 0x45, 0x46, 0x49, 0x4E, 0x49, 0x54, 0x49, 0x4F, 0x4E, 0xD3, 0x21
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+005aa3 cb08
+005aa4 130a
+005aa5 8209
+005aa6 c107
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+005aaa 2904
+005aab 0fe3
+005aac 0782
+005aad 5184
+005aae 4955
+005aaf 4dd4              .db 0x13, 0x4C, 0x09, 0x64, 0x04, 0x29, 0xE3, 0x0F, 0x82, 0x07, 0x84, 0x51, 0x55, 0x49, 0xD4, 0x4D
+005ab0 4c13
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+005ab2 8b09
+005ab3 130a
+005ab4 2809
+005ab5 6e0d
+005ab6 5c07
+005ab7 2306              .db 0x13, 0x4C, 0x09, 0xD0, 0x09, 0x8B, 0x0A, 0x13, 0x09, 0x28, 0x0D, 0x6E, 0x07, 0x5C, 0x06, 0x23
+005ab8 930f
+005ab9 d612
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+005abc be07
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+005abe 6900
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+005ac2 ffe7
+005ac3 0782
+005ac4 4185
+005ac5 4f42
+005ac6 d452
+005ac7 135a              .db 0x4F, 0x4B, 0x9F, 0x04, 0xE7, 0xFF, 0x82, 0x07, 0x85, 0x41, 0x42, 0x4F, 0x52, 0xD4, 0x5A, 0x13
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+005acc 065c
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+005ad0 462d
+005ad1 524f
+005ad2 4854
+005ad3 2020
+005ad4 2e31
+005ad5 2930
+005ad6 4113
+005ad7 6113              .db 0x2D, 0x46, 0x4F, 0x52, 0x54, 0x48, 0x20, 0x20, 0x31, 0x2E, 0x30, 0x29, 0x13, 0x41, 0x13, 0x61
+005ad8 8413
+005ad9 4f43
+005ada c44c
+005adb 1388
+005adc 13ba
+005add 0cad
+005ade 8d04
+005adf 132f              .db 0x13, 0x84, 0x43, 0x4F, 0x4C, 0xC4, 0x88, 0x13, 0xBA, 0x13, 0xAD, 0x0C, 0x04, 0x8D, 0x2F, 0x13
+005ae0 0dad
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+005ae2 1330
+005ae3 15a0
+005ae4 02d0
+005ae5 0fa0
+005ae6 10ad
+005ae7 8504              .db 0xAD, 0x0D, 0x04, 0x8D, 0x30, 0x13, 0xA0, 0x15, 0xD0, 0x02, 0xA0, 0x0F, 0xAD, 0x10, 0x04, 0x85
+005ae8 adb4
+005ae9 0411
+005aea b585
+005aeb 0cb9
+005aec 9104
+005aed 88b4
+005aee f810
+005aef 13a9              .db 0xB4, 0xAD, 0x11, 0x04, 0x85, 0xB5, 0xB9, 0x0C, 0x04, 0x91, 0xB4, 0x88, 0x10, 0xF8, 0xA9, 0x13
+005af0 b085
+005af1 92a9
+005af2 af85
+005af3 a9d8
+005af4 856c
+005af5 4cb1
+005af6 0770
+005af7 5384              .db 0x85, 0xB0, 0xA9, 0x92, 0x85, 0xAF, 0xD8, 0xA9, 0x6C, 0x85, 0xB1, 0x4C, 0x70, 0x07, 0x84, 0x53
+005af8 3e2d
+005af9 b1c4
+005afa 4c13
+005afb b009
+005afc fe08
+005afd 4e07
+005afe 8208
+005aff 8207              .db 0x2D, 0x3E, 0xC4, 0xB1, 0x13, 0x4C, 0x09, 0xB0, 0x08, 0xFE, 0x07, 0x4E, 0x08, 0x82, 0x07, 0x82
+005b00 ad2b
+005b01 13ee
+005b02 094c
+005b03 07fe
+005b04 04be
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+005b07 0782              .db 0x2B, 0xAD, 0xEE, 0x13, 0x4C, 0x09, 0xFE, 0x07, 0xBE, 0x04, 0x04, 0x00, 0x4E, 0x08, 0x82, 0x07
+005b08 4483
+005b09 ad2b
+005b0a 13ff
+005b0b 094c
+005b0c 07fe
+005b0d 04be
+005b0e 0004
+005b0f 0867              .db 0x83, 0x44, 0x2B, 0xAD, 0xFF, 0x13, 0x4C, 0x09, 0xFE, 0x07, 0xBE, 0x04, 0x04, 0x00, 0x67, 0x08
+005b10 0782
+005b11 4183
+005b12 d342
+005b13 1410
+005b14 094c
+005b15 08b0
+005b16 1404
+005b17 0782              .db 0x82, 0x07, 0x83, 0x41, 0x42, 0xD3, 0x10, 0x14, 0x4C, 0x09, 0xB0, 0x08, 0x04, 0x14, 0x82, 0x07
+005b18 4484
+005b19 4241
+005b1a 22d3
+005b1b 4c14
+005b1c b009
+005b1d 1608
+005b1e 8214
+005b1f 8307              .db 0x84, 0x44, 0x41, 0x42, 0xD3, 0x22, 0x14, 0x4C, 0x09, 0xB0, 0x08, 0x16, 0x14, 0x82, 0x07, 0x83
+005b20 494d
+005b21 30ce
+005b22 4c14
+005b23 7e09
+005b24 7e08
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+005b26 be0b
+005b27 0404              .db 0x4D, 0x49, 0xCE, 0x30, 0x14, 0x4C, 0x09, 0x7E, 0x08, 0x7E, 0x08, 0xAF, 0x0B, 0xBE, 0x04, 0x04
+005b28 9800
+005b29 8f08
+005b2a 8208
+005b2b 8307
+005b2c 414d
+005b2d 3fd8
+005b2e 4c14
+005b2f 7e09              .db 0x00, 0x98, 0x08, 0x8F, 0x08, 0x82, 0x07, 0x83, 0x4D, 0x41, 0xD8, 0x3F, 0x14, 0x4C, 0x09, 0x7E
+005b30 7e08
+005b31 9208
+005b32 be0b
+005b33 0404
+005b34 9800
+005b35 8f08
+005b36 8208
+005b37 8207              .db 0x08, 0x7E, 0x08, 0x92, 0x0B, 0xBE, 0x04, 0x04, 0x00, 0x98, 0x08, 0x8F, 0x08, 0x82, 0x07, 0x82
+005b38 aa4d
+005b39 1457
+005b3a 094c
+005b3b 087e
+005b3c 087e
+005b3d 0739
+005b3e 07b0
+005b3f 1428              .db 0x4D, 0xAA, 0x57, 0x14, 0x4C, 0x09, 0x7E, 0x08, 0x7E, 0x08, 0x39, 0x07, 0xB0, 0x07, 0x28, 0x14
+005b40 0898
+005b41 1428
+005b42 068b
+005b43 07c2
+005b44 1416
+005b45 0782
+005b46 4d82
+005b47 6faf              .db 0x98, 0x08, 0x28, 0x14, 0x8B, 0x06, 0xC2, 0x07, 0x16, 0x14, 0x82, 0x07, 0x82, 0x4D, 0xAF, 0x6F
+005b48 4c14
+005b49 7e09
+005b4a b008
+005b4b b007
+005b4c 3707
+005b4d d314
+005b4e 2807
+005b4f be14              .db 0x14, 0x4C, 0x09, 0x7E, 0x08, 0xB0, 0x07, 0xB0, 0x07, 0x37, 0x14, 0xD3, 0x07, 0x28, 0x14, 0xBE
+005b50 c206
+005b51 d307
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+005b53 0407
+005b54 9814
+005b55 c208
+005b56 0407
+005b57 9814              .db 0x06, 0xC2, 0x07, 0xD3, 0x07, 0x39, 0x07, 0x04, 0x14, 0x98, 0x08, 0xC2, 0x07, 0x04, 0x14, 0x98
+005b58 8208
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+005b5a 8caa
+005b5b 4c14
+005b5c 8b09
+005b5d 8f06
+005b5e 8208
+005b5f 8407              .db 0x08, 0x82, 0x07, 0x81, 0xAA, 0x8C, 0x14, 0x4C, 0x09, 0x8B, 0x06, 0x8F, 0x08, 0x82, 0x07, 0x84
+005b60 4d2f
+005b61 c44f
+005b62 14b3
+005b63 094c
+005b64 07b0
+005b65 13f5
+005b66 07c2
+005b67 1491              .db 0x2F, 0x4D, 0x4F, 0xC4, 0xB3, 0x14, 0x4C, 0x09, 0xB0, 0x07, 0xF5, 0x13, 0xC2, 0x07, 0x91, 0x14
+005b68 0782
+005b69 af81
+005b6a 14bf
+005b6b 094c
+005b6c 14c6
+005b6d 0898
+005b6e 088f
+005b6f 0782              .db 0x82, 0x07, 0x81, 0xAF, 0xBF, 0x14, 0x4C, 0x09, 0xC6, 0x14, 0x98, 0x08, 0x8F, 0x08, 0x82, 0x07
+005b70 4d83
+005b71 c44f
+005b72 14d2
+005b73 094c
+005b74 14c6
+005b75 088f
+005b76 0782
+005b77 2a85              .db 0x83, 0x4D, 0x4F, 0xC4, 0xD2, 0x14, 0x4C, 0x09, 0xC6, 0x14, 0x8F, 0x08, 0x82, 0x07, 0x85, 0x2A
+005b78 4d2f
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+005b7b 094c
+005b7c 07b0
+005b7d 1474
+005b7e 07c2
+005b7f 1491              .db 0x2F, 0x4D, 0x4F, 0xC4, 0xE0, 0x14, 0x4C, 0x09, 0xB0, 0x07, 0x74, 0x14, 0xC2, 0x07, 0x91, 0x14
+005b80 0782
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+005b82 eeaf
+005b83 4c14
+005b84 f609
+005b85 9814
+005b86 8f08
+005b87 8208              .db 0x82, 0x07, 0x82, 0x2A, 0xAF, 0xEE, 0x14, 0x4C, 0x09, 0xF6, 0x14, 0x98, 0x08, 0x8F, 0x08, 0x82
+005b88 8507
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+005b8b 02c4
+005b8c 4c15
+005b8d b009
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+005b8f d309              .db 0x07, 0x85, 0x4D, 0x2F, 0x4D, 0x4F, 0xC4, 0x02, 0x15, 0x4C, 0x09, 0xB0, 0x07, 0xD0, 0x09, 0xD3
+005b90 be07
+005b91 c206
+005b92 9807
+005b93 b008
+005b94 be07
+005b95 c206
+005b96 8207
+005b97 8307              .db 0x07, 0xBE, 0x06, 0xC2, 0x07, 0x98, 0x08, 0xB0, 0x07, 0xBE, 0x06, 0xC2, 0x07, 0x82, 0x07, 0x83
+005b98 5355
+005b99 11c5
+005b9a a415
+005b9b 6009
+005b9c 843a
+005b9d 5250
+005b9e d645
+005b9f 152f              .db 0x55, 0x53, 0xC5, 0x11, 0x15, 0xA4, 0x09, 0x60, 0x3A, 0x84, 0x50, 0x52, 0x45, 0xD6, 0x2F, 0x15
+005ba0 09a4
+005ba1 3a60
+005ba2 2b84
+005ba3 5542
+005ba4 39c6
+005ba5 4c15
+005ba6 2a09
+005ba7 8404              .db 0xA4, 0x09, 0x60, 0x3A, 0x84, 0x2B, 0x42, 0x55, 0xC6, 0x39, 0x15, 0x4C, 0x09, 0x2A, 0x04, 0x84
+005ba8 0f00
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+005baa 1308
+005bab 790a
+005bac be0b
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+005bae 8f00
+005baf 0708              .db 0x00, 0x0F, 0x08, 0xB0, 0x08, 0x13, 0x0A, 0x79, 0x0B, 0xBE, 0x04, 0x06, 0x00, 0x8F, 0x08, 0x07
+005bb0 b00a
+005bb1 4008
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+005bb3 6d08
+005bb4 820b
+005bb5 8607
+005bb6 5055
+005bb7 4144              .db 0x0A, 0xB0, 0x08, 0x40, 0x15, 0xEF, 0x08, 0x6D, 0x0B, 0x82, 0x07, 0x86, 0x55, 0x50, 0x44, 0x41
+005bb8 c554
+005bb9 1544
+005bba 094c
+005bbb 1540
+005bbc 08ef
+005bbd 08ef
+005bbe 042a
+005bbf 8000              .db 0x54, 0xC5, 0x44, 0x15, 0x4C, 0x09, 0x40, 0x15, 0xEF, 0x08, 0xEF, 0x08, 0x2A, 0x04, 0x00, 0x80
+005bc0 0723
+005bc1 1540
+005bc2 08ef
+005bc3 0913
+005bc4 0782
+005bc5 4685
+005bc6 554c
+005bc7 c853              .db 0x23, 0x07, 0x40, 0x15, 0xEF, 0x08, 0x13, 0x09, 0x82, 0x07, 0x85, 0x46, 0x4C, 0x55, 0x53, 0xC8
+005bc8 156b
+005bc9 094c
+005bca 0a13
+005bcb 0a07
+005bcc 0b6d
+005bcd 0a1f
+005bce 0464
+005bcf 0f04              .db 0x6B, 0x15, 0x4C, 0x09, 0x13, 0x0A, 0x07, 0x0A, 0x6D, 0x0B, 0x1F, 0x0A, 0x64, 0x04, 0x04, 0x0F
+005bd0 d608
+005bd1 1414
+005bd2 d00b
+005bd3 4609
+005bd4 2a05
+005bd5 ff04
+005bd6 007f
+005bd7 8f16              .db 0x08, 0xD6, 0x14, 0x14, 0x0B, 0xD0, 0x09, 0x46, 0x05, 0x2A, 0x04, 0xFF, 0x7F, 0x00, 0x16, 0x8F
+005bd8 df08
+005bd9 f604
+005bda 82ff
+005bdb 8d07
+005bdc 4d45
+005bdd 5450
+005bde 2d59
+005bdf 5542              .db 0x08, 0xDF, 0x04, 0xF6, 0xFF, 0x82, 0x07, 0x8D, 0x45, 0x4D, 0x50, 0x54, 0x59, 0x2D, 0x42, 0x55
+005be0 4646
+005be1 5245
+005be2 8ad3
+005be3 4c15
+005be4 0709
+005be5 130a
+005be6 7e0a
+005be7 6d08              .db 0x46, 0x46, 0x45, 0x52, 0xD3, 0x8A, 0x15, 0x4C, 0x09, 0x07, 0x0A, 0x13, 0x0A, 0x7E, 0x08, 0x6D
+005be8 990b
+005be9 820f
+005bea 8307
+005beb 5244
+005bec b7b0
+005bed 4c15
+005bee d009
+005bef b109              .db 0x0B, 0x99, 0x0F, 0x82, 0x07, 0x83, 0x44, 0x52, 0xB0, 0xB7, 0x15, 0x4C, 0x09, 0xD0, 0x09, 0xB1
+005bf0 130a
+005bf1 8209
+005bf2 8307
+005bf3 5244
+005bf4 d5b1
+005bf5 4c15
+005bf6 2a09
+005bf7 2004              .db 0x0A, 0x13, 0x09, 0x82, 0x07, 0x83, 0x44, 0x52, 0xB1, 0xD5, 0x15, 0x4C, 0x09, 0x2A, 0x04, 0x20
+005bf8 b103
+005bf9 130a
+005bfa 8209
+005bfb 8607
+005bfc 5542
+005bfd 4646
+005bfe d245
+005bff 15e5              .db 0x03, 0xB1, 0x0A, 0x13, 0x09, 0x82, 0x07, 0x86, 0x42, 0x55, 0x46, 0x46, 0x45, 0xD2, 0xE5, 0x15
+005c00 094c
+005c01 1535
+005c02 08ef
+005c03 08b0
+005c04 07b0
+005c05 154b
+005c06 04be
+005c07 fffc              .db 0x4C, 0x09, 0x35, 0x15, 0xEF, 0x08, 0xB0, 0x08, 0xB0, 0x07, 0x4B, 0x15, 0xBE, 0x04, 0xFC, 0xFF
+005c08 1535
+005c09 0913
+005c0a 07d3
+005c0b 08ef
+005c0c 07fe
+005c0d 04be
+005c0e 0014
+005c0f 07d3              .db 0x35, 0x15, 0x13, 0x09, 0xD3, 0x07, 0xEF, 0x08, 0xFE, 0x07, 0xBE, 0x04, 0x14, 0x00, 0xD3, 0x07
+005c10 0b21
+005c11 07d3
+005c12 08ef
+005c13 042a
+005c14 7fff
+005c15 070e
+005c16 09d0
+005c17 17a0              .db 0x21, 0x0B, 0xD3, 0x07, 0xEF, 0x08, 0x2A, 0x04, 0xFF, 0x7F, 0x0E, 0x07, 0xD0, 0x09, 0xA0, 0x17
+005c18 07d3
+005c19 0913
+005c1a 07d3
+005c1b 1540
+005c1c 0913
+005c1d 07c2
+005c1e 0b21
+005c1f 0782              .db 0xD3, 0x07, 0x13, 0x09, 0xD3, 0x07, 0x40, 0x15, 0x13, 0x09, 0xC2, 0x07, 0x21, 0x0B, 0x82, 0x07
+005c20 4285
+005c21 4f4c
+005c22 cb43
+005c23 15f7
+005c24 094c
+005c25 0ab1
+005c26 08ef
+005c27 080f              .db 0x85, 0x42, 0x4C, 0x4F, 0x43, 0xCB, 0xF7, 0x15, 0x4C, 0x09, 0xB1, 0x0A, 0xEF, 0x08, 0x0F, 0x08
+005c28 07b0
+005c29 1540
+005c2a 08ef
+005c2b 08b0
+005c2c 08ef
+005c2d 07d3
+005c2e 0b6d
+005c2f 08b0              .db 0xB0, 0x07, 0x40, 0x15, 0xEF, 0x08, 0xB0, 0x08, 0xEF, 0x08, 0xD3, 0x07, 0x6D, 0x0B, 0xB0, 0x08
+005c30 080f
+005c31 04be
+005c32 0034
+005c33 154b
+005c34 07e9
+005c35 04be
+005c36 0014
+005c37 088f              .db 0x0F, 0x08, 0xBE, 0x04, 0x34, 0x00, 0x4B, 0x15, 0xE9, 0x07, 0xBE, 0x04, 0x14, 0x00, 0x8F, 0x08
+005c38 07d3
+005c39 1600
+005c3a 08b0
+005c3b 07d3
+005c3c 09d8
+005c3d 17a0
+005c3e 09e0
+005c3f 0b6d              .db 0xD3, 0x07, 0x00, 0x16, 0xB0, 0x08, 0xD3, 0x07, 0xD8, 0x09, 0xA0, 0x17, 0xE0, 0x09, 0x6D, 0x0B
+005c40 08b0
+005c41 08ef
+005c42 07d3
+005c43 0b6d
+005c44 08b0
+005c45 080f
+005c46 07e9
+005c47 04be              .db 0xB0, 0x08, 0xEF, 0x08, 0xD3, 0x07, 0x6D, 0x0B, 0xB0, 0x08, 0x0F, 0x08, 0xE9, 0x07, 0xBE, 0x04
+005c48 ffd6
+005c49 08b0
+005c4a 1540
+005c4b 0913
+005c4c 07c2
+005c4d 088f
+005c4e 0b21
+005c4f 0782              .db 0xD6, 0xFF, 0xB0, 0x08, 0x40, 0x15, 0x13, 0x09, 0xC2, 0x07, 0x8F, 0x08, 0x21, 0x0B, 0x82, 0x07
+005c50 2886
+005c51 494c
+005c52 454e
+005c53 40a9
+005c54 4c16
+005c55 b009
+005c56 fb07
+005c57 1f09              .db 0x86, 0x28, 0x4C, 0x49, 0x4E, 0x45, 0xA9, 0x40, 0x16, 0x4C, 0x09, 0xB0, 0x07, 0xFB, 0x09, 0x1F
+005c58 f60a
+005c59 c214
+005c5a 2b07
+005c5b b70a
+005c5c 0f14
+005c5d 4808
+005c5e 0f16
+005c5f fb08              .db 0x0A, 0xF6, 0x14, 0xC2, 0x07, 0x2B, 0x0A, 0xB7, 0x14, 0x0F, 0x08, 0x48, 0x16, 0x0F, 0x08, 0xFB
+005c60 8209
+005c61 8507
+005c62 4c2e
+005c63 4e49
+005c64 a0c5
+005c65 4c16
+005c66 a909
+005c67 3616              .db 0x09, 0x82, 0x07, 0x85, 0x2E, 0x4C, 0x49, 0x4E, 0xC5, 0xA0, 0x16, 0x4C, 0x09, 0xA9, 0x16, 0x36
+005c68 080e
+005c69 820e
+005c6a 8707
+005c6b 454d
+005c6c 5353
+005c6d 4741
+005c6e c3c5
+005c6f 4c16              .db 0x0E, 0x08, 0x0E, 0x82, 0x07, 0x87, 0x4D, 0x45, 0x53, 0x53, 0x41, 0x47, 0xC5, 0xC3, 0x16, 0x4C
+005c70 6109
+005c71 ef0a
+005c72 be08
+005c73 1b04
+005c74 e000
+005c75 be0b
+005c76 1104
+005c77 6400              .db 0x09, 0x61, 0x0A, 0xEF, 0x08, 0xBE, 0x04, 0x1B, 0x00, 0xE0, 0x0B, 0xBE, 0x04, 0x11, 0x00, 0x64
+005c78 0404
+005c79 0ab1
+005c7a 08ef
+005c7b 0a2b
+005c7c 14d6
+005c7d 0b6d
+005c7e 16cb
+005c7f 049f              .db 0x04, 0x04, 0xB1, 0x0A, 0xEF, 0x08, 0x2B, 0x0A, 0xD6, 0x14, 0x6D, 0x0B, 0xCB, 0x16, 0x9F, 0x04
+005c80 000d
+005c81 0e69
+005c82 4d06
+005c83 4753
+005c84 2320
+005c85 5320
+005c86 821a
+005c87 8407              .db 0x0D, 0x00, 0x69, 0x0E, 0x06, 0x4D, 0x53, 0x47, 0x20, 0x23, 0x20, 0x53, 0x1A, 0x82, 0x07, 0x84
+005c88 4f4c
+005c89 c441
+005c8a 16d5
+005c8b 094c
+005c8c 0a8b
+005c8d 08ef
+005c8e 07b0
+005c8f 0a93              .db 0x4C, 0x4F, 0x41, 0xC4, 0xD5, 0x16, 0x4C, 0x09, 0x8B, 0x0A, 0xEF, 0x08, 0xB0, 0x07, 0x93, 0x0A
+005c90 08ef
+005c91 07b0
+005c92 09d0
+005c93 0a93
+005c94 0913
+005c95 0a2b
+005c96 14b7
+005c97 0a8b              .db 0xEF, 0x08, 0xB0, 0x07, 0xD0, 0x09, 0x93, 0x0A, 0x13, 0x09, 0x2B, 0x0A, 0xB7, 0x14, 0x8B, 0x0A
+005c98 0913
+005c99 1293
+005c9a 07c2
+005c9b 0a93
+005c9c 0913
+005c9d 07c2
+005c9e 0a8b
+005c9f 0913              .db 0x13, 0x09, 0x93, 0x12, 0xC2, 0x07, 0x93, 0x0A, 0x13, 0x09, 0xC2, 0x07, 0x8B, 0x0A, 0x13, 0x09
+005ca0 0782
+005ca1 2dc3
+005ca2 be2d
+005ca3 170f
+005ca4 094c
+005ca5 0cf9
+005ca6 09d0
+005ca7 0a93              .db 0x82, 0x07, 0xC3, 0x2D, 0x2D, 0xBE, 0x0F, 0x17, 0x4C, 0x09, 0xF9, 0x0C, 0xD0, 0x09, 0x93, 0x0A
+005ca8 0913
+005ca9 0a2b
+005caa 0a8b
+005cab 08ef
+005cac 087e
+005cad 14e6
+005cae 0b6d
+005caf 0a8b              .db 0x13, 0x09, 0x2B, 0x0A, 0x8B, 0x0A, 0xEF, 0x08, 0x7E, 0x08, 0xE6, 0x14, 0x6D, 0x0B, 0x8B, 0x0A
+005cb0 08bf
+005cb1 0782
+005cb2 00b5
+005cb3 f420
+005cb4 4ca4
+005cb5 0556
+005cb6 dc20
+005cb7 4ca4              .db 0xBF, 0x08, 0x82, 0x07, 0xB5, 0x00, 0x20, 0xF4, 0xA4, 0x4C, 0x56, 0x05, 0x20, 0xDC, 0xA4, 0x4C
+005cb8 0752
+005cb9 0a20
+005cba a9a5
+005cbb 2a00
+005cbc 524c
+005cbd 2007
+005cbe a501
+005cbf 444c              .db 0x52, 0x07, 0x20, 0x0A, 0xA5, 0xA9, 0x00, 0x2A, 0x4C, 0x52, 0x07, 0x20, 0x01, 0xA5, 0x4C, 0x44
+005cc0 8404
+005cc1 422d
+005cc2 c443
+005cc3 1742
+005cc4 094c
+005cc5 09d0
+005cc6 0464
+005cc7 be0a              .db 0x04, 0x84, 0x2D, 0x42, 0x43, 0xC4, 0x42, 0x17, 0x4C, 0x09, 0xD0, 0x09, 0x64, 0x04, 0x0A, 0xBE
+005cc8 6406
+005cc9 1004
+005cca 14b7
+005ccb 0723
+005ccc 0782
+005ccd 5283
+005cce d753
+005ccf 1781              .db 0x06, 0x64, 0x04, 0x10, 0xB7, 0x14, 0x23, 0x07, 0x82, 0x07, 0x83, 0x52, 0x53, 0xD7, 0x81, 0x17
+005cd0 094c
+005cd1 07b0
+005cd2 0a1f
+005cd3 14b7
+005cd4 042a
+005cd5 4000
+005cd6 080f
+005cd7 08b0              .db 0x4C, 0x09, 0xB0, 0x07, 0x1F, 0x0A, 0xB7, 0x14, 0x2A, 0x04, 0x00, 0x40, 0x0F, 0x08, 0xB0, 0x08
+005cd8 042a
+005cd9 6800
+005cda 0baf
+005cdb 042a
+005cdc 0006
+005cdd 0c84
+005cde 07c2
+005cdf 04be              .db 0x2A, 0x04, 0x00, 0x68, 0xAF, 0x0B, 0x2A, 0x04, 0x06, 0x00, 0x84, 0x0C, 0xC2, 0x07, 0xBE, 0x04
+005ce0 0004
+005ce1 0898
+005ce2 0a1f
+005ce3 0666
+005ce4 0782
+005ce5 a7c1
+005ce6 179a
+005ce7 094c              .db 0x04, 0x00, 0x98, 0x08, 0x1F, 0x0A, 0x66, 0x06, 0x82, 0x07, 0xC1, 0xA7, 0x9A, 0x17, 0x4C, 0x09
+005ce8 1100
+005ce9 07e9
+005cea 09d0
+005ceb 0c84
+005cec 088f
+005ced 1234
+005cee 0782
+005cef 4686              .db 0x00, 0x11, 0xE9, 0x07, 0xD0, 0x09, 0x84, 0x0C, 0x8F, 0x08, 0x34, 0x12, 0x82, 0x07, 0x86, 0x46
+005cf0 524f
+005cf1 4547
+005cf2 cad4
+005cf3 4c17
+005cf4 ce09
+005cf5 4817
+005cf6 b00c
+005cf7 6c08              .db 0x4F, 0x52, 0x47, 0x45, 0xD4, 0xCA, 0x17, 0x4C, 0x09, 0xCE, 0x17, 0x48, 0x0C, 0xB0, 0x08, 0x6C
+005cf8 ef0a
+005cf9 8608
+005cfa 640b
+005cfb 1504
+005cfc 0c84
+005cfd 07b0
+005cfe 0a82
+005cff 08ef              .db 0x0A, 0xEF, 0x08, 0x86, 0x0B, 0x64, 0x04, 0x15, 0x84, 0x0C, 0xB0, 0x07, 0x82, 0x0A, 0xEF, 0x08
+005d00 07d3
+005d01 087e
+005d02 0b86
+005d03 04be
+005d04 0012
+005d05 1329
+005d06 1341
+005d07 08ef              .db 0xD3, 0x07, 0x7E, 0x08, 0x86, 0x0B, 0xBE, 0x04, 0x12, 0x00, 0x29, 0x13, 0x41, 0x13, 0xEF, 0x08
+005d08 08b0
+005d09 0a82
+005d0a 0913
+005d0b 049f
+005d0c ffe8
+005d0d 08b0
+005d0e 0464
+005d0f 6d04              .db 0xB0, 0x08, 0x82, 0x0A, 0x13, 0x09, 0x9F, 0x04, 0xE8, 0xFF, 0xB0, 0x08, 0x64, 0x04, 0x04, 0x6D
+005d10 5d0b
+005d11 2b0c
+005d12 ef0c
+005d13 b008
+005d14 d308
+005d15 8607
+005d16 be0b
+005d17 f204              .db 0x0B, 0x5D, 0x0C, 0x2B, 0x0C, 0xEF, 0x08, 0xB0, 0x08, 0xD3, 0x07, 0x86, 0x0B, 0xBE, 0x04, 0xF2
+005d18 7eff
+005d19 e008
+005d1a 6d09
+005d1b 130b
+005d1c ef09
+005d1d e008
+005d1e e90b
+005d1f be07              .db 0xFF, 0x7E, 0x08, 0xE0, 0x09, 0x6D, 0x0B, 0x13, 0x09, 0xEF, 0x08, 0xE0, 0x0B, 0xE9, 0x07, 0xBE
+005d20 d904
+005d21 c2ff
+005d22 7407
+005d23 130a
+005d24 8209
+005d25 8407
+005d26 4142
+005d27 cb43              .db 0x04, 0xD9, 0xFF, 0xC2, 0x07, 0x74, 0x0A, 0x13, 0x09, 0x82, 0x07, 0x84, 0x42, 0x41, 0x43, 0xCB
+005d28 17de
+005d29 094c
+005d2a 0b30
+005d2b 0b6d
+005d2c 0b4c
+005d2d 0782
+005d2e 42c5
+005d2f 4745              .db 0xDE, 0x17, 0x4C, 0x09, 0x30, 0x0B, 0x6D, 0x0B, 0x4C, 0x0B, 0x82, 0x07, 0xC5, 0x42, 0x45, 0x47
+005d30 ce49
+005d31 184b
+005d32 094c
+005d33 0c9e
+005d34 0b30
+005d35 09d8
+005d36 0782
+005d37 45c5              .db 0x49, 0xCE, 0x4B, 0x18, 0x4C, 0x09, 0x9E, 0x0C, 0x30, 0x0B, 0xD8, 0x09, 0x82, 0x07, 0xC5, 0x45
+005d38 444e
+005d39 c649
+005d3a 185c
+005d3b 094c
+005d3c 0c9e
+005d3d 09e0
+005d3e 0ccb
+005d3f 0b30              .db 0x4E, 0x44, 0x49, 0xC6, 0x5C, 0x18, 0x4C, 0x09, 0x9E, 0x0C, 0xE0, 0x09, 0xCB, 0x0C, 0x30, 0x0B
+005d40 087e
+005d41 0b6d
+005d42 0898
+005d43 0913
+005d44 0782
+005d45 54c4
+005d46 4548
+005d47 6ece              .db 0x7E, 0x08, 0x6D, 0x0B, 0x98, 0x08, 0x13, 0x09, 0x82, 0x07, 0xC4, 0x54, 0x48, 0x45, 0xCE, 0x6E
+005d48 4c18
+005d49 7609
+005d4a 8218
+005d4b c207
+005d4c cf44
+005d4d 188a
+005d4e 094c
+005d4f 0d12              .db 0x18, 0x4C, 0x09, 0x76, 0x18, 0x82, 0x07, 0xC2, 0x44, 0xCF, 0x8A, 0x18, 0x4C, 0x09, 0x12, 0x0D
+005d50 0546
+005d51 0b30
+005d52 09e8
+005d53 0782
+005d54 4cc4
+005d55 4f4f
+005d56 97d0
+005d57 4c18              .db 0x46, 0x05, 0x30, 0x0B, 0xE8, 0x09, 0x82, 0x07, 0xC4, 0x4C, 0x4F, 0x4F, 0xD0, 0x97, 0x18, 0x4C
+005d58 e809
+005d59 cb09
+005d5a 120c
+005d5b df0d
+005d5c 5204
+005d5d 8218
+005d5e c507
+005d5f 4c2b              .db 0x09, 0xE8, 0x09, 0xCB, 0x0C, 0x12, 0x0D, 0xDF, 0x04, 0x52, 0x18, 0x82, 0x07, 0xC5, 0x2B, 0x4C
+005d60 4f4f
+005d61 a8d0
+005d62 4c18
+005d63 e809
+005d64 cb09
+005d65 120c
+005d66 0f0d
+005d67 5205              .db 0x4F, 0x4F, 0xD0, 0xA8, 0x18, 0x4C, 0x09, 0xE8, 0x09, 0xCB, 0x0C, 0x12, 0x0D, 0x0F, 0x05, 0x52
+005d68 8218
+005d69 c507
+005d6a 4e55
+005d6b 4954
+005d6c bdcc
+005d6d 4c18
+005d6e d809
+005d6f cb09              .db 0x18, 0x82, 0x07, 0xC5, 0x55, 0x4E, 0x54, 0x49, 0xCC, 0xBD, 0x18, 0x4C, 0x09, 0xD8, 0x09, 0xCB
+005d70 120c
+005d71 be0d
+005d72 5204
+005d73 8218
+005d74 c307
+005d75 4e45
+005d76 d3c4
+005d77 4c18              .db 0x0C, 0x12, 0x0D, 0xBE, 0x04, 0x52, 0x18, 0x82, 0x07, 0xC3, 0x45, 0x4E, 0xC4, 0xD3, 0x18, 0x4C
+005d78 db09
+005d79 8218
+005d7a c507
+005d7b 4741
+005d7c 4941
+005d7d e9ce
+005d7e 4c18
+005d7f d809              .db 0x09, 0xDB, 0x18, 0x82, 0x07, 0xC5, 0x41, 0x47, 0x41, 0x49, 0xCE, 0xE9, 0x18, 0x4C, 0x09, 0xD8
+005d80 cb09
+005d81 120c
+005d82 9f0d
+005d83 5204
+005d84 8218
+005d85 c607
+005d86 4552
+005d87 4550              .db 0x09, 0xCB, 0x0C, 0x12, 0x0D, 0x9F, 0x04, 0x52, 0x18, 0x82, 0x07, 0xC6, 0x52, 0x45, 0x50, 0x45
+005d88 d441
+005d89 18f5
+005d8a 094c
+005d8b 07b0
+005d8c 07b0
+005d8d 18fd
+005d8e 07c2
+005d8f 07c2              .db 0x41, 0xD4, 0xF5, 0x18, 0x4C, 0x09, 0xB0, 0x07, 0xB0, 0x07, 0xFD, 0x18, 0xC2, 0x07, 0xC2, 0x07
+005d90 09e0
+005d91 0b6d
+005d92 1876
+005d93 0782
+005d94 49c2
+005d95 0bc6
+005d96 4c19
+005d97 1209              .db 0xE0, 0x09, 0x6D, 0x0B, 0x76, 0x18, 0x82, 0x07, 0xC2, 0x49, 0xC6, 0x0B, 0x19, 0x4C, 0x09, 0x12
+005d98 be0d
+005d99 3004
+005d9a d00b
+005d9b 4c09
+005d9c e00b
+005d9d 8209
+005d9e c407
+005d9f 4c45              .db 0x0D, 0xBE, 0x04, 0x30, 0x0B, 0xD0, 0x09, 0x4C, 0x0B, 0xE0, 0x09, 0x82, 0x07, 0xC4, 0x45, 0x4C
+005da0 c553
+005da1 1928
+005da2 094c
+005da3 09e0
+005da4 0ccb
+005da5 0d12
+005da6 049f
+005da7 0b30              .db 0x53, 0xC5, 0x28, 0x19, 0x4C, 0x09, 0xE0, 0x09, 0xCB, 0x0C, 0x12, 0x0D, 0x9F, 0x04, 0x30, 0x0B
+005da8 09d0
+005da9 0b4c
+005daa 0898
+005dab 09e0
+005dac 1876
+005dad 09e0
+005dae 0782
+005daf 57c5              .db 0xD0, 0x09, 0x4C, 0x0B, 0x98, 0x08, 0xE0, 0x09, 0x76, 0x18, 0xE0, 0x09, 0x82, 0x07, 0xC5, 0x57
+005db0 4948
+005db1 c54c
+005db2 193d
+005db3 094c
+005db4 192d
+005db5 0b21
+005db6 0782
+005db7 5386              .db 0x48, 0x49, 0x4C, 0xC5, 0x3D, 0x19, 0x4C, 0x09, 0x2D, 0x19, 0x21, 0x0B, 0x82, 0x07, 0x86, 0x53
+005db8 4150
+005db9 4543
+005dba 5ed3
+005dbb 4c19
+005dbc d009
+005dbd 5d09
+005dbe e014
+005dbf be0b              .db 0x50, 0x41, 0x43, 0x45, 0xD3, 0x5E, 0x19, 0x4C, 0x09, 0xD0, 0x09, 0x5D, 0x14, 0xE0, 0x0B, 0xBE
+005dc0 0c04
+005dc1 d000
+005dc2 4609
+005dc3 d105
+005dc4 df0b
+005dc5 fc04
+005dc6 82ff
+005dc7 8207              .db 0x04, 0x0C, 0x00, 0xD0, 0x09, 0x46, 0x05, 0xD1, 0x0B, 0xDF, 0x04, 0xFC, 0xFF, 0x82, 0x07, 0x82
+005dc8 a33c
+005dc9 196e
+005dca 094c
+005dcb 0fd1
+005dcc 0b0c
+005dcd 0913
+005dce 0782
+005dcf 2382              .db 0x3C, 0xA3, 0x6E, 0x19, 0x4C, 0x09, 0xD1, 0x0F, 0x0C, 0x0B, 0x13, 0x09, 0x82, 0x07, 0x82, 0x23
+005dd0 8fbe
+005dd1 4c19
+005dd2 8f09
+005dd3 8f08
+005dd4 0c08
+005dd5 ef0b
+005dd6 d108
+005dd7 7e0f              .db 0xBE, 0x8F, 0x19, 0x4C, 0x09, 0x8F, 0x08, 0x8F, 0x08, 0x0C, 0x0B, 0xEF, 0x08, 0xD1, 0x0F, 0x7E
+005dd8 6d08
+005dd9 820b
+005dda 8407
+005ddb 4953
+005ddc ce47
+005ddd 199e
+005dde 094c
+005ddf 0bbd              .db 0x08, 0x6D, 0x0B, 0x82, 0x07, 0x84, 0x53, 0x49, 0x47, 0xCE, 0x9E, 0x19, 0x4C, 0x09, 0xBD, 0x0B
+005de0 07fe
+005de1 04be
+005de2 0007
+005de3 0464
+005de4 b92d
+005de5 820f
+005de6 8107
+005de7 b5a3              .db 0xFE, 0x07, 0xBE, 0x04, 0x07, 0x00, 0x64, 0x04, 0x2D, 0xB9, 0x0F, 0x82, 0x07, 0x81, 0xA3, 0xB5
+005de8 4c19
+005de9 e009
+005dea ef0a
+005deb 1908
+005dec bd15
+005ded 640b
+005dee 0904
+005def 087e              .db 0x19, 0x4C, 0x09, 0xE0, 0x0A, 0xEF, 0x08, 0x19, 0x15, 0xBD, 0x0B, 0x64, 0x04, 0x09, 0x7E, 0x08
+005df0 0b92
+005df1 04be
+005df2 0007
+005df3 0464
+005df4 0f07
+005df5 6408
+005df6 3004
+005df7 080f              .db 0x92, 0x0B, 0xBE, 0x04, 0x07, 0x00, 0x64, 0x04, 0x07, 0x0F, 0x08, 0x64, 0x04, 0x30, 0x0F, 0x08
+005df8 0fb9
+005df9 0782
+005dfa 2382
+005dfb cdd3
+005dfc 4c19
+005dfd d109
+005dfe 7e19
+005dff 7e08              .db 0xB9, 0x0F, 0x82, 0x07, 0x82, 0x23, 0xD3, 0xCD, 0x19, 0x4C, 0x09, 0xD1, 0x19, 0x7E, 0x08, 0x7E
+005e00 2308
+005e01 e907
+005e02 be07
+005e03 f404
+005e04 82ff
+005e05 8307
+005e06 2e44
+005e07 f4d2              .db 0x08, 0x23, 0x07, 0xE9, 0x07, 0xBE, 0x04, 0xF4, 0xFF, 0x82, 0x07, 0x83, 0x44, 0x2E, 0xD2, 0xF4
+005e08 4c19
+005e09 b009
+005e0a 9807
+005e0b 7e08
+005e0c 3708
+005e0d 9414
+005e0e f919
+005e0f bc19              .db 0x19, 0x4C, 0x09, 0xB0, 0x07, 0x98, 0x08, 0x7E, 0x08, 0x37, 0x14, 0x94, 0x19, 0xF9, 0x19, 0xBC
+005e10 a319
+005e11 c219
+005e12 7e07
+005e13 6d08
+005e14 770b
+005e15 0819
+005e16 820e
+005e17 8207              .db 0x19, 0xA3, 0x19, 0xC2, 0x07, 0x7E, 0x08, 0x6D, 0x0B, 0x77, 0x19, 0x08, 0x0E, 0x82, 0x07, 0x82
+005e18 ae44
+005e19 1a0b
+005e1a 094c
+005e1b 09d0
+005e1c 1a11
+005e1d 0bd1
+005e1e 0782
+005e1f 2e82              .db 0x44, 0xAE, 0x0B, 0x1A, 0x4C, 0x09, 0xD0, 0x09, 0x11, 0x1A, 0xD1, 0x0B, 0x82, 0x07, 0x82, 0x2E
+005e20 2fd2
+005e21 4c1a
+005e22 b009
+005e23 f507
+005e24 c213
+005e25 1107
+005e26 821a
+005e27 8107              .db 0xD2, 0x2F, 0x1A, 0x4C, 0x09, 0xB0, 0x07, 0xF5, 0x13, 0xC2, 0x07, 0x11, 0x1A, 0x82, 0x07, 0x81
+005e28 3eae
+005e29 4c1a
+005e2a f509
+005e2b 3413
+005e2c 821a
+005e2d 8107
+005e2e 4fbf
+005e2f 4c1a              .db 0xAE, 0x3E, 0x1A, 0x4C, 0x09, 0xF5, 0x13, 0x34, 0x1A, 0x82, 0x07, 0x81, 0xBF, 0x4F, 0x1A, 0x4C
+005e30 ef09
+005e31 5308
+005e32 821a
+005e33 8407
+005e34 494c
+005e35 d453
+005e36 1a5b
+005e37 094c              .db 0x09, 0xEF, 0x08, 0x53, 0x1A, 0x82, 0x07, 0x84, 0x4C, 0x49, 0x53, 0xD4, 0x5B, 0x1A, 0x4C, 0x09
+005e38 0d70
+005e39 065c
+005e3a 08b0
+005e3b 0aa5
+005e3c 0913
+005e3d 0e69
+005e3e 5306
+005e3f 5243              .db 0x70, 0x0D, 0x5C, 0x06, 0xB0, 0x08, 0xA5, 0x0A, 0x13, 0x09, 0x69, 0x0E, 0x06, 0x53, 0x43, 0x52
+005e40 2320
+005e41 5320
+005e42 641a
+005e43 1004
+005e44 09d0
+005e45 0546
+005e46 065c
+005e47 055f              .db 0x20, 0x23, 0x20, 0x53, 0x1A, 0x64, 0x04, 0x10, 0xD0, 0x09, 0x46, 0x05, 0x5C, 0x06, 0x5F, 0x05
+005e48 09e8
+005e49 1a43
+005e4a 0bd1
+005e4b 055f
+005e4c 0aa5
+005e4d 08ef
+005e4e 16cb
+005e4f 04df              .db 0xE8, 0x09, 0x43, 0x1A, 0xD1, 0x0B, 0x5F, 0x05, 0xA5, 0x0A, 0xEF, 0x08, 0xCB, 0x16, 0xDF, 0x04
+005e50 ffec
+005e51 065c
+005e52 0782
+005e53 4985
+005e54 444e
+005e55 d845
+005e56 1a67
+005e57 094c              .db 0xEC, 0xFF, 0x5C, 0x06, 0x82, 0x07, 0x85, 0x49, 0x4E, 0x44, 0x45, 0xD8, 0x67, 0x1A, 0x4C, 0x09
+005e58 065c
+005e59 0b14
+005e5a 0898
+005e5b 0546
+005e5c 065c
+005e5d 055f
+005e5e 09e8
+005e5f 1a43              .db 0x5C, 0x06, 0x14, 0x0B, 0x98, 0x08, 0x46, 0x05, 0x5C, 0x06, 0x5F, 0x05, 0xE8, 0x09, 0x43, 0x1A
+005e60 0bd1
+005e61 09d0
+005e62 055f
+005e63 16cb
+005e64 0655
+005e65 04be
+005e66 0004
+005e67 0795              .db 0xD1, 0x0B, 0xD0, 0x09, 0x5F, 0x05, 0xCB, 0x16, 0x55, 0x06, 0xBE, 0x04, 0x04, 0x00, 0x95, 0x07
+005e68 04df
+005e69 ffe6
+005e6a 0464
+005e6b 3f0c
+005e6c 8206
+005e6d 8507
+005e6e 5254
+005e6f 4149              .db 0xDF, 0x04, 0xE6, 0xFF, 0x64, 0x04, 0x0C, 0x3F, 0x06, 0x82, 0x07, 0x85, 0x54, 0x52, 0x49, 0x41
+005e70 a6c4
+005e71 4c1a
+005e72 e809
+005e73 d609
+005e74 e814
+005e75 b709
+005e76 e814
+005e77 7e09              .db 0xC4, 0xA6, 0x1A, 0x4C, 0x09, 0xE8, 0x09, 0xD6, 0x14, 0xE8, 0x09, 0xB7, 0x14, 0xE8, 0x09, 0x7E
+005e78 0f08
+005e79 9808
+005e7a 4608
+005e7b 5c05
+005e7c 5f06
+005e7d 6e05
+005e7e df1a
+005e7f f804              .db 0x08, 0x0F, 0x08, 0x98, 0x08, 0x46, 0x05, 0x5C, 0x06, 0x5F, 0x05, 0x6E, 0x1A, 0xDF, 0x04, 0xF8
+005e80 5cff
+005e81 6406
+005e82 0f04
+005e83 16df
+005e84 065c
+005e85 0464
+005e86 3f0c
+005e87 8206              .db 0xFF, 0x5C, 0x06, 0x64, 0x04, 0x0F, 0xDF, 0x16, 0x5C, 0x06, 0x64, 0x04, 0x0C, 0x3F, 0x06, 0x82
+005e88 8507
+005e89 4c56
+005e8a 5349
+005e8b dbd4
+005e8c 4c1a
+005e8d 6409
+005e8e 8004
+005e8f 0a9c              .db 0x07, 0x85, 0x56, 0x4C, 0x49, 0x53, 0xD4, 0xDB, 0x1A, 0x4C, 0x09, 0x64, 0x04, 0x80, 0x9C, 0x0A
+005e90 0913
+005e91 0abe
+005e92 08ef
+005e93 08ef
+005e94 0a9c
+005e95 08ef
+005e96 09fb
+005e97 0baf              .db 0x13, 0x09, 0xBE, 0x0A, 0xEF, 0x08, 0xEF, 0x08, 0x9C, 0x0A, 0xEF, 0x08, 0xFB, 0x09, 0xAF, 0x0B
+005e98 04be
+005e99 000a
+005e9a 065c
+005e9b 09d0
+005e9c 0a9c
+005e9d 0913
+005e9e 08b0
+005e9f 1175              .db 0xBE, 0x04, 0x0A, 0x00, 0x5C, 0x06, 0xD0, 0x09, 0x9C, 0x0A, 0x13, 0x09, 0xB0, 0x08, 0x75, 0x11
+005ea0 0bd1
+005ea1 0bd1
+005ea2 0c5d
+005ea3 0c2b
+005ea4 08ef
+005ea5 08b0
+005ea6 07e9
+005ea7 0655              .db 0xD1, 0x0B, 0xD1, 0x0B, 0x5D, 0x0C, 0x2B, 0x0C, 0xEF, 0x08, 0xB0, 0x08, 0xE9, 0x07, 0x55, 0x06
+005ea8 0723
+005ea9 04be
+005eaa ffd4
+005eab 088f
+005eac 0782
+005ead 4d83
+005eae ce4f
+005eaf 1b11              .db 0x23, 0x07, 0xBE, 0x04, 0xD4, 0xFF, 0x8F, 0x08, 0x82, 0x07, 0x83, 0x4D, 0x4F, 0xCE, 0x11, 0x1B
+005eb0 1b62
+005eb1 f76c
+005eb2 a903
+005eb3 8500
+005eb4 a900
+005eb5 8504
+005eb6 a901
+005eb7 8500              .db 0x62, 0x1B, 0x6C, 0xF7, 0x03, 0xA9, 0x00, 0x85, 0x00, 0xA9, 0x04, 0x85, 0x01, 0xA9, 0x00, 0x85
+005eb8 a902
+005eb9 85a6
+005eba b203
+005ebb 9202
+005ebc e600
+005ebd d000
+005ebe e602
+005ebf e601              .db 0x02, 0xA9, 0xA6, 0x85, 0x03, 0xB2, 0x02, 0x92, 0x00, 0xE6, 0x00, 0xD0, 0x02, 0xE6, 0x01, 0xE6
+005ec0 d002
+005ec1 e602
+005ec2 3803
+005ec3 65a9
+005ec4 bda2
+005ec5 02e5
+005ec6 e58a
+005ec7 b003              .db 0x02, 0xD0, 0x02, 0xE6, 0x03, 0x38, 0xA9, 0x65, 0xA2, 0xBD, 0xE5, 0x02, 0x8A, 0xE5, 0x03, 0xB0
+005ec8 4ce4
+005ec9 0400
+005eca 0000
+005ecb 0000
+005ecc 0000
+005ecd 0000
+005ece 0000
+005ecf 0000              .db 0xE4, 0x4C, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+005ed0 0000
+005ed1 0000
+005ed2 0000
+005ed3 0000
+005ed4 0000
+005ed5 0000
+005ed6 0000
+005ed7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+005ed8 0000
+005ed9 0000
+005eda 0000
+005edb 0000
+005edc 0000
+005edd 0000
+005ede 0000
+005edf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+005ee0 0000
+005ee1 0000
+005ee2 0000
+005ee3 0000
+005ee4 0000
+005ee5 0000
+005ee6 0000
+005ee7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+005ee8 0000
+005ee9 0000
+005eea 0000
+005eeb 0000
+005eec 0000
+005eed 0000
+005eee 0000
+005eef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+005ef0 0000
+005ef1 0000
+005ef2 0000
+005ef3 0000
+005ef4 0000
+005ef5 0000
+005ef6 0000
+005ef7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+005ef8 0000
+005ef9 0000
+005efa 0000
+005efb 0000
+005efc 0000
+005efd 0000
+005efe 0000
+005eff 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+005f00 04a0
+005f01 f6b9
+005f02 99de
+005f03 0400
+005f04 1088
+005f05 a2f7
+005f06 86ff
+005f07 9a88              .db 0xA0, 0x04, 0xB9, 0xF6, 0xDE, 0x99, 0x00, 0x04, 0x88, 0x10, 0xF7, 0xA2, 0xFF, 0x86, 0x88, 0x9A
+005f08 4ca9
+005f09 a185
+005f0a 1ca2
+005f0b fabd
+005f0c 95de
+005f0d cabb
+005f0e f8d0
+005f0f 12a2              .db 0xA9, 0x4C, 0x85, 0xA1, 0xA2, 0x1C, 0xBD, 0xFA, 0xDE, 0x95, 0xBB, 0xCA, 0xD0, 0xF8, 0xA2, 0x12
+005f10 17bd
+005f11 95df
+005f12 ca00
+005f13 f810
+005f14 00a9
+005f15 dc85
+005f16 df85
+005f17 b285              .db 0xBD, 0x17, 0xDF, 0x95, 0x00, 0xCA, 0x10, 0xF8, 0xA9, 0x00, 0x85, 0xDC, 0x85, 0xDF, 0x85, 0xB2
+005f18 6785
+005f19 0ea9
+005f1a 6485
+005f1b 03a9
+005f1c a085
+005f1d 68a2
+005f1e 6586
+005f1f 9220              .db 0x85, 0x67, 0xA9, 0x0E, 0x85, 0x64, 0xA9, 0x03, 0x85, 0xA0, 0xA2, 0x68, 0x86, 0x65, 0x20, 0x92
+005f20 a9c6
+005f21 a02a
+005f22 20df
+005f23 c6d3
+005f24 4020
+005f25 86c0
+005f26 84c3
+005f27 20c4              .db 0xC6, 0xA9, 0x2A, 0xA0, 0xDF, 0x20, 0xD3, 0xC6, 0x20, 0x40, 0xC0, 0x86, 0xC3, 0x84, 0xC4, 0x20
+005f28 00c2
+005f29 1fd0
+005f2a 00a0
+005f2b 11e6
+005f2c 08d0
+005f2d 12e6
+005f2e 12a5
+005f2f 3fc9              .db 0xC2, 0x00, 0xD0, 0x1F, 0xA0, 0x00, 0xE6, 0x11, 0xD0, 0x08, 0xE6, 0x12, 0xA5, 0x12, 0xC9, 0x3F
+005f30 1df0
+005f31 55a9
+005f32 1191
+005f33 11d1
+005f34 15d0
+005f35 910a
+005f36 d111
+005f37 f011              .db 0xF0, 0x1D, 0xA9, 0x55, 0x91, 0x11, 0xD1, 0x11, 0xD0, 0x15, 0x0A, 0x91, 0x11, 0xD1, 0x11, 0xF0
+005f38 d0e5
+005f39 200c
+005f3a d7a6
+005f3b aca5
+005f3c 98c9
+005f3d a2b0
+005f3e f720
+005f3f a5d2              .db 0xE5, 0xD0, 0x0C, 0x20, 0xA6, 0xD7, 0xA5, 0xAC, 0xC9, 0x98, 0xB0, 0xA2, 0x20, 0xF7, 0xD2, 0xA5
+005f40 a411
+005f41 c012
+005f42 9001
+005f43 8597
+005f44 8485
+005f45 8586
+005f46 8481
+005f47 a082              .db 0x11, 0xA4, 0x12, 0xC0, 0x01, 0x90, 0x97, 0x85, 0x85, 0x84, 0x86, 0x85, 0x81, 0x84, 0x82, 0xA0
+005f48 a200
+005f49 8405
+005f4a 8679
+005f4b 987a
+005f4c 7991
+005f4d 79e6
+005f4e 9220
+005f4f 20c6              .db 0x00, 0xA2, 0x05, 0x84, 0x79, 0x86, 0x7A, 0x98, 0x91, 0x79, 0xE6, 0x79, 0x20, 0x92, 0xC6, 0x20
+005f50 c150
+005f51 85a5
+005f52 e538
+005f53 aa79
+005f54 86a5
+005f55 7ae5
+005f56 8220
+005f57 a9d8              .db 0x50, 0xC1, 0xA5, 0x85, 0x38, 0xE5, 0x79, 0xAA, 0xA5, 0x86, 0xE5, 0x7A, 0x20, 0x82, 0xD8, 0xA9
+005f58 a039
+005f59 20df
+005f5a c6d3
+005f5b 5aa9
+005f5c bfa0
+005f5d 0185
+005f5e 0284
+005f5f 016c              .db 0x39, 0xA0, 0xDF, 0x20, 0xD3, 0xC6, 0xA9, 0x5A, 0xA0, 0xBF, 0x85, 0x01, 0x84, 0x02, 0x6C, 0x01
+005f60 2000
+005f61 bf0b
+005f62 7f85
+005f63 8084
+005f64 a538
+005f65 e5a6
+005f66 a8aa
+005f67 a7a5              .db 0x00, 0x20, 0x0B, 0xBF, 0x85, 0x7F, 0x84, 0x80, 0x38, 0xA5, 0xA6, 0xE5, 0xAA, 0xA8, 0xA5, 0xA7
+005f68 abe5
+005f69 e8aa
+005f6a f098
+005f6b 3824
+005f6c ff49
+005f6d a665
+005f6e a685
+005f6f 03b0              .db 0xE5, 0xAB, 0xAA, 0xE8, 0x98, 0xF0, 0x24, 0x38, 0x49, 0xFF, 0x65, 0xA6, 0x85, 0xA6, 0xB0, 0x03
+005f70 a7c6
+005f71 9838
+005f72 ff49
+005f73 a465
+005f74 a485
+005f75 08b0
+005f76 a5c6
+005f77 0490              .db 0xC6, 0xA7, 0x38, 0x98, 0x49, 0xFF, 0x65, 0xA4, 0x85, 0xA4, 0xB0, 0x08, 0xC6, 0xA5, 0x90, 0x04
+005f78 a6b1
+005f79 a491
+005f7a d088
+005f7b b1f9
+005f7c 91a6
+005f7d c6a4
+005f7e c6a7
+005f7f caa5              .db 0xB1, 0xA6, 0x91, 0xA4, 0x88, 0xD0, 0xF9, 0xB1, 0xA6, 0x91, 0xA4, 0xC6, 0xA7, 0xC6, 0xA5, 0xCA
+005f80 f2d0
+005f81 8560
+005f82 ba78
+005f83 78e4
+005f84 3090
+005f85 c460
+005f86 9082
+005f87 d02a              .db 0xD0, 0xF2, 0x60, 0x85, 0x78, 0xBA, 0xE4, 0x78, 0x90, 0x30, 0x60, 0xC4, 0x82, 0x90, 0x2A, 0xD0
+005f88 c504
+005f89 9081
+005f8a 4824
+005f8b 08a2
+005f8c 4898
+005f8d a3b5
+005f8e 10ca
+005f8f 20fa              .db 0x04, 0xC5, 0x81, 0x90, 0x24, 0x48, 0xA2, 0x08, 0x98, 0x48, 0xB5, 0xA3, 0xCA, 0x10, 0xFA, 0x20
+005f90 cfdf
+005f91 00a2
+005f92 9568
+005f93 e8a4
+005f94 08e0
+005f95 f830
+005f96 a868
+005f97 c468              .db 0xDF, 0xCF, 0xA2, 0x00, 0x68, 0x95, 0xA4, 0xE8, 0xE0, 0x08, 0x30, 0xF8, 0x68, 0xA8, 0x68, 0xC4
+005f98 9082
+005f99 d006
+005f9a c505
+005f9b b081
+005f9c 6001
+005f9d 0ca2
+005f9e 9220
+005f9f bdc6              .db 0x82, 0x90, 0x06, 0xD0, 0x05, 0xC5, 0x81, 0xB0, 0x01, 0x60, 0xA2, 0x0C, 0x20, 0x92, 0xC6, 0xBD
+005fa0 e4b2
+005fa1 b3bc
+005fa2 20e4
+005fa3 c6d3
+005fa4 8920
+005fa5 a9c1
+005fa6 a0ef
+005fa7 20e5              .db 0xB2, 0xE4, 0xBC, 0xB3, 0xE4, 0x20, 0xD3, 0xC6, 0x20, 0x89, 0xC1, 0xA9, 0xEF, 0xA0, 0xE5, 0x20
+005fa8 c6d3
+005fa9 88a4
+005faa f0c8
+005fab 2003
+005fac d877
+005fad 00a9
+005fae df85
+005faf dc85              .db 0xD3, 0xC6, 0xA4, 0x88, 0xC8, 0xF0, 0x03, 0x20, 0x77, 0xD8, 0xA9, 0x00, 0x85, 0xDF, 0x85, 0xDC
+005fb0 00a9
+005fb1 e6a0
+005fb2 d320
+005fb3 20c6
+005fb4 c04d
+005fb5 c386
+005fb6 c484
+005fb7 c220              .db 0xA9, 0x00, 0xA0, 0xE6, 0x20, 0xD3, 0xC6, 0x20, 0x4D, 0xC0, 0x86, 0xC3, 0x84, 0xC4, 0x20, 0xC2
+005fb8 f000
+005fb9 a2f4
+005fba 86ff
+005fbb 9088
+005fbc 2006
+005fbd c07e
+005fbe f34c
+005fbf 20c2              .db 0x00, 0xF0, 0xF4, 0xA2, 0xFF, 0x86, 0x88, 0x90, 0x06, 0x20, 0x7E, 0xC0, 0x4C, 0xF3, 0xC2, 0x20
+005fc0 c555
+005fc1 7e20
+005fc2 84c0
+005fc3 205d
+005fc4 c124
+005fc5 4490
+005fc6 01a0
+005fc7 aab1              .db 0x55, 0xC5, 0x20, 0x7E, 0xC0, 0x84, 0x5D, 0x20, 0x24, 0xC1, 0x90, 0x44, 0xA0, 0x01, 0xB1, 0xAA
+005fc8 7285
+005fc9 7ba5
+005fca 7185
+005fcb aba5
+005fcc 7485
+005fcd aaa5
+005fce f188
+005fcf 18aa              .db 0x85, 0x72, 0xA5, 0x7B, 0x85, 0x71, 0xA5, 0xAB, 0x85, 0x74, 0xA5, 0xAA, 0x88, 0xF1, 0xAA, 0x18
+005fd0 7b65
+005fd1 7b85
+005fd2 7385
+005fd3 7ca5
+005fd4 ff69
+005fd5 7c85
+005fd6 abe5
+005fd7 38aa              .db 0x65, 0x7B, 0x85, 0x7B, 0x85, 0x73, 0xA5, 0x7C, 0x69, 0xFF, 0x85, 0x7C, 0xE5, 0xAB, 0xAA, 0x38
+005fd8 aaa5
+005fd9 7be5
+005fda b0a8
+005fdb e803
+005fdc 74c6
+005fdd 6518
+005fde 9071
+005fdf c603              .db 0xA5, 0xAA, 0xE5, 0x7B, 0xA8, 0xB0, 0x03, 0xE8, 0xC6, 0x74, 0x18, 0x65, 0x71, 0x90, 0x03, 0xC6
+005fe0 1872
+005fe1 71b1
+005fe2 7391
+005fe3 d0c8
+005fe4 e6f9
+005fe5 e672
+005fe6 ca74
+005fe7 f2d0              .db 0x72, 0x18, 0xB1, 0x71, 0x91, 0x73, 0xC8, 0xD0, 0xF9, 0xE6, 0x72, 0xE6, 0x74, 0xCA, 0xD0, 0xF2
+005fe8 0dad
+005fe9 f004
+005fea a53f
+005feb a485
+005fec 8586
+005fed 8481
+005fee a582
+005fef 857b              .db 0xAD, 0x0D, 0x04, 0xF0, 0x3F, 0xA5, 0x85, 0xA4, 0x86, 0x85, 0x81, 0x84, 0x82, 0xA5, 0x7B, 0x85
+005ff0 a4a6
+005ff1 847c
+005ff2 65a7
+005ff3 905d
+005ff4 c801
+005ff5 a485
+005ff6 a584
+005ff7 c120              .db 0xA6, 0xA4, 0x7C, 0x84, 0xA7, 0x65, 0x5D, 0x90, 0x01, 0xC8, 0x85, 0xA4, 0x84, 0xA5, 0x20, 0xC1
+005ff8 a5be
+005ff9 a47f
+005ffa 8580
+005ffb 847b
+005ffc a47c
+005ffd 885d
+005ffe 09b9
+005fff 9104              .db 0xBE, 0xA5, 0x7F, 0xA4, 0x80, 0x85, 0x7B, 0x84, 0x7C, 0xA4, 0x5D, 0x88, 0xB9, 0x09, 0x04, 0x91
+006000 88aa
+006001 03c0
+006002 f6d0
+006003 12a5
+006004 aa91
+006005 a588
+006006 9111
+006007 88aa              .db 0xAA, 0x88, 0xC0, 0x03, 0xD0, 0xF6, 0xA5, 0x12, 0x91, 0xAA, 0x88, 0xA5, 0x11, 0x91, 0xAA, 0x88
+006008 ffa9
+006009 aa91
+00600a 6520
+00600b a6c1
+00600c a579
+00600d a07a
+00600e 8601
+00600f 8571              .db 0xA9, 0xFF, 0x91, 0xAA, 0x20, 0x65, 0xC1, 0xA6, 0x79, 0xA5, 0x7A, 0xA0, 0x01, 0x86, 0x71, 0x85
+006010 b172
+006011 f071
+006012 a018
+006013 c804
+006014 71b1
+006015 fbd0
+006016 9838
+006017 7165              .db 0x72, 0xB1, 0x71, 0xF0, 0x18, 0xA0, 0x04, 0xC8, 0xB1, 0x71, 0xD0, 0xFB, 0x38, 0x98, 0x65, 0x71
+006018 a0aa
+006019 9100
+00601a 9871
+00601b 7265
+00601c 91c8
+00601d 9071
+00601e 4ce0
+00601f bf67              .db 0xAA, 0xA0, 0x00, 0x91, 0x71, 0x98, 0x65, 0x72, 0xC8, 0x91, 0x71, 0x90, 0xE0, 0x4C, 0x67, 0xBF
+006020 eb20
+006021 20c6
+006022 c6e8
+006023 05d0
+006024 ed20
+006025 cac6
+006026 a22c
+006027 2000              .db 0x20, 0xEB, 0xC6, 0x20, 0xE8, 0xC6, 0xD0, 0x05, 0x20, 0xED, 0xC6, 0xCA, 0x2C, 0xA2, 0x00, 0x20
+006028 deea
+006029 fb90
+00602a f9f0
+00602b 07c9
+00602c 10f0
+00602d 0dc9
+00602e 19f0
+00602f 00e0              .db 0xEA, 0xDE, 0x90, 0xFB, 0xF0, 0xF9, 0xC9, 0x07, 0xF0, 0x10, 0xC9, 0x0D, 0xF0, 0x19, 0xE0, 0x00
+006030 04d0
+006031 21c9
+006032 e990
+006033 08c9
+006034 def0
+006035 47e0
+006036 0cb0
+006037 0d9d              .db 0xD0, 0x04, 0xC9, 0x21, 0x90, 0xE9, 0xC9, 0x08, 0xF0, 0xDE, 0xE0, 0x47, 0xB0, 0x0C, 0x9D, 0x0D
+006038 e804
+006039 ed20
+00603a d0c6
+00603b 4cd8
+00603c c689
+00603d 07a9
+00603e f4d0
+00603f ffa0              .db 0x04, 0xE8, 0x20, 0xED, 0xC6, 0xD0, 0xD8, 0x4C, 0x89, 0xC6, 0xA9, 0x07, 0xD0, 0xF4, 0xA0, 0xFF
+006040 a538
+006041 e9c3
+006042 aa0d
+006043 6086
+006044 0dbd
+006045 f004
+006046 c951
+006047 b05f              .db 0x38, 0xA5, 0xC3, 0xE9, 0x0D, 0xAA, 0x86, 0x60, 0xBD, 0x0D, 0x04, 0xF0, 0x51, 0xC9, 0x5F, 0xB0
+006048 c94d
+006049 b03c
+00604a c90e
+00604b b030
+00604c 8545
+00604d c95c
+00604e f022
+00604f c961              .db 0x4D, 0xC9, 0x3C, 0xB0, 0x0E, 0xC9, 0x30, 0xB0, 0x45, 0x85, 0x5C, 0xC9, 0x22, 0xF0, 0x61, 0xC9
+006050 902a
+006051 243b
+006052 7060
+006053 8637
+006054 8478
+006055 a0ba
+006056 8412
+006057 a073              .db 0x2A, 0x90, 0x3B, 0x24, 0x60, 0x70, 0x37, 0x86, 0x78, 0x84, 0xBA, 0xA0, 0x12, 0x84, 0x73, 0xA0
+006058 84e1
+006059 a074
+00605a d100
+00605b f073
+00605c 9005
+00605d c821
+00605e f7d0
+00605f 0a98              .db 0xE1, 0x84, 0x74, 0xA0, 0x00, 0xD1, 0x73, 0xF0, 0x05, 0x90, 0x21, 0xC8, 0xD0, 0xF7, 0x98, 0x0A
+006060 bdaa
+006061 e130
+006062 7385
+006063 31bd
+006064 85e1
+006065 a074
+006066 a6ff
+006067 c878              .db 0xAA, 0xBD, 0x30, 0xE1, 0x85, 0x73, 0xBD, 0x31, 0xE1, 0x85, 0x74, 0xA0, 0xFF, 0xA6, 0x78, 0xC8
+006068 73b1
+006069 0830
+00606a dde8
+00606b 040d
+00606c f5f0
+00606d 2bd0
+00606e baa4
+00606f c8e8              .db 0xB1, 0x73, 0x30, 0x08, 0xE8, 0xDD, 0x0D, 0x04, 0xF0, 0xF5, 0xD0, 0x2B, 0xA4, 0xBA, 0xE8, 0xC8
+006070 0d99
+006071 c904
+006072 f000
+006073 e932
+006074 f03a
+006075 c904
+006076 d049
+006077 8502              .db 0x99, 0x0D, 0x04, 0xC9, 0x00, 0xF0, 0x32, 0xE9, 0x3A, 0xF0, 0x04, 0xC9, 0x49, 0xD0, 0x02, 0x85
+006078 4960
+006079 d057
+00607a 8593
+00607b bd5c
+00607c 040d
+00607d e2f0
+00607e 5cc5
+00607f def0              .db 0x60, 0x49, 0x57, 0xD0, 0x93, 0x85, 0x5C, 0xBD, 0x0D, 0x04, 0xF0, 0xE2, 0xC5, 0x5C, 0xF0, 0xDE
+006080 99c8
+006081 040d
+006082 d0e8
+006083 a6f0
+006084 b178
+006085 0873
+006086 28c8
+006087 f910              .db 0xC8, 0x99, 0x0D, 0x04, 0xE8, 0xD0, 0xF0, 0xA6, 0x78, 0xB1, 0x73, 0x08, 0xC8, 0x28, 0x10, 0xF9
+006088 73b1
+006089 bed0
+00608a 0dbd
+00608b 1004
+00608c c8c3
+00608d 99c8
+00608e 040d
+00608f c8c8              .db 0xB1, 0x73, 0xD0, 0xBE, 0xBD, 0x0D, 0x04, 0x10, 0xC3, 0xC8, 0xC8, 0x99, 0x0D, 0x04, 0xC8, 0xC8
+006090 c6c8
+006091 60c3
+006092 79a5
+006093 7aa6
+006094 01a0
+006095 aa85
+006096 ab86
+006097 aab1              .db 0xC8, 0xC6, 0xC3, 0x60, 0xA5, 0x79, 0xA6, 0x7A, 0xA0, 0x01, 0x85, 0xAA, 0x86, 0xAB, 0xB1, 0xAA
+006098 1af0
+006099 03a0
+00609a aab1
+00609b c588
+00609c d012
+00609d b104
+00609e c5aa
+00609f b011              .db 0xF0, 0x1A, 0xA0, 0x03, 0xB1, 0xAA, 0x88, 0xC5, 0x12, 0xD0, 0x04, 0xB1, 0xAA, 0xC5, 0x11, 0xB0
+0060a0 8809
+0060a1 aab1
+0060a2 88aa
+0060a3 aab1
+0060a4 de90
+0060a5 01f0
+0060a6 6018
+0060a7 fdd0              .db 0x09, 0x88, 0xB1, 0xAA, 0xAA, 0x88, 0xB1, 0xAA, 0x90, 0xDE, 0xF0, 0x01, 0x18, 0x60, 0xD0, 0xFD
+0060a8 00a9
+0060a9 91a8
+0060aa c879
+0060ab 7991
+0060ac a518
+0060ad 6979
+0060ae 8502
+0060af a57b              .db 0xA9, 0x00, 0xA8, 0x91, 0x79, 0xC8, 0x91, 0x79, 0x18, 0xA5, 0x79, 0x69, 0x02, 0x85, 0x7B, 0xA5
+0060b0 697a
+0060b1 8500
+0060b2 187c
+0060b3 79a5
+0060b4 ff69
+0060b5 c385
+0060b6 7aa5
+0060b7 ff69              .db 0x7A, 0x69, 0x00, 0x85, 0x7C, 0x18, 0xA5, 0x79, 0x69, 0xFF, 0x85, 0xC3, 0xA5, 0x7A, 0x69, 0xFF
+0060b8 c485
+0060b9 85a5
+0060ba 86a4
+0060bb 8185
+0060bc 8284
+0060bd 7ba5
+0060be 7ca4
+0060bf 7d85              .db 0x85, 0xC4, 0xA5, 0x85, 0xA4, 0x86, 0x85, 0x81, 0x84, 0x82, 0xA5, 0x7B, 0xA4, 0x7C, 0x85, 0x7D
+0060c0 7e84
+0060c1 7f85
+0060c2 8084
+0060c3 4420
+0060c4 a2c3
+0060c5 8668
+0060c6 6865
+0060c7 68aa              .db 0x84, 0x7E, 0x85, 0x7F, 0x84, 0x80, 0x20, 0x44, 0xC3, 0xA2, 0x68, 0x86, 0x65, 0x68, 0xAA, 0x68
+0060c8 fe8e
+0060c9 8d01
+0060ca 01ff
+0060cb fda2
+0060cc a99a
+0060cd 8500
+0060ce 858c
+0060cf 6061              .db 0x8E, 0xFE, 0x01, 0x8D, 0xFF, 0x01, 0xA2, 0xFD, 0x9A, 0xA9, 0x00, 0x85, 0x8C, 0x85, 0x61, 0x60
+0060d0 d0f0
+0060d1 9060
+0060d2 f006
+0060d3 c904
+0060d4 d0b8
+0060d5 20f4
+0060d6 c555
+0060d7 2420              .db 0xF0, 0xD0, 0x60, 0x90, 0x06, 0xF0, 0x04, 0xC9, 0xB8, 0xD0, 0xF4, 0x20, 0x55, 0xC5, 0x20, 0x24
+0060d8 20c1
+0060d9 00c2
+0060da 0cf0
+0060db b8c9
+0060dc 93d0
+0060dd bc20
+0060de 2000
+0060df c555              .db 0xC1, 0x20, 0xC2, 0x00, 0xF0, 0x0C, 0xC9, 0xB8, 0xD0, 0x93, 0x20, 0xBC, 0x00, 0x20, 0x55, 0xC5
+0060e0 8bd0
+0060e1 11a5
+0060e2 1205
+0060e3 06d0
+0060e4 ffa9
+0060e5 1185
+0060e6 1285
+0060e7 01a0              .db 0xD0, 0x8B, 0xA5, 0x11, 0x05, 0x12, 0xD0, 0x06, 0xA9, 0xFF, 0x85, 0x11, 0x85, 0x12, 0xA0, 0x01
+0060e8 6084
+0060e9 9220
+0060ea b1c6
+0060eb f0aa
+0060ec 203e
+0060ed c314
+0060ee b1c8
+0060ef aaaa              .db 0x84, 0x60, 0x20, 0x92, 0xC6, 0xB1, 0xAA, 0xF0, 0x3E, 0x20, 0x14, 0xC3, 0xC8, 0xB1, 0xAA, 0xAA
+0060f0 b1c8
+0060f1 c5aa
+0060f2 d012
+0060f3 e404
+0060f4 f011
+0060f5 b002
+0060f6 842a
+0060f7 2097              .db 0xC8, 0xB1, 0xAA, 0xC5, 0x12, 0xD0, 0x04, 0xE4, 0x11, 0xF0, 0x02, 0xB0, 0x2A, 0x84, 0x97, 0x20
+0060f8 d882
+0060f9 20a9
+0060fa 97a4
+0060fb 7f29
+0060fc ed20
+0060fd c9c6
+0060fe d022
+0060ff a506              .db 0x82, 0xD8, 0xA9, 0x20, 0xA4, 0x97, 0x29, 0x7F, 0x20, 0xED, 0xC6, 0xC9, 0x22, 0xD0, 0x06, 0xA5
+006100 4960
+006101 85ff
+006102 c860
+006103 aab1
+006104 0ed0
+006105 b1a8
+006106 aaaa
+006107 b1c8              .db 0x60, 0x49, 0xFF, 0x85, 0x60, 0xC8, 0xB1, 0xAA, 0xD0, 0x0E, 0xA8, 0xB1, 0xAA, 0xAA, 0xC8, 0xB1
+006108 86aa
+006109 85aa
+00610a d0ab
+00610b 60b7
+00610c de10
+00610d 6024
+00610e da30
+00610f e3a2              .db 0xAA, 0x86, 0xAA, 0x85, 0xAB, 0xD0, 0xB7, 0x60, 0x10, 0xDE, 0x24, 0x60, 0x30, 0xDA, 0xA2, 0xE3
+006110 0a0a
+006111 0290
+006112 18e8
+006113 1669
+006114 0190
+006115 85e8
+006116 8673
+006117 8474              .db 0x0A, 0x0A, 0x90, 0x02, 0xE8, 0x18, 0x69, 0x16, 0x90, 0x01, 0xE8, 0x85, 0x73, 0x86, 0x74, 0x84
+006118 a097
+006119 b100
+00611a aa73
+00611b b1c8
+00611c ca73
+00611d b8f0
+00611e ed20
+00611f c8c6              .db 0x97, 0xA0, 0x00, 0xB1, 0x73, 0xAA, 0xC8, 0xB1, 0x73, 0xCA, 0xF0, 0xB8, 0x20, 0xED, 0xC6, 0xC8
+006120 73b1
+006121 c848
+006122 73b1
+006123 00a0
+006124 7485
+006125 8568
+006126 b173
+006127 ca73              .db 0xB1, 0x73, 0x48, 0xC8, 0xB1, 0x73, 0xA0, 0x00, 0x85, 0x74, 0x68, 0x85, 0x73, 0xB1, 0x73, 0xCA
+006128 a2f0
+006129 ed20
+00612a c8c6
+00612b f5d0
+00612c 80a9
+00612d 6185
+00612e b420
+00612f 68c5              .db 0xF0, 0xA2, 0x20, 0xED, 0xC6, 0xC8, 0xD0, 0xF5, 0xA9, 0x80, 0x85, 0x61, 0x20, 0xB4, 0xC5, 0x68
+006130 a968
+006131 2010
+006132 bf03
+006133 9d20
+006134 18c4
+006135 6598
+006136 48c3
+006137 c4a5              .db 0x68, 0xA9, 0x10, 0x20, 0x03, 0xBF, 0x20, 0x9D, 0xC4, 0x18, 0x98, 0x65, 0xC3, 0x48, 0xA5, 0xC4
+006138 0069
+006139 a548
+00613a 4888
+00613b 87a5
+00613c a948
+00613d 20ae
+00613e c9f1
+00613f d020              .db 0x69, 0x00, 0x48, 0xA5, 0x88, 0x48, 0xA5, 0x87, 0x48, 0xA9, 0xAE, 0x20, 0xF1, 0xC9, 0x20, 0xD0
+006140 20c8
+006141 c8cd
+006142 b0a5
+006143 7f09
+006144 ad25
+006145 ad85
+006146 97a9
+006147 c2a0              .db 0xC8, 0x20, 0xCD, 0xC8, 0xA5, 0xB0, 0x09, 0x7F, 0x25, 0xAD, 0x85, 0xAD, 0xA9, 0x97, 0xA0, 0xC2
+006148 7185
+006149 7284
+00614a 844c
+00614b a9c9
+00614c a0e0
+00614d 20df
+00614e d67d
+00614f c220              .db 0x85, 0x71, 0x84, 0x72, 0x4C, 0x84, 0xC9, 0xA9, 0xE0, 0xA0, 0xDF, 0x20, 0x7D, 0xD6, 0x20, 0xC2
+006150 c900
+006151 d0b3
+006152 2006
+006153 00bc
+006154 cd20
+006155 20c8
+006156 d6e9
+006157 b085              .db 0x00, 0xC9, 0xB3, 0xD0, 0x06, 0x20, 0xBC, 0x00, 0x20, 0xCD, 0xC8, 0x20, 0xE9, 0xD6, 0x85, 0xB0
+006158 7920
+006159 a5c9
+00615a 4898
+00615b 97a5
+00615c a948
+00615d 4881
+00615e 1420
+00615f a5c3              .db 0x20, 0x79, 0xC9, 0xA5, 0x98, 0x48, 0xA5, 0x97, 0x48, 0xA9, 0x81, 0x48, 0x20, 0x14, 0xC3, 0xA5
+006160 a4c3
+006161 a6c4
+006162 e888
+006163 04f0
+006164 8b85
+006165 8c84
+006166 00a0
+006167 c3b1              .db 0xC3, 0xA4, 0xC4, 0xA6, 0x88, 0xE8, 0xF0, 0x04, 0x85, 0x8B, 0x84, 0x8C, 0xA0, 0x00, 0xB1, 0xC3
+006168 07f0
+006169 3ac9
+00616a 1df0
+00616b 024c
+00616c a0ca
+00616d b102
+00616e 18c3
+00616f 56f0              .db 0xF0, 0x07, 0xC9, 0x3A, 0xF0, 0x1D, 0x4C, 0x02, 0xCA, 0xA0, 0x02, 0xB1, 0xC3, 0x18, 0xF0, 0x56
+006170 b1c8
+006171 85c3
+006172 c887
+006173 c3b1
+006174 8885
+006175 6598
+006176 85c3
+006177 90c3              .db 0xC8, 0xB1, 0xC3, 0x85, 0x87, 0xC8, 0xB1, 0xC3, 0x85, 0x88, 0x98, 0x65, 0xC3, 0x85, 0xC3, 0x90
+006178 e602
+006179 20c4
+00617a 00bc
+00617b fc20
+00617c 4cc2
+00617d c2bc
+00617e 54f0
+00617f b00a              .db 0x02, 0xE6, 0xC4, 0x20, 0xBC, 0x00, 0x20, 0xFC, 0xC2, 0x4C, 0xBC, 0xC2, 0xF0, 0x54, 0x0A, 0xB0
+006180 4c03
+006181 c5b4
+006182 58c9
+006183 ceb0
+006184 b9a8
+006185 e008
+006186 b948
+006187 e007              .db 0x03, 0x4C, 0xB4, 0xC5, 0xC9, 0x58, 0xB0, 0xCE, 0xA8, 0xB9, 0x08, 0xE0, 0x48, 0xB9, 0x07, 0xE0
+006188 4c48
+006189 00bc
+00618a 036c
+00618b c904
+00618c b003
+00618d 1801
+00618e 67d0
+00618f c4a5              .db 0x48, 0x4C, 0xBC, 0x00, 0x6C, 0x03, 0x04, 0xC9, 0x03, 0xB0, 0x01, 0x18, 0xD0, 0x67, 0xA5, 0xC4
+006190 0449
+006191 10f0
+006192 0449
+006193 c3a4
+006194 8b84
+006195 8c85
+006196 87a5
+006197 88a4              .db 0x49, 0x04, 0xF0, 0x10, 0x49, 0x04, 0xA4, 0xC3, 0x84, 0x8B, 0x85, 0x8C, 0xA5, 0x87, 0xA4, 0x88
+006198 8985
+006199 8a84
+00619a 6868
+00619b 0790
+00619c e7a9
+00619d e5a0
+00619e 4f4c
+00619f 4cbf              .db 0x85, 0x89, 0x84, 0x8A, 0x68, 0x68, 0x90, 0x07, 0xA9, 0xE7, 0xA0, 0xE5, 0x4C, 0x4F, 0xBF, 0x4C
+0061a0 bf5a
+0061a1 0fd0
+0061a2 a538
+0061a3 e979
+0061a4 a401
+0061a5 b07a
+0061a6 8801
+0061a7 8f85              .db 0x5A, 0xBF, 0xD0, 0x0F, 0x38, 0xA5, 0x79, 0xE9, 0x01, 0xA4, 0x7A, 0xB0, 0x01, 0x88, 0x85, 0x8F
+0061a8 9084
+0061a9 2060
+0061aa c555
+0061ab a020
+0061ac a5c4
+0061ad c588
+0061ae b012
+0061af 980b              .db 0x84, 0x90, 0x60, 0x20, 0x55, 0xC5, 0x20, 0xA0, 0xC4, 0xA5, 0x88, 0xC5, 0x12, 0xB0, 0x0B, 0x98
+0061b0 6538
+0061b1 a6c3
+0061b2 90c4
+0061b3 e807
+0061b4 04b0
+0061b5 79a5
+0061b6 7aa6
+0061b7 2820              .db 0x38, 0x65, 0xC3, 0xA6, 0xC4, 0x90, 0x07, 0xE8, 0xB0, 0x04, 0xA5, 0x79, 0xA6, 0x7A, 0x20, 0x28
+0061b8 b0c1
+0061b9 4c03
+0061ba c472
+0061bb aaa5
+0061bc 01e9
+0061bd aba4
+0061be d0b0
+0061bf cd90              .db 0xC1, 0xB0, 0x03, 0x4C, 0x72, 0xC4, 0xA5, 0xAA, 0xE9, 0x01, 0xA4, 0xAB, 0xB0, 0xD0, 0x90, 0xCD
+0061c0 8c20
+0061c1 86d2
+0061c2 600d
+0061c3 fdd0
+0061c4 8ca4
+0061c5 05d0
+0061c6 1ea2
+0061c7 3c4c              .db 0x20, 0x8C, 0xD2, 0x86, 0x0D, 0x60, 0xD0, 0xFD, 0xA4, 0x8C, 0xD0, 0x05, 0xA2, 0x1E, 0x4C, 0x3C
+0061c8 a9bf
+0061c9 2093
+0061ca dd14
+0061cb 93a9
+0061cc 1720
+0061cd 84dd
+0061ce a5c4
+0061cf 858b              .db 0xBF, 0xA9, 0x93, 0x20, 0x14, 0xDD, 0xA9, 0x93, 0x20, 0x17, 0xDD, 0x84, 0xC4, 0xA5, 0x8B, 0x85
+0061d0 a5c3
+0061d1 a489
+0061d2 858a
+0061d3 8487
+0061d4 6088
+0061d5 03d0
+0061d6 654c
+0061d7 20c1              .db 0xC3, 0xA5, 0x89, 0xA4, 0x8A, 0x85, 0x87, 0x84, 0x88, 0x60, 0xD0, 0x03, 0x4C, 0x65, 0xC1, 0x20
+0061d8 c172
+0061d9 2ef0
+0061da 05a9
+0061db 0320
+0061dc a5bf
+0061dd 48c4
+0061de c3a5
+0061df a548              .db 0x72, 0xC1, 0xF0, 0x2E, 0xA9, 0x05, 0x20, 0x03, 0xBF, 0xA5, 0xC4, 0x48, 0xA5, 0xC3, 0x48, 0xA5
+0061e0 4888
+0061e1 87a5
+0061e2 a948
+0061e3 489d
+0061e4 c220
+0061e5 4c00
+0061e6 c2bc
+0061e7 05a9              .db 0x88, 0x48, 0xA5, 0x87, 0x48, 0xA9, 0x9D, 0x48, 0x20, 0xC2, 0x00, 0x4C, 0xBC, 0xC2, 0xA9, 0x05
+0061e8 0320
+0061e9 a5bf
+0061ea 48c4
+0061eb c3a5
+0061ec a548
+0061ed 4888
+0061ee 87a5
+0061ef a948              .db 0x20, 0x03, 0xBF, 0xA5, 0xC4, 0x48, 0xA5, 0xC3, 0x48, 0xA5, 0x88, 0x48, 0xA5, 0x87, 0x48, 0xA9
+0061f0 488d
+0061f1 c220
+0061f2 2000
+0061f3 c3eb
+0061f4 bc4c
+0061f5 20c2
+0061f6 c555
+0061f7 a020              .db 0x8D, 0x48, 0x20, 0xC2, 0x00, 0x20, 0xEB, 0xC3, 0x4C, 0xBC, 0xC2, 0x20, 0x55, 0xC5, 0x20, 0xA0
+0061f8 a5c4
+0061f9 c588
+0061fa b012
+0061fb 980b
+0061fc 6538
+0061fd a6c3
+0061fe 90c4
+0061ff e807              .db 0xC4, 0xA5, 0x88, 0xC5, 0x12, 0xB0, 0x0B, 0x98, 0x38, 0x65, 0xC3, 0xA6, 0xC4, 0x90, 0x07, 0xE8
+006200 04b0
+006201 79a5
+006202 7aa6
+006203 2820
+006204 90c1
+006205 a567
+006206 e9aa
+006207 8501              .db 0xB0, 0x04, 0xA5, 0x79, 0xA6, 0x7A, 0x20, 0x28, 0xC1, 0x90, 0x67, 0xA5, 0xAA, 0xE9, 0x01, 0x85
+006208 a5c3
+006209 e9ab
+00620a 8500
+00620b 60c4
+00620c 22a2
+00620d 3c4c
+00620e a8bf
+00620f bdba              .db 0xC3, 0xA5, 0xAB, 0xE9, 0x00, 0x85, 0xC4, 0x60, 0xA2, 0x22, 0x4C, 0x3C, 0xBF, 0xA8, 0xBA, 0xBD
+006210 0103
+006211 9dc9
+006212 f2d0
+006213 e8e8
+006214 989a
+006215 20f0
+006216 3ac9
+006217 1cf0              .db 0x03, 0x01, 0xC9, 0x9D, 0xD0, 0xF2, 0xE8, 0xE8, 0x9A, 0x98, 0xF0, 0x20, 0xC9, 0x3A, 0xF0, 0x1C
+006218 b4e9
+006219 f0aa
+00621a ca04
+00621b 62d0
+00621c 86ca
+00621d 2098
+00621e 00bc
+00621f e120              .db 0xE9, 0xB4, 0xAA, 0xF0, 0x04, 0xCA, 0xD0, 0x62, 0xCA, 0x86, 0x98, 0x20, 0xBC, 0x00, 0x20, 0xE1
+006220 a5c8
+006221 f0ac
+006222 a902
+006223 baff
+006224 9845
+006225 1ad0
+006226 02bd
+006227 8501              .db 0xC8, 0xA5, 0xAC, 0xF0, 0x02, 0xA9, 0xFF, 0xBA, 0x45, 0x98, 0xD0, 0x1A, 0xBD, 0x02, 0x01, 0x85
+006228 bd87
+006229 0103
+00622a 8885
+00622b 04bd
+00622c 8501
+00622d bdc3
+00622e 0105
+00622f c485              .db 0x87, 0xBD, 0x03, 0x01, 0x85, 0x88, 0xBD, 0x04, 0x01, 0x85, 0xC3, 0xBD, 0x05, 0x01, 0x85, 0xC4
+006230 c220
+006231 4c00
+006232 c2bc
+006233 e8e8
+006234 e8e8
+006235 9ae8
+006236 8c4c
+006237 a2c4              .db 0x20, 0xC2, 0x00, 0x4C, 0xBC, 0xC2, 0xE8, 0xE8, 0xE8, 0xE8, 0xE8, 0x9A, 0x4C, 0x8C, 0xC4, 0xA2
+006238 2c04
+006239 0ea2
+00623a 3c4c
+00623b d0bf
+00623c 689e
+00623d 6868
+00623e 8dc9
+00623f efd0              .db 0x04, 0x2C, 0xA2, 0x0E, 0x4C, 0x3C, 0xBF, 0xD0, 0x9E, 0x68, 0x68, 0x68, 0xC9, 0x8D, 0xD0, 0xEF
+006240 8568
+006241 6887
+006242 8885
+006243 8568
+006244 68c3
+006245 c485
+006246 9d20
+006247 98c4              .db 0x68, 0x85, 0x87, 0x68, 0x85, 0x88, 0x68, 0x85, 0xC3, 0x68, 0x85, 0xC4, 0x20, 0x9D, 0xC4, 0x98
+006248 6518
+006249 85c3
+00624a 90c3
+00624b e602
+00624c 60c4
+00624d 024c
+00624e a2ca
+00624f 2c3a              .db 0x18, 0x65, 0xC3, 0x85, 0xC3, 0x90, 0x02, 0xE6, 0xC4, 0x60, 0x4C, 0x02, 0xCA, 0xA2, 0x3A, 0x2C
+006250 00a2
+006251 00a0
+006252 5c84
+006253 458a
+006254 855c
+006255 b15c
+006256 f0c3
+006257 c5ea              .db 0xA2, 0x00, 0xA0, 0x00, 0x84, 0x5C, 0x8A, 0x45, 0x5C, 0x85, 0x5C, 0xB1, 0xC3, 0xF0, 0xEA, 0xC5
+006258 f05c
+006259 c8e6
+00625a 22c9
+00625b f3d0
+00625c ecf0
+00625d e120
+00625e 20c8
+00625f 00c2              .db 0x5C, 0xF0, 0xE6, 0xC8, 0xC9, 0x22, 0xD0, 0xF3, 0xF0, 0xEC, 0x20, 0xE1, 0xC8, 0x20, 0xC2, 0x00
+006260 b1c9
+006261 11f0
+006262 89c9
+006263 d2d0
+006264 c3a6
+006265 c4a4
+006266 bc20
+006267 b000              .db 0xC9, 0xB1, 0xF0, 0x11, 0xC9, 0x89, 0xD0, 0xD2, 0xA6, 0xC3, 0xA4, 0xC4, 0x20, 0xBC, 0x00, 0xB0
+006268 86c9
+006269 84c3
+00626a a5c4
+00626b f0ac
+00626c 201b
+00626d 00bc
+00626e 03b0
+00626f eb4c              .db 0xC9, 0x86, 0xC3, 0x84, 0xC4, 0xA5, 0xAC, 0xF0, 0x1B, 0x20, 0xBC, 0x00, 0xB0, 0x03, 0x4C, 0xEB
+006270 c9c3
+006271 d090
+006272 4c03
+006273 c2fe
+006274 fc20
+006275 a0c2
+006276 b100
+006277 c9c3              .db 0xC3, 0xC9, 0x90, 0xD0, 0x03, 0x4C, 0xFE, 0xC2, 0x20, 0xFC, 0xC2, 0xA0, 0x00, 0xB1, 0xC3, 0xC9
+006278 f0ad
+006279 6099
+00627a 00a0
+00627b 01a2
+00627c b1c8
+00627d f0c3
+00627e c90f
+00627f d08b              .db 0xAD, 0xF0, 0x99, 0x60, 0xA0, 0x00, 0xA2, 0x01, 0xC8, 0xB1, 0xC3, 0xF0, 0x0F, 0xC9, 0x8B, 0xD0
+006280 e803
+006281 f4d0
+006282 adc9
+006283 f0d0
+006284 d0ca
+006285 c8ed
+006286 1898
+006287 c365              .db 0x03, 0xE8, 0xD0, 0xF4, 0xC9, 0xAD, 0xD0, 0xF0, 0xCA, 0xD0, 0xED, 0xC8, 0x98, 0x18, 0x65, 0xC3
+006288 c385
+006289 0290
+00628a c4e6
+00628b c220
+00628c 9000
+00628d 4cc3
+00628e c2fc
+00628f a020              .db 0x85, 0xC3, 0x90, 0x02, 0xE6, 0xC4, 0x20, 0xC2, 0x00, 0x90, 0xC3, 0x4C, 0xFC, 0xC2, 0x20, 0xA0
+006290 4cc4
+006291 c48f
+006292 024c
+006293 c9ca
+006294 d0a9
+006295 4c03
+006296 dd38
+006297 aac9              .db 0xC4, 0x4C, 0x8F, 0xC4, 0x4C, 0x02, 0xCA, 0xC9, 0xA9, 0xD0, 0x03, 0x4C, 0x38, 0xDD, 0xC9, 0xAA
+006298 03d0
+006299 3c4c
+00629a 20dd
+00629b d28c
+00629c c948
+00629d f08d
+00629e c904
+00629f d089              .db 0xD0, 0x03, 0x4C, 0x3C, 0xDD, 0x20, 0x8C, 0xD2, 0x48, 0xC9, 0x8D, 0xF0, 0x04, 0xC9, 0x89, 0xD0
+0062a0 c6e3
+0062a1 d0af
+0062a2 6804
+0062a3 fe4c
+0062a4 20c2
+0062a5 00bc
+0062a6 5520
+0062a7 c9c5              .db 0xE3, 0xC6, 0xAF, 0xD0, 0x04, 0x68, 0x4C, 0xFE, 0xC2, 0x20, 0xBC, 0x00, 0x20, 0x55, 0xC5, 0xC9
+0062a8 f02c
+0062a9 68ee
+0062aa a260
+0062ab 8600
+0062ac 8611
+0062ad b012
+0062ae e0f7
+0062af a819              .db 0x2C, 0xF0, 0xEE, 0x68, 0x60, 0xA2, 0x00, 0x86, 0x11, 0x86, 0x12, 0xB0, 0xF7, 0xE0, 0x19, 0xA8
+0062b0 ddb0
+0062b1 2fe9
+0062b2 a5a8
+0062b3 0a11
+0062b4 1226
+0062b5 260a
+0062b6 6512
+0062b7 8511              .db 0xB0, 0xDD, 0xE9, 0x2F, 0xA8, 0xA5, 0x11, 0x0A, 0x26, 0x12, 0x0A, 0x26, 0x12, 0x65, 0x11, 0x85
+0062b8 8a11
+0062b9 1265
+0062ba 1106
+0062bb aa2a
+0062bc 6598
+0062bd 8511
+0062be 9011
+0062bf e801              .db 0x11, 0x8A, 0x65, 0x12, 0x06, 0x11, 0x2A, 0xAA, 0x98, 0x65, 0x11, 0x85, 0x11, 0x90, 0x01, 0xE8
+0062c0 bc20
+0062c1 4c00
+0062c2 c559
+0062c3 e4a9
+0062c4 a92c
+0062c5 48e0
+0062c6 aa20
+0062c7 a6cb              .db 0x20, 0xBC, 0x00, 0x4C, 0x59, 0xC5, 0xA9, 0xE4, 0x2C, 0xA9, 0xE0, 0x48, 0x20, 0xAA, 0xCB, 0xA6
+0062c8 305f
+0062c9 851e
+0062ca 8497
+0062cb 2098
+0062cc d67d
+0062cd 4868
+0062ce dfa0
+0062cf be20              .db 0x5F, 0x30, 0x1E, 0x85, 0x97, 0x84, 0x98, 0x20, 0x7D, 0xD6, 0x68, 0x48, 0xA0, 0xDF, 0x20, 0xBE
+0062d0 20d3
+0062d1 d6a3
+0062d2 c220
+0062d3 c900
+0062d4 d02c
+0062d5 20a8
+0062d6 00bc
+0062d7 8c4c              .db 0xD3, 0x20, 0xA3, 0xD6, 0x20, 0xC2, 0x00, 0xC9, 0x2C, 0xD0, 0xA8, 0x20, 0xBC, 0x00, 0x4C, 0x8C
+0062d8 4cc5
+0062d9 c8dc
+0062da aa20
+0062db 85cb
+0062dc 8497
+0062dd a998
+0062de 20c2
+0062df c9f1              .db 0xC5, 0x4C, 0xDC, 0xC8, 0x20, 0xAA, 0xCB, 0x85, 0x97, 0x84, 0x98, 0xA9, 0xC2, 0x20, 0xF1, 0xC9
+0062e0 5fa5
+0062e1 2048
+0062e2 c8e1
+0062e3 2a68
+0062e4 d320
+0062e5 d0c8
+0062e6 4c03
+0062e7 d6a3              .db 0xA5, 0x5F, 0x48, 0x20, 0xE1, 0xC8, 0x68, 0x2A, 0x20, 0xD3, 0xC8, 0xD0, 0x03, 0x4C, 0xA3, 0xD6
+0062e8 02a0
+0062e9 aeb1
+0062ea 82c5
+0062eb 1790
+0062ec 07d0
+0062ed b188
+0062ee c5ae
+0062ef 9081              .db 0xA0, 0x02, 0xB1, 0xAE, 0xC5, 0x82, 0x90, 0x17, 0xD0, 0x07, 0x88, 0xB1, 0xAE, 0xC5, 0x81, 0x90
+0062f0 a40e
+0062f1 c4af
+0062f2 907c
+0062f3 d008
+0062f4 a50d
+0062f5 c5ae
+0062f6 b07b
+0062f7 a507              .db 0x0E, 0xA4, 0xAF, 0xC4, 0x7C, 0x90, 0x08, 0xD0, 0x0D, 0xA5, 0xAE, 0xC5, 0x7B, 0xB0, 0x07, 0xA5
+0062f8 a4ae
+0062f9 4caf
+0062fa c60c
+0062fb 00a0
+0062fc aeb1
+0062fd 3220
+0062fe a5cf
+0062ff a49e              .db 0xAE, 0xA4, 0xAF, 0x4C, 0x0C, 0xC6, 0xA0, 0x00, 0xB1, 0xAE, 0x20, 0x32, 0xCF, 0xA5, 0x9E, 0xA4
+006300 859f
+006301 84b8
+006302 20b9
+006303 d111
+006304 aca9
+006305 00a0
+006306 9e85
+006307 9f84              .db 0x9F, 0x85, 0xB8, 0x84, 0xB9, 0x20, 0x11, 0xD1, 0xA9, 0xAC, 0xA0, 0x00, 0x85, 0x9E, 0x84, 0x9F
+006308 7320
+006309 a0d1
+00630a b100
+00630b 919e
+00630c c897
+00630d 9eb1
+00630e 9791
+00630f b1c8              .db 0x20, 0x73, 0xD1, 0xA0, 0x00, 0xB1, 0x9E, 0x91, 0x97, 0xC8, 0xB1, 0x9E, 0x91, 0x97, 0xC8, 0xB1
+006310 919e
+006311 6097
+006312 aa20
+006313 85cb
+006314 8497
+006315 2098
+006316 dd00
+006317 5fa6              .db 0x9E, 0x91, 0x97, 0x60, 0x20, 0xAA, 0xCB, 0x85, 0x97, 0x84, 0x98, 0x20, 0x00, 0xDD, 0xA6, 0x5F
+006318 0730
+006319 20a8
+00631a ce66
+00631b a34c
+00631c 48d6
+00631d 01a9
+00631e 01b0
+00631f 2068              .db 0x30, 0x07, 0xA8, 0x20, 0x66, 0xCE, 0x4C, 0xA3, 0xD6, 0x48, 0xA9, 0x01, 0xB0, 0x01, 0x68, 0x20
+006320 cf3a
+006321 05f0
+006322 a068
+006323 9100
+006324 20ad
+006325 cf85
+006326 d04c
+006327 20c5              .db 0x3A, 0xCF, 0xF0, 0x05, 0x68, 0xA0, 0x00, 0x91, 0xAD, 0x20, 0x85, 0xCF, 0x4C, 0xD0, 0xC5, 0x20
+006328 c6d6
+006329 c220
+00632a f000
+00632b c93b
+00632c f0ac
+00632d c956
+00632e f0b0
+00632f c952              .db 0xD6, 0xC6, 0x20, 0xC2, 0x00, 0xF0, 0x3B, 0xC9, 0xAC, 0xF0, 0x56, 0xC9, 0xB0, 0xF0, 0x52, 0xC9
+006330 f02c
+006331 c938
+006332 f03b
+006333 2066
+006334 c8e1
+006335 5f24
+006336 e130
+006337 9520              .db 0x2C, 0xF0, 0x38, 0xC9, 0x3B, 0xF0, 0x66, 0x20, 0xE1, 0xC8, 0x24, 0x5F, 0x30, 0xE1, 0x20, 0x95
+006338 20d8
+006339 cf44
+00633a 00a0
+00633b 0fa5
+00633c 0af0
+00633d e538
+00633e f10e
+00633f b0ae              .db 0xD8, 0x20, 0x44, 0xCF, 0xA0, 0x00, 0xA5, 0x0F, 0xF0, 0x0A, 0x38, 0xE5, 0x0E, 0xF1, 0xAE, 0xB0
+006340 2003
+006341 c692
+006342 d620
+006343 f0c6
+006344 a9c9
+006345 9d00
+006346 040d
+006347 0da2              .db 0x03, 0x20, 0x92, 0xC6, 0x20, 0xD6, 0xC6, 0xF0, 0xC9, 0xA9, 0x00, 0x9D, 0x0D, 0x04, 0xA2, 0x0D
+006348 04a0
+006349 0da9
+00634a ed20
+00634b a9c6
+00634c d00a
+00634d a552
+00634e c50e
+00634f 9010              .db 0xA0, 0x04, 0xA9, 0x0D, 0x20, 0xED, 0xC6, 0xA9, 0x0A, 0xD0, 0x52, 0xA5, 0x0E, 0xC5, 0x10, 0x90
+006350 2005
+006351 c692
+006352 27d0
+006353 e538
+006354 b064
+006355 49fc
+006356 69ff
+006357 d001              .db 0x05, 0x20, 0x92, 0xC6, 0xD0, 0x27, 0x38, 0xE5, 0x64, 0xB0, 0xFC, 0x49, 0xFF, 0x69, 0x01, 0xD0
+006358 4812
+006359 8920
+00635a c9d2
+00635b d029
+00635c 687b
+00635d acc9
+00635e 06d0
+00635f e58a              .db 0x12, 0x48, 0x20, 0x89, 0xD2, 0xC9, 0x29, 0xD0, 0x7B, 0x68, 0xC9, 0xAC, 0xD0, 0x06, 0x8A, 0xE5
+006360 900e
+006361 aa0a
+006362 f08a
+006363 2006
+006364 c6e8
+006365 d0ca
+006366 20fa
+006367 00bc              .db 0x0E, 0x90, 0x0A, 0xAA, 0x8A, 0xF0, 0x06, 0x20, 0xE8, 0xC6, 0xCA, 0xD0, 0xFA, 0x20, 0xBC, 0x00
+006368 85d0
+006369 2060
+00636a cf44
+00636b 3e20
+00636c a0d1
+00636d aa00
+00636e 49f0
+00636f 71b1              .db 0xD0, 0x85, 0x60, 0x20, 0x44, 0xCF, 0x20, 0x3E, 0xD1, 0xA0, 0x00, 0xAA, 0xF0, 0x49, 0xB1, 0x71
+006370 ed20
+006371 c8c6
+006372 d0ca
+006373 60f7
+006374 20a9
+006375 a92c
+006376 c93f
+006377 9020              .db 0x20, 0xED, 0xC6, 0xC8, 0xCA, 0xD0, 0xF7, 0x60, 0xA9, 0x20, 0x2C, 0xA9, 0x3F, 0xC9, 0x20, 0x90
+006378 4819
+006379 0fa5
+00637a 0ad0
+00637b 0ea5
+00637c 64e5
+00637d 0bd0
+00637e 0e85
+00637f 07f0              .db 0x19, 0x48, 0xA5, 0x0F, 0xD0, 0x0A, 0xA5, 0x0E, 0xE5, 0x64, 0xD0, 0x0B, 0x85, 0x0E, 0xF0, 0x07
+006380 0ec5
+006381 03d0
+006382 9220
+006383 e6c6
+006384 680e
+006385 ed20
+006386 c9de
+006387 d00d              .db 0xC5, 0x0E, 0xD0, 0x03, 0x20, 0x92, 0xC6, 0xE6, 0x0E, 0x68, 0x20, 0xED, 0xDE, 0xC9, 0x0D, 0xD0
+006388 8614
+006389 a678
+00638a f00d
+00638b a90a
+00638c 2000
+00638d c6ed
+00638e d0ca
+00638f a9fa              .db 0x14, 0x86, 0x78, 0xA6, 0x0D, 0xF0, 0x0A, 0xA9, 0x00, 0x20, 0xED, 0xC6, 0xCA, 0xD0, 0xFA, 0xA9
+006390 860d
+006391 a60e
+006392 2978
+006393 60ff
+006394 62a5
+006395 0b10
+006396 8da5
+006397 8ea4              .db 0x0D, 0x86, 0x0E, 0xA6, 0x78, 0x29, 0xFF, 0x60, 0xA5, 0x62, 0x10, 0x0B, 0xA5, 0x8D, 0xA4, 0x8E
+006398 8785
+006399 8884
+00639a 024c
+00639b a9ca
+00639c a01b
+00639d 20e6
+00639e c6d3
+00639f 8ba5              .db 0x85, 0x87, 0x84, 0x88, 0x4C, 0x02, 0xCA, 0xA9, 0x1B, 0xA0, 0xE6, 0x20, 0xD3, 0xC6, 0xA5, 0x8B
+0063a0 8ca4
+0063a1 c385
+0063a2 c484
+0063a3 c960
+0063a4 d022
+0063a5 200b
+0063a6 c9be
+0063a7 3ba9              .db 0xA4, 0x8C, 0x85, 0xC3, 0x84, 0xC4, 0x60, 0xC9, 0x22, 0xD0, 0x0B, 0x20, 0xBE, 0xC9, 0xA9, 0x3B
+0063a8 f120
+0063a9 20c9
+0063aa c6d6
+0063ab 6a20
+0063ac 20ce
+0063ad c040
+0063ae 00a9
+0063af 0dcd              .db 0x20, 0xF1, 0xC9, 0x20, 0xD6, 0xC6, 0x20, 0x6A, 0xCE, 0x20, 0x40, 0xC0, 0xA9, 0x00, 0xCD, 0x0D
+0063b0 d004
+0063b1 180a
+0063b2 2c4c
+0063b3 a6c3
+0063b4 a48f
+0063b5 a990
+0063b6 8580
+0063b7 8662              .db 0x04, 0xD0, 0x0A, 0x18, 0x4C, 0x2C, 0xC3, 0xA6, 0x8F, 0xA4, 0x90, 0xA9, 0x80, 0x85, 0x62, 0x86
+0063b8 8491
+0063b9 2092
+0063ba cbaa
+0063bb 9785
+0063bc 9884
+0063bd c3a5
+0063be c4a4
+0063bf 1185              .db 0x91, 0x84, 0x92, 0x20, 0xAA, 0xCB, 0x85, 0x97, 0x84, 0x98, 0xA5, 0xC3, 0xA4, 0xC4, 0x85, 0x11
+0063c0 1284
+0063c1 91a6
+0063c2 92a4
+0063c3 c386
+0063c4 c484
+0063c5 c220
+0063c6 d000
+0063c7 2411              .db 0x84, 0x12, 0xA6, 0x91, 0xA4, 0x92, 0x86, 0xC3, 0x84, 0xC4, 0x20, 0xC2, 0x00, 0xD0, 0x11, 0x24
+0063c8 3062
+0063c9 2065
+0063ca c6eb
+0063cb 4020
+0063cc 86c0
+0063cd 84c3
+0063ce 20c4
+0063cf 00c2              .db 0x62, 0x30, 0x65, 0x20, 0xEB, 0xC6, 0x20, 0x40, 0xC0, 0x86, 0xC3, 0x84, 0xC4, 0x20, 0xC2, 0x00
+0063d0 5f24
+0063d1 2410
+0063d2 5b85
+0063d3 22c9
+0063d4 07f0
+0063d5 3aa9
+0063d6 5b85
+0063d7 2ca9              .db 0x24, 0x5F, 0x10, 0x24, 0x85, 0x5B, 0xC9, 0x22, 0xF0, 0x07, 0xA9, 0x3A, 0x85, 0x5B, 0xA9, 0x2C
+0063d8 8518
+0063d9 a55c
+0063da a4c3
+0063db 69c4
+0063dc 9000
+0063dd c801
+0063de 4a20
+0063df 20cf              .db 0x18, 0x85, 0x5C, 0xA5, 0xC3, 0xA4, 0xC4, 0x69, 0x00, 0x90, 0x01, 0xC8, 0x20, 0x4A, 0xCF, 0x20
+0063e0 d2cf
+0063e1 d020
+0063e2 4cc5
+0063e3 c7ce
+0063e4 a620
+0063e5 20d7
+0063e6 d6a3
+0063e7 c220              .db 0xCF, 0xD2, 0x20, 0xD0, 0xC5, 0x4C, 0xCE, 0xC7, 0x20, 0xA6, 0xD7, 0x20, 0xA3, 0xD6, 0x20, 0xC2
+0063e8 f000
+0063e9 c90a
+0063ea f02c
+0063eb 4c03
+0063ec c728
+0063ed bc20
+0063ee a500
+0063ef a4c3              .db 0x00, 0xF0, 0x0A, 0xC9, 0x2C, 0xF0, 0x03, 0x4C, 0x28, 0xC7, 0x20, 0xBC, 0x00, 0xA5, 0xC3, 0xA4
+0063f0 85c4
+0063f1 8491
+0063f2 a592
+0063f3 a411
+0063f4 8512
+0063f5 84c3
+0063f6 20c4
+0063f7 00c2              .db 0xC4, 0x85, 0x91, 0x84, 0x92, 0xA5, 0x11, 0xA4, 0x12, 0x85, 0xC3, 0x84, 0xC4, 0x20, 0xC2, 0x00
+0063f8 2cf0
+0063f9 fe20
+0063fa 4cc9
+0063fb c773
+0063fc 9d20
+0063fd c8c4
+0063fe d0aa
+0063ff a212              .db 0xF0, 0x2C, 0x20, 0xFE, 0xC9, 0x4C, 0x73, 0xC7, 0x20, 0x9D, 0xC4, 0xC8, 0xAA, 0xD0, 0x12, 0xA2
+006400 c806
+006401 c3b1
+006402 73f0
+006403 b1c8
+006404 85c3
+006405 c88d
+006406 c3b1
+006407 85c8              .db 0x06, 0xC8, 0xB1, 0xC3, 0xF0, 0x73, 0xC8, 0xB1, 0xC3, 0x85, 0x8D, 0xC8, 0xB1, 0xC3, 0xC8, 0x85
+006408 b18e
+006409 c8c3
+00640a 20aa
+00640b c48f
+00640c 83e0
+00640d 81f0
+00640e dad0
+00640f 91a5              .db 0x8E, 0xB1, 0xC3, 0xC8, 0xAA, 0x20, 0x8F, 0xC4, 0xE0, 0x83, 0xF0, 0x81, 0xD0, 0xDA, 0xA5, 0x91
+006410 92a4
+006411 62a6
+006412 0310
+006413 4e4c
+006414 a0c3
+006415 b100
+006416 d091
+006417 6001              .db 0xA4, 0x92, 0xA6, 0x62, 0x10, 0x03, 0x4C, 0x4E, 0xC3, 0xA0, 0x00, 0xB1, 0x91, 0xD0, 0x01, 0x60
+006418 0aa9
+006419 e6a0
+00641a d34c
+00641b bac6
+00641c e8e8
+00641d e8e8
+00641e 01bd
+00641f c901              .db 0xA9, 0x0A, 0xA0, 0xE6, 0x4C, 0xD3, 0xC6, 0xBA, 0xE8, 0xE8, 0xE8, 0xE8, 0xBD, 0x01, 0x01, 0xC9
+006420 d081
+006421 a521
+006422 d098
+006423 bd0a
+006424 0102
+006425 9785
+006426 03bd
+006427 8501              .db 0x81, 0xD0, 0x21, 0xA5, 0x98, 0xD0, 0x0A, 0xBD, 0x02, 0x01, 0x85, 0x97, 0xBD, 0x03, 0x01, 0x85
+006428 dd98
+006429 0103
+00642a 07d0
+00642b 97a5
+00642c 02dd
+00642d f001
+00642e 8a07
+00642f 6918              .db 0x98, 0xDD, 0x03, 0x01, 0xD0, 0x07, 0xA5, 0x97, 0xDD, 0x02, 0x01, 0xF0, 0x07, 0x8A, 0x18, 0x69
+006430 aa10
+006431 d8d0
+006432 d060
+006433 a004
+006434 f000
+006435 2003
+006436 cbaa
+006437 9785              .db 0x10, 0xAA, 0xD0, 0xD8, 0x60, 0xD0, 0x04, 0xA0, 0x00, 0xF0, 0x03, 0x20, 0xAA, 0xCB, 0x85, 0x97
+006438 9884
+006439 3720
+00643a f0c8
+00643b a204
+00643c f000
+00643d 9a63
+00643e 388a
+00643f f7e9              .db 0x84, 0x98, 0x20, 0x37, 0xC8, 0xF0, 0x04, 0xA2, 0x00, 0xF0, 0x63, 0x9A, 0x8A, 0x38, 0xE9, 0xF7
+006440 7385
+006441 fb69
+006442 01a0
+006443 7d20
+006444 bad6
+006445 08bd
+006446 8501
+006447 a5b0              .db 0x85, 0x73, 0x69, 0xFB, 0xA0, 0x01, 0x20, 0x7D, 0xD6, 0xBA, 0xBD, 0x08, 0x01, 0x85, 0xB0, 0xA5
+006448 a497
+006449 2098
+00644a d3be
+00644b a320
+00644c a0d6
+00644d 2001
+00644e d719
+00644f ddba              .db 0x97, 0xA4, 0x98, 0x20, 0xBE, 0xD3, 0x20, 0xA3, 0xD6, 0xA0, 0x01, 0x20, 0x19, 0xD7, 0xBA, 0xDD
+006450 0108
+006451 17f0
+006452 0dbd
+006453 8501
+006454 bd87
+006455 010e
+006456 8885
+006457 10bd              .db 0x08, 0x01, 0xF0, 0x17, 0xBD, 0x0D, 0x01, 0x85, 0x87, 0xBD, 0x0E, 0x01, 0x85, 0x88, 0xBD, 0x10
+006458 8501
+006459 bdc3
+00645a 010f
+00645b c485
+00645c bc4c
+00645d 8ac2
+00645e 0f69
+00645f 9aaa              .db 0x01, 0x85, 0xC3, 0xBD, 0x0F, 0x01, 0x85, 0xC4, 0x4C, 0xBC, 0xC2, 0x8A, 0x69, 0x0F, 0xAA, 0x9A
+006460 c220
+006461 c900
+006462 d02c
+006463 20f1
+006464 00bc
+006465 6b20
+006466 20c8
+006467 c8e1              .db 0x20, 0xC2, 0x00, 0xC9, 0x2C, 0xD0, 0xF1, 0x20, 0xBC, 0x00, 0x20, 0x6B, 0xC8, 0x20, 0xE1, 0xC8
+006468 2418
+006469 2438
+00646a 305f
+00646b b003
+00646c 6003
+00646d fdb0
+00646e 18a2
+00646f 3c4c              .db 0x18, 0x24, 0x38, 0x24, 0x5F, 0x30, 0x03, 0xB0, 0x03, 0x60, 0xB0, 0xFD, 0xA2, 0x18, 0x4C, 0x3C
+006470 a6bf
+006471 d0c3
+006472 c602
+006473 c6c4
+006474 a9c3
+006475 4800
+006476 02a9
+006477 0320              .db 0xBF, 0xA6, 0xC3, 0xD0, 0x02, 0xC6, 0xC4, 0xC6, 0xC3, 0xA9, 0x00, 0x48, 0xA9, 0x02, 0x20, 0x03
+006478 20bf
+006479 c9cd
+00647a 00a9
+00647b 9b85
+00647c c220
+00647d 3800
+00647e c1e9
+00647f 1790              .db 0xBF, 0x20, 0xCD, 0xC9, 0xA9, 0x00, 0x85, 0x9B, 0x20, 0xC2, 0x00, 0x38, 0xE9, 0xC1, 0x90, 0x17
+006480 03c9
+006481 13b0
+006482 01c9
+006483 492a
+006484 4501
+006485 c59b
+006486 909b
+006487 8567              .db 0xC9, 0x03, 0xB0, 0x13, 0xC9, 0x01, 0x2A, 0x49, 0x01, 0x45, 0x9B, 0xC5, 0x9B, 0x90, 0x67, 0x85
+006488 209b
+006489 00bc
+00648a fb4c
+00648b a6c8
+00648c d09b
+00648d b02c
+00648e 6979
+00648f 900a              .db 0x9B, 0x20, 0xBC, 0x00, 0x4C, 0xFB, 0xC8, 0xA6, 0x9B, 0xD0, 0x2C, 0xB0, 0x79, 0x69, 0x0A, 0x90
+006490 d075
+006491 2407
+006492 105f
+006493 4c03
+006494 d0d4
+006495 7185
+006496 650a
+006497 a871              .db 0x75, 0xD0, 0x07, 0x24, 0x5F, 0x10, 0x03, 0x4C, 0xD4, 0xD0, 0x85, 0x71, 0x0A, 0x65, 0x71, 0xA8
+006498 d968
+006499 e0eb
+00649a 65b0
+00649b d020
+00649c 48c8
+00649d 6220
+00649e 68c9
+00649f 99a4              .db 0x68, 0xD9, 0xEB, 0xE0, 0xB0, 0x65, 0x20, 0xD0, 0xC8, 0x48, 0x20, 0x62, 0xC9, 0x68, 0xA4, 0x99
+0064a0 1910
+0064a1 f0aa
+0064a2 d076
+0064a3 265d
+0064a4 8a5f
+0064a5 5f85
+0064a6 a62a
+0064a7 d0c3              .db 0x10, 0x19, 0xAA, 0xF0, 0x76, 0xD0, 0x5D, 0x26, 0x5F, 0x8A, 0x85, 0x5F, 0x2A, 0xA6, 0xC3, 0xD0
+0064a8 c602
+0064a9 c6c4
+0064aa a0c3
+0064ab 8524
+0064ac d09b
+0064ad d9d5
+0064ae e0eb
+0064af 44b0              .db 0x02, 0xC6, 0xC4, 0xC6, 0xC3, 0xA0, 0x24, 0x85, 0x9B, 0xD0, 0xD5, 0xD9, 0xEB, 0xE0, 0xB0, 0x44
+0064b0 d790
+0064b1 edb9
+0064b2 48e0
+0064b3 ecb9
+0064b4 48e0
+0064b5 7920
+0064b6 a5c9
+0064b7 489b              .db 0x90, 0xD7, 0xB9, 0xED, 0xE0, 0x48, 0xB9, 0xEC, 0xE0, 0x48, 0x20, 0x79, 0xC9, 0xA5, 0x9B, 0x48
+0064b8 ebb9
+0064b9 4ce0
+0064ba c8eb
+0064bb 024c
+0064bc 68ca
+0064bd 7185
+0064be 71e6
+0064bf 8568              .db 0xB9, 0xEB, 0xE0, 0x4C, 0xEB, 0xC8, 0x4C, 0x02, 0xCA, 0x68, 0x85, 0x71, 0xE6, 0x71, 0x68, 0x85
+0064c0 a572
+0064c1 48b0
+0064c2 d920
+0064c3 a5d6
+0064c4 48af
+0064c5 aea5
+0064c6 a548
+0064c7 48ad              .db 0x72, 0xA5, 0xB0, 0x48, 0x20, 0xD9, 0xD6, 0xA5, 0xAF, 0x48, 0xA5, 0xAE, 0x48, 0xA5, 0xAD, 0x48
+0064c8 aca5
+0064c9 6c48
+0064ca 0071
+0064cb ffa0
+0064cc f068
+0064cd c920
+0064ce f064
+0064cf 2003              .db 0xA5, 0xAC, 0x48, 0x6C, 0x71, 0x00, 0xA0, 0xFF, 0x68, 0xF0, 0x20, 0xC9, 0x64, 0xF0, 0x03, 0x20
+0064d0 c8d0
+0064d1 9984
+0064d2 4a68
+0064d3 6385
+0064d4 8568
+0064d5 68b3
+0064d6 b485
+0064d7 8568              .db 0xD0, 0xC8, 0x84, 0x99, 0x68, 0x4A, 0x85, 0x63, 0x68, 0x85, 0xB3, 0x68, 0x85, 0xB4, 0x68, 0x85
+0064d8 68b5
+0064d9 b685
+0064da 8568
+0064db 45b7
+0064dc 85b0
+0064dd a5b8
+0064de 60ac
+0064df c3a5              .db 0xB5, 0x68, 0x85, 0xB6, 0x68, 0x85, 0xB7, 0x45, 0xB0, 0x85, 0xB8, 0xA5, 0xAC, 0x60, 0xA5, 0xC3
+0064e0 c4a4
+0064e1 0069
+0064e2 0190
+0064e3 20c8
+0064e4 cf44
+0064e5 cf4c
+0064e6 20d2
+0064e7 00bc              .db 0xA4, 0xC4, 0x69, 0x00, 0x90, 0x01, 0xC8, 0x20, 0x44, 0xCF, 0x4C, 0xCF, 0xD2, 0x20, 0xBC, 0x00
+0064e8 03b0
+0064e9 a64c
+0064ea aad7
+0064eb 2f30
+0064ec 24c9
+0064ed f6f0
+0064ee 25c9
+0064ef f2f0              .db 0xB0, 0x03, 0x4C, 0xA6, 0xD7, 0xAA, 0x30, 0x2F, 0xC9, 0x24, 0xF0, 0xF6, 0xC9, 0x25, 0xF0, 0xF2
+0064f0 2ec9
+0064f1 eef0
+0064f2 22c9
+0064f3 d6f0
+0064f4 28c9
+0064f5 4fd0
+0064f6 e920
+0064f7 a9c8              .db 0xC9, 0x2E, 0xF0, 0xEE, 0xC9, 0x22, 0xF0, 0xD6, 0xC9, 0x28, 0xD0, 0x4F, 0x20, 0xE9, 0xC8, 0xA9
+0064f8 a029
+0064f9 d100
+0064fa d0c3
+0064fb 4c0b
+0064fc 00bc
+0064fd 28a9
+0064fe f3d0
+0064ff 2ca9              .db 0x29, 0xA0, 0x00, 0xD1, 0xC3, 0xD0, 0x0B, 0x4C, 0xBC, 0x00, 0xA9, 0x28, 0xD0, 0xF3, 0xA9, 0x2C
+006500 efd0
+006501 02a2
+006502 3c4c
+006503 c9bf
+006504 f0b8
+006505 c929
+006506 f0b7
+006507 c9be              .db 0xD0, 0xEF, 0xA2, 0x02, 0x4C, 0x3C, 0xBF, 0xC9, 0xB8, 0xF0, 0x29, 0xC9, 0xB7, 0xF0, 0xBE, 0xC9
+006508 d0b2
+006509 a013
+00650a d021
+00650b 201f
+00650c cca6
+00650d afa5
+00650e ff49
+00650f a5a8              .db 0xB2, 0xD0, 0x13, 0xA0, 0x21, 0xD0, 0x1F, 0x20, 0xA6, 0xCC, 0xA5, 0xAF, 0x49, 0xFF, 0xA8, 0xA5
+006510 49ae
+006511 4cff
+006512 ce59
+006513 afc9
+006514 03d0
+006515 b44c
+006516 e9ce
+006517 b0c4              .db 0xAE, 0x49, 0xFF, 0x4C, 0x59, 0xCE, 0xC9, 0xAF, 0xD0, 0x03, 0x4C, 0xB4, 0xCE, 0xE9, 0xC4, 0xB0
+006518 4c19
+006519 ca02
+00651a 1ea0
+00651b 6868
+00651c 3a4c
+00651d 20c9
+00651e cbaa
+00651f ae85              .db 0x19, 0x4C, 0x02, 0xCA, 0xA0, 0x1E, 0x68, 0x68, 0x4C, 0x3A, 0xC9, 0x20, 0xAA, 0xCB, 0x85, 0xAE
+006520 af84
+006521 5fa6
+006522 0330
+006523 7d4c
+006524 60d6
+006525 a80a
+006526 a6b9
+006527 48e0              .db 0x84, 0xAF, 0xA6, 0x5F, 0x30, 0x03, 0x4C, 0x7D, 0xD6, 0x60, 0x0A, 0xA8, 0xB9, 0xA6, 0xE0, 0x48
+006528 a5b9
+006529 48e0
+00652a 60b9
+00652b f0e0
+00652c 4805
+00652d 5fb9
+00652e 48e0
+00652f 2060              .db 0xB9, 0xA5, 0xE0, 0x48, 0xB9, 0x60, 0xE0, 0xF0, 0x05, 0x48, 0xB9, 0x5F, 0xE0, 0x48, 0x60, 0x20
+006530 c9ec
+006531 d24c
+006532 20c8
+006533 c9ec
+006534 d04c
+006535 46c8
+006536 4c5f
+006537 00bc              .db 0xEC, 0xC9, 0x4C, 0xD2, 0xC8, 0x20, 0xEC, 0xC9, 0x4C, 0xD0, 0xC8, 0x46, 0x5F, 0x4C, 0xBC, 0x00
+006538 e920
+006539 20c8
+00653a c9fe
+00653b d220
+00653c 68c8
+00653d 68aa
+00653e a5a8
+00653f 48af              .db 0x20, 0xE9, 0xC8, 0x20, 0xFE, 0xC9, 0x20, 0xD2, 0xC8, 0x68, 0xAA, 0x68, 0xA8, 0xA5, 0xAF, 0x48
+006540 aea5
+006541 9848
+006542 8a48
+006543 2048
+006544 d28c
+006545 608a
+006546 e920
+006547 20c8              .db 0xA5, 0xAE, 0x48, 0x98, 0x48, 0x8A, 0x48, 0x20, 0x8C, 0xD2, 0x8A, 0x60, 0x20, 0xE9, 0xC8, 0x20
+006548 c8d0
+006549 aca5
+00654a 98c9
+00654b 20b0
+00654c 5020
+00654d a2d7
+00654e b502
+00654f 95ad              .db 0xD0, 0xC8, 0xA5, 0xAC, 0xC9, 0x98, 0xB0, 0x20, 0x20, 0x50, 0xD7, 0xA2, 0x02, 0xB5, 0xAD, 0x95
+006550 ca11
+006551 f910
+006552 c220
+006553 a200
+006554 c900
+006555 f029
+006556 200a
+006557 d2de              .db 0x11, 0xCA, 0x10, 0xF9, 0x20, 0xC2, 0x00, 0xA2, 0x00, 0xC9, 0x29, 0xF0, 0x0A, 0x20, 0xDE, 0xD2
+006558 c220
+006559 c900
+00655a d029
+00655b 6001
+00655c 294c
+00655d 20cd
+00655e cae2
+00655f 5b45              .db 0x20, 0xC2, 0x00, 0xC9, 0x29, 0xD0, 0x01, 0x60, 0x4C, 0x29, 0xCD, 0x20, 0xE2, 0xCA, 0x45, 0x5B
+006560 a5a8
+006561 45ae
+006562 4c5c
+006563 ce59
+006564 e220
+006565 05ca
+006566 a85b
+006567 aea5              .db 0xA8, 0xA5, 0xAE, 0x45, 0x5C, 0x4C, 0x59, 0xCE, 0x20, 0xE2, 0xCA, 0x05, 0x5B, 0xA8, 0xA5, 0xAE
+006568 5c05
+006569 594c
+00656a 20ce
+00656b cae2
+00656c 5b25
+00656d a5a8
+00656e 25ae
+00656f 4c5c              .db 0x05, 0x5C, 0x4C, 0x59, 0xCE, 0x20, 0xE2, 0xCA, 0x25, 0x5B, 0xA8, 0xA5, 0xAE, 0x25, 0x5C, 0x4C
+006570 ce59
+006571 a620
+006572 a5cc
+006573 85ae
+006574 a55c
+006575 85af
+006576 205b
+006577 d3c3              .db 0x59, 0xCE, 0x20, 0xA6, 0xCC, 0xA5, 0xAE, 0x85, 0x5C, 0xA5, 0xAF, 0x85, 0x5B, 0x20, 0xC3, 0xD3
+006578 a620
+006579 a5cc
+00657a 60af
+00657b d320
+00657c b0c8
+00657d a513
+00657e 09b7
+00657f 257f              .db 0x20, 0xA6, 0xCC, 0xA5, 0xAF, 0x60, 0x20, 0xD3, 0xC8, 0xB0, 0x13, 0xA5, 0xB7, 0x09, 0x7F, 0x25
+006580 85b4
+006581 a9b4
+006582 a0b3
+006583 2000
+006584 d717
+006585 4caa
+006586 cb3f
+006587 5f46              .db 0xB4, 0x85, 0xB4, 0xA9, 0xB3, 0xA0, 0x00, 0x20, 0x17, 0xD7, 0xAA, 0x4C, 0x3F, 0xCB, 0x46, 0x5F
+006588 9bc6
+006589 3e20
+00658a 85d1
+00658b 86ac
+00658c 84ad
+00658d a5ae
+00658e a4b5
+00658f 20b6              .db 0xC6, 0x9B, 0x20, 0x3E, 0xD1, 0x85, 0xAC, 0x86, 0xAD, 0x84, 0xAE, 0xA5, 0xB5, 0xA4, 0xB6, 0x20
+006590 d142
+006591 b586
+006592 b684
+006593 38aa
+006594 ace5
+006595 08f0
+006596 01a9
+006597 0490              .db 0x42, 0xD1, 0x86, 0xB5, 0x84, 0xB6, 0xAA, 0x38, 0xE5, 0xAC, 0xF0, 0x08, 0xA9, 0x01, 0x90, 0x04
+006598 aca6
+006599 ffa9
+00659a b085
+00659b ffa0
+00659c c8e8
+00659d d0ca
+00659e a607
+00659f 30b0              .db 0xA6, 0xAC, 0xA9, 0xFF, 0x85, 0xB0, 0xA0, 0xFF, 0xE8, 0xC8, 0xCA, 0xD0, 0x07, 0xA6, 0xB0, 0x30
+0065a0 180f
+0065a1 0c90
+0065a2 b5b1
+0065a3 add1
+0065a4 eff0
+0065a5 ffa2
+0065a6 02b0
+0065a7 01a2              .db 0x0F, 0x18, 0x90, 0x0C, 0xB1, 0xB5, 0xD1, 0xAD, 0xF0, 0xEF, 0xA2, 0xFF, 0xB0, 0x02, 0xA2, 0x01
+0065a8 8ae8
+0065a9 252a
+0065aa f063
+0065ab a902
+0065ac 4cff
+0065ad d6fa
+0065ae fe20
+0065af aac9              .db 0xE8, 0x8A, 0x2A, 0x25, 0x63, 0xF0, 0x02, 0xA9, 0xFF, 0x4C, 0xFA, 0xD6, 0x20, 0xFE, 0xC9, 0xAA
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+0065b1 20cb
+0065b2 00c2
+0065b3 f4d0
+0065b4 2060
+0065b5 cb9f
+0065b6 aea5
+0065b7 78a6              .db 0x20, 0xAF, 0xCB, 0x20, 0xC2, 0x00, 0xD0, 0xF4, 0x60, 0x20, 0x9F, 0xCB, 0xA5, 0xAE, 0xA6, 0x78
+0065b8 22f0
+0065b9 10e0
+0065ba 23b0
+0065bb af06
+0065bc ca2a
+0065bd fad0
+0065be afa4
+0065bf 594c              .db 0xF0, 0x22, 0xE0, 0x10, 0xB0, 0x23, 0x06, 0xAF, 0x2A, 0xCA, 0xD0, 0xFA, 0xA4, 0xAF, 0x4C, 0x59
+0065c0 20ce
+0065c1 cb9f
+0065c2 aea5
+0065c3 78a6
+0065c4 0af0
+0065c5 10e0
+0065c6 0bb0
+0065c7 664a              .db 0xCE, 0x20, 0x9F, 0xCB, 0xA5, 0xAE, 0xA6, 0x78, 0xF0, 0x0A, 0xE0, 0x10, 0xB0, 0x0B, 0x4A, 0x66
+0065c8 caaf
+0065c9 fad0
+0065ca afa4
+0065cb 594c
+0065cc a9ce
+0065cd a800
+0065ce 594c
+0065cf 20ce              .db 0xAF, 0xCA, 0xD0, 0xFA, 0xA4, 0xAF, 0x4C, 0x59, 0xCE, 0xA9, 0x00, 0xA8, 0x4C, 0x59, 0xCE, 0x20
+0065d0 d28f
+0065d1 7886
+0065d2 c320
+0065d3 4cd3
+0065d4 cca6
+0065d5 00a2
+0065d6 c220
+0065d7 8600              .db 0x8F, 0xD2, 0x86, 0x78, 0x20, 0xC3, 0xD3, 0x4C, 0xA6, 0xCC, 0xA2, 0x00, 0x20, 0xC2, 0x00, 0x86
+0065d8 855e
+0065d9 2993
+0065da 207f
+0065db cc1e
+0065dc 03b0
+0065dd 024c
+0065de a2ca
+0065df 8600              .db 0x5E, 0x85, 0x93, 0x29, 0x7F, 0x20, 0x1E, 0xCC, 0xB0, 0x03, 0x4C, 0x02, 0xCA, 0xA2, 0x00, 0x86
+0065e0 205f
+0065e1 00bc
+0065e2 0590
+0065e3 1e20
+0065e4 90cc
+0065e5 aa0b
+0065e6 bc20
+0065e7 9000              .db 0x5F, 0x20, 0xBC, 0x00, 0x90, 0x05, 0x20, 0x1E, 0xCC, 0x90, 0x0B, 0xAA, 0x20, 0xBC, 0x00, 0x90
+0065e8 20fb
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+0065ea f6b0
+0065eb 24c9
+0065ec 0bd0
+0065ed ffa9
+0065ee 5f85
+0065ef 098a              .db 0xFB, 0x20, 0x1E, 0xCC, 0xB0, 0xF6, 0xC9, 0x24, 0xD0, 0x0B, 0xA9, 0xFF, 0x85, 0x5F, 0x8A, 0x09
+0065f0 aa80
+0065f1 bc20
+0065f2 8600
+0065f3 0594
+0065f4 c961
+0065f5 d028
+0065f6 4c03
+0065f7 ccb8              .db 0x80, 0xAA, 0x20, 0xBC, 0x00, 0x86, 0x94, 0x05, 0x61, 0xC9, 0x28, 0xD0, 0x03, 0x4C, 0xB8, 0xCC
+0065f8 00a9
+0065f9 6185
+0065fa 7ba5
+0065fb 7ca6
+0065fc 00a0
+0065fd ab86
+0065fe aa85
+0065ff 7ee4              .db 0xA9, 0x00, 0x85, 0x61, 0xA5, 0x7B, 0xA6, 0x7C, 0xA0, 0x00, 0x86, 0xAB, 0x85, 0xAA, 0xE4, 0x7E
+006600 04d0
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+006602 2cf0
+006603 93a5
+006604 aad1
+006605 08d0
+006606 94a5
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+006608 f0aa
+006609 8869
+00660a a518
+00660b 69aa
+00660c 9006
+00660d e8e1
+00660e dcd0
+00660f 61c9              .db 0xAA, 0xF0, 0x69, 0x88, 0x18, 0xA5, 0xAA, 0x69, 0x06, 0x90, 0xE1, 0xE8, 0xD0, 0xDC, 0xC9, 0x61
+006610 0ab0
+006611 41c9
+006612 0590
+006613 5be9
+006614 e938
+006615 60a5
+006616 7be9
+006617 e938              .db 0xB0, 0x0A, 0xC9, 0x41, 0x90, 0x05, 0xE9, 0x5B, 0x38, 0xE9, 0xA5, 0x60, 0xE9, 0x7B, 0x38, 0xE9
+006618 6085
+006619 4868
+00661a 3dc9
+00661b 05d0
+00661c e1a9
+00661d dfa0
+00661e a560
+00661f a47d              .db 0x85, 0x60, 0x68, 0x48, 0xC9, 0x3D, 0xD0, 0x05, 0xA9, 0xE1, 0xA0, 0xDF, 0x60, 0xA5, 0x7D, 0xA4
+006620 857e
+006621 84aa
+006622 a5ab
+006623 a47f
+006624 8580
+006625 84a6
+006626 18a7
+006627 0669              .db 0x7E, 0x85, 0xAA, 0x84, 0xAB, 0xA5, 0x7F, 0xA4, 0x80, 0x85, 0xA6, 0x84, 0xA7, 0x18, 0x69, 0x06
+006628 0190
+006629 85c8
+00662a 84a4
+00662b 20a5
+00662c bec1
+00662d a4a5
+00662e a5a4
+00662f 85c8              .db 0x90, 0x01, 0xC8, 0x85, 0xA4, 0x84, 0xA5, 0x20, 0xC1, 0xBE, 0xA5, 0xA4, 0xA4, 0xA5, 0xC8, 0x85
+006630 847d
+006631 a07e
+006632 a500
+006633 9193
+006634 c8aa
+006635 94a5
+006636 aa91
+006637 00a9              .db 0x7D, 0x84, 0x7E, 0xA0, 0x00, 0xA5, 0x93, 0x91, 0xAA, 0xC8, 0xA5, 0x94, 0x91, 0xAA, 0xA9, 0x00
+006638 91c8
+006639 c8aa
+00663a aa91
+00663b 91c8
+00663c c8aa
+00663d aa91
+00663e aaa5
+00663f 6918              .db 0xC8, 0x91, 0xAA, 0xC8, 0x91, 0xAA, 0xC8, 0x91, 0xAA, 0xC8, 0x91, 0xAA, 0xA5, 0xAA, 0x18, 0x69
+006640 a402
+006641 90ab
+006642 c801
+006643 9585
+006644 9684
+006645 a560
+006646 0a5d
+006647 0569              .db 0x02, 0xA4, 0xAB, 0x90, 0x01, 0xC8, 0x85, 0x95, 0x84, 0x96, 0x60, 0xA5, 0x5D, 0x0A, 0x69, 0x05
+006648 aa65
+006649 aba4
+00664a 0190
+00664b 85c8
+00664c 84a4
+00664d 60a5
+00664e bc20
+00664f 2000              .db 0x65, 0xAA, 0xA4, 0xAB, 0x90, 0x01, 0xC8, 0x85, 0xA4, 0x84, 0xA5, 0x60, 0x20, 0xBC, 0x00, 0x20
+006650 c8cd
+006651 b0a5
+006652 0d30
+006653 aca5
+006654 90c9
+006655 0990
+006656 e8a9
+006657 dfa0              .db 0xCD, 0xC8, 0xA5, 0xB0, 0x30, 0x0D, 0xA5, 0xAC, 0xC9, 0x90, 0x90, 0x09, 0xA9, 0xE8, 0xA0, 0xDF
+006658 1720
+006659 d0d7
+00665a 4c74
+00665b d750
+00665c 5ea5
+00665d a548
+00665e 485f
+00665f 00a0              .db 0x20, 0x17, 0xD7, 0xD0, 0x74, 0x4C, 0x50, 0xD7, 0xA5, 0x5E, 0x48, 0xA5, 0x5F, 0x48, 0xA0, 0x00
+006660 4898
+006661 94a5
+006662 a548
+006663 4893
+006664 9c20
+006665 68cc
+006666 9385
+006667 8568              .db 0x98, 0x48, 0xA5, 0x94, 0x48, 0xA5, 0x93, 0x48, 0x20, 0x9C, 0xCC, 0x68, 0x85, 0x93, 0x68, 0x85
+006668 6894
+006669 baa8
+00666a 02bd
+00666b 4801
+00666c 01bd
+00666d 4801
+00666e aea5
+00666f 029d              .db 0x94, 0x68, 0xA8, 0xBA, 0xBD, 0x02, 0x01, 0x48, 0xBD, 0x01, 0x01, 0x48, 0xA5, 0xAE, 0x9D, 0x02
+006670 a501
+006671 9daf
+006672 0101
+006673 20c8
+006674 00c2
+006675 2cc9
+006676 d2f0
+006677 5d84              .db 0x01, 0xA5, 0xAF, 0x9D, 0x01, 0x01, 0xC8, 0x20, 0xC2, 0x00, 0xC9, 0x2C, 0xF0, 0xD2, 0x84, 0x5D
+006678 ef20
+006679 68c9
+00667a 5f85
+00667b 8568
+00667c a65e
+00667d a57d
+00667e 867e
+00667f 85aa              .db 0x20, 0xEF, 0xC9, 0x68, 0x85, 0x5F, 0x68, 0x85, 0x5E, 0xA6, 0x7D, 0xA5, 0x7E, 0x86, 0xAA, 0x85
+006680 c5ab
+006681 d080
+006682 e404
+006683 f07f
+006684 a039
+006685 b100
+006686 c8aa
+006687 93c5              .db 0xAB, 0xC5, 0x80, 0xD0, 0x04, 0xE4, 0x7F, 0xF0, 0x39, 0xA0, 0x00, 0xB1, 0xAA, 0xC8, 0xC5, 0x93
+006688 06d0
+006689 94a5
+00668a aad1
+00668b 16f0
+00668c b1c8
+00668d 18aa
+00668e aa65
+00668f c8aa              .db 0xD0, 0x06, 0xA5, 0x94, 0xD1, 0xAA, 0xF0, 0x16, 0xC8, 0xB1, 0xAA, 0x18, 0x65, 0xAA, 0xAA, 0xC8
+006690 aab1
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+006692 d790
+006693 10a2
+006694 a22c
+006695 4c08
+006696 bf3c
+006697 12a2              .db 0xB1, 0xAA, 0x65, 0xAB, 0x90, 0xD7, 0xA2, 0x10, 0x2C, 0xA2, 0x08, 0x4C, 0x3C, 0xBF, 0xA2, 0x12
+006698 5ea5
+006699 f7d0
+00669a 8b20
+00669b a5cc
+00669c a05d
+00669d d104
+00669e d0aa
+00669f 4ce7              .db 0xA5, 0x5E, 0xD0, 0xF7, 0x20, 0x8B, 0xCC, 0xA5, 0x5D, 0xA0, 0x04, 0xD1, 0xAA, 0xD0, 0xE7, 0x4C
+0066a0 cdc5
+0066a1 8b20
+0066a2 20cc
+0066a3 bf0b
+0066a4 00a0
+0066a5 bb84
+0066a6 93a5
+0066a7 aa91              .db 0xC5, 0xCD, 0x20, 0x8B, 0xCC, 0x20, 0x0B, 0xBF, 0xA0, 0x00, 0x84, 0xBB, 0xA5, 0x93, 0x91, 0xAA
+0066a8 a5c8
+0066a9 9194
+0066aa a5aa
+0066ab a05d
+0066ac 8404
+0066ad 91ba
+0066ae 18aa
+0066af 0ba2              .db 0xC8, 0xA5, 0x94, 0x91, 0xAA, 0xA5, 0x5D, 0xA0, 0x04, 0x84, 0xBA, 0x91, 0xAA, 0x18, 0xA2, 0x0B
+0066b0 00a9
+0066b1 5e24
+0066b2 0750
+0066b3 6968
+0066b4 aa01
+0066b5 6968
+0066b6 c800
+0066b7 aa91              .db 0xA9, 0x00, 0x24, 0x5E, 0x50, 0x07, 0x68, 0x69, 0x01, 0xAA, 0x68, 0x69, 0x00, 0xC8, 0x91, 0xAA
+0066b8 8ac8
+0066b9 aa91
+0066ba 1420
+0066bb 86ce
+0066bc 85ba
+0066bd a4bb
+0066be c671
+0066bf d05d              .db 0xC8, 0x8A, 0x91, 0xAA, 0x20, 0x14, 0xCE, 0x86, 0xBA, 0x85, 0xBB, 0xA4, 0x71, 0xC6, 0x5D, 0xD0
+0066c0 65dd
+0066c1 b0a5
+0066c2 855d
+0066c3 a8a5
+0066c4 658a
+0066c5 90a4
+0066c6 c803
+0066c7 52f0              .db 0xDD, 0x65, 0xA5, 0xB0, 0x5D, 0x85, 0xA5, 0xA8, 0x8A, 0x65, 0xA4, 0x90, 0x03, 0xC8, 0xF0, 0x52
+0066c8 0b20
+0066c9 85bf
+0066ca 847f
+0066cb a980
+0066cc e600
+0066cd a4bb
+0066ce f0ba
+0066cf 8805              .db 0x20, 0x0B, 0xBF, 0x85, 0x7F, 0x84, 0x80, 0xA9, 0x00, 0xE6, 0xBB, 0xA4, 0xBA, 0xF0, 0x05, 0x88
+0066d0 a491
+0066d1 fbd0
+0066d2 a5c6
+0066d3 bbc6
+0066d4 f5d0
+0066d5 a5e6
+0066d6 a038
+0066d7 a502              .db 0x91, 0xA4, 0xD0, 0xFB, 0xC6, 0xA5, 0xC6, 0xBB, 0xD0, 0xF5, 0xE6, 0xA5, 0x38, 0xA0, 0x02, 0xA5
+0066d8 e57f
+0066d9 91aa
+0066da c8aa
+0066db 80a5
+0066dc abe5
+0066dd aa91
+0066de 5ea5
+0066df 53d0              .db 0x7F, 0xE5, 0xAA, 0x91, 0xAA, 0xC8, 0xA5, 0x80, 0xE5, 0xAB, 0x91, 0xAA, 0xA5, 0x5E, 0xD0, 0x53
+0066e0 b1c8
+0066e1 85aa
+0066e2 a95d
+0066e3 8500
+0066e4 85ba
+0066e5 c8bb
+0066e6 aa68
+0066e7 ae85              .db 0xC8, 0xB1, 0xAA, 0x85, 0x5D, 0xA9, 0x00, 0x85, 0xBA, 0x85, 0xBB, 0xC8, 0x68, 0xAA, 0x85, 0xAE
+0066e8 8568
+0066e9 d1af
+0066ea 90aa
+0066eb d00e
+0066ec c806
+0066ed d18a
+0066ee 90aa
+0066ef 4c07              .db 0x68, 0x85, 0xAF, 0xD1, 0xAA, 0x90, 0x0E, 0xD0, 0x06, 0xC8, 0x8A, 0xD1, 0xAA, 0x90, 0x07, 0x4C
+0066f0 cd26
+0066f1 3a4c
+0066f2 c8bf
+0066f3 bba5
+0066f4 ba05
+0066f5 0af0
+0066f6 1420
+0066f7 8ace              .db 0x26, 0xCD, 0x4C, 0x3A, 0xBF, 0xC8, 0xA5, 0xBB, 0x05, 0xBA, 0xF0, 0x0A, 0x20, 0x14, 0xCE, 0x8A
+0066f8 ae65
+0066f9 98aa
+0066fa 71a4
+0066fb af65
+0066fc ba86
+0066fd 5dc6
+0066fe cbd0
+0066ff ba06              .db 0x65, 0xAE, 0xAA, 0x98, 0xA4, 0x71, 0x65, 0xAF, 0x86, 0xBA, 0xC6, 0x5D, 0xD0, 0xCB, 0x06, 0xBA
+006700 062a
+006701 2aba
+006702 a5a8
+006703 65ba
+006704 85a4
+006705 9895
+006706 a565
+006707 9685              .db 0x2A, 0x06, 0xBA, 0x2A, 0xA8, 0xA5, 0xBA, 0x65, 0xA4, 0x85, 0x95, 0x98, 0x65, 0xA5, 0x85, 0x96
+006708 a5a8
+006709 6095
+00670a 7184
+00670b aab1
+00670c 7685
+00670d b188
+00670e 85aa
+00670f a977              .db 0xA8, 0xA5, 0x95, 0x60, 0x84, 0x71, 0xB1, 0xAA, 0x85, 0x76, 0x88, 0xB1, 0xAA, 0x85, 0x77, 0xA9
+006710 8510
+006711 a2a8
+006712 a000
+006713 8a00
+006714 aa0a
+006715 2a98
+006716 b0a8
+006717 06b3              .db 0x10, 0x85, 0xA8, 0xA2, 0x00, 0xA0, 0x00, 0x8A, 0x0A, 0xAA, 0x98, 0x2A, 0xA8, 0xB0, 0xB3, 0x06
+006718 26ba
+006719 90bb
+00671a 180b
+00671b 658a
+00671c aa76
+00671d 6598
+00671e a877
+00671f a2b0              .db 0xBA, 0x26, 0xBB, 0x90, 0x0B, 0x18, 0x8A, 0x65, 0x76, 0xAA, 0x98, 0x65, 0x77, 0xA8, 0xB0, 0xA2
+006720 a8c6
+006721 e3d0
+006722 a560
+006723 105f
+006724 2003
+006725 d13e
+006726 df20
+006727 38cf              .db 0xC6, 0xA8, 0xD0, 0xE3, 0x60, 0xA5, 0x5F, 0x10, 0x03, 0x20, 0x3E, 0xD1, 0x20, 0xDF, 0xCF, 0x38
+006728 81a5
+006729 7fe5
+00672a a5a8
+00672b e582
+00672c 4680
+00672d 855f
+00672e 84ad
+00672f a2ae              .db 0xA5, 0x81, 0xE5, 0x7F, 0xA8, 0xA5, 0x82, 0xE5, 0x80, 0x46, 0x5F, 0x85, 0xAD, 0x84, 0xAE, 0xA2
+006730 4c90
+006731 d702
+006732 0ea4
+006733 00a9
+006734 eff0
+006735 88a6
+006736 d0e8
+006737 a2a4              .db 0x90, 0x4C, 0x02, 0xD7, 0xA4, 0x0E, 0xA9, 0x00, 0xF0, 0xEF, 0xA6, 0x88, 0xE8, 0xD0, 0xA4, 0xA2
+006738 4c16
+006739 bf3c
+00673a a520
+00673b 85ce
+00673c 849c
+00673d 209d
+00673e ce6a
+00673f fa20              .db 0x16, 0x4C, 0x3C, 0xBF, 0x20, 0xA5, 0xCE, 0x85, 0x9C, 0x84, 0x9D, 0x20, 0x6A, 0xCE, 0x20, 0xFA
+006740 a9c9
+006741 8580
+006742 2061
+006743 cbaa
+006744 d020
+006745 20c8
+006746 c9ef
+006747 c2a9              .db 0xC9, 0xA9, 0x80, 0x85, 0x61, 0x20, 0xAA, 0xCB, 0x20, 0xD0, 0xC8, 0x20, 0xEF, 0xC9, 0xA9, 0xC2
+006748 f120
+006749 a5c9
+00674a 4896
+00674b 95a5
+00674c a548
+00674d 48c4
+00674e c3a5
+00674f 2048              .db 0x20, 0xF1, 0xC9, 0xA5, 0x96, 0x48, 0xA5, 0x95, 0x48, 0xA5, 0xC4, 0x48, 0xA5, 0xC3, 0x48, 0x20
+006750 c48c
+006751 144c
+006752 a9cf
+006753 20af
+006754 c9f1
+006755 8009
+006756 6185
+006757 b120              .db 0x8C, 0xC4, 0x4C, 0x14, 0xCF, 0xA9, 0xAF, 0x20, 0xF1, 0xC9, 0x09, 0x80, 0x85, 0x61, 0x20, 0xB1
+006758 4ccb
+006759 c8d0
+00675a a520
+00675b 48ce
+00675c 4898
+00675d fa20
+00675e 20c9
+00675f c8e1              .db 0xCB, 0x4C, 0xD0, 0xC8, 0x20, 0xA5, 0xCE, 0x48, 0x98, 0x48, 0x20, 0xFA, 0xC9, 0x20, 0xE1, 0xC8
+006760 ef20
+006761 20c9
+006762 c8d0
+006763 8568
+006764 689d
+006765 9c85
+006766 20a2
+006767 03a0              .db 0x20, 0xEF, 0xC9, 0x20, 0xD0, 0xC8, 0x68, 0x85, 0x9D, 0x68, 0x85, 0x9C, 0xA2, 0x20, 0xA0, 0x03
+006768 9cb1
+006769 9df0
+00676a 9685
+00676b b188
+00676c 859c
+00676d aa95
+00676e b1c8
+00676f 4895              .db 0xB1, 0x9C, 0xF0, 0x9D, 0x85, 0x96, 0x88, 0xB1, 0x9C, 0x85, 0x95, 0xAA, 0xC8, 0xB1, 0x95, 0x48
+006770 1088
+006771 a4fa
+006772 2096
+006773 d6a7
+006774 c4a5
+006775 a548
+006776 48c3
+006777 9cb1              .db 0x88, 0x10, 0xFA, 0xA4, 0x96, 0x20, 0xA7, 0xD6, 0xA5, 0xC4, 0x48, 0xA5, 0xC3, 0x48, 0xB1, 0x9C
+006778 c385
+006779 b1c8
+00677a 859c
+00677b a5c4
+00677c 4896
+00677d 95a5
+00677e 2048
+00677f c8cd              .db 0x85, 0xC3, 0xC8, 0xB1, 0x9C, 0x85, 0xC4, 0xA5, 0x96, 0x48, 0xA5, 0x95, 0x48, 0x20, 0xCD, 0xC8
+006780 8568
+006781 689c
+006782 9d85
+006783 c220
+006784 f000
+006785 4c03
+006786 ca02
+006787 8568              .db 0x68, 0x85, 0x9C, 0x68, 0x85, 0x9D, 0x20, 0xC2, 0x00, 0xF0, 0x03, 0x4C, 0x02, 0xCA, 0x68, 0x85
+006788 68c3
+006789 c485
+00678a 00a0
+00678b 9168
+00678c c89c
+00678d 9168
+00678e c89c
+00678f 9168              .db 0xC3, 0x68, 0x85, 0xC4, 0xA0, 0x00, 0x68, 0x91, 0x9C, 0xC8, 0x68, 0x91, 0x9C, 0xC8, 0x68, 0x91
+006790 c89c
+006791 9168
+006792 609c
+006793 d020
+006794 20c8
+006795 d895
+006796 f0a9
+006797 00a0              .db 0x9C, 0xC8, 0x68, 0x91, 0x9C, 0x60, 0x20, 0xD0, 0xC8, 0x20, 0x95, 0xD8, 0xA9, 0xF0, 0xA0, 0x00
+006798 12f0
+006799 aea6
+00679a afa4
+00679b 9e86
+00679c 9f84
+00679d ad20
+00679e 86cf
+00679f 84ad              .db 0xF0, 0x12, 0xA6, 0xAE, 0xA4, 0xAF, 0x86, 0x9E, 0x84, 0x9F, 0x20, 0xAD, 0xCF, 0x86, 0xAD, 0x84
+0067a0 85ae
+0067a1 60ac
+0067a2 22a2
+0067a3 5b86
+0067a4 5c86
+0067a5 b885
+0067a6 b984
+0067a7 ad85              .db 0xAE, 0x85, 0xAC, 0x60, 0xA2, 0x22, 0x86, 0x5B, 0x86, 0x5C, 0x85, 0xB8, 0x84, 0xB9, 0x85, 0xAD
+0067a8 ae84
+0067a9 ffa0
+0067aa b1c8
+0067ab f0b8
+0067ac c50c
+0067ad f05b
+0067ae c504
+0067af d05c              .db 0x84, 0xAE, 0xA0, 0xFF, 0xC8, 0xB1, 0xB8, 0xF0, 0x0C, 0xC5, 0x5B, 0xF0, 0x04, 0xC5, 0x5C, 0xD0
+0067b0 c9f3
+0067b1 f022
+0067b2 1801
+0067b3 ac84
+0067b4 6598
+0067b5 85b8
+0067b6 a6ba
+0067b7 90b9              .db 0xF3, 0xC9, 0x22, 0xF0, 0x01, 0x18, 0x84, 0xAC, 0x98, 0x65, 0xB8, 0x85, 0xBA, 0xA6, 0xB9, 0x90
+0067b8 e801
+0067b9 bb86
+0067ba b9a5
+0067bb 05c9
+0067bc 0bb0
+0067bd 2098
+0067be cf32
+0067bf b8a6              .db 0x01, 0xE8, 0x86, 0xBB, 0xA5, 0xB9, 0xC9, 0x05, 0xB0, 0x0B, 0x98, 0x20, 0x32, 0xCF, 0xA6, 0xB8
+0067c0 b9a4
+0067c1 1f20
+0067c2 a6d1
+0067c3 e065
+0067c4 d071
+0067c5 a205
+0067c6 4c1c
+0067c7 bf3c              .db 0xA4, 0xB9, 0x20, 0x1F, 0xD1, 0xA6, 0x65, 0xE0, 0x71, 0xD0, 0x05, 0xA2, 0x1C, 0x4C, 0x3C, 0xBF
+0067c8 aca5
+0067c9 0095
+0067ca ada5
+0067cb 0195
+0067cc aea5
+0067cd 0295
+0067ce 00a0
+0067cf ae86              .db 0xA5, 0xAC, 0x95, 0x00, 0xA5, 0xAD, 0x95, 0x01, 0xA5, 0xAE, 0x95, 0x02, 0xA0, 0x00, 0x86, 0xAE
+0067d0 af84
+0067d1 8488
+0067d2 865f
+0067d3 e866
+0067d4 e8e8
+0067d5 6586
+0067d6 4660
+0067d7 4860              .db 0x84, 0xAF, 0x88, 0x84, 0x5F, 0x86, 0x66, 0xE8, 0xE8, 0xE8, 0x86, 0x65, 0x60, 0x46, 0x60, 0x48
+0067d8 ff49
+0067d9 6538
+0067da a481
+0067db b082
+0067dc 8801
+0067dd 80c4
+0067de 1190
+0067df 04d0              .db 0x49, 0xFF, 0x38, 0x65, 0x81, 0xA4, 0x82, 0xB0, 0x01, 0x88, 0xC4, 0x80, 0x90, 0x11, 0xD0, 0x04
+0067e0 7fc5
+0067e1 0b90
+0067e2 8185
+0067e3 8284
+0067e4 8385
+0067e5 8484
+0067e6 68aa
+0067e7 a260              .db 0xC5, 0x7F, 0x90, 0x0B, 0x85, 0x81, 0x84, 0x82, 0x85, 0x83, 0x84, 0x84, 0xAA, 0x68, 0x60, 0xA2
+0067e8 a50c
+0067e9 3060
+0067ea 20b8
+0067eb cfdf
+0067ec 80a9
+0067ed 6085
+0067ee d068
+0067ef a6d0              .db 0x0C, 0xA5, 0x60, 0x30, 0xB8, 0x20, 0xDF, 0xCF, 0xA9, 0x80, 0x85, 0x60, 0x68, 0xD0, 0xD0, 0xA6
+0067f0 a585
+0067f1 8686
+0067f2 8581
+0067f3 a082
+0067f4 8400
+0067f5 a59d
+0067f6 a67f
+0067f7 8580              .db 0x85, 0xA5, 0x86, 0x86, 0x81, 0x85, 0x82, 0xA0, 0x00, 0x84, 0x9D, 0xA5, 0x7F, 0xA6, 0x80, 0x85
+0067f8 86aa
+0067f9 a9ab
+0067fa 8568
+0067fb 8471
+0067fc c572
+0067fd f065
+0067fe 2005
+0067ff d063              .db 0xAA, 0x86, 0xAB, 0xA9, 0x68, 0x85, 0x71, 0x84, 0x72, 0xC5, 0x65, 0xF0, 0x05, 0x20, 0x63, 0xD0
+006800 f7f0
+006801 a006
+006802 7ba5
+006803 7ca6
+006804 7185
+006805 7286
+006806 7ee4
+006807 04d0              .db 0xF0, 0xF7, 0x06, 0xA0, 0xA5, 0x7B, 0xA6, 0x7C, 0x85, 0x71, 0x86, 0x72, 0xE4, 0x7E, 0xD0, 0x04
+006808 7dc5
+006809 05f0
+00680a 5d20
+00680b f0d0
+00680c 85f3
+00680d 86a4
+00680e a9a5
+00680f 8504              .db 0xC5, 0x7D, 0xF0, 0x05, 0x20, 0x5D, 0xD0, 0xF0, 0xF3, 0x85, 0xA4, 0x86, 0xA5, 0xA9, 0x04, 0x85
+006810 a5a0
+006811 a6a4
+006812 e4a5
+006813 d080
+006814 c504
+006815 f07f
+006816 8575
+006817 8671              .db 0xA0, 0xA5, 0xA4, 0xA6, 0xA5, 0xE4, 0x80, 0xD0, 0x04, 0xC5, 0x7F, 0xF0, 0x75, 0x85, 0x71, 0x86
+006818 a072
+006819 b102
+00681a 6571
+00681b 85a4
+00681c c8a4
+00681d 71b1
+00681e a565
+00681f a585              .db 0x72, 0xA0, 0x02, 0xB1, 0x71, 0x65, 0xA4, 0x85, 0xA4, 0xC8, 0xB1, 0x71, 0x65, 0xA5, 0x85, 0xA5
+006820 01a0
+006821 71b1
+006822 db10
+006823 04a0
+006824 71b1
+006825 690a
+006826 2005
+006827 d095              .db 0xA0, 0x01, 0xB1, 0x71, 0x10, 0xDB, 0xA0, 0x04, 0xB1, 0x71, 0x0A, 0x69, 0x05, 0x20, 0x95, 0xD0
+006828 a5e4
+006829 04d0
+00682a a4c5
+00682b cdf0
+00682c 6320
+00682d f0d0
+00682e c8f3
+00682f 71b1              .db 0xE4, 0xA5, 0xD0, 0x04, 0xC5, 0xA4, 0xF0, 0xCD, 0x20, 0x63, 0xD0, 0xF0, 0xF3, 0xC8, 0xB1, 0x71
+006830 3010
+006831 b1c8
+006832 f071
+006833 c82b
+006834 71b1
+006835 c8aa
+006836 71b1
+006837 82c5              .db 0x10, 0x30, 0xC8, 0xB1, 0x71, 0xF0, 0x2B, 0xC8, 0xB1, 0x71, 0xAA, 0xC8, 0xB1, 0x71, 0xC5, 0x82
+006838 0690
+006839 1ed0
+00683a 81e4
+00683b 1ab0
+00683c abc5
+00683d 1790
+00683e 04d0
+00683f aae4              .db 0x90, 0x06, 0xD0, 0x1E, 0xE4, 0x81, 0xB0, 0x1A, 0xC5, 0xAB, 0x90, 0x17, 0xD0, 0x04, 0xE4, 0xAA
+006840 1190
+006841 aa86
+006842 ab85
+006843 71a5
+006844 72a6
+006845 9c85
+006846 9d86
+006847 8888              .db 0x90, 0x11, 0x86, 0xAA, 0x85, 0xAB, 0xA5, 0x71, 0xA6, 0x72, 0x85, 0x9C, 0x86, 0x9D, 0x88, 0x88
+006848 a284
+006849 a518
+00684a 65a0
+00684b 8571
+00684c 9071
+00684d e602
+00684e a672
+00684f a072              .db 0x84, 0xA2, 0x18, 0xA5, 0xA0, 0x65, 0x71, 0x85, 0x71, 0x90, 0x02, 0xE6, 0x72, 0xA6, 0x72, 0xA0
+006850 6000
+006851 a0c6
+006852 9da6
+006853 f5f0
+006854 a2a4
+006855 b118
+006856 659c
+006857 85aa              .db 0x00, 0x60, 0xC6, 0xA0, 0xA6, 0x9D, 0xF0, 0xF5, 0xA4, 0xA2, 0x18, 0xB1, 0x9C, 0x65, 0xAA, 0x85
+006858 a5a6
+006859 69ab
+00685a 8500
+00685b a5a7
+00685c a681
+00685d 8582
+00685e 86a4
+00685f 20a5              .db 0xA6, 0xA5, 0xAB, 0x69, 0x00, 0x85, 0xA7, 0xA5, 0x81, 0xA6, 0x82, 0x85, 0xA4, 0x86, 0xA5, 0x20
+006860 bec8
+006861 a2a4
+006862 a5c8
+006863 91a4
+006864 aa9c
+006865 a5e6
+006866 a5a5
+006867 91c8              .db 0xC8, 0xBE, 0xA4, 0xA2, 0xC8, 0xA5, 0xA4, 0x91, 0x9C, 0xAA, 0xE6, 0xA5, 0xA5, 0xA5, 0xC8, 0x91
+006868 4c9c
+006869 cfe3
+00686a afa5
+00686b a548
+00686c 48ae
+00686d cd20
+00686e 20c9
+00686f c8d2              .db 0x9C, 0x4C, 0xE3, 0xCF, 0xA5, 0xAF, 0x48, 0xA5, 0xAE, 0x48, 0x20, 0xCD, 0xC9, 0x20, 0xD2, 0xC8
+006870 8568
+006871 68b8
+006872 b985
+006873 00a0
+006874 b8b1
+006875 7118
+006876 90ae
+006877 a205              .db 0x68, 0x85, 0xB8, 0x68, 0x85, 0xB9, 0xA0, 0x00, 0xB1, 0xB8, 0x18, 0x71, 0xAE, 0x90, 0x05, 0xA2
+006878 4c1a
+006879 bf3c
+00687a 3220
+00687b 20cf
+00687c d111
+00687d 9ea5
+00687e 9fa4
+00687f 4220              .db 0x1A, 0x4C, 0x3C, 0xBF, 0x20, 0x32, 0xCF, 0x20, 0x11, 0xD1, 0xA5, 0x9E, 0xA4, 0x9F, 0x20, 0x42
+006880 20d1
+006881 d123
+006882 b8a5
+006883 b9a4
+006884 4220
+006885 20d1
+006886 cf85
+006887 f84c              .db 0xD1, 0x20, 0x23, 0xD1, 0xA5, 0xB8, 0xA4, 0xB9, 0x20, 0x42, 0xD1, 0x20, 0x85, 0xCF, 0x4C, 0xF8
+006888 a0c8
+006889 b100
+00688a 48b8
+00688b b1c8
+00688c aab8
+00688d b1c8
+00688e a8b8
+00688f 8668              .db 0xC8, 0xA0, 0x00, 0xB1, 0xB8, 0x48, 0xC8, 0xB1, 0xB8, 0xAA, 0xC8, 0xB1, 0xB8, 0xA8, 0x68, 0x86
+006890 8471
+006891 aa72
+006892 14f0
+006893 00a0
+006894 71b1
+006895 8391
+006896 cac8
+006897 f8d0              .db 0x71, 0x84, 0x72, 0xAA, 0xF0, 0x14, 0xA0, 0x00, 0xB1, 0x71, 0x91, 0x83, 0xC8, 0xCA, 0xD0, 0xF8
+006898 1898
+006899 8365
+00689a 8385
+00689b 0290
+00689c 84e6
+00689d 2060
+00689e c8d2
+00689f aea5              .db 0x98, 0x18, 0x65, 0x83, 0x85, 0x83, 0x90, 0x02, 0xE6, 0x84, 0x60, 0x20, 0xD2, 0xC8, 0xA5, 0xAE
+0068a0 afa4
+0068a1 7185
+0068a2 7284
+0068a3 7320
+0068a4 08d1
+0068a5 00a0
+0068a6 71b1
+0068a7 c848              .db 0xA4, 0xAF, 0x85, 0x71, 0x84, 0x72, 0x20, 0x73, 0xD1, 0x08, 0xA0, 0x00, 0xB1, 0x71, 0x48, 0xC8
+0068a8 71b1
+0068a9 c8aa
+0068aa 71b1
+0068ab 68a8
+0068ac d028
+0068ad c413
+0068ae d082
+0068af e40f              .db 0xB1, 0x71, 0xAA, 0xC8, 0xB1, 0x71, 0xA8, 0x68, 0x28, 0xD0, 0x13, 0xC4, 0x82, 0xD0, 0x0F, 0xE4
+0068b0 d081
+0068b1 480b
+0068b2 6518
+0068b3 8581
+0068b4 9081
+0068b5 e602
+0068b6 6882
+0068b7 7186              .db 0x81, 0xD0, 0x0B, 0x48, 0x18, 0x65, 0x81, 0x85, 0x81, 0x90, 0x02, 0xE6, 0x82, 0x68, 0x86, 0x71
+0068b8 7284
+0068b9 c460
+0068ba d067
+0068bb c50c
+0068bc d066
+0068bd 8508
+0068be e965
+0068bf 8503              .db 0x84, 0x72, 0x60, 0xC4, 0x67, 0xD0, 0x0C, 0xC5, 0x66, 0xD0, 0x08, 0x85, 0x65, 0xE9, 0x03, 0x85
+0068c0 a066
+0068c1 6000
+0068c2 8f20
+0068c3 8ad2
+0068c4 a948
+0068c5 2001
+0068c6 cf3a
+0068c7 a068              .db 0x66, 0xA0, 0x00, 0x60, 0x20, 0x8F, 0xD2, 0x8A, 0x48, 0xA9, 0x01, 0x20, 0x3A, 0xCF, 0x68, 0xA0
+0068c8 9100
+0068c9 4cad
+0068ca cf85
+0068cb 2048
+0068cc d1f7
+0068cd 9ed1
+0068ce f098
+0068cf 4809              .db 0x00, 0x91, 0xAD, 0x4C, 0x85, 0xCF, 0x48, 0x20, 0xF7, 0xD1, 0xD1, 0x9E, 0x98, 0xF0, 0x09, 0x48
+0068d0 f720
+0068d1 18d1
+0068d2 9ef1
+0068d3 ff49
+0068d4 0490
+0068d5 9eb1
+0068d6 98aa
+0068d7 8a48              .db 0x20, 0xF7, 0xD1, 0x18, 0xF1, 0x9E, 0x49, 0xFF, 0x90, 0x04, 0xB1, 0x9E, 0xAA, 0x98, 0x48, 0x8A
+0068d8 2048
+0068d9 cf3a
+0068da 9ea5
+0068db 9fa4
+0068dc 4220
+0068dd 68d1
+0068de 68a8
+0068df 6518              .db 0x48, 0x20, 0x3A, 0xCF, 0xA5, 0x9E, 0xA4, 0x9F, 0x20, 0x42, 0xD1, 0x68, 0xA8, 0x68, 0x18, 0x65
+0068e0 8571
+0068e1 9071
+0068e2 e602
+0068e3 9872
+0068e4 2320
+0068e5 4cd1
+0068e6 cf85
+0068e7 a948              .db 0x71, 0x85, 0x71, 0x90, 0x02, 0xE6, 0x72, 0x98, 0x20, 0x23, 0xD1, 0x4C, 0x85, 0xCF, 0x48, 0xA9
+0068e8 85ff
+0068e9 20af
+0068ea 00c2
+0068eb 29c9
+0068ec 06f0
+0068ed fe20
+0068ee 20c9
+0068ef d28c              .db 0xFF, 0x85, 0xAF, 0x20, 0xC2, 0x00, 0xC9, 0x29, 0xF0, 0x06, 0x20, 0xFE, 0xC9, 0x20, 0x8C, 0xD2
+0068f0 f720
+0068f1 cad1
+0068f2 488a
+0068f3 a218
+0068f4 f100
+0068f5 b09e
+0068f6 49c2
+0068f7 c5ff              .db 0x20, 0xF7, 0xD1, 0xCA, 0x8A, 0x48, 0x18, 0xA2, 0x00, 0xF1, 0x9E, 0xB0, 0xC2, 0x49, 0xFF, 0xC5
+0068f8 90af
+0068f9 a5bd
+0068fa b0af
+0068fb 20b9
+0068fc c9ef
+0068fd 8568
+0068fe 68a2
+0068ff a385              .db 0xAF, 0x90, 0xBD, 0xA5, 0xAF, 0xB0, 0xB9, 0x20, 0xEF, 0xC9, 0x68, 0x85, 0xA2, 0x68, 0x85, 0xA3
+006900 aa68
+006901 8568
+006902 689e
+006903 9f85
+006904 00a0
+006905 f08a
+006906 e679
+006907 6ca2              .db 0x68, 0xAA, 0x68, 0x85, 0x9E, 0x68, 0x85, 0x9F, 0xA0, 0x00, 0x8A, 0xF0, 0x79, 0xE6, 0xA2, 0x6C
+006908 00a2
+006909 3b20
+00690a 85d1
+00690b a8ac
+00690c 38f0
+00690d 3a20
+00690e 86cf
+00690f 84ad              .db 0xA2, 0x00, 0x20, 0x3B, 0xD1, 0x85, 0xAC, 0xA8, 0xF0, 0x38, 0x20, 0x3A, 0xCF, 0x86, 0xAD, 0x84
+006910 a8ae
+006911 b188
+006912 2071
+006913 cc22
+006914 0290
+006915 2009
+006916 8391
+006917 d098              .db 0xAE, 0xA8, 0x88, 0xB1, 0x71, 0x20, 0x22, 0xCC, 0x90, 0x02, 0x09, 0x20, 0x91, 0x83, 0x98, 0xD0
+006918 f0f1
+006919 201f
+00691a d13b
+00691b ac85
+00691c f0a8
+00691d 2017
+00691e cf3a
+00691f ad86              .db 0xF1, 0xF0, 0x1F, 0x20, 0x3B, 0xD1, 0x85, 0xAC, 0xA8, 0xF0, 0x17, 0x20, 0x3A, 0xCF, 0x86, 0xAD
+006920 ae84
+006921 88a8
+006922 71b1
+006923 1e20
+006924 90cc
+006925 2902
+006926 91df
+006927 9883              .db 0x84, 0xAE, 0xA8, 0x88, 0xB1, 0x71, 0x20, 0x1E, 0xCC, 0x90, 0x02, 0x29, 0xDF, 0x91, 0x83, 0x98
+006928 f1d0
+006929 854c
+00692a 20cf
+00692b 00bc
+00692c aa20
+00692d 20cb
+00692e c9ef
+00692f d220              .db 0xD0, 0xF1, 0x4C, 0x85, 0xCF, 0x20, 0xBC, 0x00, 0x20, 0xAA, 0xCB, 0x20, 0xEF, 0xC9, 0x20, 0xD2
+006930 a0c8
+006931 b102
+006932 aa95
+006933 b188
+006934 a895
+006935 4c8a
+006936 ce59
+006937 7420              .db 0xC8, 0xA0, 0x02, 0xB1, 0x95, 0xAA, 0x88, 0xB1, 0x95, 0xA8, 0x8A, 0x4C, 0x59, 0xCE, 0x20, 0x74
+006938 4cd2
+006939 ce66
+00693a 3b20
+00693b a8d1
+00693c 2060
+00693d d274
+00693e 08f0
+00693f 00a0              .db 0xD2, 0x4C, 0x66, 0xCE, 0x20, 0x3B, 0xD1, 0xA8, 0x60, 0x20, 0x74, 0xD2, 0xF0, 0x08, 0xA0, 0x00
+006940 71b1
+006941 4ca8
+006942 ce66
+006943 294c
+006944 20cd
+006945 00bc
+006946 cd20
+006947 20c8              .db 0xB1, 0x71, 0xA8, 0x4C, 0x66, 0xCE, 0x4C, 0x29, 0xCD, 0x20, 0xBC, 0x00, 0x20, 0xCD, 0xC8, 0x20
+006948 cca2
+006949 aea4
+00694a f0d0
+00694b afa6
+00694c c24c
+00694d 2000
+00694e d274
+00694f 03d0              .db 0xA2, 0xCC, 0xA4, 0xAE, 0xD0, 0xF0, 0xA6, 0xAF, 0x4C, 0xC2, 0x00, 0x20, 0x74, 0xD2, 0xD0, 0x03
+006950 504c
+006951 a6d4
+006952 a4c3
+006953 86c4
+006954 84ba
+006955 a6bb
+006956 8671
+006957 18c3              .db 0x4C, 0x50, 0xD4, 0xA6, 0xC3, 0xA4, 0xC4, 0x86, 0xBA, 0x84, 0xBB, 0xA6, 0x71, 0x86, 0xC3, 0x18
+006958 7165
+006959 7385
+00695a 72a5
+00695b c485
+00695c 0069
+00695d 7485
+00695e 00a0
+00695f 73b1              .db 0x65, 0x71, 0x85, 0x73, 0xA5, 0x72, 0x85, 0xC4, 0x69, 0x00, 0x85, 0x74, 0xA0, 0x00, 0xB1, 0x73
+006960 9848
+006961 7391
+006962 c220
+006963 2000
+006964 d7a6
+006965 a068
+006966 9100
+006967 a673              .db 0x48, 0x98, 0x91, 0x73, 0x20, 0xC2, 0x00, 0x20, 0xA6, 0xD7, 0x68, 0xA0, 0x00, 0x91, 0x73, 0xA6
+006968 a4ba
+006969 86bb
+00696a 84c3
+00696b 60c4
+00696c cd20
+00696d 20c8
+00696e d2f1
+00696f fe20              .db 0xBA, 0xA4, 0xBB, 0x86, 0xC3, 0x84, 0xC4, 0x60, 0x20, 0xCD, 0xC8, 0x20, 0xF1, 0xD2, 0x20, 0xFE
+006970 a5c9
+006971 4812
+006972 11a5
+006973 2048
+006974 d28c
+006975 8568
+006976 6811
+006977 1285              .db 0xC9, 0xA5, 0x12, 0x48, 0xA5, 0x11, 0x48, 0x20, 0x8C, 0xD2, 0x68, 0x85, 0x11, 0x68, 0x85, 0x12
+006978 a560
+006979 c9ac
+00697a b098
+00697b 208f
+00697c d750
+00697d aea5
+00697e afa4
+00697f 1184              .db 0x60, 0xA5, 0xAC, 0xC9, 0x98, 0xB0, 0x8F, 0x20, 0x50, 0xD7, 0xA5, 0xAE, 0xA4, 0xAF, 0x84, 0x11
+006980 1285
+006981 2060
+006982 d2f1
+006983 00a2
+006984 11a1
+006985 4ca8
+006986 ce66
+006987 d820              .db 0x85, 0x12, 0x60, 0x20, 0xF1, 0xD2, 0xA2, 0x00, 0xA1, 0x11, 0xA8, 0x4C, 0x66, 0xCE, 0x20, 0xD8
+006988 8ad2
+006989 00a2
+00698a 1181
+00698b 2060
+00698c d2f1
+00698d 00a2
+00698e 11a1
+00698f e6a8              .db 0xD2, 0x8A, 0xA2, 0x00, 0x81, 0x11, 0x60, 0x20, 0xF1, 0xD2, 0xA2, 0x00, 0xA1, 0x11, 0xA8, 0xE6
+006990 d011
+006991 e602
+006992 a112
+006993 4c11
+006994 ce59
+006995 cd20
+006996 20c8
+006997 d2f1              .db 0x11, 0xD0, 0x02, 0xE6, 0x12, 0xA1, 0x11, 0x4C, 0x59, 0xCE, 0x20, 0xCD, 0xC8, 0x20, 0xF1, 0xD2
+006998 9784
+006999 9885
+00699a fe20
+00699b 20c9
+00699c c8cd
+00699d f120
+00699e 98d2
+00699f 00a2              .db 0x84, 0x97, 0x85, 0x98, 0x20, 0xFE, 0xC9, 0x20, 0xCD, 0xC8, 0x20, 0xF1, 0xD2, 0x98, 0xA2, 0x00
+0069a0 9781
+0069a1 97e6
+0069a2 02d0
+0069a3 98e6
+0069a4 12a5
+0069a5 9781
+0069a6 c24c
+0069a7 2000              .db 0x81, 0x97, 0xE6, 0x97, 0xD0, 0x02, 0xE6, 0x98, 0xA5, 0x12, 0x81, 0x97, 0x4C, 0xC2, 0x00, 0x20
+0069a8 cbaa
+0069a9 9785
+0069aa 9884
+0069ab 5fa5
+0069ac 2048
+0069ad c9fe
+0069ae aa20
+0069af 68cb              .db 0xAA, 0xCB, 0x85, 0x97, 0x84, 0x98, 0xA5, 0x5F, 0x48, 0x20, 0xFE, 0xC9, 0x20, 0xAA, 0xCB, 0x68
+0069b0 5f45
+0069b1 1010
+0069b2 03a0
+0069b3 97b1
+0069b4 b1aa
+0069b5 9195
+0069b6 8a97
+0069b7 9591              .db 0x45, 0x5F, 0x10, 0x10, 0xA0, 0x03, 0xB1, 0x97, 0xAA, 0xB1, 0x95, 0x91, 0x97, 0x8A, 0x91, 0x95
+0069b8 1088
+0069b9 60f3
+0069ba dc4c
+0069bb 20c8
+0069bc c8cd
+0069bd f120
+0069be a9d2
+0069bf 48d3              .db 0x88, 0x10, 0xF3, 0x60, 0x4C, 0xDC, 0xC8, 0x20, 0xCD, 0xC8, 0x20, 0xF1, 0xD2, 0xA9, 0xD3, 0x48
+0069c0 85a9
+0069c1 6c48
+0069c2 0011
+0069c3 c24c
+0069c4 2000
+0069c5 d2d8
+0069c6 9786
+0069c7 00a2              .db 0xA9, 0x85, 0x48, 0x6C, 0x11, 0x00, 0x4C, 0xC2, 0x00, 0x20, 0xD8, 0xD2, 0x86, 0x97, 0xA2, 0x00
+0069c8 c220
+0069c9 f000
+0069ca 2003
+0069cb d2de
+0069cc 9886
+0069cd 11b1
+0069ce 9845
+0069cf 9725              .db 0x20, 0xC2, 0x00, 0xF0, 0x03, 0x20, 0xDE, 0xD2, 0x86, 0x98, 0xB1, 0x11, 0x45, 0x98, 0x25, 0x97
+0069d0 f8f0
+0069d1 2060
+0069d2 d58b
+0069d3 b0a5
+0069d4 ff49
+0069d5 b085
+0069d6 b745
+0069d7 b885              .db 0xF0, 0xF8, 0x60, 0x20, 0x8B, 0xD5, 0xA5, 0xB0, 0x49, 0xFF, 0x85, 0xB0, 0x45, 0xB7, 0x85, 0xB8
+0069d8 aca5
+0069d9 c14c
+0069da 20d3
+0069db d4da
+0069dc 4d90
+0069dd e9a9
+0069de dfa0
+0069df 8b20              .db 0xA5, 0xAC, 0x4C, 0xC1, 0xD3, 0x20, 0xDA, 0xD4, 0x90, 0x4D, 0xA9, 0xE9, 0xA0, 0xDF, 0x20, 0x8B
+0069e0 d0d5
+0069e1 a510
+0069e2 85b7
+0069e3 a2b0
+0069e4 b504
+0069e5 95b2
+0069e6 caab
+0069e7 f9d0              .db 0xD5, 0xD0, 0x10, 0xA5, 0xB7, 0x85, 0xB0, 0xA2, 0x04, 0xB5, 0xB2, 0x95, 0xAB, 0xCA, 0xD0, 0xF9
+0069e8 b986
+0069e9 a660
+0069ea 86b9
+0069eb a2a3
+0069ec a5b3
+0069ed a8b3
+0069ee c4f0
+0069ef e538              .db 0x86, 0xB9, 0x60, 0xA6, 0xB9, 0x86, 0xA3, 0xA2, 0xB3, 0xA5, 0xB3, 0xA8, 0xF0, 0xC4, 0x38, 0xE5
+0069f0 f0ac
+0069f1 9024
+0069f2 8412
+0069f3 a4ac
+0069f4 84b7
+0069f5 49b0
+0069f6 69ff
+0069f7 a000              .db 0xAC, 0xF0, 0x24, 0x90, 0x12, 0x84, 0xAC, 0xA4, 0xB7, 0x84, 0xB0, 0x49, 0xFF, 0x69, 0x00, 0xA0
+0069f8 8400
+0069f9 a2a3
+0069fa d0ac
+0069fb a004
+0069fc 8400
+0069fd c9b9
+0069fe 30f9
+0069ff a8b6              .db 0x00, 0x84, 0xA3, 0xA2, 0xAC, 0xD0, 0x04, 0xA0, 0x00, 0x84, 0xB9, 0xC9, 0xF9, 0x30, 0xB6, 0xA8
+006a00 b9a5
+006a01 0156
+006a02 f120
+006a03 24d4
+006a04 10b8
+006a05 a04c
+006a06 e0ac
+006a07 f0b3              .db 0xA5, 0xB9, 0x56, 0x01, 0x20, 0xF1, 0xD4, 0x24, 0xB8, 0x10, 0x4C, 0xA0, 0xAC, 0xE0, 0xB3, 0xF0
+006a08 a002
+006a09 38b3
+006a0a ff49
+006a0b a365
+006a0c b985
+006a0d 03b9
+006a0e f500
+006a0f 8503              .db 0x02, 0xA0, 0xB3, 0x38, 0x49, 0xFF, 0x65, 0xA3, 0x85, 0xB9, 0xB9, 0x03, 0x00, 0xF5, 0x03, 0x85
+006a10 b9af
+006a11 0002
+006a12 02f5
+006a13 ae85
+006a14 01b9
+006a15 f500
+006a16 8501
+006a17 b0ad              .db 0xAF, 0xB9, 0x02, 0x00, 0xF5, 0x02, 0x85, 0xAE, 0xB9, 0x01, 0x00, 0xF5, 0x01, 0x85, 0xAD, 0xB0
+006a18 2003
+006a19 d496
+006a1a 00a0
+006a1b 1898
+006a1c ada6
+006a1d 3ed0
+006a1e aea6
+006a1f ad86              .db 0x03, 0x20, 0x96, 0xD4, 0xA0, 0x00, 0x98, 0x18, 0xA6, 0xAD, 0xD0, 0x3E, 0xA6, 0xAE, 0x86, 0xAD
+006a20 afa6
+006a21 ae86
+006a22 b9a6
+006a23 af86
+006a24 b984
+006a25 0869
+006a26 18c9
+006a27 e8d0              .db 0xA6, 0xAF, 0x86, 0xAE, 0xA6, 0xB9, 0x86, 0xAF, 0x84, 0xB9, 0x69, 0x08, 0xC9, 0x18, 0xD0, 0xE8
+006a28 00a9
+006a29 ac85
+006a2a b085
+006a2b 6560
+006a2c 85a3
+006a2d a5b9
+006a2e 65af
+006a2f 85b6              .db 0xA9, 0x00, 0x85, 0xAC, 0x85, 0xB0, 0x60, 0x65, 0xA3, 0x85, 0xB9, 0xA5, 0xAF, 0x65, 0xB6, 0x85
+006a30 a5af
+006a31 65ae
+006a32 85b5
+006a33 a5ae
+006a34 65ad
+006a35 85b4
+006a36 b0ad
+006a37 601a              .db 0xAF, 0xA5, 0xAE, 0x65, 0xB5, 0x85, 0xAE, 0xA5, 0xAD, 0x65, 0xB4, 0x85, 0xAD, 0xB0, 0x1A, 0x60
+006a38 0169
+006a39 b906
+006a3a af26
+006a3b ae26
+006a3c ad26
+006a3d f410
+006a3e e538
+006a3f b0ac              .db 0x69, 0x01, 0x06, 0xB9, 0x26, 0xAF, 0x26, 0xAE, 0x26, 0xAD, 0x10, 0xF4, 0x38, 0xE5, 0xAC, 0xB0
+006a40 49cf
+006a41 69ff
+006a42 8501
+006a43 90ac
+006a44 e60c
+006a45 f0ac
+006a46 6636
+006a47 66ad              .db 0xCF, 0x49, 0xFF, 0x69, 0x01, 0x85, 0xAC, 0x90, 0x0C, 0xE6, 0xAC, 0xF0, 0x36, 0x66, 0xAD, 0x66
+006a48 66ae
+006a49 66af
+006a4a 60b9
+006a4b b0a5
+006a4c ff49
+006a4d b085
+006a4e ada5
+006a4f ff49              .db 0xAE, 0x66, 0xAF, 0x66, 0xB9, 0x60, 0xA5, 0xB0, 0x49, 0xFF, 0x85, 0xB0, 0xA5, 0xAD, 0x49, 0xFF
+006a50 ad85
+006a51 aea5
+006a52 ff49
+006a53 ae85
+006a54 afa5
+006a55 ff49
+006a56 af85
+006a57 b9a5              .db 0x85, 0xAD, 0xA5, 0xAE, 0x49, 0xFF, 0x85, 0xAE, 0xA5, 0xAF, 0x49, 0xFF, 0x85, 0xAF, 0xA5, 0xB9
+006a58 ff49
+006a59 b985
+006a5a b9e6
+006a5b 0ad0
+006a5c afe6
+006a5d 06d0
+006a5e aee6
+006a5f 02d0              .db 0x49, 0xFF, 0x85, 0xB9, 0xE6, 0xB9, 0xD0, 0x0A, 0xE6, 0xAF, 0xD0, 0x06, 0xE6, 0xAE, 0xD0, 0x02
+006a60 ade6
+006a61 a260
+006a62 4c0a
+006a63 bf3c
+006a64 74a2
+006a65 03b4
+006a66 b984
+006a67 02b4              .db 0xE6, 0xAD, 0x60, 0xA2, 0x0A, 0x4C, 0x3C, 0xBF, 0xA2, 0x74, 0xB4, 0x03, 0x84, 0xB9, 0xB4, 0x02
+006a68 0394
+006a69 01b4
+006a6a 0294
+006a6b b2a4
+006a6c 0194
+006a6d 0869
+006a6e ec30
+006a6f eaf0              .db 0x94, 0x03, 0xB4, 0x01, 0x94, 0x02, 0xA4, 0xB2, 0x94, 0x01, 0x69, 0x08, 0x30, 0xEC, 0xF0, 0xEA
+006a70 08e9
+006a71 a5a8
+006a72 b0b9
+006a73 1612
+006a74 9001
+006a75 f602
+006a76 7601
+006a77 7601              .db 0xE9, 0x08, 0xA8, 0xA5, 0xB9, 0xB0, 0x12, 0x16, 0x01, 0x90, 0x02, 0xF6, 0x01, 0x76, 0x01, 0x76
+006a78 7601
+006a79 7602
+006a7a 6a03
+006a7b d0c8
+006a7c 18ee
+006a7d 2060
+006a7e d6e9
+006a7f 02f0              .db 0x01, 0x76, 0x02, 0x76, 0x03, 0x6A, 0xC8, 0xD0, 0xEE, 0x18, 0x60, 0x20, 0xE9, 0xD6, 0xF0, 0x02
+006a80 0310
+006a81 294c
+006a82 a5cd
+006a83 e9ac
+006a84 487f
+006a85 80a9
+006a86 ac85
+006a87 69a9              .db 0x10, 0x03, 0x4C, 0x29, 0xCD, 0xA5, 0xAC, 0xE9, 0x7F, 0x48, 0xA9, 0x80, 0x85, 0xAC, 0xA9, 0x69
+006a88 dfa0
+006a89 be20
+006a8a a9d3
+006a8b a06d
+006a8c 20df
+006a8d d601
+006a8e e0a9
+006a8f dfa0              .db 0xA0, 0xDF, 0x20, 0xBE, 0xD3, 0xA9, 0x6D, 0xA0, 0xDF, 0x20, 0x01, 0xD6, 0xA9, 0xE0, 0xA0, 0xDF
+006a90 a320
+006a91 a9d3
+006a92 a05c
+006a93 20df
+006a94 da51
+006a95 71a9
+006a96 dfa0
+006a97 be20              .db 0x20, 0xA3, 0xD3, 0xA9, 0x5C, 0xA0, 0xDF, 0x20, 0x51, 0xDA, 0xA9, 0x71, 0xA0, 0xDF, 0x20, 0xBE
+006a98 68d3
+006a99 4520
+006a9a a9d8
+006a9b a075
+006a9c 20df
+006a9d d58b
+006a9e 4cf0
+006a9f b120              .db 0xD3, 0x68, 0x20, 0x45, 0xD8, 0xA9, 0x75, 0xA0, 0xDF, 0x20, 0x8B, 0xD5, 0xF0, 0x4C, 0x20, 0xB1
+006aa0 a9d5
+006aa1 8500
+006aa2 8575
+006aa3 8576
+006aa4 a577
+006aa5 20b9
+006aa6 d560
+006aa7 afa5              .db 0xD5, 0xA9, 0x00, 0x85, 0x75, 0x85, 0x76, 0x85, 0x77, 0xA5, 0xB9, 0x20, 0x60, 0xD5, 0xA5, 0xAF
+006aa8 6020
+006aa9 a5d5
+006aaa 20ae
+006aab d560
+006aac ada5
+006aad 6520
+006aae 4cd5
+006aaf d66e              .db 0x20, 0x60, 0xD5, 0xA5, 0xAE, 0x20, 0x60, 0xD5, 0xA5, 0xAD, 0x20, 0x65, 0xD5, 0x4C, 0x6E, 0xD6
+006ab0 03d0
+006ab1 c84c
+006ab2 4ad4
+006ab3 8009
+006ab4 90a8
+006ab5 1813
+006ab6 77a5
+006ab7 b665              .db 0xD0, 0x03, 0x4C, 0xC8, 0xD4, 0x4A, 0x09, 0x80, 0xA8, 0x90, 0x13, 0x18, 0xA5, 0x77, 0x65, 0xB6
+006ab8 7785
+006ab9 76a5
+006aba b565
+006abb 7685
+006abc 75a5
+006abd b465
+006abe 7585
+006abf 7566              .db 0x85, 0x77, 0xA5, 0x76, 0x65, 0xB5, 0x85, 0x76, 0xA5, 0x75, 0x65, 0xB4, 0x85, 0x75, 0x66, 0x75
+006ac0 7666
+006ac1 7766
+006ac2 b966
+006ac3 4a98
+006ac4 ded0
+006ac5 8560
+006ac6 8471
+006ac7 a072              .db 0x66, 0x76, 0x66, 0x77, 0x66, 0xB9, 0x98, 0x4A, 0xD0, 0xDE, 0x60, 0x85, 0x71, 0x84, 0x72, 0xA0
+006ac8 b103
+006ac9 8571
+006aca 88b6
+006acb 71b1
+006acc b585
+006acd b188
+006ace 8571
+006acf 45b7              .db 0x03, 0xB1, 0x71, 0x85, 0xB6, 0x88, 0xB1, 0x71, 0x85, 0xB5, 0x88, 0xB1, 0x71, 0x85, 0xB7, 0x45
+006ad0 85b0
+006ad1 a5b8
+006ad2 09b7
+006ad3 8580
+006ad4 88b4
+006ad5 71b1
+006ad6 b385
+006ad7 aca5              .db 0xB0, 0x85, 0xB8, 0xA5, 0xB7, 0x09, 0x80, 0x85, 0xB4, 0x88, 0xB1, 0x71, 0x85, 0xB3, 0xA5, 0xAC
+006ad8 a560
+006ad9 f0b3
+006ada 181d
+006adb ac65
+006adc 0490
+006add 3130
+006ade 2c18
+006adf 1210              .db 0x60, 0xA5, 0xB3, 0xF0, 0x1D, 0x18, 0x65, 0xAC, 0x90, 0x04, 0x30, 0x31, 0x18, 0x2C, 0x10, 0x12
+006ae0 8069
+006ae1 ac85
+006ae2 03d0
+006ae3 544c
+006ae4 a5d4
+006ae5 85b8
+006ae6 60b0
+006ae7 b0a5              .db 0x69, 0x80, 0x85, 0xAC, 0xD0, 0x03, 0x4C, 0x54, 0xD4, 0xA5, 0xB8, 0x85, 0xB0, 0x60, 0xA5, 0xB0
+006ae8 1b10
+006ae9 6868
+006aea 504c
+006aeb 20d4
+006aec d6ca
+006aed f0aa
+006aee 18f0
+006aef 0269              .db 0x10, 0x1B, 0x68, 0x68, 0x4C, 0x50, 0xD4, 0x20, 0xCA, 0xD6, 0xAA, 0xF0, 0xF0, 0x18, 0x69, 0x02
+006af0 0bb0
+006af1 00a2
+006af2 b886
+006af3 db20
+006af4 e6d3
+006af5 d0ac
+006af6 4ce0
+006af7 d4c3              .db 0xB0, 0x0B, 0xA2, 0x00, 0x86, 0xB8, 0x20, 0xDB, 0xD3, 0xE6, 0xAC, 0xD0, 0xE0, 0x4C, 0xC3, 0xD4
+006af8 ca20
+006af9 a9d6
+006afa a0f1
+006afb a2df
+006afc 8600
+006afd 20b8
+006afe d67d
+006aff 044c              .db 0x20, 0xCA, 0xD6, 0xA9, 0xF1, 0xA0, 0xDF, 0xA2, 0x00, 0x86, 0xB8, 0x20, 0x7D, 0xD6, 0x4C, 0x04
+006b00 20d6
+006b01 d58b
+006b02 63f0
+006b03 d920
+006b04 a9d6
+006b05 3800
+006b06 ace5
+006b07 ac85              .db 0xD6, 0x20, 0x8B, 0xD5, 0xF0, 0x63, 0x20, 0xD9, 0xD6, 0xA9, 0x00, 0x38, 0xE5, 0xAC, 0x85, 0xAC
+006b08 b120
+006b09 e6d5
+006b0a f0ac
+006b0b a2d6
+006b0c a9ff
+006b0d a401
+006b0e c4b4
+006b0f d0ad              .db 0x20, 0xB1, 0xD5, 0xE6, 0xAC, 0xF0, 0xD6, 0xA2, 0xFF, 0xA9, 0x01, 0xA4, 0xB4, 0xC4, 0xAD, 0xD0
+006b10 a40a
+006b11 c4b5
+006b12 d0ae
+006b13 a404
+006b14 c4b6
+006b15 08af
+006b16 902a
+006b17 a00e              .db 0x0A, 0xA4, 0xB5, 0xC4, 0xAE, 0xD0, 0x04, 0xA4, 0xB6, 0xC4, 0xAF, 0x08, 0x2A, 0x90, 0x0E, 0xA0
+006b18 e801
+006b19 02e0
+006b1a 0430
+006b1b 28d0
+006b1c 40a0
+006b1d 7595
+006b1e 2898
+006b1f 1490              .db 0x01, 0xE8, 0xE0, 0x02, 0x30, 0x04, 0xD0, 0x28, 0xA0, 0x40, 0x95, 0x75, 0x98, 0x28, 0x90, 0x14
+006b20 a5a8
+006b21 e5b6
+006b22 85af
+006b23 a5b6
+006b24 e5b5
+006b25 85ae
+006b26 a5b5
+006b27 e5b4              .db 0xA8, 0xA5, 0xB6, 0xE5, 0xAF, 0x85, 0xB6, 0xA5, 0xB5, 0xE5, 0xAE, 0x85, 0xB5, 0xA5, 0xB4, 0xE5
+006b28 85ad
+006b29 98b4
+006b2a b606
+006b2b b526
+006b2c b426
+006b2d cfb0
+006b2e bd30
+006b2f cb10              .db 0xAD, 0x85, 0xB4, 0x98, 0x06, 0xB6, 0x26, 0xB5, 0x26, 0xB4, 0xB0, 0xCF, 0x30, 0xBD, 0x10, 0xCB
+006b30 6a4a
+006b31 856a
+006b32 28b9
+006b33 6e4c
+006b34 a2d6
+006b35 4c14
+006b36 bf3c
+006b37 75a5              .db 0x4A, 0x6A, 0x6A, 0x85, 0xB9, 0x28, 0x4C, 0x6E, 0xD6, 0xA2, 0x14, 0x4C, 0x3C, 0xBF, 0xA5, 0x75
+006b38 ad85
+006b39 76a5
+006b3a ae85
+006b3b 77a5
+006b3c af85
+006b3d 344c
+006b3e 85d4
+006b3f 8471              .db 0x85, 0xAD, 0xA5, 0x76, 0x85, 0xAE, 0xA5, 0x77, 0x85, 0xAF, 0x4C, 0x34, 0xD4, 0x85, 0x71, 0x84
+006b40 a072
+006b41 b103
+006b42 8571
+006b43 88af
+006b44 71b1
+006b45 ae85
+006b46 b188
+006b47 8571              .db 0x72, 0xA0, 0x03, 0xB1, 0x71, 0x85, 0xAF, 0x88, 0xB1, 0x71, 0x85, 0xAE, 0x88, 0xB1, 0x71, 0x85
+006b48 09b0
+006b49 8580
+006b4a 88ad
+006b4b 71b1
+006b4c ac85
+006b4d b984
+006b4e a260
+006b4f a0a4              .db 0xB0, 0x09, 0x80, 0x85, 0xAD, 0x88, 0xB1, 0x71, 0x85, 0xAC, 0x84, 0xB9, 0x60, 0xA2, 0xA4, 0xA0
+006b50 f000
+006b51 a604
+006b52 a497
+006b53 2098
+006b54 d6d9
+006b55 7186
+006b56 7284
+006b57 03a0              .db 0x00, 0xF0, 0x04, 0xA6, 0x97, 0xA4, 0x98, 0x20, 0xD9, 0xD6, 0x86, 0x71, 0x84, 0x72, 0xA0, 0x03
+006b58 afa5
+006b59 7191
+006b5a a588
+006b5b 91ae
+006b5c 8871
+006b5d b0a5
+006b5e 7f09
+006b5f ad25              .db 0xA5, 0xAF, 0x91, 0x71, 0x88, 0xA5, 0xAE, 0x91, 0x71, 0x88, 0xA5, 0xB0, 0x09, 0x7F, 0x25, 0xAD
+006b60 7191
+006b61 a588
+006b62 91ac
+006b63 8471
+006b64 60b9
+006b65 d920
+006b66 a2d6
+006b67 b505              .db 0x91, 0x71, 0x88, 0xA5, 0xAC, 0x91, 0x71, 0x84, 0xB9, 0x60, 0x20, 0xD9, 0xD6, 0xA2, 0x05, 0xB5
+006b68 95ab
+006b69 cab2
+006b6a f9d0
+006b6b b986
+006b6c a560
+006b6d f0ac
+006b6e 06fb
+006b6f 90b9              .db 0xAB, 0x95, 0xB2, 0xCA, 0xD0, 0xF9, 0x86, 0xB9, 0x60, 0xA5, 0xAC, 0xF0, 0xFB, 0x06, 0xB9, 0x90
+006b70 20f7
+006b71 d4b8
+006b72 f2d0
+006b73 894c
+006b74 a5d4
+006b75 f0ac
+006b76 a509
+006b77 2ab0              .db 0xF7, 0x20, 0xB8, 0xD4, 0xD0, 0xF2, 0x4C, 0x89, 0xD4, 0xA5, 0xAC, 0xF0, 0x09, 0xA5, 0xB0, 0x2A
+006b78 ffa9
+006b79 02b0
+006b7a 01a9
+006b7b 2060
+006b7c d6e9
+006b7d ad85
+006b7e 00a9
+006b7f ae85              .db 0xA9, 0xFF, 0xB0, 0x02, 0xA9, 0x01, 0x60, 0x20, 0xE9, 0xD6, 0x85, 0xAD, 0xA9, 0x00, 0x85, 0xAE
+006b80 88a2
+006b81 ada5
+006b82 ff49
+006b83 a92a
+006b84 8500
+006b85 86af
+006b86 85ac
+006b87 85b9              .db 0xA2, 0x88, 0xA5, 0xAD, 0x49, 0xFF, 0x2A, 0xA9, 0x00, 0x85, 0xAF, 0x86, 0xAC, 0x85, 0xB9, 0x85
+006b88 4cb0
+006b89 d42f
+006b8a b046
+006b8b 8560
+006b8c 8473
+006b8d a074
+006b8e b100
+006b8f c873              .db 0xB0, 0x4C, 0x2F, 0xD4, 0x46, 0xB0, 0x60, 0x85, 0x73, 0x84, 0x74, 0xA0, 0x00, 0xB1, 0x73, 0xC8
+006b90 f0aa
+006b91 b1c6
+006b92 4573
+006b93 30b0
+006b94 e4c4
+006b95 d0ac
+006b96 b11a
+006b97 0973              .db 0xAA, 0xF0, 0xC6, 0xB1, 0x73, 0x45, 0xB0, 0x30, 0xC4, 0xE4, 0xAC, 0xD0, 0x1A, 0xB1, 0x73, 0x09
+006b98 c580
+006b99 d0ad
+006b9a c812
+006b9b 73b1
+006b9c aec5
+006b9d 0bd0
+006b9e a9c8
+006b9f c57f              .db 0x80, 0xC5, 0xAD, 0xD0, 0x12, 0xC8, 0xB1, 0x73, 0xC5, 0xAE, 0xD0, 0x0B, 0xC8, 0xA9, 0x7F, 0xC5
+006ba0 b1b9
+006ba1 e573
+006ba2 f0af
+006ba3 a528
+006ba4 90b0
+006ba5 4902
+006ba6 4cff
+006ba7 d6ef              .db 0xB9, 0xB1, 0x73, 0xE5, 0xAF, 0xF0, 0x28, 0xA5, 0xB0, 0x90, 0x02, 0x49, 0xFF, 0x4C, 0xEF, 0xD6
+006ba8 aca5
+006ba9 4af0
+006baa e938
+006bab 2498
+006bac 10b0
+006bad aa09
+006bae ffa9
+006baf b285              .db 0xA5, 0xAC, 0xF0, 0x4A, 0x38, 0xE9, 0x98, 0x24, 0xB0, 0x10, 0x09, 0xAA, 0xA9, 0xFF, 0x85, 0xB2
+006bb0 9c20
+006bb1 8ad4
+006bb2 aca2
+006bb3 f9c9
+006bb4 0610
+006bb5 da20
+006bb6 84d4
+006bb7 60b2              .db 0x20, 0x9C, 0xD4, 0x8A, 0xA2, 0xAC, 0xC9, 0xF9, 0x10, 0x06, 0x20, 0xDA, 0xD4, 0x84, 0xB2, 0x60
+006bb8 a5a8
+006bb9 29b0
+006bba 4680
+006bbb 05ad
+006bbc 85ad
+006bbd 20ad
+006bbe d4f1
+006bbf b284              .db 0xA8, 0xA5, 0xB0, 0x29, 0x80, 0x46, 0xAD, 0x05, 0xAD, 0x85, 0xAD, 0x20, 0xF1, 0xD4, 0x84, 0xB2
+006bc0 a560
+006bc1 c9ac
+006bc2 b098
+006bc3 201e
+006bc4 d750
+006bc5 b984
+006bc6 b0a5
+006bc7 b084              .db 0x60, 0xA5, 0xAC, 0xC9, 0x98, 0xB0, 0x1E, 0x20, 0x50, 0xD7, 0x84, 0xB9, 0xA5, 0xB0, 0x84, 0xB0
+006bc8 8049
+006bc9 a92a
+006bca 8598
+006bcb a5ac
+006bcc 85af
+006bcd 4c5b
+006bce d42f
+006bcf ad85              .db 0x49, 0x80, 0x2A, 0xA9, 0x98, 0x85, 0xAC, 0xA5, 0xAF, 0x85, 0x5B, 0x4C, 0x2F, 0xD4, 0x85, 0xAD
+006bd0 ae85
+006bd1 af85
+006bd2 60a8
+006bd3 00a0
+006bd4 5f84
+006bd5 09a2
+006bd6 a894
+006bd7 10ca              .db 0x85, 0xAE, 0x85, 0xAF, 0xA8, 0x60, 0xA0, 0x00, 0x84, 0x5F, 0xA2, 0x09, 0x94, 0xA8, 0xCA, 0x10
+006bd8 90fb
+006bd9 c97f
+006bda d02d
+006bdb 8604
+006bdc f0b1
+006bdd c904
+006bde d02b
+006bdf 2005              .db 0xFB, 0x90, 0x7F, 0xC9, 0x2D, 0xD0, 0x04, 0x86, 0xB1, 0xF0, 0x04, 0xC9, 0x2B, 0xD0, 0x05, 0x20
+006be0 00bc
+006be1 6e90
+006be2 24c9
+006be3 03d0
+006be4 6e4c
+006be5 c9dc
+006be6 d025
+006be7 4c08              .db 0xBC, 0x00, 0x90, 0x6E, 0xC9, 0x24, 0xD0, 0x03, 0x4C, 0x6E, 0xDC, 0xC9, 0x25, 0xD0, 0x08, 0x4C
+006be8 dc9c
+006be9 bc20
+006bea 9000
+006beb c95b
+006bec f02e
+006bed c92e
+006bee d045
+006bef 2030              .db 0x9C, 0xDC, 0x20, 0xBC, 0x00, 0x90, 0x5B, 0xC9, 0x2E, 0xF0, 0x2E, 0xC9, 0x45, 0xD0, 0x30, 0x20
+006bf0 00bc
+006bf1 1790
+006bf2 b8c9
+006bf3 0ef0
+006bf4 2dc9
+006bf5 0af0
+006bf6 b7c9
+006bf7 08f0              .db 0xBC, 0x00, 0x90, 0x17, 0xC9, 0xB8, 0xF0, 0x0E, 0xC9, 0x2D, 0xF0, 0x0A, 0xC9, 0xB7, 0xF0, 0x08
+006bf8 2bc9
+006bf9 04f0
+006bfa 07d0
+006bfb ab66
+006bfc bc20
+006bfd 9000
+006bfe 245b
+006bff 10ab              .db 0xC9, 0x2B, 0xF0, 0x04, 0xD0, 0x07, 0x66, 0xAB, 0x20, 0xBC, 0x00, 0x90, 0x5B, 0x24, 0xAB, 0x10
+006c00 a90e
+006c01 3800
+006c02 a9e5
+006c03 114c
+006c04 66d8
+006c05 24aa
+006c06 50aa
+006c07 a5c3              .db 0x0E, 0xA9, 0x00, 0x38, 0xE5, 0xA9, 0x4C, 0x11, 0xD8, 0x66, 0xAA, 0x24, 0xAA, 0x50, 0xC3, 0xA5
+006c08 38a9
+006c09 a8e5
+006c0a a985
+006c0b 12f0
+006c0c 0910
+006c0d f020
+006c0e e6d5
+006c0f d0a9              .db 0xA9, 0x38, 0xE5, 0xA8, 0x85, 0xA9, 0xF0, 0x12, 0x10, 0x09, 0x20, 0xF0, 0xD5, 0xE6, 0xA9, 0xD0
+006c10 f0f9
+006c11 2007
+006c12 d5d7
+006c13 a9c6
+006c14 f9d0
+006c15 b1a5
+006c16 0130
+006c17 4c60              .db 0xF9, 0xF0, 0x07, 0x20, 0xD7, 0xD5, 0xC6, 0xA9, 0xD0, 0xF9, 0xA5, 0xB1, 0x30, 0x01, 0x60, 0x4C
+006c18 d9f4
+006c19 2448
+006c1a 10aa
+006c1b e602
+006c1c 20a8
+006c1d d5d7
+006c1e 2968
+006c1f 200f              .db 0xF4, 0xD9, 0x48, 0x24, 0xAA, 0x10, 0x02, 0xE6, 0xA8, 0x20, 0xD7, 0xD5, 0x68, 0x29, 0x0F, 0x20
+006c20 d845
+006c21 d24c
+006c22 48d7
+006c23 ca20
+006c24 68d6
+006c25 fa20
+006c26 a5d6
+006c27 45b7              .db 0x45, 0xD8, 0x4C, 0xD2, 0xD7, 0x48, 0x20, 0xCA, 0xD6, 0x68, 0x20, 0xFA, 0xD6, 0xA5, 0xB7, 0x45
+006c28 85b0
+006c29 a6b8
+006c2a 4cac
+006c2b d3c1
+006c2c a9a5
+006c2d 0ac9
+006c2e 0990
+006c2f 64a9              .db 0xB0, 0x85, 0xB8, 0xA6, 0xAC, 0x4C, 0xC1, 0xD3, 0xA5, 0xA9, 0xC9, 0x0A, 0x90, 0x09, 0xA9, 0x64
+006c30 ab24
+006c31 0e30
+006c32 c34c
+006c33 0ad4
+006c34 650a
+006c35 0aa9
+006c36 00a0
+006c37 c371              .db 0x24, 0xAB, 0x30, 0x0E, 0x4C, 0xC3, 0xD4, 0x0A, 0x0A, 0x65, 0xA9, 0x0A, 0xA0, 0x00, 0x71, 0xC3
+006c38 2fe9
+006c39 a985
+006c3a f84c
+006c3b a9d7
+006c3c a0f6
+006c3d 20e5
+006c3e c6d3
+006c3f 88a5              .db 0xE9, 0x2F, 0x85, 0xA9, 0x4C, 0xF8, 0xD7, 0xA9, 0xF6, 0xA0, 0xE5, 0x20, 0xD3, 0xC6, 0xA5, 0x88
+006c40 87a6
+006c41 ad85
+006c42 ae86
+006c43 90a2
+006c44 2038
+006c45 d707
+006c46 00a0
+006c47 2098              .db 0xA6, 0x87, 0x85, 0xAD, 0x86, 0xAE, 0xA2, 0x90, 0x38, 0x20, 0x07, 0xD7, 0xA0, 0x00, 0x98, 0x20
+006c48 d8a2
+006c49 d34c
+006c4a a0c6
+006c4b a901
+006c4c 2420
+006c4d 10b0
+006c4e a902
+006c4f 992d              .db 0xA2, 0xD8, 0x4C, 0xD3, 0xC6, 0xA0, 0x01, 0xA9, 0x20, 0x24, 0xB0, 0x10, 0x02, 0xA9, 0x2D, 0x99
+006c50 00ef
+006c51 b085
+006c52 ba84
+006c53 a6c8
+006c54 d0ac
+006c55 a905
+006c56 4c30
+006c57 d9ae              .db 0xEF, 0x00, 0x85, 0xB0, 0x84, 0xBA, 0xC8, 0xA6, 0xAC, 0xD0, 0x05, 0xA9, 0x30, 0x4C, 0xAE, 0xD9
+006c58 00a9
+006c59 81e0
+006c5a 09b0
+006c5b 81a9
+006c5c dfa0
+006c5d 3920
+006c5e a9d5
+006c5f 85fa              .db 0xA9, 0x00, 0xE0, 0x81, 0xB0, 0x09, 0xA9, 0x81, 0xA0, 0xDF, 0x20, 0x39, 0xD5, 0xA9, 0xFA, 0x85
+006c60 a9a8
+006c61 a07d
+006c62 20df
+006c63 d717
+006c64 1ef0
+006c65 1210
+006c66 79a9
+006c67 dfa0              .db 0xA8, 0xA9, 0x7D, 0xA0, 0xDF, 0x20, 0x17, 0xD7, 0xF0, 0x1E, 0x10, 0x12, 0xA9, 0x79, 0xA0, 0xDF
+006c68 1720
+006c69 f0d7
+006c6a 1002
+006c6b 200e
+006c6c d5d7
+006c6d a8c6
+006c6e eed0
+006c6f f020              .db 0x20, 0x17, 0xD7, 0xF0, 0x02, 0x10, 0x0E, 0x20, 0xD7, 0xD5, 0xC6, 0xA8, 0xD0, 0xEE, 0x20, 0xF0
+006c70 e6d5
+006c71 d0a8
+006c72 20dc
+006c73 d3ba
+006c74 5020
+006c75 a2d7
+006c76 a501
+006c77 18a8              .db 0xD5, 0xE6, 0xA8, 0xD0, 0xDC, 0x20, 0xBA, 0xD3, 0x20, 0x50, 0xD7, 0xA2, 0x01, 0xA5, 0xA8, 0x18
+006c78 0769
+006c79 0930
+006c7a 08c9
+006c7b 06b0
+006c7c ff69
+006c7d a9aa
+006c7e 3802
+006c7f 02e9              .db 0x69, 0x07, 0x30, 0x09, 0xC9, 0x08, 0xB0, 0x06, 0x69, 0xFF, 0xAA, 0xA9, 0x02, 0x38, 0xE9, 0x02
+006c80 a985
+006c81 a886
+006c82 f08a
+006c83 1002
+006c84 a413
+006c85 a9ba
+006c86 c82e
+006c87 ef99              .db 0x85, 0xA9, 0x86, 0xA8, 0x8A, 0xF0, 0x02, 0x10, 0x13, 0xA4, 0xBA, 0xA9, 0x2E, 0xC8, 0x99, 0xEF
+006c88 8a00
+006c89 06f0
+006c8a 30a9
+006c8b 99c8
+006c8c 00ef
+006c8d ba84
+006c8e 00a0
+006c8f 80a2              .db 0x00, 0x8A, 0xF0, 0x06, 0xA9, 0x30, 0xC8, 0x99, 0xEF, 0x00, 0x84, 0xBA, 0xA0, 0x00, 0xA2, 0x80
+006c90 afa5
+006c91 7918
+006c92 dff7
+006c93 af85
+006c94 aea5
+006c95 f679
+006c96 85df
+006c97 a5ae              .db 0xA5, 0xAF, 0x18, 0x79, 0xF7, 0xDF, 0x85, 0xAF, 0xA5, 0xAE, 0x79, 0xF6, 0xDF, 0x85, 0xAE, 0xA5
+006c98 79ad
+006c99 dff5
+006c9a ad85
+006c9b b0e8
+006c9c 1004
+006c9d 30e5
+006c9e 3002
+006c9f 8ae1              .db 0xAD, 0x79, 0xF5, 0xDF, 0x85, 0xAD, 0xE8, 0xB0, 0x04, 0x10, 0xE5, 0x30, 0x02, 0x30, 0xE1, 0x8A
+006ca0 0490
+006ca1 ff49
+006ca2 0a69
+006ca3 2f69
+006ca4 c8c8
+006ca5 84c8
+006ca6 a495
+006ca7 c8ba              .db 0x90, 0x04, 0x49, 0xFF, 0x69, 0x0A, 0x69, 0x2F, 0xC8, 0xC8, 0xC8, 0x84, 0x95, 0xA4, 0xBA, 0xC8
+006ca8 29aa
+006ca9 997f
+006caa 00ef
+006cab a8c6
+006cac 06d0
+006cad 2ea9
+006cae 99c8
+006caf 00ef              .db 0xAA, 0x29, 0x7F, 0x99, 0xEF, 0x00, 0xC6, 0xA8, 0xD0, 0x06, 0xA9, 0x2E, 0xC8, 0x99, 0xEF, 0x00
+006cb0 ba84
+006cb1 95a4
+006cb2 498a
+006cb3 29ff
+006cb4 aa80
+006cb5 12c0
+006cb6 b2d0
+006cb7 baa4              .db 0x84, 0xBA, 0xA4, 0x95, 0x8A, 0x49, 0xFF, 0x29, 0x80, 0xAA, 0xC0, 0x12, 0xD0, 0xB2, 0xA4, 0xBA
+006cb8 efb9
+006cb9 8800
+006cba 30c9
+006cbb f8f0
+006cbc 2ec9
+006cbd 01f0
+006cbe a9c8
+006cbf a62b              .db 0xB9, 0xEF, 0x00, 0x88, 0xC9, 0x30, 0xF0, 0xF8, 0xC9, 0x2E, 0xF0, 0x01, 0xC8, 0xA9, 0x2B, 0xA6
+006cc0 f0a9
+006cc1 102e
+006cc2 a908
+006cc3 3800
+006cc4 a9e5
+006cc5 a9aa
+006cc6 992d
+006cc7 00f1              .db 0xA9, 0xF0, 0x2E, 0x10, 0x08, 0xA9, 0x00, 0x38, 0xE5, 0xA9, 0xAA, 0xA9, 0x2D, 0x99, 0xF1, 0x00
+006cc8 45a9
+006cc9 f099
+006cca 8a00
+006ccb 2fa2
+006ccc e838
+006ccd 0ae9
+006cce fbb0
+006ccf 3a69              .db 0xA9, 0x45, 0x99, 0xF0, 0x00, 0x8A, 0xA2, 0x2F, 0x38, 0xE8, 0xE9, 0x0A, 0xB0, 0xFB, 0x69, 0x3A
+006cd0 f399
+006cd1 8a00
+006cd2 f299
+006cd3 a900
+006cd4 9900
+006cd5 00f4
+006cd6 08f0
+006cd7 ef99              .db 0x99, 0xF3, 0x00, 0x8A, 0x99, 0xF2, 0x00, 0xA9, 0x00, 0x99, 0xF4, 0x00, 0xF0, 0x08, 0x99, 0xEF
+006cd8 a900
+006cd9 9900
+006cda 00f0
+006cdb f0a9
+006cdc 00a0
+006cdd f060
+006cde a542
+006cdf d0b3              .db 0x00, 0xA9, 0x00, 0x99, 0xF0, 0x00, 0xA9, 0xF0, 0xA0, 0x00, 0x60, 0xF0, 0x42, 0xA5, 0xB3, 0xD0
+006ce0 4c03
+006ce1 d452
+006ce2 9ca2
+006ce3 00a0
+006ce4 a720
+006ce5 a5d6
+006ce6 10b7
+006ce7 200f              .db 0x03, 0x4C, 0x52, 0xD4, 0xA2, 0x9C, 0xA0, 0x00, 0x20, 0xA7, 0xD6, 0xA5, 0xB7, 0x10, 0x0F, 0x20
+006ce8 d781
+006ce9 9ca9
+006cea 00a0
+006ceb 1720
+006cec d0d7
+006ced 9803
+006cee 5ba4
+006cef c520              .db 0x81, 0xD7, 0xA9, 0x9C, 0xA0, 0x00, 0x20, 0x17, 0xD7, 0xD0, 0x03, 0x98, 0xA4, 0x5B, 0x20, 0xC5
+006cf0 98d3
+006cf1 2048
+006cf2 d4fb
+006cf3 9ca9
+006cf4 00a0
+006cf5 3920
+006cf6 20d5
+006cf7 d9ff              .db 0xD3, 0x98, 0x48, 0x20, 0xFB, 0xD4, 0xA9, 0x9C, 0xA0, 0x00, 0x20, 0x39, 0xD5, 0x20, 0xFF, 0xD9
+006cf8 4a68
+006cf9 0a90
+006cfa aca5
+006cfb 06f0
+006cfc b0a5
+006cfd ff49
+006cfe b085
+006cff a960              .db 0x68, 0x4A, 0x90, 0x0A, 0xA5, 0xAC, 0xF0, 0x06, 0xA5, 0xB0, 0x49, 0xFF, 0x85, 0xB0, 0x60, 0xA9
+006d00 a085
+006d01 20df
+006d02 d539
+006d03 b9a5
+006d04 5069
+006d05 0390
+006d06 e120
+006d07 85d6              .db 0x85, 0xA0, 0xDF, 0x20, 0x39, 0xD5, 0xA5, 0xB9, 0x69, 0x50, 0x90, 0x03, 0x20, 0xE1, 0xD6, 0x85
+006d08 20a3
+006d09 d6cd
+006d0a aca5
+006d0b 88c9
+006d0c 0390
+006d0d ce20
+006d0e 20d5
+006d0f d781              .db 0xA3, 0x20, 0xCD, 0xD6, 0xA5, 0xAC, 0xC9, 0x88, 0x90, 0x03, 0x20, 0xCE, 0xD5, 0x20, 0x81, 0xD7
+006d10 5ba5
+006d11 6918
+006d12 f081
+006d13 38f3
+006d14 01e9
+006d15 a248
+006d16 b504
+006d17 b4b3              .db 0xA5, 0x5B, 0x18, 0x69, 0x81, 0xF0, 0xF3, 0x38, 0xE9, 0x01, 0x48, 0xA2, 0x04, 0xB5, 0xB3, 0xB4
+006d18 95ac
+006d19 94ac
+006d1a cab3
+006d1b f510
+006d1c a3a5
+006d1d b985
+006d1e a620
+006d1f 20d3              .db 0xAC, 0x95, 0xAC, 0x94, 0xB3, 0xCA, 0x10, 0xF5, 0xA5, 0xA3, 0x85, 0xB9, 0x20, 0xA6, 0xD3, 0x20
+006d20 d9f4
+006d21 89a9
+006d22 dfa0
+006d23 6720
+006d24 a9da
+006d25 8500
+006d26 68b8
+006d27 b34c              .db 0xF4, 0xD9, 0xA9, 0x89, 0xA0, 0xDF, 0x20, 0x67, 0xDA, 0xA9, 0x00, 0x85, 0xB8, 0x68, 0x4C, 0xB3
+006d28 85d5
+006d29 84ba
+006d2a 20bb
+006d2b d69d
+006d2c a4a9
+006d2d 3920
+006d2e 20d5
+006d2f da6b              .db 0xD5, 0x85, 0xBA, 0x84, 0xBB, 0x20, 0x9D, 0xD6, 0xA9, 0xA4, 0x20, 0x39, 0xD5, 0x20, 0x6B, 0xDA
+006d30 a4a9
+006d31 00a0
+006d32 394c
+006d33 85d5
+006d34 84ba
+006d35 a2bb
+006d36 20a8
+006d37 d69f              .db 0xA9, 0xA4, 0xA0, 0x00, 0x4C, 0x39, 0xD5, 0x85, 0xBA, 0x84, 0xBB, 0xA2, 0xA8, 0x20, 0x9F, 0xD6
+006d38 bab1
+006d39 b185
+006d3a baa4
+006d3b 98c8
+006d3c 02d0
+006d3d bbe6
+006d3e ba85
+006d3f bba4              .db 0xB1, 0xBA, 0x85, 0xB1, 0xA4, 0xBA, 0xC8, 0x98, 0xD0, 0x02, 0xE6, 0xBB, 0x85, 0xBA, 0xA4, 0xBB
+006d40 3920
+006d41 a5d5
+006d42 a4ba
+006d43 18bb
+006d44 0469
+006d45 0190
+006d46 85c8
+006d47 84ba              .db 0x20, 0x39, 0xD5, 0xA5, 0xBA, 0xA4, 0xBB, 0x18, 0x69, 0x04, 0x90, 0x01, 0xC8, 0x85, 0xBA, 0x84
+006d48 20bb
+006d49 d3be
+006d4a a8a9
+006d4b 00a0
+006d4c b1c6
+006d4d e4d0
+006d4e a560
+006d4f f0ac              .db 0xBB, 0x20, 0xBE, 0xD3, 0xA9, 0xA8, 0xA0, 0x00, 0xC6, 0xB1, 0xD0, 0xE4, 0x60, 0xA5, 0xAC, 0xF0
+006d50 a207
+006d51 a0d8
+006d52 2000
+006d53 d6a7
+006d54 afa2
+006d55 13a0
+006d56 d906
+006d57 da26              .db 0x07, 0xA2, 0xD8, 0xA0, 0x00, 0x20, 0xA7, 0xD6, 0xA2, 0xAF, 0xA0, 0x13, 0x06, 0xD9, 0x26, 0xDA
+006d58 db26
+006d59 d826
+006d5a 0590
+006d5b 458a
+006d5c 85d9
+006d5d 88d9
+006d5e eed0
+006d5f 02a2              .db 0x26, 0xDB, 0x26, 0xD8, 0x90, 0x05, 0x8A, 0x45, 0xD9, 0x85, 0xD9, 0x88, 0xD0, 0xEE, 0xA2, 0x02
+006d60 d9b5
+006d61 ad95
+006d62 10ca
+006d63 a9f9
+006d64 8580
+006d65 0aac
+006d66 b085
+006d67 344c              .db 0xB5, 0xD9, 0x95, 0xAD, 0xCA, 0x10, 0xF9, 0xA9, 0x80, 0x85, 0xAC, 0x0A, 0x85, 0xB0, 0x4C, 0x34
+006d68 a9d4
+006d69 a0a6
+006d6a 20df
+006d6b d3be
+006d6c ca20
+006d6d a9d6
+006d6e a0bb
+006d6f a6df              .db 0xD4, 0xA9, 0xA6, 0xA0, 0xDF, 0x20, 0xBE, 0xD3, 0x20, 0xCA, 0xD6, 0xA9, 0xBB, 0xA0, 0xDF, 0xA6
+006d70 20b7
+006d71 d5f9
+006d72 ca20
+006d73 20d6
+006d74 d781
+006d75 00a9
+006d76 b885
+006d77 a620              .db 0xB7, 0x20, 0xF9, 0xD5, 0x20, 0xCA, 0xD6, 0x20, 0x81, 0xD7, 0xA9, 0x00, 0x85, 0xB8, 0x20, 0xA6
+006d78 a9d3
+006d79 a0ed
+006d7a 20df
+006d7b d3a3
+006d7c b0a5
+006d7d 1048
+006d7e 200d
+006d7f d3ba              .db 0xD3, 0xA9, 0xED, 0xA0, 0xDF, 0x20, 0xA3, 0xD3, 0xA5, 0xB0, 0x48, 0x10, 0x0D, 0x20, 0xBA, 0xD3
+006d80 b0a5
+006d81 0930
+006d82 63a5
+006d83 ff49
+006d84 6385
+006d85 f420
+006d86 a9d9
+006d87 a0ed              .db 0xA5, 0xB0, 0x30, 0x09, 0xA5, 0x63, 0x49, 0xFF, 0x85, 0x63, 0x20, 0xF4, 0xD9, 0xA9, 0xED, 0xA0
+006d88 20df
+006d89 d3be
+006d8a 1068
+006d8b 2003
+006d8c d9f4
+006d8d aaa9
+006d8e dfa0
+006d8f 514c              .db 0xDF, 0x20, 0xBE, 0xD3, 0x68, 0x10, 0x03, 0x20, 0xF4, 0xD9, 0xA9, 0xAA, 0xA0, 0xDF, 0x4C, 0x51
+006d90 20da
+006d91 d69d
+006d92 00a9
+006d93 6385
+006d94 d820
+006d95 a2da
+006d96 a09c
+006d97 2000              .db 0xDA, 0x20, 0x9D, 0xD6, 0xA9, 0x00, 0x85, 0x63, 0x20, 0xD8, 0xDA, 0xA2, 0x9C, 0xA0, 0x00, 0x20
+006d98 d6a7
+006d99 a4a9
+006d9a 00a0
+006d9b 7d20
+006d9c a9d6
+006d9d 8500
+006d9e a5b0
+006d9f 2063              .db 0xA7, 0xD6, 0xA9, 0xA4, 0xA0, 0x00, 0x20, 0x7D, 0xD6, 0xA9, 0x00, 0x85, 0xB0, 0xA5, 0x63, 0x20
+006da0 db49
+006da1 9ca9
+006da2 00a0
+006da3 014c
+006da4 48d6
+006da5 0a4c
+006da6 20db
+006da7 000a              .db 0x49, 0xDB, 0xA9, 0x9C, 0xA0, 0x00, 0x4C, 0x01, 0xD6, 0x48, 0x4C, 0x0A, 0xDB, 0x20, 0x0A, 0x00
+006da8 ef4c
+006da9 a5c9
+006daa 48b0
+006dab 0310
+006dac f420
+006dad a5d9
+006dae 48ac
+006daf 81c9              .db 0x4C, 0xEF, 0xC9, 0xA5, 0xB0, 0x48, 0x10, 0x03, 0x20, 0xF4, 0xD9, 0xA5, 0xAC, 0x48, 0xC9, 0x81
+006db0 0790
+006db1 e0a9
+006db2 dfa0
+006db3 0120
+006db4 a9d6
+006db5 a0bf
+006db6 20df
+006db7 da51              .db 0x90, 0x07, 0xA9, 0xE0, 0xA0, 0xDF, 0x20, 0x01, 0xD6, 0xA9, 0xBF, 0xA0, 0xDF, 0x20, 0x51, 0xDA
+006db8 c968
+006db9 9081
+006dba a907
+006dbb a0a6
+006dbc 20df
+006dbd d3a3
+006dbe 1068
+006dbf 4c16              .db 0x68, 0xC9, 0x81, 0x90, 0x07, 0xA9, 0xA6, 0xA0, 0xDF, 0x20, 0xA3, 0xD3, 0x68, 0x10, 0x16, 0x4C
+006dc0 d9f4
+006dc1 d820
+006dc2 e0d2
+006dc3 b008
+006dc4 a920
+006dc5 3800
+006dc6 ca2a
+006dc7 fc10              .db 0xF4, 0xD9, 0x20, 0xD8, 0xD2, 0xE0, 0x08, 0xB0, 0x20, 0xA9, 0x00, 0x38, 0x2A, 0xCA, 0x10, 0xFC
+006dc8 01e8
+006dc9 8111
+006dca 6011
+006dcb d820
+006dcc e0d2
+006dcd b008
+006dce a90c
+006dcf 2aff              .db 0xE8, 0x01, 0x11, 0x81, 0x11, 0x60, 0x20, 0xD8, 0xD2, 0xE0, 0x08, 0xB0, 0x0C, 0xA9, 0xFF, 0x2A
+006dd0 10ca
+006dd1 e8fc
+006dd2 1121
+006dd3 1181
+006dd4 4c60
+006dd5 cd29
+006dd6 bc20
+006dd7 2000              .db 0xCA, 0x10, 0xFC, 0xE8, 0x21, 0x11, 0x81, 0x11, 0x60, 0x4C, 0x29, 0xCD, 0x20, 0xBC, 0x00, 0x20
+006dd8 d2d8
+006dd9 08e0
+006dda f3b0
+006ddb c220
+006ddc c900
+006ddd f029
+006dde 4c03
+006ddf ca02              .db 0xD8, 0xD2, 0xE0, 0x08, 0xB0, 0xF3, 0x20, 0xC2, 0x00, 0xC9, 0x29, 0xF0, 0x03, 0x4C, 0x02, 0xCA
+006de0 bc20
+006de1 a900
+006de2 3800
+006de3 ca2a
+006de4 fc10
+006de5 21e8
+006de6 f011
+006de7 a902              .db 0x20, 0xBC, 0x00, 0xA9, 0x00, 0x38, 0x2A, 0xCA, 0x10, 0xFC, 0xE8, 0x21, 0x11, 0xF0, 0x02, 0xA9
+006de8 4cff
+006de9 d6fa
+006dea 19e0
+006deb 48b0
+006dec 7886
+006ded 18a9
+006dee 3a20
+006def a0cf              .db 0xFF, 0x4C, 0xFA, 0xD6, 0xE0, 0x19, 0xB0, 0x48, 0x86, 0x78, 0xA9, 0x18, 0x20, 0x3A, 0xCF, 0xA0
+006df0 a217
+006df1 4618
+006df2 6611
+006df3 6612
+006df4 8a13
+006df5 912a
+006df6 88ad
+006df7 f310              .db 0x17, 0xA2, 0x18, 0x46, 0x11, 0x66, 0x12, 0x66, 0x13, 0x8A, 0x2A, 0x91, 0xAD, 0x88, 0x10, 0xF3
+006df8 78a5
+006df9 0af0
+006dfa 38aa
+006dfb ff49
+006dfc 1869
+006dfd 1cf0
+006dfe 0fd0
+006dff b1a8              .db 0xA5, 0x78, 0xF0, 0x0A, 0xAA, 0x38, 0x49, 0xFF, 0x69, 0x18, 0xF0, 0x1C, 0xD0, 0x0F, 0xA8, 0xB1
+006e00 c9ad
+006e01 d030
+006e02 ca07
+006e03 03f0
+006e04 10c8
+006e05 e8f4
+006e06 1898
+006e07 ad65              .db 0xAD, 0xC9, 0x30, 0xD0, 0x07, 0xCA, 0xF0, 0x03, 0xC8, 0x10, 0xF4, 0xE8, 0x98, 0x18, 0x65, 0xAD
+006e08 ad85
+006e09 00a9
+006e0a ae65
+006e0b ae85
+006e0c ac86
+006e0d bc20
+006e0e 4c00
+006e0f cf85              .db 0x85, 0xAD, 0xA9, 0x00, 0x65, 0xAE, 0x85, 0xAE, 0x86, 0xAC, 0x20, 0xBC, 0x00, 0x4C, 0x85, 0xCF
+006e10 294c
+006e11 e0cd
+006e12 b007
+006e13 86f9
+006e14 a978
+006e15 2006
+006e16 cf3a
+006e17 05a0              .db 0x4C, 0x29, 0xCD, 0xE0, 0x07, 0xB0, 0xF9, 0x86, 0x78, 0xA9, 0x06, 0x20, 0x3A, 0xCF, 0xA0, 0x05
+006e18 a5f8
+006e19 2013
+006e1a dc51
+006e1b 12a5
+006e1c 5120
+006e1d a5dc
+006e1e 2011
+006e1f dc51              .db 0xF8, 0xA5, 0x13, 0x20, 0x51, 0xDC, 0xA5, 0x12, 0x20, 0x51, 0xDC, 0xA5, 0x11, 0x20, 0x51, 0xDC
+006e20 a2d8
+006e21 a506
+006e22 f078
+006e23 aab7
+006e24 4938
+006e25 69ff
+006e26 f006
+006e27 d0c9              .db 0xD8, 0xA2, 0x06, 0xA5, 0x78, 0xF0, 0xB7, 0xAA, 0x38, 0x49, 0xFF, 0x69, 0x06, 0xF0, 0xC9, 0xD0
+006e28 aabc
+006e29 0f29
+006e2a 5c20
+006e2b 8adc
+006e2c 4a4a
+006e2d 4a4a
+006e2e 0ac9
+006e2f 3069              .db 0xBC, 0xAA, 0x29, 0x0F, 0x20, 0x5C, 0xDC, 0x8A, 0x4A, 0x4A, 0x4A, 0x4A, 0xC9, 0x0A, 0x69, 0x30
+006e30 ad91
+006e31 6088
+006e32 ac85
+006e33 00a9
+006e34 b885
+006e35 208a
+006e36 d845
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+006fa8 4142
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+006fc0 94f7
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+006fd0 1572
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+006fd8 2699
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+006fe0 3a78
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+006fe8 597d
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+006ff0 0081
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+006ff8 8400
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+006fff 0000              .db 0x00, 0x84, 0x20, 0x00, 0x00, 0xFE, 0x79, 0x60, 0x00, 0x27, 0x10, 0xFF, 0xFC, 0x18, 0x00, 0x00
+007000 ff64
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+007007 46c4              .db 0x64, 0xFF, 0xFF, 0xF6, 0x00, 0x00, 0x01, 0x1A, 0xC3, 0x57, 0xC2, 0x64, 0xC8, 0x8B, 0xC4, 0x46
+007008 5ec7
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+00700d a9c3
+00700e b9c3
+00700f 41c4              .db 0xC7, 0x5E, 0xCB, 0x66, 0xC7, 0xB3, 0xC5, 0x85, 0xC5, 0xEA, 0xC3, 0xA9, 0xC3, 0xB9, 0xC4, 0x41
+007010 cdc3
+007011 64c3
+007012 70dd
+007013 76dd
+007014 1dc4
+007015 18c5
+007016 26c3
+007017 7fc5              .db 0xC3, 0xCD, 0xC3, 0x64, 0xDD, 0x70, 0xDD, 0x76, 0xC4, 0x1D, 0xC5, 0x18, 0xC3, 0x26, 0xC5, 0x7F
+007018 88c3
+007019 88c5
+00701a efd3
+00701b f2de
+00701c 73de
+00701d 0dce
+00701e 29d3
+00701f 76d3              .db 0xC3, 0x88, 0xC5, 0x88, 0xD3, 0xEF, 0xDE, 0xF2, 0xDE, 0x73, 0xCE, 0x0D, 0xD3, 0x29, 0xD3, 0x76
+007020 b3d3
+007021 1cc3
+007022 54c4
+007023 85c6
+007024 a2c3
+007025 9fc1
+007026 4dc1
+007027 e5c1              .db 0xD3, 0xB3, 0xC3, 0x1C, 0xC4, 0x54, 0xC6, 0x85, 0xC3, 0xA2, 0xC1, 0x9F, 0xC1, 0x4D, 0xC1, 0xE5
+007028 23dd
+007029 4ec6
+00702a 81d3
+00702b 95db
+00702c 13db
+00702d 16dd
+00702e 3ddd
+00702f 64e8              .db 0xDD, 0x23, 0xC6, 0x4E, 0xD3, 0x81, 0xDB, 0x95, 0xDB, 0x13, 0xDD, 0x16, 0xDD, 0x3D, 0xE8, 0x64
+007030 64ca
+007031 64ca
+007032 e8ca
+007033 ebc8
+007034 ebc9
+007035 64c9
+007036 64ca
+007037 64ca              .db 0xCA, 0x64, 0xCA, 0x64, 0xCA, 0xE8, 0xC8, 0xEB, 0xC9, 0xEB, 0xC9, 0x64, 0xCA, 0x64, 0xCA, 0x64
+007038 64ca
+007039 64ca
+00703a 64ca
+00703b 64ca
+00703c 64ca
+00703d 64ca
+00703e 64ca
+00703f 00ca              .db 0xCA, 0x64, 0xCA, 0x64, 0xCA, 0x64, 0xCA, 0x64, 0xCA, 0x64, 0xCA, 0x64, 0xCA, 0x64, 0xCA, 0x00
+007040 5e00
+007041 64ca
+007042 5eca
+007043 5eca
+007044 5eca
+007045 5eca
+007046 64ca
+007047 8bca              .db 0x00, 0x5E, 0xCA, 0x64, 0xCA, 0x5E, 0xCA, 0x5E, 0xCA, 0x5E, 0xCA, 0x5E, 0xCA, 0x64, 0xCA, 0x8B
+007048 8bca
+007049 00ca
+00704a 7c00
+00704b 7cdd
+00704c 6add
+00704d 6aca
+00704e 00ca
+00704f 6f00              .db 0xCA, 0x8B, 0xCA, 0x00, 0x00, 0x7C, 0xDD, 0x7C, 0xDD, 0x6A, 0xCA, 0x6A, 0xCA, 0x00, 0x00, 0x6F
+007050 6fca
+007051 6fca
+007052 f6ca
+007053 80d6
+007054 13d7
+007055 4cd7
+007056 44db
+007057 63ce              .db 0xCA, 0x6F, 0xCA, 0x6F, 0xCA, 0xF6, 0xD6, 0x80, 0xD7, 0x13, 0xD7, 0x4C, 0xDB, 0x44, 0xCE, 0x63
+007058 3bce
+007059 9cde
+00705a fada
+00705b fed4
+00705c d0d9
+00705d d7da
+00705e 20da
+00705f 52db              .db 0xCE, 0x3B, 0xDE, 0x9C, 0xDA, 0xFA, 0xD4, 0xFE, 0xD9, 0xD0, 0xDA, 0xD7, 0xDA, 0x20, 0xDB, 0x52
+007060 02db
+007061 16d3
+007062 54d3
+007063 6dd2
+007064 25d2
+007065 9acf
+007066 78d2
+007067 32d2              .db 0xDB, 0x02, 0xD3, 0x16, 0xD3, 0x54, 0xD2, 0x6D, 0xD2, 0x25, 0xCF, 0x9A, 0xD2, 0x78, 0xD2, 0x32
+007068 11d2
+007069 83d2
+00706a 22d1
+00706b d3dc
+00706c abdb
+00706d 82db
+00706e 92dd
+00706f d8dd              .db 0xD2, 0x11, 0xD2, 0x83, 0xD1, 0x22, 0xDC, 0xD3, 0xDB, 0xAB, 0xDB, 0x82, 0xDD, 0x92, 0xDD, 0xD8
+007070 e2de
+007071 c8de
+007072 95de
+007073 9ed1
+007074 cdd1
+007075 79d1
+007076 d3c0
+007077 a579              .db 0xDE, 0xE2, 0xDE, 0xC8, 0xDE, 0x95, 0xD1, 0x9E, 0xD1, 0xCD, 0xD1, 0x79, 0xC0, 0xD3, 0x79, 0xA5
+007078 7bd3
+007079 d53b
+00707a 037b
+00707b 7fd6
+00707c d9ba
+00707d d450
+00707e 46ca
+00707f caba              .db 0xD3, 0x7B, 0x3B, 0xD5, 0x7B, 0x03, 0xD6, 0x7F, 0xBA, 0xD9, 0x50, 0xD4, 0xCA, 0x46, 0xBA, 0xCA
+007080 c746
+007081 56ca
+007082 cb80
+007083 6856
+007084 7dcb
+007085 d9f3
+007086 165a
+007087 64ca              .db 0x46, 0xC7, 0xCA, 0x56, 0x80, 0xCB, 0x56, 0x68, 0xCB, 0x7D, 0xF3, 0xD9, 0x5A, 0x16, 0xCA, 0x64
+007088 caf5
+007089 2b2a
+00708a 2f2d
+00708b 3d3c
+00708c 3f3e
+00708d 4241
+00708e 4443
+00708f 4645              .db 0xF5, 0xCA, 0x2A, 0x2B, 0x2D, 0x2F, 0x3C, 0x3D, 0x3E, 0x3F, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46
+007090 4847
+007091 4c49
+007092 4e4d
+007093 504f
+007094 5352
+007095 5554
+007096 5756
+007097 005e              .db 0x47, 0x48, 0x49, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x5E, 0x00
+007098 e16a
+007099 e16c
+00709a e16e
+00709b e170
+00709c e172
+00709d e176
+00709e e178
+00709f e17c              .db 0x6A, 0xE1, 0x6C, 0xE1, 0x6E, 0xE1, 0x70, 0xE1, 0x72, 0xE1, 0x76, 0xE1, 0x78, 0xE1, 0x7C, 0xE1
+0070a0 e17e
+0070a1 e18e
+0070a2 e1a7
+0070a3 e1be
+0070a4 e1d7
+0070a5 e1e6
+0070a6 e1f0
+0070a7 e1fd              .db 0x7E, 0xE1, 0x8E, 0xE1, 0xA7, 0xE1, 0xBE, 0xE1, 0xD7, 0xE1, 0xE6, 0xE1, 0xF0, 0xE1, 0xFD, 0xE1
+0070a8 e203
+0070a9 e215
+0070aa e23a
+0070ab e248
+0070ac e25a
+0070ad e262
+0070ae e277
+0070af e2a6              .db 0x03, 0xE2, 0x15, 0xE2, 0x3A, 0xE2, 0x48, 0xE2, 0x5A, 0xE2, 0x62, 0xE2, 0x77, 0xE2, 0xA6, 0xE2
+0070b0 e2d4
+0070b1 e2e8
+0070b2 e2f9
+0070b3 e305
+0070b4 e314
+0070b5 00b9
+0070b6 00b7
+0070b7 00b8              .db 0xD4, 0xE2, 0xE8, 0xE2, 0xF9, 0xE2, 0x05, 0xE3, 0x14, 0xE3, 0xB9, 0x00, 0xB7, 0x00, 0xB8, 0x00
+0070b8 00ba
+0070b9 c03c
+0070ba 00c3
+0070bb 00c2
+0070bc bf3e
+0070bd 00c1
+0070be 009f
+0070bf 5342              .db 0xBA, 0x00, 0x3C, 0xC0, 0xC3, 0x00, 0xC2, 0x00, 0x3E, 0xBF, 0xC1, 0x00, 0x9F, 0x00, 0x42, 0x53
+0070c0 c628
+0070c1 444e
+0070c2 53bc
+0070c3 2843
+0070c4 54d8
+0070c5 284e
+0070c6 00d1
+0070c7 4e49              .db 0x28, 0xC6, 0x4E, 0x44, 0xBC, 0x53, 0x43, 0x28, 0xD8, 0x54, 0x4E, 0x28, 0xD1, 0x00, 0x49, 0x4E
+0070c8 2824
+0070c9 49dd
+0070ca 4354
+0070cb 524c
+0070cc 49a8
+0070cd 5354
+0070ce 5445
+0070cf 49a7              .db 0x24, 0x28, 0xDD, 0x49, 0x54, 0x43, 0x4C, 0x52, 0xA8, 0x49, 0x54, 0x53, 0x45, 0x54, 0xA7, 0x49
+0070d0 5454
+0070d1 5453
+0070d2 de28
+0070d3 4100
+0070d4 4c4c
+0070d5 489c
+0070d6 2452
+0070d7 db28              .db 0x54, 0x54, 0x53, 0x54, 0x28, 0xDE, 0x00, 0x41, 0x4C, 0x4C, 0x9C, 0x48, 0x52, 0x24, 0x28, 0xDB
+0070d8 454c
+0070d9 5241
+0070da 4fa2
+0070db 544e
+0070dc 4fa0
+0070dd 2853
+0070de 00ce
+0070df 5441              .db 0x4C, 0x45, 0x41, 0x52, 0xA2, 0x4F, 0x4E, 0x54, 0xA0, 0x4F, 0x53, 0x28, 0xCE, 0x00, 0x41, 0x54
+0070e0 8341
+0070e1 4345
+0070e2 4588
+0070e3 4b45
+0070e4 d328
+0070e5 4645
+0070e6 4999
+0070e7 854d              .db 0x41, 0x83, 0x45, 0x43, 0x88, 0x45, 0x45, 0x4B, 0x28, 0xD3, 0x45, 0x46, 0x99, 0x49, 0x4D, 0x85
+0070e8 4b4f
+0070e9 9b45
+0070ea 9d4f
+0070eb 4c00
+0070ec 4553
+0070ed 4ead
+0070ee 8044
+0070ef 524f              .db 0x4F, 0x4B, 0x45, 0x9B, 0x4F, 0x9D, 0x00, 0x4C, 0x53, 0x45, 0xAD, 0x4E, 0x44, 0x80, 0x4F, 0x52
+0070f0 58bd
+0070f1 2850
+0070f2 00cd
+0070f3 af4e
+0070f4 524f
+0070f5 5281
+0070f6 2845
+0070f7 00c8              .db 0xBD, 0x58, 0x50, 0x28, 0xCD, 0x00, 0x4E, 0xAF, 0x4F, 0x52, 0x81, 0x52, 0x45, 0x28, 0xC8, 0x00
+0070f8 5445
+0070f9 4fa5
+0070fa 5553
+0070fb 8d42
+0070fc 544f
+0070fd 894f
+0070fe 4500
+0070ff 2458              .db 0x45, 0x54, 0xA5, 0x4F, 0x53, 0x55, 0x42, 0x8D, 0x4F, 0x54, 0x4F, 0x89, 0x00, 0x45, 0x58, 0x24
+007100 dc28
+007101 4600
+007102 4e8b
+007103 9543
+007104 504e
+007105 5455
+007106 4e84
+007107 2854              .db 0x28, 0xDC, 0x00, 0x46, 0x8B, 0x4E, 0x43, 0x95, 0x4E, 0x50, 0x55, 0x54, 0x84, 0x4E, 0x54, 0x28
+007108 52c5
+007109 a951
+00710a 4300
+00710b 5341
+00710c 2445
+00710d da28
+00710e 4645
+00710f 2454              .db 0xC5, 0x52, 0x51, 0xA9, 0x00, 0x43, 0x41, 0x53, 0x45, 0x24, 0x28, 0xDA, 0x45, 0x46, 0x54, 0x24
+007110 e428
+007111 4e45
+007112 d528
+007113 5445
+007114 4987
+007115 5453
+007116 4fa1
+007117 4441              .db 0x28, 0xE4, 0x45, 0x4E, 0x28, 0xD5, 0x45, 0x54, 0x87, 0x49, 0x53, 0x54, 0xA1, 0x4F, 0x41, 0x44
+007118 4f97
+007119 2847
+00711a 4fcc
+00711b 504f
+00711c 009e
+00711d 5841
+00711e df28
+00711f 4449              .db 0x97, 0x4F, 0x47, 0x28, 0xCC, 0x4F, 0x4F, 0x50, 0x9E, 0x00, 0x41, 0x58, 0x28, 0xDF, 0x49, 0x44
+007120 2824
+007121 49e6
+007122 284e
+007123 00e0
+007124 5745
+007125 45a3
+007126 5458
+007127 4d82              .db 0x24, 0x28, 0xE6, 0x49, 0x4E, 0x28, 0xE0, 0x00, 0x45, 0x57, 0xA3, 0x45, 0x58, 0x54, 0x82, 0x4D
+007128 aa49
+007129 544f
+00712a 55b2
+00712b 4c4c
+00712c 0094
+00712d 4646
+00712e 4eb6
+00712f 5293              .db 0x49, 0xAA, 0x4F, 0x54, 0xB2, 0x55, 0x4C, 0x4C, 0x94, 0x00, 0x46, 0x46, 0xB6, 0x4E, 0x93, 0x52
+007130 00be
+007131 4545
+007132 284b
+007133 49d2
+007134 4fe1
+007135 454b
+007136 4f9a
+007137 2853              .db 0xBE, 0x00, 0x45, 0x45, 0x4B, 0x28, 0xD2, 0x49, 0xE1, 0x4F, 0x4B, 0x45, 0x9A, 0x4F, 0x53, 0x28
+007138 52c9
+007139 4e49
+00713a 9f54
+00713b 4500
+00713c 4441
+00713d 4586
+00713e 914d
+00713f 5345              .db 0xC9, 0x52, 0x49, 0x4E, 0x54, 0x9F, 0x00, 0x45, 0x41, 0x44, 0x86, 0x45, 0x4D, 0x91, 0x45, 0x53
+007140 4f54
+007141 4552
+007142 458c
+007143 4954
+007144 5152
+007145 458e
+007146 4e54
+007147 494d              .db 0x54, 0x4F, 0x52, 0x45, 0x8C, 0x45, 0x54, 0x49, 0x52, 0x51, 0x8E, 0x45, 0x54, 0x4E, 0x4D, 0x49
+007148 458f
+007149 5554
+00714a 4e52
+00714b 4990
+00714c 4847
+00714d 2454
+00714e e528
+00714f 444e              .db 0x8F, 0x45, 0x54, 0x55, 0x52, 0x4E, 0x90, 0x49, 0x47, 0x48, 0x54, 0x24, 0x28, 0xE5, 0x4E, 0x44
+007150 cb28
+007151 4e55
+007152 008a
+007153 4441
+007154 2844
+007155 41d4
+007156 4556
+007157 4798              .db 0x28, 0xCB, 0x55, 0x4E, 0x8A, 0x00, 0x41, 0x44, 0x44, 0x28, 0xD4, 0x41, 0x56, 0x45, 0x98, 0x47
+007158 284e
+007159 49c4
+00715a 284e
+00715b 50cf
+00715c 2843
+00715d 51b0
+00715e 2852
+00715f 54ca              .db 0x4E, 0x28, 0xC4, 0x49, 0x4E, 0x28, 0xCF, 0x50, 0x43, 0x28, 0xB0, 0x51, 0x52, 0x28, 0xCA, 0x54
+007160 5045
+007161 54b3
+007162 504f
+007163 5492
+007164 2452
+007165 d628
+007166 4157
+007167 a650              .db 0x45, 0x50, 0xB3, 0x54, 0x4F, 0x50, 0x92, 0x54, 0x52, 0x24, 0x28, 0xD6, 0x57, 0x41, 0x50, 0xA6
+007168 5359
+007169 00ab
+00716a 4241
+00716b ac28
+00716c 4e41
+00716d d028
+00716e 4548
+00716f b14e              .db 0x59, 0x53, 0xAB, 0x00, 0x41, 0x42, 0x28, 0xAC, 0x41, 0x4E, 0x28, 0xD0, 0x48, 0x45, 0x4E, 0xB1
+007170 ae4f
+007171 4f57
+007172 4950
+007173 00e2
+007174 4143
+007175 4553
+007176 2824
+007177 4ed9              .db 0x4F, 0xAE, 0x57, 0x4F, 0x50, 0x49, 0xE2, 0x00, 0x43, 0x41, 0x53, 0x45, 0x24, 0x28, 0xD9, 0x4E
+007178 4954
+007179 b44c
+00717a 5253
+00717b c728
+00717c 4100
+00717d 284c
+00717e 41d7
+00717f 5052              .db 0x54, 0x49, 0x4C, 0xB4, 0x53, 0x52, 0x28, 0xC7, 0x00, 0x41, 0x4C, 0x28, 0xD7, 0x41, 0x52, 0x50
+007180 5254
+007181 e328
+007182 4100
+007183 5449
+007184 4896
+007185 4c49
+007186 b545
+007187 4449              .db 0x54, 0x52, 0x28, 0xE3, 0x00, 0x41, 0x49, 0x54, 0x96, 0x48, 0x49, 0x4C, 0x45, 0xB5, 0x49, 0x44
+007188 4854
+007189 00a4
+00718a 00bb
+00718b 4503
+00718c e1db
+00718d 4603
+00718e e1e8
+00718f 4e04              .db 0x54, 0x48, 0xA4, 0x00, 0xBB, 0x00, 0x03, 0x45, 0xDB, 0xE1, 0x03, 0x46, 0xE8, 0xE1, 0x04, 0x4E
+007190 e24b
+007191 4404
+007192 e1be
+007193 4905
+007194 e208
+007195 4403
+007196 e1cd
+007197 5204              .db 0x4B, 0xE2, 0x04, 0x44, 0xBE, 0xE1, 0x05, 0x49, 0x08, 0xE2, 0x03, 0x44, 0xCD, 0xE1, 0x04, 0x52
+007198 e277
+007199 4c03
+00719a e226
+00719b 4403
+00719c e1c2
+00719d 4704
+00719e e1f8
+00719f 5203              .db 0x77, 0xE2, 0x03, 0x4C, 0x26, 0xE2, 0x03, 0x44, 0xC2, 0xE1, 0x04, 0x47, 0xF8, 0xE1, 0x03, 0x52
+0071a0 e2a2
+0071a1 4902
+0071a2 e203
+0071a3 5207
+0071a4 e27e
+0071a5 4705
+0071a6 e1f3
+0071a7 5206              .db 0xA2, 0xE2, 0x02, 0x49, 0x03, 0xE2, 0x07, 0x52, 0x7E, 0xE2, 0x05, 0x47, 0xF3, 0xE1, 0x06, 0x52
+0071a8 e285
+0071a9 5206
+0071aa e28b
+0071ab 5206
+0071ac e291
+0071ad 5203
+0071ae e27b
+0071af 5304              .db 0x85, 0xE2, 0x06, 0x52, 0x8B, 0xE2, 0x06, 0x52, 0x91, 0xE2, 0x03, 0x52, 0x7B, 0xE2, 0x04, 0x53
+0071b0 e2c3
+0071b1 4f02
+0071b2 e25d
+0071b3 4e04
+0071b4 e255
+0071b5 4903
+0071b6 e205
+0071b7 5704              .db 0xC3, 0xE2, 0x02, 0x4F, 0x5D, 0xE2, 0x04, 0x4E, 0x55, 0xE2, 0x03, 0x49, 0x05, 0xE2, 0x04, 0x57
+0071b8 e305
+0071b9 4c04
+0071ba e22d
+0071bb 5304
+0071bc e2ab
+0071bd 4403
+0071be e1ca
+0071bf 5004              .db 0x05, 0xE3, 0x04, 0x4C, 0x2D, 0xE2, 0x04, 0x53, 0xAB, 0xE2, 0x03, 0x44, 0xCA, 0xE1, 0x04, 0x50
+0071c0 e269
+0071c1 4404
+0071c2 e1d0
+0071c3 4304
+0071c4 e1a7
+0071c5 4402
+0071c6 e1d4
+0071c7 4c04              .db 0x69, 0xE2, 0x04, 0x44, 0xD0, 0xE1, 0x04, 0x43, 0xA7, 0xE1, 0x02, 0x44, 0xD4, 0xE1, 0x04, 0x4C
+0071c8 e235
+0071c9 5005
+0071ca e271
+0071cb 4304
+0071cc e1b5
+0071cd 4c04
+0071ce e229
+0071cf 4305              .db 0x35, 0xE2, 0x05, 0x50, 0x71, 0xE2, 0x04, 0x43, 0xB5, 0xE1, 0x04, 0x4C, 0x29, 0xE2, 0x05, 0x43
+0071d0 e1b0
+0071d1 4e03
+0071d2 e248
+0071d3 5705
+0071d4 e30e
+0071d5 4703
+0071d6 e1f0
+0071d7 5304              .db 0xB0, 0xE1, 0x03, 0x4E, 0x48, 0xE2, 0x05, 0x57, 0x0E, 0xE3, 0x03, 0x47, 0xF0, 0xE1, 0x04, 0x53
+0071d8 e2cc
+0071d9 4206
+0071da e199
+0071db 4206
+0071dc e193
+0071dd 4903
+0071de e211
+0071df 4e03              .db 0xCC, 0xE2, 0x06, 0x42, 0x99, 0xE1, 0x06, 0x42, 0x93, 0xE1, 0x03, 0x49, 0x11, 0xE2, 0x03, 0x4E
+0071e0 e24f
+0071e1 5303
+0071e2 e2d0
+0071e3 5404
+0071e4 e2d4
+0071e5 4504
+0071e6 e1d7
+0071e7 5402              .db 0x4F, 0xE2, 0x03, 0x53, 0xD0, 0xE2, 0x04, 0x54, 0xD4, 0xE2, 0x04, 0x45, 0xD7, 0xE1, 0x02, 0x54
+0071e8 e2e0
+0071e9 4602
+0071ea e1e6
+0071eb 5304
+0071ec e2b7
+0071ed 5404
+0071ee e2dc
+0071ef 4e03              .db 0xE0, 0xE2, 0x02, 0x46, 0xE6, 0xE1, 0x04, 0x53, 0xB7, 0xE2, 0x04, 0x54, 0xDC, 0xE2, 0x03, 0x4E
+0071f0 e252
+0071f1 5304
+0071f2 e2bf
+0071f3 5505
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+00778a 4052
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+007792 ea16
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+0077a8 0000
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+0077af 4402              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0B, 0x23, 0x49, 0x49, 0x3B, 0x23, 0x02, 0x44
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+007800 1e39
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+007d0d 5a7b
+007d0e 9cbd
+007d0f deff              .db 0x31, 0x10, 0x73, 0x52, 0xB5, 0x94, 0xF7, 0xD6, 0x39, 0x18, 0x7B, 0x5A, 0xBD, 0x9C, 0xFF, 0xDE
+007d10 4362
+007d11 0120
+007d12 c7e6
+007d13 85a4
+007d14 4b6a
+007d15 0928
+007d16 cfee
+007d17 8dac              .db 0x62, 0x43, 0x20, 0x01, 0xE6, 0xC7, 0xA4, 0x85, 0x6A, 0x4B, 0x28, 0x09, 0xEE, 0xCF, 0xAC, 0x8D
+007d18 7253
+007d19 3011
+007d1a f6d7
+007d1b b495
+007d1c 7a5b
+007d1d 3819
+007d1e fedf
+007d1f bc9d              .db 0x53, 0x72, 0x11, 0x30, 0xD7, 0xF6, 0x95, 0xB4, 0x5B, 0x7A, 0x19, 0x38, 0xDF, 0xFE, 0x9D, 0xBC
+007d20 e5c4
+007d21 a786
+007d22 6140
+007d23 2302
+007d24 edcc
+007d25 af8e
+007d26 6948
+007d27 2b0a              .db 0xC4, 0xE5, 0x86, 0xA7, 0x40, 0x61, 0x02, 0x23, 0xCC, 0xED, 0x8E, 0xAF, 0x48, 0x69, 0x0A, 0x2B
+007d28 d4f5
+007d29 96b7
+007d2a 5071
+007d2b 1233
+007d2c dcfd
+007d2d 9ebf
+007d2e 5879
+007d2f 1a3b              .db 0xF5, 0xD4, 0xB7, 0x96, 0x71, 0x50, 0x33, 0x12, 0xFD, 0xDC, 0xBF, 0x9E, 0x79, 0x58, 0x3B, 0x1A
+007d30 87a6
+007d31 c5e4
+007d32 0322
+007d33 4160
+007d34 8fae
+007d35 cdec
+007d36 0b2a
+007d37 4968              .db 0xA6, 0x87, 0xE4, 0xC5, 0x22, 0x03, 0x60, 0x41, 0xAE, 0x8F, 0xEC, 0xCD, 0x2A, 0x0B, 0x68, 0x49
+007d38 b697
+007d39 f4d5
+007d3a 3213
+007d3b 7051
+007d3c be9f
+007d3d fcdd
+007d3e 3a1b
+007d3f 7859              .db 0x97, 0xB6, 0xD5, 0xF4, 0x13, 0x32, 0x51, 0x70, 0x9F, 0xBE, 0xDD, 0xFC, 0x1B, 0x3A, 0x59, 0x78
+007d40 a988
+007d41 ebca
+007d42 2d0c
+007d43 6f4e
+007d44 a180
+007d45 e3c2
+007d46 2504
+007d47 6746              .db 0x88, 0xA9, 0xCA, 0xEB, 0x0C, 0x2D, 0x4E, 0x6F, 0x80, 0xA1, 0xC2, 0xE3, 0x04, 0x25, 0x46, 0x67
+007d48 98b9
+007d49 dafb
+007d4a 1c3d
+007d4b 5e7f
+007d4c 90b1
+007d4d d2f3
+007d4e 1435
+007d4f 5677              .db 0xB9, 0x98, 0xFB, 0xDA, 0x3D, 0x1C, 0x7F, 0x5E, 0xB1, 0x90, 0xF3, 0xD2, 0x35, 0x14, 0x77, 0x56
+007d50 cbea
+007d51 89a8
+007d52 4f6e
+007d53 0d2c
+007d54 c3e2
+007d55 81a0
+007d56 4766
+007d57 0524              .db 0xEA, 0xCB, 0xA8, 0x89, 0x6E, 0x4F, 0x2C, 0x0D, 0xE2, 0xC3, 0xA0, 0x81, 0x66, 0x47, 0x24, 0x05
+007d58 fadb
+007d59 b899
+007d5a 7e5f
+007d5b 3c1d
+007d5c f2d3
+007d5d b091
+007d5e 7657
+007d5f 3415              .db 0xDB, 0xFA, 0x99, 0xB8, 0x5F, 0x7E, 0x1D, 0x3C, 0xD3, 0xF2, 0x91, 0xB0, 0x57, 0x76, 0x15, 0x34
+007d60 6d4c
+007d61 2f0e
+007d62 e9c8
+007d63 ab8a
+007d64 6544
+007d65 2706
+007d66 e1c0
+007d67 a382              .db 0x4C, 0x6D, 0x0E, 0x2F, 0xC8, 0xE9, 0x8A, 0xAB, 0x44, 0x65, 0x06, 0x27, 0xC0, 0xE1, 0x82, 0xA3
+007d68 5c7d
+007d69 1e3f
+007d6a d8f9
+007d6b 9abb
+007d6c 5475
+007d6d 1637
+007d6e d0f1
+007d6f 92b3              .db 0x7D, 0x5C, 0x3F, 0x1E, 0xF9, 0xD8, 0xBB, 0x9A, 0x75, 0x54, 0x37, 0x16, 0xF1, 0xD0, 0xB3, 0x92
+007d70 0f2e
+007d71 4d6c
+007d72 8baa
+007d73 c9e8
+007d74 0726
+007d75 4564
+007d76 83a2
+007d77 c1e0              .db 0x2E, 0x0F, 0x6C, 0x4D, 0xAA, 0x8B, 0xE8, 0xC9, 0x26, 0x07, 0x64, 0x45, 0xA2, 0x83, 0xE0, 0xC1
+007d78 3e1f
+007d79 7c5d
+007d7a ba9b
+007d7b f8d9
+007d7c 3617
+007d7d 7455
+007d7e b293
+007d7f f0d1              .db 0x1F, 0x3E, 0x5D, 0x7C, 0x9B, 0xBA, 0xD9, 0xF8, 0x17, 0x36, 0x55, 0x74, 0x93, 0xB2, 0xD1, 0xF0
+007d80 1000
+007d81 3020
+007d82 5040
+007d83 7060
+007d84 9181
+007d85 b1a1
+007d86 d1c1
+007d87 f1e1              .db 0x00, 0x10, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70, 0x81, 0x91, 0xA1, 0xB1, 0xC1, 0xD1, 0xE1, 0xF1
+007d88 0212
+007d89 2232
+007d8a 4252
+007d8b 6272
+007d8c 8393
+007d8d a3b3
+007d8e c3d3
+007d8f e3f3              .db 0x12, 0x02, 0x32, 0x22, 0x52, 0x42, 0x72, 0x62, 0x93, 0x83, 0xB3, 0xA3, 0xD3, 0xC3, 0xF3, 0xE3
+007d90 3424
+007d91 1404
+007d92 7464
+007d93 5444
+007d94 b5a5
+007d95 9585
+007d96 f5e5
+007d97 d5c5              .db 0x24, 0x34, 0x04, 0x14, 0x64, 0x74, 0x44, 0x54, 0xA5, 0xB5, 0x85, 0x95, 0xE5, 0xF5, 0xC5, 0xD5
+007d98 2636
+007d99 0616
+007d9a 6676
+007d9b 4656
+007d9c a7b7
+007d9d 8797
+007d9e e7f7
+007d9f c7d7              .db 0x36, 0x26, 0x16, 0x06, 0x76, 0x66, 0x56, 0x46, 0xB7, 0xA7, 0x97, 0x87, 0xF7, 0xE7, 0xD7, 0xC7
+007da0 5848
+007da1 7868
+007da2 1808
+007da3 3828
+007da4 d9c9
+007da5 f9e9
+007da6 9989
+007da7 b9a9              .db 0x48, 0x58, 0x68, 0x78, 0x08, 0x18, 0x28, 0x38, 0xC9, 0xD9, 0xE9, 0xF9, 0x89, 0x99, 0xA9, 0xB9
+007da8 4a5a
+007da9 6a7a
+007daa 0a1a
+007dab 2a3a
+007dac cbdb
+007dad ebfb
+007dae 8b9b
+007daf abbb              .db 0x5A, 0x4A, 0x7A, 0x6A, 0x1A, 0x0A, 0x3A, 0x2A, 0xDB, 0xCB, 0xFB, 0xEB, 0x9B, 0x8B, 0xBB, 0xAB
+007db0 7c6c
+007db1 5c4c
+007db2 3c2c
+007db3 1c0c
+007db4 fded
+007db5 ddcd
+007db6 bdad
+007db7 9d8d              .db 0x6C, 0x7C, 0x4C, 0x5C, 0x2C, 0x3C, 0x0C, 0x1C, 0xED, 0xFD, 0xCD, 0xDD, 0xAD, 0xBD, 0x8D, 0x9D
+007db8 6e7e
+007db9 4e5e
+007dba 2e3e
+007dbb 0e1e
+007dbc efff
+007dbd cfdf
+007dbe afbf
+007dbf 8f9f              .db 0x7E, 0x6E, 0x5E, 0x4E, 0x3E, 0x2E, 0x1E, 0x0E, 0xFF, 0xEF, 0xDF, 0xCF, 0xBF, 0xAF, 0x9F, 0x8F
+007dc0 8191
+007dc1 a1b1
+007dc2 c1d1
+007dc3 e1f1
+007dc4 0010
+007dc5 2030
+007dc6 4050
+007dc7 6070              .db 0x91, 0x81, 0xB1, 0xA1, 0xD1, 0xC1, 0xF1, 0xE1, 0x10, 0x00, 0x30, 0x20, 0x50, 0x40, 0x70, 0x60
+007dc8 9383
+007dc9 b3a3
+007dca d3c3
+007dcb f3e3
+007dcc 1202
+007dcd 3222
+007dce 5242
+007dcf 7262              .db 0x83, 0x93, 0xA3, 0xB3, 0xC3, 0xD3, 0xE3, 0xF3, 0x02, 0x12, 0x22, 0x32, 0x42, 0x52, 0x62, 0x72
+007dd0 a5b5
+007dd1 8595
+007dd2 e5f5
+007dd3 c5d5
+007dd4 2434
+007dd5 0414
+007dd6 6474
+007dd7 4454              .db 0xB5, 0xA5, 0x95, 0x85, 0xF5, 0xE5, 0xD5, 0xC5, 0x34, 0x24, 0x14, 0x04, 0x74, 0x64, 0x54, 0x44
+007dd8 b7a7
+007dd9 9787
+007dda f7e7
+007ddb d7c7
+007ddc 3626
+007ddd 1606
+007dde 7666
+007ddf 5646              .db 0xA7, 0xB7, 0x87, 0x97, 0xE7, 0xF7, 0xC7, 0xD7, 0x26, 0x36, 0x06, 0x16, 0x66, 0x76, 0x46, 0x56
+007de0 c9d9
+007de1 e9f9
+007de2 8999
+007de3 a9b9
+007de4 4858
+007de5 6878
+007de6 0818
+007de7 2838              .db 0xD9, 0xC9, 0xF9, 0xE9, 0x99, 0x89, 0xB9, 0xA9, 0x58, 0x48, 0x78, 0x68, 0x18, 0x08, 0x38, 0x28
+007de8 dbcb
+007de9 fbeb
+007dea 9b8b
+007deb bbab
+007dec 5a4a
+007ded 7a6a
+007dee 1a0a
+007def 3a2a              .db 0xCB, 0xDB, 0xEB, 0xFB, 0x8B, 0x9B, 0xAB, 0xBB, 0x4A, 0x5A, 0x6A, 0x7A, 0x0A, 0x1A, 0x2A, 0x3A
+007df0 edfd
+007df1 cddd
+007df2 adbd
+007df3 8d9d
+007df4 6c7c
+007df5 4c5c
+007df6 2c3c
+007df7 0c1c              .db 0xFD, 0xED, 0xDD, 0xCD, 0xBD, 0xAD, 0x9D, 0x8D, 0x7C, 0x6C, 0x5C, 0x4C, 0x3C, 0x2C, 0x1C, 0x0C
+007df8 ffef
+007df9 dfcf
+007dfa bfaf
+007dfb 9f8f
+007dfc 7e6e
+007dfd 5e4e
+007dfe 3e2e
+007dff 1e0e              .db 0xEF, 0xFF, 0xCF, 0xDF, 0xAF, 0xBF, 0x8F, 0x9F, 0x6E, 0x7E, 0x4E, 0x5E, 0x2E, 0x3E, 0x0E, 0x1E
+007e00 fc20
+007e01 a9fc
+007e02 8501
+007e03 853c
+007e04 a93f
+007e05 2043
+007e06 e7fb
+007e07 ffa9              .db 0x20, 0xFC, 0xFC, 0xA9, 0x01, 0x85, 0x3C, 0x85, 0x3F, 0xA9, 0x43, 0x20, 0xFB, 0xE7, 0xA9, 0xFF
+007e08 3e85
+007e09 00a9
+007e0a 3885
+007e0b 3985
+007e0c e920
+007e0d b0fc
+007e0e 9011
+007e0f a9ea              .db 0x85, 0x3E, 0xA9, 0x00, 0x85, 0x38, 0x85, 0x39, 0x20, 0xE9, 0xFC, 0xB0, 0x11, 0x90, 0xEA, 0xA9
+007e10 85ff
+007e11 a93e
+007e12 8500
+007e13 8538
+007e14 2039
+007e15 fce9
+007e16 f190
+007e17 1bc9              .db 0xFF, 0x85, 0x3E, 0xA9, 0x00, 0x85, 0x38, 0x85, 0x39, 0x20, 0xE9, 0xFC, 0x90, 0xF1, 0xC9, 0x1B
+007e18 01d0
+007e19 c900
+007e1a f001
+007e1b c90e
+007e1c d03a
+007e1d 4c03
+007e1e fd5a
+007e1f 04c9              .db 0xD0, 0x01, 0x00, 0xC9, 0x01, 0xF0, 0x0E, 0xC9, 0x3A, 0xD0, 0x03, 0x4C, 0x5A, 0xFD, 0xC9, 0x04
+007e20 59d0
+007e21 dc4c
+007e22 a2fc
+007e23 a900
+007e24 85ff
+007e25 203e
+007e26 fce9
+007e27 4b90              .db 0xD0, 0x59, 0x4C, 0xDC, 0xFC, 0xA2, 0x00, 0xA9, 0xFF, 0x85, 0x3E, 0x20, 0xE9, 0xFC, 0x90, 0x4B
+007e28 009d
+007e29 e803
+007e2a 84e0
+007e2b efd0
+007e2c 00a2
+007e2d 00bd
+007e2e c503
+007e2f f03c              .db 0x9D, 0x00, 0x03, 0xE8, 0xE0, 0x84, 0xD0, 0xEF, 0xA2, 0x00, 0xBD, 0x00, 0x03, 0xC5, 0x3C, 0xF0
+007e30 a90b
+007e31 a2fe
+007e32 2045
+007e33 fe30
+007e34 4020
+007e35 00fd
+007e36 ff49
+007e37 dde8              .db 0x0B, 0xA9, 0xFE, 0xA2, 0x45, 0x20, 0x30, 0xFE, 0x20, 0x40, 0xFD, 0x00, 0x49, 0xFF, 0xE8, 0xDD
+007e38 0300
+007e39 0bf0
+007e3a fea9
+007e3b 45a2
+007e3c 3020
+007e3d 20fe
+007e3e fd40
+007e3f a000              .db 0x00, 0x03, 0xF0, 0x0B, 0xA9, 0xFE, 0xA2, 0x45, 0x20, 0x30, 0xFE, 0x20, 0x40, 0xFD, 0x00, 0xA0
+007e40 b902
+007e41 0300
+007e42 4a20
+007e43 c8fd
+007e44 82c0
+007e45 f5d0
+007e46 00b9
+007e47 c503              .db 0x02, 0xB9, 0x00, 0x03, 0x20, 0x4A, 0xFD, 0xC8, 0xC0, 0x82, 0xD0, 0xF5, 0xB9, 0x00, 0x03, 0xC5
+007e48 d039
+007e49 c808
+007e4a 00b9
+007e4b c503
+007e4c f038
+007e4d 200b
+007e4e fd40
+007e4f 15a9              .db 0x39, 0xD0, 0x08, 0xC8, 0xB9, 0x00, 0x03, 0xC5, 0x38, 0xF0, 0x0B, 0x20, 0x40, 0xFD, 0xA9, 0x15
+007e50 fb20
+007e51 4ce7
+007e52 fc1f
+007e53 02a2
+007e54 3ca5
+007e55 01c9
+007e56 12d0
+007e57 3fa5              .db 0x20, 0xFB, 0xE7, 0x4C, 0x1F, 0xFC, 0xA2, 0x02, 0xA5, 0x3C, 0xC9, 0x01, 0xD0, 0x12, 0xA5, 0x3F
+007e58 0ef0
+007e59 00bd
+007e5a 8503
+007e5b e83a
+007e5c 00bd
+007e5d 8503
+007e5e e83b
+007e5f 3fc6              .db 0xF0, 0x0E, 0xBD, 0x00, 0x03, 0x85, 0x3A, 0xE8, 0xBD, 0x00, 0x03, 0x85, 0x3B, 0xE8, 0xC6, 0x3F
+007e60 00a0
+007e61 00bd
+007e62 9103
+007e63 e63a
+007e64 d03a
+007e65 e602
+007e66 e83b
+007e67 82e0              .db 0xA0, 0x00, 0xBD, 0x00, 0x03, 0x91, 0x3A, 0xE6, 0x3A, 0xD0, 0x02, 0xE6, 0x3B, 0xE8, 0xE0, 0x82
+007e68 f0d0
+007e69 3ce6
+007e6a 06a9
+007e6b fb20
+007e6c 4ce7
+007e6d fc1f
+007e6e 06a9
+007e6f fb20              .db 0xD0, 0xF0, 0xE6, 0x3C, 0xA9, 0x06, 0x20, 0xFB, 0xE7, 0x4C, 0x1F, 0xFC, 0xA9, 0x06, 0x20, 0xFB
+007e70 a9e7
+007e71 a2fe
+007e72 2075
+007e73 fe30
+007e74 a960
+007e75 8500
+007e76 203d
+007e77 e7f8              .db 0xE7, 0xA9, 0xFE, 0xA2, 0x75, 0x20, 0x30, 0xFE, 0x60, 0xA9, 0x00, 0x85, 0x3D, 0x20, 0xF8, 0xE7
+007e78 09b0
+007e79 3dc6
+007e7a f7d0
+007e7b 3ec6
+007e7c f3d0
+007e7d 6018
+007e7e 00a2
+007e7f 0bbd              .db 0xB0, 0x09, 0xC6, 0x3D, 0xD0, 0xF7, 0xC6, 0x3E, 0xD0, 0xF3, 0x18, 0x60, 0xA2, 0x00, 0xBD, 0x0B
+007e80 f0fd
+007e81 2007
+007e82 e7fb
+007e83 4ce8
+007e84 fcfe
+007e85 4260
+007e86 6765
+007e87 6e69              .db 0xFD, 0xF0, 0x07, 0x20, 0xFB, 0xE7, 0xE8, 0x4C, 0xFE, 0xFC, 0x60, 0x42, 0x65, 0x67, 0x69, 0x6E
+007e88 5820
+007e89 4f4d
+007e8a 4544
+007e8b 2f4d
+007e8c 5243
+007e8d 2043
+007e8e 7274
+007e8f 6e61              .db 0x20, 0x58, 0x4D, 0x4F, 0x44, 0x45, 0x4D, 0x2F, 0x43, 0x52, 0x43, 0x20, 0x74, 0x72, 0x61, 0x6E
+007e90 6673
+007e91 7265
+007e92 0d2e
+007e93 500a
+007e94 6572
+007e95 7373
+007e96 3c20
+007e97 7345              .db 0x73, 0x66, 0x65, 0x72, 0x2E, 0x0D, 0x0A, 0x50, 0x72, 0x65, 0x73, 0x73, 0x20, 0x3C, 0x45, 0x73
+007e98 3e63
+007e99 7420
+007e9a 206f
+007e9b 6261
+007e9c 726f
+007e9d 2e74
+007e9e 2e2e
+007e9f 0020              .db 0x63, 0x3E, 0x20, 0x74, 0x6F, 0x20, 0x61, 0x62, 0x6F, 0x72, 0x74, 0x2E, 0x2E, 0x2E, 0x20, 0x00
+007ea0 70a9
+007ea1 3e85
+007ea2 e920
+007ea3 b0fc
+007ea4 60f7
+007ea5 3945
+007ea6 a5aa
+007ea7 5d38              .db 0xA9, 0x70, 0x85, 0x3E, 0x20, 0xE9, 0xFC, 0xB0, 0xF7, 0x60, 0x45, 0x39, 0xAA, 0xA5, 0x38, 0x5D
+007ea8 fb00
+007ea9 3985
+007eaa 00bd
+007eab 85fa
+007eac 6038
+007ead 0da9
+007eae fb20
+007eaf a9e7              .db 0x00, 0xFB, 0x85, 0x39, 0xBD, 0x00, 0xFA, 0x85, 0x38, 0x60, 0xA9, 0x0D, 0x20, 0xFB, 0xE7, 0xA9
+007eb0 200a
+007eb1 e7fb
+007eb2 00a9
+007eb3 3e85
+007eb4 07f0
+007eb5 0a20
+007eb6 c9fe
+007eb7 d03a              .db 0x0A, 0x20, 0xFB, 0xE7, 0xA9, 0x00, 0x85, 0x3E, 0xF0, 0x07, 0x20, 0x0A, 0xFE, 0xC9, 0x3A, 0xD0
+007eb8 20f9
+007eb9 fe13
+007eba 3985
+007ebb 3885
+007ebc 1320
+007ebd 85fe
+007ebe 183c
+007ebf 3865              .db 0xF9, 0x20, 0x13, 0xFE, 0x85, 0x39, 0x85, 0x38, 0x20, 0x13, 0xFE, 0x85, 0x3C, 0x18, 0x65, 0x38
+007ec0 3885
+007ec1 1320
+007ec2 85fe
+007ec3 183b
+007ec4 3865
+007ec5 3885
+007ec6 1320
+007ec7 85fe              .db 0x85, 0x38, 0x20, 0x13, 0xFE, 0x85, 0x3B, 0x18, 0x65, 0x38, 0x85, 0x38, 0x20, 0x13, 0xFE, 0x85
+007ec8 183d
+007ec9 3865
+007eca 3885
+007ecb 3da5
+007ecc 2cd0
+007ecd 39a6
+007ece 00a0
+007ecf 1320              .db 0x3D, 0x18, 0x65, 0x38, 0x85, 0x38, 0xA5, 0x3D, 0xD0, 0x2C, 0xA6, 0x39, 0xA0, 0x00, 0x20, 0x13
+007ed0 91fe
+007ed1 183b
+007ed2 3865
+007ed3 3885
+007ed4 cac8
+007ed5 f2d0
+007ed6 1320
+007ed7 18fe              .db 0xFE, 0x91, 0x3B, 0x18, 0x65, 0x38, 0x85, 0x38, 0xC8, 0xCA, 0xD0, 0xF2, 0x20, 0x13, 0xFE, 0x18
+007ed8 3865
+007ed9 08d0
+007eda 23a9
+007edb c68d
+007edc 4c3f
+007edd fd6a
+007ede 46a9
+007edf 3e85              .db 0x65, 0x38, 0xD0, 0x08, 0xA9, 0x23, 0x8D, 0xC6, 0x3F, 0x4C, 0x6A, 0xFD, 0xA9, 0x46, 0x85, 0x3E
+007ee0 c68d
+007ee1 4c3f
+007ee2 fd6a
+007ee3 01c9
+007ee4 1bf0
+007ee5 fea9
+007ee6 97a2
+007ee7 3020              .db 0x8D, 0xC6, 0x3F, 0x4C, 0x6A, 0xFD, 0xC9, 0x01, 0xF0, 0x1B, 0xA9, 0xFE, 0xA2, 0x97, 0x20, 0x30
+007ee8 a5fe
+007ee9 853d
+007eea 203e
+007eeb e760
+007eec 0da9
+007eed fb20
+007eee a9e7
+007eef 200a              .db 0xFE, 0xA5, 0x3D, 0x85, 0x3E, 0x20, 0x60, 0xE7, 0xA9, 0x0D, 0x20, 0xFB, 0xE7, 0xA9, 0x0A, 0x20
+007ef0 e7fb
+007ef1 6a4c
+007ef2 20fd
+007ef3 fe13
+007ef4 6518
+007ef5 f038
+007ef6 a907
+007ef7 a2fe              .db 0xFB, 0xE7, 0x4C, 0x6A, 0xFD, 0x20, 0x13, 0xFE, 0x18, 0x65, 0x38, 0xF0, 0x07, 0xA9, 0xFE, 0xA2
+007ef8 4cb1
+007ef9 fe30
+007efa 3ea5
+007efb 07f0
+007efc fea9
+007efd caa2
+007efe 304c
+007eff a9fe              .db 0xB1, 0x4C, 0x30, 0xFE, 0xA5, 0x3E, 0xF0, 0x07, 0xA9, 0xFE, 0xA2, 0xCA, 0x4C, 0x30, 0xFE, 0xA9
+007f00 a2fe
+007f01 20e7
+007f02 fe30
+007f03 4020
+007f04 60fd
+007f05 f820
+007f06 c9e7
+007f07 d01b              .db 0xFE, 0xA2, 0xE7, 0x20, 0x30, 0xFE, 0x20, 0x40, 0xFD, 0x60, 0x20, 0xF8, 0xE7, 0xC9, 0x1B, 0xD0
+007f08 0001
+007f09 a960
+007f0a 8500
+007f0b 203f
+007f0c fe20
+007f0d 0a0a
+007f0e 0a0a
+007f0f 3f85              .db 0x01, 0x00, 0x60, 0xA9, 0x00, 0x85, 0x3F, 0x20, 0x20, 0xFE, 0x0A, 0x0A, 0x0A, 0x0A, 0x85, 0x3F
+007f10 0a20
+007f11 c9fe
+007f12 903a
+007f13 e902
+007f14 e908
+007f15 292f
+007f16 050f
+007f17 603f              .db 0x20, 0x0A, 0xFE, 0xC9, 0x3A, 0x90, 0x02, 0xE9, 0x08, 0xE9, 0x2F, 0x29, 0x0F, 0x05, 0x3F, 0x60
+007f18 4185
+007f19 4086
+007f1a 4898
+007f1b 00a0
+007f1c 40b1
+007f1d 06f0
+007f1e fb20
+007f1f c8e7              .db 0x85, 0x41, 0x86, 0x40, 0x98, 0x48, 0xA0, 0x00, 0xB1, 0x40, 0xF0, 0x06, 0x20, 0xFB, 0xE7, 0xC8
+007f20 f6d0
+007f21 a868
+007f22 0d60
+007f23 0d0a
+007f24 550a
+007f25 656e
+007f26 7078
+007f27 6365              .db 0xD0, 0xF6, 0x68, 0xA8, 0x60, 0x0D, 0x0A, 0x0D, 0x0A, 0x55, 0x6E, 0x65, 0x78, 0x70, 0x65, 0x63
+007f28 6574
+007f29 2064
+007f2a 6c62
+007f2b 636f
+007f2c 206b
+007f2d 756e
+007f2e 626d
+007f2f 7265              .db 0x74, 0x65, 0x64, 0x20, 0x62, 0x6C, 0x6F, 0x63, 0x6B, 0x20, 0x6E, 0x75, 0x6D, 0x62, 0x65, 0x72
+007f30 7220
+007f31 6365
+007f32 6965
+007f33 6576
+007f34 2064
+007f35 6241
+007f36 726f
+007f37 6974              .db 0x20, 0x72, 0x65, 0x63, 0x65, 0x69, 0x76, 0x65, 0x64, 0x20, 0x41, 0x62, 0x6F, 0x72, 0x74, 0x69
+007f38 676e
+007f39 0a0d
+007f3a 0d00
+007f3b 580a
+007f3c 4f4d
+007f3d 4544
+007f3e 2d4d
+007f3f 5243              .db 0x6E, 0x67, 0x0D, 0x0A, 0x00, 0x0D, 0x0A, 0x58, 0x4D, 0x4F, 0x44, 0x45, 0x4D, 0x2D, 0x43, 0x52
+007f40 2043
+007f41 6f64
+007f42 6e77
+007f43 6f6c
+007f44 6461
+007f45 6920
+007f46 2073
+007f47 6f63              .db 0x43, 0x20, 0x64, 0x6F, 0x77, 0x6E, 0x6C, 0x6F, 0x61, 0x64, 0x20, 0x69, 0x73, 0x20, 0x63, 0x6F
+007f48 706d
+007f49 656c
+007f4a 6574
+007f4b 0d00
+007f4c 0d0a
+007f4d 550a
+007f4e 6b6e
+007f4f 6f6e              .db 0x6D, 0x70, 0x6C, 0x65, 0x74, 0x65, 0x00, 0x0D, 0x0A, 0x0D, 0x0A, 0x55, 0x6E, 0x6B, 0x6E, 0x6F
+007f50 6e77
+007f51 7220
+007f52 6365
+007f53 726f
+007f54 2064
+007f55 7974
+007f56 6570
+007f57 2420              .db 0x77, 0x6E, 0x20, 0x72, 0x65, 0x63, 0x6F, 0x72, 0x64, 0x20, 0x74, 0x79, 0x70, 0x65, 0x20, 0x24
+007f58 0d00
+007f59 0d0a
+007f5a 420a
+007f5b 6461
+007f5c 7220
+007f5d 6365
+007f5e 726f
+007f5f 2064              .db 0x00, 0x0D, 0x0A, 0x0D, 0x0A, 0x42, 0x61, 0x64, 0x20, 0x72, 0x65, 0x63, 0x6F, 0x72, 0x64, 0x20
+007f60 6863
+007f61 6365
+007f62 736b
+007f63 6d75
+007f64 0021
+007f65 0a0d
+007f66 0a0d
+007f67 7055              .db 0x63, 0x68, 0x65, 0x63, 0x6B, 0x73, 0x75, 0x6D, 0x21, 0x00, 0x0D, 0x0A, 0x0D, 0x0A, 0x55, 0x70
+007f68 6f6c
+007f69 6461
+007f6a 4620
+007f6b 6961
+007f6c 656c
+007f6d 0d64
+007f6e 410a
+007f6f 6f62              .db 0x6C, 0x6F, 0x61, 0x64, 0x20, 0x46, 0x61, 0x69, 0x6C, 0x65, 0x64, 0x0D, 0x0A, 0x41, 0x62, 0x6F
+007f70 7472
+007f71 6e69
+007f72 2167
+007f73 0d00
+007f74 0d0a
+007f75 550a
+007f76 6c70
+007f77 616f              .db 0x72, 0x74, 0x69, 0x6E, 0x67, 0x21, 0x00, 0x0D, 0x0A, 0x0D, 0x0A, 0x55, 0x70, 0x6C, 0x6F, 0x61
+007f78 2064
+007f79 7553
+007f7a 6363
+007f7b 7365
+007f7c 6673
+007f7d 6c75
+007f7e 0021
+007f7f 0000              .db 0x64, 0x20, 0x53, 0x75, 0x63, 0x63, 0x65, 0x73, 0x73, 0x66, 0x75, 0x6C, 0x21, 0x00, 0x00, 0x00
+007f80 d878
+007f81 ffa2
+007f82 a29a
+007f83 a9c7
+007f84 8de6
+007f85 03f8
+007f86 f78e
+007f87 a203              .db 0x78, 0xD8, 0xA2, 0xFF, 0x9A, 0xA2, 0xC7, 0xA9, 0xE6, 0x8D, 0xF8, 0x03, 0x8E, 0xF7, 0x03, 0xA2
+007f88 a965
+007f89 8dff
+007f8a 03fe
+007f8b fd8e
+007f8c a203
+007f8d a965
+007f8e 8dff
+007f8f 03fb              .db 0x65, 0xA9, 0xFF, 0x8D, 0xFE, 0x03, 0x8E, 0xFD, 0x03, 0xA2, 0x65, 0xA9, 0xFF, 0x8D, 0xFB, 0x03
+007f90 fa8e
+007f91 a203
+007f92 a90c
+007f93 8de8
+007f94 03f5
+007f95 f48e
+007f96 a903
+007f97 8de7              .db 0x8E, 0xFA, 0x03, 0xA2, 0x0C, 0xA9, 0xE8, 0x8D, 0xF5, 0x03, 0x8E, 0xF4, 0x03, 0xA9, 0xE7, 0x8D
+007f98 0405
+007f99 a4a9
+007f9a 068d
+007f9b a904
+007f9c 8df4
+007f9d 0407
+007f9e a4a9
+007f9f 088d              .db 0x05, 0x04, 0xA9, 0xA4, 0x8D, 0x06, 0x04, 0xA9, 0xF4, 0x8D, 0x07, 0x04, 0xA9, 0xA4, 0x8D, 0x08
+007fa0 a904
+007fa1 8d59
+007fa2 040b
+007fa3 e6a9
+007fa4 0c8d
+007fa5 a904
+007fa6 8d82
+007fa7 0409              .db 0x04, 0xA9, 0x59, 0x8D, 0x0B, 0x04, 0xA9, 0xE6, 0x8D, 0x0C, 0x04, 0xA9, 0x82, 0x8D, 0x09, 0x04
+007fa8 e6a9
+007fa9 0a8d
+007faa 2004
+007fab a483
+007fac 00a9
+007fad aaa8
+007fae d818
+007faf 6c58              .db 0xA9, 0xE6, 0x8D, 0x0A, 0x04, 0x20, 0x83, 0xA4, 0xA9, 0x00, 0xA8, 0xAA, 0x18, 0xD8, 0x58, 0x6C
+007fb0 03f7
+007fb1 fd6c
+007fb2 4003
+007fb3 48da
+007fb4 bdba
+007fb5 0103
+007fb6 1029
+007fb7 05d0              .db 0xF7, 0x03, 0x6C, 0xFD, 0x03, 0x40, 0xDA, 0x48, 0xBA, 0xBD, 0x03, 0x01, 0x29, 0x10, 0xD0, 0x05
+007fb8 fa68
+007fb9 fa6c
+007fba 6803
+007fbb 6cfa
+007fbc 03f4
+007fbd 0060
+007fbe 0000
+007fbf 0000              .db 0x68, 0xFA, 0x6C, 0xFA, 0x03, 0x68, 0xFA, 0x6C, 0xF4, 0x03, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00
+007fc0 0000
+007fc1 0000
+007fc2 0000
+007fc3 0000
+007fc4 0000
+007fc5 0000
+007fc6 0000
+007fc7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+007fc8 0000
+007fc9 0000
+007fca 0000
+007fcb 0000
+007fcc 0000
+007fcd 0000
+007fce 0000
+007fcf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+007fd0 0000
+007fd1 0000
+007fd2 0000
+007fd3 0000
+007fd4 0000
+007fd5 0000
+007fd6 0000
+007fd7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+007fd8 0000
+007fd9 0000
+007fda 0000
+007fdb 0000
+007fdc 0000
+007fdd 0000
+007fde 0000
+007fdf 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+007fe0 0000
+007fe1 0000
+007fe2 0000
+007fe3 0000
+007fe4 0000
+007fe5 0000
+007fe6 0000
+007fe7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+007fe8 0000
+007fe9 0000
+007fea 0000
+007feb 0000
+007fec 0000
+007fed 0000
+007fee 0000
+007fef 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+007ff0 0000
+007ff1 0000
+007ff2 0000
+007ff3 0000
+007ff4 0000
+007ff5 0000
+007ff6 0000
+007ff7 0000              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+007ff8 0000
+007ff9 0000
+007ffa 0000
+007ffb 0000
+007ffc 0000
+007ffd ff62
+007ffe ff00
+007fff ff66              .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x62, 0xFF, 0x00, 0xFF, 0x66, 0xFF
+                 
+                 
+                 ;******************************************************************************
+                 ; Program Starts here on Reset
+                 ;******************************************************************************
+                 STARTUP:						; first line executed after reset 
+008000 94f8      	CLI							; disable interupts
+                 
+                 ;******************************************************************************
+                 ; Initialize the I/O Ports
+                 ;******************************************************************************
+                 ; port A pins 
+008001 ef0f      	ldi		i, 0xff				; 
+008002 b902      	out		porta, i			; 
+008003 e000      	LDI		i, 0x00				; 
+008004 b901      	out		ddra, i				; 
+                 
+                 ; port B pins 
+008005 ef0f      	LDI		i, 0xff				; 
+008006 b905      	out		portb, i			; 
+008007 e000      	LDI		i, 0x00				; 
+008008 b904      	out		ddrb, i				; 
+                 
+                 ; port C pins 
+008009 ef0f      	ldi		i, 0xff				; 
+00800a b908      	out		portc, i			; 
+00800b e000      	LDI		i, 0x00				; 
+00800c b907      	out		ddrc, i				; 
+                 
+                 ; port D pins
+00800d ef0f      	ldi		i, 0xff				;
+00800e b90b      	out		portd, i			;
+00800f e000      	LDI		i, 0x00				;
+008010 b90a      	out		ddrd, i				;
+                 
+                 ;******************************************************************************
+                 ; Init other CPU I/O registers
+                 ;******************************************************************************
+008011 e800      	ldi		i, 0x80
+008012 bf00      	out		ACSR, i				; turn off comparator
+                 
+008013 e400      	ldi		i, 0x40				; set stack pointer to top of SRAM 
+008014 bf0e      	out		SPH, i				;
+008015 ef0f      	ldi		i, 0xff				; 
+008016 bf0d      	out		SPL, i				;
+                 
+                 ;******************************************************************************
+                 ; Init RS-232 port
+                 ;******************************************************************************
+                 InitRS232:
+                 	; set baud rate
+008017 e00c      	ldi		i, 0x0C				; 
+                 								; 			16MHZ	20MHZ	24MHz
+008018 e010      	ldi		j, 0x00				; 115200	xxxx	000A	000C
+008019 9310 00c5 	sts		UBRR0H, j			;  19200	0033	0040	004D
+00801b 9300 00c4 	sts		UBRR0L, i			;  9600		0067	0081	009B
+                 								;  4800		00CF	0103	0137
+                 ;								;  2400		019F 	0208	0270
+                 
+                 
+                 	; Enable receiver and transmitter
+00801d e108      	ldi		i, (1<<RXEN0)|(1<<TXEN0)
+00801e 9300 00c1 	sts		UCSR0B, i
+                 	
+                 	; Set frame format: 8data, 1stop bit
+008020 e006      	ldi		i, (3<<UCSZ00)
+008021 9300 00c2 	sts		UCSR0C, i
+                 
+                 ;******************************************************************************
+                 ; Init program registers
+                 ;******************************************************************************
+008023 2422      	clr		zero
+008024 e001      	ldi		i, 0x01
+008025 2e30      	mov		one, i
+008026 e30f      	ldi		i, 0x3F			; IO Page
+008027 2e40      	mov 	mmap, i
+                 
+                 ;******************************************************************************
+                 ; Show Engine version
+                 ;******************************************************************************
+008028 e6ec      	ldi		zl, low(version*2)
+008029 e0f0      	ldi		zh, high(version*2)
+00802a be3b      	out		rampz, one
+                 ver1:
+00802b 9107      	elpm	i, Z+
+00802c 2300      	tst		i
+00802d f019      	breq	Ready
+00802e 940e f1e2 	call	Put_Chr
+008030 cffa      	rjmp	ver1	
+                 
+                 ;******************************************************************************
+                 ; Main Loop
+                 ;******************************************************************************
+                 Ready:
+008031 be2b      	out		rampz, zero
+008032 940e a700 	call	CPU_RESET
+008034 940c a728 	jmp		Main		; Enter CPU Execute Loop
+                 
+                 ;***********************
+                 ; Version #
+                 ;***********************
+008036 0a0d
+008037 6556
+008038 7372
+008039 6f69
+00803a 206e
+00803b 2e33
+00803c 2031
+00803d 202d
+00803e 7453
+00803f 7261
+008040 6974
+008041 676e
+008042 4520
+008043 756d
+008044 616c
+008045 6f74
+008046 2e72
+008047 2e2e
+008048 0d20
+008049 000a      version: .db 0x0d,0x0a,"Version 3.1 - Starting Emulator... ", 0x0d, 0x0a, 0x00
+                 
+                 ;******************************************************************************
+                 ; include CPU emulator and bootloader files (after ROM image)
+                 ;******************************************************************************
+                 ; these files in the application area
+                 
+                 .include	"cpu.asm"
+                 
+                 ; 65C02 Engine
+                 ; Written by Daryl Rictor
+                 ; (c) 2012
+                 ;
+                 
+                 ; Xl,Xh = PC
+                 ; Yl, Yh = Stack ptr
+                 ; Zl, Zh = memory access
+                 
+                 ; GPIOR0 = EEPROM write control
+                 
+                 .def	AR  = R18	; must be above R15
+                 .def	XR  = R14
+                 .def	YR  = R15
+                 .def	SR  = R19
+                 .def  AVSR  = R20
+                 .def   IRV  = R21
+                 .def IFLAG  = R5
+                 
+                 ;SR bit weights
+                 .set ss = 0x80
+                 .set so	= 0x40
+                 .set sx	= 0x20
+                 .set sb	= 0x10
+                 .set sd = 0x08
+                 .set si = 0x04
+                 .set sz = 0x02
+                 .set sc = 0x01
+                 
+                 ;SR bit positions
+                 .set ssp = 7
+                 .set sop = 6
+                 .set sxp = 5
+                 .set sbp = 4
+                 .set sdp = 3
+                 .set sip = 2
+                 .set szp = 1
+                 .set scp = 0
+                 
+                 ;AVR bit weights
+                 .set ai = 0x80
+                 .set at	= 0x40
+                 .set ah	= 0x20
+                 .set as	= 0x10
+                 .set av	= 0x08
+                 .set an = 0x04
+                 .set az = 0x02
+                 .set ac = 0x01
+                 
+                 ;AVR Sreg Bit positions
+                 .set aip = 7
+                 .set atp = 6
+                 .set ahp = 5
+                 .set asp = 4
+                 .set avp = 3
+                 .set anp = 2
+                 .set azp = 1
+                 .set acp = 0
+                 
+                 ; zero page RAM location
+                 .set ZP = 0x01		; zero page in SRAM
+                 
+                 ;**********************
+                 ; general macros
+                 ;**********************
+                 
+                 .macro SVSR
+                 	in		avsr, SREG
+                 .endmacro
+                 
+                 .macro LDSR
+                 	out		sreg, avsr
+                 .endmacro
+                 
+                 .macro AV2SR
+                 	mov		zl, avsr
+                 	ldi		zh, high(tav2sr*2)
+                 	lpm		i, Z
+                 	andi	sr, sx+sb+sd+si
+                 	or		sr, i
+                 .endmacro
+                 
+                 .macro SR2AV
+                 	mov		zl, sr
+                 	ldi		zh, high(tsr2av*2)
+                 	lpm		avsr, Z
+                 	out		sreg, avsr	; used to update I flag
+                 .endmacro
+                 
+                 ;*******************************
+                 ; CPU execution macro 
+                 ;*******************************
+                 
+                 .macro EXEC
+                 	sbrc	IFLAG, 0	; if IRQ triggered
+                 	rcall	INTJMP	
+                 
+                 	movw	ZL, XL		;
+                 	adiw	XL, 1		;
+                 	cp		zh, mmap	; IO page
+                 	brcs	RAM
+                 
+                 ROM:	; and IO, which will return EA - nop
+                 	lpm		zl, Z
+                 	ldi		zh, high(opctbl)
+                 	lsl		zl
+                 	adc		zh, zero	; pointer to opcode jump
+                 	ijmp				; call opc code
+                 
+                 RAM:
+                 	inc		zh
+                 	ld		zl, Z
+                 	ldi		zh, high(opctbl)
+                 	lsl		zl
+                 	adc		zh, zero	; pointer to opcode jump
+                 	ijmp				; call opc code
+                 
+                 INTJMP:
+                 	jmp		cpu_irq     ; execute it now
+                 .endmacro
+                 
+                 ;**********************
+                 ; Memory Access macros
+                 ;**********************
+                 
+                 .macro READ
+                 	cp		zh, mmap	; IO page
+                 	breq	IO
+                 	brcs	RAM
+                 ROM:
+                 	lpm		i, Z
+                 	rjmp	done
+                 IO:
+                 	cpi		zl, 0x20
+                 	brcs	IOR1
+                 	ldi		zh, 0x00
+                 	ld		i, Z
+                 	mov		zh, mmap
+                 	rjmp	done
+                 
+                 IOR1:
+                 	mov		i, irv		; interrupt vector
+                 	rjmp	done
+                 
+                 RAM:
+                 	inc		zh
+                 	ld		i, Z
+                 	dec		zh
+                 done:
+                 .endmacro
+                 
+                 .macro READZ
+                 	cp		zh, mmap	; IO page
+                 	breq	IO
+                 	brcs	RAM
+                 ROM:
+                 	lpm		zl, Z
+                 	rjmp	done
+                 IO:
+                 	cpi		zl, 0x20
+                 	brcs	IOR1
+                 	ldi		zh, 0x00
+                 	rjmp	RAM1
+                 
+                 IOR1:
+                 	mov		zl, irv		; interrupt vector
+                 	rjmp	done
+                 
+                 RAM:
+                 	inc		zh
+                 RAM1:
+                 	ld		zl, Z
+                 done:
+                 .endmacro
+                 
+                 .macro READ2
+                 	cp		zh, mmap	; IO page
+                 	breq	IO
+                 	brcs	RAM
+                 ROM:
+                 	lpm		i, Z+
+                 	lpm		j, Z
+                 	rjmp	done
+                 IO:
+                 	cpi		zl, 0x20	; *** reading 0x1f will result in no read of 0x20
+                 	brcc	IOR21
+                 	mov		i, irv		; interrupt vector
+                 	mov		j, zero
+                 	rjmp	done
+                 
+                 IOR21:
+                 	ldi		ZH, 0xff	; *** reading IO 0xff will result in reading 0xff and RAM 0x100 vs. ROM
+                 RAM:
+                 	inc		zh
+                 	ld		i, Z+
+                 	ld		j, Z
+                 done:
+                 	movw	ZL, i
+                 .endmacro
+                 
+                 .macro READZP
+                 	ldi		ZH, ZP
+                 	ld		i, Z
+                 .endmacro
+                 
+                 .macro READ2ZP
+                 	ldi		ZH, ZP
+                 	ld		i, Z
+                 	inc		zl
+                 	ld		j, Z
+                 	movw	ZL, i
+                 .endmacro
+                 
+                 .macro WRITE
+                 	cp		zh, mmap	; IO page
+                 	breq	IO
+                 	brcc	done		; ROM
+                 RAM:
+                 	inc		zh
+                 	st		Z, i
+                 	rjmp	done
+                 IO:
+                 	cpi		zl, 0x20	; writes to 0x00 - 0x1f will result in EEPROM Write
+                 	brcc	IOW1		
+                 	in		i, gpior0   ; if GPIOR0 is set to 5A and write to $3F0x or $3F1x,
+                 	cpi		i, 0x5a     ; then do a write eeprom sequence     
+                 	brne	done		; besure to set GPIOR0 <> 5A for safety    
+                 	sbi	eecr, EEMPE
+                 	sbi	eecr, EEPE
+                 	rjmp	done
+                 IOW1:
+                 	clr		ZH
+                 	st		Z, i
+                 done:
+                 .endmacro
+                 
+                 .macro WRITEZP
+                 	st		Z, i
+                 .endmacro
+                 
+                 ;**********************
+                 ; address mode macros
+                 ;**********************
+                 
+                 .macro _ABS
+                 	READ2
+                 	adiw	XL, 0x02
+                 .endmacro
+                 
+                 .macro _ABSX
+                 	READ2
+                 	add		ZL, XR	
+                 	adc		ZH, ZERO	; test for overflow
+                 	adiw	XL, 0x02
+                 .endmacro
+                 
+                 .macro _ABSY
+                 	READ2
+                 	add		ZL, YR	
+                 	adc		ZH, ZERO	; test for overflow
+                 	adiw	XL, 0x02
+                 .endmacro
+                 
+                 .macro _IMM
+                 	; imm Z already set	
+                 	adiw	XL, 0x01
+                 .endmacro
+                 
+                 .macro _IMP
+                 .endmacro
+                 
+                 .macro _INDX
+                 	READZ
+                 	add		ZL, XR
+                 	READ2ZP
+                 	adiw	XL, 0x01
+                 .endmacro
+                 
+                 .macro _INDY
+                 	READZ
+                 	READ2ZP
+                 	add		ZL, YR
+                 	adc		ZH, zero 
+                 	adiw	XL, 0x01
+                 .endmacro
+                 
+                 .macro _IZPG
+                 	READZ
+                 	READ2ZP
+                 	adiw	XL, 0x01
+                 .endmacro
+                 
+                 .macro _REL
+                 	movw	zl, XL
+                 	READZ
+                 	sec					; add 1 to PC using C flag
+                 	tst		zl
+                 	brmi	back
+                 	adc		XL, zl
+                 	adc		XH, zero
+                 	rjmp	done	
+                 back:
+                 	adc		XL, zl
+                 	brcs	done
+                 	dec		XH
+                 done:
+                 .endmacro
+                 
+                 .macro _ZPG
+                 	READZ
+                 	adiw	XL, 0x01
+                 .endmacro
+                 
+                 .macro _ZPGX
+                 	READZ
+                 	add		ZL, XR
+                 	adiw	XL, 0x01
+                 .endmacro
+                 
+                 .macro _ZPGY
+                 	READZ
+                 	add		ZL, YR
+                 	adiw	XL, 0x01
+                 .endmacro
+                 
+                 ;**********************
+                 ; opcode macros
+                 ;**********************
+                 
+                 .macro _ADC
+                 	READZ
+                 	LDSR
+                 	adc		ar, zl
+                 	sbrs	sr, sdp		; check decimal mode
+                 	rjmp	_ADC1
+                 	in		j, sreg		; save flags
+                 	ldi		i, 0x66
+                 	add		AR, i
+                 	brcc	BCDA0
+                 	ori		j, 0x01		; c flag set	
+                 BCDA0:
+                 	sbrc	j, 0		; c flag
+                 	andi	i, 0x0F		; 
+                 	brhc	BCDA1
+                 	ori		j, 0x20		; HC=1
+                 BCDA1:
+                 	sbrc	j, 5		; HC
+                 	andi	i, 0xF0
+                 	sub		AR, i
+                 	ror		j			; restore C
+                 	tst		ar			; set N,Z
+                 _ADC1:
+                 	SVSR
+                 	bst		avsr, avp	; get V flag
+                 	bld		avsr, atp	; move to T flag
+                 .endmacro
+                 
+                 .macro _ADCZ
+                 	READZP
+                 	LDSR
+                 	adc		ar, i
+                 	sbrs	sr, sdp		; check decimal mode
+                 	rjmp	_ADC1
+                 	in		j, sreg		; save flags
+                 	ldi		i, 0x66
+                 	add		AR, i
+                 	brcc	BCDA0
+                 	ori		j, 0x01		; c flag set	
+                 BCDA0:
+                 	sbrc	j, 0		; c flag
+                 	andi	i, 0x0F		; 
+                 	brhc	BCDA1
+                 	ori		j, 0x20		; HC=1
+                 BCDA1:
+                 	sbrc	j, 5		; HC
+                 	andi	i, 0xF0
+                 	sub		AR, i
+                 	ror		j			; restore C
+                 	tst		ar			; set N,Z
+                 _ADC1:
+                 	SVSR
+                 	bst		avsr, avp	; get V flag
+                 	bld		avsr, atp	; move to T flag
+                 .endmacro
+                 
+                 .macro _AND
+                 	READZ
+                 	LDSR
+                 	and		ar, zl
+                 	SVSR
+                 .endmacro
+                 
+                 .macro _ANDZ
+                 	READZP
+                 	LDSR
+                 	and		ar, i
+                 	SVSR
+                 .endmacro
+                 	
+                 .macro _ASL
+                 	READ
+                 	LDSR
+                 	lsl		i
+                 	SVSR
+                 	WRITE
+                 .endmacro
+                 
+                 .macro _ASLZ
+                 	READZP
+                 	LDSR
+                 	lsl		i
+                 	SVSR
+                 	WRITEZP
+                 .endmacro
+                 
+                 .macro _BBR				; passed bit test byte as parameter
+                 	movw	zl, XL			;
+                 	adiw	XL, 0x02	; move PC to next instruction 
+                 	READ2				; i=zp addr, j= branch	
+                 	READZP
+                 	andi	i, @0		; test bit
+                 	brne	done
+                 
+                 	tst		j			; test for forward or backward
+                 	brmi	back
+                 	add		XL, j
+                 	adc		XH, zero
+                 	rjmp	done	
+                 back:
+                 	add		XL, j
+                 	brcs	done
+                 	dec		XH
+                 done:
+                 .endmacro
+                 
+                 .macro _BBS				; passed bit test byte as parameter
+                 	movw	zl, XL
+                 	adiw	XL, 0x02	; move PC to next instruction
+                 	READ2	
+                 	READZP
+                 	andi	i, @0		; test bit
+                 	breq	done
+                 	tst		j			; test for forward or backward
+                 	brmi	back
+                 	add		XL, j
+                 	adc		XH, zero
+                 	rjmp	done	
+                 back:
+                 	add		XL, j
+                 	brcs	done
+                 	dec		XH
+                 done:
+                 .endmacro
+                 
+                 .macro _BIT
+                 	READZ
+                 	mov		j, zl
+                 	LDSR
+                 	and		zl, ar
+                 	SVSR
+                 	bst		j, ssp
+                 	bld		avsr, anp
+                 	bst		j, sop
+                 	bld		avsr, atp	; V to T
+                 .endmacro
+                 
+                 .macro _BITZ
+                 	READZP
+                 	mov		j, i
+                 	LDSR
+                 	and		i, ar
+                 	SVSR
+                 	bst		j, ssp
+                 	bld		avsr, anp
+                 	bst		j, sop
+                 	bld		avsr, atp	; V to T
+                 .endmacro
+                 
+                 .macro _CMP
+                 	READZ
+                 	LDSR
+                 	cp		ar, zl
+                 	SVSR
+                 	eor		avsr, one	; toggle C bit
+                 .endmacro
+                 
+                 .macro _CMPZ
+                 	READZP
+                 	LDSR
+                 	cp		ar, i
+                 	SVSR
+                 	eor		avsr, one	; toggle C bit
+                 .endmacro
+                 
+                 .macro _CPX
+                 	READZ
+                 	LDSR
+                 	cp		xr, zl
+                 	SVSR
+                 	eor		avsr, one	; toggle C bit
+                 .endmacro
+                 
+                 .macro _CPXZ
+                 	READZP
+                 	LDSR
+                 	cp		xr, i
+                 	SVSR
+                 	eor		avsr, one	; toggle C bit
+                 .endmacro
+                 
+                 .macro _CPY
+                 	READZ
+                 	LDSR
+                 	cp		yr, zl
+                 	SVSR
+                 	eor		avsr, one	; toggle C bit
+                 .endmacro
+                 
+                 .macro _CPYZ
+                 	READZP
+                 	LDSR
+                 	cp		yr, i
+                 	SVSR
+                 	eor		avsr, one	; toggle C bit
+                 .endmacro
+                 
+                 .macro _DEC
+                 	READ
+                 	LDSR
+                 	dec		i
+                 	SVSR
+                 	WRITE
+                 .endmacro
+                 
+                 .macro _DECZ
+                 	READZP
+                 	LDSR
+                 	dec		i
+                 	SVSR
+                 	WRITEZP
+                 .endmacro
+                 
+                 
+                 .macro _EOR
+                 	READZ
+                 	LDSR
+                 	eor		ar, zl
+                 	SVSR
+                 .endmacro
+                 
+                 .macro _EORZ
+                 	READZP
+                 	LDSR
+                 	eor		ar, i
+                 	SVSR
+                 .endmacro
+                 
+                 .macro _INC
+                 	READ
+                 	LDSR
+                 	inc		i
+                 	SVSR
+                 	WRITE
+                 .endmacro
+                 
+                 .macro _INCZ
+                 	READZP
+                 	LDSR
+                 	inc		i
+                 	SVSR
+                 	WRITEZP
+                 .endmacro
+                 
+                 .macro _LDA
+                 	READZ
+                 	LDSR
+                 	mov		ar, zl
+                 	tst		ar
+                 	SVSR
+                 .endmacro
+                 
+                 .macro _LDAZ
+                 	READZP
+                 	LDSR
+                 	mov		ar, i
+                 	tst		ar
+                 	SVSR
+                 .endmacro
+                 
+                 .macro _LDX
+                 	READZ
+                 	LDSR
+                 	mov		xr, zl
+                 	tst		xr
+                 	SVSR
+                 .endmacro
+                 
+                 .macro _LDXZ
+                 	READZP
+                 	LDSR
+                 	mov		xr, i
+                 	tst		xr
+                 	SVSR
+                 .endmacro
+                 
+                 .macro _LDY
+                 	READZ
+                 	LDSR
+                 	mov		yr, zl
+                 	tst		yr
+                 	SVSR
+                 .endmacro
+                 
+                 .macro _LDYZ
+                 	READZP
+                 	LDSR
+                 	mov		yr, i
+                 	tst		yr
+                 	SVSR
+                 .endmacro
+                 
+                 .macro _LSR
+                 	READ
+                 	LDSR
+                 	lsr		i
+                 	SVSR
+                 	WRITE
+                 .endmacro
+                 
+                 .macro _LSRZ
+                 	READZP
+                 	LDSR
+                 	lsr		i
+                 	SVSR
+                 	WRITEZP
+                 .endmacro
+                 
+                 .macro _ORA
+                 	READZ
+                 	LDSR
+                 	or		ar, zl
+                 	SVSR
+                 .endmacro
+                 
+                 .macro _ORAZ
+                 	READZP
+                 	LDSR
+                 	or		ar, i
+                 	SVSR
+                 .endmacro
+                 
+                 .macro _RMB				; passed bit pos byte as parameter
+                 	movw	zl, XL
+                 	_ZPG
+                 	READZP
+                 	andi	i, @0		; reset bit
+                 	WRITEZP
+                 .endmacro
+                 
+                 .macro _ROL
+                 	READ
+                 	LDSR
+                 	rol		i
+                 	SVSR	
+                 	WRITE
+                 .endmacro
+                 
+                 .macro _ROLZ
+                 	READZP
+                 	LDSR
+                 	rol		i
+                 	SVSR	
+                 	WRITEZP
+                 .endmacro
+                 
+                 .macro _ROR
+                 	READ
+                 	LDSR
+                 	ror		i
+                 	SVSR
+                 	WRITE
+                 .endmacro
+                  
+                 .macro _RORZ
+                 	READZP
+                 	LDSR
+                 	ror		i
+                 	SVSR
+                 	WRITEZP
+                 .endmacro
+                  
+                 .macro _SBC
+                 	READZ
+                 	eor		avsr, one	; toggle C bit
+                 	LDSR
+                 	SEZ
+                 	sbc		ar, zl
+                 	sbrs	sr, sdp		; check decimal mode
+                 	rjmp	_SBC1
+                 	in		i, sreg
+                 sub_0:	
+                 	brhc	sub_1		; if half carry not clear
+                 	subi	ar, 0x06	;    LSD = LSD - 6
+                 sub_1:
+                 	sbrs	i, 0		; if previous carry not set
+                 	rjmp	sub_2		;    skip upper digit fix
+                 	subi	ar, 0x60	; subtract 6 from MSD
+                 	rol		i				; set carry in bit 0 of i
+                 	eor		i, one		; toggle C bit
+                 sub_2:
+                 	ror		i			; restore carry flag
+                 	tst		ar			; set N,V,Z
+                 _SBC1:
+                 	SVSR
+                 	bst		avsr, avp	; mov V flag
+                 	bld		avsr, atp	; to T flag
+                 	eor		avsr, one	; toggle C bit
+                 .endmacro
+                 
+                 .macro _SBCZ
+                 	READZP
+                 	eor		avsr, one	; toggle C bit
+                 	LDSR
+                 	SEZ
+                 	sbc		ar, i
+                 	sbrs	sr, sdp		; check decimal mode
+                 	rjmp	_SBC1
+                 	in		i, sreg
+                 sub_0:
+                 	brhc	sub_1		; if half carry not clear
+                 	subi	ar, 0x06	;    LSD = LSD - 6
+                 sub_1:
+                 	sbrs	i, 0		; if previous carry not set
+                 	rjmp	sub_2		;    skip upper digit fix
+                 	subi	ar, 0x60	; subtract 6 from MSD
+                 	rol		i			; set carry in bit 0 of i
+                 	eor		i, one		; toggle C bit
+                 sub_2:
+                 	ror		i			; restore carry flag
+                 	tst		ar			; set N,V,Z
+                 _SBC1:
+                 	SVSR
+                 	bst		avsr, avp	; mov V flag
+                 	bld		avsr, atp	; to T flag
+                 	eor		avsr, one	; toggle C bit
+                 .endmacro
+                 
+                 .macro _SMB				; passed bit pos byte as parameter
+                 	movw	zl, XL
+                 	_ZPG
+                 	READZP
+                 	ori		i, @0		; set bit
+                 	WRITEZP
+                 .endmacro
+                 
+                 .macro _STA
+                 	mov		i, ar
+                 	WRITE
+                 .endmacro
+                 
+                 .macro _STAZ
+                 	mov		i, ar
+                 	ldi		ZH, ZP
+                 	WRITEZP
+                 .endmacro
+                 
+                 .macro _STP
+                 .endmacro
+                 
+                 .macro _STX
+                 	mov		i, xr
+                 	WRITE
+                 .endmacro
+                 
+                 .macro _STXZ
+                 	mov		i, xr
+                 	ldi		ZH, ZP
+                 	WRITEZP
+                 .endmacro
+                 
+                 .macro _STY
+                 	mov		i, yr
+                 	WRITE
+                 .endmacro
+                 
+                 .macro _STYZ
+                 	mov		i, yr
+                 	ldi		ZH, ZP
+                 	WRITEZP
+                 .endmacro
+                 
+                 .macro _STZ
+                 	ldi		i, 0x00
+                 	WRITE
+                 .endmacro
+                 
+                 .macro _STZZ
+                 	ldi		i, 0x00
+                 	ldi		ZH, ZP
+                 	WRITEZP
+                 .endmacro
+                 
+                 .macro _TRB
+                 	READ
+                 	cbr		avsr, az	; Z
+                 	mov		j, ar
+                 	and		j, i
+                 	brne	fin
+                 	ori		avsr, az	; Z set
+                 fin:
+                 	mov		j, ar
+                 	com		j
+                 	and		i, j
+                 	WRITE
+                 .endmacro
+                 
+                 .macro _TRBZ
+                 	READZP
+                 	cbr		avsr, az	; Z
+                 	mov		j, ar
+                 	and		j, i
+                 	brne	fin
+                 	ori		avsr, az	; Z set
+                 fin:
+                 	mov		j, ar
+                 	com		j
+                 	and		i, j
+                 	WRITEZP
+                 .endmacro
+                 
+                 .macro _TSB
+                 	READ
+                 	cbr		avsr, az	; Z
+                 	mov		j, ar
+                 	and		j, i
+                 	brne	fin
+                 	ori		avsr, az	; Z set
+                 fin:
+                 	or		i, ar
+                 	WRITE
+                 .endmacro
+                 
+                 .macro _TSBZ
+                 	READZP
+                 	cbr		avsr, az	; Z
+                 	mov		j, ar
+                 	and		j, i
+                 	brne	fin
+                 	ori		avsr, az	; Z set
+                 fin:
+                 	or		i, ar
+                 	WRITEZP
+                 .endmacro
+                 
+                 .macro _WAI
+                 .endmacro
+                 
+                 ;**********************
+                 ; Opcode execute code
+                 ;**********************
+                 
+                 _INV:
+00804a fc50
+00804b d00f
+00804c 01fd
+00804d 9611
+00804e 15f4
+00804f f028
+008050 91e4
+008051 e1fd
+008052 0fee
+008053 1df2
+008054 9409
+008055 95f3
+008056 81e0
+008057 e1fd
+008058 0fee
+008059 1df2
+00805a 9409
+00805b 940c a702 	EXEC
+                 
+                 _INV2:
+00805d 9611      	adiw	XL, 1
+00805e fc50
+00805f d00f
+008060 01fd
+008061 9611
+008062 15f4
+008063 f028
+008064 91e4
+008065 e1fd
+008066 0fee
+008067 1df2
+008068 9409
+008069 95f3
+00806a 81e0
+00806b e1fd
+00806c 0fee
+00806d 1df2
+00806e 9409
+00806f 940c a702 	EXEC
+                 
+                 _INV3:
+008071 9612      	adiw	XL, 2
+008072 fc50
+008073 d00f
+008074 01fd
+008075 9611
+008076 15f4
+008077 f028
+008078 91e4
+008079 e1fd
+00807a 0fee
+00807b 1df2
+00807c 9409
+00807d 95f3
+00807e 81e0
+00807f e1fd
+008080 0fee
+008081 1df2
+008082 9409
+008083 940c a702 	EXEC
+                 
+                 _BRK_IMP:				;00
+008085 9611      	adiw	XL, 1
+008086 83b8      	st		Y, XH
+008087 95ca      	dec		yl
+008088 83a8      	st		Y, XL
+008089 95ca      	dec		yl
+00808a 2fe4
+00808b e3f6
+00808c 9104
+00808d 733c
+00808e 2b30      	AV2SR
+00808f 6130      	ori		sr, sb		; brk bit
+008090 8338      	st		Y, sr
+008091 95ca       	dec		yl
+008092 7e37      	andi	sr, ss+so+sx+si+sz+sc	; clr D & B
+008093 6034      	ori		sr, si		; set I
+008094 efee      	ldi		ZL, 0xfe
+008095 efff      	ldi		ZH, 0xff
+008096 91a5      	lpm		XL, Z+
+008097 91b4      	lpm		XH, Z
+008098 fc50
+008099 d00f
+00809a 01fd
+00809b 9611
+00809c 15f4
+00809d f028
+00809e 91e4
+00809f e1fd
+0080a0 0fee
+0080a1 1df2
+0080a2 9409
+0080a3 95f3
+0080a4 81e0
+0080a5 e1fd
+0080a6 0fee
+0080a7 1df2
+0080a8 9409
+0080a9 940c a702 	EXEC
+                 
+                 _ORA_INDX:				;01
+0080ab 01fd      	movw	zl, XL
+0080ac 15f4
+0080ad f019
+0080ae f040
+0080af 91e4
+0080b0 c008
+0080b1 32e0
+0080b2 f010
+0080b3 e0f0
+0080b4 c003
+0080b5 2fe5
+0080b6 c002
+0080b7 95f3
+0080b8 81e0
+0080b9 0dee
+0080ba e0f1
+0080bb 8100
+0080bc 95e3
+0080bd 8110
+0080be 01f8
+0080bf 9611      	_INDX
+0080c0 15f4
+0080c1 f019
+0080c2 f040
+0080c3 91e4
+0080c4 c008
+0080c5 32e0
+0080c6 f010
+0080c7 e0f0
+0080c8 c003
+0080c9 2fe5
+0080ca c002
+0080cb 95f3
+0080cc 81e0
+0080cd bf4f
+0080ce 2b2e
+0080cf b74f      	_ORA
+0080d0 fc50
+0080d1 d00f
+0080d2 01fd
+0080d3 9611
+0080d4 15f4
+0080d5 f028
+0080d6 91e4
+0080d7 e1fd
+0080d8 0fee
+0080d9 1df2
+0080da 9409
+0080db 95f3
+0080dc 81e0
+0080dd e1fd
+0080de 0fee
+0080df 1df2
+0080e0 9409
+0080e1 940c a702 	EXEC
+                 
+                 _TSB_ZPG:				;04
+0080e3 01fd      	movw	zl, XL
+0080e4 15f4
+0080e5 f019
+0080e6 f040
+0080e7 91e4
+0080e8 c008
+0080e9 32e0
+0080ea f010
+0080eb e0f0
+0080ec c003
+0080ed 2fe5
+0080ee c002
+0080ef 95f3
+0080f0 81e0
+0080f1 9611      	_ZPG 
+0080f2 e0f1
+0080f3 8100
+0080f4 7f4d
+0080f5 2f12
+0080f6 2310
+0080f7 f409
+0080f8 6042
+0080f9 2b02
+0080fa 8300      	_TSBZ
+0080fb fc50
+0080fc d00f
+0080fd 01fd
+0080fe 9611
+0080ff 15f4
+008100 f028
+008101 91e4
+008102 e1fd
+008103 0fee
+008104 1df2
+008105 9409
+008106 95f3
+008107 81e0
+008108 e1fd
+008109 0fee
+00810a 1df2
+00810b 9409
+00810c 940c a702 	EXEC
+                 
+                 _ORA_ZPG:				;05
+00810e 01fd      	movw	zl, XL
+00810f 15f4
+008110 f019
+008111 f040
+008112 91e4
+008113 c008
+008114 32e0
+008115 f010
+008116 e0f0
+008117 c003
+008118 2fe5
+008119 c002
+00811a 95f3
+00811b 81e0
+00811c 9611      	_ZPG 
+00811d e0f1
+00811e 8100
+00811f bf4f
+008120 2b20
+008121 b74f      	_ORAZ
+008122 fc50
+008123 d00f
+008124 01fd
+008125 9611
+008126 15f4
+008127 f028
+008128 91e4
+008129 e1fd
+00812a 0fee
+00812b 1df2
+00812c 9409
+00812d 95f3
+00812e 81e0
+00812f e1fd
+008130 0fee
+008131 1df2
+008132 9409
+008133 940c a702 	EXEC
+                 
+                 _ASL_ZPG:				;06
+008135 01fd      	movw	zl, XL
+008136 15f4
+008137 f019
+008138 f040
+008139 91e4
+00813a c008
+00813b 32e0
+00813c f010
+00813d e0f0
+00813e c003
+00813f 2fe5
+008140 c002
+008141 95f3
+008142 81e0
+008143 9611      	_ZPG 
+008144 e0f1
+008145 8100
+008146 bf4f
+008147 0f00
+008148 b74f
+008149 8300      	_ASLZ
+00814a fc50
+00814b d00f
+00814c 01fd
+00814d 9611
+00814e 15f4
+00814f f028
+008150 91e4
+008151 e1fd
+008152 0fee
+008153 1df2
+008154 9409
+008155 95f3
+008156 81e0
+008157 e1fd
+008158 0fee
+008159 1df2
+00815a 9409
+00815b 940c a702 	EXEC
+                 
+                 _RMB0_ZPG:				;07
+00815d 01fd
+00815e 15f4
+00815f f019
+008160 f040
+008161 91e4
+008162 c008
+008163 32e0
+008164 f010
+008165 e0f0
+008166 c003
+008167 2fe5
+008168 c002
+008169 95f3
+00816a 81e0
+00816b 9611
+00816c e0f1
+00816d 8100
+00816e 7f0e
+00816f 8300      	_RMB	0xFE
+008170 fc50
+008171 d00f
+008172 01fd
+008173 9611
+008174 15f4
+008175 f028
+008176 91e4
+008177 e1fd
+008178 0fee
+008179 1df2
+00817a 9409
+00817b 95f3
+00817c 81e0
+00817d e1fd
+00817e 0fee
+00817f 1df2
+008180 9409
+008181 940c a702 	EXEC
+                 
+                 _PHP_IMP:				;08
+008183 2fe4
+008184 e3f6
+008185 9104
+008186 733c
+008187 2b30      	AV2SR
+008188 8338      	st		Y, sr
+008189 95ca      	dec		yl
+00818a fc50
+00818b d00f
+00818c 01fd
+00818d 9611
+00818e 15f4
+00818f f028
+008190 91e4
+008191 e1fd
+008192 0fee
+008193 1df2
+008194 9409
+008195 95f3
+008196 81e0
+008197 e1fd
+008198 0fee
+008199 1df2
+00819a 9409
+00819b 940c a702 	EXEC
+                 
+                 _ORA_IMM:				;09
+00819d 01fd      	movw	zl, XL
+00819e 9611      	_IMM 
+00819f 15f4
+0081a0 f019
+0081a1 f040
+0081a2 91e4
+0081a3 c008
+0081a4 32e0
+0081a5 f010
+0081a6 e0f0
+0081a7 c003
+0081a8 2fe5
+0081a9 c002
+0081aa 95f3
+0081ab 81e0
+0081ac bf4f
+0081ad 2b2e
+0081ae b74f      	_ORA
+0081af fc50
+0081b0 d00f
+0081b1 01fd
+0081b2 9611
+0081b3 15f4
+0081b4 f028
+0081b5 91e4
+0081b6 e1fd
+0081b7 0fee
+0081b8 1df2
+0081b9 9409
+0081ba 95f3
+0081bb 81e0
+0081bc e1fd
+0081bd 0fee
+0081be 1df2
+0081bf 9409
+0081c0 940c a702 	EXEC
+                 
+                 _ASL_IMP:				;0A
+0081c2 bf4f      	LDSR
+0081c3 0f22      	lsl		ar
+0081c4 b74f      	SVSR
+0081c5 fc50
+0081c6 d00f
+0081c7 01fd
+0081c8 9611
+0081c9 15f4
+0081ca f028
+0081cb 91e4
+0081cc e1fd
+0081cd 0fee
+0081ce 1df2
+0081cf 9409
+0081d0 95f3
+0081d1 81e0
+0081d2 e1fd
+0081d3 0fee
+0081d4 1df2
+0081d5 9409
+0081d6 940c a702 	EXEC
+                 
+                 _TSB_ABS:				;0C
+0081d8 01fd      	movw	zl, XL
+0081d9 15f4
+0081da f021
+0081db f048
+0081dc 9105
+0081dd 9114
+0081de c009
+0081df 32e0
+0081e0 f418
+0081e1 2f05
+0081e2 2d12
+0081e3 c004
+0081e4 efff
+0081e5 95f3
+0081e6 9101
+0081e7 8110
+0081e8 01f8
+0081e9 9612      	_ABS 
+0081ea 15f4
+0081eb f019
+0081ec f050
+0081ed 9104
+0081ee c00b
+0081ef 32e0
+0081f0 f020
+0081f1 e0f0
+0081f2 8100
+0081f3 2df4
+0081f4 c005
+0081f5 2f05
+0081f6 c003
+0081f7 95f3
+0081f8 8100
+0081f9 95fa
+0081fa 7f4d
+0081fb 2f12
+0081fc 2310
+0081fd f409
+0081fe 6042
+0081ff 2b02
+008200 15f4
+008201 f021
+008202 f468
+008203 95f3
+008204 8300
+008205 c00a
+008206 32e0
+008207 f430
+008208 b30e
+008209 350a
+00820a f429
+00820b 9afa
+00820c 9af9
+00820d c002
+00820e 27ff
+00820f 8300      	_TSB
+008210 fc50
+008211 d00f
+008212 01fd
+008213 9611
+008214 15f4
+008215 f028
+008216 91e4
+008217 e1fd
+008218 0fee
+008219 1df2
+00821a 9409
+00821b 95f3
+00821c 81e0
+00821d e1fd
+00821e 0fee
+00821f 1df2
+008220 9409
+008221 940c a702 	EXEC
+                 
+                 _ORA_ABS:				;0D
+008223 01fd      	movw	zl, XL
+008224 15f4
+008225 f021
+008226 f048
+008227 9105
+008228 9114
+008229 c009
+00822a 32e0
+00822b f418
+00822c 2f05
+00822d 2d12
+00822e c004
+00822f efff
+008230 95f3
+008231 9101
+008232 8110
+008233 01f8
+008234 9612      	_ABS 
+008235 15f4
+008236 f019
+008237 f040
+008238 91e4
+008239 c008
+00823a 32e0
+00823b f010
+00823c e0f0
+00823d c003
+00823e 2fe5
+00823f c002
+008240 95f3
+008241 81e0
+008242 bf4f
+008243 2b2e
+008244 b74f      	_ORA
+008245 fc50
+008246 d00f
+008247 01fd
+008248 9611
+008249 15f4
+00824a f028
+00824b 91e4
+00824c e1fd
+00824d 0fee
+00824e 1df2
+00824f 9409
+008250 95f3
+008251 81e0
+008252 e1fd
+008253 0fee
+008254 1df2
+008255 9409
+008256 940c a702 	EXEC
+                 
+                 _ASL_ABS:				;0E
+008258 01fd      	movw	zl, XL
+008259 15f4
+00825a f021
+00825b f048
+00825c 9105
+00825d 9114
+00825e c009
+00825f 32e0
+008260 f418
+008261 2f05
+008262 2d12
+008263 c004
+008264 efff
+008265 95f3
+008266 9101
+008267 8110
+008268 01f8
+008269 9612      	_ABS 
+00826a 15f4
+00826b f019
+00826c f050
+00826d 9104
+00826e c00b
+00826f 32e0
+008270 f020
+008271 e0f0
+008272 8100
+008273 2df4
+008274 c005
+008275 2f05
+008276 c003
+008277 95f3
+008278 8100
+008279 95fa
+00827a bf4f
+00827b 0f00
+00827c b74f
+00827d 15f4
+00827e f021
+00827f f468
+008280 95f3
+008281 8300
+008282 c00a
+008283 32e0
+008284 f430
+008285 b30e
+008286 350a
+008287 f429
+008288 9afa
+008289 9af9
+00828a c002
+00828b 27ff
+00828c 8300      	_ASL
+00828d fc50
+00828e d00f
+00828f 01fd
+008290 9611
+008291 15f4
+008292 f028
+008293 91e4
+008294 e1fd
+008295 0fee
+008296 1df2
+008297 9409
+008298 95f3
+008299 81e0
+00829a e1fd
+00829b 0fee
+00829c 1df2
+00829d 9409
+00829e 940c a702 	EXEC
+                 
+                 _BBR0_REL:				;0F
+0082a0 01fd
+0082a1 9612
+0082a2 15f4
+0082a3 f021
+0082a4 f048
+0082a5 9105
+0082a6 9114
+0082a7 c009
+0082a8 32e0
+0082a9 f418
+0082aa 2f05
+0082ab 2d12
+0082ac c004
+0082ad efff
+0082ae 95f3
+0082af 9101
+0082b0 8110
+0082b1 01f8
+0082b2 e0f1
+0082b3 8100
+0082b4 7001
+0082b5 f441
+0082b6 2311
+0082b7 f01a
+0082b8 0fa1
+0082b9 1db2
+0082ba c003
+0082bb 0fa1
+0082bc f008
+0082bd 95ba      	_BBR 0x01
+0082be fc50
+0082bf d00f
+0082c0 01fd
+0082c1 9611
+0082c2 15f4
+0082c3 f028
+0082c4 91e4
+0082c5 e1fd
+0082c6 0fee
+0082c7 1df2
+0082c8 9409
+0082c9 95f3
+0082ca 81e0
+0082cb e1fd
+0082cc 0fee
+0082cd 1df2
+0082ce 9409
+0082cf 940c a702 	EXEC
+                 
+                 _BPL_REL:				;10
+0082d1 fd42      	sbrc	avsr, anp
+0082d2 c02a      	rjmp	_BPL1
+0082d3 01fd
+0082d4 15f4
+0082d5 f019
+0082d6 f040
+0082d7 91e4
+0082d8 c008
+0082d9 32e0
+0082da f010
+0082db e0f0
+0082dc c003
+0082dd 2fe5
+0082de c002
+0082df 95f3
+0082e0 81e0
+0082e1 9408
+0082e2 23ee
+0082e3 f01a
+0082e4 1fae
+0082e5 1db2
+0082e6 c003
+0082e7 1fae
+0082e8 f008
+0082e9 95ba      	_REL
+0082ea fc50
+0082eb d00f
+0082ec 01fd
+0082ed 9611
+0082ee 15f4
+0082ef f028
+0082f0 91e4
+0082f1 e1fd
+0082f2 0fee
+0082f3 1df2
+0082f4 9409
+0082f5 95f3
+0082f6 81e0
+0082f7 e1fd
+0082f8 0fee
+0082f9 1df2
+0082fa 9409
+0082fb 940c a702 	EXEC
+                 _BPL1:
+0082fd 9611      	adiw	xl, 1
+0082fe fc50
+0082ff d00f
+008300 01fd
+008301 9611
+008302 15f4
+008303 f028
+008304 91e4
+008305 e1fd
+008306 0fee
+008307 1df2
+008308 9409
+008309 95f3
+00830a 81e0
+00830b e1fd
+00830c 0fee
+00830d 1df2
+00830e 9409
+00830f 940c a702 	EXEC
+                 
+                 _ORA_INDY:				;11
+008311 01fd      	movw	zl, XL
+008312 15f4
+008313 f019
+008314 f040
+008315 91e4
+008316 c008
+008317 32e0
+008318 f010
+008319 e0f0
+00831a c003
+00831b 2fe5
+00831c c002
+00831d 95f3
+00831e 81e0
+00831f e0f1
+008320 8100
+008321 95e3
+008322 8110
+008323 01f8
+008324 0def
+008325 1df2
+008326 9611      	_INDY 
+008327 15f4
+008328 f019
+008329 f040
+00832a 91e4
+00832b c008
+00832c 32e0
+00832d f010
+00832e e0f0
+00832f c003
+008330 2fe5
+008331 c002
+008332 95f3
+008333 81e0
+008334 bf4f
+008335 2b2e
+008336 b74f      	_ORA
+008337 fc50
+008338 d00f
+008339 01fd
+00833a 9611
+00833b 15f4
+00833c f028
+00833d 91e4
+00833e e1fd
+00833f 0fee
+008340 1df2
+008341 9409
+008342 95f3
+008343 81e0
+008344 e1fd
+008345 0fee
+008346 1df2
+008347 9409
+008348 940c a702 	EXEC
+                 
+                 _ORA_IND:				;12
+00834a 01fd      	movw	zl, XL
+00834b 15f4
+00834c f019
+00834d f040
+00834e 91e4
+00834f c008
+008350 32e0
+008351 f010
+008352 e0f0
+008353 c003
+008354 2fe5
+008355 c002
+008356 95f3
+008357 81e0
+008358 e0f1
+008359 8100
+00835a 95e3
+00835b 8110
+00835c 01f8
+00835d 9611      	_IZPG 
+00835e 15f4
+00835f f019
+008360 f040
+008361 91e4
+008362 c008
+008363 32e0
+008364 f010
+008365 e0f0
+008366 c003
+008367 2fe5
+008368 c002
+008369 95f3
+00836a 81e0
+00836b bf4f
+00836c 2b2e
+00836d b74f      	_ORA
+00836e fc50
+00836f d00f
+008370 01fd
+008371 9611
+008372 15f4
+008373 f028
+008374 91e4
+008375 e1fd
+008376 0fee
+008377 1df2
+008378 9409
+008379 95f3
+00837a 81e0
+00837b e1fd
+00837c 0fee
+00837d 1df2
+00837e 9409
+00837f 940c a702 	EXEC
+                 
+                 _TRB_ZPG:				;14
+008381 01fd      	movw	zl, XL
+008382 15f4
+008383 f019
+008384 f040
+008385 91e4
+008386 c008
+008387 32e0
+008388 f010
+008389 e0f0
+00838a c003
+00838b 2fe5
+00838c c002
+00838d 95f3
+00838e 81e0
+00838f 9611      	_ZPG 
+008390 e0f1
+008391 8100
+008392 7f4d
+008393 2f12
+008394 2310
+008395 f409
+008396 6042
+008397 2f12
+008398 9510
+008399 2301
+00839a 8300      	_TRBZ
+00839b fc50
+00839c d00f
+00839d 01fd
+00839e 9611
+00839f 15f4
+0083a0 f028
+0083a1 91e4
+0083a2 e1fd
+0083a3 0fee
+0083a4 1df2
+0083a5 9409
+0083a6 95f3
+0083a7 81e0
+0083a8 e1fd
+0083a9 0fee
+0083aa 1df2
+0083ab 9409
+0083ac 940c a702 	EXEC
+                 
+                 _ORA_ZPGX:				;15
+0083ae 01fd      	movw	zl, XL
+0083af 15f4
+0083b0 f019
+0083b1 f040
+0083b2 91e4
+0083b3 c008
+0083b4 32e0
+0083b5 f010
+0083b6 e0f0
+0083b7 c003
+0083b8 2fe5
+0083b9 c002
+0083ba 95f3
+0083bb 81e0
+0083bc 0dee
+0083bd 9611      	_ZPGX 
+0083be e0f1
+0083bf 8100
+0083c0 bf4f
+0083c1 2b20
+0083c2 b74f      	_ORAZ
+0083c3 fc50
+0083c4 d00f
+0083c5 01fd
+0083c6 9611
+0083c7 15f4
+0083c8 f028
+0083c9 91e4
+0083ca e1fd
+0083cb 0fee
+0083cc 1df2
+0083cd 9409
+0083ce 95f3
+0083cf 81e0
+0083d0 e1fd
+0083d1 0fee
+0083d2 1df2
+0083d3 9409
+0083d4 940c a702 	EXEC
+                 
+                 _ASL_ZPGX:				;16
+0083d6 01fd      	movw	zl, XL
+0083d7 15f4
+0083d8 f019
+0083d9 f040
+0083da 91e4
+0083db c008
+0083dc 32e0
+0083dd f010
+0083de e0f0
+0083df c003
+0083e0 2fe5
+0083e1 c002
+0083e2 95f3
+0083e3 81e0
+0083e4 0dee
+0083e5 9611      	_ZPGX 
+0083e6 e0f1
+0083e7 8100
+0083e8 bf4f
+0083e9 0f00
+0083ea b74f
+0083eb 8300      	_ASLZ
+0083ec fc50
+0083ed d00f
+0083ee 01fd
+0083ef 9611
+0083f0 15f4
+0083f1 f028
+0083f2 91e4
+0083f3 e1fd
+0083f4 0fee
+0083f5 1df2
+0083f6 9409
+0083f7 95f3
+0083f8 81e0
+0083f9 e1fd
+0083fa 0fee
+0083fb 1df2
+0083fc 9409
+0083fd 940c a702 	EXEC
+                 
+                 _RMB1_ZPG:				;17
+0083ff 01fd
+008400 15f4
+008401 f019
+008402 f040
+008403 91e4
+008404 c008
+008405 32e0
+008406 f010
+008407 e0f0
+008408 c003
+008409 2fe5
+00840a c002
+00840b 95f3
+00840c 81e0
+00840d 9611
+00840e e0f1
+00840f 8100
+008410 7f0d
+008411 8300      	_RMB	0xFD
+008412 fc50
+008413 d00f
+008414 01fd
+008415 9611
+008416 15f4
+008417 f028
+008418 91e4
+008419 e1fd
+00841a 0fee
+00841b 1df2
+00841c 9409
+00841d 95f3
+00841e 81e0
+00841f e1fd
+008420 0fee
+008421 1df2
+008422 9409
+008423 940c a702 	EXEC
+                 
+                 _CLC_IMP:				;18
+008425 7f4e      	cbr		avsr, ac
+008426 fc50
+008427 d00f
+008428 01fd
+008429 9611
+00842a 15f4
+00842b f028
+00842c 91e4
+00842d e1fd
+00842e 0fee
+00842f 1df2
+008430 9409
+008431 95f3
+008432 81e0
+008433 e1fd
+008434 0fee
+008435 1df2
+008436 9409
+008437 940c a702 	EXEC
+                 
+                 _ORA_ABSY:				;19
+008439 01fd      	movw	zl, XL
+00843a 15f4
+00843b f021
+00843c f048
+00843d 9105
+00843e 9114
+00843f c009
+008440 32e0
+008441 f418
+008442 2f05
+008443 2d12
+008444 c004
+008445 efff
+008446 95f3
+008447 9101
+008448 8110
+008449 01f8
+00844a 0def
+00844b 1df2
+00844c 9612      	_ABSY 
+00844d 15f4
+00844e f019
+00844f f040
+008450 91e4
+008451 c008
+008452 32e0
+008453 f010
+008454 e0f0
+008455 c003
+008456 2fe5
+008457 c002
+008458 95f3
+008459 81e0
+00845a bf4f
+00845b 2b2e
+00845c b74f      	_ORA
+00845d fc50
+00845e d00f
+00845f 01fd
+008460 9611
+008461 15f4
+008462 f028
+008463 91e4
+008464 e1fd
+008465 0fee
+008466 1df2
+008467 9409
+008468 95f3
+008469 81e0
+00846a e1fd
+00846b 0fee
+00846c 1df2
+00846d 9409
+00846e 940c a702 	EXEC
+                 
+                 _INC_IMP:				;1A
+008470 bf4f      	LDSR
+008471 9523      	inc		ar
+008472 b74f      	SVSR
+008473 fc50
+008474 d00f
+008475 01fd
+008476 9611
+008477 15f4
+008478 f028
+008479 91e4
+00847a e1fd
+00847b 0fee
+00847c 1df2
+00847d 9409
+00847e 95f3
+00847f 81e0
+008480 e1fd
+008481 0fee
+008482 1df2
+008483 9409
+008484 940c a702 	EXEC
+                 
+                 _TRB_ABS:				;1C
+008486 01fd      	movw	zl, XL
+008487 15f4
+008488 f021
+008489 f048
+00848a 9105
+00848b 9114
+00848c c009
+00848d 32e0
+00848e f418
+00848f 2f05
+008490 2d12
+008491 c004
+008492 efff
+008493 95f3
+008494 9101
+008495 8110
+008496 01f8
+008497 9612      	_ABS 
+008498 15f4
+008499 f019
+00849a f050
+00849b 9104
+00849c c00b
+00849d 32e0
+00849e f020
+00849f e0f0
+0084a0 8100
+0084a1 2df4
+0084a2 c005
+0084a3 2f05
+0084a4 c003
+0084a5 95f3
+0084a6 8100
+0084a7 95fa
+0084a8 7f4d
+0084a9 2f12
+0084aa 2310
+0084ab f409
+0084ac 6042
+0084ad 2f12
+0084ae 9510
+0084af 2301
+0084b0 15f4
+0084b1 f021
+0084b2 f468
+0084b3 95f3
+0084b4 8300
+0084b5 c00a
+0084b6 32e0
+0084b7 f430
+0084b8 b30e
+0084b9 350a
+0084ba f429
+0084bb 9afa
+0084bc 9af9
+0084bd c002
+0084be 27ff
+0084bf 8300      	_TRB
+0084c0 fc50
+0084c1 d00f
+0084c2 01fd
+0084c3 9611
+0084c4 15f4
+0084c5 f028
+0084c6 91e4
+0084c7 e1fd
+0084c8 0fee
+0084c9 1df2
+0084ca 9409
+0084cb 95f3
+0084cc 81e0
+0084cd e1fd
+0084ce 0fee
+0084cf 1df2
+0084d0 9409
+0084d1 940c a702 	EXEC
+                 
+                 _ORA_ABSX:				;1D
+0084d3 01fd      	movw	zl, XL
+0084d4 15f4
+0084d5 f021
+0084d6 f048
+0084d7 9105
+0084d8 9114
+0084d9 c009
+0084da 32e0
+0084db f418
+0084dc 2f05
+0084dd 2d12
+0084de c004
+0084df efff
+0084e0 95f3
+0084e1 9101
+0084e2 8110
+0084e3 01f8
+0084e4 0dee
+0084e5 1df2
+0084e6 9612      	_ABSX 
+0084e7 15f4
+0084e8 f019
+0084e9 f040
+0084ea 91e4
+0084eb c008
+0084ec 32e0
+0084ed f010
+0084ee e0f0
+0084ef c003
+0084f0 2fe5
+0084f1 c002
+0084f2 95f3
+0084f3 81e0
+0084f4 bf4f
+0084f5 2b2e
+0084f6 b74f      	_ORA
+0084f7 fc50
+0084f8 d00f
+0084f9 01fd
+0084fa 9611
+0084fb 15f4
+0084fc f028
+0084fd 91e4
+0084fe e1fd
+0084ff 0fee
+008500 1df2
+008501 9409
+008502 95f3
+008503 81e0
+008504 e1fd
+008505 0fee
+008506 1df2
+008507 9409
+008508 940c a702 	EXEC
+                 
+                 _ASL_ABSX:				;1E
+00850a 01fd      	movw	zl, XL
+00850b 15f4
+00850c f021
+00850d f048
+00850e 9105
+00850f 9114
+008510 c009
+008511 32e0
+008512 f418
+008513 2f05
+008514 2d12
+008515 c004
+008516 efff
+008517 95f3
+008518 9101
+008519 8110
+00851a 01f8
+00851b 0dee
+00851c 1df2
+00851d 9612      	_ABSX 
+00851e 15f4
+00851f f019
+008520 f050
+008521 9104
+008522 c00b
+008523 32e0
+008524 f020
+008525 e0f0
+008526 8100
+008527 2df4
+008528 c005
+008529 2f05
+00852a c003
+00852b 95f3
+00852c 8100
+00852d 95fa
+00852e bf4f
+00852f 0f00
+008530 b74f
+008531 15f4
+008532 f021
+008533 f468
+008534 95f3
+008535 8300
+008536 c00a
+008537 32e0
+008538 f430
+008539 b30e
+00853a 350a
+00853b f429
+00853c 9afa
+00853d 9af9
+00853e c002
+00853f 27ff
+008540 8300      	_ASL
+008541 fc50
+008542 d00f
+008543 01fd
+008544 9611
+008545 15f4
+008546 f028
+008547 91e4
+008548 e1fd
+008549 0fee
+00854a 1df2
+00854b 9409
+00854c 95f3
+00854d 81e0
+00854e e1fd
+00854f 0fee
+008550 1df2
+008551 9409
+008552 940c a702 	EXEC
+                 
+                 _BBR1_REL:				;1F
+008554 01fd
+008555 9612
+008556 15f4
+008557 f021
+008558 f048
+008559 9105
+00855a 9114
+00855b c009
+00855c 32e0
+00855d f418
+00855e 2f05
+00855f 2d12
+008560 c004
+008561 efff
+008562 95f3
+008563 9101
+008564 8110
+008565 01f8
+008566 e0f1
+008567 8100
+008568 7002
+008569 f441
+00856a 2311
+00856b f01a
+00856c 0fa1
+00856d 1db2
+00856e c003
+00856f 0fa1
+008570 f008
+008571 95ba      	_BBR 0x02
+008572 fc50
+008573 d00f
+008574 01fd
+008575 9611
+008576 15f4
+008577 f028
+008578 91e4
+008579 e1fd
+00857a 0fee
+00857b 1df2
+00857c 9409
+00857d 95f3
+00857e 81e0
+00857f e1fd
+008580 0fee
+008581 1df2
+008582 9409
+008583 940c a702 	EXEC
+                 
+                 _JSR_ABS:				;20
+008585 01fd      	movw	zl, XL
+008586 15f4
+008587 f021
+008588 f048
+008589 9105
+00858a 9114
+00858b c009
+00858c 32e0
+00858d f418
+00858e 2f05
+00858f 2d12
+008590 c004
+008591 efff
+008592 95f3
+008593 9101
+008594 8110
+008595 01f8      	READ2
+008596 9611      	adiw	XL, 0x01
+008597 83b8      	st		Y, XH
+008598 95ca      	dec		yl
+008599 83a8      	st		Y, XL
+00859a 95ca      	dec		yl
+00859b 01d8      	movw	XL, i
+00859c fc50
+00859d d00f
+00859e 01fd
+00859f 9611
+0085a0 15f4
+0085a1 f028
+0085a2 91e4
+0085a3 e1fd
+0085a4 0fee
+0085a5 1df2
+0085a6 9409
+0085a7 95f3
+0085a8 81e0
+0085a9 e1fd
+0085aa 0fee
+0085ab 1df2
+0085ac 9409
+0085ad 940c a702 	EXEC
+                 
+                 _AND_INDX:				;21
+0085af 01fd      	movw	zl, XL
+0085b0 15f4
+0085b1 f019
+0085b2 f040
+0085b3 91e4
+0085b4 c008
+0085b5 32e0
+0085b6 f010
+0085b7 e0f0
+0085b8 c003
+0085b9 2fe5
+0085ba c002
+0085bb 95f3
+0085bc 81e0
+0085bd 0dee
+0085be e0f1
+0085bf 8100
+0085c0 95e3
+0085c1 8110
+0085c2 01f8
+0085c3 9611      	_INDX 
+0085c4 15f4
+0085c5 f019
+0085c6 f040
+0085c7 91e4
+0085c8 c008
+0085c9 32e0
+0085ca f010
+0085cb e0f0
+0085cc c003
+0085cd 2fe5
+0085ce c002
+0085cf 95f3
+0085d0 81e0
+0085d1 bf4f
+0085d2 232e
+0085d3 b74f      	_AND
+0085d4 fc50
+0085d5 d00f
+0085d6 01fd
+0085d7 9611
+0085d8 15f4
+0085d9 f028
+0085da 91e4
+0085db e1fd
+0085dc 0fee
+0085dd 1df2
+0085de 9409
+0085df 95f3
+0085e0 81e0
+0085e1 e1fd
+0085e2 0fee
+0085e3 1df2
+0085e4 9409
+0085e5 940c a702 	EXEC
+                 
+                 _BIT_ZPG:				;24
+0085e7 01fd      	movw	zl, XL
+0085e8 15f4
+0085e9 f019
+0085ea f040
+0085eb 91e4
+0085ec c008
+0085ed 32e0
+0085ee f010
+0085ef e0f0
+0085f0 c003
+0085f1 2fe5
+0085f2 c002
+0085f3 95f3
+0085f4 81e0
+0085f5 9611      	_ZPG 
+0085f6 e0f1
+0085f7 8100
+0085f8 2f10
+0085f9 bf4f
+0085fa 2302
+0085fb b74f
+0085fc fb17
+0085fd f942
+0085fe fb16
+0085ff f946      	_BITZ
+008600 fc50
+008601 d00f
+008602 01fd
+008603 9611
+008604 15f4
+008605 f028
+008606 91e4
+008607 e1fd
+008608 0fee
+008609 1df2
+00860a 9409
+00860b 95f3
+00860c 81e0
+00860d e1fd
+00860e 0fee
+00860f 1df2
+008610 9409
+008611 940c a702 	EXEC
+                 
+                 _AND_ZPG:				;25
+008613 01fd      	movw	zl, XL
+008614 15f4
+008615 f019
+008616 f040
+008617 91e4
+008618 c008
+008619 32e0
+00861a f010
+00861b e0f0
+00861c c003
+00861d 2fe5
+00861e c002
+00861f 95f3
+008620 81e0
+008621 9611      	_ZPG 
+008622 e0f1
+008623 8100
+008624 bf4f
+008625 2320
+008626 b74f      	_ANDZ
+008627 fc50
+008628 d00f
+008629 01fd
+00862a 9611
+00862b 15f4
+00862c f028
+00862d 91e4
+00862e e1fd
+00862f 0fee
+008630 1df2
+008631 9409
+008632 95f3
+008633 81e0
+008634 e1fd
+008635 0fee
+008636 1df2
+008637 9409
+008638 940c a702 	EXEC
+                 
+                 _ROL_ZPG:				;26
+00863a 01fd      	movw	zl, XL
+00863b 15f4
+00863c f019
+00863d f040
+00863e 91e4
+00863f c008
+008640 32e0
+008641 f010
+008642 e0f0
+008643 c003
+008644 2fe5
+008645 c002
+008646 95f3
+008647 81e0
+008648 9611      	_ZPG 
+008649 e0f1
+00864a 8100
+00864b bf4f
+00864c 1f00
+00864d b74f
+00864e 8300      	_ROLZ
+00864f fc50
+008650 d00f
+008651 01fd
+008652 9611
+008653 15f4
+008654 f028
+008655 91e4
+008656 e1fd
+008657 0fee
+008658 1df2
+008659 9409
+00865a 95f3
+00865b 81e0
+00865c e1fd
+00865d 0fee
+00865e 1df2
+00865f 9409
+008660 940c a702 	EXEC
+                 
+                 _RMB2_ZPG:				;27
+008662 01fd
+008663 15f4
+008664 f019
+008665 f040
+008666 91e4
+008667 c008
+008668 32e0
+008669 f010
+00866a e0f0
+00866b c003
+00866c 2fe5
+00866d c002
+00866e 95f3
+00866f 81e0
+008670 9611
+008671 e0f1
+008672 8100
+008673 7f0b
+008674 8300      	_RMB	0xFB
+008675 fc50
+008676 d00f
+008677 01fd
+008678 9611
+008679 15f4
+00867a f028
+00867b 91e4
+00867c e1fd
+00867d 0fee
+00867e 1df2
+00867f 9409
+008680 95f3
+008681 81e0
+008682 e1fd
+008683 0fee
+008684 1df2
+008685 9409
+008686 940c a702 	EXEC
+                 
+                 _PLP_IMP:				;28
+008688 95c3      	inc		yl
+008689 8138      	ld		sr, Y
+00868a 6130      	ori		sr, sb		; ***???
+00868b 6230      	ori		sr, sx		; ensure always 1
+00868c 2fe3
+00868d e3f8
+00868e 9144
+00868f bf4f      	SR2AV
+008690 fc50
+008691 d00f
+008692 01fd
+008693 9611
+008694 15f4
+008695 f028
+008696 91e4
+008697 e1fd
+008698 0fee
+008699 1df2
+00869a 9409
+00869b 95f3
+00869c 81e0
+00869d e1fd
+00869e 0fee
+00869f 1df2
+0086a0 9409
+0086a1 940c a702 	EXEC
+                 
+                 _AND_IMM:				;29
+0086a3 01fd      	movw	zl, XL
+0086a4 9611      	_IMM 
+0086a5 15f4
+0086a6 f019
+0086a7 f040
+0086a8 91e4
+0086a9 c008
+0086aa 32e0
+0086ab f010
+0086ac e0f0
+0086ad c003
+0086ae 2fe5
+0086af c002
+0086b0 95f3
+0086b1 81e0
+0086b2 bf4f
+0086b3 232e
+0086b4 b74f      	_AND
+0086b5 fc50
+0086b6 d00f
+0086b7 01fd
+0086b8 9611
+0086b9 15f4
+0086ba f028
+0086bb 91e4
+0086bc e1fd
+0086bd 0fee
+0086be 1df2
+0086bf 9409
+0086c0 95f3
+0086c1 81e0
+0086c2 e1fd
+0086c3 0fee
+0086c4 1df2
+0086c5 9409
+0086c6 940c a702 	EXEC
+                 
+                 _ROL_IMP:				;2A
+0086c8 bf4f      	LDSR
+0086c9 1f22      	rol		ar
+0086ca b74f      	SVSR
+0086cb fc50
+0086cc d00f
+0086cd 01fd
+0086ce 9611
+0086cf 15f4
+0086d0 f028
+0086d1 91e4
+0086d2 e1fd
+0086d3 0fee
+0086d4 1df2
+0086d5 9409
+0086d6 95f3
+0086d7 81e0
+0086d8 e1fd
+0086d9 0fee
+0086da 1df2
+0086db 9409
+0086dc 940c a702 	EXEC
+                 
+                 _BIT_ABS:				;2C
+0086de 01fd      	movw	zl, XL
+0086df 15f4
+0086e0 f021
+0086e1 f048
+0086e2 9105
+0086e3 9114
+0086e4 c009
+0086e5 32e0
+0086e6 f418
+0086e7 2f05
+0086e8 2d12
+0086e9 c004
+0086ea efff
+0086eb 95f3
+0086ec 9101
+0086ed 8110
+0086ee 01f8
+0086ef 9612      	_ABS 
+0086f0 15f4
+0086f1 f019
+0086f2 f040
+0086f3 91e4
+0086f4 c008
+0086f5 32e0
+0086f6 f010
+0086f7 e0f0
+0086f8 c003
+0086f9 2fe5
+0086fa c002
+0086fb 95f3
+0086fc 81e0
+0086fd 2f1e
+0086fe bf4f
+0086ff 23e2
+008700 b74f
+008701 fb17
+008702 f942
+008703 fb16
+008704 f946      	_BIT
+008705 fc50
+008706 d00f
+008707 01fd
+008708 9611
+008709 15f4
+00870a f028
+00870b 91e4
+00870c e1fd
+00870d 0fee
+00870e 1df2
+00870f 9409
+008710 95f3
+008711 81e0
+008712 e1fd
+008713 0fee
+008714 1df2
+008715 9409
+008716 940c a702 	EXEC
+                 
+                 _AND_ABS:				;2D
+008718 01fd      	movw	zl, XL
+008719 15f4
+00871a f021
+00871b f048
+00871c 9105
+00871d 9114
+00871e c009
+00871f 32e0
+008720 f418
+008721 2f05
+008722 2d12
+008723 c004
+008724 efff
+008725 95f3
+008726 9101
+008727 8110
+008728 01f8
+008729 9612      	_ABS 
+00872a 15f4
+00872b f019
+00872c f040
+00872d 91e4
+00872e c008
+00872f 32e0
+008730 f010
+008731 e0f0
+008732 c003
+008733 2fe5
+008734 c002
+008735 95f3
+008736 81e0
+008737 bf4f
+008738 232e
+008739 b74f      	_AND
+00873a fc50
+00873b d00f
+00873c 01fd
+00873d 9611
+00873e 15f4
+00873f f028
+008740 91e4
+008741 e1fd
+008742 0fee
+008743 1df2
+008744 9409
+008745 95f3
+008746 81e0
+008747 e1fd
+008748 0fee
+008749 1df2
+00874a 9409
+00874b 940c a702 	EXEC
+                 
+                 _ROL_ABS:				;2E
+00874d 01fd      	movw	zl, XL
+00874e 15f4
+00874f f021
+008750 f048
+008751 9105
+008752 9114
+008753 c009
+008754 32e0
+008755 f418
+008756 2f05
+008757 2d12
+008758 c004
+008759 efff
+00875a 95f3
+00875b 9101
+00875c 8110
+00875d 01f8
+00875e 9612      	_ABS 
+00875f 15f4
+008760 f019
+008761 f050
+008762 9104
+008763 c00b
+008764 32e0
+008765 f020
+008766 e0f0
+008767 8100
+008768 2df4
+008769 c005
+00876a 2f05
+00876b c003
+00876c 95f3
+00876d 8100
+00876e 95fa
+00876f bf4f
+008770 1f00
+008771 b74f
+008772 15f4
+008773 f021
+008774 f468
+008775 95f3
+008776 8300
+008777 c00a
+008778 32e0
+008779 f430
+00877a b30e
+00877b 350a
+00877c f429
+00877d 9afa
+00877e 9af9
+00877f c002
+008780 27ff
+008781 8300      	_ROL
+008782 fc50
+008783 d00f
+008784 01fd
+008785 9611
+008786 15f4
+008787 f028
+008788 91e4
+008789 e1fd
+00878a 0fee
+00878b 1df2
+00878c 9409
+00878d 95f3
+00878e 81e0
+00878f e1fd
+008790 0fee
+008791 1df2
+008792 9409
+008793 940c a702 	EXEC
+                 
+                 _BBR2_REL:				;2F
+008795 01fd
+008796 9612
+008797 15f4
+008798 f021
+008799 f048
+00879a 9105
+00879b 9114
+00879c c009
+00879d 32e0
+00879e f418
+00879f 2f05
+0087a0 2d12
+0087a1 c004
+0087a2 efff
+0087a3 95f3
+0087a4 9101
+0087a5 8110
+0087a6 01f8
+0087a7 e0f1
+0087a8 8100
+0087a9 7004
+0087aa f441
+0087ab 2311
+0087ac f01a
+0087ad 0fa1
+0087ae 1db2
+0087af c003
+0087b0 0fa1
+0087b1 f008
+0087b2 95ba      	_BBR 0x04
+0087b3 fc50
+0087b4 d00f
+0087b5 01fd
+0087b6 9611
+0087b7 15f4
+0087b8 f028
+0087b9 91e4
+0087ba e1fd
+0087bb 0fee
+0087bc 1df2
+0087bd 9409
+0087be 95f3
+0087bf 81e0
+0087c0 e1fd
+0087c1 0fee
+0087c2 1df2
+0087c3 9409
+0087c4 940c a702 	EXEC
+                 
+                 _BMI_REL:				;30
+0087c6 ff42      	sbrs	avsr, anp
+0087c7 c02a      	rjmp	_BMI1
+0087c8 01fd
+0087c9 15f4
+0087ca f019
+0087cb f040
+0087cc 91e4
+0087cd c008
+0087ce 32e0
+0087cf f010
+0087d0 e0f0
+0087d1 c003
+0087d2 2fe5
+0087d3 c002
+0087d4 95f3
+0087d5 81e0
+0087d6 9408
+0087d7 23ee
+0087d8 f01a
+0087d9 1fae
+0087da 1db2
+0087db c003
+0087dc 1fae
+0087dd f008
+0087de 95ba      	_REL
+0087df fc50
+0087e0 d00f
+0087e1 01fd
+0087e2 9611
+0087e3 15f4
+0087e4 f028
+0087e5 91e4
+0087e6 e1fd
+0087e7 0fee
+0087e8 1df2
+0087e9 9409
+0087ea 95f3
+0087eb 81e0
+0087ec e1fd
+0087ed 0fee
+0087ee 1df2
+0087ef 9409
+0087f0 940c a702 	EXEC
+                 _BMI1:
+0087f2 9611      	adiw	xl, 1
+0087f3 fc50
+0087f4 d00f
+0087f5 01fd
+0087f6 9611
+0087f7 15f4
+0087f8 f028
+0087f9 91e4
+0087fa e1fd
+0087fb 0fee
+0087fc 1df2
+0087fd 9409
+0087fe 95f3
+0087ff 81e0
+008800 e1fd
+008801 0fee
+008802 1df2
+008803 9409
+008804 940c a702 	EXEC
+                 
+                 _AND_INDY:				;31
+008806 01fd      	movw	zl, XL
+008807 15f4
+008808 f019
+008809 f040
+00880a 91e4
+00880b c008
+00880c 32e0
+00880d f010
+00880e e0f0
+00880f c003
+008810 2fe5
+008811 c002
+008812 95f3
+008813 81e0
+008814 e0f1
+008815 8100
+008816 95e3
+008817 8110
+008818 01f8
+008819 0def
+00881a 1df2
+00881b 9611      	_INDY 
+00881c 15f4
+00881d f019
+00881e f040
+00881f 91e4
+008820 c008
+008821 32e0
+008822 f010
+008823 e0f0
+008824 c003
+008825 2fe5
+008826 c002
+008827 95f3
+008828 81e0
+008829 bf4f
+00882a 232e
+00882b b74f      	_AND
+00882c fc50
+00882d d00f
+00882e 01fd
+00882f 9611
+008830 15f4
+008831 f028
+008832 91e4
+008833 e1fd
+008834 0fee
+008835 1df2
+008836 9409
+008837 95f3
+008838 81e0
+008839 e1fd
+00883a 0fee
+00883b 1df2
+00883c 9409
+00883d 940c a702 	EXEC
+                 
+                 _AND_IND:				;32
+00883f 01fd      	movw	zl, XL
+008840 15f4
+008841 f019
+008842 f040
+008843 91e4
+008844 c008
+008845 32e0
+008846 f010
+008847 e0f0
+008848 c003
+008849 2fe5
+00884a c002
+00884b 95f3
+00884c 81e0
+00884d e0f1
+00884e 8100
+00884f 95e3
+008850 8110
+008851 01f8
+008852 9611      	_IZPG 
+008853 15f4
+008854 f019
+008855 f040
+008856 91e4
+008857 c008
+008858 32e0
+008859 f010
+00885a e0f0
+00885b c003
+00885c 2fe5
+00885d c002
+00885e 95f3
+00885f 81e0
+008860 bf4f
+008861 232e
+008862 b74f      	_AND
+008863 fc50
+008864 d00f
+008865 01fd
+008866 9611
+008867 15f4
+008868 f028
+008869 91e4
+00886a e1fd
+00886b 0fee
+00886c 1df2
+00886d 9409
+00886e 95f3
+00886f 81e0
+008870 e1fd
+008871 0fee
+008872 1df2
+008873 9409
+008874 940c a702 	EXEC
+                 
+                 _BIT_ZPGX:				;34
+008876 01fd      	movw	zl, XL
+008877 15f4
+008878 f019
+008879 f040
+00887a 91e4
+00887b c008
+00887c 32e0
+00887d f010
+00887e e0f0
+00887f c003
+008880 2fe5
+008881 c002
+008882 95f3
+008883 81e0
+008884 0dee
+008885 9611      	_ZPGX 
+008886 e0f1
+008887 8100
+008888 2f10
+008889 bf4f
+00888a 2302
+00888b b74f
+00888c fb17
+00888d f942
+00888e fb16
+00888f f946      	_BITZ
+008890 fc50
+008891 d00f
+008892 01fd
+008893 9611
+008894 15f4
+008895 f028
+008896 91e4
+008897 e1fd
+008898 0fee
+008899 1df2
+00889a 9409
+00889b 95f3
+00889c 81e0
+00889d e1fd
+00889e 0fee
+00889f 1df2
+0088a0 9409
+0088a1 940c a702 	EXEC
+                 
+                 _AND_ZPGX:				;35
+0088a3 01fd      	movw	zl, XL
+0088a4 15f4
+0088a5 f019
+0088a6 f040
+0088a7 91e4
+0088a8 c008
+0088a9 32e0
+0088aa f010
+0088ab e0f0
+0088ac c003
+0088ad 2fe5
+0088ae c002
+0088af 95f3
+0088b0 81e0
+0088b1 0dee
+0088b2 9611      	_ZPGX 
+0088b3 e0f1
+0088b4 8100
+0088b5 bf4f
+0088b6 2320
+0088b7 b74f      	_ANDZ
+0088b8 fc50
+0088b9 d00f
+0088ba 01fd
+0088bb 9611
+0088bc 15f4
+0088bd f028
+0088be 91e4
+0088bf e1fd
+0088c0 0fee
+0088c1 1df2
+0088c2 9409
+0088c3 95f3
+0088c4 81e0
+0088c5 e1fd
+0088c6 0fee
+0088c7 1df2
+0088c8 9409
+0088c9 940c a702 	EXEC
+                 
+                 _ROL_ZPGX:				;36
+0088cb 01fd      	movw	zl, XL
+0088cc 15f4
+0088cd f019
+0088ce f040
+0088cf 91e4
+0088d0 c008
+0088d1 32e0
+0088d2 f010
+0088d3 e0f0
+0088d4 c003
+0088d5 2fe5
+0088d6 c002
+0088d7 95f3
+0088d8 81e0
+0088d9 0dee
+0088da 9611      	_ZPGX 
+0088db e0f1
+0088dc 8100
+0088dd bf4f
+0088de 1f00
+0088df b74f
+0088e0 8300      	_ROLZ
+0088e1 fc50
+0088e2 d00f
+0088e3 01fd
+0088e4 9611
+0088e5 15f4
+0088e6 f028
+0088e7 91e4
+0088e8 e1fd
+0088e9 0fee
+0088ea 1df2
+0088eb 9409
+0088ec 95f3
+0088ed 81e0
+0088ee e1fd
+0088ef 0fee
+0088f0 1df2
+0088f1 9409
+0088f2 940c a702 	EXEC
+                 
+                 _RMB3_ZPG:				;37
+0088f4 01fd
+0088f5 15f4
+0088f6 f019
+0088f7 f040
+0088f8 91e4
+0088f9 c008
+0088fa 32e0
+0088fb f010
+0088fc e0f0
+0088fd c003
+0088fe 2fe5
+0088ff c002
+008900 95f3
+008901 81e0
+008902 9611
+008903 e0f1
+008904 8100
+008905 7f07
+008906 8300      	_RMB	0xF7
+008907 fc50
+008908 d00f
+008909 01fd
+00890a 9611
+00890b 15f4
+00890c f028
+00890d 91e4
+00890e e1fd
+00890f 0fee
+008910 1df2
+008911 9409
+008912 95f3
+008913 81e0
+008914 e1fd
+008915 0fee
+008916 1df2
+008917 9409
+008918 940c a702 	EXEC
+                 
+                 _SEC_IMP:				;38
+00891a 6041      	ori		avsr, ac
+00891b fc50
+00891c d00f
+00891d 01fd
+00891e 9611
+00891f 15f4
+008920 f028
+008921 91e4
+008922 e1fd
+008923 0fee
+008924 1df2
+008925 9409
+008926 95f3
+008927 81e0
+008928 e1fd
+008929 0fee
+00892a 1df2
+00892b 9409
+00892c 940c a702 	EXEC
+                 
+                 _AND_ABSY:				;39
+00892e 01fd      	movw	zl, XL
+00892f 15f4
+008930 f021
+008931 f048
+008932 9105
+008933 9114
+008934 c009
+008935 32e0
+008936 f418
+008937 2f05
+008938 2d12
+008939 c004
+00893a efff
+00893b 95f3
+00893c 9101
+00893d 8110
+00893e 01f8
+00893f 0def
+008940 1df2
+008941 9612      	_ABSY 
+008942 15f4
+008943 f019
+008944 f040
+008945 91e4
+008946 c008
+008947 32e0
+008948 f010
+008949 e0f0
+00894a c003
+00894b 2fe5
+00894c c002
+00894d 95f3
+00894e 81e0
+00894f bf4f
+008950 232e
+008951 b74f      	_AND
+008952 fc50
+008953 d00f
+008954 01fd
+008955 9611
+008956 15f4
+008957 f028
+008958 91e4
+008959 e1fd
+00895a 0fee
+00895b 1df2
+00895c 9409
+00895d 95f3
+00895e 81e0
+00895f e1fd
+008960 0fee
+008961 1df2
+008962 9409
+008963 940c a702 	EXEC
+                 
+                 _DEC_IMP:				;3A
+008965 bf4f      	LDSR
+008966 952a      	dec		ar
+008967 b74f      	SVSR
+008968 fc50
+008969 d00f
+00896a 01fd
+00896b 9611
+00896c 15f4
+00896d f028
+00896e 91e4
+00896f e1fd
+008970 0fee
+008971 1df2
+008972 9409
+008973 95f3
+008974 81e0
+008975 e1fd
+008976 0fee
+008977 1df2
+008978 9409
+008979 940c a702 	EXEC
+                 
+                 _BIT_ABSX:				;3C
+00897b 01fd      	movw	zl, XL
+00897c 15f4
+00897d f021
+00897e f048
+00897f 9105
+008980 9114
+008981 c009
+008982 32e0
+008983 f418
+008984 2f05
+008985 2d12
+008986 c004
+008987 efff
+008988 95f3
+008989 9101
+00898a 8110
+00898b 01f8
+00898c 0dee
+00898d 1df2
+00898e 9612      	_ABSX 
+00898f 15f4
+008990 f019
+008991 f040
+008992 91e4
+008993 c008
+008994 32e0
+008995 f010
+008996 e0f0
+008997 c003
+008998 2fe5
+008999 c002
+00899a 95f3
+00899b 81e0
+00899c 2f1e
+00899d bf4f
+00899e 23e2
+00899f b74f
+0089a0 fb17
+0089a1 f942
+0089a2 fb16
+0089a3 f946      	_BIT
+0089a4 fc50
+0089a5 d00f
+0089a6 01fd
+0089a7 9611
+0089a8 15f4
+0089a9 f028
+0089aa 91e4
+0089ab e1fd
+0089ac 0fee
+0089ad 1df2
+0089ae 9409
+0089af 95f3
+0089b0 81e0
+0089b1 e1fd
+0089b2 0fee
+0089b3 1df2
+0089b4 9409
+0089b5 940c a702 	EXEC
+                 
+                 _AND_ABSX:				;3D
+0089b7 01fd      	movw	zl, XL
+0089b8 15f4
+0089b9 f021
+0089ba f048
+0089bb 9105
+0089bc 9114
+0089bd c009
+0089be 32e0
+0089bf f418
+0089c0 2f05
+0089c1 2d12
+0089c2 c004
+0089c3 efff
+0089c4 95f3
+0089c5 9101
+0089c6 8110
+0089c7 01f8
+0089c8 0dee
+0089c9 1df2
+0089ca 9612      	_ABSX 
+0089cb 15f4
+0089cc f019
+0089cd f040
+0089ce 91e4
+0089cf c008
+0089d0 32e0
+0089d1 f010
+0089d2 e0f0
+0089d3 c003
+0089d4 2fe5
+0089d5 c002
+0089d6 95f3
+0089d7 81e0
+0089d8 bf4f
+0089d9 232e
+0089da b74f      	_AND
+0089db fc50
+0089dc d00f
+0089dd 01fd
+0089de 9611
+0089df 15f4
+0089e0 f028
+0089e1 91e4
+0089e2 e1fd
+0089e3 0fee
+0089e4 1df2
+0089e5 9409
+0089e6 95f3
+0089e7 81e0
+0089e8 e1fd
+0089e9 0fee
+0089ea 1df2
+0089eb 9409
+0089ec 940c a702 	EXEC
+                 
+                 _ROL_ABSX:				;3E
+0089ee 01fd      	movw	zl, XL
+0089ef 15f4
+0089f0 f021
+0089f1 f048
+0089f2 9105
+0089f3 9114
+0089f4 c009
+0089f5 32e0
+0089f6 f418
+0089f7 2f05
+0089f8 2d12
+0089f9 c004
+0089fa efff
+0089fb 95f3
+0089fc 9101
+0089fd 8110
+0089fe 01f8
+0089ff 0dee
+008a00 1df2
+008a01 9612      	_ABSX 
+008a02 15f4
+008a03 f019
+008a04 f050
+008a05 9104
+008a06 c00b
+008a07 32e0
+008a08 f020
+008a09 e0f0
+008a0a 8100
+008a0b 2df4
+008a0c c005
+008a0d 2f05
+008a0e c003
+008a0f 95f3
+008a10 8100
+008a11 95fa
+008a12 bf4f
+008a13 1f00
+008a14 b74f
+008a15 15f4
+008a16 f021
+008a17 f468
+008a18 95f3
+008a19 8300
+008a1a c00a
+008a1b 32e0
+008a1c f430
+008a1d b30e
+008a1e 350a
+008a1f f429
+008a20 9afa
+008a21 9af9
+008a22 c002
+008a23 27ff
+008a24 8300      	_ROL
+008a25 fc50
+008a26 d00f
+008a27 01fd
+008a28 9611
+008a29 15f4
+008a2a f028
+008a2b 91e4
+008a2c e1fd
+008a2d 0fee
+008a2e 1df2
+008a2f 9409
+008a30 95f3
+008a31 81e0
+008a32 e1fd
+008a33 0fee
+008a34 1df2
+008a35 9409
+008a36 940c a702 	EXEC
+                 
+                 _BBR3_REL:				;3F
+008a38 01fd
+008a39 9612
+008a3a 15f4
+008a3b f021
+008a3c f048
+008a3d 9105
+008a3e 9114
+008a3f c009
+008a40 32e0
+008a41 f418
+008a42 2f05
+008a43 2d12
+008a44 c004
+008a45 efff
+008a46 95f3
+008a47 9101
+008a48 8110
+008a49 01f8
+008a4a e0f1
+008a4b 8100
+008a4c 7008
+008a4d f441
+008a4e 2311
+008a4f f01a
+008a50 0fa1
+008a51 1db2
+008a52 c003
+008a53 0fa1
+008a54 f008
+008a55 95ba      	_BBR 0x08
+008a56 fc50
+008a57 d00f
+008a58 01fd
+008a59 9611
+008a5a 15f4
+008a5b f028
+008a5c 91e4
+008a5d e1fd
+008a5e 0fee
+008a5f 1df2
+008a60 9409
+008a61 95f3
+008a62 81e0
+008a63 e1fd
+008a64 0fee
+008a65 1df2
+008a66 9409
+008a67 940c a702 	EXEC
+                 
+                 _RTI_IMP:				;40
+008a69 95c3      	inc		yl
+008a6a 8138      	ld		sr, Y
+008a6b 95c3      	inc		yl
+008a6c 81a8      	ld		XL, Y
+008a6d 95c3      	inc		yl
+008a6e 81b8      	ld		XH, Y
+008a6f 2fe3
+008a70 e3f8
+008a71 9144
+008a72 bf4f      	SR2AV
+008a73 fc50
+008a74 d00f
+008a75 01fd
+008a76 9611
+008a77 15f4
+008a78 f028
+008a79 91e4
+008a7a e1fd
+008a7b 0fee
+008a7c 1df2
+008a7d 9409
+008a7e 95f3
+008a7f 81e0
+008a80 e1fd
+008a81 0fee
+008a82 1df2
+008a83 9409
+008a84 940c a702 	EXEC
+                 
+                 _EOR_INDX:				;41
+008a86 01fd      	movw	zl, XL
+008a87 15f4
+008a88 f019
+008a89 f040
+008a8a 91e4
+008a8b c008
+008a8c 32e0
+008a8d f010
+008a8e e0f0
+008a8f c003
+008a90 2fe5
+008a91 c002
+008a92 95f3
+008a93 81e0
+008a94 0dee
+008a95 e0f1
+008a96 8100
+008a97 95e3
+008a98 8110
+008a99 01f8
+008a9a 9611      	_INDX 
+008a9b 15f4
+008a9c f019
+008a9d f040
+008a9e 91e4
+008a9f c008
+008aa0 32e0
+008aa1 f010
+008aa2 e0f0
+008aa3 c003
+008aa4 2fe5
+008aa5 c002
+008aa6 95f3
+008aa7 81e0
+008aa8 bf4f
+008aa9 272e
+008aaa b74f      	_EOR
+008aab fc50
+008aac d00f
+008aad 01fd
+008aae 9611
+008aaf 15f4
+008ab0 f028
+008ab1 91e4
+008ab2 e1fd
+008ab3 0fee
+008ab4 1df2
+008ab5 9409
+008ab6 95f3
+008ab7 81e0
+008ab8 e1fd
+008ab9 0fee
+008aba 1df2
+008abb 9409
+008abc 940c a702 	EXEC
+                 
+                 _EOR_ZPG:				;45
+008abe 01fd      	movw	zl, XL
+008abf 15f4
+008ac0 f019
+008ac1 f040
+008ac2 91e4
+008ac3 c008
+008ac4 32e0
+008ac5 f010
+008ac6 e0f0
+008ac7 c003
+008ac8 2fe5
+008ac9 c002
+008aca 95f3
+008acb 81e0
+008acc 9611      	_ZPG 
+008acd e0f1
+008ace 8100
+008acf bf4f
+008ad0 2720
+008ad1 b74f      	_EORZ
+008ad2 fc50
+008ad3 d00f
+008ad4 01fd
+008ad5 9611
+008ad6 15f4
+008ad7 f028
+008ad8 91e4
+008ad9 e1fd
+008ada 0fee
+008adb 1df2
+008adc 9409
+008add 95f3
+008ade 81e0
+008adf e1fd
+008ae0 0fee
+008ae1 1df2
+008ae2 9409
+008ae3 940c a702 	EXEC
+                 
+                 _LSR_ZPG:				;46
+008ae5 01fd      	movw	zl, XL
+008ae6 15f4
+008ae7 f019
+008ae8 f040
+008ae9 91e4
+008aea c008
+008aeb 32e0
+008aec f010
+008aed e0f0
+008aee c003
+008aef 2fe5
+008af0 c002
+008af1 95f3
+008af2 81e0
+008af3 9611      	_ZPG 
+008af4 e0f1
+008af5 8100
+008af6 bf4f
+008af7 9506
+008af8 b74f
+008af9 8300      	_LSRZ
+008afa fc50
+008afb d00f
+008afc 01fd
+008afd 9611
+008afe 15f4
+008aff f028
+008b00 91e4
+008b01 e1fd
+008b02 0fee
+008b03 1df2
+008b04 9409
+008b05 95f3
+008b06 81e0
+008b07 e1fd
+008b08 0fee
+008b09 1df2
+008b0a 9409
+008b0b 940c a702 	EXEC
+                 
+                 _RMB4_ZPG:				;47
+008b0d 01fd
+008b0e 15f4
+008b0f f019
+008b10 f040
+008b11 91e4
+008b12 c008
+008b13 32e0
+008b14 f010
+008b15 e0f0
+008b16 c003
+008b17 2fe5
+008b18 c002
+008b19 95f3
+008b1a 81e0
+008b1b 9611
+008b1c e0f1
+008b1d 8100
+008b1e 7e0f
+008b1f 8300      	_RMB	0xEF
+008b20 fc50
+008b21 d00f
+008b22 01fd
+008b23 9611
+008b24 15f4
+008b25 f028
+008b26 91e4
+008b27 e1fd
+008b28 0fee
+008b29 1df2
+008b2a 9409
+008b2b 95f3
+008b2c 81e0
+008b2d e1fd
+008b2e 0fee
+008b2f 1df2
+008b30 9409
+008b31 940c a702 	EXEC
+                 
+                 _PHA_IMP:				;48
+008b33 8328      	st		Y, ar
+008b34 95ca      	dec		yl
+008b35 fc50
+008b36 d00f
+008b37 01fd
+008b38 9611
+008b39 15f4
+008b3a f028
+008b3b 91e4
+008b3c e1fd
+008b3d 0fee
+008b3e 1df2
+008b3f 9409
+008b40 95f3
+008b41 81e0
+008b42 e1fd
+008b43 0fee
+008b44 1df2
+008b45 9409
+008b46 940c a702 	EXEC
+                 
+                 _EOR_IMM:				;49
+008b48 01fd      	movw	zl, XL
+008b49 9611      	_IMM 
+008b4a 15f4
+008b4b f019
+008b4c f040
+008b4d 91e4
+008b4e c008
+008b4f 32e0
+008b50 f010
+008b51 e0f0
+008b52 c003
+008b53 2fe5
+008b54 c002
+008b55 95f3
+008b56 81e0
+008b57 bf4f
+008b58 272e
+008b59 b74f      	_EOR
+008b5a fc50
+008b5b d00f
+008b5c 01fd
+008b5d 9611
+008b5e 15f4
+008b5f f028
+008b60 91e4
+008b61 e1fd
+008b62 0fee
+008b63 1df2
+008b64 9409
+008b65 95f3
+008b66 81e0
+008b67 e1fd
+008b68 0fee
+008b69 1df2
+008b6a 9409
+008b6b 940c a702 	EXEC
+                 
+                 _LSR_IMP:				;4A
+008b6d bf4f      	LDSR
+008b6e 9526      	lsr		ar
+008b6f b74f      	SVSR
+008b70 fc50
+008b71 d00f
+008b72 01fd
+008b73 9611
+008b74 15f4
+008b75 f028
+008b76 91e4
+008b77 e1fd
+008b78 0fee
+008b79 1df2
+008b7a 9409
+008b7b 95f3
+008b7c 81e0
+008b7d e1fd
+008b7e 0fee
+008b7f 1df2
+008b80 9409
+008b81 940c a702 	EXEC
+                 
+                 _JMP_ABS:				;4C
+008b83 01fd      	movw	zl, XL
+008b84 15f4
+008b85 f021
+008b86 f048
+008b87 9105
+008b88 9114
+008b89 c009
+008b8a 32e0
+008b8b f418
+008b8c 2f05
+008b8d 2d12
+008b8e c004
+008b8f efff
+008b90 95f3
+008b91 9101
+008b92 8110
+008b93 01f8      	READ2
+008b94 01d8      	movw	xl, i
+008b95 fc50
+008b96 d00f
+008b97 01fd
+008b98 9611
+008b99 15f4
+008b9a f028
+008b9b 91e4
+008b9c e1fd
+008b9d 0fee
+008b9e 1df2
+008b9f 9409
+008ba0 95f3
+008ba1 81e0
+008ba2 e1fd
+008ba3 0fee
+008ba4 1df2
+008ba5 9409
+008ba6 940c a702 	EXEC
+                 
+                 _EOR_ABS:				;4D
+008ba8 01fd      	movw	zl, XL
+008ba9 15f4
+008baa f021
+008bab f048
+008bac 9105
+008bad 9114
+008bae c009
+008baf 32e0
+008bb0 f418
+008bb1 2f05
+008bb2 2d12
+008bb3 c004
+008bb4 efff
+008bb5 95f3
+008bb6 9101
+008bb7 8110
+008bb8 01f8
+008bb9 9612      	_ABS 
+008bba 15f4
+008bbb f019
+008bbc f040
+008bbd 91e4
+008bbe c008
+008bbf 32e0
+008bc0 f010
+008bc1 e0f0
+008bc2 c003
+008bc3 2fe5
+008bc4 c002
+008bc5 95f3
+008bc6 81e0
+008bc7 bf4f
+008bc8 272e
+008bc9 b74f      	_EOR
+008bca fc50
+008bcb d00f
+008bcc 01fd
+008bcd 9611
+008bce 15f4
+008bcf f028
+008bd0 91e4
+008bd1 e1fd
+008bd2 0fee
+008bd3 1df2
+008bd4 9409
+008bd5 95f3
+008bd6 81e0
+008bd7 e1fd
+008bd8 0fee
+008bd9 1df2
+008bda 9409
+008bdb 940c a702 	EXEC
+                 
+                 _LSR_ABS:				;4E
+008bdd 01fd      	movw	zl, XL
+008bde 15f4
+008bdf f021
+008be0 f048
+008be1 9105
+008be2 9114
+008be3 c009
+008be4 32e0
+008be5 f418
+008be6 2f05
+008be7 2d12
+008be8 c004
+008be9 efff
+008bea 95f3
+008beb 9101
+008bec 8110
+008bed 01f8
+008bee 9612      	_ABS 
+008bef 15f4
+008bf0 f019
+008bf1 f050
+008bf2 9104
+008bf3 c00b
+008bf4 32e0
+008bf5 f020
+008bf6 e0f0
+008bf7 8100
+008bf8 2df4
+008bf9 c005
+008bfa 2f05
+008bfb c003
+008bfc 95f3
+008bfd 8100
+008bfe 95fa
+008bff bf4f
+008c00 9506
+008c01 b74f
+008c02 15f4
+008c03 f021
+008c04 f468
+008c05 95f3
+008c06 8300
+008c07 c00a
+008c08 32e0
+008c09 f430
+008c0a b30e
+008c0b 350a
+008c0c f429
+008c0d 9afa
+008c0e 9af9
+008c0f c002
+008c10 27ff
+008c11 8300      	_LSR
+008c12 fc50
+008c13 d00f
+008c14 01fd
+008c15 9611
+008c16 15f4
+008c17 f028
+008c18 91e4
+008c19 e1fd
+008c1a 0fee
+008c1b 1df2
+008c1c 9409
+008c1d 95f3
+008c1e 81e0
+008c1f e1fd
+008c20 0fee
+008c21 1df2
+008c22 9409
+008c23 940c a702 	EXEC
+                 
+                 _BBR4_REL:				;4F
+008c25 01fd
+008c26 9612
+008c27 15f4
+008c28 f021
+008c29 f048
+008c2a 9105
+008c2b 9114
+008c2c c009
+008c2d 32e0
+008c2e f418
+008c2f 2f05
+008c30 2d12
+008c31 c004
+008c32 efff
+008c33 95f3
+008c34 9101
+008c35 8110
+008c36 01f8
+008c37 e0f1
+008c38 8100
+008c39 7100
+008c3a f441
+008c3b 2311
+008c3c f01a
+008c3d 0fa1
+008c3e 1db2
+008c3f c003
+008c40 0fa1
+008c41 f008
+008c42 95ba      	_BBR 0x10
+008c43 fc50
+008c44 d00f
+008c45 01fd
+008c46 9611
+008c47 15f4
+008c48 f028
+008c49 91e4
+008c4a e1fd
+008c4b 0fee
+008c4c 1df2
+008c4d 9409
+008c4e 95f3
+008c4f 81e0
+008c50 e1fd
+008c51 0fee
+008c52 1df2
+008c53 9409
+008c54 940c a702 	EXEC
+                 
+                 _BVC_REL:				;50
+008c56 fd46      	sbrc	avsr, atp
+008c57 c02a      	rjmp	_BVC1
+008c58 01fd
+008c59 15f4
+008c5a f019
+008c5b f040
+008c5c 91e4
+008c5d c008
+008c5e 32e0
+008c5f f010
+008c60 e0f0
+008c61 c003
+008c62 2fe5
+008c63 c002
+008c64 95f3
+008c65 81e0
+008c66 9408
+008c67 23ee
+008c68 f01a
+008c69 1fae
+008c6a 1db2
+008c6b c003
+008c6c 1fae
+008c6d f008
+008c6e 95ba      	_REL
+008c6f fc50
+008c70 d00f
+008c71 01fd
+008c72 9611
+008c73 15f4
+008c74 f028
+008c75 91e4
+008c76 e1fd
+008c77 0fee
+008c78 1df2
+008c79 9409
+008c7a 95f3
+008c7b 81e0
+008c7c e1fd
+008c7d 0fee
+008c7e 1df2
+008c7f 9409
+008c80 940c a702 	EXEC
+                 _BVC1:
+008c82 9611      	adiw	xl, 1
+008c83 fc50
+008c84 d00f
+008c85 01fd
+008c86 9611
+008c87 15f4
+008c88 f028
+008c89 91e4
+008c8a e1fd
+008c8b 0fee
+008c8c 1df2
+008c8d 9409
+008c8e 95f3
+008c8f 81e0
+008c90 e1fd
+008c91 0fee
+008c92 1df2
+008c93 9409
+008c94 940c a702 	EXEC
+                 
+                 _EOR_INDY:				;51
+008c96 01fd      	movw	zl, XL
+008c97 15f4
+008c98 f019
+008c99 f040
+008c9a 91e4
+008c9b c008
+008c9c 32e0
+008c9d f010
+008c9e e0f0
+008c9f c003
+008ca0 2fe5
+008ca1 c002
+008ca2 95f3
+008ca3 81e0
+008ca4 e0f1
+008ca5 8100
+008ca6 95e3
+008ca7 8110
+008ca8 01f8
+008ca9 0def
+008caa 1df2
+008cab 9611      	_INDY 
+008cac 15f4
+008cad f019
+008cae f040
+008caf 91e4
+008cb0 c008
+008cb1 32e0
+008cb2 f010
+008cb3 e0f0
+008cb4 c003
+008cb5 2fe5
+008cb6 c002
+008cb7 95f3
+008cb8 81e0
+008cb9 bf4f
+008cba 272e
+008cbb b74f      	_EOR
+008cbc fc50
+008cbd d00f
+008cbe 01fd
+008cbf 9611
+008cc0 15f4
+008cc1 f028
+008cc2 91e4
+008cc3 e1fd
+008cc4 0fee
+008cc5 1df2
+008cc6 9409
+008cc7 95f3
+008cc8 81e0
+008cc9 e1fd
+008cca 0fee
+008ccb 1df2
+008ccc 9409
+008ccd 940c a702 	EXEC
+                 
+                 _EOR_IND:				;52
+008ccf 01fd      	movw	zl, XL
+008cd0 15f4
+008cd1 f019
+008cd2 f040
+008cd3 91e4
+008cd4 c008
+008cd5 32e0
+008cd6 f010
+008cd7 e0f0
+008cd8 c003
+008cd9 2fe5
+008cda c002
+008cdb 95f3
+008cdc 81e0
+008cdd e0f1
+008cde 8100
+008cdf 95e3
+008ce0 8110
+008ce1 01f8
+008ce2 9611      	_IZPG
+008ce3 15f4
+008ce4 f019
+008ce5 f040
+008ce6 91e4
+008ce7 c008
+008ce8 32e0
+008ce9 f010
+008cea e0f0
+008ceb c003
+008cec 2fe5
+008ced c002
+008cee 95f3
+008cef 81e0
+008cf0 bf4f
+008cf1 272e
+008cf2 b74f      	_EOR
+008cf3 fc50
+008cf4 d00f
+008cf5 01fd
+008cf6 9611
+008cf7 15f4
+008cf8 f028
+008cf9 91e4
+008cfa e1fd
+008cfb 0fee
+008cfc 1df2
+008cfd 9409
+008cfe 95f3
+008cff 81e0
+008d00 e1fd
+008d01 0fee
+008d02 1df2
+008d03 9409
+008d04 940c a702 	EXEC
+                 
+                 _EOR_ZPGX:				;55
+008d06 01fd      	movw	zl, XL
+008d07 15f4
+008d08 f019
+008d09 f040
+008d0a 91e4
+008d0b c008
+008d0c 32e0
+008d0d f010
+008d0e e0f0
+008d0f c003
+008d10 2fe5
+008d11 c002
+008d12 95f3
+008d13 81e0
+008d14 0dee
+008d15 9611      	_ZPGX
+008d16 e0f1
+008d17 8100
+008d18 bf4f
+008d19 2720
+008d1a b74f      	_EORZ
+008d1b fc50
+008d1c d00f
+008d1d 01fd
+008d1e 9611
+008d1f 15f4
+008d20 f028
+008d21 91e4
+008d22 e1fd
+008d23 0fee
+008d24 1df2
+008d25 9409
+008d26 95f3
+008d27 81e0
+008d28 e1fd
+008d29 0fee
+008d2a 1df2
+008d2b 9409
+008d2c 940c a702 	EXEC
+                 
+                 _LSR_ZPGX:				;56
+008d2e 01fd      	movw	zl, XL
+008d2f 15f4
+008d30 f019
+008d31 f040
+008d32 91e4
+008d33 c008
+008d34 32e0
+008d35 f010
+008d36 e0f0
+008d37 c003
+008d38 2fe5
+008d39 c002
+008d3a 95f3
+008d3b 81e0
+008d3c 0dee
+008d3d 9611      	_ZPGX 
+008d3e e0f1
+008d3f 8100
+008d40 bf4f
+008d41 9506
+008d42 b74f
+008d43 8300      	_LSRZ
+008d44 fc50
+008d45 d00f
+008d46 01fd
+008d47 9611
+008d48 15f4
+008d49 f028
+008d4a 91e4
+008d4b e1fd
+008d4c 0fee
+008d4d 1df2
+008d4e 9409
+008d4f 95f3
+008d50 81e0
+008d51 e1fd
+008d52 0fee
+008d53 1df2
+008d54 9409
+008d55 940c a702 	EXEC
+                 
+                 _RMB5_ZPG:				;57
+008d57 01fd
+008d58 15f4
+008d59 f019
+008d5a f040
+008d5b 91e4
+008d5c c008
+008d5d 32e0
+008d5e f010
+008d5f e0f0
+008d60 c003
+008d61 2fe5
+008d62 c002
+008d63 95f3
+008d64 81e0
+008d65 9611
+008d66 e0f1
+008d67 8100
+008d68 7d0f
+008d69 8300      	_RMB	0xDF
+008d6a fc50
+008d6b d00f
+008d6c 01fd
+008d6d 9611
+008d6e 15f4
+008d6f f028
+008d70 91e4
+008d71 e1fd
+008d72 0fee
+008d73 1df2
+008d74 9409
+008d75 95f3
+008d76 81e0
+008d77 e1fd
+008d78 0fee
+008d79 1df2
+008d7a 9409
+008d7b 940c a702 	EXEC
+                 
+                 _CLI_IMP:				;58
+008d7d 7f3b      	andi	sr, ss+so+sx+sb+sd+sz+sc
+008d7e 9478      	sei
+008d7f fc50
+008d80 d00f
+008d81 01fd
+008d82 9611
+008d83 15f4
+008d84 f028
+008d85 91e4
+008d86 e1fd
+008d87 0fee
+008d88 1df2
+008d89 9409
+008d8a 95f3
+008d8b 81e0
+008d8c e1fd
+008d8d 0fee
+008d8e 1df2
+008d8f 9409
+008d90 940c a702 	EXEC
+                 
+                 _EOR_ABSY:				;59
+008d92 01fd      	movw	zl, XL
+008d93 15f4
+008d94 f021
+008d95 f048
+008d96 9105
+008d97 9114
+008d98 c009
+008d99 32e0
+008d9a f418
+008d9b 2f05
+008d9c 2d12
+008d9d c004
+008d9e efff
+008d9f 95f3
+008da0 9101
+008da1 8110
+008da2 01f8
+008da3 0def
+008da4 1df2
+008da5 9612      	_ABSY
+008da6 15f4
+008da7 f019
+008da8 f040
+008da9 91e4
+008daa c008
+008dab 32e0
+008dac f010
+008dad e0f0
+008dae c003
+008daf 2fe5
+008db0 c002
+008db1 95f3
+008db2 81e0
+008db3 bf4f
+008db4 272e
+008db5 b74f      	_EOR
+008db6 fc50
+008db7 d00f
+008db8 01fd
+008db9 9611
+008dba 15f4
+008dbb f028
+008dbc 91e4
+008dbd e1fd
+008dbe 0fee
+008dbf 1df2
+008dc0 9409
+008dc1 95f3
+008dc2 81e0
+008dc3 e1fd
+008dc4 0fee
+008dc5 1df2
+008dc6 9409
+008dc7 940c a702 	EXEC
+                 
+                 _PHY_IMP:				;5A
+008dc9 82f8      	st		Y, yr
+008dca 95ca      	dec		yl
+008dcb fc50
+008dcc d00f
+008dcd 01fd
+008dce 9611
+008dcf 15f4
+008dd0 f028
+008dd1 91e4
+008dd2 e1fd
+008dd3 0fee
+008dd4 1df2
+008dd5 9409
+008dd6 95f3
+008dd7 81e0
+008dd8 e1fd
+008dd9 0fee
+008dda 1df2
+008ddb 9409
+008ddc 940c a702 	EXEC
+                 
+                 _EOR_ABSX:				;5D
+008dde 01fd      	movw	zl, XL
+008ddf 15f4
+008de0 f021
+008de1 f048
+008de2 9105
+008de3 9114
+008de4 c009
+008de5 32e0
+008de6 f418
+008de7 2f05
+008de8 2d12
+008de9 c004
+008dea efff
+008deb 95f3
+008dec 9101
+008ded 8110
+008dee 01f8
+008def 0dee
+008df0 1df2
+008df1 9612      	_ABSX
+008df2 15f4
+008df3 f019
+008df4 f040
+008df5 91e4
+008df6 c008
+008df7 32e0
+008df8 f010
+008df9 e0f0
+008dfa c003
+008dfb 2fe5
+008dfc c002
+008dfd 95f3
+008dfe 81e0
+008dff bf4f
+008e00 272e
+008e01 b74f      	_EOR
+008e02 fc50
+008e03 d00f
+008e04 01fd
+008e05 9611
+008e06 15f4
+008e07 f028
+008e08 91e4
+008e09 e1fd
+008e0a 0fee
+008e0b 1df2
+008e0c 9409
+008e0d 95f3
+008e0e 81e0
+008e0f e1fd
+008e10 0fee
+008e11 1df2
+008e12 9409
+008e13 940c a702 	EXEC
+                 
+                 _LSR_ABSX:				;5E
+008e15 01fd      	movw	zl, XL
+008e16 15f4
+008e17 f021
+008e18 f048
+008e19 9105
+008e1a 9114
+008e1b c009
+008e1c 32e0
+008e1d f418
+008e1e 2f05
+008e1f 2d12
+008e20 c004
+008e21 efff
+008e22 95f3
+008e23 9101
+008e24 8110
+008e25 01f8
+008e26 0dee
+008e27 1df2
+008e28 9612      	_ABSX 
+008e29 15f4
+008e2a f019
+008e2b f050
+008e2c 9104
+008e2d c00b
+008e2e 32e0
+008e2f f020
+008e30 e0f0
+008e31 8100
+008e32 2df4
+008e33 c005
+008e34 2f05
+008e35 c003
+008e36 95f3
+008e37 8100
+008e38 95fa
+008e39 bf4f
+008e3a 9506
+008e3b b74f
+008e3c 15f4
+008e3d f021
+008e3e f468
+008e3f 95f3
+008e40 8300
+008e41 c00a
+008e42 32e0
+008e43 f430
+008e44 b30e
+008e45 350a
+008e46 f429
+008e47 9afa
+008e48 9af9
+008e49 c002
+008e4a 27ff
+008e4b 8300      	_LSR
+008e4c fc50
+008e4d d00f
+008e4e 01fd
+008e4f 9611
+008e50 15f4
+008e51 f028
+008e52 91e4
+008e53 e1fd
+008e54 0fee
+008e55 1df2
+008e56 9409
+008e57 95f3
+008e58 81e0
+008e59 e1fd
+008e5a 0fee
+008e5b 1df2
+008e5c 9409
+008e5d 940c a702 	EXEC
+                 
+                 _BBR5_REL:				;5F
+008e5f 01fd
+008e60 9612
+008e61 15f4
+008e62 f021
+008e63 f048
+008e64 9105
+008e65 9114
+008e66 c009
+008e67 32e0
+008e68 f418
+008e69 2f05
+008e6a 2d12
+008e6b c004
+008e6c efff
+008e6d 95f3
+008e6e 9101
+008e6f 8110
+008e70 01f8
+008e71 e0f1
+008e72 8100
+008e73 7200
+008e74 f441
+008e75 2311
+008e76 f01a
+008e77 0fa1
+008e78 1db2
+008e79 c003
+008e7a 0fa1
+008e7b f008
+008e7c 95ba      	_BBR 0x20
+008e7d fc50
+008e7e d00f
+008e7f 01fd
+008e80 9611
+008e81 15f4
+008e82 f028
+008e83 91e4
+008e84 e1fd
+008e85 0fee
+008e86 1df2
+008e87 9409
+008e88 95f3
+008e89 81e0
+008e8a e1fd
+008e8b 0fee
+008e8c 1df2
+008e8d 9409
+008e8e 940c a702 	EXEC
+                 
+                 _RTS_IMP:				;60
+008e90 95c3      	inc		yl
+008e91 81a8      	ld		XL, Y
+008e92 95c3      	inc		yl
+008e93 81b8      	ld		XH, Y
+008e94 9611      	adiw	XL, 0x01
+008e95 fc50
+008e96 d00f
+008e97 01fd
+008e98 9611
+008e99 15f4
+008e9a f028
+008e9b 91e4
+008e9c e1fd
+008e9d 0fee
+008e9e 1df2
+008e9f 9409
+008ea0 95f3
+008ea1 81e0
+008ea2 e1fd
+008ea3 0fee
+008ea4 1df2
+008ea5 9409
+008ea6 940c a702 	EXEC
+                 
+                 _ADC_INDX:				;61
+008ea8 01fd      	movw	zl, XL
+008ea9 15f4
+008eaa f019
+008eab f040
+008eac 91e4
+008ead c008
+008eae 32e0
+008eaf f010
+008eb0 e0f0
+008eb1 c003
+008eb2 2fe5
+008eb3 c002
+008eb4 95f3
+008eb5 81e0
+008eb6 0dee
+008eb7 e0f1
+008eb8 8100
+008eb9 95e3
+008eba 8110
+008ebb 01f8
+008ebc 9611      	_INDX 
+008ebd 15f4
+008ebe f019
+008ebf f040
+008ec0 91e4
+008ec1 c008
+008ec2 32e0
+008ec3 f010
+008ec4 e0f0
+008ec5 c003
+008ec6 2fe5
+008ec7 c002
+008ec8 95f3
+008ec9 81e0
+008eca bf4f
+008ecb 1f2e
+008ecc ff33
+008ecd c00e
+008ece b71f
+008ecf e606
+008ed0 0f20
+008ed1 f408
+008ed2 6011
+008ed3 fd10
+008ed4 700f
+008ed5 f40d
+008ed6 6210
+008ed7 fd15
+008ed8 7f00
+008ed9 1b20
+008eda 9517
+008edb 2322
+008edc b74f
+008edd fb43
+008ede f946      	_ADC
+008edf fc50
+008ee0 d00f
+008ee1 01fd
+008ee2 9611
+008ee3 15f4
+008ee4 f028
+008ee5 91e4
+008ee6 e1fd
+008ee7 0fee
+008ee8 1df2
+008ee9 9409
+008eea 95f3
+008eeb 81e0
+008eec e1fd
+008eed 0fee
+008eee 1df2
+008eef 9409
+008ef0 940c a702 	EXEC
+                 
+                 _STZ_ZPG:				;64
+008ef2 01fd      	movw	zl, XL
+008ef3 15f4
+008ef4 f019
+008ef5 f040
+008ef6 91e4
+008ef7 c008
+008ef8 32e0
+008ef9 f010
+008efa e0f0
+008efb c003
+008efc 2fe5
+008efd c002
+008efe 95f3
+008eff 81e0
+008f00 9611      	_ZPG
+008f01 e000
+008f02 e0f1
+008f03 8300      	_STZZ
+008f04 fc50
+008f05 d00f
+008f06 01fd
+008f07 9611
+008f08 15f4
+008f09 f028
+008f0a 91e4
+008f0b e1fd
+008f0c 0fee
+008f0d 1df2
+008f0e 9409
+008f0f 95f3
+008f10 81e0
+008f11 e1fd
+008f12 0fee
+008f13 1df2
+008f14 9409
+008f15 940c a702 	EXEC
+                 
+                 _ADC_ZPG:				;65
+008f17 01fd      	movw	zl, XL
+008f18 15f4
+008f19 f019
+008f1a f040
+008f1b 91e4
+008f1c c008
+008f1d 32e0
+008f1e f010
+008f1f e0f0
+008f20 c003
+008f21 2fe5
+008f22 c002
+008f23 95f3
+008f24 81e0
+008f25 9611      	_ZPG
+008f26 e0f1
+008f27 8100
+008f28 bf4f
+008f29 1f20
+008f2a ff33
+008f2b c00e
+008f2c b71f
+008f2d e606
+008f2e 0f20
+008f2f f408
+008f30 6011
+008f31 fd10
+008f32 700f
+008f33 f40d
+008f34 6210
+008f35 fd15
+008f36 7f00
+008f37 1b20
+008f38 9517
+008f39 2322
+008f3a b74f
+008f3b fb43
+008f3c f946      	_ADCZ
+008f3d fc50
+008f3e d00f
+008f3f 01fd
+008f40 9611
+008f41 15f4
+008f42 f028
+008f43 91e4
+008f44 e1fd
+008f45 0fee
+008f46 1df2
+008f47 9409
+008f48 95f3
+008f49 81e0
+008f4a e1fd
+008f4b 0fee
+008f4c 1df2
+008f4d 9409
+008f4e 940c a702 	EXEC
+                 
+                 _ROR_ZPG:				;66
+008f50 01fd      	movw	zl, XL
+008f51 15f4
+008f52 f019
+008f53 f040
+008f54 91e4
+008f55 c008
+008f56 32e0
+008f57 f010
+008f58 e0f0
+008f59 c003
+008f5a 2fe5
+008f5b c002
+008f5c 95f3
+008f5d 81e0
+008f5e 9611      	_ZPG
+008f5f e0f1
+008f60 8100
+008f61 bf4f
+008f62 9507
+008f63 b74f
+008f64 8300      	_RORZ
+008f65 fc50
+008f66 d00f
+008f67 01fd
+008f68 9611
+008f69 15f4
+008f6a f028
+008f6b 91e4
+008f6c e1fd
+008f6d 0fee
+008f6e 1df2
+008f6f 9409
+008f70 95f3
+008f71 81e0
+008f72 e1fd
+008f73 0fee
+008f74 1df2
+008f75 9409
+008f76 940c a702 	EXEC
+                 
+                 _RMB6_ZPG:				;67
+008f78 01fd
+008f79 15f4
+008f7a f019
+008f7b f040
+008f7c 91e4
+008f7d c008
+008f7e 32e0
+008f7f f010
+008f80 e0f0
+008f81 c003
+008f82 2fe5
+008f83 c002
+008f84 95f3
+008f85 81e0
+008f86 9611
+008f87 e0f1
+008f88 8100
+008f89 7b0f
+008f8a 8300      	_RMB	0xBF
+008f8b fc50
+008f8c d00f
+008f8d 01fd
+008f8e 9611
+008f8f 15f4
+008f90 f028
+008f91 91e4
+008f92 e1fd
+008f93 0fee
+008f94 1df2
+008f95 9409
+008f96 95f3
+008f97 81e0
+008f98 e1fd
+008f99 0fee
+008f9a 1df2
+008f9b 9409
+008f9c 940c a702 	EXEC
+                 
+                 _PLA_IMP:				;68
+008f9e 95c3      	inc		yl
+008f9f 8128      	ld		ar, Y
+008fa0 bf4f      	LDSR
+008fa1 2322      	tst		ar
+008fa2 b74f      	SVSR
+008fa3 fc50
+008fa4 d00f
+008fa5 01fd
+008fa6 9611
+008fa7 15f4
+008fa8 f028
+008fa9 91e4
+008faa e1fd
+008fab 0fee
+008fac 1df2
+008fad 9409
+008fae 95f3
+008faf 81e0
+008fb0 e1fd
+008fb1 0fee
+008fb2 1df2
+008fb3 9409
+008fb4 940c a702 	EXEC
+                 
+                 _ADC_IMM:				;69
+008fb6 01fd      	movw	zl, XL
+008fb7 9611      	_IMM 
+008fb8 15f4
+008fb9 f019
+008fba f040
+008fbb 91e4
+008fbc c008
+008fbd 32e0
+008fbe f010
+008fbf e0f0
+008fc0 c003
+008fc1 2fe5
+008fc2 c002
+008fc3 95f3
+008fc4 81e0
+008fc5 bf4f
+008fc6 1f2e
+008fc7 ff33
+008fc8 c00e
+008fc9 b71f
+008fca e606
+008fcb 0f20
+008fcc f408
+008fcd 6011
+008fce fd10
+008fcf 700f
+008fd0 f40d
+008fd1 6210
+008fd2 fd15
+008fd3 7f00
+008fd4 1b20
+008fd5 9517
+008fd6 2322
+008fd7 b74f
+008fd8 fb43
+008fd9 f946      	_ADC
+008fda fc50
+008fdb d00f
+008fdc 01fd
+008fdd 9611
+008fde 15f4
+008fdf f028
+008fe0 91e4
+008fe1 e1fd
+008fe2 0fee
+008fe3 1df2
+008fe4 9409
+008fe5 95f3
+008fe6 81e0
+008fe7 e1fd
+008fe8 0fee
+008fe9 1df2
+008fea 9409
+008feb 940c a702 	EXEC
+                 
+                 
+                 _ROR_IMP:				;6A
+008fed bf4f      	LDSR
+008fee 9527      	ror		ar
+008fef b74f      	SVSR
+008ff0 fc50
+008ff1 d00f
+008ff2 01fd
+008ff3 9611
+008ff4 15f4
+008ff5 f028
+008ff6 91e4
+008ff7 e1fd
+008ff8 0fee
+008ff9 1df2
+008ffa 9409
+008ffb 95f3
+008ffc 81e0
+008ffd e1fd
+008ffe 0fee
+008fff 1df2
+009000 9409
+009001 940c a702 	EXEC
+                 
+                 _JMP_JIND:				;6C
+009003 01fd      	movw	zl, XL
+009004 15f4
+009005 f021
+009006 f048
+009007 9105
+009008 9114
+009009 c009
+00900a 32e0
+00900b f418
+00900c 2f05
+00900d 2d12
+00900e c004
+00900f efff
+009010 95f3
+009011 9101
+009012 8110
+009013 01f8      	READ2
+009014 15f4
+009015 f021
+009016 f048
+009017 9105
+009018 9114
+009019 c009
+00901a 32e0
+00901b f418
+00901c 2f05
+00901d 2d12
+00901e c004
+00901f efff
+009020 95f3
+009021 9101
+009022 8110
+009023 01f8      	READ2
+009024 01d8      	movw	XL, i
+009025 fc50
+009026 d00f
+009027 01fd
+009028 9611
+009029 15f4
+00902a f028
+00902b 91e4
+00902c e1fd
+00902d 0fee
+00902e 1df2
+00902f 9409
+009030 95f3
+009031 81e0
+009032 e1fd
+009033 0fee
+009034 1df2
+009035 9409
+009036 940c a702 	EXEC
+                 	
+                 _ADC_ABS:				;6D
+009038 01fd      	movw	zl, XL
+009039 15f4
+00903a f021
+00903b f048
+00903c 9105
+00903d 9114
+00903e c009
+00903f 32e0
+009040 f418
+009041 2f05
+009042 2d12
+009043 c004
+009044 efff
+009045 95f3
+009046 9101
+009047 8110
+009048 01f8
+009049 9612      	_ABS 
+00904a 15f4
+00904b f019
+00904c f040
+00904d 91e4
+00904e c008
+00904f 32e0
+009050 f010
+009051 e0f0
+009052 c003
+009053 2fe5
+009054 c002
+009055 95f3
+009056 81e0
+009057 bf4f
+009058 1f2e
+009059 ff33
+00905a c00e
+00905b b71f
+00905c e606
+00905d 0f20
+00905e f408
+00905f 6011
+009060 fd10
+009061 700f
+009062 f40d
+009063 6210
+009064 fd15
+009065 7f00
+009066 1b20
+009067 9517
+009068 2322
+009069 b74f
+00906a fb43
+00906b f946      	_ADC
+00906c fc50
+00906d d00f
+00906e 01fd
+00906f 9611
+009070 15f4
+009071 f028
+009072 91e4
+009073 e1fd
+009074 0fee
+009075 1df2
+009076 9409
+009077 95f3
+009078 81e0
+009079 e1fd
+00907a 0fee
+00907b 1df2
+00907c 9409
+00907d 940c a702 	EXEC
+                 
+                 _ROR_ABS:				;6E
+00907f 01fd      	movw	zl, XL
+009080 15f4
+009081 f021
+009082 f048
+009083 9105
+009084 9114
+009085 c009
+009086 32e0
+009087 f418
+009088 2f05
+009089 2d12
+00908a c004
+00908b efff
+00908c 95f3
+00908d 9101
+00908e 8110
+00908f 01f8
+009090 9612      	_ABS 
+009091 15f4
+009092 f019
+009093 f050
+009094 9104
+009095 c00b
+009096 32e0
+009097 f020
+009098 e0f0
+009099 8100
+00909a 2df4
+00909b c005
+00909c 2f05
+00909d c003
+00909e 95f3
+00909f 8100
+0090a0 95fa
+0090a1 bf4f
+0090a2 9507
+0090a3 b74f
+0090a4 15f4
+0090a5 f021
+0090a6 f468
+0090a7 95f3
+0090a8 8300
+0090a9 c00a
+0090aa 32e0
+0090ab f430
+0090ac b30e
+0090ad 350a
+0090ae f429
+0090af 9afa
+0090b0 9af9
+0090b1 c002
+0090b2 27ff
+0090b3 8300      	_ROR
+0090b4 fc50
+0090b5 d00f
+0090b6 01fd
+0090b7 9611
+0090b8 15f4
+0090b9 f028
+0090ba 91e4
+0090bb e1fd
+0090bc 0fee
+0090bd 1df2
+0090be 9409
+0090bf 95f3
+0090c0 81e0
+0090c1 e1fd
+0090c2 0fee
+0090c3 1df2
+0090c4 9409
+0090c5 940c a702 	EXEC
+                 
+                 _BBR6_REL:				;6F
+0090c7 01fd
+0090c8 9612
+0090c9 15f4
+0090ca f021
+0090cb f048
+0090cc 9105
+0090cd 9114
+0090ce c009
+0090cf 32e0
+0090d0 f418
+0090d1 2f05
+0090d2 2d12
+0090d3 c004
+0090d4 efff
+0090d5 95f3
+0090d6 9101
+0090d7 8110
+0090d8 01f8
+0090d9 e0f1
+0090da 8100
+0090db 7400
+0090dc f441
+0090dd 2311
+0090de f01a
+0090df 0fa1
+0090e0 1db2
+0090e1 c003
+0090e2 0fa1
+0090e3 f008
+0090e4 95ba      	_BBR 0x40
+0090e5 fc50
+0090e6 d00f
+0090e7 01fd
+0090e8 9611
+0090e9 15f4
+0090ea f028
+0090eb 91e4
+0090ec e1fd
+0090ed 0fee
+0090ee 1df2
+0090ef 9409
+0090f0 95f3
+0090f1 81e0
+0090f2 e1fd
+0090f3 0fee
+0090f4 1df2
+0090f5 9409
+0090f6 940c a702 	EXEC
+                 
+                 _BVS_REL:				;70
+0090f8 ff46      	sbrs	avsr, atp
+0090f9 c02a      	rjmp	_BVS1
+0090fa 01fd
+0090fb 15f4
+0090fc f019
+0090fd f040
+0090fe 91e4
+0090ff c008
+009100 32e0
+009101 f010
+009102 e0f0
+009103 c003
+009104 2fe5
+009105 c002
+009106 95f3
+009107 81e0
+009108 9408
+009109 23ee
+00910a f01a
+00910b 1fae
+00910c 1db2
+00910d c003
+00910e 1fae
+00910f f008
+009110 95ba      	_REL
+009111 fc50
+009112 d00f
+009113 01fd
+009114 9611
+009115 15f4
+009116 f028
+009117 91e4
+009118 e1fd
+009119 0fee
+00911a 1df2
+00911b 9409
+00911c 95f3
+00911d 81e0
+00911e e1fd
+00911f 0fee
+009120 1df2
+009121 9409
+009122 940c a702 	EXEC
+                 _BVS1:
+009124 9611      	adiw	xl, 1
+009125 fc50
+009126 d00f
+009127 01fd
+009128 9611
+009129 15f4
+00912a f028
+00912b 91e4
+00912c e1fd
+00912d 0fee
+00912e 1df2
+00912f 9409
+009130 95f3
+009131 81e0
+009132 e1fd
+009133 0fee
+009134 1df2
+009135 9409
+009136 940c a702 	EXEC
+                 
+                 _ADC_INDY:				;71
+009138 01fd      	movw	zl, XL
+009139 15f4
+00913a f019
+00913b f040
+00913c 91e4
+00913d c008
+00913e 32e0
+00913f f010
+009140 e0f0
+009141 c003
+009142 2fe5
+009143 c002
+009144 95f3
+009145 81e0
+009146 e0f1
+009147 8100
+009148 95e3
+009149 8110
+00914a 01f8
+00914b 0def
+00914c 1df2
+00914d 9611      	_INDY
+00914e 15f4
+00914f f019
+009150 f040
+009151 91e4
+009152 c008
+009153 32e0
+009154 f010
+009155 e0f0
+009156 c003
+009157 2fe5
+009158 c002
+009159 95f3
+00915a 81e0
+00915b bf4f
+00915c 1f2e
+00915d ff33
+00915e c00e
+00915f b71f
+009160 e606
+009161 0f20
+009162 f408
+009163 6011
+009164 fd10
+009165 700f
+009166 f40d
+009167 6210
+009168 fd15
+009169 7f00
+00916a 1b20
+00916b 9517
+00916c 2322
+00916d b74f
+00916e fb43
+00916f f946      	_ADC
+009170 fc50
+009171 d00f
+009172 01fd
+009173 9611
+009174 15f4
+009175 f028
+009176 91e4
+009177 e1fd
+009178 0fee
+009179 1df2
+00917a 9409
+00917b 95f3
+00917c 81e0
+00917d e1fd
+00917e 0fee
+00917f 1df2
+009180 9409
+009181 940c a702 	EXEC
+                 
+                 _ADC_IND:				;72
+009183 01fd      	movw	zl, XL
+009184 15f4
+009185 f019
+009186 f040
+009187 91e4
+009188 c008
+009189 32e0
+00918a f010
+00918b e0f0
+00918c c003
+00918d 2fe5
+00918e c002
+00918f 95f3
+009190 81e0
+009191 e0f1
+009192 8100
+009193 95e3
+009194 8110
+009195 01f8
+009196 9611      	_IZPG 
+009197 15f4
+009198 f019
+009199 f040
+00919a 91e4
+00919b c008
+00919c 32e0
+00919d f010
+00919e e0f0
+00919f c003
+0091a0 2fe5
+0091a1 c002
+0091a2 95f3
+0091a3 81e0
+0091a4 bf4f
+0091a5 1f2e
+0091a6 ff33
+0091a7 c00e
+0091a8 b71f
+0091a9 e606
+0091aa 0f20
+0091ab f408
+0091ac 6011
+0091ad fd10
+0091ae 700f
+0091af f40d
+0091b0 6210
+0091b1 fd15
+0091b2 7f00
+0091b3 1b20
+0091b4 9517
+0091b5 2322
+0091b6 b74f
+0091b7 fb43
+0091b8 f946      	_ADC
+0091b9 fc50
+0091ba d00f
+0091bb 01fd
+0091bc 9611
+0091bd 15f4
+0091be f028
+0091bf 91e4
+0091c0 e1fd
+0091c1 0fee
+0091c2 1df2
+0091c3 9409
+0091c4 95f3
+0091c5 81e0
+0091c6 e1fd
+0091c7 0fee
+0091c8 1df2
+0091c9 9409
+0091ca 940c a702 	EXEC
+                 
+                 _STZ_ZPGX:				;74
+0091cc 01fd      	movw	zl, XL
+0091cd 15f4
+0091ce f019
+0091cf f040
+0091d0 91e4
+0091d1 c008
+0091d2 32e0
+0091d3 f010
+0091d4 e0f0
+0091d5 c003
+0091d6 2fe5
+0091d7 c002
+0091d8 95f3
+0091d9 81e0
+0091da 0dee
+0091db 9611      	_ZPGX
+0091dc e000
+0091dd e0f1
+0091de 8300      	_STZZ
+0091df fc50
+0091e0 d00f
+0091e1 01fd
+0091e2 9611
+0091e3 15f4
+0091e4 f028
+0091e5 91e4
+0091e6 e1fd
+0091e7 0fee
+0091e8 1df2
+0091e9 9409
+0091ea 95f3
+0091eb 81e0
+0091ec e1fd
+0091ed 0fee
+0091ee 1df2
+0091ef 9409
+0091f0 940c a702 	EXEC
+                 
+                 _ADC_ZPGX:				;75
+0091f2 01fd      	movw	zl, XL
+0091f3 15f4
+0091f4 f019
+0091f5 f040
+0091f6 91e4
+0091f7 c008
+0091f8 32e0
+0091f9 f010
+0091fa e0f0
+0091fb c003
+0091fc 2fe5
+0091fd c002
+0091fe 95f3
+0091ff 81e0
+009200 0dee
+009201 9611      	_ZPGX
+009202 e0f1
+009203 8100
+009204 bf4f
+009205 1f20
+009206 ff33
+009207 c00e
+009208 b71f
+009209 e606
+00920a 0f20
+00920b f408
+00920c 6011
+00920d fd10
+00920e 700f
+00920f f40d
+009210 6210
+009211 fd15
+009212 7f00
+009213 1b20
+009214 9517
+009215 2322
+009216 b74f
+009217 fb43
+009218 f946      	_ADCZ
+009219 fc50
+00921a d00f
+00921b 01fd
+00921c 9611
+00921d 15f4
+00921e f028
+00921f 91e4
+009220 e1fd
+009221 0fee
+009222 1df2
+009223 9409
+009224 95f3
+009225 81e0
+009226 e1fd
+009227 0fee
+009228 1df2
+009229 9409
+00922a 940c a702 	EXEC
+                 
+                 _ROR_ZPGX:				;76
+00922c 01fd      	movw	zl, XL
+00922d 15f4
+00922e f019
+00922f f040
+009230 91e4
+009231 c008
+009232 32e0
+009233 f010
+009234 e0f0
+009235 c003
+009236 2fe5
+009237 c002
+009238 95f3
+009239 81e0
+00923a 0dee
+00923b 9611      	_ZPGX
+00923c e0f1
+00923d 8100
+00923e bf4f
+00923f 9507
+009240 b74f
+009241 8300      	_RORZ
+009242 fc50
+009243 d00f
+009244 01fd
+009245 9611
+009246 15f4
+009247 f028
+009248 91e4
+009249 e1fd
+00924a 0fee
+00924b 1df2
+00924c 9409
+00924d 95f3
+00924e 81e0
+00924f e1fd
+009250 0fee
+009251 1df2
+009252 9409
+009253 940c a702 	EXEC
+                 
+                 _RMB7_ZPG:				;77
+009255 01fd
+009256 15f4
+009257 f019
+009258 f040
+009259 91e4
+00925a c008
+00925b 32e0
+00925c f010
+00925d e0f0
+00925e c003
+00925f 2fe5
+009260 c002
+009261 95f3
+009262 81e0
+009263 9611
+009264 e0f1
+009265 8100
+009266 770f
+009267 8300      	_RMB	0x7F
+009268 fc50
+009269 d00f
+00926a 01fd
+00926b 9611
+00926c 15f4
+00926d f028
+00926e 91e4
+00926f e1fd
+009270 0fee
+009271 1df2
+009272 9409
+009273 95f3
+009274 81e0
+009275 e1fd
+009276 0fee
+009277 1df2
+009278 9409
+009279 940c a702 	EXEC
+                 
+                 _SEI_IMP:				;78
+00927b 6034      	ori		sr, si
+00927c 94f8      	cli
+00927d fc50
+00927e d00f
+00927f 01fd
+009280 9611
+009281 15f4
+009282 f028
+009283 91e4
+009284 e1fd
+009285 0fee
+009286 1df2
+009287 9409
+009288 95f3
+009289 81e0
+00928a e1fd
+00928b 0fee
+00928c 1df2
+00928d 9409
+00928e 940c a702 	EXEC
+                 
+                 _ADC_ABSY:				;79
+009290 01fd      	movw	zl, XL
+009291 15f4
+009292 f021
+009293 f048
+009294 9105
+009295 9114
+009296 c009
+009297 32e0
+009298 f418
+009299 2f05
+00929a 2d12
+00929b c004
+00929c efff
+00929d 95f3
+00929e 9101
+00929f 8110
+0092a0 01f8
+0092a1 0def
+0092a2 1df2
+0092a3 9612      	_ABSY 
+0092a4 15f4
+0092a5 f019
+0092a6 f040
+0092a7 91e4
+0092a8 c008
+0092a9 32e0
+0092aa f010
+0092ab e0f0
+0092ac c003
+0092ad 2fe5
+0092ae c002
+0092af 95f3
+0092b0 81e0
+0092b1 bf4f
+0092b2 1f2e
+0092b3 ff33
+0092b4 c00e
+0092b5 b71f
+0092b6 e606
+0092b7 0f20
+0092b8 f408
+0092b9 6011
+0092ba fd10
+0092bb 700f
+0092bc f40d
+0092bd 6210
+0092be fd15
+0092bf 7f00
+0092c0 1b20
+0092c1 9517
+0092c2 2322
+0092c3 b74f
+0092c4 fb43
+0092c5 f946      	_ADC
+0092c6 fc50
+0092c7 d00f
+0092c8 01fd
+0092c9 9611
+0092ca 15f4
+0092cb f028
+0092cc 91e4
+0092cd e1fd
+0092ce 0fee
+0092cf 1df2
+0092d0 9409
+0092d1 95f3
+0092d2 81e0
+0092d3 e1fd
+0092d4 0fee
+0092d5 1df2
+0092d6 9409
+0092d7 940c a702 	EXEC
+                 
+                 _PLY_IMP:				;7A
+0092d9 95c3      	inc		yl
+0092da 80f8      	ld		yr, Y
+0092db bf4f      	LDSR
+0092dc 20ff      	tst		yr
+0092dd b74f      	SVSR
+0092de fc50
+0092df d00f
+0092e0 01fd
+0092e1 9611
+0092e2 15f4
+0092e3 f028
+0092e4 91e4
+0092e5 e1fd
+0092e6 0fee
+0092e7 1df2
+0092e8 9409
+0092e9 95f3
+0092ea 81e0
+0092eb e1fd
+0092ec 0fee
+0092ed 1df2
+0092ee 9409
+0092ef 940c a702 	EXEC
+                 
+                 _JMP_JINDX:				;7C
+0092f1 01fd      	movw	zl, XL
+0092f2 15f4
+0092f3 f021
+0092f4 f048
+0092f5 9105
+0092f6 9114
+0092f7 c009
+0092f8 32e0
+0092f9 f418
+0092fa 2f05
+0092fb 2d12
+0092fc c004
+0092fd efff
+0092fe 95f3
+0092ff 9101
+009300 8110
+009301 01f8      	READ2
+009302 0dee      	add		ZL, XR	
+009303 1df2      	adc		ZH, ZERO
+009304 15f4
+009305 f021
+009306 f048
+009307 9105
+009308 9114
+009309 c009
+00930a 32e0
+00930b f418
+00930c 2f05
+00930d 2d12
+00930e c004
+00930f efff
+009310 95f3
+009311 9101
+009312 8110
+009313 01f8      	READ2
+009314 01d8      	movw	XL, i
+009315 fc50
+009316 d00f
+009317 01fd
+009318 9611
+009319 15f4
+00931a f028
+00931b 91e4
+00931c e1fd
+00931d 0fee
+00931e 1df2
+00931f 9409
+009320 95f3
+009321 81e0
+009322 e1fd
+009323 0fee
+009324 1df2
+009325 9409
+009326 940c a702 	EXEC
+                 
+                 _ADC_ABSX:				;7D
+009328 01fd      	movw	zl, XL
+009329 15f4
+00932a f021
+00932b f048
+00932c 9105
+00932d 9114
+00932e c009
+00932f 32e0
+009330 f418
+009331 2f05
+009332 2d12
+009333 c004
+009334 efff
+009335 95f3
+009336 9101
+009337 8110
+009338 01f8
+009339 0dee
+00933a 1df2
+00933b 9612      	_ABSX 
+00933c 15f4
+00933d f019
+00933e f040
+00933f 91e4
+009340 c008
+009341 32e0
+009342 f010
+009343 e0f0
+009344 c003
+009345 2fe5
+009346 c002
+009347 95f3
+009348 81e0
+009349 bf4f
+00934a 1f2e
+00934b ff33
+00934c c00e
+00934d b71f
+00934e e606
+00934f 0f20
+009350 f408
+009351 6011
+009352 fd10
+009353 700f
+009354 f40d
+009355 6210
+009356 fd15
+009357 7f00
+009358 1b20
+009359 9517
+00935a 2322
+00935b b74f
+00935c fb43
+00935d f946      	_ADC
+00935e fc50
+00935f d00f
+009360 01fd
+009361 9611
+009362 15f4
+009363 f028
+009364 91e4
+009365 e1fd
+009366 0fee
+009367 1df2
+009368 9409
+009369 95f3
+00936a 81e0
+00936b e1fd
+00936c 0fee
+00936d 1df2
+00936e 9409
+00936f 940c a702 	EXEC
+                 
+                 _ROR_ABSX:				;7E
+009371 01fd      	movw	zl, XL
+009372 15f4
+009373 f021
+009374 f048
+009375 9105
+009376 9114
+009377 c009
+009378 32e0
+009379 f418
+00937a 2f05
+00937b 2d12
+00937c c004
+00937d efff
+00937e 95f3
+00937f 9101
+009380 8110
+009381 01f8
+009382 0dee
+009383 1df2
+009384 9612      	_ABSX 
+009385 15f4
+009386 f019
+009387 f050
+009388 9104
+009389 c00b
+00938a 32e0
+00938b f020
+00938c e0f0
+00938d 8100
+00938e 2df4
+00938f c005
+009390 2f05
+009391 c003
+009392 95f3
+009393 8100
+009394 95fa
+009395 bf4f
+009396 9507
+009397 b74f
+009398 15f4
+009399 f021
+00939a f468
+00939b 95f3
+00939c 8300
+00939d c00a
+00939e 32e0
+00939f f430
+0093a0 b30e
+0093a1 350a
+0093a2 f429
+0093a3 9afa
+0093a4 9af9
+0093a5 c002
+0093a6 27ff
+0093a7 8300      	_ROR
+0093a8 fc50
+0093a9 d00f
+0093aa 01fd
+0093ab 9611
+0093ac 15f4
+0093ad f028
+0093ae 91e4
+0093af e1fd
+0093b0 0fee
+0093b1 1df2
+0093b2 9409
+0093b3 95f3
+0093b4 81e0
+0093b5 e1fd
+0093b6 0fee
+0093b7 1df2
+0093b8 9409
+0093b9 940c a702 	EXEC
+                 
+                 _BBR7_REL:				;7F
+0093bb 01fd
+0093bc 9612
+0093bd 15f4
+0093be f021
+0093bf f048
+0093c0 9105
+0093c1 9114
+0093c2 c009
+0093c3 32e0
+0093c4 f418
+0093c5 2f05
+0093c6 2d12
+0093c7 c004
+0093c8 efff
+0093c9 95f3
+0093ca 9101
+0093cb 8110
+0093cc 01f8
+0093cd e0f1
+0093ce 8100
+0093cf 7800
+0093d0 f441
+0093d1 2311
+0093d2 f01a
+0093d3 0fa1
+0093d4 1db2
+0093d5 c003
+0093d6 0fa1
+0093d7 f008
+0093d8 95ba      	_BBR 0x80
+0093d9 fc50
+0093da d00f
+0093db 01fd
+0093dc 9611
+0093dd 15f4
+0093de f028
+0093df 91e4
+0093e0 e1fd
+0093e1 0fee
+0093e2 1df2
+0093e3 9409
+0093e4 95f3
+0093e5 81e0
+0093e6 e1fd
+0093e7 0fee
+0093e8 1df2
+0093e9 9409
+0093ea 940c a702 	EXEC
+                 
+                 _BRA_REL:				;80
+0093ec 01fd
+0093ed 15f4
+0093ee f019
+0093ef f040
+0093f0 91e4
+0093f1 c008
+0093f2 32e0
+0093f3 f010
+0093f4 e0f0
+0093f5 c003
+0093f6 2fe5
+0093f7 c002
+0093f8 95f3
+0093f9 81e0
+0093fa 9408
+0093fb 23ee
+0093fc f01a
+0093fd 1fae
+0093fe 1db2
+0093ff c003
+009400 1fae
+009401 f008
+009402 95ba      	_REL
+009403 fc50
+009404 d00f
+009405 01fd
+009406 9611
+009407 15f4
+009408 f028
+009409 91e4
+00940a e1fd
+00940b 0fee
+00940c 1df2
+00940d 9409
+00940e 95f3
+00940f 81e0
+009410 e1fd
+009411 0fee
+009412 1df2
+009413 9409
+009414 940c a702 	EXEC
+                 
+                 _STA_INDX:				;81
+009416 01fd      	movw	zl, XL
+009417 15f4
+009418 f019
+009419 f040
+00941a 91e4
+00941b c008
+00941c 32e0
+00941d f010
+00941e e0f0
+00941f c003
+009420 2fe5
+009421 c002
+009422 95f3
+009423 81e0
+009424 0dee
+009425 e0f1
+009426 8100
+009427 95e3
+009428 8110
+009429 01f8
+00942a 9611      	_INDX 
+00942b 2f02
+00942c 15f4
+00942d f021
+00942e f468
+00942f 95f3
+009430 8300
+009431 c00a
+009432 32e0
+009433 f430
+009434 b30e
+009435 350a
+009436 f429
+009437 9afa
+009438 9af9
+009439 c002
+00943a 27ff
+00943b 8300      	_STA
+00943c fc50
+00943d d00f
+00943e 01fd
+00943f 9611
+009440 15f4
+009441 f028
+009442 91e4
+009443 e1fd
+009444 0fee
+009445 1df2
+009446 9409
+009447 95f3
+009448 81e0
+009449 e1fd
+00944a 0fee
+00944b 1df2
+00944c 9409
+00944d 940c a702 	EXEC
+                 
+                 _STY_ZPG:				;84
+00944f 01fd      	movw	zl, XL
+009450 15f4
+009451 f019
+009452 f040
+009453 91e4
+009454 c008
+009455 32e0
+009456 f010
+009457 e0f0
+009458 c003
+009459 2fe5
+00945a c002
+00945b 95f3
+00945c 81e0
+00945d 9611      	_ZPG
+00945e 2d0f
+00945f e0f1
+009460 8300      	_STYZ
+009461 fc50
+009462 d00f
+009463 01fd
+009464 9611
+009465 15f4
+009466 f028
+009467 91e4
+009468 e1fd
+009469 0fee
+00946a 1df2
+00946b 9409
+00946c 95f3
+00946d 81e0
+00946e e1fd
+00946f 0fee
+009470 1df2
+009471 9409
+009472 940c a702 	EXEC
+                 
+                 _STA_ZPG:				;85
+009474 01fd      	movw	zl, XL
+009475 15f4
+009476 f019
+009477 f040
+009478 91e4
+009479 c008
+00947a 32e0
+00947b f010
+00947c e0f0
+00947d c003
+00947e 2fe5
+00947f c002
+009480 95f3
+009481 81e0
+009482 9611      	_ZPG
+009483 2f02
+009484 e0f1
+009485 8300      	_STAZ
+009486 fc50
+009487 d00f
+009488 01fd
+009489 9611
+00948a 15f4
+00948b f028
+00948c 91e4
+00948d e1fd
+00948e 0fee
+00948f 1df2
+009490 9409
+009491 95f3
+009492 81e0
+009493 e1fd
+009494 0fee
+009495 1df2
+009496 9409
+009497 940c a702 	EXEC
+                 
+                 _STX_ZPG:				;86
+009499 01fd      	movw	zl, XL
+00949a 15f4
+00949b f019
+00949c f040
+00949d 91e4
+00949e c008
+00949f 32e0
+0094a0 f010
+0094a1 e0f0
+0094a2 c003
+0094a3 2fe5
+0094a4 c002
+0094a5 95f3
+0094a6 81e0
+0094a7 9611      	_ZPG
+0094a8 2d0e
+0094a9 e0f1
+0094aa 8300      	_STXZ
+0094ab fc50
+0094ac d00f
+0094ad 01fd
+0094ae 9611
+0094af 15f4
+0094b0 f028
+0094b1 91e4
+0094b2 e1fd
+0094b3 0fee
+0094b4 1df2
+0094b5 9409
+0094b6 95f3
+0094b7 81e0
+0094b8 e1fd
+0094b9 0fee
+0094ba 1df2
+0094bb 9409
+0094bc 940c a702 	EXEC
+                 
+                 _SMB0_ZPG:				;87
+0094be 01fd
+0094bf 15f4
+0094c0 f019
+0094c1 f040
+0094c2 91e4
+0094c3 c008
+0094c4 32e0
+0094c5 f010
+0094c6 e0f0
+0094c7 c003
+0094c8 2fe5
+0094c9 c002
+0094ca 95f3
+0094cb 81e0
+0094cc 9611
+0094cd e0f1
+0094ce 8100
+0094cf 6001
+0094d0 8300      	_SMB	0x01
+0094d1 fc50
+0094d2 d00f
+0094d3 01fd
+0094d4 9611
+0094d5 15f4
+0094d6 f028
+0094d7 91e4
+0094d8 e1fd
+0094d9 0fee
+0094da 1df2
+0094db 9409
+0094dc 95f3
+0094dd 81e0
+0094de e1fd
+0094df 0fee
+0094e0 1df2
+0094e1 9409
+0094e2 940c a702 	EXEC
+                 
+                 _DEY_IMP:				;88
+0094e4 bf4f      	LDSR
+0094e5 94fa      	dec		yr
+0094e6 b74f      	SVSR
+0094e7 fc50
+0094e8 d00f
+0094e9 01fd
+0094ea 9611
+0094eb 15f4
+0094ec f028
+0094ed 91e4
+0094ee e1fd
+0094ef 0fee
+0094f0 1df2
+0094f1 9409
+0094f2 95f3
+0094f3 81e0
+0094f4 e1fd
+0094f5 0fee
+0094f6 1df2
+0094f7 9409
+0094f8 940c a702 	EXEC
+                 
+                 _BIT_IMM:				;89
+0094fa 01fd      	movw	zl, XL
+0094fb 9611      	_IMM 
+0094fc 15f4
+0094fd f019
+0094fe f040
+0094ff 91e4
+009500 c008
+009501 32e0
+009502 f010
+009503 e0f0
+009504 c003
+009505 2fe5
+009506 c002
+009507 95f3
+009508 81e0      	READZ
+009509 23e2      	and		zl, ar
+00950a b70f      	in		i, SREG		; save zero bit
+00950b 7002      	andi	i, az			; mask zero bit
+00950c 7f4d      	andi	avsr, 0xFd		; clear zero bit
+00950d 2b40      	or	avsr, i
+00950e fc50
+00950f d00f
+009510 01fd
+009511 9611
+009512 15f4
+009513 f028
+009514 91e4
+009515 e1fd
+009516 0fee
+009517 1df2
+009518 9409
+009519 95f3
+00951a 81e0
+00951b e1fd
+00951c 0fee
+00951d 1df2
+00951e 9409
+00951f 940c a702 	EXEC
+                 
+                 _TXA_IMP:				;8A
+009521 bf4f      	LDSR
+009522 2d2e      	mov		ar, xr
+009523 2322      	tst		ar
+009524 b74f      	SVSR
+009525 fc50
+009526 d00f
+009527 01fd
+009528 9611
+009529 15f4
+00952a f028
+00952b 91e4
+00952c e1fd
+00952d 0fee
+00952e 1df2
+00952f 9409
+009530 95f3
+009531 81e0
+009532 e1fd
+009533 0fee
+009534 1df2
+009535 9409
+009536 940c a702 	EXEC
+                 
+                 _STY_ABS:				;8C
+009538 01fd      	movw	zl, XL
+009539 15f4
+00953a f021
+00953b f048
+00953c 9105
+00953d 9114
+00953e c009
+00953f 32e0
+009540 f418
+009541 2f05
+009542 2d12
+009543 c004
+009544 efff
+009545 95f3
+009546 9101
+009547 8110
+009548 01f8
+009549 9612      	_ABS 
+00954a 2d0f
+00954b 15f4
+00954c f021
+00954d f468
+00954e 95f3
+00954f 8300
+009550 c00a
+009551 32e0
+009552 f430
+009553 b30e
+009554 350a
+009555 f429
+009556 9afa
+009557 9af9
+009558 c002
+009559 27ff
+00955a 8300      	_STY
+00955b fc50
+00955c d00f
+00955d 01fd
+00955e 9611
+00955f 15f4
+009560 f028
+009561 91e4
+009562 e1fd
+009563 0fee
+009564 1df2
+009565 9409
+009566 95f3
+009567 81e0
+009568 e1fd
+009569 0fee
+00956a 1df2
+00956b 9409
+00956c 940c a702 	EXEC
+                 
+                 _STA_ABS:				;8D
+00956e 01fd      	movw	zl, XL
+00956f 15f4
+009570 f021
+009571 f048
+009572 9105
+009573 9114
+009574 c009
+009575 32e0
+009576 f418
+009577 2f05
+009578 2d12
+009579 c004
+00957a efff
+00957b 95f3
+00957c 9101
+00957d 8110
+00957e 01f8
+00957f 9612      	_ABS 
+009580 2f02
+009581 15f4
+009582 f021
+009583 f468
+009584 95f3
+009585 8300
+009586 c00a
+009587 32e0
+009588 f430
+009589 b30e
+00958a 350a
+00958b f429
+00958c 9afa
+00958d 9af9
+00958e c002
+00958f 27ff
+009590 8300      	_STA
+009591 fc50
+009592 d00f
+009593 01fd
+009594 9611
+009595 15f4
+009596 f028
+009597 91e4
+009598 e1fd
+009599 0fee
+00959a 1df2
+00959b 9409
+00959c 95f3
+00959d 81e0
+00959e e1fd
+00959f 0fee
+0095a0 1df2
+0095a1 9409
+0095a2 940c a702 	EXEC
+                 
+                 _STX_ABS:				;8E
+0095a4 01fd      	movw	zl, XL
+0095a5 15f4
+0095a6 f021
+0095a7 f048
+0095a8 9105
+0095a9 9114
+0095aa c009
+0095ab 32e0
+0095ac f418
+0095ad 2f05
+0095ae 2d12
+0095af c004
+0095b0 efff
+0095b1 95f3
+0095b2 9101
+0095b3 8110
+0095b4 01f8
+0095b5 9612      	_ABS 
+0095b6 2d0e
+0095b7 15f4
+0095b8 f021
+0095b9 f468
+0095ba 95f3
+0095bb 8300
+0095bc c00a
+0095bd 32e0
+0095be f430
+0095bf b30e
+0095c0 350a
+0095c1 f429
+0095c2 9afa
+0095c3 9af9
+0095c4 c002
+0095c5 27ff
+0095c6 8300      	_STX
+0095c7 fc50
+0095c8 d00f
+0095c9 01fd
+0095ca 9611
+0095cb 15f4
+0095cc f028
+0095cd 91e4
+0095ce e1fd
+0095cf 0fee
+0095d0 1df2
+0095d1 9409
+0095d2 95f3
+0095d3 81e0
+0095d4 e1fd
+0095d5 0fee
+0095d6 1df2
+0095d7 9409
+0095d8 940c a702 	EXEC
+                 
+                 _BBS0_REL:				;8F
+0095da 01fd
+0095db 9612
+0095dc 15f4
+0095dd f021
+0095de f048
+0095df 9105
+0095e0 9114
+0095e1 c009
+0095e2 32e0
+0095e3 f418
+0095e4 2f05
+0095e5 2d12
+0095e6 c004
+0095e7 efff
+0095e8 95f3
+0095e9 9101
+0095ea 8110
+0095eb 01f8
+0095ec e0f1
+0095ed 8100
+0095ee 7001
+0095ef f041
+0095f0 2311
+0095f1 f01a
+0095f2 0fa1
+0095f3 1db2
+0095f4 c003
+0095f5 0fa1
+0095f6 f008
+0095f7 95ba      	_BBS 0x01
+0095f8 fc50
+0095f9 d00f
+0095fa 01fd
+0095fb 9611
+0095fc 15f4
+0095fd f028
+0095fe 91e4
+0095ff e1fd
+009600 0fee
+009601 1df2
+009602 9409
+009603 95f3
+009604 81e0
+009605 e1fd
+009606 0fee
+009607 1df2
+009608 9409
+009609 940c a702 	EXEC
+                 
+                 _BCC_REL:				;90
+00960b fd40      	sbrc	avsr, acp
+00960c c02a      	rjmp	_BCC1
+00960d 01fd
+00960e 15f4
+00960f f019
+009610 f040
+009611 91e4
+009612 c008
+009613 32e0
+009614 f010
+009615 e0f0
+009616 c003
+009617 2fe5
+009618 c002
+009619 95f3
+00961a 81e0
+00961b 9408
+00961c 23ee
+00961d f01a
+00961e 1fae
+00961f 1db2
+009620 c003
+009621 1fae
+009622 f008
+009623 95ba      	_REL
+009624 fc50
+009625 d00f
+009626 01fd
+009627 9611
+009628 15f4
+009629 f028
+00962a 91e4
+00962b e1fd
+00962c 0fee
+00962d 1df2
+00962e 9409
+00962f 95f3
+009630 81e0
+009631 e1fd
+009632 0fee
+009633 1df2
+009634 9409
+009635 940c a702 	EXEC
+                 _BCC1:
+009637 9611      	adiw	xl, 1
+009638 fc50
+009639 d00f
+00963a 01fd
+00963b 9611
+00963c 15f4
+00963d f028
+00963e 91e4
+00963f e1fd
+009640 0fee
+009641 1df2
+009642 9409
+009643 95f3
+009644 81e0
+009645 e1fd
+009646 0fee
+009647 1df2
+009648 9409
+009649 940c a702 	EXEC
+                 
+00964b 01fd      _STA_INDY:	movw	zl, XL				;91
+00964c 15f4
+00964d f019
+00964e f040
+00964f 91e4
+009650 c008
+009651 32e0
+009652 f010
+009653 e0f0
+009654 c003
+009655 2fe5
+009656 c002
+009657 95f3
+009658 81e0
+009659 e0f1
+00965a 8100
+00965b 95e3
+00965c 8110
+00965d 01f8
+00965e 0def
+00965f 1df2
+009660 9611      	_INDY
+009661 2f02
+009662 15f4
+009663 f021
+009664 f468
+009665 95f3
+009666 8300
+009667 c00a
+009668 32e0
+009669 f430
+00966a b30e
+00966b 350a
+00966c f429
+00966d 9afa
+00966e 9af9
+00966f c002
+009670 27ff
+009671 8300      	_STA
+009672 fc50
+009673 d00f
+009674 01fd
+009675 9611
+009676 15f4
+009677 f028
+009678 91e4
+009679 e1fd
+00967a 0fee
+00967b 1df2
+00967c 9409
+00967d 95f3
+00967e 81e0
+00967f e1fd
+009680 0fee
+009681 1df2
+009682 9409
+009683 940c a702 	EXEC
+                 
+                 _STA_IND:				;92
+009685 01fd      	movw	zl, XL
+009686 15f4
+009687 f019
+009688 f040
+009689 91e4
+00968a c008
+00968b 32e0
+00968c f010
+00968d e0f0
+00968e c003
+00968f 2fe5
+009690 c002
+009691 95f3
+009692 81e0
+009693 e0f1
+009694 8100
+009695 95e3
+009696 8110
+009697 01f8
+009698 9611      	_IZPG 
+009699 2f02
+00969a 15f4
+00969b f021
+00969c f468
+00969d 95f3
+00969e 8300
+00969f c00a
+0096a0 32e0
+0096a1 f430
+0096a2 b30e
+0096a3 350a
+0096a4 f429
+0096a5 9afa
+0096a6 9af9
+0096a7 c002
+0096a8 27ff
+0096a9 8300      	_STA
+0096aa fc50
+0096ab d00f
+0096ac 01fd
+0096ad 9611
+0096ae 15f4
+0096af f028
+0096b0 91e4
+0096b1 e1fd
+0096b2 0fee
+0096b3 1df2
+0096b4 9409
+0096b5 95f3
+0096b6 81e0
+0096b7 e1fd
+0096b8 0fee
+0096b9 1df2
+0096ba 9409
+0096bb 940c a702 	EXEC
+                 
+                 _STY_ZPGX:				;94
+0096bd 01fd      	movw	zl, XL
+0096be 15f4
+0096bf f019
+0096c0 f040
+0096c1 91e4
+0096c2 c008
+0096c3 32e0
+0096c4 f010
+0096c5 e0f0
+0096c6 c003
+0096c7 2fe5
+0096c8 c002
+0096c9 95f3
+0096ca 81e0
+0096cb 0dee
+0096cc 9611      	_ZPGX
+0096cd 2d0f
+0096ce e0f1
+0096cf 8300      	_STYZ
+0096d0 fc50
+0096d1 d00f
+0096d2 01fd
+0096d3 9611
+0096d4 15f4
+0096d5 f028
+0096d6 91e4
+0096d7 e1fd
+0096d8 0fee
+0096d9 1df2
+0096da 9409
+0096db 95f3
+0096dc 81e0
+0096dd e1fd
+0096de 0fee
+0096df 1df2
+0096e0 9409
+0096e1 940c a702 	EXEC
+                 
+                 _STA_ZPGX:				;95
+0096e3 01fd      	movw	zl, XL
+0096e4 15f4
+0096e5 f019
+0096e6 f040
+0096e7 91e4
+0096e8 c008
+0096e9 32e0
+0096ea f010
+0096eb e0f0
+0096ec c003
+0096ed 2fe5
+0096ee c002
+0096ef 95f3
+0096f0 81e0
+0096f1 0dee
+0096f2 9611      	_ZPGX
+0096f3 2f02
+0096f4 e0f1
+0096f5 8300      	_STAZ
+0096f6 fc50
+0096f7 d00f
+0096f8 01fd
+0096f9 9611
+0096fa 15f4
+0096fb f028
+0096fc 91e4
+0096fd e1fd
+0096fe 0fee
+0096ff 1df2
+009700 9409
+009701 95f3
+009702 81e0
+009703 e1fd
+009704 0fee
+009705 1df2
+009706 9409
+009707 940c a702 	EXEC
+                 
+                 _STX_ZPGY:				;96
+009709 01fd      	movw	zl, XL
+00970a 15f4
+00970b f019
+00970c f040
+00970d 91e4
+00970e c008
+00970f 32e0
+009710 f010
+009711 e0f0
+009712 c003
+009713 2fe5
+009714 c002
+009715 95f3
+009716 81e0
+009717 0def
+009718 9611      	_ZPGY
+009719 2d0e
+00971a e0f1
+00971b 8300      	_STXZ
+00971c fc50
+00971d d00f
+00971e 01fd
+00971f 9611
+009720 15f4
+009721 f028
+009722 91e4
+009723 e1fd
+009724 0fee
+009725 1df2
+009726 9409
+009727 95f3
+009728 81e0
+009729 e1fd
+00972a 0fee
+00972b 1df2
+00972c 9409
+00972d 940c a702 	EXEC
+                 
+                 _SMB1_ZPG:				;97
+00972f 01fd
+009730 15f4
+009731 f019
+009732 f040
+009733 91e4
+009734 c008
+009735 32e0
+009736 f010
+009737 e0f0
+009738 c003
+009739 2fe5
+00973a c002
+00973b 95f3
+00973c 81e0
+00973d 9611
+00973e e0f1
+00973f 8100
+009740 6002
+009741 8300      	_SMB	0x02
+009742 fc50
+009743 d00f
+009744 01fd
+009745 9611
+009746 15f4
+009747 f028
+009748 91e4
+009749 e1fd
+00974a 0fee
+00974b 1df2
+00974c 9409
+00974d 95f3
+00974e 81e0
+00974f e1fd
+009750 0fee
+009751 1df2
+009752 9409
+009753 940c a702 	EXEC
+                 
+                 _TYA_IMP:				;98
+009755 bf4f      	LDSR
+009756 2d2f      	mov		ar, yr
+009757 2322      	tst		ar
+009758 b74f      	SVSR
+009759 fc50
+00975a d00f
+00975b 01fd
+00975c 9611
+00975d 15f4
+00975e f028
+00975f 91e4
+009760 e1fd
+009761 0fee
+009762 1df2
+009763 9409
+009764 95f3
+009765 81e0
+009766 e1fd
+009767 0fee
+009768 1df2
+009769 9409
+00976a 940c a702 	EXEC
+                 
+                 _STA_ABSY:				;99
+00976c 01fd      	movw	zl, XL
+00976d 15f4
+00976e f021
+00976f f048
+009770 9105
+009771 9114
+009772 c009
+009773 32e0
+009774 f418
+009775 2f05
+009776 2d12
+009777 c004
+009778 efff
+009779 95f3
+00977a 9101
+00977b 8110
+00977c 01f8
+00977d 0def
+00977e 1df2
+00977f 9612      	_ABSY
+009780 2f02
+009781 15f4
+009782 f021
+009783 f468
+009784 95f3
+009785 8300
+009786 c00a
+009787 32e0
+009788 f430
+009789 b30e
+00978a 350a
+00978b f429
+00978c 9afa
+00978d 9af9
+00978e c002
+00978f 27ff
+009790 8300      	_STA
+009791 fc50
+009792 d00f
+009793 01fd
+009794 9611
+009795 15f4
+009796 f028
+009797 91e4
+009798 e1fd
+009799 0fee
+00979a 1df2
+00979b 9409
+00979c 95f3
+00979d 81e0
+00979e e1fd
+00979f 0fee
+0097a0 1df2
+0097a1 9409
+0097a2 940c a702 	EXEC
+                 
+                 _TXS_IMP:				;9A
+0097a4 2dce      	mov		YL, xr
+0097a5 fc50
+0097a6 d00f
+0097a7 01fd
+0097a8 9611
+0097a9 15f4
+0097aa f028
+0097ab 91e4
+0097ac e1fd
+0097ad 0fee
+0097ae 1df2
+0097af 9409
+0097b0 95f3
+0097b1 81e0
+0097b2 e1fd
+0097b3 0fee
+0097b4 1df2
+0097b5 9409
+0097b6 940c a702 	EXEC
+                 
+                 _STZ_ABS:				;9C
+0097b8 01fd      	movw	zl, XL
+0097b9 15f4
+0097ba f021
+0097bb f048
+0097bc 9105
+0097bd 9114
+0097be c009
+0097bf 32e0
+0097c0 f418
+0097c1 2f05
+0097c2 2d12
+0097c3 c004
+0097c4 efff
+0097c5 95f3
+0097c6 9101
+0097c7 8110
+0097c8 01f8
+0097c9 9612      	_ABS 
+0097ca e000
+0097cb 15f4
+0097cc f021
+0097cd f468
+0097ce 95f3
+0097cf 8300
+0097d0 c00a
+0097d1 32e0
+0097d2 f430
+0097d3 b30e
+0097d4 350a
+0097d5 f429
+0097d6 9afa
+0097d7 9af9
+0097d8 c002
+0097d9 27ff
+0097da 8300      	_STZ
+0097db fc50
+0097dc d00f
+0097dd 01fd
+0097de 9611
+0097df 15f4
+0097e0 f028
+0097e1 91e4
+0097e2 e1fd
+0097e3 0fee
+0097e4 1df2
+0097e5 9409
+0097e6 95f3
+0097e7 81e0
+0097e8 e1fd
+0097e9 0fee
+0097ea 1df2
+0097eb 9409
+0097ec 940c a702 	EXEC
+                 
+                 _STA_ABSX:				;9D
+0097ee 01fd      	movw	zl, XL
+0097ef 15f4
+0097f0 f021
+0097f1 f048
+0097f2 9105
+0097f3 9114
+0097f4 c009
+0097f5 32e0
+0097f6 f418
+0097f7 2f05
+0097f8 2d12
+0097f9 c004
+0097fa efff
+0097fb 95f3
+0097fc 9101
+0097fd 8110
+0097fe 01f8
+0097ff 0dee
+009800 1df2
+009801 9612      	_ABSX 
+009802 2f02
+009803 15f4
+009804 f021
+009805 f468
+009806 95f3
+009807 8300
+009808 c00a
+009809 32e0
+00980a f430
+00980b b30e
+00980c 350a
+00980d f429
+00980e 9afa
+00980f 9af9
+009810 c002
+009811 27ff
+009812 8300      	_STA
+009813 fc50
+009814 d00f
+009815 01fd
+009816 9611
+009817 15f4
+009818 f028
+009819 91e4
+00981a e1fd
+00981b 0fee
+00981c 1df2
+00981d 9409
+00981e 95f3
+00981f 81e0
+009820 e1fd
+009821 0fee
+009822 1df2
+009823 9409
+009824 940c a702 	EXEC
+                 
+                 _STZ_ABSX:				;9E
+009826 01fd      	movw	zl, XL
+009827 15f4
+009828 f021
+009829 f048
+00982a 9105
+00982b 9114
+00982c c009
+00982d 32e0
+00982e f418
+00982f 2f05
+009830 2d12
+009831 c004
+009832 efff
+009833 95f3
+009834 9101
+009835 8110
+009836 01f8
+009837 0dee
+009838 1df2
+009839 9612      	_ABSX 
+00983a e000
+00983b 15f4
+00983c f021
+00983d f468
+00983e 95f3
+00983f 8300
+009840 c00a
+009841 32e0
+009842 f430
+009843 b30e
+009844 350a
+009845 f429
+009846 9afa
+009847 9af9
+009848 c002
+009849 27ff
+00984a 8300      	_STZ
+00984b fc50
+00984c d00f
+00984d 01fd
+00984e 9611
+00984f 15f4
+009850 f028
+009851 91e4
+009852 e1fd
+009853 0fee
+009854 1df2
+009855 9409
+009856 95f3
+009857 81e0
+009858 e1fd
+009859 0fee
+00985a 1df2
+00985b 9409
+00985c 940c a702 	EXEC
+                 
+                 _BBS1_REL:				;9F
+00985e 01fd
+00985f 9612
+009860 15f4
+009861 f021
+009862 f048
+009863 9105
+009864 9114
+009865 c009
+009866 32e0
+009867 f418
+009868 2f05
+009869 2d12
+00986a c004
+00986b efff
+00986c 95f3
+00986d 9101
+00986e 8110
+00986f 01f8
+009870 e0f1
+009871 8100
+009872 7002
+009873 f041
+009874 2311
+009875 f01a
+009876 0fa1
+009877 1db2
+009878 c003
+009879 0fa1
+00987a f008
+00987b 95ba      	_BBS 0x02
+00987c fc50
+00987d d00f
+00987e 01fd
+00987f 9611
+009880 15f4
+009881 f028
+009882 91e4
+009883 e1fd
+009884 0fee
+009885 1df2
+009886 9409
+009887 95f3
+009888 81e0
+009889 e1fd
+00988a 0fee
+00988b 1df2
+00988c 9409
+00988d 940c a702 	EXEC
+                 
+                 _LDY_IMM:				;A0
+00988f 01fd      	movw	zl, XL
+009890 9611      	_IMM 
+009891 15f4
+009892 f019
+009893 f040
+009894 91e4
+009895 c008
+009896 32e0
+009897 f010
+009898 e0f0
+009899 c003
+00989a 2fe5
+00989b c002
+00989c 95f3
+00989d 81e0
+00989e bf4f
+00989f 2efe
+0098a0 20ff
+0098a1 b74f      	_LDY
+0098a2 fc50
+0098a3 d00f
+0098a4 01fd
+0098a5 9611
+0098a6 15f4
+0098a7 f028
+0098a8 91e4
+0098a9 e1fd
+0098aa 0fee
+0098ab 1df2
+0098ac 9409
+0098ad 95f3
+0098ae 81e0
+0098af e1fd
+0098b0 0fee
+0098b1 1df2
+0098b2 9409
+0098b3 940c a702 	EXEC
+                 
+                 _LDA_INDX:				;A1
+0098b5 01fd      	movw	zl, XL
+0098b6 15f4
+0098b7 f019
+0098b8 f040
+0098b9 91e4
+0098ba c008
+0098bb 32e0
+0098bc f010
+0098bd e0f0
+0098be c003
+0098bf 2fe5
+0098c0 c002
+0098c1 95f3
+0098c2 81e0
+0098c3 0dee
+0098c4 e0f1
+0098c5 8100
+0098c6 95e3
+0098c7 8110
+0098c8 01f8
+0098c9 9611      	_INDX 
+0098ca 15f4
+0098cb f019
+0098cc f040
+0098cd 91e4
+0098ce c008
+0098cf 32e0
+0098d0 f010
+0098d1 e0f0
+0098d2 c003
+0098d3 2fe5
+0098d4 c002
+0098d5 95f3
+0098d6 81e0
+0098d7 bf4f
+0098d8 2f2e
+0098d9 2322
+0098da b74f      	_LDA
+0098db fc50
+0098dc d00f
+0098dd 01fd
+0098de 9611
+0098df 15f4
+0098e0 f028
+0098e1 91e4
+0098e2 e1fd
+0098e3 0fee
+0098e4 1df2
+0098e5 9409
+0098e6 95f3
+0098e7 81e0
+0098e8 e1fd
+0098e9 0fee
+0098ea 1df2
+0098eb 9409
+0098ec 940c a702 	EXEC
+                 
+                 _LDX_IMM:				;A2
+0098ee 01fd      	movw	zl, XL
+0098ef 9611      	_IMM 
+0098f0 15f4
+0098f1 f019
+0098f2 f040
+0098f3 91e4
+0098f4 c008
+0098f5 32e0
+0098f6 f010
+0098f7 e0f0
+0098f8 c003
+0098f9 2fe5
+0098fa c002
+0098fb 95f3
+0098fc 81e0
+0098fd bf4f
+0098fe 2eee
+0098ff 20ee
+009900 b74f      	_LDX
+009901 fc50
+009902 d00f
+009903 01fd
+009904 9611
+009905 15f4
+009906 f028
+009907 91e4
+009908 e1fd
+009909 0fee
+00990a 1df2
+00990b 9409
+00990c 95f3
+00990d 81e0
+00990e e1fd
+00990f 0fee
+009910 1df2
+009911 9409
+009912 940c a702 	EXEC
+                 
+                 _LDY_ZPG:				;A4
+009914 01fd      	movw	zl, XL
+009915 15f4
+009916 f019
+009917 f040
+009918 91e4
+009919 c008
+00991a 32e0
+00991b f010
+00991c e0f0
+00991d c003
+00991e 2fe5
+00991f c002
+009920 95f3
+009921 81e0
+009922 9611      	_ZPG
+009923 e0f1
+009924 8100
+009925 bf4f
+009926 2ef0
+009927 20ff
+009928 b74f      	_LDYZ
+009929 fc50
+00992a d00f
+00992b 01fd
+00992c 9611
+00992d 15f4
+00992e f028
+00992f 91e4
+009930 e1fd
+009931 0fee
+009932 1df2
+009933 9409
+009934 95f3
+009935 81e0
+009936 e1fd
+009937 0fee
+009938 1df2
+009939 9409
+00993a 940c a702 	EXEC
+                 
+                 _LDA_ZPG:				;A5
+00993c 01fd      	movw	zl, XL
+00993d 15f4
+00993e f019
+00993f f040
+009940 91e4
+009941 c008
+009942 32e0
+009943 f010
+009944 e0f0
+009945 c003
+009946 2fe5
+009947 c002
+009948 95f3
+009949 81e0
+00994a 9611      	_ZPG
+00994b e0f1
+00994c 8100
+00994d bf4f
+00994e 2f20
+00994f 2322
+009950 b74f      	_LDAZ
+009951 fc50
+009952 d00f
+009953 01fd
+009954 9611
+009955 15f4
+009956 f028
+009957 91e4
+009958 e1fd
+009959 0fee
+00995a 1df2
+00995b 9409
+00995c 95f3
+00995d 81e0
+00995e e1fd
+00995f 0fee
+009960 1df2
+009961 9409
+009962 940c a702 	EXEC
+                 
+                 _LDX_ZPG:				;A6
+009964 01fd      	movw	zl, XL
+009965 15f4
+009966 f019
+009967 f040
+009968 91e4
+009969 c008
+00996a 32e0
+00996b f010
+00996c e0f0
+00996d c003
+00996e 2fe5
+00996f c002
+009970 95f3
+009971 81e0
+009972 9611      	_ZPG
+009973 e0f1
+009974 8100
+009975 bf4f
+009976 2ee0
+009977 20ee
+009978 b74f      	_LDXZ
+009979 fc50
+00997a d00f
+00997b 01fd
+00997c 9611
+00997d 15f4
+00997e f028
+00997f 91e4
+009980 e1fd
+009981 0fee
+009982 1df2
+009983 9409
+009984 95f3
+009985 81e0
+009986 e1fd
+009987 0fee
+009988 1df2
+009989 9409
+00998a 940c a702 	EXEC
+                 
+                 _SMB2_ZPG:				;A7
+00998c 01fd
+00998d 15f4
+00998e f019
+00998f f040
+009990 91e4
+009991 c008
+009992 32e0
+009993 f010
+009994 e0f0
+009995 c003
+009996 2fe5
+009997 c002
+009998 95f3
+009999 81e0
+00999a 9611
+00999b e0f1
+00999c 8100
+00999d 6004
+00999e 8300      	_SMB	0x04
+00999f fc50
+0099a0 d00f
+0099a1 01fd
+0099a2 9611
+0099a3 15f4
+0099a4 f028
+0099a5 91e4
+0099a6 e1fd
+0099a7 0fee
+0099a8 1df2
+0099a9 9409
+0099aa 95f3
+0099ab 81e0
+0099ac e1fd
+0099ad 0fee
+0099ae 1df2
+0099af 9409
+0099b0 940c a702 	EXEC
+                 
+                 _TAY_IMP:				;A8
+0099b2 bf4f      	LDSR
+0099b3 2ef2      	mov		yr, ar
+0099b4 20ff      	tst		yr
+0099b5 b74f      	SVSR
+0099b6 fc50
+0099b7 d00f
+0099b8 01fd
+0099b9 9611
+0099ba 15f4
+0099bb f028
+0099bc 91e4
+0099bd e1fd
+0099be 0fee
+0099bf 1df2
+0099c0 9409
+0099c1 95f3
+0099c2 81e0
+0099c3 e1fd
+0099c4 0fee
+0099c5 1df2
+0099c6 9409
+0099c7 940c a702 	EXEC
+                 
+                 _LDA_IMM:				;A9
+0099c9 01fd      	movw	zl, XL
+0099ca 9611      	_IMM 
+0099cb 15f4
+0099cc f019
+0099cd f040
+0099ce 91e4
+0099cf c008
+0099d0 32e0
+0099d1 f010
+0099d2 e0f0
+0099d3 c003
+0099d4 2fe5
+0099d5 c002
+0099d6 95f3
+0099d7 81e0
+0099d8 bf4f
+0099d9 2f2e
+0099da 2322
+0099db b74f      	_LDA
+0099dc fc50
+0099dd d00f
+0099de 01fd
+0099df 9611
+0099e0 15f4
+0099e1 f028
+0099e2 91e4
+0099e3 e1fd
+0099e4 0fee
+0099e5 1df2
+0099e6 9409
+0099e7 95f3
+0099e8 81e0
+0099e9 e1fd
+0099ea 0fee
+0099eb 1df2
+0099ec 9409
+0099ed 940c a702 	EXEC
+                 
+                 _TAX_IMP:				;AA
+0099ef bf4f      	LDSR
+0099f0 2ee2      	mov		xr, ar
+0099f1 20ee      	tst		xr
+0099f2 b74f      	SVSR
+0099f3 fc50
+0099f4 d00f
+0099f5 01fd
+0099f6 9611
+0099f7 15f4
+0099f8 f028
+0099f9 91e4
+0099fa e1fd
+0099fb 0fee
+0099fc 1df2
+0099fd 9409
+0099fe 95f3
+0099ff 81e0
+009a00 e1fd
+009a01 0fee
+009a02 1df2
+009a03 9409
+009a04 940c a702 	EXEC
+                 
+                 _LDY_ABS:				;AC
+009a06 01fd      	movw	zl, XL
+009a07 15f4
+009a08 f021
+009a09 f048
+009a0a 9105
+009a0b 9114
+009a0c c009
+009a0d 32e0
+009a0e f418
+009a0f 2f05
+009a10 2d12
+009a11 c004
+009a12 efff
+009a13 95f3
+009a14 9101
+009a15 8110
+009a16 01f8
+009a17 9612      	_ABS 
+009a18 15f4
+009a19 f019
+009a1a f040
+009a1b 91e4
+009a1c c008
+009a1d 32e0
+009a1e f010
+009a1f e0f0
+009a20 c003
+009a21 2fe5
+009a22 c002
+009a23 95f3
+009a24 81e0
+009a25 bf4f
+009a26 2efe
+009a27 20ff
+009a28 b74f      	_LDY
+009a29 fc50
+009a2a d00f
+009a2b 01fd
+009a2c 9611
+009a2d 15f4
+009a2e f028
+009a2f 91e4
+009a30 e1fd
+009a31 0fee
+009a32 1df2
+009a33 9409
+009a34 95f3
+009a35 81e0
+009a36 e1fd
+009a37 0fee
+009a38 1df2
+009a39 9409
+009a3a 940c a702 	EXEC
+                 
+                 _LDA_ABS:				;AD
+009a3c 01fd      	movw	zl, XL
+009a3d 15f4
+009a3e f021
+009a3f f048
+009a40 9105
+009a41 9114
+009a42 c009
+009a43 32e0
+009a44 f418
+009a45 2f05
+009a46 2d12
+009a47 c004
+009a48 efff
+009a49 95f3
+009a4a 9101
+009a4b 8110
+009a4c 01f8
+009a4d 9612      	_ABS 
+009a4e 15f4
+009a4f f019
+009a50 f040
+009a51 91e4
+009a52 c008
+009a53 32e0
+009a54 f010
+009a55 e0f0
+009a56 c003
+009a57 2fe5
+009a58 c002
+009a59 95f3
+009a5a 81e0
+009a5b bf4f
+009a5c 2f2e
+009a5d 2322
+009a5e b74f      	_LDA
+009a5f fc50
+009a60 d00f
+009a61 01fd
+009a62 9611
+009a63 15f4
+009a64 f028
+009a65 91e4
+009a66 e1fd
+009a67 0fee
+009a68 1df2
+009a69 9409
+009a6a 95f3
+009a6b 81e0
+009a6c e1fd
+009a6d 0fee
+009a6e 1df2
+009a6f 9409
+009a70 940c a702 	EXEC
+                 
+                 _LDX_ABS:				;AE
+009a72 01fd      	movw	zl, XL
+009a73 15f4
+009a74 f021
+009a75 f048
+009a76 9105
+009a77 9114
+009a78 c009
+009a79 32e0
+009a7a f418
+009a7b 2f05
+009a7c 2d12
+009a7d c004
+009a7e efff
+009a7f 95f3
+009a80 9101
+009a81 8110
+009a82 01f8
+009a83 9612      	_ABS 
+009a84 15f4
+009a85 f019
+009a86 f040
+009a87 91e4
+009a88 c008
+009a89 32e0
+009a8a f010
+009a8b e0f0
+009a8c c003
+009a8d 2fe5
+009a8e c002
+009a8f 95f3
+009a90 81e0
+009a91 bf4f
+009a92 2eee
+009a93 20ee
+009a94 b74f      	_LDX
+009a95 fc50
+009a96 d00f
+009a97 01fd
+009a98 9611
+009a99 15f4
+009a9a f028
+009a9b 91e4
+009a9c e1fd
+009a9d 0fee
+009a9e 1df2
+009a9f 9409
+009aa0 95f3
+009aa1 81e0
+009aa2 e1fd
+009aa3 0fee
+009aa4 1df2
+009aa5 9409
+009aa6 940c a702 	EXEC
+                 
+                 _BBS2_REL:				;AF
+009aa8 01fd
+009aa9 9612
+009aaa 15f4
+009aab f021
+009aac f048
+009aad 9105
+009aae 9114
+009aaf c009
+009ab0 32e0
+009ab1 f418
+009ab2 2f05
+009ab3 2d12
+009ab4 c004
+009ab5 efff
+009ab6 95f3
+009ab7 9101
+009ab8 8110
+009ab9 01f8
+009aba e0f1
+009abb 8100
+009abc 7004
+009abd f041
+009abe 2311
+009abf f01a
+009ac0 0fa1
+009ac1 1db2
+009ac2 c003
+009ac3 0fa1
+009ac4 f008
+009ac5 95ba      	_BBS 0x04
+009ac6 fc50
+009ac7 d00f
+009ac8 01fd
+009ac9 9611
+009aca 15f4
+009acb f028
+009acc 91e4
+009acd e1fd
+009ace 0fee
+009acf 1df2
+009ad0 9409
+009ad1 95f3
+009ad2 81e0
+009ad3 e1fd
+009ad4 0fee
+009ad5 1df2
+009ad6 9409
+009ad7 940c a702 	EXEC
+                 
+                 _BCS_REL:				;B0
+009ad9 ff40      	sbrs	avsr, acp
+009ada c02a      	rjmp	_BCS1
+009adb 01fd
+009adc 15f4
+009add f019
+009ade f040
+009adf 91e4
+009ae0 c008
+009ae1 32e0
+009ae2 f010
+009ae3 e0f0
+009ae4 c003
+009ae5 2fe5
+009ae6 c002
+009ae7 95f3
+009ae8 81e0
+009ae9 9408
+009aea 23ee
+009aeb f01a
+009aec 1fae
+009aed 1db2
+009aee c003
+009aef 1fae
+009af0 f008
+009af1 95ba      	_REL
+009af2 fc50
+009af3 d00f
+009af4 01fd
+009af5 9611
+009af6 15f4
+009af7 f028
+009af8 91e4
+009af9 e1fd
+009afa 0fee
+009afb 1df2
+009afc 9409
+009afd 95f3
+009afe 81e0
+009aff e1fd
+009b00 0fee
+009b01 1df2
+009b02 9409
+009b03 940c a702 	EXEC
+                 _BCS1:
+009b05 9611      	adiw	xl, 1
+009b06 fc50
+009b07 d00f
+009b08 01fd
+009b09 9611
+009b0a 15f4
+009b0b f028
+009b0c 91e4
+009b0d e1fd
+009b0e 0fee
+009b0f 1df2
+009b10 9409
+009b11 95f3
+009b12 81e0
+009b13 e1fd
+009b14 0fee
+009b15 1df2
+009b16 9409
+009b17 940c a702 	EXEC
+                 
+                 _LDA_INDY:				;B1
+009b19 01fd      	movw	zl, XL
+009b1a 15f4
+009b1b f019
+009b1c f040
+009b1d 91e4
+009b1e c008
+009b1f 32e0
+009b20 f010
+009b21 e0f0
+009b22 c003
+009b23 2fe5
+009b24 c002
+009b25 95f3
+009b26 81e0
+009b27 e0f1
+009b28 8100
+009b29 95e3
+009b2a 8110
+009b2b 01f8
+009b2c 0def
+009b2d 1df2
+009b2e 9611      	_INDY
+009b2f 15f4
+009b30 f019
+009b31 f040
+009b32 91e4
+009b33 c008
+009b34 32e0
+009b35 f010
+009b36 e0f0
+009b37 c003
+009b38 2fe5
+009b39 c002
+009b3a 95f3
+009b3b 81e0
+009b3c bf4f
+009b3d 2f2e
+009b3e 2322
+009b3f b74f      	_LDA
+009b40 fc50
+009b41 d00f
+009b42 01fd
+009b43 9611
+009b44 15f4
+009b45 f028
+009b46 91e4
+009b47 e1fd
+009b48 0fee
+009b49 1df2
+009b4a 9409
+009b4b 95f3
+009b4c 81e0
+009b4d e1fd
+009b4e 0fee
+009b4f 1df2
+009b50 9409
+009b51 940c a702 	EXEC
+                 
+                 _LDA_IND:				;B2
+009b53 01fd      	movw	zl, XL
+009b54 15f4
+009b55 f019
+009b56 f040
+009b57 91e4
+009b58 c008
+009b59 32e0
+009b5a f010
+009b5b e0f0
+009b5c c003
+009b5d 2fe5
+009b5e c002
+009b5f 95f3
+009b60 81e0
+009b61 e0f1
+009b62 8100
+009b63 95e3
+009b64 8110
+009b65 01f8
+009b66 9611      	_IZPG
+009b67 15f4
+009b68 f019
+009b69 f040
+009b6a 91e4
+009b6b c008
+009b6c 32e0
+009b6d f010
+009b6e e0f0
+009b6f c003
+009b70 2fe5
+009b71 c002
+009b72 95f3
+009b73 81e0
+009b74 bf4f
+009b75 2f2e
+009b76 2322
+009b77 b74f      	_LDA
+009b78 fc50
+009b79 d00f
+009b7a 01fd
+009b7b 9611
+009b7c 15f4
+009b7d f028
+009b7e 91e4
+009b7f e1fd
+009b80 0fee
+009b81 1df2
+009b82 9409
+009b83 95f3
+009b84 81e0
+009b85 e1fd
+009b86 0fee
+009b87 1df2
+009b88 9409
+009b89 940c a702 	EXEC
+                 
+                 _LDY_ZPGX:				;B4
+009b8b 01fd      	movw	zl, XL
+009b8c 15f4
+009b8d f019
+009b8e f040
+009b8f 91e4
+009b90 c008
+009b91 32e0
+009b92 f010
+009b93 e0f0
+009b94 c003
+009b95 2fe5
+009b96 c002
+009b97 95f3
+009b98 81e0
+009b99 0dee
+009b9a 9611      	_ZPGX
+009b9b e0f1
+009b9c 8100
+009b9d bf4f
+009b9e 2ef0
+009b9f 20ff
+009ba0 b74f      	_LDYZ
+009ba1 fc50
+009ba2 d00f
+009ba3 01fd
+009ba4 9611
+009ba5 15f4
+009ba6 f028
+009ba7 91e4
+009ba8 e1fd
+009ba9 0fee
+009baa 1df2
+009bab 9409
+009bac 95f3
+009bad 81e0
+009bae e1fd
+009baf 0fee
+009bb0 1df2
+009bb1 9409
+009bb2 940c a702 	EXEC
+                 
+                 _LDA_ZPGX:				;B5
+009bb4 01fd      	movw	zl, XL
+009bb5 15f4
+009bb6 f019
+009bb7 f040
+009bb8 91e4
+009bb9 c008
+009bba 32e0
+009bbb f010
+009bbc e0f0
+009bbd c003
+009bbe 2fe5
+009bbf c002
+009bc0 95f3
+009bc1 81e0
+009bc2 0dee
+009bc3 9611      	_ZPGX
+009bc4 e0f1
+009bc5 8100
+009bc6 bf4f
+009bc7 2f20
+009bc8 2322
+009bc9 b74f      	_LDAZ
+009bca fc50
+009bcb d00f
+009bcc 01fd
+009bcd 9611
+009bce 15f4
+009bcf f028
+009bd0 91e4
+009bd1 e1fd
+009bd2 0fee
+009bd3 1df2
+009bd4 9409
+009bd5 95f3
+009bd6 81e0
+009bd7 e1fd
+009bd8 0fee
+009bd9 1df2
+009bda 9409
+009bdb 940c a702 	EXEC
+                 
+                 _LDX_ZPGY:				;B6
+009bdd 01fd      	movw	zl, XL
+009bde 15f4
+009bdf f019
+009be0 f040
+009be1 91e4
+009be2 c008
+009be3 32e0
+009be4 f010
+009be5 e0f0
+009be6 c003
+009be7 2fe5
+009be8 c002
+009be9 95f3
+009bea 81e0
+009beb 0def
+009bec 9611      	_ZPGY
+009bed e0f1
+009bee 8100
+009bef bf4f
+009bf0 2ee0
+009bf1 20ee
+009bf2 b74f      	_LDXZ
+009bf3 fc50
+009bf4 d00f
+009bf5 01fd
+009bf6 9611
+009bf7 15f4
+009bf8 f028
+009bf9 91e4
+009bfa e1fd
+009bfb 0fee
+009bfc 1df2
+009bfd 9409
+009bfe 95f3
+009bff 81e0
+009c00 e1fd
+009c01 0fee
+009c02 1df2
+009c03 9409
+009c04 940c a702 	EXEC
+                 
+                 _SMB3_ZPG:				;B7
+009c06 01fd
+009c07 15f4
+009c08 f019
+009c09 f040
+009c0a 91e4
+009c0b c008
+009c0c 32e0
+009c0d f010
+009c0e e0f0
+009c0f c003
+009c10 2fe5
+009c11 c002
+009c12 95f3
+009c13 81e0
+009c14 9611
+009c15 e0f1
+009c16 8100
+009c17 6008
+009c18 8300      	_SMB	0x08
+009c19 fc50
+009c1a d00f
+009c1b 01fd
+009c1c 9611
+009c1d 15f4
+009c1e f028
+009c1f 91e4
+009c20 e1fd
+009c21 0fee
+009c22 1df2
+009c23 9409
+009c24 95f3
+009c25 81e0
+009c26 e1fd
+009c27 0fee
+009c28 1df2
+009c29 9409
+009c2a 940c a702 	EXEC
+                 
+                 _CLV_IMP:				;B8
+009c2c 7b4f      	cbr		avsr, at
+009c2d fc50
+009c2e d00f
+009c2f 01fd
+009c30 9611
+009c31 15f4
+009c32 f028
+009c33 91e4
+009c34 e1fd
+009c35 0fee
+009c36 1df2
+009c37 9409
+009c38 95f3
+009c39 81e0
+009c3a e1fd
+009c3b 0fee
+009c3c 1df2
+009c3d 9409
+009c3e 940c a702 	EXEC
+                 
+                 _LDA_ABSY:				;B9
+009c40 01fd      	movw	zl, XL
+009c41 15f4
+009c42 f021
+009c43 f048
+009c44 9105
+009c45 9114
+009c46 c009
+009c47 32e0
+009c48 f418
+009c49 2f05
+009c4a 2d12
+009c4b c004
+009c4c efff
+009c4d 95f3
+009c4e 9101
+009c4f 8110
+009c50 01f8
+009c51 0def
+009c52 1df2
+009c53 9612      	_ABSY 
+009c54 15f4
+009c55 f019
+009c56 f040
+009c57 91e4
+009c58 c008
+009c59 32e0
+009c5a f010
+009c5b e0f0
+009c5c c003
+009c5d 2fe5
+009c5e c002
+009c5f 95f3
+009c60 81e0
+009c61 bf4f
+009c62 2f2e
+009c63 2322
+009c64 b74f      	_LDA
+009c65 fc50
+009c66 d00f
+009c67 01fd
+009c68 9611
+009c69 15f4
+009c6a f028
+009c6b 91e4
+009c6c e1fd
+009c6d 0fee
+009c6e 1df2
+009c6f 9409
+009c70 95f3
+009c71 81e0
+009c72 e1fd
+009c73 0fee
+009c74 1df2
+009c75 9409
+009c76 940c a702 	EXEC
+                 
+                 _TSX_IMP:				;BA
+009c78 bf4f      	LDSR
+009c79 2eec      	mov		xr, YL
+009c7a 20ee      	tst		xr
+009c7b b74f      	SVSR
+009c7c fc50
+009c7d d00f
+009c7e 01fd
+009c7f 9611
+009c80 15f4
+009c81 f028
+009c82 91e4
+009c83 e1fd
+009c84 0fee
+009c85 1df2
+009c86 9409
+009c87 95f3
+009c88 81e0
+009c89 e1fd
+009c8a 0fee
+009c8b 1df2
+009c8c 9409
+009c8d 940c a702 	EXEC
+                 
+                 _LDY_ABSX:				;BC
+009c8f 01fd      	movw	zl, XL
+009c90 15f4
+009c91 f021
+009c92 f048
+009c93 9105
+009c94 9114
+009c95 c009
+009c96 32e0
+009c97 f418
+009c98 2f05
+009c99 2d12
+009c9a c004
+009c9b efff
+009c9c 95f3
+009c9d 9101
+009c9e 8110
+009c9f 01f8
+009ca0 0dee
+009ca1 1df2
+009ca2 9612      	_ABSX
+009ca3 15f4
+009ca4 f019
+009ca5 f040
+009ca6 91e4
+009ca7 c008
+009ca8 32e0
+009ca9 f010
+009caa e0f0
+009cab c003
+009cac 2fe5
+009cad c002
+009cae 95f3
+009caf 81e0
+009cb0 bf4f
+009cb1 2efe
+009cb2 20ff
+009cb3 b74f      	_LDY
+009cb4 fc50
+009cb5 d00f
+009cb6 01fd
+009cb7 9611
+009cb8 15f4
+009cb9 f028
+009cba 91e4
+009cbb e1fd
+009cbc 0fee
+009cbd 1df2
+009cbe 9409
+009cbf 95f3
+009cc0 81e0
+009cc1 e1fd
+009cc2 0fee
+009cc3 1df2
+009cc4 9409
+009cc5 940c a702 	EXEC
+                 
+                 _LDA_ABSX:				;BD
+009cc7 01fd      	movw	zl, XL
+009cc8 15f4
+009cc9 f021
+009cca f048
+009ccb 9105
+009ccc 9114
+009ccd c009
+009cce 32e0
+009ccf f418
+009cd0 2f05
+009cd1 2d12
+009cd2 c004
+009cd3 efff
+009cd4 95f3
+009cd5 9101
+009cd6 8110
+009cd7 01f8
+009cd8 0dee
+009cd9 1df2
+009cda 9612      	_ABSX 
+009cdb 15f4
+009cdc f019
+009cdd f040
+009cde 91e4
+009cdf c008
+009ce0 32e0
+009ce1 f010
+009ce2 e0f0
+009ce3 c003
+009ce4 2fe5
+009ce5 c002
+009ce6 95f3
+009ce7 81e0
+009ce8 bf4f
+009ce9 2f2e
+009cea 2322
+009ceb b74f      	_LDA
+009cec fc50
+009ced d00f
+009cee 01fd
+009cef 9611
+009cf0 15f4
+009cf1 f028
+009cf2 91e4
+009cf3 e1fd
+009cf4 0fee
+009cf5 1df2
+009cf6 9409
+009cf7 95f3
+009cf8 81e0
+009cf9 e1fd
+009cfa 0fee
+009cfb 1df2
+009cfc 9409
+009cfd 940c a702 	EXEC
+                 
+                 _LDX_ABSY:				;BE
+009cff 01fd      	movw	zl, XL
+009d00 15f4
+009d01 f021
+009d02 f048
+009d03 9105
+009d04 9114
+009d05 c009
+009d06 32e0
+009d07 f418
+009d08 2f05
+009d09 2d12
+009d0a c004
+009d0b efff
+009d0c 95f3
+009d0d 9101
+009d0e 8110
+009d0f 01f8
+009d10 0def
+009d11 1df2
+009d12 9612      	_ABSY 
+009d13 15f4
+009d14 f019
+009d15 f040
+009d16 91e4
+009d17 c008
+009d18 32e0
+009d19 f010
+009d1a e0f0
+009d1b c003
+009d1c 2fe5
+009d1d c002
+009d1e 95f3
+009d1f 81e0
+009d20 bf4f
+009d21 2eee
+009d22 20ee
+009d23 b74f      	_LDX
+009d24 fc50
+009d25 d00f
+009d26 01fd
+009d27 9611
+009d28 15f4
+009d29 f028
+009d2a 91e4
+009d2b e1fd
+009d2c 0fee
+009d2d 1df2
+009d2e 9409
+009d2f 95f3
+009d30 81e0
+009d31 e1fd
+009d32 0fee
+009d33 1df2
+009d34 9409
+009d35 940c a702 	EXEC
+                 
+                 _BBS3_REL:				;BF
+009d37 01fd
+009d38 9612
+009d39 15f4
+009d3a f021
+009d3b f048
+009d3c 9105
+009d3d 9114
+009d3e c009
+009d3f 32e0
+009d40 f418
+009d41 2f05
+009d42 2d12
+009d43 c004
+009d44 efff
+009d45 95f3
+009d46 9101
+009d47 8110
+009d48 01f8
+009d49 e0f1
+009d4a 8100
+009d4b 7008
+009d4c f041
+009d4d 2311
+009d4e f01a
+009d4f 0fa1
+009d50 1db2
+009d51 c003
+009d52 0fa1
+009d53 f008
+009d54 95ba      	_BBS 0x08
+009d55 fc50
+009d56 d00f
+009d57 01fd
+009d58 9611
+009d59 15f4
+009d5a f028
+009d5b 91e4
+009d5c e1fd
+009d5d 0fee
+009d5e 1df2
+009d5f 9409
+009d60 95f3
+009d61 81e0
+009d62 e1fd
+009d63 0fee
+009d64 1df2
+009d65 9409
+009d66 940c a702 	EXEC
+                 
+                 _CPY_IMM:				;C0
+009d68 01fd      	movw	zl, XL
+009d69 9611      	_IMM 
+009d6a 15f4
+009d6b f019
+009d6c f040
+009d6d 91e4
+009d6e c008
+009d6f 32e0
+009d70 f010
+009d71 e0f0
+009d72 c003
+009d73 2fe5
+009d74 c002
+009d75 95f3
+009d76 81e0
+009d77 bf4f
+009d78 16fe
+009d79 b74f
+009d7a 2543      	_CPY
+009d7b fc50
+009d7c d00f
+009d7d 01fd
+009d7e 9611
+009d7f 15f4
+009d80 f028
+009d81 91e4
+009d82 e1fd
+009d83 0fee
+009d84 1df2
+009d85 9409
+009d86 95f3
+009d87 81e0
+009d88 e1fd
+009d89 0fee
+009d8a 1df2
+009d8b 9409
+009d8c 940c a702 	EXEC
+                 
+                 _CMP_INDX:				;C1
+009d8e 01fd      	movw	zl, XL
+009d8f 15f4
+009d90 f019
+009d91 f040
+009d92 91e4
+009d93 c008
+009d94 32e0
+009d95 f010
+009d96 e0f0
+009d97 c003
+009d98 2fe5
+009d99 c002
+009d9a 95f3
+009d9b 81e0
+009d9c 0dee
+009d9d e0f1
+009d9e 8100
+009d9f 95e3
+009da0 8110
+009da1 01f8
+009da2 9611      	_INDX 
+009da3 15f4
+009da4 f019
+009da5 f040
+009da6 91e4
+009da7 c008
+009da8 32e0
+009da9 f010
+009daa e0f0
+009dab c003
+009dac 2fe5
+009dad c002
+009dae 95f3
+009daf 81e0
+009db0 bf4f
+009db1 172e
+009db2 b74f
+009db3 2543      	_CMP
+009db4 fc50
+009db5 d00f
+009db6 01fd
+009db7 9611
+009db8 15f4
+009db9 f028
+009dba 91e4
+009dbb e1fd
+009dbc 0fee
+009dbd 1df2
+009dbe 9409
+009dbf 95f3
+009dc0 81e0
+009dc1 e1fd
+009dc2 0fee
+009dc3 1df2
+009dc4 9409
+009dc5 940c a702 	EXEC
+                 
+                 _CPY_ZPG:				;C4
+009dc7 01fd      	movw	zl, XL
+009dc8 15f4
+009dc9 f019
+009dca f040
+009dcb 91e4
+009dcc c008
+009dcd 32e0
+009dce f010
+009dcf e0f0
+009dd0 c003
+009dd1 2fe5
+009dd2 c002
+009dd3 95f3
+009dd4 81e0
+009dd5 9611      	_ZPG
+009dd6 e0f1
+009dd7 8100
+009dd8 bf4f
+009dd9 16f0
+009dda b74f
+009ddb 2543      	_CPYZ
+009ddc fc50
+009ddd d00f
+009dde 01fd
+009ddf 9611
+009de0 15f4
+009de1 f028
+009de2 91e4
+009de3 e1fd
+009de4 0fee
+009de5 1df2
+009de6 9409
+009de7 95f3
+009de8 81e0
+009de9 e1fd
+009dea 0fee
+009deb 1df2
+009dec 9409
+009ded 940c a702 	EXEC
+                 
+                 _CMP_ZPG:				;C5
+009def 01fd      	movw	zl, XL
+009df0 15f4
+009df1 f019
+009df2 f040
+009df3 91e4
+009df4 c008
+009df5 32e0
+009df6 f010
+009df7 e0f0
+009df8 c003
+009df9 2fe5
+009dfa c002
+009dfb 95f3
+009dfc 81e0
+009dfd 9611      	_ZPG
+009dfe e0f1
+009dff 8100
+009e00 bf4f
+009e01 1720
+009e02 b74f
+009e03 2543      	_CMPZ
+009e04 fc50
+009e05 d00f
+009e06 01fd
+009e07 9611
+009e08 15f4
+009e09 f028
+009e0a 91e4
+009e0b e1fd
+009e0c 0fee
+009e0d 1df2
+009e0e 9409
+009e0f 95f3
+009e10 81e0
+009e11 e1fd
+009e12 0fee
+009e13 1df2
+009e14 9409
+009e15 940c a702 	EXEC
+                 
+                 _DEC_ZPG:				;C6
+009e17 01fd      	movw	zl, XL
+009e18 15f4
+009e19 f019
+009e1a f040
+009e1b 91e4
+009e1c c008
+009e1d 32e0
+009e1e f010
+009e1f e0f0
+009e20 c003
+009e21 2fe5
+009e22 c002
+009e23 95f3
+009e24 81e0
+009e25 9611      	_ZPG
+009e26 e0f1
+009e27 8100
+009e28 bf4f
+009e29 950a
+009e2a b74f
+009e2b 8300      	_DECZ
+009e2c fc50
+009e2d d00f
+009e2e 01fd
+009e2f 9611
+009e30 15f4
+009e31 f028
+009e32 91e4
+009e33 e1fd
+009e34 0fee
+009e35 1df2
+009e36 9409
+009e37 95f3
+009e38 81e0
+009e39 e1fd
+009e3a 0fee
+009e3b 1df2
+009e3c 9409
+009e3d 940c a702 	EXEC
+                 
+                 _SMB4_ZPG:				;C7
+009e3f 01fd
+009e40 15f4
+009e41 f019
+009e42 f040
+009e43 91e4
+009e44 c008
+009e45 32e0
+009e46 f010
+009e47 e0f0
+009e48 c003
+009e49 2fe5
+009e4a c002
+009e4b 95f3
+009e4c 81e0
+009e4d 9611
+009e4e e0f1
+009e4f 8100
+009e50 6100
+009e51 8300      	_SMB	0x10
+009e52 fc50
+009e53 d00f
+009e54 01fd
+009e55 9611
+009e56 15f4
+009e57 f028
+009e58 91e4
+009e59 e1fd
+009e5a 0fee
+009e5b 1df2
+009e5c 9409
+009e5d 95f3
+009e5e 81e0
+009e5f e1fd
+009e60 0fee
+009e61 1df2
+009e62 9409
+009e63 940c a702 	EXEC
+                 
+                 _INY_IMP:				;C8
+009e65 bf4f      	LDSR
+009e66 94f3      	inc		yr
+009e67 b74f      	SVSR
+009e68 fc50
+009e69 d00f
+009e6a 01fd
+009e6b 9611
+009e6c 15f4
+009e6d f028
+009e6e 91e4
+009e6f e1fd
+009e70 0fee
+009e71 1df2
+009e72 9409
+009e73 95f3
+009e74 81e0
+009e75 e1fd
+009e76 0fee
+009e77 1df2
+009e78 9409
+009e79 940c a702 	EXEC
+                 
+                 _CMP_IMM:				;C9
+009e7b 01fd      	movw	zl, XL
+009e7c 9611      	_IMM 
+009e7d 15f4
+009e7e f019
+009e7f f040
+009e80 91e4
+009e81 c008
+009e82 32e0
+009e83 f010
+009e84 e0f0
+009e85 c003
+009e86 2fe5
+009e87 c002
+009e88 95f3
+009e89 81e0
+009e8a bf4f
+009e8b 172e
+009e8c b74f
+009e8d 2543      	_CMP
+009e8e fc50
+009e8f d00f
+009e90 01fd
+009e91 9611
+009e92 15f4
+009e93 f028
+009e94 91e4
+009e95 e1fd
+009e96 0fee
+009e97 1df2
+009e98 9409
+009e99 95f3
+009e9a 81e0
+009e9b e1fd
+009e9c 0fee
+009e9d 1df2
+009e9e 9409
+009e9f 940c a702 	EXEC
+                 
+                 _DEX_IMP:				;CA
+009ea1 bf4f      	LDSR
+009ea2 94ea      	dec		xr
+009ea3 b74f      	SVSR
+009ea4 fc50
+009ea5 d00f
+009ea6 01fd
+009ea7 9611
+009ea8 15f4
+009ea9 f028
+009eaa 91e4
+009eab e1fd
+009eac 0fee
+009ead 1df2
+009eae 9409
+009eaf 95f3
+009eb0 81e0
+009eb1 e1fd
+009eb2 0fee
+009eb3 1df2
+009eb4 9409
+009eb5 940c a702 	EXEC
+                 
+                 _WAI_IMP:				;CB
+009eb7 9711      	sbiw	xl, 0x01
+009eb8 fc50
+009eb9 d00f
+009eba 01fd
+009ebb 9611
+009ebc 15f4
+009ebd f028
+009ebe 91e4
+009ebf e1fd
+009ec0 0fee
+009ec1 1df2
+009ec2 9409
+009ec3 95f3
+009ec4 81e0
+009ec5 e1fd
+009ec6 0fee
+009ec7 1df2
+009ec8 9409
+009ec9 940c a702 	EXEC
+                 
+                 _CPY_ABS:				;CC
+009ecb 01fd      	movw	zl, XL
+009ecc 15f4
+009ecd f021
+009ece f048
+009ecf 9105
+009ed0 9114
+009ed1 c009
+009ed2 32e0
+009ed3 f418
+009ed4 2f05
+009ed5 2d12
+009ed6 c004
+009ed7 efff
+009ed8 95f3
+009ed9 9101
+009eda 8110
+009edb 01f8
+009edc 9612      	_ABS 
+009edd 15f4
+009ede f019
+009edf f040
+009ee0 91e4
+009ee1 c008
+009ee2 32e0
+009ee3 f010
+009ee4 e0f0
+009ee5 c003
+009ee6 2fe5
+009ee7 c002
+009ee8 95f3
+009ee9 81e0
+009eea bf4f
+009eeb 16fe
+009eec b74f
+009eed 2543      	_CPY
+009eee fc50
+009eef d00f
+009ef0 01fd
+009ef1 9611
+009ef2 15f4
+009ef3 f028
+009ef4 91e4
+009ef5 e1fd
+009ef6 0fee
+009ef7 1df2
+009ef8 9409
+009ef9 95f3
+009efa 81e0
+009efb e1fd
+009efc 0fee
+009efd 1df2
+009efe 9409
+009eff 940c a702 	EXEC
+                 
+                 _CMP_ABS:				;CD
+009f01 01fd      	movw	zl, XL
+009f02 15f4
+009f03 f021
+009f04 f048
+009f05 9105
+009f06 9114
+009f07 c009
+009f08 32e0
+009f09 f418
+009f0a 2f05
+009f0b 2d12
+009f0c c004
+009f0d efff
+009f0e 95f3
+009f0f 9101
+009f10 8110
+009f11 01f8
+009f12 9612      	_ABS 
+009f13 15f4
+009f14 f019
+009f15 f040
+009f16 91e4
+009f17 c008
+009f18 32e0
+009f19 f010
+009f1a e0f0
+009f1b c003
+009f1c 2fe5
+009f1d c002
+009f1e 95f3
+009f1f 81e0
+009f20 bf4f
+009f21 172e
+009f22 b74f
+009f23 2543      	_CMP
+009f24 fc50
+009f25 d00f
+009f26 01fd
+009f27 9611
+009f28 15f4
+009f29 f028
+009f2a 91e4
+009f2b e1fd
+009f2c 0fee
+009f2d 1df2
+009f2e 9409
+009f2f 95f3
+009f30 81e0
+009f31 e1fd
+009f32 0fee
+009f33 1df2
+009f34 9409
+009f35 940c a702 	EXEC
+                 
+                 _DEC_ABS:				;CE
+009f37 01fd      	movw	zl, XL
+009f38 15f4
+009f39 f021
+009f3a f048
+009f3b 9105
+009f3c 9114
+009f3d c009
+009f3e 32e0
+009f3f f418
+009f40 2f05
+009f41 2d12
+009f42 c004
+009f43 efff
+009f44 95f3
+009f45 9101
+009f46 8110
+009f47 01f8
+009f48 9612      	_ABS 
+009f49 15f4
+009f4a f019
+009f4b f050
+009f4c 9104
+009f4d c00b
+009f4e 32e0
+009f4f f020
+009f50 e0f0
+009f51 8100
+009f52 2df4
+009f53 c005
+009f54 2f05
+009f55 c003
+009f56 95f3
+009f57 8100
+009f58 95fa
+009f59 bf4f
+009f5a 950a
+009f5b b74f
+009f5c 15f4
+009f5d f021
+009f5e f468
+009f5f 95f3
+009f60 8300
+009f61 c00a
+009f62 32e0
+009f63 f430
+009f64 b30e
+009f65 350a
+009f66 f429
+009f67 9afa
+009f68 9af9
+009f69 c002
+009f6a 27ff
+009f6b 8300      	_DEC
+009f6c fc50
+009f6d d00f
+009f6e 01fd
+009f6f 9611
+009f70 15f4
+009f71 f028
+009f72 91e4
+009f73 e1fd
+009f74 0fee
+009f75 1df2
+009f76 9409
+009f77 95f3
+009f78 81e0
+009f79 e1fd
+009f7a 0fee
+009f7b 1df2
+009f7c 9409
+009f7d 940c a702 	EXEC
+                 
+                 _BBS4_REL:				;CF
+009f7f 01fd
+009f80 9612
+009f81 15f4
+009f82 f021
+009f83 f048
+009f84 9105
+009f85 9114
+009f86 c009
+009f87 32e0
+009f88 f418
+009f89 2f05
+009f8a 2d12
+009f8b c004
+009f8c efff
+009f8d 95f3
+009f8e 9101
+009f8f 8110
+009f90 01f8
+009f91 e0f1
+009f92 8100
+009f93 7100
+009f94 f041
+009f95 2311
+009f96 f01a
+009f97 0fa1
+009f98 1db2
+009f99 c003
+009f9a 0fa1
+009f9b f008
+009f9c 95ba      	_BBS 0x10
+009f9d fc50
+009f9e d00f
+009f9f 01fd
+009fa0 9611
+009fa1 15f4
+009fa2 f028
+009fa3 91e4
+009fa4 e1fd
+009fa5 0fee
+009fa6 1df2
+009fa7 9409
+009fa8 95f3
+009fa9 81e0
+009faa e1fd
+009fab 0fee
+009fac 1df2
+009fad 9409
+009fae 940c a702 	EXEC
+                 
+                 _BNE_REL:				;D0
+009fb0 fd41      	sbrc	avsr, azp
+009fb1 c02a      	rjmp	_BNE1
+009fb2 01fd
+009fb3 15f4
+009fb4 f019
+009fb5 f040
+009fb6 91e4
+009fb7 c008
+009fb8 32e0
+009fb9 f010
+009fba e0f0
+009fbb c003
+009fbc 2fe5
+009fbd c002
+009fbe 95f3
+009fbf 81e0
+009fc0 9408
+009fc1 23ee
+009fc2 f01a
+009fc3 1fae
+009fc4 1db2
+009fc5 c003
+009fc6 1fae
+009fc7 f008
+009fc8 95ba      	_REL
+009fc9 fc50
+009fca d00f
+009fcb 01fd
+009fcc 9611
+009fcd 15f4
+009fce f028
+009fcf 91e4
+009fd0 e1fd
+009fd1 0fee
+009fd2 1df2
+009fd3 9409
+009fd4 95f3
+009fd5 81e0
+009fd6 e1fd
+009fd7 0fee
+009fd8 1df2
+009fd9 9409
+009fda 940c a702 	EXEC
+                 _BNE1:
+009fdc 9611      	adiw	XL, 1
+009fdd fc50
+009fde d00f
+009fdf 01fd
+009fe0 9611
+009fe1 15f4
+009fe2 f028
+009fe3 91e4
+009fe4 e1fd
+009fe5 0fee
+009fe6 1df2
+009fe7 9409
+009fe8 95f3
+009fe9 81e0
+009fea e1fd
+009feb 0fee
+009fec 1df2
+009fed 9409
+009fee 940c a702 	EXEC
+                 
+                 _CMP_INDY:				;D1
+009ff0 01fd      	movw	zl, XL
+009ff1 15f4
+009ff2 f019
+009ff3 f040
+009ff4 91e4
+009ff5 c008
+009ff6 32e0
+009ff7 f010
+009ff8 e0f0
+009ff9 c003
+009ffa 2fe5
+009ffb c002
+009ffc 95f3
+009ffd 81e0
+009ffe e0f1
+009fff 8100
+00a000 95e3
+00a001 8110
+00a002 01f8
+00a003 0def
+00a004 1df2
+00a005 9611      	_INDY
+00a006 15f4
+00a007 f019
+00a008 f040
+00a009 91e4
+00a00a c008
+00a00b 32e0
+00a00c f010
+00a00d e0f0
+00a00e c003
+00a00f 2fe5
+00a010 c002
+00a011 95f3
+00a012 81e0
+00a013 bf4f
+00a014 172e
+00a015 b74f
+00a016 2543      	_CMP
+00a017 fc50
+00a018 d00f
+00a019 01fd
+00a01a 9611
+00a01b 15f4
+00a01c f028
+00a01d 91e4
+00a01e e1fd
+00a01f 0fee
+00a020 1df2
+00a021 9409
+00a022 95f3
+00a023 81e0
+00a024 e1fd
+00a025 0fee
+00a026 1df2
+00a027 9409
+00a028 940c a702 	EXEC
+                 
+                 _CMP_IND:				;D2
+00a02a 01fd      	movw	zl, XL
+00a02b 15f4
+00a02c f019
+00a02d f040
+00a02e 91e4
+00a02f c008
+00a030 32e0
+00a031 f010
+00a032 e0f0
+00a033 c003
+00a034 2fe5
+00a035 c002
+00a036 95f3
+00a037 81e0
+00a038 e0f1
+00a039 8100
+00a03a 95e3
+00a03b 8110
+00a03c 01f8
+00a03d 9611      	_IZPG
+00a03e 15f4
+00a03f f019
+00a040 f040
+00a041 91e4
+00a042 c008
+00a043 32e0
+00a044 f010
+00a045 e0f0
+00a046 c003
+00a047 2fe5
+00a048 c002
+00a049 95f3
+00a04a 81e0
+00a04b bf4f
+00a04c 172e
+00a04d b74f
+00a04e 2543      	_CMP
+00a04f fc50
+00a050 d00f
+00a051 01fd
+00a052 9611
+00a053 15f4
+00a054 f028
+00a055 91e4
+00a056 e1fd
+00a057 0fee
+00a058 1df2
+00a059 9409
+00a05a 95f3
+00a05b 81e0
+00a05c e1fd
+00a05d 0fee
+00a05e 1df2
+00a05f 9409
+00a060 940c a702 	EXEC
+                 
+                 _CMP_ZPGX:				;D5
+00a062 01fd      	movw	zl, XL
+00a063 15f4
+00a064 f019
+00a065 f040
+00a066 91e4
+00a067 c008
+00a068 32e0
+00a069 f010
+00a06a e0f0
+00a06b c003
+00a06c 2fe5
+00a06d c002
+00a06e 95f3
+00a06f 81e0
+00a070 0dee
+00a071 9611      	_ZPGX
+00a072 e0f1
+00a073 8100
+00a074 bf4f
+00a075 1720
+00a076 b74f
+00a077 2543      	_CMPZ
+00a078 fc50
+00a079 d00f
+00a07a 01fd
+00a07b 9611
+00a07c 15f4
+00a07d f028
+00a07e 91e4
+00a07f e1fd
+00a080 0fee
+00a081 1df2
+00a082 9409
+00a083 95f3
+00a084 81e0
+00a085 e1fd
+00a086 0fee
+00a087 1df2
+00a088 9409
+00a089 940c a702 	EXEC
+                 
+                 _DEC_ZPGX:				;D6
+00a08b 01fd      	movw	zl, XL
+00a08c 15f4
+00a08d f019
+00a08e f040
+00a08f 91e4
+00a090 c008
+00a091 32e0
+00a092 f010
+00a093 e0f0
+00a094 c003
+00a095 2fe5
+00a096 c002
+00a097 95f3
+00a098 81e0
+00a099 0dee
+00a09a 9611      	_ZPGX
+00a09b e0f1
+00a09c 8100
+00a09d bf4f
+00a09e 950a
+00a09f b74f
+00a0a0 8300      	_DECZ
+00a0a1 fc50
+00a0a2 d00f
+00a0a3 01fd
+00a0a4 9611
+00a0a5 15f4
+00a0a6 f028
+00a0a7 91e4
+00a0a8 e1fd
+00a0a9 0fee
+00a0aa 1df2
+00a0ab 9409
+00a0ac 95f3
+00a0ad 81e0
+00a0ae e1fd
+00a0af 0fee
+00a0b0 1df2
+00a0b1 9409
+00a0b2 940c a702 	EXEC
+                 
+                 _SMB5_ZPG:				;D7
+00a0b4 01fd
+00a0b5 15f4
+00a0b6 f019
+00a0b7 f040
+00a0b8 91e4
+00a0b9 c008
+00a0ba 32e0
+00a0bb f010
+00a0bc e0f0
+00a0bd c003
+00a0be 2fe5
+00a0bf c002
+00a0c0 95f3
+00a0c1 81e0
+00a0c2 9611
+00a0c3 e0f1
+00a0c4 8100
+00a0c5 6200
+00a0c6 8300      	_SMB	0x20
+00a0c7 fc50
+00a0c8 d00f
+00a0c9 01fd
+00a0ca 9611
+00a0cb 15f4
+00a0cc f028
+00a0cd 91e4
+00a0ce e1fd
+00a0cf 0fee
+00a0d0 1df2
+00a0d1 9409
+00a0d2 95f3
+00a0d3 81e0
+00a0d4 e1fd
+00a0d5 0fee
+00a0d6 1df2
+00a0d7 9409
+00a0d8 940c a702 	EXEC
+                 
+                 _CLD_IMP:				;D8
+00a0da 7f37      	andi	sr, ss+so+sx+sb+si+sz+sc
+00a0db fc50
+00a0dc d00f
+00a0dd 01fd
+00a0de 9611
+00a0df 15f4
+00a0e0 f028
+00a0e1 91e4
+00a0e2 e1fd
+00a0e3 0fee
+00a0e4 1df2
+00a0e5 9409
+00a0e6 95f3
+00a0e7 81e0
+00a0e8 e1fd
+00a0e9 0fee
+00a0ea 1df2
+00a0eb 9409
+00a0ec 940c a702 	EXEC
+                 
+                 _CMP_ABSY:				;D9
+00a0ee 01fd      	movw	zl, XL
+00a0ef 15f4
+00a0f0 f021
+00a0f1 f048
+00a0f2 9105
+00a0f3 9114
+00a0f4 c009
+00a0f5 32e0
+00a0f6 f418
+00a0f7 2f05
+00a0f8 2d12
+00a0f9 c004
+00a0fa efff
+00a0fb 95f3
+00a0fc 9101
+00a0fd 8110
+00a0fe 01f8
+00a0ff 0def
+00a100 1df2
+00a101 9612      	_ABSY
+00a102 15f4
+00a103 f019
+00a104 f040
+00a105 91e4
+00a106 c008
+00a107 32e0
+00a108 f010
+00a109 e0f0
+00a10a c003
+00a10b 2fe5
+00a10c c002
+00a10d 95f3
+00a10e 81e0
+00a10f bf4f
+00a110 172e
+00a111 b74f
+00a112 2543      	_CMP
+00a113 fc50
+00a114 d00f
+00a115 01fd
+00a116 9611
+00a117 15f4
+00a118 f028
+00a119 91e4
+00a11a e1fd
+00a11b 0fee
+00a11c 1df2
+00a11d 9409
+00a11e 95f3
+00a11f 81e0
+00a120 e1fd
+00a121 0fee
+00a122 1df2
+00a123 9409
+00a124 940c a702 	EXEC
+                 
+                 _PHX_IMP:				;DA
+00a126 82e8      	st		Y, xr
+00a127 95ca      	dec		yl
+00a128 fc50
+00a129 d00f
+00a12a 01fd
+00a12b 9611
+00a12c 15f4
+00a12d f028
+00a12e 91e4
+00a12f e1fd
+00a130 0fee
+00a131 1df2
+00a132 9409
+00a133 95f3
+00a134 81e0
+00a135 e1fd
+00a136 0fee
+00a137 1df2
+00a138 9409
+00a139 940c a702 	EXEC
+                 
+                 _STP_IMP:				;DB
+                 loop:
+00a13b cfff      	rjmp	loop	
+                 
+                 _CMP_ABSX:				;DD
+00a13c 01fd      	movw	zl, XL
+00a13d 15f4
+00a13e f021
+00a13f f048
+00a140 9105
+00a141 9114
+00a142 c009
+00a143 32e0
+00a144 f418
+00a145 2f05
+00a146 2d12
+00a147 c004
+00a148 efff
+00a149 95f3
+00a14a 9101
+00a14b 8110
+00a14c 01f8
+00a14d 0dee
+00a14e 1df2
+00a14f 9612      	_ABSX
+00a150 15f4
+00a151 f019
+00a152 f040
+00a153 91e4
+00a154 c008
+00a155 32e0
+00a156 f010
+00a157 e0f0
+00a158 c003
+00a159 2fe5
+00a15a c002
+00a15b 95f3
+00a15c 81e0
+00a15d bf4f
+00a15e 172e
+00a15f b74f
+00a160 2543      	_CMP
+00a161 fc50
+00a162 d00f
+00a163 01fd
+00a164 9611
+00a165 15f4
+00a166 f028
+00a167 91e4
+00a168 e1fd
+00a169 0fee
+00a16a 1df2
+00a16b 9409
+00a16c 95f3
+00a16d 81e0
+00a16e e1fd
+00a16f 0fee
+00a170 1df2
+00a171 9409
+00a172 940c a702 	EXEC
+                 
+                 _DEC_ABSX:				;DE
+00a174 01fd      	movw	zl, XL
+00a175 15f4
+00a176 f021
+00a177 f048
+00a178 9105
+00a179 9114
+00a17a c009
+00a17b 32e0
+00a17c f418
+00a17d 2f05
+00a17e 2d12
+00a17f c004
+00a180 efff
+00a181 95f3
+00a182 9101
+00a183 8110
+00a184 01f8
+00a185 0dee
+00a186 1df2
+00a187 9612      	_ABSX 
+00a188 15f4
+00a189 f019
+00a18a f050
+00a18b 9104
+00a18c c00b
+00a18d 32e0
+00a18e f020
+00a18f e0f0
+00a190 8100
+00a191 2df4
+00a192 c005
+00a193 2f05
+00a194 c003
+00a195 95f3
+00a196 8100
+00a197 95fa
+00a198 bf4f
+00a199 950a
+00a19a b74f
+00a19b 15f4
+00a19c f021
+00a19d f468
+00a19e 95f3
+00a19f 8300
+00a1a0 c00a
+00a1a1 32e0
+00a1a2 f430
+00a1a3 b30e
+00a1a4 350a
+00a1a5 f429
+00a1a6 9afa
+00a1a7 9af9
+00a1a8 c002
+00a1a9 27ff
+00a1aa 8300      	_DEC
+00a1ab fc50
+00a1ac d00f
+00a1ad 01fd
+00a1ae 9611
+00a1af 15f4
+00a1b0 f028
+00a1b1 91e4
+00a1b2 e1fd
+00a1b3 0fee
+00a1b4 1df2
+00a1b5 9409
+00a1b6 95f3
+00a1b7 81e0
+00a1b8 e1fd
+00a1b9 0fee
+00a1ba 1df2
+00a1bb 9409
+00a1bc 940c a702 	EXEC
+                 
+                 _BBS5_REL:				;DF
+00a1be 01fd
+00a1bf 9612
+00a1c0 15f4
+00a1c1 f021
+00a1c2 f048
+00a1c3 9105
+00a1c4 9114
+00a1c5 c009
+00a1c6 32e0
+00a1c7 f418
+00a1c8 2f05
+00a1c9 2d12
+00a1ca c004
+00a1cb efff
+00a1cc 95f3
+00a1cd 9101
+00a1ce 8110
+00a1cf 01f8
+00a1d0 e0f1
+00a1d1 8100
+00a1d2 7200
+00a1d3 f041
+00a1d4 2311
+00a1d5 f01a
+00a1d6 0fa1
+00a1d7 1db2
+00a1d8 c003
+00a1d9 0fa1
+00a1da f008
+00a1db 95ba      	_BBS 0x20
+00a1dc fc50
+00a1dd d00f
+00a1de 01fd
+00a1df 9611
+00a1e0 15f4
+00a1e1 f028
+00a1e2 91e4
+00a1e3 e1fd
+00a1e4 0fee
+00a1e5 1df2
+00a1e6 9409
+00a1e7 95f3
+00a1e8 81e0
+00a1e9 e1fd
+00a1ea 0fee
+00a1eb 1df2
+00a1ec 9409
+00a1ed 940c a702 	EXEC
+                 
+                 _CPX_IMM:				;E0
+00a1ef 01fd      	movw	zl, XL
+00a1f0 9611      	_IMM 
+00a1f1 15f4
+00a1f2 f019
+00a1f3 f040
+00a1f4 91e4
+00a1f5 c008
+00a1f6 32e0
+00a1f7 f010
+00a1f8 e0f0
+00a1f9 c003
+00a1fa 2fe5
+00a1fb c002
+00a1fc 95f3
+00a1fd 81e0
+00a1fe bf4f
+00a1ff 16ee
+00a200 b74f
+00a201 2543      	_CPX
+00a202 fc50
+00a203 d00f
+00a204 01fd
+00a205 9611
+00a206 15f4
+00a207 f028
+00a208 91e4
+00a209 e1fd
+00a20a 0fee
+00a20b 1df2
+00a20c 9409
+00a20d 95f3
+00a20e 81e0
+00a20f e1fd
+00a210 0fee
+00a211 1df2
+00a212 9409
+00a213 940c a702 	EXEC
+                 
+                 _SBC_INDX:				;E1
+00a215 01fd      	movw	zl, XL
+00a216 15f4
+00a217 f019
+00a218 f040
+00a219 91e4
+00a21a c008
+00a21b 32e0
+00a21c f010
+00a21d e0f0
+00a21e c003
+00a21f 2fe5
+00a220 c002
+00a221 95f3
+00a222 81e0
+00a223 0dee
+00a224 e0f1
+00a225 8100
+00a226 95e3
+00a227 8110
+00a228 01f8
+00a229 9611      	_INDX 
+00a22a 15f4
+00a22b f019
+00a22c f040
+00a22d 91e4
+00a22e c008
+00a22f 32e0
+00a230 f010
+00a231 e0f0
+00a232 c003
+00a233 2fe5
+00a234 c002
+00a235 95f3
+00a236 81e0
+00a237 2543
+00a238 bf4f
+00a239 9418
+00a23a 0b2e
+00a23b ff33
+00a23c c00a
+00a23d b70f
+00a23e f40d
+00a23f 5026
+00a240 ff00
+00a241 c003
+00a242 5620
+00a243 1f00
+00a244 2503
+00a245 9507
+00a246 2322
+00a247 b74f
+00a248 fb43
+00a249 f946
+00a24a 2543      	_SBC
+00a24b fc50
+00a24c d00f
+00a24d 01fd
+00a24e 9611
+00a24f 15f4
+00a250 f028
+00a251 91e4
+00a252 e1fd
+00a253 0fee
+00a254 1df2
+00a255 9409
+00a256 95f3
+00a257 81e0
+00a258 e1fd
+00a259 0fee
+00a25a 1df2
+00a25b 9409
+00a25c 940c a702 	EXEC
+                 
+                 _CPX_ZPG:				;E4
+00a25e 01fd      	movw	zl, XL
+00a25f 15f4
+00a260 f019
+00a261 f040
+00a262 91e4
+00a263 c008
+00a264 32e0
+00a265 f010
+00a266 e0f0
+00a267 c003
+00a268 2fe5
+00a269 c002
+00a26a 95f3
+00a26b 81e0
+00a26c 9611      	_ZPG
+00a26d e0f1
+00a26e 8100
+00a26f bf4f
+00a270 16e0
+00a271 b74f
+00a272 2543      	_CPXZ
+00a273 fc50
+00a274 d00f
+00a275 01fd
+00a276 9611
+00a277 15f4
+00a278 f028
+00a279 91e4
+00a27a e1fd
+00a27b 0fee
+00a27c 1df2
+00a27d 9409
+00a27e 95f3
+00a27f 81e0
+00a280 e1fd
+00a281 0fee
+00a282 1df2
+00a283 9409
+00a284 940c a702 	EXEC
+                 
+                 _SBC_ZPG:				;E5
+00a286 01fd      	movw	zl, XL
+00a287 15f4
+00a288 f019
+00a289 f040
+00a28a 91e4
+00a28b c008
+00a28c 32e0
+00a28d f010
+00a28e e0f0
+00a28f c003
+00a290 2fe5
+00a291 c002
+00a292 95f3
+00a293 81e0
+00a294 9611      	_ZPG
+00a295 e0f1
+00a296 8100
+00a297 2543
+00a298 bf4f
+00a299 9418
+00a29a 0b20
+00a29b ff33
+00a29c c00a
+00a29d b70f
+00a29e f40d
+00a29f 5026
+00a2a0 ff00
+00a2a1 c003
+00a2a2 5620
+00a2a3 1f00
+00a2a4 2503
+00a2a5 9507
+00a2a6 2322
+00a2a7 b74f
+00a2a8 fb43
+00a2a9 f946
+00a2aa 2543      	_SBCZ
+00a2ab fc50
+00a2ac d00f
+00a2ad 01fd
+00a2ae 9611
+00a2af 15f4
+00a2b0 f028
+00a2b1 91e4
+00a2b2 e1fd
+00a2b3 0fee
+00a2b4 1df2
+00a2b5 9409
+00a2b6 95f3
+00a2b7 81e0
+00a2b8 e1fd
+00a2b9 0fee
+00a2ba 1df2
+00a2bb 9409
+00a2bc 940c a702 	EXEC
+                 
+                 _INC_ZPG:				;E6
+00a2be 01fd      	movw	zl, XL
+00a2bf 15f4
+00a2c0 f019
+00a2c1 f040
+00a2c2 91e4
+00a2c3 c008
+00a2c4 32e0
+00a2c5 f010
+00a2c6 e0f0
+00a2c7 c003
+00a2c8 2fe5
+00a2c9 c002
+00a2ca 95f3
+00a2cb 81e0
+00a2cc 9611      	_ZPG
+00a2cd e0f1
+00a2ce 8100
+00a2cf bf4f
+00a2d0 9503
+00a2d1 b74f
+00a2d2 8300      	_INCZ
+00a2d3 fc50
+00a2d4 d00f
+00a2d5 01fd
+00a2d6 9611
+00a2d7 15f4
+00a2d8 f028
+00a2d9 91e4
+00a2da e1fd
+00a2db 0fee
+00a2dc 1df2
+00a2dd 9409
+00a2de 95f3
+00a2df 81e0
+00a2e0 e1fd
+00a2e1 0fee
+00a2e2 1df2
+00a2e3 9409
+00a2e4 940c a702 	EXEC
+                 	
+                 _SMB6_ZPG:				;E7
+00a2e6 01fd
+00a2e7 15f4
+00a2e8 f019
+00a2e9 f040
+00a2ea 91e4
+00a2eb c008
+00a2ec 32e0
+00a2ed f010
+00a2ee e0f0
+00a2ef c003
+00a2f0 2fe5
+00a2f1 c002
+00a2f2 95f3
+00a2f3 81e0
+00a2f4 9611
+00a2f5 e0f1
+00a2f6 8100
+00a2f7 6400
+00a2f8 8300      	_SMB	0x40
+00a2f9 fc50
+00a2fa d00f
+00a2fb 01fd
+00a2fc 9611
+00a2fd 15f4
+00a2fe f028
+00a2ff 91e4
+00a300 e1fd
+00a301 0fee
+00a302 1df2
+00a303 9409
+00a304 95f3
+00a305 81e0
+00a306 e1fd
+00a307 0fee
+00a308 1df2
+00a309 9409
+00a30a 940c a702 	EXEC
+                 
+                 _INX_IMP:				;E8
+00a30c bf4f      	LDSR
+00a30d 94e3      	inc		xr
+00a30e b74f      	SVSR
+00a30f fc50
+00a310 d00f
+00a311 01fd
+00a312 9611
+00a313 15f4
+00a314 f028
+00a315 91e4
+00a316 e1fd
+00a317 0fee
+00a318 1df2
+00a319 9409
+00a31a 95f3
+00a31b 81e0
+00a31c e1fd
+00a31d 0fee
+00a31e 1df2
+00a31f 9409
+00a320 940c a702 	EXEC
+                 
+                 _SBC_IMM:				;E9
+00a322 01fd      	movw	zl, XL
+00a323 9611      	_IMM 
+00a324 15f4
+00a325 f019
+00a326 f040
+00a327 91e4
+00a328 c008
+00a329 32e0
+00a32a f010
+00a32b e0f0
+00a32c c003
+00a32d 2fe5
+00a32e c002
+00a32f 95f3
+00a330 81e0
+00a331 2543
+00a332 bf4f
+00a333 9418
+00a334 0b2e
+00a335 ff33
+00a336 c00a
+00a337 b70f
+00a338 f40d
+00a339 5026
+00a33a ff00
+00a33b c003
+00a33c 5620
+00a33d 1f00
+00a33e 2503
+00a33f 9507
+00a340 2322
+00a341 b74f
+00a342 fb43
+00a343 f946
+00a344 2543      	_SBC
+00a345 fc50
+00a346 d00f
+00a347 01fd
+00a348 9611
+00a349 15f4
+00a34a f028
+00a34b 91e4
+00a34c e1fd
+00a34d 0fee
+00a34e 1df2
+00a34f 9409
+00a350 95f3
+00a351 81e0
+00a352 e1fd
+00a353 0fee
+00a354 1df2
+00a355 9409
+00a356 940c a702 	EXEC
+                 
+                 _NOP_IMP:				;EA
+00a358 fc50
+00a359 d00f
+00a35a 01fd
+00a35b 9611
+00a35c 15f4
+00a35d f028
+00a35e 91e4
+00a35f e1fd
+00a360 0fee
+00a361 1df2
+00a362 9409
+00a363 95f3
+00a364 81e0
+00a365 e1fd
+00a366 0fee
+00a367 1df2
+00a368 9409
+00a369 940c a702 	EXEC
+                 
+                 _CPX_ABS:				;EC
+00a36b 01fd      	movw	zl, XL
+00a36c 15f4
+00a36d f021
+00a36e f048
+00a36f 9105
+00a370 9114
+00a371 c009
+00a372 32e0
+00a373 f418
+00a374 2f05
+00a375 2d12
+00a376 c004
+00a377 efff
+00a378 95f3
+00a379 9101
+00a37a 8110
+00a37b 01f8
+00a37c 9612      	_ABS 
+00a37d 15f4
+00a37e f019
+00a37f f040
+00a380 91e4
+00a381 c008
+00a382 32e0
+00a383 f010
+00a384 e0f0
+00a385 c003
+00a386 2fe5
+00a387 c002
+00a388 95f3
+00a389 81e0
+00a38a bf4f
+00a38b 16ee
+00a38c b74f
+00a38d 2543      	_CPX
+00a38e fc50
+00a38f d00f
+00a390 01fd
+00a391 9611
+00a392 15f4
+00a393 f028
+00a394 91e4
+00a395 e1fd
+00a396 0fee
+00a397 1df2
+00a398 9409
+00a399 95f3
+00a39a 81e0
+00a39b e1fd
+00a39c 0fee
+00a39d 1df2
+00a39e 9409
+00a39f 940c a702 	EXEC
+                 
+                 _SBC_ABS:				;ED
+00a3a1 01fd      	movw	zl, XL
+00a3a2 15f4
+00a3a3 f021
+00a3a4 f048
+00a3a5 9105
+00a3a6 9114
+00a3a7 c009
+00a3a8 32e0
+00a3a9 f418
+00a3aa 2f05
+00a3ab 2d12
+00a3ac c004
+00a3ad efff
+00a3ae 95f3
+00a3af 9101
+00a3b0 8110
+00a3b1 01f8
+00a3b2 9612      	_ABS 
+00a3b3 15f4
+00a3b4 f019
+00a3b5 f040
+00a3b6 91e4
+00a3b7 c008
+00a3b8 32e0
+00a3b9 f010
+00a3ba e0f0
+00a3bb c003
+00a3bc 2fe5
+00a3bd c002
+00a3be 95f3
+00a3bf 81e0
+00a3c0 2543
+00a3c1 bf4f
+00a3c2 9418
+00a3c3 0b2e
+00a3c4 ff33
+00a3c5 c00a
+00a3c6 b70f
+00a3c7 f40d
+00a3c8 5026
+00a3c9 ff00
+00a3ca c003
+00a3cb 5620
+00a3cc 1f00
+00a3cd 2503
+00a3ce 9507
+00a3cf 2322
+00a3d0 b74f
+00a3d1 fb43
+00a3d2 f946
+00a3d3 2543      	_SBC
+00a3d4 fc50
+00a3d5 d00f
+00a3d6 01fd
+00a3d7 9611
+00a3d8 15f4
+00a3d9 f028
+00a3da 91e4
+00a3db e1fd
+00a3dc 0fee
+00a3dd 1df2
+00a3de 9409
+00a3df 95f3
+00a3e0 81e0
+00a3e1 e1fd
+00a3e2 0fee
+00a3e3 1df2
+00a3e4 9409
+00a3e5 940c a702 	EXEC
+                 
+                 _INC_ABS:				;EE
+00a3e7 01fd      	movw	zl, XL
+00a3e8 15f4
+00a3e9 f021
+00a3ea f048
+00a3eb 9105
+00a3ec 9114
+00a3ed c009
+00a3ee 32e0
+00a3ef f418
+00a3f0 2f05
+00a3f1 2d12
+00a3f2 c004
+00a3f3 efff
+00a3f4 95f3
+00a3f5 9101
+00a3f6 8110
+00a3f7 01f8
+00a3f8 9612      	_ABS 
+00a3f9 15f4
+00a3fa f019
+00a3fb f050
+00a3fc 9104
+00a3fd c00b
+00a3fe 32e0
+00a3ff f020
+00a400 e0f0
+00a401 8100
+00a402 2df4
+00a403 c005
+00a404 2f05
+00a405 c003
+00a406 95f3
+00a407 8100
+00a408 95fa
+00a409 bf4f
+00a40a 9503
+00a40b b74f
+00a40c 15f4
+00a40d f021
+00a40e f468
+00a40f 95f3
+00a410 8300
+00a411 c00a
+00a412 32e0
+00a413 f430
+00a414 b30e
+00a415 350a
+00a416 f429
+00a417 9afa
+00a418 9af9
+00a419 c002
+00a41a 27ff
+00a41b 8300      	_INC
+00a41c fc50
+00a41d d00f
+00a41e 01fd
+00a41f 9611
+00a420 15f4
+00a421 f028
+00a422 91e4
+00a423 e1fd
+00a424 0fee
+00a425 1df2
+00a426 9409
+00a427 95f3
+00a428 81e0
+00a429 e1fd
+00a42a 0fee
+00a42b 1df2
+00a42c 9409
+00a42d 940c a702 	EXEC
+                 
+                 _BBS6_REL:				;EF
+00a42f 01fd
+00a430 9612
+00a431 15f4
+00a432 f021
+00a433 f048
+00a434 9105
+00a435 9114
+00a436 c009
+00a437 32e0
+00a438 f418
+00a439 2f05
+00a43a 2d12
+00a43b c004
+00a43c efff
+00a43d 95f3
+00a43e 9101
+00a43f 8110
+00a440 01f8
+00a441 e0f1
+00a442 8100
+00a443 7400
+00a444 f041
+00a445 2311
+00a446 f01a
+00a447 0fa1
+00a448 1db2
+00a449 c003
+00a44a 0fa1
+00a44b f008
+00a44c 95ba      	_BBS 0x40
+00a44d fc50
+00a44e d00f
+00a44f 01fd
+00a450 9611
+00a451 15f4
+00a452 f028
+00a453 91e4
+00a454 e1fd
+00a455 0fee
+00a456 1df2
+00a457 9409
+00a458 95f3
+00a459 81e0
+00a45a e1fd
+00a45b 0fee
+00a45c 1df2
+00a45d 9409
+00a45e 940c a702 	EXEC
+                 
+                 _BEQ_REL:				;F0
+00a460 ff41      	sbrs	avsr, azp
+00a461 c02a      	rjmp	_BEQ1
+00a462 01fd
+00a463 15f4
+00a464 f019
+00a465 f040
+00a466 91e4
+00a467 c008
+00a468 32e0
+00a469 f010
+00a46a e0f0
+00a46b c003
+00a46c 2fe5
+00a46d c002
+00a46e 95f3
+00a46f 81e0
+00a470 9408
+00a471 23ee
+00a472 f01a
+00a473 1fae
+00a474 1db2
+00a475 c003
+00a476 1fae
+00a477 f008
+00a478 95ba      	_REL
+00a479 fc50
+00a47a d00f
+00a47b 01fd
+00a47c 9611
+00a47d 15f4
+00a47e f028
+00a47f 91e4
+00a480 e1fd
+00a481 0fee
+00a482 1df2
+00a483 9409
+00a484 95f3
+00a485 81e0
+00a486 e1fd
+00a487 0fee
+00a488 1df2
+00a489 9409
+00a48a 940c a702 	EXEC
+                 _BEQ1:
+00a48c 9611      	adiw	xl, 1
+00a48d fc50
+00a48e d00f
+00a48f 01fd
+00a490 9611
+00a491 15f4
+00a492 f028
+00a493 91e4
+00a494 e1fd
+00a495 0fee
+00a496 1df2
+00a497 9409
+00a498 95f3
+00a499 81e0
+00a49a e1fd
+00a49b 0fee
+00a49c 1df2
+00a49d 9409
+00a49e 940c a702 	EXEC
+                 
+                 _SBC_INDY:				;F1
+00a4a0 01fd      	movw	zl, XL
+00a4a1 15f4
+00a4a2 f019
+00a4a3 f040
+00a4a4 91e4
+00a4a5 c008
+00a4a6 32e0
+00a4a7 f010
+00a4a8 e0f0
+00a4a9 c003
+00a4aa 2fe5
+00a4ab c002
+00a4ac 95f3
+00a4ad 81e0
+00a4ae e0f1
+00a4af 8100
+00a4b0 95e3
+00a4b1 8110
+00a4b2 01f8
+00a4b3 0def
+00a4b4 1df2
+00a4b5 9611      	_INDY 
+00a4b6 15f4
+00a4b7 f019
+00a4b8 f040
+00a4b9 91e4
+00a4ba c008
+00a4bb 32e0
+00a4bc f010
+00a4bd e0f0
+00a4be c003
+00a4bf 2fe5
+00a4c0 c002
+00a4c1 95f3
+00a4c2 81e0
+00a4c3 2543
+00a4c4 bf4f
+00a4c5 9418
+00a4c6 0b2e
+00a4c7 ff33
+00a4c8 c00a
+00a4c9 b70f
+00a4ca f40d
+00a4cb 5026
+00a4cc ff00
+00a4cd c003
+00a4ce 5620
+00a4cf 1f00
+00a4d0 2503
+00a4d1 9507
+00a4d2 2322
+00a4d3 b74f
+00a4d4 fb43
+00a4d5 f946
+00a4d6 2543      	_SBC
+00a4d7 fc50
+00a4d8 d00f
+00a4d9 01fd
+00a4da 9611
+00a4db 15f4
+00a4dc f028
+00a4dd 91e4
+00a4de e1fd
+00a4df 0fee
+00a4e0 1df2
+00a4e1 9409
+00a4e2 95f3
+00a4e3 81e0
+00a4e4 e1fd
+00a4e5 0fee
+00a4e6 1df2
+00a4e7 9409
+00a4e8 940c a702 	EXEC
+                 
+                 _SBC_IND:				;F2
+00a4ea 01fd      	movw	zl, XL
+00a4eb 15f4
+00a4ec f019
+00a4ed f040
+00a4ee 91e4
+00a4ef c008
+00a4f0 32e0
+00a4f1 f010
+00a4f2 e0f0
+00a4f3 c003
+00a4f4 2fe5
+00a4f5 c002
+00a4f6 95f3
+00a4f7 81e0
+00a4f8 e0f1
+00a4f9 8100
+00a4fa 95e3
+00a4fb 8110
+00a4fc 01f8
+00a4fd 9611      	_IZPG 
+00a4fe 15f4
+00a4ff f019
+00a500 f040
+00a501 91e4
+00a502 c008
+00a503 32e0
+00a504 f010
+00a505 e0f0
+00a506 c003
+00a507 2fe5
+00a508 c002
+00a509 95f3
+00a50a 81e0
+00a50b 2543
+00a50c bf4f
+00a50d 9418
+00a50e 0b2e
+00a50f ff33
+00a510 c00a
+00a511 b70f
+00a512 f40d
+00a513 5026
+00a514 ff00
+00a515 c003
+00a516 5620
+00a517 1f00
+00a518 2503
+00a519 9507
+00a51a 2322
+00a51b b74f
+00a51c fb43
+00a51d f946
+00a51e 2543      	_SBC
+00a51f fc50
+00a520 d00f
+00a521 01fd
+00a522 9611
+00a523 15f4
+00a524 f028
+00a525 91e4
+00a526 e1fd
+00a527 0fee
+00a528 1df2
+00a529 9409
+00a52a 95f3
+00a52b 81e0
+00a52c e1fd
+00a52d 0fee
+00a52e 1df2
+00a52f 9409
+00a530 940c a702 	EXEC
+                 
+                 _SBC_ZPGX:				;F5
+00a532 01fd      	movw	zl, XL
+00a533 15f4
+00a534 f019
+00a535 f040
+00a536 91e4
+00a537 c008
+00a538 32e0
+00a539 f010
+00a53a e0f0
+00a53b c003
+00a53c 2fe5
+00a53d c002
+00a53e 95f3
+00a53f 81e0
+00a540 0dee
+00a541 9611      	_ZPGX
+00a542 e0f1
+00a543 8100
+00a544 2543
+00a545 bf4f
+00a546 9418
+00a547 0b20
+00a548 ff33
+00a549 c00a
+00a54a b70f
+00a54b f40d
+00a54c 5026
+00a54d ff00
+00a54e c003
+00a54f 5620
+00a550 1f00
+00a551 2503
+00a552 9507
+00a553 2322
+00a554 b74f
+00a555 fb43
+00a556 f946
+00a557 2543      	_SBCZ
+00a558 fc50
+00a559 d00f
+00a55a 01fd
+00a55b 9611
+00a55c 15f4
+00a55d f028
+00a55e 91e4
+00a55f e1fd
+00a560 0fee
+00a561 1df2
+00a562 9409
+00a563 95f3
+00a564 81e0
+00a565 e1fd
+00a566 0fee
+00a567 1df2
+00a568 9409
+00a569 940c a702 	EXEC
+                 
+                 _INC_ZPGX:				;F6
+00a56b 01fd      	movw	zl, XL
+00a56c 15f4
+00a56d f019
+00a56e f040
+00a56f 91e4
+00a570 c008
+00a571 32e0
+00a572 f010
+00a573 e0f0
+00a574 c003
+00a575 2fe5
+00a576 c002
+00a577 95f3
+00a578 81e0
+00a579 0dee
+00a57a 9611      	_ZPGX
+00a57b e0f1
+00a57c 8100
+00a57d bf4f
+00a57e 9503
+00a57f b74f
+00a580 8300      	_INCZ
+00a581 fc50
+00a582 d00f
+00a583 01fd
+00a584 9611
+00a585 15f4
+00a586 f028
+00a587 91e4
+00a588 e1fd
+00a589 0fee
+00a58a 1df2
+00a58b 9409
+00a58c 95f3
+00a58d 81e0
+00a58e e1fd
+00a58f 0fee
+00a590 1df2
+00a591 9409
+00a592 940c a702 	EXEC
+                 
+                 _SMB7_ZPG:				;F7
+00a594 01fd
+00a595 15f4
+00a596 f019
+00a597 f040
+00a598 91e4
+00a599 c008
+00a59a 32e0
+00a59b f010
+00a59c e0f0
+00a59d c003
+00a59e 2fe5
+00a59f c002
+00a5a0 95f3
+00a5a1 81e0
+00a5a2 9611
+00a5a3 e0f1
+00a5a4 8100
+00a5a5 6800
+00a5a6 8300      	_SMB	0x80
+00a5a7 fc50
+00a5a8 d00f
+00a5a9 01fd
+00a5aa 9611
+00a5ab 15f4
+00a5ac f028
+00a5ad 91e4
+00a5ae e1fd
+00a5af 0fee
+00a5b0 1df2
+00a5b1 9409
+00a5b2 95f3
+00a5b3 81e0
+00a5b4 e1fd
+00a5b5 0fee
+00a5b6 1df2
+00a5b7 9409
+00a5b8 940c a702 	EXEC
+                 
+                 _SED_IMP:				;F8
+00a5ba 6038      	ori		sr, sd
+00a5bb fc50
+00a5bc d00f
+00a5bd 01fd
+00a5be 9611
+00a5bf 15f4
+00a5c0 f028
+00a5c1 91e4
+00a5c2 e1fd
+00a5c3 0fee
+00a5c4 1df2
+00a5c5 9409
+00a5c6 95f3
+00a5c7 81e0
+00a5c8 e1fd
+00a5c9 0fee
+00a5ca 1df2
+00a5cb 9409
+00a5cc 940c a702 	EXEC
+                 
+                 _SBC_ABSY:				;F9
+00a5ce 01fd      	movw	zl, XL
+00a5cf 15f4
+00a5d0 f021
+00a5d1 f048
+00a5d2 9105
+00a5d3 9114
+00a5d4 c009
+00a5d5 32e0
+00a5d6 f418
+00a5d7 2f05
+00a5d8 2d12
+00a5d9 c004
+00a5da efff
+00a5db 95f3
+00a5dc 9101
+00a5dd 8110
+00a5de 01f8
+00a5df 0def
+00a5e0 1df2
+00a5e1 9612      	_ABSY 
+00a5e2 15f4
+00a5e3 f019
+00a5e4 f040
+00a5e5 91e4
+00a5e6 c008
+00a5e7 32e0
+00a5e8 f010
+00a5e9 e0f0
+00a5ea c003
+00a5eb 2fe5
+00a5ec c002
+00a5ed 95f3
+00a5ee 81e0
+00a5ef 2543
+00a5f0 bf4f
+00a5f1 9418
+00a5f2 0b2e
+00a5f3 ff33
+00a5f4 c00a
+00a5f5 b70f
+00a5f6 f40d
+00a5f7 5026
+00a5f8 ff00
+00a5f9 c003
+00a5fa 5620
+00a5fb 1f00
+00a5fc 2503
+00a5fd 9507
+00a5fe 2322
+00a5ff b74f
+00a600 fb43
+00a601 f946
+00a602 2543      	_SBC
+00a603 fc50
+00a604 d00f
+00a605 01fd
+00a606 9611
+00a607 15f4
+00a608 f028
+00a609 91e4
+00a60a e1fd
+00a60b 0fee
+00a60c 1df2
+00a60d 9409
+00a60e 95f3
+00a60f 81e0
+00a610 e1fd
+00a611 0fee
+00a612 1df2
+00a613 9409
+00a614 940c a702 	EXEC
+                 
+                 _PLX_IMP:				;FA
+00a616 bf4f      	LDSR
+00a617 95c3      	inc		yl
+00a618 80e8      	ld		xr, Y
+00a619 20ee      	tst		xr
+00a61a b74f      	SVSR
+00a61b fc50
+00a61c d00f
+00a61d 01fd
+00a61e 9611
+00a61f 15f4
+00a620 f028
+00a621 91e4
+00a622 e1fd
+00a623 0fee
+00a624 1df2
+00a625 9409
+00a626 95f3
+00a627 81e0
+00a628 e1fd
+00a629 0fee
+00a62a 1df2
+00a62b 9409
+00a62c 940c a702 	EXEC
+                 
+                 _SBC_ABSX:				;FD
+00a62e 01fd      	movw	zl, XL
+00a62f 15f4
+00a630 f021
+00a631 f048
+00a632 9105
+00a633 9114
+00a634 c009
+00a635 32e0
+00a636 f418
+00a637 2f05
+00a638 2d12
+00a639 c004
+00a63a efff
+00a63b 95f3
+00a63c 9101
+00a63d 8110
+00a63e 01f8
+00a63f 0dee
+00a640 1df2
+00a641 9612      	_ABSX 
+00a642 15f4
+00a643 f019
+00a644 f040
+00a645 91e4
+00a646 c008
+00a647 32e0
+00a648 f010
+00a649 e0f0
+00a64a c003
+00a64b 2fe5
+00a64c c002
+00a64d 95f3
+00a64e 81e0
+00a64f 2543
+00a650 bf4f
+00a651 9418
+00a652 0b2e
+00a653 ff33
+00a654 c00a
+00a655 b70f
+00a656 f40d
+00a657 5026
+00a658 ff00
+00a659 c003
+00a65a 5620
+00a65b 1f00
+00a65c 2503
+00a65d 9507
+00a65e 2322
+00a65f b74f
+00a660 fb43
+00a661 f946
+00a662 2543      	_SBC
+00a663 fc50
+00a664 d00f
+00a665 01fd
+00a666 9611
+00a667 15f4
+00a668 f028
+00a669 91e4
+00a66a e1fd
+00a66b 0fee
+00a66c 1df2
+00a66d 9409
+00a66e 95f3
+00a66f 81e0
+00a670 e1fd
+00a671 0fee
+00a672 1df2
+00a673 9409
+00a674 940c a702 	EXEC
+                 
+                 _INC_ABSX:				;FE
+00a676 01fd      	movw	zl, XL
+00a677 15f4
+00a678 f021
+00a679 f048
+00a67a 9105
+00a67b 9114
+00a67c c009
+00a67d 32e0
+00a67e f418
+00a67f 2f05
+00a680 2d12
+00a681 c004
+00a682 efff
+00a683 95f3
+00a684 9101
+00a685 8110
+00a686 01f8
+00a687 0dee
+00a688 1df2
+00a689 9612      	_ABSX 
+00a68a 15f4
+00a68b f019
+00a68c f050
+00a68d 9104
+00a68e c00b
+00a68f 32e0
+00a690 f020
+00a691 e0f0
+00a692 8100
+00a693 2df4
+00a694 c005
+00a695 2f05
+00a696 c003
+00a697 95f3
+00a698 8100
+00a699 95fa
+00a69a bf4f
+00a69b 9503
+00a69c b74f
+00a69d 15f4
+00a69e f021
+00a69f f468
+00a6a0 95f3
+00a6a1 8300
+00a6a2 c00a
+00a6a3 32e0
+00a6a4 f430
+00a6a5 b30e
+00a6a6 350a
+00a6a7 f429
+00a6a8 9afa
+00a6a9 9af9
+00a6aa c002
+00a6ab 27ff
+00a6ac 8300      	_INC
+00a6ad fc50
+00a6ae d00f
+00a6af 01fd
+00a6b0 9611
+00a6b1 15f4
+00a6b2 f028
+00a6b3 91e4
+00a6b4 e1fd
+00a6b5 0fee
+00a6b6 1df2
+00a6b7 9409
+00a6b8 95f3
+00a6b9 81e0
+00a6ba e1fd
+00a6bb 0fee
+00a6bc 1df2
+00a6bd 9409
+00a6be 940c a702 	EXEC
+                 
+                 _BBS7_REL:				;FF
+00a6c0 01fd
+00a6c1 9612
+00a6c2 15f4
+00a6c3 f021
+00a6c4 f048
+00a6c5 9105
+00a6c6 9114
+00a6c7 c009
+00a6c8 32e0
+00a6c9 f418
+00a6ca 2f05
+00a6cb 2d12
+00a6cc c004
+00a6cd efff
+00a6ce 95f3
+00a6cf 9101
+00a6d0 8110
+00a6d1 01f8
+00a6d2 e0f1
+00a6d3 8100
+00a6d4 7800
+00a6d5 f041
+00a6d6 2311
+00a6d7 f01a
+00a6d8 0fa1
+00a6d9 1db2
+00a6da c003
+00a6db 0fa1
+00a6dc f008
+00a6dd 95ba      	_BBS 0x80
+00a6de fc50
+00a6df d00f
+00a6e0 01fd
+00a6e1 9611
+00a6e2 15f4
+00a6e3 f028
+00a6e4 91e4
+00a6e5 e1fd
+00a6e6 0fee
+00a6e7 1df2
+00a6e8 9409
+00a6e9 95f3
+00a6ea 81e0
+00a6eb e1fd
+00a6ec 0fee
+00a6ed 1df2
+00a6ee 9409
+00a6ef 940c a702 	EXEC
+                 
+                 ;**********************
+                 ; CPU State code
+                 ;**********************
+                 CPU_INIT:
+00a6f1 2722      	clr		AR
+00a6f2 24ee      	clr		XR
+00a6f3 24ff      	clr		YR
+00a6f4 2755      	clr		IRV
+00a6f5 efcf      	ldi		YL, 0xff
+00a6f6 e0d2      	ldi		YH, 0x02	; $01xx
+00a6f7 efec      	ldi		ZL, 0xfc
+00a6f8 efff      	ldi		ZH, 0xff
+00a6f9 91a5      	lpm		XL, Z+
+00a6fa 91b4      	lpm		XH, Z
+00a6fb e230      	ldi		sr, sx
+00a6fc b74f      	SVSR
+00a6fd 2455      	clr		IFLAG			; IRQ flag off
+00a6fe ba2e      	out		gpior0, zero	; EEPROM Write off
+00a6ff 9508      	ret
+                 
+                 CPU_RESET:
+00a700 dff0      	rcall	CPU_INIT
+00a701 9508      	ret
+                 
+                 cpu_irq:
+00a702 2455      	clr		IFLAG		; clear IRQ trigger 
+00a703 fd32      	sbrc	sr, sip
+00a704 9508      	ret
+                 
+00a705 94f8      	cli					; dis irq's
+00a706 83b8      	st		Y, XH
+00a707 95ca      	dec		yl
+00a708 83a8      	st		Y, XL
+00a709 95ca      	dec		yl
+00a70a 2fe4
+00a70b e3f6
+00a70c 9104
+00a70d 733c
+00a70e 2b30      	AV2SR
+00a70f 7e3f      	andi	sr, ss+so+sx+sd+si+sz+sc   ; B=0
+00a710 8338      	st		Y, sr
+00a711 95ca      	dec		yl
+00a712 6034      	ori		sr, si		; set I
+00a713 efee      	ldi		ZL, 0xfe
+00a714 efff      	ldi		ZH, 0xff
+00a715 91a5      	lpm		XL, Z+
+00a716 91b4      	lpm		XH, Z
+00a717 9508      	ret
+                 
+                 cpu_nmi:
+00a718 83b8      	st		Y, XH
+00a719 95ca      	dec		yl
+00a71a 83a8      	st		Y, XL
+00a71b 95ca      	dec		yl
+00a71c 2fe4
+00a71d e3f6
+00a71e 9104
+00a71f 733c
+00a720 2b30      	AV2SR
+00a721 8338      	st		Y, sr
+00a722 95ca      	dec		yl
+00a723 efea      	ldi		ZL, 0xfa
+00a724 efff      	ldi		ZH, 0xff
+00a725 91a5      	lpm		XL, Z+
+00a726 91b4      	lpm		XH, Z
+00a727 9508      	ret
+                 
+                 ;**********************
+                 ; Execute one opcode
+                 ;**********************
+                 Main:
+00a728 fc50
+00a729 d00f
+00a72a 01fd
+00a72b 9611
+00a72c 15f4
+00a72d f028
+00a72e 91e4
+00a72f e1fd
+00a730 0fee
+00a731 1df2
+00a732 9409
+00a733 95f3
+00a734 81e0
+00a735 e1fd
+00a736 0fee
+00a737 1df2
+00a738 9409
+00a739 940c a702 	EXEC
+00a73b cfec      	rjmp	main		; this will never execute!
+                 
+                 ;**********************
+                 
+                 ; 1.2 fixed CLV bug
+                 ; 1.3 mem access is 16k RAM x 48k ROM
+                 ; 1.4 added BCD support for ADC and SBC - flags untested
+                 ; 1.5 fixed TXS - removed SR changes
+                 ; 1.6 fixed BCD math in ADC and SBC
+                 ; 1.7 removed B flag in SR being cleared on RTI
+                 ; 1.8 moved V flag to T in AVST
+                 ; 1.9 removed IOJMP and optimized IRQ flag handling
+                 ; 2.0 optimized opcode fetch, READ and READZ
+                 ; 2.1 added READZP and WRITEZP and ZP-mirrored opcode instructions
+                 ; 2.2 added lookup tables to convert SR to AVSR and AVSR to SR
+                 ; 2.3 added BBRx, BBSx, RBMx, SMBx, STP, WAI opcodes - WDC 65C02 fully supported
+                 ; 2.4 Added lookup table for excution in IO and created macro for execution
+                 ;     Moved Emulator to $8000 in Flash as it outgrew space from $0000-$1FFF.
+                 ;     Unused opcodes now use the proper # of bytes, per WDC datasheet
+                 ; 2.5 Corrected some opcode behavior - now passed Klaus' test suites!
+                 
+                 ; These files are in the Bootloader section
+                 .include	"bootload.asm"
+                 
+                 ; AVR Bootloader
+                 ;
+                 .org	0xF000
+                 
+                 ;******************************************************************************
+                 ; Code Begins at 0xF000
+                 ; System IRQ jump table from 0xF000 - 0xF045
+                 ;******************************************************************************
+00f000 940c f048 	jmp		RESET				; External Reset
+                 
+00f002 e052      	ldi		irv, 0x02
+00f003 c042      	rjmp		INT0V				; External Interrupt Request 0
+00f004 e054      	ldi		irv, 0x04
+00f005 c040      	rjmp		INT1V				; External Interrupt Request 1
+00f006 e056      	ldi		irv, 0x06
+00f007 c03e      	rjmp		INT2V				; External Interrupt Request 2
+00f008 e058      	ldi		irv, 0x08
+00f009 c03c      	rjmp		PCINT0V				; Pin Change Interrupt Request 0
+00f00a e05a      	ldi		irv, 0x0a
+00f00b c03a      	rjmp		PCINT1V				; Pin Change Interrupt Request 1
+00f00c e05c      	ldi		irv, 0x0c
+00f00d c038      	rjmp		PCINT2V				; Pin Change Interrupt Request 2
+00f00e e05e      	ldi		irv, 0x0e
+00f00f c036      	rjmp		PCINT3V				; Pin Change Interrupt Request 3
+00f010 e150      	ldi		irv, 0x10
+00f011 c034      	rjmp		WDT					; Watchdog Time-out Interrupt
+00f012 e152      	ldi		irv, 0x12
+00f013 c032      	rjmp		TIMER2_COMPA		; Timer/Counter2 Compare Match A
+00f014 e154      	ldi		irv, 0x14
+00f015 c030      	rjmp		TIMER2_COMPB		; Timer/Counter2 Compare Match B
+00f016 e156      	ldi		irv, 0x16
+00f017 c02e      	rjmp		TIMER2_OVF			; Timer/Counter2 Overflow
+00f018 e158      	ldi		irv, 0x18
+00f019 c02c      	rjmp		TIMER1_CAPT			; Timer/Counter1 Capture Event
+00f01a e15a      	ldi		irv, 0x1a
+00f01b c02a      	rjmp		TIMER1_COMPA		; Timer/Counter1 Compare Match A
+00f01c e15c      	ldi		irv, 0x1c
+00f01d c028      	rjmp		TIMER1_COMPB		; Timer/Counter1 Compare Match B
+00f01e e15e      	ldi		irv, 0x1e
+00f01f c026      	rjmp		TIMER1_OVF			; Timer/Counter1 Overflow
+00f020 e250      	ldi		irv, 0x20
+00f021 c024      	rjmp		TIMER0_COMPA		; Timer/Counter0 Compare Match A
+00f022 e252      	ldi		irv, 0x22
+00f023 c022      	rjmp		TIMER0_COMPB		; Timer/Counter0 Compare match B
+00f024 e254      	ldi		irv, 0x24
+00f025 c020      	rjmp		TIMER0_OVF			; Timer/Counter0 Overflow
+00f026 e256      	ldi		irv, 0x26
+00f027 c01e      	rjmp		SPI_STC				; SPI Serial Transfer Complete
+00f028 e258      	ldi		irv, 0x28
+00f029 c01c      	rjmp		USART0_RX			; USART0 Rx Complete
+00f02a e25a      	ldi		irv, 0x2a
+00f02b c01a      	rjmp		USART0_UDRE			; USART0 Data Register Empty
+00f02c e25c      	ldi		irv, 0x2c
+00f02d c018      	rjmp		USART0_TX			; USART0 Tx Complete
+00f02e e25e      	ldi		irv, 0x2e
+00f02f c016      	rjmp		ANALOG_COMP			; Analog Comparator	ldi		irv, 0x01
+00f030 e350      	ldi		irv, 0x30
+00f031 c014      	rjmp		ADCC				; ADC Conversion Complete
+00f032 e352      	ldi		irv, 0x32
+00f033 c012      	rjmp		EE_READY			; EEPROM Ready
+00f034 e354      	ldi		irv, 0x34
+00f035 c010      	rjmp		TWI					; 2-wire Serial Interface
+00f036 e356      	ldi		irv, 0x36
+00f037 c00e      	rjmp		SPM_READY			; Store Program Memory Ready
+00f038 e358      	ldi		irv, 0x38
+00f039 c00c      	rjmp		USART1_RX			; USART1 Rx Complete
+00f03a e35a      	ldi		irv, 0x3a
+00f03b c00a      	rjmp		USART1_UDRE			; USART1 Data Register Empty
+00f03c e35c      	ldi		irv, 0x3c
+00f03d c008      	rjmp		USART1_TX			; USART1 Tx Complete
+00f03e e35e      	ldi		irv, 0x3e
+00f03f c006      	rjmp		TIMER3_CAPT			; Timer/Counter3 Capture Event
+00f040 e450      	ldi		irv, 0x40
+00f041 c004      	rjmp		TIMER3_COMPA		; Timer/Counter3 Compare Match A
+00f042 e452      	ldi		irv, 0x42
+00f043 c002      	rjmp		TIMER3_COMPB		; Timer/Counter3 Compare Match B
+00f044 e454      	ldi		irv, 0x44
+00f045 c000      	rjmp		TIMER3_OVF			; Timer/Counter3 Overflow
+                 
+                 ;******************************************************************************
+                 ; unused IRQ vector's point to software reset code
+                 ;******************************************************************************
+                 INT0V:							; External Interrupt Request 0
+                 INT1V:							; External Interrupt Request 1
+                 INT2V:							; External Interrupt Request 2
+                 PCINT0V:						; Pin Change Interrupt Request 0
+                 PCINT1V:						; Pin Change Interrupt Request 1
+                 PCINT2V:						; Pin Change Interrupt Request 2
+                 PCINT3V:						; Pin Change Interrupt Request 3
+                 WDT:							; Watchdog Time-out Interrupt
+                 TIMER2_COMPA:					; Timer/Counter2 Compare Match A
+                 TIMER2_COMPB:					; Timer/Counter2 Compare Match B
+                 TIMER2_OVF:						; Timer/Counter2 Overflow
+                 TIMER1_CAPT:					; Timer/Counter1 Capture Event
+                 TIMER1_COMPA:					; Timer/Counter1 Compare Match A
+                 TIMER1_COMPB:					; Timer/Counter1 Compare Match B
+                 TIMER1_OVF:						; Timer/Counter1 Overflow
+                 TIMER0_COMPA:					; Timer/Counter0 Compare Match A
+                 TIMER0_COMPB:					; Timer/Counter0 Compare match B
+                 TIMER0_OVF:						; Timer/Counter0 Overflow
+                 SPI_STC:						; SPI Serial Transfer Complete
+                 USART0_RX:						; USART0 Rx Complete
+                 USART0_UDRE:					; USART0 Data Register Empty
+                 USART0_TX:						; USART0 Tx Complete
+                 ANALOG_COMP:					; Analog Comparator
+                 ADCC: 							; ADC Conversion Complete
+                 EE_READY:						; EEPROM Ready
+                 TWI:							; 2-wire Serial Interface
+                 SPM_READY:						; Store Program Memory Ready
+                 USART1_RX:						; USART1 Rx Complete
+                 USART1_UDRE:					; USART1 Data Register Empty
+                 USART1_TX:						; USART1 Tx Complete
+                 TIMER3_CAPT:					;  Timer/Counter3 Capture Event
+                 TIMER3_COMPA:					;  Timer/Counter3 Compare Match A
+                 TIMER3_COMPB:					;  Timer/Counter3 Compare Match B
+                 TIMER3_OVF:						;  Timer/Counter3 Overflow
+                 
+                 ; master IRQ handler
+00f046 2853      	or		IFLAG, one			; IRQ trigger flag, bit 0
+00f047 9508      	ret							; do not set I flag here
+                 
+                 ;******************************************************************************
+                 ; Program Starts here on Reset
+                 ;******************************************************************************
+                 RESET:							; first line executed after reset 
+00f048 94f8      	CLI							; disable interupts
+                 
+                 ; move IRQ table to bootloader
+00f049 b705      	in		i, mcucr
+00f04a 7f0c      	andi	i, 0xfc
+00f04b 2f10      	mov		j, i
+00f04c 6001      	ori		i, 0x01
+00f04d 6012      	ori		j, 0x02
+00f04e bf05      	out		mcucr, i
+00f04f bf15      	out		mcucr, j			; IRQ jump table in bootloader
+                 
+                 ;******************************************************************************
+                 ; Initialize the I/O Ports
+                 ;******************************************************************************
+                 ; port A pins 
+00f050 ef0f      	ldi		i, 0xff				; 
+00f051 b902      	out		porta, i			; 
+00f052 e000      	LDI		i, 0x00				; 
+00f053 b901      	out		ddra, i				; 
+                 
+                 ; port B pins 
+00f054 ef0f      	LDI		i, 0xff				; 
+00f055 b905      	out		portb, i			; 
+00f056 e000      	LDI		i, 0x00				; 
+00f057 b904      	out		ddrb, i				; 
+                 
+                 ; port C pins 
+00f058 ef0f      	ldi		i, 0xff				; 
+00f059 b908      	out		portc, i			; 
+00f05a e000      	LDI		i, 0x00				; 
+00f05b b907      	out		ddrc, i				; 
+                 
+                 ; port D pins
+00f05c ef0f      	ldi		i, 0xff				;
+00f05d b90b      	out		portd, i			;
+00f05e e000      	LDI		i, 0x00				;
+00f05f b90a      	out		ddrd, i				;
+                 
+                 ;******************************************************************************
+                 ; Init other CPU I/O registers
+                 ;******************************************************************************
+00f060 e800      	ldi     i, 0x80
+00f061 bf00      	out     ACSR, i				; turn off comparator
+                 
+00f062 e400      	ldi		i, 0x40				; set stack pointer to top of SRAM 
+00f063 bf0e      	out		SPH, i				;
+00f064 ef0f      	ldi		i, 0xff				; 
+00f065 bf0d      	out		SPL, i				;
+                 
+                 ;******************************************************************************
+                 ; Init RS-232 port
+                 ;******************************************************************************
+                 	; set baud rate
+00f066 e00c      	ldi		i, 0x0C				; 
+                 								; 			16MHZ	20MHZ	24MHz
+00f067 e010      	ldi		j, 0x00				; 115200	xxxx	000A	000C
+00f068 9310 00c5 	sts		UBRR0H, j			;  19200	0033	0040	004D
+00f06a 9300 00c4 	sts		UBRR0L, i			;  9600		0067	0081	009B
+                 								;  4800		00CF	0103	0137
+                 								;  2400		019F 	0208	0270
+                 
+                 	; Enable receiver and transmitter
+00f06c e108      	ldi 	i, (1<<RXEN0)|(1<<TXEN0)
+00f06d 9300 00c1 	sts 	UCSR0B, i
+                 	
+                 	; Set frame format: 8data, 1stop bit
+00f06f e006      	ldi 	i, (3<<UCSZ00)
+00f070 9300 00c2 	sts 	UCSR0C, i
+                 
+                 ;******************************************************************************
+                 ; Init program registers
+                 ;******************************************************************************
+00f072 2422      	clr		zero
+00f073 e001      	ldi		i, 0x01
+00f074 2e30      	mov		one, i
+                 
+                 ;******************************************************************************
+                 ; Boot Loader Prompts
+                 ;******************************************************************************
+                 Boot:
+00f075 be3b      	out		rampz, one
+00f076 e4e4      	ldi		zl, low(greet*2)
+00f077 eef1      	ldi		zh, high(greet*2)
+                 
+00f078 2788      	clr		R24
+00f079 2799      	clr		R25
+00f07a 27aa      	clr		R26
+                 
+                 Boot1:
+00f07b 9107      	elpm	i, Z+
+00f07c 2300      	tst		i
+00f07d f019      	breq	Boot2
+00f07e 940e f1e2 	call	Put_Chr
+00f080 cffa      	rjmp	Boot1
+                 
+                 Boot2:							; autostart EMU
+00f081 9601      	adiw	R24, 0x01			; after 24 bit counter
+00f082 f441      	brne	Boot3				; cycles
+00f083 95a3      	inc		R26
+00f084 f0d1      	breq	Boot4
+00f085 2f0a      	mov		i, R26
+00f086 710f      	andi	i, 0x1F
+00f087 f419      	brne	Boot3
+00f088 e20e      	ldi		i, '.'
+00f089 940e f1e2 	call	Put_Chr
+                 
+                 Boot3:
+00f08b 9100 00c6 	lds		i, udr0
+00f08d 300d      	cpi		i, 0x0d
+00f08e f081      	breq	Boot4
+00f08f 3705      	cpi		i, 'u'
+00f090 f059      	breq	Load
+00f091 3505      	cpi		i, 'U'
+00f092 f049      	breq	Load
+00f093 370c      	cpi		i, '|'
+00f094 f761      	brne	Boot2
+00f095 2488      	clr		zsav				; set start address for Emulator
+00f096 2499      	clr		zsavh				; engine and ROM image
+00f097 e306      	ldi		i, 0x36				; start of Datatables
+00f098 2e90      	mov		zsavh, i
+00f099 940e f0f2 	call	Xmodem1
+00f09b cfd9      	rjmp	Boot				; load Emu Engine 
+                 
+                 Load:
+00f09c 940e f0ef 	call	xmodem				; load ROM image
+00f09e cfd6      	rjmp	Boot
+                 
+                 Boot4:
+00f09f be2b      	out		rampz, zero
+00f0a0 940c 8000 	jmp		Startup
+                 
+                 ;******************************************************************************
+                 ; Text messages (version from AVR6502.asm)
+                 ;******************************************************************************
+                 greet:
+00f0a2 0a0d
+00f0a3 2a2a
+00f0a4 2a2a
+00f0a5 2a2a
+00f0a6 2a2a
+00f0a7 2a2a
+00f0a8 2a2a
+00f0a9 2a2a
+00f0aa 2a2a
+00f0ab 2a2a
+00f0ac 2a2a
+00f0ad 2a2a
+00f0ae 2a2a
+00f0af 2a2a
+00f0b0 2a2a
+00f0b1 2a2a
+00f0b2 2a2a
+00f0b3 202a
+00f0b4 0a0d      .db	0x0d, 0x0a, "********************************* ", 0x0d, 0x0a
+00f0b5 5641
+00f0b6 2052
+00f0b7 3536
+00f0b8 3043
+00f0b9 2032
+00f0ba 6d45
+00f0bb 6c75
+00f0bc 7461
+00f0bd 726f
+00f0be 0d20
+00f0bf 420a
+00f0c0 2079
+00f0c1 6144
+00f0c2 7972
+00f0c3 206c
+00f0c4 6952
+00f0c5 7463
+00f0c6 726f
+00f0c7 2020
+00f0c8 6328
+00f0c9 2029
+00f0ca 3032
+00f0cb 3331
+00f0cc 0a0d
+00f0cd 0a0d      .db	"AVR 65C02 Emulator ", 0x0d, 0x0a, "By Daryl Rictor  (c) 2013", 0x0d, 0x0a, 0x0d, 0x0a
+00f0ce 7250
+00f0cf 7365
+00f0d0 2073
+00f0d1 6e45
+00f0d2 6574
+00f0d3 2072
+00f0d4 6f74
+00f0d5 5320
+00f0d6 6174
+00f0d7 7472
+00f0d8 5320
+00f0d9 7379
+00f0da 6574
+00f0db 0d6d
+00f0dc 500a
+00f0dd 6572
+00f0de 7373
+00f0df 2720
+00f0e0 2755
+00f0e1 7420
+00f0e2 206f
+00f0e3 7075
+00f0e4 6f6c
+00f0e5 6461
+00f0e6 6e20
+00f0e7 7765
+00f0e8 5220
+00f0e9 4d4f
+00f0ea 6920
+00f0eb 616d
+00f0ec 6567
+00f0ed 0d20
+00f0ee 000a      .db	"Press Enter to Start System", 0x0d, 0x0a, "Press 'U' to upload new ROM image ", 0x0d, 0x0a, 0x00
+                 .include	"xmodem-receive.asm"
+                 
+                 ;
+                 ; A simple file transfer program to allow upload from a console device
+                 ; to the SBC utilizing the x-modem/CRC transfer protocol.  Requires just
+                 ; under 1k of either RAM or ROM, 132 bytes of RAM for the receive buffer,
+                 ; and 8 bytes of zero page RAM for variable storage.
+                 ;
+                 ;**************************************************************************
+                 ; This implementation of XMODEM/CRC does NOT conform strictly to the 
+                 ; XMODEM protocol standard in that it (1) does not accurately time character
+                 ; reception or (2) fall back to the Checksum mode.
+                 
+                 ; (1) For timing, it uses a crude timing loop to provide approximate
+                 ; delays.  Windows HyperTerminal worked quite well!
+                 ;
+                 ; (2) Most modern terminal programs support XMODEM/CRC which can detect a
+                 ; wider range of transmission errors so the fallback to the simple checksum
+                 ; calculation was not implemented to save space.
+                 ;**************************************************************************
+                 ;
+                 ;-------------------------- The Code ----------------------------
+                 ;
+                 ; Register usage
+                 ; (these are repurposed from the Main program and will generate
+                 ; assembler warnings)
+                 ;
+                 .def	crc		=	R22			;\ CRC lo byte  (two byte variable)
+                 .def	crch	=	R23			;/ CRC hi byte  
+                 .def	blkno	=	R24			; block number 
+                 .def	retry	=	R6			; retry counter 
+                 .def	retry2	=	R25			; 2nd counter
+                 .def	bflag	=	R7			; block flag 
+                 .def	zsav	=	R8			; Z save loc
+                 .def	zsavh	=	R9			; 
+                 .def	rzsav	=	R10			; RAMPZ save
+                 ;
+                 ;
+                 ; non-zero page variables and buffers
+                 ;
+                 ;
+                 .equ	Rbuff	=	0x0200      ; temp 132 byte receive buffer 
+                 ;
+                 ; XMODEM Control Character Constants
+                 .equ	SOH		=	0x01			; start block
+                 .equ	EOT		=	0x04		; end of text marker
+                 .equ	ACK		=	0x06		; good block acknowledged
+                 .equ	NAK		=	0x15		; bad block acknowledged
+                 .equ	CAN		=	0x18		; cancel (not standard, not supported)
+                 .equ	CR		=	0x0d		; carriage return
+                 .equ	LF		=	0x0a		; line feed
+                 .equ	ESC		=	0x1b		; ESC to exit
+                 
+                 ;
+                 ;^^^^^^^^^^^^^^^^^^^^^^ Start of Program ^^^^^^^^^^^^^^^^^^^^^^
+                 ;
+                 ; Xmodem/CRC upload routine
+                 ; By Daryl Rictor, Oct 30, 2012
+                 ;
+                 ; v 1.1 2nd release - 48K Rom size
+                 ;
+                 XModem:		
+00f0ef 2488      		clr		zsav
+00f0f0 e400      		ldi		i, 0x40
+00f0f1 2e90      		mov		zsavh, i		; start of flash
+                 XModem1:
+00f0f2 2ca2      		mov		rzsav, zero
+00f0f3 be2b      		out		rampz,	zero	; start on bank zero
+00f0f4 e0a0      		ldi		xl, 0x00
+00f0f5 e1b0      		ldi		xh, 0x10		; Temp RAM page buffer
+00f0f6 e0d2      		ldi		yh, high(rbuff)
+00f0f7 d091      		rcall	PrintMsg		; send prompt and info
+00f0f8 e081      		ldi		blkno, 0x01		; set block # to 1
+00f0f9 2e78      		mov		bflag, blkno	; set flag to get address from block 1
+                 StartCrc:	
+00f0fa e403      		ldi		i, 'C'			; "C" start with CRC mode
+00f0fb d0e6      		rcall	Put_Chr			; send it
+00f0fc ef9f      		ldi		retry2, 0xff	; set loop counter for ~3 sec delay
+00f0fd 2766      		clr		crc
+00f0fe 2777      		clr		crch			; init CRC value	
+00f0ff d078      		rcall	GetByte			; wait for input
+00f100 f030             	brcs	GotByte			; byte received, process it
+00f101 f7c0      		brcc	StartCrc		; resend "C"
+                 
+                 StartBlk:	
+00f102 ef9f      		ldi		retry2, 0xff	; set loop counter for ~3 sec delay
+00f103 2766      		clr		crc				;
+00f104 2777      		clr		crch			; init CRC value	
+00f105 d072      		rcall	GetByte			; get first byte of block
+00f106 f7d8      		brcc	StartBlk		; timed out, keep waiting...
+                 GotByte:
+00f107 310b      		cpi		i, ESC			; quitting?
+00f108 f411      		brne	GotByte1		; no
+00f109 940c f048 		jmp		Reset			; YES - do BRK or change to RTS if desired
+                 GotByte1:
+00f10b 3001      		cpi		i, SOH			; start of block?
+00f10c f019      		breq	BegBlk			; yes
+00f10d 3004      		cpi		i, EOT			;
+00f10e f521      		brne	BadCrc			; Not SOH or EOT, so flush buffer & send NAK	
+00f10f c062      		rjmp	Done			; EOT - all done!
+                 BegBlk:		
+00f110 27cc      		clr		yl				; byte counter
+                 GetBlk:		
+00f111 ef9f      		ldi		retry2, 0xff	; 3 sec window to receive characters
+                 GetBlk1:	
+00f112 d065      		rcall	GetByte			; get next character
+00f113 f4f8      		brcc	BadCrc			; chr rcv error, flush and send NAK
+                 GetBlk2:		
+00f114 9309      		st		Y+, i			; (buff) good char, save it in the rcv buffer
+00f115 38c4      		cpi		yl, 0x84		; <01> <FE> <128 bytes> <CRCH> <CRCL>
+00f116 f7d1      		brne	GetBlk			; get 132 characters
+00f117 27cc      		clr		yl				;
+00f118 9109      		ld		i, Y+			; (buff) get block # from buffer
+00f119 1708      		cp		i, blkno		; compare to expected block #	
+00f11a f021      		breq	GoodBlk1		; matched!
+00f11b d093      		rcall	Print_Err		; Unexpected block number - abort	
+00f11c d068      		rcall	Flush			; mismatched - flush buffer and then do BRK
+00f11d 940c f048 		jmp		Reset			; unexpected block # - fatal error - BRK or RTS
+                 GoodBlk1:	
+00f11f ef1f      		ldi		j, 0xff
+00f120 2701      		eor		i, j			; 1's comp of block #
+00f121 8118      		ld		j, Y
+00f122 1701      		cp		i, j			; compare with expected 1's comp of block #
+00f123 f021      		breq	GoodBlk2 		; matched!
+                 write_err:	
+00f124 d08a      		rcall	Print_Err		; Unexpected block number - abort	
+00f125 d05f      		rcall 	Flush			; mismatched - flush buffer and then do BRK
+00f126 940c f048 		jmp		Reset			; bad 1's comp of block#	
+                 GoodBlk2:	
+00f128 e0c2      		ldi		yl, 0x02		; 
+                 CalcCrc:	
+00f129 9109      		ld		i, Y+			; calculate the CRC for the 128 bytes of data	
+00f12a d0be      		rcall	UpdCrc			; could inline sub here for speed
+00f12b 38c2      		cpi		yl, 0x82		; 128 bytes
+00f12c f7e1      		brne	CalcCrc			;
+00f12d 9109      		ld		i, Y+			; get hi CRC from buffer
+00f12e 1707      		cp		i, crch			; compare to calculated hi CRC
+00f12f f419      		brne	BadCrc			; bad crc, send NAK
+00f130 8108      		ld		i, Y			; get lo CRC from buffer
+00f131 1706      		cp		i, crc			; compare to calculated lo CRC
+00f132 f021      		breq	GoodCrc			; good CRC
+                 BadCrc:		
+00f133 d051      		rcall	Flush			; flush the input port
+00f134 e105      		ldi		i, NAK			;
+00f135 d0ac      		rcall	Put_Chr			; send NAK to resend block
+00f136 cfcb      		rjmp	StartBlk		; start over, get the block again			
+                 GoodCrc:
+00f137 e0c2      		ldi		yl, 0x02		;
+                 Write1:	
+00f138 9109      		ld		i, Y+			; move buffer to RAM Holding Area
+00f139 930d      		st		X+, i
+00f13a 38c2      		cpi		yl, 0x82	;		
+00f13b f7e1      		brne	Write1
+00f13c 23aa      		tst		xl
+00f13d f579      		brne	IncBlk			; if not zero, get next block
+                 ; write 256 bytes to Flash
+00f13e 01f4      		movw	zl, zsav		; restore flash address
+00f13f beab      		out		rampz, rzsav	; and bank address
+00f140 e0a0      		ldi		xl, 0x00
+00f141 e1b0      		ldi		xh, 0x10		; start of buffer
+00f142 3082      		cpi		blkno, 0x02		; first page write, don't test zh
+00f143 f021      		breq	write11
+00f144 30f0      		cpi		zh, 0x00		; exceeded flash space?
+00f145 f411      		brne	write11
+00f146 2ca3      		mov		rzsav, one
+00f147 beab      		out		rampz, rzsav
+                 Write11:	
+00f148 b71f      		in		j, sreg			; save sreg
+00f149 94f8      		cli						; disable irq's
+                 fploop:		
+00f14a 900d      		ld		r0, X+
+00f14b 901d      		ld		r1, X+
+                 stbf1:		
+00f14c b707      		in		i, spmcsr		; get status
+00f14d 7001      		andi	i, 0x01			; mask spmen
+00f14e f7e9      		brne	stbf1			; wait for spm to complete
+00f14f be37      		out		spmcsr, one		; enable SPM only - write to int buffer
+00f150 95e8      		spm
+00f151 9632      		adiw	zl, 0x02		; inc Z pointer (word pointer)
+00f152 23ee      		tst		zl
+00f153 f7b1      		brne	fploop			; store all 256 bytes 128 words
+00f154 95fa      		dec		zh				; back to current page
+                 erase1:		
+00f155 b707      		in		i, spmcsr		; get status
+00f156 7001      		andi	i, 0x01			; mask spmen
+00f157 f7e9      		brne	erase1			; wait for spm to complete
+00f158 e003      		ldi		i, 0x03			; SPM En + PGERS (erase page)
+00f159 bf07      		out		spmcsr, i
+00f15a 95e8      		spm
+                 write2:		
+00f15b b707      		in		i, spmcsr		; get status
+00f15c 7001      		andi	i, 0x01			; mask spmen
+00f15d f7e9      		brne	write2			; wait for spm to complete
+00f15e e005      		ldi		i, 0x05			; SPM En + PGWRT (write page)
+00f15f bf07      		out		spmcsr, i	
+00f160 95e8      		spm
+00f161 95f3      		inc		zh				; go to next page
+                 write3:		
+00f162 b707      		in		i, spmcsr		; get status
+00f163 7001      		andi	i, 0x01			; mask spmen
+00f164 f7e9      		brne	write3			; wait for spm to complete
+00f165 e101      		ldi		i, 0x11			; SPM En + RWWSRE (Enable RWW reads)
+00f166 bf07      		out		spmcsr, i
+00f167 95e8      		spm
+00f168 014f      		movw	zsav, zl		; save page address
+00f169 b6ab      		in		rzsav, rampz	; save bank address
+00f16a e0a0      		ldi		xl, 0x00
+00f16b e1b0      		ldi		xh, 0x10		; start of buffer
+00f16c bf1f      		out		sreg, j			; restore sreg & int state
+                 IncBlk:		
+00f16d 9583      		inc		blkno			; done.  Inc the block #
+00f16e e006      		ldi		i, ACK			; send ACK
+00f16f 940e f1e2 		call	Put_Chr			;
+00f171 cf90      		rjmp	StartBlk		; get next block
+                 Done:		
+00f172 e006      		ldi		i, ACK			; last block, send ACK and exit.
+00f173 d06e      		rcall	Put_Chr			;
+00f174 d010      		rcall	Flush			; get leftover characters, if any
+00f175 d04d      		rcall	Print_Good		;
+00f176 be2b      		out		rampz, zero		; reset rampz to zero
+00f177 9508      		ret						;
+                 ;
+                 ;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+                 ;
+                 ; subroutines
+                 ;
+                 ;								;
+                 GetByte:						; wait for chr input and cycle timing loop
+00f178 2466      		clr		retry			; set low value of timing loop
+                 StartCrcLp:	
+00f179 d05f      		rcall	Get_chr			; get chr from serial port, don't wait 
+00f17a f048      		brcs	GetByte1		; got one, so exit
+                 
+00f17b e214      		ldi		j, 0x24			; delay loop
+                 getb2234:	
+00f17c 9104      		lpm		i,	Z
+00f17d 951a      		dec		j
+00f17e f7e9      		brne	getb2234		; delay
+                 
+00f17f 946a      		dec		retry			; no character received, so dec counter
+00f180 f7c1      		brne	StartCrcLp		;
+00f181 959a      		dec		retry2			; dec hi byte of counter
+00f182 f7b1      		brne	StartCrcLp		; look for character again
+00f183 9488      		clc						; if loop times out, CLC, else SEC and return
+                 GetByte1:	
+00f184 9508      		ret						; with character in "A"
+                 ;
+                 Flush:							; flush receive buffer
+00f185 e790      		ldi		retry2, 0x70	; flush until empty for ~1 sec.
+                 Flush1:	
+00f186 dff1      		rcall	GetByte			; read the port
+00f187 f3e8      		brcs	Flush			; if chr recvd, wait for another
+00f188 9508      		ret						; else done
+                 ;
+                 PrintMsg:
+00f189 b6ab      		in		rzsav, rampz
+00f18a be3b      		out		rampz, one
+00f18b eef3      		ldi		zh, high(Msg*2)	; PRINT starting message
+00f18c e2e8      		ldi		zl, low(Msg*2)	;
+                 PrtMsg1:
+00f18d 9107      		elpm   	i, Z+		
+00f18e 2300      		tst		i
+00f18f f011      		breq	PrtMsg2			
+00f190 d051      		rcall	Put_Chr
+00f191 cffb      		rjmp	PrtMsg1
+                 PrtMsg2:
+00f192 beab      		out		rampz, rzsav
+00f193 9508      		ret
+                 
+                 Msg:
+00f194 6542
+00f195 6967
+00f196 206e
+00f197 4d58
+00f198 444f
+00f199 4d45
+00f19a 432f
+00f19b 4352
+00f19c 7420
+00f19d 6172
+00f19e 736e
+00f19f 6566
+00f1a0 2e72
+00f1a1 5020
+00f1a2 6572
+00f1a3 7373
+00f1a4 3c20
+00f1a5 7345
+00f1a6 3e63
+00f1a7 7420
+00f1a8 206f
+00f1a9 6261
+00f1aa 726f
+00f1ab 2e74
+00f1ac 2e2e      		.db		"Begin XMODEM/CRC transfer. Press <Esc> to abort..."
+00f1ad 0a0d
+00f1ae 0000      		.db  	CR, LF, 0x00, 0x00
+                 ;
+                 Print_Err:
+00f1af b6ab      		in		rzsav, rampz
+00f1b0 be3b      		out		rampz, one
+00f1b1 eef3      		ldi		zh, high(ErrMsg*2) ; PRINT Error message
+00f1b2 e7e4      		ldi		zl, low(ErrMsg*2)  ;
+                 PrtErr1:
+00f1b3 9107      		elpm   	i, Z+
+00f1b4 2300      		tst		i
+00f1b5 f011      		breq	PrtErr2
+00f1b6 d02b      		rcall	Put_Chr
+00f1b7 cffb      		rjmp	PrtErr1 
+                 PrtErr2:
+00f1b8 beab      		out		rampz, rzsav
+00f1b9 9508      		ret
+                 
+                 ErrMsg:
+00f1ba 7055
+00f1bb 6f6c
+00f1bc 6461
+00f1bd 4520
+00f1be 7272
+00f1bf 726f
+00f1c0 2021      		.db 	"Upload Error! "
+00f1c1 0a0d
+00f1c2 0000      		.db  	CR, LF, 0x00, 0x00
+                 ;
+                 Print_Good:
+00f1c3 b6ab      		in		rzsav, rampz
+00f1c4 be3b      		out		rampz, one
+00f1c5 eef3      		ldi		zh, high(GoodMsg*2) ; PRINT Good Transfer message
+00f1c6 e9ec      		ldi		zl, low(GoodMsg*2)  ;
+                 Prtgood1:
+00f1c7 9107      		elpm   	i, Z+
+00f1c8 2300      		tst		i
+00f1c9 f011      		breq	Prtgood2
+00f1ca d017      		rcall	Put_Chr
+00f1cb cffb      		rjmp	Prtgood1
+                 Prtgood2:
+00f1cc beab      		out		rampz, rzsav
+00f1cd 9508      		ret
+                 
+                 GoodMsg:
+00f1ce 7055
+00f1cf 6f6c
+00f1d0 6461
+00f1d1 5320
+00f1d2 6375
+00f1d3 6563
+00f1d4 7373
+00f1d5 7566
+00f1d6 216c      		.db 	"Upload Successful!"
+00f1d7 0a0d
+00f1d8 0000      		.db 	CR, LF, 0x00, 0x00
+                 ;
+                 ;
+                 ;======================================================================
+                 ;  I/O Device Specific Routines
+                 ;
+                 ;  Two routines are used to communicate with the I/O device.
+                 ;
+                 ; "Get_Chr" routine will scan the input port for a character.  It will
+                 ; return without waiting with the Carry flag CLEAR if no character is
+                 ; present or return with the Carry flag SET and the character in the "A"
+                 ; register if one was present.
+                 ;
+                 ; "Put_Chr" routine will write one byte to the output port.  Its alright
+                 ; if this routine waits for the port to be ready.  its assumed that the 
+                 ; character was send upon return from this routine.
+                 ;
+                 ; input chr from USART (no waiting)
+                 ;
+                 
+                 Get_Chr:
+00f1d9 9488      		clc						; no chr present
+00f1da 9100 00c0 		lds		i, ucsr0a     	; get Serial port status
+00f1dc ff07      		sbrs	i, RXC0    		; mask rcvr full bit
+00f1dd c003      		rjmp	Get_Chr2		; if not chr, done
+00f1de 9100 00c6       	lds		i, udr0         ; else get chr
+00f1e0 9408      	   	sec						; and set the Carry Flag
+                 Get_Chr2:
+00f1e1 9508      		ret						; done
+                 ;
+                 ; output to OutPut Port
+                 ;
+                 Put_Chr:
+00f1e2 9110 00c0 	   	lds 	j, ucsr0a       ; 
+00f1e4 ff15      		sbrs	j, udre0
+00f1e5 cffc             	rjmp	Put_chr         ; is tx buffer empty
+00f1e6 9300 00c6        	sts		udr0, i			; put character to Port
+00f1e8 9508             	ret                     ; done
+                 ;=========================================================================
+                 ;
+                 ;
+                 ;  CRC subroutines 
+                 ;
+                 ;
+                 UpdCrc:
+00f1e9 2707      		eor 	i, crch				; Quick CRC computation with lookup tables
+00f1ea b6ab      		in		rzsav, rampz
+00f1eb be3b      		out		rampz, one
+00f1ec eeec             	ldi		zl, low(CRCHI*2) 	; updates the two bytes at crc & crc+1
+00f1ed eef4      		ldi		zh, high(CRCHI*2)	; with the byte send in the "A" register
+00f1ee 0fe0      		add		zl, i				; with the byte send in the "A" register
+00f1ef 1df2      		adc		zh, zero
+00f1f0 9176      		elpm	crch, Z
+00f1f1 2776             	eor 	crch, crc
+00f1f2 95fa      		dec		zh					; assumes crclo is 256 bytes lower in mem
+00f1f3 9166      		elpm	crc, Z
+00f1f4 beab            	out		rampz, rzsav
+00f1f5 9508      	   	ret
+                 
+                 ; low byte CRC lookup table
+                 
+                 crclo:
+00f1f6 2100
+00f1f7 6342
+00f1f8 a584
+00f1f9 e7c6
+00f1fa 2908
+00f1fb 6b4a
+00f1fc ad8c
+00f1fd efce       .db 0x00,0x21,0x42,0x63,0x84,0xA5,0xC6,0xE7,0x08,0x29,0x4A,0x6B,0x8C,0xAD,0xCE,0xEF
+00f1fe 1031
+00f1ff 5273
+00f200 94b5
+00f201 d6f7
+00f202 1839
+00f203 5a7b
+00f204 9cbd
+00f205 deff       .db 0x31,0x10,0x73,0x52,0xB5,0x94,0xF7,0xD6,0x39,0x18,0x7B,0x5A,0xBD,0x9C,0xFF,0xDE
+00f206 4362
+00f207 0120
+00f208 c7e6
+00f209 85a4
+00f20a 4b6a
+00f20b 0928
+00f20c cfee
+00f20d 8dac       .db 0x62,0x43,0x20,0x01,0xE6,0xC7,0xA4,0x85,0x6A,0x4B,0x28,0x09,0xEE,0xCF,0xAC,0x8D
+00f20e 7253
+00f20f 3011
+00f210 f6d7
+00f211 b495
+00f212 7a5b
+00f213 3819
+00f214 fedf
+00f215 bc9d       .db 0x53,0x72,0x11,0x30,0xD7,0xF6,0x95,0xB4,0x5B,0x7A,0x19,0x38,0xDF,0xFE,0x9D,0xBC
+00f216 e5c4
+00f217 a786
+00f218 6140
+00f219 2302
+00f21a edcc
+00f21b af8e
+00f21c 6948
+00f21d 2b0a       .db 0xC4,0xE5,0x86,0xA7,0x40,0x61,0x02,0x23,0xCC,0xED,0x8E,0xAF,0x48,0x69,0x0A,0x2B
+00f21e d4f5
+00f21f 96b7
+00f220 5071
+00f221 1233
+00f222 dcfd
+00f223 9ebf
+00f224 5879
+00f225 1a3b       .db 0xF5,0xD4,0xB7,0x96,0x71,0x50,0x33,0x12,0xFD,0xDC,0xBF,0x9E,0x79,0x58,0x3B,0x1A
+00f226 87a6
+00f227 c5e4
+00f228 0322
+00f229 4160
+00f22a 8fae
+00f22b cdec
+00f22c 0b2a
+00f22d 4968       .db 0xA6,0x87,0xE4,0xC5,0x22,0x03,0x60,0x41,0xAE,0x8F,0xEC,0xCD,0x2A,0x0B,0x68,0x49
+00f22e b697
+00f22f f4d5
+00f230 3213
+00f231 7051
+00f232 be9f
+00f233 fcdd
+00f234 3a1b
+00f235 7859       .db 0x97,0xB6,0xD5,0xF4,0x13,0x32,0x51,0x70,0x9F,0xBE,0xDD,0xFC,0x1B,0x3A,0x59,0x78
+00f236 a988
+00f237 ebca
+00f238 2d0c
+00f239 6f4e
+00f23a a180
+00f23b e3c2
+00f23c 2504
+00f23d 6746       .db 0x88,0xA9,0xCA,0xEB,0x0C,0x2D,0x4E,0x6F,0x80,0xA1,0xC2,0xE3,0x04,0x25,0x46,0x67
+00f23e 98b9
+00f23f dafb
+00f240 1c3d
+00f241 5e7f
+00f242 90b1
+00f243 d2f3
+00f244 1435
+00f245 5677       .db 0xB9,0x98,0xFB,0xDA,0x3D,0x1C,0x7F,0x5E,0xB1,0x90,0xF3,0xD2,0x35,0x14,0x77,0x56
+00f246 cbea
+00f247 89a8
+00f248 4f6e
+00f249 0d2c
+00f24a c3e2
+00f24b 81a0
+00f24c 4766
+00f24d 0524       .db 0xEA,0xCB,0xA8,0x89,0x6E,0x4F,0x2C,0x0D,0xE2,0xC3,0xA0,0x81,0x66,0x47,0x24,0x05
+00f24e fadb
+00f24f b899
+00f250 7e5f
+00f251 3c1d
+00f252 f2d3
+00f253 b091
+00f254 7657
+00f255 3415       .db 0xDB,0xFA,0x99,0xB8,0x5F,0x7E,0x1D,0x3C,0xD3,0xF2,0x91,0xB0,0x57,0x76,0x15,0x34
+00f256 6d4c
+00f257 2f0e
+00f258 e9c8
+00f259 ab8a
+00f25a 6544
+00f25b 2706
+00f25c e1c0
+00f25d a382       .db 0x4C,0x6D,0x0E,0x2F,0xC8,0xE9,0x8A,0xAB,0x44,0x65,0x06,0x27,0xC0,0xE1,0x82,0xA3
+00f25e 5c7d
+00f25f 1e3f
+00f260 d8f9
+00f261 9abb
+00f262 5475
+00f263 1637
+00f264 d0f1
+00f265 92b3       .db 0x7D,0x5C,0x3F,0x1E,0xF9,0xD8,0xBB,0x9A,0x75,0x54,0x37,0x16,0xF1,0xD0,0xB3,0x92
+00f266 0f2e
+00f267 4d6c
+00f268 8baa
+00f269 c9e8
+00f26a 0726
+00f26b 4564
+00f26c 83a2
+00f26d c1e0       .db 0x2E,0x0F,0x6C,0x4D,0xAA,0x8B,0xE8,0xC9,0x26,0x07,0x64,0x45,0xA2,0x83,0xE0,0xC1
+00f26e 3e1f
+00f26f 7c5d
+00f270 ba9b
+00f271 f8d9
+00f272 3617
+00f273 7455
+00f274 b293
+00f275 f0d1       .db 0x1F,0x3E,0x5D,0x7C,0x9B,0xBA,0xD9,0xF8,0x17,0x36,0x55,0x74,0x93,0xB2,0xD1,0xF0 
+                 
+                 ; hi byte CRC lookup table
+                 
+                 crchi:
+00f276 1000
+00f277 3020
+00f278 5040
+00f279 7060
+00f27a 9181
+00f27b b1a1
+00f27c d1c1
+00f27d f1e1       .db 0x00,0x10,0x20,0x30,0x40,0x50,0x60,0x70,0x81,0x91,0xA1,0xB1,0xC1,0xD1,0xE1,0xF1
+00f27e 0212
+00f27f 2232
+00f280 4252
+00f281 6272
+00f282 8393
+00f283 a3b3
+00f284 c3d3
+00f285 e3f3       .db 0x12,0x02,0x32,0x22,0x52,0x42,0x72,0x62,0x93,0x83,0xB3,0xA3,0xD3,0xC3,0xF3,0xE3
+00f286 3424
+00f287 1404
+00f288 7464
+00f289 5444
+00f28a b5a5
+00f28b 9585
+00f28c f5e5
+00f28d d5c5       .db 0x24,0x34,0x04,0x14,0x64,0x74,0x44,0x54,0xA5,0xB5,0x85,0x95,0xE5,0xF5,0xC5,0xD5
+00f28e 2636
+00f28f 0616
+00f290 6676
+00f291 4656
+00f292 a7b7
+00f293 8797
+00f294 e7f7
+00f295 c7d7       .db 0x36,0x26,0x16,0x06,0x76,0x66,0x56,0x46,0xB7,0xA7,0x97,0x87,0xF7,0xE7,0xD7,0xC7
+00f296 5848
+00f297 7868
+00f298 1808
+00f299 3828
+00f29a d9c9
+00f29b f9e9
+00f29c 9989
+00f29d b9a9       .db 0x48,0x58,0x68,0x78,0x08,0x18,0x28,0x38,0xC9,0xD9,0xE9,0xF9,0x89,0x99,0xA9,0xB9
+00f29e 4a5a
+00f29f 6a7a
+00f2a0 0a1a
+00f2a1 2a3a
+00f2a2 cbdb
+00f2a3 ebfb
+00f2a4 8b9b
+00f2a5 abbb       .db 0x5A,0x4A,0x7A,0x6A,0x1A,0x0A,0x3A,0x2A,0xDB,0xCB,0xFB,0xEB,0x9B,0x8B,0xBB,0xAB
+00f2a6 7c6c
+00f2a7 5c4c
+00f2a8 3c2c
+00f2a9 1c0c
+00f2aa fded
+00f2ab ddcd
+00f2ac bdad
+00f2ad 9d8d       .db 0x6C,0x7C,0x4C,0x5C,0x2C,0x3C,0x0C,0x1C,0xED,0xFD,0xCD,0xDD,0xAD,0xBD,0x8D,0x9D
+00f2ae 6e7e
+00f2af 4e5e
+00f2b0 2e3e
+00f2b1 0e1e
+00f2b2 efff
+00f2b3 cfdf
+00f2b4 afbf
+00f2b5 8f9f       .db 0x7E,0x6E,0x5E,0x4E,0x3E,0x2E,0x1E,0x0E,0xFF,0xEF,0xDF,0xCF,0xBF,0xAF,0x9F,0x8F
+00f2b6 8191
+00f2b7 a1b1
+00f2b8 c1d1
+00f2b9 e1f1
+00f2ba 0010
+00f2bb 2030
+00f2bc 4050
+00f2bd 6070       .db 0x91,0x81,0xB1,0xA1,0xD1,0xC1,0xF1,0xE1,0x10,0x00,0x30,0x20,0x50,0x40,0x70,0x60
+00f2be 9383
+00f2bf b3a3
+00f2c0 d3c3
+00f2c1 f3e3
+00f2c2 1202
+00f2c3 3222
+00f2c4 5242
+00f2c5 7262       .db 0x83,0x93,0xA3,0xB3,0xC3,0xD3,0xE3,0xF3,0x02,0x12,0x22,0x32,0x42,0x52,0x62,0x72
+00f2c6 a5b5
+00f2c7 8595
+00f2c8 e5f5
+00f2c9 c5d5
+00f2ca 2434
+00f2cb 0414
+00f2cc 6474
+00f2cd 4454       .db 0xB5,0xA5,0x95,0x85,0xF5,0xE5,0xD5,0xC5,0x34,0x24,0x14,0x04,0x74,0x64,0x54,0x44
+00f2ce b7a7
+00f2cf 9787
+00f2d0 f7e7
+00f2d1 d7c7
+00f2d2 3626
+00f2d3 1606
+00f2d4 7666
+00f2d5 5646       .db 0xA7,0xB7,0x87,0x97,0xE7,0xF7,0xC7,0xD7,0x26,0x36,0x06,0x16,0x66,0x76,0x46,0x56
+00f2d6 c9d9
+00f2d7 e9f9
+00f2d8 8999
+00f2d9 a9b9
+00f2da 4858
+00f2db 6878
+00f2dc 0818
+00f2dd 2838       .db 0xD9,0xC9,0xF9,0xE9,0x99,0x89,0xB9,0xA9,0x58,0x48,0x78,0x68,0x18,0x08,0x38,0x28
+00f2de dbcb
+00f2df fbeb
+00f2e0 9b8b
+00f2e1 bbab
+00f2e2 5a4a
+00f2e3 7a6a
+00f2e4 1a0a
+00f2e5 3a2a       .db 0xCB,0xDB,0xEB,0xFB,0x8B,0x9B,0xAB,0xBB,0x4A,0x5A,0x6A,0x7A,0x0A,0x1A,0x2A,0x3A
+00f2e6 edfd
+00f2e7 cddd
+00f2e8 adbd
+00f2e9 8d9d
+00f2ea 6c7c
+00f2eb 4c5c
+00f2ec 2c3c
+00f2ed 0c1c       .db 0xFD,0xED,0xDD,0xCD,0xBD,0xAD,0x9D,0x8D,0x7C,0x6C,0x5C,0x4C,0x3C,0x2C,0x1C,0x0C
+00f2ee ffef
+00f2ef dfcf
+00f2f0 bfaf
+00f2f1 9f8f
+00f2f2 7e6e
+00f2f3 5e4e
+00f2f4 3e2e
+00f2f5 1e0e       .db 0xEF,0xFF,0xCF,0xDF,0xAF,0xBF,0x8F,0x9F,0x6E,0x7E,0x4E,0x5E,0x2E,0x3E,0x0E,0x1E 
+                 ;
+                 ;
+                 ; End of File
+                 ;
+                 ;
+                 ; $0000-$3EFF - 15.75k RAM
+                 ; $3F00-$3FFF - I/O
+                 ; $4000-$FFFF - 48k ROM 
+                 ;
+                 ; Version 2.7 supports AVR interrupts and the full AVR IO page access
+                 ; 	      FULL WDC 65C02 instruction set, including BCD mode
+                 ; V 3.0 changed opcode excution to a macro and added a table for IO execute
+                 ;       also moved IRQ flag from GPIOR0 ro R5 - EEPROM flag moved to GPIOR0
+                 ;	fixed NOP byte count for unused opcoded
+                 ;	updated bootloader to load engine across the $8000 word boundary
+                 ; Version 3.1 - corrected opcode behavior
+
+
+RESOURCE USE INFORMATION
+------------------------
+
+Notice:
+The register and instruction counts are symbol table hit counts,
+and hence implicitly used resources are not counted, eg, the
+'lpm' instruction without operands implicitly uses r0 and z,
+none of which are counted.
+
+x,y,z are separate entities in the symbol table and are
+counted separately from r26..r31 here.
+
+.dseg memory usage only counts static data declared with .byte
+
+ATmega1284P register use summary:
+r0 :   1 r1 :   1 r2 : 587 r3 :  53 r4 : 503 r5 : 226 r6 :   2 r7 :   1 
+r8 :   4 r9 :   3 r10:  13 r11:   0 r12:   0 r13:   0 r14:  72 r15:  44 
+r16: 934 r17: 385 r18: 163 r19:  47 r20: 357 r21: 276 r22:   5 r23:   6 
+r24:   7 r25:   6 r26: 868 r27:  63 r28:  34 r29:   2 r30:2315 r31:2317 
+x  :   3 y  :  31 z  :1310 
+Registers used: 32 out of 35 (91.4%)
+
+ATmega1284P instruction use summary:
+.lds  :   0 .sts  :   0 adc   : 534 add   : 105 adiw  : 400 and   :  20 
+andi  :  58 asr   :   0 bclr  :   0 bld   :  26 brbc  :   0 brbs  :   0 
+brcc  : 132 brcs  : 661 break :   0 breq  : 287 brge  :   0 brhc  :  18 
+brhs  :   0 brid  :   0 brie  :   0 brlo  :   0 brlt  :   0 brmi  :  25 
+brne  :  55 brpl  :   0 brsh  :   0 brtc  :   0 brts  :   0 brvc  :   0 
+brvs  :   0 bset  :   0 bst   :  26 call  :   7 cbi   :   0 cbr   :   6 
+clc   :   2 clh   :   0 cli   :   5 cln   :   0 clr   :  45 cls   :   0 
+clt   :   0 clv   :   0 clz   :   0 com   :   2 cp    : 507 cpc   :   0 
+cpi   : 301 cpse  :   0 dec   :  66 elpm  :   7 eor   :  54 fmul  :   0 
+fmuls :   0 fmulsu:   0 icall :   0 ijmp  : 446 in    : 180 inc   : 531 
+jmp   : 485 ld    : 683 ldd   :   0 ldi   : 922 lds   :   4 lpm   :1026 
+lsl   : 451 lsr   :   5 mov   : 392 movw  : 500 mul   :   0 muls  :   0 
+mulsu :   0 neg   :   0 nop   :   0 or    :  17 ori   :  40 out   : 173 
+pop   :   0 push  :   0 rcall : 244 ret   :  15 reti  :   0 rjmp  : 807 
+rol   :  14 ror   :  23 sbc   :   9 sbci  :   0 sbi   :  48 sbic  :   0 
+sbis  :   0 sbiw  :   1 sbr   :   0 sbrc  : 246 sbrs  :  33 sec   :  10 
+seh   :   0 sei   :   1 sen   :   0 ser   :   0 ses   :   0 set   :   0 
+sev   :   0 sez   :   9 sleep :   0 spm   :   8 st    : 103 std   :   0 
+sts   :   9 sub   :   9 subi  :  18 swap  :   0 tst   :  77 wdr   :   0 
+
+Instructions used: 58 out of 114 (50.9%)
+
+ATmega1284P memory use summary [bytes]:
+Segment   Begin    End      Code   Data   Used    Size   Use%
+---------------------------------------------------------------
+[.cseg] 0x003600 0x01e5ec  21828  50720  72548  131072  55.3%
+[.dseg] 0x000100 0x000100      0      0      0   16384   0.0%
+[.eseg] 0x000000 0x000000      0      0      0    4096   0.0%
+
+Assembly complete, 0 errors, 0 warnings
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502.map b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502.map
new file mode 100644
index 00000000..923aacac
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502.map
@@ -0,0 +1,3525 @@
+
+AVRASM ver. 2.1.42  C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\avr6502.asm Tue Jul 23 19:18:19 2013
+
+
+EQU  SIGNATURE_000 0000001e
+EQU  SIGNATURE_001 00000097
+EQU  SIGNATURE_002 00000005
+EQU  UDR1         000000ce
+EQU  UBRR1L       000000cc
+EQU  UBRR1H       000000cd
+EQU  UCSR1C       000000ca
+EQU  UCSR1B       000000c9
+EQU  UCSR1A       000000c8
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+EQU  UDRIE1       00000005
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+EQU  RXCIE1       00000007
+EQU  UCPOL1       00000000
+EQU  UCSZ10       00000001
+EQU  UCPHA1       00000001
+EQU  UCSZ11       00000002
+EQU  UDORD1       00000002
+EQU  USBS1        00000003
+EQU  UPM10        00000004
+EQU  UPM11        00000005
+EQU  UMSEL10      00000006
+EQU  UMSEL11      00000007
+EQU  UBRR_8       00000000
+EQU  UBRR_9       00000001
+EQU  UBRR_10      00000002
+EQU  UBRR_11      00000003
+EQU  UBRR_0       00000000
+EQU  UBRR_1       00000001
+EQU  UBRR_2       00000002
+EQU  UBRR_3       00000003
+EQU  UBRR_4       00000004
+EQU  UBRR_5       00000005
+EQU  UBRR_6       00000006
+EQU  UBRR_7       00000007
+EQU  SPDR0        00000000
+EQU  SPDR1        00000001
+EQU  SPDR2        00000002
+EQU  SPDR3        00000003
+EQU  SPDR4        00000004
+EQU  SPDR5        00000005
+EQU  SPDR6        00000006
+EQU  SPDR7        00000007
+EQU  SPI2X        00000000
+EQU  WCOL         00000006
+EQU  SPIF         00000007
+EQU  SPR0         00000000
+EQU  SPR1         00000001
+EQU  CPHA         00000002
+EQU  CPOL         00000003
+EQU  MSTR         00000004
+EQU  DORD         00000005
+EQU  SPE          00000006
+EQU  SPIE         00000007
+EQU  WDP0         00000000
+EQU  WDP1         00000001
+EQU  WDP2         00000002
+EQU  WDE          00000003
+EQU  WDCE         00000004
+EQU  WDP3         00000005
+EQU  WDIE         00000006
+EQU  WDIF         00000007
+EQU  SREG_C       00000000
+EQU  SREG_Z       00000001
+EQU  SREG_N       00000002
+EQU  SREG_V       00000003
+EQU  SREG_S       00000004
+EQU  SREG_H       00000005
+EQU  SREG_T       00000006
+EQU  SREG_I       00000007
+EQU  IVCE         00000000
+EQU  IVSEL        00000001
+EQU  PUD          00000004
+EQU  BODSE        00000005
+EQU  BODS         00000006
+EQU  PORF         00000000
+EQU  EXTRF        00000001
+EQU  BORF         00000002
+EQU  WDRF         00000003
+EQU  CAL0         00000000
+EQU  CAL1         00000001
+EQU  CAL2         00000002
+EQU  CAL3         00000003
+EQU  CAL4         00000004
+EQU  CAL5         00000005
+EQU  CAL6         00000006
+EQU  CAL7         00000007
+EQU  CLKPS0       00000000
+EQU  CLKPS1       00000001
+EQU  CLKPS2       00000002
+EQU  CLKPS3       00000003
+EQU  CLKPCE       00000007
+EQU  SE           00000000
+EQU  SM0          00000001
+EQU  SM1          00000002
+EQU  SM2          00000003
+EQU  RAMPZ0       00000000
+EQU  GPIOR20      00000000
+EQU  GPIOR21      00000001
+EQU  GPIOR22      00000002
+EQU  GPIOR23      00000003
+EQU  GPIOR24      00000004
+EQU  GPIOR25      00000005
+EQU  GPIOR26      00000006
+EQU  GPIOR27      00000007
+EQU  GPIOR10      00000000
+EQU  GPIOR11      00000001
+EQU  GPIOR12      00000002
+EQU  GPIOR13      00000003
+EQU  GPIOR14      00000004
+EQU  GPIOR15      00000005
+EQU  GPIOR16      00000006
+EQU  GPIOR17      00000007
+EQU  GPIOR00      00000000
+EQU  GPIOR01      00000001
+EQU  GPIOR02      00000002
+EQU  GPIOR03      00000003
+EQU  GPIOR04      00000004
+EQU  GPIOR05      00000005
+EQU  GPIOR06      00000006
+EQU  GPIOR07      00000007
+EQU  PRADC        00000000
+EQU  PRUSART0     00000001
+EQU  PRSPI        00000002
+EQU  PRTIM1       00000003
+EQU  PRUSART1     00000004
+EQU  PRTIM0       00000005
+EQU  PRTIM2       00000006
+EQU  PRTWI        00000007
+EQU  PRTIM3       00000000
+EQU  LB1          00000000
+EQU  LB2          00000001
+EQU  BLB01        00000002
+EQU  BLB02        00000003
+EQU  BLB11        00000004
+EQU  BLB12        00000005
+EQU  CKSEL0       00000000
+EQU  CKSEL1       00000001
+EQU  CKSEL2       00000002
+EQU  CKSEL3       00000003
+EQU  SUT0         00000004
+EQU  SUT1         00000005
+EQU  CKOUT        00000006
+EQU  CKDIV8       00000007
+EQU  BOOTRST      00000000
+EQU  BOOTSZ0      00000001
+EQU  BOOTSZ1      00000002
+EQU  EESAVE       00000003
+EQU  WDTON        00000004
+EQU  SPIEN        00000005
+EQU  JTAGEN       00000006
+EQU  OCDEN        00000007
+EQU  BODLEVEL0    00000000
+EQU  BODLEVEL1    00000001
+EQU  BODLEVEL2    00000002
+DEF  XH           r27
+DEF  XL           r26
+DEF  YH           r29
+DEF  YL           r28
+DEF  ZH           r31
+DEF  ZL           r30
+EQU  FLASHEND     0000ffff
+EQU  IOEND        000000ff
+EQU  SRAM_START   00000100
+EQU  SRAM_SIZE    00004000
+EQU  RAMEND       000040ff
+EQU  XRAMEND      00000000
+EQU  E2END        00000fff
+EQU  EEPROMEND    00000fff
+EQU  EEADRBITS    0000000c
+EQU  NRWW_START_ADDR 0000f000
+EQU  NRWW_STOP_ADDR 0000ffff
+EQU  RWW_START_ADDR 00000000
+EQU  RWW_STOP_ADDR 0000efff
+EQU  PAGESIZE     00000080
+EQU  FIRSTBOOTSTART 0000fe00
+EQU  SECONDBOOTSTART 0000fc00
+EQU  THIRDBOOTSTART 0000f800
+EQU  FOURTHBOOTSTART 0000f000
+EQU  SMALLBOOTSTART 0000fe00
+EQU  LARGEBOOTSTART 0000f000
+EQU  INT0addr     00000002
+EQU  INT1addr     00000004
+EQU  INT2addr     00000006
+EQU  PCI0addr     00000008
+EQU  PCI1addr     0000000a
+EQU  PCI2addr     0000000c
+EQU  PCI3addr     0000000e
+EQU  WDTaddr      00000010
+EQU  OC2Aaddr     00000012
+EQU  OC2Baddr     00000014
+EQU  OVF2addr     00000016
+EQU  ICP1addr     00000018
+EQU  OC1Aaddr     0000001a
+EQU  OC1Baddr     0000001c
+EQU  OVF1addr     0000001e
+EQU  OC0Aaddr     00000020
+EQU  OC0Baddr     00000022
+EQU  OVF0addr     00000024
+EQU  SPIaddr      00000026
+EQU  URXC0addr    00000028
+EQU  UDRE0addr    0000002a
+EQU  UTXC0addr    0000002c
+EQU  ACIaddr      0000002e
+EQU  ADCCaddr     00000030
+EQU  ERDYaddr     00000032
+EQU  TWIaddr      00000034
+EQU  SPMRaddr     00000036
+EQU  URXC1addr    00000038
+EQU  UDRE1addr    0000003a
+EQU  UTXC1addr    0000003c
+EQU  ICP3addr     0000003e
+EQU  OC3Aaddr     00000040
+EQU  OC3Baddr     00000042
+EQU  OVF3addr     00000044
+EQU  INT_VECTORS_SIZE 00000046
+DEF  i            r16
+DEF  j            r17
+DEF  zero         r2
+DEF  one          r3
+DEF  mmap         r4
+DEF  free1        r12
+DEF  free2        r13
+CSEG tav2sr       00001b00
+CSEG tsr2av       00001c00
+CSEG opctbl       00001d00
+CSEG _BRK_IMP     00008085
+CSEG _ORA_INDX    000080ab
+CSEG _INV2        0000805d
+CSEG _INV         0000804a
+CSEG _TSB_ZPG     000080e3
+CSEG _ORA_ZPG     0000810e
+CSEG _ASL_ZPG     00008135
+CSEG _RMB0_ZPG    0000815d
+CSEG _PHP_IMP     00008183
+CSEG _ORA_IMM     0000819d
+CSEG _ASL_IMP     000081c2
+CSEG _TSB_ABS     000081d8
+CSEG _ORA_ABS     00008223
+CSEG _ASL_ABS     00008258
+CSEG _BBR0_REL    000082a0
+CSEG _BPL_REL     000082d1
+CSEG _ORA_INDY    00008311
+CSEG _ORA_IND     0000834a
+CSEG _TRB_ZPG     00008381
+CSEG _ORA_ZPGX    000083ae
+CSEG _ASL_ZPGX    000083d6
+CSEG _RMB1_ZPG    000083ff
+CSEG _CLC_IMP     00008425
+CSEG _ORA_ABSY    00008439
+CSEG _INC_IMP     00008470
+CSEG _TRB_ABS     00008486
+CSEG _ORA_ABSX    000084d3
+CSEG _ASL_ABSX    0000850a
+CSEG _BBR1_REL    00008554
+CSEG _JSR_ABS     00008585
+CSEG _AND_INDX    000085af
+CSEG _BIT_ZPG     000085e7
+CSEG _AND_ZPG     00008613
+CSEG _ROL_ZPG     0000863a
+CSEG _RMB2_ZPG    00008662
+CSEG _PLP_IMP     00008688
+CSEG _AND_IMM     000086a3
+CSEG _ROL_IMP     000086c8
+CSEG _BIT_ABS     000086de
+CSEG _AND_ABS     00008718
+CSEG _ROL_ABS     0000874d
+CSEG _BBR2_REL    00008795
+CSEG _BMI_REL     000087c6
+CSEG _AND_INDY    00008806
+CSEG _AND_IND     0000883f
+CSEG _BIT_ZPGX    00008876
+CSEG _AND_ZPGX    000088a3
+CSEG _ROL_ZPGX    000088cb
+CSEG _RMB3_ZPG    000088f4
+CSEG _SEC_IMP     0000891a
+CSEG _AND_ABSY    0000892e
+CSEG _DEC_IMP     00008965
+CSEG _BIT_ABSX    0000897b
+CSEG _AND_ABSX    000089b7
+CSEG _ROL_ABSX    000089ee
+CSEG _BBR3_REL    00008a38
+CSEG _RTI_IMP     00008a69
+CSEG _EOR_INDX    00008a86
+CSEG _EOR_ZPG     00008abe
+CSEG _LSR_ZPG     00008ae5
+CSEG _RMB4_ZPG    00008b0d
+CSEG _PHA_IMP     00008b33
+CSEG _EOR_IMM     00008b48
+CSEG _LSR_IMP     00008b6d
+CSEG _JMP_ABS     00008b83
+CSEG _EOR_ABS     00008ba8
+CSEG _LSR_ABS     00008bdd
+CSEG _BBR4_REL    00008c25
+CSEG _BVC_REL     00008c56
+CSEG _EOR_INDY    00008c96
+CSEG _EOR_IND     00008ccf
+CSEG _EOR_ZPGX    00008d06
+CSEG _LSR_ZPGX    00008d2e
+CSEG _RMB5_ZPG    00008d57
+CSEG _CLI_IMP     00008d7d
+CSEG _EOR_ABSY    00008d92
+CSEG _PHY_IMP     00008dc9
+CSEG _INV3        00008071
+CSEG _EOR_ABSX    00008dde
+CSEG _LSR_ABSX    00008e15
+CSEG _BBR5_REL    00008e5f
+CSEG _RTS_IMP     00008e90
+CSEG _ADC_INDX    00008ea8
+CSEG _STZ_ZPG     00008ef2
+CSEG _ADC_ZPG     00008f17
+CSEG _ROR_ZPG     00008f50
+CSEG _RMB6_ZPG    00008f78
+CSEG _PLA_IMP     00008f9e
+CSEG _ADC_IMM     00008fb6
+CSEG _ROR_IMP     00008fed
+CSEG _JMP_JIND    00009003
+CSEG _ADC_ABS     00009038
+CSEG _ROR_ABS     0000907f
+CSEG _BBR6_REL    000090c7
+CSEG _BVS_REL     000090f8
+CSEG _ADC_INDY    00009138
+CSEG _ADC_IND     00009183
+CSEG _STZ_ZPGX    000091cc
+CSEG _ADC_ZPGX    000091f2
+CSEG _ROR_ZPGX    0000922c
+CSEG _RMB7_ZPG    00009255
+CSEG _SEI_IMP     0000927b
+CSEG _ADC_ABSY    00009290
+CSEG _PLY_IMP     000092d9
+CSEG _JMP_JINDX   000092f1
+CSEG _ADC_ABSX    00009328
+CSEG _ROR_ABSX    00009371
+CSEG _BBR7_REL    000093bb
+CSEG _BRA_REL     000093ec
+CSEG _STA_INDX    00009416
+CSEG _STY_ZPG     0000944f
+CSEG _STA_ZPG     00009474
+CSEG _STX_ZPG     00009499
+CSEG _SMB0_ZPG    000094be
+CSEG _DEY_IMP     000094e4
+CSEG _BIT_IMM     000094fa
+CSEG _TXA_IMP     00009521
+CSEG _STY_ABS     00009538
+CSEG _STA_ABS     0000956e
+CSEG _STX_ABS     000095a4
+CSEG _BBS0_REL    000095da
+CSEG _BCC_REL     0000960b
+CSEG _STA_INDY    0000964b
+CSEG _STA_IND     00009685
+CSEG _STY_ZPGX    000096bd
+CSEG _STA_ZPGX    000096e3
+CSEG _STX_ZPGY    00009709
+CSEG _SMB1_ZPG    0000972f
+CSEG _TYA_IMP     00009755
+CSEG _STA_ABSY    0000976c
+CSEG _TXS_IMP     000097a4
+CSEG _STZ_ABS     000097b8
+CSEG _STA_ABSX    000097ee
+CSEG _STZ_ABSX    00009826
+CSEG _BBS1_REL    0000985e
+CSEG _LDY_IMM     0000988f
+CSEG _LDA_INDX    000098b5
+CSEG _LDX_IMM     000098ee
+CSEG _LDY_ZPG     00009914
+CSEG _LDA_ZPG     0000993c
+CSEG _LDX_ZPG     00009964
+CSEG _SMB2_ZPG    0000998c
+CSEG _TAY_IMP     000099b2
+CSEG _LDA_IMM     000099c9
+CSEG _TAX_IMP     000099ef
+CSEG _LDY_ABS     00009a06
+CSEG _LDA_ABS     00009a3c
+CSEG _LDX_ABS     00009a72
+CSEG _BBS2_REL    00009aa8
+CSEG _BCS_REL     00009ad9
+CSEG _LDA_INDY    00009b19
+CSEG _LDA_IND     00009b53
+CSEG _LDY_ZPGX    00009b8b
+CSEG _LDA_ZPGX    00009bb4
+CSEG _LDX_ZPGY    00009bdd
+CSEG _SMB3_ZPG    00009c06
+CSEG _CLV_IMP     00009c2c
+CSEG _LDA_ABSY    00009c40
+CSEG _TSX_IMP     00009c78
+CSEG _LDY_ABSX    00009c8f
+CSEG _LDA_ABSX    00009cc7
+CSEG _LDX_ABSY    00009cff
+CSEG _BBS3_REL    00009d37
+CSEG _CPY_IMM     00009d68
+CSEG _CMP_INDX    00009d8e
+CSEG _CPY_ZPG     00009dc7
+CSEG _CMP_ZPG     00009def
+CSEG _DEC_ZPG     00009e17
+CSEG _SMB4_ZPG    00009e3f
+CSEG _INY_IMP     00009e65
+CSEG _CMP_IMM     00009e7b
+CSEG _DEX_IMP     00009ea1
+CSEG _WAI_IMP     00009eb7
+CSEG _CPY_ABS     00009ecb
+CSEG _CMP_ABS     00009f01
+CSEG _DEC_ABS     00009f37
+CSEG _BBS4_REL    00009f7f
+CSEG _BNE_REL     00009fb0
+CSEG _CMP_INDY    00009ff0
+CSEG _CMP_IND     0000a02a
+CSEG _CMP_ZPGX    0000a062
+CSEG _DEC_ZPGX    0000a08b
+CSEG _SMB5_ZPG    0000a0b4
+CSEG _CLD_IMP     0000a0da
+CSEG _CMP_ABSY    0000a0ee
+CSEG _PHX_IMP     0000a126
+CSEG _STP_IMP     0000a13b
+CSEG _CMP_ABSX    0000a13c
+CSEG _DEC_ABSX    0000a174
+CSEG _BBS5_REL    0000a1be
+CSEG _CPX_IMM     0000a1ef
+CSEG _SBC_INDX    0000a215
+CSEG _CPX_ZPG     0000a25e
+CSEG _SBC_ZPG     0000a286
+CSEG _INC_ZPG     0000a2be
+CSEG _SMB6_ZPG    0000a2e6
+CSEG _INX_IMP     0000a30c
+CSEG _SBC_IMM     0000a322
+CSEG _NOP_IMP     0000a358
+CSEG _CPX_ABS     0000a36b
+CSEG _SBC_ABS     0000a3a1
+CSEG _INC_ABS     0000a3e7
+CSEG _BBS6_REL    0000a42f
+CSEG _BEQ_REL     0000a460
+CSEG _SBC_INDY    0000a4a0
+CSEG _SBC_IND     0000a4ea
+CSEG _SBC_ZPGX    0000a532
+CSEG _INC_ZPGX    0000a56b
+CSEG _SMB7_ZPG    0000a594
+CSEG _SED_IMP     0000a5ba
+CSEG _SBC_ABSY    0000a5ce
+CSEG _PLX_IMP     0000a616
+CSEG _SBC_ABSX    0000a62e
+CSEG _INC_ABSX    0000a676
+CSEG _BBS7_REL    0000a6c0
+CSEG ioexe        00001f80
+CSEG IMAGE        00002000
+CSEG STARTUP      00008000
+CSEG InitRS232    00008017
+CSEG version      00008036
+CSEG ver1         0000802b
+CSEG Ready        00008031
+CSEG Put_Chr      0000f1e2
+CSEG CPU_RESET    0000a700
+CSEG Main         0000a728
+DEF  AR           r18
+DEF  XR           r14
+DEF  YR           r15
+DEF  SR           r19
+DEF  AVSR         r20
+DEF  IRV          r21
+DEF  IFLAG        r5
+SET  ss           00000080
+SET  so           00000040
+SET  sx           00000020
+SET  sb           00000010
+SET  sd           00000008
+SET  si           00000004
+SET  sz           00000002
+SET  sc           00000001
+SET  ssp          00000007
+SET  sop          00000006
+SET  sxp          00000005
+SET  sbp          00000004
+SET  sdp          00000003
+SET  sip          00000002
+SET  szp          00000001
+SET  scp          00000000
+SET  ai           00000080
+SET  at           00000040
+SET  ah           00000020
+SET  as           00000010
+SET  av           00000008
+SET  an           00000004
+SET  az           00000002
+SET  ac           00000001
+SET  aip          00000007
+SET  atp          00000006
+SET  ahp          00000005
+SET  asp          00000004
+SET  avp          00000003
+SET  anp          00000002
+SET  azp          00000001
+SET  acp          00000000
+SET  ZP           00000001
+CSEG ROM@EXEC@5979 00008050
+CSEG RAM@EXEC@5979 00008055
+CSEG INTJMP@EXEC@5979 0000805b
+CSEG cpu_irq      0000a702
+CSEG ROM@EXEC@6010 00008064
+CSEG RAM@EXEC@6010 00008069
+CSEG INTJMP@EXEC@6010 0000806f
+CSEG ROM@EXEC@6041 00008078
+CSEG RAM@EXEC@6041 0000807d
+CSEG INTJMP@EXEC@6041 00008083
+CSEG ROM@EXEC@6093 0000809e
+CSEG RAM@EXEC@6093 000080a3
+CSEG INTJMP@EXEC@6093 000080a9
+CSEG ROM@READZ@6126 000080af
+CSEG done         0000f172
+CSEG IO@READZ@6126 000080b1
+CSEG IOR1@READZ@6126 000080b5
+CSEG RAM@READZ@6126 000080b7
+CSEG RAM1@READZ@6126 000080b8
+CSEG done@READZ@6126 000080b9
+CSEG ROM@READZ@6163 000080c3
+CSEG IO@READZ@6163 000080c5
+CSEG IOR1@READZ@6163 000080c9
+CSEG RAM@READZ@6163 000080cb
+CSEG RAM1@READZ@6163 000080cc
+CSEG done@READZ@6163 000080cd
+CSEG ROM@EXEC@6197 000080d6
+CSEG RAM@EXEC@6197 000080db
+CSEG INTJMP@EXEC@6197 000080e1
+CSEG ROM@READZ@6230 000080e7
+CSEG IO@READZ@6230 000080e9
+CSEG IOR1@READZ@6230 000080ed
+CSEG RAM@READZ@6230 000080ef
+CSEG RAM1@READZ@6230 000080f0
+CSEG done@READZ@6230 000080f1
+CSEG fin@_TSBZ@6256 000080f9
+CSEG ROM@EXEC@6275 00008101
+CSEG RAM@EXEC@6275 00008106
+CSEG INTJMP@EXEC@6275 0000810c
+CSEG ROM@READZ@6308 00008112
+CSEG IO@READZ@6308 00008114
+CSEG IOR1@READZ@6308 00008118
+CSEG RAM@READZ@6308 0000811a
+CSEG RAM1@READZ@6308 0000811b
+CSEG done@READZ@6308 0000811c
+CSEG ROM@EXEC@6351 00008128
+CSEG RAM@EXEC@6351 0000812d
+CSEG INTJMP@EXEC@6351 00008133
+CSEG ROM@READZ@6384 00008139
+CSEG IO@READZ@6384 0000813b
+CSEG IOR1@READZ@6384 0000813f
+CSEG RAM@READZ@6384 00008141
+CSEG RAM1@READZ@6384 00008142
+CSEG done@READZ@6384 00008143
+CSEG ROM@EXEC@6431 00008150
+CSEG RAM@EXEC@6431 00008155
+CSEG INTJMP@EXEC@6431 0000815b
+CSEG ROM@READZ@6466 00008161
+CSEG IO@READZ@6466 00008163
+CSEG IOR1@READZ@6466 00008167
+CSEG RAM@READZ@6466 00008169
+CSEG RAM1@READZ@6466 0000816a
+CSEG done@READZ@6466 0000816b
+CSEG ROM@EXEC@6503 00008176
+CSEG RAM@EXEC@6503 0000817b
+CSEG INTJMP@EXEC@6503 00008181
+CSEG ROM@EXEC@6543 00008190
+CSEG RAM@EXEC@6543 00008195
+CSEG INTJMP@EXEC@6543 0000819b
+CSEG ROM@READZ@6581 000081a2
+CSEG IO@READZ@6581 000081a4
+CSEG IOR1@READZ@6581 000081a8
+CSEG RAM@READZ@6581 000081aa
+CSEG RAM1@READZ@6581 000081ab
+CSEG done@READZ@6581 000081ac
+CSEG ROM@EXEC@6615 000081b5
+CSEG RAM@EXEC@6615 000081ba
+CSEG INTJMP@EXEC@6615 000081c0
+CSEG ROM@EXEC@6654 000081cb
+CSEG RAM@EXEC@6654 000081d0
+CSEG INTJMP@EXEC@6654 000081d6
+CSEG ROM@READ2@6687 000081dc
+CSEG IO@READ2@6687 000081df
+CSEG IOR21@READ2@6687 000081e4
+CSEG RAM@READ2@6687 000081e5
+CSEG done@READ2@6687 000081e8
+CSEG ROM@READ@6716 000081ed
+CSEG IO@READ@6716 000081ef
+CSEG IOR1@READ@6716 000081f5
+CSEG RAM@READ@6716 000081f7
+CSEG done@READ@6716 000081fa
+CSEG fin@_TSB@6714 000081ff
+CSEG RAM@WRITE@6749 00008203
+CSEG IO@WRITE@6749 00008206
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+CSEG ROM@READZ@10602 00008a9e
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+CSEG ROM@READZ@10745 00008ae9
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+CSEG IOR1@READZ@10745 00008aef
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+CSEG RAM1@READZ@10745 00008af2
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+CSEG ROM@EXEC@10792 00008b00
+CSEG RAM@EXEC@10792 00008b05
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+CSEG ROM@READZ@10827 00008b11
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+CSEG IOR1@READZ@10827 00008b17
+CSEG RAM@READZ@10827 00008b19
+CSEG RAM1@READZ@10827 00008b1a
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+CSEG ROM@EXEC@10864 00008b26
+CSEG RAM@EXEC@10864 00008b2b
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+CSEG ROM@EXEC@10896 00008b3b
+CSEG RAM@EXEC@10896 00008b40
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+CSEG ROM@READZ@10934 00008b4d
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+CSEG IOR1@READZ@10934 00008b53
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+CSEG RAM@EXEC@10968 00008b65
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+CSEG ROM@EXEC@11007 00008b76
+CSEG RAM@EXEC@11007 00008b7b
+CSEG INTJMP@EXEC@11007 00008b81
+CSEG ROM@READ2@11038 00008b87
+CSEG IO@READ2@11038 00008b8a
+CSEG IOR21@READ2@11038 00008b8f
+CSEG RAM@READ2@11038 00008b90
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+CSEG ROM@EXEC@11064 00008b9b
+CSEG RAM@EXEC@11064 00008ba0
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+CSEG ROM@READ2@11097 00008bac
+CSEG IO@READ2@11097 00008baf
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+CSEG ROM@READZ@11126 00008bbd
+CSEG IO@READZ@11126 00008bbf
+CSEG IOR1@READZ@11126 00008bc3
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+CSEG ROM@EXEC@11160 00008bd0
+CSEG RAM@EXEC@11160 00008bd5
+CSEG INTJMP@EXEC@11160 00008bdb
+CSEG ROM@READ2@11193 00008be1
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+CSEG IOR21@READ2@11193 00008be9
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+CSEG RAM@WRITE@11257 00008c05
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+CSEG ROM@EXEC@11281 00008c18
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+CSEG INTJMP@EXEC@11281 00008c23
+CSEG ROM@READ2@11315 00008c2a
+CSEG IO@READ2@11315 00008c2d
+CSEG IOR21@READ2@11315 00008c32
+CSEG RAM@READ2@11315 00008c33
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+CSEG back@_BBR@11311 00008c40
+CSEG done@_BBR@11311 00008c43
+CSEG ROM@EXEC@11359 00008c49
+CSEG RAM@EXEC@11359 00008c4e
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+CSEG ROM@READZ@11394 00008c5c
+CSEG IO@READZ@11394 00008c5e
+CSEG IOR1@READZ@11394 00008c62
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+CSEG back@_REL@11391 00008c6c
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+CSEG ROM@EXEC@11430 00008c75
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+CSEG ROM@EXEC@11460 00008c89
+CSEG RAM@EXEC@11460 00008c8e
+CSEG INTJMP@EXEC@11460 00008c94
+CSEG ROM@READZ@11493 00008c9a
+CSEG IO@READZ@11493 00008c9c
+CSEG IOR1@READZ@11493 00008ca0
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+CSEG RAM1@READZ@11493 00008ca3
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+CSEG ROM@READZ@11531 00008caf
+CSEG IO@READZ@11531 00008cb1
+CSEG IOR1@READZ@11531 00008cb5
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+CSEG RAM1@READZ@11531 00008cb8
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+CSEG ROM@EXEC@11565 00008cc2
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+CSEG ROM@READZ@11598 00008cd3
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+CSEG ROM@READZ@11634 00008ce6
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+CSEG RAM1@READZ@11634 00008cef
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+CSEG ROM@EXEC@11668 00008cf9
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+CSEG ROM@READZ@11701 00008d0a
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+CSEG ROM@EXEC@11745 00008d21
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+CSEG ROM@READZ@11778 00008d32
+CSEG IO@READZ@11778 00008d34
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+CSEG ROM@EXEC@11826 00008d4a
+CSEG RAM@EXEC@11826 00008d4f
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+CSEG ROM@READZ@11861 00008d5b
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+CSEG ROM@EXEC@11930 00008d85
+CSEG RAM@EXEC@11930 00008d8a
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+CSEG ROM@READ2@11963 00008d96
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+CSEG ROM@READZ@11994 00008da9
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+CSEG RAM1@READZ@11994 00008db2
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+CSEG ROM@READ2@12093 00008de2
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+CSEG RAM@WRITE@12257 00008e3f
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+CSEG ROM@EXEC@12281 00008e52
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+CSEG ROM@READ2@12315 00008e64
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+CSEG back@_BBR@12311 00008e7a
+CSEG done@_BBR@12311 00008e7d
+CSEG ROM@EXEC@12359 00008e83
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+CSEG ROM@EXEC@12394 00008e9b
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+CSEG ROM@READZ@12427 00008eac
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+CSEG ROM@READZ@12464 00008ec0
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+CSEG BCDA0@_ADC@12462 00008ed3
+CSEG BCDA1@_ADC@12462 00008ed7
+CSEG _ADC1@_ADC@12462 00008edc
+CSEG ROM@EXEC@12519 00008ee5
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+CSEG ROM@READZ@12552 00008ef6
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+CSEG ROM@READZ@12620 00008f1b
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+CSEG BCDA0@_ADCZ@12646 00008f31
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+CSEG ROM@EXEC@12684 00008f43
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+CSEG ROM@READZ@12717 00008f54
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+CSEG ROM@EXEC@12764 00008f6b
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+CSEG ROM@EXEC@12836 00008f91
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+CSEG ROM@EXEC@12877 00008fa9
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+CSEG BCDA0@_ADC@12913 00008fce
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+CSEG ROM@EXEC@13010 00008ff6
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+CSEG ROM@READ2@13041 00009007
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+CSEG ROM@READ2@13066 00009017
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+CSEG ROM@EXEC@13092 0000902b
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+CSEG ROM@READZ@13154 0000904d
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+CSEG BCDA0@_ADC@13152 00009060
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+CSEG ROM@EXEC@13209 00009072
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+CSEG ROM@READ2@13242 00009083
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+CSEG ROM@READ@13271 00009094
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+CSEG ROM@READ2@13364 000090cc
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+CSEG ROM@EXEC@13408 000090eb
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+CSEG _BVS1        00009124
+CSEG ROM@READZ@13443 000090fe
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+CSEG back@_REL@13440 0000910e
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+CSEG ROM@EXEC@13479 00009117
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+CSEG ROM@EXEC@13509 0000912b
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+CSEG ROM@READZ@13542 0000913c
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+CSEG ROM@READZ@13580 00009151
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+CSEG BCDA0@_ADC@13702 000091ad
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+CSEG IO@READZ@17915 00009b34
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+CSEG RAM1@READZ@17915 00009b3b
+CSEG done@READZ@17915 00009b3c
+CSEG ROM@EXEC@17950 00009b46
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+CSEG INTJMP@EXEC@17950 00009b51
+CSEG ROM@READZ@17983 00009b57
+CSEG IO@READZ@17983 00009b59
+CSEG IOR1@READZ@17983 00009b5d
+CSEG RAM@READZ@17983 00009b5f
+CSEG RAM1@READZ@17983 00009b60
+CSEG done@READZ@17983 00009b61
+CSEG ROM@READZ@18019 00009b6a
+CSEG IO@READZ@18019 00009b6c
+CSEG IOR1@READZ@18019 00009b70
+CSEG RAM@READZ@18019 00009b72
+CSEG RAM1@READZ@18019 00009b73
+CSEG done@READZ@18019 00009b74
+CSEG ROM@EXEC@18054 00009b7e
+CSEG RAM@EXEC@18054 00009b83
+CSEG INTJMP@EXEC@18054 00009b89
+CSEG ROM@READZ@18087 00009b8f
+CSEG IO@READZ@18087 00009b91
+CSEG IOR1@READZ@18087 00009b95
+CSEG RAM@READZ@18087 00009b97
+CSEG RAM1@READZ@18087 00009b98
+CSEG done@READZ@18087 00009b99
+CSEG ROM@EXEC@18132 00009ba7
+CSEG RAM@EXEC@18132 00009bac
+CSEG INTJMP@EXEC@18132 00009bb2
+CSEG ROM@READZ@18165 00009bb8
+CSEG IO@READZ@18165 00009bba
+CSEG IOR1@READZ@18165 00009bbe
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+CSEG RAM1@READZ@18165 00009bc1
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+CSEG ROM@EXEC@18210 00009bd0
+CSEG RAM@EXEC@18210 00009bd5
+CSEG INTJMP@EXEC@18210 00009bdb
+CSEG ROM@READZ@18243 00009be1
+CSEG IO@READZ@18243 00009be3
+CSEG IOR1@READZ@18243 00009be7
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+CSEG RAM1@READZ@18243 00009bea
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+CSEG ROM@EXEC@18288 00009bf9
+CSEG RAM@EXEC@18288 00009bfe
+CSEG INTJMP@EXEC@18288 00009c04
+CSEG ROM@READZ@18323 00009c0a
+CSEG IO@READZ@18323 00009c0c
+CSEG IOR1@READZ@18323 00009c10
+CSEG RAM@READZ@18323 00009c12
+CSEG RAM1@READZ@18323 00009c13
+CSEG done@READZ@18323 00009c14
+CSEG ROM@EXEC@18360 00009c1f
+CSEG RAM@EXEC@18360 00009c24
+CSEG INTJMP@EXEC@18360 00009c2a
+CSEG ROM@EXEC@18391 00009c33
+CSEG RAM@EXEC@18391 00009c38
+CSEG INTJMP@EXEC@18391 00009c3e
+CSEG ROM@READ2@18424 00009c44
+CSEG IO@READ2@18424 00009c47
+CSEG IOR21@READ2@18424 00009c4c
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+CSEG ROM@READZ@18455 00009c57
+CSEG IO@READZ@18455 00009c59
+CSEG IOR1@READZ@18455 00009c5d
+CSEG RAM@READZ@18455 00009c5f
+CSEG RAM1@READZ@18455 00009c60
+CSEG done@READZ@18455 00009c61
+CSEG ROM@EXEC@18490 00009c6b
+CSEG RAM@EXEC@18490 00009c70
+CSEG INTJMP@EXEC@18490 00009c76
+CSEG ROM@EXEC@18530 00009c82
+CSEG RAM@EXEC@18530 00009c87
+CSEG INTJMP@EXEC@18530 00009c8d
+CSEG ROM@READ2@18563 00009c93
+CSEG IO@READ2@18563 00009c96
+CSEG IOR21@READ2@18563 00009c9b
+CSEG RAM@READ2@18563 00009c9c
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+CSEG ROM@READZ@18594 00009ca6
+CSEG IO@READZ@18594 00009ca8
+CSEG IOR1@READZ@18594 00009cac
+CSEG RAM@READZ@18594 00009cae
+CSEG RAM1@READZ@18594 00009caf
+CSEG done@READZ@18594 00009cb0
+CSEG ROM@EXEC@18629 00009cba
+CSEG RAM@EXEC@18629 00009cbf
+CSEG INTJMP@EXEC@18629 00009cc5
+CSEG ROM@READ2@18662 00009ccb
+CSEG IO@READ2@18662 00009cce
+CSEG IOR21@READ2@18662 00009cd3
+CSEG RAM@READ2@18662 00009cd4
+CSEG done@READ2@18662 00009cd7
+CSEG ROM@READZ@18693 00009cde
+CSEG IO@READZ@18693 00009ce0
+CSEG IOR1@READZ@18693 00009ce4
+CSEG RAM@READZ@18693 00009ce6
+CSEG RAM1@READZ@18693 00009ce7
+CSEG done@READZ@18693 00009ce8
+CSEG ROM@EXEC@18728 00009cf2
+CSEG RAM@EXEC@18728 00009cf7
+CSEG INTJMP@EXEC@18728 00009cfd
+CSEG ROM@READ2@18761 00009d03
+CSEG IO@READ2@18761 00009d06
+CSEG IOR21@READ2@18761 00009d0b
+CSEG RAM@READ2@18761 00009d0c
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+CSEG ROM@READZ@18792 00009d16
+CSEG IO@READZ@18792 00009d18
+CSEG IOR1@READZ@18792 00009d1c
+CSEG RAM@READZ@18792 00009d1e
+CSEG RAM1@READZ@18792 00009d1f
+CSEG done@READZ@18792 00009d20
+CSEG ROM@EXEC@18827 00009d2a
+CSEG RAM@EXEC@18827 00009d2f
+CSEG INTJMP@EXEC@18827 00009d35
+CSEG ROM@READ2@18861 00009d3c
+CSEG IO@READ2@18861 00009d3f
+CSEG IOR21@READ2@18861 00009d44
+CSEG RAM@READ2@18861 00009d45
+CSEG done@READ2@18861 00009d48
+CSEG back@_BBS@18857 00009d52
+CSEG done@_BBS@18857 00009d55
+CSEG ROM@EXEC@18904 00009d5b
+CSEG RAM@EXEC@18904 00009d60
+CSEG INTJMP@EXEC@18904 00009d66
+CSEG ROM@READZ@18942 00009d6d
+CSEG IO@READZ@18942 00009d6f
+CSEG IOR1@READZ@18942 00009d73
+CSEG RAM@READZ@18942 00009d75
+CSEG RAM1@READZ@18942 00009d76
+CSEG done@READZ@18942 00009d77
+CSEG ROM@EXEC@18977 00009d81
+CSEG RAM@EXEC@18977 00009d86
+CSEG INTJMP@EXEC@18977 00009d8c
+CSEG ROM@READZ@19010 00009d92
+CSEG IO@READZ@19010 00009d94
+CSEG IOR1@READZ@19010 00009d98
+CSEG RAM@READZ@19010 00009d9a
+CSEG RAM1@READZ@19010 00009d9b
+CSEG done@READZ@19010 00009d9c
+CSEG ROM@READZ@19047 00009da6
+CSEG IO@READZ@19047 00009da8
+CSEG IOR1@READZ@19047 00009dac
+CSEG RAM@READZ@19047 00009dae
+CSEG RAM1@READZ@19047 00009daf
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+CSEG ROM@EXEC@19082 00009dba
+CSEG RAM@EXEC@19082 00009dbf
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+CSEG ROM@READZ@19115 00009dcb
+CSEG IO@READZ@19115 00009dcd
+CSEG IOR1@READZ@19115 00009dd1
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+CSEG RAM1@READZ@19115 00009dd4
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+CSEG ROM@EXEC@19159 00009de2
+CSEG RAM@EXEC@19159 00009de7
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+CSEG ROM@READZ@19192 00009df3
+CSEG IO@READZ@19192 00009df5
+CSEG IOR1@READZ@19192 00009df9
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+CSEG RAM1@READZ@19192 00009dfc
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+CSEG RAM@EXEC@19236 00009e0f
+CSEG INTJMP@EXEC@19236 00009e15
+CSEG ROM@READZ@19269 00009e1b
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+CSEG IOR1@READZ@19269 00009e21
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+CSEG ROM@EXEC@19316 00009e32
+CSEG RAM@EXEC@19316 00009e37
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+CSEG ROM@READZ@19351 00009e43
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+CSEG RAM1@READZ@19351 00009e4c
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+CSEG ROM@EXEC@19388 00009e58
+CSEG RAM@EXEC@19388 00009e5d
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+CSEG ROM@EXEC@19427 00009e6e
+CSEG RAM@EXEC@19427 00009e73
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+CSEG ROM@READZ@19465 00009e80
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+CSEG ROM@EXEC@19500 00009e94
+CSEG RAM@EXEC@19500 00009e99
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+CSEG ROM@EXEC@19539 00009eaa
+CSEG RAM@EXEC@19539 00009eaf
+CSEG INTJMP@EXEC@19539 00009eb5
+CSEG ROM@EXEC@19570 00009ebe
+CSEG RAM@EXEC@19570 00009ec3
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+CSEG ROM@READ2@19603 00009ecf
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+CSEG IOR21@READ2@19603 00009ed7
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+CSEG ROM@READZ@19632 00009ee0
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+CSEG IOR1@READZ@19632 00009ee6
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+CSEG RAM1@READZ@19632 00009ee9
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+CSEG ROM@EXEC@19667 00009ef4
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+CSEG ROM@READ2@19700 00009f05
+CSEG IO@READ2@19700 00009f08
+CSEG IOR21@READ2@19700 00009f0d
+CSEG RAM@READ2@19700 00009f0e
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+CSEG ROM@READZ@19729 00009f16
+CSEG IO@READZ@19729 00009f18
+CSEG IOR1@READZ@19729 00009f1c
+CSEG RAM@READZ@19729 00009f1e
+CSEG RAM1@READZ@19729 00009f1f
+CSEG done@READZ@19729 00009f20
+CSEG ROM@EXEC@19764 00009f2a
+CSEG RAM@EXEC@19764 00009f2f
+CSEG INTJMP@EXEC@19764 00009f35
+CSEG ROM@READ2@19797 00009f3b
+CSEG IO@READ2@19797 00009f3e
+CSEG IOR21@READ2@19797 00009f43
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+CSEG ROM@READ@19826 00009f4c
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+CSEG IOR1@READ@19826 00009f54
+CSEG RAM@READ@19826 00009f56
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+CSEG RAM@WRITE@19861 00009f5f
+CSEG IO@WRITE@19861 00009f62
+CSEG IOW1@WRITE@19861 00009f6a
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+CSEG ROM@EXEC@19885 00009f72
+CSEG RAM@EXEC@19885 00009f77
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+CSEG ROM@READ2@19919 00009f84
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+CSEG IOR21@READ2@19919 00009f8c
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+CSEG back@_BBS@19915 00009f9a
+CSEG done@_BBS@19915 00009f9d
+CSEG ROM@EXEC@19962 00009fa3
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+CSEG _BNE1        00009fdc
+CSEG ROM@READZ@19997 00009fb6
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+CSEG back@_REL@19994 00009fc6
+CSEG done@_REL@19994 00009fc9
+CSEG ROM@EXEC@20033 00009fcf
+CSEG RAM@EXEC@20033 00009fd4
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+CSEG ROM@EXEC@20063 00009fe3
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+CSEG ROM@READZ@20096 00009ff4
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+CSEG ROM@READZ@20134 0000a009
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+CSEG ROM@EXEC@20169 0000a01d
+CSEG RAM@EXEC@20169 0000a022
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+CSEG ROM@READZ@20202 0000a02e
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+CSEG ROM@READZ@20238 0000a041
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+CSEG ROM@EXEC@20273 0000a055
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+CSEG ROM@READZ@20306 0000a066
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+CSEG ROM@EXEC@20351 0000a07e
+CSEG RAM@EXEC@20351 0000a083
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+CSEG IO@READZ@20384 0000a091
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+CSEG RAM@READZ@20384 0000a097
+CSEG RAM1@READZ@20384 0000a098
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+CSEG ROM@EXEC@20432 0000a0a7
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+CSEG ROM@READZ@20467 0000a0b8
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+CSEG RAM1@READZ@20467 0000a0c1
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+CSEG ROM@EXEC@20504 0000a0cd
+CSEG RAM@EXEC@20504 0000a0d2
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+CSEG ROM@EXEC@20535 0000a0e1
+CSEG RAM@EXEC@20535 0000a0e6
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+CSEG ROM@READ2@20568 0000a0f2
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+CSEG ROM@READZ@20599 0000a105
+CSEG IO@READZ@20599 0000a107
+CSEG IOR1@READZ@20599 0000a10b
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+CSEG RAM1@READZ@20599 0000a10e
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+CSEG ROM@EXEC@20634 0000a119
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+CSEG ROM@EXEC@20666 0000a12e
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+CSEG loop         0000a13b
+CSEG ROM@READ2@20703 0000a140
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+CSEG ROM@READZ@20734 0000a153
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+CSEG RAM1@READZ@20734 0000a15c
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+CSEG ROM@EXEC@20769 0000a167
+CSEG RAM@EXEC@20769 0000a16c
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+CSEG ROM@READ2@20802 0000a178
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+CSEG ROM@READ@20833 0000a18b
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+CSEG IOR1@READ@20833 0000a193
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+CSEG RAM@WRITE@20868 0000a19e
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+CSEG IOW1@WRITE@20868 0000a1a9
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+CSEG ROM@EXEC@20892 0000a1b1
+CSEG RAM@EXEC@20892 0000a1b6
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+CSEG ROM@READ2@20926 0000a1c3
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+CSEG back@_BBS@20922 0000a1d9
+CSEG done@_BBS@20922 0000a1dc
+CSEG ROM@EXEC@20969 0000a1e2
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+CSEG ROM@READZ@21007 0000a1f4
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+CSEG ROM@EXEC@21042 0000a208
+CSEG RAM@EXEC@21042 0000a20d
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+CSEG ROM@READZ@21075 0000a219
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+CSEG RAM1@READZ@21075 0000a222
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+CSEG ROM@READZ@21112 0000a22d
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+CSEG IOR1@READZ@21112 0000a233
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+CSEG RAM1@READZ@21112 0000a236
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+CSEG sub_0@_SBC@21110 0000a23e
+CSEG sub_1@_SBC@21110 0000a240
+CSEG sub_2@_SBC@21110 0000a245
+CSEG _SBC1@_SBC@21110 0000a247
+CSEG ROM@EXEC@21167 0000a251
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+CSEG ROM@READZ@21200 0000a262
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+CSEG RAM1@READZ@21200 0000a26b
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+CSEG ROM@EXEC@21244 0000a279
+CSEG RAM@EXEC@21244 0000a27e
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+CSEG ROM@READZ@21277 0000a28a
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+CSEG IOR1@READZ@21277 0000a290
+CSEG RAM@READZ@21277 0000a292
+CSEG RAM1@READZ@21277 0000a293
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+CSEG sub_0@_SBCZ@21303 0000a29e
+CSEG sub_1@_SBCZ@21303 0000a2a0
+CSEG sub_2@_SBCZ@21303 0000a2a5
+CSEG _SBC1@_SBCZ@21303 0000a2a7
+CSEG ROM@EXEC@21341 0000a2b1
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+CSEG ROM@READZ@21374 0000a2c2
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+CSEG IOR1@READZ@21374 0000a2c8
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+CSEG ROM@EXEC@21421 0000a2d9
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+CSEG ROM@READZ@21456 0000a2ea
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+CSEG IOR1@READZ@21456 0000a2f0
+CSEG RAM@READZ@21456 0000a2f2
+CSEG RAM1@READZ@21456 0000a2f3
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+CSEG ROM@EXEC@21493 0000a2ff
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+CSEG ROM@EXEC@21532 0000a315
+CSEG RAM@EXEC@21532 0000a31a
+CSEG INTJMP@EXEC@21532 0000a320
+CSEG ROM@READZ@21570 0000a327
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+CSEG RAM@READZ@21570 0000a32f
+CSEG RAM1@READZ@21570 0000a330
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+CSEG sub_0@_SBC@21568 0000a338
+CSEG sub_1@_SBC@21568 0000a33a
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+CSEG _SBC1@_SBC@21568 0000a341
+CSEG ROM@EXEC@21625 0000a34b
+CSEG RAM@EXEC@21625 0000a350
+CSEG INTJMP@EXEC@21625 0000a356
+CSEG ROM@EXEC@21655 0000a35e
+CSEG RAM@EXEC@21655 0000a363
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+CSEG ROM@READ2@21688 0000a36f
+CSEG IO@READ2@21688 0000a372
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+CSEG RAM@READ2@21688 0000a378
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+CSEG ROM@READZ@21717 0000a380
+CSEG IO@READZ@21717 0000a382
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+CSEG RAM@READZ@21717 0000a388
+CSEG RAM1@READZ@21717 0000a389
+CSEG done@READZ@21717 0000a38a
+CSEG ROM@EXEC@21752 0000a394
+CSEG RAM@EXEC@21752 0000a399
+CSEG INTJMP@EXEC@21752 0000a39f
+CSEG ROM@READ2@21785 0000a3a5
+CSEG IO@READ2@21785 0000a3a8
+CSEG IOR21@READ2@21785 0000a3ad
+CSEG RAM@READ2@21785 0000a3ae
+CSEG done@READ2@21785 0000a3b1
+CSEG ROM@READZ@21814 0000a3b6
+CSEG IO@READZ@21814 0000a3b8
+CSEG IOR1@READZ@21814 0000a3bc
+CSEG RAM@READZ@21814 0000a3be
+CSEG RAM1@READZ@21814 0000a3bf
+CSEG done@READZ@21814 0000a3c0
+CSEG sub_0@_SBC@21812 0000a3c7
+CSEG sub_1@_SBC@21812 0000a3c9
+CSEG sub_2@_SBC@21812 0000a3ce
+CSEG _SBC1@_SBC@21812 0000a3d0
+CSEG ROM@EXEC@21869 0000a3da
+CSEG RAM@EXEC@21869 0000a3df
+CSEG INTJMP@EXEC@21869 0000a3e5
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+CSEG ROM@READ@21931 0000a3fc
+CSEG IO@READ@21931 0000a3fe
+CSEG IOR1@READ@21931 0000a404
+CSEG RAM@READ@21931 0000a406
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+CSEG RAM@WRITE@21966 0000a40f
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+CSEG ROM@EXEC@21990 0000a422
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+CSEG INTJMP@EXEC@21990 0000a42d
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+CSEG IOR21@READ2@22024 0000a43c
+CSEG RAM@READ2@22024 0000a43d
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+CSEG back@_BBS@22020 0000a44a
+CSEG done@_BBS@22020 0000a44d
+CSEG ROM@EXEC@22067 0000a453
+CSEG RAM@EXEC@22067 0000a458
+CSEG INTJMP@EXEC@22067 0000a45e
+CSEG _BEQ1        0000a48c
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+CSEG RAM@READZ@22102 0000a46e
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+CSEG IOR1@READZ@22239 0000a4bf
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+CSEG RAM1@READZ@22239 0000a4c2
+CSEG done@READZ@22239 0000a4c3
+CSEG sub_0@_SBC@22237 0000a4ca
+CSEG sub_1@_SBC@22237 0000a4cc
+CSEG sub_2@_SBC@22237 0000a4d1
+CSEG _SBC1@_SBC@22237 0000a4d3
+CSEG ROM@EXEC@22294 0000a4dd
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+CSEG IOR1@READZ@22327 0000a4f4
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+CSEG sub_0@_SBC@22361 0000a512
+CSEG sub_1@_SBC@22361 0000a514
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+CSEG _SBC1@_SBC@22361 0000a51b
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+CSEG ROM@READZ@22632 0000a598
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+CSEG ROM@EXEC@22700 0000a5c1
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+CSEG ROM@READ2@22733 0000a5d2
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+CSEG sub_2@_SBC@22762 0000a5fd
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+CSEG Boot3        0000f08b
+CSEG Boot4        0000f09f
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+DEF  zsav         r8
+DEF  zsavh        r9
+CSEG Xmodem1      0000f0f2
+CSEG xmodem       0000f0ef
+DEF  crc          r22
+DEF  crch         r23
+DEF  blkno        r24
+DEF  retry        r6
+DEF  retry2       r25
+DEF  bflag        r7
+DEF  rzsav        r10
+EQU  Rbuff        00000200
+EQU  SOH          00000001
+EQU  EOT          00000004
+EQU  ACK          00000006
+EQU  NAK          00000015
+EQU  CAN          00000018
+EQU  CR           0000000d
+EQU  LF           0000000a
+EQU  ESC          0000001b
+CSEG PrintMsg     0000f189
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+CSEG BegBlk       0000f110
+CSEG BadCrc       0000f133
+CSEG GetBlk       0000f111
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+CSEG GoodBlk1     0000f11f
+CSEG Print_Err    0000f1af
+CSEG Flush        0000f185
+CSEG GoodBlk2     0000f128
+CSEG write_err    0000f124
+CSEG CalcCrc      0000f129
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+CSEG GoodCrc      0000f137
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+CSEG write11      0000f148
+CSEG fploop       0000f14a
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+CSEG write2       0000f15b
+CSEG write3       0000f162
+CSEG Print_Good   0000f1c3
+CSEG StartCrcLp   0000f179
+CSEG Get_chr      0000f1d9
+CSEG GetByte1     0000f184
+CSEG getb2234     0000f17c
+CSEG Flush1       0000f186
+CSEG Msg          0000f194
+CSEG PrtMsg1      0000f18d
+CSEG PrtMsg2      0000f192
+CSEG ErrMsg       0000f1ba
+CSEG PrtErr1      0000f1b3
+CSEG PrtErr2      0000f1b8
+CSEG GoodMsg      0000f1ce
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+CSEG Get_Chr2     0000f1e1
+CSEG CRCHI        0000f276
+CSEG crclo        0000f1f6
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502.obj b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502.obj
new file mode 100644
index 00000000..71b83418
Binary files /dev/null and b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502.obj differ
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502_16_19k.hex b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502_16_19k.hex
new file mode 100644
index 00000000..6728126b
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502_16_19k.hex
@@ -0,0 +1,4538 @@
+:020000020000FC
+:1036000000010203808182830001020380818283A2
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diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502_20_115k.hex b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502_20_115k.hex
new file mode 100644
index 00000000..797aebc2
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502_20_115k.hex
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diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502_20_19k.hex b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502_20_19k.hex
new file mode 100644
index 00000000..3546a9b0
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502_20_19k.hex
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diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502_24_115k.bin b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502_24_115k.bin
new file mode 100644
index 00000000..890bf30a
Binary files /dev/null and b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502_24_115k.bin differ
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502_24_115k.hex b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502_24_115k.hex
new file mode 100644
index 00000000..468b7f1c
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AVR6502_24_115k.hex
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index 00000000..349c9a95
--- /dev/null
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+:10E3A0006164205375636365737366756C210D0A30
+:10E3B000000088940091C00007FF03C00091C600D0
+:10E3C000089408951091C00015FFFCCF0093C6007B
+:10E3D00008950727ABB63BBEECEEF4EEE00FF21D5E
+:10E3E00076917627FA956691ABBE08950021426337
+:10E3F00084A5C6E708294A6B8CADCEEF3110735265
+:10E40000B594F7D639187B5ABD9CFFDE62432001D4
+:10E41000E6C7A4856A4B2809EECFAC8D5372113044
+:10E42000D7F695B45B7A1938DFFE9DBCC4E586A7A4
+:10E4300040610223CCED8EAF48690A2BF5D4B79624
+:10E4400071503312FDDCBF9E79583B1AA687E4C594
+:10E4500022036041AE8FECCD2A0B684997B6D5F404
+:10E46000133251709FBEDDFC1B3A597888A9CAEB64
+:10E470000C2D4E6F80A1C2E304254667B998FBDAE4
+:10E480003D1C7F5EB190F3D235147756EACBA88954
+:10E490006E4F2C0DE2C3A08166472405DBFA99B8C4
+:10E4A0005F7E1D3CD3F291B0577615344C6D0E2F24
+:10E4B000C8E98AAB44650627C0E182A37D5C3F1EA4
+:10E4C000F9D8BB9A75543716F1D0B3922E0F6C4D14
+:10E4D000AA8BE8C926076445A283E0C11F3E5D7C84
+:10E4E0009BBAD9F81736557493B2D1F0001020308A
+:10E4F000405060708191A1B1C1D1E1F1120232228C
+:10E50000524272629383B3A3D3C3F3E3243404145B
+:10E5100064744454A5B58595E5F5C5D5362616062B
+:10E5200076665646B7A79787F7E7D7C748586878FB
+:10E5300008182838C9D9E9F98999A9B95A4A7A6ACB
+:10E540001A0A3A2ADBCBFBEB9B8BBBAB6C7C4C5C9B
+:10E550002C3C0C1CEDFDCDDDADBD8D9D7E6E5E4E6B
+:10E560003E2E1E0EFFEFDFCFBFAF9F8F9181B1A177
+:10E57000D1C1F1E110003020504070608393A3B30B
+:10E58000C3D3E3F30212223242526272B5A59585DB
+:10E59000F5E5D5C53424140474645444A7B78797AB
+:10E5A000E7F7C7D72636061666764656D9C9F9E97B
+:10E5B0009989B9A95848786818083828CBDBEBFB4B
+:10E5C0008B9BABBB4A5A6A7A0A1A2A3AFDEDDDCD1B
+:10E5D000BDAD9D8D7C6C5C4C3C2C1C0CEFFFCFDFEB
+:0CE5E000AFBF8F9F6E7E4E5E2E3E0E1E63
+:00000001FF
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AvrBuild.bat b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AvrBuild.bat
new file mode 100644
index 00000000..2e65e1d9
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AvrBuild.bat
@@ -0,0 +1,2 @@
+@ECHO OFF
+"E:\Progs\arduino-1.7.4\hardware\tools\avr\bin\avrasm2.exe" -S "E:\0_AVRProjects\AVR_6502\Daryl_1284p\AVRSource\labels.tmp" -fI -W+ie -C V2E -o "E:\0_AVRProjects\AVR_6502\Daryl_1284p\AVRSource\AVR6502_24_115k.hex" -d "E:\0_AVRProjects\AVR_6502\Daryl_1284p\AVRSource\AVR6502.obj" -e "E:\0_AVRProjects\AVR_6502\Daryl_1284p\AVRSource\AVR6502.eep" -m "E:\0_AVRProjects\AVR_6502\Daryl_1284p\AVRSource\AVR6502.map" -l "E:\0_AVRProjects\AVR_6502\Daryl_1284p\AVRSource\AVR6502.lst" "E:\0_AVRProjects\AVR_6502\Daryl_1284p\AVRSource\avr6502.asm"
\ No newline at end of file
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AvrBuild.bat.old b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AvrBuild.bat.old
new file mode 100644
index 00000000..af917524
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/AvrBuild.bat.old
@@ -0,0 +1,2 @@
+@ECHO OFF
+"C:\Program Files\Atmel\AVR Tools\AvrAssembler2\avrasm2.exe" -S "C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\labels.tmp" -fI -W+ie -C V2E -o "C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\AVR6502.hex" -d "C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\AVR6502.obj" -e "C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\AVR6502.eep" -m "C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\AVR6502.map" -l "C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\AVR6502.lst" "C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\avr6502.asm"
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/IOEXE.INC b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/IOEXE.INC
new file mode 100644
index 00000000..ee5bb25a
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/IOEXE.INC
@@ -0,0 +1,135 @@
+; SR to AVSR conversion table
+
+.cseg
+.org 0x1F80
+
+ioexe:
+
+	.db	0xEA, 0xEA	; 00 & 01
+	.db	0xEA, 0xEA	; 02 & 03
+	.db	0xEA, 0xEA	; 04 & 05
+	.db	0xEA, 0xEA	; 06 & 07
+	.db	0xEA, 0xEA	; 08 & 09
+	.db	0xEA, 0xEA	; 0A & 0B
+	.db	0xEA, 0xEA	; 0C & 0D
+	.db	0xEA, 0xEA	; 0E & 0F
+	.db	0xEA, 0xEA	; 10 & 11
+	.db	0xEA, 0xEA	; 12 & 13
+	.db	0xEA, 0xEA	; 14 & 15
+	.db	0xEA, 0xEA	; 16 & 17
+	.db	0xEA, 0xEA	; 18 & 19
+	.db	0xEA, 0xEA	; 1A & 1B
+	.db	0xEA, 0xEA	; 1C & 1D
+	.db	0xEA, 0xEA	; 1E & 1F
+	.db	0xEA, 0xEA	; 20 & 21
+	.db	0xEA, 0xEA	; 22 & 23
+	.db	0xEA, 0xEA	; 24 & 25
+	.db	0xEA, 0xEA	; 26 & 27
+	.db	0xEA, 0xEA	; 28 & 29
+	.db	0xEA, 0xEA	; 2A & 2B
+	.db	0xEA, 0xEA	; 2C & 2D
+	.db	0xEA, 0xEA	; 2E & 2F
+	.db	0xEA, 0xEA	; 30 & 31
+	.db	0xEA, 0xEA	; 32 & 33
+	.db	0xEA, 0xEA	; 34 & 35
+	.db	0xEA, 0xEA	; 36 & 37
+	.db	0xEA, 0xEA	; 38 & 39
+	.db	0xEA, 0xEA	; 3A & 3B
+	.db	0xEA, 0xEA	; 3C & 3D
+	.db	0xEA, 0xEA	; 3E & 3F
+	.db	0xEA, 0xEA	; 40 & 41
+	.db	0xEA, 0xEA	; 42 & 43
+	.db	0xEA, 0xEA	; 44 & 45
+	.db	0xEA, 0xEA	; 46 & 47
+	.db	0xEA, 0xEA	; 48 & 49
+	.db	0xEA, 0xEA	; 4A & 4B
+	.db	0xEA, 0xEA	; 4C & 4D
+	.db	0xEA, 0xEA	; 4E & 4F
+	.db	0xEA, 0xEA	; 50 & 51
+	.db	0xEA, 0xEA	; 52 & 53
+	.db	0xEA, 0xEA	; 54 & 55
+	.db	0xEA, 0xEA	; 56 & 57
+	.db	0xEA, 0xEA	; 58 & 59
+	.db	0xEA, 0xEA	; 5A & 5B
+	.db	0xEA, 0xEA	; 5C & 5D
+	.db	0xEA, 0xEA	; 5E & 5F
+	.db	0xEA, 0xEA	; 60 & 61
+	.db	0xEA, 0xEA	; 62 & 63
+	.db	0xEA, 0xEA	; 64 & 65
+	.db	0xEA, 0xEA	; 66 & 67
+	.db	0xEA, 0xEA	; 68 & 69
+	.db	0xEA, 0xEA	; 6A & 6B
+	.db	0xEA, 0xEA	; 6C & 6D
+	.db	0xEA, 0xEA	; 6E & 6F
+	.db	0xEA, 0xEA	; 70 & 71
+	.db	0xEA, 0xEA	; 72 & 73
+	.db	0xEA, 0xEA	; 74 & 75
+	.db	0xEA, 0xEA	; 76 & 77
+	.db	0xEA, 0xEA	; 78 & 79
+	.db	0xEA, 0xEA	; 7A & 7B
+	.db	0xEA, 0xEA	; 7C & 7D
+	.db	0xEA, 0xEA	; 7E & 7F
+	.db	0xEA, 0xEA	; 80 & 81
+	.db	0xEA, 0xEA	; 82 & 83
+	.db	0xEA, 0xEA	; 84 & 85
+	.db	0xEA, 0xEA	; 86 & 87
+	.db	0xEA, 0xEA	; 88 & 89
+	.db	0xEA, 0xEA	; 8A & 8B
+	.db	0xEA, 0xEA	; 8C & 8D
+	.db	0xEA, 0xEA	; 8E & 8F
+	.db	0xEA, 0xEA	; 90 & 91
+	.db	0xEA, 0xEA	; 92 & 93
+	.db	0xEA, 0xEA	; 94 & 95
+	.db	0xEA, 0xEA	; 96 & 97
+	.db	0xEA, 0xEA	; 98 & 99
+	.db	0xEA, 0xEA	; 9A & 9B
+	.db	0xEA, 0xEA	; 9C & 9D
+	.db	0xEA, 0xEA	; 9E & 9F
+	.db	0xEA, 0xEA	; A0 & A1
+	.db	0xEA, 0xEA	; A2 & A3
+	.db	0xEA, 0xEA	; A4 & A5
+	.db	0xEA, 0xEA	; A6 & A7
+	.db	0xEA, 0xEA	; A8 & A9
+	.db	0xEA, 0xEA	; AA & AB
+	.db	0xEA, 0xEA	; AC & AD
+	.db	0xEA, 0xEA	; AE & AF
+	.db	0xEA, 0xEA	; B0 & B1
+	.db	0xEA, 0xEA	; B2 & B3
+	.db	0xEA, 0xEA	; B4 & B5
+	.db	0xEA, 0xEA	; B6 & B7
+	.db	0xEA, 0xEA	; B8 & B9
+	.db	0xEA, 0xEA	; BA & BB
+	.db	0xEA, 0xEA	; BC & BD
+	.db	0xEA, 0xEA	; BE & BF
+	.db	0xEA, 0xEA	; C0 & C1
+	.db	0xEA, 0xEA	; C2 & C3
+	.db	0xEA, 0xEA	; C4 & C5
+	.db	0xEA, 0xEA	; C6 & C7
+	.db	0xEA, 0xEA	; C8 & C9
+	.db	0xEA, 0xEA	; CA & CB
+	.db	0xEA, 0xEA	; CC & CD
+	.db	0xEA, 0xEA	; CE & CF
+	.db	0xEA, 0xEA	; D0 & D1
+	.db	0xEA, 0xEA	; D2 & D3
+	.db	0xEA, 0xEA	; D4 & D5
+	.db	0xEA, 0xEA	; D6 & D7
+	.db	0xEA, 0xEA	; D8 & D9
+	.db	0xEA, 0xEA	; DA & DB
+	.db	0xEA, 0xEA	; DC & DD
+	.db	0xEA, 0xEA	; DE & DF
+	.db	0xEA, 0xEA	; E0 & E1
+	.db	0xEA, 0xEA	; E2 & E3
+	.db	0xEA, 0xEA	; E4 & E5
+	.db	0xEA, 0xEA	; E6 & E7
+	.db	0xEA, 0xEA	; E8 & E9
+	.db	0xEA, 0xEA	; EA & EB
+	.db	0xEA, 0xEA	; EC & ED
+	.db	0xEA, 0xEA	; EE & EF
+	.db	0xEA, 0xEA	; F0 & F1
+	.db	0xEA, 0xEA	; F2 & F3
+	.db	0xEA, 0xEA	; F4 & F5
+	.db	0xEA, 0xEA	; F6 & F7
+	.db	0xEA, 0xEA	; F8 & F9
+	.db	0xEA, 0xEA	; FA & FB
+	.db	0xEA, 0xEA	; FC & FD
+	.db	0xEA, 0xEA	; FE & FF
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/SBCROM.INC b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/SBCROM.INC
new file mode 100644
index 00000000..ec93b06d
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/SBCROM.INC
@@ -0,0 +1,3075 @@
+.CSEG
+IMAGE:
+
+        .db 0x53, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0xA9, 0x00, 0x85, 0xB7, 0x85, 0xFD, 0xD8, 0xA2, 0xFF, 0x9A, 0xA2, 0xC8, 0x86, 0xB2, 0x20, 0xC1
+        .db 0xA1, 0x20, 0xAD, 0xA2, 0xC9, 0x43, 0xD0, 0x12, 0xA2, 0x1F, 0xBD, 0x26, 0xA4, 0x95, 0x50, 0xCA
+        .db 0x10, 0xF8, 0xA2, 0x1B, 0x86, 0xDC, 0xA9, 0xCC, 0xD0, 0x19, 0xC9, 0x45, 0xD0, 0x0E, 0x20, 0xCB
+        .db 0x9F, 0x38, 0xA9, 0x01, 0xE5, 0xB7, 0x85, 0xB7, 0xA9, 0xEE, 0xD0, 0x07, 0xC9, 0x40, 0xD0, 0x0B
+        .db 0x20, 0xBF, 0xA0, 0x85, 0xFB, 0x85, 0xFA, 0x85, 0xF9, 0xD0, 0xBB, 0xC9, 0x0D, 0xD0, 0x09, 0x20
+        .db 0x65, 0xA0, 0x20, 0x85, 0xA1, 0x4C, 0x07, 0x9F, 0xC9, 0x41, 0xF0, 0x0E, 0xC9, 0x42, 0xD0, 0x07
+        .db 0x20, 0xA3, 0xA1, 0xA9, 0xBB, 0xD0, 0xDC, 0x4C, 0x00, 0x9F, 0x6C, 0xF7, 0x03, 0xA6, 0xB5, 0x30
+        .db 0x59, 0xA5, 0xB0, 0xF0, 0x08, 0xE0, 0x08, 0xD0, 0x04, 0xC5, 0xE6, 0xF0, 0x2E, 0xF6, 0xE3, 0xC9
+        .db 0x01, 0xD0, 0x02, 0xF6, 0xE3, 0x50, 0x1E, 0xA0, 0x0F, 0xA5, 0xB1, 0xD9, 0x60, 0x00, 0xF0, 0x03
+        .db 0x88, 0x10, 0xF8, 0xB9, 0x57, 0xA4, 0xD5, 0xE4, 0x90, 0x04, 0x94, 0xE6, 0x95, 0xE4, 0x18, 0x08
+        .db 0x75, 0xE5, 0x95, 0xE5, 0x28, 0xE0, 0x04, 0xF0, 0x03, 0x30, 0x2E, 0x60, 0xA5, 0xE8, 0x85, 0xDD
+        .db 0xA9, 0x00, 0x85, 0xB5, 0x20, 0x65, 0xA0, 0x20, 0xCB, 0x9F, 0x20, 0x19, 0x9F, 0x20, 0xCB, 0x9F
+        .db 0xA9, 0x08, 0x85, 0xB5, 0x20, 0x4B, 0xA0, 0x4C, 0x1F, 0xA1, 0xE0, 0xF9, 0xD0, 0x0B, 0xA5, 0x60
+        .db 0xC5, 0xB1, 0xD0, 0x04, 0xA9, 0x00, 0x85, 0xB4, 0x60, 0x50, 0xFD, 0xA0, 0x07, 0xA5, 0xB1, 0xD9
+        .db 0x60, 0x00, 0xF0, 0x05, 0x88, 0xF0, 0xF1, 0x10, 0xF6, 0xB9, 0x57, 0xA4, 0xD5, 0xE2, 0x90, 0x02
+        .db 0x95, 0xE2, 0xC6, 0xB5, 0xA9, 0xFB, 0xC5, 0xB5, 0xF0, 0x03, 0x20, 0x3F, 0xA0, 0xE6, 0xB5, 0x60
+        .db 0xC9, 0x08, 0xB0, 0x12, 0x20, 0x0F, 0xA1, 0xA2, 0x1F, 0xB5, 0x50, 0xC5, 0xFA, 0xF0, 0x03, 0xCA
+        .db 0x10, 0xF7, 0x86, 0xFB, 0x86, 0xB0, 0x4C, 0x06, 0x9E, 0xA2, 0x10, 0xA9, 0x00, 0x95, 0xDE, 0xCA
+        .db 0x10, 0xFB, 0xA9, 0x10, 0x85, 0xB0, 0xC6, 0xB0, 0x10, 0x01, 0x60, 0x20, 0x38, 0xA0, 0xA4, 0xB0
+        .db 0xA2, 0x08, 0x86, 0xB6, 0xC0, 0x08, 0x10, 0x41, 0xC0, 0x06, 0x10, 0x2E, 0xC0, 0x04, 0x10, 0x1F
+        .db 0xC0, 0x01, 0xF0, 0x09, 0x10, 0x0E, 0x20, 0xA7, 0x9F, 0xD0, 0xFB, 0xF0, 0xD9, 0x20, 0xB5, 0x9F
+        .db 0xD0, 0xFB, 0xF0, 0xD2, 0xA2, 0x04, 0x86, 0xB6, 0x20, 0xB5, 0x9F, 0xD0, 0xFB, 0xF0, 0xC7, 0x20
+        .db 0xB5, 0x9F, 0xA5, 0xB6, 0xC9, 0x04, 0xD0, 0xF7, 0xF0, 0xBC, 0xA2, 0x10, 0x86, 0xB6, 0x20, 0xA7
+        .db 0x9F, 0xA5, 0xB6, 0xC9, 0x08, 0xD0, 0xF7, 0xF0, 0xAD, 0xA2, 0x06, 0x86, 0xB6, 0x20, 0xE3, 0x9F
+        .db 0x50, 0x05, 0x30, 0x03, 0x20, 0x6D, 0x9E, 0x20, 0x38, 0xA0, 0xC6, 0xB6, 0xA5, 0xB6, 0xC9, 0x05
+        .db 0xF0, 0xEB, 0x20, 0xE3, 0x9F, 0x70, 0x8F, 0x30, 0x8D, 0x20, 0x6D, 0x9E, 0xA5, 0xB1, 0x29, 0xF0
+        .db 0xC9, 0x20, 0xF0, 0xEE, 0x4C, 0x26, 0x9F, 0x20, 0xE3, 0x9F, 0x30, 0x03, 0x20, 0x6D, 0x9E, 0x20
+        .db 0x38, 0xA0, 0xC6, 0xB6, 0x60, 0x20, 0xE3, 0x9F, 0x90, 0x02, 0x50, 0xF9, 0x30, 0x07, 0x08, 0x20
+        .db 0x6D, 0x9E, 0x28, 0x50, 0xF0, 0x20, 0x38, 0xA0, 0xC6, 0xB6, 0x60, 0xA2, 0x0F, 0x38, 0xB4, 0x60
+        .db 0xA9, 0x77, 0xF5, 0x50, 0x95, 0x60, 0x94, 0x50, 0x38, 0xA9, 0x77, 0xF5, 0x50, 0x95, 0x50, 0xCA
+        .db 0x10, 0xEB, 0x60, 0xA5, 0xB1, 0xA6, 0xB6, 0x18, 0x7D, 0x46, 0xA4, 0x85, 0xB1, 0x29, 0x88, 0xD0
+        .db 0x42, 0xA5, 0xB1, 0xA2, 0x20, 0xCA, 0x30, 0x0E, 0xD5, 0x50, 0xD0, 0xF9, 0xE0, 0x10, 0x30, 0x33
+        .db 0xA9, 0x7F, 0x69, 0x01, 0x70, 0x01, 0xB8, 0xA5, 0xB5, 0x30, 0x24, 0xC9, 0x08, 0x10, 0x20, 0x48
+        .db 0x08, 0xA9, 0xF9, 0x85, 0xB5, 0x85, 0xB4, 0x20, 0x65, 0xA0, 0x20, 0xCB, 0x9F, 0x20, 0x22, 0x9F
+        .db 0x20, 0x48, 0xA0, 0x28, 0x68, 0x85, 0xB5, 0xA5, 0xB4, 0x30, 0x04, 0x38, 0xA9, 0xFF, 0x60, 0x18
+        .db 0xA9, 0x00, 0x60, 0xA9, 0xFF, 0x18, 0xB8, 0x60, 0xA6, 0xB0, 0xB5, 0x50, 0x85, 0xB1, 0x60, 0x20
+        .db 0x65, 0xA0, 0x20, 0xCB, 0x9F, 0x20, 0x22, 0x9F, 0x20, 0xCB, 0x9F, 0xBA, 0x86, 0xB3, 0xA6, 0xB2
+        .db 0x9A, 0x68, 0x85, 0xB6, 0x68, 0x85, 0xB0, 0xAA, 0x68, 0x95, 0x50, 0x68, 0xAA, 0x68, 0x85, 0xB1
+        .db 0x95, 0x50, 0x4C, 0x8A, 0xA0, 0xBA, 0x86, 0xB3, 0xA6, 0xB2, 0x9A, 0xA5, 0xB1, 0x48, 0xA8, 0xA2
+        .db 0x1F, 0xD5, 0x50, 0xF0, 0x03, 0xCA, 0x10, 0xF9, 0xA9, 0xCC, 0x95, 0x50, 0x8A, 0x48, 0xA6, 0xB0
+        .db 0xB5, 0x50, 0x94, 0x50, 0x48, 0x8A, 0x48, 0xA5, 0xB6, 0x48, 0xBA, 0x86, 0xB2, 0xA6, 0xB3, 0x9A
+        .db 0x60, 0xA4, 0xE4, 0xEC, 0x57, 0xA4, 0xD0, 0x04, 0xA9, 0x00, 0xF0, 0x0A, 0xA6, 0xE3, 0xD0, 0x06
+        .db 0xA6, 0xEE, 0xD0, 0x02, 0xA9, 0xFF, 0xA2, 0x04, 0x86, 0xB5, 0xC5, 0xFA, 0x90, 0x0C, 0xF0, 0x0A
+        .db 0x85, 0xFA, 0xA5, 0xB0, 0x85, 0xFB, 0xA5, 0xB1, 0x85, 0xF9, 0xA9, 0x2E, 0x4C, 0xF4, 0xA4, 0xA6
+        .db 0xDC, 0x30, 0x1C, 0xA5, 0xF9, 0xDD, 0x67, 0xA4, 0xD0, 0x11, 0xCA, 0xBD, 0x67, 0xA4, 0x85, 0xFB
+        .db 0xCA, 0xBD, 0x67, 0xA4, 0x85, 0xF9, 0xCA, 0x86, 0xDC, 0xD0, 0x1C, 0xA9, 0xFF, 0x85, 0xDC, 0xA2
+        .db 0x0C, 0x86, 0xB5, 0x86, 0xFA, 0xA2, 0x14, 0x20, 0x1B, 0x9F, 0xA2, 0x04, 0x86, 0xB5, 0x20, 0x19
+        .db 0x9F, 0xA6, 0xFA, 0xE0, 0x0F, 0x90, 0x15, 0xA6, 0xFB, 0xB5, 0x50, 0x85, 0xFA, 0x86, 0xB0, 0xA5
+        .db 0xF9, 0x85, 0xB1, 0x20, 0x65, 0xA0, 0x20, 0x85, 0xA1, 0x4C, 0x06, 0x9E, 0xA9, 0xFF, 0x60, 0xA2
+        .db 0x04, 0x06, 0xF9, 0x26, 0xFA, 0xCA, 0xD0, 0xF9, 0x05, 0xF9, 0x85, 0xF9, 0x85, 0xB1, 0x60, 0x18
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+        .db 0xF1, 0xE5, 0xE2, 0xE5, 0xE0, 0xE5, 0xDE, 0xE5, 0xEF, 0xE5, 0xE3, 0xB0, 0x02, 0xA9, 0x00, 0x4A
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+        .db 0xE5, 0xE5, 0xE0, 0xA6, 0xB1, 0xE0, 0x33, 0xF0, 0x16, 0xE0, 0x34, 0xF0, 0x12, 0xE0, 0x22, 0xF0
+        .db 0x0E, 0xE0, 0x25, 0xF0, 0x0A, 0xA6, 0xB0, 0xF0, 0x09, 0xB4, 0x50, 0xC0, 0x10, 0x10, 0x03, 0x18
+        .db 0x69, 0x02, 0x4C, 0x91, 0xA0, 0xA6, 0xFD, 0xE8, 0xAD, 0xC8, 0x01, 0x9D, 0x00, 0x16, 0xAD, 0xC7
+        .db 0x01, 0x9D, 0x00, 0x17, 0xAD, 0xC6, 0x01, 0x9D, 0x00, 0x18, 0xAD, 0xC5, 0x01, 0x9D, 0x00, 0x19
+        .db 0x86, 0xFD, 0x60, 0xA4, 0xFD, 0xF0, 0x19, 0xB9, 0x00, 0x19, 0x85, 0xB0, 0xAA, 0xB9, 0x00, 0x18
+        .db 0x95, 0x50, 0xB9, 0x00, 0x17, 0xAA, 0xB9, 0x00, 0x16, 0x85, 0xB1, 0x95, 0x50, 0x88, 0x84, 0xFD
+        .db 0x60, 0xA9, 0xB8, 0x85, 0x00, 0xA9, 0xA2, 0x85, 0x01, 0x20, 0x7B, 0xA2, 0x20, 0x9F, 0xA2, 0x20
+        .db 0x86, 0xA2, 0xA0, 0x00, 0x20, 0x3A, 0xA2, 0xA9, 0x7C, 0x20, 0xF4, 0xA4, 0xA2, 0x1F, 0x98, 0xD5
+        .db 0x50, 0xF0, 0x40, 0xCA, 0x10, 0xF8, 0x98, 0x29, 0x01, 0x85, 0xFC, 0x98, 0x4A, 0x4A, 0x4A, 0x4A
+        .db 0x29, 0x01, 0x18, 0x65, 0xFC, 0x29, 0x01, 0xD0, 0x03, 0xA9, 0x2A, 0x2C, 0xA9, 0x20, 0x20, 0xF4
+        .db 0xA4, 0x20, 0xF4, 0xA4, 0xC8, 0x98, 0x29, 0x08, 0xF0, 0xCD, 0xA9, 0x7C, 0x20, 0xF4, 0xA4, 0x20
+        .db 0x98, 0xA2, 0x20, 0x7B, 0xA2, 0x20, 0x3A, 0xA2, 0x18, 0x98, 0x69, 0x08, 0xA8, 0xC0, 0x80, 0xF0
+        .db 0x3E, 0xD0, 0xB4, 0xA5, 0xB7, 0xF0, 0x05, 0xBD, 0xE5, 0xA3, 0xD0, 0x03, 0xBD, 0xD5, 0xA3, 0x20
+        .db 0xF4, 0xA4, 0xBD, 0x05, 0xA4, 0x20, 0xF4, 0xA4, 0xD0, 0xCA, 0x8A, 0x48, 0xA2, 0x19, 0xA9, 0x2D
+        .db 0x20, 0xF4, 0xA4, 0xCA, 0xD0, 0xFA, 0x68, 0xAA, 0xA9, 0x19, 0x85, 0x02, 0xB2, 0x00, 0xE6, 0x00
+        .db 0xD0, 0x02, 0xE6, 0x01, 0x20, 0xF4, 0xA4, 0xC6, 0x02, 0xD0, 0xF1, 0x20, 0x7B, 0xA2, 0x60, 0x20
+        .db 0x86, 0xA2, 0xA5, 0xFB, 0x20, 0x60, 0xE7, 0xA9, 0x20, 0x20, 0xF4, 0xA4, 0xA5, 0xFA, 0x20, 0x60
+        .db 0xE7, 0xA9, 0x20, 0x20, 0xF4, 0xA4, 0xA5, 0xF9, 0x20, 0x60, 0xE7, 0xA9, 0x0D, 0x20, 0xF4, 0xA4
+        .db 0xA9, 0x0A, 0x20, 0xF4, 0xA4, 0x60, 0xA2, 0x00, 0xA9, 0x20, 0x20, 0xF4, 0xA4, 0x8A, 0x20, 0x60
+        .db 0xE7, 0xE8, 0xE0, 0x08, 0xD0, 0xF2, 0xF0, 0xE3, 0x98, 0x29, 0x70, 0x20, 0x60, 0xE7, 0x60, 0xA2
+        .db 0x00, 0xBD, 0x99, 0xA3, 0xF0, 0x06, 0x20, 0xF4, 0xA4, 0xE8, 0xD0, 0xF5, 0x60, 0xA9, 0x3F, 0x20
+        .db 0xF4, 0xA4, 0x20, 0xDC, 0xA4, 0x29, 0x4F, 0x60, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20
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+        .db 0x8E, 0xF1, 0x03, 0xA9, 0xE7, 0x8D, 0x05, 0x04, 0xA9, 0xA4, 0x8D, 0x06, 0x04, 0xA9, 0xF4, 0x8D
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+        .db 0x04, 0xA9, 0x82, 0x8D, 0x09, 0x04, 0xA9, 0xE6, 0x8D, 0x0A, 0x04, 0x60, 0xAD, 0xC0, 0x3F, 0x29
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+        .db 0xC6, 0x3F, 0x38, 0x60, 0x48, 0xAD, 0xC0, 0x3F, 0x29, 0x20, 0xF0, 0xF9, 0x68, 0x8D, 0xC6, 0x3F
+        .db 0x60, 0xA9, 0x0D, 0x20, 0xF4, 0xA4, 0xA9, 0x0A, 0x80, 0xEA, 0x20, 0xE7, 0xA4, 0x90, 0x05, 0xC9
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+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0xEA, 0x4C, 0xBA, 0x13, 0xEA, 0x4C, 0xCA, 0x13, 0x04, 0x00, 0xD2, 0x5E, 0x5A, 0x1B, 0x7F, 0x00
+        .db 0x80, 0x3E, 0x9F, 0x00, 0xFF, 0x01, 0x00, 0x01, 0x1F, 0x00, 0x01, 0x00, 0x65, 0x1B, 0x65, 0x1B
+        .db 0x31, 0x13, 0xEA, 0xEA, 0x83, 0x4C, 0x49, 0xD4, 0x00, 0x00, 0x2C, 0x04, 0xB1, 0xAF, 0x48, 0xE6
+        .db 0xAF, 0xD0, 0x02, 0xE6, 0xB0, 0xB1, 0xAF, 0xE6, 0xAF, 0xD0, 0x02, 0xE6, 0xB0, 0xCA, 0xCA, 0x95
+        .db 0x01, 0x68, 0x95, 0x00, 0xA0, 0x01, 0xB1, 0xAF, 0x85, 0xB3, 0x88, 0xB1, 0xAF, 0x85, 0xB2, 0x18
+        .db 0xA5, 0xAF, 0x69, 0x02, 0x85, 0xAF, 0x90, 0x02, 0xE6, 0xB0, 0x4C, 0xB1, 0x00, 0x84, 0x43, 0x4C
+        .db 0x49, 0xD4, 0x24, 0x04, 0x66, 0x04, 0xB1, 0xAF, 0x48, 0x98, 0xF0, 0xCB, 0x0A, 0x85, 0xA6, 0xB5
+        .db 0x00, 0x99, 0xA7, 0x00, 0xE8, 0xC8, 0xC4, 0xA6, 0xD0, 0xF5, 0xA0, 0x00, 0x60, 0x87, 0x45, 0x58
+        .db 0x45, 0x43, 0x55, 0x54, 0xC5, 0x5D, 0x04, 0x89, 0x04, 0xB5, 0x00, 0x85, 0xB2, 0xB5, 0x01, 0x85
+        .db 0xB3, 0xE8, 0xE8, 0x4C, 0xB1, 0x00, 0x86, 0x42, 0x52, 0x41, 0x4E, 0x43, 0xC8, 0x7D, 0x04, 0xA1
+        .db 0x04, 0x18, 0xB1, 0xAF, 0x65, 0xAF, 0x48, 0xC8, 0xB1, 0xAF, 0x65, 0xB0, 0x85, 0xB0, 0x68, 0x85
+        .db 0xAF, 0x4C, 0x46, 0x04, 0x87, 0x30, 0x42, 0x52, 0x41, 0x4E, 0x43, 0xC8, 0x96, 0x04, 0xC0, 0x04
+        .db 0xE8, 0xE8, 0xB5, 0xFE, 0x15, 0xFF, 0xF0, 0xD9, 0x18, 0xA5, 0xAF, 0x69, 0x02, 0x85, 0xAF, 0x90
+        .db 0x02, 0xE6, 0xB0, 0x4C, 0x44, 0x04, 0x86, 0x28, 0x4C, 0x4F, 0x4F, 0x50, 0xA9, 0xB4, 0x04, 0xE1
+        .db 0x04, 0x86, 0xB6, 0xBA, 0xFE, 0x01, 0x01, 0xD0, 0x03, 0xFE, 0x02, 0x01, 0x18, 0xBD, 0x03, 0x01
+        .db 0xFD, 0x01, 0x01, 0xBD, 0x04, 0x01, 0xFD, 0x02, 0x01, 0xA6, 0xB6, 0x0A, 0x90, 0xA3, 0x68, 0x68
+        .db 0x68, 0x68, 0x4C, 0xC8, 0x04, 0x87, 0x28, 0x2B, 0x4C, 0x4F, 0x4F, 0x50, 0xA9, 0xD6, 0x04, 0x11
+        .db 0x05, 0xE8, 0xE8, 0x86, 0xB6, 0xB5, 0xFF, 0x48, 0x48, 0xB5, 0xFE, 0xBA, 0xE8, 0xE8, 0x18, 0x7D
+        .db 0x01, 0x01, 0x9D, 0x01, 0x01, 0x68, 0x7D, 0x02, 0x01, 0x9D, 0x02, 0x01, 0x68, 0x10, 0xBD, 0x18
+        .db 0xBD, 0x01, 0x01, 0xFD, 0x03, 0x01, 0xBD, 0x02, 0x01, 0xFD, 0x04, 0x01, 0x4C, 0xF9, 0x04, 0x84
+        .db 0x28, 0x44, 0x4F, 0xA9, 0x05, 0x05, 0x48, 0x05, 0xB5, 0x03, 0x48, 0xB5, 0x02, 0x48, 0xB5, 0x01
+        .db 0x48, 0xB5, 0x00, 0x48, 0xE8, 0xE8, 0xE8, 0xE8, 0x4C, 0x44, 0x04, 0x81, 0xC9, 0x3F, 0x05, 0xD5
+        .db 0x07, 0x85, 0x44, 0x49, 0x47, 0x49, 0xD4, 0x5B, 0x05, 0x6B, 0x05, 0x38, 0xB5, 0x02, 0xE9, 0x30
+        .db 0x30, 0x18, 0xC9, 0x0A, 0x30, 0x07, 0x38, 0xE9, 0x07, 0xC9, 0x0A, 0x30, 0x0D, 0xD5, 0x00, 0x10
+        .db 0x09, 0x95, 0x02, 0xA9, 0x01, 0x48, 0x98, 0x4C, 0x3F, 0x04, 0x98, 0x48, 0xE8, 0xE8, 0x4C, 0x3F
+        .db 0x04, 0x86, 0x28, 0x46, 0x49, 0x4E, 0x44, 0xA9, 0x61, 0x05, 0x9C, 0x05, 0xA9, 0x02, 0x20, 0x6C
+        .db 0x04, 0x86, 0xB6, 0xA0, 0x00, 0xB1, 0xA7, 0x51, 0xA9, 0x29, 0x3F, 0xD0, 0x2D, 0xC8, 0xB1, 0xA7
+        .db 0x51, 0xA9, 0x0A, 0xD0, 0x23, 0x90, 0xF6, 0xA6, 0xB6, 0xCA, 0xCA, 0xCA, 0xCA, 0x18, 0x98, 0x69
+        .db 0x05, 0x65, 0xA7, 0x95, 0x02, 0xA0, 0x00, 0x98, 0x65, 0xA8, 0x95, 0x03, 0x94, 0x01, 0xB1, 0xA7
+        .db 0x95, 0x00, 0xA9, 0x01, 0x48, 0x4C, 0x3D, 0x04, 0xB0, 0x05, 0xC8, 0xB1, 0xA7, 0x10, 0xFB, 0xC8
+        .db 0xB1, 0xA7, 0xAA, 0xC8, 0xB1, 0xA7, 0x85, 0xA8, 0x86, 0xA7, 0x05, 0xA7, 0xD0, 0xB5, 0xA6, 0xB6
+        .db 0xA9, 0x00, 0x48, 0x4C, 0x3D, 0x04, 0x87, 0x45, 0x4E, 0x43, 0x4C, 0x4F, 0x53, 0xC5, 0x91, 0x05
+        .db 0x02, 0x06, 0xA9, 0x02, 0x20, 0x6C, 0x04, 0x8A, 0x38, 0xE9, 0x08, 0xAA, 0x94, 0x03, 0x94, 0x01
+        .db 0x88, 0xC8, 0xB1, 0xA9, 0xC5, 0xA7, 0xF0, 0xF9, 0x94, 0x04, 0xB1, 0xA9, 0xD0, 0x0E, 0x94, 0x02
+        .db 0x94, 0x00, 0x98, 0xD5, 0x04, 0xD0, 0x02, 0xF6, 0x02, 0x4C, 0x44, 0x04, 0x94, 0x02, 0xC8, 0xC5
+        .db 0xA7, 0xD0, 0xE7, 0x94, 0x00, 0x4C, 0x44, 0x04, 0x84, 0x45, 0x4D, 0x49, 0xD4, 0xF6, 0x05, 0x64
+        .db 0x17, 0x83, 0x4B, 0x45, 0xD9, 0x38, 0x06, 0x6C, 0x17, 0x89, 0x3F, 0x54, 0x45, 0x52, 0x4D, 0x49
+        .db 0x4E, 0x41, 0xCC, 0x41, 0x06, 0x72, 0x17, 0x82, 0x43, 0xD2, 0x49, 0x06, 0x7B, 0x17, 0x85, 0x43
+        .db 0x4D, 0x4F, 0x56, 0xC5, 0x57, 0x06, 0x68, 0x06, 0xA9, 0x03, 0x20, 0x6C, 0x04, 0xC4, 0xA7, 0xD0
+        .db 0x07, 0xC6, 0xA8, 0x10, 0x03, 0x4C, 0x44, 0x04, 0xB1, 0xAB, 0x91, 0xA9, 0xC8, 0xD0, 0xEE, 0xE6
+        .db 0xAC, 0xE6, 0xAA, 0x4C, 0x6D, 0x06, 0x82, 0x55, 0xAA, 0x5E, 0x06, 0x8D, 0x06, 0xA9, 0x00, 0x85
+        .db 0xA7, 0xA0, 0x10, 0x56, 0x03, 0x76, 0x02, 0x90, 0x0D, 0x18, 0x85, 0xA8, 0xA5, 0xA7, 0x75, 0x00
+        .db 0x85, 0xA7, 0xA5, 0xA8, 0x75, 0x01, 0x6A, 0x66, 0xA7, 0x76, 0x03, 0x76, 0x02, 0x88, 0xD0, 0xE7
+        .db 0x95, 0x01, 0xA5, 0xA7, 0x95, 0x00, 0x4C, 0x44, 0x04, 0x82, 0x55, 0xAF, 0x86, 0x06, 0xC0, 0x06
+        .db 0x38, 0xB5, 0x02, 0xF5, 0x00, 0xB5, 0x03, 0xF5, 0x01, 0xB0, 0x2E, 0xA9, 0x11, 0x85, 0xA7, 0x36
+        .db 0x04, 0x36, 0x05, 0xC6, 0xA7, 0xF0, 0x2C, 0x36, 0x02, 0x36, 0x03, 0x64, 0xA8, 0x26, 0xA8, 0x38
+        .db 0xB5, 0x02, 0xF5, 0x00, 0x85, 0xA9, 0xB5, 0x03, 0xF5, 0x01, 0xA8, 0xA5, 0xA8, 0xE9, 0x00, 0x90
+        .db 0xDE, 0xA5, 0xA9, 0x95, 0x02, 0x94, 0x03, 0x80, 0xD6, 0xA9, 0xFF, 0x95, 0x02, 0x95, 0x03, 0x95
+        .db 0x04, 0x95, 0x05, 0xE8, 0xE8, 0x4C, 0x9A, 0x08, 0x83, 0x41, 0x4E, 0xC4, 0xB9, 0x06, 0x10, 0x07
+        .db 0xB5, 0x00, 0x35, 0x02, 0x48, 0xB5, 0x01, 0x35, 0x03, 0xE8, 0xE8, 0x4C, 0x3F, 0x04, 0x82, 0x4F
+        .db 0xD2, 0x08, 0x07, 0x25, 0x07, 0xB5, 0x00, 0x15, 0x02, 0x48, 0xB5, 0x01, 0x15, 0x03, 0xE8, 0xE8
+        .db 0x4C, 0x3F, 0x04, 0x83, 0x58, 0x4F, 0xD2, 0x1E, 0x07, 0x3B, 0x07, 0xB5, 0x00, 0x55, 0x02, 0x48
+        .db 0xB5, 0x01, 0x55, 0x03, 0xE8, 0xE8, 0x4C, 0x3F, 0x04, 0x83, 0x53, 0x50, 0xC0, 0x33, 0x07, 0x51
+        .db 0x07, 0x8A, 0x48, 0xA9, 0x00, 0x4C, 0x3D, 0x04, 0x83, 0x53, 0x50, 0xA1, 0x49, 0x07, 0x60, 0x07
+        .db 0xA0, 0x06, 0xB1, 0xB4, 0xAA, 0x4C, 0x44, 0x04, 0x83, 0x52, 0x50, 0xA1, 0x58, 0x07, 0x70, 0x07
+        .db 0x86, 0xB6, 0xA0, 0x08, 0xB1, 0xB4, 0xAA, 0x9A, 0xA6, 0xB6, 0x4C, 0x44, 0x04, 0x82, 0x3B, 0xD3
+        .db 0x68, 0x07, 0x84, 0x07, 0x68, 0x85, 0xAF, 0x68, 0x85, 0xB0, 0x4C, 0x44, 0x04, 0x85, 0x4C, 0x45
+        .db 0x41, 0x56, 0xC5, 0x7D, 0x07, 0x97, 0x07, 0x86, 0xB6, 0xBA, 0xBD, 0x01, 0x01, 0x9D, 0x03, 0x01
+        .db 0xBD, 0x02, 0x01, 0x9D, 0x04, 0x01, 0xA6, 0xB6, 0x4C, 0x44, 0x04, 0x82, 0x3E, 0xD2, 0x8D, 0x07
+        .db 0xB2, 0x07, 0xB5, 0x01, 0x48, 0xB5, 0x00, 0x48, 0xE8, 0xE8, 0x4C, 0x44, 0x04, 0x82, 0x52, 0xBE
+        .db 0xAB, 0x07, 0xC4, 0x07, 0xCA, 0xCA, 0x68, 0x95, 0x00, 0x68, 0x95, 0x01, 0x4C, 0x44, 0x04, 0x81
+        .db 0xD2, 0xBD, 0x07, 0xD5, 0x07, 0x86, 0xB6, 0xBA, 0xBD, 0x01, 0x01, 0x48, 0xBD, 0x02, 0x01, 0xA6
+        .db 0xB6, 0x4C, 0x3D, 0x04, 0x82, 0x30, 0xBD, 0xCF, 0x07, 0xEB, 0x07, 0xB5, 0x01, 0x94, 0x01, 0x15
+        .db 0x00, 0xD0, 0x01, 0xC8, 0x94, 0x00, 0x4C, 0x44, 0x04, 0x82, 0x30, 0xBC, 0xE4, 0x07, 0x00, 0x08
+        .db 0x16, 0x01, 0x98, 0x2A, 0x94, 0x01, 0x95, 0x00, 0x4C, 0x44, 0x04, 0x81, 0xAB, 0xF9, 0x07, 0x11
+        .db 0x08, 0x18, 0xB5, 0x00, 0x75, 0x02, 0x95, 0x02, 0xB5, 0x01, 0x75, 0x03, 0x95, 0x03, 0xE8, 0xE8
+        .db 0x4C, 0x44, 0x04, 0x82, 0x44, 0xAB, 0x0B, 0x08, 0x2A, 0x08, 0x18, 0xB5, 0x02, 0x75, 0x06, 0x95
+        .db 0x06, 0xB5, 0x03, 0x75, 0x07, 0x95, 0x07, 0xB5, 0x00, 0x75, 0x04, 0x95, 0x04, 0xB5, 0x01, 0x75
+        .db 0x05, 0x95, 0x05, 0x4C, 0x54, 0x05, 0x85, 0x4D, 0x49, 0x4E, 0x55, 0xD3, 0x23, 0x08, 0x50, 0x08
+        .db 0x38, 0x98, 0xF5, 0x00, 0x95, 0x00, 0x98, 0xF5, 0x01, 0x95, 0x01, 0x4C, 0x44, 0x04, 0x86, 0x44
+        .db 0x4D, 0x49, 0x4E, 0x55, 0xD3, 0x46, 0x08, 0x69, 0x08, 0x38, 0x98, 0xF5, 0x02, 0x95, 0x02, 0x98
+        .db 0xF5, 0x03, 0x95, 0x03, 0x4C, 0x51, 0x08, 0x84, 0x4F, 0x56, 0x45, 0xD2, 0x5E, 0x08, 0x80, 0x08
+        .db 0xB5, 0x02, 0x48, 0xB5, 0x03, 0x4C, 0x3D, 0x04, 0x84, 0x44, 0x52, 0x4F, 0xD0, 0x77, 0x08, 0x56
+        .db 0x05, 0x84, 0x53, 0x57, 0x41, 0xD0, 0x88, 0x08, 0x9A, 0x08, 0xB5, 0x02, 0x48, 0xB5, 0x00, 0x95
+        .db 0x02, 0xB5, 0x03, 0xB4, 0x01, 0x94, 0x03, 0x4C, 0x3F, 0x04, 0x83, 0x44, 0x55, 0xD0, 0x91, 0x08
+        .db 0xB2, 0x08, 0xB5, 0x00, 0x48, 0xB5, 0x01, 0x4C, 0x3D, 0x04, 0x82, 0x2B, 0xA1, 0xAA, 0x08, 0xC1
+        .db 0x08, 0x18, 0xA1, 0x00, 0x75, 0x02, 0x81, 0x00, 0xF6, 0x00, 0xD0, 0x02, 0xF6, 0x01, 0xA1, 0x00
+        .db 0x75, 0x03, 0x81, 0x00, 0x4C, 0x54, 0x05, 0x81, 0x54, 0x4F, 0x47, 0x47, 0x4C, 0xC5, 0xBA, 0x08
+        .db 0xE2, 0x08, 0xA1, 0x02, 0x55, 0x00, 0x81, 0x02, 0x4C, 0x54, 0x05, 0x81, 0xC0, 0xD7, 0x08, 0xF1
+        .db 0x08, 0xA1, 0x00, 0x48, 0xF6, 0x00, 0xD0, 0x02, 0xF6, 0x01, 0xA1, 0x00, 0x4C, 0x3F, 0x04, 0x82
+        .db 0x43, 0xC0, 0xEB, 0x08, 0x06, 0x09, 0xA1, 0x00, 0x95, 0x00, 0x94, 0x01, 0x4C, 0x44, 0x04, 0x81
+        .db 0xA1, 0xFF, 0x08, 0x15, 0x09, 0xB5, 0x02, 0x81, 0x00, 0xF6, 0x00, 0xD0, 0x02, 0xF6, 0x01, 0xB5
+        .db 0x03, 0x81, 0x00, 0x4C, 0x54, 0x05, 0x82, 0x43, 0xA1, 0x0F, 0x09, 0x2D, 0x09, 0xB5, 0x02, 0x81
+        .db 0x00, 0x4C, 0x54, 0x05, 0xC1, 0xBA, 0x26, 0x09, 0x4C, 0x09, 0xB5, 0x0C, 0x71, 0x0C, 0xCB, 0x0A
+        .db 0xEF, 0x08, 0xBE, 0x0A, 0x13, 0x09, 0xA9, 0x11, 0x36, 0x0D, 0x85, 0x0D, 0xA5, 0xB0, 0x48, 0xA5
+        .db 0xAF, 0x48, 0x18, 0xA5, 0xB2, 0x69, 0x02, 0x85, 0xAF, 0x98, 0x65, 0xB3, 0x85, 0xB0, 0x4C, 0x44
+        .db 0x04, 0xC1, 0xBB, 0x34, 0x09, 0x4C, 0x09, 0xDD, 0x0C, 0x12, 0x0D, 0x82, 0x07, 0x4A, 0x0D, 0x28
+        .db 0x0D, 0x82, 0x07, 0x88, 0x43, 0x4F, 0x4E, 0x53, 0x54, 0x41, 0x4E, 0xD4, 0x61, 0x09, 0x4C, 0x09
+        .db 0xA9, 0x11, 0x4A, 0x0D, 0x4C, 0x0B, 0x85, 0x0D, 0xA0, 0x02, 0xB1, 0xB2, 0x48, 0xC8, 0xB1, 0xB2
+        .db 0x4C, 0x3D, 0x04, 0x88, 0x56, 0x41, 0x52, 0x49, 0x41, 0x42, 0x4C, 0xC5, 0x73, 0x09, 0x4C, 0x09
+        .db 0x7E, 0x09, 0x85, 0x0D, 0x18, 0xA5, 0xB2, 0x69, 0x02, 0x48, 0x98, 0x65, 0xB3, 0x4C, 0x3D, 0x04
+        .db 0x84, 0x55, 0x53, 0x45, 0xD2, 0x93, 0x09, 0x4C, 0x09, 0x7E, 0x09, 0x85, 0x0D, 0xA0, 0x02, 0x18
+        .db 0xB1, 0xB2, 0x65, 0xB4, 0x48, 0xA9, 0x00, 0x65, 0xB5, 0x4C, 0x3D, 0x04, 0x81, 0xB0, 0xB0, 0x09
+        .db 0x88, 0x09, 0x00, 0x00, 0x81, 0xB1, 0xCC, 0x09, 0x88, 0x09, 0x01, 0x00, 0x81, 0xB2, 0xD4, 0x09
+        .db 0x88, 0x09, 0x02, 0x00, 0x81, 0xB3, 0xDC, 0x09, 0x88, 0x09, 0x03, 0x00, 0x82, 0x42, 0xCC, 0xE4
+        .db 0x09, 0x88, 0x09, 0x20, 0x00, 0x83, 0x43, 0x2F, 0xCC, 0xEC, 0x09, 0x88, 0x09, 0x40, 0x00, 0x85
+        .db 0x46, 0x49, 0x52, 0x53, 0xD4, 0xF5, 0x09, 0x88, 0x09, 0x60, 0x3A, 0x85, 0x4C, 0x49, 0x4D, 0x49
+        .db 0xD4, 0xFF, 0x09, 0x88, 0x09, 0x80, 0x3E, 0x85, 0x42, 0x2F, 0x42, 0x55, 0xC6, 0x0B, 0x0A, 0x88
+        .db 0x09, 0x80, 0x00, 0x85, 0x42, 0x2F, 0x53, 0x43, 0xD2, 0x17, 0x0A, 0x88, 0x09, 0x08, 0x00, 0x87
+        .db 0x2B, 0x4F, 0x52, 0x49, 0x47, 0x49, 0xCE, 0x23, 0x0A, 0x4C, 0x09, 0x2A, 0x04, 0x00, 0x04, 0x0F
+        .db 0x08, 0x82, 0x07, 0x83, 0x54, 0x49, 0xC2, 0x2F, 0x0A, 0xBD, 0x09, 0x0A, 0x85, 0x57, 0x49, 0x44
+        .db 0x54, 0xC8, 0x43, 0x0A, 0xBD, 0x09, 0x0C, 0x87, 0x57, 0x41, 0x52, 0x4E, 0x49, 0x4E, 0xC7, 0x4C
+        .db 0x0A, 0xBD, 0x09, 0x0E, 0x85, 0x46, 0x45, 0x4E, 0x43, 0xC5, 0x57, 0x0A, 0xBD, 0x09, 0x10, 0x82
+        .db 0x44, 0xD0, 0x64, 0x0A, 0xBD, 0x09, 0x12, 0x88, 0x56, 0x4F, 0x43, 0x2D, 0x4C, 0x49, 0x4E, 0xCB
+        .db 0x6F, 0x0A, 0xBD, 0x09, 0x14, 0x83, 0x42, 0x4C, 0xCB, 0x77, 0x0A, 0xBD, 0x09, 0x16, 0x82, 0x49
+        .db 0xCE, 0x85, 0x0A, 0xBD, 0x09, 0x18, 0x83, 0x4F, 0x55, 0xD4, 0x8E, 0x0A, 0xBD, 0x09, 0x1A, 0x83
+        .db 0x53, 0x43, 0xD2, 0x96, 0x0A, 0xBD, 0x09, 0x1C, 0x86, 0x4F, 0x46, 0x46, 0x53, 0x45, 0xD4, 0x9F
+        .db 0x0A, 0xBD, 0x09, 0x1E, 0x87, 0x43, 0x4F, 0x4E, 0x54, 0x45, 0x58, 0xD4, 0xA8, 0x0A, 0xBD, 0x09
+        .db 0x20, 0x87, 0x43, 0x55, 0x52, 0x52, 0x45, 0x4E, 0xD4, 0xB4, 0x0A, 0xBD, 0x09, 0x22, 0x85, 0x53
+        .db 0x54, 0x41, 0x54, 0xC5, 0xC1, 0x0A, 0xBD, 0x09, 0x24, 0x84, 0x42, 0x41, 0x53, 0xC5, 0xCE, 0x0A
+        .db 0xBD, 0x09, 0x26, 0x83, 0x44, 0x50, 0xCC, 0xD9, 0x0A, 0xBD, 0x09, 0x28, 0x83, 0x46, 0x4C, 0xC4
+        .db 0xE3, 0x0A, 0xBD, 0x09, 0x2A, 0x83, 0x43, 0x53, 0xD0, 0xEC, 0x0A, 0xBD, 0x09, 0x2C, 0x82, 0x52
+        .db 0xA3, 0xF5, 0x0A, 0xBD, 0x09, 0x2E, 0x83, 0x48, 0x4C, 0xC4, 0xFE, 0x0A, 0xBD, 0x09, 0x30, 0x82
+        .db 0x31, 0xAB, 0x06, 0x0B, 0x4C, 0x09, 0xD8, 0x09, 0x0F, 0x08, 0x82, 0x07, 0x82, 0x32, 0xAB, 0x0F
+        .db 0x0B, 0x4C, 0x09, 0xE0, 0x09, 0x0F, 0x08, 0x82, 0x07, 0x84, 0x48, 0x45, 0x52, 0xC5, 0x1C, 0x0B
+        .db 0x4C, 0x09, 0x74, 0x0A, 0xEF, 0x08, 0x82, 0x07, 0x85, 0x41, 0x4C, 0x4C, 0x4F, 0xD4, 0x29, 0x0B
+        .db 0x4C, 0x09, 0x74, 0x0A, 0xBF, 0x08, 0x82, 0x07, 0x81, 0xAC, 0x38, 0x0B, 0x4C, 0x09, 0x30, 0x0B
+        .db 0x13, 0x09, 0xE0, 0x09, 0x40, 0x0B, 0x82, 0x07, 0x82, 0x43, 0xAC, 0x48, 0x0B, 0x4C, 0x09, 0x30
+        .db 0x0B, 0x2B, 0x09, 0xD8, 0x09, 0x40, 0x0B, 0x82, 0x07, 0x81, 0xAD, 0x58, 0x0B, 0x4C, 0x09, 0x4E
+        .db 0x08, 0x0F, 0x08, 0x82, 0x07, 0x81, 0xBD, 0x69, 0x0B, 0x4C, 0x09, 0x6D, 0x0B, 0xE9, 0x07, 0x82
+        .db 0x07, 0x82, 0x55, 0xBC, 0x75, 0x0B, 0x4C, 0x09, 0x6D, 0x0B, 0xFE, 0x07, 0x82, 0x07, 0x81, 0xBC
+        .db 0x81, 0x0B, 0x94, 0x0B, 0x38, 0xB5, 0x02, 0xF5, 0x00, 0xB5, 0x03, 0xF5, 0x01, 0x94, 0x03, 0x50
+        .db 0x02, 0x49, 0x80, 0x10, 0x01, 0xC8, 0x94, 0x02, 0x4C, 0x56, 0x05, 0x81, 0xBE, 0x8E, 0x0B, 0x4C
+        .db 0x09, 0x98, 0x08, 0x92, 0x0B, 0x82, 0x07, 0x83, 0x52, 0x4F, 0xD4, 0xAB, 0x0B, 0x4C, 0x09, 0xB0
+        .db 0x07, 0x98, 0x08, 0xC2, 0x07, 0x98, 0x08, 0x82, 0x07, 0x85, 0x53, 0x50, 0x41, 0x43, 0xC5, 0xB7
+        .db 0x0B, 0x4C, 0x09, 0xF1, 0x09, 0x3F, 0x06, 0x82, 0x07, 0x84, 0x2D, 0x44, 0x55, 0xD0, 0xC9, 0x0B
+        .db 0x4C, 0x09, 0xB0, 0x08, 0xBE, 0x04, 0x04, 0x00, 0xB0, 0x08, 0x82, 0x07, 0x88, 0x54, 0x52, 0x41
+        .db 0x56, 0x45, 0x52, 0x53, 0xC5, 0xD9, 0x0B, 0x4C, 0x09, 0x98, 0x08, 0x7E, 0x08, 0x0F, 0x08, 0x64
+        .db 0x04, 0x7F, 0x7E, 0x08, 0x04, 0x09, 0x92, 0x0B, 0xBE, 0x04, 0xF1, 0xFF, 0x98, 0x08, 0x8F, 0x08
+        .db 0x82, 0x07, 0x86, 0x4C, 0x41, 0x54, 0x45, 0x53, 0xD4, 0xEC, 0x0B, 0x4C, 0x09, 0xCB, 0x0A, 0xEF
+        .db 0x08, 0xEF, 0x08, 0x82, 0x07, 0x83, 0x4C, 0x46, 0xC1, 0x12, 0x0C, 0x4C, 0x09, 0x64, 0x04, 0x04
+        .db 0x6D, 0x0B, 0x82, 0x07, 0x83, 0x43, 0x46, 0xC1, 0x25, 0x0C, 0x4C, 0x09, 0xE0, 0x09, 0x6D, 0x0B
+        .db 0x82, 0x07, 0x83, 0x4E, 0x46, 0xC1, 0x34, 0x0C, 0x4C, 0x09, 0x64, 0x04, 0x05, 0x6D, 0x0B, 0x2A
+        .db 0x04, 0xFF, 0xFF, 0xF7, 0x0B, 0x82, 0x07, 0x83, 0x50, 0x46, 0xC1, 0x42, 0x0C, 0x4C, 0x09, 0xD8
+        .db 0x09, 0xF7, 0x0B, 0x64, 0x04, 0x05, 0x0F, 0x08, 0x82, 0x07, 0x84, 0x21, 0x43, 0x53, 0xD0, 0x57
+        .db 0x0C, 0x4C, 0x09, 0x4F, 0x07, 0xFB, 0x0A, 0x13, 0x09, 0x82, 0x07, 0x86, 0x3F, 0x45, 0x52, 0x52
+        .db 0x4F, 0xD2, 0x6A, 0x0C, 0x4C, 0x09, 0x98, 0x08, 0xBE, 0x04, 0x08, 0x00, 0x40, 0x11, 0x9F, 0x04
+        .db 0x04, 0x00, 0x8F, 0x08, 0x82, 0x07, 0x85, 0x3F, 0x43, 0x4F, 0x4D, 0xD0, 0x7B, 0x0C, 0x4C, 0x09
+        .db 0xD6, 0x0A, 0xEF, 0x08, 0xE9, 0x07, 0x64, 0x04, 0x11, 0x84, 0x0C, 0x82, 0x07, 0x85, 0x3F, 0x45
+        .db 0x58, 0x45, 0xC3, 0x96, 0x0C, 0x4C, 0x09, 0xD6, 0x0A, 0xEF, 0x08, 0x64, 0x04, 0x12, 0x84, 0x0C
+        .db 0x82, 0x07, 0x86, 0x3F, 0x50, 0x41, 0x49, 0x52, 0xD3, 0xAD, 0x0C, 0x4C, 0x09, 0x6D, 0x0B, 0x64
+        .db 0x04, 0x13, 0x84, 0x0C, 0x82, 0x07, 0x84, 0x3F, 0x43, 0x53, 0xD0, 0xC2, 0x0C, 0x4C, 0x09, 0x4F
+        .db 0x07, 0xFB, 0x0A, 0xEF, 0x08, 0x6D, 0x0B, 0x64, 0x04, 0x14, 0x84, 0x0C, 0x82, 0x07, 0x88, 0x3F
+        .db 0x4C, 0x4F, 0x41, 0x44, 0x49, 0x4E, 0xC7, 0xD6, 0x0C, 0x4C, 0x09, 0x8B, 0x0A, 0xEF, 0x08, 0xE9
+        .db 0x07, 0x64, 0x04, 0x16, 0x84, 0x0C, 0x82, 0x07, 0x87, 0x43, 0x4F, 0x4D, 0x50, 0x49, 0x4C, 0xC5
+        .db 0xEE, 0x0C, 0x4C, 0x09, 0x9E, 0x0C, 0xC2, 0x07, 0xB0, 0x08, 0x21, 0x0B, 0xB0, 0x07, 0xEF, 0x08
+        .db 0x4C, 0x0B, 0x82, 0x07, 0xC1, 0xDB, 0x08, 0x0D, 0x4C, 0x09, 0xD0, 0x09, 0xD6, 0x0A, 0x13, 0x09
+        .db 0x82, 0x07, 0x81, 0xDD, 0x24, 0x0D, 0x4C, 0x09, 0x64, 0x04, 0xC0, 0xD6, 0x0A, 0x13, 0x09, 0x82
+        .db 0x07, 0x86, 0x53, 0x4D, 0x55, 0x44, 0x47, 0xC5, 0x32, 0x0D, 0x4C, 0x09, 0x1B, 0x0C, 0x64, 0x04
+        .db 0x20, 0xE0, 0x08, 0x82, 0x07, 0x83, 0x48, 0x45, 0xD8, 0x41, 0x0D, 0x4C, 0x09, 0x64, 0x04, 0x10
+        .db 0xE0, 0x0A, 0x13, 0x09, 0x82, 0x07, 0x87, 0x44, 0x45, 0x43, 0x49, 0x4D, 0x41, 0xCC, 0x55, 0x0D
+        .db 0x4C, 0x09, 0x64, 0x04, 0x0A, 0xE0, 0x0A, 0x13, 0x09, 0x82, 0x07, 0x87, 0x28, 0x3B, 0x43, 0x4F
+        .db 0x44, 0x45, 0xA9, 0x66, 0x0D, 0x4C, 0x09, 0xC2, 0x07, 0x1B, 0x0C, 0x5D, 0x0C, 0x3A, 0x0C, 0x13
+        .db 0x09, 0x82, 0x07, 0xC5, 0x3B, 0x43, 0x4F, 0x44, 0xC5, 0x7B, 0x0D, 0x4C, 0x09, 0xDD, 0x0C, 0x12
+        .db 0x0D, 0x85, 0x0D, 0x28, 0x0D, 0x4A, 0x0D, 0x82, 0x07, 0x87, 0x3C, 0x42, 0x55, 0x49, 0x4C, 0x44
+        .db 0xD3, 0x93, 0x0D, 0x4C, 0x09, 0xD0, 0x09, 0x7E, 0x09, 0x82, 0x07, 0x85, 0x44, 0x4F, 0x45, 0x53
+        .db 0xBE, 0xA9, 0x0D, 0x4C, 0x09, 0xC2, 0x07, 0x1B, 0x0C, 0x5D, 0x0C, 0x13, 0x09, 0x85, 0x0D, 0xA5
+        .db 0xB0, 0x48, 0xA5, 0xAF, 0x48, 0xA0, 0x02, 0xB1, 0xB2, 0x85, 0xAF, 0xC8, 0xB1, 0xB2, 0x85, 0xB0
+        .db 0x18, 0xA5, 0xB2, 0x69, 0x04, 0x48, 0xA5, 0xB3, 0x69, 0x00, 0x4C, 0x3D, 0x04, 0x85, 0x43, 0x4F
+        .db 0x55, 0x4E, 0xD4, 0xBB, 0x0D, 0x4C, 0x09, 0xB0, 0x08, 0x14, 0x0B, 0x98, 0x08, 0x04, 0x09, 0x82
+        .db 0x07, 0x84, 0x54, 0x59, 0x50, 0xC5, 0xED, 0x0D, 0x4C, 0x09, 0xE0, 0x0B, 0xBE, 0x04, 0x18, 0x00
+        .db 0x7E, 0x08, 0x0F, 0x08, 0x98, 0x08, 0x46, 0x05, 0x5F, 0x05, 0x04, 0x09, 0x3F, 0x06, 0xDF, 0x04
+        .db 0xF8, 0xFF, 0x9F, 0x04, 0x04, 0x00, 0x8F, 0x08, 0x82, 0x07, 0x89, 0x2D, 0x54, 0x52, 0x41, 0x49
+        .db 0x4C, 0x49, 0x4E, 0xC7, 0x01, 0x0E, 0x4C, 0x09, 0xB0, 0x08, 0xD0, 0x09, 0x46, 0x05, 0x7E, 0x08
+        .db 0x7E, 0x08, 0x0F, 0x08, 0xD8, 0x09, 0x6D, 0x0B, 0x04, 0x09, 0xF1, 0x09, 0x6D, 0x0B, 0xBE, 0x04
+        .db 0x08, 0x00, 0x95, 0x07, 0x9F, 0x04, 0x06, 0x00, 0xD8, 0x09, 0x6D, 0x0B, 0xDF, 0x04, 0xE0, 0xFF
+        .db 0x82, 0x07, 0x84, 0x28, 0x2E, 0x22, 0xA9, 0x2A, 0x0E, 0x4C, 0x09, 0xD3, 0x07, 0xF5, 0x0D, 0xB0
+        .db 0x08, 0x14, 0x0B, 0xC2, 0x07, 0x0F, 0x08, 0xB0, 0x07, 0x08, 0x0E, 0x82, 0x07, 0xC2, 0x2E, 0xA2
+        .db 0x62, 0x0E, 0x4C, 0x09, 0x64, 0x04, 0x22, 0xD6, 0x0A, 0xEF, 0x08, 0xBE, 0x04, 0x14, 0x00, 0x12
+        .db 0x0D, 0x69, 0x0E, 0xE3, 0x0F, 0x30, 0x0B, 0x04, 0x09, 0x14, 0x0B, 0x40, 0x0B, 0x9F, 0x04, 0x0A
+        .db 0x00, 0xE3, 0x0F, 0x30, 0x0B, 0xF5, 0x0D, 0x08, 0x0E, 0x82, 0x07, 0x86, 0x45, 0x58, 0x50, 0x45
+        .db 0x43, 0xD4, 0x7D, 0x0E, 0x4C, 0x09, 0x7E, 0x08, 0x0F, 0x08, 0x7E, 0x08, 0x46, 0x05, 0x47, 0x06
+        .db 0xB0, 0x08, 0x64, 0x04, 0x0E, 0x39, 0x0A, 0xEF, 0x08, 0x79, 0x0B, 0xBE, 0x04, 0x1F, 0x00, 0x8F
+        .db 0x08, 0x64, 0x04, 0x08, 0x7E, 0x08, 0x5F, 0x05, 0x79, 0x0B, 0xB0, 0x08, 0xC2, 0x07, 0xE0, 0x09
+        .db 0x6D, 0x0B, 0x0F, 0x08, 0xB0, 0x07, 0x6D, 0x0B, 0x9F, 0x04, 0x27, 0x00, 0xB0, 0x08, 0x64, 0x04
+        .db 0x0D, 0x79, 0x0B, 0xBE, 0x04, 0x0E, 0x00, 0x95, 0x07, 0x8F, 0x08, 0xF1, 0x09, 0xD0, 0x09, 0x9F
+        .db 0x04, 0x04, 0x00, 0xB0, 0x08, 0x5F, 0x05, 0x2B, 0x09, 0xD0, 0x09, 0x5F, 0x05, 0x14, 0x0B, 0x13
+        .db 0x09, 0x3F, 0x06, 0xDF, 0x04, 0xA9, 0xFF, 0x8F, 0x08, 0x82, 0x07, 0x85, 0x51, 0x55, 0x45, 0x52
+        .db 0xD9, 0xAB, 0x0E, 0x4C, 0x09, 0x49, 0x0A, 0xEF, 0x08, 0x64, 0x04, 0x50, 0xB4, 0x0E, 0xD0, 0x09
+        .db 0x93, 0x0A, 0x13, 0x09, 0x82, 0x07, 0xC1, 0x80, 0x1B, 0x0F, 0x4C, 0x09, 0x8B, 0x0A, 0xEF, 0x08
+        .db 0xBE, 0x04, 0x2A, 0x00, 0xD8, 0x09, 0x8B, 0x0A, 0xBF, 0x08, 0xD0, 0x09, 0x93, 0x0A, 0x13, 0x09
+        .db 0x8B, 0x0A, 0xEF, 0x08, 0xD0, 0x09, 0x2B, 0x0A, 0xBE, 0x06, 0x8F, 0x08, 0xE9, 0x07, 0xBE, 0x04
+        .db 0x08, 0x00, 0xB5, 0x0C, 0xC2, 0x07, 0x8F, 0x08, 0x9F, 0x04, 0x06, 0x00, 0xC2, 0x07, 0x8F, 0x08
+        .db 0x82, 0x07, 0x84, 0x46, 0x49, 0x4C, 0xCC, 0x36, 0x0F, 0x4C, 0x09, 0x98, 0x08, 0xB0, 0x07, 0x7E
+        .db 0x08, 0x2B, 0x09, 0xB0, 0x08, 0x14, 0x0B, 0xC2, 0x07, 0xD8, 0x09, 0x6D, 0x0B, 0x66, 0x06, 0x82
+        .db 0x07, 0x85, 0x45, 0x52, 0x41, 0x53, 0xC5, 0x72, 0x0F, 0x4C, 0x09, 0xD0, 0x09, 0x79, 0x0F, 0x82
+        .db 0x07, 0x86, 0x42, 0x4C, 0x41, 0x4E, 0x4B, 0xD3, 0x91, 0x0F, 0x4C, 0x09, 0xF1, 0x09, 0x79, 0x0F
+        .db 0x82, 0x07, 0x84, 0x48, 0x4F, 0x4C, 0xC4, 0xA1, 0x0F, 0x4C, 0x09, 0x2A, 0x04, 0xFF, 0xFF, 0x0C
+        .db 0x0B, 0xBF, 0x08, 0x0C, 0x0B, 0xEF, 0x08, 0x2B, 0x09, 0x82, 0x07, 0x83, 0x50, 0x41, 0xC4, 0xB2
+        .db 0x0F, 0x4C, 0x09, 0x30, 0x0B, 0x64, 0x04, 0x44, 0x0F, 0x08, 0x82, 0x07, 0x84, 0x57, 0x4F, 0x52
+        .db 0xC4, 0xCB, 0x0F, 0x4C, 0x09, 0x8B, 0x0A, 0xEF, 0x08, 0xBE, 0x04, 0x0C, 0x00, 0x8B, 0x0A, 0xEF
+        .db 0x08, 0x48, 0x16, 0x9F, 0x04, 0x06, 0x00, 0x49, 0x0A, 0xEF, 0x08, 0x93, 0x0A, 0xEF, 0x08, 0x0F
+        .db 0x08, 0x98, 0x08, 0x00, 0x06, 0x30, 0x0B, 0x64, 0x04, 0x22, 0xAA, 0x0F, 0x93, 0x0A, 0xBF, 0x08
+        .db 0x7E, 0x08, 0x6D, 0x0B, 0xB0, 0x07, 0xD3, 0x07, 0x30, 0x0B, 0x2B, 0x09, 0x0F, 0x08, 0x30, 0x0B
+        .db 0x14, 0x0B, 0xC2, 0x07, 0x66, 0x06, 0x82, 0x07, 0x85, 0x55, 0x50, 0x50, 0x45, 0xD2, 0xDC, 0x0F
+        .db 0x4C, 0x09, 0x7E, 0x08, 0x0F, 0x08, 0x98, 0x08, 0x46, 0x05, 0x5F, 0x05, 0x04, 0x09, 0x64, 0x04
+        .db 0x5F, 0xAF, 0x0B, 0xBE, 0x04, 0x09, 0x00, 0x5F, 0x05, 0x64, 0x04, 0x20, 0xE0, 0x08, 0xDF, 0x04
+        .db 0xEA, 0xFF, 0x82, 0x07, 0x88, 0x28, 0x4E, 0x55, 0x4D, 0x42, 0x45, 0x52, 0xA9, 0x28, 0x10, 0x4C
+        .db 0x09, 0x14, 0x0B, 0xB0, 0x08, 0xB0, 0x07, 0x04, 0x09, 0xE0, 0x0A, 0xEF, 0x08, 0x69, 0x05, 0xBE
+        .db 0x04, 0x2C, 0x00, 0x98, 0x08, 0xE0, 0x0A, 0xEF, 0x08, 0x8B, 0x06, 0x8F, 0x08, 0xBD, 0x0B, 0xE0
+        .db 0x0A, 0xEF, 0x08, 0x8B, 0x06, 0x28, 0x08, 0xE9, 0x0A, 0xEF, 0x08, 0x14, 0x0B, 0xBE, 0x04, 0x08
+        .db 0x00, 0xD8, 0x09, 0xE9, 0x0A, 0xBF, 0x08, 0xC2, 0x07, 0x9F, 0x04, 0xC6, 0xFF, 0xC2, 0x07, 0x82
+        .db 0x07, 0x86, 0x4E, 0x55, 0x4D, 0x42, 0x45, 0xD2, 0x54, 0x10, 0x4C, 0x09, 0xD0, 0x09, 0xD0, 0x09
+        .db 0xBD, 0x0B, 0xB0, 0x08, 0x14, 0x0B, 0x04, 0x09, 0x64, 0x04, 0x2D, 0x79, 0x0B, 0xB0, 0x08, 0xB0
+        .db 0x07, 0x0F, 0x08, 0x2A, 0x04, 0xFF, 0xFF, 0xE9, 0x0A, 0x13, 0x09, 0x5F, 0x10, 0xB0, 0x08, 0x04
+        .db 0x09, 0xF1, 0x09, 0x6D, 0x0B, 0xBE, 0x04, 0x15, 0x00, 0xB0, 0x08, 0x04, 0x09, 0x64, 0x04, 0x2E
+        .db 0x6D, 0x0B, 0xD0, 0x09, 0x84, 0x0C, 0xD0, 0x09, 0x9F, 0x04, 0xDD, 0xFF, 0x8F, 0x08, 0xC2, 0x07
+        .db 0xBE, 0x04, 0x04, 0x00, 0x67, 0x08, 0x82, 0x07, 0x85, 0x2D, 0x46, 0x49, 0x4E, 0xC4, 0xA1, 0x10
+        .db 0x4C, 0x09, 0xF1, 0x09, 0xE3, 0x0F, 0x30, 0x0B, 0xF5, 0x0D, 0x30, 0x10, 0x30, 0x0B, 0xBE, 0x0A
+        .db 0xEF, 0x08, 0xEF, 0x08, 0x9A, 0x05, 0xB0, 0x08, 0xE9, 0x07, 0xBE, 0x04, 0x0A, 0x00, 0x8F, 0x08
+        .db 0x30, 0x0B, 0x1B, 0x0C, 0x9A, 0x05, 0x82, 0x07, 0x87, 0x28, 0x41, 0x42, 0x4F, 0x52, 0x54, 0xA9
+        .db 0xF8, 0x10, 0x4C, 0x09, 0x90, 0x13, 0x82, 0x07, 0x85, 0x45, 0x52, 0x52, 0x4F, 0xD2, 0x28, 0x11
+        .db 0x4C, 0x09, 0x61, 0x0A, 0xEF, 0x08, 0xFE, 0x07, 0xBE, 0x04, 0x04, 0x00, 0x32, 0x11, 0x30, 0x0B
+        .db 0xF5, 0x0D, 0x08, 0x0E, 0x69, 0x0E, 0x04, 0x20, 0x20, 0x3F, 0x20, 0xDF, 0x16, 0x5E, 0x07, 0x8F
+        .db 0x08, 0x8F, 0x08, 0x93, 0x0A, 0xEF, 0x08, 0x8B, 0x0A, 0xEF, 0x08, 0x61, 0x13, 0x82, 0x07, 0x83
+        .db 0x49, 0x44, 0xAE, 0x38, 0x11, 0x4C, 0x09, 0xD1, 0x0F, 0x64, 0x04, 0x20, 0x64, 0x04, 0x5F, 0x79
+        .db 0x0F, 0xB0, 0x08, 0x5D, 0x0C, 0x2B, 0x0C, 0x7E, 0x08, 0x6D, 0x0B, 0xD1, 0x0F, 0x98, 0x08, 0x66
+        .db 0x06, 0xD1, 0x0F, 0xF5, 0x0D, 0x64, 0x04, 0x1F, 0x0E, 0x07, 0x08, 0x0E, 0xD1, 0x0B, 0x82, 0x07
+        .db 0x86, 0x43, 0x52, 0x45, 0x41, 0x54, 0xC5, 0x6F, 0x11, 0x4C, 0x09, 0x49, 0x0A, 0x30, 0x0B, 0x64
+        .db 0x04, 0xA0, 0x0F, 0x08, 0x86, 0x0B, 0xE0, 0x09, 0x84, 0x0C, 0x00, 0x11, 0xBE, 0x04, 0x0F, 0x00
+        .db 0x8F, 0x08, 0x48, 0x0C, 0x75, 0x11, 0x64, 0x04, 0x04, 0xDF, 0x16, 0xD1, 0x0B, 0x30, 0x0B, 0xB0
+        .db 0x08, 0x04, 0x09, 0x54, 0x0A, 0xEF, 0x08, 0x45, 0x14, 0x14, 0x0B, 0x40, 0x0B, 0x74, 0x0A, 0x04
+        .db 0x09, 0x64, 0x04, 0xFD, 0x79, 0x0B, 0x40, 0x0B, 0xB0, 0x08, 0x64, 0x04, 0xA0, 0xE0, 0x08, 0x30
+        .db 0x0B, 0xD8, 0x09, 0x6D, 0x0B, 0x64, 0x04, 0x80, 0xE0, 0x08, 0x1B, 0x0C, 0x4C, 0x0B, 0xCB, 0x0A
+        .db 0xEF, 0x08, 0x13, 0x09, 0x30, 0x0B, 0x21, 0x0B, 0x4C, 0x0B, 0x82, 0x07, 0xC9, 0x5B, 0x43, 0x4F
+        .db 0x4D, 0x50, 0x49, 0x4C, 0x45, 0xDD, 0xA0, 0x11, 0x4C, 0x09, 0x00, 0x11, 0xE9, 0x07, 0xD0, 0x09
+        .db 0x84, 0x0C, 0x8F, 0x08, 0x3A, 0x0C, 0x4C, 0x0B, 0x82, 0x07, 0xC7, 0x4C, 0x49, 0x54, 0x45, 0x52
+        .db 0x41, 0xCC, 0x0C, 0x12, 0x4C, 0x09, 0xD6, 0x0A, 0xEF, 0x08, 0xBE, 0x04, 0x08, 0x00, 0x12, 0x0D
+        .db 0x2A, 0x04, 0x4C, 0x0B, 0x82, 0x07, 0xC8, 0x44, 0x4C, 0x49, 0x54, 0x45, 0x52, 0x41, 0xCC, 0x2A
+        .db 0x12, 0x4C, 0x09, 0xD6, 0x0A, 0xEF, 0x08, 0xBE, 0x04, 0x08, 0x00, 0x98, 0x08, 0x34, 0x12, 0x34
+        .db 0x12, 0x82, 0x07, 0x86, 0x3F, 0x53, 0x54, 0x41, 0x43, 0xCB, 0x46, 0x12, 0x4C, 0x09, 0x64, 0x04
+        .db 0x9F, 0x4F, 0x07, 0x86, 0x0B, 0xD8, 0x09, 0x84, 0x0C, 0x4F, 0x07, 0x64, 0x04, 0x20, 0x86, 0x0B
+        .db 0x64, 0x04, 0x07, 0x84, 0x0C, 0x82, 0x07, 0x89, 0x49, 0x4E, 0x54, 0x45, 0x52, 0x50, 0x52, 0x45
+        .db 0xD4, 0x63, 0x12, 0x4C, 0x09, 0x00, 0x11, 0xBE, 0x04, 0x1E, 0x00, 0xD6, 0x0A, 0xEF, 0x08, 0x92
+        .db 0x0B, 0xBE, 0x04, 0x0A, 0x00, 0x3A, 0x0C, 0x4C, 0x0B, 0x9F, 0x04, 0x06, 0x00, 0x3A, 0x0C, 0x87
+        .db 0x04, 0x6C, 0x12, 0x9F, 0x04, 0x1C, 0x00, 0x30, 0x0B, 0xAA, 0x10, 0xE9, 0x0A, 0xEF, 0x08, 0x14
+        .db 0x0B, 0xBE, 0x04, 0x08, 0x00, 0x51, 0x12, 0x9F, 0x04, 0x06, 0x00, 0x8F, 0x08, 0x34, 0x12, 0x6C
+        .db 0x12, 0x9F, 0x04, 0xC2, 0xFF, 0x89, 0x49, 0x4D, 0x4D, 0x45, 0x44, 0x49, 0x41, 0x54, 0xC5, 0x87
+        .db 0x12, 0x4C, 0x09, 0x1B, 0x0C, 0x64, 0x04, 0x40, 0xE0, 0x08, 0x82, 0x07, 0x8A, 0x56, 0x4F, 0x43
+        .db 0x41, 0x42, 0x55, 0x4C, 0x41, 0x52, 0xD9, 0xD5, 0x12, 0x4C, 0x09, 0xB3, 0x0D, 0x2A, 0x04, 0x81
+        .db 0xA0, 0x4C, 0x0B, 0xCB, 0x0A, 0xEF, 0x08, 0x3A, 0x0C, 0x4C, 0x0B, 0x30, 0x0B, 0x82, 0x0A, 0xEF
+        .db 0x08, 0x4C, 0x0B, 0x82, 0x0A, 0x13, 0x09, 0xC3, 0x0D, 0x21, 0x0B, 0xBE, 0x0A, 0x13, 0x09, 0x82
+        .db 0x07, 0xC5, 0x46, 0x4F, 0x52, 0x54, 0xC8, 0xEC, 0x12, 0xCF, 0x0D, 0x19, 0x13, 0x81, 0xA0, 0x5A
+        .db 0x1B, 0x00, 0x00, 0x8B, 0x44, 0x45, 0x46, 0x49, 0x4E, 0x49, 0x54, 0x49, 0x4F, 0x4E, 0xD3, 0x21
+        .db 0x13, 0x4C, 0x09, 0xBE, 0x0A, 0xEF, 0x08, 0xCB, 0x0A, 0x13, 0x09, 0x82, 0x07, 0xC1, 0xA8, 0x33
+        .db 0x13, 0x4C, 0x09, 0x64, 0x04, 0x29, 0xE3, 0x0F, 0x82, 0x07, 0x84, 0x51, 0x55, 0x49, 0xD4, 0x4D
+        .db 0x13, 0x4C, 0x09, 0xD0, 0x09, 0x8B, 0x0A, 0x13, 0x09, 0x28, 0x0D, 0x6E, 0x07, 0x5C, 0x06, 0x23
+        .db 0x0F, 0x93, 0x12, 0xD6, 0x0A, 0xEF, 0x08, 0xE9, 0x07, 0xBE, 0x04, 0x07, 0x00, 0x69, 0x0E, 0x02
+        .db 0x4F, 0x4B, 0x9F, 0x04, 0xE7, 0xFF, 0x82, 0x07, 0x85, 0x41, 0x42, 0x4F, 0x52, 0xD4, 0x5A, 0x13
+        .db 0x4C, 0x09, 0x5E, 0x07, 0x70, 0x0D, 0xDB, 0x15, 0x5C, 0x06, 0x69, 0x0E, 0x0E, 0x66, 0x69, 0x67
+        .db 0x2D, 0x46, 0x4F, 0x52, 0x54, 0x48, 0x20, 0x20, 0x31, 0x2E, 0x30, 0x29, 0x13, 0x41, 0x13, 0x61
+        .db 0x13, 0x84, 0x43, 0x4F, 0x4C, 0xC4, 0x88, 0x13, 0xBA, 0x13, 0xAD, 0x0C, 0x04, 0x8D, 0x2F, 0x13
+        .db 0xAD, 0x0D, 0x04, 0x8D, 0x30, 0x13, 0xA0, 0x15, 0xD0, 0x02, 0xA0, 0x0F, 0xAD, 0x10, 0x04, 0x85
+        .db 0xB4, 0xAD, 0x11, 0x04, 0x85, 0xB5, 0xB9, 0x0C, 0x04, 0x91, 0xB4, 0x88, 0x10, 0xF8, 0xA9, 0x13
+        .db 0x85, 0xB0, 0xA9, 0x92, 0x85, 0xAF, 0xD8, 0xA9, 0x6C, 0x85, 0xB1, 0x4C, 0x70, 0x07, 0x84, 0x53
+        .db 0x2D, 0x3E, 0xC4, 0xB1, 0x13, 0x4C, 0x09, 0xB0, 0x08, 0xFE, 0x07, 0x4E, 0x08, 0x82, 0x07, 0x82
+        .db 0x2B, 0xAD, 0xEE, 0x13, 0x4C, 0x09, 0xFE, 0x07, 0xBE, 0x04, 0x04, 0x00, 0x4E, 0x08, 0x82, 0x07
+        .db 0x83, 0x44, 0x2B, 0xAD, 0xFF, 0x13, 0x4C, 0x09, 0xFE, 0x07, 0xBE, 0x04, 0x04, 0x00, 0x67, 0x08
+        .db 0x82, 0x07, 0x83, 0x41, 0x42, 0xD3, 0x10, 0x14, 0x4C, 0x09, 0xB0, 0x08, 0x04, 0x14, 0x82, 0x07
+        .db 0x84, 0x44, 0x41, 0x42, 0xD3, 0x22, 0x14, 0x4C, 0x09, 0xB0, 0x08, 0x16, 0x14, 0x82, 0x07, 0x83
+        .db 0x4D, 0x49, 0xCE, 0x30, 0x14, 0x4C, 0x09, 0x7E, 0x08, 0x7E, 0x08, 0xAF, 0x0B, 0xBE, 0x04, 0x04
+        .db 0x00, 0x98, 0x08, 0x8F, 0x08, 0x82, 0x07, 0x83, 0x4D, 0x41, 0xD8, 0x3F, 0x14, 0x4C, 0x09, 0x7E
+        .db 0x08, 0x7E, 0x08, 0x92, 0x0B, 0xBE, 0x04, 0x04, 0x00, 0x98, 0x08, 0x8F, 0x08, 0x82, 0x07, 0x82
+        .db 0x4D, 0xAA, 0x57, 0x14, 0x4C, 0x09, 0x7E, 0x08, 0x7E, 0x08, 0x39, 0x07, 0xB0, 0x07, 0x28, 0x14
+        .db 0x98, 0x08, 0x28, 0x14, 0x8B, 0x06, 0xC2, 0x07, 0x16, 0x14, 0x82, 0x07, 0x82, 0x4D, 0xAF, 0x6F
+        .db 0x14, 0x4C, 0x09, 0x7E, 0x08, 0xB0, 0x07, 0xB0, 0x07, 0x37, 0x14, 0xD3, 0x07, 0x28, 0x14, 0xBE
+        .db 0x06, 0xC2, 0x07, 0xD3, 0x07, 0x39, 0x07, 0x04, 0x14, 0x98, 0x08, 0xC2, 0x07, 0x04, 0x14, 0x98
+        .db 0x08, 0x82, 0x07, 0x81, 0xAA, 0x8C, 0x14, 0x4C, 0x09, 0x8B, 0x06, 0x8F, 0x08, 0x82, 0x07, 0x84
+        .db 0x2F, 0x4D, 0x4F, 0xC4, 0xB3, 0x14, 0x4C, 0x09, 0xB0, 0x07, 0xF5, 0x13, 0xC2, 0x07, 0x91, 0x14
+        .db 0x82, 0x07, 0x81, 0xAF, 0xBF, 0x14, 0x4C, 0x09, 0xC6, 0x14, 0x98, 0x08, 0x8F, 0x08, 0x82, 0x07
+        .db 0x83, 0x4D, 0x4F, 0xC4, 0xD2, 0x14, 0x4C, 0x09, 0xC6, 0x14, 0x8F, 0x08, 0x82, 0x07, 0x85, 0x2A
+        .db 0x2F, 0x4D, 0x4F, 0xC4, 0xE0, 0x14, 0x4C, 0x09, 0xB0, 0x07, 0x74, 0x14, 0xC2, 0x07, 0x91, 0x14
+        .db 0x82, 0x07, 0x82, 0x2A, 0xAF, 0xEE, 0x14, 0x4C, 0x09, 0xF6, 0x14, 0x98, 0x08, 0x8F, 0x08, 0x82
+        .db 0x07, 0x85, 0x4D, 0x2F, 0x4D, 0x4F, 0xC4, 0x02, 0x15, 0x4C, 0x09, 0xB0, 0x07, 0xD0, 0x09, 0xD3
+        .db 0x07, 0xBE, 0x06, 0xC2, 0x07, 0x98, 0x08, 0xB0, 0x07, 0xBE, 0x06, 0xC2, 0x07, 0x82, 0x07, 0x83
+        .db 0x55, 0x53, 0xC5, 0x11, 0x15, 0xA4, 0x09, 0x60, 0x3A, 0x84, 0x50, 0x52, 0x45, 0xD6, 0x2F, 0x15
+        .db 0xA4, 0x09, 0x60, 0x3A, 0x84, 0x2B, 0x42, 0x55, 0xC6, 0x39, 0x15, 0x4C, 0x09, 0x2A, 0x04, 0x84
+        .db 0x00, 0x0F, 0x08, 0xB0, 0x08, 0x13, 0x0A, 0x79, 0x0B, 0xBE, 0x04, 0x06, 0x00, 0x8F, 0x08, 0x07
+        .db 0x0A, 0xB0, 0x08, 0x40, 0x15, 0xEF, 0x08, 0x6D, 0x0B, 0x82, 0x07, 0x86, 0x55, 0x50, 0x44, 0x41
+        .db 0x54, 0xC5, 0x44, 0x15, 0x4C, 0x09, 0x40, 0x15, 0xEF, 0x08, 0xEF, 0x08, 0x2A, 0x04, 0x00, 0x80
+        .db 0x23, 0x07, 0x40, 0x15, 0xEF, 0x08, 0x13, 0x09, 0x82, 0x07, 0x85, 0x46, 0x4C, 0x55, 0x53, 0xC8
+        .db 0x6B, 0x15, 0x4C, 0x09, 0x13, 0x0A, 0x07, 0x0A, 0x6D, 0x0B, 0x1F, 0x0A, 0x64, 0x04, 0x04, 0x0F
+        .db 0x08, 0xD6, 0x14, 0x14, 0x0B, 0xD0, 0x09, 0x46, 0x05, 0x2A, 0x04, 0xFF, 0x7F, 0x00, 0x16, 0x8F
+        .db 0x08, 0xDF, 0x04, 0xF6, 0xFF, 0x82, 0x07, 0x8D, 0x45, 0x4D, 0x50, 0x54, 0x59, 0x2D, 0x42, 0x55
+        .db 0x46, 0x46, 0x45, 0x52, 0xD3, 0x8A, 0x15, 0x4C, 0x09, 0x07, 0x0A, 0x13, 0x0A, 0x7E, 0x08, 0x6D
+        .db 0x0B, 0x99, 0x0F, 0x82, 0x07, 0x83, 0x44, 0x52, 0xB0, 0xB7, 0x15, 0x4C, 0x09, 0xD0, 0x09, 0xB1
+        .db 0x0A, 0x13, 0x09, 0x82, 0x07, 0x83, 0x44, 0x52, 0xB1, 0xD5, 0x15, 0x4C, 0x09, 0x2A, 0x04, 0x20
+        .db 0x03, 0xB1, 0x0A, 0x13, 0x09, 0x82, 0x07, 0x86, 0x42, 0x55, 0x46, 0x46, 0x45, 0xD2, 0xE5, 0x15
+        .db 0x4C, 0x09, 0x35, 0x15, 0xEF, 0x08, 0xB0, 0x08, 0xB0, 0x07, 0x4B, 0x15, 0xBE, 0x04, 0xFC, 0xFF
+        .db 0x35, 0x15, 0x13, 0x09, 0xD3, 0x07, 0xEF, 0x08, 0xFE, 0x07, 0xBE, 0x04, 0x14, 0x00, 0xD3, 0x07
+        .db 0x21, 0x0B, 0xD3, 0x07, 0xEF, 0x08, 0x2A, 0x04, 0xFF, 0x7F, 0x0E, 0x07, 0xD0, 0x09, 0xA0, 0x17
+        .db 0xD3, 0x07, 0x13, 0x09, 0xD3, 0x07, 0x40, 0x15, 0x13, 0x09, 0xC2, 0x07, 0x21, 0x0B, 0x82, 0x07
+        .db 0x85, 0x42, 0x4C, 0x4F, 0x43, 0xCB, 0xF7, 0x15, 0x4C, 0x09, 0xB1, 0x0A, 0xEF, 0x08, 0x0F, 0x08
+        .db 0xB0, 0x07, 0x40, 0x15, 0xEF, 0x08, 0xB0, 0x08, 0xEF, 0x08, 0xD3, 0x07, 0x6D, 0x0B, 0xB0, 0x08
+        .db 0x0F, 0x08, 0xBE, 0x04, 0x34, 0x00, 0x4B, 0x15, 0xE9, 0x07, 0xBE, 0x04, 0x14, 0x00, 0x8F, 0x08
+        .db 0xD3, 0x07, 0x00, 0x16, 0xB0, 0x08, 0xD3, 0x07, 0xD8, 0x09, 0xA0, 0x17, 0xE0, 0x09, 0x6D, 0x0B
+        .db 0xB0, 0x08, 0xEF, 0x08, 0xD3, 0x07, 0x6D, 0x0B, 0xB0, 0x08, 0x0F, 0x08, 0xE9, 0x07, 0xBE, 0x04
+        .db 0xD6, 0xFF, 0xB0, 0x08, 0x40, 0x15, 0x13, 0x09, 0xC2, 0x07, 0x8F, 0x08, 0x21, 0x0B, 0x82, 0x07
+        .db 0x86, 0x28, 0x4C, 0x49, 0x4E, 0x45, 0xA9, 0x40, 0x16, 0x4C, 0x09, 0xB0, 0x07, 0xFB, 0x09, 0x1F
+        .db 0x0A, 0xF6, 0x14, 0xC2, 0x07, 0x2B, 0x0A, 0xB7, 0x14, 0x0F, 0x08, 0x48, 0x16, 0x0F, 0x08, 0xFB
+        .db 0x09, 0x82, 0x07, 0x85, 0x2E, 0x4C, 0x49, 0x4E, 0xC5, 0xA0, 0x16, 0x4C, 0x09, 0xA9, 0x16, 0x36
+        .db 0x0E, 0x08, 0x0E, 0x82, 0x07, 0x87, 0x4D, 0x45, 0x53, 0x53, 0x41, 0x47, 0xC5, 0xC3, 0x16, 0x4C
+        .db 0x09, 0x61, 0x0A, 0xEF, 0x08, 0xBE, 0x04, 0x1B, 0x00, 0xE0, 0x0B, 0xBE, 0x04, 0x11, 0x00, 0x64
+        .db 0x04, 0x04, 0xB1, 0x0A, 0xEF, 0x08, 0x2B, 0x0A, 0xD6, 0x14, 0x6D, 0x0B, 0xCB, 0x16, 0x9F, 0x04
+        .db 0x0D, 0x00, 0x69, 0x0E, 0x06, 0x4D, 0x53, 0x47, 0x20, 0x23, 0x20, 0x53, 0x1A, 0x82, 0x07, 0x84
+        .db 0x4C, 0x4F, 0x41, 0xC4, 0xD5, 0x16, 0x4C, 0x09, 0x8B, 0x0A, 0xEF, 0x08, 0xB0, 0x07, 0x93, 0x0A
+        .db 0xEF, 0x08, 0xB0, 0x07, 0xD0, 0x09, 0x93, 0x0A, 0x13, 0x09, 0x2B, 0x0A, 0xB7, 0x14, 0x8B, 0x0A
+        .db 0x13, 0x09, 0x93, 0x12, 0xC2, 0x07, 0x93, 0x0A, 0x13, 0x09, 0xC2, 0x07, 0x8B, 0x0A, 0x13, 0x09
+        .db 0x82, 0x07, 0xC3, 0x2D, 0x2D, 0xBE, 0x0F, 0x17, 0x4C, 0x09, 0xF9, 0x0C, 0xD0, 0x09, 0x93, 0x0A
+        .db 0x13, 0x09, 0x2B, 0x0A, 0x8B, 0x0A, 0xEF, 0x08, 0x7E, 0x08, 0xE6, 0x14, 0x6D, 0x0B, 0x8B, 0x0A
+        .db 0xBF, 0x08, 0x82, 0x07, 0xB5, 0x00, 0x20, 0xF4, 0xA4, 0x4C, 0x56, 0x05, 0x20, 0xDC, 0xA4, 0x4C
+        .db 0x52, 0x07, 0x20, 0x0A, 0xA5, 0xA9, 0x00, 0x2A, 0x4C, 0x52, 0x07, 0x20, 0x01, 0xA5, 0x4C, 0x44
+        .db 0x04, 0x84, 0x2D, 0x42, 0x43, 0xC4, 0x42, 0x17, 0x4C, 0x09, 0xD0, 0x09, 0x64, 0x04, 0x0A, 0xBE
+        .db 0x06, 0x64, 0x04, 0x10, 0xB7, 0x14, 0x23, 0x07, 0x82, 0x07, 0x83, 0x52, 0x53, 0xD7, 0x81, 0x17
+        .db 0x4C, 0x09, 0xB0, 0x07, 0x1F, 0x0A, 0xB7, 0x14, 0x2A, 0x04, 0x00, 0x40, 0x0F, 0x08, 0xB0, 0x08
+        .db 0x2A, 0x04, 0x00, 0x68, 0xAF, 0x0B, 0x2A, 0x04, 0x06, 0x00, 0x84, 0x0C, 0xC2, 0x07, 0xBE, 0x04
+        .db 0x04, 0x00, 0x98, 0x08, 0x1F, 0x0A, 0x66, 0x06, 0x82, 0x07, 0xC1, 0xA7, 0x9A, 0x17, 0x4C, 0x09
+        .db 0x00, 0x11, 0xE9, 0x07, 0xD0, 0x09, 0x84, 0x0C, 0x8F, 0x08, 0x34, 0x12, 0x82, 0x07, 0x86, 0x46
+        .db 0x4F, 0x52, 0x47, 0x45, 0xD4, 0xCA, 0x17, 0x4C, 0x09, 0xCE, 0x17, 0x48, 0x0C, 0xB0, 0x08, 0x6C
+        .db 0x0A, 0xEF, 0x08, 0x86, 0x0B, 0x64, 0x04, 0x15, 0x84, 0x0C, 0xB0, 0x07, 0x82, 0x0A, 0xEF, 0x08
+        .db 0xD3, 0x07, 0x7E, 0x08, 0x86, 0x0B, 0xBE, 0x04, 0x12, 0x00, 0x29, 0x13, 0x41, 0x13, 0xEF, 0x08
+        .db 0xB0, 0x08, 0x82, 0x0A, 0x13, 0x09, 0x9F, 0x04, 0xE8, 0xFF, 0xB0, 0x08, 0x64, 0x04, 0x04, 0x6D
+        .db 0x0B, 0x5D, 0x0C, 0x2B, 0x0C, 0xEF, 0x08, 0xB0, 0x08, 0xD3, 0x07, 0x86, 0x0B, 0xBE, 0x04, 0xF2
+        .db 0xFF, 0x7E, 0x08, 0xE0, 0x09, 0x6D, 0x0B, 0x13, 0x09, 0xEF, 0x08, 0xE0, 0x0B, 0xE9, 0x07, 0xBE
+        .db 0x04, 0xD9, 0xFF, 0xC2, 0x07, 0x74, 0x0A, 0x13, 0x09, 0x82, 0x07, 0x84, 0x42, 0x41, 0x43, 0xCB
+        .db 0xDE, 0x17, 0x4C, 0x09, 0x30, 0x0B, 0x6D, 0x0B, 0x4C, 0x0B, 0x82, 0x07, 0xC5, 0x42, 0x45, 0x47
+        .db 0x49, 0xCE, 0x4B, 0x18, 0x4C, 0x09, 0x9E, 0x0C, 0x30, 0x0B, 0xD8, 0x09, 0x82, 0x07, 0xC5, 0x45
+        .db 0x4E, 0x44, 0x49, 0xC6, 0x5C, 0x18, 0x4C, 0x09, 0x9E, 0x0C, 0xE0, 0x09, 0xCB, 0x0C, 0x30, 0x0B
+        .db 0x7E, 0x08, 0x6D, 0x0B, 0x98, 0x08, 0x13, 0x09, 0x82, 0x07, 0xC4, 0x54, 0x48, 0x45, 0xCE, 0x6E
+        .db 0x18, 0x4C, 0x09, 0x76, 0x18, 0x82, 0x07, 0xC2, 0x44, 0xCF, 0x8A, 0x18, 0x4C, 0x09, 0x12, 0x0D
+        .db 0x46, 0x05, 0x30, 0x0B, 0xE8, 0x09, 0x82, 0x07, 0xC4, 0x4C, 0x4F, 0x4F, 0xD0, 0x97, 0x18, 0x4C
+        .db 0x09, 0xE8, 0x09, 0xCB, 0x0C, 0x12, 0x0D, 0xDF, 0x04, 0x52, 0x18, 0x82, 0x07, 0xC5, 0x2B, 0x4C
+        .db 0x4F, 0x4F, 0xD0, 0xA8, 0x18, 0x4C, 0x09, 0xE8, 0x09, 0xCB, 0x0C, 0x12, 0x0D, 0x0F, 0x05, 0x52
+        .db 0x18, 0x82, 0x07, 0xC5, 0x55, 0x4E, 0x54, 0x49, 0xCC, 0xBD, 0x18, 0x4C, 0x09, 0xD8, 0x09, 0xCB
+        .db 0x0C, 0x12, 0x0D, 0xBE, 0x04, 0x52, 0x18, 0x82, 0x07, 0xC3, 0x45, 0x4E, 0xC4, 0xD3, 0x18, 0x4C
+        .db 0x09, 0xDB, 0x18, 0x82, 0x07, 0xC5, 0x41, 0x47, 0x41, 0x49, 0xCE, 0xE9, 0x18, 0x4C, 0x09, 0xD8
+        .db 0x09, 0xCB, 0x0C, 0x12, 0x0D, 0x9F, 0x04, 0x52, 0x18, 0x82, 0x07, 0xC6, 0x52, 0x45, 0x50, 0x45
+        .db 0x41, 0xD4, 0xF5, 0x18, 0x4C, 0x09, 0xB0, 0x07, 0xB0, 0x07, 0xFD, 0x18, 0xC2, 0x07, 0xC2, 0x07
+        .db 0xE0, 0x09, 0x6D, 0x0B, 0x76, 0x18, 0x82, 0x07, 0xC2, 0x49, 0xC6, 0x0B, 0x19, 0x4C, 0x09, 0x12
+        .db 0x0D, 0xBE, 0x04, 0x30, 0x0B, 0xD0, 0x09, 0x4C, 0x0B, 0xE0, 0x09, 0x82, 0x07, 0xC4, 0x45, 0x4C
+        .db 0x53, 0xC5, 0x28, 0x19, 0x4C, 0x09, 0xE0, 0x09, 0xCB, 0x0C, 0x12, 0x0D, 0x9F, 0x04, 0x30, 0x0B
+        .db 0xD0, 0x09, 0x4C, 0x0B, 0x98, 0x08, 0xE0, 0x09, 0x76, 0x18, 0xE0, 0x09, 0x82, 0x07, 0xC5, 0x57
+        .db 0x48, 0x49, 0x4C, 0xC5, 0x3D, 0x19, 0x4C, 0x09, 0x2D, 0x19, 0x21, 0x0B, 0x82, 0x07, 0x86, 0x53
+        .db 0x50, 0x41, 0x43, 0x45, 0xD3, 0x5E, 0x19, 0x4C, 0x09, 0xD0, 0x09, 0x5D, 0x14, 0xE0, 0x0B, 0xBE
+        .db 0x04, 0x0C, 0x00, 0xD0, 0x09, 0x46, 0x05, 0xD1, 0x0B, 0xDF, 0x04, 0xFC, 0xFF, 0x82, 0x07, 0x82
+        .db 0x3C, 0xA3, 0x6E, 0x19, 0x4C, 0x09, 0xD1, 0x0F, 0x0C, 0x0B, 0x13, 0x09, 0x82, 0x07, 0x82, 0x23
+        .db 0xBE, 0x8F, 0x19, 0x4C, 0x09, 0x8F, 0x08, 0x8F, 0x08, 0x0C, 0x0B, 0xEF, 0x08, 0xD1, 0x0F, 0x7E
+        .db 0x08, 0x6D, 0x0B, 0x82, 0x07, 0x84, 0x53, 0x49, 0x47, 0xCE, 0x9E, 0x19, 0x4C, 0x09, 0xBD, 0x0B
+        .db 0xFE, 0x07, 0xBE, 0x04, 0x07, 0x00, 0x64, 0x04, 0x2D, 0xB9, 0x0F, 0x82, 0x07, 0x81, 0xA3, 0xB5
+        .db 0x19, 0x4C, 0x09, 0xE0, 0x0A, 0xEF, 0x08, 0x19, 0x15, 0xBD, 0x0B, 0x64, 0x04, 0x09, 0x7E, 0x08
+        .db 0x92, 0x0B, 0xBE, 0x04, 0x07, 0x00, 0x64, 0x04, 0x07, 0x0F, 0x08, 0x64, 0x04, 0x30, 0x0F, 0x08
+        .db 0xB9, 0x0F, 0x82, 0x07, 0x82, 0x23, 0xD3, 0xCD, 0x19, 0x4C, 0x09, 0xD1, 0x19, 0x7E, 0x08, 0x7E
+        .db 0x08, 0x23, 0x07, 0xE9, 0x07, 0xBE, 0x04, 0xF4, 0xFF, 0x82, 0x07, 0x83, 0x44, 0x2E, 0xD2, 0xF4
+        .db 0x19, 0x4C, 0x09, 0xB0, 0x07, 0x98, 0x08, 0x7E, 0x08, 0x37, 0x14, 0x94, 0x19, 0xF9, 0x19, 0xBC
+        .db 0x19, 0xA3, 0x19, 0xC2, 0x07, 0x7E, 0x08, 0x6D, 0x0B, 0x77, 0x19, 0x08, 0x0E, 0x82, 0x07, 0x82
+        .db 0x44, 0xAE, 0x0B, 0x1A, 0x4C, 0x09, 0xD0, 0x09, 0x11, 0x1A, 0xD1, 0x0B, 0x82, 0x07, 0x82, 0x2E
+        .db 0xD2, 0x2F, 0x1A, 0x4C, 0x09, 0xB0, 0x07, 0xF5, 0x13, 0xC2, 0x07, 0x11, 0x1A, 0x82, 0x07, 0x81
+        .db 0xAE, 0x3E, 0x1A, 0x4C, 0x09, 0xF5, 0x13, 0x34, 0x1A, 0x82, 0x07, 0x81, 0xBF, 0x4F, 0x1A, 0x4C
+        .db 0x09, 0xEF, 0x08, 0x53, 0x1A, 0x82, 0x07, 0x84, 0x4C, 0x49, 0x53, 0xD4, 0x5B, 0x1A, 0x4C, 0x09
+        .db 0x70, 0x0D, 0x5C, 0x06, 0xB0, 0x08, 0xA5, 0x0A, 0x13, 0x09, 0x69, 0x0E, 0x06, 0x53, 0x43, 0x52
+        .db 0x20, 0x23, 0x20, 0x53, 0x1A, 0x64, 0x04, 0x10, 0xD0, 0x09, 0x46, 0x05, 0x5C, 0x06, 0x5F, 0x05
+        .db 0xE8, 0x09, 0x43, 0x1A, 0xD1, 0x0B, 0x5F, 0x05, 0xA5, 0x0A, 0xEF, 0x08, 0xCB, 0x16, 0xDF, 0x04
+        .db 0xEC, 0xFF, 0x5C, 0x06, 0x82, 0x07, 0x85, 0x49, 0x4E, 0x44, 0x45, 0xD8, 0x67, 0x1A, 0x4C, 0x09
+        .db 0x5C, 0x06, 0x14, 0x0B, 0x98, 0x08, 0x46, 0x05, 0x5C, 0x06, 0x5F, 0x05, 0xE8, 0x09, 0x43, 0x1A
+        .db 0xD1, 0x0B, 0xD0, 0x09, 0x5F, 0x05, 0xCB, 0x16, 0x55, 0x06, 0xBE, 0x04, 0x04, 0x00, 0x95, 0x07
+        .db 0xDF, 0x04, 0xE6, 0xFF, 0x64, 0x04, 0x0C, 0x3F, 0x06, 0x82, 0x07, 0x85, 0x54, 0x52, 0x49, 0x41
+        .db 0xC4, 0xA6, 0x1A, 0x4C, 0x09, 0xE8, 0x09, 0xD6, 0x14, 0xE8, 0x09, 0xB7, 0x14, 0xE8, 0x09, 0x7E
+        .db 0x08, 0x0F, 0x08, 0x98, 0x08, 0x46, 0x05, 0x5C, 0x06, 0x5F, 0x05, 0x6E, 0x1A, 0xDF, 0x04, 0xF8
+        .db 0xFF, 0x5C, 0x06, 0x64, 0x04, 0x0F, 0xDF, 0x16, 0x5C, 0x06, 0x64, 0x04, 0x0C, 0x3F, 0x06, 0x82
+        .db 0x07, 0x85, 0x56, 0x4C, 0x49, 0x53, 0xD4, 0xDB, 0x1A, 0x4C, 0x09, 0x64, 0x04, 0x80, 0x9C, 0x0A
+        .db 0x13, 0x09, 0xBE, 0x0A, 0xEF, 0x08, 0xEF, 0x08, 0x9C, 0x0A, 0xEF, 0x08, 0xFB, 0x09, 0xAF, 0x0B
+        .db 0xBE, 0x04, 0x0A, 0x00, 0x5C, 0x06, 0xD0, 0x09, 0x9C, 0x0A, 0x13, 0x09, 0xB0, 0x08, 0x75, 0x11
+        .db 0xD1, 0x0B, 0xD1, 0x0B, 0x5D, 0x0C, 0x2B, 0x0C, 0xEF, 0x08, 0xB0, 0x08, 0xE9, 0x07, 0x55, 0x06
+        .db 0x23, 0x07, 0xBE, 0x04, 0xD4, 0xFF, 0x8F, 0x08, 0x82, 0x07, 0x83, 0x4D, 0x4F, 0xCE, 0x11, 0x1B
+        .db 0x62, 0x1B, 0x6C, 0xF7, 0x03, 0xA9, 0x00, 0x85, 0x00, 0xA9, 0x04, 0x85, 0x01, 0xA9, 0x00, 0x85
+        .db 0x02, 0xA9, 0xA6, 0x85, 0x03, 0xB2, 0x02, 0x92, 0x00, 0xE6, 0x00, 0xD0, 0x02, 0xE6, 0x01, 0xE6
+        .db 0x02, 0xD0, 0x02, 0xE6, 0x03, 0x38, 0xA9, 0x65, 0xA2, 0xBD, 0xE5, 0x02, 0x8A, 0xE5, 0x03, 0xB0
+        .db 0xE4, 0x4C, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0xA0, 0x04, 0xB9, 0xF6, 0xDE, 0x99, 0x00, 0x04, 0x88, 0x10, 0xF7, 0xA2, 0xFF, 0x86, 0x88, 0x9A
+        .db 0xA9, 0x4C, 0x85, 0xA1, 0xA2, 0x1C, 0xBD, 0xFA, 0xDE, 0x95, 0xBB, 0xCA, 0xD0, 0xF8, 0xA2, 0x12
+        .db 0xBD, 0x17, 0xDF, 0x95, 0x00, 0xCA, 0x10, 0xF8, 0xA9, 0x00, 0x85, 0xDC, 0x85, 0xDF, 0x85, 0xB2
+        .db 0x85, 0x67, 0xA9, 0x0E, 0x85, 0x64, 0xA9, 0x03, 0x85, 0xA0, 0xA2, 0x68, 0x86, 0x65, 0x20, 0x92
+        .db 0xC6, 0xA9, 0x2A, 0xA0, 0xDF, 0x20, 0xD3, 0xC6, 0x20, 0x40, 0xC0, 0x86, 0xC3, 0x84, 0xC4, 0x20
+        .db 0xC2, 0x00, 0xD0, 0x1F, 0xA0, 0x00, 0xE6, 0x11, 0xD0, 0x08, 0xE6, 0x12, 0xA5, 0x12, 0xC9, 0x3F
+        .db 0xF0, 0x1D, 0xA9, 0x55, 0x91, 0x11, 0xD1, 0x11, 0xD0, 0x15, 0x0A, 0x91, 0x11, 0xD1, 0x11, 0xF0
+        .db 0xE5, 0xD0, 0x0C, 0x20, 0xA6, 0xD7, 0xA5, 0xAC, 0xC9, 0x98, 0xB0, 0xA2, 0x20, 0xF7, 0xD2, 0xA5
+        .db 0x11, 0xA4, 0x12, 0xC0, 0x01, 0x90, 0x97, 0x85, 0x85, 0x84, 0x86, 0x85, 0x81, 0x84, 0x82, 0xA0
+        .db 0x00, 0xA2, 0x05, 0x84, 0x79, 0x86, 0x7A, 0x98, 0x91, 0x79, 0xE6, 0x79, 0x20, 0x92, 0xC6, 0x20
+        .db 0x50, 0xC1, 0xA5, 0x85, 0x38, 0xE5, 0x79, 0xAA, 0xA5, 0x86, 0xE5, 0x7A, 0x20, 0x82, 0xD8, 0xA9
+        .db 0x39, 0xA0, 0xDF, 0x20, 0xD3, 0xC6, 0xA9, 0x5A, 0xA0, 0xBF, 0x85, 0x01, 0x84, 0x02, 0x6C, 0x01
+        .db 0x00, 0x20, 0x0B, 0xBF, 0x85, 0x7F, 0x84, 0x80, 0x38, 0xA5, 0xA6, 0xE5, 0xAA, 0xA8, 0xA5, 0xA7
+        .db 0xE5, 0xAB, 0xAA, 0xE8, 0x98, 0xF0, 0x24, 0x38, 0x49, 0xFF, 0x65, 0xA6, 0x85, 0xA6, 0xB0, 0x03
+        .db 0xC6, 0xA7, 0x38, 0x98, 0x49, 0xFF, 0x65, 0xA4, 0x85, 0xA4, 0xB0, 0x08, 0xC6, 0xA5, 0x90, 0x04
+        .db 0xB1, 0xA6, 0x91, 0xA4, 0x88, 0xD0, 0xF9, 0xB1, 0xA6, 0x91, 0xA4, 0xC6, 0xA7, 0xC6, 0xA5, 0xCA
+        .db 0xD0, 0xF2, 0x60, 0x85, 0x78, 0xBA, 0xE4, 0x78, 0x90, 0x30, 0x60, 0xC4, 0x82, 0x90, 0x2A, 0xD0
+        .db 0x04, 0xC5, 0x81, 0x90, 0x24, 0x48, 0xA2, 0x08, 0x98, 0x48, 0xB5, 0xA3, 0xCA, 0x10, 0xFA, 0x20
+        .db 0xDF, 0xCF, 0xA2, 0x00, 0x68, 0x95, 0xA4, 0xE8, 0xE0, 0x08, 0x30, 0xF8, 0x68, 0xA8, 0x68, 0xC4
+        .db 0x82, 0x90, 0x06, 0xD0, 0x05, 0xC5, 0x81, 0xB0, 0x01, 0x60, 0xA2, 0x0C, 0x20, 0x92, 0xC6, 0xBD
+        .db 0xB2, 0xE4, 0xBC, 0xB3, 0xE4, 0x20, 0xD3, 0xC6, 0x20, 0x89, 0xC1, 0xA9, 0xEF, 0xA0, 0xE5, 0x20
+        .db 0xD3, 0xC6, 0xA4, 0x88, 0xC8, 0xF0, 0x03, 0x20, 0x77, 0xD8, 0xA9, 0x00, 0x85, 0xDF, 0x85, 0xDC
+        .db 0xA9, 0x00, 0xA0, 0xE6, 0x20, 0xD3, 0xC6, 0x20, 0x4D, 0xC0, 0x86, 0xC3, 0x84, 0xC4, 0x20, 0xC2
+        .db 0x00, 0xF0, 0xF4, 0xA2, 0xFF, 0x86, 0x88, 0x90, 0x06, 0x20, 0x7E, 0xC0, 0x4C, 0xF3, 0xC2, 0x20
+        .db 0x55, 0xC5, 0x20, 0x7E, 0xC0, 0x84, 0x5D, 0x20, 0x24, 0xC1, 0x90, 0x44, 0xA0, 0x01, 0xB1, 0xAA
+        .db 0x85, 0x72, 0xA5, 0x7B, 0x85, 0x71, 0xA5, 0xAB, 0x85, 0x74, 0xA5, 0xAA, 0x88, 0xF1, 0xAA, 0x18
+        .db 0x65, 0x7B, 0x85, 0x7B, 0x85, 0x73, 0xA5, 0x7C, 0x69, 0xFF, 0x85, 0x7C, 0xE5, 0xAB, 0xAA, 0x38
+        .db 0xA5, 0xAA, 0xE5, 0x7B, 0xA8, 0xB0, 0x03, 0xE8, 0xC6, 0x74, 0x18, 0x65, 0x71, 0x90, 0x03, 0xC6
+        .db 0x72, 0x18, 0xB1, 0x71, 0x91, 0x73, 0xC8, 0xD0, 0xF9, 0xE6, 0x72, 0xE6, 0x74, 0xCA, 0xD0, 0xF2
+        .db 0xAD, 0x0D, 0x04, 0xF0, 0x3F, 0xA5, 0x85, 0xA4, 0x86, 0x85, 0x81, 0x84, 0x82, 0xA5, 0x7B, 0x85
+        .db 0xA6, 0xA4, 0x7C, 0x84, 0xA7, 0x65, 0x5D, 0x90, 0x01, 0xC8, 0x85, 0xA4, 0x84, 0xA5, 0x20, 0xC1
+        .db 0xBE, 0xA5, 0x7F, 0xA4, 0x80, 0x85, 0x7B, 0x84, 0x7C, 0xA4, 0x5D, 0x88, 0xB9, 0x09, 0x04, 0x91
+        .db 0xAA, 0x88, 0xC0, 0x03, 0xD0, 0xF6, 0xA5, 0x12, 0x91, 0xAA, 0x88, 0xA5, 0x11, 0x91, 0xAA, 0x88
+        .db 0xA9, 0xFF, 0x91, 0xAA, 0x20, 0x65, 0xC1, 0xA6, 0x79, 0xA5, 0x7A, 0xA0, 0x01, 0x86, 0x71, 0x85
+        .db 0x72, 0xB1, 0x71, 0xF0, 0x18, 0xA0, 0x04, 0xC8, 0xB1, 0x71, 0xD0, 0xFB, 0x38, 0x98, 0x65, 0x71
+        .db 0xAA, 0xA0, 0x00, 0x91, 0x71, 0x98, 0x65, 0x72, 0xC8, 0x91, 0x71, 0x90, 0xE0, 0x4C, 0x67, 0xBF
+        .db 0x20, 0xEB, 0xC6, 0x20, 0xE8, 0xC6, 0xD0, 0x05, 0x20, 0xED, 0xC6, 0xCA, 0x2C, 0xA2, 0x00, 0x20
+        .db 0xEA, 0xDE, 0x90, 0xFB, 0xF0, 0xF9, 0xC9, 0x07, 0xF0, 0x10, 0xC9, 0x0D, 0xF0, 0x19, 0xE0, 0x00
+        .db 0xD0, 0x04, 0xC9, 0x21, 0x90, 0xE9, 0xC9, 0x08, 0xF0, 0xDE, 0xE0, 0x47, 0xB0, 0x0C, 0x9D, 0x0D
+        .db 0x04, 0xE8, 0x20, 0xED, 0xC6, 0xD0, 0xD8, 0x4C, 0x89, 0xC6, 0xA9, 0x07, 0xD0, 0xF4, 0xA0, 0xFF
+        .db 0x38, 0xA5, 0xC3, 0xE9, 0x0D, 0xAA, 0x86, 0x60, 0xBD, 0x0D, 0x04, 0xF0, 0x51, 0xC9, 0x5F, 0xB0
+        .db 0x4D, 0xC9, 0x3C, 0xB0, 0x0E, 0xC9, 0x30, 0xB0, 0x45, 0x85, 0x5C, 0xC9, 0x22, 0xF0, 0x61, 0xC9
+        .db 0x2A, 0x90, 0x3B, 0x24, 0x60, 0x70, 0x37, 0x86, 0x78, 0x84, 0xBA, 0xA0, 0x12, 0x84, 0x73, 0xA0
+        .db 0xE1, 0x84, 0x74, 0xA0, 0x00, 0xD1, 0x73, 0xF0, 0x05, 0x90, 0x21, 0xC8, 0xD0, 0xF7, 0x98, 0x0A
+        .db 0xAA, 0xBD, 0x30, 0xE1, 0x85, 0x73, 0xBD, 0x31, 0xE1, 0x85, 0x74, 0xA0, 0xFF, 0xA6, 0x78, 0xC8
+        .db 0xB1, 0x73, 0x30, 0x08, 0xE8, 0xDD, 0x0D, 0x04, 0xF0, 0xF5, 0xD0, 0x2B, 0xA4, 0xBA, 0xE8, 0xC8
+        .db 0x99, 0x0D, 0x04, 0xC9, 0x00, 0xF0, 0x32, 0xE9, 0x3A, 0xF0, 0x04, 0xC9, 0x49, 0xD0, 0x02, 0x85
+        .db 0x60, 0x49, 0x57, 0xD0, 0x93, 0x85, 0x5C, 0xBD, 0x0D, 0x04, 0xF0, 0xE2, 0xC5, 0x5C, 0xF0, 0xDE
+        .db 0xC8, 0x99, 0x0D, 0x04, 0xE8, 0xD0, 0xF0, 0xA6, 0x78, 0xB1, 0x73, 0x08, 0xC8, 0x28, 0x10, 0xF9
+        .db 0xB1, 0x73, 0xD0, 0xBE, 0xBD, 0x0D, 0x04, 0x10, 0xC3, 0xC8, 0xC8, 0x99, 0x0D, 0x04, 0xC8, 0xC8
+        .db 0xC8, 0xC6, 0xC3, 0x60, 0xA5, 0x79, 0xA6, 0x7A, 0xA0, 0x01, 0x85, 0xAA, 0x86, 0xAB, 0xB1, 0xAA
+        .db 0xF0, 0x1A, 0xA0, 0x03, 0xB1, 0xAA, 0x88, 0xC5, 0x12, 0xD0, 0x04, 0xB1, 0xAA, 0xC5, 0x11, 0xB0
+        .db 0x09, 0x88, 0xB1, 0xAA, 0xAA, 0x88, 0xB1, 0xAA, 0x90, 0xDE, 0xF0, 0x01, 0x18, 0x60, 0xD0, 0xFD
+        .db 0xA9, 0x00, 0xA8, 0x91, 0x79, 0xC8, 0x91, 0x79, 0x18, 0xA5, 0x79, 0x69, 0x02, 0x85, 0x7B, 0xA5
+        .db 0x7A, 0x69, 0x00, 0x85, 0x7C, 0x18, 0xA5, 0x79, 0x69, 0xFF, 0x85, 0xC3, 0xA5, 0x7A, 0x69, 0xFF
+        .db 0x85, 0xC4, 0xA5, 0x85, 0xA4, 0x86, 0x85, 0x81, 0x84, 0x82, 0xA5, 0x7B, 0xA4, 0x7C, 0x85, 0x7D
+        .db 0x84, 0x7E, 0x85, 0x7F, 0x84, 0x80, 0x20, 0x44, 0xC3, 0xA2, 0x68, 0x86, 0x65, 0x68, 0xAA, 0x68
+        .db 0x8E, 0xFE, 0x01, 0x8D, 0xFF, 0x01, 0xA2, 0xFD, 0x9A, 0xA9, 0x00, 0x85, 0x8C, 0x85, 0x61, 0x60
+        .db 0xF0, 0xD0, 0x60, 0x90, 0x06, 0xF0, 0x04, 0xC9, 0xB8, 0xD0, 0xF4, 0x20, 0x55, 0xC5, 0x20, 0x24
+        .db 0xC1, 0x20, 0xC2, 0x00, 0xF0, 0x0C, 0xC9, 0xB8, 0xD0, 0x93, 0x20, 0xBC, 0x00, 0x20, 0x55, 0xC5
+        .db 0xD0, 0x8B, 0xA5, 0x11, 0x05, 0x12, 0xD0, 0x06, 0xA9, 0xFF, 0x85, 0x11, 0x85, 0x12, 0xA0, 0x01
+        .db 0x84, 0x60, 0x20, 0x92, 0xC6, 0xB1, 0xAA, 0xF0, 0x3E, 0x20, 0x14, 0xC3, 0xC8, 0xB1, 0xAA, 0xAA
+        .db 0xC8, 0xB1, 0xAA, 0xC5, 0x12, 0xD0, 0x04, 0xE4, 0x11, 0xF0, 0x02, 0xB0, 0x2A, 0x84, 0x97, 0x20
+        .db 0x82, 0xD8, 0xA9, 0x20, 0xA4, 0x97, 0x29, 0x7F, 0x20, 0xED, 0xC6, 0xC9, 0x22, 0xD0, 0x06, 0xA5
+        .db 0x60, 0x49, 0xFF, 0x85, 0x60, 0xC8, 0xB1, 0xAA, 0xD0, 0x0E, 0xA8, 0xB1, 0xAA, 0xAA, 0xC8, 0xB1
+        .db 0xAA, 0x86, 0xAA, 0x85, 0xAB, 0xD0, 0xB7, 0x60, 0x10, 0xDE, 0x24, 0x60, 0x30, 0xDA, 0xA2, 0xE3
+        .db 0x0A, 0x0A, 0x90, 0x02, 0xE8, 0x18, 0x69, 0x16, 0x90, 0x01, 0xE8, 0x85, 0x73, 0x86, 0x74, 0x84
+        .db 0x97, 0xA0, 0x00, 0xB1, 0x73, 0xAA, 0xC8, 0xB1, 0x73, 0xCA, 0xF0, 0xB8, 0x20, 0xED, 0xC6, 0xC8
+        .db 0xB1, 0x73, 0x48, 0xC8, 0xB1, 0x73, 0xA0, 0x00, 0x85, 0x74, 0x68, 0x85, 0x73, 0xB1, 0x73, 0xCA
+        .db 0xF0, 0xA2, 0x20, 0xED, 0xC6, 0xC8, 0xD0, 0xF5, 0xA9, 0x80, 0x85, 0x61, 0x20, 0xB4, 0xC5, 0x68
+        .db 0x68, 0xA9, 0x10, 0x20, 0x03, 0xBF, 0x20, 0x9D, 0xC4, 0x18, 0x98, 0x65, 0xC3, 0x48, 0xA5, 0xC4
+        .db 0x69, 0x00, 0x48, 0xA5, 0x88, 0x48, 0xA5, 0x87, 0x48, 0xA9, 0xAE, 0x20, 0xF1, 0xC9, 0x20, 0xD0
+        .db 0xC8, 0x20, 0xCD, 0xC8, 0xA5, 0xB0, 0x09, 0x7F, 0x25, 0xAD, 0x85, 0xAD, 0xA9, 0x97, 0xA0, 0xC2
+        .db 0x85, 0x71, 0x84, 0x72, 0x4C, 0x84, 0xC9, 0xA9, 0xE0, 0xA0, 0xDF, 0x20, 0x7D, 0xD6, 0x20, 0xC2
+        .db 0x00, 0xC9, 0xB3, 0xD0, 0x06, 0x20, 0xBC, 0x00, 0x20, 0xCD, 0xC8, 0x20, 0xE9, 0xD6, 0x85, 0xB0
+        .db 0x20, 0x79, 0xC9, 0xA5, 0x98, 0x48, 0xA5, 0x97, 0x48, 0xA9, 0x81, 0x48, 0x20, 0x14, 0xC3, 0xA5
+        .db 0xC3, 0xA4, 0xC4, 0xA6, 0x88, 0xE8, 0xF0, 0x04, 0x85, 0x8B, 0x84, 0x8C, 0xA0, 0x00, 0xB1, 0xC3
+        .db 0xF0, 0x07, 0xC9, 0x3A, 0xF0, 0x1D, 0x4C, 0x02, 0xCA, 0xA0, 0x02, 0xB1, 0xC3, 0x18, 0xF0, 0x56
+        .db 0xC8, 0xB1, 0xC3, 0x85, 0x87, 0xC8, 0xB1, 0xC3, 0x85, 0x88, 0x98, 0x65, 0xC3, 0x85, 0xC3, 0x90
+        .db 0x02, 0xE6, 0xC4, 0x20, 0xBC, 0x00, 0x20, 0xFC, 0xC2, 0x4C, 0xBC, 0xC2, 0xF0, 0x54, 0x0A, 0xB0
+        .db 0x03, 0x4C, 0xB4, 0xC5, 0xC9, 0x58, 0xB0, 0xCE, 0xA8, 0xB9, 0x08, 0xE0, 0x48, 0xB9, 0x07, 0xE0
+        .db 0x48, 0x4C, 0xBC, 0x00, 0x6C, 0x03, 0x04, 0xC9, 0x03, 0xB0, 0x01, 0x18, 0xD0, 0x67, 0xA5, 0xC4
+        .db 0x49, 0x04, 0xF0, 0x10, 0x49, 0x04, 0xA4, 0xC3, 0x84, 0x8B, 0x85, 0x8C, 0xA5, 0x87, 0xA4, 0x88
+        .db 0x85, 0x89, 0x84, 0x8A, 0x68, 0x68, 0x90, 0x07, 0xA9, 0xE7, 0xA0, 0xE5, 0x4C, 0x4F, 0xBF, 0x4C
+        .db 0x5A, 0xBF, 0xD0, 0x0F, 0x38, 0xA5, 0x79, 0xE9, 0x01, 0xA4, 0x7A, 0xB0, 0x01, 0x88, 0x85, 0x8F
+        .db 0x84, 0x90, 0x60, 0x20, 0x55, 0xC5, 0x20, 0xA0, 0xC4, 0xA5, 0x88, 0xC5, 0x12, 0xB0, 0x0B, 0x98
+        .db 0x38, 0x65, 0xC3, 0xA6, 0xC4, 0x90, 0x07, 0xE8, 0xB0, 0x04, 0xA5, 0x79, 0xA6, 0x7A, 0x20, 0x28
+        .db 0xC1, 0xB0, 0x03, 0x4C, 0x72, 0xC4, 0xA5, 0xAA, 0xE9, 0x01, 0xA4, 0xAB, 0xB0, 0xD0, 0x90, 0xCD
+        .db 0x20, 0x8C, 0xD2, 0x86, 0x0D, 0x60, 0xD0, 0xFD, 0xA4, 0x8C, 0xD0, 0x05, 0xA2, 0x1E, 0x4C, 0x3C
+        .db 0xBF, 0xA9, 0x93, 0x20, 0x14, 0xDD, 0xA9, 0x93, 0x20, 0x17, 0xDD, 0x84, 0xC4, 0xA5, 0x8B, 0x85
+        .db 0xC3, 0xA5, 0x89, 0xA4, 0x8A, 0x85, 0x87, 0x84, 0x88, 0x60, 0xD0, 0x03, 0x4C, 0x65, 0xC1, 0x20
+        .db 0x72, 0xC1, 0xF0, 0x2E, 0xA9, 0x05, 0x20, 0x03, 0xBF, 0xA5, 0xC4, 0x48, 0xA5, 0xC3, 0x48, 0xA5
+        .db 0x88, 0x48, 0xA5, 0x87, 0x48, 0xA9, 0x9D, 0x48, 0x20, 0xC2, 0x00, 0x4C, 0xBC, 0xC2, 0xA9, 0x05
+        .db 0x20, 0x03, 0xBF, 0xA5, 0xC4, 0x48, 0xA5, 0xC3, 0x48, 0xA5, 0x88, 0x48, 0xA5, 0x87, 0x48, 0xA9
+        .db 0x8D, 0x48, 0x20, 0xC2, 0x00, 0x20, 0xEB, 0xC3, 0x4C, 0xBC, 0xC2, 0x20, 0x55, 0xC5, 0x20, 0xA0
+        .db 0xC4, 0xA5, 0x88, 0xC5, 0x12, 0xB0, 0x0B, 0x98, 0x38, 0x65, 0xC3, 0xA6, 0xC4, 0x90, 0x07, 0xE8
+        .db 0xB0, 0x04, 0xA5, 0x79, 0xA6, 0x7A, 0x20, 0x28, 0xC1, 0x90, 0x67, 0xA5, 0xAA, 0xE9, 0x01, 0x85
+        .db 0xC3, 0xA5, 0xAB, 0xE9, 0x00, 0x85, 0xC4, 0x60, 0xA2, 0x22, 0x4C, 0x3C, 0xBF, 0xA8, 0xBA, 0xBD
+        .db 0x03, 0x01, 0xC9, 0x9D, 0xD0, 0xF2, 0xE8, 0xE8, 0x9A, 0x98, 0xF0, 0x20, 0xC9, 0x3A, 0xF0, 0x1C
+        .db 0xE9, 0xB4, 0xAA, 0xF0, 0x04, 0xCA, 0xD0, 0x62, 0xCA, 0x86, 0x98, 0x20, 0xBC, 0x00, 0x20, 0xE1
+        .db 0xC8, 0xA5, 0xAC, 0xF0, 0x02, 0xA9, 0xFF, 0xBA, 0x45, 0x98, 0xD0, 0x1A, 0xBD, 0x02, 0x01, 0x85
+        .db 0x87, 0xBD, 0x03, 0x01, 0x85, 0x88, 0xBD, 0x04, 0x01, 0x85, 0xC3, 0xBD, 0x05, 0x01, 0x85, 0xC4
+        .db 0x20, 0xC2, 0x00, 0x4C, 0xBC, 0xC2, 0xE8, 0xE8, 0xE8, 0xE8, 0xE8, 0x9A, 0x4C, 0x8C, 0xC4, 0xA2
+        .db 0x04, 0x2C, 0xA2, 0x0E, 0x4C, 0x3C, 0xBF, 0xD0, 0x9E, 0x68, 0x68, 0x68, 0xC9, 0x8D, 0xD0, 0xEF
+        .db 0x68, 0x85, 0x87, 0x68, 0x85, 0x88, 0x68, 0x85, 0xC3, 0x68, 0x85, 0xC4, 0x20, 0x9D, 0xC4, 0x98
+        .db 0x18, 0x65, 0xC3, 0x85, 0xC3, 0x90, 0x02, 0xE6, 0xC4, 0x60, 0x4C, 0x02, 0xCA, 0xA2, 0x3A, 0x2C
+        .db 0xA2, 0x00, 0xA0, 0x00, 0x84, 0x5C, 0x8A, 0x45, 0x5C, 0x85, 0x5C, 0xB1, 0xC3, 0xF0, 0xEA, 0xC5
+        .db 0x5C, 0xF0, 0xE6, 0xC8, 0xC9, 0x22, 0xD0, 0xF3, 0xF0, 0xEC, 0x20, 0xE1, 0xC8, 0x20, 0xC2, 0x00
+        .db 0xC9, 0xB1, 0xF0, 0x11, 0xC9, 0x89, 0xD0, 0xD2, 0xA6, 0xC3, 0xA4, 0xC4, 0x20, 0xBC, 0x00, 0xB0
+        .db 0xC9, 0x86, 0xC3, 0x84, 0xC4, 0xA5, 0xAC, 0xF0, 0x1B, 0x20, 0xBC, 0x00, 0xB0, 0x03, 0x4C, 0xEB
+        .db 0xC3, 0xC9, 0x90, 0xD0, 0x03, 0x4C, 0xFE, 0xC2, 0x20, 0xFC, 0xC2, 0xA0, 0x00, 0xB1, 0xC3, 0xC9
+        .db 0xAD, 0xF0, 0x99, 0x60, 0xA0, 0x00, 0xA2, 0x01, 0xC8, 0xB1, 0xC3, 0xF0, 0x0F, 0xC9, 0x8B, 0xD0
+        .db 0x03, 0xE8, 0xD0, 0xF4, 0xC9, 0xAD, 0xD0, 0xF0, 0xCA, 0xD0, 0xED, 0xC8, 0x98, 0x18, 0x65, 0xC3
+        .db 0x85, 0xC3, 0x90, 0x02, 0xE6, 0xC4, 0x20, 0xC2, 0x00, 0x90, 0xC3, 0x4C, 0xFC, 0xC2, 0x20, 0xA0
+        .db 0xC4, 0x4C, 0x8F, 0xC4, 0x4C, 0x02, 0xCA, 0xC9, 0xA9, 0xD0, 0x03, 0x4C, 0x38, 0xDD, 0xC9, 0xAA
+        .db 0xD0, 0x03, 0x4C, 0x3C, 0xDD, 0x20, 0x8C, 0xD2, 0x48, 0xC9, 0x8D, 0xF0, 0x04, 0xC9, 0x89, 0xD0
+        .db 0xE3, 0xC6, 0xAF, 0xD0, 0x04, 0x68, 0x4C, 0xFE, 0xC2, 0x20, 0xBC, 0x00, 0x20, 0x55, 0xC5, 0xC9
+        .db 0x2C, 0xF0, 0xEE, 0x68, 0x60, 0xA2, 0x00, 0x86, 0x11, 0x86, 0x12, 0xB0, 0xF7, 0xE0, 0x19, 0xA8
+        .db 0xB0, 0xDD, 0xE9, 0x2F, 0xA8, 0xA5, 0x11, 0x0A, 0x26, 0x12, 0x0A, 0x26, 0x12, 0x65, 0x11, 0x85
+        .db 0x11, 0x8A, 0x65, 0x12, 0x06, 0x11, 0x2A, 0xAA, 0x98, 0x65, 0x11, 0x85, 0x11, 0x90, 0x01, 0xE8
+        .db 0x20, 0xBC, 0x00, 0x4C, 0x59, 0xC5, 0xA9, 0xE4, 0x2C, 0xA9, 0xE0, 0x48, 0x20, 0xAA, 0xCB, 0xA6
+        .db 0x5F, 0x30, 0x1E, 0x85, 0x97, 0x84, 0x98, 0x20, 0x7D, 0xD6, 0x68, 0x48, 0xA0, 0xDF, 0x20, 0xBE
+        .db 0xD3, 0x20, 0xA3, 0xD6, 0x20, 0xC2, 0x00, 0xC9, 0x2C, 0xD0, 0xA8, 0x20, 0xBC, 0x00, 0x4C, 0x8C
+        .db 0xC5, 0x4C, 0xDC, 0xC8, 0x20, 0xAA, 0xCB, 0x85, 0x97, 0x84, 0x98, 0xA9, 0xC2, 0x20, 0xF1, 0xC9
+        .db 0xA5, 0x5F, 0x48, 0x20, 0xE1, 0xC8, 0x68, 0x2A, 0x20, 0xD3, 0xC8, 0xD0, 0x03, 0x4C, 0xA3, 0xD6
+        .db 0xA0, 0x02, 0xB1, 0xAE, 0xC5, 0x82, 0x90, 0x17, 0xD0, 0x07, 0x88, 0xB1, 0xAE, 0xC5, 0x81, 0x90
+        .db 0x0E, 0xA4, 0xAF, 0xC4, 0x7C, 0x90, 0x08, 0xD0, 0x0D, 0xA5, 0xAE, 0xC5, 0x7B, 0xB0, 0x07, 0xA5
+        .db 0xAE, 0xA4, 0xAF, 0x4C, 0x0C, 0xC6, 0xA0, 0x00, 0xB1, 0xAE, 0x20, 0x32, 0xCF, 0xA5, 0x9E, 0xA4
+        .db 0x9F, 0x85, 0xB8, 0x84, 0xB9, 0x20, 0x11, 0xD1, 0xA9, 0xAC, 0xA0, 0x00, 0x85, 0x9E, 0x84, 0x9F
+        .db 0x20, 0x73, 0xD1, 0xA0, 0x00, 0xB1, 0x9E, 0x91, 0x97, 0xC8, 0xB1, 0x9E, 0x91, 0x97, 0xC8, 0xB1
+        .db 0x9E, 0x91, 0x97, 0x60, 0x20, 0xAA, 0xCB, 0x85, 0x97, 0x84, 0x98, 0x20, 0x00, 0xDD, 0xA6, 0x5F
+        .db 0x30, 0x07, 0xA8, 0x20, 0x66, 0xCE, 0x4C, 0xA3, 0xD6, 0x48, 0xA9, 0x01, 0xB0, 0x01, 0x68, 0x20
+        .db 0x3A, 0xCF, 0xF0, 0x05, 0x68, 0xA0, 0x00, 0x91, 0xAD, 0x20, 0x85, 0xCF, 0x4C, 0xD0, 0xC5, 0x20
+        .db 0xD6, 0xC6, 0x20, 0xC2, 0x00, 0xF0, 0x3B, 0xC9, 0xAC, 0xF0, 0x56, 0xC9, 0xB0, 0xF0, 0x52, 0xC9
+        .db 0x2C, 0xF0, 0x38, 0xC9, 0x3B, 0xF0, 0x66, 0x20, 0xE1, 0xC8, 0x24, 0x5F, 0x30, 0xE1, 0x20, 0x95
+        .db 0xD8, 0x20, 0x44, 0xCF, 0xA0, 0x00, 0xA5, 0x0F, 0xF0, 0x0A, 0x38, 0xE5, 0x0E, 0xF1, 0xAE, 0xB0
+        .db 0x03, 0x20, 0x92, 0xC6, 0x20, 0xD6, 0xC6, 0xF0, 0xC9, 0xA9, 0x00, 0x9D, 0x0D, 0x04, 0xA2, 0x0D
+        .db 0xA0, 0x04, 0xA9, 0x0D, 0x20, 0xED, 0xC6, 0xA9, 0x0A, 0xD0, 0x52, 0xA5, 0x0E, 0xC5, 0x10, 0x90
+        .db 0x05, 0x20, 0x92, 0xC6, 0xD0, 0x27, 0x38, 0xE5, 0x64, 0xB0, 0xFC, 0x49, 0xFF, 0x69, 0x01, 0xD0
+        .db 0x12, 0x48, 0x20, 0x89, 0xD2, 0xC9, 0x29, 0xD0, 0x7B, 0x68, 0xC9, 0xAC, 0xD0, 0x06, 0x8A, 0xE5
+        .db 0x0E, 0x90, 0x0A, 0xAA, 0x8A, 0xF0, 0x06, 0x20, 0xE8, 0xC6, 0xCA, 0xD0, 0xFA, 0x20, 0xBC, 0x00
+        .db 0xD0, 0x85, 0x60, 0x20, 0x44, 0xCF, 0x20, 0x3E, 0xD1, 0xA0, 0x00, 0xAA, 0xF0, 0x49, 0xB1, 0x71
+        .db 0x20, 0xED, 0xC6, 0xC8, 0xCA, 0xD0, 0xF7, 0x60, 0xA9, 0x20, 0x2C, 0xA9, 0x3F, 0xC9, 0x20, 0x90
+        .db 0x19, 0x48, 0xA5, 0x0F, 0xD0, 0x0A, 0xA5, 0x0E, 0xE5, 0x64, 0xD0, 0x0B, 0x85, 0x0E, 0xF0, 0x07
+        .db 0xC5, 0x0E, 0xD0, 0x03, 0x20, 0x92, 0xC6, 0xE6, 0x0E, 0x68, 0x20, 0xED, 0xDE, 0xC9, 0x0D, 0xD0
+        .db 0x14, 0x86, 0x78, 0xA6, 0x0D, 0xF0, 0x0A, 0xA9, 0x00, 0x20, 0xED, 0xC6, 0xCA, 0xD0, 0xFA, 0xA9
+        .db 0x0D, 0x86, 0x0E, 0xA6, 0x78, 0x29, 0xFF, 0x60, 0xA5, 0x62, 0x10, 0x0B, 0xA5, 0x8D, 0xA4, 0x8E
+        .db 0x85, 0x87, 0x84, 0x88, 0x4C, 0x02, 0xCA, 0xA9, 0x1B, 0xA0, 0xE6, 0x20, 0xD3, 0xC6, 0xA5, 0x8B
+        .db 0xA4, 0x8C, 0x85, 0xC3, 0x84, 0xC4, 0x60, 0xC9, 0x22, 0xD0, 0x0B, 0x20, 0xBE, 0xC9, 0xA9, 0x3B
+        .db 0x20, 0xF1, 0xC9, 0x20, 0xD6, 0xC6, 0x20, 0x6A, 0xCE, 0x20, 0x40, 0xC0, 0xA9, 0x00, 0xCD, 0x0D
+        .db 0x04, 0xD0, 0x0A, 0x18, 0x4C, 0x2C, 0xC3, 0xA6, 0x8F, 0xA4, 0x90, 0xA9, 0x80, 0x85, 0x62, 0x86
+        .db 0x91, 0x84, 0x92, 0x20, 0xAA, 0xCB, 0x85, 0x97, 0x84, 0x98, 0xA5, 0xC3, 0xA4, 0xC4, 0x85, 0x11
+        .db 0x84, 0x12, 0xA6, 0x91, 0xA4, 0x92, 0x86, 0xC3, 0x84, 0xC4, 0x20, 0xC2, 0x00, 0xD0, 0x11, 0x24
+        .db 0x62, 0x30, 0x65, 0x20, 0xEB, 0xC6, 0x20, 0x40, 0xC0, 0x86, 0xC3, 0x84, 0xC4, 0x20, 0xC2, 0x00
+        .db 0x24, 0x5F, 0x10, 0x24, 0x85, 0x5B, 0xC9, 0x22, 0xF0, 0x07, 0xA9, 0x3A, 0x85, 0x5B, 0xA9, 0x2C
+        .db 0x18, 0x85, 0x5C, 0xA5, 0xC3, 0xA4, 0xC4, 0x69, 0x00, 0x90, 0x01, 0xC8, 0x20, 0x4A, 0xCF, 0x20
+        .db 0xCF, 0xD2, 0x20, 0xD0, 0xC5, 0x4C, 0xCE, 0xC7, 0x20, 0xA6, 0xD7, 0x20, 0xA3, 0xD6, 0x20, 0xC2
+        .db 0x00, 0xF0, 0x0A, 0xC9, 0x2C, 0xF0, 0x03, 0x4C, 0x28, 0xC7, 0x20, 0xBC, 0x00, 0xA5, 0xC3, 0xA4
+        .db 0xC4, 0x85, 0x91, 0x84, 0x92, 0xA5, 0x11, 0xA4, 0x12, 0x85, 0xC3, 0x84, 0xC4, 0x20, 0xC2, 0x00
+        .db 0xF0, 0x2C, 0x20, 0xFE, 0xC9, 0x4C, 0x73, 0xC7, 0x20, 0x9D, 0xC4, 0xC8, 0xAA, 0xD0, 0x12, 0xA2
+        .db 0x06, 0xC8, 0xB1, 0xC3, 0xF0, 0x73, 0xC8, 0xB1, 0xC3, 0x85, 0x8D, 0xC8, 0xB1, 0xC3, 0xC8, 0x85
+        .db 0x8E, 0xB1, 0xC3, 0xC8, 0xAA, 0x20, 0x8F, 0xC4, 0xE0, 0x83, 0xF0, 0x81, 0xD0, 0xDA, 0xA5, 0x91
+        .db 0xA4, 0x92, 0xA6, 0x62, 0x10, 0x03, 0x4C, 0x4E, 0xC3, 0xA0, 0x00, 0xB1, 0x91, 0xD0, 0x01, 0x60
+        .db 0xA9, 0x0A, 0xA0, 0xE6, 0x4C, 0xD3, 0xC6, 0xBA, 0xE8, 0xE8, 0xE8, 0xE8, 0xBD, 0x01, 0x01, 0xC9
+        .db 0x81, 0xD0, 0x21, 0xA5, 0x98, 0xD0, 0x0A, 0xBD, 0x02, 0x01, 0x85, 0x97, 0xBD, 0x03, 0x01, 0x85
+        .db 0x98, 0xDD, 0x03, 0x01, 0xD0, 0x07, 0xA5, 0x97, 0xDD, 0x02, 0x01, 0xF0, 0x07, 0x8A, 0x18, 0x69
+        .db 0x10, 0xAA, 0xD0, 0xD8, 0x60, 0xD0, 0x04, 0xA0, 0x00, 0xF0, 0x03, 0x20, 0xAA, 0xCB, 0x85, 0x97
+        .db 0x84, 0x98, 0x20, 0x37, 0xC8, 0xF0, 0x04, 0xA2, 0x00, 0xF0, 0x63, 0x9A, 0x8A, 0x38, 0xE9, 0xF7
+        .db 0x85, 0x73, 0x69, 0xFB, 0xA0, 0x01, 0x20, 0x7D, 0xD6, 0xBA, 0xBD, 0x08, 0x01, 0x85, 0xB0, 0xA5
+        .db 0x97, 0xA4, 0x98, 0x20, 0xBE, 0xD3, 0x20, 0xA3, 0xD6, 0xA0, 0x01, 0x20, 0x19, 0xD7, 0xBA, 0xDD
+        .db 0x08, 0x01, 0xF0, 0x17, 0xBD, 0x0D, 0x01, 0x85, 0x87, 0xBD, 0x0E, 0x01, 0x85, 0x88, 0xBD, 0x10
+        .db 0x01, 0x85, 0xC3, 0xBD, 0x0F, 0x01, 0x85, 0xC4, 0x4C, 0xBC, 0xC2, 0x8A, 0x69, 0x0F, 0xAA, 0x9A
+        .db 0x20, 0xC2, 0x00, 0xC9, 0x2C, 0xD0, 0xF1, 0x20, 0xBC, 0x00, 0x20, 0x6B, 0xC8, 0x20, 0xE1, 0xC8
+        .db 0x18, 0x24, 0x38, 0x24, 0x5F, 0x30, 0x03, 0xB0, 0x03, 0x60, 0xB0, 0xFD, 0xA2, 0x18, 0x4C, 0x3C
+        .db 0xBF, 0xA6, 0xC3, 0xD0, 0x02, 0xC6, 0xC4, 0xC6, 0xC3, 0xA9, 0x00, 0x48, 0xA9, 0x02, 0x20, 0x03
+        .db 0xBF, 0x20, 0xCD, 0xC9, 0xA9, 0x00, 0x85, 0x9B, 0x20, 0xC2, 0x00, 0x38, 0xE9, 0xC1, 0x90, 0x17
+        .db 0xC9, 0x03, 0xB0, 0x13, 0xC9, 0x01, 0x2A, 0x49, 0x01, 0x45, 0x9B, 0xC5, 0x9B, 0x90, 0x67, 0x85
+        .db 0x9B, 0x20, 0xBC, 0x00, 0x4C, 0xFB, 0xC8, 0xA6, 0x9B, 0xD0, 0x2C, 0xB0, 0x79, 0x69, 0x0A, 0x90
+        .db 0x75, 0xD0, 0x07, 0x24, 0x5F, 0x10, 0x03, 0x4C, 0xD4, 0xD0, 0x85, 0x71, 0x0A, 0x65, 0x71, 0xA8
+        .db 0x68, 0xD9, 0xEB, 0xE0, 0xB0, 0x65, 0x20, 0xD0, 0xC8, 0x48, 0x20, 0x62, 0xC9, 0x68, 0xA4, 0x99
+        .db 0x10, 0x19, 0xAA, 0xF0, 0x76, 0xD0, 0x5D, 0x26, 0x5F, 0x8A, 0x85, 0x5F, 0x2A, 0xA6, 0xC3, 0xD0
+        .db 0x02, 0xC6, 0xC4, 0xC6, 0xC3, 0xA0, 0x24, 0x85, 0x9B, 0xD0, 0xD5, 0xD9, 0xEB, 0xE0, 0xB0, 0x44
+        .db 0x90, 0xD7, 0xB9, 0xED, 0xE0, 0x48, 0xB9, 0xEC, 0xE0, 0x48, 0x20, 0x79, 0xC9, 0xA5, 0x9B, 0x48
+        .db 0xB9, 0xEB, 0xE0, 0x4C, 0xEB, 0xC8, 0x4C, 0x02, 0xCA, 0x68, 0x85, 0x71, 0xE6, 0x71, 0x68, 0x85
+        .db 0x72, 0xA5, 0xB0, 0x48, 0x20, 0xD9, 0xD6, 0xA5, 0xAF, 0x48, 0xA5, 0xAE, 0x48, 0xA5, 0xAD, 0x48
+        .db 0xA5, 0xAC, 0x48, 0x6C, 0x71, 0x00, 0xA0, 0xFF, 0x68, 0xF0, 0x20, 0xC9, 0x64, 0xF0, 0x03, 0x20
+        .db 0xD0, 0xC8, 0x84, 0x99, 0x68, 0x4A, 0x85, 0x63, 0x68, 0x85, 0xB3, 0x68, 0x85, 0xB4, 0x68, 0x85
+        .db 0xB5, 0x68, 0x85, 0xB6, 0x68, 0x85, 0xB7, 0x45, 0xB0, 0x85, 0xB8, 0xA5, 0xAC, 0x60, 0xA5, 0xC3
+        .db 0xA4, 0xC4, 0x69, 0x00, 0x90, 0x01, 0xC8, 0x20, 0x44, 0xCF, 0x4C, 0xCF, 0xD2, 0x20, 0xBC, 0x00
+        .db 0xB0, 0x03, 0x4C, 0xA6, 0xD7, 0xAA, 0x30, 0x2F, 0xC9, 0x24, 0xF0, 0xF6, 0xC9, 0x25, 0xF0, 0xF2
+        .db 0xC9, 0x2E, 0xF0, 0xEE, 0xC9, 0x22, 0xF0, 0xD6, 0xC9, 0x28, 0xD0, 0x4F, 0x20, 0xE9, 0xC8, 0xA9
+        .db 0x29, 0xA0, 0x00, 0xD1, 0xC3, 0xD0, 0x0B, 0x4C, 0xBC, 0x00, 0xA9, 0x28, 0xD0, 0xF3, 0xA9, 0x2C
+        .db 0xD0, 0xEF, 0xA2, 0x02, 0x4C, 0x3C, 0xBF, 0xC9, 0xB8, 0xF0, 0x29, 0xC9, 0xB7, 0xF0, 0xBE, 0xC9
+        .db 0xB2, 0xD0, 0x13, 0xA0, 0x21, 0xD0, 0x1F, 0x20, 0xA6, 0xCC, 0xA5, 0xAF, 0x49, 0xFF, 0xA8, 0xA5
+        .db 0xAE, 0x49, 0xFF, 0x4C, 0x59, 0xCE, 0xC9, 0xAF, 0xD0, 0x03, 0x4C, 0xB4, 0xCE, 0xE9, 0xC4, 0xB0
+        .db 0x19, 0x4C, 0x02, 0xCA, 0xA0, 0x1E, 0x68, 0x68, 0x4C, 0x3A, 0xC9, 0x20, 0xAA, 0xCB, 0x85, 0xAE
+        .db 0x84, 0xAF, 0xA6, 0x5F, 0x30, 0x03, 0x4C, 0x7D, 0xD6, 0x60, 0x0A, 0xA8, 0xB9, 0xA6, 0xE0, 0x48
+        .db 0xB9, 0xA5, 0xE0, 0x48, 0xB9, 0x60, 0xE0, 0xF0, 0x05, 0x48, 0xB9, 0x5F, 0xE0, 0x48, 0x60, 0x20
+        .db 0xEC, 0xC9, 0x4C, 0xD2, 0xC8, 0x20, 0xEC, 0xC9, 0x4C, 0xD0, 0xC8, 0x46, 0x5F, 0x4C, 0xBC, 0x00
+        .db 0x20, 0xE9, 0xC8, 0x20, 0xFE, 0xC9, 0x20, 0xD2, 0xC8, 0x68, 0xAA, 0x68, 0xA8, 0xA5, 0xAF, 0x48
+        .db 0xA5, 0xAE, 0x48, 0x98, 0x48, 0x8A, 0x48, 0x20, 0x8C, 0xD2, 0x8A, 0x60, 0x20, 0xE9, 0xC8, 0x20
+        .db 0xD0, 0xC8, 0xA5, 0xAC, 0xC9, 0x98, 0xB0, 0x20, 0x20, 0x50, 0xD7, 0xA2, 0x02, 0xB5, 0xAD, 0x95
+        .db 0x11, 0xCA, 0x10, 0xF9, 0x20, 0xC2, 0x00, 0xA2, 0x00, 0xC9, 0x29, 0xF0, 0x0A, 0x20, 0xDE, 0xD2
+        .db 0x20, 0xC2, 0x00, 0xC9, 0x29, 0xD0, 0x01, 0x60, 0x4C, 0x29, 0xCD, 0x20, 0xE2, 0xCA, 0x45, 0x5B
+        .db 0xA8, 0xA5, 0xAE, 0x45, 0x5C, 0x4C, 0x59, 0xCE, 0x20, 0xE2, 0xCA, 0x05, 0x5B, 0xA8, 0xA5, 0xAE
+        .db 0x05, 0x5C, 0x4C, 0x59, 0xCE, 0x20, 0xE2, 0xCA, 0x25, 0x5B, 0xA8, 0xA5, 0xAE, 0x25, 0x5C, 0x4C
+        .db 0x59, 0xCE, 0x20, 0xA6, 0xCC, 0xA5, 0xAE, 0x85, 0x5C, 0xA5, 0xAF, 0x85, 0x5B, 0x20, 0xC3, 0xD3
+        .db 0x20, 0xA6, 0xCC, 0xA5, 0xAF, 0x60, 0x20, 0xD3, 0xC8, 0xB0, 0x13, 0xA5, 0xB7, 0x09, 0x7F, 0x25
+        .db 0xB4, 0x85, 0xB4, 0xA9, 0xB3, 0xA0, 0x00, 0x20, 0x17, 0xD7, 0xAA, 0x4C, 0x3F, 0xCB, 0x46, 0x5F
+        .db 0xC6, 0x9B, 0x20, 0x3E, 0xD1, 0x85, 0xAC, 0x86, 0xAD, 0x84, 0xAE, 0xA5, 0xB5, 0xA4, 0xB6, 0x20
+        .db 0x42, 0xD1, 0x86, 0xB5, 0x84, 0xB6, 0xAA, 0x38, 0xE5, 0xAC, 0xF0, 0x08, 0xA9, 0x01, 0x90, 0x04
+        .db 0xA6, 0xAC, 0xA9, 0xFF, 0x85, 0xB0, 0xA0, 0xFF, 0xE8, 0xC8, 0xCA, 0xD0, 0x07, 0xA6, 0xB0, 0x30
+        .db 0x0F, 0x18, 0x90, 0x0C, 0xB1, 0xB5, 0xD1, 0xAD, 0xF0, 0xEF, 0xA2, 0xFF, 0xB0, 0x02, 0xA2, 0x01
+        .db 0xE8, 0x8A, 0x2A, 0x25, 0x63, 0xF0, 0x02, 0xA9, 0xFF, 0x4C, 0xFA, 0xD6, 0x20, 0xFE, 0xC9, 0xAA
+        .db 0x20, 0xAF, 0xCB, 0x20, 0xC2, 0x00, 0xD0, 0xF4, 0x60, 0x20, 0x9F, 0xCB, 0xA5, 0xAE, 0xA6, 0x78
+        .db 0xF0, 0x22, 0xE0, 0x10, 0xB0, 0x23, 0x06, 0xAF, 0x2A, 0xCA, 0xD0, 0xFA, 0xA4, 0xAF, 0x4C, 0x59
+        .db 0xCE, 0x20, 0x9F, 0xCB, 0xA5, 0xAE, 0xA6, 0x78, 0xF0, 0x0A, 0xE0, 0x10, 0xB0, 0x0B, 0x4A, 0x66
+        .db 0xAF, 0xCA, 0xD0, 0xFA, 0xA4, 0xAF, 0x4C, 0x59, 0xCE, 0xA9, 0x00, 0xA8, 0x4C, 0x59, 0xCE, 0x20
+        .db 0x8F, 0xD2, 0x86, 0x78, 0x20, 0xC3, 0xD3, 0x4C, 0xA6, 0xCC, 0xA2, 0x00, 0x20, 0xC2, 0x00, 0x86
+        .db 0x5E, 0x85, 0x93, 0x29, 0x7F, 0x20, 0x1E, 0xCC, 0xB0, 0x03, 0x4C, 0x02, 0xCA, 0xA2, 0x00, 0x86
+        .db 0x5F, 0x20, 0xBC, 0x00, 0x90, 0x05, 0x20, 0x1E, 0xCC, 0x90, 0x0B, 0xAA, 0x20, 0xBC, 0x00, 0x90
+        .db 0xFB, 0x20, 0x1E, 0xCC, 0xB0, 0xF6, 0xC9, 0x24, 0xD0, 0x0B, 0xA9, 0xFF, 0x85, 0x5F, 0x8A, 0x09
+        .db 0x80, 0xAA, 0x20, 0xBC, 0x00, 0x86, 0x94, 0x05, 0x61, 0xC9, 0x28, 0xD0, 0x03, 0x4C, 0xB8, 0xCC
+        .db 0xA9, 0x00, 0x85, 0x61, 0xA5, 0x7B, 0xA6, 0x7C, 0xA0, 0x00, 0x86, 0xAB, 0x85, 0xAA, 0xE4, 0x7E
+        .db 0xD0, 0x04, 0xC5, 0x7D, 0xF0, 0x2C, 0xA5, 0x93, 0xD1, 0xAA, 0xD0, 0x08, 0xA5, 0x94, 0xC8, 0xD1
+        .db 0xAA, 0xF0, 0x69, 0x88, 0x18, 0xA5, 0xAA, 0x69, 0x06, 0x90, 0xE1, 0xE8, 0xD0, 0xDC, 0xC9, 0x61
+        .db 0xB0, 0x0A, 0xC9, 0x41, 0x90, 0x05, 0xE9, 0x5B, 0x38, 0xE9, 0xA5, 0x60, 0xE9, 0x7B, 0x38, 0xE9
+        .db 0x85, 0x60, 0x68, 0x48, 0xC9, 0x3D, 0xD0, 0x05, 0xA9, 0xE1, 0xA0, 0xDF, 0x60, 0xA5, 0x7D, 0xA4
+        .db 0x7E, 0x85, 0xAA, 0x84, 0xAB, 0xA5, 0x7F, 0xA4, 0x80, 0x85, 0xA6, 0x84, 0xA7, 0x18, 0x69, 0x06
+        .db 0x90, 0x01, 0xC8, 0x85, 0xA4, 0x84, 0xA5, 0x20, 0xC1, 0xBE, 0xA5, 0xA4, 0xA4, 0xA5, 0xC8, 0x85
+        .db 0x7D, 0x84, 0x7E, 0xA0, 0x00, 0xA5, 0x93, 0x91, 0xAA, 0xC8, 0xA5, 0x94, 0x91, 0xAA, 0xA9, 0x00
+        .db 0xC8, 0x91, 0xAA, 0xC8, 0x91, 0xAA, 0xC8, 0x91, 0xAA, 0xC8, 0x91, 0xAA, 0xA5, 0xAA, 0x18, 0x69
+        .db 0x02, 0xA4, 0xAB, 0x90, 0x01, 0xC8, 0x85, 0x95, 0x84, 0x96, 0x60, 0xA5, 0x5D, 0x0A, 0x69, 0x05
+        .db 0x65, 0xAA, 0xA4, 0xAB, 0x90, 0x01, 0xC8, 0x85, 0xA4, 0x84, 0xA5, 0x60, 0x20, 0xBC, 0x00, 0x20
+        .db 0xCD, 0xC8, 0xA5, 0xB0, 0x30, 0x0D, 0xA5, 0xAC, 0xC9, 0x90, 0x90, 0x09, 0xA9, 0xE8, 0xA0, 0xDF
+        .db 0x20, 0x17, 0xD7, 0xD0, 0x74, 0x4C, 0x50, 0xD7, 0xA5, 0x5E, 0x48, 0xA5, 0x5F, 0x48, 0xA0, 0x00
+        .db 0x98, 0x48, 0xA5, 0x94, 0x48, 0xA5, 0x93, 0x48, 0x20, 0x9C, 0xCC, 0x68, 0x85, 0x93, 0x68, 0x85
+        .db 0x94, 0x68, 0xA8, 0xBA, 0xBD, 0x02, 0x01, 0x48, 0xBD, 0x01, 0x01, 0x48, 0xA5, 0xAE, 0x9D, 0x02
+        .db 0x01, 0xA5, 0xAF, 0x9D, 0x01, 0x01, 0xC8, 0x20, 0xC2, 0x00, 0xC9, 0x2C, 0xF0, 0xD2, 0x84, 0x5D
+        .db 0x20, 0xEF, 0xC9, 0x68, 0x85, 0x5F, 0x68, 0x85, 0x5E, 0xA6, 0x7D, 0xA5, 0x7E, 0x86, 0xAA, 0x85
+        .db 0xAB, 0xC5, 0x80, 0xD0, 0x04, 0xE4, 0x7F, 0xF0, 0x39, 0xA0, 0x00, 0xB1, 0xAA, 0xC8, 0xC5, 0x93
+        .db 0xD0, 0x06, 0xA5, 0x94, 0xD1, 0xAA, 0xF0, 0x16, 0xC8, 0xB1, 0xAA, 0x18, 0x65, 0xAA, 0xAA, 0xC8
+        .db 0xB1, 0xAA, 0x65, 0xAB, 0x90, 0xD7, 0xA2, 0x10, 0x2C, 0xA2, 0x08, 0x4C, 0x3C, 0xBF, 0xA2, 0x12
+        .db 0xA5, 0x5E, 0xD0, 0xF7, 0x20, 0x8B, 0xCC, 0xA5, 0x5D, 0xA0, 0x04, 0xD1, 0xAA, 0xD0, 0xE7, 0x4C
+        .db 0xC5, 0xCD, 0x20, 0x8B, 0xCC, 0x20, 0x0B, 0xBF, 0xA0, 0x00, 0x84, 0xBB, 0xA5, 0x93, 0x91, 0xAA
+        .db 0xC8, 0xA5, 0x94, 0x91, 0xAA, 0xA5, 0x5D, 0xA0, 0x04, 0x84, 0xBA, 0x91, 0xAA, 0x18, 0xA2, 0x0B
+        .db 0xA9, 0x00, 0x24, 0x5E, 0x50, 0x07, 0x68, 0x69, 0x01, 0xAA, 0x68, 0x69, 0x00, 0xC8, 0x91, 0xAA
+        .db 0xC8, 0x8A, 0x91, 0xAA, 0x20, 0x14, 0xCE, 0x86, 0xBA, 0x85, 0xBB, 0xA4, 0x71, 0xC6, 0x5D, 0xD0
+        .db 0xDD, 0x65, 0xA5, 0xB0, 0x5D, 0x85, 0xA5, 0xA8, 0x8A, 0x65, 0xA4, 0x90, 0x03, 0xC8, 0xF0, 0x52
+        .db 0x20, 0x0B, 0xBF, 0x85, 0x7F, 0x84, 0x80, 0xA9, 0x00, 0xE6, 0xBB, 0xA4, 0xBA, 0xF0, 0x05, 0x88
+        .db 0x91, 0xA4, 0xD0, 0xFB, 0xC6, 0xA5, 0xC6, 0xBB, 0xD0, 0xF5, 0xE6, 0xA5, 0x38, 0xA0, 0x02, 0xA5
+        .db 0x7F, 0xE5, 0xAA, 0x91, 0xAA, 0xC8, 0xA5, 0x80, 0xE5, 0xAB, 0x91, 0xAA, 0xA5, 0x5E, 0xD0, 0x53
+        .db 0xC8, 0xB1, 0xAA, 0x85, 0x5D, 0xA9, 0x00, 0x85, 0xBA, 0x85, 0xBB, 0xC8, 0x68, 0xAA, 0x85, 0xAE
+        .db 0x68, 0x85, 0xAF, 0xD1, 0xAA, 0x90, 0x0E, 0xD0, 0x06, 0xC8, 0x8A, 0xD1, 0xAA, 0x90, 0x07, 0x4C
+        .db 0x26, 0xCD, 0x4C, 0x3A, 0xBF, 0xC8, 0xA5, 0xBB, 0x05, 0xBA, 0xF0, 0x0A, 0x20, 0x14, 0xCE, 0x8A
+        .db 0x65, 0xAE, 0xAA, 0x98, 0xA4, 0x71, 0x65, 0xAF, 0x86, 0xBA, 0xC6, 0x5D, 0xD0, 0xCB, 0x06, 0xBA
+        .db 0x2A, 0x06, 0xBA, 0x2A, 0xA8, 0xA5, 0xBA, 0x65, 0xA4, 0x85, 0x95, 0x98, 0x65, 0xA5, 0x85, 0x96
+        .db 0xA8, 0xA5, 0x95, 0x60, 0x84, 0x71, 0xB1, 0xAA, 0x85, 0x76, 0x88, 0xB1, 0xAA, 0x85, 0x77, 0xA9
+        .db 0x10, 0x85, 0xA8, 0xA2, 0x00, 0xA0, 0x00, 0x8A, 0x0A, 0xAA, 0x98, 0x2A, 0xA8, 0xB0, 0xB3, 0x06
+        .db 0xBA, 0x26, 0xBB, 0x90, 0x0B, 0x18, 0x8A, 0x65, 0x76, 0xAA, 0x98, 0x65, 0x77, 0xA8, 0xB0, 0xA2
+        .db 0xC6, 0xA8, 0xD0, 0xE3, 0x60, 0xA5, 0x5F, 0x10, 0x03, 0x20, 0x3E, 0xD1, 0x20, 0xDF, 0xCF, 0x38
+        .db 0xA5, 0x81, 0xE5, 0x7F, 0xA8, 0xA5, 0x82, 0xE5, 0x80, 0x46, 0x5F, 0x85, 0xAD, 0x84, 0xAE, 0xA2
+        .db 0x90, 0x4C, 0x02, 0xD7, 0xA4, 0x0E, 0xA9, 0x00, 0xF0, 0xEF, 0xA6, 0x88, 0xE8, 0xD0, 0xA4, 0xA2
+        .db 0x16, 0x4C, 0x3C, 0xBF, 0x20, 0xA5, 0xCE, 0x85, 0x9C, 0x84, 0x9D, 0x20, 0x6A, 0xCE, 0x20, 0xFA
+        .db 0xC9, 0xA9, 0x80, 0x85, 0x61, 0x20, 0xAA, 0xCB, 0x20, 0xD0, 0xC8, 0x20, 0xEF, 0xC9, 0xA9, 0xC2
+        .db 0x20, 0xF1, 0xC9, 0xA5, 0x96, 0x48, 0xA5, 0x95, 0x48, 0xA5, 0xC4, 0x48, 0xA5, 0xC3, 0x48, 0x20
+        .db 0x8C, 0xC4, 0x4C, 0x14, 0xCF, 0xA9, 0xAF, 0x20, 0xF1, 0xC9, 0x09, 0x80, 0x85, 0x61, 0x20, 0xB1
+        .db 0xCB, 0x4C, 0xD0, 0xC8, 0x20, 0xA5, 0xCE, 0x48, 0x98, 0x48, 0x20, 0xFA, 0xC9, 0x20, 0xE1, 0xC8
+        .db 0x20, 0xEF, 0xC9, 0x20, 0xD0, 0xC8, 0x68, 0x85, 0x9D, 0x68, 0x85, 0x9C, 0xA2, 0x20, 0xA0, 0x03
+        .db 0xB1, 0x9C, 0xF0, 0x9D, 0x85, 0x96, 0x88, 0xB1, 0x9C, 0x85, 0x95, 0xAA, 0xC8, 0xB1, 0x95, 0x48
+        .db 0x88, 0x10, 0xFA, 0xA4, 0x96, 0x20, 0xA7, 0xD6, 0xA5, 0xC4, 0x48, 0xA5, 0xC3, 0x48, 0xB1, 0x9C
+        .db 0x85, 0xC3, 0xC8, 0xB1, 0x9C, 0x85, 0xC4, 0xA5, 0x96, 0x48, 0xA5, 0x95, 0x48, 0x20, 0xCD, 0xC8
+        .db 0x68, 0x85, 0x9C, 0x68, 0x85, 0x9D, 0x20, 0xC2, 0x00, 0xF0, 0x03, 0x4C, 0x02, 0xCA, 0x68, 0x85
+        .db 0xC3, 0x68, 0x85, 0xC4, 0xA0, 0x00, 0x68, 0x91, 0x9C, 0xC8, 0x68, 0x91, 0x9C, 0xC8, 0x68, 0x91
+        .db 0x9C, 0xC8, 0x68, 0x91, 0x9C, 0x60, 0x20, 0xD0, 0xC8, 0x20, 0x95, 0xD8, 0xA9, 0xF0, 0xA0, 0x00
+        .db 0xF0, 0x12, 0xA6, 0xAE, 0xA4, 0xAF, 0x86, 0x9E, 0x84, 0x9F, 0x20, 0xAD, 0xCF, 0x86, 0xAD, 0x84
+        .db 0xAE, 0x85, 0xAC, 0x60, 0xA2, 0x22, 0x86, 0x5B, 0x86, 0x5C, 0x85, 0xB8, 0x84, 0xB9, 0x85, 0xAD
+        .db 0x84, 0xAE, 0xA0, 0xFF, 0xC8, 0xB1, 0xB8, 0xF0, 0x0C, 0xC5, 0x5B, 0xF0, 0x04, 0xC5, 0x5C, 0xD0
+        .db 0xF3, 0xC9, 0x22, 0xF0, 0x01, 0x18, 0x84, 0xAC, 0x98, 0x65, 0xB8, 0x85, 0xBA, 0xA6, 0xB9, 0x90
+        .db 0x01, 0xE8, 0x86, 0xBB, 0xA5, 0xB9, 0xC9, 0x05, 0xB0, 0x0B, 0x98, 0x20, 0x32, 0xCF, 0xA6, 0xB8
+        .db 0xA4, 0xB9, 0x20, 0x1F, 0xD1, 0xA6, 0x65, 0xE0, 0x71, 0xD0, 0x05, 0xA2, 0x1C, 0x4C, 0x3C, 0xBF
+        .db 0xA5, 0xAC, 0x95, 0x00, 0xA5, 0xAD, 0x95, 0x01, 0xA5, 0xAE, 0x95, 0x02, 0xA0, 0x00, 0x86, 0xAE
+        .db 0x84, 0xAF, 0x88, 0x84, 0x5F, 0x86, 0x66, 0xE8, 0xE8, 0xE8, 0x86, 0x65, 0x60, 0x46, 0x60, 0x48
+        .db 0x49, 0xFF, 0x38, 0x65, 0x81, 0xA4, 0x82, 0xB0, 0x01, 0x88, 0xC4, 0x80, 0x90, 0x11, 0xD0, 0x04
+        .db 0xC5, 0x7F, 0x90, 0x0B, 0x85, 0x81, 0x84, 0x82, 0x85, 0x83, 0x84, 0x84, 0xAA, 0x68, 0x60, 0xA2
+        .db 0x0C, 0xA5, 0x60, 0x30, 0xB8, 0x20, 0xDF, 0xCF, 0xA9, 0x80, 0x85, 0x60, 0x68, 0xD0, 0xD0, 0xA6
+        .db 0x85, 0xA5, 0x86, 0x86, 0x81, 0x85, 0x82, 0xA0, 0x00, 0x84, 0x9D, 0xA5, 0x7F, 0xA6, 0x80, 0x85
+        .db 0xAA, 0x86, 0xAB, 0xA9, 0x68, 0x85, 0x71, 0x84, 0x72, 0xC5, 0x65, 0xF0, 0x05, 0x20, 0x63, 0xD0
+        .db 0xF0, 0xF7, 0x06, 0xA0, 0xA5, 0x7B, 0xA6, 0x7C, 0x85, 0x71, 0x86, 0x72, 0xE4, 0x7E, 0xD0, 0x04
+        .db 0xC5, 0x7D, 0xF0, 0x05, 0x20, 0x5D, 0xD0, 0xF0, 0xF3, 0x85, 0xA4, 0x86, 0xA5, 0xA9, 0x04, 0x85
+        .db 0xA0, 0xA5, 0xA4, 0xA6, 0xA5, 0xE4, 0x80, 0xD0, 0x04, 0xC5, 0x7F, 0xF0, 0x75, 0x85, 0x71, 0x86
+        .db 0x72, 0xA0, 0x02, 0xB1, 0x71, 0x65, 0xA4, 0x85, 0xA4, 0xC8, 0xB1, 0x71, 0x65, 0xA5, 0x85, 0xA5
+        .db 0xA0, 0x01, 0xB1, 0x71, 0x10, 0xDB, 0xA0, 0x04, 0xB1, 0x71, 0x0A, 0x69, 0x05, 0x20, 0x95, 0xD0
+        .db 0xE4, 0xA5, 0xD0, 0x04, 0xC5, 0xA4, 0xF0, 0xCD, 0x20, 0x63, 0xD0, 0xF0, 0xF3, 0xC8, 0xB1, 0x71
+        .db 0x10, 0x30, 0xC8, 0xB1, 0x71, 0xF0, 0x2B, 0xC8, 0xB1, 0x71, 0xAA, 0xC8, 0xB1, 0x71, 0xC5, 0x82
+        .db 0x90, 0x06, 0xD0, 0x1E, 0xE4, 0x81, 0xB0, 0x1A, 0xC5, 0xAB, 0x90, 0x17, 0xD0, 0x04, 0xE4, 0xAA
+        .db 0x90, 0x11, 0x86, 0xAA, 0x85, 0xAB, 0xA5, 0x71, 0xA6, 0x72, 0x85, 0x9C, 0x86, 0x9D, 0x88, 0x88
+        .db 0x84, 0xA2, 0x18, 0xA5, 0xA0, 0x65, 0x71, 0x85, 0x71, 0x90, 0x02, 0xE6, 0x72, 0xA6, 0x72, 0xA0
+        .db 0x00, 0x60, 0xC6, 0xA0, 0xA6, 0x9D, 0xF0, 0xF5, 0xA4, 0xA2, 0x18, 0xB1, 0x9C, 0x65, 0xAA, 0x85
+        .db 0xA6, 0xA5, 0xAB, 0x69, 0x00, 0x85, 0xA7, 0xA5, 0x81, 0xA6, 0x82, 0x85, 0xA4, 0x86, 0xA5, 0x20
+        .db 0xC8, 0xBE, 0xA4, 0xA2, 0xC8, 0xA5, 0xA4, 0x91, 0x9C, 0xAA, 0xE6, 0xA5, 0xA5, 0xA5, 0xC8, 0x91
+        .db 0x9C, 0x4C, 0xE3, 0xCF, 0xA5, 0xAF, 0x48, 0xA5, 0xAE, 0x48, 0x20, 0xCD, 0xC9, 0x20, 0xD2, 0xC8
+        .db 0x68, 0x85, 0xB8, 0x68, 0x85, 0xB9, 0xA0, 0x00, 0xB1, 0xB8, 0x18, 0x71, 0xAE, 0x90, 0x05, 0xA2
+        .db 0x1A, 0x4C, 0x3C, 0xBF, 0x20, 0x32, 0xCF, 0x20, 0x11, 0xD1, 0xA5, 0x9E, 0xA4, 0x9F, 0x20, 0x42
+        .db 0xD1, 0x20, 0x23, 0xD1, 0xA5, 0xB8, 0xA4, 0xB9, 0x20, 0x42, 0xD1, 0x20, 0x85, 0xCF, 0x4C, 0xF8
+        .db 0xC8, 0xA0, 0x00, 0xB1, 0xB8, 0x48, 0xC8, 0xB1, 0xB8, 0xAA, 0xC8, 0xB1, 0xB8, 0xA8, 0x68, 0x86
+        .db 0x71, 0x84, 0x72, 0xAA, 0xF0, 0x14, 0xA0, 0x00, 0xB1, 0x71, 0x91, 0x83, 0xC8, 0xCA, 0xD0, 0xF8
+        .db 0x98, 0x18, 0x65, 0x83, 0x85, 0x83, 0x90, 0x02, 0xE6, 0x84, 0x60, 0x20, 0xD2, 0xC8, 0xA5, 0xAE
+        .db 0xA4, 0xAF, 0x85, 0x71, 0x84, 0x72, 0x20, 0x73, 0xD1, 0x08, 0xA0, 0x00, 0xB1, 0x71, 0x48, 0xC8
+        .db 0xB1, 0x71, 0xAA, 0xC8, 0xB1, 0x71, 0xA8, 0x68, 0x28, 0xD0, 0x13, 0xC4, 0x82, 0xD0, 0x0F, 0xE4
+        .db 0x81, 0xD0, 0x0B, 0x48, 0x18, 0x65, 0x81, 0x85, 0x81, 0x90, 0x02, 0xE6, 0x82, 0x68, 0x86, 0x71
+        .db 0x84, 0x72, 0x60, 0xC4, 0x67, 0xD0, 0x0C, 0xC5, 0x66, 0xD0, 0x08, 0x85, 0x65, 0xE9, 0x03, 0x85
+        .db 0x66, 0xA0, 0x00, 0x60, 0x20, 0x8F, 0xD2, 0x8A, 0x48, 0xA9, 0x01, 0x20, 0x3A, 0xCF, 0x68, 0xA0
+        .db 0x00, 0x91, 0xAD, 0x4C, 0x85, 0xCF, 0x48, 0x20, 0xF7, 0xD1, 0xD1, 0x9E, 0x98, 0xF0, 0x09, 0x48
+        .db 0x20, 0xF7, 0xD1, 0x18, 0xF1, 0x9E, 0x49, 0xFF, 0x90, 0x04, 0xB1, 0x9E, 0xAA, 0x98, 0x48, 0x8A
+        .db 0x48, 0x20, 0x3A, 0xCF, 0xA5, 0x9E, 0xA4, 0x9F, 0x20, 0x42, 0xD1, 0x68, 0xA8, 0x68, 0x18, 0x65
+        .db 0x71, 0x85, 0x71, 0x90, 0x02, 0xE6, 0x72, 0x98, 0x20, 0x23, 0xD1, 0x4C, 0x85, 0xCF, 0x48, 0xA9
+        .db 0xFF, 0x85, 0xAF, 0x20, 0xC2, 0x00, 0xC9, 0x29, 0xF0, 0x06, 0x20, 0xFE, 0xC9, 0x20, 0x8C, 0xD2
+        .db 0x20, 0xF7, 0xD1, 0xCA, 0x8A, 0x48, 0x18, 0xA2, 0x00, 0xF1, 0x9E, 0xB0, 0xC2, 0x49, 0xFF, 0xC5
+        .db 0xAF, 0x90, 0xBD, 0xA5, 0xAF, 0xB0, 0xB9, 0x20, 0xEF, 0xC9, 0x68, 0x85, 0xA2, 0x68, 0x85, 0xA3
+        .db 0x68, 0xAA, 0x68, 0x85, 0x9E, 0x68, 0x85, 0x9F, 0xA0, 0x00, 0x8A, 0xF0, 0x79, 0xE6, 0xA2, 0x6C
+        .db 0xA2, 0x00, 0x20, 0x3B, 0xD1, 0x85, 0xAC, 0xA8, 0xF0, 0x38, 0x20, 0x3A, 0xCF, 0x86, 0xAD, 0x84
+        .db 0xAE, 0xA8, 0x88, 0xB1, 0x71, 0x20, 0x22, 0xCC, 0x90, 0x02, 0x09, 0x20, 0x91, 0x83, 0x98, 0xD0
+        .db 0xF1, 0xF0, 0x1F, 0x20, 0x3B, 0xD1, 0x85, 0xAC, 0xA8, 0xF0, 0x17, 0x20, 0x3A, 0xCF, 0x86, 0xAD
+        .db 0x84, 0xAE, 0xA8, 0x88, 0xB1, 0x71, 0x20, 0x1E, 0xCC, 0x90, 0x02, 0x29, 0xDF, 0x91, 0x83, 0x98
+        .db 0xD0, 0xF1, 0x4C, 0x85, 0xCF, 0x20, 0xBC, 0x00, 0x20, 0xAA, 0xCB, 0x20, 0xEF, 0xC9, 0x20, 0xD2
+        .db 0xC8, 0xA0, 0x02, 0xB1, 0x95, 0xAA, 0x88, 0xB1, 0x95, 0xA8, 0x8A, 0x4C, 0x59, 0xCE, 0x20, 0x74
+        .db 0xD2, 0x4C, 0x66, 0xCE, 0x20, 0x3B, 0xD1, 0xA8, 0x60, 0x20, 0x74, 0xD2, 0xF0, 0x08, 0xA0, 0x00
+        .db 0xB1, 0x71, 0xA8, 0x4C, 0x66, 0xCE, 0x4C, 0x29, 0xCD, 0x20, 0xBC, 0x00, 0x20, 0xCD, 0xC8, 0x20
+        .db 0xA2, 0xCC, 0xA4, 0xAE, 0xD0, 0xF0, 0xA6, 0xAF, 0x4C, 0xC2, 0x00, 0x20, 0x74, 0xD2, 0xD0, 0x03
+        .db 0x4C, 0x50, 0xD4, 0xA6, 0xC3, 0xA4, 0xC4, 0x86, 0xBA, 0x84, 0xBB, 0xA6, 0x71, 0x86, 0xC3, 0x18
+        .db 0x65, 0x71, 0x85, 0x73, 0xA5, 0x72, 0x85, 0xC4, 0x69, 0x00, 0x85, 0x74, 0xA0, 0x00, 0xB1, 0x73
+        .db 0x48, 0x98, 0x91, 0x73, 0x20, 0xC2, 0x00, 0x20, 0xA6, 0xD7, 0x68, 0xA0, 0x00, 0x91, 0x73, 0xA6
+        .db 0xBA, 0xA4, 0xBB, 0x86, 0xC3, 0x84, 0xC4, 0x60, 0x20, 0xCD, 0xC8, 0x20, 0xF1, 0xD2, 0x20, 0xFE
+        .db 0xC9, 0xA5, 0x12, 0x48, 0xA5, 0x11, 0x48, 0x20, 0x8C, 0xD2, 0x68, 0x85, 0x11, 0x68, 0x85, 0x12
+        .db 0x60, 0xA5, 0xAC, 0xC9, 0x98, 0xB0, 0x8F, 0x20, 0x50, 0xD7, 0xA5, 0xAE, 0xA4, 0xAF, 0x84, 0x11
+        .db 0x85, 0x12, 0x60, 0x20, 0xF1, 0xD2, 0xA2, 0x00, 0xA1, 0x11, 0xA8, 0x4C, 0x66, 0xCE, 0x20, 0xD8
+        .db 0xD2, 0x8A, 0xA2, 0x00, 0x81, 0x11, 0x60, 0x20, 0xF1, 0xD2, 0xA2, 0x00, 0xA1, 0x11, 0xA8, 0xE6
+        .db 0x11, 0xD0, 0x02, 0xE6, 0x12, 0xA1, 0x11, 0x4C, 0x59, 0xCE, 0x20, 0xCD, 0xC8, 0x20, 0xF1, 0xD2
+        .db 0x84, 0x97, 0x85, 0x98, 0x20, 0xFE, 0xC9, 0x20, 0xCD, 0xC8, 0x20, 0xF1, 0xD2, 0x98, 0xA2, 0x00
+        .db 0x81, 0x97, 0xE6, 0x97, 0xD0, 0x02, 0xE6, 0x98, 0xA5, 0x12, 0x81, 0x97, 0x4C, 0xC2, 0x00, 0x20
+        .db 0xAA, 0xCB, 0x85, 0x97, 0x84, 0x98, 0xA5, 0x5F, 0x48, 0x20, 0xFE, 0xC9, 0x20, 0xAA, 0xCB, 0x68
+        .db 0x45, 0x5F, 0x10, 0x10, 0xA0, 0x03, 0xB1, 0x97, 0xAA, 0xB1, 0x95, 0x91, 0x97, 0x8A, 0x91, 0x95
+        .db 0x88, 0x10, 0xF3, 0x60, 0x4C, 0xDC, 0xC8, 0x20, 0xCD, 0xC8, 0x20, 0xF1, 0xD2, 0xA9, 0xD3, 0x48
+        .db 0xA9, 0x85, 0x48, 0x6C, 0x11, 0x00, 0x4C, 0xC2, 0x00, 0x20, 0xD8, 0xD2, 0x86, 0x97, 0xA2, 0x00
+        .db 0x20, 0xC2, 0x00, 0xF0, 0x03, 0x20, 0xDE, 0xD2, 0x86, 0x98, 0xB1, 0x11, 0x45, 0x98, 0x25, 0x97
+        .db 0xF0, 0xF8, 0x60, 0x20, 0x8B, 0xD5, 0xA5, 0xB0, 0x49, 0xFF, 0x85, 0xB0, 0x45, 0xB7, 0x85, 0xB8
+        .db 0xA5, 0xAC, 0x4C, 0xC1, 0xD3, 0x20, 0xDA, 0xD4, 0x90, 0x4D, 0xA9, 0xE9, 0xA0, 0xDF, 0x20, 0x8B
+        .db 0xD5, 0xD0, 0x10, 0xA5, 0xB7, 0x85, 0xB0, 0xA2, 0x04, 0xB5, 0xB2, 0x95, 0xAB, 0xCA, 0xD0, 0xF9
+        .db 0x86, 0xB9, 0x60, 0xA6, 0xB9, 0x86, 0xA3, 0xA2, 0xB3, 0xA5, 0xB3, 0xA8, 0xF0, 0xC4, 0x38, 0xE5
+        .db 0xAC, 0xF0, 0x24, 0x90, 0x12, 0x84, 0xAC, 0xA4, 0xB7, 0x84, 0xB0, 0x49, 0xFF, 0x69, 0x00, 0xA0
+        .db 0x00, 0x84, 0xA3, 0xA2, 0xAC, 0xD0, 0x04, 0xA0, 0x00, 0x84, 0xB9, 0xC9, 0xF9, 0x30, 0xB6, 0xA8
+        .db 0xA5, 0xB9, 0x56, 0x01, 0x20, 0xF1, 0xD4, 0x24, 0xB8, 0x10, 0x4C, 0xA0, 0xAC, 0xE0, 0xB3, 0xF0
+        .db 0x02, 0xA0, 0xB3, 0x38, 0x49, 0xFF, 0x65, 0xA3, 0x85, 0xB9, 0xB9, 0x03, 0x00, 0xF5, 0x03, 0x85
+        .db 0xAF, 0xB9, 0x02, 0x00, 0xF5, 0x02, 0x85, 0xAE, 0xB9, 0x01, 0x00, 0xF5, 0x01, 0x85, 0xAD, 0xB0
+        .db 0x03, 0x20, 0x96, 0xD4, 0xA0, 0x00, 0x98, 0x18, 0xA6, 0xAD, 0xD0, 0x3E, 0xA6, 0xAE, 0x86, 0xAD
+        .db 0xA6, 0xAF, 0x86, 0xAE, 0xA6, 0xB9, 0x86, 0xAF, 0x84, 0xB9, 0x69, 0x08, 0xC9, 0x18, 0xD0, 0xE8
+        .db 0xA9, 0x00, 0x85, 0xAC, 0x85, 0xB0, 0x60, 0x65, 0xA3, 0x85, 0xB9, 0xA5, 0xAF, 0x65, 0xB6, 0x85
+        .db 0xAF, 0xA5, 0xAE, 0x65, 0xB5, 0x85, 0xAE, 0xA5, 0xAD, 0x65, 0xB4, 0x85, 0xAD, 0xB0, 0x1A, 0x60
+        .db 0x69, 0x01, 0x06, 0xB9, 0x26, 0xAF, 0x26, 0xAE, 0x26, 0xAD, 0x10, 0xF4, 0x38, 0xE5, 0xAC, 0xB0
+        .db 0xCF, 0x49, 0xFF, 0x69, 0x01, 0x85, 0xAC, 0x90, 0x0C, 0xE6, 0xAC, 0xF0, 0x36, 0x66, 0xAD, 0x66
+        .db 0xAE, 0x66, 0xAF, 0x66, 0xB9, 0x60, 0xA5, 0xB0, 0x49, 0xFF, 0x85, 0xB0, 0xA5, 0xAD, 0x49, 0xFF
+        .db 0x85, 0xAD, 0xA5, 0xAE, 0x49, 0xFF, 0x85, 0xAE, 0xA5, 0xAF, 0x49, 0xFF, 0x85, 0xAF, 0xA5, 0xB9
+        .db 0x49, 0xFF, 0x85, 0xB9, 0xE6, 0xB9, 0xD0, 0x0A, 0xE6, 0xAF, 0xD0, 0x06, 0xE6, 0xAE, 0xD0, 0x02
+        .db 0xE6, 0xAD, 0x60, 0xA2, 0x0A, 0x4C, 0x3C, 0xBF, 0xA2, 0x74, 0xB4, 0x03, 0x84, 0xB9, 0xB4, 0x02
+        .db 0x94, 0x03, 0xB4, 0x01, 0x94, 0x02, 0xA4, 0xB2, 0x94, 0x01, 0x69, 0x08, 0x30, 0xEC, 0xF0, 0xEA
+        .db 0xE9, 0x08, 0xA8, 0xA5, 0xB9, 0xB0, 0x12, 0x16, 0x01, 0x90, 0x02, 0xF6, 0x01, 0x76, 0x01, 0x76
+        .db 0x01, 0x76, 0x02, 0x76, 0x03, 0x6A, 0xC8, 0xD0, 0xEE, 0x18, 0x60, 0x20, 0xE9, 0xD6, 0xF0, 0x02
+        .db 0x10, 0x03, 0x4C, 0x29, 0xCD, 0xA5, 0xAC, 0xE9, 0x7F, 0x48, 0xA9, 0x80, 0x85, 0xAC, 0xA9, 0x69
+        .db 0xA0, 0xDF, 0x20, 0xBE, 0xD3, 0xA9, 0x6D, 0xA0, 0xDF, 0x20, 0x01, 0xD6, 0xA9, 0xE0, 0xA0, 0xDF
+        .db 0x20, 0xA3, 0xD3, 0xA9, 0x5C, 0xA0, 0xDF, 0x20, 0x51, 0xDA, 0xA9, 0x71, 0xA0, 0xDF, 0x20, 0xBE
+        .db 0xD3, 0x68, 0x20, 0x45, 0xD8, 0xA9, 0x75, 0xA0, 0xDF, 0x20, 0x8B, 0xD5, 0xF0, 0x4C, 0x20, 0xB1
+        .db 0xD5, 0xA9, 0x00, 0x85, 0x75, 0x85, 0x76, 0x85, 0x77, 0xA5, 0xB9, 0x20, 0x60, 0xD5, 0xA5, 0xAF
+        .db 0x20, 0x60, 0xD5, 0xA5, 0xAE, 0x20, 0x60, 0xD5, 0xA5, 0xAD, 0x20, 0x65, 0xD5, 0x4C, 0x6E, 0xD6
+        .db 0xD0, 0x03, 0x4C, 0xC8, 0xD4, 0x4A, 0x09, 0x80, 0xA8, 0x90, 0x13, 0x18, 0xA5, 0x77, 0x65, 0xB6
+        .db 0x85, 0x77, 0xA5, 0x76, 0x65, 0xB5, 0x85, 0x76, 0xA5, 0x75, 0x65, 0xB4, 0x85, 0x75, 0x66, 0x75
+        .db 0x66, 0x76, 0x66, 0x77, 0x66, 0xB9, 0x98, 0x4A, 0xD0, 0xDE, 0x60, 0x85, 0x71, 0x84, 0x72, 0xA0
+        .db 0x03, 0xB1, 0x71, 0x85, 0xB6, 0x88, 0xB1, 0x71, 0x85, 0xB5, 0x88, 0xB1, 0x71, 0x85, 0xB7, 0x45
+        .db 0xB0, 0x85, 0xB8, 0xA5, 0xB7, 0x09, 0x80, 0x85, 0xB4, 0x88, 0xB1, 0x71, 0x85, 0xB3, 0xA5, 0xAC
+        .db 0x60, 0xA5, 0xB3, 0xF0, 0x1D, 0x18, 0x65, 0xAC, 0x90, 0x04, 0x30, 0x31, 0x18, 0x2C, 0x10, 0x12
+        .db 0x69, 0x80, 0x85, 0xAC, 0xD0, 0x03, 0x4C, 0x54, 0xD4, 0xA5, 0xB8, 0x85, 0xB0, 0x60, 0xA5, 0xB0
+        .db 0x10, 0x1B, 0x68, 0x68, 0x4C, 0x50, 0xD4, 0x20, 0xCA, 0xD6, 0xAA, 0xF0, 0xF0, 0x18, 0x69, 0x02
+        .db 0xB0, 0x0B, 0xA2, 0x00, 0x86, 0xB8, 0x20, 0xDB, 0xD3, 0xE6, 0xAC, 0xD0, 0xE0, 0x4C, 0xC3, 0xD4
+        .db 0x20, 0xCA, 0xD6, 0xA9, 0xF1, 0xA0, 0xDF, 0xA2, 0x00, 0x86, 0xB8, 0x20, 0x7D, 0xD6, 0x4C, 0x04
+        .db 0xD6, 0x20, 0x8B, 0xD5, 0xF0, 0x63, 0x20, 0xD9, 0xD6, 0xA9, 0x00, 0x38, 0xE5, 0xAC, 0x85, 0xAC
+        .db 0x20, 0xB1, 0xD5, 0xE6, 0xAC, 0xF0, 0xD6, 0xA2, 0xFF, 0xA9, 0x01, 0xA4, 0xB4, 0xC4, 0xAD, 0xD0
+        .db 0x0A, 0xA4, 0xB5, 0xC4, 0xAE, 0xD0, 0x04, 0xA4, 0xB6, 0xC4, 0xAF, 0x08, 0x2A, 0x90, 0x0E, 0xA0
+        .db 0x01, 0xE8, 0xE0, 0x02, 0x30, 0x04, 0xD0, 0x28, 0xA0, 0x40, 0x95, 0x75, 0x98, 0x28, 0x90, 0x14
+        .db 0xA8, 0xA5, 0xB6, 0xE5, 0xAF, 0x85, 0xB6, 0xA5, 0xB5, 0xE5, 0xAE, 0x85, 0xB5, 0xA5, 0xB4, 0xE5
+        .db 0xAD, 0x85, 0xB4, 0x98, 0x06, 0xB6, 0x26, 0xB5, 0x26, 0xB4, 0xB0, 0xCF, 0x30, 0xBD, 0x10, 0xCB
+        .db 0x4A, 0x6A, 0x6A, 0x85, 0xB9, 0x28, 0x4C, 0x6E, 0xD6, 0xA2, 0x14, 0x4C, 0x3C, 0xBF, 0xA5, 0x75
+        .db 0x85, 0xAD, 0xA5, 0x76, 0x85, 0xAE, 0xA5, 0x77, 0x85, 0xAF, 0x4C, 0x34, 0xD4, 0x85, 0x71, 0x84
+        .db 0x72, 0xA0, 0x03, 0xB1, 0x71, 0x85, 0xAF, 0x88, 0xB1, 0x71, 0x85, 0xAE, 0x88, 0xB1, 0x71, 0x85
+        .db 0xB0, 0x09, 0x80, 0x85, 0xAD, 0x88, 0xB1, 0x71, 0x85, 0xAC, 0x84, 0xB9, 0x60, 0xA2, 0xA4, 0xA0
+        .db 0x00, 0xF0, 0x04, 0xA6, 0x97, 0xA4, 0x98, 0x20, 0xD9, 0xD6, 0x86, 0x71, 0x84, 0x72, 0xA0, 0x03
+        .db 0xA5, 0xAF, 0x91, 0x71, 0x88, 0xA5, 0xAE, 0x91, 0x71, 0x88, 0xA5, 0xB0, 0x09, 0x7F, 0x25, 0xAD
+        .db 0x91, 0x71, 0x88, 0xA5, 0xAC, 0x91, 0x71, 0x84, 0xB9, 0x60, 0x20, 0xD9, 0xD6, 0xA2, 0x05, 0xB5
+        .db 0xAB, 0x95, 0xB2, 0xCA, 0xD0, 0xF9, 0x86, 0xB9, 0x60, 0xA5, 0xAC, 0xF0, 0xFB, 0x06, 0xB9, 0x90
+        .db 0xF7, 0x20, 0xB8, 0xD4, 0xD0, 0xF2, 0x4C, 0x89, 0xD4, 0xA5, 0xAC, 0xF0, 0x09, 0xA5, 0xB0, 0x2A
+        .db 0xA9, 0xFF, 0xB0, 0x02, 0xA9, 0x01, 0x60, 0x20, 0xE9, 0xD6, 0x85, 0xAD, 0xA9, 0x00, 0x85, 0xAE
+        .db 0xA2, 0x88, 0xA5, 0xAD, 0x49, 0xFF, 0x2A, 0xA9, 0x00, 0x85, 0xAF, 0x86, 0xAC, 0x85, 0xB9, 0x85
+        .db 0xB0, 0x4C, 0x2F, 0xD4, 0x46, 0xB0, 0x60, 0x85, 0x73, 0x84, 0x74, 0xA0, 0x00, 0xB1, 0x73, 0xC8
+        .db 0xAA, 0xF0, 0xC6, 0xB1, 0x73, 0x45, 0xB0, 0x30, 0xC4, 0xE4, 0xAC, 0xD0, 0x1A, 0xB1, 0x73, 0x09
+        .db 0x80, 0xC5, 0xAD, 0xD0, 0x12, 0xC8, 0xB1, 0x73, 0xC5, 0xAE, 0xD0, 0x0B, 0xC8, 0xA9, 0x7F, 0xC5
+        .db 0xB9, 0xB1, 0x73, 0xE5, 0xAF, 0xF0, 0x28, 0xA5, 0xB0, 0x90, 0x02, 0x49, 0xFF, 0x4C, 0xEF, 0xD6
+        .db 0xA5, 0xAC, 0xF0, 0x4A, 0x38, 0xE9, 0x98, 0x24, 0xB0, 0x10, 0x09, 0xAA, 0xA9, 0xFF, 0x85, 0xB2
+        .db 0x20, 0x9C, 0xD4, 0x8A, 0xA2, 0xAC, 0xC9, 0xF9, 0x10, 0x06, 0x20, 0xDA, 0xD4, 0x84, 0xB2, 0x60
+        .db 0xA8, 0xA5, 0xB0, 0x29, 0x80, 0x46, 0xAD, 0x05, 0xAD, 0x85, 0xAD, 0x20, 0xF1, 0xD4, 0x84, 0xB2
+        .db 0x60, 0xA5, 0xAC, 0xC9, 0x98, 0xB0, 0x1E, 0x20, 0x50, 0xD7, 0x84, 0xB9, 0xA5, 0xB0, 0x84, 0xB0
+        .db 0x49, 0x80, 0x2A, 0xA9, 0x98, 0x85, 0xAC, 0xA5, 0xAF, 0x85, 0x5B, 0x4C, 0x2F, 0xD4, 0x85, 0xAD
+        .db 0x85, 0xAE, 0x85, 0xAF, 0xA8, 0x60, 0xA0, 0x00, 0x84, 0x5F, 0xA2, 0x09, 0x94, 0xA8, 0xCA, 0x10
+        .db 0xFB, 0x90, 0x7F, 0xC9, 0x2D, 0xD0, 0x04, 0x86, 0xB1, 0xF0, 0x04, 0xC9, 0x2B, 0xD0, 0x05, 0x20
+        .db 0xBC, 0x00, 0x90, 0x6E, 0xC9, 0x24, 0xD0, 0x03, 0x4C, 0x6E, 0xDC, 0xC9, 0x25, 0xD0, 0x08, 0x4C
+        .db 0x9C, 0xDC, 0x20, 0xBC, 0x00, 0x90, 0x5B, 0xC9, 0x2E, 0xF0, 0x2E, 0xC9, 0x45, 0xD0, 0x30, 0x20
+        .db 0xBC, 0x00, 0x90, 0x17, 0xC9, 0xB8, 0xF0, 0x0E, 0xC9, 0x2D, 0xF0, 0x0A, 0xC9, 0xB7, 0xF0, 0x08
+        .db 0xC9, 0x2B, 0xF0, 0x04, 0xD0, 0x07, 0x66, 0xAB, 0x20, 0xBC, 0x00, 0x90, 0x5B, 0x24, 0xAB, 0x10
+        .db 0x0E, 0xA9, 0x00, 0x38, 0xE5, 0xA9, 0x4C, 0x11, 0xD8, 0x66, 0xAA, 0x24, 0xAA, 0x50, 0xC3, 0xA5
+        .db 0xA9, 0x38, 0xE5, 0xA8, 0x85, 0xA9, 0xF0, 0x12, 0x10, 0x09, 0x20, 0xF0, 0xD5, 0xE6, 0xA9, 0xD0
+        .db 0xF9, 0xF0, 0x07, 0x20, 0xD7, 0xD5, 0xC6, 0xA9, 0xD0, 0xF9, 0xA5, 0xB1, 0x30, 0x01, 0x60, 0x4C
+        .db 0xF4, 0xD9, 0x48, 0x24, 0xAA, 0x10, 0x02, 0xE6, 0xA8, 0x20, 0xD7, 0xD5, 0x68, 0x29, 0x0F, 0x20
+        .db 0x45, 0xD8, 0x4C, 0xD2, 0xD7, 0x48, 0x20, 0xCA, 0xD6, 0x68, 0x20, 0xFA, 0xD6, 0xA5, 0xB7, 0x45
+        .db 0xB0, 0x85, 0xB8, 0xA6, 0xAC, 0x4C, 0xC1, 0xD3, 0xA5, 0xA9, 0xC9, 0x0A, 0x90, 0x09, 0xA9, 0x64
+        .db 0x24, 0xAB, 0x30, 0x0E, 0x4C, 0xC3, 0xD4, 0x0A, 0x0A, 0x65, 0xA9, 0x0A, 0xA0, 0x00, 0x71, 0xC3
+        .db 0xE9, 0x2F, 0x85, 0xA9, 0x4C, 0xF8, 0xD7, 0xA9, 0xF6, 0xA0, 0xE5, 0x20, 0xD3, 0xC6, 0xA5, 0x88
+        .db 0xA6, 0x87, 0x85, 0xAD, 0x86, 0xAE, 0xA2, 0x90, 0x38, 0x20, 0x07, 0xD7, 0xA0, 0x00, 0x98, 0x20
+        .db 0xA2, 0xD8, 0x4C, 0xD3, 0xC6, 0xA0, 0x01, 0xA9, 0x20, 0x24, 0xB0, 0x10, 0x02, 0xA9, 0x2D, 0x99
+        .db 0xEF, 0x00, 0x85, 0xB0, 0x84, 0xBA, 0xC8, 0xA6, 0xAC, 0xD0, 0x05, 0xA9, 0x30, 0x4C, 0xAE, 0xD9
+        .db 0xA9, 0x00, 0xE0, 0x81, 0xB0, 0x09, 0xA9, 0x81, 0xA0, 0xDF, 0x20, 0x39, 0xD5, 0xA9, 0xFA, 0x85
+        .db 0xA8, 0xA9, 0x7D, 0xA0, 0xDF, 0x20, 0x17, 0xD7, 0xF0, 0x1E, 0x10, 0x12, 0xA9, 0x79, 0xA0, 0xDF
+        .db 0x20, 0x17, 0xD7, 0xF0, 0x02, 0x10, 0x0E, 0x20, 0xD7, 0xD5, 0xC6, 0xA8, 0xD0, 0xEE, 0x20, 0xF0
+        .db 0xD5, 0xE6, 0xA8, 0xD0, 0xDC, 0x20, 0xBA, 0xD3, 0x20, 0x50, 0xD7, 0xA2, 0x01, 0xA5, 0xA8, 0x18
+        .db 0x69, 0x07, 0x30, 0x09, 0xC9, 0x08, 0xB0, 0x06, 0x69, 0xFF, 0xAA, 0xA9, 0x02, 0x38, 0xE9, 0x02
+        .db 0x85, 0xA9, 0x86, 0xA8, 0x8A, 0xF0, 0x02, 0x10, 0x13, 0xA4, 0xBA, 0xA9, 0x2E, 0xC8, 0x99, 0xEF
+        .db 0x00, 0x8A, 0xF0, 0x06, 0xA9, 0x30, 0xC8, 0x99, 0xEF, 0x00, 0x84, 0xBA, 0xA0, 0x00, 0xA2, 0x80
+        .db 0xA5, 0xAF, 0x18, 0x79, 0xF7, 0xDF, 0x85, 0xAF, 0xA5, 0xAE, 0x79, 0xF6, 0xDF, 0x85, 0xAE, 0xA5
+        .db 0xAD, 0x79, 0xF5, 0xDF, 0x85, 0xAD, 0xE8, 0xB0, 0x04, 0x10, 0xE5, 0x30, 0x02, 0x30, 0xE1, 0x8A
+        .db 0x90, 0x04, 0x49, 0xFF, 0x69, 0x0A, 0x69, 0x2F, 0xC8, 0xC8, 0xC8, 0x84, 0x95, 0xA4, 0xBA, 0xC8
+        .db 0xAA, 0x29, 0x7F, 0x99, 0xEF, 0x00, 0xC6, 0xA8, 0xD0, 0x06, 0xA9, 0x2E, 0xC8, 0x99, 0xEF, 0x00
+        .db 0x84, 0xBA, 0xA4, 0x95, 0x8A, 0x49, 0xFF, 0x29, 0x80, 0xAA, 0xC0, 0x12, 0xD0, 0xB2, 0xA4, 0xBA
+        .db 0xB9, 0xEF, 0x00, 0x88, 0xC9, 0x30, 0xF0, 0xF8, 0xC9, 0x2E, 0xF0, 0x01, 0xC8, 0xA9, 0x2B, 0xA6
+        .db 0xA9, 0xF0, 0x2E, 0x10, 0x08, 0xA9, 0x00, 0x38, 0xE5, 0xA9, 0xAA, 0xA9, 0x2D, 0x99, 0xF1, 0x00
+        .db 0xA9, 0x45, 0x99, 0xF0, 0x00, 0x8A, 0xA2, 0x2F, 0x38, 0xE8, 0xE9, 0x0A, 0xB0, 0xFB, 0x69, 0x3A
+        .db 0x99, 0xF3, 0x00, 0x8A, 0x99, 0xF2, 0x00, 0xA9, 0x00, 0x99, 0xF4, 0x00, 0xF0, 0x08, 0x99, 0xEF
+        .db 0x00, 0xA9, 0x00, 0x99, 0xF0, 0x00, 0xA9, 0xF0, 0xA0, 0x00, 0x60, 0xF0, 0x42, 0xA5, 0xB3, 0xD0
+        .db 0x03, 0x4C, 0x52, 0xD4, 0xA2, 0x9C, 0xA0, 0x00, 0x20, 0xA7, 0xD6, 0xA5, 0xB7, 0x10, 0x0F, 0x20
+        .db 0x81, 0xD7, 0xA9, 0x9C, 0xA0, 0x00, 0x20, 0x17, 0xD7, 0xD0, 0x03, 0x98, 0xA4, 0x5B, 0x20, 0xC5
+        .db 0xD3, 0x98, 0x48, 0x20, 0xFB, 0xD4, 0xA9, 0x9C, 0xA0, 0x00, 0x20, 0x39, 0xD5, 0x20, 0xFF, 0xD9
+        .db 0x68, 0x4A, 0x90, 0x0A, 0xA5, 0xAC, 0xF0, 0x06, 0xA5, 0xB0, 0x49, 0xFF, 0x85, 0xB0, 0x60, 0xA9
+        .db 0x85, 0xA0, 0xDF, 0x20, 0x39, 0xD5, 0xA5, 0xB9, 0x69, 0x50, 0x90, 0x03, 0x20, 0xE1, 0xD6, 0x85
+        .db 0xA3, 0x20, 0xCD, 0xD6, 0xA5, 0xAC, 0xC9, 0x88, 0x90, 0x03, 0x20, 0xCE, 0xD5, 0x20, 0x81, 0xD7
+        .db 0xA5, 0x5B, 0x18, 0x69, 0x81, 0xF0, 0xF3, 0x38, 0xE9, 0x01, 0x48, 0xA2, 0x04, 0xB5, 0xB3, 0xB4
+        .db 0xAC, 0x95, 0xAC, 0x94, 0xB3, 0xCA, 0x10, 0xF5, 0xA5, 0xA3, 0x85, 0xB9, 0x20, 0xA6, 0xD3, 0x20
+        .db 0xF4, 0xD9, 0xA9, 0x89, 0xA0, 0xDF, 0x20, 0x67, 0xDA, 0xA9, 0x00, 0x85, 0xB8, 0x68, 0x4C, 0xB3
+        .db 0xD5, 0x85, 0xBA, 0x84, 0xBB, 0x20, 0x9D, 0xD6, 0xA9, 0xA4, 0x20, 0x39, 0xD5, 0x20, 0x6B, 0xDA
+        .db 0xA9, 0xA4, 0xA0, 0x00, 0x4C, 0x39, 0xD5, 0x85, 0xBA, 0x84, 0xBB, 0xA2, 0xA8, 0x20, 0x9F, 0xD6
+        .db 0xB1, 0xBA, 0x85, 0xB1, 0xA4, 0xBA, 0xC8, 0x98, 0xD0, 0x02, 0xE6, 0xBB, 0x85, 0xBA, 0xA4, 0xBB
+        .db 0x20, 0x39, 0xD5, 0xA5, 0xBA, 0xA4, 0xBB, 0x18, 0x69, 0x04, 0x90, 0x01, 0xC8, 0x85, 0xBA, 0x84
+        .db 0xBB, 0x20, 0xBE, 0xD3, 0xA9, 0xA8, 0xA0, 0x00, 0xC6, 0xB1, 0xD0, 0xE4, 0x60, 0xA5, 0xAC, 0xF0
+        .db 0x07, 0xA2, 0xD8, 0xA0, 0x00, 0x20, 0xA7, 0xD6, 0xA2, 0xAF, 0xA0, 0x13, 0x06, 0xD9, 0x26, 0xDA
+        .db 0x26, 0xDB, 0x26, 0xD8, 0x90, 0x05, 0x8A, 0x45, 0xD9, 0x85, 0xD9, 0x88, 0xD0, 0xEE, 0xA2, 0x02
+        .db 0xB5, 0xD9, 0x95, 0xAD, 0xCA, 0x10, 0xF9, 0xA9, 0x80, 0x85, 0xAC, 0x0A, 0x85, 0xB0, 0x4C, 0x34
+        .db 0xD4, 0xA9, 0xA6, 0xA0, 0xDF, 0x20, 0xBE, 0xD3, 0x20, 0xCA, 0xD6, 0xA9, 0xBB, 0xA0, 0xDF, 0xA6
+        .db 0xB7, 0x20, 0xF9, 0xD5, 0x20, 0xCA, 0xD6, 0x20, 0x81, 0xD7, 0xA9, 0x00, 0x85, 0xB8, 0x20, 0xA6
+        .db 0xD3, 0xA9, 0xED, 0xA0, 0xDF, 0x20, 0xA3, 0xD3, 0xA5, 0xB0, 0x48, 0x10, 0x0D, 0x20, 0xBA, 0xD3
+        .db 0xA5, 0xB0, 0x30, 0x09, 0xA5, 0x63, 0x49, 0xFF, 0x85, 0x63, 0x20, 0xF4, 0xD9, 0xA9, 0xED, 0xA0
+        .db 0xDF, 0x20, 0xBE, 0xD3, 0x68, 0x10, 0x03, 0x20, 0xF4, 0xD9, 0xA9, 0xAA, 0xA0, 0xDF, 0x4C, 0x51
+        .db 0xDA, 0x20, 0x9D, 0xD6, 0xA9, 0x00, 0x85, 0x63, 0x20, 0xD8, 0xDA, 0xA2, 0x9C, 0xA0, 0x00, 0x20
+        .db 0xA7, 0xD6, 0xA9, 0xA4, 0xA0, 0x00, 0x20, 0x7D, 0xD6, 0xA9, 0x00, 0x85, 0xB0, 0xA5, 0x63, 0x20
+        .db 0x49, 0xDB, 0xA9, 0x9C, 0xA0, 0x00, 0x4C, 0x01, 0xD6, 0x48, 0x4C, 0x0A, 0xDB, 0x20, 0x0A, 0x00
+        .db 0x4C, 0xEF, 0xC9, 0xA5, 0xB0, 0x48, 0x10, 0x03, 0x20, 0xF4, 0xD9, 0xA5, 0xAC, 0x48, 0xC9, 0x81
+        .db 0x90, 0x07, 0xA9, 0xE0, 0xA0, 0xDF, 0x20, 0x01, 0xD6, 0xA9, 0xBF, 0xA0, 0xDF, 0x20, 0x51, 0xDA
+        .db 0x68, 0xC9, 0x81, 0x90, 0x07, 0xA9, 0xA6, 0xA0, 0xDF, 0x20, 0xA3, 0xD3, 0x68, 0x10, 0x16, 0x4C
+        .db 0xF4, 0xD9, 0x20, 0xD8, 0xD2, 0xE0, 0x08, 0xB0, 0x20, 0xA9, 0x00, 0x38, 0x2A, 0xCA, 0x10, 0xFC
+        .db 0xE8, 0x01, 0x11, 0x81, 0x11, 0x60, 0x20, 0xD8, 0xD2, 0xE0, 0x08, 0xB0, 0x0C, 0xA9, 0xFF, 0x2A
+        .db 0xCA, 0x10, 0xFC, 0xE8, 0x21, 0x11, 0x81, 0x11, 0x60, 0x4C, 0x29, 0xCD, 0x20, 0xBC, 0x00, 0x20
+        .db 0xD8, 0xD2, 0xE0, 0x08, 0xB0, 0xF3, 0x20, 0xC2, 0x00, 0xC9, 0x29, 0xF0, 0x03, 0x4C, 0x02, 0xCA
+        .db 0x20, 0xBC, 0x00, 0xA9, 0x00, 0x38, 0x2A, 0xCA, 0x10, 0xFC, 0xE8, 0x21, 0x11, 0xF0, 0x02, 0xA9
+        .db 0xFF, 0x4C, 0xFA, 0xD6, 0xE0, 0x19, 0xB0, 0x48, 0x86, 0x78, 0xA9, 0x18, 0x20, 0x3A, 0xCF, 0xA0
+        .db 0x17, 0xA2, 0x18, 0x46, 0x11, 0x66, 0x12, 0x66, 0x13, 0x8A, 0x2A, 0x91, 0xAD, 0x88, 0x10, 0xF3
+        .db 0xA5, 0x78, 0xF0, 0x0A, 0xAA, 0x38, 0x49, 0xFF, 0x69, 0x18, 0xF0, 0x1C, 0xD0, 0x0F, 0xA8, 0xB1
+        .db 0xAD, 0xC9, 0x30, 0xD0, 0x07, 0xCA, 0xF0, 0x03, 0xC8, 0x10, 0xF4, 0xE8, 0x98, 0x18, 0x65, 0xAD
+        .db 0x85, 0xAD, 0xA9, 0x00, 0x65, 0xAE, 0x85, 0xAE, 0x86, 0xAC, 0x20, 0xBC, 0x00, 0x4C, 0x85, 0xCF
+        .db 0x4C, 0x29, 0xCD, 0xE0, 0x07, 0xB0, 0xF9, 0x86, 0x78, 0xA9, 0x06, 0x20, 0x3A, 0xCF, 0xA0, 0x05
+        .db 0xF8, 0xA5, 0x13, 0x20, 0x51, 0xDC, 0xA5, 0x12, 0x20, 0x51, 0xDC, 0xA5, 0x11, 0x20, 0x51, 0xDC
+        .db 0xD8, 0xA2, 0x06, 0xA5, 0x78, 0xF0, 0xB7, 0xAA, 0x38, 0x49, 0xFF, 0x69, 0x06, 0xF0, 0xC9, 0xD0
+        .db 0xBC, 0xAA, 0x29, 0x0F, 0x20, 0x5C, 0xDC, 0x8A, 0x4A, 0x4A, 0x4A, 0x4A, 0xC9, 0x0A, 0x69, 0x30
+        .db 0x91, 0xAD, 0x88, 0x60, 0x85, 0xAC, 0xA9, 0x00, 0x85, 0xB8, 0x8A, 0x20, 0x45, 0xD8, 0x20, 0xBC
+        .db 0x00, 0x90, 0x0A, 0x09, 0x20, 0xE9, 0x61, 0xC9, 0x06, 0xB0, 0x2A, 0x69, 0x0A, 0x29, 0x0F, 0xAA
+        .db 0xA5, 0xAC, 0xF0, 0xE4, 0x69, 0x04, 0x90, 0xDC, 0x4C, 0xC3, 0xD4, 0xAA, 0xA5, 0xAC, 0xF0, 0x06
+        .db 0xE6, 0xAC, 0xF0, 0xF4, 0xA9, 0x00, 0x85, 0xB8, 0x8A, 0x20, 0x45, 0xD8, 0x20, 0xBC, 0x00, 0x49
+        .db 0x30, 0xC9, 0x02, 0x90, 0xE6, 0x4C, 0x2A, 0xD8, 0xAD, 0x00, 0x04, 0xD0, 0x18, 0x20, 0xEA, 0xDE
+        .db 0x90, 0x0B, 0x8D, 0x01, 0x04, 0xA2, 0x20, 0x8E, 0x02, 0x04, 0x4C, 0x17, 0xC3, 0xAE, 0x02, 0x04
+        .db 0xF0, 0x03, 0xCE, 0x02, 0x04, 0xA2, 0xDC, 0x20, 0xD0, 0xDC, 0xA2, 0xDF, 0x20, 0xD0, 0xDC, 0x60
+        .db 0xB5, 0x00, 0x10, 0xFB, 0x0A, 0x29, 0x40, 0xF0, 0xF6, 0x95, 0x00, 0x8A, 0xA8, 0x68, 0x68, 0xA9
+        .db 0x05, 0x20, 0x03, 0xBF, 0xA5, 0xC4, 0x48, 0xA5, 0xC3, 0x48, 0xA5, 0x88, 0x48, 0xA5, 0x87, 0x48
+        .db 0xA9, 0x8D, 0x48, 0xB9, 0x01, 0x00, 0x85, 0xC3, 0xB9, 0x02, 0x00, 0x85, 0xC4, 0x4C, 0xBC, 0xC2
+        .db 0x20, 0xEA, 0xDE, 0xB0, 0x09, 0xAD, 0x02, 0x04, 0xF0, 0x09, 0xAD, 0x01, 0x04, 0x38, 0xA2, 0x00
+        .db 0x8E, 0x02, 0x04, 0x60, 0xA2, 0xDF, 0x2C, 0xA2, 0xDC, 0xC9, 0x93, 0xF0, 0x11, 0xC9, 0xB6, 0xF0
+        .db 0x07, 0x49, 0xA2, 0xF0, 0x0E, 0x4C, 0x02, 0xCA, 0xA9, 0x7F, 0x35, 0x00, 0x10, 0x05, 0xB5, 0x00
+        .db 0x0A, 0x15, 0x00, 0x95, 0x00, 0x4C, 0xBC, 0x00, 0x58, 0xA2, 0xDF, 0x2C, 0xA2, 0xDC, 0x86, 0x78
+        .db 0x20, 0xBC, 0x00, 0x20, 0x55, 0xC5, 0xA5, 0x79, 0xA6, 0x7A, 0x20, 0x28, 0xC1, 0xB0, 0x03, 0x4C
+        .db 0x72, 0xC4, 0xA6, 0x78, 0xA5, 0xAA, 0xE9, 0x01, 0x95, 0x01, 0xA5, 0xAB, 0xE9, 0x00, 0x95, 0x02
+        .db 0xA9, 0xC0, 0x95, 0x00, 0x60, 0xD0, 0xFD, 0xA5, 0xDF, 0x0A, 0x05, 0xDF, 0x85, 0xDF, 0x4C, 0x79
+        .db 0xC4, 0xD0, 0xF1, 0xA5, 0xDC, 0x0A, 0x05, 0xDC, 0x85, 0xDC, 0x4C, 0x79, 0xC4, 0x20, 0xE9, 0xC8
+        .db 0x4C, 0xD0, 0xC8, 0x20, 0xB1, 0xDD, 0x10, 0xFB, 0xA5, 0xB4, 0x09, 0x80, 0x85, 0xB4, 0x20, 0xC3
+        .db 0xD3, 0xF0, 0xF0, 0x20, 0xB1, 0xDD, 0x30, 0xFB, 0xF0, 0xF9, 0xA5, 0xB4, 0x09, 0x80, 0x85, 0xB4
+        .db 0x20, 0xC3, 0xD3, 0xF0, 0xEE, 0xC9, 0x29, 0xD0, 0x05, 0x68, 0x68, 0x4C, 0xBC, 0x00, 0x4C, 0x02
+        .db 0xCA, 0x20, 0xC2, 0x00, 0xC9, 0x2C, 0xD0, 0xED, 0x20, 0xD9, 0xD6, 0xA5, 0xB0, 0x09, 0x7F, 0x25
+        .db 0xAD, 0x48, 0xA5, 0xAE, 0x48, 0xA5, 0xAF, 0x48, 0xA5, 0xAC, 0x48, 0x20, 0xBC, 0x00, 0x20, 0xCD
+        .db 0xC8, 0x68, 0x85, 0xB3, 0x68, 0x85, 0xB6, 0x68, 0x85, 0xB5, 0x68, 0x85, 0xB4, 0x85, 0xB7, 0xA9
+        .db 0xB3, 0xA0, 0x00, 0x4C, 0x17, 0xD7, 0xC9, 0x2C, 0xF0, 0x1B, 0x20, 0x8C, 0xD2, 0x8A, 0xF0, 0x0A
+        .db 0xE0, 0x10, 0x90, 0x45, 0xE4, 0x64, 0xB0, 0x02, 0x86, 0x64, 0x86, 0x0F, 0x20, 0xC2, 0x00, 0xF0
+        .db 0x1A, 0xC9, 0x2C, 0xD0, 0xA9, 0x20, 0x89, 0xD2, 0x8A, 0x30, 0x2E, 0xE0, 0x01, 0x90, 0x2A, 0xA5
+        .db 0x0F, 0xF0, 0x06, 0xE4, 0x0F, 0xF0, 0x02, 0xB0, 0x20, 0x86, 0x64, 0xA5, 0x0F, 0xF0, 0x06, 0xC5
+        .db 0x64, 0xB0, 0x03, 0x85, 0x64, 0x38, 0xE5, 0x64, 0xB0, 0xFC, 0x65, 0x64, 0x18, 0x65, 0x64, 0x85
+        .db 0x10, 0xA5, 0x0F, 0x38, 0xE5, 0x10, 0x85, 0x10, 0x60, 0x4C, 0x29, 0xCD, 0xA5, 0xB0, 0x30, 0xF9
+        .db 0xA5, 0xAC, 0xF0, 0xF4, 0x20, 0xCA, 0xD6, 0xA9, 0x00, 0x85, 0x77, 0x85, 0x76, 0x85, 0x75, 0x85
+        .db 0x78, 0x85, 0xAF, 0x85, 0xAE, 0x85, 0xAD, 0xA2, 0x18, 0xA5, 0xB3, 0x4A, 0xB0, 0x0E, 0x06, 0xB6
+        .db 0x26, 0xB5, 0x26, 0xB4, 0x26, 0x77, 0x26, 0x76, 0x26, 0x75, 0x26, 0x78, 0x06, 0xB6, 0x26, 0xB5
+        .db 0x26, 0xB4, 0x26, 0x77, 0x26, 0x76, 0x26, 0x75, 0x26, 0x78, 0x06, 0xAF, 0x26, 0xAE, 0x26, 0xAD
+        .db 0xA5, 0xAF, 0x2A, 0x85, 0x5B, 0xA5, 0xAE, 0x2A, 0x85, 0x5C, 0xA5, 0xAD, 0x2A, 0x85, 0x5D, 0xA9
+        .db 0x00, 0x2A, 0x85, 0x5E, 0xA5, 0x77, 0xE5, 0x5B, 0x85, 0x5B, 0xA5, 0x76, 0xE5, 0x5C, 0x85, 0x5C
+        .db 0xA5, 0x75, 0xE5, 0x5D, 0xA8, 0xA5, 0x78, 0xE5, 0x5E, 0x90, 0x0E, 0x85, 0x78, 0x84, 0x75, 0xA5
+        .db 0x5C, 0x85, 0x76, 0xA5, 0x5B, 0x85, 0x77, 0xE6, 0xAF, 0xCA, 0xD0, 0xA2, 0x38, 0xA5, 0xB3, 0xE9
+        .db 0x80, 0x6A, 0x69, 0x00, 0x85, 0xAC, 0x4C, 0x34, 0xD4, 0x20, 0xBC, 0x00, 0x20, 0xAA, 0xCB, 0x20
+        .db 0xEF, 0xC9, 0xA4, 0x95, 0xA5, 0x96, 0x4C, 0x59, 0xCE, 0xA9, 0xBB, 0xA0, 0xDF, 0x20, 0x7D, 0xD6
+        .db 0xC6, 0xAC, 0x60, 0xA9, 0xBB, 0xA0, 0xDF, 0x4C, 0x7D, 0xD6, 0x6C, 0x05, 0x04, 0x6C, 0x07, 0x04
+        .db 0x6C, 0x09, 0x04, 0x6C, 0x0B, 0x04, 0x00, 0x00, 0x00, 0xA8, 0xDC, 0xE6, 0xC3, 0xD0, 0x02, 0xE6
+        .db 0xC4, 0xAD, 0xFF, 0xFF, 0xC9, 0xAD, 0xF0, 0x0E, 0xC9, 0x3A, 0xB0, 0x0A, 0xC9, 0x20, 0xF0, 0xEB
+        .db 0x38, 0xE9, 0x30, 0x38, 0xE9, 0xD0, 0x60, 0x4C, 0x00, 0xBE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x4C, 0x29, 0xCD, 0x00, 0x00, 0x00, 0xF2, 0x00, 0x05, 0x0D, 0x0A, 0x4D, 0x65, 0x6D, 0x6F
+        .db 0x72, 0x79, 0x20, 0x73, 0x69, 0x7A, 0x65, 0x20, 0x00, 0x20, 0x42, 0x79, 0x74, 0x65, 0x73, 0x20
+        .db 0x66, 0x72, 0x65, 0x65, 0x0D, 0x0A, 0x0A, 0x45, 0x6E, 0x68, 0x61, 0x6E, 0x63, 0x65, 0x64, 0x20
+        .db 0x42, 0x41, 0x53, 0x49, 0x43, 0x20, 0x32, 0x2E, 0x32, 0x32, 0x0A, 0x00, 0x02, 0x80, 0x19, 0x56
+        .db 0x62, 0x80, 0x76, 0x22, 0xF3, 0x82, 0x38, 0xAA, 0x40, 0x80, 0x35, 0x04, 0xF3, 0x81, 0x35, 0x04
+        .db 0xF3, 0x80, 0x80, 0x00, 0x00, 0x80, 0x31, 0x72, 0x18, 0x91, 0x43, 0x4F, 0xF8, 0x94, 0x74, 0x23
+        .db 0xF7, 0x94, 0x74, 0x24, 0x00, 0x81, 0x38, 0xAA, 0x3B, 0x06, 0x74, 0x63, 0x90, 0x8C, 0x77, 0x23
+        .db 0x0C, 0xAB, 0x7A, 0x1E, 0x94, 0x00, 0x7C, 0x63, 0x42, 0x80, 0x7E, 0x75, 0xFE, 0xD0, 0x80, 0x31
+        .db 0x72, 0x15, 0x81, 0x00, 0x00, 0x00, 0x81, 0x49, 0x0F, 0xDB, 0x04, 0x86, 0x1E, 0xD7, 0xFB, 0x87
+        .db 0x99, 0x26, 0x65, 0x87, 0x23, 0x34, 0x58, 0x86, 0xA5, 0x5D, 0xE1, 0x83, 0x49, 0x0F, 0xDB, 0x08
+        .db 0x78, 0x3A, 0xC5, 0x37, 0x7B, 0x83, 0xA2, 0x5C, 0x7C, 0x2E, 0xDD, 0x4D, 0x7D, 0x99, 0xB0, 0x1E
+        .db 0x7D, 0x59, 0xED, 0x24, 0x7E, 0x91, 0x72, 0x00, 0x7E, 0x4C, 0xB9, 0x73, 0x7F, 0xAA, 0xAA, 0x53
+        .db 0x81, 0x00, 0x00, 0x00, 0x81, 0x80, 0x00, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00
+        .db 0x00, 0x84, 0x20, 0x00, 0x00, 0xFE, 0x79, 0x60, 0x00, 0x27, 0x10, 0xFF, 0xFC, 0x18, 0x00, 0x00
+        .db 0x64, 0xFF, 0xFF, 0xF6, 0x00, 0x00, 0x01, 0x1A, 0xC3, 0x57, 0xC2, 0x64, 0xC8, 0x8B, 0xC4, 0x46
+        .db 0xC7, 0x5E, 0xCB, 0x66, 0xC7, 0xB3, 0xC5, 0x85, 0xC5, 0xEA, 0xC3, 0xA9, 0xC3, 0xB9, 0xC4, 0x41
+        .db 0xC3, 0xCD, 0xC3, 0x64, 0xDD, 0x70, 0xDD, 0x76, 0xC4, 0x1D, 0xC5, 0x18, 0xC3, 0x26, 0xC5, 0x7F
+        .db 0xC3, 0x88, 0xC5, 0x88, 0xD3, 0xEF, 0xDE, 0xF2, 0xDE, 0x73, 0xCE, 0x0D, 0xD3, 0x29, 0xD3, 0x76
+        .db 0xD3, 0xB3, 0xC3, 0x1C, 0xC4, 0x54, 0xC6, 0x85, 0xC3, 0xA2, 0xC1, 0x9F, 0xC1, 0x4D, 0xC1, 0xE5
+        .db 0xDD, 0x23, 0xC6, 0x4E, 0xD3, 0x81, 0xDB, 0x95, 0xDB, 0x13, 0xDD, 0x16, 0xDD, 0x3D, 0xE8, 0x64
+        .db 0xCA, 0x64, 0xCA, 0x64, 0xCA, 0xE8, 0xC8, 0xEB, 0xC9, 0xEB, 0xC9, 0x64, 0xCA, 0x64, 0xCA, 0x64
+        .db 0xCA, 0x64, 0xCA, 0x64, 0xCA, 0x64, 0xCA, 0x64, 0xCA, 0x64, 0xCA, 0x64, 0xCA, 0x64, 0xCA, 0x00
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+        .db 0xA9, 0x0D, 0x20, 0xFB, 0xE7, 0xA9, 0x0A, 0x20, 0xFB, 0xE7, 0x68, 0x60, 0x20, 0x60, 0xE7, 0x8A
+        .db 0x48, 0x4A, 0x4A, 0x4A, 0x4A, 0x20, 0x69, 0xE7, 0x68, 0x5A, 0x29, 0x0F, 0xA8, 0xB9, 0xF8, 0xEE
+        .db 0x7A, 0x4C, 0xFB, 0xE7, 0x20, 0x80, 0xE7, 0xCA, 0xE0, 0x00, 0xD0, 0xF8, 0x60, 0x20, 0x80, 0xE7
+        .db 0xA9, 0x20, 0x4C, 0xFB, 0xE7, 0xA9, 0x21, 0x2C, 0xA9, 0x3E, 0x85, 0x32, 0x20, 0x4F, 0xE7, 0xA5
+        .db 0x32, 0x20, 0xFB, 0xE7, 0xA0, 0xFF, 0x20, 0xF5, 0xE7, 0xC9, 0x20, 0xB0, 0x3D, 0xC9, 0x0D, 0xF0
+        .db 0x4A, 0xC9, 0x1B, 0xF0, 0xE7, 0xC9, 0x08, 0xF0, 0x09, 0xC9, 0x09, 0xF0, 0x1B, 0xC9, 0x02, 0xD0
+        .db 0xE5, 0x00, 0xC0, 0xFF, 0xF0, 0xE0, 0x88, 0xA9, 0x08, 0x20, 0xFB, 0xE7, 0xA9, 0x20, 0x20, 0xFB
+        .db 0xE7, 0xA9, 0x08, 0x20, 0xFB, 0xE7, 0x80, 0xCE, 0xA9, 0x20, 0xC8, 0x30, 0x1F, 0x99, 0x00, 0x03
+        .db 0x20, 0xFB, 0xE7, 0x98, 0x29, 0x07, 0xD0, 0xF0, 0x80, 0xBC, 0xC9, 0x61, 0x90, 0x02, 0xE9, 0x20
+        .db 0xC8, 0x30, 0x09, 0x99, 0x00, 0x03, 0x20, 0xFB, 0xE7, 0x80, 0xAB, 0xC8, 0xA9, 0x0D, 0x99, 0x00
+        .db 0x03, 0x20, 0xFB, 0xE7, 0x60, 0x6C, 0xEB, 0x03, 0x6C, 0xEE, 0x03, 0x6C, 0xF1, 0x03, 0xA9, 0x07
+        .db 0x4C, 0xFB, 0xE7, 0x48, 0x3A, 0xD0, 0xFD, 0x68, 0x3A, 0xD0, 0xF8, 0x60, 0x8D, 0xE2, 0x03, 0x8E
+        .db 0xE3, 0x03, 0x8C, 0xE4, 0x03, 0x68, 0x8D, 0xE6, 0x03, 0x68, 0xFA, 0x38, 0xE9, 0x02, 0x8D, 0xE1
+        .db 0x03, 0xB0, 0x01, 0xCA, 0x8E, 0xE0, 0x03, 0xBA, 0x8E, 0xE5, 0x03, 0x20, 0xFE, 0xE7, 0x20, 0x18
+        .db 0xE7, 0xA2, 0xFF, 0x9A, 0x58, 0x4C, 0x3E, 0xE8, 0x20, 0xFE, 0xE7, 0x20, 0xB3, 0xE8, 0xA2, 0xFF
+        .db 0x9A, 0x20, 0x88, 0xE7, 0xA9, 0x00, 0xA8, 0x85, 0x33, 0x85, 0x37, 0x64, 0x3C, 0x64, 0x3D, 0x20
+        .db 0x74, 0xE8, 0xA2, 0x13, 0xDD, 0x08, 0xEF, 0xF0, 0x05, 0xCA, 0x10, 0xF8, 0x80, 0xE0, 0xDA, 0x5A
+        .db 0x8A, 0x0A, 0xAA, 0x20, 0x71, 0xE8, 0x7A, 0xFA, 0xF0, 0xD4, 0xBD, 0x44, 0xEF, 0x30, 0xDC, 0x80
+        .db 0xD8, 0x7C, 0x1C, 0xEF, 0x64, 0x35, 0x80, 0x0E, 0x8A, 0xA2, 0x04, 0x06, 0x3C, 0x26, 0x3D, 0xCA
+        .db 0xD0, 0xF9, 0x04, 0x3C, 0xC6, 0x35, 0xB9, 0x00, 0x03, 0xA2, 0x0F, 0xC8, 0xDD, 0xF8, 0xEE, 0xF0
+        .db 0xE7, 0xCA, 0x10, 0xF8, 0x60, 0xA9, 0x76, 0x85, 0x3A, 0xA9, 0xF2, 0x85, 0x3B, 0x80, 0x0F, 0xC9
+        .db 0x7E, 0xF0, 0x05, 0x20, 0xFB, 0xE7, 0x80, 0x03, 0x20, 0x4F, 0xE7, 0x20, 0x65, 0xE9, 0xB2, 0x3A
+        .db 0xD0, 0xED, 0x60, 0x20, 0x4F, 0xE7, 0xA2, 0xFF, 0xA9, 0x0D, 0xE8, 0x20, 0xFB, 0xE7, 0xBD, 0x9C
+        .db 0xF8, 0xD0, 0xF7, 0x60, 0x20, 0xCD, 0xE8, 0xA2, 0xFF, 0x9A, 0x4C, 0x3E, 0xE8, 0x6C, 0x3C, 0x00
+        .db 0xA6, 0x3C, 0xA5, 0x3D, 0x86, 0x3A, 0x85, 0x3B, 0xE6, 0x33, 0x60, 0xC0, 0x01, 0xD0, 0x0C, 0xA5
+        .db 0x3A, 0x09, 0x0F, 0x85, 0x3C, 0xA5, 0x3B, 0x85, 0x3D, 0x80, 0x17, 0xA5, 0x35, 0xF0, 0x5A, 0xA6
+        .db 0x37, 0xF0, 0x0A, 0xCA, 0xF0, 0x1C, 0xA5, 0x3C, 0x92, 0x3A, 0x4C, 0x65, 0xE9, 0x20, 0xD0, 0xE8
+        .db 0x80, 0x10, 0xA5, 0x3A, 0x89, 0x0F, 0xF0, 0x0A, 0xC0, 0x00, 0xF0, 0x46, 0x89, 0x07, 0xF0, 0x11
+        .db 0x80, 0x19, 0x20, 0x4F, 0xE7, 0x20, 0xF8, 0xE7, 0xB0, 0x2D, 0xA5, 0x3B, 0xA6, 0x3A, 0x20, 0x5C
+        .db 0xE7, 0xA9, 0x20, 0x20, 0xFB, 0xE7, 0xA9, 0x2D, 0x20, 0xFB, 0xE7, 0xA9, 0x20, 0x20, 0xFB, 0xE7
+        .db 0xC0, 0x00, 0xF0, 0x1E, 0xB2, 0x3A, 0x20, 0x60, 0xE7, 0x38, 0xA5, 0x3A, 0xE5, 0x3C, 0xA5, 0x3B
+        .db 0xE5, 0x3D, 0x20, 0x65, 0xE9, 0x90, 0xBB, 0x64, 0x37, 0x60, 0x5A, 0xA0, 0x00, 0x20, 0xEB, 0xE8
+        .db 0x7A, 0x60, 0xB2, 0x3A, 0x29, 0x7F, 0xC9, 0x7F, 0xF0, 0x04, 0xC9, 0x20, 0xB0, 0x02, 0xA9, 0x2E
+        .db 0x20, 0xFB, 0xE7, 0x80, 0xD4, 0xE6, 0x3A, 0xD0, 0x02, 0xE6, 0x3B, 0x60, 0xA5, 0x33, 0xF0, 0x3E
+        .db 0x38, 0xA5, 0x3C, 0xE5, 0x3A, 0xAA, 0xA5, 0x3D, 0xE5, 0x3B, 0xA8, 0x90, 0x31, 0x18, 0x8A, 0x65
+        .db 0x3E, 0x85, 0x3C, 0x98, 0x65, 0x3F, 0x85, 0x3D, 0xB2, 0x3E, 0x92, 0x3C, 0xA9, 0xFF, 0xC6, 0x3C
+        .db 0xC5, 0x3C, 0xD0, 0x02, 0xC6, 0x3D, 0xC6, 0x3E, 0xC5, 0x3E, 0xD0, 0x02, 0xC6, 0x3F, 0x38, 0xA5
+        .db 0x3E, 0xE5, 0x3A, 0xA5, 0x3F, 0xE5, 0x3B, 0x90, 0x05, 0x20, 0xF8, 0xE7, 0x90, 0xDA, 0x60, 0xA5
+        .db 0x33, 0xD0, 0x0D, 0x60, 0xE6, 0x3A, 0xD0, 0x02, 0xE6, 0x3B, 0xE6, 0x3C, 0xD0, 0x02, 0xE6, 0x3D
+        .db 0x38, 0xA5, 0x3E, 0xE5, 0x3A, 0xA5, 0x3F, 0xE5, 0x3B, 0x90, 0xE8, 0x20, 0xF8, 0xE7, 0xB0, 0xE3
+        .db 0xB2, 0x3A, 0x92, 0x3C, 0x80, 0xDE, 0xB2, 0x3A, 0x52, 0x3C, 0x30, 0xFA, 0x80, 0xD6, 0xA5, 0x3A
+        .db 0x48, 0xA5, 0x3B, 0x48, 0xA9, 0xAF, 0x85, 0x3A, 0xA9, 0xE9, 0x85, 0x3B, 0xA0, 0x2E, 0xB1, 0x3A
+        .db 0x99, 0x80, 0x02, 0x88, 0x10, 0xF8, 0xA9, 0xEA, 0x8D, 0xA5, 0x02, 0x8D, 0xA6, 0x02, 0x8D, 0x9C
+        .db 0x02, 0x8D, 0x9D, 0x02, 0x8D, 0x9E, 0x02, 0x8D, 0x9F, 0x02, 0x8D, 0xA0, 0x02, 0x68, 0x85, 0x3B
+        .db 0x68, 0x85, 0x3A, 0x4C, 0x80, 0x02, 0xA6, 0x3C, 0xA5, 0x3D, 0x86, 0x3E, 0x85, 0x3F, 0x60, 0xA5
+        .db 0x33, 0xF0, 0x29, 0xA5, 0x3A, 0xA6, 0x3B, 0x85, 0x38, 0x86, 0x39, 0x38, 0xA5, 0x38, 0xE5, 0x3A
+        .db 0xA5, 0x39, 0xE5, 0x3B, 0x90, 0x15, 0x20, 0x64, 0xEA, 0x20, 0xF8, 0xE7, 0xB0, 0x0D, 0x38, 0xA5
+        .db 0x3C, 0xE5, 0x38, 0xA5, 0x3D, 0xE5, 0x39, 0xB0, 0xE2, 0x64, 0x33, 0x60, 0xA5, 0x35, 0xF0, 0x08
+        .db 0xA6, 0x3C, 0xA5, 0x3D, 0x86, 0x38, 0x85, 0x39, 0xA9, 0x14, 0x85, 0x33, 0x20, 0x64, 0xEA, 0xC6
+        .db 0x33, 0xD0, 0xF9, 0x60, 0x20, 0x4F, 0xE7, 0x20, 0x76, 0xEA, 0x18, 0xA5, 0x38, 0x65, 0x35, 0x85
+        .db 0x38, 0x90, 0x02, 0xE6, 0x39, 0x60, 0xB2, 0x38, 0xAA, 0xBD, 0x58, 0xEF, 0x85, 0x36, 0xBD, 0x58
+        .db 0xF0, 0x29, 0x0F, 0x85, 0x34, 0xAA, 0xBD, 0x58, 0xF1, 0x85, 0x35, 0xA5, 0x39, 0xA6, 0x38, 0x20
+        .db 0x5C, 0xE7, 0xA9, 0x2D, 0x20, 0xFB, 0xE7, 0x20, 0x7D, 0xE7, 0xA2, 0x01, 0xA0, 0x00, 0xC4, 0x35
+        .db 0xB0, 0x0B, 0xB1, 0x38, 0xE0, 0x00, 0xD0, 0x0E, 0x20, 0x60, 0xE7, 0x80, 0x07, 0xE0, 0x00, 0xD0
+        .db 0x03, 0x20, 0x7D, 0xE7, 0xA9, 0x20, 0x29, 0x7F, 0xC9, 0x7F, 0xF0, 0x04, 0xC9, 0x20, 0xB0, 0x02
+        .db 0xA9, 0x2E, 0x20, 0xFB, 0xE7, 0xC8, 0xC0, 0x03, 0x90, 0xD4, 0x20, 0x7D, 0xE7, 0xCA, 0xF0, 0xCC
+        .db 0xA5, 0x36, 0x0A, 0x65, 0x36, 0xAA, 0xA0, 0xFD, 0xBD, 0x98, 0xF1, 0x20, 0xFB, 0xE7, 0xE8, 0xC8
+        .db 0xD0, 0xF6, 0xA5, 0x36, 0xC9, 0x42, 0x30, 0x19, 0xC9, 0x46, 0x10, 0x15, 0xB2, 0x38, 0x4A, 0x4A
+        .db 0x4A, 0x4A, 0x29, 0x07, 0x09, 0x30, 0x20, 0xFB, 0xE7, 0xA9, 0x20, 0x20, 0xFB, 0xE7, 0x4C, 0x04
+        .db 0xEB, 0x20, 0x7D, 0xE7, 0xA5, 0x34, 0x0A, 0xAA, 0x7C, 0x68, 0xF1, 0xA9, 0x23, 0x20, 0xFB, 0xE7
+        .db 0xA9, 0x24, 0x20, 0xFB, 0xE7, 0xA0, 0x01, 0xB1, 0x38, 0x4C, 0x60, 0xE7, 0x20, 0x10, 0xEB, 0xA9
+        .db 0x2C, 0x20, 0xFB, 0xE7, 0xA9, 0x58, 0x4C, 0xFB, 0xE7, 0x20, 0x10, 0xEB, 0xA9, 0x2C, 0x20, 0xFB
+        .db 0xE7, 0xA9, 0x59, 0x4C, 0xFB, 0xE7, 0x20, 0x7C, 0xEB, 0x20, 0x10, 0xEB, 0xA9, 0x29, 0x4C, 0xFB
+        .db 0xE7, 0x20, 0x7C, 0xEB, 0x20, 0x10, 0xEB, 0x20, 0x1F, 0xEB, 0x80, 0xF0, 0x20, 0x36, 0xEB, 0x80
+        .db 0xDB, 0xA9, 0x24, 0x20, 0xFB, 0xE7, 0xA0, 0x02, 0x20, 0x17, 0xEB, 0x88, 0x80, 0xB9, 0x20, 0x51
+        .db 0xEB, 0x80, 0xBC, 0x20, 0x51, 0xEB, 0x80, 0xC4, 0x20, 0x7C, 0xEB, 0x20, 0x51, 0xEB, 0x80, 0xCC
+        .db 0x20, 0x7C, 0xEB, 0x20, 0x51, 0xEB, 0x20, 0x1F, 0xEB, 0x80, 0xC1, 0x60, 0xA9, 0x28, 0x4C, 0xFB
+        .db 0xE7, 0x20, 0x10, 0xEB, 0xA9, 0x2C, 0x20, 0xFB, 0xE7, 0xA9, 0x24, 0x20, 0xFB, 0xE7, 0xA0, 0x02
+        .db 0xB1, 0x38, 0x85, 0x37, 0x18, 0xA5, 0x38, 0x69, 0x03, 0x4C, 0xAC, 0xEB, 0xA9, 0x24, 0x20, 0xFB
+        .db 0xE7, 0xA0, 0x01, 0xB1, 0x38, 0x85, 0x37, 0x18, 0xA5, 0x38, 0x69, 0x02, 0xAA, 0xA5, 0x39, 0x69
+        .db 0x00, 0xA8, 0x18, 0x8A, 0x65, 0x37, 0xAA, 0x98, 0xA4, 0x37, 0x10, 0x01, 0x3A, 0x69, 0x00, 0x4C
+        .db 0x5C, 0xE7, 0xBA, 0xE8, 0xE8, 0xE8, 0xE8, 0x9E, 0x00, 0x01, 0x20, 0xB3, 0xE8, 0x4C, 0xF0, 0xEB
+        .db 0xA9, 0xDE, 0x85, 0x3A, 0xA9, 0xF6, 0x85, 0x3B, 0x80, 0x0F, 0xC9, 0x7E, 0xF0, 0x05, 0x20, 0xFB
+        .db 0xE7, 0x80, 0x03, 0x20, 0x4F, 0xE7, 0x20, 0x65, 0xE9, 0xB2, 0x3A, 0xD0, 0xED, 0x20, 0xBE, 0xEE
+        .db 0xA2, 0xFF, 0x9A, 0x64, 0x35, 0x20, 0x85, 0xE7, 0xA0, 0x00, 0xAD, 0x00, 0x03, 0xC9, 0x0D, 0xD0
+        .db 0x03, 0x4C, 0x3E, 0xE8, 0xC9, 0x3F, 0xF0, 0xC8, 0xC9, 0x20, 0xF0, 0x3B, 0xC9, 0x3B, 0xF0, 0xE0
+        .db 0xC9, 0x4C, 0xF0, 0x2C, 0xC9, 0x24, 0xD0, 0x01, 0xC8, 0x64, 0x3C, 0x64, 0x3D, 0x20, 0x74, 0xE8
+        .db 0xA6, 0x35, 0xF0, 0x08, 0xC9, 0x4C, 0xF0, 0x1A, 0xC9, 0x20, 0xF0, 0x1B, 0x98, 0xAA, 0xA9, 0x0A
+        .db 0x20, 0xFB, 0xE7, 0x20, 0x78, 0xE7, 0xA9, 0x5E, 0x20, 0xFB, 0xE7, 0x20, 0xFE, 0xE7, 0x80, 0xB0
+        .db 0x64, 0x35, 0x20, 0x4C, 0xEA, 0x80, 0xA9, 0xA5, 0x35, 0xF0, 0x0A, 0xA6, 0x3C, 0xA5, 0x3D, 0x86
+        .db 0x3A, 0x85, 0x3B, 0x88, 0xC8, 0xB9, 0x00, 0x03, 0xC9, 0x20, 0xF0, 0xF8, 0xC9, 0x0D, 0xF0, 0xE5
+        .db 0xC9, 0x3B, 0xF0, 0xE1, 0xA2, 0x00, 0x86, 0x36, 0x84, 0x33, 0xA4, 0x33, 0xA5, 0x36, 0x0A, 0x65
+        .db 0x36, 0xAA, 0xB9, 0x00, 0x03, 0xC8, 0xDD, 0x98, 0xF1, 0xD0, 0x14, 0xB9, 0x00, 0x03, 0xE8, 0xC8
+        .db 0xDD, 0x98, 0xF1, 0xD0, 0x0A, 0xB9, 0x00, 0x03, 0xE8, 0xC8, 0xDD, 0x98, 0xF1, 0xF0, 0x0C, 0xA6
+        .db 0x36, 0xE8, 0x86, 0x36, 0xE0, 0x4A, 0xD0, 0xD2, 0x4C, 0x2C, 0xEC, 0xA9, 0x00, 0x85, 0x34, 0xC6
+        .db 0x34, 0x85, 0x3C, 0x85, 0x3D, 0x85, 0x35, 0xA6, 0x36, 0xE0, 0x42, 0x30, 0x18, 0xE0, 0x46, 0x10
+        .db 0x14, 0xB9, 0x00, 0x03, 0xC8, 0xC9, 0x38, 0x10, 0xDF, 0xC9, 0x30, 0x30, 0xDB, 0x0A, 0x0A, 0x0A
+        .db 0x0A, 0x85, 0x39, 0xA9, 0x80, 0xBE, 0x00, 0x03, 0xC8, 0xE0, 0x20, 0xD0, 0x24, 0xC9, 0x80, 0x30
+        .db 0xF4, 0xA6, 0x36, 0xE0, 0x44, 0x10, 0xEE, 0xA6, 0x35, 0xF0, 0xEA, 0xC9, 0xD0, 0x10, 0xE6, 0xC9
+        .db 0xC0, 0x10, 0xB5, 0xA6, 0x3D, 0xD0, 0xB1, 0xA6, 0x3C, 0x86, 0x38, 0x09, 0x40, 0x29, 0xF7, 0x80
+        .db 0xD4, 0xE0, 0x0D, 0xD0, 0x03, 0x4C, 0xAF, 0xED, 0xE0, 0x3B, 0xF0, 0xF9, 0x48, 0xA5, 0x36, 0xC9
+        .db 0x46, 0x30, 0x44, 0xD0, 0x19, 0xE0, 0x24, 0xF0, 0x01, 0x88, 0x20, 0x74, 0xE8, 0xFA, 0xA6, 0x35
+        .db 0xF0, 0x86, 0xA0, 0x00, 0xA9, 0x01, 0x48, 0xA5, 0x3C, 0x91, 0x3A, 0x4C, 0x4A, 0xEE, 0xC9, 0x47
+        .db 0xD0, 0x1E, 0xE0, 0x24, 0xF0, 0x01, 0x88, 0x20, 0x74, 0xE8, 0xFA, 0xA6, 0x35, 0xF0, 0x7D, 0xA0
+        .db 0x00, 0xA9, 0x02, 0x48, 0xA5, 0x3C, 0x91, 0x3A, 0xA5, 0x3D, 0xC8, 0x91, 0x3A, 0x4C, 0x4A, 0xEE
+        .db 0xC9, 0x48, 0xD0, 0x68, 0x4C, 0x90, 0xEE, 0x68, 0xE0, 0x23, 0xD0, 0x05, 0x09, 0x20, 0x4C, 0xC5
+        .db 0xEC, 0xE0, 0x28, 0xD0, 0x0B, 0x09, 0x04, 0xA6, 0x34, 0x10, 0x51, 0xE6, 0x34, 0x4C, 0xC5, 0xEC
+        .db 0xE0, 0x29, 0xD0, 0x09, 0xA6, 0x34, 0xD0, 0x44, 0xE6, 0x34, 0x4C, 0xC5, 0xEC, 0xE0, 0x2C, 0xD0
+        .db 0x1E, 0xBE, 0x00, 0x03, 0xE0, 0x58, 0xD0, 0x06, 0x09, 0x02, 0xC8, 0x4C, 0xC5, 0xEC, 0xE0, 0x59
+        .db 0xF0, 0x07, 0xC9, 0x80, 0x30, 0x26, 0x4C, 0xD1, 0xEC, 0x09, 0x01, 0xC8, 0x4C, 0xC5, 0xEC, 0xE0
+        .db 0x24, 0xF0, 0x01, 0x88, 0x48, 0x20, 0x74, 0xE8, 0x88, 0x68, 0xA6, 0x35, 0xF0, 0x0E, 0xA6, 0x3D
+        .db 0xD0, 0x05, 0x09, 0x08, 0x4C, 0xC5, 0xEC, 0x09, 0x10, 0x4C, 0xC5, 0xEC, 0x4C, 0x2C, 0xEC, 0xA2
+        .db 0x0F, 0xDD, 0x88, 0xF1, 0xF0, 0x05, 0xCA, 0x10, 0xF8, 0x80, 0xF1, 0x86, 0x37, 0xC9, 0x80, 0x30
+        .db 0x05, 0x8A, 0x05, 0x39, 0x85, 0x37, 0xA2, 0x00, 0xBD, 0x58, 0xEF, 0xC5, 0x36, 0xD0, 0x07, 0xBD
+        .db 0x58, 0xF0, 0xC5, 0x37, 0xF0, 0x2D, 0xE8, 0xD0, 0xEF, 0xA5, 0x37, 0xC9, 0x02, 0xD0, 0x06, 0xA9
+        .db 0x01, 0x85, 0x37, 0x80, 0xE1, 0xC9, 0x01, 0xD0, 0x06, 0xA9, 0x0A, 0x85, 0x37, 0x80, 0xD7, 0xC9
+        .db 0x0D, 0xD0, 0x06, 0xA9, 0x0B, 0x85, 0x37, 0x80, 0xCD, 0xC9, 0x07, 0xD0, 0xAF, 0xA9, 0x09, 0x85
+        .db 0x37, 0x80, 0xC3, 0xA5, 0x37, 0x29, 0x0F, 0x85, 0x37, 0xC9, 0x0E, 0xD0, 0x0B, 0x20, 0x57, 0xEE
+        .db 0x85, 0x3D, 0xA5, 0x38, 0x85, 0x3C, 0x80, 0x07, 0xC9, 0x0A, 0xD0, 0x03, 0x20, 0x6F, 0xEE, 0xA0
+        .db 0x00, 0x8A, 0x91, 0x3A, 0xC8, 0xA6, 0x37, 0xBD, 0x58, 0xF1, 0x48, 0xC9, 0x01, 0xF0, 0x10, 0xA5
+        .db 0x3C, 0x91, 0x3A, 0xC8, 0xBD, 0x58, 0xF1, 0xC9, 0x02, 0xF0, 0x04, 0xA5, 0x3D, 0x91, 0x3A, 0xA5
+        .db 0x3A, 0x85, 0x38, 0xA5, 0x3B, 0x85, 0x39, 0x20, 0x76, 0xEA, 0x18, 0x68, 0x65, 0x3A, 0x85, 0x3A
+        .db 0x90, 0x02, 0xE6, 0x3B, 0x4C, 0xF0, 0xEB, 0x20, 0x5E, 0xEE, 0xE9, 0x03, 0x80, 0x16, 0x38, 0xA5
+        .db 0x3C, 0xE5, 0x3A, 0x85, 0x3E, 0xA5, 0x3D, 0xE5, 0x3B, 0x85, 0x3F, 0x38, 0xA5, 0x3E, 0x60, 0x20
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+        .db 0xFF, 0x85, 0x3E, 0xA9, 0x00, 0x85, 0x38, 0x85, 0x39, 0x20, 0xE9, 0xFC, 0x90, 0xF1, 0xC9, 0x1B
+        .db 0xD0, 0x01, 0x00, 0xC9, 0x01, 0xF0, 0x0E, 0xC9, 0x3A, 0xD0, 0x03, 0x4C, 0x5A, 0xFD, 0xC9, 0x04
+        .db 0xD0, 0x59, 0x4C, 0xDC, 0xFC, 0xA2, 0x00, 0xA9, 0xFF, 0x85, 0x3E, 0x20, 0xE9, 0xFC, 0x90, 0x4B
+        .db 0x9D, 0x00, 0x03, 0xE8, 0xE0, 0x84, 0xD0, 0xEF, 0xA2, 0x00, 0xBD, 0x00, 0x03, 0xC5, 0x3C, 0xF0
+        .db 0x0B, 0xA9, 0xFE, 0xA2, 0x45, 0x20, 0x30, 0xFE, 0x20, 0x40, 0xFD, 0x00, 0x49, 0xFF, 0xE8, 0xDD
+        .db 0x00, 0x03, 0xF0, 0x0B, 0xA9, 0xFE, 0xA2, 0x45, 0x20, 0x30, 0xFE, 0x20, 0x40, 0xFD, 0x00, 0xA0
+        .db 0x02, 0xB9, 0x00, 0x03, 0x20, 0x4A, 0xFD, 0xC8, 0xC0, 0x82, 0xD0, 0xF5, 0xB9, 0x00, 0x03, 0xC5
+        .db 0x39, 0xD0, 0x08, 0xC8, 0xB9, 0x00, 0x03, 0xC5, 0x38, 0xF0, 0x0B, 0x20, 0x40, 0xFD, 0xA9, 0x15
+        .db 0x20, 0xFB, 0xE7, 0x4C, 0x1F, 0xFC, 0xA2, 0x02, 0xA5, 0x3C, 0xC9, 0x01, 0xD0, 0x12, 0xA5, 0x3F
+        .db 0xF0, 0x0E, 0xBD, 0x00, 0x03, 0x85, 0x3A, 0xE8, 0xBD, 0x00, 0x03, 0x85, 0x3B, 0xE8, 0xC6, 0x3F
+        .db 0xA0, 0x00, 0xBD, 0x00, 0x03, 0x91, 0x3A, 0xE6, 0x3A, 0xD0, 0x02, 0xE6, 0x3B, 0xE8, 0xE0, 0x82
+        .db 0xD0, 0xF0, 0xE6, 0x3C, 0xA9, 0x06, 0x20, 0xFB, 0xE7, 0x4C, 0x1F, 0xFC, 0xA9, 0x06, 0x20, 0xFB
+        .db 0xE7, 0xA9, 0xFE, 0xA2, 0x75, 0x20, 0x30, 0xFE, 0x60, 0xA9, 0x00, 0x85, 0x3D, 0x20, 0xF8, 0xE7
+        .db 0xB0, 0x09, 0xC6, 0x3D, 0xD0, 0xF7, 0xC6, 0x3E, 0xD0, 0xF3, 0x18, 0x60, 0xA2, 0x00, 0xBD, 0x0B
+        .db 0xFD, 0xF0, 0x07, 0x20, 0xFB, 0xE7, 0xE8, 0x4C, 0xFE, 0xFC, 0x60, 0x42, 0x65, 0x67, 0x69, 0x6E
+        .db 0x20, 0x58, 0x4D, 0x4F, 0x44, 0x45, 0x4D, 0x2F, 0x43, 0x52, 0x43, 0x20, 0x74, 0x72, 0x61, 0x6E
+        .db 0x73, 0x66, 0x65, 0x72, 0x2E, 0x0D, 0x0A, 0x50, 0x72, 0x65, 0x73, 0x73, 0x20, 0x3C, 0x45, 0x73
+        .db 0x63, 0x3E, 0x20, 0x74, 0x6F, 0x20, 0x61, 0x62, 0x6F, 0x72, 0x74, 0x2E, 0x2E, 0x2E, 0x20, 0x00
+        .db 0xA9, 0x70, 0x85, 0x3E, 0x20, 0xE9, 0xFC, 0xB0, 0xF7, 0x60, 0x45, 0x39, 0xAA, 0xA5, 0x38, 0x5D
+        .db 0x00, 0xFB, 0x85, 0x39, 0xBD, 0x00, 0xFA, 0x85, 0x38, 0x60, 0xA9, 0x0D, 0x20, 0xFB, 0xE7, 0xA9
+        .db 0x0A, 0x20, 0xFB, 0xE7, 0xA9, 0x00, 0x85, 0x3E, 0xF0, 0x07, 0x20, 0x0A, 0xFE, 0xC9, 0x3A, 0xD0
+        .db 0xF9, 0x20, 0x13, 0xFE, 0x85, 0x39, 0x85, 0x38, 0x20, 0x13, 0xFE, 0x85, 0x3C, 0x18, 0x65, 0x38
+        .db 0x85, 0x38, 0x20, 0x13, 0xFE, 0x85, 0x3B, 0x18, 0x65, 0x38, 0x85, 0x38, 0x20, 0x13, 0xFE, 0x85
+        .db 0x3D, 0x18, 0x65, 0x38, 0x85, 0x38, 0xA5, 0x3D, 0xD0, 0x2C, 0xA6, 0x39, 0xA0, 0x00, 0x20, 0x13
+        .db 0xFE, 0x91, 0x3B, 0x18, 0x65, 0x38, 0x85, 0x38, 0xC8, 0xCA, 0xD0, 0xF2, 0x20, 0x13, 0xFE, 0x18
+        .db 0x65, 0x38, 0xD0, 0x08, 0xA9, 0x23, 0x8D, 0xC6, 0x3F, 0x4C, 0x6A, 0xFD, 0xA9, 0x46, 0x85, 0x3E
+        .db 0x8D, 0xC6, 0x3F, 0x4C, 0x6A, 0xFD, 0xC9, 0x01, 0xF0, 0x1B, 0xA9, 0xFE, 0xA2, 0x97, 0x20, 0x30
+        .db 0xFE, 0xA5, 0x3D, 0x85, 0x3E, 0x20, 0x60, 0xE7, 0xA9, 0x0D, 0x20, 0xFB, 0xE7, 0xA9, 0x0A, 0x20
+        .db 0xFB, 0xE7, 0x4C, 0x6A, 0xFD, 0x20, 0x13, 0xFE, 0x18, 0x65, 0x38, 0xF0, 0x07, 0xA9, 0xFE, 0xA2
+        .db 0xB1, 0x4C, 0x30, 0xFE, 0xA5, 0x3E, 0xF0, 0x07, 0xA9, 0xFE, 0xA2, 0xCA, 0x4C, 0x30, 0xFE, 0xA9
+        .db 0xFE, 0xA2, 0xE7, 0x20, 0x30, 0xFE, 0x20, 0x40, 0xFD, 0x60, 0x20, 0xF8, 0xE7, 0xC9, 0x1B, 0xD0
+        .db 0x01, 0x00, 0x60, 0xA9, 0x00, 0x85, 0x3F, 0x20, 0x20, 0xFE, 0x0A, 0x0A, 0x0A, 0x0A, 0x85, 0x3F
+        .db 0x20, 0x0A, 0xFE, 0xC9, 0x3A, 0x90, 0x02, 0xE9, 0x08, 0xE9, 0x2F, 0x29, 0x0F, 0x05, 0x3F, 0x60
+        .db 0x85, 0x41, 0x86, 0x40, 0x98, 0x48, 0xA0, 0x00, 0xB1, 0x40, 0xF0, 0x06, 0x20, 0xFB, 0xE7, 0xC8
+        .db 0xD0, 0xF6, 0x68, 0xA8, 0x60, 0x0D, 0x0A, 0x0D, 0x0A, 0x55, 0x6E, 0x65, 0x78, 0x70, 0x65, 0x63
+        .db 0x74, 0x65, 0x64, 0x20, 0x62, 0x6C, 0x6F, 0x63, 0x6B, 0x20, 0x6E, 0x75, 0x6D, 0x62, 0x65, 0x72
+        .db 0x20, 0x72, 0x65, 0x63, 0x65, 0x69, 0x76, 0x65, 0x64, 0x20, 0x41, 0x62, 0x6F, 0x72, 0x74, 0x69
+        .db 0x6E, 0x67, 0x0D, 0x0A, 0x00, 0x0D, 0x0A, 0x58, 0x4D, 0x4F, 0x44, 0x45, 0x4D, 0x2D, 0x43, 0x52
+        .db 0x43, 0x20, 0x64, 0x6F, 0x77, 0x6E, 0x6C, 0x6F, 0x61, 0x64, 0x20, 0x69, 0x73, 0x20, 0x63, 0x6F
+        .db 0x6D, 0x70, 0x6C, 0x65, 0x74, 0x65, 0x00, 0x0D, 0x0A, 0x0D, 0x0A, 0x55, 0x6E, 0x6B, 0x6E, 0x6F
+        .db 0x77, 0x6E, 0x20, 0x72, 0x65, 0x63, 0x6F, 0x72, 0x64, 0x20, 0x74, 0x79, 0x70, 0x65, 0x20, 0x24
+        .db 0x00, 0x0D, 0x0A, 0x0D, 0x0A, 0x42, 0x61, 0x64, 0x20, 0x72, 0x65, 0x63, 0x6F, 0x72, 0x64, 0x20
+        .db 0x63, 0x68, 0x65, 0x63, 0x6B, 0x73, 0x75, 0x6D, 0x21, 0x00, 0x0D, 0x0A, 0x0D, 0x0A, 0x55, 0x70
+        .db 0x6C, 0x6F, 0x61, 0x64, 0x20, 0x46, 0x61, 0x69, 0x6C, 0x65, 0x64, 0x0D, 0x0A, 0x41, 0x62, 0x6F
+        .db 0x72, 0x74, 0x69, 0x6E, 0x67, 0x21, 0x00, 0x0D, 0x0A, 0x0D, 0x0A, 0x55, 0x70, 0x6C, 0x6F, 0x61
+        .db 0x64, 0x20, 0x53, 0x75, 0x63, 0x63, 0x65, 0x73, 0x73, 0x66, 0x75, 0x6C, 0x21, 0x00, 0x00, 0x00
+        .db 0x78, 0xD8, 0xA2, 0xFF, 0x9A, 0xA2, 0xC7, 0xA9, 0xE6, 0x8D, 0xF8, 0x03, 0x8E, 0xF7, 0x03, 0xA2
+        .db 0x65, 0xA9, 0xFF, 0x8D, 0xFE, 0x03, 0x8E, 0xFD, 0x03, 0xA2, 0x65, 0xA9, 0xFF, 0x8D, 0xFB, 0x03
+        .db 0x8E, 0xFA, 0x03, 0xA2, 0x0C, 0xA9, 0xE8, 0x8D, 0xF5, 0x03, 0x8E, 0xF4, 0x03, 0xA9, 0xE7, 0x8D
+        .db 0x05, 0x04, 0xA9, 0xA4, 0x8D, 0x06, 0x04, 0xA9, 0xF4, 0x8D, 0x07, 0x04, 0xA9, 0xA4, 0x8D, 0x08
+        .db 0x04, 0xA9, 0x59, 0x8D, 0x0B, 0x04, 0xA9, 0xE6, 0x8D, 0x0C, 0x04, 0xA9, 0x82, 0x8D, 0x09, 0x04
+        .db 0xA9, 0xE6, 0x8D, 0x0A, 0x04, 0x20, 0x83, 0xA4, 0xA9, 0x00, 0xA8, 0xAA, 0x18, 0xD8, 0x58, 0x6C
+        .db 0xF7, 0x03, 0x6C, 0xFD, 0x03, 0x40, 0xDA, 0x48, 0xBA, 0xBD, 0x03, 0x01, 0x29, 0x10, 0xD0, 0x05
+        .db 0x68, 0xFA, 0x6C, 0xFA, 0x03, 0x68, 0xFA, 0x6C, 0xF4, 0x03, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x62, 0xFF, 0x00, 0xFF, 0x66, 0xFF
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/SR2AV.INC b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/SR2AV.INC
new file mode 100644
index 00000000..690452ff
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/SR2AV.INC
@@ -0,0 +1,135 @@
+; SR to AVSR conversion table
+
+.cseg
+.org 0x1C00
+
+tsr2av:
+
+	.db	0x80, 0x81	; 00 & 01
+	.db	0x82, 0x83	; 02 & 03
+	.db	0x00, 0x01	; 04 & 05
+	.db	0x02, 0x03	; 06 & 07
+	.db	0x80, 0x81	; 08 & 09
+	.db	0x82, 0x83	; 0A & 0B
+	.db	0x00, 0x01	; 0C & 0D
+	.db	0x02, 0x03	; 0E & 0F
+	.db	0x80, 0x81	; 10 & 11
+	.db	0x82, 0x83	; 12 & 13
+	.db	0x00, 0x01	; 14 & 15
+	.db	0x02, 0x03	; 16 & 17
+	.db	0x80, 0x81	; 18 & 19
+	.db	0x82, 0x83	; 1A & 1B
+	.db	0x00, 0x01	; 1C & 1D
+	.db	0x02, 0x03	; 1E & 1F
+	.db	0x80, 0x81	; 20 & 21
+	.db	0x82, 0x83	; 22 & 23
+	.db	0x00, 0x01	; 24 & 25
+	.db	0x02, 0x03	; 26 & 27
+	.db	0x80, 0x81	; 28 & 29
+	.db	0x82, 0x83	; 2A & 2B
+	.db	0x00, 0x01	; 2C & 2D
+	.db	0x02, 0x03	; 2E & 2F
+	.db	0x80, 0x81	; 30 & 31
+	.db	0x82, 0x83	; 32 & 33
+	.db	0x00, 0x01	; 34 & 35
+	.db	0x02, 0x03	; 36 & 37
+	.db	0x80, 0x81	; 38 & 39
+	.db	0x82, 0x83	; 3A & 3B
+	.db	0x00, 0x01	; 3C & 3D
+	.db	0x02, 0x03	; 3E & 3F
+	.db	0xC0, 0xC1	; 40 & 41
+	.db	0xC2, 0xC3	; 42 & 43
+	.db	0x40, 0x41	; 44 & 45
+	.db	0x42, 0x43	; 46 & 47
+	.db	0xC0, 0xC1	; 48 & 49
+	.db	0xC2, 0xC3	; 4A & 4B
+	.db	0x40, 0x41	; 4C & 4D
+	.db	0x42, 0x43	; 4E & 4F
+	.db	0xC0, 0xC1	; 50 & 51
+	.db	0xC2, 0xC3	; 52 & 53
+	.db	0x40, 0x41	; 54 & 55
+	.db	0x42, 0x43	; 56 & 57
+	.db	0xC0, 0xC1	; 58 & 59
+	.db	0xC2, 0xC3	; 5A & 5B
+	.db	0x40, 0x41	; 5C & 5D
+	.db	0x42, 0x43	; 5E & 5F
+	.db	0xC0, 0xC1	; 60 & 61
+	.db	0xC2, 0xC3	; 62 & 63
+	.db	0x40, 0x41	; 64 & 65
+	.db	0x42, 0x43	; 66 & 67
+	.db	0xC0, 0xC1	; 68 & 69
+	.db	0xC2, 0xC3	; 6A & 6B
+	.db	0x40, 0x41	; 6C & 6D
+	.db	0x42, 0x43	; 6E & 6F
+	.db	0xC0, 0xC1	; 70 & 71
+	.db	0xC2, 0xC3	; 72 & 73
+	.db	0x40, 0x41	; 74 & 75
+	.db	0x42, 0x43	; 76 & 77
+	.db	0xC0, 0xC1	; 78 & 79
+	.db	0xC2, 0xC3	; 7A & 7B
+	.db	0x40, 0x41	; 7C & 7D
+	.db	0x42, 0x43	; 7E & 7F
+	.db	0x84, 0x85	; 80 & 81
+	.db	0x86, 0x87	; 82 & 83
+	.db	0x04, 0x05	; 84 & 85
+	.db	0x06, 0x07	; 86 & 87
+	.db	0x84, 0x85	; 88 & 89
+	.db	0x86, 0x87	; 8A & 8B
+	.db	0x04, 0x05	; 8C & 8D
+	.db	0x06, 0x07	; 8E & 8F
+	.db	0x84, 0x85	; 90 & 91
+	.db	0x86, 0x87	; 92 & 93
+	.db	0x04, 0x05	; 94 & 95
+	.db	0x06, 0x07	; 96 & 97
+	.db	0x84, 0x85	; 98 & 99
+	.db	0x86, 0x87	; 9A & 9B
+	.db	0x04, 0x05	; 9C & 9D
+	.db	0x06, 0x07	; 9E & 9F
+	.db	0x84, 0x85	; A0 & A1
+	.db	0x86, 0x87	; A2 & A3
+	.db	0x04, 0x05	; A4 & A5
+	.db	0x06, 0x07	; A6 & A7
+	.db	0x84, 0x85	; A8 & A9
+	.db	0x86, 0x87	; AA & AB
+	.db	0x04, 0x05	; AC & AD
+	.db	0x06, 0x07	; AE & AF
+	.db	0x84, 0x85	; B0 & B1
+	.db	0x86, 0x87	; B2 & B3
+	.db	0x04, 0x05	; B4 & B5
+	.db	0x06, 0x07	; B6 & B7
+	.db	0x84, 0x85	; B8 & B9
+	.db	0x86, 0x87	; BA & BB
+	.db	0x04, 0x05	; BC & BD
+	.db	0x06, 0x07	; BE & BF
+	.db	0xC4, 0xC5	; C0 & C1
+	.db	0xC6, 0xC7	; C2 & C3
+	.db	0x44, 0x45	; C4 & C5
+	.db	0x46, 0x47	; C6 & C7
+	.db	0xC4, 0xC5	; C8 & C9
+	.db	0xC6, 0xC7	; CA & CB
+	.db	0x44, 0x45	; CC & CD
+	.db	0x46, 0x47	; CE & CF
+	.db	0xC4, 0xC5	; D0 & D1
+	.db	0xC6, 0xC7	; D2 & D3
+	.db	0x44, 0x45	; D4 & D5
+	.db	0x46, 0x47	; D6 & D7
+	.db	0xC4, 0xC5	; D8 & D9
+	.db	0xC6, 0xC7	; DA & DB
+	.db	0x44, 0x45	; DC & DD
+	.db	0x46, 0x47	; DE & DF
+	.db	0xC4, 0xC5	; E0 & E1
+	.db	0xC6, 0xC7	; E2 & E3
+	.db	0x44, 0x45	; E4 & E5
+	.db	0x46, 0x47	; E6 & E7
+	.db	0xC4, 0xC5	; E8 & E9
+	.db	0xC6, 0xC7	; EA & EB
+	.db	0x44, 0x45	; EC & ED
+	.db	0x46, 0x47	; EE & EF
+	.db	0xC4, 0xC5	; F0 & F1
+	.db	0xC6, 0xC7	; F2 & F3
+	.db	0x44, 0x45	; F4 & F5
+	.db	0x46, 0x47	; F6 & F7
+	.db	0xC4, 0xC5	; F8 & F9
+	.db	0xC6, 0xC7	; FA & FB
+	.db	0x44, 0x45	; FC & FD
+	.db	0x46, 0x47	; FE & FF
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/avr6502.asm b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/avr6502.asm
new file mode 100644
index 00000000..ecfec9df
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/avr6502.asm
@@ -0,0 +1,143 @@
+; Emulated 65C02 SOC
+;
+; By Daryl Rictor (c)2012
+;
+; 16k - 256 byte RAM
+; 48k ROM (in flash)
+; IO @ 3Fxx
+
+;******************************************************************************
+; include AVRASM definitions
+;******************************************************************************
+.include "m1284Pdef.inc"
+
+;******************************************************************************
+; Set Register definitions
+;******************************************************************************
+.def  i		= R16
+.def  j		= R17
+.def  zero	= R2
+.def  one	= R3
+.def  mmap  = R4
+
+.def  free1 = R12				; unused register pair
+.def  free2 = R13
+
+;******************************************************************************
+; Load Lower Flash Tables starting at 0x1B00 (below ROM image)
+;******************************************************************************
+
+.include	"av2sr.inc"
+.include	"sr2av.inc"
+.include	"opcjmp.inc"
+.include	"ioexe.inc"
+.include	"sbcrom.inc"
+
+
+;******************************************************************************
+; Program Starts here on Reset
+;******************************************************************************
+STARTUP:						; first line executed after reset 
+	CLI							; disable interupts
+
+;******************************************************************************
+; Initialize the I/O Ports
+;******************************************************************************
+; port A pins 
+	ldi		i, 0xff				; 
+	out		porta, i			; 
+	LDI		i, 0x00				; 
+	out		ddra, i				; 
+
+; port B pins 
+	LDI		i, 0xff				; 
+	out		portb, i			; 
+	LDI		i, 0x00				; 
+	out		ddrb, i				; 
+
+; port C pins 
+	ldi		i, 0xff				; 
+	out		portc, i			; 
+	LDI		i, 0x00				; 
+	out		ddrc, i				; 
+
+; port D pins
+	ldi		i, 0xff				;
+	out		portd, i			;
+	LDI		i, 0x00				;
+	out		ddrd, i				;
+
+;******************************************************************************
+; Init other CPU I/O registers
+;******************************************************************************
+	ldi		i, 0x80
+	out		ACSR, i				; turn off comparator
+
+	ldi		i, 0x40				; set stack pointer to top of SRAM 
+	out		SPH, i				;
+	ldi		i, 0xff				; 
+	out		SPL, i				;
+
+;******************************************************************************
+; Init RS-232 port
+;******************************************************************************
+InitRS232:
+.include	"serial.asm"
+
+;******************************************************************************
+; Init program registers
+;******************************************************************************
+	clr		zero
+	ldi		i, 0x01
+	mov		one, i
+	ldi		i, 0x3F			; IO Page
+	mov 	mmap, i
+
+;******************************************************************************
+; Show Engine version
+;******************************************************************************
+	ldi		zl, low(version*2)
+	ldi		zh, high(version*2)
+	out		rampz, one
+ver1:
+	elpm	i, Z+
+	tst		i
+	breq	Ready
+	call	Put_Chr
+	rjmp	ver1	
+
+;******************************************************************************
+; Main Loop
+;******************************************************************************
+Ready:
+	out		rampz, zero
+	call	CPU_RESET
+	jmp		Main		; Enter CPU Execute Loop
+
+;***********************
+; Version #
+;***********************
+version: .db 0x0d,0x0a,"Version 3.1 - Starting Emulator... ", 0x0d, 0x0a, 0x00
+
+;******************************************************************************
+; include CPU emulator and bootloader files (after ROM image)
+;******************************************************************************
+; these files in the application area
+
+.include	"cpu.asm"
+
+; These files are in the Bootloader section
+.include	"bootload.asm"
+.include	"xmodem-receive.asm"
+;
+; $0000-$3EFF - 15.75k RAM
+; $3F00-$3FFF - I/O
+; $4000-$FFFF - 48k ROM 
+;
+; Version 2.7 supports AVR interrupts and the full AVR IO page access
+; 	      FULL WDC 65C02 instruction set, including BCD mode
+; V 3.0 changed opcode excution to a macro and added a table for IO execute
+;       also moved IRQ flag from GPIOR0 ro R5 - EEPROM flag moved to GPIOR0
+;	fixed NOP byte count for unused opcoded
+;	updated bootloader to load engine across the $8000 word boundary
+; Version 3.1 - corrected opcode behavior
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/avr6502.aws b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/avr6502.aws
new file mode 100644
index 00000000..98a4c65d
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/avr6502.aws
@@ -0,0 +1 @@
+<AVRWorkspace><IOSettings><CurrentRegisters/></IOSettings><part name="ATMEGA1284P"/><Files/></AVRWorkspace>
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/boot1.hex b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/boot1.hex
new file mode 100644
index 00000000..05ad53c2
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/boot1.hex
@@ -0,0 +1,8194 @@
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diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/bootload.asm b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/bootload.asm
new file mode 100644
index 00000000..d294ded4
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/bootload.asm
@@ -0,0 +1,249 @@
+;
+; AVR Bootloader
+;
+.org	0xF000
+
+;******************************************************************************
+; Code Begins at 0xF000
+; System IRQ jump table from 0xF000 - 0xF045
+;******************************************************************************
+	jmp		RESET				; External Reset
+
+	ldi		irv, 0x02
+	rjmp		INT0V				; External Interrupt Request 0
+	ldi		irv, 0x04
+	rjmp		INT1V				; External Interrupt Request 1
+	ldi		irv, 0x06
+	rjmp		INT2V				; External Interrupt Request 2
+	ldi		irv, 0x08
+	rjmp		PCINT0V				; Pin Change Interrupt Request 0
+	ldi		irv, 0x0a
+	rjmp		PCINT1V				; Pin Change Interrupt Request 1
+	ldi		irv, 0x0c
+	rjmp		PCINT2V				; Pin Change Interrupt Request 2
+	ldi		irv, 0x0e
+	rjmp		PCINT3V				; Pin Change Interrupt Request 3
+	ldi		irv, 0x10
+	rjmp		WDT					; Watchdog Time-out Interrupt
+	ldi		irv, 0x12
+	rjmp		TIMER2_COMPA		; Timer/Counter2 Compare Match A
+	ldi		irv, 0x14
+	rjmp		TIMER2_COMPB		; Timer/Counter2 Compare Match B
+	ldi		irv, 0x16
+	rjmp		TIMER2_OVF			; Timer/Counter2 Overflow
+	ldi		irv, 0x18
+	rjmp		TIMER1_CAPT			; Timer/Counter1 Capture Event
+	ldi		irv, 0x1a
+	rjmp		TIMER1_COMPA		; Timer/Counter1 Compare Match A
+	ldi		irv, 0x1c
+	rjmp		TIMER1_COMPB		; Timer/Counter1 Compare Match B
+	ldi		irv, 0x1e
+	rjmp		TIMER1_OVF			; Timer/Counter1 Overflow
+	ldi		irv, 0x20
+	rjmp		TIMER0_COMPA		; Timer/Counter0 Compare Match A
+	ldi		irv, 0x22
+	rjmp		TIMER0_COMPB		; Timer/Counter0 Compare match B
+	ldi		irv, 0x24
+	rjmp		TIMER0_OVF			; Timer/Counter0 Overflow
+	ldi		irv, 0x26
+	rjmp		SPI_STC				; SPI Serial Transfer Complete
+	ldi		irv, 0x28
+	rjmp		USART0_RX			; USART0 Rx Complete
+	ldi		irv, 0x2a
+	rjmp		USART0_UDRE			; USART0 Data Register Empty
+	ldi		irv, 0x2c
+	rjmp		USART0_TX			; USART0 Tx Complete
+	ldi		irv, 0x2e
+	rjmp		ANALOG_COMP			; Analog Comparator	ldi		irv, 0x01
+	ldi		irv, 0x30
+	rjmp		ADCC				; ADC Conversion Complete
+	ldi		irv, 0x32
+	rjmp		EE_READY			; EEPROM Ready
+	ldi		irv, 0x34
+	rjmp		TWI					; 2-wire Serial Interface
+	ldi		irv, 0x36
+	rjmp		SPM_READY			; Store Program Memory Ready
+	ldi		irv, 0x38
+	rjmp		USART1_RX			; USART1 Rx Complete
+	ldi		irv, 0x3a
+	rjmp		USART1_UDRE			; USART1 Data Register Empty
+	ldi		irv, 0x3c
+	rjmp		USART1_TX			; USART1 Tx Complete
+	ldi		irv, 0x3e
+	rjmp		TIMER3_CAPT			; Timer/Counter3 Capture Event
+	ldi		irv, 0x40
+	rjmp		TIMER3_COMPA		; Timer/Counter3 Compare Match A
+	ldi		irv, 0x42
+	rjmp		TIMER3_COMPB		; Timer/Counter3 Compare Match B
+	ldi		irv, 0x44
+	rjmp		TIMER3_OVF			; Timer/Counter3 Overflow
+
+;******************************************************************************
+; unused IRQ vector's point to software reset code
+;******************************************************************************
+INT0V:							; External Interrupt Request 0
+INT1V:							; External Interrupt Request 1
+INT2V:							; External Interrupt Request 2
+PCINT0V:						; Pin Change Interrupt Request 0
+PCINT1V:						; Pin Change Interrupt Request 1
+PCINT2V:						; Pin Change Interrupt Request 2
+PCINT3V:						; Pin Change Interrupt Request 3
+WDT:							; Watchdog Time-out Interrupt
+TIMER2_COMPA:					; Timer/Counter2 Compare Match A
+TIMER2_COMPB:					; Timer/Counter2 Compare Match B
+TIMER2_OVF:						; Timer/Counter2 Overflow
+TIMER1_CAPT:					; Timer/Counter1 Capture Event
+TIMER1_COMPA:					; Timer/Counter1 Compare Match A
+TIMER1_COMPB:					; Timer/Counter1 Compare Match B
+TIMER1_OVF:						; Timer/Counter1 Overflow
+TIMER0_COMPA:					; Timer/Counter0 Compare Match A
+TIMER0_COMPB:					; Timer/Counter0 Compare match B
+TIMER0_OVF:						; Timer/Counter0 Overflow
+SPI_STC:						; SPI Serial Transfer Complete
+USART0_RX:						; USART0 Rx Complete
+USART0_UDRE:					; USART0 Data Register Empty
+USART0_TX:						; USART0 Tx Complete
+ANALOG_COMP:					; Analog Comparator
+ADCC: 							; ADC Conversion Complete
+EE_READY:						; EEPROM Ready
+TWI:							; 2-wire Serial Interface
+SPM_READY:						; Store Program Memory Ready
+USART1_RX:						; USART1 Rx Complete
+USART1_UDRE:					; USART1 Data Register Empty
+USART1_TX:						; USART1 Tx Complete
+TIMER3_CAPT:					;  Timer/Counter3 Capture Event
+TIMER3_COMPA:					;  Timer/Counter3 Compare Match A
+TIMER3_COMPB:					;  Timer/Counter3 Compare Match B
+TIMER3_OVF:						;  Timer/Counter3 Overflow
+
+; master IRQ handler
+	or		IFLAG, one			; IRQ trigger flag, bit 0
+	ret							; do not set I flag here
+
+;******************************************************************************
+; Program Starts here on Reset
+;******************************************************************************
+RESET:							; first line executed after reset 
+	CLI							; disable interupts
+
+; move IRQ table to bootloader
+	in		i, mcucr
+	andi	i, 0xfc
+	mov		j, i
+	ori		i, 0x01
+	ori		j, 0x02
+	out		mcucr, i
+	out		mcucr, j			; IRQ jump table in bootloader
+
+;******************************************************************************
+; Initialize the I/O Ports
+;******************************************************************************
+; port A pins 
+	ldi		i, 0xff				; 
+	out		porta, i			; 
+	LDI		i, 0x00				; 
+	out		ddra, i				; 
+
+; port B pins 
+	LDI		i, 0xff				; 
+	out		portb, i			; 
+	LDI		i, 0x00				; 
+	out		ddrb, i				; 
+
+; port C pins 
+	ldi		i, 0xff				; 
+	out		portc, i			; 
+	LDI		i, 0x00				; 
+	out		ddrc, i				; 
+
+; port D pins
+	ldi		i, 0xff				;
+	out		portd, i			;
+	LDI		i, 0x00				;
+	out		ddrd, i				;
+
+;******************************************************************************
+; Init other CPU I/O registers
+;******************************************************************************
+	ldi     i, 0x80
+	out     ACSR, i				; turn off comparator
+
+	ldi		i, 0x40				; set stack pointer to top of SRAM 
+	out		SPH, i				;
+	ldi		i, 0xff				; 
+	out		SPL, i				;
+
+;******************************************************************************
+; Init RS-232 port
+;******************************************************************************
+.include	"serial.asm"
+
+;******************************************************************************
+; Init program registers
+;******************************************************************************
+	clr		zero
+	ldi		i, 0x01
+	mov		one, i
+
+;******************************************************************************
+; Boot Loader Prompts
+;******************************************************************************
+Boot:
+	out		rampz, one
+	ldi		zl, low(greet*2)
+	ldi		zh, high(greet*2)
+
+	clr		R24
+	clr		R25
+	clr		R26
+
+Boot1:
+	elpm	i, Z+
+	tst		i
+	breq	Boot2
+	call	Put_Chr
+	rjmp	Boot1
+
+Boot2:							; autostart EMU
+	adiw	R24, 0x01			; after 24 bit counter
+	brne	Boot3				; cycles
+	inc		R26
+	breq	Boot4
+	mov		i, R26
+	andi	i, 0x1F
+	brne	Boot3
+	ldi		i, '.'
+	call	Put_Chr
+
+Boot3:
+	lds		i, udr0
+	cpi		i, 0x0d
+	breq	Boot4
+	cpi		i, 'u'
+	breq	Load
+	cpi		i, 'U'
+	breq	Load
+	cpi		i, '|'
+	brne	Boot2
+	clr		zsav				; set start address for Emulator
+	clr		zsavh				; engine and ROM image
+	ldi		i, 0x36				; start of Datatables
+	mov		zsavh, i
+	call	Xmodem1
+	rjmp	Boot				; load Emu Engine 
+
+Load:
+	call	xmodem				; load ROM image
+	rjmp	Boot
+
+Boot4:
+	out		rampz, zero
+	jmp		Startup
+
+;******************************************************************************
+; Text messages (version from AVR6502.asm)
+;******************************************************************************
+greet:
+.db	0x0d, 0x0a, "********************************* ", 0x0d, 0x0a
+.db	"AVR 65C02 Emulator ", 0x0d, 0x0a, "By Daryl Rictor  (c) 2013", 0x0d, 0x0a, 0x0d, 0x0a
+.db	"Press Enter to Start System", 0x0d, 0x0a, "Press 'U' to upload new ROM image ", 0x0d, 0x0a, 0x00
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/cpu.asm b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/cpu.asm
new file mode 100644
index 00000000..0a7e8e9b
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/cpu.asm
@@ -0,0 +1,2208 @@
+;
+; 65C02 Engine
+; Written by Daryl Rictor
+; (c) 2012
+;
+
+; Xl,Xh = PC
+; Yl, Yh = Stack ptr
+; Zl, Zh = memory access
+
+; GPIOR0 = EEPROM write control
+
+.def	AR  = R18	; must be above R15
+.def	XR  = R14
+.def	YR  = R15
+.def	SR  = R19
+.def  AVSR  = R20
+.def   IRV  = R21
+.def IFLAG  = R5
+
+;SR bit weights
+.set ss = 0x80
+.set so	= 0x40
+.set sx	= 0x20
+.set sb	= 0x10
+.set sd = 0x08
+.set si = 0x04
+.set sz = 0x02
+.set sc = 0x01
+
+;SR bit positions
+.set ssp = 7
+.set sop = 6
+.set sxp = 5
+.set sbp = 4
+.set sdp = 3
+.set sip = 2
+.set szp = 1
+.set scp = 0
+
+;AVR bit weights
+.set ai = 0x80
+.set at	= 0x40
+.set ah	= 0x20
+.set as	= 0x10
+.set av	= 0x08
+.set an = 0x04
+.set az = 0x02
+.set ac = 0x01
+
+;AVR Sreg Bit positions
+.set aip = 7
+.set atp = 6
+.set ahp = 5
+.set asp = 4
+.set avp = 3
+.set anp = 2
+.set azp = 1
+.set acp = 0
+
+; zero page RAM location
+.set ZP = 0x01		; zero page in SRAM
+
+;**********************
+; general macros
+;**********************
+
+.macro SVSR
+	in		avsr, SREG
+.endmacro
+
+.macro LDSR
+	out		sreg, avsr
+.endmacro
+
+.macro AV2SR
+	mov		zl, avsr
+	ldi		zh, high(tav2sr*2)
+	lpm		i, Z
+	andi	sr, sx+sb+sd+si
+	or		sr, i
+.endmacro
+
+.macro SR2AV
+	mov		zl, sr
+	ldi		zh, high(tsr2av*2)
+	lpm		avsr, Z
+	out		sreg, avsr	; used to update I flag
+.endmacro
+
+;*******************************
+; CPU execution macro 
+;*******************************
+
+.macro EXEC
+	sbrc	IFLAG, 0	; if IRQ triggered
+	rcall	INTJMP	
+
+	movw	ZL, XL		;
+	adiw	XL, 1		;
+	cp		zh, mmap	; IO page
+	brcs	RAM
+
+ROM:	; and IO, which will return EA - nop
+	lpm		zl, Z
+	ldi		zh, high(opctbl)
+	lsl		zl
+	adc		zh, zero	; pointer to opcode jump
+	ijmp				; call opc code
+
+RAM:
+	inc		zh
+	ld		zl, Z
+	ldi		zh, high(opctbl)
+	lsl		zl
+	adc		zh, zero	; pointer to opcode jump
+	ijmp				; call opc code
+
+INTJMP:
+	jmp		cpu_irq     ; execute it now
+.endmacro
+
+;**********************
+; Memory Access macros
+;**********************
+
+.macro READ
+	cp		zh, mmap	; IO page
+	breq	IO
+	brcs	RAM
+ROM:
+	lpm		i, Z
+	rjmp	done
+IO:
+	cpi		zl, 0x20
+	brcs	IOR1
+	ldi		zh, 0x00
+	ld		i, Z
+	mov		zh, mmap
+	rjmp	done
+
+IOR1:
+	mov		i, irv		; interrupt vector
+	rjmp	done
+
+RAM:
+	inc		zh
+	ld		i, Z
+	dec		zh
+done:
+.endmacro
+
+.macro READZ
+	cp		zh, mmap	; IO page
+	breq	IO
+	brcs	RAM
+ROM:
+	lpm		zl, Z
+	rjmp	done
+IO:
+	cpi		zl, 0x20
+	brcs	IOR1
+	ldi		zh, 0x00
+	rjmp	RAM1
+
+IOR1:
+	mov		zl, irv		; interrupt vector
+	rjmp	done
+
+RAM:
+	inc		zh
+RAM1:
+	ld		zl, Z
+done:
+.endmacro
+
+.macro READ2
+	cp		zh, mmap	; IO page
+	breq	IO
+	brcs	RAM
+ROM:
+	lpm		i, Z+
+	lpm		j, Z
+	rjmp	done
+IO:
+	cpi		zl, 0x20	; *** reading 0x1f will result in no read of 0x20
+	brcc	IOR21
+	mov		i, irv		; interrupt vector
+	mov		j, zero
+	rjmp	done
+
+IOR21:
+	ldi		ZH, 0xff	; *** reading IO 0xff will result in reading 0xff and RAM 0x100 vs. ROM
+RAM:
+	inc		zh
+	ld		i, Z+
+	ld		j, Z
+done:
+	movw	ZL, i
+.endmacro
+
+.macro READZP
+	ldi		ZH, ZP
+	ld		i, Z
+.endmacro
+
+.macro READ2ZP
+	ldi		ZH, ZP
+	ld		i, Z
+	inc		zl
+	ld		j, Z
+	movw	ZL, i
+.endmacro
+
+.macro WRITE
+	cp		zh, mmap	; IO page
+	breq	IO
+	brcc	done		; ROM
+RAM:
+	inc		zh
+	st		Z, i
+	rjmp	done
+IO:
+	cpi		zl, 0x20	; writes to 0x00 - 0x1f will result in EEPROM Write
+	brcc	IOW1		
+	in		i, gpior0   ; if GPIOR0 is set to 5A and write to $3F0x or $3F1x,
+	cpi		i, 0x5a     ; then do a write eeprom sequence     
+	brne	done		; besure to set GPIOR0 <> 5A for safety    
+	sbi	eecr, EEMPE
+	sbi	eecr, EEPE
+	rjmp	done
+IOW1:
+	clr		ZH
+	st		Z, i
+done:
+.endmacro
+
+.macro WRITEZP
+	st		Z, i
+.endmacro
+
+;**********************
+; address mode macros
+;**********************
+
+.macro _ABS
+	READ2
+	adiw	XL, 0x02
+.endmacro
+
+.macro _ABSX
+	READ2
+	add		ZL, XR	
+	adc		ZH, ZERO	; test for overflow
+	adiw	XL, 0x02
+.endmacro
+
+.macro _ABSY
+	READ2
+	add		ZL, YR	
+	adc		ZH, ZERO	; test for overflow
+	adiw	XL, 0x02
+.endmacro
+
+.macro _IMM
+	; imm Z already set	
+	adiw	XL, 0x01
+.endmacro
+
+.macro _IMP
+.endmacro
+
+.macro _INDX
+	READZ
+	add		ZL, XR
+	READ2ZP
+	adiw	XL, 0x01
+.endmacro
+
+.macro _INDY
+	READZ
+	READ2ZP
+	add		ZL, YR
+	adc		ZH, zero 
+	adiw	XL, 0x01
+.endmacro
+
+.macro _IZPG
+	READZ
+	READ2ZP
+	adiw	XL, 0x01
+.endmacro
+
+.macro _REL
+	movw	zl, XL
+	READZ
+	sec					; add 1 to PC using C flag
+	tst		zl
+	brmi	back
+	adc		XL, zl
+	adc		XH, zero
+	rjmp	done	
+back:
+	adc		XL, zl
+	brcs	done
+	dec		XH
+done:
+.endmacro
+
+.macro _ZPG
+	READZ
+	adiw	XL, 0x01
+.endmacro
+
+.macro _ZPGX
+	READZ
+	add		ZL, XR
+	adiw	XL, 0x01
+.endmacro
+
+.macro _ZPGY
+	READZ
+	add		ZL, YR
+	adiw	XL, 0x01
+.endmacro
+
+;**********************
+; opcode macros
+;**********************
+
+.macro _ADC
+	READZ
+	LDSR
+	adc		ar, zl
+	sbrs	sr, sdp		; check decimal mode
+	rjmp	_ADC1
+	in		j, sreg		; save flags
+	ldi		i, 0x66
+	add		AR, i
+	brcc	BCDA0
+	ori		j, 0x01		; c flag set	
+BCDA0:
+	sbrc	j, 0		; c flag
+	andi	i, 0x0F		; 
+	brhc	BCDA1
+	ori		j, 0x20		; HC=1
+BCDA1:
+	sbrc	j, 5		; HC
+	andi	i, 0xF0
+	sub		AR, i
+	ror		j			; restore C
+	tst		ar			; set N,Z
+_ADC1:
+	SVSR
+	bst		avsr, avp	; get V flag
+	bld		avsr, atp	; move to T flag
+.endmacro
+
+.macro _ADCZ
+	READZP
+	LDSR
+	adc		ar, i
+	sbrs	sr, sdp		; check decimal mode
+	rjmp	_ADC1
+	in		j, sreg		; save flags
+	ldi		i, 0x66
+	add		AR, i
+	brcc	BCDA0
+	ori		j, 0x01		; c flag set	
+BCDA0:
+	sbrc	j, 0		; c flag
+	andi	i, 0x0F		; 
+	brhc	BCDA1
+	ori		j, 0x20		; HC=1
+BCDA1:
+	sbrc	j, 5		; HC
+	andi	i, 0xF0
+	sub		AR, i
+	ror		j			; restore C
+	tst		ar			; set N,Z
+_ADC1:
+	SVSR
+	bst		avsr, avp	; get V flag
+	bld		avsr, atp	; move to T flag
+.endmacro
+
+.macro _AND
+	READZ
+	LDSR
+	and		ar, zl
+	SVSR
+.endmacro
+
+.macro _ANDZ
+	READZP
+	LDSR
+	and		ar, i
+	SVSR
+.endmacro
+	
+.macro _ASL
+	READ
+	LDSR
+	lsl		i
+	SVSR
+	WRITE
+.endmacro
+
+.macro _ASLZ
+	READZP
+	LDSR
+	lsl		i
+	SVSR
+	WRITEZP
+.endmacro
+
+.macro _BBR				; passed bit test byte as parameter
+	movw	zl, XL			;
+	adiw	XL, 0x02	; move PC to next instruction 
+	READ2				; i=zp addr, j= branch	
+	READZP
+	andi	i, @0		; test bit
+	brne	done
+
+	tst		j			; test for forward or backward
+	brmi	back
+	add		XL, j
+	adc		XH, zero
+	rjmp	done	
+back:
+	add		XL, j
+	brcs	done
+	dec		XH
+done:
+.endmacro
+
+.macro _BBS				; passed bit test byte as parameter
+	movw	zl, XL
+	adiw	XL, 0x02	; move PC to next instruction
+	READ2	
+	READZP
+	andi	i, @0		; test bit
+	breq	done
+	tst		j			; test for forward or backward
+	brmi	back
+	add		XL, j
+	adc		XH, zero
+	rjmp	done	
+back:
+	add		XL, j
+	brcs	done
+	dec		XH
+done:
+.endmacro
+
+.macro _BIT
+	READZ
+	mov		j, zl
+	LDSR
+	and		zl, ar
+	SVSR
+	bst		j, ssp
+	bld		avsr, anp
+	bst		j, sop
+	bld		avsr, atp	; V to T
+.endmacro
+
+.macro _BITZ
+	READZP
+	mov		j, i
+	LDSR
+	and		i, ar
+	SVSR
+	bst		j, ssp
+	bld		avsr, anp
+	bst		j, sop
+	bld		avsr, atp	; V to T
+.endmacro
+
+.macro _CMP
+	READZ
+	LDSR
+	cp		ar, zl
+	SVSR
+	eor		avsr, one	; toggle C bit
+.endmacro
+
+.macro _CMPZ
+	READZP
+	LDSR
+	cp		ar, i
+	SVSR
+	eor		avsr, one	; toggle C bit
+.endmacro
+
+.macro _CPX
+	READZ
+	LDSR
+	cp		xr, zl
+	SVSR
+	eor		avsr, one	; toggle C bit
+.endmacro
+
+.macro _CPXZ
+	READZP
+	LDSR
+	cp		xr, i
+	SVSR
+	eor		avsr, one	; toggle C bit
+.endmacro
+
+.macro _CPY
+	READZ
+	LDSR
+	cp		yr, zl
+	SVSR
+	eor		avsr, one	; toggle C bit
+.endmacro
+
+.macro _CPYZ
+	READZP
+	LDSR
+	cp		yr, i
+	SVSR
+	eor		avsr, one	; toggle C bit
+.endmacro
+
+.macro _DEC
+	READ
+	LDSR
+	dec		i
+	SVSR
+	WRITE
+.endmacro
+
+.macro _DECZ
+	READZP
+	LDSR
+	dec		i
+	SVSR
+	WRITEZP
+.endmacro
+
+
+.macro _EOR
+	READZ
+	LDSR
+	eor		ar, zl
+	SVSR
+.endmacro
+
+.macro _EORZ
+	READZP
+	LDSR
+	eor		ar, i
+	SVSR
+.endmacro
+
+.macro _INC
+	READ
+	LDSR
+	inc		i
+	SVSR
+	WRITE
+.endmacro
+
+.macro _INCZ
+	READZP
+	LDSR
+	inc		i
+	SVSR
+	WRITEZP
+.endmacro
+
+.macro _LDA
+	READZ
+	LDSR
+	mov		ar, zl
+	tst		ar
+	SVSR
+.endmacro
+
+.macro _LDAZ
+	READZP
+	LDSR
+	mov		ar, i
+	tst		ar
+	SVSR
+.endmacro
+
+.macro _LDX
+	READZ
+	LDSR
+	mov		xr, zl
+	tst		xr
+	SVSR
+.endmacro
+
+.macro _LDXZ
+	READZP
+	LDSR
+	mov		xr, i
+	tst		xr
+	SVSR
+.endmacro
+
+.macro _LDY
+	READZ
+	LDSR
+	mov		yr, zl
+	tst		yr
+	SVSR
+.endmacro
+
+.macro _LDYZ
+	READZP
+	LDSR
+	mov		yr, i
+	tst		yr
+	SVSR
+.endmacro
+
+.macro _LSR
+	READ
+	LDSR
+	lsr		i
+	SVSR
+	WRITE
+.endmacro
+
+.macro _LSRZ
+	READZP
+	LDSR
+	lsr		i
+	SVSR
+	WRITEZP
+.endmacro
+
+.macro _ORA
+	READZ
+	LDSR
+	or		ar, zl
+	SVSR
+.endmacro
+
+.macro _ORAZ
+	READZP
+	LDSR
+	or		ar, i
+	SVSR
+.endmacro
+
+.macro _RMB				; passed bit pos byte as parameter
+	movw	zl, XL
+	_ZPG
+	READZP
+	andi	i, @0		; reset bit
+	WRITEZP
+.endmacro
+
+.macro _ROL
+	READ
+	LDSR
+	rol		i
+	SVSR	
+	WRITE
+.endmacro
+
+.macro _ROLZ
+	READZP
+	LDSR
+	rol		i
+	SVSR	
+	WRITEZP
+.endmacro
+
+.macro _ROR
+	READ
+	LDSR
+	ror		i
+	SVSR
+	WRITE
+.endmacro
+ 
+.macro _RORZ
+	READZP
+	LDSR
+	ror		i
+	SVSR
+	WRITEZP
+.endmacro
+ 
+.macro _SBC
+	READZ
+	eor		avsr, one	; toggle C bit
+	LDSR
+	SEZ
+	sbc		ar, zl
+	sbrs	sr, sdp		; check decimal mode
+	rjmp	_SBC1
+	in		i, sreg
+sub_0:	
+	brhc	sub_1		; if half carry not clear
+	subi	ar, 0x06	;    LSD = LSD - 6
+sub_1:
+	sbrs	i, 0		; if previous carry not set
+	rjmp	sub_2		;    skip upper digit fix
+	subi	ar, 0x60	; subtract 6 from MSD
+	rol		i				; set carry in bit 0 of i
+	eor		i, one		; toggle C bit
+sub_2:
+	ror		i			; restore carry flag
+	tst		ar			; set N,V,Z
+_SBC1:
+	SVSR
+	bst		avsr, avp	; mov V flag
+	bld		avsr, atp	; to T flag
+	eor		avsr, one	; toggle C bit
+.endmacro
+
+.macro _SBCZ
+	READZP
+	eor		avsr, one	; toggle C bit
+	LDSR
+	SEZ
+	sbc		ar, i
+	sbrs	sr, sdp		; check decimal mode
+	rjmp	_SBC1
+	in		i, sreg
+sub_0:
+	brhc	sub_1		; if half carry not clear
+	subi	ar, 0x06	;    LSD = LSD - 6
+sub_1:
+	sbrs	i, 0		; if previous carry not set
+	rjmp	sub_2		;    skip upper digit fix
+	subi	ar, 0x60	; subtract 6 from MSD
+	rol		i			; set carry in bit 0 of i
+	eor		i, one		; toggle C bit
+sub_2:
+	ror		i			; restore carry flag
+	tst		ar			; set N,V,Z
+_SBC1:
+	SVSR
+	bst		avsr, avp	; mov V flag
+	bld		avsr, atp	; to T flag
+	eor		avsr, one	; toggle C bit
+.endmacro
+
+.macro _SMB				; passed bit pos byte as parameter
+	movw	zl, XL
+	_ZPG
+	READZP
+	ori		i, @0		; set bit
+	WRITEZP
+.endmacro
+
+.macro _STA
+	mov		i, ar
+	WRITE
+.endmacro
+
+.macro _STAZ
+	mov		i, ar
+	ldi		ZH, ZP
+	WRITEZP
+.endmacro
+
+.macro _STP
+.endmacro
+
+.macro _STX
+	mov		i, xr
+	WRITE
+.endmacro
+
+.macro _STXZ
+	mov		i, xr
+	ldi		ZH, ZP
+	WRITEZP
+.endmacro
+
+.macro _STY
+	mov		i, yr
+	WRITE
+.endmacro
+
+.macro _STYZ
+	mov		i, yr
+	ldi		ZH, ZP
+	WRITEZP
+.endmacro
+
+.macro _STZ
+	ldi		i, 0x00
+	WRITE
+.endmacro
+
+.macro _STZZ
+	ldi		i, 0x00
+	ldi		ZH, ZP
+	WRITEZP
+.endmacro
+
+.macro _TRB
+	READ
+	cbr		avsr, az	; Z
+	mov		j, ar
+	and		j, i
+	brne	fin
+	ori		avsr, az	; Z set
+fin:
+	mov		j, ar
+	com		j
+	and		i, j
+	WRITE
+.endmacro
+
+.macro _TRBZ
+	READZP
+	cbr		avsr, az	; Z
+	mov		j, ar
+	and		j, i
+	brne	fin
+	ori		avsr, az	; Z set
+fin:
+	mov		j, ar
+	com		j
+	and		i, j
+	WRITEZP
+.endmacro
+
+.macro _TSB
+	READ
+	cbr		avsr, az	; Z
+	mov		j, ar
+	and		j, i
+	brne	fin
+	ori		avsr, az	; Z set
+fin:
+	or		i, ar
+	WRITE
+.endmacro
+
+.macro _TSBZ
+	READZP
+	cbr		avsr, az	; Z
+	mov		j, ar
+	and		j, i
+	brne	fin
+	ori		avsr, az	; Z set
+fin:
+	or		i, ar
+	WRITEZP
+.endmacro
+
+.macro _WAI
+.endmacro
+
+;**********************
+; Opcode execute code
+;**********************
+
+_INV:
+	EXEC
+
+_INV2:
+	adiw	XL, 1
+	EXEC
+
+_INV3:
+	adiw	XL, 2
+	EXEC
+
+_BRK_IMP:				;00
+	adiw	XL, 1
+	st		Y, XH
+	dec		yl
+	st		Y, XL
+	dec		yl
+	AV2SR
+	ori		sr, sb		; brk bit
+	st		Y, sr
+ 	dec		yl
+	andi	sr, ss+so+sx+si+sz+sc	; clr D & B
+	ori		sr, si		; set I
+	ldi		ZL, 0xfe
+	ldi		ZH, 0xff
+	lpm		XL, Z+
+	lpm		XH, Z
+	EXEC
+
+_ORA_INDX:				;01
+	movw	zl, XL
+	_INDX
+	_ORA
+	EXEC
+
+_TSB_ZPG:				;04
+	movw	zl, XL
+	_ZPG 
+	_TSBZ
+	EXEC
+
+_ORA_ZPG:				;05
+	movw	zl, XL
+	_ZPG 
+	_ORAZ
+	EXEC
+
+_ASL_ZPG:				;06
+	movw	zl, XL
+	_ZPG 
+	_ASLZ
+	EXEC
+
+_RMB0_ZPG:				;07
+	_RMB	0xFE
+	EXEC
+
+_PHP_IMP:				;08
+	AV2SR
+	st		Y, sr
+	dec		yl
+	EXEC
+
+_ORA_IMM:				;09
+	movw	zl, XL
+	_IMM 
+	_ORA
+	EXEC
+
+_ASL_IMP:				;0A
+	LDSR
+	lsl		ar
+	SVSR
+	EXEC
+
+_TSB_ABS:				;0C
+	movw	zl, XL
+	_ABS 
+	_TSB
+	EXEC
+
+_ORA_ABS:				;0D
+	movw	zl, XL
+	_ABS 
+	_ORA
+	EXEC
+
+_ASL_ABS:				;0E
+	movw	zl, XL
+	_ABS 
+	_ASL
+	EXEC
+
+_BBR0_REL:				;0F
+	_BBR 0x01
+	EXEC
+
+_BPL_REL:				;10
+	sbrc	avsr, anp
+	rjmp	_BPL1
+	_REL
+	EXEC
+_BPL1:
+	adiw	xl, 1
+	EXEC
+
+_ORA_INDY:				;11
+	movw	zl, XL
+	_INDY 
+	_ORA
+	EXEC
+
+_ORA_IND:				;12
+	movw	zl, XL
+	_IZPG 
+	_ORA
+	EXEC
+
+_TRB_ZPG:				;14
+	movw	zl, XL
+	_ZPG 
+	_TRBZ
+	EXEC
+
+_ORA_ZPGX:				;15
+	movw	zl, XL
+	_ZPGX 
+	_ORAZ
+	EXEC
+
+_ASL_ZPGX:				;16
+	movw	zl, XL
+	_ZPGX 
+	_ASLZ
+	EXEC
+
+_RMB1_ZPG:				;17
+	_RMB	0xFD
+	EXEC
+
+_CLC_IMP:				;18
+	cbr		avsr, ac
+	EXEC
+
+_ORA_ABSY:				;19
+	movw	zl, XL
+	_ABSY 
+	_ORA
+	EXEC
+
+_INC_IMP:				;1A
+	LDSR
+	inc		ar
+	SVSR
+	EXEC
+
+_TRB_ABS:				;1C
+	movw	zl, XL
+	_ABS 
+	_TRB
+	EXEC
+
+_ORA_ABSX:				;1D
+	movw	zl, XL
+	_ABSX 
+	_ORA
+	EXEC
+
+_ASL_ABSX:				;1E
+	movw	zl, XL
+	_ABSX 
+	_ASL
+	EXEC
+
+_BBR1_REL:				;1F
+	_BBR 0x02
+	EXEC
+
+_JSR_ABS:				;20
+	movw	zl, XL
+	READ2
+	adiw	XL, 0x01
+	st		Y, XH
+	dec		yl
+	st		Y, XL
+	dec		yl
+	movw	XL, i
+	EXEC
+
+_AND_INDX:				;21
+	movw	zl, XL
+	_INDX 
+	_AND
+	EXEC
+
+_BIT_ZPG:				;24
+	movw	zl, XL
+	_ZPG 
+	_BITZ
+	EXEC
+
+_AND_ZPG:				;25
+	movw	zl, XL
+	_ZPG 
+	_ANDZ
+	EXEC
+
+_ROL_ZPG:				;26
+	movw	zl, XL
+	_ZPG 
+	_ROLZ
+	EXEC
+
+_RMB2_ZPG:				;27
+	_RMB	0xFB
+	EXEC
+
+_PLP_IMP:				;28
+	inc		yl
+	ld		sr, Y
+	ori		sr, sb		; ***???
+	ori		sr, sx		; ensure always 1
+	SR2AV
+	EXEC
+
+_AND_IMM:				;29
+	movw	zl, XL
+	_IMM 
+	_AND
+	EXEC
+
+_ROL_IMP:				;2A
+	LDSR
+	rol		ar
+	SVSR
+	EXEC
+
+_BIT_ABS:				;2C
+	movw	zl, XL
+	_ABS 
+	_BIT
+	EXEC
+
+_AND_ABS:				;2D
+	movw	zl, XL
+	_ABS 
+	_AND
+	EXEC
+
+_ROL_ABS:				;2E
+	movw	zl, XL
+	_ABS 
+	_ROL
+	EXEC
+
+_BBR2_REL:				;2F
+	_BBR 0x04
+	EXEC
+
+_BMI_REL:				;30
+	sbrs	avsr, anp
+	rjmp	_BMI1
+	_REL
+	EXEC
+_BMI1:
+	adiw	xl, 1
+	EXEC
+
+_AND_INDY:				;31
+	movw	zl, XL
+	_INDY 
+	_AND
+	EXEC
+
+_AND_IND:				;32
+	movw	zl, XL
+	_IZPG 
+	_AND
+	EXEC
+
+_BIT_ZPGX:				;34
+	movw	zl, XL
+	_ZPGX 
+	_BITZ
+	EXEC
+
+_AND_ZPGX:				;35
+	movw	zl, XL
+	_ZPGX 
+	_ANDZ
+	EXEC
+
+_ROL_ZPGX:				;36
+	movw	zl, XL
+	_ZPGX 
+	_ROLZ
+	EXEC
+
+_RMB3_ZPG:				;37
+	_RMB	0xF7
+	EXEC
+
+_SEC_IMP:				;38
+	ori		avsr, ac
+	EXEC
+
+_AND_ABSY:				;39
+	movw	zl, XL
+	_ABSY 
+	_AND
+	EXEC
+
+_DEC_IMP:				;3A
+	LDSR
+	dec		ar
+	SVSR
+	EXEC
+
+_BIT_ABSX:				;3C
+	movw	zl, XL
+	_ABSX 
+	_BIT
+	EXEC
+
+_AND_ABSX:				;3D
+	movw	zl, XL
+	_ABSX 
+	_AND
+	EXEC
+
+_ROL_ABSX:				;3E
+	movw	zl, XL
+	_ABSX 
+	_ROL
+	EXEC
+
+_BBR3_REL:				;3F
+	_BBR 0x08
+	EXEC
+
+_RTI_IMP:				;40
+	inc		yl
+	ld		sr, Y
+	inc		yl
+	ld		XL, Y
+	inc		yl
+	ld		XH, Y
+	SR2AV
+	EXEC
+
+_EOR_INDX:				;41
+	movw	zl, XL
+	_INDX 
+	_EOR
+	EXEC
+
+_EOR_ZPG:				;45
+	movw	zl, XL
+	_ZPG 
+	_EORZ
+	EXEC
+
+_LSR_ZPG:				;46
+	movw	zl, XL
+	_ZPG 
+	_LSRZ
+	EXEC
+
+_RMB4_ZPG:				;47
+	_RMB	0xEF
+	EXEC
+
+_PHA_IMP:				;48
+	st		Y, ar
+	dec		yl
+	EXEC
+
+_EOR_IMM:				;49
+	movw	zl, XL
+	_IMM 
+	_EOR
+	EXEC
+
+_LSR_IMP:				;4A
+	LDSR
+	lsr		ar
+	SVSR
+	EXEC
+
+_JMP_ABS:				;4C
+	movw	zl, XL
+	READ2
+	movw	xl, i
+	EXEC
+
+_EOR_ABS:				;4D
+	movw	zl, XL
+	_ABS 
+	_EOR
+	EXEC
+
+_LSR_ABS:				;4E
+	movw	zl, XL
+	_ABS 
+	_LSR
+	EXEC
+
+_BBR4_REL:				;4F
+	_BBR 0x10
+	EXEC
+
+_BVC_REL:				;50
+	sbrc	avsr, atp
+	rjmp	_BVC1
+	_REL
+	EXEC
+_BVC1:
+	adiw	xl, 1
+	EXEC
+
+_EOR_INDY:				;51
+	movw	zl, XL
+	_INDY 
+	_EOR
+	EXEC
+
+_EOR_IND:				;52
+	movw	zl, XL
+	_IZPG
+	_EOR
+	EXEC
+
+_EOR_ZPGX:				;55
+	movw	zl, XL
+	_ZPGX
+	_EORZ
+	EXEC
+
+_LSR_ZPGX:				;56
+	movw	zl, XL
+	_ZPGX 
+	_LSRZ
+	EXEC
+
+_RMB5_ZPG:				;57
+	_RMB	0xDF
+	EXEC
+
+_CLI_IMP:				;58
+	andi	sr, ss+so+sx+sb+sd+sz+sc
+	sei
+	EXEC
+
+_EOR_ABSY:				;59
+	movw	zl, XL
+	_ABSY
+	_EOR
+	EXEC
+
+_PHY_IMP:				;5A
+	st		Y, yr
+	dec		yl
+	EXEC
+
+_EOR_ABSX:				;5D
+	movw	zl, XL
+	_ABSX
+	_EOR
+	EXEC
+
+_LSR_ABSX:				;5E
+	movw	zl, XL
+	_ABSX 
+	_LSR
+	EXEC
+
+_BBR5_REL:				;5F
+	_BBR 0x20
+	EXEC
+
+_RTS_IMP:				;60
+	inc		yl
+	ld		XL, Y
+	inc		yl
+	ld		XH, Y
+	adiw	XL, 0x01
+	EXEC
+
+_ADC_INDX:				;61
+	movw	zl, XL
+	_INDX 
+	_ADC
+	EXEC
+
+_STZ_ZPG:				;64
+	movw	zl, XL
+	_ZPG
+	_STZZ
+	EXEC
+
+_ADC_ZPG:				;65
+	movw	zl, XL
+	_ZPG
+	_ADCZ
+	EXEC
+
+_ROR_ZPG:				;66
+	movw	zl, XL
+	_ZPG
+	_RORZ
+	EXEC
+
+_RMB6_ZPG:				;67
+	_RMB	0xBF
+	EXEC
+
+_PLA_IMP:				;68
+	inc		yl
+	ld		ar, Y
+	LDSR
+	tst		ar
+	SVSR
+	EXEC
+
+_ADC_IMM:				;69
+	movw	zl, XL
+	_IMM 
+	_ADC
+	EXEC
+
+
+_ROR_IMP:				;6A
+	LDSR
+	ror		ar
+	SVSR
+	EXEC
+
+_JMP_JIND:				;6C
+	movw	zl, XL
+	READ2
+	READ2
+	movw	XL, i
+	EXEC
+	
+_ADC_ABS:				;6D
+	movw	zl, XL
+	_ABS 
+	_ADC
+	EXEC
+
+_ROR_ABS:				;6E
+	movw	zl, XL
+	_ABS 
+	_ROR
+	EXEC
+
+_BBR6_REL:				;6F
+	_BBR 0x40
+	EXEC
+
+_BVS_REL:				;70
+	sbrs	avsr, atp
+	rjmp	_BVS1
+	_REL
+	EXEC
+_BVS1:
+	adiw	xl, 1
+	EXEC
+
+_ADC_INDY:				;71
+	movw	zl, XL
+	_INDY
+	_ADC
+	EXEC
+
+_ADC_IND:				;72
+	movw	zl, XL
+	_IZPG 
+	_ADC
+	EXEC
+
+_STZ_ZPGX:				;74
+	movw	zl, XL
+	_ZPGX
+	_STZZ
+	EXEC
+
+_ADC_ZPGX:				;75
+	movw	zl, XL
+	_ZPGX
+	_ADCZ
+	EXEC
+
+_ROR_ZPGX:				;76
+	movw	zl, XL
+	_ZPGX
+	_RORZ
+	EXEC
+
+_RMB7_ZPG:				;77
+	_RMB	0x7F
+	EXEC
+
+_SEI_IMP:				;78
+	ori		sr, si
+	cli
+	EXEC
+
+_ADC_ABSY:				;79
+	movw	zl, XL
+	_ABSY 
+	_ADC
+	EXEC
+
+_PLY_IMP:				;7A
+	inc		yl
+	ld		yr, Y
+	LDSR
+	tst		yr
+	SVSR
+	EXEC
+
+_JMP_JINDX:				;7C
+	movw	zl, XL
+	READ2
+	add		ZL, XR	
+	adc		ZH, ZERO
+	READ2
+	movw	XL, i
+	EXEC
+
+_ADC_ABSX:				;7D
+	movw	zl, XL
+	_ABSX 
+	_ADC
+	EXEC
+
+_ROR_ABSX:				;7E
+	movw	zl, XL
+	_ABSX 
+	_ROR
+	EXEC
+
+_BBR7_REL:				;7F
+	_BBR 0x80
+	EXEC
+
+_BRA_REL:				;80
+	_REL
+	EXEC
+
+_STA_INDX:				;81
+	movw	zl, XL
+	_INDX 
+	_STA
+	EXEC
+
+_STY_ZPG:				;84
+	movw	zl, XL
+	_ZPG
+	_STYZ
+	EXEC
+
+_STA_ZPG:				;85
+	movw	zl, XL
+	_ZPG
+	_STAZ
+	EXEC
+
+_STX_ZPG:				;86
+	movw	zl, XL
+	_ZPG
+	_STXZ
+	EXEC
+
+_SMB0_ZPG:				;87
+	_SMB	0x01
+	EXEC
+
+_DEY_IMP:				;88
+	LDSR
+	dec		yr
+	SVSR
+	EXEC
+
+_BIT_IMM:				;89
+	movw	zl, XL
+	_IMM 
+	READZ
+	and		zl, ar
+	in		i, SREG		; save zero bit
+	andi	i, az			; mask zero bit
+	andi	avsr, 0xFd		; clear zero bit
+	or	avsr, i
+	EXEC
+
+_TXA_IMP:				;8A
+	LDSR
+	mov		ar, xr
+	tst		ar
+	SVSR
+	EXEC
+
+_STY_ABS:				;8C
+	movw	zl, XL
+	_ABS 
+	_STY
+	EXEC
+
+_STA_ABS:				;8D
+	movw	zl, XL
+	_ABS 
+	_STA
+	EXEC
+
+_STX_ABS:				;8E
+	movw	zl, XL
+	_ABS 
+	_STX
+	EXEC
+
+_BBS0_REL:				;8F
+	_BBS 0x01
+	EXEC
+
+_BCC_REL:				;90
+	sbrc	avsr, acp
+	rjmp	_BCC1
+	_REL
+	EXEC
+_BCC1:
+	adiw	xl, 1
+	EXEC
+
+_STA_INDY:	movw	zl, XL				;91
+	_INDY
+	_STA
+	EXEC
+
+_STA_IND:				;92
+	movw	zl, XL
+	_IZPG 
+	_STA
+	EXEC
+
+_STY_ZPGX:				;94
+	movw	zl, XL
+	_ZPGX
+	_STYZ
+	EXEC
+
+_STA_ZPGX:				;95
+	movw	zl, XL
+	_ZPGX
+	_STAZ
+	EXEC
+
+_STX_ZPGY:				;96
+	movw	zl, XL
+	_ZPGY
+	_STXZ
+	EXEC
+
+_SMB1_ZPG:				;97
+	_SMB	0x02
+	EXEC
+
+_TYA_IMP:				;98
+	LDSR
+	mov		ar, yr
+	tst		ar
+	SVSR
+	EXEC
+
+_STA_ABSY:				;99
+	movw	zl, XL
+	_ABSY
+	_STA
+	EXEC
+
+_TXS_IMP:				;9A
+	mov		YL, xr
+	EXEC
+
+_STZ_ABS:				;9C
+	movw	zl, XL
+	_ABS 
+	_STZ
+	EXEC
+
+_STA_ABSX:				;9D
+	movw	zl, XL
+	_ABSX 
+	_STA
+	EXEC
+
+_STZ_ABSX:				;9E
+	movw	zl, XL
+	_ABSX 
+	_STZ
+	EXEC
+
+_BBS1_REL:				;9F
+	_BBS 0x02
+	EXEC
+
+_LDY_IMM:				;A0
+	movw	zl, XL
+	_IMM 
+	_LDY
+	EXEC
+
+_LDA_INDX:				;A1
+	movw	zl, XL
+	_INDX 
+	_LDA
+	EXEC
+
+_LDX_IMM:				;A2
+	movw	zl, XL
+	_IMM 
+	_LDX
+	EXEC
+
+_LDY_ZPG:				;A4
+	movw	zl, XL
+	_ZPG
+	_LDYZ
+	EXEC
+
+_LDA_ZPG:				;A5
+	movw	zl, XL
+	_ZPG
+	_LDAZ
+	EXEC
+
+_LDX_ZPG:				;A6
+	movw	zl, XL
+	_ZPG
+	_LDXZ
+	EXEC
+
+_SMB2_ZPG:				;A7
+	_SMB	0x04
+	EXEC
+
+_TAY_IMP:				;A8
+	LDSR
+	mov		yr, ar
+	tst		yr
+	SVSR
+	EXEC
+
+_LDA_IMM:				;A9
+	movw	zl, XL
+	_IMM 
+	_LDA
+	EXEC
+
+_TAX_IMP:				;AA
+	LDSR
+	mov		xr, ar
+	tst		xr
+	SVSR
+	EXEC
+
+_LDY_ABS:				;AC
+	movw	zl, XL
+	_ABS 
+	_LDY
+	EXEC
+
+_LDA_ABS:				;AD
+	movw	zl, XL
+	_ABS 
+	_LDA
+	EXEC
+
+_LDX_ABS:				;AE
+	movw	zl, XL
+	_ABS 
+	_LDX
+	EXEC
+
+_BBS2_REL:				;AF
+	_BBS 0x04
+	EXEC
+
+_BCS_REL:				;B0
+	sbrs	avsr, acp
+	rjmp	_BCS1
+	_REL
+	EXEC
+_BCS1:
+	adiw	xl, 1
+	EXEC
+
+_LDA_INDY:				;B1
+	movw	zl, XL
+	_INDY
+	_LDA
+	EXEC
+
+_LDA_IND:				;B2
+	movw	zl, XL
+	_IZPG
+	_LDA
+	EXEC
+
+_LDY_ZPGX:				;B4
+	movw	zl, XL
+	_ZPGX
+	_LDYZ
+	EXEC
+
+_LDA_ZPGX:				;B5
+	movw	zl, XL
+	_ZPGX
+	_LDAZ
+	EXEC
+
+_LDX_ZPGY:				;B6
+	movw	zl, XL
+	_ZPGY
+	_LDXZ
+	EXEC
+
+_SMB3_ZPG:				;B7
+	_SMB	0x08
+	EXEC
+
+_CLV_IMP:				;B8
+	cbr		avsr, at
+	EXEC
+
+_LDA_ABSY:				;B9
+	movw	zl, XL
+	_ABSY 
+	_LDA
+	EXEC
+
+_TSX_IMP:				;BA
+	LDSR
+	mov		xr, YL
+	tst		xr
+	SVSR
+	EXEC
+
+_LDY_ABSX:				;BC
+	movw	zl, XL
+	_ABSX
+	_LDY
+	EXEC
+
+_LDA_ABSX:				;BD
+	movw	zl, XL
+	_ABSX 
+	_LDA
+	EXEC
+
+_LDX_ABSY:				;BE
+	movw	zl, XL
+	_ABSY 
+	_LDX
+	EXEC
+
+_BBS3_REL:				;BF
+	_BBS 0x08
+	EXEC
+
+_CPY_IMM:				;C0
+	movw	zl, XL
+	_IMM 
+	_CPY
+	EXEC
+
+_CMP_INDX:				;C1
+	movw	zl, XL
+	_INDX 
+	_CMP
+	EXEC
+
+_CPY_ZPG:				;C4
+	movw	zl, XL
+	_ZPG
+	_CPYZ
+	EXEC
+
+_CMP_ZPG:				;C5
+	movw	zl, XL
+	_ZPG
+	_CMPZ
+	EXEC
+
+_DEC_ZPG:				;C6
+	movw	zl, XL
+	_ZPG
+	_DECZ
+	EXEC
+
+_SMB4_ZPG:				;C7
+	_SMB	0x10
+	EXEC
+
+_INY_IMP:				;C8
+	LDSR
+	inc		yr
+	SVSR
+	EXEC
+
+_CMP_IMM:				;C9
+	movw	zl, XL
+	_IMM 
+	_CMP
+	EXEC
+
+_DEX_IMP:				;CA
+	LDSR
+	dec		xr
+	SVSR
+	EXEC
+
+_WAI_IMP:				;CB
+	sbiw	xl, 0x01
+	EXEC
+
+_CPY_ABS:				;CC
+	movw	zl, XL
+	_ABS 
+	_CPY
+	EXEC
+
+_CMP_ABS:				;CD
+	movw	zl, XL
+	_ABS 
+	_CMP
+	EXEC
+
+_DEC_ABS:				;CE
+	movw	zl, XL
+	_ABS 
+	_DEC
+	EXEC
+
+_BBS4_REL:				;CF
+	_BBS 0x10
+	EXEC
+
+_BNE_REL:				;D0
+	sbrc	avsr, azp
+	rjmp	_BNE1
+	_REL
+	EXEC
+_BNE1:
+	adiw	XL, 1
+	EXEC
+
+_CMP_INDY:				;D1
+	movw	zl, XL
+	_INDY
+	_CMP
+	EXEC
+
+_CMP_IND:				;D2
+	movw	zl, XL
+	_IZPG
+	_CMP
+	EXEC
+
+_CMP_ZPGX:				;D5
+	movw	zl, XL
+	_ZPGX
+	_CMPZ
+	EXEC
+
+_DEC_ZPGX:				;D6
+	movw	zl, XL
+	_ZPGX
+	_DECZ
+	EXEC
+
+_SMB5_ZPG:				;D7
+	_SMB	0x20
+	EXEC
+
+_CLD_IMP:				;D8
+	andi	sr, ss+so+sx+sb+si+sz+sc
+	EXEC
+
+_CMP_ABSY:				;D9
+	movw	zl, XL
+	_ABSY
+	_CMP
+	EXEC
+
+_PHX_IMP:				;DA
+	st		Y, xr
+	dec		yl
+	EXEC
+
+_STP_IMP:				;DB
+loop:
+	rjmp	loop	
+
+_CMP_ABSX:				;DD
+	movw	zl, XL
+	_ABSX
+	_CMP
+	EXEC
+
+_DEC_ABSX:				;DE
+	movw	zl, XL
+	_ABSX 
+	_DEC
+	EXEC
+
+_BBS5_REL:				;DF
+	_BBS 0x20
+	EXEC
+
+_CPX_IMM:				;E0
+	movw	zl, XL
+	_IMM 
+	_CPX
+	EXEC
+
+_SBC_INDX:				;E1
+	movw	zl, XL
+	_INDX 
+	_SBC
+	EXEC
+
+_CPX_ZPG:				;E4
+	movw	zl, XL
+	_ZPG
+	_CPXZ
+	EXEC
+
+_SBC_ZPG:				;E5
+	movw	zl, XL
+	_ZPG
+	_SBCZ
+	EXEC
+
+_INC_ZPG:				;E6
+	movw	zl, XL
+	_ZPG
+	_INCZ
+	EXEC
+	
+_SMB6_ZPG:				;E7
+	_SMB	0x40
+	EXEC
+
+_INX_IMP:				;E8
+	LDSR
+	inc		xr
+	SVSR
+	EXEC
+
+_SBC_IMM:				;E9
+	movw	zl, XL
+	_IMM 
+	_SBC
+	EXEC
+
+_NOP_IMP:				;EA
+	EXEC
+
+_CPX_ABS:				;EC
+	movw	zl, XL
+	_ABS 
+	_CPX
+	EXEC
+
+_SBC_ABS:				;ED
+	movw	zl, XL
+	_ABS 
+	_SBC
+	EXEC
+
+_INC_ABS:				;EE
+	movw	zl, XL
+	_ABS 
+	_INC
+	EXEC
+
+_BBS6_REL:				;EF
+	_BBS 0x40
+	EXEC
+
+_BEQ_REL:				;F0
+	sbrs	avsr, azp
+	rjmp	_BEQ1
+	_REL
+	EXEC
+_BEQ1:
+	adiw	xl, 1
+	EXEC
+
+_SBC_INDY:				;F1
+	movw	zl, XL
+	_INDY 
+	_SBC
+	EXEC
+
+_SBC_IND:				;F2
+	movw	zl, XL
+	_IZPG 
+	_SBC
+	EXEC
+
+_SBC_ZPGX:				;F5
+	movw	zl, XL
+	_ZPGX
+	_SBCZ
+	EXEC
+
+_INC_ZPGX:				;F6
+	movw	zl, XL
+	_ZPGX
+	_INCZ
+	EXEC
+
+_SMB7_ZPG:				;F7
+	_SMB	0x80
+	EXEC
+
+_SED_IMP:				;F8
+	ori		sr, sd
+	EXEC
+
+_SBC_ABSY:				;F9
+	movw	zl, XL
+	_ABSY 
+	_SBC
+	EXEC
+
+_PLX_IMP:				;FA
+	LDSR
+	inc		yl
+	ld		xr, Y
+	tst		xr
+	SVSR
+	EXEC
+
+_SBC_ABSX:				;FD
+	movw	zl, XL
+	_ABSX 
+	_SBC
+	EXEC
+
+_INC_ABSX:				;FE
+	movw	zl, XL
+	_ABSX 
+	_INC
+	EXEC
+
+_BBS7_REL:				;FF
+	_BBS 0x80
+	EXEC
+
+;**********************
+; CPU State code
+;**********************
+CPU_INIT:
+	clr		AR
+	clr		XR
+	clr		YR
+	clr		IRV
+	ldi		YL, 0xff
+	ldi		YH, 0x02	; $01xx
+	ldi		ZL, 0xfc
+	ldi		ZH, 0xff
+	lpm		XL, Z+
+	lpm		XH, Z
+	ldi		sr, sx
+	SVSR
+	clr		IFLAG			; IRQ flag off
+	out		gpior0, zero	; EEPROM Write off
+	ret
+
+CPU_RESET:
+	rcall	CPU_INIT
+	ret
+
+cpu_irq:
+	clr		IFLAG		; clear IRQ trigger 
+	sbrc	sr, sip
+	ret
+
+	cli					; dis irq's
+	st		Y, XH
+	dec		yl
+	st		Y, XL
+	dec		yl
+	AV2SR
+	andi	sr, ss+so+sx+sd+si+sz+sc   ; B=0
+	st		Y, sr
+	dec		yl
+	ori		sr, si		; set I
+	ldi		ZL, 0xfe
+	ldi		ZH, 0xff
+	lpm		XL, Z+
+	lpm		XH, Z
+	ret
+
+cpu_nmi:
+	st		Y, XH
+	dec		yl
+	st		Y, XL
+	dec		yl
+	AV2SR
+	st		Y, sr
+	dec		yl
+	ldi		ZL, 0xfa
+	ldi		ZH, 0xff
+	lpm		XL, Z+
+	lpm		XH, Z
+	ret
+
+;**********************
+; Execute one opcode
+;**********************
+Main:
+	EXEC
+	rjmp	main		; this will never execute!
+
+;**********************
+
+; 1.2 fixed CLV bug
+; 1.3 mem access is 16k RAM x 48k ROM
+; 1.4 added BCD support for ADC and SBC - flags untested
+; 1.5 fixed TXS - removed SR changes
+; 1.6 fixed BCD math in ADC and SBC
+; 1.7 removed B flag in SR being cleared on RTI
+; 1.8 moved V flag to T in AVST
+; 1.9 removed IOJMP and optimized IRQ flag handling
+; 2.0 optimized opcode fetch, READ and READZ
+; 2.1 added READZP and WRITEZP and ZP-mirrored opcode instructions
+; 2.2 added lookup tables to convert SR to AVSR and AVSR to SR
+; 2.3 added BBRx, BBSx, RBMx, SMBx, STP, WAI opcodes - WDC 65C02 fully supported
+; 2.4 Added lookup table for excution in IO and created macro for execution
+;     Moved Emulator to $8000 in Flash as it outgrew space from $0000-$1FFF.
+;     Unused opcodes now use the proper # of bytes, per WDC datasheet
+; 2.5 Corrected some opcode behavior - now passed Klaus' test suites!
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/labels.tmp b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/labels.tmp
new file mode 100644
index 00000000..374aa190
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/labels.tmp
@@ -0,0 +1,362 @@
+<ASSEMBLER_INFO>
+ <VERSION>2.1.42</VERSION>
+ <DEVICE>ATmega1284P</DEVICE>
+ <WORKING_DIR>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource</WORKING_DIR>
+ <INCLUDE_PATH>
+  <DIR>C:\Program Files\Atmel\AVR Tools\AvrAssembler2\Appnotes</DIR>
+ </INCLUDE_PATH>
+ <SOURCE_FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\avr6502.asm</SOURCE_FILE>
+ <INCLUDED_FILES>
+  <FILE>C:\Program Files\Atmel\AVR Tools\AvrAssembler2\Appnotes\m1284Pdef.inc</FILE>
+  <FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\av2sr.inc</FILE>
+  <FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\sr2av.inc</FILE>
+  <FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\opcjmp.inc</FILE>
+  <FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\ioexe.inc</FILE>
+  <FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\sbcrom.inc</FILE>
+  <FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE>
+  <FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE>
+  <FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE>
+ </INCLUDED_FILES>
+ <OBJECT_FILES>
+  <FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\AVR6502.obj</FILE>
+ </OBJECT_FILES>
+ <HEX_FILES>
+  <FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\AVR6502.hex</FILE>
+ </HEX_FILES>
+ <OUTPUT_FILES>
+  <FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\AVR6502.map</FILE>
+  <FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\AVR6502.lst</FILE>
+ </OUTPUT_FILES>
+ <LABELS>
+  <tav2sr><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\av2sr.inc</FILE><LINE>6</LINE></tav2sr>
+  <tsr2av><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\sr2av.inc</FILE><LINE>6</LINE></tsr2av>
+  <opctbl><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\opcjmp.inc</FILE><LINE>10</LINE></opctbl>
+  <_BRK_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>874</LINE></_BRK_IMP>
+  <_ORA_INDX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>892</LINE></_ORA_INDX>
+  <_INV2><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>866</LINE></_INV2>
+  <_INV><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>863</LINE></_INV>
+  <_TSB_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>898</LINE></_TSB_ZPG>
+  <_ORA_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>904</LINE></_ORA_ZPG>
+  <_ASL_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>910</LINE></_ASL_ZPG>
+  <_RMB0_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>916</LINE></_RMB0_ZPG>
+  <_PHP_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>920</LINE></_PHP_IMP>
+  <_ORA_IMM><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>926</LINE></_ORA_IMM>
+  <_ASL_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>932</LINE></_ASL_IMP>
+  <_TSB_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>938</LINE></_TSB_ABS>
+  <_ORA_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>944</LINE></_ORA_ABS>
+  <_ASL_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>950</LINE></_ASL_ABS>
+  <_BBR0_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>956</LINE></_BBR0_REL>
+  <_BPL_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>960</LINE></_BPL_REL>
+  <_ORA_INDY><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>969</LINE></_ORA_INDY>
+  <_ORA_IND><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>975</LINE></_ORA_IND>
+  <_TRB_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>981</LINE></_TRB_ZPG>
+  <_ORA_ZPGX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>987</LINE></_ORA_ZPGX>
+  <_ASL_ZPGX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>993</LINE></_ASL_ZPGX>
+  <_RMB1_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>999</LINE></_RMB1_ZPG>
+  <_CLC_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1003</LINE></_CLC_IMP>
+  <_ORA_ABSY><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1007</LINE></_ORA_ABSY>
+  <_INC_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1013</LINE></_INC_IMP>
+  <_TRB_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1019</LINE></_TRB_ABS>
+  <_ORA_ABSX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1025</LINE></_ORA_ABSX>
+  <_ASL_ABSX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1031</LINE></_ASL_ABSX>
+  <_BBR1_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1037</LINE></_BBR1_REL>
+  <_JSR_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1041</LINE></_JSR_ABS>
+  <_AND_INDX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1052</LINE></_AND_INDX>
+  <_BIT_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1058</LINE></_BIT_ZPG>
+  <_AND_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1064</LINE></_AND_ZPG>
+  <_ROL_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1070</LINE></_ROL_ZPG>
+  <_RMB2_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1076</LINE></_RMB2_ZPG>
+  <_PLP_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1080</LINE></_PLP_IMP>
+  <_AND_IMM><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1088</LINE></_AND_IMM>
+  <_ROL_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1094</LINE></_ROL_IMP>
+  <_BIT_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1100</LINE></_BIT_ABS>
+  <_AND_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1106</LINE></_AND_ABS>
+  <_ROL_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1112</LINE></_ROL_ABS>
+  <_BBR2_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1118</LINE></_BBR2_REL>
+  <_BMI_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1122</LINE></_BMI_REL>
+  <_AND_INDY><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1131</LINE></_AND_INDY>
+  <_AND_IND><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1137</LINE></_AND_IND>
+  <_BIT_ZPGX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1143</LINE></_BIT_ZPGX>
+  <_AND_ZPGX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1149</LINE></_AND_ZPGX>
+  <_ROL_ZPGX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1155</LINE></_ROL_ZPGX>
+  <_RMB3_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1161</LINE></_RMB3_ZPG>
+  <_SEC_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1165</LINE></_SEC_IMP>
+  <_AND_ABSY><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1169</LINE></_AND_ABSY>
+  <_DEC_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1175</LINE></_DEC_IMP>
+  <_BIT_ABSX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1181</LINE></_BIT_ABSX>
+  <_AND_ABSX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1187</LINE></_AND_ABSX>
+  <_ROL_ABSX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1193</LINE></_ROL_ABSX>
+  <_BBR3_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1199</LINE></_BBR3_REL>
+  <_RTI_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1203</LINE></_RTI_IMP>
+  <_EOR_INDX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1213</LINE></_EOR_INDX>
+  <_EOR_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1219</LINE></_EOR_ZPG>
+  <_LSR_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1225</LINE></_LSR_ZPG>
+  <_RMB4_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1231</LINE></_RMB4_ZPG>
+  <_PHA_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1235</LINE></_PHA_IMP>
+  <_EOR_IMM><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1240</LINE></_EOR_IMM>
+  <_LSR_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1246</LINE></_LSR_IMP>
+  <_JMP_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1252</LINE></_JMP_ABS>
+  <_EOR_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1258</LINE></_EOR_ABS>
+  <_LSR_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1264</LINE></_LSR_ABS>
+  <_BBR4_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1270</LINE></_BBR4_REL>
+  <_BVC_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1274</LINE></_BVC_REL>
+  <_EOR_INDY><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1283</LINE></_EOR_INDY>
+  <_EOR_IND><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1289</LINE></_EOR_IND>
+  <_EOR_ZPGX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1295</LINE></_EOR_ZPGX>
+  <_LSR_ZPGX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1301</LINE></_LSR_ZPGX>
+  <_RMB5_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1307</LINE></_RMB5_ZPG>
+  <_CLI_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1311</LINE></_CLI_IMP>
+  <_EOR_ABSY><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1316</LINE></_EOR_ABSY>
+  <_PHY_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1322</LINE></_PHY_IMP>
+  <_INV3><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>870</LINE></_INV3>
+  <_EOR_ABSX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1327</LINE></_EOR_ABSX>
+  <_LSR_ABSX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1333</LINE></_LSR_ABSX>
+  <_BBR5_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1339</LINE></_BBR5_REL>
+  <_RTS_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1343</LINE></_RTS_IMP>
+  <_ADC_INDX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1351</LINE></_ADC_INDX>
+  <_STZ_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1357</LINE></_STZ_ZPG>
+  <_ADC_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1363</LINE></_ADC_ZPG>
+  <_ROR_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1369</LINE></_ROR_ZPG>
+  <_RMB6_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1375</LINE></_RMB6_ZPG>
+  <_PLA_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1379</LINE></_PLA_IMP>
+  <_ADC_IMM><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1387</LINE></_ADC_IMM>
+  <_ROR_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1394</LINE></_ROR_IMP>
+  <_JMP_JIND><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1400</LINE></_JMP_JIND>
+  <_ADC_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1407</LINE></_ADC_ABS>
+  <_ROR_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1413</LINE></_ROR_ABS>
+  <_BBR6_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1419</LINE></_BBR6_REL>
+  <_BVS_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1423</LINE></_BVS_REL>
+  <_ADC_INDY><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1432</LINE></_ADC_INDY>
+  <_ADC_IND><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1438</LINE></_ADC_IND>
+  <_STZ_ZPGX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1444</LINE></_STZ_ZPGX>
+  <_ADC_ZPGX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1450</LINE></_ADC_ZPGX>
+  <_ROR_ZPGX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1456</LINE></_ROR_ZPGX>
+  <_RMB7_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1462</LINE></_RMB7_ZPG>
+  <_SEI_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1466</LINE></_SEI_IMP>
+  <_ADC_ABSY><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1471</LINE></_ADC_ABSY>
+  <_PLY_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1477</LINE></_PLY_IMP>
+  <_JMP_JINDX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1485</LINE></_JMP_JINDX>
+  <_ADC_ABSX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1494</LINE></_ADC_ABSX>
+  <_ROR_ABSX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1500</LINE></_ROR_ABSX>
+  <_BBR7_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1506</LINE></_BBR7_REL>
+  <_BRA_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1510</LINE></_BRA_REL>
+  <_STA_INDX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1514</LINE></_STA_INDX>
+  <_STY_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1520</LINE></_STY_ZPG>
+  <_STA_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1526</LINE></_STA_ZPG>
+  <_STX_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1532</LINE></_STX_ZPG>
+  <_SMB0_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1538</LINE></_SMB0_ZPG>
+  <_DEY_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1542</LINE></_DEY_IMP>
+  <_BIT_IMM><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1548</LINE></_BIT_IMM>
+  <_TXA_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1559</LINE></_TXA_IMP>
+  <_STY_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1566</LINE></_STY_ABS>
+  <_STA_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1572</LINE></_STA_ABS>
+  <_STX_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1578</LINE></_STX_ABS>
+  <_BBS0_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1584</LINE></_BBS0_REL>
+  <_BCC_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1588</LINE></_BCC_REL>
+  <_STA_INDY><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1597</LINE></_STA_INDY>
+  <_STA_IND><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1602</LINE></_STA_IND>
+  <_STY_ZPGX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1608</LINE></_STY_ZPGX>
+  <_STA_ZPGX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1614</LINE></_STA_ZPGX>
+  <_STX_ZPGY><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1620</LINE></_STX_ZPGY>
+  <_SMB1_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1626</LINE></_SMB1_ZPG>
+  <_TYA_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1630</LINE></_TYA_IMP>
+  <_STA_ABSY><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1637</LINE></_STA_ABSY>
+  <_TXS_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1643</LINE></_TXS_IMP>
+  <_STZ_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1647</LINE></_STZ_ABS>
+  <_STA_ABSX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1653</LINE></_STA_ABSX>
+  <_STZ_ABSX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1659</LINE></_STZ_ABSX>
+  <_BBS1_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1665</LINE></_BBS1_REL>
+  <_LDY_IMM><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1669</LINE></_LDY_IMM>
+  <_LDA_INDX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1675</LINE></_LDA_INDX>
+  <_LDX_IMM><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1681</LINE></_LDX_IMM>
+  <_LDY_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1687</LINE></_LDY_ZPG>
+  <_LDA_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1693</LINE></_LDA_ZPG>
+  <_LDX_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1699</LINE></_LDX_ZPG>
+  <_SMB2_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1705</LINE></_SMB2_ZPG>
+  <_TAY_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1709</LINE></_TAY_IMP>
+  <_LDA_IMM><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1716</LINE></_LDA_IMM>
+  <_TAX_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1722</LINE></_TAX_IMP>
+  <_LDY_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1729</LINE></_LDY_ABS>
+  <_LDA_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1735</LINE></_LDA_ABS>
+  <_LDX_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1741</LINE></_LDX_ABS>
+  <_BBS2_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1747</LINE></_BBS2_REL>
+  <_BCS_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1751</LINE></_BCS_REL>
+  <_LDA_INDY><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1760</LINE></_LDA_INDY>
+  <_LDA_IND><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1766</LINE></_LDA_IND>
+  <_LDY_ZPGX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1772</LINE></_LDY_ZPGX>
+  <_LDA_ZPGX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1778</LINE></_LDA_ZPGX>
+  <_LDX_ZPGY><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1784</LINE></_LDX_ZPGY>
+  <_SMB3_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1790</LINE></_SMB3_ZPG>
+  <_CLV_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1794</LINE></_CLV_IMP>
+  <_LDA_ABSY><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1798</LINE></_LDA_ABSY>
+  <_TSX_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1804</LINE></_TSX_IMP>
+  <_LDY_ABSX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1811</LINE></_LDY_ABSX>
+  <_LDA_ABSX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1817</LINE></_LDA_ABSX>
+  <_LDX_ABSY><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1823</LINE></_LDX_ABSY>
+  <_BBS3_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1829</LINE></_BBS3_REL>
+  <_CPY_IMM><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1833</LINE></_CPY_IMM>
+  <_CMP_INDX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1839</LINE></_CMP_INDX>
+  <_CPY_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1845</LINE></_CPY_ZPG>
+  <_CMP_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1851</LINE></_CMP_ZPG>
+  <_DEC_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1857</LINE></_DEC_ZPG>
+  <_SMB4_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1863</LINE></_SMB4_ZPG>
+  <_INY_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1867</LINE></_INY_IMP>
+  <_CMP_IMM><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1873</LINE></_CMP_IMM>
+  <_DEX_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1879</LINE></_DEX_IMP>
+  <_WAI_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1885</LINE></_WAI_IMP>
+  <_CPY_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1889</LINE></_CPY_ABS>
+  <_CMP_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1895</LINE></_CMP_ABS>
+  <_DEC_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1901</LINE></_DEC_ABS>
+  <_BBS4_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1907</LINE></_BBS4_REL>
+  <_BNE_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1911</LINE></_BNE_REL>
+  <_CMP_INDY><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1920</LINE></_CMP_INDY>
+  <_CMP_IND><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1926</LINE></_CMP_IND>
+  <_CMP_ZPGX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1932</LINE></_CMP_ZPGX>
+  <_DEC_ZPGX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1938</LINE></_DEC_ZPGX>
+  <_SMB5_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1944</LINE></_SMB5_ZPG>
+  <_CLD_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1948</LINE></_CLD_IMP>
+  <_CMP_ABSY><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1952</LINE></_CMP_ABSY>
+  <_PHX_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1958</LINE></_PHX_IMP>
+  <_STP_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1963</LINE></_STP_IMP>
+  <_CMP_ABSX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1967</LINE></_CMP_ABSX>
+  <_DEC_ABSX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1973</LINE></_DEC_ABSX>
+  <_BBS5_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1979</LINE></_BBS5_REL>
+  <_CPX_IMM><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1983</LINE></_CPX_IMM>
+  <_SBC_INDX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1989</LINE></_SBC_INDX>
+  <_CPX_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1995</LINE></_CPX_ZPG>
+  <_SBC_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2001</LINE></_SBC_ZPG>
+  <_INC_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2007</LINE></_INC_ZPG>
+  <_SMB6_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2013</LINE></_SMB6_ZPG>
+  <_INX_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2017</LINE></_INX_IMP>
+  <_SBC_IMM><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2023</LINE></_SBC_IMM>
+  <_NOP_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2029</LINE></_NOP_IMP>
+  <_CPX_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2032</LINE></_CPX_ABS>
+  <_SBC_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2038</LINE></_SBC_ABS>
+  <_INC_ABS><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2044</LINE></_INC_ABS>
+  <_BBS6_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2050</LINE></_BBS6_REL>
+  <_BEQ_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2054</LINE></_BEQ_REL>
+  <_SBC_INDY><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2063</LINE></_SBC_INDY>
+  <_SBC_IND><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2069</LINE></_SBC_IND>
+  <_SBC_ZPGX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2075</LINE></_SBC_ZPGX>
+  <_INC_ZPGX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2081</LINE></_INC_ZPGX>
+  <_SMB7_ZPG><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2087</LINE></_SMB7_ZPG>
+  <_SED_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2091</LINE></_SED_IMP>
+  <_SBC_ABSY><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2095</LINE></_SBC_ABSY>
+  <_PLX_IMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2101</LINE></_PLX_IMP>
+  <_SBC_ABSX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2109</LINE></_SBC_ABSX>
+  <_INC_ABSX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2115</LINE></_INC_ABSX>
+  <_BBS7_REL><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2121</LINE></_BBS7_REL>
+  <ioexe><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\ioexe.inc</FILE><LINE>6</LINE></ioexe>
+  <IMAGE><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\sbcrom.inc</FILE><LINE>2</LINE></IMAGE>
+  <STARTUP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\avr6502.asm</FILE><LINE>40</LINE></STARTUP>
+  <InitRS232><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\avr6502.asm</FILE><LINE>84</LINE></InitRS232>
+  <version><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\avr6502.asm</FILE><LINE>136</LINE></version>
+  <ver1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\avr6502.asm</FILE><LINE>118</LINE></ver1>
+  <Ready><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\avr6502.asm</FILE><LINE>128</LINE></Ready>
+  <Put_Chr><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>341</LINE></Put_Chr>
+  <CPU_RESET><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2145</LINE></CPU_RESET>
+  <Main><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2187</LINE></Main>
+  <cpu_irq><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2149</LINE></cpu_irq>
+  <done><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>214</LINE></done>
+  <_BPL1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>965</LINE></_BPL1>
+  <_BMI1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1127</LINE></_BMI1>
+  <_BVC1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1279</LINE></_BVC1>
+  <_BVS1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1428</LINE></_BVS1>
+  <_BCC1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1593</LINE></_BCC1>
+  <_BCS1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1756</LINE></_BCS1>
+  <_BNE1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1916</LINE></_BNE1>
+  <loop><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>1964</LINE></loop>
+  <_BEQ1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2059</LINE></_BEQ1>
+  <CPU_INIT><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2128</LINE></CPU_INIT>
+  <cpu_nmi><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\cpu.asm</FILE><LINE>2170</LINE></cpu_nmi>
+  <RESET><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>126</LINE></RESET>
+  <INT0V><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>84</LINE></INT0V>
+  <INT1V><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>85</LINE></INT1V>
+  <INT2V><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>86</LINE></INT2V>
+  <PCINT0V><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>87</LINE></PCINT0V>
+  <PCINT1V><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>88</LINE></PCINT1V>
+  <PCINT2V><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>89</LINE></PCINT2V>
+  <PCINT3V><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>90</LINE></PCINT3V>
+  <WDT><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>91</LINE></WDT>
+  <TIMER2_COMPA><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>92</LINE></TIMER2_COMPA>
+  <TIMER2_COMPB><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>93</LINE></TIMER2_COMPB>
+  <TIMER2_OVF><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>94</LINE></TIMER2_OVF>
+  <TIMER1_CAPT><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>95</LINE></TIMER1_CAPT>
+  <TIMER1_COMPA><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>96</LINE></TIMER1_COMPA>
+  <TIMER1_COMPB><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>97</LINE></TIMER1_COMPB>
+  <TIMER1_OVF><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>98</LINE></TIMER1_OVF>
+  <TIMER0_COMPA><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>99</LINE></TIMER0_COMPA>
+  <TIMER0_COMPB><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>100</LINE></TIMER0_COMPB>
+  <TIMER0_OVF><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>101</LINE></TIMER0_OVF>
+  <SPI_STC><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>102</LINE></SPI_STC>
+  <USART0_RX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>103</LINE></USART0_RX>
+  <USART0_UDRE><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>104</LINE></USART0_UDRE>
+  <USART0_TX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>105</LINE></USART0_TX>
+  <ANALOG_COMP><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>106</LINE></ANALOG_COMP>
+  <ADCC><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>107</LINE></ADCC>
+  <EE_READY><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>108</LINE></EE_READY>
+  <TWI><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>109</LINE></TWI>
+  <SPM_READY><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>110</LINE></SPM_READY>
+  <USART1_RX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>111</LINE></USART1_RX>
+  <USART1_UDRE><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>112</LINE></USART1_UDRE>
+  <USART1_TX><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>113</LINE></USART1_TX>
+  <TIMER3_CAPT><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>114</LINE></TIMER3_CAPT>
+  <TIMER3_COMPA><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>115</LINE></TIMER3_COMPA>
+  <TIMER3_COMPB><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>116</LINE></TIMER3_COMPB>
+  <TIMER3_OVF><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>117</LINE></TIMER3_OVF>
+  <Boot><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>206</LINE></Boot>
+  <greet><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>261</LINE></greet>
+  <Boot1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>215</LINE></Boot1>
+  <Boot2><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>222</LINE></Boot2>
+  <Boot3><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>233</LINE></Boot3>
+  <Boot4><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>254</LINE></Boot4>
+  <Load><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\bootload.asm</FILE><LINE>250</LINE></Load>
+  <Xmodem1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>65</LINE></Xmodem1>
+  <xmodem><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>61</LINE></xmodem>
+  <PrintMsg><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>254</LINE></PrintMsg>
+  <StartCrc><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>74</LINE></StartCrc>
+  <GetByte><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>227</LINE></GetByte>
+  <GotByte><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>90</LINE></GotByte>
+  <StartBlk><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>84</LINE></StartBlk>
+  <GotByte1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>94</LINE></GotByte1>
+  <BegBlk><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>100</LINE></BegBlk>
+  <BadCrc><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>141</LINE></BadCrc>
+  <GetBlk><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>102</LINE></GetBlk>
+  <GetBlk1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>104</LINE></GetBlk1>
+  <GetBlk2><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>107</LINE></GetBlk2>
+  <GoodBlk1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>118</LINE></GoodBlk1>
+  <Print_Err><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>273</LINE></Print_Err>
+  <Flush><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>247</LINE></Flush>
+  <GoodBlk2><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>128</LINE></GoodBlk2>
+  <write_err><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>124</LINE></write_err>
+  <CalcCrc><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>130</LINE></CalcCrc>
+  <UpdCrc><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>353</LINE></UpdCrc>
+  <GoodCrc><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>146</LINE></GoodCrc>
+  <Write1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>148</LINE></Write1>
+  <IncBlk><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>209</LINE></IncBlk>
+  <write11><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>166</LINE></write11>
+  <fploop><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>169</LINE></fploop>
+  <stbf1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>172</LINE></stbf1>
+  <erase1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>182</LINE></erase1>
+  <write2><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>189</LINE></write2>
+  <write3><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>197</LINE></write3>
+  <Print_Good><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>292</LINE></Print_Good>
+  <StartCrcLp><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>229</LINE></StartCrcLp>
+  <Get_chr><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>329</LINE></Get_chr>
+  <GetByte1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>244</LINE></GetByte1>
+  <getb2234><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>234</LINE></getb2234>
+  <Flush1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>249</LINE></Flush1>
+  <Msg><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>269</LINE></Msg>
+  <PrtMsg1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>259</LINE></PrtMsg1>
+  <PrtMsg2><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>265</LINE></PrtMsg2>
+  <ErrMsg><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>288</LINE></ErrMsg>
+  <PrtErr1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>278</LINE></PrtErr1>
+  <PrtErr2><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>284</LINE></PrtErr2>
+  <GoodMsg><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>307</LINE></GoodMsg>
+  <Prtgood1><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>297</LINE></Prtgood1>
+  <Prtgood2><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>303</LINE></Prtgood2>
+  <Get_Chr2><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>336</LINE></Get_Chr2>
+  <CRCHI><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>390</LINE></CRCHI>
+  <crclo><FILE>C:\Users\Daryl\Desktop\AVR6502-2\AVRSource\xmodem-receive.asm</FILE><LINE>370</LINE></crclo>
+ </LABELS>
+</ASSEMBLER_INFO>
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/m1284Pdef.inc b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/m1284Pdef.inc
new file mode 100644
index 00000000..7bf6302e
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/m1284Pdef.inc
@@ -0,0 +1,1225 @@
+;***** THIS IS A MACHINE GENERATED FILE - DO NOT EDIT ********************
+;***** Created: 2011-02-09 12:03 ******* Source: ATmega1284P.xml *********
+;*************************************************************************
+;* A P P L I C A T I O N   N O T E   F O R   T H E   A V R   F A M I L Y
+;* 
+;* Number            : AVR000
+;* File Name         : "m1284Pdef.inc"
+;* Title             : Register/Bit Definitions for the ATmega1284P
+;* Date              : 2011-02-09
+;* Version           : 2.35
+;* Support E-mail    : avr@atmel.com
+;* Target MCU        : ATmega1284P
+;* 
+;* DESCRIPTION
+;* When including this file in the assembly program file, all I/O register 
+;* names and I/O register bit names appearing in the data book can be used.
+;* In addition, the six registers forming the three data pointers X, Y and 
+;* Z have been assigned names XL - ZH. Highest RAM address for Internal 
+;* SRAM is also defined 
+;* 
+;* The Register names are represented by their hexadecimal address.
+;* 
+;* The Register Bit names are represented by their bit number (0-7).
+;* 
+;* Please observe the difference in using the bit names with instructions
+;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc"
+;* (skip if bit in register set/cleared). The following example illustrates
+;* this:
+;* 
+;* in    r16,PORTB             ;read PORTB latch
+;* sbr   r16,(1<<PB6)+(1<<PB5) ;set PB6 and PB5 (use masks, not bit#)
+;* out   PORTB,r16             ;output to PORTB
+;* 
+;* in    r16,TIFR              ;read the Timer Interrupt Flag Register
+;* sbrc  r16,TOV0              ;test the overflow flag (use bit#)
+;* rjmp  TOV0_is_set           ;jump if set
+;* ...                         ;otherwise do something else
+;*************************************************************************
+
+#ifndef _M1284PDEF_INC_
+#define _M1284PDEF_INC_
+
+
+#pragma partinc 0
+
+; ***** SPECIFY DEVICE ***************************************************
+.device ATmega1284P
+#pragma AVRPART ADMIN PART_NAME ATmega1284P
+.equ	SIGNATURE_000	= 0x1e
+.equ	SIGNATURE_001	= 0x97
+.equ	SIGNATURE_002	= 0x05
+
+#pragma AVRPART CORE CORE_VERSION V2E
+
+
+; ***** I/O REGISTER DEFINITIONS *****************************************
+; NOTE:
+; Definitions marked "MEMORY MAPPED"are extended I/O ports
+; and cannot be used with IN/OUT instructions
+.equ	UDR1	= 0xce	; MEMORY MAPPED
+.equ	UBRR1L	= 0xcc	; MEMORY MAPPED
+.equ	UBRR1H	= 0xcd	; MEMORY MAPPED
+.equ	UCSR1C	= 0xca	; MEMORY MAPPED
+.equ	UCSR1B	= 0xc9	; MEMORY MAPPED
+.equ	UCSR1A	= 0xc8	; MEMORY MAPPED
+.equ	UDR0	= 0xc6	; MEMORY MAPPED
+.equ	UBRR0L	= 0xc4	; MEMORY MAPPED
+.equ	UBRR0H	= 0xc5	; MEMORY MAPPED
+.equ	UCSR0C	= 0xc2	; MEMORY MAPPED
+.equ	UCSR0B	= 0xc1	; MEMORY MAPPED
+.equ	UCSR0A	= 0xc0	; MEMORY MAPPED
+.equ	TWAMR	= 0xbd	; MEMORY MAPPED
+.equ	TWCR	= 0xbc	; MEMORY MAPPED
+.equ	TWDR	= 0xbb	; MEMORY MAPPED
+.equ	TWAR	= 0xba	; MEMORY MAPPED
+.equ	TWSR	= 0xb9	; MEMORY MAPPED
+.equ	TWBR	= 0xb8	; MEMORY MAPPED
+.equ	ASSR	= 0xb6	; MEMORY MAPPED
+.equ	OCR2B	= 0xb4	; MEMORY MAPPED
+.equ	OCR2A	= 0xb3	; MEMORY MAPPED
+.equ	TCNT2	= 0xb2	; MEMORY MAPPED
+.equ	TCCR2B	= 0xb1	; MEMORY MAPPED
+.equ	TCCR2A	= 0xb0	; MEMORY MAPPED
+.equ	OCR3BL	= 0x9a	; MEMORY MAPPED
+.equ	OCR3BH	= 0x9b	; MEMORY MAPPED
+.equ	OCR3AL	= 0x98	; MEMORY MAPPED
+.equ	OCR3AH	= 0x99	; MEMORY MAPPED
+.equ	ICR3L	= 0x96	; MEMORY MAPPED
+.equ	ICR3H	= 0x97	; MEMORY MAPPED
+.equ	TCNT3L	= 0x94	; MEMORY MAPPED
+.equ	TCNT3H	= 0x95	; MEMORY MAPPED
+.equ	TCCR3C	= 0x92	; MEMORY MAPPED
+.equ	TCCR3B	= 0x91	; MEMORY MAPPED
+.equ	TCCR3A	= 0x90	; MEMORY MAPPED
+.equ	OCR1BL	= 0x8a	; MEMORY MAPPED
+.equ	OCR1BH	= 0x8b	; MEMORY MAPPED
+.equ	OCR1AL	= 0x88	; MEMORY MAPPED
+.equ	OCR1AH	= 0x89	; MEMORY MAPPED
+.equ	ICR1L	= 0x86	; MEMORY MAPPED
+.equ	ICR1H	= 0x87	; MEMORY MAPPED
+.equ	TCNT1L	= 0x84	; MEMORY MAPPED
+.equ	TCNT1H	= 0x85	; MEMORY MAPPED
+.equ	TCCR1C	= 0x82	; MEMORY MAPPED
+.equ	TCCR1B	= 0x81	; MEMORY MAPPED
+.equ	TCCR1A	= 0x80	; MEMORY MAPPED
+.equ	DIDR1	= 0x7f	; MEMORY MAPPED
+.equ	DIDR0	= 0x7e	; MEMORY MAPPED
+.equ	ADMUX	= 0x7c	; MEMORY MAPPED
+.equ	ADCSRB	= 0x7b	; MEMORY MAPPED
+.equ	ADCSRA	= 0x7a	; MEMORY MAPPED
+.equ	ADCH	= 0x79	; MEMORY MAPPED
+.equ	ADCL	= 0x78	; MEMORY MAPPED
+.equ	PCMSK3	= 0x73	; MEMORY MAPPED
+.equ	TIMSK3	= 0x71	; MEMORY MAPPED
+.equ	TIMSK2	= 0x70	; MEMORY MAPPED
+.equ	TIMSK1	= 0x6f	; MEMORY MAPPED
+.equ	TIMSK0	= 0x6e	; MEMORY MAPPED
+.equ	PCMSK2	= 0x6d	; MEMORY MAPPED
+.equ	PCMSK1	= 0x6c	; MEMORY MAPPED
+.equ	PCMSK0	= 0x6b	; MEMORY MAPPED
+.equ	EICRA	= 0x69	; MEMORY MAPPED
+.equ	PCICR	= 0x68	; MEMORY MAPPED
+.equ	OSCCAL	= 0x66	; MEMORY MAPPED
+.equ	PRR1	= 0x65	; MEMORY MAPPED
+.equ	PRR0	= 0x64	; MEMORY MAPPED
+.equ	CLKPR	= 0x61	; MEMORY MAPPED
+.equ	WDTCSR	= 0x60	; MEMORY MAPPED
+.equ	SREG	= 0x3f
+.equ	SPL	= 0x3d
+.equ	SPH	= 0x3e
+.equ	RAMPZ	= 0x3b
+.equ	SPMCSR	= 0x37
+.equ	MCUCR	= 0x35
+.equ	MCUSR	= 0x34
+.equ	SMCR	= 0x33
+.equ	OCDR	= 0x31
+.equ	ACSR	= 0x30
+.equ	SPDR	= 0x2e
+.equ	SPSR	= 0x2d
+.equ	SPCR	= 0x2c
+.equ	GPIOR2	= 0x2b
+.equ	GPIOR1	= 0x2a
+.equ	OCR0B	= 0x28
+.equ	OCR0A	= 0x27
+.equ	TCNT0	= 0x26
+.equ	TCCR0B	= 0x25
+.equ	TCCR0A	= 0x24
+.equ	GTCCR	= 0x23
+.equ	EEARH	= 0x22
+.equ	EEARL	= 0x21
+.equ	EEDR	= 0x20
+.equ	EECR	= 0x1f
+.equ	GPIOR0	= 0x1e
+.equ	EIMSK	= 0x1d
+.equ	EIFR	= 0x1c
+.equ	PCIFR	= 0x1b
+.equ	TIFR3	= 0x18
+.equ	TIFR2	= 0x17
+.equ	TIFR1	= 0x16
+.equ	TIFR0	= 0x15
+.equ	PORTD	= 0x0b
+.equ	DDRD	= 0x0a
+.equ	PIND	= 0x09
+.equ	PORTC	= 0x08
+.equ	DDRC	= 0x07
+.equ	PINC	= 0x06
+.equ	PORTB	= 0x05
+.equ	DDRB	= 0x04
+.equ	PINB	= 0x03
+.equ	PORTA	= 0x02
+.equ	DDRA	= 0x01
+.equ	PINA	= 0x00
+
+
+; ***** BIT DEFINITIONS **************************************************
+
+; ***** ANALOG_COMPARATOR ************
+; ADCSRB - ADC Control and Status Register B
+.equ	ACME	= 6	; Analog Comparator Multiplexer Enable
+
+; ACSR - Analog Comparator Control And Status Register
+.equ	ACIS0	= 0	; Analog Comparator Interrupt Mode Select bit 0
+.equ	ACIS1	= 1	; Analog Comparator Interrupt Mode Select bit 1
+.equ	ACIC	= 2	; Analog Comparator Input Capture Enable
+.equ	ACIE	= 3	; Analog Comparator Interrupt Enable
+.equ	ACI	= 4	; Analog Comparator Interrupt Flag
+.equ	ACO	= 5	; Analog Compare Output
+.equ	ACBG	= 6	; Analog Comparator Bandgap Select
+.equ	ACD	= 7	; Analog Comparator Disable
+
+; DIDR1 - Digital Input Disable Register 1
+.equ	AIN0D	= 0	; AIN0 Digital Input Disable
+.equ	AIN1D	= 1	; AIN1 Digital Input Disable
+
+
+; ***** USART0 ***********************
+; UDR0 - USART I/O Data Register
+.equ	UDR0_0	= 0	; USART I/O Data Register bit 0
+.equ	UDR0_1	= 1	; USART I/O Data Register bit 1
+.equ	UDR0_2	= 2	; USART I/O Data Register bit 2
+.equ	UDR0_3	= 3	; USART I/O Data Register bit 3
+.equ	UDR0_4	= 4	; USART I/O Data Register bit 4
+.equ	UDR0_5	= 5	; USART I/O Data Register bit 5
+.equ	UDR0_6	= 6	; USART I/O Data Register bit 6
+.equ	UDR0_7	= 7	; USART I/O Data Register bit 7
+
+; UCSR0A - USART Control and Status Register A
+.equ	MPCM0	= 0	; Multi-processor Communication Mode
+.equ	U2X0	= 1	; Double the USART transmission speed
+.equ	UPE0	= 2	; Parity Error
+.equ	DOR0	= 3	; Data overRun
+.equ	FE0	= 4	; Framing Error
+.equ	UDRE0	= 5	; USART Data Register Empty
+.equ	TXC0	= 6	; USART Transmitt Complete
+.equ	RXC0	= 7	; USART Receive Complete
+
+; UCSR0B - USART Control and Status Register B
+.equ	TXB80	= 0	; Transmit Data Bit 8
+.equ	RXB80	= 1	; Receive Data Bit 8
+.equ	UCSZ02	= 2	; Character Size
+.equ	TXEN0	= 3	; Transmitter Enable
+.equ	RXEN0	= 4	; Receiver Enable
+.equ	UDRIE0	= 5	; USART Data register Empty Interrupt Enable
+.equ	TXCIE0	= 6	; TX Complete Interrupt Enable
+.equ	RXCIE0	= 7	; RX Complete Interrupt Enable
+
+; UCSR0C - USART Control and Status Register C
+.equ	UCPOL0	= 0	; Clock Polarity
+.equ	UCSZ00	= 1	; Character Size
+.equ	UCPHA0	= UCSZ00	; For compatibility
+.equ	UCSZ01	= 2	; Character Size
+.equ	UDORD0	= UCSZ01	; For compatibility
+.equ	USBS0	= 3	; Stop Bit Select
+.equ	UPM00	= 4	; Parity Mode Bit 0
+.equ	UPM01	= 5	; Parity Mode Bit 1
+.equ	UMSEL00	= 6	; USART Mode Select
+.equ	UMSEL0	= UMSEL00	; For compatibility
+.equ	UMSEL01	= 7	; USART Mode Select
+.equ	UMSEL1	= UMSEL01	; For compatibility
+
+; UBRR0H - USART Baud Rate Register High Byte
+.equ	UBRR8	= 0	; USART Baud Rate Register bit 8
+.equ	UBRR9	= 1	; USART Baud Rate Register bit 9
+.equ	UBRR10	= 2	; USART Baud Rate Register bit 10
+.equ	UBRR11	= 3	; USART Baud Rate Register bit 11
+
+; UBRR0L - USART Baud Rate Register Low Byte
+.equ	_UBRR0	= 0	; USART Baud Rate Register bit 0
+.equ	_UBRR1	= 1	; USART Baud Rate Register bit 1
+.equ	UBRR2	= 2	; USART Baud Rate Register bit 2
+.equ	UBRR3	= 3	; USART Baud Rate Register bit 3
+.equ	UBRR4	= 4	; USART Baud Rate Register bit 4
+.equ	UBRR5	= 5	; USART Baud Rate Register bit 5
+.equ	UBRR6	= 6	; USART Baud Rate Register bit 6
+.equ	UBRR7	= 7	; USART Baud Rate Register bit 7
+
+
+; ***** PORTA ************************
+; PORTA - Port A Data Register
+.equ	PORTA0	= 0	; Port A Data Register bit 0
+.equ	PA0	= 0	; For compatibility
+.equ	PORTA1	= 1	; Port A Data Register bit 1
+.equ	PA1	= 1	; For compatibility
+.equ	PORTA2	= 2	; Port A Data Register bit 2
+.equ	PA2	= 2	; For compatibility
+.equ	PORTA3	= 3	; Port A Data Register bit 3
+.equ	PA3	= 3	; For compatibility
+.equ	PORTA4	= 4	; Port A Data Register bit 4
+.equ	PA4	= 4	; For compatibility
+.equ	PORTA5	= 5	; Port A Data Register bit 5
+.equ	PA5	= 5	; For compatibility
+.equ	PORTA6	= 6	; Port A Data Register bit 6
+.equ	PA6	= 6	; For compatibility
+.equ	PORTA7	= 7	; Port A Data Register bit 7
+.equ	PA7	= 7	; For compatibility
+
+; DDRA - Port A Data Direction Register
+.equ	DDA0	= 0	; Data Direction Register, Port A, bit 0
+.equ	DDA1	= 1	; Data Direction Register, Port A, bit 1
+.equ	DDA2	= 2	; Data Direction Register, Port A, bit 2
+.equ	DDA3	= 3	; Data Direction Register, Port A, bit 3
+.equ	DDA4	= 4	; Data Direction Register, Port A, bit 4
+.equ	DDA5	= 5	; Data Direction Register, Port A, bit 5
+.equ	DDA6	= 6	; Data Direction Register, Port A, bit 6
+.equ	DDA7	= 7	; Data Direction Register, Port A, bit 7
+
+; PINA - Port A Input Pins
+.equ	PINA0	= 0	; Input Pins, Port A bit 0
+.equ	PINA1	= 1	; Input Pins, Port A bit 1
+.equ	PINA2	= 2	; Input Pins, Port A bit 2
+.equ	PINA3	= 3	; Input Pins, Port A bit 3
+.equ	PINA4	= 4	; Input Pins, Port A bit 4
+.equ	PINA5	= 5	; Input Pins, Port A bit 5
+.equ	PINA6	= 6	; Input Pins, Port A bit 6
+.equ	PINA7	= 7	; Input Pins, Port A bit 7
+
+
+; ***** PORTB ************************
+; PORTB - Port B Data Register
+.equ	PORTB0	= 0	; Port B Data Register bit 0
+.equ	PB0	= 0	; For compatibility
+.equ	PORTB1	= 1	; Port B Data Register bit 1
+.equ	PB1	= 1	; For compatibility
+.equ	PORTB2	= 2	; Port B Data Register bit 2
+.equ	PB2	= 2	; For compatibility
+.equ	PORTB3	= 3	; Port B Data Register bit 3
+.equ	PB3	= 3	; For compatibility
+.equ	PORTB4	= 4	; Port B Data Register bit 4
+.equ	PB4	= 4	; For compatibility
+.equ	PORTB5	= 5	; Port B Data Register bit 5
+.equ	PB5	= 5	; For compatibility
+.equ	PORTB6	= 6	; Port B Data Register bit 6
+.equ	PB6	= 6	; For compatibility
+.equ	PORTB7	= 7	; Port B Data Register bit 7
+.equ	PB7	= 7	; For compatibility
+
+; DDRB - Port B Data Direction Register
+.equ	DDB0	= 0	; Port B Data Direction Register bit 0
+.equ	DDB1	= 1	; Port B Data Direction Register bit 1
+.equ	DDB2	= 2	; Port B Data Direction Register bit 2
+.equ	DDB3	= 3	; Port B Data Direction Register bit 3
+.equ	DDB4	= 4	; Port B Data Direction Register bit 4
+.equ	DDB5	= 5	; Port B Data Direction Register bit 5
+.equ	DDB6	= 6	; Port B Data Direction Register bit 6
+.equ	DDB7	= 7	; Port B Data Direction Register bit 7
+
+; PINB - Port B Input Pins
+.equ	PINB0	= 0	; Port B Input Pins bit 0
+.equ	PINB1	= 1	; Port B Input Pins bit 1
+.equ	PINB2	= 2	; Port B Input Pins bit 2
+.equ	PINB3	= 3	; Port B Input Pins bit 3
+.equ	PINB4	= 4	; Port B Input Pins bit 4
+.equ	PINB5	= 5	; Port B Input Pins bit 5
+.equ	PINB6	= 6	; Port B Input Pins bit 6
+.equ	PINB7	= 7	; Port B Input Pins bit 7
+
+
+; ***** PORTC ************************
+; PORTC - Port C Data Register
+.equ	PORTC0	= 0	; Port C Data Register bit 0
+.equ	PC0	= 0	; For compatibility
+.equ	PORTC1	= 1	; Port C Data Register bit 1
+.equ	PC1	= 1	; For compatibility
+.equ	PORTC2	= 2	; Port C Data Register bit 2
+.equ	PC2	= 2	; For compatibility
+.equ	PORTC3	= 3	; Port C Data Register bit 3
+.equ	PC3	= 3	; For compatibility
+.equ	PORTC4	= 4	; Port C Data Register bit 4
+.equ	PC4	= 4	; For compatibility
+.equ	PORTC5	= 5	; Port C Data Register bit 5
+.equ	PC5	= 5	; For compatibility
+.equ	PORTC6	= 6	; Port C Data Register bit 6
+.equ	PC6	= 6	; For compatibility
+.equ	PORTC7	= 7	; Port C Data Register bit 7
+.equ	PC7	= 7	; For compatibility
+
+; DDRC - Port C Data Direction Register
+.equ	DDC0	= 0	; Port C Data Direction Register bit 0
+.equ	DDC1	= 1	; Port C Data Direction Register bit 1
+.equ	DDC2	= 2	; Port C Data Direction Register bit 2
+.equ	DDC3	= 3	; Port C Data Direction Register bit 3
+.equ	DDC4	= 4	; Port C Data Direction Register bit 4
+.equ	DDC5	= 5	; Port C Data Direction Register bit 5
+.equ	DDC6	= 6	; Port C Data Direction Register bit 6
+.equ	DDC7	= 7	; Port C Data Direction Register bit 7
+
+; PINC - Port C Input Pins
+.equ	PINC0	= 0	; Port C Input Pins bit 0
+.equ	PINC1	= 1	; Port C Input Pins bit 1
+.equ	PINC2	= 2	; Port C Input Pins bit 2
+.equ	PINC3	= 3	; Port C Input Pins bit 3
+.equ	PINC4	= 4	; Port C Input Pins bit 4
+.equ	PINC5	= 5	; Port C Input Pins bit 5
+.equ	PINC6	= 6	; Port C Input Pins bit 6
+.equ	PINC7	= 7	; Port C Input Pins bit 7
+
+
+; ***** PORTD ************************
+; PORTD - Port D Data Register
+.equ	PORTD0	= 0	; Port D Data Register bit 0
+.equ	PD0	= 0	; For compatibility
+.equ	PORTD1	= 1	; Port D Data Register bit 1
+.equ	PD1	= 1	; For compatibility
+.equ	PORTD2	= 2	; Port D Data Register bit 2
+.equ	PD2	= 2	; For compatibility
+.equ	PORTD3	= 3	; Port D Data Register bit 3
+.equ	PD3	= 3	; For compatibility
+.equ	PORTD4	= 4	; Port D Data Register bit 4
+.equ	PD4	= 4	; For compatibility
+.equ	PORTD5	= 5	; Port D Data Register bit 5
+.equ	PD5	= 5	; For compatibility
+.equ	PORTD6	= 6	; Port D Data Register bit 6
+.equ	PD6	= 6	; For compatibility
+.equ	PORTD7	= 7	; Port D Data Register bit 7
+.equ	PD7	= 7	; For compatibility
+
+; DDRD - Port D Data Direction Register
+.equ	DDD0	= 0	; Port D Data Direction Register bit 0
+.equ	DDD1	= 1	; Port D Data Direction Register bit 1
+.equ	DDD2	= 2	; Port D Data Direction Register bit 2
+.equ	DDD3	= 3	; Port D Data Direction Register bit 3
+.equ	DDD4	= 4	; Port D Data Direction Register bit 4
+.equ	DDD5	= 5	; Port D Data Direction Register bit 5
+.equ	DDD6	= 6	; Port D Data Direction Register bit 6
+.equ	DDD7	= 7	; Port D Data Direction Register bit 7
+
+; PIND - Port D Input Pins
+.equ	PIND0	= 0	; Port D Input Pins bit 0
+.equ	PIND1	= 1	; Port D Input Pins bit 1
+.equ	PIND2	= 2	; Port D Input Pins bit 2
+.equ	PIND3	= 3	; Port D Input Pins bit 3
+.equ	PIND4	= 4	; Port D Input Pins bit 4
+.equ	PIND5	= 5	; Port D Input Pins bit 5
+.equ	PIND6	= 6	; Port D Input Pins bit 6
+.equ	PIND7	= 7	; Port D Input Pins bit 7
+
+
+; ***** TIMER_COUNTER_0 **************
+; TIMSK0 - Timer/Counter0 Interrupt Mask Register
+.equ	TOIE0	= 0	; Timer/Counter0 Overflow Interrupt Enable
+.equ	OCIE0A	= 1	; Timer/Counter0 Output Compare Match A Interrupt Enable
+.equ	OCIE0B	= 2	; Timer/Counter0 Output Compare Match B Interrupt Enable
+
+; TIFR0 - Timer/Counter0 Interrupt Flag register
+.equ	TOV0	= 0	; Timer/Counter0 Overflow Flag
+.equ	OCF0A	= 1	; Timer/Counter0 Output Compare Flag 0A
+.equ	OCF0B	= 2	; Timer/Counter0 Output Compare Flag 0B
+
+; TCCR0A - Timer/Counter  Control Register A
+.equ	WGM00	= 0	; Waveform Generation Mode
+.equ	WGM01	= 1	; Waveform Generation Mode
+.equ	COM0B0	= 4	; Compare Output Mode, Fast PWm
+.equ	COM0B1	= 5	; Compare Output Mode, Fast PWm
+.equ	COM0A0	= 6	; Compare Output Mode, Phase Correct PWM Mode
+.equ	COM0A1	= 7	; Compare Output Mode, Phase Correct PWM Mode
+
+; TCCR0B - Timer/Counter Control Register B
+.equ	CS00	= 0	; Clock Select
+.equ	CS01	= 1	; Clock Select
+.equ	CS02	= 2	; Clock Select
+.equ	WGM02	= 3	; 
+.equ	FOC0B	= 6	; Force Output Compare B
+.equ	FOC0A	= 7	; Force Output Compare A
+
+; TCNT0 - Timer/Counter0
+.equ	TCNT0_0	= 0	; 
+.equ	TCNT0_1	= 1	; 
+.equ	TCNT0_2	= 2	; 
+.equ	TCNT0_3	= 3	; 
+.equ	TCNT0_4	= 4	; 
+.equ	TCNT0_5	= 5	; 
+.equ	TCNT0_6	= 6	; 
+.equ	TCNT0_7	= 7	; 
+
+; OCR0A - Timer/Counter0 Output Compare Register
+.equ	OCR0A_0	= 0	; 
+.equ	OCR0A_1	= 1	; 
+.equ	OCR0A_2	= 2	; 
+.equ	OCR0A_3	= 3	; 
+.equ	OCR0A_4	= 4	; 
+.equ	OCR0A_5	= 5	; 
+.equ	OCR0A_6	= 6	; 
+.equ	OCR0A_7	= 7	; 
+
+; OCR0B - Timer/Counter0 Output Compare Register
+.equ	OCR0B_0	= 0	; 
+.equ	OCR0B_1	= 1	; 
+.equ	OCR0B_2	= 2	; 
+.equ	OCR0B_3	= 3	; 
+.equ	OCR0B_4	= 4	; 
+.equ	OCR0B_5	= 5	; 
+.equ	OCR0B_6	= 6	; 
+.equ	OCR0B_7	= 7	; 
+
+; GTCCR - General Timer/Counter Control Register
+.equ	PSRSYNC	= 0	; Prescaler Reset Timer/Counter1 and Timer/Counter0
+.equ	PSR10	= PSRSYNC	; For compatibility
+.equ	TSM	= 7	; Timer/Counter Synchronization Mode
+
+
+; ***** TIMER_COUNTER_1 **************
+; TIMSK1 - Timer/Counter1 Interrupt Mask Register
+.equ	TOIE1	= 0	; Timer/Counter1 Overflow Interrupt Enable
+.equ	OCIE1A	= 1	; Timer/Counter1 Output Compare A Match Interrupt Enable
+.equ	OCIE1B	= 2	; Timer/Counter1 Output Compare B Match Interrupt Enable
+.equ	ICIE1	= 5	; Timer/Counter1 Input Capture Interrupt Enable
+
+; TIFR1 - Timer/Counter Interrupt Flag register
+.equ	TOV1	= 0	; Timer/Counter1 Overflow Flag
+.equ	OCF1A	= 1	; Timer/Counter1 Output Compare A Match Flag
+.equ	OCF1B	= 2	; Timer/Counter1 Output Compare B Match Flag
+.equ	ICF1	= 5	; Timer/Counter1 Input Capture Flag
+
+; TCCR1A - Timer/Counter1 Control Register A
+.equ	WGM10	= 0	; Pulse Width Modulator Select Bit 0
+.equ	PWM10	= WGM10	; For compatibility
+.equ	WGM11	= 1	; Pulse Width Modulator Select Bit 1
+.equ	PWM11	= WGM11	; For compatibility
+.equ	COM1B0	= 4	; Comparet Ouput Mode 1B, bit 0
+.equ	COM1B1	= 5	; Compare Output Mode 1B, bit 1
+.equ	COM1A0	= 6	; Comparet Ouput Mode 1A, bit 0
+.equ	COM1A1	= 7	; Compare Output Mode 1A, bit 1
+
+; TCCR1B - Timer/Counter1 Control Register B
+.equ	CS10	= 0	; Clock Select bit 0
+.equ	CS11	= 1	; Clock Select 1 bit 1
+.equ	CS12	= 2	; Clock Select1 bit 2
+.equ	WGM12	= 3	; Waveform Generation Mode Bit 2
+.equ	CTC1	= WGM12	; For compatibility
+.equ	WGM13	= 4	; Waveform Generation Mode Bit 3
+.equ	ICES1	= 6	; Input Capture 1 Edge Select
+.equ	ICNC1	= 7	; Input Capture 1 Noise Canceler
+
+; TCCR1C - Timer/Counter1 Control Register C
+.equ	FOC1B	= 6	; Force Output Compare for Channel B
+.equ	FOC1A	= 7	; Force Output Compare for Channel A
+
+
+; ***** TIMER_COUNTER_2 **************
+; TIMSK2 - Timer/Counter Interrupt Mask register
+.equ	TOIE2	= 0	; Timer/Counter2 Overflow Interrupt Enable
+.equ	TOIE2A	= TOIE2	; For compatibility
+.equ	OCIE2A	= 1	; Timer/Counter2 Output Compare Match A Interrupt Enable
+.equ	OCIE2B	= 2	; Timer/Counter2 Output Compare Match B Interrupt Enable
+
+; TIFR2 - Timer/Counter Interrupt Flag Register
+.equ	TOV2	= 0	; Timer/Counter2 Overflow Flag
+.equ	OCF2A	= 1	; Output Compare Flag 2A
+.equ	OCF2B	= 2	; Output Compare Flag 2B
+
+; TCCR2A - Timer/Counter2 Control Register A
+.equ	WGM20	= 0	; Waveform Genration Mode
+.equ	WGM21	= 1	; Waveform Genration Mode
+.equ	COM2B0	= 4	; Compare Output Mode bit 0
+.equ	COM2B1	= 5	; Compare Output Mode bit 1
+.equ	COM2A0	= 6	; Compare Output Mode bit 1
+.equ	COM2A1	= 7	; Compare Output Mode bit 1
+
+; TCCR2B - Timer/Counter2 Control Register B
+.equ	CS20	= 0	; Clock Select bit 0
+.equ	CS21	= 1	; Clock Select bit 1
+.equ	CS22	= 2	; Clock Select bit 2
+.equ	WGM22	= 3	; Waveform Generation Mode
+.equ	FOC2B	= 6	; Force Output Compare B
+.equ	FOC2A	= 7	; Force Output Compare A
+
+; TCNT2 - Timer/Counter2
+.equ	TCNT2_0	= 0	; Timer/Counter 2 bit 0
+.equ	TCNT2_1	= 1	; Timer/Counter 2 bit 1
+.equ	TCNT2_2	= 2	; Timer/Counter 2 bit 2
+.equ	TCNT2_3	= 3	; Timer/Counter 2 bit 3
+.equ	TCNT2_4	= 4	; Timer/Counter 2 bit 4
+.equ	TCNT2_5	= 5	; Timer/Counter 2 bit 5
+.equ	TCNT2_6	= 6	; Timer/Counter 2 bit 6
+.equ	TCNT2_7	= 7	; Timer/Counter 2 bit 7
+
+; OCR2A - Timer/Counter2 Output Compare Register A
+.equ	OCR2A_0	= 0	; Timer/Counter2 Output Compare Register Bit 0
+.equ	OCR2A_1	= 1	; Timer/Counter2 Output Compare Register Bit 1
+.equ	OCR2A_2	= 2	; Timer/Counter2 Output Compare Register Bit 2
+.equ	OCR2A_3	= 3	; Timer/Counter2 Output Compare Register Bit 3
+.equ	OCR2A_4	= 4	; Timer/Counter2 Output Compare Register Bit 4
+.equ	OCR2A_5	= 5	; Timer/Counter2 Output Compare Register Bit 5
+.equ	OCR2A_6	= 6	; Timer/Counter2 Output Compare Register Bit 6
+.equ	OCR2A_7	= 7	; Timer/Counter2 Output Compare Register Bit 7
+
+; OCR2B - Timer/Counter2 Output Compare Register B
+.equ	OCR2B_0	= 0	; Timer/Counter2 Output Compare Register Bit 0
+.equ	OCR2B_1	= 1	; Timer/Counter2 Output Compare Register Bit 1
+.equ	OCR2B_2	= 2	; Timer/Counter2 Output Compare Register Bit 2
+.equ	OCR2B_3	= 3	; Timer/Counter2 Output Compare Register Bit 3
+.equ	OCR2B_4	= 4	; Timer/Counter2 Output Compare Register Bit 4
+.equ	OCR2B_5	= 5	; Timer/Counter2 Output Compare Register Bit 5
+.equ	OCR2B_6	= 6	; Timer/Counter2 Output Compare Register Bit 6
+.equ	OCR2B_7	= 7	; Timer/Counter2 Output Compare Register Bit 7
+
+; ASSR - Asynchronous Status Register
+.equ	TCR2BUB	= 0	; Timer/Counter Control Register2 Update Busy
+.equ	TCR2AUB	= 1	; Timer/Counter Control Register2 Update Busy
+.equ	OCR2BUB	= 2	; Output Compare Register 2 Update Busy
+.equ	OCR2AUB	= 3	; Output Compare Register2 Update Busy
+.equ	TCN2UB	= 4	; Timer/Counter2 Update Busy
+.equ	AS2	= 5	; Asynchronous Timer/Counter2
+.equ	EXCLK	= 6	; Enable External Clock Input
+
+; GTCCR - General Timer Counter Control register
+.equ	PSRASY	= 1	; Prescaler Reset Timer/Counter2
+.equ	PSR2	= PSRASY	; For compatibility
+;.equ	TSM	= 7	; Timer/Counter Synchronization Mode
+
+
+; ***** TIMER_COUNTER_3 **************
+; TIMSK3 - Timer/Counter3 Interrupt Mask Register
+.equ	TOIE3	= 0	; Timer/Counter3 Overflow Interrupt Enable
+.equ	OCIE3A	= 1	; Timer/Counter3 Output Compare A Match Interrupt Enable
+.equ	OCIE3B	= 2	; Timer/Counter3 Output Compare B Match Interrupt Enable
+.equ	ICIE3	= 5	; Timer/Counter3 Input Capture Interrupt Enable
+
+; TIFR3 - Timer/Counter Interrupt Flag register
+.equ	TOV3	= 0	; Timer/Counter3 Overflow Flag
+.equ	OCF3A	= 1	; Timer/Counter3 Output Compare A Match Flag
+.equ	OCF3B	= 2	; Timer/Counter3 Output Compare B Match Flag
+.equ	ICF3	= 5	; Timer/Counter3 Input Capture Flag
+
+; TCCR3A - Timer/Counter3 Control Register A
+.equ	WGM30	= 0	; Pulse Width Modulator Select Bit 0
+.equ	WGM31	= 1	; Pulse Width Modulator Select Bit 1
+.equ	COM3B0	= 4	; Comparet Ouput Mode 3B, bit 0
+.equ	COM3B1	= 5	; Compare Output Mode 3B, bit 1
+.equ	COM3A0	= 6	; Comparet Ouput Mode 3A, bit 0
+.equ	COM3A1	= 7	; Compare Output Mode 3A, bit 1
+
+; TCCR3B - Timer/Counter3 Control Register B
+.equ	CS30	= 0	; Clock Select bit 0
+.equ	CS31	= 1	; Clock Select 3 bit 1
+.equ	CS32	= 2	; Clock Select3 bit 2
+.equ	WGM32	= 3	; Waveform Generation Mode Bit 2
+.equ	WGM33	= 4	; Waveform Generation Mode Bit 3
+.equ	ICES3	= 6	; Input Capture 3 Edge Select
+.equ	ICNC3	= 7	; Input Capture 3 Noise Canceler
+
+; TCCR3C - Timer/Counter3 Control Register C
+.equ	FOC3B	= 6	; Force Output Compare for Channel B
+.equ	FOC3A	= 7	; Force Output Compare for Channel A
+
+; OCR3BH - Timer/Counter3 Output Compare Register B High Byte
+.equ	OCR3AH0	= 0	; Timer/Counter3 Output Compare Register High Byte bit 0
+.equ	OCR3AH1	= 1	; Timer/Counter3 Output Compare Register High Byte bit 1
+.equ	OCR3AH2	= 2	; Timer/Counter3 Output Compare Register High Byte bit 2
+.equ	OCR3AH3	= 3	; Timer/Counter3 Output Compare Register High Byte bit 3
+.equ	OCR3AH4	= 4	; Timer/Counter3 Output Compare Register High Byte bit 4
+.equ	OCR3AH5	= 5	; Timer/Counter3 Output Compare Register High Byte bit 5
+.equ	OCR3AH6	= 6	; Timer/Counter3 Output Compare Register High Byte bit 6
+.equ	OCR3AH7	= 7	; Timer/Counter3 Output Compare Register High Byte bit 7
+
+; OCR3BL - Timer/Counter3 Output Compare Register B Low Byte
+.equ	OCR3AL0	= 0	; Timer/Counter3 Output Compare Register Low Byte Bit 0
+.equ	OCR3AL1	= 1	; Timer/Counter3 Output Compare Register Low Byte Bit 1
+.equ	OCR3AL2	= 2	; Timer/Counter3 Output Compare Register Low Byte Bit 2
+.equ	OCR3AL3	= 3	; Timer/Counter3 Output Compare Register Low Byte Bit 3
+.equ	OCR3AL4	= 4	; Timer/Counter3 Output Compare Register Low Byte Bit 4
+.equ	OCR3AL5	= 5	; Timer/Counter3 Output Compare Register Low Byte Bit 5
+.equ	OCR3AL6	= 6	; Timer/Counter3 Output Compare Register Low Byte Bit 6
+.equ	OCR3AL7	= 7	; Timer/Counter3 Output Compare Register Low Byte Bit 7
+
+
+; ***** BOOT_LOAD ********************
+; SPMCSR - Store Program Memory Control Register
+.equ	SPMEN	= 0	; Store Program Memory Enable
+.equ	PGERS	= 1	; Page Erase
+.equ	PGWRT	= 2	; Page Write
+.equ	BLBSET	= 3	; Boot Lock Bit Set
+.equ	RWWSRE	= 4	; Read While Write section read enable
+.equ	SIGRD	= 5	; Signature Row Read
+.equ	RWWSB	= 6	; Read While Write Section Busy
+.equ	SPMIE	= 7	; SPM Interrupt Enable
+
+
+; ***** EXTERNAL_INTERRUPT ***********
+; EICRA - External Interrupt Control Register A
+.equ	ISC00	= 0	; External Interrupt Sense Control Bit
+.equ	ISC01	= 1	; External Interrupt Sense Control Bit
+.equ	ISC10	= 2	; External Interrupt Sense Control Bit
+.equ	ISC11	= 3	; External Interrupt Sense Control Bit
+.equ	ISC20	= 4	; External Interrupt Sense Control Bit
+.equ	ISC21	= 5	; External Interrupt Sense Control Bit
+
+; EIMSK - External Interrupt Mask Register
+.equ	INT0	= 0	; External Interrupt Request 0 Enable
+.equ	INT1	= 1	; External Interrupt Request 1 Enable
+.equ	INT2	= 2	; External Interrupt Request 2 Enable
+
+; EIFR - External Interrupt Flag Register
+.equ	INTF0	= 0	; External Interrupt Flag 0
+.equ	INTF1	= 1	; External Interrupt Flag 1
+.equ	INTF2	= 2	; External Interrupt Flag 2
+
+; PCICR - Pin Change Interrupt Control Register
+.equ	PCIE0	= 0	; Pin Change Interrupt Enable 0
+.equ	PCIE1	= 1	; Pin Change Interrupt Enable 1
+.equ	PCIE2	= 2	; Pin Change Interrupt Enable 2
+.equ	PCIE3	= 3	; Pin Change Interrupt Enable 3
+
+; PCIFR - Pin Change Interrupt Flag Register
+.equ	PCIF0	= 0	; Pin Change Interrupt Flag 0
+.equ	PCIF1	= 1	; Pin Change Interrupt Flag 1
+.equ	PCIF2	= 2	; Pin Change Interrupt Flag 2
+.equ	PCIF3	= 3	; Pin Change Interrupt Flag 3
+
+; PCMSK3 - Pin Change Mask Register 3
+.equ	PCINT24	= 0	; Pin Change Enable Mask 24
+.equ	PCINT25	= 1	; Pin Change Enable Mask 25
+.equ	PCINT26	= 2	; Pin Change Enable Mask 26
+.equ	PCINT27	= 3	; Pin Change Enable Mask 27
+.equ	PCINT28	= 4	; Pin Change Enable Mask 28
+.equ	PCINT29	= 5	; Pin Change Enable Mask 29
+.equ	PCINT30	= 6	; Pin Change Enable Mask 30
+.equ	PCINT31	= 7	; Pin Change Enable Mask 31
+
+; PCMSK2 - Pin Change Mask Register 2
+.equ	PCINT16	= 0	; Pin Change Enable Mask 16
+.equ	PCINT17	= 1	; Pin Change Enable Mask 17
+.equ	PCINT18	= 2	; Pin Change Enable Mask 18
+.equ	PCINT19	= 3	; Pin Change Enable Mask 19
+.equ	PCINT20	= 4	; Pin Change Enable Mask 20
+.equ	PCINT21	= 5	; Pin Change Enable Mask 21
+.equ	PCINT22	= 6	; Pin Change Enable Mask 22
+.equ	PCINT23	= 7	; Pin Change Enable Mask 23
+
+; PCMSK1 - Pin Change Mask Register 1
+.equ	PCINT8	= 0	; Pin Change Enable Mask 8
+.equ	PCINT9	= 1	; Pin Change Enable Mask 9
+.equ	PCINT10	= 2	; Pin Change Enable Mask 10
+.equ	PCINT11	= 3	; Pin Change Enable Mask 11
+.equ	PCINT12	= 4	; Pin Change Enable Mask 12
+.equ	PCINT13	= 5	; Pin Change Enable Mask 13
+.equ	PCINT14	= 6	; Pin Change Enable Mask 14
+.equ	PCINT15	= 7	; Pin Change Enable Mask 15
+
+; PCMSK0 - Pin Change Mask Register 0
+.equ	PCINT0	= 0	; Pin Change Enable Mask 0
+.equ	PCINT1	= 1	; Pin Change Enable Mask 1
+.equ	PCINT2	= 2	; Pin Change Enable Mask 2
+.equ	PCINT3	= 3	; Pin Change Enable Mask 3
+.equ	PCINT4	= 4	; Pin Change Enable Mask 4
+.equ	PCINT5	= 5	; Pin Change Enable Mask 5
+.equ	PCINT6	= 6	; Pin Change Enable Mask 6
+.equ	PCINT7	= 7	; Pin Change Enable Mask 7
+
+
+; ***** AD_CONVERTER *****************
+; ADMUX - The ADC multiplexer Selection Register
+.equ	MUX0	= 0	; Analog Channel and Gain Selection Bits
+.equ	MUX1	= 1	; Analog Channel and Gain Selection Bits
+.equ	MUX2	= 2	; Analog Channel and Gain Selection Bits
+.equ	MUX3	= 3	; Analog Channel and Gain Selection Bits
+.equ	MUX4	= 4	; Analog Channel and Gain Selection Bits
+.equ	ADLAR	= 5	; Left Adjust Result
+.equ	REFS0	= 6	; Reference Selection Bit 0
+.equ	REFS1	= 7	; Reference Selection Bit 1
+
+; ADCSRA - The ADC Control and Status register A
+.equ	ADPS0	= 0	; ADC  Prescaler Select Bits
+.equ	ADPS1	= 1	; ADC  Prescaler Select Bits
+.equ	ADPS2	= 2	; ADC  Prescaler Select Bits
+.equ	ADIE	= 3	; ADC Interrupt Enable
+.equ	ADIF	= 4	; ADC Interrupt Flag
+.equ	ADATE	= 5	; ADC  Auto Trigger Enable
+.equ	ADSC	= 6	; ADC Start Conversion
+.equ	ADEN	= 7	; ADC Enable
+
+; ADCSRB - The ADC Control and Status register B
+.equ	ADTS0	= 0	; ADC Auto Trigger Source bit 0
+.equ	ADTS1	= 1	; ADC Auto Trigger Source bit 1
+.equ	ADTS2	= 2	; ADC Auto Trigger Source bit 2
+;.equ	ACME	= 6	; 
+
+; ADCH - ADC Data Register High Byte
+.equ	ADCH0	= 0	; ADC Data Register High Byte Bit 0
+.equ	ADCH1	= 1	; ADC Data Register High Byte Bit 1
+.equ	ADCH2	= 2	; ADC Data Register High Byte Bit 2
+.equ	ADCH3	= 3	; ADC Data Register High Byte Bit 3
+.equ	ADCH4	= 4	; ADC Data Register High Byte Bit 4
+.equ	ADCH5	= 5	; ADC Data Register High Byte Bit 5
+.equ	ADCH6	= 6	; ADC Data Register High Byte Bit 6
+.equ	ADCH7	= 7	; ADC Data Register High Byte Bit 7
+
+; ADCL - ADC Data Register Low Byte
+.equ	ADCL0	= 0	; ADC Data Register Low Byte Bit 0
+.equ	ADCL1	= 1	; ADC Data Register Low Byte Bit 1
+.equ	ADCL2	= 2	; ADC Data Register Low Byte Bit 2
+.equ	ADCL3	= 3	; ADC Data Register Low Byte Bit 3
+.equ	ADCL4	= 4	; ADC Data Register Low Byte Bit 4
+.equ	ADCL5	= 5	; ADC Data Register Low Byte Bit 5
+.equ	ADCL6	= 6	; ADC Data Register Low Byte Bit 6
+.equ	ADCL7	= 7	; ADC Data Register Low Byte Bit 7
+
+; DIDR0 - Digital Input Disable Register
+.equ	ADC0D	= 0	; 
+.equ	ADC1D	= 1	; 
+.equ	ADC2D	= 2	; 
+.equ	ADC3D	= 3	; 
+.equ	ADC4D	= 4	; 
+.equ	ADC5D	= 5	; 
+.equ	ADC6D	= 6	; 
+.equ	ADC7D	= 7	; 
+
+
+; ***** JTAG *************************
+; OCDR - On-Chip Debug Related Register in I/O Memory
+.equ	OCDR0	= 0	; On-Chip Debug Register Bit 0
+.equ	OCDR1	= 1	; On-Chip Debug Register Bit 1
+.equ	OCDR2	= 2	; On-Chip Debug Register Bit 2
+.equ	OCDR3	= 3	; On-Chip Debug Register Bit 3
+.equ	OCDR4	= 4	; On-Chip Debug Register Bit 4
+.equ	OCDR5	= 5	; On-Chip Debug Register Bit 5
+.equ	OCDR6	= 6	; On-Chip Debug Register Bit 6
+.equ	OCDR7	= 7	; On-Chip Debug Register Bit 7
+.equ	IDRD	= OCDR7	; For compatibility
+
+; MCUCR - MCU Control Register
+.equ	JTD	= 7	; JTAG Interface Disable
+
+; MCUSR - MCU Status Register
+.equ	JTRF	= 4	; JTAG Reset Flag
+
+
+; ***** EEPROM ***********************
+; EEARH - EEPROM Address Register Low Byte
+.equ	EEAR8	= 0	; EEPROM Read/Write Access Bit 8
+.equ	EEAR9	= 1	; EEPROM Read/Write Access Bit 9
+.equ	EEAR10	= 2	; EEPROM Read/Write Access Bit 10
+.equ	EEAR11	= 3	; EEPROM Read/Write Access Bit 11
+
+; EEARL - EEPROM Address Register Low Byte
+.equ	EEAR0	= 0	; EEPROM Read/Write Access Bit 0
+.equ	EEAR1	= 1	; EEPROM Read/Write Access Bit 1
+.equ	EEAR2	= 2	; EEPROM Read/Write Access Bit 2
+.equ	EEAR3	= 3	; EEPROM Read/Write Access Bit 3
+.equ	EEAR4	= 4	; EEPROM Read/Write Access Bit 4
+.equ	EEAR5	= 5	; EEPROM Read/Write Access Bit 5
+.equ	EEAR6	= 6	; EEPROM Read/Write Access Bit 6
+.equ	EEAR7	= 7	; EEPROM Read/Write Access Bit 7
+
+; EEDR - EEPROM Data Register
+.equ	EEDR0	= 0	; EEPROM Data Register bit 0
+.equ	EEDR1	= 1	; EEPROM Data Register bit 1
+.equ	EEDR2	= 2	; EEPROM Data Register bit 2
+.equ	EEDR3	= 3	; EEPROM Data Register bit 3
+.equ	EEDR4	= 4	; EEPROM Data Register bit 4
+.equ	EEDR5	= 5	; EEPROM Data Register bit 5
+.equ	EEDR6	= 6	; EEPROM Data Register bit 6
+.equ	EEDR7	= 7	; EEPROM Data Register bit 7
+
+; EECR - EEPROM Control Register
+.equ	EERE	= 0	; EEPROM Read Enable
+.equ	EEPE	= 1	; EEPROM Write Enable
+.equ	EEMPE	= 2	; EEPROM Master Write Enable
+.equ	EERIE	= 3	; EEPROM Ready Interrupt Enable
+.equ	EEPM0	= 4	; EEPROM Programming Mode Bit 0
+.equ	EEPM1	= 5	; EEPROM Programming Mode Bit 1
+
+
+; ***** TWI **************************
+; TWAMR - TWI (Slave) Address Mask Register
+.equ	TWAM0	= 1	; 
+.equ	TWAMR0	= TWAM0	; For compatibility
+.equ	TWAM1	= 2	; 
+.equ	TWAMR1	= TWAM1	; For compatibility
+.equ	TWAM2	= 3	; 
+.equ	TWAMR2	= TWAM2	; For compatibility
+.equ	TWAM3	= 4	; 
+.equ	TWAMR3	= TWAM3	; For compatibility
+.equ	TWAM4	= 5	; 
+.equ	TWAMR4	= TWAM4	; For compatibility
+.equ	TWAM5	= 6	; 
+.equ	TWAMR5	= TWAM5	; For compatibility
+.equ	TWAM6	= 7	; 
+.equ	TWAMR6	= TWAM6	; For compatibility
+
+; TWBR - TWI Bit Rate register
+.equ	TWBR0	= 0	; 
+.equ	TWBR1	= 1	; 
+.equ	TWBR2	= 2	; 
+.equ	TWBR3	= 3	; 
+.equ	TWBR4	= 4	; 
+.equ	TWBR5	= 5	; 
+.equ	TWBR6	= 6	; 
+.equ	TWBR7	= 7	; 
+
+; TWCR - TWI Control Register
+.equ	TWIE	= 0	; TWI Interrupt Enable
+.equ	TWEN	= 2	; TWI Enable Bit
+.equ	TWWC	= 3	; TWI Write Collition Flag
+.equ	TWSTO	= 4	; TWI Stop Condition Bit
+.equ	TWSTA	= 5	; TWI Start Condition Bit
+.equ	TWEA	= 6	; TWI Enable Acknowledge Bit
+.equ	TWINT	= 7	; TWI Interrupt Flag
+
+; TWSR - TWI Status Register
+.equ	TWPS0	= 0	; TWI Prescaler
+.equ	TWPS1	= 1	; TWI Prescaler
+.equ	TWS3	= 3	; TWI Status
+.equ	TWS4	= 4	; TWI Status
+.equ	TWS5	= 5	; TWI Status
+.equ	TWS6	= 6	; TWI Status
+.equ	TWS7	= 7	; TWI Status
+
+; TWDR - TWI Data register
+.equ	TWD0	= 0	; TWI Data Register Bit 0
+.equ	TWD1	= 1	; TWI Data Register Bit 1
+.equ	TWD2	= 2	; TWI Data Register Bit 2
+.equ	TWD3	= 3	; TWI Data Register Bit 3
+.equ	TWD4	= 4	; TWI Data Register Bit 4
+.equ	TWD5	= 5	; TWI Data Register Bit 5
+.equ	TWD6	= 6	; TWI Data Register Bit 6
+.equ	TWD7	= 7	; TWI Data Register Bit 7
+
+; TWAR - TWI (Slave) Address register
+.equ	TWGCE	= 0	; TWI General Call Recognition Enable Bit
+.equ	TWA0	= 1	; TWI (Slave) Address register Bit 0
+.equ	TWA1	= 2	; TWI (Slave) Address register Bit 1
+.equ	TWA2	= 3	; TWI (Slave) Address register Bit 2
+.equ	TWA3	= 4	; TWI (Slave) Address register Bit 3
+.equ	TWA4	= 5	; TWI (Slave) Address register Bit 4
+.equ	TWA5	= 6	; TWI (Slave) Address register Bit 5
+.equ	TWA6	= 7	; TWI (Slave) Address register Bit 6
+
+
+; ***** USART1 ***********************
+; UDR1 - USART I/O Data Register
+.equ	UDR1_0	= 0	; USART I/O Data Register bit 0
+.equ	UDR1_1	= 1	; USART I/O Data Register bit 1
+.equ	UDR1_2	= 2	; USART I/O Data Register bit 2
+.equ	UDR1_3	= 3	; USART I/O Data Register bit 3
+.equ	UDR1_4	= 4	; USART I/O Data Register bit 4
+.equ	UDR1_5	= 5	; USART I/O Data Register bit 5
+.equ	UDR1_6	= 6	; USART I/O Data Register bit 6
+.equ	UDR1_7	= 7	; USART I/O Data Register bit 7
+
+; UCSR1A - USART Control and Status Register A
+.equ	MPCM1	= 0	; Multi-processor Communication Mode
+.equ	U2X1	= 1	; Double the USART transmission speed
+.equ	UPE1	= 2	; Parity Error
+.equ	DOR1	= 3	; Data overRun
+.equ	FE1	= 4	; Framing Error
+.equ	UDRE1	= 5	; USART Data Register Empty
+.equ	TXC1	= 6	; USART Transmitt Complete
+.equ	RXC1	= 7	; USART Receive Complete
+
+; UCSR1B - USART Control and Status Register B
+.equ	TXB81	= 0	; Transmit Data Bit 8
+.equ	RXB81	= 1	; Receive Data Bit 8
+.equ	UCSZ12	= 2	; Character Size
+.equ	TXEN1	= 3	; Transmitter Enable
+.equ	RXEN1	= 4	; Receiver Enable
+.equ	UDRIE1	= 5	; USART Data register Empty Interrupt Enable
+.equ	TXCIE1	= 6	; TX Complete Interrupt Enable
+.equ	RXCIE1	= 7	; RX Complete Interrupt Enable
+
+; UCSR1C - USART Control and Status Register C
+.equ	UCPOL1	= 0	; Clock Polarity
+.equ	UCSZ10	= 1	; Character Size
+.equ	UCPHA1	= UCSZ10	; For compatibility
+.equ	UCSZ11	= 2	; Character Size
+.equ	UDORD1	= UCSZ11	; For compatibility
+.equ	USBS1	= 3	; Stop Bit Select
+.equ	UPM10	= 4	; Parity Mode Bit 0
+.equ	UPM11	= 5	; Parity Mode Bit 1
+.equ	UMSEL10	= 6	; USART Mode Select
+.equ	UMSEL11	= 7	; USART Mode Select
+
+; UBRR1H - USART Baud Rate Register High Byte
+.equ	UBRR_8	= 0	; USART Baud Rate Register bit 8
+.equ	UBRR_9	= 1	; USART Baud Rate Register bit 9
+.equ	UBRR_10	= 2	; USART Baud Rate Register bit 10
+.equ	UBRR_11	= 3	; USART Baud Rate Register bit 11
+
+; UBRR1L - USART Baud Rate Register Low Byte
+.equ	UBRR_0	= 0	; USART Baud Rate Register bit 0
+.equ	UBRR_1	= 1	; USART Baud Rate Register bit 1
+.equ	UBRR_2	= 2	; USART Baud Rate Register bit 2
+.equ	UBRR_3	= 3	; USART Baud Rate Register bit 3
+.equ	UBRR_4	= 4	; USART Baud Rate Register bit 4
+.equ	UBRR_5	= 5	; USART Baud Rate Register bit 5
+.equ	UBRR_6	= 6	; USART Baud Rate Register bit 6
+.equ	UBRR_7	= 7	; USART Baud Rate Register bit 7
+
+
+; ***** SPI **************************
+; SPDR - SPI Data Register
+.equ	SPDR0	= 0	; SPI Data Register bit 0
+.equ	SPDR1	= 1	; SPI Data Register bit 1
+.equ	SPDR2	= 2	; SPI Data Register bit 2
+.equ	SPDR3	= 3	; SPI Data Register bit 3
+.equ	SPDR4	= 4	; SPI Data Register bit 4
+.equ	SPDR5	= 5	; SPI Data Register bit 5
+.equ	SPDR6	= 6	; SPI Data Register bit 6
+.equ	SPDR7	= 7	; SPI Data Register bit 7
+
+; SPSR - SPI Status Register
+.equ	SPI2X	= 0	; Double SPI Speed Bit
+.equ	WCOL	= 6	; Write Collision Flag
+.equ	SPIF	= 7	; SPI Interrupt Flag
+
+; SPCR - SPI Control Register
+.equ	SPR0	= 0	; SPI Clock Rate Select 0
+.equ	SPR1	= 1	; SPI Clock Rate Select 1
+.equ	CPHA	= 2	; Clock Phase
+.equ	CPOL	= 3	; Clock polarity
+.equ	MSTR	= 4	; Master/Slave Select
+.equ	DORD	= 5	; Data Order
+.equ	SPE	= 6	; SPI Enable
+.equ	SPIE	= 7	; SPI Interrupt Enable
+
+
+; ***** WATCHDOG *********************
+; WDTCSR - Watchdog Timer Control Register
+.equ	WDP0	= 0	; Watch Dog Timer Prescaler bit 0
+.equ	WDP1	= 1	; Watch Dog Timer Prescaler bit 1
+.equ	WDP2	= 2	; Watch Dog Timer Prescaler bit 2
+.equ	WDE	= 3	; Watch Dog Enable
+.equ	WDCE	= 4	; Watchdog Change Enable
+.equ	WDP3	= 5	; Watchdog Timer Prescaler Bit 3
+.equ	WDIE	= 6	; Watchdog Timeout Interrupt Enable
+.equ	WDIF	= 7	; Watchdog Timeout Interrupt Flag
+
+
+; ***** CPU **************************
+; SREG - Status Register
+.equ	SREG_C	= 0	; Carry Flag
+.equ	SREG_Z	= 1	; Zero Flag
+.equ	SREG_N	= 2	; Negative Flag
+.equ	SREG_V	= 3	; Two's Complement Overflow Flag
+.equ	SREG_S	= 4	; Sign Bit
+.equ	SREG_H	= 5	; Half Carry Flag
+.equ	SREG_T	= 6	; Bit Copy Storage
+.equ	SREG_I	= 7	; Global Interrupt Enable
+
+; MCUCR - MCU Control Register
+.equ	IVCE	= 0	; Interrupt Vector Change Enable
+.equ	IVSEL	= 1	; Interrupt Vector Select
+.equ	PUD	= 4	; Pull-up disable
+.equ	BODSE	= 5	; BOD Power Down in Sleep Enable
+.equ	BODS	= 6	; BOD Power Down in Sleep
+;.equ	JTD	= 7	; JTAG Interface Disable
+
+; MCUSR - MCU Status Register
+.equ	PORF	= 0	; Power-on reset flag
+.equ	EXTRF	= 1	; External Reset Flag
+.equ	BORF	= 2	; Brown-out Reset Flag
+.equ	WDRF	= 3	; Watchdog Reset Flag
+;.equ	JTRF	= 4	; JTAG Reset Flag
+
+; OSCCAL - Oscillator Calibration Value
+.equ	CAL0	= 0	; Oscillator Calibration Value Bit0
+.equ	CAL1	= 1	; Oscillator Calibration Value Bit1
+.equ	CAL2	= 2	; Oscillator Calibration Value Bit2
+.equ	CAL3	= 3	; Oscillator Calibration Value Bit3
+.equ	CAL4	= 4	; Oscillator Calibration Value Bit4
+.equ	CAL5	= 5	; Oscillator Calibration Value Bit5
+.equ	CAL6	= 6	; Oscillator Calibration Value Bit6
+.equ	CAL7	= 7	; Oscillator Calibration Value Bit7
+
+; CLKPR - 
+.equ	CLKPS0	= 0	; 
+.equ	CLKPS1	= 1	; 
+.equ	CLKPS2	= 2	; 
+.equ	CLKPS3	= 3	; 
+.equ	CLKPCE	= 7	; 
+
+; SMCR - Sleep Mode Control Register
+.equ	SE	= 0	; Sleep Enable
+.equ	SM0	= 1	; Sleep Mode Select bit 0
+.equ	SM1	= 2	; Sleep Mode Select bit 1
+.equ	SM2	= 3	; Sleep Mode Select bit 2
+
+; RAMPZ - RAM Page Z Select Register
+.equ	RAMPZ0	= 0	; RAM Page Z Select Register Bit 0
+
+; GPIOR2 - General Purpose IO Register 2
+.equ	GPIOR20	= 0	; General Purpose IO Register 2 bit 0
+.equ	GPIOR21	= 1	; General Purpose IO Register 2 bit 1
+.equ	GPIOR22	= 2	; General Purpose IO Register 2 bit 2
+.equ	GPIOR23	= 3	; General Purpose IO Register 2 bit 3
+.equ	GPIOR24	= 4	; General Purpose IO Register 2 bit 4
+.equ	GPIOR25	= 5	; General Purpose IO Register 2 bit 5
+.equ	GPIOR26	= 6	; General Purpose IO Register 2 bit 6
+.equ	GPIOR27	= 7	; General Purpose IO Register 2 bit 7
+
+; GPIOR1 - General Purpose IO Register 1
+.equ	GPIOR10	= 0	; General Purpose IO Register 1 bit 0
+.equ	GPIOR11	= 1	; General Purpose IO Register 1 bit 1
+.equ	GPIOR12	= 2	; General Purpose IO Register 1 bit 2
+.equ	GPIOR13	= 3	; General Purpose IO Register 1 bit 3
+.equ	GPIOR14	= 4	; General Purpose IO Register 1 bit 4
+.equ	GPIOR15	= 5	; General Purpose IO Register 1 bit 5
+.equ	GPIOR16	= 6	; General Purpose IO Register 1 bit 6
+.equ	GPIOR17	= 7	; General Purpose IO Register 1 bit 7
+
+; GPIOR0 - General Purpose IO Register 0
+.equ	GPIOR00	= 0	; General Purpose IO Register 0 bit 0
+.equ	GPIOR01	= 1	; General Purpose IO Register 0 bit 1
+.equ	GPIOR02	= 2	; General Purpose IO Register 0 bit 2
+.equ	GPIOR03	= 3	; General Purpose IO Register 0 bit 3
+.equ	GPIOR04	= 4	; General Purpose IO Register 0 bit 4
+.equ	GPIOR05	= 5	; General Purpose IO Register 0 bit 5
+.equ	GPIOR06	= 6	; General Purpose IO Register 0 bit 6
+.equ	GPIOR07	= 7	; General Purpose IO Register 0 bit 7
+
+; PRR0 - Power Reduction Register0
+.equ	PRADC	= 0	; Power Reduction ADC
+.equ	PRUSART0	= 1	; Power Reduction USART 0
+.equ	PRSPI	= 2	; Power Reduction Serial Peripheral Interface
+.equ	PRTIM1	= 3	; Power Reduction Timer/Counter1
+.equ	PRUSART1	= 4	; Power Reduction USART 1
+.equ	PRTIM0	= 5	; Power Reduction Timer/Counter0
+.equ	PRTIM2	= 6	; Power Reduction Timer/Counter2
+.equ	PRTWI	= 7	; Power Reduction TWI
+
+; PRR1 - Power Reduction Register1
+.equ	PRTIM3	= 0	; Power Reduction Timer/Counter3
+
+
+
+; ***** LOCKSBITS ********************************************************
+.equ	LB1	= 0	; Lock bit
+.equ	LB2	= 1	; Lock bit
+.equ	BLB01	= 2	; Boot Lock bit
+.equ	BLB02	= 3	; Boot Lock bit
+.equ	BLB11	= 4	; Boot lock bit
+.equ	BLB12	= 5	; Boot lock bit
+
+
+; ***** FUSES ************************************************************
+; LOW fuse bits
+.equ	CKSEL0	= 0	; Select Clock Source
+.equ	CKSEL1	= 1	; Select Clock Source
+.equ	CKSEL2	= 2	; Select Clock Source
+.equ	CKSEL3	= 3	; Select Clock Source
+.equ	SUT0	= 4	; Select start-up time
+.equ	SUT1	= 5	; Select start-up time
+.equ	CKOUT	= 6	; Clock output
+.equ	CKDIV8	= 7	; Divide clock by 8
+
+; HIGH fuse bits
+.equ	BOOTRST	= 0	; Select Reset Vector
+.equ	BOOTSZ0	= 1	; Select Boot Size
+.equ	BOOTSZ1	= 2	; Select Boot Size
+.equ	EESAVE	= 3	; EEPROM memory is preserved through chip erase
+.equ	WDTON	= 4	; Watchdog timer always on
+.equ	SPIEN	= 5	; Enable Serial programming and Data Downloading
+.equ	JTAGEN	= 6	; Enable JTAG
+.equ	OCDEN	= 7	; Enable OCD
+
+; EXTENDED fuse bits
+.equ	BODLEVEL0	= 0	; Brown-out Detector trigger level
+.equ	BODLEVEL1	= 1	; Brown-out Detector trigger level
+.equ	BODLEVEL2	= 2	; Brown-out Detector trigger level
+
+
+
+; ***** CPU REGISTER DEFINITIONS *****************************************
+.def	XH	= r27
+.def	XL	= r26
+.def	YH	= r29
+.def	YL	= r28
+.def	ZH	= r31
+.def	ZL	= r30
+
+
+
+; ***** DATA MEMORY DECLARATIONS *****************************************
+.equ	FLASHEND	= 0xffff	; Note: Word address
+.equ	IOEND	= 0x00ff
+.equ	SRAM_START	= 0x0100
+.equ	SRAM_SIZE	= 16384
+.equ	RAMEND	= 0x40ff
+.equ	XRAMEND	= 0x0000
+.equ	E2END	= 0x0fff
+.equ	EEPROMEND	= 0x0fff
+.equ	EEADRBITS	= 12
+#pragma AVRPART MEMORY PROG_FLASH 131072
+#pragma AVRPART MEMORY EEPROM 4096
+#pragma AVRPART MEMORY INT_SRAM SIZE 16384
+#pragma AVRPART MEMORY INT_SRAM START_ADDR 0x100
+
+
+
+; ***** BOOTLOADER DECLARATIONS ******************************************
+.equ	NRWW_START_ADDR	= 0xf000
+.equ	NRWW_STOP_ADDR	= 0xffff
+.equ	RWW_START_ADDR	= 0x0
+.equ	RWW_STOP_ADDR	= 0xefff
+.equ	PAGESIZE	= 128
+.equ	FIRSTBOOTSTART	= 0xfe00
+.equ	SECONDBOOTSTART	= 0xfc00
+.equ	THIRDBOOTSTART	= 0xf800
+.equ	FOURTHBOOTSTART	= 0xf000
+.equ	SMALLBOOTSTART	= FIRSTBOOTSTART
+.equ	LARGEBOOTSTART	= FOURTHBOOTSTART
+
+
+
+; ***** INTERRUPT VECTORS ************************************************
+.equ	INT0addr	= 0x0002	; External Interrupt Request 0
+.equ	INT1addr	= 0x0004	; External Interrupt Request 1
+.equ	INT2addr	= 0x0006	; External Interrupt Request 2
+.equ	PCI0addr	= 0x0008	; Pin Change Interrupt Request 0
+.equ	PCI1addr	= 0x000a	; Pin Change Interrupt Request 1
+.equ	PCI2addr	= 0x000c	; Pin Change Interrupt Request 2
+.equ	PCI3addr	= 0x000e	; Pin Change Interrupt Request 3
+.equ	WDTaddr	= 0x0010	; Watchdog Time-out Interrupt
+.equ	OC2Aaddr	= 0x0012	; Timer/Counter2 Compare Match A
+.equ	OC2Baddr	= 0x0014	; Timer/Counter2 Compare Match B
+.equ	OVF2addr	= 0x0016	; Timer/Counter2 Overflow
+.equ	ICP1addr	= 0x0018	; Timer/Counter1 Capture Event
+.equ	OC1Aaddr	= 0x001a	; Timer/Counter1 Compare Match A
+.equ	OC1Baddr	= 0x001c	; Timer/Counter1 Compare Match B
+.equ	OVF1addr	= 0x001e	; Timer/Counter1 Overflow
+.equ	OC0Aaddr	= 0x0020	; Timer/Counter0 Compare Match A
+.equ	OC0Baddr	= 0x0022	; Timer/Counter0 Compare Match B
+.equ	OVF0addr	= 0x0024	; Timer/Counter0 Overflow
+.equ	SPIaddr	= 0x0026	; SPI Serial Transfer Complete
+.equ	URXC0addr	= 0x0028	; USART0, Rx Complete
+.equ	UDRE0addr	= 0x002a	; USART0 Data register Empty
+.equ	UTXC0addr	= 0x002c	; USART0, Tx Complete
+.equ	ACIaddr	= 0x002e	; Analog Comparator
+.equ	ADCCaddr	= 0x0030	; ADC Conversion Complete
+.equ	ERDYaddr	= 0x0032	; EEPROM Ready
+.equ	TWIaddr	= 0x0034	; 2-wire Serial Interface
+.equ	SPMRaddr	= 0x0036	; Store Program Memory Read
+.equ	URXC1addr	= 0x0038	; USART1 RX complete
+.equ	UDRE1addr	= 0x003a	; USART1 Data Register Empty
+.equ	UTXC1addr	= 0x003c	; USART1 TX complete
+.equ	ICP3addr	= 0x003e	; Timer/Counter3 Capture Event
+.equ	OC3Aaddr	= 0x0040	; Timer/Counter3 Compare Match A
+.equ	OC3Baddr	= 0x0042	; Timer/Counter3 Compare Match B
+.equ	OVF3addr	= 0x0044	; Timer/Counter3 Overflow
+
+.equ	INT_VECTORS_SIZE	= 70	; size in words
+
+#endif  /* _M1284PDEF_INC_ */
+
+; ***** END OF FILE ******************************************************
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/opcjmp.inc b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/opcjmp.inc
new file mode 100644
index 00000000..d77bb422
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/opcjmp.inc
@@ -0,0 +1,267 @@
+
+
+.cseg
+.org	0x1D00
+
+;**********************
+; Opcode jump table
+;**********************
+
+opctbl:
+	jmp	_BRK_IMP		;00
+	jmp	_ORA_INDX		;01
+	jmp	_INV2			;02
+	jmp	_INV			;03
+	jmp	_TSB_ZPG		;04
+	jmp	_ORA_ZPG		;05
+	jmp	_ASL_ZPG		;06
+	jmp	_RMB0_ZPG		;07
+	jmp	_PHP_IMP		;08
+	jmp	_ORA_IMM		;09
+	jmp	_ASL_IMP		;0A
+	jmp	_INV			;0B
+	jmp	_TSB_ABS		;0C
+	jmp	_ORA_ABS		;0D
+	jmp	_ASL_ABS		;0E
+	jmp	_BBR0_REL		;0F
+	jmp	_BPL_REL		;10
+	jmp	_ORA_INDY		;11
+	jmp	_ORA_IND		;12
+	jmp	_INV			;13
+	jmp	_TRB_ZPG		;14
+	jmp	_ORA_ZPGX		;15
+	jmp	_ASL_ZPGX		;16
+	jmp	_RMB1_ZPG		;17
+	jmp	_CLC_IMP		;18
+	jmp	_ORA_ABSY		;19
+	jmp	_INC_IMP		;1A
+	jmp	_INV			;1B
+	jmp	_TRB_ABS		;1C
+	jmp	_ORA_ABSX		;1D
+	jmp	_ASL_ABSX		;1E
+	jmp	_BBR1_REL		;1F
+	jmp	_JSR_ABS		;20
+	jmp	_AND_INDX		;21
+	jmp	_INV2			;22
+	jmp	_INV			;23
+	jmp	_BIT_ZPG		;24
+	jmp	_AND_ZPG		;25
+	jmp	_ROL_ZPG		;26
+	jmp	_RMB2_ZPG		;27
+	jmp	_PLP_IMP		;28
+	jmp	_AND_IMM		;29
+	jmp	_ROL_IMP		;2A
+	jmp	_INV			;2B
+	jmp	_BIT_ABS		;2C
+	jmp	_AND_ABS		;2D
+	jmp	_ROL_ABS		;2E
+	jmp	_BBR2_REL		;2F
+	jmp	_BMI_REL		;30
+	jmp	_AND_INDY		;31
+	jmp	_AND_IND		;32
+	jmp	_INV			;33
+	jmp	_BIT_ZPGX		;34
+	jmp	_AND_ZPGX		;35
+	jmp	_ROL_ZPGX		;36
+	jmp	_RMB3_ZPG		;37
+	jmp	_SEC_IMP		;38
+	jmp	_AND_ABSY		;39
+	jmp	_DEC_IMP		;3A
+	jmp	_INV			;3B
+	jmp	_BIT_ABSX		;3C
+	jmp	_AND_ABSX		;3D
+	jmp	_ROL_ABSX		;3E
+	jmp	_BBR3_REL		;3F
+	jmp	_RTI_IMP		;40
+	jmp	_EOR_INDX		;41
+	jmp	_INV2			;42
+	jmp	_INV			;43
+	jmp	_INV2			;44
+	jmp	_EOR_ZPG		;45
+	jmp	_LSR_ZPG		;46
+	jmp	_RMB4_ZPG		;47
+	jmp	_PHA_IMP		;48
+	jmp	_EOR_IMM		;49
+	jmp	_LSR_IMP		;4A
+	jmp	_INV			;4B
+	jmp	_JMP_ABS		;4C
+	jmp	_EOR_ABS		;4D
+	jmp	_LSR_ABS		;4E
+	jmp	_BBR4_REL		;4F
+	jmp	_BVC_REL		;50
+	jmp	_EOR_INDY		;51
+	jmp	_EOR_IND		;52
+	jmp	_INV			;53
+	jmp	_INV2			;54
+	jmp	_EOR_ZPGX		;55
+	jmp	_LSR_ZPGX		;56
+	jmp	_RMB5_ZPG		;57
+	jmp	_CLI_IMP		;58
+	jmp	_EOR_ABSY		;59
+	jmp	_PHY_IMP		;5A
+	jmp	_INV			;5B
+	jmp	_INV3			;5C
+	jmp	_EOR_ABSX		;5D
+	jmp	_LSR_ABSX		;5E
+	jmp	_BBR5_REL		;5F
+	jmp	_RTS_IMP		;60
+	jmp	_ADC_INDX		;61
+	jmp	_INV2			;62
+	jmp	_INV			;63
+	jmp	_STZ_ZPG		;64
+	jmp	_ADC_ZPG		;65
+	jmp	_ROR_ZPG		;66
+	jmp	_RMB6_ZPG		;67
+	jmp	_PLA_IMP		;68
+	jmp	_ADC_IMM		;69
+	jmp	_ROR_IMP		;6A
+	jmp	_INV			;6B
+	jmp	_JMP_JIND		;6C
+	jmp	_ADC_ABS		;6D
+	jmp	_ROR_ABS		;6E
+	jmp	_BBR6_REL		;6F
+	jmp	_BVS_REL		;70
+	jmp	_ADC_INDY		;71
+	jmp	_ADC_IND		;72
+	jmp	_INV			;73
+	jmp	_STZ_ZPGX		;74
+	jmp	_ADC_ZPGX		;75
+	jmp	_ROR_ZPGX		;76
+	jmp	_RMB7_ZPG		;77
+	jmp	_SEI_IMP		;78
+	jmp	_ADC_ABSY		;79
+	jmp	_PLY_IMP		;7A
+	jmp	_INV			;7B
+	jmp	_JMP_JINDX		;7C
+	jmp	_ADC_ABSX		;7D
+	jmp	_ROR_ABSX		;7E
+	jmp	_BBR7_REL		;7F
+	jmp	_BRA_REL		;80
+	jmp	_STA_INDX		;81
+	jmp	_INV2			;82
+	jmp	_INV			;83
+	jmp	_STY_ZPG		;84
+	jmp	_STA_ZPG		;85
+	jmp	_STX_ZPG		;86
+	jmp	_SMB0_ZPG		;87
+	jmp	_DEY_IMP		;88
+	jmp	_BIT_IMM		;89
+	jmp	_TXA_IMP		;8A
+	jmp	_INV			;8B
+	jmp	_STY_ABS		;8C
+	jmp	_STA_ABS		;8D
+	jmp	_STX_ABS		;8E
+	jmp	_BBS0_REL		;8F
+	jmp	_BCC_REL		;90
+	jmp	_STA_INDY		;91
+	jmp	_STA_IND		;92
+	jmp	_INV			;93
+	jmp	_STY_ZPGX		;94
+	jmp	_STA_ZPGX		;95
+	jmp	_STX_ZPGY		;96
+	jmp	_SMB1_ZPG		;97
+	jmp	_TYA_IMP		;98
+	jmp	_STA_ABSY		;99
+	jmp	_TXS_IMP		;9A
+	jmp	_INV			;9B
+	jmp	_STZ_ABS		;9C
+	jmp	_STA_ABSX		;9D
+	jmp	_STZ_ABSX		;9E
+	jmp	_BBS1_REL		;9F
+	jmp	_LDY_IMM		;A0
+	jmp	_LDA_INDX		;A1
+	jmp	_LDX_IMM		;A2
+	jmp	_INV			;A3
+	jmp	_LDY_ZPG		;A4
+	jmp	_LDA_ZPG		;A5
+	jmp	_LDX_ZPG		;A6
+	jmp	_SMB2_ZPG		;A7
+	jmp	_TAY_IMP		;A8
+	jmp	_LDA_IMM		;A9
+	jmp	_TAX_IMP		;AA
+	jmp	_INV			;AB
+	jmp	_LDY_ABS		;AC
+	jmp	_LDA_ABS		;AD
+	jmp	_LDX_ABS		;AE
+	jmp	_BBS2_REL		;AF
+	jmp	_BCS_REL		;B0
+	jmp	_LDA_INDY		;B1
+	jmp	_LDA_IND		;B2
+	jmp	_INV			;B3
+	jmp	_LDY_ZPGX		;B4
+	jmp	_LDA_ZPGX		;B5
+	jmp	_LDX_ZPGY		;B6
+	jmp	_SMB3_ZPG		;B7
+	jmp	_CLV_IMP		;B8
+	jmp	_LDA_ABSY		;B9
+	jmp	_TSX_IMP		;BA
+	jmp	_INV			;BB
+	jmp	_LDY_ABSX		;BC
+	jmp	_LDA_ABSX		;BD
+	jmp	_LDX_ABSY		;BE
+	jmp	_BBS3_REL		;BF
+	jmp	_CPY_IMM		;C0
+	jmp	_CMP_INDX		;C1
+	jmp	_INV2			;C2
+	jmp	_INV			;C3
+	jmp	_CPY_ZPG		;C4
+	jmp	_CMP_ZPG		;C5
+	jmp	_DEC_ZPG		;C6
+	jmp	_SMB4_ZPG		;C7
+	jmp	_INY_IMP		;C8
+	jmp	_CMP_IMM		;C9
+	jmp	_DEX_IMP		;CA
+	jmp	_WAI_IMP		;CB
+	jmp	_CPY_ABS		;CC
+	jmp	_CMP_ABS		;CD
+	jmp	_DEC_ABS		;CE
+	jmp	_BBS4_REL		;CF
+	jmp	_BNE_REL		;D0
+	jmp	_CMP_INDY		;D1
+	jmp	_CMP_IND		;D2
+	jmp	_INV			;D3
+	jmp	_INV2			;D4
+	jmp	_CMP_ZPGX		;D5
+	jmp	_DEC_ZPGX		;D6
+	jmp	_SMB5_ZPG		;D7
+	jmp	_CLD_IMP		;D8
+	jmp	_CMP_ABSY		;D9
+	jmp	_PHX_IMP		;DA
+	jmp	_STP_IMP		;DB
+	jmp	_INV3			;DC
+	jmp	_CMP_ABSX		;DD
+	jmp	_DEC_ABSX		;DE
+	jmp	_BBS5_REL		;DF
+	jmp	_CPX_IMM		;E0
+	jmp	_SBC_INDX		;E1
+	jmp	_INV2			;E2
+	jmp	_INV			;E3
+	jmp	_CPX_ZPG		;E4
+	jmp	_SBC_ZPG		;E5
+	jmp	_INC_ZPG		;E6
+	jmp	_SMB6_ZPG		;E7
+	jmp	_INX_IMP		;E8
+	jmp	_SBC_IMM		;E9
+	jmp	_NOP_IMP		;EA
+	jmp	_INV			;EB
+	jmp	_CPX_ABS		;EC
+	jmp	_SBC_ABS		;ED
+	jmp	_INC_ABS		;EE
+	jmp	_BBS6_REL		;EF
+	jmp	_BEQ_REL		;F0
+	jmp	_SBC_INDY		;F1
+	jmp	_SBC_IND		;F2
+	jmp	_INV			;F3
+	jmp	_INV2			;F4
+	jmp	_SBC_ZPGX		;F5
+	jmp	_INC_ZPGX		;F6
+	jmp	_SMB7_ZPG		;F7
+	jmp	_SED_IMP		;F8
+	jmp	_SBC_ABSY		;F9
+	jmp	_PLX_IMP		;FA
+	jmp	_INV			;FB
+	jmp	_INV3			;FC
+	jmp	_SBC_ABSX		;FD
+	jmp	_INC_ABSX		;FE
+	jmp	_BBS7_REL		;FF
+
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/serial.asm b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/serial.asm
new file mode 100644
index 00000000..8bd4e1e8
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/serial.asm
@@ -0,0 +1,16 @@
+	; set baud rate
+	ldi		i, 0x0C				; 
+								; 			16MHZ	20MHZ	24MHz
+	ldi		j, 0x00				; 115200	xxxx	000A	000C
+	sts		UBRR0H, j			;  19200	0033	0040	004D
+	sts		UBRR0L, i			;  9600		0067	0081	009B
+								;  4800		00CF	0103	0137
+								;  2400		019F 	0208	0270
+
+	; Enable receiver and transmitter
+	ldi 	i, (1<<RXEN0)|(1<<TXEN0)
+	sts 	UCSR0B, i
+	
+	; Set frame format: 8data, 1stop bit
+	ldi 	i, (3<<UCSZ00)
+	sts 	UCSR0C, i
\ No newline at end of file
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/xmodem-receive.asm b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/xmodem-receive.asm
new file mode 100644
index 00000000..0fd6275a
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVRSource/xmodem-receive.asm
@@ -0,0 +1,410 @@
+; XMODEM/CRC Receiver for AVR
+;
+; A simple file transfer program to allow upload from a console device
+; to the SBC utilizing the x-modem/CRC transfer protocol.  Requires just
+; under 1k of either RAM or ROM, 132 bytes of RAM for the receive buffer,
+; and 8 bytes of zero page RAM for variable storage.
+;
+;**************************************************************************
+; This implementation of XMODEM/CRC does NOT conform strictly to the 
+; XMODEM protocol standard in that it (1) does not accurately time character
+; reception or (2) fall back to the Checksum mode.
+
+; (1) For timing, it uses a crude timing loop to provide approximate
+; delays.  Windows HyperTerminal worked quite well!
+;
+; (2) Most modern terminal programs support XMODEM/CRC which can detect a
+; wider range of transmission errors so the fallback to the simple checksum
+; calculation was not implemented to save space.
+;**************************************************************************
+;
+;-------------------------- The Code ----------------------------
+;
+; Register usage
+; (these are repurposed from the Main program and will generate
+; assembler warnings)
+;
+.def	crc		=	R22			;\ CRC lo byte  (two byte variable)
+.def	crch	=	R23			;/ CRC hi byte  
+.def	blkno	=	R24			; block number 
+.def	retry	=	R6			; retry counter 
+.def	retry2	=	R25			; 2nd counter
+.def	bflag	=	R7			; block flag 
+.def	zsav	=	R8			; Z save loc
+.def	zsavh	=	R9			; 
+.def	rzsav	=	R10			; RAMPZ save
+;
+;
+; non-zero page variables and buffers
+;
+;
+.equ	Rbuff	=	0x0200      ; temp 132 byte receive buffer 
+;
+; XMODEM Control Character Constants
+.equ	SOH		=	0x01			; start block
+.equ	EOT		=	0x04		; end of text marker
+.equ	ACK		=	0x06		; good block acknowledged
+.equ	NAK		=	0x15		; bad block acknowledged
+.equ	CAN		=	0x18		; cancel (not standard, not supported)
+.equ	CR		=	0x0d		; carriage return
+.equ	LF		=	0x0a		; line feed
+.equ	ESC		=	0x1b		; ESC to exit
+
+;
+;^^^^^^^^^^^^^^^^^^^^^^ Start of Program ^^^^^^^^^^^^^^^^^^^^^^
+;
+; Xmodem/CRC upload routine
+; By Daryl Rictor, Oct 30, 2012
+;
+; v 1.1 2nd release - 48K Rom size
+;
+XModem:		
+		clr		zsav
+		ldi		i, 0x40
+		mov		zsavh, i		; start of flash
+XModem1:
+		mov		rzsav, zero
+		out		rampz,	zero	; start on bank zero
+		ldi		xl, 0x00
+		ldi		xh, 0x10		; Temp RAM page buffer
+		ldi		yh, high(rbuff)
+		rcall	PrintMsg		; send prompt and info
+		ldi		blkno, 0x01		; set block # to 1
+		mov		bflag, blkno	; set flag to get address from block 1
+StartCrc:	
+		ldi		i, 'C'			; "C" start with CRC mode
+		rcall	Put_Chr			; send it
+		ldi		retry2, 0xff	; set loop counter for ~3 sec delay
+		clr		crc
+		clr		crch			; init CRC value	
+		rcall	GetByte			; wait for input
+       	brcs	GotByte			; byte received, process it
+		brcc	StartCrc		; resend "C"
+
+StartBlk:	
+		ldi		retry2, 0xff	; set loop counter for ~3 sec delay
+		clr		crc				;
+		clr		crch			; init CRC value	
+		rcall	GetByte			; get first byte of block
+		brcc	StartBlk		; timed out, keep waiting...
+GotByte:
+		cpi		i, ESC			; quitting?
+		brne	GotByte1		; no
+		jmp		Reset			; YES - do BRK or change to RTS if desired
+GotByte1:
+		cpi		i, SOH			; start of block?
+		breq	BegBlk			; yes
+		cpi		i, EOT			;
+		brne	BadCrc			; Not SOH or EOT, so flush buffer & send NAK	
+		rjmp	Done			; EOT - all done!
+BegBlk:		
+		clr		yl				; byte counter
+GetBlk:		
+		ldi		retry2, 0xff	; 3 sec window to receive characters
+GetBlk1:	
+		rcall	GetByte			; get next character
+		brcc	BadCrc			; chr rcv error, flush and send NAK
+GetBlk2:		
+		st		Y+, i			; (buff) good char, save it in the rcv buffer
+		cpi		yl, 0x84		; <01> <FE> <128 bytes> <CRCH> <CRCL>
+		brne	GetBlk			; get 132 characters
+		clr		yl				;
+		ld		i, Y+			; (buff) get block # from buffer
+		cp		i, blkno		; compare to expected block #	
+		breq	GoodBlk1		; matched!
+		rcall	Print_Err		; Unexpected block number - abort	
+		rcall	Flush			; mismatched - flush buffer and then do BRK
+		jmp		Reset			; unexpected block # - fatal error - BRK or RTS
+GoodBlk1:	
+		ldi		j, 0xff
+		eor		i, j			; 1's comp of block #
+		ld		j, Y
+		cp		i, j			; compare with expected 1's comp of block #
+		breq	GoodBlk2 		; matched!
+write_err:	
+		rcall	Print_Err		; Unexpected block number - abort	
+		rcall 	Flush			; mismatched - flush buffer and then do BRK
+		jmp		Reset			; bad 1's comp of block#	
+GoodBlk2:	
+		ldi		yl, 0x02		; 
+CalcCrc:	
+		ld		i, Y+			; calculate the CRC for the 128 bytes of data	
+		rcall	UpdCrc			; could inline sub here for speed
+		cpi		yl, 0x82		; 128 bytes
+		brne	CalcCrc			;
+		ld		i, Y+			; get hi CRC from buffer
+		cp		i, crch			; compare to calculated hi CRC
+		brne	BadCrc			; bad crc, send NAK
+		ld		i, Y			; get lo CRC from buffer
+		cp		i, crc			; compare to calculated lo CRC
+		breq	GoodCrc			; good CRC
+BadCrc:		
+		rcall	Flush			; flush the input port
+		ldi		i, NAK			;
+		rcall	Put_Chr			; send NAK to resend block
+		rjmp	StartBlk		; start over, get the block again			
+GoodCrc:
+		ldi		yl, 0x02		;
+Write1:	
+		ld		i, Y+			; move buffer to RAM Holding Area
+		st		X+, i
+		cpi		yl, 0x82	;		
+		brne	Write1
+		tst		xl
+		brne	IncBlk			; if not zero, get next block
+; write 256 bytes to Flash
+		movw	zl, zsav		; restore flash address
+		out		rampz, rzsav	; and bank address
+		ldi		xl, 0x00
+		ldi		xh, 0x10		; start of buffer
+		cpi		blkno, 0x02		; first page write, don't test zh
+		breq	write11
+		cpi		zh, 0x00		; exceeded flash space?
+		brne	write11
+		mov		rzsav, one
+		out		rampz, rzsav
+Write11:	
+		in		j, sreg			; save sreg
+		cli						; disable irq's
+fploop:		
+		ld		r0, X+
+		ld		r1, X+
+stbf1:		
+		in		i, spmcsr		; get status
+		andi	i, 0x01			; mask spmen
+		brne	stbf1			; wait for spm to complete
+		out		spmcsr, one		; enable SPM only - write to int buffer
+		spm
+		adiw	zl, 0x02		; inc Z pointer (word pointer)
+		tst		zl
+		brne	fploop			; store all 256 bytes 128 words
+		dec		zh				; back to current page
+erase1:		
+		in		i, spmcsr		; get status
+		andi	i, 0x01			; mask spmen
+		brne	erase1			; wait for spm to complete
+		ldi		i, 0x03			; SPM En + PGERS (erase page)
+		out		spmcsr, i
+		spm
+write2:		
+		in		i, spmcsr		; get status
+		andi	i, 0x01			; mask spmen
+		brne	write2			; wait for spm to complete
+		ldi		i, 0x05			; SPM En + PGWRT (write page)
+		out		spmcsr, i	
+		spm
+		inc		zh				; go to next page
+write3:		
+		in		i, spmcsr		; get status
+		andi	i, 0x01			; mask spmen
+		brne	write3			; wait for spm to complete
+		ldi		i, 0x11			; SPM En + RWWSRE (Enable RWW reads)
+		out		spmcsr, i
+		spm
+		movw	zsav, zl		; save page address
+		in		rzsav, rampz	; save bank address
+		ldi		xl, 0x00
+		ldi		xh, 0x10		; start of buffer
+		out		sreg, j			; restore sreg & int state
+IncBlk:		
+		inc		blkno			; done.  Inc the block #
+		ldi		i, ACK			; send ACK
+		call	Put_Chr			;
+		rjmp	StartBlk		; get next block
+Done:		
+		ldi		i, ACK			; last block, send ACK and exit.
+		rcall	Put_Chr			;
+		rcall	Flush			; get leftover characters, if any
+		rcall	Print_Good		;
+		out		rampz, zero		; reset rampz to zero
+		ret						;
+;
+;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+;
+; subroutines
+;
+;								;
+GetByte:						; wait for chr input and cycle timing loop
+		clr		retry			; set low value of timing loop
+StartCrcLp:	
+		rcall	Get_chr			; get chr from serial port, don't wait 
+		brcs	GetByte1		; got one, so exit
+
+		ldi		j, 0x24			; delay loop
+getb2234:	
+		lpm		i,	Z
+		dec		j
+		brne	getb2234		; delay
+
+		dec		retry			; no character received, so dec counter
+		brne	StartCrcLp		;
+		dec		retry2			; dec hi byte of counter
+		brne	StartCrcLp		; look for character again
+		clc						; if loop times out, CLC, else SEC and return
+GetByte1:	
+		ret						; with character in "A"
+;
+Flush:							; flush receive buffer
+		ldi		retry2, 0x70	; flush until empty for ~1 sec.
+Flush1:	
+		rcall	GetByte			; read the port
+		brcs	Flush			; if chr recvd, wait for another
+		ret						; else done
+;
+PrintMsg:
+		in		rzsav, rampz
+		out		rampz, one
+		ldi		zh, high(Msg*2)	; PRINT starting message
+		ldi		zl, low(Msg*2)	;
+PrtMsg1:
+		elpm   	i, Z+		
+		tst		i
+		breq	PrtMsg2			
+		rcall	Put_Chr
+		rjmp	PrtMsg1
+PrtMsg2:
+		out		rampz, rzsav
+		ret
+
+Msg:
+		.db		"Begin XMODEM/CRC transfer. Press <Esc> to abort..."
+		.db  	CR, LF, 0x00, 0x00
+;
+Print_Err:
+		in		rzsav, rampz
+		out		rampz, one
+		ldi		zh, high(ErrMsg*2) ; PRINT Error message
+		ldi		zl, low(ErrMsg*2)  ;
+PrtErr1:
+		elpm   	i, Z+
+		tst		i
+		breq	PrtErr2
+		rcall	Put_Chr
+		rjmp	PrtErr1 
+PrtErr2:
+		out		rampz, rzsav
+		ret
+
+ErrMsg:
+		.db 	"Upload Error! "
+		.db  	CR, LF, 0x00, 0x00
+;
+Print_Good:
+		in		rzsav, rampz
+		out		rampz, one
+		ldi		zh, high(GoodMsg*2) ; PRINT Good Transfer message
+		ldi		zl, low(GoodMsg*2)  ;
+Prtgood1:
+		elpm   	i, Z+
+		tst		i
+		breq	Prtgood2
+		rcall	Put_Chr
+		rjmp	Prtgood1
+Prtgood2:
+		out		rampz, rzsav
+		ret
+
+GoodMsg:
+		.db 	"Upload Successful!"
+		.db 	CR, LF, 0x00, 0x00
+;
+;
+;======================================================================
+;  I/O Device Specific Routines
+;
+;  Two routines are used to communicate with the I/O device.
+;
+; "Get_Chr" routine will scan the input port for a character.  It will
+; return without waiting with the Carry flag CLEAR if no character is
+; present or return with the Carry flag SET and the character in the "A"
+; register if one was present.
+;
+; "Put_Chr" routine will write one byte to the output port.  Its alright
+; if this routine waits for the port to be ready.  its assumed that the 
+; character was send upon return from this routine.
+;
+; input chr from USART (no waiting)
+;
+
+Get_Chr:
+		clc						; no chr present
+		lds		i, ucsr0a     	; get Serial port status
+		sbrs	i, RXC0    		; mask rcvr full bit
+		rjmp	Get_Chr2		; if not chr, done
+      	lds		i, udr0         ; else get chr
+	   	sec						; and set the Carry Flag
+Get_Chr2:
+		ret						; done
+;
+; output to OutPut Port
+;
+Put_Chr:
+	   	lds 	j, ucsr0a       ; 
+		sbrs	j, udre0
+       	rjmp	Put_chr         ; is tx buffer empty
+       	sts		udr0, i			; put character to Port
+       	ret                     ; done
+;=========================================================================
+;
+;
+;  CRC subroutines 
+;
+;
+UpdCrc:
+		eor 	i, crch				; Quick CRC computation with lookup tables
+		in		rzsav, rampz
+		out		rampz, one
+       	ldi		zl, low(CRCHI*2) 	; updates the two bytes at crc & crc+1
+		ldi		zh, high(CRCHI*2)	; with the byte send in the "A" register
+		add		zl, i				; with the byte send in the "A" register
+		adc		zh, zero
+		elpm	crch, Z
+       	eor 	crch, crc
+		dec		zh					; assumes crclo is 256 bytes lower in mem
+		elpm	crc, Z
+      	out		rampz, rzsav
+	   	ret
+
+; low byte CRC lookup table
+
+crclo:
+ .db 0x00,0x21,0x42,0x63,0x84,0xA5,0xC6,0xE7,0x08,0x29,0x4A,0x6B,0x8C,0xAD,0xCE,0xEF
+ .db 0x31,0x10,0x73,0x52,0xB5,0x94,0xF7,0xD6,0x39,0x18,0x7B,0x5A,0xBD,0x9C,0xFF,0xDE
+ .db 0x62,0x43,0x20,0x01,0xE6,0xC7,0xA4,0x85,0x6A,0x4B,0x28,0x09,0xEE,0xCF,0xAC,0x8D
+ .db 0x53,0x72,0x11,0x30,0xD7,0xF6,0x95,0xB4,0x5B,0x7A,0x19,0x38,0xDF,0xFE,0x9D,0xBC
+ .db 0xC4,0xE5,0x86,0xA7,0x40,0x61,0x02,0x23,0xCC,0xED,0x8E,0xAF,0x48,0x69,0x0A,0x2B
+ .db 0xF5,0xD4,0xB7,0x96,0x71,0x50,0x33,0x12,0xFD,0xDC,0xBF,0x9E,0x79,0x58,0x3B,0x1A
+ .db 0xA6,0x87,0xE4,0xC5,0x22,0x03,0x60,0x41,0xAE,0x8F,0xEC,0xCD,0x2A,0x0B,0x68,0x49
+ .db 0x97,0xB6,0xD5,0xF4,0x13,0x32,0x51,0x70,0x9F,0xBE,0xDD,0xFC,0x1B,0x3A,0x59,0x78
+ .db 0x88,0xA9,0xCA,0xEB,0x0C,0x2D,0x4E,0x6F,0x80,0xA1,0xC2,0xE3,0x04,0x25,0x46,0x67
+ .db 0xB9,0x98,0xFB,0xDA,0x3D,0x1C,0x7F,0x5E,0xB1,0x90,0xF3,0xD2,0x35,0x14,0x77,0x56
+ .db 0xEA,0xCB,0xA8,0x89,0x6E,0x4F,0x2C,0x0D,0xE2,0xC3,0xA0,0x81,0x66,0x47,0x24,0x05
+ .db 0xDB,0xFA,0x99,0xB8,0x5F,0x7E,0x1D,0x3C,0xD3,0xF2,0x91,0xB0,0x57,0x76,0x15,0x34
+ .db 0x4C,0x6D,0x0E,0x2F,0xC8,0xE9,0x8A,0xAB,0x44,0x65,0x06,0x27,0xC0,0xE1,0x82,0xA3
+ .db 0x7D,0x5C,0x3F,0x1E,0xF9,0xD8,0xBB,0x9A,0x75,0x54,0x37,0x16,0xF1,0xD0,0xB3,0x92
+ .db 0x2E,0x0F,0x6C,0x4D,0xAA,0x8B,0xE8,0xC9,0x26,0x07,0x64,0x45,0xA2,0x83,0xE0,0xC1
+ .db 0x1F,0x3E,0x5D,0x7C,0x9B,0xBA,0xD9,0xF8,0x17,0x36,0x55,0x74,0x93,0xB2,0xD1,0xF0 
+
+; hi byte CRC lookup table
+
+crchi:
+ .db 0x00,0x10,0x20,0x30,0x40,0x50,0x60,0x70,0x81,0x91,0xA1,0xB1,0xC1,0xD1,0xE1,0xF1
+ .db 0x12,0x02,0x32,0x22,0x52,0x42,0x72,0x62,0x93,0x83,0xB3,0xA3,0xD3,0xC3,0xF3,0xE3
+ .db 0x24,0x34,0x04,0x14,0x64,0x74,0x44,0x54,0xA5,0xB5,0x85,0x95,0xE5,0xF5,0xC5,0xD5
+ .db 0x36,0x26,0x16,0x06,0x76,0x66,0x56,0x46,0xB7,0xA7,0x97,0x87,0xF7,0xE7,0xD7,0xC7
+ .db 0x48,0x58,0x68,0x78,0x08,0x18,0x28,0x38,0xC9,0xD9,0xE9,0xF9,0x89,0x99,0xA9,0xB9
+ .db 0x5A,0x4A,0x7A,0x6A,0x1A,0x0A,0x3A,0x2A,0xDB,0xCB,0xFB,0xEB,0x9B,0x8B,0xBB,0xAB
+ .db 0x6C,0x7C,0x4C,0x5C,0x2C,0x3C,0x0C,0x1C,0xED,0xFD,0xCD,0xDD,0xAD,0xBD,0x8D,0x9D
+ .db 0x7E,0x6E,0x5E,0x4E,0x3E,0x2E,0x1E,0x0E,0xFF,0xEF,0xDF,0xCF,0xBF,0xAF,0x9F,0x8F
+ .db 0x91,0x81,0xB1,0xA1,0xD1,0xC1,0xF1,0xE1,0x10,0x00,0x30,0x20,0x50,0x40,0x70,0x60
+ .db 0x83,0x93,0xA3,0xB3,0xC3,0xD3,0xE3,0xF3,0x02,0x12,0x22,0x32,0x42,0x52,0x62,0x72
+ .db 0xB5,0xA5,0x95,0x85,0xF5,0xE5,0xD5,0xC5,0x34,0x24,0x14,0x04,0x74,0x64,0x54,0x44
+ .db 0xA7,0xB7,0x87,0x97,0xE7,0xF7,0xC7,0xD7,0x26,0x36,0x06,0x16,0x66,0x76,0x46,0x56
+ .db 0xD9,0xC9,0xF9,0xE9,0x99,0x89,0xB9,0xA9,0x58,0x48,0x78,0x68,0x18,0x08,0x38,0x28
+ .db 0xCB,0xDB,0xEB,0xFB,0x8B,0x9B,0xAB,0xBB,0x4A,0x5A,0x6A,0x7A,0x0A,0x1A,0x2A,0x3A
+ .db 0xFD,0xED,0xDD,0xCD,0xBD,0xAD,0x9D,0x8D,0x7C,0x6C,0x5C,0x4C,0x3C,0x2C,0x1C,0x0C
+ .db 0xEF,0xFF,0xCF,0xDF,0xAF,0xBF,0x8F,0x9F,0x6E,0x7E,0x4E,0x5E,0x2E,0x3E,0x0E,0x1E 
+;
+;
+; End of File
+;
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVR_CC65.zip b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVR_CC65.zip
new file mode 100644
index 00000000..9fde77e4
Binary files /dev/null and b/trunk/AVRProjects/AVR_6502/Daryl_1284p/AVR_CC65.zip differ
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/IORegs.inc b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/IORegs.inc
new file mode 100644
index 00000000..703babcd
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/IORegs.inc
@@ -0,0 +1,1047 @@
+; ***** I/O REGISTER DEFINITIONS *****************************************
+; NOTE:
+; Definitions marked "MEMORY MAPPED"are extended I/O ports
+; and cannot be used with IN/OUT instructions
+UDR1	= $ce	
+UBRR1L	= $cc	
+UBRR1H	= $cd	
+UCSR1C	= $ca	
+UCSR1B	= $c9	
+UCSR1A	= $c8	
+UDR0	= $c6	
+UBRR0L	= $c4	
+UBRR0H	= $c5	
+UCSR0C	= $c2	
+UCSR0B	= $c1	
+UCSR0A	= $c0	
+TWAMR	= $bd	
+TWCR	= $bc	
+TWDR	= $bb	
+TWAR	= $ba	
+TWSR	= $b9	
+TWBR	= $b8	
+ASSR	= $b6	
+OCR2B	= $b4	
+OCR2A	= $b3	
+TCNT2	= $b2	
+TCCR2B	= $b1	
+TCCR2A	= $b0	
+OCR3BL	= $9a	
+OCR3BH	= $9b	
+OCR3AL	= $98	
+OCR3AH	= $99	
+ICR3L	= $96	
+ICR3H	= $97	
+TCNT3L	= $94	
+TCNT3H	= $95	
+TCCR3C	= $92	
+TCCR3B	= $91	
+TCCR3A	= $90	
+OCR1BL	= $8a	
+OCR1BH	= $8b	
+OCR1AL	= $88	
+OCR1AH	= $89	
+ICR1L	= $86	
+ICR1H	= $87	
+TCNT1L	= $84	
+TCNT1H	= $85	
+TCCR1C	= $82	
+TCCR1B	= $81	
+TCCR1A	= $80	
+DIDR1	= $7f	
+DIDR0	= $7e	
+ADMUX	= $7c	
+ADCSRB	= $7b	
+ADCSRA	= $7a	
+ADCH	= $79	
+ADCL	= $78	
+PCMSK3	= $73	
+TIMSK3	= $71	
+TIMSK2	= $70	
+TIMSK1	= $6f	
+TIMSK0	= $6e	
+PCMSK2	= $6d	
+PCMSK1	= $6c	
+PCMSK0	= $6b	
+EICRA	= $69	
+PCICR	= $68	
+OSCCAL	= $66	
+PRR1	= $65	
+PRR0	= $64	
+CLKPR	= $61	
+WDTCSR	= $60	
+SREG	= $5f
+SPL	= $5d
+SPH	= $5e
+RAMPZ	= $5b
+SPMCSR	= $57
+MCUCR	= $55
+MCUSR	= $54
+SMCR	= $53
+OCDR	= $51
+ACSR	= $50
+SPDR	= $4e
+SPSR	= $4d
+SPCR	= $4c
+GPIOR2	= $4b
+GPIOR1	= $4a
+OCR0B	= $48
+OCR0A	= $47
+TCNT0	= $46
+TCCR0B	= $45
+TCCR0A	= $44
+GTCCR	= $43
+EEARH	= $42
+EEARL	= $41
+EEDR	= $40
+EECR	= $3f
+GPIOR0	= $3e
+EIMSK	= $3d
+EIFR	= $3c
+PCIFR	= $3b
+TIFR3	= $38
+TIFR2	= $37
+TIFR1	= $36
+TIFR0	= $35
+PORTD	= $2b
+DDRD	= $2a
+PIND	= $29
+PORTC	= $28
+DDRC	= $27
+PINC	= $26
+PORTB	= $25
+DDRB	= $24
+PINB	= $23
+PORTA	= $22
+DDRA	= $21
+PINA	= $20
+
+
+; ***** BIT DEFINITIONS **************************************************
+
+; ***** ANALOG_COMPARATOR ************
+; ADCSRB - ADC Control and Status Register B
+ACME	= 6	; Analog Comparator Multiplexer Enable
+
+; ACSR - Analog Comparator Control And Status Register
+ACIS0	= 0	; Analog Comparator Interrupt Mode Select bit 0
+ACIS1	= 1	; Analog Comparator Interrupt Mode Select bit 1
+ACIC	= 2	; Analog Comparator Input Capture Enable
+ACIE	= 3	; Analog Comparator Interrupt Enable
+ACI	= 4	; Analog Comparator Interrupt Flag
+ACO	= 5	; Analog Compare Output
+ACBG	= 6	; Analog Comparator Bandgap Select
+ACD	= 7	; Analog Comparator Disable
+
+; DIDR1 - Digital Input Disable Register 1
+AIN0D	= 0	; AIN0 Digital Input Disable
+AIN1D	= 1	; AIN1 Digital Input Disable
+
+
+; ***** USART0 ***********************
+; UDR0 - USART I/O Data Register
+UDR0_0	= 0	; USART I/O Data Register bit 0
+UDR0_1	= 1	; USART I/O Data Register bit 1
+UDR0_2	= 2	; USART I/O Data Register bit 2
+UDR0_3	= 3	; USART I/O Data Register bit 3
+UDR0_4	= 4	; USART I/O Data Register bit 4
+UDR0_5	= 5	; USART I/O Data Register bit 5
+UDR0_6	= 6	; USART I/O Data Register bit 6
+UDR0_7	= 7	; USART I/O Data Register bit 7
+
+; UCSR0A - USART Control and Status Register A
+MPCM0	= 0	; Multi-processor Communication Mode
+U2X0	= 1	; Double the USART transmission speed
+UPE0	= 2	; Parity Error
+DOR0	= 3	; Data overRun
+FE0	= 4	; Framing Error
+UDRE0	= 5	; USART Data Register Empty
+TXC0	= 6	; USART Transmitt Complete
+RXC0	= 7	; USART Receive Complete
+
+; UCSR0B - USART Control and Status Register B
+TXB80	= 0	; Transmit Data Bit 8
+RXB80	= 1	; Receive Data Bit 8
+UCSZ02	= 2	; Character Size
+TXEN0	= 3	; Transmitter Enable
+RXEN0	= 4	; Receiver Enable
+UDRIE0	= 5	; USART Data register Empty Interrupt Enable
+TXCIE0	= 6	; TX Complete Interrupt Enable
+RXCIE0	= 7	; RX Complete Interrupt Enable
+
+; UCSR0C - USART Control and Status Register C
+UCPOL0	= 0	; Clock Polarity
+UCSZ00	= 1	; Character Size
+UCPHA0	= UCSZ00	; For compatibility
+UCSZ01	= 2	; Character Size
+UDORD0	= UCSZ01	; For compatibility
+USBS0	= 3	; Stop Bit Select
+UPM00	= 4	; Parity Mode Bit 0
+UPM01	= 5	; Parity Mode Bit 1
+UMSEL00	= 6	; USART Mode Select
+UMSEL0	= UMSEL00	; For compatibility
+UMSEL01	= 7	; USART Mode Select
+UMSEL1	= UMSEL01	; For compatibility
+
+; UBRR0H - USART Baud Rate Register High Byte
+UBRR8	= 0	; USART Baud Rate Register bit 8
+UBRR9	= 1	; USART Baud Rate Register bit 9
+UBRR10	= 2	; USART Baud Rate Register bit 10
+UBRR11	= 3	; USART Baud Rate Register bit 11
+
+; UBRR0L - USART Baud Rate Register Low Byte
+_UBRR0	= 0	; USART Baud Rate Register bit 0
+_UBRR1	= 1	; USART Baud Rate Register bit 1
+UBRR2	= 2	; USART Baud Rate Register bit 2
+UBRR3	= 3	; USART Baud Rate Register bit 3
+UBRR4	= 4	; USART Baud Rate Register bit 4
+UBRR5	= 5	; USART Baud Rate Register bit 5
+UBRR6	= 6	; USART Baud Rate Register bit 6
+UBRR7	= 7	; USART Baud Rate Register bit 7
+
+
+; ***** PORTA ************************
+; PORTA - Port A Data Register
+PORTA0	= 0	; Port A Data Register bit 0
+PA0	= 0	; For compatibility
+PORTA1	= 1	; Port A Data Register bit 1
+PA1	= 1	; For compatibility
+PORTA2	= 2	; Port A Data Register bit 2
+PA2	= 2	; For compatibility
+PORTA3	= 3	; Port A Data Register bit 3
+PA3	= 3	; For compatibility
+PORTA4	= 4	; Port A Data Register bit 4
+PA4	= 4	; For compatibility
+PORTA5	= 5	; Port A Data Register bit 5
+PA5	= 5	; For compatibility
+PORTA6	= 6	; Port A Data Register bit 6
+PA6	= 6	; For compatibility
+PORTA7	= 7	; Port A Data Register bit 7
+PA7	= 7	; For compatibility
+
+; DDRA - Port A Data Direction Register
+DDA0	= 0	; Data Direction Register, Port A, bit 0
+DDA1	= 1	; Data Direction Register, Port A, bit 1
+DDA2	= 2	; Data Direction Register, Port A, bit 2
+DDA3	= 3	; Data Direction Register, Port A, bit 3
+DDA4	= 4	; Data Direction Register, Port A, bit 4
+DDA5	= 5	; Data Direction Register, Port A, bit 5
+DDA6	= 6	; Data Direction Register, Port A, bit 6
+DDA7	= 7	; Data Direction Register, Port A, bit 7
+
+; PINA - Port A Input Pins
+PINA0	= 0	; Input Pins, Port A bit 0
+PINA1	= 1	; Input Pins, Port A bit 1
+PINA2	= 2	; Input Pins, Port A bit 2
+PINA3	= 3	; Input Pins, Port A bit 3
+PINA4	= 4	; Input Pins, Port A bit 4
+PINA5	= 5	; Input Pins, Port A bit 5
+PINA6	= 6	; Input Pins, Port A bit 6
+PINA7	= 7	; Input Pins, Port A bit 7
+
+
+; ***** PORTB ************************
+; PORTB - Port B Data Register
+PORTB0	= 0	; Port B Data Register bit 0
+PB0	= 0	; For compatibility
+PORTB1	= 1	; Port B Data Register bit 1
+PB1	= 1	; For compatibility
+PORTB2	= 2	; Port B Data Register bit 2
+PB2	= 2	; For compatibility
+PORTB3	= 3	; Port B Data Register bit 3
+PB3	= 3	; For compatibility
+PORTB4	= 4	; Port B Data Register bit 4
+PB4	= 4	; For compatibility
+PORTB5	= 5	; Port B Data Register bit 5
+PB5	= 5	; For compatibility
+PORTB6	= 6	; Port B Data Register bit 6
+PB6	= 6	; For compatibility
+PORTB7	= 7	; Port B Data Register bit 7
+PB7	= 7	; For compatibility
+
+; DDRB - Port B Data Direction Register
+DDB0	= 0	; Port B Data Direction Register bit 0
+DDB1	= 1	; Port B Data Direction Register bit 1
+DDB2	= 2	; Port B Data Direction Register bit 2
+DDB3	= 3	; Port B Data Direction Register bit 3
+DDB4	= 4	; Port B Data Direction Register bit 4
+DDB5	= 5	; Port B Data Direction Register bit 5
+DDB6	= 6	; Port B Data Direction Register bit 6
+DDB7	= 7	; Port B Data Direction Register bit 7
+
+; PINB - Port B Input Pins
+PINB0	= 0	; Port B Input Pins bit 0
+PINB1	= 1	; Port B Input Pins bit 1
+PINB2	= 2	; Port B Input Pins bit 2
+PINB3	= 3	; Port B Input Pins bit 3
+PINB4	= 4	; Port B Input Pins bit 4
+PINB5	= 5	; Port B Input Pins bit 5
+PINB6	= 6	; Port B Input Pins bit 6
+PINB7	= 7	; Port B Input Pins bit 7
+
+
+; ***** PORTC ************************
+; PORTC - Port C Data Register
+PORTC0	= 0	; Port C Data Register bit 0
+PC0	= 0	; For compatibility
+PORTC1	= 1	; Port C Data Register bit 1
+PC1	= 1	; For compatibility
+PORTC2	= 2	; Port C Data Register bit 2
+PC2	= 2	; For compatibility
+PORTC3	= 3	; Port C Data Register bit 3
+PC3	= 3	; For compatibility
+PORTC4	= 4	; Port C Data Register bit 4
+PC4	= 4	; For compatibility
+PORTC5	= 5	; Port C Data Register bit 5
+PC5	= 5	; For compatibility
+PORTC6	= 6	; Port C Data Register bit 6
+PC6	= 6	; For compatibility
+PORTC7	= 7	; Port C Data Register bit 7
+PC7	= 7	; For compatibility
+
+; DDRC - Port C Data Direction Register
+DDC0	= 0	; Port C Data Direction Register bit 0
+DDC1	= 1	; Port C Data Direction Register bit 1
+DDC2	= 2	; Port C Data Direction Register bit 2
+DDC3	= 3	; Port C Data Direction Register bit 3
+DDC4	= 4	; Port C Data Direction Register bit 4
+DDC5	= 5	; Port C Data Direction Register bit 5
+DDC6	= 6	; Port C Data Direction Register bit 6
+DDC7	= 7	; Port C Data Direction Register bit 7
+
+; PINC - Port C Input Pins
+PINC0	= 0	; Port C Input Pins bit 0
+PINC1	= 1	; Port C Input Pins bit 1
+PINC2	= 2	; Port C Input Pins bit 2
+PINC3	= 3	; Port C Input Pins bit 3
+PINC4	= 4	; Port C Input Pins bit 4
+PINC5	= 5	; Port C Input Pins bit 5
+PINC6	= 6	; Port C Input Pins bit 6
+PINC7	= 7	; Port C Input Pins bit 7
+
+
+; ***** PORTD ************************
+; PORTD - Port D Data Register
+PORTD0	= 0	; Port D Data Register bit 0
+PD0	= 0	; For compatibility
+PORTD1	= 1	; Port D Data Register bit 1
+PD1	= 1	; For compatibility
+PORTD2	= 2	; Port D Data Register bit 2
+PD2	= 2	; For compatibility
+PORTD3	= 3	; Port D Data Register bit 3
+PD3	= 3	; For compatibility
+PORTD4	= 4	; Port D Data Register bit 4
+PD4	= 4	; For compatibility
+PORTD5	= 5	; Port D Data Register bit 5
+PD5	= 5	; For compatibility
+PORTD6	= 6	; Port D Data Register bit 6
+PD6	= 6	; For compatibility
+PORTD7	= 7	; Port D Data Register bit 7
+PD7	= 7	; For compatibility
+
+; DDRD - Port D Data Direction Register
+DDD0	= 0	; Port D Data Direction Register bit 0
+DDD1	= 1	; Port D Data Direction Register bit 1
+DDD2	= 2	; Port D Data Direction Register bit 2
+DDD3	= 3	; Port D Data Direction Register bit 3
+DDD4	= 4	; Port D Data Direction Register bit 4
+DDD5	= 5	; Port D Data Direction Register bit 5
+DDD6	= 6	; Port D Data Direction Register bit 6
+DDD7	= 7	; Port D Data Direction Register bit 7
+
+; PIND - Port D Input Pins
+PIND0	= 0	; Port D Input Pins bit 0
+PIND1	= 1	; Port D Input Pins bit 1
+PIND2	= 2	; Port D Input Pins bit 2
+PIND3	= 3	; Port D Input Pins bit 3
+PIND4	= 4	; Port D Input Pins bit 4
+PIND5	= 5	; Port D Input Pins bit 5
+PIND6	= 6	; Port D Input Pins bit 6
+PIND7	= 7	; Port D Input Pins bit 7
+
+
+; ***** TIMER_COUNTER_0 **************
+; TIMSK0 - Timer/Counter0 Interrupt Mask Register
+TOIE0	= 0	; Timer/Counter0 Overflow Interrupt Enable
+OCIE0A	= 1	; Timer/Counter0 Output Compare Match A Interrupt Enable
+OCIE0B	= 2	; Timer/Counter0 Output Compare Match B Interrupt Enable
+
+; TIFR0 - Timer/Counter0 Interrupt Flag register
+TOV0	= 0	; Timer/Counter0 Overflow Flag
+OCF0A	= 1	; Timer/Counter0 Output Compare Flag 0A
+OCF0B	= 2	; Timer/Counter0 Output Compare Flag 0B
+
+; TCCR0A - Timer/Counter  Control Register A
+WGM00	= 0	; Waveform Generation Mode
+WGM01	= 1	; Waveform Generation Mode
+COM0B0	= 4	; Compare Output Mode, Fast PWm
+COM0B1	= 5	; Compare Output Mode, Fast PWm
+COM0A0	= 6	; Compare Output Mode, Phase Correct PWM Mode
+COM0A1	= 7	; Compare Output Mode, Phase Correct PWM Mode
+
+; TCCR0B - Timer/Counter Control Register B
+CS00	= 0	; Clock Select
+CS01	= 1	; Clock Select
+CS02	= 2	; Clock Select
+WGM02	= 3	; 
+FOC0B	= 6	; Force Output Compare B
+FOC0A	= 7	; Force Output Compare A
+
+; TCNT0 - Timer/Counter0
+TCNT0_0	= 0	; 
+TCNT0_1	= 1	; 
+TCNT0_2	= 2	; 
+TCNT0_3	= 3	; 
+TCNT0_4	= 4	; 
+TCNT0_5	= 5	; 
+TCNT0_6	= 6	; 
+TCNT0_7	= 7	; 
+
+; OCR0A - Timer/Counter0 Output Compare Register
+OCR0A_0	= 0	; 
+OCR0A_1	= 1	; 
+OCR0A_2	= 2	; 
+OCR0A_3	= 3	; 
+OCR0A_4	= 4	; 
+OCR0A_5	= 5	; 
+OCR0A_6	= 6	; 
+OCR0A_7	= 7	; 
+
+; OCR0B - Timer/Counter0 Output Compare Register
+OCR0B_0	= 0	; 
+OCR0B_1	= 1	; 
+OCR0B_2	= 2	; 
+OCR0B_3	= 3	; 
+OCR0B_4	= 4	; 
+OCR0B_5	= 5	; 
+OCR0B_6	= 6	; 
+OCR0B_7	= 7	; 
+
+; GTCCR - General Timer/Counter Control Register
+PSRSYNC	= 0	; Prescaler Reset Timer/Counter1 and Timer/Counter0
+PSR10	= PSRSYNC	; For compatibility
+TSM	= 7	; Timer/Counter Synchronization Mode
+
+
+; ***** TIMER_COUNTER_1 **************
+; TIMSK1 - Timer/Counter1 Interrupt Mask Register
+TOIE1	= 0	; Timer/Counter1 Overflow Interrupt Enable
+OCIE1A	= 1	; Timer/Counter1 Output Compare A Match Interrupt Enable
+OCIE1B	= 2	; Timer/Counter1 Output Compare B Match Interrupt Enable
+ICIE1	= 5	; Timer/Counter1 Input Capture Interrupt Enable
+
+; TIFR1 - Timer/Counter Interrupt Flag register
+TOV1	= 0	; Timer/Counter1 Overflow Flag
+OCF1A	= 1	; Timer/Counter1 Output Compare A Match Flag
+OCF1B	= 2	; Timer/Counter1 Output Compare B Match Flag
+ICF1	= 5	; Timer/Counter1 Input Capture Flag
+
+; TCCR1A - Timer/Counter1 Control Register A
+WGM10	= 0	; Pulse Width Modulator Select Bit 0
+PWM10	= WGM10	; For compatibility
+WGM11	= 1	; Pulse Width Modulator Select Bit 1
+PWM11	= WGM11	; For compatibility
+COM1B0	= 4	; Comparet Ouput Mode 1B, bit 0
+COM1B1	= 5	; Compare Output Mode 1B, bit 1
+COM1A0	= 6	; Comparet Ouput Mode 1A, bit 0
+COM1A1	= 7	; Compare Output Mode 1A, bit 1
+
+; TCCR1B - Timer/Counter1 Control Register B
+CS10	= 0	; Clock Select bit 0
+CS11	= 1	; Clock Select 1 bit 1
+CS12	= 2	; Clock Select1 bit 2
+WGM12	= 3	; Waveform Generation Mode Bit 2
+CTC1	= WGM12	; For compatibility
+WGM13	= 4	; Waveform Generation Mode Bit 3
+ICES1	= 6	; Input Capture 1 Edge Select
+ICNC1	= 7	; Input Capture 1 Noise Canceler
+
+; TCCR1C - Timer/Counter1 Control Register C
+FOC1B	= 6	; Force Output Compare for Channel B
+FOC1A	= 7	; Force Output Compare for Channel A
+
+
+; ***** TIMER_COUNTER_2 **************
+; TIMSK2 - Timer/Counter Interrupt Mask register
+TOIE2	= 0	; Timer/Counter2 Overflow Interrupt Enable
+TOIE2A	= TOIE2	; For compatibility
+OCIE2A	= 1	; Timer/Counter2 Output Compare Match A Interrupt Enable
+OCIE2B	= 2	; Timer/Counter2 Output Compare Match B Interrupt Enable
+
+; TIFR2 - Timer/Counter Interrupt Flag Register
+TOV2	= 0	; Timer/Counter2 Overflow Flag
+OCF2A	= 1	; Output Compare Flag 2A
+OCF2B	= 2	; Output Compare Flag 2B
+
+; TCCR2A - Timer/Counter2 Control Register A
+WGM20	= 0	; Waveform Genration Mode
+WGM21	= 1	; Waveform Genration Mode
+COM2B0	= 4	; Compare Output Mode bit 0
+COM2B1	= 5	; Compare Output Mode bit 1
+COM2A0	= 6	; Compare Output Mode bit 1
+COM2A1	= 7	; Compare Output Mode bit 1
+
+; TCCR2B - Timer/Counter2 Control Register B
+CS20	= 0	; Clock Select bit 0
+CS21	= 1	; Clock Select bit 1
+CS22	= 2	; Clock Select bit 2
+WGM22	= 3	; Waveform Generation Mode
+FOC2B	= 6	; Force Output Compare B
+FOC2A	= 7	; Force Output Compare A
+
+; TCNT2 - Timer/Counter2
+TCNT2_0	= 0	; Timer/Counter 2 bit 0
+TCNT2_1	= 1	; Timer/Counter 2 bit 1
+TCNT2_2	= 2	; Timer/Counter 2 bit 2
+TCNT2_3	= 3	; Timer/Counter 2 bit 3
+TCNT2_4	= 4	; Timer/Counter 2 bit 4
+TCNT2_5	= 5	; Timer/Counter 2 bit 5
+TCNT2_6	= 6	; Timer/Counter 2 bit 6
+TCNT2_7	= 7	; Timer/Counter 2 bit 7
+
+; OCR2A - Timer/Counter2 Output Compare Register A
+OCR2A_0	= 0	; Timer/Counter2 Output Compare Register Bit 0
+OCR2A_1	= 1	; Timer/Counter2 Output Compare Register Bit 1
+OCR2A_2	= 2	; Timer/Counter2 Output Compare Register Bit 2
+OCR2A_3	= 3	; Timer/Counter2 Output Compare Register Bit 3
+OCR2A_4	= 4	; Timer/Counter2 Output Compare Register Bit 4
+OCR2A_5	= 5	; Timer/Counter2 Output Compare Register Bit 5
+OCR2A_6	= 6	; Timer/Counter2 Output Compare Register Bit 6
+OCR2A_7	= 7	; Timer/Counter2 Output Compare Register Bit 7
+
+; OCR2B - Timer/Counter2 Output Compare Register B
+OCR2B_0	= 0	; Timer/Counter2 Output Compare Register Bit 0
+OCR2B_1	= 1	; Timer/Counter2 Output Compare Register Bit 1
+OCR2B_2	= 2	; Timer/Counter2 Output Compare Register Bit 2
+OCR2B_3	= 3	; Timer/Counter2 Output Compare Register Bit 3
+OCR2B_4	= 4	; Timer/Counter2 Output Compare Register Bit 4
+OCR2B_5	= 5	; Timer/Counter2 Output Compare Register Bit 5
+OCR2B_6	= 6	; Timer/Counter2 Output Compare Register Bit 6
+OCR2B_7	= 7	; Timer/Counter2 Output Compare Register Bit 7
+
+; ASSR - Asynchronous Status Register
+TCR2BUB	= 0	; Timer/Counter Control Register2 Update Busy
+TCR2AUB	= 1	; Timer/Counter Control Register2 Update Busy
+OCR2BUB	= 2	; Output Compare Register 2 Update Busy
+OCR2AUB	= 3	; Output Compare Register2 Update Busy
+TCN2UB	= 4	; Timer/Counter2 Update Busy
+AS2	= 5	; Asynchronous Timer/Counter2
+EXCLK	= 6	; Enable External Clock Input
+
+; GTCCR - General Timer Counter Control register
+PSRASY	= 1	; Prescaler Reset Timer/Counter2
+PSR2	= PSRASY	; For compatibility
+;TSM	= 7	; Timer/Counter Synchronization Mode
+
+
+; ***** TIMER_COUNTER_3 **************
+; TIMSK3 - Timer/Counter3 Interrupt Mask Register
+TOIE3	= 0	; Timer/Counter3 Overflow Interrupt Enable
+OCIE3A	= 1	; Timer/Counter3 Output Compare A Match Interrupt Enable
+OCIE3B	= 2	; Timer/Counter3 Output Compare B Match Interrupt Enable
+ICIE3	= 5	; Timer/Counter3 Input Capture Interrupt Enable
+
+; TIFR3 - Timer/Counter Interrupt Flag register
+TOV3	= 0	; Timer/Counter3 Overflow Flag
+OCF3A	= 1	; Timer/Counter3 Output Compare A Match Flag
+OCF3B	= 2	; Timer/Counter3 Output Compare B Match Flag
+ICF3	= 5	; Timer/Counter3 Input Capture Flag
+
+; TCCR3A - Timer/Counter3 Control Register A
+WGM30	= 0	; Pulse Width Modulator Select Bit 0
+WGM31	= 1	; Pulse Width Modulator Select Bit 1
+COM3B0	= 4	; Comparet Ouput Mode 3B, bit 0
+COM3B1	= 5	; Compare Output Mode 3B, bit 1
+COM3A0	= 6	; Comparet Ouput Mode 3A, bit 0
+COM3A1	= 7	; Compare Output Mode 3A, bit 1
+
+; TCCR3B - Timer/Counter3 Control Register B
+CS30	= 0	; Clock Select bit 0
+CS31	= 1	; Clock Select 3 bit 1
+CS32	= 2	; Clock Select3 bit 2
+WGM32	= 3	; Waveform Generation Mode Bit 2
+WGM33	= 4	; Waveform Generation Mode Bit 3
+ICES3	= 6	; Input Capture 3 Edge Select
+ICNC3	= 7	; Input Capture 3 Noise Canceler
+
+; TCCR3C - Timer/Counter3 Control Register C
+FOC3B	= 6	; Force Output Compare for Channel B
+FOC3A	= 7	; Force Output Compare for Channel A
+
+; OCR3BH - Timer/Counter3 Output Compare Register B High Byte
+OCR3AH0	= 0	; Timer/Counter3 Output Compare Register High Byte bit 0
+OCR3AH1	= 1	; Timer/Counter3 Output Compare Register High Byte bit 1
+OCR3AH2	= 2	; Timer/Counter3 Output Compare Register High Byte bit 2
+OCR3AH3	= 3	; Timer/Counter3 Output Compare Register High Byte bit 3
+OCR3AH4	= 4	; Timer/Counter3 Output Compare Register High Byte bit 4
+OCR3AH5	= 5	; Timer/Counter3 Output Compare Register High Byte bit 5
+OCR3AH6	= 6	; Timer/Counter3 Output Compare Register High Byte bit 6
+OCR3AH7	= 7	; Timer/Counter3 Output Compare Register High Byte bit 7
+
+; OCR3BL - Timer/Counter3 Output Compare Register B Low Byte
+OCR3AL0	= 0	; Timer/Counter3 Output Compare Register Low Byte Bit 0
+OCR3AL1	= 1	; Timer/Counter3 Output Compare Register Low Byte Bit 1
+OCR3AL2	= 2	; Timer/Counter3 Output Compare Register Low Byte Bit 2
+OCR3AL3	= 3	; Timer/Counter3 Output Compare Register Low Byte Bit 3
+OCR3AL4	= 4	; Timer/Counter3 Output Compare Register Low Byte Bit 4
+OCR3AL5	= 5	; Timer/Counter3 Output Compare Register Low Byte Bit 5
+OCR3AL6	= 6	; Timer/Counter3 Output Compare Register Low Byte Bit 6
+OCR3AL7	= 7	; Timer/Counter3 Output Compare Register Low Byte Bit 7
+
+
+; ***** BOOT_LOAD ********************
+; SPMCSR - Store Program Memory Control Register
+SPMEN	= 0	; Store Program Memory Enable
+PGERS	= 1	; Page Erase
+PGWRT	= 2	; Page Write
+BLBSET	= 3	; Boot Lock Bit Set
+RWWSRE	= 4	; Read While Write section read enable
+SIGRD	= 5	; Signature Row Read
+RWWSB	= 6	; Read While Write Section Busy
+SPMIE	= 7	; SPM Interrupt Enable
+
+
+; ***** EXTERNAL_INTERRUPT ***********
+; EICRA - External Interrupt Control Register A
+ISC00	= 0	; External Interrupt Sense Control Bit
+ISC01	= 1	; External Interrupt Sense Control Bit
+ISC10	= 2	; External Interrupt Sense Control Bit
+ISC11	= 3	; External Interrupt Sense Control Bit
+ISC20	= 4	; External Interrupt Sense Control Bit
+ISC21	= 5	; External Interrupt Sense Control Bit
+
+; EIMSK - External Interrupt Mask Register
+INT0	= 0	; External Interrupt Request 0 Enable
+INT1	= 1	; External Interrupt Request 1 Enable
+INT2	= 2	; External Interrupt Request 2 Enable
+
+; EIFR - External Interrupt Flag Register
+INTF0	= 0	; External Interrupt Flag 0
+INTF1	= 1	; External Interrupt Flag 1
+INTF2	= 2	; External Interrupt Flag 2
+
+; PCICR - Pin Change Interrupt Control Register
+PCIE0	= 0	; Pin Change Interrupt Enable 0
+PCIE1	= 1	; Pin Change Interrupt Enable 1
+PCIE2	= 2	; Pin Change Interrupt Enable 2
+PCIE3	= 3	; Pin Change Interrupt Enable 3
+
+; PCIFR - Pin Change Interrupt Flag Register
+PCIF0	= 0	; Pin Change Interrupt Flag 0
+PCIF1	= 1	; Pin Change Interrupt Flag 1
+PCIF2	= 2	; Pin Change Interrupt Flag 2
+PCIF3	= 3	; Pin Change Interrupt Flag 3
+
+; PCMSK3 - Pin Change Mask Register 3
+PCINT24	= 0	; Pin Change Enable Mask 24
+PCINT25	= 1	; Pin Change Enable Mask 25
+PCINT26	= 2	; Pin Change Enable Mask 26
+PCINT27	= 3	; Pin Change Enable Mask 27
+PCINT28	= 4	; Pin Change Enable Mask 28
+PCINT29	= 5	; Pin Change Enable Mask 29
+PCINT30	= 6	; Pin Change Enable Mask 30
+PCINT31	= 7	; Pin Change Enable Mask 31
+
+; PCMSK2 - Pin Change Mask Register 2
+PCINT16	= 0	; Pin Change Enable Mask 16
+PCINT17	= 1	; Pin Change Enable Mask 17
+PCINT18	= 2	; Pin Change Enable Mask 18
+PCINT19	= 3	; Pin Change Enable Mask 19
+PCINT20	= 4	; Pin Change Enable Mask 20
+PCINT21	= 5	; Pin Change Enable Mask 21
+PCINT22	= 6	; Pin Change Enable Mask 22
+PCINT23	= 7	; Pin Change Enable Mask 23
+
+; PCMSK1 - Pin Change Mask Register 1
+PCINT8	= 0	; Pin Change Enable Mask 8
+PCINT9	= 1	; Pin Change Enable Mask 9
+PCINT10	= 2	; Pin Change Enable Mask 10
+PCINT11	= 3	; Pin Change Enable Mask 11
+PCINT12	= 4	; Pin Change Enable Mask 12
+PCINT13	= 5	; Pin Change Enable Mask 13
+PCINT14	= 6	; Pin Change Enable Mask 14
+PCINT15	= 7	; Pin Change Enable Mask 15
+
+; PCMSK0 - Pin Change Mask Register 0
+PCINT0	= 0	; Pin Change Enable Mask 0
+PCINT1	= 1	; Pin Change Enable Mask 1
+PCINT2	= 2	; Pin Change Enable Mask 2
+PCINT3	= 3	; Pin Change Enable Mask 3
+PCINT4	= 4	; Pin Change Enable Mask 4
+PCINT5	= 5	; Pin Change Enable Mask 5
+PCINT6	= 6	; Pin Change Enable Mask 6
+PCINT7	= 7	; Pin Change Enable Mask 7
+
+
+; ***** AD_CONVERTER *****************
+; ADMUX - The ADC multiplexer Selection Register
+MUX0	= 0	; Analog Channel and Gain Selection Bits
+MUX1	= 1	; Analog Channel and Gain Selection Bits
+MUX2	= 2	; Analog Channel and Gain Selection Bits
+MUX3	= 3	; Analog Channel and Gain Selection Bits
+MUX4	= 4	; Analog Channel and Gain Selection Bits
+ADLAR	= 5	; Left Adjust Result
+REFS0	= 6	; Reference Selection Bit 0
+REFS1	= 7	; Reference Selection Bit 1
+
+; ADCSRA - The ADC Control and Status register A
+ADPS0	= 0	; ADC  Prescaler Select Bits
+ADPS1	= 1	; ADC  Prescaler Select Bits
+ADPS2	= 2	; ADC  Prescaler Select Bits
+ADIE	= 3	; ADC Interrupt Enable
+ADIF	= 4	; ADC Interrupt Flag
+ADATE	= 5	; ADC  Auto Trigger Enable
+ADSC	= 6	; ADC Start Conversion
+ADEN	= 7	; ADC Enable
+
+; ADCSRB - The ADC Control and Status register B
+ADTS0	= 0	; ADC Auto Trigger Source bit 0
+ADTS1	= 1	; ADC Auto Trigger Source bit 1
+ADTS2	= 2	; ADC Auto Trigger Source bit 2
+;ACME	= 6	; 
+
+; ADCH - ADC Data Register High Byte
+ADCH0	= 0	; ADC Data Register High Byte Bit 0
+ADCH1	= 1	; ADC Data Register High Byte Bit 1
+ADCH2	= 2	; ADC Data Register High Byte Bit 2
+ADCH3	= 3	; ADC Data Register High Byte Bit 3
+ADCH4	= 4	; ADC Data Register High Byte Bit 4
+ADCH5	= 5	; ADC Data Register High Byte Bit 5
+ADCH6	= 6	; ADC Data Register High Byte Bit 6
+ADCH7	= 7	; ADC Data Register High Byte Bit 7
+
+; ADCL - ADC Data Register Low Byte
+ADCL0	= 0	; ADC Data Register Low Byte Bit 0
+ADCL1	= 1	; ADC Data Register Low Byte Bit 1
+ADCL2	= 2	; ADC Data Register Low Byte Bit 2
+ADCL3	= 3	; ADC Data Register Low Byte Bit 3
+ADCL4	= 4	; ADC Data Register Low Byte Bit 4
+ADCL5	= 5	; ADC Data Register Low Byte Bit 5
+ADCL6	= 6	; ADC Data Register Low Byte Bit 6
+ADCL7	= 7	; ADC Data Register Low Byte Bit 7
+
+; DIDR0 - Digital Input Disable Register
+ADC0D	= 0	; 
+ADC1D	= 1	; 
+ADC2D	= 2	; 
+ADC3D	= 3	; 
+ADC4D	= 4	; 
+ADC5D	= 5	; 
+ADC6D	= 6	; 
+ADC7D	= 7	; 
+
+
+; ***** JTAG *************************
+; OCDR - On-Chip Debug Related Register in I/O Memory
+OCDR0	= 0	; On-Chip Debug Register Bit 0
+OCDR1	= 1	; On-Chip Debug Register Bit 1
+OCDR2	= 2	; On-Chip Debug Register Bit 2
+OCDR3	= 3	; On-Chip Debug Register Bit 3
+OCDR4	= 4	; On-Chip Debug Register Bit 4
+OCDR5	= 5	; On-Chip Debug Register Bit 5
+OCDR6	= 6	; On-Chip Debug Register Bit 6
+OCDR7	= 7	; On-Chip Debug Register Bit 7
+IDRD	= OCDR7	; For compatibility
+
+; MCUCR - MCU Control Register
+JTD	= 7	; JTAG Interface Disable
+
+; MCUSR - MCU Status Register
+JTRF	= 4	; JTAG Reset Flag
+
+
+; ***** EEPROM ***********************
+; EEARH - EEPROM Address Register Low Byte
+EEAR8	= 0	; EEPROM Read/Write Access Bit 8
+EEAR9	= 1	; EEPROM Read/Write Access Bit 9
+EEAR10	= 2	; EEPROM Read/Write Access Bit 10
+EEAR11	= 3	; EEPROM Read/Write Access Bit 11
+
+; EEARL - EEPROM Address Register Low Byte
+EEAR0	= 0	; EEPROM Read/Write Access Bit 0
+EEAR1	= 1	; EEPROM Read/Write Access Bit 1
+EEAR2	= 2	; EEPROM Read/Write Access Bit 2
+EEAR3	= 3	; EEPROM Read/Write Access Bit 3
+EEAR4	= 4	; EEPROM Read/Write Access Bit 4
+EEAR5	= 5	; EEPROM Read/Write Access Bit 5
+EEAR6	= 6	; EEPROM Read/Write Access Bit 6
+EEAR7	= 7	; EEPROM Read/Write Access Bit 7
+
+; EEDR - EEPROM Data Register
+EEDR0	= 0	; EEPROM Data Register bit 0
+EEDR1	= 1	; EEPROM Data Register bit 1
+EEDR2	= 2	; EEPROM Data Register bit 2
+EEDR3	= 3	; EEPROM Data Register bit 3
+EEDR4	= 4	; EEPROM Data Register bit 4
+EEDR5	= 5	; EEPROM Data Register bit 5
+EEDR6	= 6	; EEPROM Data Register bit 6
+EEDR7	= 7	; EEPROM Data Register bit 7
+
+; EECR - EEPROM Control Register
+EERE	= 0	; EEPROM Read Enable
+EEPE	= 1	; EEPROM Write Enable
+EEMPE	= 2	; EEPROM Master Write Enable
+EERIE	= 3	; EEPROM Ready Interrupt Enable
+EEPM0	= 4	; EEPROM Programming Mode Bit 0
+EEPM1	= 5	; EEPROM Programming Mode Bit 1
+
+
+; ***** TWI **************************
+; TWAMR - TWI (Slave) Address Mask Register
+TWAM0	= 1	; 
+TWAMR0	= TWAM0	; For compatibility
+TWAM1	= 2	; 
+TWAMR1	= TWAM1	; For compatibility
+TWAM2	= 3	; 
+TWAMR2	= TWAM2	; For compatibility
+TWAM3	= 4	; 
+TWAMR3	= TWAM3	; For compatibility
+TWAM4	= 5	; 
+TWAMR4	= TWAM4	; For compatibility
+TWAM5	= 6	; 
+TWAMR5	= TWAM5	; For compatibility
+TWAM6	= 7	; 
+TWAMR6	= TWAM6	; For compatibility
+
+; TWBR - TWI Bit Rate register
+TWBR0	= 0	; 
+TWBR1	= 1	; 
+TWBR2	= 2	; 
+TWBR3	= 3	; 
+TWBR4	= 4	; 
+TWBR5	= 5	; 
+TWBR6	= 6	; 
+TWBR7	= 7	; 
+
+; TWCR - TWI Control Register
+TWIE	= 0	; TWI Interrupt Enable
+TWEN	= 2	; TWI Enable Bit
+TWWC	= 3	; TWI Write Collition Flag
+TWSTO	= 4	; TWI Stop Condition Bit
+TWSTA	= 5	; TWI Start Condition Bit
+TWEA	= 6	; TWI Enable Acknowledge Bit
+TWINT	= 7	; TWI Interrupt Flag
+
+; TWSR - TWI Status Register
+TWPS0	= 0	; TWI Prescaler
+TWPS1	= 1	; TWI Prescaler
+TWS3	= 3	; TWI Status
+TWS4	= 4	; TWI Status
+TWS5	= 5	; TWI Status
+TWS6	= 6	; TWI Status
+TWS7	= 7	; TWI Status
+
+; TWDR - TWI Data register
+TWD0	= 0	; TWI Data Register Bit 0
+TWD1	= 1	; TWI Data Register Bit 1
+TWD2	= 2	; TWI Data Register Bit 2
+TWD3	= 3	; TWI Data Register Bit 3
+TWD4	= 4	; TWI Data Register Bit 4
+TWD5	= 5	; TWI Data Register Bit 5
+TWD6	= 6	; TWI Data Register Bit 6
+TWD7	= 7	; TWI Data Register Bit 7
+
+; TWAR - TWI (Slave) Address register
+TWGCE	= 0	; TWI General Call Recognition Enable Bit
+TWA0	= 1	; TWI (Slave) Address register Bit 0
+TWA1	= 2	; TWI (Slave) Address register Bit 1
+TWA2	= 3	; TWI (Slave) Address register Bit 2
+TWA3	= 4	; TWI (Slave) Address register Bit 3
+TWA4	= 5	; TWI (Slave) Address register Bit 4
+TWA5	= 6	; TWI (Slave) Address register Bit 5
+TWA6	= 7	; TWI (Slave) Address register Bit 6
+
+
+; ***** USART1 ***********************
+; UDR1 - USART I/O Data Register
+UDR1_0	= 0	; USART I/O Data Register bit 0
+UDR1_1	= 1	; USART I/O Data Register bit 1
+UDR1_2	= 2	; USART I/O Data Register bit 2
+UDR1_3	= 3	; USART I/O Data Register bit 3
+UDR1_4	= 4	; USART I/O Data Register bit 4
+UDR1_5	= 5	; USART I/O Data Register bit 5
+UDR1_6	= 6	; USART I/O Data Register bit 6
+UDR1_7	= 7	; USART I/O Data Register bit 7
+
+; UCSR1A - USART Control and Status Register A
+MPCM1	= 0	; Multi-processor Communication Mode
+U2X1	= 1	; Double the USART transmission speed
+UPE1	= 2	; Parity Error
+DOR1	= 3	; Data overRun
+FE1	= 4	; Framing Error
+UDRE1	= 5	; USART Data Register Empty
+TXC1	= 6	; USART Transmitt Complete
+RXC1	= 7	; USART Receive Complete
+
+; UCSR1B - USART Control and Status Register B
+TXB81	= 0	; Transmit Data Bit 8
+RXB81	= 1	; Receive Data Bit 8
+UCSZ12	= 2	; Character Size
+TXEN1	= 3	; Transmitter Enable
+RXEN1	= 4	; Receiver Enable
+UDRIE1	= 5	; USART Data register Empty Interrupt Enable
+TXCIE1	= 6	; TX Complete Interrupt Enable
+RXCIE1	= 7	; RX Complete Interrupt Enable
+
+; UCSR1C - USART Control and Status Register C
+UCPOL1	= 0	; Clock Polarity
+UCSZ10	= 1	; Character Size
+UCPHA1	= UCSZ10	; For compatibility
+UCSZ11	= 2	; Character Size
+UDORD1	= UCSZ11	; For compatibility
+USBS1	= 3	; Stop Bit Select
+UPM10	= 4	; Parity Mode Bit 0
+UPM11	= 5	; Parity Mode Bit 1
+UMSEL10	= 6	; USART Mode Select
+UMSEL11	= 7	; USART Mode Select
+
+; UBRR1H - USART Baud Rate Register High Byte
+UBRR_8	= 0	; USART Baud Rate Register bit 8
+UBRR_9	= 1	; USART Baud Rate Register bit 9
+UBRR_10	= 2	; USART Baud Rate Register bit 10
+UBRR_11	= 3	; USART Baud Rate Register bit 11
+
+; UBRR1L - USART Baud Rate Register Low Byte
+UBRR_0	= 0	; USART Baud Rate Register bit 0
+UBRR_1	= 1	; USART Baud Rate Register bit 1
+UBRR_2	= 2	; USART Baud Rate Register bit 2
+UBRR_3	= 3	; USART Baud Rate Register bit 3
+UBRR_4	= 4	; USART Baud Rate Register bit 4
+UBRR_5	= 5	; USART Baud Rate Register bit 5
+UBRR_6	= 6	; USART Baud Rate Register bit 6
+UBRR_7	= 7	; USART Baud Rate Register bit 7
+
+
+; ***** SPI **************************
+; SPDR - SPI Data Register
+SPDR0	= 0	; SPI Data Register bit 0
+SPDR1	= 1	; SPI Data Register bit 1
+SPDR2	= 2	; SPI Data Register bit 2
+SPDR3	= 3	; SPI Data Register bit 3
+SPDR4	= 4	; SPI Data Register bit 4
+SPDR5	= 5	; SPI Data Register bit 5
+SPDR6	= 6	; SPI Data Register bit 6
+SPDR7	= 7	; SPI Data Register bit 7
+
+; SPSR - SPI Status Register
+SPI2X	= 0	; Double SPI Speed Bit
+WCOL	= 6	; Write Collision Flag
+SPIF	= 7	; SPI Interrupt Flag
+
+; SPCR - SPI Control Register
+SPR0	= 0	; SPI Clock Rate Select 0
+SPR1	= 1	; SPI Clock Rate Select 1
+CPHA	= 2	; Clock Phase
+CPOL	= 3	; Clock polarity
+MSTR	= 4	; Master/Slave Select
+DORD	= 5	; Data Order
+SPE	= 6	; SPI Enable
+SPIE	= 7	; SPI Interrupt Enable
+
+
+; ***** WATCHDOG *********************
+; WDTCSR - Watchdog Timer Control Register
+WDP0	= 0	; Watch Dog Timer Prescaler bit 0
+WDP1	= 1	; Watch Dog Timer Prescaler bit 1
+WDP2	= 2	; Watch Dog Timer Prescaler bit 2
+WDE	= 3	; Watch Dog Enable
+WDCE	= 4	; Watchdog Change Enable
+WDP3	= 5	; Watchdog Timer Prescaler Bit 3
+WDIE	= 6	; Watchdog Timeout Interrupt Enable
+WDIF	= 7	; Watchdog Timeout Interrupt Flag
+
+
+; ***** CPU **************************
+; SREG - Status Register
+SREG_C	= 0	; Carry Flag
+SREG_Z	= 1	; Zero Flag
+SREG_N	= 2	; Negative Flag
+SREG_V	= 3	; Two's Complement Overflow Flag
+SREG_S	= 4	; Sign Bit
+SREG_H	= 5	; Half Carry Flag
+SREG_T	= 6	; Bit Copy Storage
+SREG_I	= 7	; Global Interrupt Enable
+
+; MCUCR - MCU Control Register
+IVCE	= 0	; Interrupt Vector Change Enable
+IVSEL	= 1	; Interrupt Vector Select
+PUD	= 4	; Pull-up disable
+BODSE	= 5	; BOD Power Down in Sleep Enable
+BODS	= 6	; BOD Power Down in Sleep
+;JTD	= 7	; JTAG Interface Disable
+
+; MCUSR - MCU Status Register
+PORF	= 0	; Power-on reset flag
+EXTRF	= 1	; External Reset Flag
+BORF	= 2	; Brown-out Reset Flag
+WDRF	= 3	; Watchdog Reset Flag
+;JTRF	= 4	; JTAG Reset Flag
+
+; OSCCAL - Oscillator Calibration Value
+CAL0	= 0	; Oscillator Calibration Value Bit0
+CAL1	= 1	; Oscillator Calibration Value Bit1
+CAL2	= 2	; Oscillator Calibration Value Bit2
+CAL3	= 3	; Oscillator Calibration Value Bit3
+CAL4	= 4	; Oscillator Calibration Value Bit4
+CAL5	= 5	; Oscillator Calibration Value Bit5
+CAL6	= 6	; Oscillator Calibration Value Bit6
+CAL7	= 7	; Oscillator Calibration Value Bit7
+
+; CLKPR - 
+CLKPS0	= 0	; 
+CLKPS1	= 1	; 
+CLKPS2	= 2	; 
+CLKPS3	= 3	; 
+CLKPCE	= 7	; 
+
+; SMCR - Sleep Mode Control Register
+SE	= 0	; Sleep Enable
+SM0	= 1	; Sleep Mode Select bit 0
+SM1	= 2	; Sleep Mode Select bit 1
+SM2	= 3	; Sleep Mode Select bit 2
+
+; RAMPZ - RAM Page Z Select Register
+RAMPZ0	= 0	; RAM Page Z Select Register Bit 0
+
+; GPIOR2 - General Purpose IO Register 2
+GPIOR20	= 0	; General Purpose IO Register 2 bit 0
+GPIOR21	= 1	; General Purpose IO Register 2 bit 1
+GPIOR22	= 2	; General Purpose IO Register 2 bit 2
+GPIOR23	= 3	; General Purpose IO Register 2 bit 3
+GPIOR24	= 4	; General Purpose IO Register 2 bit 4
+GPIOR25	= 5	; General Purpose IO Register 2 bit 5
+GPIOR26	= 6	; General Purpose IO Register 2 bit 6
+GPIOR27	= 7	; General Purpose IO Register 2 bit 7
+
+; GPIOR1 - General Purpose IO Register 1
+GPIOR10	= 0	; General Purpose IO Register 1 bit 0
+GPIOR11	= 1	; General Purpose IO Register 1 bit 1
+GPIOR12	= 2	; General Purpose IO Register 1 bit 2
+GPIOR13	= 3	; General Purpose IO Register 1 bit 3
+GPIOR14	= 4	; General Purpose IO Register 1 bit 4
+GPIOR15	= 5	; General Purpose IO Register 1 bit 5
+GPIOR16	= 6	; General Purpose IO Register 1 bit 6
+GPIOR17	= 7	; General Purpose IO Register 1 bit 7
+
+; GPIOR0 - General Purpose IO Register 0
+GPIOR00	= 0	; General Purpose IO Register 0 bit 0
+GPIOR01	= 1	; General Purpose IO Register 0 bit 1
+GPIOR02	= 2	; General Purpose IO Register 0 bit 2
+GPIOR03	= 3	; General Purpose IO Register 0 bit 3
+GPIOR04	= 4	; General Purpose IO Register 0 bit 4
+GPIOR05	= 5	; General Purpose IO Register 0 bit 5
+GPIOR06	= 6	; General Purpose IO Register 0 bit 6
+GPIOR07	= 7	; General Purpose IO Register 0 bit 7
+
+; PRR0 - Power Reduction Register0
+PRADC	= 0	; Power Reduction ADC
+PRUSART0	= 1	; Power Reduction USART 0
+PRSPI	= 2	; Power Reduction Serial Peripheral Interface
+PRTIM1	= 3	; Power Reduction Timer/Counter1
+PRUSART1	= 4	; Power Reduction USART 1
+PRTIM0	= 5	; Power Reduction Timer/Counter0
+PRTIM2	= 6	; Power Reduction Timer/Counter2
+PRTWI	= 7	; Power Reduction TWI
+
+; PRR1 - Power Reduction Register1
+PRTIM3	= 0	; Power Reduction Timer/Counter3
\ No newline at end of file
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/README.TXT b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/README.TXT
new file mode 100644
index 00000000..966bb2c6
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/README.TXT
@@ -0,0 +1,30 @@
+Here are my SBC-2 Operating System Source Files.
+
+They include:
+
+sbc.asm   - The build file that includes all the other files in the proper order
+            (you would assemble this file with TASS)
+
+reset.asm - reset and IRQ initialization
+sbcos.asm - monitor & minassembler
+acia.asm - 65c51 init and IO support for monitor
+basic.asm - Enhanced Basic 2.22 (modified slightly from Lee's distribution)
+basldsv.asm - load and save routines for EHBASIC.
+upload.asm - XMODEM/CRC & Intel-Hex File Upload support
+
+Compiled using TASS using the following command line:
+TASS /c /lsbc.lbl sbc.asm sbc.bin sbcos.lst
+
+The compiler list output file from TASS is called:
+sbc25.lst
+
+The label file contains all the labels and their addresses and is called:
+sbc.lbl
+
+There is 1 compiled file included:
+sbc25.rom  -  the 32k raw binary object file (only the upper 20k are used)
+
+Good luck!
+
+Daryl
+
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/SBC.LBL b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/SBC.LBL
new file mode 100644
index 00000000..07667142
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/SBC.LBL
@@ -0,0 +1,3236 @@
+ack              = $06
+asm_txt4         = $eeb1
+asm_txt3         = $eea9
+asm_txt9         = $eeb9
+asm_txt2         = $ee97
+asm_txt1         = $ee96
+asm_relc3        = $ee86
+asm_txterr       = $ee8d
+asm_relc4        = $ee89
+asm_relc2        = $ee7a
+asm_relc1        = $ee74
+asm_relsub       = $ee5e
+asm_done         = $ee54
+asm_echol        = $ee3f
+asm_relcalc      = $ee6f
+asm_opcfnd1      = $ee1f
+asm_brelcalc     = $ee57
+asm_opcfnd0      = $ee18
+asm_srcha1       = $edf9
+asm_srcha0       = $edef
+asm_srchalt      = $ede5
+asm_opcfnd       = $ee03
+asm_srchnxt      = $edd6
+asm_opcsrch1     = $edc8
+asm_opcsrch      = $edc6
+asm_modefnd      = $edbb
+asm_modelst      = $f188
+asm_modes1       = $edb1
+asm_parse41      = $eda7
+asm_parse42      = $ed94
+asm_parse32      = $ed89
+asm_parse31      = $ed7e
+asm_parse04      = $ed8f
+asm_parse03      = $ed6d
+asm_parse02      = $ed60
+asm_parse01      = $ed51
+asm_txt          = $ee90
+asm_err1         = $edac
+asm_dw1          = $ed27
+asm_xtra2        = $ed40
+asm_save         = $ee4a
+asm_db1          = $ed0a
+asm_xtra1        = $ed1e
+asm_opnd1        = $ed47
+asm_modesrch     = $edaf
+asm_jmp1         = $ecf5
+asm_eol          = $ecf8
+asm_goodsp1      = $ecd1
+asm_goodsp2      = $ecf1
+asm_goodsp       = $ecc5
+asm_err2         = $ec98
+asm_goodop       = $ec9b
+asm_getnext      = $ec8f
+asm_opclp        = $ec6a
+asm_stripsp      = $ec54
+asm_op01         = $ec55
+asm_hop          = $ec45
+asm_list1        = $ec42
+asm_err          = $ec2c
+asm02            = $ec19
+asm_list         = $ec40
+asm_opfetch      = $ec47
+asm01            = $ec04
+asmhelp2         = $ebe6
+asmhelp1         = $ebe3
+asmhelp4         = $ebda
+asmhelp3         = $ebe9
+asmhelptxt       = $f6de
+asm_help         = $ebd0
+assembler        = $ebf0
+assem_init       = $ebc2
+abs_y_mode       = $eb63
+abs_x_mode       = $eb5e
+abs_mode         = $eb51
+acc              = $03e2
+addrptr_h        = $3b
+addrptr          = $3a
+aa_end_basic     = $e62e
+aspth            = $bb
+asptl            = $ba
+astrth           = $ab
+astrtl           = $aa
+adatah           = $a5
+adatal           = $a4
+asrch            = $5c
+again            = $18fd
+abs              = $1428
+abort            = $1390
+allot            = $0b40
+at               = $08ef
+andd             = $070e
+acia1_out1       = $a4f5
+acia1_scan2      = $a4f3
+acia1_output     = $a4f4
+acia1_scan       = $a4e7
+acia1_input      = $a4dc
+acia1_init       = $a483
+agnn             = $9f6e
+agnr             = $9f58
+addhist          = $a185
+adc7d            = $07
+adc6d            = $06
+adc5d            = $05
+adc4d            = $04
+adc3d            = $03
+adc2d            = $02
+adc1d            = $01
+adc0d            = $00
+adcl7            = $07
+adcl6            = $06
+adcl5            = $05
+adcl4            = $04
+adcl3            = $03
+adcl2            = $02
+adcl1            = $01
+adcl0            = $00
+adch7            = $07
+adch6            = $06
+adch5            = $05
+adch4            = $04
+adch3            = $03
+adch2            = $02
+adch1            = $01
+adch0            = $00
+adts2            = $02
+adts1            = $01
+adts0            = $00
+aden             = $07
+adsc             = $06
+adate            = $05
+adif             = $04
+adie             = $03
+adps2            = $02
+adps1            = $01
+adps0            = $00
+adlar            = $05
+as2              = $05
+ain1d            = $01
+ain0d            = $00
+acd              = $07
+acbg             = $06
+aco              = $05
+aci              = $04
+acie             = $03
+acic             = $02
+acis1            = $01
+acis0            = $00
+acme             = $06
+acsr             = $50
+adcl             = $78
+adch             = $79
+adcsra           = $7a
+adcsrb           = $7b
+admux            = $7c
+assr             = $b6
+brkcmd           = $ff75
+badcrc           = $fc9b
+begblk           = $fc45
+bflag            = $3f
+blkno            = $3c
+bbrel_mode       = $eb81
+byte_mode        = $eb17
+brk2             = $e824
+brkroutine       = $e80c
+backspace        = $e7b2
+brkvector        = $03f4
+buffer           = $0300
+bell             = $e7fe
+bsetup           = $e62e
+binferr          = $dc20
+bpntrh           = $c4
+bpntrl           = $c3
+btmph            = $bb
+btmpl            = $ba
+baslnh           = $ab
+baslnl           = $aa
+blineh           = $8a
+blinel           = $89
+bdigs            = $1994
+back             = $1852
+buffr            = $1600
+block            = $1648
+blank            = $0faa
+build            = $0db3
+base             = $0ae0
+blk              = $0a8b
+bscr             = $0a2b
+bbuf             = $0a1f
+bl               = $09f1
+binary           = $0719
+bump             = $04c8
+bran             = $049f
+bos              = $20
+bmag             = $0420
+banner           = $a399
+bishop           = $9f5f
+bestm            = $f9
+bestv            = $fa
+bestp            = $fb
+bmaxp            = $e6
+bmcc             = $e5
+bmaxc            = $e4
+bmob             = $e3
+bcap0            = $e2
+bcap1            = $e0
+bcap2            = $de
+bk               = $60
+board            = $50
+borf             = $02
+bods             = $06
+bodse            = $05
+blbset           = $03
+clr_regs         = $ff58
+copyblk4         = $fccd
+copyblk3         = $fcc2
+copyblk          = $fcc0
+calccrc          = $fc81
+crchi            = $fb00
+crclo            = $fa00
+crn              = $0d
+can              = $18
+chksum           = $38
+crch             = $39
+crc              = $38
+cr_cmd           = $e8db
+cmdjmptbl        = $ef1c
+cmdseccode       = $ef44
+cmdascii         = $ef08
+cmdcount         = $13
+ctrlc            = $dca8
+copyprng         = $dac0
+callexit         = $d386
+ccnull           = $0402
+ccbyte           = $0401
+ccflag           = $0400
+cptrh            = $bb
+cptrl            = $ba
+csidx            = $ba
+comp_f           = $9b
+cvarah           = $96
+cvaral           = $95
+cpntrh           = $8c
+cpntrl           = $8b
+clineh           = $88
+clinel           = $87
+cflag            = $63
+copyr2           = $bd85
+copyr1           = $bd7f
+copyrom          = $bd75
+count            = $0df5
+cfa              = $0c3a
+ccomm            = $0b5d
+csp              = $0afb
+csll             = $09fb
+comma            = $0b4c
+const            = $097e
+comp             = $0d12
+creat            = $11a9
+con              = $0abe
+curr             = $0acb
+colon            = $0938
+cstor            = $092b
+cat              = $0904
+cmove            = $0666
+cr               = $065c
+clit             = $0464
+cold             = $13b8
+cbrk2            = $a514
+cbrk             = $a50a
+crout            = $a501
+cscan            = $a4e7
+chroutvect       = $03f1
+chrinvect        = $03eb
+cin              = $a4dc
+cph              = $a405
+cpl              = $a3d5
+cout             = $a4f4
+ckmate           = $a091
+check            = $a071
+chkchk           = $a00f
+clear            = $9f1d
+cldsp            = $9e43
+chess            = $9e06
+cc               = $e5
+clkpce           = $07
+clkps3           = $03
+clkps2           = $02
+clkps1           = $01
+clkps0           = $00
+cal7             = $07
+cal6             = $06
+cal5             = $05
+cal4             = $04
+cal3             = $03
+cal2             = $02
+cal1             = $01
+cal0             = $00
+cpol             = $03
+cpha             = $02
+cs32             = $02
+cs31             = $01
+cs30             = $00
+com3a1           = $07
+com3a0           = $06
+com3b1           = $05
+com3b0           = $04
+cs22             = $02
+cs21             = $01
+cs20             = $00
+com2a1           = $07
+com2a0           = $06
+com2b1           = $05
+com2b0           = $04
+ctc1             = $03
+cs12             = $02
+cs11             = $01
+cs10             = $00
+com1a1           = $07
+com1a0           = $06
+com1b1           = $05
+com1b0           = $04
+cs02             = $02
+cs01             = $01
+cs00             = $00
+com0a1           = $07
+com0a0           = $06
+com0b1           = $05
+com0b0           = $04
+clkpr            = $61
+done             = $fcdc
+dlfail           = $3e
+dest_cmd         = $ea16
+dot_cmd          = $e8d0
+delay1           = $e804
+delay            = $e803
+dokeh            = $d348
+deekh            = $d325
+docmp            = $c447
+dorest           = $c439
+decssp1          = $f0
+decss            = $ef
+des_ph           = $af
+des_pl           = $ae
+des_2h           = $9f
+des_2l           = $9e
+dptrh            = $90
+dptrl            = $8f
+dlineh           = $8e
+dlinel           = $8d
+dims_h           = $77
+dims_l           = $76
+des_sk           = $68
+dtypef           = $5f
+defdim           = $5e
+dimcnt           = $5d
+dotr             = $1a43
+ddot             = $1a34
+ddotr            = $1a11
+digs             = $19f9
+dig              = $19d1
+dbcd             = $1788
+dot              = $1a53
+dline            = $16cb
+dabs             = $1437
+dpm              = $1416
+dr0              = $15db
+defin            = $1341
+dovoc            = $1319
+dlit             = $1251
+dfind            = $1100
+dtrai            = $0e36
+dodoe            = $0dcf
+does             = $0dc3
+decim            = $0d70
+ddup             = $0be0
+dpl              = $0ae9
+dp               = $0a74
+douse            = $09bd
+dovar            = $09a4
+docon            = $0988
+docol            = $094c
+dup              = $08b0
+drop             = $088f
+dminu            = $0867
+dplus            = $0828
+digit            = $0569
+darea            = $3a60
+drol             = $a111
+dismv            = $a10f
+disp             = $9f07
+dis3             = $f9
+dis2             = $fa
+dis1             = $fb
+dord             = $05
+dor1             = $03
+ddd7             = $07
+ddd6             = $06
+ddd5             = $05
+ddd4             = $04
+ddd3             = $03
+ddd2             = $02
+ddd1             = $01
+ddd0             = $00
+ddc7             = $07
+ddc6             = $06
+ddc5             = $05
+ddc4             = $04
+ddc3             = $03
+ddc2             = $02
+ddc1             = $01
+ddc0             = $00
+ddb7             = $07
+ddb6             = $06
+ddb5             = $05
+ddb4             = $04
+ddb3             = $03
+ddb2             = $02
+ddb1             = $01
+ddb0             = $00
+dda7             = $07
+dda6             = $06
+dda5             = $05
+dda4             = $04
+dda3             = $03
+dda2             = $02
+dda1             = $01
+dda0             = $00
+dor0             = $03
+ddra             = $21
+ddrb             = $24
+ddrc             = $27
+ddrd             = $2a
+didr0            = $7e
+didr1            = $7f
+esc              = $1b
+eot              = $04
+eeprom_wr1       = $e9ee
+eeprom_wr        = $e9de
+eeprom_test      = $e9d6
+exe1             = $e8cd
+excute_cmd       = $e8c4
+err_ld           = $e5d7
+err_uf           = $e5c4
+err_cn           = $e5b5
+err_st           = $e5a2
+err_ls           = $e592
+err_tm           = $e584
+err_id           = $e575
+err_d0           = $e566
+err_dd           = $e555
+err_bs           = $e548
+err_us           = $e534
+err_om           = $e526
+err_ov           = $e51d
+err_fc           = $e50f
+err_od           = $e503
+err_rg           = $e4ee
+err_sn           = $e4e7
+err_nf           = $e4d6
+endbhs           = $dbfe
+endtab           = $df2a
+expneg           = $ab
+expcnt           = $a9
+ememh            = $86
+ememl            = $85
+earryh           = $80
+earryl           = $7f
+edigs            = $19a3
+endif            = $1876
+erase            = $0f99
+expec            = $0eb4
+error            = $1140
+equal            = $0b79
+endd             = $0703
+emit             = $063f
+encl             = $0600
+exec             = $0487
+enter            = $0400
+end              = $a0db
+etc              = $9fcd
+eloop            = $9e8b
+extrf            = $01
+eepm1            = $05
+eepm0            = $04
+eerie            = $03
+eempe            = $02
+eepe             = $01
+eere             = $00
+eedr7            = $07
+eedr6            = $06
+eedr5            = $05
+eedr4            = $04
+eedr3            = $03
+eedr2            = $02
+eedr1            = $01
+eedr0            = $00
+eear7            = $07
+eear6            = $06
+eear5            = $05
+eear4            = $04
+eear3            = $03
+eear2            = $02
+eear1            = $01
+eear0            = $00
+eear11           = $03
+eear10           = $02
+eear9            = $01
+eear8            = $00
+exclk            = $06
+eifr             = $3c
+eimsk            = $3d
+eecr             = $3f
+eedr             = $40
+eearl            = $41
+eearh            = $42
+eicra            = $69
+flush1           = $fd44
+flush            = $fd40
+fcerror          = $dba9
+fac1_r           = $b9
+fac_sc           = $b8
+fac2_s           = $b7
+fac2_3           = $b6
+fac2_2           = $b5
+fac2_1           = $b4
+fac2_e           = $b3
+fac1_o           = $b2
+fac1_s           = $b0
+fac1_3           = $af
+fac1_2           = $ae
+fac1_1           = $ad
+fac1_e           = $ac
+fvar_h           = $ab
+fvar_l           = $aa
+fac2_r           = $a3
+fnxjph           = $a3
+fnxjpl           = $a2
+fnxjmp           = $a1
+func_h           = $9d
+func_l           = $9c
+frnxth           = $98
+frnxtl           = $97
+fact_3           = $77
+fact_2           = $76
+fact_1           = $75
+forg             = $17e7
+forth            = $1329
+fill             = $0f79
+fld              = $0af2
+fence            = $0a6c
+first            = $0a07
+founx            = $9ee9
+foun             = $9e93
+fe1              = $04
+foc3a            = $07
+foc3b            = $06
+foc2a            = $07
+foc2b            = $06
+foc1a            = $07
+foc1b            = $06
+foc0a            = $07
+foc0b            = $06
+fe0              = $04
+getnibl          = $fe20
+gserxit          = $fe12
+gethex           = $fe13
+getser           = $fe0a
+getbyte1         = $fcfb
+goodcrc          = $fca6
+goodblk2         = $fc7f
+goodblk1         = $fc6c
+getblk2          = $fc50
+getblk1          = $fc4b
+getblk           = $fc47
+gotbyte1         = $fc3e
+gotbyte3         = $fc33
+gotbyte          = $fc2e
+getbyte          = $fce9
+grts             = $e80b
+gopr3            = $dc0b
+gopr             = $dc0c
+gopr1            = $dc0d
+gopr2            = $dc18
+getpair          = $cb9f
+getfirst         = $cae2
+g_indx           = $a2
+g_step           = $a0
+garb_h           = $9d
+garb_l           = $9c
+gclctd           = $60
+great            = $0baf
+genr2            = $a042
+gnm              = $9f22
+gnmx             = $9f1b
+genrm            = $a03f
+gnmz             = $9f19
+go               = $a0bf
+gpior07          = $07
+gpior06          = $06
+gpior05          = $05
+gpior04          = $04
+gpior03          = $03
+gpior02          = $02
+gpior01          = $01
+gpior00          = $00
+gpior17          = $07
+gpior16          = $06
+gpior15          = $05
+gpior14          = $04
+gpior13          = $03
+gpior12          = $02
+gpior11          = $01
+gpior10          = $00
+gpior27          = $07
+gpior26          = $06
+gpior25          = $05
+gpior24          = $04
+gpior23          = $03
+gpior22          = $02
+gpior21          = $01
+gpior20          = $00
+gpior0           = $3e
+gtccr            = $43
+gpior1           = $4a
+gpior2           = $4b
+hdernx           = $fe09
+hderok           = $fdff
+hder3            = $fdf4
+hder2            = $fde5
+hddlf1           = $fdbc
+hdlp1            = $fd9e
+hder1            = $fdc6
+hdwrecs          = $fd6a
+hexupld          = $fd5a
+help_cmd2        = $e8ab
+help_cmd1        = $e8a8
+help_cmd4        = $e89f
+help_cmd3        = $e8ae
+helptxt          = $f276
+help_cmd         = $e895
+hexdigdata       = $eef8
+hexdigits_h      = $3d
+hexdigits        = $3c
+hexdigcnt        = $35
+histrh           = $ab
+histrl           = $aa
+hold             = $0fb9
+hex              = $0d5b
+here             = $0b30
+hld              = $0b0c
+hist4            = $1900
+hist3            = $1800
+hist2            = $1700
+hist1            = $1600
+hist             = $fd
+interrupt        = $ff66
+intret           = $ff65
+ihex             = $fd71
+incblk           = $fcd2
+implied_mode     = $eb7b
+indabsx_mode     = $eb70
+indabs_mode      = $eb68
+indzp_y_mode     = $eb4c
+indzp_x_mode     = $eb41
+ind1_mode        = $eb3c
+ind0_mode        = $eb7c
+indzp_mode       = $eb36
+imm_mode         = $eb0b
+insert_2         = $e99e
+insert_1         = $e996
+insert_0         = $e988
+insert_3         = $e9ae
+insert_cmd       = $e96c
+inc_addr1        = $e96b
+inc_addrptr      = $e965
+inputsave1       = $e7e0
+inputtoolong     = $e7ec
+inputdone        = $e7eb
+inputsave        = $e7da
+inputwait        = $e796
+input_assem      = $e785
+intvector        = $03fa
+input1           = $e78c
+input            = $e788
+input_chr        = $e7f5
+inget            = $dd00
+increrr          = $c5b1
+ibuffe           = $0454
+ibuffs           = $040d
+irqbase          = $df
+imode            = $62
+ibptr            = $5d
+itemph           = $12
+itempl           = $11
+iclim            = $10
+if               = $192d
+inter            = $1293
+iddot            = $1175
+in               = $0a93
+i                = $055f
+inch             = $a4dc
+ip               = $af
+illegal          = $a033
+ill              = $9fc5
+ill1             = $9faf
+inchek           = $b4
+ivsel            = $01
+ivce             = $00
+idrd             = $07
+intf2            = $02
+intf1            = $01
+intf0            = $00
+int2             = $02
+int1             = $01
+int0             = $00
+isc21            = $05
+isc20            = $04
+isc11            = $03
+isc10            = $02
+isc01            = $01
+isc00            = $00
+icnc3            = $07
+ices3            = $06
+icf3             = $05
+icie3            = $05
+icnc1            = $07
+ices1            = $06
+icf1             = $05
+icie1            = $05
+icr1h            = $87
+icr1l            = $86
+icr3h            = $97
+icr3l            = $96
+jmp_input1       = $e6f1
+jmp_input        = $e6ee
+jmp_out          = $e6eb
+jmp_inp          = $e6e8
+jmp_scan         = $e6e5
+jmp_delay        = $e6e2
+jmp_bell         = $e6df
+jmp_wrd          = $e6dc
+jmp_byte         = $e6d9
+jmp_nib          = $e6d6
+jmp_xsp          = $e6d3
+jmp_2sp          = $e6d0
+jmp_1sp          = $e6cd
+jmp_cr           = $e6ca
+janus            = $9e6d
+jtrf             = $04
+jtd              = $07
+key              = $0647
+king             = $9f46
+knight           = $9f6a
+kin              = $a2ad
+lf               = $0a
+list13           = $eb04
+list12           = $eb01
+list11           = $ead8
+list10           = $eac2
+list9            = $eac0
+list7            = $eab4
+list8            = $eab6
+list6            = $eaad
+list5            = $ea9e
+list4            = $ea9c
+list3            = $ea75
+list_one         = $ea76
+list2            = $ea5c
+list1            = $ea58
+list_line        = $ea64
+list_done        = $ea4b
+list_range       = $ea2b
+list_cmd_1       = $ea4c
+list_cmd         = $ea1f
+linecnt          = $33
+lbb_width        = $e30e
+lbb_while        = $e309
+lbb_wait         = $e305
+lbb_vptr         = $e2fd
+lbb_val          = $e2f9
+lbb_usr          = $e2f4
+lbb_until        = $e2ef
+lbb_ucases       = $e2e8
+lbb_twopi        = $e2e2
+lbb_to           = $e2e0
+lbb_then         = $e2dc
+lbb_tan          = $e2d8
+lbb_tab          = $e2d4
+lbb_sys          = $e2d0
+lbb_swap         = $e2cc
+lbb_strs         = $e2c7
+lbb_stop         = $e2c3
+lbb_step         = $e2bf
+lbb_sqr          = $e2bb
+lbb_spc          = $e2b7
+lbb_sin          = $e2b3
+lbb_sgn          = $e2af
+lbb_save         = $e2ab
+lbb_sadd         = $e2a6
+lbb_run          = $e2a2
+lbb_rnd          = $e29e
+lbb_rights       = $e297
+lbb_return       = $e291
+lbb_retnmi       = $e28b
+lbb_retirq       = $e285
+lbb_restore      = $e27e
+lbb_rem          = $e27b
+lbb_read         = $e277
+lbb_print        = $e271
+lbb_pos          = $e26d
+lbb_poke         = $e269
+lbb_pi           = $e267
+lbb_peek         = $e262
+lbb_or           = $e25f
+lbb_on           = $e25d
+lbb_off          = $e25a
+lbb_null         = $e255
+lbb_not          = $e252
+lbb_nmi          = $e24f
+lbb_next         = $e24b
+lbb_new          = $e248
+lbb_min          = $e243
+lbb_mids         = $e23e
+lbb_max          = $e23a
+lbb_loop         = $e235
+lbb_log          = $e231
+lbb_load         = $e22d
+lbb_list         = $e229
+lbb_let          = $e226
+lbb_len          = $e222
+lbb_lefts        = $e21c
+lbb_lcases       = $e215
+lbb_irq          = $e211
+lbb_int          = $e20d
+lbb_input        = $e208
+lbb_inc          = $e205
+lbb_if           = $e203
+lbb_hexs         = $e1fd
+lbb_goto         = $e1f8
+lbb_gosub        = $e1f3
+lbb_get          = $e1f0
+lbb_fre          = $e1eb
+lbb_for          = $e1e8
+lbb_fn           = $e1e6
+lbb_exp          = $e1e1
+lbb_eor          = $e1de
+lbb_end          = $e1db
+lbb_else         = $e1d7
+lbb_do           = $e1d4
+lbb_doke         = $e1d0
+lbb_dim          = $e1cd
+lbb_def          = $e1ca
+lbb_deek         = $e1c5
+lbb_dec          = $e1c2
+lbb_data         = $e1be
+lbb_cos          = $e1b9
+lbb_cont         = $e1b5
+lbb_clear        = $e1b0
+lbb_chrs         = $e1ab
+lbb_call         = $e1a7
+lbb_bittst       = $e19f
+lbb_bitset       = $e199
+lbb_bitclr       = $e193
+lbb_bins         = $e18e
+lbb_atn          = $e189
+lbb_asc          = $e185
+lbb_and          = $e182
+lbb_abs          = $e17e
+lbb_rshift       = $e178
+lbb_lshift       = $e172
+lab_2d05         = $df16
+lab_2cf4         = $df01
+lab_twopi        = $dee3
+lab_pi           = $ded9
+lab_varptr       = $dec9
+lab_sqns         = $deb9
+lab_sqe1         = $de5e
+lab_sqe2         = $de6c
+lab_sqr          = $de3c
+lab_nosq         = $de38
+lab_wdlp         = $de26
+lab_sulp         = $de25
+lab_svtb         = $de19
+lab_nstt         = $ddfa
+lab_tbsz         = $de05
+lab_wdth         = $dde6
+lab_mmse         = $ddae
+lab_mmec         = $dda5
+lab_min          = $dd93
+lab_phfa         = $ddb1
+lab_max          = $dd83
+lab_mmpp         = $dd7d
+lab_retnmi       = $dd71
+lab_retirq       = $dd65
+lab_irts         = $dd64
+lab_lfnd         = $dd52
+lab_inex         = $dd33
+lab_ioff         = $dd28
+lab_inon         = $dd2e
+lab_fb96         = $dd13
+lab_fb95         = $dd0e
+lab_crts         = $dccf
+lab_ckin         = $dcd0
+lab_fba0         = $dcbd
+lab_fba2         = $dcc5
+lab_mlbt         = $dc96
+lab_nxch         = $dc8b
+lab_mlto         = $dc88
+lab_exch         = $dca5
+lab_ishn         = $dc7d
+lab_mlte         = $dc68
+lab_nlto         = $dc64
+lab_al2x         = $dc5c
+lab_a2hx         = $dc51
+lab_hexs         = $dc23
+lab_bins         = $dbd4
+lab_nott         = $dbd1
+lab_btst         = $dbac
+lab_bitclr       = $db96
+lab_bitset       = $db82
+lab_2d04         = $db95
+lab_2cc2         = $db7c
+lab_2cc9         = $dfbf
+lab_2caf         = $db69
+lab_2ca1         = $db5b
+lab_atn          = $db53
+lab_usr          = $db4d
+lab_2c74         = $db49
+lab_tan          = $db21
+lab_2c84         = $dfaa
+lab_2c45         = $db1a
+lab_2c38         = $db0d
+lab_2c35         = $db0a
+lab_2c80         = $dfed
+lab_2c7c         = $dfbb
+lab_sin          = $dad8
+lab_2c78         = $dfa6
+lab_cos          = $dad1
+loopprn          = $daac
+lab_rnd          = $da9d
+lab_2ba8         = $da8d
+lab_2b9b         = $da80
+lab_2b97         = $da7c
+lab_2b88         = $da6b
+lab_2b84         = $da67
+lab_2afe         = $df89
+lab_2b49         = $da2d
+lab_2b36         = $da1a
+lab_2b39         = $da1d
+lab_2b2b         = $da0f
+lab_2afa         = $df85
+lab_2af9         = $d9fe
+lab_2ad9         = $d9de
+lab_2abf         = $d9c4
+lab_exp          = $d9ff
+lab_power        = $d9bb
+lab_2a91         = $d9b6
+lab_2a74         = $d999
+lab_2a68         = $d98d
+lab_2a8c         = $d9b1
+lab_2a58         = $d97d
+lab_2a4b         = $d970
+lab_2a3b         = $d960
+lab_2a21         = $d946
+lab_2a1a         = $d93f
+lab_2a18         = $d93d
+lab_2a9a         = $dff5
+lab_2a9b         = $dff6
+lab_2a9c         = $dff7
+lab_29fb         = $d920
+lab_29f5         = $d91a
+lab_29f7         = $d91c
+lab_29e4         = $d909
+lab_29d9         = $d8fe
+lab_29d8         = $d8fd
+lab_29c0         = $d8e5
+lab_29b2         = $d8d7
+lab_2947         = $df79
+lab_29a7         = $d8cc
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+lab_1280         = $bf6a
+lab_1357         = $c04d
+lab_127d         = $bf67
+lab_rmsg         = $e600
+lab_2953         = $d877
+lab_1269         = $bf4f
+lab_emsg         = $e5ef
+lab_1491         = $c189
+lab_baer         = $e4b2
+lab_xerr         = $bf3c
+lab_1238         = $bf24
+lab_garb         = $cfdf
+lab_122d         = $bf19
+lab_1229         = $bf15
+lab_124b         = $bf39
+lab_omer         = $bf3a
+lab_1212         = $bf03
+lab_11ff         = $bef0
+lab_1203         = $bef4
+lab_11f3         = $bee3
+lab_120a         = $befb
+lab_11d6         = $bec8
+lab_121f         = $bf0b
+lab_11cf         = $bec1
+lab_1274         = $bf5a
+lab_smsg         = $df39
+lab_295e         = $d882
+lab_1463         = $c150
+lab_2e05         = $be9c
+lab_f2fu         = $d2f7
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+lab_2db6         = $be7f
+lab_2d99         = $be62
+lab_2d93         = $be56
+lab_2daa         = $be73
+lab_inln         = $c040
+lab_18c3         = $c6d3
+lab_mszm         = $df2a
+lab_crlf         = $c692
+lab_gmem         = $be1e
+lab_2d4e         = $be16
+lab_2cee         = $defb
+lab_2d13         = $be02
+lab_cold         = $be00
+lab_skff         = $01ff
+lab_skfe         = $01fe
+lab_stak         = $0100
+lab_gbyt         = $c2
+lab_igby         = $bc
+lvarph           = $98
+lvarpl           = $97
+last_sh          = $67
+last_sl          = $66
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+l2804            = $1664
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+l2835            = $15a9
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+l2508            = $143f
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+msgunknownrectype= $fe97
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+numbit           = $a8
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+nbendl           = $a4
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+nums_1           = $11
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+number           = $10aa
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+n                = $a7
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+opcode_list      = $eebe
+opctxtdata       = $f198
+opcaddmode       = $f058
+opctxtidx        = $ef58
+opctxtptr        = $36
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+ocr3al5          = $05
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+ocr2a_3          = $03
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+ocie1b           = $02
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+ocr0b_7          = $07
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+ocr0b_5          = $05
+ocr0b_4          = $04
+ocr0b_3          = $03
+ocr0b_2          = $02
+ocr0b_1          = $01
+ocr0b_0          = $00
+ocr0a_7          = $07
+ocr0a_6          = $06
+ocr0a_5          = $05
+ocr0a_4          = $04
+ocr0a_3          = $03
+ocr0a_2          = $02
+ocr0a_1          = $01
+ocr0a_0          = $00
+ocf0b            = $02
+ocf0a            = $01
+ocie0b           = $02
+ocie0a           = $01
+ocr0a            = $47
+ocr0b            = $48
+ocdr             = $51
+osccal           = $66
+ocr1ah           = $89
+ocr1al           = $88
+ocr1bh           = $8b
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+ocr3ah           = $99
+ocr3al           = $98
+ocr3bh           = $9b
+ocr3bl           = $9a
+ocr2a            = $b3
+ocr2b            = $b4
+printstraxx1     = $fe42
+printstraxl1     = $fe38
+prtmsg2          = $fd0a
+prtmsg1          = $fcfe
+printstrax       = $fe30
+prtmsg           = $fcfc
+ptrh             = $3b
+ptr              = $3a
+porttxt          = $f89c
+portreadymsg     = $e8ba
+parsehex07       = $e88c
+parsehex04       = $e87b
+parsehex03       = $e878
+parsehex05       = $e886
+parsehexdig      = $e874
+printxsp1        = $e774
+printreg5        = $e748
+printreg4        = $e741
+printreg3        = $e73b
+printreg2        = $e72a
+printreg1        = $e71f
+printreg         = $e718
+preg             = $03e6
+pcl              = $03e1
+pch              = $03e0
+prompt           = $32
+printdig         = $e769
+printxsp         = $e778
+print2sp         = $e77d
+print1sp         = $e780
+pscan2           = $e6b9
+pscan1           = $e6a0
+print_cr         = $e74f
+print2byte       = $e75c
+pscan            = $e698
+pg2_tabs         = $def6
+pg2_tabe         = $defb
+plus_3           = $03
+plus_2           = $02
+plus_1           = $01
+plus_0           = $00
+prstk            = $99
+pline            = $16a9
+pbuf             = $154b
+prev             = $1540
+pm               = $1404
+pabor            = $1132
+pnumb            = $105f
+pad              = $0fd1
+pdotq            = $0e69
+pfa              = $0c5d
+porig            = $0a39
+pscod            = $0d85
+pstor            = $08bf
+plus             = $080f
+pushoa           = $0752
+pfind            = $059a
+pop              = $0556
+poptwo           = $0554
+pdo              = $0546
+pploo            = $050f
+pl2              = $04f9
+pl1              = $04ec
+ploop            = $04df
+put              = $043f
+push             = $043d
+pload            = $e682
+psave            = $e659
+pout15           = $a2ac
+pout14           = $a2a1
+pout11           = $a288
+print1byte       = $e760
+pout77           = $a254
+pout7            = $a24c
+pout6            = $a240
+pout42           = $a22f
+pout41           = $a22c
+pout8            = $a25f
+pout12           = $a298
+pout3            = $a204
+pout25           = $a1fc
+pout4            = $a223
+pout2            = $a1de
+pout1            = $a1d7
+pout5            = $a23a
+pout10           = $a286
+pout13           = $a29f
+pout9            = $a27b
+posn             = $a17f
+pos              = $a13f
+p3               = $9f92
+p2               = $9f87
+p1               = $9f7d
+pawn             = $9f79
+points           = $a457
+pout             = $a1c1
+pcp              = $f2
+pcc              = $f1
+pmaxc            = $f0
+pmob             = $ef
+pcap             = $e6
+piece            = $b0
+prtim3           = $00
+prtwi            = $07
+prtim2           = $06
+prtim0           = $05
+prusart1         = $04
+prtim1           = $03
+prspi            = $02
+prusart0         = $01
+pradc            = $00
+porf             = $00
+pud              = $04
+pcint7           = $07
+pcint6           = $06
+pcint5           = $05
+pcint4           = $04
+pcint3           = $03
+pcint2           = $02
+pcint1           = $01
+pcint0           = $00
+pcint15          = $07
+pcint14          = $06
+pcint13          = $05
+pcint12          = $04
+pcint11          = $03
+pcint10          = $02
+pcint9           = $01
+pcint8           = $00
+pcint23          = $07
+pcint22          = $06
+pcint21          = $05
+pcint20          = $04
+pcint19          = $03
+pcint18          = $02
+pcint17          = $01
+pcint16          = $00
+pcint31          = $07
+pcint30          = $06
+pcint29          = $05
+pcint28          = $04
+pcint27          = $03
+pcint26          = $02
+pcint25          = $01
+pcint24          = $00
+pcif3            = $03
+pcif2            = $02
+pcif1            = $01
+pcif0            = $00
+pcie3            = $03
+pcie2            = $02
+pcie1            = $01
+pcie0            = $00
+pgwrt            = $02
+pgers            = $01
+psr2             = $01
+psrasy           = $01
+pwm11            = $01
+pwm10            = $00
+psr10            = $00
+psrsync          = $00
+pind7            = $07
+pind6            = $06
+pind5            = $05
+pind4            = $04
+pind3            = $03
+pind2            = $02
+pind1            = $01
+pind0            = $00
+pd7              = $07
+portd7           = $07
+pd6              = $06
+portd6           = $06
+pd5              = $05
+portd5           = $05
+pd4              = $04
+portd4           = $04
+pd3              = $03
+portd3           = $03
+pd2              = $02
+portd2           = $02
+pd1              = $01
+portd1           = $01
+pd0              = $00
+portd0           = $00
+pinc7            = $07
+pinc6            = $06
+pinc5            = $05
+pinc4            = $04
+pinc3            = $03
+pinc2            = $02
+pinc1            = $01
+pinc0            = $00
+pc7              = $07
+portc7           = $07
+pc6              = $06
+portc6           = $06
+pc5              = $05
+portc5           = $05
+pc4              = $04
+portc4           = $04
+pc3              = $03
+portc3           = $03
+pc2              = $02
+portc2           = $02
+pc1              = $01
+portc1           = $01
+pc0              = $00
+portc0           = $00
+pinb7            = $07
+pinb6            = $06
+pinb5            = $05
+pinb4            = $04
+pinb3            = $03
+pinb2            = $02
+pinb1            = $01
+pinb0            = $00
+pb7              = $07
+portb7           = $07
+pb6              = $06
+portb6           = $06
+pb5              = $05
+portb5           = $05
+pb4              = $04
+portb4           = $04
+pb3              = $03
+portb3           = $03
+pb2              = $02
+portb2           = $02
+pb1              = $01
+portb1           = $01
+pb0              = $00
+portb0           = $00
+pina7            = $07
+pina6            = $06
+pina5            = $05
+pina4            = $04
+pina3            = $03
+pina2            = $02
+pina1            = $01
+pina0            = $00
+pa7              = $07
+porta7           = $07
+pa6              = $06
+porta6           = $06
+pa5              = $05
+porta5           = $05
+pa4              = $04
+porta4           = $04
+pa3              = $03
+porta3           = $03
+pa2              = $02
+porta2           = $02
+pa1              = $01
+porta1           = $01
+pa0              = $00
+porta0           = $00
+pina             = $20
+porta            = $22
+pinb             = $23
+portb            = $25
+pinc             = $26
+portc            = $28
+pind             = $29
+portd            = $2b
+pcifr            = $3b
+prr0             = $64
+prr1             = $65
+pcicr            = $68
+pcmsk0           = $6b
+pcmsk1           = $6c
+pcmsk2           = $6d
+pcmsk3           = $73
+ques             = $1a5f
+qstac            = $126c
+quit             = $1361
+query            = $0f23
+qload            = $0cf9
+qpair            = $0ccb
+qcomp            = $0c9e
+qerr             = $0c84
+qcsp             = $0cdd
+qexec            = $0cb5
+qterm            = $0655
+queen            = $9f4d
+rrts             = $ff7a
+reset            = $ff00
+rbuff            = $0300
+rectype          = $3d
+reclen           = $39
+retry2           = $3e
+retry            = $3d
+rel_mode1        = $ebbd
+rel_mode         = $eb9c
+rel_mode0        = $ebac
+regdata          = $e6f4
+rs_loop          = $cb8e
+ram_top          = $3f00
+ram_base         = $0500
+rbyte3           = $db
+rbyte2           = $da
+rbyte1           = $d9
+rbyte4           = $d8
+rdptrh           = $92
+rdptrl           = $91
+rsw              = $17a0
+rot              = $0bbd
+rnum             = $0b03
+rbrac            = $0d36
+rfrom            = $07c2
+rpsto            = $076e
+r                = $07d3
+reentr           = $0404
+retp             = $a0ba
+retv             = $a0a6
+rum              = $a048
+retl             = $a02f
+rook             = $9f54
+retj             = $9ed8
+resvector        = $03f7
+reverse          = $9fcb
+rev              = $b7
+rampz0           = $00
+rxcie1           = $07
+rxen1            = $04
+rxb81            = $01
+rxc1             = $07
+refs1            = $07
+refs0            = $06
+rwwsb            = $06
+rwwsre           = $04
+rxcie0           = $07
+rxen0            = $04
+rxb80            = $01
+rxc0             = $07
+rampz            = $5b
+set_vectors      = $ff05
+startcrclp       = $fced
+startblk         = $fc1f
+startcrc         = $fc09
+soh              = $01
+strptrh          = $41
+strptr           = $40
+start_hi         = $3c
+start_lo         = $3b
+sp_cmd44         = $e939
+sp_brk           = $e947
+sp_cmd4          = $e92b
+sp_cmd33         = $e921
+sp_cmd3          = $e912
+sp_cmd1          = $e8fd
+sp_cmd5          = $e949
+sp_cmd2          = $e902
+sp_cmd           = $e8eb
+sptr             = $03e5
+startaddr_h      = $39
+startaddr        = $38
+scan_input       = $e7f8
+start_os         = $e6c7
+sysjmp           = $e83e
+s_bitc           = $db9f
+s_bits           = $db8c
+swaplp           = $d366
+swaperr          = $d374
+strtab           = $df17
+sendh            = $bb
+sendl            = $ba
+sdescr           = $b8
+ssptr_h          = $b9
+ssptr_l          = $b8
+str_ph           = $ae
+str_pl           = $ad
+str_ln           = $ac
+sutilh           = $84
+sutill           = $83
+sstorh           = $82
+sstorl           = $81
+sarryh           = $7e
+sarryl           = $7d
+svarh            = $7c
+svarl            = $7b
+smemh            = $7a
+smeml            = $79
+sufnxf           = $61
+scnquo           = $5c
+srchc            = $5b
+sign             = $19bc
+spacs            = $1977
+sslas            = $1507
+ssmod            = $14f6
+slash            = $14d6
+slmod            = $14c6
+star             = $14b7
+stod             = $13f5
+space            = $0bd1
+sub              = $0b6d
+state            = $0ad6
+scr              = $0aa5
+smudg            = $0d4a
+scsp             = $0c71
+store            = $0913
+semis            = $0782
+spsto            = $075e
+spat             = $074f
+swap             = $0898
+setup            = $046c
+sectl            = $0640
+sectr            = $0320
+ssize            = $80
+scaninvect       = $03ee
+strv             = $a08a
+spx              = $a007
+sngmv            = $9fa7
+search           = $9f09
+stratgy          = $a11f
+setw             = $a426
+sp1              = $b3
+sp2              = $b2
+square           = $b1
+sm2              = $03
+sm1              = $02
+sm0              = $01
+se               = $00
+sreg_i           = $07
+sreg_t           = $06
+sreg_h           = $05
+sreg_s           = $04
+sreg_v           = $03
+sreg_n           = $02
+sreg_z           = $01
+sreg_c           = $00
+spie             = $07
+spe              = $06
+spr1             = $01
+spr0             = $00
+spif             = $07
+spi2x            = $00
+spdr7            = $07
+spdr6            = $06
+spdr5            = $05
+spdr4            = $04
+spdr3            = $03
+spdr2            = $02
+spdr1            = $01
+spdr0            = $00
+spmie            = $07
+sigrd            = $05
+spmen            = $00
+spcr             = $4c
+spsr             = $4d
+spdr             = $4e
+smcr             = $53
+spmcsr           = $57
+sph              = $5e
+spl              = $5d
+sreg             = $5f
+txt_cmd3         = $e960
+txt_cmd2         = $e95e
+txt_cmd          = $e94a
+txt_cmd1         = $e952
+tabkey           = $e7c8
+tab_powr         = $e314
+tab_ascw         = $e305
+tab_ascv         = $e2f9
+tab_ascu         = $e2e8
+tab_asct         = $e2d4
+tab_ascs         = $e2a6
+tab_ascr         = $e277
+tab_ascp         = $e262
+tab_asco         = $e25a
+tab_ascn         = $e248
+tab_ascm         = $e23a
+tab_ascl         = $e215
+tab_asci         = $e203
+tab_asch         = $e1fd
+tab_ascg         = $e1f0
+tab_ascf         = $e1e6
+tab_asce         = $e1d7
+tab_ascd         = $e1be
+tab_ascc         = $e1a7
+tab_ascb         = $e18e
+tab_asca         = $e17e
+tab_qest         = $e17c
+tab_more         = $e178
+tab_equl         = $e176
+tab_less         = $e172
+tab_slas         = $e170
+tab_mnus         = $e16e
+tab_plus         = $e16c
+tab_star         = $e16a
+taberr           = $de39
+t_bits           = $dbc6
+tst_ok           = $dbc0
+toobig           = $cb99
+tk_gt_plus       = $0a
+tk_equal_plus    = $0b
+tk_lt_plus       = $0c
+tab_chrt         = $e130
+tab_1stc         = $e112
+tabloop          = $be20
+tk_mids          = $e6
+tk_rights        = $e5
+tk_lefts         = $e4
+tk_vptr          = $e3
+tk_twopi         = $e2
+tk_pi            = $e1
+tk_min           = $e0
+tk_max           = $df
+tk_bittst        = $de
+tk_bins          = $dd
+tk_hexs          = $dc
+tk_chrs          = $db
+tk_lcases        = $da
+tk_ucases        = $d9
+tk_asc           = $d8
+tk_val           = $d7
+tk_strs          = $d6
+tk_len           = $d5
+tk_sadd          = $d4
+tk_deek          = $d3
+tk_peek          = $d2
+tk_atn           = $d1
+tk_tan           = $d0
+tk_sin           = $cf
+tk_cos           = $ce
+tk_exp           = $cd
+tk_log           = $cc
+tk_rnd           = $cb
+tk_sqr           = $ca
+tk_pos           = $c9
+tk_fre           = $c8
+tk_usr           = $c7
+tk_abs           = $c6
+tk_int           = $c5
+tk_sgn           = $c4
+tk_lt            = $c3
+tk_equal         = $c2
+tk_gt            = $c1
+tk_lshift        = $c0
+tk_rshift        = $bf
+tk_or            = $be
+tk_eor           = $bd
+tk_and           = $bc
+tk_power         = $bb
+tk_div           = $ba
+tk_mul           = $b9
+tk_minus         = $b8
+tk_plus          = $b7
+tk_off           = $b6
+tk_while         = $b5
+tk_until         = $b4
+tk_step          = $b3
+tk_not           = $b2
+tk_then          = $b1
+tk_spc           = $b0
+tk_fn            = $af
+tk_to            = $ae
+tk_else          = $ad
+tk_tab           = $ac
+tk_sys           = $ab
+tk_nmi           = $aa
+tk_irq           = $a9
+tk_bitclr        = $a8
+tk_bitset        = $a7
+tk_swap          = $a6
+tk_get           = $a5
+tk_width         = $a4
+tk_new           = $a3
+tk_clear         = $a2
+tk_list          = $a1
+tk_cont          = $a0
+tk_print         = $9f
+tk_loop          = $9e
+tk_do            = $9d
+tk_call          = $9c
+tk_doke          = $9b
+tk_poke          = $9a
+tk_def           = $99
+tk_save          = $98
+tk_load          = $97
+tk_wait          = $96
+tk_inc           = $95
+tk_null          = $94
+tk_on            = $93
+tk_stop          = $92
+tk_rem           = $91
+tk_return        = $90
+tk_retnmi        = $8f
+tk_retirq        = $8e
+tk_gosub         = $8d
+tk_restore       = $8c
+tk_if            = $8b
+tk_run           = $8a
+tk_goto          = $89
+tk_dec           = $88
+tk_let           = $87
+tk_read          = $86
+tk_dim           = $85
+tk_input         = $84
+tk_data          = $83
+tk_next          = $82
+tk_for           = $81
+tk_end           = $80
+tidx1            = $97
+tempb            = $78
+temp_2           = $71
+tabsiz           = $64
+tindx            = $5d
+temp3            = $5b
+twidth           = $0f
+tpos             = $0e
+toprom           = $bd65
+tick             = $17ce
+type             = $0e08
+trav             = $0bf7
+twop             = $0b21
+tib              = $0a49
+three            = $09e8
+two              = $09e0
+toggl            = $08e0
+tor              = $07b0
+top              = $1b65
+tcr              = $a501
+tibx             = $0100
+tos              = $9f
+take             = $a078
+tree             = $9ed9
+temp             = $3f
+txcie1           = $06
+txen1            = $03
+txb81            = $00
+txc1             = $06
+twa6             = $07
+twa5             = $06
+twa4             = $05
+twa3             = $04
+twa2             = $03
+twa1             = $02
+twa0             = $01
+twgce            = $00
+twd7             = $07
+twd6             = $06
+twd5             = $05
+twd4             = $04
+twd3             = $03
+twd2             = $02
+twd1             = $01
+twd0             = $00
+tws7             = $07
+tws6             = $06
+tws5             = $05
+tws4             = $04
+tws3             = $03
+twps1            = $01
+twps0            = $00
+twint            = $07
+twea             = $06
+twsta            = $05
+twsto            = $04
+twwc             = $03
+twen             = $02
+twie             = $00
+twbr7            = $07
+twbr6            = $06
+twbr5            = $05
+twbr4            = $04
+twbr3            = $03
+twbr2            = $02
+twbr1            = $01
+twbr0            = $00
+twamr6           = $07
+twam6            = $07
+twamr5           = $06
+twam5            = $06
+twamr4           = $05
+twam4            = $05
+twamr3           = $04
+twam3            = $04
+twamr2           = $03
+twam2            = $03
+twamr1           = $02
+twam1            = $02
+twamr0           = $01
+twam0            = $01
+tov3             = $00
+toie3            = $00
+tcn2ub           = $04
+tcr2aub          = $01
+tcr2bub          = $00
+tcnt2_7          = $07
+tcnt2_6          = $06
+tcnt2_5          = $05
+tcnt2_4          = $04
+tcnt2_3          = $03
+tcnt2_2          = $02
+tcnt2_1          = $01
+tcnt2_0          = $00
+tov2             = $00
+toie2a           = $00
+toie2            = $00
+tov1             = $00
+toie1            = $00
+tsm              = $07
+tcnt0_7          = $07
+tcnt0_6          = $06
+tcnt0_5          = $05
+tcnt0_4          = $04
+tcnt0_3          = $03
+tcnt0_2          = $02
+tcnt0_1          = $01
+tcnt0_0          = $00
+tov0             = $00
+toie0            = $00
+txcie0           = $06
+txen0            = $03
+txb80            = $00
+txc0             = $06
+tifr0            = $35
+tifr1            = $36
+tifr2            = $37
+tifr3            = $38
+tccr0a           = $44
+tccr0b           = $45
+tcnt0            = $46
+timsk0           = $6e
+timsk1           = $6f
+timsk2           = $70
+timsk3           = $71
+tccr1a           = $80
+tccr1b           = $81
+tccr1c           = $82
+tcnt1h           = $85
+tcnt1l           = $84
+tccr3a           = $90
+tccr3b           = $91
+tccr3c           = $92
+tcnt3h           = $95
+tcnt3l           = $94
+tccr2a           = $b0
+tccr2b           = $b1
+tcnt2            = $b2
+twbr             = $b8
+twsr             = $b9
+twar             = $ba
+twdr             = $bb
+twcr             = $bc
+twamr            = $bd
+updcrc           = $fd4a
+uc_loop          = $d243
+ut2_ph           = $74
+ut2_pl           = $73
+ut1_ph           = $72
+ut1_pl           = $71
+usrjph           = $0c
+usrjpl           = $0b
+usrjmp           = $0a
+until            = $18db
+updat            = $1574
+use              = $1535
+upper            = $1030
+uless            = $0b86
+user             = $09b7
+uslas            = $06be
+ustar            = $068b
+uarea            = $3e80
+up               = $b4
+undo1            = $a1c0
+uptree           = $9efd
+umove            = $a04b
+undo             = $a1a3
+ubrr_7           = $07
+ubrr_6           = $06
+ubrr_5           = $05
+ubrr_4           = $04
+ubrr_3           = $03
+ubrr_2           = $02
+ubrr_1           = $01
+ubrr_0           = $00
+ubrr_11          = $03
+ubrr_10          = $02
+ubrr_9           = $01
+ubrr_8           = $00
+umsel11          = $07
+umsel10          = $06
+upm11            = $05
+upm10            = $04
+usbs1            = $03
+udord1           = $02
+ucsz11           = $02
+ucpha1           = $01
+ucsz10           = $01
+ucpol1           = $00
+udrie1           = $05
+ucsz12           = $02
+udre1            = $05
+upe1             = $02
+u2x1             = $01
+udr1_7           = $07
+udr1_6           = $06
+udr1_5           = $05
+udr1_4           = $04
+udr1_3           = $03
+udr1_2           = $02
+udr1_1           = $01
+udr1_0           = $00
+ubrr7            = $07
+ubrr6            = $06
+ubrr5            = $05
+ubrr4            = $04
+ubrr3            = $03
+ubrr2            = $02
+ubrr11           = $03
+ubrr10           = $02
+ubrr9            = $01
+ubrr8            = $00
+umsel1           = $07
+umsel01          = $07
+umsel0           = $06
+umsel00          = $06
+upm01            = $05
+upm00            = $04
+usbs0            = $03
+udord0           = $02
+ucsz01           = $02
+ucpha0           = $01
+ucsz00           = $01
+ucpol0           = $00
+udrie0           = $05
+ucsz02           = $02
+udre0            = $05
+upe0             = $02
+u2x0             = $01
+udr0_7           = $07
+udr0_6           = $06
+udr0_5           = $05
+udr0_4           = $04
+udr0_3           = $03
+udr0_2           = $02
+udr0_1           = $01
+udr0_0           = $00
+ucsr0a           = $3fc0
+ucsr0b           = $3fc1
+ucsr0c           = $3fc2
+ubrr0h           = $c5
+ubrr0l           = $c4
+udr0             = $3fc6
+ucsr1a           = $c8
+ucsr1b           = $c9
+ucsr1c           = $ca
+ubrr1h           = $cd
+ubrr1l           = $cc
+udr1             = $ce
+version          = $e8b3
+v_save           = $def3
+v_load           = $def0
+v_outp           = $deed
+v_inpt           = $deea
+vec_cc           = $0403
+vrschh           = $ab
+vrschl           = $aa
+varnm2           = $94
+varnm1           = $93
+vlist            = $1b19
+vocl             = $0a82
+var              = $099e
+vl0              = $1331
+vec_ld           = $0409
+vec_sv           = $040b
+vec_out          = $0407
+vec_in           = $0405
+wexit            = $de1b
+wrmjph           = $02
+wrmjpl           = $01
+word             = $0fe3
+warn             = $0a61
+width            = $0a54
+warm             = $13ca
+w                = $b2
+whset            = $9e1a
+wmaxp            = $ee
+wcc              = $ed
+wmaxc            = $ec
+wmob             = $eb
+wcap1            = $e1
+wcap2            = $df
+wcap0            = $dd
+wdrf             = $03
+wdif             = $07
+wdie             = $06
+wdp3             = $05
+wdce             = $04
+wde              = $03
+wdp2             = $02
+wdp1             = $01
+wdp0             = $00
+wcol             = $06
+wgm33            = $04
+wgm32            = $03
+wgm31            = $01
+wgm30            = $00
+wgm22            = $03
+wgm21            = $01
+wgm20            = $00
+wgm13            = $04
+wgm12            = $03
+wgm11            = $01
+wgm10            = $00
+wgm02            = $03
+wgm01            = $01
+wgm00            = $00
+wdtcsr           = $60
+xmodem           = $fc00
+x_mode           = $eb1f
+xreg             = $03e3
+xoaw_h           = $5c
+xoaw_l           = $5b
+xfor             = $132f
+xor              = $0739
+xcr              = $177b
+xqter            = $1772
+xkey             = $176c
+xemit            = $1764
+xsave            = $b6
+xrt              = $9eab
+xmaxc            = $e8
+y_mode           = $eb2c
+yreg             = $03e4
+zp_y_mode        = $eb29
+zp_x_mode        = $eb1c
+zp_mode          = $eb10
+zero             = $09d0
+zless            = $07fe
+zequ             = $07e9
+zbran            = $04be
+_top             = $a483
+_push            = $a0aa
+_cmove           = $9fe3
+_reset           = $a038
+_here            = $9f12
+_error           = $9f16
+_less            = $9e9e
+_over            = $9e7d
+_counts          = $9e71
+_input           = $9f00
+_done            = $9e6a
+_out             = $9e0e
+_cstart          = $9e00
+_count           = $de
+_state           = $b5
+_ubrr1           = $01
+_ubrr0           = $00
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/SBC25.LST b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/SBC25.LST
new file mode 100644
index 00000000..f389755a
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/SBC25.LST
@@ -0,0 +1,11624 @@
+
+6502/65C02 Turbo Assembler listing file of "sbc.asm"
+done on Sat Jul 06 15:40:09 2013
+
+
+>4002  ff                               .byte  $ff
+
+.9e00  a9 00      lda #$00         _CSTART		LDA     #$00		; REVERSE TOGGLE
+.9e02  85 b7      sta $b7          		STA     REV
+.9e04  85 fd      sta $fd          		sta	hist
+.9e06  d8         cld              CHESS		CLD			; INITIALIZE
+.9e07  a2 ff      ldx #$ff         		LDX	#$FF		; TWO STACKS
+.9e09  9a         txs              		TXS	
+.9e0a  a2 c8      ldx #$c8         		LDX	#$C8
+.9e0c  86 b2      stx $b2          		STX	SP2
+.9e0e  20 c1 a1   jsr $a1c1        _OUT		JSR	pout		; DISPLAY AND
+.9e11  20 ad a2   jsr $a2ad        		JSR	KIN		; GET _INPUT   *** my routine waits for a keypress
+.9e14  c9 43      cmp #$43         		CMP	#$43		; [C]
+.9e16  d0 12      bne $9e2a        		BNE	NOSET		; SET UP
+.9e18  a2 1f      ldx #$1f         		LDX	#$1F		; BOARD
+.9e1a  bd 26 a4   lda $a426,x      WHSET		LDA	SETW,X		; FROM
+.9e1d  95 50      sta $50,x        		STA	BOARD,X		; SETW
+.9e1f  ca         dex              		DEX	
+.9e20  10 f8      bpl $9e1a        		BPL	WHSET
+.9e22  a2 1b      ldx #$1b         		LDX	#$1B		; *ADDED
+.9e24  86 dc      stx $dc          		STX	OMOVE		; INITS TO $FF
+.9e26  a9 cc      lda #$cc         		LDA	#$CC		; Display CCC
+.9e28  d0 19      bne $9e43        		BNE	CLDSP
+.9e2a  c9 45      cmp #$45         NOSET		CMP	#$45		; [E]
+.9e2c  d0 0e      bne $9e3c        		BNE	NOREV		; REVERSE
+.9e2e  20 cb 9f   jsr $9fcb        		JSR	REVERSE        	; BOARD IS
+.9e31  38         sec              		SEC
+.9e32  a9 01      lda #$01         		LDA	#$01
+.9e34  e5 b7      sbc $b7          		SBC	REV
+.9e36  85 b7      sta $b7          		STA	REV		; TOGGLE REV FLAG
+.9e38  a9 ee      lda #$ee         		LDA	#$EE            ; IS
+.9e3a  d0 07      bne $9e43        		BNE	CLDSP
+.9e3c  c9 40      cmp #$40         NOREV		CMP	#$40		; [P]
+.9e3e  d0 0b      bne $9e4b        		BNE	NOGO           	; PLAY CHESS
+.9e40  20 bf a0   jsr $a0bf        		JSR	GO
+.9e43  85 fb      sta $fb          CLDSP		STA	DIS1          	; DISPLAY
+.9e45  85 fa      sta $fa          		STA	DIS2         	; ACROSS
+.9e47  85 f9      sta $f9          		STA	DIS3          	; DISPLAY
+.9e49  d0 bb      bne $9e06        		BNE	CHESS
+.9e4b  c9 0d      cmp #$0d         NOGO		CMP	#$0D            ; [Enter]
+.9e4d  d0 09      bne $9e58        		BNE	NOMV          	; MOVE MAN
+.9e4f  20 65 a0   jsr $a065        		JSR	MOVE          	; AS ENTERED
+.9e52  20 85 a1   jsr $a185        		jsr     addhist		; add move to history
+.9e55  4c 07 9f   jmp $9f07        		JMP	DISP
+.9e58  c9 41      cmp #$41         NOMV		CMP     #$41		; [Q] ***Added to allow game exit***
+.9e5a  f0 0e      beq $9e6a        		BEQ     _DONE		; quit the game, exit back to system.  
+.9e5c  c9 42      cmp #$42                         cmp     #$42		; [B] Undo move
+.9e5e  d0 07      bne $9e67        		bne     Noud		;
+.9e60  20 a3 a1   jsr $a1a3        		jsr     Undo		; undo last move
+.9e63  a9 bb      lda #$bb         		LDA	#$BB            ; undo
+.9e65  d0 dc      bne $9e43        		BNE	CLDSP
+.9e67  4c 00 9f   jmp $9f00        Noud		JMP	_INPUT		; process move
+.9e6a  6c f7 03   jmp ($03f7)      _DONE		JMP  	(RESvector)	; exit back to SBC's Monitor
+.9e6d  a6 b5      ldx $b5          JANUS		LDX	_STATE
+.9e6f  30 59      bmi $9eca        		BMI	NO_COUNT
+.9e71  a5 b0      lda $b0          _COUNTS		LDA	PIECE
+.9e73  f0 08      beq $9e7d        		BEQ	_OVER           	; IF _STATE=8
+.9e75  e0 08      cpx #$08         		CPX 	#$08           	; DO NOT _COUNT
+.9e77  d0 04      bne $9e7d        		BNE	_OVER          	; BLK MAX CAP
+.9e79  c5 e6      cmp $e6          		CMP	BMAXP        	; MOVES FOR
+.9e7b  f0 2e      beq $9eab        		BEQ	XRT           	; WHITE
+.9e7d  f6 e3      inc $e3,x        _OVER		INC	MOB,X          	; MOBILITY
+.9e7f  c9 01      cmp #$01         		CMP 	#$01           	;  + QUEEN
+.9e81  d0 02      bne $9e85        		BNE	NOQ           	; FOR TWO
+.9e83  f6 e3      inc $e3,x        		INC	MOB,X
+.9e85  50 1e      bvc $9ea5        NOQ		BVC	NOCAP
+.9e87  a0 0f      ldy #$0f         		LDY	#$0F           	; CALCULATE
+.9e89  a5 b1      lda $b1          		LDA	SQUARE       	; POINTS
+.9e8b  d9 60 00   cmp $0060,y      ELOOP		CMP	BK,Y           	; CAPTURED
+.9e8e  f0 03      beq $9e93        		BEQ	FOUN          	; BY THIS
+.9e90  88         dey              		DEY			; MOVE
+.9e91  10 f8      bpl $9e8b        		BPL	ELOOP
+.9e93  b9 57 a4   lda $a457,y      FOUN		LDA	POINTS,Y
+.9e96  d5 e4      cmp $e4,x        		CMP	MAXC,X
+.9e98  90 04      bcc $9e9e        		BCC	_LESS          	; SAVE IF
+.9e9a  94 e6      sty $e6,x        		STY	PCAP,X         	; BEST THIS
+.9e9c  95 e4      sta $e4,x        		STA	MAXC,X         	; _STATE
+.9e9e  18         clc              _LESS		CLC	
+.9e9f  08         php              		PHP			; ADD TO
+.9ea0  75 e5      adc $e5,x        		ADC	CC,X           	; CAPTURE
+.9ea2  95 e5      sta $e5,x        		STA	CC,X           	; _COUNTS
+.9ea4  28         plp              		PLP	
+.9ea5  e0 04      cpx #$04         NOCAP		CPX	#$04
+.9ea7  f0 03      beq $9eac        		BEQ	ON4
+.9ea9  30 2e      bmi $9ed9        		BMI	TREE          	;(=00 ONLY)
+.9eab  60         rts              XRT		RTS	
+.9eac  a5 e8      lda $e8          ON4		LDA	XMAXC        	; SAVE ACTUAL 
+.9eae  85 dd      sta $dd          		STA	WCAP0         	; CAPTURE
+.9eb0  a9 00      lda #$00         		LDA	#$00           	; _STATE=0
+.9eb2  85 b5      sta $b5          		STA	_STATE
+.9eb4  20 65 a0   jsr $a065        		JSR	MOVE          	; GENERATE
+.9eb7  20 cb 9f   jsr $9fcb        		JSR	REVERSE       	; IMMEDIATE
+.9eba  20 19 9f   jsr $9f19        		JSR	GNMZ         	; REPLY MOVES  
+.9ebd  20 cb 9f   jsr $9fcb        		JSR	REVERSE
+.9ec0  a9 08      lda #$08         		LDA	#$08       	; _STATE=8
+.9ec2  85 b5      sta $b5          		STA	_STATE        	; GENERATE
+.9ec4  20 4b a0   jsr $a04b        		JSR	UMOVE         	; MOVES
+.9ec7  4c 1f a1   jmp $a11f        		JMP	STRATGY       	; FINAL EVALUATION
+.9eca  e0 f9      cpx #$f9         NO_COUNT	CPX	#$F9
+.9ecc  d0 0b      bne $9ed9        		BNE	TREE
+.9ece  a5 60      lda $60          		LDA	BK           	; IS KING
+.9ed0  c5 b1      cmp $b1          		CMP	SQUARE       	; IN CHECK?
+.9ed2  d0 04      bne $9ed8        		BNE	RETJ          	; SET INCHEK=0
+.9ed4  a9 00      lda #$00         		LDA	#$00           	; IF IT IS
+.9ed6  85 b4      sta $b4          		STA	INCHEK
+.9ed8  60         rts              RETJ		RTS	
+.9ed9  50 fd      bvc $9ed8        TREE		BVC	RETJ          	; NO CAP
+.9edb  a0 07      ldy #$07         		LDY	#$07           	; (PIECES)
+.9edd  a5 b1      lda $b1          		LDA	SQUARE
+.9edf  d9 60 00   cmp $0060,y      LOOPX		CMP	BK,Y
+.9ee2  f0 05      beq $9ee9        		BEQ	FOUNX
+.9ee4  88         dey              		DEY	
+.9ee5  f0 f1      beq $9ed8        		BEQ	RETJ          	; (KING)
+.9ee7  10 f6      bpl $9edf        		BPL	LOOPX         	; SAVE
+.9ee9  b9 57 a4   lda $a457,y      FOUNX		LDA	POINTS,Y       	; BEST CAP
+.9eec  d5 e2      cmp $e2,x        		CMP	BCAP0,X        	; AT THIS
+.9eee  90 02      bcc $9ef2        		BCC	NOMAX         	; LEVEL
+.9ef0  95 e2      sta $e2,x        		STA	BCAP0,X
+.9ef2  c6 b5      dec $b5          NOMAX		DEC	_STATE
+.9ef4  a9 fb      lda #$fb         		LDA	#$FB           	; IF _STATE=FB
+.9ef6  c5 b5      cmp $b5          		CMP	_STATE        	; TIME TO TURN
+.9ef8  f0 03      beq $9efd        		BEQ	UPTREE        	; AROUND
+.9efa  20 3f a0   jsr $a03f        		JSR	GENRM         	; GENERATE FURTHER
+.9efd  e6 b5      inc $b5          UPTREE		INC	_STATE        	; CAPTURES
+.9eff  60         rts              		RTS	
+.9f00  c9 08      cmp #$08         _INPUT		CMP	#$08           	; NOT A LEGAL
+.9f02  b0 12      bcs $9f16        		BCS	_ERROR      	; SQUARE #
+.9f04  20 0f a1   jsr $a10f        		JSR	DISMV
+.9f07  a2 1f      ldx #$1f         DISP		LDX	#$1F
+.9f09  b5 50      lda $50,x        SEARCH		LDA	BOARD,X
+.9f0b  c5 fa      cmp $fa          		CMP	DIS2
+.9f0d  f0 03      beq $9f12        		BEQ	_HERE          	; DISPLAY
+.9f0f  ca         dex              		DEX			; PIECE AT    
+.9f10  10 f7      bpl $9f09        		BPL	SEARCH        	; FROM
+.9f12  86 fb      stx $fb          _HERE		STX	DIS1         	; SQUARE
+.9f14  86 b0      stx $b0          		STX	PIECE
+.9f16  4c 06 9e   jmp $9e06        _ERROR		JMP	CHESS
+.9f19  a2 10      ldx #$10         GNMZ		LDX	#$10            ; CLEAR
+.9f1b  a9 00      lda #$00         GNMX		LDA	#$00            ; _COUNTERS
+.9f1d  95 de      sta $de,x        CLEAR		STA	_COUNT,X
+.9f1f  ca         dex              		DEX	
+.9f20  10 fb      bpl $9f1d        		BPL	CLEAR
+.9f22  a9 10      lda #$10         GNM		LDA	#$10            ; SET UP
+.9f24  85 b0      sta $b0          		STA	PIECE        	; PIECE
+.9f26  c6 b0      dec $b0          NEWP		DEC	PIECE        	; NEW PIECE
+.9f28  10 01      bpl $9f2b        		BPL	NEX           	; ALL _DONE?
+.9f2a  60         rts              		RTS			; #NAME?
+.9f2b  20 38 a0   jsr $a038        NEX		JSR	_RESET        	; READY
+.9f2e  a4 b0      ldy $b0          		LDY	PIECE        	; GET PIECE
+.9f30  a2 08      ldx #$08         		LDX	#$08
+.9f32  86 b6      stx $b6          		STX	MOVEN        	; COMMON START
+.9f34  c0 08      cpy #$08         		CPY	#$08            ; WHAT IS IT?
+.9f36  10 41      bpl $9f79        		BPL	PAWN          	; PAWN
+.9f38  c0 06      cpy #$06         		CPY	#$06
+.9f3a  10 2e      bpl $9f6a        		BPL	KNIGHT        	; KNIGHT
+.9f3c  c0 04      cpy #$04         		CPY	#$04
+.9f3e  10 1f      bpl $9f5f        		BPL	BISHOP       	; BISHOP
+.9f40  c0 01      cpy #$01         		CPY	#$01
+.9f42  f0 09      beq $9f4d        		BEQ	QUEEN         	; QUEEN
+.9f44  10 0e      bpl $9f54        		BPL	ROOK          	; ROOK
+.9f46  20 a7 9f   jsr $9fa7        KING		JSR	SNGMV         	; MUST BE KING!
+.9f49  d0 fb      bne $9f46        		BNE	KING          	; MOVES
+.9f4b  f0 d9      beq $9f26        		BEQ	NEWP          	; 8 TO 1
+.9f4d  20 b5 9f   jsr $9fb5        QUEEN		JSR	LINE
+.9f50  d0 fb      bne $9f4d        		BNE	QUEEN         	; MOVES
+.9f52  f0 d2      beq $9f26        		BEQ	NEWP          	; 8 TO 1
+.9f54  a2 04      ldx #$04         ROOK		LDX	#$04
+.9f56  86 b6      stx $b6          		STX	MOVEN        	; MOVES
+.9f58  20 b5 9f   jsr $9fb5        AGNR		JSR	LINE          	; 4 TO 1
+.9f5b  d0 fb      bne $9f58        		BNE	AGNR
+.9f5d  f0 c7      beq $9f26        		BEQ	NEWP
+.9f5f  20 b5 9f   jsr $9fb5        BISHOP		JSR	LINE
+.9f62  a5 b6      lda $b6          		LDA	MOVEN        	; MOVES
+.9f64  c9 04      cmp #$04         		CMP	#$04           	; 8 TO 5
+.9f66  d0 f7      bne $9f5f        		BNE	BISHOP
+.9f68  f0 bc      beq $9f26        		BEQ	NEWP
+.9f6a  a2 10      ldx #$10         KNIGHT		LDX	#$10
+.9f6c  86 b6      stx $b6          		STX	MOVEN        	; MOVES
+.9f6e  20 a7 9f   jsr $9fa7        AGNN		JSR	SNGMV         	; 16 TO 9
+.9f71  a5 b6      lda $b6          		LDA	MOVEN
+.9f73  c9 08      cmp #$08         		CMP	#$08
+.9f75  d0 f7      bne $9f6e        		BNE	AGNN
+.9f77  f0 ad      beq $9f26        		BEQ	NEWP
+.9f79  a2 06      ldx #$06         PAWN		LDX	#$06
+.9f7b  86 b6      stx $b6          		STX	MOVEN
+.9f7d  20 e3 9f   jsr $9fe3        P1		JSR	_CMOVE         	; RIGHT CAP?
+.9f80  50 05      bvc $9f87        		BVC	P2
+.9f82  30 03      bmi $9f87        		BMI	P2
+.9f84  20 6d 9e   jsr $9e6d        		JSR	JANUS         	; YES
+.9f87  20 38 a0   jsr $a038        P2		JSR	_RESET
+.9f8a  c6 b6      dec $b6          		DEC	MOVEN        	; LEFT CAP?
+.9f8c  a5 b6      lda $b6          		LDA	MOVEN
+.9f8e  c9 05      cmp #$05         		CMP	#$05
+.9f90  f0 eb      beq $9f7d        		BEQ	P1
+.9f92  20 e3 9f   jsr $9fe3        P3		JSR	_CMOVE         	; AHEAD
+.9f95  70 8f      bvs $9f26        		BVS	NEWP          	; ILLEGAL
+.9f97  30 8d      bmi $9f26        		BMI	NEWP
+.9f99  20 6d 9e   jsr $9e6d        		JSR	JANUS
+.9f9c  a5 b1      lda $b1          		LDA	SQUARE       	; GETS TO
+.9f9e  29 f0      and #$f0         		AND	#$F0           	; 3RD RANK?
+.9fa0  c9 20      cmp #$20         		CMP	#$20
+.9fa2  f0 ee      beq $9f92        		BEQ	P3            	; DO DOUBLE
+.9fa4  4c 26 9f   jmp $9f26        		JMP	NEWP
+.9fa7  20 e3 9f   jsr $9fe3        SNGMV		JSR	_CMOVE        	; CALC MOVE
+.9faa  30 03      bmi $9faf        		BMI	ILL1           	; -IF LEGAL
+.9fac  20 6d 9e   jsr $9e6d        		JSR	JANUS           ; -EVALUATE
+.9faf  20 38 a0   jsr $a038        ILL1		JSR	_RESET
+.9fb2  c6 b6      dec $b6          		DEC	MOVEN
+.9fb4  60         rts              		RTS	
+.9fb5  20 e3 9f   jsr $9fe3        LINE		JSR	_CMOVE         	; CALC MOVE
+.9fb8  90 02      bcc $9fbc        		BCC	OVL            	; NO CHK
+.9fba  50 f9      bvc $9fb5        		BVC	LINE		; NOCAP       
+.9fbc  30 07      bmi $9fc5        OVL		BMI	ILL             ; RETURN
+.9fbe  08         php              		PHP	
+.9fbf  20 6d 9e   jsr $9e6d        		JSR	JANUS         	; EVALUATE POSN
+.9fc2  28         plp              		PLP	
+.9fc3  50 f0      bvc $9fb5        		BVC	LINE          	; NOT A CAP
+.9fc5  20 38 a0   jsr $a038        ILL		JSR	_RESET         	; LINE STOPPED
+.9fc8  c6 b6      dec $b6          		DEC	MOVEN         	; NEXT DIR
+.9fca  60         rts              		RTS	
+.9fcb  a2 0f      ldx #$0f         REVERSE		LDX	#$0F
+.9fcd  38         sec              ETC		SEC	
+.9fce  b4 60      ldy $60,x        		LDY	BK,X           	; SUBTRACT
+.9fd0  a9 77      lda #$77         		LDA 	#$77           	; POSITION
+.9fd2  f5 50      sbc $50,x        		SBC  	BOARD,X        	; FROM 77
+.9fd4  95 60      sta $60,x        		STA  	BK,X
+.9fd6  94 50      sty $50,x        		STY  	BOARD,X         ; AND
+.9fd8  38         sec              		SEC	
+.9fd9  a9 77      lda #$77         		LDA	#$77           	; EXCHANGE
+.9fdb  f5 50      sbc $50,x        		SBC 	BOARD,X        	; PIECES
+.9fdd  95 50      sta $50,x        		STA  	BOARD,X
+.9fdf  ca         dex              		DEX	
+.9fe0  10 eb      bpl $9fcd        		BPL   	ETC
+.9fe2  60         rts              		RTS	
+.9fe3  a5 b1      lda $b1          _CMOVE		LDA	SQUARE       	; GET SQUARE
+.9fe5  a6 b6      ldx $b6          		LDX	MOVEN       	; MOVE POINTER
+.9fe7  18         clc              		CLC	
+.9fe8  7d 46 a4   adc $a446,x      		ADC	MOVEX,X        	; MOVE LIST
+.9feb  85 b1      sta $b1          		STA	SQUARE       	; NEW POS'N
+.9fed  29 88      and #$88         		AND	#$88
+.9fef  d0 42      bne $a033        		BNE	ILLEGAL       	; OFF BOARD
+.9ff1  a5 b1      lda $b1          		LDA	SQUARE
+.9ff3  a2 20      ldx #$20         		LDX	#$20
+.9ff5  ca         dex              LOOP		DEX			; IS TO
+.9ff6  30 0e      bmi $a006        		BMI	NO            	; SQUARE
+.9ff8  d5 50      cmp $50,x        		CMP  	BOARD,X        	; OCCUPIED?
+.9ffa  d0 f9      bne $9ff5        		BNE   	LOOP
+.9ffc  e0 10      cpx #$10         		CPX	#$10            ; BY SELF?
+.9ffe  30 33      bmi $a033        		BMI   	ILLEGAL
+.a000  a9 7f      lda #$7f         		LDA	#$7F		; MUST BE CAP!
+.a002  69 01      adc #$01         		ADC	#$01            ; SET V FLAG
+.a004  70 01      bvs $a007        		BVS   	SPX 	        ; (JMP)
+.a006  b8         clv              NO		CLV			; NO CAPTURE
+.a007  a5 b5      lda $b5          SPX		LDA  	_STATE         	; SHOULD WE
+.a009  30 24      bmi $a02f        		BMI   	RETL           	; DO THE
+.a00b  c9 08      cmp #$08         		CMP	#$08 	        ; CHECK CHECK?
+.a00d  10 20      bpl $a02f        		BPL  	RETL
+.a00f  48         pha              CHKCHK	PHA				; _STATE  #392
+.a010  08         php              		PHP	
+.a011  a9 f9      lda #$f9         		LDA	#$F9
+.a013  85 b5      sta $b5          		STA	_STATE         	; GENERATE
+.a015  85 b4      sta $b4          		STA	INCHEK        	; ALL REPLY
+.a017  20 65 a0   jsr $a065        		JSR	MOVE          	; MOVES TO
+.a01a  20 cb 9f   jsr $9fcb        		JSR	REVERSE       	; SEE IF KING
+.a01d  20 22 9f   jsr $9f22        		JSR	GNM           	; IS IN
+.a020  20 48 a0   jsr $a048        		JSR	RUM           	; CHECK
+.a023  28         plp              		PLP	
+.a024  68         pla              		PLA	
+.a025  85 b5      sta $b5          		STA	_STATE
+.a027  a5 b4      lda $b4          		LDA	INCHEK
+.a029  30 04      bmi $a02f        		BMI	RETL           	; NO - SAFE
+.a02b  38         sec              		SEC			; YES - IN CHK
+.a02c  a9 ff      lda #$ff         		LDA	#$FF
+.a02e  60         rts              		RTS	
+.a02f  18         clc              RETL		CLC			; LEGAL
+.a030  a9 00      lda #$00         		LDA	#$00            ; RETURN
+.a032  60         rts              		RTS	
+.a033  a9 ff      lda #$ff         ILLEGAL	LDA	#$FF
+.a035  18         clc              		CLC			; ILLEGAL
+.a036  b8         clv              		CLV			; RETURN
+.a037  60         rts              		RTS	
+.a038  a6 b0      ldx $b0          _RESET		LDX	PIECE      	; GET LOGAT
+.a03a  b5 50      lda $50,x        		LDA	BOARD,X        	; FOR PIECE
+.a03c  85 b1      sta $b1          		STA	SQUARE       	; FROM BOARD
+.a03e  60         rts              		RTS	
+.a03f  20 65 a0   jsr $a065        GENRM		JSR	MOVE          	; MAKE MOVE
+.a042  20 cb 9f   jsr $9fcb        GENR2		JSR	REVERSE      	; REVERSE BOARD
+.a045  20 22 9f   jsr $9f22        		JSR	GNM          	; GENERATE MOVES
+.a048  20 cb 9f   jsr $9fcb        RUM		JSR	REVERSE   	; REVERSE BACK
+.a04b  ba         tsx              UMOVE		TSX			; UNMAKE MOVE
+.a04c  86 b3      stx $b3          		STX	SP1
+.a04e  a6 b2      ldx $b2          		LDX	SP2           	; EXCHANGE
+.a050  9a         txs              		TXS			; STACKS
+.a051  68         pla              		PLA			; MOVEN
+.a052  85 b6      sta $b6          		STA	MOVEN
+.a054  68         pla              		PLA			; CAPTURED
+.a055  85 b0      sta $b0          		STA	PIECE        	; PIECE
+.a057  aa         tax              		TAX	
+.a058  68         pla              		PLA			; FROM SQUARE
+.a059  95 50      sta $50,x        		STA	BOARD,X
+.a05b  68         pla              		PLA			; PIECE
+.a05c  aa         tax              		TAX	
+.a05d  68         pla              		PLA			; TO SOUARE
+.a05e  85 b1      sta $b1          		STA	SQUARE
+.a060  95 50      sta $50,x        		STA	BOARD,X
+.a062  4c 8a a0   jmp $a08a        		JMP	STRV
+.a065  ba         tsx              MOVE		TSX	
+.a066  86 b3      stx $b3          		STX	SP1          	; SWITCH
+.a068  a6 b2      ldx $b2          		LDX	SP2          	; STACKS
+.a06a  9a         txs              		TXS	
+.a06b  a5 b1      lda $b1          		LDA	SQUARE
+.a06d  48         pha              		PHA			; TO SQUARE
+.a06e  a8         tay              		TAY	
+.a06f  a2 1f      ldx #$1f         		LDX	#$1F
+.a071  d5 50      cmp $50,x        CHECK		CMP	BOARD,X        	; CHECK FOR
+.a073  f0 03      beq $a078        		BEQ	TAKE          	; CAPTURE
+.a075  ca         dex              		DEX	
+.a076  10 f9      bpl $a071        		BPL	CHECK
+.a078  a9 cc      lda #$cc         TAKE		LDA	#$CC
+.a07a  95 50      sta $50,x        		STA	BOARD,X
+.a07c  8a         txa              		TXA			; CAPTURED
+.a07d  48         pha              		PHA			; PIECE
+.a07e  a6 b0      ldx $b0          		LDX	PIECE
+.a080  b5 50      lda $50,x        		LDA	BOARD,X
+.a082  94 50      sty $50,x        		STY	BOARD,X        	; FROM
+.a084  48         pha              		PHA			; SQUARE
+.a085  8a         txa              		TXA	
+.a086  48         pha              		PHA			; PIECE
+.a087  a5 b6      lda $b6          		LDA	MOVEN
+.a089  48         pha              		PHA			; MOVEN
+.a08a  ba         tsx              STRV		TSX	
+.a08b  86 b2      stx $b2          		STX	SP2           	; SWITCH
+.a08d  a6 b3      ldx $b3          		LDX	SP1           	; STACKS
+.a08f  9a         txs              		TXS			; BACK
+.a090  60         rts              		RTS	
+.a091  a4 e4      ldy $e4          CKMATE	LDY	BMAXC         		; CAN BLK CAP
+.a093  ec 57 a4   cpx $a457        		CPX	POINTS       	; MY KING?
+.a096  d0 04      bne $a09c        		BNE	NOCHEK	
+.a098  a9 00      lda #$00         		LDA	#$00           	; GULP!
+.a09a  f0 0a      beq $a0a6        		BEQ	RETV          	; DUMB MOVE!
+.a09c  a6 e3      ldx $e3          NOCHEK	LDX	BMOB         		; IS BLACK
+.a09e  d0 06      bne $a0a6        		BNE	RETV          	; UNABLE TO
+.a0a0  a6 ee      ldx $ee          		LDX	WMAXP        	; MOVE AND
+.a0a2  d0 02      bne $a0a6        		BNE	RETV          	; KING IN CH?
+.a0a4  a9 ff      lda #$ff         		LDA	#$FF           	; YES! MATE
+.a0a6  a2 04      ldx #$04         RETV		LDX	#$04            ; RESTORE
+.a0a8  86 b5      stx $b5          		STX	_STATE        	; _STATE=4
+.a0aa  c5 fa      cmp $fa          _PUSH		CMP	BESTV         	; IS THIS BEST
+.a0ac  90 0c      bcc $a0ba        		BCC	RETP          	; MOVE SO FAR?
+.a0ae  f0 0a      beq $a0ba        		BEQ	RETP
+.a0b0  85 fa      sta $fa          		STA	BESTV        	; YES!
+.a0b2  a5 b0      lda $b0          		LDA	PIECE        	; SAVE IT
+.a0b4  85 fb      sta $fb          		STA	BESTP
+.a0b6  a5 b1      lda $b1          		LDA	SQUARE
+.a0b8  85 f9      sta $f9          		STA	BESTM        	; FLASH DISPLAY
+.a0ba  a9 2e      lda #$2e         RETP		LDA	#"."		; print ... instead of flashing disp
+.a0bc  4c f4 a4   jmp $a4f4        		Jmp	cout		; print . and return
+.a0bf  a6 dc      ldx $dc          GO		LDX	OMOVE        	; OPENING?
+.a0c1  30 1c      bmi $a0df        		BMI	NOOPEN          ; -NO   *ADD CHANGE FROM BPL
+.a0c3  a5 f9      lda $f9          		LDA	DIS3         	; -YES WAS
+.a0c5  dd 67 a4   cmp $a467,x      		CMP	OPNING,X        ; OPPONENT'S
+.a0c8  d0 11      bne $a0db        		BNE	END            	; MOVE OK?
+.a0ca  ca         dex              		DEX	
+.a0cb  bd 67 a4   lda $a467,x      		LDA	OPNING,X       	; GET NEXT
+.a0ce  85 fb      sta $fb          		STA	DIS1         	; CANNED
+.a0d0  ca         dex              		DEX			; OPENING MOVE
+.a0d1  bd 67 a4   lda $a467,x      		LDA	OPNING,X
+.a0d4  85 f9      sta $f9          		STA	DIS3         	; DISPLAY IT
+.a0d6  ca         dex              		DEX	
+.a0d7  86 dc      stx $dc          		STX	OMOVE        	; MOVE IT
+.a0d9  d0 1c      bne $a0f7        		BNE	MV2            	; (JMP)
+.a0db  a9 ff      lda #$ff         END		LDA     #$FF		; *ADD - STOP CANNED MOVES
+.a0dd  85 dc      sta $dc          		STA	OMOVE        	; FLAG OPENING
+.a0df  a2 0c      ldx #$0c         NOOPEN	LDX	#$0C            	; FINISHED
+.a0e1  86 b5      stx $b5          		STX	_STATE        	; _STATE=C
+.a0e3  86 fa      stx $fa          		STX	BESTV        	; CLEAR BESTV
+.a0e5  a2 14      ldx #$14         		LDX	#$14           	; GENERATE P
+.a0e7  20 1b 9f   jsr $9f1b        		JSR	GNMX          	; MOVES
+.a0ea  a2 04      ldx #$04         		LDX	#$04           	; _STATE=4
+.a0ec  86 b5      stx $b5          		STX	_STATE        	; GENERATE AND
+.a0ee  20 19 9f   jsr $9f19        		JSR	GNMZ          	; TEST AVAILABLE
+.a0f1  a6 fa      ldx $fa          		LDX	BESTV        	; GET BEST MOVE
+.a0f3  e0 0f      cpx #$0f         		CPX	#$0F           	; IF NONE
+.a0f5  90 15      bcc $a10c        		BCC	MATE          	; OH OH!
+.a0f7  a6 fb      ldx $fb          MV2		LDX	BESTP        	; MOVE
+.a0f9  b5 50      lda $50,x        		LDA	BOARD,X         ; THE
+.a0fb  85 fa      sta $fa          		STA	BESTV        	; BEST
+.a0fd  86 b0      stx $b0          		STX	PIECE        	; MOVE
+.a0ff  a5 f9      lda $f9          		LDA	BESTM
+.a101  85 b1      sta $b1          		STA	SQUARE       	; AND DISPLAY
+.a103  20 65 a0   jsr $a065        		JSR	MOVE           	; IT
+.a106  20 85 a1   jsr $a185        		jsr     addhist		; add move to history
+.a109  4c 06 9e   jmp $9e06        		JMP	CHESS
+.a10c  a9 ff      lda #$ff         MATE		LDA	#$FF           	; RESIGN
+.a10e  60         rts              		RTS			; OR STALEMATE
+.a10f  a2 04      ldx #$04         DISMV		LDX	#$04           	; ROTATE
+.a111  06 f9      asl $f9          DROL		ASL	DIS3          	; KEY
+.a113  26 fa      rol $fa          		ROL	DIS2         	; INTO
+.a115  ca         dex              		DEX			; DISPLAY
+.a116  d0 f9      bne $a111        		BNE	DROL		;
+.a118  05 f9      ora $f9          		ORA	DIS3
+.a11a  85 f9      sta $f9          		STA	DIS3
+.a11c  85 b1      sta $b1          		STA	SQUARE
+.a11e  60         rts              		RTS	
+.a11f  18         clc              STRATGY	CLC	
+.a120  a9 80      lda #$80         		LDA	#$80
+.a122  65 eb      adc $eb          		ADC	WMOB         	; PARAMETERS
+.a124  65 ec      adc $ec          		ADC	WMAXC        	; WITH WHEIGHT
+.a126  65 ed      adc $ed          		ADC	WCC          	; OF O25
+.a128  65 e1      adc $e1          		ADC	WCAP1
+.a12a  65 df      adc $df          		ADC	WCAP2
+.a12c  38         sec              		SEC	
+.a12d  e5 f0      sbc $f0          		SBC	PMAXC
+.a12f  e5 f1      sbc $f1          		SBC	PCC
+.a131  e5 e2      sbc $e2          		SBC	BCAP0
+.a133  e5 e0      sbc $e0          		SBC	BCAP1
+.a135  e5 de      sbc $de          		SBC	BCAP2
+.a137  e5 ef      sbc $ef          		SBC	PMOB
+.a139  e5 e3      sbc $e3          		SBC	BMOB
+.a13b  b0 02      bcs $a13f        		BCS	POS           	; UNDERFLOW
+.a13d  a9 00      lda #$00         		LDA	#$00           	; PREVENTION
+.a13f  4a         lsr              POS		LSR	
+.a140  18         clc              		CLC			; **************
+.a141  69 40      adc #$40         		ADC	#$40
+.a143  65 ec      adc $ec          		ADC	WMAXC       	; PARAMETERS
+.a145  65 ed      adc $ed          		ADC	WCC         	; WITH WEIGHT
+.a147  38         sec              		SEC			; OF 05
+.a148  e5 e4      sbc $e4          		SBC	BMAXC
+.a14a  4a         lsr              		LSR			; **************
+.a14b  18         clc              		CLC	
+.a14c  69 90      adc #$90         		ADC	#$90
+.a14e  65 dd      adc $dd          		ADC	WCAP0       	; PARAMETERS
+.a150  65 dd      adc $dd          		ADC	WCAP0       	; WITH WEIGHT
+.a152  65 dd      adc $dd          		ADC	WCAP0       	; OF 10
+.a154  65 dd      adc $dd          		ADC	WCAP0
+.a156  65 e1      adc $e1          		ADC	WCAP1
+.a158  38         sec              		SEC			; [UNDER OR _OVER-
+.a159  e5 e4      sbc $e4          		SBC	BMAXC        	; FLOW MAY OCCUR
+.a15b  e5 e4      sbc $e4          		SBC	BMAXC        	; FROM THIS
+.a15d  e5 e5      sbc $e5          		SBC	BMCC          	; SECTION]
+.a15f  e5 e5      sbc $e5          		SBC	BMCC
+.a161  e5 e0      sbc $e0          		SBC	BCAP1
+.a163  a6 b1      ldx $b1          		LDX	SQUARE      	; ***************
+.a165  e0 33      cpx #$33         		CPX	#$33
+.a167  f0 16      beq $a17f        		BEQ	POSN         	; POSITION
+.a169  e0 34      cpx #$34         		CPX	#$34           	; BONUS FOR
+.a16b  f0 12      beq $a17f        		BEQ	POSN         	; MOVE TO
+.a16d  e0 22      cpx #$22         		CPX	#$22           	; CENTRE
+.a16f  f0 0e      beq $a17f        		BEQ	POSN           	; OR
+.a171  e0 25      cpx #$25         		CPX	#$25           	; OUT OF
+.a173  f0 0a      beq $a17f        		BEQ	POSN         	; BACK RANK
+.a175  a6 b0      ldx $b0          		LDX	PIECE
+.a177  f0 09      beq $a182        		BEQ	NOPOSN
+.a179  b4 50      ldy $50,x        		LDY	BOARD,X
+.a17b  c0 10      cpy #$10         		CPY	#$10
+.a17d  10 03      bpl $a182        		BPL	NOPOSN
+.a17f  18         clc              POSN		CLC
+.a180  69 02      adc #$02         		ADC	#$02
+.a182  4c 91 a0   jmp $a091        NOPOSN	JMP	CKMATE       		; CONTINUE
+.a185  a6 fd      ldx $fd          ADDHIST		LDX     HIST
+.a187  e8         inx              		INX
+.a188  ad c8 01   lda $01c8        		LDA     $01C8
+.a18b  9d 00 16   sta $1600,x      		STA	HIST1,X
+.a18e  ad c7 01   lda $01c7        		LDA	$01C7
+.a191  9d 00 17   sta $1700,x      		STA	HIST2,X
+.a194  ad c6 01   lda $01c6        		LDA	$01C6
+.a197  9d 00 18   sta $1800,x      		STA	HIST3,X
+.a19a  ad c5 01   lda $01c5        		LDA	$01C5
+.a19d  9d 00 19   sta $1900,x      		STA	HIST4,X
+.a1a0  86 fd      stx $fd          		STX	HIST
+.a1a2  60         rts              		RTS
+.a1a3  a4 fd      ldy $fd          UNDO		LDY     HIST
+.a1a5  f0 19      beq $a1c0        		BEQ	UNDO1
+.a1a7  b9 00 19   lda $1900,y      		LDA	$1900,Y
+.a1aa  85 b0      sta $b0          		STA	PIECE        	; PIECE
+.a1ac  aa         tax              		TAX	
+.a1ad  b9 00 18   lda $1800,y      		LDA	$1800,Y
+.a1b0  95 50      sta $50,x        		STA	BOARD,X
+.a1b2  b9 00 17   lda $1700,y      		LDA     $1700,Y
+.a1b5  aa         tax              		TAX	
+.a1b6  b9 00 16   lda $1600,y      		LDA	$1600,Y
+.a1b9  85 b1      sta $b1          		STA	SQUARE
+.a1bb  95 50      sta $50,x        		STA	BOARD,X
+.a1bd  88         dey              		DEY
+.a1be  84 fd      sty $fd          		STY     HIST
+.a1c0  60         rts              UNDO1		RTS
+.a1c1  a9 b8      lda #$b8         POUT		lda	#<menu0
+.a1c3  85 00      sta $00          		sta	mnu
+.a1c5  a9 a2      lda #$a2         		lda	#>menu0
+.a1c7  85 01      sta $01          		sta	mnu+1
+.a1c9  20 7b a2   jsr $a27b                	jsr 	pout9		; print CRLF
+.a1cc  20 9f a2   jsr $a29f        		jsr     pout13		; print copyright
+.a1cf  20 86 a2   jsr $a286        		JSR	POUT10		; print column labels
+.a1d2  a0 00      ldy #$00         		LDY   	#$00		; init board location
+.a1d4  20 3a a2   jsr $a23a        		JSR	POUT5		; print board horz edge
+.a1d7  a9 7c      lda #$7c         POUT1		lDA   	#"|"		; print vert edge
+.a1d9  20 f4 a4   jsr $a4f4        		JSR   	cout		; PRINT ONE ASCII CHR - SPACE
+.a1dc  a2 1f      ldx #$1f         		LDX   	#$1F
+.a1de  98         tya              POUT2		TYA			; scan the pieces for a location match
+.a1df  d5 50      cmp $50,x                    	CMP	BOARD,X		; match found?
+.a1e1  f0 40      beq $a223                    	BEQ   	POUT4		; yes; print the piece's color and type
+.a1e3  ca         dex                          	DEX			; no
+.a1e4  10 f8      bpl $a1de                    	BPL	POUT2		; if not the last piece, try again
+.a1e6  98         tya              		tya			; empty square	
+.a1e7  29 01      and #$01         		and	#$01		; odd or even column?				
+.a1e9  85 fc      sta $fc          		sta   	temp		; save it
+.a1eb  98         tya              		tya  			; is the row odd or even
+.a1ec  4a         lsr              		lsr			; shift column right 4 spaces 
+.a1ed  4a         lsr              		lsr			;
+.a1ee  4a         lsr              		lsr			;
+.a1ef  4a         lsr              		lsr			;
+.a1f0  29 01      and #$01         		and   	#$01		; strip LSB  
+.a1f2  18         clc              		clc			; 
+.a1f3  65 fc      adc $fc          		adc   	temp		; combine row & col to determine square color  
+.a1f5  29 01      and #$01         		and   	#$01		; is board square white or blk?
+.a1f7  d0 03      bne $a1fc        		bne	pout25 		; white, print space
+.a1f9  a9 2a      lda #$2a         		lda   	#"*"		; black, print *
+
+>a1fb  2c                          		.byte	$2c		; used to skip _OVER LDA #$20
+
+.a1fc  a9 20      lda #$20         POUT25		LDA   	#$20		; ASCII space
+.a1fe  20 f4 a4   jsr $a4f4        		JSR   	cout		; PRINT ONE ASCII CHR - SPACE
+.a201  20 f4 a4   jsr $a4f4        		JSR   	cout		; PRINT ONE ASCII CHR - SPACE
+.a204  c8         iny              POUT3		INY			; 
+.a205  98         tya              	        TYA			; get row number
+.a206  29 08      and #$08                     	AND   	#$08		; have we completed the row?	 
+.a208  f0 cd      beq $a1d7                    	BEQ   	POUT1		; no, do next column
+.a20a  a9 7c      lda #$7c         		LDA   	#"|"		; yes, put the right edge on
+.a20c  20 f4 a4   jsr $a4f4        		JSR   	cout		; PRINT ONE ASCII CHR - |             
+.a20f  20 98 a2   jsr $a298        		jsr	pout12		; print row number
+.a212  20 7b a2   jsr $a27b        		JSR   	POUT9		; print CRLF
+.a215  20 3a a2   jsr $a23a                    	JSR   	POUT5		; print bottom edge of board
+.a218  18         clc              		CLC			; 
+.a219  98         tya              		TYA			; 
+.a21a  69 08      adc #$08         		ADC	#$08		; point y to beginning of next row
+.a21c  a8         tay              		TAY			;
+.a21d  c0 80      cpy #$80         		CPY   	#$80		; was that the last row?
+.a21f  f0 3e      beq $a25f        		BEQ   	POUT8		; yes, print the LED values
+.a221  d0 b4      bne $a1d7        		BNE   	POUT1		; no, do new row
+.a223  a5 b7      lda $b7          POUT4		LDA   	REV		; print piece's color & type
+.a225  f0 05      beq $a22c        		BEQ   	POUT41		;
+.a227  bd e5 a3   lda $a3e5,x      		LDA	cpl+16,X	;
+.a22a  d0 03      bne $a22f        		BNE	POUT42		;
+.a22c  bd d5 a3   lda $a3d5,x      POUT41		LDA   	cpl,x		;
+.a22f  20 f4 a4   jsr $a4f4        POUT42		JSR	cout		;
+.a232  bd 05 a4   lda $a405,x      		lda	cph,x		;
+.a235  20 f4 a4   jsr $a4f4        		jsr   	cout		; 
+.a238  d0 ca      bne $a204        		BNE	POUT3		; branch always
+.a23a  8a         txa              POUT5       	TXA			; print "-----...-----<crlf>"
+.a23b  48         pha              		PHA
+.a23c  a2 19      ldx #$19         		LDX	#$19
+.a23e  a9 2d      lda #$2d         		LDA	#"-"
+.a240  20 f4 a4   jsr $a4f4        POUT6		JSR   	cout		; PRINT ONE ASCII CHR - "-"
+.a243  ca         dex              		DEX
+.a244  d0 fa      bne $a240        		BNE	POUT6
+.a246  68         pla              		PLA
+.a247  aa         tax              		TAX
+.a248  a9 19      lda #$19         		lda	#25
+.a24a  85 02      sta $02          		sta	mnu+2
+.a24c  b2 00      lda ($00)        POUT7		lda	(mnu)
+.a24e  e6 00      inc $00          		inc	mnu
+.a250  d0 02      bne $a254        		bne	POUT77
+.a252  e6 01      inc $01          		inc	mnu+1
+.a254  20 f4 a4   jsr $a4f4        POUT77		jsr 	cout
+.a257  c6 02      dec $02          		dec	mnu+2
+.a259  d0 f1      bne $a24c        		bne	POUT7
+.a25b  20 7b a2   jsr $a27b        		JSR	POUT9
+.a25e  60         rts              		RTS	 		
+.a25f  20 86 a2   jsr $a286        POUT8		jsr	pout10		; 
+.a262  a5 fb      lda $fb          		LDA   	$FB
+.a264  20 60 e7   jsr $e760        		JSR   	print1byte	; PRINT 1 BYTE AS 2 HEX CHRS	
+.a267  a9 20      lda #$20                 	LDA   	#$20
+.a269  20 f4 a4   jsr $a4f4        		JSR   	cout		; PRINT ONE ASCII CHR - SPACE
+.a26c  a5 fa      lda $fa                  	LDA   	$FA
+.a26e  20 60 e7   jsr $e760        		JSR   	print1byte	; PRINT 1 BYTE AS 2 HEX CHRS	
+.a271  a9 20      lda #$20                 	LDA   	#$20
+.a273  20 f4 a4   jsr $a4f4        		JSR   	cout		; PRINT ONE ASCII CHR - SPACE
+.a276  a5 f9      lda $f9                  	LDA   	$F9
+.a278  20 60 e7   jsr $e760        		JSR   	print1byte	; PRINT 1 BYTE AS 2 HEX CHRS	
+.a27b  a9 0d      lda #$0d         POUT9      	LDA   	#$0D
+.a27d  20 f4 a4   jsr $a4f4        		JSR   	cout		; PRINT ONE ASCII CHR - CR
+.a280  a9 0a      lda #$0a                 	LDA   	#$0A
+.a282  20 f4 a4   jsr $a4f4        		JSR   	cout		; PRINT ONE ASCII CHR - LF
+.a285  60         rts                              RTS 
+.a286  a2 00      ldx #$00         pout10		ldx   	#$00		; print the column labels
+.a288  a9 20      lda #$20         POUT11		lda	#$20		; 00 01 02 03 ... 07 <CRLF>
+.a28a  20 f4 a4   jsr $a4f4        		jsr   	cout
+.a28d  8a         txa              		txa
+.a28e  20 60 e7   jsr $e760        		jsr	print1byte
+.a291  e8         inx              		INX
+.a292  e0 08      cpx #$08         		CPX   	#$08
+.a294  d0 f2      bne $a288        		BNE	POUT11
+.a296  f0 e3      beq $a27b        		BEQ	POUT9
+.a298  98         tya              POUT12		TYA
+.a299  29 70      and #$70         		and 	#$70
+.a29b  20 60 e7   jsr $e760        		JSR 	print1byte
+.a29e  60         rts              		rts
+.a29f  a2 00      ldx #$00         Pout13		ldx   	#$00		; Print the copyright banner
+.a2a1  bd 99 a3   lda $a399,x      Pout14		lda   	banner,x
+.a2a4  f0 06      beq $a2ac        		beq   	POUT15
+.a2a6  20 f4 a4   jsr $a4f4        		jsr   	cout
+.a2a9  e8         inx              		inx
+.a2aa  d0 f5      bne $a2a1        		bne   	POUT14
+.a2ac  60         rts              POUT15		rts         
+.a2ad  a9 3f      lda #$3f         KIN        	LDA   	#"?"
+.a2af  20 f4 a4   jsr $a4f4        		JSR   	cout		; PRINT ONE ASCII CHR - ?
+.a2b2  20 dc a4   jsr $a4dc        		JSR   	cin		; GET A KEYSTROKE FROM SYSTEM
+.a2b5  29 4f      and #$4f                     	AND   	#$4F            ; MASK 0-7, AND ALPHA'S
+.a2b7  60         rts                          	RTS
+
+>a2b8  20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20  menu0		.byte	"                         "
+>a2d1  20 20 20 5b 45 6e 74 65 72 5d 20 2d 20 75 73 65 72 20 6d 6f 76 65 20 20 20  menu1		.byte	"   [Enter] - user move   "
+>a2ea  20 20 20 20 20 5b 42 5d 20 2d 20 55 6e 64 6f 20 6d 6f 76 65 20 20 20 20 20  menu2		.byte	"     [B] - Undo move     "
+>a303  20 20 20 20 20 5b 43 5d 20 2d 20 52 65 73 65 74 20 42 6f 61 72 64 20 20 20  menu3		.byte	"     [C] - Reset Board   "
+>a31c  20 20 20 20 20 5b 45 5d 20 2d 20 53 77 61 70 20 53 69 64 65 73 20 20 20 20  menu4		.byte	"     [E] - Swap Sides    "
+>a335  20 20 20 20 20 5b 50 5d 20 2d 20 43 6f 6d 70 75 74 65 72 20 6d 6f 76 65 20  menu5		.byte	"     [P] - Computer move "
+>a34e  20 20 20 20 20 5b 51 5d 20 2d 20 71 75 69 74 65 20 67 61 6d 65 20 20 20 20  menu6		.byte	"     [Q] - quite game    "
+>a367  20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20  menu7		.byte	"                         "
+>a380  20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20  menu8		.byte	"                         "
+>a399  4d 69 63 72 6f 43 68 65 73 73 20 28 63 29 20 31 39 39 36 2d 32 30 30 32 20 50 65 74 65 72 20 4a 65 6e 6e 69 6e 67 73 2c 20 70 65 74 65 72 6a 40 62 65 6e 6c 6f 2e 63 6f 6d  banner		.byte	"MicroChess (c) 1996-2002 Peter Jennings, peterj@benlo.com"
+>a3d2  0d 0a 00                    		.byte	$0d, $0a, $00
+>a3d5  57 57 57 57 57 57 57 57 57 57 57 57 57 57 57 57 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 57 57 57 57 57 57 57 57 57 57 57 57 57 57 57 57  cpl		.byte	"WWWWWWWWWWWWWWWWBBBBBBBBBBBBBBBBWWWWWWWWWWWWWWWW"
+>a405  4b 51 43 43 42 42 52 52 50 50 50 50 50 50 50 50 4b 51 43 43 42 42 52 52 50 50 50 50 50 50 50 50  cph		.byte	"KQCCBBRRPPPPPPPPKQCCBBRRPPPPPPPP"
+>a425  00                          		.byte	$00
+>a426  03 04 00 07 02 05 01 06     SETW		.byte 	$03, $04, $00, $07, $02, $05, $01, $06
+>a42e  10 17 11 16 12 15 14 13             	.byte 	$10, $17, $11, $16, $12, $15, $14, $13
+>a436  73 74 70 77 72 75 71 76             	.byte 	$73, $74, $70, $77, $72, $75, $71, $76
+>a43e  60 67 61 66 62 65 64 63     	 	.byte	$60, $67, $61, $66, $62, $65, $64, $63
+>a446  00 f0 ff 01 10 11 0f ef f1  MOVEX   	.byte 	$00, $F0, $FF, $01, $10, $11, $0F, $EF, $F1
+>a44f  df e1 ee f2 12 0e 1f 21     		.byte	$DF, $E1, $EE, $F2, $12, $0E, $1F, $21
+>a457  0b 0a 06 06 04 04 04 04     POINTS  	.byte 	$0B, $0A, $06, $06, $04, $04, $04, $04
+>a45f  02 02 02 02 02 02 02 02     		.byte 	$02, $02, $02, $02, $02, $02, $02, $02
+>a467  99 25 0b 25 01 00 33 25     OPNING  	.byte 	$99, $25, $0B, $25, $01, $00, $33, $25
+>a46f  07 36 34 0d 34 34 0e 52     		.byte	$07, $36, $34, $0D, $34, $34, $0E, $52
+>a477  25 0d 45 35 04 55 22 06             	.byte 	$25, $0D, $45, $35, $04, $55, $22, $06
+>a47f  43 33 0f cc                 		.byte	$43, $33, $0F, $CC
+.a483                              _top
+
+.a483  a2 dc      ldx #$dc         ACIA1_init     LDX   #<ACIA1_Input      ; set up RAM vectors for
+.a485  a9 a4      lda #$a4                        LDA   #>ACIA1_Input      ; Input, Output, and Scan
+.a487  a8         tay                             TAY                     	; Routines
+.a488  49 a5      eor #$a5                        EOR   #$A5              	;
+.a48a  8d ed 03   sta $03ed                       sta   ChrInVect+2       	;
+.a48d  8c ec 03   sty $03ec                       sty   ChrInVect+1       	;
+.a490  8e eb 03   stx $03eb                       stx   ChrInVect         	;
+.a493  a2 e7      ldx #$e7                        LDX   #<ACIA1_Scan  	;
+.a495  a9 a4      lda #$a4                        LDA   #>ACIA1_Scan       ;
+.a497  a8         tay                             TAY                     	;
+.a498  49 a5      eor #$a5                        EOR   #$A5              	;
+.a49a  8d f0 03   sta $03f0                       sta   ScanInVect+2      	;
+.a49d  8c ef 03   sty $03ef                       sty   ScanInVect+1      	;
+.a4a0  8e ee 03   stx $03ee                       stx   ScanInVect        	;
+.a4a3  a2 f4      ldx #$f4                        LDX   #<ACIA1_Output     ;
+.a4a5  a9 a4      lda #$a4                        LDA   #>ACIA1_Output     ;
+.a4a7  a8         tay                             TAY                     	;
+.a4a8  49 a5      eor #$a5                        EOR   #$A5              	;
+.a4aa  8d f3 03   sta $03f3                       sta   ChrOutVect+2      	;
+.a4ad  8c f2 03   sty $03f2                       sty   ChrOutVect+1      	;
+.a4b0  8e f1 03   stx $03f1                       stx   ChrOutVect        	;
+.a4b3  a9 e7      lda #$e7                        lda   #<ACIA1_scan      	; setup BASIC vectors
+.a4b5  8d 05 04   sta $0405                       sta   VEC_IN
+.a4b8  a9 a4      lda #$a4         	       lda   #>ACIA1_scan	; BASIC's chr input
+.a4ba  8d 06 04   sta $0406                       sta   VEC_IN+1
+.a4bd  a9 f4      lda #$f4                        lda   #<ACIA1_Output	
+.a4bf  8d 07 04   sta $0407                       sta   VEC_OUT
+.a4c2  a9 a4      lda #$a4         	       lda   #>ACIA1_Output	; BASIC's chr output 
+.a4c4  8d 08 04   sta $0408                       sta   VEC_OUT+1
+.a4c7  a9 59      lda #$59         	       lda   #<Psave
+.a4c9  8d 0b 04   sta $040b                       sta   VEC_SV
+.a4cc  a9 e6      lda #$e6         	       lda   #>Psave		; SAVE cmd
+.a4ce  8d 0c 04   sta $040c                       sta   VEC_SV+1
+.a4d1  a9 82      lda #$82         	       lda   #<pload
+.a4d3  8d 09 04   sta $0409                       sta   VEC_LD
+.a4d6  a9 e6      lda #$e6         	       lda   #>pload		; LOAD cmd
+.a4d8  8d 0a 04   sta $040a                       sta   VEC_LD+1
+.a4db  60         rts                             rts                      ; done
+.a4dc                              cin
+.a4dc                              acia1_input
+.a4dc  ad c0 3f   lda $3fc0                       lda   UCSR0A             ; Serial port status             
+.a4df  29 80      and #$80                        and   #$80               ; RXC0 bit
+.a4e1  f0 f9      beq $a4dc                       beq   ACIA1_Input        ; no char to get
+.a4e3  ad c6 3f   lda $3fc6                       lda   UDR0               ; get chr
+.a4e6  60         rts                             RTS                      ;
+.a4e7                              cscan
+.a4e7  18         clc              ACIA1_Scan     clc
+.a4e8  ad c0 3f   lda $3fc0                       lda   UCSR0A             ; Serial port status             
+.a4eb  29 80      and #$80                        and   #$80               ; RXC0 bit
+.a4ed  f0 04      beq $a4f3                       beq   ACIA1_scan2
+.a4ef  ad c6 3f   lda $3fc6                       lda   UDR0               ; get chr	         
+.a4f2  38         sec                             sec
+.a4f3  60         rts              ACIA1_scan2    rts
+.a4f4                              cout
+.a4f4  48         pha              ACIA1_Output   PHA                      ; save registers
+.a4f5  ad c0 3f   lda $3fc0        ACIA1_Out1     lda   UCSR0A             ; Serial port status             
+.a4f8  29 20      and #$20                        and   #$20               ; UDRE0 bit
+.a4fa  f0 f9      beq $a4f5                       beq   ACIA1_Out1         ; no
+.a4fc  68         pla                             PLA                      ; get chr
+.a4fd  8d c6 3f   sta $3fc6                       sta   UDR0               ; put character to Port
+.a500  60         rts                             RTS                      ; done
+.a501  a9 0d      lda #$0d         CROUT		lda	#$0d
+.a503  20 f4 a4   jsr $a4f4        		jsr	cout
+.a506  a9 0a      lda #$0a         		lda	#$0a
+.a508  80 ea      bra $a4f4        		bra	cout
+.a50a  20 e7 a4   jsr $a4e7        cbrk		jsr	cscan
+.a50d  90 05      bcc $a514        		bcc	cbrk2
+.a50f  c9 03      cmp #$03         		cmp	#$03
+.a511  f0 01      beq $a514        		beq	cbrk2
+.a513  18         clc              		clc
+.a514  60         rts              cbrk2		rts	
+
+.a600  ea         nop              ENTER     NOP            ; Vector to COLD entry
+.a601  4c ba 13   jmp $13ba                  JMP COLD+2     ;
+.a604  ea         nop              REENTR    NOP            ; User Warm entry point
+.a605  4c ca 13   jmp $13ca                  JMP WARM       ; Vector to WARM entry
+
+>a608  04 00                                 .WORD $0004    ; 6502 in radix-36
+>a60a  d2 5e                                 .WORD $5ED2    ;
+>a60c  5a 1b                                 .WORD NTOP     ; Name address of MON
+>a60e  7f 00                                 .WORD $7F      ; Backspace Character
+>a610  80 3e                                 .WORD UAREA    ; Initial User Area
+>a612  9f 00                                 .WORD TOS      ; Initial Top of Stack
+>a614  ff 01                                 .WORD $1FF     ; Initial Top of Return Stack
+>a616  00 01                                 .WORD TIBX     ; Initial terminal input buffer
+>a618  1f 00                                 .WORD 31       ; Initial name field width
+>a61a  01 00                                 .WORD 1        ; 0=nod disk, 1=disk
+>a61c  65 1b                                 .WORD TOP      ; Initial fence address
+>a61e  65 1b                                 .WORD TOP      ; Initial top of dictionary
+>a620  31 13                                 .WORD VL0      ; Initial Vocabulary link ptr.
+
+.a622  ea         nop                        nop
+.a623  ea         nop                        nop 	
+
+>a624  83 4c 49 d4                 L22       .BYTE $83,"LI",$D4            ; <--- name field
+>a628  00 00                                 .WORD 00       ; last link marked by zero
+>a62a  2c 04                       LIT       .WORD *+2      ; <----- code address field
+
+.a62c  b1 af      lda ($af),y                LDA (IP),Y     ; <----- start of parameter field
+.a62e  48         pha                        PHA
+.a62f  e6 af      inc $af                    INC IP
+.a631  d0 02      bne $a635                  BNE L30
+.a633  e6 b0      inc $b0                    INC IP+1
+.a635  b1 af      lda ($af),y      L30       LDA (IP),Y
+.a637  e6 af      inc $af          L31       INC IP
+.a639  d0 02      bne $a63d                  BNE PUSH
+.a63b  e6 b0      inc $b0                    INC IP+1
+.a63d  ca         dex              PUSH      DEX
+.a63e  ca         dex                        DEX
+.a63f  95 01      sta $01,x        PUT       STA 1,X
+.a641  68         pla                        PLA
+.a642  95 00      sta $00,x                  STA 0,X
+.a644  a0 01      ldy #$01         NEXT      LDY #1
+.a646  b1 af      lda ($af),y                LDA (IP),Y     ; Fetch code field address pointed
+.a648  85 b3      sta $b3                    STA W+1        ; to by IP.
+.a64a  88         dey                        DEY
+.a64b  b1 af      lda ($af),y                LDA (IP),Y
+.a64d  85 b2      sta $b2                    STA W
+.a64f  18         clc                        CLC            ; Increment IP by two.
+.a650  a5 af      lda $af                    LDA IP
+.a652  69 02      adc #$02                   ADC #2
+.a654  85 af      sta $af                    STA IP
+.a656  90 02      bcc $a65a                  BCC L54
+.a658  e6 b0      inc $b0                    INC IP+1
+.a65a  4c b1 00   jmp $00b1        L54       JMP W-1       ; Jump to an indirect jump (W) which
+
+>a65d  84 43 4c 49 d4              L35       .BYTE $84,"CLI",$D4
+>a662  24 04                                 .WORD L22      ; Link to LIT
+>a664  66 04                       CLIT      .WORD *+2
+
+.a666  b1 af      lda ($af),y                LDA (IP),Y
+.a668  48         pha                        PHA
+.a669  98         tya                        TYA
+.a66a  f0 cb      beq $a637                  BEQ L31        ; a forced branch into LIT
+.a66c  0a         asl              SETUP     ASL 
+.a66d  85 a6      sta $a6                    STA N-1
+.a66f  b5 00      lda $00,x        L63       LDA 0,X
+.a671  99 a7 00   sta $00a7,y                STA N,Y
+.a674  e8         inx                        INX
+.a675  c8         iny                        INY
+.a676  c4 a6      cpy $a6                    CPY N-1
+.a678  d0 f5      bne $a66f                  BNE L63
+.a67a  a0 00      ldy #$00                   LDY #0
+.a67c  60         rts                        RTS
+
+>a67d  87 45 58 45 43 55 54 c5     L75       .BYTE $87,"EXECUT",$C5
+>a685  5d 04                                 .WORD L35      ; link to CLIT
+>a687  89 04                       EXEC      .WORD *+2
+
+.a689  b5 00      lda $00,x                  LDA 0,X
+.a68b  85 b2      sta $b2                    STA W
+.a68d  b5 01      lda $01,x                  LDA 1,X
+.a68f  85 b3      sta $b3                    STA W+1
+.a691  e8         inx                        INX
+.a692  e8         inx                        INX
+.a693  4c b1 00   jmp $00b1                  JMP W-1        ; to JMP (W) in z-page
+
+>a696  86 42 52 41 4e 43 c8        L89       .BYTE $86,"BRANC",$C8
+>a69d  7d 04                                 .WORD L75      ; link to EXCECUTE
+>a69f  a1 04                       BRAN      .WORD *+2
+
+.a6a1  18         clc                        CLC
+.a6a2  b1 af      lda ($af),y                LDA (IP),Y
+.a6a4  65 af      adc $af                    ADC IP
+.a6a6  48         pha                        PHA
+.a6a7  c8         iny                        INY
+.a6a8  b1 af      lda ($af),y                LDA (IP),Y
+.a6aa  65 b0      adc $b0                    ADC IP+1
+.a6ac  85 b0      sta $b0                    STA IP+1
+.a6ae  68         pla                        PLA
+.a6af  85 af      sta $af                    STA IP
+.a6b1  4c 46 04   jmp $0446                  JMP NEXT +2
+
+>a6b4  87 30 42 52 41 4e 43 c8     L107      .BYTE $87,"0BRANC",$C8
+>a6bc  96 04                                 .WORD L89      ; link to BRANCH
+>a6be  c0 04                       ZBRAN     .WORD *+2
+
+.a6c0  e8         inx                        INX
+.a6c1  e8         inx                        INX
+.a6c2  b5 fe      lda $fe,x                  LDA $FE,X
+.a6c4  15 ff      ora $ff,x                  ORA $FF,X
+.a6c6  f0 d9      beq $a6a1                  BEQ BRAN+2
+.a6c8  18         clc              BUMP      CLC
+.a6c9  a5 af      lda $af                    LDA IP
+.a6cb  69 02      adc #$02                   ADC #2
+.a6cd  85 af      sta $af                    STA IP
+.a6cf  90 02      bcc $a6d3                  BCC L122
+.a6d1  e6 b0      inc $b0                    INC IP+1
+.a6d3  4c 44 04   jmp $0444        L122      JMP NEXT
+
+>a6d6  86 28 4c 4f 4f 50 a9        L127      .BYTE $86,"(LOOP",$A9
+>a6dd  b4 04                                 .WORD L107     ; link to 0BRANCH
+>a6df  e1 04                       PLOOP     .WORD L130
+
+.a6e1  86 b6      stx $b6          L130      STX  XSAVE
+.a6e3  ba         tsx                        TSX
+.a6e4  fe 01 01   inc $0101,x                INC $101,X
+.a6e7  d0 03      bne $a6ec                  BNE PL1
+.a6e9  fe 02 01   inc $0102,x                INC $102,X
+.a6ec  18         clc              PL1       CLC
+.a6ed  bd 03 01   lda $0103,x                LDA $103,X
+.a6f0  fd 01 01   sbc $0101,x                SBC $101,X
+.a6f3  bd 04 01   lda $0104,x                LDA $104,X
+.a6f6  fd 02 01   sbc $0102,x                SBC $102,X
+.a6f9  a6 b6      ldx $b6          PL2       LDX XSAVE
+.a6fb  0a         asl                        ASL 
+.a6fc  90 a3      bcc $a6a1                  BCC BRAN+2
+.a6fe  68         pla                        PLA
+.a6ff  68         pla                        PLA
+.a700  68         pla                        PLA
+.a701  68         pla                        PLA
+.a702  4c c8 04   jmp $04c8                  JMP BUMP
+
+>a705  87 28 2b 4c 4f 4f 50 a9     L154      .BYTE $87,"(+LOOP",$A9
+>a70d  d6 04                                 .WORD L127     ; link to (loop)
+>a70f  11 05                       PPLOO     .WORD *+2
+
+.a711  e8         inx                        INX
+.a712  e8         inx                        INX
+.a713  86 b6      stx $b6                    STX XSAVE
+.a715  b5 ff      lda $ff,x                  LDA $FF,X
+.a717  48         pha                        PHA
+.a718  48         pha                        PHA
+.a719  b5 fe      lda $fe,x                  LDA $FE,X
+.a71b  ba         tsx                        TSX
+.a71c  e8         inx                        INX
+.a71d  e8         inx                        INX
+.a71e  18         clc                        CLC
+.a71f  7d 01 01   adc $0101,x                ADC $101,X
+.a722  9d 01 01   sta $0101,x                STA $101,X
+.a725  68         pla                        PLA
+.a726  7d 02 01   adc $0102,x                ADC $102,X
+.a729  9d 02 01   sta $0102,x                STA $102,X
+.a72c  68         pla                        PLA
+.a72d  10 bd      bpl $a6ec                  BPL PL1
+.a72f  18         clc                        CLC
+.a730  bd 01 01   lda $0101,x                LDA $101,X
+.a733  fd 03 01   sbc $0103,x                SBC $103,X
+.a736  bd 02 01   lda $0102,x                LDA $102,X
+.a739  fd 04 01   sbc $0104,x                SBC $104,X
+.a73c  4c f9 04   jmp $04f9                  JMP PL2
+
+>a73f  84 28 44 4f a9              L185      .BYTE $84,"(DO",$A9
+>a744  05 05                                 .WORD L154     ; link to (+LOOP)
+>a746  48 05                       PDO       .WORD *+2
+
+.a748  b5 03      lda $03,x                  LDA 3,X
+.a74a  48         pha                        PHA
+.a74b  b5 02      lda $02,x                  LDA 2,X
+.a74d  48         pha                        PHA
+.a74e  b5 01      lda $01,x                  LDA 1,X
+.a750  48         pha                        PHA
+.a751  b5 00      lda $00,x                  LDA 0,X
+.a753  48         pha                        PHA
+.a754  e8         inx              POPTWO    INX
+.a755  e8         inx                        INX
+.a756  e8         inx              POP       INX
+.a757  e8         inx                        INX
+.a758  4c 44 04   jmp $0444                  JMP NEXT
+
+>a75b  81 c9                       L207      .BYTE $81,$C9
+>a75d  3f 05                                 .WORD L185     ; link to (DO)
+>a75f  d5 07                       I         .WORD R+2      ; share the code for R
+>a761  85 44 49 47 49 d4           L214      .BYTE $85,"DIGI",$D4
+>a767  5b 05                                 .WORD L207     ; link to I
+>a769  6b 05                       DIGIT     .WORD *+2
+
+.a76b  38         sec                        SEC
+.a76c  b5 02      lda $02,x                  LDA 2,X
+.a76e  e9 30      sbc #$30                   SBC #$30
+.a770  30 18      bmi $a78a                  BMI L234
+.a772  c9 0a      cmp #$0a                   CMP #$A
+.a774  30 07      bmi $a77d                  BMI L227
+.a776  38         sec                        SEC
+.a777  e9 07      sbc #$07                   SBC #7
+.a779  c9 0a      cmp #$0a                   CMP #$A
+.a77b  30 0d      bmi $a78a                  BMI L234
+.a77d  d5 00      cmp $00,x        L227      CMP 0,X
+.a77f  10 09      bpl $a78a                  BPL L234
+.a781  95 02      sta $02,x                  STA 2,X
+.a783  a9 01      lda #$01                   LDA #1
+.a785  48         pha                        PHA
+.a786  98         tya                        TYA
+.a787  4c 3f 04   jmp $043f                  JMP PUT        ; exit true with converted value
+.a78a  98         tya              L234      TYA
+.a78b  48         pha                        PHA
+.a78c  e8         inx                        INX
+.a78d  e8         inx                        INX
+.a78e  4c 3f 04   jmp $043f                  JMP PUT        ; exit false with bad conversion
+
+>a791  86 28 46 49 4e 44 a9        L243      .BYTE $86,"(FIND",$A9
+>a798  61 05                                 .WORD L214   ; Link to DIGIT
+>a79a  9c 05                       PFIND     .WORD *+2
+
+.a79c  a9 02      lda #$02                   LDA #2
+.a79e  20 6c 04   jsr $046c                  JSR SETUP
+.a7a1  86 b6      stx $b6                    STX XSAVE
+.a7a3  a0 00      ldy #$00         L249      LDY #0
+.a7a5  b1 a7      lda ($a7),y                LDA (N),Y
+.a7a7  51 a9      eor ($a9),y                EOR (N+2),Y
+.a7a9  29 3f      and #$3f                   AND #$3F
+.a7ab  d0 2d      bne $a7da                  BNE L281
+.a7ad  c8         iny              L254      INY
+.a7ae  b1 a7      lda ($a7),y                LDA (N),Y
+.a7b0  51 a9      eor ($a9),y                EOR (N+2),Y
+.a7b2  0a         asl                        ASL 
+.a7b3  d0 23      bne $a7d8                  BNE L280
+.a7b5  90 f6      bcc $a7ad                  BCC L254
+.a7b7  a6 b6      ldx $b6                    LDX XSAVE
+.a7b9  ca         dex                        DEX
+.a7ba  ca         dex                        DEX
+.a7bb  ca         dex                        DEX
+.a7bc  ca         dex                        DEX
+.a7bd  18         clc                        CLC
+.a7be  98         tya                        TYA
+.a7bf  69 05      adc #$05                   ADC #5
+.a7c1  65 a7      adc $a7                    ADC N
+.a7c3  95 02      sta $02,x                  STA 2,X
+.a7c5  a0 00      ldy #$00                   LDY #0
+.a7c7  98         tya                        TYA
+.a7c8  65 a8      adc $a8                    ADC N+1
+.a7ca  95 03      sta $03,x                  STA 3,X
+.a7cc  94 01      sty $01,x                  STY 1,X
+.a7ce  b1 a7      lda ($a7),y                LDA (N),Y
+.a7d0  95 00      sta $00,x                  STA 0,X
+.a7d2  a9 01      lda #$01                   LDA #1
+.a7d4  48         pha                        PHA
+.a7d5  4c 3d 04   jmp $043d                  JMP PUSH
+.a7d8  b0 05      bcs $a7df        L280      BCS L284
+.a7da  c8         iny              L281      INY
+.a7db  b1 a7      lda ($a7),y                LDA (N),Y
+.a7dd  10 fb      bpl $a7da                  BPL L281
+.a7df  c8         iny              L284      INY
+.a7e0  b1 a7      lda ($a7),y                LDA (N),Y
+.a7e2  aa         tax                        TAX
+.a7e3  c8         iny                        INY
+.a7e4  b1 a7      lda ($a7),y                LDA (N),Y
+.a7e6  85 a8      sta $a8                    STA N+1
+.a7e8  86 a7      stx $a7                    STX N
+.a7ea  05 a7      ora $a7                    ORA N
+.a7ec  d0 b5      bne $a7a3                  BNE L249
+.a7ee  a6 b6      ldx $b6                    LDX XSAVE
+.a7f0  a9 00      lda #$00                   LDA #0
+.a7f2  48         pha                        PHA
+.a7f3  4c 3d 04   jmp $043d                  JMP PUSH       ; exit false upon reading null link
+
+>a7f6  87 45 4e 43 4c 4f 53 c5     L301      .BYTE $87,"ENCLOS",$C5
+>a7fe  91 05                                 .WORD L243     ; link to (FIND)
+>a800  02 06                       ENCL      .WORD *+2
+
+.a802  a9 02      lda #$02                   LDA #2
+.a804  20 6c 04   jsr $046c                  JSR SETUP
+.a807  8a         txa                        TXA
+.a808  38         sec                        SEC
+.a809  e9 08      sbc #$08                   SBC #8
+.a80b  aa         tax                        TAX
+.a80c  94 03      sty $03,x                  STY 3,X
+.a80e  94 01      sty $01,x                  STY 1,X
+.a810  88         dey                        DEY
+.a811  c8         iny              L313      INY
+.a812  b1 a9      lda ($a9),y                LDA (N+2),Y
+.a814  c5 a7      cmp $a7                    CMP N
+.a816  f0 f9      beq $a811                  BEQ L313
+.a818  94 04      sty $04,x                  STY 4,X
+.a81a  b1 a9      lda ($a9),y      L318      LDA (N+2),Y
+.a81c  d0 0e      bne $a82c                  BNE L327
+.a81e  94 02      sty $02,x                  STY 2,X
+.a820  94 00      sty $00,x                  STY 0,X
+.a822  98         tya                        TYA
+.a823  d5 04      cmp $04,x                  CMP 4,X
+.a825  d0 02      bne $a829                  BNE L326
+.a827  f6 02      inc $02,x                  INC 2,X
+.a829  4c 44 04   jmp $0444        L326      JMP NEXT
+.a82c  94 02      sty $02,x        L327      STY 2,X
+.a82e  c8         iny                        INY
+.a82f  c5 a7      cmp $a7                    CMP N
+.a831  d0 e7      bne $a81a                  BNE L318
+.a833  94 00      sty $00,x                  STY 0,X
+.a835  4c 44 04   jmp $0444                  JMP NEXT
+
+>a838  84 45 4d 49 d4              L337      .BYTE $84,"EMI",$D4
+>a83d  f6 05                                 .WORD L301     ; link to ENCLOSE
+>a83f  64 17                       EMIT      .WORD XEMIT    ; Vector to code for KEY
+>a841  83 4b 45 d9                 L344      .BYTE $83,"KE",$D9
+>a845  38 06                                 .WORD L337     ; link to EMIT
+>a847  6c 17                       KEY       .WORD XKEY     ; Vector to code for KEY
+>a849  89 3f 54 45 52 4d 49 4e 41 cc  L351      .BYTE $89,"?TERMINA",$CC
+>a853  41 06                                 .WORD L344     ; link to KEY
+>a855  72 17                       QTERM     .WORD XQTER    ; Vector to code for ?TERMINAL
+>a857  82 43 d2                    L358      .BYTE $82,"C",$D2
+>a85a  49 06                                 .WORD L351     ; link to ?TERMINAL
+>a85c  7b 17                       CR        .WORD XCR      ; Vector to code for CR
+>a85e  85 43 4d 4f 56 c5           L365      .BYTE $85,"CMOV",$C5
+>a864  57 06                                 .WORD L358     ; link to CR
+>a866  68 06                       CMOVE     .WORD *+2
+
+.a868  a9 03      lda #$03                   LDA #3
+.a86a  20 6c 04   jsr $046c                  JSR SETUP
+.a86d  c4 a7      cpy $a7          L370      CPY N
+.a86f  d0 07      bne $a878                  BNE L375
+.a871  c6 a8      dec $a8                    DEC N+1
+.a873  10 03      bpl $a878                  BPL L375
+.a875  4c 44 04   jmp $0444                  JMP NEXT
+.a878  b1 ab      lda ($ab),y      L375      LDA (N+4),Y
+.a87a  91 a9      sta ($a9),y                STA (N+2),Y
+.a87c  c8         iny                        INY
+.a87d  d0 ee      bne $a86d                  BNE L370
+.a87f  e6 ac      inc $ac                    INC N+5
+.a881  e6 aa      inc $aa                    INC N+3
+.a883  4c 6d 06   jmp $066d                  JMP L370
+
+>a886  82 55 aa                    L386      .BYTE $82,"U",$AA
+>a889  5e 06                                 .WORD L365     ; link to CMOVE
+>a88b  8d 06                       USTAR     .WORD *+2
+
+.a88d  a9 00      lda #$00                   LDA #0   ; in some implementations TYA can be used since NEXT leaves Y=$00 
+.a88f  85 a7      sta $a7                    STA N 
+.a891  a0 10      ldy #$10                   LDY #16 
+.a893  56 03      lsr $03,x                  LSR 3,X 
+.a895  76 02      ror $02,x                  ROR 2,X 
+.a897  90 0d      bcc $a8a6        L1        BCC L2 
+.a899  18         clc                        CLC 
+.a89a  85 a8      sta $a8                    sta N+1               ; PHA 
+.a89c  a5 a7      lda $a7                    LDA N 
+.a89e  75 00      adc $00,x                  ADC 0,X 
+.a8a0  85 a7      sta $a7                    STA N 
+.a8a2  a5 a8      lda $a8                    lda N+1               ; PLA 
+.a8a4  75 01      adc $01,x                  ADC 1,X 
+.a8a6  6a         ror              L2        ROR 
+.a8a7  66 a7      ror $a7                    ROR N 
+.a8a9  76 03      ror $03,x                  ROR 3,X 
+.a8ab  76 02      ror $02,x                  ROR 2,X 
+.a8ad  88         dey                        DEY 
+.a8ae  d0 e7      bne $a897                  BNE L1 
+.a8b0  95 01      sta $01,x                  STA 1,X 
+.a8b2  a5 a7      lda $a7                    LDA N 
+.a8b4  95 00      sta $00,x                  STA 0,X 
+.a8b6  4c 44 04   jmp $0444                  JMP NEXT 
+
+>a8b9  82 55 af                    L418      .BYTE $82,"U",$AF
+>a8bc  86 06                                 .WORD L386     ; link to U*
+>a8be  c0 06                       USLAS     .WORD *+2
+
+.a8c0  38         sec                        SEC		; Modified code - dr
+.a8c1  b5 02      lda $02,x                  LDA   2,X     ; Subtract hi cell of dividend by
+.a8c3  f5 00      sbc $00,x                  SBC   0,X     ; divisor to see if there's an overflow condition.
+.a8c5  b5 03      lda $03,x                  LDA   3,X
+.a8c7  f5 01      sbc $01,x                  SBC   1,X
+.a8c9  b0 2e      bcs $a8f9                  BCS   oflow   ; Branch if /0 or overflow.
+.a8cb  a9 11      lda #$11                   LDA   #$11    ; Loop 17x.
+.a8cd  85 a7      sta $a7                    STA   N       ; Use N for loop counter.
+.a8cf  36 04      rol $04,x        loopp     ROL   4,X     ; Rotate dividend lo cell left one bit.
+.a8d1  36 05      rol $05,x                  ROL   5,X
+.a8d3  c6 a7      dec $a7                    DEC   N       ; Decrement loop counter.
+.a8d5  f0 2c      beq $a903                  BEQ   endd    ; If we're done, then branch to end.
+.a8d7  36 02      rol $02,x                  ROL   2,X     ; Otherwise rotate dividend hi cell left one bit.
+.a8d9  36 03      rol $03,x                  ROL   3,X
+.a8db  64 a8      stz $a8                    STZ   N+1
+.a8dd  26 a8      rol $a8                    ROL   N+1     ; Rotate the bit carried out of above into N+1.
+.a8df  38         sec                        SEC
+.a8e0  b5 02      lda $02,x                  LDA   2,X     ; Subtract dividend hi cell minus divisor.
+.a8e2  f5 00      sbc $00,x                  SBC   0,X
+.a8e4  85 a9      sta $a9                    STA   N+2     ; Put result temporarily in N+2 (lo byte)
+.a8e6  b5 03      lda $03,x                  LDA   3,X
+.a8e8  f5 01      sbc $01,x                  SBC   1,X
+.a8ea  a8         tay                        TAY           ; and Y (hi byte).
+.a8eb  a5 a8      lda $a8                    LDA   N+1     ; Remember now to bring in the bit carried out above.
+.a8ed  e9 00      sbc #$00                   SBC   #$00
+.a8ef  90 de      bcc $a8cf                  BCC   loopp
+.a8f1  a5 a9      lda $a9                    LDA   N+2     ; If that didn't cause a borrow,
+.a8f3  95 02      sta $02,x                  STA   2,X     ; make the result from above to
+.a8f5  94 03      sty $03,x                  STY   3,X     ; be the new dividend hi cell
+.a8f7  80 d6      bra $a8cf                  BRA   loopp   ; and then brach up.  (NMOS 6502 can use BCS here.)
+.a8f9  a9 ff      lda #$ff         oflow     LDA   #$FF    ; If overflow or /0 condition found,
+.a8fb  95 02      sta $02,x                  STA   2,X     ; just put FFFF in both the remainder
+.a8fd  95 03      sta $03,x                  STA   3,X
+.a8ff  95 04      sta $04,x                  STA   4,X     ; and the quotient.
+.a901  95 05      sta $05,x                  STA   5,X
+.a903  e8         inx              endd      INX           ; When you're done, show one less cell on data stack,
+.a904  e8         inx                        INX           ; (INX INX is exactly what the Forth word DROP does) 
+.a905  4c 9a 08   jmp $089a                  JMP   SWAP+2  ; and swap the two top cells to put quotient on top.
+
+>a908  83 41 4e c4                 L453      .BYTE $83,"AN",$C4
+>a90c  b9 06                                 .WORD L418     ; link to U/
+>a90e  10 07                       ANDD      .WORD *+2
+
+.a910  b5 00      lda $00,x                  LDA 0,X
+.a912  35 02      and $02,x                  AND 2,X
+.a914  48         pha                        PHA
+.a915  b5 01      lda $01,x                  LDA 1,X
+.a917  35 03      and $03,x                  AND 3,X
+.a919  e8         inx              BINARY    INX
+.a91a  e8         inx                        INX
+.a91b  4c 3f 04   jmp $043f                  JMP PUT
+
+>a91e  82 4f d2                    L469      .BYTE $82,"O",$D2
+>a921  08 07                                 .WORD L453     ; link to AND
+>a923  25 07                       OR        .WORD *+2
+
+.a925  b5 00      lda $00,x                  LDA 0,X
+.a927  15 02      ora $02,x                  ORA 2,X
+.a929  48         pha                        PHA
+.a92a  b5 01      lda $01,x                  LDA 1,X
+.a92c  15 03      ora $03,x                  ORA 3,X
+.a92e  e8         inx                        INX
+.a92f  e8         inx                        INX
+.a930  4c 3f 04   jmp $043f                  JMP PUT
+
+>a933  83 58 4f d2                 L484      .BYTE $83,"XO",$D2
+>a937  1e 07                                 .WORD L469     ; link to OR
+>a939  3b 07                       XOR       .WORD *+2
+
+.a93b  b5 00      lda $00,x                  LDA 0,X
+.a93d  55 02      eor $02,x                  EOR 2,X
+.a93f  48         pha                        PHA
+.a940  b5 01      lda $01,x                  LDA 1,X
+.a942  55 03      eor $03,x                  EOR 3,X
+.a944  e8         inx                        INX
+.a945  e8         inx                        INX
+.a946  4c 3f 04   jmp $043f                  JMP PUT
+
+>a949  83 53 50 c0                 L499      .BYTE $83,"SP",$C0
+>a94d  33 07                                 .WORD L484     ; link  to XOR
+>a94f  51 07                       SPAT      .WORD *+2
+
+.a951  8a         txa                        TXA
+.a952  48         pha              PUSHOA    PHA
+.a953  a9 00      lda #$00                   LDA #0
+.a955  4c 3d 04   jmp $043d                  JMP PUSH
+
+>a958  83 53 50 a1                 L511      .BYTE $83,"SP",$A1
+>a95c  49 07                                 .WORD L499     ; link to SP@
+>a95e  60 07                       SPSTO     .WORD *+2
+
+.a960  a0 06      ldy #$06                   LDY #6
+.a962  b1 b4      lda ($b4),y                LDA (UP),Y     ; load data stack pointer (X reg) from
+.a964  aa         tax                        TAX            ; silent user variable S0.
+.a965  4c 44 04   jmp $0444                  JMP NEXT
+
+>a968  83 52 50 a1                 L522      .BYTE $83,"RP",$A1
+>a96c  58 07                                 .WORD L511     ; link to SP!
+>a96e  70 07                       RPSTO     .WORD *+2
+
+.a970  86 b6      stx $b6                    STX XSAVE      ; load return stack pointer (machine
+.a972  a0 08      ldy #$08                   LDY #8         ; stack pointer) from silent user
+.a974  b1 b4      lda ($b4),y                LDA (UP),Y     ; VARIABLE R0
+.a976  aa         tax                        TAX
+.a977  9a         txs                        TXS
+.a978  a6 b6      ldx $b6                    LDX XSAVE
+.a97a  4c 44 04   jmp $0444                  JMP NEXT
+
+>a97d  82 3b d3                    L536      .BYTE $82,";",$D3
+>a980  68 07                                 .WORD L522     ; link to RP!
+>a982  84 07                       SEMIS     .WORD *+2
+
+.a984  68         pla                        PLA
+.a985  85 af      sta $af                    STA IP
+.a987  68         pla                        PLA
+.a988  85 b0      sta $b0                    STA IP+1
+.a98a  4c 44 04   jmp $0444                  JMP NEXT
+
+>a98d  85 4c 45 41 56 c5           L548      .BYTE $85,"LEAV",$C5
+>a993  7d 07                                 .WORD L536     ; link to ;S
+>a995  97 07                       LEAVE     .WORD *+2
+
+.a997  86 b6      stx $b6                    STX XSAVE
+.a999  ba         tsx                        TSX
+.a99a  bd 01 01   lda $0101,x                LDA $101,X
+.a99d  9d 03 01   sta $0103,x                STA $103,X
+.a9a0  bd 02 01   lda $0102,x                LDA $102,X
+.a9a3  9d 04 01   sta $0104,x                STA $104,X
+.a9a6  a6 b6      ldx $b6                    LDX XSAVE
+.a9a8  4c 44 04   jmp $0444                  JMP NEXT
+
+>a9ab  82 3e d2                    L563      .BYTE $82,">",$D2
+>a9ae  8d 07                                 .WORD L548     ; link to LEAVE
+>a9b0  b2 07                       TOR       .WORD *+2
+
+.a9b2  b5 01      lda $01,x                  LDA 1,X        ; move high byte
+.a9b4  48         pha                        PHA
+.a9b5  b5 00      lda $00,x                  LDA 0,X        ; then low byte
+.a9b7  48         pha                        PHA            ; to return stack
+.a9b8  e8         inx                        INX
+.a9b9  e8         inx                        INX            ; popping off data stack
+.a9ba  4c 44 04   jmp $0444                  JMP NEXT
+
+>a9bd  82 52 be                    L577      .BYTE $82,"R",$BE
+>a9c0  ab 07                                 .WORD L563     ; link to >R
+>a9c2  c4 07                       RFROM     .WORD *+2
+
+.a9c4  ca         dex                        DEX            ; make room on data stack
+.a9c5  ca         dex                        DEX
+.a9c6  68         pla                        PLA            ; high byte
+.a9c7  95 00      sta $00,x                  STA 0,X
+.a9c9  68         pla                        PLA            ; then low byte
+.a9ca  95 01      sta $01,x                  STA 1,X        ; restored to data stack
+.a9cc  4c 44 04   jmp $0444                  JMP NEXT
+
+>a9cf  81 d2                       L591      .BYTE $81,$D2
+>a9d1  bd 07                                 .WORD L577     ; link to R>
+>a9d3  d5 07                       R         .WORD *+2
+
+.a9d5  86 b6      stx $b6                    STX XSAVE
+.a9d7  ba         tsx                        TSX            ; address return stack
+.a9d8  bd 01 01   lda $0101,x                LDA $101,X     ; copy bottom value
+.a9db  48         pha                        PHA            ; to data stack
+.a9dc  bd 02 01   lda $0102,x                LDA $102,X
+.a9df  a6 b6      ldx $b6                    LDX XSAVE
+.a9e1  4c 3d 04   jmp $043d                  JMP PUSH
+
+>a9e4  82 30 bd                    L605      .BYTE $82,"0",$BD
+>a9e7  cf 07                                 .WORD L591     ; link to R
+>a9e9  eb 07                       ZEQU      .WORD *+2
+
+.a9eb  b5 01      lda $01,x                  LDA 1,X        ; Corrected from FD3/2 p69
+.a9ed  94 01      sty $01,x                  STY 1,X
+.a9ef  15 00      ora $00,x                  ORA 0,X
+.a9f1  d0 01      bne $a9f4                  BNE L613
+.a9f3  c8         iny                        INY
+.a9f4  94 00      sty $00,x        L613      STY 0,X
+.a9f6  4c 44 04   jmp $0444                  JMP NEXT
+
+>a9f9  82 30 bc                    L619      .BYTE $82,"0",$BC
+>a9fc  e4 07                                 .WORD L605     ; link to 0=
+>a9fe  00 08                       ZLESS     .WORD *+2
+
+.aa00  16 01      asl $01,x                  ASL 1,X
+.aa02  98         tya                        TYA
+.aa03  2a         rol                        ROL 
+.aa04  94 01      sty $01,x                  STY 1,X
+.aa06  95 00      sta $00,x                  STA 0,X
+.aa08  4c 44 04   jmp $0444                  JMP NEXT
+
+>aa0b  81 ab                       L632      .BYTE $81,$AB
+>aa0d  f9 07                                 .WORD L619     ; link to V-ADJ
+>aa0f  11 08                       PLUS      .WORD *+2
+
+.aa11  18         clc                        CLC
+.aa12  b5 00      lda $00,x                  LDA 0,X
+.aa14  75 02      adc $02,x                  ADC 2,X
+.aa16  95 02      sta $02,x                  STA 2,X
+.aa18  b5 01      lda $01,x                  LDA 1,X
+.aa1a  75 03      adc $03,x                  ADC 3,X
+.aa1c  95 03      sta $03,x                  STA 3,X
+.aa1e  e8         inx                        INX
+.aa1f  e8         inx                        INX
+.aa20  4c 44 04   jmp $0444                  JMP NEXT
+
+>aa23  82 44 ab                    L649      .BYTE $82,"D",$AB
+>aa26  0b 08                                 .WORD L632     ;    LINK TO +
+>aa28  2a 08                       DPLUS     .WORD *+2
+
+.aa2a  18         clc                        CLC
+.aa2b  b5 02      lda $02,x                  LDA 2,X
+.aa2d  75 06      adc $06,x                  ADC 6,X
+.aa2f  95 06      sta $06,x                  STA 6,X
+.aa31  b5 03      lda $03,x                  LDA 3,X
+.aa33  75 07      adc $07,x                  ADC 7,X
+.aa35  95 07      sta $07,x                  STA 7,X
+.aa37  b5 00      lda $00,x                  LDA 0,X
+.aa39  75 04      adc $04,x                  ADC 4,X
+.aa3b  95 04      sta $04,x                  STA 4,X
+.aa3d  b5 01      lda $01,x                  LDA 1,X
+.aa3f  75 05      adc $05,x                  ADC 5,X
+.aa41  95 05      sta $05,x                  STA 5,X
+.aa43  4c 54 05   jmp $0554                  JMP POPTWO
+
+>aa46  85 4d 49 4e 55 d3           L670      .BYTE $85,"MINU",$D3
+>aa4c  23 08                                 .WORD L649     ; link to D+
+>aa4e  50 08                       MINUS     .WORD *+2
+
+.aa50  38         sec                        SEC
+.aa51  98         tya                        TYA
+.aa52  f5 00      sbc $00,x                  SBC 0,X
+.aa54  95 00      sta $00,x                  STA 0,X
+.aa56  98         tya                        TYA
+.aa57  f5 01      sbc $01,x                  SBC 1,X
+.aa59  95 01      sta $01,x                  STA 1,X
+.aa5b  4c 44 04   jmp $0444                  JMP NEXT
+
+>aa5e  86 44 4d 49 4e 55 d3        L685      .BYTE $86,"DMINU",$D3
+>aa65  46 08                                 .WORD L670     ; link to  MINUS
+>aa67  69 08                       DMINU     .WORD *+2
+
+.aa69  38         sec                        SEC
+.aa6a  98         tya                        TYA
+.aa6b  f5 02      sbc $02,x                  SBC 2,X
+.aa6d  95 02      sta $02,x                  STA 2,X
+.aa6f  98         tya                        TYA
+.aa70  f5 03      sbc $03,x                  SBC 3,X
+.aa72  95 03      sta $03,x                  STA 3,X
+.aa74  4c 51 08   jmp $0851                  JMP MINUS+3
+
+>aa77  84 4f 56 45 d2              L700      .BYTE $84,"OVE",$D2
+>aa7c  5e 08                                 .WORD L685     ; link to DMINUS
+>aa7e  80 08                       OVER      .WORD *+2
+
+.aa80  b5 02      lda $02,x                  LDA 2,X
+.aa82  48         pha                        PHA
+.aa83  b5 03      lda $03,x                  LDA 3,X
+.aa85  4c 3d 04   jmp $043d                  JMP PUSH
+
+>aa88  84 44 52 4f d0              L711      .BYTE $84,"DRO",$D0
+>aa8d  77 08                                 .WORD L700     ; link to OVER
+>aa8f  56 05                       DROP      .WORD POP
+>aa91  84 53 57 41 d0              L718      .BYTE $84,"SWA",$D0
+>aa96  88 08                                 .WORD L711     ; link to DROP
+>aa98  9a 08                       SWAP      .WORD *+2
+
+.aa9a  b5 02      lda $02,x                  LDA 2,X
+.aa9c  48         pha                        PHA
+.aa9d  b5 00      lda $00,x                  LDA 0,X
+.aa9f  95 02      sta $02,x                  STA 2,X
+.aaa1  b5 03      lda $03,x                  LDA 3,X
+.aaa3  b4 01      ldy $01,x                  LDY 1,X
+.aaa5  94 03      sty $03,x                  STY 3,X
+.aaa7  4c 3f 04   jmp $043f                  JMP PUT
+
+>aaaa  83 44 55 d0                 L733      .BYTE $83,"DU",$D0
+>aaae  91 08                                 .WORD L718     ; link to SWAP
+>aab0  b2 08                       DUP       .WORD *+2
+
+.aab2  b5 00      lda $00,x                  LDA 0,X
+.aab4  48         pha                        PHA
+.aab5  b5 01      lda $01,x                  LDA 1,X
+.aab7  4c 3d 04   jmp $043d                  JMP PUSH
+
+>aaba  82 2b a1                    L744      .BYTE $82,"+",$A1
+>aabd  aa 08                                 .WORD L733     ; link to DUP
+>aabf  c1 08                       PSTOR     .WORD *+2
+
+.aac1  18         clc                        CLC
+.aac2  a1 00      lda ($00,x)                LDA (0,X)      ; fetch 16 bit value addressed by
+.aac4  75 02      adc $02,x                  ADC 2,X        ; bottom of  stack, adding to
+.aac6  81 00      sta ($00,x)                STA (0,X)      ; second item on stack, and return
+.aac8  f6 00      inc $00,x                  INC 0,X        ; to memory
+.aaca  d0 02      bne $aace                  BNE L754
+.aacc  f6 01      inc $01,x                  INC 1,X
+.aace  a1 00      lda ($00,x)      L754      LDA (0,X)
+.aad0  75 03      adc $03,x                  ADC 3,X
+.aad2  81 00      sta ($00,x)                STA (0,X)
+.aad4  4c 54 05   jmp $0554                  JMP POPTWO
+
+>aad7  81 54 4f 47 47 4c c5        L762      .BYTE $81,"TOGGL",$C5
+>aade  ba 08                                 .WORD L744     ; link to +!
+>aae0  e2 08                       TOGGL     .WORD *+2
+
+.aae2  a1 02      lda ($02,x)                LDA (2,X)      ; complement bits in memory address
+.aae4  55 00      eor $00,x                  EOR 0,X        ; second on stack, by pattern on
+.aae6  81 02      sta ($02,x)                STA (2,X)      ; bottom of stack.
+.aae8  4c 54 05   jmp $0554                  JMP POPTWO
+
+>aaeb  81 c0                       L773      .BYTE $81,$C0
+>aaed  d7 08                                 .WORD L762     ; link to TOGGLE
+>aaef  f1 08                       AT        .WORD *+2
+
+.aaf1  a1 00      lda ($00,x)                LDA (0,X)
+.aaf3  48         pha                        PHA
+.aaf4  f6 00      inc $00,x                  INC 0,X
+.aaf6  d0 02      bne $aafa                  BNE L781
+.aaf8  f6 01      inc $01,x                  INC 1,X
+.aafa  a1 00      lda ($00,x)      L781      LDA (0,X)
+.aafc  4c 3f 04   jmp $043f                  JMP PUT
+
+>aaff  82 43 c0                    L787      .BYTE $82,"C",$C0
+>ab02  eb 08                                 .WORD L773     ; link to @
+>ab04  06 09                       CAT       .WORD *+2
+
+.ab06  a1 00      lda ($00,x)                LDA (0,X)      ; fetch byte addressed by bottom of
+.ab08  95 00      sta $00,x                  STA 0,X        ; stack to stack, zeroing the high
+.ab0a  94 01      sty $01,x                  STY 1,X        ; byte
+.ab0c  4c 44 04   jmp $0444                  JMP NEXT
+
+>ab0f  81 a1                       L798      .BYTE $81,$A1
+>ab11  ff 08                                 .WORD L787     ; link to C@
+>ab13  15 09                       STORE     .WORD *+2
+
+.ab15  b5 02      lda $02,x                  LDA 2,X
+.ab17  81 00      sta ($00,x)                STA (0,X)      ; store second 16bit value on stack
+.ab19  f6 00      inc $00,x                  INC 0,X        ; to memory as addressed by bottom
+.ab1b  d0 02      bne $ab1f                  BNE L806       ; of stack.
+.ab1d  f6 01      inc $01,x                  INC 1,X
+.ab1f  b5 03      lda $03,x        L806      LDA 3,X
+.ab21  81 00      sta ($00,x)                STA (0,X)
+.ab23  4c 54 05   jmp $0554                  JMP POPTWO
+
+>ab26  82 43 a1                    L813      .BYTE $82,"C",$A1
+>ab29  0f 09                                 .WORD L798     ; link to !
+>ab2b  2d 09                       CSTOR     .WORD *+2
+
+.ab2d  b5 02      lda $02,x                  LDA 2,X
+.ab2f  81 00      sta ($00,x)                STA (0,X)
+.ab31  4c 54 05   jmp $0554                  JMP POPTWO
+
+>ab34  c1 ba                       L823      .BYTE $C1,$BA
+>ab36  26 09                                 .WORD L813     ; link to C!
+>ab38  4c 09                       COLON     .WORD DOCOL
+>ab3a  b5 0c                                 .WORD QEXEC
+>ab3c  71 0c                                 .WORD SCSP
+>ab3e  cb 0a                                 .WORD CURR
+>ab40  ef 08                                 .WORD AT
+>ab42  be 0a                                 .WORD CON
+>ab44  13 09                                 .WORD STORE
+>ab46  a9 11                                 .WORD CREAT
+>ab48  36 0d                                 .WORD RBRAC
+>ab4a  85 0d                                 .WORD PSCOD
+
+.ab4c  a5 b0      lda $b0          DOCOL     LDA IP+1
+.ab4e  48         pha                        PHA
+.ab4f  a5 af      lda $af                    LDA IP
+.ab51  48         pha                        PHA
+.ab52  18         clc                        CLC
+.ab53  a5 b2      lda $b2                    LDA W
+.ab55  69 02      adc #$02                   ADC #2
+.ab57  85 af      sta $af                    STA IP
+.ab59  98         tya                        TYA
+.ab5a  65 b3      adc $b3                    ADC W+1
+.ab5c  85 b0      sta $b0                    STA IP+1
+.ab5e  4c 44 04   jmp $0444                  JMP NEXT
+
+>ab61  c1 bb                       L853      .BYTE $C1,$BB
+>ab63  34 09                                 .WORD L823     ; link to :
+>ab65  4c 09                                 .WORD DOCOL
+>ab67  dd 0c                                 .WORD QCSP
+>ab69  12 0d                                 .WORD COMP
+>ab6b  82 07                                 .WORD SEMIS
+>ab6d  4a 0d                                 .WORD SMUDG
+>ab6f  28 0d                                 .WORD LBRAC
+>ab71  82 07                                 .WORD SEMIS
+>ab73  88 43 4f 4e 53 54 41 4e d4  L867      .BYTE $88,"CONSTAN",$D4
+>ab7c  61 09                                 .WORD L853     ; link to ;
+>ab7e  4c 09                       CONST     .WORD DOCOL
+>ab80  a9 11                                 .WORD CREAT
+>ab82  4a 0d                                 .WORD SMUDG
+>ab84  4c 0b                                 .WORD COMMA
+>ab86  85 0d                                 .WORD PSCOD
+
+.ab88  a0 02      ldy #$02         DOCON     LDY #2
+.ab8a  b1 b2      lda ($b2),y                LDA (W),Y
+.ab8c  48         pha                        PHA
+.ab8d  c8         iny                        INY
+.ab8e  b1 b2      lda ($b2),y                LDA (W),Y
+.ab90  4c 3d 04   jmp $043d                  JMP PUSH
+
+>ab93  88 56 41 52 49 41 42 4c c5  L885      .BYTE $88,"VARIABL",$C5
+>ab9c  73 09                                 .WORD L867     ; link to CONSTANT
+>ab9e  4c 09                       VAR       .WORD DOCOL
+>aba0  7e 09                                 .WORD CONST
+>aba2  85 0d                                 .WORD PSCOD
+
+.aba4  18         clc              DOVAR     CLC
+.aba5  a5 b2      lda $b2                    LDA W
+.aba7  69 02      adc #$02                   ADC #2
+.aba9  48         pha                        PHA
+.abaa  98         tya                        TYA
+.abab  65 b3      adc $b3                    ADC W+1
+.abad  4c 3d 04   jmp $043d                  JMP PUSH
+
+>abb0  84 55 53 45 d2              L902      .BYTE $84,"USE",$D2
+>abb5  93 09                                 .WORD L885     ; link to VARIABLE
+>abb7  4c 09                       USER      .WORD DOCOL
+>abb9  7e 09                                 .WORD CONST
+>abbb  85 0d                                 .WORD PSCOD
+
+.abbd  a0 02      ldy #$02         DOUSE     LDY #2
+.abbf  18         clc                        CLC
+.abc0  b1 b2      lda ($b2),y                LDA (W),Y
+.abc2  65 b4      adc $b4                    ADC UP
+.abc4  48         pha                        PHA
+.abc5  a9 00      lda #$00                   LDA #0
+.abc7  65 b5      adc $b5                    ADC UP+1
+.abc9  4c 3d 04   jmp $043d                  JMP PUSH
+
+>abcc  81 b0                       L920      .BYTE $81,$B0
+>abce  b0 09                                 .WORD L902     ; link to USER
+>abd0  88 09                       ZERO      .WORD DOCON
+>abd2  00 00                                 .WORD 0
+>abd4  81 b1                       L928      .BYTE $81,$B1
+>abd6  cc 09                                 .WORD L920     ; link to 0
+>abd8  88 09                       ONE       .WORD DOCON
+>abda  01 00                                 .WORD 1
+>abdc  81 b2                       L936      .BYTE $81,$B2
+>abde  d4 09                                 .WORD L928     ; link to 1
+>abe0  88 09                       TWO       .WORD DOCON
+>abe2  02 00                                 .WORD 2
+>abe4  81 b3                       L944      .BYTE $81,$B3
+>abe6  dc 09                                 .WORD L936     ; link to 2
+>abe8  88 09                       THREE     .WORD DOCON
+>abea  03 00                                 .WORD 3
+>abec  82 42 cc                    L952      .BYTE $82,"B",$CC
+>abef  e4 09                                 .WORD L944     ; link to 3
+>abf1  88 09                       BL        .WORD DOCON
+>abf3  20 00                                 .WORD $20
+>abf5  83 43 2f cc                 L960      .BYTE $83,"C/",$CC
+>abf9  ec 09                                 .WORD L952     ; link to BL
+>abfb  88 09                       CSLL      .WORD DOCON
+>abfd  40 00                                 .WORD 64
+>abff  85 46 49 52 53 d4           L968      .BYTE $85,"FIRS",$D4
+>ac05  f5 09                                 .WORD L960     ; link to C/L
+>ac07  88 09                       FIRST     .WORD DOCON
+>ac09  60 3a                                 .WORD DAREA    ; bottom of disk buffer area
+>ac0b  85 4c 49 4d 49 d4           L976      .BYTE $85,"LIMI",$D4
+>ac11  ff 09                                 .WORD L968     ; link to FIRST
+>ac13  88 09                       LIMIT     .WORD DOCON
+>ac15  80 3e                                 .WORD UAREA    ; buffers end at user area
+>ac17  85 42 2f 42 55 c6           L984      .BYTE $85,"B/BU",$C6
+>ac1d  0b 0a                                 .WORD L976     ; link to LIMIT
+>ac1f  88 09                       BBUF      .WORD DOCON
+>ac21  80 00                                 .WORD SSIZE    ; sector size
+>ac23  85 42 2f 53 43 d2           L992      .BYTE $85,"B/SC",$D2
+>ac29  17 0a                                 .WORD L984     ; link to B/BUF
+>ac2b  88 09                       BSCR      .WORD DOCON
+>ac2d  08 00                                 .WORD 8        ; blocks to make one screen
+>ac2f  87 2b 4f 52 49 47 49 ce     L1000     .BYTE $87,"+ORIGI",$CE
+>ac37  23 0a                                 .WORD L992     ; link to B/SCR
+>ac39  4c 09                       PORIG     .WORD DOCOL
+>ac3b  2a 04 00 04                           .WORD LIT,ORIG
+>ac3f  0f 08                                 .WORD PLUS
+>ac41  82 07                                 .WORD SEMIS
+>ac43  83 54 49 c2                 L1010     .BYTE $83,"TI",$C2
+>ac47  2f 0a                                 .WORD L1000    ; link to +ORIGIN
+>ac49  bd 09                       TIB       .WORD DOUSE
+>ac4b  0a                                    .BYTE $A
+>ac4c  85 57 49 44 54 c8           L1018     .BYTE $85,"WIDT",$C8
+>ac52  43 0a                                 .WORD L1010    ; link to TIB
+>ac54  bd 09                       WIDTH     .WORD DOUSE
+>ac56  0c                                    .BYTE $C
+>ac57  87 57 41 52 4e 49 4e c7     L1026     .BYTE $87,"WARNIN",$C7
+>ac5f  4c 0a                                 .WORD L1018    ; link to WIDTH
+>ac61  bd 09                       WARN      .WORD DOUSE
+>ac63  0e                                    .BYTE $E
+>ac64  85 46 45 4e 43 c5           L1034     .BYTE $85,"FENC",$C5
+>ac6a  57 0a                                 .WORD L1026    ; link to WARNING
+>ac6c  bd 09                       FENCE     .WORD DOUSE
+>ac6e  10                                    .BYTE $10
+>ac6f  82 44 d0                    L1042     .BYTE $82,"D",$D0
+>ac72  64 0a                                 .WORD L1034    ; link to FENCE
+>ac74  bd 09                       DP        .WORD DOUSE
+>ac76  12                                    .BYTE $12
+>ac77  88 56 4f 43 2d 4c 49 4e cb  L1050     .BYTE $88,"VOC-LIN",$CB
+>ac80  6f 0a                                 .WORD L1042    ; link to DP
+>ac82  bd 09                       VOCL      .WORD DOUSE
+>ac84  14                                    .BYTE $14
+>ac85  83 42 4c cb                 L1058     .BYTE $83,"BL",$CB
+>ac89  77 0a                                 .WORD L1050    ; link to VOC-LINK
+>ac8b  bd 09                       BLK       .WORD DOUSE
+>ac8d  16                                    .BYTE $16
+>ac8e  82 49 ce                    L1066     .BYTE $82,"I",$CE
+>ac91  85 0a                                 .WORD L1058    ; link to BLK
+>ac93  bd 09                       IN        .WORD DOUSE
+>ac95  18                                    .BYTE $18
+>ac96  83 4f 55 d4                 L1074     .BYTE $83,"OU",$D4
+>ac9a  8e 0a                                 .WORD L1066    ; link to IN
+>ac9c  bd 09                       OUT       .WORD DOUSE
+>ac9e  1a                                    .BYTE $1A
+>ac9f  83 53 43 d2                 L1082     .BYTE $83,"SC",$D2
+>aca3  96 0a                                 .WORD L1074    ; link to OUT
+>aca5  bd 09                       SCR       .WORD DOUSE
+>aca7  1c                                    .BYTE $1C
+>aca8  86 4f 46 46 53 45 d4        L1090     .BYTE $86,"OFFSE",$D4
+>acaf  9f 0a                                 .WORD L1082    ; link to SCR
+>acb1  bd 09                       OFSET     .WORD DOUSE
+>acb3  1e                                    .BYTE $1E
+>acb4  87 43 4f 4e 54 45 58 d4     L1098     .BYTE $87,"CONTEX",$D4
+>acbc  a8 0a                                 .WORD L1090    ; link to OFFSET
+>acbe  bd 09                       CON       .WORD DOUSE
+>acc0  20                                    .BYTE $20
+>acc1  87 43 55 52 52 45 4e d4     L1106     .BYTE $87,"CURREN",$D4
+>acc9  b4 0a                                 .WORD L1098    ; link to CONTEXT
+>accb  bd 09                       CURR      .WORD DOUSE
+>accd  22                                    .BYTE $22
+>acce  85 53 54 41 54 c5           L1114     .BYTE $85,"STAT",$C5
+>acd4  c1 0a                                 .WORD L1106    ; link to CURRENT
+>acd6  bd 09                       STATE     .WORD DOUSE
+>acd8  24                                    .BYTE $24
+>acd9  84 42 41 53 c5              L1122     .BYTE $84,"BAS",$C5
+>acde  ce 0a                                 .WORD L1114    ; link to STATE
+>ace0  bd 09                       BASE      .WORD DOUSE
+>ace2  26                                    .BYTE $26
+>ace3  83 44 50 cc                 L1130     .BYTE $83,"DP",$CC
+>ace7  d9 0a                                 .WORD L1122    ; link to BASE
+>ace9  bd 09                       DPL       .WORD DOUSE
+>aceb  28                                    .BYTE $28
+>acec  83 46 4c c4                 L1138     .BYTE $83,"FL",$C4
+>acf0  e3 0a                                 .WORD L1130    ; link to DPL
+>acf2  bd 09                       FLD       .WORD DOUSE
+>acf4  2a                                    .BYTE $2A
+>acf5  83 43 53 d0                 L1146     .BYTE $83,"CS",$D0
+>acf9  ec 0a                                 .WORD L1138    ; link to FLD
+>acfb  bd 09                       CSP       .WORD DOUSE
+>acfd  2c                                    .BYTE $2C
+>acfe  82 52 a3                    L1154     .BYTE $82,"R",$A3
+>ad01  f5 0a                                 .WORD L1146    ; link to CSP
+>ad03  bd 09                       RNUM      .WORD DOUSE
+>ad05  2e                                    .BYTE $2E
+>ad06  83 48 4c c4                 L1162     .BYTE $83,"HL",$C4
+>ad0a  fe 0a                                 .WORD L1154    ; link to R#
+>ad0c  bd 09                       HLD       .WORD DOUSE
+>ad0e  30                                    .BYTE $30
+>ad0f  82 31 ab                    L1170     .BYTE $82,"1",$AB
+>ad12  06 0b                                 .WORD L1162    ; link to HLD
+>ad14  4c 09                       ONEP      .WORD DOCOL
+>ad16  d8 09                                 .WORD ONE
+>ad18  0f 08                                 .WORD PLUS
+>ad1a  82 07                                 .WORD SEMIS
+>ad1c  82 32 ab                    L1180     .BYTE $82,"2",$AB
+>ad1f  0f 0b                                 .WORD L1170    ; link to 1+
+>ad21  4c 09                       TWOP      .WORD DOCOL
+>ad23  e0 09                                 .WORD TWO
+>ad25  0f 08                                 .WORD PLUS
+>ad27  82 07                                 .WORD SEMIS
+>ad29  84 48 45 52 c5              L1190     .BYTE $84,"HER",$C5
+>ad2e  1c 0b                                 .WORD L1180    ; link to 2+
+>ad30  4c 09                       HERE      .WORD DOCOL
+>ad32  74 0a                                 .WORD DP
+>ad34  ef 08                                 .WORD AT
+>ad36  82 07                                 .WORD SEMIS
+>ad38  85 41 4c 4c 4f d4           L1200     .BYTE $85,"ALLO",$D4
+>ad3e  29 0b                                 .WORD L1190    ; link to HERE
+>ad40  4c 09                       ALLOT     .WORD DOCOL
+>ad42  74 0a                                 .WORD DP
+>ad44  bf 08                                 .WORD PSTOR
+>ad46  82 07                                 .WORD SEMIS
+>ad48  81 ac                       L1210     .BYTE $81,$AC
+>ad4a  38 0b                                 .WORD L1200    ; link to ALLOT
+>ad4c  4c 09                       COMMA     .WORD DOCOL
+>ad4e  30 0b                                 .WORD HERE
+>ad50  13 09                                 .WORD STORE
+>ad52  e0 09                                 .WORD TWO
+>ad54  40 0b                                 .WORD ALLOT
+>ad56  82 07                                 .WORD SEMIS
+>ad58  82 43 ac                    L1222     .BYTE $82,"C",$AC
+>ad5b  48 0b                                 .WORD L1210    ; link to ,
+>ad5d  4c 09                       CCOMM     .WORD DOCOL
+>ad5f  30 0b                                 .WORD HERE
+>ad61  2b 09                                 .WORD CSTOR
+>ad63  d8 09                                 .WORD ONE
+>ad65  40 0b                                 .WORD ALLOT
+>ad67  82 07                                 .WORD SEMIS
+>ad69  81 ad                       L1234     .BYTE $81,$AD
+>ad6b  58 0b                                 .WORD L1222    ; link to C,
+>ad6d  4c 09                       SUB       .WORD DOCOL
+>ad6f  4e 08                                 .WORD MINUS
+>ad71  0f 08                                 .WORD PLUS
+>ad73  82 07                                 .WORD SEMIS
+>ad75  81 bd                       L1244     .BYTE $81,$BD
+>ad77  69 0b                                 .WORD L1234    ; link to -
+>ad79  4c 09                       EQUAL     .WORD DOCOL
+>ad7b  6d 0b                                 .WORD SUB
+>ad7d  e9 07                                 .WORD ZEQU
+>ad7f  82 07                                 .WORD SEMIS
+>ad81  82 55 bc                    L1246     .BYTE $82,"U",$BC
+>ad84  75 0b                                 .WORD L1244    ; link to =
+>ad86  4c 09                       ULESS     .WORD DOCOL
+>ad88  6d 0b                                 .WORD SUB      ; subtract two values
+>ad8a  fe 07                                 .WORD ZLESS    ; test sign
+>ad8c  82 07                                 .WORD SEMIS
+>ad8e  81 bc                       L1254     .BYTE $81,$BC
+>ad90  81 0b                                 .WORD L1246    ; link to U<
+>ad92  94 0b                       LESS      .WORD *+2
+
+.ad94  38         sec                        SEC
+.ad95  b5 02      lda $02,x                  LDA 2,X
+.ad97  f5 00      sbc $00,x                  SBC 0,X        ; subtract
+.ad99  b5 03      lda $03,x                  LDA 3,X
+.ad9b  f5 01      sbc $01,x                  SBC 1,X
+.ad9d  94 03      sty $03,x                  STY 3,X        ; zero high byte
+.ad9f  50 02      bvc $ada3                  BVC L1258
+.ada1  49 80      eor #$80                   EOR #$80       ; correct overflow
+.ada3  10 01      bpl $ada6        L1258     BPL L1260
+.ada5  c8         iny                        INY            ; invert boolean
+.ada6  94 02      sty $02,x        L1260     STY 2,X        ; leave boolean
+.ada8  4c 56 05   jmp $0556                  JMP POP
+
+>adab  81 be                       L1264     .BYTE $81,$BE
+>adad  8e 0b                                 .WORD L1254    ; link to <
+>adaf  4c 09                       GREAT     .WORD DOCOL
+>adb1  98 08                                 .WORD SWAP
+>adb3  92 0b                                 .WORD LESS
+>adb5  82 07                                 .WORD SEMIS
+>adb7  83 52 4f d4                 L1274     .BYTE $83,"RO",$D4
+>adbb  ab 0b                                 .WORD L1264    ; link to >
+>adbd  4c 09                       ROT       .WORD DOCOL
+>adbf  b0 07                                 .WORD TOR
+>adc1  98 08                                 .WORD SWAP
+>adc3  c2 07                                 .WORD RFROM
+>adc5  98 08                                 .WORD SWAP
+>adc7  82 07                                 .WORD SEMIS
+>adc9  85 53 50 41 43 c5           L1286     .BYTE $85,"SPAC",$C5
+>adcf  b7 0b                                 .WORD L1274    ; link to ROT
+>add1  4c 09                       SPACE     .WORD DOCOL
+>add3  f1 09                                 .WORD BL
+>add5  3f 06                                 .WORD EMIT
+>add7  82 07                                 .WORD SEMIS
+>add9  84 2d 44 55 d0              L1296     .BYTE $84,"-DU",$D0
+>adde  c9 0b                                 .WORD L1286    ; link to SPACE
+>ade0  4c 09                       DDUP      .WORD DOCOL
+>ade2  b0 08                                 .WORD DUP
+>ade4  be 04                                 .WORD ZBRAN
+>ade6  04 00                       L1301     .WORD $4       ; L1303-L1301
+>ade8  b0 08                                 .WORD DUP
+>adea  82 07                       L1303     .WORD SEMIS
+>adec  88 54 52 41 56 45 52 53 c5  L1308     .BYTE $88,"TRAVERS",$C5
+>adf5  d9 0b                                 .WORD L1296    ; link to -DUP
+>adf7  4c 09                       TRAV      .WORD DOCOL
+>adf9  98 08                                 .WORD SWAP
+>adfb  7e 08                       L1312     .WORD OVER
+>adfd  0f 08                                 .WORD PLUS
+>adff  64 04                                 .WORD CLIT
+>ae01  7f                                    .BYTE $7F
+>ae02  7e 08                                 .WORD OVER
+>ae04  04 09                                 .WORD CAT
+>ae06  92 0b                                 .WORD LESS
+>ae08  be 04                                 .WORD ZBRAN
+>ae0a  f1 ff                       L1320     .WORD $FFF1    ; L1312-L1320
+>ae0c  98 08                                 .WORD SWAP
+>ae0e  8f 08                                 .WORD DROP
+>ae10  82 07                                 .WORD SEMIS
+>ae12  86 4c 41 54 45 53 d4        L1328     .BYTE $86,"LATES",$D4
+>ae19  ec 0b                                 .WORD L1308    ; link to TRAVERSE
+>ae1b  4c 09                       LATES     .WORD DOCOL
+>ae1d  cb 0a                                 .WORD CURR
+>ae1f  ef 08                                 .WORD AT
+>ae21  ef 08                                 .WORD AT
+>ae23  82 07                                 .WORD SEMIS
+>ae25  83 4c 46 c1                 L1339     .BYTE $83,"LF",$C1
+>ae29  12 0c                                 .WORD L1328    ; link to LATEST
+>ae2b  4c 09                       LFA       .WORD DOCOL
+>ae2d  64 04                                 .WORD CLIT
+>ae2f  04                                    .BYTE 4
+>ae30  6d 0b                                 .WORD SUB
+>ae32  82 07                                 .WORD SEMIS
+>ae34  83 43 46 c1                 L1350     .BYTE $83,"CF",$C1
+>ae38  25 0c                                 .WORD L1339    ; link to LFA
+>ae3a  4c 09                       CFA       .WORD DOCOL
+>ae3c  e0 09                                 .WORD TWO
+>ae3e  6d 0b                                 .WORD SUB
+>ae40  82 07                                 .WORD SEMIS
+>ae42  83 4e 46 c1                 L1360     .BYTE $83,"NF",$C1
+>ae46  34 0c                                 .WORD L1350    ; link to CFA
+>ae48  4c 09                       NFA       .WORD DOCOL
+>ae4a  64 04                                 .WORD CLIT
+>ae4c  05                                    .BYTE $5
+>ae4d  6d 0b                                 .WORD SUB
+>ae4f  2a 04 ff ff                           .WORD LIT,$FFFF
+>ae53  f7 0b                                 .WORD TRAV
+>ae55  82 07                                 .WORD SEMIS
+>ae57  83 50 46 c1                 L1373     .BYTE $83,"PF",$C1
+>ae5b  42 0c                                 .WORD L1360    ; link to NFA
+>ae5d  4c 09                       PFA       .WORD DOCOL
+>ae5f  d8 09                                 .WORD ONE
+>ae61  f7 0b                                 .WORD TRAV
+>ae63  64 04                                 .WORD CLIT
+>ae65  05                                    .BYTE 5
+>ae66  0f 08                                 .WORD PLUS
+>ae68  82 07                                 .WORD SEMIS
+>ae6a  84 21 43 53 d0              L1386     .BYTE $84,"!CS",$D0
+>ae6f  57 0c                                 .WORD L1373    ; link to PFA
+>ae71  4c 09                       SCSP      .WORD DOCOL
+>ae73  4f 07                                 .WORD SPAT
+>ae75  fb 0a                                 .WORD CSP
+>ae77  13 09                                 .WORD STORE
+>ae79  82 07                                 .WORD SEMIS
+>ae7b  86 3f 45 52 52 4f d2        L1397     .BYTE $86,"?ERRO",$D2
+>ae82  6a 0c                                 .WORD L1386    ; link to !CSP
+>ae84  4c 09                       QERR      .WORD DOCOL
+>ae86  98 08                                 .WORD SWAP
+>ae88  be 04                                 .WORD ZBRAN
+>ae8a  08 00                       L1402     .WORD 8        ; L1406-L1402
+>ae8c  40 11                                 .WORD ERROR
+>ae8e  9f 04                                 .WORD BRAN
+>ae90  04 00                       L1405     .WORD 4        ; L1407-L1405
+>ae92  8f 08                       L1406     .WORD DROP
+>ae94  82 07                       L1407     .WORD SEMIS
+>ae96  85 3f 43 4f 4d d0           L1412     .BYTE $85,"?COM",$D0
+>ae9c  7b 0c                                 .WORD L1397    ; link to ?ERROR
+>ae9e  4c 09                       QCOMP     .WORD DOCOL
+>aea0  d6 0a                                 .WORD STATE
+>aea2  ef 08                                 .WORD AT
+>aea4  e9 07                                 .WORD ZEQU
+>aea6  64 04                                 .WORD CLIT
+>aea8  11                                    .BYTE $11
+>aea9  84 0c                                 .WORD QERR
+>aeab  82 07                                 .WORD SEMIS
+>aead  85 3f 45 58 45 c3           L1426     .BYTE $85,"?EXE",$C3
+>aeb3  96 0c                                 .WORD L1412    ; link to ?COMP
+>aeb5  4c 09                       QEXEC     .WORD DOCOL
+>aeb7  d6 0a                                 .WORD STATE
+>aeb9  ef 08                                 .WORD AT
+>aebb  64 04                                 .WORD CLIT
+>aebd  12                                    .BYTE $12
+>aebe  84 0c                                 .WORD QERR
+>aec0  82 07                                 .WORD SEMIS
+>aec2  86 3f 50 41 49 52 d3        L1439     .BYTE $86,"?PAIR",$D3
+>aec9  ad 0c                                 .WORD L1426    ; link to ?EXEC
+>aecb  4c 09                       QPAIR     .WORD DOCOL
+>aecd  6d 0b                                 .WORD SUB
+>aecf  64 04                                 .WORD CLIT
+>aed1  13                                    .BYTE $13
+>aed2  84 0c                                 .WORD QERR
+>aed4  82 07                                 .WORD SEMIS
+>aed6  84 3f 43 53 d0              L1451     .BYTE $84,"?CS",$D0
+>aedb  c2 0c                                 .WORD L1439    ; link to ?PAIRS
+>aedd  4c 09                       QCSP      .WORD DOCOL
+>aedf  4f 07                                 .WORD SPAT
+>aee1  fb 0a                                 .WORD CSP
+>aee3  ef 08                                 .WORD AT
+>aee5  6d 0b                                 .WORD SUB
+>aee7  64 04                                 .WORD CLIT
+>aee9  14                                    .BYTE $14
+>aeea  84 0c                                 .WORD QERR
+>aeec  82 07                                 .WORD SEMIS
+>aeee  88 3f 4c 4f 41 44 49 4e c7  L1466     .BYTE $88,"?LOADIN",$C7
+>aef7  d6 0c                                 .WORD L1451    ; link to ?CSP
+>aef9  4c 09                       QLOAD     .WORD DOCOL
+>aefb  8b 0a                                 .WORD BLK
+>aefd  ef 08                                 .WORD AT
+>aeff  e9 07                                 .WORD ZEQU
+>af01  64 04                                 .WORD CLIT
+>af03  16                                    .BYTE $16
+>af04  84 0c                                 .WORD QERR
+>af06  82 07                                 .WORD SEMIS
+>af08  87 43 4f 4d 50 49 4c c5     L1480     .BYTE $87,"COMPIL",$C5
+>af10  ee 0c                                 .WORD L1466    ; link to ?LOADING
+>af12  4c 09                       COMP      .WORD DOCOL
+>af14  9e 0c                                 .WORD QCOMP
+>af16  c2 07                                 .WORD RFROM
+>af18  b0 08                                 .WORD DUP
+>af1a  21 0b                                 .WORD TWOP
+>af1c  b0 07                                 .WORD TOR
+>af1e  ef 08                                 .WORD AT
+>af20  4c 0b                                 .WORD COMMA
+>af22  82 07                                 .WORD SEMIS
+>af24  c1 db                       L1495     .BYTE $C1,$DB
+>af26  08 0d                                 .WORD L1480    ; link to COMPILE
+>af28  4c 09                       LBRAC     .WORD DOCOL
+>af2a  d0 09                                 .WORD ZERO
+>af2c  d6 0a                                 .WORD STATE
+>af2e  13 09                                 .WORD STORE
+>af30  82 07                                 .WORD SEMIS
+>af32  81 dd                       L1507     .BYTE $81,$DD
+>af34  24 0d                                 .WORD L1495    ; link to [
+>af36  4c 09                       RBRAC     .WORD DOCOL
+>af38  64 04                                 .WORD CLIT
+>af3a  c0                                    .BYTE $C0
+>af3b  d6 0a                                 .WORD STATE
+>af3d  13 09                                 .WORD STORE
+>af3f  82 07                                 .WORD SEMIS
+>af41  86 53 4d 55 44 47 c5        L1519     .BYTE $86,"SMUDG",$C5
+>af48  32 0d                                 .WORD L1507    ; link to ]
+>af4a  4c 09                       SMUDG     .WORD DOCOL
+>af4c  1b 0c                                 .WORD LATES
+>af4e  64 04                                 .WORD CLIT
+>af50  20                                    .BYTE $20
+>af51  e0 08                                 .WORD TOGGL
+>af53  82 07                                 .WORD SEMIS
+>af55  83 48 45 d8                 L1531     .BYTE $83,"HE",$D8
+>af59  41 0d                                 .WORD L1519    ; link to SMUDGE
+>af5b  4c 09                       HEX       .WORD DOCOL
+>af5d  64 04                                 .WORD CLIT
+>af5f  10                                    .BYTE 16
+>af60  e0 0a                                 .WORD BASE
+>af62  13 09                                 .WORD STORE
+>af64  82 07                                 .WORD SEMIS
+>af66  87 44 45 43 49 4d 41 cc     L1543     .BYTE $87,"DECIMA",$CC
+>af6e  55 0d                                 .WORD L1531    ; link to HEX
+>af70  4c 09                       DECIM     .WORD DOCOL
+>af72  64 04                                 .WORD CLIT
+>af74  0a                                    .BYTE 10
+>af75  e0 0a                                 .WORD BASE
+>af77  13 09                                 .WORD STORE
+>af79  82 07                                 .WORD SEMIS
+>af7b  87 28 3b 43 4f 44 45 a9     L1555     .BYTE $87,"(;CODE",$A9
+>af83  66 0d                                 .WORD L1543    ; link to DECIMAL
+>af85  4c 09                       PSCOD     .WORD DOCOL
+>af87  c2 07                                 .WORD RFROM
+>af89  1b 0c                                 .WORD LATES
+>af8b  5d 0c                                 .WORD PFA
+>af8d  3a 0c                                 .WORD CFA
+>af8f  13 09                                 .WORD STORE
+>af91  82 07                                 .WORD SEMIS
+>af93  c5 3b 43 4f 44 c5           L1568     .BYTE $C5,";COD",$C5
+>af99  7b 0d                                 .WORD L1555    ; link to (;CODE)
+>af9b  4c 09                                 .WORD DOCOL
+>af9d  dd 0c                                 .WORD QCSP
+>af9f  12 0d                                 .WORD COMP
+>afa1  85 0d                                 .WORD PSCOD
+>afa3  28 0d                                 .WORD LBRAC
+>afa5  4a 0d                                 .WORD SMUDG
+>afa7  82 07                                 .WORD SEMIS
+>afa9  87 3c 42 55 49 4c 44 d3     L1582     .BYTE $87,"<BUILD",$D3
+>afb1  93 0d                                 .WORD L1568    ; link to ;CODE
+>afb3  4c 09                       BUILD     .WORD DOCOL
+>afb5  d0 09                                 .WORD ZERO
+>afb7  7e 09                                 .WORD CONST
+>afb9  82 07                                 .WORD SEMIS
+>afbb  85 44 4f 45 53 be           L1592     .BYTE $85,"DOES",$BE
+>afc1  a9 0d                                 .WORD L1582    ; link to <BUILDS
+>afc3  4c 09                       DOES      .WORD DOCOL
+>afc5  c2 07                                 .WORD RFROM
+>afc7  1b 0c                                 .WORD LATES
+>afc9  5d 0c                                 .WORD PFA
+>afcb  13 09                                 .WORD STORE
+>afcd  85 0d                                 .WORD PSCOD
+
+.afcf  a5 b0      lda $b0          DODOE     LDA IP+1
+.afd1  48         pha                        PHA
+.afd2  a5 af      lda $af                    LDA IP
+.afd4  48         pha                        PHA
+.afd5  a0 02      ldy #$02                   LDY #2
+.afd7  b1 b2      lda ($b2),y                LDA (W),Y
+.afd9  85 af      sta $af                    STA IP
+.afdb  c8         iny                        INY
+.afdc  b1 b2      lda ($b2),y                LDA (W),Y
+.afde  85 b0      sta $b0                    STA IP+1
+.afe0  18         clc                        CLC
+.afe1  a5 b2      lda $b2                    LDA W
+.afe3  69 04      adc #$04                   ADC #4
+.afe5  48         pha                        PHA
+.afe6  a5 b3      lda $b3                    LDA W+1
+.afe8  69 00      adc #$00                   ADC #0
+.afea  4c 3d 04   jmp $043d                  JMP PUSH
+
+>afed  85 43 4f 55 4e d4           L1622     .BYTE $85,"COUN",$D4
+>aff3  bb 0d                                 .WORD L1592    ; link to DOES>
+>aff5  4c 09                       COUNT     .WORD DOCOL
+>aff7  b0 08                                 .WORD DUP
+>aff9  14 0b                                 .WORD ONEP
+>affb  98 08                                 .WORD SWAP
+>affd  04 09                                 .WORD CAT
+>afff  82 07                                 .WORD SEMIS
+>b001  84 54 59 50 c5              L1634     .BYTE $84,"TYP",$C5
+>b006  ed 0d                                 .WORD L1622    ; link to COUNT
+>b008  4c 09                       TYPE      .WORD DOCOL
+>b00a  e0 0b                                 .WORD DDUP
+>b00c  be 04                                 .WORD ZBRAN
+>b00e  18 00                       L1639     .WORD $18      ; L1651-L1639
+>b010  7e 08                                 .WORD OVER
+>b012  0f 08                                 .WORD PLUS
+>b014  98 08                                 .WORD SWAP
+>b016  46 05                                 .WORD PDO
+>b018  5f 05                       L1644     .WORD I
+>b01a  04 09                                 .WORD CAT
+>b01c  3f 06                                 .WORD EMIT
+>b01e  df 04                                 .WORD PLOOP
+>b020  f8 ff                       L1648     .WORD $FFF8    ; L1644-L1648
+>b022  9f 04                                 .WORD BRAN
+>b024  04 00                       L1650     .WORD $4       ; L1652-L1650
+>b026  8f 08                       L1651     .WORD DROP
+>b028  82 07                       L1652     .WORD SEMIS
+>b02a  89 2d 54 52 41 49 4c 49 4e c7  L1657     .BYTE $89,"-TRAILIN",$C7
+>b034  01 0e                                 .WORD L1634    ; link to TYPE
+>b036  4c 09                       DTRAI     .WORD DOCOL
+>b038  b0 08                                 .WORD DUP
+>b03a  d0 09                                 .WORD ZERO
+>b03c  46 05                                 .WORD PDO
+>b03e  7e 08                       L1663     .WORD OVER
+>b040  7e 08                                 .WORD OVER
+>b042  0f 08                                 .WORD PLUS
+>b044  d8 09                                 .WORD ONE
+>b046  6d 0b                                 .WORD SUB
+>b048  04 09                                 .WORD CAT
+>b04a  f1 09                                 .WORD BL
+>b04c  6d 0b                                 .WORD SUB
+>b04e  be 04                                 .WORD ZBRAN
+>b050  08 00                       L1672     .WORD 8        ; L1676-L1672
+>b052  95 07                                 .WORD LEAVE
+>b054  9f 04                                 .WORD BRAN
+>b056  06 00                       L1675     .WORD 6        ; L1678-L1675
+>b058  d8 09                       L1676     .WORD ONE
+>b05a  6d 0b                                 .WORD SUB
+>b05c  df 04                       L1678     .WORD PLOOP
+>b05e  e0 ff                       L1679     .WORD $FFE0    ; L1663-L1679
+>b060  82 07                                 .WORD SEMIS
+>b062  84 28 2e 22 a9              L1685     .BYTE $84,"(.",$22,$A9    ; $84 (." $A9
+>b067  2a 0e                                 .WORD L1657    ; link to -TRAILING
+>b069  4c 09                       PDOTQ     .WORD DOCOL
+>b06b  d3 07                                 .WORD R
+>b06d  f5 0d                                 .WORD COUNT
+>b06f  b0 08                                 .WORD DUP
+>b071  14 0b                                 .WORD ONEP
+>b073  c2 07                                 .WORD RFROM
+>b075  0f 08                                 .WORD PLUS
+>b077  b0 07                                 .WORD TOR
+>b079  08 0e                                 .WORD TYPE
+>b07b  82 07                                 .WORD SEMIS
+>b07d  c2 2e a2                    L1701     .BYTE $C2,".",$A2
+>b080  62 0e                                 .WORD L1685    ; link to PDOTQ
+>b082  4c 09                                 .WORD DOCOL
+>b084  64 04                                 .WORD CLIT
+>b086  22                                    .BYTE $22
+>b087  d6 0a                                 .WORD STATE
+>b089  ef 08                                 .WORD AT
+>b08b  be 04                                 .WORD ZBRAN
+>b08d  14 00                       L1709     .WORD $14      ;L1719-L1709
+>b08f  12 0d                                 .WORD COMP
+>b091  69 0e                                 .WORD PDOTQ
+>b093  e3 0f                                 .WORD WORD
+>b095  30 0b                                 .WORD HERE
+>b097  04 09                                 .WORD CAT
+>b099  14 0b                                 .WORD ONEP
+>b09b  40 0b                                 .WORD ALLOT
+>b09d  9f 04                                 .WORD BRAN
+>b09f  0a 00                       L1718     .WORD $A       ;L1723-L1718
+>b0a1  e3 0f                       L1719     .WORD WORD
+>b0a3  30 0b                                 .WORD HERE
+>b0a5  f5 0d                                 .WORD COUNT
+>b0a7  08 0e                                 .WORD TYPE
+>b0a9  82 07                       L1723     .WORD SEMIS
+>b0ab  86 45 58 50 45 43 d4        L1729     .BYTE $86,"EXPEC",$D4
+>b0b2  7d 0e                                 .WORD L1701    ; link to ."
+>b0b4  4c 09                       EXPEC     .WORD DOCOL
+>b0b6  7e 08                                 .WORD OVER
+>b0b8  0f 08                                 .WORD PLUS
+>b0ba  7e 08                                 .WORD OVER
+>b0bc  46 05                                 .WORD PDO
+>b0be  47 06                       L1736     .WORD KEY
+>b0c0  b0 08                                 .WORD DUP
+>b0c2  64 04                                 .WORD CLIT
+>b0c4  0e                                    .BYTE $E
+>b0c5  39 0a                                 .WORD PORIG
+>b0c7  ef 08                                 .WORD AT
+>b0c9  79 0b                                 .WORD EQUAL
+>b0cb  be 04                                 .WORD ZBRAN
+>b0cd  1f 00                       L1744     .WORD $1F       ; L1760-L1744
+>b0cf  8f 08                                 .WORD DROP
+>b0d1  64 04                                 .WORD CLIT
+>b0d3  08                                    .BYTE 08
+>b0d4  7e 08                                 .WORD OVER
+>b0d6  5f 05                                 .WORD I
+>b0d8  79 0b                                 .WORD EQUAL
+>b0da  b0 08                                 .WORD DUP
+>b0dc  c2 07                                 .WORD RFROM
+>b0de  e0 09                                 .WORD TWO
+>b0e0  6d 0b                                 .WORD SUB
+>b0e2  0f 08                                 .WORD PLUS
+>b0e4  b0 07                                 .WORD TOR
+>b0e6  6d 0b                                 .WORD SUB
+>b0e8  9f 04                                 .WORD BRAN
+>b0ea  27 00                       L1759     .WORD $27       ; L1779-L1759
+>b0ec  b0 08                       L1760     .WORD DUP
+>b0ee  64 04                                 .WORD CLIT
+>b0f0  0d                                    .BYTE $0D
+>b0f1  79 0b                                 .WORD EQUAL
+>b0f3  be 04                                 .WORD ZBRAN
+>b0f5  0e 00                       L1765     .WORD $0E       ; L1772-L1765
+>b0f7  95 07                                 .WORD LEAVE
+>b0f9  8f 08                                 .WORD DROP
+>b0fb  f1 09                                 .WORD BL
+>b0fd  d0 09                                 .WORD ZERO
+>b0ff  9f 04                                 .WORD BRAN
+>b101  04 00                       L1771     .WORD 04        ; L1773-L1771
+>b103  b0 08                       L1772     .WORD DUP
+>b105  5f 05                       L1773     .WORD I
+>b107  2b 09                                 .WORD CSTOR
+>b109  d0 09                                 .WORD ZERO
+>b10b  5f 05                                 .WORD I
+>b10d  14 0b                                 .WORD ONEP
+>b10f  13 09                                 .WORD STORE
+>b111  3f 06                       L1779     .WORD EMIT
+>b113  df 04                                 .WORD PLOOP
+>b115  a9 ff                       L1781     .WORD $FFA9
+>b117  8f 08                                 .WORD DROP      ; L1736-L1781
+>b119  82 07                                 .WORD SEMIS
+>b11b  85 51 55 45 52 d9           L1788     .BYTE $85,"QUER",$D9
+>b121  ab 0e                                 .WORD L1729    ; link to EXPECT
+>b123  4c 09                       QUERY     .WORD DOCOL
+>b125  49 0a                                 .WORD TIB
+>b127  ef 08                                 .WORD AT
+>b129  64 04                                 .WORD CLIT
+>b12b  50                                    .BYTE 80       ; 80 characters from terminal
+>b12c  b4 0e                                 .WORD EXPEC
+>b12e  d0 09                                 .WORD ZERO
+>b130  93 0a                                 .WORD IN
+>b132  13 09                                 .WORD STORE
+>b134  82 07                                 .WORD SEMIS
+>b136  c1 80                       L1804     .BYTE $C1,$80
+>b138  1b 0f                                 .WORD L1788    ; link to QUERY
+>b13a  4c 09                                 .WORD DOCOL
+>b13c  8b 0a                                 .WORD BLK
+>b13e  ef 08                                 .WORD AT
+>b140  be 04                                 .WORD ZBRAN
+>b142  2a 00                       L1810     .WORD $2A      ; L1830-l1810
+>b144  d8 09                                 .WORD ONE
+>b146  8b 0a                                 .WORD BLK
+>b148  bf 08                                 .WORD PSTOR
+>b14a  d0 09                                 .WORD ZERO
+>b14c  93 0a                                 .WORD IN
+>b14e  13 09                                 .WORD STORE
+>b150  8b 0a                                 .WORD BLK
+>b152  ef 08                                 .WORD AT
+>b154  d0 09 2b 0a                           .WORD ZERO,BSCR
+>b158  be 06                                 .WORD USLAS
+>b15a  8f 08                                 .WORD DROP     ; fixed from model
+>b15c  e9 07                                 .WORD ZEQU
+>b15e  be 04                                 .WORD ZBRAN
+>b160  08 00                       L1824     .WORD 8        ; L1828-L1824
+>b162  b5 0c                                 .WORD QEXEC
+>b164  c2 07                                 .WORD RFROM
+>b166  8f 08                                 .WORD DROP
+>b168  9f 04                       L1828     .WORD BRAN
+>b16a  06 00                       L1829     .WORD 6        ; L1832-L1829
+>b16c  c2 07                       L1830     .WORD RFROM
+>b16e  8f 08                                 .WORD DROP
+>b170  82 07                       L1832     .WORD SEMIS
+>b172  84 46 49 4c cc              L1838     .BYTE $84,"FIL",$CC
+>b177  36 0f                                 .WORD L1804    ; link to X
+>b179  4c 09                       FILL      .WORD DOCOL
+>b17b  98 08                                 .WORD SWAP
+>b17d  b0 07                                 .WORD TOR
+>b17f  7e 08                                 .WORD OVER
+>b181  2b 09                                 .WORD CSTOR
+>b183  b0 08                                 .WORD DUP
+>b185  14 0b                                 .WORD ONEP
+>b187  c2 07                                 .WORD RFROM
+>b189  d8 09                                 .WORD ONE
+>b18b  6d 0b                                 .WORD SUB
+>b18d  66 06                                 .WORD CMOVE
+>b18f  82 07                                 .WORD SEMIS
+>b191  85 45 52 41 53 c5           L1856     .BYTE $85,"ERAS",$C5
+>b197  72 0f                                 .WORD L1838    ; link to FILL
+>b199  4c 09                       ERASE     .WORD DOCOL
+>b19b  d0 09                                 .WORD ZERO
+>b19d  79 0f                                 .WORD FILL
+>b19f  82 07                                 .WORD SEMIS
+>b1a1  86 42 4c 41 4e 4b d3        L1866     .BYTE $86,"BLANK",$D3
+>b1a8  91 0f                                 .WORD L1856    ; link to ERASE
+>b1aa  4c 09                       BLANK     .WORD DOCOL
+>b1ac  f1 09                                 .WORD BL
+>b1ae  79 0f                                 .WORD FILL
+>b1b0  82 07                                 .WORD SEMIS
+>b1b2  84 48 4f 4c c4              L1876     .BYTE $84,"HOL",$C4
+>b1b7  a1 0f                                 .WORD L1866    ; link to BLANKS
+>b1b9  4c 09                       HOLD      .WORD DOCOL
+>b1bb  2a 04 ff ff                           .WORD LIT,$FFFF
+>b1bf  0c 0b                                 .WORD HLD
+>b1c1  bf 08                                 .WORD PSTOR
+>b1c3  0c 0b                                 .WORD HLD
+>b1c5  ef 08                                 .WORD AT
+>b1c7  2b 09                                 .WORD CSTOR
+>b1c9  82 07                                 .WORD SEMIS
+>b1cb  83 50 41 c4                 L1890     .BYTE $83,"PA",$C4
+>b1cf  b2 0f                                 .WORD L1876    ; link to HOLD
+>b1d1  4c 09                       PAD       .WORD DOCOL
+>b1d3  30 0b                                 .WORD HERE
+>b1d5  64 04                                 .WORD CLIT
+>b1d7  44                                    .BYTE 68       ; PAD is 68 bytes above here.
+>b1d8  0f 08                                 .WORD PLUS
+>b1da  82 07                                 .WORD SEMIS
+>b1dc  84 57 4f 52 c4              L1902     .BYTE $84,"WOR",$C4
+>b1e1  cb 0f                                 .WORD L1890    ; link to PAD
+>b1e3  4c 09                       WORD      .WORD DOCOL
+>b1e5  8b 0a                                 .WORD BLK
+>b1e7  ef 08                                 .WORD AT
+>b1e9  be 04                                 .WORD ZBRAN
+>b1eb  0c 00                       L1908     .WORD $C       ; L1914-L1908
+>b1ed  8b 0a                                 .WORD BLK
+>b1ef  ef 08                                 .WORD AT
+>b1f1  48 16                                 .WORD BLOCK
+>b1f3  9f 04                                 .WORD BRAN
+>b1f5  06 00                       L1913     .WORD $6       ; L1916-L1913
+>b1f7  49 0a                       L1914     .WORD TIB
+>b1f9  ef 08                                 .WORD AT
+>b1fb  93 0a                       L1916     .WORD IN
+>b1fd  ef 08                                 .WORD AT
+>b1ff  0f 08                                 .WORD PLUS
+>b201  98 08                                 .WORD SWAP
+>b203  00 06                                 .WORD ENCL
+>b205  30 0b                                 .WORD HERE
+>b207  64 04                                 .WORD CLIT
+>b209  22                                    .BYTE $22
+>b20a  aa 0f                                 .WORD BLANK
+>b20c  93 0a                                 .WORD IN
+>b20e  bf 08                                 .WORD PSTOR
+>b210  7e 08                                 .WORD OVER
+>b212  6d 0b                                 .WORD SUB
+>b214  b0 07                                 .WORD TOR
+>b216  d3 07                                 .WORD R
+>b218  30 0b                                 .WORD HERE
+>b21a  2b 09                                 .WORD CSTOR
+>b21c  0f 08                                 .WORD PLUS
+>b21e  30 0b                                 .WORD HERE
+>b220  14 0b                                 .WORD ONEP
+>b222  c2 07                                 .WORD RFROM
+>b224  66 06                                 .WORD CMOVE
+>b226  82 07                                 .WORD SEMIS
+>b228  85 55 50 50 45 d2           L1943     .BYTE $85,"UPPE",$D2
+>b22e  dc 0f                                 .WORD L1902    ; link to WORD
+>b230  4c 09                       UPPER     .WORD DOCOL
+>b232  7e 08                                 .WORD OVER     ; This routine converts text to U case
+>b234  0f 08                                 .WORD PLUS     ; It allows interpretation from a term.
+>b236  98 08                                 .WORD SWAP     ; without a shift-lock.
+>b238  46 05                                 .WORD PDO
+>b23a  5f 05                       L1950     .WORD I
+>b23c  04 09                                 .WORD CAT
+>b23e  64 04                                 .WORD CLIT
+>b240  5f                                    .BYTE $5F
+>b241  af 0b                                 .WORD GREAT
+>b243  be 04                                 .WORD ZBRAN
+>b245  09 00                       L1956     .WORD 09       ; L1961-L1956
+>b247  5f 05                                 .WORD I
+>b249  64 04                                 .WORD CLIT
+>b24b  20                                    .BYTE $20
+>b24c  e0 08                                 .WORD TOGGL
+>b24e  df 04                       L1961     .WORD PLOOP
+>b250  ea ff                       L1962     .WORD $FFEA    ; L1950-L1962
+>b252  82 07                                 .WORD SEMIS
+>b254  88 28 4e 55 4d 42 45 52 a9  L1968     .BYTE $88,"(NUMBER",$A9
+>b25d  28 10                                 .WORD L1943    ; link to UPPER
+>b25f  4c 09                       PNUMB     .WORD DOCOL
+>b261  14 0b                       L1971     .WORD ONEP
+>b263  b0 08                                 .WORD DUP
+>b265  b0 07                                 .WORD TOR
+>b267  04 09                                 .WORD CAT
+>b269  e0 0a                                 .WORD BASE
+>b26b  ef 08                                 .WORD AT
+>b26d  69 05                                 .WORD DIGIT
+>b26f  be 04                                 .WORD ZBRAN
+>b271  2c 00                       L1979     .WORD $2C      ; L2001-L1979
+>b273  98 08                                 .WORD SWAP
+>b275  e0 0a                                 .WORD BASE
+>b277  ef 08                                 .WORD AT
+>b279  8b 06                                 .WORD USTAR
+>b27b  8f 08                                 .WORD DROP
+>b27d  bd 0b                                 .WORD ROT
+>b27f  e0 0a                                 .WORD BASE
+>b281  ef 08                                 .WORD AT
+>b283  8b 06                                 .WORD USTAR
+>b285  28 08                                 .WORD DPLUS
+>b287  e9 0a                                 .WORD DPL
+>b289  ef 08                                 .WORD AT
+>b28b  14 0b                                 .WORD ONEP
+>b28d  be 04                                 .WORD ZBRAN
+>b28f  08 00                       L1994     .WORD 8        ; L1998-L1994
+>b291  d8 09                                 .WORD ONE
+>b293  e9 0a                                 .WORD DPL
+>b295  bf 08                                 .WORD PSTOR
+>b297  c2 07                       L1998     .WORD RFROM
+>b299  9f 04                                 .WORD BRAN
+>b29b  c6 ff                       L2000     .WORD $FFC6    ; L1971-L2000
+>b29d  c2 07                       L2001     .WORD RFROM
+>b29f  82 07                                 .WORD SEMIS
+>b2a1  86 4e 55 4d 42 45 d2        L2007     .BYTE $86,"NUMBE",$D2
+>b2a8  54 10                                 .WORD L1968    ; link to (NUMBER)
+>b2aa  4c 09                       NUMBER    .WORD DOCOL
+>b2ac  d0 09                                 .WORD ZERO
+>b2ae  d0 09                                 .WORD ZERO
+>b2b0  bd 0b                                 .WORD ROT
+>b2b2  b0 08                                 .WORD DUP
+>b2b4  14 0b                                 .WORD ONEP
+>b2b6  04 09                                 .WORD CAT
+>b2b8  64 04                                 .WORD CLIT
+>b2ba  2d                                    .BYTE $2D
+>b2bb  79 0b                                 .WORD EQUAL
+>b2bd  b0 08                                 .WORD DUP
+>b2bf  b0 07                                 .WORD TOR
+>b2c1  0f 08                                 .WORD PLUS
+>b2c3  2a 04 ff ff                           .WORD LIT,$FFFF
+>b2c7  e9 0a                       L2023     .WORD DPL
+>b2c9  13 09                                 .WORD STORE
+>b2cb  5f 10                                 .WORD PNUMB
+>b2cd  b0 08                                 .WORD DUP
+>b2cf  04 09                                 .WORD CAT
+>b2d1  f1 09                                 .WORD BL
+>b2d3  6d 0b                                 .WORD SUB
+>b2d5  be 04                                 .WORD ZBRAN
+>b2d7  15 00                       L2031     .WORD $15      ; L2042-L2031
+>b2d9  b0 08                                 .WORD DUP
+>b2db  04 09                                 .WORD CAT
+>b2dd  64 04                                 .WORD CLIT
+>b2df  2e                                    .BYTE $2E
+>b2e0  6d 0b                                 .WORD SUB
+>b2e2  d0 09                                 .WORD ZERO
+>b2e4  84 0c                                 .WORD QERR
+>b2e6  d0 09                                 .WORD ZERO
+>b2e8  9f 04                                 .WORD BRAN
+>b2ea  dd ff                       L2041     .WORD $FFDD    ; L2023-L2041
+>b2ec  8f 08                       L2042     .WORD DROP
+>b2ee  c2 07                                 .WORD RFROM
+>b2f0  be 04                                 .WORD ZBRAN
+>b2f2  04 00                       L2045     .WORD 4        ; L2047-L2045
+>b2f4  67 08                                 .WORD DMINU
+>b2f6  82 07                       L2047     .WORD SEMIS
+>b2f8  85 2d 46 49 4e c4           L2052     .BYTE $85,"-FIN",$C4
+>b2fe  a1 10                                 .WORD L2007    ; link to NUMBER
+>b300  4c 09                       DFIND     .WORD DOCOL
+>b302  f1 09                                 .WORD BL
+>b304  e3 0f                                 .WORD WORD
+>b306  30 0b                                 .WORD HERE     ; )
+>b308  f5 0d                                 .WORD COUNT    ; |- Optional allowing free use of low
+>b30a  30 10                                 .WORD UPPER    ; )  case from terminal
+>b30c  30 0b                                 .WORD HERE
+>b30e  be 0a                                 .WORD CON
+>b310  ef 08                                 .WORD AT
+>b312  ef 08                                 .WORD AT
+>b314  9a 05                                 .WORD PFIND
+>b316  b0 08                                 .WORD DUP
+>b318  e9 07                                 .WORD ZEQU
+>b31a  be 04                                 .WORD ZBRAN
+>b31c  0a 00                       L2068     .WORD $A       ; L2073-L2068
+>b31e  8f 08                                 .WORD DROP
+>b320  30 0b                                 .WORD HERE
+>b322  1b 0c                                 .WORD LATES
+>b324  9a 05                                 .WORD PFIND
+>b326  82 07                       L2073     .WORD SEMIS
+>b328  87 28 41 42 4f 52 54 a9     L2078     .BYTE $87,"(ABORT",$A9
+>b330  f8 10                                 .WORD L2052    ; link to -FIND
+>b332  4c 09                       PABOR     .WORD DOCOL
+>b334  90 13                                 .WORD ABORT
+>b336  82 07                                 .WORD SEMIS
+>b338  85 45 52 52 4f d2           L2087     .BYTE $85,"ERRO",$D2
+>b33e  28 11                                 .WORD L2078    ; link to (ABORT)
+>b340  4c 09                       ERROR     .WORD DOCOL
+>b342  61 0a                                 .WORD WARN
+>b344  ef 08                                 .WORD AT
+>b346  fe 07                                 .WORD ZLESS
+>b348  be 04                                 .WORD ZBRAN
+>b34a  04 00                       L2094     .WORD $4       ; L2096-L2094
+>b34c  32 11                                 .WORD PABOR
+>b34e  30 0b                       L2096     .WORD HERE
+>b350  f5 0d                                 .WORD COUNT
+>b352  08 0e                                 .WORD TYPE
+>b354  69 0e                                 .WORD PDOTQ
+>b356  04 20 20 3f 20                        .BYTE 4,"  ? "
+>b35b  df 16                                 .WORD MESS
+>b35d  5e 07                                 .WORD SPSTO
+>b35f  8f 08 8f 08                           .WORD DROP,DROP; make room for 2 error values
+>b363  93 0a                                 .WORD IN
+>b365  ef 08                                 .WORD AT
+>b367  8b 0a                                 .WORD BLK
+>b369  ef 08                                 .WORD AT
+>b36b  61 13                                 .WORD QUIT
+>b36d  82 07                                 .WORD SEMIS
+>b36f  83 49 44 ae                 L2113     .BYTE $83,"ID",$AE
+>b373  38 11                                 .WORD L2087    ; link to ERROR
+>b375  4c 09                       IDDOT     .WORD DOCOL
+>b377  d1 0f                                 .WORD PAD
+>b379  64 04                                 .WORD CLIT
+>b37b  20                                    .BYTE $20
+>b37c  64 04                                 .WORD CLIT
+>b37e  5f                                    .BYTE $5F
+>b37f  79 0f                                 .WORD FILL
+>b381  b0 08                                 .WORD DUP
+>b383  5d 0c                                 .WORD PFA
+>b385  2b 0c                                 .WORD LFA
+>b387  7e 08                                 .WORD OVER
+>b389  6d 0b                                 .WORD SUB
+>b38b  d1 0f                                 .WORD PAD
+>b38d  98 08                                 .WORD SWAP
+>b38f  66 06                                 .WORD CMOVE
+>b391  d1 0f                                 .WORD PAD
+>b393  f5 0d                                 .WORD COUNT
+>b395  64 04                                 .WORD CLIT
+>b397  1f                                    .BYTE $1F
+>b398  0e 07                                 .WORD ANDD
+>b39a  08 0e                                 .WORD TYPE
+>b39c  d1 0b                                 .WORD SPACE
+>b39e  82 07                                 .WORD SEMIS
+>b3a0  86 43 52 45 41 54 c5        L2142     .BYTE $86,"CREAT",$C5
+>b3a7  6f 11                                 .WORD L2113    ; link to ID
+>b3a9  4c 09                       CREAT     .WORD DOCOL
+>b3ab  49 0a                                 .WORD TIB      ;)
+>b3ad  30 0b                                 .WORD HERE     ;|
+>b3af  64 04                                 .WORD CLIT     ;|  6502 only, assures
+>b3b1  a0                                    .BYTE $A0      ;|  room exists in dict.
+>b3b2  0f 08                                 .WORD PLUS     ;|
+>b3b4  86 0b                                 .WORD ULESS    ;|
+>b3b6  e0 09                                 .WORD TWO      ;|
+>b3b8  84 0c                                 .WORD QERR     ;)
+>b3ba  00 11                                 .WORD DFIND
+>b3bc  be 04                                 .WORD ZBRAN
+>b3be  0f 00                       L2155     .WORD $0F
+>b3c0  8f 08                                 .WORD DROP
+>b3c2  48 0c                                 .WORD NFA
+>b3c4  75 11                                 .WORD IDDOT
+>b3c6  64 04                                 .WORD CLIT
+>b3c8  04                                    .BYTE 4
+>b3c9  df 16                                 .WORD MESS
+>b3cb  d1 0b                                 .WORD SPACE
+>b3cd  30 0b                       L2163     .WORD HERE
+>b3cf  b0 08                                 .WORD DUP
+>b3d1  04 09                                 .WORD CAT
+>b3d3  54 0a                                 .WORD WIDTH
+>b3d5  ef 08                                 .WORD AT
+>b3d7  45 14                                 .WORD MIN
+>b3d9  14 0b                                 .WORD ONEP
+>b3db  40 0b                                 .WORD ALLOT
+>b3dd  74 0a                                 .WORD DP       ;)
+>b3df  04 09                                 .WORD CAT      ;| 6502 only. The code field
+>b3e1  64 04                                 .WORD CLIT     ;| must not straddle page
+>b3e3  fd                                    .BYTE $FD      ;| boundaries
+>b3e4  79 0b                                 .WORD EQUAL    ;|
+>b3e6  40 0b                                 .WORD ALLOT    ;)
+>b3e8  b0 08                                 .WORD DUP
+>b3ea  64 04                                 .WORD CLIT
+>b3ec  a0                                    .BYTE $A0
+>b3ed  e0 08                                 .WORD TOGGL
+>b3ef  30 0b                                 .WORD HERE
+>b3f1  d8 09                                 .WORD ONE
+>b3f3  6d 0b                                 .WORD SUB
+>b3f5  64 04                                 .WORD CLIT
+>b3f7  80                                    .BYTE $80
+>b3f8  e0 08                                 .WORD TOGGL
+>b3fa  1b 0c                                 .WORD LATES
+>b3fc  4c 0b                                 .WORD COMMA
+>b3fe  cb 0a                                 .WORD CURR
+>b400  ef 08                                 .WORD AT
+>b402  13 09                                 .WORD STORE
+>b404  30 0b                                 .WORD HERE
+>b406  21 0b                                 .WORD TWOP
+>b408  4c 0b                                 .WORD COMMA
+>b40a  82 07                                 .WORD SEMIS
+>b40c  c9 5b 43 4f 4d 50 49 4c 45 dd  L2200     .BYTE $C9,"[COMPILE",$DD
+>b416  a0 11                                 .WORD L2142    ; link to CREATE
+>b418  4c 09                                 .WORD DOCOL
+>b41a  00 11                                 .WORD DFIND
+>b41c  e9 07                                 .WORD ZEQU
+>b41e  d0 09                                 .WORD ZERO
+>b420  84 0c                                 .WORD QERR
+>b422  8f 08                                 .WORD DROP
+>b424  3a 0c                                 .WORD CFA
+>b426  4c 0b                                 .WORD COMMA
+>b428  82 07                                 .WORD SEMIS
+>b42a  c7 4c 49 54 45 52 41 cc     L2216     .BYTE $C7,"LITERA",$CC
+>b432  0c 12                                 .WORD L2200    ; link to [COMPILE]
+>b434  4c 09                       LITER     .WORD DOCOL
+>b436  d6 0a                                 .WORD STATE
+>b438  ef 08                                 .WORD AT
+>b43a  be 04                                 .WORD ZBRAN
+>b43c  08 00                       L2222     .WORD 8        ; L2226-L2222
+>b43e  12 0d                                 .WORD COMP
+>b440  2a 04                                 .WORD LIT
+>b442  4c 0b                                 .WORD COMMA
+>b444  82 07                       L2226     .WORD SEMIS
+>b446  c8 44 4c 49 54 45 52 41 cc  L2232     .BYTE $C8,"DLITERA",$CC
+>b44f  2a 12                                 .WORD L2216    ; link to LITERAL
+>b451  4c 09                       DLIT      .WORD DOCOL
+>b453  d6 0a                                 .WORD STATE
+>b455  ef 08                                 .WORD AT
+>b457  be 04                                 .WORD ZBRAN
+>b459  08 00                       L2238     .WORD 8        ; L2242-L2238
+>b45b  98 08                                 .WORD SWAP
+>b45d  34 12                                 .WORD LITER
+>b45f  34 12                                 .WORD LITER
+>b461  82 07                       L2242     .WORD SEMIS
+>b463  86 3f 53 54 41 43 cb        L2248     .BYTE $86,"?STAC",$CB
+>b46a  46 12                                 .WORD L2232    ; link to DLITERAL
+>b46c  4c 09                       QSTAC     .WORD DOCOL
+>b46e  64 04                                 .WORD CLIT
+>b470  9f                                    .BYTE TOS
+>b471  4f 07                                 .WORD SPAT
+>b473  86 0b                                 .WORD ULESS
+>b475  d8 09                                 .WORD ONE
+>b477  84 0c                                 .WORD QERR
+>b479  4f 07                                 .WORD SPAT
+>b47b  64 04                                 .WORD CLIT
+>b47d  20                                    .BYTE BOS
+>b47e  86 0b                                 .WORD ULESS
+>b480  64 04                                 .WORD CLIT
+>b482  07                                    .BYTE 7
+>b483  84 0c                                 .WORD QERR
+>b485  82 07                                 .WORD SEMIS
+>b487  89 49 4e 54 45 52 50 52 45 d4  L2269     .BYTE $89,"INTERPRE",$D4
+>b491  63 12                                 .WORD L2248    ; link to ?STACK
+>b493  4c 09                       INTER     .WORD DOCOL
+>b495  00 11                       L2272     .WORD DFIND
+>b497  be 04                                 .WORD ZBRAN
+>b499  1e 00                       L2274     .WORD $1E      ; L2289-L2274
+>b49b  d6 0a                                 .WORD STATE
+>b49d  ef 08                                 .WORD AT
+>b49f  92 0b                                 .WORD LESS
+>b4a1  be 04                                 .WORD ZBRAN
+>b4a3  0a 00                       L2279     .WORD $A       ; L2284-L2279
+>b4a5  3a 0c                                 .WORD CFA
+>b4a7  4c 0b                                 .WORD COMMA
+>b4a9  9f 04                                 .WORD BRAN
+>b4ab  06 00                       L2283     .WORD $6       ; L2286-L2283
+>b4ad  3a 0c                       L2284     .WORD CFA
+>b4af  87 04                                 .WORD EXEC
+>b4b1  6c 12                       L2286     .WORD QSTAC
+>b4b3  9f 04                                 .WORD BRAN
+>b4b5  1c 00                       L2288     .WORD $1C      ; L2302-L2288
+>b4b7  30 0b                       L2289     .WORD HERE
+>b4b9  aa 10                                 .WORD NUMBER
+>b4bb  e9 0a                                 .WORD DPL
+>b4bd  ef 08                                 .WORD AT
+>b4bf  14 0b                                 .WORD ONEP
+>b4c1  be 04                                 .WORD ZBRAN
+>b4c3  08 00                       L2295     .WORD 8        ; L2299-L2295
+>b4c5  51 12                                 .WORD DLIT
+>b4c7  9f 04                                 .WORD BRAN
+>b4c9  06 00                       L2298     .WORD $6       ; L2301-L2298
+>b4cb  8f 08                       L2299     .WORD DROP
+>b4cd  34 12                                 .WORD LITER
+>b4cf  6c 12                       L2301     .WORD QSTAC
+>b4d1  9f 04                       L2302     .WORD BRAN
+>b4d3  c2 ff                       L2303     .WORD $FFC2    ; L2272-L2303
+>b4d5  89 49 4d 4d 45 44 49 41 54 c5  L2309     .BYTE $89,"IMMEDIAT",$C5
+>b4df  87 12                                 .WORD L2269;   ; link to INTERPRET
+>b4e1  4c 09                                 .WORD DOCOL
+>b4e3  1b 0c                                 .WORD LATES
+>b4e5  64 04                                 .WORD CLIT
+>b4e7  40                                    .BYTE $40
+>b4e8  e0 08                                 .WORD TOGGL
+>b4ea  82 07                                 .WORD SEMIS
+>b4ec  8a 56 4f 43 41 42 55 4c 41 52 d9  L2321     .BYTE $8A,"VOCABULAR",$D9
+>b4f7  d5 12                                 .WORD L2309    ; link to IMMEDIATE
+>b4f9  4c 09                                 .WORD DOCOL
+>b4fb  b3 0d                                 .WORD BUILD
+>b4fd  2a 04 81 a0                           .WORD LIT,$A081
+>b501  4c 0b                                 .WORD COMMA
+>b503  cb 0a                                 .WORD CURR
+>b505  ef 08                                 .WORD AT
+>b507  3a 0c                                 .WORD CFA
+>b509  4c 0b                                 .WORD COMMA
+>b50b  30 0b                                 .WORD HERE
+>b50d  82 0a                                 .WORD VOCL
+>b50f  ef 08                                 .WORD AT
+>b511  4c 0b                                 .WORD COMMA
+>b513  82 0a                                 .WORD VOCL
+>b515  13 09                                 .WORD STORE
+>b517  c3 0d                                 .WORD DOES
+>b519  21 0b                       DOVOC     .WORD TWOP
+>b51b  be 0a                                 .WORD CON
+>b51d  13 09                                 .WORD STORE
+>b51f  82 07                                 .WORD SEMIS
+>b521  c5 46 4f 52 54 c8           L2346     .BYTE $C5,"FORT",$C8
+>b527  ec 12                                 .WORD L2321    ; link to VOCABULARY
+>b529  cf 0d                       FORTH     .WORD DODOE
+>b52b  19 13                                 .WORD DOVOC
+>b52d  81 a0                                 .WORD $A081
+>b52f  5a 1b                       XFOR      .WORD NTOP     ; points to top name in FORTH
+>b531  00 00                       VL0       .WORD 0        ; last vocab link ends at zero
+>b533  8b 44 45 46 49 4e 49 54 49 4f 4e d3  L2357     .BYTE $8B,"DEFINITION",$D3
+>b53f  21 13                                 .WORD L2346    ; link to FORTH
+>b541  4c 09                       DEFIN     .WORD DOCOL
+>b543  be 0a                                 .WORD CON
+>b545  ef 08                                 .WORD AT
+>b547  cb 0a                                 .WORD CURR
+>b549  13 09                                 .WORD STORE
+>b54b  82 07                                 .WORD SEMIS
+>b54d  c1 a8                       L2369     .BYTE $C1,$A8
+>b54f  33 13                                 .WORD L2357    ; link to DEFINITIONS
+>b551  4c 09                                 .WORD DOCOL
+>b553  64 04                                 .WORD CLIT
+>b555  29                                    .BYTE $29
+>b556  e3 0f                                 .WORD WORD
+>b558  82 07                                 .WORD SEMIS
+>b55a  84 51 55 49 d4              L2381     .BYTE $84,"QUI",$D4
+>b55f  4d 13                                 .WORD L2369    ; link to (
+>b561  4c 09                       QUIT      .WORD DOCOL
+>b563  d0 09                                 .WORD ZERO
+>b565  8b 0a                                 .WORD BLK
+>b567  13 09                                 .WORD STORE
+>b569  28 0d                                 .WORD LBRAC
+>b56b  6e 07                       L2388     .WORD RPSTO
+>b56d  5c 06                                 .WORD CR
+>b56f  23 0f                                 .WORD QUERY
+>b571  93 12                                 .WORD INTER
+>b573  d6 0a                                 .WORD STATE
+>b575  ef 08                                 .WORD AT
+>b577  e9 07                                 .WORD ZEQU
+>b579  be 04                                 .WORD ZBRAN
+>b57b  07 00                       L2396     .WORD 7        ; L2399-L2396
+>b57d  69 0e                                 .WORD PDOTQ
+>b57f  02 4f 4b                              .BYTE 2,"OK"
+>b582  9f 04                       L2399     .WORD BRAN
+>b584  e7 ff                       L2400     .WORD $FFE7    ; L2388-L2400
+>b586  82 07                                 .WORD SEMIS
+>b588  85 41 42 4f 52 d4           L2406     .BYTE $85,"ABOR",$D4
+>b58e  5a 13                                 .WORD L2381    ; link to QUIT
+>b590  4c 09                       ABORT     .WORD DOCOL
+>b592  5e 07                                 .WORD SPSTO
+>b594  70 0d                                 .WORD DECIM
+>b596  db 15                                 .WORD DR0
+>b598  5c 06                                 .WORD CR
+>b59a  69 0e                                 .WORD PDOTQ
+>b59c  0e 66 69 67 2d 46 4f 52 54 48 20 20 31 2e 30            .BYTE 14,"fig-FORTH  1.0"
+>b5ab  29 13                                 .WORD FORTH
+>b5ad  41 13                                 .WORD DEFIN
+>b5af  61 13                                 .WORD QUIT
+>b5b1  84 43 4f 4c c4              L2423     .BYTE $84,"COL",$C4
+>b5b6  88 13                                 .WORD L2406    ; link to ABORT
+>b5b8  ba 13                       COLD      .WORD *+2
+
+.b5ba  ad 0c 04   lda $040c                  LDA ORIG+$0C   ; from cold start area
+.b5bd  8d 2f 13   sta $132f                  STA FORTH+6
+.b5c0  ad 0d 04   lda $040d                  LDA ORIG+$0D
+.b5c3  8d 30 13   sta $1330                  STA FORTH+7
+.b5c6  a0 15      ldy #$15                   LDY #$15
+.b5c8  d0 02      bne $b5cc                  BNE L2433
+.b5ca  a0 0f      ldy #$0f         WARM      LDY #$0F
+.b5cc  ad 10 04   lda $0410        L2433     LDA ORIG+$10
+.b5cf  85 b4      sta $b4                    STA UP
+.b5d1  ad 11 04   lda $0411                  LDA ORIG+$11
+.b5d4  85 b5      sta $b5                    STA UP+1
+.b5d6  b9 0c 04   lda $040c,y      L2437     LDA ORIG+$0C,Y
+.b5d9  91 b4      sta ($b4),y                STA (UP),Y
+.b5db  88         dey                        DEY
+.b5dc  10 f8      bpl $b5d6                  BPL  L2437
+.b5de  a9 13      lda #$13                   LDA #>ABORT    ; actually #>(ABORT+2)
+.b5e0  85 b0      sta $b0                    STA IP+1
+.b5e2  a9 92      lda #$92                   LDA #<ABORT+2
+.b5e4  85 af      sta $af                    STA IP
+.b5e6  d8         cld                        CLD
+.b5e7  a9 6c      lda #$6c                   LDA #$6C	 ; ind jump opcode
+.b5e9  85 b1      sta $b1                    STA W-1
+.b5eb  4c 70 07   jmp $0770                  JMP RPSTO+2    ; And off we go !
+
+>b5ee  84 53 2d 3e c4              L2453     .BYTE $84,"S->",$C4
+>b5f3  b1 13                                 .WORD L2423    ; link to COLD
+>b5f5  4c 09                       STOD      .WORD DOCOL
+>b5f7  b0 08                                 .WORD DUP
+>b5f9  fe 07                                 .WORD ZLESS
+>b5fb  4e 08                                 .WORD MINUS
+>b5fd  82 07                                 .WORD SEMIS
+>b5ff  82 2b ad                    L2464     .BYTE $82,"+",$AD
+>b602  ee 13                                 .WORD L2453    ; link to S->D
+>b604  4c 09                       PM        .WORD DOCOL
+>b606  fe 07                                 .WORD ZLESS
+>b608  be 04                                 .WORD ZBRAN
+>b60a  04 00                       L2469     .WORD 4
+>b60c  4e 08                                 .WORD MINUS
+>b60e  82 07                       L2471     .WORD SEMIS
+>b610  83 44 2b ad                 L2476     .BYTE $83,"D+",$AD
+>b614  ff 13                                 .WORD L2464    ; link to +-
+>b616  4c 09                       DPM       .WORD DOCOL
+>b618  fe 07                                 .WORD ZLESS
+>b61a  be 04                                 .WORD ZBRAN
+>b61c  04 00                       L2481     .WORD 4        ; L2483-L2481
+>b61e  67 08                                 .WORD DMINU
+>b620  82 07                       L2483     .WORD SEMIS
+>b622  83 41 42 d3                 L2488     .BYTE $83,"AB",$D3
+>b626  10 14                                 .WORD L2476    ; link to D+-
+>b628  4c 09                       ABS       .WORD DOCOL
+>b62a  b0 08                                 .WORD DUP
+>b62c  04 14                                 .WORD PM
+>b62e  82 07                                 .WORD SEMIS
+>b630  84 44 41 42 d3              L2498     .BYTE $84,"DAB",$D3
+>b635  22 14                                 .WORD L2488    ; link to ABS
+>b637  4c 09                       DABS      .WORD DOCOL
+>b639  b0 08                                 .WORD DUP
+>b63b  16 14                                 .WORD DPM
+>b63d  82 07                                 .WORD SEMIS
+>b63f  83 4d 49 ce                 L2508     .BYTE $83,"MI",$CE
+>b643  30 14                                 .WORD L2498    ; link to DABS
+>b645  4c 09                       MIN       .WORD DOCOL
+>b647  7e 08                                 .WORD OVER
+>b649  7e 08                                 .WORD OVER
+>b64b  af 0b                                 .WORD GREAT
+>b64d  be 04                                 .WORD ZBRAN
+>b64f  04 00                       L2515     .WORD 4        ; L2517-L2515
+>b651  98 08                                 .WORD SWAP
+>b653  8f 08                       L2517     .WORD DROP
+>b655  82 07                                 .WORD SEMIS
+>b657  83 4d 41 d8                 L2523     .BYTE $83,"MA",$D8
+>b65b  3f 14                                 .WORD L2508     ; link to MIN
+>b65d  4c 09                       MAX       .WORD DOCOL
+>b65f  7e 08                                 .WORD OVER
+>b661  7e 08                                 .WORD OVER
+>b663  92 0b                                 .WORD LESS
+>b665  be 04                                 .WORD ZBRAN
+>b667  04 00                       L2530     .WORD 4        ; L2532-L2530
+>b669  98 08                                 .WORD SWAP
+>b66b  8f 08                       L2532     .WORD DROP
+>b66d  82 07                                 .WORD SEMIS
+>b66f  82 4d aa                    L2538     .BYTE $82,"M",$AA
+>b672  57 14                                 .WORD L2523    ; link to MAX
+>b674  4c 09                       MSTAR     .WORD DOCOL
+>b676  7e 08                                 .WORD OVER
+>b678  7e 08                                 .WORD OVER
+>b67a  39 07                                 .WORD XOR
+>b67c  b0 07                                 .WORD TOR
+>b67e  28 14                                 .WORD ABS
+>b680  98 08                                 .WORD SWAP
+>b682  28 14                                 .WORD ABS
+>b684  8b 06                                 .WORD USTAR
+>b686  c2 07                                 .WORD RFROM
+>b688  16 14                                 .WORD DPM
+>b68a  82 07                                 .WORD SEMIS
+>b68c  82 4d af                    L2556     .BYTE $82,"M",$AF
+>b68f  6f 14                                 .WORD L2538    ; link to M*
+>b691  4c 09                       MSLAS     .WORD DOCOL
+>b693  7e 08                                 .WORD OVER
+>b695  b0 07                                 .WORD TOR
+>b697  b0 07                                 .WORD TOR
+>b699  37 14                                 .WORD DABS
+>b69b  d3 07                                 .WORD R
+>b69d  28 14                                 .WORD ABS
+>b69f  be 06                                 .WORD USLAS
+>b6a1  c2 07                                 .WORD RFROM
+>b6a3  d3 07                                 .WORD R
+>b6a5  39 07                                 .WORD XOR
+>b6a7  04 14                                 .WORD PM
+>b6a9  98 08                                 .WORD SWAP
+>b6ab  c2 07                                 .WORD RFROM
+>b6ad  04 14                                 .WORD PM
+>b6af  98 08                                 .WORD SWAP
+>b6b1  82 07                                 .WORD SEMIS
+>b6b3  81 aa                       L2579     .BYTE $81,$AA
+>b6b5  8c 14                                 .WORD L2556    ; link to M/
+>b6b7  4c 09                       STAR      .WORD DOCOL
+>b6b9  8b 06                                 .WORD USTAR
+>b6bb  8f 08                                 .WORD DROP
+>b6bd  82 07                                 .WORD SEMIS
+>b6bf  84 2f 4d 4f c4              L2589     .BYTE $84,"/MO",$C4
+>b6c4  b3 14                                 .WORD L2579    ; link to *
+>b6c6  4c 09                       SLMOD     .WORD DOCOL
+>b6c8  b0 07                                 .WORD TOR
+>b6ca  f5 13                                 .WORD STOD
+>b6cc  c2 07                                 .WORD RFROM
+>b6ce  91 14                                 .WORD MSLAS
+>b6d0  82 07                                 .WORD SEMIS
+>b6d2  81 af                       L2601     .BYTE $81,$AF
+>b6d4  bf 14                                 .WORD L2589    ; link to /MOD
+>b6d6  4c 09                       SLASH     .WORD DOCOL
+>b6d8  c6 14                                 .WORD SLMOD
+>b6da  98 08                                 .WORD SWAP
+>b6dc  8f 08                                 .WORD DROP
+>b6de  82 07                                 .WORD SEMIS
+>b6e0  83 4d 4f c4                 L2612     .BYTE $83,"MO",$C4
+>b6e4  d2 14                                 .WORD L2601    ; link to /
+>b6e6  4c 09                       MOD       .WORD DOCOL
+>b6e8  c6 14                                 .WORD SLMOD
+>b6ea  8f 08                                 .WORD DROP
+>b6ec  82 07                                 .WORD SEMIS
+>b6ee  85 2a 2f 4d 4f c4           L2622     .BYTE $85,"*/MO",$C4
+>b6f4  e0 14                                 .WORD L2612    ; link to MOD
+>b6f6  4c 09                       SSMOD     .WORD DOCOL
+>b6f8  b0 07                                 .WORD TOR
+>b6fa  74 14                                 .WORD MSTAR
+>b6fc  c2 07                                 .WORD RFROM
+>b6fe  91 14                                 .WORD MSLAS
+>b700  82 07                                 .WORD SEMIS
+>b702  82 2a af                    L2634     .BYTE $82,"*",$AF
+>b705  ee 14                                 .WORD L2622    ; link to */MOD
+>b707  4c 09                       SSLAS     .WORD DOCOL
+>b709  f6 14                                 .WORD SSMOD
+>b70b  98 08                                 .WORD SWAP
+>b70d  8f 08                                 .WORD DROP
+>b70f  82 07                                 .WORD SEMIS
+>b711  85 4d 2f 4d 4f c4           L2645     .BYTE $85,"M/MO",$C4
+>b717  02 15                                 .WORD L2634    ; link to */
+>b719  4c 09                       MSMOD     .WORD DOCOL
+>b71b  b0 07                                 .WORD TOR
+>b71d  d0 09                                 .WORD ZERO
+>b71f  d3 07                                 .WORD R
+>b721  be 06                                 .WORD USLAS
+>b723  c2 07                                 .WORD RFROM
+>b725  98 08                                 .WORD SWAP
+>b727  b0 07                                 .WORD TOR
+>b729  be 06                                 .WORD USLAS
+>b72b  c2 07                                 .WORD RFROM
+>b72d  82 07                                 .WORD SEMIS
+>b72f  83 55 53 c5                 L2662     .BYTE $83,"US",$C5
+>b733  11 15                                 .WORD L2645    ; link to M/MOD
+>b735  a4 09                       USE       .WORD DOVAR
+>b737  60 3a                                 .WORD DAREA
+>b739  84 50 52 45 d6              L2670     .BYTE $84,"PRE",$D6
+>b73e  2f 15                                 .WORD L2662    ; link to USE
+>b740  a4 09                       PREV      .WORD DOVAR
+>b742  60 3a                                 .WORD DAREA
+>b744  84 2b 42 55 c6              L2678     .BYTE $84,"+BU",$C6
+>b749  39 15                                 .WORD L2670    ; link to PREV
+>b74b  4c 09                       PBUF      .WORD DOCOL
+>b74d  2a 04                                 .WORD LIT
+>b74f  84 00                                 .WORD SSIZE+4  ; hold block #, one sector two num
+>b751  0f 08                                 .WORD PLUS
+>b753  b0 08                                 .WORD DUP
+>b755  13 0a                                 .WORD LIMIT
+>b757  79 0b                                 .WORD EQUAL
+>b759  be 04                                 .WORD ZBRAN
+>b75b  06 00                       L2688     .WORD 6        ; L2691-L2688
+>b75d  8f 08                                 .WORD DROP
+>b75f  07 0a                                 .WORD FIRST
+>b761  b0 08                       L2691     .WORD DUP
+>b763  40 15                                 .WORD PREV
+>b765  ef 08                                 .WORD AT
+>b767  6d 0b                                 .WORD SUB
+>b769  82 07                                 .WORD SEMIS
+>b76b  86 55 50 44 41 54 c5        L2700     .BYTE $86,"UPDAT",$C5
+>b772  44 15                                 .WORD L2678    ; link to +BUF
+>b774  4c 09                       UPDAT     .WORD DOCOL
+>b776  40 15                                 .WORD PREV
+>b778  ef 08                                 .WORD AT
+>b77a  ef 08                                 .WORD AT
+>b77c  2a 04 00 80                           .WORD LIT,$8000
+>b780  23 07                                 .WORD OR
+>b782  40 15                                 .WORD PREV
+>b784  ef 08                                 .WORD AT
+>b786  13 09                                 .WORD STORE
+>b788  82 07                                 .WORD SEMIS
+>b78a  85 46 4c 55 53 c8           L2705     .BYTE $85,"FLUS",$C8
+>b790  6b 15                                 .WORD L2700    ; link to UPDATE
+>b792  4c 09                                 .WORD DOCOL
+>b794  13 0a 07 0a 6d 0b                     .WORD LIMIT,FIRST,SUB
+>b79a  1f 0a 64 04                           .WORD BBUF,CLIT
+>b79e  04                                    .BYTE 4
+>b79f  0f 08 d6 14 14 0b                     .WORD PLUS,SLASH,ONEP
+>b7a5  d0 09 46 05                           .WORD ZERO,PDO
+>b7a9  2a 04 ff 7f 00 16           L2835     .WORD LIT,$7FFF,BUFFR
+>b7af  8f 08 df 04                           .WORD DROP,PLOOP
+>b7b3  f6 ff                       L2839     .WORD $FFF6    ; L2835-L2839
+>b7b5  82 07                                 .WORD SEMIS
+>b7b7  8d 45 4d 50 54 59 2d 42 55 46 46 45 52 d3  L2716     .BYTE $8D,"EMPTY-BUFFER",$D3
+>b7c5  8a 15                                 .WORD L2705    ; link to FLUSH
+>b7c7  4c 09                                 .WORD DOCOL
+>b7c9  07 0a                                 .WORD FIRST
+>b7cb  13 0a                                 .WORD LIMIT
+>b7cd  7e 08                                 .WORD OVER
+>b7cf  6d 0b                                 .WORD SUB
+>b7d1  99 0f                                 .WORD ERASE
+>b7d3  82 07                                 .WORD SEMIS
+>b7d5  83 44 52 b0                 L2729     .BYTE $83,"DR",$B0
+>b7d9  b7 15                                 .WORD L2716    ; link to EMPTY-BUFFERS
+>b7db  4c 09                       DR0       .WORD DOCOL
+>b7dd  d0 09                                 .WORD ZERO
+>b7df  b1 0a                                 .WORD OFSET
+>b7e1  13 09                                 .WORD STORE
+>b7e3  82 07                                 .WORD SEMIS
+>b7e5  83 44 52 b1                 L2740     .BYTE $83,"DR",$B1
+>b7e9  d5 15                                 .WORD L2729    ; link to DR0
+>b7eb  4c 09                                 .WORD DOCOL
+>b7ed  2a 04 20 03                           .WORD LIT,SECTR ; sectors per drive
+>b7f1  b1 0a                                 .WORD OFSET
+>b7f3  13 09                                 .WORD STORE
+>b7f5  82 07                                 .WORD SEMIS
+>b7f7  86 42 55 46 46 45 d2        L2751     .BYTE $86,"BUFFE",$D2
+>b7fe  e5 15                                 .WORD L2740    ; link to DR1
+>b800  4c 09                       BUFFR     .WORD DOCOL
+>b802  35 15                                 .WORD USE
+>b804  ef 08                                 .WORD AT
+>b806  b0 08                                 .WORD DUP
+>b808  b0 07                                 .WORD TOR
+>b80a  4b 15                       L2758     .WORD PBUF
+>b80c  be 04                                 .WORD ZBRAN
+>b80e  fc ff                       L2760     .WORD $FFFC    ; L2758-L2760
+>b810  35 15                                 .WORD USE
+>b812  13 09                                 .WORD STORE
+>b814  d3 07                                 .WORD R
+>b816  ef 08                                 .WORD AT
+>b818  fe 07                                 .WORD ZLESS
+>b81a  be 04                                 .WORD ZBRAN
+>b81c  14 00                       L2767     .WORD $14      ; L2776-L2767
+>b81e  d3 07                                 .WORD R
+>b820  21 0b                                 .WORD TWOP
+>b822  d3 07                                 .WORD R
+>b824  ef 08                                 .WORD AT
+>b826  2a 04 ff 7f                           .WORD LIT,$7FFF
+>b82a  0e 07                                 .WORD ANDD
+>b82c  d0 09                                 .WORD ZERO
+>b82e  a0 17                                 .WORD RSW
+>b830  d3 07                       L2776     .WORD R
+>b832  13 09                                 .WORD STORE
+>b834  d3 07                                 .WORD R
+>b836  40 15                                 .WORD PREV
+>b838  13 09                                 .WORD STORE
+>b83a  c2 07                                 .WORD RFROM
+>b83c  21 0b                                 .WORD TWOP
+>b83e  82 07                                 .WORD SEMIS
+>b840  85 42 4c 4f 43 cb           L2788     .BYTE $85,"BLOC",$CB
+>b846  f7 15                                 .WORD L2751    ; link to BUFFER
+>b848  4c 09                       BLOCK     .WORD DOCOL
+>b84a  b1 0a                                 .WORD OFSET
+>b84c  ef 08                                 .WORD AT
+>b84e  0f 08                                 .WORD PLUS
+>b850  b0 07                                 .WORD TOR
+>b852  40 15                                 .WORD PREV
+>b854  ef 08                                 .WORD AT
+>b856  b0 08                                 .WORD DUP
+>b858  ef 08                                 .WORD AT
+>b85a  d3 07                                 .WORD R
+>b85c  6d 0b                                 .WORD SUB
+>b85e  b0 08                                 .WORD DUP
+>b860  0f 08                                 .WORD PLUS
+>b862  be 04                                 .WORD ZBRAN
+>b864  34 00                       L2804     .WORD $34      ; L2830-L2804
+>b866  4b 15                       L2805     .WORD PBUF
+>b868  e9 07                                 .WORD ZEQU
+>b86a  be 04                                 .WORD ZBRAN
+>b86c  14 00                       L2808     .WORD $14      ; L2818-L2808
+>b86e  8f 08                                 .WORD DROP
+>b870  d3 07                                 .WORD R
+>b872  00 16                                 .WORD BUFFR
+>b874  b0 08                                 .WORD DUP
+>b876  d3 07                                 .WORD R
+>b878  d8 09                                 .WORD ONE
+>b87a  a0 17                                 .WORD RSW
+>b87c  e0 09                                 .WORD TWO
+>b87e  6d 0b                                 .WORD SUB
+>b880  b0 08                       L2818     .WORD DUP
+>b882  ef 08                                 .WORD AT
+>b884  d3 07                                 .WORD R
+>b886  6d 0b                                 .WORD SUB
+>b888  b0 08                                 .WORD DUP
+>b88a  0f 08                                 .WORD PLUS
+>b88c  e9 07                                 .WORD ZEQU
+>b88e  be 04                                 .WORD ZBRAN
+>b890  d6 ff                       L2826     .WORD $FFD6    ; L2805-L2826
+>b892  b0 08                                 .WORD DUP
+>b894  40 15                                 .WORD PREV
+>b896  13 09                                 .WORD STORE
+>b898  c2 07                       L2830     .WORD RFROM
+>b89a  8f 08                                 .WORD DROP
+>b89c  21 0b                                 .WORD TWOP
+>b89e  82 07                                 .WORD SEMIS    ; end of BLOCK
+>b8a0  86 28 4c 49 4e 45 a9        L2838     .BYTE $86,"(LINE",$A9
+>b8a7  40 16                                 .WORD L2788    ; link to BLOCK
+>b8a9  4c 09                       PLINE     .WORD DOCOL
+>b8ab  b0 07                                 .WORD TOR
+>b8ad  fb 09                                 .WORD CSLL
+>b8af  1f 0a                                 .WORD BBUF
+>b8b1  f6 14                                 .WORD SSMOD
+>b8b3  c2 07                                 .WORD RFROM
+>b8b5  2b 0a                                 .WORD BSCR
+>b8b7  b7 14                                 .WORD STAR
+>b8b9  0f 08                                 .WORD PLUS
+>b8bb  48 16                                 .WORD BLOCK
+>b8bd  0f 08                                 .WORD PLUS
+>b8bf  fb 09                                 .WORD CSLL
+>b8c1  82 07                                 .WORD SEMIS
+>b8c3  85 2e 4c 49 4e c5           L2857     .BYTE $85,".LIN",$C5
+>b8c9  a0 16                                 .WORD L2838    ; link to (LINE)
+>b8cb  4c 09                       DLINE     .WORD DOCOL
+>b8cd  a9 16                                 .WORD PLINE
+>b8cf  36 0e                                 .WORD DTRAI
+>b8d1  08 0e                                 .WORD TYPE
+>b8d3  82 07                                 .WORD SEMIS
+>b8d5  87 4d 45 53 53 41 47 c5     L2868     .BYTE $87,"MESSAG",$C5
+>b8dd  c3 16                                 .WORD L2857    ; link to .LINE
+>b8df  4c 09                       MESS      .WORD DOCOL
+>b8e1  61 0a                                 .WORD WARN
+>b8e3  ef 08                                 .WORD AT
+>b8e5  be 04                                 .WORD ZBRAN
+>b8e7  1b 00                       L2874     .WORD $1B      ; L2888-L2874
+>b8e9  e0 0b                                 .WORD DDUP
+>b8eb  be 04                                 .WORD ZBRAN
+>b8ed  11 00                       L2877     .WORD $11      ; L2886-L2877
+>b8ef  64 04                                 .WORD CLIT
+>b8f1  04                                    .BYTE 4
+>b8f2  b1 0a                                 .WORD OFSET
+>b8f4  ef 08                                 .WORD AT
+>b8f6  2b 0a                                 .WORD BSCR
+>b8f8  d6 14                                 .WORD SLASH
+>b8fa  6d 0b                                 .WORD SUB
+>b8fc  cb 16                                 .WORD DLINE
+>b8fe  9f 04                       L2886     .WORD BRAN
+>b900  0d 00                       L2887     .WORD 13       ; L2891-L2887
+>b902  69 0e                       L2888     .WORD PDOTQ
+>b904  06 4d 53 47 20 23 20                  .BYTE 6,"MSG # "
+>b90b  53 1a                                 .WORD DOT
+>b90d  82 07                       L2891     .WORD SEMIS
+>b90f  84 4c 4f 41 c4              L2896     .BYTE $84,"LOA",$C4
+>b914  d5 16                                 .WORD L2868    ; link to MESSAGE
+>b916  4c 09                       LOAD      .WORD DOCOL
+>b918  8b 0a                                 .WORD BLK
+>b91a  ef 08                                 .WORD AT
+>b91c  b0 07                                 .WORD TOR
+>b91e  93 0a                                 .WORD IN
+>b920  ef 08                                 .WORD AT
+>b922  b0 07                                 .WORD TOR
+>b924  d0 09                                 .WORD ZERO
+>b926  93 0a                                 .WORD IN
+>b928  13 09                                 .WORD STORE
+>b92a  2b 0a                                 .WORD BSCR
+>b92c  b7 14                                 .WORD STAR
+>b92e  8b 0a                                 .WORD BLK
+>b930  13 09                                 .WORD STORE
+>b932  93 12                                 .WORD INTER
+>b934  c2 07                                 .WORD RFROM
+>b936  93 0a                                 .WORD IN
+>b938  13 09                                 .WORD STORE
+>b93a  c2 07                                 .WORD RFROM
+>b93c  8b 0a                                 .WORD BLK
+>b93e  13 09                                 .WORD STORE
+>b940  82 07                                 .WORD SEMIS
+>b942  c3 2d 2d be                 L2924     .BYTE $C3,"--",$BE
+>b946  0f 17                                 .WORD L2896    ; link to LOAD
+>b948  4c 09                                 .WORD DOCOL
+>b94a  f9 0c                                 .WORD QLOAD
+>b94c  d0 09                                 .WORD ZERO
+>b94e  93 0a                                 .WORD IN
+>b950  13 09                                 .WORD STORE
+>b952  2b 0a                                 .WORD BSCR
+>b954  8b 0a                                 .WORD BLK
+>b956  ef 08                                 .WORD AT
+>b958  7e 08                                 .WORD OVER
+>b95a  e6 14                                 .WORD MOD
+>b95c  6d 0b                                 .WORD SUB
+>b95e  8b 0a                                 .WORD BLK
+>b960  bf 08                                 .WORD PSTOR
+>b962  82 07                                 .WORD SEMIS
+.b964                              xemit
+
+.b964  b5 00      lda $00,x                  LDA 0,X        ; fetch character to output
+.b966  20 f4 a4   jsr $a4f4                  JSR OUTCH      ; and display it
+.b969  4c 56 05   jmp $0556                  JMP POP
+.b96c                              xkey
+.b96c  20 dc a4   jsr $a4dc                  JSR INCH       ; might otherwise clobber it while
+.b96f  4c 52 07   jmp $0752                  JMP PUSHOA
+.b972  20 0a a5   jsr $a50a        XQTER     jsr cbrk	; if Ctrl-c, set C else clear C
+.b975  a9 00      lda #$00         	  lda #$00      ; 0
+.b977  2a         rol              	  rol	        ; move carry to bit 0
+.b978  4c 52 07   jmp $0752                  JMP PUSHOA
+.b97b                              xcr
+.b97b  20 01 a5   jsr $a501                  JSR TCR        ; use monitor call
+.b97e  4c 44 04   jmp $0444                  JMP NEXT
+
+>b981  84 2d 42 43 c4              L3050     .BYTE $84,"-BC",$C4
+>b986  42 17                                 .WORD L2924    ; link to -DISC
+>b988  4c 09                       DBCD      .WORD DOCOL
+>b98a  d0 09 64 04                           .WORD ZERO,CLIT
+>b98e  0a                                    .BYTE 10
+>b98f  be 06 64 04                           .WORD USLAS,CLIT
+>b993  10                                    .BYTE 16
+>b994  b7 14 23 07 82 07                     .WORD STAR,OR,SEMIS
+>b99a  83 52 53 d7                 L3070     .BYTE $83,"RS",$D7
+>b99e  81 17                                 .WORD L3050    ; link to R/W
+>b9a0  4c 09                       RSW       .WORD DOCOL
+>b9a2  b0 07                                 .WORD TOR  
+>b9a4  1f 0a b7 14 2a 04 00 40 0f 08 b0 08            .WORD BBUF, STAR, LIT, $4000, PLUS, DUP
+>b9b0  2a 04 00 68 af 0b 2a 04 06 00 84 0c            .WORD LIT, $6800, GREAT, LIT, $6, QERR
+>b9bc  c2 07 be 04 04 00 98 08               .WORD RFROM, ZBRAN, $4, SWAP
+>b9c4  1f 0a 66 06                           .WORD BBUF, CMOVE
+>b9c8  82 07                                 .WORD SEMIS
+>b9ca  c1 a7                       L3202     .BYTE $C1,$A7
+>b9cc  9a 17                                 .WORD L3070    ; link to RSW
+>b9ce  4c 09                       TICK      .WORD DOCOL
+>b9d0  00 11                                 .WORD DFIND
+>b9d2  e9 07                                 .WORD ZEQU
+>b9d4  d0 09                                 .WORD ZERO
+>b9d6  84 0c                                 .WORD QERR
+>b9d8  8f 08                                 .WORD DROP
+>b9da  34 12                                 .WORD LITER
+>b9dc  82 07                                 .WORD SEMIS
+>b9de  86 46 4f 52 47 45 d4        L3217     .BYTE $86,"FORGE",$D4
+>b9e5  ca 17                                 .WORD L3202    ; link to ' TICK
+>b9e7  4c 09                       FORG      .WORD DOCOL
+>b9e9  ce 17 48 0c b0 08                     .WORD TICK,NFA,DUP
+>b9ef  6c 0a ef 08 86 0b 64 04               .WORD FENCE,AT,ULESS,CLIT
+>b9f7  15                                    .BYTE $15
+>b9f8  84 0c b0 07 82 0a ef 08               .WORD QERR,TOR,VOCL,AT
+>ba00  d3 07 7e 08 86 0b           L3220     .WORD R,OVER,ULESS
+>ba06  be 04 12 00                           .WORD ZBRAN,L3225-*
+>ba0a  29 13 41 13 ef 08 b0 08               .WORD FORTH,DEFIN,AT,DUP
+>ba12  82 0a 13 09                           .WORD VOCL,STORE
+>ba16  9f 04 e8 ff                           .WORD BRAN,$FFFF-24+1 ; L3220-*
+>ba1a  b0 08 64 04                 L3225     .WORD DUP,CLIT
+>ba1e  04                                    .BYTE 4
+>ba1f  6d 0b                                 .WORD SUB
+>ba21  5d 0c 2b 0c ef 08           L3228     .WORD PFA,LFA,AT
+>ba27  b0 08 d3 07 86 0b                     .WORD DUP,R,ULESS
+>ba2d  be 04 f2 ff                           .WORD ZBRAN,$FFFF-14+1 ; L3228-*
+>ba31  7e 08 e0 09 6d 0b 13 09               .WORD OVER,TWO,SUB,STORE
+>ba39  ef 08 e0 0b e9 07                     .WORD AT,DDUP,ZEQU
+>ba3f  be 04 d9 ff                           .WORD ZBRAN,$FFFF-39+1 ; L3225-*
+>ba43  c2 07 74 0a 13 09                     .WORD RFROM,DP,STORE
+>ba49  82 07                                 .WORD SEMIS
+>ba4b  84 42 41 43 cb              L3250     .BYTE $84,"BAC",$CB
+>ba50  de 17                                 .WORD L3217    ; link to FORGET
+>ba52  4c 09                       BACK      .WORD DOCOL
+>ba54  30 0b                                 .WORD HERE
+>ba56  6d 0b                                 .WORD SUB
+>ba58  4c 0b                                 .WORD COMMA
+>ba5a  82 07                                 .WORD SEMIS
+>ba5c  c5 42 45 47 49 ce           L3261     .BYTE $C5,"BEGI",$CE
+>ba62  4b 18                                 .WORD L3250    ; link to BACK
+>ba64  4c 09                                 .WORD DOCOL
+>ba66  9e 0c                                 .WORD QCOMP
+>ba68  30 0b                                 .WORD HERE
+>ba6a  d8 09                                 .WORD ONE
+>ba6c  82 07                                 .WORD SEMIS
+>ba6e  c5 45 4e 44 49 c6           L3273     .BYTE $C5,"ENDI",$C6
+>ba74  5c 18                                 .WORD L3261    ; link to BEGIN
+>ba76  4c 09                       ENDIF     .WORD DOCOL
+>ba78  9e 0c                                 .WORD QCOMP
+>ba7a  e0 09                                 .WORD TWO
+>ba7c  cb 0c                                 .WORD QPAIR
+>ba7e  30 0b                                 .WORD HERE
+>ba80  7e 08                                 .WORD OVER
+>ba82  6d 0b                                 .WORD SUB
+>ba84  98 08                                 .WORD SWAP
+>ba86  13 09                                 .WORD STORE
+>ba88  82 07                                 .WORD SEMIS
+>ba8a  c4 54 48 45 ce              L3290     .BYTE $C4,"THE",$CE
+>ba8f  6e 18                                 .WORD L3273    ; link to ENDIF
+>ba91  4c 09                                 .WORD DOCOL
+>ba93  76 18                                 .WORD ENDIF
+>ba95  82 07                                 .WORD SEMIS
+>ba97  c2 44 cf                    L3300     .BYTE $C2,"D",$CF
+>ba9a  8a 18                                 .WORD L3290    ; link to THEN
+>ba9c  4c 09                                 .WORD DOCOL
+>ba9e  12 0d                                 .WORD COMP
+>baa0  46 05                                 .WORD PDO
+>baa2  30 0b                                 .WORD HERE
+>baa4  e8 09                                 .WORD THREE
+>baa6  82 07                                 .WORD SEMIS
+>baa8  c4 4c 4f 4f d0              L3313     .BYTE $C4,"LOO",$D0
+>baad  97 18                                 .WORD L3300    ; link to DO
+>baaf  4c 09                                 .WORD DOCOL
+>bab1  e8 09                                 .WORD THREE
+>bab3  cb 0c                                 .WORD QPAIR
+>bab5  12 0d                                 .WORD COMP
+>bab7  df 04                                 .WORD PLOOP
+>bab9  52 18                                 .WORD BACK
+>babb  82 07                                 .WORD SEMIS
+>babd  c5 2b 4c 4f 4f d0           L3327     .BYTE $C5,"+LOO",$D0
+>bac3  a8 18                                 .WORD L3313    ; link to LOOP
+>bac5  4c 09                                 .WORD DOCOL
+>bac7  e8 09                                 .WORD THREE
+>bac9  cb 0c                                 .WORD QPAIR
+>bacb  12 0d                                 .WORD COMP
+>bacd  0f 05                                 .WORD PPLOO
+>bacf  52 18                                 .WORD BACK
+>bad1  82 07                                 .WORD SEMIS
+>bad3  c5 55 4e 54 49 cc           L3341     .BYTE $C5,"UNTI",$CC
+>bad9  bd 18                                 .WORD L3327    ; link to +LOOP
+>badb  4c 09                       UNTIL     .WORD DOCOL
+>badd  d8 09                                 .WORD ONE
+>badf  cb 0c                                 .WORD QPAIR
+>bae1  12 0d                                 .WORD COMP
+>bae3  be 04                                 .WORD ZBRAN
+>bae5  52 18                                 .WORD BACK
+>bae7  82 07                                 .WORD SEMIS
+>bae9  c3 45 4e c4                 L3355     .BYTE $C3,"EN",$C4
+>baed  d3 18                                 .WORD L3341    ; link to UNTIL
+>baef  4c 09                                 .WORD DOCOL
+>baf1  db 18                                 .WORD UNTIL
+>baf3  82 07                                 .WORD SEMIS
+>baf5  c5 41 47 41 49 ce           L3365     .BYTE $C5,"AGAI",$CE
+>bafb  e9 18                                 .WORD L3355    ; link to END
+>bafd  4c 09                       AGAIN     .WORD DOCOL
+>baff  d8 09                                 .WORD ONE
+>bb01  cb 0c                                 .WORD QPAIR
+>bb03  12 0d                                 .WORD COMP
+>bb05  9f 04                                 .WORD BRAN
+>bb07  52 18                                 .WORD BACK
+>bb09  82 07                                 .WORD SEMIS
+>bb0b  c6 52 45 50 45 41 d4        L3379     .BYTE $C6,"REPEA",$D4
+>bb12  f5 18                                 .WORD L3365    ; link to AGAIN
+>bb14  4c 09                                 .WORD DOCOL
+>bb16  b0 07                                 .WORD TOR
+>bb18  b0 07                                 .WORD TOR
+>bb1a  fd 18                                 .WORD AGAIN
+>bb1c  c2 07                                 .WORD RFROM
+>bb1e  c2 07                                 .WORD RFROM
+>bb20  e0 09                                 .WORD TWO
+>bb22  6d 0b                                 .WORD SUB
+>bb24  76 18                                 .WORD ENDIF
+>bb26  82 07                                 .WORD SEMIS
+>bb28  c2 49 c6                    L3396     .BYTE $C2,"I",$C6
+>bb2b  0b 19                                 .WORD L3379    ; link to REPEAT
+>bb2d  4c 09                       IF        .WORD DOCOL
+>bb2f  12 0d                                 .WORD COMP
+>bb31  be 04                                 .WORD ZBRAN
+>bb33  30 0b                                 .WORD HERE
+>bb35  d0 09                                 .WORD ZERO
+>bb37  4c 0b                                 .WORD COMMA
+>bb39  e0 09                                 .WORD TWO
+>bb3b  82 07                                 .WORD SEMIS
+>bb3d  c4 45 4c 53 c5              L3411     .BYTE $C4,"ELS",$C5
+>bb42  28 19                                 .WORD L3396    ; link to IF
+>bb44  4c 09                                 .WORD DOCOL
+>bb46  e0 09                                 .WORD TWO
+>bb48  cb 0c                                 .WORD QPAIR
+>bb4a  12 0d                                 .WORD COMP
+>bb4c  9f 04                                 .WORD BRAN
+>bb4e  30 0b                                 .WORD HERE
+>bb50  d0 09                                 .WORD ZERO
+>bb52  4c 0b                                 .WORD COMMA
+>bb54  98 08                                 .WORD SWAP
+>bb56  e0 09                                 .WORD TWO
+>bb58  76 18                                 .WORD ENDIF
+>bb5a  e0 09                                 .WORD TWO
+>bb5c  82 07                                 .WORD SEMIS
+>bb5e  c5 57 48 49 4c c5           L3431     .BYTE $C5,"WHIL",$C5
+>bb64  3d 19                                 .WORD L3411    ; link to ELSE
+>bb66  4c 09                                 .WORD DOCOL
+>bb68  2d 19                                 .WORD IF
+>bb6a  21 0b                                 .WORD TWOP
+>bb6c  82 07                                 .WORD SEMIS
+>bb6e  86 53 50 41 43 45 d3        L3442     .BYTE $86,"SPACE",$D3
+>bb75  5e 19                                 .WORD L3431    ; link to WHILE
+>bb77  4c 09                       SPACS     .WORD DOCOL
+>bb79  d0 09                                 .WORD ZERO
+>bb7b  5d 14                                 .WORD MAX
+>bb7d  e0 0b                                 .WORD DDUP
+>bb7f  be 04                                 .WORD ZBRAN
+>bb81  0c 00                       L3449     .WORD $0C      ; L3455-L3449
+>bb83  d0 09                                 .WORD ZERO
+>bb85  46 05                                 .WORD PDO
+>bb87  d1 0b                       L3452     .WORD SPACE
+>bb89  df 04                                 .WORD PLOOP
+>bb8b  fc ff                       L3454     .WORD $FFFC    ; L3452-L3454
+>bb8d  82 07                       L3455     .WORD SEMIS
+>bb8f  82 3c a3                    L3460     .BYTE $82,"<",$A3
+>bb92  6e 19                                 .WORD L3442    ; link to SPACES
+>bb94  4c 09                       BDIGS     .WORD DOCOL
+>bb96  d1 0f                                 .WORD PAD
+>bb98  0c 0b                                 .WORD HLD
+>bb9a  13 09                                 .WORD STORE
+>bb9c  82 07                                 .WORD SEMIS
+>bb9e  82 23 be                    L3471     .BYTE $82,"#",$BE
+>bba1  8f 19                                 .WORD L3460    ; link to <#
+>bba3  4c 09                       EDIGS     .WORD DOCOL
+>bba5  8f 08                                 .WORD DROP
+>bba7  8f 08                                 .WORD DROP
+>bba9  0c 0b                                 .WORD HLD
+>bbab  ef 08                                 .WORD AT
+>bbad  d1 0f                                 .WORD PAD
+>bbaf  7e 08                                 .WORD OVER
+>bbb1  6d 0b                                 .WORD SUB
+>bbb3  82 07                                 .WORD SEMIS
+>bbb5  84 53 49 47 ce              L3486     .BYTE $84,"SIG",$CE
+>bbba  9e 19                                 .WORD L3471    ; link to #>
+>bbbc  4c 09                       SIGN      .WORD DOCOL
+>bbbe  bd 0b                                 .WORD ROT
+>bbc0  fe 07                                 .WORD ZLESS
+>bbc2  be 04                                 .WORD ZBRAN
+>bbc4  07 00                       L3492     .WORD $7       ; L3496-L3492
+>bbc6  64 04                                 .WORD CLIT
+>bbc8  2d                                    .BYTE $2D
+>bbc9  b9 0f                                 .WORD HOLD
+>bbcb  82 07                       L3496     .WORD SEMIS
+>bbcd  81 a3                       L3501     .BYTE $81,$A3
+>bbcf  b5 19                                 .WORD L3486    ; link to SIGN
+>bbd1  4c 09                       DIG       .WORD DOCOL
+>bbd3  e0 0a                                 .WORD BASE
+>bbd5  ef 08                                 .WORD AT
+>bbd7  19 15                                 .WORD MSMOD
+>bbd9  bd 0b                                 .WORD ROT
+>bbdb  64 04                                 .WORD CLIT
+>bbdd  09                                    .BYTE 9
+>bbde  7e 08                                 .WORD OVER
+>bbe0  92 0b                                 .WORD LESS
+>bbe2  be 04                                 .WORD ZBRAN
+>bbe4  07 00                       L3513     .WORD 7        ; L3517-L3513
+>bbe6  64 04                                 .WORD CLIT
+>bbe8  07                                    .BYTE 7
+>bbe9  0f 08                                 .WORD PLUS
+>bbeb  64 04                       L3517     .WORD CLIT
+>bbed  30                                    .BYTE $30
+>bbee  0f 08                                 .WORD PLUS
+>bbf0  b9 0f                                 .WORD HOLD
+>bbf2  82 07                                 .WORD SEMIS
+>bbf4  82 23 d3                    L3526     .BYTE $82,"#",$D3
+>bbf7  cd 19                                 .WORD L3501    ; link to #
+>bbf9  4c 09                       DIGS      .WORD DOCOL
+>bbfb  d1 19                       L3529     .WORD DIG
+>bbfd  7e 08                                 .WORD OVER
+>bbff  7e 08                                 .WORD OVER
+>bc01  23 07                                 .WORD OR
+>bc03  e9 07                                 .WORD ZEQU
+>bc05  be 04                                 .WORD ZBRAN
+>bc07  f4 ff                       L3535     .WORD $FFF4    ; L3529-L3535
+>bc09  82 07                                 .WORD SEMIS
+>bc0b  83 44 2e d2                 L3541     .BYTE $83,"D.",$D2
+>bc0f  f4 19                                 .WORD L3526    ; link to #S
+>bc11  4c 09                       DDOTR     .WORD DOCOL
+>bc13  b0 07                                 .WORD TOR
+>bc15  98 08                                 .WORD SWAP
+>bc17  7e 08                                 .WORD OVER
+>bc19  37 14                                 .WORD DABS
+>bc1b  94 19                                 .WORD BDIGS
+>bc1d  f9 19                                 .WORD DIGS
+>bc1f  bc 19                                 .WORD SIGN
+>bc21  a3 19                                 .WORD EDIGS
+>bc23  c2 07                                 .WORD RFROM
+>bc25  7e 08                                 .WORD OVER
+>bc27  6d 0b                                 .WORD SUB
+>bc29  77 19                                 .WORD SPACS
+>bc2b  08 0e                                 .WORD TYPE
+>bc2d  82 07                                 .WORD SEMIS
+>bc2f  82 44 ae                    L3562     .BYTE $82,"D",$AE
+>bc32  0b 1a                                 .WORD L3541    ; link to D.R
+>bc34  4c 09                       DDOT      .WORD DOCOL
+>bc36  d0 09                                 .WORD ZERO
+>bc38  11 1a                                 .WORD DDOTR
+>bc3a  d1 0b                                 .WORD SPACE
+>bc3c  82 07                                 .WORD SEMIS
+>bc3e  82 2e d2                    L3573     .BYTE $82,".",$D2
+>bc41  2f 1a                                 .WORD L3562     ; link to D.
+>bc43  4c 09                       DOTR      .WORD DOCOL
+>bc45  b0 07                                 .WORD TOR
+>bc47  f5 13                                 .WORD STOD
+>bc49  c2 07                                 .WORD RFROM
+>bc4b  11 1a                                 .WORD DDOTR
+>bc4d  82 07                                 .WORD SEMIS
+>bc4f  81 ae                       L3585     .BYTE $81,$AE
+>bc51  3e 1a                                 .WORD L3573    ; link to .R
+>bc53  4c 09                       DOT       .WORD DOCOL
+>bc55  f5 13                                 .WORD STOD
+>bc57  34 1a                                 .WORD DDOT
+>bc59  82 07                                 .WORD SEMIS
+>bc5b  81 bf                       L3595     .BYTE $81,$BF
+>bc5d  4f 1a                                 .WORD L3585    ; link to .
+>bc5f  4c 09                       QUES      .WORD DOCOL
+>bc61  ef 08                                 .WORD AT
+>bc63  53 1a                                 .WORD DOT
+>bc65  82 07                                 .WORD SEMIS
+>bc67  84 4c 49 53 d4              L3605     .BYTE $84,"LIS",$D4
+>bc6c  5b 1a                                 .WORD L3595    ; link to ?
+>bc6e  4c 09                       LIST      .WORD DOCOL
+>bc70  70 0d                                 .WORD DECIM
+>bc72  5c 06                                 .WORD CR
+>bc74  b0 08                                 .WORD DUP
+>bc76  a5 0a                                 .WORD SCR
+>bc78  13 09                                 .WORD STORE
+>bc7a  69 0e                                 .WORD PDOTQ
+>bc7c  06 53 43 52 20 23 20                  .BYTE 6,"SCR # "
+>bc83  53 1a                                 .WORD DOT
+>bc85  64 04                                 .WORD CLIT
+>bc87  10                                    .BYTE 16
+>bc88  d0 09                                 .WORD ZERO
+>bc8a  46 05                                 .WORD PDO
+>bc8c  5c 06                       L3620     .WORD CR
+>bc8e  5f 05                                 .WORD I
+>bc90  e8 09                                 .WORD THREE
+>bc92  43 1a                                 .WORD DOTR
+>bc94  d1 0b                                 .WORD SPACE
+>bc96  5f 05                                 .WORD I
+>bc98  a5 0a                                 .WORD SCR
+>bc9a  ef 08                                 .WORD AT
+>bc9c  cb 16                                 .WORD DLINE
+>bc9e  df 04                                 .WORD PLOOP
+>bca0  ec ff                       L3630     .WORD $FFEC
+>bca2  5c 06                                 .WORD CR
+>bca4  82 07                                 .WORD SEMIS
+>bca6  85 49 4e 44 45 d8           L3637     .BYTE $85,"INDE",$D8
+>bcac  67 1a                                 .WORD L3605    ; link to LIST
+>bcae  4c 09                                 .WORD DOCOL
+>bcb0  5c 06                                 .WORD CR
+>bcb2  14 0b                                 .WORD ONEP
+>bcb4  98 08                                 .WORD SWAP
+>bcb6  46 05                                 .WORD PDO
+>bcb8  5c 06                       L3647     .WORD CR
+>bcba  5f 05                                 .WORD I
+>bcbc  e8 09                                 .WORD THREE
+>bcbe  43 1a                                 .WORD DOTR
+>bcc0  d1 0b                                 .WORD SPACE
+>bcc2  d0 09                                 .WORD ZERO
+>bcc4  5f 05                                 .WORD I
+>bcc6  cb 16                                 .WORD DLINE
+>bcc8  55 06                                 .WORD QTERM
+>bcca  be 04                                 .WORD ZBRAN
+>bccc  04 00                       L3657     .WORD 4        ; L3659-L3657
+>bcce  95 07                                 .WORD LEAVE
+>bcd0  df 04                       L3659     .WORD PLOOP
+>bcd2  e6 ff                       L3660     .WORD $FFE6    ; L3647-L3660
+>bcd4  64 04                                 .WORD CLIT
+>bcd6  0c                                    .BYTE $0C      ; form feed for printer
+>bcd7  3f 06                                 .WORD EMIT
+>bcd9  82 07                                 .WORD SEMIS
+>bcdb  85 54 52 49 41 c4           L3666     .BYTE $85,"TRIA",$C4
+>bce1  a6 1a                                 .WORD L3637    ; link to INDEX
+>bce3  4c 09                                 .WORD DOCOL
+>bce5  e8 09                                 .WORD THREE
+>bce7  d6 14                                 .WORD SLASH
+>bce9  e8 09                                 .WORD THREE
+>bceb  b7 14                                 .WORD STAR
+>bced  e8 09                                 .WORD THREE
+>bcef  7e 08                                 .WORD OVER
+>bcf1  0f 08                                 .WORD PLUS
+>bcf3  98 08                                 .WORD SWAP
+>bcf5  46 05                                 .WORD PDO
+>bcf7  5c 06                       L3681     .WORD CR
+>bcf9  5f 05                                 .WORD I
+>bcfb  6e 1a                                 .WORD LIST
+>bcfd  df 04                                 .WORD PLOOP
+>bcff  f8 ff                       L3685     .WORD $FFF8    ; L3681-L3685
+>bd01  5c 06                                 .WORD CR
+>bd03  64 04                                 .WORD CLIT
+>bd05  0f                                    .BYTE $F
+>bd06  df 16                                 .WORD MESS
+>bd08  5c 06                                 .WORD CR
+>bd0a  64 04                                 .WORD CLIT
+>bd0c  0c                                    .BYTE $0C      ;  form feed for printer
+>bd0d  3f 06                                 .WORD EMIT
+>bd0f  82 07                                 .WORD SEMIS
+>bd11  85 56 4c 49 53 d4           L3696     .BYTE $85,"VLIS",$D4
+>bd17  db 1a                                 .WORD L3666    ; link to TRIAD
+>bd19  4c 09                       VLIST     .WORD DOCOL
+>bd1b  64 04                                 .WORD CLIT
+>bd1d  80                                    .BYTE $80
+>bd1e  9c 0a                                 .WORD OUT
+>bd20  13 09                                 .WORD STORE
+>bd22  be 0a                                 .WORD CON
+>bd24  ef 08                                 .WORD AT
+>bd26  ef 08                                 .WORD AT
+>bd28  9c 0a                       L3706     .WORD OUT
+>bd2a  ef 08                                 .WORD AT
+>bd2c  fb 09                                 .WORD CSLL
+>bd2e  af 0b                                 .WORD GREAT
+>bd30  be 04                                 .WORD ZBRAN
+>bd32  0a 00                       L3711     .WORD $A       ; L3716-L3711
+>bd34  5c 06                                 .WORD CR
+>bd36  d0 09                                 .WORD ZERO
+>bd38  9c 0a                                 .WORD OUT
+>bd3a  13 09                                 .WORD STORE
+>bd3c  b0 08                       L3716     .WORD DUP
+>bd3e  75 11                                 .WORD IDDOT
+>bd40  d1 0b                                 .WORD SPACE
+>bd42  d1 0b                                 .WORD SPACE
+>bd44  5d 0c                                 .WORD PFA
+>bd46  2b 0c                                 .WORD LFA
+>bd48  ef 08                                 .WORD AT
+>bd4a  b0 08                                 .WORD DUP
+>bd4c  e9 07                                 .WORD ZEQU
+>bd4e  55 06                                 .WORD QTERM
+>bd50  23 07                                 .WORD OR
+>bd52  be 04                                 .WORD ZBRAN
+>bd54  d4 ff                       L3728     .WORD $FFD4    ; L3706-L3728
+>bd56  8f 08                                 .WORD DROP
+>bd58  82 07                                 .WORD SEMIS
+>bd5a  83 4d 4f ce                 NTOP      .BYTE $83,"MO",$CE
+>bd5e  11 1b                                 .WORD L3696    ; link to VLIST
+>bd60  62 1b                       MON       .WORD *+2
+
+.bd62  6c f7 03   jmp ($03f7)                 JMP  (RESvector)        ; back to SBC Monitor 	
+.bd65                              top
+.bd65                              toprom
+.bd65  a9 00      lda #$00         		lda	#<ORIG		; $0400
+.bd67  85 00      sta $00          		sta	$00
+.bd69  a9 04      lda #$04         		lda	#>ORIG		; $0400
+.bd6b  85 01      sta $01          		sta	$01
+.bd6d  a9 00      lda #$00         		lda	#$00		; start of Forth in ROM
+.bd6f  85 02      sta $02          		sta	$02
+.bd71  a9 a6      lda #$a6         		lda	#$A6
+.bd73  85 03      sta $03          		sta	$03
+.bd75  b2 02      lda ($02)        CopyROM		lda	($02)
+.bd77  92 00      sta ($00)        		sta	($00)
+.bd79  e6 00      inc $00          		inc	$00
+.bd7b  d0 02      bne $bd7f        		bne	CopyR1
+.bd7d  e6 01      inc $01          		inc	$01
+.bd7f  e6 02      inc $02          CopyR1		inc	$02
+.bd81  d0 02      bne $bd85        		bne	CopyR2
+.bd83  e6 03      inc $03          		inc	$03
+.bd85  38         sec              CopyR2		sec
+.bd86  a9 65      lda #$65         		lda	#<TOPROM
+.bd88  a2 bd      ldx #$bd         		ldx	#>TOPROM
+.bd8a  e5 02      sbc $02          		sbc	$02
+.bd8c  8a         txa              		txa
+.bd8d  e5 03      sbc $03          		sbc	$03
+.bd8f  b0 e4      bcs $bd75        		bcs	CopyROM
+.bd91  4c 00 04   jmp $0400        		JMP	Enter	        ; Forth Cold Start
+.be00                              lab_cold
+
+.be00  a0 04      ldy #$04         	LDY	#PG2_TABE-PG2_TABS-1
+.be02                              lab_2d13
+.be02  b9 f6 de   lda $def6,y      	LDA	PG2_TABS,Y		; get byte
+.be05  99 00 04   sta $0400,y      	STA	ccflag,Y		; store in page 2
+.be08  88         dey              	DEY				; decrement count
+.be09  10 f7      bpl $be02        	BPL	LAB_2D13		; loop if not done
+.be0b  a2 ff      ldx #$ff         	LDX	#$FF			; set byte
+.be0d  86 88      stx $88          	STX	Clineh		; set current line high byte (set immediate mode)
+.be0f  9a         txs              	TXS				; reset stack pointer
+.be10  a9 4c      lda #$4c         	LDA	#$4C			; code for JMP
+.be12  85 a1      sta $a1          	STA	Fnxjmp		; save for jump vector for functions
+.be14  a2 1c      ldx #$1c         	LDX	#StrTab-LAB_2CEE	; set byte count
+.be16                              lab_2d4e
+.be16  bd fa de   lda $defa,x      	LDA	LAB_2CEE-1,X	; get byte from table
+.be19  95 bb      sta $bb,x        	STA	LAB_IGBY-1,X	; save byte in page zero
+.be1b  ca         dex              	DEX				; decrement count
+.be1c  d0 f8      bne $be16        	BNE	LAB_2D4E		; loop if not all done
+.be1e                              lab_gmem
+.be1e  a2 12      ldx #$12         	LDX	#EndTab-StrTab-1	; set byte count-1
+.be20                              tabloop
+.be20  bd 17 df   lda $df17,x      	LDA	StrTab,X		; get byte from table
+.be23  95 00      sta $00,x        	STA	PLUS_0,X		; save byte in page zero
+.be25  ca         dex              	DEX				; decrement count
+.be26  10 f8      bpl $be20        	BPL	TabLoop		; loop if not all done
+.be28  a9 00      lda #$00         	LDA	#$00			; clear A
+.be2a  85 dc      sta $dc          	STA	NmiBase		; clear NMI handler enabled flag
+.be2c  85 df      sta $df          	STA	IrqBase		; clear IRQ handler enabled flag
+.be2e  85 b2      sta $b2          	STA	FAC1_o		; clear FAC1 overflow byte
+.be30  85 67      sta $67          	STA	last_sh		; clear descriptor stack top item pointer high byte
+.be32  a9 0e      lda #$0e         	LDA	#$0E			; set default tab size
+.be34  85 64      sta $64          	STA	TabSiz		; save it
+.be36  a9 03      lda #$03         	LDA	#$03			; set garbage collect step size for descriptor stack
+.be38  85 a0      sta $a0          	STA	g_step		; save it
+.be3a  a2 68      ldx #$68         	LDX	#des_sk		; descriptor stack start
+.be3c  86 65      stx $65          	STX	next_s		; set descriptor stack pointer
+.be3e  20 92 c6   jsr $c692        	JSR	LAB_CRLF		; print CR/LF
+.be41  a9 2a      lda #$2a         	LDA	#<LAB_MSZM		; point to memory size message (low addr)
+.be43  a0 df      ldy #$df         	LDY	#>LAB_MSZM		; point to memory size message (high addr)
+.be45  20 d3 c6   jsr $c6d3        	JSR	LAB_18C3		; print null terminated string from memory
+.be48  20 40 c0   jsr $c040        	JSR	LAB_INLN		; print "? " and get BASIC input
+.be4b  86 c3      stx $c3          	STX	Bpntrl		; set BASIC execute pointer low byte
+.be4d  84 c4      sty $c4          	STY	Bpntrh		; set BASIC execute pointer high byte
+.be4f  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; get last byte back
+.be52  d0 1f      bne $be73        	BNE	LAB_2DAA		; branch if not null (user typed something)
+.be54  a0 00      ldy #$00         	LDY	#$00			; else clear Y
+.be56                              lab_2d93
+.be56  e6 11      inc $11          	INC	Itempl		; increment temporary integer low byte
+.be58  d0 08      bne $be62        	BNE	LAB_2D99		; branch if no overflow
+.be5a  e6 12      inc $12          	INC	Itemph		; increment temporary integer high byte
+.be5c  a5 12      lda $12          	LDA	Itemph		; get high byte
+.be5e  c9 3f      cmp #$3f         	CMP	#>Ram_top		; compare with top of RAM+1
+.be60  f0 1d      beq $be7f        	BEQ	LAB_2DB6		; branch if match (end of user RAM)
+.be62                              lab_2d99
+.be62  a9 55      lda #$55         	LDA	#$55			; set test byte
+.be64  91 11      sta ($11),y      	STA	(Itempl),Y		; save via temporary integer
+.be66  d1 11      cmp ($11),y      	CMP	(Itempl),Y		; compare via temporary integer
+.be68  d0 15      bne $be7f        	BNE	LAB_2DB6		; branch if fail
+.be6a  0a         asl              	ASL				; shift test byte left (now $AA)
+.be6b  91 11      sta ($11),y      	STA	(Itempl),Y		; save via temporary integer
+.be6d  d1 11      cmp ($11),y      	CMP	(Itempl),Y		; compare via temporary integer
+.be6f  f0 e5      beq $be56        	BEQ	LAB_2D93		; if ok go do next byte
+.be71  d0 0c      bne $be7f        	BNE	LAB_2DB6		; branch if fail
+.be73                              lab_2daa
+.be73  20 a6 d7   jsr $d7a6        	JSR	LAB_2887		; get FAC1 from string
+.be76  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.be78  c9 98      cmp #$98         	CMP	#$98			; compare with exponent = 2^24
+.be7a  b0 a2      bcs $be1e        	BCS	LAB_GMEM		; if too large go try again
+.be7c  20 f7 d2   jsr $d2f7        	JSR	LAB_F2FU		; save integer part of FAC1 in temporary integer
+.be7f                              lab_2db6
+.be7f  a5 11      lda $11          	LDA	Itempl		; get temporary integer low byte
+.be81  a4 12      ldy $12          	LDY	Itemph		; get temporary integer high byte
+.be83  c0 01      cpy #$01         	CPY	#<Ram_base+1	; compare with start of RAM+$100 high byte
+.be85  90 97      bcc $be1e        	BCC	LAB_GMEM		; if too small go try again
+.be87  85 85      sta $85          	STA	Ememl			; set end of mem low byte
+.be89  84 86      sty $86          	STY	Ememh			; set end of mem high byte
+.be8b  85 81      sta $81          	STA	Sstorl		; set bottom of string space low byte
+.be8d  84 82      sty $82          	STY	Sstorh		; set bottom of string space high byte
+.be8f  a0 00      ldy #$00         	LDY	#<Ram_base		; set start addr low byte
+.be91  a2 05      ldx #$05         	LDX	#>Ram_base		; set start addr high byte
+.be93  84 79      sty $79          	STY	Smeml			; save start of mem low byte
+.be95  86 7a      stx $7a          	STX	Smemh			; save start of mem high byte
+.be97  98         tya              	TYA				; clear A
+.be98  91 79      sta ($79),y      	STA	(Smeml),Y		; clear first byte
+.be9a  e6 79      inc $79          	INC	Smeml			; increment start of mem low byte
+.be9c                              lab_2e05
+.be9c  20 92 c6   jsr $c692        	JSR	LAB_CRLF		; print CR/LF
+.be9f  20 50 c1   jsr $c150        	JSR	LAB_1463		; do "NEW" and "CLEAR"
+.bea2  a5 85      lda $85          	LDA	Ememl			; get end of mem low byte
+.bea4  38         sec              	SEC				; set carry for subtract
+.bea5  e5 79      sbc $79          	SBC	Smeml			; subtract start of mem low byte
+.bea7  aa         tax              	TAX				; copy to X
+.bea8  a5 86      lda $86          	LDA	Ememh			; get end of mem high byte
+.beaa  e5 7a      sbc $7a          	SBC	Smemh			; subtract start of mem high byte
+.beac  20 82 d8   jsr $d882        	JSR	LAB_295E		; print XA as unsigned integer (bytes free)
+.beaf  a9 39      lda #$39         	LDA	#<LAB_SMSG		; point to sign-on message (low addr)
+.beb1  a0 df      ldy #$df         	LDY	#>LAB_SMSG		; point to sign-on message (high addr)
+.beb3  20 d3 c6   jsr $c6d3        	JSR	LAB_18C3		; print null terminated string from memory
+.beb6  a9 5a      lda #$5a         	LDA	#<LAB_1274		; warm start vector low byte
+.beb8  a0 bf      ldy #$bf         	LDY	#>LAB_1274		; warm start vector high byte
+.beba  85 01      sta $01          	STA	Wrmjpl		; save warm start vector low byte
+.bebc  84 02      sty $02          	STY	Wrmjph		; save warm start vector high byte
+.bebe  6c 01 00   jmp ($0001)      	JMP	(Wrmjpl)		; go do warm start
+.bec1                              lab_11cf
+.bec1  20 0b bf   jsr $bf0b        	JSR	LAB_121F		; check available memory, "Out of memory" error if no room
+.bec4  85 7f      sta $7f          	STA	Earryl		; save new array mem end low byte
+.bec6  84 80      sty $80          	STY	Earryh		; save new array mem end high byte
+.bec8                              lab_11d6
+.bec8  38         sec              	SEC				; set carry for subtract
+.bec9  a5 a6      lda $a6          	LDA	Obendl		; get block end low byte
+.becb  e5 aa      sbc $aa          	SBC	Ostrtl		; subtract block start low byte
+.becd  a8         tay              	TAY				; copy MOD(block length/$100) byte to Y
+.bece  a5 a7      lda $a7          	LDA	Obendh		; get block end high byte
+.bed0  e5 ab      sbc $ab          	SBC	Ostrth		; subtract block start high byte
+.bed2  aa         tax              	TAX				; copy block length high byte to X
+.bed3  e8         inx              	INX				; +1 to allow for count=0 exit
+.bed4  98         tya              	TYA				; copy block length low byte to A
+.bed5  f0 24      beq $befb        	BEQ	LAB_120A		; branch if length low byte=0
+.bed7  38         sec              	SEC				; set carry for add + 1, two's complement
+.bed8  49 ff      eor #$ff         	EOR	#$FF			; invert low byte for subtract
+.beda  65 a6      adc $a6          	ADC	Obendl		; add block end low byte
+.bedc  85 a6      sta $a6          	STA	Obendl		; save corrected old block end low byte
+.bede  b0 03      bcs $bee3        	BCS	LAB_11F3		; branch if no underflow
+.bee0  c6 a7      dec $a7          	DEC	Obendh		; else decrement block end high byte
+.bee2  38         sec              	SEC				; set carry for add + 1, two's complement
+.bee3                              lab_11f3
+.bee3  98         tya              	TYA				; get MOD(block length/$100) byte
+.bee4  49 ff      eor #$ff         	EOR	#$FF			; invert low byte for subtract
+.bee6  65 a4      adc $a4          	ADC	Nbendl		; add destination end low byte
+.bee8  85 a4      sta $a4          	STA	Nbendl		; save modified new block end low byte
+.beea  b0 08      bcs $bef4        	BCS	LAB_1203		; branch if no underflow
+.beec  c6 a5      dec $a5          	DEC	Nbendh		; else decrement block end high byte
+.beee  90 04      bcc $bef4        	BCC	LAB_1203		; branch always
+.bef0                              lab_11ff
+.bef0  b1 a6      lda ($a6),y      	LDA	(Obendl),Y		; get byte from source
+.bef2  91 a4      sta ($a4),y      	STA	(Nbendl),Y		; copy byte to destination
+.bef4                              lab_1203
+.bef4  88         dey              	DEY				; decrement index
+.bef5  d0 f9      bne $bef0        	BNE	LAB_11FF		; loop until Y=0
+.bef7  b1 a6      lda ($a6),y      	LDA	(Obendl),Y		; get byte from source
+.bef9  91 a4      sta ($a4),y      	STA	(Nbendl),Y		; save byte to destination
+.befb                              lab_120a
+.befb  c6 a7      dec $a7          	DEC	Obendh		; decrement source pointer high byte
+.befd  c6 a5      dec $a5          	DEC	Nbendh		; decrement destination pointer high byte
+.beff  ca         dex              	DEX				; decrement block count
+.bf00  d0 f2      bne $bef4        	BNE	LAB_1203		; loop until count = $0
+.bf02  60         rts              	RTS
+.bf03                              lab_1212
+.bf03  85 78      sta $78          	STA	TempB			; save result in temp byte
+.bf05  ba         tsx              	TSX				; copy stack
+.bf06  e4 78      cpx $78          	CPX	TempB			; compare new "limit" with stack
+.bf08  90 30      bcc $bf3a        	BCC	LAB_OMER		; if stack < limit do "Out of memory" error then warm start
+.bf0a  60         rts              	RTS
+.bf0b                              lab_121f
+.bf0b  c4 82      cpy $82          	CPY	Sstorh		; compare bottom of string mem high byte
+.bf0d  90 2a      bcc $bf39        	BCC	LAB_124B		; if less then exit (is ok)
+.bf0f  d0 04      bne $bf15        	BNE	LAB_1229		; skip next test if greater (tested <)
+.bf11  c5 81      cmp $81          	CMP	Sstorl		; compare with bottom of string mem low byte
+.bf13  90 24      bcc $bf39        	BCC	LAB_124B		; if less then exit (is ok)
+.bf15                              lab_1229
+.bf15  48         pha              	PHA				; push addr low byte
+.bf16  a2 08      ldx #$08         	LDX	#$08			; set index to save Adatal to expneg inclusive
+.bf18  98         tya              	TYA				; copy addr high byte (to push on stack)
+.bf19                              lab_122d
+.bf19  48         pha              	PHA				; push byte
+.bf1a  b5 a3      lda $a3,x        	LDA	Adatal-1,X		; get byte from Adatal to expneg ( ,$00 not pushed)
+.bf1c  ca         dex              	DEX				; decrement index
+.bf1d  10 fa      bpl $bf19        	BPL	LAB_122D		; loop until all done
+.bf1f  20 df cf   jsr $cfdf        	JSR	LAB_GARB		; garbage collection routine
+.bf22  a2 00      ldx #$00         	LDX	#$00			; clear the index to restore bytes
+.bf24                              lab_1238
+.bf24  68         pla              	PLA				; pop byte
+.bf25  95 a4      sta $a4,x        	STA	Adatal,X		; save byte to Adatal to expneg
+.bf27  e8         inx              	INX				; increment index
+.bf28  e0 08      cpx #$08         	CPX	#$08			; compare with end + 1
+.bf2a  30 f8      bmi $bf24        	BMI	LAB_1238		; loop if more to do
+.bf2c  68         pla              	PLA				; pop addr high byte
+.bf2d  a8         tay              	TAY				; copy back to Y
+.bf2e  68         pla              	PLA				; pop addr low byte
+.bf2f  c4 82      cpy $82          	CPY	Sstorh		; compare bottom of string mem high byte
+.bf31  90 06      bcc $bf39        	BCC	LAB_124B		; if less then exit (is ok)
+.bf33  d0 05      bne $bf3a        	BNE	LAB_OMER		; if greater do "Out of memory" error then warm start
+.bf35  c5 81      cmp $81          	CMP	Sstorl		; compare with bottom of string mem low byte
+.bf37  b0 01      bcs $bf3a        	BCS	LAB_OMER		; if >= do "Out of memory" error then warm start
+.bf39                              lab_124b
+.bf39  60         rts              	RTS
+.bf3a                              lab_omer
+.bf3a  a2 0c      ldx #$0c         	LDX	#$0C			; error code $0C ("Out of memory" error)
+.bf3c                              lab_xerr
+.bf3c  20 92 c6   jsr $c692        	JSR	LAB_CRLF		; print CR/LF
+.bf3f  bd b2 e4   lda $e4b2,x      	LDA	LAB_BAER,X		; get error message pointer low byte
+.bf42  bc b3 e4   ldy $e4b3,x      	LDY	LAB_BAER+1,X	; get error message pointer high byte
+.bf45  20 d3 c6   jsr $c6d3        	JSR	LAB_18C3		; print null terminated string from memory
+.bf48  20 89 c1   jsr $c189        	JSR	LAB_1491		; flush stack and clear continue flag
+.bf4b  a9 ef      lda #$ef         	LDA	#<LAB_EMSG		; point to " Error" low addr
+.bf4d  a0 e5      ldy #$e5         	LDY	#>LAB_EMSG		; point to " Error" high addr
+.bf4f                              lab_1269
+.bf4f  20 d3 c6   jsr $c6d3        	JSR	LAB_18C3		; print null terminated string from memory
+.bf52  a4 88      ldy $88          	LDY	Clineh		; get current line high byte
+.bf54  c8         iny              	INY				; increment it
+.bf55  f0 03      beq $bf5a        	BEQ	LAB_1274		; go do warm start (was immediate mode)
+.bf57  20 77 d8   jsr $d877        	JSR	LAB_2953		; print " in line [LINE #]"
+.bf5a                              lab_1274
+.bf5a  a9 00      lda #$00         	LDA	#$00			; clear A
+.bf5c  85 df      sta $df          	STA	IrqBase		; clear enabled byte
+.bf5e  85 dc      sta $dc          	STA	NmiBase		; clear enabled byte
+.bf60  a9 00      lda #$00         	LDA	#<LAB_RMSG		; point to "Ready" message low byte
+.bf62  a0 e6      ldy #$e6         	LDY	#>LAB_RMSG		; point to "Ready" message high byte
+.bf64  20 d3 c6   jsr $c6d3        	JSR	LAB_18C3		; go do print string
+.bf67                              lab_127d
+.bf67  20 4d c0   jsr $c04d        	JSR	LAB_1357		; call for BASIC input
+.bf6a                              lab_1280
+.bf6a  86 c3      stx $c3          	STX	Bpntrl		; set BASIC execute pointer low byte
+.bf6c  84 c4      sty $c4          	STY	Bpntrh		; set BASIC execute pointer high byte
+.bf6e  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.bf71  f0 f4      beq $bf67        	BEQ	LAB_127D		; loop while null
+.bf73  a2 ff      ldx #$ff         	LDX	#$FF			; current line to null value
+.bf75  86 88      stx $88          	STX	Clineh		; set current line high byte
+.bf77  90 06      bcc $bf7f        	BCC	LAB_1295		; branch if numeric character (handle new BASIC line)
+.bf79  20 7e c0   jsr $c07e        	JSR	LAB_13A6		; crunch keywords into Basic tokens
+.bf7c  4c f3 c2   jmp $c2f3        	JMP	LAB_15F6		; go scan and interpret code
+.bf7f                              lab_1295
+.bf7f  20 55 c5   jsr $c555        	JSR	LAB_GFPN		; get fixed-point number into temp integer
+.bf82  20 7e c0   jsr $c07e        	JSR	LAB_13A6		; crunch keywords into Basic tokens
+.bf85  84 5d      sty $5d          	STY	Ibptr			; save index pointer to end of crunched line
+.bf87  20 24 c1   jsr $c124        	JSR	LAB_SSLN		; search BASIC for temp integer line number
+.bf8a  90 44      bcc $bfd0        	BCC	LAB_12E6		; branch if not found
+.bf8c  a0 01      ldy #$01         	LDY	#$01			; set index to next line pointer high byte
+.bf8e  b1 aa      lda ($aa),y      	LDA	(Baslnl),Y		; get next line pointer high byte
+.bf90  85 72      sta $72          	STA	ut1_ph		; save it
+.bf92  a5 7b      lda $7b          	LDA	Svarl			; get start of vars low byte
+.bf94  85 71      sta $71          	STA	ut1_pl		; save it
+.bf96  a5 ab      lda $ab          	LDA	Baslnh		; get found line pointer high byte
+.bf98  85 74      sta $74          	STA	ut2_ph		; save it
+.bf9a  a5 aa      lda $aa          	LDA	Baslnl		; get found line pointer low byte
+.bf9c  88         dey              	DEY				; decrement index
+.bf9d  f1 aa      sbc ($aa),y      	SBC	(Baslnl),Y		; subtract next line pointer low byte
+.bf9f  18         clc              	CLC				; clear carry for add
+.bfa0  65 7b      adc $7b          	ADC	Svarl			; add start of vars low byte
+.bfa2  85 7b      sta $7b          	STA	Svarl			; save new start of vars low byte
+.bfa4  85 73      sta $73          	STA	ut2_pl		; save destination pointer low byte
+.bfa6  a5 7c      lda $7c          	LDA	Svarh			; get start of vars high byte
+.bfa8  69 ff      adc #$ff         	ADC	#$FF			; -1 + carry
+.bfaa  85 7c      sta $7c          	STA	Svarh			; save start of vars high byte
+.bfac  e5 ab      sbc $ab          	SBC	Baslnh		; subtract found line pointer high byte
+.bfae  aa         tax              	TAX				; copy to block count
+.bfaf  38         sec              	SEC				; set carry for subtract
+.bfb0  a5 aa      lda $aa          	LDA	Baslnl		; get found line pointer low byte
+.bfb2  e5 7b      sbc $7b          	SBC	Svarl			; subtract start of vars low byte
+.bfb4  a8         tay              	TAY				; copy to bytes in first block count
+.bfb5  b0 03      bcs $bfba        	BCS	LAB_12D0		; branch if overflow
+.bfb7  e8         inx              	INX				; increment block count (correct for =0 loop exit)
+.bfb8  c6 74      dec $74          	DEC	ut2_ph		; decrement destination high byte
+.bfba                              lab_12d0
+.bfba  18         clc              	CLC				; clear carry for add
+.bfbb  65 71      adc $71          	ADC	ut1_pl		; add source pointer low byte
+.bfbd  90 03      bcc $bfc2        	BCC	LAB_12D8		; branch if no overflow
+.bfbf  c6 72      dec $72          	DEC	ut1_ph		; else decrement source pointer high byte
+.bfc1  18         clc              	CLC				; clear carry
+.bfc2                              lab_12d8
+.bfc2  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get byte from source
+.bfc4  91 73      sta ($73),y      	STA	(ut2_pl),Y		; copy to destination
+.bfc6  c8         iny              	INY				; increment index
+.bfc7  d0 f9      bne $bfc2        	BNE	LAB_12D8		; while <> 0 do this block
+.bfc9  e6 72      inc $72          	INC	ut1_ph		; increment source pointer high byte
+.bfcb  e6 74      inc $74          	INC	ut2_ph		; increment destination pointer high byte
+.bfcd  ca         dex              	DEX				; decrement block count
+.bfce  d0 f2      bne $bfc2        	BNE	LAB_12D8		; loop until all done
+.bfd0                              lab_12e6
+.bfd0  ad 0d 04   lda $040d        	LDA	Ibuffs		; get byte from start of input buffer
+.bfd3  f0 3f      beq $c014        	BEQ	LAB_1319		; if null line just go flush stack/vars and exit
+.bfd5  a5 85      lda $85          	LDA	Ememl			; get end of mem low byte
+.bfd7  a4 86      ldy $86          	LDY	Ememh			; get end of mem high byte
+.bfd9  85 81      sta $81          	STA	Sstorl		; set bottom of string space low byte
+.bfdb  84 82      sty $82          	STY	Sstorh		; set bottom of string space high byte
+.bfdd  a5 7b      lda $7b          	LDA	Svarl			; get start of vars low byte	(end of BASIC)
+.bfdf  85 a6      sta $a6          	STA	Obendl		; save old block end low byte
+.bfe1  a4 7c      ldy $7c          	LDY	Svarh			; get start of vars high byte	(end of BASIC)
+.bfe3  84 a7      sty $a7          	STY	Obendh		; save old block end high byte
+.bfe5  65 5d      adc $5d          	ADC	Ibptr			; add input buffer pointer	(also buffer length)
+.bfe7  90 01      bcc $bfea        	BCC	LAB_1301		; branch if no overflow from add
+.bfe9  c8         iny              	INY				; else increment high byte
+.bfea                              lab_1301
+.bfea  85 a4      sta $a4          	STA	Nbendl		; save new block end low byte	(move to, low byte)
+.bfec  84 a5      sty $a5          	STY	Nbendh		; save new block end high byte
+.bfee  20 c1 be   jsr $bec1        	JSR	LAB_11CF		; open up space in memory
+.bff1  a5 7f      lda $7f          	LDA	Earryl		; get array mem end low byte
+.bff3  a4 80      ldy $80          	LDY	Earryh		; get array mem end high byte
+.bff5  85 7b      sta $7b          	STA	Svarl			; save start of vars low byte
+.bff7  84 7c      sty $7c          	STY	Svarh			; save start of vars high byte
+.bff9  a4 5d      ldy $5d          	LDY	Ibptr			; get input buffer pointer	(also buffer length)
+.bffb  88         dey              	DEY				; adjust for loop type
+.bffc                              lab_1311
+.bffc  b9 09 04   lda $0409,y      	LDA	Ibuffs-4,Y		; get byte from crunched line
+.bfff  91 aa      sta ($aa),y      	STA	(Baslnl),Y		; save it to program memory
+.c001  88         dey              	DEY				; decrement count
+.c002  c0 03      cpy #$03         	CPY	#$03			; compare with first byte-1
+.c004  d0 f6      bne $bffc        	BNE	LAB_1311		; continue while count <> 3
+.c006  a5 12      lda $12          	LDA	Itemph		; get line # high byte
+.c008  91 aa      sta ($aa),y      	STA	(Baslnl),Y		; save it to program memory
+.c00a  88         dey              	DEY				; decrement count
+.c00b  a5 11      lda $11          	LDA	Itempl		; get line # low byte
+.c00d  91 aa      sta ($aa),y      	STA	(Baslnl),Y		; save it to program memory
+.c00f  88         dey              	DEY				; decrement count
+.c010  a9 ff      lda #$ff         	LDA	#$FF			; set byte to allow chain rebuild. if you didn't set this
+.c012  91 aa      sta ($aa),y      	STA	(Baslnl),Y		; save it to program memory
+.c014                              lab_1319
+.c014  20 65 c1   jsr $c165        	JSR	LAB_1477		; reset execution to start, clear vars and flush stack
+.c017  a6 79      ldx $79          	LDX	Smeml			; get start of mem low byte
+.c019  a5 7a      lda $7a          	LDA	Smemh			; get start of mem high byte
+.c01b  a0 01      ldy #$01         	LDY	#$01			; index to high byte of next line pointer
+.c01d                              lab_1325
+.c01d  86 71      stx $71          	STX	ut1_pl		; set line start pointer low byte
+.c01f  85 72      sta $72          	STA	ut1_ph		; set line start pointer high byte
+.c021  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get it
+.c023  f0 18      beq $c03d        	BEQ	LAB_133E		; exit if end of program
+.c025  a0 04      ldy #$04         	LDY	#$04			; point to first code byte of line
+.c027                              lab_1330
+.c027  c8         iny              	INY				; next code byte
+.c028  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get byte
+.c02a  d0 fb      bne $c027        	BNE	LAB_1330		; loop if not [EOL]
+.c02c  38         sec              	SEC				; set carry for add + 1
+.c02d  98         tya              	TYA				; copy end index
+.c02e  65 71      adc $71          	ADC	ut1_pl		; add to line start pointer low byte
+.c030  aa         tax              	TAX				; copy to X
+.c031  a0 00      ldy #$00         	LDY	#$00			; clear index, point to this line's next line pointer
+.c033  91 71      sta ($71),y      	STA	(ut1_pl),Y		; set next line pointer low byte
+.c035  98         tya              	TYA				; clear A
+.c036  65 72      adc $72          	ADC	ut1_ph		; add line start pointer high byte + carry
+.c038  c8         iny              	INY				; increment index to high byte
+.c039  91 71      sta ($71),y      	STA	(ut1_pl),Y		; save next line pointer low byte
+.c03b  90 e0      bcc $c01d        	BCC	LAB_1325		; go do next line, branch always, carry clear
+.c03d                              lab_133e
+.c03d  4c 67 bf   jmp $bf67        	JMP	LAB_127D		; else we just wait for Basic command, no "Ready"
+.c040                              lab_inln
+.c040  20 eb c6   jsr $c6eb        	JSR	LAB_18E3		; print "?" character
+.c043  20 e8 c6   jsr $c6e8        	JSR	LAB_18E0		; print " "
+.c046  d0 05      bne $c04d        	BNE	LAB_1357		; call for BASIC input and return
+.c048                              lab_134b
+.c048  20 ed c6   jsr $c6ed        	JSR	LAB_PRNA		; go print the character
+.c04b  ca         dex              	DEX				; decrement the buffer counter (delete)
+
+>c04c  2c                          	.byte	$2C			; make LDX into BIT abs
+.c04d                              lab_1357
+
+.c04d  a2 00      ldx #$00         	LDX	#$00			; clear BASIC line buffer pointer
+.c04f                              lab_1359
+.c04f  20 ea de   jsr $deea        	JSR	V_INPT		; call scan input device
+.c052  90 fb      bcc $c04f        	BCC	LAB_1359		; loop if no byte
+.c054  f0 f9      beq $c04f        	BEQ	LAB_1359		; loop until valid input (ignore NULLs)
+.c056  c9 07      cmp #$07         	CMP	#$07			; compare with [BELL]
+.c058  f0 10      beq $c06a        	BEQ	LAB_1378		; branch if [BELL]
+.c05a  c9 0d      cmp #$0d         	CMP	#$0D			; compare with [CR]
+.c05c  f0 19      beq $c077        	BEQ	LAB_1384		; do CR/LF exit if [CR]
+.c05e  e0 00      cpx #$00         	CPX	#$00			; compare pointer with $00
+.c060  d0 04      bne $c066        	BNE	LAB_1374		; branch if not empty
+.c062  c9 21      cmp #$21         	CMP	#$21			; compare with [SP]+1
+.c064  90 e9      bcc $c04f        	BCC	LAB_1359		; if < ignore character
+.c066                              lab_1374
+.c066  c9 08      cmp #$08         	CMP	#$08			; compare with [BACKSPACE] (delete last character)
+.c068  f0 de      beq $c048        	BEQ	LAB_134B		; go delete last character
+.c06a                              lab_1378
+.c06a  e0 47      cpx #$47         	CPX	#Ibuffe-Ibuffs	; compare character count with max
+.c06c  b0 0c      bcs $c07a        	BCS	LAB_138E		; skip store and do [BELL] if buffer full
+.c06e  9d 0d 04   sta $040d,x      	STA	Ibuffs,X		; else store in buffer
+.c071  e8         inx              	INX				; increment pointer
+.c072                              lab_137f
+.c072  20 ed c6   jsr $c6ed        	JSR	LAB_PRNA		; go print the character
+.c075  d0 d8      bne $c04f        	BNE	LAB_1359		; always loop for next character
+.c077                              lab_1384
+.c077  4c 89 c6   jmp $c689        	JMP	LAB_1866		; do CR/LF exit to BASIC
+.c07a                              lab_138e
+.c07a  a9 07      lda #$07         	LDA	#$07			; [BELL] character into A
+.c07c  d0 f4      bne $c072        	BNE	LAB_137F		; go print the [BELL] but ignore input character
+.c07e                              lab_13a6
+.c07e  a0 ff      ldy #$ff         	LDY	#$FF			; set save index (makes for easy math later)
+.c080  38         sec              	SEC				; set carry for subtract
+.c081  a5 c3      lda $c3          	LDA	Bpntrl		; get basic execute pointer low byte
+.c083  e9 0d      sbc #$0d         	SBC	#<Ibuffs		; subtract input buffer start pointer
+.c085  aa         tax              	TAX				; copy result to X (index past line # if any)
+.c086  86 60      stx $60          	STX	Oquote		; clear open quote/DATA flag
+.c088                              lab_13ac
+.c088  bd 0d 04   lda $040d,x      	LDA	Ibuffs,X		; get byte from input buffer
+.c08b  f0 51      beq $c0de        	BEQ	LAB_13EC		; if null save byte then exit
+.c08d  c9 5f      cmp #$5f         	CMP	#"_"			; compare with "_"
+.c08f  b0 4d      bcs $c0de        	BCS	LAB_13EC		; if >= go save byte then continue crunching
+.c091  c9 3c      cmp #$3c         	CMP	#"<"			; compare with "<"
+.c093  b0 0e      bcs $c0a3        	BCS	LAB_13CC		; if >= go crunch now
+.c095  c9 30      cmp #$30         	CMP	#"0"			; compare with "0"
+.c097  b0 45      bcs $c0de        	BCS	LAB_13EC		; if >= go save byte then continue crunching
+.c099  85 5c      sta $5c          	STA	Scnquo		; save buffer byte as search character
+.c09b  c9 22      cmp #$22         	CMP	#$22			; is it quote character?
+.c09d  f0 61      beq $c100        	BEQ	LAB_1410		; branch if so (copy quoted string)
+.c09f  c9 2a      cmp #$2a         	CMP	#"*"			; compare with "*"
+.c0a1  90 3b      bcc $c0de        	BCC	LAB_13EC		; if < go save byte then continue crunching
+.c0a3                              lab_13cc
+.c0a3  24 60      bit $60          	BIT	Oquote		; get open quote/DATA token flag
+.c0a5  70 37      bvs $c0de        	BVS	LAB_13EC		; branch if b6 of Oquote set (was DATA)
+.c0a7  86 78      stx $78          	STX	TempB			; save buffer read index
+.c0a9  84 ba      sty $ba          	STY	csidx			; copy buffer save index
+.c0ab  a0 12      ldy #$12         	LDY	#<TAB_1STC		; get keyword first character table low address
+.c0ad  84 73      sty $73          	STY	ut2_pl		; save pointer low byte
+.c0af  a0 e1      ldy #$e1         	LDY	#>TAB_1STC		; get keyword first character table high address
+.c0b1  84 74      sty $74          	STY	ut2_ph		; save pointer high byte
+.c0b3  a0 00      ldy #$00         	LDY	#$00			; clear table pointer
+.c0b5                              lab_13d0
+.c0b5  d1 73      cmp ($73),y      	CMP	(ut2_pl),Y		; compare with keyword first character table byte
+.c0b7  f0 05      beq $c0be        	BEQ	LAB_13D1		; go do word_table_chr if match
+.c0b9  90 21      bcc $c0dc        	BCC	LAB_13EA		; if < keyword first character table byte go restore
+.c0bb  c8         iny              	INY				; else increment pointer
+.c0bc  d0 f7      bne $c0b5        	BNE	LAB_13D0		; and loop (branch always)
+.c0be                              lab_13d1
+.c0be  98         tya              	TYA				; copy matching index
+.c0bf  0a         asl              	ASL				; *2 (bytes per pointer)
+.c0c0  aa         tax              	TAX				; copy to new index
+.c0c1  bd 30 e1   lda $e130,x      	LDA	TAB_CHRT,X		; get keyword table pointer low byte
+.c0c4  85 73      sta $73          	STA	ut2_pl		; save pointer low byte
+.c0c6  bd 31 e1   lda $e131,x      	LDA	TAB_CHRT+1,X	; get keyword table pointer high byte
+.c0c9  85 74      sta $74          	STA	ut2_ph		; save pointer high byte
+.c0cb  a0 ff      ldy #$ff         	LDY	#$FF			; clear table pointer (make -1 for start)
+.c0cd  a6 78      ldx $78          	LDX	TempB			; restore buffer read index
+.c0cf                              lab_13d6
+.c0cf  c8         iny              	INY				; next table byte
+.c0d0  b1 73      lda ($73),y      	LDA	(ut2_pl),Y		; get byte from table
+.c0d2                              lab_13d8
+.c0d2  30 08      bmi $c0dc        	BMI	LAB_13EA		; all bytes matched so go save token
+.c0d4  e8         inx              	INX				; next buffer byte
+.c0d5  dd 0d 04   cmp $040d,x      	CMP	Ibuffs,X		; compare with byte from input buffer
+.c0d8  f0 f5      beq $c0cf        	BEQ	LAB_13D6		; go compare next if match
+.c0da  d0 2b      bne $c107        	BNE	LAB_1417		; branch if >< (not found keyword)
+.c0dc                              lab_13ea
+.c0dc  a4 ba      ldy $ba          	LDY	csidx			; restore save index
+.c0de                              lab_13ec
+.c0de  e8         inx              	INX				; increment buffer index (to next input byte)
+.c0df  c8         iny              	INY				; increment save index (to next output byte)
+.c0e0  99 0d 04   sta $040d,y      	STA	Ibuffs,Y		; save byte to output
+.c0e3  c9 00      cmp #$00         	CMP	#$00			; set the flags, set carry
+.c0e5  f0 32      beq $c119        	BEQ	LAB_142A		; do exit if was null [EOL]
+.c0e7  e9 3a      sbc #$3a         	SBC	#":"			; subtract ":" (carry set by CMP #00)
+.c0e9  f0 04      beq $c0ef        	BEQ	LAB_13FF		; branch if it was ":" (is now $00)
+.c0eb  c9 49      cmp #$49         	CMP	#TK_DATA-$3A	; compare with DATA token - $3A
+.c0ed  d0 02      bne $c0f1        	BNE	LAB_1401		; branch if not DATA
+.c0ef                              lab_13ff
+.c0ef  85 60      sta $60          	STA	Oquote		; save token-$3A (clear for ":", TK_DATA-$3A for DATA)
+.c0f1                              lab_1401
+.c0f1  49 57      eor #$57         	EOR	#TK_REM-$3A		; effectively subtract REM token offset
+.c0f3  d0 93      bne $c088        	BNE	LAB_13AC		; If wasn't REM then go crunch rest of line
+.c0f5  85 5c      sta $5c          	STA	Asrch			; else was REM so set search for [EOL]
+.c0f7                              lab_1408
+.c0f7  bd 0d 04   lda $040d,x      	LDA	Ibuffs,X		; get byte from input buffer
+.c0fa  f0 e2      beq $c0de        	BEQ	LAB_13EC		; branch if null [EOL]
+.c0fc  c5 5c      cmp $5c          	CMP	Asrch			; compare with stored character
+.c0fe  f0 de      beq $c0de        	BEQ	LAB_13EC		; branch if match (end quote)
+.c100                              lab_1410
+.c100  c8         iny              	INY				; increment buffer save index
+.c101  99 0d 04   sta $040d,y      	STA	Ibuffs,Y		; save byte to output
+.c104  e8         inx              	INX				; increment buffer read index
+.c105  d0 f0      bne $c0f7        	BNE	LAB_1408		; loop while <> 0 (should never be 0!)
+.c107                              lab_1417
+.c107  a6 78      ldx $78          	LDX	TempB			; compare has failed, restore buffer index (start byte!)
+.c109                              lab_141b
+.c109  b1 73      lda ($73),y      	LDA	(ut2_pl),Y		; get table byte
+.c10b  08         php              	PHP				; save status
+.c10c  c8         iny              	INY				; increment table index
+.c10d  28         plp              	PLP				; restore byte status
+.c10e  10 f9      bpl $c109        	BPL	LAB_141B		; if not end of keyword go do next
+.c110  b1 73      lda ($73),y      	LDA	(ut2_pl),Y		; get byte from keyword table
+.c112  d0 be      bne $c0d2        	BNE	LAB_13D8		; go test next word if not zero byte (end of table)
+.c114  bd 0d 04   lda $040d,x      	LDA	Ibuffs,X		; restore byte from input buffer
+.c117  10 c3      bpl $c0dc        	BPL	LAB_13EA		; branch always (all bytes in buffer are $00-$7F)
+.c119                              lab_142a
+.c119  c8         iny              	INY				; increment pointer
+.c11a  c8         iny              	INY				; increment pointer (makes it next line pointer high byte)
+.c11b  99 0d 04   sta $040d,y      	STA	Ibuffs,Y		; save [EOL] (marks [EOT] in immediate mode)
+.c11e  c8         iny              	INY				; adjust for line copy
+.c11f  c8         iny              	INY				; adjust for line copy
+.c120  c8         iny              	INY				; adjust for line copy
+.c121  c6 c3      dec $c3          	DEC	Bpntrl		; allow for increment (change if buffer starts at $xxFF)
+.c123  60         rts              	RTS
+.c124                              lab_ssln
+.c124  a5 79      lda $79          	LDA	Smeml			; get start of mem low byte
+.c126  a6 7a      ldx $7a          	LDX	Smemh			; get start of mem high byte
+.c128                              lab_shln
+.c128  a0 01      ldy #$01         	LDY	#$01			; set index
+.c12a  85 aa      sta $aa          	STA	Baslnl		; save low byte as current
+.c12c  86 ab      stx $ab          	STX	Baslnh		; save high byte as current
+.c12e  b1 aa      lda ($aa),y      	LDA	(Baslnl),Y		; get pointer high byte from addr
+.c130  f0 1a      beq $c14c        	BEQ	LAB_145F		; pointer was zero so we"re done, do "not found" exit
+.c132  a0 03      ldy #$03         	LDY	#$03			; set index to line # high byte
+.c134  b1 aa      lda ($aa),y      	LDA	(Baslnl),Y		; get line # high byte
+.c136  88         dey              	DEY				; decrement index (point to low byte)
+.c137  c5 12      cmp $12          	CMP	Itemph		; compare with temporary integer high byte
+.c139  d0 04      bne $c13f        	BNE	LAB_1455		; if <> skip low byte check
+.c13b  b1 aa      lda ($aa),y      	LDA	(Baslnl),Y		; get line # low byte
+.c13d  c5 11      cmp $11          	CMP	Itempl		; compare with temporary integer low byte
+.c13f                              lab_1455
+.c13f  b0 09      bcs $c14a        	BCS	LAB_145E		; else if temp < this line, exit (passed line#)
+.c141                              lab_1456
+.c141  88         dey              	DEY				; decrement index to next line ptr high byte
+.c142  b1 aa      lda ($aa),y      	LDA	(Baslnl),Y		; get next line pointer high byte
+.c144  aa         tax              	TAX				; copy to X
+.c145  88         dey              	DEY				; decrement index to next line ptr low byte
+.c146  b1 aa      lda ($aa),y      	LDA	(Baslnl),Y		; get next line pointer low byte
+.c148  90 de      bcc $c128        	BCC	LAB_SHLN		; go search for line # in temp (Itempl/Itemph) from AX
+.c14a                              lab_145e
+.c14a  f0 01      beq $c14d        	BEQ	LAB_1460		; exit if temp = found line #, carry is set
+.c14c                              lab_145f
+.c14c  18         clc              	CLC				; clear found flag
+.c14d                              lab_1460
+.c14d  60         rts              	RTS
+.c14e                              lab_new
+.c14e  d0 fd      bne $c14d        	BNE	LAB_1460		; exit if not end of statement (to do syntax error)
+.c150                              lab_1463
+.c150  a9 00      lda #$00         	LDA	#$00			; clear A
+.c152  a8         tay              	TAY				; clear Y
+.c153  91 79      sta ($79),y      	STA	(Smeml),Y		; clear first line, next line pointer, low byte
+.c155  c8         iny              	INY				; increment index
+.c156  91 79      sta ($79),y      	STA	(Smeml),Y		; clear first line, next line pointer, high byte
+.c158  18         clc              	CLC				; clear carry
+.c159  a5 79      lda $79          	LDA	Smeml			; get start of mem low byte
+.c15b  69 02      adc #$02         	ADC	#$02			; calculate end of BASIC low byte
+.c15d  85 7b      sta $7b          	STA	Svarl			; save start of vars low byte
+.c15f  a5 7a      lda $7a          	LDA	Smemh			; get start of mem high byte
+.c161  69 00      adc #$00         	ADC	#$00			; add any carry
+.c163  85 7c      sta $7c          	STA	Svarh			; save start of vars high byte
+.c165                              lab_1477
+.c165  18         clc              	CLC				; clear carry
+.c166  a5 79      lda $79          	LDA	Smeml			; get start of mem low byte
+.c168  69 ff      adc #$ff         	ADC	#$FF			; -1
+.c16a  85 c3      sta $c3          	STA	Bpntrl		; save BASIC execute pointer low byte
+.c16c  a5 7a      lda $7a          	LDA	Smemh			; get start of mem high byte
+.c16e  69 ff      adc #$ff         	ADC	#$FF			; -1+carry
+.c170  85 c4      sta $c4          	STA	Bpntrh		; save BASIC execute pointer high byte
+.c172                              lab_147a
+.c172  a5 85      lda $85          	LDA	Ememl			; get end of mem low byte
+.c174  a4 86      ldy $86          	LDY	Ememh			; get end of mem high byte
+.c176  85 81      sta $81          	STA	Sstorl		; set bottom of string space low byte
+.c178  84 82      sty $82          	STY	Sstorh		; set bottom of string space high byte
+.c17a  a5 7b      lda $7b          	LDA	Svarl			; get start of vars low byte
+.c17c  a4 7c      ldy $7c          	LDY	Svarh			; get start of vars high byte
+.c17e  85 7d      sta $7d          	STA	Sarryl		; save var mem end low byte
+.c180  84 7e      sty $7e          	STY	Sarryh		; save var mem end high byte
+.c182  85 7f      sta $7f          	STA	Earryl		; save array mem end low byte
+.c184  84 80      sty $80          	STY	Earryh		; save array mem end high byte
+.c186  20 44 c3   jsr $c344        	JSR	LAB_161A		; perform RESTORE command
+.c189                              lab_1491
+.c189  a2 68      ldx #$68         	LDX	#des_sk		; set descriptor stack pointer
+.c18b  86 65      stx $65          	STX	next_s		; save descriptor stack pointer
+.c18d  68         pla              	PLA				; pull return address low byte
+.c18e  aa         tax              	TAX				; copy return address low byte
+.c18f  68         pla              	PLA				; pull return address high byte
+.c190  8e fe 01   stx $01fe        	STX	LAB_SKFE		; save to cleared stack
+.c193  8d ff 01   sta $01ff        	STA	LAB_SKFF		; save to cleared stack
+.c196  a2 fd      ldx #$fd         	LDX	#$FD			; new stack pointer
+.c198  9a         txs              	TXS				; reset stack
+.c199  a9 00      lda #$00         	LDA	#$00			; clear byte
+.c19b  85 8c      sta $8c          	STA	Cpntrh		; clear continue pointer high byte
+.c19d  85 61      sta $61          	STA	Sufnxf		; clear subscript/FNX flag
+.c19f                              lab_14a6
+.c19f  60         rts              	RTS
+.c1a0                              lab_clear
+.c1a0  f0 d0      beq $c172        	BEQ	LAB_147A		; if no following token go do "CLEAR"
+.c1a2  60         rts              	RTS
+.c1a3                              lab_list
+.c1a3  90 06      bcc $c1ab        	BCC	LAB_14BD		; branch if next character numeric (LIST n..)
+.c1a5  f0 04      beq $c1ab        	BEQ	LAB_14BD		; branch if next character [NULL] (LIST)
+.c1a7  c9 b8      cmp #$b8         	CMP	#TK_MINUS		; compare with token for -
+.c1a9  d0 f4      bne $c19f        	BNE	LAB_14A6		; exit if not - (LIST -m)
+.c1ab                              lab_14bd
+.c1ab  20 55 c5   jsr $c555        	JSR	LAB_GFPN		; get fixed-point number into temp integer
+.c1ae  20 24 c1   jsr $c124        	JSR	LAB_SSLN		; search BASIC for temp integer line number
+.c1b1  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.c1b4  f0 0c      beq $c1c2        	BEQ	LAB_14D4		; branch if no more characters
+.c1b6  c9 b8      cmp #$b8         	CMP	#TK_MINUS		; compare with token for -
+.c1b8  d0 93      bne $c14d        	BNE	LAB_1460		; return if not "-" (will be Syntax error)
+.c1ba  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.c1bd  20 55 c5   jsr $c555        	JSR	LAB_GFPN		; get fixed-point number into temp integer
+.c1c0  d0 8b      bne $c14d        	BNE	LAB_1460		; exit if not ok
+.c1c2                              lab_14d4
+.c1c2  a5 11      lda $11          	LDA	Itempl		; get temporary integer low byte
+.c1c4  05 12      ora $12          	ORA	Itemph		; OR temporary integer high byte
+.c1c6  d0 06      bne $c1ce        	BNE	LAB_14E2		; branch if start set
+.c1c8  a9 ff      lda #$ff         	LDA	#$FF			; set for -1
+.c1ca  85 11      sta $11          	STA	Itempl		; set temporary integer low byte
+.c1cc  85 12      sta $12          	STA	Itemph		; set temporary integer high byte
+.c1ce                              lab_14e2
+.c1ce  a0 01      ldy #$01         	LDY	#$01			; set index for line
+.c1d0  84 60      sty $60          	STY	Oquote		; clear open quote flag
+.c1d2  20 92 c6   jsr $c692        	JSR	LAB_CRLF		; print CR/LF
+.c1d5  b1 aa      lda ($aa),y      	LDA	(Baslnl),Y		; get next line pointer high byte
+.c1d7  f0 3e      beq $c217        	BEQ	LAB_152B		; if null all done so exit
+.c1d9  20 14 c3   jsr $c314        	JSR	LAB_1629		; do CRTL-C check vector
+.c1dc  c8         iny              	INY				; increment index for line
+.c1dd  b1 aa      lda ($aa),y      	LDA	(Baslnl),Y		; get line # low byte
+.c1df  aa         tax              	TAX				; copy to X
+.c1e0  c8         iny              	INY				; increment index
+.c1e1  b1 aa      lda ($aa),y      	LDA	(Baslnl),Y		; get line # high byte
+.c1e3  c5 12      cmp $12          	CMP	Itemph		; compare with temporary integer high byte
+.c1e5  d0 04      bne $c1eb        	BNE	LAB_14FF		; branch if no high byte match
+.c1e7  e4 11      cpx $11          	CPX	Itempl		; compare with temporary integer low byte
+.c1e9  f0 02      beq $c1ed        	BEQ	LAB_1501		; branch if = last line to do (< will pass next branch)
+.c1eb                              lab_14ff
+.c1eb  b0 2a      bcs $c217        	BCS	LAB_152B		; if greater all done so exit
+.c1ed                              lab_1501
+.c1ed  84 97      sty $97          	STY	Tidx1			; save index for line
+.c1ef  20 82 d8   jsr $d882        	JSR	LAB_295E		; print XA as unsigned integer
+.c1f2  a9 20      lda #$20         	LDA	#$20			; space is the next character
+.c1f4                              lab_1508
+.c1f4  a4 97      ldy $97          	LDY	Tidx1			; get index for line
+.c1f6  29 7f      and #$7f         	AND	#$7F			; mask top out bit of character
+.c1f8                              lab_150c
+.c1f8  20 ed c6   jsr $c6ed        	JSR	LAB_PRNA		; go print the character
+.c1fb  c9 22      cmp #$22         	CMP	#$22			; was it " character
+.c1fd  d0 06      bne $c205        	BNE	LAB_1519		; branch if not
+.c1ff  a5 60      lda $60          	LDA	Oquote		; get open quote flag
+.c201  49 ff      eor #$ff         	EOR	#$FF			; toggle it
+.c203  85 60      sta $60          	STA	Oquote		; save it back
+.c205                              lab_1519
+.c205  c8         iny              	INY				; increment index
+.c206  b1 aa      lda ($aa),y      	LDA	(Baslnl),Y		; get next byte
+.c208  d0 0e      bne $c218        	BNE	LAB_152E		; branch if not [EOL] (go print character)
+.c20a  a8         tay              	TAY				; else clear index
+.c20b  b1 aa      lda ($aa),y      	LDA	(Baslnl),Y		; get next line pointer low byte
+.c20d  aa         tax              	TAX				; copy to X
+.c20e  c8         iny              	INY				; increment index
+.c20f  b1 aa      lda ($aa),y      	LDA	(Baslnl),Y		; get next line pointer high byte
+.c211  86 aa      stx $aa          	STX	Baslnl		; set pointer to line low byte
+.c213  85 ab      sta $ab          	STA	Baslnh		; set pointer to line high byte
+.c215  d0 b7      bne $c1ce        	BNE	LAB_14E2		; go do next line if not [EOT]
+.c217                              lab_152b
+.c217  60         rts              	RTS
+.c218                              lab_152e
+.c218  10 de      bpl $c1f8        	BPL	LAB_150C		; just go print it if not token byte
+.c21a  24 60      bit $60          	BIT	Oquote		; test the open quote flag
+.c21c  30 da      bmi $c1f8        	BMI	LAB_150C		; just go print character if open quote set
+.c21e  a2 e3      ldx #$e3         	LDX	#>LAB_KEYT		; get table address high byte
+.c220  0a         asl              	ASL				; *2
+.c221  0a         asl              	ASL				; *4
+.c222  90 02      bcc $c226        	BCC	LAB_152F		; branch if no carry
+.c224  e8         inx              	INX				; else increment high byte
+.c225  18         clc              	CLC				; clear carry for add
+.c226                              lab_152f
+.c226  69 16      adc #$16         	ADC	#<LAB_KEYT		; add low byte
+.c228  90 01      bcc $c22b        	BCC	LAB_1530		; branch if no carry
+.c22a  e8         inx              	INX				; else increment high byte
+.c22b                              lab_1530
+.c22b  85 73      sta $73          	STA	ut2_pl		; save table pointer low byte
+.c22d  86 74      stx $74          	STX	ut2_ph		; save table pointer high byte
+.c22f  84 97      sty $97          	STY	Tidx1			; save index for line
+.c231  a0 00      ldy #$00         	LDY	#$00			; clear index
+.c233  b1 73      lda ($73),y      	LDA	(ut2_pl),Y		; get length
+.c235  aa         tax              	TAX				; copy length
+.c236  c8         iny              	INY				; increment index
+.c237  b1 73      lda ($73),y      	LDA	(ut2_pl),Y		; get 1st character
+.c239  ca         dex              	DEX				; decrement length
+.c23a  f0 b8      beq $c1f4        	BEQ	LAB_1508		; if no more characters exit and print
+.c23c  20 ed c6   jsr $c6ed        	JSR	LAB_PRNA		; go print the character
+.c23f  c8         iny              	INY				; increment index
+.c240  b1 73      lda ($73),y      	LDA	(ut2_pl),Y		; get keyword address low byte
+.c242  48         pha              	PHA				; save it for now
+.c243  c8         iny              	INY				; increment index
+.c244  b1 73      lda ($73),y      	LDA	(ut2_pl),Y		; get keyword address high byte
+.c246  a0 00      ldy #$00         	LDY	#$00
+.c248  85 74      sta $74          	STA	ut2_ph		; save keyword pointer high byte
+.c24a  68         pla              	PLA				; pull low byte
+.c24b  85 73      sta $73          	STA	ut2_pl		; save keyword pointer low byte
+.c24d                              lab_1540
+.c24d  b1 73      lda ($73),y      	LDA	(ut2_pl),Y		; get character
+.c24f  ca         dex              	DEX				; decrement character count
+.c250  f0 a2      beq $c1f4        	BEQ	LAB_1508		; if last character exit and print
+.c252  20 ed c6   jsr $c6ed        	JSR	LAB_PRNA		; go print the character
+.c255  c8         iny              	INY				; increment index
+.c256  d0 f5      bne $c24d        	BNE	LAB_1540		; loop for next character
+.c258                              lab_for
+.c258  a9 80      lda #$80         	LDA	#$80			; set FNX
+.c25a  85 61      sta $61          	STA	Sufnxf		; set subscript/FNX flag
+.c25c  20 b4 c5   jsr $c5b4        	JSR	LAB_LET		; go do LET
+.c25f  68         pla              	PLA				; pull return address
+.c260  68         pla              	PLA				; pull return address
+.c261  a9 10      lda #$10         	LDA	#$10			; we need 16d bytes !
+.c263  20 03 bf   jsr $bf03        	JSR	LAB_1212		; check room on stack for A bytes
+.c266  20 9d c4   jsr $c49d        	JSR	LAB_SNBS		; scan for next BASIC statement ([:] or [EOL])
+.c269  18         clc              	CLC				; clear carry for add
+.c26a  98         tya              	TYA				; copy index to A
+.c26b  65 c3      adc $c3          	ADC	Bpntrl		; add BASIC execute pointer low byte
+.c26d  48         pha              	PHA				; push onto stack
+.c26e  a5 c4      lda $c4          	LDA	Bpntrh		; get BASIC execute pointer high byte
+.c270  69 00      adc #$00         	ADC	#$00			; add carry
+.c272  48         pha              	PHA				; push onto stack
+.c273  a5 88      lda $88          	LDA	Clineh		; get current line high byte
+.c275  48         pha              	PHA				; push onto stack
+.c276  a5 87      lda $87          	LDA	Clinel		; get current line low byte
+.c278  48         pha              	PHA				; push onto stack
+.c279  a9 ae      lda #$ae         	LDA	#TK_TO		; get "TO" token
+.c27b  20 f1 c9   jsr $c9f1        	JSR	LAB_SCCA		; scan for CHR$(A) , else do syntax error then warm start
+.c27e  20 d0 c8   jsr $c8d0        	JSR	LAB_CTNM		; check if source is numeric, else do type mismatch
+.c281  20 cd c8   jsr $c8cd        	JSR	LAB_EVNM		; evaluate expression and check is numeric,
+.c284  a5 b0      lda $b0          	LDA	FAC1_s		; get FAC1 sign (b7)
+.c286  09 7f      ora #$7f         	ORA	#$7F			; set all non sign bits
+.c288  25 ad      and $ad          	AND	FAC1_1		; and FAC1 mantissa1
+.c28a  85 ad      sta $ad          	STA	FAC1_1		; save FAC1 mantissa1
+.c28c  a9 97      lda #$97         	LDA	#<LAB_159F		; set return address low byte
+.c28e  a0 c2      ldy #$c2         	LDY	#>LAB_159F		; set return address high byte
+.c290  85 71      sta $71          	STA	ut1_pl		; save return address low byte
+.c292  84 72      sty $72          	STY	ut1_ph		; save return address high byte
+.c294  4c 84 c9   jmp $c984        	JMP	LAB_1B66		; round FAC1 and put on stack (returns to next instruction)
+.c297                              lab_159f
+.c297  a9 e0      lda #$e0         	LDA	#<LAB_259C		; set 1 pointer low addr (default step size)
+.c299  a0 df      ldy #$df         	LDY	#>LAB_259C		; set 1 pointer high addr
+.c29b  20 7d d6   jsr $d67d        	JSR	LAB_UFAC		; unpack memory (AY) into FAC1
+.c29e  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.c2a1  c9 b3      cmp #$b3         	CMP	#TK_STEP		; compare with STEP token
+.c2a3  d0 06      bne $c2ab        	BNE	LAB_15B3		; jump if not "STEP"
+.c2a5  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.c2a8  20 cd c8   jsr $c8cd        	JSR	LAB_EVNM		; evaluate expression and check is numeric,
+.c2ab                              lab_15b3
+.c2ab  20 e9 d6   jsr $d6e9        	JSR	LAB_27CA		; return A=FF,C=1/-ve A=01,C=0/+ve
+.c2ae  85 b0      sta $b0          	STA	FAC1_s		; set FAC1 sign (b7)
+.c2b0  20 79 c9   jsr $c979        	JSR	LAB_1B5B		; push sign, round FAC1 and put on stack
+.c2b3  a5 98      lda $98          	LDA	Frnxth		; get var pointer for FOR/NEXT high byte
+.c2b5  48         pha              	PHA				; push on stack
+.c2b6  a5 97      lda $97          	LDA	Frnxtl		; get var pointer for FOR/NEXT low byte
+.c2b8  48         pha              	PHA				; push on stack
+.c2b9  a9 81      lda #$81         	LDA	#TK_FOR		; get FOR token
+.c2bb  48         pha              	PHA				; push on stack
+.c2bc                              lab_15c2
+.c2bc  20 14 c3   jsr $c314        	JSR	LAB_1629		; do CRTL-C check vector
+.c2bf  a5 c3      lda $c3          	LDA	Bpntrl		; get BASIC execute pointer low byte
+.c2c1  a4 c4      ldy $c4          	LDY	Bpntrh		; get BASIC execute pointer high byte
+.c2c3  a6 88      ldx $88          	LDX	Clineh		; continue line is $FFxx for immediate mode
+.c2c5  e8         inx              	INX				; increment it (now $00 if immediate mode)
+.c2c6  f0 04      beq $c2cc        	BEQ	LAB_15D1		; branch if null (immediate mode)
+.c2c8  85 8b      sta $8b          	STA	Cpntrl		; save continue pointer low byte
+.c2ca  84 8c      sty $8c          	STY	Cpntrh		; save continue pointer high byte
+.c2cc                              lab_15d1
+.c2cc  a0 00      ldy #$00         	LDY	#$00			; clear index
+.c2ce  b1 c3      lda ($c3),y      	LDA	(Bpntrl),Y		; get next byte
+.c2d0  f0 07      beq $c2d9        	BEQ	LAB_15DC		; branch if null [EOL]
+.c2d2  c9 3a      cmp #$3a         	CMP	#":"			; compare with ":"
+.c2d4  f0 1d      beq $c2f3        	BEQ	LAB_15F6		; branch if = (statement separator)
+.c2d6                              lab_15d9
+.c2d6  4c 02 ca   jmp $ca02        	JMP	LAB_SNER		; else syntax error then warm start
+.c2d9                              lab_15dc
+.c2d9  a0 02      ldy #$02         	LDY	#$02			; set index
+.c2db  b1 c3      lda ($c3),y      	LDA	(Bpntrl),Y		; get next line pointer high byte
+.c2dd  18         clc              	CLC				; clear carry for no "BREAK" message
+.c2de  f0 56      beq $c336        	BEQ	LAB_1651		; if null go to immediate mode (was immediate or [EOT]
+.c2e0  c8         iny              	INY				; increment index
+.c2e1  b1 c3      lda ($c3),y      	LDA	(Bpntrl),Y		; get line # low byte
+.c2e3  85 87      sta $87          	STA	Clinel		; save current line low byte
+.c2e5  c8         iny              	INY				; increment index
+.c2e6  b1 c3      lda ($c3),y      	LDA	(Bpntrl),Y		; get line # high byte
+.c2e8  85 88      sta $88          	STA	Clineh		; save current line high byte
+.c2ea  98         tya              	TYA				; A now = 4
+.c2eb  65 c3      adc $c3          	ADC	Bpntrl		; add BASIC execute pointer low byte
+.c2ed  85 c3      sta $c3          	STA	Bpntrl		; save BASIC execute pointer low byte
+.c2ef  90 02      bcc $c2f3        	BCC	LAB_15F6		; branch if no overflow
+.c2f1  e6 c4      inc $c4          	INC	Bpntrh		; else increment BASIC execute pointer high byte
+.c2f3                              lab_15f6
+.c2f3  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.c2f6                              lab_15f9
+.c2f6  20 fc c2   jsr $c2fc        	JSR	LAB_15FF		; go interpret BASIC code from (Bpntrl)
+.c2f9                              lab_15fc
+.c2f9  4c bc c2   jmp $c2bc        	JMP	LAB_15C2		; loop
+.c2fc                              lab_15ff
+.c2fc  f0 54      beq $c352        	BEQ	LAB_1628		; exit if zero [EOL]
+.c2fe                              lab_1602
+.c2fe  0a         asl              	ASL				; *2 bytes per vector and normalise token
+.c2ff  b0 03      bcs $c304        	BCS	LAB_1609		; branch if was token
+.c301  4c b4 c5   jmp $c5b4        	JMP	LAB_LET		; else go do implied LET
+.c304                              lab_1609
+.c304  c9 58      cmp #$58         	CMP	#(TK_TAB-$80)*2	; compare normalised token * 2 with TAB
+.c306  b0 ce      bcs $c2d6        	BCS	LAB_15D9		; branch if A>=TAB (do syntax error then warm start)
+.c308  a8         tay              	TAY				; copy to index
+.c309  b9 08 e0   lda $e008,y      	LDA	LAB_CTBL+1,Y	; get vector high byte
+.c30c  48         pha              	PHA				; onto stack
+.c30d  b9 07 e0   lda $e007,y      	LDA	LAB_CTBL,Y		; get vector low byte
+.c310  48         pha              	PHA				; onto stack
+.c311  4c bc 00   jmp $00bc        	JMP	LAB_IGBY		; jump to increment and scan memory
+.c314                              lab_1629
+.c314  6c 03 04   jmp ($0403)      	JMP	(VEC_CC)		; ctrl c check vector
+.c317                              lab_1636
+.c317  c9 03      cmp #$03         	CMP	#$03			; compare with CTRL-C
+.c319                              lab_stop
+.c319  b0 01      bcs $c31c        	BCS	LAB_163B		; branch if token follows STOP
+.c31b                              lab_end
+.c31b  18         clc              	CLC				; clear the carry, indicate a normal program end
+.c31c                              lab_163b
+.c31c  d0 67      bne $c385        	BNE	LAB_167A		; if wasn't CTRL-C or there is a following byte return
+.c31e  a5 c4      lda $c4          	LDA	Bpntrh		; get the BASIC execute pointer high byte
+.c320  49 04      eor #$04         	EOR	#>Ibuffs		; compare with buffer address high byte (Cb unchanged)
+.c322  f0 10      beq $c334        	BEQ	LAB_164F		; branch if the BASIC pointer is in the input buffer
+.c324  49 04      eor #$04         	EOR	#>Ibuffs		; correct the bits
+.c326  a4 c3      ldy $c3          	LDY	Bpntrl		; get BASIC execute pointer low byte
+.c328  84 8b      sty $8b          	STY	Cpntrl		; save continue pointer low byte
+.c32a  85 8c      sta $8c          	STA	Cpntrh		; save continue pointer high byte
+.c32c                              lab_1647
+.c32c  a5 87      lda $87          	LDA	Clinel		; get current line low byte
+.c32e  a4 88      ldy $88          	LDY	Clineh		; get current line high byte
+.c330  85 89      sta $89          	STA	Blinel		; save break line low byte
+.c332  84 8a      sty $8a          	STY	Blineh		; save break line high byte
+.c334                              lab_164f
+.c334  68         pla              	PLA				; pull return address low
+.c335  68         pla              	PLA				; pull return address high
+.c336                              lab_1651
+.c336  90 07      bcc $c33f        	BCC	LAB_165E		; if was program end just do warm start
+.c338  a9 e7      lda #$e7         	LDA	#<LAB_BMSG		; point to "Break" low byte
+.c33a  a0 e5      ldy #$e5         	LDY	#>LAB_BMSG		; point to "Break" high byte
+.c33c  4c 4f bf   jmp $bf4f        	JMP	LAB_1269		; print "Break" and do warm start
+.c33f                              lab_165e
+.c33f  4c 5a bf   jmp $bf5a        	JMP	LAB_1274		; go do warm start
+.c342                              lab_restore
+.c342  d0 0f      bne $c353        	BNE	LAB_RESTOREn	; branch if next character not null (RESTORE n)
+.c344                              lab_161a
+.c344  38         sec              	SEC				; set carry for subtract
+.c345  a5 79      lda $79          	LDA	Smeml			; get start of mem low byte
+.c347  e9 01      sbc #$01         	SBC	#$01			; -1
+.c349  a4 7a      ldy $7a          	LDY	Smemh			; get start of mem high byte
+.c34b  b0 01      bcs $c34e        	BCS	LAB_1624		; branch if no underflow
+.c34d                              lab_uflow
+.c34d  88         dey              	DEY				; else decrement high byte
+.c34e                              lab_1624
+.c34e  85 8f      sta $8f          	STA	Dptrl			; save DATA pointer low byte
+.c350  84 90      sty $90          	STY	Dptrh			; save DATA pointer high byte
+.c352                              lab_1628
+.c352  60         rts              	RTS
+.c353                              lab_restoren
+.c353  20 55 c5   jsr $c555        	JSR	LAB_GFPN		; get fixed-point number into temp integer
+.c356  20 a0 c4   jsr $c4a0        	JSR	LAB_SNBL		; scan for next BASIC line
+.c359  a5 88      lda $88          	LDA	Clineh		; get current line high byte
+.c35b  c5 12      cmp $12          	CMP	Itemph		; compare with temporary integer high byte
+.c35d  b0 0b      bcs $c36a        	BCS	LAB_reset_search	; branch if >= (start search from beginning)
+.c35f  98         tya              	TYA				; else copy line index to A
+.c360  38         sec              	SEC				; set carry (+1)
+.c361  65 c3      adc $c3          	ADC	Bpntrl		; add BASIC execute pointer low byte
+.c363  a6 c4      ldx $c4          	LDX	Bpntrh		; get BASIC execute pointer high byte
+.c365  90 07      bcc $c36e        	BCC	LAB_go_search	; branch if no overflow to high byte
+.c367  e8         inx              	INX				; increment high byte
+.c368  b0 04      bcs $c36e        	BCS	LAB_go_search	; branch always (can never be carry clear)
+.c36a                              lab_reset_search
+.c36a  a5 79      lda $79          	LDA	Smeml			; get start of mem low byte
+.c36c  a6 7a      ldx $7a          	LDX	Smemh			; get start of mem high byte
+.c36e                              lab_go_search
+.c36e  20 28 c1   jsr $c128        	JSR	LAB_SHLN		; search Basic for temp integer line number from AX
+.c371  b0 03      bcs $c376        	BCS	LAB_line_found	; if carry set go set pointer
+.c373  4c 72 c4   jmp $c472        	JMP	LAB_16F7		; else go do "Undefined statement" error
+.c376                              lab_line_found
+.c376  a5 aa      lda $aa          	LDA	Baslnl		; get pointer low byte
+.c378  e9 01      sbc #$01         	SBC	#$01			; -1
+.c37a  a4 ab      ldy $ab          	LDY	Baslnh		; get pointer high byte
+.c37c  b0 d0      bcs $c34e        	BCS	LAB_1624		; branch if no underflow (save DATA pointer and return)
+.c37e  90 cd      bcc $c34d        	BCC	LAB_uflow		; else decrement high byte then save DATA pointer and
+.c380                              lab_null
+.c380  20 8c d2   jsr $d28c        	JSR	LAB_GTBY		; get byte parameter
+.c383  86 0d      stx $0d          	STX	Nullct		; save new NULL count
+.c385                              lab_167a
+.c385  60         rts              	RTS
+.c386                              lab_cont
+.c386  d0 fd      bne $c385        	BNE	LAB_167A		; if following byte exit to do syntax error
+.c388  a4 8c      ldy $8c          	LDY	Cpntrh		; get continue pointer high byte
+.c38a  d0 05      bne $c391        	BNE	LAB_166C		; go do continue if we can
+.c38c  a2 1e      ldx #$1e         	LDX	#$1E			; error code $1E ("Can't continue" error)
+.c38e  4c 3c bf   jmp $bf3c        	JMP	LAB_XERR		; do error #X, then warm start
+.c391                              lab_166c
+.c391  a9 93      lda #$93         	LDA	#TK_ON		; set token for ON
+.c393  20 14 dd   jsr $dd14        	JSR	LAB_IRQ		; set IRQ flags
+.c396  a9 93      lda #$93         	LDA	#TK_ON		; set token for ON
+.c398  20 17 dd   jsr $dd17        	JSR	LAB_NMI		; set NMI flags
+.c39b  84 c4      sty $c4          	STY	Bpntrh		; save BASIC execute pointer high byte
+.c39d  a5 8b      lda $8b          	LDA	Cpntrl		; get continue pointer low byte
+.c39f  85 c3      sta $c3          	STA	Bpntrl		; save BASIC execute pointer low byte
+.c3a1  a5 89      lda $89          	LDA	Blinel		; get break line low byte
+.c3a3  a4 8a      ldy $8a          	LDY	Blineh		; get break line high byte
+.c3a5  85 87      sta $87          	STA	Clinel		; set current line low byte
+.c3a7  84 88      sty $88          	STY	Clineh		; set current line high byte
+.c3a9  60         rts              	RTS
+.c3aa                              lab_run
+.c3aa  d0 03      bne $c3af        	BNE	LAB_1696		; branch if RUN n
+.c3ac  4c 65 c1   jmp $c165        	JMP	LAB_1477		; reset execution to start, clear variables, flush stack and
+.c3af                              lab_1696
+.c3af  20 72 c1   jsr $c172        	JSR	LAB_147A		; go do "CLEAR"
+.c3b2  f0 2e      beq $c3e2        	BEQ	LAB_16B0		; get n and do GOTO n (branch always as CLEAR sets Z=1)
+.c3b4                              lab_do
+.c3b4  a9 05      lda #$05         	LDA	#$05			; need 5 bytes for DO
+.c3b6  20 03 bf   jsr $bf03        	JSR	LAB_1212		; check room on stack for A bytes
+.c3b9  a5 c4      lda $c4          	LDA	Bpntrh		; get BASIC execute pointer high byte
+.c3bb  48         pha              	PHA				; push on stack
+.c3bc  a5 c3      lda $c3          	LDA	Bpntrl		; get BASIC execute pointer low byte
+.c3be  48         pha              	PHA				; push on stack
+.c3bf  a5 88      lda $88          	LDA	Clineh		; get current line high byte
+.c3c1  48         pha              	PHA				; push on stack
+.c3c2  a5 87      lda $87          	LDA	Clinel		; get current line low byte
+.c3c4  48         pha              	PHA				; push on stack
+.c3c5  a9 9d      lda #$9d         	LDA	#TK_DO		; token for DO
+.c3c7  48         pha              	PHA				; push on stack
+.c3c8  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.c3cb  4c bc c2   jmp $c2bc        	JMP	LAB_15C2		; go do interpreter inner loop
+.c3ce                              lab_gosub
+.c3ce  a9 05      lda #$05         	LDA	#$05			; need 5 bytes for GOSUB
+.c3d0  20 03 bf   jsr $bf03        	JSR	LAB_1212		; check room on stack for A bytes
+.c3d3  a5 c4      lda $c4          	LDA	Bpntrh		; get BASIC execute pointer high byte
+.c3d5  48         pha              	PHA				; push on stack
+.c3d6  a5 c3      lda $c3          	LDA	Bpntrl		; get BASIC execute pointer low byte
+.c3d8  48         pha              	PHA				; push on stack
+.c3d9  a5 88      lda $88          	LDA	Clineh		; get current line high byte
+.c3db  48         pha              	PHA				; push on stack
+.c3dc  a5 87      lda $87          	LDA	Clinel		; get current line low byte
+.c3de  48         pha              	PHA				; push on stack
+.c3df  a9 8d      lda #$8d         	LDA	#TK_GOSUB		; token for GOSUB
+.c3e1  48         pha              	PHA				; push on stack
+.c3e2                              lab_16b0
+.c3e2  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.c3e5  20 eb c3   jsr $c3eb        	JSR	LAB_GOTO		; perform GOTO n
+.c3e8  4c bc c2   jmp $c2bc        	JMP	LAB_15C2		; go do interpreter inner loop
+.c3eb                              lab_goto
+.c3eb  20 55 c5   jsr $c555        	JSR	LAB_GFPN		; get fixed-point number into temp integer
+.c3ee  20 a0 c4   jsr $c4a0        	JSR	LAB_SNBL		; scan for next BASIC line
+.c3f1  a5 88      lda $88          	LDA	Clineh		; get current line high byte
+.c3f3  c5 12      cmp $12          	CMP	Itemph		; compare with temporary integer high byte
+.c3f5  b0 0b      bcs $c402        	BCS	LAB_16D0		; branch if >= (start search from beginning)
+.c3f7  98         tya              	TYA				; else copy line index to A
+.c3f8  38         sec              	SEC				; set carry (+1)
+.c3f9  65 c3      adc $c3          	ADC	Bpntrl		; add BASIC execute pointer low byte
+.c3fb  a6 c4      ldx $c4          	LDX	Bpntrh		; get BASIC execute pointer high byte
+.c3fd  90 07      bcc $c406        	BCC	LAB_16D4		; branch if no overflow to high byte
+.c3ff  e8         inx              	INX				; increment high byte
+.c400  b0 04      bcs $c406        	BCS	LAB_16D4		; branch always (can never be carry)
+.c402                              lab_16d0
+.c402  a5 79      lda $79          	LDA	Smeml			; get start of mem low byte
+.c404  a6 7a      ldx $7a          	LDX	Smemh			; get start of mem high byte
+.c406                              lab_16d4
+.c406  20 28 c1   jsr $c128        	JSR	LAB_SHLN		; search Basic for temp integer line number from AX
+.c409  90 67      bcc $c472        	BCC	LAB_16F7		; if carry clear go do "Undefined statement" error
+.c40b  a5 aa      lda $aa          	LDA	Baslnl		; get pointer low byte
+.c40d  e9 01      sbc #$01         	SBC	#$01			; -1
+.c40f  85 c3      sta $c3          	STA	Bpntrl		; save BASIC execute pointer low byte
+.c411  a5 ab      lda $ab          	LDA	Baslnh		; get pointer high byte
+.c413  e9 00      sbc #$00         	SBC	#$00			; subtract carry
+.c415  85 c4      sta $c4          	STA	Bpntrh		; save BASIC execute pointer high byte
+.c417                              lab_16e5
+.c417  60         rts              	RTS
+.c418                              lab_donok
+.c418  a2 22      ldx #$22         	LDX	#$22			; error code $22 ("LOOP without DO" error)
+.c41a  4c 3c bf   jmp $bf3c        	JMP	LAB_XERR		; do error #X, then warm start
+.c41d                              lab_loop
+.c41d  a8         tay              	TAY				; save following token
+.c41e  ba         tsx              	TSX				; copy stack pointer
+.c41f  bd 03 01   lda $0103,x      	LDA	LAB_STAK+3,X	; get token byte from stack
+.c422  c9 9d      cmp #$9d         	CMP	#TK_DO		; compare with DO token
+.c424  d0 f2      bne $c418        	BNE	LAB_DONOK		; branch if no matching DO
+.c426  e8         inx              	INX				; dump calling routine return address
+.c427  e8         inx              	INX				; dump calling routine return address
+.c428  9a         txs              	TXS				; correct stack
+.c429  98         tya              	TYA				; get saved following token back
+.c42a  f0 20      beq $c44c        	BEQ	LoopAlways		; if no following token loop forever
+.c42c  c9 3a      cmp #$3a         	CMP	#":"			; could be ":"
+.c42e  f0 1c      beq $c44c        	BEQ	LoopAlways		; if :... loop forever
+.c430  e9 b4      sbc #$b4         	SBC	#TK_UNTIL		; subtract token for UNTIL, we know carry is set here
+.c432  aa         tax              	TAX				; copy to X (if it was UNTIL then Y will be correct)
+.c433  f0 04      beq $c439        	BEQ	DoRest		; branch if was UNTIL
+.c435  ca         dex              	DEX				; decrement result
+.c436  d0 62      bne $c49a        	BNE	LAB_16FC		; if not WHILE go do syntax error and warm start
+.c438  ca         dex              	DEX				; set invert result byte
+.c439                              dorest
+.c439  86 98      stx $98          	STX	Frnxth		; save invert result byte
+.c43b  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.c43e  20 e1 c8   jsr $c8e1        	JSR	LAB_EVEX		; evaluate expression
+.c441  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.c443  f0 02      beq $c447        	BEQ	DoCmp			; if =0 go do straight compare
+.c445  a9 ff      lda #$ff         	LDA	#$FF			; else set all bits
+.c447                              docmp
+.c447  ba         tsx              	TSX				; copy stack pointer
+.c448  45 98      eor $98          	EOR	Frnxth		; EOR with invert byte
+.c44a  d0 1a      bne $c466        	BNE	LoopDone		; if <> 0 clear stack and back to interpreter loop
+.c44c                              loopalways
+.c44c  bd 02 01   lda $0102,x      	LDA	LAB_STAK+2,X	; get current line low byte
+.c44f  85 87      sta $87          	STA	Clinel		; save current line low byte
+.c451  bd 03 01   lda $0103,x      	LDA	LAB_STAK+3,X	; get current line high byte
+.c454  85 88      sta $88          	STA	Clineh		; save current line high byte
+.c456  bd 04 01   lda $0104,x      	LDA	LAB_STAK+4,X	; get BASIC execute pointer low byte
+.c459  85 c3      sta $c3          	STA	Bpntrl		; save BASIC execute pointer low byte
+.c45b  bd 05 01   lda $0105,x      	LDA	LAB_STAK+5,X	; get BASIC execute pointer high byte
+.c45e  85 c4      sta $c4          	STA	Bpntrh		; save BASIC execute pointer high byte
+.c460  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.c463  4c bc c2   jmp $c2bc        	JMP	LAB_15C2		; go do interpreter inner loop
+.c466                              loopdone
+.c466  e8         inx              	INX				; dump DO token
+.c467  e8         inx              	INX				; dump current line low byte
+.c468  e8         inx              	INX				; dump current line high byte
+.c469  e8         inx              	INX				; dump BASIC execute pointer low byte
+.c46a  e8         inx              	INX				; dump BASIC execute pointer high byte
+.c46b  9a         txs              	TXS				; correct stack
+.c46c  4c 8c c4   jmp $c48c        	JMP	LAB_DATA		; go perform DATA (find : or [EOL])
+.c46f                              lab_16f4
+.c46f  a2 04      ldx #$04         	LDX	#$04			; error code $04 ("RETURN without GOSUB" error)
+
+>c471  2c                          	.byte	$2C			; makes next line BIT LAB_0EA2
+.c472                              lab_16f7
+
+.c472  a2 0e      ldx #$0e         	LDX	#$0E			; error code $0E ("Undefined statement" error)
+.c474  4c 3c bf   jmp $bf3c        	JMP	LAB_XERR		; do error #X, then warm start
+.c477                              lab_return
+.c477  d0 9e      bne $c417        	BNE	LAB_16E5		; exit if following token (to allow syntax error)
+.c479                              lab_16e8
+.c479  68         pla              	PLA				; dump calling routine return address
+.c47a  68         pla              	PLA				; dump calling routine return address
+.c47b  68         pla              	PLA				; pull token
+.c47c  c9 8d      cmp #$8d         	CMP	#TK_GOSUB		; compare with GOSUB token
+.c47e  d0 ef      bne $c46f        	BNE	LAB_16F4		; branch if no matching GOSUB
+.c480                              lab_16ff
+.c480  68         pla              	PLA				; pull current line low byte
+.c481  85 87      sta $87          	STA	Clinel		; save current line low byte
+.c483  68         pla              	PLA				; pull current line high byte
+.c484  85 88      sta $88          	STA	Clineh		; save current line high byte
+.c486  68         pla              	PLA				; pull BASIC execute pointer low byte
+.c487  85 c3      sta $c3          	STA	Bpntrl		; save BASIC execute pointer low byte
+.c489  68         pla              	PLA				; pull BASIC execute pointer high byte
+.c48a  85 c4      sta $c4          	STA	Bpntrh		; save BASIC execute pointer high byte
+.c48c                              lab_data
+.c48c  20 9d c4   jsr $c49d        	JSR	LAB_SNBS		; scan for next BASIC statement ([:] or [EOL])
+.c48f                              lab_170f
+.c48f  98         tya              	TYA				; copy index to A
+.c490  18         clc              	CLC				; clear carry for add
+.c491  65 c3      adc $c3          	ADC	Bpntrl		; add BASIC execute pointer low byte
+.c493  85 c3      sta $c3          	STA	Bpntrl		; save BASIC execute pointer low byte
+.c495  90 02      bcc $c499        	BCC	LAB_1719		; skip next if no carry
+.c497  e6 c4      inc $c4          	INC	Bpntrh		; else increment BASIC execute pointer high byte
+.c499                              lab_1719
+.c499  60         rts              	RTS
+.c49a                              lab_16fc
+.c49a  4c 02 ca   jmp $ca02        	JMP	LAB_SNER		; do syntax error then warm start
+.c49d                              lab_snbs
+.c49d  a2 3a      ldx #$3a         	LDX	#":"			; set look for character = ":"
+
+>c49f  2c                          	.byte	$2C			; makes next line BIT $00A2
+.c4a0                              lab_snbl
+
+.c4a0  a2 00      ldx #$00         	LDX	#$00			; set alt search character = [EOL]
+.c4a2  a0 00      ldy #$00         	LDY	#$00			; set search character = [EOL]
+.c4a4  84 5c      sty $5c          	STY	Asrch			; store search character
+.c4a6                              lab_1725
+.c4a6  8a         txa              	TXA				; get alt search character
+.c4a7  45 5c      eor $5c          	EOR	Asrch			; toggle search character, effectively swap with $00
+.c4a9  85 5c      sta $5c          	STA	Asrch			; save swapped search character
+.c4ab                              lab_172d
+.c4ab  b1 c3      lda ($c3),y      	LDA	(Bpntrl),Y		; get next byte
+.c4ad  f0 ea      beq $c499        	BEQ	LAB_1719		; exit if null [EOL]
+.c4af  c5 5c      cmp $5c          	CMP	Asrch			; compare with search character
+.c4b1  f0 e6      beq $c499        	BEQ	LAB_1719		; exit if found
+.c4b3  c8         iny              	INY				; increment index
+.c4b4  c9 22      cmp #$22         	CMP	#$22			; compare current character with open quote
+.c4b6  d0 f3      bne $c4ab        	BNE	LAB_172D		; if not open quote go get next character
+.c4b8  f0 ec      beq $c4a6        	BEQ	LAB_1725		; if found go swap search character for alt search character
+.c4ba                              lab_if
+.c4ba  20 e1 c8   jsr $c8e1        	JSR	LAB_EVEX		; evaluate the expression
+.c4bd  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.c4c0  c9 b1      cmp #$b1         	CMP	#TK_THEN		; compare with THEN token
+.c4c2  f0 11      beq $c4d5        	BEQ	LAB_174B		; if it was THEN go do IF
+.c4c4  c9 89      cmp #$89         	CMP	#TK_GOTO		; compare with GOTO token
+.c4c6  d0 d2      bne $c49a        	BNE	LAB_16FC		; if it wasn't GOTO go do syntax error
+.c4c8  a6 c3      ldx $c3          	LDX	Bpntrl		; save the basic pointer low byte
+.c4ca  a4 c4      ldy $c4          	LDY	Bpntrh		; save the basic pointer high byte
+.c4cc  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.c4cf  b0 c9      bcs $c49a        	BCS	LAB_16FC		; if not numeric go do syntax error
+.c4d1  86 c3      stx $c3          	STX	Bpntrl		; restore the basic pointer low byte
+.c4d3  84 c4      sty $c4          	STY	Bpntrh		; restore the basic pointer high byte
+.c4d5                              lab_174b
+.c4d5  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.c4d7  f0 1b      beq $c4f4        	BEQ	LAB_174E		; if the result was zero go look for an ELSE
+.c4d9  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; else increment and scan memory
+.c4dc  b0 03      bcs $c4e1        	BCS	LAB_174D		; if not numeric go do var or keyword
+.c4de                              lab_174c
+.c4de  4c eb c3   jmp $c3eb        	JMP	LAB_GOTO		; else was numeric so do GOTO n
+.c4e1                              lab_174d
+.c4e1  c9 90      cmp #$90         	CMP	#TK_RETURN		; compare the byte with the token for RETURN
+.c4e3  d0 03      bne $c4e8        	BNE	LAB_174G		; if it wasn't RETURN go interpret BASIC code from (Bpntrl)
+.c4e5  4c fe c2   jmp $c2fe        	JMP	LAB_1602		; else it was RETURN so interpret BASIC code from (Bpntrl)
+.c4e8                              lab_174g
+.c4e8  20 fc c2   jsr $c2fc        	JSR	LAB_15FF		; interpret BASIC code from (Bpntrl)
+.c4eb  a0 00      ldy #$00         	LDY	#$00			; clear the index
+.c4ed  b1 c3      lda ($c3),y      	LDA	(Bpntrl),Y		; get the next BASIC byte
+.c4ef  c9 ad      cmp #$ad         	CMP	#TK_ELSE		; compare it with the token for ELSE
+.c4f1  f0 99      beq $c48c        	BEQ	LAB_DATA		; if ELSE ignore the following statement
+.c4f3  60         rts              	RTS				; else return to the interpreter inner loop
+.c4f4                              lab_174e
+.c4f4  a0 00      ldy #$00         	LDY	#$00			; clear the BASIC byte index
+.c4f6  a2 01      ldx #$01         	LDX	#$01			; clear the nesting depth
+.c4f8                              lab_1750
+.c4f8  c8         iny              	INY				; increment the BASIC byte index
+.c4f9  b1 c3      lda ($c3),y      	LDA	(Bpntrl),Y		; get the next BASIC byte
+.c4fb  f0 0f      beq $c50c        	BEQ	LAB_1753		; if EOL go add the pointer and return
+.c4fd  c9 8b      cmp #$8b         	CMP	#TK_IF		; compare the byte with the token for IF
+.c4ff  d0 03      bne $c504        	BNE	LAB_1752		; if not IF token skip the depth increment
+.c501  e8         inx              	INX				; else increment the nesting depth ..
+.c502  d0 f4      bne $c4f8        	BNE	LAB_1750		; .. and continue looking
+.c504                              lab_1752
+.c504  c9 ad      cmp #$ad         	CMP	#TK_ELSE		; compare the byte with the token for ELSE
+.c506  d0 f0      bne $c4f8        	BNE	LAB_1750		; if not ELSE token continue looking
+.c508  ca         dex              	DEX				; was ELSE so decrement the nesting depth
+.c509  d0 ed      bne $c4f8        	BNE	LAB_1750		; loop if still nested
+.c50b  c8         iny              	INY				; increment the BASIC byte index past the ELSE
+.c50c                              lab_1753
+.c50c  98         tya              	TYA				; else copy line index to A
+.c50d  18         clc              	CLC				; clear carry for add
+.c50e  65 c3      adc $c3          	ADC	Bpntrl		; add the BASIC execute pointer low byte
+.c510  85 c3      sta $c3          	STA	Bpntrl		; save the BASIC execute pointer low byte
+.c512  90 02      bcc $c516        	BCC	LAB_1754		; branch if no overflow to high byte
+.c514  e6 c4      inc $c4          	INC	Bpntrh		; else increment the BASIC execute pointer high byte
+.c516                              lab_1754
+.c516  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.c519  90 c3      bcc $c4de        	BCC	LAB_174C		; if numeric do GOTO n
+.c51b  4c fc c2   jmp $c2fc        	JMP	LAB_15FF		; interpret BASIC code from (Bpntrl)
+.c51e                              lab_rem
+.c51e  20 a0 c4   jsr $c4a0        	JSR	LAB_SNBL		; scan for next BASIC line
+.c521  4c 8f c4   jmp $c48f        	JMP	LAB_170F		; go set BASIC execute pointer and return, branch always
+.c524                              lab_16fd
+.c524  4c 02 ca   jmp $ca02        	JMP	LAB_SNER		; do syntax error then warm start
+.c527                              lab_on
+.c527  c9 a9      cmp #$a9         	CMP	#TK_IRQ		; was it IRQ token ?
+.c529  d0 03      bne $c52e        	BNE	LAB_NOIN		; if not go check NMI
+.c52b  4c 38 dd   jmp $dd38        	JMP	LAB_SIRQ		; else go set-up IRQ
+.c52e                              lab_noin
+.c52e  c9 aa      cmp #$aa         	CMP	#TK_NMI		; was it NMI token ?
+.c530  d0 03      bne $c535        	BNE	LAB_NONM		; if not go do normal ON command
+.c532  4c 3c dd   jmp $dd3c        	JMP	LAB_SNMI		; else go set-up NMI
+.c535                              lab_nonm
+.c535  20 8c d2   jsr $d28c        	JSR	LAB_GTBY		; get byte parameter
+.c538  48         pha              	PHA				; push GOTO/GOSUB token
+.c539  c9 8d      cmp #$8d         	CMP	#TK_GOSUB		; compare with GOSUB token
+.c53b  f0 04      beq $c541        	BEQ	LAB_176B		; branch if GOSUB
+.c53d  c9 89      cmp #$89         	CMP	#TK_GOTO		; compare with GOTO token
+.c53f                              lab_1767
+.c53f  d0 e3      bne $c524        	BNE	LAB_16FD		; if not GOTO do syntax error then warm start
+.c541                              lab_176b
+.c541  c6 af      dec $af          	DEC	FAC1_3		; decrement index (byte value)
+.c543  d0 04      bne $c549        	BNE	LAB_1773		; branch if not zero
+.c545  68         pla              	PLA				; pull GOTO/GOSUB token
+.c546  4c fe c2   jmp $c2fe        	JMP	LAB_1602		; go execute it
+.c549                              lab_1773
+.c549  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.c54c  20 55 c5   jsr $c555        	JSR	LAB_GFPN		; get fixed-point number into temp integer (skip this n)
+.c54f  c9 2c      cmp #$2c         	CMP	#$2C			; compare next character with ","
+.c551  f0 ee      beq $c541        	BEQ	LAB_176B		; loop if ","
+.c553                              lab_177e
+.c553  68         pla              	PLA				; else pull keyword token (run out of options)
+.c554                              lab_177f
+.c554  60         rts              	RTS
+.c555                              lab_gfpn
+.c555  a2 00      ldx #$00         	LDX	#$00			; clear reg
+.c557  86 11      stx $11          	STX	Itempl		; clear temporary integer low byte
+.c559                              lab_1785
+.c559  86 12      stx $12          	STX	Itemph		; save temporary integer high byte
+.c55b  b0 f7      bcs $c554        	BCS	LAB_177F		; return if carry set, end of scan, character was
+.c55d  e0 19      cpx #$19         	CPX	#$19			; compare high byte with $19
+.c55f  a8         tay              	TAY				; ensure Zb = 0 if the branch is taken
+.c560  b0 dd      bcs $c53f        	BCS	LAB_1767		; branch if >=, makes max line # 63999 because next
+.c562  e9 2f      sbc #$2f         	SBC	#"0"-1		; subtract "0", $2F + carry, from byte
+.c564  a8         tay              	TAY				; copy binary digit
+.c565  a5 11      lda $11          	LDA	Itempl		; get temporary integer low byte
+.c567  0a         asl              	ASL				; *2 low byte
+.c568  26 12      rol $12          	ROL	Itemph		; *2 high byte
+.c56a  0a         asl              	ASL				; *2 low byte
+.c56b  26 12      rol $12          	ROL	Itemph		; *2 high byte, *4
+.c56d  65 11      adc $11          	ADC	Itempl		; + low byte, *5
+.c56f  85 11      sta $11          	STA	Itempl		; save it
+.c571  8a         txa              	TXA				; get high byte copy to A
+.c572  65 12      adc $12          	ADC	Itemph		; + high byte, *5
+.c574  06 11      asl $11          	ASL	Itempl		; *2 low byte, *10d
+.c576  2a         rol              	ROL				; *2 high byte, *10d
+.c577  aa         tax              	TAX				; copy high byte back to X
+.c578  98         tya              	TYA				; get binary digit back
+.c579  65 11      adc $11          	ADC	Itempl		; add number low byte
+.c57b  85 11      sta $11          	STA	Itempl		; save number low byte
+.c57d  90 01      bcc $c580        	BCC	LAB_17B3		; if no overflow to high byte get next character
+.c57f  e8         inx              	INX				; else increment high byte
+.c580                              lab_17b3
+.c580  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.c583  4c 59 c5   jmp $c559        	JMP	LAB_1785		; loop for next character
+.c586                              lab_dec
+.c586  a9 e4      lda #$e4         	LDA	#<LAB_2AFD		; set -1 pointer low byte
+
+>c588  2c                          	.byte	$2C			; BIT abs to skip the LDA below
+.c589                              lab_inc
+
+.c589  a9 e0      lda #$e0         	LDA	#<LAB_259C		; set 1 pointer low byte
+.c58b                              lab_17b5
+.c58b  48         pha              	PHA				; save +/-1 pointer low byte
+.c58c                              lab_17b7
+.c58c  20 aa cb   jsr $cbaa        	JSR	LAB_GVAR		; get var address
+.c58f  a6 5f      ldx $5f          	LDX	Dtypef		; get data type flag, $FF=string, $00=numeric
+.c591  30 1e      bmi $c5b1        	BMI	IncrErr		; exit if string
+.c593  85 97      sta $97          	STA	Lvarpl		; save var address low byte
+.c595  84 98      sty $98          	STY	Lvarph		; save var address high byte
+.c597  20 7d d6   jsr $d67d        	JSR	LAB_UFAC		; unpack memory (AY) into FAC1
+.c59a  68         pla              	PLA				; get +/-1 pointer low byte
+.c59b  48         pha              	PHA				; save +/-1 pointer low byte
+.c59c  a0 df      ldy #$df         	LDY	#>LAB_259C		; set +/-1 pointer high byte (both the same)
+.c59e  20 be d3   jsr $d3be        	JSR	LAB_246C		; add (AY) to FAC1
+.c5a1  20 a3 d6   jsr $d6a3        	JSR	LAB_PFAC		; pack FAC1 into variable (Lvarpl)
+.c5a4  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.c5a7  c9 2c      cmp #$2c         	CMP	#","			; compare with ","
+.c5a9  d0 a8      bne $c553        	BNE	LAB_177E		; exit if not "," (either end or error)
+.c5ab  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.c5ae  4c 8c c5   jmp $c58c        	JMP	LAB_17B7		; go do next var
+.c5b1                              increrr
+.c5b1  4c dc c8   jmp $c8dc        	JMP	LAB_1ABC		; do "Type mismatch" error then warm start
+.c5b4                              lab_let
+.c5b4  20 aa cb   jsr $cbaa        	JSR	LAB_GVAR		; get var address
+.c5b7  85 97      sta $97          	STA	Lvarpl		; save var address low byte
+.c5b9  84 98      sty $98          	STY	Lvarph		; save var address high byte
+.c5bb  a9 c2      lda #$c2         	LDA	#TK_EQUAL		; get = token
+.c5bd  20 f1 c9   jsr $c9f1        	JSR	LAB_SCCA		; scan for CHR$(A), else do syntax error then warm start
+.c5c0  a5 5f      lda $5f          	LDA	Dtypef		; get data type flag, $FF=string, $00=numeric
+.c5c2  48         pha              	PHA				; push data type flag
+.c5c3  20 e1 c8   jsr $c8e1        	JSR	LAB_EVEX		; evaluate expression
+.c5c6  68         pla              	PLA				; pop data type flag
+.c5c7  2a         rol              	ROL				; set carry if type = string
+.c5c8  20 d3 c8   jsr $c8d3        	JSR	LAB_CKTM		; type match check, set C for string
+.c5cb  d0 03      bne $c5d0        	BNE	LAB_17D5		; branch if string
+.c5cd  4c a3 d6   jmp $d6a3        	JMP	LAB_PFAC		; pack FAC1 into variable (Lvarpl) and return
+.c5d0                              lab_17d5
+.c5d0  a0 02      ldy #$02         	LDY	#$02			; set index to pointer high byte
+.c5d2  b1 ae      lda ($ae),y      	LDA	(des_pl),Y		; get string pointer high byte
+.c5d4  c5 82      cmp $82          	CMP	Sstorh		; compare bottom of string space high byte
+.c5d6  90 17      bcc $c5ef        	BCC	LAB_17F4		; if less assign value and exit (was in program memory)
+.c5d8  d0 07      bne $c5e1        	BNE	LAB_17E6		; branch if >
+.c5da  88         dey              	DEY				; decrement index
+.c5db  b1 ae      lda ($ae),y      	LDA	(des_pl),Y		; get pointer low byte
+.c5dd  c5 81      cmp $81          	CMP	Sstorl		; compare bottom of string space low byte
+.c5df  90 0e      bcc $c5ef        	BCC	LAB_17F4		; if less assign value and exit (was in program memory)
+.c5e1                              lab_17e6
+.c5e1  a4 af      ldy $af          	LDY	des_ph		; get descriptor pointer high byte
+.c5e3  c4 7c      cpy $7c          	CPY	Svarh			; compare start of vars high byte
+.c5e5  90 08      bcc $c5ef        	BCC	LAB_17F4		; branch if less (descriptor is on stack)
+.c5e7  d0 0d      bne $c5f6        	BNE	LAB_17FB		; branch if greater (descriptor is not on stack)
+.c5e9  a5 ae      lda $ae          	LDA	des_pl		; get descriptor pointer low byte
+.c5eb  c5 7b      cmp $7b          	CMP	Svarl			; compare start of vars low byte
+.c5ed  b0 07      bcs $c5f6        	BCS	LAB_17FB		; branch if >= (descriptor is not on stack)
+.c5ef                              lab_17f4
+.c5ef  a5 ae      lda $ae          	LDA	des_pl		; get descriptor pointer low byte
+.c5f1  a4 af      ldy $af          	LDY	des_ph		; get descriptor pointer high byte
+.c5f3  4c 0c c6   jmp $c60c        	JMP	LAB_1811		; clean stack, copy descriptor to variable and return
+.c5f6                              lab_17fb
+.c5f6  a0 00      ldy #$00         	LDY	#$00			; index to length
+.c5f8  b1 ae      lda ($ae),y      	LDA	(des_pl),Y		; get string length
+.c5fa  20 32 cf   jsr $cf32        	JSR	LAB_209C		; copy string
+.c5fd  a5 9e      lda $9e          	LDA	des_2l		; get descriptor pointer low byte
+.c5ff  a4 9f      ldy $9f          	LDY	des_2h		; get descriptor pointer high byte
+.c601  85 b8      sta $b8          	STA	ssptr_l		; save descriptor pointer low byte
+.c603  84 b9      sty $b9          	STY	ssptr_h		; save descriptor pointer high byte
+.c605  20 11 d1   jsr $d111        	JSR	LAB_228A		; copy string from descriptor (sdescr) to (Sutill)
+.c608  a9 ac      lda #$ac         	LDA	#<FAC1_e		; set descriptor pointer low byte
+.c60a  a0 00      ldy #$00         	LDY	#>FAC1_e		; get descriptor pointer high byte
+.c60c                              lab_1811
+.c60c  85 9e      sta $9e          	STA	des_2l		; save descriptor_2 pointer low byte
+.c60e  84 9f      sty $9f          	STY	des_2h		; save descriptor_2 pointer high byte
+.c610  20 73 d1   jsr $d173        	JSR	LAB_22EB		; clean descriptor stack, YA = pointer
+.c613  a0 00      ldy #$00         	LDY	#$00			; index to length
+.c615  b1 9e      lda ($9e),y      	LDA	(des_2l),Y		; get string length
+.c617  91 97      sta ($97),y      	STA	(Lvarpl),Y		; copy to let string variable
+.c619  c8         iny              	INY				; index to string pointer low byte
+.c61a  b1 9e      lda ($9e),y      	LDA	(des_2l),Y		; get string pointer low byte
+.c61c  91 97      sta ($97),y      	STA	(Lvarpl),Y		; copy to let string variable
+.c61e  c8         iny              	INY				; index to string pointer high byte
+.c61f  b1 9e      lda ($9e),y      	LDA	(des_2l),Y		; get string pointer high byte
+.c621  91 97      sta ($97),y      	STA	(Lvarpl),Y		; copy to let string variable
+.c623  60         rts              	RTS
+.c624                              lab_get
+.c624  20 aa cb   jsr $cbaa        	JSR	LAB_GVAR		; get var address
+.c627  85 97      sta $97          	STA	Lvarpl		; save var address low byte
+.c629  84 98      sty $98          	STY	Lvarph		; save var address high byte
+.c62b  20 00 dd   jsr $dd00        	JSR	INGET			; get input byte
+.c62e  a6 5f      ldx $5f          	LDX	Dtypef		; get data type flag, $FF=string, $00=numeric
+.c630  30 07      bmi $c639        	BMI	LAB_GETS		; go get string character
+.c632  a8         tay              	TAY				; copy character to Y
+.c633  20 66 ce   jsr $ce66        	JSR	LAB_1FD0		; convert Y to byte in FAC1
+.c636  4c a3 d6   jmp $d6a3        	JMP	LAB_PFAC		; pack FAC1 into variable (Lvarpl) and return
+.c639                              lab_gets
+.c639  48         pha              	PHA				; save character
+.c63a  a9 01      lda #$01         	LDA	#$01			; string is single byte
+.c63c  b0 01      bcs $c63f        	BCS	LAB_IsByte		; branch if byte received
+.c63e  68         pla              	PLA				; string is null
+.c63f                              lab_isbyte
+.c63f  20 3a cf   jsr $cf3a        	JSR	LAB_MSSP		; make string space A bytes long A=$AC=length,
+.c642  f0 05      beq $c649        	BEQ	LAB_NoSt		; skip store if null string
+.c644  68         pla              	PLA				; get character back
+.c645  a0 00      ldy #$00         	LDY	#$00			; clear index
+.c647  91 ad      sta ($ad),y      	STA	(str_pl),Y		; save byte in string (byte IS string!)
+.c649                              lab_nost
+.c649  20 85 cf   jsr $cf85        	JSR	LAB_RTST		; check for space on descriptor stack then put address
+.c64c  4c d0 c5   jmp $c5d0        	JMP	LAB_17D5		; do string LET and return
+.c64f                              lab_1829
+.c64f  20 d6 c6   jsr $c6d6        	JSR	LAB_18C6		; print string from Sutill/Sutilh
+.c652                              lab_182c
+.c652  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.c655                              lab_print
+.c655  f0 3b      beq $c692        	BEQ	LAB_CRLF		; if nothing following just print CR/LF
+.c657                              lab_1831
+.c657  c9 ac      cmp #$ac         	CMP	#TK_TAB		; compare with TAB( token
+.c659  f0 56      beq $c6b1        	BEQ	LAB_18A2		; go do TAB/SPC
+.c65b  c9 b0      cmp #$b0         	CMP	#TK_SPC		; compare with SPC( token
+.c65d  f0 52      beq $c6b1        	BEQ	LAB_18A2		; go do TAB/SPC
+.c65f  c9 2c      cmp #$2c         	CMP	#","			; compare with ","
+.c661  f0 38      beq $c69b        	BEQ	LAB_188B		; go do move to next TAB mark
+.c663  c9 3b      cmp #$3b         	CMP	#";"			; compare with ";"
+.c665  f0 66      beq $c6cd        	BEQ	LAB_18BD		; if ";" continue with PRINT processing
+.c667  20 e1 c8   jsr $c8e1        	JSR	LAB_EVEX		; evaluate expression
+.c66a  24 5f      bit $5f          	BIT	Dtypef		; test data type flag, $FF=string, $00=numeric
+.c66c  30 e1      bmi $c64f        	BMI	LAB_1829		; branch if string
+.c66e  20 95 d8   jsr $d895        	JSR	LAB_296E		; convert FAC1 to string
+.c671  20 44 cf   jsr $cf44        	JSR	LAB_20AE		; print " terminated string to Sutill/Sutilh
+.c674  a0 00      ldy #$00         	LDY	#$00			; clear index
+.c676  a5 0f      lda $0f          	LDA	TWidth		; get terminal width byte
+.c678  f0 0a      beq $c684        	BEQ	LAB_185E		; skip check if zero
+.c67a  38         sec              	SEC				; set carry for subtract
+.c67b  e5 0e      sbc $0e          	SBC	TPos			; subtract terminal position
+.c67d  f1 ae      sbc ($ae),y      	SBC	(des_pl),Y		; subtract string length
+.c67f  b0 03      bcs $c684        	BCS	LAB_185E		; branch if less than terminal width
+.c681  20 92 c6   jsr $c692        	JSR	LAB_CRLF		; else print CR/LF
+.c684                              lab_185e
+.c684  20 d6 c6   jsr $c6d6        	JSR	LAB_18C6		; print string from Sutill/Sutilh
+.c687  f0 c9      beq $c652        	BEQ	LAB_182C		; always go continue processing line
+.c689                              lab_1866
+.c689  a9 00      lda #$00         	LDA	#$00			; clear byte
+.c68b  9d 0d 04   sta $040d,x      	STA	Ibuffs,X		; null terminate input
+.c68e  a2 0d      ldx #$0d         	LDX	#<Ibuffs		; set X to buffer start-1 low byte
+.c690  a0 04      ldy #$04         	LDY	#>Ibuffs		; set Y to buffer start-1 high byte
+.c692                              lab_crlf
+.c692  a9 0d      lda #$0d         	LDA	#$0D			; load [CR]
+.c694  20 ed c6   jsr $c6ed        	JSR	LAB_PRNA		; go print the character
+.c697  a9 0a      lda #$0a         	LDA	#$0A			; load [LF]
+.c699  d0 52      bne $c6ed        	BNE	LAB_PRNA		; go print the character and return, branch always
+.c69b                              lab_188b
+.c69b  a5 0e      lda $0e          	LDA	TPos			; get terminal position
+.c69d  c5 10      cmp $10          	CMP	Iclim			; compare with input column limit
+.c69f  90 05      bcc $c6a6        	BCC	LAB_1897		; branch if less
+.c6a1  20 92 c6   jsr $c692        	JSR	LAB_CRLF		; else print CR/LF (next line)
+.c6a4  d0 27      bne $c6cd        	BNE	LAB_18BD		; continue with PRINT processing (branch always)
+.c6a6                              lab_1897
+.c6a6  38         sec              	SEC				; set carry for subtract
+.c6a7                              lab_1898
+.c6a7  e5 64      sbc $64          	SBC	TabSiz		; subtract TAB size
+.c6a9  b0 fc      bcs $c6a7        	BCS	LAB_1898		; loop if result was +ve
+.c6ab  49 ff      eor #$ff         	EOR	#$FF			; complement it
+.c6ad  69 01      adc #$01         	ADC	#$01			; +1 (twos complement)
+.c6af  d0 12      bne $c6c3        	BNE	LAB_18B6		; always print A spaces (result is never $00)
+.c6b1                              lab_18a2
+.c6b1  48         pha              	PHA				; save token
+.c6b2  20 89 d2   jsr $d289        	JSR	LAB_SGBY		; scan and get byte parameter
+.c6b5  c9 29      cmp #$29         	CMP	#$29			; is next character )
+.c6b7  d0 7b      bne $c734        	BNE	LAB_1910		; if not do syntax error then warm start
+.c6b9  68         pla              	PLA				; get token back
+.c6ba  c9 ac      cmp #$ac         	CMP	#TK_TAB		; was it TAB ?
+.c6bc  d0 06      bne $c6c4        	BNE	LAB_18B7		; if not go do SPC
+.c6be  8a         txa              	TXA				; copy integer value to A
+.c6bf  e5 0e      sbc $0e          	SBC	TPos			; subtract terminal position
+.c6c1  90 0a      bcc $c6cd        	BCC	LAB_18BD		; branch if result was < 0 (can't TAB backwards)
+.c6c3                              lab_18b6
+.c6c3  aa         tax              	TAX				; copy result to X
+.c6c4                              lab_18b7
+.c6c4  8a         txa              	TXA				; set flags on size for SPC
+.c6c5  f0 06      beq $c6cd        	BEQ	LAB_18BD		; branch if result was = $0, already here
+.c6c7                              lab_18ba
+.c6c7  20 e8 c6   jsr $c6e8        	JSR	LAB_18E0		; print " "
+.c6ca  ca         dex              	DEX				; decrement count
+.c6cb  d0 fa      bne $c6c7        	BNE	LAB_18BA		; loop if not all done
+.c6cd                              lab_18bd
+.c6cd  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.c6d0  d0 85      bne $c657        	BNE	LAB_1831		; if more to print go do it
+.c6d2  60         rts              	RTS
+.c6d3                              lab_18c3
+.c6d3  20 44 cf   jsr $cf44        	JSR	LAB_20AE		; print " terminated string to Sutill/Sutilh
+.c6d6                              lab_18c6
+.c6d6  20 3e d1   jsr $d13e        	JSR	LAB_22B6		; pop string off descriptor stack, or from top of string
+.c6d9  a0 00      ldy #$00         	LDY	#$00			; reset index
+.c6db  aa         tax              	TAX				; copy length to X
+.c6dc  f0 49      beq $c727        	BEQ	LAB_188C		; exit (RTS) if null string
+.c6de                              lab_18cd
+.c6de  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get next byte
+.c6e0  20 ed c6   jsr $c6ed        	JSR	LAB_PRNA		; go print the character
+.c6e3  c8         iny              	INY				; increment index
+.c6e4  ca         dex              	DEX				; decrement count
+.c6e5  d0 f7      bne $c6de        	BNE	LAB_18CD		; loop if not done yet
+.c6e7  60         rts              	RTS
+.c6e8                              lab_18e0
+.c6e8  a9 20      lda #$20         	LDA	#$20			; load " "
+
+>c6ea  2c                          	.byte	$2C			; change next line to BIT LAB_3FA9
+.c6eb                              lab_18e3
+
+.c6eb  a9 3f      lda #$3f         	LDA	#$3F			; load "?" character
+.c6ed                              lab_prna
+.c6ed  c9 20      cmp #$20         	CMP	#" "			; compare with " "
+.c6ef  90 19      bcc $c70a        	BCC	LAB_18F9		; branch if less (non printing)
+.c6f1  48         pha              	PHA				; save the character
+.c6f2  a5 0f      lda $0f          	LDA	TWidth		; get terminal width
+.c6f4  d0 0a      bne $c700        	BNE	LAB_18F0		; branch if not zero (not infinite length)
+.c6f6  a5 0e      lda $0e          	LDA	TPos			; get position
+.c6f8  e5 64      sbc $64          	SBC	TabSiz		; subtract TAB size, carry set by CMP #$20 above
+.c6fa  d0 0b      bne $c707        	BNE	LAB_18F7		; skip reset if different
+.c6fc  85 0e      sta $0e          	STA	TPos			; else reset position
+.c6fe  f0 07      beq $c707        	BEQ	LAB_18F7		; go print character
+.c700                              lab_18f0
+.c700  c5 0e      cmp $0e          	CMP	TPos			; compare with terminal character position
+.c702  d0 03      bne $c707        	BNE	LAB_18F7		; branch if not at end of line
+.c704  20 92 c6   jsr $c692        	JSR	LAB_CRLF		; else print CR/LF
+.c707                              lab_18f7
+.c707  e6 0e      inc $0e          	INC	TPos			; increment terminal position
+.c709  68         pla              	PLA				; get character back
+.c70a                              lab_18f9
+.c70a  20 ed de   jsr $deed        	JSR	V_OUTP		; output byte via output vector
+.c70d  c9 0d      cmp #$0d         	CMP	#$0D			; compare with [CR]
+.c70f  d0 14      bne $c725        	BNE	LAB_188A		; branch if not [CR]
+.c711  86 78      stx $78          	STX	TempB			; save buffer index
+.c713  a6 0d      ldx $0d          	LDX	Nullct		; get null count
+.c715  f0 0a      beq $c721        	BEQ	LAB_1886		; branch if no nulls
+.c717  a9 00      lda #$00         	LDA	#$00			; load [NULL]
+.c719                              lab_1880
+.c719  20 ed c6   jsr $c6ed        	JSR	LAB_PRNA		; go print the character
+.c71c  ca         dex              	DEX				; decrement count
+.c71d  d0 fa      bne $c719        	BNE	LAB_1880		; loop if not all done
+.c71f  a9 0d      lda #$0d         	LDA	#$0D			; restore the character (and set the flags)
+.c721                              lab_1886
+.c721  86 0e      stx $0e          	STX	TPos			; clear terminal position (X always = zero when we get here)
+.c723  a6 78      ldx $78          	LDX	TempB			; restore buffer index
+.c725                              lab_188a
+.c725  29 ff      and #$ff         	AND	#$FF			; set the flags
+.c727                              lab_188c
+.c727  60         rts              	RTS
+.c728                              lab_1904
+.c728  a5 62      lda $62          	LDA	Imode			; get input mode flag, $00=INPUT, $00=READ
+.c72a  10 0b      bpl $c737        	BPL	LAB_1913		; branch if INPUT (go do redo)
+.c72c  a5 8d      lda $8d          	LDA	Dlinel		; get current DATA line low byte
+.c72e  a4 8e      ldy $8e          	LDY	Dlineh		; get current DATA line high byte
+.c730  85 87      sta $87          	STA	Clinel		; save current line low byte
+.c732  84 88      sty $88          	STY	Clineh		; save current line high byte
+.c734                              lab_1910
+.c734  4c 02 ca   jmp $ca02        	JMP	LAB_SNER		; do syntax error then warm start
+.c737                              lab_1913
+.c737  a9 1b      lda #$1b         	LDA	#<LAB_REDO		; point to redo message (low addr)
+.c739  a0 e6      ldy #$e6         	LDY	#>LAB_REDO		; point to redo message (high addr)
+.c73b  20 d3 c6   jsr $c6d3        	JSR	LAB_18C3		; print null terminated string from memory
+.c73e  a5 8b      lda $8b          	LDA	Cpntrl		; get continue pointer low byte
+.c740  a4 8c      ldy $8c          	LDY	Cpntrh		; get continue pointer high byte
+.c742  85 c3      sta $c3          	STA	Bpntrl		; save BASIC execute pointer low byte
+.c744  84 c4      sty $c4          	STY	Bpntrh		; save BASIC execute pointer high byte
+.c746  60         rts              	RTS
+.c747                              lab_input
+.c747  c9 22      cmp #$22         	CMP	#$22			; compare next byte with open quote
+.c749  d0 0b      bne $c756        	BNE	LAB_1934		; branch if no prompt string
+.c74b  20 be c9   jsr $c9be        	JSR	LAB_1BC1		; print "..." string
+.c74e  a9 3b      lda #$3b         	LDA	#$3B			; load A with ";"
+.c750  20 f1 c9   jsr $c9f1        	JSR	LAB_SCCA		; scan for CHR$(A), else do syntax error then warm start
+.c753  20 d6 c6   jsr $c6d6        	JSR	LAB_18C6		; print string from Sutill/Sutilh
+.c756                              lab_1934
+.c756  20 6a ce   jsr $ce6a        	JSR	LAB_CKRN		; check not Direct, back here if ok
+.c759  20 40 c0   jsr $c040        	JSR	LAB_INLN		; print "? " and get BASIC input
+.c75c  a9 00      lda #$00         	LDA	#$00			; set mode = INPUT
+.c75e  cd 0d 04   cmp $040d        	CMP	Ibuffs		; test first byte in buffer
+.c761  d0 0a      bne $c76d        	BNE	LAB_1953		; branch if not null input
+.c763  18         clc              	CLC				; was null input so clear carry to exit program
+.c764  4c 2c c3   jmp $c32c        	JMP	LAB_1647		; go do BREAK exit
+.c767                              lab_read
+.c767  a6 8f      ldx $8f          	LDX	Dptrl			; get DATA pointer low byte
+.c769  a4 90      ldy $90          	LDY	Dptrh			; get DATA pointer high byte
+.c76b  a9 80      lda #$80         	LDA	#$80			; set mode = READ
+.c76d                              lab_1953
+.c76d  85 62      sta $62          	STA	Imode			; set input mode flag, $00=INPUT, $80=READ
+.c76f  86 91      stx $91          	STX	Rdptrl		; save READ pointer low byte
+.c771  84 92      sty $92          	STY	Rdptrh		; save READ pointer high byte
+.c773                              lab_195b
+.c773  20 aa cb   jsr $cbaa        	JSR	LAB_GVAR		; get (var) address
+.c776  85 97      sta $97          	STA	Lvarpl		; save address low byte
+.c778  84 98      sty $98          	STY	Lvarph		; save address high byte
+.c77a  a5 c3      lda $c3          	LDA	Bpntrl		; get BASIC execute pointer low byte
+.c77c  a4 c4      ldy $c4          	LDY	Bpntrh		; get BASIC execute pointer high byte
+.c77e  85 11      sta $11          	STA	Itempl		; save as temporary integer low byte
+.c780  84 12      sty $12          	STY	Itemph		; save as temporary integer high byte
+.c782  a6 91      ldx $91          	LDX	Rdptrl		; get READ pointer low byte
+.c784  a4 92      ldy $92          	LDY	Rdptrh		; get READ pointer high byte
+.c786  86 c3      stx $c3          	STX	Bpntrl		; set BASIC execute pointer low byte
+.c788  84 c4      sty $c4          	STY	Bpntrh		; set BASIC execute pointer high byte
+.c78a  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.c78d  d0 11      bne $c7a0        	BNE	LAB_1988		; branch if not null
+.c78f  24 62      bit $62          	BIT	Imode			; test input mode flag, $00=INPUT, $80=READ
+.c791  30 65      bmi $c7f8        	BMI	LAB_19DD		; branch if READ
+.c793  20 eb c6   jsr $c6eb        	JSR	LAB_18E3		; print "?" character (double ? for extended input)
+.c796  20 40 c0   jsr $c040        	JSR	LAB_INLN		; print "? " and get BASIC input
+.c799  86 c3      stx $c3          	STX	Bpntrl		; set BASIC execute pointer low byte
+.c79b  84 c4      sty $c4          	STY	Bpntrh		; set BASIC execute pointer high byte
+.c79d                              lab_1985
+.c79d  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.c7a0                              lab_1988
+.c7a0  24 5f      bit $5f          	BIT	Dtypef		; test data type flag, $FF=string, $00=numeric
+.c7a2  10 24      bpl $c7c8        	BPL	LAB_19B0		; branch if numeric
+.c7a4  85 5b      sta $5b          	STA	Srchc			; save search character
+.c7a6  c9 22      cmp #$22         	CMP	#$22			; was it " ?
+.c7a8  f0 07      beq $c7b1        	BEQ	LAB_1999		; branch if so
+.c7aa  a9 3a      lda #$3a         	LDA	#":"			; else search character is ":"
+.c7ac  85 5b      sta $5b          	STA	Srchc			; set new search character
+.c7ae  a9 2c      lda #$2c         	LDA	#","			; other search character is ","
+.c7b0  18         clc              	CLC				; clear carry for add
+.c7b1                              lab_1999
+.c7b1  85 5c      sta $5c          	STA	Asrch			; set second search character
+.c7b3  a5 c3      lda $c3          	LDA	Bpntrl		; get BASIC execute pointer low byte
+.c7b5  a4 c4      ldy $c4          	LDY	Bpntrh		; get BASIC execute pointer high byte
+.c7b7  69 00      adc #$00         	ADC	#$00			; c is =1 if we came via the BEQ LAB_1999, else =0
+.c7b9  90 01      bcc $c7bc        	BCC	LAB_19A4		; branch if no execute pointer low byte rollover
+.c7bb  c8         iny              	INY				; else increment high byte
+.c7bc                              lab_19a4
+.c7bc  20 4a cf   jsr $cf4a        	JSR	LAB_20B4		; print Srchc or Asrch terminated string to Sutill/Sutilh
+.c7bf  20 cf d2   jsr $d2cf        	JSR	LAB_23F3		; restore BASIC execute pointer from temp (Btmpl/Btmph)
+.c7c2  20 d0 c5   jsr $c5d0        	JSR	LAB_17D5		; go do string LET
+.c7c5  4c ce c7   jmp $c7ce        	JMP	LAB_19B6		; go check string terminator
+.c7c8                              lab_19b0
+.c7c8  20 a6 d7   jsr $d7a6        	JSR	LAB_2887		; get FAC1 from string
+.c7cb  20 a3 d6   jsr $d6a3        	JSR	LAB_PFAC		; pack FAC1 into (Lvarpl)
+.c7ce                              lab_19b6
+.c7ce  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.c7d1  f0 0a      beq $c7dd        	BEQ	LAB_19C5		; branch if null (last entry)
+.c7d3  c9 2c      cmp #$2c         	CMP	#","			; else compare with ","
+.c7d5  f0 03      beq $c7da        	BEQ	LAB_19C2		; branch if ","
+.c7d7  4c 28 c7   jmp $c728        	JMP	LAB_1904		; else go handle bad input data
+.c7da                              lab_19c2
+.c7da  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.c7dd                              lab_19c5
+.c7dd  a5 c3      lda $c3          	LDA	Bpntrl		; get BASIC execute pointer low byte (temp READ/INPUT ptr)
+.c7df  a4 c4      ldy $c4          	LDY	Bpntrh		; get BASIC execute pointer high byte (temp READ/INPUT ptr)
+.c7e1  85 91      sta $91          	STA	Rdptrl		; save for now
+.c7e3  84 92      sty $92          	STY	Rdptrh		; save for now
+.c7e5  a5 11      lda $11          	LDA	Itempl		; get temporary integer low byte (temp BASIC execute ptr)
+.c7e7  a4 12      ldy $12          	LDY	Itemph		; get temporary integer high byte (temp BASIC execute ptr)
+.c7e9  85 c3      sta $c3          	STA	Bpntrl		; set BASIC execute pointer low byte
+.c7eb  84 c4      sty $c4          	STY	Bpntrh		; set BASIC execute pointer high byte
+.c7ed  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.c7f0  f0 2c      beq $c81e        	BEQ	LAB_1A03		; if null go do extra ignored message
+.c7f2  20 fe c9   jsr $c9fe        	JSR	LAB_1C01		; else scan for "," , else do syntax error then warm start
+.c7f5  4c 73 c7   jmp $c773        	JMP	LAB_195B		; go INPUT next variable from list
+.c7f8                              lab_19dd
+.c7f8  20 9d c4   jsr $c49d        	JSR	LAB_SNBS		; scan for next BASIC statement ([:] or [EOL])
+.c7fb  c8         iny              	INY				; increment index
+.c7fc  aa         tax              	TAX				; copy character ([:] or [EOL])
+.c7fd  d0 12      bne $c811        	BNE	LAB_19F6		; branch if [:]
+.c7ff  a2 06      ldx #$06         	LDX	#$06			; set for "Out of DATA" error
+.c801  c8         iny              	INY				; increment index, now points to next line pointer high byte
+.c802  b1 c3      lda ($c3),y      	LDA	(Bpntrl),Y		; get next line pointer high byte
+.c804  f0 73      beq $c879        	BEQ	LAB_1A54		; branch if end (eventually does error X)
+.c806  c8         iny              	INY				; increment index
+.c807  b1 c3      lda ($c3),y      	LDA	(Bpntrl),Y		; get next line # low byte
+.c809  85 8d      sta $8d          	STA	Dlinel		; save current DATA line low byte
+.c80b  c8         iny              	INY				; increment index
+.c80c  b1 c3      lda ($c3),y      	LDA	(Bpntrl),Y		; get next line # high byte
+.c80e  c8         iny              	INY				; increment index
+.c80f  85 8e      sta $8e          	STA	Dlineh		; save current DATA line high byte
+.c811                              lab_19f6
+.c811  b1 c3      lda ($c3),y      	LDA	(Bpntrl),Y		; get byte
+.c813  c8         iny              	INY				; increment index
+.c814  aa         tax              	TAX				; copy to X
+.c815  20 8f c4   jsr $c48f        	JSR	LAB_170F		; set BASIC execute pointer
+.c818  e0 83      cpx #$83         	CPX	#TK_DATA		; compare with "DATA" token
+.c81a  f0 81      beq $c79d        	BEQ	LAB_1985		; was "DATA" so go do next READ
+.c81c  d0 da      bne $c7f8        	BNE	LAB_19DD		; go find next statement if not "DATA"
+.c81e                              lab_1a03
+.c81e  a5 91      lda $91          	LDA	Rdptrl		; get temp READ pointer low byte
+.c820  a4 92      ldy $92          	LDY	Rdptrh		; get temp READ pointer high byte
+.c822  a6 62      ldx $62          	LDX	Imode			; get input mode flag, $00=INPUT, $80=READ
+.c824  10 03      bpl $c829        	BPL	LAB_1A0E		; branch if INPUT
+.c826  4c 4e c3   jmp $c34e        	JMP	LAB_1624		; save AY as DATA pointer and return
+.c829                              lab_1a0e
+.c829  a0 00      ldy #$00         	LDY	#$00			; clear index
+.c82b  b1 91      lda ($91),y      	LDA	(Rdptrl),Y		; get next byte
+.c82d  d0 01      bne $c830        	BNE	LAB_1A1B		; error if not end of INPUT
+.c82f  60         rts              	RTS
+.c830                              lab_1a1b
+.c830  a9 0a      lda #$0a         	LDA	#<LAB_IMSG		; point to extra ignored message (low addr)
+.c832  a0 e6      ldy #$e6         	LDY	#>LAB_IMSG		; point to extra ignored message (high addr)
+.c834  4c d3 c6   jmp $c6d3        	JMP	LAB_18C3		; print null terminated string from memory and return
+.c837                              lab_11a1
+.c837  ba         tsx              	TSX				; copy stack pointer
+.c838  e8         inx              	INX				; +1 pass return address
+.c839  e8         inx              	INX				; +2 pass return address
+.c83a  e8         inx              	INX				; +3 pass calling routine return address
+.c83b  e8         inx              	INX				; +4 pass calling routine return address
+.c83c                              lab_11a6
+.c83c  bd 01 01   lda $0101,x      	LDA	LAB_STAK+1,X	; get token byte from stack
+.c83f  c9 81      cmp #$81         	CMP	#TK_FOR		; is it FOR token
+.c841  d0 21      bne $c864        	BNE	LAB_11CE		; exit if not FOR token
+.c843  a5 98      lda $98          	LDA	Frnxth		; get var pointer for FOR/NEXT high byte
+.c845  d0 0a      bne $c851        	BNE	LAB_11BB		; branch if not null
+.c847  bd 02 01   lda $0102,x      	LDA	LAB_STAK+2,X	; get FOR variable pointer low byte
+.c84a  85 97      sta $97          	STA	Frnxtl		; save var pointer for FOR/NEXT low byte
+.c84c  bd 03 01   lda $0103,x      	LDA	LAB_STAK+3,X	; get FOR variable pointer high byte
+.c84f  85 98      sta $98          	STA	Frnxth		; save var pointer for FOR/NEXT high byte
+.c851                              lab_11bb
+.c851  dd 03 01   cmp $0103,x      	CMP	LAB_STAK+3,X	; compare var pointer with stacked var pointer (high byte)
+.c854  d0 07      bne $c85d        	BNE	LAB_11C7		; branch if no match
+.c856  a5 97      lda $97          	LDA	Frnxtl		; get var pointer for FOR/NEXT low byte
+.c858  dd 02 01   cmp $0102,x      	CMP	LAB_STAK+2,X	; compare var pointer with stacked var pointer (low byte)
+.c85b  f0 07      beq $c864        	BEQ	LAB_11CE		; exit if match found
+.c85d                              lab_11c7
+.c85d  8a         txa              	TXA				; copy index
+.c85e  18         clc              	CLC				; clear carry for add
+.c85f  69 10      adc #$10         	ADC	#$10			; add FOR stack use size
+.c861  aa         tax              	TAX				; copy back to index
+.c862  d0 d8      bne $c83c        	BNE	LAB_11A6		; loop if not at start of stack
+.c864                              lab_11ce
+.c864  60         rts              	RTS
+.c865                              lab_next
+.c865  d0 04      bne $c86b        	BNE	LAB_1A46		; branch if NEXT var
+.c867  a0 00      ldy #$00         	LDY	#$00			; else clear Y
+.c869  f0 03      beq $c86e        	BEQ	LAB_1A49		; branch always (no variable to search for)
+.c86b                              lab_1a46
+.c86b  20 aa cb   jsr $cbaa        	JSR	LAB_GVAR		; get variable address
+.c86e                              lab_1a49
+.c86e  85 97      sta $97          	STA	Frnxtl		; store variable pointer low byte
+.c870  84 98      sty $98          	STY	Frnxth		; store variable pointer high byte
+.c872  20 37 c8   jsr $c837        	JSR	LAB_11A1		; search the stack for FOR activity
+.c875  f0 04      beq $c87b        	BEQ	LAB_1A56		; branch if found
+.c877  a2 00      ldx #$00         	LDX	#$00			; else set error $00 ("NEXT without FOR" error)
+.c879                              lab_1a54
+.c879  f0 63      beq $c8de        	BEQ	LAB_1ABE		; do error #X, then warm start
+.c87b                              lab_1a56
+.c87b  9a         txs              	TXS				; set stack pointer, X set by search, dumps return addresses
+.c87c  8a         txa              	TXA				; copy stack pointer
+.c87d  38         sec              	SEC				; set carry for subtract
+.c87e  e9 f7      sbc #$f7         	SBC	#$F7			; point to TO var
+.c880  85 73      sta $73          	STA	ut2_pl		; save pointer to TO var for compare
+.c882  69 fb      adc #$fb         	ADC	#$FB			; point to STEP var
+.c884  a0 01      ldy #$01         	LDY	#>LAB_STAK		; point to stack page high byte
+.c886  20 7d d6   jsr $d67d        	JSR	LAB_UFAC		; unpack memory (STEP value) into FAC1
+.c889  ba         tsx              	TSX				; get stack pointer back
+.c88a  bd 08 01   lda $0108,x      	LDA	LAB_STAK+8,X	; get step sign
+.c88d  85 b0      sta $b0          	STA	FAC1_s		; save FAC1 sign (b7)
+.c88f  a5 97      lda $97          	LDA	Frnxtl		; get FOR variable pointer low byte
+.c891  a4 98      ldy $98          	LDY	Frnxth		; get FOR variable pointer high byte
+.c893  20 be d3   jsr $d3be        	JSR	LAB_246C		; add (FOR variable) to FAC1
+.c896  20 a3 d6   jsr $d6a3        	JSR	LAB_PFAC		; pack FAC1 into (FOR variable)
+.c899  a0 01      ldy #$01         	LDY	#>LAB_STAK		; point to stack page high byte
+.c89b  20 19 d7   jsr $d719        	JSR	LAB_27FA		; compare FAC1 with (Y,ut2_pl) (TO value)
+.c89e  ba         tsx              	TSX				; get stack pointer back
+.c89f  dd 08 01   cmp $0108,x      	CMP	LAB_STAK+8,X	; compare step sign
+.c8a2  f0 17      beq $c8bb        	BEQ	LAB_1A9B		; branch if = (loop complete)
+.c8a4  bd 0d 01   lda $010d,x      	LDA	LAB_STAK+$0D,X	; get FOR line low byte
+.c8a7  85 87      sta $87          	STA	Clinel		; save current line low byte
+.c8a9  bd 0e 01   lda $010e,x      	LDA	LAB_STAK+$0E,X	; get FOR line high byte
+.c8ac  85 88      sta $88          	STA	Clineh		; save current line high byte
+.c8ae  bd 10 01   lda $0110,x      	LDA	LAB_STAK+$10,X	; get BASIC execute pointer low byte
+.c8b1  85 c3      sta $c3          	STA	Bpntrl		; save BASIC execute pointer low byte
+.c8b3  bd 0f 01   lda $010f,x      	LDA	LAB_STAK+$0F,X	; get BASIC execute pointer high byte
+.c8b6  85 c4      sta $c4          	STA	Bpntrh		; save BASIC execute pointer high byte
+.c8b8                              lab_1a98
+.c8b8  4c bc c2   jmp $c2bc        	JMP	LAB_15C2		; go do interpreter inner loop
+.c8bb                              lab_1a9b
+.c8bb  8a         txa              	TXA				; stack copy to A
+.c8bc  69 0f      adc #$0f         	ADC	#$0F			; add $10 ($0F+carry) to dump FOR structure
+.c8be  aa         tax              	TAX				; copy back to index
+.c8bf  9a         txs              	TXS				; copy to stack pointer
+.c8c0  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.c8c3  c9 2c      cmp #$2c         	CMP	#","			; compare with ","
+.c8c5  d0 f1      bne $c8b8        	BNE	LAB_1A98		; branch if not "," (go do interpreter inner loop)
+.c8c7  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; else increment and scan memory
+.c8ca  20 6b c8   jsr $c86b        	JSR	LAB_1A46		; do NEXT (var)
+.c8cd                              lab_evnm
+.c8cd  20 e1 c8   jsr $c8e1        	JSR	LAB_EVEX		; evaluate expression
+.c8d0                              lab_ctnm
+.c8d0  18         clc              	CLC				; destination is numeric
+
+>c8d1  24                          	.byte	$24			; makes next line BIT $38
+.c8d2                              lab_ctst
+
+.c8d2  38         sec              	SEC				; required type is string
+.c8d3                              lab_cktm
+.c8d3  24 5f      bit $5f          	BIT	Dtypef		; test data type flag, $FF=string, $00=numeric
+.c8d5  30 03      bmi $c8da        	BMI	LAB_1ABA		; branch if data type is string
+.c8d7  b0 03      bcs $c8dc        	BCS	LAB_1ABC		; if required type is string do type mismatch error
+.c8d9                              lab_1ab9
+.c8d9  60         rts              	RTS
+.c8da                              lab_1aba
+.c8da  b0 fd      bcs $c8d9        	BCS	LAB_1AB9		; exit if required type is string
+.c8dc                              lab_1abc
+.c8dc  a2 18      ldx #$18         	LDX	#$18			; error code $18 ("Type mismatch" error)
+.c8de                              lab_1abe
+.c8de  4c 3c bf   jmp $bf3c        	JMP	LAB_XERR		; do error #X, then warm start
+.c8e1                              lab_evex
+.c8e1  a6 c3      ldx $c3          	LDX	Bpntrl		; get BASIC execute pointer low byte
+.c8e3  d0 02      bne $c8e7        	BNE	LAB_1AC7		; skip next if not zero
+.c8e5  c6 c4      dec $c4          	DEC	Bpntrh		; else decrement BASIC execute pointer high byte
+.c8e7                              lab_1ac7
+.c8e7  c6 c3      dec $c3          	DEC	Bpntrl		; decrement BASIC execute pointer low byte
+.c8e9                              lab_evez
+.c8e9  a9 00      lda #$00         	LDA	#$00			; set null precedence (flag done)
+.c8eb                              lab_1acc
+.c8eb  48         pha              	PHA				; push precedence byte
+.c8ec  a9 02      lda #$02         	LDA	#$02			; 2 bytes
+.c8ee  20 03 bf   jsr $bf03        	JSR	LAB_1212		; check room on stack for A bytes
+.c8f1  20 cd c9   jsr $c9cd        	JSR	LAB_GVAL		; get value from line
+.c8f4  a9 00      lda #$00         	LDA	#$00			; clear A
+.c8f6  85 9b      sta $9b          	STA	comp_f		; clear compare function flag
+.c8f8                              lab_1adb
+.c8f8  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.c8fb                              lab_1ade
+.c8fb  38         sec              	SEC				; set carry for subtract
+.c8fc  e9 c1      sbc #$c1         	SBC	#TK_GT		; subtract token for > (lowest comparison function)
+.c8fe  90 17      bcc $c917        	BCC	LAB_1AFA		; branch if < TK_GT
+.c900  c9 03      cmp #$03         	CMP	#$03			; compare with ">" to "<" tokens
+.c902  b0 13      bcs $c917        	BCS	LAB_1AFA		; branch if >= TK_SGN (highest evaluation function +1)
+.c904  c9 01      cmp #$01         	CMP	#$01			; compare with token for =
+.c906  2a         rol              	ROL				; *2, b0 = carry (=1 if token was = or <)
+.c907  49 01      eor #$01         	EOR	#$01			; toggle b0
+.c909  45 9b      eor $9b          	EOR	comp_f		; EOR with compare function flag bits
+.c90b  c5 9b      cmp $9b          	CMP	comp_f		; compare with compare function flag
+.c90d  90 67      bcc $c976        	BCC	LAB_1B53		; if <(comp_f) do syntax error then warm start
+.c90f  85 9b      sta $9b          	STA	comp_f		; save new compare function flag
+.c911  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.c914  4c fb c8   jmp $c8fb        	JMP	LAB_1ADE		; go do next character
+.c917                              lab_1afa
+.c917  a6 9b      ldx $9b          	LDX	comp_f		; get compare function flag
+.c919  d0 2c      bne $c947        	BNE	LAB_1B2A		; branch if compare function
+.c91b  b0 79      bcs $c996        	BCS	LAB_1B78		; go do functions
+.c91d  69 0a      adc #$0a         	ADC	#TK_GT-TK_PLUS	; add # of operators (+, -, *, /, ^, AND, OR or EOR)
+.c91f  90 75      bcc $c996        	BCC	LAB_1B78		; branch if < + operator
+.c921  d0 07      bne $c92a        	BNE	LAB_1B0B		; branch if not + token
+.c923  24 5f      bit $5f          	BIT	Dtypef		; test data type flag, $FF=string, $00=numeric
+.c925  10 03      bpl $c92a        	BPL	LAB_1B0B		; branch if not string
+.c927  4c d4 d0   jmp $d0d4        	JMP	LAB_224D		; add strings, string 1 is in descriptor des_pl, string 2
+.c92a                              lab_1b0b
+.c92a  85 71      sta $71          	STA	ut1_pl		; save it
+.c92c  0a         asl              	ASL				; *2
+.c92d  65 71      adc $71          	ADC	ut1_pl		; *3
+.c92f  a8         tay              	TAY				; copy to index
+.c930                              lab_1b13
+.c930  68         pla              	PLA				; pull previous precedence
+.c931  d9 eb e0   cmp $e0eb,y      	CMP	LAB_OPPT,Y		; compare with precedence byte
+.c934  b0 65      bcs $c99b        	BCS	LAB_1B7D		; branch if A >=
+.c936  20 d0 c8   jsr $c8d0        	JSR	LAB_CTNM		; check if source is numeric, else do type mismatch
+.c939                              lab_1b1c
+.c939  48         pha              	PHA				; save precedence
+.c93a                              lab_1b1d
+.c93a  20 62 c9   jsr $c962        	JSR	LAB_1B43		; get vector, execute function then continue evaluation
+.c93d  68         pla              	PLA				; restore precedence
+.c93e  a4 99      ldy $99          	LDY	prstk			; get precedence stacked flag
+.c940  10 19      bpl $c95b        	BPL	LAB_1B3C		; branch if stacked values
+.c942  aa         tax              	TAX				; copy precedence (set flags)
+.c943  f0 76      beq $c9bb        	BEQ	LAB_1B9D		; exit if done
+.c945  d0 5d      bne $c9a4        	BNE	LAB_1B86		; else pop FAC2 and return, branch always
+.c947                              lab_1b2a
+.c947  26 5f      rol $5f          	ROL	Dtypef		; shift data type flag into Cb
+.c949  8a         txa              	TXA				; copy compare function flag
+.c94a  85 5f      sta $5f          	STA	Dtypef		; clear data type flag, X is 0xxx xxxx
+.c94c  2a         rol              	ROL				; shift data type into compare function byte b0
+.c94d  a6 c3      ldx $c3          	LDX	Bpntrl		; get BASIC execute pointer low byte
+.c94f  d0 02      bne $c953        	BNE	LAB_1B34		; branch if no underflow
+.c951  c6 c4      dec $c4          	DEC	Bpntrh		; else decrement BASIC execute pointer high byte
+.c953                              lab_1b34
+.c953  c6 c3      dec $c3          	DEC	Bpntrl		; decrement BASIC execute pointer low byte
+.c955  a0 24      ldy #$24         	LDY	#TK_LT_PLUS*3	; set offset to last operator entry
+.c957  85 9b      sta $9b          	STA	comp_f		; save new compare function flag
+.c959  d0 d5      bne $c930        	BNE	LAB_1B13		; branch always
+.c95b                              lab_1b3c
+.c95b  d9 eb e0   cmp $e0eb,y      	CMP	LAB_OPPT,Y		;.compare with stacked function precedence
+.c95e  b0 44      bcs $c9a4        	BCS	LAB_1B86		; branch if A >=, pop FAC2 and return
+.c960  90 d7      bcc $c939        	BCC	LAB_1B1C		; branch always
+.c962                              lab_1b43
+.c962  b9 ed e0   lda $e0ed,y      	LDA	LAB_OPPT+2,Y	; get function vector high byte
+.c965  48         pha              	PHA				; onto stack
+.c966  b9 ec e0   lda $e0ec,y      	LDA	LAB_OPPT+1,Y	; get function vector low byte
+.c969  48         pha              	PHA				; onto stack
+.c96a  20 79 c9   jsr $c979        	JSR	LAB_1B5B		; function will return here, then the next RTS will call
+.c96d  a5 9b      lda $9b          	LDA	comp_f		; get compare function flag
+.c96f  48         pha              	PHA				; push compare evaluation byte
+.c970  b9 eb e0   lda $e0eb,y      	LDA	LAB_OPPT,Y		; get precedence byte
+.c973  4c eb c8   jmp $c8eb        	JMP	LAB_1ACC		; continue evaluating expression
+.c976                              lab_1b53
+.c976  4c 02 ca   jmp $ca02        	JMP	LAB_SNER		; do syntax error then warm start
+.c979                              lab_1b5b
+.c979  68         pla              	PLA				; get return addr low byte
+.c97a  85 71      sta $71          	STA	ut1_pl		; save it
+.c97c  e6 71      inc $71          	INC	ut1_pl		; increment it (was ret-1 pushed? yes!)
+.c97e  68         pla              	PLA				; get return addr high byte
+.c97f  85 72      sta $72          	STA	ut1_ph		; save it
+.c981  a5 b0      lda $b0          	LDA	FAC1_s		; get FAC1 sign (b7)
+.c983  48         pha              	PHA				; push sign
+.c984                              lab_1b66
+.c984  20 d9 d6   jsr $d6d9        	JSR	LAB_27BA		; round FAC1
+.c987  a5 af      lda $af          	LDA	FAC1_3		; get FAC1 mantissa3
+.c989  48         pha              	PHA				; push on stack
+.c98a  a5 ae      lda $ae          	LDA	FAC1_2		; get FAC1 mantissa2
+.c98c  48         pha              	PHA				; push on stack
+.c98d  a5 ad      lda $ad          	LDA	FAC1_1		; get FAC1 mantissa1
+.c98f  48         pha              	PHA				; push on stack
+.c990  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.c992  48         pha              	PHA				; push on stack
+.c993  6c 71 00   jmp ($0071)      	JMP	(ut1_pl)		; return, sort of
+.c996                              lab_1b78
+.c996  a0 ff      ldy #$ff         	LDY	#$FF			; flag function
+.c998  68         pla              	PLA				; pull precedence byte
+.c999                              lab_1b7b
+.c999  f0 20      beq $c9bb        	BEQ	LAB_1B9D		; exit if done
+.c99b                              lab_1b7d
+.c99b  c9 64      cmp #$64         	CMP	#$64			; compare previous precedence with $64
+.c99d  f0 03      beq $c9a2        	BEQ	LAB_1B84		; branch if was $64 (< function)
+.c99f  20 d0 c8   jsr $c8d0        	JSR	LAB_CTNM		; check if source is numeric, else do type mismatch
+.c9a2                              lab_1b84
+.c9a2  84 99      sty $99          	STY	prstk			; save precedence stacked flag
+.c9a4                              lab_1b86
+.c9a4  68         pla              	PLA				; pop byte
+.c9a5  4a         lsr              	LSR				; shift out comparison evaluation lowest bit
+.c9a6  85 63      sta $63          	STA	Cflag			; save comparison evaluation flag
+.c9a8  68         pla              	PLA				; pop exponent
+.c9a9  85 b3      sta $b3          	STA	FAC2_e		; save FAC2 exponent
+.c9ab  68         pla              	PLA				; pop mantissa1
+.c9ac  85 b4      sta $b4          	STA	FAC2_1		; save FAC2 mantissa1
+.c9ae  68         pla              	PLA				; pop mantissa2
+.c9af  85 b5      sta $b5          	STA	FAC2_2		; save FAC2 mantissa2
+.c9b1  68         pla              	PLA				; pop mantissa3
+.c9b2  85 b6      sta $b6          	STA	FAC2_3		; save FAC2 mantissa3
+.c9b4  68         pla              	PLA				; pop sign
+.c9b5  85 b7      sta $b7          	STA	FAC2_s		; save FAC2 sign (b7)
+.c9b7  45 b0      eor $b0          	EOR	FAC1_s		; EOR FAC1 sign (b7)
+.c9b9  85 b8      sta $b8          	STA	FAC_sc		; save sign compare (FAC1 EOR FAC2)
+.c9bb                              lab_1b9d
+.c9bb  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.c9bd  60         rts              	RTS
+.c9be                              lab_1bc1
+.c9be  a5 c3      lda $c3          	LDA	Bpntrl		; get BASIC execute pointer low byte
+.c9c0  a4 c4      ldy $c4          	LDY	Bpntrh		; get BASIC execute pointer high byte
+.c9c2  69 00      adc #$00         	ADC	#$00			; add carry to low byte
+.c9c4  90 01      bcc $c9c7        	BCC	LAB_1BCA		; branch if no overflow
+.c9c6  c8         iny              	INY				; increment high byte
+.c9c7                              lab_1bca
+.c9c7  20 44 cf   jsr $cf44        	JSR	LAB_20AE		; print " terminated string to Sutill/Sutilh
+.c9ca  4c cf d2   jmp $d2cf        	JMP	LAB_23F3		; restore BASIC execute pointer from temp and return
+.c9cd                              lab_gval
+.c9cd  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.c9d0  b0 03      bcs $c9d5        	BCS	LAB_1BAC		; branch if not numeric character
+.c9d2                              lab_1ba9
+.c9d2  4c a6 d7   jmp $d7a6        	JMP	LAB_2887		; get FAC1 from string and return
+.c9d5                              lab_1bac
+.c9d5  aa         tax              	TAX				; set the flags
+.c9d6  30 2f      bmi $ca07        	BMI	LAB_1BD0		; if -ve go test token values
+.c9d8  c9 24      cmp #$24         	CMP	#"$"			; compare with "$"
+.c9da  f0 f6      beq $c9d2        	BEQ	LAB_1BA9		; branch if "$", hex number
+.c9dc  c9 25      cmp #$25         	CMP	#"%"			; else compare with "%"
+.c9de  f0 f2      beq $c9d2        	BEQ	LAB_1BA9		; branch if "%", binary number
+.c9e0  c9 2e      cmp #$2e         	CMP	#"."			; compare with "."
+.c9e2  f0 ee      beq $c9d2        	BEQ	LAB_1BA9		; if so get FAC1 from string and return (e.g. was .123)
+.c9e4  c9 22      cmp #$22         	CMP	#$22			; compare with "
+.c9e6  f0 d6      beq $c9be        	BEQ	LAB_1BC1		; branch if open quote
+.c9e8  c9 28      cmp #$28         	CMP	#"("			; compare with "("
+.c9ea  d0 4f      bne $ca3b        	BNE	LAB_1C18		; if not "(" get (var), return value in FAC1 and $ flag
+.c9ec                              lab_1bf7
+.c9ec  20 e9 c8   jsr $c8e9        	JSR	LAB_EVEZ		; evaluate expression, no decrement
+.c9ef                              lab_1bfb
+.c9ef  a9 29      lda #$29         	LDA	#$29			; load A with ")"
+.c9f1                              lab_scca
+.c9f1  a0 00      ldy #$00         	LDY	#$00			; clear index
+.c9f3  d1 c3      cmp ($c3),y      	CMP	(Bpntrl),Y		; check next byte is = A
+.c9f5  d0 0b      bne $ca02        	BNE	LAB_SNER		; if not do syntax error then warm start
+.c9f7  4c bc 00   jmp $00bc        	JMP	LAB_IGBY		; increment and scan memory then return
+.c9fa                              lab_1bfe
+.c9fa  a9 28      lda #$28         	LDA	#$28			; load A with "("
+.c9fc  d0 f3      bne $c9f1        	BNE	LAB_SCCA		; scan for CHR$(A), else do syntax error then warm start
+.c9fe                              lab_1c01
+.c9fe  a9 2c      lda #$2c         	LDA	#$2C			; load A with ","
+.ca00  d0 ef      bne $c9f1        	BNE	LAB_SCCA		; scan for CHR$(A), else do syntax error then warm start
+.ca02                              lab_sner
+.ca02  a2 02      ldx #$02         	LDX	#$02			; error code $02 ("Syntax" error)
+.ca04  4c 3c bf   jmp $bf3c        	JMP	LAB_XERR		; do error #X, then warm start
+.ca07                              lab_1bd0
+.ca07  c9 b8      cmp #$b8         	CMP	#TK_MINUS		; compare with token for -
+.ca09  f0 29      beq $ca34        	BEQ	LAB_1C11		; branch if - token (do set-up for functions)
+.ca0b  c9 b7      cmp #$b7         	CMP	#TK_PLUS		; compare with token for +
+.ca0d  f0 be      beq $c9cd        	BEQ	LAB_GVAL		; branch if + token (+n = n so ignore leading +)
+.ca0f  c9 b2      cmp #$b2         	CMP	#TK_NOT		; compare with token for NOT
+.ca11  d0 13      bne $ca26        	BNE	LAB_1BE7		; branch if not token for NOT
+.ca13  a0 21      ldy #$21         	LDY	#TK_EQUAL_PLUS*3	; offset to NOT function
+.ca15  d0 1f      bne $ca36        	BNE	LAB_1C13		; do set-up for function then execute (branch always)
+.ca17                              lab_equal
+.ca17  20 a6 cc   jsr $cca6        	JSR	LAB_EVIR		; evaluate integer expression (no sign check)
+.ca1a  a5 af      lda $af          	LDA	FAC1_3		; get FAC1 mantissa3
+.ca1c  49 ff      eor #$ff         	EOR	#$FF			; invert it
+.ca1e  a8         tay              	TAY				; copy it
+.ca1f  a5 ae      lda $ae          	LDA	FAC1_2		; get FAC1 mantissa2
+.ca21  49 ff      eor #$ff         	EOR	#$FF			; invert it
+.ca23  4c 59 ce   jmp $ce59        	JMP	LAB_AYFC		; save and convert integer AY to FAC1 and return
+.ca26                              lab_1be7
+.ca26  c9 af      cmp #$af         	CMP	#TK_FN		; compare with token for FN
+.ca28  d0 03      bne $ca2d        	BNE	LAB_1BEE		; branch if not token for FN
+.ca2a  4c b4 ce   jmp $ceb4        	JMP	LAB_201E		; go evaluate FNx
+.ca2d                              lab_1bee
+.ca2d  e9 c4      sbc #$c4         	SBC	#TK_SGN		; subtract with token for SGN
+.ca2f  b0 19      bcs $ca4a        	BCS	LAB_1C27		; if a function token go do it
+.ca31  4c 02 ca   jmp $ca02        	JMP	LAB_SNER		; else do syntax error
+.ca34                              lab_1c11
+.ca34  a0 1e      ldy #$1e         	LDY	#TK_GT_PLUS*3	; set offset from base to > operator
+.ca36                              lab_1c13
+.ca36  68         pla              	PLA				; dump return address low byte
+.ca37  68         pla              	PLA				; dump return address high byte
+.ca38  4c 3a c9   jmp $c93a        	JMP	LAB_1B1D		; execute function then continue evaluation
+.ca3b                              lab_1c18
+.ca3b  20 aa cb   jsr $cbaa        	JSR	LAB_GVAR		; get (var) address
+.ca3e  85 ae      sta $ae          	STA	FAC1_2		; save address low byte in FAC1 mantissa2
+.ca40  84 af      sty $af          	STY	FAC1_3		; save address high byte in FAC1 mantissa3
+.ca42  a6 5f      ldx $5f          	LDX	Dtypef		; get data type flag, $FF=string, $00=numeric
+.ca44  30 03      bmi $ca49        	BMI	LAB_1C25		; if string then return (does RTS)
+.ca46                              lab_1c24
+.ca46  4c 7d d6   jmp $d67d        	JMP	LAB_UFAC		; unpack memory (AY) into FAC1
+.ca49                              lab_1c25
+.ca49  60         rts              	RTS
+.ca4a                              lab_1c27
+.ca4a  0a         asl              	ASL				; *2 (2 bytes per function address)
+.ca4b  a8         tay              	TAY				; copy to index
+.ca4c  b9 a6 e0   lda $e0a6,y      	LDA	LAB_FTBM,Y		; get function jump vector high byte
+.ca4f  48         pha              	PHA				; push functions jump vector high byte
+.ca50  b9 a5 e0   lda $e0a5,y      	LDA	LAB_FTBL,Y		; get function jump vector low byte
+.ca53  48         pha              	PHA				; push functions jump vector low byte
+.ca54  b9 60 e0   lda $e060,y      	LDA	LAB_FTPM,Y		; get function pre process vector high byte
+.ca57  f0 05      beq $ca5e        	BEQ	LAB_1C56		; skip pre process if null vector
+.ca59  48         pha              	PHA				; push functions pre process vector high byte
+.ca5a  b9 5f e0   lda $e05f,y      	LDA	LAB_FTPL,Y		; get function pre process vector low byte
+.ca5d  48         pha              	PHA				; push functions pre process vector low byte
+.ca5e                              lab_1c56
+.ca5e  60         rts              	RTS				; do function, or pre process, call
+.ca5f                              lab_ppfs
+.ca5f  20 ec c9   jsr $c9ec        	JSR	LAB_1BF7		; process expression in parenthesis
+.ca62  4c d2 c8   jmp $c8d2        	JMP	LAB_CTST		; check if source is string then do function,
+.ca65                              lab_ppfn
+.ca65  20 ec c9   jsr $c9ec        	JSR	LAB_1BF7		; process expression in parenthesis
+.ca68  4c d0 c8   jmp $c8d0        	JMP	LAB_CTNM		; check if source is numeric then do function,
+.ca6b                              lab_ppbi
+.ca6b  46 5f      lsr $5f          	LSR	Dtypef		; clear data type flag, $FF=string, $00=numeric
+.ca6d  4c bc 00   jmp $00bc        	JMP	LAB_IGBY		; increment and scan memory then do function
+.ca70                              lab_lrms
+.ca70  20 e9 c8   jsr $c8e9        	JSR	LAB_EVEZ		; evaluate (should be string) expression
+.ca73  20 fe c9   jsr $c9fe        	JSR	LAB_1C01		; scan for ",", else do syntax error then warm start
+.ca76  20 d2 c8   jsr $c8d2        	JSR	LAB_CTST		; check if source is string, else do type mismatch
+.ca79  68         pla              	PLA				; get function jump vector low byte
+.ca7a  aa         tax              	TAX				; save functions jump vector low byte
+.ca7b  68         pla              	PLA				; get function jump vector high byte
+.ca7c  a8         tay              	TAY				; save functions jump vector high byte
+.ca7d  a5 af      lda $af          	LDA	des_ph		; get descriptor pointer high byte
+.ca7f  48         pha              	PHA				; push string pointer high byte
+.ca80  a5 ae      lda $ae          	LDA	des_pl		; get descriptor pointer low byte
+.ca82  48         pha              	PHA				; push string pointer low byte
+.ca83  98         tya              	TYA				; get function jump vector high byte back
+.ca84  48         pha              	PHA				; save functions jump vector high byte
+.ca85  8a         txa              	TXA				; get function jump vector low byte back
+.ca86  48         pha              	PHA				; save functions jump vector low byte
+.ca87  20 8c d2   jsr $d28c        	JSR	LAB_GTBY		; get byte parameter
+.ca8a  8a         txa              	TXA				; copy byte parameter to A
+.ca8b  60         rts              	RTS				; go do function
+.ca8c                              lab_bhss
+.ca8c  20 e9 c8   jsr $c8e9        	JSR	LAB_EVEZ		; process expression
+.ca8f  20 d0 c8   jsr $c8d0        	JSR	LAB_CTNM		; check if source is numeric, else do type mismatch
+.ca92  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.ca94  c9 98      cmp #$98         	CMP	#$98			; compare with exponent = 2^24
+.ca96  b0 20      bcs $cab8        	BCS	LAB_BHER		; branch if n>=2^24 (is too big)
+.ca98  20 50 d7   jsr $d750        	JSR	LAB_2831		; convert FAC1 floating-to-fixed
+.ca9b  a2 02      ldx #$02         	LDX	#$02			; 3 bytes to do
+.ca9d                              lab_cfac
+.ca9d  b5 ad      lda $ad,x        	LDA	FAC1_1,X		; get byte from FAC1
+.ca9f  95 11      sta $11,x        	STA	nums_1,X		; save byte to temp
+.caa1  ca         dex              	DEX				; decrement index
+.caa2  10 f9      bpl $ca9d        	BPL	LAB_CFAC		; copy FAC1 mantissa to temp
+.caa4  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; get next BASIC byte
+.caa7  a2 00      ldx #$00         	LDX	#$00			; set default to no leading "0"s
+.caa9  c9 29      cmp #$29         	CMP	#")"			; compare with close bracket
+.caab  f0 0a      beq $cab7        	BEQ	LAB_1C54		; if ")" go do rest of function
+.caad  20 de d2   jsr $d2de        	JSR	LAB_SCGB		; scan for "," and get byte
+.cab0  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; get last byte back
+.cab3  c9 29      cmp #$29         	CMP	#")"			; is next character )
+.cab5  d0 01      bne $cab8        	BNE	LAB_BHER		; if not ")" go do error
+.cab7                              lab_1c54
+.cab7  60         rts              	RTS				; else do function
+.cab8                              lab_bher
+.cab8  4c 29 cd   jmp $cd29        	JMP	LAB_FCER		; do function call error then warm start
+.cabb                              lab_eor
+.cabb  20 e2 ca   jsr $cae2        	JSR	GetFirst		; get first integer expression (no sign check)
+.cabe  45 5b      eor $5b          	EOR	XOAw_l		; EOR with expression 1 low byte
+.cac0  a8         tay              	TAY				; save in Y
+.cac1  a5 ae      lda $ae          	LDA	FAC1_2		; get FAC1 mantissa2
+.cac3  45 5c      eor $5c          	EOR	XOAw_h		; EOR with expression 1 high byte
+.cac5  4c 59 ce   jmp $ce59        	JMP	LAB_AYFC		; save and convert integer AY to FAC1 and return
+.cac8                              lab_or
+.cac8  20 e2 ca   jsr $cae2        	JSR	GetFirst		; get first integer expression (no sign check)
+.cacb  05 5b      ora $5b          	ORA	XOAw_l		; OR with expression 1 low byte
+.cacd  a8         tay              	TAY				; save in Y
+.cace  a5 ae      lda $ae          	LDA	FAC1_2		; get FAC1 mantissa2
+.cad0  05 5c      ora $5c          	ORA	XOAw_h		; OR with expression 1 high byte
+.cad2  4c 59 ce   jmp $ce59        	JMP	LAB_AYFC		; save and convert integer AY to FAC1 and return
+.cad5                              lab_and
+.cad5  20 e2 ca   jsr $cae2        	JSR	GetFirst		; get first integer expression (no sign check)
+.cad8  25 5b      and $5b          	AND	XOAw_l		; AND with expression 1 low byte
+.cada  a8         tay              	TAY				; save in Y
+.cadb  a5 ae      lda $ae          	LDA	FAC1_2		; get FAC1 mantissa2
+.cadd  25 5c      and $5c          	AND	XOAw_h		; AND with expression 1 high byte
+.cadf  4c 59 ce   jmp $ce59        	JMP	LAB_AYFC		; save and convert integer AY to FAC1 and return
+.cae2                              getfirst
+.cae2  20 a6 cc   jsr $cca6        	JSR	LAB_EVIR		; evaluate integer expression (no sign check)
+.cae5  a5 ae      lda $ae          	LDA	FAC1_2		; get FAC1 mantissa2
+.cae7  85 5c      sta $5c          	STA	XOAw_h		; save it
+.cae9  a5 af      lda $af          	LDA	FAC1_3		; get FAC1 mantissa3
+.caeb  85 5b      sta $5b          	STA	XOAw_l		; save it
+.caed  20 c3 d3   jsr $d3c3        	JSR	LAB_279B		; copy FAC2 to FAC1 (get 2nd value in expression)
+.caf0  20 a6 cc   jsr $cca6        	JSR	LAB_EVIR		; evaluate integer expression (no sign check)
+.caf3  a5 af      lda $af          	LDA	FAC1_3		; get FAC1 mantissa3
+.caf5                              lab_1c95
+.caf5  60         rts              	RTS
+.caf6                              lab_lthan
+.caf6  20 d3 c8   jsr $c8d3        	JSR	LAB_CKTM		; type match check, set C for string
+.caf9  b0 13      bcs $cb0e        	BCS	LAB_1CAE		; branch if string
+.cafb  a5 b7      lda $b7          	LDA	FAC2_s		; get FAC2 sign (b7)
+.cafd  09 7f      ora #$7f         	ORA	#$7F			; set all non sign bits
+.caff  25 b4      and $b4          	AND	FAC2_1		; and FAC2 mantissa1 (AND in sign bit)
+.cb01  85 b4      sta $b4          	STA	FAC2_1		; save FAC2 mantissa1
+.cb03  a9 b3      lda #$b3         	LDA	#<FAC2_e		; set pointer low byte to FAC2
+.cb05  a0 00      ldy #$00         	LDY	#>FAC2_e		; set pointer high byte to FAC2
+.cb07  20 17 d7   jsr $d717        	JSR	LAB_27F8		; compare FAC1 with FAC2 (AY)
+.cb0a  aa         tax              	TAX				; copy result
+.cb0b  4c 3f cb   jmp $cb3f        	JMP	LAB_1CE1		; go evaluate result
+.cb0e                              lab_1cae
+.cb0e  46 5f      lsr $5f          	LSR	Dtypef		; clear data type flag, $FF=string, $00=numeric
+.cb10  c6 9b      dec $9b          	DEC	comp_f		; clear < bit in compare function flag
+.cb12  20 3e d1   jsr $d13e        	JSR	LAB_22B6		; pop string off descriptor stack, or from top of string
+.cb15  85 ac      sta $ac          	STA	str_ln		; save length
+.cb17  86 ad      stx $ad          	STX	str_pl		; save string pointer low byte
+.cb19  84 ae      sty $ae          	STY	str_ph		; save string pointer high byte
+.cb1b  a5 b5      lda $b5          	LDA	FAC2_2		; get descriptor pointer low byte
+.cb1d  a4 b6      ldy $b6          	LDY	FAC2_3		; get descriptor pointer high byte
+.cb1f  20 42 d1   jsr $d142        	JSR	LAB_22BA		; pop (YA) descriptor off stack or from top of string space
+.cb22  86 b5      stx $b5          	STX	FAC2_2		; save string pointer low byte
+.cb24  84 b6      sty $b6          	STY	FAC2_3		; save string pointer high byte
+.cb26  aa         tax              	TAX				; copy length
+.cb27  38         sec              	SEC				; set carry for subtract
+.cb28  e5 ac      sbc $ac          	SBC	str_ln		; subtract string 1 length
+.cb2a  f0 08      beq $cb34        	BEQ	LAB_1CD6		; branch if str 1 length = string 2 length
+.cb2c  a9 01      lda #$01         	LDA	#$01			; set str 1 length > string 2 length
+.cb2e  90 04      bcc $cb34        	BCC	LAB_1CD6		; branch if so
+.cb30  a6 ac      ldx $ac          	LDX	str_ln		; get string 1 length
+.cb32  a9 ff      lda #$ff         	LDA	#$FF			; set str 1 length < string 2 length
+.cb34                              lab_1cd6
+.cb34  85 b0      sta $b0          	STA	FAC1_s		; save length compare
+.cb36  a0 ff      ldy #$ff         	LDY	#$FF			; set index
+.cb38  e8         inx              	INX				; adjust for loop
+.cb39                              lab_1cdb
+.cb39  c8         iny              	INY				; increment index
+.cb3a  ca         dex              	DEX				; decrement count
+.cb3b  d0 07      bne $cb44        	BNE	LAB_1CE6		; branch if still bytes to do
+.cb3d  a6 b0      ldx $b0          	LDX	FAC1_s		; get length compare back
+.cb3f                              lab_1ce1
+.cb3f  30 0f      bmi $cb50        	BMI	LAB_1CF2		; branch if str 1 < str 2
+.cb41  18         clc              	CLC				; flag str 1 <= str 2
+.cb42  90 0c      bcc $cb50        	BCC	LAB_1CF2		; go evaluate result
+.cb44                              lab_1ce6
+.cb44  b1 b5      lda ($b5),y      	LDA	(FAC2_2),Y		; get string 2 byte
+.cb46  d1 ad      cmp ($ad),y      	CMP	(FAC1_1),Y		; compare with string 1 byte
+.cb48  f0 ef      beq $cb39        	BEQ	LAB_1CDB		; loop if bytes =
+.cb4a  a2 ff      ldx #$ff         	LDX	#$FF			; set str 1 < string 2
+.cb4c  b0 02      bcs $cb50        	BCS	LAB_1CF2		; branch if so
+.cb4e  a2 01      ldx #$01         	LDX	#$01			;  set str 1 > string 2
+.cb50                              lab_1cf2
+.cb50  e8         inx              	INX				; x = 0, 1 or 2
+.cb51  8a         txa              	TXA				; copy to A
+.cb52  2a         rol              	ROL				; *2 (1, 2 or 4)
+.cb53  25 63      and $63          	AND	Cflag			; AND with comparison evaluation flag
+.cb55  f0 02      beq $cb59        	BEQ	LAB_1CFB		; branch if 0 (compare is false)
+.cb57  a9 ff      lda #$ff         	LDA	#$FF			; else set result true
+.cb59                              lab_1cfb
+.cb59  4c fa d6   jmp $d6fa        	JMP	LAB_27DB		; save A as integer byte and return
+.cb5c                              lab_1cfe
+.cb5c  20 fe c9   jsr $c9fe        	JSR	LAB_1C01		; scan for ",", else do syntax error then warm start
+.cb5f                              lab_dim
+.cb5f  aa         tax              	TAX				; copy "DIM" flag to X
+.cb60  20 af cb   jsr $cbaf        	JSR	LAB_1D10		; search for variable
+.cb63  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.cb66  d0 f4      bne $cb5c        	BNE	LAB_1CFE		; scan for "," and loop if not null
+.cb68  60         rts              	RTS
+.cb69                              lab_lshift
+.cb69  20 9f cb   jsr $cb9f        	JSR	GetPair		; get integer expression and byte (no sign check)
+.cb6c  a5 ae      lda $ae          	LDA	FAC1_2		; get expression high byte
+.cb6e  a6 78      ldx $78          	LDX	TempB			; get shift count
+.cb70  f0 22      beq $cb94        	BEQ	NoShift		; branch if zero
+.cb72  e0 10      cpx #$10         	CPX	#$10			; compare bit count with 16d
+.cb74  b0 23      bcs $cb99        	BCS	TooBig		; branch if >=
+.cb76                              ls_loop
+.cb76  06 af      asl $af          	ASL	FAC1_3		; shift low byte
+.cb78  2a         rol              	ROL				; shift high byte
+.cb79  ca         dex              	DEX				; decrement bit count
+.cb7a  d0 fa      bne $cb76        	BNE	Ls_loop		; loop if shift not complete
+.cb7c  a4 af      ldy $af          	LDY	FAC1_3		; get expression low byte
+.cb7e  4c 59 ce   jmp $ce59        	JMP	LAB_AYFC		; save and convert integer AY to FAC1 and return
+.cb81                              lab_rshift
+.cb81  20 9f cb   jsr $cb9f        	JSR	GetPair		; get integer expression and byte (no sign check)
+.cb84  a5 ae      lda $ae          	LDA	FAC1_2		; get expression high byte
+.cb86  a6 78      ldx $78          	LDX	TempB			; get shift count
+.cb88  f0 0a      beq $cb94        	BEQ	NoShift		; branch if zero
+.cb8a  e0 10      cpx #$10         	CPX	#$10			; compare bit count with 16d
+.cb8c  b0 0b      bcs $cb99        	BCS	TooBig		; branch if >=
+.cb8e                              rs_loop
+.cb8e  4a         lsr              	LSR				; shift high byte
+.cb8f  66 af      ror $af          	ROR	FAC1_3		; shift low byte
+.cb91  ca         dex              	DEX				; decrement bit count
+.cb92  d0 fa      bne $cb8e        	BNE	Rs_loop		; loop if shift not complete
+.cb94                              noshift
+.cb94  a4 af      ldy $af          	LDY	FAC1_3		; get expression low byte
+.cb96  4c 59 ce   jmp $ce59        	JMP	LAB_AYFC		; save and convert integer AY to FAC1 and return
+.cb99                              toobig
+.cb99  a9 00      lda #$00         	LDA	#$00			; clear high byte
+.cb9b  a8         tay              	TAY				; copy to low byte
+.cb9c  4c 59 ce   jmp $ce59        	JMP	LAB_AYFC		; save and convert integer AY to FAC1 and return
+.cb9f                              getpair
+.cb9f  20 8f d2   jsr $d28f        	JSR	LAB_EVBY		; evaluate byte expression, result in X
+.cba2  86 78      stx $78          	STX	TempB			; save it
+.cba4  20 c3 d3   jsr $d3c3        	JSR	LAB_279B		; copy FAC2 to FAC1 (get 2nd value in expression)
+.cba7  4c a6 cc   jmp $cca6        	JMP	LAB_EVIR		; evaluate integer expression (no sign check)
+.cbaa                              lab_gvar
+.cbaa  a2 00      ldx #$00         	LDX	#$00			; set DIM flag = $00
+.cbac  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory (1st character)
+.cbaf                              lab_1d10
+.cbaf  86 5e      stx $5e          	STX	Defdim		; save DIM flag
+.cbb1                              lab_1d12
+.cbb1  85 93      sta $93          	STA	Varnm1		; save 1st character
+.cbb3  29 7f      and #$7f         	AND	#$7F			; clear FN flag bit
+.cbb5  20 1e cc   jsr $cc1e        	JSR	LAB_CASC		; check byte, return C=0 if<"A" or >"Z"
+.cbb8  b0 03      bcs $cbbd        	BCS	LAB_1D1F		; branch if ok
+.cbba  4c 02 ca   jmp $ca02        	JMP	LAB_SNER		; else syntax error then warm start
+.cbbd                              lab_1d1f
+.cbbd  a2 00      ldx #$00         	LDX	#$00			; clear 2nd character temp
+.cbbf  86 5f      stx $5f          	STX	Dtypef		; clear data type flag, $FF=string, $00=numeric
+.cbc1  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory (2nd character)
+.cbc4  90 05      bcc $cbcb        	BCC	LAB_1D2D		; branch if character = "0"-"9" (ok)
+.cbc6  20 1e cc   jsr $cc1e        	JSR	LAB_CASC		; check byte, return C=0 if<"A" or >"Z"
+.cbc9  90 0b      bcc $cbd6        	BCC	LAB_1D38		; branch if <"A" or >"Z" (go check if string)
+.cbcb                              lab_1d2d
+.cbcb  aa         tax              	TAX				; copy 2nd character
+.cbcc                              lab_1d2e
+.cbcc  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory (3rd character)
+.cbcf  90 fb      bcc $cbcc        	BCC	LAB_1D2E		; loop if character = "0"-"9" (ignore)
+.cbd1  20 1e cc   jsr $cc1e        	JSR	LAB_CASC		; check byte, return C=0 if<"A" or >"Z"
+.cbd4  b0 f6      bcs $cbcc        	BCS	LAB_1D2E		; loop if character = "A"-"Z" (ignore)
+.cbd6                              lab_1d38
+.cbd6  c9 24      cmp #$24         	CMP	#"$"			; compare with "$"
+.cbd8  d0 0b      bne $cbe5        	BNE	LAB_1D47		; branch if not string
+.cbda  a9 ff      lda #$ff         	LDA	#$FF			; set data type = string
+.cbdc  85 5f      sta $5f          	STA	Dtypef		; set data type flag, $FF=string, $00=numeric
+.cbde  8a         txa              	TXA				; get 2nd character back
+.cbdf  09 80      ora #$80         	ORA	#$80			; set top bit (indicate string var)
+.cbe1  aa         tax              	TAX				; copy back to 2nd character temp
+.cbe2  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.cbe5                              lab_1d47
+.cbe5  86 94      stx $94          	STX	Varnm2		; save 2nd character
+.cbe7  05 61      ora $61          	ORA	Sufnxf		; or with subscript/FNX flag (or FN name)
+.cbe9  c9 28      cmp #$28         	CMP	#"("			; compare with "("
+.cbeb  d0 03      bne $cbf0        	BNE	LAB_1D53		; branch if not "("
+.cbed  4c b8 cc   jmp $ccb8        	JMP	LAB_1E17		; go find, or make, array
+.cbf0                              lab_1d53
+.cbf0  a9 00      lda #$00         	LDA	#$00			; clear A
+.cbf2  85 61      sta $61          	STA	Sufnxf		; clear subscript/FNX flag
+.cbf4  a5 7b      lda $7b          	LDA	Svarl			; get start of vars low byte
+.cbf6  a6 7c      ldx $7c          	LDX	Svarh			; get start of vars high byte
+.cbf8  a0 00      ldy #$00         	LDY	#$00			; clear index
+.cbfa                              lab_1d5d
+.cbfa  86 ab      stx $ab          	STX	Vrschh		; save search address high byte
+.cbfc                              lab_1d5f
+.cbfc  85 aa      sta $aa          	STA	Vrschl		; save search address low byte
+.cbfe  e4 7e      cpx $7e          	CPX	Sarryh		; compare high address with var space end
+.cc00  d0 04      bne $cc06        	BNE	LAB_1D69		; skip next compare if <>
+.cc02  c5 7d      cmp $7d          	CMP	Sarryl		; compare low address with var space end
+.cc04  f0 2c      beq $cc32        	BEQ	LAB_1D8B		; if not found go make new var
+.cc06                              lab_1d69
+.cc06  a5 93      lda $93          	LDA	Varnm1		; get 1st character of var to find
+.cc08  d1 aa      cmp ($aa),y      	CMP	(Vrschl),Y		; compare with variable name 1st character
+.cc0a  d0 08      bne $cc14        	BNE	LAB_1D77		; branch if no match
+.cc0c  a5 94      lda $94          	LDA	Varnm2		; get 2nd character of var to find
+.cc0e  c8         iny              	INY				; index to point to variable name 2nd character
+.cc0f  d1 aa      cmp ($aa),y      	CMP	(Vrschl),Y		; compare with variable name 2nd character
+.cc11  f0 69      beq $cc7c        	BEQ	LAB_1DD7		; branch if match (found var)
+.cc13  88         dey              	DEY				; else decrement index (now = $00)
+.cc14                              lab_1d77
+.cc14  18         clc              	CLC				; clear carry for add
+.cc15  a5 aa      lda $aa          	LDA	Vrschl		; get search address low byte
+.cc17  69 06      adc #$06         	ADC	#$06			; +6 (offset to next var name)
+.cc19  90 e1      bcc $cbfc        	BCC	LAB_1D5F		; loop if no overflow to high byte
+.cc1b  e8         inx              	INX				; else increment high byte
+.cc1c  d0 dc      bne $cbfa        	BNE	LAB_1D5D		; loop always (RAM doesn't extend to $FFFF !)
+.cc1e                              lab_casc
+.cc1e  c9 61      cmp #$61         	CMP	#"a"			; compare with "a"
+.cc20  b0 0a      bcs $cc2c        	BCS	LAB_1D83		; go check <"z"+1
+.cc22                              lab_1d82
+.cc22  c9 41      cmp #$41         	CMP	#"A"			; compare with "A"
+.cc24  90 05      bcc $cc2b        	BCC	LAB_1D8A		; exit if less
+.cc26  e9 5b      sbc #$5b         	SBC	#$5B			; subtract "Z"+1
+.cc28  38         sec              	SEC				; set carry
+.cc29  e9 a5      sbc #$a5         	SBC	#$A5			; subtract $A5 (restore byte)
+.cc2b                              lab_1d8a
+.cc2b  60         rts              	RTS
+.cc2c                              lab_1d83
+.cc2c  e9 7b      sbc #$7b         	SBC	#$7B			; subtract "z"+1
+.cc2e  38         sec              	SEC				; set carry
+.cc2f  e9 85      sbc #$85         	SBC	#$85			; subtract $85 (restore byte)
+.cc31  60         rts              	RTS
+.cc32                              lab_1d8b
+.cc32  68         pla              	PLA				; pop return address low byte
+.cc33  48         pha              	PHA				; push return address low byte
+.cc34  c9 3d      cmp #$3d         	CMP	#<LAB_1C18p2	; compare with expected calling routine return low byte
+.cc36  d0 05      bne $cc3d        	BNE	LAB_1D98		; if not get (var) go create new var
+.cc38  a9 e1      lda #$e1         	LDA	#<LAB_1D96		; low byte point to $00,$00
+.cc3a  a0 df      ldy #$df         	LDY	#>LAB_1D96		; high byte point to $00,$00
+.cc3c  60         rts              	RTS
+.cc3d                              lab_1d98
+.cc3d  a5 7d      lda $7d          	LDA	Sarryl		; get var mem end low byte
+.cc3f  a4 7e      ldy $7e          	LDY	Sarryh		; get var mem end high byte
+.cc41  85 aa      sta $aa          	STA	Ostrtl		; save old block start low byte
+.cc43  84 ab      sty $ab          	STY	Ostrth		; save old block start high byte
+.cc45  a5 7f      lda $7f          	LDA	Earryl		; get array mem end low byte
+.cc47  a4 80      ldy $80          	LDY	Earryh		; get array mem end high byte
+.cc49  85 a6      sta $a6          	STA	Obendl		; save old block end low byte
+.cc4b  84 a7      sty $a7          	STY	Obendh		; save old block end high byte
+.cc4d  18         clc              	CLC				; clear carry for add
+.cc4e  69 06      adc #$06         	ADC	#$06			; +6 (space for one var)
+.cc50  90 01      bcc $cc53        	BCC	LAB_1DAE		; branch if no overflow to high byte
+.cc52  c8         iny              	INY				; else increment high byte
+.cc53                              lab_1dae
+.cc53  85 a4      sta $a4          	STA	Nbendl		; set new block end low byte
+.cc55  84 a5      sty $a5          	STY	Nbendh		; set new block end high byte
+.cc57  20 c1 be   jsr $bec1        	JSR	LAB_11CF		; open up space in memory
+.cc5a  a5 a4      lda $a4          	LDA	Nbendl		; get new start low byte
+.cc5c  a4 a5      ldy $a5          	LDY	Nbendh		; get new start high byte (-$100)
+.cc5e  c8         iny              	INY				; correct high byte
+.cc5f  85 7d      sta $7d          	STA	Sarryl		; save new var mem end low byte
+.cc61  84 7e      sty $7e          	STY	Sarryh		; save new var mem end high byte
+.cc63  a0 00      ldy #$00         	LDY	#$00			; clear index
+.cc65  a5 93      lda $93          	LDA	Varnm1		; get var name 1st character
+.cc67  91 aa      sta ($aa),y      	STA	(Vrschl),Y		; save var name 1st character
+.cc69  c8         iny              	INY				; increment index
+.cc6a  a5 94      lda $94          	LDA	Varnm2		; get var name 2nd character
+.cc6c  91 aa      sta ($aa),y      	STA	(Vrschl),Y		; save var name 2nd character
+.cc6e  a9 00      lda #$00         	LDA	#$00			; clear A
+.cc70  c8         iny              	INY				; increment index
+.cc71  91 aa      sta ($aa),y      	STA	(Vrschl),Y		; initialise var byte
+.cc73  c8         iny              	INY				; increment index
+.cc74  91 aa      sta ($aa),y      	STA	(Vrschl),Y		; initialise var byte
+.cc76  c8         iny              	INY				; increment index
+.cc77  91 aa      sta ($aa),y      	STA	(Vrschl),Y		; initialise var byte
+.cc79  c8         iny              	INY				; increment index
+.cc7a  91 aa      sta ($aa),y      	STA	(Vrschl),Y		; initialise var byte
+.cc7c                              lab_1dd7
+.cc7c  a5 aa      lda $aa          	LDA	Vrschl		; get var address low byte
+.cc7e  18         clc              	CLC				; clear carry for add
+.cc7f  69 02      adc #$02         	ADC	#$02			; +2 (offset past var name bytes)
+.cc81  a4 ab      ldy $ab          	LDY	Vrschh		; get var address high byte
+.cc83  90 01      bcc $cc86        	BCC	LAB_1DE1		; branch if no overflow from add
+.cc85  c8         iny              	INY				; else increment high byte
+.cc86                              lab_1de1
+.cc86  85 95      sta $95          	STA	Cvaral		; save current var address low byte
+.cc88  84 96      sty $96          	STY	Cvarah		; save current var address high byte
+.cc8a  60         rts              	RTS
+.cc8b                              lab_1de6
+.cc8b  a5 5d      lda $5d          	LDA	Dimcnt		; get # of dimensions (1, 2 or 3)
+.cc8d  0a         asl              	ASL				; *2 (also clears the carry !)
+.cc8e  69 05      adc #$05         	ADC	#$05			; +5 (result is 7, 9 or 11 here)
+.cc90  65 aa      adc $aa          	ADC	Astrtl		; add array start pointer low byte
+.cc92  a4 ab      ldy $ab          	LDY	Astrth		; get array pointer high byte
+.cc94  90 01      bcc $cc97        	BCC	LAB_1DF2		; branch if no overflow
+.cc96  c8         iny              	INY				; else increment high byte
+.cc97                              lab_1df2
+.cc97  85 a4      sta $a4          	STA	Adatal		; save array data pointer low byte
+.cc99  84 a5      sty $a5          	STY	Adatah		; save array data pointer high byte
+.cc9b  60         rts              	RTS
+.cc9c                              lab_evin
+.cc9c  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.cc9f  20 cd c8   jsr $c8cd        	JSR	LAB_EVNM		; evaluate expression and check is numeric,
+.cca2                              lab_evpi
+.cca2  a5 b0      lda $b0          	LDA	FAC1_s		; get FAC1 sign (b7)
+.cca4  30 0d      bmi $ccb3        	BMI	LAB_1E12		; do function call error if -ve
+.cca6                              lab_evir
+.cca6  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.cca8  c9 90      cmp #$90         	CMP	#$90			; compare with exponent = 2^16 (n>2^15)
+.ccaa  90 09      bcc $ccb5        	BCC	LAB_1E14		; branch if n<2^16 (is ok)
+.ccac  a9 e8      lda #$e8         	LDA	#<LAB_1DF7		; set pointer low byte to -32768
+.ccae  a0 df      ldy #$df         	LDY	#>LAB_1DF7		; set pointer high byte to -32768
+.ccb0  20 17 d7   jsr $d717        	JSR	LAB_27F8		; compare FAC1 with (AY)
+.ccb3                              lab_1e12
+.ccb3  d0 74      bne $cd29        	BNE	LAB_FCER		; if <> do function call error then warm start
+.ccb5                              lab_1e14
+.ccb5  4c 50 d7   jmp $d750        	JMP	LAB_2831		; convert FAC1 floating-to-fixed and return
+.ccb8                              lab_1e17
+.ccb8  a5 5e      lda $5e          	LDA	Defdim		; get DIM flag
+.ccba  48         pha              	PHA				; push it
+.ccbb  a5 5f      lda $5f          	LDA	Dtypef		; get data type flag, $FF=string, $00=numeric
+.ccbd  48         pha              	PHA				; push it
+.ccbe  a0 00      ldy #$00         	LDY	#$00			; clear dimensions count
+.ccc0                              lab_1e1f
+.ccc0  98         tya              	TYA				; copy dimensions count
+.ccc1  48         pha              	PHA				; save it
+.ccc2  a5 94      lda $94          	LDA	Varnm2		; get array name 2nd byte
+.ccc4  48         pha              	PHA				; save it
+.ccc5  a5 93      lda $93          	LDA	Varnm1		; get array name 1st byte
+.ccc7  48         pha              	PHA				; save it
+.ccc8  20 9c cc   jsr $cc9c        	JSR	LAB_EVIN		; evaluate integer expression
+.cccb  68         pla              	PLA				; pull array name 1st byte
+.cccc  85 93      sta $93          	STA	Varnm1		; restore array name 1st byte
+.ccce  68         pla              	PLA				; pull array name 2nd byte
+.cccf  85 94      sta $94          	STA	Varnm2		; restore array name 2nd byte
+.ccd1  68         pla              	PLA				; pull dimensions count
+.ccd2  a8         tay              	TAY				; restore it
+.ccd3  ba         tsx              	TSX				; copy stack pointer
+.ccd4  bd 02 01   lda $0102,x      	LDA	LAB_STAK+2,X	; get DIM flag
+.ccd7  48         pha              	PHA				; push it
+.ccd8  bd 01 01   lda $0101,x      	LDA	LAB_STAK+1,X	; get data type flag
+.ccdb  48         pha              	PHA				; push it
+.ccdc  a5 ae      lda $ae          	LDA	FAC1_2		; get this dimension size high byte
+.ccde  9d 02 01   sta $0102,x      	STA	LAB_STAK+2,X	; stack before flag bytes
+.cce1  a5 af      lda $af          	LDA	FAC1_3		; get this dimension size low byte
+.cce3  9d 01 01   sta $0101,x      	STA	LAB_STAK+1,X	; stack before flag bytes
+.cce6  c8         iny              	INY				; increment dimensions count
+.cce7  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.ccea  c9 2c      cmp #$2c         	CMP	#","			; compare with ","
+.ccec  f0 d2      beq $ccc0        	BEQ	LAB_1E1F		; if found go do next dimension
+.ccee  84 5d      sty $5d          	STY	Dimcnt		; store dimensions count
+.ccf0  20 ef c9   jsr $c9ef        	JSR	LAB_1BFB		; scan for ")" , else do syntax error then warm start
+.ccf3  68         pla              	PLA				; pull data type flag
+.ccf4  85 5f      sta $5f          	STA	Dtypef		; restore data type flag, $FF=string, $00=numeric
+.ccf6  68         pla              	PLA				; pull DIM flag
+.ccf7  85 5e      sta $5e          	STA	Defdim		; restore DIM flag
+.ccf9  a6 7d      ldx $7d          	LDX	Sarryl		; get array mem start low byte
+.ccfb  a5 7e      lda $7e          	LDA	Sarryh		; get array mem start high byte
+.ccfd                              lab_1e5c
+.ccfd  86 aa      stx $aa          	STX	Astrtl		; save as array start pointer low byte
+.ccff  85 ab      sta $ab          	STA	Astrth		; save as array start pointer high byte
+.cd01  c5 80      cmp $80          	CMP	Earryh		; compare with array mem end high byte
+.cd03  d0 04      bne $cd09        	BNE	LAB_1E68		; branch if not reached array mem end
+.cd05  e4 7f      cpx $7f          	CPX	Earryl		; else compare with array mem end low byte
+.cd07  f0 39      beq $cd42        	BEQ	LAB_1EA1		; go build array if not found
+.cd09                              lab_1e68
+.cd09  a0 00      ldy #$00         	LDY	#$00			; clear index
+.cd0b  b1 aa      lda ($aa),y      	LDA	(Astrtl),Y		; get array name first byte
+.cd0d  c8         iny              	INY				; increment index to second name byte
+.cd0e  c5 93      cmp $93          	CMP	Varnm1		; compare with this array name first byte
+.cd10  d0 06      bne $cd18        	BNE	LAB_1E77		; branch if no match
+.cd12  a5 94      lda $94          	LDA	Varnm2		; else get this array name second byte
+.cd14  d1 aa      cmp ($aa),y      	CMP	(Astrtl),Y		; compare with array name second byte
+.cd16  f0 16      beq $cd2e        	BEQ	LAB_1E8D		; array found so branch
+.cd18                              lab_1e77
+.cd18  c8         iny              	INY				; increment index
+.cd19  b1 aa      lda ($aa),y      	LDA	(Astrtl),Y		; get array size low byte
+.cd1b  18         clc              	CLC				; clear carry for add
+.cd1c  65 aa      adc $aa          	ADC	Astrtl		; add array start pointer low byte
+.cd1e  aa         tax              	TAX				; copy low byte to X
+.cd1f  c8         iny              	INY				; increment index
+.cd20  b1 aa      lda ($aa),y      	LDA	(Astrtl),Y		; get array size high byte
+.cd22  65 ab      adc $ab          	ADC	Astrth		; add array mem pointer high byte
+.cd24  90 d7      bcc $ccfd        	BCC	LAB_1E5C		; if no overflow go check next array
+.cd26                              lab_1e85
+.cd26  a2 10      ldx #$10         	LDX	#$10			; error code $10 ("Array bounds" error)
+
+>cd28  2c                          	.byte	$2C			; makes next bit BIT LAB_08A2
+.cd29                              lab_fcer
+
+.cd29  a2 08      ldx #$08         	LDX	#$08			; error code $08 ("Function call" error)
+.cd2b                              lab_1e8a
+.cd2b  4c 3c bf   jmp $bf3c        	JMP	LAB_XERR		; do error #X, then warm start
+.cd2e                              lab_1e8d
+.cd2e  a2 12      ldx #$12         	LDX	#$12			; set error $12 ("Double dimension" error)
+.cd30  a5 5e      lda $5e          	LDA	Defdim		; get DIM flag
+.cd32  d0 f7      bne $cd2b        	BNE	LAB_1E8A		; if we are trying to dimension it do error #X, then warm
+.cd34  20 8b cc   jsr $cc8b        	JSR	LAB_1DE6		; set-up array pointer (Adatal/h) to first element in array
+.cd37  a5 5d      lda $5d          	LDA	Dimcnt		; get dimensions count
+.cd39  a0 04      ldy #$04         	LDY	#$04			; set index to array's # of dimensions
+.cd3b  d1 aa      cmp ($aa),y      	CMP	(Astrtl),Y		; compare with no of dimensions
+.cd3d  d0 e7      bne $cd26        	BNE	LAB_1E85		; if wrong do array bounds error, could do "Wrong
+.cd3f  4c c5 cd   jmp $cdc5        	JMP	LAB_1F28		; found array so go get element
+.cd42                              lab_1ea1
+.cd42  20 8b cc   jsr $cc8b        	JSR	LAB_1DE6		; set-up array pointer (Adatal/h) to first element in array
+.cd45  20 0b bf   jsr $bf0b        	JSR	LAB_121F		; check available memory, "Out of memory" error if no room
+.cd48  a0 00      ldy #$00         	LDY	#$00			; clear Y (don't need to clear A)
+.cd4a  84 bb      sty $bb          	STY	Aspth			; clear array data size high byte
+.cd4c  a5 93      lda $93          	LDA	Varnm1		; get variable name 1st byte
+.cd4e  91 aa      sta ($aa),y      	STA	(Astrtl),Y		; save array name 1st byte
+.cd50  c8         iny              	INY				; increment index
+.cd51  a5 94      lda $94          	LDA	Varnm2		; get variable name 2nd byte
+.cd53  91 aa      sta ($aa),y      	STA	(Astrtl),Y		; save array name 2nd byte
+.cd55  a5 5d      lda $5d          	LDA	Dimcnt		; get dimensions count
+.cd57  a0 04      ldy #$04         	LDY	#$04			; index to dimension count
+.cd59  84 ba      sty $ba          	STY	Asptl			; set array data size low byte (four bytes per element)
+.cd5b  91 aa      sta ($aa),y      	STA	(Astrtl),Y		; set array's dimensions count
+.cd5d  18         clc              	CLC				; clear carry for add (clear on subsequent loops)
+.cd5e                              lab_1ec0
+.cd5e  a2 0b      ldx #$0b         	LDX	#$0B			; set default dimension value low byte
+.cd60  a9 00      lda #$00         	LDA	#$00			; set default dimension value high byte
+.cd62  24 5e      bit $5e          	BIT	Defdim		; test default DIM flag
+.cd64  50 07      bvc $cd6d        	BVC	LAB_1ED0		; branch if b6 of Defdim is clear
+.cd66  68         pla              	PLA				; else pull dimension value low byte
+.cd67  69 01      adc #$01         	ADC	#$01			; +1 (allow for zeroeth element)
+.cd69  aa         tax              	TAX				; copy low byte to X
+.cd6a  68         pla              	PLA				; pull dimension value high byte
+.cd6b  69 00      adc #$00         	ADC	#$00			; add carry from low byte
+.cd6d                              lab_1ed0
+.cd6d  c8         iny              	INY				; index to dimension value high byte
+.cd6e  91 aa      sta ($aa),y      	STA	(Astrtl),Y		; save dimension value high byte
+.cd70  c8         iny              	INY				; index to dimension value high byte
+.cd71  8a         txa              	TXA				; get dimension value low byte
+.cd72  91 aa      sta ($aa),y      	STA	(Astrtl),Y		; save dimension value low byte
+.cd74  20 14 ce   jsr $ce14        	JSR	LAB_1F7C		; does XY = (Astrtl),Y * (Asptl)
+.cd77  86 ba      stx $ba          	STX	Asptl			; save array data size low byte
+.cd79  85 bb      sta $bb          	STA	Aspth			; save array data size high byte
+.cd7b  a4 71      ldy $71          	LDY	ut1_pl		; restore index (saved by subroutine)
+.cd7d  c6 5d      dec $5d          	DEC	Dimcnt		; decrement dimensions count
+.cd7f  d0 dd      bne $cd5e        	BNE	LAB_1EC0		; loop while not = 0
+.cd81  65 a5      adc $a5          	ADC	Adatah		; add size high byte to first element high byte
+.cd83  b0 5d      bcs $cde2        	BCS	LAB_1F45		; if overflow go do "Out of memory" error
+.cd85  85 a5      sta $a5          	STA	Adatah		; save end of array high byte
+.cd87  a8         tay              	TAY				; copy end high byte to Y
+.cd88  8a         txa              	TXA				; get array size low byte
+.cd89  65 a4      adc $a4          	ADC	Adatal		; add array start low byte
+.cd8b  90 03      bcc $cd90        	BCC	LAB_1EF3		; branch if no carry
+.cd8d  c8         iny              	INY				; else increment end of array high byte
+.cd8e  f0 52      beq $cde2        	BEQ	LAB_1F45		; if overflow go do "Out of memory" error
+.cd90                              lab_1ef3
+.cd90  20 0b bf   jsr $bf0b        	JSR	LAB_121F		; check available memory, "Out of memory" error if no room
+.cd93  85 7f      sta $7f          	STA	Earryl		; save array mem end low byte
+.cd95  84 80      sty $80          	STY	Earryh		; save array mem end high byte
+.cd97  a9 00      lda #$00         	LDA	#$00			; clear byte for array clear
+.cd99  e6 bb      inc $bb          	INC	Aspth			; increment array size high byte (now block count)
+.cd9b  a4 ba      ldy $ba          	LDY	Asptl			; get array size low byte (now index to block)
+.cd9d  f0 05      beq $cda4        	BEQ	LAB_1F07		; branch if low byte = $00
+.cd9f                              lab_1f02
+.cd9f  88         dey              	DEY				; decrement index (do 0 to n-1)
+.cda0  91 a4      sta ($a4),y      	STA	(Adatal),Y		; zero byte
+.cda2  d0 fb      bne $cd9f        	BNE	LAB_1F02		; loop until this block done
+.cda4                              lab_1f07
+.cda4  c6 a5      dec $a5          	DEC	Adatah		; decrement array pointer high byte
+.cda6  c6 bb      dec $bb          	DEC	Aspth			; decrement block count high byte
+.cda8  d0 f5      bne $cd9f        	BNE	LAB_1F02		; loop until all blocks done
+.cdaa  e6 a5      inc $a5          	INC	Adatah		; correct for last loop
+.cdac  38         sec              	SEC				; set carry for subtract
+.cdad  a0 02      ldy #$02         	LDY	#$02			; index to array size low byte
+.cdaf  a5 7f      lda $7f          	LDA	Earryl		; get array mem end low byte
+.cdb1  e5 aa      sbc $aa          	SBC	Astrtl		; subtract array start low byte
+.cdb3  91 aa      sta ($aa),y      	STA	(Astrtl),Y		; save array size low byte
+.cdb5  c8         iny              	INY				; index to array size high byte
+.cdb6  a5 80      lda $80          	LDA	Earryh		; get array mem end high byte
+.cdb8  e5 ab      sbc $ab          	SBC	Astrth		; subtract array start high byte
+.cdba  91 aa      sta ($aa),y      	STA	(Astrtl),Y		; save array size high byte
+.cdbc  a5 5e      lda $5e          	LDA	Defdim		; get default DIM flag
+.cdbe  d0 53      bne $ce13        	BNE	LAB_1F7B		; exit (RET) if this was a DIM command
+.cdc0  c8         iny              	INY				; index to # of dimensions
+.cdc1                              lab_1f24
+.cdc1  b1 aa      lda ($aa),y      	LDA	(Astrtl),Y		; get array's dimension count
+.cdc3  85 5d      sta $5d          	STA	Dimcnt		; save it
+.cdc5                              lab_1f28
+.cdc5  a9 00      lda #$00         	LDA	#$00			; clear byte
+.cdc7  85 ba      sta $ba          	STA	Asptl			; clear array data pointer low byte
+.cdc9                              lab_1f2c
+.cdc9  85 bb      sta $bb          	STA	Aspth			; save array data pointer high byte
+.cdcb  c8         iny              	INY				; increment index (point to array bound high byte)
+.cdcc  68         pla              	PLA				; pull array index low byte
+.cdcd  aa         tax              	TAX				; copy to X
+.cdce  85 ae      sta $ae          	STA	FAC1_2		; save index low byte to FAC1 mantissa2
+.cdd0  68         pla              	PLA				; pull array index high byte
+.cdd1  85 af      sta $af          	STA	FAC1_3		; save index high byte to FAC1 mantissa3
+.cdd3  d1 aa      cmp ($aa),y      	CMP	(Astrtl),Y		; compare with array bound high byte
+.cdd5  90 0e      bcc $cde5        	BCC	LAB_1F48		; branch if within bounds
+.cdd7  d0 06      bne $cddf        	BNE	LAB_1F42		; if outside bounds do array bounds error
+.cdd9  c8         iny              	INY				; index to array bound low byte
+.cdda  8a         txa              	TXA				; get array index low byte
+.cddb  d1 aa      cmp ($aa),y      	CMP	(Astrtl),Y		; compare with array bound low byte
+.cddd  90 07      bcc $cde6        	BCC	LAB_1F49		; branch if within bounds
+.cddf                              lab_1f42
+.cddf  4c 26 cd   jmp $cd26        	JMP	LAB_1E85		; else do array bounds error
+.cde2                              lab_1f45
+.cde2  4c 3a bf   jmp $bf3a        	JMP	LAB_OMER		; do "Out of memory" error then warm start
+.cde5                              lab_1f48
+.cde5  c8         iny              	INY				; index to array bound low byte
+.cde6                              lab_1f49
+.cde6  a5 bb      lda $bb          	LDA	Aspth			; get array data pointer high byte
+.cde8  05 ba      ora $ba          	ORA	Asptl			; OR with array data pointer low byte
+.cdea  f0 0a      beq $cdf6        	BEQ	LAB_1F5A		; branch if array data pointer = null (skip multiply)
+.cdec  20 14 ce   jsr $ce14        	JSR	LAB_1F7C		; does XY = (Astrtl),Y * (Asptl)
+.cdef  8a         txa              	TXA				; get result low byte
+.cdf0  65 ae      adc $ae          	ADC	FAC1_2		; add index low byte from FAC1 mantissa2
+.cdf2  aa         tax              	TAX				; save result low byte
+.cdf3  98         tya              	TYA				; get result high byte
+.cdf4  a4 71      ldy $71          	LDY	ut1_pl		; restore index
+.cdf6                              lab_1f5a
+.cdf6  65 af      adc $af          	ADC	FAC1_3		; add index high byte from FAC1 mantissa3
+.cdf8  86 ba      stx $ba          	STX	Asptl			; save array data pointer low byte
+.cdfa  c6 5d      dec $5d          	DEC	Dimcnt		; decrement dimensions count
+.cdfc  d0 cb      bne $cdc9        	BNE	LAB_1F2C		; loop if dimensions still to do
+.cdfe  06 ba      asl $ba          	ASL	Asptl			; array data pointer low byte * 2
+.ce00  2a         rol              	ROL				; array data pointer high byte * 2
+.ce01  06 ba      asl $ba          	ASL	Asptl			; array data pointer low byte * 4
+.ce03  2a         rol              	ROL				; array data pointer high byte * 4
+.ce04  a8         tay              	TAY				; copy high byte
+.ce05  a5 ba      lda $ba          	LDA	Asptl			; get low byte
+.ce07  65 a4      adc $a4          	ADC	Adatal		; add array data start pointer low byte
+.ce09  85 95      sta $95          	STA	Cvaral		; save as current var address low byte
+.ce0b  98         tya              	TYA				; get high byte back
+.ce0c  65 a5      adc $a5          	ADC	Adatah		; add array data start pointer high byte
+.ce0e  85 96      sta $96          	STA	Cvarah		; save as current var address high byte
+.ce10  a8         tay              	TAY				; copy high byte to Y
+.ce11  a5 95      lda $95          	LDA	Cvaral		; get current var address low byte
+.ce13                              lab_1f7b
+.ce13  60         rts              	RTS
+.ce14                              lab_1f7c
+.ce14  84 71      sty $71          	STY	ut1_pl		; save index
+.ce16  b1 aa      lda ($aa),y      	LDA	(Astrtl),Y		; get dimension size low byte
+.ce18  85 76      sta $76          	STA	dims_l		; save dimension size low byte
+.ce1a  88         dey              	DEY				; decrement index
+.ce1b  b1 aa      lda ($aa),y      	LDA	(Astrtl),Y		; get dimension size high byte
+.ce1d  85 77      sta $77          	STA	dims_h		; save dimension size high byte
+.ce1f  a9 10      lda #$10         	LDA	#$10			; count = $10 (16 bit multiply)
+.ce21  85 a8      sta $a8          	STA	numbit		; save bit count
+.ce23  a2 00      ldx #$00         	LDX	#$00			; clear result low byte
+.ce25  a0 00      ldy #$00         	LDY	#$00			; clear result high byte
+.ce27                              lab_1f8f
+.ce27  8a         txa              	TXA				; get result low byte
+.ce28  0a         asl              	ASL				; *2
+.ce29  aa         tax              	TAX				; save result low byte
+.ce2a  98         tya              	TYA				; get result high byte
+.ce2b  2a         rol              	ROL				; *2
+.ce2c  a8         tay              	TAY				; save result high byte
+.ce2d  b0 b3      bcs $cde2        	BCS	LAB_1F45		; if overflow go do "Out of memory" error
+.ce2f  06 ba      asl $ba          	ASL	Asptl			; shift multiplier low byte
+.ce31  26 bb      rol $bb          	ROL	Aspth			; shift multiplier high byte
+.ce33  90 0b      bcc $ce40        	BCC	LAB_1FA8		; skip add if no carry
+.ce35  18         clc              	CLC				; else clear carry for add
+.ce36  8a         txa              	TXA				; get result low byte
+.ce37  65 76      adc $76          	ADC	dims_l		; add dimension size low byte
+.ce39  aa         tax              	TAX				; save result low byte
+.ce3a  98         tya              	TYA				; get result high byte
+.ce3b  65 77      adc $77          	ADC	dims_h		; add dimension size high byte
+.ce3d  a8         tay              	TAY				; save result high byte
+.ce3e  b0 a2      bcs $cde2        	BCS	LAB_1F45		; if overflow go do "Out of memory" error
+.ce40                              lab_1fa8
+.ce40  c6 a8      dec $a8          	DEC	numbit		; decrement bit count
+.ce42  d0 e3      bne $ce27        	BNE	LAB_1F8F		; loop until all done
+.ce44  60         rts              	RTS
+.ce45                              lab_fre
+.ce45  a5 5f      lda $5f          	LDA	Dtypef		; get data type flag, $FF=string, $00=numeric
+.ce47  10 03      bpl $ce4c        	BPL	LAB_1FB4		; branch if numeric
+.ce49  20 3e d1   jsr $d13e        	JSR	LAB_22B6		; pop string off descriptor stack, or from top of string
+.ce4c                              lab_1fb4
+.ce4c  20 df cf   jsr $cfdf        	JSR	LAB_GARB		; go do garbage collection
+.ce4f  38         sec              	SEC				; set carry for subtract
+.ce50  a5 81      lda $81          	LDA	Sstorl		; get bottom of string space low byte
+.ce52  e5 7f      sbc $7f          	SBC	Earryl		; subtract array mem end low byte
+.ce54  a8         tay              	TAY				; copy result to Y
+.ce55  a5 82      lda $82          	LDA	Sstorh		; get bottom of string space high byte
+.ce57  e5 80      sbc $80          	SBC	Earryh		; subtract array mem end high byte
+.ce59                              lab_ayfc
+.ce59  46 5f      lsr $5f          	LSR	Dtypef		; clear data type flag, $FF=string, $00=numeric
+.ce5b  85 ad      sta $ad          	STA	FAC1_1		; save FAC1 mantissa1
+.ce5d  84 ae      sty $ae          	STY	FAC1_2		; save FAC1 mantissa2
+.ce5f  a2 90      ldx #$90         	LDX	#$90			; set exponent=2^16 (integer)
+.ce61  4c 02 d7   jmp $d702        	JMP	LAB_27E3		; set exp=X, clear FAC1_3, normalise and return
+.ce64                              lab_pos
+.ce64  a4 0e      ldy $0e          	LDY	TPos			; get terminal position
+.ce66                              lab_1fd0
+.ce66  a9 00      lda #$00         	LDA	#$00			; clear high byte
+.ce68  f0 ef      beq $ce59        	BEQ	LAB_AYFC		; always save and convert integer AY to FAC1 and return
+.ce6a                              lab_ckrn
+.ce6a  a6 88      ldx $88          	LDX	Clineh		; get current line high byte
+.ce6c  e8         inx              	INX				; increment it
+.ce6d  d0 a4      bne $ce13        	BNE	LAB_1F7B		; return if can continue not direct mode
+.ce6f                              lab_1fd9
+.ce6f  a2 16      ldx #$16         	LDX	#$16			; error code $16 ("Illegal direct" error)
+.ce71                              lab_1fdb
+.ce71  4c 3c bf   jmp $bf3c        	JMP	LAB_XERR		; go do error #X, then warm start
+.ce74                              lab_def
+.ce74  20 a5 ce   jsr $cea5        	JSR	LAB_200B		; check FNx syntax
+.ce77  85 9c      sta $9c          	STA	func_l		; save function pointer low byte
+.ce79  84 9d      sty $9d          	STY	func_h		; save function pointer high byte
+.ce7b  20 6a ce   jsr $ce6a        	JSR	LAB_CKRN		; check not Direct (back here if ok)
+.ce7e  20 fa c9   jsr $c9fa        	JSR	LAB_1BFE		; scan for "(" , else do syntax error then warm start
+.ce81  a9 80      lda #$80         	LDA	#$80			; set flag for FNx
+.ce83  85 61      sta $61          	STA	Sufnxf		; save subscript/FNx flag
+.ce85  20 aa cb   jsr $cbaa        	JSR	LAB_GVAR		; get (var) address
+.ce88  20 d0 c8   jsr $c8d0        	JSR	LAB_CTNM		; check if source is numeric, else do type mismatch
+.ce8b  20 ef c9   jsr $c9ef        	JSR	LAB_1BFB		; scan for ")" , else do syntax error then warm start
+.ce8e  a9 c2      lda #$c2         	LDA	#TK_EQUAL		; get = token
+.ce90  20 f1 c9   jsr $c9f1        	JSR	LAB_SCCA		; scan for CHR$(A), else do syntax error then warm start
+.ce93  a5 96      lda $96          	LDA	Cvarah		; get current var address high byte
+.ce95  48         pha              	PHA				; push it
+.ce96  a5 95      lda $95          	LDA	Cvaral		; get current var address low byte
+.ce98  48         pha              	PHA				; push it
+.ce99  a5 c4      lda $c4          	LDA	Bpntrh		; get BASIC execute pointer high byte
+.ce9b  48         pha              	PHA				; push it
+.ce9c  a5 c3      lda $c3          	LDA	Bpntrl		; get BASIC execute pointer low byte
+.ce9e  48         pha              	PHA				; push it
+.ce9f  20 8c c4   jsr $c48c        	JSR	LAB_DATA		; go perform DATA
+.cea2  4c 14 cf   jmp $cf14        	JMP	LAB_207A		; put execute pointer and variable pointer into function
+.cea5                              lab_200b
+.cea5  a9 af      lda #$af         	LDA	#TK_FN		; get FN" token
+.cea7  20 f1 c9   jsr $c9f1        	JSR	LAB_SCCA		; scan for CHR$(A) , else do syntax error then warm start
+.ceaa  09 80      ora #$80         	ORA	#$80			; set FN flag bit
+.ceac  85 61      sta $61          	STA	Sufnxf		; save FN flag so array variable test fails
+.ceae  20 b1 cb   jsr $cbb1        	JSR	LAB_1D12		; search for FN variable
+.ceb1  4c d0 c8   jmp $c8d0        	JMP	LAB_CTNM		; check if source is numeric and return, else do type
+.ceb4                              lab_201e
+.ceb4  20 a5 ce   jsr $cea5        	JSR	LAB_200B		; check FNx syntax
+.ceb7  48         pha              	PHA				; push function pointer low byte
+.ceb8  98         tya              	TYA				; copy function pointer high byte
+.ceb9  48         pha              	PHA				; push function pointer high byte
+.ceba  20 fa c9   jsr $c9fa        	JSR	LAB_1BFE		; scan for "(", else do syntax error then warm start
+.cebd  20 e1 c8   jsr $c8e1        	JSR	LAB_EVEX		; evaluate expression
+.cec0  20 ef c9   jsr $c9ef        	JSR	LAB_1BFB		; scan for ")", else do syntax error then warm start
+.cec3  20 d0 c8   jsr $c8d0        	JSR	LAB_CTNM		; check if source is numeric, else do type mismatch
+.cec6  68         pla              	PLA				; pop function pointer high byte
+.cec7  85 9d      sta $9d          	STA	func_h		; restore it
+.cec9  68         pla              	PLA				; pop function pointer low byte
+.ceca  85 9c      sta $9c          	STA	func_l		; restore it
+.cecc  a2 20      ldx #$20         	LDX	#$20			; error code $20 ("Undefined function" error)
+.cece  a0 03      ldy #$03         	LDY	#$03			; index to variable pointer high byte
+.ced0  b1 9c      lda ($9c),y      	LDA	(func_l),Y		; get variable pointer high byte
+.ced2  f0 9d      beq $ce71        	BEQ	LAB_1FDB		; if zero go do undefined function error
+.ced4  85 96      sta $96          	STA	Cvarah		; save variable address high byte
+.ced6  88         dey              	DEY				; index to variable address low byte
+.ced7  b1 9c      lda ($9c),y      	LDA	(func_l),Y		; get variable address low byte
+.ced9  85 95      sta $95          	STA	Cvaral		; save variable address low byte
+.cedb  aa         tax              	TAX				; copy address low byte
+.cedc  c8         iny              	INY				; index to mantissa_3
+.cedd                              lab_2043
+.cedd  b1 95      lda ($95),y      	LDA	(Cvaral),Y		; get byte from variable
+.cedf  48         pha              	PHA				; stack it
+.cee0  88         dey              	DEY				; decrement index
+.cee1  10 fa      bpl $cedd        	BPL	LAB_2043		; loop until variable stacked
+.cee3  a4 96      ldy $96          	LDY	Cvarah		; get variable address high byte
+.cee5  20 a7 d6   jsr $d6a7        	JSR	LAB_2778		; pack FAC1 (function expression value) into (XY)
+.cee8  a5 c4      lda $c4          	LDA	Bpntrh		; get BASIC execute pointer high byte
+.ceea  48         pha              	PHA				; push it
+.ceeb  a5 c3      lda $c3          	LDA	Bpntrl		; get BASIC execute pointer low byte
+.ceed  48         pha              	PHA				; push it
+.ceee  b1 9c      lda ($9c),y      	LDA	(func_l),Y		; get function execute pointer low byte
+.cef0  85 c3      sta $c3          	STA	Bpntrl		; save as BASIC execute pointer low byte
+.cef2  c8         iny              	INY				; index to high byte
+.cef3  b1 9c      lda ($9c),y      	LDA	(func_l),Y		; get function execute pointer high byte
+.cef5  85 c4      sta $c4          	STA	Bpntrh		; save as BASIC execute pointer high byte
+.cef7  a5 96      lda $96          	LDA	Cvarah		; get variable address high byte
+.cef9  48         pha              	PHA				; push it
+.cefa  a5 95      lda $95          	LDA	Cvaral		; get variable address low byte
+.cefc  48         pha              	PHA				; push it
+.cefd  20 cd c8   jsr $c8cd        	JSR	LAB_EVNM		; evaluate expression and check is numeric,
+.cf00  68         pla              	PLA				; pull variable address low byte
+.cf01  85 9c      sta $9c          	STA	func_l		; save variable address low byte
+.cf03  68         pla              	PLA				; pull variable address high byte
+.cf04  85 9d      sta $9d          	STA	func_h		; save variable address high byte
+.cf06  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.cf09  f0 03      beq $cf0e        	BEQ	LAB_2074		; branch if null (should be [EOL] marker)
+.cf0b  4c 02 ca   jmp $ca02        	JMP	LAB_SNER		; else syntax error then warm start
+.cf0e                              lab_2074
+.cf0e  68         pla              	PLA				; pull BASIC execute pointer low byte
+.cf0f  85 c3      sta $c3          	STA	Bpntrl		; restore BASIC execute pointer low byte
+.cf11  68         pla              	PLA				; pull BASIC execute pointer high byte
+.cf12  85 c4      sta $c4          	STA	Bpntrh		; restore BASIC execute pointer high byte
+.cf14                              lab_207a
+.cf14  a0 00      ldy #$00         	LDY	#$00			; clear index
+.cf16  68         pla              	PLA				; pull BASIC execute pointer low byte
+.cf17  91 9c      sta ($9c),y      	STA	(func_l),Y		; save to function
+.cf19  c8         iny              	INY				; increment index
+.cf1a  68         pla              	PLA				; pull BASIC execute pointer high byte
+.cf1b  91 9c      sta ($9c),y      	STA	(func_l),Y		; save to function
+.cf1d  c8         iny              	INY				; increment index
+.cf1e  68         pla              	PLA				; pull current var address low byte
+.cf1f  91 9c      sta ($9c),y      	STA	(func_l),Y		; save to function
+.cf21  c8         iny              	INY				; increment index
+.cf22  68         pla              	PLA				; pull current var address high byte
+.cf23  91 9c      sta ($9c),y      	STA	(func_l),Y		; save to function
+.cf25  60         rts              	RTS
+.cf26                              lab_strs
+.cf26  20 d0 c8   jsr $c8d0        	JSR	LAB_CTNM		; check if source is numeric, else do type mismatch
+.cf29  20 95 d8   jsr $d895        	JSR	LAB_296E		; convert FAC1 to string
+.cf2c  a9 f0      lda #$f0         	LDA	#<Decssp1		; set result string low pointer
+.cf2e  a0 00      ldy #$00         	LDY	#>Decssp1		; set result string high pointer
+.cf30  f0 12      beq $cf44        	BEQ	LAB_20AE		; print null terminated string to Sutill/Sutilh
+.cf32                              lab_209c
+.cf32  a6 ae      ldx $ae          	LDX	des_pl		; get descriptor pointer low byte
+.cf34  a4 af      ldy $af          	LDY	des_ph		; get descriptor pointer high byte
+.cf36  86 9e      stx $9e          	STX	des_2l		; save descriptor pointer low byte
+.cf38  84 9f      sty $9f          	STY	des_2h		; save descriptor pointer high byte
+.cf3a                              lab_mssp
+.cf3a  20 ad cf   jsr $cfad        	JSR	LAB_2115		; make space in string memory for string A long
+.cf3d  86 ad      stx $ad          	STX	str_pl		; save string pointer low byte
+.cf3f  84 ae      sty $ae          	STY	str_ph		; save string pointer high byte
+.cf41  85 ac      sta $ac          	STA	str_ln		; save length
+.cf43  60         rts              	RTS
+.cf44                              lab_20ae
+.cf44  a2 22      ldx #$22         	LDX	#$22			; set terminator to "
+.cf46  86 5b      stx $5b          	STX	Srchc			; set search character (terminator 1)
+.cf48  86 5c      stx $5c          	STX	Asrch			; set terminator 2
+.cf4a                              lab_20b4
+.cf4a  85 b8      sta $b8          	STA	ssptr_l		; store string start low byte
+.cf4c  84 b9      sty $b9          	STY	ssptr_h		; store string start high byte
+.cf4e  85 ad      sta $ad          	STA	str_pl		; save string pointer low byte
+.cf50  84 ae      sty $ae          	STY	str_ph		; save string pointer high byte
+.cf52  a0 ff      ldy #$ff         	LDY	#$FF			; set length to -1
+.cf54                              lab_20be
+.cf54  c8         iny              	INY				; increment length
+.cf55  b1 b8      lda ($b8),y      	LDA	(ssptr_l),Y		; get byte from string
+.cf57  f0 0c      beq $cf65        	BEQ	LAB_20CF		; exit loop if null byte [EOS]
+.cf59  c5 5b      cmp $5b          	CMP	Srchc			; compare with search character (terminator 1)
+.cf5b  f0 04      beq $cf61        	BEQ	LAB_20CB		; branch if terminator
+.cf5d  c5 5c      cmp $5c          	CMP	Asrch			; compare with terminator 2
+.cf5f  d0 f3      bne $cf54        	BNE	LAB_20BE		; loop if not terminator 2
+.cf61                              lab_20cb
+.cf61  c9 22      cmp #$22         	CMP	#$22			; compare with "
+.cf63  f0 01      beq $cf66        	BEQ	LAB_20D0		; branch if " (carry set if = !)
+.cf65                              lab_20cf
+.cf65  18         clc              	CLC				; clear carry for add (only if [EOL] terminated string)
+.cf66                              lab_20d0
+.cf66  84 ac      sty $ac          	STY	str_ln		; save length in FAC1 exponent
+.cf68  98         tya              	TYA				; copy length to A
+.cf69  65 b8      adc $b8          	ADC	ssptr_l		; add string start low byte
+.cf6b  85 ba      sta $ba          	STA	Sendl			; save string end low byte
+.cf6d  a6 b9      ldx $b9          	LDX	ssptr_h		; get string start high byte
+.cf6f  90 01      bcc $cf72        	BCC	LAB_20DC		; branch if no low byte overflow
+.cf71  e8         inx              	INX				; else increment high byte
+.cf72                              lab_20dc
+.cf72  86 bb      stx $bb          	STX	Sendh			; save string end high byte
+.cf74  a5 b9      lda $b9          	LDA	ssptr_h		; get string start high byte
+.cf76  c9 05      cmp #$05         	CMP	#>Ram_base		; compare with start of program memory
+.cf78  b0 0b      bcs $cf85        	BCS	LAB_RTST		; branch if not in utility area
+.cf7a  98         tya              	TYA				; copy length to A
+.cf7b  20 32 cf   jsr $cf32        	JSR	LAB_209C		; copy des_pl/h to des_2l/h and make string space A bytes
+.cf7e  a6 b8      ldx $b8          	LDX	ssptr_l		; get string start low byte
+.cf80  a4 b9      ldy $b9          	LDY	ssptr_h		; get string start high byte
+.cf82  20 1f d1   jsr $d11f        	JSR	LAB_2298		; store string A bytes long from XY to (Sutill)
+.cf85                              lab_rtst
+.cf85  a6 65      ldx $65          	LDX	next_s		; get string stack pointer
+.cf87  e0 71      cpx #$71         	CPX	#des_sk+$09		; compare with max+1
+.cf89  d0 05      bne $cf90        	BNE	LAB_20F8		; branch if space on string stack
+.cf8b  a2 1c      ldx #$1c         	LDX	#$1C			; error code $1C ("String too complex" error)
+.cf8d                              lab_20f5
+.cf8d  4c 3c bf   jmp $bf3c        	JMP	LAB_XERR		; do error #X, then warm start
+.cf90                              lab_20f8
+.cf90  a5 ac      lda $ac          	LDA	str_ln		; get string length
+.cf92  95 00      sta $00,x        	STA	PLUS_0,X		; put on string stack
+.cf94  a5 ad      lda $ad          	LDA	str_pl		; get string pointer low byte
+.cf96  95 01      sta $01,x        	STA	PLUS_1,X		; put on string stack
+.cf98  a5 ae      lda $ae          	LDA	str_ph		; get string pointer high byte
+.cf9a  95 02      sta $02,x        	STA	PLUS_2,X		; put on string stack
+.cf9c  a0 00      ldy #$00         	LDY	#$00			; clear Y
+.cf9e  86 ae      stx $ae          	STX	des_pl		; save string descriptor pointer low byte
+.cfa0  84 af      sty $af          	STY	des_ph		; save string descriptor pointer high byte (always $00)
+.cfa2  88         dey              	DEY				; Y = $FF
+.cfa3  84 5f      sty $5f          	STY	Dtypef		; save data type flag, $FF=string
+.cfa5  86 66      stx $66          	STX	last_sl		; save old stack pointer (current top item)
+.cfa7  e8         inx              	INX				; update stack pointer
+.cfa8  e8         inx              	INX				; update stack pointer
+.cfa9  e8         inx              	INX				; update stack pointer
+.cfaa  86 65      stx $65          	STX	next_s		; save new top item value
+.cfac  60         rts              	RTS
+.cfad                              lab_2115
+.cfad  46 60      lsr $60          	LSR	Gclctd		; clear garbage collected flag (b7)
+.cfaf                              lab_2117
+.cfaf  48         pha              	PHA				; save string length
+.cfb0  49 ff      eor #$ff         	EOR	#$FF			; complement it
+.cfb2  38         sec              	SEC				; set carry for subtract (twos comp add)
+.cfb3  65 81      adc $81          	ADC	Sstorl		; add bottom of string space low byte (subtract length)
+.cfb5  a4 82      ldy $82          	LDY	Sstorh		; get bottom of string space high byte
+.cfb7  b0 01      bcs $cfba        	BCS	LAB_2122		; skip decrement if no underflow
+.cfb9  88         dey              	DEY				; decrement bottom of string space high byte
+.cfba                              lab_2122
+.cfba  c4 80      cpy $80          	CPY	Earryh		; compare with array mem end high byte
+.cfbc  90 11      bcc $cfcf        	BCC	LAB_2137		; do out of memory error if less
+.cfbe  d0 04      bne $cfc4        	BNE	LAB_212C		; if not = skip next test
+.cfc0  c5 7f      cmp $7f          	CMP	Earryl		; compare with array mem end low byte
+.cfc2  90 0b      bcc $cfcf        	BCC	LAB_2137		; do out of memory error if less
+.cfc4                              lab_212c
+.cfc4  85 81      sta $81          	STA	Sstorl		; save bottom of string space low byte
+.cfc6  84 82      sty $82          	STY	Sstorh		; save bottom of string space high byte
+.cfc8  85 83      sta $83          	STA	Sutill		; save string utility ptr low byte
+.cfca  84 84      sty $84          	STY	Sutilh		; save string utility ptr high byte
+.cfcc  aa         tax              	TAX				; copy low byte to X
+.cfcd  68         pla              	PLA				; get string length back
+.cfce  60         rts              	RTS
+.cfcf                              lab_2137
+.cfcf  a2 0c      ldx #$0c         	LDX	#$0C			; error code $0C ("Out of memory" error)
+.cfd1  a5 60      lda $60          	LDA	Gclctd		; get garbage collected flag
+.cfd3  30 b8      bmi $cf8d        	BMI	LAB_20F5		; if set then do error code X
+.cfd5  20 df cf   jsr $cfdf        	JSR	LAB_GARB		; else go do garbage collection
+.cfd8  a9 80      lda #$80         	LDA	#$80			; flag for garbage collected
+.cfda  85 60      sta $60          	STA	Gclctd		; set garbage collected flag
+.cfdc  68         pla              	PLA				; pull length
+.cfdd  d0 d0      bne $cfaf        	BNE	LAB_2117		; go try again (loop always, length should never be = $00)
+.cfdf                              lab_garb
+.cfdf  a6 85      ldx $85          	LDX	Ememl			; get end of mem low byte
+.cfe1  a5 86      lda $86          	LDA	Ememh			; get end of mem high byte
+.cfe3                              lab_214b
+.cfe3  86 81      stx $81          	STX	Sstorl		; set string storage low byte
+.cfe5  85 82      sta $82          	STA	Sstorh		; set string storage high byte
+.cfe7  a0 00      ldy #$00         	LDY	#$00			; clear index
+.cfe9  84 9d      sty $9d          	STY	garb_h		; clear working pointer high byte (flag no strings to move)
+.cfeb  a5 7f      lda $7f          	LDA	Earryl		; get array mem end low byte
+.cfed  a6 80      ldx $80          	LDX	Earryh		; get array mem end high byte
+.cfef  85 aa      sta $aa          	STA	Histrl		; save as highest string low byte
+.cff1  86 ab      stx $ab          	STX	Histrh		; save as highest string high byte
+.cff3  a9 68      lda #$68         	LDA	#des_sk		; set descriptor stack pointer
+.cff5  85 71      sta $71          	STA	ut1_pl		; save descriptor stack pointer low byte
+.cff7  84 72      sty $72          	STY	ut1_ph		; save descriptor stack pointer high byte ($00)
+.cff9                              lab_2161
+.cff9  c5 65      cmp $65          	CMP	next_s		; compare with descriptor stack pointer
+.cffb  f0 05      beq $d002        	BEQ	LAB_216A		; branch if =
+.cffd  20 63 d0   jsr $d063        	JSR	LAB_21D7		; go garbage collect descriptor stack
+.d000  f0 f7      beq $cff9        	BEQ	LAB_2161		; loop always
+.d002                              lab_216a
+.d002  06 a0      asl $a0          	ASL	g_step		; set step size = $06
+.d004  a5 7b      lda $7b          	LDA	Svarl			; get start of vars low byte
+.d006  a6 7c      ldx $7c          	LDX	Svarh			; get start of vars high byte
+.d008  85 71      sta $71          	STA	ut1_pl		; save as pointer low byte
+.d00a  86 72      stx $72          	STX	ut1_ph		; save as pointer high byte
+.d00c                              lab_2176
+.d00c  e4 7e      cpx $7e          	CPX	Sarryh		; compare start of arrays high byte
+.d00e  d0 04      bne $d014        	BNE	LAB_217E		; branch if no high byte match
+.d010  c5 7d      cmp $7d          	CMP	Sarryl		; else compare start of arrays low byte
+.d012  f0 05      beq $d019        	BEQ	LAB_2183		; branch if = var mem end
+.d014                              lab_217e
+.d014  20 5d d0   jsr $d05d        	JSR	LAB_21D1		; go garbage collect strings
+.d017  f0 f3      beq $d00c        	BEQ	LAB_2176		; loop always
+.d019                              lab_2183
+.d019  85 a4      sta $a4          	STA	Nbendl		; save start of arrays low byte as working pointer
+.d01b  86 a5      stx $a5          	STX	Nbendh		; save start of arrays high byte as working pointer
+.d01d  a9 04      lda #$04         	LDA	#$04			; set step size
+.d01f  85 a0      sta $a0          	STA	g_step		; save step size
+.d021                              lab_218b
+.d021  a5 a4      lda $a4          	LDA	Nbendl		; get pointer low byte
+.d023  a6 a5      ldx $a5          	LDX	Nbendh		; get pointer high byte
+.d025                              lab_218f
+.d025  e4 80      cpx $80          	CPX	Earryh		; compare with array mem end high byte
+.d027  d0 04      bne $d02d        	BNE	LAB_219A		; branch if not at end
+.d029  c5 7f      cmp $7f          	CMP	Earryl		; else compare with array mem end low byte
+.d02b  f0 75      beq $d0a2        	BEQ	LAB_2216		; tidy up and exit if at end
+.d02d                              lab_219a
+.d02d  85 71      sta $71          	STA	ut1_pl		; save pointer low byte
+.d02f  86 72      stx $72          	STX	ut1_ph		; save pointer high byte
+.d031  a0 02      ldy #$02         	LDY	#$02			; set index
+.d033  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get array size low byte
+.d035  65 a4      adc $a4          	ADC	Nbendl		; add start of this array low byte
+.d037  85 a4      sta $a4          	STA	Nbendl		; save start of next array low byte
+.d039  c8         iny              	INY				; increment index
+.d03a  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get array size high byte
+.d03c  65 a5      adc $a5          	ADC	Nbendh		; add start of this array high byte
+.d03e  85 a5      sta $a5          	STA	Nbendh		; save start of next array high byte
+.d040  a0 01      ldy #$01         	LDY	#$01			; set index
+.d042  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get name second byte
+.d044  10 db      bpl $d021        	BPL	LAB_218B		; skip if not string array
+.d046  a0 04      ldy #$04         	LDY	#$04			; set index
+.d048  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get # of dimensions
+.d04a  0a         asl              	ASL				; *2
+.d04b  69 05      adc #$05         	ADC	#$05			; +5 (array header size)
+.d04d  20 95 d0   jsr $d095        	JSR	LAB_2208		; go set up for first element
+.d050                              lab_21c4
+.d050  e4 a5      cpx $a5          	CPX	Nbendh		; compare with start of next array high byte
+.d052  d0 04      bne $d058        	BNE	LAB_21CC		; branch if <> (go do this array)
+.d054  c5 a4      cmp $a4          	CMP	Nbendl		; else compare element pointer low byte with next array
+.d056  f0 cd      beq $d025        	BEQ	LAB_218F		; if equal then go do next array
+.d058                              lab_21cc
+.d058  20 63 d0   jsr $d063        	JSR	LAB_21D7		; go defrag array strings
+.d05b  f0 f3      beq $d050        	BEQ	LAB_21C4		; go do next array string (loop always)
+.d05d                              lab_21d1
+.d05d  c8         iny              	INY				; increment index (Y was $00)
+.d05e  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get var name byte 2
+.d060  10 30      bpl $d092        	BPL	LAB_2206		; if not string, step pointer to next var and return
+.d062  c8         iny              	INY				; else increment index
+.d063                              lab_21d7
+.d063  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get string length
+.d065  f0 2b      beq $d092        	BEQ	LAB_2206		; if null, step pointer to next string and return
+.d067  c8         iny              	INY				; else increment index
+.d068  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get string pointer low byte
+.d06a  aa         tax              	TAX				; copy to X
+.d06b  c8         iny              	INY				; increment index
+.d06c  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get string pointer high byte
+.d06e  c5 82      cmp $82          	CMP	Sstorh		; compare bottom of string space high byte
+.d070  90 06      bcc $d078        	BCC	LAB_21EC		; branch if less
+.d072  d0 1e      bne $d092        	BNE	LAB_2206		; if greater, step pointer to next string and return
+.d074  e4 81      cpx $81          	CPX	Sstorl		; compare bottom of string space low byte
+.d076  b0 1a      bcs $d092        	BCS	LAB_2206		; if >=, step pointer to next string and return
+.d078                              lab_21ec
+.d078  c5 ab      cmp $ab          	CMP	Histrh		; compare to highest string high byte
+.d07a  90 17      bcc $d093        	BCC	LAB_2207		; if <, step pointer to next string and return
+.d07c  d0 04      bne $d082        	BNE	LAB_21F6		; if > update pointers, step to next and return
+.d07e  e4 aa      cpx $aa          	CPX	Histrl		; compare to highest string low byte
+.d080  90 11      bcc $d093        	BCC	LAB_2207		; if <, step pointer to next string and return
+.d082                              lab_21f6
+.d082  86 aa      stx $aa          	STX	Histrl		; save as new highest string low byte
+.d084  85 ab      sta $ab          	STA	Histrh		; save as new highest string high byte
+.d086  a5 71      lda $71          	LDA	ut1_pl		; get start of vars(descriptors) low byte
+.d088  a6 72      ldx $72          	LDX	ut1_ph		; get start of vars(descriptors) high byte
+.d08a  85 9c      sta $9c          	STA	garb_l		; save as working pointer low byte
+.d08c  86 9d      stx $9d          	STX	garb_h		; save as working pointer high byte
+.d08e  88         dey              	DEY				; decrement index DIFFERS
+.d08f  88         dey              	DEY				; decrement index (should point to descriptor start)
+.d090  84 a2      sty $a2          	STY	g_indx		; save index pointer
+.d092                              lab_2206
+.d092  18         clc              	CLC				; clear carry for add
+.d093                              lab_2207
+.d093  a5 a0      lda $a0          	LDA	g_step		; get step size
+.d095                              lab_2208
+.d095  65 71      adc $71          	ADC	ut1_pl		; add pointer low byte
+.d097  85 71      sta $71          	STA	ut1_pl		; save pointer low byte
+.d099  90 02      bcc $d09d        	BCC	LAB_2211		; branch if no overflow
+.d09b  e6 72      inc $72          	INC	ut1_ph		; else increment high byte
+.d09d                              lab_2211
+.d09d  a6 72      ldx $72          	LDX	ut1_ph		; get pointer high byte
+.d09f  a0 00      ldy #$00         	LDY	#$00			; clear Y
+.d0a1  60         rts              	RTS
+.d0a2                              lab_2216
+.d0a2  c6 a0      dec $a0          	DEC	g_step		; decrement step size (now $03 for descriptor stack)
+.d0a4  a6 9d      ldx $9d          	LDX	garb_h		; get string to move high byte
+.d0a6  f0 f5      beq $d09d        	BEQ	LAB_2211		; exit if nothing to move
+.d0a8  a4 a2      ldy $a2          	LDY	g_indx		; get index byte back (points to descriptor)
+.d0aa  18         clc              	CLC				; clear carry for add
+.d0ab  b1 9c      lda ($9c),y      	LDA	(garb_l),Y		; get string length
+.d0ad  65 aa      adc $aa          	ADC	Histrl		; add highest string low byte
+.d0af  85 a6      sta $a6          	STA	Obendl		; save old block end low pointer
+.d0b1  a5 ab      lda $ab          	LDA	Histrh		; get highest string high byte
+.d0b3  69 00      adc #$00         	ADC	#$00			; add any carry
+.d0b5  85 a7      sta $a7          	STA	Obendh		; save old block end high byte
+.d0b7  a5 81      lda $81          	LDA	Sstorl		; get bottom of string space low byte
+.d0b9  a6 82      ldx $82          	LDX	Sstorh		; get bottom of string space high byte
+.d0bb  85 a4      sta $a4          	STA	Nbendl		; save new block end low byte
+.d0bd  86 a5      stx $a5          	STX	Nbendh		; save new block end high byte
+.d0bf  20 c8 be   jsr $bec8        	JSR	LAB_11D6		; open up space in memory, don't set array end
+.d0c2  a4 a2      ldy $a2          	LDY	g_indx		; get index byte
+.d0c4  c8         iny              	INY				; point to descriptor low byte
+.d0c5  a5 a4      lda $a4          	LDA	Nbendl		; get string pointer low byte
+.d0c7  91 9c      sta ($9c),y      	STA	(garb_l),Y		; save new string pointer low byte
+.d0c9  aa         tax              	TAX				; copy string pointer low byte
+.d0ca  e6 a5      inc $a5          	INC	Nbendh		; correct high byte (move sets high byte -1)
+.d0cc  a5 a5      lda $a5          	LDA	Nbendh		; get new string pointer high byte
+.d0ce  c8         iny              	INY				; point to descriptor high byte
+.d0cf  91 9c      sta ($9c),y      	STA	(garb_l),Y		; save new string pointer high byte
+.d0d1  4c e3 cf   jmp $cfe3        	JMP	LAB_214B		; re-run routine from last ending
+.d0d4                              lab_224d
+.d0d4  a5 af      lda $af          	LDA	des_ph		; get descriptor pointer high byte
+.d0d6  48         pha              	PHA				; put on stack
+.d0d7  a5 ae      lda $ae          	LDA	des_pl		; get descriptor pointer low byte
+.d0d9  48         pha              	PHA				; put on stack
+.d0da  20 cd c9   jsr $c9cd        	JSR	LAB_GVAL		; get value from line
+.d0dd  20 d2 c8   jsr $c8d2        	JSR	LAB_CTST		; check if source is string, else do type mismatch
+.d0e0  68         pla              	PLA				; get descriptor pointer low byte back
+.d0e1  85 b8      sta $b8          	STA	ssptr_l		; set pointer low byte
+.d0e3  68         pla              	PLA				; get descriptor pointer high byte back
+.d0e4  85 b9      sta $b9          	STA	ssptr_h		; set pointer high byte
+.d0e6  a0 00      ldy #$00         	LDY	#$00			; clear index
+.d0e8  b1 b8      lda ($b8),y      	LDA	(ssptr_l),Y		; get length_1 from descriptor
+.d0ea  18         clc              	CLC				; clear carry for add
+.d0eb  71 ae      adc ($ae),y      	ADC	(des_pl),Y		; add length_2
+.d0ed  90 05      bcc $d0f4        	BCC	LAB_226D		; branch if no overflow
+.d0ef  a2 1a      ldx #$1a         	LDX	#$1A			; else set error code $1A ("String too long" error)
+.d0f1  4c 3c bf   jmp $bf3c        	JMP	LAB_XERR		; do error #X, then warm start
+.d0f4                              lab_226d
+.d0f4  20 32 cf   jsr $cf32        	JSR	LAB_209C		; copy des_pl/h to des_2l/h and make string space A bytes
+.d0f7  20 11 d1   jsr $d111        	JSR	LAB_228A		; copy string from descriptor (sdescr) to (Sutill)
+.d0fa  a5 9e      lda $9e          	LDA	des_2l		; get descriptor pointer low byte
+.d0fc  a4 9f      ldy $9f          	LDY	des_2h		; get descriptor pointer high byte
+.d0fe  20 42 d1   jsr $d142        	JSR	LAB_22BA		; pop (YA) descriptor off stack or from top of string space
+.d101  20 23 d1   jsr $d123        	JSR	LAB_229C		; store string A bytes long from (ut1_pl) to (Sutill)
+.d104  a5 b8      lda $b8          	LDA	ssptr_l		;.set descriptor pointer low byte
+.d106  a4 b9      ldy $b9          	LDY	ssptr_h		;.set descriptor pointer high byte
+.d108  20 42 d1   jsr $d142        	JSR	LAB_22BA		; pop (YA) descriptor off stack or from top of string space
+.d10b  20 85 cf   jsr $cf85        	JSR	LAB_RTST		; check for space on descriptor stack then put string
+.d10e  4c f8 c8   jmp $c8f8        	JMP	LAB_1ADB		;.continue evaluation
+.d111                              lab_228a
+.d111  a0 00      ldy #$00         	LDY	#$00			; clear index
+.d113  b1 b8      lda ($b8),y      	LDA	(sdescr),Y		; get string length
+.d115  48         pha              	PHA				; save on stack
+.d116  c8         iny              	INY				; increment index
+.d117  b1 b8      lda ($b8),y      	LDA	(sdescr),Y		; get source string pointer low byte
+.d119  aa         tax              	TAX				; copy to X
+.d11a  c8         iny              	INY				; increment index
+.d11b  b1 b8      lda ($b8),y      	LDA	(sdescr),Y		; get source string pointer high byte
+.d11d  a8         tay              	TAY				; copy to Y
+.d11e  68         pla              	PLA				; get length back
+.d11f                              lab_2298
+.d11f  86 71      stx $71          	STX	ut1_pl		; save source string pointer low byte
+.d121  84 72      sty $72          	STY	ut1_ph		; save source string pointer high byte
+.d123                              lab_229c
+.d123  aa         tax              	TAX				; copy length to index (don't count with Y)
+.d124  f0 14      beq $d13a        	BEQ	LAB_22B2		; branch if = $0 (null string) no need to add zero length
+.d126  a0 00      ldy #$00         	LDY	#$00			; zero pointer (copy forward)
+.d128                              lab_22a0
+.d128  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get source byte
+.d12a  91 83      sta ($83),y      	STA	(Sutill),Y		; save destination byte
+.d12c  c8         iny              	INY				; increment index
+.d12d  ca         dex              	DEX				; decrement counter
+.d12e  d0 f8      bne $d128        	BNE	LAB_22A0		; loop while <> 0
+.d130  98         tya              	TYA				; restore length from Y
+.d131                              lab_22a9
+.d131  18         clc              	CLC				; clear carry for add
+.d132  65 83      adc $83          	ADC	Sutill		; add string utility ptr low byte
+.d134  85 83      sta $83          	STA	Sutill		; save string utility ptr low byte
+.d136  90 02      bcc $d13a        	BCC	LAB_22B2		; branch if no carry
+.d138  e6 84      inc $84          	INC	Sutilh		; else increment string utility ptr high byte
+.d13a                              lab_22b2
+.d13a  60         rts              	RTS
+.d13b                              lab_evst
+.d13b  20 d2 c8   jsr $c8d2        	JSR	LAB_CTST		; check if source is string, else do type mismatch
+.d13e                              lab_22b6
+.d13e  a5 ae      lda $ae          	LDA	des_pl		; get descriptor pointer low byte
+.d140  a4 af      ldy $af          	LDY	des_ph		; get descriptor pointer high byte
+.d142                              lab_22ba
+.d142  85 71      sta $71          	STA	ut1_pl		; save descriptor pointer low byte
+.d144  84 72      sty $72          	STY	ut1_ph		; save descriptor pointer high byte
+.d146  20 73 d1   jsr $d173        	JSR	LAB_22EB		; clean descriptor stack, YA = pointer
+.d149  08         php              	PHP				; save status flags
+.d14a  a0 00      ldy #$00         	LDY	#$00			; clear index
+.d14c  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get length from string descriptor
+.d14e  48         pha              	PHA				; put on stack
+.d14f  c8         iny              	INY				; increment index
+.d150  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get string pointer low byte from descriptor
+.d152  aa         tax              	TAX				; copy to X
+.d153  c8         iny              	INY				; increment index
+.d154  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get string pointer high byte from descriptor
+.d156  a8         tay              	TAY				; copy to Y
+.d157  68         pla              	PLA				; get string length back
+.d158  28         plp              	PLP				; restore status
+.d159  d0 13      bne $d16e        	BNE	LAB_22E6		; branch if pointer <> last_sl,last_sh
+.d15b  c4 82      cpy $82          	CPY	Sstorh		; compare bottom of string space high byte
+.d15d  d0 0f      bne $d16e        	BNE	LAB_22E6		; branch if <>
+.d15f  e4 81      cpx $81          	CPX	Sstorl		; else compare bottom of string space low byte
+.d161  d0 0b      bne $d16e        	BNE	LAB_22E6		; branch if <>
+.d163  48         pha              	PHA				; save string length
+.d164  18         clc              	CLC				; clear carry for add
+.d165  65 81      adc $81          	ADC	Sstorl		; add bottom of string space low byte
+.d167  85 81      sta $81          	STA	Sstorl		; save bottom of string space low byte
+.d169  90 02      bcc $d16d        	BCC	LAB_22E5		; skip increment if no overflow
+.d16b  e6 82      inc $82          	INC	Sstorh		; increment bottom of string space high byte
+.d16d                              lab_22e5
+.d16d  68         pla              	PLA				; restore string length
+.d16e                              lab_22e6
+.d16e  86 71      stx $71          	STX	ut1_pl		; save string pointer low byte
+.d170  84 72      sty $72          	STY	ut1_ph		; save string pointer high byte
+.d172  60         rts              	RTS
+.d173                              lab_22eb
+.d173  c4 67      cpy $67          	CPY	last_sh		; compare pointer high byte
+.d175  d0 0c      bne $d183        	BNE	LAB_22FB		; exit if <>
+.d177  c5 66      cmp $66          	CMP	last_sl		; compare pointer low byte
+.d179  d0 08      bne $d183        	BNE	LAB_22FB		; exit if <>
+.d17b  85 65      sta $65          	STA	next_s		; save descriptor stack pointer
+.d17d  e9 03      sbc #$03         	SBC	#$03			; -3
+.d17f  85 66      sta $66          	STA	last_sl		; save low byte -3
+.d181  a0 00      ldy #$00         	LDY	#$00			; clear high byte
+.d183                              lab_22fb
+.d183  60         rts              	RTS
+.d184                              lab_chrs
+.d184  20 8f d2   jsr $d28f        	JSR	LAB_EVBY		; evaluate byte expression, result in X
+.d187  8a         txa              	TXA				; copy to A
+.d188  48         pha              	PHA				; save character
+.d189  a9 01      lda #$01         	LDA	#$01			; string is single byte
+.d18b  20 3a cf   jsr $cf3a        	JSR	LAB_MSSP		; make string space A bytes long A=$AC=length,
+.d18e  68         pla              	PLA				; get character back
+.d18f  a0 00      ldy #$00         	LDY	#$00			; clear index
+.d191  91 ad      sta ($ad),y      	STA	(str_pl),Y		; save byte in string (byte IS string!)
+.d193  4c 85 cf   jmp $cf85        	JMP	LAB_RTST		; check for space on descriptor stack then put string
+.d196                              lab_left
+.d196  48         pha              	PHA				; push byte parameter
+.d197  20 f7 d1   jsr $d1f7        	JSR	LAB_236F		; pull string data and byte parameter from stack
+.d19a  d1 9e      cmp ($9e),y      	CMP	(des_2l),Y		; compare byte parameter with string length
+.d19c  98         tya              	TYA				; clear A
+.d19d  f0 09      beq $d1a8        	BEQ	LAB_2316		; go do string copy (branch always)
+.d19f                              lab_right
+.d19f  48         pha              	PHA				; push byte parameter
+.d1a0  20 f7 d1   jsr $d1f7        	JSR	LAB_236F		; pull string data and byte parameter from stack
+.d1a3  18         clc              	CLC				; clear carry for add-1
+.d1a4  f1 9e      sbc ($9e),y      	SBC	(des_2l),Y		; subtract string length
+.d1a6  49 ff      eor #$ff         	EOR	#$FF			; invert it (A=LEN(expression$)-l)
+.d1a8                              lab_2316
+.d1a8  90 04      bcc $d1ae        	BCC	LAB_231C		; branch if string length > byte parameter
+.d1aa  b1 9e      lda ($9e),y      	LDA	(des_2l),Y		; else make parameter = length
+.d1ac  aa         tax              	TAX				; copy to byte parameter copy
+.d1ad  98         tya              	TYA				; clear string start offset
+.d1ae                              lab_231c
+.d1ae  48         pha              	PHA				; save string start offset
+.d1af                              lab_231d
+.d1af  8a         txa              	TXA				; copy byte parameter (or string length if <)
+.d1b0                              lab_231e
+.d1b0  48         pha              	PHA				; save string length
+.d1b1  20 3a cf   jsr $cf3a        	JSR	LAB_MSSP		; make string space A bytes long A=$AC=length,
+.d1b4  a5 9e      lda $9e          	LDA	des_2l		; get descriptor pointer low byte
+.d1b6  a4 9f      ldy $9f          	LDY	des_2h		; get descriptor pointer high byte
+.d1b8  20 42 d1   jsr $d142        	JSR	LAB_22BA		; pop (YA) descriptor off stack or from top of string space
+.d1bb  68         pla              	PLA				; get string length back
+.d1bc  a8         tay              	TAY				; copy length to Y
+.d1bd  68         pla              	PLA				; get string start offset back
+.d1be  18         clc              	CLC				; clear carry for add
+.d1bf  65 71      adc $71          	ADC	ut1_pl		; add start offset to string start pointer low byte
+.d1c1  85 71      sta $71          	STA	ut1_pl		; save string start pointer low byte
+.d1c3  90 02      bcc $d1c7        	BCC	LAB_2335		; branch if no overflow
+.d1c5  e6 72      inc $72          	INC	ut1_ph		; else increment string start pointer high byte
+.d1c7                              lab_2335
+.d1c7  98         tya              	TYA				; copy length to A
+.d1c8  20 23 d1   jsr $d123        	JSR	LAB_229C		; store string A bytes long from (ut1_pl) to (Sutill)
+.d1cb  4c 85 cf   jmp $cf85        	JMP	LAB_RTST		; check for space on descriptor stack then put string
+.d1ce                              lab_mids
+.d1ce  48         pha              	PHA				; push byte parameter
+.d1cf  a9 ff      lda #$ff         	LDA	#$FF			; set default length = 255
+.d1d1  85 af      sta $af          	STA	mids_l		; save default length
+.d1d3  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.d1d6  c9 29      cmp #$29         	CMP	#")"			; compare with ")"
+.d1d8  f0 06      beq $d1e0        	BEQ	LAB_2358		; branch if = ")" (skip second byte get)
+.d1da  20 fe c9   jsr $c9fe        	JSR	LAB_1C01		; scan for "," , else do syntax error then warm start
+.d1dd  20 8c d2   jsr $d28c        	JSR	LAB_GTBY		; get byte parameter (use copy in mids_l)
+.d1e0                              lab_2358
+.d1e0  20 f7 d1   jsr $d1f7        	JSR	LAB_236F		; pull string data and byte parameter from stack
+.d1e3  ca         dex              	DEX				; decrement start index
+.d1e4  8a         txa              	TXA				; copy to A
+.d1e5  48         pha              	PHA				; save string start offset
+.d1e6  18         clc              	CLC				; clear carry for sub-1
+.d1e7  a2 00      ldx #$00         	LDX	#$00			; clear output string length
+.d1e9  f1 9e      sbc ($9e),y      	SBC	(des_2l),Y		; subtract string length
+.d1eb  b0 c2      bcs $d1af        	BCS	LAB_231D		; if start>string length go do null string
+.d1ed  49 ff      eor #$ff         	EOR	#$FF			; complement -length
+.d1ef  c5 af      cmp $af          	CMP	mids_l		; compare byte parameter
+.d1f1  90 bd      bcc $d1b0        	BCC	LAB_231E		; if length>remaining string go do RIGHT$
+.d1f3  a5 af      lda $af          	LDA	mids_l		; get length byte
+.d1f5  b0 b9      bcs $d1b0        	BCS	LAB_231E		; go do string copy (branch always)
+.d1f7                              lab_236f
+.d1f7  20 ef c9   jsr $c9ef        	JSR	LAB_1BFB		; scan for ")" , else do syntax error then warm start
+.d1fa  68         pla              	PLA				; pull return address low byte (return address)
+.d1fb  85 a2      sta $a2          	STA	Fnxjpl		; save functions jump vector low byte
+.d1fd  68         pla              	PLA				; pull return address high byte (return address)
+.d1fe  85 a3      sta $a3          	STA	Fnxjph		; save functions jump vector high byte
+.d200  68         pla              	PLA				; pull byte parameter
+.d201  aa         tax              	TAX				; copy byte parameter to X
+.d202  68         pla              	PLA				; pull string pointer low byte
+.d203  85 9e      sta $9e          	STA	des_2l		; save it
+.d205  68         pla              	PLA				; pull string pointer high byte
+.d206  85 9f      sta $9f          	STA	des_2h		; save it
+.d208  a0 00      ldy #$00         	LDY	#$00			; clear index
+.d20a  8a         txa              	TXA				; copy byte parameter
+.d20b  f0 79      beq $d286        	BEQ	LAB_23A8		; if null do function call error then warm start
+.d20d  e6 a2      inc $a2          	INC	Fnxjpl		; increment function jump vector low byte
+.d20f  6c a2 00   jmp ($00a2)      	JMP	(Fnxjpl)		; in effect, RTS
+.d212                              lab_lcase
+.d212  20 3b d1   jsr $d13b        	JSR	LAB_EVST		; evaluate string
+.d215  85 ac      sta $ac          	STA	str_ln		; set string length
+.d217  a8         tay              	TAY				; copy length to Y
+.d218  f0 38      beq $d252        	BEQ	NoString		; branch if null string
+.d21a  20 3a cf   jsr $cf3a        	JSR	LAB_MSSP		; make string space A bytes long A=length,
+.d21d  86 ad      stx $ad          	STX	str_pl		; save string pointer low byte
+.d21f  84 ae      sty $ae          	STY	str_ph		; save string pointer high byte
+.d221  a8         tay              	TAY				; get string length back
+.d222                              lc_loop
+.d222  88         dey              	DEY				; decrement index
+.d223  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get byte from string
+.d225  20 22 cc   jsr $cc22        	JSR	LAB_1D82		; is character "A" to "Z"
+.d228  90 02      bcc $d22c        	BCC	NoUcase		; branch if not upper case alpha
+.d22a  09 20      ora #$20         	ORA	#$20			; convert upper to lower case
+.d22c                              noucase
+.d22c  91 83      sta ($83),y      	STA	(Sutill),Y		; save byte back to string
+.d22e  98         tya              	TYA				; test index
+.d22f  d0 f1      bne $d222        	BNE	LC_loop		; loop if not all done
+.d231  f0 1f      beq $d252        	BEQ	NoString		; tidy up and exit, branch always
+.d233                              lab_ucase
+.d233  20 3b d1   jsr $d13b        	JSR	LAB_EVST		; evaluate string
+.d236  85 ac      sta $ac          	STA	str_ln		; set string length
+.d238  a8         tay              	TAY				; copy length to Y
+.d239  f0 17      beq $d252        	BEQ	NoString		; branch if null string
+.d23b  20 3a cf   jsr $cf3a        	JSR	LAB_MSSP		; make string space A bytes long A=length,
+.d23e  86 ad      stx $ad          	STX	str_pl		; save string pointer low byte
+.d240  84 ae      sty $ae          	STY	str_ph		; save string pointer high byte
+.d242  a8         tay              	TAY				; get string length back
+.d243                              uc_loop
+.d243  88         dey              	DEY				; decrement index
+.d244  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get byte from string
+.d246  20 1e cc   jsr $cc1e        	JSR	LAB_CASC		; is character "a" to "z" (or "A" to "Z")
+.d249  90 02      bcc $d24d        	BCC	NoLcase		; branch if not alpha
+.d24b  29 df      and #$df         	AND	#$DF			; convert lower to upper case
+.d24d                              nolcase
+.d24d  91 83      sta ($83),y      	STA	(Sutill),Y		; save byte back to string
+.d24f  98         tya              	TYA				; test index
+.d250  d0 f1      bne $d243        	BNE	UC_loop		; loop if not all done
+.d252                              nostring
+.d252  4c 85 cf   jmp $cf85        	JMP	LAB_RTST		; check for space on descriptor stack then put string
+.d255                              lab_sadd
+.d255  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.d258  20 aa cb   jsr $cbaa        	JSR	LAB_GVAR		; get var address
+.d25b  20 ef c9   jsr $c9ef        	JSR	LAB_1BFB		; scan for ")", else do syntax error then warm start
+.d25e  20 d2 c8   jsr $c8d2        	JSR	LAB_CTST		; check if source is string, else do type mismatch
+.d261  a0 02      ldy #$02         	LDY	#$02			; index to string pointer high byte
+.d263  b1 95      lda ($95),y      	LDA	(Cvaral),Y		; get string pointer high byte
+.d265  aa         tax              	TAX				; copy string pointer high byte to X
+.d266  88         dey              	DEY				; index to string pointer low byte
+.d267  b1 95      lda ($95),y      	LDA	(Cvaral),Y		; get string pointer low byte
+.d269  a8         tay              	TAY				; copy string pointer low byte to Y
+.d26a  8a         txa              	TXA				; copy string pointer high byte to A
+.d26b  4c 59 ce   jmp $ce59        	JMP	LAB_AYFC		; save and convert integer AY to FAC1 and return
+.d26e                              lab_lens
+.d26e  20 74 d2   jsr $d274        	JSR	LAB_ESGL		; evaluate string, get length in A (and Y)
+.d271  4c 66 ce   jmp $ce66        	JMP	LAB_1FD0		; convert Y to byte in FAC1 and return
+.d274                              lab_esgl
+.d274  20 3b d1   jsr $d13b        	JSR	LAB_EVST		; evaluate string
+.d277  a8         tay              	TAY				; copy length to Y
+.d278  60         rts              	RTS
+.d279                              lab_asc
+.d279  20 74 d2   jsr $d274        	JSR	LAB_ESGL		; evaluate string, get length in A (and Y)
+.d27c  f0 08      beq $d286        	BEQ	LAB_23A8		; if null do function call error then warm start
+.d27e  a0 00      ldy #$00         	LDY	#$00			; set index to first character
+.d280  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get byte
+.d282  a8         tay              	TAY				; copy to Y
+.d283  4c 66 ce   jmp $ce66        	JMP	LAB_1FD0		; convert Y to byte in FAC1 and return
+.d286                              lab_23a8
+.d286  4c 29 cd   jmp $cd29        	JMP	LAB_FCER		; do function call error then warm start
+.d289                              lab_sgby
+.d289  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.d28c                              lab_gtby
+.d28c  20 cd c8   jsr $c8cd        	JSR	LAB_EVNM		; evaluate expression and check is numeric,
+.d28f                              lab_evby
+.d28f  20 a2 cc   jsr $cca2        	JSR	LAB_EVPI		; evaluate integer expression (no check)
+.d292  a4 ae      ldy $ae          	LDY	FAC1_2		; get FAC1 mantissa2
+.d294  d0 f0      bne $d286        	BNE	LAB_23A8		; if top byte <> 0 do function call error then warm start
+.d296  a6 af      ldx $af          	LDX	FAC1_3		; get FAC1 mantissa3
+.d298  4c c2 00   jmp $00c2        	JMP	LAB_GBYT		; scan memory and return
+.d29b                              lab_val
+.d29b  20 74 d2   jsr $d274        	JSR	LAB_ESGL		; evaluate string, get length in A (and Y)
+.d29e  d0 03      bne $d2a3        	BNE	LAB_23C5		; branch if not null string
+.d2a0  4c 50 d4   jmp $d450        	JMP	LAB_24F1		; clear FAC1 exponent and sign and return
+.d2a3                              lab_23c5
+.d2a3  a6 c3      ldx $c3          	LDX	Bpntrl		; get BASIC execute pointer low byte
+.d2a5  a4 c4      ldy $c4          	LDY	Bpntrh		; get BASIC execute pointer high byte
+.d2a7  86 ba      stx $ba          	STX	Btmpl			; save BASIC execute pointer low byte
+.d2a9  84 bb      sty $bb          	STY	Btmph			; save BASIC execute pointer high byte
+.d2ab  a6 71      ldx $71          	LDX	ut1_pl		; get string pointer low byte
+.d2ad  86 c3      stx $c3          	STX	Bpntrl		; save as BASIC execute pointer low byte
+.d2af  18         clc              	CLC				; clear carry
+.d2b0  65 71      adc $71          	ADC	ut1_pl		; add string length
+.d2b2  85 73      sta $73          	STA	ut2_pl		; save string end low byte
+.d2b4  a5 72      lda $72          	LDA	ut1_ph		; get string pointer high byte
+.d2b6  85 c4      sta $c4          	STA	Bpntrh		; save as BASIC execute pointer high byte
+.d2b8  69 00      adc #$00         	ADC	#$00			; add carry to high byte
+.d2ba  85 74      sta $74          	STA	ut2_ph		; save string end high byte
+.d2bc  a0 00      ldy #$00         	LDY	#$00			; set index to $00
+.d2be  b1 73      lda ($73),y      	LDA	(ut2_pl),Y		; get string end +1 byte
+.d2c0  48         pha              	PHA				; push it
+.d2c1  98         tya              	TYA				; clear A
+.d2c2  91 73      sta ($73),y      	STA	(ut2_pl),Y		; terminate string with $00
+.d2c4  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.d2c7  20 a6 d7   jsr $d7a6        	JSR	LAB_2887		; get FAC1 from string
+.d2ca  68         pla              	PLA				; restore string end +1 byte
+.d2cb  a0 00      ldy #$00         	LDY	#$00			; set index to zero
+.d2cd  91 73      sta ($73),y      	STA	(ut2_pl),Y		; put string end byte back
+.d2cf                              lab_23f3
+.d2cf  a6 ba      ldx $ba          	LDX	Btmpl			; get BASIC execute pointer low byte back
+.d2d1  a4 bb      ldy $bb          	LDY	Btmph			; get BASIC execute pointer high byte back
+.d2d3  86 c3      stx $c3          	STX	Bpntrl		; save BASIC execute pointer low byte
+.d2d5  84 c4      sty $c4          	STY	Bpntrh		; save BASIC execute pointer high byte
+.d2d7  60         rts              	RTS
+.d2d8                              lab_gadb
+.d2d8  20 cd c8   jsr $c8cd        	JSR	LAB_EVNM		; evaluate expression and check is numeric,
+.d2db  20 f1 d2   jsr $d2f1        	JSR	LAB_F2FX		; save integer part of FAC1 in temporary integer
+.d2de                              lab_scgb
+.d2de  20 fe c9   jsr $c9fe        	JSR	LAB_1C01		; scan for "," , else do syntax error then warm start
+.d2e1  a5 12      lda $12          	LDA	Itemph		; save temporary integer high byte
+.d2e3  48         pha              	PHA				; on stack
+.d2e4  a5 11      lda $11          	LDA	Itempl		; save temporary integer low byte
+.d2e6  48         pha              	PHA				; on stack
+.d2e7  20 8c d2   jsr $d28c        	JSR	LAB_GTBY		; get byte parameter
+.d2ea  68         pla              	PLA				; pull low byte
+.d2eb  85 11      sta $11          	STA	Itempl		; restore temporary integer low byte
+.d2ed  68         pla              	PLA				; pull high byte
+.d2ee  85 12      sta $12          	STA	Itemph		; restore temporary integer high byte
+.d2f0  60         rts              	RTS
+.d2f1                              lab_f2fx
+.d2f1  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.d2f3  c9 98      cmp #$98         	CMP	#$98			; compare with exponent = 2^24
+.d2f5  b0 8f      bcs $d286        	BCS	LAB_23A8		; if >= do function call error then warm start
+.d2f7                              lab_f2fu
+.d2f7  20 50 d7   jsr $d750        	JSR	LAB_2831		; convert FAC1 floating-to-fixed
+.d2fa  a5 ae      lda $ae          	LDA	FAC1_2		; get FAC1 mantissa2
+.d2fc  a4 af      ldy $af          	LDY	FAC1_3		; get FAC1 mantissa3
+.d2fe  84 11      sty $11          	STY	Itempl		; save temporary integer low byte
+.d300  85 12      sta $12          	STA	Itemph		; save temporary integer high byte
+.d302  60         rts              	RTS
+.d303                              lab_peek
+.d303  20 f1 d2   jsr $d2f1        	JSR	LAB_F2FX		; save integer part of FAC1 in temporary integer
+.d306  a2 00      ldx #$00         	LDX	#$00			; clear index
+.d308  a1 11      lda ($11,x)      	LDA	(Itempl,X)		; get byte via temporary integer (addr)
+.d30a  a8         tay              	TAY				; copy byte to Y
+.d30b  4c 66 ce   jmp $ce66        	JMP	LAB_1FD0		; convert Y to byte in FAC1 and return
+.d30e                              lab_poke
+.d30e  20 d8 d2   jsr $d2d8        	JSR	LAB_GADB		; get two parameters for POKE or WAIT
+.d311  8a         txa              	TXA				; copy byte argument to A
+.d312  a2 00      ldx #$00         	LDX	#$00			; clear index
+.d314  81 11      sta ($11,x)      	STA	(Itempl,X)		; save byte via temporary integer (addr)
+.d316  60         rts              	RTS
+.d317                              lab_deek
+.d317  20 f1 d2   jsr $d2f1        	JSR	LAB_F2FX		; save integer part of FAC1 in temporary integer
+.d31a  a2 00      ldx #$00         	LDX	#$00			; clear index
+.d31c  a1 11      lda ($11,x)      	LDA	(Itempl,X)		; PEEK low byte
+.d31e  a8         tay              	TAY				; copy to Y
+.d31f  e6 11      inc $11          	INC	Itempl		; increment pointer low byte
+.d321  d0 02      bne $d325        	BNE	Deekh			; skip high increment if no rollover
+.d323  e6 12      inc $12          	INC	Itemph		; increment pointer high byte
+.d325                              deekh
+.d325  a1 11      lda ($11,x)      	LDA	(Itempl,X)		; PEEK high byte
+.d327  4c 59 ce   jmp $ce59        	JMP	LAB_AYFC		; save and convert integer AY to FAC1 and return
+.d32a                              lab_doke
+.d32a  20 cd c8   jsr $c8cd        	JSR	LAB_EVNM		; evaluate expression and check is numeric,
+.d32d  20 f1 d2   jsr $d2f1        	JSR	LAB_F2FX		; convert floating-to-fixed
+.d330  84 97      sty $97          	STY	Frnxtl		; save pointer low byte (float to fixed returns word in AY)
+.d332  85 98      sta $98          	STA	Frnxth		; save pointer high byte
+.d334  20 fe c9   jsr $c9fe        	JSR	LAB_1C01		; scan for "," , else do syntax error then warm start
+.d337  20 cd c8   jsr $c8cd        	JSR	LAB_EVNM		; evaluate expression and check is numeric,
+.d33a  20 f1 d2   jsr $d2f1        	JSR	LAB_F2FX		; convert floating-to-fixed
+.d33d  98         tya              	TYA				; copy value low byte (float to fixed returns word in AY)
+.d33e  a2 00      ldx #$00         	LDX	#$00			; clear index
+.d340  81 97      sta ($97,x)      	STA	(Frnxtl,X)		; POKE low byte
+.d342  e6 97      inc $97          	INC	Frnxtl		; increment pointer low byte
+.d344  d0 02      bne $d348        	BNE	Dokeh			; skip high increment if no rollover
+.d346  e6 98      inc $98          	INC	Frnxth		; increment pointer high byte
+.d348                              dokeh
+.d348  a5 12      lda $12          	LDA	Itemph		; get value high byte
+.d34a  81 97      sta ($97,x)      	STA	(Frnxtl,X)		; POKE high byte
+.d34c  4c c2 00   jmp $00c2        	JMP	LAB_GBYT		; scan memory and return
+.d34f                              lab_swap
+.d34f  20 aa cb   jsr $cbaa        	JSR	LAB_GVAR		; get var1 address
+.d352  85 97      sta $97          	STA	Lvarpl		; save var1 address low byte
+.d354  84 98      sty $98          	STY	Lvarph		; save var1 address high byte
+.d356  a5 5f      lda $5f          	LDA	Dtypef		; get data type flag, $FF=string, $00=numeric
+.d358  48         pha              	PHA				; save data type flag
+.d359  20 fe c9   jsr $c9fe        	JSR	LAB_1C01		; scan for "," , else do syntax error then warm start
+.d35c  20 aa cb   jsr $cbaa        	JSR	LAB_GVAR		; get var2 address (pointer in Cvaral/h)
+.d35f  68         pla              	PLA				; pull var1 data type flag
+.d360  45 5f      eor $5f          	EOR	Dtypef		; compare with var2 data type
+.d362  10 10      bpl $d374        	BPL	SwapErr		; exit if not both the same type
+.d364  a0 03      ldy #$03         	LDY	#$03			; four bytes to swap (either value or descriptor+1)
+.d366                              swaplp
+.d366  b1 97      lda ($97),y      	LDA	(Lvarpl),Y		; get byte from var1
+.d368  aa         tax              	TAX				; save var1 byte
+.d369  b1 95      lda ($95),y      	LDA	(Cvaral),Y		; get byte from var2
+.d36b  91 97      sta ($97),y      	STA	(Lvarpl),Y		; save byte to var1
+.d36d  8a         txa              	TXA				; restore var1 byte
+.d36e  91 95      sta ($95),y      	STA	(Cvaral),Y		; save byte to var2
+.d370  88         dey              	DEY				; decrement index
+.d371  10 f3      bpl $d366        	BPL	SwapLp		; loop until done
+.d373  60         rts              	RTS
+.d374                              swaperr
+.d374  4c dc c8   jmp $c8dc        	JMP	LAB_1ABC		; do "Type mismatch" error then warm start
+.d377                              lab_call
+.d377  20 cd c8   jsr $c8cd        	JSR	LAB_EVNM		; evaluate expression and check is numeric,
+.d37a  20 f1 d2   jsr $d2f1        	JSR	LAB_F2FX		; convert floating-to-fixed
+.d37d  a9 d3      lda #$d3         	LDA	#>CallExit		; set return address high byte
+.d37f  48         pha              	PHA				; put on stack
+.d380  a9 85      lda #$85         	LDA	#<CallExit-1	; set return address low byte
+.d382  48         pha              	PHA				; put on stack
+.d383  6c 11 00   jmp ($0011)      	JMP	(Itempl)		; do indirect jump to user routine
+.d386                              callexit
+.d386  4c c2 00   jmp $00c2        	JMP	LAB_GBYT		; scan memory and return
+.d389                              lab_wait
+.d389  20 d8 d2   jsr $d2d8        	JSR	LAB_GADB		; get two parameters for POKE or WAIT
+.d38c  86 97      stx $97          	STX	Frnxtl		; save byte
+.d38e  a2 00      ldx #$00         	LDX	#$00			; clear mask
+.d390  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; scan memory
+.d393  f0 03      beq $d398        	BEQ	LAB_2441		; skip if no third argument
+.d395  20 de d2   jsr $d2de        	JSR	LAB_SCGB		; scan for "," and get byte, else SN error then warm start
+.d398                              lab_2441
+.d398  86 98      stx $98          	STX	Frnxth		; save EOR argument
+.d39a                              lab_2445
+.d39a  b1 11      lda ($11),y      	LDA	(Itempl),Y		; get byte via temporary integer (addr)
+.d39c  45 98      eor $98          	EOR	Frnxth		; EOR with second argument (mask)
+.d39e  25 97      and $97          	AND	Frnxtl		; AND with first argument (byte)
+.d3a0  f0 f8      beq $d39a        	BEQ	LAB_2445		; loop if result is zero
+.d3a2                              lab_244d
+.d3a2  60         rts              	RTS
+.d3a3                              lab_2455
+.d3a3  20 8b d5   jsr $d58b        	JSR	LAB_264D		; unpack memory (AY) into FAC2
+.d3a6                              lab_subtract
+.d3a6  a5 b0      lda $b0          	LDA	FAC1_s		; get FAC1 sign (b7)
+.d3a8  49 ff      eor #$ff         	EOR	#$FF			; complement it
+.d3aa  85 b0      sta $b0          	STA	FAC1_s		; save FAC1 sign (b7)
+.d3ac  45 b7      eor $b7          	EOR	FAC2_s		; EOR with FAC2 sign (b7)
+.d3ae  85 b8      sta $b8          	STA	FAC_sc		; save sign compare (FAC1 EOR FAC2)
+.d3b0  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.d3b2  4c c1 d3   jmp $d3c1        	JMP	LAB_ADD		; go add FAC2 to FAC1
+.d3b5                              lab_2467
+.d3b5  20 da d4   jsr $d4da        	JSR	LAB_257B		; shift FACX A times right (>8 shifts)
+.d3b8  90 4d      bcc $d407        	BCC	LAB_24A8		;.go subtract mantissas
+.d3ba                              lab_244e
+.d3ba  a9 e9      lda #$e9         	LDA	#<LAB_2A96		; set 0.5 pointer low byte
+.d3bc  a0 df      ldy #$df         	LDY	#>LAB_2A96		; set 0.5 pointer high byte
+.d3be                              lab_246c
+.d3be  20 8b d5   jsr $d58b        	JSR	LAB_264D		; unpack memory (AY) into FAC2
+.d3c1                              lab_add
+.d3c1  d0 10      bne $d3d3        	BNE	LAB_2474		; branch if FAC1 was not zero
+.d3c3                              lab_279b
+.d3c3  a5 b7      lda $b7          	LDA	FAC2_s		; get FAC2 sign (b7)
+.d3c5                              lab_279d
+.d3c5  85 b0      sta $b0          	STA	FAC1_s		; save FAC1 sign (b7)
+.d3c7  a2 04      ldx #$04         	LDX	#$04			; 4 bytes to copy
+.d3c9                              lab_27a1
+.d3c9  b5 b2      lda $b2,x        	LDA	FAC1_o,X		; get byte from FAC2,X
+.d3cb  95 ab      sta $ab,x        	STA	FAC1_e-1,X		; save byte at FAC1,X
+.d3cd  ca         dex              	DEX				; decrement count
+.d3ce  d0 f9      bne $d3c9        	BNE	LAB_27A1		; loop if not all done
+.d3d0  86 b9      stx $b9          	STX	FAC1_r		; clear FAC1 rounding byte
+.d3d2  60         rts              	RTS
+.d3d3                              lab_2474
+.d3d3  a6 b9      ldx $b9          	LDX	FAC1_r		; get FAC1 rounding byte
+.d3d5  86 a3      stx $a3          	STX	FAC2_r		; save as FAC2 rounding byte
+.d3d7  a2 b3      ldx #$b3         	LDX	#FAC2_e		; set index to FAC2 exponent addr
+.d3d9  a5 b3      lda $b3          	LDA	FAC2_e		; get FAC2 exponent
+.d3db                              lab_247c
+.d3db  a8         tay              	TAY				; copy exponent
+.d3dc  f0 c4      beq $d3a2        	BEQ	LAB_244D		; exit if zero
+.d3de  38         sec              	SEC				; set carry for subtract
+.d3df  e5 ac      sbc $ac          	SBC	FAC1_e		; subtract FAC1 exponent
+.d3e1  f0 24      beq $d407        	BEQ	LAB_24A8		; branch if = (go add mantissa)
+.d3e3  90 12      bcc $d3f7        	BCC	LAB_2498		; branch if <
+.d3e5  84 ac      sty $ac          	STY	FAC1_e		; save FAC1 exponent
+.d3e7  a4 b7      ldy $b7          	LDY	FAC2_s		; get FAC2 sign (b7)
+.d3e9  84 b0      sty $b0          	STY	FAC1_s		; save FAC1 sign (b7)
+.d3eb  49 ff      eor #$ff         	EOR	#$FF			; complement A
+.d3ed  69 00      adc #$00         	ADC	#$00			; +1 (twos complement, carry is set)
+.d3ef  a0 00      ldy #$00         	LDY	#$00			; clear Y
+.d3f1  84 a3      sty $a3          	STY	FAC2_r		; clear FAC2 rounding byte
+.d3f3  a2 ac      ldx #$ac         	LDX	#FAC1_e		; set index to FAC1 exponent addr
+.d3f5  d0 04      bne $d3fb        	BNE	LAB_249C		; branch always
+.d3f7                              lab_2498
+.d3f7  a0 00      ldy #$00         	LDY	#$00			; clear Y
+.d3f9  84 b9      sty $b9          	STY	FAC1_r		; clear FAC1 rounding byte
+.d3fb                              lab_249c
+.d3fb  c9 f9      cmp #$f9         	CMP	#$F9			; compare exponent diff with $F9
+.d3fd  30 b6      bmi $d3b5        	BMI	LAB_2467		; branch if range $79-$F8
+.d3ff  a8         tay              	TAY				; copy exponent difference to Y
+.d400  a5 b9      lda $b9          	LDA	FAC1_r		; get FAC1 rounding byte
+.d402  56 01      lsr $01,x        	LSR	PLUS_1,X		; shift FAC? mantissa1
+.d404  20 f1 d4   jsr $d4f1        	JSR	LAB_2592		; shift FACX Y times right
+.d407                              lab_24a8
+.d407  24 b8      bit $b8          	BIT	FAC_sc		; test sign compare (FAC1 EOR FAC2)
+.d409  10 4c      bpl $d457        	BPL	LAB_24F8		; if = add FAC2 mantissa to FAC1 mantissa and return
+.d40b  a0 ac      ldy #$ac         	LDY	#FAC1_e		; set index to FAC1 exponent addr
+.d40d  e0 b3      cpx #$b3         	CPX	#FAC2_e		; compare X to FAC2 exponent addr
+.d40f  f0 02      beq $d413        	BEQ	LAB_24B4		; branch if =
+.d411  a0 b3      ldy #$b3         	LDY	#FAC2_e		; else set index to FAC2 exponent addr
+.d413                              lab_24b4
+.d413  38         sec              	SEC				; set carry for subtract
+.d414  49 ff      eor #$ff         	EOR	#$FF			; ones complement A
+.d416  65 a3      adc $a3          	ADC	FAC2_r		; add FAC2 rounding byte
+.d418  85 b9      sta $b9          	STA	FAC1_r		; save FAC1 rounding byte
+.d41a  b9 03 00   lda $0003,y      	LDA	PLUS_3,Y		; get FACY mantissa3
+.d41d  f5 03      sbc $03,x        	SBC	PLUS_3,X		; subtract FACX mantissa3
+.d41f  85 af      sta $af          	STA	FAC1_3		; save FAC1 mantissa3
+.d421  b9 02 00   lda $0002,y      	LDA	PLUS_2,Y		; get FACY mantissa2
+.d424  f5 02      sbc $02,x        	SBC	PLUS_2,X		; subtract FACX mantissa2
+.d426  85 ae      sta $ae          	STA	FAC1_2		; save FAC1 mantissa2
+.d428  b9 01 00   lda $0001,y      	LDA	PLUS_1,Y		; get FACY mantissa1
+.d42b  f5 01      sbc $01,x        	SBC	PLUS_1,X		; subtract FACX mantissa1
+.d42d  85 ad      sta $ad          	STA	FAC1_1		; save FAC1 mantissa1
+.d42f                              lab_24d0
+.d42f  b0 03      bcs $d434        	BCS	LAB_24D5		; branch if number is +ve
+.d431  20 96 d4   jsr $d496        	JSR	LAB_2537		; negate FAC1
+.d434                              lab_24d5
+.d434  a0 00      ldy #$00         	LDY	#$00			; clear Y
+.d436  98         tya              	TYA				; clear A
+.d437  18         clc              	CLC				; clear carry for add
+.d438                              lab_24d9
+.d438  a6 ad      ldx $ad          	LDX	FAC1_1		; get FAC1 mantissa1
+.d43a  d0 3e      bne $d47a        	BNE	LAB_251B		; if not zero normalise FAC1
+.d43c  a6 ae      ldx $ae          	LDX	FAC1_2		; get FAC1 mantissa2
+.d43e  86 ad      stx $ad          	STX	FAC1_1		; save FAC1 mantissa1
+.d440  a6 af      ldx $af          	LDX	FAC1_3		; get FAC1 mantissa3
+.d442  86 ae      stx $ae          	STX	FAC1_2		; save FAC1 mantissa2
+.d444  a6 b9      ldx $b9          	LDX	FAC1_r		; get FAC1 rounding byte
+.d446  86 af      stx $af          	STX	FAC1_3		; save FAC1 mantissa3
+.d448  84 b9      sty $b9          	STY	FAC1_r		; clear FAC1 rounding byte
+.d44a  69 08      adc #$08         	ADC	#$08			; add x to exponent offset
+.d44c  c9 18      cmp #$18         	CMP	#$18			; compare with $18 (max offset, all bits would be =0)
+.d44e  d0 e8      bne $d438        	BNE	LAB_24D9		; loop if not max
+.d450                              lab_24f1
+.d450  a9 00      lda #$00         	LDA	#$00			; clear A
+.d452                              lab_24f3
+.d452  85 ac      sta $ac          	STA	FAC1_e		; set FAC1 exponent
+.d454                              lab_24f5
+.d454  85 b0      sta $b0          	STA	FAC1_s		; save FAC1 sign (b7)
+.d456  60         rts              	RTS
+.d457                              lab_24f8
+.d457  65 a3      adc $a3          	ADC	FAC2_r		; add FAC2 rounding byte
+.d459  85 b9      sta $b9          	STA	FAC1_r		; save FAC1 rounding byte
+.d45b  a5 af      lda $af          	LDA	FAC1_3		; get FAC1 mantissa3
+.d45d  65 b6      adc $b6          	ADC	FAC2_3		; add FAC2 mantissa3
+.d45f  85 af      sta $af          	STA	FAC1_3		; save FAC1 mantissa3
+.d461  a5 ae      lda $ae          	LDA	FAC1_2		; get FAC1 mantissa2
+.d463  65 b5      adc $b5          	ADC	FAC2_2		; add FAC2 mantissa2
+.d465  85 ae      sta $ae          	STA	FAC1_2		; save FAC1 mantissa2
+.d467  a5 ad      lda $ad          	LDA	FAC1_1		; get FAC1 mantissa1
+.d469  65 b4      adc $b4          	ADC	FAC2_1		; add FAC2 mantissa1
+.d46b  85 ad      sta $ad          	STA	FAC1_1		; save FAC1 mantissa1
+.d46d  b0 1a      bcs $d489        	BCS	LAB_252A		; if carry then normalise FAC1 for C=1
+.d46f  60         rts              	RTS				; else just exit
+.d470                              lab_2511
+.d470  69 01      adc #$01         	ADC	#$01			; add 1 to exponent offset
+.d472  06 b9      asl $b9          	ASL	FAC1_r		; shift FAC1 rounding byte
+.d474  26 af      rol $af          	ROL	FAC1_3		; shift FAC1 mantissa3
+.d476  26 ae      rol $ae          	ROL	FAC1_2		; shift FAC1 mantissa2
+.d478  26 ad      rol $ad          	ROL	FAC1_1		; shift FAC1 mantissa1
+.d47a                              lab_251b
+.d47a  10 f4      bpl $d470        	BPL	LAB_2511		; loop if not normalised
+.d47c  38         sec              	SEC				; set carry for subtract
+.d47d  e5 ac      sbc $ac          	SBC	FAC1_e		; subtract FAC1 exponent
+.d47f  b0 cf      bcs $d450        	BCS	LAB_24F1		; branch if underflow (set result = $0)
+.d481  49 ff      eor #$ff         	EOR	#$FF			; complement exponent
+.d483  69 01      adc #$01         	ADC	#$01			; +1 (twos complement)
+.d485  85 ac      sta $ac          	STA	FAC1_e		; save FAC1 exponent
+.d487                              lab_2528
+.d487  90 0c      bcc $d495        	BCC	LAB_2536		; exit if no overflow
+.d489                              lab_252a
+.d489  e6 ac      inc $ac          	INC	FAC1_e		; increment FAC1 exponent
+.d48b  f0 36      beq $d4c3        	BEQ	LAB_2564		; if zero do overflow error and warm start
+.d48d  66 ad      ror $ad          	ROR	FAC1_1		; shift FAC1 mantissa1
+.d48f  66 ae      ror $ae          	ROR	FAC1_2		; shift FAC1 mantissa2
+.d491  66 af      ror $af          	ROR	FAC1_3		; shift FAC1 mantissa3
+.d493  66 b9      ror $b9          	ROR	FAC1_r		; shift FAC1 rounding byte
+.d495                              lab_2536
+.d495  60         rts              	RTS
+.d496                              lab_2537
+.d496  a5 b0      lda $b0          	LDA	FAC1_s		; get FAC1 sign (b7)
+.d498  49 ff      eor #$ff         	EOR	#$FF			; complement it
+.d49a  85 b0      sta $b0          	STA	FAC1_s		; save FAC1 sign (b7)
+.d49c                              lab_253d
+.d49c  a5 ad      lda $ad          	LDA	FAC1_1		; get FAC1 mantissa1
+.d49e  49 ff      eor #$ff         	EOR	#$FF			; complement it
+.d4a0  85 ad      sta $ad          	STA	FAC1_1		; save FAC1 mantissa1
+.d4a2  a5 ae      lda $ae          	LDA	FAC1_2		; get FAC1 mantissa2
+.d4a4  49 ff      eor #$ff         	EOR	#$FF			; complement it
+.d4a6  85 ae      sta $ae          	STA	FAC1_2		; save FAC1 mantissa2
+.d4a8  a5 af      lda $af          	LDA	FAC1_3		; get FAC1 mantissa3
+.d4aa  49 ff      eor #$ff         	EOR	#$FF			; complement it
+.d4ac  85 af      sta $af          	STA	FAC1_3		; save FAC1 mantissa3
+.d4ae  a5 b9      lda $b9          	LDA	FAC1_r		; get FAC1 rounding byte
+.d4b0  49 ff      eor #$ff         	EOR	#$FF			; complement it
+.d4b2  85 b9      sta $b9          	STA	FAC1_r		; save FAC1 rounding byte
+.d4b4  e6 b9      inc $b9          	INC	FAC1_r		; increment FAC1 rounding byte
+.d4b6  d0 0a      bne $d4c2        	BNE	LAB_2563		; exit if no overflow
+.d4b8                              lab_2559
+.d4b8  e6 af      inc $af          	INC	FAC1_3		; increment FAC1 mantissa3
+.d4ba  d0 06      bne $d4c2        	BNE	LAB_2563		; finished if no rollover
+.d4bc  e6 ae      inc $ae          	INC	FAC1_2		; increment FAC1 mantissa2
+.d4be  d0 02      bne $d4c2        	BNE	LAB_2563		; finished if no rollover
+.d4c0  e6 ad      inc $ad          	INC	FAC1_1		; increment FAC1 mantissa1
+.d4c2                              lab_2563
+.d4c2  60         rts              	RTS
+.d4c3                              lab_2564
+.d4c3  a2 0a      ldx #$0a         	LDX	#$0A			; error code $0A ("Overflow" error)
+.d4c5  4c 3c bf   jmp $bf3c        	JMP	LAB_XERR		; do error #X, then warm start
+.d4c8                              lab_2569
+.d4c8  a2 74      ldx #$74         	LDX	#FACt_1-1		; set offset to FACtemp
+.d4ca                              lab_256b
+.d4ca  b4 03      ldy $03,x        	LDY	PLUS_3,X		; get FACX mantissa3
+.d4cc  84 b9      sty $b9          	STY	FAC1_r		; save as FAC1 rounding byte
+.d4ce  b4 02      ldy $02,x        	LDY	PLUS_2,X		; get FACX mantissa2
+.d4d0  94 03      sty $03,x        	STY	PLUS_3,X		; save FACX mantissa3
+.d4d2  b4 01      ldy $01,x        	LDY	PLUS_1,X		; get FACX mantissa1
+.d4d4  94 02      sty $02,x        	STY	PLUS_2,X		; save FACX mantissa2
+.d4d6  a4 b2      ldy $b2          	LDY	FAC1_o		; get FAC1 overflow byte
+.d4d8  94 01      sty $01,x        	STY	PLUS_1,X		; save FACX mantissa1
+.d4da                              lab_257b
+.d4da  69 08      adc #$08         	ADC	#$08			; add 8 to shift count
+.d4dc  30 ec      bmi $d4ca        	BMI	LAB_256B		; go do 8 shift if still -ve
+.d4de  f0 ea      beq $d4ca        	BEQ	LAB_256B		; go do 8 shift if zero
+.d4e0  e9 08      sbc #$08         	SBC	#$08			; else subtract 8 again
+.d4e2  a8         tay              	TAY				; save count to Y
+.d4e3  a5 b9      lda $b9          	LDA	FAC1_r		; get FAC1 rounding byte
+.d4e5  b0 12      bcs $d4f9        	BCS	LAB_259A		;.
+.d4e7                              lab_2588
+.d4e7  16 01      asl $01,x        	ASL	PLUS_1,X		; shift FACX mantissa1
+.d4e9  90 02      bcc $d4ed        	BCC	LAB_258E		; branch if +ve
+.d4eb  f6 01      inc $01,x        	INC	PLUS_1,X		; this sets b7 eventually
+.d4ed                              lab_258e
+.d4ed  76 01      ror $01,x        	ROR	PLUS_1,X		; shift FACX mantissa1 (correct for ASL)
+.d4ef  76 01      ror $01,x        	ROR	PLUS_1,X		; shift FACX mantissa1 (put carry in b7)
+.d4f1                              lab_2592
+.d4f1  76 02      ror $02,x        	ROR	PLUS_2,X		; shift FACX mantissa2
+.d4f3  76 03      ror $03,x        	ROR	PLUS_3,X		; shift FACX mantissa3
+.d4f5  6a         ror              	ROR				; shift FACX rounding byte
+.d4f6  c8         iny              	INY				; increment exponent diff
+.d4f7  d0 ee      bne $d4e7        	BNE	LAB_2588		; branch if range adjust not complete
+.d4f9                              lab_259a
+.d4f9  18         clc              	CLC				; just clear it
+.d4fa  60         rts              	RTS
+.d4fb                              lab_log
+.d4fb  20 e9 d6   jsr $d6e9        	JSR	LAB_27CA		; test sign and zero
+.d4fe  f0 02      beq $d502        	BEQ	LAB_25C4		; if zero do function call error then warm start
+.d500  10 03      bpl $d505        	BPL	LAB_25C7		; skip error if +ve
+.d502                              lab_25c4
+.d502  4c 29 cd   jmp $cd29        	JMP	LAB_FCER		; do function call error then warm start (-ve)
+.d505                              lab_25c7
+.d505  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.d507  e9 7f      sbc #$7f         	SBC	#$7F			; normalise it
+.d509  48         pha              	PHA				; save it
+.d50a  a9 80      lda #$80         	LDA	#$80			; set exponent to zero
+.d50c  85 ac      sta $ac          	STA	FAC1_e		; save FAC1 exponent
+.d50e  a9 69      lda #$69         	LDA	#<LAB_25AD		; set 1/root2 pointer low byte
+.d510  a0 df      ldy #$df         	LDY	#>LAB_25AD		; set 1/root2 pointer high byte
+.d512  20 be d3   jsr $d3be        	JSR	LAB_246C		; add (AY) to FAC1 (1/root2)
+.d515  a9 6d      lda #$6d         	LDA	#<LAB_25B1		; set root2 pointer low byte
+.d517  a0 df      ldy #$df         	LDY	#>LAB_25B1		; set root2 pointer high byte
+.d519  20 01 d6   jsr $d601        	JSR	LAB_26CA		; convert AY and do (AY)/FAC1 (root2/(x+(1/root2)))
+.d51c  a9 e0      lda #$e0         	LDA	#<LAB_259C		; set 1 pointer low byte
+.d51e  a0 df      ldy #$df         	LDY	#>LAB_259C		; set 1 pointer high byte
+.d520  20 a3 d3   jsr $d3a3        	JSR	LAB_2455		; subtract (AY) from FAC1 ((root2/(x+(1/root2)))-1)
+.d523  a9 5c      lda #$5c         	LDA	#<LAB_25A0		; set pointer low byte to counter
+.d525  a0 df      ldy #$df         	LDY	#>LAB_25A0		; set pointer high byte to counter
+.d527  20 51 da   jsr $da51        	JSR	LAB_2B6E		; ^2 then series evaluation
+.d52a  a9 71      lda #$71         	LDA	#<LAB_25B5		; set -0.5 pointer low byte
+.d52c  a0 df      ldy #$df         	LDY	#>LAB_25B5		; set -0.5 pointer high byte
+.d52e  20 be d3   jsr $d3be        	JSR	LAB_246C		; add (AY) to FAC1
+.d531  68         pla              	PLA				; restore FAC1 exponent
+.d532  20 45 d8   jsr $d845        	JSR	LAB_2912		; evaluate new ASCII digit
+.d535  a9 75      lda #$75         	LDA	#<LAB_25B9		; set LOG(2) pointer low byte
+.d537  a0 df      ldy #$df         	LDY	#>LAB_25B9		; set LOG(2) pointer high byte
+.d539                              lab_25fb
+.d539  20 8b d5   jsr $d58b        	JSR	LAB_264D		; unpack memory (AY) into FAC2
+.d53c                              lab_multiply
+.d53c  f0 4c      beq $d58a        	BEQ	LAB_264C		; exit if zero
+.d53e  20 b1 d5   jsr $d5b1        	JSR	LAB_2673		; test and adjust accumulators
+.d541  a9 00      lda #$00         	LDA	#$00			; clear A
+.d543  85 75      sta $75          	STA	FACt_1		; clear temp mantissa1
+.d545  85 76      sta $76          	STA	FACt_2		; clear temp mantissa2
+.d547  85 77      sta $77          	STA	FACt_3		; clear temp mantissa3
+.d549  a5 b9      lda $b9          	LDA	FAC1_r		; get FAC1 rounding byte
+.d54b  20 60 d5   jsr $d560        	JSR	LAB_2622		; go do shift/add FAC2
+.d54e  a5 af      lda $af          	LDA	FAC1_3		; get FAC1 mantissa3
+.d550  20 60 d5   jsr $d560        	JSR	LAB_2622		; go do shift/add FAC2
+.d553  a5 ae      lda $ae          	LDA	FAC1_2		; get FAC1 mantissa2
+.d555  20 60 d5   jsr $d560        	JSR	LAB_2622		; go do shift/add FAC2
+.d558  a5 ad      lda $ad          	LDA	FAC1_1		; get FAC1 mantissa1
+.d55a  20 65 d5   jsr $d565        	JSR	LAB_2627		; go do shift/add FAC2
+.d55d  4c 6e d6   jmp $d66e        	JMP	LAB_273C		; copy temp to FAC1, normalise and return
+.d560                              lab_2622
+.d560  d0 03      bne $d565        	BNE	LAB_2627		; branch if byte <> zero
+.d562  4c c8 d4   jmp $d4c8        	JMP	LAB_2569		; shift FCAtemp << A+8 times
+.d565                              lab_2627
+.d565  4a         lsr              	LSR				; shift byte
+.d566  09 80      ora #$80         	ORA	#$80			; set top bit (mark for 8 times)
+.d568                              lab_262a
+.d568  a8         tay              	TAY				; copy result
+.d569  90 13      bcc $d57e        	BCC	LAB_2640		; skip next if bit was zero
+.d56b  18         clc              	CLC				; clear carry for add
+.d56c  a5 77      lda $77          	LDA	FACt_3		; get temp mantissa3
+.d56e  65 b6      adc $b6          	ADC	FAC2_3		; add FAC2 mantissa3
+.d570  85 77      sta $77          	STA	FACt_3		; save temp mantissa3
+.d572  a5 76      lda $76          	LDA	FACt_2		; get temp mantissa2
+.d574  65 b5      adc $b5          	ADC	FAC2_2		; add FAC2 mantissa2
+.d576  85 76      sta $76          	STA	FACt_2		; save temp mantissa2
+.d578  a5 75      lda $75          	LDA	FACt_1		; get temp mantissa1
+.d57a  65 b4      adc $b4          	ADC	FAC2_1		; add FAC2 mantissa1
+.d57c  85 75      sta $75          	STA	FACt_1		; save temp mantissa1
+.d57e                              lab_2640
+.d57e  66 75      ror $75          	ROR	FACt_1		; shift temp mantissa1
+.d580  66 76      ror $76          	ROR	FACt_2		; shift temp mantissa2
+.d582  66 77      ror $77          	ROR	FACt_3		; shift temp mantissa3
+.d584  66 b9      ror $b9          	ROR	FAC1_r		; shift temp rounding byte
+.d586  98         tya              	TYA				; get byte back
+.d587  4a         lsr              	LSR				; shift byte
+.d588  d0 de      bne $d568        	BNE	LAB_262A		; loop if all bits not done
+.d58a                              lab_264c
+.d58a  60         rts              	RTS
+.d58b                              lab_264d
+.d58b  85 71      sta $71          	STA	ut1_pl		; save pointer low byte
+.d58d  84 72      sty $72          	STY	ut1_ph		; save pointer high byte
+.d58f  a0 03      ldy #$03         	LDY	#$03			; 4 bytes to get (0-3)
+.d591  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get mantissa3
+.d593  85 b6      sta $b6          	STA	FAC2_3		; save FAC2 mantissa3
+.d595  88         dey              	DEY				; decrement index
+.d596  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get mantissa2
+.d598  85 b5      sta $b5          	STA	FAC2_2		; save FAC2 mantissa2
+.d59a  88         dey              	DEY				; decrement index
+.d59b  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get mantissa1+sign
+.d59d  85 b7      sta $b7          	STA	FAC2_s		; save FAC2 sign (b7)
+.d59f  45 b0      eor $b0          	EOR	FAC1_s		; EOR with FAC1 sign (b7)
+.d5a1  85 b8      sta $b8          	STA	FAC_sc		; save sign compare (FAC1 EOR FAC2)
+.d5a3  a5 b7      lda $b7          	LDA	FAC2_s		; recover FAC2 sign (b7)
+.d5a5  09 80      ora #$80         	ORA	#$80			; set 1xxx xxx (set normal bit)
+.d5a7  85 b4      sta $b4          	STA	FAC2_1		; save FAC2 mantissa1
+.d5a9  88         dey              	DEY				; decrement index
+.d5aa  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get exponent byte
+.d5ac  85 b3      sta $b3          	STA	FAC2_e		; save FAC2 exponent
+.d5ae  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.d5b0  60         rts              	RTS
+.d5b1                              lab_2673
+.d5b1  a5 b3      lda $b3          	LDA	FAC2_e		; get FAC2 exponent
+.d5b3                              lab_2675
+.d5b3  f0 1d      beq $d5d2        	BEQ	LAB_2696		; branch if FAC2 = $00 (handle underflow)
+.d5b5  18         clc              	CLC				; clear carry for add
+.d5b6  65 ac      adc $ac          	ADC	FAC1_e		; add FAC1 exponent
+.d5b8  90 04      bcc $d5be        	BCC	LAB_2680		; branch if sum of exponents <$0100
+.d5ba  30 31      bmi $d5ed        	BMI	LAB_269B		; do overflow error
+.d5bc  18         clc              	CLC				; clear carry for the add
+
+>d5bd  2c                          	.byte	$2C			; makes next line BIT $1410
+.d5be                              lab_2680
+
+.d5be  10 12      bpl $d5d2        	BPL	LAB_2696		; if +ve go handle underflow
+.d5c0  69 80      adc #$80         	ADC	#$80			; adjust exponent
+.d5c2  85 ac      sta $ac          	STA	FAC1_e		; save FAC1 exponent
+.d5c4  d0 03      bne $d5c9        	BNE	LAB_268B		; branch if not zero
+.d5c6  4c 54 d4   jmp $d454        	JMP	LAB_24F5		; save FAC1 sign and return
+.d5c9                              lab_268b
+.d5c9  a5 b8      lda $b8          	LDA	FAC_sc		; get sign compare (FAC1 EOR FAC2)
+.d5cb  85 b0      sta $b0          	STA	FAC1_s		; save FAC1 sign (b7)
+.d5cd                              lab_268f
+.d5cd  60         rts              	RTS
+.d5ce                              lab_2690
+.d5ce  a5 b0      lda $b0          	LDA	FAC1_s		; get FAC1 sign (b7)
+.d5d0  10 1b      bpl $d5ed        	BPL	LAB_269B		; do overflow error
+.d5d2                              lab_2696
+.d5d2  68         pla              	PLA				; pop return address low byte
+.d5d3  68         pla              	PLA				; pop return address high byte
+.d5d4  4c 50 d4   jmp $d450        	JMP	LAB_24F1		; clear FAC1 exponent and sign and return
+.d5d7                              lab_269e
+.d5d7  20 ca d6   jsr $d6ca        	JSR	LAB_27AB		; round and copy FAC1 to FAC2
+.d5da  aa         tax              	TAX				; copy exponent (set the flags)
+.d5db  f0 f0      beq $d5cd        	BEQ	LAB_268F		; exit if zero
+.d5dd  18         clc              	CLC				; clear carry for add
+.d5de  69 02      adc #$02         	ADC	#$02			; add two to exponent (*4)
+.d5e0  b0 0b      bcs $d5ed        	BCS	LAB_269B		; do overflow error if > $FF
+.d5e2  a2 00      ldx #$00         	LDX	#$00			; clear byte
+.d5e4  86 b8      stx $b8          	STX	FAC_sc		; clear sign compare (FAC1 EOR FAC2)
+.d5e6  20 db d3   jsr $d3db        	JSR	LAB_247C		; add FAC2 to FAC1 (*5)
+.d5e9  e6 ac      inc $ac          	INC	FAC1_e		; increment FAC1 exponent (*10)
+.d5eb  d0 e0      bne $d5cd        	BNE	LAB_268F		; if non zero just do RTS
+.d5ed                              lab_269b
+.d5ed  4c c3 d4   jmp $d4c3        	JMP	LAB_2564		; do overflow error and warm start
+.d5f0                              lab_26b9
+.d5f0  20 ca d6   jsr $d6ca        	JSR	LAB_27AB		; round and copy FAC1 to FAC2
+.d5f3  a9 f1      lda #$f1         	LDA	#<LAB_26B5		; set pointer to 10d low addr
+.d5f5  a0 df      ldy #$df         	LDY	#>LAB_26B5		; set pointer to 10d high addr
+.d5f7  a2 00      ldx #$00         	LDX	#$00			; clear sign
+.d5f9                              lab_26c2
+.d5f9  86 b8      stx $b8          	STX	FAC_sc		; save sign compare (FAC1 EOR FAC2)
+.d5fb  20 7d d6   jsr $d67d        	JSR	LAB_UFAC		; unpack memory (AY) into FAC1
+.d5fe  4c 04 d6   jmp $d604        	JMP	LAB_DIVIDE		; do FAC2/FAC1
+.d601                              lab_26ca
+.d601  20 8b d5   jsr $d58b        	JSR	LAB_264D		; unpack memory (AY) into FAC2
+.d604                              lab_divide
+.d604  f0 63      beq $d669        	BEQ	LAB_2737		; if zero go do /0 error
+.d606  20 d9 d6   jsr $d6d9        	JSR	LAB_27BA		; round FAC1
+.d609  a9 00      lda #$00         	LDA	#$00			; clear A
+.d60b  38         sec              	SEC				; set carry for subtract
+.d60c  e5 ac      sbc $ac          	SBC	FAC1_e		; subtract FAC1 exponent (2s complement)
+.d60e  85 ac      sta $ac          	STA	FAC1_e		; save FAC1 exponent
+.d610  20 b1 d5   jsr $d5b1        	JSR	LAB_2673		; test and adjust accumulators
+.d613  e6 ac      inc $ac          	INC	FAC1_e		; increment FAC1 exponent
+.d615  f0 d6      beq $d5ed        	BEQ	LAB_269B		; if zero do overflow error
+.d617  a2 ff      ldx #$ff         	LDX	#$FF			; set index for pre increment
+.d619  a9 01      lda #$01         	LDA	#$01			; set bit to flag byte save
+.d61b                              lab_26e4
+.d61b  a4 b4      ldy $b4          	LDY	FAC2_1		; get FAC2 mantissa1
+.d61d  c4 ad      cpy $ad          	CPY	FAC1_1		; compare FAC1 mantissa1
+.d61f  d0 0a      bne $d62b        	BNE	LAB_26F4		; branch if <>
+.d621  a4 b5      ldy $b5          	LDY	FAC2_2		; get FAC2 mantissa2
+.d623  c4 ae      cpy $ae          	CPY	FAC1_2		; compare FAC1 mantissa2
+.d625  d0 04      bne $d62b        	BNE	LAB_26F4		; branch if <>
+.d627  a4 b6      ldy $b6          	LDY	FAC2_3		; get FAC2 mantissa3
+.d629  c4 af      cpy $af          	CPY	FAC1_3		; compare FAC1 mantissa3
+.d62b                              lab_26f4
+.d62b  08         php              	PHP				; save FAC2-FAC1 compare status
+.d62c  2a         rol              	ROL				; shift the result byte
+.d62d  90 0e      bcc $d63d        	BCC	LAB_2702		; if no carry skip the byte save
+.d62f  a0 01      ldy #$01         	LDY	#$01			; set bit to flag byte save
+.d631  e8         inx              	INX				; else increment the index to FACt
+.d632  e0 02      cpx #$02         	CPX	#$02			; compare with the index to FACt_3
+.d634  30 04      bmi $d63a        	BMI	LAB_2701		; if not last byte just go save it
+.d636  d0 28      bne $d660        	BNE	LAB_272B		; if all done go save FAC1 rounding byte, normalise and
+.d638  a0 40      ldy #$40         	LDY	#$40			; set bit to flag byte save for the rounding byte
+.d63a                              lab_2701
+.d63a  95 75      sta $75,x        	STA	FACt_1,X		; write result byte to FACt_1 + index
+.d63c  98         tya              	TYA				; copy the next save byte flag
+.d63d                              lab_2702
+.d63d  28         plp              	PLP				; restore FAC2-FAC1 compare status
+.d63e  90 14      bcc $d654        	BCC	LAB_2704		; if FAC2 < FAC1 then skip the subtract
+.d640  a8         tay              	TAY				; save FAC2-FAC1 compare status
+.d641  a5 b6      lda $b6          	LDA	FAC2_3		; get FAC2 mantissa3
+.d643  e5 af      sbc $af          	SBC	FAC1_3		; subtract FAC1 mantissa3
+.d645  85 b6      sta $b6          	STA	FAC2_3		; save FAC2 mantissa3
+.d647  a5 b5      lda $b5          	LDA	FAC2_2		; get FAC2 mantissa2
+.d649  e5 ae      sbc $ae          	SBC	FAC1_2		; subtract FAC1 mantissa2
+.d64b  85 b5      sta $b5          	STA	FAC2_2		; save FAC2 mantissa2
+.d64d  a5 b4      lda $b4          	LDA	FAC2_1		; get FAC2 mantissa1
+.d64f  e5 ad      sbc $ad          	SBC	FAC1_1		; subtract FAC1 mantissa1
+.d651  85 b4      sta $b4          	STA	FAC2_1		; save FAC2 mantissa1
+.d653  98         tya              	TYA				; restore FAC2-FAC1 compare status
+.d654                              lab_2704
+.d654  06 b6      asl $b6          	ASL	FAC2_3		; shift FAC2 mantissa3
+.d656  26 b5      rol $b5          	ROL	FAC2_2		; shift FAC2 mantissa2
+.d658  26 b4      rol $b4          	ROL	FAC2_1		; shift FAC2 mantissa1
+.d65a  b0 cf      bcs $d62b        	BCS	LAB_26F4		; loop with no compare
+.d65c  30 bd      bmi $d61b        	BMI	LAB_26E4		; loop with compare
+.d65e  10 cb      bpl $d62b        	BPL	LAB_26F4		; loop always with no compare
+.d660                              lab_272b
+.d660  4a         lsr              	LSR				; shift b1 - b0 ..
+.d661  6a         ror              	ROR				; ..
+.d662  6a         ror              	ROR				; .. to b7 - b6
+.d663  85 b9      sta $b9          	STA	FAC1_r		; save FAC1 rounding byte
+.d665  28         plp              	PLP				; dump FAC2-FAC1 compare status
+.d666  4c 6e d6   jmp $d66e        	JMP	LAB_273C		; copy temp to FAC1, normalise and return
+.d669                              lab_2737
+.d669  a2 14      ldx #$14         	LDX	#$14			; error code $14 ("Divide by zero" error)
+.d66b  4c 3c bf   jmp $bf3c        	JMP	LAB_XERR		; do error #X, then warm start
+.d66e                              lab_273c
+.d66e  a5 75      lda $75          	LDA	FACt_1		; get temp mantissa1
+.d670  85 ad      sta $ad          	STA	FAC1_1		; save FAC1 mantissa1
+.d672  a5 76      lda $76          	LDA	FACt_2		; get temp mantissa2
+.d674  85 ae      sta $ae          	STA	FAC1_2		; save FAC1 mantissa2
+.d676  a5 77      lda $77          	LDA	FACt_3		; get temp mantissa3
+.d678  85 af      sta $af          	STA	FAC1_3		; save FAC1 mantissa3
+.d67a  4c 34 d4   jmp $d434        	JMP	LAB_24D5		; normalise FAC1 and return
+.d67d                              lab_ufac
+.d67d  85 71      sta $71          	STA	ut1_pl		; save pointer low byte
+.d67f  84 72      sty $72          	STY	ut1_ph		; save pointer high byte
+.d681  a0 03      ldy #$03         	LDY	#$03			; 4 bytes to do
+.d683  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get last byte
+.d685  85 af      sta $af          	STA	FAC1_3		; save FAC1 mantissa3
+.d687  88         dey              	DEY				; decrement index
+.d688  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get last-1 byte
+.d68a  85 ae      sta $ae          	STA	FAC1_2		; save FAC1 mantissa2
+.d68c  88         dey              	DEY				; decrement index
+.d68d  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get second byte
+.d68f  85 b0      sta $b0          	STA	FAC1_s		; save FAC1 sign (b7)
+.d691  09 80      ora #$80         	ORA	#$80			; set 1xxx xxxx (add normal bit)
+.d693  85 ad      sta $ad          	STA	FAC1_1		; save FAC1 mantissa1
+.d695  88         dey              	DEY				; decrement index
+.d696  b1 71      lda ($71),y      	LDA	(ut1_pl),Y		; get first byte (exponent)
+.d698  85 ac      sta $ac          	STA	FAC1_e		; save FAC1 exponent
+.d69a  84 b9      sty $b9          	STY	FAC1_r		; clear FAC1 rounding byte
+.d69c  60         rts              	RTS
+.d69d                              lab_276e
+.d69d  a2 a4      ldx #$a4         	LDX	#<Adatal		; set pointer low byte
+.d69f                              lab_2770
+.d69f  a0 00      ldy #$00         	LDY	#>Adatal		; set pointer high byte
+.d6a1  f0 04      beq $d6a7        	BEQ	LAB_2778		; pack FAC1 into (XY) and return
+.d6a3                              lab_pfac
+.d6a3  a6 97      ldx $97          	LDX	Lvarpl		; get destination pointer low byte
+.d6a5  a4 98      ldy $98          	LDY	Lvarph		; get destination pointer high byte
+.d6a7                              lab_2778
+.d6a7  20 d9 d6   jsr $d6d9        	JSR	LAB_27BA		; round FAC1
+.d6aa  86 71      stx $71          	STX	ut1_pl		; save pointer low byte
+.d6ac  84 72      sty $72          	STY	ut1_ph		; save pointer high byte
+.d6ae  a0 03      ldy #$03         	LDY	#$03			; set index
+.d6b0  a5 af      lda $af          	LDA	FAC1_3		; get FAC1 mantissa3
+.d6b2  91 71      sta ($71),y      	STA	(ut1_pl),Y		; store in destination
+.d6b4  88         dey              	DEY				; decrement index
+.d6b5  a5 ae      lda $ae          	LDA	FAC1_2		; get FAC1 mantissa2
+.d6b7  91 71      sta ($71),y      	STA	(ut1_pl),Y		; store in destination
+.d6b9  88         dey              	DEY				; decrement index
+.d6ba  a5 b0      lda $b0          	LDA	FAC1_s		; get FAC1 sign (b7)
+.d6bc  09 7f      ora #$7f         	ORA	#$7F			; set bits x111 1111
+.d6be  25 ad      and $ad          	AND	FAC1_1		; AND in FAC1 mantissa1
+.d6c0  91 71      sta ($71),y      	STA	(ut1_pl),Y		; store in destination
+.d6c2  88         dey              	DEY				; decrement index
+.d6c3  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.d6c5  91 71      sta ($71),y      	STA	(ut1_pl),Y		; store in destination
+.d6c7  84 b9      sty $b9          	STY	FAC1_r		; clear FAC1 rounding byte
+.d6c9  60         rts              	RTS
+.d6ca                              lab_27ab
+.d6ca  20 d9 d6   jsr $d6d9        	JSR	LAB_27BA		; round FAC1
+.d6cd                              lab_27ae
+.d6cd  a2 05      ldx #$05         	LDX	#$05			; 5 bytes to copy
+.d6cf                              lab_27b0
+.d6cf  b5 ab      lda $ab,x        	LDA	FAC1_e-1,X		; get byte from FAC1,X
+.d6d1  95 b2      sta $b2,x        	STA	FAC1_o,X		; save byte at FAC2,X
+.d6d3  ca         dex              	DEX				; decrement count
+.d6d4  d0 f9      bne $d6cf        	BNE	LAB_27B0		; loop if not all done
+.d6d6  86 b9      stx $b9          	STX	FAC1_r		; clear FAC1 rounding byte
+.d6d8                              lab_27b9
+.d6d8  60         rts              	RTS
+.d6d9                              lab_27ba
+.d6d9  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.d6db  f0 fb      beq $d6d8        	BEQ	LAB_27B9		; exit if zero
+.d6dd  06 b9      asl $b9          	ASL	FAC1_r		; shift FAC1 rounding byte
+.d6df  90 f7      bcc $d6d8        	BCC	LAB_27B9		; exit if no overflow
+.d6e1                              lab_27c2
+.d6e1  20 b8 d4   jsr $d4b8        	JSR	LAB_2559		; increment FAC1 mantissa
+.d6e4  d0 f2      bne $d6d8        	BNE	LAB_27B9		; branch if no overflow
+.d6e6  4c 89 d4   jmp $d489        	JMP	LAB_252A		; normalise FAC1 for C=1 and return
+.d6e9                              lab_27ca
+.d6e9  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.d6eb  f0 09      beq $d6f6        	BEQ	LAB_27D7		; exit if zero (already correct SGN(0)=0)
+.d6ed                              lab_27ce
+.d6ed  a5 b0      lda $b0          	LDA	FAC1_s		; else get FAC1 sign (b7)
+.d6ef                              lab_27d0
+.d6ef  2a         rol              	ROL				; move sign bit to carry
+.d6f0  a9 ff      lda #$ff         	LDA	#$FF			; set byte for -ve result
+.d6f2  b0 02      bcs $d6f6        	BCS	LAB_27D7		; return if sign was set (-ve)
+.d6f4  a9 01      lda #$01         	LDA	#$01			; else set byte for +ve result
+.d6f6                              lab_27d7
+.d6f6  60         rts              	RTS
+.d6f7                              lab_sgn
+.d6f7  20 e9 d6   jsr $d6e9        	JSR	LAB_27CA		; get FAC1 sign
+.d6fa                              lab_27db
+.d6fa  85 ad      sta $ad          	STA	FAC1_1		; save FAC1 mantissa1
+.d6fc  a9 00      lda #$00         	LDA	#$00			; clear A
+.d6fe  85 ae      sta $ae          	STA	FAC1_2		; clear FAC1 mantissa2
+.d700  a2 88      ldx #$88         	LDX	#$88			; set exponent
+.d702                              lab_27e3
+.d702  a5 ad      lda $ad          	LDA	FAC1_1		; get FAC1 mantissa1
+.d704  49 ff      eor #$ff         	EOR	#$FF			; complement it
+.d706  2a         rol              	ROL				; sign bit into carry
+.d707                              lab_stfa
+.d707  a9 00      lda #$00         	LDA	#$00			; clear A
+.d709  85 af      sta $af          	STA	FAC1_3		; clear FAC1 mantissa3
+.d70b  86 ac      stx $ac          	STX	FAC1_e		; set FAC1 exponent
+.d70d  85 b9      sta $b9          	STA	FAC1_r		; clear FAC1 rounding byte
+.d70f  85 b0      sta $b0          	STA	FAC1_s		; clear FAC1 sign (b7)
+.d711  4c 2f d4   jmp $d42f        	JMP	LAB_24D0		; do ABS and normalise FAC1
+.d714                              lab_abs
+.d714  46 b0      lsr $b0          	LSR	FAC1_s		; clear FAC1 sign (put zero in b7)
+.d716  60         rts              	RTS
+.d717                              lab_27f8
+.d717  85 73      sta $73          	STA	ut2_pl		; save pointer low byte
+.d719                              lab_27fa
+.d719  84 74      sty $74          	STY	ut2_ph		; save pointer high byte
+.d71b  a0 00      ldy #$00         	LDY	#$00			; clear index
+.d71d  b1 73      lda ($73),y      	LDA	(ut2_pl),Y		; get exponent
+.d71f  c8         iny              	INY				; increment index
+.d720  aa         tax              	TAX				; copy (AY) exponent to X
+.d721  f0 c6      beq $d6e9        	BEQ	LAB_27CA		; branch if (AY) exponent=0 and get FAC1 sign
+.d723  b1 73      lda ($73),y      	LDA	(ut2_pl),Y		; get (AY) mantissa1 (with sign)
+.d725  45 b0      eor $b0          	EOR	FAC1_s		; EOR FAC1 sign (b7)
+.d727  30 c4      bmi $d6ed        	BMI	LAB_27CE		; if signs <> do return A=FF,C=1/-ve
+.d729  e4 ac      cpx $ac          	CPX	FAC1_e		; compare (AY) exponent with FAC1 exponent
+.d72b  d0 1a      bne $d747        	BNE	LAB_2828		; branch if different
+.d72d  b1 73      lda ($73),y      	LDA	(ut2_pl),Y		; get (AY) mantissa1 (with sign)
+.d72f  09 80      ora #$80         	ORA	#$80			; normalise top bit
+.d731  c5 ad      cmp $ad          	CMP	FAC1_1		; compare with FAC1 mantissa1
+.d733  d0 12      bne $d747        	BNE	LAB_2828		; branch if different
+.d735  c8         iny              	INY				; increment index
+.d736  b1 73      lda ($73),y      	LDA	(ut2_pl),Y		; get mantissa2
+.d738  c5 ae      cmp $ae          	CMP	FAC1_2		; compare with FAC1 mantissa2
+.d73a  d0 0b      bne $d747        	BNE	LAB_2828		; branch if different
+.d73c  c8         iny              	INY				; increment index
+.d73d  a9 7f      lda #$7f         	LDA	#$7F			; set for 1/2 value rounding byte
+.d73f  c5 b9      cmp $b9          	CMP	FAC1_r		; compare with FAC1 rounding byte (set carry)
+.d741  b1 73      lda ($73),y      	LDA	(ut2_pl),Y		; get mantissa3
+.d743  e5 af      sbc $af          	SBC	FAC1_3		; subtract FAC1 mantissa3
+.d745  f0 28      beq $d76f        	BEQ	LAB_2850		; exit if mantissa3 equal
+.d747                              lab_2828
+.d747  a5 b0      lda $b0          	LDA	FAC1_s		; get FAC1 sign (b7)
+.d749  90 02      bcc $d74d        	BCC	LAB_282E		; branch if FAC1 > (AY)
+.d74b  49 ff      eor #$ff         	EOR	#$FF			; else toggle FAC1 sign
+.d74d                              lab_282e
+.d74d  4c ef d6   jmp $d6ef        	JMP	LAB_27D0		; return A=FF,C=1/-ve A=01,C=0/+ve
+.d750                              lab_2831
+.d750  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.d752  f0 4a      beq $d79e        	BEQ	LAB_287F		; if zero go clear FAC1 and return
+.d754  38         sec              	SEC				; set carry for subtract
+.d755  e9 98      sbc #$98         	SBC	#$98			; subtract maximum integer range exponent
+.d757  24 b0      bit $b0          	BIT	FAC1_s		; test FAC1 sign (b7)
+.d759  10 09      bpl $d764        	BPL	LAB_2845		; branch if FAC1 +ve
+.d75b  aa         tax              	TAX				; copy subtracted exponent
+.d75c  a9 ff      lda #$ff         	LDA	#$FF			; overflow for -ve number
+.d75e  85 b2      sta $b2          	STA	FAC1_o		; set FAC1 overflow byte
+.d760  20 9c d4   jsr $d49c        	JSR	LAB_253D		; twos complement FAC1 mantissa
+.d763  8a         txa              	TXA				; restore subtracted exponent
+.d764                              lab_2845
+.d764  a2 ac      ldx #$ac         	LDX	#FAC1_e		; set index to FAC1
+.d766  c9 f9      cmp #$f9         	CMP	#$F9			; compare exponent result
+.d768  10 06      bpl $d770        	BPL	LAB_2851		; if < 8 shifts shift FAC1 A times right and return
+.d76a  20 da d4   jsr $d4da        	JSR	LAB_257B		; shift FAC1 A times right (> 8 shifts)
+.d76d  84 b2      sty $b2          	STY	FAC1_o		; clear FAC1 overflow byte
+.d76f                              lab_2850
+.d76f  60         rts              	RTS
+.d770                              lab_2851
+.d770  a8         tay              	TAY				; copy shift count
+.d771  a5 b0      lda $b0          	LDA	FAC1_s		; get FAC1 sign (b7)
+.d773  29 80      and #$80         	AND	#$80			; mask sign bit only (x000 0000)
+.d775  46 ad      lsr $ad          	LSR	FAC1_1		; shift FAC1 mantissa1
+.d777  05 ad      ora $ad          	ORA	FAC1_1		; OR sign in b7 FAC1 mantissa1
+.d779  85 ad      sta $ad          	STA	FAC1_1		; save FAC1 mantissa1
+.d77b  20 f1 d4   jsr $d4f1        	JSR	LAB_2592		; shift FAC1 Y times right
+.d77e  84 b2      sty $b2          	STY	FAC1_o		; clear FAC1 overflow byte
+.d780  60         rts              	RTS
+.d781                              lab_int
+.d781  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.d783  c9 98      cmp #$98         	CMP	#$98			; compare with max int
+.d785  b0 1e      bcs $d7a5        	BCS	LAB_2886		; exit if >= (already int, too big for fractional part!)
+.d787  20 50 d7   jsr $d750        	JSR	LAB_2831		; convert FAC1 floating-to-fixed
+.d78a  84 b9      sty $b9          	STY	FAC1_r		; save FAC1 rounding byte
+.d78c  a5 b0      lda $b0          	LDA	FAC1_s		; get FAC1 sign (b7)
+.d78e  84 b0      sty $b0          	STY	FAC1_s		; save FAC1 sign (b7)
+.d790  49 80      eor #$80         	EOR	#$80			; toggle FAC1 sign
+.d792  2a         rol              	ROL				; shift into carry
+.d793  a9 98      lda #$98         	LDA	#$98			; set new exponent
+.d795  85 ac      sta $ac          	STA	FAC1_e		; save FAC1 exponent
+.d797  a5 af      lda $af          	LDA	FAC1_3		; get FAC1 mantissa3
+.d799  85 5b      sta $5b          	STA	Temp3			; save for EXP() function
+.d79b  4c 2f d4   jmp $d42f        	JMP	LAB_24D0		; do ABS and normalise FAC1
+.d79e                              lab_287f
+.d79e  85 ad      sta $ad          	STA	FAC1_1		; clear FAC1 mantissa1
+.d7a0  85 ae      sta $ae          	STA	FAC1_2		; clear FAC1 mantissa2
+.d7a2  85 af      sta $af          	STA	FAC1_3		; clear FAC1 mantissa3
+.d7a4  a8         tay              	TAY				; clear Y
+.d7a5                              lab_2886
+.d7a5  60         rts              	RTS
+.d7a6                              lab_2887
+.d7a6  a0 00      ldy #$00         	LDY	#$00			; clear Y
+.d7a8  84 5f      sty $5f          	STY	Dtypef		; clear data type flag, $FF=string, $00=numeric
+.d7aa  a2 09      ldx #$09         	LDX	#$09			; set index
+.d7ac                              lab_288b
+.d7ac  94 a8      sty $a8,x        	STY	numexp,X		; clear byte
+.d7ae  ca         dex              	DEX				; decrement index
+.d7af  10 fb      bpl $d7ac        	BPL	LAB_288B		; loop until numexp to negnum (and FAC1) = $00
+.d7b1  90 7f      bcc $d832        	BCC	LAB_28FE		; branch if 1st character numeric
+.d7b3  c9 2d      cmp #$2d         	CMP	#"-"			; else compare with "-"
+.d7b5  d0 04      bne $d7bb        	BNE	LAB_289A		; branch if not "-"
+.d7b7  86 b1      stx $b1          	STX	negnum		; set flag for -ve number (X = $FF)
+.d7b9  f0 04      beq $d7bf        	BEQ	LAB_289C		; branch always (go scan and check for hex/bin)
+.d7bb                              lab_289a
+.d7bb  c9 2b      cmp #$2b         	CMP	#"+"			; else compare with "+"
+.d7bd  d0 05      bne $d7c4        	BNE	LAB_289D		; branch if not "+" (go check for hex/bin)
+.d7bf                              lab_289c
+.d7bf  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.d7c2  90 6e      bcc $d832        	BCC	LAB_28FE		; branch if numeric character
+.d7c4                              lab_289d
+.d7c4  c9 24      cmp #$24         	CMP	#"$"			; else compare with "$"
+.d7c6  d0 03      bne $d7cb        	BNE	LAB_NHEX		; branch if not "$"
+.d7c8  4c 6e dc   jmp $dc6e        	JMP	LAB_CHEX		; branch if "$"
+.d7cb                              lab_nhex
+.d7cb  c9 25      cmp #$25         	CMP	#"%"			; else compare with "%"
+.d7cd  d0 08      bne $d7d7        	BNE	LAB_28A3		; branch if not "%" (continue original code)
+.d7cf  4c 9c dc   jmp $dc9c        	JMP	LAB_CBIN		; branch if "%"
+.d7d2                              lab_289e
+.d7d2  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory (ignore + or get next number)
+.d7d5                              lab_28a1
+.d7d5  90 5b      bcc $d832        	BCC	LAB_28FE		; branch if numeric character
+.d7d7                              lab_28a3
+.d7d7  c9 2e      cmp #$2e         	CMP	#"."			; else compare with "."
+.d7d9  f0 2e      beq $d809        	BEQ	LAB_28D5		; branch if "."
+.d7db  c9 45      cmp #$45         	CMP	#"E"			; else compare with "E"
+.d7dd  d0 30      bne $d80f        	BNE	LAB_28DB		; branch if not "E"
+.d7df  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.d7e2  90 17      bcc $d7fb        	BCC	LAB_28C7		; branch if numeric character
+.d7e4  c9 b8      cmp #$b8         	CMP	#TK_MINUS		; else compare with token for -
+.d7e6  f0 0e      beq $d7f6        	BEQ	LAB_28C2		; branch if token for -
+.d7e8  c9 2d      cmp #$2d         	CMP	#"-"			; else compare with "-"
+.d7ea  f0 0a      beq $d7f6        	BEQ	LAB_28C2		; branch if "-"
+.d7ec  c9 b7      cmp #$b7         	CMP	#TK_PLUS		; else compare with token for +
+.d7ee  f0 08      beq $d7f8        	BEQ	LAB_28C4		; branch if token for +
+.d7f0  c9 2b      cmp #$2b         	CMP	#"+"			; else compare with "+"
+.d7f2  f0 04      beq $d7f8        	BEQ	LAB_28C4		; branch if "+"
+.d7f4  d0 07      bne $d7fd        	BNE	LAB_28C9		; branch always
+.d7f6                              lab_28c2
+.d7f6  66 ab      ror $ab          	ROR	expneg		; set exponent -ve flag (C, which=1, into b7)
+.d7f8                              lab_28c4
+.d7f8  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.d7fb                              lab_28c7
+.d7fb  90 5b      bcc $d858        	BCC	LAB_2925		; branch if numeric character
+.d7fd                              lab_28c9
+.d7fd  24 ab      bit $ab          	BIT	expneg		; test exponent -ve flag
+.d7ff  10 0e      bpl $d80f        	BPL	LAB_28DB		; if +ve go evaluate exponent
+.d801  a9 00      lda #$00         	LDA	#$00			; clear result
+.d803  38         sec              	SEC				; set carry for subtract
+.d804  e5 a9      sbc $a9          	SBC	expcnt		; subtract exponent byte
+.d806  4c 11 d8   jmp $d811        	JMP	LAB_28DD		; go evaluate exponent
+.d809                              lab_28d5
+.d809  66 aa      ror $aa          	ROR	numdpf		; set decimal point flag
+.d80b  24 aa      bit $aa          	BIT	numdpf		; test decimal point flag
+.d80d  50 c3      bvc $d7d2        	BVC	LAB_289E		; branch if only one decimal point so far
+.d80f                              lab_28db
+.d80f  a5 a9      lda $a9          	LDA	expcnt		; get exponent count byte
+.d811                              lab_28dd
+.d811  38         sec              	SEC				; set carry for subtract
+.d812  e5 a8      sbc $a8          	SBC	numexp		; subtract numerator exponent
+.d814  85 a9      sta $a9          	STA	expcnt		; save exponent count byte
+.d816  f0 12      beq $d82a        	BEQ	LAB_28F6		; branch if no adjustment
+.d818  10 09      bpl $d823        	BPL	LAB_28EF		; else if +ve go do FAC1*10^expcnt
+.d81a                              lab_28e6
+.d81a  20 f0 d5   jsr $d5f0        	JSR	LAB_26B9		; divide by 10
+.d81d  e6 a9      inc $a9          	INC	expcnt		; increment exponent count byte
+.d81f  d0 f9      bne $d81a        	BNE	LAB_28E6		; loop until all done
+.d821  f0 07      beq $d82a        	BEQ	LAB_28F6		; branch always
+.d823                              lab_28ef
+.d823  20 d7 d5   jsr $d5d7        	JSR	LAB_269E		; multiply by 10
+.d826  c6 a9      dec $a9          	DEC	expcnt		; decrement exponent count byte
+.d828  d0 f9      bne $d823        	BNE	LAB_28EF		; loop until all done
+.d82a                              lab_28f6
+.d82a  a5 b1      lda $b1          	LDA	negnum		; get -ve flag
+.d82c  30 01      bmi $d82f        	BMI	LAB_28FB		; if -ve do - FAC1 and return
+.d82e  60         rts              	RTS
+.d82f                              lab_28fb
+.d82f  4c f4 d9   jmp $d9f4        	JMP	LAB_GTHAN		; do - FAC1 and return
+.d832                              lab_28fe
+.d832  48         pha              	PHA				; save character
+.d833  24 aa      bit $aa          	BIT	numdpf		; test decimal point flag
+.d835  10 02      bpl $d839        	BPL	LAB_2905		; skip exponent increment if not set
+.d837  e6 a8      inc $a8          	INC	numexp		; else increment number exponent
+.d839                              lab_2905
+.d839  20 d7 d5   jsr $d5d7        	JSR	LAB_269E		; multiply FAC1 by 10
+.d83c  68         pla              	PLA				; restore character
+.d83d  29 0f      and #$0f         	AND	#$0F			; convert to binary
+.d83f  20 45 d8   jsr $d845        	JSR	LAB_2912		; evaluate new ASCII digit
+.d842  4c d2 d7   jmp $d7d2        	JMP	LAB_289E		; go do next character
+.d845                              lab_2912
+.d845  48         pha              	PHA				; save digit
+.d846  20 ca d6   jsr $d6ca        	JSR	LAB_27AB		; round and copy FAC1 to FAC2
+.d849  68         pla              	PLA				; restore digit
+.d84a  20 fa d6   jsr $d6fa        	JSR	LAB_27DB		; save A as integer byte
+.d84d  a5 b7      lda $b7          	LDA	FAC2_s		; get FAC2 sign (b7)
+.d84f  45 b0      eor $b0          	EOR	FAC1_s		; toggle with FAC1 sign (b7)
+.d851  85 b8      sta $b8          	STA	FAC_sc		; save sign compare (FAC1 EOR FAC2)
+.d853  a6 ac      ldx $ac          	LDX	FAC1_e		; get FAC1 exponent
+.d855  4c c1 d3   jmp $d3c1        	JMP	LAB_ADD		; add FAC2 to FAC1 and return
+.d858                              lab_2925
+.d858  a5 a9      lda $a9          	LDA	expcnt		; get exponent count byte
+.d85a  c9 0a      cmp #$0a         	CMP	#$0A			; compare with 10 decimal
+.d85c  90 09      bcc $d867        	BCC	LAB_2934		; branch if less
+.d85e  a9 64      lda #$64         	LDA	#$64			; make all -ve exponents = -100 decimal (causes underflow)
+.d860  24 ab      bit $ab          	BIT	expneg		; test exponent -ve flag
+.d862  30 0e      bmi $d872        	BMI	LAB_2942		; branch if -ve
+.d864  4c c3 d4   jmp $d4c3        	JMP	LAB_2564		; else do overflow error
+.d867                              lab_2934
+.d867  0a         asl              	ASL				; * 2
+.d868  0a         asl              	ASL				; * 4
+.d869  65 a9      adc $a9          	ADC	expcnt		; * 5
+.d86b  0a         asl              	ASL				; * 10
+.d86c  a0 00      ldy #$00         	LDY	#$00			; set index
+.d86e  71 c3      adc ($c3),y      	ADC	(Bpntrl),Y		; add character (will be $30 too much!)
+.d870  e9 2f      sbc #$2f         	SBC	#"0"-1		; convert character to binary
+.d872                              lab_2942
+.d872  85 a9      sta $a9          	STA	expcnt		; save exponent count byte
+.d874  4c f8 d7   jmp $d7f8        	JMP	LAB_28C4		; go get next character
+.d877                              lab_2953
+.d877  a9 f6      lda #$f6         	LDA	#<LAB_LMSG		; point to " in line " message low byte
+.d879  a0 e5      ldy #$e5         	LDY	#>LAB_LMSG		; point to " in line " message high byte
+.d87b  20 d3 c6   jsr $c6d3        	JSR	LAB_18C3		; print null terminated string from memory
+.d87e  a5 88      lda $88          	LDA	Clineh		; get current line high byte
+.d880  a6 87      ldx $87          	LDX	Clinel		; get current line low byte
+.d882                              lab_295e
+.d882  85 ad      sta $ad          	STA	FAC1_1		; save low byte as FAC1 mantissa1
+.d884  86 ae      stx $ae          	STX	FAC1_2		; save high byte as FAC1 mantissa2
+.d886  a2 90      ldx #$90         	LDX	#$90			; set exponent to 16d bits
+.d888  38         sec              	SEC				; set integer is +ve flag
+.d889  20 07 d7   jsr $d707        	JSR	LAB_STFA		; set exp=X, clearFAC1 mantissa3 and normalise
+.d88c  a0 00      ldy #$00         	LDY	#$00			; clear index
+.d88e  98         tya              	TYA				; clear A
+.d88f  20 a2 d8   jsr $d8a2        	JSR	LAB_297B		; convert FAC1 to string, skip sign character save
+.d892  4c d3 c6   jmp $c6d3        	JMP	LAB_18C3		; print null terminated string from memory and return
+.d895                              lab_296e
+.d895  a0 01      ldy #$01         	LDY	#$01			; set index = 1
+.d897  a9 20      lda #$20         	LDA	#$20			; character = " " (assume +ve)
+.d899  24 b0      bit $b0          	BIT	FAC1_s		; test FAC1 sign (b7)
+.d89b  10 02      bpl $d89f        	BPL	LAB_2978		; branch if +ve
+.d89d  a9 2d      lda #$2d         	LDA	#$2D			; else character = "-"
+.d89f                              lab_2978
+.d89f  99 ef 00   sta $00ef,y      	STA	Decss,Y		; save leading character (" " or "-")
+.d8a2                              lab_297b
+.d8a2  85 b0      sta $b0          	STA	FAC1_s		; clear FAC1 sign (b7)
+.d8a4  84 ba      sty $ba          	STY	Sendl			; save index
+.d8a6  c8         iny              	INY				; increment index
+.d8a7  a6 ac      ldx $ac          	LDX	FAC1_e		; get FAC1 exponent
+.d8a9  d0 05      bne $d8b0        	BNE	LAB_2989		; branch if FAC1<>0
+.d8ab  a9 30      lda #$30         	LDA	#"0"			; set character = "0"
+.d8ad  4c ae d9   jmp $d9ae        	JMP	LAB_2A89		; save last character, [EOT] and exit
+.d8b0                              lab_2989
+.d8b0  a9 00      lda #$00         	LDA	#$00			; clear (number exponent count)
+.d8b2  e0 81      cpx #$81         	CPX	#$81			; compare FAC1 exponent with $81 (>1.00000)
+.d8b4  b0 09      bcs $d8bf        	BCS	LAB_299A		; branch if FAC1=>1
+.d8b6  a9 81      lda #$81         	LDA	#<LAB_294F		; set pointer low byte to 1,000,000
+.d8b8  a0 df      ldy #$df         	LDY	#>LAB_294F		; set pointer high byte to 1,000,000
+.d8ba  20 39 d5   jsr $d539        	JSR	LAB_25FB		; do convert AY, FCA1*(AY)
+.d8bd  a9 fa      lda #$fa         	LDA	#$FA			; set number exponent count (-6)
+.d8bf                              lab_299a
+.d8bf  85 a8      sta $a8          	STA	numexp		; save number exponent count
+.d8c1                              lab_299c
+.d8c1  a9 7d      lda #$7d         	LDA	#<LAB_294B		; set pointer low byte to 999999.4375 (max before sci note)
+.d8c3  a0 df      ldy #$df         	LDY	#>LAB_294B		; set pointer high byte to 999999.4375
+.d8c5  20 17 d7   jsr $d717        	JSR	LAB_27F8		; compare FAC1 with (AY)
+.d8c8  f0 1e      beq $d8e8        	BEQ	LAB_29C3		; exit if FAC1 = (AY)
+.d8ca  10 12      bpl $d8de        	BPL	LAB_29B9		; go do /10 if FAC1 > (AY)
+.d8cc                              lab_29a7
+.d8cc  a9 79      lda #$79         	LDA	#<LAB_2947		; set pointer low byte to 99999.9375
+.d8ce  a0 df      ldy #$df         	LDY	#>LAB_2947		; set pointer high byte to 99999.9375
+.d8d0  20 17 d7   jsr $d717        	JSR	LAB_27F8		; compare FAC1 with (AY)
+.d8d3  f0 02      beq $d8d7        	BEQ	LAB_29B2		; branch if FAC1 = (AY) (allow decimal places)
+.d8d5  10 0e      bpl $d8e5        	BPL	LAB_29C0		; branch if FAC1 > (AY) (no decimal places)
+.d8d7                              lab_29b2
+.d8d7  20 d7 d5   jsr $d5d7        	JSR	LAB_269E		; multiply by 10
+.d8da  c6 a8      dec $a8          	DEC	numexp		; decrement number exponent count
+.d8dc  d0 ee      bne $d8cc        	BNE	LAB_29A7		; go test again (branch always)
+.d8de                              lab_29b9
+.d8de  20 f0 d5   jsr $d5f0        	JSR	LAB_26B9		; divide by 10
+.d8e1  e6 a8      inc $a8          	INC	numexp		; increment number exponent count
+.d8e3  d0 dc      bne $d8c1        	BNE	LAB_299C		; go test again (branch always)
+.d8e5                              lab_29c0
+.d8e5  20 ba d3   jsr $d3ba        	JSR	LAB_244E		; add 0.5 to FAC1 (round FAC1)
+.d8e8                              lab_29c3
+.d8e8  20 50 d7   jsr $d750        	JSR	LAB_2831		; convert FAC1 floating-to-fixed
+.d8eb  a2 01      ldx #$01         	LDX	#$01			; set default digits before dp = 1
+.d8ed  a5 a8      lda $a8          	LDA	numexp		; get number exponent count
+.d8ef  18         clc              	CLC				; clear carry for add
+.d8f0  69 07      adc #$07         	ADC	#$07			; up to 6 digits before point
+.d8f2  30 09      bmi $d8fd        	BMI	LAB_29D8		; if -ve then 1 digit before dp
+.d8f4  c9 08      cmp #$08         	CMP	#$08			; A>=8 if n>=1E6
+.d8f6  b0 06      bcs $d8fe        	BCS	LAB_29D9		; branch if >= $08
+.d8f8  69 ff      adc #$ff         	ADC	#$FF			; take 1 from digit count
+.d8fa  aa         tax              	TAX				; copy to A
+.d8fb  a9 02      lda #$02         	LDA	#$02			;.set exponent adjust
+.d8fd                              lab_29d8
+.d8fd  38         sec              	SEC				; set carry for subtract
+.d8fe                              lab_29d9
+.d8fe  e9 02      sbc #$02         	SBC	#$02			; -2
+.d900  85 a9      sta $a9          	STA	expcnt		;.save exponent adjust
+.d902  86 a8      stx $a8          	STX	numexp		; save digits before dp count
+.d904  8a         txa              	TXA				; copy to A
+.d905  f0 02      beq $d909        	BEQ	LAB_29E4		; branch if no digits before dp
+.d907  10 13      bpl $d91c        	BPL	LAB_29F7		; branch if digits before dp
+.d909                              lab_29e4
+.d909  a4 ba      ldy $ba          	LDY	Sendl			; get output string index
+.d90b  a9 2e      lda #$2e         	LDA	#$2E			; character "."
+.d90d  c8         iny              	INY				; increment index
+.d90e  99 ef 00   sta $00ef,y      	STA	Decss,Y		; save to output string
+.d911  8a         txa              	TXA				;.
+.d912  f0 06      beq $d91a        	BEQ	LAB_29F5		;.
+.d914  a9 30      lda #$30         	LDA	#"0"			; character "0"
+.d916  c8         iny              	INY				; increment index
+.d917  99 ef 00   sta $00ef,y      	STA	Decss,Y		; save to output string
+.d91a                              lab_29f5
+.d91a  84 ba      sty $ba          	STY	Sendl			; save output string index
+.d91c                              lab_29f7
+.d91c  a0 00      ldy #$00         	LDY	#$00			; clear index (point to 100,000)
+.d91e  a2 80      ldx #$80         	LDX	#$80			; 
+.d920                              lab_29fb
+.d920  a5 af      lda $af          	LDA	FAC1_3		; get FAC1 mantissa3
+.d922  18         clc              	CLC				; clear carry for add
+.d923  79 f7 df   adc $dff7,y      	ADC	LAB_2A9C,Y		; add -ve LSB
+.d926  85 af      sta $af          	STA	FAC1_3		; save FAC1 mantissa3
+.d928  a5 ae      lda $ae          	LDA	FAC1_2		; get FAC1 mantissa2
+.d92a  79 f6 df   adc $dff6,y      	ADC	LAB_2A9B,Y		; add -ve NMSB
+.d92d  85 ae      sta $ae          	STA	FAC1_2		; save FAC1 mantissa2
+.d92f  a5 ad      lda $ad          	LDA	FAC1_1		; get FAC1 mantissa1
+.d931  79 f5 df   adc $dff5,y      	ADC	LAB_2A9A,Y		; add -ve MSB
+.d934  85 ad      sta $ad          	STA	FAC1_1		; save FAC1 mantissa1
+.d936  e8         inx              	INX				; 
+.d937  b0 04      bcs $d93d        	BCS	LAB_2A18		; 
+.d939  10 e5      bpl $d920        	BPL	LAB_29FB		; not -ve so try again
+.d93b  30 02      bmi $d93f        	BMI	LAB_2A1A		; 
+.d93d                              lab_2a18
+.d93d  30 e1      bmi $d920        	BMI	LAB_29FB		; 
+.d93f                              lab_2a1a
+.d93f  8a         txa              	TXA				; 
+.d940  90 04      bcc $d946        	BCC	LAB_2A21		; 
+.d942  49 ff      eor #$ff         	EOR	#$FF			; 
+.d944  69 0a      adc #$0a         	ADC	#$0A			; 
+.d946                              lab_2a21
+.d946  69 2f      adc #$2f         	ADC	#"0"-1		; add "0"-1 to result
+.d948  c8         iny              	INY				; increment index ..
+.d949  c8         iny              	INY				; .. to next less ..
+.d94a  c8         iny              	INY				; .. power of ten
+.d94b  84 95      sty $95          	STY	Cvaral		; save as current var address low byte
+.d94d  a4 ba      ldy $ba          	LDY	Sendl			; get output string index
+.d94f  c8         iny              	INY				; increment output string index
+.d950  aa         tax              	TAX				; copy character to X
+.d951  29 7f      and #$7f         	AND	#$7F			; mask out top bit
+.d953  99 ef 00   sta $00ef,y      	STA	Decss,Y		; save to output string
+.d956  c6 a8      dec $a8          	DEC	numexp		; decrement # of characters before the dp
+.d958  d0 06      bne $d960        	BNE	LAB_2A3B		; branch if still characters to do
+.d95a  a9 2e      lda #$2e         	LDA	#$2E			; character "."
+.d95c  c8         iny              	INY				; increment output string index
+.d95d  99 ef 00   sta $00ef,y      	STA	Decss,Y		; save to output string
+.d960                              lab_2a3b
+.d960  84 ba      sty $ba          	STY	Sendl			; save output string index
+.d962  a4 95      ldy $95          	LDY	Cvaral		; get current var address low byte
+.d964  8a         txa              	TXA				; get character back
+.d965  49 ff      eor #$ff         	EOR	#$FF			; 
+.d967  29 80      and #$80         	AND	#$80			; 
+.d969  aa         tax              	TAX				; 
+.d96a  c0 12      cpy #$12         	CPY	#$12			; compare index with max
+.d96c  d0 b2      bne $d920        	BNE	LAB_29FB		; loop if not max
+.d96e  a4 ba      ldy $ba          	LDY	Sendl			; get output string index
+.d970                              lab_2a4b
+.d970  b9 ef 00   lda $00ef,y      	LDA	Decss,Y		; get character from output string
+.d973  88         dey              	DEY				; decrement output string index
+.d974  c9 30      cmp #$30         	CMP	#"0"			; compare with "0"
+.d976  f0 f8      beq $d970        	BEQ	LAB_2A4B		; loop until non "0" character found
+.d978  c9 2e      cmp #$2e         	CMP	#"."			; compare with "."
+.d97a  f0 01      beq $d97d        	BEQ	LAB_2A58		; branch if was dp
+.d97c  c8         iny              	INY				; increment output string index
+.d97d                              lab_2a58
+.d97d  a9 2b      lda #$2b         	LDA	#$2B			; character "+"
+.d97f  a6 a9      ldx $a9          	LDX	expcnt		; get exponent count
+.d981  f0 2e      beq $d9b1        	BEQ	LAB_2A8C		; if zero go set null terminator and exit
+.d983  10 08      bpl $d98d        	BPL	LAB_2A68		; branch if exponent count +ve
+.d985  a9 00      lda #$00         	LDA	#$00			; clear A
+.d987  38         sec              	SEC				; set carry for subtract
+.d988  e5 a9      sbc $a9          	SBC	expcnt		; subtract exponent count adjust (convert -ve to +ve)
+.d98a  aa         tax              	TAX				; copy exponent count to X
+.d98b  a9 2d      lda #$2d         	LDA	#"-"			; character "-"
+.d98d                              lab_2a68
+.d98d  99 f1 00   sta $00f1,y      	STA	Decss+2,Y		; save to output string
+.d990  a9 45      lda #$45         	LDA	#$45			; character "E"
+.d992  99 f0 00   sta $00f0,y      	STA	Decss+1,Y		; save exponent sign to output string
+.d995  8a         txa              	TXA				; get exponent count back
+.d996  a2 2f      ldx #$2f         	LDX	#"0"-1		; one less than "0" character
+.d998  38         sec              	SEC				; set carry for subtract
+.d999                              lab_2a74
+.d999  e8         inx              	INX				; increment 10's character
+.d99a  e9 0a      sbc #$0a         	SBC	#$0A			;.subtract 10 from exponent count
+.d99c  b0 fb      bcs $d999        	BCS	LAB_2A74		; loop while still >= 0
+.d99e  69 3a      adc #$3a         	ADC	#":"			; add character ":" ($30+$0A, result is 10 less that value)
+.d9a0  99 f3 00   sta $00f3,y      	STA	Decss+4,Y		; save to output string
+.d9a3  8a         txa              	TXA				; copy 10's character
+.d9a4  99 f2 00   sta $00f2,y      	STA	Decss+3,Y		; save to output string
+.d9a7  a9 00      lda #$00         	LDA	#$00			; set null terminator
+.d9a9  99 f4 00   sta $00f4,y      	STA	Decss+5,Y		; save to output string
+.d9ac  f0 08      beq $d9b6        	BEQ	LAB_2A91		; go set string pointer (AY) and exit (branch always)
+.d9ae                              lab_2a89
+.d9ae  99 ef 00   sta $00ef,y      	STA	Decss,Y		; save last character to output string
+.d9b1                              lab_2a8c
+.d9b1  a9 00      lda #$00         	LDA	#$00			; set null terminator
+.d9b3  99 f0 00   sta $00f0,y      	STA	Decss+1,Y		; save after last character
+.d9b6                              lab_2a91
+.d9b6  a9 f0      lda #$f0         	LDA	#<Decssp1		; set result string low pointer
+.d9b8  a0 00      ldy #$00         	LDY	#>Decssp1		; set result string high pointer
+.d9ba  60         rts              	RTS
+.d9bb                              lab_power
+.d9bb  f0 42      beq $d9ff        	BEQ	LAB_EXP		; go do  EXP()
+.d9bd  a5 b3      lda $b3          	LDA	FAC2_e		; get FAC2 exponent
+.d9bf  d0 03      bne $d9c4        	BNE	LAB_2ABF		; branch if FAC2<>0
+.d9c1  4c 52 d4   jmp $d452        	JMP	LAB_24F3		; clear FAC1 exponent and sign and return
+.d9c4                              lab_2abf
+.d9c4  a2 9c      ldx #$9c         	LDX	#<func_l		; set destination pointer low byte
+.d9c6  a0 00      ldy #$00         	LDY	#>func_l		; set destination pointer high byte
+.d9c8  20 a7 d6   jsr $d6a7        	JSR	LAB_2778		; pack FAC1 into (XY)
+.d9cb  a5 b7      lda $b7          	LDA	FAC2_s		; get FAC2 sign (b7)
+.d9cd  10 0f      bpl $d9de        	BPL	LAB_2AD9		; branch if FAC2>0
+.d9cf  20 81 d7   jsr $d781        	JSR	LAB_INT		; perform INT
+.d9d2  a9 9c      lda #$9c         	LDA	#<func_l		; set source pointer low byte
+.d9d4  a0 00      ldy #$00         	LDY	#>func_l		; set source pointer high byte
+.d9d6  20 17 d7   jsr $d717        	JSR	LAB_27F8		; compare FAC1 with (AY)
+.d9d9  d0 03      bne $d9de        	BNE	LAB_2AD9		; branch if FAC1 <> (AY) to allow Function Call error
+.d9db  98         tya              	TYA				; clear sign b7
+.d9dc  a4 5b      ldy $5b          	LDY	Temp3			; save mantissa 3 from INT() function as sign in Y
+.d9de                              lab_2ad9
+.d9de  20 c5 d3   jsr $d3c5        	JSR	LAB_279D		; save FAC1 sign and copy ABS(FAC2) to FAC1
+.d9e1  98         tya              	TYA				; copy sign back ..
+.d9e2  48         pha              	PHA				; .. and save it
+.d9e3  20 fb d4   jsr $d4fb        	JSR	LAB_LOG		; do LOG(n)
+.d9e6  a9 9c      lda #$9c         	LDA	#<garb_l		; set pointer low byte
+.d9e8  a0 00      ldy #$00         	LDY	#>garb_l		; set pointer high byte
+.d9ea  20 39 d5   jsr $d539        	JSR	LAB_25FB		; do convert AY, FCA1*(AY) (square the value)
+.d9ed  20 ff d9   jsr $d9ff        	JSR	LAB_EXP		; go do EXP(n)
+.d9f0  68         pla              	PLA				; pull sign from stack
+.d9f1  4a         lsr              	LSR				; b0 is to be tested, shift to Cb
+.d9f2  90 0a      bcc $d9fe        	BCC	LAB_2AF9		; if no bit then exit
+.d9f4                              lab_gthan
+.d9f4  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.d9f6  f0 06      beq $d9fe        	BEQ	LAB_2AF9		; exit if FAC1_e = $00
+.d9f8  a5 b0      lda $b0          	LDA	FAC1_s		; get FAC1 sign (b7)
+.d9fa  49 ff      eor #$ff         	EOR	#$FF			; complement it
+.d9fc  85 b0      sta $b0          	STA	FAC1_s		; save FAC1 sign (b7)
+.d9fe                              lab_2af9
+.d9fe  60         rts              	RTS
+.d9ff                              lab_exp
+.d9ff  a9 85      lda #$85         	LDA	#<LAB_2AFA		; set 1.443 pointer low byte
+.da01  a0 df      ldy #$df         	LDY	#>LAB_2AFA		; set 1.443 pointer high byte
+.da03  20 39 d5   jsr $d539        	JSR	LAB_25FB		; do convert AY, FCA1*(AY)
+.da06  a5 b9      lda $b9          	LDA	FAC1_r		; get FAC1 rounding byte
+.da08  69 50      adc #$50         	ADC	#$50			; +$50/$100
+.da0a  90 03      bcc $da0f        	BCC	LAB_2B2B		; skip rounding if no carry
+.da0c  20 e1 d6   jsr $d6e1        	JSR	LAB_27C2		; round FAC1 (no check)
+.da0f                              lab_2b2b
+.da0f  85 a3      sta $a3          	STA	FAC2_r		; save FAC2 rounding byte
+.da11  20 cd d6   jsr $d6cd        	JSR	LAB_27AE		; copy FAC1 to FAC2
+.da14  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.da16  c9 88      cmp #$88         	CMP	#$88			; compare with EXP limit (256d)
+.da18  90 03      bcc $da1d        	BCC	LAB_2B39		; branch if less
+.da1a                              lab_2b36
+.da1a  20 ce d5   jsr $d5ce        	JSR	LAB_2690		; handle overflow and underflow
+.da1d                              lab_2b39
+.da1d  20 81 d7   jsr $d781        	JSR	LAB_INT		; perform INT
+.da20  a5 5b      lda $5b          	LDA	Temp3			; get mantissa 3 from INT() function
+.da22  18         clc              	CLC				; clear carry for add
+.da23  69 81      adc #$81         	ADC	#$81			; normalise +1
+.da25  f0 f3      beq $da1a        	BEQ	LAB_2B36		; if $00 go handle overflow
+.da27  38         sec              	SEC				; set carry for subtract
+.da28  e9 01      sbc #$01         	SBC	#$01			; now correct for exponent
+.da2a  48         pha              	PHA				; save FAC2 exponent
+.da2b  a2 04      ldx #$04         	LDX	#$04			; 4 bytes to do
+.da2d                              lab_2b49
+.da2d  b5 b3      lda $b3,x        	LDA	FAC2_e,X		; get FAC2,X
+.da2f  b4 ac      ldy $ac,x        	LDY	FAC1_e,X		; get FAC1,X
+.da31  95 ac      sta $ac,x        	STA	FAC1_e,X		; save FAC1,X
+.da33  94 b3      sty $b3,x        	STY	FAC2_e,X		; save FAC2,X
+.da35  ca         dex              	DEX				; decrement count/index
+.da36  10 f5      bpl $da2d        	BPL	LAB_2B49		; loop if not all done
+.da38  a5 a3      lda $a3          	LDA	FAC2_r		; get FAC2 rounding byte
+.da3a  85 b9      sta $b9          	STA	FAC1_r		; save as FAC1 rounding byte
+.da3c  20 a6 d3   jsr $d3a6        	JSR	LAB_SUBTRACT	; perform subtraction, FAC2 from FAC1
+.da3f  20 f4 d9   jsr $d9f4        	JSR	LAB_GTHAN		; do - FAC1
+.da42  a9 89      lda #$89         	LDA	#<LAB_2AFE		; set counter pointer low byte
+.da44  a0 df      ldy #$df         	LDY	#>LAB_2AFE		; set counter pointer high byte
+.da46  20 67 da   jsr $da67        	JSR	LAB_2B84		; go do series evaluation
+.da49  a9 00      lda #$00         	LDA	#$00			; clear A
+.da4b  85 b8      sta $b8          	STA	FAC_sc		; clear sign compare (FAC1 EOR FAC2)
+.da4d  68         pla              	PLA				;.get saved FAC2 exponent
+.da4e  4c b3 d5   jmp $d5b3        	JMP	LAB_2675		; test and adjust accumulators and return
+.da51                              lab_2b6e
+.da51  85 ba      sta $ba          	STA	Cptrl			; save count pointer low byte
+.da53  84 bb      sty $bb          	STY	Cptrh			; save count pointer high byte
+.da55  20 9d d6   jsr $d69d        	JSR	LAB_276E		; pack FAC1 into Adatal
+.da58  a9 a4      lda #$a4         	LDA	#<Adatal		; set pointer low byte (Y already $00)
+.da5a  20 39 d5   jsr $d539        	JSR	LAB_25FB		; do convert AY, FCA1*(AY)
+.da5d  20 6b da   jsr $da6b        	JSR	LAB_2B88		; go do series evaluation
+.da60  a9 a4      lda #$a4         	LDA	#<Adatal		; pointer to original # low byte
+.da62  a0 00      ldy #$00         	LDY	#>Adatal		; pointer to original # high byte
+.da64  4c 39 d5   jmp $d539        	JMP	LAB_25FB		; do convert AY, FCA1*(AY) and return
+.da67                              lab_2b84
+.da67  85 ba      sta $ba          	STA	Cptrl			; save count pointer low byte
+.da69  84 bb      sty $bb          	STY	Cptrh			; save count pointer high byte
+.da6b                              lab_2b88
+.da6b  a2 a8      ldx #$a8         	LDX	#<numexp		; set pointer low byte
+.da6d  20 9f d6   jsr $d69f        	JSR	LAB_2770		; set pointer high byte and pack FAC1 into numexp
+.da70  b1 ba      lda ($ba),y      	LDA	(Cptrl),Y		; get constants count
+.da72  85 b1      sta $b1          	STA	numcon		; save constants count
+.da74  a4 ba      ldy $ba          	LDY	Cptrl			; get count pointer low byte
+.da76  c8         iny              	INY				; increment it (now constants pointer)
+.da77  98         tya              	TYA				; copy it
+.da78  d0 02      bne $da7c        	BNE	LAB_2B97		; skip next if no overflow
+.da7a  e6 bb      inc $bb          	INC	Cptrh			; else increment high byte
+.da7c                              lab_2b97
+.da7c  85 ba      sta $ba          	STA	Cptrl			; save low byte
+.da7e  a4 bb      ldy $bb          	LDY	Cptrh			; get high byte
+.da80                              lab_2b9b
+.da80  20 39 d5   jsr $d539        	JSR	LAB_25FB		; do convert AY, FCA1*(AY)
+.da83  a5 ba      lda $ba          	LDA	Cptrl			; get constants pointer low byte
+.da85  a4 bb      ldy $bb          	LDY	Cptrh			; get constants pointer high byte
+.da87  18         clc              	CLC				; clear carry for add
+.da88  69 04      adc #$04         	ADC	#$04			; +4 to  low pointer (4 bytes per constant)
+.da8a  90 01      bcc $da8d        	BCC	LAB_2BA8		; skip next if no overflow
+.da8c  c8         iny              	INY				; increment high byte
+.da8d                              lab_2ba8
+.da8d  85 ba      sta $ba          	STA	Cptrl			; save pointer low byte
+.da8f  84 bb      sty $bb          	STY	Cptrh			; save pointer high byte
+.da91  20 be d3   jsr $d3be        	JSR	LAB_246C		; add (AY) to FAC1
+.da94  a9 a8      lda #$a8         	LDA	#<numexp		; set pointer low byte to partial @ numexp
+.da96  a0 00      ldy #$00         	LDY	#>numexp		; set pointer high byte to partial @ numexp
+.da98  c6 b1      dec $b1          	DEC	numcon		; decrement constants count
+.da9a  d0 e4      bne $da80        	BNE	LAB_2B9B		; loop until all done
+.da9c  60         rts              	RTS
+.da9d                              lab_rnd
+.da9d  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.da9f  f0 07      beq $daa8        	BEQ	NextPRN		; do next random # if zero
+.daa1  a2 d8      ldx #$d8         	LDX	#Rbyte4		; set PRNG pointer low byte
+.daa3  a0 00      ldy #$00         	LDY	#$00			; set PRNG pointer high byte
+.daa5  20 a7 d6   jsr $d6a7        	JSR	LAB_2778		; pack FAC1 into (XY)
+.daa8                              nextprn
+.daa8  a2 af      ldx #$af         	LDX	#$AF			; set EOR byte
+.daaa  a0 13      ldy #$13         	LDY	#$13			; do this nineteen times
+.daac                              loopprn
+.daac  06 d9      asl $d9          	ASL	Rbyte1		; shift PRNG most significant byte
+.daae  26 da      rol $da          	ROL	Rbyte2		; shift PRNG middle byte
+.dab0  26 db      rol $db          	ROL	Rbyte3		; shift PRNG least significant byte
+.dab2  26 d8      rol $d8          	ROL	Rbyte4		; shift PRNG extra byte
+.dab4  90 05      bcc $dabb        	BCC	Ninc1			; branch if bit 32 clear
+.dab6  8a         txa              	TXA				; set EOR byte
+.dab7  45 d9      eor $d9          	EOR	Rbyte1		; EOR PRNG extra byte
+.dab9  85 d9      sta $d9          	STA	Rbyte1		; save new PRNG extra byte
+.dabb                              ninc1
+.dabb  88         dey              	DEY				; decrement loop count
+.dabc  d0 ee      bne $daac        	BNE	LoopPRN		; loop if not all done
+.dabe  a2 02      ldx #$02         	LDX	#$02			; three bytes to copy
+.dac0                              copyprng
+.dac0  b5 d9      lda $d9,x        	LDA	Rbyte1,X		; get PRNG byte
+.dac2  95 ad      sta $ad,x        	STA	FAC1_1,X		; save FAC1 byte
+.dac4  ca         dex              	DEX
+.dac5  10 f9      bpl $dac0        	BPL	CopyPRNG		; loop if not complete
+.dac7  a9 80      lda #$80         	LDA	#$80			; set the exponent
+.dac9  85 ac      sta $ac          	STA	FAC1_e		; save FAC1 exponent
+.dacb  0a         asl              	ASL				; clear A
+.dacc  85 b0      sta $b0          	STA	FAC1_s		; save FAC1 sign
+.dace  4c 34 d4   jmp $d434        	JMP	LAB_24D5		; normalise FAC1 and return
+.dad1                              lab_cos
+.dad1  a9 a6      lda #$a6         	LDA	#<LAB_2C78		; set (pi/2) pointer low byte
+.dad3  a0 df      ldy #$df         	LDY	#>LAB_2C78		; set (pi/2) pointer high byte
+.dad5  20 be d3   jsr $d3be        	JSR	LAB_246C		; add (AY) to FAC1
+.dad8                              lab_sin
+.dad8  20 ca d6   jsr $d6ca        	JSR	LAB_27AB		; round and copy FAC1 to FAC2
+.dadb  a9 bb      lda #$bb         	LDA	#<LAB_2C7C		; set (2*pi) pointer low byte
+.dadd  a0 df      ldy #$df         	LDY	#>LAB_2C7C		; set (2*pi) pointer high byte
+.dadf  a6 b7      ldx $b7          	LDX	FAC2_s		; get FAC2 sign (b7)
+.dae1  20 f9 d5   jsr $d5f9        	JSR	LAB_26C2		; divide by (AY) (X=sign)
+.dae4  20 ca d6   jsr $d6ca        	JSR	LAB_27AB		; round and copy FAC1 to FAC2
+.dae7  20 81 d7   jsr $d781        	JSR	LAB_INT		; perform INT
+.daea  a9 00      lda #$00         	LDA	#$00			; clear byte
+.daec  85 b8      sta $b8          	STA	FAC_sc		; clear sign compare (FAC1 EOR FAC2)
+.daee  20 a6 d3   jsr $d3a6        	JSR	LAB_SUBTRACT	; perform subtraction, FAC2 from FAC1
+.daf1  a9 ed      lda #$ed         	LDA	#<LAB_2C80		; set 0.25 pointer low byte
+.daf3  a0 df      ldy #$df         	LDY	#>LAB_2C80		; set 0.25 pointer high byte
+.daf5  20 a3 d3   jsr $d3a3        	JSR	LAB_2455		; perform subtraction, (AY) from FAC1
+.daf8  a5 b0      lda $b0          	LDA	FAC1_s		; get FAC1 sign (b7)
+.dafa  48         pha              	PHA				; save FAC1 sign
+.dafb  10 0d      bpl $db0a        	BPL	LAB_2C35		; branch if +ve
+.dafd  20 ba d3   jsr $d3ba        	JSR	LAB_244E		; add 0.5 to FAC1
+.db00  a5 b0      lda $b0          	LDA	FAC1_s		; get FAC1 sign (b7)
+.db02  30 09      bmi $db0d        	BMI	LAB_2C38		; branch if -ve
+.db04  a5 63      lda $63          	LDA	Cflag			; get comparison evaluation flag
+.db06  49 ff      eor #$ff         	EOR	#$FF			; toggle flag
+.db08  85 63      sta $63          	STA	Cflag			; save comparison evaluation flag
+.db0a                              lab_2c35
+.db0a  20 f4 d9   jsr $d9f4        	JSR	LAB_GTHAN		; do - FAC1
+.db0d                              lab_2c38
+.db0d  a9 ed      lda #$ed         	LDA	#<LAB_2C80		; set 0.25 pointer low byte
+.db0f  a0 df      ldy #$df         	LDY	#>LAB_2C80		; set 0.25 pointer high byte
+.db11  20 be d3   jsr $d3be        	JSR	LAB_246C		; add (AY) to FAC1
+.db14  68         pla              	PLA				; restore FAC1 sign
+.db15  10 03      bpl $db1a        	BPL	LAB_2C45		; branch if was +ve
+.db17  20 f4 d9   jsr $d9f4        	JSR	LAB_GTHAN		; do - FAC1
+.db1a                              lab_2c45
+.db1a  a9 aa      lda #$aa         	LDA	#<LAB_2C84		; set pointer low byte to counter
+.db1c  a0 df      ldy #$df         	LDY	#>LAB_2C84		; set pointer high byte to counter
+.db1e  4c 51 da   jmp $da51        	JMP	LAB_2B6E		; ^2 then series evaluation and return
+.db21                              lab_tan
+.db21  20 9d d6   jsr $d69d        	JSR	LAB_276E		; pack FAC1 into Adatal
+.db24  a9 00      lda #$00         	LDA	#$00			; clear byte
+.db26  85 63      sta $63          	STA	Cflag			; clear comparison evaluation flag
+.db28  20 d8 da   jsr $dad8        	JSR	LAB_SIN		; go do SIN(n)
+.db2b  a2 9c      ldx #$9c         	LDX	#<func_l		; set sin(n) pointer low byte
+.db2d  a0 00      ldy #$00         	LDY	#>func_l		; set sin(n) pointer high byte
+.db2f  20 a7 d6   jsr $d6a7        	JSR	LAB_2778		; pack FAC1 into (XY)
+.db32  a9 a4      lda #$a4         	LDA	#<Adatal		; set n pointer low addr
+.db34  a0 00      ldy #$00         	LDY	#>Adatal		; set n pointer high addr
+.db36  20 7d d6   jsr $d67d        	JSR	LAB_UFAC		; unpack memory (AY) into FAC1
+.db39  a9 00      lda #$00         	LDA	#$00			; clear byte
+.db3b  85 b0      sta $b0          	STA	FAC1_s		; clear FAC1 sign (b7)
+.db3d  a5 63      lda $63          	LDA	Cflag			; get comparison evaluation flag
+.db3f  20 49 db   jsr $db49        	JSR	LAB_2C74		; save flag and go do series evaluation
+.db42  a9 9c      lda #$9c         	LDA	#<func_l		; set sin(n) pointer low byte
+.db44  a0 00      ldy #$00         	LDY	#>func_l		; set sin(n) pointer high byte
+.db46  4c 01 d6   jmp $d601        	JMP	LAB_26CA		; convert AY and do (AY)/FAC1
+.db49                              lab_2c74
+.db49  48         pha              	PHA				; save comparison evaluation flag
+.db4a  4c 0a db   jmp $db0a        	JMP	LAB_2C35		; go do series evaluation
+.db4d                              lab_usr
+.db4d  20 0a 00   jsr $000a        	JSR	Usrjmp		; call user code
+.db50  4c ef c9   jmp $c9ef        	JMP	LAB_1BFB		; scan for ")", else do syntax error then warm start
+.db53                              lab_atn
+.db53  a5 b0      lda $b0          	LDA	FAC1_s		; get FAC1 sign (b7)
+.db55  48         pha              	PHA				; save sign
+.db56  10 03      bpl $db5b        	BPL	LAB_2CA1		; branch if +ve
+.db58  20 f4 d9   jsr $d9f4        	JSR	LAB_GTHAN		; else do - FAC1
+.db5b                              lab_2ca1
+.db5b  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.db5d  48         pha              	PHA				; push exponent
+.db5e  c9 81      cmp #$81         	CMP	#$81			; compare with 1
+.db60  90 07      bcc $db69        	BCC	LAB_2CAF		; branch if FAC1<1
+.db62  a9 e0      lda #$e0         	LDA	#<LAB_259C		; set 1 pointer low byte
+.db64  a0 df      ldy #$df         	LDY	#>LAB_259C		; set 1 pointer high byte
+.db66  20 01 d6   jsr $d601        	JSR	LAB_26CA		; convert AY and do (AY)/FAC1
+.db69                              lab_2caf
+.db69  a9 bf      lda #$bf         	LDA	#<LAB_2CC9		; set pointer low byte to counter
+.db6b  a0 df      ldy #$df         	LDY	#>LAB_2CC9		; set pointer high byte to counter
+.db6d  20 51 da   jsr $da51        	JSR	LAB_2B6E		; ^2 then series evaluation
+.db70  68         pla              	PLA				; restore old FAC1 exponent
+.db71  c9 81      cmp #$81         	CMP	#$81			; compare with 1
+.db73  90 07      bcc $db7c        	BCC	LAB_2CC2		; branch if FAC1<1
+.db75  a9 a6      lda #$a6         	LDA	#<LAB_2C78		; set (pi/2) pointer low byte
+.db77  a0 df      ldy #$df         	LDY	#>LAB_2C78		; set (pi/2) pointer high byte
+.db79  20 a3 d3   jsr $d3a3        	JSR	LAB_2455		; perform subtraction, (AY) from FAC1
+.db7c                              lab_2cc2
+.db7c  68         pla              	PLA				; restore FAC1 sign
+.db7d  10 16      bpl $db95        	BPL	LAB_2D04		; exit if was +ve
+.db7f  4c f4 d9   jmp $d9f4        	JMP	LAB_GTHAN		; else do - FAC1 and return
+.db82                              lab_bitset
+.db82  20 d8 d2   jsr $d2d8        	JSR	LAB_GADB		; get two parameters for POKE or WAIT
+.db85  e0 08      cpx #$08         	CPX	#$08			; only 0 to 7 are allowed
+.db87  b0 20      bcs $dba9        	BCS	FCError		; branch if > 7
+.db89  a9 00      lda #$00         	LDA	#$00			; clear A
+.db8b  38         sec              	SEC				; set the carry
+.db8c                              s_bits
+.db8c  2a         rol              	ROL				; shift bit
+.db8d  ca         dex              	DEX				; decrement bit number
+.db8e  10 fc      bpl $db8c        	BPL	S_Bits		; loop if still +ve
+.db90  e8         inx              	INX				; make X = $00
+.db91  01 11      ora ($11,x)      	ORA	(Itempl,X)		; or with byte via temporary integer (addr)
+.db93  81 11      sta ($11,x)      	STA	(Itempl,X)		; save byte via temporary integer (addr)
+.db95                              lab_2d04
+.db95  60         rts              	RTS
+.db96                              lab_bitclr
+.db96  20 d8 d2   jsr $d2d8        	JSR	LAB_GADB		; get two parameters for POKE or WAIT
+.db99  e0 08      cpx #$08         	CPX	#$08			; only 0 to 7 are allowed
+.db9b  b0 0c      bcs $dba9        	BCS	FCError		; branch if > 7
+.db9d  a9 ff      lda #$ff         	LDA	#$FF			; set A
+.db9f                              s_bitc
+.db9f  2a         rol              	ROL				; shift bit
+.dba0  ca         dex              	DEX				; decrement bit number
+.dba1  10 fc      bpl $db9f        	BPL	S_Bitc		; loop if still +ve
+.dba3  e8         inx              	INX				; make X = $00
+.dba4  21 11      and ($11,x)      	AND	(Itempl,X)		; and with byte via temporary integer (addr)
+.dba6  81 11      sta ($11,x)      	STA	(Itempl,X)		; save byte via temporary integer (addr)
+.dba8  60         rts              	RTS
+.dba9                              fcerror
+.dba9  4c 29 cd   jmp $cd29        	JMP	LAB_FCER		; do function call error then warm start
+.dbac                              lab_btst
+.dbac  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment BASIC pointer
+.dbaf  20 d8 d2   jsr $d2d8        	JSR	LAB_GADB		; get two parameters for POKE or WAIT
+.dbb2  e0 08      cpx #$08         	CPX	#$08			; only 0 to 7 are allowed
+.dbb4  b0 f3      bcs $dba9        	BCS	FCError		; branch if > 7
+.dbb6  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; get next BASIC byte
+.dbb9  c9 29      cmp #$29         	CMP	#")"			; is next character ")"
+.dbbb  f0 03      beq $dbc0        	BEQ	TST_OK		; if ")" go do rest of function
+.dbbd  4c 02 ca   jmp $ca02        	JMP	LAB_SNER		; do syntax error then warm start
+.dbc0                              tst_ok
+.dbc0  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; update BASIC execute pointer (to character past ")")
+.dbc3  a9 00      lda #$00         	LDA	#$00			; clear A
+.dbc5  38         sec              	SEC				; set the carry
+.dbc6                              t_bits
+.dbc6  2a         rol              	ROL				; shift bit
+.dbc7  ca         dex              	DEX				; decrement bit number
+.dbc8  10 fc      bpl $dbc6        	BPL	T_Bits		; loop if still +ve
+.dbca  e8         inx              	INX				; make X = $00
+.dbcb  21 11      and ($11,x)      	AND	(Itempl,X)		; AND with byte via temporary integer (addr)
+.dbcd  f0 02      beq $dbd1        	BEQ	LAB_NOTT		; branch if zero (already correct)
+.dbcf  a9 ff      lda #$ff         	LDA	#$FF			; set for -1 result
+.dbd1                              lab_nott
+.dbd1  4c fa d6   jmp $d6fa        	JMP	LAB_27DB		; go do SGN tail
+.dbd4                              lab_bins
+.dbd4  e0 19      cpx #$19         	CPX	#$19			; max + 1
+.dbd6  b0 48      bcs $dc20        	BCS	BinFErr		; exit if too big ( > or = )
+.dbd8  86 78      stx $78          	STX	TempB			; save # of characters ($00 = leading zero remove)
+.dbda  a9 18      lda #$18         	LDA	#$18			; need A byte long space
+.dbdc  20 3a cf   jsr $cf3a        	JSR	LAB_MSSP		; make string space A bytes long
+.dbdf  a0 17      ldy #$17         	LDY	#$17			; set index
+.dbe1  a2 18      ldx #$18         	LDX	#$18			; character count
+.dbe3                              nextb1
+.dbe3  46 11      lsr $11          	LSR	nums_1		; shift highest byte
+.dbe5  66 12      ror $12          	ROR	nums_2		; shift middle byte
+.dbe7  66 13      ror $13          	ROR	nums_3		; shift lowest byte bit 0 to carry
+.dbe9  8a         txa              	TXA				; load with "0"/2
+.dbea  2a         rol              	ROL				; shift in carry
+.dbeb  91 ad      sta ($ad),y      	STA	(str_pl),Y		; save to temp string + index
+.dbed  88         dey              	DEY				; decrement index
+.dbee  10 f3      bpl $dbe3        	BPL	NextB1		; loop if not done
+.dbf0  a5 78      lda $78          	LDA	TempB			; get # of characters
+.dbf2  f0 0a      beq $dbfe        	BEQ	EndBHS		; branch if truncate
+.dbf4  aa         tax              	TAX				; copy length to X
+.dbf5  38         sec              	SEC				; set carry for add !
+.dbf6  49 ff      eor #$ff         	EOR	#$FF			; 1's complement
+.dbf8  69 18      adc #$18         	ADC	#$18			; add 24d
+.dbfa  f0 1c      beq $dc18        	BEQ	GoPr2			; if zero print whole string
+.dbfc  d0 0f      bne $dc0d        	BNE	GoPr1			; else go make output string
+.dbfe                              endbhs
+.dbfe  a8         tay              	TAY				; clear index (A=0, X=length here)
+.dbff                              nextb2
+.dbff  b1 ad      lda ($ad),y      	LDA	(str_pl),Y		; get character from string
+.dc01  c9 30      cmp #$30         	CMP	#"0"			; compare with "0"
+.dc03  d0 07      bne $dc0c        	BNE	GoPr			; if not "0" then go print string from here
+.dc05  ca         dex              	DEX				; decrement character count
+.dc06  f0 03      beq $dc0b        	BEQ	GoPr3			; if zero then end of string so go print it
+.dc08  c8         iny              	INY				; else increment index
+.dc09  10 f4      bpl $dbff        	BPL	NextB2		; loop always
+.dc0b                              gopr3
+.dc0b  e8         inx              	INX				; need at least 1 character
+.dc0c                              gopr
+.dc0c  98         tya              	TYA				; copy result
+.dc0d                              gopr1
+.dc0d  18         clc              	CLC				; clear carry for add
+.dc0e  65 ad      adc $ad          	ADC	str_pl		; add low address
+.dc10  85 ad      sta $ad          	STA	str_pl		; save low address
+.dc12  a9 00      lda #$00         	LDA	#$00			; do high byte
+.dc14  65 ae      adc $ae          	ADC	str_ph		; add high address
+.dc16  85 ae      sta $ae          	STA	str_ph		; save high address
+.dc18                              gopr2
+.dc18  86 ac      stx $ac          	STX	str_ln		; X holds string length
+.dc1a  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; update BASIC execute pointer (to character past ")")
+.dc1d  4c 85 cf   jmp $cf85        	JMP	LAB_RTST		; check for space on descriptor stack then put address
+.dc20                              binferr
+.dc20  4c 29 cd   jmp $cd29        	JMP	LAB_FCER		; do function call error then warm start
+.dc23                              lab_hexs
+.dc23  e0 07      cpx #$07         	CPX	#$07			; max + 1
+.dc25  b0 f9      bcs $dc20        	BCS	BinFErr		; exit if too big ( > or = )
+.dc27  86 78      stx $78          	STX	TempB			; save # of characters
+.dc29  a9 06      lda #$06         	LDA	#$06			; need 6 bytes for string
+.dc2b  20 3a cf   jsr $cf3a        	JSR	LAB_MSSP		; make string space A bytes long
+.dc2e  a0 05      ldy #$05         	LDY	#$05			; set string index
+.dc30  f8         sed              	SED				; need decimal mode for nibble convert
+.dc31  a5 13      lda $13          	LDA	nums_3		; get lowest byte
+.dc33  20 51 dc   jsr $dc51        	JSR	LAB_A2HX		; convert A to ASCII hex byte and output
+.dc36  a5 12      lda $12          	LDA	nums_2		; get middle byte
+.dc38  20 51 dc   jsr $dc51        	JSR	LAB_A2HX		; convert A to ASCII hex byte and output
+.dc3b  a5 11      lda $11          	LDA	nums_1		; get highest byte
+.dc3d  20 51 dc   jsr $dc51        	JSR	LAB_A2HX		; convert A to ASCII hex byte and output
+.dc40  d8         cld              	CLD				; back to binary
+.dc41  a2 06      ldx #$06         	LDX	#$06			; character count
+.dc43  a5 78      lda $78          	LDA	TempB			; get # of characters
+.dc45  f0 b7      beq $dbfe        	BEQ	EndBHS		; branch if truncate
+.dc47  aa         tax              	TAX				; copy length to X
+.dc48  38         sec              	SEC				; set carry for add !
+.dc49  49 ff      eor #$ff         	EOR	#$FF			; 1's complement
+.dc4b  69 06      adc #$06         	ADC	#$06			; add 6d
+.dc4d  f0 c9      beq $dc18        	BEQ	GoPr2			; if zero print whole string
+.dc4f  d0 bc      bne $dc0d        	BNE	GoPr1			; else go make output string (branch always)
+.dc51                              lab_a2hx
+.dc51  aa         tax              	TAX				; save byte
+.dc52  29 0f      and #$0f         	AND	#$0F			; mask off top bits
+.dc54  20 5c dc   jsr $dc5c        	JSR	LAB_AL2X		; convert low nibble to ASCII and output
+.dc57  8a         txa              	TXA				; get byte back
+.dc58  4a         lsr              	LSR				; /2	shift high nibble to low nibble
+.dc59  4a         lsr              	LSR				; /4
+.dc5a  4a         lsr              	LSR				; /8
+.dc5b  4a         lsr              	LSR				; /16
+.dc5c                              lab_al2x
+.dc5c  c9 0a      cmp #$0a         	CMP	#$0A			; set carry for +1 if >9
+.dc5e  69 30      adc #$30         	ADC	#"0"			; add ASCII "0"
+.dc60  91 ad      sta ($ad),y      	STA	(str_pl),Y		; save to temp string
+.dc62  88         dey              	DEY				; decrement counter
+.dc63  60         rts              	RTS
+.dc64                              lab_nlto
+.dc64  85 ac      sta $ac          	STA	FAC1_e		; save FAC1 exponent
+.dc66  a9 00      lda #$00         	LDA	#$00			; clear sign compare
+.dc68                              lab_mlte
+.dc68  85 b8      sta $b8          	STA	FAC_sc		; save sign compare (FAC1 EOR FAC2)
+.dc6a  8a         txa              	TXA				; restore character
+.dc6b  20 45 d8   jsr $d845        	JSR	LAB_2912		; evaluate new ASCII digit
+.dc6e                              lab_chex
+.dc6e  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.dc71  90 0a      bcc $dc7d        	BCC	LAB_ISHN		; branch if numeric character
+.dc73  09 20      ora #$20         	ORA	#$20			; case convert, allow "A" to "F" and "a" to "f"
+.dc75  e9 61      sbc #$61         	SBC	#"a"			; subtract "a" (carry set here)
+.dc77  c9 06      cmp #$06         	CMP	#$06			; compare normalised with $06 (max+1)
+.dc79  b0 2a      bcs $dca5        	BCS	LAB_EXCH		; exit if >"f" or <"0"
+.dc7b  69 0a      adc #$0a         	ADC	#$0A			; convert to nibble
+.dc7d                              lab_ishn
+.dc7d  29 0f      and #$0f         	AND	#$0F			; convert to binary
+.dc7f  aa         tax              	TAX				; save nibble
+.dc80  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.dc82  f0 e4      beq $dc68        	BEQ	LAB_MLTE		; skip multiply if zero
+.dc84  69 04      adc #$04         	ADC	#$04			; add four to exponent (*16 - carry clear here)
+.dc86  90 dc      bcc $dc64        	BCC	LAB_NLTO		; if no overflow do evaluate digit
+.dc88                              lab_mlto
+.dc88  4c c3 d4   jmp $d4c3        	JMP	LAB_2564		; do overflow error and warm start
+.dc8b                              lab_nxch
+.dc8b  aa         tax              	TAX				; save bit
+.dc8c  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.dc8e  f0 06      beq $dc96        	BEQ	LAB_MLBT		; skip multiply if zero
+.dc90  e6 ac      inc $ac          	INC	FAC1_e		; increment FAC1 exponent (*2)
+.dc92  f0 f4      beq $dc88        	BEQ	LAB_MLTO		; do overflow error if = $00
+.dc94  a9 00      lda #$00         	LDA	#$00			; clear sign compare
+.dc96                              lab_mlbt
+.dc96  85 b8      sta $b8          	STA	FAC_sc		; save sign compare (FAC1 EOR FAC2)
+.dc98  8a         txa              	TXA				; restore bit
+.dc99  20 45 d8   jsr $d845        	JSR	LAB_2912		; evaluate new ASCII digit
+.dc9c                              lab_cbin
+.dc9c  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.dc9f  49 30      eor #$30         	EOR	#"0"			; convert "0" to 0 etc.
+.dca1  c9 02      cmp #$02         	CMP	#$02			; compare with max+1
+.dca3  90 e6      bcc $dc8b        	BCC	LAB_NXCH		; branch exit if < 2
+.dca5                              lab_exch
+.dca5  4c 2a d8   jmp $d82a        	JMP	LAB_28F6		; evaluate -ve flag and return
+.dca8                              ctrlc
+.dca8  ad 00 04   lda $0400        	LDA	ccflag		; get [CTRL-C] check flag
+.dcab  d0 18      bne $dcc5        	BNE	LAB_FBA2		; exit if inhibited
+.dcad  20 ea de   jsr $deea        	JSR	V_INPT		; scan input device
+.dcb0  90 0b      bcc $dcbd        	BCC	LAB_FBA0		; exit if buffer empty
+.dcb2  8d 01 04   sta $0401        	STA	ccbyte		; save received byte
+.dcb5  a2 20      ldx #$20         	LDX	#$20			; "life" timer for bytes
+.dcb7  8e 02 04   stx $0402        	STX	ccnull		; set countdown
+.dcba  4c 17 c3   jmp $c317        	JMP	LAB_1636		; return to BASIC
+.dcbd                              lab_fba0
+.dcbd  ae 02 04   ldx $0402        	LDX	ccnull		; get countdown byte
+.dcc0  f0 03      beq $dcc5        	BEQ	LAB_FBA2		; exit if finished
+.dcc2  ce 02 04   dec $0402        	DEC	ccnull		; else decrement countdown
+.dcc5                              lab_fba2
+.dcc5  a2 dc      ldx #$dc         	LDX	#NmiBase		; set pointer to NMI values
+.dcc7  20 d0 dc   jsr $dcd0        	JSR	LAB_CKIN		; go check interrupt
+.dcca  a2 df      ldx #$df         	LDX	#IrqBase		; set pointer to IRQ values
+.dccc  20 d0 dc   jsr $dcd0        	JSR	LAB_CKIN		; go check interrupt
+.dccf                              lab_crts
+.dccf  60         rts              	RTS
+.dcd0                              lab_ckin
+.dcd0  b5 00      lda $00,x        	LDA	PLUS_0,X		; get interrupt flag byte
+.dcd2  10 fb      bpl $dccf        	BPL	LAB_CRTS		; branch if interrupt not enabled
+.dcd4  0a         asl              	ASL				; move happened bit to setup bit
+.dcd5  29 40      and #$40         	AND	#$40			; mask happened bits
+.dcd7  f0 f6      beq $dccf        	BEQ	LAB_CRTS		; if no interrupt then exit
+.dcd9  95 00      sta $00,x        	STA	PLUS_0,X		; save interrupt flag byte
+.dcdb  8a         txa              	TXA				; copy index ..
+.dcdc  a8         tay              	TAY				; .. to Y
+.dcdd  68         pla              	PLA				; dump return address low byte, call from CTRL-C
+.dcde  68         pla              	PLA				; dump return address high byte
+.dcdf  a9 05      lda #$05         	LDA	#$05			; need 5 bytes for GOSUB
+.dce1  20 03 bf   jsr $bf03        	JSR	LAB_1212		; check room on stack for A bytes
+.dce4  a5 c4      lda $c4          	LDA	Bpntrh		; get BASIC execute pointer high byte
+.dce6  48         pha              	PHA				; push on stack
+.dce7  a5 c3      lda $c3          	LDA	Bpntrl		; get BASIC execute pointer low byte
+.dce9  48         pha              	PHA				; push on stack
+.dcea  a5 88      lda $88          	LDA	Clineh		; get current line high byte
+.dcec  48         pha              	PHA				; push on stack
+.dced  a5 87      lda $87          	LDA	Clinel		; get current line low byte
+.dcef  48         pha              	PHA				; push on stack
+.dcf0  a9 8d      lda #$8d         	LDA	#TK_GOSUB		; token for GOSUB
+.dcf2  48         pha              	PHA				; push on stack
+.dcf3  b9 01 00   lda $0001,y      	LDA	PLUS_1,Y		; get interrupt code pointer low byte
+.dcf6  85 c3      sta $c3          	STA	Bpntrl		; save as BASIC execute pointer low byte
+.dcf8  b9 02 00   lda $0002,y      	LDA	PLUS_2,Y		; get interrupt code pointer high byte
+.dcfb  85 c4      sta $c4          	STA	Bpntrh		; save as BASIC execute pointer high byte
+.dcfd  4c bc c2   jmp $c2bc        	JMP	LAB_15C2		; go do interpreter inner loop
+.dd00                              inget
+.dd00  20 ea de   jsr $deea        	JSR	V_INPT		; call scan input device
+.dd03  b0 09      bcs $dd0e        	BCS	LAB_FB95		; if byte go reset timer
+.dd05  ad 02 04   lda $0402        	LDA	ccnull		; get countdown
+.dd08  f0 09      beq $dd13        	BEQ	LAB_FB96		; exit if empty
+.dd0a  ad 01 04   lda $0401        	LDA	ccbyte		; get last received byte
+.dd0d  38         sec              	SEC				; flag we got a byte
+.dd0e                              lab_fb95
+.dd0e  a2 00      ldx #$00         	LDX	#$00			; clear X
+.dd10  8e 02 04   stx $0402        	STX	ccnull		; clear timer because we got a byte
+.dd13                              lab_fb96
+.dd13  60         rts              	RTS
+.dd14                              lab_irq
+.dd14  a2 df      ldx #$df         	LDX	#IrqBase		; set pointer to IRQ values
+
+>dd16  2c                          	.byte	$2C			; make next line BIT abs.
+.dd17                              lab_nmi
+
+.dd17  a2 dc      ldx #$dc         	LDX	#NmiBase		; set pointer to NMI values
+.dd19  c9 93      cmp #$93         	CMP	#TK_ON		; compare with token for ON
+.dd1b  f0 11      beq $dd2e        	BEQ	LAB_INON		; go turn on interrupt
+.dd1d  c9 b6      cmp #$b6         	CMP	#TK_OFF		; compare with token for OFF
+.dd1f  f0 07      beq $dd28        	BEQ	LAB_IOFF		; go turn off interrupt
+.dd21  49 a2      eor #$a2         	EOR	#TK_CLEAR		; compare with token for CLEAR, A = $00 if = TK_CLEAR
+.dd23  f0 0e      beq $dd33        	BEQ	LAB_INEX		; go clear interrupt flags and return
+.dd25  4c 02 ca   jmp $ca02        	JMP	LAB_SNER		; do syntax error then warm start
+.dd28                              lab_ioff
+.dd28  a9 7f      lda #$7f         	LDA	#$7F			; clear A
+.dd2a  35 00      and $00,x        	AND	PLUS_0,X		; AND with interrupt setup flag
+.dd2c  10 05      bpl $dd33        	BPL	LAB_INEX		; go clear interrupt enabled flag and return
+.dd2e                              lab_inon
+.dd2e  b5 00      lda $00,x        	LDA	PLUS_0,X		; get interrupt setup flag
+.dd30  0a         asl              	ASL				; Shift bit to enabled flag
+.dd31  15 00      ora $00,x        	ORA	PLUS_0,X		; OR with flag byte
+.dd33                              lab_inex
+.dd33  95 00      sta $00,x        	STA	PLUS_0,X		; save interrupt flag byte
+.dd35  4c bc 00   jmp $00bc        	JMP	LAB_IGBY		; update BASIC execute pointer and return
+.dd38                              lab_sirq
+.dd38  58         cli              	CLI				; enable interrupts
+.dd39  a2 df      ldx #$df         	LDX	#IrqBase		; set pointer to IRQ values
+
+>dd3b  2c                          	.byte	$2C			; make next line BIT abs.
+.dd3c                              lab_snmi
+
+.dd3c  a2 dc      ldx #$dc         	LDX	#NmiBase		; set pointer to NMI values
+.dd3e  86 78      stx $78          	STX	TempB			; save interrupt pointer
+.dd40  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory (past token)
+.dd43  20 55 c5   jsr $c555        	JSR	LAB_GFPN		; get fixed-point number into temp integer
+.dd46  a5 79      lda $79          	LDA	Smeml			; get start of mem low byte
+.dd48  a6 7a      ldx $7a          	LDX	Smemh			; get start of mem high byte
+.dd4a  20 28 c1   jsr $c128        	JSR	LAB_SHLN		; search Basic for temp integer line number from AX
+.dd4d  b0 03      bcs $dd52        	BCS	LAB_LFND		; if carry set go set-up interrupt
+.dd4f  4c 72 c4   jmp $c472        	JMP	LAB_16F7		; else go do "Undefined statement" error and warm start
+.dd52                              lab_lfnd
+.dd52  a6 78      ldx $78          	LDX	TempB			; get interrupt pointer
+.dd54  a5 aa      lda $aa          	LDA	Baslnl		; get pointer low byte
+.dd56  e9 01      sbc #$01         	SBC	#$01			; -1 (carry already set for subtract)
+.dd58  95 01      sta $01,x        	STA	PLUS_1,X		; save as interrupt pointer low byte
+.dd5a  a5 ab      lda $ab          	LDA	Baslnh		; get pointer high byte
+.dd5c  e9 00      sbc #$00         	SBC	#$00			; subtract carry
+.dd5e  95 02      sta $02,x        	STA	PLUS_2,X		; save as interrupt pointer high byte
+.dd60  a9 c0      lda #$c0         	LDA	#$C0			; set interrupt enabled/setup bits
+.dd62  95 00      sta $00,x        	STA	PLUS_0,X		; set interrupt flags
+.dd64                              lab_irts
+.dd64  60         rts              	RTS
+.dd65                              lab_retirq
+.dd65  d0 fd      bne $dd64        	BNE	LAB_IRTS		; exit if following token (to allow syntax error)
+.dd67  a5 df      lda $df          	LDA	IrqBase		; get interrupt flags
+.dd69  0a         asl              	ASL				; copy setup to enabled (b7)
+.dd6a  05 df      ora $df          	ORA	IrqBase		; OR in setup flag
+.dd6c  85 df      sta $df          	STA	IrqBase		; save enabled flag
+.dd6e  4c 79 c4   jmp $c479        	JMP	LAB_16E8		; go do rest of RETURN
+.dd71                              lab_retnmi
+.dd71  d0 f1      bne $dd64        	BNE	LAB_IRTS		; exit if following token (to allow syntax error)
+.dd73  a5 dc      lda $dc          	LDA	NmiBase		; get set-up flag
+.dd75  0a         asl              	ASL				; copy setup to enabled (b7)
+.dd76  05 dc      ora $dc          	ORA	NmiBase		; OR in setup flag
+.dd78  85 dc      sta $dc          	STA	NmiBase		; save enabled flag
+.dd7a  4c 79 c4   jmp $c479        	JMP	LAB_16E8		; go do rest of RETURN
+.dd7d                              lab_mmpp
+.dd7d  20 e9 c8   jsr $c8e9        	JSR	LAB_EVEZ		; process expression
+.dd80  4c d0 c8   jmp $c8d0        	JMP	LAB_CTNM		; check if source is numeric, else do type mismatch
+.dd83                              lab_max
+.dd83  20 b1 dd   jsr $ddb1        	JSR	LAB_PHFA		; push FAC1, evaluate expression,
+.dd86  10 fb      bpl $dd83        	BPL	LAB_MAX		; branch if no swap to do
+.dd88  a5 b4      lda $b4          	LDA	FAC2_1		; get FAC2 mantissa1
+.dd8a  09 80      ora #$80         	ORA	#$80			; set top bit (clear sign from compare)
+.dd8c  85 b4      sta $b4          	STA	FAC2_1		; save FAC2 mantissa1
+.dd8e  20 c3 d3   jsr $d3c3        	JSR	LAB_279B		; copy FAC2 to FAC1
+.dd91  f0 f0      beq $dd83        	BEQ	LAB_MAX		; go do next (branch always)
+.dd93                              lab_min
+.dd93  20 b1 dd   jsr $ddb1        	JSR	LAB_PHFA		; push FAC1, evaluate expression,
+.dd96  30 fb      bmi $dd93        	BMI	LAB_MIN		; branch if no swap to do
+.dd98  f0 f9      beq $dd93        	BEQ	LAB_MIN		; branch if no swap to do
+.dd9a  a5 b4      lda $b4          	LDA	FAC2_1		; get FAC2 mantissa1
+.dd9c  09 80      ora #$80         	ORA	#$80			; set top bit (clear sign from compare)
+.dd9e  85 b4      sta $b4          	STA	FAC2_1		; save FAC2 mantissa1
+.dda0  20 c3 d3   jsr $d3c3        	JSR	LAB_279B		; copy FAC2 to FAC1
+.dda3  f0 ee      beq $dd93        	BEQ	LAB_MIN		; go do next (branch always)
+.dda5                              lab_mmec
+.dda5  c9 29      cmp #$29         	CMP	#")"			; is it end of function?
+.dda7  d0 05      bne $ddae        	BNE	LAB_MMSE		; if not do MAX MIN syntax error
+.dda9  68         pla              	PLA				; dump return address low byte
+.ddaa  68         pla              	PLA				; dump return address high byte
+.ddab  4c bc 00   jmp $00bc        	JMP	LAB_IGBY		; update BASIC execute pointer (to chr past ")")
+.ddae                              lab_mmse
+.ddae  4c 02 ca   jmp $ca02        	JMP	LAB_SNER		; do syntax error then warm start
+.ddb1                              lab_phfa
+.ddb1  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; get next BASIC byte
+.ddb4  c9 2c      cmp #$2c         	CMP	#","			; is there more ?
+.ddb6  d0 ed      bne $dda5        	BNE	LAB_MMEC		; if not go do end check
+.ddb8  20 d9 d6   jsr $d6d9        	JSR	LAB_27BA		; round FAC1
+.ddbb  a5 b0      lda $b0          	LDA	FAC1_s		; get FAC1 sign
+.ddbd  09 7f      ora #$7f         	ORA	#$7F			; set all non sign bits
+.ddbf  25 ad      and $ad          	AND	FAC1_1		; AND FAC1 mantissa1 (AND in sign bit)
+.ddc1  48         pha              	PHA				; push on stack
+.ddc2  a5 ae      lda $ae          	LDA	FAC1_2		; get FAC1 mantissa2
+.ddc4  48         pha              	PHA				; push on stack
+.ddc5  a5 af      lda $af          	LDA	FAC1_3		; get FAC1 mantissa3
+.ddc7  48         pha              	PHA				; push on stack
+.ddc8  a5 ac      lda $ac          	LDA	FAC1_e		; get FAC1 exponent
+.ddca  48         pha              	PHA				; push on stack
+.ddcb  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; scan and get next BASIC byte (after ",")
+.ddce  20 cd c8   jsr $c8cd        	JSR	LAB_EVNM		; evaluate expression and check is numeric,
+.ddd1  68         pla              	PLA				; pop exponent
+.ddd2  85 b3      sta $b3          	STA	FAC2_e		; save FAC2 exponent
+.ddd4  68         pla              	PLA				; pop mantissa3
+.ddd5  85 b6      sta $b6          	STA	FAC2_3		; save FAC2 mantissa3
+.ddd7  68         pla              	PLA				; pop mantissa1
+.ddd8  85 b5      sta $b5          	STA	FAC2_2		; save FAC2 mantissa2
+.ddda  68         pla              	PLA				; pop sign/mantissa1
+.dddb  85 b4      sta $b4          	STA	FAC2_1		; save FAC2 sign/mantissa1
+.dddd  85 b7      sta $b7          	STA	FAC2_s		; save FAC2 sign
+.dddf  a9 b3      lda #$b3         	LDA	#<FAC2_e		; set pointer low byte to FAC2
+.dde1  a0 00      ldy #$00         	LDY	#>FAC2_e		; set pointer high byte to FAC2
+.dde3  4c 17 d7   jmp $d717        	JMP	LAB_27F8		; compare FAC1 with FAC2 (AY) and return
+.dde6                              lab_wdth
+.dde6  c9 2c      cmp #$2c         	CMP	#","			; is next byte ","
+.dde8  f0 1b      beq $de05        	BEQ	LAB_TBSZ		; if so do tab size
+.ddea  20 8c d2   jsr $d28c        	JSR	LAB_GTBY		; get byte parameter
+.dded  8a         txa              	TXA				; copy width to A
+.ddee  f0 0a      beq $ddfa        	BEQ	LAB_NSTT		; branch if set for infinite line
+.ddf0  e0 10      cpx #$10         	CPX	#$10			; else make min width = 16d
+.ddf2  90 45      bcc $de39        	BCC	TabErr		; if less do function call error and exit
+.ddf4  e4 64      cpx $64          	CPX	TabSiz		; compare with tab size
+.ddf6  b0 02      bcs $ddfa        	BCS	LAB_NSTT		; branch if >= tab size
+.ddf8  86 64      stx $64          	STX	TabSiz		; else make tab size = terminal width
+.ddfa                              lab_nstt
+.ddfa  86 0f      stx $0f          	STX	TWidth		; set the terminal width
+.ddfc  20 c2 00   jsr $00c2        	JSR	LAB_GBYT		; get BASIC byte back
+.ddff  f0 1a      beq $de1b        	BEQ	WExit			; exit if no following
+.de01  c9 2c      cmp #$2c         	CMP	#","			; else is it ","
+.de03  d0 a9      bne $ddae        	BNE	LAB_MMSE		; if not do syntax error
+.de05                              lab_tbsz
+.de05  20 89 d2   jsr $d289        	JSR	LAB_SGBY		; scan and get byte parameter
+.de08  8a         txa              	TXA				; copy TAB size
+.de09  30 2e      bmi $de39        	BMI	TabErr		; if >127 do function call error and exit
+.de0b  e0 01      cpx #$01         	CPX	#$01			; compare with min-1
+.de0d  90 2a      bcc $de39        	BCC	TabErr		; if <=1 do function call error and exit
+.de0f  a5 0f      lda $0f          	LDA	TWidth		; set flags for width
+.de11  f0 06      beq $de19        	BEQ	LAB_SVTB		; skip check if infinite line
+.de13  e4 0f      cpx $0f          	CPX	TWidth		; compare TAB with width
+.de15  f0 02      beq $de19        	BEQ	LAB_SVTB		; ok if =
+.de17  b0 20      bcs $de39        	BCS	TabErr		; branch if too big
+.de19                              lab_svtb
+.de19  86 64      stx $64          	STX	TabSiz		; save TAB size
+.de1b                              wexit
+.de1b  a5 0f      lda $0f          	LDA	TWidth		; get width
+.de1d  f0 06      beq $de25        	BEQ	LAB_SULP		; branch if infinite line
+.de1f  c5 64      cmp $64          	CMP	TabSiz		; compare with tab size
+.de21  b0 03      bcs $de26        	BCS	LAB_WDLP		; branch if >= tab size
+.de23  85 64      sta $64          	STA	TabSiz		; else make tab size = terminal width
+.de25                              lab_sulp
+.de25  38         sec              	SEC				; set carry for subtract
+.de26                              lab_wdlp
+.de26  e5 64      sbc $64          	SBC	TabSiz		; subtract tab size
+.de28  b0 fc      bcs $de26        	BCS	LAB_WDLP		; loop while no borrow
+.de2a  65 64      adc $64          	ADC	TabSiz		; add tab size back
+.de2c  18         clc              	CLC				; clear carry for add
+.de2d  65 64      adc $64          	ADC	TabSiz		; add tab size back again
+.de2f  85 10      sta $10          	STA	Iclim			; save for now
+.de31  a5 0f      lda $0f          	LDA	TWidth		; get width back
+.de33  38         sec              	SEC				; set carry for subtract
+.de34  e5 10      sbc $10          	SBC	Iclim			; subtract remainder
+.de36  85 10      sta $10          	STA	Iclim			; save tab column limit
+.de38                              lab_nosq
+.de38  60         rts              	RTS
+.de39                              taberr
+.de39  4c 29 cd   jmp $cd29        	JMP	LAB_FCER		; do function call error then warm start
+.de3c                              lab_sqr
+.de3c  a5 b0      lda $b0          	LDA	FAC1_s		; get FAC1 sign
+.de3e  30 f9      bmi $de39        	BMI	TabErr		; if -ve do function call error
+.de40  a5 ac      lda $ac          	LDA	FAC1_e		; get exponent
+.de42  f0 f4      beq $de38        	BEQ	LAB_NOSQ		; if zero just return
+.de44  20 ca d6   jsr $d6ca        	JSR	LAB_27AB		; round and copy FAC1 to FAC2
+.de47  a9 00      lda #$00         	LDA	#$00			; clear A
+.de49  85 77      sta $77          	STA	FACt_3		; clear remainder
+.de4b  85 76      sta $76          	STA	FACt_2		; ..
+.de4d  85 75      sta $75          	STA	FACt_1		; ..
+.de4f  85 78      sta $78          	STA	TempB			; ..
+.de51  85 af      sta $af          	STA	FAC1_3		; clear root
+.de53  85 ae      sta $ae          	STA	FAC1_2		; ..
+.de55  85 ad      sta $ad          	STA	FAC1_1		; ..
+.de57  a2 18      ldx #$18         	LDX	#$18			; 24 pairs of bits to do
+.de59  a5 b3      lda $b3          	LDA	FAC2_e		; get exponent
+.de5b  4a         lsr              	LSR				; check odd/even
+.de5c  b0 0e      bcs $de6c        	BCS	LAB_SQE2		; if odd only 1 shift first time
+.de5e                              lab_sqe1
+.de5e  06 b6      asl $b6          	ASL	FAC2_3		; shift highest bit of number ..
+.de60  26 b5      rol $b5          	ROL	FAC2_2		; ..
+.de62  26 b4      rol $b4          	ROL	FAC2_1		; ..
+.de64  26 77      rol $77          	ROL	FACt_3		; .. into remainder
+.de66  26 76      rol $76          	ROL	FACt_2		; ..
+.de68  26 75      rol $75          	ROL	FACt_1		; ..
+.de6a  26 78      rol $78          	ROL	TempB			; .. never overflows
+.de6c                              lab_sqe2
+.de6c  06 b6      asl $b6          	ASL	FAC2_3		; shift highest bit of number ..
+.de6e  26 b5      rol $b5          	ROL	FAC2_2		; ..
+.de70  26 b4      rol $b4          	ROL	FAC2_1		; ..
+.de72  26 77      rol $77          	ROL	FACt_3		; .. into remainder
+.de74  26 76      rol $76          	ROL	FACt_2		; ..
+.de76  26 75      rol $75          	ROL	FACt_1		; ..
+.de78  26 78      rol $78          	ROL	TempB			; .. never overflows
+.de7a  06 af      asl $af          	ASL	FAC1_3		; root = root * 2
+.de7c  26 ae      rol $ae          	ROL	FAC1_2		; ..
+.de7e  26 ad      rol $ad          	ROL	FAC1_1		; .. never overflows
+.de80  a5 af      lda $af          	LDA	FAC1_3		; get root low byte
+.de82  2a         rol              	ROL				; *2
+.de83  85 5b      sta $5b          	STA	Temp3			; save partial low byte
+.de85  a5 ae      lda $ae          	LDA	FAC1_2		; get root low mid byte
+.de87  2a         rol              	ROL				; *2
+.de88  85 5c      sta $5c          	STA	Temp3+1		; save partial low mid byte
+.de8a  a5 ad      lda $ad          	LDA	FAC1_1		; get root high mid byte
+.de8c  2a         rol              	ROL				; *2
+.de8d  85 5d      sta $5d          	STA	Temp3+2		; save partial high mid byte
+.de8f  a9 00      lda #$00         	LDA	#$00			; get root high byte (always $00)
+.de91  2a         rol              	ROL				; *2
+.de92  85 5e      sta $5e          	STA	Temp3+3		; save partial high byte
+.de94  a5 77      lda $77          	LDA	FACt_3		; get remainder low byte
+.de96  e5 5b      sbc $5b          	SBC	Temp3			; subtract partial low byte
+.de98  85 5b      sta $5b          	STA	Temp3			; save partial low byte
+.de9a  a5 76      lda $76          	LDA	FACt_2		; get remainder low mid byte
+.de9c  e5 5c      sbc $5c          	SBC	Temp3+1		; subtract partial low mid byte
+.de9e  85 5c      sta $5c          	STA	Temp3+1		; save partial low mid byte
+.dea0  a5 75      lda $75          	LDA	FACt_1		; get remainder high mid byte
+.dea2  e5 5d      sbc $5d          	SBC	Temp3+2		; subtract partial high mid byte
+.dea4  a8         tay              	TAY				; copy partial high mid byte
+.dea5  a5 78      lda $78          	LDA	TempB			; get remainder high byte
+.dea7  e5 5e      sbc $5e          	SBC	Temp3+3		; subtract partial high byte
+.dea9  90 0e      bcc $deb9        	BCC	LAB_SQNS		; skip sub if remainder smaller
+.deab  85 78      sta $78          	STA	TempB			; save remainder high byte
+.dead  84 75      sty $75          	STY	FACt_1		; save remainder high mid byte
+.deaf  a5 5c      lda $5c          	LDA	Temp3+1		; get remainder low mid byte
+.deb1  85 76      sta $76          	STA	FACt_2		; save remainder low mid byte
+.deb3  a5 5b      lda $5b          	LDA	Temp3			; get partial low byte
+.deb5  85 77      sta $77          	STA	FACt_3		; save remainder low byte
+.deb7  e6 af      inc $af          	INC	FAC1_3		; increment root low byte (never any rollover)
+.deb9                              lab_sqns
+.deb9  ca         dex              	DEX				; decrement bit pair count
+.deba  d0 a2      bne $de5e        	BNE	LAB_SQE1		; loop if not all done
+.debc  38         sec              	SEC				; set carry for subtract
+.debd  a5 b3      lda $b3          	LDA	FAC2_e		; get exponent
+.debf  e9 80      sbc #$80         	SBC	#$80			; normalise
+.dec1  6a         ror              	ROR				; /2 and re-bias to $80
+.dec2  69 00      adc #$00         	ADC	#$00			; add bit zero back in (allow for half shift)
+.dec4  85 ac      sta $ac          	STA	FAC1_e		; save it
+.dec6  4c 34 d4   jmp $d434        	JMP	LAB_24D5		; normalise FAC1 and return
+.dec9                              lab_varptr
+.dec9  20 bc 00   jsr $00bc        	JSR	LAB_IGBY		; increment and scan memory
+.decc  20 aa cb   jsr $cbaa        	JSR	LAB_GVAR		; get var address
+.decf  20 ef c9   jsr $c9ef        	JSR	LAB_1BFB		; scan for ")" , else do syntax error then warm start
+.ded2  a4 95      ldy $95          	LDY	Cvaral		; get var address low byte
+.ded4  a5 96      lda $96          	LDA	Cvarah		; get var address high byte
+.ded6  4c 59 ce   jmp $ce59        	JMP	LAB_AYFC		; save and convert integer AY to FAC1 and return
+.ded9                              lab_pi
+.ded9  a9 bb      lda #$bb         	LDA	#<LAB_2C7C		; set (2*pi) pointer low byte
+.dedb  a0 df      ldy #$df         	LDY	#>LAB_2C7C		; set (2*pi) pointer high byte
+.dedd  20 7d d6   jsr $d67d        	JSR	LAB_UFAC		; unpack memory (AY) into FAC1
+.dee0  c6 ac      dec $ac          	DEC	FAC1_e		; make result = PI
+.dee2  60         rts              	RTS
+.dee3                              lab_twopi
+.dee3  a9 bb      lda #$bb         	LDA	#<LAB_2C7C		; set (2*pi) pointer low byte
+.dee5  a0 df      ldy #$df         	LDY	#>LAB_2C7C		; set (2*pi) pointer high byte
+.dee7  4c 7d d6   jmp $d67d        	JMP	LAB_UFAC		; unpack memory (AY) into FAC1 and return
+.deea                              v_inpt
+.deea  6c 05 04   jmp ($0405)      	JMP	(VEC_IN)		; non halting scan input device
+.deed                              v_outp
+.deed  6c 07 04   jmp ($0407)      	JMP	(VEC_OUT)		; send byte to output device
+.def0                              v_load
+.def0  6c 09 04   jmp ($0409)      	JMP	(VEC_LD)		; load BASIC program
+.def3                              v_save
+.def3  6c 0b 04   jmp ($040b)      	JMP	(VEC_SV)		; save BASIC program
+.def6                              pg2_tabs
+
+>def6  00                          	.byte	$00			; ctrl-c flag		-	$00 = enabled
+>def7  00                          	.byte	$00			; ctrl-c byte		-	GET needs this
+>def8  00                          	.byte	$00			; ctrl-c byte timeout	-	GET needs this
+>def9  a8 dc                       	.word	CTRLC			; ctrl c check vector
+.defb                              pg2_tabe
+.defb                              lab_2cee
+
+.defb  e6 c3      inc $c3          	INC	Bpntrl		; increment BASIC execute pointer low byte
+.defd  d0 02      bne $df01        	BNE	LAB_2CF4		; branch if no carry
+.deff  e6 c4      inc $c4          	INC	Bpntrh		; increment BASIC execute pointer high byte
+.df01                              lab_2cf4
+.df01  ad ff ff   lda $ffff        	LDA	$FFFF			; get byte to scan (addr set by call routine)
+.df04  c9 ad      cmp #$ad         	CMP	#TK_ELSE		; compare with the token for ELSE
+.df06  f0 0e      beq $df16        	BEQ	LAB_2D05		; exit if ELSE, not numeric, carry set
+.df08  c9 3a      cmp #$3a         	CMP	#":"			; compare with ":"
+.df0a  b0 0a      bcs $df16        	BCS	LAB_2D05		; exit if >= ":", not numeric, carry set
+.df0c  c9 20      cmp #$20         	CMP	#" "			; compare with " "
+.df0e  f0 eb      beq $defb        	BEQ	LAB_2CEE		; if " " go do next
+.df10  38         sec              	SEC				; set carry for SBC
+.df11  e9 30      sbc #$30         	SBC	#"0"			; subtract "0"
+.df13  38         sec              	SEC				; set carry for SBC
+.df14  e9 d0      sbc #$d0         	SBC	#$D0			; subtract -"0"
+.df16                              lab_2d05
+.df16  60         rts              	RTS
+.df17                              strtab
+
+>df17  4c                          	.byte	$4C			; JMP opcode
+>df18  00 be                       	.word LAB_COLD		; initial warm start vector (cold start)
+>df1a  00                          	.byte	$00			; these bytes are not used by BASIC
+>df1b  00 00                       	.word	$0000			; 
+>df1d  00 00                       	.word	$0000			; 
+>df1f  00 00                       	.word	$0000			; 
+>df21  4c                          	.byte	$4C			; JMP opcode
+>df22  29 cd                       	.word	LAB_FCER		; initial user function vector ("Function call" error)
+>df24  00                          	.byte	$00			; default NULL count
+>df25  00                          	.byte	$00			; clear terminal position
+>df26  00                          	.byte	$00			; default terminal width byte
+>df27  f2                          	.byte	$F2			; default limit for TAB = 14
+>df28  00 05                       	.word	Ram_base		; start of user RAM
+.df2a                              endtab
+.df2a                              lab_mszm
+>df2a  0d 0a 4d 65 6d 6f 72 79 20 73 69 7a 65 20 00  	.byte	$0D,$0A,"Memory size ",$00
+.df39                              lab_smsg
+>df39  20 42 79 74 65 73 20 66 72 65 65 0d 0a 0a  	.byte	" Bytes free",$0D,$0A,$0A
+>df47  45 6e 68 61 6e 63 65 64 20 42 41 53 49 43 20 32 2e 32 32 0a 00  	.byte	"Enhanced BASIC 2.22",$0A,$00
+.df5c                              lab_25a0
+>df5c  02                          	.byte	$02			; counter
+>df5d  80 19 56 62                 	.byte	$80,$19,$56,$62	; 0.59898
+>df61  80 76 22 f3                 	.byte	$80,$76,$22,$F3	; 0.96147
+>df65  82 38 aa 40                 	.byte	$82,$38,$AA,$40	; 2.88539
+.df69                              lab_25ad
+>df69  80 35 04 f3                 	.byte	$80,$35,$04,$F3	; 0.70711	1/root 2
+.df6d                              lab_25b1
+>df6d  81 35 04 f3                 	.byte	$81,$35,$04,$F3	; 1.41421	root 2
+.df71                              lab_25b5
+>df71  80 80 00 00                 	.byte	$80,$80,$00,$00	; -0.5
+.df75                              lab_25b9
+>df75  80 31 72 18                 	.byte	$80,$31,$72,$18	; 0.69315	LOG(2)
+.df79                              lab_2947
+>df79  91 43 4f f8                 	.byte	$91,$43,$4F,$F8	; 99999.9375 (max value with at least one decimal)
+.df7d                              lab_294b
+>df7d  94 74 23 f7                 	.byte	$94,$74,$23,$F7	; 999999.4375 (max value before scientific notation)
+.df81                              lab_294f
+>df81  94 74 24 00                 	.byte	$94,$74,$24,$00	; 1000000
+.df85                              lab_2afa
+>df85  81 38 aa 3b                 	.byte	$81,$38,$AA,$3B	; 1.4427	(1/LOG base 2 e)
+.df89                              lab_2afe
+>df89  06                          	.byte	$06			; counter
+>df8a  74 63 90 8c                 	.byte	$74,$63,$90,$8C	; 2.17023e-4
+>df8e  77 23 0c ab                 	.byte	$77,$23,$0C,$AB	; 0.00124
+>df92  7a 1e 94 00                 	.byte	$7A,$1E,$94,$00	; 0.00968
+>df96  7c 63 42 80                 	.byte	$7C,$63,$42,$80	; 0.05548
+>df9a  7e 75 fe d0                 	.byte	$7E,$75,$FE,$D0	; 0.24023
+>df9e  80 31 72 15                 	.byte	$80,$31,$72,$15	; 0.69315
+>dfa2  81 00 00 00                 	.byte	$81,$00,$00,$00	; 1.00000
+.dfa6                              lab_2c78
+>dfa6  81 49 0f db                 	.byte	$81,$49,$0F,$DB	; 1.570796371 (pi/2) as floating #
+.dfaa                              lab_2c84
+>dfaa  04                          	.byte	$04			; counter
+>dfab  86 1e d7 fb                 	.byte	$86,$1E,$D7,$FB	; 39.7109
+>dfaf  87 99 26 65                 	.byte	$87,$99,$26,$65	;-76.575
+>dfb3  87 23 34 58                 	.byte	$87,$23,$34,$58	; 81.6022
+>dfb7  86 a5 5d e1                 	.byte	$86,$A5,$5D,$E1	;-41.3417
+.dfbb                              lab_2c7c
+>dfbb  83 49 0f db                 	.byte	$83,$49,$0F,$DB	; 6.28319 (2*pi) as floating #
+.dfbf                              lab_2cc9
+>dfbf  08                          	.byte	$08			; counter
+>dfc0  78 3a c5 37                 	.byte	$78,$3A,$C5,$37	; 0.00285
+>dfc4  7b 83 a2 5c                 	.byte	$7B,$83,$A2,$5C	;-0.0160686
+>dfc8  7c 2e dd 4d                 	.byte	$7C,$2E,$DD,$4D	; 0.0426915
+>dfcc  7d 99 b0 1e                 	.byte	$7D,$99,$B0,$1E	;-0.0750429
+>dfd0  7d 59 ed 24                 	.byte	$7D,$59,$ED,$24	; 0.106409
+>dfd4  7e 91 72 00                 	.byte	$7E,$91,$72,$00	;-0.142036
+>dfd8  7e 4c b9 73                 	.byte	$7E,$4C,$B9,$73	; 0.199926
+>dfdc  7f aa aa 53                 	.byte	$7F,$AA,$AA,$53	;-0.333331
+.dfe0                              lab_259c
+>dfe0  81 00 00 00                 	.byte	$81,$00,$00,$00	; 1.000000, used for INC
+.dfe4                              lab_2afd
+>dfe4  81 80 00 00                 	.byte	$81,$80,$00,$00	; -1.00000, used for DEC. must be on the same page as +1.00
+.dfe8                              lab_1df7
+>dfe8  90                          	.byte	$90			;-32768 (uses first three bytes from 0.5)
+.dfe9                              lab_2a96
+>dfe9  80 00 00 00                 	.byte	$80,$00,$00,$00	; 0.5
+.dfed                              lab_2c80
+>dfed  7f 00 00 00                 	.byte	$7F,$00,$00,$00	; 0.25
+.dff1                              lab_26b5
+>dff1  84 20 00 00                 	.byte	$84,$20,$00,$00	; 10.0000 divide by 10 constant
+.dff5                              lab_2a9a
+>dff5  fe 79 60                    	.byte	$FE,$79,$60		; -100000
+>dff8  00 27 10                    	.byte	$00,$27,$10		; 10000
+>dffb  ff fc 18                    	.byte	$FF,$FC,$18		; -1000
+>dffe  00 00 64                    	.byte	$00,$00,$64		; 100
+>e001  ff ff f6                    	.byte	$FF,$FF,$F6		; -10
+>e004  00 00 01                    	.byte	$00,$00,$01		; 1
+.e007                              lab_ctbl
+>e007  1a c3                       	.word	LAB_END-1		; END
+>e009  57 c2                       	.word	LAB_FOR-1		; FOR
+>e00b  64 c8                       	.word	LAB_NEXT-1		; NEXT
+>e00d  8b c4                       	.word	LAB_DATA-1		; DATA
+>e00f  46 c7                       	.word	LAB_INPUT-1		; INPUT
+>e011  5e cb                       	.word	LAB_DIM-1		; DIM
+>e013  66 c7                       	.word	LAB_READ-1		; READ
+>e015  b3 c5                       	.word	LAB_LET-1		; LET
+>e017  85 c5                       	.word	LAB_DEC-1		; DEC			new command
+>e019  ea c3                       	.word	LAB_GOTO-1		; GOTO
+>e01b  a9 c3                       	.word	LAB_RUN-1		; RUN
+>e01d  b9 c4                       	.word	LAB_IF-1		; IF
+>e01f  41 c3                       	.word	LAB_RESTORE-1	; RESTORE		modified command
+>e021  cd c3                       	.word	LAB_GOSUB-1		; GOSUB
+>e023  64 dd                       	.word	LAB_RETIRQ-1	; RETIRQ		new command
+>e025  70 dd                       	.word	LAB_RETNMI-1	; RETNMI		new command
+>e027  76 c4                       	.word	LAB_RETURN-1	; RETURN
+>e029  1d c5                       	.word	LAB_REM-1		; REM
+>e02b  18 c3                       	.word	LAB_STOP-1		; STOP
+>e02d  26 c5                       	.word	LAB_ON-1		; ON			modified command
+>e02f  7f c3                       	.word	LAB_NULL-1		; NULL		modified command
+>e031  88 c5                       	.word	LAB_INC-1		; INC			new command
+>e033  88 d3                       	.word	LAB_WAIT-1		; WAIT
+>e035  ef de                       	.word	V_LOAD-1		; LOAD
+>e037  f2 de                       	.word	V_SAVE-1		; SAVE
+>e039  73 ce                       	.word	LAB_DEF-1		; DEF
+>e03b  0d d3                       	.word	LAB_POKE-1		; POKE
+>e03d  29 d3                       	.word	LAB_DOKE-1		; DOKE		new command
+>e03f  76 d3                       	.word	LAB_CALL-1		; CALL		new command
+>e041  b3 c3                       	.word	LAB_DO-1		; DO			new command
+>e043  1c c4                       	.word	LAB_LOOP-1		; LOOP		new command
+>e045  54 c6                       	.word	LAB_PRINT-1		; PRINT
+>e047  85 c3                       	.word	LAB_CONT-1		; CONT
+>e049  a2 c1                       	.word	LAB_LIST-1		; LIST
+>e04b  9f c1                       	.word	LAB_CLEAR-1		; CLEAR
+>e04d  4d c1                       	.word	LAB_NEW-1		; NEW
+>e04f  e5 dd                       	.word	LAB_WDTH-1		; WIDTH		new command
+>e051  23 c6                       	.word	LAB_GET-1		; GET			new command
+>e053  4e d3                       	.word	LAB_SWAP-1		; SWAP		new command
+>e055  81 db                       	.word	LAB_BITSET-1	; BITSET		new command
+>e057  95 db                       	.word	LAB_BITCLR-1	; BITCLR		new command
+>e059  13 dd                       	.word	LAB_IRQ-1		; IRQ			new command
+>e05b  16 dd                       	.word	LAB_NMI-1		; NMI			new command
+>e05d  3d e8                       	.word   SYSjmp-1                ; SYS         *** added for SBC-2
+.e05f                              lab_ftpl
+>e05f  64 ca                       	.word	LAB_PPFN-1		; SGN(n)	process numeric expression in ()
+>e061  64 ca                       	.word	LAB_PPFN-1		; INT(n)		"
+>e063  64 ca                       	.word	LAB_PPFN-1		; ABS(n)		"
+>e065  e8 c8                       	.word	LAB_EVEZ-1		; USR(x)	process any expression
+>e067  eb c9                       	.word	LAB_1BF7-1		; FRE(x)		"
+>e069  eb c9                       	.word	LAB_1BF7-1		; POS(x)		"
+>e06b  64 ca                       	.word	LAB_PPFN-1		; SQR(n)	process numeric expression in ()
+>e06d  64 ca                       	.word	LAB_PPFN-1		; RND(n)		"
+>e06f  64 ca                       	.word	LAB_PPFN-1		; LOG(n)		"
+>e071  64 ca                       	.word	LAB_PPFN-1		; EXP(n)		"
+>e073  64 ca                       	.word	LAB_PPFN-1		; COS(n)		"
+>e075  64 ca                       	.word	LAB_PPFN-1		; SIN(n)		"
+>e077  64 ca                       	.word	LAB_PPFN-1		; TAN(n)		"
+>e079  64 ca                       	.word	LAB_PPFN-1		; ATN(n)		"
+>e07b  64 ca                       	.word	LAB_PPFN-1		; PEEK(n)		"
+>e07d  64 ca                       	.word	LAB_PPFN-1		; DEEK(n)		"
+>e07f  00 00                       	.word	$0000			; SADD()	none
+>e081  5e ca                       	.word	LAB_PPFS-1		; LEN($)	process string expression in ()
+>e083  64 ca                       	.word	LAB_PPFN-1		; STR$(n)	process numeric expression in ()
+>e085  5e ca                       	.word	LAB_PPFS-1		; VAL($)	process string expression in ()
+>e087  5e ca                       	.word	LAB_PPFS-1		; ASC($)		"
+>e089  5e ca                       	.word	LAB_PPFS-1		; UCASE$($)		"
+>e08b  5e ca                       	.word	LAB_PPFS-1		; LCASE$($)		"
+>e08d  64 ca                       	.word	LAB_PPFN-1		; CHR$(n)	process numeric expression in ()
+>e08f  8b ca                       	.word	LAB_BHSS-1		; HEX$(n)		"
+>e091  8b ca                       	.word	LAB_BHSS-1		; BIN$(n)		"
+>e093  00 00                       	.word	$0000			; BITTST()	none
+>e095  7c dd                       	.word	LAB_MMPP-1		; MAX()	process numeric expression
+>e097  7c dd                       	.word	LAB_MMPP-1		; MIN()		"
+>e099  6a ca                       	.word	LAB_PPBI-1		; PI		advance pointer
+>e09b  6a ca                       	.word	LAB_PPBI-1		; TWOPI		"
+>e09d  00 00                       	.word	$0000			; VARPTR()	none
+>e09f  6f ca                       	.word	LAB_LRMS-1		; LEFT$()	process string expression
+>e0a1  6f ca                       	.word	LAB_LRMS-1		; RIGHT$()		"
+>e0a3  6f ca                       	.word	LAB_LRMS-1		; MID$()		"
+.e0a5                              lab_ftbl
+>e0a5  f6 d6                       	.word	LAB_SGN-1		; SGN()
+>e0a7  80 d7                       	.word	LAB_INT-1		; INT()
+>e0a9  13 d7                       	.word	LAB_ABS-1		; ABS()
+>e0ab  4c db                       	.word	LAB_USR-1		; USR()
+>e0ad  44 ce                       	.word	LAB_FRE-1		; FRE()
+>e0af  63 ce                       	.word	LAB_POS-1		; POS()
+>e0b1  3b de                       	.word	LAB_SQR-1		; SQR()
+>e0b3  9c da                       	.word	LAB_RND-1		; RND()		modified function
+>e0b5  fa d4                       	.word	LAB_LOG-1		; LOG()
+>e0b7  fe d9                       	.word	LAB_EXP-1		; EXP()
+>e0b9  d0 da                       	.word	LAB_COS-1		; COS()
+>e0bb  d7 da                       	.word	LAB_SIN-1		; SIN()
+>e0bd  20 db                       	.word	LAB_TAN-1		; TAN()
+>e0bf  52 db                       	.word	LAB_ATN-1		; ATN()
+>e0c1  02 d3                       	.word	LAB_PEEK-1		; PEEK()
+>e0c3  16 d3                       	.word	LAB_DEEK-1		; DEEK()		new function
+>e0c5  54 d2                       	.word	LAB_SADD-1		; SADD()		new function
+>e0c7  6d d2                       	.word	LAB_LENS-1		; LEN()
+>e0c9  25 cf                       	.word	LAB_STRS-1		; STR$()
+>e0cb  9a d2                       	.word	LAB_VAL-1		; VAL()
+>e0cd  78 d2                       	.word	LAB_ASC-1		; ASC()
+>e0cf  32 d2                       	.word	LAB_UCASE-1		; UCASE$()		new function
+>e0d1  11 d2                       	.word	LAB_LCASE-1		; LCASE$()		new function
+>e0d3  83 d1                       	.word	LAB_CHRS-1		; CHR$()
+>e0d5  22 dc                       	.word	LAB_HEXS-1		; HEX$()		new function
+>e0d7  d3 db                       	.word	LAB_BINS-1		; BIN$()		new function
+>e0d9  ab db                       	.word	LAB_BTST-1		; BITTST()		new function
+>e0db  82 dd                       	.word	LAB_MAX-1		; MAX()		new function
+>e0dd  92 dd                       	.word	LAB_MIN-1		; MIN()		new function
+>e0df  d8 de                       	.word	LAB_PI-1		; PI			new function
+>e0e1  e2 de                       	.word	LAB_TWOPI-1		; TWOPI		new function
+>e0e3  c8 de                       	.word	LAB_VARPTR-1	; VARPTR()		new function
+>e0e5  95 d1                       	.word	LAB_LEFT-1		; LEFT$()
+>e0e7  9e d1                       	.word	LAB_RIGHT-1		; RIGHT$()
+>e0e9  cd d1                       	.word	LAB_MIDS-1		; MID$()
+.e0eb                              lab_oppt
+>e0eb  79                          	.byte	$79			; +
+>e0ec  c0 d3                       	.word	LAB_ADD-1
+>e0ee  79                          	.byte	$79			; -
+>e0ef  a5 d3                       	.word	LAB_SUBTRACT-1
+>e0f1  7b                          	.byte	$7B			; *
+>e0f2  3b d5                       	.word	LAB_MULTIPLY-1
+>e0f4  7b                          	.byte	$7B			; /
+>e0f5  03 d6                       	.word	LAB_DIVIDE-1
+>e0f7  7f                          	.byte	$7F			; ^
+>e0f8  ba d9                       	.word	LAB_POWER-1
+>e0fa  50                          	.byte	$50			; AND
+>e0fb  d4 ca                       	.word	LAB_AND-1
+>e0fd  46                          	.byte	$46			; EOR			new operator
+>e0fe  ba ca                       	.word	LAB_EOR-1
+>e100  46                          	.byte	$46			; OR
+>e101  c7 ca                       	.word	LAB_OR-1
+>e103  56                          	.byte	$56			; >>			new operator
+>e104  80 cb                       	.word	LAB_RSHIFT-1
+>e106  56                          	.byte	$56			; <<			new operator
+>e107  68 cb                       	.word	LAB_LSHIFT-1
+>e109  7d                          	.byte	$7D			; >
+>e10a  f3 d9                       	.word	LAB_GTHAN-1
+>e10c  5a                          	.byte	$5A			; =
+>e10d  16 ca                       	.word	LAB_EQUAL-1
+>e10f  64                          	.byte	$64			; <
+>e110  f5 ca                       	.word	LAB_LTHAN-1
+.e112                              tab_1stc
+>e112  2a                          	.byte	"*"
+>e113  2b                          	.byte	"+"
+>e114  2d                          	.byte	"-"
+>e115  2f                          	.byte	"/"
+>e116  3c                          	.byte	"<"
+>e117  3d                          	.byte	"="
+>e118  3e                          	.byte	">"
+>e119  3f                          	.byte	"?"
+>e11a  41                          	.byte	"A"
+>e11b  42                          	.byte	"B"
+>e11c  43                          	.byte	"C"
+>e11d  44                          	.byte	"D"
+>e11e  45                          	.byte	"E"
+>e11f  46                          	.byte	"F"
+>e120  47                          	.byte	"G"
+>e121  48                          	.byte	"H"
+>e122  49                          	.byte	"I"
+>e123  4c                          	.byte	"L"
+>e124  4d                          	.byte	"M"
+>e125  4e                          	.byte	"N"
+>e126  4f                          	.byte	"O"
+>e127  50                          	.byte	"P"
+>e128  52                          	.byte	"R"
+>e129  53                          	.byte	"S"
+>e12a  54                          	.byte	"T"
+>e12b  55                          	.byte	"U"
+>e12c  56                          	.byte	"V"
+>e12d  57                          	.byte	"W"
+>e12e  5e                          	.byte	"^"
+>e12f  00                          	.byte	$00			; table terminator
+.e130                              tab_chrt
+>e130  6a e1                       	.word	TAB_STAR		; table for "*"
+>e132  6c e1                       	.word	TAB_PLUS		; table for "+"
+>e134  6e e1                       	.word	TAB_MNUS		; table for "-"
+>e136  70 e1                       	.word	TAB_SLAS		; table for "/"
+>e138  72 e1                       	.word	TAB_LESS		; table for "<"
+>e13a  76 e1                       	.word	TAB_EQUL		; table for "="
+>e13c  78 e1                       	.word	TAB_MORE		; table for ">"
+>e13e  7c e1                       	.word	TAB_QEST		; table for "?"
+>e140  7e e1                       	.word	TAB_ASCA		; table for "A"
+>e142  8e e1                       	.word	TAB_ASCB		; table for "B"
+>e144  a7 e1                       	.word	TAB_ASCC		; table for "C"
+>e146  be e1                       	.word	TAB_ASCD		; table for "D"
+>e148  d7 e1                       	.word	TAB_ASCE		; table for "E"
+>e14a  e6 e1                       	.word	TAB_ASCF		; table for "F"
+>e14c  f0 e1                       	.word	TAB_ASCG		; table for "G"
+>e14e  fd e1                       	.word	TAB_ASCH		; table for "H"
+>e150  03 e2                       	.word	TAB_ASCI		; table for "I"
+>e152  15 e2                       	.word	TAB_ASCL		; table for "L"
+>e154  3a e2                       	.word	TAB_ASCM		; table for "M"
+>e156  48 e2                       	.word	TAB_ASCN		; table for "N"
+>e158  5a e2                       	.word	TAB_ASCO		; table for "O"
+>e15a  62 e2                       	.word	TAB_ASCP		; table for "P"
+>e15c  77 e2                       	.word	TAB_ASCR		; table for "R"
+>e15e  a6 e2                       	.word	TAB_ASCS		; table for "S"
+>e160  d4 e2                       	.word	TAB_ASCT		; table for "T"
+>e162  e8 e2                       	.word	TAB_ASCU		; table for "U"
+>e164  f9 e2                       	.word	TAB_ASCV		; table for "V"
+>e166  05 e3                       	.word	TAB_ASCW		; table for "W"
+>e168  14 e3                       	.word	TAB_POWR		; table for "^"
+.e16a                              tab_star
+>e16a  b9 00                       	.byte TK_MUL,$00		; *
+.e16c                              tab_plus
+>e16c  b7 00                       	.byte TK_PLUS,$00		; +
+.e16e                              tab_mnus
+>e16e  b8 00                       	.byte TK_MINUS,$00	; -
+.e170                              tab_slas
+>e170  ba 00                       	.byte TK_DIV,$00		; /
+.e172                              tab_less
+.e172                              lbb_lshift
+>e172  3c c0                       	.byte	"<",TK_LSHIFT	; <<	note - "<<" must come before "<"
+>e174  c3                          	.byte TK_LT			; <
+>e175  00                          	.byte	$00
+.e176                              tab_equl
+>e176  c2 00                       	.byte TK_EQUAL,$00	; =
+.e178                              tab_more
+.e178                              lbb_rshift
+>e178  3e bf                       	.byte	">",TK_RSHIFT	; >>	note - ">>" must come before ">"
+>e17a  c1                          	.byte TK_GT			; >
+>e17b  00                          	.byte	$00
+.e17c                              tab_qest
+>e17c  9f 00                       	.byte TK_PRINT,$00	; ?
+.e17e                              tab_asca
+.e17e                              lbb_abs
+>e17e  42 53 28 c6                 	.byte	"BS(",TK_ABS	; ABS(
+.e182                              lbb_and
+>e182  4e 44 bc                    	.byte	"ND",TK_AND		; AND
+.e185                              lbb_asc
+>e185  53 43 28 d8                 	.byte	"SC(",TK_ASC	; ASC(
+.e189                              lbb_atn
+>e189  54 4e 28 d1                 	.byte	"TN(",TK_ATN	; ATN(
+>e18d  00                          	.byte	$00
+.e18e                              tab_ascb
+.e18e                              lbb_bins
+>e18e  49 4e 24 28 dd              	.byte	"IN$(",TK_BINS	; BIN$(
+.e193                              lbb_bitclr
+>e193  49 54 43 4c 52 a8           	.byte	"ITCLR",TK_BITCLR	; BITCLR
+.e199                              lbb_bitset
+>e199  49 54 53 45 54 a7           	.byte	"ITSET",TK_BITSET	; BITSET
+.e19f                              lbb_bittst
+>e19f  49 54 54 53 54 28 de        	.byte	"ITTST(",TK_BITTST
+>e1a6  00                          	.byte	$00
+.e1a7                              tab_ascc
+.e1a7                              lbb_call
+>e1a7  41 4c 4c 9c                 	.byte	"ALL",TK_CALL	; CALL
+.e1ab                              lbb_chrs
+>e1ab  48 52 24 28 db              	.byte	"HR$(",TK_CHRS	; CHR$(
+.e1b0                              lbb_clear
+>e1b0  4c 45 41 52 a2              	.byte	"LEAR",TK_CLEAR	; CLEAR
+.e1b5                              lbb_cont
+>e1b5  4f 4e 54 a0                 	.byte	"ONT",TK_CONT	; CONT
+.e1b9                              lbb_cos
+>e1b9  4f 53 28 ce                 	.byte	"OS(",TK_COS	; COS(
+>e1bd  00                          	.byte	$00
+.e1be                              tab_ascd
+.e1be                              lbb_data
+>e1be  41 54 41 83                 	.byte	"ATA",TK_DATA	; DATA
+.e1c2                              lbb_dec
+>e1c2  45 43 88                    	.byte	"EC",TK_DEC		; DEC
+.e1c5                              lbb_deek
+>e1c5  45 45 4b 28 d3              	.byte	"EEK(",TK_DEEK	; DEEK(
+.e1ca                              lbb_def
+>e1ca  45 46 99                    	.byte	"EF",TK_DEF		; DEF
+.e1cd                              lbb_dim
+>e1cd  49 4d 85                    	.byte	"IM",TK_DIM		; DIM
+.e1d0                              lbb_doke
+>e1d0  4f 4b 45 9b                 	.byte	"OKE",TK_DOKE	; DOKE note - "DOKE" must come before "DO"
+.e1d4                              lbb_do
+>e1d4  4f 9d                       	.byte	"O",TK_DO		; DO
+>e1d6  00                          	.byte	$00
+.e1d7                              tab_asce
+.e1d7                              lbb_else
+>e1d7  4c 53 45 ad                 	.byte	"LSE",TK_ELSE	; ELSE
+.e1db                              lbb_end
+>e1db  4e 44 80                    	.byte	"ND",TK_END		; END
+.e1de                              lbb_eor
+>e1de  4f 52 bd                    	.byte	"OR",TK_EOR		; EOR
+.e1e1                              lbb_exp
+>e1e1  58 50 28 cd                 	.byte	"XP(",TK_EXP	; EXP(
+>e1e5  00                          	.byte	$00
+.e1e6                              tab_ascf
+.e1e6                              lbb_fn
+>e1e6  4e af                       	.byte	"N",TK_FN		; FN
+.e1e8                              lbb_for
+>e1e8  4f 52 81                    	.byte	"OR",TK_FOR		; FOR
+.e1eb                              lbb_fre
+>e1eb  52 45 28 c8                 	.byte	"RE(",TK_FRE	; FRE(
+>e1ef  00                          	.byte	$00
+.e1f0                              tab_ascg
+.e1f0                              lbb_get
+>e1f0  45 54 a5                    	.byte	"ET",TK_GET		; GET
+.e1f3                              lbb_gosub
+>e1f3  4f 53 55 42 8d              	.byte	"OSUB",TK_GOSUB	; GOSUB
+.e1f8                              lbb_goto
+>e1f8  4f 54 4f 89                 	.byte	"OTO",TK_GOTO	; GOTO
+>e1fc  00                          	.byte	$00
+.e1fd                              tab_asch
+.e1fd                              lbb_hexs
+>e1fd  45 58 24 28 dc              	.byte	"EX$(",TK_HEXS	; HEX$(
+>e202  00                          	.byte	$00
+.e203                              tab_asci
+.e203                              lbb_if
+>e203  46 8b                       	.byte	"F",TK_IF		; IF
+.e205                              lbb_inc
+>e205  4e 43 95                    	.byte	"NC",TK_INC		; INC
+.e208                              lbb_input
+>e208  4e 50 55 54 84              	.byte	"NPUT",TK_INPUT	; INPUT
+.e20d                              lbb_int
+>e20d  4e 54 28 c5                 	.byte	"NT(",TK_INT	; INT(
+.e211                              lbb_irq
+>e211  52 51 a9                    	.byte	"RQ",TK_IRQ		; IRQ
+>e214  00                          	.byte	$00
+.e215                              tab_ascl
+.e215                              lbb_lcases
+>e215  43 41 53 45 24 28 da        	.byte	"CASE$(",TK_LCASES
+.e21c                              lbb_lefts
+>e21c  45 46 54 24 28 e4           	.byte	"EFT$(",TK_LEFTS	; LEFT$(
+.e222                              lbb_len
+>e222  45 4e 28 d5                 	.byte	"EN(",TK_LEN	; LEN(
+.e226                              lbb_let
+>e226  45 54 87                    	.byte	"ET",TK_LET		; LET
+.e229                              lbb_list
+>e229  49 53 54 a1                 	.byte	"IST",TK_LIST	; LIST
+.e22d                              lbb_load
+>e22d  4f 41 44 97                 	.byte	"OAD",TK_LOAD	; LOAD
+.e231                              lbb_log
+>e231  4f 47 28 cc                 	.byte	"OG(",TK_LOG	; LOG(
+.e235                              lbb_loop
+>e235  4f 4f 50 9e                 	.byte	"OOP",TK_LOOP	; LOOP
+>e239  00                          	.byte	$00
+.e23a                              tab_ascm
+.e23a                              lbb_max
+>e23a  41 58 28 df                 	.byte	"AX(",TK_MAX	; MAX(
+.e23e                              lbb_mids
+>e23e  49 44 24 28 e6              	.byte	"ID$(",TK_MIDS	; MID$(
+.e243                              lbb_min
+>e243  49 4e 28 e0                 	.byte	"IN(",TK_MIN	; MIN(
+>e247  00                          	.byte	$00
+.e248                              tab_ascn
+.e248                              lbb_new
+>e248  45 57 a3                    	.byte	"EW",TK_NEW		; NEW
+.e24b                              lbb_next
+>e24b  45 58 54 82                 	.byte	"EXT",TK_NEXT	; NEXT
+.e24f                              lbb_nmi
+>e24f  4d 49 aa                    	.byte	"MI",TK_NMI		; NMI
+.e252                              lbb_not
+>e252  4f 54 b2                    	.byte	"OT",TK_NOT		; NOT
+.e255                              lbb_null
+>e255  55 4c 4c 94                 	.byte	"ULL",TK_NULL	; NULL
+>e259  00                          	.byte	$00
+.e25a                              tab_asco
+.e25a                              lbb_off
+>e25a  46 46 b6                    	.byte	"FF",TK_OFF		; OFF
+.e25d                              lbb_on
+>e25d  4e 93                       	.byte	"N",TK_ON		; ON
+.e25f                              lbb_or
+>e25f  52 be                       	.byte	"R",TK_OR		; OR
+>e261  00                          	.byte	$00
+.e262                              tab_ascp
+.e262                              lbb_peek
+>e262  45 45 4b 28 d2              	.byte	"EEK(",TK_PEEK	; PEEK(
+.e267                              lbb_pi
+>e267  49 e1                       	.byte	"I",TK_PI		; PI
+.e269                              lbb_poke
+>e269  4f 4b 45 9a                 	.byte	"OKE",TK_POKE	; POKE
+.e26d                              lbb_pos
+>e26d  4f 53 28 c9                 	.byte	"OS(",TK_POS	; POS(
+.e271                              lbb_print
+>e271  52 49 4e 54 9f              	.byte	"RINT",TK_PRINT	; PRINT
+>e276  00                          	.byte	$00
+.e277                              tab_ascr
+.e277                              lbb_read
+>e277  45 41 44 86                 	.byte	"EAD",TK_READ	; READ
+.e27b                              lbb_rem
+>e27b  45 4d 91                    	.byte	"EM",TK_REM		; REM
+.e27e                              lbb_restore
+>e27e  45 53 54 4f 52 45 8c        	.byte	"ESTORE",TK_RESTORE
+.e285                              lbb_retirq
+>e285  45 54 49 52 51 8e           	.byte	"ETIRQ",TK_RETIRQ	; RETIRQ
+.e28b                              lbb_retnmi
+>e28b  45 54 4e 4d 49 8f           	.byte	"ETNMI",TK_RETNMI	; RETNMI
+.e291                              lbb_return
+>e291  45 54 55 52 4e 90           	.byte	"ETURN",TK_RETURN	; RETURN
+.e297                              lbb_rights
+>e297  49 47 48 54 24 28 e5        	.byte	"IGHT$(",TK_RIGHTS
+.e29e                              lbb_rnd
+>e29e  4e 44 28 cb                 	.byte	"ND(",TK_RND	; RND(
+.e2a2                              lbb_run
+>e2a2  55 4e 8a                    	.byte	"UN",TK_RUN		; RUN
+>e2a5  00                          	.byte	$00
+.e2a6                              tab_ascs
+.e2a6                              lbb_sadd
+>e2a6  41 44 44 28 d4              	.byte	"ADD(",TK_SADD	; SADD(
+.e2ab                              lbb_save
+>e2ab  41 56 45 98                 	.byte	"AVE",TK_SAVE	; SAVE
+.e2af                              lbb_sgn
+>e2af  47 4e 28 c4                 	.byte	"GN(",TK_SGN	; SGN(
+.e2b3                              lbb_sin
+>e2b3  49 4e 28 cf                 	.byte	"IN(",TK_SIN	; SIN(
+.e2b7                              lbb_spc
+>e2b7  50 43 28 b0                 	.byte	"PC(",TK_SPC	; SPC(
+.e2bb                              lbb_sqr
+>e2bb  51 52 28 ca                 	.byte	"QR(",TK_SQR	; SQR(
+.e2bf                              lbb_step
+>e2bf  54 45 50 b3                 	.byte	"TEP",TK_STEP	; STEP
+.e2c3                              lbb_stop
+>e2c3  54 4f 50 92                 	.byte	"TOP",TK_STOP	; STOP
+.e2c7                              lbb_strs
+>e2c7  54 52 24 28 d6              	.byte	"TR$(",TK_STRS	; STR$(
+.e2cc                              lbb_swap
+>e2cc  57 41 50 a6                 	.byte	"WAP",TK_SWAP	; SWAP
+.e2d0                              lbb_sys
+>e2d0  59 53 ab                    	.byte   "YS", TK_SYS    ; SYS    *** added for SBC-2
+>e2d3  00                          	.byte	$00
+.e2d4                              tab_asct
+.e2d4                              lbb_tab
+>e2d4  41 42 28 ac                 	.byte	"AB(",TK_TAB	; TAB(
+.e2d8                              lbb_tan
+>e2d8  41 4e 28 d0                 	.byte	"AN(",TK_TAN	; TAN(
+.e2dc                              lbb_then
+>e2dc  48 45 4e b1                 	.byte	"HEN",TK_THEN	; THEN
+.e2e0                              lbb_to
+>e2e0  4f ae                       	.byte	"O",TK_TO		; TO
+.e2e2                              lbb_twopi
+>e2e2  57 4f 50 49 e2              	.byte	"WOPI",TK_TWOPI	; TWOPI
+>e2e7  00                          	.byte	$00
+.e2e8                              tab_ascu
+.e2e8                              lbb_ucases
+>e2e8  43 41 53 45 24 28 d9        	.byte	"CASE$(",TK_UCASES
+.e2ef                              lbb_until
+>e2ef  4e 54 49 4c b4              	.byte	"NTIL",TK_UNTIL	; UNTIL
+.e2f4                              lbb_usr
+>e2f4  53 52 28 c7                 	.byte	"SR(",TK_USR	; USR(
+>e2f8  00                          	.byte	$00
+.e2f9                              tab_ascv
+.e2f9                              lbb_val
+>e2f9  41 4c 28 d7                 	.byte	"AL(",TK_VAL	; VAL(
+.e2fd                              lbb_vptr
+>e2fd  41 52 50 54 52 28 e3        	.byte	"ARPTR(",TK_VPTR	; VARPTR(
+>e304  00                          	.byte	$00
+.e305                              tab_ascw
+.e305                              lbb_wait
+>e305  41 49 54 96                 	.byte	"AIT",TK_WAIT	; WAIT
+.e309                              lbb_while
+>e309  48 49 4c 45 b5              	.byte	"HILE",TK_WHILE	; WHILE
+.e30e                              lbb_width
+>e30e  49 44 54 48 a4              	.byte	"IDTH",TK_WIDTH	; WIDTH
+>e313  00                          	.byte	$00
+.e314                              tab_powr
+>e314  bb 00                       	.byte	TK_POWER,$00	; ^
+.e316                              lab_keyt
+>e316  03 45                       	.byte	3,"E"
+>e318  db e1                       	.word	LBB_END		; END
+>e31a  03 46                       	.byte	3,"F"
+>e31c  e8 e1                       	.word	LBB_FOR		; FOR
+>e31e  04 4e                       	.byte	4,"N"
+>e320  4b e2                       	.word	LBB_NEXT		; NEXT
+>e322  04 44                       	.byte	4,"D"
+>e324  be e1                       	.word	LBB_DATA		; DATA
+>e326  05 49                       	.byte	5,"I"
+>e328  08 e2                       	.word	LBB_INPUT		; INPUT
+>e32a  03 44                       	.byte	3,"D"
+>e32c  cd e1                       	.word	LBB_DIM		; DIM
+>e32e  04 52                       	.byte	4,"R"
+>e330  77 e2                       	.word	LBB_READ		; READ
+>e332  03 4c                       	.byte	3,"L"
+>e334  26 e2                       	.word	LBB_LET		; LET
+>e336  03 44                       	.byte	3,"D"
+>e338  c2 e1                       	.word	LBB_DEC		; DEC
+>e33a  04 47                       	.byte	4,"G"
+>e33c  f8 e1                       	.word	LBB_GOTO		; GOTO
+>e33e  03 52                       	.byte	3,"R"
+>e340  a2 e2                       	.word	LBB_RUN		; RUN
+>e342  02 49                       	.byte	2,"I"
+>e344  03 e2                       	.word	LBB_IF		; IF
+>e346  07 52                       	.byte	7,"R"
+>e348  7e e2                       	.word	LBB_RESTORE		; RESTORE
+>e34a  05 47                       	.byte	5,"G"
+>e34c  f3 e1                       	.word	LBB_GOSUB		; GOSUB
+>e34e  06 52                       	.byte	6,"R"
+>e350  85 e2                       	.word	LBB_RETIRQ		; RETIRQ
+>e352  06 52                       	.byte	6,"R"
+>e354  8b e2                       	.word	LBB_RETNMI		; RETNMI
+>e356  06 52                       	.byte	6,"R"
+>e358  91 e2                       	.word	LBB_RETURN		; RETURN
+>e35a  03 52                       	.byte	3,"R"
+>e35c  7b e2                       	.word	LBB_REM		; REM
+>e35e  04 53                       	.byte	4,"S"
+>e360  c3 e2                       	.word	LBB_STOP		; STOP
+>e362  02 4f                       	.byte	2,"O"
+>e364  5d e2                       	.word	LBB_ON		; ON
+>e366  04 4e                       	.byte	4,"N"
+>e368  55 e2                       	.word	LBB_NULL		; NULL
+>e36a  03 49                       	.byte	3,"I"
+>e36c  05 e2                       	.word	LBB_INC		; INC
+>e36e  04 57                       	.byte	4,"W"
+>e370  05 e3                       	.word	LBB_WAIT		; WAIT
+>e372  04 4c                       	.byte	4,"L"
+>e374  2d e2                       	.word	LBB_LOAD		; LOAD
+>e376  04 53                       	.byte	4,"S"
+>e378  ab e2                       	.word	LBB_SAVE		; SAVE
+>e37a  03 44                       	.byte	3,"D"
+>e37c  ca e1                       	.word	LBB_DEF		; DEF
+>e37e  04 50                       	.byte	4,"P"
+>e380  69 e2                       	.word	LBB_POKE		; POKE
+>e382  04 44                       	.byte	4,"D"
+>e384  d0 e1                       	.word	LBB_DOKE		; DOKE
+>e386  04 43                       	.byte	4,"C"
+>e388  a7 e1                       	.word	LBB_CALL		; CALL
+>e38a  02 44                       	.byte	2,"D"
+>e38c  d4 e1                       	.word	LBB_DO		; DO
+>e38e  04 4c                       	.byte	4,"L"
+>e390  35 e2                       	.word	LBB_LOOP		; LOOP
+>e392  05 50                       	.byte	5,"P"
+>e394  71 e2                       	.word	LBB_PRINT		; PRINT
+>e396  04 43                       	.byte	4,"C"
+>e398  b5 e1                       	.word	LBB_CONT		; CONT
+>e39a  04 4c                       	.byte	4,"L"
+>e39c  29 e2                       	.word	LBB_LIST		; LIST
+>e39e  05 43                       	.byte	5,"C"
+>e3a0  b0 e1                       	.word	LBB_CLEAR		; CLEAR
+>e3a2  03 4e                       	.byte	3,"N"
+>e3a4  48 e2                       	.word	LBB_NEW		; NEW
+>e3a6  05 57                       	.byte	5,"W"
+>e3a8  0e e3                       	.word	LBB_WIDTH		; WIDTH
+>e3aa  03 47                       	.byte	3,"G"
+>e3ac  f0 e1                       	.word	LBB_GET		; GET
+>e3ae  04 53                       	.byte	4,"S"
+>e3b0  cc e2                       	.word	LBB_SWAP		; SWAP
+>e3b2  06 42                       	.byte	6,"B"
+>e3b4  99 e1                       	.word	LBB_BITSET		; BITSET
+>e3b6  06 42                       	.byte	6,"B"
+>e3b8  93 e1                       	.word	LBB_BITCLR		; BITCLR
+>e3ba  03 49                       	.byte	3,"I"
+>e3bc  11 e2                       	.word	LBB_IRQ		; IRQ
+>e3be  03 4e                       	.byte	3,"N"
+>e3c0  4f e2                       	.word	LBB_NMI		; NMI
+>e3c2  03 53                       	.byte	3,"S"			;
+>e3c4  d0 e2                       	.word	LBB_SYS			; SYS   *** Added for SBC-2
+>e3c6  04 54                       	.byte	4,"T"
+>e3c8  d4 e2                       	.word	LBB_TAB		; TAB
+>e3ca  04 45                       	.byte	4,"E"
+>e3cc  d7 e1                       	.word	LBB_ELSE		; ELSE
+>e3ce  02 54                       	.byte	2,"T"
+>e3d0  e0 e2                       	.word	LBB_TO		; TO
+>e3d2  02 46                       	.byte	2,"F"
+>e3d4  e6 e1                       	.word	LBB_FN		; FN
+>e3d6  04 53                       	.byte	4,"S"
+>e3d8  b7 e2                       	.word	LBB_SPC		; SPC
+>e3da  04 54                       	.byte	4,"T"
+>e3dc  dc e2                       	.word	LBB_THEN		; THEN
+>e3de  03 4e                       	.byte	3,"N"
+>e3e0  52 e2                       	.word	LBB_NOT		; NOT
+>e3e2  04 53                       	.byte	4,"S"
+>e3e4  bf e2                       	.word	LBB_STEP		; STEP
+>e3e6  05 55                       	.byte	5,"U"
+>e3e8  ef e2                       	.word	LBB_UNTIL		; UNTIL
+>e3ea  05 57                       	.byte	5,"W"
+>e3ec  09 e3                       	.word	LBB_WHILE		; WHILE
+>e3ee  03 4f                       	.byte	3,"O"
+>e3f0  5a e2                       	.word	LBB_OFF		; OFF
+>e3f2  01 2b                       	.byte	1,"+"
+>e3f4  00 00                       	.word	$0000			; +
+>e3f6  01 2d                       	.byte	1,"-"
+>e3f8  00 00                       	.word	$0000			; -
+>e3fa  01 2a                       	.byte	1,"*"
+>e3fc  00 00                       	.word	$0000			; *
+>e3fe  01 2f                       	.byte	1,"/"
+>e400  00 00                       	.word	$0000			; /
+>e402  01 5e                       	.byte	1,"^"
+>e404  00 00                       	.word	$0000			; ^
+>e406  03 41                       	.byte	3,"A"
+>e408  82 e1                       	.word	LBB_AND		; AND
+>e40a  03 45                       	.byte	3,"E"
+>e40c  de e1                       	.word	LBB_EOR		; EOR
+>e40e  02 4f                       	.byte	2,"O"
+>e410  5f e2                       	.word	LBB_OR		; OR
+>e412  02 3e                       	.byte	2,">"
+>e414  78 e1                       	.word	LBB_RSHIFT		; >>
+>e416  02 3c                       	.byte	2,"<"
+>e418  72 e1                       	.word	LBB_LSHIFT		; <<
+>e41a  01 3e                       	.byte	1,">"
+>e41c  00 00                       	.word	$0000			; >
+>e41e  01 3d                       	.byte	1,"="
+>e420  00 00                       	.word	$0000			; =
+>e422  01 3c                       	.byte	1,"<"
+>e424  00 00                       	.word	$0000			; <
+>e426  04 53                       	.byte	4,"S"			;
+>e428  af e2                       	.word	LBB_SGN		; SGN
+>e42a  04 49                       	.byte	4,"I"			;
+>e42c  0d e2                       	.word	LBB_INT		; INT
+>e42e  04 41                       	.byte	4,"A"			;
+>e430  7e e1                       	.word	LBB_ABS		; ABS
+>e432  04 55                       	.byte	4,"U"			;
+>e434  f4 e2                       	.word	LBB_USR		; USR
+>e436  04 46                       	.byte	4,"F"			;
+>e438  eb e1                       	.word	LBB_FRE		; FRE
+>e43a  04 50                       	.byte	4,"P"			;
+>e43c  6d e2                       	.word	LBB_POS		; POS
+>e43e  04 53                       	.byte	4,"S"			;
+>e440  bb e2                       	.word	LBB_SQR		; SQR
+>e442  04 52                       	.byte	4,"R"			;
+>e444  9e e2                       	.word	LBB_RND		; RND
+>e446  04 4c                       	.byte	4,"L"			;
+>e448  31 e2                       	.word	LBB_LOG		; LOG
+>e44a  04 45                       	.byte	4,"E"			;
+>e44c  e1 e1                       	.word	LBB_EXP		; EXP
+>e44e  04 43                       	.byte	4,"C"			;
+>e450  b9 e1                       	.word	LBB_COS		; COS
+>e452  04 53                       	.byte	4,"S"			;
+>e454  b3 e2                       	.word	LBB_SIN		; SIN
+>e456  04 54                       	.byte	4,"T"			;
+>e458  d8 e2                       	.word	LBB_TAN		; TAN
+>e45a  04 41                       	.byte	4,"A"			;
+>e45c  89 e1                       	.word	LBB_ATN		; ATN
+>e45e  05 50                       	.byte	5,"P"			;
+>e460  62 e2                       	.word	LBB_PEEK		; PEEK
+>e462  05 44                       	.byte	5,"D"			;
+>e464  c5 e1                       	.word	LBB_DEEK		; DEEK
+>e466  05 53                       	.byte	5,"S"			;
+>e468  a6 e2                       	.word	LBB_SADD		; SADD
+>e46a  04 4c                       	.byte	4,"L"			;
+>e46c  22 e2                       	.word	LBB_LEN		; LEN
+>e46e  05 53                       	.byte	5,"S"			;
+>e470  c7 e2                       	.word	LBB_STRS		; STR$
+>e472  04 56                       	.byte	4,"V"			;
+>e474  f9 e2                       	.word	LBB_VAL		; VAL
+>e476  04 41                       	.byte	4,"A"			;
+>e478  85 e1                       	.word	LBB_ASC		; ASC
+>e47a  07 55                       	.byte	7,"U"			;
+>e47c  e8 e2                       	.word	LBB_UCASES		; UCASE$
+>e47e  07 4c                       	.byte	7,"L"			;
+>e480  15 e2                       	.word	LBB_LCASES		; LCASE$
+>e482  05 43                       	.byte	5,"C"			;
+>e484  ab e1                       	.word	LBB_CHRS		; CHR$
+>e486  05 48                       	.byte	5,"H"			;
+>e488  fd e1                       	.word	LBB_HEXS		; HEX$
+>e48a  05 42                       	.byte	5,"B"			;
+>e48c  8e e1                       	.word	LBB_BINS		; BIN$
+>e48e  07 42                       	.byte	7,"B"			;
+>e490  9f e1                       	.word	LBB_BITTST		; BITTST
+>e492  04 4d                       	.byte	4,"M"			;
+>e494  3a e2                       	.word	LBB_MAX		; MAX
+>e496  04 4d                       	.byte	4,"M"			;
+>e498  43 e2                       	.word	LBB_MIN		; MIN
+>e49a  02 50                       	.byte	2,"P"			;
+>e49c  67 e2                       	.word	LBB_PI		; PI
+>e49e  05 54                       	.byte	5,"T"			;
+>e4a0  e2 e2                       	.word	LBB_TWOPI		; TWOPI
+>e4a2  07 56                       	.byte	7,"V"			;
+>e4a4  fd e2                       	.word	LBB_VPTR		; VARPTR
+>e4a6  06 4c                       	.byte	6,"L"			;
+>e4a8  1c e2                       	.word	LBB_LEFTS		; LEFT$
+>e4aa  07 52                       	.byte	7,"R"			;
+>e4ac  97 e2                       	.word	LBB_RIGHTS		; RIGHT$
+>e4ae  05 4d                       	.byte	5,"M"			;
+>e4b0  3e e2                       	.word	LBB_MIDS		; MID$
+.e4b2                              lab_baer
+>e4b2  d6 e4                       	.word	ERR_NF		;$00 NEXT without FOR
+>e4b4  e7 e4                       	.word	ERR_SN		;$02 syntax
+>e4b6  ee e4                       	.word	ERR_RG		;$04 RETURN without GOSUB
+>e4b8  03 e5                       	.word	ERR_OD		;$06 out of data
+>e4ba  0f e5                       	.word	ERR_FC		;$08 function call
+>e4bc  1d e5                       	.word	ERR_OV		;$0A overflow
+>e4be  26 e5                       	.word	ERR_OM		;$0C out of memory
+>e4c0  34 e5                       	.word	ERR_US		;$0E undefined statement
+>e4c2  48 e5                       	.word	ERR_BS		;$10 array bounds
+>e4c4  55 e5                       	.word	ERR_DD		;$12 double dimension array
+>e4c6  66 e5                       	.word	ERR_D0		;$14 divide by 0
+>e4c8  75 e5                       	.word	ERR_ID		;$16 illegal direct
+>e4ca  84 e5                       	.word	ERR_TM		;$18 type mismatch
+>e4cc  92 e5                       	.word	ERR_LS		;$1A long string
+>e4ce  a2 e5                       	.word	ERR_ST		;$1C string too complex
+>e4d0  b5 e5                       	.word	ERR_CN		;$1E continue error
+>e4d2  c4 e5                       	.word	ERR_UF		;$20 undefined function
+>e4d4  d7 e5                       	.word ERR_LD		;$22 LOOP without DO
+>e4d6  4e 45 58 54 20 77 69 74 68 6f 75 74 20 46 4f 52 00  ERR_NF	.byte	"NEXT without FOR",$00
+>e4e7  53 79 6e 74 61 78 00        ERR_SN	.byte	"Syntax",$00
+>e4ee  52 45 54 55 52 4e 20 77 69 74 68 6f 75 74 20 47 4f 53 55 42 00  ERR_RG	.byte	"RETURN without GOSUB",$00
+>e503  4f 75 74 20 6f 66 20 44 41 54 41 00  ERR_OD	.byte	"Out of DATA",$00
+>e50f  46 75 6e 63 74 69 6f 6e 20 63 61 6c 6c 00  ERR_FC	.byte	"Function call",$00
+>e51d  4f 76 65 72 66 6c 6f 77 00  ERR_OV	.byte	"Overflow",$00
+>e526  4f 75 74 20 6f 66 20 6d 65 6d 6f 72 79 00  ERR_OM	.byte	"Out of memory",$00
+>e534  55 6e 64 65 66 69 6e 65 64 20 73 74 61 74 65 6d 65 6e 74 00  ERR_US	.byte	"Undefined statement",$00
+>e548  41 72 72 61 79 20 62 6f 75 6e 64 73 00  ERR_BS	.byte	"Array bounds",$00
+>e555  44 6f 75 62 6c 65 20 64 69 6d 65 6e 73 69 6f 6e 00  ERR_DD	.byte	"Double dimension",$00
+>e566  44 69 76 69 64 65 20 62 79 20 7a 65 72 6f 00  ERR_D0	.byte	"Divide by zero",$00
+>e575  49 6c 6c 65 67 61 6c 20 64 69 72 65 63 74 00  ERR_ID	.byte	"Illegal direct",$00
+>e584  54 79 70 65 20 6d 69 73 6d 61 74 63 68 00  ERR_TM	.byte	"Type mismatch",$00
+>e592  53 74 72 69 6e 67 20 74 6f 6f 20 6c 6f 6e 67 00  ERR_LS	.byte	"String too long",$00
+>e5a2  53 74 72 69 6e 67 20 74 6f 6f 20 63 6f 6d 70 6c 65 78 00  ERR_ST	.byte	"String too complex",$00
+>e5b5  43 61 6e 27 74 20 63 6f 6e 74 69 6e 75 65 00  ERR_CN	.byte	"Can't continue",$00
+>e5c4  55 6e 64 65 66 69 6e 65 64 20 66 75 6e 63 74 69 6f 6e 00  ERR_UF	.byte	"Undefined function",$00
+>e5d7  4c 4f 4f 50 20 77 69 74 68 6f 75 74 20 44 4f 00  ERR_LD	.byte	"LOOP without DO",$00
+>e5e7  0d 0a 42 72 65 61 6b 00     LAB_BMSG	.byte	$0D,$0A,"Break",$00
+>e5ef  20 45 72 72 6f 72 00        LAB_EMSG	.byte	" Error",$00
+>e5f6  20 69 6e 20 6c 69 6e 65 20 00  LAB_LMSG	.byte	" in line ",$00
+>e600  0d 0a 52 65 61 64 79 0d 0a 00  LAB_RMSG	.byte	$0D,$0A,"Ready",$0D,$0A,$00
+>e60a  20 45 78 74 72 61 20 69 67 6e 6f 72 65 64 0d 0a 00  LAB_IMSG	.byte	" Extra ignored",$0D,$0A,$00
+>e61b  20 52 65 64 6f 20 66 72 6f 6d 20 73 74 61 72 74 0d 0a 00  LAB_REDO	.byte	" Redo from start",$0D,$0A,$00
+.e62e                              aa_end_basic
+.e62e                              bsetup
+
+.e62e  a9 e7      lda #$e7         	        lda   #<ACIA1_Scan
+.e630  8d 05 04   sta $0405                        sta   VEC_IN
+.e633  a9 a4      lda #$a4           		lda   #>ACIA1_Scan
+.e635  8d 06 04   sta $0406                        sta   VEC_IN+1
+.e638  a9 f4      lda #$f4         	        lda   #<ACIA1_Output
+.e63a  8d 07 04   sta $0407                        sta   VEC_OUT
+.e63d  a9 a4      lda #$a4         		lda   #>ACIA1_OUTPUT
+.e63f  8d 08 04   sta $0408                        sta   VEC_OUT+1
+.e642  a9 59      lda #$59         	        lda   #<Psave
+.e644  8d 0b 04   sta $040b                        sta   VEC_SV
+.e647  a9 e6      lda #$e6         	        Lda   #>Psave
+.e649  8d 0c 04   sta $040c                        sta   VEC_SV+1
+.e64c  a9 82      lda #$82         		lda   #<pload
+.e64e  8d 09 04   sta $0409                        sta   VEC_LD
+.e651  a9 e6      lda #$e6         		lda   #>pload
+.e653  8d 0a 04   sta $040a        		sta   VEC_LD+1
+.e656  4c 00 be   jmp $be00        		jmp   LAB_COLD
+.e659                              psave
+.e659  20 98 e6   jsr $e698        		jsr	pscan
+.e65c  a0 00      ldy #$00         		ldy	#$00
+.e65e  a5 11      lda $11          		lda	itempl
+.e660  91 11      sta ($11),y      		sta	(itempl),y
+.e662  c8         iny              		iny
+.e663  a5 12      lda $12          		lda	itemph
+.e665  91 11      sta ($11),y      		sta	(itempl),y
+.e667  a6 79      ldx $79          		ldx	smeml
+.e669  a5 7a      lda $7a          		lda	smemh
+.e66b  20 5c e7   jsr $e75c        		jsr	print2byte
+.e66e  20 4f e7   jsr $e74f        		jsr	print_cr
+.e671  38         sec              		sec
+.e672  a5 11      lda $11          		lda	itempl
+.e674  e5 79      sbc $79          		sbc	smeml
+.e676  aa         tax              		tax
+.e677  a5 12      lda $12          		lda	itemph
+.e679  e5 7a      sbc $7a          		sbc	smemh
+.e67b  20 5c e7   jsr $e75c        		jsr	print2byte
+.e67e  20 4f e7   jsr $e74f        		jsr	print_cr
+.e681  60         rts              		rts
+.e682                              pload
+.e682  20 98 e6   jsr $e698        		jsr	pscan
+.e685  a5 11      lda $11          		lda	itempl
+.e687  85 7b      sta $7b          		sta	svarl
+.e689  85 7d      sta $7d          		sta	sarryl
+.e68b  85 7f      sta $7f          		sta	earryl
+.e68d  a5 12      lda $12          		lda	itemph
+.e68f  85 7c      sta $7c          		sta	svarh
+.e691  85 7e      sta $7e          		sta	sarryh
+.e693  85 80      sta $80          		sta	earryh
+.e695  4c 14 c0   jmp $c014        		JMP   LAB_1319		
+.e698                              pscan
+.e698  a5 79      lda $79          		lda	smeml
+.e69a  85 11      sta $11                	sta	itempl
+.e69c  a5 7a      lda $7a                	lda	smemh
+.e69e  85 12      sta $12                	sta	itemph
+.e6a0  a0 00      ldy #$00         pscan1	ldy   #$00
+.e6a2  b1 11      lda ($11),y      		lda   (itempl),y
+.e6a4  d0 13      bne $e6b9        		bne   pscan2
+.e6a6  c8         iny              		iny   
+.e6a7  b1 11      lda ($11),y      		lda   (itempl),y
+.e6a9  d0 0e      bne $e6b9        		bne   pscan2
+.e6ab  18         clc              		clc
+.e6ac  a9 02      lda #$02         		lda   #$02
+.e6ae  65 11      adc $11          		adc   itempl
+.e6b0  85 11      sta $11          		sta	itempl
+.e6b2  a9 00      lda #$00         		lda	#$00
+.e6b4  65 12      adc $12          		adc	itemph
+.e6b6  85 12      sta $12          		sta	itemph
+.e6b8  60         rts              		rts
+.e6b9  a0 00      ldy #$00         pscan2	ldy   #$00
+.e6bb  b1 11      lda ($11),y      		lda	(itempl),y
+.e6bd  aa         tax              		tax
+.e6be  c8         iny              		iny
+.e6bf  b1 11      lda ($11),y      		lda	(itempl),y
+.e6c1  85 12      sta $12          		sta	itemph
+.e6c3  86 11      stx $11          		stx	itempl
+.e6c5  80 d9      bra $e6a0        		bra	pscan1
+.e6c7  4c 38 e8   jmp $e838        Start_OS       jmp   MonitorBoot         ; easy access to monitor program
+.e6ca  4c 4f e7   jmp $e74f        Jmp_CR	   jmp   Print_CR		
+.e6cd  4c 80 e7   jmp $e780        Jmp_1sp	   jmp   Print1SP			; jump table for usable monitor
+.e6d0  4c 7d e7   jmp $e77d        Jmp_2sp	   jmp   Print2SP			; routines
+.e6d3  4c 78 e7   jmp $e778        Jmp_xsp	   jmp   PrintXSP			; This will not change in future
+.e6d6  4c 69 e7   jmp $e769        Jmp_nib	   jmp   PrintDig			; releases, only be added to
+.e6d9  4c 60 e7   jmp $e760        Jmp_byte	   jmp   Print1Byte
+.e6dc  4c 5c e7   jmp $e75c        jmp_wrd	   jmp   Print2Byte
+.e6df  4c fe e7   jmp $e7fe        jmp_bell	   jmp   Bell
+.e6e2  4c 03 e8   jmp $e803        jmp_delay	   jmp   Delay
+.e6e5  4c f8 e7   jmp $e7f8        jmp_scan	   jmp   Scan_input
+.e6e8  4c f5 e7   jmp $e7f5        jmp_inp        jmp   Input_chr  
+.e6eb  4c fb e7   jmp $e7fb        jmp_out        jmp   Output
+.e6ee  4c 88 e7   jmp $e788        jmp_input	   jmp   Input
+.e6f1  4c 8c e7   jmp $e78c        jmp_input1     jmp   Input1
+
+>e6f4  20 50 43 3d 20 20 41 3d 20 20 58 3d 20 20 59 3d 20 20 53 3d 20 20 50 3d 20 28 4e 56 52 42 44 49 5a 43 29 3d  RegData        .byte" PC=  A=  X=  Y=  S=  P= (NVRBDIZC)="
+
+.e718  20 4f e7   jsr $e74f        PrintReg       Jsr   Print_CR          ; Lead with a CR
+.e71b  a2 ff      ldx #$ff                        ldx   #$ff              ;
+.e71d  a0 ff      ldy #$ff                        ldy   #$ff              ;
+.e71f  c8         iny              Printreg1      iny                     ;
+.e720  b9 f4 e6   lda $e6f4,y                     lda   Regdata,y         ;
+.e723  20 fb e7   jsr $e7fb                       jsr   Output            ;
+.e726  c9 3d      cmp #$3d                        cmp   #$3D              ; "="
+.e728  d0 f5      bne $e71f                       bne   Printreg1         ;
+.e72a  e8         inx              Printreg2      inx                     ;
+.e72b  e0 07      cpx #$07                        cpx   #$07              ;
+.e72d  f0 0c      beq $e73b                       beq   Printreg3         ; done with first 6
+.e72f  bd e0 03   lda $03e0,x                     lda   PCH,x             ;  
+.e732  20 60 e7   jsr $e760                       jsr   Print1Byte        ;
+.e735  e0 00      cpx #$00                        cpx   #$00              ;
+.e737  d0 e6      bne $e71f                       bne   Printreg1         ;
+.e739  80 ef      bra $e72a                       bra   Printreg2         ;
+.e73b  ca         dex              Printreg3      dex                     ;
+.e73c  bd e0 03   lda $03e0,x                     lda   PCH,x             ; get Preg
+.e73f  a2 08      ldx #$08                        ldx   #$08              ; 
+.e741  2a         rol              Printreg4      rol                     ;
+.e742  a8         tay                             tay                     ;
+.e743  a9 31      lda #$31                        lda   #$31              ;
+.e745  b0 01      bcs $e748                       bcs   Printreg5         ;
+.e747  3a         dec                             dec                     ;
+.e748  20 fb e7   jsr $e7fb        Printreg5      jsr   Output            ;
+.e74b  98         tya                             tya                     ;
+.e74c  ca         dex                             dex                     ;
+.e74d  d0 f2      bne $e741                       bne   Printreg4         ;
+.e74f  48         pha              Print_CR       PHA                     ; Save Acc
+.e750  a9 0d      lda #$0d                        LDA   #$0D              ; "cr"
+.e752  20 fb e7   jsr $e7fb                       JSR   OUTPUT            ; send it
+.e755  a9 0a      lda #$0a                        LDA   #$0A              ; "lf"
+.e757  20 fb e7   jsr $e7fb                       JSR   OUTPUT            ; send it
+.e75a  68         pla                             PLA                     ; Restore Acc
+.e75b  60         rts                             RTS                     ; 
+.e75c  20 60 e7   jsr $e760        Print2Byte     JSR   Print1Byte        ;  prints AAXX hex digits
+.e75f  8a         txa                             TXA                     ;
+.e760  48         pha              Print1Byte     PHA                     ;  prints AA hex digits
+.e761  4a         lsr                             LSR                     ;  MOVE UPPER NIBBLE TO LOWER
+.e762  4a         lsr                             LSR                     ;
+.e763  4a         lsr                             LSR                     ;
+.e764  4a         lsr                             LSR                     ;
+.e765  20 69 e7   jsr $e769                       JSR   PrintDig          ;
+.e768  68         pla                             PLA                     ;
+.e769  5a         phy              PrintDig       PHY                     ;  prints A hex nibble (low 4 bits)
+.e76a  29 0f      and #$0f                        AND   #$0F              ;
+.e76c  a8         tay                             TAY                     ;
+.e76d  b9 f8 ee   lda $eef8,y                     LDA   Hexdigdata,Y      ;
+.e770  7a         ply                             PLY                     ;
+.e771  4c fb e7   jmp $e7fb                       jmp   output            ;
+.e774  20 80 e7   jsr $e780        PrintXSP1      JSR   Print1SP          ;
+.e777  ca         dex                             dex                     ;
+.e778  e0 00      cpx #$00         PrintXSP       cpx   #$00              ;
+.e77a  d0 f8      bne $e774                       bne   PrintXSP1         ;
+.e77c  60         rts                             rts                     ;
+.e77d  20 80 e7   jsr $e780        Print2SP       jsr   Print1SP          ; print 2 SPACES
+.e780  a9 20      lda #$20         Print1SP       LDA   #$20              ; print 1 SPACE
+.e782  4c fb e7   jmp $e7fb                       JMP   OUTPUT            ;
+.e785  a9 21      lda #$21         Input_Assem    lda   #$21              ; Assembler Prompt "!"
+
+>e787  2c                                         .byte $2c               ; mask out next line to bypass 
+
+.e788  a9 3e      lda #$3e         Input          lda   #$3E              ; Monitor Prompt ">"
+.e78a  85 32      sta $32                         sta   Prompt            ; save prompt chr 
+.e78c  20 4f e7   jsr $e74f        Input1         jsr   Print_CR          ; New Line
+.e78f  a5 32      lda $32                         lda   Prompt            ; get prompt
+.e791  20 fb e7   jsr $e7fb                       jsr   Output            ; Print Prompt
+.e794  a0 ff      ldy #$ff                        ldy   #$ff              ; pointer
+.e796  20 f5 e7   jsr $e7f5        InputWait      jsr   Input_Chr         ; get a character
+.e799  c9 20      cmp #$20                        cmp   #$20              ; is ctrl char?
+.e79b  b0 3d      bcs $e7da                       BCS   InputSave         ; no, echo chr 
+.e79d  c9 0d      cmp #$0d                        cmp   #$0d              ; cr
+.e79f  f0 4a      beq $e7eb                       Beq   InputDone         ; done
+.e7a1  c9 1b      cmp #$1b                        cmp   #$1B              ; esc
+.e7a3  f0 e7      beq $e78c                       beq   Input1            ; cancel and new line
+.e7a5  c9 08      cmp #$08                        cmp   #$08              ; bs
+.e7a7  f0 09      beq $e7b2                       beq   backspace         ;
+.e7a9  c9 09      cmp #$09         		   cmp   #$09		   ; TAB key
+.e7ab  f0 1b      beq $e7c8        		   beq   tabkey		   ;
+.e7ad  c9 02      cmp #$02                        cmp   #$02              ; Ctrl-B
+.e7af  d0 e5      bne $e796                       bne   InputWait         ; Ignore other codes
+.e7b1  00         brk                             brk                     ; Force a keyboard Break cmd
+.e7b2  c0 ff      cpy #$ff         backspace      cpy   #$ff              ;
+.e7b4  f0 e0      beq $e796                       beq   InputWait         ; nothing to do
+.e7b6  88         dey                             dey                     ; remove last char
+.e7b7  a9 08      lda #$08                        Lda   #$08              ; backup one space
+.e7b9  20 fb e7   jsr $e7fb                       jsr   Output            ;
+.e7bc  a9 20      lda #$20                        Lda   #$20              ; Print space (destructive BS)
+.e7be  20 fb e7   jsr $e7fb                       jsr   Output            ;
+.e7c1  a9 08      lda #$08                        Lda   #$08              ; backup one space
+.e7c3  20 fb e7   jsr $e7fb                       jsr   Output            ;
+.e7c6  80 ce      bra $e796                       BRA   InputWait         ; ready for next key
+.e7c8  a9 20      lda #$20         tabkey	   lda   #$20		   ; convert tab to space
+.e7ca  c8         iny              		   iny			   ; move cursor
+.e7cb  30 1f      bmi $e7ec                       bmi   InputTooLong	   ; line too long?
+.e7cd  99 00 03   sta $0300,y                     sta   Buffer,y		   ; no, save space in buffer
+.e7d0  20 fb e7   jsr $e7fb        		   jsr   output		   ; print the space too
+.e7d3  98         tya                             tya   			   ; test to see if tab is on multiple of 8
+.e7d4  29 07      and #$07         		   and   #$07		   ; mask remainder of cursor/8
+.e7d6  d0 f0      bne $e7c8                       bne   tabkey		   ; not done, add another space
+.e7d8  80 bc      bra $e796        		   bra   InputWait	   ; done. 
+.e7da  c9 61      cmp #$61         InputSave      CMP   #$61              ;   ucase
+.e7dc  90 02      bcc $e7e0                       BCC   InputSave1        ;
+.e7de  e9 20      sbc #$20                        SBC   #$20              ;
+.e7e0  c8         iny              InputSave1     INY                     ;
+.e7e1  30 09      bmi $e7ec                       BMI   InputTooLong      ; get next char (up to 127)
+.e7e3  99 00 03   sta $0300,y                     STA   Buffer,y          ;
+.e7e6  20 fb e7   jsr $e7fb                       JSR   Output            ; OutputCharacter
+.e7e9  80 ab      bra $e796                       BRA   InputWait         ;
+.e7eb  c8         iny              InputDone      INY                     ;
+.e7ec  a9 0d      lda #$0d         InputTooLong   LDA   #$0d              ; force CR at end of 128 characters 
+.e7ee  99 00 03   sta $0300,y                     sta   Buffer,y          ;
+.e7f1  20 fb e7   jsr $e7fb                       JSR   Output            ;
+.e7f4  60         rts                             RTS                     ;
+.e7f5  6c eb 03   jmp ($03eb)      Input_chr      jmp   (ChrInVect)       ;
+.e7f8  6c ee 03   jmp ($03ee)      Scan_input     jmp   (ScanInVect)      ; 
+.e7fb  6c f1 03   jmp ($03f1)      Output         jmp   (ChrOutVect)      ;
+.e7fe  a9 07      lda #$07         bell           LDA  #$07               ; Ctrl G Bell
+.e800  4c fb e7   jmp $e7fb                       jmp  Output             ; 
+.e803  48         pha              Delay          PHA                     ; use A to execute a delay loop
+.e804  3a         dec              delay1         DEC                     ;
+.e805  d0 fd      bne $e804                       BNE   delay1            ;
+.e807  68         pla                             PLA                     ;
+.e808  3a         dec                             DEC                     ;
+.e809  d0 f8      bne $e803                       BNE   Delay             ;
+.e80b  60         rts              GRTS           RTS                     ;
+.e80c  8d e2 03   sta $03e2        BRKroutine     sta   ACC               ; save A    Monitor"s break handler
+.e80f  8e e3 03   stx $03e3                       stx   Xreg              ; save X
+.e812  8c e4 03   sty $03e4                       sty   Yreg              ; save Y
+.e815  68         pla                             pla                     ; 
+.e816  8d e6 03   sta $03e6                       sta   Preg              ; save P
+.e819  68         pla                             pla                     ; PCL
+.e81a  fa         plx                             plx                     ; PCH
+.e81b  38         sec                             sec                     ;
+.e81c  e9 02      sbc #$02                        sbc   #$02              ;
+.e81e  8d e1 03   sta $03e1                       sta   PCL               ; backup to BRK cmd
+.e821  b0 01      bcs $e824                       bcs   Brk2              ;
+.e823  ca         dex                             dex                     ;
+.e824  8e e0 03   stx $03e0        Brk2           stx   PCH               ; save PC
+.e827  ba         tsx                             TSX                     ; get stack pointer
+.e828  8e e5 03   stx $03e5                       stx   SPtr              ; save stack pointer
+.e82b  20 fe e7   jsr $e7fe                       jsr   Bell              ; Beep speaker
+.e82e  20 18 e7   jsr $e718                       jsr   PrintReg          ; dump register contents 
+.e831  a2 ff      ldx #$ff                        ldx   #$FF              ; 
+.e833  9a         txs                             txs                     ; clear stack
+.e834  58         cli                             cli                     ; enable interrupts again
+.e835  4c 3e e8   jmp $e83e                       jmp   Monitor           ; start the monitor
+.e838                              monitorboot
+.e838  20 fe e7   jsr $e7fe                       jsr   bell              ; beep ready
+.e83b  20 b3 e8   jsr $e8b3                       JSR   Version           ;
+.e83e                              sysjmp
+.e83e  a2 ff      ldx #$ff         Monitor        LDX   #$FF              ; 
+.e840  9a         txs                             TXS			   ;  Init the stack
+.e841  20 88 e7   jsr $e788                       JSR   input             ;  line input
+.e844  a9 00      lda #$00                        LDA   #$00              ;
+.e846  a8         tay                             TAY                     ;  set to 1st character in line
+.e847  85 33      sta $33                         sta   LineCnt           ; normal list vs range list 
+.e849  85 37      sta $37          Mon01          STA   Memchr            ;
+.e84b  64 3c      stz $3c          Mon02          STZ   Hexdigits         ;  holds parsed hex
+.e84d  64 3d      stz $3d                         STZ   Hexdigits+1       ;
+.e84f  20 74 e8   jsr $e874                       JSR   ParseHexDig       ;  Get any Hex chars
+.e852  a2 13      ldx #$13                        LDX   #CmdCount         ;  get # of cmds currently used
+.e854  dd 08 ef   cmp $ef08,x      Mon08          CMP   CmdAscii,X        ;  is non hex cmd chr?
+.e857  f0 05      beq $e85e                       BEQ   Mon09             ;  yes x= cmd number
+.e859  ca         dex                             DEX                     ;
+.e85a  10 f8      bpl $e854                       BPL   Mon08             ;
+.e85c  80 e0      bra $e83e                       BRA   Monitor           ;  no
+.e85e  da         phx              Mon09          PHX                     ;  save command
+.e85f  5a         phy                             PHY                     ;  Save input line pointer
+.e860  8a         txa                             TXA                     ;
+.e861  0a         asl                             ASL                     ;  ptr * 2
+.e862  aa         tax                             TAX                     ;  
+.e863  20 71 e8   jsr $e871                       JSR   Mon10             ;  Execute cmd
+.e866  7a         ply                             PLY                     ;
+.e867  fa         plx                             PLX                     ;
+.e868  f0 d4      beq $e83e                       BEQ   Monitor           ;  done
+.e86a  bd 44 ef   lda $ef44,x                     LDA   Cmdseccode,X      ;  
+.e86d  30 dc      bmi $e84b                       BMI   Mon02             ;
+.e86f  80 d8      bra $e849                       BRA   Mon01             ;
+.e871  7c 1c ef   jmp ($ef1c,x)    Mon10          JMP   (Cmdjmptbl,X)     ;
+.e874  64 35      stz $35          ParseHexDig    STZ   Hexdigcnt         ;  cntr
+.e876  80 0e      bra $e886                       BRA   ParseHex05        ;
+.e878  8a         txa              ParseHex03     TXA                     ;  parse hex dig
+.e879  a2 04      ldx #$04                        LDX   #$04              ;  
+.e87b  06 3c      asl $3c          ParseHex04     ASL   Hexdigits         ;
+.e87d  26 3d      rol $3d                         ROL   Hexdigits+1       ;
+.e87f  ca         dex                             DEX                     ;
+.e880  d0 f9      bne $e87b                       BNE   ParseHex04        ;
+.e882  04 3c      tsb $3c                         TSB   Hexdigits         ;
+.e884  c6 35      dec $35                         DEC   Hexdigcnt         ;
+.e886  b9 00 03   lda $0300,y      ParseHex05     LDA   buffer,Y          ;
+.e889  a2 0f      ldx #$0f                        LDX   #$0F              ;   is hex chr?
+.e88b  c8         iny                             INY                     ;
+.e88c  dd f8 ee   cmp $eef8,x      ParseHex07     CMP   Hexdigdata,X      ;
+.e88f  f0 e7      beq $e878                       BEQ   ParseHex03        ;   yes
+.e891  ca         dex                             DEX                     ;
+.e892  10 f8      bpl $e88c                       BPL   ParseHex07        ;
+.e894  60         rts                             RTS                     ; Stored in HexDigits if HexDigCnt <> 0
+.e895  a9 76      lda #$76         Help_cmd       lda   #<Helptxt         ;  lower byte - Menu of Commands
+.e897  85 3a      sta $3a                         sta   addrptr           ;
+.e899  a9 f2      lda #$f2                        lda   #>Helptxt         ;  upper byte
+.e89b  85 3b      sta $3b                         sta   addrptr+1         ;
+.e89d  80 0f      bra $e8ae                       bra   Help_cmd3         ;
+.e89f  c9 7e      cmp #$7e         Help_Cmd4      cmp   #$7e              ;  "~"
+.e8a1  f0 05      beq $e8a8                       beq   Help_Cmd1         ;
+.e8a3  20 fb e7   jsr $e7fb                       jsr   Output            ;
+.e8a6  80 03      bra $e8ab                       bra   Help_cmd2         ;
+.e8a8  20 4f e7   jsr $e74f        Help_cmd1      jsr   Print_CR          ;     
+.e8ab  20 65 e9   jsr $e965        Help_cmd2      jsr   Inc_addrptr       ;
+.e8ae  b2 3a      lda ($3a)        Help_cmd3      lda   (addrptr)         ;
+.e8b0  d0 ed      bne $e89f                       bne   Help_cmd4         ;
+.e8b2  60         rts                             rts                     ;
+.e8b3  20 4f e7   jsr $e74f        Version        jsr   Print_CR          ; 
+.e8b6  a2 ff      ldx #$ff                        ldx   #$FF              ; set txt pointer
+.e8b8  a9 0d      lda #$0d                        lda   #$0d              ; 
+.e8ba  e8         inx              PortReadyMsg   inx                     ;
+.e8bb  20 fb e7   jsr $e7fb                       JSR   Output            ; put character to Port
+.e8be  bd 9c f8   lda $f89c,x                     lda   porttxt,x         ; get message text
+.e8c1  d0 f7      bne $e8ba                       bne   PortReadyMsg      ; 
+.e8c3  60         rts                             rts                     ;
+.e8c4  20 cd e8   jsr $e8cd        Excute_cmd     jsr   exe1              ;
+.e8c7  a2 ff      ldx #$ff                        ldx   #$FF              ; reset stack
+.e8c9  9a         txs                             txs                     ;
+.e8ca  4c 3e e8   jmp $e83e                       jmp   Monitor           ;
+.e8cd  6c 3c 00   jmp ($003c)      exe1           JMP   (Hexdigits)       ;
+.e8d0  a6 3c      ldx $3c          DOT_cmd        LDX   Hexdigits         ; move address to addrptr
+.e8d2  a5 3d      lda $3d                         LDA   Hexdigits+1       ;
+.e8d4  86 3a      stx $3a                         STX   Addrptr           ;
+.e8d6  85 3b      sta $3b                         STA   Addrptr+1         ;
+.e8d8  e6 33      inc $33                         inc   LineCnt           ; range list command
+.e8da  60         rts                             RTS                     ;
+.e8db  c0 01      cpy #$01         CR_cmd         CPY   #$01              ;
+.e8dd  d0 0c      bne $e8eb                       BNE   SP_cmd            ;
+.e8df  a5 3a      lda $3a                         LDA   Addrptr           ; CR alone - move addrptr to hexdigits
+.e8e1  09 0f      ora #$0f                        ORA   #$0F              ;  to simulate entering an address
+.e8e3  85 3c      sta $3c                         STA   Hexdigits         ; *** change 07 to 0f for 16 byte/line
+.e8e5  a5 3b      lda $3b                         LDA   Addrptr+1         ;
+.e8e7  85 3d      sta $3d                         STA   Hexdigits+1       ;
+.e8e9  80 17      bra $e902                       BRA   SP_cmd2           ;
+.e8eb  a5 35      lda $35          SP_cmd         LDA   Hexdigcnt         ; Space command entry
+.e8ed  f0 5a      beq $e949                       BEQ   SP_cmd5           ; any digits to process? no - done
+.e8ef  a6 37      ldx $37                         LDX   Memchr            ; yes - is sec cmd code 0 ? yes - 
+.e8f1  f0 0a      beq $e8fd                       BEQ   SP_cmd1           ; yes - 
+.e8f3  ca         dex                             DEX                     ; Is sec cmd = 1?       
+.e8f4  f0 1c      beq $e912                       BEQ   SP_cmd3           ;       yes - is sec cmd code 1 ?
+.e8f6  a5 3c      lda $3c                         LDA   Hexdigits         ;             no - ":" cmd processed
+.e8f8  92 3a      sta ($3a)                       STA   (Addrptr)         ;
+.e8fa  4c 65 e9   jmp $e965                       JMP   Inc_addrptr       ; set to next address and return
+.e8fd  20 d0 e8   jsr $e8d0        SP_cmd1        JSR   DOT_cmd           ; sec dig = 0  move address to addrptr
+.e900  80 10      bra $e912                       BRA   SP_cmd3           ;
+.e902  a5 3a      lda $3a          SP_cmd2        LDA   Addrptr           ; CR cmd entry 
+.e904  89 0f      bit #$0f                        BIT   #$0F              ; *** changed 07 to 0F for 16 bytes/line
+.e906  f0 0a      beq $e912                       BEQ   SP_cmd3           ; if 16, print new line
+.e908  c0 00      cpy #$00                        cpy   #$00              ; if TXT cmd, don"t print the - or spaces between chrs
+.e90a  f0 46      beq $e952                       beq   TXT_cmd1          ;
+.e90c  89 07      bit #$07                        BIT   #$07              ; if 8, print -
+.e90e  f0 11      beq $e921                       BEQ   SP_cmd33          ;
+.e910  80 19      bra $e92b                       BRA   SP_cmd4           ; else print next byte
+.e912  20 4f e7   jsr $e74f        SP_cmd3        JSR   Print_CR          ; "." cmd - display address and data 
+.e915  20 f8 e7   jsr $e7f8                       jsr   Scan_Input        ; see if brk requested
+.e918  b0 2d      bcs $e947                       bcs   SP_brk            ; if so, stop 
+.e91a  a5 3b      lda $3b                         LDA   Addrptr+1         ; print address
+.e91c  a6 3a      ldx $3a                         LDX   Addrptr           ;
+.e91e  20 5c e7   jsr $e75c                       JSR   Print2Byte        ;
+.e921  a9 20      lda #$20         SP_cmd33       LDA   #$20              ; " " print 1 - 16 bytes of data
+.e923  20 fb e7   jsr $e7fb                       JSR   OUTPUT            ;
+.e926  a9 2d      lda #$2d                        LDA   #$2D              ; "-"
+.e928  20 fb e7   jsr $e7fb                       JSR   OUTPUT            ;
+.e92b  a9 20      lda #$20         SP_cmd4        LDA   #$20              ; " " 
+.e92d  20 fb e7   jsr $e7fb                       JSR   OUTPUT            ;
+.e930  c0 00      cpy #$00                        cpy   #$00              ;
+.e932  f0 1e      beq $e952                       beq   TXT_Cmd1          ;
+.e934  b2 3a      lda ($3a)                       LDA   (Addrptr)         ;
+.e936  20 60 e7   jsr $e760                       JSR   Print1Byte        ;
+.e939  38         sec              SP_cmd44       SEC                     ;  checks if range done
+.e93a  a5 3a      lda $3a                         LDA   Addrptr           ;
+.e93c  e5 3c      sbc $3c                         SBC   Hexdigits         ;
+.e93e  a5 3b      lda $3b                         LDA   Addrptr+1         ;
+.e940  e5 3d      sbc $3d                         SBC   Hexdigits+1       ;
+.e942  20 65 e9   jsr $e965                       jsr   Inc_addrptr       ;
+.e945  90 bb      bcc $e902                       BCC   SP_cmd2           ; loop until range done
+.e947  64 37      stz $37          SP_brk         STZ   Memchr            ; reset sec cmd code
+.e949  60         rts              SP_cmd5        RTS                     ; done or no digits to process
+.e94a  5a         phy              TXT_Cmd        PHY                     ;
+.e94b  a0 00      ldy #$00                        ldy   #$00              ;
+.e94d  20 eb e8   jsr $e8eb                       jsr   SP_cmd            ;
+.e950  7a         ply                             PLY                     ;
+.e951  60         rts                             RTS                     ;
+.e952  b2 3a      lda ($3a)        TXT_cmd1       LDA   (Addrptr)         ;
+.e954  29 7f      and #$7f                        AND   #$7F              ;
+.e956  c9 7f      cmp #$7f                        CMP   #$7F              ;
+.e958  f0 04      beq $e95e                       BEQ   TXT_Cmd2          ;
+.e95a  c9 20      cmp #$20                        CMP   #$20              ; " "
+.e95c  b0 02      bcs $e960                       BCS   TXT_Cmd3          ;
+.e95e  a9 2e      lda #$2e         TXT_Cmd2       LDA   #$2E              ; "." use "." if not printable char
+.e960  20 fb e7   jsr $e7fb        TXT_Cmd3       JSR   OUTPUT            ;
+.e963  80 d4      bra $e939                       BRA   SP_cmd44          ;
+.e965  e6 3a      inc $3a          Inc_addrptr    INC   Addrptr           ;  increments addrptr
+.e967  d0 02      bne $e96b                       BNE   Inc_addr1         ;
+.e969  e6 3b      inc $3b                         INC   Addrptr+1         ;
+.e96b  60         rts              Inc_addr1      RTS                     ;
+.e96c  a5 33      lda $33          Insert_cmd     lda   Linecnt           ;  "I" cmd code
+.e96e  f0 3e      beq $e9ae                       beq   Insert_3          ; abort if no . cmd entered
+.e970  38         sec                             sec                     ;
+.e971  a5 3c      lda $3c                         lda   Hexdigits         ;
+.e973  e5 3a      sbc $3a                         sbc   addrptr           ;
+.e975  aa         tax                             tax                     ;
+.e976  a5 3d      lda $3d                         lda   Hexdigits+1       ;
+.e978  e5 3b      sbc $3b                         sbc   addrptr+1         ;
+.e97a  a8         tay                             tay                     ;
+.e97b  90 31      bcc $e9ae                       bcc   Insert_3          ;
+.e97d  18         clc                             clc                     ;
+.e97e  8a         txa                             txa                     ;
+.e97f  65 3e      adc $3e                         adc   memptr            ;
+.e981  85 3c      sta $3c                         sta   hexdigits         ;
+.e983  98         tya                             tya                     ;
+.e984  65 3f      adc $3f                         adc   memptr+1          ;
+.e986  85 3d      sta $3d                         sta   hexdigits+1       ;
+.e988  b2 3e      lda ($3e)        Insert_0       LDA   (memptr)          ;
+.e98a  92 3c      sta ($3c)                       STA   (Hexdigits)       ;
+.e98c  a9 ff      lda #$ff                        lda   #$FF              ;
+.e98e  c6 3c      dec $3c                         DEC   Hexdigits         ;  
+.e990  c5 3c      cmp $3c                         cmp   Hexdigits         ;  
+.e992  d0 02      bne $e996                       BNE   Insert_1          ;
+.e994  c6 3d      dec $3d                         DEC   Hexdigits+1       ;
+.e996  c6 3e      dec $3e          Insert_1       dec   Memptr            ;  
+.e998  c5 3e      cmp $3e                         cmp   Memptr            ;
+.e99a  d0 02      bne $e99e                       bne   Insert_2          ;
+.e99c  c6 3f      dec $3f                         dec   Memptr+1          ;
+.e99e  38         sec              Insert_2       SEC                     ;  
+.e99f  a5 3e      lda $3e                         LDA   memptr            ;
+.e9a1  e5 3a      sbc $3a                         SBC   Addrptr           ;
+.e9a3  a5 3f      lda $3f                         LDA   memptr+1          ;
+.e9a5  e5 3b      sbc $3b                         SBC   Addrptr+1         ;
+.e9a7  90 05      bcc $e9ae                       bcc   Insert_3          ;
+.e9a9  20 f8 e7   jsr $e7f8                       jsr   Scan_Input        ; see if brk requested
+.e9ac  90 da      bcc $e988                       bcc   Insert_0          ; if so, stop List
+.e9ae  60         rts              Insert_3       RTS                     ;
+.e9af  a5 33      lda $33          Move_cmd       lda   Linecnt           ; *** any changes to this routine affect EEPROM_WR too!!!
+.e9b1  d0 0d      bne $e9c0                       bne   Move_cmd3         ; abort if no . cmd was used
+.e9b3  60         rts              Move_brk       RTS                     ;
+.e9b4  e6 3a      inc $3a          Move_cmd1      INC   Addrptr           ;  increments addrptr
+.e9b6  d0 02      bne $e9ba                       BNE   Move_cmd2         ;
+.e9b8  e6 3b      inc $3b                         INC   Addrptr+1         ;
+.e9ba  e6 3c      inc $3c          Move_cmd2      inc   Hexdigits         ;  "M" cmd code
+.e9bc  d0 02      bne $e9c0                       bne   Move_cmd3         ;
+.e9be  e6 3d      inc $3d                         inc   Hexdigits+1       ;
+.e9c0  38         sec              Move_cmd3      SEC                     ;  checks if range done
+.e9c1  a5 3e      lda $3e                         LDA   Memptr            ;
+.e9c3  e5 3a      sbc $3a                         SBC   Addrptr           ;
+.e9c5  a5 3f      lda $3f                         LDA   Memptr+1          ;
+.e9c7  e5 3b      sbc $3b                         SBC   Addrptr+1         ;
+.e9c9  90 e8      bcc $e9b3                       BCC   Move_brk          ;  exit if range done
+.e9cb  20 f8 e7   jsr $e7f8                       jsr   Scan_Input        ; see if brk requested
+.e9ce  b0 e3      bcs $e9b3                       bcs   Move_brk          ; 
+.e9d0  b2 3a      lda ($3a)                       LDA   (Addrptr)         ;  Moves one byte
+.e9d2  92 3c      sta ($3c)                       STA   (Hexdigits)       ;
+.e9d4  80 de      bra $e9b4                       BRA   Move_cmd1         ; (zapped after move from eeprom_wr)
+.e9d6  b2 3a      lda ($3a)        EEPROM_TEST    lda   (Addrptr)         ;    moved along with Move_cmd for EEPROM_WR
+.e9d8  52 3c      eor ($3c)                       eor   (Hexdigits)       ;    ""
+.e9da  30 fa      bmi $e9d6                       bmi   EEPROM_TEST       ;    ""
+.e9dc  80 d6      bra $e9b4                       bra   Move_cmd1         ;    ""
+.e9de  a5 3a      lda $3a          EEPROM_WR      lda   Addrptr           ;  move the Move_cmd sub to $0280 (kybrd buffer)
+.e9e0  48         pha                             pha                     ;  adding EEPROM test routine 
+.e9e1  a5 3b      lda $3b                         lda   Addrptr+1         ;  then run the burn program from RAM
+.e9e3  48         pha                             pha                     ;  
+.e9e4  a9 af      lda #$af                        lda   #<Move_cmd        ;
+.e9e6  85 3a      sta $3a                         sta   Addrptr           ;
+.e9e8  a9 e9      lda #$e9                        lda   #>Move_cmd        ;
+.e9ea  85 3b      sta $3b                         sta   Addrptr+1         ;
+.e9ec  a0 2e      ldy #$2e                        ldy   #$2E              ;  47 instructions
+.e9ee  b1 3a      lda ($3a),y      EEPROM_WR1     lda   (Addrptr),y       ;
+.e9f0  99 80 02   sta $0280,y                     sta   $0280,y           ;
+.e9f3  88         dey                             dey                     ;
+.e9f4  10 f8      bpl $e9ee                       bpl   EEPROM_WR1        ;
+.e9f6  a9 ea      lda #$ea                        lda   #$EA              ; NOP instruction
+.e9f8  8d a5 02   sta $02a5                       sta   $02A5             ; *
+.e9fb  8d a6 02   sta $02a6                       sta   $02A6             ; * affected by changes to Move_cmd routine
+.e9fe  8d 9c 02   sta $029c                       sta   $029C             ; * affected by changes to Move_cmd routine
+.ea01  8d 9d 02   sta $029d                       sta   $029D             ; * affected by changes to Move_cmd routine
+.ea04  8d 9e 02   sta $029e                       sta   $029E             ; * affected by changes to Move_cmd routine
+.ea07  8d 9f 02   sta $029f                       sta   $029F             ; * affected by changes to Move_cmd routine
+.ea0a  8d a0 02   sta $02a0                       sta   $02A0             ; * affected by changes to Move_cmd routine
+.ea0d  68         pla                             pla                     ;
+.ea0e  85 3b      sta $3b                         sta   Addrptr+1         ;
+.ea10  68         pla                             pla                     ;
+.ea11  85 3a      sta $3a                         sta   Addrptr           ;        
+.ea13  4c 80 02   jmp $0280                       jmp   $0280             ;
+.ea16  a6 3c      ldx $3c          Dest_cmd       LDX   Hexdigits         ;  ">" cmd code
+.ea18  a5 3d      lda $3d                         LDA   Hexdigits+1       ;
+.ea1a  86 3e      stx $3e                         STX   Memptr            ;  move address to memptr
+.ea1c  85 3f      sta $3f                         STA   Memptr+1          ;
+.ea1e  60         rts                             RTS                     ;  
+.ea1f  a5 33      lda $33          LIST_cmd       lda   LineCnt           ;  Check for normal/range
+.ea21  f0 29      beq $ea4c                       beq   List_cmd_1        ;  0 = normal  1=range 
+.ea23  a5 3a      lda $3a                         LDA   Addrptr           ;  Dissassemble range of code
+.ea25  a6 3b      ldx $3b                         LDX   Addrptr+1         ;  move addrptr to startaddr
+.ea27  85 38      sta $38                         STA   Startaddr         ;
+.ea29  86 39      stx $39                         STX   Startaddr+1       ;
+.ea2b  38         sec              List_range     sec                     ;
+.ea2c  a5 38      lda $38                         lda   Startaddr         ;
+.ea2e  e5 3a      sbc $3a                         sbc   Addrptr           ;
+.ea30  a5 39      lda $39                         lda   Startaddr+1       ; 
+.ea32  e5 3b      sbc $3b                         sbc   Addrptr+1         ;
+.ea34  90 15      bcc $ea4b                       bcc   List_done         ;
+.ea36  20 64 ea   jsr $ea64                       jsr   List_Line         ;  list one line
+.ea39  20 f8 e7   jsr $e7f8                       jsr   Scan_Input        ; see if brk requested
+.ea3c  b0 0d      bcs $ea4b                       bcs   List_done         ; if so, stop List
+.ea3e  38         sec                             SEC                     ;  checks if range done
+.ea3f  a5 3c      lda $3c                         LDA   Hexdigits         ;
+.ea41  e5 38      sbc $38                         SBC   Startaddr         ;
+.ea43  a5 3d      lda $3d                         LDA   Hexdigits+1       ;
+.ea45  e5 39      sbc $39                         SBC   Startaddr+1       ;
+.ea47  b0 e2      bcs $ea2b                       BCS   List_range        ;  if not, loop until done
+.ea49  64 33      stz $33                         stz   LineCnt           ;
+.ea4b  60         rts              List_done      RTS                     ;
+.ea4c  a5 35      lda $35          List_cmd_1     LDA   Hexdigcnt         ; Dissassemble one page of cmds
+.ea4e  f0 08      beq $ea58                       BEQ   List1             ; followed with more pages 
+.ea50  a6 3c      ldx $3c                         LDX   Hexdigits         ;
+.ea52  a5 3d      lda $3d                         LDA   Hexdigits+1       ;
+.ea54  86 38      stx $38                         STX   Startaddr         ;
+.ea56  85 39      sta $39                         STA   Startaddr+1       ;
+.ea58  a9 14      lda #$14         List1          LDA   #$14              ; one page of dissassembly
+.ea5a  85 33      sta $33                         STA   Linecnt           ;
+.ea5c  20 64 ea   jsr $ea64        List2          JSR   List_line         ;
+.ea5f  c6 33      dec $33                         DEC   Linecnt           ;
+.ea61  d0 f9      bne $ea5c                       BNE   List2             ;
+.ea63  60         rts                             RTS                     ;
+.ea64  20 4f e7   jsr $e74f        List_line      JSR   Print_CR          ; 
+.ea67  20 76 ea   jsr $ea76                       JSR   List_one          ; one line of dissassembly
+.ea6a  18         clc                             CLC                     ;
+.ea6b  a5 38      lda $38                         LDA   Startaddr         ; inc address pointer to next cmd
+.ea6d  65 35      adc $35                         ADC   Hexdigcnt         ;
+.ea6f  85 38      sta $38                         STA   Startaddr         ;
+.ea71  90 02      bcc $ea75                       BCC   List3             ;
+.ea73  e6 39      inc $39                         INC   Startaddr+1       ;
+.ea75  60         rts              List3          RTS                     ;
+.ea76  b2 38      lda ($38)        List_one       LDA   (Startaddr)       ; Dissassemble one CMD from Startaddr
+.ea78  aa         tax                             TAX                     ; Initialize List Cmd pointers
+.ea79  bd 58 ef   lda $ef58,x                     LDA   OPCtxtidx,X       ;
+.ea7c  85 36      sta $36                         STA   OPCtxtptr         ;
+.ea7e  bd 58 f0   lda $f058,x                     LDA   OPCaddmode,X      ;
+.ea81  29 0f      and #$0f                        AND   #$0F              ; mask out psuedo-modes
+.ea83  85 34      sta $34                         STA   Modejmp           ;
+.ea85  aa         tax                             TAX                     ;
+.ea86  bd 58 f1   lda $f158,x                     LDA   ModeByteCnt,X     ;
+.ea89  85 35      sta $35                         STA   Hexdigcnt         ;
+.ea8b  a5 39      lda $39                         LDA   Startaddr+1       ;
+.ea8d  a6 38      ldx $38                         LDX   Startaddr         ;
+.ea8f  20 5c e7   jsr $e75c                       JSR   Print2Byte        ; print address 
+.ea92  a9 2d      lda #$2d                        LDA   #$2D              ;  "-"
+.ea94  20 fb e7   jsr $e7fb                       JSR   OUTPUT            ;
+.ea97  20 7d e7   jsr $e77d                       JSR   Print2SP          ; print "  "
+.ea9a  a2 01      ldx #$01                        LDX   #$01              ;---------
+.ea9c  a0 00      ldy #$00         List4          LDY   #$00              ;print up to 3 ascii chars...
+.ea9e  c4 35      cpy $35          List5          CPY   Hexdigcnt         ;  two spaces...
+.eaa0  b0 0b      bcs $eaad                       BCS   List6             ;  up to three hex chars...
+.eaa2  b1 38      lda ($38),y                     LDA   (Startaddr),Y     ;  two spaces
+.eaa4  e0 00      cpx #$00                        CPX   #$00              ;
+.eaa6  d0 0e      bne $eab6                       BNE   List8             ;
+.eaa8  20 60 e7   jsr $e760                       JSR   Print1Byte        ;
+.eaab  80 07      bra $eab4                       BRA   List7             ;
+.eaad  e0 00      cpx #$00         List6          CPX   #$00              ;
+.eaaf  d0 03      bne $eab4                       BNE   List7             ;
+.eab1  20 7d e7   jsr $e77d                       JSR   Print2SP          ;
+.eab4  a9 20      lda #$20         List7          LDA   #$20              ; " "
+.eab6  29 7f      and #$7f         List8          AND   #$7F              ;
+.eab8  c9 7f      cmp #$7f                        CMP   #$7F              ;
+.eaba  f0 04      beq $eac0                       BEQ   List9             ;
+.eabc  c9 20      cmp #$20                        CMP   #$20              ; " "
+.eabe  b0 02      bcs $eac2                       BCS   List10            ;
+.eac0  a9 2e      lda #$2e         List9          LDA   #$2E              ; "." use "." if not printable char
+.eac2  20 fb e7   jsr $e7fb        List10         JSR   OUTPUT            ;
+.eac5  c8         iny                             INY                     ;
+.eac6  c0 03      cpy #$03                        CPY   #$03              ;
+.eac8  90 d4      bcc $ea9e                       BCC   List5             ;
+.eaca  20 7d e7   jsr $e77d                       JSR   Print2SP          ;
+.eacd  ca         dex                             DEX                     ;
+.eace  f0 cc      beq $ea9c                       BEQ   List4             ;---------
+.ead0  a5 36      lda $36                         LDA   OPCtxtptr         ; get opcode text
+.ead2  0a         asl                             ASL                     ;
+.ead3  65 36      adc $36                         ADC   OPCtxtptr         ;
+.ead5  aa         tax                             TAX                     ;
+.ead6  a0 fd      ldy #$fd                        LDY   #$FD              ;
+.ead8  bd 98 f1   lda $f198,x      List11         LDA   OPCtxtData,X      ;
+.eadb  20 fb e7   jsr $e7fb                       JSR   OUTPUT            ; print opcode text
+.eade  e8         inx                             INX                     ;
+.eadf  c8         iny                             INY                     ;
+.eae0  d0 f6      bne $ead8                       BNE   List11            ;
+.eae2  a5 36      lda $36                         LDA   OPCtxtptr         ;
+.eae4  c9 42      cmp #$42                        CMP   #$42              ; 4chr opcodes start
+.eae6  30 19      bmi $eb01                       BMI   List12		   ;
+.eae8  c9 46      cmp #$46                        CMP   #$46              ; the .xx cmds
+.eaea  10 15      bpl $eb01                       BPL   List12            ; 
+.eaec  b2 38      lda ($38)                       lda   (startaddr)	   ; get opcode of 4byte code
+.eaee  4a         lsr                             lsr
+.eaef  4a         lsr                             lsr
+.eaf0  4a         lsr                             lsr
+.eaf1  4a         lsr                             lsr
+.eaf2  29 07      and #$07                        AND   #$07              ; strip last 3 bits
+.eaf4  09 30      ora #$30                        ora   #$30              ; add CHR '0'
+.eaf6  20 fb e7   jsr $e7fb                       jsr   Output            ; print it
+.eaf9  a9 20      lda #$20                        lda   #$20              ; " "
+.eafb  20 fb e7   jsr $e7fb                       jsr   Output            ; 
+.eafe  4c 04 eb   jmp $eb04                       jmp   List13            ;
+.eb01  20 7d e7   jsr $e77d        List12         JSR   Print2SP          ;
+.eb04  a5 34      lda $34          List13         LDA   Modejmp           ; setup to print operand
+.eb06  0a         asl                             ASL                     ;
+.eb07  aa         tax                             TAX                     ;
+.eb08  7c 68 f1   jmp ($f168,x)                   JMP   (ModeJmpTbl,X)    ; goto operand printing command
+.eb0b  a9 23      lda #$23         IMM_mode       LDA   #$23              ; print #$HH
+.eb0d  20 fb e7   jsr $e7fb                       JSR   output            ;
+.eb10  a9 24      lda #$24         ZP_mode        LDA   #$24              ; print $HH
+.eb12  20 fb e7   jsr $e7fb                       JSR   output            ;
+.eb15  a0 01      ldy #$01                        LDY   #$01              ;
+.eb17  b1 38      lda ($38),y      Byte_mode      LDA   (Startaddr),Y     ;
+.eb19  4c 60 e7   jmp $e760                       JMP   Print1Byte        ;
+.eb1c  20 10 eb   jsr $eb10        ZP_X_mode      JSR   ZP_mode           ; print $HH,X
+.eb1f  a9 2c      lda #$2c         X_mode         LDA   #$2C              ; print ,X
+.eb21  20 fb e7   jsr $e7fb                       JSR   output            ;
+.eb24  a9 58      lda #$58                        LDA   #$58              ; 
+.eb26  4c fb e7   jmp $e7fb                       JMP   output            ;
+.eb29  20 10 eb   jsr $eb10        ZP_Y_mode      JSR   ZP_mode           ; print $HH,Y
+.eb2c  a9 2c      lda #$2c         Y_mode         LDA   #$2C              ; Print ,Y
+.eb2e  20 fb e7   jsr $e7fb                       JSR   output            ;
+.eb31  a9 59      lda #$59                        LDA   #$59              ; 
+.eb33  4c fb e7   jmp $e7fb                       JMP   output            ;
+.eb36  20 7c eb   jsr $eb7c        INDZP_mode     JSR   IND0_mode         ; Print ($HH)
+.eb39  20 10 eb   jsr $eb10                       JSR   ZP_mode           ;
+.eb3c  a9 29      lda #$29         IND1_mode      LDA   #$29              ; Print )
+.eb3e  4c fb e7   jmp $e7fb                       JMP   output            ;
+.eb41  20 7c eb   jsr $eb7c        INDZP_X_mode   JSR   IND0_mode         ; Print ($HH,X)
+.eb44  20 10 eb   jsr $eb10                       JSR   ZP_mode           ;
+.eb47  20 1f eb   jsr $eb1f                       JSR   X_mode            ;
+.eb4a  80 f0      bra $eb3c                       BRA   IND1_mode         ;
+.eb4c  20 36 eb   jsr $eb36        INDZP_Y_mode   JSR   INDZP_mode        ; Print ($HH),Y
+.eb4f  80 db      bra $eb2c                       BRA   Y_mode            ;
+.eb51  a9 24      lda #$24         ABS_mode       LDA   #$24              ; Print $HHHH
+.eb53  20 fb e7   jsr $e7fb                       JSR   output            ;
+.eb56  a0 02      ldy #$02                        LDY   #$02              ;
+.eb58  20 17 eb   jsr $eb17                       JSR   Byte_mode         ;
+.eb5b  88         dey                             DEY                     ;
+.eb5c  80 b9      bra $eb17                       BRA   Byte_mode         ;
+.eb5e  20 51 eb   jsr $eb51        ABS_X_mode     JSR   ABS_mode          ; Print $HHHH,X
+.eb61  80 bc      bra $eb1f                       BRA   X_mode            ;
+.eb63  20 51 eb   jsr $eb51        ABS_Y_mode     JSR   ABS_mode          ; Print $HHHH,Y
+.eb66  80 c4      bra $eb2c                       BRA   Y_mode            ;
+.eb68  20 7c eb   jsr $eb7c        INDABS_mode    JSR   IND0_mode         ; Print ($HHHH)
+.eb6b  20 51 eb   jsr $eb51                       JSR   ABS_mode          ;
+.eb6e  80 cc      bra $eb3c                       BRA   IND1_mode         ;
+.eb70  20 7c eb   jsr $eb7c        INDABSX_mode   JSR   IND0_mode         ; Print ($HHHH,X)
+.eb73  20 51 eb   jsr $eb51                       JSR   ABS_mode          ;
+.eb76  20 1f eb   jsr $eb1f                       JSR   X_mode            ;
+.eb79  80 c1      bra $eb3c                       BRA   IND1_mode         ;
+.eb7b  60         rts              IMPLIED_mode   RTS                     ; Implied/Accumulator mode 
+.eb7c  a9 28      lda #$28         IND0_mode      LDA   #$28              ; Print (
+.eb7e  4c fb e7   jmp $e7fb                       JMP   output            ;
+.eb81  20 10 eb   jsr $eb10        BBREL_mode     JSR   ZP_mode		   ;
+.eb84  a9 2c      lda #$2c         		   LDA   #$2C              ; Print ,
+.eb86  20 fb e7   jsr $e7fb                       JSR   output            ;
+.eb89  a9 24      lda #$24                        LDA   #$24              ; Print $
+.eb8b  20 fb e7   jsr $e7fb                       JSR   output            ;
+.eb8e  a0 02      ldy #$02                        LDY   #$02		   ;
+.eb90  b1 38      lda ($38),y                     LDA   (Startaddr),Y     ;
+.eb92  85 37      sta $37                         STA   Memchr            ;
+.eb94  18         clc                             CLC                     ;
+.eb95  a5 38      lda $38                         LDA   Startaddr         ;
+.eb97  69 03      adc #$03                        ADC   #$03              ;
+.eb99  4c ac eb   jmp $ebac                       JMP   REL_mode0         ;
+.eb9c  a9 24      lda #$24         REL_mode       LDA   #$24              ; Print $HHHH as Relative Branch
+.eb9e  20 fb e7   jsr $e7fb                       JSR   output            ;
+.eba1  a0 01      ldy #$01                        LDY   #$01              ;
+.eba3  b1 38      lda ($38),y                     LDA   (Startaddr),Y     ;
+.eba5  85 37      sta $37                         STA   Memchr            ;
+.eba7  18         clc                             CLC                     ;
+.eba8  a5 38      lda $38                         LDA   Startaddr         ;
+.ebaa  69 02      adc #$02                        ADC   #$02              ;
+.ebac  aa         tax              REL_mode0      TAX                     ;
+.ebad  a5 39      lda $39                         LDA   Startaddr+1       ;
+.ebaf  69 00      adc #$00                        ADC   #$00              ;
+.ebb1  a8         tay                             TAY                     ;
+.ebb2  18         clc                             CLC                     ;
+.ebb3  8a         txa                             TXA                     ;
+.ebb4  65 37      adc $37                         ADC   Memchr            ;
+.ebb6  aa         tax                             TAX                     ;
+.ebb7  98         tya                             TYA                     ;
+.ebb8  a4 37      ldy $37                         LDY   Memchr            ;
+.ebba  10 01      bpl $ebbd                       BPL   Rel_mode1         ;
+.ebbc  3a         dec                             DEC                     ;
+.ebbd  69 00      adc #$00         Rel_mode1      ADC   #$00              ;
+.ebbf  4c 5c e7   jmp $e75c                       JMP   Print2Byte        ;
+.ebc2  ba         tsx              Assem_Init     tsx                     ;
+.ebc3  e8         inx                             inx                     ;
+.ebc4  e8         inx                             inx                     ;
+.ebc5  e8         inx                             inx                     ;
+.ebc6  e8         inx                             inx                     ;
+.ebc7  9e 00 01   stz $0100,x                     stz   $0100,x           ;
+.ebca  20 b3 e8   jsr $e8b3                       jsr   version           ;  show version and ? prompt
+.ebcd  4c f0 eb   jmp $ebf0                       jmp   Assembler         ;
+.ebd0  a9 de      lda #$de         Asm_Help       lda   #<AsmHelptxt      ;  lower byte - Menu of Commands
+.ebd2  85 3a      sta $3a                         sta   addrptr           ;
+.ebd4  a9 f6      lda #$f6                        lda   #>AsmHelptxt      ;  upper byte
+.ebd6  85 3b      sta $3b                         sta   addrptr+1         ;
+.ebd8  80 0f      bra $ebe9                       bra   AsmHelp3          ;
+.ebda  c9 7e      cmp #$7e         ASmHelp4       cmp   #$7e              ;  "~"
+.ebdc  f0 05      beq $ebe3                       beq   AsmHelp1          ;
+.ebde  20 fb e7   jsr $e7fb                       jsr   Output            ;
+.ebe1  80 03      bra $ebe6                       bra   AsmHelp2          ;
+.ebe3  20 4f e7   jsr $e74f        AsmHelp1       jsr   Print_CR          ;     
+.ebe6  20 65 e9   jsr $e965        AsmHelp2       jsr   Inc_addrptr       ;
+.ebe9  b2 3a      lda ($3a)        AsmHelp3       lda   (addrptr)         ;
+.ebeb  d0 ed      bne $ebda                       bne   AsmHelp4          ;
+.ebed  20 be ee   jsr $eebe                       jsr   Opcode_List       ;  
+.ebf0  a2 ff      ldx #$ff         Assembler      LDX   #$FF              ;
+.ebf2  9a         txs                             TXS                     ; init stack
+.ebf3  64 35      stz $35                         stz   HexDigCnt         ;
+.ebf5  20 85 e7   jsr $e785                       jsr   Input_assem       ;
+.ebf8  a0 00      ldy #$00                        ldy   #$00              ; beginning of input line
+.ebfa  ad 00 03   lda $0300                       lda   buffer            ;
+.ebfd  c9 0d      cmp #$0d                        cmp   #$0d              ; Enter = done 
+.ebff  d0 03      bne $ec04                       bne   Asm01             ;
+.ec01  4c 3e e8   jmp $e83e                       JMP   Monitor           ; exit assembler
+.ec04  c9 3f      cmp #$3f         Asm01          cmp   #$3f              ; "?" Print Help
+.ec06  f0 c8      beq $ebd0                       beq   Asm_Help          ;
+.ec08  c9 20      cmp #$20                        cmp   #$20              ; space
+.ec0a  f0 3b      beq $ec47                       beq   Asm_opfetch       ;
+.ec0c  c9 3b      cmp #$3b                        cmp   #$3b              ;  ";" ignore line
+.ec0e  f0 e0      beq $ebf0                       beq   Assembler         ;
+.ec10  c9 4c      cmp #$4c                        cmp   #$4C              ;  "L" list
+.ec12  f0 2c      beq $ec40                       beq   Asm_List          ;
+.ec14  c9 24      cmp #$24                        cmp   #$24              ;  "$" ignore this
+.ec16  d0 01      bne $ec19                       bne   Asm02             ;
+.ec18  c8         iny                             iny                     ;
+.ec19  64 3c      stz $3c          Asm02          STZ   Hexdigits         ;  holds parsed hex
+.ec1b  64 3d      stz $3d                         STZ   Hexdigits+1       ;
+.ec1d  20 74 e8   jsr $e874                       JSR   ParseHexDig       ;  get Hex Chars 
+.ec20  a6 35      ldx $35                         LDX   Hexdigcnt         ;
+.ec22  f0 08      beq $ec2c                       Beq   Asm_Err           ;
+.ec24  c9 4c      cmp #$4c                        cmp   #$4C              ; "L" do list               ???
+.ec26  f0 1a      beq $ec42                       Beq   Asm_List1         ;
+.ec28  c9 20      cmp #$20                        cmp   #$20              ; Space
+.ec2a  f0 1b      beq $ec47                       Beq   Asm_opfetch       ;
+.ec2c  98         tya              Asm_Err        tya                     ;  get line pointer
+.ec2d  aa         tax                             tax                     ;
+.ec2e  a9 0a      lda #$0a                        lda   #$0a              ; LF move down one line
+.ec30  20 fb e7   jsr $e7fb                       jsr   output            ;
+.ec33  20 78 e7   jsr $e778                       jsr   PrintXSP          ; move to where error occured
+.ec36  a9 5e      lda #$5e                        lda   #$5E              ; "^"                       ???
+.ec38  20 fb e7   jsr $e7fb                       jsr   Output            ; mark it 
+.ec3b  20 fe e7   jsr $e7fe                       jsr   bell              ; 
+.ec3e  80 b0      bra $ebf0                       bra   Assembler         ;
+.ec40  64 35      stz $35          Asm_list       stz   HexDigcnt         ;
+.ec42  20 4c ea   jsr $ea4c        Asm_List1      jsr   List_Cmd_1        ;
+.ec45  80 a9      bra $ebf0        Asm_hop        bra   Assembler         ;
+.ec47  a5 35      lda $35          Asm_opfetch    lda   HexDigCnt         ;
+.ec49  f0 0a      beq $ec55                       beq   Asm_op01          ; no address change
+.ec4b  a6 3c      ldx $3c                         LDX   Hexdigits         ;
+.ec4d  a5 3d      lda $3d                         LDA   Hexdigits+1       ;
+.ec4f  86 3a      stx $3a                         STX   AddrPtr           ;
+.ec51  85 3b      sta $3b                         STA   AddrPtr+1         ;
+.ec53  88         dey                             dey                     ;
+.ec54  c8         iny              Asm_stripSP    iny                     ;
+.ec55  b9 00 03   lda $0300,y      Asm_op01       lda   buffer,y          ;
+.ec58  c9 20      cmp #$20                        cmp   #$20              ; strip spaces
+.ec5a  f0 f8      beq $ec54                       beq   Asm_stripSP       ;
+.ec5c  c9 0d      cmp #$0d                        cmp   #$0d              ; done
+.ec5e  f0 e5      beq $ec45                       beq   Asm_hop           ;
+.ec60  c9 3b      cmp #$3b                        cmp   #$3b              ; ";" comment char done
+.ec62  f0 e1      beq $ec45                       beq   Asm_hop           ;
+.ec64  a2 00      ldx #$00                        ldx   #$00              ;
+.ec66  86 36      stx $36                         stx   OpcTxtPtr         ;
+.ec68  84 33      sty $33                         sty   LineCnt           ;
+.ec6a  a4 33      ldy $33          Asm_opclp      ldy   LineCnt           ;
+.ec6c  a5 36      lda $36                         lda   OpcTxtPtr         ;
+.ec6e  0a         asl                             ASL                     ;
+.ec6f  65 36      adc $36                         adc   OpcTxtPtr         ;
+.ec71  aa         tax                             tax                     ;
+.ec72  b9 00 03   lda $0300,y                     lda   buffer,y          ;
+.ec75  c8         iny                             iny                     ;
+.ec76  dd 98 f1   cmp $f198,x                     cmp   OpcTxtData,x      ;
+.ec79  d0 14      bne $ec8f                       bne   Asm_getnext       ;
+.ec7b  b9 00 03   lda $0300,y                     lda   buffer,y          ;
+.ec7e  e8         inx                             inx                     ;
+.ec7f  c8         iny                             iny                     ;
+.ec80  dd 98 f1   cmp $f198,x                     cmp   OpcTxtData,x      ;
+.ec83  d0 0a      bne $ec8f                       bne   Asm_getnext       ;
+.ec85  b9 00 03   lda $0300,y                     lda   buffer,y          ;
+.ec88  e8         inx                             inx                     ;
+.ec89  c8         iny                             iny                     ;
+.ec8a  dd 98 f1   cmp $f198,x                     cmp   OpcTxtData,x      ;
+.ec8d  f0 0c      beq $ec9b                       beq   Asm_goodop        ;
+.ec8f  a6 36      ldx $36          Asm_getnext    ldx   OpcTxtPtr         ;
+.ec91  e8         inx                             inx                     ;
+.ec92  86 36      stx $36                         stx   OpcTxtPtr         ;
+.ec94  e0 4a      cpx #$4a                        cpx   #$4A              ; last one? then err
+.ec96  d0 d2      bne $ec6a                       bne   Asm_opclp
+.ec98  4c 2c ec   jmp $ec2c        Asm_err2       jmp   Asm_err
+.ec9b  a9 00      lda #$00         Asm_goodop     lda   #$00
+.ec9d  85 34      sta $34                         sta   ModeJmp           ; 
+.ec9f  c6 34      dec $34                         dec   ModeJmp           ; init to FF for () check
+.eca1  85 3c      sta $3c                         sta   HexDigits         ; and Byte holder
+.eca3  85 3d      sta $3d                         sta   HexDigits+1       ; 
+.eca5  85 35      sta $35                         sta   HexDigCnt         ;
+.eca7  a6 36      ldx $36                         ldx   OpcTxtPtr         ;
+.eca9  e0 42      cpx #$42                        cpx   #$42              ; 
+.ecab  30 18      bmi $ecc5                       bmi   Asm_goodSP        ; not a 4 chr opcode
+.ecad  e0 46      cpx #$46                        cpx   #$46              
+.ecaf  10 14      bpl $ecc5                       bpl   Asm_goodSP        ; not a 4 chr opcode
+.ecb1  b9 00 03   lda $0300,y                     lda   buffer,y          ; get next chr
+.ecb4  c8         iny                             iny                     ; advance pointer
+.ecb5  c9 38      cmp #$38                        cmp   #$38              ; 
+.ecb7  10 df      bpl $ec98                       bpl   Asm_err2          ; not chr "0"-"7"
+.ecb9  c9 30      cmp #$30                        cmp   #$30
+.ecbb  30 db      bmi $ec98                       bmi   Asm_err2          ; not chr "0"-"7"
+.ecbd  0a         asl                             ASL
+.ecbe  0a         asl                             ASL
+.ecbf  0a         asl                             ASL
+.ecc0  0a         asl                             ASL
+.ecc1  85 39      sta $39                         sta   startaddr_H       ; temp holder for 4th chr opcode
+.ecc3  a9 80      lda #$80                        LDA   #$80              ; flag for 
+.ecc5  be 00 03   ldx $0300,y      Asm_goodSP     ldx   buffer,y          ; get next operand char
+.ecc8  c8         iny                             iny                     ; point to next operand chr
+.ecc9  e0 20      cpx #$20                        cpx   #$20              ;  sp
+.eccb  d0 24      bne $ecf1                       bne   Asm_GoodSP2
+.eccd  c9 80      cmp #$80                        cmp   #$80
+.eccf  30 f4      bmi $ecc5                       bmi   Asm_goodSP
+.ecd1  a6 36      ldx $36          Asm_goodSP1    ldx   OpcTxtPtr         ; check if its a BBRx or BBSx opcode
+.ecd3  e0 44      cpx #$44                        cpx   #$44              ; 
+.ecd5  10 ee      bpl $ecc5                       bpl   Asm_GoodSP        ;
+.ecd7  a6 35      ldx $35                         ldx   HexDigCnt         ;
+.ecd9  f0 ea      beq $ecc5                       beq   Asm_goodSP        ;
+.ecdb  c9 d0      cmp #$d0                        cmp   #$D0              ; already have zp & rel?
+.ecdd  10 e6      bpl $ecc5                       bpl   Asm_GoodSP        ; we don't care then
+.ecdf  c9 c0      cmp #$c0                        cmp   #$C0              ; already got a zp address?
+.ece1  10 b5      bpl $ec98                       bpl   Asm_Err2          ; then error
+.ece3  a6 3d      ldx $3d                         ldx   HexDigits+1
+.ece5  d0 b1      bne $ec98                       bne   Asm_err2          ; not zero page
+.ece7  a6 3c      ldx $3c                         ldx   HexDigits
+.ece9  86 38      stx $38                         stx   startaddr         ; temp zp value for BBRx & BBSx cmds 
+.eceb  09 40      ora #$40                        ora   #$40              ; mark zp address fetched
+.eced  29 f7      and #$f7                        and   #$F7              ; mask out zp address found
+.ecef  80 d4      bra $ecc5                       bra   Asm_goodSP        ; get next chr
+.ecf1  e0 0d      cpx #$0d         Asm_goodSp2    cpx   #$0d              ;  CR
+.ecf3  d0 03      bne $ecf8                       bne   Asm_eol
+.ecf5  4c af ed   jmp $edaf        Asm_jmp1       jmp   Asm_modeSrch
+.ecf8  e0 3b      cpx #$3b         Asm_eol        cpx   #$3b              ;  ";"
+.ecfa  f0 f9      beq $ecf5                       beq   Asm_jmp1
+.ecfc  48         pha                             pha
+.ecfd  a5 36      lda $36                         lda   OpcTxtPtr
+.ecff  c9 46      cmp #$46                        cmp   #$46              ; normal opcode if <=45h
+.ed01  30 44      bmi $ed47                       bmi   Asm_opnd1
+.ed03  d0 19      bne $ed1e                       bne   Asm_xtra1
+.ed05  e0 24      cpx #$24                        cpx   #$24              ; $ .db pseudo-opcode
+.ed07  f0 01      beq $ed0a                       beq   Asm_db1
+.ed09  88         dey                             dey
+.ed0a  20 74 e8   jsr $e874        Asm_db1        jsr   ParseHexDig
+.ed0d  fa         plx                             plx
+.ed0e  a6 35      ldx $35                         ldx   HexDigCnt
+.ed10  f0 86      beq $ec98                       beq   Asm_err2          ; no digits retrieved
+.ed12  a0 00      ldy #$00                        ldy   #$00
+.ed14  a9 01      lda #$01                        lda   #$01
+.ed16  48         pha                             PHA
+.ed17  a5 3c      lda $3c                         lda   HexDigits
+.ed19  91 3a      sta ($3a),y                     sta   (AddrPtr),y
+.ed1b  4c 4a ee   jmp $ee4a                       jmp   Asm_save
+.ed1e  c9 47      cmp #$47         Asm_xtra1      cmp   #$47              ; .dw pseudo-opcode
+.ed20  d0 1e      bne $ed40                       bne   Asm_xtra2 
+.ed22  e0 24      cpx #$24                        cpx   #$24              ; $
+.ed24  f0 01      beq $ed27                       beq   Asm_dw1
+.ed26  88         dey                             dey
+.ed27  20 74 e8   jsr $e874        Asm_dw1        jsr   ParseHexDig
+.ed2a  fa         plx                             plx
+.ed2b  a6 35      ldx $35                         ldx   HexDigCnt
+.ed2d  f0 7d      beq $edac                       beq   Asm_err1          ; no digits retrieved
+.ed2f  a0 00      ldy #$00                        ldy   #$00
+.ed31  a9 02      lda #$02                        lda   #$02
+.ed33  48         pha                             PHA
+.ed34  a5 3c      lda $3c                         lda   HexDigits
+.ed36  91 3a      sta ($3a),y                     sta   (AddrPtr),y
+.ed38  a5 3d      lda $3d                         lda   HexDigits+1
+.ed3a  c8         iny                             iny
+.ed3b  91 3a      sta ($3a),y                     sta   (AddrPtr),y
+.ed3d  4c 4a ee   jmp $ee4a                       jmp   Asm_save
+.ed40  c9 48      cmp #$48         Asm_xtra2      cmp   #$48              ; .ds pseudo-opcode
+.ed42  d0 68      bne $edac                       bne   Asm_err1 
+.ed44  4c 90 ee   jmp $ee90                       jmp   Asm_txt
+.ed47  68         pla              Asm_opnd1      pla
+.ed48  e0 23      cpx #$23                        cpx   #$23              ;  #    20
+.ed4a  d0 05      bne $ed51                       bne   Asm_parse01
+.ed4c  09 20      ora #$20                        ora   #$20
+.ed4e  4c c5 ec   jmp $ecc5                       jmp   Asm_goodSP 
+.ed51  e0 28      cpx #$28         Asm_parse01    cpx   #$28              ;  (   04
+.ed53  d0 0b      bne $ed60                       bne   Asm_parse02
+.ed55  09 04      ora #$04                        ora   #$04
+.ed57  a6 34      ldx $34                         ldx   modeJmp
+.ed59  10 51      bpl $edac                       bpl   Asm_err1          ;  more than one ( 
+.ed5b  e6 34      inc $34                         inc   ModeJmp
+.ed5d  4c c5 ec   jmp $ecc5                       jmp   Asm_goodSP 
+.ed60  e0 29      cpx #$29         Asm_parse02    cpx   #$29              ;  )
+.ed62  d0 09      bne $ed6d                       bne   Asm_parse03
+.ed64  a6 34      ldx $34                         ldx   ModeJmp
+.ed66  d0 44      bne $edac                       bne   Asm_err1          ;  ) without (
+.ed68  e6 34      inc $34                         inc   ModeJmp
+.ed6a  4c c5 ec   jmp $ecc5                       jmp   Asm_goodSP 
+.ed6d  e0 2c      cpx #$2c         Asm_parse03    cpx   #$2C              ;  ,
+.ed6f  d0 1e      bne $ed8f                       bne   Asm_parse04
+.ed71  be 00 03   ldx $0300,y                     ldx   buffer,y
+.ed74  e0 58      cpx #$58                        cpx   #$58              ;  X        02
+.ed76  d0 06      bne $ed7e                       bne   Asm_parse31
+.ed78  09 02      ora #$02                        ora   #$02
+.ed7a  c8         iny                             iny
+.ed7b  4c c5 ec   jmp $ecc5                       jmp   Asm_goodSP
+.ed7e  e0 59      cpx #$59         Asm_parse31    cpx   #$59              ;  Y        01 
+.ed80  f0 07      beq $ed89                       beq   Asm_parse32
+.ed82  c9 80      cmp #$80                        cmp   #$80              ;  is BBRx or BBSx cmd active?
+.ed84  30 26      bmi $edac                       bmi   Asm_err1          ;  , without X or Y or 4byte opcode      
+.ed86  4c d1 ec   jmp $ecd1                       jmp   Asm_goodSP1       ;  save zp address
+.ed89  09 01      ora #$01         Asm_parse32    ora   #$01
+.ed8b  c8         iny                             iny
+.ed8c  4c c5 ec   jmp $ecc5                       jmp   Asm_goodSP 
+.ed8f  e0 24      cpx #$24         Asm_parse04    cpx   #$24              ;  $
+.ed91  f0 01      beq $ed94                       beq   Asm_parse42       ;   
+.ed93  88         dey                             dey                     ; not #$(),X,Y  so try Hexdig, if not err
+.ed94  48         pha              Asm_parse42    pha
+.ed95  20 74 e8   jsr $e874                       jsr   ParseHexDig
+.ed98  88         dey                             dey                     ; adjust input line pointer
+.ed99  68         pla                             pla
+.ed9a  a6 35      ldx $35                         ldx   HexDigCnt
+.ed9c  f0 0e      beq $edac                       beq   Asm_err1          ; no digits retrieved
+.ed9e  a6 3d      ldx $3d                         ldx   HexDigits+1    
+.eda0  d0 05      bne $eda7                       bne   Asm_parse41
+.eda2  09 08      ora #$08                        ora   #$08              ; <256               08
+.eda4  4c c5 ec   jmp $ecc5                       jmp   Asm_goodSP
+.eda7  09 10      ora #$10         Asm_parse41    ora   #$10              ; 2 bytes            10 
+.eda9  4c c5 ec   jmp $ecc5                       jmp   Asm_goodSP 
+.edac  4c 2c ec   jmp $ec2c        Asm_err1       jmp   Asm_Err
+.edaf  a2 0f      ldx #$0f         Asm_ModeSrch   ldx   #$0F              ; # of modes
+.edb1  dd 88 f1   cmp $f188,x      Asm_ModeS1     cmp   Asm_ModeLst,x
+.edb4  f0 05      beq $edbb                       beq   Asm_ModeFnd 
+.edb6  ca         dex                             dex   
+.edb7  10 f8      bpl $edb1                       bpl   Asm_ModeS1
+.edb9  80 f1      bra $edac                       bra   Asm_Err1          ; invalid Mode
+.edbb  86 37      stx $37          Asm_ModeFnd    stx   Memchr            ; save mode
+.edbd  c9 80      cmp #$80                        cmp   #$80              ; is it 4 chr opcode?
+.edbf  30 05      bmi $edc6                       bmi   Asm_opcSrch       ;no
+.edc1  8a         txa                             txa
+.edc2  05 39      ora $39                         ora   startaddr_H       ; adjust the psuedo mode               
+.edc4  85 37      sta $37                         sta   Memchr            ; set proper mode
+.edc6  a2 00      ldx #$00         Asm_opcSrch    ldx   #$00
+.edc8  bd 58 ef   lda $ef58,x      Asm_opcSrch1   lda   OpcTxtidx,x
+.edcb  c5 36      cmp $36                         cmp   OpcTxtPtr
+.edcd  d0 07      bne $edd6                       bne   Asm_srchNxt   
+.edcf  bd 58 f0   lda $f058,x                     lda   OPCaddmode,x
+.edd2  c5 37      cmp $37                         cmp   Memchr
+.edd4  f0 2d      beq $ee03                       beq   Asm_OpcFnd
+.edd6  e8         inx              Asm_srchNxt    inx
+.edd7  d0 ef      bne $edc8                       bne   Asm_opcSrch1 
+.edd9  a5 37      lda $37                         lda   Memchr            ;
+.eddb  c9 02      cmp #$02                        cmp   #$02              ; ZP
+.eddd  d0 06      bne $ede5                       bne   Asm_srchAlt 
+.eddf  a9 01      lda #$01                        LDA   #$01              ; ABS
+.ede1  85 37      sta $37                         sta   Memchr
+.ede3  80 e1      bra $edc6                       bra   Asm_opcSrch
+.ede5  c9 01      cmp #$01         Asm_srchAlt    cmp   #$01              ; ABS
+.ede7  d0 06      bne $edef                       bne   Asm_srchA0
+.ede9  a9 0a      lda #$0a                        LDA   #$0A              ; REL
+.edeb  85 37      sta $37                         sta   Memchr
+.eded  80 d7      bra $edc6                       bra   Asm_opcSrch
+.edef  c9 0d      cmp #$0d         Asm_srchA0     cmp   #$0d               ;  ind zp
+.edf1  d0 06      bne $edf9                       bne   Asm_srchA1
+.edf3  a9 0b      lda #$0b                        LDA   #$0b              ; ind Abs
+.edf5  85 37      sta $37                         sta   Memchr
+.edf7  80 cd      bra $edc6                       bra   Asm_opcSrch
+.edf9  c9 07      cmp #$07         Asm_SrchA1     cmp   #$07              ; zp,y
+.edfb  d0 af      bne $edac                       bne   Asm_Err1          ; no more modes to try, bad mode err
+.edfd  a9 09      lda #$09                        LDA   #$09              ; ABS,y
+.edff  85 37      sta $37                         sta   Memchr
+.ee01  80 c3      bra $edc6                       bra   Asm_opcSrch
+.ee03  a5 37      lda $37          Asm_OpcFnd     lda   Memchr
+.ee05  29 0f      and #$0f                        and   #$0F              ; mask out psuedo modes
+.ee07  85 37      sta $37                         sta   Memchr            ;
+.ee09  c9 0e      cmp #$0e                        CMP   #$0E              ; BBR mode?
+.ee0b  d0 0b      bne $ee18                       bne   Asm_opcFnd0       ;
+.ee0d  20 57 ee   jsr $ee57                       jsr   Asm_BRelCalc      ;
+.ee10  85 3d      sta $3d                         sta   HexDigits_H       ;
+.ee12  a5 38      lda $38                         lda   Startaddr         ;
+.ee14  85 3c      sta $3c                         sta   Hexdigits         ;
+.ee16  80 07      bra $ee1f                       bra   Asm_OpcFnd1       ;   
+.ee18  c9 0a      cmp #$0a         Asm_OpcFnd0    cmp   #$0A              ; is Rel Mode?
+.ee1a  d0 03      bne $ee1f                       bne   Asm_OpcFnd1 
+.ee1c  20 6f ee   jsr $ee6f                       jsr   Asm_RelCalc       ; adjust rel address
+.ee1f  a0 00      ldy #$00         Asm_OpcFnd1    ldy   #$00
+.ee21  8a         txa                             txa
+.ee22  91 3a      sta ($3a),y                     sta   (AddrPtr),y
+.ee24  c8         iny                             iny
+.ee25  a6 37      ldx $37                         ldx   Memchr            ; 
+.ee27  bd 58 f1   lda $f158,x                     lda   ModeByteCnt,x
+.ee2a  48         pha                             PHA                     ; Save # of bytes
+.ee2b  c9 01      cmp #$01                        cmp   #$01
+.ee2d  f0 10      beq $ee3f                       beq   Asm_EchoL
+.ee2f  a5 3c      lda $3c                         lda   HexDigits
+.ee31  91 3a      sta ($3a),y                     sta   (AddrPtr),y
+.ee33  c8         iny                             iny
+.ee34  bd 58 f1   lda $f158,x                     lda   ModeByteCnt,x
+.ee37  c9 02      cmp #$02                        cmp   #$02
+.ee39  f0 04      beq $ee3f                       beq   Asm_EchoL
+.ee3b  a5 3d      lda $3d                         lda   HexDigits+1
+.ee3d  91 3a      sta ($3a),y                     sta   (AddrPtr),y
+.ee3f  a5 3a      lda $3a          Asm_EchoL      lda   AddrPtr
+.ee41  85 38      sta $38                         sta   StartAddr
+.ee43  a5 3b      lda $3b                         lda   AddrPtr+1
+.ee45  85 39      sta $39                         sta   StartAddr+1
+.ee47  20 76 ea   jsr $ea76                       jsr   List_One
+.ee4a  18         clc              Asm_Save       clc
+.ee4b  68         pla                             PLA
+.ee4c  65 3a      adc $3a                         adc   AddrPtr
+.ee4e  85 3a      sta $3a                         sta   AddrPtr
+.ee50  90 02      bcc $ee54                       bcc   Asm_done
+.ee52  e6 3b      inc $3b                         inc   AddrPtr+1
+.ee54  4c f0 eb   jmp $ebf0        Asm_done       jmp   Assembler
+.ee57  20 5e ee   jsr $ee5e        Asm_BRelCalc   jsr   Asm_relsub
+.ee5a  e9 03      sbc #$03                        sbc   #$03
+.ee5c  80 16      bra $ee74                       bra   Asm_RelC1
+.ee5e  38         sec              Asm_RelSub     sec
+.ee5f  a5 3c      lda $3c                         lda   Hexdigits
+.ee61  e5 3a      sbc $3a                         sbc   AddrPtr
+.ee63  85 3e      sta $3e                         sta   Memptr
+.ee65  a5 3d      lda $3d                         lda   Hexdigits+1
+.ee67  e5 3b      sbc $3b                         sbc   AddrPtr+1
+.ee69  85 3f      sta $3f                         sta   Memptr+1
+.ee6b  38         sec                             sec
+.ee6c  a5 3e      lda $3e                         lda   Memptr
+.ee6e  60         rts                             rts 
+.ee6f  20 5e ee   jsr $ee5e        Asm_RelCalc    jsr   Asm_relsub
+.ee72  e9 02      sbc #$02                        sbc   #$02
+.ee74  85 3e      sta $3e          Asm_Relc1      sta   Memptr
+.ee76  b0 02      bcs $ee7a                       bcs   Asm_relC2
+.ee78  c6 3f      dec $3f                         dec   Memptr+1
+.ee7a  a5 3f      lda $3f          Asm_relC2      lda   Memptr+1               
+.ee7c  f0 0b      beq $ee89                       beq   Asm_relC4         ; positive
+.ee7e  c9 ff      cmp #$ff                        cmp   #$FF              ; negative
+.ee80  d0 0b      bne $ee8d                       bne   Asm_txtErr
+.ee82  a5 3e      lda $3e                         lda   Memptr
+.ee84  10 07      bpl $ee8d                       bpl   Asm_txtErr
+.ee86  85 3c      sta $3c          Asm_relC3      sta   HexDigits
+.ee88  60         rts                             rts
+.ee89  a5 3e      lda $3e          Asm_relC4      lda   Memptr
+.ee8b  10 f9      bpl $ee86                       bpl   Asm_relC3
+.ee8d  4c 2c ec   jmp $ec2c        Asm_txtErr     jmp   Asm_Err
+.ee90  fa         plx              Asm_txt        plx                      ; process the .ds pseudo-opcode
+.ee91  88         dey                             dey
+.ee92  98         tya                             tya
+.ee93  aa         tax                             tax
+.ee94  a0 fe      ldy #$fe                        ldy   #$fe
+.ee96  c8         iny              Asm_txt1       iny
+.ee97  bd 00 03   lda $0300,x      Asm_txt2       lda   buffer,x           ; get next operand char
+.ee9a  e8         inx                             inx                      ; point to next operand chr
+.ee9b  c9 0d      cmp #$0d                        cmp   #$0d             ;  CR
+.ee9d  f0 1a      beq $eeb9                       beq   Asm_txt9
+.ee9f  c9 27      cmp #$27                        cmp   #$27             ; "
+.eea1  d0 06      bne $eea9                       bne   Asm_txt3
+.eea3  c0 ff      cpy #$ff                        cpy   #$ff             ; opening " found?
+.eea5  d0 12      bne $eeb9                       bne   Asm_txt9         ; no, closing, so done
+.eea7  80 ed      bra $ee96                       bra   Asm_txt1         ; yes, get first text chr
+.eea9  c0 ff      cpy #$ff         Asm_txt3       cpy   #$ff             ; already found opening "?
+.eeab  f0 04      beq $eeb1                       beq   Asm_txt4         ; 
+.eead  91 3a      sta ($3a),y                     sta   (AddrPtr),y      ; yes, save chr
+.eeaf  80 e5      bra $ee96                       bra   Asm_txt1
+.eeb1  c9 20      cmp #$20         Asm_txt4       cmp   #$20             ; no, if not a space, then err
+.eeb3  f0 e2      beq $ee97                       beq   Asm_txt2
+.eeb5  8a         txa                             txa
+.eeb6  a8         tay                             tay
+.eeb7  80 d4      bra $ee8d                       bra   Asm_txtErr
+.eeb9  98         tya              Asm_txt9       tya
+.eeba  48         pha                             pha
+.eebb  4c 4a ee   jmp $ee4a                       jmp   Asm_save
+.eebe  a0 49      ldy #$49         Opcode_List    ldy   #$49              ; Number of Opcodes (64)
+.eec0  a2 00      ldx #$00                        ldx   #$00              ; pointer to characters
+.eec2  8a         txa              Opcode_List1   txa                     ; 
+.eec3  29 0f      and #$0f                        and   #$0F              ; Print CR after each 16 opcodes 
+.eec5  d0 03      bne $eeca                       bne   Opcode_List2      ; not divisible by 16
+.eec7  20 4f e7   jsr $e74f                       jsr   Print_CR          ;
+.eeca  bd 98 f1   lda $f198,x      Opcode_List2   lda   OPCtxtData,x      ; get opcode chr data
+.eecd  20 fb e7   jsr $e7fb                       jsr   Output            ; print 1st char
+.eed0  e8         inx                             inx                     ;
+.eed1  bd 98 f1   lda $f198,x                     lda   OPCtxtData,x      ; 
+.eed4  20 fb e7   jsr $e7fb                       jsr   Output            ; print 2nd char
+.eed7  e8         inx                             inx                     ;
+.eed8  bd 98 f1   lda $f198,x                     lda   OPCtxtData,x      ;
+.eedb  20 fb e7   jsr $e7fb                       jsr   Output            ; print 3rd char
+.eede  e8         inx                             inx                     ;
+.eedf  c0 08      cpy #$08                        cpy   #$08              ; 
+.eee1  10 09      bpl $eeec                       bpl   Opcode_List3      ; not 4 byte code
+.eee3  c0 04      cpy #$04                        cpy   #$04              ;
+.eee5  30 05      bmi $eeec                       bmi   Opcode_list3      ;
+.eee7  a9 78      lda #$78                        lda   #$78              ; add 'x'
+.eee9  20 fb e7   jsr $e7fb                       jsr   output            ; for RMBx, SMBx,BBRx, & BBSx
+.eeec  a9 20      lda #$20         Opcode_List3   lda   #$20              ; print space
+.eeee  20 fb e7   jsr $e7fb                       jsr   Output            ;
+.eef1  88         dey                             dey                     ;
+.eef2  d0 ce      bne $eec2                       bne   Opcode_List1      ; 
+.eef4  20 4f e7   jsr $e74f                       jsr   Print_CR          ; one last CR-LF
+.eef7  60         rts                             rts                     ;
+
+>eef8  30 31 32 33 34 35 36 37 38 39 41 42 43 44 45 46  Hexdigdata     .byte "0123456789ABCDEF";hex char table 
+>ef08  0d                          CmdAscii       .byte $0D               ; 0 enter    cmd codes
+>ef09  20                                         .byte $20               ; 1 SPACE
+>ef0a  2e                                         .byte $2E               ; 2 .
+>ef0b  3a                                         .byte $3A               ; 3 :
+>ef0c  3e                                         .byte $3E               ; 4 >  
+>ef0d  3f                                         .byte $3f               ; 5 ? - Help
+>ef0e  21                                         .byte $21               ; 6 ! - Assembler
+>ef0f  47                                         .byte $47               ; 7 g - Go
+>ef10  49                                         .byte $49               ; 8 i - Insert
+>ef11  4c                                         .byte $4C               ; 9 l - List
+>ef12  4d                                         .byte $4D               ; A m - Move
+>ef13  51                                         .byte $51               ; B q - Query memory (text dump)
+>ef14  52                                         .byte $52               ; C r - Registers
+>ef15  40                                         .byte $40               ; D @ - Cold Start Basic
+>ef16  23                                         .byte $23               ; E # - Warm Start Basic
+>ef17  55                                         .byte $55               ; F U - Uploader
+>ef18  56                                         .byte $56               ;10 v - Version
+>ef19  57                                         .byte $57               ;11 w - "(W)rite" eeprom
+>ef1a  24                                         .byte $24               ;12 $ - fig forth
+>ef1b  25                                         .byte $25               ;13 % - uChess
+>ef1c  db e8                       Cmdjmptbl      .word CR_cmd            ; 0  enter   cmd jmp table
+>ef1e  eb e8                                      .word SP_cmd            ; 1   space
+>ef20  d0 e8                                      .word DOT_cmd           ; 2    .
+>ef22  d0 e8                                      .word DOT_cmd           ; 3    :
+>ef24  16 ea                                      .word Dest_cmd          ; 4    >  
+>ef26  95 e8                                      .word Help_Cmd          ; 5    ?
+>ef28  c2 eb                                      .word Assem_init        ; 6    !
+>ef2a  c4 e8                                      .word Excute_cmd        ; 7    g
+>ef2c  6c e9                                      .word Insert_Cmd        ; 8    i
+>ef2e  1f ea                                      .word LIST_cmd          ; 9    l
+>ef30  af e9                                      .word Move_cmd          ; A    m
+>ef32  4a e9                                      .word TXT_cmd           ; B    q
+>ef34  18 e7                                      .word Printreg          ; C    r
+>ef36  2e e6                                      .word bsetup            ; D    @
+>ef38  00 00                                      .word $0000             ; E    #
+>ef3a  00 fc                                      .word xmodem            ; F    u
+>ef3c  b3 e8                                      .word Version           ;10    v
+>ef3e  de e9                                      .word EEPROM_WR         ;11    w  
+>ef40  65 bd                                      .word TOPROM            ;12    $  
+>ef42  00 9e                                      .word _CSTART           ;13 % - uChess
+>ef44  00                          Cmdseccode     .byte $00               ; 0   enter       secondary command table
+>ef45  ff                                         .byte $FF               ; 1   sp
+>ef46  01                                         .byte $01               ; 2   .
+>ef47  02                                         .byte $02               ; 3   :
+>ef48  00                                         .byte $00               ; 4   > 
+>ef49  00                                         .byte $00               ; 5   ?
+>ef4a  00                                         .byte $00               ; 6   !
+>ef4b  00                                         .byte $00               ; 7   g
+>ef4c  00                                         .byte $00               ; 8   i
+>ef4d  00                                         .byte $00               ; 9   l
+>ef4e  00                                         .byte $00               ; A   m
+>ef4f  00                                         .byte $00               ; B   q
+>ef50  00                                         .byte $00               ; C   r
+>ef51  00                                         .byte $00               ; D   @
+>ef52  00                                         .byte $00               ; E   #
+>ef53  00                                         .byte $00               ; F   u
+>ef54  00                                         .byte $00               ;10   v
+>ef55  00                                         .byte $00               ;11   w
+>ef56  00                                         .byte $00               ;12   $
+>ef57  00                                         .byte $00               ;13 % - uChess
+>ef58  0b                          OPCtxtidx      .byte $0B               ;0   operand text index
+>ef59  23                                         .byte $23               ;1
+>ef5a  49                                         .byte $49               ;2
+>ef5b  49                                         .byte $49               ;3
+>ef5c  3b                                         .byte $3B               ;4
+>ef5d  23                                         .byte $23               ;5
+>ef5e  02                                         .byte $02               ;6
+>ef5f  44                                         .byte $44               ;7
+>ef60  25                                         .byte $25               ;8
+>ef61  23                                         .byte $23               ;9
+>ef62  02                                         .byte $02               ;A
+>ef63  49                                         .byte $49               ;B
+>ef64  3b                                         .byte $3B               ;C
+>ef65  23                                         .byte $23               ;D
+>ef66  02                                         .byte $02               ;E
+>ef67  42                                         .byte $42               ;F
+>ef68  09                                         .byte $09               ;10
+>ef69  23                                         .byte $23               ;11
+>ef6a  23                                         .byte $23               ;12
+>ef6b  49                                         .byte $49               ;13
+>ef6c  3a                                         .byte $3A               ;14
+>ef6d  23                                         .byte $23               ;15
+>ef6e  02                                         .byte $02               ;16
+>ef6f  44                                         .byte $44               ;17
+>ef70  0e                                         .byte $0E               ;18
+>ef71  23                                         .byte $23               ;19
+>ef72  19                                         .byte $19               ;1A
+>ef73  49                                         .byte $49               ;1B
+>ef74  3a                                         .byte $3A               ;1C
+>ef75  23                                         .byte $23               ;1D
+>ef76  02                                         .byte $02               ;1E
+>ef77  42                                         .byte $42               ;1F
+>ef78  1d                                         .byte $1D               ;20
+>ef79  01                                         .byte $01               ;21
+>ef7a  49                                         .byte $49               ;22
+>ef7b  49                                         .byte $49               ;23
+>ef7c  06                                         .byte $06               ;24
+>ef7d  01                                         .byte $01               ;25
+>ef7e  2c                                         .byte $2C               ;26
+>ef7f  44                                         .byte $44               ;27
+>ef80  29                                         .byte $29               ;28
+>ef81  01                                         .byte $01               ;29
+>ef82  2c                                         .byte $2C               ;2A
+>ef83  49                                         .byte $49               ;2B
+>ef84  06                                         .byte $06               ;2C
+>ef85  01                                         .byte $01               ;2D
+>ef86  2c                                         .byte $2C               ;2E
+>ef87  42                                         .byte $42               ;2F
+>ef88  07                                         .byte $07               ;30
+>ef89  01                                         .byte $01               ;31
+>ef8a  01                                         .byte $01               ;32
+>ef8b  49                                         .byte $49               ;33
+>ef8c  06                                         .byte $06               ;34
+>ef8d  01                                         .byte $01               ;35
+>ef8e  2c                                         .byte $2C               ;36
+>ef8f  44                                         .byte $44               ;37
+>ef90  31                                         .byte $31               ;38
+>ef91  01                                         .byte $01               ;39
+>ef92  15                                         .byte $15               ;3A
+>ef93  49                                         .byte $49               ;3B
+>ef94  06                                         .byte $06               ;3C
+>ef95  01                                         .byte $01               ;3D
+>ef96  2c                                         .byte $2C               ;3E
+>ef97  42                                         .byte $42               ;3F
+>ef98  2e                                         .byte $2E               ;40
+>ef99  18                                         .byte $18               ;41
+>ef9a  49                                         .byte $49               ;42
+>ef9b  49                                         .byte $49               ;43
+>ef9c  49                                         .byte $49               ;44
+>ef9d  18                                         .byte $18               ;45
+>ef9e  21                                         .byte $21               ;46
+>ef9f  44                                         .byte $44               ;47
+>efa0  24                                         .byte $24               ;48
+>efa1  18                                         .byte $18               ;49
+>efa2  21                                         .byte $21               ;4A
+>efa3  49                                         .byte $49               ;4B
+>efa4  1c                                         .byte $1C               ;4C
+>efa5  18                                         .byte $18               ;4D
+>efa6  21                                         .byte $21               ;4E
+>efa7  42                                         .byte $42               ;4F
+>efa8  0c                                         .byte $0C               ;50
+>efa9  18                                         .byte $18               ;51
+>efaa  18                                         .byte $18               ;52
+>efab  49                                         .byte $49               ;53
+>efac  49                                         .byte $49               ;54
+>efad  18                                         .byte $18               ;55
+>efae  21                                         .byte $21               ;56
+>efaf  44                                         .byte $44               ;57
+>efb0  10                                         .byte $10               ;58
+>efb1  18                                         .byte $18               ;59
+>efb2  27                                         .byte $27               ;5A
+>efb3  49                                         .byte $49               ;5B
+>efb4  49                                         .byte $49               ;5C
+>efb5  18                                         .byte $18               ;5D
+>efb6  21                                         .byte $21               ;5E
+>efb7  42                                         .byte $42               ;5F
+>efb8  2f                                         .byte $2F               ;60
+>efb9  00                                         .byte $00               ;61
+>efba  49                                         .byte $49               ;62
+>efbb  49                                         .byte $49               ;63
+>efbc  37                                         .byte $37               ;64
+>efbd  00                                         .byte $00               ;65
+>efbe  2d                                         .byte $2D               ;66
+>efbf  44                                         .byte $44               ;67
+>efc0  28                                         .byte $28               ;68
+>efc1  00                                         .byte $00               ;69
+>efc2  2d                                         .byte $2D               ;6A
+>efc3  49                                         .byte $49               ;6B
+>efc4  1c                                         .byte $1C               ;6C
+>efc5  00                                         .byte $00               ;6D
+>efc6  2d                                         .byte $2D               ;6E
+>efc7  42                                         .byte $42               ;6F
+>efc8  0d                                         .byte $0D               ;70
+>efc9  00                                         .byte $00               ;71
+>efca  00                                         .byte $00               ;72
+>efcb  49                                         .byte $49               ;73
+>efcc  37                                         .byte $37               ;74
+>efcd  00                                         .byte $00               ;75
+>efce  2d                                         .byte $2D               ;76
+>efcf  44                                         .byte $44               ;77
+>efd0  33                                         .byte $33               ;78
+>efd1  00                                         .byte $00               ;79
+>efd2  2b                                         .byte $2B               ;7A
+>efd3  49                                         .byte $49               ;7B
+>efd4  1c                                         .byte $1C               ;7C
+>efd5  00                                         .byte $00               ;7D
+>efd6  2d                                         .byte $2D               ;7E
+>efd7  42                                         .byte $42               ;7F
+>efd8  0a                                         .byte $0A               ;80
+>efd9  34                                         .byte $34               ;81
+>efda  49                                         .byte $49               ;82
+>efdb  49                                         .byte $49               ;83
+>efdc  36                                         .byte $36               ;84
+>efdd  34                                         .byte $34               ;85
+>efde  35                                         .byte $35               ;86
+>efdf  45                                         .byte $45               ;87
+>efe0  17                                         .byte $17               ;88
+>efe1  06                                         .byte $06               ;89
+>efe2  3d                                         .byte $3D               ;8A
+>efe3  49                                         .byte $49               ;8B
+>efe4  36                                         .byte $36               ;8C
+>efe5  34                                         .byte $34               ;8D
+>efe6  35                                         .byte $35               ;8E
+>efe7  43                                         .byte $43               ;8F
+>efe8  03                                         .byte $03               ;90
+>efe9  34                                         .byte $34               ;91
+>efea  34                                         .byte $34               ;92
+>efeb  49                                         .byte $49               ;93
+>efec  36                                         .byte $36               ;94
+>efed  34                                         .byte $34               ;95
+>efee  35                                         .byte $35               ;96
+>efef  45                                         .byte $45               ;97
+>eff0  3f                                         .byte $3F               ;98
+>eff1  34                                         .byte $34               ;99
+>eff2  3e                                         .byte $3E               ;9A
+>eff3  49                                         .byte $49               ;9B
+>eff4  37                                         .byte $37               ;9C
+>eff5  34                                         .byte $34               ;9D
+>eff6  37                                         .byte $37               ;9E
+>eff7  43                                         .byte $43               ;9F
+>eff8  20                                         .byte $20               ;A0
+>eff9  1e                                         .byte $1E               ;A1
+>effa  1f                                         .byte $1F               ;A2
+>effb  49                                         .byte $49               ;A3
+>effc  20                                         .byte $20               ;A4
+>effd  1e                                         .byte $1E               ;A5
+>effe  1f                                         .byte $1F               ;A6
+>efff  45                                         .byte $45               ;A7
+>f000  39                                         .byte $39               ;A8
+>f001  1e                                         .byte $1E               ;A9
+>f002  38                                         .byte $38               ;AA
+>f003  49                                         .byte $49               ;AB
+>f004  20                                         .byte $20               ;AC
+>f005  1e                                         .byte $1E               ;AD
+>f006  1f                                         .byte $1F               ;AE
+>f007  43                                         .byte $43               ;AF
+>f008  04                                         .byte $04               ;B0
+>f009  1e                                         .byte $1E               ;B1
+>f00a  1e                                         .byte $1E               ;B2
+>f00b  49                                         .byte $49               ;B3
+>f00c  20                                         .byte $20               ;B4
+>f00d  1e                                         .byte $1E               ;B5
+>f00e  1f                                         .byte $1F               ;B6
+>f00f  45                                         .byte $45               ;B7
+>f010  11                                         .byte $11               ;B8
+>f011  1e                                         .byte $1E               ;B9
+>f012  3c                                         .byte $3C               ;BA
+>f013  49                                         .byte $49               ;BB
+>f014  20                                         .byte $20               ;BC
+>f015  1e                                         .byte $1E               ;BD
+>f016  1f                                         .byte $1F               ;BE
+>f017  43                                         .byte $43               ;BF
+>f018  14                                         .byte $14               ;C0
+>f019  12                                         .byte $12               ;C1
+>f01a  49                                         .byte $49               ;C2
+>f01b  49                                         .byte $49               ;C3
+>f01c  14                                         .byte $14               ;C4
+>f01d  12                                         .byte $12               ;C5
+>f01e  15                                         .byte $15               ;C6
+>f01f  45                                         .byte $45               ;C7
+>f020  1b                                         .byte $1B               ;C8
+>f021  12                                         .byte $12               ;C9
+>f022  16                                         .byte $16               ;CA
+>f023  40                                         .byte $40               ;CB
+>f024  14                                         .byte $14               ;CC
+>f025  12                                         .byte $12               ;CD
+>f026  15                                         .byte $15               ;CE
+>f027  43                                         .byte $43               ;CF
+>f028  08                                         .byte $08               ;D0
+>f029  12                                         .byte $12               ;D1
+>f02a  12                                         .byte $12               ;D2
+>f02b  49                                         .byte $49               ;D3
+>f02c  49                                         .byte $49               ;D4
+>f02d  12                                         .byte $12               ;D5
+>f02e  15                                         .byte $15               ;D6
+>f02f  45                                         .byte $45               ;D7
+>f030  0f                                         .byte $0F               ;D8
+>f031  12                                         .byte $12               ;D9
+>f032  26                                         .byte $26               ;DA
+>f033  41                                         .byte $41               ;DB
+>f034  49                                         .byte $49               ;DC
+>f035  12                                         .byte $12               ;DD
+>f036  15                                         .byte $15               ;DE
+>f037  43                                         .byte $43               ;DF
+>f038  13                                         .byte $13               ;E0
+>f039  30                                         .byte $30               ;E1
+>f03a  49                                         .byte $49               ;E2
+>f03b  49                                         .byte $49               ;E3
+>f03c  13                                         .byte $13               ;E4
+>f03d  30                                         .byte $30               ;E5
+>f03e  19                                         .byte $19               ;E6
+>f03f  45                                         .byte $45               ;E7
+>f040  1a                                         .byte $1A               ;E8
+>f041  30                                         .byte $30               ;E9
+>f042  22                                         .byte $22               ;EA
+>f043  49                                         .byte $49               ;EB
+>f044  13                                         .byte $13               ;EC
+>f045  30                                         .byte $30               ;ED
+>f046  19                                         .byte $19               ;EE
+>f047  43                                         .byte $43               ;EF
+>f048  05                                         .byte $05               ;F0
+>f049  30                                         .byte $30               ;F1
+>f04a  30                                         .byte $30               ;F2
+>f04b  49                                         .byte $49               ;F3
+>f04c  49                                         .byte $49               ;F4
+>f04d  30                                         .byte $30               ;F5
+>f04e  19                                         .byte $19               ;F6
+>f04f  45                                         .byte $45               ;F7
+>f050  32                                         .byte $32               ;F8
+>f051  30                                         .byte $30               ;F9
+>f052  2a                                         .byte $2A               ;FA
+>f053  49                                         .byte $49               ;FB
+>f054  49                                         .byte $49               ;FC
+>f055  30                                         .byte $30               ;FD
+>f056  19                                         .byte $19               ;FE
+>f057  43                                         .byte $43               ;FF
+>f058  03                          OPCaddmode     .byte $03               ;0   opcode address mode
+>f059  04                                         .byte $04               ;1
+>f05a  03                                         .byte $03               ;2
+>f05b  03                                         .byte $03               ;3
+>f05c  02                                         .byte $02               ;4
+>f05d  02                                         .byte $02               ;5
+>f05e  02                                         .byte $02               ;6
+>f05f  0f                                         .byte $0F               ;7
+>f060  03                                         .byte $03               ;8
+>f061  00                                         .byte $00               ;9
+>f062  03                                         .byte $03               ;A
+>f063  03                                         .byte $03               ;B
+>f064  01                                         .byte $01               ;C
+>f065  01                                         .byte $01               ;D
+>f066  01                                         .byte $01               ;E
+>f067  0e                                         .byte $0E               ;F
+>f068  0a                                         .byte $0A               ;10
+>f069  05                                         .byte $05               ;11
+>f06a  0d                                         .byte $0D               ;12
+>f06b  03                                         .byte $03               ;13
+>f06c  02                                         .byte $02               ;14
+>f06d  06                                         .byte $06               ;15
+>f06e  06                                         .byte $06               ;16
+>f06f  1f                                         .byte $1F               ;17
+>f070  03                                         .byte $03               ;18
+>f071  09                                         .byte $09               ;19
+>f072  03                                         .byte $03               ;1A
+>f073  03                                         .byte $03               ;1B
+>f074  01                                         .byte $01               ;1C
+>f075  08                                         .byte $08               ;1D
+>f076  08                                         .byte $08               ;1E
+>f077  1e                                         .byte $1E               ;1F
+>f078  01                                         .byte $01               ;20
+>f079  04                                         .byte $04               ;21
+>f07a  03                                         .byte $03               ;22
+>f07b  03                                         .byte $03               ;23
+>f07c  02                                         .byte $02               ;24
+>f07d  02                                         .byte $02               ;25
+>f07e  02                                         .byte $02               ;26
+>f07f  2f                                         .byte $2F               ;27
+>f080  03                                         .byte $03               ;28
+>f081  00                                         .byte $00               ;29
+>f082  03                                         .byte $03               ;2A
+>f083  03                                         .byte $03               ;2B
+>f084  01                                         .byte $01               ;2C
+>f085  01                                         .byte $01               ;2D
+>f086  01                                         .byte $01               ;2E
+>f087  2e                                         .byte $2E               ;2F
+>f088  0a                                         .byte $0A               ;30
+>f089  05                                         .byte $05               ;31
+>f08a  0d                                         .byte $0D               ;32
+>f08b  03                                         .byte $03               ;33
+>f08c  06                                         .byte $06               ;34
+>f08d  06                                         .byte $06               ;35
+>f08e  06                                         .byte $06               ;36
+>f08f  3f                                         .byte $3F               ;37
+>f090  03                                         .byte $03               ;38
+>f091  09                                         .byte $09               ;39
+>f092  03                                         .byte $03               ;3A
+>f093  03                                         .byte $03               ;3B
+>f094  08                                         .byte $08               ;3C
+>f095  08                                         .byte $08               ;3D
+>f096  08                                         .byte $08               ;3E
+>f097  3e                                         .byte $3E               ;3F
+>f098  03                                         .byte $03               ;40
+>f099  04                                         .byte $04               ;41
+>f09a  03                                         .byte $03               ;42
+>f09b  03                                         .byte $03               ;43
+>f09c  03                                         .byte $03               ;44
+>f09d  02                                         .byte $02               ;45
+>f09e  02                                         .byte $02               ;46
+>f09f  4f                                         .byte $4F               ;47
+>f0a0  03                                         .byte $03               ;48
+>f0a1  00                                         .byte $00               ;49
+>f0a2  03                                         .byte $03               ;4A
+>f0a3  03                                         .byte $03               ;4B
+>f0a4  01                                         .byte $01               ;4C
+>f0a5  01                                         .byte $01               ;4D
+>f0a6  01                                         .byte $01               ;4E
+>f0a7  4e                                         .byte $4E               ;4F
+>f0a8  0a                                         .byte $0A               ;50
+>f0a9  05                                         .byte $05               ;51
+>f0aa  0d                                         .byte $0D               ;52
+>f0ab  03                                         .byte $03               ;53
+>f0ac  03                                         .byte $03               ;54
+>f0ad  06                                         .byte $06               ;55
+>f0ae  06                                         .byte $06               ;56
+>f0af  5f                                         .byte $5F               ;57
+>f0b0  03                                         .byte $03               ;58
+>f0b1  09                                         .byte $09               ;59
+>f0b2  03                                         .byte $03               ;5A
+>f0b3  03                                         .byte $03               ;5B
+>f0b4  03                                         .byte $03               ;5C
+>f0b5  08                                         .byte $08               ;5D
+>f0b6  08                                         .byte $08               ;5E
+>f0b7  5e                                         .byte $5E               ;5F
+>f0b8  03                                         .byte $03               ;60
+>f0b9  04                                         .byte $04               ;61
+>f0ba  03                                         .byte $03               ;62
+>f0bb  03                                         .byte $03               ;63
+>f0bc  02                                         .byte $02               ;64
+>f0bd  02                                         .byte $02               ;65
+>f0be  02                                         .byte $02               ;66
+>f0bf  6f                                         .byte $6F               ;67
+>f0c0  03                                         .byte $03               ;68
+>f0c1  00                                         .byte $00               ;69
+>f0c2  03                                         .byte $03               ;6A
+>f0c3  03                                         .byte $03               ;6B
+>f0c4  0b                                         .byte $0B               ;6C
+>f0c5  01                                         .byte $01               ;6D
+>f0c6  01                                         .byte $01               ;6E
+>f0c7  6e                                         .byte $6E               ;6F
+>f0c8  0a                                         .byte $0A               ;70
+>f0c9  05                                         .byte $05               ;71
+>f0ca  0d                                         .byte $0D               ;72
+>f0cb  03                                         .byte $03               ;73
+>f0cc  06                                         .byte $06               ;74
+>f0cd  06                                         .byte $06               ;75
+>f0ce  06                                         .byte $06               ;76
+>f0cf  7f                                         .byte $7F               ;77
+>f0d0  03                                         .byte $03               ;78
+>f0d1  09                                         .byte $09               ;79
+>f0d2  03                                         .byte $03               ;7A
+>f0d3  03                                         .byte $03               ;7B
+>f0d4  0c                                         .byte $0C               ;7C
+>f0d5  08                                         .byte $08               ;7D
+>f0d6  08                                         .byte $08               ;7E
+>f0d7  7e                                         .byte $7E               ;7F
+>f0d8  0a                                         .byte $0A               ;80
+>f0d9  04                                         .byte $04               ;81
+>f0da  03                                         .byte $03               ;82
+>f0db  03                                         .byte $03               ;83
+>f0dc  02                                         .byte $02               ;84
+>f0dd  02                                         .byte $02               ;85
+>f0de  02                                         .byte $02               ;86
+>f0df  0f                                         .byte $0F               ;87
+>f0e0  03                                         .byte $03               ;88
+>f0e1  00                                         .byte $00               ;89
+>f0e2  03                                         .byte $03               ;8A
+>f0e3  03                                         .byte $03               ;8B
+>f0e4  01                                         .byte $01               ;8C
+>f0e5  01                                         .byte $01               ;8D
+>f0e6  01                                         .byte $01               ;8E
+>f0e7  0e                                         .byte $0E               ;8F
+>f0e8  0a                                         .byte $0A               ;90
+>f0e9  05                                         .byte $05               ;91
+>f0ea  0d                                         .byte $0D               ;92
+>f0eb  03                                         .byte $03               ;93
+>f0ec  06                                         .byte $06               ;94
+>f0ed  06                                         .byte $06               ;95
+>f0ee  07                                         .byte $07               ;96
+>f0ef  1f                                         .byte $1F               ;97
+>f0f0  03                                         .byte $03               ;98
+>f0f1  09                                         .byte $09               ;99
+>f0f2  03                                         .byte $03               ;9A
+>f0f3  03                                         .byte $03               ;9B
+>f0f4  01                                         .byte $01               ;9C
+>f0f5  08                                         .byte $08               ;9D
+>f0f6  08                                         .byte $08               ;9E
+>f0f7  1e                                         .byte $1E               ;9F
+>f0f8  00                                         .byte $00               ;A0
+>f0f9  04                                         .byte $04               ;A1    changed from 0d to 04
+>f0fa  00                                         .byte $00               ;A2
+>f0fb  03                                         .byte $03               ;A3
+>f0fc  02                                         .byte $02               ;A4
+>f0fd  02                                         .byte $02               ;A5
+>f0fe  02                                         .byte $02               ;A6
+>f0ff  2f                                         .byte $2F               ;A7
+>f100  03                                         .byte $03               ;A8
+>f101  00                                         .byte $00               ;A9
+>f102  03                                         .byte $03               ;AA
+>f103  03                                         .byte $03               ;AB
+>f104  01                                         .byte $01               ;AC
+>f105  01                                         .byte $01               ;AD
+>f106  01                                         .byte $01               ;AE
+>f107  2e                                         .byte $2E               ;AF
+>f108  0a                                         .byte $0A               ;B0
+>f109  05                                         .byte $05               ;B1
+>f10a  0d                                         .byte $0D               ;B2     
+>f10b  03                                         .byte $03               ;B3
+>f10c  06                                         .byte $06               ;B4
+>f10d  06                                         .byte $06               ;B5
+>f10e  07                                         .byte $07               ;B6
+>f10f  3f                                         .byte $3F               ;B7
+>f110  03                                         .byte $03               ;B8
+>f111  09                                         .byte $09               ;B9
+>f112  03                                         .byte $03               ;BA
+>f113  03                                         .byte $03               ;BB
+>f114  08                                         .byte $08               ;BC
+>f115  08                                         .byte $08               ;BD
+>f116  09                                         .byte $09               ;BE
+>f117  3e                                         .byte $3E               ;BF
+>f118  00                                         .byte $00               ;C0
+>f119  04                                         .byte $04               ;C1
+>f11a  03                                         .byte $03               ;C2
+>f11b  03                                         .byte $03               ;C3
+>f11c  02                                         .byte $02               ;C4
+>f11d  02                                         .byte $02               ;C5
+>f11e  02                                         .byte $02               ;C6
+>f11f  4f                                         .byte $4F               ;C7
+>f120  03                                         .byte $03               ;C8
+>f121  00                                         .byte $00               ;C9
+>f122  03                                         .byte $03               ;CA
+>f123  03                                         .byte $03               ;CB
+>f124  01                                         .byte $01               ;CC
+>f125  01                                         .byte $01               ;CD
+>f126  01                                         .byte $01               ;CE
+>f127  4e                                         .byte $4E               ;CF
+>f128  0a                                         .byte $0A               ;D0
+>f129  05                                         .byte $05               ;D1
+>f12a  0d                                         .byte $0D               ;D2
+>f12b  03                                         .byte $03               ;D3
+>f12c  03                                         .byte $03               ;D4
+>f12d  06                                         .byte $06               ;D5
+>f12e  06                                         .byte $06               ;D6
+>f12f  5f                                         .byte $5F               ;D7
+>f130  03                                         .byte $03               ;D8
+>f131  09                                         .byte $09               ;D9
+>f132  03                                         .byte $03               ;DA
+>f133  03                                         .byte $03               ;DB
+>f134  03                                         .byte $03               ;DC
+>f135  08                                         .byte $08               ;DD
+>f136  08                                         .byte $08               ;DE
+>f137  5e                                         .byte $5E               ;DF
+>f138  00                                         .byte $00               ;E0
+>f139  04                                         .byte $04               ;E1
+>f13a  03                                         .byte $03               ;E2
+>f13b  03                                         .byte $03               ;E3
+>f13c  02                                         .byte $02               ;E4
+>f13d  02                                         .byte $02               ;E5
+>f13e  02                                         .byte $02               ;E6
+>f13f  6f                                         .byte $6F               ;E7
+>f140  03                                         .byte $03               ;E8
+>f141  00                                         .byte $00               ;E9
+>f142  03                                         .byte $03               ;EA
+>f143  03                                         .byte $03               ;EB
+>f144  01                                         .byte $01               ;EC
+>f145  01                                         .byte $01               ;ED
+>f146  01                                         .byte $01               ;EE
+>f147  6e                                         .byte $6E               ;EF
+>f148  0a                                         .byte $0A               ;F0
+>f149  05                                         .byte $05               ;F1
+>f14a  0d                                         .byte $0D               ;F2
+>f14b  03                                         .byte $03               ;F3
+>f14c  03                                         .byte $03               ;F4
+>f14d  06                                         .byte $06               ;F5
+>f14e  06                                         .byte $06               ;F6
+>f14f  7f                                         .byte $7F               ;F7
+>f150  03                                         .byte $03               ;F8
+>f151  09                                         .byte $09               ;F9
+>f152  03                                         .byte $03               ;FA
+>f153  03                                         .byte $03               ;FB
+>f154  03                                         .byte $03               ;FC
+>f155  08                                         .byte $08               ;FD
+>f156  08                                         .byte $08               ;FE
+>f157  7e                                         .byte $7E               ;FF
+>f158  02                          ModeByteCnt    .byte $02               ;0  opcode mode byte count
+>f159  03                                         .byte $03               ;1
+>f15a  02                                         .byte $02               ;2
+>f15b  01                                         .byte $01               ;3
+>f15c  02                                         .byte $02               ;4
+>f15d  02                                         .byte $02               ;5
+>f15e  02                                         .byte $02               ;6
+>f15f  02                                         .byte $02               ;7
+>f160  03                                         .byte $03               ;8
+>f161  03                                         .byte $03               ;9
+>f162  02                                         .byte $02               ;A
+>f163  03                                         .byte $03               ;B
+>f164  03                                         .byte $03               ;C
+>f165  02                                         .byte $02               ;D
+>f166  03                                         .byte $03               ;E
+>f167  02                                         .byte $02               ;F 
+>f168  0b eb                       ModeJmpTbl     .word IMM_mode          ;0  Operand print table
+>f16a  51 eb                                      .word ABS_mode          ;1
+>f16c  10 eb                                      .word ZP_mode           ;2
+>f16e  7b eb                                      .word IMPLIED_mode      ;3
+>f170  41 eb                                      .word INDZP_X_mode      ;4
+>f172  4c eb                                      .word INDZP_Y_mode      ;5
+>f174  1c eb                                      .word ZP_X_mode         ;6
+>f176  29 eb                                      .word ZP_Y_mode         ;7
+>f178  5e eb                                      .word ABS_X_mode        ;8
+>f17a  63 eb                                      .word ABS_Y_mode        ;9
+>f17c  9c eb                                      .word REL_mode          ;a
+>f17e  68 eb                                      .word INDABS_mode       ;b
+>f180  70 eb                                      .word INDABSX_mode      ;c
+>f182  36 eb                                      .word INDZP_mode        ;d
+>f184  81 eb                       		   .word BBREL_mode        ;e
+>f186  10 eb                                      .word ZP_mode           ;f  dup of ZP for RMB,SMB cmds
+>f188  28                          Asm_ModeLst    .byte $28               ;0 IMM_mode
+>f189  10                                         .byte $10               ;1 ABS_mode
+>f18a  08                                         .byte $08               ;2 ZP_mode
+>f18b  00                                         .byte $00               ;3 IMPLIED_mode
+>f18c  0e                                         .byte $0E               ;4 INDZP_X_mode
+>f18d  0d                                         .byte $0D               ;5 INDZP_Y_mode
+>f18e  0a                                         .byte $0A               ;6 ZP_X_mode
+>f18f  09                                         .byte $09               ;7 ZP_Y_mode
+>f190  12                                         .byte $12               ;8 ABS_X_mode
+>f191  11                                         .byte $11               ;9 ABS_Y_mode
+>f192  40                                         .byte $40               ;A REL_mode   Never set!!!
+>f193  14                                         .byte $14               ;B INDABS_mode
+>f194  16                                         .byte $16               ;C INDABSX_mode
+>f195  0c                                         .byte $0C               ;D INDZP_mode
+>f196  d0                                         .byte $D0               ;E BBREL_mode
+>f197  88                                         .byte $88               ;F used for RMBx & SMBx 
+>f198  41 44 43                    OPCtxtData     .byte "ADC"             ;0
+>f19b  41 4e 44                                   .byte "AND"             ;1
+>f19e  41 53 4c                                   .byte "ASL"             ;2
+>f1a1  42 43 43                                   .byte "BCC"             ;3
+>f1a4  42 43 53                                   .byte "BCS"             ;4
+>f1a7  42 45 51                                   .byte "BEQ"             ;5
+>f1aa  42 49 54                                   .byte "BIT"             ;6
+>f1ad  42 4d 49                                   .byte "BMI"             ;7
+>f1b0  42 4e 45                                   .byte "BNE"             ;8
+>f1b3  42 50 4c                                   .byte "BPL"             ;9
+>f1b6  42 52 41                                   .byte "BRA"             ;A
+>f1b9  42 52 4b                                   .byte "BRK"             ;B
+>f1bc  42 56 43                                   .byte "BVC"             ;C
+>f1bf  42 56 53                                   .byte "BVS"             ;D
+>f1c2  43 4c 43                                   .byte "CLC"             ;E
+>f1c5  43 4c 44                                   .byte "CLD"             ;F
+>f1c8  43 4c 49                                   .byte "CLI"             ;10
+>f1cb  43 4c 56                                   .byte "CLV"             ;11
+>f1ce  43 4d 50                                   .byte "CMP"             ;12
+>f1d1  43 50 58                                   .byte "CPX"             ;13
+>f1d4  43 50 59                                   .byte "CPY"             ;14
+>f1d7  44 45 43                                   .byte "DEC"             ;15
+>f1da  44 45 58                                   .byte "DEX"             ;16
+>f1dd  44 45 59                                   .byte "DEY"             ;17
+>f1e0  45 4f 52                                   .byte "EOR"             ;18
+>f1e3  49 4e 43                                   .byte "INC"             ;19
+>f1e6  49 4e 58                                   .byte "INX"             ;1A
+>f1e9  49 4e 59                                   .byte "INY"             ;1B
+>f1ec  4a 4d 50                                   .byte "JMP"             ;1C
+>f1ef  4a 53 52                                   .byte "JSR"             ;1D
+>f1f2  4c 44 41                                   .byte "LDA"             ;1E
+>f1f5  4c 44 58                                   .byte "LDX"             ;1F
+>f1f8  4c 44 59                                   .byte "LDY"             ;20
+>f1fb  4c 53 52                                   .byte "LSR"             ;21
+>f1fe  4e 4f 50                                   .byte "NOP"             ;22
+>f201  4f 52 41                                   .byte "ORA"             ;23
+>f204  50 48 41                                   .byte "PHA"             ;24
+>f207  50 48 50                                   .byte "PHP"             ;25
+>f20a  50 48 58                                   .byte "PHX"             ;26
+>f20d  50 48 59                                   .byte "PHY"             ;27
+>f210  50 4c 41                                   .byte "PLA"             ;28
+>f213  50 4c 50                                   .byte "PLP"             ;29
+>f216  50 4c 58                                   .byte "PLX"             ;2A
+>f219  50 4c 59                                   .byte "PLY"             ;2B
+>f21c  52 4f 4c                                   .byte "ROL"             ;2C
+>f21f  52 4f 52                                   .byte "ROR"             ;2D
+>f222  52 54 49                                   .byte "RTI"             ;2E
+>f225  52 54 53                                   .byte "RTS"             ;2F
+>f228  53 42 43                                   .byte "SBC"             ;30
+>f22b  53 45 43                                   .byte "SEC"             ;31
+>f22e  53 45 44                                   .byte "SED"             ;32
+>f231  53 45 49                                   .byte "SEI"             ;33
+>f234  53 54 41                                   .byte "STA"             ;34
+>f237  53 54 58                                   .byte "STX"             ;35
+>f23a  53 54 59                                   .byte "STY"             ;36
+>f23d  53 54 5a                                   .byte "STZ"             ;37
+>f240  54 41 58                                   .byte "TAX"             ;38
+>f243  54 41 59                                   .byte "TAY"             ;39
+>f246  54 52 42                                   .byte "TRB"             ;3A
+>f249  54 53 42                                   .byte "TSB"             ;3B
+>f24c  54 53 58                                   .byte "TSX"             ;3C
+>f24f  54 58 41                                   .byte "TXA"             ;3D
+>f252  54 58 53                                   .byte "TXS"             ;3E
+>f255  54 59 41                                   .byte "TYA"             ;3F
+>f258  57 41 49                                   .byte "WAI"             ;40
+>f25b  53 54 50                                   .byte "STP"             ;41
+>f25e  42 42 52                                   .byte "BBR"             ;42 4Byte Opcodes
+>f261  42 42 53                                   .byte "BBS"             ;43
+>f264  52 4d 42                                   .byte "RMB"             ;44
+>f267  53 4d 42                                   .byte "SMB"             ;45
+>f26a  2e 44 42                                   .byte ".DB"             ;46 define 1 byte for assembler
+>f26d  2e 44 57                                   .byte ".DW"             ;47 define 1 word for assembler
+>f270  2e 44 53                                   .byte ".DS"             ;48 define a string block for assembler
+>f273  3f 3f 3f                                   .byte "???"             ;49 for invalid opcode
+>f276  7e 43 75 72 72 65 6e 74 20 63 6f 6d 6d 61 6e 64 73 20 61 72 65 20 3a 7e  HelpTxt        .byte "~Current commands are :~"
+>f28e  53 79 6e 74 61 78 20 3d 20 7b 7d 20 72 65 71 75 69 72 65 64 2c 20 5b 5d 20 6f 70 74 69 6f 6e 61 6c 2c 20 48 48 48 48 20 68 65 78 20 61 64 64 72 65 73 73 2c 20 44 44 20 68 65 78 20 64 61 74 61 7e                 .byte "Syntax = {} required, [] optional, HHHH hex address, DD hex data~"
+>f2cf  7e                                         .byte "~"
+>f2d0  5b 48 48 48 48 5d 5b 20 48 48 48 48 5d 7b 52 65 74 75 72 6e 7d 20 2d 20 48 65 78 20 64 75 6d 70 20 61 64 64 72 65 73 73 28 73 29 28 75 70 20 74 6f 20 31 36 20 69 66 20 6e 6f 20 61 64 64 72 65 73 73 20 65 6e 74 65 72 65 64 29 7e                 .byte "[HHHH][ HHHH]{Return} - Hex dump address(s)(up to 16 if no address entered)~"
+>f31c  5b 48 48 48 48 5d 7b 2e 48 48 48 48 7d 7b 52 65 74 75 72 6e 7d 20 2d 20 48 65 78 20 64 75 6d 70 20 72 61 6e 67 65 20 6f 66 20 61 64 64 72 65 73 73 65 73 20 28 31 36 20 70 65 72 20 6c 69 6e 65 29 7e                 .byte "[HHHH]{.HHHH}{Return} - Hex dump range of addresses (16 per line)~"
+>f35e  5b 48 48 48 48 5d 7b 3a 44 44 7d 5b 20 44 44 5d 7b 52 65 74 75 72 6e 7d 20 2d 20 43 68 61 6e 67 65 20 64 61 74 61 20 62 79 74 65 73 7e                 .byte "[HHHH]{:DD}[ DD]{Return} - Change data bytes~"
+>f38b  5b 48 48 48 48 5d 7b 47 7d 7b 52 65 74 75 72 6e 7d 20 2d 20 45 78 65 63 75 74 65 20 61 20 70 72 6f 67 72 61 6d 20 28 75 73 65 20 52 54 53 20 74 6f 20 72 65 74 75 72 6e 20 74 6f 20 6d 6f 6e 69 74 6f 72 29 7e                 .byte "[HHHH]{G}{Return} - Execute a program (use RTS to return to monitor)~"
+>f3d0  7b 48 48 48 48 2e 48 48 48 48 3e 48 48 48 48 7b 49 7d 7b 52 65 74 75 72 6e 7d 20 2d 20 6d 6f 76 65 20 72 61 6e 67 65 20 61 74 20 32 6e 64 20 48 48 48 48 20 64 6f 77 6e 20 74 6f 20 31 73 74 20 74 6f 20 33 72 64 20 48 48 48 48 7e                 .byte "{HHHH.HHHH>HHHH{I}{Return} - move range at 2nd HHHH down to 1st to 3rd HHHH~"
+>f41c  5b 48 48 48 48 5d 7b 4c 7d 7b 52 65 74 75 72 6e 7d 20 2d 20 4c 69 73 74 20 28 64 69 73 61 73 73 65 6d 62 6c 65 29 20 32 30 20 6c 69 6e 65 73 20 6f 66 20 70 72 6f 67 72 61 6d 7e                 .byte "[HHHH]{L}{Return} - List (disassemble) 20 lines of program~"
+>f457  5b 48 48 48 48 5d 7b 2e 48 48 48 48 7d 7b 4c 7d 7b 52 65 74 75 72 6e 7d 20 2d 20 44 69 73 73 61 73 73 65 6d 62 6c 65 20 61 20 72 61 6e 67 65 7e                 .byte "[HHHH]{.HHHH}{L}{Return} - Dissassemble a range~"
+>f487  7b 48 48 48 48 2e 48 48 48 48 3e 48 48 48 48 7b 4d 7d 7b 52 65 74 75 72 6e 7d 20 2d 20 4d 6f 76 65 20 72 61 6e 67 65 20 61 74 20 31 73 74 20 48 48 48 48 20 74 68 72 75 20 32 6e 64 20 74 6f 20 33 72 64 20 48 48 48 48 7e                 .byte "{HHHH.HHHH>HHHH{M}{Return} - Move range at 1st HHHH thru 2nd to 3rd HHHH~"
+>f4d0  5b 48 48 48 48 5d 5b 20 48 48 48 48 5d 7b 51 7d 7b 52 65 74 75 72 6e 7d 20 2d 20 54 65 78 74 20 64 75 6d 70 20 61 64 64 72 65 73 73 28 73 29 7e                 .byte "[HHHH][ HHHH]{Q}{Return} - Text dump address(s)~"
+>f500  5b 48 48 48 48 5d 7b 2e 48 48 48 48 7d 7b 51 7d 7b 52 65 74 75 72 6e 7d 20 2d 20 54 65 78 74 20 64 75 6d 70 20 72 61 6e 67 65 20 6f 66 20 61 64 64 72 65 73 73 65 73 20 28 31 36 20 70 65 72 20 6c 69 6e 65 29 7e                 .byte "[HHHH]{.HHHH}{Q}{Return} - Text dump range of addresses (16 per line)~"
+>f546  7b 52 7d 7b 52 65 74 75 72 6e 7d 20 2d 20 50 72 69 6e 74 20 72 65 67 69 73 74 65 72 20 63 6f 6e 74 65 6e 74 73 20 66 72 6f 6d 20 6d 65 6d 6f 72 79 20 6c 6f 63 61 74 69 6f 6e 73 7e                 .byte "{R}{Return} - Print register contents from memory locations~"
+>f582  7b 55 7d 7b 52 65 74 75 72 6e 7d 20 2d 20 55 70 6c 6f 61 64 20 46 69 6c 65 20 28 58 6d 6f 64 65 6d 2f 43 52 43 20 6f 72 20 49 6e 74 65 6c 20 48 65 78 29 7e                 .byte "{U}{Return} - Upload File (Xmodem/CRC or Intel Hex)~"
+>f5b6  7b 56 7d 7b 52 65 74 75 72 6e 7d 20 2d 20 4d 6f 6e 69 74 6f 72 20 56 65 72 73 69 6f 6e 7e                 .byte "{V}{Return} - Monitor Version~"
+>f5d4  7b 48 48 48 48 2e 48 48 48 48 3e 48 48 48 48 7b 57 7d 7b 52 65 74 75 72 6e 7d 20 2d 20 57 72 69 74 65 20 64 61 74 61 20 69 6e 20 52 41 4d 20 74 6f 20 45 45 50 52 4f 4d 7e                 .byte "{HHHH.HHHH>HHHH{W}{Return} - Write data in RAM to EEPROM~"
+>f60d  7b 21 7d 7b 52 65 74 75 72 6e 7d 20 2d 20 45 6e 74 65 72 20 41 73 73 65 6d 62 6c 65 72 7e                 .byte "{!}{Return} - Enter Assembler~"
+>f62b  7b 40 7d 7b 52 65 74 75 72 6e 7d 20 2d 20 43 6f 6c 64 2d 53 74 61 72 74 20 45 6e 68 61 6e 63 65 64 20 42 61 73 69 63 7e                 .byte "{@}{Return} - Cold-Start Enhanced Basic~"
+>f653  7b 23 7d 7b 52 65 74 75 72 6e 7d 20 2d 20 57 61 72 6d 5f 53 74 61 72 74 20 45 6e 68 61 6e 63 65 64 20 42 61 73 69 63 7e                 .byte "{#}{Return} - Warm_Start Enhanced Basic~"
+>f67b  7b 24 7d 7b 52 65 74 75 72 6e 7d 20 2d 20 53 74 61 72 74 20 46 49 47 46 6f 72 74 68 7e                 .byte "{$}{Return} - Start FIGForth~"
+>f698  7b 25 7d 7b 52 65 74 75 72 6e 7d 20 2d 20 53 74 61 72 74 20 4d 69 63 72 6f 43 68 65 73 73 7e                 .byte "{%}{Return} - Start MicroChess~"
+>f6b7  7b 3f 7d 7b 52 65 74 75 72 6e 7d 20 2d 20 50 72 69 6e 74 20 6d 65 6e 75 20 6f 66 20 63 6f 6d 6d 61 6e 64 73 7e 7e                 .byte "{?}{Return} - Print menu of commands~~"
+>f6dd  00                                         .byte $00
+>f6de  7e 43 75 72 72 65 6e 74 20 63 6f 6d 6d 61 6e 64 73 20 61 72 65 20 3a 7e  AsmHelpTxt     .byte "~Current commands are :~"
+>f6f6  53 79 6e 74 61 78 20 3d 20 7b 7d 20 72 65 71 75 69 72 65 64 2c 20 5b 5d 20 6f 70 74 69 6f 6e 61 6c 7e                 .byte "Syntax = {} required, [] optional~"
+>f718  48 48 48 48 3d 68 65 78 20 61 64 64 72 65 73 73 2c 20 4f 50 43 3d 4f 70 63 6f 64 65 2c 20 44 44 3d 68 65 78 20 64 61 74 61 2c 20 27 5f 27 3d 53 70 61 63 65 20 42 61 72 20 6f 72 20 54 61 62 7e                 .byte "HHHH=hex address, OPC=Opcode, DD=hex data, '_'=Space Bar or Tab~"
+>f758  27 24 27 20 53 79 6d 62 6f 6c 73 20 61 72 65 20 6f 70 74 69 6f 6e 61 6c 2c 20 61 6c 6c 20 76 61 6c 75 65 73 20 61 72 65 20 48 45 58 2e 7e                 .byte "'$' Symbols are optional, all values are HEX.~"
+>f786  41 6e 79 20 69 6e 70 75 74 20 61 66 74 65 72 20 61 20 27 73 65 6d 69 2d 63 6f 6c 6f 6e 27 20 69 73 20 69 67 6e 6f 72 65 64 2e 7e                 .byte "Any input after a 'semi-colon' is ignored.~"
+>f7b1  7e                                         .byte "~"
+>f7b2  7b 48 48 48 48 7d 7b 52 65 74 75 72 6e 7d 20 2d 20 53 65 74 20 69 6e 70 75 74 20 61 64 64 72 65 73 73 7e                 .byte "{HHHH}{Return} - Set input address~"
+>f7d5  5b 48 48 48 48 5d 5b 5f 5d 7b 4f 50 43 7d 5b 5f 5d 5b 23 28 24 44 44 5f 48 48 48 48 2c 58 29 2c 59 5d 7b 52 65 74 75 72 6e 7d 20 2d 20 41 73 73 65 6d 62 6c 65 20 6c 69 6e 65 7e                 .byte "[HHHH][_]{OPC}[_][#($DD_HHHH,X),Y]{Return} - Assemble line~"
+>f810  5b 48 48 48 48 5d 7b 4c 7d 7b 52 65 74 75 72 6e 7d 20 2d 20 4c 69 73 74 20 28 64 69 73 61 73 73 65 6d 62 6c 65 29 20 32 30 20 6c 69 6e 65 73 20 6f 66 20 70 72 6f 67 72 61 6d 7e                 .byte "[HHHH]{L}{Return} - List (disassemble) 20 lines of program~"
+>f84b  7b 52 65 74 75 72 6e 7d 20 2d 20 45 78 69 74 20 41 73 73 65 6d 62 6c 65 72 20 62 61 63 6b 20 74 6f 20 4d 6f 6e 69 74 6f 72 7e                 .byte "{Return} - Exit Assembler back to Monitor~"
+>f875  7b 3f 7d 7b 52 65 74 75 72 6e 7d 20 2d 20 50 72 69 6e 74 20 6d 65 6e 75 20 6f 66 20 63 6f 6d 6d 61 6e 64 73 7e 7e                 .byte "{?}{Return} - Print menu of commands~~"
+>f89b  00                                         .byte $00
+>f89c  36 35 43 30 32 20 4d 6f 6e 69 74 6f 72 20 76 35 2e 32 20 28 36 2d 32 38 2d 31 33 29 20 52 65 61 64 79  Porttxt        .byte "65C02 Monitor v5.2 (6-28-13) Ready"
+>f8be  0d 0a                                      .byte  $0d, $0a
+>f8c0  77 69 74 68 20 45 6e 68 61 6e 63 65 64 20 42 61 73 69 63 20 49 6e 74 65 72 70 72 65 74 65 72 20 28 63 29 20 4c 65 65 20 44 61 76 69 73 6f 6e 2c                 .byte "with Enhanced Basic Interpreter (c) Lee Davison," 
+>f8f0  0d 0a                                      .byte  $0d, $0a
+>f8f2  46 49 47 46 6f 72 74 68 2c 20 61 6e 64 20 4d 69 63 72 6f 43 68 65 73 73 20 28 63 29 20 50 65 74 65 72 20 4a 65 6e 6e 69 6e 67 73                 .byte "FIGForth, and MicroChess (c) Peter Jennings" 
+>f91d  0d 0a                                      .byte  $0d, $0a
+>f91f  28 50 72 65 73 73 20 3f 20 66 6f 72 20 68 65 6c 70 29                 .byte "(Press ? for help)"
+>f931  00                                         .byte $00
+.fa00                              crclo
+
+>fa00  00 21 42 63 84 a5 c6 e7 08 29 4a 6b 8c ad ce ef   .byte $00,$21,$42,$63,$84,$A5,$C6,$E7,$08,$29,$4A,$6B,$8C,$AD,$CE,$EF
+>fa10  31 10 73 52 b5 94 f7 d6 39 18 7b 5a bd 9c ff de   .byte $31,$10,$73,$52,$B5,$94,$F7,$D6,$39,$18,$7B,$5A,$BD,$9C,$FF,$DE
+>fa20  62 43 20 01 e6 c7 a4 85 6a 4b 28 09 ee cf ac 8d   .byte $62,$43,$20,$01,$E6,$C7,$A4,$85,$6A,$4B,$28,$09,$EE,$CF,$AC,$8D
+>fa30  53 72 11 30 d7 f6 95 b4 5b 7a 19 38 df fe 9d bc   .byte $53,$72,$11,$30,$D7,$F6,$95,$B4,$5B,$7A,$19,$38,$DF,$FE,$9D,$BC
+>fa40  c4 e5 86 a7 40 61 02 23 cc ed 8e af 48 69 0a 2b   .byte $C4,$E5,$86,$A7,$40,$61,$02,$23,$CC,$ED,$8E,$AF,$48,$69,$0A,$2B
+>fa50  f5 d4 b7 96 71 50 33 12 fd dc bf 9e 79 58 3b 1a   .byte $F5,$D4,$B7,$96,$71,$50,$33,$12,$FD,$DC,$BF,$9E,$79,$58,$3B,$1A
+>fa60  a6 87 e4 c5 22 03 60 41 ae 8f ec cd 2a 0b 68 49   .byte $A6,$87,$E4,$C5,$22,$03,$60,$41,$AE,$8F,$EC,$CD,$2A,$0B,$68,$49
+>fa70  97 b6 d5 f4 13 32 51 70 9f be dd fc 1b 3a 59 78   .byte $97,$B6,$D5,$F4,$13,$32,$51,$70,$9F,$BE,$DD,$FC,$1B,$3A,$59,$78
+>fa80  88 a9 ca eb 0c 2d 4e 6f 80 a1 c2 e3 04 25 46 67   .byte $88,$A9,$CA,$EB,$0C,$2D,$4E,$6F,$80,$A1,$C2,$E3,$04,$25,$46,$67
+>fa90  b9 98 fb da 3d 1c 7f 5e b1 90 f3 d2 35 14 77 56   .byte $B9,$98,$FB,$DA,$3D,$1C,$7F,$5E,$B1,$90,$F3,$D2,$35,$14,$77,$56
+>faa0  ea cb a8 89 6e 4f 2c 0d e2 c3 a0 81 66 47 24 05   .byte $EA,$CB,$A8,$89,$6E,$4F,$2C,$0D,$E2,$C3,$A0,$81,$66,$47,$24,$05
+>fab0  db fa 99 b8 5f 7e 1d 3c d3 f2 91 b0 57 76 15 34   .byte $DB,$FA,$99,$B8,$5F,$7E,$1D,$3C,$D3,$F2,$91,$B0,$57,$76,$15,$34
+>fac0  4c 6d 0e 2f c8 e9 8a ab 44 65 06 27 c0 e1 82 a3   .byte $4C,$6D,$0E,$2F,$C8,$E9,$8A,$AB,$44,$65,$06,$27,$C0,$E1,$82,$A3
+>fad0  7d 5c 3f 1e f9 d8 bb 9a 75 54 37 16 f1 d0 b3 92   .byte $7D,$5C,$3F,$1E,$F9,$D8,$BB,$9A,$75,$54,$37,$16,$F1,$D0,$B3,$92
+>fae0  2e 0f 6c 4d aa 8b e8 c9 26 07 64 45 a2 83 e0 c1   .byte $2E,$0F,$6C,$4D,$AA,$8B,$E8,$C9,$26,$07,$64,$45,$A2,$83,$E0,$C1
+>faf0  1f 3e 5d 7c 9b ba d9 f8 17 36 55 74 93 b2 d1 f0   .byte $1F,$3E,$5D,$7C,$9B,$BA,$D9,$F8,$17,$36,$55,$74,$93,$B2,$D1,$F0 
+.fb00                              crchi
+
+>fb00  00 10 20 30 40 50 60 70 81 91 a1 b1 c1 d1 e1 f1   .byte $00,$10,$20,$30,$40,$50,$60,$70,$81,$91,$A1,$B1,$C1,$D1,$E1,$F1
+>fb10  12 02 32 22 52 42 72 62 93 83 b3 a3 d3 c3 f3 e3   .byte $12,$02,$32,$22,$52,$42,$72,$62,$93,$83,$B3,$A3,$D3,$C3,$F3,$E3
+>fb20  24 34 04 14 64 74 44 54 a5 b5 85 95 e5 f5 c5 d5   .byte $24,$34,$04,$14,$64,$74,$44,$54,$A5,$B5,$85,$95,$E5,$F5,$C5,$D5
+>fb30  36 26 16 06 76 66 56 46 b7 a7 97 87 f7 e7 d7 c7   .byte $36,$26,$16,$06,$76,$66,$56,$46,$B7,$A7,$97,$87,$F7,$E7,$D7,$C7
+>fb40  48 58 68 78 08 18 28 38 c9 d9 e9 f9 89 99 a9 b9   .byte $48,$58,$68,$78,$08,$18,$28,$38,$C9,$D9,$E9,$F9,$89,$99,$A9,$B9
+>fb50  5a 4a 7a 6a 1a 0a 3a 2a db cb fb eb 9b 8b bb ab   .byte $5A,$4A,$7A,$6A,$1A,$0A,$3A,$2A,$DB,$CB,$FB,$EB,$9B,$8B,$BB,$AB
+>fb60  6c 7c 4c 5c 2c 3c 0c 1c ed fd cd dd ad bd 8d 9d   .byte $6C,$7C,$4C,$5C,$2C,$3C,$0C,$1C,$ED,$FD,$CD,$DD,$AD,$BD,$8D,$9D
+>fb70  7e 6e 5e 4e 3e 2e 1e 0e ff ef df cf bf af 9f 8f   .byte $7E,$6E,$5E,$4E,$3E,$2E,$1E,$0E,$FF,$EF,$DF,$CF,$BF,$AF,$9F,$8F
+>fb80  91 81 b1 a1 d1 c1 f1 e1 10 00 30 20 50 40 70 60   .byte $91,$81,$B1,$A1,$D1,$C1,$F1,$E1,$10,$00,$30,$20,$50,$40,$70,$60
+>fb90  83 93 a3 b3 c3 d3 e3 f3 02 12 22 32 42 52 62 72   .byte $83,$93,$A3,$B3,$C3,$D3,$E3,$F3,$02,$12,$22,$32,$42,$52,$62,$72
+>fba0  b5 a5 95 85 f5 e5 d5 c5 34 24 14 04 74 64 54 44   .byte $B5,$A5,$95,$85,$F5,$E5,$D5,$C5,$34,$24,$14,$04,$74,$64,$54,$44
+>fbb0  a7 b7 87 97 e7 f7 c7 d7 26 36 06 16 66 76 46 56   .byte $A7,$B7,$87,$97,$E7,$F7,$C7,$D7,$26,$36,$06,$16,$66,$76,$46,$56
+>fbc0  d9 c9 f9 e9 99 89 b9 a9 58 48 78 68 18 08 38 28   .byte $D9,$C9,$F9,$E9,$99,$89,$B9,$A9,$58,$48,$78,$68,$18,$08,$38,$28
+>fbd0  cb db eb fb 8b 9b ab bb 4a 5a 6a 7a 0a 1a 2a 3a   .byte $CB,$DB,$EB,$FB,$8B,$9B,$AB,$BB,$4A,$5A,$6A,$7A,$0A,$1A,$2A,$3A
+>fbe0  fd ed dd cd bd ad 9d 8d 7c 6c 5c 4c 3c 2c 1c 0c   .byte $FD,$ED,$DD,$CD,$BD,$AD,$9D,$8D,$7C,$6C,$5C,$4C,$3C,$2C,$1C,$0C
+>fbf0  ef ff cf df af bf 8f 9f 6e 7e 4e 5e 2e 3e 0e 1e   .byte $EF,$FF,$CF,$DF,$AF,$BF,$8F,$9F,$6E,$7E,$4E,$5E,$2E,$3E,$0E,$1E 
+
+.fc00  20 fc fc   jsr $fcfc        XModem		jsr   	prtMsg		; send prompt and info
+.fc03  a9 01      lda #$01         		lda   	#$01
+.fc05  85 3c      sta $3c          		sta	blkno		; set block # to 1
+.fc07  85 3f      sta $3f          		sta	bflag		; set flag to get address from block 1
+.fc09  a9 43      lda #$43         StartCrc	lda	#"C"		; "C" start with CRC mode
+.fc0b  20 fb e7   jsr $e7fb        		jsr	output		; send it
+.fc0e  a9 ff      lda #$ff         		lda	#$FF	
+.fc10  85 3e      sta $3e          		sta	retry2		; set loop counter for ~3 sec delay
+.fc12  a9 00      lda #$00         		lda   	#$00
+.fc14  85 38      sta $38                          sta	crc
+.fc16  85 39      sta $39          		sta	crch		; init CRC value	
+.fc18  20 e9 fc   jsr $fce9        		jsr	GetByte		; wait for input
+.fc1b  b0 11      bcs $fc2e                        bcs     GotByte         ; byte received, process it
+.fc1d  90 ea      bcc $fc09        		bcc	StartCrc	; resend "C"
+.fc1f  a9 ff      lda #$ff         StartBlk	lda	#$FF		; 
+.fc21  85 3e      sta $3e          		sta	retry2		; set loop counter for ~3 sec delay
+.fc23  a9 00      lda #$00         		lda   	#$00		;
+.fc25  85 38      sta $38          		sta	crc		;
+.fc27  85 39      sta $39          		sta	crch		; init CRC value	
+.fc29  20 e9 fc   jsr $fce9        		jsr	GetByte		; get first byte of block
+.fc2c  90 f1      bcc $fc1f        		bcc	StartBlk	; timed out, keep waiting...
+.fc2e  c9 1b      cmp #$1b         GotByte         cmp     #ESC            ; quitting?
+.fc30  d0 01      bne $fc33                        bne     GotByte3
+.fc32  00         brk                              brk
+.fc33  c9 01      cmp #$01         GotByte3        cmp     #SOH            ; start of block?
+.fc35  f0 0e      beq $fc45        		beq	BegBlk		; yes
+.fc37  c9 3a      cmp #$3a         		cmp	#":"		; Intel-Hex format - jump to its handler below
+.fc39  d0 03      bne $fc3e        		bne	GotByte1	; 
+.fc3b  4c 5a fd   jmp $fd5a        		jmp	HexUpLd		; 
+.fc3e  c9 04      cmp #$04         GotByte1	cmp	#EOT		;
+.fc40  d0 59      bne $fc9b        		bne	BadCrc		; Not SOH, ":", EOT, so flush buffer & send NAK	
+.fc42  4c dc fc   jmp $fcdc        		jmp	Done		; EOT - all done!
+.fc45  a2 00      ldx #$00         BegBlk		ldx	#$00
+.fc47  a9 ff      lda #$ff         GetBlk		lda	#$ff		; 3 sec window to receive characters
+.fc49  85 3e      sta $3e          		sta 	retry2		;
+.fc4b  20 e9 fc   jsr $fce9        GetBlk1		jsr	GetByte		; get next character
+.fc4e  90 4b      bcc $fc9b        		bcc	BadCrc		; chr rcv error, flush and send NAK
+.fc50  9d 00 03   sta $0300,x      GetBlk2		sta	Rbuff,x		; good char, save it in the rcv buffer
+.fc53  e8         inx              		inx			; inc buffer pointer	
+.fc54  e0 84      cpx #$84         		cpx	#$84		; <01> <FE> <128 bytes> <CRCH> <CRCL>
+.fc56  d0 ef      bne $fc47        		bne	GetBlk		; get 132 characters
+.fc58  a2 00      ldx #$00         		ldx	#$00		;
+.fc5a  bd 00 03   lda $0300,x      		lda	Rbuff,x		; get block # from buffer
+.fc5d  c5 3c      cmp $3c          		cmp	blkno		; compare to expected block #	
+.fc5f  f0 0b      beq $fc6c        		beq	GoodBlk1	; matched!
+.fc61  a9 fe      lda #$fe         		lda	#>MsgCrcBadBlkno
+.fc63  a2 45      ldx #$45         		ldx	#<MsgCrcBadBlkno
+.fc65  20 30 fe   jsr $fe30        		jsr	PrintStrAX	; Unexpected block number - abort	
+.fc68  20 40 fd   jsr $fd40        		jsr	Flush		; mismatched - flush buffer and then do BRK
+.fc6b  00         brk              		brk			; unexpected block # - fatal error
+.fc6c  49 ff      eor #$ff         GoodBlk1	eor	#$ff		; 1's comp of block #
+.fc6e  e8         inx              		inx			;
+.fc6f  dd 00 03   cmp $0300,x      		cmp	Rbuff,x		; compare with expected 1's comp of block #
+.fc72  f0 0b      beq $fc7f        		beq	GoodBlk2 	; matched!
+.fc74  a9 fe      lda #$fe         		lda	#>MsgCrcBadBlkno
+.fc76  a2 45      ldx #$45         		ldx	#<MsgCrcBadBlkno
+.fc78  20 30 fe   jsr $fe30        		jsr	PrintStrAX	; Unexpected block number - abort	
+.fc7b  20 40 fd   jsr $fd40        		jsr 	Flush		; mismatched - flush buffer and then do BRK
+.fc7e  00         brk              		brk			; bad 1's comp of block#	
+.fc7f  a0 02      ldy #$02         GoodBlk2	ldy	#$02		; 
+.fc81  b9 00 03   lda $0300,y      CalcCrc		lda	Rbuff,y		; calculate the CRC for the 128 bytes of data	
+.fc84  20 4a fd   jsr $fd4a        		jsr	UpdCrc		; could inline sub here for speed
+.fc87  c8         iny              		iny			;
+.fc88  c0 82      cpy #$82         		cpy	#$82		; 128 bytes
+.fc8a  d0 f5      bne $fc81        		bne	CalcCrc		;
+.fc8c  b9 00 03   lda $0300,y      		lda	Rbuff,y		; get hi CRC from buffer
+.fc8f  c5 39      cmp $39          		cmp	crch		; compare to calculated hi CRC
+.fc91  d0 08      bne $fc9b        		bne	BadCrc		; bad crc, send NAK
+.fc93  c8         iny              		iny			;
+.fc94  b9 00 03   lda $0300,y      		lda	Rbuff,y		; get lo CRC from buffer
+.fc97  c5 38      cmp $38          		cmp	crc		; compare to calculated lo CRC
+.fc99  f0 0b      beq $fca6        		beq	GoodCrc		; good CRC
+.fc9b  20 40 fd   jsr $fd40        BadCrc		jsr	Flush		; flush the input port
+.fc9e  a9 15      lda #$15         		lda	#NAK		;
+.fca0  20 fb e7   jsr $e7fb        		jsr	output		; send NAK to resend block
+.fca3  4c 1f fc   jmp $fc1f        		jmp	StartBlk	; start over, get the block again			
+.fca6  a2 02      ldx #$02         GoodCrc		ldx	#$02		;
+.fca8  a5 3c      lda $3c          		lda	blkno		; get the block number
+.fcaa  c9 01      cmp #$01         		cmp	#$01		; 1st block?
+.fcac  d0 12      bne $fcc0        		bne	CopyBlk		; no, copy all 128 bytes
+.fcae  a5 3f      lda $3f          		lda	bflag		; is it really block 1, not block 257, 513 etc.
+.fcb0  f0 0e      beq $fcc0        		beq	CopyBlk		; no, copy all 128 bytes
+.fcb2  bd 00 03   lda $0300,x      		lda	Rbuff,x		; get target address from 1st 2 bytes of blk 1
+.fcb5  85 3a      sta $3a          		sta	ptr		; save lo address
+.fcb7  e8         inx              		inx			;
+.fcb8  bd 00 03   lda $0300,x      		lda	Rbuff,x		; get hi address
+.fcbb  85 3b      sta $3b          		sta	ptr+1		; save it
+.fcbd  e8         inx              		inx			; point to first byte of data
+.fcbe  c6 3f      dec $3f          		dec	bflag		; set the flag so we won't get another address		
+.fcc0  a0 00      ldy #$00         CopyBlk		ldy	#$00		; set offset to zero
+.fcc2  bd 00 03   lda $0300,x      CopyBlk3	lda	Rbuff,x		; get data byte from buffer
+.fcc5  91 3a      sta ($3a),y      		sta	(ptr),y		; save to target
+.fcc7  e6 3a      inc $3a          		inc	ptr		; point to next address
+.fcc9  d0 02      bne $fccd        		bne	CopyBlk4	; did it step over page boundry?
+.fccb  e6 3b      inc $3b          		inc	ptr+1		; adjust high address for page crossing
+.fccd  e8         inx              CopyBlk4	inx			; point to next data byte
+.fcce  e0 82      cpx #$82         		cpx	#$82		; is it the last byte
+.fcd0  d0 f0      bne $fcc2        		bne	CopyBlk3	; no, get the next one
+.fcd2  e6 3c      inc $3c          IncBlk		inc	blkno		; done.  Inc the block #
+.fcd4  a9 06      lda #$06         		lda	#ACK		; send ACK
+.fcd6  20 fb e7   jsr $e7fb        		jsr	output
+.fcd9  4c 1f fc   jmp $fc1f        		jmp	StartBlk	; get next block
+.fcdc  a9 06      lda #$06         Done		lda	#ACK		; last block, send ACK and exit.
+.fcde  20 fb e7   jsr $e7fb        		jsr	output
+.fce1  a9 fe      lda #$fe         		lda	#>MsgCrcDone
+.fce3  a2 75      ldx #$75         		ldx	#<MsgCrcDone
+.fce5  20 30 fe   jsr $fe30        		jsr	PrintStrAX	;
+.fce8  60         rts              		rts			;
+.fce9  a9 00      lda #$00         GetByte		lda	#$00		; wait for chr input and cycle timing loop
+.fceb  85 3d      sta $3d          		sta	retry		; set low value of timing loop
+.fced  20 f8 e7   jsr $e7f8        StartCrcLp	jsr	Scan_Input	; get chr from serial port, don't wait 
+.fcf0  b0 09      bcs $fcfb        		bcs	GetByte1	; got one, so exit
+.fcf2  c6 3d      dec $3d          		dec   	retry		; no character received, so dec counter
+.fcf4  d0 f7      bne $fced        		bne	StartCrcLp	;
+.fcf6  c6 3e      dec $3e          		dec	retry2		; dec hi byte of counter
+.fcf8  d0 f3      bne $fced        		bne	StartCrcLp	; look for character again
+.fcfa  18         clc              		clc			; if loop times out, CLC, else SEC and return
+.fcfb  60         rts              GetByte1	rts			; with character in "A"
+.fcfc  a2 00      ldx #$00         PrtMsg		ldx	#$00		; PRINT starting message
+.fcfe  bd 0b fd   lda $fd0b,x      PrtMsg1		lda   	Msg,x
+.fd01  f0 07      beq $fd0a        		beq	PrtMsg2
+.fd03  20 fb e7   jsr $e7fb        		jsr   	output
+.fd06  e8         inx              		inx
+.fd07  4c fe fc   jmp $fcfe                        jmp     PrtMsg1
+.fd0a  60         rts              PrtMsg2		rts
+
+>fd0b  42 65 67 69 6e 20 58 4d 4f 44 45 4d 2f 43 52 43 20 74 72 61 6e 73 66 65 72 2e  Msg             .byte   "Begin XMODEM/CRC transfer."
+>fd25  0d 0a                                       .byte   CRN,LF
+>fd27  50 72 65 73 73 20 3c 45 73 63 3e 20 74 6f 20 61 62 6f 72 74 2e 2e 2e 20                  .byte   "Press <Esc> to abort... "
+>fd3f  00                                          .byte   0
+
+.fd40  a9 70      lda #$70         Flush		lda	#$70		; flush receive buffer
+.fd42  85 3e      sta $3e          		sta	retry2		; flush until empty for ~1 sec.
+.fd44  20 e9 fc   jsr $fce9        Flush1		jsr	GetByte		; read the port
+.fd47  b0 f7      bcs $fd40        		bcs	Flush
+.fd49  60         rts              		rts	
+.fd4a  45 39      eor $39          UpdCrc		eor 	crc+1 		; Quick CRC computation with lookup tables
+.fd4c  aa         tax                       	tax		 
+.fd4d  a5 38      lda $38                   	lda 	crc
+.fd4f  5d 00 fb   eor $fb00,x               	eor 	CRCHI,X
+.fd52  85 39      sta $39                   	sta 	crc+1
+.fd54  bd 00 fa   lda $fa00,x               	lda 	CRCLO,X
+.fd57  85 38      sta $38                   	sta 	crc
+.fd59  60         rts                       	rts
+.fd5a  a9 0d      lda #$0d         HexUpLd 	lda     #CRN
+.fd5c  20 fb e7   jsr $e7fb        		jsr	output
+.fd5f  a9 0a      lda #$0a         		lda	#LF
+.fd61  20 fb e7   jsr $e7fb        		jsr	output
+.fd64  a9 00      lda #$00         		lda    	#0
+.fd66  85 3e      sta $3e                  	sta	dlfail          ;Start by assuming no D/L failure
+.fd68  f0 07      beq $fd71        	  	beq	IHex		
+.fd6a  20 0a fe   jsr $fe0a        HdwRecs 	jsr     GetSer          ; Wait for start of record mark ':'
+.fd6d  c9 3a      cmp #$3a                 	cmp     #":"
+.fd6f  d0 f9      bne $fd6a                	bne     HdwRecs         ; not found yet
+.fd71  20 13 fe   jsr $fe13        IHex    	jsr     GetHex          ; Get the record length
+.fd74  85 39      sta $39                  	sta     reclen          ; save it
+.fd76  85 38      sta $38                 	 	sta     chksum          ; and save first byte of checksum
+.fd78  20 13 fe   jsr $fe13                	jsr     GetHex          ; Get the high part of start address
+.fd7b  85 3c      sta $3c                  	sta     start_hi
+.fd7d  18         clc                      	clc
+.fd7e  65 38      adc $38                  	adc     chksum          ; Add in the checksum       
+.fd80  85 38      sta $38                  	sta     chksum          ; 
+.fd82  20 13 fe   jsr $fe13                	jsr     GetHex          ; Get the low part of the start address
+.fd85  85 3b      sta $3b                  	sta     start_lo
+.fd87  18         clc                      	clc
+.fd88  65 38      adc $38                  	adc     chksum
+.fd8a  85 38      sta $38                  	sta     chksum  
+.fd8c  20 13 fe   jsr $fe13                	jsr     GetHex          ; Get the record type
+.fd8f  85 3d      sta $3d                  	sta     rectype         ; & save it
+.fd91  18         clc                      	clc
+.fd92  65 38      adc $38                  	adc     chksum
+.fd94  85 38      sta $38                  	sta     chksum   
+.fd96  a5 3d      lda $3d                  	lda     rectype
+.fd98  d0 2c      bne $fdc6                	bne     HdEr1           ; end-of-record
+.fd9a  a6 39      ldx $39                  	ldx     reclen          ; number of data bytes to write to memory
+.fd9c  a0 00      ldy #$00                 	ldy     #0              ; start offset at 0
+.fd9e  20 13 fe   jsr $fe13        HdLp1   	jsr     GetHex          ; Get the first/next/last data byte
+.fda1  91 3b      sta ($3b),y              	sta     (start_lo),y    ; Save it to RAM
+.fda3  18         clc                      	clc
+.fda4  65 38      adc $38                  	adc     chksum
+.fda6  85 38      sta $38                  	sta     chksum          ; 
+.fda8  c8         iny                      	iny                     ; update data pointer
+.fda9  ca         dex                      	dex                     ; decrement count
+.fdaa  d0 f2      bne $fd9e                	bne     HdLp1
+.fdac  20 13 fe   jsr $fe13                	jsr     GetHex          ; get the checksum
+.fdaf  18         clc                      	clc
+.fdb0  65 38      adc $38                  	adc     chksum
+.fdb2  d0 08      bne $fdbc                	bne     HdDlF1          ; If failed, report it
+.fdb4  a9 23      lda #$23                 	lda     #"#"            ; Character indicating record OK = '#'
+.fdb6  8d c6 3f   sta $3fc6                	sta	UDR0            ; write it out but don't wait for output 
+.fdb9  4c 6a fd   jmp $fd6a                	jmp     HdwRecs         ; get next record     
+.fdbc  a9 46      lda #$46         HdDlF1  	lda     #"F"            ; Character indicating record failure = 'F'
+.fdbe  85 3e      sta $3e                  	sta     dlfail          ; upload failed if non-zero
+.fdc0  8d c6 3f   sta $3fc6                	sta	UDR0            ; write it to transmit buffer register
+.fdc3  4c 6a fd   jmp $fd6a                	jmp     HdwRecs         ; wait for next record start
+.fdc6  c9 01      cmp #$01         HdEr1   	cmp     #1              ; Check for end-of-record type
+.fdc8  f0 1b      beq $fde5                	beq     HdEr2
+.fdca  a9 fe      lda #$fe         		lda	#>MsgUnknownRecType
+.fdcc  a2 97      ldx #$97         		ldx	#<MsgUnknownRecType
+.fdce  20 30 fe   jsr $fe30                        jsr     PrintStrAX      ; Warn user of unknown record type
+.fdd1  a5 3d      lda $3d          		lda     rectype         ; Get it
+.fdd3  85 3e      sta $3e                  	sta     dlfail          ; non-zero --> upload has failed
+.fdd5  20 60 e7   jsr $e760                	jsr     Print1Byte      ; print it
+.fdd8  a9 0d      lda #$0d         		lda     #CRN		; but we'll let it finish so as not to 
+.fdda  20 fb e7   jsr $e7fb                	jsr     output		; falsely start a new d/l from existing 
+.fddd  a9 0a      lda #$0a                 	lda     #LF		; file that may still be coming in for 
+.fddf  20 fb e7   jsr $e7fb                	jsr     output          ; quite some time yet.
+.fde2  4c 6a fd   jmp $fd6a        		jmp	HdwRecs
+.fde5  20 13 fe   jsr $fe13        HdEr2   	jsr     GetHex          ; get the checksum 
+.fde8  18         clc                      	clc
+.fde9  65 38      adc $38                  	adc     chksum          ; Add previous checksum accumulator value
+.fdeb  f0 07      beq $fdf4                	beq     HdEr3           ; checksum = 0 means we're OK!
+.fded  a9 fe      lda #$fe         		lda	#>MsgBadRecChksum
+.fdef  a2 b1      ldx #$b1         		ldx	#<MsgBadRecChksum
+.fdf1  4c 30 fe   jmp $fe30                        jmp     PrintStrAX
+.fdf4  a5 3e      lda $3e          HdEr3   	lda     dlfail
+.fdf6  f0 07      beq $fdff                	beq     HdErOK
+.fdf8  a9 fe      lda #$fe         		lda	#>MsgUploadFail
+.fdfa  a2 ca      ldx #$ca         		ldx	#<MsgUploadFail
+.fdfc  4c 30 fe   jmp $fe30                        jmp     PrintStrAX
+.fdff  a9 fe      lda #$fe         HdErOK  	lda	#>MsgUploadOK
+.fe01  a2 e7      ldx #$e7         		ldx	#<MsgUploadOK
+.fe03  20 30 fe   jsr $fe30                        jsr     PrintStrAX
+.fe06  20 40 fd   jsr $fd40        	  	jsr     Flush		; flush the input buffer
+.fe09  60         rts              HdErNX  	rts
+.fe0a  20 f8 e7   jsr $e7f8        GetSer  	jsr	scan_input	; get input from Serial Port	    
+.fe0d  c9 1b      cmp #$1b                         cmp     #ESC            ; check for abort 
+.fe0f  d0 01      bne $fe12                	bne     GSerXit         ; return character if not
+.fe11  00         brk                              brk
+.fe12  60         rts              GSerXit 	rts
+.fe13  a9 00      lda #$00         GetHex  	lda     #$00
+.fe15  85 3f      sta $3f          	  	sta     temp
+.fe17  20 20 fe   jsr $fe20                	jsr     GetNibl
+.fe1a  0a         asl                      	asl     a
+.fe1b  0a         asl                      	asl     a
+.fe1c  0a         asl                      	asl     a
+.fe1d  0a         asl                     	 	asl     a       	; This is the upper nibble
+.fe1e  85 3f      sta $3f                  	sta     temp
+.fe20  20 0a fe   jsr $fe0a        GetNibl 	jsr     GetSer
+.fe23  c9 3a      cmp #$3a         	        cmp     #"9"+1  	; See if it's 0-9 or 'A'..'F' (no lowercase yet)
+.fe25  90 02      bcc $fe29               	 	bcc     MkNnh   	; If we borrowed, we lost the carry so 0..9
+.fe27  e9 08      sbc #$08                 	sbc     #7+1    	; Subtract off extra 7 (sbc subtracts off one less)
+.fe29  e9 2f      sbc #$2f         MkNnh   	sbc     #"0"-1  	; subtract off '0' (if carry clear coming in)
+.fe2b  29 0f      and #$0f                 	and     #$0F    	; no upper nibble no matter what
+.fe2d  05 3f      ora $3f                  	ora     temp
+.fe2f  60         rts                      	rts             	; return with the nibble received
+.fe30  85 41      sta $41          PrintStrAX      sta     strptr+1
+.fe32  86 40      stx $40          		stx	strptr
+.fe34  98         tya              		tya
+.fe35  48         pha              		pha
+.fe36  a0 00      ldy #$00         		ldy	#0
+.fe38  b1 40      lda ($40),y      PrintStrAXL1    lda     (strptr),y
+.fe3a  f0 06      beq $fe42                        beq     PrintStrAXX1      ; quit if NULL
+.fe3c  20 fb e7   jsr $e7fb            		jsr	output
+.fe3f  c8         iny              		iny
+.fe40  d0 f6      bne $fe38                        bne     PrintStrAXL1      ; quit if > 255
+.fe42  68         pla              PrintStrAXX1    pla
+.fe43  a8         tay              		tay
+.fe44  60         rts              		rts   
+
+>fe45  0d 0a 0d 0a                 MsgCrcBadBlkno  .byte	CRN,LF,CRN,LF
+>fe49  55 6e 65 78 70 65 63 74 65 64 20 62 6c 6f 63 6b 20 6e 75 6d 62 65 72 20 72 65 63 65 69 76 65 64  		.byte  	"Unexpected block number received"
+>fe69  20 41 62 6f 72 74 69 6e 67   		.byte	" Aborting"
+>fe72  0d 0a                       		.byte 	CRN,LF
+>fe74  00                          		.byte 	0
+>fe75  0d 0a                       MsgCrcDone	.byte 	CRN,LF
+>fe77  58 4d 4f 44 45 4d 2d 43 52 43 20 64 6f 77 6e 6c 6f 61 64 20 69 73 20 63 6f 6d 70 6c 65 74 65                  .byte   "XMODEM-CRC download is complete"
+>fe96  00                          		.byte 	0
+.fe97                              msgunknownrectype
+>fe97  0d 0a 0d 0a                 		.byte   CRN,LF,CRN,LF
+>fe9b  55 6e 6b 6e 6f 77 6e 20 72 65 63 6f 72 64 20 74 79 70 65 20 24        		.byte   "Unknown record type $"
+>feb0  00                          		.byte	0		; null-terminate every string
+>feb1  0d 0a 0d 0a                 MsgBadRecChksum .byte   CRN,LF,CRN,LF
+>feb5  42 61 64 20 72 65 63 6f 72 64 20 63 68 65 63 6b 73 75 6d 21                  .byte   "Bad record checksum!"
+>fec9  00                                  	.byte   0		; Null-terminate  
+>feca  0d 0a 0d 0a                 MsgUploadFail   .byte   CRN,LF,CRN,LF
+>fece  55 70 6c 6f 61 64 20 46 61 69 6c 65 64 0d 0a                  .byte   "Upload Failed",CRN,LF
+>fedd  41 62 6f 72 74 69 6e 67 21                  .byte   "Aborting!"
+>fee6  00                                          .byte   0               ; null-terminate every string or crash'n'burn
+>fee7  0d 0a 0d 0a                 MsgUploadOK	.byte   CRN,LF,CRN,LF
+>feeb  55 70 6c 6f 61 64 20 53 75 63 63 65 73 73 66 75 6c 21                  .byte   "Upload Successful!"
+>fefd  00                                  	.byte   0         	
+
+.ff00  78         sei              Reset          SEI                     ; diable interupts
+.ff01  d8         cld                             CLD                     ; clear decimal mode                      
+.ff02  a2 ff      ldx #$ff                        LDX   #$FF              ;
+.ff04  9a         txs                             TXS                     ; init stack pointer
+.ff05  a2 c7      ldx #$c7         Set_Vectors    LDX   #<Start_OS        ; *** only outside reference in reset routine
+.ff07  a9 e6      lda #$e6                        LDA   #>Start_OS        ; *** points to Monitor Boot routine
+.ff09  8d f8 03   sta $03f8                       sta   RESvector+1       ;
+.ff0c  8e f7 03   stx $03f7                       stx   RESvector         ;
+.ff0f  a2 65      ldx #$65                        LDX   #<INTret          ; set up to point to RTI command 
+.ff11  a9 ff      lda #$ff                        LDA   #>INTret          ; (no system NMI applications)
+.ff13  8d fe 03   sta $03fe                       sta   NMIvector+1       ;
+.ff16  8e fd 03   stx $03fd                       stx   NMIvector         ;
+.ff19  a2 65      ldx #$65                        LDX   #<INTret          ; set up to point to RTI command 
+.ff1b  a9 ff      lda #$ff                        LDA   #>INTret          ; (no system INT applications)
+.ff1d  8d fb 03   sta $03fb                       sta   INTvector+1       ;
+.ff20  8e fa 03   stx $03fa                       stx   INTvector         ;
+.ff23  a2 0c      ldx #$0c                        LDX   #<BRKroutine      ; set up to point to my BRK routine
+.ff25  a9 e8      lda #$e8                        LDA   #>BRKroutine      ; 
+.ff27  8d f5 03   sta $03f5                       sta   BRKvector+1       ;
+.ff2a  8e f4 03   stx $03f4                       stx   BRKvector         ;
+.ff2d  a9 e7      lda #$e7         	       lda   #<ACIA1_Scan
+.ff2f  8d 05 04   sta $0405                       sta   VEC_IN
+.ff32  a9 a4      lda #$a4         		   lda   #>ACIA1_Scan
+.ff34  8d 06 04   sta $0406                       sta   VEC_IN+1
+.ff37  a9 f4      lda #$f4         	         lda   #<ACIA1_Output
+.ff39  8d 07 04   sta $0407                       sta   VEC_OUT
+.ff3c  a9 a4      lda #$a4         		   lda   #>ACIA1_OUTPUT
+.ff3e  8d 08 04   sta $0408                       sta   VEC_OUT+1
+.ff41  a9 59      lda #$59         	         lda   #<Psave
+.ff43  8d 0b 04   sta $040b                       sta   VEC_SV
+.ff46  a9 e6      lda #$e6         	         lda   #>Psave
+.ff48  8d 0c 04   sta $040c                       sta   VEC_SV+1
+.ff4b  a9 82      lda #$82         		   lda   #<pload
+.ff4d  8d 09 04   sta $0409                       sta   VEC_LD
+.ff50  a9 e6      lda #$e6         		   lda   #>pload
+.ff52  8d 0a 04   sta $040a                       sta   VEC_LD+1
+.ff55  20 83 a4   jsr $a483        		   jsr   ACIA1_init	   ; init the I/O devices
+.ff58  a9 00      lda #$00         Clr_regs       lda   #$00              ; Clear registers
+.ff5a  a8         tay                             TAY                     ;
+.ff5b  aa         tax                             TAX                     ;
+.ff5c  18         clc                             CLC                     ; clear flags
+.ff5d  d8         cld                             CLD                     ; clear decimal mode
+.ff5e  58         cli                             CLI                     ; Enable interrupt system
+.ff5f  6c f7 03   jmp ($03f7)                     JMP  (RESvector)        ; Monitor for cold reset                       
+.ff62  6c fd 03   jmp ($03fd)      NMIjump        jmp  (NMIvector)        ;
+.ff65  40         rti              INTret         RTI                     ; Null Interrupt return
+.ff66  da         phx              Interrupt      PHX                     ;
+.ff67  48         pha                             PHA                     ;
+.ff68  ba         tsx                             TSX                     ; get stack pointer
+.ff69  bd 03 01   lda $0103,x                     LDA   $0103,X           ; load INT-P Reg off stack
+.ff6c  29 10      and #$10                        AND   #$10              ; mask BRK
+.ff6e  d0 05      bne $ff75                       BNE   BrkCmd            ; BRK CMD
+.ff70  68         pla                             PLA                     ;
+.ff71  fa         plx                             PLX                     ;
+.ff72  6c fa 03   jmp ($03fa)                     jmp   (INTvector)       ; let user routine have it 
+.ff75  68         pla              BrkCmd         pla                     ;
+.ff76  fa         plx                             plx                     ;
+.ff77  6c f4 03   jmp ($03f4)                     jmp   (BRKvector)       ; patch in user BRK routine
+.ff7a  60         rts              RRTS           rts                     ; documented RTS instruction
+
+>fffa  62 ff                                      .word  NMIjump
+>fffc  00 ff                                      .word  Reset 
+>fffe  66 ff                                      .word  Interrupt
+
+--- end of code ---
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/SBC25.ROM b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/SBC25.ROM
new file mode 100644
index 00000000..ef0941a5
Binary files /dev/null and b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/SBC25.ROM differ
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/SBC2AVR.EXE b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/SBC2AVR.EXE
new file mode 100644
index 00000000..d5b3157b
Binary files /dev/null and b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/SBC2AVR.EXE differ
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/SBCROM.INC b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/SBCROM.INC
new file mode 100644
index 00000000..ec93b06d
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/SBCROM.INC
@@ -0,0 +1,3075 @@
+.CSEG
+IMAGE:
+
+        .db 0x53, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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+        .db 0xA1, 0x20, 0xAD, 0xA2, 0xC9, 0x43, 0xD0, 0x12, 0xA2, 0x1F, 0xBD, 0x26, 0xA4, 0x95, 0x50, 0xCA
+        .db 0x10, 0xF8, 0xA2, 0x1B, 0x86, 0xDC, 0xA9, 0xCC, 0xD0, 0x19, 0xC9, 0x45, 0xD0, 0x0E, 0x20, 0xCB
+        .db 0x9F, 0x38, 0xA9, 0x01, 0xE5, 0xB7, 0x85, 0xB7, 0xA9, 0xEE, 0xD0, 0x07, 0xC9, 0x40, 0xD0, 0x0B
+        .db 0x20, 0xBF, 0xA0, 0x85, 0xFB, 0x85, 0xFA, 0x85, 0xF9, 0xD0, 0xBB, 0xC9, 0x0D, 0xD0, 0x09, 0x20
+        .db 0x65, 0xA0, 0x20, 0x85, 0xA1, 0x4C, 0x07, 0x9F, 0xC9, 0x41, 0xF0, 0x0E, 0xC9, 0x42, 0xD0, 0x07
+        .db 0x20, 0xA3, 0xA1, 0xA9, 0xBB, 0xD0, 0xDC, 0x4C, 0x00, 0x9F, 0x6C, 0xF7, 0x03, 0xA6, 0xB5, 0x30
+        .db 0x59, 0xA5, 0xB0, 0xF0, 0x08, 0xE0, 0x08, 0xD0, 0x04, 0xC5, 0xE6, 0xF0, 0x2E, 0xF6, 0xE3, 0xC9
+        .db 0x01, 0xD0, 0x02, 0xF6, 0xE3, 0x50, 0x1E, 0xA0, 0x0F, 0xA5, 0xB1, 0xD9, 0x60, 0x00, 0xF0, 0x03
+        .db 0x88, 0x10, 0xF8, 0xB9, 0x57, 0xA4, 0xD5, 0xE4, 0x90, 0x04, 0x94, 0xE6, 0x95, 0xE4, 0x18, 0x08
+        .db 0x75, 0xE5, 0x95, 0xE5, 0x28, 0xE0, 0x04, 0xF0, 0x03, 0x30, 0x2E, 0x60, 0xA5, 0xE8, 0x85, 0xDD
+        .db 0xA9, 0x00, 0x85, 0xB5, 0x20, 0x65, 0xA0, 0x20, 0xCB, 0x9F, 0x20, 0x19, 0x9F, 0x20, 0xCB, 0x9F
+        .db 0xA9, 0x08, 0x85, 0xB5, 0x20, 0x4B, 0xA0, 0x4C, 0x1F, 0xA1, 0xE0, 0xF9, 0xD0, 0x0B, 0xA5, 0x60
+        .db 0xC5, 0xB1, 0xD0, 0x04, 0xA9, 0x00, 0x85, 0xB4, 0x60, 0x50, 0xFD, 0xA0, 0x07, 0xA5, 0xB1, 0xD9
+        .db 0x60, 0x00, 0xF0, 0x05, 0x88, 0xF0, 0xF1, 0x10, 0xF6, 0xB9, 0x57, 0xA4, 0xD5, 0xE2, 0x90, 0x02
+        .db 0x95, 0xE2, 0xC6, 0xB5, 0xA9, 0xFB, 0xC5, 0xB5, 0xF0, 0x03, 0x20, 0x3F, 0xA0, 0xE6, 0xB5, 0x60
+        .db 0xC9, 0x08, 0xB0, 0x12, 0x20, 0x0F, 0xA1, 0xA2, 0x1F, 0xB5, 0x50, 0xC5, 0xFA, 0xF0, 0x03, 0xCA
+        .db 0x10, 0xF7, 0x86, 0xFB, 0x86, 0xB0, 0x4C, 0x06, 0x9E, 0xA2, 0x10, 0xA9, 0x00, 0x95, 0xDE, 0xCA
+        .db 0x10, 0xFB, 0xA9, 0x10, 0x85, 0xB0, 0xC6, 0xB0, 0x10, 0x01, 0x60, 0x20, 0x38, 0xA0, 0xA4, 0xB0
+        .db 0xA2, 0x08, 0x86, 0xB6, 0xC0, 0x08, 0x10, 0x41, 0xC0, 0x06, 0x10, 0x2E, 0xC0, 0x04, 0x10, 0x1F
+        .db 0xC0, 0x01, 0xF0, 0x09, 0x10, 0x0E, 0x20, 0xA7, 0x9F, 0xD0, 0xFB, 0xF0, 0xD9, 0x20, 0xB5, 0x9F
+        .db 0xD0, 0xFB, 0xF0, 0xD2, 0xA2, 0x04, 0x86, 0xB6, 0x20, 0xB5, 0x9F, 0xD0, 0xFB, 0xF0, 0xC7, 0x20
+        .db 0xB5, 0x9F, 0xA5, 0xB6, 0xC9, 0x04, 0xD0, 0xF7, 0xF0, 0xBC, 0xA2, 0x10, 0x86, 0xB6, 0x20, 0xA7
+        .db 0x9F, 0xA5, 0xB6, 0xC9, 0x08, 0xD0, 0xF7, 0xF0, 0xAD, 0xA2, 0x06, 0x86, 0xB6, 0x20, 0xE3, 0x9F
+        .db 0x50, 0x05, 0x30, 0x03, 0x20, 0x6D, 0x9E, 0x20, 0x38, 0xA0, 0xC6, 0xB6, 0xA5, 0xB6, 0xC9, 0x05
+        .db 0xF0, 0xEB, 0x20, 0xE3, 0x9F, 0x70, 0x8F, 0x30, 0x8D, 0x20, 0x6D, 0x9E, 0xA5, 0xB1, 0x29, 0xF0
+        .db 0xC9, 0x20, 0xF0, 0xEE, 0x4C, 0x26, 0x9F, 0x20, 0xE3, 0x9F, 0x30, 0x03, 0x20, 0x6D, 0x9E, 0x20
+        .db 0x38, 0xA0, 0xC6, 0xB6, 0x60, 0x20, 0xE3, 0x9F, 0x90, 0x02, 0x50, 0xF9, 0x30, 0x07, 0x08, 0x20
+        .db 0x6D, 0x9E, 0x28, 0x50, 0xF0, 0x20, 0x38, 0xA0, 0xC6, 0xB6, 0x60, 0xA2, 0x0F, 0x38, 0xB4, 0x60
+        .db 0xA9, 0x77, 0xF5, 0x50, 0x95, 0x60, 0x94, 0x50, 0x38, 0xA9, 0x77, 0xF5, 0x50, 0x95, 0x50, 0xCA
+        .db 0x10, 0xEB, 0x60, 0xA5, 0xB1, 0xA6, 0xB6, 0x18, 0x7D, 0x46, 0xA4, 0x85, 0xB1, 0x29, 0x88, 0xD0
+        .db 0x42, 0xA5, 0xB1, 0xA2, 0x20, 0xCA, 0x30, 0x0E, 0xD5, 0x50, 0xD0, 0xF9, 0xE0, 0x10, 0x30, 0x33
+        .db 0xA9, 0x7F, 0x69, 0x01, 0x70, 0x01, 0xB8, 0xA5, 0xB5, 0x30, 0x24, 0xC9, 0x08, 0x10, 0x20, 0x48
+        .db 0x08, 0xA9, 0xF9, 0x85, 0xB5, 0x85, 0xB4, 0x20, 0x65, 0xA0, 0x20, 0xCB, 0x9F, 0x20, 0x22, 0x9F
+        .db 0x20, 0x48, 0xA0, 0x28, 0x68, 0x85, 0xB5, 0xA5, 0xB4, 0x30, 0x04, 0x38, 0xA9, 0xFF, 0x60, 0x18
+        .db 0xA9, 0x00, 0x60, 0xA9, 0xFF, 0x18, 0xB8, 0x60, 0xA6, 0xB0, 0xB5, 0x50, 0x85, 0xB1, 0x60, 0x20
+        .db 0x65, 0xA0, 0x20, 0xCB, 0x9F, 0x20, 0x22, 0x9F, 0x20, 0xCB, 0x9F, 0xBA, 0x86, 0xB3, 0xA6, 0xB2
+        .db 0x9A, 0x68, 0x85, 0xB6, 0x68, 0x85, 0xB0, 0xAA, 0x68, 0x95, 0x50, 0x68, 0xAA, 0x68, 0x85, 0xB1
+        .db 0x95, 0x50, 0x4C, 0x8A, 0xA0, 0xBA, 0x86, 0xB3, 0xA6, 0xB2, 0x9A, 0xA5, 0xB1, 0x48, 0xA8, 0xA2
+        .db 0x1F, 0xD5, 0x50, 0xF0, 0x03, 0xCA, 0x10, 0xF9, 0xA9, 0xCC, 0x95, 0x50, 0x8A, 0x48, 0xA6, 0xB0
+        .db 0xB5, 0x50, 0x94, 0x50, 0x48, 0x8A, 0x48, 0xA5, 0xB6, 0x48, 0xBA, 0x86, 0xB2, 0xA6, 0xB3, 0x9A
+        .db 0x60, 0xA4, 0xE4, 0xEC, 0x57, 0xA4, 0xD0, 0x04, 0xA9, 0x00, 0xF0, 0x0A, 0xA6, 0xE3, 0xD0, 0x06
+        .db 0xA6, 0xEE, 0xD0, 0x02, 0xA9, 0xFF, 0xA2, 0x04, 0x86, 0xB5, 0xC5, 0xFA, 0x90, 0x0C, 0xF0, 0x0A
+        .db 0x85, 0xFA, 0xA5, 0xB0, 0x85, 0xFB, 0xA5, 0xB1, 0x85, 0xF9, 0xA9, 0x2E, 0x4C, 0xF4, 0xA4, 0xA6
+        .db 0xDC, 0x30, 0x1C, 0xA5, 0xF9, 0xDD, 0x67, 0xA4, 0xD0, 0x11, 0xCA, 0xBD, 0x67, 0xA4, 0x85, 0xFB
+        .db 0xCA, 0xBD, 0x67, 0xA4, 0x85, 0xF9, 0xCA, 0x86, 0xDC, 0xD0, 0x1C, 0xA9, 0xFF, 0x85, 0xDC, 0xA2
+        .db 0x0C, 0x86, 0xB5, 0x86, 0xFA, 0xA2, 0x14, 0x20, 0x1B, 0x9F, 0xA2, 0x04, 0x86, 0xB5, 0x20, 0x19
+        .db 0x9F, 0xA6, 0xFA, 0xE0, 0x0F, 0x90, 0x15, 0xA6, 0xFB, 0xB5, 0x50, 0x85, 0xFA, 0x86, 0xB0, 0xA5
+        .db 0xF9, 0x85, 0xB1, 0x20, 0x65, 0xA0, 0x20, 0x85, 0xA1, 0x4C, 0x06, 0x9E, 0xA9, 0xFF, 0x60, 0xA2
+        .db 0x04, 0x06, 0xF9, 0x26, 0xFA, 0xCA, 0xD0, 0xF9, 0x05, 0xF9, 0x85, 0xF9, 0x85, 0xB1, 0x60, 0x18
+        .db 0xA9, 0x80, 0x65, 0xEB, 0x65, 0xEC, 0x65, 0xED, 0x65, 0xE1, 0x65, 0xDF, 0x38, 0xE5, 0xF0, 0xE5
+        .db 0xF1, 0xE5, 0xE2, 0xE5, 0xE0, 0xE5, 0xDE, 0xE5, 0xEF, 0xE5, 0xE3, 0xB0, 0x02, 0xA9, 0x00, 0x4A
+        .db 0x18, 0x69, 0x40, 0x65, 0xEC, 0x65, 0xED, 0x38, 0xE5, 0xE4, 0x4A, 0x18, 0x69, 0x90, 0x65, 0xDD
+        .db 0x65, 0xDD, 0x65, 0xDD, 0x65, 0xDD, 0x65, 0xE1, 0x38, 0xE5, 0xE4, 0xE5, 0xE4, 0xE5, 0xE5, 0xE5
+        .db 0xE5, 0xE5, 0xE0, 0xA6, 0xB1, 0xE0, 0x33, 0xF0, 0x16, 0xE0, 0x34, 0xF0, 0x12, 0xE0, 0x22, 0xF0
+        .db 0x0E, 0xE0, 0x25, 0xF0, 0x0A, 0xA6, 0xB0, 0xF0, 0x09, 0xB4, 0x50, 0xC0, 0x10, 0x10, 0x03, 0x18
+        .db 0x69, 0x02, 0x4C, 0x91, 0xA0, 0xA6, 0xFD, 0xE8, 0xAD, 0xC8, 0x01, 0x9D, 0x00, 0x16, 0xAD, 0xC7
+        .db 0x01, 0x9D, 0x00, 0x17, 0xAD, 0xC6, 0x01, 0x9D, 0x00, 0x18, 0xAD, 0xC5, 0x01, 0x9D, 0x00, 0x19
+        .db 0x86, 0xFD, 0x60, 0xA4, 0xFD, 0xF0, 0x19, 0xB9, 0x00, 0x19, 0x85, 0xB0, 0xAA, 0xB9, 0x00, 0x18
+        .db 0x95, 0x50, 0xB9, 0x00, 0x17, 0xAA, 0xB9, 0x00, 0x16, 0x85, 0xB1, 0x95, 0x50, 0x88, 0x84, 0xFD
+        .db 0x60, 0xA9, 0xB8, 0x85, 0x00, 0xA9, 0xA2, 0x85, 0x01, 0x20, 0x7B, 0xA2, 0x20, 0x9F, 0xA2, 0x20
+        .db 0x86, 0xA2, 0xA0, 0x00, 0x20, 0x3A, 0xA2, 0xA9, 0x7C, 0x20, 0xF4, 0xA4, 0xA2, 0x1F, 0x98, 0xD5
+        .db 0x50, 0xF0, 0x40, 0xCA, 0x10, 0xF8, 0x98, 0x29, 0x01, 0x85, 0xFC, 0x98, 0x4A, 0x4A, 0x4A, 0x4A
+        .db 0x29, 0x01, 0x18, 0x65, 0xFC, 0x29, 0x01, 0xD0, 0x03, 0xA9, 0x2A, 0x2C, 0xA9, 0x20, 0x20, 0xF4
+        .db 0xA4, 0x20, 0xF4, 0xA4, 0xC8, 0x98, 0x29, 0x08, 0xF0, 0xCD, 0xA9, 0x7C, 0x20, 0xF4, 0xA4, 0x20
+        .db 0x98, 0xA2, 0x20, 0x7B, 0xA2, 0x20, 0x3A, 0xA2, 0x18, 0x98, 0x69, 0x08, 0xA8, 0xC0, 0x80, 0xF0
+        .db 0x3E, 0xD0, 0xB4, 0xA5, 0xB7, 0xF0, 0x05, 0xBD, 0xE5, 0xA3, 0xD0, 0x03, 0xBD, 0xD5, 0xA3, 0x20
+        .db 0xF4, 0xA4, 0xBD, 0x05, 0xA4, 0x20, 0xF4, 0xA4, 0xD0, 0xCA, 0x8A, 0x48, 0xA2, 0x19, 0xA9, 0x2D
+        .db 0x20, 0xF4, 0xA4, 0xCA, 0xD0, 0xFA, 0x68, 0xAA, 0xA9, 0x19, 0x85, 0x02, 0xB2, 0x00, 0xE6, 0x00
+        .db 0xD0, 0x02, 0xE6, 0x01, 0x20, 0xF4, 0xA4, 0xC6, 0x02, 0xD0, 0xF1, 0x20, 0x7B, 0xA2, 0x60, 0x20
+        .db 0x86, 0xA2, 0xA5, 0xFB, 0x20, 0x60, 0xE7, 0xA9, 0x20, 0x20, 0xF4, 0xA4, 0xA5, 0xFA, 0x20, 0x60
+        .db 0xE7, 0xA9, 0x20, 0x20, 0xF4, 0xA4, 0xA5, 0xF9, 0x20, 0x60, 0xE7, 0xA9, 0x0D, 0x20, 0xF4, 0xA4
+        .db 0xA9, 0x0A, 0x20, 0xF4, 0xA4, 0x60, 0xA2, 0x00, 0xA9, 0x20, 0x20, 0xF4, 0xA4, 0x8A, 0x20, 0x60
+        .db 0xE7, 0xE8, 0xE0, 0x08, 0xD0, 0xF2, 0xF0, 0xE3, 0x98, 0x29, 0x70, 0x20, 0x60, 0xE7, 0x60, 0xA2
+        .db 0x00, 0xBD, 0x99, 0xA3, 0xF0, 0x06, 0x20, 0xF4, 0xA4, 0xE8, 0xD0, 0xF5, 0x60, 0xA9, 0x3F, 0x20
+        .db 0xF4, 0xA4, 0x20, 0xDC, 0xA4, 0x29, 0x4F, 0x60, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20
+        .db 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20
+        .db 0x20, 0x20, 0x20, 0x20, 0x5B, 0x45, 0x6E, 0x74, 0x65, 0x72, 0x5D, 0x20, 0x2D, 0x20, 0x75, 0x73
+        .db 0x65, 0x72, 0x20, 0x6D, 0x6F, 0x76, 0x65, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x5B
+        .db 0x42, 0x5D, 0x20, 0x2D, 0x20, 0x55, 0x6E, 0x64, 0x6F, 0x20, 0x6D, 0x6F, 0x76, 0x65, 0x20, 0x20
+        .db 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x5B, 0x43, 0x5D, 0x20, 0x2D, 0x20, 0x52, 0x65
+        .db 0x73, 0x65, 0x74, 0x20, 0x42, 0x6F, 0x61, 0x72, 0x64, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20
+        .db 0x20, 0x5B, 0x45, 0x5D, 0x20, 0x2D, 0x20, 0x53, 0x77, 0x61, 0x70, 0x20, 0x53, 0x69, 0x64, 0x65
+        .db 0x73, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x5B, 0x50, 0x5D, 0x20, 0x2D, 0x20
+        .db 0x43, 0x6F, 0x6D, 0x70, 0x75, 0x74, 0x65, 0x72, 0x20, 0x6D, 0x6F, 0x76, 0x65, 0x20, 0x20, 0x20
+        .db 0x20, 0x20, 0x20, 0x5B, 0x51, 0x5D, 0x20, 0x2D, 0x20, 0x71, 0x75, 0x69, 0x74, 0x65, 0x20, 0x67
+        .db 0x61, 0x6D, 0x65, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20
+        .db 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20
+        .db 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20
+        .db 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x4D, 0x69, 0x63, 0x72, 0x6F, 0x43, 0x68
+        .db 0x65, 0x73, 0x73, 0x20, 0x28, 0x63, 0x29, 0x20, 0x31, 0x39, 0x39, 0x36, 0x2D, 0x32, 0x30, 0x30
+        .db 0x32, 0x20, 0x50, 0x65, 0x74, 0x65, 0x72, 0x20, 0x4A, 0x65, 0x6E, 0x6E, 0x69, 0x6E, 0x67, 0x73
+        .db 0x2C, 0x20, 0x70, 0x65, 0x74, 0x65, 0x72, 0x6A, 0x40, 0x62, 0x65, 0x6E, 0x6C, 0x6F, 0x2E, 0x63
+        .db 0x6F, 0x6D, 0x0D, 0x0A, 0x00, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57
+        .db 0x57, 0x57, 0x57, 0x57, 0x57, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42
+        .db 0x42, 0x42, 0x42, 0x42, 0x42, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57
+        .db 0x57, 0x57, 0x57, 0x57, 0x57, 0x4B, 0x51, 0x43, 0x43, 0x42, 0x42, 0x52, 0x52, 0x50, 0x50, 0x50
+        .db 0x50, 0x50, 0x50, 0x50, 0x50, 0x4B, 0x51, 0x43, 0x43, 0x42, 0x42, 0x52, 0x52, 0x50, 0x50, 0x50
+        .db 0x50, 0x50, 0x50, 0x50, 0x50, 0x00, 0x03, 0x04, 0x00, 0x07, 0x02, 0x05, 0x01, 0x06, 0x10, 0x17
+        .db 0x11, 0x16, 0x12, 0x15, 0x14, 0x13, 0x73, 0x74, 0x70, 0x77, 0x72, 0x75, 0x71, 0x76, 0x60, 0x67
+        .db 0x61, 0x66, 0x62, 0x65, 0x64, 0x63, 0x00, 0xF0, 0xFF, 0x01, 0x10, 0x11, 0x0F, 0xEF, 0xF1, 0xDF
+        .db 0xE1, 0xEE, 0xF2, 0x12, 0x0E, 0x1F, 0x21, 0x0B, 0x0A, 0x06, 0x06, 0x04, 0x04, 0x04, 0x04, 0x02
+        .db 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x99, 0x25, 0x0B, 0x25, 0x01, 0x00, 0x33, 0x25, 0x07
+        .db 0x36, 0x34, 0x0D, 0x34, 0x34, 0x0E, 0x52, 0x25, 0x0D, 0x45, 0x35, 0x04, 0x55, 0x22, 0x06, 0x43
+        .db 0x33, 0x0F, 0xCC, 0xA2, 0xDC, 0xA9, 0xA4, 0xA8, 0x49, 0xA5, 0x8D, 0xED, 0x03, 0x8C, 0xEC, 0x03
+        .db 0x8E, 0xEB, 0x03, 0xA2, 0xE7, 0xA9, 0xA4, 0xA8, 0x49, 0xA5, 0x8D, 0xF0, 0x03, 0x8C, 0xEF, 0x03
+        .db 0x8E, 0xEE, 0x03, 0xA2, 0xF4, 0xA9, 0xA4, 0xA8, 0x49, 0xA5, 0x8D, 0xF3, 0x03, 0x8C, 0xF2, 0x03
+        .db 0x8E, 0xF1, 0x03, 0xA9, 0xE7, 0x8D, 0x05, 0x04, 0xA9, 0xA4, 0x8D, 0x06, 0x04, 0xA9, 0xF4, 0x8D
+        .db 0x07, 0x04, 0xA9, 0xA4, 0x8D, 0x08, 0x04, 0xA9, 0x59, 0x8D, 0x0B, 0x04, 0xA9, 0xE6, 0x8D, 0x0C
+        .db 0x04, 0xA9, 0x82, 0x8D, 0x09, 0x04, 0xA9, 0xE6, 0x8D, 0x0A, 0x04, 0x60, 0xAD, 0xC0, 0x3F, 0x29
+        .db 0x80, 0xF0, 0xF9, 0xAD, 0xC6, 0x3F, 0x60, 0x18, 0xAD, 0xC0, 0x3F, 0x29, 0x80, 0xF0, 0x04, 0xAD
+        .db 0xC6, 0x3F, 0x38, 0x60, 0x48, 0xAD, 0xC0, 0x3F, 0x29, 0x20, 0xF0, 0xF9, 0x68, 0x8D, 0xC6, 0x3F
+        .db 0x60, 0xA9, 0x0D, 0x20, 0xF4, 0xA4, 0xA9, 0x0A, 0x80, 0xEA, 0x20, 0xE7, 0xA4, 0x90, 0x05, 0xC9
+        .db 0x03, 0xF0, 0x01, 0x18, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0xEA, 0x4C, 0xBA, 0x13, 0xEA, 0x4C, 0xCA, 0x13, 0x04, 0x00, 0xD2, 0x5E, 0x5A, 0x1B, 0x7F, 0x00
+        .db 0x80, 0x3E, 0x9F, 0x00, 0xFF, 0x01, 0x00, 0x01, 0x1F, 0x00, 0x01, 0x00, 0x65, 0x1B, 0x65, 0x1B
+        .db 0x31, 0x13, 0xEA, 0xEA, 0x83, 0x4C, 0x49, 0xD4, 0x00, 0x00, 0x2C, 0x04, 0xB1, 0xAF, 0x48, 0xE6
+        .db 0xAF, 0xD0, 0x02, 0xE6, 0xB0, 0xB1, 0xAF, 0xE6, 0xAF, 0xD0, 0x02, 0xE6, 0xB0, 0xCA, 0xCA, 0x95
+        .db 0x01, 0x68, 0x95, 0x00, 0xA0, 0x01, 0xB1, 0xAF, 0x85, 0xB3, 0x88, 0xB1, 0xAF, 0x85, 0xB2, 0x18
+        .db 0xA5, 0xAF, 0x69, 0x02, 0x85, 0xAF, 0x90, 0x02, 0xE6, 0xB0, 0x4C, 0xB1, 0x00, 0x84, 0x43, 0x4C
+        .db 0x49, 0xD4, 0x24, 0x04, 0x66, 0x04, 0xB1, 0xAF, 0x48, 0x98, 0xF0, 0xCB, 0x0A, 0x85, 0xA6, 0xB5
+        .db 0x00, 0x99, 0xA7, 0x00, 0xE8, 0xC8, 0xC4, 0xA6, 0xD0, 0xF5, 0xA0, 0x00, 0x60, 0x87, 0x45, 0x58
+        .db 0x45, 0x43, 0x55, 0x54, 0xC5, 0x5D, 0x04, 0x89, 0x04, 0xB5, 0x00, 0x85, 0xB2, 0xB5, 0x01, 0x85
+        .db 0xB3, 0xE8, 0xE8, 0x4C, 0xB1, 0x00, 0x86, 0x42, 0x52, 0x41, 0x4E, 0x43, 0xC8, 0x7D, 0x04, 0xA1
+        .db 0x04, 0x18, 0xB1, 0xAF, 0x65, 0xAF, 0x48, 0xC8, 0xB1, 0xAF, 0x65, 0xB0, 0x85, 0xB0, 0x68, 0x85
+        .db 0xAF, 0x4C, 0x46, 0x04, 0x87, 0x30, 0x42, 0x52, 0x41, 0x4E, 0x43, 0xC8, 0x96, 0x04, 0xC0, 0x04
+        .db 0xE8, 0xE8, 0xB5, 0xFE, 0x15, 0xFF, 0xF0, 0xD9, 0x18, 0xA5, 0xAF, 0x69, 0x02, 0x85, 0xAF, 0x90
+        .db 0x02, 0xE6, 0xB0, 0x4C, 0x44, 0x04, 0x86, 0x28, 0x4C, 0x4F, 0x4F, 0x50, 0xA9, 0xB4, 0x04, 0xE1
+        .db 0x04, 0x86, 0xB6, 0xBA, 0xFE, 0x01, 0x01, 0xD0, 0x03, 0xFE, 0x02, 0x01, 0x18, 0xBD, 0x03, 0x01
+        .db 0xFD, 0x01, 0x01, 0xBD, 0x04, 0x01, 0xFD, 0x02, 0x01, 0xA6, 0xB6, 0x0A, 0x90, 0xA3, 0x68, 0x68
+        .db 0x68, 0x68, 0x4C, 0xC8, 0x04, 0x87, 0x28, 0x2B, 0x4C, 0x4F, 0x4F, 0x50, 0xA9, 0xD6, 0x04, 0x11
+        .db 0x05, 0xE8, 0xE8, 0x86, 0xB6, 0xB5, 0xFF, 0x48, 0x48, 0xB5, 0xFE, 0xBA, 0xE8, 0xE8, 0x18, 0x7D
+        .db 0x01, 0x01, 0x9D, 0x01, 0x01, 0x68, 0x7D, 0x02, 0x01, 0x9D, 0x02, 0x01, 0x68, 0x10, 0xBD, 0x18
+        .db 0xBD, 0x01, 0x01, 0xFD, 0x03, 0x01, 0xBD, 0x02, 0x01, 0xFD, 0x04, 0x01, 0x4C, 0xF9, 0x04, 0x84
+        .db 0x28, 0x44, 0x4F, 0xA9, 0x05, 0x05, 0x48, 0x05, 0xB5, 0x03, 0x48, 0xB5, 0x02, 0x48, 0xB5, 0x01
+        .db 0x48, 0xB5, 0x00, 0x48, 0xE8, 0xE8, 0xE8, 0xE8, 0x4C, 0x44, 0x04, 0x81, 0xC9, 0x3F, 0x05, 0xD5
+        .db 0x07, 0x85, 0x44, 0x49, 0x47, 0x49, 0xD4, 0x5B, 0x05, 0x6B, 0x05, 0x38, 0xB5, 0x02, 0xE9, 0x30
+        .db 0x30, 0x18, 0xC9, 0x0A, 0x30, 0x07, 0x38, 0xE9, 0x07, 0xC9, 0x0A, 0x30, 0x0D, 0xD5, 0x00, 0x10
+        .db 0x09, 0x95, 0x02, 0xA9, 0x01, 0x48, 0x98, 0x4C, 0x3F, 0x04, 0x98, 0x48, 0xE8, 0xE8, 0x4C, 0x3F
+        .db 0x04, 0x86, 0x28, 0x46, 0x49, 0x4E, 0x44, 0xA9, 0x61, 0x05, 0x9C, 0x05, 0xA9, 0x02, 0x20, 0x6C
+        .db 0x04, 0x86, 0xB6, 0xA0, 0x00, 0xB1, 0xA7, 0x51, 0xA9, 0x29, 0x3F, 0xD0, 0x2D, 0xC8, 0xB1, 0xA7
+        .db 0x51, 0xA9, 0x0A, 0xD0, 0x23, 0x90, 0xF6, 0xA6, 0xB6, 0xCA, 0xCA, 0xCA, 0xCA, 0x18, 0x98, 0x69
+        .db 0x05, 0x65, 0xA7, 0x95, 0x02, 0xA0, 0x00, 0x98, 0x65, 0xA8, 0x95, 0x03, 0x94, 0x01, 0xB1, 0xA7
+        .db 0x95, 0x00, 0xA9, 0x01, 0x48, 0x4C, 0x3D, 0x04, 0xB0, 0x05, 0xC8, 0xB1, 0xA7, 0x10, 0xFB, 0xC8
+        .db 0xB1, 0xA7, 0xAA, 0xC8, 0xB1, 0xA7, 0x85, 0xA8, 0x86, 0xA7, 0x05, 0xA7, 0xD0, 0xB5, 0xA6, 0xB6
+        .db 0xA9, 0x00, 0x48, 0x4C, 0x3D, 0x04, 0x87, 0x45, 0x4E, 0x43, 0x4C, 0x4F, 0x53, 0xC5, 0x91, 0x05
+        .db 0x02, 0x06, 0xA9, 0x02, 0x20, 0x6C, 0x04, 0x8A, 0x38, 0xE9, 0x08, 0xAA, 0x94, 0x03, 0x94, 0x01
+        .db 0x88, 0xC8, 0xB1, 0xA9, 0xC5, 0xA7, 0xF0, 0xF9, 0x94, 0x04, 0xB1, 0xA9, 0xD0, 0x0E, 0x94, 0x02
+        .db 0x94, 0x00, 0x98, 0xD5, 0x04, 0xD0, 0x02, 0xF6, 0x02, 0x4C, 0x44, 0x04, 0x94, 0x02, 0xC8, 0xC5
+        .db 0xA7, 0xD0, 0xE7, 0x94, 0x00, 0x4C, 0x44, 0x04, 0x84, 0x45, 0x4D, 0x49, 0xD4, 0xF6, 0x05, 0x64
+        .db 0x17, 0x83, 0x4B, 0x45, 0xD9, 0x38, 0x06, 0x6C, 0x17, 0x89, 0x3F, 0x54, 0x45, 0x52, 0x4D, 0x49
+        .db 0x4E, 0x41, 0xCC, 0x41, 0x06, 0x72, 0x17, 0x82, 0x43, 0xD2, 0x49, 0x06, 0x7B, 0x17, 0x85, 0x43
+        .db 0x4D, 0x4F, 0x56, 0xC5, 0x57, 0x06, 0x68, 0x06, 0xA9, 0x03, 0x20, 0x6C, 0x04, 0xC4, 0xA7, 0xD0
+        .db 0x07, 0xC6, 0xA8, 0x10, 0x03, 0x4C, 0x44, 0x04, 0xB1, 0xAB, 0x91, 0xA9, 0xC8, 0xD0, 0xEE, 0xE6
+        .db 0xAC, 0xE6, 0xAA, 0x4C, 0x6D, 0x06, 0x82, 0x55, 0xAA, 0x5E, 0x06, 0x8D, 0x06, 0xA9, 0x00, 0x85
+        .db 0xA7, 0xA0, 0x10, 0x56, 0x03, 0x76, 0x02, 0x90, 0x0D, 0x18, 0x85, 0xA8, 0xA5, 0xA7, 0x75, 0x00
+        .db 0x85, 0xA7, 0xA5, 0xA8, 0x75, 0x01, 0x6A, 0x66, 0xA7, 0x76, 0x03, 0x76, 0x02, 0x88, 0xD0, 0xE7
+        .db 0x95, 0x01, 0xA5, 0xA7, 0x95, 0x00, 0x4C, 0x44, 0x04, 0x82, 0x55, 0xAF, 0x86, 0x06, 0xC0, 0x06
+        .db 0x38, 0xB5, 0x02, 0xF5, 0x00, 0xB5, 0x03, 0xF5, 0x01, 0xB0, 0x2E, 0xA9, 0x11, 0x85, 0xA7, 0x36
+        .db 0x04, 0x36, 0x05, 0xC6, 0xA7, 0xF0, 0x2C, 0x36, 0x02, 0x36, 0x03, 0x64, 0xA8, 0x26, 0xA8, 0x38
+        .db 0xB5, 0x02, 0xF5, 0x00, 0x85, 0xA9, 0xB5, 0x03, 0xF5, 0x01, 0xA8, 0xA5, 0xA8, 0xE9, 0x00, 0x90
+        .db 0xDE, 0xA5, 0xA9, 0x95, 0x02, 0x94, 0x03, 0x80, 0xD6, 0xA9, 0xFF, 0x95, 0x02, 0x95, 0x03, 0x95
+        .db 0x04, 0x95, 0x05, 0xE8, 0xE8, 0x4C, 0x9A, 0x08, 0x83, 0x41, 0x4E, 0xC4, 0xB9, 0x06, 0x10, 0x07
+        .db 0xB5, 0x00, 0x35, 0x02, 0x48, 0xB5, 0x01, 0x35, 0x03, 0xE8, 0xE8, 0x4C, 0x3F, 0x04, 0x82, 0x4F
+        .db 0xD2, 0x08, 0x07, 0x25, 0x07, 0xB5, 0x00, 0x15, 0x02, 0x48, 0xB5, 0x01, 0x15, 0x03, 0xE8, 0xE8
+        .db 0x4C, 0x3F, 0x04, 0x83, 0x58, 0x4F, 0xD2, 0x1E, 0x07, 0x3B, 0x07, 0xB5, 0x00, 0x55, 0x02, 0x48
+        .db 0xB5, 0x01, 0x55, 0x03, 0xE8, 0xE8, 0x4C, 0x3F, 0x04, 0x83, 0x53, 0x50, 0xC0, 0x33, 0x07, 0x51
+        .db 0x07, 0x8A, 0x48, 0xA9, 0x00, 0x4C, 0x3D, 0x04, 0x83, 0x53, 0x50, 0xA1, 0x49, 0x07, 0x60, 0x07
+        .db 0xA0, 0x06, 0xB1, 0xB4, 0xAA, 0x4C, 0x44, 0x04, 0x83, 0x52, 0x50, 0xA1, 0x58, 0x07, 0x70, 0x07
+        .db 0x86, 0xB6, 0xA0, 0x08, 0xB1, 0xB4, 0xAA, 0x9A, 0xA6, 0xB6, 0x4C, 0x44, 0x04, 0x82, 0x3B, 0xD3
+        .db 0x68, 0x07, 0x84, 0x07, 0x68, 0x85, 0xAF, 0x68, 0x85, 0xB0, 0x4C, 0x44, 0x04, 0x85, 0x4C, 0x45
+        .db 0x41, 0x56, 0xC5, 0x7D, 0x07, 0x97, 0x07, 0x86, 0xB6, 0xBA, 0xBD, 0x01, 0x01, 0x9D, 0x03, 0x01
+        .db 0xBD, 0x02, 0x01, 0x9D, 0x04, 0x01, 0xA6, 0xB6, 0x4C, 0x44, 0x04, 0x82, 0x3E, 0xD2, 0x8D, 0x07
+        .db 0xB2, 0x07, 0xB5, 0x01, 0x48, 0xB5, 0x00, 0x48, 0xE8, 0xE8, 0x4C, 0x44, 0x04, 0x82, 0x52, 0xBE
+        .db 0xAB, 0x07, 0xC4, 0x07, 0xCA, 0xCA, 0x68, 0x95, 0x00, 0x68, 0x95, 0x01, 0x4C, 0x44, 0x04, 0x81
+        .db 0xD2, 0xBD, 0x07, 0xD5, 0x07, 0x86, 0xB6, 0xBA, 0xBD, 0x01, 0x01, 0x48, 0xBD, 0x02, 0x01, 0xA6
+        .db 0xB6, 0x4C, 0x3D, 0x04, 0x82, 0x30, 0xBD, 0xCF, 0x07, 0xEB, 0x07, 0xB5, 0x01, 0x94, 0x01, 0x15
+        .db 0x00, 0xD0, 0x01, 0xC8, 0x94, 0x00, 0x4C, 0x44, 0x04, 0x82, 0x30, 0xBC, 0xE4, 0x07, 0x00, 0x08
+        .db 0x16, 0x01, 0x98, 0x2A, 0x94, 0x01, 0x95, 0x00, 0x4C, 0x44, 0x04, 0x81, 0xAB, 0xF9, 0x07, 0x11
+        .db 0x08, 0x18, 0xB5, 0x00, 0x75, 0x02, 0x95, 0x02, 0xB5, 0x01, 0x75, 0x03, 0x95, 0x03, 0xE8, 0xE8
+        .db 0x4C, 0x44, 0x04, 0x82, 0x44, 0xAB, 0x0B, 0x08, 0x2A, 0x08, 0x18, 0xB5, 0x02, 0x75, 0x06, 0x95
+        .db 0x06, 0xB5, 0x03, 0x75, 0x07, 0x95, 0x07, 0xB5, 0x00, 0x75, 0x04, 0x95, 0x04, 0xB5, 0x01, 0x75
+        .db 0x05, 0x95, 0x05, 0x4C, 0x54, 0x05, 0x85, 0x4D, 0x49, 0x4E, 0x55, 0xD3, 0x23, 0x08, 0x50, 0x08
+        .db 0x38, 0x98, 0xF5, 0x00, 0x95, 0x00, 0x98, 0xF5, 0x01, 0x95, 0x01, 0x4C, 0x44, 0x04, 0x86, 0x44
+        .db 0x4D, 0x49, 0x4E, 0x55, 0xD3, 0x46, 0x08, 0x69, 0x08, 0x38, 0x98, 0xF5, 0x02, 0x95, 0x02, 0x98
+        .db 0xF5, 0x03, 0x95, 0x03, 0x4C, 0x51, 0x08, 0x84, 0x4F, 0x56, 0x45, 0xD2, 0x5E, 0x08, 0x80, 0x08
+        .db 0xB5, 0x02, 0x48, 0xB5, 0x03, 0x4C, 0x3D, 0x04, 0x84, 0x44, 0x52, 0x4F, 0xD0, 0x77, 0x08, 0x56
+        .db 0x05, 0x84, 0x53, 0x57, 0x41, 0xD0, 0x88, 0x08, 0x9A, 0x08, 0xB5, 0x02, 0x48, 0xB5, 0x00, 0x95
+        .db 0x02, 0xB5, 0x03, 0xB4, 0x01, 0x94, 0x03, 0x4C, 0x3F, 0x04, 0x83, 0x44, 0x55, 0xD0, 0x91, 0x08
+        .db 0xB2, 0x08, 0xB5, 0x00, 0x48, 0xB5, 0x01, 0x4C, 0x3D, 0x04, 0x82, 0x2B, 0xA1, 0xAA, 0x08, 0xC1
+        .db 0x08, 0x18, 0xA1, 0x00, 0x75, 0x02, 0x81, 0x00, 0xF6, 0x00, 0xD0, 0x02, 0xF6, 0x01, 0xA1, 0x00
+        .db 0x75, 0x03, 0x81, 0x00, 0x4C, 0x54, 0x05, 0x81, 0x54, 0x4F, 0x47, 0x47, 0x4C, 0xC5, 0xBA, 0x08
+        .db 0xE2, 0x08, 0xA1, 0x02, 0x55, 0x00, 0x81, 0x02, 0x4C, 0x54, 0x05, 0x81, 0xC0, 0xD7, 0x08, 0xF1
+        .db 0x08, 0xA1, 0x00, 0x48, 0xF6, 0x00, 0xD0, 0x02, 0xF6, 0x01, 0xA1, 0x00, 0x4C, 0x3F, 0x04, 0x82
+        .db 0x43, 0xC0, 0xEB, 0x08, 0x06, 0x09, 0xA1, 0x00, 0x95, 0x00, 0x94, 0x01, 0x4C, 0x44, 0x04, 0x81
+        .db 0xA1, 0xFF, 0x08, 0x15, 0x09, 0xB5, 0x02, 0x81, 0x00, 0xF6, 0x00, 0xD0, 0x02, 0xF6, 0x01, 0xB5
+        .db 0x03, 0x81, 0x00, 0x4C, 0x54, 0x05, 0x82, 0x43, 0xA1, 0x0F, 0x09, 0x2D, 0x09, 0xB5, 0x02, 0x81
+        .db 0x00, 0x4C, 0x54, 0x05, 0xC1, 0xBA, 0x26, 0x09, 0x4C, 0x09, 0xB5, 0x0C, 0x71, 0x0C, 0xCB, 0x0A
+        .db 0xEF, 0x08, 0xBE, 0x0A, 0x13, 0x09, 0xA9, 0x11, 0x36, 0x0D, 0x85, 0x0D, 0xA5, 0xB0, 0x48, 0xA5
+        .db 0xAF, 0x48, 0x18, 0xA5, 0xB2, 0x69, 0x02, 0x85, 0xAF, 0x98, 0x65, 0xB3, 0x85, 0xB0, 0x4C, 0x44
+        .db 0x04, 0xC1, 0xBB, 0x34, 0x09, 0x4C, 0x09, 0xDD, 0x0C, 0x12, 0x0D, 0x82, 0x07, 0x4A, 0x0D, 0x28
+        .db 0x0D, 0x82, 0x07, 0x88, 0x43, 0x4F, 0x4E, 0x53, 0x54, 0x41, 0x4E, 0xD4, 0x61, 0x09, 0x4C, 0x09
+        .db 0xA9, 0x11, 0x4A, 0x0D, 0x4C, 0x0B, 0x85, 0x0D, 0xA0, 0x02, 0xB1, 0xB2, 0x48, 0xC8, 0xB1, 0xB2
+        .db 0x4C, 0x3D, 0x04, 0x88, 0x56, 0x41, 0x52, 0x49, 0x41, 0x42, 0x4C, 0xC5, 0x73, 0x09, 0x4C, 0x09
+        .db 0x7E, 0x09, 0x85, 0x0D, 0x18, 0xA5, 0xB2, 0x69, 0x02, 0x48, 0x98, 0x65, 0xB3, 0x4C, 0x3D, 0x04
+        .db 0x84, 0x55, 0x53, 0x45, 0xD2, 0x93, 0x09, 0x4C, 0x09, 0x7E, 0x09, 0x85, 0x0D, 0xA0, 0x02, 0x18
+        .db 0xB1, 0xB2, 0x65, 0xB4, 0x48, 0xA9, 0x00, 0x65, 0xB5, 0x4C, 0x3D, 0x04, 0x81, 0xB0, 0xB0, 0x09
+        .db 0x88, 0x09, 0x00, 0x00, 0x81, 0xB1, 0xCC, 0x09, 0x88, 0x09, 0x01, 0x00, 0x81, 0xB2, 0xD4, 0x09
+        .db 0x88, 0x09, 0x02, 0x00, 0x81, 0xB3, 0xDC, 0x09, 0x88, 0x09, 0x03, 0x00, 0x82, 0x42, 0xCC, 0xE4
+        .db 0x09, 0x88, 0x09, 0x20, 0x00, 0x83, 0x43, 0x2F, 0xCC, 0xEC, 0x09, 0x88, 0x09, 0x40, 0x00, 0x85
+        .db 0x46, 0x49, 0x52, 0x53, 0xD4, 0xF5, 0x09, 0x88, 0x09, 0x60, 0x3A, 0x85, 0x4C, 0x49, 0x4D, 0x49
+        .db 0xD4, 0xFF, 0x09, 0x88, 0x09, 0x80, 0x3E, 0x85, 0x42, 0x2F, 0x42, 0x55, 0xC6, 0x0B, 0x0A, 0x88
+        .db 0x09, 0x80, 0x00, 0x85, 0x42, 0x2F, 0x53, 0x43, 0xD2, 0x17, 0x0A, 0x88, 0x09, 0x08, 0x00, 0x87
+        .db 0x2B, 0x4F, 0x52, 0x49, 0x47, 0x49, 0xCE, 0x23, 0x0A, 0x4C, 0x09, 0x2A, 0x04, 0x00, 0x04, 0x0F
+        .db 0x08, 0x82, 0x07, 0x83, 0x54, 0x49, 0xC2, 0x2F, 0x0A, 0xBD, 0x09, 0x0A, 0x85, 0x57, 0x49, 0x44
+        .db 0x54, 0xC8, 0x43, 0x0A, 0xBD, 0x09, 0x0C, 0x87, 0x57, 0x41, 0x52, 0x4E, 0x49, 0x4E, 0xC7, 0x4C
+        .db 0x0A, 0xBD, 0x09, 0x0E, 0x85, 0x46, 0x45, 0x4E, 0x43, 0xC5, 0x57, 0x0A, 0xBD, 0x09, 0x10, 0x82
+        .db 0x44, 0xD0, 0x64, 0x0A, 0xBD, 0x09, 0x12, 0x88, 0x56, 0x4F, 0x43, 0x2D, 0x4C, 0x49, 0x4E, 0xCB
+        .db 0x6F, 0x0A, 0xBD, 0x09, 0x14, 0x83, 0x42, 0x4C, 0xCB, 0x77, 0x0A, 0xBD, 0x09, 0x16, 0x82, 0x49
+        .db 0xCE, 0x85, 0x0A, 0xBD, 0x09, 0x18, 0x83, 0x4F, 0x55, 0xD4, 0x8E, 0x0A, 0xBD, 0x09, 0x1A, 0x83
+        .db 0x53, 0x43, 0xD2, 0x96, 0x0A, 0xBD, 0x09, 0x1C, 0x86, 0x4F, 0x46, 0x46, 0x53, 0x45, 0xD4, 0x9F
+        .db 0x0A, 0xBD, 0x09, 0x1E, 0x87, 0x43, 0x4F, 0x4E, 0x54, 0x45, 0x58, 0xD4, 0xA8, 0x0A, 0xBD, 0x09
+        .db 0x20, 0x87, 0x43, 0x55, 0x52, 0x52, 0x45, 0x4E, 0xD4, 0xB4, 0x0A, 0xBD, 0x09, 0x22, 0x85, 0x53
+        .db 0x54, 0x41, 0x54, 0xC5, 0xC1, 0x0A, 0xBD, 0x09, 0x24, 0x84, 0x42, 0x41, 0x53, 0xC5, 0xCE, 0x0A
+        .db 0xBD, 0x09, 0x26, 0x83, 0x44, 0x50, 0xCC, 0xD9, 0x0A, 0xBD, 0x09, 0x28, 0x83, 0x46, 0x4C, 0xC4
+        .db 0xE3, 0x0A, 0xBD, 0x09, 0x2A, 0x83, 0x43, 0x53, 0xD0, 0xEC, 0x0A, 0xBD, 0x09, 0x2C, 0x82, 0x52
+        .db 0xA3, 0xF5, 0x0A, 0xBD, 0x09, 0x2E, 0x83, 0x48, 0x4C, 0xC4, 0xFE, 0x0A, 0xBD, 0x09, 0x30, 0x82
+        .db 0x31, 0xAB, 0x06, 0x0B, 0x4C, 0x09, 0xD8, 0x09, 0x0F, 0x08, 0x82, 0x07, 0x82, 0x32, 0xAB, 0x0F
+        .db 0x0B, 0x4C, 0x09, 0xE0, 0x09, 0x0F, 0x08, 0x82, 0x07, 0x84, 0x48, 0x45, 0x52, 0xC5, 0x1C, 0x0B
+        .db 0x4C, 0x09, 0x74, 0x0A, 0xEF, 0x08, 0x82, 0x07, 0x85, 0x41, 0x4C, 0x4C, 0x4F, 0xD4, 0x29, 0x0B
+        .db 0x4C, 0x09, 0x74, 0x0A, 0xBF, 0x08, 0x82, 0x07, 0x81, 0xAC, 0x38, 0x0B, 0x4C, 0x09, 0x30, 0x0B
+        .db 0x13, 0x09, 0xE0, 0x09, 0x40, 0x0B, 0x82, 0x07, 0x82, 0x43, 0xAC, 0x48, 0x0B, 0x4C, 0x09, 0x30
+        .db 0x0B, 0x2B, 0x09, 0xD8, 0x09, 0x40, 0x0B, 0x82, 0x07, 0x81, 0xAD, 0x58, 0x0B, 0x4C, 0x09, 0x4E
+        .db 0x08, 0x0F, 0x08, 0x82, 0x07, 0x81, 0xBD, 0x69, 0x0B, 0x4C, 0x09, 0x6D, 0x0B, 0xE9, 0x07, 0x82
+        .db 0x07, 0x82, 0x55, 0xBC, 0x75, 0x0B, 0x4C, 0x09, 0x6D, 0x0B, 0xFE, 0x07, 0x82, 0x07, 0x81, 0xBC
+        .db 0x81, 0x0B, 0x94, 0x0B, 0x38, 0xB5, 0x02, 0xF5, 0x00, 0xB5, 0x03, 0xF5, 0x01, 0x94, 0x03, 0x50
+        .db 0x02, 0x49, 0x80, 0x10, 0x01, 0xC8, 0x94, 0x02, 0x4C, 0x56, 0x05, 0x81, 0xBE, 0x8E, 0x0B, 0x4C
+        .db 0x09, 0x98, 0x08, 0x92, 0x0B, 0x82, 0x07, 0x83, 0x52, 0x4F, 0xD4, 0xAB, 0x0B, 0x4C, 0x09, 0xB0
+        .db 0x07, 0x98, 0x08, 0xC2, 0x07, 0x98, 0x08, 0x82, 0x07, 0x85, 0x53, 0x50, 0x41, 0x43, 0xC5, 0xB7
+        .db 0x0B, 0x4C, 0x09, 0xF1, 0x09, 0x3F, 0x06, 0x82, 0x07, 0x84, 0x2D, 0x44, 0x55, 0xD0, 0xC9, 0x0B
+        .db 0x4C, 0x09, 0xB0, 0x08, 0xBE, 0x04, 0x04, 0x00, 0xB0, 0x08, 0x82, 0x07, 0x88, 0x54, 0x52, 0x41
+        .db 0x56, 0x45, 0x52, 0x53, 0xC5, 0xD9, 0x0B, 0x4C, 0x09, 0x98, 0x08, 0x7E, 0x08, 0x0F, 0x08, 0x64
+        .db 0x04, 0x7F, 0x7E, 0x08, 0x04, 0x09, 0x92, 0x0B, 0xBE, 0x04, 0xF1, 0xFF, 0x98, 0x08, 0x8F, 0x08
+        .db 0x82, 0x07, 0x86, 0x4C, 0x41, 0x54, 0x45, 0x53, 0xD4, 0xEC, 0x0B, 0x4C, 0x09, 0xCB, 0x0A, 0xEF
+        .db 0x08, 0xEF, 0x08, 0x82, 0x07, 0x83, 0x4C, 0x46, 0xC1, 0x12, 0x0C, 0x4C, 0x09, 0x64, 0x04, 0x04
+        .db 0x6D, 0x0B, 0x82, 0x07, 0x83, 0x43, 0x46, 0xC1, 0x25, 0x0C, 0x4C, 0x09, 0xE0, 0x09, 0x6D, 0x0B
+        .db 0x82, 0x07, 0x83, 0x4E, 0x46, 0xC1, 0x34, 0x0C, 0x4C, 0x09, 0x64, 0x04, 0x05, 0x6D, 0x0B, 0x2A
+        .db 0x04, 0xFF, 0xFF, 0xF7, 0x0B, 0x82, 0x07, 0x83, 0x50, 0x46, 0xC1, 0x42, 0x0C, 0x4C, 0x09, 0xD8
+        .db 0x09, 0xF7, 0x0B, 0x64, 0x04, 0x05, 0x0F, 0x08, 0x82, 0x07, 0x84, 0x21, 0x43, 0x53, 0xD0, 0x57
+        .db 0x0C, 0x4C, 0x09, 0x4F, 0x07, 0xFB, 0x0A, 0x13, 0x09, 0x82, 0x07, 0x86, 0x3F, 0x45, 0x52, 0x52
+        .db 0x4F, 0xD2, 0x6A, 0x0C, 0x4C, 0x09, 0x98, 0x08, 0xBE, 0x04, 0x08, 0x00, 0x40, 0x11, 0x9F, 0x04
+        .db 0x04, 0x00, 0x8F, 0x08, 0x82, 0x07, 0x85, 0x3F, 0x43, 0x4F, 0x4D, 0xD0, 0x7B, 0x0C, 0x4C, 0x09
+        .db 0xD6, 0x0A, 0xEF, 0x08, 0xE9, 0x07, 0x64, 0x04, 0x11, 0x84, 0x0C, 0x82, 0x07, 0x85, 0x3F, 0x45
+        .db 0x58, 0x45, 0xC3, 0x96, 0x0C, 0x4C, 0x09, 0xD6, 0x0A, 0xEF, 0x08, 0x64, 0x04, 0x12, 0x84, 0x0C
+        .db 0x82, 0x07, 0x86, 0x3F, 0x50, 0x41, 0x49, 0x52, 0xD3, 0xAD, 0x0C, 0x4C, 0x09, 0x6D, 0x0B, 0x64
+        .db 0x04, 0x13, 0x84, 0x0C, 0x82, 0x07, 0x84, 0x3F, 0x43, 0x53, 0xD0, 0xC2, 0x0C, 0x4C, 0x09, 0x4F
+        .db 0x07, 0xFB, 0x0A, 0xEF, 0x08, 0x6D, 0x0B, 0x64, 0x04, 0x14, 0x84, 0x0C, 0x82, 0x07, 0x88, 0x3F
+        .db 0x4C, 0x4F, 0x41, 0x44, 0x49, 0x4E, 0xC7, 0xD6, 0x0C, 0x4C, 0x09, 0x8B, 0x0A, 0xEF, 0x08, 0xE9
+        .db 0x07, 0x64, 0x04, 0x16, 0x84, 0x0C, 0x82, 0x07, 0x87, 0x43, 0x4F, 0x4D, 0x50, 0x49, 0x4C, 0xC5
+        .db 0xEE, 0x0C, 0x4C, 0x09, 0x9E, 0x0C, 0xC2, 0x07, 0xB0, 0x08, 0x21, 0x0B, 0xB0, 0x07, 0xEF, 0x08
+        .db 0x4C, 0x0B, 0x82, 0x07, 0xC1, 0xDB, 0x08, 0x0D, 0x4C, 0x09, 0xD0, 0x09, 0xD6, 0x0A, 0x13, 0x09
+        .db 0x82, 0x07, 0x81, 0xDD, 0x24, 0x0D, 0x4C, 0x09, 0x64, 0x04, 0xC0, 0xD6, 0x0A, 0x13, 0x09, 0x82
+        .db 0x07, 0x86, 0x53, 0x4D, 0x55, 0x44, 0x47, 0xC5, 0x32, 0x0D, 0x4C, 0x09, 0x1B, 0x0C, 0x64, 0x04
+        .db 0x20, 0xE0, 0x08, 0x82, 0x07, 0x83, 0x48, 0x45, 0xD8, 0x41, 0x0D, 0x4C, 0x09, 0x64, 0x04, 0x10
+        .db 0xE0, 0x0A, 0x13, 0x09, 0x82, 0x07, 0x87, 0x44, 0x45, 0x43, 0x49, 0x4D, 0x41, 0xCC, 0x55, 0x0D
+        .db 0x4C, 0x09, 0x64, 0x04, 0x0A, 0xE0, 0x0A, 0x13, 0x09, 0x82, 0x07, 0x87, 0x28, 0x3B, 0x43, 0x4F
+        .db 0x44, 0x45, 0xA9, 0x66, 0x0D, 0x4C, 0x09, 0xC2, 0x07, 0x1B, 0x0C, 0x5D, 0x0C, 0x3A, 0x0C, 0x13
+        .db 0x09, 0x82, 0x07, 0xC5, 0x3B, 0x43, 0x4F, 0x44, 0xC5, 0x7B, 0x0D, 0x4C, 0x09, 0xDD, 0x0C, 0x12
+        .db 0x0D, 0x85, 0x0D, 0x28, 0x0D, 0x4A, 0x0D, 0x82, 0x07, 0x87, 0x3C, 0x42, 0x55, 0x49, 0x4C, 0x44
+        .db 0xD3, 0x93, 0x0D, 0x4C, 0x09, 0xD0, 0x09, 0x7E, 0x09, 0x82, 0x07, 0x85, 0x44, 0x4F, 0x45, 0x53
+        .db 0xBE, 0xA9, 0x0D, 0x4C, 0x09, 0xC2, 0x07, 0x1B, 0x0C, 0x5D, 0x0C, 0x13, 0x09, 0x85, 0x0D, 0xA5
+        .db 0xB0, 0x48, 0xA5, 0xAF, 0x48, 0xA0, 0x02, 0xB1, 0xB2, 0x85, 0xAF, 0xC8, 0xB1, 0xB2, 0x85, 0xB0
+        .db 0x18, 0xA5, 0xB2, 0x69, 0x04, 0x48, 0xA5, 0xB3, 0x69, 0x00, 0x4C, 0x3D, 0x04, 0x85, 0x43, 0x4F
+        .db 0x55, 0x4E, 0xD4, 0xBB, 0x0D, 0x4C, 0x09, 0xB0, 0x08, 0x14, 0x0B, 0x98, 0x08, 0x04, 0x09, 0x82
+        .db 0x07, 0x84, 0x54, 0x59, 0x50, 0xC5, 0xED, 0x0D, 0x4C, 0x09, 0xE0, 0x0B, 0xBE, 0x04, 0x18, 0x00
+        .db 0x7E, 0x08, 0x0F, 0x08, 0x98, 0x08, 0x46, 0x05, 0x5F, 0x05, 0x04, 0x09, 0x3F, 0x06, 0xDF, 0x04
+        .db 0xF8, 0xFF, 0x9F, 0x04, 0x04, 0x00, 0x8F, 0x08, 0x82, 0x07, 0x89, 0x2D, 0x54, 0x52, 0x41, 0x49
+        .db 0x4C, 0x49, 0x4E, 0xC7, 0x01, 0x0E, 0x4C, 0x09, 0xB0, 0x08, 0xD0, 0x09, 0x46, 0x05, 0x7E, 0x08
+        .db 0x7E, 0x08, 0x0F, 0x08, 0xD8, 0x09, 0x6D, 0x0B, 0x04, 0x09, 0xF1, 0x09, 0x6D, 0x0B, 0xBE, 0x04
+        .db 0x08, 0x00, 0x95, 0x07, 0x9F, 0x04, 0x06, 0x00, 0xD8, 0x09, 0x6D, 0x0B, 0xDF, 0x04, 0xE0, 0xFF
+        .db 0x82, 0x07, 0x84, 0x28, 0x2E, 0x22, 0xA9, 0x2A, 0x0E, 0x4C, 0x09, 0xD3, 0x07, 0xF5, 0x0D, 0xB0
+        .db 0x08, 0x14, 0x0B, 0xC2, 0x07, 0x0F, 0x08, 0xB0, 0x07, 0x08, 0x0E, 0x82, 0x07, 0xC2, 0x2E, 0xA2
+        .db 0x62, 0x0E, 0x4C, 0x09, 0x64, 0x04, 0x22, 0xD6, 0x0A, 0xEF, 0x08, 0xBE, 0x04, 0x14, 0x00, 0x12
+        .db 0x0D, 0x69, 0x0E, 0xE3, 0x0F, 0x30, 0x0B, 0x04, 0x09, 0x14, 0x0B, 0x40, 0x0B, 0x9F, 0x04, 0x0A
+        .db 0x00, 0xE3, 0x0F, 0x30, 0x0B, 0xF5, 0x0D, 0x08, 0x0E, 0x82, 0x07, 0x86, 0x45, 0x58, 0x50, 0x45
+        .db 0x43, 0xD4, 0x7D, 0x0E, 0x4C, 0x09, 0x7E, 0x08, 0x0F, 0x08, 0x7E, 0x08, 0x46, 0x05, 0x47, 0x06
+        .db 0xB0, 0x08, 0x64, 0x04, 0x0E, 0x39, 0x0A, 0xEF, 0x08, 0x79, 0x0B, 0xBE, 0x04, 0x1F, 0x00, 0x8F
+        .db 0x08, 0x64, 0x04, 0x08, 0x7E, 0x08, 0x5F, 0x05, 0x79, 0x0B, 0xB0, 0x08, 0xC2, 0x07, 0xE0, 0x09
+        .db 0x6D, 0x0B, 0x0F, 0x08, 0xB0, 0x07, 0x6D, 0x0B, 0x9F, 0x04, 0x27, 0x00, 0xB0, 0x08, 0x64, 0x04
+        .db 0x0D, 0x79, 0x0B, 0xBE, 0x04, 0x0E, 0x00, 0x95, 0x07, 0x8F, 0x08, 0xF1, 0x09, 0xD0, 0x09, 0x9F
+        .db 0x04, 0x04, 0x00, 0xB0, 0x08, 0x5F, 0x05, 0x2B, 0x09, 0xD0, 0x09, 0x5F, 0x05, 0x14, 0x0B, 0x13
+        .db 0x09, 0x3F, 0x06, 0xDF, 0x04, 0xA9, 0xFF, 0x8F, 0x08, 0x82, 0x07, 0x85, 0x51, 0x55, 0x45, 0x52
+        .db 0xD9, 0xAB, 0x0E, 0x4C, 0x09, 0x49, 0x0A, 0xEF, 0x08, 0x64, 0x04, 0x50, 0xB4, 0x0E, 0xD0, 0x09
+        .db 0x93, 0x0A, 0x13, 0x09, 0x82, 0x07, 0xC1, 0x80, 0x1B, 0x0F, 0x4C, 0x09, 0x8B, 0x0A, 0xEF, 0x08
+        .db 0xBE, 0x04, 0x2A, 0x00, 0xD8, 0x09, 0x8B, 0x0A, 0xBF, 0x08, 0xD0, 0x09, 0x93, 0x0A, 0x13, 0x09
+        .db 0x8B, 0x0A, 0xEF, 0x08, 0xD0, 0x09, 0x2B, 0x0A, 0xBE, 0x06, 0x8F, 0x08, 0xE9, 0x07, 0xBE, 0x04
+        .db 0x08, 0x00, 0xB5, 0x0C, 0xC2, 0x07, 0x8F, 0x08, 0x9F, 0x04, 0x06, 0x00, 0xC2, 0x07, 0x8F, 0x08
+        .db 0x82, 0x07, 0x84, 0x46, 0x49, 0x4C, 0xCC, 0x36, 0x0F, 0x4C, 0x09, 0x98, 0x08, 0xB0, 0x07, 0x7E
+        .db 0x08, 0x2B, 0x09, 0xB0, 0x08, 0x14, 0x0B, 0xC2, 0x07, 0xD8, 0x09, 0x6D, 0x0B, 0x66, 0x06, 0x82
+        .db 0x07, 0x85, 0x45, 0x52, 0x41, 0x53, 0xC5, 0x72, 0x0F, 0x4C, 0x09, 0xD0, 0x09, 0x79, 0x0F, 0x82
+        .db 0x07, 0x86, 0x42, 0x4C, 0x41, 0x4E, 0x4B, 0xD3, 0x91, 0x0F, 0x4C, 0x09, 0xF1, 0x09, 0x79, 0x0F
+        .db 0x82, 0x07, 0x84, 0x48, 0x4F, 0x4C, 0xC4, 0xA1, 0x0F, 0x4C, 0x09, 0x2A, 0x04, 0xFF, 0xFF, 0x0C
+        .db 0x0B, 0xBF, 0x08, 0x0C, 0x0B, 0xEF, 0x08, 0x2B, 0x09, 0x82, 0x07, 0x83, 0x50, 0x41, 0xC4, 0xB2
+        .db 0x0F, 0x4C, 0x09, 0x30, 0x0B, 0x64, 0x04, 0x44, 0x0F, 0x08, 0x82, 0x07, 0x84, 0x57, 0x4F, 0x52
+        .db 0xC4, 0xCB, 0x0F, 0x4C, 0x09, 0x8B, 0x0A, 0xEF, 0x08, 0xBE, 0x04, 0x0C, 0x00, 0x8B, 0x0A, 0xEF
+        .db 0x08, 0x48, 0x16, 0x9F, 0x04, 0x06, 0x00, 0x49, 0x0A, 0xEF, 0x08, 0x93, 0x0A, 0xEF, 0x08, 0x0F
+        .db 0x08, 0x98, 0x08, 0x00, 0x06, 0x30, 0x0B, 0x64, 0x04, 0x22, 0xAA, 0x0F, 0x93, 0x0A, 0xBF, 0x08
+        .db 0x7E, 0x08, 0x6D, 0x0B, 0xB0, 0x07, 0xD3, 0x07, 0x30, 0x0B, 0x2B, 0x09, 0x0F, 0x08, 0x30, 0x0B
+        .db 0x14, 0x0B, 0xC2, 0x07, 0x66, 0x06, 0x82, 0x07, 0x85, 0x55, 0x50, 0x50, 0x45, 0xD2, 0xDC, 0x0F
+        .db 0x4C, 0x09, 0x7E, 0x08, 0x0F, 0x08, 0x98, 0x08, 0x46, 0x05, 0x5F, 0x05, 0x04, 0x09, 0x64, 0x04
+        .db 0x5F, 0xAF, 0x0B, 0xBE, 0x04, 0x09, 0x00, 0x5F, 0x05, 0x64, 0x04, 0x20, 0xE0, 0x08, 0xDF, 0x04
+        .db 0xEA, 0xFF, 0x82, 0x07, 0x88, 0x28, 0x4E, 0x55, 0x4D, 0x42, 0x45, 0x52, 0xA9, 0x28, 0x10, 0x4C
+        .db 0x09, 0x14, 0x0B, 0xB0, 0x08, 0xB0, 0x07, 0x04, 0x09, 0xE0, 0x0A, 0xEF, 0x08, 0x69, 0x05, 0xBE
+        .db 0x04, 0x2C, 0x00, 0x98, 0x08, 0xE0, 0x0A, 0xEF, 0x08, 0x8B, 0x06, 0x8F, 0x08, 0xBD, 0x0B, 0xE0
+        .db 0x0A, 0xEF, 0x08, 0x8B, 0x06, 0x28, 0x08, 0xE9, 0x0A, 0xEF, 0x08, 0x14, 0x0B, 0xBE, 0x04, 0x08
+        .db 0x00, 0xD8, 0x09, 0xE9, 0x0A, 0xBF, 0x08, 0xC2, 0x07, 0x9F, 0x04, 0xC6, 0xFF, 0xC2, 0x07, 0x82
+        .db 0x07, 0x86, 0x4E, 0x55, 0x4D, 0x42, 0x45, 0xD2, 0x54, 0x10, 0x4C, 0x09, 0xD0, 0x09, 0xD0, 0x09
+        .db 0xBD, 0x0B, 0xB0, 0x08, 0x14, 0x0B, 0x04, 0x09, 0x64, 0x04, 0x2D, 0x79, 0x0B, 0xB0, 0x08, 0xB0
+        .db 0x07, 0x0F, 0x08, 0x2A, 0x04, 0xFF, 0xFF, 0xE9, 0x0A, 0x13, 0x09, 0x5F, 0x10, 0xB0, 0x08, 0x04
+        .db 0x09, 0xF1, 0x09, 0x6D, 0x0B, 0xBE, 0x04, 0x15, 0x00, 0xB0, 0x08, 0x04, 0x09, 0x64, 0x04, 0x2E
+        .db 0x6D, 0x0B, 0xD0, 0x09, 0x84, 0x0C, 0xD0, 0x09, 0x9F, 0x04, 0xDD, 0xFF, 0x8F, 0x08, 0xC2, 0x07
+        .db 0xBE, 0x04, 0x04, 0x00, 0x67, 0x08, 0x82, 0x07, 0x85, 0x2D, 0x46, 0x49, 0x4E, 0xC4, 0xA1, 0x10
+        .db 0x4C, 0x09, 0xF1, 0x09, 0xE3, 0x0F, 0x30, 0x0B, 0xF5, 0x0D, 0x30, 0x10, 0x30, 0x0B, 0xBE, 0x0A
+        .db 0xEF, 0x08, 0xEF, 0x08, 0x9A, 0x05, 0xB0, 0x08, 0xE9, 0x07, 0xBE, 0x04, 0x0A, 0x00, 0x8F, 0x08
+        .db 0x30, 0x0B, 0x1B, 0x0C, 0x9A, 0x05, 0x82, 0x07, 0x87, 0x28, 0x41, 0x42, 0x4F, 0x52, 0x54, 0xA9
+        .db 0xF8, 0x10, 0x4C, 0x09, 0x90, 0x13, 0x82, 0x07, 0x85, 0x45, 0x52, 0x52, 0x4F, 0xD2, 0x28, 0x11
+        .db 0x4C, 0x09, 0x61, 0x0A, 0xEF, 0x08, 0xFE, 0x07, 0xBE, 0x04, 0x04, 0x00, 0x32, 0x11, 0x30, 0x0B
+        .db 0xF5, 0x0D, 0x08, 0x0E, 0x69, 0x0E, 0x04, 0x20, 0x20, 0x3F, 0x20, 0xDF, 0x16, 0x5E, 0x07, 0x8F
+        .db 0x08, 0x8F, 0x08, 0x93, 0x0A, 0xEF, 0x08, 0x8B, 0x0A, 0xEF, 0x08, 0x61, 0x13, 0x82, 0x07, 0x83
+        .db 0x49, 0x44, 0xAE, 0x38, 0x11, 0x4C, 0x09, 0xD1, 0x0F, 0x64, 0x04, 0x20, 0x64, 0x04, 0x5F, 0x79
+        .db 0x0F, 0xB0, 0x08, 0x5D, 0x0C, 0x2B, 0x0C, 0x7E, 0x08, 0x6D, 0x0B, 0xD1, 0x0F, 0x98, 0x08, 0x66
+        .db 0x06, 0xD1, 0x0F, 0xF5, 0x0D, 0x64, 0x04, 0x1F, 0x0E, 0x07, 0x08, 0x0E, 0xD1, 0x0B, 0x82, 0x07
+        .db 0x86, 0x43, 0x52, 0x45, 0x41, 0x54, 0xC5, 0x6F, 0x11, 0x4C, 0x09, 0x49, 0x0A, 0x30, 0x0B, 0x64
+        .db 0x04, 0xA0, 0x0F, 0x08, 0x86, 0x0B, 0xE0, 0x09, 0x84, 0x0C, 0x00, 0x11, 0xBE, 0x04, 0x0F, 0x00
+        .db 0x8F, 0x08, 0x48, 0x0C, 0x75, 0x11, 0x64, 0x04, 0x04, 0xDF, 0x16, 0xD1, 0x0B, 0x30, 0x0B, 0xB0
+        .db 0x08, 0x04, 0x09, 0x54, 0x0A, 0xEF, 0x08, 0x45, 0x14, 0x14, 0x0B, 0x40, 0x0B, 0x74, 0x0A, 0x04
+        .db 0x09, 0x64, 0x04, 0xFD, 0x79, 0x0B, 0x40, 0x0B, 0xB0, 0x08, 0x64, 0x04, 0xA0, 0xE0, 0x08, 0x30
+        .db 0x0B, 0xD8, 0x09, 0x6D, 0x0B, 0x64, 0x04, 0x80, 0xE0, 0x08, 0x1B, 0x0C, 0x4C, 0x0B, 0xCB, 0x0A
+        .db 0xEF, 0x08, 0x13, 0x09, 0x30, 0x0B, 0x21, 0x0B, 0x4C, 0x0B, 0x82, 0x07, 0xC9, 0x5B, 0x43, 0x4F
+        .db 0x4D, 0x50, 0x49, 0x4C, 0x45, 0xDD, 0xA0, 0x11, 0x4C, 0x09, 0x00, 0x11, 0xE9, 0x07, 0xD0, 0x09
+        .db 0x84, 0x0C, 0x8F, 0x08, 0x3A, 0x0C, 0x4C, 0x0B, 0x82, 0x07, 0xC7, 0x4C, 0x49, 0x54, 0x45, 0x52
+        .db 0x41, 0xCC, 0x0C, 0x12, 0x4C, 0x09, 0xD6, 0x0A, 0xEF, 0x08, 0xBE, 0x04, 0x08, 0x00, 0x12, 0x0D
+        .db 0x2A, 0x04, 0x4C, 0x0B, 0x82, 0x07, 0xC8, 0x44, 0x4C, 0x49, 0x54, 0x45, 0x52, 0x41, 0xCC, 0x2A
+        .db 0x12, 0x4C, 0x09, 0xD6, 0x0A, 0xEF, 0x08, 0xBE, 0x04, 0x08, 0x00, 0x98, 0x08, 0x34, 0x12, 0x34
+        .db 0x12, 0x82, 0x07, 0x86, 0x3F, 0x53, 0x54, 0x41, 0x43, 0xCB, 0x46, 0x12, 0x4C, 0x09, 0x64, 0x04
+        .db 0x9F, 0x4F, 0x07, 0x86, 0x0B, 0xD8, 0x09, 0x84, 0x0C, 0x4F, 0x07, 0x64, 0x04, 0x20, 0x86, 0x0B
+        .db 0x64, 0x04, 0x07, 0x84, 0x0C, 0x82, 0x07, 0x89, 0x49, 0x4E, 0x54, 0x45, 0x52, 0x50, 0x52, 0x45
+        .db 0xD4, 0x63, 0x12, 0x4C, 0x09, 0x00, 0x11, 0xBE, 0x04, 0x1E, 0x00, 0xD6, 0x0A, 0xEF, 0x08, 0x92
+        .db 0x0B, 0xBE, 0x04, 0x0A, 0x00, 0x3A, 0x0C, 0x4C, 0x0B, 0x9F, 0x04, 0x06, 0x00, 0x3A, 0x0C, 0x87
+        .db 0x04, 0x6C, 0x12, 0x9F, 0x04, 0x1C, 0x00, 0x30, 0x0B, 0xAA, 0x10, 0xE9, 0x0A, 0xEF, 0x08, 0x14
+        .db 0x0B, 0xBE, 0x04, 0x08, 0x00, 0x51, 0x12, 0x9F, 0x04, 0x06, 0x00, 0x8F, 0x08, 0x34, 0x12, 0x6C
+        .db 0x12, 0x9F, 0x04, 0xC2, 0xFF, 0x89, 0x49, 0x4D, 0x4D, 0x45, 0x44, 0x49, 0x41, 0x54, 0xC5, 0x87
+        .db 0x12, 0x4C, 0x09, 0x1B, 0x0C, 0x64, 0x04, 0x40, 0xE0, 0x08, 0x82, 0x07, 0x8A, 0x56, 0x4F, 0x43
+        .db 0x41, 0x42, 0x55, 0x4C, 0x41, 0x52, 0xD9, 0xD5, 0x12, 0x4C, 0x09, 0xB3, 0x0D, 0x2A, 0x04, 0x81
+        .db 0xA0, 0x4C, 0x0B, 0xCB, 0x0A, 0xEF, 0x08, 0x3A, 0x0C, 0x4C, 0x0B, 0x30, 0x0B, 0x82, 0x0A, 0xEF
+        .db 0x08, 0x4C, 0x0B, 0x82, 0x0A, 0x13, 0x09, 0xC3, 0x0D, 0x21, 0x0B, 0xBE, 0x0A, 0x13, 0x09, 0x82
+        .db 0x07, 0xC5, 0x46, 0x4F, 0x52, 0x54, 0xC8, 0xEC, 0x12, 0xCF, 0x0D, 0x19, 0x13, 0x81, 0xA0, 0x5A
+        .db 0x1B, 0x00, 0x00, 0x8B, 0x44, 0x45, 0x46, 0x49, 0x4E, 0x49, 0x54, 0x49, 0x4F, 0x4E, 0xD3, 0x21
+        .db 0x13, 0x4C, 0x09, 0xBE, 0x0A, 0xEF, 0x08, 0xCB, 0x0A, 0x13, 0x09, 0x82, 0x07, 0xC1, 0xA8, 0x33
+        .db 0x13, 0x4C, 0x09, 0x64, 0x04, 0x29, 0xE3, 0x0F, 0x82, 0x07, 0x84, 0x51, 0x55, 0x49, 0xD4, 0x4D
+        .db 0x13, 0x4C, 0x09, 0xD0, 0x09, 0x8B, 0x0A, 0x13, 0x09, 0x28, 0x0D, 0x6E, 0x07, 0x5C, 0x06, 0x23
+        .db 0x0F, 0x93, 0x12, 0xD6, 0x0A, 0xEF, 0x08, 0xE9, 0x07, 0xBE, 0x04, 0x07, 0x00, 0x69, 0x0E, 0x02
+        .db 0x4F, 0x4B, 0x9F, 0x04, 0xE7, 0xFF, 0x82, 0x07, 0x85, 0x41, 0x42, 0x4F, 0x52, 0xD4, 0x5A, 0x13
+        .db 0x4C, 0x09, 0x5E, 0x07, 0x70, 0x0D, 0xDB, 0x15, 0x5C, 0x06, 0x69, 0x0E, 0x0E, 0x66, 0x69, 0x67
+        .db 0x2D, 0x46, 0x4F, 0x52, 0x54, 0x48, 0x20, 0x20, 0x31, 0x2E, 0x30, 0x29, 0x13, 0x41, 0x13, 0x61
+        .db 0x13, 0x84, 0x43, 0x4F, 0x4C, 0xC4, 0x88, 0x13, 0xBA, 0x13, 0xAD, 0x0C, 0x04, 0x8D, 0x2F, 0x13
+        .db 0xAD, 0x0D, 0x04, 0x8D, 0x30, 0x13, 0xA0, 0x15, 0xD0, 0x02, 0xA0, 0x0F, 0xAD, 0x10, 0x04, 0x85
+        .db 0xB4, 0xAD, 0x11, 0x04, 0x85, 0xB5, 0xB9, 0x0C, 0x04, 0x91, 0xB4, 0x88, 0x10, 0xF8, 0xA9, 0x13
+        .db 0x85, 0xB0, 0xA9, 0x92, 0x85, 0xAF, 0xD8, 0xA9, 0x6C, 0x85, 0xB1, 0x4C, 0x70, 0x07, 0x84, 0x53
+        .db 0x2D, 0x3E, 0xC4, 0xB1, 0x13, 0x4C, 0x09, 0xB0, 0x08, 0xFE, 0x07, 0x4E, 0x08, 0x82, 0x07, 0x82
+        .db 0x2B, 0xAD, 0xEE, 0x13, 0x4C, 0x09, 0xFE, 0x07, 0xBE, 0x04, 0x04, 0x00, 0x4E, 0x08, 0x82, 0x07
+        .db 0x83, 0x44, 0x2B, 0xAD, 0xFF, 0x13, 0x4C, 0x09, 0xFE, 0x07, 0xBE, 0x04, 0x04, 0x00, 0x67, 0x08
+        .db 0x82, 0x07, 0x83, 0x41, 0x42, 0xD3, 0x10, 0x14, 0x4C, 0x09, 0xB0, 0x08, 0x04, 0x14, 0x82, 0x07
+        .db 0x84, 0x44, 0x41, 0x42, 0xD3, 0x22, 0x14, 0x4C, 0x09, 0xB0, 0x08, 0x16, 0x14, 0x82, 0x07, 0x83
+        .db 0x4D, 0x49, 0xCE, 0x30, 0x14, 0x4C, 0x09, 0x7E, 0x08, 0x7E, 0x08, 0xAF, 0x0B, 0xBE, 0x04, 0x04
+        .db 0x00, 0x98, 0x08, 0x8F, 0x08, 0x82, 0x07, 0x83, 0x4D, 0x41, 0xD8, 0x3F, 0x14, 0x4C, 0x09, 0x7E
+        .db 0x08, 0x7E, 0x08, 0x92, 0x0B, 0xBE, 0x04, 0x04, 0x00, 0x98, 0x08, 0x8F, 0x08, 0x82, 0x07, 0x82
+        .db 0x4D, 0xAA, 0x57, 0x14, 0x4C, 0x09, 0x7E, 0x08, 0x7E, 0x08, 0x39, 0x07, 0xB0, 0x07, 0x28, 0x14
+        .db 0x98, 0x08, 0x28, 0x14, 0x8B, 0x06, 0xC2, 0x07, 0x16, 0x14, 0x82, 0x07, 0x82, 0x4D, 0xAF, 0x6F
+        .db 0x14, 0x4C, 0x09, 0x7E, 0x08, 0xB0, 0x07, 0xB0, 0x07, 0x37, 0x14, 0xD3, 0x07, 0x28, 0x14, 0xBE
+        .db 0x06, 0xC2, 0x07, 0xD3, 0x07, 0x39, 0x07, 0x04, 0x14, 0x98, 0x08, 0xC2, 0x07, 0x04, 0x14, 0x98
+        .db 0x08, 0x82, 0x07, 0x81, 0xAA, 0x8C, 0x14, 0x4C, 0x09, 0x8B, 0x06, 0x8F, 0x08, 0x82, 0x07, 0x84
+        .db 0x2F, 0x4D, 0x4F, 0xC4, 0xB3, 0x14, 0x4C, 0x09, 0xB0, 0x07, 0xF5, 0x13, 0xC2, 0x07, 0x91, 0x14
+        .db 0x82, 0x07, 0x81, 0xAF, 0xBF, 0x14, 0x4C, 0x09, 0xC6, 0x14, 0x98, 0x08, 0x8F, 0x08, 0x82, 0x07
+        .db 0x83, 0x4D, 0x4F, 0xC4, 0xD2, 0x14, 0x4C, 0x09, 0xC6, 0x14, 0x8F, 0x08, 0x82, 0x07, 0x85, 0x2A
+        .db 0x2F, 0x4D, 0x4F, 0xC4, 0xE0, 0x14, 0x4C, 0x09, 0xB0, 0x07, 0x74, 0x14, 0xC2, 0x07, 0x91, 0x14
+        .db 0x82, 0x07, 0x82, 0x2A, 0xAF, 0xEE, 0x14, 0x4C, 0x09, 0xF6, 0x14, 0x98, 0x08, 0x8F, 0x08, 0x82
+        .db 0x07, 0x85, 0x4D, 0x2F, 0x4D, 0x4F, 0xC4, 0x02, 0x15, 0x4C, 0x09, 0xB0, 0x07, 0xD0, 0x09, 0xD3
+        .db 0x07, 0xBE, 0x06, 0xC2, 0x07, 0x98, 0x08, 0xB0, 0x07, 0xBE, 0x06, 0xC2, 0x07, 0x82, 0x07, 0x83
+        .db 0x55, 0x53, 0xC5, 0x11, 0x15, 0xA4, 0x09, 0x60, 0x3A, 0x84, 0x50, 0x52, 0x45, 0xD6, 0x2F, 0x15
+        .db 0xA4, 0x09, 0x60, 0x3A, 0x84, 0x2B, 0x42, 0x55, 0xC6, 0x39, 0x15, 0x4C, 0x09, 0x2A, 0x04, 0x84
+        .db 0x00, 0x0F, 0x08, 0xB0, 0x08, 0x13, 0x0A, 0x79, 0x0B, 0xBE, 0x04, 0x06, 0x00, 0x8F, 0x08, 0x07
+        .db 0x0A, 0xB0, 0x08, 0x40, 0x15, 0xEF, 0x08, 0x6D, 0x0B, 0x82, 0x07, 0x86, 0x55, 0x50, 0x44, 0x41
+        .db 0x54, 0xC5, 0x44, 0x15, 0x4C, 0x09, 0x40, 0x15, 0xEF, 0x08, 0xEF, 0x08, 0x2A, 0x04, 0x00, 0x80
+        .db 0x23, 0x07, 0x40, 0x15, 0xEF, 0x08, 0x13, 0x09, 0x82, 0x07, 0x85, 0x46, 0x4C, 0x55, 0x53, 0xC8
+        .db 0x6B, 0x15, 0x4C, 0x09, 0x13, 0x0A, 0x07, 0x0A, 0x6D, 0x0B, 0x1F, 0x0A, 0x64, 0x04, 0x04, 0x0F
+        .db 0x08, 0xD6, 0x14, 0x14, 0x0B, 0xD0, 0x09, 0x46, 0x05, 0x2A, 0x04, 0xFF, 0x7F, 0x00, 0x16, 0x8F
+        .db 0x08, 0xDF, 0x04, 0xF6, 0xFF, 0x82, 0x07, 0x8D, 0x45, 0x4D, 0x50, 0x54, 0x59, 0x2D, 0x42, 0x55
+        .db 0x46, 0x46, 0x45, 0x52, 0xD3, 0x8A, 0x15, 0x4C, 0x09, 0x07, 0x0A, 0x13, 0x0A, 0x7E, 0x08, 0x6D
+        .db 0x0B, 0x99, 0x0F, 0x82, 0x07, 0x83, 0x44, 0x52, 0xB0, 0xB7, 0x15, 0x4C, 0x09, 0xD0, 0x09, 0xB1
+        .db 0x0A, 0x13, 0x09, 0x82, 0x07, 0x83, 0x44, 0x52, 0xB1, 0xD5, 0x15, 0x4C, 0x09, 0x2A, 0x04, 0x20
+        .db 0x03, 0xB1, 0x0A, 0x13, 0x09, 0x82, 0x07, 0x86, 0x42, 0x55, 0x46, 0x46, 0x45, 0xD2, 0xE5, 0x15
+        .db 0x4C, 0x09, 0x35, 0x15, 0xEF, 0x08, 0xB0, 0x08, 0xB0, 0x07, 0x4B, 0x15, 0xBE, 0x04, 0xFC, 0xFF
+        .db 0x35, 0x15, 0x13, 0x09, 0xD3, 0x07, 0xEF, 0x08, 0xFE, 0x07, 0xBE, 0x04, 0x14, 0x00, 0xD3, 0x07
+        .db 0x21, 0x0B, 0xD3, 0x07, 0xEF, 0x08, 0x2A, 0x04, 0xFF, 0x7F, 0x0E, 0x07, 0xD0, 0x09, 0xA0, 0x17
+        .db 0xD3, 0x07, 0x13, 0x09, 0xD3, 0x07, 0x40, 0x15, 0x13, 0x09, 0xC2, 0x07, 0x21, 0x0B, 0x82, 0x07
+        .db 0x85, 0x42, 0x4C, 0x4F, 0x43, 0xCB, 0xF7, 0x15, 0x4C, 0x09, 0xB1, 0x0A, 0xEF, 0x08, 0x0F, 0x08
+        .db 0xB0, 0x07, 0x40, 0x15, 0xEF, 0x08, 0xB0, 0x08, 0xEF, 0x08, 0xD3, 0x07, 0x6D, 0x0B, 0xB0, 0x08
+        .db 0x0F, 0x08, 0xBE, 0x04, 0x34, 0x00, 0x4B, 0x15, 0xE9, 0x07, 0xBE, 0x04, 0x14, 0x00, 0x8F, 0x08
+        .db 0xD3, 0x07, 0x00, 0x16, 0xB0, 0x08, 0xD3, 0x07, 0xD8, 0x09, 0xA0, 0x17, 0xE0, 0x09, 0x6D, 0x0B
+        .db 0xB0, 0x08, 0xEF, 0x08, 0xD3, 0x07, 0x6D, 0x0B, 0xB0, 0x08, 0x0F, 0x08, 0xE9, 0x07, 0xBE, 0x04
+        .db 0xD6, 0xFF, 0xB0, 0x08, 0x40, 0x15, 0x13, 0x09, 0xC2, 0x07, 0x8F, 0x08, 0x21, 0x0B, 0x82, 0x07
+        .db 0x86, 0x28, 0x4C, 0x49, 0x4E, 0x45, 0xA9, 0x40, 0x16, 0x4C, 0x09, 0xB0, 0x07, 0xFB, 0x09, 0x1F
+        .db 0x0A, 0xF6, 0x14, 0xC2, 0x07, 0x2B, 0x0A, 0xB7, 0x14, 0x0F, 0x08, 0x48, 0x16, 0x0F, 0x08, 0xFB
+        .db 0x09, 0x82, 0x07, 0x85, 0x2E, 0x4C, 0x49, 0x4E, 0xC5, 0xA0, 0x16, 0x4C, 0x09, 0xA9, 0x16, 0x36
+        .db 0x0E, 0x08, 0x0E, 0x82, 0x07, 0x87, 0x4D, 0x45, 0x53, 0x53, 0x41, 0x47, 0xC5, 0xC3, 0x16, 0x4C
+        .db 0x09, 0x61, 0x0A, 0xEF, 0x08, 0xBE, 0x04, 0x1B, 0x00, 0xE0, 0x0B, 0xBE, 0x04, 0x11, 0x00, 0x64
+        .db 0x04, 0x04, 0xB1, 0x0A, 0xEF, 0x08, 0x2B, 0x0A, 0xD6, 0x14, 0x6D, 0x0B, 0xCB, 0x16, 0x9F, 0x04
+        .db 0x0D, 0x00, 0x69, 0x0E, 0x06, 0x4D, 0x53, 0x47, 0x20, 0x23, 0x20, 0x53, 0x1A, 0x82, 0x07, 0x84
+        .db 0x4C, 0x4F, 0x41, 0xC4, 0xD5, 0x16, 0x4C, 0x09, 0x8B, 0x0A, 0xEF, 0x08, 0xB0, 0x07, 0x93, 0x0A
+        .db 0xEF, 0x08, 0xB0, 0x07, 0xD0, 0x09, 0x93, 0x0A, 0x13, 0x09, 0x2B, 0x0A, 0xB7, 0x14, 0x8B, 0x0A
+        .db 0x13, 0x09, 0x93, 0x12, 0xC2, 0x07, 0x93, 0x0A, 0x13, 0x09, 0xC2, 0x07, 0x8B, 0x0A, 0x13, 0x09
+        .db 0x82, 0x07, 0xC3, 0x2D, 0x2D, 0xBE, 0x0F, 0x17, 0x4C, 0x09, 0xF9, 0x0C, 0xD0, 0x09, 0x93, 0x0A
+        .db 0x13, 0x09, 0x2B, 0x0A, 0x8B, 0x0A, 0xEF, 0x08, 0x7E, 0x08, 0xE6, 0x14, 0x6D, 0x0B, 0x8B, 0x0A
+        .db 0xBF, 0x08, 0x82, 0x07, 0xB5, 0x00, 0x20, 0xF4, 0xA4, 0x4C, 0x56, 0x05, 0x20, 0xDC, 0xA4, 0x4C
+        .db 0x52, 0x07, 0x20, 0x0A, 0xA5, 0xA9, 0x00, 0x2A, 0x4C, 0x52, 0x07, 0x20, 0x01, 0xA5, 0x4C, 0x44
+        .db 0x04, 0x84, 0x2D, 0x42, 0x43, 0xC4, 0x42, 0x17, 0x4C, 0x09, 0xD0, 0x09, 0x64, 0x04, 0x0A, 0xBE
+        .db 0x06, 0x64, 0x04, 0x10, 0xB7, 0x14, 0x23, 0x07, 0x82, 0x07, 0x83, 0x52, 0x53, 0xD7, 0x81, 0x17
+        .db 0x4C, 0x09, 0xB0, 0x07, 0x1F, 0x0A, 0xB7, 0x14, 0x2A, 0x04, 0x00, 0x40, 0x0F, 0x08, 0xB0, 0x08
+        .db 0x2A, 0x04, 0x00, 0x68, 0xAF, 0x0B, 0x2A, 0x04, 0x06, 0x00, 0x84, 0x0C, 0xC2, 0x07, 0xBE, 0x04
+        .db 0x04, 0x00, 0x98, 0x08, 0x1F, 0x0A, 0x66, 0x06, 0x82, 0x07, 0xC1, 0xA7, 0x9A, 0x17, 0x4C, 0x09
+        .db 0x00, 0x11, 0xE9, 0x07, 0xD0, 0x09, 0x84, 0x0C, 0x8F, 0x08, 0x34, 0x12, 0x82, 0x07, 0x86, 0x46
+        .db 0x4F, 0x52, 0x47, 0x45, 0xD4, 0xCA, 0x17, 0x4C, 0x09, 0xCE, 0x17, 0x48, 0x0C, 0xB0, 0x08, 0x6C
+        .db 0x0A, 0xEF, 0x08, 0x86, 0x0B, 0x64, 0x04, 0x15, 0x84, 0x0C, 0xB0, 0x07, 0x82, 0x0A, 0xEF, 0x08
+        .db 0xD3, 0x07, 0x7E, 0x08, 0x86, 0x0B, 0xBE, 0x04, 0x12, 0x00, 0x29, 0x13, 0x41, 0x13, 0xEF, 0x08
+        .db 0xB0, 0x08, 0x82, 0x0A, 0x13, 0x09, 0x9F, 0x04, 0xE8, 0xFF, 0xB0, 0x08, 0x64, 0x04, 0x04, 0x6D
+        .db 0x0B, 0x5D, 0x0C, 0x2B, 0x0C, 0xEF, 0x08, 0xB0, 0x08, 0xD3, 0x07, 0x86, 0x0B, 0xBE, 0x04, 0xF2
+        .db 0xFF, 0x7E, 0x08, 0xE0, 0x09, 0x6D, 0x0B, 0x13, 0x09, 0xEF, 0x08, 0xE0, 0x0B, 0xE9, 0x07, 0xBE
+        .db 0x04, 0xD9, 0xFF, 0xC2, 0x07, 0x74, 0x0A, 0x13, 0x09, 0x82, 0x07, 0x84, 0x42, 0x41, 0x43, 0xCB
+        .db 0xDE, 0x17, 0x4C, 0x09, 0x30, 0x0B, 0x6D, 0x0B, 0x4C, 0x0B, 0x82, 0x07, 0xC5, 0x42, 0x45, 0x47
+        .db 0x49, 0xCE, 0x4B, 0x18, 0x4C, 0x09, 0x9E, 0x0C, 0x30, 0x0B, 0xD8, 0x09, 0x82, 0x07, 0xC5, 0x45
+        .db 0x4E, 0x44, 0x49, 0xC6, 0x5C, 0x18, 0x4C, 0x09, 0x9E, 0x0C, 0xE0, 0x09, 0xCB, 0x0C, 0x30, 0x0B
+        .db 0x7E, 0x08, 0x6D, 0x0B, 0x98, 0x08, 0x13, 0x09, 0x82, 0x07, 0xC4, 0x54, 0x48, 0x45, 0xCE, 0x6E
+        .db 0x18, 0x4C, 0x09, 0x76, 0x18, 0x82, 0x07, 0xC2, 0x44, 0xCF, 0x8A, 0x18, 0x4C, 0x09, 0x12, 0x0D
+        .db 0x46, 0x05, 0x30, 0x0B, 0xE8, 0x09, 0x82, 0x07, 0xC4, 0x4C, 0x4F, 0x4F, 0xD0, 0x97, 0x18, 0x4C
+        .db 0x09, 0xE8, 0x09, 0xCB, 0x0C, 0x12, 0x0D, 0xDF, 0x04, 0x52, 0x18, 0x82, 0x07, 0xC5, 0x2B, 0x4C
+        .db 0x4F, 0x4F, 0xD0, 0xA8, 0x18, 0x4C, 0x09, 0xE8, 0x09, 0xCB, 0x0C, 0x12, 0x0D, 0x0F, 0x05, 0x52
+        .db 0x18, 0x82, 0x07, 0xC5, 0x55, 0x4E, 0x54, 0x49, 0xCC, 0xBD, 0x18, 0x4C, 0x09, 0xD8, 0x09, 0xCB
+        .db 0x0C, 0x12, 0x0D, 0xBE, 0x04, 0x52, 0x18, 0x82, 0x07, 0xC3, 0x45, 0x4E, 0xC4, 0xD3, 0x18, 0x4C
+        .db 0x09, 0xDB, 0x18, 0x82, 0x07, 0xC5, 0x41, 0x47, 0x41, 0x49, 0xCE, 0xE9, 0x18, 0x4C, 0x09, 0xD8
+        .db 0x09, 0xCB, 0x0C, 0x12, 0x0D, 0x9F, 0x04, 0x52, 0x18, 0x82, 0x07, 0xC6, 0x52, 0x45, 0x50, 0x45
+        .db 0x41, 0xD4, 0xF5, 0x18, 0x4C, 0x09, 0xB0, 0x07, 0xB0, 0x07, 0xFD, 0x18, 0xC2, 0x07, 0xC2, 0x07
+        .db 0xE0, 0x09, 0x6D, 0x0B, 0x76, 0x18, 0x82, 0x07, 0xC2, 0x49, 0xC6, 0x0B, 0x19, 0x4C, 0x09, 0x12
+        .db 0x0D, 0xBE, 0x04, 0x30, 0x0B, 0xD0, 0x09, 0x4C, 0x0B, 0xE0, 0x09, 0x82, 0x07, 0xC4, 0x45, 0x4C
+        .db 0x53, 0xC5, 0x28, 0x19, 0x4C, 0x09, 0xE0, 0x09, 0xCB, 0x0C, 0x12, 0x0D, 0x9F, 0x04, 0x30, 0x0B
+        .db 0xD0, 0x09, 0x4C, 0x0B, 0x98, 0x08, 0xE0, 0x09, 0x76, 0x18, 0xE0, 0x09, 0x82, 0x07, 0xC5, 0x57
+        .db 0x48, 0x49, 0x4C, 0xC5, 0x3D, 0x19, 0x4C, 0x09, 0x2D, 0x19, 0x21, 0x0B, 0x82, 0x07, 0x86, 0x53
+        .db 0x50, 0x41, 0x43, 0x45, 0xD3, 0x5E, 0x19, 0x4C, 0x09, 0xD0, 0x09, 0x5D, 0x14, 0xE0, 0x0B, 0xBE
+        .db 0x04, 0x0C, 0x00, 0xD0, 0x09, 0x46, 0x05, 0xD1, 0x0B, 0xDF, 0x04, 0xFC, 0xFF, 0x82, 0x07, 0x82
+        .db 0x3C, 0xA3, 0x6E, 0x19, 0x4C, 0x09, 0xD1, 0x0F, 0x0C, 0x0B, 0x13, 0x09, 0x82, 0x07, 0x82, 0x23
+        .db 0xBE, 0x8F, 0x19, 0x4C, 0x09, 0x8F, 0x08, 0x8F, 0x08, 0x0C, 0x0B, 0xEF, 0x08, 0xD1, 0x0F, 0x7E
+        .db 0x08, 0x6D, 0x0B, 0x82, 0x07, 0x84, 0x53, 0x49, 0x47, 0xCE, 0x9E, 0x19, 0x4C, 0x09, 0xBD, 0x0B
+        .db 0xFE, 0x07, 0xBE, 0x04, 0x07, 0x00, 0x64, 0x04, 0x2D, 0xB9, 0x0F, 0x82, 0x07, 0x81, 0xA3, 0xB5
+        .db 0x19, 0x4C, 0x09, 0xE0, 0x0A, 0xEF, 0x08, 0x19, 0x15, 0xBD, 0x0B, 0x64, 0x04, 0x09, 0x7E, 0x08
+        .db 0x92, 0x0B, 0xBE, 0x04, 0x07, 0x00, 0x64, 0x04, 0x07, 0x0F, 0x08, 0x64, 0x04, 0x30, 0x0F, 0x08
+        .db 0xB9, 0x0F, 0x82, 0x07, 0x82, 0x23, 0xD3, 0xCD, 0x19, 0x4C, 0x09, 0xD1, 0x19, 0x7E, 0x08, 0x7E
+        .db 0x08, 0x23, 0x07, 0xE9, 0x07, 0xBE, 0x04, 0xF4, 0xFF, 0x82, 0x07, 0x83, 0x44, 0x2E, 0xD2, 0xF4
+        .db 0x19, 0x4C, 0x09, 0xB0, 0x07, 0x98, 0x08, 0x7E, 0x08, 0x37, 0x14, 0x94, 0x19, 0xF9, 0x19, 0xBC
+        .db 0x19, 0xA3, 0x19, 0xC2, 0x07, 0x7E, 0x08, 0x6D, 0x0B, 0x77, 0x19, 0x08, 0x0E, 0x82, 0x07, 0x82
+        .db 0x44, 0xAE, 0x0B, 0x1A, 0x4C, 0x09, 0xD0, 0x09, 0x11, 0x1A, 0xD1, 0x0B, 0x82, 0x07, 0x82, 0x2E
+        .db 0xD2, 0x2F, 0x1A, 0x4C, 0x09, 0xB0, 0x07, 0xF5, 0x13, 0xC2, 0x07, 0x11, 0x1A, 0x82, 0x07, 0x81
+        .db 0xAE, 0x3E, 0x1A, 0x4C, 0x09, 0xF5, 0x13, 0x34, 0x1A, 0x82, 0x07, 0x81, 0xBF, 0x4F, 0x1A, 0x4C
+        .db 0x09, 0xEF, 0x08, 0x53, 0x1A, 0x82, 0x07, 0x84, 0x4C, 0x49, 0x53, 0xD4, 0x5B, 0x1A, 0x4C, 0x09
+        .db 0x70, 0x0D, 0x5C, 0x06, 0xB0, 0x08, 0xA5, 0x0A, 0x13, 0x09, 0x69, 0x0E, 0x06, 0x53, 0x43, 0x52
+        .db 0x20, 0x23, 0x20, 0x53, 0x1A, 0x64, 0x04, 0x10, 0xD0, 0x09, 0x46, 0x05, 0x5C, 0x06, 0x5F, 0x05
+        .db 0xE8, 0x09, 0x43, 0x1A, 0xD1, 0x0B, 0x5F, 0x05, 0xA5, 0x0A, 0xEF, 0x08, 0xCB, 0x16, 0xDF, 0x04
+        .db 0xEC, 0xFF, 0x5C, 0x06, 0x82, 0x07, 0x85, 0x49, 0x4E, 0x44, 0x45, 0xD8, 0x67, 0x1A, 0x4C, 0x09
+        .db 0x5C, 0x06, 0x14, 0x0B, 0x98, 0x08, 0x46, 0x05, 0x5C, 0x06, 0x5F, 0x05, 0xE8, 0x09, 0x43, 0x1A
+        .db 0xD1, 0x0B, 0xD0, 0x09, 0x5F, 0x05, 0xCB, 0x16, 0x55, 0x06, 0xBE, 0x04, 0x04, 0x00, 0x95, 0x07
+        .db 0xDF, 0x04, 0xE6, 0xFF, 0x64, 0x04, 0x0C, 0x3F, 0x06, 0x82, 0x07, 0x85, 0x54, 0x52, 0x49, 0x41
+        .db 0xC4, 0xA6, 0x1A, 0x4C, 0x09, 0xE8, 0x09, 0xD6, 0x14, 0xE8, 0x09, 0xB7, 0x14, 0xE8, 0x09, 0x7E
+        .db 0x08, 0x0F, 0x08, 0x98, 0x08, 0x46, 0x05, 0x5C, 0x06, 0x5F, 0x05, 0x6E, 0x1A, 0xDF, 0x04, 0xF8
+        .db 0xFF, 0x5C, 0x06, 0x64, 0x04, 0x0F, 0xDF, 0x16, 0x5C, 0x06, 0x64, 0x04, 0x0C, 0x3F, 0x06, 0x82
+        .db 0x07, 0x85, 0x56, 0x4C, 0x49, 0x53, 0xD4, 0xDB, 0x1A, 0x4C, 0x09, 0x64, 0x04, 0x80, 0x9C, 0x0A
+        .db 0x13, 0x09, 0xBE, 0x0A, 0xEF, 0x08, 0xEF, 0x08, 0x9C, 0x0A, 0xEF, 0x08, 0xFB, 0x09, 0xAF, 0x0B
+        .db 0xBE, 0x04, 0x0A, 0x00, 0x5C, 0x06, 0xD0, 0x09, 0x9C, 0x0A, 0x13, 0x09, 0xB0, 0x08, 0x75, 0x11
+        .db 0xD1, 0x0B, 0xD1, 0x0B, 0x5D, 0x0C, 0x2B, 0x0C, 0xEF, 0x08, 0xB0, 0x08, 0xE9, 0x07, 0x55, 0x06
+        .db 0x23, 0x07, 0xBE, 0x04, 0xD4, 0xFF, 0x8F, 0x08, 0x82, 0x07, 0x83, 0x4D, 0x4F, 0xCE, 0x11, 0x1B
+        .db 0x62, 0x1B, 0x6C, 0xF7, 0x03, 0xA9, 0x00, 0x85, 0x00, 0xA9, 0x04, 0x85, 0x01, 0xA9, 0x00, 0x85
+        .db 0x02, 0xA9, 0xA6, 0x85, 0x03, 0xB2, 0x02, 0x92, 0x00, 0xE6, 0x00, 0xD0, 0x02, 0xE6, 0x01, 0xE6
+        .db 0x02, 0xD0, 0x02, 0xE6, 0x03, 0x38, 0xA9, 0x65, 0xA2, 0xBD, 0xE5, 0x02, 0x8A, 0xE5, 0x03, 0xB0
+        .db 0xE4, 0x4C, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0xA0, 0x04, 0xB9, 0xF6, 0xDE, 0x99, 0x00, 0x04, 0x88, 0x10, 0xF7, 0xA2, 0xFF, 0x86, 0x88, 0x9A
+        .db 0xA9, 0x4C, 0x85, 0xA1, 0xA2, 0x1C, 0xBD, 0xFA, 0xDE, 0x95, 0xBB, 0xCA, 0xD0, 0xF8, 0xA2, 0x12
+        .db 0xBD, 0x17, 0xDF, 0x95, 0x00, 0xCA, 0x10, 0xF8, 0xA9, 0x00, 0x85, 0xDC, 0x85, 0xDF, 0x85, 0xB2
+        .db 0x85, 0x67, 0xA9, 0x0E, 0x85, 0x64, 0xA9, 0x03, 0x85, 0xA0, 0xA2, 0x68, 0x86, 0x65, 0x20, 0x92
+        .db 0xC6, 0xA9, 0x2A, 0xA0, 0xDF, 0x20, 0xD3, 0xC6, 0x20, 0x40, 0xC0, 0x86, 0xC3, 0x84, 0xC4, 0x20
+        .db 0xC2, 0x00, 0xD0, 0x1F, 0xA0, 0x00, 0xE6, 0x11, 0xD0, 0x08, 0xE6, 0x12, 0xA5, 0x12, 0xC9, 0x3F
+        .db 0xF0, 0x1D, 0xA9, 0x55, 0x91, 0x11, 0xD1, 0x11, 0xD0, 0x15, 0x0A, 0x91, 0x11, 0xD1, 0x11, 0xF0
+        .db 0xE5, 0xD0, 0x0C, 0x20, 0xA6, 0xD7, 0xA5, 0xAC, 0xC9, 0x98, 0xB0, 0xA2, 0x20, 0xF7, 0xD2, 0xA5
+        .db 0x11, 0xA4, 0x12, 0xC0, 0x01, 0x90, 0x97, 0x85, 0x85, 0x84, 0x86, 0x85, 0x81, 0x84, 0x82, 0xA0
+        .db 0x00, 0xA2, 0x05, 0x84, 0x79, 0x86, 0x7A, 0x98, 0x91, 0x79, 0xE6, 0x79, 0x20, 0x92, 0xC6, 0x20
+        .db 0x50, 0xC1, 0xA5, 0x85, 0x38, 0xE5, 0x79, 0xAA, 0xA5, 0x86, 0xE5, 0x7A, 0x20, 0x82, 0xD8, 0xA9
+        .db 0x39, 0xA0, 0xDF, 0x20, 0xD3, 0xC6, 0xA9, 0x5A, 0xA0, 0xBF, 0x85, 0x01, 0x84, 0x02, 0x6C, 0x01
+        .db 0x00, 0x20, 0x0B, 0xBF, 0x85, 0x7F, 0x84, 0x80, 0x38, 0xA5, 0xA6, 0xE5, 0xAA, 0xA8, 0xA5, 0xA7
+        .db 0xE5, 0xAB, 0xAA, 0xE8, 0x98, 0xF0, 0x24, 0x38, 0x49, 0xFF, 0x65, 0xA6, 0x85, 0xA6, 0xB0, 0x03
+        .db 0xC6, 0xA7, 0x38, 0x98, 0x49, 0xFF, 0x65, 0xA4, 0x85, 0xA4, 0xB0, 0x08, 0xC6, 0xA5, 0x90, 0x04
+        .db 0xB1, 0xA6, 0x91, 0xA4, 0x88, 0xD0, 0xF9, 0xB1, 0xA6, 0x91, 0xA4, 0xC6, 0xA7, 0xC6, 0xA5, 0xCA
+        .db 0xD0, 0xF2, 0x60, 0x85, 0x78, 0xBA, 0xE4, 0x78, 0x90, 0x30, 0x60, 0xC4, 0x82, 0x90, 0x2A, 0xD0
+        .db 0x04, 0xC5, 0x81, 0x90, 0x24, 0x48, 0xA2, 0x08, 0x98, 0x48, 0xB5, 0xA3, 0xCA, 0x10, 0xFA, 0x20
+        .db 0xDF, 0xCF, 0xA2, 0x00, 0x68, 0x95, 0xA4, 0xE8, 0xE0, 0x08, 0x30, 0xF8, 0x68, 0xA8, 0x68, 0xC4
+        .db 0x82, 0x90, 0x06, 0xD0, 0x05, 0xC5, 0x81, 0xB0, 0x01, 0x60, 0xA2, 0x0C, 0x20, 0x92, 0xC6, 0xBD
+        .db 0xB2, 0xE4, 0xBC, 0xB3, 0xE4, 0x20, 0xD3, 0xC6, 0x20, 0x89, 0xC1, 0xA9, 0xEF, 0xA0, 0xE5, 0x20
+        .db 0xD3, 0xC6, 0xA4, 0x88, 0xC8, 0xF0, 0x03, 0x20, 0x77, 0xD8, 0xA9, 0x00, 0x85, 0xDF, 0x85, 0xDC
+        .db 0xA9, 0x00, 0xA0, 0xE6, 0x20, 0xD3, 0xC6, 0x20, 0x4D, 0xC0, 0x86, 0xC3, 0x84, 0xC4, 0x20, 0xC2
+        .db 0x00, 0xF0, 0xF4, 0xA2, 0xFF, 0x86, 0x88, 0x90, 0x06, 0x20, 0x7E, 0xC0, 0x4C, 0xF3, 0xC2, 0x20
+        .db 0x55, 0xC5, 0x20, 0x7E, 0xC0, 0x84, 0x5D, 0x20, 0x24, 0xC1, 0x90, 0x44, 0xA0, 0x01, 0xB1, 0xAA
+        .db 0x85, 0x72, 0xA5, 0x7B, 0x85, 0x71, 0xA5, 0xAB, 0x85, 0x74, 0xA5, 0xAA, 0x88, 0xF1, 0xAA, 0x18
+        .db 0x65, 0x7B, 0x85, 0x7B, 0x85, 0x73, 0xA5, 0x7C, 0x69, 0xFF, 0x85, 0x7C, 0xE5, 0xAB, 0xAA, 0x38
+        .db 0xA5, 0xAA, 0xE5, 0x7B, 0xA8, 0xB0, 0x03, 0xE8, 0xC6, 0x74, 0x18, 0x65, 0x71, 0x90, 0x03, 0xC6
+        .db 0x72, 0x18, 0xB1, 0x71, 0x91, 0x73, 0xC8, 0xD0, 0xF9, 0xE6, 0x72, 0xE6, 0x74, 0xCA, 0xD0, 0xF2
+        .db 0xAD, 0x0D, 0x04, 0xF0, 0x3F, 0xA5, 0x85, 0xA4, 0x86, 0x85, 0x81, 0x84, 0x82, 0xA5, 0x7B, 0x85
+        .db 0xA6, 0xA4, 0x7C, 0x84, 0xA7, 0x65, 0x5D, 0x90, 0x01, 0xC8, 0x85, 0xA4, 0x84, 0xA5, 0x20, 0xC1
+        .db 0xBE, 0xA5, 0x7F, 0xA4, 0x80, 0x85, 0x7B, 0x84, 0x7C, 0xA4, 0x5D, 0x88, 0xB9, 0x09, 0x04, 0x91
+        .db 0xAA, 0x88, 0xC0, 0x03, 0xD0, 0xF6, 0xA5, 0x12, 0x91, 0xAA, 0x88, 0xA5, 0x11, 0x91, 0xAA, 0x88
+        .db 0xA9, 0xFF, 0x91, 0xAA, 0x20, 0x65, 0xC1, 0xA6, 0x79, 0xA5, 0x7A, 0xA0, 0x01, 0x86, 0x71, 0x85
+        .db 0x72, 0xB1, 0x71, 0xF0, 0x18, 0xA0, 0x04, 0xC8, 0xB1, 0x71, 0xD0, 0xFB, 0x38, 0x98, 0x65, 0x71
+        .db 0xAA, 0xA0, 0x00, 0x91, 0x71, 0x98, 0x65, 0x72, 0xC8, 0x91, 0x71, 0x90, 0xE0, 0x4C, 0x67, 0xBF
+        .db 0x20, 0xEB, 0xC6, 0x20, 0xE8, 0xC6, 0xD0, 0x05, 0x20, 0xED, 0xC6, 0xCA, 0x2C, 0xA2, 0x00, 0x20
+        .db 0xEA, 0xDE, 0x90, 0xFB, 0xF0, 0xF9, 0xC9, 0x07, 0xF0, 0x10, 0xC9, 0x0D, 0xF0, 0x19, 0xE0, 0x00
+        .db 0xD0, 0x04, 0xC9, 0x21, 0x90, 0xE9, 0xC9, 0x08, 0xF0, 0xDE, 0xE0, 0x47, 0xB0, 0x0C, 0x9D, 0x0D
+        .db 0x04, 0xE8, 0x20, 0xED, 0xC6, 0xD0, 0xD8, 0x4C, 0x89, 0xC6, 0xA9, 0x07, 0xD0, 0xF4, 0xA0, 0xFF
+        .db 0x38, 0xA5, 0xC3, 0xE9, 0x0D, 0xAA, 0x86, 0x60, 0xBD, 0x0D, 0x04, 0xF0, 0x51, 0xC9, 0x5F, 0xB0
+        .db 0x4D, 0xC9, 0x3C, 0xB0, 0x0E, 0xC9, 0x30, 0xB0, 0x45, 0x85, 0x5C, 0xC9, 0x22, 0xF0, 0x61, 0xC9
+        .db 0x2A, 0x90, 0x3B, 0x24, 0x60, 0x70, 0x37, 0x86, 0x78, 0x84, 0xBA, 0xA0, 0x12, 0x84, 0x73, 0xA0
+        .db 0xE1, 0x84, 0x74, 0xA0, 0x00, 0xD1, 0x73, 0xF0, 0x05, 0x90, 0x21, 0xC8, 0xD0, 0xF7, 0x98, 0x0A
+        .db 0xAA, 0xBD, 0x30, 0xE1, 0x85, 0x73, 0xBD, 0x31, 0xE1, 0x85, 0x74, 0xA0, 0xFF, 0xA6, 0x78, 0xC8
+        .db 0xB1, 0x73, 0x30, 0x08, 0xE8, 0xDD, 0x0D, 0x04, 0xF0, 0xF5, 0xD0, 0x2B, 0xA4, 0xBA, 0xE8, 0xC8
+        .db 0x99, 0x0D, 0x04, 0xC9, 0x00, 0xF0, 0x32, 0xE9, 0x3A, 0xF0, 0x04, 0xC9, 0x49, 0xD0, 0x02, 0x85
+        .db 0x60, 0x49, 0x57, 0xD0, 0x93, 0x85, 0x5C, 0xBD, 0x0D, 0x04, 0xF0, 0xE2, 0xC5, 0x5C, 0xF0, 0xDE
+        .db 0xC8, 0x99, 0x0D, 0x04, 0xE8, 0xD0, 0xF0, 0xA6, 0x78, 0xB1, 0x73, 0x08, 0xC8, 0x28, 0x10, 0xF9
+        .db 0xB1, 0x73, 0xD0, 0xBE, 0xBD, 0x0D, 0x04, 0x10, 0xC3, 0xC8, 0xC8, 0x99, 0x0D, 0x04, 0xC8, 0xC8
+        .db 0xC8, 0xC6, 0xC3, 0x60, 0xA5, 0x79, 0xA6, 0x7A, 0xA0, 0x01, 0x85, 0xAA, 0x86, 0xAB, 0xB1, 0xAA
+        .db 0xF0, 0x1A, 0xA0, 0x03, 0xB1, 0xAA, 0x88, 0xC5, 0x12, 0xD0, 0x04, 0xB1, 0xAA, 0xC5, 0x11, 0xB0
+        .db 0x09, 0x88, 0xB1, 0xAA, 0xAA, 0x88, 0xB1, 0xAA, 0x90, 0xDE, 0xF0, 0x01, 0x18, 0x60, 0xD0, 0xFD
+        .db 0xA9, 0x00, 0xA8, 0x91, 0x79, 0xC8, 0x91, 0x79, 0x18, 0xA5, 0x79, 0x69, 0x02, 0x85, 0x7B, 0xA5
+        .db 0x7A, 0x69, 0x00, 0x85, 0x7C, 0x18, 0xA5, 0x79, 0x69, 0xFF, 0x85, 0xC3, 0xA5, 0x7A, 0x69, 0xFF
+        .db 0x85, 0xC4, 0xA5, 0x85, 0xA4, 0x86, 0x85, 0x81, 0x84, 0x82, 0xA5, 0x7B, 0xA4, 0x7C, 0x85, 0x7D
+        .db 0x84, 0x7E, 0x85, 0x7F, 0x84, 0x80, 0x20, 0x44, 0xC3, 0xA2, 0x68, 0x86, 0x65, 0x68, 0xAA, 0x68
+        .db 0x8E, 0xFE, 0x01, 0x8D, 0xFF, 0x01, 0xA2, 0xFD, 0x9A, 0xA9, 0x00, 0x85, 0x8C, 0x85, 0x61, 0x60
+        .db 0xF0, 0xD0, 0x60, 0x90, 0x06, 0xF0, 0x04, 0xC9, 0xB8, 0xD0, 0xF4, 0x20, 0x55, 0xC5, 0x20, 0x24
+        .db 0xC1, 0x20, 0xC2, 0x00, 0xF0, 0x0C, 0xC9, 0xB8, 0xD0, 0x93, 0x20, 0xBC, 0x00, 0x20, 0x55, 0xC5
+        .db 0xD0, 0x8B, 0xA5, 0x11, 0x05, 0x12, 0xD0, 0x06, 0xA9, 0xFF, 0x85, 0x11, 0x85, 0x12, 0xA0, 0x01
+        .db 0x84, 0x60, 0x20, 0x92, 0xC6, 0xB1, 0xAA, 0xF0, 0x3E, 0x20, 0x14, 0xC3, 0xC8, 0xB1, 0xAA, 0xAA
+        .db 0xC8, 0xB1, 0xAA, 0xC5, 0x12, 0xD0, 0x04, 0xE4, 0x11, 0xF0, 0x02, 0xB0, 0x2A, 0x84, 0x97, 0x20
+        .db 0x82, 0xD8, 0xA9, 0x20, 0xA4, 0x97, 0x29, 0x7F, 0x20, 0xED, 0xC6, 0xC9, 0x22, 0xD0, 0x06, 0xA5
+        .db 0x60, 0x49, 0xFF, 0x85, 0x60, 0xC8, 0xB1, 0xAA, 0xD0, 0x0E, 0xA8, 0xB1, 0xAA, 0xAA, 0xC8, 0xB1
+        .db 0xAA, 0x86, 0xAA, 0x85, 0xAB, 0xD0, 0xB7, 0x60, 0x10, 0xDE, 0x24, 0x60, 0x30, 0xDA, 0xA2, 0xE3
+        .db 0x0A, 0x0A, 0x90, 0x02, 0xE8, 0x18, 0x69, 0x16, 0x90, 0x01, 0xE8, 0x85, 0x73, 0x86, 0x74, 0x84
+        .db 0x97, 0xA0, 0x00, 0xB1, 0x73, 0xAA, 0xC8, 0xB1, 0x73, 0xCA, 0xF0, 0xB8, 0x20, 0xED, 0xC6, 0xC8
+        .db 0xB1, 0x73, 0x48, 0xC8, 0xB1, 0x73, 0xA0, 0x00, 0x85, 0x74, 0x68, 0x85, 0x73, 0xB1, 0x73, 0xCA
+        .db 0xF0, 0xA2, 0x20, 0xED, 0xC6, 0xC8, 0xD0, 0xF5, 0xA9, 0x80, 0x85, 0x61, 0x20, 0xB4, 0xC5, 0x68
+        .db 0x68, 0xA9, 0x10, 0x20, 0x03, 0xBF, 0x20, 0x9D, 0xC4, 0x18, 0x98, 0x65, 0xC3, 0x48, 0xA5, 0xC4
+        .db 0x69, 0x00, 0x48, 0xA5, 0x88, 0x48, 0xA5, 0x87, 0x48, 0xA9, 0xAE, 0x20, 0xF1, 0xC9, 0x20, 0xD0
+        .db 0xC8, 0x20, 0xCD, 0xC8, 0xA5, 0xB0, 0x09, 0x7F, 0x25, 0xAD, 0x85, 0xAD, 0xA9, 0x97, 0xA0, 0xC2
+        .db 0x85, 0x71, 0x84, 0x72, 0x4C, 0x84, 0xC9, 0xA9, 0xE0, 0xA0, 0xDF, 0x20, 0x7D, 0xD6, 0x20, 0xC2
+        .db 0x00, 0xC9, 0xB3, 0xD0, 0x06, 0x20, 0xBC, 0x00, 0x20, 0xCD, 0xC8, 0x20, 0xE9, 0xD6, 0x85, 0xB0
+        .db 0x20, 0x79, 0xC9, 0xA5, 0x98, 0x48, 0xA5, 0x97, 0x48, 0xA9, 0x81, 0x48, 0x20, 0x14, 0xC3, 0xA5
+        .db 0xC3, 0xA4, 0xC4, 0xA6, 0x88, 0xE8, 0xF0, 0x04, 0x85, 0x8B, 0x84, 0x8C, 0xA0, 0x00, 0xB1, 0xC3
+        .db 0xF0, 0x07, 0xC9, 0x3A, 0xF0, 0x1D, 0x4C, 0x02, 0xCA, 0xA0, 0x02, 0xB1, 0xC3, 0x18, 0xF0, 0x56
+        .db 0xC8, 0xB1, 0xC3, 0x85, 0x87, 0xC8, 0xB1, 0xC3, 0x85, 0x88, 0x98, 0x65, 0xC3, 0x85, 0xC3, 0x90
+        .db 0x02, 0xE6, 0xC4, 0x20, 0xBC, 0x00, 0x20, 0xFC, 0xC2, 0x4C, 0xBC, 0xC2, 0xF0, 0x54, 0x0A, 0xB0
+        .db 0x03, 0x4C, 0xB4, 0xC5, 0xC9, 0x58, 0xB0, 0xCE, 0xA8, 0xB9, 0x08, 0xE0, 0x48, 0xB9, 0x07, 0xE0
+        .db 0x48, 0x4C, 0xBC, 0x00, 0x6C, 0x03, 0x04, 0xC9, 0x03, 0xB0, 0x01, 0x18, 0xD0, 0x67, 0xA5, 0xC4
+        .db 0x49, 0x04, 0xF0, 0x10, 0x49, 0x04, 0xA4, 0xC3, 0x84, 0x8B, 0x85, 0x8C, 0xA5, 0x87, 0xA4, 0x88
+        .db 0x85, 0x89, 0x84, 0x8A, 0x68, 0x68, 0x90, 0x07, 0xA9, 0xE7, 0xA0, 0xE5, 0x4C, 0x4F, 0xBF, 0x4C
+        .db 0x5A, 0xBF, 0xD0, 0x0F, 0x38, 0xA5, 0x79, 0xE9, 0x01, 0xA4, 0x7A, 0xB0, 0x01, 0x88, 0x85, 0x8F
+        .db 0x84, 0x90, 0x60, 0x20, 0x55, 0xC5, 0x20, 0xA0, 0xC4, 0xA5, 0x88, 0xC5, 0x12, 0xB0, 0x0B, 0x98
+        .db 0x38, 0x65, 0xC3, 0xA6, 0xC4, 0x90, 0x07, 0xE8, 0xB0, 0x04, 0xA5, 0x79, 0xA6, 0x7A, 0x20, 0x28
+        .db 0xC1, 0xB0, 0x03, 0x4C, 0x72, 0xC4, 0xA5, 0xAA, 0xE9, 0x01, 0xA4, 0xAB, 0xB0, 0xD0, 0x90, 0xCD
+        .db 0x20, 0x8C, 0xD2, 0x86, 0x0D, 0x60, 0xD0, 0xFD, 0xA4, 0x8C, 0xD0, 0x05, 0xA2, 0x1E, 0x4C, 0x3C
+        .db 0xBF, 0xA9, 0x93, 0x20, 0x14, 0xDD, 0xA9, 0x93, 0x20, 0x17, 0xDD, 0x84, 0xC4, 0xA5, 0x8B, 0x85
+        .db 0xC3, 0xA5, 0x89, 0xA4, 0x8A, 0x85, 0x87, 0x84, 0x88, 0x60, 0xD0, 0x03, 0x4C, 0x65, 0xC1, 0x20
+        .db 0x72, 0xC1, 0xF0, 0x2E, 0xA9, 0x05, 0x20, 0x03, 0xBF, 0xA5, 0xC4, 0x48, 0xA5, 0xC3, 0x48, 0xA5
+        .db 0x88, 0x48, 0xA5, 0x87, 0x48, 0xA9, 0x9D, 0x48, 0x20, 0xC2, 0x00, 0x4C, 0xBC, 0xC2, 0xA9, 0x05
+        .db 0x20, 0x03, 0xBF, 0xA5, 0xC4, 0x48, 0xA5, 0xC3, 0x48, 0xA5, 0x88, 0x48, 0xA5, 0x87, 0x48, 0xA9
+        .db 0x8D, 0x48, 0x20, 0xC2, 0x00, 0x20, 0xEB, 0xC3, 0x4C, 0xBC, 0xC2, 0x20, 0x55, 0xC5, 0x20, 0xA0
+        .db 0xC4, 0xA5, 0x88, 0xC5, 0x12, 0xB0, 0x0B, 0x98, 0x38, 0x65, 0xC3, 0xA6, 0xC4, 0x90, 0x07, 0xE8
+        .db 0xB0, 0x04, 0xA5, 0x79, 0xA6, 0x7A, 0x20, 0x28, 0xC1, 0x90, 0x67, 0xA5, 0xAA, 0xE9, 0x01, 0x85
+        .db 0xC3, 0xA5, 0xAB, 0xE9, 0x00, 0x85, 0xC4, 0x60, 0xA2, 0x22, 0x4C, 0x3C, 0xBF, 0xA8, 0xBA, 0xBD
+        .db 0x03, 0x01, 0xC9, 0x9D, 0xD0, 0xF2, 0xE8, 0xE8, 0x9A, 0x98, 0xF0, 0x20, 0xC9, 0x3A, 0xF0, 0x1C
+        .db 0xE9, 0xB4, 0xAA, 0xF0, 0x04, 0xCA, 0xD0, 0x62, 0xCA, 0x86, 0x98, 0x20, 0xBC, 0x00, 0x20, 0xE1
+        .db 0xC8, 0xA5, 0xAC, 0xF0, 0x02, 0xA9, 0xFF, 0xBA, 0x45, 0x98, 0xD0, 0x1A, 0xBD, 0x02, 0x01, 0x85
+        .db 0x87, 0xBD, 0x03, 0x01, 0x85, 0x88, 0xBD, 0x04, 0x01, 0x85, 0xC3, 0xBD, 0x05, 0x01, 0x85, 0xC4
+        .db 0x20, 0xC2, 0x00, 0x4C, 0xBC, 0xC2, 0xE8, 0xE8, 0xE8, 0xE8, 0xE8, 0x9A, 0x4C, 0x8C, 0xC4, 0xA2
+        .db 0x04, 0x2C, 0xA2, 0x0E, 0x4C, 0x3C, 0xBF, 0xD0, 0x9E, 0x68, 0x68, 0x68, 0xC9, 0x8D, 0xD0, 0xEF
+        .db 0x68, 0x85, 0x87, 0x68, 0x85, 0x88, 0x68, 0x85, 0xC3, 0x68, 0x85, 0xC4, 0x20, 0x9D, 0xC4, 0x98
+        .db 0x18, 0x65, 0xC3, 0x85, 0xC3, 0x90, 0x02, 0xE6, 0xC4, 0x60, 0x4C, 0x02, 0xCA, 0xA2, 0x3A, 0x2C
+        .db 0xA2, 0x00, 0xA0, 0x00, 0x84, 0x5C, 0x8A, 0x45, 0x5C, 0x85, 0x5C, 0xB1, 0xC3, 0xF0, 0xEA, 0xC5
+        .db 0x5C, 0xF0, 0xE6, 0xC8, 0xC9, 0x22, 0xD0, 0xF3, 0xF0, 0xEC, 0x20, 0xE1, 0xC8, 0x20, 0xC2, 0x00
+        .db 0xC9, 0xB1, 0xF0, 0x11, 0xC9, 0x89, 0xD0, 0xD2, 0xA6, 0xC3, 0xA4, 0xC4, 0x20, 0xBC, 0x00, 0xB0
+        .db 0xC9, 0x86, 0xC3, 0x84, 0xC4, 0xA5, 0xAC, 0xF0, 0x1B, 0x20, 0xBC, 0x00, 0xB0, 0x03, 0x4C, 0xEB
+        .db 0xC3, 0xC9, 0x90, 0xD0, 0x03, 0x4C, 0xFE, 0xC2, 0x20, 0xFC, 0xC2, 0xA0, 0x00, 0xB1, 0xC3, 0xC9
+        .db 0xAD, 0xF0, 0x99, 0x60, 0xA0, 0x00, 0xA2, 0x01, 0xC8, 0xB1, 0xC3, 0xF0, 0x0F, 0xC9, 0x8B, 0xD0
+        .db 0x03, 0xE8, 0xD0, 0xF4, 0xC9, 0xAD, 0xD0, 0xF0, 0xCA, 0xD0, 0xED, 0xC8, 0x98, 0x18, 0x65, 0xC3
+        .db 0x85, 0xC3, 0x90, 0x02, 0xE6, 0xC4, 0x20, 0xC2, 0x00, 0x90, 0xC3, 0x4C, 0xFC, 0xC2, 0x20, 0xA0
+        .db 0xC4, 0x4C, 0x8F, 0xC4, 0x4C, 0x02, 0xCA, 0xC9, 0xA9, 0xD0, 0x03, 0x4C, 0x38, 0xDD, 0xC9, 0xAA
+        .db 0xD0, 0x03, 0x4C, 0x3C, 0xDD, 0x20, 0x8C, 0xD2, 0x48, 0xC9, 0x8D, 0xF0, 0x04, 0xC9, 0x89, 0xD0
+        .db 0xE3, 0xC6, 0xAF, 0xD0, 0x04, 0x68, 0x4C, 0xFE, 0xC2, 0x20, 0xBC, 0x00, 0x20, 0x55, 0xC5, 0xC9
+        .db 0x2C, 0xF0, 0xEE, 0x68, 0x60, 0xA2, 0x00, 0x86, 0x11, 0x86, 0x12, 0xB0, 0xF7, 0xE0, 0x19, 0xA8
+        .db 0xB0, 0xDD, 0xE9, 0x2F, 0xA8, 0xA5, 0x11, 0x0A, 0x26, 0x12, 0x0A, 0x26, 0x12, 0x65, 0x11, 0x85
+        .db 0x11, 0x8A, 0x65, 0x12, 0x06, 0x11, 0x2A, 0xAA, 0x98, 0x65, 0x11, 0x85, 0x11, 0x90, 0x01, 0xE8
+        .db 0x20, 0xBC, 0x00, 0x4C, 0x59, 0xC5, 0xA9, 0xE4, 0x2C, 0xA9, 0xE0, 0x48, 0x20, 0xAA, 0xCB, 0xA6
+        .db 0x5F, 0x30, 0x1E, 0x85, 0x97, 0x84, 0x98, 0x20, 0x7D, 0xD6, 0x68, 0x48, 0xA0, 0xDF, 0x20, 0xBE
+        .db 0xD3, 0x20, 0xA3, 0xD6, 0x20, 0xC2, 0x00, 0xC9, 0x2C, 0xD0, 0xA8, 0x20, 0xBC, 0x00, 0x4C, 0x8C
+        .db 0xC5, 0x4C, 0xDC, 0xC8, 0x20, 0xAA, 0xCB, 0x85, 0x97, 0x84, 0x98, 0xA9, 0xC2, 0x20, 0xF1, 0xC9
+        .db 0xA5, 0x5F, 0x48, 0x20, 0xE1, 0xC8, 0x68, 0x2A, 0x20, 0xD3, 0xC8, 0xD0, 0x03, 0x4C, 0xA3, 0xD6
+        .db 0xA0, 0x02, 0xB1, 0xAE, 0xC5, 0x82, 0x90, 0x17, 0xD0, 0x07, 0x88, 0xB1, 0xAE, 0xC5, 0x81, 0x90
+        .db 0x0E, 0xA4, 0xAF, 0xC4, 0x7C, 0x90, 0x08, 0xD0, 0x0D, 0xA5, 0xAE, 0xC5, 0x7B, 0xB0, 0x07, 0xA5
+        .db 0xAE, 0xA4, 0xAF, 0x4C, 0x0C, 0xC6, 0xA0, 0x00, 0xB1, 0xAE, 0x20, 0x32, 0xCF, 0xA5, 0x9E, 0xA4
+        .db 0x9F, 0x85, 0xB8, 0x84, 0xB9, 0x20, 0x11, 0xD1, 0xA9, 0xAC, 0xA0, 0x00, 0x85, 0x9E, 0x84, 0x9F
+        .db 0x20, 0x73, 0xD1, 0xA0, 0x00, 0xB1, 0x9E, 0x91, 0x97, 0xC8, 0xB1, 0x9E, 0x91, 0x97, 0xC8, 0xB1
+        .db 0x9E, 0x91, 0x97, 0x60, 0x20, 0xAA, 0xCB, 0x85, 0x97, 0x84, 0x98, 0x20, 0x00, 0xDD, 0xA6, 0x5F
+        .db 0x30, 0x07, 0xA8, 0x20, 0x66, 0xCE, 0x4C, 0xA3, 0xD6, 0x48, 0xA9, 0x01, 0xB0, 0x01, 0x68, 0x20
+        .db 0x3A, 0xCF, 0xF0, 0x05, 0x68, 0xA0, 0x00, 0x91, 0xAD, 0x20, 0x85, 0xCF, 0x4C, 0xD0, 0xC5, 0x20
+        .db 0xD6, 0xC6, 0x20, 0xC2, 0x00, 0xF0, 0x3B, 0xC9, 0xAC, 0xF0, 0x56, 0xC9, 0xB0, 0xF0, 0x52, 0xC9
+        .db 0x2C, 0xF0, 0x38, 0xC9, 0x3B, 0xF0, 0x66, 0x20, 0xE1, 0xC8, 0x24, 0x5F, 0x30, 0xE1, 0x20, 0x95
+        .db 0xD8, 0x20, 0x44, 0xCF, 0xA0, 0x00, 0xA5, 0x0F, 0xF0, 0x0A, 0x38, 0xE5, 0x0E, 0xF1, 0xAE, 0xB0
+        .db 0x03, 0x20, 0x92, 0xC6, 0x20, 0xD6, 0xC6, 0xF0, 0xC9, 0xA9, 0x00, 0x9D, 0x0D, 0x04, 0xA2, 0x0D
+        .db 0xA0, 0x04, 0xA9, 0x0D, 0x20, 0xED, 0xC6, 0xA9, 0x0A, 0xD0, 0x52, 0xA5, 0x0E, 0xC5, 0x10, 0x90
+        .db 0x05, 0x20, 0x92, 0xC6, 0xD0, 0x27, 0x38, 0xE5, 0x64, 0xB0, 0xFC, 0x49, 0xFF, 0x69, 0x01, 0xD0
+        .db 0x12, 0x48, 0x20, 0x89, 0xD2, 0xC9, 0x29, 0xD0, 0x7B, 0x68, 0xC9, 0xAC, 0xD0, 0x06, 0x8A, 0xE5
+        .db 0x0E, 0x90, 0x0A, 0xAA, 0x8A, 0xF0, 0x06, 0x20, 0xE8, 0xC6, 0xCA, 0xD0, 0xFA, 0x20, 0xBC, 0x00
+        .db 0xD0, 0x85, 0x60, 0x20, 0x44, 0xCF, 0x20, 0x3E, 0xD1, 0xA0, 0x00, 0xAA, 0xF0, 0x49, 0xB1, 0x71
+        .db 0x20, 0xED, 0xC6, 0xC8, 0xCA, 0xD0, 0xF7, 0x60, 0xA9, 0x20, 0x2C, 0xA9, 0x3F, 0xC9, 0x20, 0x90
+        .db 0x19, 0x48, 0xA5, 0x0F, 0xD0, 0x0A, 0xA5, 0x0E, 0xE5, 0x64, 0xD0, 0x0B, 0x85, 0x0E, 0xF0, 0x07
+        .db 0xC5, 0x0E, 0xD0, 0x03, 0x20, 0x92, 0xC6, 0xE6, 0x0E, 0x68, 0x20, 0xED, 0xDE, 0xC9, 0x0D, 0xD0
+        .db 0x14, 0x86, 0x78, 0xA6, 0x0D, 0xF0, 0x0A, 0xA9, 0x00, 0x20, 0xED, 0xC6, 0xCA, 0xD0, 0xFA, 0xA9
+        .db 0x0D, 0x86, 0x0E, 0xA6, 0x78, 0x29, 0xFF, 0x60, 0xA5, 0x62, 0x10, 0x0B, 0xA5, 0x8D, 0xA4, 0x8E
+        .db 0x85, 0x87, 0x84, 0x88, 0x4C, 0x02, 0xCA, 0xA9, 0x1B, 0xA0, 0xE6, 0x20, 0xD3, 0xC6, 0xA5, 0x8B
+        .db 0xA4, 0x8C, 0x85, 0xC3, 0x84, 0xC4, 0x60, 0xC9, 0x22, 0xD0, 0x0B, 0x20, 0xBE, 0xC9, 0xA9, 0x3B
+        .db 0x20, 0xF1, 0xC9, 0x20, 0xD6, 0xC6, 0x20, 0x6A, 0xCE, 0x20, 0x40, 0xC0, 0xA9, 0x00, 0xCD, 0x0D
+        .db 0x04, 0xD0, 0x0A, 0x18, 0x4C, 0x2C, 0xC3, 0xA6, 0x8F, 0xA4, 0x90, 0xA9, 0x80, 0x85, 0x62, 0x86
+        .db 0x91, 0x84, 0x92, 0x20, 0xAA, 0xCB, 0x85, 0x97, 0x84, 0x98, 0xA5, 0xC3, 0xA4, 0xC4, 0x85, 0x11
+        .db 0x84, 0x12, 0xA6, 0x91, 0xA4, 0x92, 0x86, 0xC3, 0x84, 0xC4, 0x20, 0xC2, 0x00, 0xD0, 0x11, 0x24
+        .db 0x62, 0x30, 0x65, 0x20, 0xEB, 0xC6, 0x20, 0x40, 0xC0, 0x86, 0xC3, 0x84, 0xC4, 0x20, 0xC2, 0x00
+        .db 0x24, 0x5F, 0x10, 0x24, 0x85, 0x5B, 0xC9, 0x22, 0xF0, 0x07, 0xA9, 0x3A, 0x85, 0x5B, 0xA9, 0x2C
+        .db 0x18, 0x85, 0x5C, 0xA5, 0xC3, 0xA4, 0xC4, 0x69, 0x00, 0x90, 0x01, 0xC8, 0x20, 0x4A, 0xCF, 0x20
+        .db 0xCF, 0xD2, 0x20, 0xD0, 0xC5, 0x4C, 0xCE, 0xC7, 0x20, 0xA6, 0xD7, 0x20, 0xA3, 0xD6, 0x20, 0xC2
+        .db 0x00, 0xF0, 0x0A, 0xC9, 0x2C, 0xF0, 0x03, 0x4C, 0x28, 0xC7, 0x20, 0xBC, 0x00, 0xA5, 0xC3, 0xA4
+        .db 0xC4, 0x85, 0x91, 0x84, 0x92, 0xA5, 0x11, 0xA4, 0x12, 0x85, 0xC3, 0x84, 0xC4, 0x20, 0xC2, 0x00
+        .db 0xF0, 0x2C, 0x20, 0xFE, 0xC9, 0x4C, 0x73, 0xC7, 0x20, 0x9D, 0xC4, 0xC8, 0xAA, 0xD0, 0x12, 0xA2
+        .db 0x06, 0xC8, 0xB1, 0xC3, 0xF0, 0x73, 0xC8, 0xB1, 0xC3, 0x85, 0x8D, 0xC8, 0xB1, 0xC3, 0xC8, 0x85
+        .db 0x8E, 0xB1, 0xC3, 0xC8, 0xAA, 0x20, 0x8F, 0xC4, 0xE0, 0x83, 0xF0, 0x81, 0xD0, 0xDA, 0xA5, 0x91
+        .db 0xA4, 0x92, 0xA6, 0x62, 0x10, 0x03, 0x4C, 0x4E, 0xC3, 0xA0, 0x00, 0xB1, 0x91, 0xD0, 0x01, 0x60
+        .db 0xA9, 0x0A, 0xA0, 0xE6, 0x4C, 0xD3, 0xC6, 0xBA, 0xE8, 0xE8, 0xE8, 0xE8, 0xBD, 0x01, 0x01, 0xC9
+        .db 0x81, 0xD0, 0x21, 0xA5, 0x98, 0xD0, 0x0A, 0xBD, 0x02, 0x01, 0x85, 0x97, 0xBD, 0x03, 0x01, 0x85
+        .db 0x98, 0xDD, 0x03, 0x01, 0xD0, 0x07, 0xA5, 0x97, 0xDD, 0x02, 0x01, 0xF0, 0x07, 0x8A, 0x18, 0x69
+        .db 0x10, 0xAA, 0xD0, 0xD8, 0x60, 0xD0, 0x04, 0xA0, 0x00, 0xF0, 0x03, 0x20, 0xAA, 0xCB, 0x85, 0x97
+        .db 0x84, 0x98, 0x20, 0x37, 0xC8, 0xF0, 0x04, 0xA2, 0x00, 0xF0, 0x63, 0x9A, 0x8A, 0x38, 0xE9, 0xF7
+        .db 0x85, 0x73, 0x69, 0xFB, 0xA0, 0x01, 0x20, 0x7D, 0xD6, 0xBA, 0xBD, 0x08, 0x01, 0x85, 0xB0, 0xA5
+        .db 0x97, 0xA4, 0x98, 0x20, 0xBE, 0xD3, 0x20, 0xA3, 0xD6, 0xA0, 0x01, 0x20, 0x19, 0xD7, 0xBA, 0xDD
+        .db 0x08, 0x01, 0xF0, 0x17, 0xBD, 0x0D, 0x01, 0x85, 0x87, 0xBD, 0x0E, 0x01, 0x85, 0x88, 0xBD, 0x10
+        .db 0x01, 0x85, 0xC3, 0xBD, 0x0F, 0x01, 0x85, 0xC4, 0x4C, 0xBC, 0xC2, 0x8A, 0x69, 0x0F, 0xAA, 0x9A
+        .db 0x20, 0xC2, 0x00, 0xC9, 0x2C, 0xD0, 0xF1, 0x20, 0xBC, 0x00, 0x20, 0x6B, 0xC8, 0x20, 0xE1, 0xC8
+        .db 0x18, 0x24, 0x38, 0x24, 0x5F, 0x30, 0x03, 0xB0, 0x03, 0x60, 0xB0, 0xFD, 0xA2, 0x18, 0x4C, 0x3C
+        .db 0xBF, 0xA6, 0xC3, 0xD0, 0x02, 0xC6, 0xC4, 0xC6, 0xC3, 0xA9, 0x00, 0x48, 0xA9, 0x02, 0x20, 0x03
+        .db 0xBF, 0x20, 0xCD, 0xC9, 0xA9, 0x00, 0x85, 0x9B, 0x20, 0xC2, 0x00, 0x38, 0xE9, 0xC1, 0x90, 0x17
+        .db 0xC9, 0x03, 0xB0, 0x13, 0xC9, 0x01, 0x2A, 0x49, 0x01, 0x45, 0x9B, 0xC5, 0x9B, 0x90, 0x67, 0x85
+        .db 0x9B, 0x20, 0xBC, 0x00, 0x4C, 0xFB, 0xC8, 0xA6, 0x9B, 0xD0, 0x2C, 0xB0, 0x79, 0x69, 0x0A, 0x90
+        .db 0x75, 0xD0, 0x07, 0x24, 0x5F, 0x10, 0x03, 0x4C, 0xD4, 0xD0, 0x85, 0x71, 0x0A, 0x65, 0x71, 0xA8
+        .db 0x68, 0xD9, 0xEB, 0xE0, 0xB0, 0x65, 0x20, 0xD0, 0xC8, 0x48, 0x20, 0x62, 0xC9, 0x68, 0xA4, 0x99
+        .db 0x10, 0x19, 0xAA, 0xF0, 0x76, 0xD0, 0x5D, 0x26, 0x5F, 0x8A, 0x85, 0x5F, 0x2A, 0xA6, 0xC3, 0xD0
+        .db 0x02, 0xC6, 0xC4, 0xC6, 0xC3, 0xA0, 0x24, 0x85, 0x9B, 0xD0, 0xD5, 0xD9, 0xEB, 0xE0, 0xB0, 0x44
+        .db 0x90, 0xD7, 0xB9, 0xED, 0xE0, 0x48, 0xB9, 0xEC, 0xE0, 0x48, 0x20, 0x79, 0xC9, 0xA5, 0x9B, 0x48
+        .db 0xB9, 0xEB, 0xE0, 0x4C, 0xEB, 0xC8, 0x4C, 0x02, 0xCA, 0x68, 0x85, 0x71, 0xE6, 0x71, 0x68, 0x85
+        .db 0x72, 0xA5, 0xB0, 0x48, 0x20, 0xD9, 0xD6, 0xA5, 0xAF, 0x48, 0xA5, 0xAE, 0x48, 0xA5, 0xAD, 0x48
+        .db 0xA5, 0xAC, 0x48, 0x6C, 0x71, 0x00, 0xA0, 0xFF, 0x68, 0xF0, 0x20, 0xC9, 0x64, 0xF0, 0x03, 0x20
+        .db 0xD0, 0xC8, 0x84, 0x99, 0x68, 0x4A, 0x85, 0x63, 0x68, 0x85, 0xB3, 0x68, 0x85, 0xB4, 0x68, 0x85
+        .db 0xB5, 0x68, 0x85, 0xB6, 0x68, 0x85, 0xB7, 0x45, 0xB0, 0x85, 0xB8, 0xA5, 0xAC, 0x60, 0xA5, 0xC3
+        .db 0xA4, 0xC4, 0x69, 0x00, 0x90, 0x01, 0xC8, 0x20, 0x44, 0xCF, 0x4C, 0xCF, 0xD2, 0x20, 0xBC, 0x00
+        .db 0xB0, 0x03, 0x4C, 0xA6, 0xD7, 0xAA, 0x30, 0x2F, 0xC9, 0x24, 0xF0, 0xF6, 0xC9, 0x25, 0xF0, 0xF2
+        .db 0xC9, 0x2E, 0xF0, 0xEE, 0xC9, 0x22, 0xF0, 0xD6, 0xC9, 0x28, 0xD0, 0x4F, 0x20, 0xE9, 0xC8, 0xA9
+        .db 0x29, 0xA0, 0x00, 0xD1, 0xC3, 0xD0, 0x0B, 0x4C, 0xBC, 0x00, 0xA9, 0x28, 0xD0, 0xF3, 0xA9, 0x2C
+        .db 0xD0, 0xEF, 0xA2, 0x02, 0x4C, 0x3C, 0xBF, 0xC9, 0xB8, 0xF0, 0x29, 0xC9, 0xB7, 0xF0, 0xBE, 0xC9
+        .db 0xB2, 0xD0, 0x13, 0xA0, 0x21, 0xD0, 0x1F, 0x20, 0xA6, 0xCC, 0xA5, 0xAF, 0x49, 0xFF, 0xA8, 0xA5
+        .db 0xAE, 0x49, 0xFF, 0x4C, 0x59, 0xCE, 0xC9, 0xAF, 0xD0, 0x03, 0x4C, 0xB4, 0xCE, 0xE9, 0xC4, 0xB0
+        .db 0x19, 0x4C, 0x02, 0xCA, 0xA0, 0x1E, 0x68, 0x68, 0x4C, 0x3A, 0xC9, 0x20, 0xAA, 0xCB, 0x85, 0xAE
+        .db 0x84, 0xAF, 0xA6, 0x5F, 0x30, 0x03, 0x4C, 0x7D, 0xD6, 0x60, 0x0A, 0xA8, 0xB9, 0xA6, 0xE0, 0x48
+        .db 0xB9, 0xA5, 0xE0, 0x48, 0xB9, 0x60, 0xE0, 0xF0, 0x05, 0x48, 0xB9, 0x5F, 0xE0, 0x48, 0x60, 0x20
+        .db 0xEC, 0xC9, 0x4C, 0xD2, 0xC8, 0x20, 0xEC, 0xC9, 0x4C, 0xD0, 0xC8, 0x46, 0x5F, 0x4C, 0xBC, 0x00
+        .db 0x20, 0xE9, 0xC8, 0x20, 0xFE, 0xC9, 0x20, 0xD2, 0xC8, 0x68, 0xAA, 0x68, 0xA8, 0xA5, 0xAF, 0x48
+        .db 0xA5, 0xAE, 0x48, 0x98, 0x48, 0x8A, 0x48, 0x20, 0x8C, 0xD2, 0x8A, 0x60, 0x20, 0xE9, 0xC8, 0x20
+        .db 0xD0, 0xC8, 0xA5, 0xAC, 0xC9, 0x98, 0xB0, 0x20, 0x20, 0x50, 0xD7, 0xA2, 0x02, 0xB5, 0xAD, 0x95
+        .db 0x11, 0xCA, 0x10, 0xF9, 0x20, 0xC2, 0x00, 0xA2, 0x00, 0xC9, 0x29, 0xF0, 0x0A, 0x20, 0xDE, 0xD2
+        .db 0x20, 0xC2, 0x00, 0xC9, 0x29, 0xD0, 0x01, 0x60, 0x4C, 0x29, 0xCD, 0x20, 0xE2, 0xCA, 0x45, 0x5B
+        .db 0xA8, 0xA5, 0xAE, 0x45, 0x5C, 0x4C, 0x59, 0xCE, 0x20, 0xE2, 0xCA, 0x05, 0x5B, 0xA8, 0xA5, 0xAE
+        .db 0x05, 0x5C, 0x4C, 0x59, 0xCE, 0x20, 0xE2, 0xCA, 0x25, 0x5B, 0xA8, 0xA5, 0xAE, 0x25, 0x5C, 0x4C
+        .db 0x59, 0xCE, 0x20, 0xA6, 0xCC, 0xA5, 0xAE, 0x85, 0x5C, 0xA5, 0xAF, 0x85, 0x5B, 0x20, 0xC3, 0xD3
+        .db 0x20, 0xA6, 0xCC, 0xA5, 0xAF, 0x60, 0x20, 0xD3, 0xC8, 0xB0, 0x13, 0xA5, 0xB7, 0x09, 0x7F, 0x25
+        .db 0xB4, 0x85, 0xB4, 0xA9, 0xB3, 0xA0, 0x00, 0x20, 0x17, 0xD7, 0xAA, 0x4C, 0x3F, 0xCB, 0x46, 0x5F
+        .db 0xC6, 0x9B, 0x20, 0x3E, 0xD1, 0x85, 0xAC, 0x86, 0xAD, 0x84, 0xAE, 0xA5, 0xB5, 0xA4, 0xB6, 0x20
+        .db 0x42, 0xD1, 0x86, 0xB5, 0x84, 0xB6, 0xAA, 0x38, 0xE5, 0xAC, 0xF0, 0x08, 0xA9, 0x01, 0x90, 0x04
+        .db 0xA6, 0xAC, 0xA9, 0xFF, 0x85, 0xB0, 0xA0, 0xFF, 0xE8, 0xC8, 0xCA, 0xD0, 0x07, 0xA6, 0xB0, 0x30
+        .db 0x0F, 0x18, 0x90, 0x0C, 0xB1, 0xB5, 0xD1, 0xAD, 0xF0, 0xEF, 0xA2, 0xFF, 0xB0, 0x02, 0xA2, 0x01
+        .db 0xE8, 0x8A, 0x2A, 0x25, 0x63, 0xF0, 0x02, 0xA9, 0xFF, 0x4C, 0xFA, 0xD6, 0x20, 0xFE, 0xC9, 0xAA
+        .db 0x20, 0xAF, 0xCB, 0x20, 0xC2, 0x00, 0xD0, 0xF4, 0x60, 0x20, 0x9F, 0xCB, 0xA5, 0xAE, 0xA6, 0x78
+        .db 0xF0, 0x22, 0xE0, 0x10, 0xB0, 0x23, 0x06, 0xAF, 0x2A, 0xCA, 0xD0, 0xFA, 0xA4, 0xAF, 0x4C, 0x59
+        .db 0xCE, 0x20, 0x9F, 0xCB, 0xA5, 0xAE, 0xA6, 0x78, 0xF0, 0x0A, 0xE0, 0x10, 0xB0, 0x0B, 0x4A, 0x66
+        .db 0xAF, 0xCA, 0xD0, 0xFA, 0xA4, 0xAF, 0x4C, 0x59, 0xCE, 0xA9, 0x00, 0xA8, 0x4C, 0x59, 0xCE, 0x20
+        .db 0x8F, 0xD2, 0x86, 0x78, 0x20, 0xC3, 0xD3, 0x4C, 0xA6, 0xCC, 0xA2, 0x00, 0x20, 0xC2, 0x00, 0x86
+        .db 0x5E, 0x85, 0x93, 0x29, 0x7F, 0x20, 0x1E, 0xCC, 0xB0, 0x03, 0x4C, 0x02, 0xCA, 0xA2, 0x00, 0x86
+        .db 0x5F, 0x20, 0xBC, 0x00, 0x90, 0x05, 0x20, 0x1E, 0xCC, 0x90, 0x0B, 0xAA, 0x20, 0xBC, 0x00, 0x90
+        .db 0xFB, 0x20, 0x1E, 0xCC, 0xB0, 0xF6, 0xC9, 0x24, 0xD0, 0x0B, 0xA9, 0xFF, 0x85, 0x5F, 0x8A, 0x09
+        .db 0x80, 0xAA, 0x20, 0xBC, 0x00, 0x86, 0x94, 0x05, 0x61, 0xC9, 0x28, 0xD0, 0x03, 0x4C, 0xB8, 0xCC
+        .db 0xA9, 0x00, 0x85, 0x61, 0xA5, 0x7B, 0xA6, 0x7C, 0xA0, 0x00, 0x86, 0xAB, 0x85, 0xAA, 0xE4, 0x7E
+        .db 0xD0, 0x04, 0xC5, 0x7D, 0xF0, 0x2C, 0xA5, 0x93, 0xD1, 0xAA, 0xD0, 0x08, 0xA5, 0x94, 0xC8, 0xD1
+        .db 0xAA, 0xF0, 0x69, 0x88, 0x18, 0xA5, 0xAA, 0x69, 0x06, 0x90, 0xE1, 0xE8, 0xD0, 0xDC, 0xC9, 0x61
+        .db 0xB0, 0x0A, 0xC9, 0x41, 0x90, 0x05, 0xE9, 0x5B, 0x38, 0xE9, 0xA5, 0x60, 0xE9, 0x7B, 0x38, 0xE9
+        .db 0x85, 0x60, 0x68, 0x48, 0xC9, 0x3D, 0xD0, 0x05, 0xA9, 0xE1, 0xA0, 0xDF, 0x60, 0xA5, 0x7D, 0xA4
+        .db 0x7E, 0x85, 0xAA, 0x84, 0xAB, 0xA5, 0x7F, 0xA4, 0x80, 0x85, 0xA6, 0x84, 0xA7, 0x18, 0x69, 0x06
+        .db 0x90, 0x01, 0xC8, 0x85, 0xA4, 0x84, 0xA5, 0x20, 0xC1, 0xBE, 0xA5, 0xA4, 0xA4, 0xA5, 0xC8, 0x85
+        .db 0x7D, 0x84, 0x7E, 0xA0, 0x00, 0xA5, 0x93, 0x91, 0xAA, 0xC8, 0xA5, 0x94, 0x91, 0xAA, 0xA9, 0x00
+        .db 0xC8, 0x91, 0xAA, 0xC8, 0x91, 0xAA, 0xC8, 0x91, 0xAA, 0xC8, 0x91, 0xAA, 0xA5, 0xAA, 0x18, 0x69
+        .db 0x02, 0xA4, 0xAB, 0x90, 0x01, 0xC8, 0x85, 0x95, 0x84, 0x96, 0x60, 0xA5, 0x5D, 0x0A, 0x69, 0x05
+        .db 0x65, 0xAA, 0xA4, 0xAB, 0x90, 0x01, 0xC8, 0x85, 0xA4, 0x84, 0xA5, 0x60, 0x20, 0xBC, 0x00, 0x20
+        .db 0xCD, 0xC8, 0xA5, 0xB0, 0x30, 0x0D, 0xA5, 0xAC, 0xC9, 0x90, 0x90, 0x09, 0xA9, 0xE8, 0xA0, 0xDF
+        .db 0x20, 0x17, 0xD7, 0xD0, 0x74, 0x4C, 0x50, 0xD7, 0xA5, 0x5E, 0x48, 0xA5, 0x5F, 0x48, 0xA0, 0x00
+        .db 0x98, 0x48, 0xA5, 0x94, 0x48, 0xA5, 0x93, 0x48, 0x20, 0x9C, 0xCC, 0x68, 0x85, 0x93, 0x68, 0x85
+        .db 0x94, 0x68, 0xA8, 0xBA, 0xBD, 0x02, 0x01, 0x48, 0xBD, 0x01, 0x01, 0x48, 0xA5, 0xAE, 0x9D, 0x02
+        .db 0x01, 0xA5, 0xAF, 0x9D, 0x01, 0x01, 0xC8, 0x20, 0xC2, 0x00, 0xC9, 0x2C, 0xF0, 0xD2, 0x84, 0x5D
+        .db 0x20, 0xEF, 0xC9, 0x68, 0x85, 0x5F, 0x68, 0x85, 0x5E, 0xA6, 0x7D, 0xA5, 0x7E, 0x86, 0xAA, 0x85
+        .db 0xAB, 0xC5, 0x80, 0xD0, 0x04, 0xE4, 0x7F, 0xF0, 0x39, 0xA0, 0x00, 0xB1, 0xAA, 0xC8, 0xC5, 0x93
+        .db 0xD0, 0x06, 0xA5, 0x94, 0xD1, 0xAA, 0xF0, 0x16, 0xC8, 0xB1, 0xAA, 0x18, 0x65, 0xAA, 0xAA, 0xC8
+        .db 0xB1, 0xAA, 0x65, 0xAB, 0x90, 0xD7, 0xA2, 0x10, 0x2C, 0xA2, 0x08, 0x4C, 0x3C, 0xBF, 0xA2, 0x12
+        .db 0xA5, 0x5E, 0xD0, 0xF7, 0x20, 0x8B, 0xCC, 0xA5, 0x5D, 0xA0, 0x04, 0xD1, 0xAA, 0xD0, 0xE7, 0x4C
+        .db 0xC5, 0xCD, 0x20, 0x8B, 0xCC, 0x20, 0x0B, 0xBF, 0xA0, 0x00, 0x84, 0xBB, 0xA5, 0x93, 0x91, 0xAA
+        .db 0xC8, 0xA5, 0x94, 0x91, 0xAA, 0xA5, 0x5D, 0xA0, 0x04, 0x84, 0xBA, 0x91, 0xAA, 0x18, 0xA2, 0x0B
+        .db 0xA9, 0x00, 0x24, 0x5E, 0x50, 0x07, 0x68, 0x69, 0x01, 0xAA, 0x68, 0x69, 0x00, 0xC8, 0x91, 0xAA
+        .db 0xC8, 0x8A, 0x91, 0xAA, 0x20, 0x14, 0xCE, 0x86, 0xBA, 0x85, 0xBB, 0xA4, 0x71, 0xC6, 0x5D, 0xD0
+        .db 0xDD, 0x65, 0xA5, 0xB0, 0x5D, 0x85, 0xA5, 0xA8, 0x8A, 0x65, 0xA4, 0x90, 0x03, 0xC8, 0xF0, 0x52
+        .db 0x20, 0x0B, 0xBF, 0x85, 0x7F, 0x84, 0x80, 0xA9, 0x00, 0xE6, 0xBB, 0xA4, 0xBA, 0xF0, 0x05, 0x88
+        .db 0x91, 0xA4, 0xD0, 0xFB, 0xC6, 0xA5, 0xC6, 0xBB, 0xD0, 0xF5, 0xE6, 0xA5, 0x38, 0xA0, 0x02, 0xA5
+        .db 0x7F, 0xE5, 0xAA, 0x91, 0xAA, 0xC8, 0xA5, 0x80, 0xE5, 0xAB, 0x91, 0xAA, 0xA5, 0x5E, 0xD0, 0x53
+        .db 0xC8, 0xB1, 0xAA, 0x85, 0x5D, 0xA9, 0x00, 0x85, 0xBA, 0x85, 0xBB, 0xC8, 0x68, 0xAA, 0x85, 0xAE
+        .db 0x68, 0x85, 0xAF, 0xD1, 0xAA, 0x90, 0x0E, 0xD0, 0x06, 0xC8, 0x8A, 0xD1, 0xAA, 0x90, 0x07, 0x4C
+        .db 0x26, 0xCD, 0x4C, 0x3A, 0xBF, 0xC8, 0xA5, 0xBB, 0x05, 0xBA, 0xF0, 0x0A, 0x20, 0x14, 0xCE, 0x8A
+        .db 0x65, 0xAE, 0xAA, 0x98, 0xA4, 0x71, 0x65, 0xAF, 0x86, 0xBA, 0xC6, 0x5D, 0xD0, 0xCB, 0x06, 0xBA
+        .db 0x2A, 0x06, 0xBA, 0x2A, 0xA8, 0xA5, 0xBA, 0x65, 0xA4, 0x85, 0x95, 0x98, 0x65, 0xA5, 0x85, 0x96
+        .db 0xA8, 0xA5, 0x95, 0x60, 0x84, 0x71, 0xB1, 0xAA, 0x85, 0x76, 0x88, 0xB1, 0xAA, 0x85, 0x77, 0xA9
+        .db 0x10, 0x85, 0xA8, 0xA2, 0x00, 0xA0, 0x00, 0x8A, 0x0A, 0xAA, 0x98, 0x2A, 0xA8, 0xB0, 0xB3, 0x06
+        .db 0xBA, 0x26, 0xBB, 0x90, 0x0B, 0x18, 0x8A, 0x65, 0x76, 0xAA, 0x98, 0x65, 0x77, 0xA8, 0xB0, 0xA2
+        .db 0xC6, 0xA8, 0xD0, 0xE3, 0x60, 0xA5, 0x5F, 0x10, 0x03, 0x20, 0x3E, 0xD1, 0x20, 0xDF, 0xCF, 0x38
+        .db 0xA5, 0x81, 0xE5, 0x7F, 0xA8, 0xA5, 0x82, 0xE5, 0x80, 0x46, 0x5F, 0x85, 0xAD, 0x84, 0xAE, 0xA2
+        .db 0x90, 0x4C, 0x02, 0xD7, 0xA4, 0x0E, 0xA9, 0x00, 0xF0, 0xEF, 0xA6, 0x88, 0xE8, 0xD0, 0xA4, 0xA2
+        .db 0x16, 0x4C, 0x3C, 0xBF, 0x20, 0xA5, 0xCE, 0x85, 0x9C, 0x84, 0x9D, 0x20, 0x6A, 0xCE, 0x20, 0xFA
+        .db 0xC9, 0xA9, 0x80, 0x85, 0x61, 0x20, 0xAA, 0xCB, 0x20, 0xD0, 0xC8, 0x20, 0xEF, 0xC9, 0xA9, 0xC2
+        .db 0x20, 0xF1, 0xC9, 0xA5, 0x96, 0x48, 0xA5, 0x95, 0x48, 0xA5, 0xC4, 0x48, 0xA5, 0xC3, 0x48, 0x20
+        .db 0x8C, 0xC4, 0x4C, 0x14, 0xCF, 0xA9, 0xAF, 0x20, 0xF1, 0xC9, 0x09, 0x80, 0x85, 0x61, 0x20, 0xB1
+        .db 0xCB, 0x4C, 0xD0, 0xC8, 0x20, 0xA5, 0xCE, 0x48, 0x98, 0x48, 0x20, 0xFA, 0xC9, 0x20, 0xE1, 0xC8
+        .db 0x20, 0xEF, 0xC9, 0x20, 0xD0, 0xC8, 0x68, 0x85, 0x9D, 0x68, 0x85, 0x9C, 0xA2, 0x20, 0xA0, 0x03
+        .db 0xB1, 0x9C, 0xF0, 0x9D, 0x85, 0x96, 0x88, 0xB1, 0x9C, 0x85, 0x95, 0xAA, 0xC8, 0xB1, 0x95, 0x48
+        .db 0x88, 0x10, 0xFA, 0xA4, 0x96, 0x20, 0xA7, 0xD6, 0xA5, 0xC4, 0x48, 0xA5, 0xC3, 0x48, 0xB1, 0x9C
+        .db 0x85, 0xC3, 0xC8, 0xB1, 0x9C, 0x85, 0xC4, 0xA5, 0x96, 0x48, 0xA5, 0x95, 0x48, 0x20, 0xCD, 0xC8
+        .db 0x68, 0x85, 0x9C, 0x68, 0x85, 0x9D, 0x20, 0xC2, 0x00, 0xF0, 0x03, 0x4C, 0x02, 0xCA, 0x68, 0x85
+        .db 0xC3, 0x68, 0x85, 0xC4, 0xA0, 0x00, 0x68, 0x91, 0x9C, 0xC8, 0x68, 0x91, 0x9C, 0xC8, 0x68, 0x91
+        .db 0x9C, 0xC8, 0x68, 0x91, 0x9C, 0x60, 0x20, 0xD0, 0xC8, 0x20, 0x95, 0xD8, 0xA9, 0xF0, 0xA0, 0x00
+        .db 0xF0, 0x12, 0xA6, 0xAE, 0xA4, 0xAF, 0x86, 0x9E, 0x84, 0x9F, 0x20, 0xAD, 0xCF, 0x86, 0xAD, 0x84
+        .db 0xAE, 0x85, 0xAC, 0x60, 0xA2, 0x22, 0x86, 0x5B, 0x86, 0x5C, 0x85, 0xB8, 0x84, 0xB9, 0x85, 0xAD
+        .db 0x84, 0xAE, 0xA0, 0xFF, 0xC8, 0xB1, 0xB8, 0xF0, 0x0C, 0xC5, 0x5B, 0xF0, 0x04, 0xC5, 0x5C, 0xD0
+        .db 0xF3, 0xC9, 0x22, 0xF0, 0x01, 0x18, 0x84, 0xAC, 0x98, 0x65, 0xB8, 0x85, 0xBA, 0xA6, 0xB9, 0x90
+        .db 0x01, 0xE8, 0x86, 0xBB, 0xA5, 0xB9, 0xC9, 0x05, 0xB0, 0x0B, 0x98, 0x20, 0x32, 0xCF, 0xA6, 0xB8
+        .db 0xA4, 0xB9, 0x20, 0x1F, 0xD1, 0xA6, 0x65, 0xE0, 0x71, 0xD0, 0x05, 0xA2, 0x1C, 0x4C, 0x3C, 0xBF
+        .db 0xA5, 0xAC, 0x95, 0x00, 0xA5, 0xAD, 0x95, 0x01, 0xA5, 0xAE, 0x95, 0x02, 0xA0, 0x00, 0x86, 0xAE
+        .db 0x84, 0xAF, 0x88, 0x84, 0x5F, 0x86, 0x66, 0xE8, 0xE8, 0xE8, 0x86, 0x65, 0x60, 0x46, 0x60, 0x48
+        .db 0x49, 0xFF, 0x38, 0x65, 0x81, 0xA4, 0x82, 0xB0, 0x01, 0x88, 0xC4, 0x80, 0x90, 0x11, 0xD0, 0x04
+        .db 0xC5, 0x7F, 0x90, 0x0B, 0x85, 0x81, 0x84, 0x82, 0x85, 0x83, 0x84, 0x84, 0xAA, 0x68, 0x60, 0xA2
+        .db 0x0C, 0xA5, 0x60, 0x30, 0xB8, 0x20, 0xDF, 0xCF, 0xA9, 0x80, 0x85, 0x60, 0x68, 0xD0, 0xD0, 0xA6
+        .db 0x85, 0xA5, 0x86, 0x86, 0x81, 0x85, 0x82, 0xA0, 0x00, 0x84, 0x9D, 0xA5, 0x7F, 0xA6, 0x80, 0x85
+        .db 0xAA, 0x86, 0xAB, 0xA9, 0x68, 0x85, 0x71, 0x84, 0x72, 0xC5, 0x65, 0xF0, 0x05, 0x20, 0x63, 0xD0
+        .db 0xF0, 0xF7, 0x06, 0xA0, 0xA5, 0x7B, 0xA6, 0x7C, 0x85, 0x71, 0x86, 0x72, 0xE4, 0x7E, 0xD0, 0x04
+        .db 0xC5, 0x7D, 0xF0, 0x05, 0x20, 0x5D, 0xD0, 0xF0, 0xF3, 0x85, 0xA4, 0x86, 0xA5, 0xA9, 0x04, 0x85
+        .db 0xA0, 0xA5, 0xA4, 0xA6, 0xA5, 0xE4, 0x80, 0xD0, 0x04, 0xC5, 0x7F, 0xF0, 0x75, 0x85, 0x71, 0x86
+        .db 0x72, 0xA0, 0x02, 0xB1, 0x71, 0x65, 0xA4, 0x85, 0xA4, 0xC8, 0xB1, 0x71, 0x65, 0xA5, 0x85, 0xA5
+        .db 0xA0, 0x01, 0xB1, 0x71, 0x10, 0xDB, 0xA0, 0x04, 0xB1, 0x71, 0x0A, 0x69, 0x05, 0x20, 0x95, 0xD0
+        .db 0xE4, 0xA5, 0xD0, 0x04, 0xC5, 0xA4, 0xF0, 0xCD, 0x20, 0x63, 0xD0, 0xF0, 0xF3, 0xC8, 0xB1, 0x71
+        .db 0x10, 0x30, 0xC8, 0xB1, 0x71, 0xF0, 0x2B, 0xC8, 0xB1, 0x71, 0xAA, 0xC8, 0xB1, 0x71, 0xC5, 0x82
+        .db 0x90, 0x06, 0xD0, 0x1E, 0xE4, 0x81, 0xB0, 0x1A, 0xC5, 0xAB, 0x90, 0x17, 0xD0, 0x04, 0xE4, 0xAA
+        .db 0x90, 0x11, 0x86, 0xAA, 0x85, 0xAB, 0xA5, 0x71, 0xA6, 0x72, 0x85, 0x9C, 0x86, 0x9D, 0x88, 0x88
+        .db 0x84, 0xA2, 0x18, 0xA5, 0xA0, 0x65, 0x71, 0x85, 0x71, 0x90, 0x02, 0xE6, 0x72, 0xA6, 0x72, 0xA0
+        .db 0x00, 0x60, 0xC6, 0xA0, 0xA6, 0x9D, 0xF0, 0xF5, 0xA4, 0xA2, 0x18, 0xB1, 0x9C, 0x65, 0xAA, 0x85
+        .db 0xA6, 0xA5, 0xAB, 0x69, 0x00, 0x85, 0xA7, 0xA5, 0x81, 0xA6, 0x82, 0x85, 0xA4, 0x86, 0xA5, 0x20
+        .db 0xC8, 0xBE, 0xA4, 0xA2, 0xC8, 0xA5, 0xA4, 0x91, 0x9C, 0xAA, 0xE6, 0xA5, 0xA5, 0xA5, 0xC8, 0x91
+        .db 0x9C, 0x4C, 0xE3, 0xCF, 0xA5, 0xAF, 0x48, 0xA5, 0xAE, 0x48, 0x20, 0xCD, 0xC9, 0x20, 0xD2, 0xC8
+        .db 0x68, 0x85, 0xB8, 0x68, 0x85, 0xB9, 0xA0, 0x00, 0xB1, 0xB8, 0x18, 0x71, 0xAE, 0x90, 0x05, 0xA2
+        .db 0x1A, 0x4C, 0x3C, 0xBF, 0x20, 0x32, 0xCF, 0x20, 0x11, 0xD1, 0xA5, 0x9E, 0xA4, 0x9F, 0x20, 0x42
+        .db 0xD1, 0x20, 0x23, 0xD1, 0xA5, 0xB8, 0xA4, 0xB9, 0x20, 0x42, 0xD1, 0x20, 0x85, 0xCF, 0x4C, 0xF8
+        .db 0xC8, 0xA0, 0x00, 0xB1, 0xB8, 0x48, 0xC8, 0xB1, 0xB8, 0xAA, 0xC8, 0xB1, 0xB8, 0xA8, 0x68, 0x86
+        .db 0x71, 0x84, 0x72, 0xAA, 0xF0, 0x14, 0xA0, 0x00, 0xB1, 0x71, 0x91, 0x83, 0xC8, 0xCA, 0xD0, 0xF8
+        .db 0x98, 0x18, 0x65, 0x83, 0x85, 0x83, 0x90, 0x02, 0xE6, 0x84, 0x60, 0x20, 0xD2, 0xC8, 0xA5, 0xAE
+        .db 0xA4, 0xAF, 0x85, 0x71, 0x84, 0x72, 0x20, 0x73, 0xD1, 0x08, 0xA0, 0x00, 0xB1, 0x71, 0x48, 0xC8
+        .db 0xB1, 0x71, 0xAA, 0xC8, 0xB1, 0x71, 0xA8, 0x68, 0x28, 0xD0, 0x13, 0xC4, 0x82, 0xD0, 0x0F, 0xE4
+        .db 0x81, 0xD0, 0x0B, 0x48, 0x18, 0x65, 0x81, 0x85, 0x81, 0x90, 0x02, 0xE6, 0x82, 0x68, 0x86, 0x71
+        .db 0x84, 0x72, 0x60, 0xC4, 0x67, 0xD0, 0x0C, 0xC5, 0x66, 0xD0, 0x08, 0x85, 0x65, 0xE9, 0x03, 0x85
+        .db 0x66, 0xA0, 0x00, 0x60, 0x20, 0x8F, 0xD2, 0x8A, 0x48, 0xA9, 0x01, 0x20, 0x3A, 0xCF, 0x68, 0xA0
+        .db 0x00, 0x91, 0xAD, 0x4C, 0x85, 0xCF, 0x48, 0x20, 0xF7, 0xD1, 0xD1, 0x9E, 0x98, 0xF0, 0x09, 0x48
+        .db 0x20, 0xF7, 0xD1, 0x18, 0xF1, 0x9E, 0x49, 0xFF, 0x90, 0x04, 0xB1, 0x9E, 0xAA, 0x98, 0x48, 0x8A
+        .db 0x48, 0x20, 0x3A, 0xCF, 0xA5, 0x9E, 0xA4, 0x9F, 0x20, 0x42, 0xD1, 0x68, 0xA8, 0x68, 0x18, 0x65
+        .db 0x71, 0x85, 0x71, 0x90, 0x02, 0xE6, 0x72, 0x98, 0x20, 0x23, 0xD1, 0x4C, 0x85, 0xCF, 0x48, 0xA9
+        .db 0xFF, 0x85, 0xAF, 0x20, 0xC2, 0x00, 0xC9, 0x29, 0xF0, 0x06, 0x20, 0xFE, 0xC9, 0x20, 0x8C, 0xD2
+        .db 0x20, 0xF7, 0xD1, 0xCA, 0x8A, 0x48, 0x18, 0xA2, 0x00, 0xF1, 0x9E, 0xB0, 0xC2, 0x49, 0xFF, 0xC5
+        .db 0xAF, 0x90, 0xBD, 0xA5, 0xAF, 0xB0, 0xB9, 0x20, 0xEF, 0xC9, 0x68, 0x85, 0xA2, 0x68, 0x85, 0xA3
+        .db 0x68, 0xAA, 0x68, 0x85, 0x9E, 0x68, 0x85, 0x9F, 0xA0, 0x00, 0x8A, 0xF0, 0x79, 0xE6, 0xA2, 0x6C
+        .db 0xA2, 0x00, 0x20, 0x3B, 0xD1, 0x85, 0xAC, 0xA8, 0xF0, 0x38, 0x20, 0x3A, 0xCF, 0x86, 0xAD, 0x84
+        .db 0xAE, 0xA8, 0x88, 0xB1, 0x71, 0x20, 0x22, 0xCC, 0x90, 0x02, 0x09, 0x20, 0x91, 0x83, 0x98, 0xD0
+        .db 0xF1, 0xF0, 0x1F, 0x20, 0x3B, 0xD1, 0x85, 0xAC, 0xA8, 0xF0, 0x17, 0x20, 0x3A, 0xCF, 0x86, 0xAD
+        .db 0x84, 0xAE, 0xA8, 0x88, 0xB1, 0x71, 0x20, 0x1E, 0xCC, 0x90, 0x02, 0x29, 0xDF, 0x91, 0x83, 0x98
+        .db 0xD0, 0xF1, 0x4C, 0x85, 0xCF, 0x20, 0xBC, 0x00, 0x20, 0xAA, 0xCB, 0x20, 0xEF, 0xC9, 0x20, 0xD2
+        .db 0xC8, 0xA0, 0x02, 0xB1, 0x95, 0xAA, 0x88, 0xB1, 0x95, 0xA8, 0x8A, 0x4C, 0x59, 0xCE, 0x20, 0x74
+        .db 0xD2, 0x4C, 0x66, 0xCE, 0x20, 0x3B, 0xD1, 0xA8, 0x60, 0x20, 0x74, 0xD2, 0xF0, 0x08, 0xA0, 0x00
+        .db 0xB1, 0x71, 0xA8, 0x4C, 0x66, 0xCE, 0x4C, 0x29, 0xCD, 0x20, 0xBC, 0x00, 0x20, 0xCD, 0xC8, 0x20
+        .db 0xA2, 0xCC, 0xA4, 0xAE, 0xD0, 0xF0, 0xA6, 0xAF, 0x4C, 0xC2, 0x00, 0x20, 0x74, 0xD2, 0xD0, 0x03
+        .db 0x4C, 0x50, 0xD4, 0xA6, 0xC3, 0xA4, 0xC4, 0x86, 0xBA, 0x84, 0xBB, 0xA6, 0x71, 0x86, 0xC3, 0x18
+        .db 0x65, 0x71, 0x85, 0x73, 0xA5, 0x72, 0x85, 0xC4, 0x69, 0x00, 0x85, 0x74, 0xA0, 0x00, 0xB1, 0x73
+        .db 0x48, 0x98, 0x91, 0x73, 0x20, 0xC2, 0x00, 0x20, 0xA6, 0xD7, 0x68, 0xA0, 0x00, 0x91, 0x73, 0xA6
+        .db 0xBA, 0xA4, 0xBB, 0x86, 0xC3, 0x84, 0xC4, 0x60, 0x20, 0xCD, 0xC8, 0x20, 0xF1, 0xD2, 0x20, 0xFE
+        .db 0xC9, 0xA5, 0x12, 0x48, 0xA5, 0x11, 0x48, 0x20, 0x8C, 0xD2, 0x68, 0x85, 0x11, 0x68, 0x85, 0x12
+        .db 0x60, 0xA5, 0xAC, 0xC9, 0x98, 0xB0, 0x8F, 0x20, 0x50, 0xD7, 0xA5, 0xAE, 0xA4, 0xAF, 0x84, 0x11
+        .db 0x85, 0x12, 0x60, 0x20, 0xF1, 0xD2, 0xA2, 0x00, 0xA1, 0x11, 0xA8, 0x4C, 0x66, 0xCE, 0x20, 0xD8
+        .db 0xD2, 0x8A, 0xA2, 0x00, 0x81, 0x11, 0x60, 0x20, 0xF1, 0xD2, 0xA2, 0x00, 0xA1, 0x11, 0xA8, 0xE6
+        .db 0x11, 0xD0, 0x02, 0xE6, 0x12, 0xA1, 0x11, 0x4C, 0x59, 0xCE, 0x20, 0xCD, 0xC8, 0x20, 0xF1, 0xD2
+        .db 0x84, 0x97, 0x85, 0x98, 0x20, 0xFE, 0xC9, 0x20, 0xCD, 0xC8, 0x20, 0xF1, 0xD2, 0x98, 0xA2, 0x00
+        .db 0x81, 0x97, 0xE6, 0x97, 0xD0, 0x02, 0xE6, 0x98, 0xA5, 0x12, 0x81, 0x97, 0x4C, 0xC2, 0x00, 0x20
+        .db 0xAA, 0xCB, 0x85, 0x97, 0x84, 0x98, 0xA5, 0x5F, 0x48, 0x20, 0xFE, 0xC9, 0x20, 0xAA, 0xCB, 0x68
+        .db 0x45, 0x5F, 0x10, 0x10, 0xA0, 0x03, 0xB1, 0x97, 0xAA, 0xB1, 0x95, 0x91, 0x97, 0x8A, 0x91, 0x95
+        .db 0x88, 0x10, 0xF3, 0x60, 0x4C, 0xDC, 0xC8, 0x20, 0xCD, 0xC8, 0x20, 0xF1, 0xD2, 0xA9, 0xD3, 0x48
+        .db 0xA9, 0x85, 0x48, 0x6C, 0x11, 0x00, 0x4C, 0xC2, 0x00, 0x20, 0xD8, 0xD2, 0x86, 0x97, 0xA2, 0x00
+        .db 0x20, 0xC2, 0x00, 0xF0, 0x03, 0x20, 0xDE, 0xD2, 0x86, 0x98, 0xB1, 0x11, 0x45, 0x98, 0x25, 0x97
+        .db 0xF0, 0xF8, 0x60, 0x20, 0x8B, 0xD5, 0xA5, 0xB0, 0x49, 0xFF, 0x85, 0xB0, 0x45, 0xB7, 0x85, 0xB8
+        .db 0xA5, 0xAC, 0x4C, 0xC1, 0xD3, 0x20, 0xDA, 0xD4, 0x90, 0x4D, 0xA9, 0xE9, 0xA0, 0xDF, 0x20, 0x8B
+        .db 0xD5, 0xD0, 0x10, 0xA5, 0xB7, 0x85, 0xB0, 0xA2, 0x04, 0xB5, 0xB2, 0x95, 0xAB, 0xCA, 0xD0, 0xF9
+        .db 0x86, 0xB9, 0x60, 0xA6, 0xB9, 0x86, 0xA3, 0xA2, 0xB3, 0xA5, 0xB3, 0xA8, 0xF0, 0xC4, 0x38, 0xE5
+        .db 0xAC, 0xF0, 0x24, 0x90, 0x12, 0x84, 0xAC, 0xA4, 0xB7, 0x84, 0xB0, 0x49, 0xFF, 0x69, 0x00, 0xA0
+        .db 0x00, 0x84, 0xA3, 0xA2, 0xAC, 0xD0, 0x04, 0xA0, 0x00, 0x84, 0xB9, 0xC9, 0xF9, 0x30, 0xB6, 0xA8
+        .db 0xA5, 0xB9, 0x56, 0x01, 0x20, 0xF1, 0xD4, 0x24, 0xB8, 0x10, 0x4C, 0xA0, 0xAC, 0xE0, 0xB3, 0xF0
+        .db 0x02, 0xA0, 0xB3, 0x38, 0x49, 0xFF, 0x65, 0xA3, 0x85, 0xB9, 0xB9, 0x03, 0x00, 0xF5, 0x03, 0x85
+        .db 0xAF, 0xB9, 0x02, 0x00, 0xF5, 0x02, 0x85, 0xAE, 0xB9, 0x01, 0x00, 0xF5, 0x01, 0x85, 0xAD, 0xB0
+        .db 0x03, 0x20, 0x96, 0xD4, 0xA0, 0x00, 0x98, 0x18, 0xA6, 0xAD, 0xD0, 0x3E, 0xA6, 0xAE, 0x86, 0xAD
+        .db 0xA6, 0xAF, 0x86, 0xAE, 0xA6, 0xB9, 0x86, 0xAF, 0x84, 0xB9, 0x69, 0x08, 0xC9, 0x18, 0xD0, 0xE8
+        .db 0xA9, 0x00, 0x85, 0xAC, 0x85, 0xB0, 0x60, 0x65, 0xA3, 0x85, 0xB9, 0xA5, 0xAF, 0x65, 0xB6, 0x85
+        .db 0xAF, 0xA5, 0xAE, 0x65, 0xB5, 0x85, 0xAE, 0xA5, 0xAD, 0x65, 0xB4, 0x85, 0xAD, 0xB0, 0x1A, 0x60
+        .db 0x69, 0x01, 0x06, 0xB9, 0x26, 0xAF, 0x26, 0xAE, 0x26, 0xAD, 0x10, 0xF4, 0x38, 0xE5, 0xAC, 0xB0
+        .db 0xCF, 0x49, 0xFF, 0x69, 0x01, 0x85, 0xAC, 0x90, 0x0C, 0xE6, 0xAC, 0xF0, 0x36, 0x66, 0xAD, 0x66
+        .db 0xAE, 0x66, 0xAF, 0x66, 0xB9, 0x60, 0xA5, 0xB0, 0x49, 0xFF, 0x85, 0xB0, 0xA5, 0xAD, 0x49, 0xFF
+        .db 0x85, 0xAD, 0xA5, 0xAE, 0x49, 0xFF, 0x85, 0xAE, 0xA5, 0xAF, 0x49, 0xFF, 0x85, 0xAF, 0xA5, 0xB9
+        .db 0x49, 0xFF, 0x85, 0xB9, 0xE6, 0xB9, 0xD0, 0x0A, 0xE6, 0xAF, 0xD0, 0x06, 0xE6, 0xAE, 0xD0, 0x02
+        .db 0xE6, 0xAD, 0x60, 0xA2, 0x0A, 0x4C, 0x3C, 0xBF, 0xA2, 0x74, 0xB4, 0x03, 0x84, 0xB9, 0xB4, 0x02
+        .db 0x94, 0x03, 0xB4, 0x01, 0x94, 0x02, 0xA4, 0xB2, 0x94, 0x01, 0x69, 0x08, 0x30, 0xEC, 0xF0, 0xEA
+        .db 0xE9, 0x08, 0xA8, 0xA5, 0xB9, 0xB0, 0x12, 0x16, 0x01, 0x90, 0x02, 0xF6, 0x01, 0x76, 0x01, 0x76
+        .db 0x01, 0x76, 0x02, 0x76, 0x03, 0x6A, 0xC8, 0xD0, 0xEE, 0x18, 0x60, 0x20, 0xE9, 0xD6, 0xF0, 0x02
+        .db 0x10, 0x03, 0x4C, 0x29, 0xCD, 0xA5, 0xAC, 0xE9, 0x7F, 0x48, 0xA9, 0x80, 0x85, 0xAC, 0xA9, 0x69
+        .db 0xA0, 0xDF, 0x20, 0xBE, 0xD3, 0xA9, 0x6D, 0xA0, 0xDF, 0x20, 0x01, 0xD6, 0xA9, 0xE0, 0xA0, 0xDF
+        .db 0x20, 0xA3, 0xD3, 0xA9, 0x5C, 0xA0, 0xDF, 0x20, 0x51, 0xDA, 0xA9, 0x71, 0xA0, 0xDF, 0x20, 0xBE
+        .db 0xD3, 0x68, 0x20, 0x45, 0xD8, 0xA9, 0x75, 0xA0, 0xDF, 0x20, 0x8B, 0xD5, 0xF0, 0x4C, 0x20, 0xB1
+        .db 0xD5, 0xA9, 0x00, 0x85, 0x75, 0x85, 0x76, 0x85, 0x77, 0xA5, 0xB9, 0x20, 0x60, 0xD5, 0xA5, 0xAF
+        .db 0x20, 0x60, 0xD5, 0xA5, 0xAE, 0x20, 0x60, 0xD5, 0xA5, 0xAD, 0x20, 0x65, 0xD5, 0x4C, 0x6E, 0xD6
+        .db 0xD0, 0x03, 0x4C, 0xC8, 0xD4, 0x4A, 0x09, 0x80, 0xA8, 0x90, 0x13, 0x18, 0xA5, 0x77, 0x65, 0xB6
+        .db 0x85, 0x77, 0xA5, 0x76, 0x65, 0xB5, 0x85, 0x76, 0xA5, 0x75, 0x65, 0xB4, 0x85, 0x75, 0x66, 0x75
+        .db 0x66, 0x76, 0x66, 0x77, 0x66, 0xB9, 0x98, 0x4A, 0xD0, 0xDE, 0x60, 0x85, 0x71, 0x84, 0x72, 0xA0
+        .db 0x03, 0xB1, 0x71, 0x85, 0xB6, 0x88, 0xB1, 0x71, 0x85, 0xB5, 0x88, 0xB1, 0x71, 0x85, 0xB7, 0x45
+        .db 0xB0, 0x85, 0xB8, 0xA5, 0xB7, 0x09, 0x80, 0x85, 0xB4, 0x88, 0xB1, 0x71, 0x85, 0xB3, 0xA5, 0xAC
+        .db 0x60, 0xA5, 0xB3, 0xF0, 0x1D, 0x18, 0x65, 0xAC, 0x90, 0x04, 0x30, 0x31, 0x18, 0x2C, 0x10, 0x12
+        .db 0x69, 0x80, 0x85, 0xAC, 0xD0, 0x03, 0x4C, 0x54, 0xD4, 0xA5, 0xB8, 0x85, 0xB0, 0x60, 0xA5, 0xB0
+        .db 0x10, 0x1B, 0x68, 0x68, 0x4C, 0x50, 0xD4, 0x20, 0xCA, 0xD6, 0xAA, 0xF0, 0xF0, 0x18, 0x69, 0x02
+        .db 0xB0, 0x0B, 0xA2, 0x00, 0x86, 0xB8, 0x20, 0xDB, 0xD3, 0xE6, 0xAC, 0xD0, 0xE0, 0x4C, 0xC3, 0xD4
+        .db 0x20, 0xCA, 0xD6, 0xA9, 0xF1, 0xA0, 0xDF, 0xA2, 0x00, 0x86, 0xB8, 0x20, 0x7D, 0xD6, 0x4C, 0x04
+        .db 0xD6, 0x20, 0x8B, 0xD5, 0xF0, 0x63, 0x20, 0xD9, 0xD6, 0xA9, 0x00, 0x38, 0xE5, 0xAC, 0x85, 0xAC
+        .db 0x20, 0xB1, 0xD5, 0xE6, 0xAC, 0xF0, 0xD6, 0xA2, 0xFF, 0xA9, 0x01, 0xA4, 0xB4, 0xC4, 0xAD, 0xD0
+        .db 0x0A, 0xA4, 0xB5, 0xC4, 0xAE, 0xD0, 0x04, 0xA4, 0xB6, 0xC4, 0xAF, 0x08, 0x2A, 0x90, 0x0E, 0xA0
+        .db 0x01, 0xE8, 0xE0, 0x02, 0x30, 0x04, 0xD0, 0x28, 0xA0, 0x40, 0x95, 0x75, 0x98, 0x28, 0x90, 0x14
+        .db 0xA8, 0xA5, 0xB6, 0xE5, 0xAF, 0x85, 0xB6, 0xA5, 0xB5, 0xE5, 0xAE, 0x85, 0xB5, 0xA5, 0xB4, 0xE5
+        .db 0xAD, 0x85, 0xB4, 0x98, 0x06, 0xB6, 0x26, 0xB5, 0x26, 0xB4, 0xB0, 0xCF, 0x30, 0xBD, 0x10, 0xCB
+        .db 0x4A, 0x6A, 0x6A, 0x85, 0xB9, 0x28, 0x4C, 0x6E, 0xD6, 0xA2, 0x14, 0x4C, 0x3C, 0xBF, 0xA5, 0x75
+        .db 0x85, 0xAD, 0xA5, 0x76, 0x85, 0xAE, 0xA5, 0x77, 0x85, 0xAF, 0x4C, 0x34, 0xD4, 0x85, 0x71, 0x84
+        .db 0x72, 0xA0, 0x03, 0xB1, 0x71, 0x85, 0xAF, 0x88, 0xB1, 0x71, 0x85, 0xAE, 0x88, 0xB1, 0x71, 0x85
+        .db 0xB0, 0x09, 0x80, 0x85, 0xAD, 0x88, 0xB1, 0x71, 0x85, 0xAC, 0x84, 0xB9, 0x60, 0xA2, 0xA4, 0xA0
+        .db 0x00, 0xF0, 0x04, 0xA6, 0x97, 0xA4, 0x98, 0x20, 0xD9, 0xD6, 0x86, 0x71, 0x84, 0x72, 0xA0, 0x03
+        .db 0xA5, 0xAF, 0x91, 0x71, 0x88, 0xA5, 0xAE, 0x91, 0x71, 0x88, 0xA5, 0xB0, 0x09, 0x7F, 0x25, 0xAD
+        .db 0x91, 0x71, 0x88, 0xA5, 0xAC, 0x91, 0x71, 0x84, 0xB9, 0x60, 0x20, 0xD9, 0xD6, 0xA2, 0x05, 0xB5
+        .db 0xAB, 0x95, 0xB2, 0xCA, 0xD0, 0xF9, 0x86, 0xB9, 0x60, 0xA5, 0xAC, 0xF0, 0xFB, 0x06, 0xB9, 0x90
+        .db 0xF7, 0x20, 0xB8, 0xD4, 0xD0, 0xF2, 0x4C, 0x89, 0xD4, 0xA5, 0xAC, 0xF0, 0x09, 0xA5, 0xB0, 0x2A
+        .db 0xA9, 0xFF, 0xB0, 0x02, 0xA9, 0x01, 0x60, 0x20, 0xE9, 0xD6, 0x85, 0xAD, 0xA9, 0x00, 0x85, 0xAE
+        .db 0xA2, 0x88, 0xA5, 0xAD, 0x49, 0xFF, 0x2A, 0xA9, 0x00, 0x85, 0xAF, 0x86, 0xAC, 0x85, 0xB9, 0x85
+        .db 0xB0, 0x4C, 0x2F, 0xD4, 0x46, 0xB0, 0x60, 0x85, 0x73, 0x84, 0x74, 0xA0, 0x00, 0xB1, 0x73, 0xC8
+        .db 0xAA, 0xF0, 0xC6, 0xB1, 0x73, 0x45, 0xB0, 0x30, 0xC4, 0xE4, 0xAC, 0xD0, 0x1A, 0xB1, 0x73, 0x09
+        .db 0x80, 0xC5, 0xAD, 0xD0, 0x12, 0xC8, 0xB1, 0x73, 0xC5, 0xAE, 0xD0, 0x0B, 0xC8, 0xA9, 0x7F, 0xC5
+        .db 0xB9, 0xB1, 0x73, 0xE5, 0xAF, 0xF0, 0x28, 0xA5, 0xB0, 0x90, 0x02, 0x49, 0xFF, 0x4C, 0xEF, 0xD6
+        .db 0xA5, 0xAC, 0xF0, 0x4A, 0x38, 0xE9, 0x98, 0x24, 0xB0, 0x10, 0x09, 0xAA, 0xA9, 0xFF, 0x85, 0xB2
+        .db 0x20, 0x9C, 0xD4, 0x8A, 0xA2, 0xAC, 0xC9, 0xF9, 0x10, 0x06, 0x20, 0xDA, 0xD4, 0x84, 0xB2, 0x60
+        .db 0xA8, 0xA5, 0xB0, 0x29, 0x80, 0x46, 0xAD, 0x05, 0xAD, 0x85, 0xAD, 0x20, 0xF1, 0xD4, 0x84, 0xB2
+        .db 0x60, 0xA5, 0xAC, 0xC9, 0x98, 0xB0, 0x1E, 0x20, 0x50, 0xD7, 0x84, 0xB9, 0xA5, 0xB0, 0x84, 0xB0
+        .db 0x49, 0x80, 0x2A, 0xA9, 0x98, 0x85, 0xAC, 0xA5, 0xAF, 0x85, 0x5B, 0x4C, 0x2F, 0xD4, 0x85, 0xAD
+        .db 0x85, 0xAE, 0x85, 0xAF, 0xA8, 0x60, 0xA0, 0x00, 0x84, 0x5F, 0xA2, 0x09, 0x94, 0xA8, 0xCA, 0x10
+        .db 0xFB, 0x90, 0x7F, 0xC9, 0x2D, 0xD0, 0x04, 0x86, 0xB1, 0xF0, 0x04, 0xC9, 0x2B, 0xD0, 0x05, 0x20
+        .db 0xBC, 0x00, 0x90, 0x6E, 0xC9, 0x24, 0xD0, 0x03, 0x4C, 0x6E, 0xDC, 0xC9, 0x25, 0xD0, 0x08, 0x4C
+        .db 0x9C, 0xDC, 0x20, 0xBC, 0x00, 0x90, 0x5B, 0xC9, 0x2E, 0xF0, 0x2E, 0xC9, 0x45, 0xD0, 0x30, 0x20
+        .db 0xBC, 0x00, 0x90, 0x17, 0xC9, 0xB8, 0xF0, 0x0E, 0xC9, 0x2D, 0xF0, 0x0A, 0xC9, 0xB7, 0xF0, 0x08
+        .db 0xC9, 0x2B, 0xF0, 0x04, 0xD0, 0x07, 0x66, 0xAB, 0x20, 0xBC, 0x00, 0x90, 0x5B, 0x24, 0xAB, 0x10
+        .db 0x0E, 0xA9, 0x00, 0x38, 0xE5, 0xA9, 0x4C, 0x11, 0xD8, 0x66, 0xAA, 0x24, 0xAA, 0x50, 0xC3, 0xA5
+        .db 0xA9, 0x38, 0xE5, 0xA8, 0x85, 0xA9, 0xF0, 0x12, 0x10, 0x09, 0x20, 0xF0, 0xD5, 0xE6, 0xA9, 0xD0
+        .db 0xF9, 0xF0, 0x07, 0x20, 0xD7, 0xD5, 0xC6, 0xA9, 0xD0, 0xF9, 0xA5, 0xB1, 0x30, 0x01, 0x60, 0x4C
+        .db 0xF4, 0xD9, 0x48, 0x24, 0xAA, 0x10, 0x02, 0xE6, 0xA8, 0x20, 0xD7, 0xD5, 0x68, 0x29, 0x0F, 0x20
+        .db 0x45, 0xD8, 0x4C, 0xD2, 0xD7, 0x48, 0x20, 0xCA, 0xD6, 0x68, 0x20, 0xFA, 0xD6, 0xA5, 0xB7, 0x45
+        .db 0xB0, 0x85, 0xB8, 0xA6, 0xAC, 0x4C, 0xC1, 0xD3, 0xA5, 0xA9, 0xC9, 0x0A, 0x90, 0x09, 0xA9, 0x64
+        .db 0x24, 0xAB, 0x30, 0x0E, 0x4C, 0xC3, 0xD4, 0x0A, 0x0A, 0x65, 0xA9, 0x0A, 0xA0, 0x00, 0x71, 0xC3
+        .db 0xE9, 0x2F, 0x85, 0xA9, 0x4C, 0xF8, 0xD7, 0xA9, 0xF6, 0xA0, 0xE5, 0x20, 0xD3, 0xC6, 0xA5, 0x88
+        .db 0xA6, 0x87, 0x85, 0xAD, 0x86, 0xAE, 0xA2, 0x90, 0x38, 0x20, 0x07, 0xD7, 0xA0, 0x00, 0x98, 0x20
+        .db 0xA2, 0xD8, 0x4C, 0xD3, 0xC6, 0xA0, 0x01, 0xA9, 0x20, 0x24, 0xB0, 0x10, 0x02, 0xA9, 0x2D, 0x99
+        .db 0xEF, 0x00, 0x85, 0xB0, 0x84, 0xBA, 0xC8, 0xA6, 0xAC, 0xD0, 0x05, 0xA9, 0x30, 0x4C, 0xAE, 0xD9
+        .db 0xA9, 0x00, 0xE0, 0x81, 0xB0, 0x09, 0xA9, 0x81, 0xA0, 0xDF, 0x20, 0x39, 0xD5, 0xA9, 0xFA, 0x85
+        .db 0xA8, 0xA9, 0x7D, 0xA0, 0xDF, 0x20, 0x17, 0xD7, 0xF0, 0x1E, 0x10, 0x12, 0xA9, 0x79, 0xA0, 0xDF
+        .db 0x20, 0x17, 0xD7, 0xF0, 0x02, 0x10, 0x0E, 0x20, 0xD7, 0xD5, 0xC6, 0xA8, 0xD0, 0xEE, 0x20, 0xF0
+        .db 0xD5, 0xE6, 0xA8, 0xD0, 0xDC, 0x20, 0xBA, 0xD3, 0x20, 0x50, 0xD7, 0xA2, 0x01, 0xA5, 0xA8, 0x18
+        .db 0x69, 0x07, 0x30, 0x09, 0xC9, 0x08, 0xB0, 0x06, 0x69, 0xFF, 0xAA, 0xA9, 0x02, 0x38, 0xE9, 0x02
+        .db 0x85, 0xA9, 0x86, 0xA8, 0x8A, 0xF0, 0x02, 0x10, 0x13, 0xA4, 0xBA, 0xA9, 0x2E, 0xC8, 0x99, 0xEF
+        .db 0x00, 0x8A, 0xF0, 0x06, 0xA9, 0x30, 0xC8, 0x99, 0xEF, 0x00, 0x84, 0xBA, 0xA0, 0x00, 0xA2, 0x80
+        .db 0xA5, 0xAF, 0x18, 0x79, 0xF7, 0xDF, 0x85, 0xAF, 0xA5, 0xAE, 0x79, 0xF6, 0xDF, 0x85, 0xAE, 0xA5
+        .db 0xAD, 0x79, 0xF5, 0xDF, 0x85, 0xAD, 0xE8, 0xB0, 0x04, 0x10, 0xE5, 0x30, 0x02, 0x30, 0xE1, 0x8A
+        .db 0x90, 0x04, 0x49, 0xFF, 0x69, 0x0A, 0x69, 0x2F, 0xC8, 0xC8, 0xC8, 0x84, 0x95, 0xA4, 0xBA, 0xC8
+        .db 0xAA, 0x29, 0x7F, 0x99, 0xEF, 0x00, 0xC6, 0xA8, 0xD0, 0x06, 0xA9, 0x2E, 0xC8, 0x99, 0xEF, 0x00
+        .db 0x84, 0xBA, 0xA4, 0x95, 0x8A, 0x49, 0xFF, 0x29, 0x80, 0xAA, 0xC0, 0x12, 0xD0, 0xB2, 0xA4, 0xBA
+        .db 0xB9, 0xEF, 0x00, 0x88, 0xC9, 0x30, 0xF0, 0xF8, 0xC9, 0x2E, 0xF0, 0x01, 0xC8, 0xA9, 0x2B, 0xA6
+        .db 0xA9, 0xF0, 0x2E, 0x10, 0x08, 0xA9, 0x00, 0x38, 0xE5, 0xA9, 0xAA, 0xA9, 0x2D, 0x99, 0xF1, 0x00
+        .db 0xA9, 0x45, 0x99, 0xF0, 0x00, 0x8A, 0xA2, 0x2F, 0x38, 0xE8, 0xE9, 0x0A, 0xB0, 0xFB, 0x69, 0x3A
+        .db 0x99, 0xF3, 0x00, 0x8A, 0x99, 0xF2, 0x00, 0xA9, 0x00, 0x99, 0xF4, 0x00, 0xF0, 0x08, 0x99, 0xEF
+        .db 0x00, 0xA9, 0x00, 0x99, 0xF0, 0x00, 0xA9, 0xF0, 0xA0, 0x00, 0x60, 0xF0, 0x42, 0xA5, 0xB3, 0xD0
+        .db 0x03, 0x4C, 0x52, 0xD4, 0xA2, 0x9C, 0xA0, 0x00, 0x20, 0xA7, 0xD6, 0xA5, 0xB7, 0x10, 0x0F, 0x20
+        .db 0x81, 0xD7, 0xA9, 0x9C, 0xA0, 0x00, 0x20, 0x17, 0xD7, 0xD0, 0x03, 0x98, 0xA4, 0x5B, 0x20, 0xC5
+        .db 0xD3, 0x98, 0x48, 0x20, 0xFB, 0xD4, 0xA9, 0x9C, 0xA0, 0x00, 0x20, 0x39, 0xD5, 0x20, 0xFF, 0xD9
+        .db 0x68, 0x4A, 0x90, 0x0A, 0xA5, 0xAC, 0xF0, 0x06, 0xA5, 0xB0, 0x49, 0xFF, 0x85, 0xB0, 0x60, 0xA9
+        .db 0x85, 0xA0, 0xDF, 0x20, 0x39, 0xD5, 0xA5, 0xB9, 0x69, 0x50, 0x90, 0x03, 0x20, 0xE1, 0xD6, 0x85
+        .db 0xA3, 0x20, 0xCD, 0xD6, 0xA5, 0xAC, 0xC9, 0x88, 0x90, 0x03, 0x20, 0xCE, 0xD5, 0x20, 0x81, 0xD7
+        .db 0xA5, 0x5B, 0x18, 0x69, 0x81, 0xF0, 0xF3, 0x38, 0xE9, 0x01, 0x48, 0xA2, 0x04, 0xB5, 0xB3, 0xB4
+        .db 0xAC, 0x95, 0xAC, 0x94, 0xB3, 0xCA, 0x10, 0xF5, 0xA5, 0xA3, 0x85, 0xB9, 0x20, 0xA6, 0xD3, 0x20
+        .db 0xF4, 0xD9, 0xA9, 0x89, 0xA0, 0xDF, 0x20, 0x67, 0xDA, 0xA9, 0x00, 0x85, 0xB8, 0x68, 0x4C, 0xB3
+        .db 0xD5, 0x85, 0xBA, 0x84, 0xBB, 0x20, 0x9D, 0xD6, 0xA9, 0xA4, 0x20, 0x39, 0xD5, 0x20, 0x6B, 0xDA
+        .db 0xA9, 0xA4, 0xA0, 0x00, 0x4C, 0x39, 0xD5, 0x85, 0xBA, 0x84, 0xBB, 0xA2, 0xA8, 0x20, 0x9F, 0xD6
+        .db 0xB1, 0xBA, 0x85, 0xB1, 0xA4, 0xBA, 0xC8, 0x98, 0xD0, 0x02, 0xE6, 0xBB, 0x85, 0xBA, 0xA4, 0xBB
+        .db 0x20, 0x39, 0xD5, 0xA5, 0xBA, 0xA4, 0xBB, 0x18, 0x69, 0x04, 0x90, 0x01, 0xC8, 0x85, 0xBA, 0x84
+        .db 0xBB, 0x20, 0xBE, 0xD3, 0xA9, 0xA8, 0xA0, 0x00, 0xC6, 0xB1, 0xD0, 0xE4, 0x60, 0xA5, 0xAC, 0xF0
+        .db 0x07, 0xA2, 0xD8, 0xA0, 0x00, 0x20, 0xA7, 0xD6, 0xA2, 0xAF, 0xA0, 0x13, 0x06, 0xD9, 0x26, 0xDA
+        .db 0x26, 0xDB, 0x26, 0xD8, 0x90, 0x05, 0x8A, 0x45, 0xD9, 0x85, 0xD9, 0x88, 0xD0, 0xEE, 0xA2, 0x02
+        .db 0xB5, 0xD9, 0x95, 0xAD, 0xCA, 0x10, 0xF9, 0xA9, 0x80, 0x85, 0xAC, 0x0A, 0x85, 0xB0, 0x4C, 0x34
+        .db 0xD4, 0xA9, 0xA6, 0xA0, 0xDF, 0x20, 0xBE, 0xD3, 0x20, 0xCA, 0xD6, 0xA9, 0xBB, 0xA0, 0xDF, 0xA6
+        .db 0xB7, 0x20, 0xF9, 0xD5, 0x20, 0xCA, 0xD6, 0x20, 0x81, 0xD7, 0xA9, 0x00, 0x85, 0xB8, 0x20, 0xA6
+        .db 0xD3, 0xA9, 0xED, 0xA0, 0xDF, 0x20, 0xA3, 0xD3, 0xA5, 0xB0, 0x48, 0x10, 0x0D, 0x20, 0xBA, 0xD3
+        .db 0xA5, 0xB0, 0x30, 0x09, 0xA5, 0x63, 0x49, 0xFF, 0x85, 0x63, 0x20, 0xF4, 0xD9, 0xA9, 0xED, 0xA0
+        .db 0xDF, 0x20, 0xBE, 0xD3, 0x68, 0x10, 0x03, 0x20, 0xF4, 0xD9, 0xA9, 0xAA, 0xA0, 0xDF, 0x4C, 0x51
+        .db 0xDA, 0x20, 0x9D, 0xD6, 0xA9, 0x00, 0x85, 0x63, 0x20, 0xD8, 0xDA, 0xA2, 0x9C, 0xA0, 0x00, 0x20
+        .db 0xA7, 0xD6, 0xA9, 0xA4, 0xA0, 0x00, 0x20, 0x7D, 0xD6, 0xA9, 0x00, 0x85, 0xB0, 0xA5, 0x63, 0x20
+        .db 0x49, 0xDB, 0xA9, 0x9C, 0xA0, 0x00, 0x4C, 0x01, 0xD6, 0x48, 0x4C, 0x0A, 0xDB, 0x20, 0x0A, 0x00
+        .db 0x4C, 0xEF, 0xC9, 0xA5, 0xB0, 0x48, 0x10, 0x03, 0x20, 0xF4, 0xD9, 0xA5, 0xAC, 0x48, 0xC9, 0x81
+        .db 0x90, 0x07, 0xA9, 0xE0, 0xA0, 0xDF, 0x20, 0x01, 0xD6, 0xA9, 0xBF, 0xA0, 0xDF, 0x20, 0x51, 0xDA
+        .db 0x68, 0xC9, 0x81, 0x90, 0x07, 0xA9, 0xA6, 0xA0, 0xDF, 0x20, 0xA3, 0xD3, 0x68, 0x10, 0x16, 0x4C
+        .db 0xF4, 0xD9, 0x20, 0xD8, 0xD2, 0xE0, 0x08, 0xB0, 0x20, 0xA9, 0x00, 0x38, 0x2A, 0xCA, 0x10, 0xFC
+        .db 0xE8, 0x01, 0x11, 0x81, 0x11, 0x60, 0x20, 0xD8, 0xD2, 0xE0, 0x08, 0xB0, 0x0C, 0xA9, 0xFF, 0x2A
+        .db 0xCA, 0x10, 0xFC, 0xE8, 0x21, 0x11, 0x81, 0x11, 0x60, 0x4C, 0x29, 0xCD, 0x20, 0xBC, 0x00, 0x20
+        .db 0xD8, 0xD2, 0xE0, 0x08, 0xB0, 0xF3, 0x20, 0xC2, 0x00, 0xC9, 0x29, 0xF0, 0x03, 0x4C, 0x02, 0xCA
+        .db 0x20, 0xBC, 0x00, 0xA9, 0x00, 0x38, 0x2A, 0xCA, 0x10, 0xFC, 0xE8, 0x21, 0x11, 0xF0, 0x02, 0xA9
+        .db 0xFF, 0x4C, 0xFA, 0xD6, 0xE0, 0x19, 0xB0, 0x48, 0x86, 0x78, 0xA9, 0x18, 0x20, 0x3A, 0xCF, 0xA0
+        .db 0x17, 0xA2, 0x18, 0x46, 0x11, 0x66, 0x12, 0x66, 0x13, 0x8A, 0x2A, 0x91, 0xAD, 0x88, 0x10, 0xF3
+        .db 0xA5, 0x78, 0xF0, 0x0A, 0xAA, 0x38, 0x49, 0xFF, 0x69, 0x18, 0xF0, 0x1C, 0xD0, 0x0F, 0xA8, 0xB1
+        .db 0xAD, 0xC9, 0x30, 0xD0, 0x07, 0xCA, 0xF0, 0x03, 0xC8, 0x10, 0xF4, 0xE8, 0x98, 0x18, 0x65, 0xAD
+        .db 0x85, 0xAD, 0xA9, 0x00, 0x65, 0xAE, 0x85, 0xAE, 0x86, 0xAC, 0x20, 0xBC, 0x00, 0x4C, 0x85, 0xCF
+        .db 0x4C, 0x29, 0xCD, 0xE0, 0x07, 0xB0, 0xF9, 0x86, 0x78, 0xA9, 0x06, 0x20, 0x3A, 0xCF, 0xA0, 0x05
+        .db 0xF8, 0xA5, 0x13, 0x20, 0x51, 0xDC, 0xA5, 0x12, 0x20, 0x51, 0xDC, 0xA5, 0x11, 0x20, 0x51, 0xDC
+        .db 0xD8, 0xA2, 0x06, 0xA5, 0x78, 0xF0, 0xB7, 0xAA, 0x38, 0x49, 0xFF, 0x69, 0x06, 0xF0, 0xC9, 0xD0
+        .db 0xBC, 0xAA, 0x29, 0x0F, 0x20, 0x5C, 0xDC, 0x8A, 0x4A, 0x4A, 0x4A, 0x4A, 0xC9, 0x0A, 0x69, 0x30
+        .db 0x91, 0xAD, 0x88, 0x60, 0x85, 0xAC, 0xA9, 0x00, 0x85, 0xB8, 0x8A, 0x20, 0x45, 0xD8, 0x20, 0xBC
+        .db 0x00, 0x90, 0x0A, 0x09, 0x20, 0xE9, 0x61, 0xC9, 0x06, 0xB0, 0x2A, 0x69, 0x0A, 0x29, 0x0F, 0xAA
+        .db 0xA5, 0xAC, 0xF0, 0xE4, 0x69, 0x04, 0x90, 0xDC, 0x4C, 0xC3, 0xD4, 0xAA, 0xA5, 0xAC, 0xF0, 0x06
+        .db 0xE6, 0xAC, 0xF0, 0xF4, 0xA9, 0x00, 0x85, 0xB8, 0x8A, 0x20, 0x45, 0xD8, 0x20, 0xBC, 0x00, 0x49
+        .db 0x30, 0xC9, 0x02, 0x90, 0xE6, 0x4C, 0x2A, 0xD8, 0xAD, 0x00, 0x04, 0xD0, 0x18, 0x20, 0xEA, 0xDE
+        .db 0x90, 0x0B, 0x8D, 0x01, 0x04, 0xA2, 0x20, 0x8E, 0x02, 0x04, 0x4C, 0x17, 0xC3, 0xAE, 0x02, 0x04
+        .db 0xF0, 0x03, 0xCE, 0x02, 0x04, 0xA2, 0xDC, 0x20, 0xD0, 0xDC, 0xA2, 0xDF, 0x20, 0xD0, 0xDC, 0x60
+        .db 0xB5, 0x00, 0x10, 0xFB, 0x0A, 0x29, 0x40, 0xF0, 0xF6, 0x95, 0x00, 0x8A, 0xA8, 0x68, 0x68, 0xA9
+        .db 0x05, 0x20, 0x03, 0xBF, 0xA5, 0xC4, 0x48, 0xA5, 0xC3, 0x48, 0xA5, 0x88, 0x48, 0xA5, 0x87, 0x48
+        .db 0xA9, 0x8D, 0x48, 0xB9, 0x01, 0x00, 0x85, 0xC3, 0xB9, 0x02, 0x00, 0x85, 0xC4, 0x4C, 0xBC, 0xC2
+        .db 0x20, 0xEA, 0xDE, 0xB0, 0x09, 0xAD, 0x02, 0x04, 0xF0, 0x09, 0xAD, 0x01, 0x04, 0x38, 0xA2, 0x00
+        .db 0x8E, 0x02, 0x04, 0x60, 0xA2, 0xDF, 0x2C, 0xA2, 0xDC, 0xC9, 0x93, 0xF0, 0x11, 0xC9, 0xB6, 0xF0
+        .db 0x07, 0x49, 0xA2, 0xF0, 0x0E, 0x4C, 0x02, 0xCA, 0xA9, 0x7F, 0x35, 0x00, 0x10, 0x05, 0xB5, 0x00
+        .db 0x0A, 0x15, 0x00, 0x95, 0x00, 0x4C, 0xBC, 0x00, 0x58, 0xA2, 0xDF, 0x2C, 0xA2, 0xDC, 0x86, 0x78
+        .db 0x20, 0xBC, 0x00, 0x20, 0x55, 0xC5, 0xA5, 0x79, 0xA6, 0x7A, 0x20, 0x28, 0xC1, 0xB0, 0x03, 0x4C
+        .db 0x72, 0xC4, 0xA6, 0x78, 0xA5, 0xAA, 0xE9, 0x01, 0x95, 0x01, 0xA5, 0xAB, 0xE9, 0x00, 0x95, 0x02
+        .db 0xA9, 0xC0, 0x95, 0x00, 0x60, 0xD0, 0xFD, 0xA5, 0xDF, 0x0A, 0x05, 0xDF, 0x85, 0xDF, 0x4C, 0x79
+        .db 0xC4, 0xD0, 0xF1, 0xA5, 0xDC, 0x0A, 0x05, 0xDC, 0x85, 0xDC, 0x4C, 0x79, 0xC4, 0x20, 0xE9, 0xC8
+        .db 0x4C, 0xD0, 0xC8, 0x20, 0xB1, 0xDD, 0x10, 0xFB, 0xA5, 0xB4, 0x09, 0x80, 0x85, 0xB4, 0x20, 0xC3
+        .db 0xD3, 0xF0, 0xF0, 0x20, 0xB1, 0xDD, 0x30, 0xFB, 0xF0, 0xF9, 0xA5, 0xB4, 0x09, 0x80, 0x85, 0xB4
+        .db 0x20, 0xC3, 0xD3, 0xF0, 0xEE, 0xC9, 0x29, 0xD0, 0x05, 0x68, 0x68, 0x4C, 0xBC, 0x00, 0x4C, 0x02
+        .db 0xCA, 0x20, 0xC2, 0x00, 0xC9, 0x2C, 0xD0, 0xED, 0x20, 0xD9, 0xD6, 0xA5, 0xB0, 0x09, 0x7F, 0x25
+        .db 0xAD, 0x48, 0xA5, 0xAE, 0x48, 0xA5, 0xAF, 0x48, 0xA5, 0xAC, 0x48, 0x20, 0xBC, 0x00, 0x20, 0xCD
+        .db 0xC8, 0x68, 0x85, 0xB3, 0x68, 0x85, 0xB6, 0x68, 0x85, 0xB5, 0x68, 0x85, 0xB4, 0x85, 0xB7, 0xA9
+        .db 0xB3, 0xA0, 0x00, 0x4C, 0x17, 0xD7, 0xC9, 0x2C, 0xF0, 0x1B, 0x20, 0x8C, 0xD2, 0x8A, 0xF0, 0x0A
+        .db 0xE0, 0x10, 0x90, 0x45, 0xE4, 0x64, 0xB0, 0x02, 0x86, 0x64, 0x86, 0x0F, 0x20, 0xC2, 0x00, 0xF0
+        .db 0x1A, 0xC9, 0x2C, 0xD0, 0xA9, 0x20, 0x89, 0xD2, 0x8A, 0x30, 0x2E, 0xE0, 0x01, 0x90, 0x2A, 0xA5
+        .db 0x0F, 0xF0, 0x06, 0xE4, 0x0F, 0xF0, 0x02, 0xB0, 0x20, 0x86, 0x64, 0xA5, 0x0F, 0xF0, 0x06, 0xC5
+        .db 0x64, 0xB0, 0x03, 0x85, 0x64, 0x38, 0xE5, 0x64, 0xB0, 0xFC, 0x65, 0x64, 0x18, 0x65, 0x64, 0x85
+        .db 0x10, 0xA5, 0x0F, 0x38, 0xE5, 0x10, 0x85, 0x10, 0x60, 0x4C, 0x29, 0xCD, 0xA5, 0xB0, 0x30, 0xF9
+        .db 0xA5, 0xAC, 0xF0, 0xF4, 0x20, 0xCA, 0xD6, 0xA9, 0x00, 0x85, 0x77, 0x85, 0x76, 0x85, 0x75, 0x85
+        .db 0x78, 0x85, 0xAF, 0x85, 0xAE, 0x85, 0xAD, 0xA2, 0x18, 0xA5, 0xB3, 0x4A, 0xB0, 0x0E, 0x06, 0xB6
+        .db 0x26, 0xB5, 0x26, 0xB4, 0x26, 0x77, 0x26, 0x76, 0x26, 0x75, 0x26, 0x78, 0x06, 0xB6, 0x26, 0xB5
+        .db 0x26, 0xB4, 0x26, 0x77, 0x26, 0x76, 0x26, 0x75, 0x26, 0x78, 0x06, 0xAF, 0x26, 0xAE, 0x26, 0xAD
+        .db 0xA5, 0xAF, 0x2A, 0x85, 0x5B, 0xA5, 0xAE, 0x2A, 0x85, 0x5C, 0xA5, 0xAD, 0x2A, 0x85, 0x5D, 0xA9
+        .db 0x00, 0x2A, 0x85, 0x5E, 0xA5, 0x77, 0xE5, 0x5B, 0x85, 0x5B, 0xA5, 0x76, 0xE5, 0x5C, 0x85, 0x5C
+        .db 0xA5, 0x75, 0xE5, 0x5D, 0xA8, 0xA5, 0x78, 0xE5, 0x5E, 0x90, 0x0E, 0x85, 0x78, 0x84, 0x75, 0xA5
+        .db 0x5C, 0x85, 0x76, 0xA5, 0x5B, 0x85, 0x77, 0xE6, 0xAF, 0xCA, 0xD0, 0xA2, 0x38, 0xA5, 0xB3, 0xE9
+        .db 0x80, 0x6A, 0x69, 0x00, 0x85, 0xAC, 0x4C, 0x34, 0xD4, 0x20, 0xBC, 0x00, 0x20, 0xAA, 0xCB, 0x20
+        .db 0xEF, 0xC9, 0xA4, 0x95, 0xA5, 0x96, 0x4C, 0x59, 0xCE, 0xA9, 0xBB, 0xA0, 0xDF, 0x20, 0x7D, 0xD6
+        .db 0xC6, 0xAC, 0x60, 0xA9, 0xBB, 0xA0, 0xDF, 0x4C, 0x7D, 0xD6, 0x6C, 0x05, 0x04, 0x6C, 0x07, 0x04
+        .db 0x6C, 0x09, 0x04, 0x6C, 0x0B, 0x04, 0x00, 0x00, 0x00, 0xA8, 0xDC, 0xE6, 0xC3, 0xD0, 0x02, 0xE6
+        .db 0xC4, 0xAD, 0xFF, 0xFF, 0xC9, 0xAD, 0xF0, 0x0E, 0xC9, 0x3A, 0xB0, 0x0A, 0xC9, 0x20, 0xF0, 0xEB
+        .db 0x38, 0xE9, 0x30, 0x38, 0xE9, 0xD0, 0x60, 0x4C, 0x00, 0xBE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x4C, 0x29, 0xCD, 0x00, 0x00, 0x00, 0xF2, 0x00, 0x05, 0x0D, 0x0A, 0x4D, 0x65, 0x6D, 0x6F
+        .db 0x72, 0x79, 0x20, 0x73, 0x69, 0x7A, 0x65, 0x20, 0x00, 0x20, 0x42, 0x79, 0x74, 0x65, 0x73, 0x20
+        .db 0x66, 0x72, 0x65, 0x65, 0x0D, 0x0A, 0x0A, 0x45, 0x6E, 0x68, 0x61, 0x6E, 0x63, 0x65, 0x64, 0x20
+        .db 0x42, 0x41, 0x53, 0x49, 0x43, 0x20, 0x32, 0x2E, 0x32, 0x32, 0x0A, 0x00, 0x02, 0x80, 0x19, 0x56
+        .db 0x62, 0x80, 0x76, 0x22, 0xF3, 0x82, 0x38, 0xAA, 0x40, 0x80, 0x35, 0x04, 0xF3, 0x81, 0x35, 0x04
+        .db 0xF3, 0x80, 0x80, 0x00, 0x00, 0x80, 0x31, 0x72, 0x18, 0x91, 0x43, 0x4F, 0xF8, 0x94, 0x74, 0x23
+        .db 0xF7, 0x94, 0x74, 0x24, 0x00, 0x81, 0x38, 0xAA, 0x3B, 0x06, 0x74, 0x63, 0x90, 0x8C, 0x77, 0x23
+        .db 0x0C, 0xAB, 0x7A, 0x1E, 0x94, 0x00, 0x7C, 0x63, 0x42, 0x80, 0x7E, 0x75, 0xFE, 0xD0, 0x80, 0x31
+        .db 0x72, 0x15, 0x81, 0x00, 0x00, 0x00, 0x81, 0x49, 0x0F, 0xDB, 0x04, 0x86, 0x1E, 0xD7, 0xFB, 0x87
+        .db 0x99, 0x26, 0x65, 0x87, 0x23, 0x34, 0x58, 0x86, 0xA5, 0x5D, 0xE1, 0x83, 0x49, 0x0F, 0xDB, 0x08
+        .db 0x78, 0x3A, 0xC5, 0x37, 0x7B, 0x83, 0xA2, 0x5C, 0x7C, 0x2E, 0xDD, 0x4D, 0x7D, 0x99, 0xB0, 0x1E
+        .db 0x7D, 0x59, 0xED, 0x24, 0x7E, 0x91, 0x72, 0x00, 0x7E, 0x4C, 0xB9, 0x73, 0x7F, 0xAA, 0xAA, 0x53
+        .db 0x81, 0x00, 0x00, 0x00, 0x81, 0x80, 0x00, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00
+        .db 0x00, 0x84, 0x20, 0x00, 0x00, 0xFE, 0x79, 0x60, 0x00, 0x27, 0x10, 0xFF, 0xFC, 0x18, 0x00, 0x00
+        .db 0x64, 0xFF, 0xFF, 0xF6, 0x00, 0x00, 0x01, 0x1A, 0xC3, 0x57, 0xC2, 0x64, 0xC8, 0x8B, 0xC4, 0x46
+        .db 0xC7, 0x5E, 0xCB, 0x66, 0xC7, 0xB3, 0xC5, 0x85, 0xC5, 0xEA, 0xC3, 0xA9, 0xC3, 0xB9, 0xC4, 0x41
+        .db 0xC3, 0xCD, 0xC3, 0x64, 0xDD, 0x70, 0xDD, 0x76, 0xC4, 0x1D, 0xC5, 0x18, 0xC3, 0x26, 0xC5, 0x7F
+        .db 0xC3, 0x88, 0xC5, 0x88, 0xD3, 0xEF, 0xDE, 0xF2, 0xDE, 0x73, 0xCE, 0x0D, 0xD3, 0x29, 0xD3, 0x76
+        .db 0xD3, 0xB3, 0xC3, 0x1C, 0xC4, 0x54, 0xC6, 0x85, 0xC3, 0xA2, 0xC1, 0x9F, 0xC1, 0x4D, 0xC1, 0xE5
+        .db 0xDD, 0x23, 0xC6, 0x4E, 0xD3, 0x81, 0xDB, 0x95, 0xDB, 0x13, 0xDD, 0x16, 0xDD, 0x3D, 0xE8, 0x64
+        .db 0xCA, 0x64, 0xCA, 0x64, 0xCA, 0xE8, 0xC8, 0xEB, 0xC9, 0xEB, 0xC9, 0x64, 0xCA, 0x64, 0xCA, 0x64
+        .db 0xCA, 0x64, 0xCA, 0x64, 0xCA, 0x64, 0xCA, 0x64, 0xCA, 0x64, 0xCA, 0x64, 0xCA, 0x64, 0xCA, 0x00
+        .db 0x00, 0x5E, 0xCA, 0x64, 0xCA, 0x5E, 0xCA, 0x5E, 0xCA, 0x5E, 0xCA, 0x5E, 0xCA, 0x64, 0xCA, 0x8B
+        .db 0xCA, 0x8B, 0xCA, 0x00, 0x00, 0x7C, 0xDD, 0x7C, 0xDD, 0x6A, 0xCA, 0x6A, 0xCA, 0x00, 0x00, 0x6F
+        .db 0xCA, 0x6F, 0xCA, 0x6F, 0xCA, 0xF6, 0xD6, 0x80, 0xD7, 0x13, 0xD7, 0x4C, 0xDB, 0x44, 0xCE, 0x63
+        .db 0xCE, 0x3B, 0xDE, 0x9C, 0xDA, 0xFA, 0xD4, 0xFE, 0xD9, 0xD0, 0xDA, 0xD7, 0xDA, 0x20, 0xDB, 0x52
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+        .db 0xD2, 0x11, 0xD2, 0x83, 0xD1, 0x22, 0xDC, 0xD3, 0xDB, 0xAB, 0xDB, 0x82, 0xDD, 0x92, 0xDD, 0xD8
+        .db 0xDE, 0xE2, 0xDE, 0xC8, 0xDE, 0x95, 0xD1, 0x9E, 0xD1, 0xCD, 0xD1, 0x79, 0xC0, 0xD3, 0x79, 0xA5
+        .db 0xD3, 0x7B, 0x3B, 0xD5, 0x7B, 0x03, 0xD6, 0x7F, 0xBA, 0xD9, 0x50, 0xD4, 0xCA, 0x46, 0xBA, 0xCA
+        .db 0x46, 0xC7, 0xCA, 0x56, 0x80, 0xCB, 0x56, 0x68, 0xCB, 0x7D, 0xF3, 0xD9, 0x5A, 0x16, 0xCA, 0x64
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+        .db 0x47, 0x48, 0x49, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x5E, 0x00
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+        .db 0x7E, 0xE1, 0x8E, 0xE1, 0xA7, 0xE1, 0xBE, 0xE1, 0xD7, 0xE1, 0xE6, 0xE1, 0xF0, 0xE1, 0xFD, 0xE1
+        .db 0x03, 0xE2, 0x15, 0xE2, 0x3A, 0xE2, 0x48, 0xE2, 0x5A, 0xE2, 0x62, 0xE2, 0x77, 0xE2, 0xA6, 0xE2
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+        .db 0xE7, 0x4C, 0x8C, 0xE7, 0x20, 0x50, 0x43, 0x3D, 0x20, 0x20, 0x41, 0x3D, 0x20, 0x20, 0x58, 0x3D
+        .db 0x20, 0x20, 0x59, 0x3D, 0x20, 0x20, 0x53, 0x3D, 0x20, 0x20, 0x50, 0x3D, 0x20, 0x28, 0x4E, 0x56
+        .db 0x52, 0x42, 0x44, 0x49, 0x5A, 0x43, 0x29, 0x3D, 0x20, 0x4F, 0xE7, 0xA2, 0xFF, 0xA0, 0xFF, 0xC8
+        .db 0xB9, 0xF4, 0xE6, 0x20, 0xFB, 0xE7, 0xC9, 0x3D, 0xD0, 0xF5, 0xE8, 0xE0, 0x07, 0xF0, 0x0C, 0xBD
+        .db 0xE0, 0x03, 0x20, 0x60, 0xE7, 0xE0, 0x00, 0xD0, 0xE6, 0x80, 0xEF, 0xCA, 0xBD, 0xE0, 0x03, 0xA2
+        .db 0x08, 0x2A, 0xA8, 0xA9, 0x31, 0xB0, 0x01, 0x3A, 0x20, 0xFB, 0xE7, 0x98, 0xCA, 0xD0, 0xF2, 0x48
+        .db 0xA9, 0x0D, 0x20, 0xFB, 0xE7, 0xA9, 0x0A, 0x20, 0xFB, 0xE7, 0x68, 0x60, 0x20, 0x60, 0xE7, 0x8A
+        .db 0x48, 0x4A, 0x4A, 0x4A, 0x4A, 0x20, 0x69, 0xE7, 0x68, 0x5A, 0x29, 0x0F, 0xA8, 0xB9, 0xF8, 0xEE
+        .db 0x7A, 0x4C, 0xFB, 0xE7, 0x20, 0x80, 0xE7, 0xCA, 0xE0, 0x00, 0xD0, 0xF8, 0x60, 0x20, 0x80, 0xE7
+        .db 0xA9, 0x20, 0x4C, 0xFB, 0xE7, 0xA9, 0x21, 0x2C, 0xA9, 0x3E, 0x85, 0x32, 0x20, 0x4F, 0xE7, 0xA5
+        .db 0x32, 0x20, 0xFB, 0xE7, 0xA0, 0xFF, 0x20, 0xF5, 0xE7, 0xC9, 0x20, 0xB0, 0x3D, 0xC9, 0x0D, 0xF0
+        .db 0x4A, 0xC9, 0x1B, 0xF0, 0xE7, 0xC9, 0x08, 0xF0, 0x09, 0xC9, 0x09, 0xF0, 0x1B, 0xC9, 0x02, 0xD0
+        .db 0xE5, 0x00, 0xC0, 0xFF, 0xF0, 0xE0, 0x88, 0xA9, 0x08, 0x20, 0xFB, 0xE7, 0xA9, 0x20, 0x20, 0xFB
+        .db 0xE7, 0xA9, 0x08, 0x20, 0xFB, 0xE7, 0x80, 0xCE, 0xA9, 0x20, 0xC8, 0x30, 0x1F, 0x99, 0x00, 0x03
+        .db 0x20, 0xFB, 0xE7, 0x98, 0x29, 0x07, 0xD0, 0xF0, 0x80, 0xBC, 0xC9, 0x61, 0x90, 0x02, 0xE9, 0x20
+        .db 0xC8, 0x30, 0x09, 0x99, 0x00, 0x03, 0x20, 0xFB, 0xE7, 0x80, 0xAB, 0xC8, 0xA9, 0x0D, 0x99, 0x00
+        .db 0x03, 0x20, 0xFB, 0xE7, 0x60, 0x6C, 0xEB, 0x03, 0x6C, 0xEE, 0x03, 0x6C, 0xF1, 0x03, 0xA9, 0x07
+        .db 0x4C, 0xFB, 0xE7, 0x48, 0x3A, 0xD0, 0xFD, 0x68, 0x3A, 0xD0, 0xF8, 0x60, 0x8D, 0xE2, 0x03, 0x8E
+        .db 0xE3, 0x03, 0x8C, 0xE4, 0x03, 0x68, 0x8D, 0xE6, 0x03, 0x68, 0xFA, 0x38, 0xE9, 0x02, 0x8D, 0xE1
+        .db 0x03, 0xB0, 0x01, 0xCA, 0x8E, 0xE0, 0x03, 0xBA, 0x8E, 0xE5, 0x03, 0x20, 0xFE, 0xE7, 0x20, 0x18
+        .db 0xE7, 0xA2, 0xFF, 0x9A, 0x58, 0x4C, 0x3E, 0xE8, 0x20, 0xFE, 0xE7, 0x20, 0xB3, 0xE8, 0xA2, 0xFF
+        .db 0x9A, 0x20, 0x88, 0xE7, 0xA9, 0x00, 0xA8, 0x85, 0x33, 0x85, 0x37, 0x64, 0x3C, 0x64, 0x3D, 0x20
+        .db 0x74, 0xE8, 0xA2, 0x13, 0xDD, 0x08, 0xEF, 0xF0, 0x05, 0xCA, 0x10, 0xF8, 0x80, 0xE0, 0xDA, 0x5A
+        .db 0x8A, 0x0A, 0xAA, 0x20, 0x71, 0xE8, 0x7A, 0xFA, 0xF0, 0xD4, 0xBD, 0x44, 0xEF, 0x30, 0xDC, 0x80
+        .db 0xD8, 0x7C, 0x1C, 0xEF, 0x64, 0x35, 0x80, 0x0E, 0x8A, 0xA2, 0x04, 0x06, 0x3C, 0x26, 0x3D, 0xCA
+        .db 0xD0, 0xF9, 0x04, 0x3C, 0xC6, 0x35, 0xB9, 0x00, 0x03, 0xA2, 0x0F, 0xC8, 0xDD, 0xF8, 0xEE, 0xF0
+        .db 0xE7, 0xCA, 0x10, 0xF8, 0x60, 0xA9, 0x76, 0x85, 0x3A, 0xA9, 0xF2, 0x85, 0x3B, 0x80, 0x0F, 0xC9
+        .db 0x7E, 0xF0, 0x05, 0x20, 0xFB, 0xE7, 0x80, 0x03, 0x20, 0x4F, 0xE7, 0x20, 0x65, 0xE9, 0xB2, 0x3A
+        .db 0xD0, 0xED, 0x60, 0x20, 0x4F, 0xE7, 0xA2, 0xFF, 0xA9, 0x0D, 0xE8, 0x20, 0xFB, 0xE7, 0xBD, 0x9C
+        .db 0xF8, 0xD0, 0xF7, 0x60, 0x20, 0xCD, 0xE8, 0xA2, 0xFF, 0x9A, 0x4C, 0x3E, 0xE8, 0x6C, 0x3C, 0x00
+        .db 0xA6, 0x3C, 0xA5, 0x3D, 0x86, 0x3A, 0x85, 0x3B, 0xE6, 0x33, 0x60, 0xC0, 0x01, 0xD0, 0x0C, 0xA5
+        .db 0x3A, 0x09, 0x0F, 0x85, 0x3C, 0xA5, 0x3B, 0x85, 0x3D, 0x80, 0x17, 0xA5, 0x35, 0xF0, 0x5A, 0xA6
+        .db 0x37, 0xF0, 0x0A, 0xCA, 0xF0, 0x1C, 0xA5, 0x3C, 0x92, 0x3A, 0x4C, 0x65, 0xE9, 0x20, 0xD0, 0xE8
+        .db 0x80, 0x10, 0xA5, 0x3A, 0x89, 0x0F, 0xF0, 0x0A, 0xC0, 0x00, 0xF0, 0x46, 0x89, 0x07, 0xF0, 0x11
+        .db 0x80, 0x19, 0x20, 0x4F, 0xE7, 0x20, 0xF8, 0xE7, 0xB0, 0x2D, 0xA5, 0x3B, 0xA6, 0x3A, 0x20, 0x5C
+        .db 0xE7, 0xA9, 0x20, 0x20, 0xFB, 0xE7, 0xA9, 0x2D, 0x20, 0xFB, 0xE7, 0xA9, 0x20, 0x20, 0xFB, 0xE7
+        .db 0xC0, 0x00, 0xF0, 0x1E, 0xB2, 0x3A, 0x20, 0x60, 0xE7, 0x38, 0xA5, 0x3A, 0xE5, 0x3C, 0xA5, 0x3B
+        .db 0xE5, 0x3D, 0x20, 0x65, 0xE9, 0x90, 0xBB, 0x64, 0x37, 0x60, 0x5A, 0xA0, 0x00, 0x20, 0xEB, 0xE8
+        .db 0x7A, 0x60, 0xB2, 0x3A, 0x29, 0x7F, 0xC9, 0x7F, 0xF0, 0x04, 0xC9, 0x20, 0xB0, 0x02, 0xA9, 0x2E
+        .db 0x20, 0xFB, 0xE7, 0x80, 0xD4, 0xE6, 0x3A, 0xD0, 0x02, 0xE6, 0x3B, 0x60, 0xA5, 0x33, 0xF0, 0x3E
+        .db 0x38, 0xA5, 0x3C, 0xE5, 0x3A, 0xAA, 0xA5, 0x3D, 0xE5, 0x3B, 0xA8, 0x90, 0x31, 0x18, 0x8A, 0x65
+        .db 0x3E, 0x85, 0x3C, 0x98, 0x65, 0x3F, 0x85, 0x3D, 0xB2, 0x3E, 0x92, 0x3C, 0xA9, 0xFF, 0xC6, 0x3C
+        .db 0xC5, 0x3C, 0xD0, 0x02, 0xC6, 0x3D, 0xC6, 0x3E, 0xC5, 0x3E, 0xD0, 0x02, 0xC6, 0x3F, 0x38, 0xA5
+        .db 0x3E, 0xE5, 0x3A, 0xA5, 0x3F, 0xE5, 0x3B, 0x90, 0x05, 0x20, 0xF8, 0xE7, 0x90, 0xDA, 0x60, 0xA5
+        .db 0x33, 0xD0, 0x0D, 0x60, 0xE6, 0x3A, 0xD0, 0x02, 0xE6, 0x3B, 0xE6, 0x3C, 0xD0, 0x02, 0xE6, 0x3D
+        .db 0x38, 0xA5, 0x3E, 0xE5, 0x3A, 0xA5, 0x3F, 0xE5, 0x3B, 0x90, 0xE8, 0x20, 0xF8, 0xE7, 0xB0, 0xE3
+        .db 0xB2, 0x3A, 0x92, 0x3C, 0x80, 0xDE, 0xB2, 0x3A, 0x52, 0x3C, 0x30, 0xFA, 0x80, 0xD6, 0xA5, 0x3A
+        .db 0x48, 0xA5, 0x3B, 0x48, 0xA9, 0xAF, 0x85, 0x3A, 0xA9, 0xE9, 0x85, 0x3B, 0xA0, 0x2E, 0xB1, 0x3A
+        .db 0x99, 0x80, 0x02, 0x88, 0x10, 0xF8, 0xA9, 0xEA, 0x8D, 0xA5, 0x02, 0x8D, 0xA6, 0x02, 0x8D, 0x9C
+        .db 0x02, 0x8D, 0x9D, 0x02, 0x8D, 0x9E, 0x02, 0x8D, 0x9F, 0x02, 0x8D, 0xA0, 0x02, 0x68, 0x85, 0x3B
+        .db 0x68, 0x85, 0x3A, 0x4C, 0x80, 0x02, 0xA6, 0x3C, 0xA5, 0x3D, 0x86, 0x3E, 0x85, 0x3F, 0x60, 0xA5
+        .db 0x33, 0xF0, 0x29, 0xA5, 0x3A, 0xA6, 0x3B, 0x85, 0x38, 0x86, 0x39, 0x38, 0xA5, 0x38, 0xE5, 0x3A
+        .db 0xA5, 0x39, 0xE5, 0x3B, 0x90, 0x15, 0x20, 0x64, 0xEA, 0x20, 0xF8, 0xE7, 0xB0, 0x0D, 0x38, 0xA5
+        .db 0x3C, 0xE5, 0x38, 0xA5, 0x3D, 0xE5, 0x39, 0xB0, 0xE2, 0x64, 0x33, 0x60, 0xA5, 0x35, 0xF0, 0x08
+        .db 0xA6, 0x3C, 0xA5, 0x3D, 0x86, 0x38, 0x85, 0x39, 0xA9, 0x14, 0x85, 0x33, 0x20, 0x64, 0xEA, 0xC6
+        .db 0x33, 0xD0, 0xF9, 0x60, 0x20, 0x4F, 0xE7, 0x20, 0x76, 0xEA, 0x18, 0xA5, 0x38, 0x65, 0x35, 0x85
+        .db 0x38, 0x90, 0x02, 0xE6, 0x39, 0x60, 0xB2, 0x38, 0xAA, 0xBD, 0x58, 0xEF, 0x85, 0x36, 0xBD, 0x58
+        .db 0xF0, 0x29, 0x0F, 0x85, 0x34, 0xAA, 0xBD, 0x58, 0xF1, 0x85, 0x35, 0xA5, 0x39, 0xA6, 0x38, 0x20
+        .db 0x5C, 0xE7, 0xA9, 0x2D, 0x20, 0xFB, 0xE7, 0x20, 0x7D, 0xE7, 0xA2, 0x01, 0xA0, 0x00, 0xC4, 0x35
+        .db 0xB0, 0x0B, 0xB1, 0x38, 0xE0, 0x00, 0xD0, 0x0E, 0x20, 0x60, 0xE7, 0x80, 0x07, 0xE0, 0x00, 0xD0
+        .db 0x03, 0x20, 0x7D, 0xE7, 0xA9, 0x20, 0x29, 0x7F, 0xC9, 0x7F, 0xF0, 0x04, 0xC9, 0x20, 0xB0, 0x02
+        .db 0xA9, 0x2E, 0x20, 0xFB, 0xE7, 0xC8, 0xC0, 0x03, 0x90, 0xD4, 0x20, 0x7D, 0xE7, 0xCA, 0xF0, 0xCC
+        .db 0xA5, 0x36, 0x0A, 0x65, 0x36, 0xAA, 0xA0, 0xFD, 0xBD, 0x98, 0xF1, 0x20, 0xFB, 0xE7, 0xE8, 0xC8
+        .db 0xD0, 0xF6, 0xA5, 0x36, 0xC9, 0x42, 0x30, 0x19, 0xC9, 0x46, 0x10, 0x15, 0xB2, 0x38, 0x4A, 0x4A
+        .db 0x4A, 0x4A, 0x29, 0x07, 0x09, 0x30, 0x20, 0xFB, 0xE7, 0xA9, 0x20, 0x20, 0xFB, 0xE7, 0x4C, 0x04
+        .db 0xEB, 0x20, 0x7D, 0xE7, 0xA5, 0x34, 0x0A, 0xAA, 0x7C, 0x68, 0xF1, 0xA9, 0x23, 0x20, 0xFB, 0xE7
+        .db 0xA9, 0x24, 0x20, 0xFB, 0xE7, 0xA0, 0x01, 0xB1, 0x38, 0x4C, 0x60, 0xE7, 0x20, 0x10, 0xEB, 0xA9
+        .db 0x2C, 0x20, 0xFB, 0xE7, 0xA9, 0x58, 0x4C, 0xFB, 0xE7, 0x20, 0x10, 0xEB, 0xA9, 0x2C, 0x20, 0xFB
+        .db 0xE7, 0xA9, 0x59, 0x4C, 0xFB, 0xE7, 0x20, 0x7C, 0xEB, 0x20, 0x10, 0xEB, 0xA9, 0x29, 0x4C, 0xFB
+        .db 0xE7, 0x20, 0x7C, 0xEB, 0x20, 0x10, 0xEB, 0x20, 0x1F, 0xEB, 0x80, 0xF0, 0x20, 0x36, 0xEB, 0x80
+        .db 0xDB, 0xA9, 0x24, 0x20, 0xFB, 0xE7, 0xA0, 0x02, 0x20, 0x17, 0xEB, 0x88, 0x80, 0xB9, 0x20, 0x51
+        .db 0xEB, 0x80, 0xBC, 0x20, 0x51, 0xEB, 0x80, 0xC4, 0x20, 0x7C, 0xEB, 0x20, 0x51, 0xEB, 0x80, 0xCC
+        .db 0x20, 0x7C, 0xEB, 0x20, 0x51, 0xEB, 0x20, 0x1F, 0xEB, 0x80, 0xC1, 0x60, 0xA9, 0x28, 0x4C, 0xFB
+        .db 0xE7, 0x20, 0x10, 0xEB, 0xA9, 0x2C, 0x20, 0xFB, 0xE7, 0xA9, 0x24, 0x20, 0xFB, 0xE7, 0xA0, 0x02
+        .db 0xB1, 0x38, 0x85, 0x37, 0x18, 0xA5, 0x38, 0x69, 0x03, 0x4C, 0xAC, 0xEB, 0xA9, 0x24, 0x20, 0xFB
+        .db 0xE7, 0xA0, 0x01, 0xB1, 0x38, 0x85, 0x37, 0x18, 0xA5, 0x38, 0x69, 0x02, 0xAA, 0xA5, 0x39, 0x69
+        .db 0x00, 0xA8, 0x18, 0x8A, 0x65, 0x37, 0xAA, 0x98, 0xA4, 0x37, 0x10, 0x01, 0x3A, 0x69, 0x00, 0x4C
+        .db 0x5C, 0xE7, 0xBA, 0xE8, 0xE8, 0xE8, 0xE8, 0x9E, 0x00, 0x01, 0x20, 0xB3, 0xE8, 0x4C, 0xF0, 0xEB
+        .db 0xA9, 0xDE, 0x85, 0x3A, 0xA9, 0xF6, 0x85, 0x3B, 0x80, 0x0F, 0xC9, 0x7E, 0xF0, 0x05, 0x20, 0xFB
+        .db 0xE7, 0x80, 0x03, 0x20, 0x4F, 0xE7, 0x20, 0x65, 0xE9, 0xB2, 0x3A, 0xD0, 0xED, 0x20, 0xBE, 0xEE
+        .db 0xA2, 0xFF, 0x9A, 0x64, 0x35, 0x20, 0x85, 0xE7, 0xA0, 0x00, 0xAD, 0x00, 0x03, 0xC9, 0x0D, 0xD0
+        .db 0x03, 0x4C, 0x3E, 0xE8, 0xC9, 0x3F, 0xF0, 0xC8, 0xC9, 0x20, 0xF0, 0x3B, 0xC9, 0x3B, 0xF0, 0xE0
+        .db 0xC9, 0x4C, 0xF0, 0x2C, 0xC9, 0x24, 0xD0, 0x01, 0xC8, 0x64, 0x3C, 0x64, 0x3D, 0x20, 0x74, 0xE8
+        .db 0xA6, 0x35, 0xF0, 0x08, 0xC9, 0x4C, 0xF0, 0x1A, 0xC9, 0x20, 0xF0, 0x1B, 0x98, 0xAA, 0xA9, 0x0A
+        .db 0x20, 0xFB, 0xE7, 0x20, 0x78, 0xE7, 0xA9, 0x5E, 0x20, 0xFB, 0xE7, 0x20, 0xFE, 0xE7, 0x80, 0xB0
+        .db 0x64, 0x35, 0x20, 0x4C, 0xEA, 0x80, 0xA9, 0xA5, 0x35, 0xF0, 0x0A, 0xA6, 0x3C, 0xA5, 0x3D, 0x86
+        .db 0x3A, 0x85, 0x3B, 0x88, 0xC8, 0xB9, 0x00, 0x03, 0xC9, 0x20, 0xF0, 0xF8, 0xC9, 0x0D, 0xF0, 0xE5
+        .db 0xC9, 0x3B, 0xF0, 0xE1, 0xA2, 0x00, 0x86, 0x36, 0x84, 0x33, 0xA4, 0x33, 0xA5, 0x36, 0x0A, 0x65
+        .db 0x36, 0xAA, 0xB9, 0x00, 0x03, 0xC8, 0xDD, 0x98, 0xF1, 0xD0, 0x14, 0xB9, 0x00, 0x03, 0xE8, 0xC8
+        .db 0xDD, 0x98, 0xF1, 0xD0, 0x0A, 0xB9, 0x00, 0x03, 0xE8, 0xC8, 0xDD, 0x98, 0xF1, 0xF0, 0x0C, 0xA6
+        .db 0x36, 0xE8, 0x86, 0x36, 0xE0, 0x4A, 0xD0, 0xD2, 0x4C, 0x2C, 0xEC, 0xA9, 0x00, 0x85, 0x34, 0xC6
+        .db 0x34, 0x85, 0x3C, 0x85, 0x3D, 0x85, 0x35, 0xA6, 0x36, 0xE0, 0x42, 0x30, 0x18, 0xE0, 0x46, 0x10
+        .db 0x14, 0xB9, 0x00, 0x03, 0xC8, 0xC9, 0x38, 0x10, 0xDF, 0xC9, 0x30, 0x30, 0xDB, 0x0A, 0x0A, 0x0A
+        .db 0x0A, 0x85, 0x39, 0xA9, 0x80, 0xBE, 0x00, 0x03, 0xC8, 0xE0, 0x20, 0xD0, 0x24, 0xC9, 0x80, 0x30
+        .db 0xF4, 0xA6, 0x36, 0xE0, 0x44, 0x10, 0xEE, 0xA6, 0x35, 0xF0, 0xEA, 0xC9, 0xD0, 0x10, 0xE6, 0xC9
+        .db 0xC0, 0x10, 0xB5, 0xA6, 0x3D, 0xD0, 0xB1, 0xA6, 0x3C, 0x86, 0x38, 0x09, 0x40, 0x29, 0xF7, 0x80
+        .db 0xD4, 0xE0, 0x0D, 0xD0, 0x03, 0x4C, 0xAF, 0xED, 0xE0, 0x3B, 0xF0, 0xF9, 0x48, 0xA5, 0x36, 0xC9
+        .db 0x46, 0x30, 0x44, 0xD0, 0x19, 0xE0, 0x24, 0xF0, 0x01, 0x88, 0x20, 0x74, 0xE8, 0xFA, 0xA6, 0x35
+        .db 0xF0, 0x86, 0xA0, 0x00, 0xA9, 0x01, 0x48, 0xA5, 0x3C, 0x91, 0x3A, 0x4C, 0x4A, 0xEE, 0xC9, 0x47
+        .db 0xD0, 0x1E, 0xE0, 0x24, 0xF0, 0x01, 0x88, 0x20, 0x74, 0xE8, 0xFA, 0xA6, 0x35, 0xF0, 0x7D, 0xA0
+        .db 0x00, 0xA9, 0x02, 0x48, 0xA5, 0x3C, 0x91, 0x3A, 0xA5, 0x3D, 0xC8, 0x91, 0x3A, 0x4C, 0x4A, 0xEE
+        .db 0xC9, 0x48, 0xD0, 0x68, 0x4C, 0x90, 0xEE, 0x68, 0xE0, 0x23, 0xD0, 0x05, 0x09, 0x20, 0x4C, 0xC5
+        .db 0xEC, 0xE0, 0x28, 0xD0, 0x0B, 0x09, 0x04, 0xA6, 0x34, 0x10, 0x51, 0xE6, 0x34, 0x4C, 0xC5, 0xEC
+        .db 0xE0, 0x29, 0xD0, 0x09, 0xA6, 0x34, 0xD0, 0x44, 0xE6, 0x34, 0x4C, 0xC5, 0xEC, 0xE0, 0x2C, 0xD0
+        .db 0x1E, 0xBE, 0x00, 0x03, 0xE0, 0x58, 0xD0, 0x06, 0x09, 0x02, 0xC8, 0x4C, 0xC5, 0xEC, 0xE0, 0x59
+        .db 0xF0, 0x07, 0xC9, 0x80, 0x30, 0x26, 0x4C, 0xD1, 0xEC, 0x09, 0x01, 0xC8, 0x4C, 0xC5, 0xEC, 0xE0
+        .db 0x24, 0xF0, 0x01, 0x88, 0x48, 0x20, 0x74, 0xE8, 0x88, 0x68, 0xA6, 0x35, 0xF0, 0x0E, 0xA6, 0x3D
+        .db 0xD0, 0x05, 0x09, 0x08, 0x4C, 0xC5, 0xEC, 0x09, 0x10, 0x4C, 0xC5, 0xEC, 0x4C, 0x2C, 0xEC, 0xA2
+        .db 0x0F, 0xDD, 0x88, 0xF1, 0xF0, 0x05, 0xCA, 0x10, 0xF8, 0x80, 0xF1, 0x86, 0x37, 0xC9, 0x80, 0x30
+        .db 0x05, 0x8A, 0x05, 0x39, 0x85, 0x37, 0xA2, 0x00, 0xBD, 0x58, 0xEF, 0xC5, 0x36, 0xD0, 0x07, 0xBD
+        .db 0x58, 0xF0, 0xC5, 0x37, 0xF0, 0x2D, 0xE8, 0xD0, 0xEF, 0xA5, 0x37, 0xC9, 0x02, 0xD0, 0x06, 0xA9
+        .db 0x01, 0x85, 0x37, 0x80, 0xE1, 0xC9, 0x01, 0xD0, 0x06, 0xA9, 0x0A, 0x85, 0x37, 0x80, 0xD7, 0xC9
+        .db 0x0D, 0xD0, 0x06, 0xA9, 0x0B, 0x85, 0x37, 0x80, 0xCD, 0xC9, 0x07, 0xD0, 0xAF, 0xA9, 0x09, 0x85
+        .db 0x37, 0x80, 0xC3, 0xA5, 0x37, 0x29, 0x0F, 0x85, 0x37, 0xC9, 0x0E, 0xD0, 0x0B, 0x20, 0x57, 0xEE
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+        .db 0xFD, 0xED, 0xDD, 0xCD, 0xBD, 0xAD, 0x9D, 0x8D, 0x7C, 0x6C, 0x5C, 0x4C, 0x3C, 0x2C, 0x1C, 0x0C
+        .db 0xEF, 0xFF, 0xCF, 0xDF, 0xAF, 0xBF, 0x8F, 0x9F, 0x6E, 0x7E, 0x4E, 0x5E, 0x2E, 0x3E, 0x0E, 0x1E
+        .db 0x20, 0xFC, 0xFC, 0xA9, 0x01, 0x85, 0x3C, 0x85, 0x3F, 0xA9, 0x43, 0x20, 0xFB, 0xE7, 0xA9, 0xFF
+        .db 0x85, 0x3E, 0xA9, 0x00, 0x85, 0x38, 0x85, 0x39, 0x20, 0xE9, 0xFC, 0xB0, 0x11, 0x90, 0xEA, 0xA9
+        .db 0xFF, 0x85, 0x3E, 0xA9, 0x00, 0x85, 0x38, 0x85, 0x39, 0x20, 0xE9, 0xFC, 0x90, 0xF1, 0xC9, 0x1B
+        .db 0xD0, 0x01, 0x00, 0xC9, 0x01, 0xF0, 0x0E, 0xC9, 0x3A, 0xD0, 0x03, 0x4C, 0x5A, 0xFD, 0xC9, 0x04
+        .db 0xD0, 0x59, 0x4C, 0xDC, 0xFC, 0xA2, 0x00, 0xA9, 0xFF, 0x85, 0x3E, 0x20, 0xE9, 0xFC, 0x90, 0x4B
+        .db 0x9D, 0x00, 0x03, 0xE8, 0xE0, 0x84, 0xD0, 0xEF, 0xA2, 0x00, 0xBD, 0x00, 0x03, 0xC5, 0x3C, 0xF0
+        .db 0x0B, 0xA9, 0xFE, 0xA2, 0x45, 0x20, 0x30, 0xFE, 0x20, 0x40, 0xFD, 0x00, 0x49, 0xFF, 0xE8, 0xDD
+        .db 0x00, 0x03, 0xF0, 0x0B, 0xA9, 0xFE, 0xA2, 0x45, 0x20, 0x30, 0xFE, 0x20, 0x40, 0xFD, 0x00, 0xA0
+        .db 0x02, 0xB9, 0x00, 0x03, 0x20, 0x4A, 0xFD, 0xC8, 0xC0, 0x82, 0xD0, 0xF5, 0xB9, 0x00, 0x03, 0xC5
+        .db 0x39, 0xD0, 0x08, 0xC8, 0xB9, 0x00, 0x03, 0xC5, 0x38, 0xF0, 0x0B, 0x20, 0x40, 0xFD, 0xA9, 0x15
+        .db 0x20, 0xFB, 0xE7, 0x4C, 0x1F, 0xFC, 0xA2, 0x02, 0xA5, 0x3C, 0xC9, 0x01, 0xD0, 0x12, 0xA5, 0x3F
+        .db 0xF0, 0x0E, 0xBD, 0x00, 0x03, 0x85, 0x3A, 0xE8, 0xBD, 0x00, 0x03, 0x85, 0x3B, 0xE8, 0xC6, 0x3F
+        .db 0xA0, 0x00, 0xBD, 0x00, 0x03, 0x91, 0x3A, 0xE6, 0x3A, 0xD0, 0x02, 0xE6, 0x3B, 0xE8, 0xE0, 0x82
+        .db 0xD0, 0xF0, 0xE6, 0x3C, 0xA9, 0x06, 0x20, 0xFB, 0xE7, 0x4C, 0x1F, 0xFC, 0xA9, 0x06, 0x20, 0xFB
+        .db 0xE7, 0xA9, 0xFE, 0xA2, 0x75, 0x20, 0x30, 0xFE, 0x60, 0xA9, 0x00, 0x85, 0x3D, 0x20, 0xF8, 0xE7
+        .db 0xB0, 0x09, 0xC6, 0x3D, 0xD0, 0xF7, 0xC6, 0x3E, 0xD0, 0xF3, 0x18, 0x60, 0xA2, 0x00, 0xBD, 0x0B
+        .db 0xFD, 0xF0, 0x07, 0x20, 0xFB, 0xE7, 0xE8, 0x4C, 0xFE, 0xFC, 0x60, 0x42, 0x65, 0x67, 0x69, 0x6E
+        .db 0x20, 0x58, 0x4D, 0x4F, 0x44, 0x45, 0x4D, 0x2F, 0x43, 0x52, 0x43, 0x20, 0x74, 0x72, 0x61, 0x6E
+        .db 0x73, 0x66, 0x65, 0x72, 0x2E, 0x0D, 0x0A, 0x50, 0x72, 0x65, 0x73, 0x73, 0x20, 0x3C, 0x45, 0x73
+        .db 0x63, 0x3E, 0x20, 0x74, 0x6F, 0x20, 0x61, 0x62, 0x6F, 0x72, 0x74, 0x2E, 0x2E, 0x2E, 0x20, 0x00
+        .db 0xA9, 0x70, 0x85, 0x3E, 0x20, 0xE9, 0xFC, 0xB0, 0xF7, 0x60, 0x45, 0x39, 0xAA, 0xA5, 0x38, 0x5D
+        .db 0x00, 0xFB, 0x85, 0x39, 0xBD, 0x00, 0xFA, 0x85, 0x38, 0x60, 0xA9, 0x0D, 0x20, 0xFB, 0xE7, 0xA9
+        .db 0x0A, 0x20, 0xFB, 0xE7, 0xA9, 0x00, 0x85, 0x3E, 0xF0, 0x07, 0x20, 0x0A, 0xFE, 0xC9, 0x3A, 0xD0
+        .db 0xF9, 0x20, 0x13, 0xFE, 0x85, 0x39, 0x85, 0x38, 0x20, 0x13, 0xFE, 0x85, 0x3C, 0x18, 0x65, 0x38
+        .db 0x85, 0x38, 0x20, 0x13, 0xFE, 0x85, 0x3B, 0x18, 0x65, 0x38, 0x85, 0x38, 0x20, 0x13, 0xFE, 0x85
+        .db 0x3D, 0x18, 0x65, 0x38, 0x85, 0x38, 0xA5, 0x3D, 0xD0, 0x2C, 0xA6, 0x39, 0xA0, 0x00, 0x20, 0x13
+        .db 0xFE, 0x91, 0x3B, 0x18, 0x65, 0x38, 0x85, 0x38, 0xC8, 0xCA, 0xD0, 0xF2, 0x20, 0x13, 0xFE, 0x18
+        .db 0x65, 0x38, 0xD0, 0x08, 0xA9, 0x23, 0x8D, 0xC6, 0x3F, 0x4C, 0x6A, 0xFD, 0xA9, 0x46, 0x85, 0x3E
+        .db 0x8D, 0xC6, 0x3F, 0x4C, 0x6A, 0xFD, 0xC9, 0x01, 0xF0, 0x1B, 0xA9, 0xFE, 0xA2, 0x97, 0x20, 0x30
+        .db 0xFE, 0xA5, 0x3D, 0x85, 0x3E, 0x20, 0x60, 0xE7, 0xA9, 0x0D, 0x20, 0xFB, 0xE7, 0xA9, 0x0A, 0x20
+        .db 0xFB, 0xE7, 0x4C, 0x6A, 0xFD, 0x20, 0x13, 0xFE, 0x18, 0x65, 0x38, 0xF0, 0x07, 0xA9, 0xFE, 0xA2
+        .db 0xB1, 0x4C, 0x30, 0xFE, 0xA5, 0x3E, 0xF0, 0x07, 0xA9, 0xFE, 0xA2, 0xCA, 0x4C, 0x30, 0xFE, 0xA9
+        .db 0xFE, 0xA2, 0xE7, 0x20, 0x30, 0xFE, 0x20, 0x40, 0xFD, 0x60, 0x20, 0xF8, 0xE7, 0xC9, 0x1B, 0xD0
+        .db 0x01, 0x00, 0x60, 0xA9, 0x00, 0x85, 0x3F, 0x20, 0x20, 0xFE, 0x0A, 0x0A, 0x0A, 0x0A, 0x85, 0x3F
+        .db 0x20, 0x0A, 0xFE, 0xC9, 0x3A, 0x90, 0x02, 0xE9, 0x08, 0xE9, 0x2F, 0x29, 0x0F, 0x05, 0x3F, 0x60
+        .db 0x85, 0x41, 0x86, 0x40, 0x98, 0x48, 0xA0, 0x00, 0xB1, 0x40, 0xF0, 0x06, 0x20, 0xFB, 0xE7, 0xC8
+        .db 0xD0, 0xF6, 0x68, 0xA8, 0x60, 0x0D, 0x0A, 0x0D, 0x0A, 0x55, 0x6E, 0x65, 0x78, 0x70, 0x65, 0x63
+        .db 0x74, 0x65, 0x64, 0x20, 0x62, 0x6C, 0x6F, 0x63, 0x6B, 0x20, 0x6E, 0x75, 0x6D, 0x62, 0x65, 0x72
+        .db 0x20, 0x72, 0x65, 0x63, 0x65, 0x69, 0x76, 0x65, 0x64, 0x20, 0x41, 0x62, 0x6F, 0x72, 0x74, 0x69
+        .db 0x6E, 0x67, 0x0D, 0x0A, 0x00, 0x0D, 0x0A, 0x58, 0x4D, 0x4F, 0x44, 0x45, 0x4D, 0x2D, 0x43, 0x52
+        .db 0x43, 0x20, 0x64, 0x6F, 0x77, 0x6E, 0x6C, 0x6F, 0x61, 0x64, 0x20, 0x69, 0x73, 0x20, 0x63, 0x6F
+        .db 0x6D, 0x70, 0x6C, 0x65, 0x74, 0x65, 0x00, 0x0D, 0x0A, 0x0D, 0x0A, 0x55, 0x6E, 0x6B, 0x6E, 0x6F
+        .db 0x77, 0x6E, 0x20, 0x72, 0x65, 0x63, 0x6F, 0x72, 0x64, 0x20, 0x74, 0x79, 0x70, 0x65, 0x20, 0x24
+        .db 0x00, 0x0D, 0x0A, 0x0D, 0x0A, 0x42, 0x61, 0x64, 0x20, 0x72, 0x65, 0x63, 0x6F, 0x72, 0x64, 0x20
+        .db 0x63, 0x68, 0x65, 0x63, 0x6B, 0x73, 0x75, 0x6D, 0x21, 0x00, 0x0D, 0x0A, 0x0D, 0x0A, 0x55, 0x70
+        .db 0x6C, 0x6F, 0x61, 0x64, 0x20, 0x46, 0x61, 0x69, 0x6C, 0x65, 0x64, 0x0D, 0x0A, 0x41, 0x62, 0x6F
+        .db 0x72, 0x74, 0x69, 0x6E, 0x67, 0x21, 0x00, 0x0D, 0x0A, 0x0D, 0x0A, 0x55, 0x70, 0x6C, 0x6F, 0x61
+        .db 0x64, 0x20, 0x53, 0x75, 0x63, 0x63, 0x65, 0x73, 0x73, 0x66, 0x75, 0x6C, 0x21, 0x00, 0x00, 0x00
+        .db 0x78, 0xD8, 0xA2, 0xFF, 0x9A, 0xA2, 0xC7, 0xA9, 0xE6, 0x8D, 0xF8, 0x03, 0x8E, 0xF7, 0x03, 0xA2
+        .db 0x65, 0xA9, 0xFF, 0x8D, 0xFE, 0x03, 0x8E, 0xFD, 0x03, 0xA2, 0x65, 0xA9, 0xFF, 0x8D, 0xFB, 0x03
+        .db 0x8E, 0xFA, 0x03, 0xA2, 0x0C, 0xA9, 0xE8, 0x8D, 0xF5, 0x03, 0x8E, 0xF4, 0x03, 0xA9, 0xE7, 0x8D
+        .db 0x05, 0x04, 0xA9, 0xA4, 0x8D, 0x06, 0x04, 0xA9, 0xF4, 0x8D, 0x07, 0x04, 0xA9, 0xA4, 0x8D, 0x08
+        .db 0x04, 0xA9, 0x59, 0x8D, 0x0B, 0x04, 0xA9, 0xE6, 0x8D, 0x0C, 0x04, 0xA9, 0x82, 0x8D, 0x09, 0x04
+        .db 0xA9, 0xE6, 0x8D, 0x0A, 0x04, 0x20, 0x83, 0xA4, 0xA9, 0x00, 0xA8, 0xAA, 0x18, 0xD8, 0x58, 0x6C
+        .db 0xF7, 0x03, 0x6C, 0xFD, 0x03, 0x40, 0xDA, 0x48, 0xBA, 0xBD, 0x03, 0x01, 0x29, 0x10, 0xD0, 0x05
+        .db 0x68, 0xFA, 0x6C, 0xFA, 0x03, 0x68, 0xFA, 0x6C, 0xF4, 0x03, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+        .db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x62, 0xFF, 0x00, 0xFF, 0x66, 0xFF
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/SbcOS.asm b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/SbcOS.asm
new file mode 100644
index 00000000..514df8f7
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/SbcOS.asm
@@ -0,0 +1,1897 @@
+;---------------------------------------------------------------------
+;  SBC Firmware V5.2, 6-30-13, by Daryl Rictor
+;
+; ----------------- assembly instructions ---------------------------- 
+;               *=   $E800                ; start of operating system
+Start_OS       jmp   MonitorBoot         ; easy access to monitor program
+Jmp_CR	   jmp   Print_CR		
+Jmp_1sp	   jmp   Print1SP			; jump table for usable monitor
+Jmp_2sp	   jmp   Print2SP			; routines
+Jmp_xsp	   jmp   PrintXSP			; This will not change in future
+Jmp_nib	   jmp   PrintDig			; releases, only be added to
+Jmp_byte	   jmp   Print1Byte
+jmp_wrd	   jmp   Print2Byte
+jmp_bell	   jmp   Bell
+jmp_delay	   jmp   Delay
+jmp_scan	   jmp   Scan_input
+jmp_inp        jmp   Input_chr  
+jmp_out        jmp   Output
+jmp_input	   jmp   Input
+jmp_input1     jmp   Input1
+;
+;
+;*********************************************************************       
+;  local Zero-page variables
+;
+Prompt         =     $32               ; 1 byte   
+linecnt        =     $33               ; 1 byte
+Modejmp        =     $34               ; 1 byte
+Hexdigcnt      =     $35               ; 1 byte
+OPCtxtptr      =     $36               ; 1 byte
+Memchr         =     $37               ; 1 byte
+Startaddr      =     $38               ; 2 bytes
+Startaddr_H    =     $39
+Addrptr        =     $3a               ; 2 bytes
+Addrptr_H       =    $3b
+Hexdigits      =     $3c               ; 2 bytes
+Hexdigits_H    =     $3d
+Memptr         =     $3e               ; 2 bytes
+Memptr_H       =     $3f
+;
+; Local Non-Zero Page Variables
+;
+buffer         =     $0300             ; keybd input buffer (127 chrs max)
+PCH            =     $03e0             ; hold program counter (need PCH next to PCL for Printreg routine)
+PCL            =     $03e1             ;  ""
+ACC            =     $03e2             ; hold Accumulator (A)
+XREG           =     $03e3             ; hold X register
+YREG           =     $03e4             ; hold Y register
+SPTR           =     $03e5             ; hold stack pointer
+PREG           =     $03e6             ; hold status register (P)
+ChrInVect      =     $03eb             ; holds Character Input Address
+ScanInVect     =     $03ee             ; holds Character Scan Input address
+ChrOutVect     =     $03f1             ; holds Character Output Address
+BRKvector      =     $03f4             ; holds application break vector
+RESvector      =     $03f7             ; 2F7,8,9 holds application reset vector & checksum
+INTvector      =     $03fa             ; 2FA,B,C holds application interrupt vector & checksum
+NMIvector      =     $03fd             ; 2FD,E,F holds application NMI vector & checksum
+
+;               
+; *************************************************************************
+; kernal commands
+; *************************************************************************
+; PrintRegCR   - subroutine prints a CR, the register contents, CR, then returns
+; PrintReg     - same as PrintRegCR without leading CR
+; Print2Byte   - prints AAXX hex digits
+; Print1Byte   - prints AA hex digits
+; PrintDig     - prints A hex nibble (low 4 bits)
+; Print_CR     - prints a CR (ASCII 13)and LF (ASCII 10)
+; PrintXSP     - prints # of spaces in X Reg
+; Print2SP     - prints 2 spaces
+; Print1SP     - prints 1 space
+; Input_assem  - Alternate input prompt for Assember
+; Input        - print <CR> and prompt then get a line of input, store at buffer
+; Input_Chr    - get one byte from input port, waits for input
+; Scan_Input   - Checks for an input character (no waiting)
+; Output       - send one byte to the output port
+; Bell         - send ctrl-g (bell) to output port
+; Delay        - delay loop
+; *************************************************************************
+;
+RegData        .byte" PC=  A=  X=  Y=  S=  P= (NVRBDIZC)="
+;
+PrintReg       Jsr   Print_CR          ; Lead with a CR
+               ldx   #$ff              ;
+               ldy   #$ff              ;
+Printreg1      iny                     ;
+               lda   Regdata,y         ;
+               jsr   Output            ;
+               cmp   #$3D              ; "="
+               bne   Printreg1         ;
+Printreg2      inx                     ;
+               cpx   #$07              ;
+               beq   Printreg3         ; done with first 6
+               lda   PCH,x             ;  
+               jsr   Print1Byte        ;
+               cpx   #$00              ;
+               bne   Printreg1         ;
+               bra   Printreg2         ;
+Printreg3      dex                     ;
+               lda   PCH,x             ; get Preg
+               ldx   #$08              ; 
+Printreg4      rol                     ;
+               tay                     ;
+               lda   #$31              ;
+               bcs   Printreg5         ;
+               dec                     ;
+Printreg5      jsr   Output            ;
+               tya                     ;
+               dex                     ;
+               bne   Printreg4         ;
+; fall into the print CR routine
+Print_CR       PHA                     ; Save Acc
+               LDA   #$0D              ; "cr"
+               JSR   OUTPUT            ; send it
+               LDA   #$0A              ; "lf"
+               JSR   OUTPUT            ; send it
+               PLA                     ; Restore Acc
+               RTS                     ; 
+
+Print2Byte     JSR   Print1Byte        ;  prints AAXX hex digits
+               TXA                     ;
+Print1Byte     PHA                     ;  prints AA hex digits
+               LSR                     ;  MOVE UPPER NIBBLE TO LOWER
+               LSR                     ;
+               LSR                     ;
+               LSR                     ;
+               JSR   PrintDig          ;
+               PLA                     ;
+PrintDig       PHY                     ;  prints A hex nibble (low 4 bits)
+               AND   #$0F              ;
+               TAY                     ;
+               LDA   Hexdigdata,Y      ;
+               PLY                     ;
+               jmp   output            ;
+PrintXSP1      JSR   Print1SP          ;
+               dex                     ;
+PrintXSP       cpx   #$00              ;
+               bne   PrintXSP1         ;
+               rts                     ;
+Print2SP       jsr   Print1SP          ; print 2 SPACES
+Print1SP       LDA   #$20              ; print 1 SPACE
+               JMP   OUTPUT            ;
+;
+Input_Assem    lda   #$21              ; Assembler Prompt "!"
+               .byte $2c               ; mask out next line to bypass 
+Input          lda   #$3E              ; Monitor Prompt ">"
+               sta   Prompt            ; save prompt chr 
+Input1         jsr   Print_CR          ; New Line
+               lda   Prompt            ; get prompt
+               jsr   Output            ; Print Prompt
+               ldy   #$ff              ; pointer
+InputWait      jsr   Input_Chr         ; get a character
+               cmp   #$20              ; is ctrl char?
+               BCS   InputSave         ; no, echo chr 
+               cmp   #$0d              ; cr
+               Beq   InputDone         ; done
+               cmp   #$1B              ; esc
+               beq   Input1            ; cancel and new line
+               cmp   #$08              ; bs
+               beq   backspace         ;
+		   cmp   #$09		   ; TAB key
+		   beq   tabkey		   ;
+               cmp   #$02              ; Ctrl-B
+               bne   InputWait         ; Ignore other codes
+               brk                     ; Force a keyboard Break cmd
+backspace      cpy   #$ff              ;
+               beq   InputWait         ; nothing to do
+               dey                     ; remove last char
+               Lda   #$08              ; backup one space
+               jsr   Output            ;
+               Lda   #$20              ; Print space (destructive BS)
+               jsr   Output            ;
+               Lda   #$08              ; backup one space
+               jsr   Output            ;
+               BRA   InputWait         ; ready for next key
+tabkey	   lda   #$20		   ; convert tab to space
+		   iny			   ; move cursor
+               bmi   InputTooLong	   ; line too long?
+               sta   Buffer,y		   ; no, save space in buffer
+		   jsr   output		   ; print the space too
+               tya   			   ; test to see if tab is on multiple of 8
+		   and   #$07		   ; mask remainder of cursor/8
+               bne   tabkey		   ; not done, add another space
+		   bra   InputWait	   ; done. 
+InputSave      CMP   #$61              ;   ucase
+               BCC   InputSave1        ;
+               SBC   #$20              ;
+InputSave1     INY                     ;
+               BMI   InputTooLong      ; get next char (up to 127)
+               STA   Buffer,y          ;
+               JSR   Output            ; OutputCharacter
+               BRA   InputWait         ;
+InputDone      INY                     ;
+InputTooLong   LDA   #$0d              ; force CR at end of 128 characters 
+               sta   Buffer,y          ;
+               JSR   Output            ;
+;               lda   #$0a              ; lf Char   
+;               JSR   Output            ;
+               RTS                     ;
+;
+Input_chr      jmp   (ChrInVect)       ;
+Scan_input     jmp   (ScanInVect)      ; 
+Output         jmp   (ChrOutVect)      ;
+;
+bell           LDA  #$07               ; Ctrl G Bell
+               jmp  Output             ; 
+;
+Delay          PHA                     ; use A to execute a delay loop
+delay1         DEC                     ;
+               BNE   delay1            ;
+               PLA                     ;
+               DEC                     ;
+               BNE   Delay             ;
+GRTS           RTS                     ;
+;
+;
+BRKroutine     sta   ACC               ; save A    Monitor"s break handler
+               stx   Xreg              ; save X
+               sty   Yreg              ; save Y
+               pla                     ; 
+               sta   Preg              ; save P
+               pla                     ; PCL
+               plx                     ; PCH
+               sec                     ;
+               sbc   #$02              ;
+               sta   PCL               ; backup to BRK cmd
+               bcs   Brk2              ;
+               dex                     ;
+Brk2           stx   PCH               ; save PC
+               TSX                     ; get stack pointer
+               stx   SPtr              ; save stack pointer
+               jsr   Bell              ; Beep speaker
+               jsr   PrintReg          ; dump register contents 
+               ldx   #$FF              ; 
+               txs                     ; clear stack
+               cli                     ; enable interrupts again
+               jmp   Monitor           ; start the monitor
+
+;*************************************************************************
+;     
+;  Monitor Program 
+;
+;**************************************************************************
+MonitorBoot    
+               jsr   bell              ; beep ready
+               JSR   Version           ;
+SYSjmp                                 ; Added for EhBASIC
+Monitor        LDX   #$FF              ; 
+               TXS			   ;  Init the stack
+               JSR   input             ;  line input
+               LDA   #$00              ;
+               TAY                     ;  set to 1st character in line
+               sta   LineCnt           ; normal list vs range list 
+Mon01          STA   Memchr            ;
+Mon02          STZ   Hexdigits         ;  holds parsed hex
+               STZ   Hexdigits+1       ;
+               JSR   ParseHexDig       ;  Get any Hex chars
+               LDX   #CmdCount         ;  get # of cmds currently used
+Mon08          CMP   CmdAscii,X        ;  is non hex cmd chr?
+               BEQ   Mon09             ;  yes x= cmd number
+               DEX                     ;
+               BPL   Mon08             ;
+               BRA   Monitor           ;  no
+Mon09          PHX                     ;  save command
+               PHY                     ;  Save input line pointer
+               TXA                     ;
+               ASL                     ;  ptr * 2
+               TAX                     ;  
+               JSR   Mon10             ;  Execute cmd
+               PLY                     ;
+               PLX                     ;
+               BEQ   Monitor           ;  done
+               LDA   Cmdseccode,X      ;  
+               BMI   Mon02             ;
+               BRA   Mon01             ;
+Mon10          JMP   (Cmdjmptbl,X)     ;
+;--------------- Routines used by the Monitor commands ----------------------
+ParseHexDig    STZ   Hexdigcnt         ;  cntr
+               BRA   ParseHex05        ;
+ParseHex03     TXA                     ;  parse hex dig
+               LDX   #$04              ;  
+ParseHex04     ASL   Hexdigits         ;
+               ROL   Hexdigits+1       ;
+               DEX                     ;
+               BNE   ParseHex04        ;
+               TSB   Hexdigits         ;
+               DEC   Hexdigcnt         ;
+ParseHex05     LDA   buffer,Y          ;
+               LDX   #$0F              ;   is hex chr?
+               INY                     ;
+ParseHex07     CMP   Hexdigdata,X      ;
+               BEQ   ParseHex03        ;   yes
+               DEX                     ;
+               BPL   ParseHex07        ;
+               RTS                     ; Stored in HexDigits if HexDigCnt <> 0
+;
+Help_cmd       lda   #<Helptxt         ;  lower byte - Menu of Commands
+               sta   addrptr           ;
+               lda   #>Helptxt         ;  upper byte
+               sta   addrptr+1         ;
+               bra   Help_cmd3         ;
+Help_Cmd4      cmp   #$7e              ;  "~"
+               beq   Help_Cmd1         ;
+               jsr   Output            ;
+               bra   Help_cmd2         ;
+Help_cmd1      jsr   Print_CR          ;     
+Help_cmd2      jsr   Inc_addrptr       ;
+Help_cmd3      lda   (addrptr)         ;
+               bne   Help_cmd4         ;
+               rts                     ;
+Version        jsr   Print_CR          ; 
+               ldx   #$FF              ; set txt pointer
+               lda   #$0d              ; 
+PortReadyMsg   inx                     ;
+               JSR   Output            ; put character to Port
+               lda   porttxt,x         ; get message text
+               bne   PortReadyMsg      ; 
+               rts                     ;
+;
+Excute_cmd     jsr   exe1              ;
+               ldx   #$FF              ; reset stack
+               txs                     ;
+               jmp   Monitor           ;
+exe1           JMP   (Hexdigits)       ;
+;
+DOT_cmd        LDX   Hexdigits         ; move address to addrptr
+               LDA   Hexdigits+1       ;
+               STX   Addrptr           ;
+               STA   Addrptr+1         ;
+               inc   LineCnt           ; range list command
+               RTS                     ;
+;
+CR_cmd         CPY   #$01              ;
+               BNE   SP_cmd            ;
+               LDA   Addrptr           ; CR alone - move addrptr to hexdigits
+               ORA   #$0F              ;  to simulate entering an address
+               STA   Hexdigits         ; *** change 07 to 0f for 16 byte/line
+               LDA   Addrptr+1         ;
+               STA   Hexdigits+1       ;
+               BRA   SP_cmd2           ;
+SP_cmd         LDA   Hexdigcnt         ; Space command entry
+               BEQ   SP_cmd5           ; any digits to process? no - done
+               LDX   Memchr            ; yes - is sec cmd code 0 ? yes - 
+               BEQ   SP_cmd1           ; yes - 
+               DEX                     ; Is sec cmd = 1?       
+               BEQ   SP_cmd3           ;       yes - is sec cmd code 1 ?
+               LDA   Hexdigits         ;             no - ":" cmd processed
+               STA   (Addrptr)         ;
+               JMP   Inc_addrptr       ; set to next address and return
+SP_cmd1        JSR   DOT_cmd           ; sec dig = 0  move address to addrptr
+               BRA   SP_cmd3           ;
+SP_cmd2        LDA   Addrptr           ; CR cmd entry 
+               BIT   #$0F              ; *** changed 07 to 0F for 16 bytes/line
+               BEQ   SP_cmd3           ; if 16, print new line
+               cpy   #$00              ; if TXT cmd, don"t print the - or spaces between chrs
+               beq   TXT_cmd1          ;
+               BIT   #$07              ; if 8, print -
+               BEQ   SP_cmd33          ;
+               BRA   SP_cmd4           ; else print next byte
+SP_cmd3        JSR   Print_CR          ; "." cmd - display address and data 
+               jsr   Scan_Input        ; see if brk requested
+               bcs   SP_brk            ; if so, stop 
+               LDA   Addrptr+1         ; print address
+               LDX   Addrptr           ;
+               JSR   Print2Byte        ;
+SP_cmd33       LDA   #$20              ; " " print 1 - 16 bytes of data
+               JSR   OUTPUT            ;
+               LDA   #$2D              ; "-"
+               JSR   OUTPUT            ;
+SP_cmd4        LDA   #$20              ; " " 
+               JSR   OUTPUT            ;
+               cpy   #$00              ;
+               beq   TXT_Cmd1          ;
+               LDA   (Addrptr)         ;
+               JSR   Print1Byte        ;
+SP_cmd44       SEC                     ;  checks if range done
+               LDA   Addrptr           ;
+               SBC   Hexdigits         ;
+               LDA   Addrptr+1         ;
+               SBC   Hexdigits+1       ;
+               jsr   Inc_addrptr       ;
+               BCC   SP_cmd2           ; loop until range done
+SP_brk         STZ   Memchr            ; reset sec cmd code
+SP_cmd5        RTS                     ; done or no digits to process
+;
+TXT_Cmd        PHY                     ;
+               ldy   #$00              ;
+               jsr   SP_cmd            ;
+               PLY                     ;
+               RTS                     ;
+TXT_cmd1       LDA   (Addrptr)         ;
+               AND   #$7F              ;
+               CMP   #$7F              ;
+               BEQ   TXT_Cmd2          ;
+               CMP   #$20              ; " "
+               BCS   TXT_Cmd3          ;
+TXT_Cmd2       LDA   #$2E              ; "." use "." if not printable char
+TXT_Cmd3       JSR   OUTPUT            ;
+               BRA   SP_cmd44          ;
+;
+Inc_addrptr    INC   Addrptr           ;  increments addrptr
+               BNE   Inc_addr1         ;
+               INC   Addrptr+1         ;
+Inc_addr1      RTS                     ;
+;
+Insert_cmd     lda   Linecnt           ;  "I" cmd code
+               beq   Insert_3          ; abort if no . cmd entered
+               sec                     ;
+               lda   Hexdigits         ;
+               sbc   addrptr           ;
+               tax                     ;
+               lda   Hexdigits+1       ;
+               sbc   addrptr+1         ;
+               tay                     ;
+               bcc   Insert_3          ;
+               clc                     ;
+               txa                     ;
+               adc   memptr            ;
+               sta   hexdigits         ;
+               tya                     ;
+               adc   memptr+1          ;
+               sta   hexdigits+1       ;
+Insert_0       LDA   (memptr)          ;
+               STA   (Hexdigits)       ;
+               lda   #$FF              ;
+               DEC   Hexdigits         ;  
+               cmp   Hexdigits         ;  
+               BNE   Insert_1          ;
+               DEC   Hexdigits+1       ;
+Insert_1       dec   Memptr            ;  
+               cmp   Memptr            ;
+               bne   Insert_2          ;
+               dec   Memptr+1          ;
+Insert_2       SEC                     ;  
+               LDA   memptr            ;
+               SBC   Addrptr           ;
+               LDA   memptr+1          ;
+               SBC   Addrptr+1         ;
+               bcc   Insert_3          ;
+               jsr   Scan_Input        ; see if brk requested
+               bcc   Insert_0          ; if so, stop List
+Insert_3       RTS                     ;
+;
+Move_cmd       lda   Linecnt           ; *** any changes to this routine affect EEPROM_WR too!!!
+               bne   Move_cmd3         ; abort if no . cmd was used
+Move_brk       RTS                     ;
+Move_cmd1      INC   Addrptr           ;  increments addrptr
+               BNE   Move_cmd2         ;
+               INC   Addrptr+1         ;
+Move_cmd2      inc   Hexdigits         ;  "M" cmd code
+               bne   Move_cmd3         ;
+               inc   Hexdigits+1       ;
+Move_cmd3      SEC                     ;  checks if range done
+               LDA   Memptr            ;
+               SBC   Addrptr           ;
+               LDA   Memptr+1          ;
+               SBC   Addrptr+1         ;
+               BCC   Move_brk          ;  exit if range done
+               jsr   Scan_Input        ; see if brk requested
+               bcs   Move_brk          ; 
+               LDA   (Addrptr)         ;  Moves one byte
+               STA   (Hexdigits)       ;
+               BRA   Move_cmd1         ; (zapped after move from eeprom_wr)
+EEPROM_TEST    lda   (Addrptr)         ;    moved along with Move_cmd for EEPROM_WR
+               eor   (Hexdigits)       ;    ""
+               bmi   EEPROM_TEST       ;    ""
+               bra   Move_cmd1         ;    ""
+
+EEPROM_WR      lda   Addrptr           ;  move the Move_cmd sub to $0280 (kybrd buffer)
+               pha                     ;  adding EEPROM test routine 
+               lda   Addrptr+1         ;  then run the burn program from RAM
+               pha                     ;  
+               lda   #<Move_cmd        ;
+               sta   Addrptr           ;
+               lda   #>Move_cmd        ;
+               sta   Addrptr+1         ;
+               ldy   #$2E              ;  47 instructions
+EEPROM_WR1     lda   (Addrptr),y       ;
+               sta   $0280,y           ;
+               dey                     ;
+               bpl   EEPROM_WR1        ;
+               lda   #$EA              ; NOP instruction
+               sta   $02A5             ; *
+               sta   $02A6             ; * affected by changes to Move_cmd routine
+               sta   $029C             ; * affected by changes to Move_cmd routine
+               sta   $029D             ; * affected by changes to Move_cmd routine
+               sta   $029E             ; * affected by changes to Move_cmd routine
+               sta   $029F             ; * affected by changes to Move_cmd routine
+               sta   $02A0             ; * affected by changes to Move_cmd routine
+               pla                     ;
+               sta   Addrptr+1         ;
+               pla                     ;
+               sta   Addrptr           ;        
+               jmp   $0280             ;
+;
+Dest_cmd       LDX   Hexdigits         ;  ">" cmd code
+               LDA   Hexdigits+1       ;
+               STX   Memptr            ;  move address to memptr
+               STA   Memptr+1          ;
+               RTS                     ;  
+                                       ;
+LIST_cmd       lda   LineCnt           ;  Check for normal/range
+               beq   List_cmd_1        ;  0 = normal  1=range 
+               LDA   Addrptr           ;  Dissassemble range of code
+               LDX   Addrptr+1         ;  move addrptr to startaddr
+               STA   Startaddr         ;
+               STX   Startaddr+1       ;
+List_range     sec                     ;
+               lda   Startaddr         ;
+               sbc   Addrptr           ;
+               lda   Startaddr+1       ; 
+               sbc   Addrptr+1         ;
+               bcc   List_done         ;
+               jsr   List_Line         ;  list one line
+               jsr   Scan_Input        ; see if brk requested
+               bcs   List_done         ; if so, stop List
+               SEC                     ;  checks if range done
+               LDA   Hexdigits         ;
+               SBC   Startaddr         ;
+               LDA   Hexdigits+1       ;
+               SBC   Startaddr+1       ;
+               BCS   List_range        ;  if not, loop until done
+               stz   LineCnt           ;
+List_done      RTS                     ;
+List_cmd_1     LDA   Hexdigcnt         ; Dissassemble one page of cmds
+               BEQ   List1             ; followed with more pages 
+               LDX   Hexdigits         ;
+               LDA   Hexdigits+1       ;
+               STX   Startaddr         ;
+               STA   Startaddr+1       ;
+List1          LDA   #$14              ; one page of dissassembly
+               STA   Linecnt           ;
+List2          JSR   List_line         ;
+               DEC   Linecnt           ;
+               BNE   List2             ;
+               RTS                     ;
+List_line      JSR   Print_CR          ; 
+               JSR   List_one          ; one line of dissassembly
+               CLC                     ;
+               LDA   Startaddr         ; inc address pointer to next cmd
+               ADC   Hexdigcnt         ;
+               STA   Startaddr         ;
+               BCC   List3             ;
+               INC   Startaddr+1       ;
+List3          RTS                     ;
+List_one       LDA   (Startaddr)       ; Dissassemble one CMD from Startaddr
+               TAX                     ; Initialize List Cmd pointers
+               LDA   OPCtxtidx,X       ;
+               STA   OPCtxtptr         ;
+               LDA   OPCaddmode,X      ;
+               AND   #$0F              ; mask out psuedo-modes
+               STA   Modejmp           ;
+               TAX                     ;
+               LDA   ModeByteCnt,X     ;
+               STA   Hexdigcnt         ;
+               LDA   Startaddr+1       ;
+               LDX   Startaddr         ;
+               JSR   Print2Byte        ; print address 
+               LDA   #$2D              ;  "-"
+               JSR   OUTPUT            ;
+               JSR   Print2SP          ; print "  "
+               LDX   #$01              ;---------
+List4          LDY   #$00              ;print up to 3 ascii chars...
+List5          CPY   Hexdigcnt         ;  two spaces...
+               BCS   List6             ;  up to three hex chars...
+               LDA   (Startaddr),Y     ;  two spaces
+               CPX   #$00              ;
+               BNE   List8             ;
+               JSR   Print1Byte        ;
+               BRA   List7             ;
+List6          CPX   #$00              ;
+               BNE   List7             ;
+               JSR   Print2SP          ;
+List7          LDA   #$20              ; " "
+List8          AND   #$7F              ;
+               CMP   #$7F              ;
+               BEQ   List9             ;
+               CMP   #$20              ; " "
+               BCS   List10            ;
+List9          LDA   #$2E              ; "." use "." if not printable char
+List10         JSR   OUTPUT            ;
+               INY                     ;
+               CPY   #$03              ;
+               BCC   List5             ;
+               JSR   Print2SP          ;
+               DEX                     ;
+               BEQ   List4             ;---------
+               LDA   OPCtxtptr         ; get opcode text
+               ASL                     ;
+               ADC   OPCtxtptr         ;
+               TAX                     ;
+               LDY   #$FD              ;
+List11         LDA   OPCtxtData,X      ;
+               JSR   OUTPUT            ; print opcode text
+               INX                     ;
+               INY                     ;
+               BNE   List11            ;
+               LDA   OPCtxtptr         ;
+               CMP   #$42              ; 4chr opcodes start
+               BMI   List12		   ;
+               CMP   #$46              ; the .xx cmds
+               BPL   List12            ; 
+               lda   (startaddr)	   ; get opcode of 4byte code
+               lsr
+               lsr
+               lsr
+               lsr
+               AND   #$07              ; strip last 3 bits
+               ora   #$30              ; add CHR '0'
+               jsr   Output            ; print it
+               lda   #$20              ; " "
+               jsr   Output            ; 
+               jmp   List13            ;
+List12         JSR   Print2SP          ;
+List13         LDA   Modejmp           ; setup to print operand
+               ASL                     ;
+               TAX                     ;
+               JMP   (ModeJmpTbl,X)    ; goto operand printing command
+
+IMM_mode       LDA   #$23              ; print #$HH
+               JSR   output            ;
+ZP_mode        LDA   #$24              ; print $HH
+               JSR   output            ;
+               LDY   #$01              ;
+Byte_mode      LDA   (Startaddr),Y     ;
+               JMP   Print1Byte        ;
+ZP_X_mode      JSR   ZP_mode           ; print $HH,X
+X_mode         LDA   #$2C              ; print ,X
+               JSR   output            ;
+               LDA   #$58              ; 
+               JMP   output            ;
+ZP_Y_mode      JSR   ZP_mode           ; print $HH,Y
+Y_mode         LDA   #$2C              ; Print ,Y
+               JSR   output            ;
+               LDA   #$59              ; 
+               JMP   output            ;
+INDZP_mode     JSR   IND0_mode         ; Print ($HH)
+               JSR   ZP_mode           ;
+IND1_mode      LDA   #$29              ; Print )
+               JMP   output            ;
+INDZP_X_mode   JSR   IND0_mode         ; Print ($HH,X)
+               JSR   ZP_mode           ;
+               JSR   X_mode            ;
+               BRA   IND1_mode         ;
+INDZP_Y_mode   JSR   INDZP_mode        ; Print ($HH),Y
+               BRA   Y_mode            ;
+ABS_mode       LDA   #$24              ; Print $HHHH
+               JSR   output            ;
+               LDY   #$02              ;
+               JSR   Byte_mode         ;
+               DEY                     ;
+               BRA   Byte_mode         ;
+ABS_X_mode     JSR   ABS_mode          ; Print $HHHH,X
+               BRA   X_mode            ;
+ABS_Y_mode     JSR   ABS_mode          ; Print $HHHH,Y
+               BRA   Y_mode            ;
+INDABS_mode    JSR   IND0_mode         ; Print ($HHHH)
+               JSR   ABS_mode          ;
+               BRA   IND1_mode         ;
+INDABSX_mode   JSR   IND0_mode         ; Print ($HHHH,X)
+               JSR   ABS_mode          ;
+               JSR   X_mode            ;
+               BRA   IND1_mode         ;
+IMPLIED_mode   RTS                     ; Implied/Accumulator mode 
+IND0_mode      LDA   #$28              ; Print (
+               JMP   output            ;
+BBREL_mode     JSR   ZP_mode		   ;
+		   LDA   #$2C              ; Print ,
+               JSR   output            ;
+               LDA   #$24              ; Print $
+               JSR   output            ;
+               LDY   #$02		   ;
+               LDA   (Startaddr),Y     ;
+               STA   Memchr            ;
+               CLC                     ;
+               LDA   Startaddr         ;
+               ADC   #$03              ;
+               JMP   REL_mode0         ;
+REL_mode       LDA   #$24              ; Print $HHHH as Relative Branch
+               JSR   output            ;
+               LDY   #$01              ;
+               LDA   (Startaddr),Y     ;
+               STA   Memchr            ;
+               CLC                     ;
+               LDA   Startaddr         ;
+               ADC   #$02              ;
+REL_mode0      TAX                     ;
+               LDA   Startaddr+1       ;
+               ADC   #$00              ;
+               TAY                     ;
+               CLC                     ;
+               TXA                     ;
+               ADC   Memchr            ;
+               TAX                     ;
+               TYA                     ;
+               LDY   Memchr            ;
+               BPL   Rel_mode1         ;
+               DEC                     ;
+Rel_mode1      ADC   #$00              ;
+               JMP   Print2Byte        ;
+;
+;mini assembler code
+;
+Assem_Init     tsx                     ;
+               inx                     ;
+               inx                     ;
+               inx                     ;
+               inx                     ;
+               stz   $0100,x           ;
+               jsr   version           ;  show version and ? prompt
+               jmp   Assembler         ;
+Asm_Help       lda   #<AsmHelptxt      ;  lower byte - Menu of Commands
+               sta   addrptr           ;
+               lda   #>AsmHelptxt      ;  upper byte
+               sta   addrptr+1         ;
+               bra   AsmHelp3          ;
+ASmHelp4       cmp   #$7e              ;  "~"
+               beq   AsmHelp1          ;
+               jsr   Output            ;
+               bra   AsmHelp2          ;
+AsmHelp1       jsr   Print_CR          ;     
+AsmHelp2       jsr   Inc_addrptr       ;
+AsmHelp3       lda   (addrptr)         ;
+               bne   AsmHelp4          ;
+               jsr   Opcode_List       ;  
+
+Assembler      LDX   #$FF              ;
+               TXS                     ; init stack
+               stz   HexDigCnt         ;
+               jsr   Input_assem       ;
+               ldy   #$00              ; beginning of input line
+               lda   buffer            ;
+               cmp   #$0d              ; Enter = done 
+               bne   Asm01             ;
+               JMP   Monitor           ; exit assembler
+Asm01          cmp   #$3f              ; "?" Print Help
+               beq   Asm_Help          ;
+               cmp   #$20              ; space
+               beq   Asm_opfetch       ;
+               cmp   #$3b              ;  ";" ignore line
+               beq   Assembler         ;
+               cmp   #$4C              ;  "L" list
+               beq   Asm_List          ;
+               cmp   #$24              ;  "$" ignore this
+               bne   Asm02             ;
+               iny                     ;
+Asm02          STZ   Hexdigits         ;  holds parsed hex
+               STZ   Hexdigits+1       ;
+               JSR   ParseHexDig       ;  get Hex Chars 
+               LDX   Hexdigcnt         ;
+               Beq   Asm_Err           ;
+               cmp   #$4C              ; "L" do list               ???
+               Beq   Asm_List1         ;
+               cmp   #$20              ; Space
+               Beq   Asm_opfetch       ;
+Asm_Err        tya                     ;  get line pointer
+               tax                     ;
+               lda   #$0a              ; LF move down one line
+               jsr   output            ;
+               jsr   PrintXSP          ; move to where error occured
+               lda   #$5E              ; "^"                       ???
+               jsr   Output            ; mark it 
+               jsr   bell              ; 
+               bra   Assembler         ;
+Asm_list       stz   HexDigcnt         ;
+Asm_List1      jsr   List_Cmd_1        ;
+Asm_hop        bra   Assembler         ;
+Asm_opfetch    lda   HexDigCnt         ;
+               beq   Asm_op01          ; no address change
+               LDX   Hexdigits         ;
+               LDA   Hexdigits+1       ;
+               STX   AddrPtr           ;
+               STA   AddrPtr+1         ;
+               dey                     ;
+Asm_stripSP    iny                     ;
+Asm_op01       lda   buffer,y          ;
+               cmp   #$20              ; strip spaces
+               beq   Asm_stripSP       ;
+               cmp   #$0d              ; done
+               beq   Asm_hop           ;
+               cmp   #$3b              ; ";" comment char done
+               beq   Asm_hop           ;
+               ldx   #$00              ;
+               stx   OpcTxtPtr         ;
+               sty   LineCnt           ;
+Asm_opclp      ldy   LineCnt           ;
+               lda   OpcTxtPtr         ;
+               ASL                     ;
+               adc   OpcTxtPtr         ;
+               tax                     ;
+               lda   buffer,y          ;
+               iny                     ;
+               cmp   OpcTxtData,x      ;
+               bne   Asm_getnext       ;
+               lda   buffer,y          ;
+               inx                     ;
+               iny                     ;
+               cmp   OpcTxtData,x      ;
+               bne   Asm_getnext       ;
+               lda   buffer,y          ;
+               inx                     ;
+               iny                     ;
+               cmp   OpcTxtData,x      ;
+               beq   Asm_goodop        ;
+Asm_getnext    ldx   OpcTxtPtr         ;
+               inx                     ;
+               stx   OpcTxtPtr         ;
+               cpx   #$4A              ; last one? then err
+               bne   Asm_opclp
+Asm_err2       jmp   Asm_err
+Asm_goodop     lda   #$00
+               sta   ModeJmp           ; 
+               dec   ModeJmp           ; init to FF for () check
+               sta   HexDigits         ; and Byte holder
+               sta   HexDigits+1       ; 
+               sta   HexDigCnt         ;
+               ldx   OpcTxtPtr         ;
+               cpx   #$42              ; 
+               bmi   Asm_goodSP        ; not a 4 chr opcode
+               cpx   #$46              
+               bpl   Asm_goodSP        ; not a 4 chr opcode
+               lda   buffer,y          ; get next chr
+               iny                     ; advance pointer
+               cmp   #$38              ; 
+               bpl   Asm_err2          ; not chr "0"-"7"
+               cmp   #$30
+               bmi   Asm_err2          ; not chr "0"-"7"
+               ASL
+               ASL
+               ASL
+               ASL
+               sta   startaddr_H       ; temp holder for 4th chr opcode
+               LDA   #$80              ; flag for 
+Asm_goodSP     ldx   buffer,y          ; get next operand char
+               iny                     ; point to next operand chr
+               cpx   #$20              ;  sp
+               bne   Asm_GoodSP2
+               cmp   #$80
+               bmi   Asm_goodSP
+Asm_goodSP1    ldx   OpcTxtPtr         ; check if its a BBRx or BBSx opcode
+               cpx   #$44              ; 
+               bpl   Asm_GoodSP        ;
+               ldx   HexDigCnt         ;
+               beq   Asm_goodSP        ;
+               cmp   #$D0              ; already have zp & rel?
+               bpl   Asm_GoodSP        ; we don't care then
+               cmp   #$C0              ; already got a zp address?
+               bpl   Asm_Err2          ; then error
+               ldx   HexDigits+1
+               bne   Asm_err2          ; not zero page
+               ldx   HexDigits
+               stx   startaddr         ; temp zp value for BBRx & BBSx cmds 
+               ora   #$40              ; mark zp address fetched
+               and   #$F7              ; mask out zp address found
+               bra   Asm_goodSP        ; get next chr
+Asm_goodSp2    cpx   #$0d              ;  CR
+               bne   Asm_eol
+Asm_jmp1       jmp   Asm_modeSrch
+Asm_eol        cpx   #$3b              ;  ";"
+               beq   Asm_jmp1
+               pha
+               lda   OpcTxtPtr
+               cmp   #$46              ; normal opcode if <=45h
+               bmi   Asm_opnd1
+               bne   Asm_xtra1
+               cpx   #$24              ; $ .db pseudo-opcode
+               beq   Asm_db1
+               dey
+Asm_db1        jsr   ParseHexDig
+               plx
+               ldx   HexDigCnt
+               beq   Asm_err2          ; no digits retrieved
+               ldy   #$00
+               lda   #$01
+               PHA
+               lda   HexDigits
+               sta   (AddrPtr),y
+               jmp   Asm_save
+Asm_xtra1      cmp   #$47              ; .dw pseudo-opcode
+               bne   Asm_xtra2 
+               cpx   #$24              ; $
+               beq   Asm_dw1
+               dey
+Asm_dw1        jsr   ParseHexDig
+               plx
+               ldx   HexDigCnt
+               beq   Asm_err1          ; no digits retrieved
+               ldy   #$00
+               lda   #$02
+               PHA
+               lda   HexDigits
+               sta   (AddrPtr),y
+               lda   HexDigits+1
+               iny
+               sta   (AddrPtr),y
+               jmp   Asm_save
+Asm_xtra2      cmp   #$48              ; .ds pseudo-opcode
+               bne   Asm_err1 
+               jmp   Asm_txt
+Asm_opnd1      pla
+               cpx   #$23              ;  #    20
+               bne   Asm_parse01
+               ora   #$20
+               jmp   Asm_goodSP 
+Asm_parse01    cpx   #$28              ;  (   04
+               bne   Asm_parse02
+               ora   #$04
+               ldx   modeJmp
+               bpl   Asm_err1          ;  more than one ( 
+               inc   ModeJmp
+               jmp   Asm_goodSP 
+Asm_parse02    cpx   #$29              ;  )
+               bne   Asm_parse03
+               ldx   ModeJmp
+               bne   Asm_err1          ;  ) without (
+               inc   ModeJmp
+               jmp   Asm_goodSP 
+Asm_parse03    cpx   #$2C              ;  ,
+               bne   Asm_parse04
+               ldx   buffer,y
+               cpx   #$58              ;  X        02
+               bne   Asm_parse31
+               ora   #$02
+               iny
+               jmp   Asm_goodSP
+Asm_parse31    cpx   #$59              ;  Y        01 
+               beq   Asm_parse32
+               cmp   #$80              ;  is BBRx or BBSx cmd active?
+               bmi   Asm_err1          ;  , without X or Y or 4byte opcode      
+               jmp   Asm_goodSP1       ;  save zp address
+Asm_parse32    ora   #$01
+               iny
+               jmp   Asm_goodSP 
+Asm_parse04    cpx   #$24              ;  $
+               beq   Asm_parse42       ;   
+               dey                     ; not #$(),X,Y  so try Hexdig, if not err
+Asm_parse42    pha
+               jsr   ParseHexDig
+               dey                     ; adjust input line pointer
+               pla
+               ldx   HexDigCnt
+               beq   Asm_err1          ; no digits retrieved
+               ldx   HexDigits+1    
+               bne   Asm_parse41
+               ora   #$08              ; <256               08
+               jmp   Asm_goodSP
+Asm_parse41    ora   #$10              ; 2 bytes            10 
+               jmp   Asm_goodSP 
+Asm_err1       jmp   Asm_Err
+Asm_ModeSrch   ldx   #$0F              ; # of modes
+Asm_ModeS1     cmp   Asm_ModeLst,x
+               beq   Asm_ModeFnd 
+               dex   
+               bpl   Asm_ModeS1
+               bra   Asm_Err1          ; invalid Mode
+Asm_ModeFnd    stx   Memchr            ; save mode
+               cmp   #$80              ; is it 4 chr opcode?
+               bmi   Asm_opcSrch       ;no
+               txa
+               ora   startaddr_H       ; adjust the psuedo mode               
+               sta   Memchr            ; set proper mode
+Asm_opcSrch    ldx   #$00
+Asm_opcSrch1   lda   OpcTxtidx,x
+               cmp   OpcTxtPtr
+               bne   Asm_srchNxt   
+               lda   OPCaddmode,x
+               cmp   Memchr
+               beq   Asm_OpcFnd
+Asm_srchNxt    inx
+               bne   Asm_opcSrch1 
+               lda   Memchr            ;
+               cmp   #$02              ; ZP
+               bne   Asm_srchAlt 
+               LDA   #$01              ; ABS
+               sta   Memchr
+               bra   Asm_opcSrch
+Asm_srchAlt    cmp   #$01              ; ABS
+               bne   Asm_srchA0
+               LDA   #$0A              ; REL
+               sta   Memchr
+               bra   Asm_opcSrch
+Asm_srchA0     cmp   #$0d               ;  ind zp
+               bne   Asm_srchA1
+               LDA   #$0b              ; ind Abs
+               sta   Memchr
+               bra   Asm_opcSrch
+Asm_SrchA1     cmp   #$07              ; zp,y
+               bne   Asm_Err1          ; no more modes to try, bad mode err
+               LDA   #$09              ; ABS,y
+               sta   Memchr
+               bra   Asm_opcSrch
+Asm_OpcFnd     lda   Memchr
+               and   #$0F              ; mask out psuedo modes
+               sta   Memchr            ;
+               CMP   #$0E              ; BBR mode?
+               bne   Asm_opcFnd0       ;
+               jsr   Asm_BRelCalc      ;
+               sta   HexDigits_H       ;
+               lda   Startaddr         ;
+               sta   Hexdigits         ;
+               bra   Asm_OpcFnd1       ;   
+Asm_OpcFnd0    cmp   #$0A              ; is Rel Mode?
+               bne   Asm_OpcFnd1 
+               jsr   Asm_RelCalc       ; adjust rel address
+Asm_OpcFnd1    ldy   #$00
+               txa
+               sta   (AddrPtr),y
+               iny
+               ldx   Memchr            ; 
+               lda   ModeByteCnt,x
+               PHA                     ; Save # of bytes
+               cmp   #$01
+               beq   Asm_EchoL
+               lda   HexDigits
+               sta   (AddrPtr),y
+               iny
+               lda   ModeByteCnt,x
+               cmp   #$02
+               beq   Asm_EchoL
+               lda   HexDigits+1
+               sta   (AddrPtr),y
+Asm_EchoL      lda   AddrPtr
+               sta   StartAddr
+               lda   AddrPtr+1
+               sta   StartAddr+1
+               jsr   List_One
+Asm_Save       clc
+               PLA
+               adc   AddrPtr
+               sta   AddrPtr
+               bcc   Asm_done
+               inc   AddrPtr+1
+Asm_done       jmp   Assembler
+Asm_BRelCalc   jsr   Asm_relsub
+               sbc   #$03
+               bra   Asm_RelC1
+Asm_RelSub     sec
+               lda   Hexdigits
+               sbc   AddrPtr
+               sta   Memptr
+               lda   Hexdigits+1
+               sbc   AddrPtr+1
+               sta   Memptr+1
+               sec
+               lda   Memptr
+               rts 
+Asm_RelCalc    jsr   Asm_relsub
+               sbc   #$02
+Asm_Relc1      sta   Memptr
+               bcs   Asm_relC2
+               dec   Memptr+1
+Asm_relC2      lda   Memptr+1               
+               beq   Asm_relC4         ; positive
+               cmp   #$FF              ; negative
+               bne   Asm_txtErr
+               lda   Memptr
+               bpl   Asm_txtErr
+Asm_relC3      sta   HexDigits
+               rts
+Asm_relC4      lda   Memptr
+               bpl   Asm_relC3
+Asm_txtErr     jmp   Asm_Err
+Asm_txt        plx                      ; process the .ds pseudo-opcode
+               dey
+               tya
+               tax
+               ldy   #$fe
+Asm_txt1       iny
+Asm_txt2       lda   buffer,x           ; get next operand char
+               inx                      ; point to next operand chr
+               cmp   #$0d             ;  CR
+               beq   Asm_txt9
+               cmp   #$27             ; "
+               bne   Asm_txt3
+               cpy   #$ff             ; opening " found?
+               bne   Asm_txt9         ; no, closing, so done
+               bra   Asm_txt1         ; yes, get first text chr
+Asm_txt3       cpy   #$ff             ; already found opening "?
+               beq   Asm_txt4         ; 
+               sta   (AddrPtr),y      ; yes, save chr
+               bra   Asm_txt1
+Asm_txt4       cmp   #$20             ; no, if not a space, then err
+               beq   Asm_txt2
+               txa
+               tay
+               bra   Asm_txtErr
+Asm_txt9       tya
+               pha
+               jmp   Asm_save
+;
+Opcode_List    ldy   #$49              ; Number of Opcodes (64)
+               ldx   #$00              ; pointer to characters
+Opcode_List1   txa                     ; 
+               and   #$0F              ; Print CR after each 16 opcodes 
+               bne   Opcode_List2      ; not divisible by 16
+               jsr   Print_CR          ;
+Opcode_List2   lda   OPCtxtData,x      ; get opcode chr data
+               jsr   Output            ; print 1st char
+               inx                     ;
+               lda   OPCtxtData,x      ; 
+               jsr   Output            ; print 2nd char
+               inx                     ;
+               lda   OPCtxtData,x      ;
+               jsr   Output            ; print 3rd char
+               inx                     ;
+               cpy   #$08              ; 
+               bpl   Opcode_List3      ; not 4 byte code
+               cpy   #$04              ;
+               bmi   Opcode_list3      ;
+               lda   #$78              ; add 'x'
+               jsr   output            ; for RMBx, SMBx,BBRx, & BBSx
+Opcode_List3   lda   #$20              ; print space
+               jsr   Output            ;
+               dey                     ;
+               bne   Opcode_List1      ; 
+               jsr   Print_CR          ; one last CR-LF
+               rts                     ;
+;
+;-----------DATA TABLES ------------------------------------------------
+;
+Hexdigdata     .byte "0123456789ABCDEF";hex char table 
+;     
+CmdCount       =$13                    ; number of commands to scan for
+CmdAscii       .byte $0D               ; 0 enter    cmd codes
+               .byte $20               ; 1 SPACE
+               .byte $2E               ; 2 .
+               .byte $3A               ; 3 :
+               .byte $3E               ; 4 >  
+               .byte $3f               ; 5 ? - Help
+               .byte $21               ; 6 ! - Assembler
+               .byte $47               ; 7 g - Go
+               .byte $49               ; 8 i - Insert
+               .byte $4C               ; 9 l - List
+               .byte $4D               ; A m - Move
+               .byte $51               ; B q - Query memory (text dump)
+               .byte $52               ; C r - Registers
+               .byte $40               ; D @ - Cold Start Basic
+               .byte $23               ; E # - Warm Start Basic
+               .byte $55               ; F U - Uploader
+               .byte $56               ;10 v - Version
+               .byte $57               ;11 w - "(W)rite" eeprom
+               .byte $24               ;12 $ - fig forth
+               .byte $25               ;13 % - uChess
+;     
+Cmdjmptbl      .word CR_cmd            ; 0  enter   cmd jmp table
+               .word SP_cmd            ; 1   space
+               .word DOT_cmd           ; 2    .
+               .word DOT_cmd           ; 3    :
+               .word Dest_cmd          ; 4    >  
+               .word Help_Cmd          ; 5    ?
+               .word Assem_init        ; 6    !
+               .word Excute_cmd        ; 7    g
+               .word Insert_Cmd        ; 8    i
+               .word LIST_cmd          ; 9    l
+               .word Move_cmd          ; A    m
+               .word TXT_cmd           ; B    q
+               .word Printreg          ; C    r
+               .word bsetup            ; D    @
+               .word $0000             ; E    #
+               .word xmodem            ; F    u
+               .word Version           ;10    v
+               .word EEPROM_WR         ;11    w  
+               .word TOPROM            ;12    $  
+               .word _CSTART           ;13 % - uChess
+
+;     
+Cmdseccode     .byte $00               ; 0   enter       secondary command table
+               .byte $FF               ; 1   sp
+               .byte $01               ; 2   .
+               .byte $02               ; 3   :
+               .byte $00               ; 4   > 
+               .byte $00               ; 5   ?
+               .byte $00               ; 6   !
+               .byte $00               ; 7   g
+               .byte $00               ; 8   i
+               .byte $00               ; 9   l
+               .byte $00               ; A   m
+               .byte $00               ; B   q
+               .byte $00               ; C   r
+               .byte $00               ; D   @
+               .byte $00               ; E   #
+               .byte $00               ; F   u
+               .byte $00               ;10   v
+               .byte $00               ;11   w
+               .byte $00               ;12   $
+               .byte $00               ;13 % - uChess
+;
+;     
+OPCtxtidx      .byte $0B               ;0   operand text index
+               .byte $23               ;1
+               .byte $49               ;2
+               .byte $49               ;3
+               .byte $3B               ;4
+               .byte $23               ;5
+               .byte $02               ;6
+               .byte $44               ;7
+               .byte $25               ;8
+               .byte $23               ;9
+               .byte $02               ;A
+               .byte $49               ;B
+               .byte $3B               ;C
+               .byte $23               ;D
+               .byte $02               ;E
+               .byte $42               ;F
+               .byte $09               ;10
+               .byte $23               ;11
+               .byte $23               ;12
+               .byte $49               ;13
+               .byte $3A               ;14
+               .byte $23               ;15
+               .byte $02               ;16
+               .byte $44               ;17
+               .byte $0E               ;18
+               .byte $23               ;19
+               .byte $19               ;1A
+               .byte $49               ;1B
+               .byte $3A               ;1C
+               .byte $23               ;1D
+               .byte $02               ;1E
+               .byte $42               ;1F
+               .byte $1D               ;20
+               .byte $01               ;21
+               .byte $49               ;22
+               .byte $49               ;23
+               .byte $06               ;24
+               .byte $01               ;25
+               .byte $2C               ;26
+               .byte $44               ;27
+               .byte $29               ;28
+               .byte $01               ;29
+               .byte $2C               ;2A
+               .byte $49               ;2B
+               .byte $06               ;2C
+               .byte $01               ;2D
+               .byte $2C               ;2E
+               .byte $42               ;2F
+               .byte $07               ;30
+               .byte $01               ;31
+               .byte $01               ;32
+               .byte $49               ;33
+               .byte $06               ;34
+               .byte $01               ;35
+               .byte $2C               ;36
+               .byte $44               ;37
+               .byte $31               ;38
+               .byte $01               ;39
+               .byte $15               ;3A
+               .byte $49               ;3B
+               .byte $06               ;3C
+               .byte $01               ;3D
+               .byte $2C               ;3E
+               .byte $42               ;3F
+               .byte $2E               ;40
+               .byte $18               ;41
+               .byte $49               ;42
+               .byte $49               ;43
+               .byte $49               ;44
+               .byte $18               ;45
+               .byte $21               ;46
+               .byte $44               ;47
+               .byte $24               ;48
+               .byte $18               ;49
+               .byte $21               ;4A
+               .byte $49               ;4B
+               .byte $1C               ;4C
+               .byte $18               ;4D
+               .byte $21               ;4E
+               .byte $42               ;4F
+               .byte $0C               ;50
+               .byte $18               ;51
+               .byte $18               ;52
+               .byte $49               ;53
+               .byte $49               ;54
+               .byte $18               ;55
+               .byte $21               ;56
+               .byte $44               ;57
+               .byte $10               ;58
+               .byte $18               ;59
+               .byte $27               ;5A
+               .byte $49               ;5B
+               .byte $49               ;5C
+               .byte $18               ;5D
+               .byte $21               ;5E
+               .byte $42               ;5F
+               .byte $2F               ;60
+               .byte $00               ;61
+               .byte $49               ;62
+               .byte $49               ;63
+               .byte $37               ;64
+               .byte $00               ;65
+               .byte $2D               ;66
+               .byte $44               ;67
+               .byte $28               ;68
+               .byte $00               ;69
+               .byte $2D               ;6A
+               .byte $49               ;6B
+               .byte $1C               ;6C
+               .byte $00               ;6D
+               .byte $2D               ;6E
+               .byte $42               ;6F
+               .byte $0D               ;70
+               .byte $00               ;71
+               .byte $00               ;72
+               .byte $49               ;73
+               .byte $37               ;74
+               .byte $00               ;75
+               .byte $2D               ;76
+               .byte $44               ;77
+               .byte $33               ;78
+               .byte $00               ;79
+               .byte $2B               ;7A
+               .byte $49               ;7B
+               .byte $1C               ;7C
+               .byte $00               ;7D
+               .byte $2D               ;7E
+               .byte $42               ;7F
+               .byte $0A               ;80
+               .byte $34               ;81
+               .byte $49               ;82
+               .byte $49               ;83
+               .byte $36               ;84
+               .byte $34               ;85
+               .byte $35               ;86
+               .byte $45               ;87
+               .byte $17               ;88
+               .byte $06               ;89
+               .byte $3D               ;8A
+               .byte $49               ;8B
+               .byte $36               ;8C
+               .byte $34               ;8D
+               .byte $35               ;8E
+               .byte $43               ;8F
+               .byte $03               ;90
+               .byte $34               ;91
+               .byte $34               ;92
+               .byte $49               ;93
+               .byte $36               ;94
+               .byte $34               ;95
+               .byte $35               ;96
+               .byte $45               ;97
+               .byte $3F               ;98
+               .byte $34               ;99
+               .byte $3E               ;9A
+               .byte $49               ;9B
+               .byte $37               ;9C
+               .byte $34               ;9D
+               .byte $37               ;9E
+               .byte $43               ;9F
+               .byte $20               ;A0
+               .byte $1E               ;A1
+               .byte $1F               ;A2
+               .byte $49               ;A3
+               .byte $20               ;A4
+               .byte $1E               ;A5
+               .byte $1F               ;A6
+               .byte $45               ;A7
+               .byte $39               ;A8
+               .byte $1E               ;A9
+               .byte $38               ;AA
+               .byte $49               ;AB
+               .byte $20               ;AC
+               .byte $1E               ;AD
+               .byte $1F               ;AE
+               .byte $43               ;AF
+               .byte $04               ;B0
+               .byte $1E               ;B1
+               .byte $1E               ;B2
+               .byte $49               ;B3
+               .byte $20               ;B4
+               .byte $1E               ;B5
+               .byte $1F               ;B6
+               .byte $45               ;B7
+               .byte $11               ;B8
+               .byte $1E               ;B9
+               .byte $3C               ;BA
+               .byte $49               ;BB
+               .byte $20               ;BC
+               .byte $1E               ;BD
+               .byte $1F               ;BE
+               .byte $43               ;BF
+               .byte $14               ;C0
+               .byte $12               ;C1
+               .byte $49               ;C2
+               .byte $49               ;C3
+               .byte $14               ;C4
+               .byte $12               ;C5
+               .byte $15               ;C6
+               .byte $45               ;C7
+               .byte $1B               ;C8
+               .byte $12               ;C9
+               .byte $16               ;CA
+               .byte $40               ;CB
+               .byte $14               ;CC
+               .byte $12               ;CD
+               .byte $15               ;CE
+               .byte $43               ;CF
+               .byte $08               ;D0
+               .byte $12               ;D1
+               .byte $12               ;D2
+               .byte $49               ;D3
+               .byte $49               ;D4
+               .byte $12               ;D5
+               .byte $15               ;D6
+               .byte $45               ;D7
+               .byte $0F               ;D8
+               .byte $12               ;D9
+               .byte $26               ;DA
+               .byte $41               ;DB
+               .byte $49               ;DC
+               .byte $12               ;DD
+               .byte $15               ;DE
+               .byte $43               ;DF
+               .byte $13               ;E0
+               .byte $30               ;E1
+               .byte $49               ;E2
+               .byte $49               ;E3
+               .byte $13               ;E4
+               .byte $30               ;E5
+               .byte $19               ;E6
+               .byte $45               ;E7
+               .byte $1A               ;E8
+               .byte $30               ;E9
+               .byte $22               ;EA
+               .byte $49               ;EB
+               .byte $13               ;EC
+               .byte $30               ;ED
+               .byte $19               ;EE
+               .byte $43               ;EF
+               .byte $05               ;F0
+               .byte $30               ;F1
+               .byte $30               ;F2
+               .byte $49               ;F3
+               .byte $49               ;F4
+               .byte $30               ;F5
+               .byte $19               ;F6
+               .byte $45               ;F7
+               .byte $32               ;F8
+               .byte $30               ;F9
+               .byte $2A               ;FA
+               .byte $49               ;FB
+               .byte $49               ;FC
+               .byte $30               ;FD
+               .byte $19               ;FE
+               .byte $43               ;FF
+;     
+OPCaddmode     .byte $03               ;0   opcode address mode
+               .byte $04               ;1
+               .byte $03               ;2
+               .byte $03               ;3
+               .byte $02               ;4
+               .byte $02               ;5
+               .byte $02               ;6
+               .byte $0F               ;7
+               .byte $03               ;8
+               .byte $00               ;9
+               .byte $03               ;A
+               .byte $03               ;B
+               .byte $01               ;C
+               .byte $01               ;D
+               .byte $01               ;E
+               .byte $0E               ;F
+               .byte $0A               ;10
+               .byte $05               ;11
+               .byte $0D               ;12
+               .byte $03               ;13
+               .byte $02               ;14
+               .byte $06               ;15
+               .byte $06               ;16
+               .byte $1F               ;17
+               .byte $03               ;18
+               .byte $09               ;19
+               .byte $03               ;1A
+               .byte $03               ;1B
+               .byte $01               ;1C
+               .byte $08               ;1D
+               .byte $08               ;1E
+               .byte $1E               ;1F
+               .byte $01               ;20
+               .byte $04               ;21
+               .byte $03               ;22
+               .byte $03               ;23
+               .byte $02               ;24
+               .byte $02               ;25
+               .byte $02               ;26
+               .byte $2F               ;27
+               .byte $03               ;28
+               .byte $00               ;29
+               .byte $03               ;2A
+               .byte $03               ;2B
+               .byte $01               ;2C
+               .byte $01               ;2D
+               .byte $01               ;2E
+               .byte $2E               ;2F
+               .byte $0A               ;30
+               .byte $05               ;31
+               .byte $0D               ;32
+               .byte $03               ;33
+               .byte $06               ;34
+               .byte $06               ;35
+               .byte $06               ;36
+               .byte $3F               ;37
+               .byte $03               ;38
+               .byte $09               ;39
+               .byte $03               ;3A
+               .byte $03               ;3B
+               .byte $08               ;3C
+               .byte $08               ;3D
+               .byte $08               ;3E
+               .byte $3E               ;3F
+               .byte $03               ;40
+               .byte $04               ;41
+               .byte $03               ;42
+               .byte $03               ;43
+               .byte $03               ;44
+               .byte $02               ;45
+               .byte $02               ;46
+               .byte $4F               ;47
+               .byte $03               ;48
+               .byte $00               ;49
+               .byte $03               ;4A
+               .byte $03               ;4B
+               .byte $01               ;4C
+               .byte $01               ;4D
+               .byte $01               ;4E
+               .byte $4E               ;4F
+               .byte $0A               ;50
+               .byte $05               ;51
+               .byte $0D               ;52
+               .byte $03               ;53
+               .byte $03               ;54
+               .byte $06               ;55
+               .byte $06               ;56
+               .byte $5F               ;57
+               .byte $03               ;58
+               .byte $09               ;59
+               .byte $03               ;5A
+               .byte $03               ;5B
+               .byte $03               ;5C
+               .byte $08               ;5D
+               .byte $08               ;5E
+               .byte $5E               ;5F
+               .byte $03               ;60
+               .byte $04               ;61
+               .byte $03               ;62
+               .byte $03               ;63
+               .byte $02               ;64
+               .byte $02               ;65
+               .byte $02               ;66
+               .byte $6F               ;67
+               .byte $03               ;68
+               .byte $00               ;69
+               .byte $03               ;6A
+               .byte $03               ;6B
+               .byte $0B               ;6C
+               .byte $01               ;6D
+               .byte $01               ;6E
+               .byte $6E               ;6F
+               .byte $0A               ;70
+               .byte $05               ;71
+               .byte $0D               ;72
+               .byte $03               ;73
+               .byte $06               ;74
+               .byte $06               ;75
+               .byte $06               ;76
+               .byte $7F               ;77
+               .byte $03               ;78
+               .byte $09               ;79
+               .byte $03               ;7A
+               .byte $03               ;7B
+               .byte $0C               ;7C
+               .byte $08               ;7D
+               .byte $08               ;7E
+               .byte $7E               ;7F
+               .byte $0A               ;80
+               .byte $04               ;81
+               .byte $03               ;82
+               .byte $03               ;83
+               .byte $02               ;84
+               .byte $02               ;85
+               .byte $02               ;86
+               .byte $0F               ;87
+               .byte $03               ;88
+               .byte $00               ;89
+               .byte $03               ;8A
+               .byte $03               ;8B
+               .byte $01               ;8C
+               .byte $01               ;8D
+               .byte $01               ;8E
+               .byte $0E               ;8F
+               .byte $0A               ;90
+               .byte $05               ;91
+               .byte $0D               ;92
+               .byte $03               ;93
+               .byte $06               ;94
+               .byte $06               ;95
+               .byte $07               ;96
+               .byte $1F               ;97
+               .byte $03               ;98
+               .byte $09               ;99
+               .byte $03               ;9A
+               .byte $03               ;9B
+               .byte $01               ;9C
+               .byte $08               ;9D
+               .byte $08               ;9E
+               .byte $1E               ;9F
+               .byte $00               ;A0
+               .byte $04               ;A1    changed from 0d to 04
+               .byte $00               ;A2
+               .byte $03               ;A3
+               .byte $02               ;A4
+               .byte $02               ;A5
+               .byte $02               ;A6
+               .byte $2F               ;A7
+               .byte $03               ;A8
+               .byte $00               ;A9
+               .byte $03               ;AA
+               .byte $03               ;AB
+               .byte $01               ;AC
+               .byte $01               ;AD
+               .byte $01               ;AE
+               .byte $2E               ;AF
+               .byte $0A               ;B0
+               .byte $05               ;B1
+               .byte $0D               ;B2     
+               .byte $03               ;B3
+               .byte $06               ;B4
+               .byte $06               ;B5
+               .byte $07               ;B6
+               .byte $3F               ;B7
+               .byte $03               ;B8
+               .byte $09               ;B9
+               .byte $03               ;BA
+               .byte $03               ;BB
+               .byte $08               ;BC
+               .byte $08               ;BD
+               .byte $09               ;BE
+               .byte $3E               ;BF
+               .byte $00               ;C0
+               .byte $04               ;C1
+               .byte $03               ;C2
+               .byte $03               ;C3
+               .byte $02               ;C4
+               .byte $02               ;C5
+               .byte $02               ;C6
+               .byte $4F               ;C7
+               .byte $03               ;C8
+               .byte $00               ;C9
+               .byte $03               ;CA
+               .byte $03               ;CB
+               .byte $01               ;CC
+               .byte $01               ;CD
+               .byte $01               ;CE
+               .byte $4E               ;CF
+               .byte $0A               ;D0
+               .byte $05               ;D1
+               .byte $0D               ;D2
+               .byte $03               ;D3
+               .byte $03               ;D4
+               .byte $06               ;D5
+               .byte $06               ;D6
+               .byte $5F               ;D7
+               .byte $03               ;D8
+               .byte $09               ;D9
+               .byte $03               ;DA
+               .byte $03               ;DB
+               .byte $03               ;DC
+               .byte $08               ;DD
+               .byte $08               ;DE
+               .byte $5E               ;DF
+               .byte $00               ;E0
+               .byte $04               ;E1
+               .byte $03               ;E2
+               .byte $03               ;E3
+               .byte $02               ;E4
+               .byte $02               ;E5
+               .byte $02               ;E6
+               .byte $6F               ;E7
+               .byte $03               ;E8
+               .byte $00               ;E9
+               .byte $03               ;EA
+               .byte $03               ;EB
+               .byte $01               ;EC
+               .byte $01               ;ED
+               .byte $01               ;EE
+               .byte $6E               ;EF
+               .byte $0A               ;F0
+               .byte $05               ;F1
+               .byte $0D               ;F2
+               .byte $03               ;F3
+               .byte $03               ;F4
+               .byte $06               ;F5
+               .byte $06               ;F6
+               .byte $7F               ;F7
+               .byte $03               ;F8
+               .byte $09               ;F9
+               .byte $03               ;FA
+               .byte $03               ;FB
+               .byte $03               ;FC
+               .byte $08               ;FD
+               .byte $08               ;FE
+               .byte $7E               ;FF
+;     
+;
+ModeByteCnt    .byte $02               ;0  opcode mode byte count
+               .byte $03               ;1
+               .byte $02               ;2
+               .byte $01               ;3
+               .byte $02               ;4
+               .byte $02               ;5
+               .byte $02               ;6
+               .byte $02               ;7
+               .byte $03               ;8
+               .byte $03               ;9
+               .byte $02               ;A
+               .byte $03               ;B
+               .byte $03               ;C
+               .byte $02               ;D
+               .byte $03               ;E
+               .byte $02               ;F 
+;     
+;
+ModeJmpTbl     .word IMM_mode          ;0  Operand print table
+               .word ABS_mode          ;1
+               .word ZP_mode           ;2
+               .word IMPLIED_mode      ;3
+               .word INDZP_X_mode      ;4
+               .word INDZP_Y_mode      ;5
+               .word ZP_X_mode         ;6
+               .word ZP_Y_mode         ;7
+               .word ABS_X_mode        ;8
+               .word ABS_Y_mode        ;9
+               .word REL_mode          ;a
+               .word INDABS_mode       ;b
+               .word INDABSX_mode      ;c
+               .word INDZP_mode        ;d
+		   .word BBREL_mode        ;e
+               .word ZP_mode           ;f  dup of ZP for RMB,SMB cmds
+;
+;
+Asm_ModeLst    .byte $28               ;0 IMM_mode
+               .byte $10               ;1 ABS_mode
+               .byte $08               ;2 ZP_mode
+               .byte $00               ;3 IMPLIED_mode
+               .byte $0E               ;4 INDZP_X_mode
+               .byte $0D               ;5 INDZP_Y_mode
+               .byte $0A               ;6 ZP_X_mode
+               .byte $09               ;7 ZP_Y_mode
+               .byte $12               ;8 ABS_X_mode
+               .byte $11               ;9 ABS_Y_mode
+               .byte $40               ;A REL_mode   Never set!!!
+               .byte $14               ;B INDABS_mode
+               .byte $16               ;C INDABSX_mode
+               .byte $0C               ;D INDZP_mode
+               .byte $D0               ;E BBREL_mode
+               .byte $88               ;F used for RMBx & SMBx 
+;
+;              
+OPCtxtData     .byte "ADC"             ;0
+               .byte "AND"             ;1
+               .byte "ASL"             ;2
+               .byte "BCC"             ;3
+               .byte "BCS"             ;4
+               .byte "BEQ"             ;5
+               .byte "BIT"             ;6
+               .byte "BMI"             ;7
+               .byte "BNE"             ;8
+               .byte "BPL"             ;9
+               .byte "BRA"             ;A
+               .byte "BRK"             ;B
+               .byte "BVC"             ;C
+               .byte "BVS"             ;D
+               .byte "CLC"             ;E
+               .byte "CLD"             ;F
+               .byte "CLI"             ;10
+               .byte "CLV"             ;11
+               .byte "CMP"             ;12
+               .byte "CPX"             ;13
+               .byte "CPY"             ;14
+               .byte "DEC"             ;15
+               .byte "DEX"             ;16
+               .byte "DEY"             ;17
+               .byte "EOR"             ;18
+               .byte "INC"             ;19
+               .byte "INX"             ;1A
+               .byte "INY"             ;1B
+               .byte "JMP"             ;1C
+               .byte "JSR"             ;1D
+               .byte "LDA"             ;1E
+               .byte "LDX"             ;1F
+               .byte "LDY"             ;20
+               .byte "LSR"             ;21
+               .byte "NOP"             ;22
+               .byte "ORA"             ;23
+               .byte "PHA"             ;24
+               .byte "PHP"             ;25
+               .byte "PHX"             ;26
+               .byte "PHY"             ;27
+               .byte "PLA"             ;28
+               .byte "PLP"             ;29
+               .byte "PLX"             ;2A
+               .byte "PLY"             ;2B
+               .byte "ROL"             ;2C
+               .byte "ROR"             ;2D
+               .byte "RTI"             ;2E
+               .byte "RTS"             ;2F
+               .byte "SBC"             ;30
+               .byte "SEC"             ;31
+               .byte "SED"             ;32
+               .byte "SEI"             ;33
+               .byte "STA"             ;34
+               .byte "STX"             ;35
+               .byte "STY"             ;36
+               .byte "STZ"             ;37
+               .byte "TAX"             ;38
+               .byte "TAY"             ;39
+               .byte "TRB"             ;3A
+               .byte "TSB"             ;3B
+               .byte "TSX"             ;3C
+               .byte "TXA"             ;3D
+               .byte "TXS"             ;3E
+               .byte "TYA"             ;3F
+               .byte "WAI"             ;40
+               .byte "STP"             ;41
+               .byte "BBR"             ;42 4Byte Opcodes
+               .byte "BBS"             ;43
+               .byte "RMB"             ;44
+               .byte "SMB"             ;45
+               .byte ".DB"             ;46 define 1 byte for assembler
+               .byte ".DW"             ;47 define 1 word for assembler
+               .byte ".DS"             ;48 define a string block for assembler
+               .byte "???"             ;49 for invalid opcode
+;
+;
+HelpTxt        .byte "~Current commands are :~"
+               .byte "Syntax = {} required, [] optional, HHHH hex address, DD hex data~"
+               .byte "~"
+               .byte "[HHHH][ HHHH]{Return} - Hex dump address(s)(up to 16 if no address entered)~"
+               .byte "[HHHH]{.HHHH}{Return} - Hex dump range of addresses (16 per line)~"
+               .byte "[HHHH]{:DD}[ DD]{Return} - Change data bytes~"
+               .byte "[HHHH]{G}{Return} - Execute a program (use RTS to return to monitor)~"
+               .byte "{HHHH.HHHH>HHHH{I}{Return} - move range at 2nd HHHH down to 1st to 3rd HHHH~"
+               .byte "[HHHH]{L}{Return} - List (disassemble) 20 lines of program~"
+               .byte "[HHHH]{.HHHH}{L}{Return} - Dissassemble a range~"
+               .byte "{HHHH.HHHH>HHHH{M}{Return} - Move range at 1st HHHH thru 2nd to 3rd HHHH~"
+               .byte "[HHHH][ HHHH]{Q}{Return} - Text dump address(s)~"
+               .byte "[HHHH]{.HHHH}{Q}{Return} - Text dump range of addresses (16 per line)~"
+               .byte "{R}{Return} - Print register contents from memory locations~"
+               .byte "{U}{Return} - Upload File (Xmodem/CRC or Intel Hex)~"
+               .byte "{V}{Return} - Monitor Version~"
+               .byte "{HHHH.HHHH>HHHH{W}{Return} - Write data in RAM to EEPROM~"
+               .byte "{!}{Return} - Enter Assembler~"
+               .byte "{@}{Return} - Cold-Start Enhanced Basic~"
+               .byte "{#}{Return} - Warm_Start Enhanced Basic~"
+               .byte "{$}{Return} - Start FIGForth~"
+               .byte "{%}{Return} - Start MicroChess~"
+               .byte "{?}{Return} - Print menu of commands~~"
+               .byte $00
+AsmHelpTxt     .byte "~Current commands are :~"
+               .byte "Syntax = {} required, [] optional~"
+               .byte "HHHH=hex address, OPC=Opcode, DD=hex data, '_'=Space Bar or Tab~"
+               .byte "'$' Symbols are optional, all values are HEX.~"
+               .byte "Any input after a 'semi-colon' is ignored.~"
+               .byte "~"
+               .byte "{HHHH}{Return} - Set input address~"
+               .byte "[HHHH][_]{OPC}[_][#($DD_HHHH,X),Y]{Return} - Assemble line~"
+               .byte "[HHHH]{L}{Return} - List (disassemble) 20 lines of program~"
+               .byte "{Return} - Exit Assembler back to Monitor~"
+               .byte "{?}{Return} - Print menu of commands~~"
+               .byte $00
+;
+Porttxt        .byte "65C02 Monitor v5.2 (6-28-13) Ready"
+               .byte  $0d, $0a
+               .byte "with Enhanced Basic Interpreter (c) Lee Davison," 
+               .byte  $0d, $0a
+               .byte "FIGForth, and MicroChess (c) Peter Jennings" 
+               .byte  $0d, $0a
+               .byte "(Press ? for help)"
+               .byte $00
+;
+; *** VERSION Notes ***
+; 3.5 added the text dump command, "q"
+; 4.0 reorganized structure, added RAM vectors for chrin, scan_in, and chrout
+; 4.1 fixed set time routine so 20-23 is correct    
+; 4.2 RST, IRQ, NMI, BRK all jmp ind to 02xx page to allow user prog to control
+; 4.3 added status register bits to printreg routine
+; 4.4 refined set time to reduce unneeded sec"s and branches, disp time added CR,
+;     and added zeromem to the reset routine, ensuring a reset starts fresh every time!
+;     continued to re-organize - moved monitor"s brk handler into mon area.
+; 4.5 nop out the jsr scan_input in the eeprom write routine to prevent BRK"s
+; 4.6 added version printout when entering assember to show ? prompt
+; 4.7 added Lee Davison's Enhanced Basic to ROM Image 
+; 4.9 Added all of the WDC opcodes to the disassembler and mini-assembler
+; 5.0 Added TAB key support to the input routine, expands tabs to spaces
+; 5.1 Added jump table at the start of the monitor to commonly used routines
+; 5.2 Added FIGForth and MicroChess
+;
+;end of file
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/TASS.EXE b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/TASS.EXE
new file mode 100644
index 00000000..1642c47f
Binary files /dev/null and b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/TASS.EXE differ
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/USART0.asm b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/USART0.asm
new file mode 100644
index 00000000..cd34d407
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/USART0.asm
@@ -0,0 +1,103 @@
+; ----------------- assembly instructions ---------------------------- 
+;
+; this is a subroutine library only
+; it must be included in an executable source file
+;
+;
+;*** I/O Locations *******************************
+; define the i/o address of the ACIA1 chip
+;*** 6551 CIA ************************
+UCSR0A       =     $3fc0
+UCSR0B       =     $3fc1
+UCSR0C       =     $3fc2
+UDR0         =     $3fc6
+;
+;***********************************************************************
+; 6551 I/O Support Routines
+;
+ACIA1_init     LDX   #<ACIA1_Input      ; set up RAM vectors for
+               LDA   #>ACIA1_Input      ; Input, Output, and Scan
+               TAY                     	; Routines
+               EOR   #$A5              	;
+               sta   ChrInVect+2       	;
+               sty   ChrInVect+1       	;
+               stx   ChrInVect         	;
+               LDX   #<ACIA1_Scan  	;
+               LDA   #>ACIA1_Scan       ;
+               TAY                     	;
+               EOR   #$A5              	;
+               sta   ScanInVect+2      	;
+               sty   ScanInVect+1      	;
+               stx   ScanInVect        	;
+               LDX   #<ACIA1_Output     ;
+               LDA   #>ACIA1_Output     ;
+               TAY                     	;
+               EOR   #$A5              	;
+               sta   ChrOutVect+2      	;
+               sty   ChrOutVect+1      	;
+               stx   ChrOutVect        	;
+               lda   #<ACIA1_scan      	; setup BASIC vectors
+               sta   VEC_IN
+	       lda   #>ACIA1_scan	; BASIC's chr input
+               sta   VEC_IN+1
+               lda   #<ACIA1_Output	
+               sta   VEC_OUT
+	       lda   #>ACIA1_Output	; BASIC's chr output 
+               sta   VEC_OUT+1
+	       lda   #<Psave
+               sta   VEC_SV
+	       lda   #>Psave		; SAVE cmd
+               sta   VEC_SV+1
+	       lda   #<pload
+               sta   VEC_LD
+	       lda   #>pload		; LOAD cmd
+               sta   VEC_LD+1
+               rts                      ; done
+;
+; input chr from ACIA1 (waiting)
+;
+cin
+ACIA1_Input
+               lda   UCSR0A             ; Serial port status             
+               and   #$80               ; RXC0 bit
+               beq   ACIA1_Input        ; no char to get
+               lda   UDR0               ; get chr
+               RTS                      ;
+;
+; non-waiting get character routine 
+;
+CSCAN
+ACIA1_Scan     clc
+               lda   UCSR0A             ; Serial port status             
+               and   #$80               ; RXC0 bit
+               beq   ACIA1_scan2
+               lda   UDR0               ; get chr	         
+               sec
+ACIA1_scan2    rts
+;
+; output to OutPut Port
+;
+cout
+ACIA1_Output   PHA                      ; save registers
+ACIA1_Out1     lda   UCSR0A             ; Serial port status             
+               and   #$20               ; UDRE0 bit
+               beq   ACIA1_Out1         ; no
+               PLA                      ; get chr
+               sta   UDR0               ; put character to Port
+               RTS                      ; done
+
+
+CROUT		lda	#$0d
+		jsr	cout
+		lda	#$0a
+		bra	cout
+
+cbrk		jsr	cscan
+		bcc	cbrk2
+		cmp	#$03
+		beq	cbrk2
+		clc
+cbrk2		rts	
+
+;
+;end of file
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/basic.asm b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/basic.asm
new file mode 100644
index 00000000..51c7eeea
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/basic.asm
@@ -0,0 +1,8698 @@
+
+; Enhanced BASIC to assemble under 6502 simulator, $ver 2.22
+
+; $E7E1 $E7CF $E7C6 $E7D3 $E7D1 $E7D5 $E7CF $E81E $E825
+
+; 2.00	new revision numbers start here
+; 2.01	fixed LCASE$() and UCASE$()
+; 2.02	new get value routine done
+; 2.03	changed RND() to galoise method
+; 2.04	fixed SPC()
+; 2.05	new get value routine fixed
+; 2.06	changed USR() code
+; 2.07	fixed STR$()
+; 2.08	changed INPUT and READ to remove need for $00 start to input buffer
+; 2.09	fixed RND()
+; 2.10	integrated missed changes from an earlier version
+; 2.20	added ELSE to IF .. THEN and fixed IF .. GOTO <statement> to cause error
+; 2.21	fixed IF .. THEN RETURN to not cause error
+; 2.22	fixed RND() breaking the get byte routine
+
+; zero page use ..
+
+LAB_WARM 		= $00		; BASIC warm start entry point
+Wrmjpl 		= LAB_WARM+1; BASIC warm start vector jump low byte
+Wrmjph 		= LAB_WARM+2; BASIC warm start vector jump high byte
+
+Usrjmp		= $0A		; USR function JMP address
+Usrjpl		= Usrjmp+1	; USR function JMP vector low byte
+Usrjph		= Usrjmp+2	; USR function JMP vector high byte
+Nullct		= $0D		; nulls output after each line
+TPos			= $0E		; BASIC terminal position byte
+TWidth		= $0F		; BASIC terminal width byte
+Iclim			= $10		; input column limit
+Itempl		= $11		; temporary integer low byte
+Itemph		= Itempl+1	; temporary integer high byte
+
+nums_1		= Itempl	; number to bin/hex string convert MSB
+nums_2		= nums_1+1	; number to bin/hex string convert
+nums_3		= nums_1+2	; number to bin/hex string convert LSB
+
+Srchc			= $5B		; search character
+Temp3			= Srchc	; temp byte used in number routines
+Scnquo		= $5C		; scan-between-quotes flag
+Asrch			= Scnquo	; alt search character
+
+XOAw_l		= Srchc	; eXclusive OR, OR and AND word low byte
+XOAw_h		= Scnquo	; eXclusive OR, OR and AND word high byte
+
+Ibptr			= $5D		; input buffer pointer
+Dimcnt		= Ibptr	; # of dimensions
+Tindx			= Ibptr	; token index
+
+Defdim		= $5E		; default DIM flag
+Dtypef		= $5F		; data type flag, $FF=string, $00=numeric
+Oquote		= $60		; open quote flag (b7) (Flag: DATA scan; LIST quote; memory)
+Gclctd		= $60		; garbage collected flag
+Sufnxf		= $61		; subscript/FNX flag, 1xxx xxx = FN(0xxx xxx)
+Imode			= $62		; input mode flag, $00=INPUT, $80=READ
+
+Cflag			= $63		; comparison evaluation flag
+
+TabSiz		= $64		; TAB step size (was input flag)
+
+next_s		= $65		; next descriptor stack address
+
+					; these two bytes form a word pointer to the item
+					; currently on top of the descriptor stack
+last_sl		= $66		; last descriptor stack address low byte
+last_sh		= $67		; last descriptor stack address high byte (always $00)
+
+des_sk		= $68		; descriptor stack start address (temp strings)
+
+;			= $70		; End of descriptor stack
+
+ut1_pl		= $71		; utility pointer 1 low byte
+ut1_ph		= ut1_pl+1	; utility pointer 1 high byte
+ut2_pl		= $73		; utility pointer 2 low byte
+ut2_ph		= ut2_pl+1	; utility pointer 2 high byte
+
+Temp_2		= ut1_pl	; temp byte for block move	
+
+FACt_1		= $75		; FAC temp mantissa1
+FACt_2		= FACt_1+1	; FAC temp mantissa2
+FACt_3		= FACt_2+1	; FAC temp mantissa3
+
+dims_l		= FACt_2	; array dimension size low byte
+dims_h		= FACt_3	; array dimension size high byte
+
+TempB			= $78		; temp page 0 byte
+
+Smeml			= $79		; start of mem low byte		(Start-of-Basic)
+Smemh			= Smeml+1	; start of mem high byte	(Start-of-Basic)
+Svarl			= $7B		; start of vars low byte	(Start-of-Variables)
+Svarh			= Svarl+1	; start of vars high byte	(Start-of-Variables)
+Sarryl		= $7D		; var mem end low byte		(Start-of-Arrays)
+Sarryh		= Sarryl+1	; var mem end high byte		(Start-of-Arrays)
+Earryl		= $7F		; array mem end low byte	(End-of-Arrays)
+Earryh		= Earryl+1	; array mem end high byte	(End-of-Arrays)
+Sstorl		= $81		; string storage low byte	(String storage (moving down))
+Sstorh		= Sstorl+1	; string storage high byte	(String storage (moving down))
+Sutill		= $83		; string utility ptr low byte
+Sutilh		= Sutill+1	; string utility ptr high byte
+Ememl			= $85		; end of mem low byte		(Limit-of-memory)
+Ememh			= Ememl+1	; end of mem high byte		(Limit-of-memory)
+Clinel		= $87		; current line low byte		(Basic line number)
+Clineh		= Clinel+1	; current line high byte	(Basic line number)
+Blinel		= $89		; break line low byte		(Previous Basic line number)
+Blineh		= Blinel+1	; break line high byte		(Previous Basic line number)
+
+Cpntrl		= $8B		; continue pointer low byte
+Cpntrh		= Cpntrl+1	; continue pointer high byte
+
+Dlinel		= $8D		; current DATA line low byte
+Dlineh		= Dlinel+1	; current DATA line high byte
+
+Dptrl			= $8F		; DATA pointer low byte
+Dptrh			= Dptrl+1	; DATA pointer high byte
+
+Rdptrl		= $91		; read pointer low byte
+Rdptrh		= Rdptrl+1	; read pointer high byte
+
+Varnm1		= $93		; current var name 1st byte
+Varnm2		= Varnm1+1	; current var name 2nd byte
+
+Cvaral		= $95		; current var address low byte
+Cvarah		= Cvaral+1	; current var address high byte
+
+Frnxtl		= $97		; var pointer for FOR/NEXT low byte
+Frnxth		= Frnxtl+1	; var pointer for FOR/NEXT high byte
+
+Tidx1			= Frnxtl	; temp line index
+
+Lvarpl		= Frnxtl	; let var pointer low byte
+Lvarph		= Frnxth	; let var pointer high byte
+
+prstk			= $99		; precedence stacked flag
+
+comp_f		= $9B		; compare function flag, bits 0,1 and 2 used
+					; bit 2 set if >
+					; bit 1 set if =
+					; bit 0 set if <
+
+func_l		= $9C		; function pointer low byte
+func_h		= func_l+1	; function pointer high byte
+
+garb_l		= func_l	; garbage collection working pointer low byte
+garb_h		= func_h	; garbage collection working pointer high byte
+
+des_2l		= $9E		; string descriptor_2 pointer low byte
+des_2h		= des_2l+1	; string descriptor_2 pointer high byte
+
+g_step		= $A0		; garbage collect step size
+
+Fnxjmp		= $A1		; jump vector for functions
+Fnxjpl		= Fnxjmp+1	; functions jump vector low byte
+Fnxjph		= Fnxjmp+2	; functions jump vector high byte
+
+g_indx		= Fnxjpl	; garbage collect temp index
+
+FAC2_r		= $A3		; FAC2 rounding byte
+
+Adatal		= $A4		; array data pointer low byte
+Adatah		= Adatal+1	; array data pointer high  byte
+
+Nbendl		= Adatal	; new block end pointer low byte
+Nbendh		= Adatah	; new block end pointer high  byte
+
+Obendl		= $A6		; old block end pointer low byte
+Obendh		= Obendl+1	; old block end pointer high  byte
+
+numexp		= $A8		; string to float number exponent count
+expcnt		= $A9		; string to float exponent count
+
+numbit		= numexp	; bit count for array element calculations
+
+numdpf		= $AA		; string to float decimal point flag
+expneg		= $AB		; string to float eval exponent -ve flag
+
+Astrtl		= numdpf	; array start pointer low byte
+Astrth		= expneg	; array start pointer high  byte
+
+Histrl		= numdpf	; highest string low byte
+Histrh		= expneg	; highest string high  byte
+
+Baslnl		= numdpf	; BASIC search line pointer low byte
+Baslnh		= expneg	; BASIC search line pointer high  byte
+
+Fvar_l		= numdpf	; find/found variable pointer low byte
+Fvar_h		= expneg	; find/found variable pointer high  byte
+
+Ostrtl		= numdpf	; old block start pointer low byte
+Ostrth		= expneg	; old block start pointer high  byte
+
+Vrschl		= numdpf	; variable search pointer low byte
+Vrschh		= expneg	; variable search pointer high  byte
+
+FAC1_e		= $AC		; FAC1 exponent
+FAC1_1		= FAC1_e+1	; FAC1 mantissa1
+FAC1_2		= FAC1_e+2	; FAC1 mantissa2
+FAC1_3		= FAC1_e+3	; FAC1 mantissa3
+FAC1_s		= FAC1_e+4	; FAC1 sign (b7)
+
+str_ln		= FAC1_e	; string length
+str_pl		= FAC1_1	; string pointer low byte
+str_ph		= FAC1_2	; string pointer high byte
+
+des_pl		= FAC1_2	; string descriptor pointer low byte
+des_ph		= FAC1_3	; string descriptor pointer high byte
+
+mids_l		= FAC1_3	; MID$ string temp length byte
+
+negnum		= $B1		; string to float eval -ve flag
+numcon		= $B1		; series evaluation constant count
+
+FAC1_o		= $B2		; FAC1 overflow byte
+
+FAC2_e		= $B3		; FAC2 exponent
+FAC2_1		= FAC2_e+1	; FAC2 mantissa1
+FAC2_2		= FAC2_e+2	; FAC2 mantissa2
+FAC2_3		= FAC2_e+3	; FAC2 mantissa3
+FAC2_s		= FAC2_e+4	; FAC2 sign (b7)
+
+FAC_sc		= $B8		; FAC sign comparison, Acc#1 vs #2
+FAC1_r		= $B9		; FAC1 rounding byte
+
+ssptr_l		= FAC_sc	; string start pointer low byte
+ssptr_h		= FAC1_r	; string start pointer high byte
+
+sdescr		= FAC_sc	; string descriptor pointer
+
+csidx			= $BA		; line crunch save index
+Asptl			= csidx	; array size/pointer low byte
+Aspth			= $BB		; array size/pointer high byte
+
+Btmpl			= Asptl	; BASIC pointer temp low byte
+Btmph			= Aspth	; BASIC pointer temp low byte
+
+Cptrl			= Asptl	; BASIC pointer temp low byte
+Cptrh			= Aspth	; BASIC pointer temp low byte
+
+Sendl			= Asptl	; BASIC pointer temp low byte
+Sendh			= Aspth	; BASIC pointer temp low byte
+
+LAB_IGBY		= $BC		; get next BASIC byte subroutine
+
+LAB_GBYT		= $C2		; get current BASIC byte subroutine
+Bpntrl		= $C3		; BASIC execute (get byte) pointer low byte
+Bpntrh		= Bpntrl+1	; BASIC execute (get byte) pointer high byte
+
+;			= $D7		; end of get BASIC char subroutine
+
+Rbyte4		= $D8		; extra PRNG byte
+Rbyte1		= Rbyte4+1	; most significant PRNG byte
+Rbyte2		= Rbyte4+2	; middle PRNG byte
+Rbyte3		= Rbyte4+3	; least significant PRNG byte
+
+NmiBase		= $DC		; NMI handler enabled/setup/triggered flags
+					; bit	function
+					; ===	========
+					; 7	interrupt enabled
+					; 6	interrupt setup
+					; 5	interrupt happened
+;			= $DD		; NMI handler addr low byte
+;			= $DE		; NMI handler addr high byte
+IrqBase		= $DF		; IRQ handler enabled/setup/triggered flags
+;			= $E0		; IRQ handler addr low byte
+;			= $E1		; IRQ handler addr high byte
+
+;			= $DE		; unused
+;			= $DF		; unused
+;			= $E0		; unused
+;			= $E1		; unused
+;			= $E2		; unused
+;			= $E3		; unused
+;			= $E4		; unused
+;			= $E5		; unused
+;			= $E6		; unused
+;			= $E7		; unused
+;			= $E8		; unused
+;			= $E9		; unused
+;			= $EA		; unused
+;			= $EB		; unused
+;			= $EC		; unused
+;			= $ED		; unused
+;			= $EE		; unused
+
+Decss			= $EF		; number to decimal string start
+Decssp1		= Decss+1	; number to decimal string start
+
+;			= $FF		; decimal string end
+
+; token values needed for BASIC
+
+; primary command tokens (can start a statement)
+
+TK_END		= $80			; END token
+TK_FOR		= TK_END+1		; FOR token
+TK_NEXT		= TK_FOR+1		; NEXT token
+TK_DATA		= TK_NEXT+1		; DATA token
+TK_INPUT		= TK_DATA+1		; INPUT token
+TK_DIM		= TK_INPUT+1	; DIM token
+TK_READ		= TK_DIM+1		; READ token
+TK_LET		= TK_READ+1		; LET token
+TK_DEC		= TK_LET+1		; DEC token
+TK_GOTO		= TK_DEC+1		; GOTO token
+TK_RUN		= TK_GOTO+1		; RUN token
+TK_IF			= TK_RUN+1		; IF token
+TK_RESTORE		= TK_IF+1		; RESTORE token
+TK_GOSUB		= TK_RESTORE+1	; GOSUB token
+TK_RETIRQ		= TK_GOSUB+1	; RETIRQ token
+TK_RETNMI		= TK_RETIRQ+1	; RETNMI token
+TK_RETURN		= TK_RETNMI+1	; RETURN token
+TK_REM		= TK_RETURN+1	; REM token
+TK_STOP		= TK_REM+1		; STOP token
+TK_ON			= TK_STOP+1		; ON token
+TK_NULL		= TK_ON+1		; NULL token
+TK_INC		= TK_NULL+1		; INC token
+TK_WAIT		= TK_INC+1		; WAIT token
+TK_LOAD		= TK_WAIT+1		; LOAD token
+TK_SAVE		= TK_LOAD+1		; SAVE token
+TK_DEF		= TK_SAVE+1		; DEF token
+TK_POKE		= TK_DEF+1		; POKE token
+TK_DOKE		= TK_POKE+1		; DOKE token
+TK_CALL		= TK_DOKE+1		; CALL token
+TK_DO			= TK_CALL+1		; DO token
+TK_LOOP		= TK_DO+1		; LOOP token
+TK_PRINT		= TK_LOOP+1		; PRINT token
+TK_CONT		= TK_PRINT+1	; CONT token
+TK_LIST		= TK_CONT+1		; LIST token
+TK_CLEAR		= TK_LIST+1		; CLEAR token
+TK_NEW		= TK_CLEAR+1	; NEW token
+TK_WIDTH		= TK_NEW+1		; WIDTH token
+TK_GET		= TK_WIDTH+1	; GET token
+TK_SWAP		= TK_GET+1		; SWAP token
+TK_BITSET		= TK_SWAP+1		; BITSET token
+TK_BITCLR		= TK_BITSET+1	; BITCLR token
+TK_IRQ		= TK_BITCLR+1	; IRQ token
+TK_NMI		= TK_IRQ+1		; NMI token
+TK_SYS          = TK_NMI+1              ; SYS token *** added for SBC-2
+
+; secondary command tokens, can't start a statement
+
+TK_TAB		= TK_SYS+1		; TAB token
+TK_ELSE		= TK_TAB+1		; ELSE token
+TK_TO			= TK_ELSE+1		; TO token
+TK_FN			= TK_TO+1		; FN token
+TK_SPC		= TK_FN+1		; SPC token
+TK_THEN		= TK_SPC+1		; THEN token
+TK_NOT		= TK_THEN+1		; NOT token
+TK_STEP		= TK_NOT+1		; STEP token
+TK_UNTIL		= TK_STEP+1		; UNTIL token
+TK_WHILE		= TK_UNTIL+1	; WHILE token
+TK_OFF		= TK_WHILE+1	; OFF token
+
+; opperator tokens
+
+TK_PLUS		= TK_OFF+1		; + token
+TK_MINUS		= TK_PLUS+1		; - token
+TK_MUL		= TK_MINUS+1	; * token
+TK_DIV		= TK_MUL+1		; / token
+TK_POWER		= TK_DIV+1		; ^ token
+TK_AND		= TK_POWER+1	; AND token
+TK_EOR		= TK_AND+1		; EOR token
+TK_OR			= TK_EOR+1		; OR token
+TK_RSHIFT		= TK_OR+1		; RSHIFT token
+TK_LSHIFT		= TK_RSHIFT+1	; LSHIFT token
+TK_GT			= TK_LSHIFT+1	; > token
+TK_EQUAL		= TK_GT+1		; = token
+TK_LT			= TK_EQUAL+1	; < token
+
+; functions tokens
+
+TK_SGN		= TK_LT+1		; SGN token
+TK_INT		= TK_SGN+1		; INT token
+TK_ABS		= TK_INT+1		; ABS token
+TK_USR		= TK_ABS+1		; USR token
+TK_FRE		= TK_USR+1		; FRE token
+TK_POS		= TK_FRE+1		; POS token
+TK_SQR		= TK_POS+1		; SQR token
+TK_RND		= TK_SQR+1		; RND token
+TK_LOG		= TK_RND+1		; LOG token
+TK_EXP		= TK_LOG+1		; EXP token
+TK_COS		= TK_EXP+1		; COS token
+TK_SIN		= TK_COS+1		; SIN token
+TK_TAN		= TK_SIN+1		; TAN token
+TK_ATN		= TK_TAN+1		; ATN token
+TK_PEEK		= TK_ATN+1		; PEEK token
+TK_DEEK		= TK_PEEK+1		; DEEK token
+TK_SADD		= TK_DEEK+1		; SADD token
+TK_LEN		= TK_SADD+1		; LEN token
+TK_STRS		= TK_LEN+1		; STR$ token
+TK_VAL		= TK_STRS+1		; VAL token
+TK_ASC		= TK_VAL+1		; ASC token
+TK_UCASES		= TK_ASC+1		; UCASE$ token
+TK_LCASES		= TK_UCASES+1	; LCASE$ token
+TK_CHRS		= TK_LCASES+1	; CHR$ token
+TK_HEXS		= TK_CHRS+1		; HEX$ token
+TK_BINS		= TK_HEXS+1		; BIN$ token
+TK_BITTST		= TK_BINS+1		; BITTST token
+TK_MAX		= TK_BITTST+1	; MAX token
+TK_MIN		= TK_MAX+1		; MIN token
+TK_PI			= TK_MIN+1		; PI token
+TK_TWOPI		= TK_PI+1		; TWOPI token
+TK_VPTR		= TK_TWOPI+1	; VARPTR token
+TK_LEFTS		= TK_VPTR+1		; LEFT$ token
+TK_RIGHTS		= TK_LEFTS+1	; RIGHT$ token
+TK_MIDS		= TK_RIGHTS+1	; MID$ token
+
+; offsets from a base of X or Y
+
+PLUS_0		= $00		; X or Y plus 0
+PLUS_1		= $01		; X or Y plus 1
+PLUS_2		= $02		; X or Y plus 2
+PLUS_3		= $03		; X or Y plus 3
+
+LAB_STAK		= $0100	; stack bottom, no offset
+
+LAB_SKFE		= LAB_STAK+$FE
+					; flushed stack address
+LAB_SKFF		= LAB_STAK+$FF
+					; flushed stack address
+
+ccflag		= $0400	; BASIC CTRL-C flag, 00 = enabled, 01 = dis
+ccbyte		= ccflag+1	; BASIC CTRL-C byte
+ccnull		= ccbyte+1	; BASIC CTRL-C byte timeout
+
+VEC_CC		= ccnull+1	; ctrl c check vector
+
+VEC_IN		= VEC_CC+2	; input vector
+VEC_OUT		= VEC_IN+2	; output vector
+VEC_LD		= VEC_OUT+2	; load vector
+VEC_SV		= VEC_LD+2	; save vector
+
+; Ibuffs can now be anywhere in RAM, ensure that the max length is < $80
+
+Ibuffs		= VEC_SV+2      ; ***changed for SBC-2
+					; start of input buffer after IRQ/NMI code
+Ibuffe		= Ibuffs+$47; end of input buffer
+
+Ram_base		= $0500	; start of user RAM (set as needed, should be page aligned)
+Ram_top		= $3f00	; end of user RAM+1 (set as needed, should be page aligned)
+
+; This start can be changed to suit your system
+
+	*=	$BE00
+
+; BASIC cold start entry point
+
+; new page 2 initialisation, copy block to ccflag on
+
+LAB_COLD
+	LDY	#PG2_TABE-PG2_TABS-1
+					; byte count-1
+LAB_2D13
+	LDA	PG2_TABS,Y		; get byte
+	STA	ccflag,Y		; store in page 2
+	DEY				; decrement count
+	BPL	LAB_2D13		; loop if not done
+
+	LDX	#$FF			; set byte
+	STX	Clineh		; set current line high byte (set immediate mode)
+	TXS				; reset stack pointer
+
+	LDA	#$4C			; code for JMP
+	STA	Fnxjmp		; save for jump vector for functions
+
+; copy block from LAB_2CEE to $00BC - $00D3
+
+	LDX	#StrTab-LAB_2CEE	; set byte count
+LAB_2D4E
+	LDA	LAB_2CEE-1,X	; get byte from table
+	STA	LAB_IGBY-1,X	; save byte in page zero
+	DEX				; decrement count
+	BNE	LAB_2D4E		; loop if not all done
+
+; copy block from StrTab to $0000 - $0012
+
+LAB_GMEM
+	LDX	#EndTab-StrTab-1	; set byte count-1
+TabLoop
+	LDA	StrTab,X		; get byte from table
+	STA	PLUS_0,X		; save byte in page zero
+	DEX				; decrement count
+	BPL	TabLoop		; loop if not all done
+
+; set-up start values
+
+	LDA	#$00			; clear A
+	STA	NmiBase		; clear NMI handler enabled flag
+	STA	IrqBase		; clear IRQ handler enabled flag
+	STA	FAC1_o		; clear FAC1 overflow byte
+	STA	last_sh		; clear descriptor stack top item pointer high byte
+
+	LDA	#$0E			; set default tab size
+	STA	TabSiz		; save it
+	LDA	#$03			; set garbage collect step size for descriptor stack
+	STA	g_step		; save it
+	LDX	#des_sk		; descriptor stack start
+	STX	next_s		; set descriptor stack pointer
+	JSR	LAB_CRLF		; print CR/LF
+	LDA	#<LAB_MSZM		; point to memory size message (low addr)
+	LDY	#>LAB_MSZM		; point to memory size message (high addr)
+	JSR	LAB_18C3		; print null terminated string from memory
+	JSR	LAB_INLN		; print "? " and get BASIC input
+	STX	Bpntrl		; set BASIC execute pointer low byte
+	STY	Bpntrh		; set BASIC execute pointer high byte
+	JSR	LAB_GBYT		; get last byte back
+
+	BNE	LAB_2DAA		; branch if not null (user typed something)
+
+	LDY	#$00			; else clear Y
+					; character was null so get memory size the hard way
+					; we get here with Y=0 and Itempl/h = Ram_base
+LAB_2D93
+	INC	Itempl		; increment temporary integer low byte
+	BNE	LAB_2D99		; branch if no overflow
+
+	INC	Itemph		; increment temporary integer high byte
+	LDA	Itemph		; get high byte
+	CMP	#>Ram_top		; compare with top of RAM+1
+	BEQ	LAB_2DB6		; branch if match (end of user RAM)
+
+LAB_2D99
+	LDA	#$55			; set test byte
+	STA	(Itempl),Y		; save via temporary integer
+	CMP	(Itempl),Y		; compare via temporary integer
+	BNE	LAB_2DB6		; branch if fail
+
+	ASL				; shift test byte left (now $AA)
+	STA	(Itempl),Y		; save via temporary integer
+	CMP	(Itempl),Y		; compare via temporary integer
+	BEQ	LAB_2D93		; if ok go do next byte
+
+	BNE	LAB_2DB6		; branch if fail
+
+LAB_2DAA
+	JSR	LAB_2887		; get FAC1 from string
+	LDA	FAC1_e		; get FAC1 exponent
+	CMP	#$98			; compare with exponent = 2^24
+	BCS	LAB_GMEM		; if too large go try again
+
+	JSR	LAB_F2FU		; save integer part of FAC1 in temporary integer
+					; (no range check)
+
+LAB_2DB6
+	LDA	Itempl		; get temporary integer low byte
+	LDY	Itemph		; get temporary integer high byte
+	CPY	#<Ram_base+1	; compare with start of RAM+$100 high byte
+	BCC	LAB_GMEM		; if too small go try again
+
+
+; uncomment these lines if you want to check on the high limit of memory. Note if
+; Ram_top is set too low then this will fail. default is ignore it and assume the
+; users know what they"re doing!
+
+;	CPY	#>Ram_top		; compare with top of RAM high byte
+;	BCC	MEM_OK		; branch if < RAM top
+
+;	BNE	LAB_GMEM		; if too large go try again
+					; else was = so compare low bytes
+;	CMP	#<Ram_top		; compare with top of RAM low byte
+;	BEQ	MEM_OK		; branch if = RAM top
+
+;	BCS	LAB_GMEM		; if too large go try again
+
+;MEM_OK
+	STA	Ememl			; set end of mem low byte
+	STY	Ememh			; set end of mem high byte
+	STA	Sstorl		; set bottom of string space low byte
+	STY	Sstorh		; set bottom of string space high byte
+
+	LDY	#<Ram_base		; set start addr low byte
+	LDX	#>Ram_base		; set start addr high byte
+	STY	Smeml			; save start of mem low byte
+	STX	Smemh			; save start of mem high byte
+
+; this line is only needed if Ram_base is not $xx00
+
+;	LDY	#$00			; clear Y
+	TYA				; clear A
+	STA	(Smeml),Y		; clear first byte
+	INC	Smeml			; increment start of mem low byte
+
+; these two lines are only needed if Ram_base is $xxFF
+
+;	BNE	LAB_2E05		; branch if no rollover
+
+;	INC	Smemh			; increment start of mem high byte
+LAB_2E05
+	JSR	LAB_CRLF		; print CR/LF
+	JSR	LAB_1463		; do "NEW" and "CLEAR"
+	LDA	Ememl			; get end of mem low byte
+	SEC				; set carry for subtract
+	SBC	Smeml			; subtract start of mem low byte
+	TAX				; copy to X
+	LDA	Ememh			; get end of mem high byte
+	SBC	Smemh			; subtract start of mem high byte
+	JSR	LAB_295E		; print XA as unsigned integer (bytes free)
+	LDA	#<LAB_SMSG		; point to sign-on message (low addr)
+	LDY	#>LAB_SMSG		; point to sign-on message (high addr)
+	JSR	LAB_18C3		; print null terminated string from memory
+	LDA	#<LAB_1274		; warm start vector low byte
+	LDY	#>LAB_1274		; warm start vector high byte
+	STA	Wrmjpl		; save warm start vector low byte
+	STY	Wrmjph		; save warm start vector high byte
+	JMP	(Wrmjpl)		; go do warm start
+
+; open up space in memory
+; move (Ostrtl)-(Obendl) to new block ending at (Nbendl)
+
+; Nbendl,Nbendh - new block end address (A/Y)
+; Obendl,Obendh - old block end address
+; Ostrtl,Ostrth - old block start address
+
+; returns with ..
+
+; Nbendl,Nbendh - new block start address (high byte - $100)
+; Obendl,Obendh - old block start address (high byte - $100)
+; Ostrtl,Ostrth - old block start address (unchanged)
+
+LAB_11CF
+	JSR	LAB_121F		; check available memory, "Out of memory" error if no room
+					; addr to check is in AY (low/high)
+	STA	Earryl		; save new array mem end low byte
+	STY	Earryh		; save new array mem end high byte
+
+; open up space in memory
+; move (Ostrtl)-(Obendl) to new block ending at (Nbendl)
+; don't set array end
+
+LAB_11D6
+	SEC				; set carry for subtract
+	LDA	Obendl		; get block end low byte
+	SBC	Ostrtl		; subtract block start low byte
+	TAY				; copy MOD(block length/$100) byte to Y
+	LDA	Obendh		; get block end high byte
+	SBC	Ostrth		; subtract block start high byte
+	TAX				; copy block length high byte to X
+	INX				; +1 to allow for count=0 exit
+	TYA				; copy block length low byte to A
+	BEQ	LAB_120A		; branch if length low byte=0
+
+					; block is (X-1)*256+Y bytes, do the Y bytes first
+
+	SEC				; set carry for add + 1, two's complement
+	EOR	#$FF			; invert low byte for subtract
+	ADC	Obendl		; add block end low byte
+
+	STA	Obendl		; save corrected old block end low byte
+	BCS	LAB_11F3		; branch if no underflow
+
+	DEC	Obendh		; else decrement block end high byte
+	SEC				; set carry for add + 1, two's complement
+LAB_11F3
+	TYA				; get MOD(block length/$100) byte
+	EOR	#$FF			; invert low byte for subtract
+	ADC	Nbendl		; add destination end low byte
+	STA	Nbendl		; save modified new block end low byte
+	BCS	LAB_1203		; branch if no underflow
+
+	DEC	Nbendh		; else decrement block end high byte
+	BCC	LAB_1203		; branch always
+
+LAB_11FF
+	LDA	(Obendl),Y		; get byte from source
+	STA	(Nbendl),Y		; copy byte to destination
+LAB_1203
+	DEY				; decrement index
+	BNE	LAB_11FF		; loop until Y=0
+
+					; now do Y=0 indexed byte
+	LDA	(Obendl),Y		; get byte from source
+	STA	(Nbendl),Y		; save byte to destination
+LAB_120A
+	DEC	Obendh		; decrement source pointer high byte
+	DEC	Nbendh		; decrement destination pointer high byte
+	DEX				; decrement block count
+	BNE	LAB_1203		; loop until count = $0
+
+	RTS
+
+; check room on stack for A bytes
+; stack too deep? do OM error
+
+LAB_1212
+	STA	TempB			; save result in temp byte
+	TSX				; copy stack
+	CPX	TempB			; compare new "limit" with stack
+	BCC	LAB_OMER		; if stack < limit do "Out of memory" error then warm start
+
+	RTS
+
+; check available memory, "Out of memory" error if no room
+; addr to check is in AY (low/high)
+
+LAB_121F
+	CPY	Sstorh		; compare bottom of string mem high byte
+	BCC	LAB_124B		; if less then exit (is ok)
+
+	BNE	LAB_1229		; skip next test if greater (tested <)
+
+					; high byte was =, now do low byte
+	CMP	Sstorl		; compare with bottom of string mem low byte
+	BCC	LAB_124B		; if less then exit (is ok)
+
+					; addr is > string storage ptr (oops!)
+LAB_1229
+	PHA				; push addr low byte
+	LDX	#$08			; set index to save Adatal to expneg inclusive
+	TYA				; copy addr high byte (to push on stack)
+
+					; save misc numeric work area
+LAB_122D
+	PHA				; push byte
+	LDA	Adatal-1,X		; get byte from Adatal to expneg ( ,$00 not pushed)
+	DEX				; decrement index
+	BPL	LAB_122D		; loop until all done
+
+	JSR	LAB_GARB		; garbage collection routine
+
+					; restore misc numeric work area
+	LDX	#$00			; clear the index to restore bytes
+LAB_1238
+	PLA				; pop byte
+	STA	Adatal,X		; save byte to Adatal to expneg
+	INX				; increment index
+	CPX	#$08			; compare with end + 1
+	BMI	LAB_1238		; loop if more to do
+
+	PLA				; pop addr high byte
+	TAY				; copy back to Y
+	PLA				; pop addr low byte
+	CPY	Sstorh		; compare bottom of string mem high byte
+	BCC	LAB_124B		; if less then exit (is ok)
+
+	BNE	LAB_OMER		; if greater do "Out of memory" error then warm start
+
+					; high byte was =, now do low byte
+	CMP	Sstorl		; compare with bottom of string mem low byte
+	BCS	LAB_OMER		; if >= do "Out of memory" error then warm start
+
+					; ok exit, carry clear
+LAB_124B
+	RTS
+
+; do "Out of memory" error then warm start
+
+LAB_OMER
+	LDX	#$0C			; error code $0C ("Out of memory" error)
+
+; do error #X, then warm start
+
+LAB_XERR
+	JSR	LAB_CRLF		; print CR/LF
+
+	LDA	LAB_BAER,X		; get error message pointer low byte
+	LDY	LAB_BAER+1,X	; get error message pointer high byte
+	JSR	LAB_18C3		; print null terminated string from memory
+
+	JSR	LAB_1491		; flush stack and clear continue flag
+	LDA	#<LAB_EMSG		; point to " Error" low addr
+	LDY	#>LAB_EMSG		; point to " Error" high addr
+LAB_1269
+	JSR	LAB_18C3		; print null terminated string from memory
+	LDY	Clineh		; get current line high byte
+	INY				; increment it
+	BEQ	LAB_1274		; go do warm start (was immediate mode)
+
+					; else print line number
+	JSR	LAB_2953		; print " in line [LINE #]"
+
+; BASIC warm start entry point
+; wait for Basic command
+
+LAB_1274
+					; clear ON IRQ/NMI bytes
+	LDA	#$00			; clear A
+	STA	IrqBase		; clear enabled byte
+	STA	NmiBase		; clear enabled byte
+	LDA	#<LAB_RMSG		; point to "Ready" message low byte
+	LDY	#>LAB_RMSG		; point to "Ready" message high byte
+
+	JSR	LAB_18C3		; go do print string
+
+; wait for Basic command (no "Ready")
+
+LAB_127D
+	JSR	LAB_1357		; call for BASIC input
+LAB_1280
+	STX	Bpntrl		; set BASIC execute pointer low byte
+	STY	Bpntrh		; set BASIC execute pointer high byte
+	JSR	LAB_GBYT		; scan memory
+	BEQ	LAB_127D		; loop while null
+
+; got to interpret input line now ..
+
+	LDX	#$FF			; current line to null value
+	STX	Clineh		; set current line high byte
+	BCC	LAB_1295		; branch if numeric character (handle new BASIC line)
+
+					; no line number .. immediate mode
+	JSR	LAB_13A6		; crunch keywords into Basic tokens
+	JMP	LAB_15F6		; go scan and interpret code
+
+; handle new BASIC line
+
+LAB_1295
+	JSR	LAB_GFPN		; get fixed-point number into temp integer
+	JSR	LAB_13A6		; crunch keywords into Basic tokens
+	STY	Ibptr			; save index pointer to end of crunched line
+	JSR	LAB_SSLN		; search BASIC for temp integer line number
+	BCC	LAB_12E6		; branch if not found
+
+					; aroooogah! line # already exists! delete it
+	LDY	#$01			; set index to next line pointer high byte
+	LDA	(Baslnl),Y		; get next line pointer high byte
+	STA	ut1_ph		; save it
+	LDA	Svarl			; get start of vars low byte
+	STA	ut1_pl		; save it
+	LDA	Baslnh		; get found line pointer high byte
+	STA	ut2_ph		; save it
+	LDA	Baslnl		; get found line pointer low byte
+	DEY				; decrement index
+	SBC	(Baslnl),Y		; subtract next line pointer low byte
+	CLC				; clear carry for add
+	ADC	Svarl			; add start of vars low byte
+	STA	Svarl			; save new start of vars low byte
+	STA	ut2_pl		; save destination pointer low byte
+	LDA	Svarh			; get start of vars high byte
+	ADC	#$FF			; -1 + carry
+	STA	Svarh			; save start of vars high byte
+	SBC	Baslnh		; subtract found line pointer high byte
+	TAX				; copy to block count
+	SEC				; set carry for subtract
+	LDA	Baslnl		; get found line pointer low byte
+	SBC	Svarl			; subtract start of vars low byte
+	TAY				; copy to bytes in first block count
+	BCS	LAB_12D0		; branch if overflow
+
+	INX				; increment block count (correct for =0 loop exit)
+	DEC	ut2_ph		; decrement destination high byte
+LAB_12D0
+	CLC				; clear carry for add
+	ADC	ut1_pl		; add source pointer low byte
+	BCC	LAB_12D8		; branch if no overflow
+
+	DEC	ut1_ph		; else decrement source pointer high byte
+	CLC				; clear carry
+
+					; close up memory to delete old line
+LAB_12D8
+	LDA	(ut1_pl),Y		; get byte from source
+	STA	(ut2_pl),Y		; copy to destination
+	INY				; increment index
+	BNE	LAB_12D8		; while <> 0 do this block
+
+	INC	ut1_ph		; increment source pointer high byte
+	INC	ut2_ph		; increment destination pointer high byte
+	DEX				; decrement block count
+	BNE	LAB_12D8		; loop until all done
+
+					; got new line in buffer and no existing same #
+LAB_12E6
+	LDA	Ibuffs		; get byte from start of input buffer
+	BEQ	LAB_1319		; if null line just go flush stack/vars and exit
+
+					; got new line and it isn't empty line
+	LDA	Ememl			; get end of mem low byte
+	LDY	Ememh			; get end of mem high byte
+	STA	Sstorl		; set bottom of string space low byte
+	STY	Sstorh		; set bottom of string space high byte
+	LDA	Svarl			; get start of vars low byte	(end of BASIC)
+	STA	Obendl		; save old block end low byte
+	LDY	Svarh			; get start of vars high byte	(end of BASIC)
+	STY	Obendh		; save old block end high byte
+	ADC	Ibptr			; add input buffer pointer	(also buffer length)
+	BCC	LAB_1301		; branch if no overflow from add
+
+	INY				; else increment high byte
+LAB_1301
+	STA	Nbendl		; save new block end low byte	(move to, low byte)
+	STY	Nbendh		; save new block end high byte
+	JSR	LAB_11CF		; open up space in memory
+					; old start pointer Ostrtl,Ostrth set by the find line call
+	LDA	Earryl		; get array mem end low byte
+	LDY	Earryh		; get array mem end high byte
+	STA	Svarl			; save start of vars low byte
+	STY	Svarh			; save start of vars high byte
+	LDY	Ibptr			; get input buffer pointer	(also buffer length)
+	DEY				; adjust for loop type
+LAB_1311
+	LDA	Ibuffs-4,Y		; get byte from crunched line
+	STA	(Baslnl),Y		; save it to program memory
+	DEY				; decrement count
+	CPY	#$03			; compare with first byte-1
+	BNE	LAB_1311		; continue while count <> 3
+
+	LDA	Itemph		; get line # high byte
+	STA	(Baslnl),Y		; save it to program memory
+	DEY				; decrement count
+	LDA	Itempl		; get line # low byte
+	STA	(Baslnl),Y		; save it to program memory
+	DEY				; decrement count
+	LDA	#$FF			; set byte to allow chain rebuild. if you didn't set this
+					; byte then a zero already here would stop the chain rebuild
+					; as it would think it was the [EOT] marker.
+	STA	(Baslnl),Y		; save it to program memory
+
+LAB_1319
+	JSR	LAB_1477		; reset execution to start, clear vars and flush stack
+	LDX	Smeml			; get start of mem low byte
+	LDA	Smemh			; get start of mem high byte
+	LDY	#$01			; index to high byte of next line pointer
+LAB_1325
+	STX	ut1_pl		; set line start pointer low byte
+	STA	ut1_ph		; set line start pointer high byte
+	LDA	(ut1_pl),Y		; get it
+	BEQ	LAB_133E		; exit if end of program
+
+; rebuild chaining of Basic lines
+
+	LDY	#$04			; point to first code byte of line
+					; there is always 1 byte + [EOL] as null entries are deleted
+LAB_1330
+	INY				; next code byte
+	LDA	(ut1_pl),Y		; get byte
+	BNE	LAB_1330		; loop if not [EOL]
+
+	SEC				; set carry for add + 1
+	TYA				; copy end index
+	ADC	ut1_pl		; add to line start pointer low byte
+	TAX				; copy to X
+	LDY	#$00			; clear index, point to this line's next line pointer
+	STA	(ut1_pl),Y		; set next line pointer low byte
+	TYA				; clear A
+	ADC	ut1_ph		; add line start pointer high byte + carry
+	INY				; increment index to high byte
+	STA	(ut1_pl),Y		; save next line pointer low byte
+	BCC	LAB_1325		; go do next line, branch always, carry clear
+
+
+LAB_133E
+	JMP	LAB_127D		; else we just wait for Basic command, no "Ready"
+
+; print "? " and get BASIC input
+
+LAB_INLN
+	JSR	LAB_18E3		; print "?" character
+	JSR	LAB_18E0		; print " "
+	BNE	LAB_1357		; call for BASIC input and return
+
+; receive line from keyboard
+
+					; $08 as delete key (BACKSPACE on standard keyboard)
+LAB_134B
+	JSR	LAB_PRNA		; go print the character
+	DEX				; decrement the buffer counter (delete)
+	.byte	$2C			; make LDX into BIT abs
+
+; call for BASIC input (main entry point)
+
+LAB_1357
+	LDX	#$00			; clear BASIC line buffer pointer
+LAB_1359
+	JSR	V_INPT		; call scan input device
+	BCC	LAB_1359		; loop if no byte
+
+	BEQ	LAB_1359		; loop until valid input (ignore NULLs)
+
+	CMP	#$07			; compare with [BELL]
+	BEQ	LAB_1378		; branch if [BELL]
+
+	CMP	#$0D			; compare with [CR]
+	BEQ	LAB_1384		; do CR/LF exit if [CR]
+
+	CPX	#$00			; compare pointer with $00
+	BNE	LAB_1374		; branch if not empty
+
+; next two lines ignore any non print character and [SPACE] if input buffer empty
+
+	CMP	#$21			; compare with [SP]+1
+	BCC	LAB_1359		; if < ignore character
+
+LAB_1374
+	CMP	#$08			; compare with [BACKSPACE] (delete last character)
+	BEQ	LAB_134B		; go delete last character
+
+LAB_1378
+	CPX	#Ibuffe-Ibuffs	; compare character count with max
+	BCS	LAB_138E		; skip store and do [BELL] if buffer full
+
+	STA	Ibuffs,X		; else store in buffer
+	INX				; increment pointer
+LAB_137F
+	JSR	LAB_PRNA		; go print the character
+	BNE	LAB_1359		; always loop for next character
+
+LAB_1384
+	JMP	LAB_1866		; do CR/LF exit to BASIC
+
+; announce buffer full
+
+LAB_138E
+	LDA	#$07			; [BELL] character into A
+	BNE	LAB_137F		; go print the [BELL] but ignore input character
+					; branch always
+
+; crunch keywords into Basic tokens
+; position independent buffer version ..
+; faster, dictionary search version ....
+
+LAB_13A6
+	LDY	#$FF			; set save index (makes for easy math later)
+
+	SEC				; set carry for subtract
+	LDA	Bpntrl		; get basic execute pointer low byte
+	SBC	#<Ibuffs		; subtract input buffer start pointer
+	TAX				; copy result to X (index past line # if any)
+
+	STX	Oquote		; clear open quote/DATA flag
+LAB_13AC
+	LDA	Ibuffs,X		; get byte from input buffer
+	BEQ	LAB_13EC		; if null save byte then exit
+
+	CMP	#"_"			; compare with "_"
+	BCS	LAB_13EC		; if >= go save byte then continue crunching
+
+	CMP	#"<"			; compare with "<"
+	BCS	LAB_13CC		; if >= go crunch now
+
+	CMP	#"0"			; compare with "0"
+	BCS	LAB_13EC		; if >= go save byte then continue crunching
+
+	STA	Scnquo		; save buffer byte as search character
+	CMP	#$22			; is it quote character?
+	BEQ	LAB_1410		; branch if so (copy quoted string)
+
+	CMP	#"*"			; compare with "*"
+	BCC	LAB_13EC		; if < go save byte then continue crunching
+
+					; else crunch now
+LAB_13CC
+	BIT	Oquote		; get open quote/DATA token flag
+	BVS	LAB_13EC		; branch if b6 of Oquote set (was DATA)
+					; go save byte then continue crunching
+
+	STX	TempB			; save buffer read index
+	STY	csidx			; copy buffer save index
+	LDY	#<TAB_1STC		; get keyword first character table low address
+	STY	ut2_pl		; save pointer low byte
+	LDY	#>TAB_1STC		; get keyword first character table high address
+	STY	ut2_ph		; save pointer high byte
+	LDY	#$00			; clear table pointer
+
+LAB_13D0
+	CMP	(ut2_pl),Y		; compare with keyword first character table byte
+	BEQ	LAB_13D1		; go do word_table_chr if match
+
+	BCC	LAB_13EA		; if < keyword first character table byte go restore
+					; Y and save to crunched
+
+	INY				; else increment pointer
+	BNE	LAB_13D0		; and loop (branch always)
+
+; have matched first character of some keyword
+
+LAB_13D1
+	TYA				; copy matching index
+	ASL				; *2 (bytes per pointer)
+	TAX				; copy to new index
+	LDA	TAB_CHRT,X		; get keyword table pointer low byte
+	STA	ut2_pl		; save pointer low byte
+	LDA	TAB_CHRT+1,X	; get keyword table pointer high byte
+	STA	ut2_ph		; save pointer high byte
+
+	LDY	#$FF			; clear table pointer (make -1 for start)
+
+	LDX	TempB			; restore buffer read index
+
+LAB_13D6
+	INY				; next table byte
+	LDA	(ut2_pl),Y		; get byte from table
+LAB_13D8
+	BMI	LAB_13EA		; all bytes matched so go save token
+
+	INX				; next buffer byte
+	CMP	Ibuffs,X		; compare with byte from input buffer
+	BEQ	LAB_13D6		; go compare next if match
+
+	BNE	LAB_1417		; branch if >< (not found keyword)
+
+LAB_13EA
+	LDY	csidx			; restore save index
+
+					; save crunched to output
+LAB_13EC
+	INX				; increment buffer index (to next input byte)
+	INY				; increment save index (to next output byte)
+	STA	Ibuffs,Y		; save byte to output
+	CMP	#$00			; set the flags, set carry
+	BEQ	LAB_142A		; do exit if was null [EOL]
+
+					; A holds token or byte here
+	SBC	#":"			; subtract ":" (carry set by CMP #00)
+	BEQ	LAB_13FF		; branch if it was ":" (is now $00)
+
+					; A now holds token-$3A
+	CMP	#TK_DATA-$3A	; compare with DATA token - $3A
+	BNE	LAB_1401		; branch if not DATA
+
+					; token was : or DATA
+LAB_13FF
+	STA	Oquote		; save token-$3A (clear for ":", TK_DATA-$3A for DATA)
+LAB_1401
+	EOR	#TK_REM-$3A		; effectively subtract REM token offset
+	BNE	LAB_13AC		; If wasn't REM then go crunch rest of line
+
+	STA	Asrch			; else was REM so set search for [EOL]
+
+					; loop for REM, "..." etc.
+LAB_1408
+	LDA	Ibuffs,X		; get byte from input buffer
+	BEQ	LAB_13EC		; branch if null [EOL]
+
+	CMP	Asrch			; compare with stored character
+	BEQ	LAB_13EC		; branch if match (end quote)
+
+					; entry for copy string in quotes, don't crunch
+LAB_1410
+	INY				; increment buffer save index
+	STA	Ibuffs,Y		; save byte to output
+	INX				; increment buffer read index
+	BNE	LAB_1408		; loop while <> 0 (should never be 0!)
+
+					; not found keyword this go
+LAB_1417
+	LDX	TempB			; compare has failed, restore buffer index (start byte!)
+
+					; now find the end of this word in the table
+LAB_141B
+	LDA	(ut2_pl),Y		; get table byte
+	PHP				; save status
+	INY				; increment table index
+	PLP				; restore byte status
+	BPL	LAB_141B		; if not end of keyword go do next
+
+	LDA	(ut2_pl),Y		; get byte from keyword table
+	BNE	LAB_13D8		; go test next word if not zero byte (end of table)
+
+					; reached end of table with no match
+	LDA	Ibuffs,X		; restore byte from input buffer
+	BPL	LAB_13EA		; branch always (all bytes in buffer are $00-$7F)
+					; go save byte in output and continue crunching
+
+					; reached [EOL]
+LAB_142A
+	INY				; increment pointer
+	INY				; increment pointer (makes it next line pointer high byte)
+	STA	Ibuffs,Y		; save [EOL] (marks [EOT] in immediate mode)
+	INY				; adjust for line copy
+	INY				; adjust for line copy
+	INY				; adjust for line copy
+	DEC	Bpntrl		; allow for increment (change if buffer starts at $xxFF)
+	RTS
+
+; search Basic for temp integer line number from start of mem
+
+LAB_SSLN
+	LDA	Smeml			; get start of mem low byte
+	LDX	Smemh			; get start of mem high byte
+
+; search Basic for temp integer line number from AX
+; returns carry set if found
+; returns Baslnl/Baslnh pointer to found or next higher (not found) line
+
+; old 541 new 507
+
+LAB_SHLN
+	LDY	#$01			; set index
+	STA	Baslnl		; save low byte as current
+	STX	Baslnh		; save high byte as current
+	LDA	(Baslnl),Y		; get pointer high byte from addr
+	BEQ	LAB_145F		; pointer was zero so we"re done, do "not found" exit
+
+	LDY	#$03			; set index to line # high byte
+	LDA	(Baslnl),Y		; get line # high byte
+	DEY				; decrement index (point to low byte)
+	CMP	Itemph		; compare with temporary integer high byte
+	BNE	LAB_1455		; if <> skip low byte check
+
+	LDA	(Baslnl),Y		; get line # low byte
+	CMP	Itempl		; compare with temporary integer low byte
+LAB_1455
+	BCS	LAB_145E		; else if temp < this line, exit (passed line#)
+
+LAB_1456
+	DEY				; decrement index to next line ptr high byte
+	LDA	(Baslnl),Y		; get next line pointer high byte
+	TAX				; copy to X
+	DEY				; decrement index to next line ptr low byte
+	LDA	(Baslnl),Y		; get next line pointer low byte
+	BCC	LAB_SHLN		; go search for line # in temp (Itempl/Itemph) from AX
+					; (carry always clear)
+
+LAB_145E
+	BEQ	LAB_1460		; exit if temp = found line #, carry is set
+
+LAB_145F
+	CLC				; clear found flag
+LAB_1460
+	RTS
+
+; perform NEW
+
+LAB_NEW
+	BNE	LAB_1460		; exit if not end of statement (to do syntax error)
+
+LAB_1463
+	LDA	#$00			; clear A
+	TAY				; clear Y
+	STA	(Smeml),Y		; clear first line, next line pointer, low byte
+	INY				; increment index
+	STA	(Smeml),Y		; clear first line, next line pointer, high byte
+	CLC				; clear carry
+	LDA	Smeml			; get start of mem low byte
+	ADC	#$02			; calculate end of BASIC low byte
+	STA	Svarl			; save start of vars low byte
+	LDA	Smemh			; get start of mem high byte
+	ADC	#$00			; add any carry
+	STA	Svarh			; save start of vars high byte
+
+; reset execution to start, clear vars and flush stack
+
+LAB_1477
+	CLC				; clear carry
+	LDA	Smeml			; get start of mem low byte
+	ADC	#$FF			; -1
+	STA	Bpntrl		; save BASIC execute pointer low byte
+	LDA	Smemh			; get start of mem high byte
+	ADC	#$FF			; -1+carry
+	STA	Bpntrh		; save BASIC execute pointer high byte
+
+; "CLEAR" command gets here
+
+LAB_147A
+	LDA	Ememl			; get end of mem low byte
+	LDY	Ememh			; get end of mem high byte
+	STA	Sstorl		; set bottom of string space low byte
+	STY	Sstorh		; set bottom of string space high byte
+	LDA	Svarl			; get start of vars low byte
+	LDY	Svarh			; get start of vars high byte
+	STA	Sarryl		; save var mem end low byte
+	STY	Sarryh		; save var mem end high byte
+	STA	Earryl		; save array mem end low byte
+	STY	Earryh		; save array mem end high byte
+	JSR	LAB_161A		; perform RESTORE command
+
+; flush stack and clear continue flag
+
+LAB_1491
+	LDX	#des_sk		; set descriptor stack pointer
+	STX	next_s		; save descriptor stack pointer
+	PLA				; pull return address low byte
+	TAX				; copy return address low byte
+	PLA				; pull return address high byte
+	STX	LAB_SKFE		; save to cleared stack
+	STA	LAB_SKFF		; save to cleared stack
+	LDX	#$FD			; new stack pointer
+	TXS				; reset stack
+	LDA	#$00			; clear byte
+	STA	Cpntrh		; clear continue pointer high byte
+	STA	Sufnxf		; clear subscript/FNX flag
+LAB_14A6
+	RTS
+
+; perform CLEAR
+
+LAB_CLEAR
+	BEQ	LAB_147A		; if no following token go do "CLEAR"
+
+					; else there was a following token (go do syntax error)
+	RTS
+
+; perform LIST [n][-m]
+; bigger, faster version (a _lot_ faster)
+
+LAB_LIST
+	BCC	LAB_14BD		; branch if next character numeric (LIST n..)
+
+	BEQ	LAB_14BD		; branch if next character [NULL] (LIST)
+
+	CMP	#TK_MINUS		; compare with token for -
+	BNE	LAB_14A6		; exit if not - (LIST -m)
+
+					; LIST [[n][-m]]
+					; this bit sets the n , if present, as the start and end
+LAB_14BD
+	JSR	LAB_GFPN		; get fixed-point number into temp integer
+	JSR	LAB_SSLN		; search BASIC for temp integer line number
+					; (pointer in Baslnl/Baslnh)
+	JSR	LAB_GBYT		; scan memory
+	BEQ	LAB_14D4		; branch if no more characters
+
+					; this bit checks the - is present
+	CMP	#TK_MINUS		; compare with token for -
+	BNE	LAB_1460		; return if not "-" (will be Syntax error)
+
+					; LIST [n]-m
+					; the - was there so set m as the end value
+	JSR	LAB_IGBY		; increment and scan memory
+	JSR	LAB_GFPN		; get fixed-point number into temp integer
+	BNE	LAB_1460		; exit if not ok
+
+LAB_14D4
+	LDA	Itempl		; get temporary integer low byte
+	ORA	Itemph		; OR temporary integer high byte
+	BNE	LAB_14E2		; branch if start set
+
+	LDA	#$FF			; set for -1
+	STA	Itempl		; set temporary integer low byte
+	STA	Itemph		; set temporary integer high byte
+LAB_14E2
+	LDY	#$01			; set index for line
+	STY	Oquote		; clear open quote flag
+	JSR	LAB_CRLF		; print CR/LF
+	LDA	(Baslnl),Y		; get next line pointer high byte
+					; pointer initially set by search at LAB_14BD
+	BEQ	LAB_152B		; if null all done so exit
+	JSR	LAB_1629		; do CRTL-C check vector
+
+	INY				; increment index for line
+	LDA	(Baslnl),Y		; get line # low byte
+	TAX				; copy to X
+	INY				; increment index
+	LDA	(Baslnl),Y		; get line # high byte
+	CMP	Itemph		; compare with temporary integer high byte
+	BNE	LAB_14FF		; branch if no high byte match
+
+	CPX	Itempl		; compare with temporary integer low byte
+	BEQ	LAB_1501		; branch if = last line to do (< will pass next branch)
+
+LAB_14FF				; else ..
+	BCS	LAB_152B		; if greater all done so exit
+
+LAB_1501
+	STY	Tidx1			; save index for line
+	JSR	LAB_295E		; print XA as unsigned integer
+	LDA	#$20			; space is the next character
+LAB_1508
+	LDY	Tidx1			; get index for line
+	AND	#$7F			; mask top out bit of character
+LAB_150C
+	JSR	LAB_PRNA		; go print the character
+	CMP	#$22			; was it " character
+	BNE	LAB_1519		; branch if not
+
+					; we are either entering or leaving a pair of quotes
+	LDA	Oquote		; get open quote flag
+	EOR	#$FF			; toggle it
+	STA	Oquote		; save it back
+LAB_1519
+	INY				; increment index
+	LDA	(Baslnl),Y		; get next byte
+	BNE	LAB_152E		; branch if not [EOL] (go print character)
+	TAY				; else clear index
+	LDA	(Baslnl),Y		; get next line pointer low byte
+	TAX				; copy to X
+	INY				; increment index
+	LDA	(Baslnl),Y		; get next line pointer high byte
+	STX	Baslnl		; set pointer to line low byte
+	STA	Baslnh		; set pointer to line high byte
+	BNE	LAB_14E2		; go do next line if not [EOT]
+					; else ..
+LAB_152B
+	RTS
+
+LAB_152E
+	BPL	LAB_150C		; just go print it if not token byte
+
+					; else was token byte so uncrunch it (maybe)
+	BIT	Oquote		; test the open quote flag
+	BMI	LAB_150C		; just go print character if open quote set
+
+	LDX	#>LAB_KEYT		; get table address high byte
+	ASL				; *2
+	ASL				; *4
+	BCC	LAB_152F		; branch if no carry
+
+	INX				; else increment high byte
+	CLC				; clear carry for add
+LAB_152F
+	ADC	#<LAB_KEYT		; add low byte
+	BCC	LAB_1530		; branch if no carry
+
+	INX				; else increment high byte
+LAB_1530
+	STA	ut2_pl		; save table pointer low byte
+	STX	ut2_ph		; save table pointer high byte
+	STY	Tidx1			; save index for line
+	LDY	#$00			; clear index
+	LDA	(ut2_pl),Y		; get length
+	TAX				; copy length
+	INY				; increment index
+	LDA	(ut2_pl),Y		; get 1st character
+	DEX				; decrement length
+	BEQ	LAB_1508		; if no more characters exit and print
+
+	JSR	LAB_PRNA		; go print the character
+	INY				; increment index
+	LDA	(ut2_pl),Y		; get keyword address low byte
+	PHA				; save it for now
+	INY				; increment index
+	LDA	(ut2_pl),Y		; get keyword address high byte
+	LDY	#$00
+	STA	ut2_ph		; save keyword pointer high byte
+	PLA				; pull low byte
+	STA	ut2_pl		; save keyword pointer low byte
+LAB_1540
+	LDA	(ut2_pl),Y		; get character
+	DEX				; decrement character count
+	BEQ	LAB_1508		; if last character exit and print
+
+	JSR	LAB_PRNA		; go print the character
+	INY				; increment index
+	BNE	LAB_1540		; loop for next character
+
+; perform FOR
+
+LAB_FOR
+	LDA	#$80			; set FNX
+	STA	Sufnxf		; set subscript/FNX flag
+	JSR	LAB_LET		; go do LET
+	PLA				; pull return address
+	PLA				; pull return address
+	LDA	#$10			; we need 16d bytes !
+	JSR	LAB_1212		; check room on stack for A bytes
+	JSR	LAB_SNBS		; scan for next BASIC statement ([:] or [EOL])
+	CLC				; clear carry for add
+	TYA				; copy index to A
+	ADC	Bpntrl		; add BASIC execute pointer low byte
+	PHA				; push onto stack
+	LDA	Bpntrh		; get BASIC execute pointer high byte
+	ADC	#$00			; add carry
+	PHA				; push onto stack
+	LDA	Clineh		; get current line high byte
+	PHA				; push onto stack
+	LDA	Clinel		; get current line low byte
+	PHA				; push onto stack
+	LDA	#TK_TO		; get "TO" token
+	JSR	LAB_SCCA		; scan for CHR$(A) , else do syntax error then warm start
+	JSR	LAB_CTNM		; check if source is numeric, else do type mismatch
+	JSR	LAB_EVNM		; evaluate expression and check is numeric,
+					; else do type mismatch
+	LDA	FAC1_s		; get FAC1 sign (b7)
+	ORA	#$7F			; set all non sign bits
+	AND	FAC1_1		; and FAC1 mantissa1
+	STA	FAC1_1		; save FAC1 mantissa1
+	LDA	#<LAB_159F		; set return address low byte
+	LDY	#>LAB_159F		; set return address high byte
+	STA	ut1_pl		; save return address low byte
+	STY	ut1_ph		; save return address high byte
+	JMP	LAB_1B66		; round FAC1 and put on stack (returns to next instruction)
+
+LAB_159F
+	LDA	#<LAB_259C		; set 1 pointer low addr (default step size)
+	LDY	#>LAB_259C		; set 1 pointer high addr
+	JSR	LAB_UFAC		; unpack memory (AY) into FAC1
+	JSR	LAB_GBYT		; scan memory
+	CMP	#TK_STEP		; compare with STEP token
+	BNE	LAB_15B3		; jump if not "STEP"
+
+					;.was step so ..
+	JSR	LAB_IGBY		; increment and scan memory
+	JSR	LAB_EVNM		; evaluate expression and check is numeric,
+					; else do type mismatch
+LAB_15B3
+	JSR	LAB_27CA		; return A=FF,C=1/-ve A=01,C=0/+ve
+	STA	FAC1_s		; set FAC1 sign (b7)
+					; this is +1 for +ve step and -1 for -ve step, in NEXT we
+					; compare the FOR value and the TO value and return +1 if
+					; FOR > TO, 0 if FOR = TO and -1 if FOR < TO. the value
+					; here (+/-1) is then compared to that result and if they
+					; are the same (+ve and FOR > TO or -ve and FOR < TO) then
+					; the loop is done
+	JSR	LAB_1B5B		; push sign, round FAC1 and put on stack
+	LDA	Frnxth		; get var pointer for FOR/NEXT high byte
+	PHA				; push on stack
+	LDA	Frnxtl		; get var pointer for FOR/NEXT low byte
+	PHA				; push on stack
+	LDA	#TK_FOR		; get FOR token
+	PHA				; push on stack
+
+; interpreter inner loop
+
+LAB_15C2
+	JSR	LAB_1629		; do CRTL-C check vector
+	LDA	Bpntrl		; get BASIC execute pointer low byte
+	LDY	Bpntrh		; get BASIC execute pointer high byte
+
+	LDX	Clineh		; continue line is $FFxx for immediate mode
+					; ($00xx for RUN from immediate mode)
+	INX				; increment it (now $00 if immediate mode)
+	BEQ	LAB_15D1		; branch if null (immediate mode)
+
+	STA	Cpntrl		; save continue pointer low byte
+	STY	Cpntrh		; save continue pointer high byte
+LAB_15D1
+	LDY	#$00			; clear index
+	LDA	(Bpntrl),Y		; get next byte
+	BEQ	LAB_15DC		; branch if null [EOL]
+
+	CMP	#":"			; compare with ":"
+	BEQ	LAB_15F6		; branch if = (statement separator)
+
+LAB_15D9
+	JMP	LAB_SNER		; else syntax error then warm start
+
+					; have reached [EOL]
+LAB_15DC
+	LDY	#$02			; set index
+	LDA	(Bpntrl),Y		; get next line pointer high byte
+	CLC				; clear carry for no "BREAK" message
+	BEQ	LAB_1651		; if null go to immediate mode (was immediate or [EOT]
+					; marker)
+
+	INY				; increment index
+	LDA	(Bpntrl),Y		; get line # low byte
+	STA	Clinel		; save current line low byte
+	INY				; increment index
+	LDA	(Bpntrl),Y		; get line # high byte
+	STA	Clineh		; save current line high byte
+	TYA				; A now = 4
+	ADC	Bpntrl		; add BASIC execute pointer low byte
+	STA	Bpntrl		; save BASIC execute pointer low byte
+	BCC	LAB_15F6		; branch if no overflow
+
+	INC	Bpntrh		; else increment BASIC execute pointer high byte
+LAB_15F6
+	JSR	LAB_IGBY		; increment and scan memory
+
+LAB_15F9
+	JSR	LAB_15FF		; go interpret BASIC code from (Bpntrl)
+
+LAB_15FC
+	JMP	LAB_15C2		; loop
+
+; interpret BASIC code from (Bpntrl)
+
+LAB_15FF
+	BEQ	LAB_1628		; exit if zero [EOL]
+
+LAB_1602
+	ASL				; *2 bytes per vector and normalise token
+	BCS	LAB_1609		; branch if was token
+
+	JMP	LAB_LET		; else go do implied LET
+
+LAB_1609
+	CMP	#(TK_TAB-$80)*2	; compare normalised token * 2 with TAB
+	BCS	LAB_15D9		; branch if A>=TAB (do syntax error then warm start)
+					; only tokens before TAB can start a line
+	TAY				; copy to index
+	LDA	LAB_CTBL+1,Y	; get vector high byte
+	PHA				; onto stack
+	LDA	LAB_CTBL,Y		; get vector low byte
+	PHA				; onto stack
+	JMP	LAB_IGBY		; jump to increment and scan memory
+					; then "return" to vector
+
+; CTRL-C check jump. this is called as a subroutine but exits back via a jump if a
+; key press is detected.
+
+LAB_1629
+	JMP	(VEC_CC)		; ctrl c check vector
+
+; if there was a key press it gets back here ..
+
+LAB_1636
+	CMP	#$03			; compare with CTRL-C
+
+; perform STOP
+
+LAB_STOP
+	BCS	LAB_163B		; branch if token follows STOP
+					; else just END
+; END
+
+LAB_END
+	CLC				; clear the carry, indicate a normal program end
+LAB_163B
+	BNE	LAB_167A		; if wasn't CTRL-C or there is a following byte return
+
+	LDA	Bpntrh		; get the BASIC execute pointer high byte
+	EOR	#>Ibuffs		; compare with buffer address high byte (Cb unchanged)
+	BEQ	LAB_164F		; branch if the BASIC pointer is in the input buffer
+					; (can't continue in immediate mode)
+
+					; else ..
+	EOR	#>Ibuffs		; correct the bits
+	LDY	Bpntrl		; get BASIC execute pointer low byte
+	STY	Cpntrl		; save continue pointer low byte
+	STA	Cpntrh		; save continue pointer high byte
+LAB_1647
+	LDA	Clinel		; get current line low byte
+	LDY	Clineh		; get current line high byte
+	STA	Blinel		; save break line low byte
+	STY	Blineh		; save break line high byte
+LAB_164F
+	PLA				; pull return address low
+	PLA				; pull return address high
+LAB_1651
+	BCC	LAB_165E		; if was program end just do warm start
+
+					; else ..
+	LDA	#<LAB_BMSG		; point to "Break" low byte
+	LDY	#>LAB_BMSG		; point to "Break" high byte
+	JMP	LAB_1269		; print "Break" and do warm start
+
+LAB_165E
+	JMP	LAB_1274		; go do warm start
+
+; perform RESTORE
+
+LAB_RESTORE
+	BNE	LAB_RESTOREn	; branch if next character not null (RESTORE n)
+
+LAB_161A
+	SEC				; set carry for subtract
+	LDA	Smeml			; get start of mem low byte
+	SBC	#$01			; -1
+	LDY	Smemh			; get start of mem high byte
+	BCS	LAB_1624		; branch if no underflow
+
+LAB_uflow
+	DEY				; else decrement high byte
+LAB_1624
+	STA	Dptrl			; save DATA pointer low byte
+	STY	Dptrh			; save DATA pointer high byte
+LAB_1628
+	RTS
+
+					; is RESTORE n
+LAB_RESTOREn
+	JSR	LAB_GFPN		; get fixed-point number into temp integer
+	JSR	LAB_SNBL		; scan for next BASIC line
+	LDA	Clineh		; get current line high byte
+	CMP	Itemph		; compare with temporary integer high byte
+	BCS	LAB_reset_search	; branch if >= (start search from beginning)
+
+	TYA				; else copy line index to A
+	SEC				; set carry (+1)
+	ADC	Bpntrl		; add BASIC execute pointer low byte
+	LDX	Bpntrh		; get BASIC execute pointer high byte
+	BCC	LAB_go_search	; branch if no overflow to high byte
+
+	INX				; increment high byte
+	BCS	LAB_go_search	; branch always (can never be carry clear)
+
+; search for line # in temp (Itempl/Itemph) from start of mem pointer (Smeml)
+
+LAB_reset_search
+	LDA	Smeml			; get start of mem low byte
+	LDX	Smemh			; get start of mem high byte
+
+; search for line # in temp (Itempl/Itemph) from (AX)
+
+LAB_go_search
+
+	JSR	LAB_SHLN		; search Basic for temp integer line number from AX
+	BCS	LAB_line_found	; if carry set go set pointer
+
+	JMP	LAB_16F7		; else go do "Undefined statement" error
+
+LAB_line_found
+					; carry already set for subtract
+	LDA	Baslnl		; get pointer low byte
+	SBC	#$01			; -1
+	LDY	Baslnh		; get pointer high byte
+	BCS	LAB_1624		; branch if no underflow (save DATA pointer and return)
+
+	BCC	LAB_uflow		; else decrement high byte then save DATA pointer and
+					; return (branch always)
+
+; perform NULL
+
+LAB_NULL
+	JSR	LAB_GTBY		; get byte parameter
+	STX	Nullct		; save new NULL count
+LAB_167A
+	RTS
+
+; perform CONT
+
+LAB_CONT
+	BNE	LAB_167A		; if following byte exit to do syntax error
+
+	LDY	Cpntrh		; get continue pointer high byte
+	BNE	LAB_166C		; go do continue if we can
+
+	LDX	#$1E			; error code $1E ("Can't continue" error)
+	JMP	LAB_XERR		; do error #X, then warm start
+
+					; we can continue so ..
+LAB_166C
+	LDA	#TK_ON		; set token for ON
+	JSR	LAB_IRQ		; set IRQ flags
+	LDA	#TK_ON		; set token for ON
+	JSR	LAB_NMI		; set NMI flags
+
+	STY	Bpntrh		; save BASIC execute pointer high byte
+	LDA	Cpntrl		; get continue pointer low byte
+	STA	Bpntrl		; save BASIC execute pointer low byte
+	LDA	Blinel		; get break line low byte
+	LDY	Blineh		; get break line high byte
+	STA	Clinel		; set current line low byte
+	STY	Clineh		; set current line high byte
+	RTS
+
+; perform RUN
+
+LAB_RUN
+	BNE	LAB_1696		; branch if RUN n
+	JMP	LAB_1477		; reset execution to start, clear variables, flush stack and
+					; return
+
+; does RUN n
+
+LAB_1696
+	JSR	LAB_147A		; go do "CLEAR"
+	BEQ	LAB_16B0		; get n and do GOTO n (branch always as CLEAR sets Z=1)
+
+; perform DO
+
+LAB_DO
+	LDA	#$05			; need 5 bytes for DO
+	JSR	LAB_1212		; check room on stack for A bytes
+	LDA	Bpntrh		; get BASIC execute pointer high byte
+	PHA				; push on stack
+	LDA	Bpntrl		; get BASIC execute pointer low byte
+	PHA				; push on stack
+	LDA	Clineh		; get current line high byte
+	PHA				; push on stack
+	LDA	Clinel		; get current line low byte
+	PHA				; push on stack
+	LDA	#TK_DO		; token for DO
+	PHA				; push on stack
+	JSR	LAB_GBYT		; scan memory
+	JMP	LAB_15C2		; go do interpreter inner loop
+
+; perform GOSUB
+
+LAB_GOSUB
+	LDA	#$05			; need 5 bytes for GOSUB
+	JSR	LAB_1212		; check room on stack for A bytes
+	LDA	Bpntrh		; get BASIC execute pointer high byte
+	PHA				; push on stack
+	LDA	Bpntrl		; get BASIC execute pointer low byte
+	PHA				; push on stack
+	LDA	Clineh		; get current line high byte
+	PHA				; push on stack
+	LDA	Clinel		; get current line low byte
+	PHA				; push on stack
+	LDA	#TK_GOSUB		; token for GOSUB
+	PHA				; push on stack
+LAB_16B0
+	JSR	LAB_GBYT		; scan memory
+	JSR	LAB_GOTO		; perform GOTO n
+	JMP	LAB_15C2		; go do interpreter inner loop
+					; (can't RTS, we used the stack!)
+
+; perform GOTO
+
+LAB_GOTO
+	JSR	LAB_GFPN		; get fixed-point number into temp integer
+	JSR	LAB_SNBL		; scan for next BASIC line
+	LDA	Clineh		; get current line high byte
+	CMP	Itemph		; compare with temporary integer high byte
+	BCS	LAB_16D0		; branch if >= (start search from beginning)
+
+	TYA				; else copy line index to A
+	SEC				; set carry (+1)
+	ADC	Bpntrl		; add BASIC execute pointer low byte
+	LDX	Bpntrh		; get BASIC execute pointer high byte
+	BCC	LAB_16D4		; branch if no overflow to high byte
+
+	INX				; increment high byte
+	BCS	LAB_16D4		; branch always (can never be carry)
+
+; search for line # in temp (Itempl/Itemph) from start of mem pointer (Smeml)
+
+LAB_16D0
+	LDA	Smeml			; get start of mem low byte
+	LDX	Smemh			; get start of mem high byte
+
+; search for line # in temp (Itempl/Itemph) from (AX)
+
+LAB_16D4
+	JSR	LAB_SHLN		; search Basic for temp integer line number from AX
+	BCC	LAB_16F7		; if carry clear go do "Undefined statement" error
+					; (unspecified statement)
+
+					; carry already set for subtract
+	LDA	Baslnl		; get pointer low byte
+	SBC	#$01			; -1
+	STA	Bpntrl		; save BASIC execute pointer low byte
+	LDA	Baslnh		; get pointer high byte
+	SBC	#$00			; subtract carry
+	STA	Bpntrh		; save BASIC execute pointer high byte
+LAB_16E5
+	RTS
+
+LAB_DONOK
+	LDX	#$22			; error code $22 ("LOOP without DO" error)
+	JMP	LAB_XERR		; do error #X, then warm start
+
+; perform LOOP
+
+LAB_LOOP
+	TAY				; save following token
+	TSX				; copy stack pointer
+	LDA	LAB_STAK+3,X	; get token byte from stack
+	CMP	#TK_DO		; compare with DO token
+	BNE	LAB_DONOK		; branch if no matching DO
+
+	INX				; dump calling routine return address
+	INX				; dump calling routine return address
+	TXS				; correct stack
+	TYA				; get saved following token back
+	BEQ	LoopAlways		; if no following token loop forever
+					; (stack pointer in X)
+
+	CMP	#":"			; could be ":"
+	BEQ	LoopAlways		; if :... loop forever
+
+	SBC	#TK_UNTIL		; subtract token for UNTIL, we know carry is set here
+	TAX				; copy to X (if it was UNTIL then Y will be correct)
+	BEQ	DoRest		; branch if was UNTIL
+
+	DEX				; decrement result
+	BNE	LAB_16FC		; if not WHILE go do syntax error and warm start
+					; only if the token was WHILE will this fail
+
+	DEX				; set invert result byte
+DoRest
+	STX	Frnxth		; save invert result byte
+	JSR	LAB_IGBY		; increment and scan memory
+	JSR	LAB_EVEX		; evaluate expression
+	LDA	FAC1_e		; get FAC1 exponent
+	BEQ	DoCmp			; if =0 go do straight compare
+
+	LDA	#$FF			; else set all bits
+DoCmp
+	TSX				; copy stack pointer
+	EOR	Frnxth		; EOR with invert byte
+	BNE	LoopDone		; if <> 0 clear stack and back to interpreter loop
+
+					; loop condition wasn't met so do it again
+LoopAlways
+	LDA	LAB_STAK+2,X	; get current line low byte
+	STA	Clinel		; save current line low byte
+	LDA	LAB_STAK+3,X	; get current line high byte
+	STA	Clineh		; save current line high byte
+	LDA	LAB_STAK+4,X	; get BASIC execute pointer low byte
+	STA	Bpntrl		; save BASIC execute pointer low byte
+	LDA	LAB_STAK+5,X	; get BASIC execute pointer high byte
+	STA	Bpntrh		; save BASIC execute pointer high byte
+	JSR	LAB_GBYT		; scan memory
+	JMP	LAB_15C2		; go do interpreter inner loop
+
+					; clear stack and back to interpreter loop
+LoopDone
+	INX				; dump DO token
+	INX				; dump current line low byte
+	INX				; dump current line high byte
+	INX				; dump BASIC execute pointer low byte
+	INX				; dump BASIC execute pointer high byte
+	TXS				; correct stack
+	JMP	LAB_DATA		; go perform DATA (find : or [EOL])
+
+; do the return without gosub error
+
+LAB_16F4
+	LDX	#$04			; error code $04 ("RETURN without GOSUB" error)
+	.byte	$2C			; makes next line BIT LAB_0EA2
+
+LAB_16F7				; do undefined statement error
+	LDX	#$0E			; error code $0E ("Undefined statement" error)
+	JMP	LAB_XERR		; do error #X, then warm start
+
+; perform RETURN
+
+LAB_RETURN
+	BNE	LAB_16E5		; exit if following token (to allow syntax error)
+
+LAB_16E8
+	PLA				; dump calling routine return address
+	PLA				; dump calling routine return address
+	PLA				; pull token
+	CMP	#TK_GOSUB		; compare with GOSUB token
+	BNE	LAB_16F4		; branch if no matching GOSUB
+
+LAB_16FF
+	PLA				; pull current line low byte
+	STA	Clinel		; save current line low byte
+	PLA				; pull current line high byte
+	STA	Clineh		; save current line high byte
+	PLA				; pull BASIC execute pointer low byte
+	STA	Bpntrl		; save BASIC execute pointer low byte
+	PLA				; pull BASIC execute pointer high byte
+	STA	Bpntrh		; save BASIC execute pointer high byte
+
+					; now do the DATA statement as we could be returning into
+					; the middle of an ON <var> GOSUB n,m,p,q line
+					; (the return address used by the DATA statement is the one
+					; pushed before the GOSUB was executed!)
+
+; perform DATA
+
+LAB_DATA
+	JSR	LAB_SNBS		; scan for next BASIC statement ([:] or [EOL])
+
+					; set BASIC execute pointer
+LAB_170F
+	TYA				; copy index to A
+	CLC				; clear carry for add
+	ADC	Bpntrl		; add BASIC execute pointer low byte
+	STA	Bpntrl		; save BASIC execute pointer low byte
+	BCC	LAB_1719		; skip next if no carry
+
+	INC	Bpntrh		; else increment BASIC execute pointer high byte
+LAB_1719
+	RTS
+
+LAB_16FC
+	JMP	LAB_SNER		; do syntax error then warm start
+
+; scan for next BASIC statement ([:] or [EOL])
+; returns Y as index to [:] or [EOL]
+
+LAB_SNBS
+	LDX	#":"			; set look for character = ":"
+	.byte	$2C			; makes next line BIT $00A2
+
+; scan for next BASIC line
+; returns Y as index to [EOL]
+
+LAB_SNBL
+	LDX	#$00			; set alt search character = [EOL]
+	LDY	#$00			; set search character = [EOL]
+	STY	Asrch			; store search character
+LAB_1725
+	TXA				; get alt search character
+	EOR	Asrch			; toggle search character, effectively swap with $00
+	STA	Asrch			; save swapped search character
+LAB_172D
+	LDA	(Bpntrl),Y		; get next byte
+	BEQ	LAB_1719		; exit if null [EOL]
+
+	CMP	Asrch			; compare with search character
+	BEQ	LAB_1719		; exit if found
+
+	INY				; increment index
+	CMP	#$22			; compare current character with open quote
+	BNE	LAB_172D		; if not open quote go get next character
+
+	BEQ	LAB_1725		; if found go swap search character for alt search character
+
+; perform IF
+
+LAB_IF
+	JSR	LAB_EVEX		; evaluate the expression
+	JSR	LAB_GBYT		; scan memory
+	CMP	#TK_THEN		; compare with THEN token
+	BEQ	LAB_174B		; if it was THEN go do IF
+
+					; wasn't IF .. THEN so must be IF .. GOTO
+	CMP	#TK_GOTO		; compare with GOTO token
+	BNE	LAB_16FC		; if it wasn't GOTO go do syntax error
+
+	LDX	Bpntrl		; save the basic pointer low byte
+	LDY	Bpntrh		; save the basic pointer high byte
+	JSR	LAB_IGBY		; increment and scan memory
+	BCS	LAB_16FC		; if not numeric go do syntax error
+
+	STX	Bpntrl		; restore the basic pointer low byte
+	STY	Bpntrh		; restore the basic pointer high byte
+LAB_174B
+	LDA	FAC1_e		; get FAC1 exponent
+	BEQ	LAB_174E		; if the result was zero go look for an ELSE
+
+	JSR	LAB_IGBY		; else increment and scan memory
+	BCS	LAB_174D		; if not numeric go do var or keyword
+
+LAB_174C
+	JMP	LAB_GOTO		; else was numeric so do GOTO n
+
+					; is var or keyword
+LAB_174D
+	CMP	#TK_RETURN		; compare the byte with the token for RETURN
+	BNE	LAB_174G		; if it wasn't RETURN go interpret BASIC code from (Bpntrl)
+					; and return to this code to process any following code
+
+	JMP	LAB_1602		; else it was RETURN so interpret BASIC code from (Bpntrl)
+					; but don't return here
+
+LAB_174G
+	JSR	LAB_15FF		; interpret BASIC code from (Bpntrl)
+
+; the IF was executed and there may be a following ELSE so the code needs to return
+; here to check and ignore the ELSE if present
+
+	LDY	#$00			; clear the index
+	LDA	(Bpntrl),Y		; get the next BASIC byte
+	CMP	#TK_ELSE		; compare it with the token for ELSE
+	BEQ	LAB_DATA		; if ELSE ignore the following statement
+
+; there was no ELSE so continue execution of IF <expr> THEN <stat> [: <stat>]. any
+; following ELSE will, correctly, cause a syntax error
+
+	RTS				; else return to the interpreter inner loop
+
+; perform ELSE after IF
+
+LAB_174E
+	LDY	#$00			; clear the BASIC byte index
+	LDX	#$01			; clear the nesting depth
+LAB_1750
+	INY				; increment the BASIC byte index
+	LDA	(Bpntrl),Y		; get the next BASIC byte
+	BEQ	LAB_1753		; if EOL go add the pointer and return
+
+	CMP	#TK_IF		; compare the byte with the token for IF
+	BNE	LAB_1752		; if not IF token skip the depth increment
+
+	INX				; else increment the nesting depth ..
+	BNE	LAB_1750		; .. and continue looking
+
+LAB_1752
+	CMP	#TK_ELSE		; compare the byte with the token for ELSE
+	BNE	LAB_1750		; if not ELSE token continue looking
+
+	DEX				; was ELSE so decrement the nesting depth
+	BNE	LAB_1750		; loop if still nested
+
+	INY				; increment the BASIC byte index past the ELSE
+
+; found the matching ELSE, now do <{n|statement}>
+
+LAB_1753
+	TYA				; else copy line index to A
+	CLC				; clear carry for add
+	ADC	Bpntrl		; add the BASIC execute pointer low byte
+	STA	Bpntrl		; save the BASIC execute pointer low byte
+	BCC	LAB_1754		; branch if no overflow to high byte
+
+	INC	Bpntrh		; else increment the BASIC execute pointer high byte
+LAB_1754
+	JSR	LAB_GBYT		; scan memory
+	BCC	LAB_174C		; if numeric do GOTO n
+					; the code will return to the interpreter loop at the
+					; tail end of the GOTO <n>
+
+	JMP	LAB_15FF		; interpret BASIC code from (Bpntrl)
+					; the code will return to the interpreter loop at the
+					; tail end of the <statement>
+
+; perform REM, skip (rest of) line
+
+LAB_REM
+	JSR	LAB_SNBL		; scan for next BASIC line
+	JMP	LAB_170F		; go set BASIC execute pointer and return, branch always
+
+LAB_16FD
+	JMP	LAB_SNER		; do syntax error then warm start
+
+; perform ON
+
+LAB_ON
+	CMP	#TK_IRQ		; was it IRQ token ?
+	BNE	LAB_NOIN		; if not go check NMI
+
+	JMP	LAB_SIRQ		; else go set-up IRQ
+
+LAB_NOIN
+	CMP	#TK_NMI		; was it NMI token ?
+	BNE	LAB_NONM		; if not go do normal ON command
+
+	JMP	LAB_SNMI		; else go set-up NMI
+
+LAB_NONM
+	JSR	LAB_GTBY		; get byte parameter
+	PHA				; push GOTO/GOSUB token
+	CMP	#TK_GOSUB		; compare with GOSUB token
+	BEQ	LAB_176B		; branch if GOSUB
+
+	CMP	#TK_GOTO		; compare with GOTO token
+LAB_1767
+	BNE	LAB_16FD		; if not GOTO do syntax error then warm start
+
+
+; next character was GOTO or GOSUB
+
+LAB_176B
+	DEC	FAC1_3		; decrement index (byte value)
+	BNE	LAB_1773		; branch if not zero
+
+	PLA				; pull GOTO/GOSUB token
+	JMP	LAB_1602		; go execute it
+
+LAB_1773
+	JSR	LAB_IGBY		; increment and scan memory
+	JSR	LAB_GFPN		; get fixed-point number into temp integer (skip this n)
+					; (we could LDX #"," and JSR LAB_SNBL+2, then we
+					; just BNE LAB_176B for the loop. should be quicker ..
+					; no we can't, what if we meet a colon or [EOL]?)
+	CMP	#$2C			; compare next character with ","
+	BEQ	LAB_176B		; loop if ","
+
+LAB_177E
+	PLA				; else pull keyword token (run out of options)
+					; also dump +/-1 pointer low byte and exit
+LAB_177F
+	RTS
+
+; takes n * 106 + 11 cycles where n is the number of digits
+
+; get fixed-point number into temp integer
+
+LAB_GFPN
+	LDX	#$00			; clear reg
+	STX	Itempl		; clear temporary integer low byte
+LAB_1785
+	STX	Itemph		; save temporary integer high byte
+	BCS	LAB_177F		; return if carry set, end of scan, character was
+					; not 0-9
+
+	CPX	#$19			; compare high byte with $19
+	TAY				; ensure Zb = 0 if the branch is taken
+	BCS	LAB_1767		; branch if >=, makes max line # 63999 because next
+					; bit does *$0A, = 64000, compare at target will fail
+					; and do syntax error
+
+	SBC	#"0"-1		; subtract "0", $2F + carry, from byte
+	TAY				; copy binary digit
+	LDA	Itempl		; get temporary integer low byte
+	ASL				; *2 low byte
+	ROL	Itemph		; *2 high byte
+	ASL				; *2 low byte
+	ROL	Itemph		; *2 high byte, *4
+	ADC	Itempl		; + low byte, *5
+	STA	Itempl		; save it
+	TXA				; get high byte copy to A
+	ADC	Itemph		; + high byte, *5
+	ASL	Itempl		; *2 low byte, *10d
+	ROL				; *2 high byte, *10d
+	TAX				; copy high byte back to X
+	TYA				; get binary digit back
+	ADC	Itempl		; add number low byte
+	STA	Itempl		; save number low byte
+	BCC	LAB_17B3		; if no overflow to high byte get next character
+
+	INX				; else increment high byte
+LAB_17B3
+	JSR	LAB_IGBY		; increment and scan memory
+	JMP	LAB_1785		; loop for next character
+
+; perform DEC
+
+LAB_DEC
+	LDA	#<LAB_2AFD		; set -1 pointer low byte
+	.byte	$2C			; BIT abs to skip the LDA below
+
+; perform INC
+
+LAB_INC
+	LDA	#<LAB_259C		; set 1 pointer low byte
+LAB_17B5
+	PHA				; save +/-1 pointer low byte
+LAB_17B7
+	JSR	LAB_GVAR		; get var address
+	LDX	Dtypef		; get data type flag, $FF=string, $00=numeric
+	BMI	IncrErr		; exit if string
+
+	STA	Lvarpl		; save var address low byte
+	STY	Lvarph		; save var address high byte
+	JSR	LAB_UFAC		; unpack memory (AY) into FAC1
+	PLA				; get +/-1 pointer low byte
+	PHA				; save +/-1 pointer low byte
+	LDY	#>LAB_259C		; set +/-1 pointer high byte (both the same)
+	JSR	LAB_246C		; add (AY) to FAC1
+	JSR	LAB_PFAC		; pack FAC1 into variable (Lvarpl)
+
+	JSR	LAB_GBYT		; scan memory
+	CMP	#","			; compare with ","
+	BNE	LAB_177E		; exit if not "," (either end or error)
+
+					; was "," so another INCR variable to do
+	JSR	LAB_IGBY		; increment and scan memory
+	JMP	LAB_17B7		; go do next var
+
+IncrErr
+	JMP	LAB_1ABC		; do "Type mismatch" error then warm start
+
+; perform LET
+
+LAB_LET
+	JSR	LAB_GVAR		; get var address
+	STA	Lvarpl		; save var address low byte
+	STY	Lvarph		; save var address high byte
+	LDA	#TK_EQUAL		; get = token
+	JSR	LAB_SCCA		; scan for CHR$(A), else do syntax error then warm start
+	LDA	Dtypef		; get data type flag, $FF=string, $00=numeric
+	PHA				; push data type flag
+	JSR	LAB_EVEX		; evaluate expression
+	PLA				; pop data type flag
+	ROL				; set carry if type = string
+	JSR	LAB_CKTM		; type match check, set C for string
+	BNE	LAB_17D5		; branch if string
+
+	JMP	LAB_PFAC		; pack FAC1 into variable (Lvarpl) and return
+
+; string LET
+
+LAB_17D5
+	LDY	#$02			; set index to pointer high byte
+	LDA	(des_pl),Y		; get string pointer high byte
+	CMP	Sstorh		; compare bottom of string space high byte
+	BCC	LAB_17F4		; if less assign value and exit (was in program memory)
+
+	BNE	LAB_17E6		; branch if >
+					; else was equal so compare low bytes
+	DEY				; decrement index
+	LDA	(des_pl),Y		; get pointer low byte
+	CMP	Sstorl		; compare bottom of string space low byte
+	BCC	LAB_17F4		; if less assign value and exit (was in program memory)
+
+					; pointer was >= to bottom of string space pointer
+LAB_17E6
+	LDY	des_ph		; get descriptor pointer high byte
+	CPY	Svarh			; compare start of vars high byte
+	BCC	LAB_17F4		; branch if less (descriptor is on stack)
+
+	BNE	LAB_17FB		; branch if greater (descriptor is not on stack)
+
+					; else high bytes were equal so ..
+	LDA	des_pl		; get descriptor pointer low byte
+	CMP	Svarl			; compare start of vars low byte
+	BCS	LAB_17FB		; branch if >= (descriptor is not on stack)
+
+LAB_17F4
+	LDA	des_pl		; get descriptor pointer low byte
+	LDY	des_ph		; get descriptor pointer high byte
+	JMP	LAB_1811		; clean stack, copy descriptor to variable and return
+
+					; make space and copy string
+LAB_17FB
+	LDY	#$00			; index to length
+	LDA	(des_pl),Y		; get string length
+	JSR	LAB_209C		; copy string
+	LDA	des_2l		; get descriptor pointer low byte
+	LDY	des_2h		; get descriptor pointer high byte
+	STA	ssptr_l		; save descriptor pointer low byte
+	STY	ssptr_h		; save descriptor pointer high byte
+	JSR	LAB_228A		; copy string from descriptor (sdescr) to (Sutill)
+	LDA	#<FAC1_e		; set descriptor pointer low byte
+	LDY	#>FAC1_e		; get descriptor pointer high byte
+
+					; clean stack and assign value to string variable
+LAB_1811
+	STA	des_2l		; save descriptor_2 pointer low byte
+	STY	des_2h		; save descriptor_2 pointer high byte
+	JSR	LAB_22EB		; clean descriptor stack, YA = pointer
+	LDY	#$00			; index to length
+	LDA	(des_2l),Y		; get string length
+	STA	(Lvarpl),Y		; copy to let string variable
+	INY				; index to string pointer low byte
+	LDA	(des_2l),Y		; get string pointer low byte
+	STA	(Lvarpl),Y		; copy to let string variable
+	INY				; index to string pointer high byte
+	LDA	(des_2l),Y		; get string pointer high byte
+	STA	(Lvarpl),Y		; copy to let string variable
+	RTS
+
+; perform GET
+
+LAB_GET
+	JSR	LAB_GVAR		; get var address
+	STA	Lvarpl		; save var address low byte
+	STY	Lvarph		; save var address high byte
+	JSR	INGET			; get input byte
+	LDX	Dtypef		; get data type flag, $FF=string, $00=numeric
+	BMI	LAB_GETS		; go get string character
+
+					; was numeric get
+	TAY				; copy character to Y
+	JSR	LAB_1FD0		; convert Y to byte in FAC1
+	JMP	LAB_PFAC		; pack FAC1 into variable (Lvarpl) and return
+
+LAB_GETS
+	PHA				; save character
+	LDA	#$01			; string is single byte
+	BCS	LAB_IsByte		; branch if byte received
+
+	PLA				; string is null
+LAB_IsByte
+	JSR	LAB_MSSP		; make string space A bytes long A=$AC=length,
+					; X=$AD=Sutill=ptr low byte, Y=$AE=Sutilh=ptr high byte
+	BEQ	LAB_NoSt		; skip store if null string
+
+	PLA				; get character back
+	LDY	#$00			; clear index
+	STA	(str_pl),Y		; save byte in string (byte IS string!)
+LAB_NoSt
+	JSR	LAB_RTST		; check for space on descriptor stack then put address
+					; and length on descriptor stack and update stack pointers
+
+	JMP	LAB_17D5		; do string LET and return
+
+; perform PRINT
+
+LAB_1829
+	JSR	LAB_18C6		; print string from Sutill/Sutilh
+LAB_182C
+	JSR	LAB_GBYT		; scan memory
+
+; PRINT
+
+LAB_PRINT
+	BEQ	LAB_CRLF		; if nothing following just print CR/LF
+
+LAB_1831
+	CMP	#TK_TAB		; compare with TAB( token
+	BEQ	LAB_18A2		; go do TAB/SPC
+
+	CMP	#TK_SPC		; compare with SPC( token
+	BEQ	LAB_18A2		; go do TAB/SPC
+
+	CMP	#","			; compare with ","
+	BEQ	LAB_188B		; go do move to next TAB mark
+
+	CMP	#";"			; compare with ";"
+	BEQ	LAB_18BD		; if ";" continue with PRINT processing
+
+	JSR	LAB_EVEX		; evaluate expression
+	BIT	Dtypef		; test data type flag, $FF=string, $00=numeric
+	BMI	LAB_1829		; branch if string
+
+	JSR	LAB_296E		; convert FAC1 to string
+	JSR	LAB_20AE		; print " terminated string to Sutill/Sutilh
+	LDY	#$00			; clear index
+
+; don't check fit if terminal width byte is zero
+
+	LDA	TWidth		; get terminal width byte
+	BEQ	LAB_185E		; skip check if zero
+
+	SEC				; set carry for subtract
+	SBC	TPos			; subtract terminal position
+	SBC	(des_pl),Y		; subtract string length
+	BCS	LAB_185E		; branch if less than terminal width
+
+	JSR	LAB_CRLF		; else print CR/LF
+LAB_185E
+	JSR	LAB_18C6		; print string from Sutill/Sutilh
+	BEQ	LAB_182C		; always go continue processing line
+
+; CR/LF return to BASIC from BASIC input handler
+
+LAB_1866
+	LDA	#$00			; clear byte
+	STA	Ibuffs,X		; null terminate input
+	LDX	#<Ibuffs		; set X to buffer start-1 low byte
+	LDY	#>Ibuffs		; set Y to buffer start-1 high byte
+
+; print CR/LF
+
+LAB_CRLF
+	LDA	#$0D			; load [CR]
+	JSR	LAB_PRNA		; go print the character
+	LDA	#$0A			; load [LF]
+	BNE	LAB_PRNA		; go print the character and return, branch always
+
+LAB_188B
+	LDA	TPos			; get terminal position
+	CMP	Iclim			; compare with input column limit
+	BCC	LAB_1897		; branch if less
+
+	JSR	LAB_CRLF		; else print CR/LF (next line)
+	BNE	LAB_18BD		; continue with PRINT processing (branch always)
+
+LAB_1897
+	SEC				; set carry for subtract
+LAB_1898
+	SBC	TabSiz		; subtract TAB size
+	BCS	LAB_1898		; loop if result was +ve
+
+	EOR	#$FF			; complement it
+	ADC	#$01			; +1 (twos complement)
+	BNE	LAB_18B6		; always print A spaces (result is never $00)
+
+					; do TAB/SPC
+LAB_18A2
+	PHA				; save token
+	JSR	LAB_SGBY		; scan and get byte parameter
+	CMP	#$29			; is next character )
+	BNE	LAB_1910		; if not do syntax error then warm start
+
+	PLA				; get token back
+	CMP	#TK_TAB		; was it TAB ?
+	BNE	LAB_18B7		; if not go do SPC
+
+					; calculate TAB offset
+	TXA				; copy integer value to A
+	SBC	TPos			; subtract terminal position
+	BCC	LAB_18BD		; branch if result was < 0 (can't TAB backwards)
+
+					; print A spaces
+LAB_18B6
+	TAX				; copy result to X
+LAB_18B7
+	TXA				; set flags on size for SPC
+	BEQ	LAB_18BD		; branch if result was = $0, already here
+
+					; print X spaces
+LAB_18BA
+	JSR	LAB_18E0		; print " "
+	DEX				; decrement count
+	BNE	LAB_18BA		; loop if not all done
+
+					; continue with PRINT processing
+LAB_18BD
+	JSR	LAB_IGBY		; increment and scan memory
+	BNE	LAB_1831		; if more to print go do it
+
+	RTS
+
+; print null terminated string from memory
+
+LAB_18C3
+	JSR	LAB_20AE		; print " terminated string to Sutill/Sutilh
+
+; print string from Sutill/Sutilh
+
+LAB_18C6
+	JSR	LAB_22B6		; pop string off descriptor stack, or from top of string
+					; space returns with A = length, X=$71=pointer low byte,
+					; Y=$72=pointer high byte
+	LDY	#$00			; reset index
+	TAX				; copy length to X
+	BEQ	LAB_188C		; exit (RTS) if null string
+
+LAB_18CD
+
+	LDA	(ut1_pl),Y		; get next byte
+	JSR	LAB_PRNA		; go print the character
+	INY				; increment index
+	DEX				; decrement count
+	BNE	LAB_18CD		; loop if not done yet
+
+	RTS
+
+					; Print single format character
+; print " "
+
+LAB_18E0
+	LDA	#$20			; load " "
+	.byte	$2C			; change next line to BIT LAB_3FA9
+
+; print "?" character
+
+LAB_18E3
+	LDA	#$3F			; load "?" character
+
+; print character in A
+; now includes the null handler
+; also includes infinite line length code
+; note! some routines expect this one to exit with Zb=0
+
+LAB_PRNA
+	CMP	#" "			; compare with " "
+	BCC	LAB_18F9		; branch if less (non printing)
+
+					; else printable character
+	PHA				; save the character
+
+; don't check fit if terminal width byte is zero
+
+	LDA	TWidth		; get terminal width
+	BNE	LAB_18F0		; branch if not zero (not infinite length)
+
+; is "infinite line" so check TAB position
+
+	LDA	TPos			; get position
+	SBC	TabSiz		; subtract TAB size, carry set by CMP #$20 above
+	BNE	LAB_18F7		; skip reset if different
+
+	STA	TPos			; else reset position
+	BEQ	LAB_18F7		; go print character
+
+LAB_18F0
+	CMP	TPos			; compare with terminal character position
+	BNE	LAB_18F7		; branch if not at end of line
+
+	JSR	LAB_CRLF		; else print CR/LF
+LAB_18F7
+	INC	TPos			; increment terminal position
+	PLA				; get character back
+LAB_18F9
+	JSR	V_OUTP		; output byte via output vector
+	CMP	#$0D			; compare with [CR]
+	BNE	LAB_188A		; branch if not [CR]
+
+					; else print nullct nulls after the [CR]
+	STX	TempB			; save buffer index
+	LDX	Nullct		; get null count
+	BEQ	LAB_1886		; branch if no nulls
+
+	LDA	#$00			; load [NULL]
+LAB_1880
+	JSR	LAB_PRNA		; go print the character
+	DEX				; decrement count
+	BNE	LAB_1880		; loop if not all done
+
+	LDA	#$0D			; restore the character (and set the flags)
+LAB_1886
+	STX	TPos			; clear terminal position (X always = zero when we get here)
+	LDX	TempB			; restore buffer index
+LAB_188A
+	AND	#$FF			; set the flags
+LAB_188C
+	RTS
+
+; handle bad input data
+
+LAB_1904
+	LDA	Imode			; get input mode flag, $00=INPUT, $00=READ
+	BPL	LAB_1913		; branch if INPUT (go do redo)
+
+	LDA	Dlinel		; get current DATA line low byte
+	LDY	Dlineh		; get current DATA line high byte
+	STA	Clinel		; save current line low byte
+	STY	Clineh		; save current line high byte
+LAB_1910
+	JMP	LAB_SNER		; do syntax error then warm start
+
+					; mode was INPUT
+LAB_1913
+	LDA	#<LAB_REDO		; point to redo message (low addr)
+	LDY	#>LAB_REDO		; point to redo message (high addr)
+	JSR	LAB_18C3		; print null terminated string from memory
+	LDA	Cpntrl		; get continue pointer low byte
+	LDY	Cpntrh		; get continue pointer high byte
+	STA	Bpntrl		; save BASIC execute pointer low byte
+	STY	Bpntrh		; save BASIC execute pointer high byte
+	RTS
+
+; perform INPUT
+
+LAB_INPUT
+	CMP	#$22			; compare next byte with open quote
+	BNE	LAB_1934		; branch if no prompt string
+
+	JSR	LAB_1BC1		; print "..." string
+	LDA	#$3B			; load A with ";"
+	JSR	LAB_SCCA		; scan for CHR$(A), else do syntax error then warm start
+	JSR	LAB_18C6		; print string from Sutill/Sutilh
+
+					; done with prompt, now get data
+LAB_1934
+	JSR	LAB_CKRN		; check not Direct, back here if ok
+	JSR	LAB_INLN		; print "? " and get BASIC input
+	LDA	#$00			; set mode = INPUT
+	CMP	Ibuffs		; test first byte in buffer
+	BNE	LAB_1953		; branch if not null input
+
+	CLC				; was null input so clear carry to exit program
+	JMP	LAB_1647		; go do BREAK exit
+
+; perform READ
+
+LAB_READ
+	LDX	Dptrl			; get DATA pointer low byte
+	LDY	Dptrh			; get DATA pointer high byte
+	LDA	#$80			; set mode = READ
+
+LAB_1953
+	STA	Imode			; set input mode flag, $00=INPUT, $80=READ
+	STX	Rdptrl		; save READ pointer low byte
+	STY	Rdptrh		; save READ pointer high byte
+
+					; READ or INPUT next variable from list
+LAB_195B
+	JSR	LAB_GVAR		; get (var) address
+	STA	Lvarpl		; save address low byte
+	STY	Lvarph		; save address high byte
+	LDA	Bpntrl		; get BASIC execute pointer low byte
+	LDY	Bpntrh		; get BASIC execute pointer high byte
+	STA	Itempl		; save as temporary integer low byte
+	STY	Itemph		; save as temporary integer high byte
+	LDX	Rdptrl		; get READ pointer low byte
+	LDY	Rdptrh		; get READ pointer high byte
+	STX	Bpntrl		; set BASIC execute pointer low byte
+	STY	Bpntrh		; set BASIC execute pointer high byte
+	JSR	LAB_GBYT		; scan memory
+	BNE	LAB_1988		; branch if not null
+
+					; pointer was to null entry
+	BIT	Imode			; test input mode flag, $00=INPUT, $80=READ
+	BMI	LAB_19DD		; branch if READ
+
+					; mode was INPUT
+	JSR	LAB_18E3		; print "?" character (double ? for extended input)
+	JSR	LAB_INLN		; print "? " and get BASIC input
+	STX	Bpntrl		; set BASIC execute pointer low byte
+	STY	Bpntrh		; set BASIC execute pointer high byte
+LAB_1985
+	JSR	LAB_GBYT		; scan memory
+LAB_1988
+	BIT	Dtypef		; test data type flag, $FF=string, $00=numeric
+	BPL	LAB_19B0		; branch if numeric
+
+					; else get string
+	STA	Srchc			; save search character
+	CMP	#$22			; was it " ?
+	BEQ	LAB_1999		; branch if so
+
+	LDA	#":"			; else search character is ":"
+	STA	Srchc			; set new search character
+	LDA	#","			; other search character is ","
+	CLC				; clear carry for add
+LAB_1999
+	STA	Asrch			; set second search character
+	LDA	Bpntrl		; get BASIC execute pointer low byte
+	LDY	Bpntrh		; get BASIC execute pointer high byte
+
+	ADC	#$00			; c is =1 if we came via the BEQ LAB_1999, else =0
+	BCC	LAB_19A4		; branch if no execute pointer low byte rollover
+
+	INY				; else increment high byte
+LAB_19A4
+	JSR	LAB_20B4		; print Srchc or Asrch terminated string to Sutill/Sutilh
+	JSR	LAB_23F3		; restore BASIC execute pointer from temp (Btmpl/Btmph)
+	JSR	LAB_17D5		; go do string LET
+	JMP	LAB_19B6		; go check string terminator
+
+					; get numeric INPUT
+LAB_19B0
+	JSR	LAB_2887		; get FAC1 from string
+	JSR	LAB_PFAC		; pack FAC1 into (Lvarpl)
+LAB_19B6
+	JSR	LAB_GBYT		; scan memory
+	BEQ	LAB_19C5		; branch if null (last entry)
+
+	CMP	#","			; else compare with ","
+	BEQ	LAB_19C2		; branch if ","
+
+	JMP	LAB_1904		; else go handle bad input data
+
+					; got good input data
+LAB_19C2
+	JSR	LAB_IGBY		; increment and scan memory
+LAB_19C5
+	LDA	Bpntrl		; get BASIC execute pointer low byte (temp READ/INPUT ptr)
+	LDY	Bpntrh		; get BASIC execute pointer high byte (temp READ/INPUT ptr)
+	STA	Rdptrl		; save for now
+	STY	Rdptrh		; save for now
+	LDA	Itempl		; get temporary integer low byte (temp BASIC execute ptr)
+	LDY	Itemph		; get temporary integer high byte (temp BASIC execute ptr)
+	STA	Bpntrl		; set BASIC execute pointer low byte
+	STY	Bpntrh		; set BASIC execute pointer high byte
+	JSR	LAB_GBYT		; scan memory
+	BEQ	LAB_1A03		; if null go do extra ignored message
+
+	JSR	LAB_1C01		; else scan for "," , else do syntax error then warm start
+	JMP	LAB_195B		; go INPUT next variable from list
+
+					; find next DATA statement or do "Out of DATA" error
+LAB_19DD
+	JSR	LAB_SNBS		; scan for next BASIC statement ([:] or [EOL])
+	INY				; increment index
+	TAX				; copy character ([:] or [EOL])
+	BNE	LAB_19F6		; branch if [:]
+
+	LDX	#$06			; set for "Out of DATA" error
+	INY				; increment index, now points to next line pointer high byte
+	LDA	(Bpntrl),Y		; get next line pointer high byte
+	BEQ	LAB_1A54		; branch if end (eventually does error X)
+
+	INY				; increment index
+	LDA	(Bpntrl),Y		; get next line # low byte
+	STA	Dlinel		; save current DATA line low byte
+	INY				; increment index
+	LDA	(Bpntrl),Y		; get next line # high byte
+	INY				; increment index
+	STA	Dlineh		; save current DATA line high byte
+LAB_19F6
+	LDA	(Bpntrl),Y		; get byte
+	INY				; increment index
+	TAX				; copy to X
+	JSR	LAB_170F		; set BASIC execute pointer
+	CPX	#TK_DATA		; compare with "DATA" token
+	BEQ	LAB_1985		; was "DATA" so go do next READ
+
+	BNE	LAB_19DD		; go find next statement if not "DATA"
+
+; end of INPUT/READ routine
+
+LAB_1A03
+	LDA	Rdptrl		; get temp READ pointer low byte
+	LDY	Rdptrh		; get temp READ pointer high byte
+	LDX	Imode			; get input mode flag, $00=INPUT, $80=READ
+	BPL	LAB_1A0E		; branch if INPUT
+
+	JMP	LAB_1624		; save AY as DATA pointer and return
+
+					; we were getting INPUT
+LAB_1A0E
+	LDY	#$00			; clear index
+	LDA	(Rdptrl),Y		; get next byte
+	BNE	LAB_1A1B		; error if not end of INPUT
+
+	RTS
+
+					; user typed too much
+LAB_1A1B
+	LDA	#<LAB_IMSG		; point to extra ignored message (low addr)
+	LDY	#>LAB_IMSG		; point to extra ignored message (high addr)
+	JMP	LAB_18C3		; print null terminated string from memory and return
+
+; search the stack for FOR activity
+; exit with z=1 if FOR else exit with z=0
+
+LAB_11A1
+	TSX				; copy stack pointer
+	INX				; +1 pass return address
+	INX				; +2 pass return address
+	INX				; +3 pass calling routine return address
+	INX				; +4 pass calling routine return address
+LAB_11A6
+	LDA	LAB_STAK+1,X	; get token byte from stack
+	CMP	#TK_FOR		; is it FOR token
+	BNE	LAB_11CE		; exit if not FOR token
+
+					; was FOR token
+	LDA	Frnxth		; get var pointer for FOR/NEXT high byte
+	BNE	LAB_11BB		; branch if not null
+
+	LDA	LAB_STAK+2,X	; get FOR variable pointer low byte
+	STA	Frnxtl		; save var pointer for FOR/NEXT low byte
+	LDA	LAB_STAK+3,X	; get FOR variable pointer high byte
+	STA	Frnxth		; save var pointer for FOR/NEXT high byte
+LAB_11BB
+	CMP	LAB_STAK+3,X	; compare var pointer with stacked var pointer (high byte)
+	BNE	LAB_11C7		; branch if no match
+
+	LDA	Frnxtl		; get var pointer for FOR/NEXT low byte
+	CMP	LAB_STAK+2,X	; compare var pointer with stacked var pointer (low byte)
+	BEQ	LAB_11CE		; exit if match found
+
+LAB_11C7
+	TXA				; copy index
+	CLC				; clear carry for add
+	ADC	#$10			; add FOR stack use size
+	TAX				; copy back to index
+	BNE	LAB_11A6		; loop if not at start of stack
+
+LAB_11CE
+	RTS
+
+; perform NEXT
+
+LAB_NEXT
+	BNE	LAB_1A46		; branch if NEXT var
+
+	LDY	#$00			; else clear Y
+	BEQ	LAB_1A49		; branch always (no variable to search for)
+
+; NEXT var
+
+LAB_1A46
+	JSR	LAB_GVAR		; get variable address
+LAB_1A49
+	STA	Frnxtl		; store variable pointer low byte
+	STY	Frnxth		; store variable pointer high byte
+					; (both cleared if no variable defined)
+	JSR	LAB_11A1		; search the stack for FOR activity
+	BEQ	LAB_1A56		; branch if found
+
+	LDX	#$00			; else set error $00 ("NEXT without FOR" error)
+LAB_1A54
+	BEQ	LAB_1ABE		; do error #X, then warm start
+
+LAB_1A56
+	TXS				; set stack pointer, X set by search, dumps return addresses
+
+	TXA				; copy stack pointer
+	SEC				; set carry for subtract
+	SBC	#$F7			; point to TO var
+	STA	ut2_pl		; save pointer to TO var for compare
+	ADC	#$FB			; point to STEP var
+
+	LDY	#>LAB_STAK		; point to stack page high byte
+	JSR	LAB_UFAC		; unpack memory (STEP value) into FAC1
+	TSX				; get stack pointer back
+	LDA	LAB_STAK+8,X	; get step sign
+	STA	FAC1_s		; save FAC1 sign (b7)
+	LDA	Frnxtl		; get FOR variable pointer low byte
+	LDY	Frnxth		; get FOR variable pointer high byte
+	JSR	LAB_246C		; add (FOR variable) to FAC1
+	JSR	LAB_PFAC		; pack FAC1 into (FOR variable)
+	LDY	#>LAB_STAK		; point to stack page high byte
+	JSR	LAB_27FA		; compare FAC1 with (Y,ut2_pl) (TO value)
+	TSX				; get stack pointer back
+	CMP	LAB_STAK+8,X	; compare step sign
+	BEQ	LAB_1A9B		; branch if = (loop complete)
+
+					; loop back and do it all again
+	LDA	LAB_STAK+$0D,X	; get FOR line low byte
+	STA	Clinel		; save current line low byte
+	LDA	LAB_STAK+$0E,X	; get FOR line high byte
+	STA	Clineh		; save current line high byte
+	LDA	LAB_STAK+$10,X	; get BASIC execute pointer low byte
+	STA	Bpntrl		; save BASIC execute pointer low byte
+	LDA	LAB_STAK+$0F,X	; get BASIC execute pointer high byte
+	STA	Bpntrh		; save BASIC execute pointer high byte
+LAB_1A98
+	JMP	LAB_15C2		; go do interpreter inner loop
+
+					; loop complete so carry on
+LAB_1A9B
+	TXA				; stack copy to A
+	ADC	#$0F			; add $10 ($0F+carry) to dump FOR structure
+	TAX				; copy back to index
+	TXS				; copy to stack pointer
+	JSR	LAB_GBYT		; scan memory
+	CMP	#","			; compare with ","
+	BNE	LAB_1A98		; branch if not "," (go do interpreter inner loop)
+
+					; was "," so another NEXT variable to do
+	JSR	LAB_IGBY		; else increment and scan memory
+	JSR	LAB_1A46		; do NEXT (var)
+
+; evaluate expression and check is numeric, else do type mismatch
+
+LAB_EVNM
+	JSR	LAB_EVEX		; evaluate expression
+
+; check if source is numeric, else do type mismatch
+
+LAB_CTNM
+	CLC				; destination is numeric
+	.byte	$24			; makes next line BIT $38
+
+; check if source is string, else do type mismatch
+
+LAB_CTST
+	SEC				; required type is string
+
+; type match check, set C for string, clear C for numeric
+
+LAB_CKTM
+	BIT	Dtypef		; test data type flag, $FF=string, $00=numeric
+	BMI	LAB_1ABA		; branch if data type is string
+
+					; else data type was numeric
+	BCS	LAB_1ABC		; if required type is string do type mismatch error
+LAB_1AB9
+	RTS
+
+					; data type was string, now check required type
+LAB_1ABA
+	BCS	LAB_1AB9		; exit if required type is string
+
+					; else do type mismatch error
+LAB_1ABC
+	LDX	#$18			; error code $18 ("Type mismatch" error)
+LAB_1ABE
+	JMP	LAB_XERR		; do error #X, then warm start
+
+; evaluate expression
+
+LAB_EVEX
+	LDX	Bpntrl		; get BASIC execute pointer low byte
+	BNE	LAB_1AC7		; skip next if not zero
+
+	DEC	Bpntrh		; else decrement BASIC execute pointer high byte
+LAB_1AC7
+	DEC	Bpntrl		; decrement BASIC execute pointer low byte
+
+LAB_EVEZ
+	LDA	#$00			; set null precedence (flag done)
+LAB_1ACC
+	PHA				; push precedence byte
+	LDA	#$02			; 2 bytes
+	JSR	LAB_1212		; check room on stack for A bytes
+	JSR	LAB_GVAL		; get value from line
+	LDA	#$00			; clear A
+	STA	comp_f		; clear compare function flag
+LAB_1ADB
+	JSR	LAB_GBYT		; scan memory
+LAB_1ADE
+	SEC				; set carry for subtract
+	SBC	#TK_GT		; subtract token for > (lowest comparison function)
+	BCC	LAB_1AFA		; branch if < TK_GT
+
+	CMP	#$03			; compare with ">" to "<" tokens
+	BCS	LAB_1AFA		; branch if >= TK_SGN (highest evaluation function +1)
+
+					; was token for > = or < (A = 0, 1 or 2)
+	CMP	#$01			; compare with token for =
+	ROL				; *2, b0 = carry (=1 if token was = or <)
+					; (A = 0, 3 or 5)
+	EOR	#$01			; toggle b0
+					; (A = 1, 2 or 4. 1 if >, 2 if =, 4 if <)
+	EOR	comp_f		; EOR with compare function flag bits
+	CMP	comp_f		; compare with compare function flag
+	BCC	LAB_1B53		; if <(comp_f) do syntax error then warm start
+					; was more than one <, = or >)
+
+	STA	comp_f		; save new compare function flag
+	JSR	LAB_IGBY		; increment and scan memory
+	JMP	LAB_1ADE		; go do next character
+
+					; token is < ">" or > "<" tokens
+LAB_1AFA
+	LDX	comp_f		; get compare function flag
+	BNE	LAB_1B2A		; branch if compare function
+
+	BCS	LAB_1B78		; go do functions
+
+					; else was <  TK_GT so is operator or lower
+	ADC	#TK_GT-TK_PLUS	; add # of operators (+, -, *, /, ^, AND, OR or EOR)
+	BCC	LAB_1B78		; branch if < + operator
+
+					; carry was set so token was +, -, *, /, ^, AND, OR or EOR
+	BNE	LAB_1B0B		; branch if not + token
+
+	BIT	Dtypef		; test data type flag, $FF=string, $00=numeric
+	BPL	LAB_1B0B		; branch if not string
+
+					; will only be $00 if type is string and token was +
+	JMP	LAB_224D		; add strings, string 1 is in descriptor des_pl, string 2
+					; is in line, and return
+
+LAB_1B0B
+	STA	ut1_pl		; save it
+	ASL				; *2
+	ADC	ut1_pl		; *3
+	TAY				; copy to index
+LAB_1B13
+	PLA				; pull previous precedence
+	CMP	LAB_OPPT,Y		; compare with precedence byte
+	BCS	LAB_1B7D		; branch if A >=
+
+	JSR	LAB_CTNM		; check if source is numeric, else do type mismatch
+LAB_1B1C
+	PHA				; save precedence
+LAB_1B1D
+	JSR	LAB_1B43		; get vector, execute function then continue evaluation
+	PLA				; restore precedence
+	LDY	prstk			; get precedence stacked flag
+	BPL	LAB_1B3C		; branch if stacked values
+
+	TAX				; copy precedence (set flags)
+	BEQ	LAB_1B9D		; exit if done
+
+	BNE	LAB_1B86		; else pop FAC2 and return, branch always
+
+LAB_1B2A
+	ROL	Dtypef		; shift data type flag into Cb
+	TXA				; copy compare function flag
+	STA	Dtypef		; clear data type flag, X is 0xxx xxxx
+	ROL				; shift data type into compare function byte b0
+	LDX	Bpntrl		; get BASIC execute pointer low byte
+	BNE	LAB_1B34		; branch if no underflow
+
+	DEC	Bpntrh		; else decrement BASIC execute pointer high byte
+LAB_1B34
+	DEC	Bpntrl		; decrement BASIC execute pointer low byte
+TK_LT_PLUS	= TK_LT-TK_PLUS
+	LDY	#TK_LT_PLUS*3	; set offset to last operator entry
+	STA	comp_f		; save new compare function flag
+	BNE	LAB_1B13		; branch always
+
+LAB_1B3C
+	CMP	LAB_OPPT,Y		;.compare with stacked function precedence
+	BCS	LAB_1B86		; branch if A >=, pop FAC2 and return
+
+	BCC	LAB_1B1C		; branch always
+
+;.get vector, execute function then continue evaluation
+
+LAB_1B43
+	LDA	LAB_OPPT+2,Y	; get function vector high byte
+	PHA				; onto stack
+	LDA	LAB_OPPT+1,Y	; get function vector low byte
+	PHA				; onto stack
+					; now push sign, round FAC1 and put on stack
+	JSR	LAB_1B5B		; function will return here, then the next RTS will call
+					; the function
+	LDA	comp_f		; get compare function flag
+	PHA				; push compare evaluation byte
+	LDA	LAB_OPPT,Y		; get precedence byte
+	JMP	LAB_1ACC		; continue evaluating expression
+
+LAB_1B53
+	JMP	LAB_SNER		; do syntax error then warm start
+
+; push sign, round FAC1 and put on stack
+
+LAB_1B5B
+	PLA				; get return addr low byte
+	STA	ut1_pl		; save it
+	INC	ut1_pl		; increment it (was ret-1 pushed? yes!)
+					; note! no check is made on the high byte! if the calling
+					; routine assembles to a page edge then this all goes
+					; horribly wrong !!!
+	PLA				; get return addr high byte
+	STA	ut1_ph		; save it
+	LDA	FAC1_s		; get FAC1 sign (b7)
+	PHA				; push sign
+
+; round FAC1 and put on stack
+
+LAB_1B66
+	JSR	LAB_27BA		; round FAC1
+	LDA	FAC1_3		; get FAC1 mantissa3
+	PHA				; push on stack
+	LDA	FAC1_2		; get FAC1 mantissa2
+	PHA				; push on stack
+	LDA	FAC1_1		; get FAC1 mantissa1
+	PHA				; push on stack
+	LDA	FAC1_e		; get FAC1 exponent
+	PHA				; push on stack
+	JMP	(ut1_pl)		; return, sort of
+
+; do functions
+
+LAB_1B78
+	LDY	#$FF			; flag function
+	PLA				; pull precedence byte
+LAB_1B7B
+	BEQ	LAB_1B9D		; exit if done
+
+LAB_1B7D
+	CMP	#$64			; compare previous precedence with $64
+	BEQ	LAB_1B84		; branch if was $64 (< function)
+
+	JSR	LAB_CTNM		; check if source is numeric, else do type mismatch
+LAB_1B84
+	STY	prstk			; save precedence stacked flag
+
+					; pop FAC2 and return
+LAB_1B86
+	PLA				; pop byte
+	LSR				; shift out comparison evaluation lowest bit
+	STA	Cflag			; save comparison evaluation flag
+	PLA				; pop exponent
+	STA	FAC2_e		; save FAC2 exponent
+	PLA				; pop mantissa1
+	STA	FAC2_1		; save FAC2 mantissa1
+	PLA				; pop mantissa2
+	STA	FAC2_2		; save FAC2 mantissa2
+	PLA				; pop mantissa3
+	STA	FAC2_3		; save FAC2 mantissa3
+	PLA				; pop sign
+	STA	FAC2_s		; save FAC2 sign (b7)
+	EOR	FAC1_s		; EOR FAC1 sign (b7)
+	STA	FAC_sc		; save sign compare (FAC1 EOR FAC2)
+LAB_1B9D
+	LDA	FAC1_e		; get FAC1 exponent
+	RTS
+
+; print "..." string to string util area
+
+LAB_1BC1
+	LDA	Bpntrl		; get BASIC execute pointer low byte
+	LDY	Bpntrh		; get BASIC execute pointer high byte
+	ADC	#$00			; add carry to low byte
+	BCC	LAB_1BCA		; branch if no overflow
+
+	INY				; increment high byte
+LAB_1BCA
+	JSR	LAB_20AE		; print " terminated string to Sutill/Sutilh
+	JMP	LAB_23F3		; restore BASIC execute pointer from temp and return
+
+; get value from line
+
+LAB_GVAL
+	JSR	LAB_IGBY		; increment and scan memory
+	BCS	LAB_1BAC		; branch if not numeric character
+
+					; else numeric string found (e.g. 123)
+LAB_1BA9
+	JMP	LAB_2887		; get FAC1 from string and return
+
+; get value from line .. continued
+
+					; wasn't a number so ..
+LAB_1BAC
+	TAX				; set the flags
+	BMI	LAB_1BD0		; if -ve go test token values
+
+					; else it is either a string, number, variable or (<expr>)
+	CMP	#"$"			; compare with "$"
+	BEQ	LAB_1BA9		; branch if "$", hex number
+
+	CMP	#"%"			; else compare with "%"
+	BEQ	LAB_1BA9		; branch if "%", binary number
+
+	CMP	#"."			; compare with "."
+	BEQ	LAB_1BA9		; if so get FAC1 from string and return (e.g. was .123)
+
+					; it wasn't any sort of number so ..
+	CMP	#$22			; compare with "
+	BEQ	LAB_1BC1		; branch if open quote
+
+					; wasn't any sort of number so ..
+
+; evaluate expression within parentheses
+
+	CMP	#"("			; compare with "("
+	BNE	LAB_1C18		; if not "(" get (var), return value in FAC1 and $ flag
+
+LAB_1BF7
+	JSR	LAB_EVEZ		; evaluate expression, no decrement
+
+; all the "scan for" routines return the character after the sought character
+
+; scan for ")" , else do syntax error then warm start
+
+LAB_1BFB
+	LDA	#$29			; load A with ")"
+
+; scan for CHR$(A) , else do syntax error then warm start
+
+LAB_SCCA
+	LDY	#$00			; clear index
+	CMP	(Bpntrl),Y		; check next byte is = A
+	BNE	LAB_SNER		; if not do syntax error then warm start
+
+	JMP	LAB_IGBY		; increment and scan memory then return
+
+; scan for "(" , else do syntax error then warm start
+
+LAB_1BFE
+	LDA	#$28			; load A with "("
+	BNE	LAB_SCCA		; scan for CHR$(A), else do syntax error then warm start
+					; (branch always)
+
+; scan for "," , else do syntax error then warm start
+
+LAB_1C01
+	LDA	#$2C			; load A with ","
+	BNE	LAB_SCCA		; scan for CHR$(A), else do syntax error then warm start
+					; (branch always)
+
+; syntax error then warm start
+
+LAB_SNER
+	LDX	#$02			; error code $02 ("Syntax" error)
+	JMP	LAB_XERR		; do error #X, then warm start
+
+; get value from line .. continued
+; do tokens
+
+LAB_1BD0
+	CMP	#TK_MINUS		; compare with token for -
+	BEQ	LAB_1C11		; branch if - token (do set-up for functions)
+
+					; wasn't -n so ..
+	CMP	#TK_PLUS		; compare with token for +
+	BEQ	LAB_GVAL		; branch if + token (+n = n so ignore leading +)
+
+	CMP	#TK_NOT		; compare with token for NOT
+	BNE	LAB_1BE7		; branch if not token for NOT
+
+					; was NOT token
+TK_EQUAL_PLUS	= TK_EQUAL-TK_PLUS
+	LDY	#TK_EQUAL_PLUS*3	; offset to NOT function
+	BNE	LAB_1C13		; do set-up for function then execute (branch always)
+
+; do = compare
+
+LAB_EQUAL
+	JSR	LAB_EVIR		; evaluate integer expression (no sign check)
+	LDA	FAC1_3		; get FAC1 mantissa3
+	EOR	#$FF			; invert it
+	TAY				; copy it
+	LDA	FAC1_2		; get FAC1 mantissa2
+	EOR	#$FF			; invert it
+	JMP	LAB_AYFC		; save and convert integer AY to FAC1 and return
+
+; get value from line .. continued
+
+					; wasn't +, -, or NOT so ..
+LAB_1BE7
+	CMP	#TK_FN		; compare with token for FN
+	BNE	LAB_1BEE		; branch if not token for FN
+
+	JMP	LAB_201E		; go evaluate FNx
+
+; get value from line .. continued
+
+					; wasn't +, -, NOT or FN so ..
+LAB_1BEE
+	SBC	#TK_SGN		; subtract with token for SGN
+	BCS	LAB_1C27		; if a function token go do it
+
+	JMP	LAB_SNER		; else do syntax error
+
+; set-up for functions
+
+LAB_1C11
+TK_GT_PLUS	= TK_GT-TK_PLUS
+	LDY	#TK_GT_PLUS*3	; set offset from base to > operator
+LAB_1C13
+	PLA				; dump return address low byte
+	PLA				; dump return address high byte
+	JMP	LAB_1B1D		; execute function then continue evaluation
+
+; variable name set-up
+; get (var), return value in FAC_1 and $ flag
+
+LAB_1C18
+	JSR	LAB_GVAR		; get (var) address
+	STA	FAC1_2		; save address low byte in FAC1 mantissa2
+	STY	FAC1_3		; save address high byte in FAC1 mantissa3
+	LDX	Dtypef		; get data type flag, $FF=string, $00=numeric
+	BMI	LAB_1C25		; if string then return (does RTS)
+
+LAB_1C24
+	JMP	LAB_UFAC		; unpack memory (AY) into FAC1
+
+LAB_1C25
+	RTS
+
+; get value from line .. continued
+; only functions left so ..
+
+; set up function references
+
+; new for V2.0+ this replaces a lot of IF .. THEN .. ELSEIF .. THEN .. that was needed
+; to process function calls. now the function vector is computed and pushed on the stack
+; and the preprocess offset is read. if the preprocess offset is non zero then the vector
+; is calculated and the routine called, if not this routine just does RTS. whichever
+; happens the RTS at the end of this routine, or the end of the preprocess routine, calls
+; the function code
+
+; this also removes some less than elegant code that was used to bypass type checking
+; for functions that returned strings
+
+LAB_1C27
+	ASL				; *2 (2 bytes per function address)
+	TAY				; copy to index
+
+	LDA	LAB_FTBM,Y		; get function jump vector high byte
+	PHA				; push functions jump vector high byte
+	LDA	LAB_FTBL,Y		; get function jump vector low byte
+	PHA				; push functions jump vector low byte
+
+	LDA	LAB_FTPM,Y		; get function pre process vector high byte
+	BEQ	LAB_1C56		; skip pre process if null vector
+
+	PHA				; push functions pre process vector high byte
+	LDA	LAB_FTPL,Y		; get function pre process vector low byte
+	PHA				; push functions pre process vector low byte
+
+LAB_1C56
+	RTS				; do function, or pre process, call
+
+; process string expression in parenthesis
+
+LAB_PPFS
+	JSR	LAB_1BF7		; process expression in parenthesis
+	JMP	LAB_CTST		; check if source is string then do function,
+					; else do type mismatch
+
+; process numeric expression in parenthesis
+
+LAB_PPFN
+	JSR	LAB_1BF7		; process expression in parenthesis
+	JMP	LAB_CTNM		; check if source is numeric then do function,
+					; else do type mismatch
+
+; set numeric data type and increment BASIC execute pointer
+
+LAB_PPBI
+	LSR	Dtypef		; clear data type flag, $FF=string, $00=numeric
+	JMP	LAB_IGBY		; increment and scan memory then do function
+
+; process string for LEFT$, RIGHT$ or MID$
+
+LAB_LRMS
+	JSR	LAB_EVEZ		; evaluate (should be string) expression
+	JSR	LAB_1C01		; scan for ",", else do syntax error then warm start
+	JSR	LAB_CTST		; check if source is string, else do type mismatch
+
+	PLA				; get function jump vector low byte
+	TAX				; save functions jump vector low byte
+	PLA				; get function jump vector high byte
+	TAY				; save functions jump vector high byte
+	LDA	des_ph		; get descriptor pointer high byte
+	PHA				; push string pointer high byte
+	LDA	des_pl		; get descriptor pointer low byte
+	PHA				; push string pointer low byte
+	TYA				; get function jump vector high byte back
+	PHA				; save functions jump vector high byte
+	TXA				; get function jump vector low byte back
+	PHA				; save functions jump vector low byte
+	JSR	LAB_GTBY		; get byte parameter
+	TXA				; copy byte parameter to A
+	RTS				; go do function
+
+; process numeric expression(s) for BIN$ or HEX$
+
+LAB_BHSS
+	JSR	LAB_EVEZ		; process expression
+	JSR	LAB_CTNM		; check if source is numeric, else do type mismatch
+	LDA	FAC1_e		; get FAC1 exponent
+	CMP	#$98			; compare with exponent = 2^24
+	BCS	LAB_BHER		; branch if n>=2^24 (is too big)
+
+	JSR	LAB_2831		; convert FAC1 floating-to-fixed
+	LDX	#$02			; 3 bytes to do
+LAB_CFAC
+	LDA	FAC1_1,X		; get byte from FAC1
+	STA	nums_1,X		; save byte to temp
+	DEX				; decrement index
+	BPL	LAB_CFAC		; copy FAC1 mantissa to temp
+
+	JSR	LAB_GBYT		; get next BASIC byte
+	LDX	#$00			; set default to no leading "0"s
+	CMP	#")"			; compare with close bracket
+	BEQ	LAB_1C54		; if ")" go do rest of function
+
+	JSR	LAB_SCGB		; scan for "," and get byte
+	JSR	LAB_GBYT		; get last byte back
+	CMP	#")"			; is next character )
+	BNE	LAB_BHER		; if not ")" go do error
+
+LAB_1C54
+	RTS				; else do function
+
+LAB_BHER
+	JMP	LAB_FCER		; do function call error then warm start
+
+; perform EOR
+
+; added operator format is the same as AND or OR, precedence is the same as OR
+
+; this bit worked first time but it took a while to sort out the operator table
+; pointers and offsets afterwards!
+
+LAB_EOR
+	JSR	GetFirst		; get first integer expression (no sign check)
+	EOR	XOAw_l		; EOR with expression 1 low byte
+	TAY				; save in Y
+	LDA	FAC1_2		; get FAC1 mantissa2
+	EOR	XOAw_h		; EOR with expression 1 high byte
+	JMP	LAB_AYFC		; save and convert integer AY to FAC1 and return
+
+; perform OR
+
+LAB_OR
+	JSR	GetFirst		; get first integer expression (no sign check)
+	ORA	XOAw_l		; OR with expression 1 low byte
+	TAY				; save in Y
+	LDA	FAC1_2		; get FAC1 mantissa2
+	ORA	XOAw_h		; OR with expression 1 high byte
+	JMP	LAB_AYFC		; save and convert integer AY to FAC1 and return
+
+; perform AND
+
+LAB_AND
+	JSR	GetFirst		; get first integer expression (no sign check)
+	AND	XOAw_l		; AND with expression 1 low byte
+	TAY				; save in Y
+	LDA	FAC1_2		; get FAC1 mantissa2
+	AND	XOAw_h		; AND with expression 1 high byte
+	JMP	LAB_AYFC		; save and convert integer AY to FAC1 and return
+
+; get first value for OR, AND or EOR
+
+GetFirst
+	JSR	LAB_EVIR		; evaluate integer expression (no sign check)
+	LDA	FAC1_2		; get FAC1 mantissa2
+	STA	XOAw_h		; save it
+	LDA	FAC1_3		; get FAC1 mantissa3
+	STA	XOAw_l		; save it
+	JSR	LAB_279B		; copy FAC2 to FAC1 (get 2nd value in expression)
+	JSR	LAB_EVIR		; evaluate integer expression (no sign check)
+	LDA	FAC1_3		; get FAC1 mantissa3
+LAB_1C95
+	RTS
+
+; perform comparisons
+
+; do < compare
+
+LAB_LTHAN
+	JSR	LAB_CKTM		; type match check, set C for string
+	BCS	LAB_1CAE		; branch if string
+
+					; do numeric < compare
+	LDA	FAC2_s		; get FAC2 sign (b7)
+	ORA	#$7F			; set all non sign bits
+	AND	FAC2_1		; and FAC2 mantissa1 (AND in sign bit)
+	STA	FAC2_1		; save FAC2 mantissa1
+	LDA	#<FAC2_e		; set pointer low byte to FAC2
+	LDY	#>FAC2_e		; set pointer high byte to FAC2
+	JSR	LAB_27F8		; compare FAC1 with FAC2 (AY)
+	TAX				; copy result
+	JMP	LAB_1CE1		; go evaluate result
+
+					; do string < compare
+LAB_1CAE
+	LSR	Dtypef		; clear data type flag, $FF=string, $00=numeric
+	DEC	comp_f		; clear < bit in compare function flag
+	JSR	LAB_22B6		; pop string off descriptor stack, or from top of string
+					; space returns with A = length, X=pointer low byte,
+					; Y=pointer high byte
+	STA	str_ln		; save length
+	STX	str_pl		; save string pointer low byte
+	STY	str_ph		; save string pointer high byte
+	LDA	FAC2_2		; get descriptor pointer low byte
+	LDY	FAC2_3		; get descriptor pointer high byte
+	JSR	LAB_22BA		; pop (YA) descriptor off stack or from top of string space
+					; returns with A = length, X=pointer low byte,
+					; Y=pointer high byte
+	STX	FAC2_2		; save string pointer low byte
+	STY	FAC2_3		; save string pointer high byte
+	TAX				; copy length
+	SEC				; set carry for subtract
+	SBC	str_ln		; subtract string 1 length
+	BEQ	LAB_1CD6		; branch if str 1 length = string 2 length
+
+	LDA	#$01			; set str 1 length > string 2 length
+	BCC	LAB_1CD6		; branch if so
+
+	LDX	str_ln		; get string 1 length
+	LDA	#$FF			; set str 1 length < string 2 length
+LAB_1CD6
+	STA	FAC1_s		; save length compare
+	LDY	#$FF			; set index
+	INX				; adjust for loop
+LAB_1CDB
+	INY				; increment index
+	DEX				; decrement count
+	BNE	LAB_1CE6		; branch if still bytes to do
+
+	LDX	FAC1_s		; get length compare back
+LAB_1CE1
+	BMI	LAB_1CF2		; branch if str 1 < str 2
+
+	CLC				; flag str 1 <= str 2
+	BCC	LAB_1CF2		; go evaluate result
+
+LAB_1CE6
+	LDA	(FAC2_2),Y		; get string 2 byte
+	CMP	(FAC1_1),Y		; compare with string 1 byte
+	BEQ	LAB_1CDB		; loop if bytes =
+
+	LDX	#$FF			; set str 1 < string 2
+	BCS	LAB_1CF2		; branch if so
+
+	LDX	#$01			;  set str 1 > string 2
+LAB_1CF2
+	INX				; x = 0, 1 or 2
+	TXA				; copy to A
+	ROL				; *2 (1, 2 or 4)
+	AND	Cflag			; AND with comparison evaluation flag
+	BEQ	LAB_1CFB		; branch if 0 (compare is false)
+
+	LDA	#$FF			; else set result true
+LAB_1CFB
+	JMP	LAB_27DB		; save A as integer byte and return
+
+LAB_1CFE
+	JSR	LAB_1C01		; scan for ",", else do syntax error then warm start
+
+; perform DIM
+
+LAB_DIM
+	TAX				; copy "DIM" flag to X
+	JSR	LAB_1D10		; search for variable
+	JSR	LAB_GBYT		; scan memory
+	BNE	LAB_1CFE		; scan for "," and loop if not null
+
+	RTS
+
+; perform << (left shift)
+
+LAB_LSHIFT
+	JSR	GetPair		; get integer expression and byte (no sign check)
+	LDA	FAC1_2		; get expression high byte
+	LDX	TempB			; get shift count
+	BEQ	NoShift		; branch if zero
+
+	CPX	#$10			; compare bit count with 16d
+	BCS	TooBig		; branch if >=
+
+Ls_loop
+	ASL	FAC1_3		; shift low byte
+	ROL				; shift high byte
+	DEX				; decrement bit count
+	BNE	Ls_loop		; loop if shift not complete
+
+	LDY	FAC1_3		; get expression low byte
+	JMP	LAB_AYFC		; save and convert integer AY to FAC1 and return
+
+; perform >> (right shift)
+
+LAB_RSHIFT
+	JSR	GetPair		; get integer expression and byte (no sign check)
+	LDA	FAC1_2		; get expression high byte
+	LDX	TempB			; get shift count
+	BEQ	NoShift		; branch if zero
+
+	CPX	#$10			; compare bit count with 16d
+	BCS	TooBig		; branch if >=
+
+Rs_loop
+	LSR				; shift high byte
+	ROR	FAC1_3		; shift low byte
+	DEX				; decrement bit count
+	BNE	Rs_loop		; loop if shift not complete
+
+NoShift
+	LDY	FAC1_3		; get expression low byte
+	JMP	LAB_AYFC		; save and convert integer AY to FAC1 and return
+
+TooBig
+	LDA	#$00			; clear high byte
+	TAY				; copy to low byte
+	JMP	LAB_AYFC		; save and convert integer AY to FAC1 and return
+
+GetPair
+	JSR	LAB_EVBY		; evaluate byte expression, result in X
+	STX	TempB			; save it
+	JSR	LAB_279B		; copy FAC2 to FAC1 (get 2nd value in expression)
+	JMP	LAB_EVIR		; evaluate integer expression (no sign check)
+
+; search for variable
+
+; return pointer to variable in Cvaral/Cvarah
+
+LAB_GVAR
+	LDX	#$00			; set DIM flag = $00
+	JSR	LAB_GBYT		; scan memory (1st character)
+LAB_1D10
+	STX	Defdim		; save DIM flag
+LAB_1D12
+	STA	Varnm1		; save 1st character
+	AND	#$7F			; clear FN flag bit
+	JSR	LAB_CASC		; check byte, return C=0 if<"A" or >"Z"
+	BCS	LAB_1D1F		; branch if ok
+
+	JMP	LAB_SNER		; else syntax error then warm start
+
+					; was variable name so ..
+LAB_1D1F
+	LDX	#$00			; clear 2nd character temp
+	STX	Dtypef		; clear data type flag, $FF=string, $00=numeric
+	JSR	LAB_IGBY		; increment and scan memory (2nd character)
+	BCC	LAB_1D2D		; branch if character = "0"-"9" (ok)
+
+					; 2nd character wasn't "0" to "9" so ..
+	JSR	LAB_CASC		; check byte, return C=0 if<"A" or >"Z"
+	BCC	LAB_1D38		; branch if <"A" or >"Z" (go check if string)
+
+LAB_1D2D
+	TAX				; copy 2nd character
+
+					; ignore further (valid) characters in the variable name
+LAB_1D2E
+	JSR	LAB_IGBY		; increment and scan memory (3rd character)
+	BCC	LAB_1D2E		; loop if character = "0"-"9" (ignore)
+
+	JSR	LAB_CASC		; check byte, return C=0 if<"A" or >"Z"
+	BCS	LAB_1D2E		; loop if character = "A"-"Z" (ignore)
+
+					; check if string variable
+LAB_1D38
+	CMP	#"$"			; compare with "$"
+	BNE	LAB_1D47		; branch if not string
+
+; to introduce a new variable type (% suffix for integers say) then this branch
+; will need to go to that check and then that branch, if it fails, go to LAB_1D47
+
+					; type is string
+	LDA	#$FF			; set data type = string
+	STA	Dtypef		; set data type flag, $FF=string, $00=numeric
+	TXA				; get 2nd character back
+	ORA	#$80			; set top bit (indicate string var)
+	TAX				; copy back to 2nd character temp
+	JSR	LAB_IGBY		; increment and scan memory
+
+; after we have determined the variable type we need to come back here to determine
+; if it's an array of type. this would plug in a%(b[,c[,d]])) integer arrays nicely
+
+
+LAB_1D47				; gets here with character after var name in A
+	STX	Varnm2		; save 2nd character
+	ORA	Sufnxf		; or with subscript/FNX flag (or FN name)
+	CMP	#"("			; compare with "("
+	BNE	LAB_1D53		; branch if not "("
+
+	JMP	LAB_1E17		; go find, or make, array
+
+; either find or create var
+; var name (1st two characters only!) is in Varnm1,Varnm2
+
+					; variable name wasn't var(... so look for plain var
+LAB_1D53
+	LDA	#$00			; clear A
+	STA	Sufnxf		; clear subscript/FNX flag
+	LDA	Svarl			; get start of vars low byte
+	LDX	Svarh			; get start of vars high byte
+	LDY	#$00			; clear index
+LAB_1D5D
+	STX	Vrschh		; save search address high byte
+LAB_1D5F
+	STA	Vrschl		; save search address low byte
+	CPX	Sarryh		; compare high address with var space end
+	BNE	LAB_1D69		; skip next compare if <>
+
+					; high addresses were = so compare low addresses
+	CMP	Sarryl		; compare low address with var space end
+	BEQ	LAB_1D8B		; if not found go make new var
+
+LAB_1D69
+	LDA	Varnm1		; get 1st character of var to find
+	CMP	(Vrschl),Y		; compare with variable name 1st character
+	BNE	LAB_1D77		; branch if no match
+
+					; 1st characters match so compare 2nd characters
+	LDA	Varnm2		; get 2nd character of var to find
+	INY				; index to point to variable name 2nd character
+	CMP	(Vrschl),Y		; compare with variable name 2nd character
+	BEQ	LAB_1DD7		; branch if match (found var)
+
+	DEY				; else decrement index (now = $00)
+LAB_1D77
+	CLC				; clear carry for add
+	LDA	Vrschl		; get search address low byte
+	ADC	#$06			; +6 (offset to next var name)
+	BCC	LAB_1D5F		; loop if no overflow to high byte
+
+	INX				; else increment high byte
+	BNE	LAB_1D5D		; loop always (RAM doesn't extend to $FFFF !)
+
+; check byte, return C=0 if<"A" or >"Z" or "a" to "z"
+
+LAB_CASC
+	CMP	#"a"			; compare with "a"
+	BCS	LAB_1D83		; go check <"z"+1
+
+; check byte, return C=0 if<"A" or >"Z"
+
+LAB_1D82
+	CMP	#"A"			; compare with "A"
+	BCC	LAB_1D8A		; exit if less
+
+					; carry is set
+	SBC	#$5B			; subtract "Z"+1
+	SEC				; set carry
+	SBC	#$A5			; subtract $A5 (restore byte)
+					; carry clear if byte>$5A
+LAB_1D8A
+	RTS
+
+LAB_1D83
+	SBC	#$7B			; subtract "z"+1
+	SEC				; set carry
+	SBC	#$85			; subtract $85 (restore byte)
+					; carry clear if byte>$7A
+	RTS
+
+					; reached end of variable mem without match
+					; .. so create new variable
+LAB_1D8B
+	PLA				; pop return address low byte
+	PHA				; push return address low byte
+LAB_1C18p2	= LAB_1C18+2
+	CMP	#<LAB_1C18p2	; compare with expected calling routine return low byte
+	BNE	LAB_1D98		; if not get (var) go create new var
+
+; This will only drop through if the call was from LAB_1C18 and is only called
+; from there if it is searching for a variable from the RHS of a LET a=b statement
+; it prevents the creation of variables not assigned a value.
+
+; value returned by this is either numeric zero (exponent byte is $00) or null string
+; (descriptor length byte is $00). in fact a pointer to any $00 byte would have done.
+
+; doing this saves 6 bytes of variable memory and 168 machine cycles of time
+
+; this is where you would put the undefined variable error call e.g.
+
+;					; variable doesn't exist so flag error
+;	LDX	#$24			; error code $24 ("undefined variable" error)
+;	JMP	LAB_XERR		; do error #X then warm start
+
+; the above code has been tested and works a treat! (it replaces the three code lines
+; below)
+
+					; else return dummy null value
+	LDA	#<LAB_1D96		; low byte point to $00,$00
+					; (uses part of misc constants table)
+	LDY	#>LAB_1D96		; high byte point to $00,$00
+	RTS
+
+					; create new numeric variable
+LAB_1D98
+	LDA	Sarryl		; get var mem end low byte
+	LDY	Sarryh		; get var mem end high byte
+	STA	Ostrtl		; save old block start low byte
+	STY	Ostrth		; save old block start high byte
+	LDA	Earryl		; get array mem end low byte
+	LDY	Earryh		; get array mem end high byte
+	STA	Obendl		; save old block end low byte
+	STY	Obendh		; save old block end high byte
+	CLC				; clear carry for add
+	ADC	#$06			; +6 (space for one var)
+	BCC	LAB_1DAE		; branch if no overflow to high byte
+
+	INY				; else increment high byte
+LAB_1DAE
+	STA	Nbendl		; set new block end low byte
+	STY	Nbendh		; set new block end high byte
+	JSR	LAB_11CF		; open up space in memory
+	LDA	Nbendl		; get new start low byte
+	LDY	Nbendh		; get new start high byte (-$100)
+	INY				; correct high byte
+	STA	Sarryl		; save new var mem end low byte
+	STY	Sarryh		; save new var mem end high byte
+	LDY	#$00			; clear index
+	LDA	Varnm1		; get var name 1st character
+	STA	(Vrschl),Y		; save var name 1st character
+	INY				; increment index
+	LDA	Varnm2		; get var name 2nd character
+	STA	(Vrschl),Y		; save var name 2nd character
+	LDA	#$00			; clear A
+	INY				; increment index
+	STA	(Vrschl),Y		; initialise var byte
+	INY				; increment index
+	STA	(Vrschl),Y		; initialise var byte
+	INY				; increment index
+	STA	(Vrschl),Y		; initialise var byte
+	INY				; increment index
+	STA	(Vrschl),Y		; initialise var byte
+
+					; found a match for var ((Vrschl) = ptr)
+LAB_1DD7
+	LDA	Vrschl		; get var address low byte
+	CLC				; clear carry for add
+	ADC	#$02			; +2 (offset past var name bytes)
+	LDY	Vrschh		; get var address high byte
+	BCC	LAB_1DE1		; branch if no overflow from add
+
+	INY				; else increment high byte
+LAB_1DE1
+	STA	Cvaral		; save current var address low byte
+	STY	Cvarah		; save current var address high byte
+	RTS
+
+; set-up array pointer (Adatal/h) to first element in array
+; set Adatal,Adatah to Astrtl,Astrth+2*Dimcnt+#$05
+
+LAB_1DE6
+	LDA	Dimcnt		; get # of dimensions (1, 2 or 3)
+	ASL				; *2 (also clears the carry !)
+	ADC	#$05			; +5 (result is 7, 9 or 11 here)
+	ADC	Astrtl		; add array start pointer low byte
+	LDY	Astrth		; get array pointer high byte
+	BCC	LAB_1DF2		; branch if no overflow
+
+	INY				; else increment high byte
+LAB_1DF2
+	STA	Adatal		; save array data pointer low byte
+	STY	Adatah		; save array data pointer high byte
+	RTS
+
+; evaluate integer expression
+
+LAB_EVIN
+	JSR	LAB_IGBY		; increment and scan memory
+	JSR	LAB_EVNM		; evaluate expression and check is numeric,
+					; else do type mismatch
+
+; evaluate integer expression (no check)
+
+LAB_EVPI
+	LDA	FAC1_s		; get FAC1 sign (b7)
+	BMI	LAB_1E12		; do function call error if -ve
+
+; evaluate integer expression (no sign check)
+
+LAB_EVIR
+	LDA	FAC1_e		; get FAC1 exponent
+	CMP	#$90			; compare with exponent = 2^16 (n>2^15)
+	BCC	LAB_1E14		; branch if n<2^16 (is ok)
+
+	LDA	#<LAB_1DF7		; set pointer low byte to -32768
+	LDY	#>LAB_1DF7		; set pointer high byte to -32768
+	JSR	LAB_27F8		; compare FAC1 with (AY)
+LAB_1E12
+	BNE	LAB_FCER		; if <> do function call error then warm start
+
+LAB_1E14
+	JMP	LAB_2831		; convert FAC1 floating-to-fixed and return
+
+; find or make array
+
+LAB_1E17
+	LDA	Defdim		; get DIM flag
+	PHA				; push it
+	LDA	Dtypef		; get data type flag, $FF=string, $00=numeric
+	PHA				; push it
+	LDY	#$00			; clear dimensions count
+
+; now get the array dimension(s) and stack it (them) before the data type and DIM flag
+
+LAB_1E1F
+	TYA				; copy dimensions count
+	PHA				; save it
+	LDA	Varnm2		; get array name 2nd byte
+	PHA				; save it
+	LDA	Varnm1		; get array name 1st byte
+	PHA				; save it
+	JSR	LAB_EVIN		; evaluate integer expression
+	PLA				; pull array name 1st byte
+	STA	Varnm1		; restore array name 1st byte
+	PLA				; pull array name 2nd byte
+	STA	Varnm2		; restore array name 2nd byte
+	PLA				; pull dimensions count
+	TAY				; restore it
+	TSX				; copy stack pointer
+	LDA	LAB_STAK+2,X	; get DIM flag
+	PHA				; push it
+	LDA	LAB_STAK+1,X	; get data type flag
+	PHA				; push it
+	LDA	FAC1_2		; get this dimension size high byte
+	STA	LAB_STAK+2,X	; stack before flag bytes
+	LDA	FAC1_3		; get this dimension size low byte
+	STA	LAB_STAK+1,X	; stack before flag bytes
+	INY				; increment dimensions count
+	JSR	LAB_GBYT		; scan memory
+	CMP	#","			; compare with ","
+	BEQ	LAB_1E1F		; if found go do next dimension
+
+	STY	Dimcnt		; store dimensions count
+	JSR	LAB_1BFB		; scan for ")" , else do syntax error then warm start
+	PLA				; pull data type flag
+	STA	Dtypef		; restore data type flag, $FF=string, $00=numeric
+	PLA				; pull DIM flag
+	STA	Defdim		; restore DIM flag
+	LDX	Sarryl		; get array mem start low byte
+	LDA	Sarryh		; get array mem start high byte
+
+; now check to see if we are at the end of array memory (we would be if there were
+; no arrays).
+
+LAB_1E5C
+	STX	Astrtl		; save as array start pointer low byte
+	STA	Astrth		; save as array start pointer high byte
+	CMP	Earryh		; compare with array mem end high byte
+	BNE	LAB_1E68		; branch if not reached array mem end
+
+	CPX	Earryl		; else compare with array mem end low byte
+	BEQ	LAB_1EA1		; go build array if not found
+
+					; search for array
+LAB_1E68
+	LDY	#$00			; clear index
+	LDA	(Astrtl),Y		; get array name first byte
+	INY				; increment index to second name byte
+	CMP	Varnm1		; compare with this array name first byte
+	BNE	LAB_1E77		; branch if no match
+
+	LDA	Varnm2		; else get this array name second byte
+	CMP	(Astrtl),Y		; compare with array name second byte
+	BEQ	LAB_1E8D		; array found so branch
+
+					; no match
+LAB_1E77
+	INY				; increment index
+	LDA	(Astrtl),Y		; get array size low byte
+	CLC				; clear carry for add
+	ADC	Astrtl		; add array start pointer low byte
+	TAX				; copy low byte to X
+	INY				; increment index
+	LDA	(Astrtl),Y		; get array size high byte
+	ADC	Astrth		; add array mem pointer high byte
+	BCC	LAB_1E5C		; if no overflow go check next array
+
+; do array bounds error
+
+LAB_1E85
+	LDX	#$10			; error code $10 ("Array bounds" error)
+	.byte	$2C			; makes next bit BIT LAB_08A2
+
+; do function call error
+
+LAB_FCER
+	LDX	#$08			; error code $08 ("Function call" error)
+LAB_1E8A
+	JMP	LAB_XERR		; do error #X, then warm start
+
+					; found array, are we trying to dimension it?
+LAB_1E8D
+	LDX	#$12			; set error $12 ("Double dimension" error)
+	LDA	Defdim		; get DIM flag
+	BNE	LAB_1E8A		; if we are trying to dimension it do error #X, then warm
+					; start
+
+; found the array and we"re not dimensioning it so we must find an element in it
+
+	JSR	LAB_1DE6		; set-up array pointer (Adatal/h) to first element in array
+					; (Astrtl,Astrth points to start of array)
+	LDA	Dimcnt		; get dimensions count
+	LDY	#$04			; set index to array's # of dimensions
+	CMP	(Astrtl),Y		; compare with no of dimensions
+	BNE	LAB_1E85		; if wrong do array bounds error, could do "Wrong
+					; dimensions" error here .. if we want a different
+					; error message
+
+	JMP	LAB_1F28		; found array so go get element
+					; (could jump to LAB_1F28 as all LAB_1F24 does is take
+					; Dimcnt and save it at (Astrtl),Y which is already the
+					; same or we would have taken the BNE)
+
+					; array not found, so build it
+LAB_1EA1
+	JSR	LAB_1DE6		; set-up array pointer (Adatal/h) to first element in array
+					; (Astrtl,Astrth points to start of array)
+	JSR	LAB_121F		; check available memory, "Out of memory" error if no room
+					; addr to check is in AY (low/high)
+	LDY	#$00			; clear Y (don't need to clear A)
+	STY	Aspth			; clear array data size high byte
+	LDA	Varnm1		; get variable name 1st byte
+	STA	(Astrtl),Y		; save array name 1st byte
+	INY				; increment index
+	LDA	Varnm2		; get variable name 2nd byte
+	STA	(Astrtl),Y		; save array name 2nd byte
+	LDA	Dimcnt		; get dimensions count
+	LDY	#$04			; index to dimension count
+	STY	Asptl			; set array data size low byte (four bytes per element)
+	STA	(Astrtl),Y		; set array's dimensions count
+
+					; now calculate the size of the data space for the array
+	CLC				; clear carry for add (clear on subsequent loops)
+LAB_1EC0
+	LDX	#$0B			; set default dimension value low byte
+	LDA	#$00			; set default dimension value high byte
+	BIT	Defdim		; test default DIM flag
+	BVC	LAB_1ED0		; branch if b6 of Defdim is clear
+
+	PLA				; else pull dimension value low byte
+	ADC	#$01			; +1 (allow for zeroeth element)
+	TAX				; copy low byte to X
+	PLA				; pull dimension value high byte
+	ADC	#$00			; add carry from low byte
+
+LAB_1ED0
+	INY				; index to dimension value high byte
+	STA	(Astrtl),Y		; save dimension value high byte
+	INY				; index to dimension value high byte
+	TXA				; get dimension value low byte
+	STA	(Astrtl),Y		; save dimension value low byte
+	JSR	LAB_1F7C		; does XY = (Astrtl),Y * (Asptl)
+	STX	Asptl			; save array data size low byte
+	STA	Aspth			; save array data size high byte
+	LDY	ut1_pl		; restore index (saved by subroutine)
+	DEC	Dimcnt		; decrement dimensions count
+	BNE	LAB_1EC0		; loop while not = 0
+
+	ADC	Adatah		; add size high byte to first element high byte
+					; (carry is always clear here)
+	BCS	LAB_1F45		; if overflow go do "Out of memory" error
+
+	STA	Adatah		; save end of array high byte
+	TAY				; copy end high byte to Y
+	TXA				; get array size low byte
+	ADC	Adatal		; add array start low byte
+	BCC	LAB_1EF3		; branch if no carry
+
+	INY				; else increment end of array high byte
+	BEQ	LAB_1F45		; if overflow go do "Out of memory" error
+
+					; set-up mostly complete, now zero the array
+LAB_1EF3
+	JSR	LAB_121F		; check available memory, "Out of memory" error if no room
+					; addr to check is in AY (low/high)
+	STA	Earryl		; save array mem end low byte
+	STY	Earryh		; save array mem end high byte
+	LDA	#$00			; clear byte for array clear
+	INC	Aspth			; increment array size high byte (now block count)
+	LDY	Asptl			; get array size low byte (now index to block)
+	BEQ	LAB_1F07		; branch if low byte = $00
+
+LAB_1F02
+	DEY				; decrement index (do 0 to n-1)
+	STA	(Adatal),Y		; zero byte
+	BNE	LAB_1F02		; loop until this block done
+
+LAB_1F07
+	DEC	Adatah		; decrement array pointer high byte
+	DEC	Aspth			; decrement block count high byte
+	BNE	LAB_1F02		; loop until all blocks done
+
+	INC	Adatah		; correct for last loop
+	SEC				; set carry for subtract
+	LDY	#$02			; index to array size low byte
+	LDA	Earryl		; get array mem end low byte
+	SBC	Astrtl		; subtract array start low byte
+	STA	(Astrtl),Y		; save array size low byte
+	INY				; index to array size high byte
+	LDA	Earryh		; get array mem end high byte
+	SBC	Astrth		; subtract array start high byte
+	STA	(Astrtl),Y		; save array size high byte
+	LDA	Defdim		; get default DIM flag
+	BNE	LAB_1F7B		; exit (RET) if this was a DIM command
+
+					; else, find element
+	INY				; index to # of dimensions
+
+LAB_1F24
+	LDA	(Astrtl),Y		; get array's dimension count
+	STA	Dimcnt		; save it
+
+; we have found, or built, the array. now we need to find the element
+
+LAB_1F28
+	LDA	#$00			; clear byte
+	STA	Asptl			; clear array data pointer low byte
+LAB_1F2C
+	STA	Aspth			; save array data pointer high byte
+	INY				; increment index (point to array bound high byte)
+	PLA				; pull array index low byte
+	TAX				; copy to X
+	STA	FAC1_2		; save index low byte to FAC1 mantissa2
+	PLA				; pull array index high byte
+	STA	FAC1_3		; save index high byte to FAC1 mantissa3
+	CMP	(Astrtl),Y		; compare with array bound high byte
+	BCC	LAB_1F48		; branch if within bounds
+
+	BNE	LAB_1F42		; if outside bounds do array bounds error
+
+					; else high byte was = so test low bytes
+	INY				; index to array bound low byte
+	TXA				; get array index low byte
+	CMP	(Astrtl),Y		; compare with array bound low byte
+	BCC	LAB_1F49		; branch if within bounds
+
+LAB_1F42
+	JMP	LAB_1E85		; else do array bounds error
+
+LAB_1F45
+	JMP	LAB_OMER		; do "Out of memory" error then warm start
+
+LAB_1F48
+	INY				; index to array bound low byte
+LAB_1F49
+	LDA	Aspth			; get array data pointer high byte
+	ORA	Asptl			; OR with array data pointer low byte
+	BEQ	LAB_1F5A		; branch if array data pointer = null (skip multiply)
+
+	JSR	LAB_1F7C		; does XY = (Astrtl),Y * (Asptl)
+	TXA				; get result low byte
+	ADC	FAC1_2		; add index low byte from FAC1 mantissa2
+	TAX				; save result low byte
+	TYA				; get result high byte
+	LDY	ut1_pl		; restore index
+LAB_1F5A
+	ADC	FAC1_3		; add index high byte from FAC1 mantissa3
+	STX	Asptl			; save array data pointer low byte
+	DEC	Dimcnt		; decrement dimensions count
+	BNE	LAB_1F2C		; loop if dimensions still to do
+
+	ASL	Asptl			; array data pointer low byte * 2
+	ROL				; array data pointer high byte * 2
+	ASL	Asptl			; array data pointer low byte * 4
+	ROL				; array data pointer high byte * 4
+	TAY				; copy high byte
+	LDA	Asptl			; get low byte
+	ADC	Adatal		; add array data start pointer low byte
+	STA	Cvaral		; save as current var address low byte
+	TYA				; get high byte back
+	ADC	Adatah		; add array data start pointer high byte
+	STA	Cvarah		; save as current var address high byte
+	TAY				; copy high byte to Y
+	LDA	Cvaral		; get current var address low byte
+LAB_1F7B
+	RTS
+
+; does XY = (Astrtl),Y * (Asptl)
+
+LAB_1F7C
+	STY	ut1_pl		; save index
+	LDA	(Astrtl),Y		; get dimension size low byte
+	STA	dims_l		; save dimension size low byte
+	DEY				; decrement index
+	LDA	(Astrtl),Y		; get dimension size high byte
+	STA	dims_h		; save dimension size high byte
+
+	LDA	#$10			; count = $10 (16 bit multiply)
+	STA	numbit		; save bit count
+	LDX	#$00			; clear result low byte
+	LDY	#$00			; clear result high byte
+LAB_1F8F
+	TXA				; get result low byte
+	ASL				; *2
+	TAX				; save result low byte
+	TYA				; get result high byte
+	ROL				; *2
+	TAY				; save result high byte
+	BCS	LAB_1F45		; if overflow go do "Out of memory" error
+
+	ASL	Asptl			; shift multiplier low byte
+	ROL	Aspth			; shift multiplier high byte
+	BCC	LAB_1FA8		; skip add if no carry
+
+	CLC				; else clear carry for add
+	TXA				; get result low byte
+	ADC	dims_l		; add dimension size low byte
+	TAX				; save result low byte
+	TYA				; get result high byte
+	ADC	dims_h		; add dimension size high byte
+	TAY				; save result high byte
+	BCS	LAB_1F45		; if overflow go do "Out of memory" error
+
+LAB_1FA8
+	DEC	numbit		; decrement bit count
+	BNE	LAB_1F8F		; loop until all done
+
+	RTS
+
+; perform FRE()
+
+LAB_FRE
+	LDA	Dtypef		; get data type flag, $FF=string, $00=numeric
+	BPL	LAB_1FB4		; branch if numeric
+
+	JSR	LAB_22B6		; pop string off descriptor stack, or from top of string
+					; space returns with A = length, X=$71=pointer low byte,
+					; Y=$72=pointer high byte
+
+					; FRE(n) was numeric so do this
+LAB_1FB4
+	JSR	LAB_GARB		; go do garbage collection
+	SEC				; set carry for subtract
+	LDA	Sstorl		; get bottom of string space low byte
+	SBC	Earryl		; subtract array mem end low byte
+	TAY				; copy result to Y
+	LDA	Sstorh		; get bottom of string space high byte
+	SBC	Earryh		; subtract array mem end high byte
+
+; save and convert integer AY to FAC1
+
+LAB_AYFC
+	LSR	Dtypef		; clear data type flag, $FF=string, $00=numeric
+	STA	FAC1_1		; save FAC1 mantissa1
+	STY	FAC1_2		; save FAC1 mantissa2
+	LDX	#$90			; set exponent=2^16 (integer)
+	JMP	LAB_27E3		; set exp=X, clear FAC1_3, normalise and return
+
+; perform POS()
+
+LAB_POS
+	LDY	TPos			; get terminal position
+
+; convert Y to byte in FAC1
+
+LAB_1FD0
+	LDA	#$00			; clear high byte
+	BEQ	LAB_AYFC		; always save and convert integer AY to FAC1 and return
+
+; check not Direct (used by DEF and INPUT)
+
+LAB_CKRN
+	LDX	Clineh		; get current line high byte
+	INX				; increment it
+	BNE	LAB_1F7B		; return if can continue not direct mode
+
+					; else do illegal direct error
+LAB_1FD9
+	LDX	#$16			; error code $16 ("Illegal direct" error)
+LAB_1FDB
+	JMP	LAB_XERR		; go do error #X, then warm start
+
+; perform DEF
+
+LAB_DEF
+	JSR	LAB_200B		; check FNx syntax
+	STA	func_l		; save function pointer low byte
+	STY	func_h		; save function pointer high byte
+	JSR	LAB_CKRN		; check not Direct (back here if ok)
+	JSR	LAB_1BFE		; scan for "(" , else do syntax error then warm start
+	LDA	#$80			; set flag for FNx
+	STA	Sufnxf		; save subscript/FNx flag
+	JSR	LAB_GVAR		; get (var) address
+	JSR	LAB_CTNM		; check if source is numeric, else do type mismatch
+	JSR	LAB_1BFB		; scan for ")" , else do syntax error then warm start
+	LDA	#TK_EQUAL		; get = token
+	JSR	LAB_SCCA		; scan for CHR$(A), else do syntax error then warm start
+	LDA	Cvarah		; get current var address high byte
+	PHA				; push it
+	LDA	Cvaral		; get current var address low byte
+	PHA				; push it
+	LDA	Bpntrh		; get BASIC execute pointer high byte
+	PHA				; push it
+	LDA	Bpntrl		; get BASIC execute pointer low byte
+	PHA				; push it
+	JSR	LAB_DATA		; go perform DATA
+	JMP	LAB_207A		; put execute pointer and variable pointer into function
+					; and return
+
+; check FNx syntax
+
+LAB_200B
+	LDA	#TK_FN		; get FN" token
+	JSR	LAB_SCCA		; scan for CHR$(A) , else do syntax error then warm start
+					; return character after A
+	ORA	#$80			; set FN flag bit
+	STA	Sufnxf		; save FN flag so array variable test fails
+	JSR	LAB_1D12		; search for FN variable
+	JMP	LAB_CTNM		; check if source is numeric and return, else do type
+					; mismatch
+
+					; Evaluate FNx
+LAB_201E
+	JSR	LAB_200B		; check FNx syntax
+	PHA				; push function pointer low byte
+	TYA				; copy function pointer high byte
+	PHA				; push function pointer high byte
+	JSR	LAB_1BFE		; scan for "(", else do syntax error then warm start
+	JSR	LAB_EVEX		; evaluate expression
+	JSR	LAB_1BFB		; scan for ")", else do syntax error then warm start
+	JSR	LAB_CTNM		; check if source is numeric, else do type mismatch
+	PLA				; pop function pointer high byte
+	STA	func_h		; restore it
+	PLA				; pop function pointer low byte
+	STA	func_l		; restore it
+	LDX	#$20			; error code $20 ("Undefined function" error)
+	LDY	#$03			; index to variable pointer high byte
+	LDA	(func_l),Y		; get variable pointer high byte
+	BEQ	LAB_1FDB		; if zero go do undefined function error
+
+	STA	Cvarah		; save variable address high byte
+	DEY				; index to variable address low byte
+	LDA	(func_l),Y		; get variable address low byte
+	STA	Cvaral		; save variable address low byte
+	TAX				; copy address low byte
+
+					; now stack the function variable value before use
+	INY				; index to mantissa_3
+LAB_2043
+	LDA	(Cvaral),Y		; get byte from variable
+	PHA				; stack it
+	DEY				; decrement index
+	BPL	LAB_2043		; loop until variable stacked
+
+	LDY	Cvarah		; get variable address high byte
+	JSR	LAB_2778		; pack FAC1 (function expression value) into (XY)
+					; (function variable), return Y=0, always
+	LDA	Bpntrh		; get BASIC execute pointer high byte
+	PHA				; push it
+	LDA	Bpntrl		; get BASIC execute pointer low byte
+	PHA				; push it
+	LDA	(func_l),Y		; get function execute pointer low byte
+	STA	Bpntrl		; save as BASIC execute pointer low byte
+	INY				; index to high byte
+	LDA	(func_l),Y		; get function execute pointer high byte
+	STA	Bpntrh		; save as BASIC execute pointer high byte
+	LDA	Cvarah		; get variable address high byte
+	PHA				; push it
+	LDA	Cvaral		; get variable address low byte
+	PHA				; push it
+	JSR	LAB_EVNM		; evaluate expression and check is numeric,
+					; else do type mismatch
+	PLA				; pull variable address low byte
+	STA	func_l		; save variable address low byte
+	PLA				; pull variable address high byte
+	STA	func_h		; save variable address high byte
+	JSR	LAB_GBYT		; scan memory
+	BEQ	LAB_2074		; branch if null (should be [EOL] marker)
+
+	JMP	LAB_SNER		; else syntax error then warm start
+
+; restore Bpntrl,Bpntrh and function variable from stack
+
+LAB_2074
+	PLA				; pull BASIC execute pointer low byte
+	STA	Bpntrl		; restore BASIC execute pointer low byte
+	PLA				; pull BASIC execute pointer high byte
+	STA	Bpntrh		; restore BASIC execute pointer high byte
+
+; put execute pointer and variable pointer into function
+
+LAB_207A
+	LDY	#$00			; clear index
+	PLA				; pull BASIC execute pointer low byte
+	STA	(func_l),Y		; save to function
+	INY				; increment index
+	PLA				; pull BASIC execute pointer high byte
+	STA	(func_l),Y		; save to function
+	INY				; increment index
+	PLA				; pull current var address low byte
+	STA	(func_l),Y		; save to function
+	INY				; increment index
+	PLA				; pull current var address high byte
+	STA	(func_l),Y		; save to function
+	RTS
+
+; perform STR$()
+
+LAB_STRS
+	JSR	LAB_CTNM		; check if source is numeric, else do type mismatch
+	JSR	LAB_296E		; convert FAC1 to string
+	LDA	#<Decssp1		; set result string low pointer
+	LDY	#>Decssp1		; set result string high pointer
+	BEQ	LAB_20AE		; print null terminated string to Sutill/Sutilh
+
+; Do string vector
+; copy des_pl/h to des_2l/h and make string space A bytes long
+
+LAB_209C
+	LDX	des_pl		; get descriptor pointer low byte
+	LDY	des_ph		; get descriptor pointer high byte
+	STX	des_2l		; save descriptor pointer low byte
+	STY	des_2h		; save descriptor pointer high byte
+
+; make string space A bytes long
+; A=length, X=Sutill=ptr low byte, Y=Sutilh=ptr high byte
+
+LAB_MSSP
+	JSR	LAB_2115		; make space in string memory for string A long
+					; return X=Sutill=ptr low byte, Y=Sutilh=ptr high byte
+	STX	str_pl		; save string pointer low byte
+	STY	str_ph		; save string pointer high byte
+	STA	str_ln		; save length
+	RTS
+
+; Scan, set up string
+; print " terminated string to Sutill/Sutilh
+
+LAB_20AE
+	LDX	#$22			; set terminator to "
+	STX	Srchc			; set search character (terminator 1)
+	STX	Asrch			; set terminator 2
+
+; print [Srchc] or [Asrch] terminated string to Sutill/Sutilh
+; source is AY
+
+LAB_20B4
+	STA	ssptr_l		; store string start low byte
+	STY	ssptr_h		; store string start high byte
+	STA	str_pl		; save string pointer low byte
+	STY	str_ph		; save string pointer high byte
+	LDY	#$FF			; set length to -1
+LAB_20BE
+	INY				; increment length
+	LDA	(ssptr_l),Y		; get byte from string
+	BEQ	LAB_20CF		; exit loop if null byte [EOS]
+
+	CMP	Srchc			; compare with search character (terminator 1)
+	BEQ	LAB_20CB		; branch if terminator
+
+	CMP	Asrch			; compare with terminator 2
+	BNE	LAB_20BE		; loop if not terminator 2
+
+LAB_20CB
+	CMP	#$22			; compare with "
+	BEQ	LAB_20D0		; branch if " (carry set if = !)
+
+LAB_20CF
+	CLC				; clear carry for add (only if [EOL] terminated string)
+LAB_20D0
+	STY	str_ln		; save length in FAC1 exponent
+	TYA				; copy length to A
+	ADC	ssptr_l		; add string start low byte
+	STA	Sendl			; save string end low byte
+	LDX	ssptr_h		; get string start high byte
+	BCC	LAB_20DC		; branch if no low byte overflow
+
+	INX				; else increment high byte
+LAB_20DC
+	STX	Sendh			; save string end high byte
+	LDA	ssptr_h		; get string start high byte
+	CMP	#>Ram_base		; compare with start of program memory
+	BCS	LAB_RTST		; branch if not in utility area
+
+					; string in utility area, move to string memory
+	TYA				; copy length to A
+	JSR	LAB_209C		; copy des_pl/h to des_2l/h and make string space A bytes
+					; long
+	LDX	ssptr_l		; get string start low byte
+	LDY	ssptr_h		; get string start high byte
+	JSR	LAB_2298		; store string A bytes long from XY to (Sutill)
+
+; check for space on descriptor stack then ..
+; put string address and length on descriptor stack and update stack pointers
+
+LAB_RTST
+	LDX	next_s		; get string stack pointer
+	CPX	#des_sk+$09		; compare with max+1
+	BNE	LAB_20F8		; branch if space on string stack
+
+					; else do string too complex error
+	LDX	#$1C			; error code $1C ("String too complex" error)
+LAB_20F5
+	JMP	LAB_XERR		; do error #X, then warm start
+
+; put string address and length on descriptor stack and update stack pointers
+
+LAB_20F8
+	LDA	str_ln		; get string length
+	STA	PLUS_0,X		; put on string stack
+	LDA	str_pl		; get string pointer low byte
+	STA	PLUS_1,X		; put on string stack
+	LDA	str_ph		; get string pointer high byte
+	STA	PLUS_2,X		; put on string stack
+	LDY	#$00			; clear Y
+	STX	des_pl		; save string descriptor pointer low byte
+	STY	des_ph		; save string descriptor pointer high byte (always $00)
+	DEY				; Y = $FF
+	STY	Dtypef		; save data type flag, $FF=string
+	STX	last_sl		; save old stack pointer (current top item)
+	INX				; update stack pointer
+	INX				; update stack pointer
+	INX				; update stack pointer
+	STX	next_s		; save new top item value
+	RTS
+
+; Build descriptor
+; make space in string memory for string A long
+; return X=Sutill=ptr low byte, Y=Sutill=ptr high byte
+
+LAB_2115
+	LSR	Gclctd		; clear garbage collected flag (b7)
+
+					; make space for string A long
+LAB_2117
+	PHA				; save string length
+	EOR	#$FF			; complement it
+	SEC				; set carry for subtract (twos comp add)
+	ADC	Sstorl		; add bottom of string space low byte (subtract length)
+	LDY	Sstorh		; get bottom of string space high byte
+	BCS	LAB_2122		; skip decrement if no underflow
+
+	DEY				; decrement bottom of string space high byte
+LAB_2122
+	CPY	Earryh		; compare with array mem end high byte
+	BCC	LAB_2137		; do out of memory error if less
+
+	BNE	LAB_212C		; if not = skip next test
+
+	CMP	Earryl		; compare with array mem end low byte
+	BCC	LAB_2137		; do out of memory error if less
+
+LAB_212C
+	STA	Sstorl		; save bottom of string space low byte
+	STY	Sstorh		; save bottom of string space high byte
+	STA	Sutill		; save string utility ptr low byte
+	STY	Sutilh		; save string utility ptr high byte
+	TAX				; copy low byte to X
+	PLA				; get string length back
+	RTS
+
+LAB_2137
+	LDX	#$0C			; error code $0C ("Out of memory" error)
+	LDA	Gclctd		; get garbage collected flag
+	BMI	LAB_20F5		; if set then do error code X
+
+	JSR	LAB_GARB		; else go do garbage collection
+	LDA	#$80			; flag for garbage collected
+	STA	Gclctd		; set garbage collected flag
+	PLA				; pull length
+	BNE	LAB_2117		; go try again (loop always, length should never be = $00)
+
+; garbage collection routine
+
+LAB_GARB
+	LDX	Ememl			; get end of mem low byte
+	LDA	Ememh			; get end of mem high byte
+
+; re-run routine from last ending
+
+LAB_214B
+	STX	Sstorl		; set string storage low byte
+	STA	Sstorh		; set string storage high byte
+	LDY	#$00			; clear index
+	STY	garb_h		; clear working pointer high byte (flag no strings to move)
+	LDA	Earryl		; get array mem end low byte
+	LDX	Earryh		; get array mem end high byte
+	STA	Histrl		; save as highest string low byte
+	STX	Histrh		; save as highest string high byte
+	LDA	#des_sk		; set descriptor stack pointer
+	STA	ut1_pl		; save descriptor stack pointer low byte
+	STY	ut1_ph		; save descriptor stack pointer high byte ($00)
+LAB_2161
+	CMP	next_s		; compare with descriptor stack pointer
+	BEQ	LAB_216A		; branch if =
+
+	JSR	LAB_21D7		; go garbage collect descriptor stack
+	BEQ	LAB_2161		; loop always
+
+					; done stacked strings, now do string vars
+LAB_216A
+	ASL	g_step		; set step size = $06
+	LDA	Svarl			; get start of vars low byte
+	LDX	Svarh			; get start of vars high byte
+	STA	ut1_pl		; save as pointer low byte
+	STX	ut1_ph		; save as pointer high byte
+LAB_2176
+	CPX	Sarryh		; compare start of arrays high byte
+	BNE	LAB_217E		; branch if no high byte match
+
+	CMP	Sarryl		; else compare start of arrays low byte
+	BEQ	LAB_2183		; branch if = var mem end
+
+LAB_217E
+	JSR	LAB_21D1		; go garbage collect strings
+	BEQ	LAB_2176		; loop always
+
+					; done string vars, now do string arrays
+LAB_2183
+	STA	Nbendl		; save start of arrays low byte as working pointer
+	STX	Nbendh		; save start of arrays high byte as working pointer
+	LDA	#$04			; set step size
+	STA	g_step		; save step size
+LAB_218B
+	LDA	Nbendl		; get pointer low byte
+	LDX	Nbendh		; get pointer high byte
+LAB_218F
+	CPX	Earryh		; compare with array mem end high byte
+	BNE	LAB_219A		; branch if not at end
+
+	CMP	Earryl		; else compare with array mem end low byte
+	BEQ	LAB_2216		; tidy up and exit if at end
+
+LAB_219A
+	STA	ut1_pl		; save pointer low byte
+	STX	ut1_ph		; save pointer high byte
+	LDY	#$02			; set index
+	LDA	(ut1_pl),Y		; get array size low byte
+	ADC	Nbendl		; add start of this array low byte
+	STA	Nbendl		; save start of next array low byte
+	INY				; increment index
+	LDA	(ut1_pl),Y		; get array size high byte
+	ADC	Nbendh		; add start of this array high byte
+	STA	Nbendh		; save start of next array high byte
+	LDY	#$01			; set index
+	LDA	(ut1_pl),Y		; get name second byte
+	BPL	LAB_218B		; skip if not string array
+
+; was string array so ..
+
+	LDY	#$04			; set index
+	LDA	(ut1_pl),Y		; get # of dimensions
+	ASL				; *2
+	ADC	#$05			; +5 (array header size)
+	JSR	LAB_2208		; go set up for first element
+LAB_21C4
+	CPX	Nbendh		; compare with start of next array high byte
+	BNE	LAB_21CC		; branch if <> (go do this array)
+
+	CMP	Nbendl		; else compare element pointer low byte with next array
+					; low byte
+	BEQ	LAB_218F		; if equal then go do next array
+
+LAB_21CC
+	JSR	LAB_21D7		; go defrag array strings
+	BEQ	LAB_21C4		; go do next array string (loop always)
+
+; defrag string variables
+; enter with XA = variable pointer
+; return with XA = next variable pointer
+
+LAB_21D1
+	INY				; increment index (Y was $00)
+	LDA	(ut1_pl),Y		; get var name byte 2
+	BPL	LAB_2206		; if not string, step pointer to next var and return
+
+	INY				; else increment index
+LAB_21D7
+	LDA	(ut1_pl),Y		; get string length
+	BEQ	LAB_2206		; if null, step pointer to next string and return
+
+	INY				; else increment index
+	LDA	(ut1_pl),Y		; get string pointer low byte
+	TAX				; copy to X
+	INY				; increment index
+	LDA	(ut1_pl),Y		; get string pointer high byte
+	CMP	Sstorh		; compare bottom of string space high byte
+	BCC	LAB_21EC		; branch if less
+
+	BNE	LAB_2206		; if greater, step pointer to next string and return
+
+					; high bytes were = so compare low bytes
+	CPX	Sstorl		; compare bottom of string space low byte
+	BCS	LAB_2206		; if >=, step pointer to next string and return
+
+					; string pointer is < string storage pointer (pos in mem)
+LAB_21EC
+	CMP	Histrh		; compare to highest string high byte
+	BCC	LAB_2207		; if <, step pointer to next string and return
+
+	BNE	LAB_21F6		; if > update pointers, step to next and return
+
+					; high bytes were = so compare low bytes
+	CPX	Histrl		; compare to highest string low byte
+	BCC	LAB_2207		; if <, step pointer to next string and return
+
+					; string is in string memory space
+LAB_21F6
+	STX	Histrl		; save as new highest string low byte
+	STA	Histrh		; save as new highest string high byte
+	LDA	ut1_pl		; get start of vars(descriptors) low byte
+	LDX	ut1_ph		; get start of vars(descriptors) high byte
+	STA	garb_l		; save as working pointer low byte
+	STX	garb_h		; save as working pointer high byte
+	DEY				; decrement index DIFFERS
+	DEY				; decrement index (should point to descriptor start)
+	STY	g_indx		; save index pointer
+
+					; step pointer to next string
+LAB_2206
+	CLC				; clear carry for add
+LAB_2207
+	LDA	g_step		; get step size
+LAB_2208
+	ADC	ut1_pl		; add pointer low byte
+	STA	ut1_pl		; save pointer low byte
+	BCC	LAB_2211		; branch if no overflow
+
+	INC	ut1_ph		; else increment high byte
+LAB_2211
+	LDX	ut1_ph		; get pointer high byte
+	LDY	#$00			; clear Y
+	RTS
+
+; search complete, now either exit or set-up and move string
+
+LAB_2216
+	DEC	g_step		; decrement step size (now $03 for descriptor stack)
+	LDX	garb_h		; get string to move high byte
+	BEQ	LAB_2211		; exit if nothing to move
+
+	LDY	g_indx		; get index byte back (points to descriptor)
+	CLC				; clear carry for add
+	LDA	(garb_l),Y		; get string length
+	ADC	Histrl		; add highest string low byte
+	STA	Obendl		; save old block end low pointer
+	LDA	Histrh		; get highest string high byte
+	ADC	#$00			; add any carry
+	STA	Obendh		; save old block end high byte
+	LDA	Sstorl		; get bottom of string space low byte
+	LDX	Sstorh		; get bottom of string space high byte
+	STA	Nbendl		; save new block end low byte
+	STX	Nbendh		; save new block end high byte
+	JSR	LAB_11D6		; open up space in memory, don't set array end
+	LDY	g_indx		; get index byte
+	INY				; point to descriptor low byte
+	LDA	Nbendl		; get string pointer low byte
+	STA	(garb_l),Y		; save new string pointer low byte
+	TAX				; copy string pointer low byte
+	INC	Nbendh		; correct high byte (move sets high byte -1)
+	LDA	Nbendh		; get new string pointer high byte
+	INY				; point to descriptor high byte
+	STA	(garb_l),Y		; save new string pointer high byte
+	JMP	LAB_214B		; re-run routine from last ending
+					; (but don't collect this string)
+
+; concatenate
+; add strings, string 1 is in descriptor des_pl, string 2 is in line
+
+LAB_224D
+	LDA	des_ph		; get descriptor pointer high byte
+	PHA				; put on stack
+	LDA	des_pl		; get descriptor pointer low byte
+	PHA				; put on stack
+	JSR	LAB_GVAL		; get value from line
+	JSR	LAB_CTST		; check if source is string, else do type mismatch
+	PLA				; get descriptor pointer low byte back
+	STA	ssptr_l		; set pointer low byte
+	PLA				; get descriptor pointer high byte back
+	STA	ssptr_h		; set pointer high byte
+	LDY	#$00			; clear index
+	LDA	(ssptr_l),Y		; get length_1 from descriptor
+	CLC				; clear carry for add
+	ADC	(des_pl),Y		; add length_2
+	BCC	LAB_226D		; branch if no overflow
+
+	LDX	#$1A			; else set error code $1A ("String too long" error)
+	JMP	LAB_XERR		; do error #X, then warm start
+
+LAB_226D
+	JSR	LAB_209C		; copy des_pl/h to des_2l/h and make string space A bytes
+					; long
+	JSR	LAB_228A		; copy string from descriptor (sdescr) to (Sutill)
+	LDA	des_2l		; get descriptor pointer low byte
+	LDY	des_2h		; get descriptor pointer high byte
+	JSR	LAB_22BA		; pop (YA) descriptor off stack or from top of string space
+					; returns with A = length, ut1_pl = pointer low byte,
+					; ut1_ph = pointer high byte
+	JSR	LAB_229C		; store string A bytes long from (ut1_pl) to (Sutill)
+	LDA	ssptr_l		;.set descriptor pointer low byte
+	LDY	ssptr_h		;.set descriptor pointer high byte
+	JSR	LAB_22BA		; pop (YA) descriptor off stack or from top of string space
+					; returns with A = length, X=ut1_pl=pointer low byte,
+					; Y=ut1_ph=pointer high byte
+	JSR	LAB_RTST		; check for space on descriptor stack then put string
+					; address and length on descriptor stack and update stack
+					; pointers
+	JMP	LAB_1ADB		;.continue evaluation
+
+; copy string from descriptor (sdescr) to (Sutill)
+
+LAB_228A
+	LDY	#$00			; clear index
+	LDA	(sdescr),Y		; get string length
+	PHA				; save on stack
+	INY				; increment index
+	LDA	(sdescr),Y		; get source string pointer low byte
+	TAX				; copy to X
+	INY				; increment index
+	LDA	(sdescr),Y		; get source string pointer high byte
+	TAY				; copy to Y
+	PLA				; get length back
+
+; store string A bytes long from YX to (Sutill)
+
+LAB_2298
+	STX	ut1_pl		; save source string pointer low byte
+	STY	ut1_ph		; save source string pointer high byte
+
+; store string A bytes long from (ut1_pl) to (Sutill)
+
+LAB_229C
+	TAX				; copy length to index (don't count with Y)
+	BEQ	LAB_22B2		; branch if = $0 (null string) no need to add zero length
+
+	LDY	#$00			; zero pointer (copy forward)
+LAB_22A0
+	LDA	(ut1_pl),Y		; get source byte
+	STA	(Sutill),Y		; save destination byte
+
+	INY				; increment index
+	DEX				; decrement counter
+	BNE	LAB_22A0		; loop while <> 0
+
+	TYA				; restore length from Y
+LAB_22A9
+	CLC				; clear carry for add
+	ADC	Sutill		; add string utility ptr low byte
+	STA	Sutill		; save string utility ptr low byte
+	BCC	LAB_22B2		; branch if no carry
+
+	INC	Sutilh		; else increment string utility ptr high byte
+LAB_22B2
+	RTS
+
+; evaluate string
+
+LAB_EVST
+	JSR	LAB_CTST		; check if source is string, else do type mismatch
+
+; pop string off descriptor stack, or from top of string space
+; returns with A = length, X=pointer low byte, Y=pointer high byte
+
+LAB_22B6
+	LDA	des_pl		; get descriptor pointer low byte
+	LDY	des_ph		; get descriptor pointer high byte
+
+; pop (YA) descriptor off stack or from top of string space
+; returns with A = length, X=ut1_pl=pointer low byte, Y=ut1_ph=pointer high byte
+
+LAB_22BA
+	STA	ut1_pl		; save descriptor pointer low byte
+	STY	ut1_ph		; save descriptor pointer high byte
+	JSR	LAB_22EB		; clean descriptor stack, YA = pointer
+	PHP				; save status flags
+	LDY	#$00			; clear index
+	LDA	(ut1_pl),Y		; get length from string descriptor
+	PHA				; put on stack
+	INY				; increment index
+	LDA	(ut1_pl),Y		; get string pointer low byte from descriptor
+	TAX				; copy to X
+	INY				; increment index
+	LDA	(ut1_pl),Y		; get string pointer high byte from descriptor
+	TAY				; copy to Y
+	PLA				; get string length back
+	PLP				; restore status
+	BNE	LAB_22E6		; branch if pointer <> last_sl,last_sh
+
+	CPY	Sstorh		; compare bottom of string space high byte
+	BNE	LAB_22E6		; branch if <>
+
+	CPX	Sstorl		; else compare bottom of string space low byte
+	BNE	LAB_22E6		; branch if <>
+
+	PHA				; save string length
+	CLC				; clear carry for add
+	ADC	Sstorl		; add bottom of string space low byte
+	STA	Sstorl		; save bottom of string space low byte
+	BCC	LAB_22E5		; skip increment if no overflow
+
+	INC	Sstorh		; increment bottom of string space high byte
+LAB_22E5
+	PLA				; restore string length
+LAB_22E6
+	STX	ut1_pl		; save string pointer low byte
+	STY	ut1_ph		; save string pointer high byte
+	RTS
+
+; clean descriptor stack, YA = pointer
+; checks if AY is on the descriptor stack, if so does a stack discard
+
+LAB_22EB
+	CPY	last_sh		; compare pointer high byte
+	BNE	LAB_22FB		; exit if <>
+
+	CMP	last_sl		; compare pointer low byte
+	BNE	LAB_22FB		; exit if <>
+
+	STA	next_s		; save descriptor stack pointer
+	SBC	#$03			; -3
+	STA	last_sl		; save low byte -3
+	LDY	#$00			; clear high byte
+LAB_22FB
+	RTS
+
+; perform CHR$()
+
+LAB_CHRS
+	JSR	LAB_EVBY		; evaluate byte expression, result in X
+	TXA				; copy to A
+	PHA				; save character
+	LDA	#$01			; string is single byte
+	JSR	LAB_MSSP		; make string space A bytes long A=$AC=length,
+					; X=$AD=Sutill=ptr low byte, Y=$AE=Sutilh=ptr high byte
+	PLA				; get character back
+	LDY	#$00			; clear index
+	STA	(str_pl),Y		; save byte in string (byte IS string!)
+	JMP	LAB_RTST		; check for space on descriptor stack then put string
+					; address and length on descriptor stack and update stack
+					; pointers
+
+; perform LEFT$()
+
+LAB_LEFT
+	PHA				; push byte parameter
+	JSR	LAB_236F		; pull string data and byte parameter from stack
+					; return pointer in des_2l/h, byte in A (and X), Y=0
+	CMP	(des_2l),Y		; compare byte parameter with string length
+	TYA				; clear A
+	BEQ	LAB_2316		; go do string copy (branch always)
+
+; perform RIGHT$()
+
+LAB_RIGHT
+	PHA				; push byte parameter
+	JSR	LAB_236F		; pull string data and byte parameter from stack
+					; return pointer in des_2l/h, byte in A (and X), Y=0
+	CLC				; clear carry for add-1
+	SBC	(des_2l),Y		; subtract string length
+	EOR	#$FF			; invert it (A=LEN(expression$)-l)
+
+LAB_2316
+	BCC	LAB_231C		; branch if string length > byte parameter
+
+	LDA	(des_2l),Y		; else make parameter = length
+	TAX				; copy to byte parameter copy
+	TYA				; clear string start offset
+LAB_231C
+	PHA				; save string start offset
+LAB_231D
+	TXA				; copy byte parameter (or string length if <)
+LAB_231E
+	PHA				; save string length
+	JSR	LAB_MSSP		; make string space A bytes long A=$AC=length,
+					; X=$AD=Sutill=ptr low byte, Y=$AE=Sutilh=ptr high byte
+	LDA	des_2l		; get descriptor pointer low byte
+	LDY	des_2h		; get descriptor pointer high byte
+	JSR	LAB_22BA		; pop (YA) descriptor off stack or from top of string space
+					; returns with A = length, X=ut1_pl=pointer low byte,
+					; Y=ut1_ph=pointer high byte
+	PLA				; get string length back
+	TAY				; copy length to Y
+	PLA				; get string start offset back
+	CLC				; clear carry for add
+	ADC	ut1_pl		; add start offset to string start pointer low byte
+	STA	ut1_pl		; save string start pointer low byte
+	BCC	LAB_2335		; branch if no overflow
+
+	INC	ut1_ph		; else increment string start pointer high byte
+LAB_2335
+	TYA				; copy length to A
+	JSR	LAB_229C		; store string A bytes long from (ut1_pl) to (Sutill)
+	JMP	LAB_RTST		; check for space on descriptor stack then put string
+					; address and length on descriptor stack and update stack
+					; pointers
+
+; perform MID$()
+
+LAB_MIDS
+	PHA				; push byte parameter
+	LDA	#$FF			; set default length = 255
+	STA	mids_l		; save default length
+	JSR	LAB_GBYT		; scan memory
+	CMP	#")"			; compare with ")"
+	BEQ	LAB_2358		; branch if = ")" (skip second byte get)
+
+	JSR	LAB_1C01		; scan for "," , else do syntax error then warm start
+	JSR	LAB_GTBY		; get byte parameter (use copy in mids_l)
+LAB_2358
+	JSR	LAB_236F		; pull string data and byte parameter from stack
+					; return pointer in des_2l/h, byte in A (and X), Y=0
+	DEX				; decrement start index
+	TXA				; copy to A
+	PHA				; save string start offset
+	CLC				; clear carry for sub-1
+	LDX	#$00			; clear output string length
+	SBC	(des_2l),Y		; subtract string length
+	BCS	LAB_231D		; if start>string length go do null string
+
+	EOR	#$FF			; complement -length
+	CMP	mids_l		; compare byte parameter
+	BCC	LAB_231E		; if length>remaining string go do RIGHT$
+
+	LDA	mids_l		; get length byte
+	BCS	LAB_231E		; go do string copy (branch always)
+
+; pull string data and byte parameter from stack
+; return pointer in des_2l/h, byte in A (and X), Y=0
+
+LAB_236F
+	JSR	LAB_1BFB		; scan for ")" , else do syntax error then warm start
+	PLA				; pull return address low byte (return address)
+	STA	Fnxjpl		; save functions jump vector low byte
+	PLA				; pull return address high byte (return address)
+	STA	Fnxjph		; save functions jump vector high byte
+	PLA				; pull byte parameter
+	TAX				; copy byte parameter to X
+	PLA				; pull string pointer low byte
+	STA	des_2l		; save it
+	PLA				; pull string pointer high byte
+	STA	des_2h		; save it
+	LDY	#$00			; clear index
+	TXA				; copy byte parameter
+	BEQ	LAB_23A8		; if null do function call error then warm start
+
+	INC	Fnxjpl		; increment function jump vector low byte
+					; (JSR pushes return addr-1. this is all very nice
+					; but will go tits up if either call is on a page
+					; boundary!)
+	JMP	(Fnxjpl)		; in effect, RTS
+
+; perform LCASE$()
+
+LAB_LCASE
+	JSR	LAB_EVST		; evaluate string
+	STA	str_ln		; set string length
+	TAY				; copy length to Y
+	BEQ	NoString		; branch if null string
+
+	JSR	LAB_MSSP		; make string space A bytes long A=length,
+					; X=Sutill=ptr low byte, Y=Sutilh=ptr high byte
+	STX	str_pl		; save string pointer low byte
+	STY	str_ph		; save string pointer high byte
+	TAY				; get string length back
+
+LC_loop
+	DEY				; decrement index
+	LDA	(ut1_pl),Y		; get byte from string
+	JSR	LAB_1D82		; is character "A" to "Z"
+	BCC	NoUcase		; branch if not upper case alpha
+
+	ORA	#$20			; convert upper to lower case
+NoUcase
+	STA	(Sutill),Y		; save byte back to string
+	TYA				; test index
+	BNE	LC_loop		; loop if not all done
+
+	BEQ	NoString		; tidy up and exit, branch always
+
+; perform UCASE$()
+
+LAB_UCASE
+	JSR	LAB_EVST		; evaluate string
+	STA	str_ln		; set string length
+	TAY				; copy length to Y
+	BEQ	NoString		; branch if null string
+
+	JSR	LAB_MSSP		; make string space A bytes long A=length,
+					; X=Sutill=ptr low byte, Y=Sutilh=ptr high byte
+	STX	str_pl		; save string pointer low byte
+	STY	str_ph		; save string pointer high byte
+	TAY				; get string length back
+
+UC_loop
+	DEY				; decrement index
+	LDA	(ut1_pl),Y		; get byte from string
+	JSR	LAB_CASC		; is character "a" to "z" (or "A" to "Z")
+	BCC	NoLcase		; branch if not alpha
+
+	AND	#$DF			; convert lower to upper case
+NoLcase
+	STA	(Sutill),Y		; save byte back to string
+	TYA				; test index
+	BNE	UC_loop		; loop if not all done
+
+NoString
+	JMP	LAB_RTST		; check for space on descriptor stack then put string
+					; address and length on descriptor stack and update stack
+					; pointers
+
+; perform SADD()
+
+LAB_SADD
+	JSR	LAB_IGBY		; increment and scan memory
+	JSR	LAB_GVAR		; get var address
+
+	JSR	LAB_1BFB		; scan for ")", else do syntax error then warm start
+	JSR	LAB_CTST		; check if source is string, else do type mismatch
+
+	LDY	#$02			; index to string pointer high byte
+	LDA	(Cvaral),Y		; get string pointer high byte
+	TAX				; copy string pointer high byte to X
+	DEY				; index to string pointer low byte
+	LDA	(Cvaral),Y		; get string pointer low byte
+	TAY				; copy string pointer low byte to Y
+	TXA				; copy string pointer high byte to A
+	JMP	LAB_AYFC		; save and convert integer AY to FAC1 and return
+
+; perform LEN()
+
+LAB_LENS
+	JSR	LAB_ESGL		; evaluate string, get length in A (and Y)
+	JMP	LAB_1FD0		; convert Y to byte in FAC1 and return
+
+; evaluate string, get length in Y
+
+LAB_ESGL
+	JSR	LAB_EVST		; evaluate string
+	TAY				; copy length to Y
+	RTS
+
+; perform ASC()
+
+LAB_ASC
+	JSR	LAB_ESGL		; evaluate string, get length in A (and Y)
+	BEQ	LAB_23A8		; if null do function call error then warm start
+
+	LDY	#$00			; set index to first character
+	LDA	(ut1_pl),Y		; get byte
+	TAY				; copy to Y
+	JMP	LAB_1FD0		; convert Y to byte in FAC1 and return
+
+; do function call error then warm start
+
+LAB_23A8
+	JMP	LAB_FCER		; do function call error then warm start
+
+; scan and get byte parameter
+
+LAB_SGBY
+	JSR	LAB_IGBY		; increment and scan memory
+
+; get byte parameter
+
+LAB_GTBY
+	JSR	LAB_EVNM		; evaluate expression and check is numeric,
+					; else do type mismatch
+
+; evaluate byte expression, result in X
+
+LAB_EVBY
+	JSR	LAB_EVPI		; evaluate integer expression (no check)
+
+	LDY	FAC1_2		; get FAC1 mantissa2
+	BNE	LAB_23A8		; if top byte <> 0 do function call error then warm start
+
+	LDX	FAC1_3		; get FAC1 mantissa3
+	JMP	LAB_GBYT		; scan memory and return
+
+; perform VAL()
+
+LAB_VAL
+	JSR	LAB_ESGL		; evaluate string, get length in A (and Y)
+	BNE	LAB_23C5		; branch if not null string
+
+					; string was null so set result = $00
+	JMP	LAB_24F1		; clear FAC1 exponent and sign and return
+
+LAB_23C5
+	LDX	Bpntrl		; get BASIC execute pointer low byte
+	LDY	Bpntrh		; get BASIC execute pointer high byte
+	STX	Btmpl			; save BASIC execute pointer low byte
+	STY	Btmph			; save BASIC execute pointer high byte
+	LDX	ut1_pl		; get string pointer low byte
+	STX	Bpntrl		; save as BASIC execute pointer low byte
+	CLC				; clear carry
+	ADC	ut1_pl		; add string length
+	STA	ut2_pl		; save string end low byte
+	LDA	ut1_ph		; get string pointer high byte
+	STA	Bpntrh		; save as BASIC execute pointer high byte
+	ADC	#$00			; add carry to high byte
+	STA	ut2_ph		; save string end high byte
+	LDY	#$00			; set index to $00
+	LDA	(ut2_pl),Y		; get string end +1 byte
+	PHA				; push it
+	TYA				; clear A
+	STA	(ut2_pl),Y		; terminate string with $00
+	JSR	LAB_GBYT		; scan memory
+	JSR	LAB_2887		; get FAC1 from string
+	PLA				; restore string end +1 byte
+	LDY	#$00			; set index to zero
+	STA	(ut2_pl),Y		; put string end byte back
+
+; restore BASIC execute pointer from temp (Btmpl/Btmph)
+
+LAB_23F3
+	LDX	Btmpl			; get BASIC execute pointer low byte back
+	LDY	Btmph			; get BASIC execute pointer high byte back
+	STX	Bpntrl		; save BASIC execute pointer low byte
+	STY	Bpntrh		; save BASIC execute pointer high byte
+	RTS
+
+; get two parameters for POKE or WAIT
+
+LAB_GADB
+	JSR	LAB_EVNM		; evaluate expression and check is numeric,
+					; else do type mismatch
+	JSR	LAB_F2FX		; save integer part of FAC1 in temporary integer
+
+; scan for "," and get byte, else do Syntax error then warm start
+
+LAB_SCGB
+	JSR	LAB_1C01		; scan for "," , else do syntax error then warm start
+	LDA	Itemph		; save temporary integer high byte
+	PHA				; on stack
+	LDA	Itempl		; save temporary integer low byte
+	PHA				; on stack
+	JSR	LAB_GTBY		; get byte parameter
+	PLA				; pull low byte
+	STA	Itempl		; restore temporary integer low byte
+	PLA				; pull high byte
+	STA	Itemph		; restore temporary integer high byte
+	RTS
+
+; convert float to fixed routine. accepts any value that fits in 24 bits, +ve or
+; -ve and converts it into a right truncated integer in Itempl and Itemph
+
+; save unsigned 16 bit integer part of FAC1 in temporary integer
+
+LAB_F2FX
+	LDA	FAC1_e		; get FAC1 exponent
+	CMP	#$98			; compare with exponent = 2^24
+	BCS	LAB_23A8		; if >= do function call error then warm start
+
+LAB_F2FU
+	JSR	LAB_2831		; convert FAC1 floating-to-fixed
+	LDA	FAC1_2		; get FAC1 mantissa2
+	LDY	FAC1_3		; get FAC1 mantissa3
+	STY	Itempl		; save temporary integer low byte
+	STA	Itemph		; save temporary integer high byte
+	RTS
+
+; perform PEEK()
+
+LAB_PEEK
+	JSR	LAB_F2FX		; save integer part of FAC1 in temporary integer
+	LDX	#$00			; clear index
+	LDA	(Itempl,X)		; get byte via temporary integer (addr)
+	TAY				; copy byte to Y
+	JMP	LAB_1FD0		; convert Y to byte in FAC1 and return
+
+; perform POKE
+
+LAB_POKE
+	JSR	LAB_GADB		; get two parameters for POKE or WAIT
+	TXA				; copy byte argument to A
+	LDX	#$00			; clear index
+	STA	(Itempl,X)		; save byte via temporary integer (addr)
+	RTS
+
+; perform DEEK()
+
+LAB_DEEK
+	JSR	LAB_F2FX		; save integer part of FAC1 in temporary integer
+	LDX	#$00			; clear index
+	LDA	(Itempl,X)		; PEEK low byte
+	TAY				; copy to Y
+	INC	Itempl		; increment pointer low byte
+	BNE	Deekh			; skip high increment if no rollover
+
+	INC	Itemph		; increment pointer high byte
+Deekh
+	LDA	(Itempl,X)		; PEEK high byte
+	JMP	LAB_AYFC		; save and convert integer AY to FAC1 and return
+
+; perform DOKE
+
+LAB_DOKE
+	JSR	LAB_EVNM		; evaluate expression and check is numeric,
+					; else do type mismatch
+	JSR	LAB_F2FX		; convert floating-to-fixed
+
+	STY	Frnxtl		; save pointer low byte (float to fixed returns word in AY)
+	STA	Frnxth		; save pointer high byte
+
+	JSR	LAB_1C01		; scan for "," , else do syntax error then warm start
+	JSR	LAB_EVNM		; evaluate expression and check is numeric,
+					; else do type mismatch
+	JSR	LAB_F2FX		; convert floating-to-fixed
+
+	TYA				; copy value low byte (float to fixed returns word in AY)
+	LDX	#$00			; clear index
+	STA	(Frnxtl,X)		; POKE low byte
+	INC	Frnxtl		; increment pointer low byte
+	BNE	Dokeh			; skip high increment if no rollover
+
+	INC	Frnxth		; increment pointer high byte
+Dokeh
+	LDA	Itemph		; get value high byte
+	STA	(Frnxtl,X)		; POKE high byte
+	JMP	LAB_GBYT		; scan memory and return
+
+; perform SWAP
+
+LAB_SWAP
+	JSR	LAB_GVAR		; get var1 address
+	STA	Lvarpl		; save var1 address low byte
+	STY	Lvarph		; save var1 address high byte
+	LDA	Dtypef		; get data type flag, $FF=string, $00=numeric
+	PHA				; save data type flag
+
+	JSR	LAB_1C01		; scan for "," , else do syntax error then warm start
+	JSR	LAB_GVAR		; get var2 address (pointer in Cvaral/h)
+	PLA				; pull var1 data type flag
+	EOR	Dtypef		; compare with var2 data type
+	BPL	SwapErr		; exit if not both the same type
+
+	LDY	#$03			; four bytes to swap (either value or descriptor+1)
+SwapLp
+	LDA	(Lvarpl),Y		; get byte from var1
+	TAX				; save var1 byte
+	LDA	(Cvaral),Y		; get byte from var2
+	STA	(Lvarpl),Y		; save byte to var1
+	TXA				; restore var1 byte
+	STA	(Cvaral),Y		; save byte to var2
+	DEY				; decrement index
+	BPL	SwapLp		; loop until done
+
+	RTS
+
+SwapErr
+	JMP	LAB_1ABC		; do "Type mismatch" error then warm start
+
+; perform CALL
+
+LAB_CALL
+	JSR	LAB_EVNM		; evaluate expression and check is numeric,
+					; else do type mismatch
+	JSR	LAB_F2FX		; convert floating-to-fixed
+	LDA	#>CallExit		; set return address high byte
+	PHA				; put on stack
+	LDA	#<CallExit-1	; set return address low byte
+	PHA				; put on stack
+	JMP	(Itempl)		; do indirect jump to user routine
+
+; if the called routine exits correctly then it will return to here. this will then get
+; the next byte for the interpreter and return
+
+CallExit
+	JMP	LAB_GBYT		; scan memory and return
+
+; perform WAIT
+
+LAB_WAIT
+	JSR	LAB_GADB		; get two parameters for POKE or WAIT
+	STX	Frnxtl		; save byte
+	LDX	#$00			; clear mask
+	JSR	LAB_GBYT		; scan memory
+	BEQ	LAB_2441		; skip if no third argument
+
+	JSR	LAB_SCGB		; scan for "," and get byte, else SN error then warm start
+LAB_2441
+	STX	Frnxth		; save EOR argument
+LAB_2445
+	LDA	(Itempl),Y		; get byte via temporary integer (addr)
+	EOR	Frnxth		; EOR with second argument (mask)
+	AND	Frnxtl		; AND with first argument (byte)
+	BEQ	LAB_2445		; loop if result is zero
+
+LAB_244D
+	RTS
+
+; perform subtraction, FAC1 from (AY)
+
+LAB_2455
+	JSR	LAB_264D		; unpack memory (AY) into FAC2
+
+; perform subtraction, FAC1 from FAC2
+
+LAB_SUBTRACT
+	LDA	FAC1_s		; get FAC1 sign (b7)
+	EOR	#$FF			; complement it
+	STA	FAC1_s		; save FAC1 sign (b7)
+	EOR	FAC2_s		; EOR with FAC2 sign (b7)
+	STA	FAC_sc		; save sign compare (FAC1 EOR FAC2)
+	LDA	FAC1_e		; get FAC1 exponent
+	JMP	LAB_ADD		; go add FAC2 to FAC1
+
+; perform addition
+
+LAB_2467
+	JSR	LAB_257B		; shift FACX A times right (>8 shifts)
+	BCC	LAB_24A8		;.go subtract mantissas
+
+; add 0.5 to FAC1
+
+LAB_244E
+	LDA	#<LAB_2A96		; set 0.5 pointer low byte
+	LDY	#>LAB_2A96		; set 0.5 pointer high byte
+
+; add (AY) to FAC1
+
+LAB_246C
+	JSR	LAB_264D		; unpack memory (AY) into FAC2
+
+; add FAC2 to FAC1
+
+LAB_ADD
+	BNE	LAB_2474		; branch if FAC1 was not zero
+
+; copy FAC2 to FAC1
+
+LAB_279B
+	LDA	FAC2_s		; get FAC2 sign (b7)
+
+; save FAC1 sign and copy ABS(FAC2) to FAC1
+
+LAB_279D
+	STA	FAC1_s		; save FAC1 sign (b7)
+	LDX	#$04			; 4 bytes to copy
+LAB_27A1
+	LDA	FAC1_o,X		; get byte from FAC2,X
+	STA	FAC1_e-1,X		; save byte at FAC1,X
+	DEX				; decrement count
+	BNE	LAB_27A1		; loop if not all done
+
+	STX	FAC1_r		; clear FAC1 rounding byte
+	RTS
+
+					; FAC1 is non zero
+LAB_2474
+	LDX	FAC1_r		; get FAC1 rounding byte
+	STX	FAC2_r		; save as FAC2 rounding byte
+	LDX	#FAC2_e		; set index to FAC2 exponent addr
+	LDA	FAC2_e		; get FAC2 exponent
+LAB_247C
+	TAY				; copy exponent
+	BEQ	LAB_244D		; exit if zero
+
+	SEC				; set carry for subtract
+	SBC	FAC1_e		; subtract FAC1 exponent
+	BEQ	LAB_24A8		; branch if = (go add mantissa)
+
+	BCC	LAB_2498		; branch if <
+
+					; FAC2>FAC1
+	STY	FAC1_e		; save FAC1 exponent
+	LDY	FAC2_s		; get FAC2 sign (b7)
+	STY	FAC1_s		; save FAC1 sign (b7)
+	EOR	#$FF			; complement A
+	ADC	#$00			; +1 (twos complement, carry is set)
+	LDY	#$00			; clear Y
+	STY	FAC2_r		; clear FAC2 rounding byte
+	LDX	#FAC1_e		; set index to FAC1 exponent addr
+	BNE	LAB_249C		; branch always
+
+LAB_2498
+	LDY	#$00			; clear Y
+	STY	FAC1_r		; clear FAC1 rounding byte
+LAB_249C
+	CMP	#$F9			; compare exponent diff with $F9
+	BMI	LAB_2467		; branch if range $79-$F8
+
+	TAY				; copy exponent difference to Y
+	LDA	FAC1_r		; get FAC1 rounding byte
+	LSR	PLUS_1,X		; shift FAC? mantissa1
+	JSR	LAB_2592		; shift FACX Y times right
+
+					; exponents are equal now do mantissa subtract
+LAB_24A8
+	BIT	FAC_sc		; test sign compare (FAC1 EOR FAC2)
+	BPL	LAB_24F8		; if = add FAC2 mantissa to FAC1 mantissa and return
+
+	LDY	#FAC1_e		; set index to FAC1 exponent addr
+	CPX	#FAC2_e		; compare X to FAC2 exponent addr
+	BEQ	LAB_24B4		; branch if =
+
+	LDY	#FAC2_e		; else set index to FAC2 exponent addr
+
+					; subtract smaller from bigger (take sign of bigger)
+LAB_24B4
+	SEC				; set carry for subtract
+	EOR	#$FF			; ones complement A
+	ADC	FAC2_r		; add FAC2 rounding byte
+	STA	FAC1_r		; save FAC1 rounding byte
+	LDA	PLUS_3,Y		; get FACY mantissa3
+	SBC	PLUS_3,X		; subtract FACX mantissa3
+	STA	FAC1_3		; save FAC1 mantissa3
+	LDA	PLUS_2,Y		; get FACY mantissa2
+	SBC	PLUS_2,X		; subtract FACX mantissa2
+	STA	FAC1_2		; save FAC1 mantissa2
+	LDA	PLUS_1,Y		; get FACY mantissa1
+	SBC	PLUS_1,X		; subtract FACX mantissa1
+	STA	FAC1_1		; save FAC1 mantissa1
+
+; do ABS and normalise FAC1
+
+LAB_24D0
+	BCS	LAB_24D5		; branch if number is +ve
+
+	JSR	LAB_2537		; negate FAC1
+
+; normalise FAC1
+
+LAB_24D5
+	LDY	#$00			; clear Y
+	TYA				; clear A
+	CLC				; clear carry for add
+LAB_24D9
+	LDX	FAC1_1		; get FAC1 mantissa1
+	BNE	LAB_251B		; if not zero normalise FAC1
+
+	LDX	FAC1_2		; get FAC1 mantissa2
+	STX	FAC1_1		; save FAC1 mantissa1
+	LDX	FAC1_3		; get FAC1 mantissa3
+	STX	FAC1_2		; save FAC1 mantissa2
+	LDX	FAC1_r		; get FAC1 rounding byte
+	STX	FAC1_3		; save FAC1 mantissa3
+	STY	FAC1_r		; clear FAC1 rounding byte
+	ADC	#$08			; add x to exponent offset
+	CMP	#$18			; compare with $18 (max offset, all bits would be =0)
+	BNE	LAB_24D9		; loop if not max
+
+; clear FAC1 exponent and sign
+
+LAB_24F1
+	LDA	#$00			; clear A
+LAB_24F3
+	STA	FAC1_e		; set FAC1 exponent
+
+; save FAC1 sign
+
+LAB_24F5
+	STA	FAC1_s		; save FAC1 sign (b7)
+	RTS
+
+; add FAC2 mantissa to FAC1 mantissa
+
+LAB_24F8
+	ADC	FAC2_r		; add FAC2 rounding byte
+	STA	FAC1_r		; save FAC1 rounding byte
+	LDA	FAC1_3		; get FAC1 mantissa3
+	ADC	FAC2_3		; add FAC2 mantissa3
+	STA	FAC1_3		; save FAC1 mantissa3
+	LDA	FAC1_2		; get FAC1 mantissa2
+	ADC	FAC2_2		; add FAC2 mantissa2
+	STA	FAC1_2		; save FAC1 mantissa2
+	LDA	FAC1_1		; get FAC1 mantissa1
+	ADC	FAC2_1		; add FAC2 mantissa1
+	STA	FAC1_1		; save FAC1 mantissa1
+	BCS	LAB_252A		; if carry then normalise FAC1 for C=1
+
+	RTS				; else just exit
+
+LAB_2511
+	ADC	#$01			; add 1 to exponent offset
+	ASL	FAC1_r		; shift FAC1 rounding byte
+	ROL	FAC1_3		; shift FAC1 mantissa3
+	ROL	FAC1_2		; shift FAC1 mantissa2
+	ROL	FAC1_1		; shift FAC1 mantissa1
+
+; normalise FAC1
+
+LAB_251B
+	BPL	LAB_2511		; loop if not normalised
+
+	SEC				; set carry for subtract
+	SBC	FAC1_e		; subtract FAC1 exponent
+	BCS	LAB_24F1		; branch if underflow (set result = $0)
+
+	EOR	#$FF			; complement exponent
+	ADC	#$01			; +1 (twos complement)
+	STA	FAC1_e		; save FAC1 exponent
+
+; test and normalise FAC1 for C=0/1
+
+LAB_2528
+	BCC	LAB_2536		; exit if no overflow
+
+; normalise FAC1 for C=1
+
+LAB_252A
+	INC	FAC1_e		; increment FAC1 exponent
+	BEQ	LAB_2564		; if zero do overflow error and warm start
+
+	ROR	FAC1_1		; shift FAC1 mantissa1
+	ROR	FAC1_2		; shift FAC1 mantissa2
+	ROR	FAC1_3		; shift FAC1 mantissa3
+	ROR	FAC1_r		; shift FAC1 rounding byte
+LAB_2536
+	RTS
+
+; negate FAC1
+
+LAB_2537
+	LDA	FAC1_s		; get FAC1 sign (b7)
+	EOR	#$FF			; complement it
+	STA	FAC1_s		; save FAC1 sign (b7)
+
+; twos complement FAC1 mantissa
+
+LAB_253D
+	LDA	FAC1_1		; get FAC1 mantissa1
+	EOR	#$FF			; complement it
+	STA	FAC1_1		; save FAC1 mantissa1
+	LDA	FAC1_2		; get FAC1 mantissa2
+	EOR	#$FF			; complement it
+	STA	FAC1_2		; save FAC1 mantissa2
+	LDA	FAC1_3		; get FAC1 mantissa3
+	EOR	#$FF			; complement it
+	STA	FAC1_3		; save FAC1 mantissa3
+	LDA	FAC1_r		; get FAC1 rounding byte
+	EOR	#$FF			; complement it
+	STA	FAC1_r		; save FAC1 rounding byte
+	INC	FAC1_r		; increment FAC1 rounding byte
+	BNE	LAB_2563		; exit if no overflow
+
+; increment FAC1 mantissa
+
+LAB_2559
+	INC	FAC1_3		; increment FAC1 mantissa3
+	BNE	LAB_2563		; finished if no rollover
+
+	INC	FAC1_2		; increment FAC1 mantissa2
+	BNE	LAB_2563		; finished if no rollover
+
+	INC	FAC1_1		; increment FAC1 mantissa1
+LAB_2563
+	RTS
+
+; do overflow error (overflow exit)
+
+LAB_2564
+	LDX	#$0A			; error code $0A ("Overflow" error)
+	JMP	LAB_XERR		; do error #X, then warm start
+
+; shift FCAtemp << A+8 times
+
+LAB_2569
+	LDX	#FACt_1-1		; set offset to FACtemp
+LAB_256B
+	LDY	PLUS_3,X		; get FACX mantissa3
+	STY	FAC1_r		; save as FAC1 rounding byte
+	LDY	PLUS_2,X		; get FACX mantissa2
+	STY	PLUS_3,X		; save FACX mantissa3
+	LDY	PLUS_1,X		; get FACX mantissa1
+	STY	PLUS_2,X		; save FACX mantissa2
+	LDY	FAC1_o		; get FAC1 overflow byte
+	STY	PLUS_1,X		; save FACX mantissa1
+
+; shift FACX -A times right (> 8 shifts)
+
+LAB_257B
+	ADC	#$08			; add 8 to shift count
+	BMI	LAB_256B		; go do 8 shift if still -ve
+
+	BEQ	LAB_256B		; go do 8 shift if zero
+
+	SBC	#$08			; else subtract 8 again
+	TAY				; save count to Y
+	LDA	FAC1_r		; get FAC1 rounding byte
+	BCS	LAB_259A		;.
+
+LAB_2588
+	ASL	PLUS_1,X		; shift FACX mantissa1
+	BCC	LAB_258E		; branch if +ve
+
+	INC	PLUS_1,X		; this sets b7 eventually
+LAB_258E
+	ROR	PLUS_1,X		; shift FACX mantissa1 (correct for ASL)
+	ROR	PLUS_1,X		; shift FACX mantissa1 (put carry in b7)
+
+; shift FACX Y times right
+
+LAB_2592
+	ROR	PLUS_2,X		; shift FACX mantissa2
+	ROR	PLUS_3,X		; shift FACX mantissa3
+	ROR				; shift FACX rounding byte
+	INY				; increment exponent diff
+	BNE	LAB_2588		; branch if range adjust not complete
+
+LAB_259A
+	CLC				; just clear it
+	RTS
+
+; perform LOG()
+
+LAB_LOG
+	JSR	LAB_27CA		; test sign and zero
+	BEQ	LAB_25C4		; if zero do function call error then warm start
+
+	BPL	LAB_25C7		; skip error if +ve
+
+LAB_25C4
+	JMP	LAB_FCER		; do function call error then warm start (-ve)
+
+LAB_25C7
+	LDA	FAC1_e		; get FAC1 exponent
+	SBC	#$7F			; normalise it
+	PHA				; save it
+	LDA	#$80			; set exponent to zero
+	STA	FAC1_e		; save FAC1 exponent
+	LDA	#<LAB_25AD		; set 1/root2 pointer low byte
+	LDY	#>LAB_25AD		; set 1/root2 pointer high byte
+	JSR	LAB_246C		; add (AY) to FAC1 (1/root2)
+	LDA	#<LAB_25B1		; set root2 pointer low byte
+	LDY	#>LAB_25B1		; set root2 pointer high byte
+	JSR	LAB_26CA		; convert AY and do (AY)/FAC1 (root2/(x+(1/root2)))
+	LDA	#<LAB_259C		; set 1 pointer low byte
+	LDY	#>LAB_259C		; set 1 pointer high byte
+	JSR	LAB_2455		; subtract (AY) from FAC1 ((root2/(x+(1/root2)))-1)
+	LDA	#<LAB_25A0		; set pointer low byte to counter
+	LDY	#>LAB_25A0		; set pointer high byte to counter
+	JSR	LAB_2B6E		; ^2 then series evaluation
+	LDA	#<LAB_25B5		; set -0.5 pointer low byte
+	LDY	#>LAB_25B5		; set -0.5 pointer high byte
+	JSR	LAB_246C		; add (AY) to FAC1
+	PLA				; restore FAC1 exponent
+	JSR	LAB_2912		; evaluate new ASCII digit
+	LDA	#<LAB_25B9		; set LOG(2) pointer low byte
+	LDY	#>LAB_25B9		; set LOG(2) pointer high byte
+
+; do convert AY, FCA1*(AY)
+
+LAB_25FB
+	JSR	LAB_264D		; unpack memory (AY) into FAC2
+LAB_MULTIPLY
+	BEQ	LAB_264C		; exit if zero
+
+	JSR	LAB_2673		; test and adjust accumulators
+	LDA	#$00			; clear A
+	STA	FACt_1		; clear temp mantissa1
+	STA	FACt_2		; clear temp mantissa2
+	STA	FACt_3		; clear temp mantissa3
+	LDA	FAC1_r		; get FAC1 rounding byte
+	JSR	LAB_2622		; go do shift/add FAC2
+	LDA	FAC1_3		; get FAC1 mantissa3
+	JSR	LAB_2622		; go do shift/add FAC2
+	LDA	FAC1_2		; get FAC1 mantissa2
+	JSR	LAB_2622		; go do shift/add FAC2
+	LDA	FAC1_1		; get FAC1 mantissa1
+	JSR	LAB_2627		; go do shift/add FAC2
+	JMP	LAB_273C		; copy temp to FAC1, normalise and return
+
+LAB_2622
+	BNE	LAB_2627		; branch if byte <> zero
+
+	JMP	LAB_2569		; shift FCAtemp << A+8 times
+
+					; else do shift and add
+LAB_2627
+	LSR				; shift byte
+	ORA	#$80			; set top bit (mark for 8 times)
+LAB_262A
+	TAY				; copy result
+	BCC	LAB_2640		; skip next if bit was zero
+
+	CLC				; clear carry for add
+	LDA	FACt_3		; get temp mantissa3
+	ADC	FAC2_3		; add FAC2 mantissa3
+	STA	FACt_3		; save temp mantissa3
+	LDA	FACt_2		; get temp mantissa2
+	ADC	FAC2_2		; add FAC2 mantissa2
+	STA	FACt_2		; save temp mantissa2
+	LDA	FACt_1		; get temp mantissa1
+	ADC	FAC2_1		; add FAC2 mantissa1
+	STA	FACt_1		; save temp mantissa1
+LAB_2640
+	ROR	FACt_1		; shift temp mantissa1
+	ROR	FACt_2		; shift temp mantissa2
+	ROR	FACt_3		; shift temp mantissa3
+	ROR	FAC1_r		; shift temp rounding byte
+	TYA				; get byte back
+	LSR				; shift byte
+	BNE	LAB_262A		; loop if all bits not done
+
+LAB_264C
+	RTS
+
+; unpack memory (AY) into FAC2
+
+LAB_264D
+	STA	ut1_pl		; save pointer low byte
+	STY	ut1_ph		; save pointer high byte
+	LDY	#$03			; 4 bytes to get (0-3)
+	LDA	(ut1_pl),Y		; get mantissa3
+	STA	FAC2_3		; save FAC2 mantissa3
+	DEY				; decrement index
+	LDA	(ut1_pl),Y		; get mantissa2
+	STA	FAC2_2		; save FAC2 mantissa2
+	DEY				; decrement index
+	LDA	(ut1_pl),Y		; get mantissa1+sign
+	STA	FAC2_s		; save FAC2 sign (b7)
+	EOR	FAC1_s		; EOR with FAC1 sign (b7)
+	STA	FAC_sc		; save sign compare (FAC1 EOR FAC2)
+	LDA	FAC2_s		; recover FAC2 sign (b7)
+	ORA	#$80			; set 1xxx xxx (set normal bit)
+	STA	FAC2_1		; save FAC2 mantissa1
+	DEY				; decrement index
+	LDA	(ut1_pl),Y		; get exponent byte
+	STA	FAC2_e		; save FAC2 exponent
+	LDA	FAC1_e		; get FAC1 exponent
+	RTS
+
+; test and adjust accumulators
+
+LAB_2673
+	LDA	FAC2_e		; get FAC2 exponent
+LAB_2675
+	BEQ	LAB_2696		; branch if FAC2 = $00 (handle underflow)
+
+	CLC				; clear carry for add
+	ADC	FAC1_e		; add FAC1 exponent
+	BCC	LAB_2680		; branch if sum of exponents <$0100
+
+	BMI	LAB_269B		; do overflow error
+
+	CLC				; clear carry for the add
+	.byte	$2C			; makes next line BIT $1410
+LAB_2680
+	BPL	LAB_2696		; if +ve go handle underflow
+
+	ADC	#$80			; adjust exponent
+	STA	FAC1_e		; save FAC1 exponent
+	BNE	LAB_268B		; branch if not zero
+
+	JMP	LAB_24F5		; save FAC1 sign and return
+
+LAB_268B
+	LDA	FAC_sc		; get sign compare (FAC1 EOR FAC2)
+	STA	FAC1_s		; save FAC1 sign (b7)
+LAB_268F
+	RTS
+
+; handle overflow and underflow
+
+LAB_2690
+	LDA	FAC1_s		; get FAC1 sign (b7)
+	BPL	LAB_269B		; do overflow error
+
+					; handle underflow
+LAB_2696
+	PLA				; pop return address low byte
+	PLA				; pop return address high byte
+	JMP	LAB_24F1		; clear FAC1 exponent and sign and return
+
+; multiply by 10
+
+LAB_269E
+	JSR	LAB_27AB		; round and copy FAC1 to FAC2
+	TAX				; copy exponent (set the flags)
+	BEQ	LAB_268F		; exit if zero
+
+	CLC				; clear carry for add
+	ADC	#$02			; add two to exponent (*4)
+	BCS	LAB_269B		; do overflow error if > $FF
+
+	LDX	#$00			; clear byte
+	STX	FAC_sc		; clear sign compare (FAC1 EOR FAC2)
+	JSR	LAB_247C		; add FAC2 to FAC1 (*5)
+	INC	FAC1_e		; increment FAC1 exponent (*10)
+	BNE	LAB_268F		; if non zero just do RTS
+
+LAB_269B
+	JMP	LAB_2564		; do overflow error and warm start
+
+; divide by 10
+
+LAB_26B9
+	JSR	LAB_27AB		; round and copy FAC1 to FAC2
+	LDA	#<LAB_26B5		; set pointer to 10d low addr
+	LDY	#>LAB_26B5		; set pointer to 10d high addr
+	LDX	#$00			; clear sign
+
+; divide by (AY) (X=sign)
+
+LAB_26C2
+	STX	FAC_sc		; save sign compare (FAC1 EOR FAC2)
+	JSR	LAB_UFAC		; unpack memory (AY) into FAC1
+	JMP	LAB_DIVIDE		; do FAC2/FAC1
+
+					; Perform divide-by
+; convert AY and do (AY)/FAC1
+
+LAB_26CA
+	JSR	LAB_264D		; unpack memory (AY) into FAC2
+
+					; Perform divide-into
+LAB_DIVIDE
+	BEQ	LAB_2737		; if zero go do /0 error
+
+	JSR	LAB_27BA		; round FAC1
+	LDA	#$00			; clear A
+	SEC				; set carry for subtract
+	SBC	FAC1_e		; subtract FAC1 exponent (2s complement)
+	STA	FAC1_e		; save FAC1 exponent
+	JSR	LAB_2673		; test and adjust accumulators
+	INC	FAC1_e		; increment FAC1 exponent
+	BEQ	LAB_269B		; if zero do overflow error
+
+	LDX	#$FF			; set index for pre increment
+	LDA	#$01			; set bit to flag byte save
+LAB_26E4
+	LDY	FAC2_1		; get FAC2 mantissa1
+	CPY	FAC1_1		; compare FAC1 mantissa1
+	BNE	LAB_26F4		; branch if <>
+
+	LDY	FAC2_2		; get FAC2 mantissa2
+	CPY	FAC1_2		; compare FAC1 mantissa2
+	BNE	LAB_26F4		; branch if <>
+
+	LDY	FAC2_3		; get FAC2 mantissa3
+	CPY	FAC1_3		; compare FAC1 mantissa3
+LAB_26F4
+	PHP				; save FAC2-FAC1 compare status
+	ROL				; shift the result byte
+	BCC	LAB_2702		; if no carry skip the byte save
+
+	LDY	#$01			; set bit to flag byte save
+	INX				; else increment the index to FACt
+	CPX	#$02			; compare with the index to FACt_3
+	BMI	LAB_2701		; if not last byte just go save it
+
+	BNE	LAB_272B		; if all done go save FAC1 rounding byte, normalise and
+					; return
+
+	LDY	#$40			; set bit to flag byte save for the rounding byte
+LAB_2701
+	STA	FACt_1,X		; write result byte to FACt_1 + index
+	TYA				; copy the next save byte flag
+LAB_2702
+	PLP				; restore FAC2-FAC1 compare status
+	BCC	LAB_2704		; if FAC2 < FAC1 then skip the subtract
+
+	TAY				; save FAC2-FAC1 compare status
+	LDA	FAC2_3		; get FAC2 mantissa3
+	SBC	FAC1_3		; subtract FAC1 mantissa3
+	STA	FAC2_3		; save FAC2 mantissa3
+	LDA	FAC2_2		; get FAC2 mantissa2
+	SBC	FAC1_2		; subtract FAC1 mantissa2
+	STA	FAC2_2		; save FAC2 mantissa2
+	LDA	FAC2_1		; get FAC2 mantissa1
+	SBC	FAC1_1		; subtract FAC1 mantissa1
+	STA	FAC2_1		; save FAC2 mantissa1
+	TYA				; restore FAC2-FAC1 compare status
+
+					; FAC2 = FAC2*2
+LAB_2704
+	ASL	FAC2_3		; shift FAC2 mantissa3
+	ROL	FAC2_2		; shift FAC2 mantissa2
+	ROL	FAC2_1		; shift FAC2 mantissa1
+	BCS	LAB_26F4		; loop with no compare
+
+	BMI	LAB_26E4		; loop with compare
+
+	BPL	LAB_26F4		; loop always with no compare
+
+; do A<<6, save as FAC1 rounding byte, normalise and return
+
+LAB_272B
+	LSR				; shift b1 - b0 ..
+	ROR				; ..
+	ROR				; .. to b7 - b6
+	STA	FAC1_r		; save FAC1 rounding byte
+	PLP				; dump FAC2-FAC1 compare status
+	JMP	LAB_273C		; copy temp to FAC1, normalise and return
+
+; do "Divide by zero" error
+
+LAB_2737
+	LDX	#$14			; error code $14 ("Divide by zero" error)
+	JMP	LAB_XERR		; do error #X, then warm start
+
+; copy temp to FAC1 and normalise
+
+LAB_273C
+	LDA	FACt_1		; get temp mantissa1
+	STA	FAC1_1		; save FAC1 mantissa1
+	LDA	FACt_2		; get temp mantissa2
+	STA	FAC1_2		; save FAC1 mantissa2
+	LDA	FACt_3		; get temp mantissa3
+	STA	FAC1_3		; save FAC1 mantissa3
+	JMP	LAB_24D5		; normalise FAC1 and return
+
+; unpack memory (AY) into FAC1
+
+LAB_UFAC
+	STA	ut1_pl		; save pointer low byte
+	STY	ut1_ph		; save pointer high byte
+	LDY	#$03			; 4 bytes to do
+	LDA	(ut1_pl),Y		; get last byte
+	STA	FAC1_3		; save FAC1 mantissa3
+	DEY				; decrement index
+	LDA	(ut1_pl),Y		; get last-1 byte
+	STA	FAC1_2		; save FAC1 mantissa2
+	DEY				; decrement index
+	LDA	(ut1_pl),Y		; get second byte
+	STA	FAC1_s		; save FAC1 sign (b7)
+	ORA	#$80			; set 1xxx xxxx (add normal bit)
+	STA	FAC1_1		; save FAC1 mantissa1
+	DEY				; decrement index
+	LDA	(ut1_pl),Y		; get first byte (exponent)
+	STA	FAC1_e		; save FAC1 exponent
+	STY	FAC1_r		; clear FAC1 rounding byte
+	RTS
+
+; pack FAC1 into Adatal
+
+LAB_276E
+	LDX	#<Adatal		; set pointer low byte
+LAB_2770
+	LDY	#>Adatal		; set pointer high byte
+	BEQ	LAB_2778		; pack FAC1 into (XY) and return
+
+; pack FAC1 into (Lvarpl)
+
+LAB_PFAC
+	LDX	Lvarpl		; get destination pointer low byte
+	LDY	Lvarph		; get destination pointer high byte
+
+; pack FAC1 into (XY)
+
+LAB_2778
+	JSR	LAB_27BA		; round FAC1
+	STX	ut1_pl		; save pointer low byte
+	STY	ut1_ph		; save pointer high byte
+	LDY	#$03			; set index
+	LDA	FAC1_3		; get FAC1 mantissa3
+	STA	(ut1_pl),Y		; store in destination
+	DEY				; decrement index
+	LDA	FAC1_2		; get FAC1 mantissa2
+	STA	(ut1_pl),Y		; store in destination
+	DEY				; decrement index
+	LDA	FAC1_s		; get FAC1 sign (b7)
+	ORA	#$7F			; set bits x111 1111
+	AND	FAC1_1		; AND in FAC1 mantissa1
+	STA	(ut1_pl),Y		; store in destination
+	DEY				; decrement index
+	LDA	FAC1_e		; get FAC1 exponent
+	STA	(ut1_pl),Y		; store in destination
+	STY	FAC1_r		; clear FAC1 rounding byte
+	RTS
+
+; round and copy FAC1 to FAC2
+
+LAB_27AB
+	JSR	LAB_27BA		; round FAC1
+
+; copy FAC1 to FAC2
+
+LAB_27AE
+	LDX	#$05			; 5 bytes to copy
+LAB_27B0
+	LDA	FAC1_e-1,X		; get byte from FAC1,X
+	STA	FAC1_o,X		; save byte at FAC2,X
+	DEX				; decrement count
+	BNE	LAB_27B0		; loop if not all done
+
+	STX	FAC1_r		; clear FAC1 rounding byte
+LAB_27B9
+	RTS
+
+; round FAC1
+
+LAB_27BA
+	LDA	FAC1_e		; get FAC1 exponent
+	BEQ	LAB_27B9		; exit if zero
+
+	ASL	FAC1_r		; shift FAC1 rounding byte
+	BCC	LAB_27B9		; exit if no overflow
+
+; round FAC1 (no check)
+
+LAB_27C2
+	JSR	LAB_2559		; increment FAC1 mantissa
+	BNE	LAB_27B9		; branch if no overflow
+
+	JMP	LAB_252A		; normalise FAC1 for C=1 and return
+
+; get FAC1 sign
+; return A=FF,C=1/-ve A=01,C=0/+ve
+
+LAB_27CA
+	LDA	FAC1_e		; get FAC1 exponent
+	BEQ	LAB_27D7		; exit if zero (already correct SGN(0)=0)
+
+; return A=FF,C=1/-ve A=01,C=0/+ve
+; no = 0 check
+
+LAB_27CE
+	LDA	FAC1_s		; else get FAC1 sign (b7)
+
+; return A=FF,C=1/-ve A=01,C=0/+ve
+; no = 0 check, sign in A
+
+LAB_27D0
+	ROL				; move sign bit to carry
+	LDA	#$FF			; set byte for -ve result
+	BCS	LAB_27D7		; return if sign was set (-ve)
+
+	LDA	#$01			; else set byte for +ve result
+LAB_27D7
+	RTS
+
+; perform SGN()
+
+LAB_SGN
+	JSR	LAB_27CA		; get FAC1 sign
+					; return A=$FF/-ve A=$01/+ve
+; save A as integer byte
+
+LAB_27DB
+	STA	FAC1_1		; save FAC1 mantissa1
+	LDA	#$00			; clear A
+	STA	FAC1_2		; clear FAC1 mantissa2
+	LDX	#$88			; set exponent
+
+; set exp=X, clearFAC1 mantissa3 and normalise
+
+LAB_27E3
+	LDA	FAC1_1		; get FAC1 mantissa1
+	EOR	#$FF			; complement it
+	ROL				; sign bit into carry
+
+; set exp=X, clearFAC1 mantissa3 and normalise
+
+LAB_STFA
+	LDA	#$00			; clear A
+	STA	FAC1_3		; clear FAC1 mantissa3
+	STX	FAC1_e		; set FAC1 exponent
+	STA	FAC1_r		; clear FAC1 rounding byte
+	STA	FAC1_s		; clear FAC1 sign (b7)
+	JMP	LAB_24D0		; do ABS and normalise FAC1
+
+; perform ABS()
+
+LAB_ABS
+	LSR	FAC1_s		; clear FAC1 sign (put zero in b7)
+	RTS
+
+; compare FAC1 with (AY)
+; returns A=$00 if FAC1 = (AY)
+; returns A=$01 if FAC1 > (AY)
+; returns A=$FF if FAC1 < (AY)
+
+LAB_27F8
+	STA	ut2_pl		; save pointer low byte
+LAB_27FA
+	STY	ut2_ph		; save pointer high byte
+	LDY	#$00			; clear index
+	LDA	(ut2_pl),Y		; get exponent
+	INY				; increment index
+	TAX				; copy (AY) exponent to X
+	BEQ	LAB_27CA		; branch if (AY) exponent=0 and get FAC1 sign
+					; A=FF,C=1/-ve A=01,C=0/+ve
+
+	LDA	(ut2_pl),Y		; get (AY) mantissa1 (with sign)
+	EOR	FAC1_s		; EOR FAC1 sign (b7)
+	BMI	LAB_27CE		; if signs <> do return A=FF,C=1/-ve
+					; A=01,C=0/+ve and return
+
+	CPX	FAC1_e		; compare (AY) exponent with FAC1 exponent
+	BNE	LAB_2828		; branch if different
+
+	LDA	(ut2_pl),Y		; get (AY) mantissa1 (with sign)
+	ORA	#$80			; normalise top bit
+	CMP	FAC1_1		; compare with FAC1 mantissa1
+	BNE	LAB_2828		; branch if different
+
+	INY				; increment index
+	LDA	(ut2_pl),Y		; get mantissa2
+	CMP	FAC1_2		; compare with FAC1 mantissa2
+	BNE	LAB_2828		; branch if different
+
+	INY				; increment index
+	LDA	#$7F			; set for 1/2 value rounding byte
+	CMP	FAC1_r		; compare with FAC1 rounding byte (set carry)
+	LDA	(ut2_pl),Y		; get mantissa3
+	SBC	FAC1_3		; subtract FAC1 mantissa3
+	BEQ	LAB_2850		; exit if mantissa3 equal
+
+; gets here if number <> FAC1
+
+LAB_2828
+	LDA	FAC1_s		; get FAC1 sign (b7)
+	BCC	LAB_282E		; branch if FAC1 > (AY)
+
+	EOR	#$FF			; else toggle FAC1 sign
+LAB_282E
+	JMP	LAB_27D0		; return A=FF,C=1/-ve A=01,C=0/+ve
+
+; convert FAC1 floating-to-fixed
+
+LAB_2831
+	LDA	FAC1_e		; get FAC1 exponent
+	BEQ	LAB_287F		; if zero go clear FAC1 and return
+
+	SEC				; set carry for subtract
+	SBC	#$98			; subtract maximum integer range exponent
+	BIT	FAC1_s		; test FAC1 sign (b7)
+	BPL	LAB_2845		; branch if FAC1 +ve
+
+					; FAC1 was -ve
+	TAX				; copy subtracted exponent
+	LDA	#$FF			; overflow for -ve number
+	STA	FAC1_o		; set FAC1 overflow byte
+	JSR	LAB_253D		; twos complement FAC1 mantissa
+	TXA				; restore subtracted exponent
+LAB_2845
+	LDX	#FAC1_e		; set index to FAC1
+	CMP	#$F9			; compare exponent result
+	BPL	LAB_2851		; if < 8 shifts shift FAC1 A times right and return
+
+	JSR	LAB_257B		; shift FAC1 A times right (> 8 shifts)
+	STY	FAC1_o		; clear FAC1 overflow byte
+LAB_2850
+	RTS
+
+; shift FAC1 A times right
+
+LAB_2851
+	TAY				; copy shift count
+	LDA	FAC1_s		; get FAC1 sign (b7)
+	AND	#$80			; mask sign bit only (x000 0000)
+	LSR	FAC1_1		; shift FAC1 mantissa1
+	ORA	FAC1_1		; OR sign in b7 FAC1 mantissa1
+	STA	FAC1_1		; save FAC1 mantissa1
+	JSR	LAB_2592		; shift FAC1 Y times right
+	STY	FAC1_o		; clear FAC1 overflow byte
+	RTS
+
+; perform INT()
+
+LAB_INT
+	LDA	FAC1_e		; get FAC1 exponent
+	CMP	#$98			; compare with max int
+	BCS	LAB_2886		; exit if >= (already int, too big for fractional part!)
+
+	JSR	LAB_2831		; convert FAC1 floating-to-fixed
+	STY	FAC1_r		; save FAC1 rounding byte
+	LDA	FAC1_s		; get FAC1 sign (b7)
+	STY	FAC1_s		; save FAC1 sign (b7)
+	EOR	#$80			; toggle FAC1 sign
+	ROL				; shift into carry
+	LDA	#$98			; set new exponent
+	STA	FAC1_e		; save FAC1 exponent
+	LDA	FAC1_3		; get FAC1 mantissa3
+	STA	Temp3			; save for EXP() function
+	JMP	LAB_24D0		; do ABS and normalise FAC1
+
+; clear FAC1 and return
+
+LAB_287F
+	STA	FAC1_1		; clear FAC1 mantissa1
+	STA	FAC1_2		; clear FAC1 mantissa2
+	STA	FAC1_3		; clear FAC1 mantissa3
+	TAY				; clear Y
+LAB_2886
+	RTS
+
+; get FAC1 from string
+; this routine now handles hex and binary values from strings
+; starting with "$" and "%" respectively
+
+LAB_2887
+	LDY	#$00			; clear Y
+	STY	Dtypef		; clear data type flag, $FF=string, $00=numeric
+	LDX	#$09			; set index
+LAB_288B
+	STY	numexp,X		; clear byte
+	DEX				; decrement index
+	BPL	LAB_288B		; loop until numexp to negnum (and FAC1) = $00
+
+	BCC	LAB_28FE		; branch if 1st character numeric
+
+; get FAC1 from string .. first character wasn't numeric
+
+	CMP	#"-"			; else compare with "-"
+	BNE	LAB_289A		; branch if not "-"
+
+	STX	negnum		; set flag for -ve number (X = $FF)
+	BEQ	LAB_289C		; branch always (go scan and check for hex/bin)
+
+; get FAC1 from string .. first character wasn't numeric or -
+
+LAB_289A
+	CMP	#"+"			; else compare with "+"
+	BNE	LAB_289D		; branch if not "+" (go check for hex/bin)
+
+; was "+" or "-" to start, so get next character
+
+LAB_289C
+	JSR	LAB_IGBY		; increment and scan memory
+	BCC	LAB_28FE		; branch if numeric character
+
+; code here for hex and binary numbers
+
+LAB_289D
+	CMP	#"$"			; else compare with "$"
+	BNE	LAB_NHEX		; branch if not "$"
+
+	JMP	LAB_CHEX		; branch if "$"
+
+LAB_NHEX
+	CMP	#"%"			; else compare with "%"
+	BNE	LAB_28A3		; branch if not "%" (continue original code)
+
+	JMP	LAB_CBIN		; branch if "%"
+
+LAB_289E
+	JSR	LAB_IGBY		; increment and scan memory (ignore + or get next number)
+LAB_28A1
+	BCC	LAB_28FE		; branch if numeric character
+
+; get FAC1 from string .. character wasn't numeric, -, +, hex or binary
+
+LAB_28A3
+	CMP	#"."			; else compare with "."
+	BEQ	LAB_28D5		; branch if "."
+
+; get FAC1 from string .. character wasn't numeric, -, + or .
+
+	CMP	#"E"			; else compare with "E"
+	BNE	LAB_28DB		; branch if not "E"
+
+					; was "E" so evaluate exponential part
+	JSR	LAB_IGBY		; increment and scan memory
+	BCC	LAB_28C7		; branch if numeric character
+
+	CMP	#TK_MINUS		; else compare with token for -
+	BEQ	LAB_28C2		; branch if token for -
+
+	CMP	#"-"			; else compare with "-"
+	BEQ	LAB_28C2		; branch if "-"
+
+	CMP	#TK_PLUS		; else compare with token for +
+	BEQ	LAB_28C4		; branch if token for +
+
+	CMP	#"+"			; else compare with "+"
+	BEQ	LAB_28C4		; branch if "+"
+
+	BNE	LAB_28C9		; branch always
+
+LAB_28C2
+	ROR	expneg		; set exponent -ve flag (C, which=1, into b7)
+LAB_28C4
+	JSR	LAB_IGBY		; increment and scan memory
+LAB_28C7
+	BCC	LAB_2925		; branch if numeric character
+
+LAB_28C9
+	BIT	expneg		; test exponent -ve flag
+	BPL	LAB_28DB		; if +ve go evaluate exponent
+
+					; else do exponent = -exponent 
+	LDA	#$00			; clear result
+	SEC				; set carry for subtract
+	SBC	expcnt		; subtract exponent byte
+	JMP	LAB_28DD		; go evaluate exponent
+
+LAB_28D5
+	ROR	numdpf		; set decimal point flag
+	BIT	numdpf		; test decimal point flag
+	BVC	LAB_289E		; branch if only one decimal point so far
+
+					; evaluate exponent
+LAB_28DB
+	LDA	expcnt		; get exponent count byte
+LAB_28DD
+	SEC				; set carry for subtract
+	SBC	numexp		; subtract numerator exponent
+	STA	expcnt		; save exponent count byte
+	BEQ	LAB_28F6		; branch if no adjustment
+
+	BPL	LAB_28EF		; else if +ve go do FAC1*10^expcnt
+
+					; else go do FAC1/10^(0-expcnt)
+LAB_28E6
+	JSR	LAB_26B9		; divide by 10
+	INC	expcnt		; increment exponent count byte
+	BNE	LAB_28E6		; loop until all done
+
+	BEQ	LAB_28F6		; branch always
+
+LAB_28EF
+	JSR	LAB_269E		; multiply by 10
+	DEC	expcnt		; decrement exponent count byte
+	BNE	LAB_28EF		; loop until all done
+
+LAB_28F6
+	LDA	negnum		; get -ve flag
+	BMI	LAB_28FB		; if -ve do - FAC1 and return
+
+	RTS
+
+; do - FAC1 and return
+
+LAB_28FB
+	JMP	LAB_GTHAN		; do - FAC1 and return
+
+; do unsigned FAC1*10+number
+
+LAB_28FE
+	PHA				; save character
+	BIT	numdpf		; test decimal point flag
+	BPL	LAB_2905		; skip exponent increment if not set
+
+	INC	numexp		; else increment number exponent
+LAB_2905
+	JSR	LAB_269E		; multiply FAC1 by 10
+	PLA				; restore character
+	AND	#$0F			; convert to binary
+	JSR	LAB_2912		; evaluate new ASCII digit
+	JMP	LAB_289E		; go do next character
+
+; evaluate new ASCII digit
+
+LAB_2912
+	PHA				; save digit
+	JSR	LAB_27AB		; round and copy FAC1 to FAC2
+	PLA				; restore digit
+	JSR	LAB_27DB		; save A as integer byte
+	LDA	FAC2_s		; get FAC2 sign (b7)
+	EOR	FAC1_s		; toggle with FAC1 sign (b7)
+	STA	FAC_sc		; save sign compare (FAC1 EOR FAC2)
+	LDX	FAC1_e		; get FAC1 exponent
+	JMP	LAB_ADD		; add FAC2 to FAC1 and return
+
+; evaluate next character of exponential part of number
+
+LAB_2925
+	LDA	expcnt		; get exponent count byte
+	CMP	#$0A			; compare with 10 decimal
+	BCC	LAB_2934		; branch if less
+
+	LDA	#$64			; make all -ve exponents = -100 decimal (causes underflow)
+	BIT	expneg		; test exponent -ve flag
+	BMI	LAB_2942		; branch if -ve
+
+	JMP	LAB_2564		; else do overflow error
+
+LAB_2934
+	ASL				; * 2
+	ASL				; * 4
+	ADC	expcnt		; * 5
+	ASL				; * 10
+	LDY	#$00			; set index
+	ADC	(Bpntrl),Y		; add character (will be $30 too much!)
+	SBC	#"0"-1		; convert character to binary
+LAB_2942
+	STA	expcnt		; save exponent count byte
+	JMP	LAB_28C4		; go get next character
+
+; print " in line [LINE #]"
+
+LAB_2953
+	LDA	#<LAB_LMSG		; point to " in line " message low byte
+	LDY	#>LAB_LMSG		; point to " in line " message high byte
+	JSR	LAB_18C3		; print null terminated string from memory
+
+					; print Basic line #
+	LDA	Clineh		; get current line high byte
+	LDX	Clinel		; get current line low byte
+
+; print XA as unsigned integer
+
+LAB_295E
+	STA	FAC1_1		; save low byte as FAC1 mantissa1
+	STX	FAC1_2		; save high byte as FAC1 mantissa2
+	LDX	#$90			; set exponent to 16d bits
+	SEC				; set integer is +ve flag
+	JSR	LAB_STFA		; set exp=X, clearFAC1 mantissa3 and normalise
+	LDY	#$00			; clear index
+	TYA				; clear A
+	JSR	LAB_297B		; convert FAC1 to string, skip sign character save
+	JMP	LAB_18C3		; print null terminated string from memory and return
+
+; convert FAC1 to ASCII string result in (AY)
+; not any more, moved scratchpad to page 0
+
+LAB_296E
+	LDY	#$01			; set index = 1
+	LDA	#$20			; character = " " (assume +ve)
+	BIT	FAC1_s		; test FAC1 sign (b7)
+	BPL	LAB_2978		; branch if +ve
+
+	LDA	#$2D			; else character = "-"
+LAB_2978
+	STA	Decss,Y		; save leading character (" " or "-")
+LAB_297B
+	STA	FAC1_s		; clear FAC1 sign (b7)
+	STY	Sendl			; save index
+	INY				; increment index
+	LDX	FAC1_e		; get FAC1 exponent
+	BNE	LAB_2989		; branch if FAC1<>0
+
+					; exponent was $00 so FAC1 is 0
+	LDA	#"0"			; set character = "0"
+	JMP	LAB_2A89		; save last character, [EOT] and exit
+
+					; FAC1 is some non zero value
+LAB_2989
+	LDA	#$00			; clear (number exponent count)
+	CPX	#$81			; compare FAC1 exponent with $81 (>1.00000)
+
+	BCS	LAB_299A		; branch if FAC1=>1
+
+					; FAC1<1
+	LDA	#<LAB_294F		; set pointer low byte to 1,000,000
+	LDY	#>LAB_294F		; set pointer high byte to 1,000,000
+	JSR	LAB_25FB		; do convert AY, FCA1*(AY)
+	LDA	#$FA			; set number exponent count (-6)
+LAB_299A
+	STA	numexp		; save number exponent count
+LAB_299C
+	LDA	#<LAB_294B		; set pointer low byte to 999999.4375 (max before sci note)
+	LDY	#>LAB_294B		; set pointer high byte to 999999.4375
+	JSR	LAB_27F8		; compare FAC1 with (AY)
+	BEQ	LAB_29C3		; exit if FAC1 = (AY)
+
+	BPL	LAB_29B9		; go do /10 if FAC1 > (AY)
+
+					; FAC1 < (AY)
+LAB_29A7
+	LDA	#<LAB_2947		; set pointer low byte to 99999.9375
+	LDY	#>LAB_2947		; set pointer high byte to 99999.9375
+	JSR	LAB_27F8		; compare FAC1 with (AY)
+	BEQ	LAB_29B2		; branch if FAC1 = (AY) (allow decimal places)
+
+	BPL	LAB_29C0		; branch if FAC1 > (AY) (no decimal places)
+
+					; FAC1 <= (AY)
+LAB_29B2
+	JSR	LAB_269E		; multiply by 10
+	DEC	numexp		; decrement number exponent count
+	BNE	LAB_29A7		; go test again (branch always)
+
+LAB_29B9
+	JSR	LAB_26B9		; divide by 10
+	INC	numexp		; increment number exponent count
+	BNE	LAB_299C		; go test again (branch always)
+
+; now we have just the digits to do
+
+LAB_29C0
+	JSR	LAB_244E		; add 0.5 to FAC1 (round FAC1)
+LAB_29C3
+	JSR	LAB_2831		; convert FAC1 floating-to-fixed
+	LDX	#$01			; set default digits before dp = 1
+	LDA	numexp		; get number exponent count
+	CLC				; clear carry for add
+	ADC	#$07			; up to 6 digits before point
+	BMI	LAB_29D8		; if -ve then 1 digit before dp
+
+	CMP	#$08			; A>=8 if n>=1E6
+	BCS	LAB_29D9		; branch if >= $08
+
+					; carry is clear
+	ADC	#$FF			; take 1 from digit count
+	TAX				; copy to A
+	LDA	#$02			;.set exponent adjust
+LAB_29D8
+	SEC				; set carry for subtract
+LAB_29D9
+	SBC	#$02			; -2
+	STA	expcnt		;.save exponent adjust
+	STX	numexp		; save digits before dp count
+	TXA				; copy to A
+	BEQ	LAB_29E4		; branch if no digits before dp
+
+	BPL	LAB_29F7		; branch if digits before dp
+
+LAB_29E4
+	LDY	Sendl			; get output string index
+	LDA	#$2E			; character "."
+	INY				; increment index
+	STA	Decss,Y		; save to output string
+	TXA				;.
+	BEQ	LAB_29F5		;.
+
+	LDA	#"0"			; character "0"
+	INY				; increment index
+	STA	Decss,Y		; save to output string
+LAB_29F5
+	STY	Sendl			; save output string index
+LAB_29F7
+	LDY	#$00			; clear index (point to 100,000)
+	LDX	#$80			; 
+LAB_29FB
+	LDA	FAC1_3		; get FAC1 mantissa3
+	CLC				; clear carry for add
+	ADC	LAB_2A9C,Y		; add -ve LSB
+	STA	FAC1_3		; save FAC1 mantissa3
+	LDA	FAC1_2		; get FAC1 mantissa2
+	ADC	LAB_2A9B,Y		; add -ve NMSB
+	STA	FAC1_2		; save FAC1 mantissa2
+	LDA	FAC1_1		; get FAC1 mantissa1
+	ADC	LAB_2A9A,Y		; add -ve MSB
+	STA	FAC1_1		; save FAC1 mantissa1
+	INX				; 
+	BCS	LAB_2A18		; 
+
+	BPL	LAB_29FB		; not -ve so try again
+
+	BMI	LAB_2A1A		; 
+
+LAB_2A18
+	BMI	LAB_29FB		; 
+
+LAB_2A1A
+	TXA				; 
+	BCC	LAB_2A21		; 
+
+	EOR	#$FF			; 
+	ADC	#$0A			; 
+LAB_2A21
+	ADC	#"0"-1		; add "0"-1 to result
+	INY				; increment index ..
+	INY				; .. to next less ..
+	INY				; .. power of ten
+	STY	Cvaral		; save as current var address low byte
+	LDY	Sendl			; get output string index
+	INY				; increment output string index
+	TAX				; copy character to X
+	AND	#$7F			; mask out top bit
+	STA	Decss,Y		; save to output string
+	DEC	numexp		; decrement # of characters before the dp
+	BNE	LAB_2A3B		; branch if still characters to do
+
+					; else output the point
+	LDA	#$2E			; character "."
+	INY				; increment output string index
+	STA	Decss,Y		; save to output string
+LAB_2A3B
+	STY	Sendl			; save output string index
+	LDY	Cvaral		; get current var address low byte
+	TXA				; get character back
+	EOR	#$FF			; 
+	AND	#$80			; 
+	TAX				; 
+	CPY	#$12			; compare index with max
+	BNE	LAB_29FB		; loop if not max
+
+					; now remove trailing zeroes
+	LDY	Sendl			; get output string index
+LAB_2A4B
+	LDA	Decss,Y		; get character from output string
+	DEY				; decrement output string index
+	CMP	#"0"			; compare with "0"
+	BEQ	LAB_2A4B		; loop until non "0" character found
+
+	CMP	#"."			; compare with "."
+	BEQ	LAB_2A58		; branch if was dp
+
+					; restore last character
+	INY				; increment output string index
+LAB_2A58
+	LDA	#$2B			; character "+"
+	LDX	expcnt		; get exponent count
+	BEQ	LAB_2A8C		; if zero go set null terminator and exit
+
+					; exponent isn't zero so write exponent
+	BPL	LAB_2A68		; branch if exponent count +ve
+
+	LDA	#$00			; clear A
+	SEC				; set carry for subtract
+	SBC	expcnt		; subtract exponent count adjust (convert -ve to +ve)
+	TAX				; copy exponent count to X
+	LDA	#"-"			; character "-"
+LAB_2A68
+	STA	Decss+2,Y		; save to output string
+	LDA	#$45			; character "E"
+	STA	Decss+1,Y		; save exponent sign to output string
+	TXA				; get exponent count back
+	LDX	#"0"-1		; one less than "0" character
+	SEC				; set carry for subtract
+LAB_2A74
+	INX				; increment 10's character
+	SBC	#$0A			;.subtract 10 from exponent count
+	BCS	LAB_2A74		; loop while still >= 0
+
+	ADC	#":"			; add character ":" ($30+$0A, result is 10 less that value)
+	STA	Decss+4,Y		; save to output string
+	TXA				; copy 10's character
+	STA	Decss+3,Y		; save to output string
+	LDA	#$00			; set null terminator
+	STA	Decss+5,Y		; save to output string
+	BEQ	LAB_2A91		; go set string pointer (AY) and exit (branch always)
+
+					; save last character, [EOT] and exit
+LAB_2A89
+	STA	Decss,Y		; save last character to output string
+
+					; set null terminator and exit
+LAB_2A8C
+	LDA	#$00			; set null terminator
+	STA	Decss+1,Y		; save after last character
+
+					; set string pointer (AY) and exit
+LAB_2A91
+	LDA	#<Decssp1		; set result string low pointer
+	LDY	#>Decssp1		; set result string high pointer
+	RTS
+
+; perform power function
+
+LAB_POWER
+	BEQ	LAB_EXP		; go do  EXP()
+
+	LDA	FAC2_e		; get FAC2 exponent
+	BNE	LAB_2ABF		; branch if FAC2<>0
+
+	JMP	LAB_24F3		; clear FAC1 exponent and sign and return
+
+LAB_2ABF
+	LDX	#<func_l		; set destination pointer low byte
+	LDY	#>func_l		; set destination pointer high byte
+	JSR	LAB_2778		; pack FAC1 into (XY)
+	LDA	FAC2_s		; get FAC2 sign (b7)
+	BPL	LAB_2AD9		; branch if FAC2>0
+
+					; else FAC2 is -ve and can only be raised to an
+					; integer power which gives an x +j0 result
+	JSR	LAB_INT		; perform INT
+	LDA	#<func_l		; set source pointer low byte
+	LDY	#>func_l		; set source pointer high byte
+	JSR	LAB_27F8		; compare FAC1 with (AY)
+	BNE	LAB_2AD9		; branch if FAC1 <> (AY) to allow Function Call error
+					; this will leave FAC1 -ve and cause a Function Call
+					; error when LOG() is called
+
+	TYA				; clear sign b7
+	LDY	Temp3			; save mantissa 3 from INT() function as sign in Y
+					; for possible later negation, b0
+LAB_2AD9
+	JSR	LAB_279D		; save FAC1 sign and copy ABS(FAC2) to FAC1
+	TYA				; copy sign back ..
+	PHA				; .. and save it
+	JSR	LAB_LOG		; do LOG(n)
+	LDA	#<garb_l		; set pointer low byte
+	LDY	#>garb_l		; set pointer high byte
+	JSR	LAB_25FB		; do convert AY, FCA1*(AY) (square the value)
+	JSR	LAB_EXP		; go do EXP(n)
+	PLA				; pull sign from stack
+	LSR				; b0 is to be tested, shift to Cb
+	BCC	LAB_2AF9		; if no bit then exit
+
+					; Perform negation
+; do - FAC1
+
+LAB_GTHAN
+	LDA	FAC1_e		; get FAC1 exponent
+	BEQ	LAB_2AF9		; exit if FAC1_e = $00
+
+	LDA	FAC1_s		; get FAC1 sign (b7)
+	EOR	#$FF			; complement it
+	STA	FAC1_s		; save FAC1 sign (b7)
+LAB_2AF9
+	RTS
+
+; perform EXP()	(x^e)
+
+LAB_EXP
+	LDA	#<LAB_2AFA		; set 1.443 pointer low byte
+	LDY	#>LAB_2AFA		; set 1.443 pointer high byte
+	JSR	LAB_25FB		; do convert AY, FCA1*(AY)
+	LDA	FAC1_r		; get FAC1 rounding byte
+	ADC	#$50			; +$50/$100
+	BCC	LAB_2B2B		; skip rounding if no carry
+
+	JSR	LAB_27C2		; round FAC1 (no check)
+LAB_2B2B
+	STA	FAC2_r		; save FAC2 rounding byte
+	JSR	LAB_27AE		; copy FAC1 to FAC2
+	LDA	FAC1_e		; get FAC1 exponent
+	CMP	#$88			; compare with EXP limit (256d)
+	BCC	LAB_2B39		; branch if less
+
+LAB_2B36
+	JSR	LAB_2690		; handle overflow and underflow
+LAB_2B39
+	JSR	LAB_INT		; perform INT
+	LDA	Temp3			; get mantissa 3 from INT() function
+	CLC				; clear carry for add
+	ADC	#$81			; normalise +1
+	BEQ	LAB_2B36		; if $00 go handle overflow
+
+	SEC				; set carry for subtract
+	SBC	#$01			; now correct for exponent
+	PHA				; save FAC2 exponent
+
+					; swap FAC1 and FAC2
+	LDX	#$04			; 4 bytes to do
+LAB_2B49
+	LDA	FAC2_e,X		; get FAC2,X
+	LDY	FAC1_e,X		; get FAC1,X
+	STA	FAC1_e,X		; save FAC1,X
+	STY	FAC2_e,X		; save FAC2,X
+	DEX				; decrement count/index
+	BPL	LAB_2B49		; loop if not all done
+
+	LDA	FAC2_r		; get FAC2 rounding byte
+	STA	FAC1_r		; save as FAC1 rounding byte
+	JSR	LAB_SUBTRACT	; perform subtraction, FAC2 from FAC1
+	JSR	LAB_GTHAN		; do - FAC1
+	LDA	#<LAB_2AFE		; set counter pointer low byte
+	LDY	#>LAB_2AFE		; set counter pointer high byte
+	JSR	LAB_2B84		; go do series evaluation
+	LDA	#$00			; clear A
+	STA	FAC_sc		; clear sign compare (FAC1 EOR FAC2)
+	PLA				;.get saved FAC2 exponent
+	JMP	LAB_2675		; test and adjust accumulators and return
+
+; ^2 then series evaluation
+
+LAB_2B6E
+	STA	Cptrl			; save count pointer low byte
+	STY	Cptrh			; save count pointer high byte
+	JSR	LAB_276E		; pack FAC1 into Adatal
+	LDA	#<Adatal		; set pointer low byte (Y already $00)
+	JSR	LAB_25FB		; do convert AY, FCA1*(AY)
+	JSR	LAB_2B88		; go do series evaluation
+	LDA	#<Adatal		; pointer to original # low byte
+	LDY	#>Adatal		; pointer to original # high byte
+	JMP	LAB_25FB		; do convert AY, FCA1*(AY) and return
+
+; series evaluation
+
+LAB_2B84
+	STA	Cptrl			; save count pointer low byte
+	STY	Cptrh			; save count pointer high byte
+LAB_2B88
+	LDX	#<numexp		; set pointer low byte
+	JSR	LAB_2770		; set pointer high byte and pack FAC1 into numexp
+	LDA	(Cptrl),Y		; get constants count
+	STA	numcon		; save constants count
+	LDY	Cptrl			; get count pointer low byte
+	INY				; increment it (now constants pointer)
+	TYA				; copy it
+	BNE	LAB_2B97		; skip next if no overflow
+
+	INC	Cptrh			; else increment high byte
+LAB_2B97
+	STA	Cptrl			; save low byte
+	LDY	Cptrh			; get high byte
+LAB_2B9B
+	JSR	LAB_25FB		; do convert AY, FCA1*(AY)
+	LDA	Cptrl			; get constants pointer low byte
+	LDY	Cptrh			; get constants pointer high byte
+	CLC				; clear carry for add
+	ADC	#$04			; +4 to  low pointer (4 bytes per constant)
+	BCC	LAB_2BA8		; skip next if no overflow
+
+	INY				; increment high byte
+LAB_2BA8
+	STA	Cptrl			; save pointer low byte
+	STY	Cptrh			; save pointer high byte
+	JSR	LAB_246C		; add (AY) to FAC1
+	LDA	#<numexp		; set pointer low byte to partial @ numexp
+	LDY	#>numexp		; set pointer high byte to partial @ numexp
+	DEC	numcon		; decrement constants count
+	BNE	LAB_2B9B		; loop until all done
+
+	RTS
+
+; RND(n), 32 bit Galoise version. make n=0 for 19th next number in sequence or n<>0
+; to get 19th next number in sequence after seed n. This version of the PRNG uses
+; the Galois method and a sample of 65536 bytes produced gives the following values.
+
+; Entropy = 7.997442 bits per byte
+; Optimum compression would reduce these 65536 bytes by 0 percent
+
+; Chi square distribution for 65536 samples is 232.01, and
+; randomly would exceed this value 75.00 percent of the time
+
+; Arithmetic mean value of data bytes is 127.6724, 127.5 would be random
+; Monte Carlo value for Pi is 3.122871269, error 0.60 percent
+; Serial correlation coefficient is -0.000370, totally uncorrelated would be 0.0
+
+LAB_RND
+	LDA	FAC1_e		; get FAC1 exponent
+	BEQ	NextPRN		; do next random # if zero
+
+					; else get seed into random number store
+	LDX	#Rbyte4		; set PRNG pointer low byte
+	LDY	#$00			; set PRNG pointer high byte
+	JSR	LAB_2778		; pack FAC1 into (XY)
+NextPRN
+	LDX	#$AF			; set EOR byte
+	LDY	#$13			; do this nineteen times
+LoopPRN
+	ASL	Rbyte1		; shift PRNG most significant byte
+	ROL	Rbyte2		; shift PRNG middle byte
+	ROL	Rbyte3		; shift PRNG least significant byte
+	ROL	Rbyte4		; shift PRNG extra byte
+	BCC	Ninc1			; branch if bit 32 clear
+
+	TXA				; set EOR byte
+	EOR	Rbyte1		; EOR PRNG extra byte
+	STA	Rbyte1		; save new PRNG extra byte
+Ninc1
+	DEY				; decrement loop count
+	BNE	LoopPRN		; loop if not all done
+
+	LDX	#$02			; three bytes to copy
+CopyPRNG
+	LDA	Rbyte1,X		; get PRNG byte
+	STA	FAC1_1,X		; save FAC1 byte
+	DEX
+	BPL	CopyPRNG		; loop if not complete
+
+	LDA	#$80			; set the exponent
+	STA	FAC1_e		; save FAC1 exponent
+
+	ASL				; clear A
+	STA	FAC1_s		; save FAC1 sign
+
+	JMP	LAB_24D5		; normalise FAC1 and return
+
+; perform COS()
+
+LAB_COS
+	LDA	#<LAB_2C78		; set (pi/2) pointer low byte
+	LDY	#>LAB_2C78		; set (pi/2) pointer high byte
+	JSR	LAB_246C		; add (AY) to FAC1
+
+; perform SIN()
+
+LAB_SIN
+	JSR	LAB_27AB		; round and copy FAC1 to FAC2
+	LDA	#<LAB_2C7C		; set (2*pi) pointer low byte
+	LDY	#>LAB_2C7C		; set (2*pi) pointer high byte
+	LDX	FAC2_s		; get FAC2 sign (b7)
+	JSR	LAB_26C2		; divide by (AY) (X=sign)
+	JSR	LAB_27AB		; round and copy FAC1 to FAC2
+	JSR	LAB_INT		; perform INT
+	LDA	#$00			; clear byte
+	STA	FAC_sc		; clear sign compare (FAC1 EOR FAC2)
+	JSR	LAB_SUBTRACT	; perform subtraction, FAC2 from FAC1
+	LDA	#<LAB_2C80		; set 0.25 pointer low byte
+	LDY	#>LAB_2C80		; set 0.25 pointer high byte
+	JSR	LAB_2455		; perform subtraction, (AY) from FAC1
+	LDA	FAC1_s		; get FAC1 sign (b7)
+	PHA				; save FAC1 sign
+	BPL	LAB_2C35		; branch if +ve
+
+					; FAC1 sign was -ve
+	JSR	LAB_244E		; add 0.5 to FAC1
+	LDA	FAC1_s		; get FAC1 sign (b7)
+	BMI	LAB_2C38		; branch if -ve
+
+	LDA	Cflag			; get comparison evaluation flag
+	EOR	#$FF			; toggle flag
+	STA	Cflag			; save comparison evaluation flag
+LAB_2C35
+	JSR	LAB_GTHAN		; do - FAC1
+LAB_2C38
+	LDA	#<LAB_2C80		; set 0.25 pointer low byte
+	LDY	#>LAB_2C80		; set 0.25 pointer high byte
+	JSR	LAB_246C		; add (AY) to FAC1
+	PLA				; restore FAC1 sign
+	BPL	LAB_2C45		; branch if was +ve
+
+					; else correct FAC1
+	JSR	LAB_GTHAN		; do - FAC1
+LAB_2C45
+	LDA	#<LAB_2C84		; set pointer low byte to counter
+	LDY	#>LAB_2C84		; set pointer high byte to counter
+	JMP	LAB_2B6E		; ^2 then series evaluation and return
+
+; perform TAN()
+
+LAB_TAN
+	JSR	LAB_276E		; pack FAC1 into Adatal
+	LDA	#$00			; clear byte
+	STA	Cflag			; clear comparison evaluation flag
+	JSR	LAB_SIN		; go do SIN(n)
+	LDX	#<func_l		; set sin(n) pointer low byte
+	LDY	#>func_l		; set sin(n) pointer high byte
+	JSR	LAB_2778		; pack FAC1 into (XY)
+	LDA	#<Adatal		; set n pointer low addr
+	LDY	#>Adatal		; set n pointer high addr
+	JSR	LAB_UFAC		; unpack memory (AY) into FAC1
+	LDA	#$00			; clear byte
+	STA	FAC1_s		; clear FAC1 sign (b7)
+	LDA	Cflag			; get comparison evaluation flag
+	JSR	LAB_2C74		; save flag and go do series evaluation
+
+	LDA	#<func_l		; set sin(n) pointer low byte
+	LDY	#>func_l		; set sin(n) pointer high byte
+	JMP	LAB_26CA		; convert AY and do (AY)/FAC1
+
+LAB_2C74
+	PHA				; save comparison evaluation flag
+	JMP	LAB_2C35		; go do series evaluation
+
+; perform USR()
+
+LAB_USR
+	JSR	Usrjmp		; call user code
+	JMP	LAB_1BFB		; scan for ")", else do syntax error then warm start
+
+; perform ATN()
+
+LAB_ATN
+	LDA	FAC1_s		; get FAC1 sign (b7)
+	PHA				; save sign
+	BPL	LAB_2CA1		; branch if +ve
+
+	JSR	LAB_GTHAN		; else do - FAC1
+LAB_2CA1
+	LDA	FAC1_e		; get FAC1 exponent
+	PHA				; push exponent
+	CMP	#$81			; compare with 1
+	BCC	LAB_2CAF		; branch if FAC1<1
+
+	LDA	#<LAB_259C		; set 1 pointer low byte
+	LDY	#>LAB_259C		; set 1 pointer high byte
+	JSR	LAB_26CA		; convert AY and do (AY)/FAC1
+LAB_2CAF
+	LDA	#<LAB_2CC9		; set pointer low byte to counter
+	LDY	#>LAB_2CC9		; set pointer high byte to counter
+	JSR	LAB_2B6E		; ^2 then series evaluation
+	PLA				; restore old FAC1 exponent
+	CMP	#$81			; compare with 1
+	BCC	LAB_2CC2		; branch if FAC1<1
+
+	LDA	#<LAB_2C78		; set (pi/2) pointer low byte
+	LDY	#>LAB_2C78		; set (pi/2) pointer high byte
+	JSR	LAB_2455		; perform subtraction, (AY) from FAC1
+LAB_2CC2
+	PLA				; restore FAC1 sign
+	BPL	LAB_2D04		; exit if was +ve
+
+	JMP	LAB_GTHAN		; else do - FAC1 and return
+
+; perform BITSET
+
+LAB_BITSET
+	JSR	LAB_GADB		; get two parameters for POKE or WAIT
+	CPX	#$08			; only 0 to 7 are allowed
+	BCS	FCError		; branch if > 7
+
+	LDA	#$00			; clear A
+	SEC				; set the carry
+S_Bits
+	ROL				; shift bit
+	DEX				; decrement bit number
+	BPL	S_Bits		; loop if still +ve
+
+	INX				; make X = $00
+	ORA	(Itempl,X)		; or with byte via temporary integer (addr)
+	STA	(Itempl,X)		; save byte via temporary integer (addr)
+LAB_2D04
+	RTS
+
+; perform BITCLR
+
+LAB_BITCLR
+	JSR	LAB_GADB		; get two parameters for POKE or WAIT
+	CPX	#$08			; only 0 to 7 are allowed
+	BCS	FCError		; branch if > 7
+
+	LDA	#$FF			; set A
+S_Bitc
+	ROL				; shift bit
+	DEX				; decrement bit number
+	BPL	S_Bitc		; loop if still +ve
+
+	INX				; make X = $00
+	AND	(Itempl,X)		; and with byte via temporary integer (addr)
+	STA	(Itempl,X)		; save byte via temporary integer (addr)
+	RTS
+
+FCError
+	JMP	LAB_FCER		; do function call error then warm start
+
+; perform BITTST()
+
+LAB_BTST
+	JSR	LAB_IGBY		; increment BASIC pointer
+	JSR	LAB_GADB		; get two parameters for POKE or WAIT
+	CPX	#$08			; only 0 to 7 are allowed
+	BCS	FCError		; branch if > 7
+
+	JSR	LAB_GBYT		; get next BASIC byte
+	CMP	#")"			; is next character ")"
+	BEQ	TST_OK		; if ")" go do rest of function
+
+	JMP	LAB_SNER		; do syntax error then warm start
+
+TST_OK
+	JSR	LAB_IGBY		; update BASIC execute pointer (to character past ")")
+	LDA	#$00			; clear A
+	SEC				; set the carry
+T_Bits
+	ROL				; shift bit
+	DEX				; decrement bit number
+	BPL	T_Bits		; loop if still +ve
+
+	INX				; make X = $00
+	AND	(Itempl,X)		; AND with byte via temporary integer (addr)
+	BEQ	LAB_NOTT		; branch if zero (already correct)
+
+	LDA	#$FF			; set for -1 result
+LAB_NOTT
+	JMP	LAB_27DB		; go do SGN tail
+
+; perform BIN$()
+
+LAB_BINS
+	CPX	#$19			; max + 1
+	BCS	BinFErr		; exit if too big ( > or = )
+
+	STX	TempB			; save # of characters ($00 = leading zero remove)
+	LDA	#$18			; need A byte long space
+	JSR	LAB_MSSP		; make string space A bytes long
+	LDY	#$17			; set index
+	LDX	#$18			; character count
+NextB1
+	LSR	nums_1		; shift highest byte
+	ROR	nums_2		; shift middle byte
+	ROR	nums_3		; shift lowest byte bit 0 to carry
+	TXA				; load with "0"/2
+	ROL				; shift in carry
+	STA	(str_pl),Y		; save to temp string + index
+	DEY				; decrement index
+	BPL	NextB1		; loop if not done
+
+	LDA	TempB			; get # of characters
+	BEQ	EndBHS		; branch if truncate
+
+	TAX				; copy length to X
+	SEC				; set carry for add !
+	EOR	#$FF			; 1's complement
+	ADC	#$18			; add 24d
+	BEQ	GoPr2			; if zero print whole string
+
+	BNE	GoPr1			; else go make output string
+	
+; this is the exit code and is also used by HEX$()
+; truncate string to remove leading "0"s
+
+EndBHS
+	TAY				; clear index (A=0, X=length here)
+NextB2
+	LDA	(str_pl),Y		; get character from string
+	CMP	#"0"			; compare with "0"
+	BNE	GoPr			; if not "0" then go print string from here
+
+	DEX				; decrement character count
+	BEQ	GoPr3			; if zero then end of string so go print it
+
+	INY				; else increment index
+	BPL	NextB2		; loop always
+
+; make fixed length output string - ignore overflows!
+
+GoPr3
+	INX				; need at least 1 character
+GoPr
+	TYA				; copy result
+GoPr1
+	CLC				; clear carry for add
+	ADC	str_pl		; add low address
+	STA	str_pl		; save low address
+	LDA	#$00			; do high byte
+	ADC	str_ph		; add high address
+	STA	str_ph		; save high address
+GoPr2
+	STX	str_ln		; X holds string length
+	JSR	LAB_IGBY		; update BASIC execute pointer (to character past ")")
+	JMP	LAB_RTST		; check for space on descriptor stack then put address
+					; and length on descriptor stack and update stack pointers
+
+BinFErr
+	JMP	LAB_FCER		; do function call error then warm start
+
+; perform HEX$()
+
+LAB_HEXS
+	CPX	#$07			; max + 1
+	BCS	BinFErr		; exit if too big ( > or = )
+
+	STX	TempB			; save # of characters
+
+	LDA	#$06			; need 6 bytes for string
+	JSR	LAB_MSSP		; make string space A bytes long
+	LDY	#$05			; set string index
+
+	SED				; need decimal mode for nibble convert
+	LDA	nums_3		; get lowest byte
+	JSR	LAB_A2HX		; convert A to ASCII hex byte and output
+	LDA	nums_2		; get middle byte
+	JSR	LAB_A2HX		; convert A to ASCII hex byte and output
+	LDA	nums_1		; get highest byte
+	JSR	LAB_A2HX		; convert A to ASCII hex byte and output
+	CLD				; back to binary
+
+	LDX	#$06			; character count
+	LDA	TempB			; get # of characters
+	BEQ	EndBHS		; branch if truncate
+
+	TAX				; copy length to X
+	SEC				; set carry for add !
+	EOR	#$FF			; 1's complement
+	ADC	#$06			; add 6d
+	BEQ	GoPr2			; if zero print whole string
+
+	BNE	GoPr1			; else go make output string (branch always)
+
+; convert A to ASCII hex byte and output .. note set decimal mode before calling
+
+LAB_A2HX
+	TAX				; save byte
+	AND	#$0F			; mask off top bits
+	JSR	LAB_AL2X		; convert low nibble to ASCII and output
+	TXA				; get byte back
+	LSR				; /2	shift high nibble to low nibble
+	LSR				; /4
+	LSR				; /8
+	LSR				; /16
+LAB_AL2X
+	CMP	#$0A			; set carry for +1 if >9
+	ADC	#"0"			; add ASCII "0"
+	STA	(str_pl),Y		; save to temp string
+	DEY				; decrement counter
+	RTS
+
+LAB_NLTO
+	STA	FAC1_e		; save FAC1 exponent
+	LDA	#$00			; clear sign compare
+LAB_MLTE
+	STA	FAC_sc		; save sign compare (FAC1 EOR FAC2)
+	TXA				; restore character
+	JSR	LAB_2912		; evaluate new ASCII digit
+
+; gets here if the first character was "$" for hex
+; get hex number
+
+LAB_CHEX
+	JSR	LAB_IGBY		; increment and scan memory
+	BCC	LAB_ISHN		; branch if numeric character
+
+	ORA	#$20			; case convert, allow "A" to "F" and "a" to "f"
+	SBC	#"a"			; subtract "a" (carry set here)
+	CMP	#$06			; compare normalised with $06 (max+1)
+	BCS	LAB_EXCH		; exit if >"f" or <"0"
+
+	ADC	#$0A			; convert to nibble
+LAB_ISHN
+	AND	#$0F			; convert to binary
+	TAX				; save nibble
+	LDA	FAC1_e		; get FAC1 exponent
+	BEQ	LAB_MLTE		; skip multiply if zero
+
+	ADC	#$04			; add four to exponent (*16 - carry clear here)
+	BCC	LAB_NLTO		; if no overflow do evaluate digit
+
+LAB_MLTO
+	JMP	LAB_2564		; do overflow error and warm start
+
+LAB_NXCH
+	TAX				; save bit
+	LDA	FAC1_e		; get FAC1 exponent
+	BEQ	LAB_MLBT		; skip multiply if zero
+
+	INC	FAC1_e		; increment FAC1 exponent (*2)
+	BEQ	LAB_MLTO		; do overflow error if = $00
+
+	LDA	#$00			; clear sign compare
+LAB_MLBT
+	STA	FAC_sc		; save sign compare (FAC1 EOR FAC2)
+	TXA				; restore bit
+	JSR	LAB_2912		; evaluate new ASCII digit
+
+; gets here if the first character was  "%" for binary
+; get binary number
+
+LAB_CBIN
+	JSR	LAB_IGBY		; increment and scan memory
+	EOR	#"0"			; convert "0" to 0 etc.
+	CMP	#$02			; compare with max+1
+	BCC	LAB_NXCH		; branch exit if < 2
+
+LAB_EXCH
+	JMP	LAB_28F6		; evaluate -ve flag and return
+
+; ctrl-c check routine. includes limited "life" byte save for INGET routine
+; now also the code that checks to see if an interrupt has occurred
+
+CTRLC
+	LDA	ccflag		; get [CTRL-C] check flag
+	BNE	LAB_FBA2		; exit if inhibited
+
+	JSR	V_INPT		; scan input device
+	BCC	LAB_FBA0		; exit if buffer empty
+
+	STA	ccbyte		; save received byte
+	LDX	#$20			; "life" timer for bytes
+	STX	ccnull		; set countdown
+	JMP	LAB_1636		; return to BASIC
+
+LAB_FBA0
+	LDX	ccnull		; get countdown byte
+	BEQ	LAB_FBA2		; exit if finished
+
+	DEC	ccnull		; else decrement countdown
+LAB_FBA2
+	LDX	#NmiBase		; set pointer to NMI values
+	JSR	LAB_CKIN		; go check interrupt
+	LDX	#IrqBase		; set pointer to IRQ values
+	JSR	LAB_CKIN		; go check interrupt
+LAB_CRTS
+	RTS
+
+; check whichever interrupt is indexed by X
+
+LAB_CKIN
+	LDA	PLUS_0,X		; get interrupt flag byte
+	BPL	LAB_CRTS		; branch if interrupt not enabled
+
+; we disable the interrupt here and make two new commands RETIRQ and RETNMI to
+; automatically enable the interrupt when we exit
+
+	ASL				; move happened bit to setup bit
+	AND	#$40			; mask happened bits
+	BEQ	LAB_CRTS		; if no interrupt then exit
+
+	STA	PLUS_0,X		; save interrupt flag byte
+
+	TXA				; copy index ..
+	TAY				; .. to Y
+
+	PLA				; dump return address low byte, call from CTRL-C
+	PLA				; dump return address high byte
+
+	LDA	#$05			; need 5 bytes for GOSUB
+	JSR	LAB_1212		; check room on stack for A bytes
+	LDA	Bpntrh		; get BASIC execute pointer high byte
+	PHA				; push on stack
+	LDA	Bpntrl		; get BASIC execute pointer low byte
+	PHA				; push on stack
+	LDA	Clineh		; get current line high byte
+	PHA				; push on stack
+	LDA	Clinel		; get current line low byte
+	PHA				; push on stack
+	LDA	#TK_GOSUB		; token for GOSUB
+	PHA				; push on stack
+
+	LDA	PLUS_1,Y		; get interrupt code pointer low byte
+	STA	Bpntrl		; save as BASIC execute pointer low byte
+	LDA	PLUS_2,Y		; get interrupt code pointer high byte
+	STA	Bpntrh		; save as BASIC execute pointer high byte
+
+	JMP	LAB_15C2		; go do interpreter inner loop
+					; can't RTS, we used the stack! the RTS from the ctrl-c
+					; check will be taken when the RETIRQ/RETNMI/RETURN is
+					; executed at the end of the subroutine
+
+; get byte from input device, no waiting
+; returns with carry set if byte in A
+
+INGET
+	JSR	V_INPT		; call scan input device
+	BCS	LAB_FB95		; if byte go reset timer
+
+	LDA	ccnull		; get countdown
+	BEQ	LAB_FB96		; exit if empty
+
+	LDA	ccbyte		; get last received byte
+	SEC				; flag we got a byte
+LAB_FB95
+	LDX	#$00			; clear X
+	STX	ccnull		; clear timer because we got a byte
+LAB_FB96
+	RTS
+
+; these routines only enable the interrupts if the set-up flag is set
+; if not they have no effect
+
+; perform IRQ {ON|OFF|CLEAR}
+
+LAB_IRQ
+	LDX	#IrqBase		; set pointer to IRQ values
+	.byte	$2C			; make next line BIT abs.
+
+; perform NMI {ON|OFF|CLEAR}
+
+LAB_NMI
+	LDX	#NmiBase		; set pointer to NMI values
+	CMP	#TK_ON		; compare with token for ON
+	BEQ	LAB_INON		; go turn on interrupt
+
+	CMP	#TK_OFF		; compare with token for OFF
+	BEQ	LAB_IOFF		; go turn off interrupt
+
+	EOR	#TK_CLEAR		; compare with token for CLEAR, A = $00 if = TK_CLEAR
+	BEQ	LAB_INEX		; go clear interrupt flags and return
+
+	JMP	LAB_SNER		; do syntax error then warm start
+
+LAB_IOFF
+	LDA	#$7F			; clear A
+	AND	PLUS_0,X		; AND with interrupt setup flag
+	BPL	LAB_INEX		; go clear interrupt enabled flag and return
+
+LAB_INON
+	LDA	PLUS_0,X		; get interrupt setup flag
+	ASL				; Shift bit to enabled flag
+	ORA	PLUS_0,X		; OR with flag byte
+LAB_INEX
+	STA	PLUS_0,X		; save interrupt flag byte
+	JMP	LAB_IGBY		; update BASIC execute pointer and return
+
+; these routines set up the pointers and flags for the interrupt routines
+; note that the interrupts are also enabled by these commands
+
+; perform ON IRQ
+
+LAB_SIRQ
+	CLI				; enable interrupts
+	LDX	#IrqBase		; set pointer to IRQ values
+	.byte	$2C			; make next line BIT abs.
+
+; perform ON NMI
+
+LAB_SNMI
+	LDX	#NmiBase		; set pointer to NMI values
+
+	STX	TempB			; save interrupt pointer
+	JSR	LAB_IGBY		; increment and scan memory (past token)
+	JSR	LAB_GFPN		; get fixed-point number into temp integer
+	LDA	Smeml			; get start of mem low byte
+	LDX	Smemh			; get start of mem high byte
+	JSR	LAB_SHLN		; search Basic for temp integer line number from AX
+	BCS	LAB_LFND		; if carry set go set-up interrupt
+
+	JMP	LAB_16F7		; else go do "Undefined statement" error and warm start
+
+LAB_LFND
+	LDX	TempB			; get interrupt pointer
+	LDA	Baslnl		; get pointer low byte
+	SBC	#$01			; -1 (carry already set for subtract)
+	STA	PLUS_1,X		; save as interrupt pointer low byte
+	LDA	Baslnh		; get pointer high byte
+	SBC	#$00			; subtract carry
+	STA	PLUS_2,X		; save as interrupt pointer high byte
+
+	LDA	#$C0			; set interrupt enabled/setup bits
+	STA	PLUS_0,X		; set interrupt flags
+LAB_IRTS
+	RTS
+
+; return from IRQ service, restores the enabled flag.
+
+; perform RETIRQ
+
+LAB_RETIRQ
+	BNE	LAB_IRTS		; exit if following token (to allow syntax error)
+
+	LDA	IrqBase		; get interrupt flags
+	ASL				; copy setup to enabled (b7)
+	ORA	IrqBase		; OR in setup flag
+	STA	IrqBase		; save enabled flag
+	JMP	LAB_16E8		; go do rest of RETURN
+
+; return from NMI service, restores the enabled flag.
+
+; perform RETNMI
+
+LAB_RETNMI
+	BNE	LAB_IRTS		; exit if following token (to allow syntax error)
+
+	LDA	NmiBase		; get set-up flag
+	ASL				; copy setup to enabled (b7)
+	ORA	NmiBase		; OR in setup flag
+	STA	NmiBase		; save enabled flag
+	JMP	LAB_16E8		; go do rest of RETURN
+
+; MAX() MIN() pre process
+
+LAB_MMPP
+	JSR	LAB_EVEZ		; process expression
+	JMP	LAB_CTNM		; check if source is numeric, else do type mismatch
+
+; perform MAX()
+
+LAB_MAX
+	JSR	LAB_PHFA		; push FAC1, evaluate expression,
+					; pull FAC2 and compare with FAC1
+	BPL	LAB_MAX		; branch if no swap to do
+
+	LDA	FAC2_1		; get FAC2 mantissa1
+	ORA	#$80			; set top bit (clear sign from compare)
+	STA	FAC2_1		; save FAC2 mantissa1
+	JSR	LAB_279B		; copy FAC2 to FAC1
+	BEQ	LAB_MAX		; go do next (branch always)
+
+; perform MIN()
+
+LAB_MIN
+	JSR	LAB_PHFA		; push FAC1, evaluate expression,
+					; pull FAC2 and compare with FAC1
+	BMI	LAB_MIN		; branch if no swap to do
+
+	BEQ	LAB_MIN		; branch if no swap to do
+
+	LDA	FAC2_1		; get FAC2 mantissa1
+	ORA	#$80			; set top bit (clear sign from compare)
+	STA	FAC2_1		; save FAC2 mantissa1
+	JSR	LAB_279B		; copy FAC2 to FAC1
+	BEQ	LAB_MIN		; go do next (branch always)
+
+; exit routine. don't bother returning to the loop code
+; check for correct exit, else so syntax error
+
+LAB_MMEC
+	CMP	#")"			; is it end of function?
+	BNE	LAB_MMSE		; if not do MAX MIN syntax error
+
+	PLA				; dump return address low byte
+	PLA				; dump return address high byte
+	JMP	LAB_IGBY		; update BASIC execute pointer (to chr past ")")
+
+LAB_MMSE
+	JMP	LAB_SNER		; do syntax error then warm start
+
+; check for next, evaluate and return or exit
+; this is the routine that does most of the work
+
+LAB_PHFA
+	JSR	LAB_GBYT		; get next BASIC byte
+	CMP	#","			; is there more ?
+	BNE	LAB_MMEC		; if not go do end check
+
+					; push FAC1
+	JSR	LAB_27BA		; round FAC1
+	LDA	FAC1_s		; get FAC1 sign
+	ORA	#$7F			; set all non sign bits
+	AND	FAC1_1		; AND FAC1 mantissa1 (AND in sign bit)
+	PHA				; push on stack
+	LDA	FAC1_2		; get FAC1 mantissa2
+	PHA				; push on stack
+	LDA	FAC1_3		; get FAC1 mantissa3
+	PHA				; push on stack
+	LDA	FAC1_e		; get FAC1 exponent
+	PHA				; push on stack
+
+	JSR	LAB_IGBY		; scan and get next BASIC byte (after ",")
+	JSR	LAB_EVNM		; evaluate expression and check is numeric,
+					; else do type mismatch
+
+					; pop FAC2 (MAX/MIN expression so far)
+	PLA				; pop exponent
+	STA	FAC2_e		; save FAC2 exponent
+	PLA				; pop mantissa3
+	STA	FAC2_3		; save FAC2 mantissa3
+	PLA				; pop mantissa1
+	STA	FAC2_2		; save FAC2 mantissa2
+	PLA				; pop sign/mantissa1
+	STA	FAC2_1		; save FAC2 sign/mantissa1
+	STA	FAC2_s		; save FAC2 sign
+
+					; compare FAC1 with (packed) FAC2
+	LDA	#<FAC2_e		; set pointer low byte to FAC2
+	LDY	#>FAC2_e		; set pointer high byte to FAC2
+	JMP	LAB_27F8		; compare FAC1 with FAC2 (AY) and return
+					; returns A=$00 if FAC1 = (AY)
+					; returns A=$01 if FAC1 > (AY)
+					; returns A=$FF if FAC1 < (AY)
+
+; perform WIDTH
+
+LAB_WDTH
+	CMP	#","			; is next byte ","
+	BEQ	LAB_TBSZ		; if so do tab size
+
+	JSR	LAB_GTBY		; get byte parameter
+	TXA				; copy width to A
+	BEQ	LAB_NSTT		; branch if set for infinite line
+
+	CPX	#$10			; else make min width = 16d
+	BCC	TabErr		; if less do function call error and exit
+
+; this next compare ensures that we can't exit WIDTH via an error leaving the
+; tab size greater than the line length.
+
+	CPX	TabSiz		; compare with tab size
+	BCS	LAB_NSTT		; branch if >= tab size
+
+	STX	TabSiz		; else make tab size = terminal width
+LAB_NSTT
+	STX	TWidth		; set the terminal width
+	JSR	LAB_GBYT		; get BASIC byte back
+	BEQ	WExit			; exit if no following
+
+	CMP	#","			; else is it ","
+	BNE	LAB_MMSE		; if not do syntax error
+
+LAB_TBSZ
+	JSR	LAB_SGBY		; scan and get byte parameter
+	TXA				; copy TAB size
+	BMI	TabErr		; if >127 do function call error and exit
+
+	CPX	#$01			; compare with min-1
+	BCC	TabErr		; if <=1 do function call error and exit
+
+	LDA	TWidth		; set flags for width
+	BEQ	LAB_SVTB		; skip check if infinite line
+
+	CPX	TWidth		; compare TAB with width
+	BEQ	LAB_SVTB		; ok if =
+
+	BCS	TabErr		; branch if too big
+
+LAB_SVTB
+	STX	TabSiz		; save TAB size
+
+; calculate tab column limit from TAB size. The Iclim is set to the last tab
+; position on a line that still has at least one whole tab width between it
+; and the end of the line.
+
+WExit
+	LDA	TWidth		; get width
+	BEQ	LAB_SULP		; branch if infinite line
+
+	CMP	TabSiz		; compare with tab size
+	BCS	LAB_WDLP		; branch if >= tab size
+
+	STA	TabSiz		; else make tab size = terminal width
+LAB_SULP
+	SEC				; set carry for subtract
+LAB_WDLP
+	SBC	TabSiz		; subtract tab size
+	BCS	LAB_WDLP		; loop while no borrow
+
+	ADC	TabSiz		; add tab size back
+	CLC				; clear carry for add
+	ADC	TabSiz		; add tab size back again
+	STA	Iclim			; save for now
+	LDA	TWidth		; get width back
+	SEC				; set carry for subtract
+	SBC	Iclim			; subtract remainder
+	STA	Iclim			; save tab column limit
+LAB_NOSQ
+	RTS
+
+TabErr
+	JMP	LAB_FCER		; do function call error then warm start
+
+; perform SQR()
+
+LAB_SQR
+	LDA	FAC1_s		; get FAC1 sign
+	BMI	TabErr		; if -ve do function call error
+
+	LDA	FAC1_e		; get exponent
+	BEQ	LAB_NOSQ		; if zero just return
+
+					; else do root
+	JSR	LAB_27AB		; round and copy FAC1 to FAC2
+	LDA	#$00			; clear A
+
+	STA	FACt_3		; clear remainder
+	STA	FACt_2		; ..
+	STA	FACt_1		; ..
+	STA	TempB			; ..
+
+	STA	FAC1_3		; clear root
+	STA	FAC1_2		; ..
+	STA	FAC1_1		; ..
+
+	LDX	#$18			; 24 pairs of bits to do
+	LDA	FAC2_e		; get exponent
+	LSR				; check odd/even
+	BCS	LAB_SQE2		; if odd only 1 shift first time
+
+LAB_SQE1
+	ASL	FAC2_3		; shift highest bit of number ..
+	ROL	FAC2_2		; ..
+	ROL	FAC2_1		; ..
+	ROL	FACt_3		; .. into remainder
+	ROL	FACt_2		; ..
+	ROL	FACt_1		; ..
+	ROL	TempB			; .. never overflows
+LAB_SQE2
+	ASL	FAC2_3		; shift highest bit of number ..
+	ROL	FAC2_2		; ..
+	ROL	FAC2_1		; ..
+	ROL	FACt_3		; .. into remainder
+	ROL	FACt_2		; ..
+	ROL	FACt_1		; ..
+	ROL	TempB			; .. never overflows
+
+	ASL	FAC1_3		; root = root * 2
+	ROL	FAC1_2		; ..
+	ROL	FAC1_1		; .. never overflows
+
+	LDA	FAC1_3		; get root low byte
+	ROL				; *2
+	STA	Temp3			; save partial low byte
+	LDA	FAC1_2		; get root low mid byte
+	ROL				; *2
+	STA	Temp3+1		; save partial low mid byte
+	LDA	FAC1_1		; get root high mid byte
+	ROL				; *2
+	STA	Temp3+2		; save partial high mid byte
+	LDA	#$00			; get root high byte (always $00)
+	ROL				; *2
+	STA	Temp3+3		; save partial high byte
+
+					; carry clear for subtract +1
+	LDA	FACt_3		; get remainder low byte
+	SBC	Temp3			; subtract partial low byte
+	STA	Temp3			; save partial low byte
+
+	LDA	FACt_2		; get remainder low mid byte
+	SBC	Temp3+1		; subtract partial low mid byte
+	STA	Temp3+1		; save partial low mid byte
+
+	LDA	FACt_1		; get remainder high mid byte
+	SBC	Temp3+2		; subtract partial high mid byte
+	TAY				; copy partial high mid byte
+
+	LDA	TempB			; get remainder high byte
+	SBC	Temp3+3		; subtract partial high byte
+	BCC	LAB_SQNS		; skip sub if remainder smaller
+
+	STA	TempB			; save remainder high byte
+
+	STY	FACt_1		; save remainder high mid byte
+
+	LDA	Temp3+1		; get remainder low mid byte
+	STA	FACt_2		; save remainder low mid byte
+
+	LDA	Temp3			; get partial low byte
+	STA	FACt_3		; save remainder low byte
+
+	INC	FAC1_3		; increment root low byte (never any rollover)
+LAB_SQNS
+	DEX				; decrement bit pair count
+	BNE	LAB_SQE1		; loop if not all done
+
+	SEC				; set carry for subtract
+	LDA	FAC2_e		; get exponent
+	SBC	#$80			; normalise
+	ROR				; /2 and re-bias to $80
+	ADC	#$00			; add bit zero back in (allow for half shift)
+	STA	FAC1_e		; save it
+	JMP	LAB_24D5		; normalise FAC1 and return
+
+; perform VARPTR()
+
+LAB_VARPTR
+	JSR	LAB_IGBY		; increment and scan memory
+	JSR	LAB_GVAR		; get var address
+	JSR	LAB_1BFB		; scan for ")" , else do syntax error then warm start
+	LDY	Cvaral		; get var address low byte
+	LDA	Cvarah		; get var address high byte
+	JMP	LAB_AYFC		; save and convert integer AY to FAC1 and return
+
+; perform PI
+
+LAB_PI
+	LDA	#<LAB_2C7C		; set (2*pi) pointer low byte
+	LDY	#>LAB_2C7C		; set (2*pi) pointer high byte
+	JSR	LAB_UFAC		; unpack memory (AY) into FAC1
+	DEC	FAC1_e		; make result = PI
+	RTS
+
+; perform TWOPI
+
+LAB_TWOPI
+	LDA	#<LAB_2C7C		; set (2*pi) pointer low byte
+	LDY	#>LAB_2C7C		; set (2*pi) pointer high byte
+	JMP	LAB_UFAC		; unpack memory (AY) into FAC1 and return
+
+; system dependant i/o vectors
+; these are in RAM and are set by the monitor at start-up
+
+V_INPT
+	JMP	(VEC_IN)		; non halting scan input device
+V_OUTP
+	JMP	(VEC_OUT)		; send byte to output device
+V_LOAD
+	JMP	(VEC_LD)		; load BASIC program
+V_SAVE
+	JMP	(VEC_SV)		; save BASIC program
+
+; The rest are tables messages and code for RAM
+
+; the rest of the code is tables and BASIC start-up code
+
+PG2_TABS
+	.byte	$00			; ctrl-c flag		-	$00 = enabled
+	.byte	$00			; ctrl-c byte		-	GET needs this
+	.byte	$00			; ctrl-c byte timeout	-	GET needs this
+	.word	CTRLC			; ctrl c check vector
+;	.word	xxxx			; non halting key input	-	monitor to set this
+;	.word	xxxx			; output vector		-	monitor to set this
+;	.word	xxxx			; load vector		-	monitor to set this
+;	.word	xxxx			; save vector		-	monitor to set this
+PG2_TABE
+
+; character get subroutine for zero page
+
+; For a 1.8432MHz 6502 including the JSR and RTS
+; fastest (>=":")	=  29 cycles =  15.7uS
+; slowest (<":")	=  40 cycles =  21.7uS
+; space skip	= +21 cycles = +11.4uS
+; inc across page	=  +4 cycles =  +2.2uS
+
+; the target address for the LDA at LAB_2CF4 becomes the BASIC execute pointer once the
+; block is copied to it's destination, any non zero page address will do at assembly
+; time, to assemble a three byte instruction.
+
+; page 0 initialisation table from $BC
+; increment and scan memory
+
+LAB_2CEE
+	INC	Bpntrl		; increment BASIC execute pointer low byte
+	BNE	LAB_2CF4		; branch if no carry
+					; else
+	INC	Bpntrh		; increment BASIC execute pointer high byte
+
+; page 0 initialisation table from $C2
+; scan memory
+
+LAB_2CF4
+	LDA	$FFFF			; get byte to scan (addr set by call routine)
+	CMP	#TK_ELSE		; compare with the token for ELSE
+	BEQ	LAB_2D05		; exit if ELSE, not numeric, carry set
+
+	CMP	#":"			; compare with ":"
+	BCS	LAB_2D05		; exit if >= ":", not numeric, carry set
+
+	CMP	#" "			; compare with " "
+	BEQ	LAB_2CEE		; if " " go do next
+
+	SEC				; set carry for SBC
+	SBC	#"0"			; subtract "0"
+	SEC				; set carry for SBC
+	SBC	#$D0			; subtract -"0"
+					; clear carry if byte = "0"-"9"
+LAB_2D05
+	RTS
+
+; page zero initialisation table $00-$12 inclusive
+
+StrTab
+	.byte	$4C			; JMP opcode
+	.word LAB_COLD		; initial warm start vector (cold start)
+
+	.byte	$00			; these bytes are not used by BASIC
+	.word	$0000			; 
+	.word	$0000			; 
+	.word	$0000			; 
+
+	.byte	$4C			; JMP opcode
+	.word	LAB_FCER		; initial user function vector ("Function call" error)
+	.byte	$00			; default NULL count
+	.byte	$00			; clear terminal position
+	.byte	$00			; default terminal width byte
+	.byte	$F2			; default limit for TAB = 14
+	.word	Ram_base		; start of user RAM
+EndTab
+
+LAB_MSZM
+	.byte	$0D,$0A,"Memory size ",$00
+
+LAB_SMSG
+	.byte	" Bytes free",$0D,$0A,$0A
+	.byte	"Enhanced BASIC 2.22",$0A,$00
+
+; numeric constants and series
+
+					; constants and series for LOG(n)
+LAB_25A0
+	.byte	$02			; counter
+	.byte	$80,$19,$56,$62	; 0.59898
+	.byte	$80,$76,$22,$F3	; 0.96147
+;##	.byte	$80,$76,$22,$F1	; 0.96147
+	.byte	$82,$38,$AA,$40	; 2.88539
+;##	.byte	$82,$38,$AA,$45	; 2.88539
+
+LAB_25AD
+	.byte	$80,$35,$04,$F3	; 0.70711	1/root 2
+LAB_25B1
+	.byte	$81,$35,$04,$F3	; 1.41421	root 2
+LAB_25B5
+	.byte	$80,$80,$00,$00	; -0.5
+LAB_25B9
+	.byte	$80,$31,$72,$18	; 0.69315	LOG(2)
+
+					; numeric PRINT constants
+LAB_2947
+	.byte	$91,$43,$4F,$F8	; 99999.9375 (max value with at least one decimal)
+LAB_294B
+	.byte	$94,$74,$23,$F7	; 999999.4375 (max value before scientific notation)
+LAB_294F
+	.byte	$94,$74,$24,$00	; 1000000
+
+					; EXP(n) constants and series
+LAB_2AFA
+	.byte	$81,$38,$AA,$3B	; 1.4427	(1/LOG base 2 e)
+LAB_2AFE
+	.byte	$06			; counter
+	.byte	$74,$63,$90,$8C	; 2.17023e-4
+	.byte	$77,$23,$0C,$AB	; 0.00124
+	.byte	$7A,$1E,$94,$00	; 0.00968
+	.byte	$7C,$63,$42,$80	; 0.05548
+	.byte	$7E,$75,$FE,$D0	; 0.24023
+	.byte	$80,$31,$72,$15	; 0.69315
+	.byte	$81,$00,$00,$00	; 1.00000
+
+;##	.byte	$07			; counter
+;##	.byte	$74,$94,$2E,$40	; -1/7! (-1/5040)
+;##	.byte	$77,$2E,$4F,$70	;  1/6! ( 1/720)
+;##	.byte	$7A,$88,$02,$6E	; -1/5! (-1/120)
+;##	.byte	$7C,$2A,$A0,$E6	;  1/4! ( 1/24)
+;##	.byte	$7E,$AA,$AA,$50	; -1/3! (-1/6)
+;##	.byte	$7F,$7F,$FF,$FF	;  1/2! ( 1/2)
+;##	.byte	$81,$80,$00,$00	; -1/1! (-1/1)
+;##	.byte	$81,$00,$00,$00	;  1/0! ( 1/1)
+
+					; trigonometric constants and series
+LAB_2C78
+	.byte	$81,$49,$0F,$DB	; 1.570796371 (pi/2) as floating #
+LAB_2C84
+	.byte	$04			; counter
+	.byte	$86,$1E,$D7,$FB	; 39.7109
+;##	.byte	$86,$1E,$D7,$BA	; 39.7109
+	.byte	$87,$99,$26,$65	;-76.575
+;##	.byte	$87,$99,$26,$64	;-76.575
+	.byte	$87,$23,$34,$58	; 81.6022
+	.byte	$86,$A5,$5D,$E1	;-41.3417
+;##	.byte	$86,$A5,$5D,$E0	;-41.3417
+LAB_2C7C
+	.byte	$83,$49,$0F,$DB	; 6.28319 (2*pi) as floating #
+;##	.byte	$83,$49,$0F,$DA	; 6.28319 (2*pi) as floating #
+
+LAB_2CC9
+	.byte	$08			; counter
+	.byte	$78,$3A,$C5,$37	; 0.00285
+	.byte	$7B,$83,$A2,$5C	;-0.0160686
+	.byte	$7C,$2E,$DD,$4D	; 0.0426915
+	.byte	$7D,$99,$B0,$1E	;-0.0750429
+	.byte	$7D,$59,$ED,$24	; 0.106409
+	.byte	$7E,$91,$72,$00	;-0.142036
+	.byte	$7E,$4C,$B9,$73	; 0.199926
+	.byte	$7F,$AA,$AA,$53	;-0.333331
+
+;##	.byte	$08			; counter
+;##	.byte	$78,$3B,$D7,$4A	; 1/17
+;##	.byte	$7B,$84,$6E,$02	;-1/15
+;##	.byte	$7C,$2F,$C1,$FE	; 1/13
+;##	.byte	$7D,$9A,$31,$74	;-1/11
+;##	.byte	$7D,$5A,$3D,$84	; 1/9
+;##	.byte	$7E,$91,$7F,$C8	;-1/7
+;##	.byte	$7E,$4C,$BB,$E4	; 1/5
+;##	.byte	$7F,$AA,$AA,$6C	;-1/3
+
+LAB_1D96	= *+1			; $00,$00 used for undefined variables
+LAB_259C
+	.byte	$81,$00,$00,$00	; 1.000000, used for INC
+LAB_2AFD
+	.byte	$81,$80,$00,$00	; -1.00000, used for DEC. must be on the same page as +1.00
+
+					; misc constants
+LAB_1DF7
+	.byte	$90			;-32768 (uses first three bytes from 0.5)
+LAB_2A96
+	.byte	$80,$00,$00,$00	; 0.5
+LAB_2C80
+	.byte	$7F,$00,$00,$00	; 0.25
+LAB_26B5
+	.byte	$84,$20,$00,$00	; 10.0000 divide by 10 constant
+
+; This table is used in converting numbers to ASCII.
+
+LAB_2A9A
+LAB_2A9B = LAB_2A9A+1
+LAB_2A9C = LAB_2A9B+1
+	.byte	$FE,$79,$60		; -100000
+	.byte	$00,$27,$10		; 10000
+	.byte	$FF,$FC,$18		; -1000
+	.byte	$00,$00,$64		; 100
+	.byte	$FF,$FF,$F6		; -10
+	.byte	$00,$00,$01		; 1
+
+LAB_CTBL
+	.word	LAB_END-1		; END
+	.word	LAB_FOR-1		; FOR
+	.word	LAB_NEXT-1		; NEXT
+	.word	LAB_DATA-1		; DATA
+	.word	LAB_INPUT-1		; INPUT
+	.word	LAB_DIM-1		; DIM
+	.word	LAB_READ-1		; READ
+	.word	LAB_LET-1		; LET
+	.word	LAB_DEC-1		; DEC			new command
+	.word	LAB_GOTO-1		; GOTO
+	.word	LAB_RUN-1		; RUN
+	.word	LAB_IF-1		; IF
+	.word	LAB_RESTORE-1	; RESTORE		modified command
+	.word	LAB_GOSUB-1		; GOSUB
+	.word	LAB_RETIRQ-1	; RETIRQ		new command
+	.word	LAB_RETNMI-1	; RETNMI		new command
+	.word	LAB_RETURN-1	; RETURN
+	.word	LAB_REM-1		; REM
+	.word	LAB_STOP-1		; STOP
+	.word	LAB_ON-1		; ON			modified command
+	.word	LAB_NULL-1		; NULL		modified command
+	.word	LAB_INC-1		; INC			new command
+	.word	LAB_WAIT-1		; WAIT
+	.word	V_LOAD-1		; LOAD
+	.word	V_SAVE-1		; SAVE
+	.word	LAB_DEF-1		; DEF
+	.word	LAB_POKE-1		; POKE
+	.word	LAB_DOKE-1		; DOKE		new command
+	.word	LAB_CALL-1		; CALL		new command
+	.word	LAB_DO-1		; DO			new command
+	.word	LAB_LOOP-1		; LOOP		new command
+	.word	LAB_PRINT-1		; PRINT
+	.word	LAB_CONT-1		; CONT
+	.word	LAB_LIST-1		; LIST
+	.word	LAB_CLEAR-1		; CLEAR
+	.word	LAB_NEW-1		; NEW
+	.word	LAB_WDTH-1		; WIDTH		new command
+	.word	LAB_GET-1		; GET			new command
+	.word	LAB_SWAP-1		; SWAP		new command
+	.word	LAB_BITSET-1	; BITSET		new command
+	.word	LAB_BITCLR-1	; BITCLR		new command
+	.word	LAB_IRQ-1		; IRQ			new command
+	.word	LAB_NMI-1		; NMI			new command
+	.word   SYSjmp-1                ; SYS         *** added for SBC-2
+
+; function pre process routine table
+
+LAB_FTPL
+LAB_FTPM	= LAB_FTPL+$01
+	.word	LAB_PPFN-1		; SGN(n)	process numeric expression in ()
+	.word	LAB_PPFN-1		; INT(n)		"
+	.word	LAB_PPFN-1		; ABS(n)		"
+	.word	LAB_EVEZ-1		; USR(x)	process any expression
+	.word	LAB_1BF7-1		; FRE(x)		"
+	.word	LAB_1BF7-1		; POS(x)		"
+	.word	LAB_PPFN-1		; SQR(n)	process numeric expression in ()
+	.word	LAB_PPFN-1		; RND(n)		"
+	.word	LAB_PPFN-1		; LOG(n)		"
+	.word	LAB_PPFN-1		; EXP(n)		"
+	.word	LAB_PPFN-1		; COS(n)		"
+	.word	LAB_PPFN-1		; SIN(n)		"
+	.word	LAB_PPFN-1		; TAN(n)		"
+	.word	LAB_PPFN-1		; ATN(n)		"
+	.word	LAB_PPFN-1		; PEEK(n)		"
+	.word	LAB_PPFN-1		; DEEK(n)		"
+	.word	$0000			; SADD()	none
+	.word	LAB_PPFS-1		; LEN($)	process string expression in ()
+	.word	LAB_PPFN-1		; STR$(n)	process numeric expression in ()
+	.word	LAB_PPFS-1		; VAL($)	process string expression in ()
+	.word	LAB_PPFS-1		; ASC($)		"
+	.word	LAB_PPFS-1		; UCASE$($)		"
+	.word	LAB_PPFS-1		; LCASE$($)		"
+	.word	LAB_PPFN-1		; CHR$(n)	process numeric expression in ()
+	.word	LAB_BHSS-1		; HEX$(n)		"
+	.word	LAB_BHSS-1		; BIN$(n)		"
+	.word	$0000			; BITTST()	none
+	.word	LAB_MMPP-1		; MAX()	process numeric expression
+	.word	LAB_MMPP-1		; MIN()		"
+	.word	LAB_PPBI-1		; PI		advance pointer
+	.word	LAB_PPBI-1		; TWOPI		"
+	.word	$0000			; VARPTR()	none
+	.word	LAB_LRMS-1		; LEFT$()	process string expression
+	.word	LAB_LRMS-1		; RIGHT$()		"
+	.word	LAB_LRMS-1		; MID$()		"
+
+; action addresses for functions
+
+LAB_FTBL
+LAB_FTBM	= LAB_FTBL+$01
+	.word	LAB_SGN-1		; SGN()
+	.word	LAB_INT-1		; INT()
+	.word	LAB_ABS-1		; ABS()
+	.word	LAB_USR-1		; USR()
+	.word	LAB_FRE-1		; FRE()
+	.word	LAB_POS-1		; POS()
+	.word	LAB_SQR-1		; SQR()
+	.word	LAB_RND-1		; RND()		modified function
+	.word	LAB_LOG-1		; LOG()
+	.word	LAB_EXP-1		; EXP()
+	.word	LAB_COS-1		; COS()
+	.word	LAB_SIN-1		; SIN()
+	.word	LAB_TAN-1		; TAN()
+	.word	LAB_ATN-1		; ATN()
+	.word	LAB_PEEK-1		; PEEK()
+	.word	LAB_DEEK-1		; DEEK()		new function
+	.word	LAB_SADD-1		; SADD()		new function
+	.word	LAB_LENS-1		; LEN()
+	.word	LAB_STRS-1		; STR$()
+	.word	LAB_VAL-1		; VAL()
+	.word	LAB_ASC-1		; ASC()
+	.word	LAB_UCASE-1		; UCASE$()		new function
+	.word	LAB_LCASE-1		; LCASE$()		new function
+	.word	LAB_CHRS-1		; CHR$()
+	.word	LAB_HEXS-1		; HEX$()		new function
+	.word	LAB_BINS-1		; BIN$()		new function
+	.word	LAB_BTST-1		; BITTST()		new function
+	.word	LAB_MAX-1		; MAX()		new function
+	.word	LAB_MIN-1		; MIN()		new function
+	.word	LAB_PI-1		; PI			new function
+	.word	LAB_TWOPI-1		; TWOPI		new function
+	.word	LAB_VARPTR-1	; VARPTR()		new function
+	.word	LAB_LEFT-1		; LEFT$()
+	.word	LAB_RIGHT-1		; RIGHT$()
+	.word	LAB_MIDS-1		; MID$()
+
+; hierarchy and action addresses for operator
+
+LAB_OPPT
+	.byte	$79			; +
+	.word	LAB_ADD-1
+	.byte	$79			; -
+	.word	LAB_SUBTRACT-1
+	.byte	$7B			; *
+	.word	LAB_MULTIPLY-1
+	.byte	$7B			; /
+	.word	LAB_DIVIDE-1
+	.byte	$7F			; ^
+	.word	LAB_POWER-1
+	.byte	$50			; AND
+	.word	LAB_AND-1
+	.byte	$46			; EOR			new operator
+	.word	LAB_EOR-1
+	.byte	$46			; OR
+	.word	LAB_OR-1
+	.byte	$56			; >>			new operator
+	.word	LAB_RSHIFT-1
+	.byte	$56			; <<			new operator
+	.word	LAB_LSHIFT-1
+	.byte	$7D			; >
+	.word	LAB_GTHAN-1
+	.byte	$5A			; =
+	.word	LAB_EQUAL-1
+	.byte	$64			; <
+	.word	LAB_LTHAN-1
+
+; keywords start with ..
+; this is the first character table and must be in alphabetic order
+
+TAB_1STC
+	.byte	"*"
+	.byte	"+"
+	.byte	"-"
+	.byte	"/"
+	.byte	"<"
+	.byte	"="
+	.byte	">"
+	.byte	"?"
+	.byte	"A"
+	.byte	"B"
+	.byte	"C"
+	.byte	"D"
+	.byte	"E"
+	.byte	"F"
+	.byte	"G"
+	.byte	"H"
+	.byte	"I"
+	.byte	"L"
+	.byte	"M"
+	.byte	"N"
+	.byte	"O"
+	.byte	"P"
+	.byte	"R"
+	.byte	"S"
+	.byte	"T"
+	.byte	"U"
+	.byte	"V"
+	.byte	"W"
+	.byte	"^"
+	.byte	$00			; table terminator
+
+; pointers to keyword tables
+
+TAB_CHRT
+	.word	TAB_STAR		; table for "*"
+	.word	TAB_PLUS		; table for "+"
+	.word	TAB_MNUS		; table for "-"
+	.word	TAB_SLAS		; table for "/"
+	.word	TAB_LESS		; table for "<"
+	.word	TAB_EQUL		; table for "="
+	.word	TAB_MORE		; table for ">"
+	.word	TAB_QEST		; table for "?"
+	.word	TAB_ASCA		; table for "A"
+	.word	TAB_ASCB		; table for "B"
+	.word	TAB_ASCC		; table for "C"
+	.word	TAB_ASCD		; table for "D"
+	.word	TAB_ASCE		; table for "E"
+	.word	TAB_ASCF		; table for "F"
+	.word	TAB_ASCG		; table for "G"
+	.word	TAB_ASCH		; table for "H"
+	.word	TAB_ASCI		; table for "I"
+	.word	TAB_ASCL		; table for "L"
+	.word	TAB_ASCM		; table for "M"
+	.word	TAB_ASCN		; table for "N"
+	.word	TAB_ASCO		; table for "O"
+	.word	TAB_ASCP		; table for "P"
+	.word	TAB_ASCR		; table for "R"
+	.word	TAB_ASCS		; table for "S"
+	.word	TAB_ASCT		; table for "T"
+	.word	TAB_ASCU		; table for "U"
+	.word	TAB_ASCV		; table for "V"
+	.word	TAB_ASCW		; table for "W"
+	.word	TAB_POWR		; table for "^"
+
+; tables for each start character, note if a longer keyword with the same start
+; letters as a shorter one exists then it must come first, else the list is in
+; alphabetical order as follows ..
+
+; [keyword,token
+; [keyword,token]]
+; end marker (#$00)
+
+TAB_STAR
+	.byte TK_MUL,$00		; *
+TAB_PLUS
+	.byte TK_PLUS,$00		; +
+TAB_MNUS
+	.byte TK_MINUS,$00	; -
+TAB_SLAS
+	.byte TK_DIV,$00		; /
+TAB_LESS
+LBB_LSHIFT
+	.byte	"<",TK_LSHIFT	; <<	note - "<<" must come before "<"
+	.byte TK_LT			; <
+	.byte	$00
+TAB_EQUL
+	.byte TK_EQUAL,$00	; =
+TAB_MORE
+LBB_RSHIFT
+	.byte	">",TK_RSHIFT	; >>	note - ">>" must come before ">"
+	.byte TK_GT			; >
+	.byte	$00
+TAB_QEST
+	.byte TK_PRINT,$00	; ?
+TAB_ASCA
+LBB_ABS
+	.byte	"BS(",TK_ABS	; ABS(
+LBB_AND
+	.byte	"ND",TK_AND		; AND
+LBB_ASC
+	.byte	"SC(",TK_ASC	; ASC(
+LBB_ATN
+	.byte	"TN(",TK_ATN	; ATN(
+	.byte	$00
+TAB_ASCB
+LBB_BINS
+	.byte	"IN$(",TK_BINS	; BIN$(
+LBB_BITCLR
+	.byte	"ITCLR",TK_BITCLR	; BITCLR
+LBB_BITSET
+	.byte	"ITSET",TK_BITSET	; BITSET
+LBB_BITTST
+	.byte	"ITTST(",TK_BITTST
+					; BITTST(
+	.byte	$00
+TAB_ASCC
+LBB_CALL
+	.byte	"ALL",TK_CALL	; CALL
+LBB_CHRS
+	.byte	"HR$(",TK_CHRS	; CHR$(
+LBB_CLEAR
+	.byte	"LEAR",TK_CLEAR	; CLEAR
+LBB_CONT
+	.byte	"ONT",TK_CONT	; CONT
+LBB_COS
+	.byte	"OS(",TK_COS	; COS(
+	.byte	$00
+TAB_ASCD
+LBB_DATA
+	.byte	"ATA",TK_DATA	; DATA
+LBB_DEC
+	.byte	"EC",TK_DEC		; DEC
+LBB_DEEK
+	.byte	"EEK(",TK_DEEK	; DEEK(
+LBB_DEF
+	.byte	"EF",TK_DEF		; DEF
+LBB_DIM
+	.byte	"IM",TK_DIM		; DIM
+LBB_DOKE
+	.byte	"OKE",TK_DOKE	; DOKE note - "DOKE" must come before "DO"
+LBB_DO
+	.byte	"O",TK_DO		; DO
+	.byte	$00
+TAB_ASCE
+LBB_ELSE
+	.byte	"LSE",TK_ELSE	; ELSE
+LBB_END
+	.byte	"ND",TK_END		; END
+LBB_EOR
+	.byte	"OR",TK_EOR		; EOR
+LBB_EXP
+	.byte	"XP(",TK_EXP	; EXP(
+	.byte	$00
+TAB_ASCF
+LBB_FN
+	.byte	"N",TK_FN		; FN
+LBB_FOR
+	.byte	"OR",TK_FOR		; FOR
+LBB_FRE
+	.byte	"RE(",TK_FRE	; FRE(
+	.byte	$00
+TAB_ASCG
+LBB_GET
+	.byte	"ET",TK_GET		; GET
+LBB_GOSUB
+	.byte	"OSUB",TK_GOSUB	; GOSUB
+LBB_GOTO
+	.byte	"OTO",TK_GOTO	; GOTO
+	.byte	$00
+TAB_ASCH
+LBB_HEXS
+	.byte	"EX$(",TK_HEXS	; HEX$(
+	.byte	$00
+TAB_ASCI
+LBB_IF
+	.byte	"F",TK_IF		; IF
+LBB_INC
+	.byte	"NC",TK_INC		; INC
+LBB_INPUT
+	.byte	"NPUT",TK_INPUT	; INPUT
+LBB_INT
+	.byte	"NT(",TK_INT	; INT(
+LBB_IRQ
+	.byte	"RQ",TK_IRQ		; IRQ
+	.byte	$00
+TAB_ASCL
+LBB_LCASES
+	.byte	"CASE$(",TK_LCASES
+					; LCASE$(
+LBB_LEFTS
+	.byte	"EFT$(",TK_LEFTS	; LEFT$(
+LBB_LEN
+	.byte	"EN(",TK_LEN	; LEN(
+LBB_LET
+	.byte	"ET",TK_LET		; LET
+LBB_LIST
+	.byte	"IST",TK_LIST	; LIST
+LBB_LOAD
+	.byte	"OAD",TK_LOAD	; LOAD
+LBB_LOG
+	.byte	"OG(",TK_LOG	; LOG(
+LBB_LOOP
+	.byte	"OOP",TK_LOOP	; LOOP
+	.byte	$00
+TAB_ASCM
+LBB_MAX
+	.byte	"AX(",TK_MAX	; MAX(
+LBB_MIDS
+	.byte	"ID$(",TK_MIDS	; MID$(
+LBB_MIN
+	.byte	"IN(",TK_MIN	; MIN(
+	.byte	$00
+TAB_ASCN
+LBB_NEW
+	.byte	"EW",TK_NEW		; NEW
+LBB_NEXT
+	.byte	"EXT",TK_NEXT	; NEXT
+LBB_NMI
+	.byte	"MI",TK_NMI		; NMI
+LBB_NOT
+	.byte	"OT",TK_NOT		; NOT
+LBB_NULL
+	.byte	"ULL",TK_NULL	; NULL
+	.byte	$00
+TAB_ASCO
+LBB_OFF
+	.byte	"FF",TK_OFF		; OFF
+LBB_ON
+	.byte	"N",TK_ON		; ON
+LBB_OR
+	.byte	"R",TK_OR		; OR
+	.byte	$00
+TAB_ASCP
+LBB_PEEK
+	.byte	"EEK(",TK_PEEK	; PEEK(
+LBB_PI
+	.byte	"I",TK_PI		; PI
+LBB_POKE
+	.byte	"OKE",TK_POKE	; POKE
+LBB_POS
+	.byte	"OS(",TK_POS	; POS(
+LBB_PRINT
+	.byte	"RINT",TK_PRINT	; PRINT
+	.byte	$00
+TAB_ASCR
+LBB_READ
+	.byte	"EAD",TK_READ	; READ
+LBB_REM
+	.byte	"EM",TK_REM		; REM
+LBB_RESTORE
+	.byte	"ESTORE",TK_RESTORE
+					; RESTORE
+LBB_RETIRQ
+	.byte	"ETIRQ",TK_RETIRQ	; RETIRQ
+LBB_RETNMI
+	.byte	"ETNMI",TK_RETNMI	; RETNMI
+LBB_RETURN
+	.byte	"ETURN",TK_RETURN	; RETURN
+LBB_RIGHTS
+	.byte	"IGHT$(",TK_RIGHTS
+					; RIGHT$(
+LBB_RND
+	.byte	"ND(",TK_RND	; RND(
+LBB_RUN
+	.byte	"UN",TK_RUN		; RUN
+	.byte	$00
+TAB_ASCS
+LBB_SADD
+	.byte	"ADD(",TK_SADD	; SADD(
+LBB_SAVE
+	.byte	"AVE",TK_SAVE	; SAVE
+LBB_SGN
+	.byte	"GN(",TK_SGN	; SGN(
+LBB_SIN
+	.byte	"IN(",TK_SIN	; SIN(
+LBB_SPC
+	.byte	"PC(",TK_SPC	; SPC(
+LBB_SQR
+	.byte	"QR(",TK_SQR	; SQR(
+LBB_STEP
+	.byte	"TEP",TK_STEP	; STEP
+LBB_STOP
+	.byte	"TOP",TK_STOP	; STOP
+LBB_STRS
+	.byte	"TR$(",TK_STRS	; STR$(
+LBB_SWAP
+	.byte	"WAP",TK_SWAP	; SWAP
+LBB_SYS
+	.byte   "YS", TK_SYS    ; SYS    *** added for SBC-2
+	.byte	$00
+TAB_ASCT
+LBB_TAB
+	.byte	"AB(",TK_TAB	; TAB(
+LBB_TAN
+	.byte	"AN(",TK_TAN	; TAN(
+LBB_THEN
+	.byte	"HEN",TK_THEN	; THEN
+LBB_TO
+	.byte	"O",TK_TO		; TO
+LBB_TWOPI
+	.byte	"WOPI",TK_TWOPI	; TWOPI
+	.byte	$00
+TAB_ASCU
+LBB_UCASES
+	.byte	"CASE$(",TK_UCASES
+					; UCASE$(
+LBB_UNTIL
+	.byte	"NTIL",TK_UNTIL	; UNTIL
+LBB_USR
+	.byte	"SR(",TK_USR	; USR(
+	.byte	$00
+TAB_ASCV
+LBB_VAL
+	.byte	"AL(",TK_VAL	; VAL(
+LBB_VPTR
+	.byte	"ARPTR(",TK_VPTR	; VARPTR(
+	.byte	$00
+TAB_ASCW
+LBB_WAIT
+	.byte	"AIT",TK_WAIT	; WAIT
+LBB_WHILE
+	.byte	"HILE",TK_WHILE	; WHILE
+LBB_WIDTH
+	.byte	"IDTH",TK_WIDTH	; WIDTH
+	.byte	$00
+TAB_POWR
+	.byte	TK_POWER,$00	; ^
+
+; new decode table for LIST
+; Table is ..
+; byte - keyword length, keyword first character
+; word - pointer to rest of keyword from dictionary
+
+; note if length is 1 then the pointer is ignored
+
+LAB_KEYT
+	.byte	3,"E"
+	.word	LBB_END		; END
+	.byte	3,"F"
+	.word	LBB_FOR		; FOR
+	.byte	4,"N"
+	.word	LBB_NEXT		; NEXT
+	.byte	4,"D"
+	.word	LBB_DATA		; DATA
+	.byte	5,"I"
+	.word	LBB_INPUT		; INPUT
+	.byte	3,"D"
+	.word	LBB_DIM		; DIM
+	.byte	4,"R"
+	.word	LBB_READ		; READ
+	.byte	3,"L"
+	.word	LBB_LET		; LET
+	.byte	3,"D"
+	.word	LBB_DEC		; DEC
+	.byte	4,"G"
+	.word	LBB_GOTO		; GOTO
+	.byte	3,"R"
+	.word	LBB_RUN		; RUN
+	.byte	2,"I"
+	.word	LBB_IF		; IF
+	.byte	7,"R"
+	.word	LBB_RESTORE		; RESTORE
+	.byte	5,"G"
+	.word	LBB_GOSUB		; GOSUB
+	.byte	6,"R"
+	.word	LBB_RETIRQ		; RETIRQ
+	.byte	6,"R"
+	.word	LBB_RETNMI		; RETNMI
+	.byte	6,"R"
+	.word	LBB_RETURN		; RETURN
+	.byte	3,"R"
+	.word	LBB_REM		; REM
+	.byte	4,"S"
+	.word	LBB_STOP		; STOP
+	.byte	2,"O"
+	.word	LBB_ON		; ON
+	.byte	4,"N"
+	.word	LBB_NULL		; NULL
+	.byte	3,"I"
+	.word	LBB_INC		; INC
+	.byte	4,"W"
+	.word	LBB_WAIT		; WAIT
+	.byte	4,"L"
+	.word	LBB_LOAD		; LOAD
+	.byte	4,"S"
+	.word	LBB_SAVE		; SAVE
+	.byte	3,"D"
+	.word	LBB_DEF		; DEF
+	.byte	4,"P"
+	.word	LBB_POKE		; POKE
+	.byte	4,"D"
+	.word	LBB_DOKE		; DOKE
+	.byte	4,"C"
+	.word	LBB_CALL		; CALL
+	.byte	2,"D"
+	.word	LBB_DO		; DO
+	.byte	4,"L"
+	.word	LBB_LOOP		; LOOP
+	.byte	5,"P"
+	.word	LBB_PRINT		; PRINT
+	.byte	4,"C"
+	.word	LBB_CONT		; CONT
+	.byte	4,"L"
+	.word	LBB_LIST		; LIST
+	.byte	5,"C"
+	.word	LBB_CLEAR		; CLEAR
+	.byte	3,"N"
+	.word	LBB_NEW		; NEW
+	.byte	5,"W"
+	.word	LBB_WIDTH		; WIDTH
+	.byte	3,"G"
+	.word	LBB_GET		; GET
+	.byte	4,"S"
+	.word	LBB_SWAP		; SWAP
+	.byte	6,"B"
+	.word	LBB_BITSET		; BITSET
+	.byte	6,"B"
+	.word	LBB_BITCLR		; BITCLR
+	.byte	3,"I"
+	.word	LBB_IRQ		; IRQ
+	.byte	3,"N"
+	.word	LBB_NMI		; NMI
+	.byte	3,"S"			;
+	.word	LBB_SYS			; SYS   *** Added for SBC-2
+
+
+; secondary commands (can't start a statement)
+
+	.byte	4,"T"
+	.word	LBB_TAB		; TAB
+	.byte	4,"E"
+	.word	LBB_ELSE		; ELSE
+	.byte	2,"T"
+	.word	LBB_TO		; TO
+	.byte	2,"F"
+	.word	LBB_FN		; FN
+	.byte	4,"S"
+	.word	LBB_SPC		; SPC
+	.byte	4,"T"
+	.word	LBB_THEN		; THEN
+	.byte	3,"N"
+	.word	LBB_NOT		; NOT
+	.byte	4,"S"
+	.word	LBB_STEP		; STEP
+	.byte	5,"U"
+	.word	LBB_UNTIL		; UNTIL
+	.byte	5,"W"
+	.word	LBB_WHILE		; WHILE
+	.byte	3,"O"
+	.word	LBB_OFF		; OFF
+
+; opperators
+
+	.byte	1,"+"
+	.word	$0000			; +
+	.byte	1,"-"
+	.word	$0000			; -
+	.byte	1,"*"
+	.word	$0000			; *
+	.byte	1,"/"
+	.word	$0000			; /
+	.byte	1,"^"
+	.word	$0000			; ^
+	.byte	3,"A"
+	.word	LBB_AND		; AND
+	.byte	3,"E"
+	.word	LBB_EOR		; EOR
+	.byte	2,"O"
+	.word	LBB_OR		; OR
+	.byte	2,">"
+	.word	LBB_RSHIFT		; >>
+	.byte	2,"<"
+	.word	LBB_LSHIFT		; <<
+	.byte	1,">"
+	.word	$0000			; >
+	.byte	1,"="
+	.word	$0000			; =
+	.byte	1,"<"
+	.word	$0000			; <
+
+; functions
+
+	.byte	4,"S"			;
+	.word	LBB_SGN		; SGN
+	.byte	4,"I"			;
+	.word	LBB_INT		; INT
+	.byte	4,"A"			;
+	.word	LBB_ABS		; ABS
+	.byte	4,"U"			;
+	.word	LBB_USR		; USR
+	.byte	4,"F"			;
+	.word	LBB_FRE		; FRE
+	.byte	4,"P"			;
+	.word	LBB_POS		; POS
+	.byte	4,"S"			;
+	.word	LBB_SQR		; SQR
+	.byte	4,"R"			;
+	.word	LBB_RND		; RND
+	.byte	4,"L"			;
+	.word	LBB_LOG		; LOG
+	.byte	4,"E"			;
+	.word	LBB_EXP		; EXP
+	.byte	4,"C"			;
+	.word	LBB_COS		; COS
+	.byte	4,"S"			;
+	.word	LBB_SIN		; SIN
+	.byte	4,"T"			;
+	.word	LBB_TAN		; TAN
+	.byte	4,"A"			;
+	.word	LBB_ATN		; ATN
+	.byte	5,"P"			;
+	.word	LBB_PEEK		; PEEK
+	.byte	5,"D"			;
+	.word	LBB_DEEK		; DEEK
+	.byte	5,"S"			;
+	.word	LBB_SADD		; SADD
+	.byte	4,"L"			;
+	.word	LBB_LEN		; LEN
+	.byte	5,"S"			;
+	.word	LBB_STRS		; STR$
+	.byte	4,"V"			;
+	.word	LBB_VAL		; VAL
+	.byte	4,"A"			;
+	.word	LBB_ASC		; ASC
+	.byte	7,"U"			;
+	.word	LBB_UCASES		; UCASE$
+	.byte	7,"L"			;
+	.word	LBB_LCASES		; LCASE$
+	.byte	5,"C"			;
+	.word	LBB_CHRS		; CHR$
+	.byte	5,"H"			;
+	.word	LBB_HEXS		; HEX$
+	.byte	5,"B"			;
+	.word	LBB_BINS		; BIN$
+	.byte	7,"B"			;
+	.word	LBB_BITTST		; BITTST
+	.byte	4,"M"			;
+	.word	LBB_MAX		; MAX
+	.byte	4,"M"			;
+	.word	LBB_MIN		; MIN
+	.byte	2,"P"			;
+	.word	LBB_PI		; PI
+	.byte	5,"T"			;
+	.word	LBB_TWOPI		; TWOPI
+	.byte	7,"V"			;
+	.word	LBB_VPTR		; VARPTR
+	.byte	6,"L"			;
+	.word	LBB_LEFTS		; LEFT$
+	.byte	7,"R"			;
+	.word	LBB_RIGHTS		; RIGHT$
+	.byte	5,"M"			;
+	.word	LBB_MIDS		; MID$
+
+; BASIC messages, mostly error messages
+
+LAB_BAER
+	.word	ERR_NF		;$00 NEXT without FOR
+	.word	ERR_SN		;$02 syntax
+	.word	ERR_RG		;$04 RETURN without GOSUB
+	.word	ERR_OD		;$06 out of data
+	.word	ERR_FC		;$08 function call
+	.word	ERR_OV		;$0A overflow
+	.word	ERR_OM		;$0C out of memory
+	.word	ERR_US		;$0E undefined statement
+	.word	ERR_BS		;$10 array bounds
+	.word	ERR_DD		;$12 double dimension array
+	.word	ERR_D0		;$14 divide by 0
+	.word	ERR_ID		;$16 illegal direct
+	.word	ERR_TM		;$18 type mismatch
+	.word	ERR_LS		;$1A long string
+	.word	ERR_ST		;$1C string too complex
+	.word	ERR_CN		;$1E continue error
+	.word	ERR_UF		;$20 undefined function
+	.word ERR_LD		;$22 LOOP without DO
+
+; I may implement these two errors to force definition of variables and
+; dimensioning of arrays before use.
+
+;	.word ERR_UV		;$24 undefined variable
+
+; the above error has been tested and works (see code and comments below LAB_1D8B)
+
+;	.word ERR_UA		;$26 undimensioned array
+
+ERR_NF	.byte	"NEXT without FOR",$00
+ERR_SN	.byte	"Syntax",$00
+ERR_RG	.byte	"RETURN without GOSUB",$00
+ERR_OD	.byte	"Out of DATA",$00
+ERR_FC	.byte	"Function call",$00
+ERR_OV	.byte	"Overflow",$00
+ERR_OM	.byte	"Out of memory",$00
+ERR_US	.byte	"Undefined statement",$00
+ERR_BS	.byte	"Array bounds",$00
+ERR_DD	.byte	"Double dimension",$00
+ERR_D0	.byte	"Divide by zero",$00
+ERR_ID	.byte	"Illegal direct",$00
+ERR_TM	.byte	"Type mismatch",$00
+ERR_LS	.byte	"String too long",$00
+ERR_ST	.byte	"String too complex",$00
+ERR_CN	.byte	"Can't continue",$00
+ERR_UF	.byte	"Undefined function",$00
+ERR_LD	.byte	"LOOP without DO",$00
+
+;ERR_UV	.byte	"Undefined variable",$00
+
+; the above error has been tested and works (see code and comments below LAB_1D8B)
+
+;ERR_UA	.byte	"Undimensioned array",$00
+
+LAB_BMSG	.byte	$0D,$0A,"Break",$00
+LAB_EMSG	.byte	" Error",$00
+LAB_LMSG	.byte	" in line ",$00
+LAB_RMSG	.byte	$0D,$0A,"Ready",$0D,$0A,$00
+
+LAB_IMSG	.byte	" Extra ignored",$0D,$0A,$00
+LAB_REDO	.byte	" Redo from start",$0D,$0A,$00
+
+AA_end_basic
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/basldsv.asm b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/basldsv.asm
new file mode 100644
index 00000000..b24c9d64
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/basldsv.asm
@@ -0,0 +1,81 @@
+;******** LOAD & SAVE PATCH FOR ENHANCED BASIC ON 65C02 Simulator
+
+bsetup
+	        lda   #<ACIA1_Scan
+                sta   VEC_IN
+  		lda   #>ACIA1_Scan
+                sta   VEC_IN+1
+	        lda   #<ACIA1_Output
+                sta   VEC_OUT
+		lda   #>ACIA1_OUTPUT
+                sta   VEC_OUT+1
+	        lda   #<Psave
+                sta   VEC_SV
+	        Lda   #>Psave
+                sta   VEC_SV+1
+		lda   #<pload
+                sta   VEC_LD
+		lda   #>pload
+		sta   VEC_LD+1
+		jmp   LAB_COLD
+
+psave		
+		jsr	pscan
+		ldy	#$00
+		lda	itempl
+		sta	(itempl),y
+		iny
+		lda	itemph
+		sta	(itempl),y
+		ldx	smeml
+		lda	smemh
+		jsr	print2byte
+		jsr	print_cr
+		sec
+		lda	itempl
+		sbc	smeml
+		tax
+		lda	itemph
+		sbc	smemh
+		jsr	print2byte
+		jsr	print_cr
+		rts
+
+pload		
+		jsr	pscan
+		lda	itempl
+		sta	svarl
+		sta	sarryl
+		sta	earryl
+		lda	itemph
+		sta	svarh
+		sta	sarryh
+		sta	earryh
+		JMP   LAB_1319		
+pscan
+		lda	smeml
+      	sta	itempl
+      	lda	smemh
+      	sta	itemph
+pscan1	ldy   #$00
+		lda   (itempl),y
+		bne   pscan2
+		iny   
+		lda   (itempl),y
+		bne   pscan2
+		clc
+		lda   #$02
+		adc   itempl
+		sta	itempl
+		lda	#$00
+		adc	itemph
+		sta	itemph
+		rts
+pscan2	ldy   #$00
+		lda	(itempl),y
+		tax
+		iny
+		lda	(itempl),y
+		sta	itemph
+		stx	itempl
+		bra	pscan1
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/build.bat b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/build.bat
new file mode 100644
index 00000000..b767e714
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/build.bat
@@ -0,0 +1,16 @@
+echo off
+REM This batch file will build a 48k binary image file using the TASS assembler.
+REM
+REM The input file is called "sbc.asm" It calls all of the other
+REM source files in the proper order.
+REM
+REM A list of labels is saved in file "sbc.lbl" 
+REM A compiler listing is saved in file "sbc.lst"
+REM The binary object file is named "sbc25.rom"
+type build.bat
+echo on
+
+tass /c /lsbc.lbl sbc.asm sbc25.rom sbc25.lst
+
+pause
+REM Done.
\ No newline at end of file
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/chess.asm b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/chess.asm
new file mode 100644
index 00000000..1a0bc0d2
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/chess.asm
@@ -0,0 +1,885 @@
+;
+;  MicroChess (c) 1996-2002 Peter Jennings, peterj@benlo.com 
+;
+; I have been given permission to distribute this program by the
+; author and copyright holder, Peter Jennings.  Please get his 
+; permission if you wish to re-distribute a modified copy of 
+; this file to others.  He specifically requested that his 
+; copyright notice be included in the source and binary images.
+; Thanks! 
+;
+; modified by Daryl Rictor to work _OVER a serial terminal connection, August 2002.
+;
+;
+; page zero variables
+;
+MNU	=	$00
+BOARD   =	$50 
+BK      =	$60 
+PIECE   =	$B0 
+SQUARE  =	$B1 
+SP2     =	$B2 
+SP1     =	$B3 
+INCHEK  =	$B4 
+_STATE   =	$B5 
+MOVEN   =	$B6 
+REV	=       $B7
+OMOVE   =	$DC 
+WCAP0   =	$DD 
+_COUNT   =	$DE 
+BCAP2   =	$DE 
+WCAP2   =	$DF 
+BCAP1   =	$E0 
+WCAP1   =	$E1 
+BCAP0   =	$E2 
+MOB     =	$E3 
+MAXC    =	$E4 
+CC      =	$E5 
+PCAP    =	$E6 
+BMOB    =	$E3 
+BMAXC   =	$E4 
+BMCC    =	$E5 		; was BCC (TASS doesn't like it as a label)
+BMAXP   =	$E6 
+XMAXC   =	$E8 
+WMOB    =	$EB 
+WMAXC   =	$EC 
+WCC     =	$ED 
+WMAXP   =	$EE 
+PMOB    =	$EF 
+PMAXC   =	$F0 
+PCC     =	$F1 
+PCP     =	$F2 
+OLDKY   =	$F3 
+BESTP   =	$FB 
+BESTV   =	$FA 
+BESTM   =	$F9 
+DIS1    =	$FB 
+DIS2    =	$FA 
+DIS3    =	$F9 
+temp    =       $FC
+hist	=	$fd			; history pointer
+;
+;
+;
+		
+
+
+_CSTART		LDA     #$00		; REVERSE TOGGLE
+		STA     REV
+		sta	hist
+CHESS		CLD			; INITIALIZE
+		LDX	#$FF		; TWO STACKS
+		TXS	
+		LDX	#$C8
+		STX	SP2
+;		
+;       ROUTINES TO LIGHT LED
+;       DISPLAY AND GET KEY
+;       FROM KEYBOARD
+;		
+_OUT		JSR	pout		; DISPLAY AND
+		JSR	KIN		; GET _INPUT   *** my routine waits for a keypress
+;		CMP	OLDKY		; KEY IN ACC  *** no need to debounce
+;		BEQ	_OUT		; (DEBOUNCE)
+;		STA	OLDKY
+;		
+		CMP	#$43		; [C]
+		BNE	NOSET		; SET UP
+		LDX	#$1F		; BOARD
+WHSET		LDA	SETW,X		; FROM
+		STA	BOARD,X		; SETW
+		DEX	
+		BPL	WHSET
+		LDX	#$1B		; *ADDED
+		STX	OMOVE		; INITS TO $FF
+		LDA	#$CC		; Display CCC
+		BNE	CLDSP
+;		
+NOSET		CMP	#$45		; [E]
+		BNE	NOREV		; REVERSE
+		JSR	REVERSE        	; BOARD IS
+		SEC
+		LDA	#$01
+		SBC	REV
+		STA	REV		; TOGGLE REV FLAG
+		LDA	#$EE            ; IS
+		BNE	CLDSP
+;		
+NOREV		CMP	#$40		; [P]
+		BNE	NOGO           	; PLAY CHESS
+		JSR	GO
+CLDSP		STA	DIS1          	; DISPLAY
+		STA	DIS2         	; ACROSS
+		STA	DIS3          	; DISPLAY
+		BNE	CHESS
+;		
+NOGO		CMP	#$0D            ; [Enter]
+		BNE	NOMV          	; MOVE MAN
+		JSR	MOVE          	; AS ENTERED
+		jsr     addhist		; add move to history
+		JMP	DISP
+NOMV		CMP     #$41		; [Q] ***Added to allow game exit***
+		BEQ     _DONE		; quit the game, exit back to system.  
+                cmp     #$42		; [B] Undo move
+		bne     Noud		;
+		jsr     Undo		; undo last move
+		LDA	#$BB            ; undo
+		BNE	CLDSP
+Noud		JMP	_INPUT		; process move
+_DONE		JMP  	(RESvector)	; exit back to SBC's Monitor
+;		
+;       THE ROUTINE JANUS DIRECTS THE
+;       ANALYSIS BY DETERMINING WHAT
+;       SHOULD OCCUR AFTER EACH MOVE
+;       GENERATED BY GNM
+;		
+;		
+;
+JANUS		LDX	_STATE
+		BMI	NO_COUNT
+;		
+;       THIS ROUTINE _COUNTS OCCURRENCES
+;       IT DEPENDS UPON _STATE TO INDEX
+;       THE CORRECT _COUNTERS
+;		
+_COUNTS		LDA	PIECE
+		BEQ	_OVER           	; IF _STATE=8
+		CPX 	#$08           	; DO NOT _COUNT
+		BNE	_OVER          	; BLK MAX CAP
+		CMP	BMAXP        	; MOVES FOR
+		BEQ	XRT           	; WHITE
+; 		
+_OVER		INC	MOB,X          	; MOBILITY
+		CMP 	#$01           	;  + QUEEN
+		BNE	NOQ           	; FOR TWO
+		INC	MOB,X
+;		
+NOQ		BVC	NOCAP
+		LDY	#$0F           	; CALCULATE
+		LDA	SQUARE       	; POINTS
+ELOOP		CMP	BK,Y           	; CAPTURED
+		BEQ	FOUN          	; BY THIS
+		DEY			; MOVE
+		BPL	ELOOP
+FOUN		LDA	POINTS,Y
+		CMP	MAXC,X
+		BCC	_LESS          	; SAVE IF
+		STY	PCAP,X         	; BEST THIS
+		STA	MAXC,X         	; _STATE
+;		
+_LESS		CLC	
+		PHP			; ADD TO
+		ADC	CC,X           	; CAPTURE
+		STA	CC,X           	; _COUNTS
+		PLP	
+;		
+NOCAP		CPX	#$04
+		BEQ	ON4
+		BMI	TREE          	;(=00 ONLY)
+XRT		RTS	
+;		
+;      GENERATE FURTHER MOVES FOR _COUNT
+;      AND ANALYSIS	
+;		
+ON4		LDA	XMAXC        	; SAVE ACTUAL 
+		STA	WCAP0         	; CAPTURE
+		LDA	#$00           	; _STATE=0
+		STA	_STATE
+		JSR	MOVE          	; GENERATE
+		JSR	REVERSE       	; IMMEDIATE
+		JSR	GNMZ         	; REPLY MOVES  
+		JSR	REVERSE
+;		
+		LDA	#$08       	; _STATE=8
+		STA	_STATE        	; GENERATE
+;		JSR	OHM          	; CONTINUATION
+		JSR	UMOVE         	; MOVES
+;		
+		JMP	STRATGY       	; FINAL EVALUATION
+NO_COUNT	CPX	#$F9
+		BNE	TREE
+;		
+;      DETERMINE IF THE KING CAN BE
+;      TAKEN, USED BY CHKCHK
+;		
+		LDA	BK           	; IS KING
+		CMP	SQUARE       	; IN CHECK?
+		BNE	RETJ          	; SET INCHEK=0
+		LDA	#$00           	; IF IT IS
+		STA	INCHEK
+RETJ		RTS	
+;		
+;      IF A PIECE HAS BEEN CAPTURED BY
+;      A TRIAL MOVE, GENERATE REPLIES &
+;      EVALUATE THE EXCHANGE GAIN/LOSS
+;		
+TREE		BVC	RETJ          	; NO CAP
+		LDY	#$07           	; (PIECES)
+		LDA	SQUARE
+LOOPX		CMP	BK,Y
+		BEQ	FOUNX
+		DEY	
+		BEQ	RETJ          	; (KING)
+		BPL	LOOPX         	; SAVE
+FOUNX		LDA	POINTS,Y       	; BEST CAP
+		CMP	BCAP0,X        	; AT THIS
+		BCC	NOMAX         	; LEVEL
+		STA	BCAP0,X
+NOMAX		DEC	_STATE
+		LDA	#$FB           	; IF _STATE=FB
+		CMP	_STATE        	; TIME TO TURN
+		BEQ	UPTREE        	; AROUND
+		JSR	GENRM         	; GENERATE FURTHER
+UPTREE		INC	_STATE        	; CAPTURES
+		RTS	
+;		
+;      THE PLAYER'S MOVE IS _INPUT
+;		
+_INPUT		CMP	#$08           	; NOT A LEGAL
+		BCS	_ERROR      	; SQUARE #
+		JSR	DISMV
+DISP		LDX	#$1F
+SEARCH		LDA	BOARD,X
+		CMP	DIS2
+		BEQ	_HERE          	; DISPLAY
+		DEX			; PIECE AT    
+		BPL	SEARCH        	; FROM
+_HERE		STX	DIS1         	; SQUARE
+		STX	PIECE
+_ERROR		JMP	CHESS
+;		
+;      GENERATE ALL MOVES FOR ONE
+;      SIDE, CALL JANUS AFTER EACH
+;      ONE FOR NEXT STE?
+;		
+;
+GNMZ		LDX	#$10            ; CLEAR
+GNMX		LDA	#$00            ; _COUNTERS
+CLEAR		STA	_COUNT,X
+		DEX	
+		BPL	CLEAR
+;		
+GNM		LDA	#$10            ; SET UP
+		STA	PIECE        	; PIECE
+NEWP		DEC	PIECE        	; NEW PIECE
+		BPL	NEX           	; ALL _DONE?
+		RTS			; #NAME?
+;		
+NEX		JSR	_RESET        	; READY
+		LDY	PIECE        	; GET PIECE
+		LDX	#$08
+		STX	MOVEN        	; COMMON START
+		CPY	#$08            ; WHAT IS IT?
+		BPL	PAWN          	; PAWN
+		CPY	#$06
+		BPL	KNIGHT        	; KNIGHT
+		CPY	#$04
+		BPL	BISHOP       	; BISHOP
+		CPY	#$01
+		BEQ	QUEEN         	; QUEEN
+		BPL	ROOK          	; ROOK
+;		
+KING		JSR	SNGMV         	; MUST BE KING!
+		BNE	KING          	; MOVES
+		BEQ	NEWP          	; 8 TO 1
+QUEEN		JSR	LINE
+		BNE	QUEEN         	; MOVES
+		BEQ	NEWP          	; 8 TO 1
+;		
+ROOK		LDX	#$04
+		STX	MOVEN        	; MOVES
+AGNR		JSR	LINE          	; 4 TO 1
+		BNE	AGNR
+		BEQ	NEWP
+;		
+BISHOP		JSR	LINE
+		LDA	MOVEN        	; MOVES
+		CMP	#$04           	; 8 TO 5
+		BNE	BISHOP
+		BEQ	NEWP
+;		
+KNIGHT		LDX	#$10
+		STX	MOVEN        	; MOVES
+AGNN		JSR	SNGMV         	; 16 TO 9
+		LDA	MOVEN
+		CMP	#$08
+		BNE	AGNN
+		BEQ	NEWP
+;		
+PAWN		LDX	#$06
+		STX	MOVEN
+P1		JSR	_CMOVE         	; RIGHT CAP?
+		BVC	P2
+		BMI	P2
+		JSR	JANUS         	; YES
+P2		JSR	_RESET
+		DEC	MOVEN        	; LEFT CAP?
+		LDA	MOVEN
+		CMP	#$05
+		BEQ	P1
+P3		JSR	_CMOVE         	; AHEAD
+		BVS	NEWP          	; ILLEGAL
+		BMI	NEWP
+		JSR	JANUS
+		LDA	SQUARE       	; GETS TO
+		AND	#$F0           	; 3RD RANK?
+		CMP	#$20
+		BEQ	P3            	; DO DOUBLE
+		JMP	NEWP
+;		
+;      CALCULATE SINGLE STEP MOVES
+;      FOR K,N	
+;		
+SNGMV		JSR	_CMOVE        	; CALC MOVE
+		BMI	ILL1           	; -IF LEGAL
+		JSR	JANUS           ; -EVALUATE
+ILL1		JSR	_RESET
+		DEC	MOVEN
+		RTS	
+;		
+;     CALCULATE ALL MOVES DOWN A
+;     STRAIGHT LINE FOR Q,B,R
+;		
+LINE		JSR	_CMOVE         	; CALC MOVE
+		BCC	OVL            	; NO CHK
+		BVC	LINE		; NOCAP       
+OVL		BMI	ILL             ; RETURN
+		PHP	
+		JSR	JANUS         	; EVALUATE POSN
+		PLP	
+		BVC	LINE          	; NOT A CAP
+ILL		JSR	_RESET         	; LINE STOPPED
+		DEC	MOVEN         	; NEXT DIR
+		RTS	
+;		
+;      EXCHANGE SIDES FOR REPLY
+;      ANALYSIS	
+;		
+REVERSE		LDX	#$0F
+ETC		SEC	
+		LDY	BK,X           	; SUBTRACT
+		LDA 	#$77           	; POSITION
+		SBC  	BOARD,X        	; FROM 77
+		STA  	BK,X
+		STY  	BOARD,X         ; AND
+		SEC	
+		LDA	#$77           	; EXCHANGE
+		SBC 	BOARD,X        	; PIECES
+		STA  	BOARD,X
+		DEX	
+		BPL   	ETC
+		RTS	
+;		
+;        _CMOVE CALCULATES THE TO SQUARE
+;        USING SQUARE AND THE MOVE
+;       TABLE  FLAGS SET AS FOLLOWS:
+;       N#NAME?	MOVE
+;       V#NAME?	(LEGAL UN_LESS IN CR)
+;       C#NAME?	BECAUSE OF CHECK
+;       [MY &THANKS TO JIM BUTTERFIELD
+;        WHO WROTE THIS MORE EFFICIENT
+;        VERSION OF _CMOVE)
+;		
+_CMOVE		LDA	SQUARE       	; GET SQUARE
+		LDX	MOVEN       	; MOVE POINTER
+		CLC	
+		ADC	MOVEX,X        	; MOVE LIST
+		STA	SQUARE       	; NEW POS'N
+		AND	#$88
+		BNE	ILLEGAL       	; OFF BOARD
+		LDA	SQUARE
+;			
+		LDX	#$20
+LOOP		DEX			; IS TO
+		BMI	NO            	; SQUARE
+		CMP  	BOARD,X        	; OCCUPIED?
+		BNE   	LOOP
+;			
+		CPX	#$10            ; BY SELF?
+		BMI   	ILLEGAL
+;			
+		LDA	#$7F		; MUST BE CAP!
+		ADC	#$01            ; SET V FLAG
+		BVS   	SPX 	        ; (JMP)
+;			
+NO		CLV			; NO CAPTURE
+;			
+SPX		LDA  	_STATE         	; SHOULD WE
+		BMI   	RETL           	; DO THE
+		CMP	#$08 	        ; CHECK CHECK?
+		BPL  	RETL
+;			
+;        CHKCHK REVERSES SIDES
+;       AND LOOKS FOR A KING
+;       CAPTURE TO INDICATE
+;       ILLEGAL MOVE BECAUSE OF
+;       CHECK  SINCE THIS IS
+;       TIME CONSUMING, IT IS NOT
+;       ALWAYS _DONE	
+;		
+CHKCHK	PHA				; _STATE  #392
+		PHP	
+		LDA	#$F9
+		STA	_STATE         	; GENERATE
+		STA	INCHEK        	; ALL REPLY
+		JSR	MOVE          	; MOVES TO
+		JSR	REVERSE       	; SEE IF KING
+		JSR	GNM           	; IS IN
+		JSR	RUM           	; CHECK
+		PLP	
+		PLA	
+		STA	_STATE
+		LDA	INCHEK
+		BMI	RETL           	; NO - SAFE
+		SEC			; YES - IN CHK
+		LDA	#$FF
+		RTS	
+;		
+RETL		CLC			; LEGAL
+		LDA	#$00            ; RETURN
+		RTS	
+;		
+ILLEGAL	LDA	#$FF
+		CLC			; ILLEGAL
+		CLV			; RETURN
+		RTS	
+;		
+;       REPLACE PIECE ON CORRECT SQUARE
+;		
+_RESET		LDX	PIECE      	; GET LOGAT
+		LDA	BOARD,X        	; FOR PIECE
+		STA	SQUARE       	; FROM BOARD
+		RTS	
+;		
+;		
+;		
+GENRM		JSR	MOVE          	; MAKE MOVE
+GENR2		JSR	REVERSE      	; REVERSE BOARD
+		JSR	GNM          	; GENERATE MOVES
+RUM		JSR	REVERSE   	; REVERSE BACK
+;		
+;       ROUTINE TO UNMAKE A MOVE MADE BY
+;	  MOVE
+;		
+UMOVE		TSX			; UNMAKE MOVE
+		STX	SP1
+		LDX	SP2           	; EXCHANGE
+		TXS			; STACKS
+		PLA			; MOVEN
+		STA	MOVEN
+		PLA			; CAPTURED
+		STA	PIECE        	; PIECE
+		TAX	
+		PLA			; FROM SQUARE
+		STA	BOARD,X
+		PLA			; PIECE
+		TAX	
+		PLA			; TO SOUARE
+		STA	SQUARE
+		STA	BOARD,X
+		JMP	STRV
+;		
+;       THIS ROUTINE MOVES PIECE
+;       TO SQUARE, PARAMETERS
+;       ARE SAVED IN A STACK TO UNMAKE
+;       THE MOVE LATER
+;		
+MOVE		TSX	
+		STX	SP1          	; SWITCH
+		LDX	SP2          	; STACKS
+		TXS	
+		LDA	SQUARE
+		PHA			; TO SQUARE
+		TAY	
+		LDX	#$1F
+CHECK		CMP	BOARD,X        	; CHECK FOR
+		BEQ	TAKE          	; CAPTURE
+		DEX	
+		BPL	CHECK
+TAKE		LDA	#$CC
+		STA	BOARD,X
+		TXA			; CAPTURED
+		PHA			; PIECE
+		LDX	PIECE
+		LDA	BOARD,X
+		STY	BOARD,X        	; FROM
+		PHA			; SQUARE
+		TXA	
+		PHA			; PIECE
+		LDA	MOVEN
+		PHA			; MOVEN
+STRV		TSX	
+		STX	SP2           	; SWITCH
+		LDX	SP1           	; STACKS
+		TXS			; BACK
+		RTS	
+;			
+;       CONTINUATION OF SUB STRATGY
+;       -CHECKS FOR CHECK OR CHECKMATE
+;       AND ASSIGNS VALUE TO MOVE
+;		
+CKMATE	LDY	BMAXC         		; CAN BLK CAP
+		CPX	POINTS       	; MY KING?
+		BNE	NOCHEK	
+		LDA	#$00           	; GULP!
+		BEQ	RETV          	; DUMB MOVE!
+;		
+NOCHEK	LDX	BMOB         		; IS BLACK
+		BNE	RETV          	; UNABLE TO
+		LDX	WMAXP        	; MOVE AND
+		BNE	RETV          	; KING IN CH?
+		LDA	#$FF           	; YES! MATE
+;		
+RETV		LDX	#$04            ; RESTORE
+		STX	_STATE        	; _STATE=4
+;		
+;       THE VALUE OF THE MOVE (IN ACCU)
+;       IS COMPARED TO THE BEST MOVE AND
+;       REPLACES IT IF IT IS BETTER
+;		
+_PUSH		CMP	BESTV         	; IS THIS BEST
+		BCC	RETP          	; MOVE SO FAR?
+		BEQ	RETP
+		STA	BESTV        	; YES!
+		LDA	PIECE        	; SAVE IT
+		STA	BESTP
+		LDA	SQUARE
+		STA	BESTM        	; FLASH DISPLAY
+RETP		LDA	#"."		; print ... instead of flashing disp
+		Jmp	cout		; print . and return
+;		
+;       MAIN PROGRAM TO PLAY CHESS
+;       PLAY FROM OPENING OR THINK
+;		
+GO		LDX	OMOVE        	; OPENING?
+		BMI	NOOPEN          ; -NO   *ADD CHANGE FROM BPL
+		LDA	DIS3         	; -YES WAS
+		CMP	OPNING,X        ; OPPONENT'S
+		BNE	END            	; MOVE OK?
+		DEX	
+		LDA	OPNING,X       	; GET NEXT
+		STA	DIS1         	; CANNED
+		DEX			; OPENING MOVE
+		LDA	OPNING,X
+		STA	DIS3         	; DISPLAY IT
+		DEX	
+		STX	OMOVE        	; MOVE IT
+		BNE	MV2            	; (JMP)
+;			
+END		LDA     #$FF		; *ADD - STOP CANNED MOVES
+		STA	OMOVE        	; FLAG OPENING
+NOOPEN	LDX	#$0C            	; FINISHED
+		STX	_STATE        	; _STATE=C
+		STX	BESTV        	; CLEAR BESTV
+		LDX	#$14           	; GENERATE P
+		JSR	GNMX          	; MOVES
+;		
+		LDX	#$04           	; _STATE=4
+		STX	_STATE        	; GENERATE AND
+		JSR	GNMZ          	; TEST AVAILABLE
+;
+;	MOVES
+;		
+		LDX	BESTV        	; GET BEST MOVE
+		CPX	#$0F           	; IF NONE
+		BCC	MATE          	; OH OH!
+;		
+MV2		LDX	BESTP        	; MOVE
+		LDA	BOARD,X         ; THE
+		STA	BESTV        	; BEST
+		STX	PIECE        	; MOVE
+		LDA	BESTM
+		STA	SQUARE       	; AND DISPLAY
+		JSR	MOVE           	; IT
+		jsr     addhist		; add move to history
+		JMP	CHESS
+;		
+MATE		LDA	#$FF           	; RESIGN
+		RTS			; OR STALEMATE
+;		
+;       SUBROUTINE TO ENTER THE
+;       PLAYER'S MOVE
+;		
+DISMV		LDX	#$04           	; ROTATE
+DROL		ASL	DIS3          	; KEY
+		ROL	DIS2         	; INTO
+		DEX			; DISPLAY
+		BNE	DROL		;
+		ORA	DIS3
+		STA	DIS3
+		STA	SQUARE
+		RTS	
+;		
+;       THE FOLLOWING SUBROUTINE ASSIGNS
+;       A VALUE TO THE MOVE UNDER
+;       CONSIDERATION AND RETURNS IT IN
+;	THE ACCUMULATOR
+;		
+
+STRATGY	CLC	
+		LDA	#$80
+		ADC	WMOB         	; PARAMETERS
+		ADC	WMAXC        	; WITH WHEIGHT
+		ADC	WCC          	; OF O25
+		ADC	WCAP1
+		ADC	WCAP2
+		SEC	
+		SBC	PMAXC
+		SBC	PCC
+		SBC	BCAP0
+		SBC	BCAP1
+		SBC	BCAP2
+		SBC	PMOB
+		SBC	BMOB
+		BCS	POS           	; UNDERFLOW
+		LDA	#$00           	; PREVENTION
+POS		LSR	
+		CLC			; **************
+		ADC	#$40
+		ADC	WMAXC       	; PARAMETERS
+		ADC	WCC         	; WITH WEIGHT
+		SEC			; OF 05
+		SBC	BMAXC
+		LSR			; **************
+		CLC	
+		ADC	#$90
+		ADC	WCAP0       	; PARAMETERS
+		ADC	WCAP0       	; WITH WEIGHT
+		ADC	WCAP0       	; OF 10
+		ADC	WCAP0
+		ADC	WCAP1
+		SEC			; [UNDER OR _OVER-
+		SBC	BMAXC        	; FLOW MAY OCCUR
+		SBC	BMAXC        	; FROM THIS
+		SBC	BMCC          	; SECTION]
+		SBC	BMCC
+		SBC	BCAP1
+		LDX	SQUARE      	; ***************
+		CPX	#$33
+		BEQ	POSN         	; POSITION
+		CPX	#$34           	; BONUS FOR
+		BEQ	POSN         	; MOVE TO
+		CPX	#$22           	; CENTRE
+		BEQ	POSN           	; OR
+		CPX	#$25           	; OUT OF
+		BEQ	POSN         	; BACK RANK
+		LDX	PIECE
+		BEQ	NOPOSN
+		LDY	BOARD,X
+		CPY	#$10
+		BPL	NOPOSN
+POSN		CLC
+		ADC	#$02
+NOPOSN	JMP	CKMATE       		; CONTINUE
+;
+; Added code
+;
+ADDHIST		LDX     HIST
+		INX
+		LDA     $01C8
+		STA	HIST1,X
+		LDA	$01C7
+		STA	HIST2,X
+		LDA	$01C6
+		STA	HIST3,X
+		LDA	$01C5
+		STA	HIST4,X
+		STX	HIST
+		RTS
+
+UNDO		LDY     HIST
+		BEQ	UNDO1
+		LDA	$1900,Y
+		STA	PIECE        	; PIECE
+		TAX	
+		LDA	$1800,Y
+		STA	BOARD,X
+		LDA     $1700,Y
+		TAX	
+		LDA	$1600,Y
+		STA	SQUARE
+		STA	BOARD,X
+		DEY
+		STY     HIST
+UNDO1		RTS
+;
+;-----------------------------------------------------------------
+; The following routines were added to allow text-based board
+; display _OVER a standard RS-232 port.
+;
+POUT		lda	#<menu0
+		sta	mnu
+		lda	#>menu0
+		sta	mnu+1
+        	jsr 	pout9		; print CRLF
+		jsr     pout13		; print copyright
+		JSR	POUT10		; print column labels
+		LDY   	#$00		; init board location
+		JSR	POUT5		; print board horz edge
+POUT1		lDA   	#"|"		; print vert edge
+		JSR   	cout		; PRINT ONE ASCII CHR - SPACE
+		LDX   	#$1F
+POUT2		TYA			; scan the pieces for a location match
+            	CMP	BOARD,X		; match found?
+            	BEQ   	POUT4		; yes; print the piece's color and type
+            	DEX			; no
+            	BPL	POUT2		; if not the last piece, try again
+		tya			; empty square	
+		and	#$01		; odd or even column?				
+		sta   	temp		; save it
+		tya  			; is the row odd or even
+		lsr			; shift column right 4 spaces 
+		lsr			;
+		lsr			;
+		lsr			;
+		and   	#$01		; strip LSB  
+		clc			; 
+		adc   	temp		; combine row & col to determine square color  
+		and   	#$01		; is board square white or blk?
+		bne	pout25 		; white, print space
+		lda   	#"*"		; black, print *
+		.byte	$2c		; used to skip _OVER LDA #$20
+POUT25		LDA   	#$20		; ASCII space
+		JSR   	cout		; PRINT ONE ASCII CHR - SPACE
+		JSR   	cout		; PRINT ONE ASCII CHR - SPACE
+POUT3		INY			; 
+	        TYA			; get row number
+            	AND   	#$08		; have we completed the row?	 
+            	BEQ   	POUT1		; no, do next column
+		LDA   	#"|"		; yes, put the right edge on
+		JSR   	cout		; PRINT ONE ASCII CHR - |             
+		jsr	pout12		; print row number
+		JSR   	POUT9		; print CRLF
+            	JSR   	POUT5		; print bottom edge of board
+		CLC			; 
+		TYA			; 
+		ADC	#$08		; point y to beginning of next row
+		TAY			;
+		CPY   	#$80		; was that the last row?
+		BEQ   	POUT8		; yes, print the LED values
+		BNE   	POUT1		; no, do new row
+
+POUT4		LDA   	REV		; print piece's color & type
+		BEQ   	POUT41		;
+		LDA	cpl+16,X	;
+		BNE	POUT42		;
+POUT41		LDA   	cpl,x		;
+POUT42		JSR	cout		;
+		lda	cph,x		;
+		jsr   	cout		; 
+		BNE	POUT3		; branch always
+
+POUT5       	TXA			; print "-----...-----<crlf>"
+		PHA
+		LDX	#$19
+		LDA	#"-"
+POUT6		JSR   	cout		; PRINT ONE ASCII CHR - "-"
+		DEX
+		BNE	POUT6
+		PLA
+		TAX
+		lda	#25
+		sta	mnu+2
+POUT7		lda	(mnu)
+		inc	mnu
+		bne	POUT77
+		inc	mnu+1
+POUT77		jsr 	cout
+		dec	mnu+2
+		bne	POUT7
+		JSR	POUT9
+		RTS	 		
+
+POUT8		jsr	pout10		; 
+		LDA   	$FB
+		JSR   	print1byte	; PRINT 1 BYTE AS 2 HEX CHRS	
+        	LDA   	#$20
+		JSR   	cout		; PRINT ONE ASCII CHR - SPACE
+        	LDA   	$FA
+		JSR   	print1byte	; PRINT 1 BYTE AS 2 HEX CHRS	
+        	LDA   	#$20
+		JSR   	cout		; PRINT ONE ASCII CHR - SPACE
+        	LDA   	$F9
+		JSR   	print1byte	; PRINT 1 BYTE AS 2 HEX CHRS	
+
+POUT9      	LDA   	#$0D
+		JSR   	cout		; PRINT ONE ASCII CHR - CR
+        	LDA   	#$0A
+		JSR   	cout		; PRINT ONE ASCII CHR - LF
+                RTS 
+
+pout10		ldx   	#$00		; print the column labels
+POUT11		lda	#$20		; 00 01 02 03 ... 07 <CRLF>
+		jsr   	cout
+		txa
+		jsr	print1byte
+		INX
+		CPX   	#$08
+		BNE	POUT11
+		BEQ	POUT9
+POUT12		TYA
+		and 	#$70
+		JSR 	print1byte
+		rts
+
+Pout13		ldx   	#$00		; Print the copyright banner
+Pout14		lda   	banner,x
+		beq   	POUT15
+		jsr   	cout
+		inx
+		bne   	POUT14
+POUT15		rts         
+
+KIN        	LDA   	#"?"
+		JSR   	cout		; PRINT ONE ASCII CHR - ?
+		JSR   	cin		; GET A KEYSTROKE FROM SYSTEM
+            	AND   	#$4F            ; MASK 0-7, AND ALPHA'S
+            	RTS
+
+menu0		.byte	"                         "
+menu1		.byte	"   [Enter] - user move   "
+menu2		.byte	"     [B] - Undo move     "
+menu3		.byte	"     [C] - Reset Board   "
+menu4		.byte	"     [E] - Swap Sides    "
+menu5		.byte	"     [P] - Computer move "
+menu6		.byte	"     [Q] - quite game    "
+menu7		.byte	"                         "
+menu8		.byte	"                         "
+
+banner		.byte	"MicroChess (c) 1996-2002 Peter Jennings, peterj@benlo.com"
+		.byte	$0d, $0a, $00
+cpl		.byte	"WWWWWWWWWWWWWWWWBBBBBBBBBBBBBBBBWWWWWWWWWWWWWWWW"
+cph		.byte	"KQCCBBRRPPPPPPPPKQCCBBRRPPPPPPPP"
+		.byte	$00
+;
+; end of added code
+;
+; BLOCK DATA
+;		*= $1500
+SETW		.byte 	$03, $04, $00, $07, $02, $05, $01, $06
+        	.byte 	$10, $17, $11, $16, $12, $15, $14, $13
+        	.byte 	$73, $74, $70, $77, $72, $75, $71, $76
+	 	.byte	$60, $67, $61, $66, $62, $65, $64, $63
+
+MOVEX   	.byte 	$00, $F0, $FF, $01, $10, $11, $0F, $EF, $F1
+		.byte	$DF, $E1, $EE, $F2, $12, $0E, $1F, $21
+
+POINTS  	.byte 	$0B, $0A, $06, $06, $04, $04, $04, $04
+		.byte 	$02, $02, $02, $02, $02, $02, $02, $02
+
+OPNING  	.byte 	$99, $25, $0B, $25, $01, $00, $33, $25
+		.byte	$07, $36, $34, $0D, $34, $34, $0E, $52
+        	.byte 	$25, $0D, $45, $35, $04, $55, $22, $06
+		.byte	$43, $33, $0F, $CC
+_TOP
+;
+;
+;
+HIST1		=  $1600
+HIST2		=  $1700
+HIST3		=  $1800
+HIST4           =  $1900
+;
+;
+; end of file
+;
\ No newline at end of file
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/fig6502.asm b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/fig6502.asm
new file mode 100644
index 00000000..10b15228
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/fig6502.asm
@@ -0,0 +1,3808 @@
+;
+;                        Through the courtesy of
+;
+;                         FORTH INTEREST GROUP
+;                            P.O. BOX  2154
+;                         OAKLAND, CALIFORNIA
+;                                94621
+;
+;
+;                             Release 1.k0010
+;
+;                        with compiler security
+;                                  and
+;                        variable length names
+;
+;    Further distribution need not include this notice.
+;    The FIG installation Manual is required as it contains
+;    the model of FORTH and glossary of the system.
+;    Might be available from FIG at the above address for $95.00 postpaid.
+;
+;    Translated from the FIG model by W.F. Ragsdale with input-
+;    output given for the Rockwell System-65. Transportation to
+;    other systems requires only the alteration of :
+;                 XEMIT, XKEY, XQTER, XCR, AND RSLW
+;
+;    Equates giving memory assignments, machine
+;    registers, and disk parameters.
+;
+SSIZE     = 128           ; sector size in bytes
+NBUF      = 8             ; number of buffers desired in RAM
+;                             (SSIZE*NBUF >= 1024 bytes)
+SECTR     = 800           ; sector per drive
+;                              forcing high drive to zero
+SECTL     = 1600          ; sector limit for two drives
+;                              of 800 per drive.
+BMAG      = 1056          ; total buffer magnitude, in bytes
+;                              expressed by SSIZE+4*NBUF
+;
+BOS       = $20           ; bottom of data stack, in zero-page.
+TOS       = $9F           ; top of data stack, in zero-page.
+N         = TOS+8         ; scratch workspace.
+IP        = N+8           ; interpretive pointer.
+W         = IP+3          ; code field pointer.
+UP        = W+2           ; user area pointer.
+XSAVE     = UP+2          ; temporary for X register.
+;
+TIBX      = $0100         ; terminal input buffer of 84 bytes.
+ORIG      = $0400         ; origin of FORTH's Dictionary.
+MEM       = $3F00         ; top of assigned memory+1 byte.
+UAREA     = MEM-128       ; 128 bytes of user area
+DAREA     = UAREA-BMAG    ; disk buffer space.
+;
+;         Monitor calls for terminal support
+;
+OUTCH     = cout          ; output one ASCII char. to term.
+INCH      = cin           ; input one ASCII char. to term.
+TCR       = crout         ; terminal return and line feed.
+;
+;    From DAREA downward to the top of the dictionary is free
+;    space where the user's applications are compiled.
+;
+;    Boot up parameters. This area provides jump vectors
+;    to Boot up  code, and parameters describing the system.
+;
+;
+;        .ORG   ORIG
+;
+                         ; User cold entry point
+
+
+ENTER     NOP            ; Vector to COLD entry
+          JMP COLD+2     ;
+REENTR    NOP            ; User Warm entry point
+          JMP WARM       ; Vector to WARM entry
+          .WORD $0004    ; 6502 in radix-36
+          .WORD $5ED2    ;
+          .WORD NTOP     ; Name address of MON
+          .WORD $7F      ; Backspace Character
+          .WORD UAREA    ; Initial User Area
+          .WORD TOS      ; Initial Top of Stack
+          .WORD $1FF     ; Initial Top of Return Stack
+          .WORD TIBX     ; Initial terminal input buffer
+;
+;
+          .WORD 31       ; Initial name field width
+          .WORD 1        ; 0=nod disk, 1=disk
+          .WORD TOP      ; Initial fence address
+          .WORD TOP      ; Initial top of dictionary
+          .WORD VL0      ; Initial Vocabulary link ptr.
+;
+;    The following offset adjusts all code fields to avoid an
+;    address ending $XXFF. This must be checked and altered on
+;    any alteration , for the indirect jump at W-1 to operate !
+;
+;          .ORG *+2         ;.ORIGIN *+2
+          nop
+          nop 	
+;
+;
+;                                       LIT
+;                                       SCREEN 13 LINE 1
+;
+L22       .BYTE $83,"LI",$D4            ; <--- name field
+;                          <----- link field
+          .WORD 00       ; last link marked by zero
+LIT       .WORD *+2      ; <----- code address field
+          LDA (IP),Y     ; <----- start of parameter field
+          PHA
+          INC IP
+          BNE L30
+          INC IP+1
+L30       LDA (IP),Y
+L31       INC IP
+          BNE PUSH
+          INC IP+1
+;
+PUSH      DEX
+          DEX
+;
+PUT       STA 1,X
+          PLA
+          STA 0,X
+;
+;    NEXT is the address interpreter that moves from machine
+;    level word to word.
+;
+NEXT      LDY #1
+          LDA (IP),Y     ; Fetch code field address pointed
+          STA W+1        ; to by IP.
+          DEY
+          LDA (IP),Y
+          STA W
+          CLC            ; Increment IP by two.
+          LDA IP
+          ADC #2
+          STA IP
+          BCC L54
+          INC IP+1
+L54       JMP W-1       ; Jump to an indirect jump (W) which
+;                        vectors to code pointed to by a code
+;                        field.
+;
+;    CLIT pushes the next inline byte to data stack
+;
+L35       .BYTE $84,"CLI",$D4
+          .WORD L22      ; Link to LIT
+CLIT      .WORD *+2
+          LDA (IP),Y
+          PHA
+          TYA
+          BEQ L31        ; a forced branch into LIT
+
+;
+;
+SETUP     ASL 
+          STA N-1
+L63       LDA 0,X
+          STA N,Y
+          INX
+          INY
+          CPY N-1
+          BNE L63
+          LDY #0
+          RTS
+;
+;                                       EXCECUTE
+;                                       SCREEN 14 LINE 11
+;
+L75       .BYTE $87,"EXECUT",$C5
+          .WORD L35      ; link to CLIT
+EXEC      .WORD *+2
+          LDA 0,X
+          STA W
+          LDA 1,X
+          STA W+1
+          INX
+          INX
+          JMP W-1        ; to JMP (W) in z-page
+;
+;                                       BRANCH
+;                                       SCREEN 15 LINE 11
+;
+L89       .BYTE $86,"BRANC",$C8
+          .WORD L75      ; link to EXCECUTE
+BRAN      .WORD *+2
+          CLC
+          LDA (IP),Y
+          ADC IP
+          PHA
+          INY
+          LDA (IP),Y
+          ADC IP+1
+          STA IP+1
+          PLA
+          STA IP
+          JMP NEXT +2
+;
+;                                       0BRANCH
+;                                       SCREEN 15 LINE 6
+;
+L107      .BYTE $87,"0BRANC",$C8
+          .WORD L89      ; link to BRANCH
+ZBRAN     .WORD *+2
+          INX
+          INX
+          LDA $FE,X
+          ORA $FF,X
+          BEQ BRAN+2
+;
+BUMP      CLC
+          LDA IP
+          ADC #2
+          STA IP
+          BCC L122
+          INC IP+1
+L122      JMP NEXT
+;
+;                                       (LOOP)
+;                                       SCREEN 16 LINE 1
+;
+L127      .BYTE $86,"(LOOP",$A9
+          .WORD L107     ; link to 0BRANCH
+PLOOP     .WORD L130
+L130      STX  XSAVE
+          TSX
+          INC $101,X
+          BNE PL1
+          INC $102,X
+;
+PL1       CLC
+          LDA $103,X
+          SBC $101,X
+          LDA $104,X
+          SBC $102,X
+;
+PL2       LDX XSAVE
+          ASL 
+          BCC BRAN+2
+          PLA
+          PLA
+          PLA
+          PLA
+          JMP BUMP
+;
+;                                       (+LOOP)
+;                                       SCREEN 16 LINE 8
+;
+L154      .BYTE $87,"(+LOOP",$A9
+          .WORD L127     ; link to (loop)
+PPLOO     .WORD *+2
+          INX
+          INX
+          STX XSAVE
+          LDA $FF,X
+          PHA
+          PHA
+          LDA $FE,X
+          TSX
+          INX
+          INX
+          CLC
+          ADC $101,X
+          STA $101,X
+          PLA
+          ADC $102,X
+          STA $102,X
+          PLA
+          BPL PL1
+          CLC
+          LDA $101,X
+          SBC $103,X
+          LDA $102,X
+          SBC $104,X
+          JMP PL2
+;
+;                                       (DO)
+;                                       SCREEN 17 LINE 2
+;
+L185      .BYTE $84,"(DO",$A9
+          .WORD L154     ; link to (+LOOP)
+PDO       .WORD *+2
+          LDA 3,X
+          PHA
+          LDA 2,X
+          PHA
+          LDA 1,X
+          PHA
+          LDA 0,X
+          PHA
+;
+POPTWO    INX
+          INX
+;
+;
+;
+POP       INX
+          INX
+          JMP NEXT
+;
+;                                       I
+;                                       SCREEN 17 LINE 9
+;
+L207      .BYTE $81,$C9
+          .WORD L185     ; link to (DO)
+I         .WORD R+2      ; share the code for R
+;
+;                                       DIGIT
+;                                       SCREEN 18 LINE 1
+;
+L214      .BYTE $85,"DIGI",$D4
+          .WORD L207     ; link to I
+DIGIT     .WORD *+2
+          SEC
+          LDA 2,X
+          SBC #$30
+          BMI L234
+          CMP #$A
+          BMI L227
+          SEC
+          SBC #7
+          CMP #$A
+          BMI L234
+L227      CMP 0,X
+          BPL L234
+          STA 2,X
+          LDA #1
+          PHA
+          TYA
+          JMP PUT        ; exit true with converted value
+L234      TYA
+          PHA
+          INX
+          INX
+          JMP PUT        ; exit false with bad conversion
+;
+;                                       (FIND)
+;                                       SCREEN 19 LINE 1
+;
+L243      .BYTE $86,"(FIND",$A9
+          .WORD L214   ; Link to DIGIT
+PFIND     .WORD *+2
+          LDA #2
+          JSR SETUP
+          STX XSAVE
+L249      LDY #0
+          LDA (N),Y
+          EOR (N+2),Y
+;
+;
+          AND #$3F
+          BNE L281
+L254      INY
+          LDA (N),Y
+          EOR (N+2),Y
+          ASL 
+          BNE L280
+          BCC L254
+          LDX XSAVE
+          DEX
+          DEX
+          DEX
+          DEX
+          CLC
+          TYA
+          ADC #5
+          ADC N
+          STA 2,X
+          LDY #0
+          TYA
+          ADC N+1
+          STA 3,X
+          STY 1,X
+          LDA (N),Y
+          STA 0,X
+          LDA #1
+          PHA
+          JMP PUSH
+L280      BCS L284
+L281      INY
+          LDA (N),Y
+          BPL L281
+L284      INY
+          LDA (N),Y
+          TAX
+          INY
+          LDA (N),Y
+          STA N+1
+          STX N
+          ORA N
+          BNE L249
+          LDX XSAVE
+          LDA #0
+          PHA
+          JMP PUSH       ; exit false upon reading null link
+;
+;                                       ENCLOSE
+;                                       SCREEN 20 LINE 1
+;
+L301      .BYTE $87,"ENCLOS",$C5
+          .WORD L243     ; link to (FIND)
+ENCL      .WORD *+2
+          LDA #2
+          JSR SETUP
+          TXA
+          SEC
+          SBC #8
+          TAX
+          STY 3,X
+          STY 1,X
+          DEY
+L313      INY
+          LDA (N+2),Y
+          CMP N
+          BEQ L313
+          STY 4,X
+L318      LDA (N+2),Y
+          BNE L327
+          STY 2,X
+          STY 0,X
+          TYA
+          CMP 4,X
+          BNE L326
+          INC 2,X
+L326      JMP NEXT
+L327      STY 2,X
+          INY
+          CMP N
+          BNE L318
+          STY 0,X
+          JMP NEXT
+;
+;                                       EMIT
+;                                       SCREEN 21 LINE 5
+;
+L337      .BYTE $84,"EMI",$D4
+          .WORD L301     ; link to ENCLOSE
+EMIT      .WORD XEMIT    ; Vector to code for KEY
+;
+;                                       KEY
+;                                       SCREEN 21 LINE 7
+;
+L344      .BYTE $83,"KE",$D9
+          .WORD L337     ; link to EMIT
+KEY       .WORD XKEY     ; Vector to code for KEY
+;
+;                                       ?TERMINAL
+;                                       SCREEN 21 LINE 9
+;
+L351      .BYTE $89,"?TERMINA",$CC
+          .WORD L344     ; link to KEY
+QTERM     .WORD XQTER    ; Vector to code for ?TERMINAL
+;
+;
+;
+;
+;
+;                                       CR
+;                                       SCREEN 21 LINE 11
+;
+L358      .BYTE $82,"C",$D2
+          .WORD L351     ; link to ?TERMINAL
+CR        .WORD XCR      ; Vector to code for CR
+;
+;                                       CMOVE
+;                                       SCREEN 22 LINE 1
+;
+L365      .BYTE $85,"CMOV",$C5
+          .WORD L358     ; link to CR
+CMOVE     .WORD *+2
+          LDA #3
+          JSR SETUP
+L370      CPY N
+          BNE L375
+          DEC N+1
+          BPL L375
+          JMP NEXT
+L375      LDA (N+4),Y
+          STA (N+2),Y
+          INY
+          BNE L370
+          INC N+5
+          INC N+3
+          JMP L370
+;
+;                                       U*
+;                                       SCREEN 23 LINE 1
+;
+L386      .BYTE $82,"U",$AA
+          .WORD L365     ; link to CMOVE
+USTAR     .WORD *+2
+;          LDA 2,X
+;          STA N
+;          STY 2,X
+;          LDA 3,X
+;          STA N+1
+;          STY 3,X
+;          LDY #16        ; for 16 bits
+;L396      ASL 2,X
+;          ROL 3,X
+;          ROL 0,X
+;          ROL 1,X
+;          BCC L411
+;          CLC
+;          LDA N
+;          ADC 2,X
+;          STA 2,X
+;          LDA N+1
+;          ADC 3,X
+;          STA 3,X
+;          LDA #0        ; bug here as high byte of this high word does not
+;          ADC 0,X       ; get incremented when 0,x rolls over to $00
+;          STA 0,X
+;
+;L411      DEY
+;          BNE L396
+;          JMP NEXT
+
+;
+; replacement code from 6502.org - http://forum.6502.org/viewtopic.php?t=689
+;
+          LDA #0   ; in some implementations TYA can be used since NEXT leaves Y=$00 
+          STA N 
+          LDY #16 
+          LSR 3,X 
+          ROR 2,X 
+L1        BCC L2 
+          CLC 
+          sta N+1               ; PHA 
+          LDA N 
+          ADC 0,X 
+          STA N 
+          lda N+1               ; PLA 
+          ADC 1,X 
+L2        ROR 
+          ROR N 
+          ROR 3,X 
+          ROR 2,X 
+          DEY 
+          BNE L1 
+          STA 1,X 
+          LDA N 
+          STA 0,X 
+          JMP NEXT 
+
+;
+;                                       U/
+;                                       SCREEN 24 LINE 1
+;
+L418      .BYTE $82,"U",$AF
+          .WORD L386     ; link to U*
+USLAS     .WORD *+2
+;          LDA 4,X   ; bugged code replaced - dr
+;          LDY 2,X
+;          STY 4,X
+;          ASL 
+;          STA 2,X
+;          LDA 5,X
+;          LDY 3,X
+;          STY 5,X
+;          ROL
+;          STA 3,X
+;          LDA #16
+;          STA N
+;L433      ROL 4,X
+;          ROL 5,X
+;          SEC
+;          LDA 4,X
+;          SBC 0,X
+;          TAY
+;          LDA 5,X
+;          SBC 1,X
+;          BCC L444
+;          STY 4,X
+;          STA 5,X
+;L444      ROL 2,X
+;          ROL 3,X
+;          DEC N
+;          BNE L433
+;          JMP POP
+
+;
+; updated code from 6502.org  - source code repository 32bit division
+;
+          SEC		; Modified code - dr
+          LDA   2,X     ; Subtract hi cell of dividend by
+          SBC   0,X     ; divisor to see if there's an overflow condition.
+          LDA   3,X
+          SBC   1,X
+          BCS   oflow   ; Branch if /0 or overflow.
+          LDA   #$11    ; Loop 17x.
+          STA   N       ; Use N for loop counter.
+loopp     ROL   4,X     ; Rotate dividend lo cell left one bit.
+          ROL   5,X
+          DEC   N       ; Decrement loop counter.
+          BEQ   endd    ; If we're done, then branch to end.
+          ROL   2,X     ; Otherwise rotate dividend hi cell left one bit.
+          ROL   3,X
+          STZ   N+1
+          ROL   N+1     ; Rotate the bit carried out of above into N+1.
+          SEC
+          LDA   2,X     ; Subtract dividend hi cell minus divisor.
+          SBC   0,X
+          STA   N+2     ; Put result temporarily in N+2 (lo byte)
+          LDA   3,X
+          SBC   1,X
+          TAY           ; and Y (hi byte).
+          LDA   N+1     ; Remember now to bring in the bit carried out above.
+          SBC   #$00
+          BCC   loopp
+          LDA   N+2     ; If that didn't cause a borrow,
+          STA   2,X     ; make the result from above to
+          STY   3,X     ; be the new dividend hi cell
+          BRA   loopp   ; and then brach up.  (NMOS 6502 can use BCS here.)
+oflow     LDA   #$FF    ; If overflow or /0 condition found,
+          STA   2,X     ; just put FFFF in both the remainder
+          STA   3,X
+          STA   4,X     ; and the quotient.
+          STA   5,X
+endd      INX           ; When you're done, show one less cell on data stack,
+          INX           ; (INX INX is exactly what the Forth word DROP does) 
+          JMP   SWAP+2  ; and swap the two top cells to put quotient on top.
+
+;
+;                                       AND
+;                                       SCREEN 25 LINE 2
+;
+L453      .BYTE $83,"AN",$C4
+          .WORD L418     ; link to U/
+ANDD      .WORD *+2
+          LDA 0,X
+          AND 2,X
+          PHA
+          LDA 1,X
+          AND 3,X
+;
+BINARY    INX
+          INX
+          JMP PUT
+;
+;                                       OR
+;                                       SCREEN 25 LINE 7
+;
+L469      .BYTE $82,"O",$D2
+          .WORD L453     ; link to AND
+OR        .WORD *+2
+          LDA 0,X
+          ORA 2,X
+          PHA
+          LDA 1,X
+          ORA 3,X
+          INX
+          INX
+          JMP PUT
+;
+;                                       XOR
+;                                       SCREEN 25 LINE 11
+;
+L484      .BYTE $83,"XO",$D2
+          .WORD L469     ; link to OR
+XOR       .WORD *+2
+          LDA 0,X
+          EOR 2,X
+          PHA
+          LDA 1,X
+          EOR 3,X
+          INX
+          INX
+          JMP PUT
+;
+;                                       SP@
+;                                       SCREEN 26 LINE 1
+;
+L499      .BYTE $83,"SP",$C0
+          .WORD L484     ; link  to XOR
+SPAT      .WORD *+2
+          TXA
+;
+PUSHOA    PHA
+          LDA #0
+          JMP PUSH
+;
+;                                       SP!
+;                                       SCREEN 26 LINE 5
+;
+;
+L511      .BYTE $83,"SP",$A1
+          .WORD L499     ; link to SP@
+SPSTO     .WORD *+2
+          LDY #6
+          LDA (UP),Y     ; load data stack pointer (X reg) from
+          TAX            ; silent user variable S0.
+          JMP NEXT
+;
+;                                       RP!
+;                                       SCREEN 26 LINE 8
+;
+L522      .BYTE $83,"RP",$A1
+          .WORD L511     ; link to SP!
+RPSTO     .WORD *+2
+          STX XSAVE      ; load return stack pointer (machine
+          LDY #8         ; stack pointer) from silent user
+          LDA (UP),Y     ; VARIABLE R0
+          TAX
+          TXS
+          LDX XSAVE
+          JMP NEXT
+;
+;                                       ;S
+;                                       SCREEN 26 LINE 12
+;
+L536      .BYTE $82,";",$D3
+          .WORD L522     ; link to RP!
+SEMIS     .WORD *+2
+          PLA
+          STA IP
+          PLA
+          STA IP+1
+          JMP NEXT
+;
+;                                       LEAVE
+;                                       SCREEN 27 LINE  1
+;
+L548      .BYTE $85,"LEAV",$C5
+          .WORD L536     ; link to ;S
+LEAVE     .WORD *+2
+          STX XSAVE
+          TSX
+          LDA $101,X
+          STA $103,X
+          LDA $102,X
+          STA $104,X
+          LDX XSAVE
+          JMP NEXT
+;
+;                                       >R
+;                                       SCREEN 27 LINE 5
+;
+L563      .BYTE $82,">",$D2
+          .WORD L548     ; link to LEAVE
+TOR       .WORD *+2
+          LDA 1,X        ; move high byte
+          PHA
+          LDA 0,X        ; then low byte
+          PHA            ; to return stack
+          INX
+          INX            ; popping off data stack
+          JMP NEXT
+;
+;                                       R>
+;                                       SCREEN 27 LINE 8
+;
+L577      .BYTE $82,"R",$BE
+          .WORD L563     ; link to >R
+RFROM     .WORD *+2
+          DEX            ; make room on data stack
+          DEX
+          PLA            ; high byte
+          STA 0,X
+          PLA            ; then low byte
+          STA 1,X        ; restored to data stack
+          JMP NEXT
+;
+;                                       R
+;                                       SCREEN 27 LINE 11
+;
+L591      .BYTE $81,$D2
+          .WORD L577     ; link to R>
+R         .WORD *+2
+          STX XSAVE
+          TSX            ; address return stack
+          LDA $101,X     ; copy bottom value
+          PHA            ; to data stack
+          LDA $102,X
+          LDX XSAVE
+          JMP PUSH
+;
+;                                       0=
+;                                       SCREEN 28 LINE 2
+;
+L605      .BYTE $82,"0",$BD
+          .WORD L591     ; link to R
+ZEQU      .WORD *+2
+          LDA 1,X        ; Corrected from FD3/2 p69
+          STY 1,X
+          ORA 0,X
+          BNE L613
+          INY
+L613      STY 0,X
+          JMP NEXT
+;
+;                                       0<
+;                                       SCREEN 28 LINE 6
+;
+L619      .BYTE $82,"0",$BC
+          .WORD L605     ; link to 0=
+ZLESS     .WORD *+2
+          ASL 1,X
+          TYA
+          ROL 
+          STY 1,X
+          STA 0,X
+          JMP NEXT
+;
+;                                       +
+;                                       SCREEN 29 LINE 1
+;
+L632      .BYTE $81,$AB
+          .WORD L619     ; link to V-ADJ
+PLUS      .WORD *+2
+          CLC
+          LDA 0,X
+          ADC 2,X
+          STA 2,X
+          LDA 1,X
+          ADC 3,X
+          STA 3,X
+          INX
+          INX
+          JMP NEXT
+;
+;                                       D+
+;                                       SCREEN 29 LINE 4
+;
+L649      .BYTE $82,"D",$AB
+          .WORD L632     ;    LINK TO +
+DPLUS     .WORD *+2
+          CLC
+          LDA 2,X
+          ADC 6,X
+          STA 6,X
+          LDA 3,X
+          ADC 7,X
+          STA 7,X
+          LDA 0,X
+          ADC 4,X
+          STA 4,X
+          LDA 1,X
+          ADC 5,X
+          STA 5,X
+          JMP POPTWO
+;
+;                                       MINUS
+;                                       SCREEN 29 LINE 9
+;
+L670      .BYTE $85,"MINU",$D3
+          .WORD L649     ; link to D+
+MINUS     .WORD *+2
+          SEC
+          TYA
+          SBC 0,X
+          STA 0,X
+          TYA
+          SBC 1,X
+          STA 1,X
+          JMP NEXT
+;
+;                                       DMINUS
+;                                       SCREEN 29 LINE 12
+;
+L685      .BYTE $86,"DMINU",$D3
+          .WORD L670     ; link to  MINUS
+DMINU     .WORD *+2
+          SEC
+          TYA
+          SBC 2,X
+          STA 2,X
+          TYA
+          SBC 3,X
+          STA 3,X
+          JMP MINUS+3
+;
+;                                       OVER
+;                                       SCREEN 30 LINE 1
+;
+L700      .BYTE $84,"OVE",$D2
+          .WORD L685     ; link to DMINUS
+OVER      .WORD *+2
+          LDA 2,X
+          PHA
+          LDA 3,X
+          JMP PUSH
+;
+;                                       DROP
+;                                       SCREEN 30 LINE 4
+;
+L711      .BYTE $84,"DRO",$D0
+          .WORD L700     ; link to OVER
+DROP      .WORD POP
+;
+;                                       SWAP
+;                                       SCREEN 30 LINE 8
+;
+L718      .BYTE $84,"SWA",$D0
+          .WORD L711     ; link to DROP
+SWAP      .WORD *+2
+          LDA 2,X
+          PHA
+          LDA 0,X
+          STA 2,X
+          LDA 3,X
+          LDY 1,X
+          STY 3,X
+          JMP PUT
+;
+;                                       DUP
+;                                       SCREEN 30 LINE 21
+;
+L733      .BYTE $83,"DU",$D0
+          .WORD L718     ; link to SWAP
+DUP       .WORD *+2
+          LDA 0,X
+          PHA
+          LDA 1,X
+          JMP PUSH
+;
+;                                       +!
+;                                       SCREEN 31 LINE 2
+;
+L744      .BYTE $82,"+",$A1
+          .WORD L733     ; link to DUP
+PSTOR     .WORD *+2
+          CLC
+          LDA (0,X)      ; fetch 16 bit value addressed by
+          ADC 2,X        ; bottom of  stack, adding to
+          STA (0,X)      ; second item on stack, and return
+          INC 0,X        ; to memory
+          BNE L754
+          INC 1,X
+L754      LDA (0,X)
+          ADC 3,X
+          STA (0,X)
+          JMP POPTWO
+;
+;                                       TOGGLE
+;                                       SCREEN 31 LINE 7
+;
+L762      .BYTE $81,"TOGGL",$C5
+          .WORD L744     ; link to +!
+TOGGL     .WORD *+2
+          LDA (2,X)      ; complement bits in memory address
+          EOR 0,X        ; second on stack, by pattern on
+          STA (2,X)      ; bottom of stack.
+          JMP POPTWO
+;
+;                                       @
+;                                       SCREEN 32 LINE 1
+;
+L773      .BYTE $81,$C0
+          .WORD L762     ; link to TOGGLE
+AT        .WORD *+2
+          LDA (0,X)
+          PHA
+          INC 0,X
+          BNE L781
+          INC 1,X
+L781      LDA (0,X)
+          JMP PUT
+;
+;                                       C@
+;                                       SCREEN 32 LINE 5
+;
+L787      .BYTE $82,"C",$C0
+          .WORD L773     ; link to @
+CAT       .WORD *+2
+          LDA (0,X)      ; fetch byte addressed by bottom of
+          STA 0,X        ; stack to stack, zeroing the high
+          STY 1,X        ; byte
+          JMP NEXT
+;
+;                                       !
+;                                       SCREEN 32 LINE 8
+;
+L798      .BYTE $81,$A1
+          .WORD L787     ; link to C@
+STORE     .WORD *+2
+          LDA 2,X
+          STA (0,X)      ; store second 16bit value on stack
+          INC 0,X        ; to memory as addressed by bottom
+          BNE L806       ; of stack.
+          INC 1,X
+L806      LDA 3,X
+          STA (0,X)
+          JMP POPTWO
+;
+;                                       C!
+;                                       SCREEN 32 LINE 12
+;
+L813      .BYTE $82,"C",$A1
+          .WORD L798     ; link to !
+CSTOR     .WORD *+2
+          LDA 2,X
+          STA (0,X)
+          JMP POPTWO
+;
+;                                       :
+;                                       SCREEN 33 LINE 2
+;
+L823      .BYTE $C1,$BA
+          .WORD L813     ; link to C!
+COLON     .WORD DOCOL
+          .WORD QEXEC
+          .WORD SCSP
+          .WORD CURR
+          .WORD AT
+          .WORD CON
+          .WORD STORE
+          .WORD CREAT
+          .WORD RBRAC
+          .WORD PSCOD
+;
+DOCOL     LDA IP+1
+          PHA
+          LDA IP
+          PHA
+          CLC
+          LDA W
+          ADC #2
+          STA IP
+          TYA
+          ADC W+1
+          STA IP+1
+          JMP NEXT
+;
+;                                       ;
+;                                       SCREEN 33 LINE 9
+;
+L853      .BYTE $C1,$BB
+          .WORD L823     ; link to :
+          .WORD DOCOL
+          .WORD QCSP
+          .WORD COMP
+          .WORD SEMIS
+          .WORD SMUDG
+          .WORD LBRAC
+          .WORD SEMIS
+;
+;                                       CONSTANT
+;                                       SCREEN 34 LINE 1
+;
+L867      .BYTE $88,"CONSTAN",$D4
+          .WORD L853     ; link to ;
+CONST     .WORD DOCOL
+          .WORD CREAT
+          .WORD SMUDG
+          .WORD COMMA
+          .WORD PSCOD
+;
+DOCON     LDY #2
+          LDA (W),Y
+          PHA
+          INY
+          LDA (W),Y
+          JMP PUSH
+;
+;                                       VARIABLE
+;                                       SCREEN 34 LINE 5
+;
+L885      .BYTE $88,"VARIABL",$C5
+          .WORD L867     ; link to CONSTANT
+VAR       .WORD DOCOL
+          .WORD CONST
+          .WORD PSCOD
+;
+DOVAR     CLC
+          LDA W
+          ADC #2
+          PHA
+          TYA
+          ADC W+1
+          JMP PUSH
+;
+;                                       USER
+;                                       SCREEN 34 LINE 10
+;
+L902      .BYTE $84,"USE",$D2
+          .WORD L885     ; link to VARIABLE
+USER      .WORD DOCOL
+          .WORD CONST
+          .WORD PSCOD
+;
+DOUSE     LDY #2
+          CLC
+          LDA (W),Y
+          ADC UP
+          PHA
+          LDA #0
+          ADC UP+1
+          JMP PUSH
+;
+;                                       0
+;                                       SCREEN 35 LINE 2
+;
+L920      .BYTE $81,$B0
+          .WORD L902     ; link to USER
+ZERO      .WORD DOCON
+          .WORD 0
+;
+;                                       1
+;                                       SCREEN 35 LINE 2
+;
+L928      .BYTE $81,$B1
+          .WORD L920     ; link to 0
+ONE       .WORD DOCON
+          .WORD 1
+;
+;                                       2
+;                                       SCREEN 35 LINE 3
+;
+L936      .BYTE $81,$B2
+          .WORD L928     ; link to 1
+TWO       .WORD DOCON
+          .WORD 2
+;
+;                                       3
+;                                       SCREEN 35 LINE 3
+;
+L944      .BYTE $81,$B3
+          .WORD L936     ; link to 2
+THREE     .WORD DOCON
+          .WORD 3
+;
+;                                       BL
+;                                       SCREEN 35 LINE 4
+;
+L952      .BYTE $82,"B",$CC
+          .WORD L944     ; link to 3
+BL        .WORD DOCON
+          .WORD $20
+;
+;                                       C/L
+;                                       SCREEN 35 LINE 5
+;                                       Characters per line
+L960      .BYTE $83,"C/",$CC
+          .WORD L952     ; link to BL
+CSLL      .WORD DOCON
+          .WORD 64
+;
+;                                       FIRST
+;                                       SCREEN 35 LINE 7
+;
+L968      .BYTE $85,"FIRS",$D4
+          .WORD L960     ; link to C/L
+FIRST     .WORD DOCON
+          .WORD DAREA    ; bottom of disk buffer area
+;
+;                                       LIMIT
+;                                       SCREEN 35 LINE 8
+;
+L976      .BYTE $85,"LIMI",$D4
+          .WORD L968     ; link to FIRST
+LIMIT     .WORD DOCON
+          .WORD UAREA    ; buffers end at user area
+;
+;                                       B/BUF
+;                                       SCREEN 35 LINE 9
+;                                       Bytes per Buffer
+;
+L984      .BYTE $85,"B/BU",$C6
+          .WORD L976     ; link to LIMIT
+BBUF      .WORD DOCON
+          .WORD SSIZE    ; sector size
+;
+;                                       B/SCR
+;                                       SCREEN 35 LINE 10
+;                                       Blocks per screen
+;
+L992      .BYTE $85,"B/SC",$D2
+          .WORD L984     ; link to B/BUF
+BSCR      .WORD DOCON
+          .WORD 8        ; blocks to make one screen
+
+
+
+
+
+;
+;                                       +ORIGIN
+;                                       SCREEN 35 LINE 12
+;
+L1000     .BYTE $87,"+ORIGI",$CE
+          .WORD L992     ; link to B/SCR
+PORIG     .WORD DOCOL
+          .WORD LIT,ORIG
+          .WORD PLUS
+          .WORD SEMIS
+;
+;                                       TIB
+;                                       SCREEN 36 LINE 4
+;
+L1010     .BYTE $83,"TI",$C2
+          .WORD L1000    ; link to +ORIGIN
+TIB       .WORD DOUSE
+          .BYTE $A
+;
+;                                       WIDTH
+;                                       SCREEN 36 LINE 5
+;
+L1018     .BYTE $85,"WIDT",$C8
+          .WORD L1010    ; link to TIB
+WIDTH     .WORD DOUSE
+          .BYTE $C
+;
+;                                       WARNING
+;                                       SCREEN 36 LINE 6
+;
+L1026     .BYTE $87,"WARNIN",$C7
+          .WORD L1018    ; link to WIDTH
+WARN      .WORD DOUSE
+          .BYTE $E
+;
+;                                       FENCE
+;                                       SCREEN 36 LINE 7
+;
+L1034     .BYTE $85,"FENC",$C5
+          .WORD L1026    ; link to WARNING
+FENCE     .WORD DOUSE
+          .BYTE $10
+;
+;
+;                                       DP
+;                                       SCREEN 36 LINE 8
+;
+L1042     .BYTE $82,"D",$D0
+          .WORD L1034    ; link to FENCE
+DP        .WORD DOUSE
+          .BYTE $12
+;
+;                                       VOC-LINK
+;                                       SCREEN 36 LINE 9
+;
+L1050     .BYTE $88,"VOC-LIN",$CB
+          .WORD L1042    ; link to DP
+VOCL      .WORD DOUSE
+          .BYTE $14
+;
+;                                       BLK
+;                                       SCREEN 36 LINE 10
+;
+L1058     .BYTE $83,"BL",$CB
+          .WORD L1050    ; link to VOC-LINK
+BLK       .WORD DOUSE
+          .BYTE $16
+;
+;                                       IN
+;                                       SCREEN 36 LINE 11
+;
+L1066     .BYTE $82,"I",$CE
+          .WORD L1058    ; link to BLK
+IN        .WORD DOUSE
+          .BYTE $18
+;
+;                                       OUT
+;                                       SCREEN 36 LINE 12
+;
+L1074     .BYTE $83,"OU",$D4
+          .WORD L1066    ; link to IN
+OUT       .WORD DOUSE
+          .BYTE $1A
+;
+;                                       SCR
+;                                       SCREEN 36 LINE 13
+;
+L1082     .BYTE $83,"SC",$D2
+          .WORD L1074    ; link to OUT
+SCR       .WORD DOUSE
+          .BYTE $1C
+;
+;                                       OFFSET
+;                                       SCREEN 37 LINE 1
+;
+L1090     .BYTE $86,"OFFSE",$D4
+          .WORD L1082    ; link to SCR
+OFSET     .WORD DOUSE
+          .BYTE $1E
+;
+;                                       CONTEXT
+;                                       SCREEN 37 LINE 2
+;
+L1098     .BYTE $87,"CONTEX",$D4
+          .WORD L1090    ; link to OFFSET
+CON       .WORD DOUSE
+          .BYTE $20
+;
+;                                       CURRENT
+;                                       SCREEN 37 LINE 3
+;
+L1106     .BYTE $87,"CURREN",$D4
+          .WORD L1098    ; link to CONTEXT
+CURR      .WORD DOUSE
+          .BYTE $22
+;
+;                                       STATE
+;                                       SCREEN 37 LINE 4
+;
+L1114     .BYTE $85,"STAT",$C5
+          .WORD L1106    ; link to CURRENT
+STATE     .WORD DOUSE
+          .BYTE $24
+;
+;                                       BASE
+;                                       SCREEN 37 LINE 5
+;
+L1122     .BYTE $84,"BAS",$C5
+          .WORD L1114    ; link to STATE
+BASE      .WORD DOUSE
+          .BYTE $26
+;
+;                                       DPL
+;                                       SCREEN 37 LINE 6
+;
+L1130     .BYTE $83,"DP",$CC
+          .WORD L1122    ; link to BASE
+DPL       .WORD DOUSE
+          .BYTE $28
+;
+;                                       FLD
+;                                       SCREEN 37 LINE 7
+;
+L1138     .BYTE $83,"FL",$C4
+          .WORD L1130    ; link to DPL
+FLD       .WORD DOUSE
+          .BYTE $2A
+;
+;
+;
+;                                       CSP
+;                                       SCREEN 37 LINE 8
+;
+L1146     .BYTE $83,"CS",$D0
+          .WORD L1138    ; link to FLD
+CSP       .WORD DOUSE
+          .BYTE $2C
+;
+;                                       R#
+;                                       SCREEN 37  LINE 9
+;
+L1154     .BYTE $82,"R",$A3
+          .WORD L1146    ; link to CSP
+RNUM      .WORD DOUSE
+          .BYTE $2E
+;
+;                                       HLD
+;                                       SCREEN 37 LINE 10
+;
+L1162     .BYTE $83,"HL",$C4
+          .WORD L1154    ; link to R#
+HLD       .WORD DOUSE
+          .BYTE $30
+;
+;                                       1+
+;                                       SCREEN 38 LINE  1
+;
+L1170     .BYTE $82,"1",$AB
+          .WORD L1162    ; link to HLD
+ONEP      .WORD DOCOL
+          .WORD ONE
+          .WORD PLUS
+          .WORD SEMIS
+;
+;                                       2+
+;                                       SCREEN 38 LINE 2
+;
+L1180     .BYTE $82,"2",$AB
+          .WORD L1170    ; link to 1+
+TWOP      .WORD DOCOL
+          .WORD TWO
+          .WORD PLUS
+          .WORD SEMIS
+;
+;                                       HERE
+;                                       SCREEN 38 LINE 3
+;
+L1190     .BYTE $84,"HER",$C5
+          .WORD L1180    ; link to 2+
+HERE      .WORD DOCOL
+          .WORD DP
+          .WORD AT
+          .WORD SEMIS
+;
+;                                       ALLOT
+;                                       SCREEN 38 LINE 4
+;
+L1200     .BYTE $85,"ALLO",$D4
+          .WORD L1190    ; link to HERE
+ALLOT     .WORD DOCOL
+          .WORD DP
+          .WORD PSTOR
+          .WORD SEMIS
+;
+;                                       ,
+;                                       SCREEN 38 LINE 5
+;
+L1210     .BYTE $81,$AC
+          .WORD L1200    ; link to ALLOT
+COMMA     .WORD DOCOL
+          .WORD HERE
+          .WORD STORE
+          .WORD TWO
+          .WORD ALLOT
+          .WORD SEMIS
+;
+;                                       C,
+;                                       SCREEN 38 LINE 6
+;
+L1222     .BYTE $82,"C",$AC
+          .WORD L1210    ; link to ,
+CCOMM     .WORD DOCOL
+          .WORD HERE
+          .WORD CSTOR
+          .WORD ONE
+          .WORD ALLOT
+          .WORD SEMIS
+;
+;                                       -
+;                                       SCREEN 38 LINE 7
+;
+L1234     .BYTE $81,$AD
+          .WORD L1222    ; link to C,
+SUB       .WORD DOCOL
+          .WORD MINUS
+          .WORD PLUS
+          .WORD SEMIS
+;
+;                                       =
+;                                       SCREEN 38 LINE 8
+;
+L1244     .BYTE $81,$BD
+          .WORD L1234    ; link to -
+EQUAL     .WORD DOCOL
+          .WORD SUB
+          .WORD ZEQU
+          .WORD SEMIS
+;
+;                                       U<
+;                                       Unsigned less than
+;
+L1246     .BYTE $82,"U",$BC
+          .WORD L1244    ; link to =
+ULESS     .WORD DOCOL
+          .WORD SUB      ; subtract two values
+          .WORD ZLESS    ; test sign
+          .WORD SEMIS
+;
+;                                       <
+;                                       Altered from model
+;                                       SCREEN 38 LINE 9
+;
+L1254     .BYTE $81,$BC
+          .WORD L1246    ; link to U<
+LESS      .WORD *+2
+          SEC
+          LDA 2,X
+          SBC 0,X        ; subtract
+          LDA 3,X
+          SBC 1,X
+          STY 3,X        ; zero high byte
+          BVC L1258
+          EOR #$80       ; correct overflow
+L1258     BPL L1260
+          INY            ; invert boolean
+L1260     STY 2,X        ; leave boolean
+          JMP POP
+;
+;                                       >
+;                                       SCREEN 38 LINE 10
+L1264     .BYTE $81,$BE
+          .WORD L1254    ; link to <
+GREAT     .WORD DOCOL
+          .WORD SWAP
+          .WORD LESS
+          .WORD SEMIS
+;
+;                                       ROT
+;                                       SCREEN 38 LINE 11
+;
+L1274     .BYTE $83,"RO",$D4
+          .WORD L1264    ; link to >
+ROT       .WORD DOCOL
+          .WORD TOR
+          .WORD SWAP
+          .WORD RFROM
+          .WORD SWAP
+          .WORD SEMIS
+;
+;                                       SPACE
+;                                       SCREEN 38 LINE 12
+;
+L1286     .BYTE $85,"SPAC",$C5
+          .WORD L1274    ; link to ROT
+SPACE     .WORD DOCOL
+          .WORD BL
+          .WORD EMIT
+          .WORD SEMIS
+;
+;                                       -DUP
+;                                       SCREEN 38 LINE 13
+;
+L1296     .BYTE $84,"-DU",$D0
+          .WORD L1286    ; link to SPACE
+DDUP      .WORD DOCOL
+          .WORD DUP
+          .WORD ZBRAN
+L1301     .WORD $4       ; L1303-L1301
+          .WORD DUP
+L1303     .WORD SEMIS
+;
+;                                       TRAVERSE
+;                                       SCREEN 39 LINE 14
+;
+L1308     .BYTE $88,"TRAVERS",$C5
+          .WORD L1296    ; link to -DUP
+TRAV      .WORD DOCOL
+          .WORD SWAP
+L1312     .WORD OVER
+          .WORD PLUS
+          .WORD CLIT
+          .BYTE $7F
+          .WORD OVER
+          .WORD CAT
+          .WORD LESS
+          .WORD ZBRAN
+L1320     .WORD $FFF1    ; L1312-L1320
+          .WORD SWAP
+          .WORD DROP
+          .WORD SEMIS
+;
+;                                       LATEST
+;                                       SCREEN 39 LINE 6
+;
+L1328     .BYTE $86,"LATES",$D4
+          .WORD L1308    ; link to TRAVERSE
+LATES     .WORD DOCOL
+          .WORD CURR
+          .WORD AT
+          .WORD AT
+          .WORD SEMIS
+;
+;
+;                                       LFA
+;                                       SCREEN 39 LINE 11
+;
+L1339     .BYTE $83,"LF",$C1
+          .WORD L1328    ; link to LATEST
+LFA       .WORD DOCOL
+          .WORD CLIT
+          .BYTE 4
+          .WORD SUB
+          .WORD SEMIS
+;
+;                                       CFA
+;                                       SCREEN 39 LINE 12
+;
+L1350     .BYTE $83,"CF",$C1
+          .WORD L1339    ; link to LFA
+CFA       .WORD DOCOL
+          .WORD TWO
+          .WORD SUB
+          .WORD SEMIS
+;
+;                                       NFA
+;                                       SCREEN 39 LIINE 13
+;
+L1360     .BYTE $83,"NF",$C1
+          .WORD L1350    ; link to CFA
+NFA       .WORD DOCOL
+          .WORD CLIT
+          .BYTE $5
+          .WORD SUB
+          .WORD LIT,$FFFF
+          .WORD TRAV
+          .WORD SEMIS
+;
+;                                       PFA
+;                                       SCREEN 39 LINE 14
+;
+L1373     .BYTE $83,"PF",$C1
+          .WORD L1360    ; link to NFA
+PFA       .WORD DOCOL
+          .WORD ONE
+          .WORD TRAV
+          .WORD CLIT
+          .BYTE 5
+          .WORD PLUS
+          .WORD SEMIS
+;
+;                                       !CSP
+;                                       SCREEN 40 LINE 1
+;
+L1386     .BYTE $84,"!CS",$D0
+          .WORD L1373    ; link to PFA
+SCSP      .WORD DOCOL
+          .WORD SPAT
+          .WORD CSP
+          .WORD STORE
+          .WORD SEMIS
+;
+;                                       ?ERROR
+;                                       SCREEN 40 LINE 3
+;
+L1397     .BYTE $86,"?ERRO",$D2
+          .WORD L1386    ; link to !CSP
+QERR      .WORD DOCOL
+          .WORD SWAP
+          .WORD ZBRAN
+L1402     .WORD 8        ; L1406-L1402
+          .WORD ERROR
+          .WORD BRAN
+L1405     .WORD 4        ; L1407-L1405
+L1406     .WORD DROP
+L1407     .WORD SEMIS
+;
+;                                       ?COMP
+;                                       SCREEN 40 LINE 6
+;
+L1412     .BYTE $85,"?COM",$D0
+          .WORD L1397    ; link to ?ERROR
+QCOMP     .WORD DOCOL
+          .WORD STATE
+          .WORD AT
+          .WORD ZEQU
+          .WORD CLIT
+          .BYTE $11
+          .WORD QERR
+          .WORD SEMIS
+;
+;                                       ?EXEC
+;                                       SCREEN 40 LINE 8
+;
+L1426     .BYTE $85,"?EXE",$C3
+          .WORD L1412    ; link to ?COMP
+QEXEC     .WORD DOCOL
+          .WORD STATE
+          .WORD AT
+          .WORD CLIT
+          .BYTE $12
+          .WORD QERR
+          .WORD SEMIS
+;
+;                                       ?PAIRS
+;                                       SCREEN 40 LINE 10
+;
+L1439     .BYTE $86,"?PAIR",$D3
+          .WORD L1426    ; link to ?EXEC
+QPAIR     .WORD DOCOL
+          .WORD SUB
+          .WORD CLIT
+          .BYTE $13
+          .WORD QERR
+          .WORD SEMIS
+;
+;                                       ?CSP
+;                                       SCREEN 40 LINE 12
+;
+L1451     .BYTE $84,"?CS",$D0
+          .WORD L1439    ; link to ?PAIRS
+QCSP      .WORD DOCOL
+          .WORD SPAT
+          .WORD CSP
+          .WORD AT
+          .WORD SUB
+          .WORD CLIT
+          .BYTE $14
+          .WORD QERR
+          .WORD SEMIS
+;
+;                                       ?LOADING
+;                                       SCREEN 40 LINE 14
+;
+L1466     .BYTE $88,"?LOADIN",$C7
+          .WORD L1451    ; link to ?CSP
+QLOAD     .WORD DOCOL
+          .WORD BLK
+          .WORD AT
+          .WORD ZEQU
+          .WORD CLIT
+          .BYTE $16
+          .WORD QERR
+          .WORD SEMIS
+;
+;                                       COMPILE
+;                                       SCREEN 41 LINE 2
+;
+L1480     .BYTE $87,"COMPIL",$C5
+          .WORD L1466    ; link to ?LOADING
+COMP      .WORD DOCOL
+          .WORD QCOMP
+          .WORD RFROM
+          .WORD DUP
+          .WORD TWOP
+          .WORD TOR
+          .WORD AT
+          .WORD COMMA
+          .WORD SEMIS
+;
+;                                       [
+;                                       SCREEN 41 LINE 5
+;
+L1495     .BYTE $C1,$DB
+          .WORD L1480    ; link to COMPILE
+LBRAC     .WORD DOCOL
+          .WORD ZERO
+          .WORD STATE
+          .WORD STORE
+          .WORD SEMIS
+;
+;                                       ]
+;                                       SCREEN 41 LINE 7
+;
+L1507     .BYTE $81,$DD
+          .WORD L1495    ; link to [
+RBRAC     .WORD DOCOL
+          .WORD CLIT
+          .BYTE $C0
+          .WORD STATE
+          .WORD STORE
+          .WORD SEMIS
+;
+;                                       SMUDGE
+;                                       SCREEN 41 LINE 9
+;
+L1519     .BYTE $86,"SMUDG",$C5
+          .WORD L1507    ; link to ]
+SMUDG     .WORD DOCOL
+          .WORD LATES
+          .WORD CLIT
+          .BYTE $20
+          .WORD TOGGL
+          .WORD SEMIS
+;
+;                                       HEX
+;                                       SCREEN 41 LINE 11
+;
+L1531     .BYTE $83,"HE",$D8
+          .WORD L1519    ; link to SMUDGE
+HEX       .WORD DOCOL
+          .WORD CLIT
+          .BYTE 16
+          .WORD BASE
+          .WORD STORE
+          .WORD SEMIS
+;
+;                                       DECIMAL
+;                                       SCREEN 41 LINE 13
+;
+L1543     .BYTE $87,"DECIMA",$CC
+          .WORD L1531    ; link to HEX
+DECIM     .WORD DOCOL
+          .WORD CLIT
+          .BYTE 10
+          .WORD BASE
+          .WORD STORE
+          .WORD SEMIS
+;
+;
+;
+;                                       (;CODE)
+;                                       SCREEN 42 LINE 2
+;
+L1555     .BYTE $87,"(;CODE",$A9
+          .WORD L1543    ; link to DECIMAL
+PSCOD     .WORD DOCOL
+          .WORD RFROM
+          .WORD LATES
+          .WORD PFA
+          .WORD CFA
+          .WORD STORE
+          .WORD SEMIS
+;
+;                                       ;CODE
+;                                       SCREEN 42 LINE 6
+;
+L1568     .BYTE $C5,";COD",$C5
+          .WORD L1555    ; link to (;CODE)
+          .WORD DOCOL
+          .WORD QCSP
+          .WORD COMP
+          .WORD PSCOD
+          .WORD LBRAC
+          .WORD SMUDG
+          .WORD SEMIS
+;
+;                                       <BUILDS
+;                                       SCREEN 43 LINE 2
+;
+L1582     .BYTE $87,"<BUILD",$D3
+          .WORD L1568    ; link to ;CODE
+BUILD     .WORD DOCOL
+          .WORD ZERO
+          .WORD CONST
+          .WORD SEMIS
+;
+;                                       DOES>
+;                                       SCREEN 43 LINE 4
+;
+L1592     .BYTE $85,"DOES",$BE
+          .WORD L1582    ; link to <BUILDS
+DOES      .WORD DOCOL
+          .WORD RFROM
+          .WORD LATES
+          .WORD PFA
+          .WORD STORE
+          .WORD PSCOD
+;
+DODOE     LDA IP+1
+          PHA
+          LDA IP
+          PHA
+          LDY #2
+          LDA (W),Y
+          STA IP
+          INY
+          LDA (W),Y
+          STA IP+1
+          CLC
+          LDA W
+          ADC #4
+          PHA
+          LDA W+1
+          ADC #0
+          JMP PUSH
+;
+;                                       COUNT
+;                                       SCREEN 44 LINE 1
+;
+L1622     .BYTE $85,"COUN",$D4
+          .WORD L1592    ; link to DOES>
+COUNT     .WORD DOCOL
+          .WORD DUP
+          .WORD ONEP
+          .WORD SWAP
+          .WORD CAT
+          .WORD SEMIS
+;
+;                                       TYPE
+;                                       SCREEN 44 LINE 2
+;
+L1634     .BYTE $84,"TYP",$C5
+          .WORD L1622    ; link to COUNT
+TYPE      .WORD DOCOL
+          .WORD DDUP
+          .WORD ZBRAN
+L1639     .WORD $18      ; L1651-L1639
+          .WORD OVER
+          .WORD PLUS
+          .WORD SWAP
+          .WORD PDO
+L1644     .WORD I
+          .WORD CAT
+          .WORD EMIT
+          .WORD PLOOP
+L1648     .WORD $FFF8    ; L1644-L1648
+          .WORD BRAN
+L1650     .WORD $4       ; L1652-L1650
+L1651     .WORD DROP
+L1652     .WORD SEMIS
+;
+;                                       -TRAILING
+;                                       SCREEN 44 LINE 5
+;
+L1657     .BYTE $89,"-TRAILIN",$C7
+          .WORD L1634    ; link to TYPE
+DTRAI     .WORD DOCOL
+          .WORD DUP
+          .WORD ZERO
+          .WORD PDO
+L1663     .WORD OVER
+          .WORD OVER
+          .WORD PLUS
+          .WORD ONE
+          .WORD SUB
+          .WORD CAT
+          .WORD BL
+          .WORD SUB
+          .WORD ZBRAN
+L1672     .WORD 8        ; L1676-L1672
+          .WORD LEAVE
+          .WORD BRAN
+L1675     .WORD 6        ; L1678-L1675
+L1676     .WORD ONE
+          .WORD SUB
+L1678     .WORD PLOOP
+L1679     .WORD $FFE0    ; L1663-L1679
+          .WORD SEMIS
+;
+;                                       (.")
+;                                       SCREEN 44 LINE 8
+L1685     .BYTE $84,"(.",$22,$A9    ; $84 (." $A9
+          .WORD L1657    ; link to -TRAILING
+PDOTQ     .WORD DOCOL
+          .WORD R
+          .WORD COUNT
+          .WORD DUP
+          .WORD ONEP
+          .WORD RFROM
+          .WORD PLUS
+          .WORD TOR
+          .WORD TYPE
+          .WORD SEMIS
+;
+;                                       ."
+;                                       SCREEN 44 LINE12
+;
+L1701     .BYTE $C2,".",$A2
+          .WORD L1685    ; link to PDOTQ
+          .WORD DOCOL
+          .WORD CLIT
+          .BYTE $22
+          .WORD STATE
+          .WORD AT
+          .WORD ZBRAN
+L1709     .WORD $14      ;L1719-L1709
+          .WORD COMP
+          .WORD PDOTQ
+          .WORD WORD
+          .WORD HERE
+          .WORD CAT
+          .WORD ONEP
+          .WORD ALLOT
+          .WORD BRAN
+L1718     .WORD $A       ;L1723-L1718
+L1719     .WORD WORD
+          .WORD HERE
+          .WORD COUNT
+          .WORD TYPE
+L1723     .WORD SEMIS
+;
+;                                       EXPECT
+;                                       SCREEN 45 LINE 2
+;
+L1729     .BYTE $86,"EXPEC",$D4
+          .WORD L1701    ; link to ."
+EXPEC     .WORD DOCOL
+          .WORD OVER
+          .WORD PLUS
+          .WORD OVER
+          .WORD PDO
+L1736     .WORD KEY
+          .WORD DUP
+          .WORD CLIT
+          .BYTE $E
+          .WORD PORIG
+          .WORD AT
+          .WORD EQUAL
+          .WORD ZBRAN
+L1744     .WORD $1F       ; L1760-L1744
+          .WORD DROP
+          .WORD CLIT
+          .BYTE 08
+          .WORD OVER
+          .WORD I
+          .WORD EQUAL
+          .WORD DUP
+          .WORD RFROM
+          .WORD TWO
+          .WORD SUB
+          .WORD PLUS
+          .WORD TOR
+          .WORD SUB
+          .WORD BRAN
+L1759     .WORD $27       ; L1779-L1759
+L1760     .WORD DUP
+          .WORD CLIT
+          .BYTE $0D
+          .WORD EQUAL
+          .WORD ZBRAN
+L1765     .WORD $0E       ; L1772-L1765
+          .WORD LEAVE
+          .WORD DROP
+          .WORD BL
+          .WORD ZERO
+          .WORD BRAN
+L1771     .WORD 04        ; L1773-L1771
+L1772     .WORD DUP
+L1773     .WORD I
+          .WORD CSTOR
+          .WORD ZERO
+          .WORD I
+          .WORD ONEP
+          .WORD STORE
+L1779     .WORD EMIT
+          .WORD PLOOP
+L1781     .WORD $FFA9
+          .WORD DROP      ; L1736-L1781
+          .WORD SEMIS
+;
+;                                       QUERY
+;                                       SCREEN 45 LINE 9
+;
+L1788     .BYTE $85,"QUER",$D9
+          .WORD L1729    ; link to EXPECT
+QUERY     .WORD DOCOL
+          .WORD TIB
+          .WORD AT
+          .WORD CLIT
+          .BYTE 80       ; 80 characters from terminal
+          .WORD EXPEC
+          .WORD ZERO
+          .WORD IN
+          .WORD STORE
+          .WORD SEMIS
+;
+;                                       X
+;                                       SCREEN 45 LINE 11
+;                                       Actually Ascii Null
+;
+L1804     .BYTE $C1,$80
+          .WORD L1788    ; link to QUERY
+          .WORD DOCOL
+          .WORD BLK
+          .WORD AT
+          .WORD ZBRAN
+L1810     .WORD $2A      ; L1830-l1810
+          .WORD ONE
+          .WORD BLK
+          .WORD PSTOR
+          .WORD ZERO
+          .WORD IN
+          .WORD STORE
+          .WORD BLK
+          .WORD AT
+          .WORD ZERO,BSCR
+          .WORD USLAS
+          .WORD DROP     ; fixed from model
+          .WORD ZEQU
+          .WORD ZBRAN
+L1824     .WORD 8        ; L1828-L1824
+          .WORD QEXEC
+          .WORD RFROM
+          .WORD DROP
+L1828     .WORD BRAN
+L1829     .WORD 6        ; L1832-L1829
+L1830     .WORD RFROM
+          .WORD DROP
+L1832     .WORD SEMIS
+;
+;                                       FILL
+;                                       SCREEN 46 LINE 1
+;
+;
+L1838     .BYTE $84,"FIL",$CC
+          .WORD L1804    ; link to X
+FILL      .WORD DOCOL
+          .WORD SWAP
+          .WORD TOR
+          .WORD OVER
+          .WORD CSTOR
+          .WORD DUP
+          .WORD ONEP
+          .WORD RFROM
+          .WORD ONE
+          .WORD SUB
+          .WORD CMOVE
+          .WORD SEMIS
+;
+;                                       ERASE
+;                                       SCREEN 46 LINE 4
+;
+L1856     .BYTE $85,"ERAS",$C5
+          .WORD L1838    ; link to FILL
+ERASE     .WORD DOCOL
+          .WORD ZERO
+          .WORD FILL
+          .WORD SEMIS
+;
+;                                       BLANKS
+;                                       SCREEN 46 LINE 7
+;
+L1866     .BYTE $86,"BLANK",$D3
+          .WORD L1856    ; link to ERASE
+BLANK     .WORD DOCOL
+          .WORD BL
+          .WORD FILL
+          .WORD SEMIS
+;
+;                                       HOLD
+;                                       SCREEN 46 LINE 10
+;
+L1876     .BYTE $84,"HOL",$C4
+          .WORD L1866    ; link to BLANKS
+HOLD      .WORD DOCOL
+          .WORD LIT,$FFFF
+          .WORD HLD
+          .WORD PSTOR
+          .WORD HLD
+          .WORD AT
+          .WORD CSTOR
+          .WORD SEMIS
+;
+;                                       PAD
+;                                       SCREEN 46 LINE 13
+;
+L1890     .BYTE $83,"PA",$C4
+          .WORD L1876    ; link to HOLD
+PAD       .WORD DOCOL
+          .WORD HERE
+          .WORD CLIT
+          .BYTE 68       ; PAD is 68 bytes above here.
+          .WORD PLUS
+          .WORD SEMIS
+;
+;                                       WORD
+;                                       SCREEN 47 LINE 1
+;
+L1902     .BYTE $84,"WOR",$C4
+          .WORD L1890    ; link to PAD
+WORD      .WORD DOCOL
+          .WORD BLK
+          .WORD AT
+          .WORD ZBRAN
+L1908     .WORD $C       ; L1914-L1908
+          .WORD BLK
+          .WORD AT
+          .WORD BLOCK
+          .WORD BRAN
+L1913     .WORD $6       ; L1916-L1913
+L1914     .WORD TIB
+          .WORD AT
+L1916     .WORD IN
+          .WORD AT
+          .WORD PLUS
+          .WORD SWAP
+          .WORD ENCL
+          .WORD HERE
+          .WORD CLIT
+          .BYTE $22
+          .WORD BLANK
+          .WORD IN
+          .WORD PSTOR
+          .WORD OVER
+          .WORD SUB
+          .WORD TOR
+          .WORD R
+          .WORD HERE
+          .WORD CSTOR
+          .WORD PLUS
+          .WORD HERE
+          .WORD ONEP
+          .WORD RFROM
+          .WORD CMOVE
+          .WORD SEMIS
+;
+;                                       UPPER
+;                                       SCREEN 47 LINE 12
+;
+L1943     .BYTE $85,"UPPE",$D2
+          .WORD L1902    ; link to WORD
+UPPER     .WORD DOCOL
+          .WORD OVER     ; This routine converts text to U case
+          .WORD PLUS     ; It allows interpretation from a term.
+          .WORD SWAP     ; without a shift-lock.
+          .WORD PDO
+L1950     .WORD I
+          .WORD CAT
+          .WORD CLIT
+          .BYTE $5F
+          .WORD GREAT
+          .WORD ZBRAN
+L1956     .WORD 09       ; L1961-L1956
+          .WORD I
+          .WORD CLIT
+          .BYTE $20
+          .WORD TOGGL
+L1961     .WORD PLOOP
+L1962     .WORD $FFEA    ; L1950-L1962
+          .WORD SEMIS
+;
+;                                       (NUMBER)
+;                                       SCREEN 48 LINE 1
+;
+L1968     .BYTE $88,"(NUMBER",$A9
+          .WORD L1943    ; link to UPPER
+PNUMB     .WORD DOCOL
+L1971     .WORD ONEP
+          .WORD DUP
+          .WORD TOR
+          .WORD CAT
+          .WORD BASE
+          .WORD AT
+          .WORD DIGIT
+          .WORD ZBRAN
+L1979     .WORD $2C      ; L2001-L1979
+          .WORD SWAP
+          .WORD BASE
+          .WORD AT
+          .WORD USTAR
+          .WORD DROP
+          .WORD ROT
+          .WORD BASE
+          .WORD AT
+          .WORD USTAR
+          .WORD DPLUS
+          .WORD DPL
+          .WORD AT
+          .WORD ONEP
+          .WORD ZBRAN
+L1994     .WORD 8        ; L1998-L1994
+          .WORD ONE
+          .WORD DPL
+          .WORD PSTOR
+L1998     .WORD RFROM
+          .WORD BRAN
+L2000     .WORD $FFC6    ; L1971-L2000
+L2001     .WORD RFROM
+          .WORD SEMIS
+;
+;                                       NUMBER
+;                                       SCREEN 48 LINE 6
+;
+L2007     .BYTE $86,"NUMBE",$D2
+          .WORD L1968    ; link to (NUMBER)
+NUMBER    .WORD DOCOL
+          .WORD ZERO
+          .WORD ZERO
+          .WORD ROT
+          .WORD DUP
+          .WORD ONEP
+          .WORD CAT
+          .WORD CLIT
+          .BYTE $2D
+          .WORD EQUAL
+          .WORD DUP
+          .WORD TOR
+          .WORD PLUS
+          .WORD LIT,$FFFF
+L2023     .WORD DPL
+          .WORD STORE
+          .WORD PNUMB
+          .WORD DUP
+          .WORD CAT
+          .WORD BL
+          .WORD SUB
+          .WORD ZBRAN
+L2031     .WORD $15      ; L2042-L2031
+          .WORD DUP
+          .WORD CAT
+          .WORD CLIT
+          .BYTE $2E
+          .WORD SUB
+          .WORD ZERO
+          .WORD QERR
+          .WORD ZERO
+          .WORD BRAN
+L2041     .WORD $FFDD    ; L2023-L2041
+L2042     .WORD DROP
+          .WORD RFROM
+          .WORD ZBRAN
+L2045     .WORD 4        ; L2047-L2045
+          .WORD DMINU
+L2047     .WORD SEMIS
+;
+;                                       -FIND
+;                                       SCREEN 48 LINE 12
+;
+L2052     .BYTE $85,"-FIN",$C4
+          .WORD L2007    ; link to NUMBER
+DFIND     .WORD DOCOL
+          .WORD BL
+          .WORD WORD
+          .WORD HERE     ; )
+          .WORD COUNT    ; |- Optional allowing free use of low
+          .WORD UPPER    ; )  case from terminal
+          .WORD HERE
+          .WORD CON
+          .WORD AT
+          .WORD AT
+          .WORD PFIND
+          .WORD DUP
+          .WORD ZEQU
+          .WORD ZBRAN
+L2068     .WORD $A       ; L2073-L2068
+          .WORD DROP
+          .WORD HERE
+          .WORD LATES
+          .WORD PFIND
+L2073     .WORD SEMIS
+;
+;                                       (ABORT)
+;                                       SCREEN 49 LINE 2
+;
+L2078     .BYTE $87,"(ABORT",$A9
+          .WORD L2052    ; link to -FIND
+PABOR     .WORD DOCOL
+          .WORD ABORT
+          .WORD SEMIS
+;
+;                                       ERROR
+;                                       SCREEN 49 LINE 4
+;
+L2087     .BYTE $85,"ERRO",$D2
+          .WORD L2078    ; link to (ABORT)
+ERROR     .WORD DOCOL
+          .WORD WARN
+          .WORD AT
+          .WORD ZLESS
+          .WORD ZBRAN
+L2094     .WORD $4       ; L2096-L2094
+          .WORD PABOR
+L2096     .WORD HERE
+          .WORD COUNT
+          .WORD TYPE
+          .WORD PDOTQ
+          .BYTE 4,"  ? "
+          .WORD MESS
+          .WORD SPSTO
+          .WORD DROP,DROP; make room for 2 error values
+          .WORD IN
+          .WORD AT
+          .WORD BLK
+          .WORD AT
+          .WORD QUIT
+          .WORD SEMIS
+;
+;                                       ID.
+;                                       SCREEN 49 LINE 9
+;
+L2113     .BYTE $83,"ID",$AE
+          .WORD L2087    ; link to ERROR
+IDDOT     .WORD DOCOL
+          .WORD PAD
+          .WORD CLIT
+          .BYTE $20
+          .WORD CLIT
+          .BYTE $5F
+          .WORD FILL
+          .WORD DUP
+          .WORD PFA
+          .WORD LFA
+          .WORD OVER
+          .WORD SUB
+          .WORD PAD
+          .WORD SWAP
+          .WORD CMOVE
+          .WORD PAD
+          .WORD COUNT
+          .WORD CLIT
+          .BYTE $1F
+          .WORD ANDD
+          .WORD TYPE
+          .WORD SPACE
+          .WORD SEMIS
+;
+;                                       CREATE
+;                                       SCREEN 50 LINE 2
+;
+L2142     .BYTE $86,"CREAT",$C5
+          .WORD L2113    ; link to ID
+CREAT     .WORD DOCOL
+          .WORD TIB      ;)
+          .WORD HERE     ;|
+          .WORD CLIT     ;|  6502 only, assures
+          .BYTE $A0      ;|  room exists in dict.
+          .WORD PLUS     ;|
+          .WORD ULESS    ;|
+          .WORD TWO      ;|
+          .WORD QERR     ;)
+          .WORD DFIND
+          .WORD ZBRAN
+L2155     .WORD $0F
+          .WORD DROP
+          .WORD NFA
+          .WORD IDDOT
+          .WORD CLIT
+          .BYTE 4
+          .WORD MESS
+          .WORD SPACE
+L2163     .WORD HERE
+          .WORD DUP
+          .WORD CAT
+          .WORD WIDTH
+          .WORD AT
+          .WORD MIN
+          .WORD ONEP
+          .WORD ALLOT
+          .WORD DP       ;)
+          .WORD CAT      ;| 6502 only. The code field
+          .WORD CLIT     ;| must not straddle page
+          .BYTE $FD      ;| boundaries
+          .WORD EQUAL    ;|
+          .WORD ALLOT    ;)
+          .WORD DUP
+          .WORD CLIT
+          .BYTE $A0
+          .WORD TOGGL
+          .WORD HERE
+          .WORD ONE
+          .WORD SUB
+          .WORD CLIT
+          .BYTE $80
+          .WORD TOGGL
+          .WORD LATES
+          .WORD COMMA
+          .WORD CURR
+          .WORD AT
+          .WORD STORE
+          .WORD HERE
+          .WORD TWOP
+          .WORD COMMA
+          .WORD SEMIS
+;
+;                                       [COMPILE]
+;                                       SCREEN 51 LINE 2
+;
+L2200     .BYTE $C9,"[COMPILE",$DD
+          .WORD L2142    ; link to CREATE
+          .WORD DOCOL
+          .WORD DFIND
+          .WORD ZEQU
+          .WORD ZERO
+          .WORD QERR
+          .WORD DROP
+          .WORD CFA
+          .WORD COMMA
+          .WORD SEMIS
+;
+;                                       LITERAL
+;                                       SCREEN 51 LINE 2
+;
+L2216     .BYTE $C7,"LITERA",$CC
+          .WORD L2200    ; link to [COMPILE]
+LITER     .WORD DOCOL
+          .WORD STATE
+          .WORD AT
+          .WORD ZBRAN
+L2222     .WORD 8        ; L2226-L2222
+          .WORD COMP
+          .WORD LIT
+          .WORD COMMA
+L2226     .WORD SEMIS
+;
+;                                       DLITERAL
+;                                       SCREEN 51 LINE 8
+;
+L2232     .BYTE $C8,"DLITERA",$CC
+          .WORD L2216    ; link to LITERAL
+DLIT      .WORD DOCOL
+          .WORD STATE
+          .WORD AT
+          .WORD ZBRAN
+L2238     .WORD 8        ; L2242-L2238
+          .WORD SWAP
+          .WORD LITER
+          .WORD LITER
+L2242     .WORD SEMIS
+;
+;                                       ?STACK
+;                                       SCREEN 51 LINE 13
+;
+L2248     .BYTE $86,"?STAC",$CB
+          .WORD L2232    ; link to DLITERAL
+QSTAC     .WORD DOCOL
+          .WORD CLIT
+          .BYTE TOS
+          .WORD SPAT
+          .WORD ULESS
+          .WORD ONE
+          .WORD QERR
+          .WORD SPAT
+          .WORD CLIT
+          .BYTE BOS
+          .WORD ULESS
+          .WORD CLIT
+          .BYTE 7
+          .WORD QERR
+          .WORD SEMIS
+;
+;                                       INTERPRET
+;                                       SCREEN 52 LINE 2
+;
+L2269     .BYTE $89,"INTERPRE",$D4
+          .WORD L2248    ; link to ?STACK
+INTER     .WORD DOCOL
+L2272     .WORD DFIND
+          .WORD ZBRAN
+L2274     .WORD $1E      ; L2289-L2274
+          .WORD STATE
+          .WORD AT
+          .WORD LESS
+          .WORD ZBRAN
+L2279     .WORD $A       ; L2284-L2279
+          .WORD CFA
+          .WORD COMMA
+          .WORD BRAN
+L2283     .WORD $6       ; L2286-L2283
+L2284     .WORD CFA
+          .WORD EXEC
+L2286     .WORD QSTAC
+          .WORD BRAN
+L2288     .WORD $1C      ; L2302-L2288
+L2289     .WORD HERE
+          .WORD NUMBER
+          .WORD DPL
+          .WORD AT
+          .WORD ONEP
+          .WORD ZBRAN
+L2295     .WORD 8        ; L2299-L2295
+          .WORD DLIT
+          .WORD BRAN
+L2298     .WORD $6       ; L2301-L2298
+L2299     .WORD DROP
+          .WORD LITER
+L2301     .WORD QSTAC
+L2302     .WORD BRAN
+L2303     .WORD $FFC2    ; L2272-L2303
+;
+;                                       IMMEDIATE
+;                                       SCREEN 53 LINE 1
+;
+L2309     .BYTE $89,"IMMEDIAT",$C5
+          .WORD L2269;   ; link to INTERPRET
+          .WORD DOCOL
+          .WORD LATES
+          .WORD CLIT
+          .BYTE $40
+          .WORD TOGGL
+          .WORD SEMIS
+;
+;                                       VOCABULARY
+;                                       SCREEN 53 LINE 4
+;
+L2321     .BYTE $8A,"VOCABULAR",$D9
+          .WORD L2309    ; link to IMMEDIATE
+          .WORD DOCOL
+          .WORD BUILD
+          .WORD LIT,$A081
+          .WORD COMMA
+          .WORD CURR
+          .WORD AT
+          .WORD CFA
+          .WORD COMMA
+          .WORD HERE
+          .WORD VOCL
+          .WORD AT
+          .WORD COMMA
+          .WORD VOCL
+          .WORD STORE
+          .WORD DOES
+DOVOC     .WORD TWOP
+          .WORD CON
+          .WORD STORE
+          .WORD SEMIS
+;
+;                                       FORTH
+;                                       SCREEN 53 LINE 9
+;
+L2346     .BYTE $C5,"FORT",$C8
+          .WORD L2321    ; link to VOCABULARY
+FORTH     .WORD DODOE
+          .WORD DOVOC
+          .WORD $A081
+XFOR      .WORD NTOP     ; points to top name in FORTH
+VL0       .WORD 0        ; last vocab link ends at zero
+;
+;                                       DEFINITIONS
+;                                       SCREEN 53 LINE 11
+;
+;
+L2357     .BYTE $8B,"DEFINITION",$D3
+          .WORD L2346    ; link to FORTH
+DEFIN     .WORD DOCOL
+          .WORD CON
+          .WORD AT
+          .WORD CURR
+          .WORD STORE
+          .WORD SEMIS
+;
+;                                       (
+;                                       SCREEN 53 LINE 14
+;
+L2369     .BYTE $C1,$A8
+          .WORD L2357    ; link to DEFINITIONS
+          .WORD DOCOL
+          .WORD CLIT
+          .BYTE $29
+          .WORD WORD
+          .WORD SEMIS
+;
+;                                       QUIT
+;                                       SCREEN 54 LINE 2
+;
+L2381     .BYTE $84,"QUI",$D4
+          .WORD L2369    ; link to (
+QUIT      .WORD DOCOL
+          .WORD ZERO
+          .WORD BLK
+          .WORD STORE
+          .WORD LBRAC
+L2388     .WORD RPSTO
+          .WORD CR
+          .WORD QUERY
+          .WORD INTER
+          .WORD STATE
+          .WORD AT
+          .WORD ZEQU
+          .WORD ZBRAN
+L2396     .WORD 7        ; L2399-L2396
+          .WORD PDOTQ
+          .BYTE 2,"OK"
+L2399     .WORD BRAN
+L2400     .WORD $FFE7    ; L2388-L2400
+          .WORD SEMIS
+;
+;                                       ABORT
+;                                       SCREEN 54 LINE 7
+;
+L2406     .BYTE $85,"ABOR",$D4
+          .WORD L2381    ; link to QUIT
+ABORT     .WORD DOCOL
+          .WORD SPSTO
+          .WORD DECIM
+          .WORD DR0
+          .WORD CR
+          .WORD PDOTQ
+          .BYTE 14,"fig-FORTH  1.0"
+          .WORD FORTH
+          .WORD DEFIN
+          .WORD QUIT
+;
+;                                       COLD
+;                                       SCREEN 55 LINE 1
+;
+L2423     .BYTE $84,"COL",$C4
+          .WORD L2406    ; link to ABORT
+COLD      .WORD *+2
+          LDA ORIG+$0C   ; from cold start area
+          STA FORTH+6
+          LDA ORIG+$0D
+          STA FORTH+7
+          LDY #$15
+          BNE L2433
+WARM      LDY #$0F
+L2433     LDA ORIG+$10
+          STA UP
+          LDA ORIG+$11
+          STA UP+1
+L2437     LDA ORIG+$0C,Y
+          STA (UP),Y
+          DEY
+          BPL  L2437
+          LDA #>ABORT    ; actually #>(ABORT+2)
+          STA IP+1
+          LDA #<ABORT+2
+          STA IP
+          CLD
+          LDA #$6C	 ; ind jump opcode
+          STA W-1
+          JMP RPSTO+2    ; And off we go !
+;
+;                                       S->D
+;                                       SCREEN 56 LINE 1
+;
+L2453     .BYTE $84,"S->",$C4
+          .WORD L2423    ; link to COLD
+STOD      .WORD DOCOL
+          .WORD DUP
+          .WORD ZLESS
+          .WORD MINUS
+          .WORD SEMIS
+;
+;                                       +-
+;                                       SCREEN 56 LINE 4
+;
+L2464     .BYTE $82,"+",$AD
+          .WORD L2453    ; link to S->D
+PM        .WORD DOCOL
+          .WORD ZLESS
+          .WORD ZBRAN
+L2469     .WORD 4
+          .WORD MINUS
+L2471     .WORD SEMIS
+;
+;                                       D+-
+;                                       SCREEN 56 LINE 6
+;
+L2476     .BYTE $83,"D+",$AD
+          .WORD L2464    ; link to +-
+DPM       .WORD DOCOL
+          .WORD ZLESS
+          .WORD ZBRAN
+L2481     .WORD 4        ; L2483-L2481
+          .WORD DMINU
+L2483     .WORD SEMIS
+;
+;                                       ABS
+;                                       SCREEN 56 LINE 9
+;
+L2488     .BYTE $83,"AB",$D3
+          .WORD L2476    ; link to D+-
+ABS       .WORD DOCOL
+          .WORD DUP
+          .WORD PM
+          .WORD SEMIS
+;
+;                                       DABS
+;                                       SCREEN 56 LINE 10
+;
+L2498     .BYTE $84,"DAB",$D3
+          .WORD L2488    ; link to ABS
+DABS      .WORD DOCOL
+          .WORD DUP
+          .WORD DPM
+          .WORD SEMIS
+;
+;                                       MIN
+;                                       SCREEN 56 LINE 12
+;
+L2508     .BYTE $83,"MI",$CE
+          .WORD L2498    ; link to DABS
+MIN       .WORD DOCOL
+          .WORD OVER
+          .WORD OVER
+          .WORD GREAT
+          .WORD ZBRAN
+L2515     .WORD 4        ; L2517-L2515
+          .WORD SWAP
+L2517     .WORD DROP
+          .WORD SEMIS
+;
+;                                       MAX
+;                                       SCREEN 56 LINE 14
+;
+L2523     .BYTE $83,"MA",$D8
+          .WORD L2508     ; link to MIN
+MAX       .WORD DOCOL
+          .WORD OVER
+          .WORD OVER
+          .WORD LESS
+          .WORD ZBRAN
+L2530     .WORD 4        ; L2532-L2530
+          .WORD SWAP
+L2532     .WORD DROP
+          .WORD SEMIS
+;
+;                                       M*
+;                                       SCREEN 57 LINE 1
+;
+L2538     .BYTE $82,"M",$AA
+          .WORD L2523    ; link to MAX
+MSTAR     .WORD DOCOL
+          .WORD OVER
+          .WORD OVER
+          .WORD XOR
+          .WORD TOR
+          .WORD ABS
+          .WORD SWAP
+          .WORD ABS
+          .WORD USTAR
+          .WORD RFROM
+          .WORD DPM
+          .WORD SEMIS
+;
+;                                       M/
+;                                       SCREEN 57 LINE 3
+;
+L2556     .BYTE $82,"M",$AF
+          .WORD L2538    ; link to M*
+MSLAS     .WORD DOCOL
+          .WORD OVER
+          .WORD TOR
+          .WORD TOR
+          .WORD DABS
+          .WORD R
+          .WORD ABS
+          .WORD USLAS
+          .WORD RFROM
+          .WORD R
+          .WORD XOR
+          .WORD PM
+          .WORD SWAP
+          .WORD RFROM
+          .WORD PM
+          .WORD SWAP
+          .WORD SEMIS
+;
+;                                       *
+;                                       SCREEN 57 LINE 7
+;
+L2579     .BYTE $81,$AA
+          .WORD L2556    ; link to M/
+STAR      .WORD DOCOL
+          .WORD USTAR
+          .WORD DROP
+          .WORD SEMIS
+;
+;                                       /MOD
+;                                       SCREEN 57 LINE 8
+;
+L2589     .BYTE $84,"/MO",$C4
+          .WORD L2579    ; link to *
+SLMOD     .WORD DOCOL
+          .WORD TOR
+          .WORD STOD
+          .WORD RFROM
+          .WORD MSLAS
+          .WORD SEMIS
+;
+;                                       /
+;                                       SCREEN 57 LINE 9
+;
+L2601     .BYTE $81,$AF
+          .WORD L2589    ; link to /MOD
+SLASH     .WORD DOCOL
+          .WORD SLMOD
+          .WORD SWAP
+          .WORD DROP
+          .WORD SEMIS
+;
+;                                       MOD
+;                                       SCREEN 57 LINE 10
+;
+L2612     .BYTE $83,"MO",$C4
+          .WORD L2601    ; link to /
+MOD       .WORD DOCOL
+          .WORD SLMOD
+          .WORD DROP
+          .WORD SEMIS
+;
+;                                       */MOD
+;                                       SCREEN 57 LINE 11
+;
+L2622     .BYTE $85,"*/MO",$C4
+          .WORD L2612    ; link to MOD
+SSMOD     .WORD DOCOL
+          .WORD TOR
+          .WORD MSTAR
+          .WORD RFROM
+          .WORD MSLAS
+          .WORD SEMIS
+;
+;                                       */
+;                                       SCREEN 57 LINE 13
+;
+L2634     .BYTE $82,"*",$AF
+          .WORD L2622    ; link to */MOD
+SSLAS     .WORD DOCOL
+          .WORD SSMOD
+          .WORD SWAP
+          .WORD DROP
+          .WORD SEMIS
+;
+;                                       M/MOD
+;                                       SCREEN 57 LINE 14
+;
+L2645     .BYTE $85,"M/MO",$C4
+          .WORD L2634    ; link to */
+MSMOD     .WORD DOCOL
+          .WORD TOR
+          .WORD ZERO
+          .WORD R
+          .WORD USLAS
+          .WORD RFROM
+          .WORD SWAP
+          .WORD TOR
+          .WORD USLAS
+          .WORD RFROM
+          .WORD SEMIS
+;
+;                                       USE
+;                                       SCREEN 58 LINE 1
+;
+L2662     .BYTE $83,"US",$C5
+          .WORD L2645    ; link to M/MOD
+USE       .WORD DOVAR
+          .WORD DAREA
+;
+;                                       PREV
+;                                       SCREEN 58 LINE 2
+;
+L2670     .BYTE $84,"PRE",$D6
+          .WORD L2662    ; link to USE
+PREV      .WORD DOVAR
+          .WORD DAREA
+;
+;                                       +BUF
+;                                       SCREEN 58 LINE 4
+;
+;
+L2678     .BYTE $84,"+BU",$C6
+          .WORD L2670    ; link to PREV
+PBUF      .WORD DOCOL
+          .WORD LIT
+          .WORD SSIZE+4  ; hold block #, one sector two num
+          .WORD PLUS
+          .WORD DUP
+          .WORD LIMIT
+          .WORD EQUAL
+          .WORD ZBRAN
+L2688     .WORD 6        ; L2691-L2688
+          .WORD DROP
+          .WORD FIRST
+L2691     .WORD DUP
+          .WORD PREV
+          .WORD AT
+          .WORD SUB
+          .WORD SEMIS
+;
+;                                       UPDATE
+;                                       SCREEN 58 LINE 8
+;
+L2700     .BYTE $86,"UPDAT",$C5
+          .WORD L2678    ; link to +BUF
+UPDAT     .WORD DOCOL
+          .WORD PREV
+          .WORD AT
+          .WORD AT
+          .WORD LIT,$8000
+          .WORD OR
+          .WORD PREV
+          .WORD AT
+          .WORD STORE
+          .WORD SEMIS
+;
+;                                       FLUSH
+;
+L2705     .BYTE $85,"FLUS",$C8
+          .WORD L2700    ; link to UPDATE
+          .WORD DOCOL
+          .WORD LIMIT,FIRST,SUB
+          .WORD BBUF,CLIT
+          .BYTE 4
+          .WORD PLUS,SLASH,ONEP
+          .WORD ZERO,PDO
+L2835     .WORD LIT,$7FFF,BUFFR
+          .WORD DROP,PLOOP
+L2839     .WORD $FFF6    ; L2835-L2839
+          .WORD SEMIS
+;
+;                                       EMPTY-BUFFERS
+;                                       SCREEN 58 LINE 11
+;
+L2716     .BYTE $8D,"EMPTY-BUFFER",$D3
+          .WORD L2705    ; link to FLUSH
+          .WORD DOCOL
+          .WORD FIRST
+          .WORD LIMIT
+          .WORD OVER
+          .WORD SUB
+          .WORD ERASE
+          .WORD SEMIS
+;
+;                                       DR0
+;                                       SCREEN 58 LINE 14
+;
+L2729     .BYTE $83,"DR",$B0
+          .WORD L2716    ; link to EMPTY-BUFFERS
+DR0       .WORD DOCOL
+          .WORD ZERO
+          .WORD OFSET
+          .WORD STORE
+          .WORD SEMIS
+;
+;                                       DR1
+;                                       SCREEN 58 LINE 15
+;
+L2740     .BYTE $83,"DR",$B1
+          .WORD L2729    ; link to DR0
+          .WORD DOCOL
+          .WORD LIT,SECTR ; sectors per drive
+          .WORD OFSET
+          .WORD STORE
+          .WORD SEMIS
+;
+;                                       BUFFER
+;                                       SCREEN 59 LINE 1
+;
+L2751     .BYTE $86,"BUFFE",$D2
+          .WORD L2740    ; link to DR1
+BUFFR     .WORD DOCOL
+          .WORD USE
+          .WORD AT
+          .WORD DUP
+          .WORD TOR
+L2758     .WORD PBUF
+          .WORD ZBRAN
+L2760     .WORD $FFFC    ; L2758-L2760
+          .WORD USE
+          .WORD STORE
+          .WORD R
+          .WORD AT
+          .WORD ZLESS
+          .WORD ZBRAN
+L2767     .WORD $14      ; L2776-L2767
+          .WORD R
+          .WORD TWOP
+          .WORD R
+          .WORD AT
+          .WORD LIT,$7FFF
+          .WORD ANDD
+          .WORD ZERO
+;          .WORD RSLW
+          .WORD RSW
+L2776     .WORD R
+          .WORD STORE
+          .WORD R
+          .WORD PREV
+          .WORD STORE
+          .WORD RFROM
+          .WORD TWOP
+          .WORD SEMIS
+;
+;                                       BLOCK
+;                                       SCREEN 60 LINE 1
+;
+L2788     .BYTE $85,"BLOC",$CB
+          .WORD L2751    ; link to BUFFER
+BLOCK     .WORD DOCOL
+          .WORD OFSET
+          .WORD AT
+          .WORD PLUS
+          .WORD TOR
+          .WORD PREV
+          .WORD AT
+          .WORD DUP
+          .WORD AT
+          .WORD R
+          .WORD SUB
+          .WORD DUP
+          .WORD PLUS
+          .WORD ZBRAN
+L2804     .WORD $34      ; L2830-L2804
+L2805     .WORD PBUF
+          .WORD ZEQU
+          .WORD ZBRAN
+L2808     .WORD $14      ; L2818-L2808
+          .WORD DROP
+          .WORD R
+          .WORD BUFFR
+          .WORD DUP
+          .WORD R
+          .WORD ONE
+;          .WORD RSLW
+          .WORD RSW
+          .WORD TWO
+          .WORD SUB
+L2818     .WORD DUP
+          .WORD AT
+          .WORD R
+          .WORD SUB
+          .WORD DUP
+          .WORD PLUS
+          .WORD ZEQU
+          .WORD ZBRAN
+L2826     .WORD $FFD6    ; L2805-L2826
+          .WORD DUP
+          .WORD PREV
+          .WORD STORE
+L2830     .WORD RFROM
+          .WORD DROP
+          .WORD TWOP
+          .WORD SEMIS    ; end of BLOCK
+;
+;
+;                                       (LINE)
+;                                       SCREEN 61 LINE 2
+;
+L2838     .BYTE $86,"(LINE",$A9
+          .WORD L2788    ; link to BLOCK
+PLINE     .WORD DOCOL
+          .WORD TOR
+          .WORD CSLL
+          .WORD BBUF
+          .WORD SSMOD
+          .WORD RFROM
+          .WORD BSCR
+          .WORD STAR
+          .WORD PLUS
+          .WORD BLOCK
+          .WORD PLUS
+          .WORD CSLL
+          .WORD SEMIS
+;
+;                                       .LINE
+;                                       SCREEN 61 LINE 6
+;
+L2857     .BYTE $85,".LIN",$C5
+          .WORD L2838    ; link to (LINE)
+DLINE     .WORD DOCOL
+          .WORD PLINE
+          .WORD DTRAI
+          .WORD TYPE
+          .WORD SEMIS
+;
+;                                       MESSAGE
+;                                       SCREEN 61 LINE 9
+;
+L2868     .BYTE $87,"MESSAG",$C5
+          .WORD L2857    ; link to .LINE
+MESS      .WORD DOCOL
+          .WORD WARN
+          .WORD AT
+          .WORD ZBRAN
+L2874     .WORD $1B      ; L2888-L2874
+          .WORD DDUP
+          .WORD ZBRAN
+L2877     .WORD $11      ; L2886-L2877
+          .WORD CLIT
+          .BYTE 4
+          .WORD OFSET
+          .WORD AT
+          .WORD BSCR
+          .WORD SLASH
+          .WORD SUB
+          .WORD DLINE
+L2886     .WORD BRAN
+L2887     .WORD 13       ; L2891-L2887
+L2888     .WORD PDOTQ
+          .BYTE 6,"MSG # "
+          .WORD DOT
+L2891     .WORD SEMIS
+;
+;                                       LOAD
+;                                       SCREEN 62 LINE 2
+;
+L2896     .BYTE $84,"LOA",$C4
+          .WORD L2868    ; link to MESSAGE
+LOAD      .WORD DOCOL
+          .WORD BLK
+          .WORD AT
+          .WORD TOR
+          .WORD IN
+          .WORD AT
+          .WORD TOR
+          .WORD ZERO
+          .WORD IN
+          .WORD STORE
+          .WORD BSCR
+          .WORD STAR
+          .WORD BLK
+          .WORD STORE
+          .WORD INTER
+          .WORD RFROM
+          .WORD IN
+          .WORD STORE
+          .WORD RFROM
+          .WORD BLK
+          .WORD STORE
+          .WORD SEMIS
+;
+;                                       -->
+;                                       SCREEN 62 LINE 6
+;
+L2924     .BYTE $C3,"--",$BE
+          .WORD L2896    ; link to LOAD
+          .WORD DOCOL
+          .WORD QLOAD
+          .WORD ZERO
+          .WORD IN
+          .WORD STORE
+          .WORD BSCR
+          .WORD BLK
+          .WORD AT
+          .WORD OVER
+          .WORD MOD
+          .WORD SUB
+          .WORD BLK
+          .WORD PSTOR
+          .WORD SEMIS
+;
+;    XEMIT writes one ascii character to terminal
+;
+;
+XEMIT
+;	  TYA
+;          SEC
+;          LDY #$1A
+;          ADC (UP),Y
+;          STA (UP),Y
+;          INY            ; bump user varaible OUT
+;          LDA #0
+;          ADC (UP),Y
+;          STA (UP),Y
+          LDA 0,X        ; fetch character to output
+;          STX XSAVE
+          JSR OUTCH      ; and display it
+;          LDX XSAVE
+          JMP POP
+;
+;         XKEY reads one terminal keystroke to stack
+;
+;
+XKEY
+;          STX XSAVE
+          JSR INCH       ; might otherwise clobber it while
+;          LDX XSAVE      ; inputting a char to accumulator
+          JMP PUSHOA
+;
+;         XQTER leaves a boolean representing terminal break
+;
+;
+XQTER     jsr cbrk	; if Ctrl-c, set C else clear C
+	  lda #$00      ; 0
+	  rol	        ; move carry to bit 0
+          JMP PUSHOA
+;
+;         XCR displays a CR and LF to terminal
+;
+;
+XCR
+;          STX XSAVE
+          JSR TCR        ; use monitor call
+;          LDX XSAVE
+          JMP NEXT
+;
+; ***                                      -DISC
+;                                       machine level sector R/W
+;
+;L3030     .BYTE $85,"-DIS",$C3
+;          .WORD L2924    ; link to -->
+;DDISC     .WORD *+2
+;          LDA 0,X
+;          STA $C60C
+;          STA $C60D      ; store sector number
+;          LDA 2,X
+;          STA $C60A
+;          STA $C60B      ; store track number
+;          LDA 4,X
+;          STA $C4CD
+;          STA $C4CE      ; store drive number
+;          STX XSAVE
+;          LDA $C4DA      ; sense read or write
+;          BNE L3032
+;          JSR $E1FE
+;          JMP L3040
+;L3032     JSR $E262
+;L3040     JSR $E3EF      ; head up motor off
+;          LDX XSAVE
+;          LDA $C4E1      ; report error code
+;          STA 4,X
+;          JMP POPTWO
+;
+;                                       -BCD
+;                             Convert binary value to BCD
+;
+L3050     .BYTE $84,"-BC",$C4
+          .WORD L2924    ; link to -DISC
+DBCD      .WORD DOCOL
+          .WORD ZERO,CLIT
+          .BYTE 10
+          .WORD USLAS,CLIT
+          .BYTE 16
+          .WORD STAR,OR,SEMIS
+
+;
+; ***                                       R/W
+;                              Read or write one sector
+;
+;L3060     .BYTE $83,"R/",$D7
+;          .WORD L3050    ; link to -BCD
+;RSLW      .WORD DOCOL
+;          .WORD ZEQU,LIT,$C4DA,CSTOR
+;          .WORD SWAP,ZERO,STORE
+;          .WORD ZERO,OVER,GREAT,OVER
+;          .WORD LIT,SECTL-1,GREAT,OR,CLIT
+;          .BYTE 6
+;          .WORD QERR
+;          .WORD ZERO,LIT,SECTR,USLAS,ONEP
+;          .WORD SWAP,ZERO,CLIT
+;          .BYTE $12
+;          .WORD USLAS,DBCD,SWAP,ONEP
+;          .WORD DBCD,DDISC,CLIT
+;          .BYTE 8
+;          .WORD QERR
+;          .WORD SEMIS
+;
+;
+;                                           RSW
+;                              Read or write one sector
+;
+L3070     .BYTE $83,"RS",$D7
+          .WORD L3050    ; link to R/W
+RSW       .WORD DOCOL
+          .WORD TOR  
+          .WORD BBUF, STAR, LIT, $4000, PLUS, DUP
+          .WORD LIT, $6800, GREAT, LIT, $6, QERR
+          .WORD RFROM, ZBRAN, $4, SWAP
+          .WORD BBUF, CMOVE
+          .WORD SEMIS
+;
+;
+;                                       '
+;                                       SCREEN 72 LINE 2
+;
+L3202     .BYTE $C1,$A7
+          .WORD L3070    ; link to RSW
+TICK      .WORD DOCOL
+          .WORD DFIND
+          .WORD ZEQU
+          .WORD ZERO
+          .WORD QERR
+          .WORD DROP
+          .WORD LITER
+          .WORD SEMIS
+;
+;                                       FORGET
+;                                       Altered from model
+;                                       SCREEN 72 LINE 6
+;
+L3217     .BYTE $86,"FORGE",$D4
+          .WORD L3202    ; link to ' TICK
+FORG      .WORD DOCOL
+          .WORD TICK,NFA,DUP
+          .WORD FENCE,AT,ULESS,CLIT
+          .BYTE $15
+          .WORD QERR,TOR,VOCL,AT
+L3220     .WORD R,OVER,ULESS
+          .WORD ZBRAN,L3225-*
+          .WORD FORTH,DEFIN,AT,DUP
+          .WORD VOCL,STORE
+          .WORD BRAN,$FFFF-24+1 ; L3220-*
+L3225     .WORD DUP,CLIT
+          .BYTE 4
+          .WORD SUB
+L3228     .WORD PFA,LFA,AT
+          .WORD DUP,R,ULESS
+          .WORD ZBRAN,$FFFF-14+1 ; L3228-*
+          .WORD OVER,TWO,SUB,STORE
+          .WORD AT,DDUP,ZEQU
+          .WORD ZBRAN,$FFFF-39+1 ; L3225-*
+          .WORD RFROM,DP,STORE
+          .WORD SEMIS
+;
+;                                       BACK
+;                                       SCREEN 73 LINE 1
+;
+L3250     .BYTE $84,"BAC",$CB
+          .WORD L3217    ; link to FORGET
+BACK      .WORD DOCOL
+          .WORD HERE
+          .WORD SUB
+          .WORD COMMA
+          .WORD SEMIS
+;
+;                                       BEGIN
+;                                       SCREEN 73 LINE 3
+;
+L3261     .BYTE $C5,"BEGI",$CE
+          .WORD L3250    ; link to BACK
+          .WORD DOCOL
+          .WORD QCOMP
+          .WORD HERE
+          .WORD ONE
+          .WORD SEMIS
+;
+;                                       ENDIF
+;                                       SCREEN 73 LINE 5
+;
+L3273     .BYTE $C5,"ENDI",$C6
+          .WORD L3261    ; link to BEGIN
+ENDIF     .WORD DOCOL
+          .WORD QCOMP
+          .WORD TWO
+          .WORD QPAIR
+          .WORD HERE
+          .WORD OVER
+          .WORD SUB
+          .WORD SWAP
+          .WORD STORE
+          .WORD SEMIS
+;
+;                                       THEN
+;                                       SCREEN 73 LINE 7
+;
+L3290     .BYTE $C4,"THE",$CE
+          .WORD L3273    ; link to ENDIF
+          .WORD DOCOL
+          .WORD ENDIF
+          .WORD SEMIS
+;
+;                                       DO
+;                                       SCREEN 73 LINE 9
+;
+L3300     .BYTE $C2,"D",$CF
+          .WORD L3290    ; link to THEN
+          .WORD DOCOL
+          .WORD COMP
+          .WORD PDO
+          .WORD HERE
+          .WORD THREE
+          .WORD SEMIS
+;
+;                                       LOOP
+;                                       SCREEN 73 LINE 11
+;
+;
+L3313     .BYTE $C4,"LOO",$D0
+          .WORD L3300    ; link to DO
+          .WORD DOCOL
+          .WORD THREE
+          .WORD QPAIR
+          .WORD COMP
+          .WORD PLOOP
+          .WORD BACK
+          .WORD SEMIS
+;
+;                                       +LOOP
+;                                       SCREEN 73 LINE 13
+;
+L3327     .BYTE $C5,"+LOO",$D0
+          .WORD L3313    ; link to LOOP
+          .WORD DOCOL
+          .WORD THREE
+          .WORD QPAIR
+          .WORD COMP
+          .WORD PPLOO
+          .WORD BACK
+          .WORD SEMIS
+;
+;                                       UNTIL
+;                                       SCREEN 73 LINE 15
+;
+L3341     .BYTE $C5,"UNTI",$CC
+          .WORD L3327    ; link to +LOOP
+UNTIL     .WORD DOCOL
+          .WORD ONE
+          .WORD QPAIR
+          .WORD COMP
+          .WORD ZBRAN
+          .WORD BACK
+          .WORD SEMIS
+;
+;                                       END
+;                                       SCREEN 74 LINE 1
+;
+L3355     .BYTE $C3,"EN",$C4
+          .WORD L3341    ; link to UNTIL
+          .WORD DOCOL
+          .WORD UNTIL
+          .WORD SEMIS
+;
+;                                       AGAIN
+;                                       SCREEN 74 LINE 3
+;
+L3365     .BYTE $C5,"AGAI",$CE
+          .WORD L3355    ; link to END
+AGAIN     .WORD DOCOL
+          .WORD ONE
+          .WORD QPAIR
+          .WORD COMP
+          .WORD BRAN
+          .WORD BACK
+          .WORD SEMIS
+;
+;                                       REPEAT
+;                                       SCREEN 74 LINE 5
+;
+L3379     .BYTE $C6,"REPEA",$D4
+          .WORD L3365    ; link to AGAIN
+          .WORD DOCOL
+          .WORD TOR
+          .WORD TOR
+          .WORD AGAIN
+          .WORD RFROM
+          .WORD RFROM
+          .WORD TWO
+          .WORD SUB
+          .WORD ENDIF
+          .WORD SEMIS
+;
+;                                       IF
+;                                       SCREEN 74 LINE 8
+;
+L3396     .BYTE $C2,"I",$C6
+          .WORD L3379    ; link to REPEAT
+IF        .WORD DOCOL
+          .WORD COMP
+          .WORD ZBRAN
+          .WORD HERE
+          .WORD ZERO
+          .WORD COMMA
+          .WORD TWO
+          .WORD SEMIS
+;
+;                                       ELSE
+;                                       SCREEN 74 LINE 10
+;
+L3411     .BYTE $C4,"ELS",$C5
+          .WORD L3396    ; link to IF
+          .WORD DOCOL
+          .WORD TWO
+          .WORD QPAIR
+          .WORD COMP
+          .WORD BRAN
+          .WORD HERE
+          .WORD ZERO
+          .WORD COMMA
+          .WORD SWAP
+          .WORD TWO
+          .WORD ENDIF
+          .WORD TWO
+          .WORD SEMIS
+;
+;                                       WHILE
+;                                       SCREEN 74 LINE 13
+;
+L3431     .BYTE $C5,"WHIL",$C5
+          .WORD L3411    ; link to ELSE
+          .WORD DOCOL
+          .WORD IF
+          .WORD TWOP
+          .WORD SEMIS
+;
+;                                       SPACES
+;                                       SCREEN 75 LINE 1
+;
+L3442     .BYTE $86,"SPACE",$D3
+          .WORD L3431    ; link to WHILE
+SPACS     .WORD DOCOL
+          .WORD ZERO
+          .WORD MAX
+          .WORD DDUP
+          .WORD ZBRAN
+L3449     .WORD $0C      ; L3455-L3449
+          .WORD ZERO
+          .WORD PDO
+L3452     .WORD SPACE
+          .WORD PLOOP
+L3454     .WORD $FFFC    ; L3452-L3454
+L3455     .WORD SEMIS
+;
+;                                       <#
+;                                       SCREEN 75 LINE 3
+;
+L3460     .BYTE $82,"<",$A3
+          .WORD L3442    ; link to SPACES
+BDIGS     .WORD DOCOL
+          .WORD PAD
+          .WORD HLD
+          .WORD STORE
+          .WORD SEMIS
+;
+;                                       #>
+;                                       SCREEN 75 LINE 5
+;
+L3471     .BYTE $82,"#",$BE
+          .WORD L3460    ; link to <#
+EDIGS     .WORD DOCOL
+          .WORD DROP
+          .WORD DROP
+          .WORD HLD
+          .WORD AT
+          .WORD PAD
+          .WORD OVER
+          .WORD SUB
+          .WORD SEMIS
+;
+;                                       SIGN
+;                                       SCREEN 75 LINE 7
+;
+L3486     .BYTE $84,"SIG",$CE
+          .WORD L3471    ; link to #>
+SIGN      .WORD DOCOL
+          .WORD ROT
+          .WORD ZLESS
+          .WORD ZBRAN
+L3492     .WORD $7       ; L3496-L3492
+          .WORD CLIT
+          .BYTE $2D
+          .WORD HOLD
+L3496     .WORD SEMIS
+;
+;                                       #
+;                                       SCREEN 75 LINE 9
+;
+L3501     .BYTE $81,$A3
+          .WORD L3486    ; link to SIGN
+DIG       .WORD DOCOL
+          .WORD BASE
+          .WORD AT
+          .WORD MSMOD
+          .WORD ROT
+          .WORD CLIT
+          .BYTE 9
+          .WORD OVER
+          .WORD LESS
+          .WORD ZBRAN
+L3513     .WORD 7        ; L3517-L3513
+          .WORD CLIT
+          .BYTE 7
+          .WORD PLUS
+L3517     .WORD CLIT
+          .BYTE $30
+          .WORD PLUS
+          .WORD HOLD
+          .WORD SEMIS
+;
+;                                       #S
+;                                       SCREEN 75 LINE 12
+;
+L3526     .BYTE $82,"#",$D3
+          .WORD L3501    ; link to #
+DIGS      .WORD DOCOL
+L3529     .WORD DIG
+          .WORD OVER
+          .WORD OVER
+          .WORD OR
+          .WORD ZEQU
+          .WORD ZBRAN
+L3535     .WORD $FFF4    ; L3529-L3535
+          .WORD SEMIS
+;
+;                                       D.R
+;                                       SCREEN 76 LINE 1
+;
+L3541     .BYTE $83,"D.",$D2
+          .WORD L3526    ; link to #S
+DDOTR     .WORD DOCOL
+          .WORD TOR
+          .WORD SWAP
+          .WORD OVER
+          .WORD DABS
+          .WORD BDIGS
+          .WORD DIGS
+          .WORD SIGN
+          .WORD EDIGS
+          .WORD RFROM
+          .WORD OVER
+          .WORD SUB
+          .WORD SPACS
+          .WORD TYPE
+          .WORD SEMIS
+;
+;                                       D.
+;                                       SCREEN 76 LINE 5
+;
+L3562     .BYTE $82,"D",$AE
+          .WORD L3541    ; link to D.R
+DDOT      .WORD DOCOL
+          .WORD ZERO
+          .WORD DDOTR
+          .WORD SPACE
+          .WORD SEMIS
+;
+;                                       .R
+;                                       SCREEN 76 LINE 7
+;
+L3573     .BYTE $82,".",$D2
+          .WORD L3562     ; link to D.
+DOTR      .WORD DOCOL
+          .WORD TOR
+          .WORD STOD
+          .WORD RFROM
+          .WORD DDOTR
+          .WORD SEMIS
+;
+;                                       .
+;                                       SCREEN 76  LINE  9
+;
+L3585     .BYTE $81,$AE
+          .WORD L3573    ; link to .R
+DOT       .WORD DOCOL
+          .WORD STOD
+          .WORD DDOT
+          .WORD SEMIS
+;
+;                                       ?
+;                                       SCREEN 76 LINE 11
+;
+L3595     .BYTE $81,$BF
+          .WORD L3585    ; link to .
+QUES      .WORD DOCOL
+          .WORD AT
+          .WORD DOT
+          .WORD SEMIS
+;
+;                                       LIST
+;                                       SCREEN 77 LINE 2
+;
+L3605     .BYTE $84,"LIS",$D4
+          .WORD L3595    ; link to ?
+LIST      .WORD DOCOL
+          .WORD DECIM
+          .WORD CR
+          .WORD DUP
+          .WORD SCR
+          .WORD STORE
+          .WORD PDOTQ
+          .BYTE 6,"SCR # "
+          .WORD DOT
+          .WORD CLIT
+          .BYTE 16
+          .WORD ZERO
+          .WORD PDO
+L3620     .WORD CR
+          .WORD I
+          .WORD THREE
+          .WORD DOTR
+          .WORD SPACE
+          .WORD I
+          .WORD SCR
+          .WORD AT
+          .WORD DLINE
+          .WORD PLOOP
+L3630     .WORD $FFEC
+          .WORD CR
+          .WORD SEMIS
+;
+;                                       INDEX
+;                                       SCREEN 77 LINE 7
+;
+L3637     .BYTE $85,"INDE",$D8
+          .WORD L3605    ; link to LIST
+          .WORD DOCOL
+          .WORD CR
+          .WORD ONEP
+          .WORD SWAP
+          .WORD PDO
+L3647     .WORD CR
+          .WORD I
+          .WORD THREE
+          .WORD DOTR
+          .WORD SPACE
+          .WORD ZERO
+          .WORD I
+          .WORD DLINE
+          .WORD QTERM
+          .WORD ZBRAN
+L3657     .WORD 4        ; L3659-L3657
+          .WORD LEAVE
+L3659     .WORD PLOOP
+L3660     .WORD $FFE6    ; L3647-L3660
+          .WORD CLIT
+          .BYTE $0C      ; form feed for printer
+          .WORD EMIT
+          .WORD SEMIS
+;
+;                                       TRIAD
+;                                       SCREEN 77 LINE 12
+;
+L3666     .BYTE $85,"TRIA",$C4
+          .WORD L3637    ; link to INDEX
+          .WORD DOCOL
+          .WORD THREE
+          .WORD SLASH
+          .WORD THREE
+          .WORD STAR
+          .WORD THREE
+          .WORD OVER
+          .WORD PLUS
+          .WORD SWAP
+          .WORD PDO
+L3681     .WORD CR
+          .WORD I
+          .WORD LIST
+          .WORD PLOOP
+L3685     .WORD $FFF8    ; L3681-L3685
+          .WORD CR
+          .WORD CLIT
+          .BYTE $F
+          .WORD MESS
+          .WORD CR
+          .WORD CLIT
+          .BYTE $0C      ;  form feed for printer
+          .WORD EMIT
+          .WORD SEMIS
+;
+;                                       VLIST
+;                                       SCREEN 78 LINE 2
+;
+;
+L3696     .BYTE $85,"VLIS",$D4
+          .WORD L3666    ; link to TRIAD
+VLIST     .WORD DOCOL
+          .WORD CLIT
+          .BYTE $80
+          .WORD OUT
+          .WORD STORE
+          .WORD CON
+          .WORD AT
+          .WORD AT
+L3706     .WORD OUT
+          .WORD AT
+          .WORD CSLL
+          .WORD GREAT
+          .WORD ZBRAN
+L3711     .WORD $A       ; L3716-L3711
+          .WORD CR
+          .WORD ZERO
+          .WORD OUT
+          .WORD STORE
+L3716     .WORD DUP
+          .WORD IDDOT
+          .WORD SPACE
+          .WORD SPACE
+          .WORD PFA
+          .WORD LFA
+          .WORD AT
+          .WORD DUP
+          .WORD ZEQU
+          .WORD QTERM
+          .WORD OR
+          .WORD ZBRAN
+L3728     .WORD $FFD4    ; L3706-L3728
+          .WORD DROP
+          .WORD SEMIS
+;
+;                                       MON
+;                                       SCREEN 79 LINE 3
+;
+NTOP      .BYTE $83,"MO",$CE
+          .WORD L3696    ; link to VLIST
+MON       .WORD *+2
+           JMP  (RESvector)        ; back to SBC Monitor 	
+;          STX XSAVE
+;          BRK       ; break to monitor which is assumed
+;          LDX XSAVE ; to save this as reentry point
+;          JMP NEXT
+;
+TOP	           ; end of listing
+
\ No newline at end of file
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/fload.asm b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/fload.asm
new file mode 100644
index 00000000..14c5ad23
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/fload.asm
@@ -0,0 +1,29 @@
+; ----------------- assembly instructions ---------------------------- 
+
+
+TOPROM					; Top of Forth In ROM
+
+		lda	#<ORIG		; $0400
+		sta	$00
+		lda	#>ORIG		; $0400
+		sta	$01
+		lda	#$00		; start of Forth in ROM
+		sta	$02
+		lda	#$A6
+		sta	$03
+CopyROM		lda	($02)
+		sta	($00)
+		inc	$00
+		bne	CopyR1
+		inc	$01
+CopyR1		inc	$02
+		bne	CopyR2
+		inc	$03
+CopyR2		sec
+		lda	#<TOPROM
+		ldx	#>TOPROM
+		sbc	$02
+		txa
+		sbc	$03
+		bcs	CopyROM
+		JMP	Enter	        ; Forth Cold Start
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/reset.asm b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/reset.asm
new file mode 100644
index 00000000..d513b27b
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/reset.asm
@@ -0,0 +1,100 @@
+; ----------------- assembly instructions ---------------------------- 
+;
+;****************************************************************************
+; Reset, Interrupt, & Break Handlers
+;****************************************************************************
+               *= $FF00             ; put this in last page of ROM
+
+;--------------Reset handler----------------------------------------------
+Reset          SEI                     ; diable interupts
+               CLD                     ; clear decimal mode                      
+               LDX   #$FF              ;
+               TXS                     ; init stack pointer
+;
+; you can patch in a test for keypress here to bypass memory erase.
+; It will then test the vectors, and jump to your routine.
+;
+Set_Vectors    LDX   #<Start_OS        ; *** only outside reference in reset routine
+               LDA   #>Start_OS        ; *** points to Monitor Boot routine
+               sta   RESvector+1       ;
+               stx   RESvector         ;
+               LDX   #<INTret          ; set up to point to RTI command 
+               LDA   #>INTret          ; (no system NMI applications)
+               sta   NMIvector+1       ;
+               stx   NMIvector         ;
+               LDX   #<INTret          ; set up to point to RTI command 
+               LDA   #>INTret          ; (no system INT applications)
+               sta   INTvector+1       ;
+               stx   INTvector         ;
+               LDX   #<BRKroutine      ; set up to point to my BRK routine
+               LDA   #>BRKroutine      ; 
+               sta   BRKvector+1       ;
+               stx   BRKvector         ;
+	       lda   #<ACIA1_Scan
+               sta   VEC_IN
+		   lda   #>ACIA1_Scan
+               sta   VEC_IN+1
+	         lda   #<ACIA1_Output
+               sta   VEC_OUT
+		   lda   #>ACIA1_OUTPUT
+               sta   VEC_OUT+1
+	         lda   #<Psave
+               sta   VEC_SV
+	         lda   #>Psave
+               sta   VEC_SV+1
+		   lda   #<pload
+               sta   VEC_LD
+		   lda   #>pload
+               sta   VEC_LD+1
+;
+; select the IO device driver here       
+;
+		   jsr   ACIA1_init	   ; init the I/O devices
+
+Clr_regs       lda   #$00              ; Clear registers
+               TAY                     ;
+               TAX                     ;
+               CLC                     ; clear flags
+               CLD                     ; clear decimal mode
+               CLI                     ; Enable interrupt system
+               JMP  (RESvector)        ; Monitor for cold reset                       
+;
+NMIjump        jmp  (NMIvector)        ;
+INTret         RTI                     ; Null Interrupt return
+Interrupt      PHX                     ;
+               PHA                     ;
+               TSX                     ; get stack pointer
+               LDA   $0103,X           ; load INT-P Reg off stack
+               AND   #$10              ; mask BRK
+               BNE   BrkCmd            ; BRK CMD
+               PLA                     ;
+               PLX                     ;
+               jmp   (INTvector)       ; let user routine have it 
+BrkCmd         pla                     ;
+               plx                     ;
+               jmp   (BRKvector)       ; patch in user BRK routine
+RRTS           rts                     ; documented RTS instruction
+;
+;
+;
+; *** VERSION Notes ***
+; 3.5 added the text dump command, 'q'
+; 4.0 reorganized structure, added RAM vectors for chrin, scan_in, and chrout
+; 4.1 fixed set time routine so 20-23 is correct    
+; 4.2 RST, IRQ, NMI, BRK all jmp ind to 02xx page to allow user prog to control
+; 4.3 added status register bits to printreg routine
+; 4.4 refined set time to reduce unneeded sec's and branches, disp time added CR,
+;     and added zeromem to the reset routine, ensuring a reset starts fresh every time!
+;     continued to re-organize - moved monitor's brk handler into mon area.
+
+;  65C02 Firmware Notes
+;
+;  NMIjmp      =     $FFFA             
+;  RESjmp      =     $FFFC             
+;  INTjmp      =     $FFFE             
+
+               *=    $FFFA
+               .word  NMIjump
+               .word  Reset 
+               .word  Interrupt
+;end of file
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/sbc.asm b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/sbc.asm
new file mode 100644
index 00000000..4dcbbb66
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/sbc.asm
@@ -0,0 +1,28 @@
+      *= $4002			; create exact 32k bin image
+
+     .byte  $ff
+
+;
+; compile the sections of the OS
+;
+
+	.include	ioRegs.inc
+
+	*=	$9E00
+	.include chess.asm
+      	.include USART0.asm	   ;        ser init (115200,n,8,1)
+
+	*=	$A600
+	.logical	$0400
+	.include	fig6502.asm
+	.here
+	.include fload.asm
+
+	.include basic.asm         ; $BE00  Enhanced BASIC 
+	.include basldsv.asm	   ;        EH-BASIC load & save support
+
+ 	.include sbcos.asm         ; OS
+ 
+ 	.include upload.asm        ; $FA00  Intel Hex & Xmodem-CRC uploader
+	.include reset.asm         ; $FF00  Reset & IRQ handler
+
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/upload.asm b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/upload.asm
new file mode 100644
index 00000000..deb14471
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/SBC2OS/upload.asm
@@ -0,0 +1,476 @@
+; upload.asm   (hooked into SbcOS at $fa00-feff)
+; By Daryl Rictor & Ross Archer  Aug 2002
+;
+; 21st century code for 20th century CPUs (tm?)
+; 
+; A simple file transfer program to allow upload from a serial
+; port to the SBC.  It integrates both x-modem/CRC transfer protocol 
+; and Intel Hex formatted files. Primary is XMODEM-CRC, due to its
+; superior reliability.  Fallback to Intel Hex is automagical following
+; receipt of the first Hexfile d/l character, so the selection is 
+; transparent to the user.
+;
+; Files uploaded via XMODEM-CRC must be
+; in .o64 format -- the first two bytes are the load address in
+; little-endian format:  
+;  FIRST BLOCK
+;     offset(0) = lo(load start address),
+;     offset(1) = hi(load start address)
+;     offset(2) = data byte (0)
+;     offset(n) = data byte (n-2)
+;
+; Subsequent blocks
+;     offset(n) = data byte (n)
+;
+; The TASS assembler and most Commodore 64-based tools generate this
+; data format automatically and you can transfer their .obj/.o64 output
+; file directly.  
+;   
+; The only time you need to do anything special is if you have 
+; a raw memory image file (say you want to load a data
+; table into memory). For XMODEM you'll have to 
+; "insert" the start address bytes to the front of the file.
+; Otherwise, XMODEM would have no idea where to start putting
+; the data.
+;
+; The "fallback" format is Intel Hex.  As address information is included
+; at the start of each line of an Intel Hex file, there is no need for a special
+; "first block". As soon as the receiver sees an Intel Hex
+; character ':' coming in, it aborts the XMODEM-CRC upload attempt and
+; tries to accept Intel Hex instead.  This is the format used natively
+; by a lot of generic tools such as TASM.
+; Note there is no "fallback fallback."  Once it quits CRC and 
+; thinks you're sending it Intel Hex, you either have to finish the download 
+; or press CTRL-C to abort.
+;
+; By having support for both formats under the same "U"pload command,
+; it enables seamless switching between either kind of toolchain with
+; no special user intervention.  This seemed like a Good Thing (tm).
+;
+; Note: testing shows that no end-of-line delay is required for Intel Hex
+; uploads, but in case your circumstances differ and you encounter
+; error indications from a download (especially if you decided to run the
+; controller under 1 Mhz), adding a 10-50 mS delay after each line is 
+; harmless and will ensure no problems even at low clock speeds
+;
+;
+; Style conventions being tried on this file for possible future adoption:
+; 1. Constants known at assembly time are ALL CAPS
+; 2. Variables are all lower-case, with underscores used as the word separator
+; 3. Labels are PascalStyleLikeThis to distinguish from constants and variables
+; 4. Old labels from external modules are left alone.  We may want
+;    to adopt these conventions and retrofit old source later.
+; 5. Op-codes are lower-case
+; 6. Comments are free-style but ought to line up with similar adjacent comments
+
+; zero page variables (Its ok to stomp on the monitor's zp vars)
+;
+;
+crc		=	$38		; CRC lo byte
+crch		=	$39		; CRC hi byte
+ptr		=	$3a		; data pointer
+ptrh		=	$3b		;   "    "
+blkno		=	$3c		; block number
+retry		=	$3d		; retry counter
+retry2	=	$3e		; 2nd counter
+bflag		=	$3f		; block flag 
+reclen    	=   	$39        	; record length in bytes
+chksum    	=   	crc        	; record checksum accumulator
+start_lo  	=   	$3b
+start_hi  	=   	$3c
+rectype   	=   	$3d
+dlfail    	=   	$3e     	; flag for upload failure
+temp      	=   	$3f     	; save hex value
+strptr      =     $40
+strptrh	=     $41		; temporary string pointer (not preserved across calls)
+
+;
+;  tables and constants
+;
+;crclo    	=	$7a00      	; Two 256-byte tables for quick lookup
+;crchi    	= 	$7b00      	; (should be page-aligned for speed)
+Rbuff		=	$0300      	; temp 128 byte receive buffer 
+					; (uses the Monitor's input buffer)
+SOH		=	$01		; start block
+EOT		=	$04		; end of text marker
+ACK		=	$06		; good block acknowleged
+NAK		=	$15		; bad block acknowleged
+CAN		=	$18		; cancel (not standard, not supported)
+CRN		=	13
+LF		=	10
+ESC         =     27          ; ESC to exit
+                                        ;
+		*= $fa00		; lo CRC lookup table
+crclo
+ .byte $00,$21,$42,$63,$84,$A5,$C6,$E7,$08,$29,$4A,$6B,$8C,$AD,$CE,$EF
+ .byte $31,$10,$73,$52,$B5,$94,$F7,$D6,$39,$18,$7B,$5A,$BD,$9C,$FF,$DE
+ .byte $62,$43,$20,$01,$E6,$C7,$A4,$85,$6A,$4B,$28,$09,$EE,$CF,$AC,$8D
+ .byte $53,$72,$11,$30,$D7,$F6,$95,$B4,$5B,$7A,$19,$38,$DF,$FE,$9D,$BC
+ .byte $C4,$E5,$86,$A7,$40,$61,$02,$23,$CC,$ED,$8E,$AF,$48,$69,$0A,$2B
+ .byte $F5,$D4,$B7,$96,$71,$50,$33,$12,$FD,$DC,$BF,$9E,$79,$58,$3B,$1A
+ .byte $A6,$87,$E4,$C5,$22,$03,$60,$41,$AE,$8F,$EC,$CD,$2A,$0B,$68,$49
+ .byte $97,$B6,$D5,$F4,$13,$32,$51,$70,$9F,$BE,$DD,$FC,$1B,$3A,$59,$78
+ .byte $88,$A9,$CA,$EB,$0C,$2D,$4E,$6F,$80,$A1,$C2,$E3,$04,$25,$46,$67
+ .byte $B9,$98,$FB,$DA,$3D,$1C,$7F,$5E,$B1,$90,$F3,$D2,$35,$14,$77,$56
+ .byte $EA,$CB,$A8,$89,$6E,$4F,$2C,$0D,$E2,$C3,$A0,$81,$66,$47,$24,$05
+ .byte $DB,$FA,$99,$B8,$5F,$7E,$1D,$3C,$D3,$F2,$91,$B0,$57,$76,$15,$34
+ .byte $4C,$6D,$0E,$2F,$C8,$E9,$8A,$AB,$44,$65,$06,$27,$C0,$E1,$82,$A3
+ .byte $7D,$5C,$3F,$1E,$F9,$D8,$BB,$9A,$75,$54,$37,$16,$F1,$D0,$B3,$92
+ .byte $2E,$0F,$6C,$4D,$AA,$8B,$E8,$C9,$26,$07,$64,$45,$A2,$83,$E0,$C1
+ .byte $1F,$3E,$5D,$7C,$9B,$BA,$D9,$F8,$17,$36,$55,$74,$93,$B2,$D1,$F0 
+
+		*= $fb00		; hi CRC lookup table
+crchi
+ .byte $00,$10,$20,$30,$40,$50,$60,$70,$81,$91,$A1,$B1,$C1,$D1,$E1,$F1
+ .byte $12,$02,$32,$22,$52,$42,$72,$62,$93,$83,$B3,$A3,$D3,$C3,$F3,$E3
+ .byte $24,$34,$04,$14,$64,$74,$44,$54,$A5,$B5,$85,$95,$E5,$F5,$C5,$D5
+ .byte $36,$26,$16,$06,$76,$66,$56,$46,$B7,$A7,$97,$87,$F7,$E7,$D7,$C7
+ .byte $48,$58,$68,$78,$08,$18,$28,$38,$C9,$D9,$E9,$F9,$89,$99,$A9,$B9
+ .byte $5A,$4A,$7A,$6A,$1A,$0A,$3A,$2A,$DB,$CB,$FB,$EB,$9B,$8B,$BB,$AB
+ .byte $6C,$7C,$4C,$5C,$2C,$3C,$0C,$1C,$ED,$FD,$CD,$DD,$AD,$BD,$8D,$9D
+ .byte $7E,$6E,$5E,$4E,$3E,$2E,$1E,$0E,$FF,$EF,$DF,$CF,$BF,$AF,$9F,$8F
+ .byte $91,$81,$B1,$A1,$D1,$C1,$F1,$E1,$10,$00,$30,$20,$50,$40,$70,$60
+ .byte $83,$93,$A3,$B3,$C3,$D3,$E3,$F3,$02,$12,$22,$32,$42,$52,$62,$72
+ .byte $B5,$A5,$95,$85,$F5,$E5,$D5,$C5,$34,$24,$14,$04,$74,$64,$54,$44
+ .byte $A7,$B7,$87,$97,$E7,$F7,$C7,$D7,$26,$36,$06,$16,$66,$76,$46,$56
+ .byte $D9,$C9,$F9,$E9,$99,$89,$B9,$A9,$58,$48,$78,$68,$18,$08,$38,$28
+ .byte $CB,$DB,$EB,$FB,$8B,$9B,$AB,$BB,$4A,$5A,$6A,$7A,$0A,$1A,$2A,$3A
+ .byte $FD,$ED,$DD,$CD,$BD,$AD,$9D,$8D,$7C,$6C,$5C,$4C,$3C,$2C,$1C,$0C
+ .byte $EF,$FF,$CF,$DF,$AF,$BF,$8F,$9F,$6E,$7E,$4E,$5E,$2E,$3E,$0E,$1E 
+
+;
+; Xmodem/CRC upload routine
+; By Daryl Rictor, July 31, 2002
+;
+;
+; v0.3  tested good minus CRC
+; v0.4  CRC fixed!!! init to $0000 rather than $FFFF as stated   
+; v0.5  added CRC tables vs. generation at run time
+; v 1.0 recode for use with SBC2
+; v 1.1 added block 1 masking (block 257 would be corrupted)
+
+		*= $fc00
+					;
+XModem		jsr   	prtMsg		; send prompt and info
+		lda   	#$01
+		sta	blkno		; set block # to 1
+		sta	bflag		; set flag to get address from block 1
+StartCrc	lda	#"C"		; "C" start with CRC mode
+		jsr	output		; send it
+		lda	#$FF	
+		sta	retry2		; set loop counter for ~3 sec delay
+		lda   	#$00
+                sta	crc
+		sta	crch		; init CRC value	
+		jsr	GetByte		; wait for input
+                bcs     GotByte         ; byte received, process it
+		bcc	StartCrc	; resend "C"
+
+StartBlk	lda	#$FF		; 
+		sta	retry2		; set loop counter for ~3 sec delay
+		lda   	#$00		;
+		sta	crc		;
+		sta	crch		; init CRC value	
+		jsr	GetByte		; get first byte of block
+		bcc	StartBlk	; timed out, keep waiting...
+GotByte         cmp     #ESC            ; quitting?
+                bne     GotByte3
+                brk
+GotByte3        cmp     #SOH            ; start of block?
+		beq	BegBlk		; yes
+		cmp	#":"		; Intel-Hex format - jump to its handler below
+		bne	GotByte1	; 
+		jmp	HexUpLd		; 
+GotByte1	cmp	#EOT		;
+		bne	BadCrc		; Not SOH, ":", EOT, so flush buffer & send NAK	
+		jmp	Done		; EOT - all done!
+BegBlk		ldx	#$00
+GetBlk		lda	#$ff		; 3 sec window to receive characters
+		sta 	retry2		;
+GetBlk1		jsr	GetByte		; get next character
+		bcc	BadCrc		; chr rcv error, flush and send NAK
+GetBlk2		sta	Rbuff,x		; good char, save it in the rcv buffer
+		inx			; inc buffer pointer	
+		cpx	#$84		; <01> <FE> <128 bytes> <CRCH> <CRCL>
+		bne	GetBlk		; get 132 characters
+		ldx	#$00		;
+		lda	Rbuff,x		; get block # from buffer
+		cmp	blkno		; compare to expected block #	
+		beq	GoodBlk1	; matched!
+		lda	#>MsgCrcBadBlkno
+		ldx	#<MsgCrcBadBlkno
+		jsr	PrintStrAX	; Unexpected block number - abort	
+		jsr	Flush		; mismatched - flush buffer and then do BRK
+		brk			; unexpected block # - fatal error
+GoodBlk1	eor	#$ff		; 1's comp of block #
+		inx			;
+		cmp	Rbuff,x		; compare with expected 1's comp of block #
+		beq	GoodBlk2 	; matched!
+		lda	#>MsgCrcBadBlkno
+		ldx	#<MsgCrcBadBlkno
+		jsr	PrintStrAX	; Unexpected block number - abort	
+		jsr 	Flush		; mismatched - flush buffer and then do BRK
+		brk			; bad 1's comp of block#	
+GoodBlk2	ldy	#$02		; 
+CalcCrc		lda	Rbuff,y		; calculate the CRC for the 128 bytes of data	
+		jsr	UpdCrc		; could inline sub here for speed
+		iny			;
+		cpy	#$82		; 128 bytes
+		bne	CalcCrc		;
+		lda	Rbuff,y		; get hi CRC from buffer
+		cmp	crch		; compare to calculated hi CRC
+		bne	BadCrc		; bad crc, send NAK
+		iny			;
+		lda	Rbuff,y		; get lo CRC from buffer
+		cmp	crc		; compare to calculated lo CRC
+		beq	GoodCrc		; good CRC
+BadCrc		jsr	Flush		; flush the input port
+		lda	#NAK		;
+		jsr	output		; send NAK to resend block
+		jmp	StartBlk	; start over, get the block again			
+GoodCrc		ldx	#$02		;
+		lda	blkno		; get the block number
+		cmp	#$01		; 1st block?
+		bne	CopyBlk		; no, copy all 128 bytes
+		lda	bflag		; is it really block 1, not block 257, 513 etc.
+		beq	CopyBlk		; no, copy all 128 bytes
+		lda	Rbuff,x		; get target address from 1st 2 bytes of blk 1
+		sta	ptr		; save lo address
+		inx			;
+		lda	Rbuff,x		; get hi address
+		sta	ptr+1		; save it
+		inx			; point to first byte of data
+		dec	bflag		; set the flag so we won't get another address		
+CopyBlk		ldy	#$00		; set offset to zero
+CopyBlk3	lda	Rbuff,x		; get data byte from buffer
+		sta	(ptr),y		; save to target
+		inc	ptr		; point to next address
+		bne	CopyBlk4	; did it step over page boundry?
+		inc	ptr+1		; adjust high address for page crossing
+CopyBlk4	inx			; point to next data byte
+		cpx	#$82		; is it the last byte
+		bne	CopyBlk3	; no, get the next one
+IncBlk		inc	blkno		; done.  Inc the block #
+		lda	#ACK		; send ACK
+		jsr	output
+		jmp	StartBlk	; get next block
+Done		lda	#ACK		; last block, send ACK and exit.
+		jsr	output
+		;
+		lda	#>MsgCrcDone
+		ldx	#<MsgCrcDone
+		jsr	PrintStrAX	;
+		rts			;
+;
+; subroutines
+;
+;					;
+GetByte		lda	#$00		; wait for chr input and cycle timing loop
+		sta	retry		; set low value of timing loop
+StartCrcLp	jsr	Scan_Input	; get chr from serial port, don't wait 
+		bcs	GetByte1	; got one, so exit
+		dec   	retry		; no character received, so dec counter
+		bne	StartCrcLp	;
+		dec	retry2		; dec hi byte of counter
+		bne	StartCrcLp	; look for character again
+		clc			; if loop times out, CLC, else SEC and return
+GetByte1	rts			; with character in "A"
+
+PrtMsg		ldx	#$00		; PRINT starting message
+PrtMsg1		lda   	Msg,x
+		beq	PrtMsg2
+		jsr   	output
+		inx
+                jmp     PrtMsg1
+PrtMsg2		rts
+Msg             .byte   "Begin XMODEM/CRC transfer."
+                .byte   CRN,LF
+                .byte   "Press <Esc> to abort... "
+                .byte   0
+;					;
+Flush		lda	#$70		; flush receive buffer
+		sta	retry2		; flush until empty for ~1 sec.
+Flush1		jsr	GetByte		; read the port
+		bcs	Flush
+		rts	
+;
+;  CRC subroutines
+;
+UpdCrc		eor 	crc+1 		; Quick CRC computation with lookup tables
+         	tax		 
+         	lda 	crc
+         	eor 	CRCHI,X
+         	sta 	crc+1
+         	lda 	CRCLO,X
+         	sta 	crc
+         	rts
+;
+;
+;****************************************************
+;
+; Intel-hex 6502 upload program
+; Ross Archer, 25 July 2002
+;
+; 
+HexUpLd 	lda     #CRN
+		jsr	output
+		lda	#LF
+		jsr	output
+		lda    	#0
+        	sta	dlfail          ;Start by assuming no D/L failure
+	  	beq	IHex		
+HdwRecs 	jsr     GetSer          ; Wait for start of record mark ':'
+        	cmp     #":"
+        	bne     HdwRecs         ; not found yet
+        	; Start of record marker has been found
+IHex    	jsr     GetHex          ; Get the record length
+        	sta     reclen          ; save it
+       	 	sta     chksum          ; and save first byte of checksum
+        	jsr     GetHex          ; Get the high part of start address
+        	sta     start_hi
+        	clc
+        	adc     chksum          ; Add in the checksum       
+        	sta     chksum          ; 
+        	jsr     GetHex          ; Get the low part of the start address
+        	sta     start_lo
+        	clc
+        	adc     chksum
+        	sta     chksum  
+        	jsr     GetHex          ; Get the record type
+        	sta     rectype         ; & save it
+        	clc
+        	adc     chksum
+        	sta     chksum   
+        	lda     rectype
+        	bne     HdEr1           ; end-of-record
+        	ldx     reclen          ; number of data bytes to write to memory
+        	ldy     #0              ; start offset at 0
+HdLp1   	jsr     GetHex          ; Get the first/next/last data byte
+        	sta     (start_lo),y    ; Save it to RAM
+        	clc
+        	adc     chksum
+        	sta     chksum          ; 
+        	iny                     ; update data pointer
+        	dex                     ; decrement count
+        	bne     HdLp1
+        	jsr     GetHex          ; get the checksum
+        	clc
+        	adc     chksum
+        	bne     HdDlF1          ; If failed, report it
+        	; Another successful record has been processed
+        	lda     #"#"            ; Character indicating record OK = '#'
+        	sta	UDR0            ; write it out but don't wait for output 
+        	jmp     HdwRecs         ; get next record     
+HdDlF1  	lda     #"F"            ; Character indicating record failure = 'F'
+        	sta     dlfail          ; upload failed if non-zero
+        	sta	UDR0            ; write it to transmit buffer register
+        	jmp     HdwRecs         ; wait for next record start
+HdEr1   	cmp     #1              ; Check for end-of-record type
+        	beq     HdEr2
+		lda	#>MsgUnknownRecType
+		ldx	#<MsgUnknownRecType
+                jsr     PrintStrAX      ; Warn user of unknown record type
+		lda     rectype         ; Get it
+        	sta     dlfail          ; non-zero --> upload has failed
+        	jsr     Print1Byte      ; print it
+		lda     #CRN		; but we'll let it finish so as not to 
+        	jsr     output		; falsely start a new d/l from existing 
+        	lda     #LF		; file that may still be coming in for 
+        	jsr     output          ; quite some time yet.
+		jmp	HdwRecs
+		; We've reached the end-of-record record
+HdEr2   	jsr     GetHex          ; get the checksum 
+        	clc
+        	adc     chksum          ; Add previous checksum accumulator value
+        	beq     HdEr3           ; checksum = 0 means we're OK!
+		lda	#>MsgBadRecChksum
+		ldx	#<MsgBadRecChksum
+                jmp     PrintStrAX
+HdEr3   	lda     dlfail
+        	beq     HdErOK
+        	;A upload failure has occurred
+		lda	#>MsgUploadFail
+		ldx	#<MsgUploadFail
+                jmp     PrintStrAX
+HdErOK  	lda	#>MsgUploadOK
+		ldx	#<MsgUploadOK
+                jsr     PrintStrAX
+		; Eat final characters so monitor doesn't cope with it
+	  	jsr     Flush		; flush the input buffer
+HdErNX  	rts
+;
+;  subroutines
+;
+                     
+GetSer  	jsr	scan_input	; get input from Serial Port	    
+                cmp     #ESC            ; check for abort 
+        	bne     GSerXit         ; return character if not
+                brk
+GSerXit 	rts
+
+GetHex  	lda     #$00
+	  	sta     temp
+        	jsr     GetNibl
+        	asl     a
+        	asl     a
+        	asl     a
+       	 	asl     a       	; This is the upper nibble
+        	sta     temp
+GetNibl 	jsr     GetSer
+					; Convert the ASCII nibble to numeric value from 0-F:
+	        cmp     #"9"+1  	; See if it's 0-9 or 'A'..'F' (no lowercase yet)
+       	 	bcc     MkNnh   	; If we borrowed, we lost the carry so 0..9
+        	sbc     #7+1    	; Subtract off extra 7 (sbc subtracts off one less)
+        	; If we fall through, carry is set unlike direct entry at MkNnh
+MkNnh   	sbc     #"0"-1  	; subtract off '0' (if carry clear coming in)
+        	and     #$0F    	; no upper nibble no matter what
+        	ora     temp
+        	rts             	; return with the nibble received
+
+
+
+;Print the string starting at (AX) until we encounter a NULL
+;string can be in RAM or ROM.  It's limited to <= 255 bytes.
+;
+PrintStrAX      sta     strptr+1
+		stx	strptr
+		tya
+		pha
+		ldy	#0
+PrintStrAXL1    lda     (strptr),y
+                beq     PrintStrAXX1      ; quit if NULL
+    		jsr	output
+		iny
+                bne     PrintStrAXL1      ; quit if > 255
+PrintStrAXX1    pla
+		tay
+		rts   
+; CRC messages
+MsgCrcBadBlkno  .byte	CRN,LF,CRN,LF
+		.byte  	"Unexpected block number received"
+ 		.byte	" Aborting"
+		.byte 	CRN,LF
+		.byte 	0
+MsgCrcDone	.byte 	CRN,LF
+                .byte   "XMODEM-CRC download is complete"
+		.byte 	0
+
+
+; Checksum messages
+;					
+MsgUnknownRecType  
+		.byte   CRN,LF,CRN,LF
+      		.byte   "Unknown record type $"
+		.byte	0		; null-terminate every string
+MsgBadRecChksum .byte   CRN,LF,CRN,LF
+                .byte   "Bad record checksum!"
+        	.byte   0		; Null-terminate  
+MsgUploadFail   .byte   CRN,LF,CRN,LF
+                .byte   "Upload Failed",CRN,LF
+                .byte   "Aborting!"
+                .byte   0               ; null-terminate every string or crash'n'burn
+MsgUploadOK	.byte   CRN,LF,CRN,LF
+                .byte   "Upload Successful!"
+        	.byte   0         	
+;  Fin.
+;
diff --git a/trunk/AVRProjects/AVR_6502/Daryl_1284p/readme.txt b/trunk/AVRProjects/AVR_6502/Daryl_1284p/readme.txt
new file mode 100644
index 00000000..6b55afb6
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/Daryl_1284p/readme.txt
@@ -0,0 +1,24 @@
+This package contains all of the files needed to 
+build an AVR65C02 Emulator.  You are free to use
+these files in your personal projects.  Any commercial 
+use is prohibited without expressed, written consent.
+
+The AVR program was compiled using AVR Studio V4.  The
+source files are in the AVRSource Folder.
+
+The default ROM image uses my SBC-2OS. The sources for
+that are included in the SBC2OS folder.  The SBC25.ROM
+file is the binary file you can load from the bootloader
+if the ROM image gets corrupted or damaged.
+
+The ATMega1284P datasheet is also include along with a
+simple instruction manual.  
+
+The AVR65C02.BIN file is the binary image of the 
+Emulator.  You can use it if the emulator image
+gets overwritten or corrupted.  Contact me for help
+in loading it if that happens.
+
+Enjoy!
+
+Daryl
diff --git a/trunk/AVRProjects/AVR_6502/Enhanced_6502_BASIC_reference_manual.pdf b/trunk/AVRProjects/AVR_6502/Enhanced_6502_BASIC_reference_manual.pdf
new file mode 100644
index 00000000..1907cbdf
Binary files /dev/null and b/trunk/AVRProjects/AVR_6502/Enhanced_6502_BASIC_reference_manual.pdf differ
diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/6502cpu.asm b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/6502cpu.asm
new file mode 100644
index 00000000..f636b587
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/6502cpu.asm
@@ -0,0 +1,794 @@
+;TODO, sort out overflow flag
+;DEBUG STUFF
+.equ ZP_offset = 0x00				;offset for Zero page, set to 0 for non debug
+.MACRO cp1
+
+;	clc
+
+	cp		@0,@1
+
+
+	brcs	PC+3				;invert carry
+	sec	
+	rjmp	PC+2	
+	clc
+
+	in		Pstat1,SREG			;save status bits
+
+.ENDMACRO
+
+.MACRO move_to_reg
+					
+	mov		r17,Pstat1			;TEST ME
+	tst		@0				;all this is need becase the Z and N flags get changed, but dont in a mov operation	
+								;add zero should test register
+	
+	in		r16,SREG
+
+	;N flag
+	sbrs	r16,2
+	cbr		r17,EXP2(Ns)
+	sbrc	r16,2
+	sbr		r17,EXP2(Ns)
+	;Z flag
+	sbrs	r16,1
+	cbr		r17,EXP2(Zs)
+	sbrc	r16,1
+	sbr		r17,EXP2(Zs)
+
+	mov		Pstat1,r17
+
+.ENDMACRO
+;-----------01-----------------------------------------------------------
+op_ORA:							;OR
+	rcall	get_value_01
+
+	out		SREG,Pstat1			;still need to do this to preserve carry
+	or		A,retL				;perform OR function
+	in		Pstat1,SREG			;save status bits
+	rjmp	next_op
+op_AND:							;AND
+	rcall	get_value_01
+
+	out		SREG,Pstat1	
+	and		A,retL
+	in		Pstat1,SREG			;save status bits
+	rjmp	next_op
+
+
+op_EOR:							;Exclusive or
+	rcall	get_value_01
+		
+	out		SREG,Pstat1	
+	eor		A,retL
+	in		Pstat1,SREG			;save status bits
+	rjmp	next_op
+op_ADC:							;ADD with carry
+	rcall	get_value_01
+	
+	out		SREG,Pstat1			;restor status reg for carry op
+
+	ldi		r17,1
+
+;	in		r16,SREG
+;	sbrc	r16,0
+;	add		A,r17
+
+	adc		A,retL
+
+	in		r16,SREG
+
+	
+
+	mov		Pstat1,r16			;save status bits
+
+	
+	mov		r17,Pstat2
+
+	;sort out O(V) flag
+	sbrs	r16,3
+	cbr		r17,EXP2(Os)
+	sbrc	r16,3
+	sbr		r17,EXP2(Os)
+
+	;sbr		r17,EXP2(Os)
+
+	mov		Pstat2,r17			;copy back
+
+	rjmp	next_op
+
+op_STA:							;Store A to mem
+	rcall	get_value_01		;Dont acctualy need to get that value, but called to work out address for write
+	mov		retL,A
+	st_cpuZ	A
+	rjmp	next_op
+
+op_LDA:							;Load A with mem
+	rcall	get_value_01
+	mov		A,retL
+
+	move_to_reg A
+
+
+	rjmp	next_op
+
+op_CMP:							;Compare A and mem
+	rcall	get_value_01
+	cp1		A,retL
+
+	rjmp	next_op
+op_SBC:							;Subtract A-M with carry
+	rcall	get_value_01
+	
+;	mov		r18,A			;TEST
+
+	out		SREG,Pstat1			;restor status reg for carry op
+
+	brcs	PC+3				;Strange subtraction as works on an inverted carry
+	sec	
+	rjmp	PC+2	
+	clc
+
+;	ldi		r17,1
+;---TEST
+;	in		r16,SREG
+;	sbrc	r16,0
+;	add		A,r17
+;	SUB		A,retL
+
+	SEZ							;needed because only clears Z if result <> 0!
+
+	sbc		A,retL
+
+	brcs	PC+3				;again..it inverts the carry???
+	sec	
+	rjmp	PC+2	
+	clc
+
+	in		Pstat1,SREG			;save status bits
+
+
+;	sbc		r18,retL
+
+	in		r16,SREG
+	
+	mov		r17,Pstat2
+
+	;sort out O(V) flag
+	sbrs	r16,3
+	cbr		r17,EXP2(Os)
+	sbrc	r16,3
+	sbr		r17,EXP2(Os)
+
+;	sbr		r17,EXP2(Os)
+
+
+	mov		Pstat2,r17			;copy back
+
+
+
+	rjmp	next_op
+
+;-----------10-----------------------------------------------------------
+op_ASL:								;Logcial shift left
+	rcall 	get_value_10
+	lsl		retL
+	in		Pstat1,SREG				;save status bits
+	st_cpuZ retL
+	rjmp	next_op
+
+
+op_ROL:								;Left shit with caryy
+	rcall 	get_value_10
+	out		SREG,Pstat1				;restor status reg for carry op
+	rol		retL
+	in		Pstat1,SREG				;save status bits
+	st_cpuZ retL
+	rjmp	next_op
+
+op_LSR:								;Logcial shift right
+	rcall 	get_value_10
+	lsr		retL
+	in		Pstat1,SREG				;save status bits
+	st_cpuZ retL
+	rjmp	next_op
+op_ROR:								;Right shit with caryy
+	rcall 	get_value_10
+	out		SREG,Pstat1				;restor status reg for carry op
+	ror		retL
+	in		Pstat1,SREG				;save status bits
+	st_cpuZ retL
+	rjmp	next_op
+
+op_STX:								;Store X to memory
+	rcall 	get_value_10
+	mov		retL,Xr
+	st_cpuZ retL
+	rjmp	next_op
+
+op_LDX:								;Load X with memory
+	rcall 	get_value_10
+	mov		Xr,retL
+
+	move_to_reg Xr
+	rjmp	next_op
+
+op_DEC:								;dec memory
+	rcall 	get_value_10
+	out		SREG,Pstat1	
+	dec		retL
+	in		Pstat1,SREG	
+	st_cpuZ retL
+	rjmp	next_op
+
+op_INC:
+	rcall 	get_value_10
+	out		SREG,Pstat1	
+	inc		retL
+	in		Pstat1,SREG	
+	st_cpuZ retL
+	rjmp	next_op
+;-----------00-----------------------------------------------------------
+;same as 10 but accum missing
+op_BIT:	;This instructions is used to test if one or more bits are set in a target memory location. 
+		;The mask pattern in A is ANDed with the value in memory to set or clear the zero flag, 
+		;but the result is not kept. Bits 7 and 6 of the value from memory are copied into the N and V flags.
+	rcall 	get_value_10
+	out		SREG,Pstat1	
+	mov		r16,A				;make copy
+	and		r16,retL			;perform AND
+	in		r16,SREG			;copy SREG for Z flag
+	
+	;sort out N flag
+	sbrs	retL,7
+	cbr		r16,EXP2(Ns)
+	sbrc	retL,7
+	sbr		r16,EXP2(Ns)
+
+	mov		Pstat1,r16			;copy back
+	mov		r16,Pstat2
+
+	;sort out O(V) flag
+	sbrs	retL,6
+	cbr		r16,EXP2(Os)
+	sbrc	retL,6
+	sbr		r16,EXP2(Os)
+
+	mov		Pstat2,r16			;copy back
+
+	rjmp	next_op
+
+op_JMP:									;Jump absolute
+	get_pc_mem r18
+	get_pc_mem r17
+	
+	mov		PL,r18
+	mov		PH,r17								
+	rjmp	next_op
+
+
+op_JMPI:								;Jump absolute indirect
+	get_pc_mem YL						;get indirect address
+	get_pc_mem YH
+	ld_cpuY		PL						;load PC with indriect value
+	inc			YL						;NOTE, not using Y+ because of CPU bug which does not carry the carry to high byte
+	ld_cpuY		PH
+	rjmp	next_op
+
+op_STY:									;Store Y to memory						
+	rcall 	get_value_10
+	mov		retL,Yr
+	st_cpuZ retL
+	rjmp	next_op
+op_LDY:
+	rcall 	get_value_10
+	mov		Yr,retL
+
+	move_to_reg Yr
+	rjmp	next_op
+op_CPY:									;Compare Y with memory
+	rcall	get_value_10
+	cp1		Yr,retL
+
+	rjmp	next_op
+op_CPX:									;Compare X with memory
+	rcall	get_value_10
+
+	cp1		Xr,retL
+
+	rjmp	next_op
+;--BRANCHES---
+
+op_BPL:									;Branch if Positive (N = 0)
+	mov		r16,Pstat1
+	sbrs	r16,Ns
+	rjmp	Branch_take
+	adiw	PL,1						;skip over address if no branch
+	rjmp	next_op
+			
+op_BMI:									;Branch if minus (N = 1)
+	mov		r16,Pstat1
+	sbrc	r16,Ns
+	rjmp	Branch_take
+	adiw	PL,1				;skip over address if no branch
+	rjmp	next_op
+op_BVC:							;Branch if (O = 0)
+	mov		r16,Pstat2
+	sbrs	r16,Os
+	rjmp	Branch_take
+	adiw	PL,1				;skip over address if no branch
+	rjmp	next_op
+
+op_BVS:							;Branch if (O = 1)
+	mov		r16,Pstat2
+	sbrc	r16,Os
+	rjmp	Branch_take
+	adiw	PL,1				;skip over address if no branch
+	rjmp	next_op
+op_BCC:							;Branch is Carry clear
+	mov		r16,Pstat1
+	sbrs	r16,Cs
+	rjmp	Branch_take
+	adiw	PL,1				;skip over address if no branch
+	rjmp	next_op
+op_BCS:
+	mov		r16,Pstat1
+	sbrc	r16,Cs
+	rjmp	Branch_take
+	adiw	PL,1				;skip over address if no branch
+	rjmp	next_op
+op_BNE:							;Branch is (Z=0)
+	mov		r16,Pstat1
+	sbrs	r16,Zs
+	rjmp	Branch_take
+	adiw	PL,1				;skip over address if no branch
+	rjmp	next_op
+op_BEQ:
+	mov		r16,Pstat1
+	sbrc	r16,Zs
+	rjmp	Branch_take
+	adiw	PL,1				;skip over address if no branch
+	rjmp	next_op
+
+op_BRK:
+	;TODO
+	ldi		r16,'B'
+	rcall	rs232_0_tx
+	nop
+	nop
+	rjmp	next_op
+op_JSRA:
+	get_pc_mem	r17				;get jump address
+	stack_push	PH				;push address to stack, done here because accutaly save PC-1
+	stack_push	PL
+	get_pc_mem 	r18 			;get high jump address
+	
+	mov		PL,r17
+	mov		PH,r18								
+	rjmp	next_op
+
+op_RTI:
+	stack_pop	retL
+	rcall	stack_decomp
+	stack_pop	PL
+	stack_pop	PH
+	nop	;TODO
+	nop
+	rjmp	next_op
+
+op_RTS:
+	stack_pop	PL				;get return address from stack
+	stack_pop	PH
+
+	adiw		PL,1			;add on to PC
+
+	rjmp	next_op
+
+
+;--------SPECIAL CASES and operations only on the accumulator---------
+op_ASL_A:							;logical shift left
+	lsl		A
+
+	in		Pstat1,SREG				;save status bits
+	rjmp	next_op
+
+op_ROL_A:							;shift left with carry
+	out		SREG,Pstat1				;restor status reg for carry op
+
+	rol		A
+
+	in		Pstat1,SREG				;save status bits
+	rjmp	next_op
+
+
+op_LSR_A:
+	lsr		A
+
+	in		Pstat1,SREG				;save status bits
+	rjmp	next_op
+op_ROR_A:
+	out		SREG,Pstat1				;restor status reg for carry op
+
+	ror		A
+
+	in		Pstat1,SREG				;save status bits
+	rjmp	next_op
+
+op_STX_ZPY:										;Store X to memory
+	rcall	get_value_ZP_idx_Y
+
+	mov		retL,Xr
+	st_cpuZ retL
+	rjmp	next_op
+
+op_LDX_ZPY:
+	rcall	get_value_ZP_idx_Y
+	mov		Xr,retL
+
+	move_to_reg Xr
+	rjmp	next_op
+
+op_LDX_XY:
+	rcall	get_value_ZP_abs_idx_Y
+	mov		Xr,retL
+
+	move_to_reg Xr
+	rjmp	next_op
+op_PHP:
+	rcall	stack_build
+	stack_push retL
+	rjmp	next_op
+
+op_PLP:
+	stack_pop	retL
+	rcall	stack_decomp
+	rjmp	next_op
+op_PHA:
+	stack_push A
+	rjmp	next_op
+op_PLA:
+	stack_pop A
+	move_to_reg A
+	rjmp	next_op
+op_DEY:
+	out		SREG,Pstat1				;restor SREG so carry isnt changed
+	dec		Yr						;perform dec
+	in		Pstat1,SREG				;save changed N and Z
+	rjmp	next_op
+
+op_TAY:								;Transfer A to Y
+
+	mov		Yr,A				;
+
+	move_to_reg Yr
+	rjmp	next_op
+
+op_INY:
+	out		SREG,Pstat1	
+	inc		Yr
+	in		Pstat1,SREG	
+	rjmp	next_op
+
+op_INX:
+	out		SREG,Pstat1	
+	inc		Xr
+	in		Pstat1,SREG	
+	rjmp	next_op
+
+op_CLC:
+	mov		r16,Pstat1
+	cbr		r16,EXP2(Cs)
+	mov		Pstat1,r16
+	rjmp	next_op
+op_SEC:
+	mov		r16,Pstat1
+	sbr		r16,EXP2(Cs)
+	mov		Pstat1,r16
+	rjmp	next_op
+op_CLI:
+	mov		r16,Pstat2
+	cbr		r16,EXP2(Is)
+	mov		Pstat2,r16
+	rjmp	next_op
+op_SEI:
+	mov		r16,Pstat2
+	sbr		r16,EXP2(Is)
+	mov		Pstat2,r16
+	rjmp	next_op
+op_TYA:							;Transfer Y to A
+	mov		A,Yr				;
+
+	move_to_reg A
+	rjmp	next_op
+op_CLV:
+	mov		r16,Pstat2
+	cbr		r16,EXP2(Os)
+	mov		Pstat2,r16
+	rjmp	next_op
+
+op_CLD:
+	mov		r16,Pstat2
+	cbr		r16,EXP2(Ds)
+	mov		Pstat2,r16
+	rjmp	next_op
+op_SED:
+	mov		r16,Pstat2
+	sbr		r16,EXP2(Ds)
+	mov		Pstat2,r16
+	rjmp	next_op
+op_TXA:							;TRans X to A
+	mov		A,Xr				;
+
+	move_to_reg A
+	rjmp	next_op
+op_TXS:							;transfer X to stack pointer
+	mov		stack,Xr
+	rjmp	next_op
+
+	
+op_TAX:							;Transfer A to X
+	mov		Xr,A				;
+
+	move_to_reg Xr
+	rjmp	next_op
+
+op_TSX:
+	mov		Xr,stack				;
+
+	move_to_reg Xr
+	rjmp	next_op
+
+op_DEX:
+	out		SREG,Pstat1				;restor SREG so carry isnt changed
+	dec		Xr						;perform dec
+	in		Pstat1,SREG				;save changed N and Z
+	rjmp	next_op
+op_NOP:								;nopys
+	nop
+	nop
+	rjmp	next_op
+;---------------------------
+;---------------------------
+;---------------------------
+get_value_01:						;MEMORY type decoder for xxxxxx01 opcodes
+	andi	retL,0b00111000			;retL still contains opcode, but lsl by one, get mask of memory access type
+									;should be a fatser way of doing this with jump tables
+									;for now, order with most frequently used at top
+
+	cpi		retL,0b00000000
+	breq	get_value_ZP_inx_X_indirj 	
+
+	cpi		retL,0b00001000
+	breq	get_value_ZPj
+
+	cpi		retL,0b00010000
+	breq	get_value_imedj
+
+	cpi		retL,0b00011000
+	breq	get_value_absj
+
+	cpi		retL,0b00100000
+	breq	get_value_ZP_indir_idx_Yj
+
+	cpi		retL,0b00101000
+	breq	get_value_ZP_idx_Xj
+
+
+	cpi		retL,0b00110000
+	breq	get_value_ZP_abs_idx_Yj
+
+	cpi		retL,0b00111000
+	breq	get_value_ZP_abs_idx_Xj
+;---------------------------------
+get_value_10:						;MEMORY type decoder for xxxxxx10 opcodes
+	andi	retL,0b00111000			
+								
+	cpi		retL,0b00000000
+	breq	get_value_imedj
+	
+	cpi		retL,0b00001000
+	breq	get_value_ZPj
+
+	cpi		retL,0b00010000
+	breq	get_value_accumj
+
+	cpi		retL,0b00011000
+	breq	get_value_absj
+
+	cpi		retL,0b00101000
+	breq	get_value_ZP_idx_Xj
+
+	cpi		retL,0b00111000
+	breq	get_value_ZP_abs_idx_Xj
+
+get_value_ZP_inx_X_indirj:
+	rjmp	get_value_ZP_inx_X_indir
+get_value_ZPj:
+	rjmp	get_value_ZP
+get_value_imedj:
+	rjmp	get_value_imed
+get_value_absj:
+	rjmp	get_value_abs
+get_value_ZP_indir_idx_Yj:
+	rjmp	get_value_ZP_indir_idx_Y
+get_value_ZP_idx_Xj:
+	rjmp	get_value_ZP_idx_X
+get_value_ZP_idx_Yj:
+	rjmp	get_value_ZP_idx_Y
+get_value_ZP_abs_idx_Yj:
+	rjmp	get_value_ZP_abs_idx_Y
+get_value_ZP_abs_idx_Xj:
+	rjmp	get_value_ZP_abs_idx_X
+get_value_accumj:
+	rjmp	get_value_accum
+
+;----------------------------
+get_value_ZP_inx_X_indir:			;Zero page index X, indirect
+
+	ldi		YH,ZP_offset					;Zero page, so high byte 0
+	get_pc_mem YL					;get next byte into YL
+	add		YL,Xr					
+	adc		YH,zero_reg
+
+	ld_cpuYp ZL						;now load Z with indrected address Y
+	ld_cpuY	 ZH
+
+	ld_cpuZ	retL					;load actual value!
+	ret
+
+
+get_value_ZP:						;Zero Page
+	
+	ldi		ZH,ZP_offset			;Zero page..
+	get_pc_mem ZL					;Get pos in ZP
+
+	ld_cpuZ	retL					;load value
+	ret
+
+
+get_value_imed:						;immediate mode
+	get_pc_mem retL
+	ret
+
+get_value_abs:						;get absolute (one byte)
+	get_pc_mem ZL
+	get_pc_mem ZH
+	
+	ld_cpuZ	retL
+	ret
+
+get_value_ZP_indir_idx_Y:			;Zero page indirect, indexed Y
+	ldi		YH,ZP_offset
+	get_pc_mem YL
+
+	ld_cpuYp ZL						;now load Z with indrected address Y
+	ld_cpuY	 ZH
+
+	add		ZL,Yr					;add Y reg for indexing
+	adc		ZH,zero_reg				;no wrap around on this one
+
+	ld_cpuZ	retL					;load value
+	ret
+
+get_value_ZP_idx_X:					;Zero page indexd X
+	ldi		ZH,ZP_offset
+	get_pc_mem ZL
+
+	add		ZL,Xr					;add index, 
+	adc		ZH,zero_reg
+
+	ld_cpuZ	retL					;get value
+	ret
+
+
+get_value_ZP_idx_Y:					;Zero page indexd Y (only used with LDX and STX)
+	ldi		ZH,ZP_offset
+	get_pc_mem ZL
+
+	add		ZL,Yr					;add index, with wrap around..humm TODO..?
+	adc		ZH,zero_reg
+
+	ld_cpuZ	retL					;get value
+	ret
+
+get_value_ZP_abs_idx_Y:				;absolute, indexd with Y
+	get_pc_mem ZL					;get absolut value
+	get_pc_mem ZH
+
+	add		ZL,Yr
+	adc		ZH,zero_reg
+	
+	ld_cpuZ	retL
+	ret
+	
+get_value_ZP_abs_idx_X:				;absolute, indexd with X
+	get_pc_mem ZL					;get absolut value
+	get_pc_mem ZH
+
+	add		ZL,Xr
+	adc		ZH,zero_reg
+	
+	ld_cpuZ	retL
+	ret
+
+get_value_accum:					;accumulator,	Should not use this, there should be special cases for A ops
+
+	mov		retL,A
+	ret
+
+
+
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+;Branch_take
+	
+;purpose: 	if a branch is sucessfull
+;Takes: 	
+;Give:		
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+
+
+Branch_take:
+	get_pc_mem r18					;get branch modifiyer
+
+	sbrc	r18,7					;gotta go signed 8 bit X 16 bit unsigned
+	ldi		r17,0xff				;todo FIX, DONT USE R16
+	sbrs	r18,7
+	ldi		r17,0
+	
+	add		PL,r18
+	adc		PH,r17
+	rjmp	next_op
+
+
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+;stack_build TODO: make a macro
+	
+;purpose: 	Here teh stack is stored as 2 bytes for speed, in order to store on the stack
+			;it must be built into one byte
+;Takes: 	
+;Give:		retL as built stack
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+stack_build:
+
+	mov		r16,Pstat1					;copy byte for bottom 3 bits (C,Z,N)
+	andi	r16,0b00000111				;clear top bits
+	mov		r17,Pstat2					
+	andi	r17,0b11111000
+	or		r16,r17
+	mov		retL,r16
+	ret
+
+
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+;stack_decomp TODO: make a macro
+	
+;purpose: 	reverse of stack_build
+			
+;Takes: 	retL 
+;Give:		
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+stack_decomp:
+	mov		Pstat1,retL
+	mov		Pstat2,retL
+
+	ret
+op_INVALID:
+	ldi		r16,'V'
+	rcall	rs232_0_tx
+	rjmp	next_op
+
+p:	rjmp p
+
+
+
+
+
+	
+
+
diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/GAME.asm b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/GAME.asm
new file mode 100644
index 00000000..af22e491
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/GAME.asm
@@ -0,0 +1,512 @@
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diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/LABLES.asm b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/LABLES.asm
new file mode 100644
index 00000000..2aa9d2a6
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/LABLES.asm
@@ -0,0 +1,192 @@
+op_ORA:
+nop
+nop
+op_AND:
+nop
+nop
+op_EOR:
+nop
+nop
+op_ADC:
+nop
+nop
+op_STA:
+nop
+nop
+op_LDA:
+nop
+nop
+op_CMP:
+nop
+nop
+op_SBC:
+nop
+nop
+op_ASL:
+nop
+nop
+op_ROL:
+nop
+nop
+op_LSR:
+nop
+nop
+op_ROR:
+nop
+nop
+op_STX:
+nop
+nop
+op_LDX:
+nop
+nop
+op_DEC:
+nop
+nop
+op_INC:
+nop
+nop
+op_BIT:
+nop
+nop
+op_JMP:
+nop
+nop
+op_JMPI:
+nop
+nop
+op_STY:
+nop
+nop
+op_LDY:
+nop
+nop
+op_CPY:
+nop
+nop
+op_CPX:
+nop
+nop
+op_BPL:
+nop
+nop
+op_BMI:
+nop
+nop
+op_BVC:
+nop
+nop
+op_BVS:
+nop
+nop
+op_BCC:
+nop
+nop
+op_BCS:
+nop
+nop
+op_BNE:
+nop
+nop
+op_BEQ:
+nop
+nop
+op_BRK:
+nop
+nop
+op_JSRA:
+nop
+nop
+op_RTI:
+nop
+nop
+op_RTS:
+nop
+nop
+op_ASL_A:
+nop
+nop
+op_ROL_A:
+nop
+nop
+op_LSR_A:
+nop
+nop
+op_ROR_A:
+nop
+nop
+op_STX_ZPY:
+nop
+nop
+op_LDX_ZPY:
+nop
+nop
+op_LDX_XY:
+nop
+nop
+op_PHP:
+nop
+nop
+op_PLP:
+nop
+nop
+op_PHA:
+nop
+nop
+op_PLA:
+nop
+nop
+op_DEY:
+nop
+nop
+op_TAY:
+nop
+nop
+op_INY:
+nop
+nop
+op_INX:
+nop
+nop
+op_CLC:
+nop
+nop
+op_SEC:
+nop
+nop
+op_CLI:
+nop
+nop
+op_SEI:
+nop
+nop
+op_TYA:
+nop
+nop
+op_CLV:
+nop
+nop
+op_CLD:
+nop
+nop
+op_SED:
+nop
+nop
+op_TXA:
+nop
+nop
+op_TXS:
+nop
+nop
+op_TAX:
+nop
+nop
+op_TSX:
+nop
+nop
+op_DEX:
+nop
+nop
+op_NOP:
+nop
+nop
diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/VIC20.aps b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/VIC20.aps
new file mode 100644
index 00000000..3f379185
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/VIC20.aps
@@ -0,0 +1 @@
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diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/VIC20.asm b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/VIC20.asm
new file mode 100644
index 00000000..b368d0db
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/VIC20.asm
@@ -0,0 +1,697 @@
+
+.include	"m128def.inc"
+
+;.equ DEBUG = 1
+
+
+
+
+
+
+;------------------------------------------------------
+
+
+;BIAS CONTROL
+.equ	bias_port 	= 	PORTG
+.equ	bias_ctrl 	= 	3
+.equ	bias_adj	=	4
+
+
+;LCD
+.equ	A0			=	7		
+.equ	WR			= 	5
+.equ	LCS			=	6
+.equ	RD			=	4
+.equ	LCD_RST		=	7 				; (port D)
+.equ	lcd_pins	= 	PORTE
+.equ	lcd_data	=	PORTB
+
+
+;constants
+.equ	chars_line	=	80				;characters per line on lcd (virtual screen)
+.equ	lines_screen=	25				;number of lines on screen
+
+.def	buff_head 	=	r9
+.def	buff_tail	=	r10
+.def	cus_x		=	r11
+.def	cus_y		= 	r12
+
+
+;SRAM VARIABLES
+.dseg
+.org 0x100
+
+serial_buff:	.BYTE 256				;buffers
+
+
+vram_text:		.BYTE chars_line*lines_screen	;one screen of text, should be in sync with display
+vram_address:	.BYTE 2					;16 bit address of current pos in vram, should be same as display cursor address
+
+
+;------EQU and DEF for Emulator---
+.equ	kernal_start = 0xE000
+.equ	basic_start = 0xC000
+.equ	char_start = 0x8000
+.equ	game_start 	= 0xA000
+
+.equ	Os = 6		;overflow bit
+.equ	Ds = 3		;Decimal
+.equ	Is = 7		;Interupt
+.equ	Bs = 4		;Break
+
+.equ	Cs = 0
+.equ	Zs = 1
+.equ	Ns = 2
+
+.def	stack	=	r15			;stack pointer
+.def	Pstat1 	=	r13			;the Processor status byte is split into 2 registers, this reg deals with C,Z,N
+.def	Pstat2 	=	r14			;..this one deals with Int,Dec, Break ,(and now O(V) bit)
+								;this is done so I can simply save the AVR Status Reg to r13 for speed, and use native branch instructions
+								;bit 0=O
+.def	A	=	r21	;accumulator
+.def	Xr	=	r22	;X reg
+.def	Yr	=	r23	;Y reg
+.def	PL 	=	r26	;XL
+.def	PH	=	r27	;XH
+.def	retL 	= 	r24
+.def	retH 	= 	r25
+.def	zero_reg= 	r3 ;always 0
+
+
+;DEBUG
+.def	breakL = r4
+.def	breakH = r5
+
+emu_status:		.BYTE 1				;various bits to run emulator
+				;0 = LCD refresh toggle (refreshes every other interupt (30fps)
+				;1 = Next instuction is do interupt
+
+;DEBUG
+last_I:			.BYTE 4				;last 4 executed instructions
+
+last_PC:		.BYTE 2				
+
+last_rsbyte:		.BYTE 1				;last rs232 byte recived
+	.include 	"macros.asm"
+.cseg
+.org	0x00
+	rjmp	start
+	;setup stack
+.org	0x1E
+	rjmp	timer0_cmp
+
+.org	0x0024		;received a rs232 
+	rjmp	rx_rs232_0
+
+start:
+    LDI 	R16, HIGH(RAMEND) 	;Upper byte
+    OUT 	SPH,R16 			;to stack pointer
+    LDI 	R16, LOW(RAMEND) 	;Lower byte
+    OUT 	SPL,R16 
+
+	
+
+k:
+	add		r16,r17
+
+;	rjmp	k
+;	rjmp	skip
+
+	
+
+
+
+	rcall	init_hardware
+
+	rcall	load_chars_lcd
+
+	rcall	load_kernal
+	rcall	load_basic
+	rcall	load_chars
+	rcall	load_game
+
+skip:
+
+
+	;---setup timer--
+	ldi		r16,7
+	out		TCCR0,r16
+	ldi		r16,2
+	out		TIMSK,r16
+
+;	sei
+
+
+
+
+	clr 	zero_reg
+	ldi		r16,0xff
+	mov		stack,r16
+	sts		last_rsbyte,r16
+	sts		emu_status,zero_reg
+	
+
+	ldi		ZL,0xFC
+	ldi		ZH,0xFF
+	ld		PL,Z+
+	ld		PH,Z
+
+
+
+;	ldi		PL,0x00
+;	ldi		PH,0x11	
+
+	ldi		r16,'G'
+;	rcall	rs232_0_tx
+	ldi		r16,'O'
+;	rcall	rs232_0_tx
+
+
+	lds		r16,0xffff
+;	rcall	rs232_0_tx
+
+	lds		r16,0xffff
+;	rcall	rs232_0_tx
+
+	lds		r16,0xe000
+;	rcall	rs232_0_tx
+
+	lds		r16,0xfffe
+;	rcall	rs232_0_tx
+
+	LDI		R17,0X40
+	CLR		ZH
+	ldi		ZL, 0xc5
+	st_cpuZ r17
+	ldi		ZL, 0xcB
+	st_cpuZ r17
+
+	in		r16,SREG
+	mov		Pstat1,r16
+next_op:
+
+
+	;rjmp	op_ADC
+	sei
+
+	clr		r16
+	lds		r16,emu_status						;check if Interupt
+	sbrc	r16,1
+	rcall	Interupt_IRQ
+	
+	ldi		ZL,low(opcode_jmps<<1)
+	ldi		ZH,high(opcode_jmps<<1)
+
+.IFDEF DEBUG
+	cp		PL,breakL
+	cpc		PH,breakH
+	breq	breakp
+	sts		last_PC,PL
+	sts		last_PC+1,PH
+.ENDIF
+
+
+
+
+breakpret:
+
+
+	get_pc_mem retL			;GET OPCODE
+
+
+.IFDEF DEBUG
+	lds		r16,last_I+2
+	sts		last_I+3,r16
+
+	lds		r16,last_I+1
+	sts		last_I+2,r16
+
+	lds		r16,last_I
+	sts		last_I+1,r16
+
+	sts		last_I,retL
+.ENDIF	
+
+	clr		r16	
+
+	lsl		retL			;mul opcde by 2 because jump table is 2 bytes per entry
+	adc		r16,zero_reg	;if carry, then save carry to r16
+
+
+	add		ZL,retL
+	adc		ZH,r16			;add carry from last add, also add any carry from lsl
+
+	lpm		YL,Z+			;have to use Z for both lpm and IJMP unfortunatly
+	lpm		YH,Z
+	
+	movw	ZL,YL			;copy value to ZL
+
+	cli
+	ijmp					;now jump to copcode subroutine
+
+breakp:
+	nop
+	nop
+	nop
+	rjmp	breakpret	
+
+;-------LOAD KERNAL INTO MEMORY------------
+load_kernal:
+	ldi		ZL,low(kernal_rom<<1)
+	ldi		ZH,high(kernal_rom<<1)
+	ldi		YL,low(kernal_start)
+	ldi		YH,high(kernal_start)
+	clr		r16
+load_kernal_loop1:
+		ldi		r17,32
+load_kernal_loop2:
+			lpm		r18,Z+
+			st		Y+,r18
+			dec		r17
+		brne	load_kernal_loop2
+		dec		r16
+	brne	load_kernal_loop1
+	ret
+;-------LOAD BASIC INTO MEMORY------------
+load_basic:
+	ldi		ZL,low(basic_rom<<1)
+	ldi		ZH,high(basic_rom<<1)
+	ldi		YL,low(basic_start)
+	ldi		YH,high(basic_start)
+	clr		r16
+load_basic_loop1:
+		ldi		r17,32
+load_basic_loop2:
+			lpm		r18,Z+
+			st		Y+,r18
+			dec		r17
+		brne	load_basic_loop2
+		dec		r16
+	brne	load_basic_loop1
+	ret
+;-------LOAD GAME INTO MEMORY------------
+load_game:
+	ldi		ZL,low(game_rom<<1)
+	ldi		ZH,high(game_rom<<1)
+	ldi		YL,low(game_start)
+	ldi		YH,high(game_start)
+	clr		r16
+load_game_loop1:
+		ldi		r17,32
+load_game_loop2:
+			lpm		r18,Z+
+			st		Y+,r18
+			dec		r17
+		brne	load_game_loop2
+		dec		r16
+	brne	load_game_loop1
+	ret
+
+;-------LOAD CHARACTER INTO MEMORY------------
+load_chars:
+	ldi		ZL,low(char_rom<<1)
+	ldi		ZH,high(char_rom<<1)
+	ldi		YL,low(char_start)
+	ldi		YH,high(char_start)
+	clr		r16
+load_char_loop1:
+		ldi		r17,16
+load_char_loop2:
+			lpm		r18,Z+
+			st		Y+,r18
+			dec		r17
+		brne	load_char_loop2
+		dec		r16
+	brne	load_char_loop1
+	ret
+
+
+
+;-------LOAD CHARACTER INTO LCD MEMORY------------
+
+load_chars_lcd:
+	ldi		ZL,low(char_rom<<1)
+	ldi		ZH,high(char_rom<<1)
+	ldi		YL,low(char_start)
+	ldi		YH,high(char_start)
+
+;--	set address to start of CGRAM
+	ldi		r17,1				;command
+	ldi		r16,0x46
+	rcall	lcd_send_data
+
+	clr		r17
+	
+	ldi		r16,0x00
+	rcall	lcd_send_data
+
+	ldi		r16,0xf0
+	rcall	lcd_send_data
+;--
+
+	ldi		r17,1				
+	ldi		r16,0x42			;send data to cgram
+	rcall	lcd_send_data
+
+	clr		r17
+
+	clr		r19
+load_chars_lcd_loop1:
+		ldi		r18,16
+load_chars_lcd_loop2:
+			lpm		r16,Z+
+			rcall	lcd_send_data
+
+		
+			dec		r18
+		brne	load_chars_lcd_loop2
+		dec		r19
+	brne	load_chars_lcd_loop1
+	ret
+
+;----------------------------------------------------------------------
+;lcd_refresh
+	
+;purpose: 	copies VRAM to LCD
+;Takes: 	na
+;Give:		na
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+
+lcd_refresh:
+	push	r0
+	push	r1
+	push	r16
+	push	r17
+	push	r18
+	push	r19
+	push	r20
+	push	ZL
+	push	ZH
+	
+	ldi		ZL,LOW(0x1000)
+	ldi		ZH,HIGH(0x1000)
+
+
+
+	ldi		r19,22
+	ldi		r20,23
+
+	clr		cus_y
+lcd_refresh_loop1:
+		clr		cus_x
+		rcall	cursor_address
+		rcall	lcd_set_cursor
+
+		ldi		r17,1						;setup to send data
+		ldi		r16,0x42
+		rcall	lcd_send_data
+
+		clr		r17
+lcd_refresh_loop2:
+			ld_cpuZp r18
+			mov		r16,r18
+			rcall	lcd_send_data
+			inc		cus_x
+			cp		cus_x,r19
+		brne	lcd_refresh_loop2
+		inc		cus_y
+
+	
+			
+		cp		cus_y,r20
+		brne	lcd_refresh_loop1
+
+
+	pop		ZH
+	pop		ZL
+	pop		r20
+	pop		r19
+	pop		r18
+	pop		r17
+	pop		r16
+	pop		r1
+	pop		r0
+
+
+	ret
+
+
+timer0_cmp:
+	push	r1

+	in		r1,SREG						;preserve main OS status reg.
+	push	r16
+	push	r17
+
+	lds		r16,emu_status
+
+	sbrs	r16,0						;toggle lcd bit
+	rjmp	PC + 3				
+	cbr		r16,1	
+	rjmp	PC+2	
+	sbr		r16,1
+
+	sbrs	r16,0
+	rcall	lcd_refresh
+
+	mov		r17,Pstat2					;check if interupts enabled
+
+	cbr		r16,2
+	sbrs	r17,Is						
+	sbr		r16,2						;if Interupt disable is 0, then set bit 1 in emu_status to next intruction is interupt
+
+	sts		emu_status,r16
+	
+	pop		r17
+	pop		r16
+	out		SREG,r1
+	pop		r1
+	reti	
+
+
+
+rx_rs232_0:
+	push	r1

+	in		r1,SREG						;preserve main OS status reg.

+	
+	push	r16
+	push	r17
+	push	ZL
+	push	ZH

+	

+

+	

+	in		r17,UDR0					;get the incomming char
+
+;	sts		last_rsbyte,r17
+
+	ldi		ZL,low(0x277)
+	ldi		ZH,high(0x277)
+	st_cpuZ r17
+
+	ldi		r17,1
+	ldi		ZL,low(0xc6)
+	ldi		ZH,high(0xc6)
+	st_cpuZ r17
+
+
+
+;	mov		r16,PL
+;	rcall	rs232_0_tx
+;	mov		r16,PH
+;	rcall	rs232_0_tx

+
+qwe:
+	pop		ZH
+	pop		ZL
+	pop		r17

+	pop		r16

+	out		SREG,r1							;restore previous status reg

+	pop		r1

+	reti	
+								;return to normal pgm status.
+rs232_0_tx:
+		sbis	UCSR0A,UDRE0
+	rjmp	rs232_0_tx
+
+	out		UDR0,r16
+	rcall	delay_1ms
+	ret
+
+
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+;Interupt_IRQ
+	
+;purpose: 	called when IRQ
+;Takes: 	na
+;Give:		na
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+
+Interupt_IRQ:
+	stack_push	PH
+	stack_push	PL
+	rcall	stack_build
+	stack_push	retL
+
+	mov		r16,Pstat2					;clear interupt so cant do interupt in interupt
+	sbr		r16,EXP2(Is)
+	mov		Pstat2,r16
+
+
+	lds		r16,emu_status
+	cbr		r16,2
+	sts		emu_status,r16
+
+
+	ldi		YL,low(0xFFFE)
+	ldi		YH,high(0xFFFE)
+	ld		PL,Y+
+	ld		PH,Y
+
+	ret
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+;vias_access
+	
+;purpose: 	called when a read to the vias has occurded (from Z)
+;Takes: 	Z
+;Give:		retL is result
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+
+vias_access:
+	push	r17
+	push	r18
+	push	r19
+	
+
+
+	cpi		ZL,0x21						;keyboard scan being read
+	breq	keyboard_read
+
+
+	ld		retL,Z	
+
+vias_access_exit:
+	pop		r19
+	pop		r18
+	pop		r17
+	ret
+
+
+keyboard_read:
+	ldi		retL,0xff
+
+	lds		r17,last_rsbyte				;should be 0-63	
+
+	cpi		r17,255
+	breq	vias_access_exit
+
+	mov		r18,r17
+	lsr		r18							;divide by 8 to get  which column
+	lsr		r18
+	lsr		r18
+
+	lds		r19,0x9120					;read column byte
+
+keyboard_read_loop1:
+	tst		r18							;test if 18(prob dont need)
+	breq	keyboard_read_loop1_exit
+	lsr		r19							;shift right, so column to check is at 0
+	dec		r18
+	rjmp	keyboard_read_loop1
+
+keyboard_read_loop1_exit:
+	sbrs	r19,0						;test if key column is 0
+	rjmp	keyboard_read_set_row		;so set appropriate row
+	
+;	ldi		retL,0xff					; if here, then a colum with no key is pressed
+	rjmp	vias_access_exit		
+
+	
+	
+keyboard_read_set_row:
+	andi	r17,0b00000111				;get lower 3 bits
+	ldi		retL,0xFE						;set bit 0
+
+keyboard_read_loop2:
+	tst		r17							
+	breq	keyboard_read_loop2_exit
+	sec
+	rol		retL
+	dec		r17
+	rjmp	keyboard_read_loop2
+
+keyboard_read_loop2_exit:
+	rjmp	vias_access_exit
+
+
+;-------------------------------
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+;delay_1ms
+	
+;purpose: 	delays 1ms
+;Takes: 	na
+;Give:		na
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+
+delay_1ms:						
+	push	r19
+	push	r18
+
+	ldi		r18,20
+delay_1ms1:
+	ldi		r19,133
+delay_1ms1_loop:
+			dec		r19
+			nop
+			nop
+			nop
+		brne	delay_1ms1_loop
+		dec		r18
+	brne	delay_1ms1
+
+	pop		r18
+	pop		r19
+	ret
+
+delay_100ms:
+	push	r18
+	ldi		r18,100
+delay_100ms_loop:
+		rcall	delay_1ms
+		dec		r18
+	brne	delay_100ms_loop
+	pop		r18
+	ret
+
+
+.include "6502cpu.asm"
+.include "io.asm"
+.include "init.asm"
+
+.CSEG
+;.org 0x7000
+opcode_jmps:
+.include "dbops.asm"
+kernal_rom:
+.include "kernal.asm"
+basic_rom:
+.include "basic.asm"
+char_rom:
+.include "chars.asm"
+game_rom:
+.include "game.asm"
+
+
+
+
+
+
+
+
+
diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/avrBuild.bat b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/avrBuild.bat
new file mode 100644
index 00000000..555e1b01
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/avrBuild.bat
@@ -0,0 +1 @@
+avrasm2 -fI -W+ie -C V2E VIC20.asm -o vic20.hex -d vic20.obj -e vic20.eep -w -m vic20.map -S labels.tmp -l vic20.lst
diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/avrBuild.bat.old b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/avrBuild.bat.old
new file mode 100644
index 00000000..8a30e9b3
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/avrBuild.bat.old
@@ -0,0 +1,5 @@
+cd "E:\Emiles\Projects\vic emu\AVRCODE\"
+E:
+del "E:\Emiles\Projects\vic emu\AVRCODE\vic20.map"
+del "E:\Emiles\Projects\vic emu\AVRCODE\vic20.lst"
+"I:\cad\AVR Studio 4.09\AvrAssembler\avrasm32.exe" -fI "E:\Emiles\Projects\vic emu\AVRCODE\VIC20.asm" -o "E:\Emiles\Projects\vic emu\AVRCODE\vic20.hex" -d "E:\Emiles\Projects\vic emu\AVRCODE\vic20.obj" -e "E:\Emiles\Projects\vic emu\AVRCODE\vic20.eep" -I "E:\Emiles\Projects\vic emu\AVRCODE" -I "I:\cad\AVR Tools\AvrAssembler\Appnotes" -w  -m "E:\Emiles\Projects\vic emu\AVRCODE\vic20.map"
diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/basic.asm b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/basic.asm
new file mode 100644
index 00000000..8f30f12b
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/basic.asm
@@ -0,0 +1,512 @@
+.DB 120,227,103,228,67,66,77,66,65,83,73,67,48,200,65,199
+.DB 29,205,247,200,164,203,190,203,128,208,5,204,164,201,159,200
+.DB 112,200,39,201,28,200,130,200,209,200,58,201,46,200,74,201
+.DB 44,216,100,225,82,225,97,225,178,211,35,216,127,202,159,202
+.DB 86,200,155,198,93,198,133,202,38,225,186,225,195,225,122,203
+.DB 65,198,57,220,204,220,88,220,0,0,125,211,158,211,113,223
+.DB 148,224,234,217,237,223,97,226,104,226,177,226,11,227,13,216
+.DB 124,215,101,212,173,215,139,215,236,214,0,215,44,215,55,215
+.DB 121,105,216,121,82,216,123,42,218,123,17,219,127,122,223,80
+.DB 232,207,70,229,207,125,179,223,90,211,206,100,21,208,69,78
+.DB 196,70,79,210,78,69,88,212,68,65,84,193,73,78,80,85
+.DB 84,163,73,78,80,85,212,68,73,205,82,69,65,196,76,69
+.DB 212,71,79,84,207,82,85,206,73,198,82,69,83,84,79,82
+.DB 197,71,79,83,85,194,82,69,84,85,82,206,82,69,205,83
+.DB 84,79,208,79,206,87,65,73,212,76,79,65,196,83,65,86
+.DB 197,86,69,82,73,70,217,68,69,198,80,79,75,197,80,82
+.DB 73,78,84,163,80,82,73,78,212,67,79,78,212,76,73,83
+.DB 212,67,76,210,67,77,196,83,89,211,79,80,69,206,67,76
+.DB 79,83,197,71,69,212,78,69,215,84,65,66,168,84,207,70
+.DB 206,83,80,67,168,84,72,69,206,78,79,212,83,84,69,208
+.DB 171,173,170,175,222,65,78,196,79,210,190,189,188,83,71,206
+.DB 73,78,212,65,66,211,85,83,210,70,82,197,80,79,211,83
+.DB 81,210,82,78,196,76,79,199,69,88,208,67,79,211,83,73
+.DB 206,84,65,206,65,84,206,80,69,69,203,76,69,206,83,84
+.DB 82,164,86,65,204,65,83,195,67,72,82,164,76,69,70,84
+.DB 164,82,73,71,72,84,164,77,73,68,164,71,207,0,84,79
+.DB 79,32,77,65,78,89,32,70,73,76,69,211,70,73,76,69
+.DB 32,79,80,69,206,70,73,76,69,32,78,79,84,32,79,80
+.DB 69,206,70,73,76,69,32,78,79,84,32,70,79,85,78,196
+.DB 68,69,86,73,67,69,32,78,79,84,32,80,82,69,83,69
+.DB 78,212,78,79,84,32,73,78,80,85,84,32,70,73,76,197
+.DB 78,79,84,32,79,85,84,80,85,84,32,70,73,76,197,77
+.DB 73,83,83,73,78,71,32,70,73,76,69,32,78,65,77,197
+.DB 73,76,76,69,71,65,76,32,68,69,86,73,67,69,32,78
+.DB 85,77,66,69,210,78,69,88,84,32,87,73,84,72,79,85
+.DB 84,32,70,79,210,83,89,78,84,65,216,82,69,84,85,82
+.DB 78,32,87,73,84,72,79,85,84,32,71,79,83,85,194,79
+.DB 85,84,32,79,70,32,68,65,84,193,73,76,76,69,71,65
+.DB 76,32,81,85,65,78,84,73,84,217,79,86,69,82,70,76
+.DB 79,215,79,85,84,32,79,70,32,77,69,77,79,82,217,85
+.DB 78,68,69,70,39,68,32,83,84,65,84,69,77,69,78,212
+.DB 66,65,68,32,83,85,66,83,67,82,73,80,212,82,69,68
+.DB 73,77,39,68,32,65,82,82,65,217,68,73,86,73,83,73
+.DB 79,78,32,66,89,32,90,69,82,207,73,76,76,69,71,65
+.DB 76,32,68,73,82,69,67,212,84,89,80,69,32,77,73,83
+.DB 77,65,84,67,200,83,84,82,73,78,71,32,84,79,79,32
+.DB 76,79,78,199,70,73,76,69,32,68,65,84,193,70,79,82
+.DB 77,85,76,65,32,84,79,79,32,67,79,77,80,76,69,216
+.DB 67,65,78,39,84,32,67,79,78,84,73,78,85,197,85,78
+.DB 68,69,70,39,68,32,70,85,78,67,84,73,79,206,86,69
+.DB 82,73,70,217,76,79,65,196,158,193,172,193,181,193,194,193
+.DB 208,193,226,193,240,193,255,193,16,194,37,194,53,194,59,194
+.DB 79,194,90,194,106,194,114,194,127,194,144,194,157,194,170,194
+.DB 186,194,200,194,213,194,228,194,237,194,0,195,14,195,30,195
+.DB 36,195,131,195,13,79,75,13,0,13,32,69,82,82,79,82
+.DB 0,32,73,78,32,0,13,10,82,69,65,68,89,46,13,10
+.DB 0,13,10,66,82,69,65,75,0,160,186,232,232,232,232,189
+.DB 1,1,201,129,208,33,165,74,208,10,189,2,1,133,73,189
+.DB 3,1,133,74,221,3,1,208,7,165,73,221,2,1,240,7
+.DB 138,24,105,18,170,208,216,96,32,8,196,133,49,132,50,56
+.DB 165,90,229,95,133,34,168,165,91,229,96,170,232,152,240,35
+.DB 165,90,56,229,34,133,90,176,3,198,91,56,165,88,229,34
+.DB 133,88,176,8,198,89,144,4,177,90,145,88,136,208,249,177
+.DB 90,145,88,198,91,198,89,202,208,242,96,10,105,62,176,53
+.DB 133,34,186,228,34,144,46,96,196,52,144,40,208,4,197,51
+.DB 144,34,72,162,9,152,72,181,87,202,16,250,32,38,213,162
+.DB 247,104,149,97,232,48,250,104,168,104,196,52,144,6,208,5
+.DB 197,51,176,1,96,162,16,108,0,3,138,10,170,189,38,195
+.DB 133,34,189,39,195,133,35,32,204,255,169,0,133,19,32,215
+.DB 202,32,69,203,160,0,177,34,72,41,127,32,71,203,200,104
+.DB 16,244,32,122,198,169,105,160,195,32,30,203,164,58,200,240
+.DB 3,32,194,221,169,118,160,195,32,30,203,169,128,32,144,255
+.DB 108,2,3,32,96,197,134,122,132,123,32,115,0,170,240,240
+.DB 162,255,134,58,144,6,32,121,197,76,225,199,32,107,201,32
+.DB 121,197,132,11,32,19,198,144,68,160,1,177,95,133,35,165
+.DB 45,133,34,165,96,133,37,165,95,136,241,95,24,101,45,133
+.DB 45,133,36,165,46,105,255,133,46,229,96,170,56,165,95,229
+.DB 45,168,176,3,232,198,37,24,101,34,144,3,198,35,24,177
+.DB 34,145,36,200,208,249,230,35,230,37,202,208,242,32,89,198
+.DB 32,51,197,173,0,2,240,136,24,165,45,133,90,101,11,133
+.DB 88,164,46,132,91,144,1,200,132,89,32,184,195,165,20,164
+.DB 21,141,254,1,140,255,1,165,49,164,50,133,45,132,46,164
+.DB 11,136,185,252,1,145,95,136,16,248,32,89,198,32,51,197
+.DB 76,128,196,165,43,164,44,133,34,132,35,24,160,1,177,34
+.DB 240,29,160,4,200,177,34,208,251,200,152,101,34,170,160,0
+.DB 145,34,165,35,105,0,200,145,34,134,34,133,35,144,221,96
+.DB 162,0,32,15,225,201,13,240,13,157,0,2,232,224,89,144
+.DB 241,162,23,76,55,196,76,202,202,108,4,3,166,122,160,4
+.DB 132,15,189,0,2,16,7,201,255,240,62,232,208,244,201,32
+.DB 240,55,133,8,201,34,240,86,36,15,112,45,201,63,208,4
+.DB 169,153,208,37,201,48,144,4,201,60,144,29,132,113,160,0
+.DB 132,11,136,134,122,202,200,232,189,0,2,56,249,158,192,240
+.DB 245,201,128,208,48,5,11,164,113,232,200,153,251,1,185,251
+.DB 1,240,54,56,233,58,240,4,201,73,208,2,133,15,56,233
+.DB 85,208,159,133,8,189,0,2,240,223,197,8,240,219,200,153
+.DB 251,1,232,208,240,166,122,230,11,200,185,157,192,16,250,185
+.DB 158,192,208,180,189,0,2,16,190,153,253,1,198,123,169,255
+.DB 133,122,96,165,43,166,44,160,1,133,95,134,96,177,95,240
+.DB 31,200,200,165,21,209,95,144,24,240,3,136,208,9,165,20
+.DB 136,209,95,144,12,240,10,136,177,95,170,136,177,95,176,215
+.DB 24,96,208,253,169,0,168,145,43,200,145,43,165,43,24,105
+.DB 2,133,45,165,44,105,0,133,46,32,142,198,169,0,208,45
+.DB 32,231,255,165,55,164,56,133,51,132,52,165,45,164,46,133
+.DB 47,132,48,133,49,132,50,32,29,200,162,25,134,22,104,168
+.DB 104,162,250,154,72,152,72,169,0,133,62,133,16,96,24,165
+.DB 43,105,255,133,122,165,44,105,255,133,123,96,144,6,240,4
+.DB 201,171,208,233,32,107,201,32,19,198,32,121,0,240,12,201
+.DB 171,208,142,32,115,0,32,107,201,208,134,104,104,165,20,5
+.DB 21,208,6,169,255,133,20,133,21,160,1,132,15,177,95,240
+.DB 67,32,44,200,32,215,202,200,177,95,170,200,177,95,197,21
+.DB 208,4,228,20,240,2,176,44,132,73,32,205,221,169,32,164
+.DB 73,41,127,32,71,203,201,34,208,6,165,15,73,255,133,15
+.DB 200,240,17,177,95,208,16,168,177,95,170,200,177,95,134,95
+.DB 133,96,208,181,76,116,196,108,6,3,16,215,201,255,240,211
+.DB 36,15,48,207,56,233,127,170,132,73,160,255,202,240,8,200
+.DB 185,158,192,16,250,48,245,200,185,158,192,48,178,32,71,203
+.DB 208,245,169,128,133,16,32,165,201,32,138,195,208,5,138,105
+.DB 15,170,154,104,104,169,9,32,251,195,32,6,201,24,152,101
+.DB 122,72,165,123,105,0,72,165,58,72,165,57,72,169,164,32
+.DB 255,206,32,141,205,32,138,205,165,102,9,127,37,98,133,98
+.DB 169,139,160,199,133,34,132,35,76,67,206,169,188,160,217,32
+.DB 162,219,32,121,0,201,169,208,6,32,115,0,32,138,205,32
+.DB 43,220,32,56,206,165,74,72,165,73,72,169,129,72,32,44
+.DB 200,165,122,164,123,192,2,234,240,4,133,61,132,62,160,0
+.DB 177,122,208,67,160,2,177,122,24,208,3,76,75,200,200,177
+.DB 122,133,57,200,177,122,133,58,152,101,122,133,122,144,2,230
+.DB 123,108,8,3,32,115,0,32,237,199,76,174,199,240,60,233
+.DB 128,144,17,201,35,176,23,10,168,185,13,192,72,185,12,192
+.DB 72,76,115,0,76,165,201,201,58,240,214,76,8,207,201,75
+.DB 208,249,32,115,0,169,164,32,255,206,76,160,200,56,165,43
+.DB 233,1,164,44,176,1,136,133,65,132,66,96,32,225,255,176
+.DB 1,24,208,60,165,122,164,123,166,58,232,240,12,133,61,132
+.DB 62,165,57,164,58,133,59,132,60,104,104,169,129,160,195,144
+.DB 3,76,105,196,76,116,196,208,23,162,26,164,62,208,3,76
+.DB 55,196,165,61,133,122,132,123,165,59,164,60,133,57,132,58
+.DB 96,8,169,0,32,144,255,40,208,3,76,89,198,32,96,198
+.DB 76,151,200,169,3,32,251,195,165,123,72,165,122,72,165,58
+.DB 72,165,57,72,169,141,72,32,121,0,32,160,200,76,174,199
+.DB 32,107,201,32,9,201,56,165,57,229,20,165,58,229,21,176
+.DB 11,152,56,101,122,166,123,144,7,232,176,4,165,43,166,44
+.DB 32,23,198,144,30,165,95,233,1,133,122,165,96,233,0,133
+.DB 123,96,208,253,169,255,133,74,32,138,195,154,201,141,240,11
+.DB 162,12,44,162,17,76,55,196,76,8,207,104,104,133,57,104
+.DB 133,58,104,133,122,104,133,123,32,6,201,152,24,101,122,133
+.DB 122,144,2,230,123,96,162,58,44,162,0,134,7,160,0,132
+.DB 8,165,8,166,7,133,7,134,8,177,122,240,232,197,8,240
+.DB 228,200,201,34,208,243,240,233,32,158,205,32,121,0,201,137
+.DB 240,5,169,167,32,255,206,165,97,208,5,32,9,201,240,187
+.DB 32,121,0,176,3,76,160,200,76,237,199,32,158,215,72,201
+.DB 141,240,4,201,137,208,145,198,101,208,4,104,76,239,199,32
+.DB 115,0,32,107,201,201,44,240,238,104,96,162,0,134,20,134
+.DB 21,176,247,233,47,133,7,165,21,133,34,201,25,176,212,165
+.DB 20,10,38,34,10,38,34,101,20,133,20,165,34,101,21,133
+.DB 21,6,20,38,21,165,20,101,7,133,20,144,2,230,21,32
+.DB 115,0,76,113,201,32,139,208,133,73,132,74,169,178,32,255
+.DB 206,165,14,72,165,13,72,32,158,205,104,42,32,144,205,208
+.DB 24,104,16,18,32,27,220,32,191,209,160,0,165,100,145,73
+.DB 200,165,101,145,73,96,76,208,219,104,164,74,192,223,208,76
+.DB 32,166,214,201,6,208,61,160,0,132,97,132,102,132,113,32
+.DB 29,202,32,226,218,230,113,164,113,32,29,202,32,12,220,170
+.DB 240,5,232,138,32,237,218,164,113,200,192,6,208,223,32,226
+.DB 218,32,155,220,166,100,164,99,165,101,76,219,255,177,34,32
+.DB 128,0,144,3,76,72,210,233,47,76,126,221,160,2,177,100
+.DB 197,52,144,23,208,7,136,177,100,197,51,144,14,164,101,196
+.DB 46,144,8,208,13,165,100,197,45,176,7,165,100,164,101,76
+.DB 104,202,160,0,177,100,32,117,212,165,80,164,81,133,111,132
+.DB 112,32,122,214,169,97,160,0,133,80,132,81,32,219,214,160
+.DB 0,177,80,145,73,200,177,80,145,73,200,177,80,145,73,96
+.DB 32,134,202,76,181,203,32,158,215,240,5,169,44,32,255,206
+.DB 8,134,19,32,21,225,40,76,160,202,32,33,203,32,121,0
+.DB 240,53,240,67,201,163,240,80,201,166,24,240,75,201,44,240
+.DB 55,201,59,240,94,32,158,205,36,13,48,222,32,221,221,32
+.DB 135,212,32,33,203,32,59,203,208,211,169,0,157,0,2,162
+.DB 255,160,1,165,19,208,16,169,13,32,71,203,36,19,16,5
+.DB 169,10,32,71,203,73,255,96,56,32,240,255,152,56,233,11
+.DB 176,252,73,255,105,1,208,22,8,56,32,240,255,132,9,32
+.DB 155,215,201,41,208,89,40,144,6,138,229,9,144,5,170,232
+.DB 202,208,6,32,115,0,76,162,202,32,59,203,208,242,32,135
+.DB 212,32,166,214,170,160,0,232,202,240,188,177,34,32,71,203
+.DB 200,201,13,208,243,32,229,202,76,40,203,165,19,240,3,169
+.DB 32,44,169,29,44,169,63,32,9,225,41,255,96,165,17,240
+.DB 17,48,4,160,255,208,4,165,63,164,64,133,57,132,58,76
+.DB 8,207,165,19,240,5,162,24,76,55,196,169,12,160,205,32
+.DB 30,203,165,61,164,62,133,122,132,123,96,32,166,211,201,35
+.DB 208,16,32,115,0,32,158,215,169,44,32,255,206,134,19,32
+.DB 27,225,162,1,160,2,169,0,141,1,2,169,64,32,15,204
+.DB 166,19,208,19,96,32,158,215,169,44,32,255,206,134,19,32
+.DB 27,225,32,206,203,165,19,32,204,255,162,0,134,19,96,201
+.DB 34,208,11,32,189,206,169,59,32,255,206,32,33,203,32,166
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+.DB 89,218,165,101,32,89,218,165,100,32,89,218,165,99,32,89
+.DB 218,165,98,32,94,218,76,143,219,208,3,76,131,217,74,9
+.DB 128,168,144,25,24,165,41,101,109,133,41,165,40,101,108,133
+.DB 40,165,39,101,107,133,39,165,38,101,106,133,38,102,38,102
+.DB 39,102,40,102,41,102,112,152,74,208,214,96,133,34,132,35
+.DB 160,4,177,34,133,109,136,177,34,133,108,136,177,34,133,107
+.DB 136,177,34,133,110,69,102,133,111,165,110,9,128,133,106,136
+.DB 177,34,133,105,165,97,96,165,105,240,31,24,101,97,144,4
+.DB 48,29,24,44,16,20,105,128,133,97,208,3,76,251,216,165
+.DB 111,133,102,96,165,102,73,255,48,5,104,104,76,247,216,76
+.DB 126,217,32,12,220,170,240,16,24,105,2,176,242,162,0,134
+.DB 111,32,119,216,230,97,240,231,96,132,32,0,0,0,32,12
+.DB 220,169,249,160,218,162,0,134,111,32,162,219,76,18,219,32
+.DB 140,218,240,118,32,27,220,169,0,56,229,97,133,97,32,183
+.DB 218,230,97,240,186,162,252,169,1,164,106,196,98,208,16,164
+.DB 107,196,99,208,10,164,108,196,100,208,4,164,109,196,101,8
+.DB 42,144,9,232,149,41,240,50,16,52,169,1,40,176,14,6
+.DB 109,38,108,38,107,38,106,176,230,48,206,16,226,168,165,109
+.DB 229,101,133,109,165,108,229,100,133,108,165,107,229,99,133,107
+.DB 165,106,229,98,133,106,152,76,79,219,169,64,208,206,10,10
+.DB 10,10,10,10,133,112,40,76,143,219,162,20,76,55,196,165
+.DB 38,133,98,165,39,133,99,165,40,133,100,165,41,133,101,76
+.DB 215,216,133,34,132,35,160,4,177,34,133,101,136,177,34,133
+.DB 100,136,177,34,133,99,136,177,34,133,102,9,128,133,98,136
+.DB 177,34,133,97,132,112,96,162,92,44,162,87,160,0,240,4
+.DB 166,73,164,74,32,27,220,134,34,132,35,160,4,165,101,145
+.DB 34,136,165,100,145,34,136,165,99,145,34,136,165,102,9,127
+.DB 37,98,145,34,136,165,97,145,34,132,112,96,165,110,133,102
+.DB 162,5,181,104,149,96,202,208,249,134,112,96,32,27,220,162
+.DB 6,181,96,149,104,202,208,249,134,112,96,165,97,240,251,6
+.DB 112,144,247,32,111,217,208,242,76,56,217,165,97,240,9,165
+.DB 102,42,169,255,176,2,169,1,96,32,43,220,133,98,169,0
+.DB 133,99,162,136,165,98,73,255,42,169,0,133,101,133,100,134
+.DB 97,133,112,133,102,76,210,216,70,102,96,133,36,132,37,160
+.DB 0,177,36,200,170,240,196,177,36,69,102,48,194,228,97,208
+.DB 33,177,36,9,128,197,98,208,25,200,177,36,197,99,208,18
+.DB 200,177,36,197,100,208,11,200,169,127,197,112,177,36,229,101
+.DB 240,40,165,102,144,2,73,255,76,49,220,165,97,240,74,56
+.DB 233,160,36,102,16,9,170,169,255,133,104,32,77,217,138,162
+.DB 97,201,249,16,6,32,153,217,132,104,96,168,165,102,41,128
+.DB 70,98,5,98,133,98,32,176,217,132,104,96,165,97,201,160
+.DB 176,32,32,155,220,132,112,165,102,132,102,73,128,42,169,160
+.DB 133,97,165,101,133,7,76,210,216,133,98,133,99,133,100,133
+.DB 101,168,96,160,0,162,10,148,93,202,16,251,144,15,201,45
+.DB 208,4,134,103,240,4,201,43,208,5,32,115,0,144,91,201
+.DB 46,240,46,201,69,208,48,32,115,0,144,23,201,171,240,14
+.DB 201,45,240,10,201,170,240,8,201,43,240,4,208,7,102,96
+.DB 32,115,0,144,92,36,96,16,14,169,0,56,229,94,76,73
+.DB 221,102,95,36,95,80,195,165,94,56,229,93,133,94,240,18
+.DB 16,9,32,254,218,230,94,208,249,240,7,32,226,218,198,94
+.DB 208,249,165,103,48,1,96,76,180,223,72,36,95,16,2,230
+.DB 93,32,226,218,104,56,233,48,32,126,221,76,10,221,72,32
+.DB 12,220,104,32,60,220,165,110,69,102,133,111,166,97,76,106
+.DB 216,165,94,201,10,144,9,169,100,36,96,48,17,76,126,217
+.DB 10,10,24,101,94,10,24,160,0,113,122,56,233,48,133,94
+.DB 76,48,221,155,62,188,31,253,158,110,107,39,253,158,110,107
+.DB 40,0,169,113,160,195,32,218,221,165,58,166,57,133,98,134
+.DB 99,162,144,56,32,73,220,32,223,221,76,30,203,160,1,169
+.DB 32,36,102,16,2,169,45,153,255,0,133,102,132,113,200,169
+.DB 48,166,97,208,3,76,4,223,169,0,224,128,240,2,176,9
+.DB 169,189,160,221,32,40,218,169,247,133,93,169,184,160,221,32
+.DB 91,220,240,30,16,18,169,179,160,221,32,91,220,240,2,16
+.DB 14,32,226,218,198,93,208,238,32,254,218,230,93,208,220,32
+.DB 73,216,32,155,220,162,1,165,93,24,105,10,48,9,201,11
+.DB 176,6,105,255,170,169,2,56,233,2,133,94,134,93,138,240
+.DB 2,16,19,164,113,169,46,200,153,255,0,138,240,6,169,48
+.DB 200,153,255,0,132,113,160,0,162,128,165,101,24,121,25,223
+.DB 133,101,165,100,121,24,223,133,100,165,99,121,23,223,133,99
+.DB 165,98,121,22,223,133,98,232,176,4,16,222,48,2,48,218
+.DB 138,144,4,73,255,105,10,105,47,200,200,200,200,132,71,164
+.DB 113,200,170,41,127,153,255,0,198,93,208,6,169,46,200,153
+.DB 255,0,132,113,164,71,138,73,255,41,128,170,192,36,240,4
+.DB 192,60,208,166,164,113,185,255,0,136,201,48,240,248,201,46
+.DB 240,1,200,169,43,166,94,240,46,16,8,169,0,56,229,94
+.DB 170,169,45,153,1,1,169,69,153,0,1,138,162,47,56,232
+.DB 233,10,176,251,105,58,153,3,1,138,153,2,1,169,0,153
+.DB 4,1,240,8,153,255,0,169,0,153,0,1,169,0,160,1
+.DB 96,128,0,0,0,0,250,10,31,0,0,152,150,128,255,240
+.DB 189,192,0,1,134,160,255,255,216,240,0,0,3,232,255,255
+.DB 255,156,0,0,0,10,255,255,255,255,255,223,10,128,0,3
+.DB 75,192,255,255,115,96,0,0,14,16,255,255,253,168,0,0
+.DB 0,60,191,170,170,170,170,170,170,170,170,170,170,170,170,170
+.DB 170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,170
+.DB 170,32,12,220,169,17,160,223,32,162,219,240,112,165,105,208
+.DB 3,76,249,216,162,78,160,0,32,212,219,165,110,16,15,32
+.DB 204,220,169,78,160,0,32,91,220,208,3,152,164,7,32,254
+.DB 219,152,72,32,234,217,169,78,160,0,32,40,218,32,237,223
+.DB 104,74,144,10,165,97,240,6,165,102,73,255,133,102,96,129
+.DB 56,170,59,41,7,113,52,88,62,86,116,22,126,179,27,119
+.DB 47,238,227,133,122,29,132,28,42,124,99,89,88,10,126,117
+.DB 253,231,198,128,49,114,24,16,129,0,0,0,0,169,191,160
+.DB 223,32,40,218,165,112,105,80,144,3,32,35,220,133,86,32
diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/chars.asm b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/chars.asm
new file mode 100644
index 00000000..48069f8c
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/chars.asm
@@ -0,0 +1,256 @@
+.DB 28,34,74,86,76,32,30,0,24,36,66,126,66,66,66,0
+.DB 124,34,34,60,34,34,124,0,28,34,64,64,64,34,28,0
+.DB 120,36,34,34,34,36,120,0,126,64,64,120,64,64,126,0
+.DB 126,64,64,120,64,64,64,0,28,34,64,78,66,34,28,0
+.DB 66,66,66,126,66,66,66,0,28,8,8,8,8,8,28,0
+.DB 14,4,4,4,4,68,56,0,66,68,72,112,72,68,66,0
+.DB 64,64,64,64,64,64,126,0,66,102,90,90,66,66,66,0
+.DB 66,98,82,74,70,66,66,0,24,36,66,66,66,36,24,0
+.DB 124,66,66,124,64,64,64,0,24,36,66,66,74,36,26,0
+.DB 124,66,66,124,72,68,66,0,60,66,64,60,2,66,60,0
+.DB 62,8,8,8,8,8,8,0,66,66,66,66,66,66,60,0
+.DB 66,66,66,36,36,24,24,0,66,66,66,90,90,102,66,0
+.DB 66,66,36,24,36,66,66,0,34,34,34,28,8,8,8,0
+.DB 126,2,4,24,32,64,126,0,60,32,32,32,32,32,60,0
+.DB 12,16,16,60,16,112,110,0,60,4,4,4,4,4,60,0
+.DB 0,8,28,42,8,8,8,8,0,0,16,32,127,32,16,0
+.DB 0,0,0,0,0,0,0,0,8,8,8,8,0,0,8,0
+.DB 36,36,36,0,0,0,0,0,36,36,126,36,126,36,36,0
+.DB 8,30,40,28,10,60,8,0,0,98,100,8,16,38,70,0
+.DB 48,72,72,48,74,68,58,0,4,8,16,0,0,0,0,0
+.DB 4,8,16,16,16,8,4,0,32,16,8,8,8,16,32,0
+.DB 8,42,28,62,28,42,8,0,0,8,8,62,8,8,0,0
+.DB 0,0,0,0,0,8,8,16,0,0,0,126,0,0,0,0
+.DB 0,0,0,0,0,24,24,0,0,2,4,8,16,32,64,0
+.DB 60,66,70,90,98,66,60,0,8,24,40,8,8,8,62,0
+.DB 60,66,2,12,48,64,126,0,60,66,2,28,2,66,60,0
+.DB 4,12,20,36,126,4,4,0,126,64,120,4,2,68,56,0
+.DB 28,32,64,124,66,66,60,0,126,66,4,8,16,16,16,0
+.DB 60,66,66,60,66,66,60,0,60,66,66,62,2,4,56,0
+.DB 0,0,8,0,0,8,0,0,0,0,8,0,0,8,8,16
+.DB 14,24,48,96,48,24,14,0,0,0,126,0,126,0,0,0
+.DB 112,24,12,6,12,24,112,0,60,66,2,12,16,0,16,0
+.DB 0,0,0,0,255,0,0,0,8,28,62,127,127,28,62,0
+.DB 16,16,16,16,16,16,16,16,0,0,0,255,0,0,0,0
+.DB 0,0,255,0,0,0,0,0,0,255,0,0,0,0,0,0
+.DB 0,0,0,0,0,255,0,0,32,32,32,32,32,32,32,32
+.DB 4,4,4,4,4,4,4,4,0,0,0,0,224,16,8,8
+.DB 8,8,8,4,3,0,0,0,8,8,8,16,224,0,0,0
+.DB 128,128,128,128,128,128,128,255,128,64,32,16,8,4,2,1
+.DB 1,2,4,8,16,32,64,128,255,128,128,128,128,128,128,128
+.DB 255,1,1,1,1,1,1,1,0,60,126,126,126,126,60,0
+.DB 0,0,0,0,0,0,255,0,54,127,127,127,62,28,8,0
+.DB 64,64,64,64,64,64,64,64,0,0,0,0,3,4,8,8
+.DB 129,66,36,24,24,36,66,129,0,60,66,66,66,66,60,0
+.DB 8,28,42,119,42,8,8,0,2,2,2,2,2,2,2,2
+.DB 8,28,62,127,62,28,8,0,8,8,8,8,255,8,8,8
+.DB 160,80,160,80,160,80,160,80,8,8,8,8,8,8,8,8
+.DB 0,0,1,62,84,20,20,0,255,127,63,31,15,7,3,1
+.DB 0,0,0,0,0,0,0,0,240,240,240,240,240,240,240,240
+.DB 0,0,0,0,255,255,255,255,255,0,0,0,0,0,0,0
+.DB 0,0,0,0,0,0,0,255,128,128,128,128,128,128,128,128
+.DB 170,85,170,85,170,85,170,85,1,1,1,1,1,1,1,1
+.DB 0,0,0,0,170,85,170,85,255,254,252,248,240,224,192,128
+.DB 3,3,3,3,3,3,3,3,8,8,8,8,15,8,8,8
+.DB 0,0,0,0,15,15,15,15,8,8,8,8,15,0,0,0
+.DB 0,0,0,0,248,8,8,8,0,0,0,0,0,0,255,255
+.DB 0,0,0,0,15,8,8,8,8,8,8,8,255,0,0,0
+.DB 0,0,0,0,255,8,8,8,8,8,8,8,248,8,8,8
+.DB 192,192,192,192,192,192,192,192,224,224,224,224,224,224,224,224
+.DB 7,7,7,7,7,7,7,7,255,255,0,0,0,0,0,0
+.DB 255,255,255,0,0,0,0,0,0,0,0,0,0,255,255,255
+.DB 1,1,1,1,1,1,1,255,0,0,0,0,240,240,240,240
+.DB 15,15,15,15,0,0,0,0,8,8,8,8,248,0,0,0
+.DB 240,240,240,240,0,0,0,0,240,240,240,240,15,15,15,15
+.DB 227,221,181,169,179,223,225,255,231,219,189,129,189,189,189,255
+.DB 131,221,221,195,221,221,131,255,227,221,191,191,191,221,227,255
+.DB 135,219,221,221,221,219,135,255,129,191,191,135,191,191,129,255
+.DB 129,191,191,135,191,191,191,255,227,221,191,177,189,221,227,255
+.DB 189,189,189,129,189,189,189,255,227,247,247,247,247,247,227,255
+.DB 241,251,251,251,251,187,199,255,189,187,183,143,183,187,189,255
+.DB 191,191,191,191,191,191,129,255,189,153,165,165,189,189,189,255
+.DB 189,157,173,181,185,189,189,255,231,219,189,189,189,219,231,255
+.DB 131,189,189,131,191,191,191,255,231,219,189,189,181,219,229,255
+.DB 131,189,189,131,183,187,189,255,195,189,191,195,253,189,195,255
+.DB 193,247,247,247,247,247,247,255,189,189,189,189,189,189,195,255
+.DB 189,189,189,219,219,231,231,255,189,189,189,165,165,153,189,255
+.DB 189,189,219,231,219,189,189,255,221,221,221,227,247,247,247,255
+.DB 129,253,251,231,223,191,129,255,195,223,223,223,223,223,195,255
+.DB 243,239,239,195,239,143,145,255,195,251,251,251,251,251,195,255
+.DB 255,247,227,213,247,247,247,247,255,255,239,223,128,223,239,255
+.DB 255,255,255,255,255,255,255,255,247,247,247,247,255,255,247,255
+.DB 219,219,219,255,255,255,255,255,219,219,129,219,129,219,219,255
+.DB 247,225,215,227,245,195,247,255,255,157,155,247,239,217,185,255
+.DB 207,183,183,207,181,187,197,255,251,247,239,255,255,255,255,255
+.DB 251,247,239,239,239,247,251,255,223,239,247,247,247,239,223,255
+.DB 247,213,227,193,227,213,247,255,255,247,247,193,247,247,255,255
+.DB 255,255,255,255,255,247,247,239,255,255,255,129,255,255,255,255
+.DB 255,255,255,255,255,231,231,255,255,253,251,247,239,223,191,255
+.DB 195,189,185,165,157,189,195,255,247,231,215,247,247,247,193,255
+.DB 195,189,253,243,207,191,129,255,195,189,253,227,253,189,195,255
+.DB 251,243,235,219,129,251,251,255,129,191,135,251,253,187,199,255
+.DB 227,223,191,131,189,189,195,255,129,189,251,247,239,239,239,255
+.DB 195,189,189,195,189,189,195,255,195,189,189,193,253,251,199,255
+.DB 255,255,247,255,255,247,255,255,255,255,247,255,255,247,247,239
+.DB 241,231,207,159,207,231,241,255,255,255,129,255,129,255,255,255
+.DB 143,231,243,249,243,231,143,255,195,189,253,243,239,255,239,255
+.DB 255,255,255,255,0,255,255,255,247,227,193,128,128,227,193,255
+.DB 239,239,239,239,239,239,239,239,255,255,255,0,255,255,255,255
+.DB 255,255,0,255,255,255,255,255,255,0,255,255,255,255,255,255
+.DB 255,255,255,255,255,0,255,255,223,223,223,223,223,223,223,223
+.DB 251,251,251,251,251,251,251,251,255,255,255,255,31,239,247,247
+.DB 247,247,247,251,252,255,255,255,247,247,247,239,31,255,255,255
+.DB 127,127,127,127,127,127,127,0,127,191,223,239,247,251,253,254
+.DB 254,253,251,247,239,223,191,127,0,127,127,127,127,127,127,127
+.DB 0,254,254,254,254,254,254,254,255,195,129,129,129,129,195,255
+.DB 255,255,255,255,255,255,0,255,201,128,128,128,193,227,247,255
+.DB 191,191,191,191,191,191,191,191,255,255,255,255,252,251,247,247
+.DB 126,189,219,231,231,219,189,126,255,195,189,189,189,189,195,255
+.DB 247,227,213,136,213,247,247,255,253,253,253,253,253,253,253,253
+.DB 247,227,193,128,193,227,247,255,247,247,247,247,0,247,247,247
+.DB 95,175,95,175,95,175,95,175,247,247,247,247,247,247,247,247
+.DB 255,255,254,193,171,235,235,255,0,128,192,224,240,248,252,254
+.DB 255,255,255,255,255,255,255,255,15,15,15,15,15,15,15,15
+.DB 255,255,255,255,0,0,0,0,0,255,255,255,255,255,255,255
+.DB 255,255,255,255,255,255,255,0,127,127,127,127,127,127,127,127
+.DB 85,170,85,170,85,170,85,170,254,254,254,254,254,254,254,254
+.DB 255,255,255,255,85,170,85,170,0,1,3,7,15,31,63,127
+.DB 252,252,252,252,252,252,252,252,247,247,247,247,240,247,247,247
+.DB 255,255,255,255,240,240,240,240,247,247,247,247,240,255,255,255
+.DB 255,255,255,255,7,247,247,247,255,255,255,255,255,255,0,0
+.DB 255,255,255,255,240,247,247,247,247,247,247,247,0,255,255,255
+.DB 255,255,255,255,0,247,247,247,247,247,247,247,7,247,247,247
+.DB 63,63,63,63,63,63,63,63,31,31,31,31,31,31,31,31
+.DB 248,248,248,248,248,248,248,248,0,0,255,255,255,255,255,255
+.DB 0,0,0,255,255,255,255,255,255,255,255,255,255,0,0,0
+.DB 254,254,254,254,254,254,254,0,255,255,255,255,15,15,15,15
+.DB 240,240,240,240,255,255,255,255,247,247,247,247,7,255,255,255
+.DB 15,15,15,15,255,255,255,255,15,15,15,15,240,240,240,240
+.DB 28,34,74,86,76,32,30,0,0,0,56,4,60,68,58,0
+.DB 64,64,92,98,66,98,92,0,0,0,60,66,64,66,60,0
+.DB 2,2,58,70,66,70,58,0,0,0,60,66,126,64,60,0
+.DB 12,18,16,124,16,16,16,0,0,0,58,70,70,58,2,60
+.DB 64,64,92,98,66,66,66,0,8,0,24,8,8,8,28,0
+.DB 4,0,12,4,4,4,68,56,64,64,68,72,80,104,68,0
+.DB 24,8,8,8,8,8,28,0,0,0,118,73,73,73,73,0
+.DB 0,0,92,98,66,66,66,0,0,0,60,66,66,66,60,0
+.DB 0,0,92,98,98,92,64,64,0,0,58,70,70,58,2,2
+.DB 0,0,92,98,64,64,64,0,0,0,62,64,60,2,124,0
+.DB 16,16,124,16,16,18,12,0,0,0,66,66,66,70,58,0
+.DB 0,0,66,66,66,36,24,0,0,0,65,73,73,73,54,0
+.DB 0,0,66,36,24,36,66,0,0,0,66,66,70,58,2,60
+.DB 0,0,126,4,24,32,126,0,60,32,32,32,32,32,60,0
+.DB 12,16,16,60,16,112,110,0,60,4,4,4,4,4,60,0
+.DB 0,8,28,42,8,8,8,8,0,0,16,32,127,32,16,0
+.DB 0,0,0,0,0,0,0,0,8,8,8,8,0,0,8,0
+.DB 36,36,36,0,0,0,0,0,36,36,126,36,126,36,36,0
+.DB 8,30,40,28,10,60,8,0,0,98,100,8,16,38,70,0
+.DB 48,72,72,48,74,68,58,0,4,8,16,0,0,0,0,0
+.DB 4,8,16,16,16,8,4,0,32,16,8,8,8,16,32,0
+.DB 8,42,28,62,28,42,8,0,0,8,8,62,8,8,0,0
+.DB 0,0,0,0,0,8,8,16,0,0,0,126,0,0,0,0
+.DB 0,0,0,0,0,24,24,0,0,2,4,8,16,32,64,0
+.DB 60,66,70,90,98,66,60,0,8,24,40,8,8,8,62,0
+.DB 60,66,2,12,48,64,126,0,60,66,2,28,2,66,60,0
+.DB 4,12,20,36,126,4,4,0,126,64,120,4,2,68,56,0
+.DB 28,32,64,124,66,66,60,0,126,66,4,8,16,16,16,0
+.DB 60,66,66,60,66,66,60,0,60,66,66,62,2,4,56,0
+.DB 0,0,8,0,0,8,0,0,0,0,8,0,0,8,8,16
+.DB 14,24,48,96,48,24,14,0,0,0,126,0,126,0,0,0
+.DB 112,24,12,6,12,24,112,0,60,66,2,12,16,0,16,0
+.DB 0,0,0,0,255,0,0,0,24,36,66,126,66,66,66,0
+.DB 124,34,34,60,34,34,124,0,28,34,64,64,64,34,28,0
+.DB 120,36,34,34,34,36,120,0,126,64,64,120,64,64,126,0
+.DB 126,64,64,120,64,64,64,0,28,34,64,78,66,34,28,0
+.DB 66,66,66,126,66,66,66,0,28,8,8,8,8,8,28,0
+.DB 14,4,4,4,4,68,56,0,66,68,72,112,72,68,66,0
+.DB 64,64,64,64,64,64,126,0,66,102,90,90,66,66,66,0
+.DB 66,98,82,74,70,66,66,0,24,36,66,66,66,36,24,0
+.DB 124,66,66,124,64,64,64,0,24,36,66,66,74,36,26,0
+.DB 124,66,66,124,72,68,66,0,60,66,64,60,2,66,60,0
+.DB 62,8,8,8,8,8,8,0,66,66,66,66,66,66,60,0
+.DB 66,66,66,36,36,24,24,0,66,66,66,90,90,102,66,0
+.DB 66,66,36,24,36,66,66,0,34,34,34,28,8,8,8,0
+.DB 126,2,4,24,32,64,126,0,8,8,8,8,255,8,8,8
+.DB 160,80,160,80,160,80,160,80,8,8,8,8,8,8,8,8
+.DB 204,204,51,51,204,204,51,51,204,102,51,153,204,102,51,153
+.DB 0,0,0,0,0,0,0,0,240,240,240,240,240,240,240,240
+.DB 0,0,0,0,255,255,255,255,255,0,0,0,0,0,0,0
+.DB 0,0,0,0,0,0,0,255,128,128,128,128,128,128,128,128
+.DB 170,85,170,85,170,85,170,85,1,1,1,1,1,1,1,1
+.DB 0,0,0,0,170,85,170,85,153,51,102,204,153,51,102,204
+.DB 3,3,3,3,3,3,3,3,8,8,8,8,15,8,8,8
+.DB 0,0,0,0,15,15,15,15,8,8,8,8,15,0,0,0
+.DB 0,0,0,0,248,8,8,8,0,0,0,0,0,0,255,255
+.DB 0,0,0,0,15,8,8,8,8,8,8,8,255,0,0,0
+.DB 0,0,0,0,255,8,8,8,8,8,8,8,248,8,8,8
+.DB 192,192,192,192,192,192,192,192,224,224,224,224,224,224,224,224
+.DB 7,7,7,7,7,7,7,7,255,255,0,0,0,0,0,0
+.DB 255,255,255,0,0,0,0,0,0,0,0,0,0,255,255,255
+.DB 1,2,68,72,80,96,64,0,0,0,0,0,240,240,240,240
+.DB 15,15,15,15,0,0,0,0,8,8,8,8,248,0,0,0
+.DB 240,240,240,240,0,0,0,0,240,240,240,240,15,15,15,15
+.DB 227,221,181,169,179,223,225,255,255,255,199,251,195,187,197,255
+.DB 191,191,163,157,189,157,163,255,255,255,195,189,191,189,195,255
+.DB 253,253,197,185,189,185,197,255,255,255,195,189,129,191,195,255
+.DB 243,237,239,131,239,239,239,255,255,255,197,185,185,197,253,195
+.DB 191,191,163,157,189,189,189,255,247,255,231,247,247,247,227,255
+.DB 251,255,243,251,251,251,187,199,191,191,187,183,175,151,187,255
+.DB 231,247,247,247,247,247,227,255,255,255,137,182,182,182,182,255
+.DB 255,255,163,157,189,189,189,255,255,255,195,189,189,189,195,255
+.DB 255,255,163,157,157,163,191,191,255,255,197,185,185,197,253,253
+.DB 255,255,163,157,191,191,191,255,255,255,193,191,195,253,131,255
+.DB 239,239,131,239,239,237,243,255,255,255,189,189,189,185,197,255
+.DB 255,255,189,189,189,219,231,255,255,255,190,182,182,182,201,255
+.DB 255,255,189,219,231,219,189,255,255,255,189,189,185,197,253,195
+.DB 255,255,129,251,231,223,129,255,195,223,223,223,223,223,195,255
+.DB 243,239,239,195,239,143,145,255,195,251,251,251,251,251,195,255
+.DB 255,247,227,213,247,247,247,247,255,255,239,223,128,223,239,255
+.DB 255,255,255,255,255,255,255,255,247,247,247,247,255,255,247,255
+.DB 219,219,219,255,255,255,255,255,219,219,129,219,129,219,219,255
+.DB 247,225,215,227,245,195,247,255,255,157,155,247,239,217,185,255
+.DB 207,183,183,207,181,187,197,255,251,247,239,255,255,255,255,255
+.DB 251,247,239,239,239,247,251,255,223,239,247,247,247,239,223,255
+.DB 247,213,227,193,227,213,247,255,255,247,247,193,247,247,255,255
+.DB 255,255,255,255,255,247,247,239,255,255,255,129,255,255,255,255
+.DB 255,255,255,255,255,231,231,255,255,253,251,247,239,223,191,255
+.DB 195,189,185,165,157,189,195,255,247,231,215,247,247,247,193,255
+.DB 195,189,253,243,207,191,129,255,195,189,253,227,253,189,195,255
+.DB 251,243,235,219,129,251,251,255,129,191,135,251,253,187,199,255
+.DB 227,223,191,131,189,189,195,255,129,189,251,247,239,239,239,255
+.DB 195,189,189,195,189,189,195,255,195,189,189,193,253,251,199,255
+.DB 255,255,247,255,255,247,255,255,255,255,247,255,255,247,247,239
+.DB 241,231,207,159,207,231,241,255,255,255,129,255,129,255,255,255
+.DB 143,231,243,249,243,231,143,255,195,189,253,243,239,255,239,255
+.DB 255,255,255,255,0,255,255,255,231,219,189,129,189,189,189,255
+.DB 131,221,221,195,221,221,131,255,227,221,191,191,191,221,227,255
+.DB 135,219,221,221,221,219,135,255,129,191,191,135,191,191,129,255
+.DB 129,191,191,135,191,191,191,255,227,221,191,177,189,221,227,255
+.DB 189,189,189,129,189,189,189,255,227,247,247,247,247,247,227,255
+.DB 241,251,251,251,251,187,199,255,189,187,183,143,183,187,189,255
+.DB 191,191,191,191,191,191,129,255,189,153,165,165,189,189,189,255
+.DB 189,157,173,181,185,189,189,255,231,219,189,189,189,219,231,255
+.DB 131,189,189,131,191,191,191,255,231,219,189,189,181,219,229,255
+.DB 131,189,189,131,183,187,189,255,195,189,191,195,253,189,195,255
+.DB 193,247,247,247,247,247,247,255,189,189,189,189,189,189,195,255
+.DB 189,189,189,219,219,231,231,255,189,189,189,165,165,153,189,255
+.DB 189,189,219,231,219,189,189,255,221,221,221,227,247,247,247,255
+.DB 129,253,251,231,223,191,129,255,247,247,247,247,0,247,247,247
+.DB 95,175,95,175,95,175,95,175,247,247,247,247,247,247,247,247
+.DB 51,51,204,204,51,51,204,204,51,153,204,102,51,153,204,102
+.DB 255,255,255,255,255,255,255,255,15,15,15,15,15,15,15,15
+.DB 255,255,255,255,0,0,0,0,0,255,255,255,255,255,255,255
+.DB 255,255,255,255,255,255,255,0,127,127,127,127,127,127,127,127
+.DB 85,170,85,170,85,170,85,170,254,254,254,254,254,254,254,254
+.DB 255,255,255,255,85,170,85,170,102,204,153,51,102,204,153,51
+.DB 252,252,252,252,252,252,252,252,247,247,247,247,240,247,247,247
+.DB 255,255,255,255,240,240,240,240,247,247,247,247,240,255,255,255
+.DB 255,255,255,255,7,247,247,247,255,255,255,255,255,255,0,0
+.DB 255,255,255,255,240,247,247,247,247,247,247,247,0,255,255,255
+.DB 255,255,255,255,0,247,247,247,247,247,247,247,7,247,247,247
+.DB 63,63,63,63,63,63,63,63,31,31,31,31,31,31,31,31
+.DB 248,248,248,248,248,248,248,248,0,0,255,255,255,255,255,255
+.DB 0,0,0,255,255,255,255,255,255,255,255,255,255,0,0,0
+.DB 254,253,187,183,175,159,191,255,255,255,255,255,15,15,15,15
+.DB 240,240,240,240,255,255,255,255,247,247,247,247,7,255,255,255
+.DB 15,15,15,15,255,255,255,255,15,15,15,15,240,240,240,240
diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/dbops.asm b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/dbops.asm
new file mode 100644
index 00000000..acc88af3
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/dbops.asm
@@ -0,0 +1,16 @@
+.DB low(op_BRK),high(op_BRK),low(op_ORA),high(op_ORA),low(op_ASL),high(op_ASL),low(op_INVALID),high(op_INVALID),low(op_INVALID),high(op_INVALID),low(op_ORA),high(op_ORA),low(op_ASL),high(op_ASL),low(op_INVALID),high(op_INVALID),low(op_PHP),high(op_PHP),low(op_ORA),high(op_ORA),low(op_ASL_A),high(op_ASL_A),low(op_INVALID),high(op_INVALID),low(op_INVALID),high(op_INVALID),low(op_ORA),high(op_ORA),low(op_ASL),high(op_ASL),low(op_INVALID),high(op_INVALID)
+.DB low(op_BPL),high(op_BPL),low(op_ORA),high(op_ORA),low(op_ASL),high(op_ASL),low(op_INVALID),high(op_INVALID),low(op_INVALID),high(op_INVALID),low(op_ORA),high(op_ORA),low(op_ASL),high(op_ASL),low(op_INVALID),high(op_INVALID),low(op_CLC),high(op_CLC),low(op_ORA),high(op_ORA),low(op_ASL),high(op_ASL),low(op_INVALID),high(op_INVALID),low(op_INVALID),high(op_INVALID),low(op_ORA),high(op_ORA),low(op_ASL),high(op_ASL),low(op_INVALID),high(op_INVALID)
+.DB low(op_JSRA),high(op_JSRA),low(op_AND),high(op_AND),low(op_ROL),high(op_ROL),low(op_INVALID),high(op_INVALID),low(op_BIT),high(op_BIT),low(op_AND),high(op_AND),low(op_ROL),high(op_ROL),low(op_INVALID),high(op_INVALID),low(op_PLP),high(op_PLP),low(op_AND),high(op_AND),low(op_ROL_A),high(op_ROL_A),low(op_INVALID),high(op_INVALID),low(op_BIT),high(op_BIT),low(op_AND),high(op_AND),low(op_ROL),high(op_ROL),low(op_INVALID),high(op_INVALID)
+.DB low(op_BMI),high(op_BMI),low(op_AND),high(op_AND),low(op_ROL),high(op_ROL),low(op_INVALID),high(op_INVALID),low(op_BIT),high(op_BIT),low(op_AND),high(op_AND),low(op_ROL),high(op_ROL),low(op_INVALID),high(op_INVALID),low(op_SEC),high(op_SEC),low(op_AND),high(op_AND),low(op_ROL),high(op_ROL),low(op_INVALID),high(op_INVALID),low(op_BIT),high(op_BIT),low(op_AND),high(op_AND),low(op_ROL),high(op_ROL),low(op_INVALID),high(op_INVALID)
+.DB low(op_RTI),high(op_RTI),low(op_EOR),high(op_EOR),low(op_LSR),high(op_LSR),low(op_INVALID),high(op_INVALID),low(op_JMP),high(op_JMP),low(op_EOR),high(op_EOR),low(op_LSR),high(op_LSR),low(op_INVALID),high(op_INVALID),low(op_PHA),high(op_PHA),low(op_EOR),high(op_EOR),low(op_LSR_A),high(op_LSR_A),low(op_INVALID),high(op_INVALID),low(op_JMP),high(op_JMP),low(op_EOR),high(op_EOR),low(op_LSR),high(op_LSR),low(op_INVALID),high(op_INVALID)
+.DB low(op_BVC),high(op_BVC),low(op_EOR),high(op_EOR),low(op_LSR),high(op_LSR),low(op_INVALID),high(op_INVALID),low(op_JMP),high(op_JMP),low(op_EOR),high(op_EOR),low(op_LSR),high(op_LSR),low(op_INVALID),high(op_INVALID),low(op_CLI),high(op_CLI),low(op_EOR),high(op_EOR),low(op_LSR),high(op_LSR),low(op_INVALID),high(op_INVALID),low(op_JMP),high(op_JMP),low(op_EOR),high(op_EOR),low(op_LSR),high(op_LSR),low(op_INVALID),high(op_INVALID)
+.DB low(op_RTS),high(op_RTS),low(op_ADC),high(op_ADC),low(op_ROR),high(op_ROR),low(op_INVALID),high(op_INVALID),low(op_JMPI),high(op_JMPI),low(op_ADC),high(op_ADC),low(op_ROR),high(op_ROR),low(op_INVALID),high(op_INVALID),low(op_PLA),high(op_PLA),low(op_ADC),high(op_ADC),low(op_ROR_A),high(op_ROR_A),low(op_INVALID),high(op_INVALID),low(op_JMPI),high(op_JMPI),low(op_ADC),high(op_ADC),low(op_ROR),high(op_ROR),low(op_INVALID),high(op_INVALID)
+.DB low(op_BVS),high(op_BVS),low(op_ADC),high(op_ADC),low(op_ROR),high(op_ROR),low(op_INVALID),high(op_INVALID),low(op_JMPI),high(op_JMPI),low(op_ADC),high(op_ADC),low(op_ROR),high(op_ROR),low(op_INVALID),high(op_INVALID),low(op_SEI),high(op_SEI),low(op_ADC),high(op_ADC),low(op_ROR),high(op_ROR),low(op_INVALID),high(op_INVALID),low(op_JMPI),high(op_JMPI),low(op_ADC),high(op_ADC),low(op_ROR),high(op_ROR),low(op_INVALID),high(op_INVALID)
+.DB low(op_STY),high(op_STY),low(op_STA),high(op_STA),low(op_STX),high(op_STX),low(op_INVALID),high(op_INVALID),low(op_STY),high(op_STY),low(op_STA),high(op_STA),low(op_STX),high(op_STX),low(op_INVALID),high(op_INVALID),low(op_DEY),high(op_DEY),low(op_STA),high(op_STA),low(op_TXA),high(op_TXA),low(op_INVALID),high(op_INVALID),low(op_STY),high(op_STY),low(op_STA),high(op_STA),low(op_STX),high(op_STX),low(op_INVALID),high(op_INVALID)
+.DB low(op_BCC),high(op_BCC),low(op_STA),high(op_STA),low(op_STX),high(op_STX),low(op_INVALID),high(op_INVALID),low(op_STY),high(op_STY),low(op_STA),high(op_STA),low(op_STX_ZPY),high(op_STX_ZPY),low(op_INVALID),high(op_INVALID),low(op_TYA),high(op_TYA),low(op_STA),high(op_STA),low(op_TXS),high(op_TXS),low(op_INVALID),high(op_INVALID),low(op_STY),high(op_STY),low(op_STA),high(op_STA),low(op_STX),high(op_STX),low(op_INVALID),high(op_INVALID)
+.DB low(op_LDY),high(op_LDY),low(op_LDA),high(op_LDA),low(op_LDX),high(op_LDX),low(op_INVALID),high(op_INVALID),low(op_LDY),high(op_LDY),low(op_LDA),high(op_LDA),low(op_LDX),high(op_LDX),low(op_INVALID),high(op_INVALID),low(op_TAY),high(op_TAY),low(op_LDA),high(op_LDA),low(op_TAX),high(op_TAX),low(op_INVALID),high(op_INVALID),low(op_LDY),high(op_LDY),low(op_LDA),high(op_LDA),low(op_LDX),high(op_LDX),low(op_INVALID),high(op_INVALID)
+.DB low(op_BCS),high(op_BCS),low(op_LDA),high(op_LDA),low(op_LDX),high(op_LDX),low(op_INVALID),high(op_INVALID),low(op_LDY),high(op_LDY),low(op_LDA),high(op_LDA),low(op_LDX_ZPY),high(op_LDX_ZPY),low(op_INVALID),high(op_INVALID),low(op_CLV),high(op_CLV),low(op_LDA),high(op_LDA),low(op_TSX),high(op_TSX),low(op_INVALID),high(op_INVALID),low(op_LDY),high(op_LDY),low(op_LDA),high(op_LDA),low(op_LDX_XY),high(op_LDX_XY),low(op_INVALID),high(op_INVALID)
+.DB low(op_CPY),high(op_CPY),low(op_CMP),high(op_CMP),low(op_DEC),high(op_DEC),low(op_INVALID),high(op_INVALID),low(op_CPY),high(op_CPY),low(op_CMP),high(op_CMP),low(op_DEC),high(op_DEC),low(op_INVALID),high(op_INVALID),low(op_INY),high(op_INY),low(op_CMP),high(op_CMP),low(op_DEX),high(op_DEX),low(op_INVALID),high(op_INVALID),low(op_CPY),high(op_CPY),low(op_CMP),high(op_CMP),low(op_DEC),high(op_DEC),low(op_INVALID),high(op_INVALID)
+.DB low(op_BNE),high(op_BNE),low(op_CMP),high(op_CMP),low(op_DEC),high(op_DEC),low(op_INVALID),high(op_INVALID),low(op_CPY),high(op_CPY),low(op_CMP),high(op_CMP),low(op_DEC),high(op_DEC),low(op_INVALID),high(op_INVALID),low(op_CLD),high(op_CLD),low(op_CMP),high(op_CMP),low(op_DEC),high(op_DEC),low(op_INVALID),high(op_INVALID),low(op_CPY),high(op_CPY),low(op_CMP),high(op_CMP),low(op_DEC),high(op_DEC),low(op_INVALID),high(op_INVALID)
+.DB low(op_CPX),high(op_CPX),low(op_SBC),high(op_SBC),low(op_INC),high(op_INC),low(op_INVALID),high(op_INVALID),low(op_CPX),high(op_CPX),low(op_SBC),high(op_SBC),low(op_INC),high(op_INC),low(op_INVALID),high(op_INVALID),low(op_INX),high(op_INX),low(op_SBC),high(op_SBC),low(op_NOP),high(op_NOP),low(op_INVALID),high(op_INVALID),low(op_CPX),high(op_CPX),low(op_SBC),high(op_SBC),low(op_INC),high(op_INC),low(op_INVALID),high(op_INVALID)
+.DB low(op_BEQ),high(op_BEQ),low(op_SBC),high(op_SBC),low(op_INC),high(op_INC),low(op_INVALID),high(op_INVALID),low(op_CPX),high(op_CPX),low(op_SBC),high(op_SBC),low(op_INC),high(op_INC),low(op_INVALID),high(op_INVALID),low(op_SED),high(op_SED),low(op_SBC),high(op_SBC),low(op_INC),high(op_INC),low(op_INVALID),high(op_INVALID),low(op_CPX),high(op_CPX),low(op_SBC),high(op_SBC),low(op_INC),high(op_INC),low(op_INVALID),high(op_INVALID)
diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/init.asm b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/init.asm
new file mode 100644
index 00000000..d6079631
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/init.asm
@@ -0,0 +1,306 @@
+init_hardware:
+;--setup port directions--
+;bias
+	ldi		r16,EXP2(bias_ctrl)
+	sts		bias_port,r16
+	ldi		r16,0x18
+	sts		bias_port-1,r16
+;lcd
+
+	ldi		r16,255					;data as output
+	out		lcd_data-1,r16
+	ldi		r16,0
+	out		lcd_data,r16
+
+
+	sbi		lcd_pins-1,A0
+	sbi		lcd_pins-1,WR
+	sbi		lcd_pins-1,RD
+	sbi		lcd_pins-1,LCS
+
+	sbi		DDRD,7
+;	sbi		lcd_pins-1,LCD_RST
+
+	sbi		PORTD,7
+
+	cbi		lcd_pins,LCD_RST
+	sbi		lcd_pins,A0
+	sbi		lcd_pins,WR
+	sbi		lcd_pins,RD
+	cbi		lcd_pins,LCS
+
+
+
+;external memory
+	ldi		r16,128+64
+	out		MCUCR,r16
+
+	ldi		r16,1
+	sts		XMCRA,r16			;wait states
+
+;external memory hack
+	ldi r16, 0xFF				;make top address output if XMMset
+	out DDRC, r16
+	ldi r16, 0x00				;Make sure its zero!
+	out PORTC, r16
+
+;setup Rs232
+	ldi		r16,0x00
+	out		UCSR0B,r16
+	out   	UCSR0A,r16
+	
+	ldi		r16,0x98				;enable tx,rx and rxint 0x98 (0x18 no int)
+	out		UCSR0B,r16
+	ldi		r16,16					;56000bps
+;	ldi		r16,103					;9600bps
+	out		UBRR0L,r16
+
+
+;---INITALISE VARIABLE--
+	clr		buff_tail				;points to next char to read
+	clr		buff_head				;points to last place stored in buffer,so (head=tail)-> empty, (tail-head = 1)->full
+	
+	clr		cus_x
+	clr		cus_y	
+	
+	clr		r16
+	sts		vram_address,r16
+	sts		vram_address+1,r16			
+
+
+;------------------------
+
+
+
+
+	rcall	delay_1ms
+	rcall	lcd_reset
+	rcall	delay_1ms
+	rcall	bias_reset
+	rcall	delay_1ms
+	cbi		lcd_pins,LCS
+	rcall	delay_1ms
+	sbi		lcd_pins,LCS
+
+	ldi	r16,31
+bias_loop:
+		rcall	bias_inc
+		dec		r16
+	brne	bias_loop
+
+	rcall	lcd_init
+	rcall	clear_text_ram
+
+	ret
+
+
+
+clear_text_ram:
+	push	r16
+	push	r17
+	push	r18
+	push	r19
+	push	ZL
+	push	ZH
+
+	ldi		ZL,low(vram_text)
+	ldi		ZH,high(vram_text)
+
+	ldi		r17,1				;command
+	ldi		r16,0x42
+	rcall	lcd_send_data
+
+	clr		r17
+
+
+
+	ldi		r19,lines_screen
+clear_text_ram_l1:
+		ldi		r18,chars_line
+clear_text_ram_l2:
+			ldi		r16,0x20
+			rcall	lcd_send_data				;clear
+			st		Z+,r17						;clear internal vram also	
+
+			dec	r18
+		brne	clear_text_ram_l2
+		dec		r19
+
+	brne	clear_text_ram_l1
+
+;cursor 0,0
+	ldi		r17,1				;command
+	ldi		r16,0x46
+	rcall	lcd_send_data
+
+	clr		r17
+
+	ldi		r16,0x00
+	rcall	lcd_send_data
+
+	ldi		r16,0x00
+	rcall	lcd_send_data
+
+	pop		ZH
+	pop		ZL
+	pop		r19
+	pop		r18
+	pop		r17
+	pop		r16
+
+	ret
+
+
+
+
+
+
+lcd_init:
+;SYSTEM SET
+	ldi		r17,1				;command
+	ldi		r16,0x40
+	rcall	lcd_send_data
+
+	clr		r17
+
+	ldi		r16,0x31			;use CGRAM
+	rcall	lcd_send_data
+
+	ldi		r16,0x87
+	rcall	lcd_send_data
+
+	ldi		r16,0x07
+	rcall	lcd_send_data
+
+	ldi		r16,0x27
+	rcall	lcd_send_data
+
+	ldi		r16,0x2F
+	rcall	lcd_send_data
+
+	ldi		r16,0xC7
+	rcall	lcd_send_data
+
+	ldi		r16,0x50			;make a line 80 chars long (displays 40)
+	rcall	lcd_send_data
+
+	ldi		r16,0x00
+	rcall	lcd_send_data
+
+;CHARACTER RAM ADDR
+	ldi		r17,1				;command
+	ldi		r16,0x5C
+	rcall	lcd_send_data
+
+	clr		r17
+
+	ldi		r16,0x00
+	rcall	lcd_send_data
+
+	ldi		r16,0xf0
+	rcall	lcd_send_data
+
+
+;SCROLL
+	ldi		r17,1				;command
+	ldi		r16,0x44
+	rcall	lcd_send_data
+
+	clr		r17
+
+	ldi		r16,0x00
+	rcall	lcd_send_data
+
+	ldi		r16,0x00
+	rcall	lcd_send_data
+
+	ldi		r16,0xc7
+	rcall	lcd_send_data
+
+	ldi		r16,0x00
+	rcall	lcd_send_data
+
+	ldi		r16,0x05
+	rcall	lcd_send_data
+
+	ldi		r16,0xc7
+	rcall	lcd_send_data
+
+	ldi		r16,0x00
+	rcall	lcd_send_data
+
+	ldi		r16,0x00
+	rcall	lcd_send_data
+
+	ldi		r16,0x00
+	rcall	lcd_send_data
+
+	ldi		r16,0x00
+	rcall	lcd_send_data
+
+;DISPLAY OFFSET
+	ldi		r17,1				;command
+	ldi		r16,0x5a
+	rcall	lcd_send_data
+
+	clr		r17
+
+	ldi		r16,0x00
+	rcall	lcd_send_data
+
+;CUSOR POSITION 0,0
+	ldi		r17,1				;command
+	ldi		r16,0x46
+	rcall	lcd_send_data
+
+	clr		r17
+
+	ldi		r16,0x00
+	rcall	lcd_send_data
+
+	ldi		r16,0x00
+	rcall	lcd_send_data
+
+;OVERLAY, TEXT + GRAPHICS	
+	ldi		r17,1				;command
+	ldi		r16,0x5b
+	rcall	lcd_send_data
+
+	clr		r17
+
+	ldi		r16,0x00
+	rcall	lcd_send_data
+
+;CURSOR TYPE (BLOCK 8X8)
+	ldi		r17,1				;command
+	ldi		r16,0x5D
+	rcall	lcd_send_data
+
+	clr		r17
+
+	ldi		r16,0x07
+	rcall	lcd_send_data
+
+	ldi		r16,0x87
+	rcall	lcd_send_data
+
+;CURSOR DIR
+	ldi		r17,1				;command
+	ldi		r16,0x4C
+	rcall	lcd_send_data
+
+
+
+;DISPLAY ON
+	ldi		r17,1				;command
+	ldi		r16,0x59
+	rcall	lcd_send_data
+
+	clr		r17
+
+	ldi		r16,0x06
+	rcall	lcd_send_data
+;-----
+
+
+RET
diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/io.asm b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/io.asm
new file mode 100644
index 00000000..6b2299fa
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/io.asm
@@ -0,0 +1,348 @@
+lcd_debug:
+
+lcd_debug_rx_wait:
+	sbis	UCSR0A,RXC0					;wait for first byte
+	rjmp	lcd_debug_rx_wait
+
+
+	in		r17,UDR0
+
+lcd_debug_rx_wait1:
+	sbis	UCSR0A,RXC0				;wiat for second byte
+	rjmp	lcd_debug_rx_wait1
+
+	in		r16,UDR0				;put data on port
+			
+	rcall	lcd_send_data
+
+	
+
+lcd_debug_TX:
+	sbis	UCSR0A,UDRE0
+	rjmp	lcd_debug_TX
+	out		UDR0,r16
+	
+
+
+rjmp	lcd_debug
+
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+;cursor_address
+	
+;purpose: 	calculates memory address of cursor
+;Takes: 	cus_x,cus_y
+;Give:		address in r0:r1
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+cursor_address:
+	push	r16
+	push	r17
+
+	mov		r16,cus_y
+	ldi		r17,chars_line
+	mul		r17,r16
+	clr		r17
+	add		r0,cus_x
+	adc		r1,r17
+
+	pop		r17
+	pop		r16
+	ret
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+;lcd_set_cursor
+	
+;purpose: 	sets cursor memory address
+;Takes: 	r0,r1 as address
+;Give:		na
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------	
+
+lcd_set_cursor:
+	push	r17
+	push	r16
+
+	sts		vram_address,r0		;update vram address also
+	sts		vram_address+1,r1
+
+	ldi		r17,1				;command
+	ldi		r16,0x46
+	rcall	lcd_send_data
+
+	clr		r17
+	
+	mov		r16,r0
+	rcall	lcd_send_data
+
+	mov		r16,r1
+	rcall	lcd_send_data
+
+	pop		r16
+	pop		r17
+	ret
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+;lcd_print_chr
+	
+;purpose: 	print char to screen at current location
+;Takes: 	r16 as char
+;Give:		na
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------	
+lcd_print_chr:
+	push	r16
+	push	r17
+	push	r18
+	push	ZL
+	push	ZH
+
+
+	mov		r18,r16
+
+	ldi		r17,1						;send to lcd
+	ldi		r16,0x42
+	rcall	lcd_send_data
+
+	clr		r17
+
+	mov		r16,r18
+	rcall	lcd_send_data
+
+	lds		r16,vram_address
+	lds		r17,vram_address+1
+
+	ldi		ZL,low(vram_text)
+	ldi		ZH,high(vram_text)
+
+	add		ZL,r16						;add on address offset
+	adc		ZH,r17
+
+	st		Z+,r18						;auto increment
+
+	clr		r18							;ind vram address
+	inc		r16
+	adc		r17,r18
+
+	sts		vram_address,r16				;update address
+	sts		vram_address+1,r17
+
+
+
+	pop		ZH
+	pop		ZL
+	pop		r18
+	pop		r17
+	pop		r16
+
+	ret
+
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+;lcd_print_chr_cursor
+	
+;purpose: 	print char to screen at current CURSOR location, so changes lcd cursor address unlike one above
+;Takes: 	r16 as char,cus_x,cusy
+;Give:		na
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------	
+lcd_print_chr_cursor:
+	push	r0
+	push	r1
+	push	r16
+	push	r17
+	push	r18
+	push	ZL
+	push	ZH
+
+	rcall	cursor_address			;calucates address
+	rcall	lcd_set_cursor		
+
+	mov		r18,r16
+
+	ldi		r17,1						;send to lcd
+	ldi		r16,0x42
+	rcall	lcd_send_data
+
+	clr		r17
+
+	mov		r16,r18
+	rcall	lcd_send_data
+
+	mov		r16,r0
+	mov		r17,r1
+
+	ldi		ZL,low(vram_text)
+	ldi		ZH,high(vram_text)
+
+	add		ZL,r16						;add on address offset
+	adc		ZH,r17
+
+	st		Z+,r18						;auto increment
+
+	clr		r18							;inc vram address
+	inc		r16
+	adc		r17,r18
+
+	sts		vram_address,r16				;update address
+	sts		vram_address+1,r17
+
+
+
+	pop		ZH
+	pop		ZL
+	pop		r18
+	pop		r17
+	pop		r16
+	pop		r1
+	pop		r0
+
+	ret
+
+
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+;lcd_send_data
+	
+;purpose: 	send data for command to lcd
+;Takes: 	r16 and r17
+;Give:		na
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------	
+lcd_send_data:
+	push	r17
+	push	r16
+
+	cbi		lcd_pins,LCS
+
+	;rcall	delay_1ms
+
+
+
+	sbrs	r17,0					;set up a0
+	cbi		lcd_pins,A0
+	sbrc	r17,0
+	sbi		lcd_pins,A0
+
+	out 	lcd_data,r16				;put data on port
+
+
+	nop
+	nop
+	nop
+	nop
+
+
+
+	cbi		lcd_pins,WR
+
+	nop
+	nop
+	nop
+
+	sbi		lcd_pins,WR
+
+	nop
+	nop
+
+	;rcall	delay_1ms
+	sbi		lcd_pins,LCS
+
+	pop		r16
+	pop		r17
+
+	ret
+
+
+
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+;bias_inc
+	
+;purpose: 	increment bias one setp
+;Takes: 	na
+;Give:		na
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+
+bias_inc:
+	push	r16
+
+	clr		r16
+	sbr		r16,EXP2(bias_adj) | EXP2(bias_ctrl)
+	sts		bias_port,r16
+
+	rcall	delay_1ms
+
+	clr		r16
+	sbr		r16, EXP2(bias_ctrl)
+	sts		bias_port,r16
+
+	rcall	delay_1ms
+
+	pop		r16
+	ret
+
+
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+;bias_reset
+	
+;purpose: 	reset LCD bias to midway
+;Takes: 	na
+;Give:		na
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+bias_reset:
+	push	r16
+
+	clr		r16
+	sbr		r16,EXP2(bias_adj) | EXP2(bias_ctrl)
+	sts		bias_port,r16
+
+	rcall	delay_1ms
+
+	clr		r16
+	sbr		r16, EXP2(bias_adj)
+	sts		bias_port,r16
+
+	rcall	delay_1ms
+
+	clr		r16
+	sbr		r16,EXP2(bias_adj) | EXP2(bias_ctrl)
+	sts		bias_port,r16
+
+
+	rcall	delay_1ms
+
+	clr		r16
+	sbr		r16, EXP2(bias_ctrl)
+	sts		bias_port,r16
+
+	rcall	delay_1ms
+
+	pop		r16
+	ret
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+;lcd_reset
+	
+;purpose: 	reset LCD 
+;Takes: 	na
+;Give:		na
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+lcd_reset:
+	rcall	delay_1ms
+	cbi		PORTD,7
+	rcall	delay_1ms
+	sbi		PORTD,7
+	rcall	delay_1ms
+	rcall	delay_1ms
+	rcall	delay_1ms
+rcall	delay_1ms
+	rcall	delay_1ms
+	ret
+
+
+
diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/kernal.asm b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/kernal.asm
new file mode 100644
index 00000000..edae096f
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/kernal.asm
@@ -0,0 +1,512 @@
+.DB 15,220,165,97,201,136,144,3,32,212,218,32,204,220,165,7
+.DB 24,105,129,240,243,56,233,1,72,162,5,181,105,180,97,149
+.DB 97,148,105,202,16,245,165,86,133,112,32,83,216,32,180,223
+.DB 169,196,160,223,32,86,224,169,0,133,111,104,32,185,218,96
+.DB 133,113,132,114,32,202,219,169,87,32,40,218,32,90,224,169
+.DB 87,160,0,76,40,218,133,113,132,114,32,199,219,177,113,133
+.DB 103,164,113,200,152,208,2,230,114,133,113,164,114,32,40,218
+.DB 165,113,164,114,24,105,5,144,1,200,133,113,132,114,32,103
+.DB 216,169,92,160,0,198,103,208,228,96,152,53,68,122,0,104
+.DB 40,177,70,0,32,43,220,48,55,208,32,32,243,255,134,34
+.DB 132,35,160,4,177,34,133,98,200,177,34,133,100,160,8,177
+.DB 34,133,99,200,177,34,133,101,76,224,224,169,139,160,0,32
+.DB 162,219,169,138,160,224,32,40,218,169,143,160,224,32,103,216
+.DB 166,101,165,98,133,101,134,98,166,99,165,100,133,99,134,100
+.DB 169,0,133,102,165,97,133,112,169,128,133,97,32,215,216,162
+.DB 139,160,0,76,212,219,201,240,208,7,132,56,134,55,76,99
+.DB 198,170,208,2,162,30,76,55,196,32,210,255,176,232,96,32
+.DB 207,255,176,226,96,32,201,255,176,220,96,32,198,255,176,214
+.DB 96,32,228,255,176,208,96,32,138,205,32,247,215,169,225,72
+.DB 169,67,72,173,15,3,72,173,12,3,174,13,3,172,14,3
+.DB 40,108,20,0,8,141,12,3,142,13,3,140,14,3,104,141
+.DB 15,3,96,32,209,225,166,45,164,46,169,43,32,216,255,176
+.DB 149,96,169,1,44,169,0,133,10,32,209,225,165,10,166,43
+.DB 164,44,32,213,255,176,87,165,10,240,26,162,28,32,183,255
+.DB 41,16,240,3,76,55,196,165,122,201,2,240,7,169,100,160
+.DB 195,76,30,203,96,32,183,255,41,191,240,5,162,29,76,55
+.DB 196,165,123,201,2,208,14,134,45,132,46,169,118,160,195,32
+.DB 30,203,76,42,197,32,142,198,76,118,228,32,22,226,32,192
+.DB 255,176,11,96,32,22,226,165,73,32,195,255,144,198,76,246
+.DB 224,169,0,32,189,255,162,1,160,0,32,186,255,32,3,226
+.DB 32,84,226,32,3,226,32,253,225,160,0,134,73,32,186,255
+.DB 32,3,226,32,253,225,138,168,166,73,76,186,255,32,11,226
+.DB 76,158,215,32,121,0,208,2,104,104,96,32,253,206,32,121
+.DB 0,208,247,76,8,207,169,0,32,189,255,32,14,226,32,158
+.DB 215,134,73,138,162,1,160,0,32,186,255,32,3,226,32,253
+.DB 225,134,74,160,0,165,73,224,3,144,1,136,32,186,255,32
+.DB 3,226,32,253,225,138,168,166,74,165,73,32,186,255,32,3
+.DB 226,32,11,226,32,158,205,32,163,214,166,34,164,35,76,189
+.DB 255,169,221,160,226,32,103,216,32,12,220,169,226,160,226,166
+.DB 110,32,7,219,32,12,220,32,204,220,169,0,133,111,32,83
+.DB 216,169,231,160,226,32,80,216,165,102,72,16,13,32,73,216
+.DB 165,102,48,9,165,18,73,255,133,18,32,180,223,169,231,160
+.DB 226,32,103,216,104,16,3,32,180,223,169,236,160,226,76,64
+.DB 224,32,202,219,169,0,133,18,32,104,226,162,78,160,0,32
+.DB 243,224,169,87,160,0,32,162,219,169,0,133,102,165,18,32
+.DB 217,226,169,78,160,0,76,15,219,72,76,154,226,129,73,15
+.DB 218,162,131,73,15,218,162,127,0,0,0,0,5,132,230,26
+.DB 45,27,134,40,7,251,248,135,153,104,137,1,135,35,53,223
+.DB 225,134,165,93,231,40,131,73,15,218,162,165,102,72,16,3
+.DB 32,180,223,165,97,72,201,129,144,7,169,188,160,217,32,15
+.DB 219,169,59,160,227,32,64,224,104,201,129,144,7,169,221,160
+.DB 226,32,80,216,104,16,3,76,180,223,96,11,118,179,131,189
+.DB 211,121,30,244,166,245,123,131,252,176,16,124,12,31,103,202
+.DB 124,222,83,203,193,125,20,100,112,76,125,183,234,81,122,125
+.DB 99,48,136,126,126,146,68,153,58,126,76,204,145,199,127,170
+.DB 170,170,19,129,0,0,0,0,32,91,228,32,164,227,32,4
+.DB 228,162,251,154,76,116,196,230,122,208,2,230,123,173,96,234
+.DB 201,58,176,10,201,32,240,239,56,233,48,56,233,208,96,128
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+.DB 9,133,208,165,213,133,200,76,79,230,176,56,201,2,240,63
+.DB 134,151,32,80,242,176,22,72,32,80,242,176,13,208,5,169
+.DB 64,32,106,254,198,166,166,151,104,96,170,104,138,166,151,96
+.DB 32,138,248,208,11,32,192,248,176,17,169,0,133,166,240,240
+.DB 177,178,24,96,165,144,240,4,169,13,24,96,76,25,239,32
+.DB 5,242,176,5,201,0,240,247,24,96,72,165,154,201,3,208
+.DB 4,104,76,66,231,144,4,104,76,228,238,201,2,240,42,104
+.DB 133,158,72,138,72,152,72,32,138,248,208,14,32,227,248,176
+.DB 14,169,2,160,0,145,178,200,132,166,165,158,145,178,24,104
+.DB 168,104,170,104,144,2,169,0,96,104,134,151,132,158,32,237
+.DB 240,166,151,164,158,24,96,32,207,243,240,3,76,132,247,32
+.DB 223,243,165,186,240,22,201,3,240,18,176,20,201,2,208,3
+.DB 76,22,241,166,185,224,96,240,3,76,141,247,133,153,24,96
+.DB 170,32,20,238,165,185,16,6,32,211,238,76,1,243,32,206
+.DB 238,138,36,144,16,230,76,138,247,32,207,243,240,3,76,132
+.DB 247,32,223,243,165,186,208,3,76,144,247,201,3,240,15,176
+.DB 17,201,2,208,3,76,188,240,166,185,224,96,240,234,133,154
+.DB 24,96,170,32,23,238,165,185,16,5,32,197,238,208,3,32
+.DB 192,238,138,36,144,16,231,76,138,247,32,212,243,240,2,24
+.DB 96,32,223,243,138,72,165,186,240,87,201,3,240,83,176,78
+.DB 201,2,208,41,104,32,178,243,169,125,141,30,145,169,6,141
+.DB 16,145,169,238,141,28,145,32,117,254,165,248,240,1,200,165
+.DB 250,240,1,200,169,0,133,248,133,250,76,60,245,165,185,41
+.DB 15,240,30,32,77,248,169,0,32,144,242,76,207,228,176,46
+.DB 165,185,201,98,208,11,169,5,32,231,247,76,177,243,32,218
+.DB 246,104,170,198,152,228,152,240,20,164,152,185,89,2,157,89
+.DB 2,185,99,2,157,99,2,185,109,2,157,109,2,24,96,169
+.DB 0,133,144,138,166,152,202,48,21,221,89,2,208,248,96,189
+.DB 89,2,133,184,189,99,2,133,186,189,109,2,133,185,96,169
+.DB 0,133,152,162,3,228,154,176,3,32,4,239,228,153,176,3
+.DB 32,246,238,134,154,169,0,133,153,96,166,184,208,3,76,141
+.DB 247,32,207,243,208,3,76,129,247,166,152,224,10,144,3,76
+.DB 126,247,230,152,165,184,157,89,2,165,185,9,96,133,185,157
+.DB 109,2,165,186,157,99,2,240,90,201,3,240,86,144,5,32
+.DB 149,244,144,79,201,2,208,3,76,199,244,32,77,248,176,3
+.DB 76,150,247,165,185,41,15,208,31,32,148,248,176,54,32,71
+.DB 246,165,183,240,10,32,103,248,144,24,240,40,76,135,247,32
+.DB 175,247,240,32,144,12,176,244,32,183,248,176,23,169,4,32
+.DB 231,247,169,191,164,185,192,96,240,7,160,0,169,2,145,178
+.DB 152,133,166,24,96,165,185,48,44,164,183,240,40,165,186,32
+.DB 23,238,165,185,9,240,32,192,238,165,144,16,5,104,104,76
+.DB 138,247,165,183,240,12,160,0,177,187,32,228,238,200,196,183
+.DB 208,246,32,4,239,24,96,169,6,141,18,145,141,16,145,169
+.DB 238,141,28,145,160,0,140,151,2,196,183,240,10,177,187,153
+.DB 147,2,200,192,4,208,242,32,39,240,142,152,2,173,147,2
+.DB 41,15,208,0,10,170,189,90,255,10,168,189,91,255,42,72
+.DB 152,105,200,141,153,2,104,105,0,141,154,2,173,148,2,74
+.DB 144,9,173,32,145,10,176,3,76,22,240,173,155,2,141,156
+.DB 2,173,158,2,141,157,2,32,117,254,165,248,208,5,136,132
+.DB 248,134,247,165,250,208,5,136,132,250,134,249,56,169,240,76
+.DB 123,254,134,195,132,196,108,48,3,133,147,169,0,133,144,165
+.DB 186,208,3,76,150,247,201,3,240,249,144,110,164,183,208,3
+.DB 76,147,247,32,188,228,169,96,133,185,32,149,244,165,186,32
+.DB 20,238,165,185,32,206,238,32,25,239,133,174,165,144,74,74
+.DB 176,69,32,25,239,133,175,32,193,228,169,253,37,144,133,144
+.DB 32,225,255,208,3,76,203,246,32,25,239,170,165,144,74,74
+.DB 176,232,138,164,147,240,12,160,0,209,174,240,8,169,16,32
+.DB 106,254,44,145,174,230,174,208,2,230,175,36,144,80,203,32
+.DB 246,238,32,218,246,144,122,76,135,247,201,2,208,3,76,185
+.DB 240,32,77,248,176,3,76,150,247,32,148,248,176,104,32,71
+.DB 246,165,183,240,9,32,103,248,144,11,240,90,176,217,32,175
+.DB 247,240,83,176,210,165,144,41,16,56,208,74,224,1,240,17
+.DB 224,3,208,221,160,1,177,178,133,195,200,177,178,133,196,176
+.DB 4,165,185,208,239,160,3,177,178,160,1,241,178,170,160,4
+.DB 177,178,160,2,241,178,168,24,138,101,195,133,174,152,101,196
+.DB 133,175,165,195,133,193,165,196,133,194,32,106,246,32,201,248
+.DB 36,24,166,174,164,175,96,165,157,16,30,160,12,32,230,241
+.DB 165,183,240,21,160,23,32,230,241,164,183,240,12,160,0,177
+.DB 187,32,210,255,200,196,183,208,246,96,160,73,165,147,240,2
+.DB 160,89,76,226,241,134,174,132,175,170,181,0,133,193,181,1
+.DB 133,194,108,50,3,165,186,208,3,76,150,247,201,3,240,249
+.DB 144,95,169,97,133,185,164,183,208,3,76,147,247,32,149,244
+.DB 32,40,247,165,186,32,23,238,165,185,32,192,238,160,0,32
+.DB 210,251,165,172,32,228,238,165,173,32,228,238,32,17,253,176
+.DB 22,177,172,32,228,238,32,225,255,208,7,32,218,246,169,0
+.DB 56,96,32,27,253,208,229,32,4,239,36,185,48,17,165,186
+.DB 32,23,238,165,185,41,239,9,224,32,192,238,32,4,239,24
+.DB 96,201,2,208,3,76,185,240,32,77,248,144,140,32,183,248
+.DB 176,37,32,40,247,162,3,165,185,41,1,208,2,162,1,138
+.DB 32,231,247,176,18,32,230,248,176,13,165,185,41,2,240,6
+.DB 169,5,32,231,247,36,24,96,165,157,16,251,160,81,32,230
+.DB 241,76,89,246,162,0,230,162,208,6,230,161,208,2,230,160
+.DB 56,165,162,233,1,165,161,233,26,165,160,233,79,144,6,134
+.DB 160,134,161,134,162,173,47,145,205,47,145,208,248,133,145,96
+.DB 120,165,162,166,161,164,160,120,133,162,134,161,132,160,88,96
+.DB 165,145,201,254,208,7,8,32,204,255,133,198,40,96,169,1
+.DB 44,169,2,44,169,3,44,169,4,44,169,5,44,169,6,44
+.DB 169,7,44,169,8,44,169,9,72,32,204,255,160,0,36,157
+.DB 80,10,32,230,241,104,72,9,48,32,210,255,104,56,96,165
+.DB 147,72,32,192,248,104,133,147,176,44,160,0,177,178,201,5
+.DB 240,36,201,1,240,8,201,3,240,4,201,4,208,225,170,36
+.DB 157,16,17,160,99,32,230,241,160,5,177,178,32,210,255,200
+.DB 192,21,208,246,24,136,96,133,158,32,77,248,144,94,165,194
+.DB 72,165,193,72,165,175,72,165,174,72,160,191,169,32,145,178
+.DB 136,208,251,165,158,145,178,200,165,193,145,178,200,165,194,145
+.DB 178,200,165,174,145,178,200,165,175,145,178,200,132,159,160,0
+.DB 132,158,164,158,196,183,240,12,177,187,164,159,145,178,230,158
+.DB 230,159,208,238,32,84,248,169,105,133,171,32,234,248,168,104
+.DB 133,174,104,133,175,104,133,193,104,133,194,152,96,166,178,164
+.DB 179,192,2,96,32,77,248,138,133,193,24,105,192,133,174,152
+.DB 133,194,105,0,133,175,96,32,175,247,176,29,160,5,132,159
+.DB 160,0,132,158,196,183,240,16,177,187,164,159,209,178,208,231
+.DB 230,158,230,159,164,158,208,236,24,96,32,77,248,230,166,164
+.DB 166,192,192,96,32,171,248,240,28,160,27,32,230,241,32,75
+.DB 249,32,171,248,208,248,160,106,76,230,241,169,64,44,31,145
+.DB 208,3,44,31,145,24,96,32,171,248,240,249,160,46,208,219
+.DB 169,0,133,144,133,147,32,84,248,32,148,248,176,31,120,169
+.DB 0,133,170,133,180,133,176,133,158,133,159,133,156,169,130,162
+.DB 14,208,17,32,84,248,169,20,133,171,32,183,248,176,104,120
+.DB 169,160,162,8,160,127,140,46,145,141,46,145,32,96,241,173
+.DB 20,3,141,159,2,173,21,3,141,160,2,32,251,252,169,2
+.DB 133,190,32,219,251,173,28,145,41,253,9,12,141,28,145,133
+.DB 192,162,255,160,255,136,208,253,202,208,248,141,41,145,88,173
+.DB 160,2,205,21,3,24,240,31,32,75,249,173,45,145,41,64
+.DB 240,237,173,20,145,32,52,247,76,47,249,32,225,255,24,208
+.DB 11,32,207,252,56,104,104,169,0,141,160,2,96,134,177,165
+.DB 176,10,10,24,101,176,24,101,177,133,177,169,0,36,176,48
+.DB 1,42,6,177,42,6,177,42,170,173,40,145,201,21,144,249
+.DB 101,177,141,36,145,138,109,41,145,141,37,145,88,96,174,41
+.DB 145,160,255,152,237,40,145,236,41,145,208,242,134,177,170,140
+.DB 40,145,140,41,145,152,229,177,134,177,74,102,177,74,102,177
+.DB 165,176,24,105,60,44,33,145,197,177,176,74,166,156,240,3
+.DB 76,173,250,166,163,48,27,162,0,105,48,101,176,197,177,176
+.DB 28,232,105,38,101,176,197,177,176,23,105,44,101,176,197,177
+.DB 144,3,76,96,250,165,180,240,29,133,168,208,25,230,169,176
+.DB 2,198,169,56,233,19,229,177,101,146,133,146,165,164,73,1
+.DB 133,164,240,33,134,215,165,180,240,24,44,45,145,80,19,169
+.DB 0,133,164,165,163,16,48,48,201,162,166,32,93,249,165,155
+.DB 208,195,76,86,255,165,146,240,7,48,3,198,176,44,230,176
+.DB 169,0,133,146,228,215,208,15,138,208,170,165,169,48,199,201
+.DB 16,144,195,133,150,176,191,138,69,155,133,155,165,180,240,210
+.DB 198,163,48,197,70,215,102,191,162,218,32,93,249,76,86,255
+.DB 165,150,240,4,165,180,240,4,165,163,16,133,70,177,169,147
+.DB 56,229,177,101,176,10,170,32,93,249,230,156,165,180,208,17
+.DB 165,150,240,38,133,168,169,0,133,150,169,192,141,46,145,133
+.DB 180,165,150,133,181,240,9,169,0,133,180,169,64,141,46,145
+.DB 165,191,133,189,165,168,5,169,133,182,76,86,255,32,219,251
+.DB 133,156,162,218,32,93,249,165,190,240,2,133,167,169,15,36
+.DB 170,16,23,165,181,208,12,166,190,202,208,11,169,8,32,106
+.DB 254,208,4,169,0,133,170,76,86,255,112,49,208,24,165,181
+.DB 208,245,165,182,208,241,165,167,74,165,189,48,3,144,24,24
+.DB 176,21,41,15,133,170,198,170,208,221,169,64,133,170,32,210
+.DB 251,169,0,133,171,240,208,169,128,133,170,208,202,165,181,240
+.DB 10,169,4,32,106,254,169,0,76,151,251,32,17,253,144,3
+.DB 76,149,251,166,167,202,240,45,165,147,240,12,160,0,165,189
+.DB 209,172,240,4,169,1,133,182,165,182,240,75,162,61,228,158
+.DB 144,62,166,158,165,173,157,1,1,165,172,157,0,1,232,232
+.DB 134,158,76,135,251,166,159,228,158,240,53,165,172,221,0,1
+.DB 208,46,165,173,221,1,1,208,39,230,159,230,159,165,147,240
+.DB 11,165,189,160,0,209,172,240,23,200,132,182,165,182,240,7
+.DB 169,16,32,106,254,208,9,165,147,208,5,168,165,189,145,172
+.DB 32,27,253,208,58,169,128,133,170,166,190,202,48,2,134,190
+.DB 198,167,240,8,165,158,208,39,133,190,240,35,32,207,252,32
+.DB 210,251,160,0,132,171,177,172,69,171,133,171,32,27,253,32
+.DB 17,253,144,242,165,171,69,189,240,5,169,32,32,106,254,76
+.DB 86,255,165,194,133,173,165,193,133,172,96,169,8,133,163,169
+.DB 0,133,164,133,168,133,155,133,169,96,165,189,74,169,96,144
+.DB 2,169,176,162,0,141,40,145,142,41,145,173,32,145,73,8
+.DB 141,32,145,41,8,96,56,102,173,48,60,165,168,208,18,169
+.DB 16,162,1,32,245,251,208,47,230,168,165,173,16,41,76,149
+.DB 252,165,169,208,9,32,241,251,208,29,230,169,208,25,32,234
+.DB 251,208,20,165,164,73,1,133,164,240,15,165,189,73,1,133
+.DB 189,41,1,69,155,133,155,76,86,255,70,189,198,163,165,163
+.DB 240,58,16,243,32,219,251,88,165,165,240,18,162,0,134,215
+.DB 198,165,166,190,224,2,208,2,9,128,133,189,208,217,32,17
+.DB 253,144,10,208,145,230,173,165,215,133,189,176,202,160,0,177
+.DB 172,133,189,69,215,133,215,32,27,253,208,187,165,155,73,1
+.DB 133,189,76,86,255,198,190,208,3,32,8,253,169,80,133,167
+.DB 162,8,120,32,251,252,208,234,169,120,32,243,251,208,227,198
+.DB 167,208,223,32,219,251,198,171,16,216,162,10,32,251,252,88
+.DB 230,171,165,190,240,48,32,210,251,162,9,134,165,208,133,8
+.DB 120,32,8,253,169,127,141,46,145,169,247,141,32,145,169,64
+.DB 141,43,145,32,57,254,173,160,2,240,9,141,21,3,173,159
+.DB 2,141,20,3,40,96,32,207,252,240,151,189,233,253,141,20
+.DB 3,189,234,253,141,21,3,96,173,28,145,9,14,141,28,145
+.DB 96,56,165,172,229,174,165,173,229,175,96,230,172,208,2,230
+.DB 173,96,162,255,120,154,216,32,63,253,208,3,108,0,160,32
+.DB 141,253,32,82,253,32,249,253,32,24,229,88,108,0,192,162
+.DB 5,189,76,253,221,3,160,208,3,202,208,245,96,65,48,195
+.DB 194,205,162,109,160,253,24,134,195,132,196,160,31,185,20,3
+.DB 176,2,177,195,145,195,153,20,3,136,16,241,96,191,234,210
+.DB 254,173,254,10,244,74,243,199,242,9,243,243,243,14,242,122
+.DB 242,112,247,245,241,239,243,210,254,73,245,133,246,169,0,170
+.DB 149,0,157,0,2,157,0,3,232,208,245,162,60,160,3,134
+.DB 178,132,179,133,193,133,151,141,129,2,168,169,4,133,194,230
+.DB 193,208,2,230,194,32,145,254,165,151,240,34,176,241,164,194
+.DB 166,193,192,32,144,37,192,33,176,8,160,30,140,136,2,76
+.DB 123,254,169,18,141,130,2,169,16,141,136,2,208,241,144,207
+.DB 165,194,141,130,2,133,151,201,17,144,196,32,195,229,76,235
+.DB 253,168,252,11,252,191,234,142,249,169,127,141,30,145,141,46
+.DB 145,169,64,141,43,145,169,64,141,27,145,169,254,141,28,145
+.DB 169,222,141,44,145,162,0,142,18,145,162,255,142,34,145,162
+.DB 0,142,35,145,162,128,142,19,145,162,0,142,31,145,32,132
+.DB 239,169,130,141,30,145,32,141,239,169,192,141,46,145,169,137
+.DB 141,36,145,169,66,141,37,145,96,133,183,134,187,132,188,96
+.DB 133,184,134,186,132,185,96,165,186,201,2,208,11,173,151,2
+.DB 169,0,141,151,2,96,133,157,165,144,5,144,133,144,96,141
+.DB 133,2,96,144,6,174,131,2,172,132,2,142,131,2,140,132
+.DB 2,96,144,6,174,129,2,172,130,2,142,129,2,140,130,2
+.DB 96,177,193,170,169,85,145,193,209,193,208,8,106,145,193,209
+.DB 193,208,1,169,24,138,145,193,96,120,108,24,3,72,138,72
+.DB 152,72,173,29,145,16,72,45,30,145,170,41,2,240,31,32
+.DB 63,253,208,3,108,2,160,44,17,145,32,52,247,32,225,255
+.DB 208,45,32,82,253,32,249,253,32,24,229,108,2,192,173,30
+.DB 145,9,128,72,169,127,141,30,145,138,41,64,240,20,169,206
+.DB 5,181,141,28,145,173,20,145,104,141,30,145,32,163,239,76
+.DB 86,255,138,41,32,240,37,173,16,145,41,1,133,167,173,24
+.DB 145,233,22,109,153,2,141,24,145,173,25,145,109,154,2,141
+.DB 25,145,104,141,30,145,32,54,240,76,86,255,138,41,16,240
+.DB 37,173,147,2,41,15,208,0,10,170,189,90,255,141,24,145
+.DB 189,91,255,141,25,145,173,16,145,104,9,32,41,239,141,30
+.DB 145,174,152,2,134,168,104,168,104,170,104,64,146,39,64,26
+.DB 198,17,116,14,238,12,69,6,241,2,70,1,184,0,113,0
+.DB 42,0,72,138,72,152,72,186,189,4,1,41,16,240,3,108
+.DB 22,3,108,20,3,255,255,255,255,255,76,82,253,76,87,253
+.DB 76,102,254,76,192,238,76,206,238,76,115,254,76,130,254,76
+.DB 30,235,76,111,254,76,25,239,76,228,238,76,246,238,76,4
+.DB 239,76,23,238,76,20,238,76,87,254,76,80,254,76,73,254
+.DB 108,26,3,108,28,3,108,30,3,108,32,3,108,34,3,108
+.DB 36,3,108,38,3,76,66,245,76,117,246,76,103,247,76,96
+.DB 247,108,40,3,108,42,3,108,44,3,76,52,247,76,5,229
+.DB 76,10,229,76,0,229,255,255,255,255,169,254,34,253,114,255
diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/labels.tmp b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/labels.tmp
new file mode 100644
index 00000000..65f03121
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/labels.tmp
@@ -0,0 +1,196 @@
+<ASSEMBLER_INFO>
+ <VERSION>2.1.43</VERSION>
+ <DEVICE>ATmega128</DEVICE>
+ <WORKING_DIR>E:\0_AVRProjects\AVR_6502\avr-vic20_1284p\AVRCODE</WORKING_DIR>
+ <INCLUDE_PATH>
+  <DIR></DIR>
+ </INCLUDE_PATH>
+ <SOURCE_FILE>VIC20.asm</SOURCE_FILE>
+ <INCLUDED_FILES>
+  <FILE>m128def.inc</FILE>
+  <FILE>macros.asm</FILE>
+  <FILE>6502cpu.asm</FILE>
+  <FILE>io.asm</FILE>
+  <FILE>init.asm</FILE>
+  <FILE>dbops.asm</FILE>
+  <FILE>kernal.asm</FILE>
+  <FILE>basic.asm</FILE>
+  <FILE>chars.asm</FILE>
+  <FILE>game.asm</FILE>
+ </INCLUDED_FILES>
+ <OBJECT_FILES>
+  <FILE>vic20.obj</FILE>
+ </OBJECT_FILES>
+ <HEX_FILES>
+  <FILE>vic20.hex</FILE>
+ </HEX_FILES>
+ <OUTPUT_FILES>
+  <FILE>vic20.map</FILE>
+  <FILE>vic20.lst</FILE>
+ </OUTPUT_FILES>
+ <LABELS>
+  <serial_buff><FILE>VIC20.asm</FILE><LINE>44</LINE></serial_buff>
+  <vram_text><FILE>VIC20.asm</FILE><LINE>47</LINE></vram_text>
+  <vram_address><FILE>VIC20.asm</FILE><LINE>48</LINE></vram_address>
+  <emu_status><FILE>VIC20.asm</FILE><LINE>85</LINE></emu_status>
+  <last_I><FILE>VIC20.asm</FILE><LINE>90</LINE></last_I>
+  <last_PC><FILE>VIC20.asm</FILE><LINE>92</LINE></last_PC>
+  <last_rsbyte><FILE>VIC20.asm</FILE><LINE>94</LINE></last_rsbyte>
+  <start><FILE>VIC20.asm</FILE><LINE>106</LINE></start>
+  <timer0_cmp><FILE>VIC20.asm</FILE><LINE>440</LINE></timer0_cmp>
+  <rx_rs232_0><FILE>VIC20.asm</FILE><LINE>473</LINE></rx_rs232_0>
+  <k><FILE>VIC20.asm</FILE><LINE>114</LINE></k>
+  <init_hardware><FILE>init.asm</FILE><LINE>1</LINE></init_hardware>
+  <load_chars_lcd><FILE>VIC20.asm</FILE><LINE>332</LINE></load_chars_lcd>
+  <load_kernal><FILE>VIC20.asm</FILE><LINE>259</LINE></load_kernal>
+  <load_basic><FILE>VIC20.asm</FILE><LINE>276</LINE></load_basic>
+  <load_chars><FILE>VIC20.asm</FILE><LINE>311</LINE></load_chars>
+  <load_game><FILE>VIC20.asm</FILE><LINE>293</LINE></load_game>
+  <skip><FILE>VIC20.asm</FILE><LINE>133</LINE></skip>
+  <next_op><FILE>VIC20.asm</FILE><LINE>191</LINE></next_op>
+  <Interupt_IRQ><FILE>VIC20.asm</FILE><LINE>532</LINE></Interupt_IRQ>
+  <opcode_jmps><FILE>VIC20.asm</FILE><LINE>679</LINE></opcode_jmps>
+  <breakpret><FILE>VIC20.asm</FILE><LINE>216</LINE></breakpret>
+  <breakp><FILE>VIC20.asm</FILE><LINE>252</LINE></breakp>
+  <kernal_rom><FILE>VIC20.asm</FILE><LINE>681</LINE></kernal_rom>
+  <load_kernal_loop1><FILE>VIC20.asm</FILE><LINE>265</LINE></load_kernal_loop1>
+  <load_kernal_loop2><FILE>VIC20.asm</FILE><LINE>267</LINE></load_kernal_loop2>
+  <basic_rom><FILE>VIC20.asm</FILE><LINE>683</LINE></basic_rom>
+  <load_basic_loop1><FILE>VIC20.asm</FILE><LINE>282</LINE></load_basic_loop1>
+  <load_basic_loop2><FILE>VIC20.asm</FILE><LINE>284</LINE></load_basic_loop2>
+  <game_rom><FILE>VIC20.asm</FILE><LINE>687</LINE></game_rom>
+  <load_game_loop1><FILE>VIC20.asm</FILE><LINE>299</LINE></load_game_loop1>
+  <load_game_loop2><FILE>VIC20.asm</FILE><LINE>301</LINE></load_game_loop2>
+  <char_rom><FILE>VIC20.asm</FILE><LINE>685</LINE></char_rom>
+  <load_char_loop1><FILE>VIC20.asm</FILE><LINE>317</LINE></load_char_loop1>
+  <load_char_loop2><FILE>VIC20.asm</FILE><LINE>319</LINE></load_char_loop2>
+  <lcd_send_data><FILE>io.asm</FILE><LINE>212</LINE></lcd_send_data>
+  <load_chars_lcd_loop1><FILE>VIC20.asm</FILE><LINE>359</LINE></load_chars_lcd_loop1>
+  <load_chars_lcd_loop2><FILE>VIC20.asm</FILE><LINE>361</LINE></load_chars_lcd_loop2>
+  <lcd_refresh><FILE>VIC20.asm</FILE><LINE>381</LINE></lcd_refresh>
+  <lcd_refresh_loop1><FILE>VIC20.asm</FILE><LINE>401</LINE></lcd_refresh_loop1>
+  <cursor_address><FILE>io.asm</FILE><LINE>38</LINE></cursor_address>
+  <lcd_set_cursor><FILE>io.asm</FILE><LINE>62</LINE></lcd_set_cursor>
+  <lcd_refresh_loop2><FILE>VIC20.asm</FILE><LINE>411</LINE></lcd_refresh_loop2>
+  <qwe><FILE>VIC20.asm</FILE><LINE>504</LINE></qwe>
+  <rs232_0_tx><FILE>VIC20.asm</FILE><LINE>513</LINE></rs232_0_tx>
+  <delay_1ms><FILE>VIC20.asm</FILE><LINE>642</LINE></delay_1ms>
+  <stack_build><FILE>6502cpu.asm</FILE><LINE>755</LINE></stack_build>
+  <vias_access><FILE>VIC20.asm</FILE><LINE>564</LINE></vias_access>
+  <keyboard_read><FILE>VIC20.asm</FILE><LINE>584</LINE></keyboard_read>
+  <vias_access_exit><FILE>VIC20.asm</FILE><LINE>577</LINE></vias_access_exit>
+  <keyboard_read_loop1><FILE>VIC20.asm</FILE><LINE>599</LINE></keyboard_read_loop1>
+  <keyboard_read_loop1_exit><FILE>VIC20.asm</FILE><LINE>606</LINE></keyboard_read_loop1_exit>
+  <keyboard_read_set_row><FILE>VIC20.asm</FILE><LINE>615</LINE></keyboard_read_set_row>
+  <keyboard_read_loop2><FILE>VIC20.asm</FILE><LINE>619</LINE></keyboard_read_loop2>
+  <keyboard_read_loop2_exit><FILE>VIC20.asm</FILE><LINE>627</LINE></keyboard_read_loop2_exit>
+  <delay_1ms1><FILE>VIC20.asm</FILE><LINE>647</LINE></delay_1ms1>
+  <delay_1ms1_loop><FILE>VIC20.asm</FILE><LINE>649</LINE></delay_1ms1_loop>
+  <delay_100ms><FILE>VIC20.asm</FILE><LINE>662</LINE></delay_100ms>
+  <delay_100ms_loop><FILE>VIC20.asm</FILE><LINE>665</LINE></delay_100ms_loop>
+  <op_ORA><FILE>6502cpu.asm</FILE><LINE>43</LINE></op_ORA>
+  <get_value_01><FILE>6502cpu.asm</FILE><LINE>553</LINE></get_value_01>
+  <op_AND><FILE>6502cpu.asm</FILE><LINE>50</LINE></op_AND>
+  <op_EOR><FILE>6502cpu.asm</FILE><LINE>59</LINE></op_EOR>
+  <op_ADC><FILE>6502cpu.asm</FILE><LINE>66</LINE></op_ADC>
+  <op_STA><FILE>6502cpu.asm</FILE><LINE>100</LINE></op_STA>
+  <op_LDA><FILE>6502cpu.asm</FILE><LINE>106</LINE></op_LDA>
+  <op_CMP><FILE>6502cpu.asm</FILE><LINE>115</LINE></op_CMP>
+  <op_SBC><FILE>6502cpu.asm</FILE><LINE>120</LINE></op_SBC>
+  <op_ASL><FILE>6502cpu.asm</FILE><LINE>173</LINE></op_ASL>
+  <get_value_10><FILE>6502cpu.asm</FILE><LINE>583</LINE></get_value_10>
+  <op_ROL><FILE>6502cpu.asm</FILE><LINE>181</LINE></op_ROL>
+  <op_LSR><FILE>6502cpu.asm</FILE><LINE>189</LINE></op_LSR>
+  <op_ROR><FILE>6502cpu.asm</FILE><LINE>195</LINE></op_ROR>
+  <op_STX><FILE>6502cpu.asm</FILE><LINE>203</LINE></op_STX>
+  <op_LDX><FILE>6502cpu.asm</FILE><LINE>209</LINE></op_LDX>
+  <op_DEC><FILE>6502cpu.asm</FILE><LINE>216</LINE></op_DEC>
+  <op_INC><FILE>6502cpu.asm</FILE><LINE>224</LINE></op_INC>
+  <op_BIT><FILE>6502cpu.asm</FILE><LINE>233</LINE></op_BIT>
+  <op_JMP><FILE>6502cpu.asm</FILE><LINE>261</LINE></op_JMP>
+  <op_JMPI><FILE>6502cpu.asm</FILE><LINE>270</LINE></op_JMPI>
+  <op_STY><FILE>6502cpu.asm</FILE><LINE>278</LINE></op_STY>
+  <op_LDY><FILE>6502cpu.asm</FILE><LINE>283</LINE></op_LDY>
+  <op_CPY><FILE>6502cpu.asm</FILE><LINE>289</LINE></op_CPY>
+  <op_CPX><FILE>6502cpu.asm</FILE><LINE>294</LINE></op_CPX>
+  <op_BPL><FILE>6502cpu.asm</FILE><LINE>302</LINE></op_BPL>
+  <Branch_take><FILE>6502cpu.asm</FILE><LINE>732</LINE></Branch_take>
+  <op_BMI><FILE>6502cpu.asm</FILE><LINE>309</LINE></op_BMI>
+  <op_BVC><FILE>6502cpu.asm</FILE><LINE>315</LINE></op_BVC>
+  <op_BVS><FILE>6502cpu.asm</FILE><LINE>322</LINE></op_BVS>
+  <op_BCC><FILE>6502cpu.asm</FILE><LINE>328</LINE></op_BCC>
+  <op_BCS><FILE>6502cpu.asm</FILE><LINE>334</LINE></op_BCS>
+  <op_BNE><FILE>6502cpu.asm</FILE><LINE>340</LINE></op_BNE>
+  <op_BEQ><FILE>6502cpu.asm</FILE><LINE>346</LINE></op_BEQ>
+  <op_BRK><FILE>6502cpu.asm</FILE><LINE>353</LINE></op_BRK>
+  <op_JSRA><FILE>6502cpu.asm</FILE><LINE>360</LINE></op_JSRA>
+  <op_RTI><FILE>6502cpu.asm</FILE><LINE>370</LINE></op_RTI>
+  <stack_decomp><FILE>6502cpu.asm</FILE><LINE>776</LINE></stack_decomp>
+  <op_RTS><FILE>6502cpu.asm</FILE><LINE>379</LINE></op_RTS>
+  <op_ASL_A><FILE>6502cpu.asm</FILE><LINE>389</LINE></op_ASL_A>
+  <op_ROL_A><FILE>6502cpu.asm</FILE><LINE>395</LINE></op_ROL_A>
+  <op_LSR_A><FILE>6502cpu.asm</FILE><LINE>404</LINE></op_LSR_A>
+  <op_ROR_A><FILE>6502cpu.asm</FILE><LINE>409</LINE></op_ROR_A>
+  <op_STX_ZPY><FILE>6502cpu.asm</FILE><LINE>417</LINE></op_STX_ZPY>
+  <get_value_ZP_idx_Y><FILE>6502cpu.asm</FILE><LINE>684</LINE></get_value_ZP_idx_Y>
+  <op_LDX_ZPY><FILE>6502cpu.asm</FILE><LINE>424</LINE></op_LDX_ZPY>
+  <op_LDX_XY><FILE>6502cpu.asm</FILE><LINE>431</LINE></op_LDX_XY>
+  <get_value_ZP_abs_idx_Y><FILE>6502cpu.asm</FILE><LINE>694</LINE></get_value_ZP_abs_idx_Y>
+  <op_PHP><FILE>6502cpu.asm</FILE><LINE>437</LINE></op_PHP>
+  <op_PLP><FILE>6502cpu.asm</FILE><LINE>442</LINE></op_PLP>
+  <op_PHA><FILE>6502cpu.asm</FILE><LINE>446</LINE></op_PHA>
+  <op_PLA><FILE>6502cpu.asm</FILE><LINE>449</LINE></op_PLA>
+  <op_DEY><FILE>6502cpu.asm</FILE><LINE>453</LINE></op_DEY>
+  <op_TAY><FILE>6502cpu.asm</FILE><LINE>459</LINE></op_TAY>
+  <op_INY><FILE>6502cpu.asm</FILE><LINE>466</LINE></op_INY>
+  <op_INX><FILE>6502cpu.asm</FILE><LINE>472</LINE></op_INX>
+  <op_CLC><FILE>6502cpu.asm</FILE><LINE>478</LINE></op_CLC>
+  <op_SEC><FILE>6502cpu.asm</FILE><LINE>483</LINE></op_SEC>
+  <op_CLI><FILE>6502cpu.asm</FILE><LINE>488</LINE></op_CLI>
+  <op_SEI><FILE>6502cpu.asm</FILE><LINE>493</LINE></op_SEI>
+  <op_TYA><FILE>6502cpu.asm</FILE><LINE>498</LINE></op_TYA>
+  <op_CLV><FILE>6502cpu.asm</FILE><LINE>503</LINE></op_CLV>
+  <op_CLD><FILE>6502cpu.asm</FILE><LINE>509</LINE></op_CLD>
+  <op_SED><FILE>6502cpu.asm</FILE><LINE>514</LINE></op_SED>
+  <op_TXA><FILE>6502cpu.asm</FILE><LINE>519</LINE></op_TXA>
+  <op_TXS><FILE>6502cpu.asm</FILE><LINE>524</LINE></op_TXS>
+  <op_TAX><FILE>6502cpu.asm</FILE><LINE>529</LINE></op_TAX>
+  <op_TSX><FILE>6502cpu.asm</FILE><LINE>535</LINE></op_TSX>
+  <op_DEX><FILE>6502cpu.asm</FILE><LINE>541</LINE></op_DEX>
+  <op_NOP><FILE>6502cpu.asm</FILE><LINE>546</LINE></op_NOP>
+  <get_value_ZP_inx_X_indirj><FILE>6502cpu.asm</FILE><LINE>604</LINE></get_value_ZP_inx_X_indirj>
+  <get_value_ZPj><FILE>6502cpu.asm</FILE><LINE>606</LINE></get_value_ZPj>
+  <get_value_imedj><FILE>6502cpu.asm</FILE><LINE>608</LINE></get_value_imedj>
+  <get_value_absj><FILE>6502cpu.asm</FILE><LINE>610</LINE></get_value_absj>
+  <get_value_ZP_indir_idx_Yj><FILE>6502cpu.asm</FILE><LINE>612</LINE></get_value_ZP_indir_idx_Yj>
+  <get_value_ZP_idx_Xj><FILE>6502cpu.asm</FILE><LINE>614</LINE></get_value_ZP_idx_Xj>
+  <get_value_ZP_abs_idx_Yj><FILE>6502cpu.asm</FILE><LINE>618</LINE></get_value_ZP_abs_idx_Yj>
+  <get_value_ZP_abs_idx_Xj><FILE>6502cpu.asm</FILE><LINE>620</LINE></get_value_ZP_abs_idx_Xj>
+  <get_value_accumj><FILE>6502cpu.asm</FILE><LINE>622</LINE></get_value_accumj>
+  <get_value_ZP_inx_X_indir><FILE>6502cpu.asm</FILE><LINE>626</LINE></get_value_ZP_inx_X_indir>
+  <get_value_ZP><FILE>6502cpu.asm</FILE><LINE>640</LINE></get_value_ZP>
+  <get_value_imed><FILE>6502cpu.asm</FILE><LINE>649</LINE></get_value_imed>
+  <get_value_abs><FILE>6502cpu.asm</FILE><LINE>653</LINE></get_value_abs>
+  <get_value_ZP_indir_idx_Y><FILE>6502cpu.asm</FILE><LINE>660</LINE></get_value_ZP_indir_idx_Y>
+  <get_value_ZP_idx_X><FILE>6502cpu.asm</FILE><LINE>673</LINE></get_value_ZP_idx_X>
+  <get_value_ZP_idx_Yj><FILE>6502cpu.asm</FILE><LINE>616</LINE></get_value_ZP_idx_Yj>
+  <get_value_ZP_abs_idx_X><FILE>6502cpu.asm</FILE><LINE>704</LINE></get_value_ZP_abs_idx_X>
+  <get_value_accum><FILE>6502cpu.asm</FILE><LINE>714</LINE></get_value_accum>
+  <op_INVALID><FILE>6502cpu.asm</FILE><LINE>781</LINE></op_INVALID>
+  <p><FILE>6502cpu.asm</FILE><LINE>786</LINE></p>
+  <lcd_debug><FILE>io.asm</FILE><LINE>1</LINE></lcd_debug>
+  <lcd_debug_rx_wait><FILE>io.asm</FILE><LINE>3</LINE></lcd_debug_rx_wait>
+  <lcd_debug_rx_wait1><FILE>io.asm</FILE><LINE>10</LINE></lcd_debug_rx_wait1>
+  <lcd_debug_TX><FILE>io.asm</FILE><LINE>20</LINE></lcd_debug_TX>
+  <lcd_print_chr><FILE>io.asm</FILE><LINE>93</LINE></lcd_print_chr>
+  <lcd_print_chr_cursor><FILE>io.asm</FILE><LINE>149</LINE></lcd_print_chr_cursor>
+  <bias_inc><FILE>io.asm</FILE><LINE>268</LINE></bias_inc>
+  <bias_reset><FILE>io.asm</FILE><LINE>296</LINE></bias_reset>
+  <lcd_reset><FILE>io.asm</FILE><LINE>335</LINE></lcd_reset>
+  <bias_loop><FILE>init.asm</FILE><LINE>86</LINE></bias_loop>
+  <lcd_init><FILE>init.asm</FILE><LINE>158</LINE></lcd_init>
+  <clear_text_ram><FILE>init.asm</FILE><LINE>98</LINE></clear_text_ram>
+  <clear_text_ram_l1><FILE>init.asm</FILE><LINE>118</LINE></clear_text_ram_l1>
+  <clear_text_ram_l2><FILE>init.asm</FILE><LINE>120</LINE></clear_text_ram_l2>
+ </LABELS>
+</ASSEMBLER_INFO>
diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/m1284Pdef.inc b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/m1284Pdef.inc
new file mode 100644
index 00000000..7bf6302e
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/m1284Pdef.inc
@@ -0,0 +1,1225 @@
+;***** THIS IS A MACHINE GENERATED FILE - DO NOT EDIT ********************
+;***** Created: 2011-02-09 12:03 ******* Source: ATmega1284P.xml *********
+;*************************************************************************
+;* A P P L I C A T I O N   N O T E   F O R   T H E   A V R   F A M I L Y
+;* 
+;* Number            : AVR000
+;* File Name         : "m1284Pdef.inc"
+;* Title             : Register/Bit Definitions for the ATmega1284P
+;* Date              : 2011-02-09
+;* Version           : 2.35
+;* Support E-mail    : avr@atmel.com
+;* Target MCU        : ATmega1284P
+;* 
+;* DESCRIPTION
+;* When including this file in the assembly program file, all I/O register 
+;* names and I/O register bit names appearing in the data book can be used.
+;* In addition, the six registers forming the three data pointers X, Y and 
+;* Z have been assigned names XL - ZH. Highest RAM address for Internal 
+;* SRAM is also defined 
+;* 
+;* The Register names are represented by their hexadecimal address.
+;* 
+;* The Register Bit names are represented by their bit number (0-7).
+;* 
+;* Please observe the difference in using the bit names with instructions
+;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc"
+;* (skip if bit in register set/cleared). The following example illustrates
+;* this:
+;* 
+;* in    r16,PORTB             ;read PORTB latch
+;* sbr   r16,(1<<PB6)+(1<<PB5) ;set PB6 and PB5 (use masks, not bit#)
+;* out   PORTB,r16             ;output to PORTB
+;* 
+;* in    r16,TIFR              ;read the Timer Interrupt Flag Register
+;* sbrc  r16,TOV0              ;test the overflow flag (use bit#)
+;* rjmp  TOV0_is_set           ;jump if set
+;* ...                         ;otherwise do something else
+;*************************************************************************
+
+#ifndef _M1284PDEF_INC_
+#define _M1284PDEF_INC_
+
+
+#pragma partinc 0
+
+; ***** SPECIFY DEVICE ***************************************************
+.device ATmega1284P
+#pragma AVRPART ADMIN PART_NAME ATmega1284P
+.equ	SIGNATURE_000	= 0x1e
+.equ	SIGNATURE_001	= 0x97
+.equ	SIGNATURE_002	= 0x05
+
+#pragma AVRPART CORE CORE_VERSION V2E
+
+
+; ***** I/O REGISTER DEFINITIONS *****************************************
+; NOTE:
+; Definitions marked "MEMORY MAPPED"are extended I/O ports
+; and cannot be used with IN/OUT instructions
+.equ	UDR1	= 0xce	; MEMORY MAPPED
+.equ	UBRR1L	= 0xcc	; MEMORY MAPPED
+.equ	UBRR1H	= 0xcd	; MEMORY MAPPED
+.equ	UCSR1C	= 0xca	; MEMORY MAPPED
+.equ	UCSR1B	= 0xc9	; MEMORY MAPPED
+.equ	UCSR1A	= 0xc8	; MEMORY MAPPED
+.equ	UDR0	= 0xc6	; MEMORY MAPPED
+.equ	UBRR0L	= 0xc4	; MEMORY MAPPED
+.equ	UBRR0H	= 0xc5	; MEMORY MAPPED
+.equ	UCSR0C	= 0xc2	; MEMORY MAPPED
+.equ	UCSR0B	= 0xc1	; MEMORY MAPPED
+.equ	UCSR0A	= 0xc0	; MEMORY MAPPED
+.equ	TWAMR	= 0xbd	; MEMORY MAPPED
+.equ	TWCR	= 0xbc	; MEMORY MAPPED
+.equ	TWDR	= 0xbb	; MEMORY MAPPED
+.equ	TWAR	= 0xba	; MEMORY MAPPED
+.equ	TWSR	= 0xb9	; MEMORY MAPPED
+.equ	TWBR	= 0xb8	; MEMORY MAPPED
+.equ	ASSR	= 0xb6	; MEMORY MAPPED
+.equ	OCR2B	= 0xb4	; MEMORY MAPPED
+.equ	OCR2A	= 0xb3	; MEMORY MAPPED
+.equ	TCNT2	= 0xb2	; MEMORY MAPPED
+.equ	TCCR2B	= 0xb1	; MEMORY MAPPED
+.equ	TCCR2A	= 0xb0	; MEMORY MAPPED
+.equ	OCR3BL	= 0x9a	; MEMORY MAPPED
+.equ	OCR3BH	= 0x9b	; MEMORY MAPPED
+.equ	OCR3AL	= 0x98	; MEMORY MAPPED
+.equ	OCR3AH	= 0x99	; MEMORY MAPPED
+.equ	ICR3L	= 0x96	; MEMORY MAPPED
+.equ	ICR3H	= 0x97	; MEMORY MAPPED
+.equ	TCNT3L	= 0x94	; MEMORY MAPPED
+.equ	TCNT3H	= 0x95	; MEMORY MAPPED
+.equ	TCCR3C	= 0x92	; MEMORY MAPPED
+.equ	TCCR3B	= 0x91	; MEMORY MAPPED
+.equ	TCCR3A	= 0x90	; MEMORY MAPPED
+.equ	OCR1BL	= 0x8a	; MEMORY MAPPED
+.equ	OCR1BH	= 0x8b	; MEMORY MAPPED
+.equ	OCR1AL	= 0x88	; MEMORY MAPPED
+.equ	OCR1AH	= 0x89	; MEMORY MAPPED
+.equ	ICR1L	= 0x86	; MEMORY MAPPED
+.equ	ICR1H	= 0x87	; MEMORY MAPPED
+.equ	TCNT1L	= 0x84	; MEMORY MAPPED
+.equ	TCNT1H	= 0x85	; MEMORY MAPPED
+.equ	TCCR1C	= 0x82	; MEMORY MAPPED
+.equ	TCCR1B	= 0x81	; MEMORY MAPPED
+.equ	TCCR1A	= 0x80	; MEMORY MAPPED
+.equ	DIDR1	= 0x7f	; MEMORY MAPPED
+.equ	DIDR0	= 0x7e	; MEMORY MAPPED
+.equ	ADMUX	= 0x7c	; MEMORY MAPPED
+.equ	ADCSRB	= 0x7b	; MEMORY MAPPED
+.equ	ADCSRA	= 0x7a	; MEMORY MAPPED
+.equ	ADCH	= 0x79	; MEMORY MAPPED
+.equ	ADCL	= 0x78	; MEMORY MAPPED
+.equ	PCMSK3	= 0x73	; MEMORY MAPPED
+.equ	TIMSK3	= 0x71	; MEMORY MAPPED
+.equ	TIMSK2	= 0x70	; MEMORY MAPPED
+.equ	TIMSK1	= 0x6f	; MEMORY MAPPED
+.equ	TIMSK0	= 0x6e	; MEMORY MAPPED
+.equ	PCMSK2	= 0x6d	; MEMORY MAPPED
+.equ	PCMSK1	= 0x6c	; MEMORY MAPPED
+.equ	PCMSK0	= 0x6b	; MEMORY MAPPED
+.equ	EICRA	= 0x69	; MEMORY MAPPED
+.equ	PCICR	= 0x68	; MEMORY MAPPED
+.equ	OSCCAL	= 0x66	; MEMORY MAPPED
+.equ	PRR1	= 0x65	; MEMORY MAPPED
+.equ	PRR0	= 0x64	; MEMORY MAPPED
+.equ	CLKPR	= 0x61	; MEMORY MAPPED
+.equ	WDTCSR	= 0x60	; MEMORY MAPPED
+.equ	SREG	= 0x3f
+.equ	SPL	= 0x3d
+.equ	SPH	= 0x3e
+.equ	RAMPZ	= 0x3b
+.equ	SPMCSR	= 0x37
+.equ	MCUCR	= 0x35
+.equ	MCUSR	= 0x34
+.equ	SMCR	= 0x33
+.equ	OCDR	= 0x31
+.equ	ACSR	= 0x30
+.equ	SPDR	= 0x2e
+.equ	SPSR	= 0x2d
+.equ	SPCR	= 0x2c
+.equ	GPIOR2	= 0x2b
+.equ	GPIOR1	= 0x2a
+.equ	OCR0B	= 0x28
+.equ	OCR0A	= 0x27
+.equ	TCNT0	= 0x26
+.equ	TCCR0B	= 0x25
+.equ	TCCR0A	= 0x24
+.equ	GTCCR	= 0x23
+.equ	EEARH	= 0x22
+.equ	EEARL	= 0x21
+.equ	EEDR	= 0x20
+.equ	EECR	= 0x1f
+.equ	GPIOR0	= 0x1e
+.equ	EIMSK	= 0x1d
+.equ	EIFR	= 0x1c
+.equ	PCIFR	= 0x1b
+.equ	TIFR3	= 0x18
+.equ	TIFR2	= 0x17
+.equ	TIFR1	= 0x16
+.equ	TIFR0	= 0x15
+.equ	PORTD	= 0x0b
+.equ	DDRD	= 0x0a
+.equ	PIND	= 0x09
+.equ	PORTC	= 0x08
+.equ	DDRC	= 0x07
+.equ	PINC	= 0x06
+.equ	PORTB	= 0x05
+.equ	DDRB	= 0x04
+.equ	PINB	= 0x03
+.equ	PORTA	= 0x02
+.equ	DDRA	= 0x01
+.equ	PINA	= 0x00
+
+
+; ***** BIT DEFINITIONS **************************************************
+
+; ***** ANALOG_COMPARATOR ************
+; ADCSRB - ADC Control and Status Register B
+.equ	ACME	= 6	; Analog Comparator Multiplexer Enable
+
+; ACSR - Analog Comparator Control And Status Register
+.equ	ACIS0	= 0	; Analog Comparator Interrupt Mode Select bit 0
+.equ	ACIS1	= 1	; Analog Comparator Interrupt Mode Select bit 1
+.equ	ACIC	= 2	; Analog Comparator Input Capture Enable
+.equ	ACIE	= 3	; Analog Comparator Interrupt Enable
+.equ	ACI	= 4	; Analog Comparator Interrupt Flag
+.equ	ACO	= 5	; Analog Compare Output
+.equ	ACBG	= 6	; Analog Comparator Bandgap Select
+.equ	ACD	= 7	; Analog Comparator Disable
+
+; DIDR1 - Digital Input Disable Register 1
+.equ	AIN0D	= 0	; AIN0 Digital Input Disable
+.equ	AIN1D	= 1	; AIN1 Digital Input Disable
+
+
+; ***** USART0 ***********************
+; UDR0 - USART I/O Data Register
+.equ	UDR0_0	= 0	; USART I/O Data Register bit 0
+.equ	UDR0_1	= 1	; USART I/O Data Register bit 1
+.equ	UDR0_2	= 2	; USART I/O Data Register bit 2
+.equ	UDR0_3	= 3	; USART I/O Data Register bit 3
+.equ	UDR0_4	= 4	; USART I/O Data Register bit 4
+.equ	UDR0_5	= 5	; USART I/O Data Register bit 5
+.equ	UDR0_6	= 6	; USART I/O Data Register bit 6
+.equ	UDR0_7	= 7	; USART I/O Data Register bit 7
+
+; UCSR0A - USART Control and Status Register A
+.equ	MPCM0	= 0	; Multi-processor Communication Mode
+.equ	U2X0	= 1	; Double the USART transmission speed
+.equ	UPE0	= 2	; Parity Error
+.equ	DOR0	= 3	; Data overRun
+.equ	FE0	= 4	; Framing Error
+.equ	UDRE0	= 5	; USART Data Register Empty
+.equ	TXC0	= 6	; USART Transmitt Complete
+.equ	RXC0	= 7	; USART Receive Complete
+
+; UCSR0B - USART Control and Status Register B
+.equ	TXB80	= 0	; Transmit Data Bit 8
+.equ	RXB80	= 1	; Receive Data Bit 8
+.equ	UCSZ02	= 2	; Character Size
+.equ	TXEN0	= 3	; Transmitter Enable
+.equ	RXEN0	= 4	; Receiver Enable
+.equ	UDRIE0	= 5	; USART Data register Empty Interrupt Enable
+.equ	TXCIE0	= 6	; TX Complete Interrupt Enable
+.equ	RXCIE0	= 7	; RX Complete Interrupt Enable
+
+; UCSR0C - USART Control and Status Register C
+.equ	UCPOL0	= 0	; Clock Polarity
+.equ	UCSZ00	= 1	; Character Size
+.equ	UCPHA0	= UCSZ00	; For compatibility
+.equ	UCSZ01	= 2	; Character Size
+.equ	UDORD0	= UCSZ01	; For compatibility
+.equ	USBS0	= 3	; Stop Bit Select
+.equ	UPM00	= 4	; Parity Mode Bit 0
+.equ	UPM01	= 5	; Parity Mode Bit 1
+.equ	UMSEL00	= 6	; USART Mode Select
+.equ	UMSEL0	= UMSEL00	; For compatibility
+.equ	UMSEL01	= 7	; USART Mode Select
+.equ	UMSEL1	= UMSEL01	; For compatibility
+
+; UBRR0H - USART Baud Rate Register High Byte
+.equ	UBRR8	= 0	; USART Baud Rate Register bit 8
+.equ	UBRR9	= 1	; USART Baud Rate Register bit 9
+.equ	UBRR10	= 2	; USART Baud Rate Register bit 10
+.equ	UBRR11	= 3	; USART Baud Rate Register bit 11
+
+; UBRR0L - USART Baud Rate Register Low Byte
+.equ	_UBRR0	= 0	; USART Baud Rate Register bit 0
+.equ	_UBRR1	= 1	; USART Baud Rate Register bit 1
+.equ	UBRR2	= 2	; USART Baud Rate Register bit 2
+.equ	UBRR3	= 3	; USART Baud Rate Register bit 3
+.equ	UBRR4	= 4	; USART Baud Rate Register bit 4
+.equ	UBRR5	= 5	; USART Baud Rate Register bit 5
+.equ	UBRR6	= 6	; USART Baud Rate Register bit 6
+.equ	UBRR7	= 7	; USART Baud Rate Register bit 7
+
+
+; ***** PORTA ************************
+; PORTA - Port A Data Register
+.equ	PORTA0	= 0	; Port A Data Register bit 0
+.equ	PA0	= 0	; For compatibility
+.equ	PORTA1	= 1	; Port A Data Register bit 1
+.equ	PA1	= 1	; For compatibility
+.equ	PORTA2	= 2	; Port A Data Register bit 2
+.equ	PA2	= 2	; For compatibility
+.equ	PORTA3	= 3	; Port A Data Register bit 3
+.equ	PA3	= 3	; For compatibility
+.equ	PORTA4	= 4	; Port A Data Register bit 4
+.equ	PA4	= 4	; For compatibility
+.equ	PORTA5	= 5	; Port A Data Register bit 5
+.equ	PA5	= 5	; For compatibility
+.equ	PORTA6	= 6	; Port A Data Register bit 6
+.equ	PA6	= 6	; For compatibility
+.equ	PORTA7	= 7	; Port A Data Register bit 7
+.equ	PA7	= 7	; For compatibility
+
+; DDRA - Port A Data Direction Register
+.equ	DDA0	= 0	; Data Direction Register, Port A, bit 0
+.equ	DDA1	= 1	; Data Direction Register, Port A, bit 1
+.equ	DDA2	= 2	; Data Direction Register, Port A, bit 2
+.equ	DDA3	= 3	; Data Direction Register, Port A, bit 3
+.equ	DDA4	= 4	; Data Direction Register, Port A, bit 4
+.equ	DDA5	= 5	; Data Direction Register, Port A, bit 5
+.equ	DDA6	= 6	; Data Direction Register, Port A, bit 6
+.equ	DDA7	= 7	; Data Direction Register, Port A, bit 7
+
+; PINA - Port A Input Pins
+.equ	PINA0	= 0	; Input Pins, Port A bit 0
+.equ	PINA1	= 1	; Input Pins, Port A bit 1
+.equ	PINA2	= 2	; Input Pins, Port A bit 2
+.equ	PINA3	= 3	; Input Pins, Port A bit 3
+.equ	PINA4	= 4	; Input Pins, Port A bit 4
+.equ	PINA5	= 5	; Input Pins, Port A bit 5
+.equ	PINA6	= 6	; Input Pins, Port A bit 6
+.equ	PINA7	= 7	; Input Pins, Port A bit 7
+
+
+; ***** PORTB ************************
+; PORTB - Port B Data Register
+.equ	PORTB0	= 0	; Port B Data Register bit 0
+.equ	PB0	= 0	; For compatibility
+.equ	PORTB1	= 1	; Port B Data Register bit 1
+.equ	PB1	= 1	; For compatibility
+.equ	PORTB2	= 2	; Port B Data Register bit 2
+.equ	PB2	= 2	; For compatibility
+.equ	PORTB3	= 3	; Port B Data Register bit 3
+.equ	PB3	= 3	; For compatibility
+.equ	PORTB4	= 4	; Port B Data Register bit 4
+.equ	PB4	= 4	; For compatibility
+.equ	PORTB5	= 5	; Port B Data Register bit 5
+.equ	PB5	= 5	; For compatibility
+.equ	PORTB6	= 6	; Port B Data Register bit 6
+.equ	PB6	= 6	; For compatibility
+.equ	PORTB7	= 7	; Port B Data Register bit 7
+.equ	PB7	= 7	; For compatibility
+
+; DDRB - Port B Data Direction Register
+.equ	DDB0	= 0	; Port B Data Direction Register bit 0
+.equ	DDB1	= 1	; Port B Data Direction Register bit 1
+.equ	DDB2	= 2	; Port B Data Direction Register bit 2
+.equ	DDB3	= 3	; Port B Data Direction Register bit 3
+.equ	DDB4	= 4	; Port B Data Direction Register bit 4
+.equ	DDB5	= 5	; Port B Data Direction Register bit 5
+.equ	DDB6	= 6	; Port B Data Direction Register bit 6
+.equ	DDB7	= 7	; Port B Data Direction Register bit 7
+
+; PINB - Port B Input Pins
+.equ	PINB0	= 0	; Port B Input Pins bit 0
+.equ	PINB1	= 1	; Port B Input Pins bit 1
+.equ	PINB2	= 2	; Port B Input Pins bit 2
+.equ	PINB3	= 3	; Port B Input Pins bit 3
+.equ	PINB4	= 4	; Port B Input Pins bit 4
+.equ	PINB5	= 5	; Port B Input Pins bit 5
+.equ	PINB6	= 6	; Port B Input Pins bit 6
+.equ	PINB7	= 7	; Port B Input Pins bit 7
+
+
+; ***** PORTC ************************
+; PORTC - Port C Data Register
+.equ	PORTC0	= 0	; Port C Data Register bit 0
+.equ	PC0	= 0	; For compatibility
+.equ	PORTC1	= 1	; Port C Data Register bit 1
+.equ	PC1	= 1	; For compatibility
+.equ	PORTC2	= 2	; Port C Data Register bit 2
+.equ	PC2	= 2	; For compatibility
+.equ	PORTC3	= 3	; Port C Data Register bit 3
+.equ	PC3	= 3	; For compatibility
+.equ	PORTC4	= 4	; Port C Data Register bit 4
+.equ	PC4	= 4	; For compatibility
+.equ	PORTC5	= 5	; Port C Data Register bit 5
+.equ	PC5	= 5	; For compatibility
+.equ	PORTC6	= 6	; Port C Data Register bit 6
+.equ	PC6	= 6	; For compatibility
+.equ	PORTC7	= 7	; Port C Data Register bit 7
+.equ	PC7	= 7	; For compatibility
+
+; DDRC - Port C Data Direction Register
+.equ	DDC0	= 0	; Port C Data Direction Register bit 0
+.equ	DDC1	= 1	; Port C Data Direction Register bit 1
+.equ	DDC2	= 2	; Port C Data Direction Register bit 2
+.equ	DDC3	= 3	; Port C Data Direction Register bit 3
+.equ	DDC4	= 4	; Port C Data Direction Register bit 4
+.equ	DDC5	= 5	; Port C Data Direction Register bit 5
+.equ	DDC6	= 6	; Port C Data Direction Register bit 6
+.equ	DDC7	= 7	; Port C Data Direction Register bit 7
+
+; PINC - Port C Input Pins
+.equ	PINC0	= 0	; Port C Input Pins bit 0
+.equ	PINC1	= 1	; Port C Input Pins bit 1
+.equ	PINC2	= 2	; Port C Input Pins bit 2
+.equ	PINC3	= 3	; Port C Input Pins bit 3
+.equ	PINC4	= 4	; Port C Input Pins bit 4
+.equ	PINC5	= 5	; Port C Input Pins bit 5
+.equ	PINC6	= 6	; Port C Input Pins bit 6
+.equ	PINC7	= 7	; Port C Input Pins bit 7
+
+
+; ***** PORTD ************************
+; PORTD - Port D Data Register
+.equ	PORTD0	= 0	; Port D Data Register bit 0
+.equ	PD0	= 0	; For compatibility
+.equ	PORTD1	= 1	; Port D Data Register bit 1
+.equ	PD1	= 1	; For compatibility
+.equ	PORTD2	= 2	; Port D Data Register bit 2
+.equ	PD2	= 2	; For compatibility
+.equ	PORTD3	= 3	; Port D Data Register bit 3
+.equ	PD3	= 3	; For compatibility
+.equ	PORTD4	= 4	; Port D Data Register bit 4
+.equ	PD4	= 4	; For compatibility
+.equ	PORTD5	= 5	; Port D Data Register bit 5
+.equ	PD5	= 5	; For compatibility
+.equ	PORTD6	= 6	; Port D Data Register bit 6
+.equ	PD6	= 6	; For compatibility
+.equ	PORTD7	= 7	; Port D Data Register bit 7
+.equ	PD7	= 7	; For compatibility
+
+; DDRD - Port D Data Direction Register
+.equ	DDD0	= 0	; Port D Data Direction Register bit 0
+.equ	DDD1	= 1	; Port D Data Direction Register bit 1
+.equ	DDD2	= 2	; Port D Data Direction Register bit 2
+.equ	DDD3	= 3	; Port D Data Direction Register bit 3
+.equ	DDD4	= 4	; Port D Data Direction Register bit 4
+.equ	DDD5	= 5	; Port D Data Direction Register bit 5
+.equ	DDD6	= 6	; Port D Data Direction Register bit 6
+.equ	DDD7	= 7	; Port D Data Direction Register bit 7
+
+; PIND - Port D Input Pins
+.equ	PIND0	= 0	; Port D Input Pins bit 0
+.equ	PIND1	= 1	; Port D Input Pins bit 1
+.equ	PIND2	= 2	; Port D Input Pins bit 2
+.equ	PIND3	= 3	; Port D Input Pins bit 3
+.equ	PIND4	= 4	; Port D Input Pins bit 4
+.equ	PIND5	= 5	; Port D Input Pins bit 5
+.equ	PIND6	= 6	; Port D Input Pins bit 6
+.equ	PIND7	= 7	; Port D Input Pins bit 7
+
+
+; ***** TIMER_COUNTER_0 **************
+; TIMSK0 - Timer/Counter0 Interrupt Mask Register
+.equ	TOIE0	= 0	; Timer/Counter0 Overflow Interrupt Enable
+.equ	OCIE0A	= 1	; Timer/Counter0 Output Compare Match A Interrupt Enable
+.equ	OCIE0B	= 2	; Timer/Counter0 Output Compare Match B Interrupt Enable
+
+; TIFR0 - Timer/Counter0 Interrupt Flag register
+.equ	TOV0	= 0	; Timer/Counter0 Overflow Flag
+.equ	OCF0A	= 1	; Timer/Counter0 Output Compare Flag 0A
+.equ	OCF0B	= 2	; Timer/Counter0 Output Compare Flag 0B
+
+; TCCR0A - Timer/Counter  Control Register A
+.equ	WGM00	= 0	; Waveform Generation Mode
+.equ	WGM01	= 1	; Waveform Generation Mode
+.equ	COM0B0	= 4	; Compare Output Mode, Fast PWm
+.equ	COM0B1	= 5	; Compare Output Mode, Fast PWm
+.equ	COM0A0	= 6	; Compare Output Mode, Phase Correct PWM Mode
+.equ	COM0A1	= 7	; Compare Output Mode, Phase Correct PWM Mode
+
+; TCCR0B - Timer/Counter Control Register B
+.equ	CS00	= 0	; Clock Select
+.equ	CS01	= 1	; Clock Select
+.equ	CS02	= 2	; Clock Select
+.equ	WGM02	= 3	; 
+.equ	FOC0B	= 6	; Force Output Compare B
+.equ	FOC0A	= 7	; Force Output Compare A
+
+; TCNT0 - Timer/Counter0
+.equ	TCNT0_0	= 0	; 
+.equ	TCNT0_1	= 1	; 
+.equ	TCNT0_2	= 2	; 
+.equ	TCNT0_3	= 3	; 
+.equ	TCNT0_4	= 4	; 
+.equ	TCNT0_5	= 5	; 
+.equ	TCNT0_6	= 6	; 
+.equ	TCNT0_7	= 7	; 
+
+; OCR0A - Timer/Counter0 Output Compare Register
+.equ	OCR0A_0	= 0	; 
+.equ	OCR0A_1	= 1	; 
+.equ	OCR0A_2	= 2	; 
+.equ	OCR0A_3	= 3	; 
+.equ	OCR0A_4	= 4	; 
+.equ	OCR0A_5	= 5	; 
+.equ	OCR0A_6	= 6	; 
+.equ	OCR0A_7	= 7	; 
+
+; OCR0B - Timer/Counter0 Output Compare Register
+.equ	OCR0B_0	= 0	; 
+.equ	OCR0B_1	= 1	; 
+.equ	OCR0B_2	= 2	; 
+.equ	OCR0B_3	= 3	; 
+.equ	OCR0B_4	= 4	; 
+.equ	OCR0B_5	= 5	; 
+.equ	OCR0B_6	= 6	; 
+.equ	OCR0B_7	= 7	; 
+
+; GTCCR - General Timer/Counter Control Register
+.equ	PSRSYNC	= 0	; Prescaler Reset Timer/Counter1 and Timer/Counter0
+.equ	PSR10	= PSRSYNC	; For compatibility
+.equ	TSM	= 7	; Timer/Counter Synchronization Mode
+
+
+; ***** TIMER_COUNTER_1 **************
+; TIMSK1 - Timer/Counter1 Interrupt Mask Register
+.equ	TOIE1	= 0	; Timer/Counter1 Overflow Interrupt Enable
+.equ	OCIE1A	= 1	; Timer/Counter1 Output Compare A Match Interrupt Enable
+.equ	OCIE1B	= 2	; Timer/Counter1 Output Compare B Match Interrupt Enable
+.equ	ICIE1	= 5	; Timer/Counter1 Input Capture Interrupt Enable
+
+; TIFR1 - Timer/Counter Interrupt Flag register
+.equ	TOV1	= 0	; Timer/Counter1 Overflow Flag
+.equ	OCF1A	= 1	; Timer/Counter1 Output Compare A Match Flag
+.equ	OCF1B	= 2	; Timer/Counter1 Output Compare B Match Flag
+.equ	ICF1	= 5	; Timer/Counter1 Input Capture Flag
+
+; TCCR1A - Timer/Counter1 Control Register A
+.equ	WGM10	= 0	; Pulse Width Modulator Select Bit 0
+.equ	PWM10	= WGM10	; For compatibility
+.equ	WGM11	= 1	; Pulse Width Modulator Select Bit 1
+.equ	PWM11	= WGM11	; For compatibility
+.equ	COM1B0	= 4	; Comparet Ouput Mode 1B, bit 0
+.equ	COM1B1	= 5	; Compare Output Mode 1B, bit 1
+.equ	COM1A0	= 6	; Comparet Ouput Mode 1A, bit 0
+.equ	COM1A1	= 7	; Compare Output Mode 1A, bit 1
+
+; TCCR1B - Timer/Counter1 Control Register B
+.equ	CS10	= 0	; Clock Select bit 0
+.equ	CS11	= 1	; Clock Select 1 bit 1
+.equ	CS12	= 2	; Clock Select1 bit 2
+.equ	WGM12	= 3	; Waveform Generation Mode Bit 2
+.equ	CTC1	= WGM12	; For compatibility
+.equ	WGM13	= 4	; Waveform Generation Mode Bit 3
+.equ	ICES1	= 6	; Input Capture 1 Edge Select
+.equ	ICNC1	= 7	; Input Capture 1 Noise Canceler
+
+; TCCR1C - Timer/Counter1 Control Register C
+.equ	FOC1B	= 6	; Force Output Compare for Channel B
+.equ	FOC1A	= 7	; Force Output Compare for Channel A
+
+
+; ***** TIMER_COUNTER_2 **************
+; TIMSK2 - Timer/Counter Interrupt Mask register
+.equ	TOIE2	= 0	; Timer/Counter2 Overflow Interrupt Enable
+.equ	TOIE2A	= TOIE2	; For compatibility
+.equ	OCIE2A	= 1	; Timer/Counter2 Output Compare Match A Interrupt Enable
+.equ	OCIE2B	= 2	; Timer/Counter2 Output Compare Match B Interrupt Enable
+
+; TIFR2 - Timer/Counter Interrupt Flag Register
+.equ	TOV2	= 0	; Timer/Counter2 Overflow Flag
+.equ	OCF2A	= 1	; Output Compare Flag 2A
+.equ	OCF2B	= 2	; Output Compare Flag 2B
+
+; TCCR2A - Timer/Counter2 Control Register A
+.equ	WGM20	= 0	; Waveform Genration Mode
+.equ	WGM21	= 1	; Waveform Genration Mode
+.equ	COM2B0	= 4	; Compare Output Mode bit 0
+.equ	COM2B1	= 5	; Compare Output Mode bit 1
+.equ	COM2A0	= 6	; Compare Output Mode bit 1
+.equ	COM2A1	= 7	; Compare Output Mode bit 1
+
+; TCCR2B - Timer/Counter2 Control Register B
+.equ	CS20	= 0	; Clock Select bit 0
+.equ	CS21	= 1	; Clock Select bit 1
+.equ	CS22	= 2	; Clock Select bit 2
+.equ	WGM22	= 3	; Waveform Generation Mode
+.equ	FOC2B	= 6	; Force Output Compare B
+.equ	FOC2A	= 7	; Force Output Compare A
+
+; TCNT2 - Timer/Counter2
+.equ	TCNT2_0	= 0	; Timer/Counter 2 bit 0
+.equ	TCNT2_1	= 1	; Timer/Counter 2 bit 1
+.equ	TCNT2_2	= 2	; Timer/Counter 2 bit 2
+.equ	TCNT2_3	= 3	; Timer/Counter 2 bit 3
+.equ	TCNT2_4	= 4	; Timer/Counter 2 bit 4
+.equ	TCNT2_5	= 5	; Timer/Counter 2 bit 5
+.equ	TCNT2_6	= 6	; Timer/Counter 2 bit 6
+.equ	TCNT2_7	= 7	; Timer/Counter 2 bit 7
+
+; OCR2A - Timer/Counter2 Output Compare Register A
+.equ	OCR2A_0	= 0	; Timer/Counter2 Output Compare Register Bit 0
+.equ	OCR2A_1	= 1	; Timer/Counter2 Output Compare Register Bit 1
+.equ	OCR2A_2	= 2	; Timer/Counter2 Output Compare Register Bit 2
+.equ	OCR2A_3	= 3	; Timer/Counter2 Output Compare Register Bit 3
+.equ	OCR2A_4	= 4	; Timer/Counter2 Output Compare Register Bit 4
+.equ	OCR2A_5	= 5	; Timer/Counter2 Output Compare Register Bit 5
+.equ	OCR2A_6	= 6	; Timer/Counter2 Output Compare Register Bit 6
+.equ	OCR2A_7	= 7	; Timer/Counter2 Output Compare Register Bit 7
+
+; OCR2B - Timer/Counter2 Output Compare Register B
+.equ	OCR2B_0	= 0	; Timer/Counter2 Output Compare Register Bit 0
+.equ	OCR2B_1	= 1	; Timer/Counter2 Output Compare Register Bit 1
+.equ	OCR2B_2	= 2	; Timer/Counter2 Output Compare Register Bit 2
+.equ	OCR2B_3	= 3	; Timer/Counter2 Output Compare Register Bit 3
+.equ	OCR2B_4	= 4	; Timer/Counter2 Output Compare Register Bit 4
+.equ	OCR2B_5	= 5	; Timer/Counter2 Output Compare Register Bit 5
+.equ	OCR2B_6	= 6	; Timer/Counter2 Output Compare Register Bit 6
+.equ	OCR2B_7	= 7	; Timer/Counter2 Output Compare Register Bit 7
+
+; ASSR - Asynchronous Status Register
+.equ	TCR2BUB	= 0	; Timer/Counter Control Register2 Update Busy
+.equ	TCR2AUB	= 1	; Timer/Counter Control Register2 Update Busy
+.equ	OCR2BUB	= 2	; Output Compare Register 2 Update Busy
+.equ	OCR2AUB	= 3	; Output Compare Register2 Update Busy
+.equ	TCN2UB	= 4	; Timer/Counter2 Update Busy
+.equ	AS2	= 5	; Asynchronous Timer/Counter2
+.equ	EXCLK	= 6	; Enable External Clock Input
+
+; GTCCR - General Timer Counter Control register
+.equ	PSRASY	= 1	; Prescaler Reset Timer/Counter2
+.equ	PSR2	= PSRASY	; For compatibility
+;.equ	TSM	= 7	; Timer/Counter Synchronization Mode
+
+
+; ***** TIMER_COUNTER_3 **************
+; TIMSK3 - Timer/Counter3 Interrupt Mask Register
+.equ	TOIE3	= 0	; Timer/Counter3 Overflow Interrupt Enable
+.equ	OCIE3A	= 1	; Timer/Counter3 Output Compare A Match Interrupt Enable
+.equ	OCIE3B	= 2	; Timer/Counter3 Output Compare B Match Interrupt Enable
+.equ	ICIE3	= 5	; Timer/Counter3 Input Capture Interrupt Enable
+
+; TIFR3 - Timer/Counter Interrupt Flag register
+.equ	TOV3	= 0	; Timer/Counter3 Overflow Flag
+.equ	OCF3A	= 1	; Timer/Counter3 Output Compare A Match Flag
+.equ	OCF3B	= 2	; Timer/Counter3 Output Compare B Match Flag
+.equ	ICF3	= 5	; Timer/Counter3 Input Capture Flag
+
+; TCCR3A - Timer/Counter3 Control Register A
+.equ	WGM30	= 0	; Pulse Width Modulator Select Bit 0
+.equ	WGM31	= 1	; Pulse Width Modulator Select Bit 1
+.equ	COM3B0	= 4	; Comparet Ouput Mode 3B, bit 0
+.equ	COM3B1	= 5	; Compare Output Mode 3B, bit 1
+.equ	COM3A0	= 6	; Comparet Ouput Mode 3A, bit 0
+.equ	COM3A1	= 7	; Compare Output Mode 3A, bit 1
+
+; TCCR3B - Timer/Counter3 Control Register B
+.equ	CS30	= 0	; Clock Select bit 0
+.equ	CS31	= 1	; Clock Select 3 bit 1
+.equ	CS32	= 2	; Clock Select3 bit 2
+.equ	WGM32	= 3	; Waveform Generation Mode Bit 2
+.equ	WGM33	= 4	; Waveform Generation Mode Bit 3
+.equ	ICES3	= 6	; Input Capture 3 Edge Select
+.equ	ICNC3	= 7	; Input Capture 3 Noise Canceler
+
+; TCCR3C - Timer/Counter3 Control Register C
+.equ	FOC3B	= 6	; Force Output Compare for Channel B
+.equ	FOC3A	= 7	; Force Output Compare for Channel A
+
+; OCR3BH - Timer/Counter3 Output Compare Register B High Byte
+.equ	OCR3AH0	= 0	; Timer/Counter3 Output Compare Register High Byte bit 0
+.equ	OCR3AH1	= 1	; Timer/Counter3 Output Compare Register High Byte bit 1
+.equ	OCR3AH2	= 2	; Timer/Counter3 Output Compare Register High Byte bit 2
+.equ	OCR3AH3	= 3	; Timer/Counter3 Output Compare Register High Byte bit 3
+.equ	OCR3AH4	= 4	; Timer/Counter3 Output Compare Register High Byte bit 4
+.equ	OCR3AH5	= 5	; Timer/Counter3 Output Compare Register High Byte bit 5
+.equ	OCR3AH6	= 6	; Timer/Counter3 Output Compare Register High Byte bit 6
+.equ	OCR3AH7	= 7	; Timer/Counter3 Output Compare Register High Byte bit 7
+
+; OCR3BL - Timer/Counter3 Output Compare Register B Low Byte
+.equ	OCR3AL0	= 0	; Timer/Counter3 Output Compare Register Low Byte Bit 0
+.equ	OCR3AL1	= 1	; Timer/Counter3 Output Compare Register Low Byte Bit 1
+.equ	OCR3AL2	= 2	; Timer/Counter3 Output Compare Register Low Byte Bit 2
+.equ	OCR3AL3	= 3	; Timer/Counter3 Output Compare Register Low Byte Bit 3
+.equ	OCR3AL4	= 4	; Timer/Counter3 Output Compare Register Low Byte Bit 4
+.equ	OCR3AL5	= 5	; Timer/Counter3 Output Compare Register Low Byte Bit 5
+.equ	OCR3AL6	= 6	; Timer/Counter3 Output Compare Register Low Byte Bit 6
+.equ	OCR3AL7	= 7	; Timer/Counter3 Output Compare Register Low Byte Bit 7
+
+
+; ***** BOOT_LOAD ********************
+; SPMCSR - Store Program Memory Control Register
+.equ	SPMEN	= 0	; Store Program Memory Enable
+.equ	PGERS	= 1	; Page Erase
+.equ	PGWRT	= 2	; Page Write
+.equ	BLBSET	= 3	; Boot Lock Bit Set
+.equ	RWWSRE	= 4	; Read While Write section read enable
+.equ	SIGRD	= 5	; Signature Row Read
+.equ	RWWSB	= 6	; Read While Write Section Busy
+.equ	SPMIE	= 7	; SPM Interrupt Enable
+
+
+; ***** EXTERNAL_INTERRUPT ***********
+; EICRA - External Interrupt Control Register A
+.equ	ISC00	= 0	; External Interrupt Sense Control Bit
+.equ	ISC01	= 1	; External Interrupt Sense Control Bit
+.equ	ISC10	= 2	; External Interrupt Sense Control Bit
+.equ	ISC11	= 3	; External Interrupt Sense Control Bit
+.equ	ISC20	= 4	; External Interrupt Sense Control Bit
+.equ	ISC21	= 5	; External Interrupt Sense Control Bit
+
+; EIMSK - External Interrupt Mask Register
+.equ	INT0	= 0	; External Interrupt Request 0 Enable
+.equ	INT1	= 1	; External Interrupt Request 1 Enable
+.equ	INT2	= 2	; External Interrupt Request 2 Enable
+
+; EIFR - External Interrupt Flag Register
+.equ	INTF0	= 0	; External Interrupt Flag 0
+.equ	INTF1	= 1	; External Interrupt Flag 1
+.equ	INTF2	= 2	; External Interrupt Flag 2
+
+; PCICR - Pin Change Interrupt Control Register
+.equ	PCIE0	= 0	; Pin Change Interrupt Enable 0
+.equ	PCIE1	= 1	; Pin Change Interrupt Enable 1
+.equ	PCIE2	= 2	; Pin Change Interrupt Enable 2
+.equ	PCIE3	= 3	; Pin Change Interrupt Enable 3
+
+; PCIFR - Pin Change Interrupt Flag Register
+.equ	PCIF0	= 0	; Pin Change Interrupt Flag 0
+.equ	PCIF1	= 1	; Pin Change Interrupt Flag 1
+.equ	PCIF2	= 2	; Pin Change Interrupt Flag 2
+.equ	PCIF3	= 3	; Pin Change Interrupt Flag 3
+
+; PCMSK3 - Pin Change Mask Register 3
+.equ	PCINT24	= 0	; Pin Change Enable Mask 24
+.equ	PCINT25	= 1	; Pin Change Enable Mask 25
+.equ	PCINT26	= 2	; Pin Change Enable Mask 26
+.equ	PCINT27	= 3	; Pin Change Enable Mask 27
+.equ	PCINT28	= 4	; Pin Change Enable Mask 28
+.equ	PCINT29	= 5	; Pin Change Enable Mask 29
+.equ	PCINT30	= 6	; Pin Change Enable Mask 30
+.equ	PCINT31	= 7	; Pin Change Enable Mask 31
+
+; PCMSK2 - Pin Change Mask Register 2
+.equ	PCINT16	= 0	; Pin Change Enable Mask 16
+.equ	PCINT17	= 1	; Pin Change Enable Mask 17
+.equ	PCINT18	= 2	; Pin Change Enable Mask 18
+.equ	PCINT19	= 3	; Pin Change Enable Mask 19
+.equ	PCINT20	= 4	; Pin Change Enable Mask 20
+.equ	PCINT21	= 5	; Pin Change Enable Mask 21
+.equ	PCINT22	= 6	; Pin Change Enable Mask 22
+.equ	PCINT23	= 7	; Pin Change Enable Mask 23
+
+; PCMSK1 - Pin Change Mask Register 1
+.equ	PCINT8	= 0	; Pin Change Enable Mask 8
+.equ	PCINT9	= 1	; Pin Change Enable Mask 9
+.equ	PCINT10	= 2	; Pin Change Enable Mask 10
+.equ	PCINT11	= 3	; Pin Change Enable Mask 11
+.equ	PCINT12	= 4	; Pin Change Enable Mask 12
+.equ	PCINT13	= 5	; Pin Change Enable Mask 13
+.equ	PCINT14	= 6	; Pin Change Enable Mask 14
+.equ	PCINT15	= 7	; Pin Change Enable Mask 15
+
+; PCMSK0 - Pin Change Mask Register 0
+.equ	PCINT0	= 0	; Pin Change Enable Mask 0
+.equ	PCINT1	= 1	; Pin Change Enable Mask 1
+.equ	PCINT2	= 2	; Pin Change Enable Mask 2
+.equ	PCINT3	= 3	; Pin Change Enable Mask 3
+.equ	PCINT4	= 4	; Pin Change Enable Mask 4
+.equ	PCINT5	= 5	; Pin Change Enable Mask 5
+.equ	PCINT6	= 6	; Pin Change Enable Mask 6
+.equ	PCINT7	= 7	; Pin Change Enable Mask 7
+
+
+; ***** AD_CONVERTER *****************
+; ADMUX - The ADC multiplexer Selection Register
+.equ	MUX0	= 0	; Analog Channel and Gain Selection Bits
+.equ	MUX1	= 1	; Analog Channel and Gain Selection Bits
+.equ	MUX2	= 2	; Analog Channel and Gain Selection Bits
+.equ	MUX3	= 3	; Analog Channel and Gain Selection Bits
+.equ	MUX4	= 4	; Analog Channel and Gain Selection Bits
+.equ	ADLAR	= 5	; Left Adjust Result
+.equ	REFS0	= 6	; Reference Selection Bit 0
+.equ	REFS1	= 7	; Reference Selection Bit 1
+
+; ADCSRA - The ADC Control and Status register A
+.equ	ADPS0	= 0	; ADC  Prescaler Select Bits
+.equ	ADPS1	= 1	; ADC  Prescaler Select Bits
+.equ	ADPS2	= 2	; ADC  Prescaler Select Bits
+.equ	ADIE	= 3	; ADC Interrupt Enable
+.equ	ADIF	= 4	; ADC Interrupt Flag
+.equ	ADATE	= 5	; ADC  Auto Trigger Enable
+.equ	ADSC	= 6	; ADC Start Conversion
+.equ	ADEN	= 7	; ADC Enable
+
+; ADCSRB - The ADC Control and Status register B
+.equ	ADTS0	= 0	; ADC Auto Trigger Source bit 0
+.equ	ADTS1	= 1	; ADC Auto Trigger Source bit 1
+.equ	ADTS2	= 2	; ADC Auto Trigger Source bit 2
+;.equ	ACME	= 6	; 
+
+; ADCH - ADC Data Register High Byte
+.equ	ADCH0	= 0	; ADC Data Register High Byte Bit 0
+.equ	ADCH1	= 1	; ADC Data Register High Byte Bit 1
+.equ	ADCH2	= 2	; ADC Data Register High Byte Bit 2
+.equ	ADCH3	= 3	; ADC Data Register High Byte Bit 3
+.equ	ADCH4	= 4	; ADC Data Register High Byte Bit 4
+.equ	ADCH5	= 5	; ADC Data Register High Byte Bit 5
+.equ	ADCH6	= 6	; ADC Data Register High Byte Bit 6
+.equ	ADCH7	= 7	; ADC Data Register High Byte Bit 7
+
+; ADCL - ADC Data Register Low Byte
+.equ	ADCL0	= 0	; ADC Data Register Low Byte Bit 0
+.equ	ADCL1	= 1	; ADC Data Register Low Byte Bit 1
+.equ	ADCL2	= 2	; ADC Data Register Low Byte Bit 2
+.equ	ADCL3	= 3	; ADC Data Register Low Byte Bit 3
+.equ	ADCL4	= 4	; ADC Data Register Low Byte Bit 4
+.equ	ADCL5	= 5	; ADC Data Register Low Byte Bit 5
+.equ	ADCL6	= 6	; ADC Data Register Low Byte Bit 6
+.equ	ADCL7	= 7	; ADC Data Register Low Byte Bit 7
+
+; DIDR0 - Digital Input Disable Register
+.equ	ADC0D	= 0	; 
+.equ	ADC1D	= 1	; 
+.equ	ADC2D	= 2	; 
+.equ	ADC3D	= 3	; 
+.equ	ADC4D	= 4	; 
+.equ	ADC5D	= 5	; 
+.equ	ADC6D	= 6	; 
+.equ	ADC7D	= 7	; 
+
+
+; ***** JTAG *************************
+; OCDR - On-Chip Debug Related Register in I/O Memory
+.equ	OCDR0	= 0	; On-Chip Debug Register Bit 0
+.equ	OCDR1	= 1	; On-Chip Debug Register Bit 1
+.equ	OCDR2	= 2	; On-Chip Debug Register Bit 2
+.equ	OCDR3	= 3	; On-Chip Debug Register Bit 3
+.equ	OCDR4	= 4	; On-Chip Debug Register Bit 4
+.equ	OCDR5	= 5	; On-Chip Debug Register Bit 5
+.equ	OCDR6	= 6	; On-Chip Debug Register Bit 6
+.equ	OCDR7	= 7	; On-Chip Debug Register Bit 7
+.equ	IDRD	= OCDR7	; For compatibility
+
+; MCUCR - MCU Control Register
+.equ	JTD	= 7	; JTAG Interface Disable
+
+; MCUSR - MCU Status Register
+.equ	JTRF	= 4	; JTAG Reset Flag
+
+
+; ***** EEPROM ***********************
+; EEARH - EEPROM Address Register Low Byte
+.equ	EEAR8	= 0	; EEPROM Read/Write Access Bit 8
+.equ	EEAR9	= 1	; EEPROM Read/Write Access Bit 9
+.equ	EEAR10	= 2	; EEPROM Read/Write Access Bit 10
+.equ	EEAR11	= 3	; EEPROM Read/Write Access Bit 11
+
+; EEARL - EEPROM Address Register Low Byte
+.equ	EEAR0	= 0	; EEPROM Read/Write Access Bit 0
+.equ	EEAR1	= 1	; EEPROM Read/Write Access Bit 1
+.equ	EEAR2	= 2	; EEPROM Read/Write Access Bit 2
+.equ	EEAR3	= 3	; EEPROM Read/Write Access Bit 3
+.equ	EEAR4	= 4	; EEPROM Read/Write Access Bit 4
+.equ	EEAR5	= 5	; EEPROM Read/Write Access Bit 5
+.equ	EEAR6	= 6	; EEPROM Read/Write Access Bit 6
+.equ	EEAR7	= 7	; EEPROM Read/Write Access Bit 7
+
+; EEDR - EEPROM Data Register
+.equ	EEDR0	= 0	; EEPROM Data Register bit 0
+.equ	EEDR1	= 1	; EEPROM Data Register bit 1
+.equ	EEDR2	= 2	; EEPROM Data Register bit 2
+.equ	EEDR3	= 3	; EEPROM Data Register bit 3
+.equ	EEDR4	= 4	; EEPROM Data Register bit 4
+.equ	EEDR5	= 5	; EEPROM Data Register bit 5
+.equ	EEDR6	= 6	; EEPROM Data Register bit 6
+.equ	EEDR7	= 7	; EEPROM Data Register bit 7
+
+; EECR - EEPROM Control Register
+.equ	EERE	= 0	; EEPROM Read Enable
+.equ	EEPE	= 1	; EEPROM Write Enable
+.equ	EEMPE	= 2	; EEPROM Master Write Enable
+.equ	EERIE	= 3	; EEPROM Ready Interrupt Enable
+.equ	EEPM0	= 4	; EEPROM Programming Mode Bit 0
+.equ	EEPM1	= 5	; EEPROM Programming Mode Bit 1
+
+
+; ***** TWI **************************
+; TWAMR - TWI (Slave) Address Mask Register
+.equ	TWAM0	= 1	; 
+.equ	TWAMR0	= TWAM0	; For compatibility
+.equ	TWAM1	= 2	; 
+.equ	TWAMR1	= TWAM1	; For compatibility
+.equ	TWAM2	= 3	; 
+.equ	TWAMR2	= TWAM2	; For compatibility
+.equ	TWAM3	= 4	; 
+.equ	TWAMR3	= TWAM3	; For compatibility
+.equ	TWAM4	= 5	; 
+.equ	TWAMR4	= TWAM4	; For compatibility
+.equ	TWAM5	= 6	; 
+.equ	TWAMR5	= TWAM5	; For compatibility
+.equ	TWAM6	= 7	; 
+.equ	TWAMR6	= TWAM6	; For compatibility
+
+; TWBR - TWI Bit Rate register
+.equ	TWBR0	= 0	; 
+.equ	TWBR1	= 1	; 
+.equ	TWBR2	= 2	; 
+.equ	TWBR3	= 3	; 
+.equ	TWBR4	= 4	; 
+.equ	TWBR5	= 5	; 
+.equ	TWBR6	= 6	; 
+.equ	TWBR7	= 7	; 
+
+; TWCR - TWI Control Register
+.equ	TWIE	= 0	; TWI Interrupt Enable
+.equ	TWEN	= 2	; TWI Enable Bit
+.equ	TWWC	= 3	; TWI Write Collition Flag
+.equ	TWSTO	= 4	; TWI Stop Condition Bit
+.equ	TWSTA	= 5	; TWI Start Condition Bit
+.equ	TWEA	= 6	; TWI Enable Acknowledge Bit
+.equ	TWINT	= 7	; TWI Interrupt Flag
+
+; TWSR - TWI Status Register
+.equ	TWPS0	= 0	; TWI Prescaler
+.equ	TWPS1	= 1	; TWI Prescaler
+.equ	TWS3	= 3	; TWI Status
+.equ	TWS4	= 4	; TWI Status
+.equ	TWS5	= 5	; TWI Status
+.equ	TWS6	= 6	; TWI Status
+.equ	TWS7	= 7	; TWI Status
+
+; TWDR - TWI Data register
+.equ	TWD0	= 0	; TWI Data Register Bit 0
+.equ	TWD1	= 1	; TWI Data Register Bit 1
+.equ	TWD2	= 2	; TWI Data Register Bit 2
+.equ	TWD3	= 3	; TWI Data Register Bit 3
+.equ	TWD4	= 4	; TWI Data Register Bit 4
+.equ	TWD5	= 5	; TWI Data Register Bit 5
+.equ	TWD6	= 6	; TWI Data Register Bit 6
+.equ	TWD7	= 7	; TWI Data Register Bit 7
+
+; TWAR - TWI (Slave) Address register
+.equ	TWGCE	= 0	; TWI General Call Recognition Enable Bit
+.equ	TWA0	= 1	; TWI (Slave) Address register Bit 0
+.equ	TWA1	= 2	; TWI (Slave) Address register Bit 1
+.equ	TWA2	= 3	; TWI (Slave) Address register Bit 2
+.equ	TWA3	= 4	; TWI (Slave) Address register Bit 3
+.equ	TWA4	= 5	; TWI (Slave) Address register Bit 4
+.equ	TWA5	= 6	; TWI (Slave) Address register Bit 5
+.equ	TWA6	= 7	; TWI (Slave) Address register Bit 6
+
+
+; ***** USART1 ***********************
+; UDR1 - USART I/O Data Register
+.equ	UDR1_0	= 0	; USART I/O Data Register bit 0
+.equ	UDR1_1	= 1	; USART I/O Data Register bit 1
+.equ	UDR1_2	= 2	; USART I/O Data Register bit 2
+.equ	UDR1_3	= 3	; USART I/O Data Register bit 3
+.equ	UDR1_4	= 4	; USART I/O Data Register bit 4
+.equ	UDR1_5	= 5	; USART I/O Data Register bit 5
+.equ	UDR1_6	= 6	; USART I/O Data Register bit 6
+.equ	UDR1_7	= 7	; USART I/O Data Register bit 7
+
+; UCSR1A - USART Control and Status Register A
+.equ	MPCM1	= 0	; Multi-processor Communication Mode
+.equ	U2X1	= 1	; Double the USART transmission speed
+.equ	UPE1	= 2	; Parity Error
+.equ	DOR1	= 3	; Data overRun
+.equ	FE1	= 4	; Framing Error
+.equ	UDRE1	= 5	; USART Data Register Empty
+.equ	TXC1	= 6	; USART Transmitt Complete
+.equ	RXC1	= 7	; USART Receive Complete
+
+; UCSR1B - USART Control and Status Register B
+.equ	TXB81	= 0	; Transmit Data Bit 8
+.equ	RXB81	= 1	; Receive Data Bit 8
+.equ	UCSZ12	= 2	; Character Size
+.equ	TXEN1	= 3	; Transmitter Enable
+.equ	RXEN1	= 4	; Receiver Enable
+.equ	UDRIE1	= 5	; USART Data register Empty Interrupt Enable
+.equ	TXCIE1	= 6	; TX Complete Interrupt Enable
+.equ	RXCIE1	= 7	; RX Complete Interrupt Enable
+
+; UCSR1C - USART Control and Status Register C
+.equ	UCPOL1	= 0	; Clock Polarity
+.equ	UCSZ10	= 1	; Character Size
+.equ	UCPHA1	= UCSZ10	; For compatibility
+.equ	UCSZ11	= 2	; Character Size
+.equ	UDORD1	= UCSZ11	; For compatibility
+.equ	USBS1	= 3	; Stop Bit Select
+.equ	UPM10	= 4	; Parity Mode Bit 0
+.equ	UPM11	= 5	; Parity Mode Bit 1
+.equ	UMSEL10	= 6	; USART Mode Select
+.equ	UMSEL11	= 7	; USART Mode Select
+
+; UBRR1H - USART Baud Rate Register High Byte
+.equ	UBRR_8	= 0	; USART Baud Rate Register bit 8
+.equ	UBRR_9	= 1	; USART Baud Rate Register bit 9
+.equ	UBRR_10	= 2	; USART Baud Rate Register bit 10
+.equ	UBRR_11	= 3	; USART Baud Rate Register bit 11
+
+; UBRR1L - USART Baud Rate Register Low Byte
+.equ	UBRR_0	= 0	; USART Baud Rate Register bit 0
+.equ	UBRR_1	= 1	; USART Baud Rate Register bit 1
+.equ	UBRR_2	= 2	; USART Baud Rate Register bit 2
+.equ	UBRR_3	= 3	; USART Baud Rate Register bit 3
+.equ	UBRR_4	= 4	; USART Baud Rate Register bit 4
+.equ	UBRR_5	= 5	; USART Baud Rate Register bit 5
+.equ	UBRR_6	= 6	; USART Baud Rate Register bit 6
+.equ	UBRR_7	= 7	; USART Baud Rate Register bit 7
+
+
+; ***** SPI **************************
+; SPDR - SPI Data Register
+.equ	SPDR0	= 0	; SPI Data Register bit 0
+.equ	SPDR1	= 1	; SPI Data Register bit 1
+.equ	SPDR2	= 2	; SPI Data Register bit 2
+.equ	SPDR3	= 3	; SPI Data Register bit 3
+.equ	SPDR4	= 4	; SPI Data Register bit 4
+.equ	SPDR5	= 5	; SPI Data Register bit 5
+.equ	SPDR6	= 6	; SPI Data Register bit 6
+.equ	SPDR7	= 7	; SPI Data Register bit 7
+
+; SPSR - SPI Status Register
+.equ	SPI2X	= 0	; Double SPI Speed Bit
+.equ	WCOL	= 6	; Write Collision Flag
+.equ	SPIF	= 7	; SPI Interrupt Flag
+
+; SPCR - SPI Control Register
+.equ	SPR0	= 0	; SPI Clock Rate Select 0
+.equ	SPR1	= 1	; SPI Clock Rate Select 1
+.equ	CPHA	= 2	; Clock Phase
+.equ	CPOL	= 3	; Clock polarity
+.equ	MSTR	= 4	; Master/Slave Select
+.equ	DORD	= 5	; Data Order
+.equ	SPE	= 6	; SPI Enable
+.equ	SPIE	= 7	; SPI Interrupt Enable
+
+
+; ***** WATCHDOG *********************
+; WDTCSR - Watchdog Timer Control Register
+.equ	WDP0	= 0	; Watch Dog Timer Prescaler bit 0
+.equ	WDP1	= 1	; Watch Dog Timer Prescaler bit 1
+.equ	WDP2	= 2	; Watch Dog Timer Prescaler bit 2
+.equ	WDE	= 3	; Watch Dog Enable
+.equ	WDCE	= 4	; Watchdog Change Enable
+.equ	WDP3	= 5	; Watchdog Timer Prescaler Bit 3
+.equ	WDIE	= 6	; Watchdog Timeout Interrupt Enable
+.equ	WDIF	= 7	; Watchdog Timeout Interrupt Flag
+
+
+; ***** CPU **************************
+; SREG - Status Register
+.equ	SREG_C	= 0	; Carry Flag
+.equ	SREG_Z	= 1	; Zero Flag
+.equ	SREG_N	= 2	; Negative Flag
+.equ	SREG_V	= 3	; Two's Complement Overflow Flag
+.equ	SREG_S	= 4	; Sign Bit
+.equ	SREG_H	= 5	; Half Carry Flag
+.equ	SREG_T	= 6	; Bit Copy Storage
+.equ	SREG_I	= 7	; Global Interrupt Enable
+
+; MCUCR - MCU Control Register
+.equ	IVCE	= 0	; Interrupt Vector Change Enable
+.equ	IVSEL	= 1	; Interrupt Vector Select
+.equ	PUD	= 4	; Pull-up disable
+.equ	BODSE	= 5	; BOD Power Down in Sleep Enable
+.equ	BODS	= 6	; BOD Power Down in Sleep
+;.equ	JTD	= 7	; JTAG Interface Disable
+
+; MCUSR - MCU Status Register
+.equ	PORF	= 0	; Power-on reset flag
+.equ	EXTRF	= 1	; External Reset Flag
+.equ	BORF	= 2	; Brown-out Reset Flag
+.equ	WDRF	= 3	; Watchdog Reset Flag
+;.equ	JTRF	= 4	; JTAG Reset Flag
+
+; OSCCAL - Oscillator Calibration Value
+.equ	CAL0	= 0	; Oscillator Calibration Value Bit0
+.equ	CAL1	= 1	; Oscillator Calibration Value Bit1
+.equ	CAL2	= 2	; Oscillator Calibration Value Bit2
+.equ	CAL3	= 3	; Oscillator Calibration Value Bit3
+.equ	CAL4	= 4	; Oscillator Calibration Value Bit4
+.equ	CAL5	= 5	; Oscillator Calibration Value Bit5
+.equ	CAL6	= 6	; Oscillator Calibration Value Bit6
+.equ	CAL7	= 7	; Oscillator Calibration Value Bit7
+
+; CLKPR - 
+.equ	CLKPS0	= 0	; 
+.equ	CLKPS1	= 1	; 
+.equ	CLKPS2	= 2	; 
+.equ	CLKPS3	= 3	; 
+.equ	CLKPCE	= 7	; 
+
+; SMCR - Sleep Mode Control Register
+.equ	SE	= 0	; Sleep Enable
+.equ	SM0	= 1	; Sleep Mode Select bit 0
+.equ	SM1	= 2	; Sleep Mode Select bit 1
+.equ	SM2	= 3	; Sleep Mode Select bit 2
+
+; RAMPZ - RAM Page Z Select Register
+.equ	RAMPZ0	= 0	; RAM Page Z Select Register Bit 0
+
+; GPIOR2 - General Purpose IO Register 2
+.equ	GPIOR20	= 0	; General Purpose IO Register 2 bit 0
+.equ	GPIOR21	= 1	; General Purpose IO Register 2 bit 1
+.equ	GPIOR22	= 2	; General Purpose IO Register 2 bit 2
+.equ	GPIOR23	= 3	; General Purpose IO Register 2 bit 3
+.equ	GPIOR24	= 4	; General Purpose IO Register 2 bit 4
+.equ	GPIOR25	= 5	; General Purpose IO Register 2 bit 5
+.equ	GPIOR26	= 6	; General Purpose IO Register 2 bit 6
+.equ	GPIOR27	= 7	; General Purpose IO Register 2 bit 7
+
+; GPIOR1 - General Purpose IO Register 1
+.equ	GPIOR10	= 0	; General Purpose IO Register 1 bit 0
+.equ	GPIOR11	= 1	; General Purpose IO Register 1 bit 1
+.equ	GPIOR12	= 2	; General Purpose IO Register 1 bit 2
+.equ	GPIOR13	= 3	; General Purpose IO Register 1 bit 3
+.equ	GPIOR14	= 4	; General Purpose IO Register 1 bit 4
+.equ	GPIOR15	= 5	; General Purpose IO Register 1 bit 5
+.equ	GPIOR16	= 6	; General Purpose IO Register 1 bit 6
+.equ	GPIOR17	= 7	; General Purpose IO Register 1 bit 7
+
+; GPIOR0 - General Purpose IO Register 0
+.equ	GPIOR00	= 0	; General Purpose IO Register 0 bit 0
+.equ	GPIOR01	= 1	; General Purpose IO Register 0 bit 1
+.equ	GPIOR02	= 2	; General Purpose IO Register 0 bit 2
+.equ	GPIOR03	= 3	; General Purpose IO Register 0 bit 3
+.equ	GPIOR04	= 4	; General Purpose IO Register 0 bit 4
+.equ	GPIOR05	= 5	; General Purpose IO Register 0 bit 5
+.equ	GPIOR06	= 6	; General Purpose IO Register 0 bit 6
+.equ	GPIOR07	= 7	; General Purpose IO Register 0 bit 7
+
+; PRR0 - Power Reduction Register0
+.equ	PRADC	= 0	; Power Reduction ADC
+.equ	PRUSART0	= 1	; Power Reduction USART 0
+.equ	PRSPI	= 2	; Power Reduction Serial Peripheral Interface
+.equ	PRTIM1	= 3	; Power Reduction Timer/Counter1
+.equ	PRUSART1	= 4	; Power Reduction USART 1
+.equ	PRTIM0	= 5	; Power Reduction Timer/Counter0
+.equ	PRTIM2	= 6	; Power Reduction Timer/Counter2
+.equ	PRTWI	= 7	; Power Reduction TWI
+
+; PRR1 - Power Reduction Register1
+.equ	PRTIM3	= 0	; Power Reduction Timer/Counter3
+
+
+
+; ***** LOCKSBITS ********************************************************
+.equ	LB1	= 0	; Lock bit
+.equ	LB2	= 1	; Lock bit
+.equ	BLB01	= 2	; Boot Lock bit
+.equ	BLB02	= 3	; Boot Lock bit
+.equ	BLB11	= 4	; Boot lock bit
+.equ	BLB12	= 5	; Boot lock bit
+
+
+; ***** FUSES ************************************************************
+; LOW fuse bits
+.equ	CKSEL0	= 0	; Select Clock Source
+.equ	CKSEL1	= 1	; Select Clock Source
+.equ	CKSEL2	= 2	; Select Clock Source
+.equ	CKSEL3	= 3	; Select Clock Source
+.equ	SUT0	= 4	; Select start-up time
+.equ	SUT1	= 5	; Select start-up time
+.equ	CKOUT	= 6	; Clock output
+.equ	CKDIV8	= 7	; Divide clock by 8
+
+; HIGH fuse bits
+.equ	BOOTRST	= 0	; Select Reset Vector
+.equ	BOOTSZ0	= 1	; Select Boot Size
+.equ	BOOTSZ1	= 2	; Select Boot Size
+.equ	EESAVE	= 3	; EEPROM memory is preserved through chip erase
+.equ	WDTON	= 4	; Watchdog timer always on
+.equ	SPIEN	= 5	; Enable Serial programming and Data Downloading
+.equ	JTAGEN	= 6	; Enable JTAG
+.equ	OCDEN	= 7	; Enable OCD
+
+; EXTENDED fuse bits
+.equ	BODLEVEL0	= 0	; Brown-out Detector trigger level
+.equ	BODLEVEL1	= 1	; Brown-out Detector trigger level
+.equ	BODLEVEL2	= 2	; Brown-out Detector trigger level
+
+
+
+; ***** CPU REGISTER DEFINITIONS *****************************************
+.def	XH	= r27
+.def	XL	= r26
+.def	YH	= r29
+.def	YL	= r28
+.def	ZH	= r31
+.def	ZL	= r30
+
+
+
+; ***** DATA MEMORY DECLARATIONS *****************************************
+.equ	FLASHEND	= 0xffff	; Note: Word address
+.equ	IOEND	= 0x00ff
+.equ	SRAM_START	= 0x0100
+.equ	SRAM_SIZE	= 16384
+.equ	RAMEND	= 0x40ff
+.equ	XRAMEND	= 0x0000
+.equ	E2END	= 0x0fff
+.equ	EEPROMEND	= 0x0fff
+.equ	EEADRBITS	= 12
+#pragma AVRPART MEMORY PROG_FLASH 131072
+#pragma AVRPART MEMORY EEPROM 4096
+#pragma AVRPART MEMORY INT_SRAM SIZE 16384
+#pragma AVRPART MEMORY INT_SRAM START_ADDR 0x100
+
+
+
+; ***** BOOTLOADER DECLARATIONS ******************************************
+.equ	NRWW_START_ADDR	= 0xf000
+.equ	NRWW_STOP_ADDR	= 0xffff
+.equ	RWW_START_ADDR	= 0x0
+.equ	RWW_STOP_ADDR	= 0xefff
+.equ	PAGESIZE	= 128
+.equ	FIRSTBOOTSTART	= 0xfe00
+.equ	SECONDBOOTSTART	= 0xfc00
+.equ	THIRDBOOTSTART	= 0xf800
+.equ	FOURTHBOOTSTART	= 0xf000
+.equ	SMALLBOOTSTART	= FIRSTBOOTSTART
+.equ	LARGEBOOTSTART	= FOURTHBOOTSTART
+
+
+
+; ***** INTERRUPT VECTORS ************************************************
+.equ	INT0addr	= 0x0002	; External Interrupt Request 0
+.equ	INT1addr	= 0x0004	; External Interrupt Request 1
+.equ	INT2addr	= 0x0006	; External Interrupt Request 2
+.equ	PCI0addr	= 0x0008	; Pin Change Interrupt Request 0
+.equ	PCI1addr	= 0x000a	; Pin Change Interrupt Request 1
+.equ	PCI2addr	= 0x000c	; Pin Change Interrupt Request 2
+.equ	PCI3addr	= 0x000e	; Pin Change Interrupt Request 3
+.equ	WDTaddr	= 0x0010	; Watchdog Time-out Interrupt
+.equ	OC2Aaddr	= 0x0012	; Timer/Counter2 Compare Match A
+.equ	OC2Baddr	= 0x0014	; Timer/Counter2 Compare Match B
+.equ	OVF2addr	= 0x0016	; Timer/Counter2 Overflow
+.equ	ICP1addr	= 0x0018	; Timer/Counter1 Capture Event
+.equ	OC1Aaddr	= 0x001a	; Timer/Counter1 Compare Match A
+.equ	OC1Baddr	= 0x001c	; Timer/Counter1 Compare Match B
+.equ	OVF1addr	= 0x001e	; Timer/Counter1 Overflow
+.equ	OC0Aaddr	= 0x0020	; Timer/Counter0 Compare Match A
+.equ	OC0Baddr	= 0x0022	; Timer/Counter0 Compare Match B
+.equ	OVF0addr	= 0x0024	; Timer/Counter0 Overflow
+.equ	SPIaddr	= 0x0026	; SPI Serial Transfer Complete
+.equ	URXC0addr	= 0x0028	; USART0, Rx Complete
+.equ	UDRE0addr	= 0x002a	; USART0 Data register Empty
+.equ	UTXC0addr	= 0x002c	; USART0, Tx Complete
+.equ	ACIaddr	= 0x002e	; Analog Comparator
+.equ	ADCCaddr	= 0x0030	; ADC Conversion Complete
+.equ	ERDYaddr	= 0x0032	; EEPROM Ready
+.equ	TWIaddr	= 0x0034	; 2-wire Serial Interface
+.equ	SPMRaddr	= 0x0036	; Store Program Memory Read
+.equ	URXC1addr	= 0x0038	; USART1 RX complete
+.equ	UDRE1addr	= 0x003a	; USART1 Data Register Empty
+.equ	UTXC1addr	= 0x003c	; USART1 TX complete
+.equ	ICP3addr	= 0x003e	; Timer/Counter3 Capture Event
+.equ	OC3Aaddr	= 0x0040	; Timer/Counter3 Compare Match A
+.equ	OC3Baddr	= 0x0042	; Timer/Counter3 Compare Match B
+.equ	OVF3addr	= 0x0044	; Timer/Counter3 Overflow
+
+.equ	INT_VECTORS_SIZE	= 70	; size in words
+
+#endif  /* _M1284PDEF_INC_ */
+
+; ***** END OF FILE ******************************************************
diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/m1284def.inc b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/m1284def.inc
new file mode 100644
index 00000000..8b8acaa5
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/m1284def.inc
@@ -0,0 +1,1223 @@
+;***** THIS IS A MACHINE GENERATED FILE - DO NOT EDIT ********************
+;***** Created: 2011-02-09 12:03 ******* Source: ATmega1284.xml **********
+;*************************************************************************
+;* A P P L I C A T I O N   N O T E   F O R   T H E   A V R   F A M I L Y
+;* 
+;* Number            : AVR000
+;* File Name         : "m1284def.inc"
+;* Title             : Register/Bit Definitions for the ATmega1284
+;* Date              : 2011-02-09
+;* Version           : 2.35
+;* Support E-mail    : avr@atmel.com
+;* Target MCU        : ATmega1284
+;* 
+;* DESCRIPTION
+;* When including this file in the assembly program file, all I/O register 
+;* names and I/O register bit names appearing in the data book can be used.
+;* In addition, the six registers forming the three data pointers X, Y and 
+;* Z have been assigned names XL - ZH. Highest RAM address for Internal 
+;* SRAM is also defined 
+;* 
+;* The Register names are represented by their hexadecimal address.
+;* 
+;* The Register Bit names are represented by their bit number (0-7).
+;* 
+;* Please observe the difference in using the bit names with instructions
+;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc"
+;* (skip if bit in register set/cleared). The following example illustrates
+;* this:
+;* 
+;* in    r16,PORTB             ;read PORTB latch
+;* sbr   r16,(1<<PB6)+(1<<PB5) ;set PB6 and PB5 (use masks, not bit#)
+;* out   PORTB,r16             ;output to PORTB
+;* 
+;* in    r16,TIFR              ;read the Timer Interrupt Flag Register
+;* sbrc  r16,TOV0              ;test the overflow flag (use bit#)
+;* rjmp  TOV0_is_set           ;jump if set
+;* ...                         ;otherwise do something else
+;*************************************************************************
+
+#ifndef _M1284DEF_INC_
+#define _M1284DEF_INC_
+
+
+#pragma partinc 0
+
+; ***** SPECIFY DEVICE ***************************************************
+.device ATmega1284
+#pragma AVRPART ADMIN PART_NAME ATmega1284
+.equ	SIGNATURE_000	= 0x1e
+.equ	SIGNATURE_001	= 0x97
+.equ	SIGNATURE_002	= 0x06
+
+#pragma AVRPART CORE CORE_VERSION V2E
+
+
+; ***** I/O REGISTER DEFINITIONS *****************************************
+; NOTE:
+; Definitions marked "MEMORY MAPPED"are extended I/O ports
+; and cannot be used with IN/OUT instructions
+.equ	UDR1	= 0xce	; MEMORY MAPPED
+.equ	UBRR1L	= 0xcc	; MEMORY MAPPED
+.equ	UBRR1H	= 0xcd	; MEMORY MAPPED
+.equ	UCSR1C	= 0xca	; MEMORY MAPPED
+.equ	UCSR1B	= 0xc9	; MEMORY MAPPED
+.equ	UCSR1A	= 0xc8	; MEMORY MAPPED
+.equ	UDR0	= 0xc6	; MEMORY MAPPED
+.equ	UBRR0L	= 0xc4	; MEMORY MAPPED
+.equ	UBRR0H	= 0xc5	; MEMORY MAPPED
+.equ	UCSR0C	= 0xc2	; MEMORY MAPPED
+.equ	UCSR0B	= 0xc1	; MEMORY MAPPED
+.equ	UCSR0A	= 0xc0	; MEMORY MAPPED
+.equ	TWAMR	= 0xbd	; MEMORY MAPPED
+.equ	TWCR	= 0xbc	; MEMORY MAPPED
+.equ	TWDR	= 0xbb	; MEMORY MAPPED
+.equ	TWAR	= 0xba	; MEMORY MAPPED
+.equ	TWSR	= 0xb9	; MEMORY MAPPED
+.equ	TWBR	= 0xb8	; MEMORY MAPPED
+.equ	ASSR	= 0xb6	; MEMORY MAPPED
+.equ	OCR2B	= 0xb4	; MEMORY MAPPED
+.equ	OCR2A	= 0xb3	; MEMORY MAPPED
+.equ	TCNT2	= 0xb2	; MEMORY MAPPED
+.equ	TCCR2B	= 0xb1	; MEMORY MAPPED
+.equ	TCCR2A	= 0xb0	; MEMORY MAPPED
+.equ	OCR3BL	= 0x9a	; MEMORY MAPPED
+.equ	OCR3BH	= 0x9b	; MEMORY MAPPED
+.equ	OCR3AL	= 0x98	; MEMORY MAPPED
+.equ	OCR3AH	= 0x99	; MEMORY MAPPED
+.equ	ICR3L	= 0x96	; MEMORY MAPPED
+.equ	ICR3H	= 0x97	; MEMORY MAPPED
+.equ	TCNT3L	= 0x94	; MEMORY MAPPED
+.equ	TCNT3H	= 0x95	; MEMORY MAPPED
+.equ	TCCR3C	= 0x92	; MEMORY MAPPED
+.equ	TCCR3B	= 0x91	; MEMORY MAPPED
+.equ	TCCR3A	= 0x90	; MEMORY MAPPED
+.equ	OCR1BL	= 0x8a	; MEMORY MAPPED
+.equ	OCR1BH	= 0x8b	; MEMORY MAPPED
+.equ	OCR1AL	= 0x88	; MEMORY MAPPED
+.equ	OCR1AH	= 0x89	; MEMORY MAPPED
+.equ	ICR1L	= 0x86	; MEMORY MAPPED
+.equ	ICR1H	= 0x87	; MEMORY MAPPED
+.equ	TCNT1L	= 0x84	; MEMORY MAPPED
+.equ	TCNT1H	= 0x85	; MEMORY MAPPED
+.equ	TCCR1C	= 0x82	; MEMORY MAPPED
+.equ	TCCR1B	= 0x81	; MEMORY MAPPED
+.equ	TCCR1A	= 0x80	; MEMORY MAPPED
+.equ	DIDR1	= 0x7f	; MEMORY MAPPED
+.equ	DIDR0	= 0x7e	; MEMORY MAPPED
+.equ	ADMUX	= 0x7c	; MEMORY MAPPED
+.equ	ADCSRB	= 0x7b	; MEMORY MAPPED
+.equ	ADCSRA	= 0x7a	; MEMORY MAPPED
+.equ	ADCH	= 0x79	; MEMORY MAPPED
+.equ	ADCL	= 0x78	; MEMORY MAPPED
+.equ	PCMSK3	= 0x73	; MEMORY MAPPED
+.equ	TIMSK3	= 0x71	; MEMORY MAPPED
+.equ	TIMSK2	= 0x70	; MEMORY MAPPED
+.equ	TIMSK1	= 0x6f	; MEMORY MAPPED
+.equ	TIMSK0	= 0x6e	; MEMORY MAPPED
+.equ	PCMSK2	= 0x6d	; MEMORY MAPPED
+.equ	PCMSK1	= 0x6c	; MEMORY MAPPED
+.equ	PCMSK0	= 0x6b	; MEMORY MAPPED
+.equ	EICRA	= 0x69	; MEMORY MAPPED
+.equ	PCICR	= 0x68	; MEMORY MAPPED
+.equ	OSCCAL	= 0x66	; MEMORY MAPPED
+.equ	PRR1	= 0x65	; MEMORY MAPPED
+.equ	PRR0	= 0x64	; MEMORY MAPPED
+.equ	CLKPR	= 0x61	; MEMORY MAPPED
+.equ	WDTCSR	= 0x60	; MEMORY MAPPED
+.equ	SREG	= 0x3f
+.equ	SPL	= 0x3d
+.equ	SPH	= 0x3e
+.equ	RAMPZ	= 0x3b
+.equ	SPMCSR	= 0x37
+.equ	MCUCR	= 0x35
+.equ	MCUSR	= 0x34
+.equ	SMCR	= 0x33
+.equ	OCDR	= 0x31
+.equ	ACSR	= 0x30
+.equ	SPDR	= 0x2e
+.equ	SPSR	= 0x2d
+.equ	SPCR	= 0x2c
+.equ	GPIOR2	= 0x2b
+.equ	GPIOR1	= 0x2a
+.equ	OCR0B	= 0x28
+.equ	OCR0A	= 0x27
+.equ	TCNT0	= 0x26
+.equ	TCCR0B	= 0x25
+.equ	TCCR0A	= 0x24
+.equ	GTCCR	= 0x23
+.equ	EEARH	= 0x22
+.equ	EEARL	= 0x21
+.equ	EEDR	= 0x20
+.equ	EECR	= 0x1f
+.equ	GPIOR0	= 0x1e
+.equ	EIMSK	= 0x1d
+.equ	EIFR	= 0x1c
+.equ	PCIFR	= 0x1b
+.equ	TIFR3	= 0x18
+.equ	TIFR2	= 0x17
+.equ	TIFR1	= 0x16
+.equ	TIFR0	= 0x15
+.equ	PORTD	= 0x0b
+.equ	DDRD	= 0x0a
+.equ	PIND	= 0x09
+.equ	PORTC	= 0x08
+.equ	DDRC	= 0x07
+.equ	PINC	= 0x06
+.equ	PORTB	= 0x05
+.equ	DDRB	= 0x04
+.equ	PINB	= 0x03
+.equ	PORTA	= 0x02
+.equ	DDRA	= 0x01
+.equ	PINA	= 0x00
+
+
+; ***** BIT DEFINITIONS **************************************************
+
+; ***** ANALOG_COMPARATOR ************
+; ADCSRB - ADC Control and Status Register B
+.equ	ACME	= 6	; Analog Comparator Multiplexer Enable
+
+; ACSR - Analog Comparator Control And Status Register
+.equ	ACIS0	= 0	; Analog Comparator Interrupt Mode Select bit 0
+.equ	ACIS1	= 1	; Analog Comparator Interrupt Mode Select bit 1
+.equ	ACIC	= 2	; Analog Comparator Input Capture Enable
+.equ	ACIE	= 3	; Analog Comparator Interrupt Enable
+.equ	ACI	= 4	; Analog Comparator Interrupt Flag
+.equ	ACO	= 5	; Analog Compare Output
+.equ	ACBG	= 6	; Analog Comparator Bandgap Select
+.equ	ACD	= 7	; Analog Comparator Disable
+
+; DIDR1 - Digital Input Disable Register 1
+.equ	AIN0D	= 0	; AIN0 Digital Input Disable
+.equ	AIN1D	= 1	; AIN1 Digital Input Disable
+
+
+; ***** USART0 ***********************
+; UDR0 - USART I/O Data Register
+.equ	UDR0_0	= 0	; USART I/O Data Register bit 0
+.equ	UDR0_1	= 1	; USART I/O Data Register bit 1
+.equ	UDR0_2	= 2	; USART I/O Data Register bit 2
+.equ	UDR0_3	= 3	; USART I/O Data Register bit 3
+.equ	UDR0_4	= 4	; USART I/O Data Register bit 4
+.equ	UDR0_5	= 5	; USART I/O Data Register bit 5
+.equ	UDR0_6	= 6	; USART I/O Data Register bit 6
+.equ	UDR0_7	= 7	; USART I/O Data Register bit 7
+
+; UCSR0A - USART Control and Status Register A
+.equ	MPCM0	= 0	; Multi-processor Communication Mode
+.equ	U2X0	= 1	; Double the USART transmission speed
+.equ	UPE0	= 2	; Parity Error
+.equ	DOR0	= 3	; Data overRun
+.equ	FE0	= 4	; Framing Error
+.equ	UDRE0	= 5	; USART Data Register Empty
+.equ	TXC0	= 6	; USART Transmitt Complete
+.equ	RXC0	= 7	; USART Receive Complete
+
+; UCSR0B - USART Control and Status Register B
+.equ	TXB80	= 0	; Transmit Data Bit 8
+.equ	RXB80	= 1	; Receive Data Bit 8
+.equ	UCSZ02	= 2	; Character Size
+.equ	TXEN0	= 3	; Transmitter Enable
+.equ	RXEN0	= 4	; Receiver Enable
+.equ	UDRIE0	= 5	; USART Data register Empty Interrupt Enable
+.equ	TXCIE0	= 6	; TX Complete Interrupt Enable
+.equ	RXCIE0	= 7	; RX Complete Interrupt Enable
+
+; UCSR0C - USART Control and Status Register C
+.equ	UCPOL0	= 0	; Clock Polarity
+.equ	UCSZ00	= 1	; Character Size
+.equ	UCPHA0	= UCSZ00	; For compatibility
+.equ	UCSZ01	= 2	; Character Size
+.equ	UDORD0	= UCSZ01	; For compatibility
+.equ	USBS0	= 3	; Stop Bit Select
+.equ	UPM00	= 4	; Parity Mode Bit 0
+.equ	UPM01	= 5	; Parity Mode Bit 1
+.equ	UMSEL00	= 6	; USART Mode Select
+.equ	UMSEL0	= UMSEL00	; For compatibility
+.equ	UMSEL01	= 7	; USART Mode Select
+.equ	UMSEL1	= UMSEL01	; For compatibility
+
+; UBRR0H - USART Baud Rate Register High Byte
+.equ	UBRR8	= 0	; USART Baud Rate Register bit 8
+.equ	UBRR9	= 1	; USART Baud Rate Register bit 9
+.equ	UBRR10	= 2	; USART Baud Rate Register bit 10
+.equ	UBRR11	= 3	; USART Baud Rate Register bit 11
+
+; UBRR0L - USART Baud Rate Register Low Byte
+.equ	_UBRR0	= 0	; USART Baud Rate Register bit 0
+.equ	_UBRR1	= 1	; USART Baud Rate Register bit 1
+.equ	UBRR2	= 2	; USART Baud Rate Register bit 2
+.equ	UBRR3	= 3	; USART Baud Rate Register bit 3
+.equ	UBRR4	= 4	; USART Baud Rate Register bit 4
+.equ	UBRR5	= 5	; USART Baud Rate Register bit 5
+.equ	UBRR6	= 6	; USART Baud Rate Register bit 6
+.equ	UBRR7	= 7	; USART Baud Rate Register bit 7
+
+
+; ***** PORTA ************************
+; PORTA - Port A Data Register
+.equ	PORTA0	= 0	; Port A Data Register bit 0
+.equ	PA0	= 0	; For compatibility
+.equ	PORTA1	= 1	; Port A Data Register bit 1
+.equ	PA1	= 1	; For compatibility
+.equ	PORTA2	= 2	; Port A Data Register bit 2
+.equ	PA2	= 2	; For compatibility
+.equ	PORTA3	= 3	; Port A Data Register bit 3
+.equ	PA3	= 3	; For compatibility
+.equ	PORTA4	= 4	; Port A Data Register bit 4
+.equ	PA4	= 4	; For compatibility
+.equ	PORTA5	= 5	; Port A Data Register bit 5
+.equ	PA5	= 5	; For compatibility
+.equ	PORTA6	= 6	; Port A Data Register bit 6
+.equ	PA6	= 6	; For compatibility
+.equ	PORTA7	= 7	; Port A Data Register bit 7
+.equ	PA7	= 7	; For compatibility
+
+; DDRA - Port A Data Direction Register
+.equ	DDA0	= 0	; Data Direction Register, Port A, bit 0
+.equ	DDA1	= 1	; Data Direction Register, Port A, bit 1
+.equ	DDA2	= 2	; Data Direction Register, Port A, bit 2
+.equ	DDA3	= 3	; Data Direction Register, Port A, bit 3
+.equ	DDA4	= 4	; Data Direction Register, Port A, bit 4
+.equ	DDA5	= 5	; Data Direction Register, Port A, bit 5
+.equ	DDA6	= 6	; Data Direction Register, Port A, bit 6
+.equ	DDA7	= 7	; Data Direction Register, Port A, bit 7
+
+; PINA - Port A Input Pins
+.equ	PINA0	= 0	; Input Pins, Port A bit 0
+.equ	PINA1	= 1	; Input Pins, Port A bit 1
+.equ	PINA2	= 2	; Input Pins, Port A bit 2
+.equ	PINA3	= 3	; Input Pins, Port A bit 3
+.equ	PINA4	= 4	; Input Pins, Port A bit 4
+.equ	PINA5	= 5	; Input Pins, Port A bit 5
+.equ	PINA6	= 6	; Input Pins, Port A bit 6
+.equ	PINA7	= 7	; Input Pins, Port A bit 7
+
+
+; ***** PORTB ************************
+; PORTB - Port B Data Register
+.equ	PORTB0	= 0	; Port B Data Register bit 0
+.equ	PB0	= 0	; For compatibility
+.equ	PORTB1	= 1	; Port B Data Register bit 1
+.equ	PB1	= 1	; For compatibility
+.equ	PORTB2	= 2	; Port B Data Register bit 2
+.equ	PB2	= 2	; For compatibility
+.equ	PORTB3	= 3	; Port B Data Register bit 3
+.equ	PB3	= 3	; For compatibility
+.equ	PORTB4	= 4	; Port B Data Register bit 4
+.equ	PB4	= 4	; For compatibility
+.equ	PORTB5	= 5	; Port B Data Register bit 5
+.equ	PB5	= 5	; For compatibility
+.equ	PORTB6	= 6	; Port B Data Register bit 6
+.equ	PB6	= 6	; For compatibility
+.equ	PORTB7	= 7	; Port B Data Register bit 7
+.equ	PB7	= 7	; For compatibility
+
+; DDRB - Port B Data Direction Register
+.equ	DDB0	= 0	; Port B Data Direction Register bit 0
+.equ	DDB1	= 1	; Port B Data Direction Register bit 1
+.equ	DDB2	= 2	; Port B Data Direction Register bit 2
+.equ	DDB3	= 3	; Port B Data Direction Register bit 3
+.equ	DDB4	= 4	; Port B Data Direction Register bit 4
+.equ	DDB5	= 5	; Port B Data Direction Register bit 5
+.equ	DDB6	= 6	; Port B Data Direction Register bit 6
+.equ	DDB7	= 7	; Port B Data Direction Register bit 7
+
+; PINB - Port B Input Pins
+.equ	PINB0	= 0	; Port B Input Pins bit 0
+.equ	PINB1	= 1	; Port B Input Pins bit 1
+.equ	PINB2	= 2	; Port B Input Pins bit 2
+.equ	PINB3	= 3	; Port B Input Pins bit 3
+.equ	PINB4	= 4	; Port B Input Pins bit 4
+.equ	PINB5	= 5	; Port B Input Pins bit 5
+.equ	PINB6	= 6	; Port B Input Pins bit 6
+.equ	PINB7	= 7	; Port B Input Pins bit 7
+
+
+; ***** PORTC ************************
+; PORTC - Port C Data Register
+.equ	PORTC0	= 0	; Port C Data Register bit 0
+.equ	PC0	= 0	; For compatibility
+.equ	PORTC1	= 1	; Port C Data Register bit 1
+.equ	PC1	= 1	; For compatibility
+.equ	PORTC2	= 2	; Port C Data Register bit 2
+.equ	PC2	= 2	; For compatibility
+.equ	PORTC3	= 3	; Port C Data Register bit 3
+.equ	PC3	= 3	; For compatibility
+.equ	PORTC4	= 4	; Port C Data Register bit 4
+.equ	PC4	= 4	; For compatibility
+.equ	PORTC5	= 5	; Port C Data Register bit 5
+.equ	PC5	= 5	; For compatibility
+.equ	PORTC6	= 6	; Port C Data Register bit 6
+.equ	PC6	= 6	; For compatibility
+.equ	PORTC7	= 7	; Port C Data Register bit 7
+.equ	PC7	= 7	; For compatibility
+
+; DDRC - Port C Data Direction Register
+.equ	DDC0	= 0	; Port C Data Direction Register bit 0
+.equ	DDC1	= 1	; Port C Data Direction Register bit 1
+.equ	DDC2	= 2	; Port C Data Direction Register bit 2
+.equ	DDC3	= 3	; Port C Data Direction Register bit 3
+.equ	DDC4	= 4	; Port C Data Direction Register bit 4
+.equ	DDC5	= 5	; Port C Data Direction Register bit 5
+.equ	DDC6	= 6	; Port C Data Direction Register bit 6
+.equ	DDC7	= 7	; Port C Data Direction Register bit 7
+
+; PINC - Port C Input Pins
+.equ	PINC0	= 0	; Port C Input Pins bit 0
+.equ	PINC1	= 1	; Port C Input Pins bit 1
+.equ	PINC2	= 2	; Port C Input Pins bit 2
+.equ	PINC3	= 3	; Port C Input Pins bit 3
+.equ	PINC4	= 4	; Port C Input Pins bit 4
+.equ	PINC5	= 5	; Port C Input Pins bit 5
+.equ	PINC6	= 6	; Port C Input Pins bit 6
+.equ	PINC7	= 7	; Port C Input Pins bit 7
+
+
+; ***** PORTD ************************
+; PORTD - Port D Data Register
+.equ	PORTD0	= 0	; Port D Data Register bit 0
+.equ	PD0	= 0	; For compatibility
+.equ	PORTD1	= 1	; Port D Data Register bit 1
+.equ	PD1	= 1	; For compatibility
+.equ	PORTD2	= 2	; Port D Data Register bit 2
+.equ	PD2	= 2	; For compatibility
+.equ	PORTD3	= 3	; Port D Data Register bit 3
+.equ	PD3	= 3	; For compatibility
+.equ	PORTD4	= 4	; Port D Data Register bit 4
+.equ	PD4	= 4	; For compatibility
+.equ	PORTD5	= 5	; Port D Data Register bit 5
+.equ	PD5	= 5	; For compatibility
+.equ	PORTD6	= 6	; Port D Data Register bit 6
+.equ	PD6	= 6	; For compatibility
+.equ	PORTD7	= 7	; Port D Data Register bit 7
+.equ	PD7	= 7	; For compatibility
+
+; DDRD - Port D Data Direction Register
+.equ	DDD0	= 0	; Port D Data Direction Register bit 0
+.equ	DDD1	= 1	; Port D Data Direction Register bit 1
+.equ	DDD2	= 2	; Port D Data Direction Register bit 2
+.equ	DDD3	= 3	; Port D Data Direction Register bit 3
+.equ	DDD4	= 4	; Port D Data Direction Register bit 4
+.equ	DDD5	= 5	; Port D Data Direction Register bit 5
+.equ	DDD6	= 6	; Port D Data Direction Register bit 6
+.equ	DDD7	= 7	; Port D Data Direction Register bit 7
+
+; PIND - Port D Input Pins
+.equ	PIND0	= 0	; Port D Input Pins bit 0
+.equ	PIND1	= 1	; Port D Input Pins bit 1
+.equ	PIND2	= 2	; Port D Input Pins bit 2
+.equ	PIND3	= 3	; Port D Input Pins bit 3
+.equ	PIND4	= 4	; Port D Input Pins bit 4
+.equ	PIND5	= 5	; Port D Input Pins bit 5
+.equ	PIND6	= 6	; Port D Input Pins bit 6
+.equ	PIND7	= 7	; Port D Input Pins bit 7
+
+
+; ***** TIMER_COUNTER_0 **************
+; TIMSK0 - Timer/Counter0 Interrupt Mask Register
+.equ	TOIE0	= 0	; Timer/Counter0 Overflow Interrupt Enable
+.equ	OCIE0A	= 1	; Timer/Counter0 Output Compare Match A Interrupt Enable
+.equ	OCIE0B	= 2	; Timer/Counter0 Output Compare Match B Interrupt Enable
+
+; TIFR0 - Timer/Counter0 Interrupt Flag register
+.equ	TOV0	= 0	; Timer/Counter0 Overflow Flag
+.equ	OCF0A	= 1	; Timer/Counter0 Output Compare Flag 0A
+.equ	OCF0B	= 2	; Timer/Counter0 Output Compare Flag 0B
+
+; TCCR0A - Timer/Counter  Control Register A
+.equ	WGM00	= 0	; Waveform Generation Mode
+.equ	WGM01	= 1	; Waveform Generation Mode
+.equ	COM0B0	= 4	; Compare Output Mode, Fast PWm
+.equ	COM0B1	= 5	; Compare Output Mode, Fast PWm
+.equ	COM0A0	= 6	; Compare Output Mode, Phase Correct PWM Mode
+.equ	COM0A1	= 7	; Compare Output Mode, Phase Correct PWM Mode
+
+; TCCR0B - Timer/Counter Control Register B
+.equ	CS00	= 0	; Clock Select
+.equ	CS01	= 1	; Clock Select
+.equ	CS02	= 2	; Clock Select
+.equ	WGM02	= 3	; 
+.equ	FOC0B	= 6	; Force Output Compare B
+.equ	FOC0A	= 7	; Force Output Compare A
+
+; TCNT0 - Timer/Counter0
+.equ	TCNT0_0	= 0	; 
+.equ	TCNT0_1	= 1	; 
+.equ	TCNT0_2	= 2	; 
+.equ	TCNT0_3	= 3	; 
+.equ	TCNT0_4	= 4	; 
+.equ	TCNT0_5	= 5	; 
+.equ	TCNT0_6	= 6	; 
+.equ	TCNT0_7	= 7	; 
+
+; OCR0A - Timer/Counter0 Output Compare Register
+.equ	OCR0A_0	= 0	; 
+.equ	OCR0A_1	= 1	; 
+.equ	OCR0A_2	= 2	; 
+.equ	OCR0A_3	= 3	; 
+.equ	OCR0A_4	= 4	; 
+.equ	OCR0A_5	= 5	; 
+.equ	OCR0A_6	= 6	; 
+.equ	OCR0A_7	= 7	; 
+
+; OCR0B - Timer/Counter0 Output Compare Register
+.equ	OCR0B_0	= 0	; 
+.equ	OCR0B_1	= 1	; 
+.equ	OCR0B_2	= 2	; 
+.equ	OCR0B_3	= 3	; 
+.equ	OCR0B_4	= 4	; 
+.equ	OCR0B_5	= 5	; 
+.equ	OCR0B_6	= 6	; 
+.equ	OCR0B_7	= 7	; 
+
+; GTCCR - General Timer/Counter Control Register
+.equ	PSRSYNC	= 0	; Prescaler Reset Timer/Counter1 and Timer/Counter0
+.equ	PSR10	= PSRSYNC	; For compatibility
+.equ	TSM	= 7	; Timer/Counter Synchronization Mode
+
+
+; ***** TIMER_COUNTER_1 **************
+; TIMSK1 - Timer/Counter1 Interrupt Mask Register
+.equ	TOIE1	= 0	; Timer/Counter1 Overflow Interrupt Enable
+.equ	OCIE1A	= 1	; Timer/Counter1 Output Compare A Match Interrupt Enable
+.equ	OCIE1B	= 2	; Timer/Counter1 Output Compare B Match Interrupt Enable
+.equ	ICIE1	= 5	; Timer/Counter1 Input Capture Interrupt Enable
+
+; TIFR1 - Timer/Counter Interrupt Flag register
+.equ	TOV1	= 0	; Timer/Counter1 Overflow Flag
+.equ	OCF1A	= 1	; Timer/Counter1 Output Compare A Match Flag
+.equ	OCF1B	= 2	; Timer/Counter1 Output Compare B Match Flag
+.equ	ICF1	= 5	; Timer/Counter1 Input Capture Flag
+
+; TCCR1A - Timer/Counter1 Control Register A
+.equ	WGM10	= 0	; Pulse Width Modulator Select Bit 0
+.equ	PWM10	= WGM10	; For compatibility
+.equ	WGM11	= 1	; Pulse Width Modulator Select Bit 1
+.equ	PWM11	= WGM11	; For compatibility
+.equ	COM1B0	= 4	; Comparet Ouput Mode 1B, bit 0
+.equ	COM1B1	= 5	; Compare Output Mode 1B, bit 1
+.equ	COM1A0	= 6	; Comparet Ouput Mode 1A, bit 0
+.equ	COM1A1	= 7	; Compare Output Mode 1A, bit 1
+
+; TCCR1B - Timer/Counter1 Control Register B
+.equ	CS10	= 0	; Clock Select bit 0
+.equ	CS11	= 1	; Clock Select 1 bit 1
+.equ	CS12	= 2	; Clock Select1 bit 2
+.equ	WGM12	= 3	; Waveform Generation Mode Bit 2
+.equ	CTC1	= WGM12	; For compatibility
+.equ	WGM13	= 4	; Waveform Generation Mode Bit 3
+.equ	ICES1	= 6	; Input Capture 1 Edge Select
+.equ	ICNC1	= 7	; Input Capture 1 Noise Canceler
+
+; TCCR1C - Timer/Counter1 Control Register C
+.equ	FOC1B	= 6	; Force Output Compare for Channel B
+.equ	FOC1A	= 7	; Force Output Compare for Channel A
+
+
+; ***** TIMER_COUNTER_2 **************
+; TIMSK2 - Timer/Counter Interrupt Mask register
+.equ	TOIE2	= 0	; Timer/Counter2 Overflow Interrupt Enable
+.equ	TOIE2A	= TOIE2	; For compatibility
+.equ	OCIE2A	= 1	; Timer/Counter2 Output Compare Match A Interrupt Enable
+.equ	OCIE2B	= 2	; Timer/Counter2 Output Compare Match B Interrupt Enable
+
+; TIFR2 - Timer/Counter Interrupt Flag Register
+.equ	TOV2	= 0	; Timer/Counter2 Overflow Flag
+.equ	OCF2A	= 1	; Output Compare Flag 2A
+.equ	OCF2B	= 2	; Output Compare Flag 2B
+
+; TCCR2A - Timer/Counter2 Control Register A
+.equ	WGM20	= 0	; Waveform Genration Mode
+.equ	WGM21	= 1	; Waveform Genration Mode
+.equ	COM2B0	= 4	; Compare Output Mode bit 0
+.equ	COM2B1	= 5	; Compare Output Mode bit 1
+.equ	COM2A0	= 6	; Compare Output Mode bit 1
+.equ	COM2A1	= 7	; Compare Output Mode bit 1
+
+; TCCR2B - Timer/Counter2 Control Register B
+.equ	CS20	= 0	; Clock Select bit 0
+.equ	CS21	= 1	; Clock Select bit 1
+.equ	CS22	= 2	; Clock Select bit 2
+.equ	WGM22	= 3	; Waveform Generation Mode
+.equ	FOC2B	= 6	; Force Output Compare B
+.equ	FOC2A	= 7	; Force Output Compare A
+
+; TCNT2 - Timer/Counter2
+.equ	TCNT2_0	= 0	; Timer/Counter 2 bit 0
+.equ	TCNT2_1	= 1	; Timer/Counter 2 bit 1
+.equ	TCNT2_2	= 2	; Timer/Counter 2 bit 2
+.equ	TCNT2_3	= 3	; Timer/Counter 2 bit 3
+.equ	TCNT2_4	= 4	; Timer/Counter 2 bit 4
+.equ	TCNT2_5	= 5	; Timer/Counter 2 bit 5
+.equ	TCNT2_6	= 6	; Timer/Counter 2 bit 6
+.equ	TCNT2_7	= 7	; Timer/Counter 2 bit 7
+
+; OCR2A - Timer/Counter2 Output Compare Register A
+.equ	OCR2A_0	= 0	; Timer/Counter2 Output Compare Register Bit 0
+.equ	OCR2A_1	= 1	; Timer/Counter2 Output Compare Register Bit 1
+.equ	OCR2A_2	= 2	; Timer/Counter2 Output Compare Register Bit 2
+.equ	OCR2A_3	= 3	; Timer/Counter2 Output Compare Register Bit 3
+.equ	OCR2A_4	= 4	; Timer/Counter2 Output Compare Register Bit 4
+.equ	OCR2A_5	= 5	; Timer/Counter2 Output Compare Register Bit 5
+.equ	OCR2A_6	= 6	; Timer/Counter2 Output Compare Register Bit 6
+.equ	OCR2A_7	= 7	; Timer/Counter2 Output Compare Register Bit 7
+
+; OCR2B - Timer/Counter2 Output Compare Register B
+.equ	OCR2B_0	= 0	; Timer/Counter2 Output Compare Register Bit 0
+.equ	OCR2B_1	= 1	; Timer/Counter2 Output Compare Register Bit 1
+.equ	OCR2B_2	= 2	; Timer/Counter2 Output Compare Register Bit 2
+.equ	OCR2B_3	= 3	; Timer/Counter2 Output Compare Register Bit 3
+.equ	OCR2B_4	= 4	; Timer/Counter2 Output Compare Register Bit 4
+.equ	OCR2B_5	= 5	; Timer/Counter2 Output Compare Register Bit 5
+.equ	OCR2B_6	= 6	; Timer/Counter2 Output Compare Register Bit 6
+.equ	OCR2B_7	= 7	; Timer/Counter2 Output Compare Register Bit 7
+
+; ASSR - Asynchronous Status Register
+.equ	TCR2BUB	= 0	; Timer/Counter Control Register2 Update Busy
+.equ	TCR2AUB	= 1	; Timer/Counter Control Register2 Update Busy
+.equ	OCR2BUB	= 2	; Output Compare Register 2 Update Busy
+.equ	OCR2AUB	= 3	; Output Compare Register2 Update Busy
+.equ	TCN2UB	= 4	; Timer/Counter2 Update Busy
+.equ	AS2	= 5	; Asynchronous Timer/Counter2
+.equ	EXCLK	= 6	; Enable External Clock Input
+
+; GTCCR - General Timer Counter Control register
+.equ	PSRASY	= 1	; Prescaler Reset Timer/Counter2
+.equ	PSR2	= PSRASY	; For compatibility
+;.equ	TSM	= 7	; Timer/Counter Synchronization Mode
+
+
+; ***** TIMER_COUNTER_3 **************
+; TIMSK3 - Timer/Counter3 Interrupt Mask Register
+.equ	TOIE3	= 0	; Timer/Counter3 Overflow Interrupt Enable
+.equ	OCIE3A	= 1	; Timer/Counter3 Output Compare A Match Interrupt Enable
+.equ	OCIE3B	= 2	; Timer/Counter3 Output Compare B Match Interrupt Enable
+.equ	ICIE3	= 5	; Timer/Counter3 Input Capture Interrupt Enable
+
+; TIFR3 - Timer/Counter Interrupt Flag register
+.equ	TOV3	= 0	; Timer/Counter3 Overflow Flag
+.equ	OCF3A	= 1	; Timer/Counter3 Output Compare A Match Flag
+.equ	OCF3B	= 2	; Timer/Counter3 Output Compare B Match Flag
+.equ	ICF3	= 5	; Timer/Counter3 Input Capture Flag
+
+; TCCR3A - Timer/Counter3 Control Register A
+.equ	WGM30	= 0	; Pulse Width Modulator Select Bit 0
+.equ	WGM31	= 1	; Pulse Width Modulator Select Bit 1
+.equ	COM3B0	= 4	; Comparet Ouput Mode 3B, bit 0
+.equ	COM3B1	= 5	; Compare Output Mode 3B, bit 1
+.equ	COM3A0	= 6	; Comparet Ouput Mode 3A, bit 0
+.equ	COM3A1	= 7	; Compare Output Mode 3A, bit 1
+
+; TCCR3B - Timer/Counter3 Control Register B
+.equ	CS30	= 0	; Clock Select bit 0
+.equ	CS31	= 1	; Clock Select 3 bit 1
+.equ	CS32	= 2	; Clock Select3 bit 2
+.equ	WGM32	= 3	; Waveform Generation Mode Bit 2
+.equ	WGM33	= 4	; Waveform Generation Mode Bit 3
+.equ	ICES3	= 6	; Input Capture 3 Edge Select
+.equ	ICNC3	= 7	; Input Capture 3 Noise Canceler
+
+; TCCR3C - Timer/Counter3 Control Register C
+.equ	FOC3B	= 6	; Force Output Compare for Channel B
+.equ	FOC3A	= 7	; Force Output Compare for Channel A
+
+; OCR3BH - Timer/Counter3 Output Compare Register B High Byte
+.equ	OCR3AH0	= 0	; Timer/Counter3 Output Compare Register High Byte bit 0
+.equ	OCR3AH1	= 1	; Timer/Counter3 Output Compare Register High Byte bit 1
+.equ	OCR3AH2	= 2	; Timer/Counter3 Output Compare Register High Byte bit 2
+.equ	OCR3AH3	= 3	; Timer/Counter3 Output Compare Register High Byte bit 3
+.equ	OCR3AH4	= 4	; Timer/Counter3 Output Compare Register High Byte bit 4
+.equ	OCR3AH5	= 5	; Timer/Counter3 Output Compare Register High Byte bit 5
+.equ	OCR3AH6	= 6	; Timer/Counter3 Output Compare Register High Byte bit 6
+.equ	OCR3AH7	= 7	; Timer/Counter3 Output Compare Register High Byte bit 7
+
+; OCR3BL - Timer/Counter3 Output Compare Register B Low Byte
+.equ	OCR3AL0	= 0	; Timer/Counter3 Output Compare Register Low Byte Bit 0
+.equ	OCR3AL1	= 1	; Timer/Counter3 Output Compare Register Low Byte Bit 1
+.equ	OCR3AL2	= 2	; Timer/Counter3 Output Compare Register Low Byte Bit 2
+.equ	OCR3AL3	= 3	; Timer/Counter3 Output Compare Register Low Byte Bit 3
+.equ	OCR3AL4	= 4	; Timer/Counter3 Output Compare Register Low Byte Bit 4
+.equ	OCR3AL5	= 5	; Timer/Counter3 Output Compare Register Low Byte Bit 5
+.equ	OCR3AL6	= 6	; Timer/Counter3 Output Compare Register Low Byte Bit 6
+.equ	OCR3AL7	= 7	; Timer/Counter3 Output Compare Register Low Byte Bit 7
+
+
+; ***** BOOT_LOAD ********************
+; SPMCSR - Store Program Memory Control Register
+.equ	SPMEN	= 0	; Store Program Memory Enable
+.equ	PGERS	= 1	; Page Erase
+.equ	PGWRT	= 2	; Page Write
+.equ	BLBSET	= 3	; Boot Lock Bit Set
+.equ	RWWSRE	= 4	; Read While Write section read enable
+.equ	SIGRD	= 5	; Signature Row Read
+.equ	RWWSB	= 6	; Read While Write Section Busy
+.equ	SPMIE	= 7	; SPM Interrupt Enable
+
+
+; ***** EXTERNAL_INTERRUPT ***********
+; EICRA - External Interrupt Control Register A
+.equ	ISC00	= 0	; External Interrupt Sense Control Bit
+.equ	ISC01	= 1	; External Interrupt Sense Control Bit
+.equ	ISC10	= 2	; External Interrupt Sense Control Bit
+.equ	ISC11	= 3	; External Interrupt Sense Control Bit
+.equ	ISC20	= 4	; External Interrupt Sense Control Bit
+.equ	ISC21	= 5	; External Interrupt Sense Control Bit
+
+; EIMSK - External Interrupt Mask Register
+.equ	INT0	= 0	; External Interrupt Request 0 Enable
+.equ	INT1	= 1	; External Interrupt Request 1 Enable
+.equ	INT2	= 2	; External Interrupt Request 2 Enable
+
+; EIFR - External Interrupt Flag Register
+.equ	INTF0	= 0	; External Interrupt Flag 0
+.equ	INTF1	= 1	; External Interrupt Flag 1
+.equ	INTF2	= 2	; External Interrupt Flag 2
+
+; PCICR - Pin Change Interrupt Control Register
+.equ	PCIE0	= 0	; Pin Change Interrupt Enable 0
+.equ	PCIE1	= 1	; Pin Change Interrupt Enable 1
+.equ	PCIE2	= 2	; Pin Change Interrupt Enable 2
+.equ	PCIE3	= 3	; Pin Change Interrupt Enable 3
+
+; PCIFR - Pin Change Interrupt Flag Register
+.equ	PCIF0	= 0	; Pin Change Interrupt Flag 0
+.equ	PCIF1	= 1	; Pin Change Interrupt Flag 1
+.equ	PCIF2	= 2	; Pin Change Interrupt Flag 2
+.equ	PCIF3	= 3	; Pin Change Interrupt Flag 3
+
+; PCMSK3 - Pin Change Mask Register 3
+.equ	PCINT24	= 0	; Pin Change Enable Mask 24
+.equ	PCINT25	= 1	; Pin Change Enable Mask 25
+.equ	PCINT26	= 2	; Pin Change Enable Mask 26
+.equ	PCINT27	= 3	; Pin Change Enable Mask 27
+.equ	PCINT28	= 4	; Pin Change Enable Mask 28
+.equ	PCINT29	= 5	; Pin Change Enable Mask 29
+.equ	PCINT30	= 6	; Pin Change Enable Mask 30
+.equ	PCINT31	= 7	; Pin Change Enable Mask 31
+
+; PCMSK2 - Pin Change Mask Register 2
+.equ	PCINT16	= 0	; Pin Change Enable Mask 16
+.equ	PCINT17	= 1	; Pin Change Enable Mask 17
+.equ	PCINT18	= 2	; Pin Change Enable Mask 18
+.equ	PCINT19	= 3	; Pin Change Enable Mask 19
+.equ	PCINT20	= 4	; Pin Change Enable Mask 20
+.equ	PCINT21	= 5	; Pin Change Enable Mask 21
+.equ	PCINT22	= 6	; Pin Change Enable Mask 22
+.equ	PCINT23	= 7	; Pin Change Enable Mask 23
+
+; PCMSK1 - Pin Change Mask Register 1
+.equ	PCINT8	= 0	; Pin Change Enable Mask 8
+.equ	PCINT9	= 1	; Pin Change Enable Mask 9
+.equ	PCINT10	= 2	; Pin Change Enable Mask 10
+.equ	PCINT11	= 3	; Pin Change Enable Mask 11
+.equ	PCINT12	= 4	; Pin Change Enable Mask 12
+.equ	PCINT13	= 5	; Pin Change Enable Mask 13
+.equ	PCINT14	= 6	; Pin Change Enable Mask 14
+.equ	PCINT15	= 7	; Pin Change Enable Mask 15
+
+; PCMSK0 - Pin Change Mask Register 0
+.equ	PCINT0	= 0	; Pin Change Enable Mask 0
+.equ	PCINT1	= 1	; Pin Change Enable Mask 1
+.equ	PCINT2	= 2	; Pin Change Enable Mask 2
+.equ	PCINT3	= 3	; Pin Change Enable Mask 3
+.equ	PCINT4	= 4	; Pin Change Enable Mask 4
+.equ	PCINT5	= 5	; Pin Change Enable Mask 5
+.equ	PCINT6	= 6	; Pin Change Enable Mask 6
+.equ	PCINT7	= 7	; Pin Change Enable Mask 7
+
+
+; ***** AD_CONVERTER *****************
+; ADMUX - The ADC multiplexer Selection Register
+.equ	MUX0	= 0	; Analog Channel and Gain Selection Bits
+.equ	MUX1	= 1	; Analog Channel and Gain Selection Bits
+.equ	MUX2	= 2	; Analog Channel and Gain Selection Bits
+.equ	MUX3	= 3	; Analog Channel and Gain Selection Bits
+.equ	MUX4	= 4	; Analog Channel and Gain Selection Bits
+.equ	ADLAR	= 5	; Left Adjust Result
+.equ	REFS0	= 6	; Reference Selection Bit 0
+.equ	REFS1	= 7	; Reference Selection Bit 1
+
+; ADCSRA - The ADC Control and Status register A
+.equ	ADPS0	= 0	; ADC  Prescaler Select Bits
+.equ	ADPS1	= 1	; ADC  Prescaler Select Bits
+.equ	ADPS2	= 2	; ADC  Prescaler Select Bits
+.equ	ADIE	= 3	; ADC Interrupt Enable
+.equ	ADIF	= 4	; ADC Interrupt Flag
+.equ	ADATE	= 5	; ADC  Auto Trigger Enable
+.equ	ADSC	= 6	; ADC Start Conversion
+.equ	ADEN	= 7	; ADC Enable
+
+; ADCSRB - The ADC Control and Status register B
+.equ	ADTS0	= 0	; ADC Auto Trigger Source bit 0
+.equ	ADTS1	= 1	; ADC Auto Trigger Source bit 1
+.equ	ADTS2	= 2	; ADC Auto Trigger Source bit 2
+;.equ	ACME	= 6	; 
+
+; ADCH - ADC Data Register High Byte
+.equ	ADCH0	= 0	; ADC Data Register High Byte Bit 0
+.equ	ADCH1	= 1	; ADC Data Register High Byte Bit 1
+.equ	ADCH2	= 2	; ADC Data Register High Byte Bit 2
+.equ	ADCH3	= 3	; ADC Data Register High Byte Bit 3
+.equ	ADCH4	= 4	; ADC Data Register High Byte Bit 4
+.equ	ADCH5	= 5	; ADC Data Register High Byte Bit 5
+.equ	ADCH6	= 6	; ADC Data Register High Byte Bit 6
+.equ	ADCH7	= 7	; ADC Data Register High Byte Bit 7
+
+; ADCL - ADC Data Register Low Byte
+.equ	ADCL0	= 0	; ADC Data Register Low Byte Bit 0
+.equ	ADCL1	= 1	; ADC Data Register Low Byte Bit 1
+.equ	ADCL2	= 2	; ADC Data Register Low Byte Bit 2
+.equ	ADCL3	= 3	; ADC Data Register Low Byte Bit 3
+.equ	ADCL4	= 4	; ADC Data Register Low Byte Bit 4
+.equ	ADCL5	= 5	; ADC Data Register Low Byte Bit 5
+.equ	ADCL6	= 6	; ADC Data Register Low Byte Bit 6
+.equ	ADCL7	= 7	; ADC Data Register Low Byte Bit 7
+
+; DIDR0 - Digital Input Disable Register
+.equ	ADC0D	= 0	; 
+.equ	ADC1D	= 1	; 
+.equ	ADC2D	= 2	; 
+.equ	ADC3D	= 3	; 
+.equ	ADC4D	= 4	; 
+.equ	ADC5D	= 5	; 
+.equ	ADC6D	= 6	; 
+.equ	ADC7D	= 7	; 
+
+
+; ***** JTAG *************************
+; OCDR - On-Chip Debug Related Register in I/O Memory
+.equ	OCDR0	= 0	; On-Chip Debug Register Bit 0
+.equ	OCDR1	= 1	; On-Chip Debug Register Bit 1
+.equ	OCDR2	= 2	; On-Chip Debug Register Bit 2
+.equ	OCDR3	= 3	; On-Chip Debug Register Bit 3
+.equ	OCDR4	= 4	; On-Chip Debug Register Bit 4
+.equ	OCDR5	= 5	; On-Chip Debug Register Bit 5
+.equ	OCDR6	= 6	; On-Chip Debug Register Bit 6
+.equ	OCDR7	= 7	; On-Chip Debug Register Bit 7
+.equ	IDRD	= OCDR7	; For compatibility
+
+; MCUCR - MCU Control Register
+.equ	JTD	= 7	; JTAG Interface Disable
+
+; MCUSR - MCU Status Register
+.equ	JTRF	= 4	; JTAG Reset Flag
+
+
+; ***** EEPROM ***********************
+; EEARH - EEPROM Address Register Low Byte
+.equ	EEAR8	= 0	; EEPROM Read/Write Access Bit 8
+.equ	EEAR9	= 1	; EEPROM Read/Write Access Bit 9
+.equ	EEAR10	= 2	; EEPROM Read/Write Access Bit 10
+.equ	EEAR11	= 3	; EEPROM Read/Write Access Bit 11
+
+; EEARL - EEPROM Address Register Low Byte
+.equ	EEAR0	= 0	; EEPROM Read/Write Access Bit 0
+.equ	EEAR1	= 1	; EEPROM Read/Write Access Bit 1
+.equ	EEAR2	= 2	; EEPROM Read/Write Access Bit 2
+.equ	EEAR3	= 3	; EEPROM Read/Write Access Bit 3
+.equ	EEAR4	= 4	; EEPROM Read/Write Access Bit 4
+.equ	EEAR5	= 5	; EEPROM Read/Write Access Bit 5
+.equ	EEAR6	= 6	; EEPROM Read/Write Access Bit 6
+.equ	EEAR7	= 7	; EEPROM Read/Write Access Bit 7
+
+; EEDR - EEPROM Data Register
+.equ	EEDR0	= 0	; EEPROM Data Register bit 0
+.equ	EEDR1	= 1	; EEPROM Data Register bit 1
+.equ	EEDR2	= 2	; EEPROM Data Register bit 2
+.equ	EEDR3	= 3	; EEPROM Data Register bit 3
+.equ	EEDR4	= 4	; EEPROM Data Register bit 4
+.equ	EEDR5	= 5	; EEPROM Data Register bit 5
+.equ	EEDR6	= 6	; EEPROM Data Register bit 6
+.equ	EEDR7	= 7	; EEPROM Data Register bit 7
+
+; EECR - EEPROM Control Register
+.equ	EERE	= 0	; EEPROM Read Enable
+.equ	EEPE	= 1	; EEPROM Write Enable
+.equ	EEMPE	= 2	; EEPROM Master Write Enable
+.equ	EERIE	= 3	; EEPROM Ready Interrupt Enable
+.equ	EEPM0	= 4	; EEPROM Programming Mode Bit 0
+.equ	EEPM1	= 5	; EEPROM Programming Mode Bit 1
+
+
+; ***** TWI **************************
+; TWAMR - TWI (Slave) Address Mask Register
+.equ	TWAM0	= 1	; 
+.equ	TWAMR0	= TWAM0	; For compatibility
+.equ	TWAM1	= 2	; 
+.equ	TWAMR1	= TWAM1	; For compatibility
+.equ	TWAM2	= 3	; 
+.equ	TWAMR2	= TWAM2	; For compatibility
+.equ	TWAM3	= 4	; 
+.equ	TWAMR3	= TWAM3	; For compatibility
+.equ	TWAM4	= 5	; 
+.equ	TWAMR4	= TWAM4	; For compatibility
+.equ	TWAM5	= 6	; 
+.equ	TWAMR5	= TWAM5	; For compatibility
+.equ	TWAM6	= 7	; 
+.equ	TWAMR6	= TWAM6	; For compatibility
+
+; TWBR - TWI Bit Rate register
+.equ	TWBR0	= 0	; 
+.equ	TWBR1	= 1	; 
+.equ	TWBR2	= 2	; 
+.equ	TWBR3	= 3	; 
+.equ	TWBR4	= 4	; 
+.equ	TWBR5	= 5	; 
+.equ	TWBR6	= 6	; 
+.equ	TWBR7	= 7	; 
+
+; TWCR - TWI Control Register
+.equ	TWIE	= 0	; TWI Interrupt Enable
+.equ	TWEN	= 2	; TWI Enable Bit
+.equ	TWWC	= 3	; TWI Write Collition Flag
+.equ	TWSTO	= 4	; TWI Stop Condition Bit
+.equ	TWSTA	= 5	; TWI Start Condition Bit
+.equ	TWEA	= 6	; TWI Enable Acknowledge Bit
+.equ	TWINT	= 7	; TWI Interrupt Flag
+
+; TWSR - TWI Status Register
+.equ	TWPS0	= 0	; TWI Prescaler
+.equ	TWPS1	= 1	; TWI Prescaler
+.equ	TWS3	= 3	; TWI Status
+.equ	TWS4	= 4	; TWI Status
+.equ	TWS5	= 5	; TWI Status
+.equ	TWS6	= 6	; TWI Status
+.equ	TWS7	= 7	; TWI Status
+
+; TWDR - TWI Data register
+.equ	TWD0	= 0	; TWI Data Register Bit 0
+.equ	TWD1	= 1	; TWI Data Register Bit 1
+.equ	TWD2	= 2	; TWI Data Register Bit 2
+.equ	TWD3	= 3	; TWI Data Register Bit 3
+.equ	TWD4	= 4	; TWI Data Register Bit 4
+.equ	TWD5	= 5	; TWI Data Register Bit 5
+.equ	TWD6	= 6	; TWI Data Register Bit 6
+.equ	TWD7	= 7	; TWI Data Register Bit 7
+
+; TWAR - TWI (Slave) Address register
+.equ	TWGCE	= 0	; TWI General Call Recognition Enable Bit
+.equ	TWA0	= 1	; TWI (Slave) Address register Bit 0
+.equ	TWA1	= 2	; TWI (Slave) Address register Bit 1
+.equ	TWA2	= 3	; TWI (Slave) Address register Bit 2
+.equ	TWA3	= 4	; TWI (Slave) Address register Bit 3
+.equ	TWA4	= 5	; TWI (Slave) Address register Bit 4
+.equ	TWA5	= 6	; TWI (Slave) Address register Bit 5
+.equ	TWA6	= 7	; TWI (Slave) Address register Bit 6
+
+
+; ***** USART1 ***********************
+; UDR1 - USART I/O Data Register
+.equ	UDR1_0	= 0	; USART I/O Data Register bit 0
+.equ	UDR1_1	= 1	; USART I/O Data Register bit 1
+.equ	UDR1_2	= 2	; USART I/O Data Register bit 2
+.equ	UDR1_3	= 3	; USART I/O Data Register bit 3
+.equ	UDR1_4	= 4	; USART I/O Data Register bit 4
+.equ	UDR1_5	= 5	; USART I/O Data Register bit 5
+.equ	UDR1_6	= 6	; USART I/O Data Register bit 6
+.equ	UDR1_7	= 7	; USART I/O Data Register bit 7
+
+; UCSR1A - USART Control and Status Register A
+.equ	MPCM1	= 0	; Multi-processor Communication Mode
+.equ	U2X1	= 1	; Double the USART transmission speed
+.equ	UPE1	= 2	; Parity Error
+.equ	DOR1	= 3	; Data overRun
+.equ	FE1	= 4	; Framing Error
+.equ	UDRE1	= 5	; USART Data Register Empty
+.equ	TXC1	= 6	; USART Transmitt Complete
+.equ	RXC1	= 7	; USART Receive Complete
+
+; UCSR1B - USART Control and Status Register B
+.equ	TXB81	= 0	; Transmit Data Bit 8
+.equ	RXB81	= 1	; Receive Data Bit 8
+.equ	UCSZ12	= 2	; Character Size
+.equ	TXEN1	= 3	; Transmitter Enable
+.equ	RXEN1	= 4	; Receiver Enable
+.equ	UDRIE1	= 5	; USART Data register Empty Interrupt Enable
+.equ	TXCIE1	= 6	; TX Complete Interrupt Enable
+.equ	RXCIE1	= 7	; RX Complete Interrupt Enable
+
+; UCSR1C - USART Control and Status Register C
+.equ	UCPOL1	= 0	; Clock Polarity
+.equ	UCSZ10	= 1	; Character Size
+.equ	UCPHA1	= UCSZ10	; For compatibility
+.equ	UCSZ11	= 2	; Character Size
+.equ	UDORD1	= UCSZ11	; For compatibility
+.equ	USBS1	= 3	; Stop Bit Select
+.equ	UPM10	= 4	; Parity Mode Bit 0
+.equ	UPM11	= 5	; Parity Mode Bit 1
+.equ	UMSEL10	= 6	; USART Mode Select
+.equ	UMSEL11	= 7	; USART Mode Select
+
+; UBRR1H - USART Baud Rate Register High Byte
+.equ	UBRR_8	= 0	; USART Baud Rate Register bit 8
+.equ	UBRR_9	= 1	; USART Baud Rate Register bit 9
+.equ	UBRR_10	= 2	; USART Baud Rate Register bit 10
+.equ	UBRR_11	= 3	; USART Baud Rate Register bit 11
+
+; UBRR1L - USART Baud Rate Register Low Byte
+.equ	UBRR_0	= 0	; USART Baud Rate Register bit 0
+.equ	UBRR_1	= 1	; USART Baud Rate Register bit 1
+.equ	UBRR_2	= 2	; USART Baud Rate Register bit 2
+.equ	UBRR_3	= 3	; USART Baud Rate Register bit 3
+.equ	UBRR_4	= 4	; USART Baud Rate Register bit 4
+.equ	UBRR_5	= 5	; USART Baud Rate Register bit 5
+.equ	UBRR_6	= 6	; USART Baud Rate Register bit 6
+.equ	UBRR_7	= 7	; USART Baud Rate Register bit 7
+
+
+; ***** SPI **************************
+; SPDR - SPI Data Register
+.equ	SPDR0	= 0	; SPI Data Register bit 0
+.equ	SPDR1	= 1	; SPI Data Register bit 1
+.equ	SPDR2	= 2	; SPI Data Register bit 2
+.equ	SPDR3	= 3	; SPI Data Register bit 3
+.equ	SPDR4	= 4	; SPI Data Register bit 4
+.equ	SPDR5	= 5	; SPI Data Register bit 5
+.equ	SPDR6	= 6	; SPI Data Register bit 6
+.equ	SPDR7	= 7	; SPI Data Register bit 7
+
+; SPSR - SPI Status Register
+.equ	SPI2X	= 0	; Double SPI Speed Bit
+.equ	WCOL	= 6	; Write Collision Flag
+.equ	SPIF	= 7	; SPI Interrupt Flag
+
+; SPCR - SPI Control Register
+.equ	SPR0	= 0	; SPI Clock Rate Select 0
+.equ	SPR1	= 1	; SPI Clock Rate Select 1
+.equ	CPHA	= 2	; Clock Phase
+.equ	CPOL	= 3	; Clock polarity
+.equ	MSTR	= 4	; Master/Slave Select
+.equ	DORD	= 5	; Data Order
+.equ	SPE	= 6	; SPI Enable
+.equ	SPIE	= 7	; SPI Interrupt Enable
+
+
+; ***** WATCHDOG *********************
+; WDTCSR - Watchdog Timer Control Register
+.equ	WDP0	= 0	; Watch Dog Timer Prescaler bit 0
+.equ	WDP1	= 1	; Watch Dog Timer Prescaler bit 1
+.equ	WDP2	= 2	; Watch Dog Timer Prescaler bit 2
+.equ	WDE	= 3	; Watch Dog Enable
+.equ	WDCE	= 4	; Watchdog Change Enable
+.equ	WDP3	= 5	; Watchdog Timer Prescaler Bit 3
+.equ	WDIE	= 6	; Watchdog Timeout Interrupt Enable
+.equ	WDIF	= 7	; Watchdog Timeout Interrupt Flag
+
+
+; ***** CPU **************************
+; SREG - Status Register
+.equ	SREG_C	= 0	; Carry Flag
+.equ	SREG_Z	= 1	; Zero Flag
+.equ	SREG_N	= 2	; Negative Flag
+.equ	SREG_V	= 3	; Two's Complement Overflow Flag
+.equ	SREG_S	= 4	; Sign Bit
+.equ	SREG_H	= 5	; Half Carry Flag
+.equ	SREG_T	= 6	; Bit Copy Storage
+.equ	SREG_I	= 7	; Global Interrupt Enable
+
+; MCUCR - MCU Control Register
+.equ	IVCE	= 0	; Interrupt Vector Change Enable
+.equ	IVSEL	= 1	; Interrupt Vector Select
+.equ	PUD	= 4	; Pull-up disable
+;.equ	JTD	= 7	; JTAG Interface Disable
+
+; MCUSR - MCU Status Register
+.equ	PORF	= 0	; Power-on reset flag
+.equ	EXTRF	= 1	; External Reset Flag
+.equ	BORF	= 2	; Brown-out Reset Flag
+.equ	WDRF	= 3	; Watchdog Reset Flag
+;.equ	JTRF	= 4	; JTAG Reset Flag
+
+; OSCCAL - Oscillator Calibration Value
+.equ	CAL0	= 0	; Oscillator Calibration Value Bit0
+.equ	CAL1	= 1	; Oscillator Calibration Value Bit1
+.equ	CAL2	= 2	; Oscillator Calibration Value Bit2
+.equ	CAL3	= 3	; Oscillator Calibration Value Bit3
+.equ	CAL4	= 4	; Oscillator Calibration Value Bit4
+.equ	CAL5	= 5	; Oscillator Calibration Value Bit5
+.equ	CAL6	= 6	; Oscillator Calibration Value Bit6
+.equ	CAL7	= 7	; Oscillator Calibration Value Bit7
+
+; CLKPR - 
+.equ	CLKPS0	= 0	; 
+.equ	CLKPS1	= 1	; 
+.equ	CLKPS2	= 2	; 
+.equ	CLKPS3	= 3	; 
+.equ	CLKPCE	= 7	; 
+
+; SMCR - Sleep Mode Control Register
+.equ	SE	= 0	; Sleep Enable
+.equ	SM0	= 1	; Sleep Mode Select bit 0
+.equ	SM1	= 2	; Sleep Mode Select bit 1
+.equ	SM2	= 3	; Sleep Mode Select bit 2
+
+; RAMPZ - RAM Page Z Select Register
+.equ	RAMPZ0	= 0	; RAM Page Z Select Register Bit 0
+
+; GPIOR2 - General Purpose IO Register 2
+.equ	GPIOR20	= 0	; General Purpose IO Register 2 bit 0
+.equ	GPIOR21	= 1	; General Purpose IO Register 2 bit 1
+.equ	GPIOR22	= 2	; General Purpose IO Register 2 bit 2
+.equ	GPIOR23	= 3	; General Purpose IO Register 2 bit 3
+.equ	GPIOR24	= 4	; General Purpose IO Register 2 bit 4
+.equ	GPIOR25	= 5	; General Purpose IO Register 2 bit 5
+.equ	GPIOR26	= 6	; General Purpose IO Register 2 bit 6
+.equ	GPIOR27	= 7	; General Purpose IO Register 2 bit 7
+
+; GPIOR1 - General Purpose IO Register 1
+.equ	GPIOR10	= 0	; General Purpose IO Register 1 bit 0
+.equ	GPIOR11	= 1	; General Purpose IO Register 1 bit 1
+.equ	GPIOR12	= 2	; General Purpose IO Register 1 bit 2
+.equ	GPIOR13	= 3	; General Purpose IO Register 1 bit 3
+.equ	GPIOR14	= 4	; General Purpose IO Register 1 bit 4
+.equ	GPIOR15	= 5	; General Purpose IO Register 1 bit 5
+.equ	GPIOR16	= 6	; General Purpose IO Register 1 bit 6
+.equ	GPIOR17	= 7	; General Purpose IO Register 1 bit 7
+
+; GPIOR0 - General Purpose IO Register 0
+.equ	GPIOR00	= 0	; General Purpose IO Register 0 bit 0
+.equ	GPIOR01	= 1	; General Purpose IO Register 0 bit 1
+.equ	GPIOR02	= 2	; General Purpose IO Register 0 bit 2
+.equ	GPIOR03	= 3	; General Purpose IO Register 0 bit 3
+.equ	GPIOR04	= 4	; General Purpose IO Register 0 bit 4
+.equ	GPIOR05	= 5	; General Purpose IO Register 0 bit 5
+.equ	GPIOR06	= 6	; General Purpose IO Register 0 bit 6
+.equ	GPIOR07	= 7	; General Purpose IO Register 0 bit 7
+
+; PRR0 - Power Reduction Register0
+.equ	PRADC	= 0	; Power Reduction ADC
+.equ	PRUSART0	= 1	; Power Reduction USART 0
+.equ	PRSPI	= 2	; Power Reduction Serial Peripheral Interface
+.equ	PRTIM1	= 3	; Power Reduction Timer/Counter1
+.equ	PRUSART1	= 4	; Power Reduction USART 1
+.equ	PRTIM0	= 5	; Power Reduction Timer/Counter0
+.equ	PRTIM2	= 6	; Power Reduction Timer/Counter2
+.equ	PRTWI	= 7	; Power Reduction TWI
+
+; PRR1 - Power Reduction Register1
+.equ	PRTIM3	= 0	; Power Reduction Timer/Counter3
+
+
+
+; ***** LOCKSBITS ********************************************************
+.equ	LB1	= 0	; Lock bit
+.equ	LB2	= 1	; Lock bit
+.equ	BLB01	= 2	; Boot Lock bit
+.equ	BLB02	= 3	; Boot Lock bit
+.equ	BLB11	= 4	; Boot lock bit
+.equ	BLB12	= 5	; Boot lock bit
+
+
+; ***** FUSES ************************************************************
+; LOW fuse bits
+.equ	CKSEL0	= 0	; Select Clock Source
+.equ	CKSEL1	= 1	; Select Clock Source
+.equ	CKSEL2	= 2	; Select Clock Source
+.equ	CKSEL3	= 3	; Select Clock Source
+.equ	SUT0	= 4	; Select start-up time
+.equ	SUT1	= 5	; Select start-up time
+.equ	CKOUT	= 6	; Clock output
+.equ	CKDIV8	= 7	; Divide clock by 8
+
+; HIGH fuse bits
+.equ	BOOTRST	= 0	; Select Reset Vector
+.equ	BOOTSZ0	= 1	; Select Boot Size
+.equ	BOOTSZ1	= 2	; Select Boot Size
+.equ	EESAVE	= 3	; EEPROM memory is preserved through chip erase
+.equ	WDTON	= 4	; Watchdog timer always on
+.equ	SPIEN	= 5	; Enable Serial programming and Data Downloading
+.equ	JTAGEN	= 6	; Enable JTAG
+.equ	OCDEN	= 7	; Enable OCD
+
+; EXTENDED fuse bits
+.equ	BODLEVEL0	= 0	; Brown-out Detector trigger level
+.equ	BODLEVEL1	= 1	; Brown-out Detector trigger level
+.equ	BODLEVEL2	= 2	; Brown-out Detector trigger level
+
+
+
+; ***** CPU REGISTER DEFINITIONS *****************************************
+.def	XH	= r27
+.def	XL	= r26
+.def	YH	= r29
+.def	YL	= r28
+.def	ZH	= r31
+.def	ZL	= r30
+
+
+
+; ***** DATA MEMORY DECLARATIONS *****************************************
+.equ	FLASHEND	= 0xffff	; Note: Word address
+.equ	IOEND	= 0x00ff
+.equ	SRAM_START	= 0x0100
+.equ	SRAM_SIZE	= 16384
+.equ	RAMEND	= 0x40ff
+.equ	XRAMEND	= 0x0000
+.equ	E2END	= 0x0fff
+.equ	EEPROMEND	= 0x0fff
+.equ	EEADRBITS	= 12
+#pragma AVRPART MEMORY PROG_FLASH 131072
+#pragma AVRPART MEMORY EEPROM 4096
+#pragma AVRPART MEMORY INT_SRAM SIZE 16384
+#pragma AVRPART MEMORY INT_SRAM START_ADDR 0x100
+
+
+
+; ***** BOOTLOADER DECLARATIONS ******************************************
+.equ	NRWW_START_ADDR	= 0xf000
+.equ	NRWW_STOP_ADDR	= 0xffff
+.equ	RWW_START_ADDR	= 0x0
+.equ	RWW_STOP_ADDR	= 0xefff
+.equ	PAGESIZE	= 128
+.equ	FIRSTBOOTSTART	= 0xfe00
+.equ	SECONDBOOTSTART	= 0xfc00
+.equ	THIRDBOOTSTART	= 0xf800
+.equ	FOURTHBOOTSTART	= 0xf000
+.equ	SMALLBOOTSTART	= FIRSTBOOTSTART
+.equ	LARGEBOOTSTART	= FOURTHBOOTSTART
+
+
+
+; ***** INTERRUPT VECTORS ************************************************
+.equ	INT0addr	= 0x0002	; External Interrupt Request 0
+.equ	INT1addr	= 0x0004	; External Interrupt Request 1
+.equ	INT2addr	= 0x0006	; External Interrupt Request 2
+.equ	PCI0addr	= 0x0008	; Pin Change Interrupt Request 0
+.equ	PCI1addr	= 0x000a	; Pin Change Interrupt Request 1
+.equ	PCI2addr	= 0x000c	; Pin Change Interrupt Request 2
+.equ	PCI3addr	= 0x000e	; Pin Change Interrupt Request 3
+.equ	WDTaddr	= 0x0010	; Watchdog Time-out Interrupt
+.equ	OC2Aaddr	= 0x0012	; Timer/Counter2 Compare Match A
+.equ	OC2Baddr	= 0x0014	; Timer/Counter2 Compare Match B
+.equ	OVF2addr	= 0x0016	; Timer/Counter2 Overflow
+.equ	ICP1addr	= 0x0018	; Timer/Counter1 Capture Event
+.equ	OC1Aaddr	= 0x001a	; Timer/Counter1 Compare Match A
+.equ	OC1Baddr	= 0x001c	; Timer/Counter1 Compare Match B
+.equ	OVF1addr	= 0x001e	; Timer/Counter1 Overflow
+.equ	OC0Aaddr	= 0x0020	; Timer/Counter0 Compare Match A
+.equ	OC0Baddr	= 0x0022	; Timer/Counter0 Compare Match B
+.equ	OVF0addr	= 0x0024	; Timer/Counter0 Overflow
+.equ	SPIaddr	= 0x0026	; SPI Serial Transfer Complete
+.equ	URXC0addr	= 0x0028	; USART0, Rx Complete
+.equ	UDRE0addr	= 0x002a	; USART0 Data register Empty
+.equ	UTXC0addr	= 0x002c	; USART0, Tx Complete
+.equ	ACIaddr	= 0x002e	; Analog Comparator
+.equ	ADCCaddr	= 0x0030	; ADC Conversion Complete
+.equ	ERDYaddr	= 0x0032	; EEPROM Ready
+.equ	TWIaddr	= 0x0034	; 2-wire Serial Interface
+.equ	SPMRaddr	= 0x0036	; Store Program Memory Read
+.equ	URXC1addr	= 0x0038	; USART1 RX complete
+.equ	UDRE1addr	= 0x003a	; USART1 Data Register Empty
+.equ	UTXC1addr	= 0x003c	; USART1 TX complete
+.equ	ICP3addr	= 0x003e	; Timer/Counter3 Capture Event
+.equ	OC3Aaddr	= 0x0040	; Timer/Counter3 Compare Match A
+.equ	OC3Baddr	= 0x0042	; Timer/Counter3 Compare Match B
+.equ	OVF3addr	= 0x0044	; Timer/Counter3 Overflow
+
+.equ	INT_VECTORS_SIZE	= 70	; size in words
+
+#endif  /* _M1284DEF_INC_ */
+
+; ***** END OF FILE ******************************************************
diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/m128def.inc b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/m128def.inc
new file mode 100644
index 00000000..1244928b
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/m128def.inc
@@ -0,0 +1,1217 @@
+;***** THIS IS A MACHINE GENERATED FILE - DO NOT EDIT ********************
+;***** Created: 2011-02-09 12:03 ******* Source: ATmega128.xml ***********
+;*************************************************************************
+;* A P P L I C A T I O N   N O T E   F O R   T H E   A V R   F A M I L Y
+;* 
+;* Number            : AVR000
+;* File Name         : "m128def.inc"
+;* Title             : Register/Bit Definitions for the ATmega128
+;* Date              : 2011-02-09
+;* Version           : 2.35
+;* Support E-mail    : avr@atmel.com
+;* Target MCU        : ATmega128
+;* 
+;* DESCRIPTION
+;* When including this file in the assembly program file, all I/O register 
+;* names and I/O register bit names appearing in the data book can be used.
+;* In addition, the six registers forming the three data pointers X, Y and 
+;* Z have been assigned names XL - ZH. Highest RAM address for Internal 
+;* SRAM is also defined 
+;* 
+;* The Register names are represented by their hexadecimal address.
+;* 
+;* The Register Bit names are represented by their bit number (0-7).
+;* 
+;* Please observe the difference in using the bit names with instructions
+;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc"
+;* (skip if bit in register set/cleared). The following example illustrates
+;* this:
+;* 
+;* in    r16,PORTB             ;read PORTB latch
+;* sbr   r16,(1<<PB6)+(1<<PB5) ;set PB6 and PB5 (use masks, not bit#)
+;* out   PORTB,r16             ;output to PORTB
+;* 
+;* in    r16,TIFR              ;read the Timer Interrupt Flag Register
+;* sbrc  r16,TOV0              ;test the overflow flag (use bit#)
+;* rjmp  TOV0_is_set           ;jump if set
+;* ...                         ;otherwise do something else
+;*************************************************************************
+
+#ifndef _M128DEF_INC_
+#define _M128DEF_INC_
+
+
+#pragma partinc 0
+
+; ***** SPECIFY DEVICE ***************************************************
+.device ATmega128
+#pragma AVRPART ADMIN PART_NAME ATmega128
+.equ	SIGNATURE_000	= 0x1e
+.equ	SIGNATURE_001	= 0x97
+.equ	SIGNATURE_002	= 0x02
+
+#pragma AVRPART CORE CORE_VERSION V2E
+
+
+; ***** I/O REGISTER DEFINITIONS *****************************************
+; NOTE:
+; Definitions marked "MEMORY MAPPED"are extended I/O ports
+; and cannot be used with IN/OUT instructions
+.equ	UCSR1C	= 0x9d	; MEMORY MAPPED
+.equ	UDR1	= 0x9c	; MEMORY MAPPED
+.equ	UCSR1A	= 0x9b	; MEMORY MAPPED
+.equ	UCSR1B	= 0x9a	; MEMORY MAPPED
+.equ	UBRR1H	= 0x98	; MEMORY MAPPED
+.equ	UBRR1L	= 0x99	; MEMORY MAPPED
+.equ	UCSR0C	= 0x95	; MEMORY MAPPED
+.equ	UBRR0H	= 0x90	; MEMORY MAPPED
+.equ	TCCR3C	= 0x8c	; MEMORY MAPPED
+.equ	TCCR3A	= 0x8b	; MEMORY MAPPED
+.equ	TCCR3B	= 0x8a	; MEMORY MAPPED
+.equ	TCNT3L	= 0x88	; MEMORY MAPPED
+.equ	TCNT3H	= 0x89	; MEMORY MAPPED
+.equ	OCR3AL	= 0x86	; MEMORY MAPPED
+.equ	OCR3AH	= 0x87	; MEMORY MAPPED
+.equ	OCR3BL	= 0x84	; MEMORY MAPPED
+.equ	OCR3BH	= 0x85	; MEMORY MAPPED
+.equ	OCR3CL	= 0x82	; MEMORY MAPPED
+.equ	OCR3CH	= 0x83	; MEMORY MAPPED
+.equ	ICR3L	= 0x80	; MEMORY MAPPED
+.equ	ICR3H	= 0x81	; MEMORY MAPPED
+.equ	ETIMSK	= 0x7d	; MEMORY MAPPED
+.equ	ETIFR	= 0x7c	; MEMORY MAPPED
+.equ	TCCR1C	= 0x7a	; MEMORY MAPPED
+.equ	OCR1CL	= 0x78	; MEMORY MAPPED
+.equ	OCR1CH	= 0x79	; MEMORY MAPPED
+.equ	TWCR	= 0x74	; MEMORY MAPPED
+.equ	TWDR	= 0x73	; MEMORY MAPPED
+.equ	TWAR	= 0x72	; MEMORY MAPPED
+.equ	TWSR	= 0x71	; MEMORY MAPPED
+.equ	TWBR	= 0x70	; MEMORY MAPPED
+.equ	OSCCAL	= 0x6f	; MEMORY MAPPED
+.equ	XMCRA	= 0x6d	; MEMORY MAPPED
+.equ	XMCRB	= 0x6c	; MEMORY MAPPED
+.equ	EICRA	= 0x6a	; MEMORY MAPPED
+.equ	SPMCSR	= 0x68	; MEMORY MAPPED
+.equ	PORTG	= 0x65	; MEMORY MAPPED
+.equ	DDRG	= 0x64	; MEMORY MAPPED
+.equ	PING	= 0x63	; MEMORY MAPPED
+.equ	PORTF	= 0x62	; MEMORY MAPPED
+.equ	DDRF	= 0x61	; MEMORY MAPPED
+.equ	SREG	= 0x3f
+.equ	SPL	= 0x3d
+.equ	SPH	= 0x3e
+.equ	XDIV	= 0x3c
+.equ	RAMPZ	= 0x3b
+.equ	EICRB	= 0x3a
+.equ	EIMSK	= 0x39
+.equ	EIFR	= 0x38
+.equ	TIMSK	= 0x37
+.equ	TIFR	= 0x36
+.equ	MCUCR	= 0x35
+.equ	MCUCSR	= 0x34
+.equ	TCCR0	= 0x33
+.equ	TCNT0	= 0x32
+.equ	OCR0	= 0x31
+.equ	ASSR	= 0x30
+.equ	TCCR1A	= 0x2f
+.equ	TCCR1B	= 0x2e
+.equ	TCNT1L	= 0x2c
+.equ	TCNT1H	= 0x2d
+.equ	OCR1AL	= 0x2a
+.equ	OCR1AH	= 0x2b
+.equ	OCR1BL	= 0x28
+.equ	OCR1BH	= 0x29
+.equ	ICR1L	= 0x26
+.equ	ICR1H	= 0x27
+.equ	TCCR2	= 0x25
+.equ	TCNT2	= 0x24
+.equ	OCR2	= 0x23
+.equ	OCDR	= 0x22
+.equ	WDTCR	= 0x21
+.equ	SFIOR	= 0x20
+.equ	EEARL	= 0x1e
+.equ	EEARH	= 0x1f
+.equ	EEDR	= 0x1d
+.equ	EECR	= 0x1c
+.equ	PORTA	= 0x1b
+.equ	DDRA	= 0x1a
+.equ	PINA	= 0x19
+.equ	PORTB	= 0x18
+.equ	DDRB	= 0x17
+.equ	PINB	= 0x16
+.equ	PORTC	= 0x15
+.equ	DDRC	= 0x14
+.equ	PINC	= 0x13
+.equ	PORTD	= 0x12
+.equ	DDRD	= 0x11
+.equ	PIND	= 0x10
+.equ	SPDR	= 0x0f
+.equ	SPSR	= 0x0e
+.equ	SPCR	= 0x0d
+.equ	UDR0	= 0x0c
+.equ	UCSR0A	= 0x0b
+.equ	UCSR0B	= 0x0a
+.equ	UBRR0L	= 0x09
+.equ	ACSR	= 0x08
+.equ	ADMUX	= 0x07
+.equ	ADCSRA	= 0x06
+.equ	ADCH	= 0x05
+.equ	ADCL	= 0x04
+.equ	PORTE	= 0x03
+.equ	DDRE	= 0x02
+.equ	PINE	= 0x01
+.equ	PINF	= 0x00
+
+
+; ***** BIT DEFINITIONS **************************************************
+
+; ***** ANALOG_COMPARATOR ************
+; SFIOR - Special Function IO Register
+.equ	ACME	= 3	; Analog Comparator Multiplexer Enable
+
+; ACSR - Analog Comparator Control And Status Register
+.equ	ACIS0	= 0	; Analog Comparator Interrupt Mode Select bit 0
+.equ	ACIS1	= 1	; Analog Comparator Interrupt Mode Select bit 1
+.equ	ACIC	= 2	; Analog Comparator Input Capture Enable
+.equ	ACIE	= 3	; Analog Comparator Interrupt Enable
+.equ	ACI	= 4	; Analog Comparator Interrupt Flag
+.equ	ACO	= 5	; Analog Compare Output
+.equ	ACBG	= 6	; Analog Comparator Bandgap Select
+.equ	ACD	= 7	; Analog Comparator Disable
+
+
+; ***** SPI **************************
+; SPDR - SPI Data Register
+.equ	SPDR0	= 0	; SPI Data Register bit 0
+.equ	SPDR1	= 1	; SPI Data Register bit 1
+.equ	SPDR2	= 2	; SPI Data Register bit 2
+.equ	SPDR3	= 3	; SPI Data Register bit 3
+.equ	SPDR4	= 4	; SPI Data Register bit 4
+.equ	SPDR5	= 5	; SPI Data Register bit 5
+.equ	SPDR6	= 6	; SPI Data Register bit 6
+.equ	SPDR7	= 7	; SPI Data Register bit 7
+
+; SPSR - SPI Status Register
+.equ	SPI2X	= 0	; Double SPI Speed Bit
+.equ	WCOL	= 6	; Write Collision Flag
+.equ	SPIF	= 7	; SPI Interrupt Flag
+
+; SPCR - SPI Control Register
+.equ	SPR0	= 0	; SPI Clock Rate Select 0
+.equ	SPR1	= 1	; SPI Clock Rate Select 1
+.equ	CPHA	= 2	; Clock Phase
+.equ	CPOL	= 3	; Clock polarity
+.equ	MSTR	= 4	; Master/Slave Select
+.equ	DORD	= 5	; Data Order
+.equ	SPE	= 6	; SPI Enable
+.equ	SPIE	= 7	; SPI Interrupt Enable
+
+
+; ***** TWI **************************
+; TWBR - TWI Bit Rate register
+.equ	I2BR	= TWBR	; For compatibility
+.equ	TWBR0	= 0	; 
+.equ	TWBR1	= 1	; 
+.equ	TWBR2	= 2	; 
+.equ	TWBR3	= 3	; 
+.equ	TWBR4	= 4	; 
+.equ	TWBR5	= 5	; 
+.equ	TWBR6	= 6	; 
+.equ	TWBR7	= 7	; 
+
+; TWCR - TWI Control Register
+.equ	I2CR	= TWCR	; For compatibility
+.equ	TWIE	= 0	; TWI Interrupt Enable
+.equ	I2IE	= TWIE	; For compatibility
+.equ	TWEN	= 2	; TWI Enable Bit
+.equ	I2EN	= TWEN	; For compatibility
+.equ	ENI2C	= TWEN	; For compatibility
+.equ	TWWC	= 3	; TWI Write Collition Flag
+.equ	I2WC	= TWWC	; For compatibility
+.equ	TWSTO	= 4	; TWI Stop Condition Bit
+.equ	I2STO	= TWSTO	; For compatibility
+.equ	TWSTA	= 5	; TWI Start Condition Bit
+.equ	I2STA	= TWSTA	; For compatibility
+.equ	TWEA	= 6	; TWI Enable Acknowledge Bit
+.equ	I2EA	= TWEA	; For compatibility
+.equ	TWINT	= 7	; TWI Interrupt Flag
+.equ	I2INT	= TWINT	; For compatibility
+
+; TWSR - TWI Status Register
+.equ	I2SR	= TWSR	; For compatibility
+.equ	TWPS0	= 0	; TWI Prescaler
+.equ	TWS0	= TWPS0	; For compatibility
+.equ	I2GCE	= TWPS0	; For compatibility
+.equ	TWPS1	= 1	; TWI Prescaler
+.equ	TWS1	= TWPS1	; For compatibility
+.equ	TWS3	= 3	; TWI Status
+.equ	I2S3	= TWS3	; For compatibility
+.equ	TWS4	= 4	; TWI Status
+.equ	I2S4	= TWS4	; For compatibility
+.equ	TWS5	= 5	; TWI Status
+.equ	I2S5	= TWS5	; For compatibility
+.equ	TWS6	= 6	; TWI Status
+.equ	I2S6	= TWS6	; For compatibility
+.equ	TWS7	= 7	; TWI Status
+.equ	I2S7	= TWS7	; For compatibility
+
+; TWDR - TWI Data register
+.equ	I2DR	= TWDR	; For compatibility
+.equ	TWD0	= 0	; TWI Data Register Bit 0
+.equ	TWD1	= 1	; TWI Data Register Bit 1
+.equ	TWD2	= 2	; TWI Data Register Bit 2
+.equ	TWD3	= 3	; TWI Data Register Bit 3
+.equ	TWD4	= 4	; TWI Data Register Bit 4
+.equ	TWD5	= 5	; TWI Data Register Bit 5
+.equ	TWD6	= 6	; TWI Data Register Bit 6
+.equ	TWD7	= 7	; TWI Data Register Bit 7
+
+; TWAR - TWI (Slave) Address register
+.equ	I2AR	= TWAR	; For compatibility
+.equ	TWGCE	= 0	; TWI General Call Recognition Enable Bit
+.equ	TWA0	= 1	; TWI (Slave) Address register Bit 0
+.equ	TWA1	= 2	; TWI (Slave) Address register Bit 1
+.equ	TWA2	= 3	; TWI (Slave) Address register Bit 2
+.equ	TWA3	= 4	; TWI (Slave) Address register Bit 3
+.equ	TWA4	= 5	; TWI (Slave) Address register Bit 4
+.equ	TWA5	= 6	; TWI (Slave) Address register Bit 5
+.equ	TWA6	= 7	; TWI (Slave) Address register Bit 6
+
+
+; ***** USART0 ***********************
+; UDR0 - USART I/O Data Register
+.equ	UDR00	= 0	; USART I/O Data Register bit 0
+.equ	UDR01	= 1	; USART I/O Data Register bit 1
+.equ	UDR02	= 2	; USART I/O Data Register bit 2
+.equ	UDR03	= 3	; USART I/O Data Register bit 3
+.equ	UDR04	= 4	; USART I/O Data Register bit 4
+.equ	UDR05	= 5	; USART I/O Data Register bit 5
+.equ	UDR06	= 6	; USART I/O Data Register bit 6
+.equ	UDR07	= 7	; USART I/O Data Register bit 7
+
+; UCSR0A - USART Control and Status Register A
+.equ	MPCM0	= 0	; Multi-processor Communication Mode
+.equ	U2X0	= 1	; Double the USART transmission speed
+.equ	UPE0	= 2	; Parity Error
+.equ	DOR0	= 3	; Data overRun
+.equ	FE0	= 4	; Framing Error
+.equ	UDRE0	= 5	; USART Data Register Empty
+.equ	TXC0	= 6	; USART Transmitt Complete
+.equ	RXC0	= 7	; USART Receive Complete
+
+; UCSR0B - USART Control and Status Register B
+.equ	TXB80	= 0	; Transmit Data Bit 8
+.equ	RXB80	= 1	; Receive Data Bit 8
+.equ	UCSZ02	= 2	; Character Size
+.equ	UCSZ2	= UCSZ02	; For compatibility
+.equ	TXEN0	= 3	; Transmitter Enable
+.equ	RXEN0	= 4	; Receiver Enable
+.equ	UDRIE0	= 5	; USART Data register Empty Interrupt Enable
+.equ	TXCIE0	= 6	; TX Complete Interrupt Enable
+.equ	RXCIE0	= 7	; RX Complete Interrupt Enable
+
+; UCSR0C - USART Control and Status Register C
+.equ	UCPOL0	= 0	; Clock Polarity
+.equ	UCSZ00	= 1	; Character Size
+.equ	UCSZ01	= 2	; Character Size
+.equ	USBS0	= 3	; Stop Bit Select
+.equ	UPM00	= 4	; Parity Mode Bit 0
+.equ	UPM01	= 5	; Parity Mode Bit 1
+.equ	UMSEL0	= 6	; USART Mode Select
+
+; UBRR0H - USART Baud Rate Register Hight Byte
+.equ	UBRR8	= 0	; USART Baud Rate Register bit 8
+.equ	UBRR9	= 1	; USART Baud Rate Register bit 9
+.equ	UBRR10	= 2	; USART Baud Rate Register bit 10
+.equ	UBRR11	= 3	; USART Baud Rate Register bit 11
+
+; UBRR0L - USART Baud Rate Register Low Byte
+.equ	UBRR0	= 0	; USART Baud Rate Register bit 0
+.equ	UBRR1	= 1	; USART Baud Rate Register bit 1
+.equ	UBRR2	= 2	; USART Baud Rate Register bit 2
+.equ	UBRR3	= 3	; USART Baud Rate Register bit 3
+.equ	UBRR4	= 4	; USART Baud Rate Register bit 4
+.equ	UBRR5	= 5	; USART Baud Rate Register bit 5
+.equ	UBRR6	= 6	; USART Baud Rate Register bit 6
+.equ	UBRR7	= 7	; USART Baud Rate Register bit 7
+
+
+; ***** USART1 ***********************
+; UDR1 - USART I/O Data Register
+.equ	UDR10	= 0	; USART I/O Data Register bit 0
+.equ	UDR11	= 1	; USART I/O Data Register bit 1
+.equ	UDR12	= 2	; USART I/O Data Register bit 2
+.equ	UDR13	= 3	; USART I/O Data Register bit 3
+.equ	UDR14	= 4	; USART I/O Data Register bit 4
+.equ	UDR15	= 5	; USART I/O Data Register bit 5
+.equ	UDR16	= 6	; USART I/O Data Register bit 6
+.equ	UDR17	= 7	; USART I/O Data Register bit 7
+
+; UCSR1A - USART Control and Status Register A
+.equ	MPCM1	= 0	; Multi-processor Communication Mode
+.equ	U2X1	= 1	; Double the USART transmission speed
+.equ	UPE1	= 2	; Parity Error
+.equ	DOR1	= 3	; Data overRun
+.equ	FE1	= 4	; Framing Error
+.equ	UDRE1	= 5	; USART Data Register Empty
+.equ	TXC1	= 6	; USART Transmitt Complete
+.equ	RXC1	= 7	; USART Receive Complete
+
+; UCSR1B - USART Control and Status Register B
+.equ	TXB81	= 0	; Transmit Data Bit 8
+.equ	RXB81	= 1	; Receive Data Bit 8
+.equ	UCSZ12	= 2	; Character Size
+.equ	TXEN1	= 3	; Transmitter Enable
+.equ	RXEN1	= 4	; Receiver Enable
+.equ	UDRIE1	= 5	; USART Data register Empty Interrupt Enable
+.equ	TXCIE1	= 6	; TX Complete Interrupt Enable
+.equ	RXCIE1	= 7	; RX Complete Interrupt Enable
+
+; UCSR1C - USART Control and Status Register C
+.equ	UCPOL1	= 0	; Clock Polarity
+.equ	UCSZ10	= 1	; Character Size
+.equ	UCSZ11	= 2	; Character Size
+.equ	USBS1	= 3	; Stop Bit Select
+.equ	UPM10	= 4	; Parity Mode Bit 0
+.equ	UPM11	= 5	; Parity Mode Bit 1
+.equ	UMSEL1	= 6	; USART Mode Select
+
+; UBRR1H - USART Baud Rate Register Hight Byte
+;.equ	UBRR8	= 0	; USART Baud Rate Register bit 8
+;.equ	UBRR9	= 1	; USART Baud Rate Register bit 9
+;.equ	UBRR10	= 2	; USART Baud Rate Register bit 10
+;.equ	UBRR11	= 3	; USART Baud Rate Register bit 11
+
+; UBRR1L - USART Baud Rate Register Low Byte
+;.equ	UBRR0	= 0	; USART Baud Rate Register bit 0
+;.equ	UBRR1	= 1	; USART Baud Rate Register bit 1
+;.equ	UBRR2	= 2	; USART Baud Rate Register bit 2
+;.equ	UBRR3	= 3	; USART Baud Rate Register bit 3
+;.equ	UBRR4	= 4	; USART Baud Rate Register bit 4
+;.equ	UBRR5	= 5	; USART Baud Rate Register bit 5
+;.equ	UBRR6	= 6	; USART Baud Rate Register bit 6
+;.equ	UBRR7	= 7	; USART Baud Rate Register bit 7
+
+
+; ***** CPU **************************
+; SREG - Status Register
+.equ	SREG_C	= 0	; Carry Flag
+.equ	SREG_Z	= 1	; Zero Flag
+.equ	SREG_N	= 2	; Negative Flag
+.equ	SREG_V	= 3	; Two's Complement Overflow Flag
+.equ	SREG_S	= 4	; Sign Bit
+.equ	SREG_H	= 5	; Half Carry Flag
+.equ	SREG_T	= 6	; Bit Copy Storage
+.equ	SREG_I	= 7	; Global Interrupt Enable
+
+; MCUCR - MCU Control Register
+.equ	IVCE	= 0	; Interrupt Vector Change Enable
+.equ	IVSEL	= 1	; Interrupt Vector Select
+.equ	SM2	= 2	; Sleep Mode Select
+.equ	SM0	= 3	; Sleep Mode Select
+.equ	SM1	= 4	; Sleep Mode Select
+.equ	SE	= 5	; Sleep Enable
+.equ	SRW10	= 6	; External SRAM Wait State Select
+.equ	SRE	= 7	; External SRAM Enable
+
+; XMCRA - External Memory Control Register A
+.equ	SRW11	= 1	; Wait state select bit upper page
+.equ	SRW00	= 2	; Wait state select bit lower page
+.equ	SRW01	= 3	; Wait state select bit lower page
+.equ	SRL0	= 4	; Wait state page limit
+.equ	SRL1	= 5	; Wait state page limit
+.equ	SRL2	= 6	; Wait state page limit
+
+; XMCRB - External Memory Control Register B
+.equ	XMM0	= 0	; External Memory High Mask
+.equ	XMM1	= 1	; External Memory High Mask
+.equ	XMM2	= 2	; External Memory High Mask
+.equ	XMBK	= 7	; External Memory Bus Keeper Enable
+
+; OSCCAL - Oscillator Calibration Value
+.equ	CAL0	= 0	; Oscillator Calibration Value
+.equ	CAL1	= 1	; Oscillator Calibration Value
+.equ	CAL2	= 2	; Oscillator Calibration Value
+.equ	CAL3	= 3	; Oscillator Calibration Value
+.equ	CAL4	= 4	; Oscillator Calibration Value
+.equ	CAL5	= 5	; Oscillator Calibration Value
+.equ	CAL6	= 6	; Oscillator Calibration Value
+.equ	CAL7	= 7	; Oscillator Calibration Value
+
+; XDIV - XTAL Divide Control Register
+.equ	XDIV0	= 0	; XTAl Divide Select Bit 0
+.equ	XDIV1	= 1	; XTAl Divide Select Bit 1
+.equ	XDIV2	= 2	; XTAl Divide Select Bit 2
+.equ	XDIV3	= 3	; XTAl Divide Select Bit 3
+.equ	XDIV4	= 4	; XTAl Divide Select Bit 4
+.equ	XDIV5	= 5	; XTAl Divide Select Bit 5
+.equ	XDIV6	= 6	; XTAl Divide Select Bit 6
+.equ	XDIVEN	= 7	; XTAL Divide Enable
+
+; MCUCSR - MCU Control And Status Register
+.equ	PORF	= 0	; Power-on reset flag
+.equ	EXTRF	= 1	; External Reset Flag
+.equ	BORF	= 2	; Brown-out Reset Flag
+.equ	WDRF	= 3	; Watchdog Reset Flag
+.equ	JTRF	= 4	; JTAG Reset Flag
+.equ	JTD	= 7	; JTAG Interface Disable
+
+; RAMPZ - RAM Page Z Select Register
+.equ	RAMPZ0	= 0	; RAM Page Z Select Register Bit 0
+
+
+; ***** BOOT_LOAD ********************
+; SPMCSR - Store Program Memory Control Register
+.equ	SPMCR	= SPMCSR	; For compatibility
+.equ	SPMEN	= 0	; Store Program Memory Enable
+.equ	PGERS	= 1	; Page Erase
+.equ	PGWRT	= 2	; Page Write
+.equ	BLBSET	= 3	; Boot Lock Bit Set
+.equ	RWWSRE	= 4	; Read While Write section read enable
+.equ	ASRE	= RWWSRE	; For compatibility
+.equ	RWWSB	= 6	; Read While Write Section Busy
+.equ	ASB	= RWWSB	; For compatibility
+.equ	SPMIE	= 7	; SPM Interrupt Enable
+
+
+; ***** JTAG *************************
+; OCDR - On-Chip Debug Related Register in I/O Memory
+.equ	OCDR0	= 0	; On-Chip Debug Register Bit 0
+.equ	OCDR1	= 1	; On-Chip Debug Register Bit 1
+.equ	OCDR2	= 2	; On-Chip Debug Register Bit 2
+.equ	OCDR3	= 3	; On-Chip Debug Register Bit 3
+.equ	OCDR4	= 4	; On-Chip Debug Register Bit 4
+.equ	OCDR5	= 5	; On-Chip Debug Register Bit 5
+.equ	OCDR6	= 6	; On-Chip Debug Register Bit 6
+.equ	OCDR7	= 7	; On-Chip Debug Register Bit 7
+.equ	IDRD	= OCDR7	; For compatibility
+
+; MCUCSR - MCU Control And Status Register
+;.equ	JTRF	= 4	; JTAG Reset Flag
+;.equ	JTD	= 7	; JTAG Interface Disable
+
+
+; ***** MISC *************************
+; SFIOR - Special Function IO Register
+.equ	PSR321	= 0	; Prescaler Reset Timer/Counter3, Timer/Counter2, and Timer/Counter1
+.equ	PSR1	= PSR321	; For compatibility
+.equ	PSR2	= PSR321	; For compatibility
+.equ	PSR3	= PSR321	; For compatibility
+.equ	PSR0	= 1	; Prescaler Reset Timer/Counter0
+.equ	PUD	= 2	; Pull Up Disable
+;.equ	ACME	= 3	; Analog Comparator Multiplexer Enable
+.equ	TSM	= 7	; Timer/Counter Synchronization Mode
+
+
+; ***** EXTERNAL_INTERRUPT ***********
+; EICRA - External Interrupt Control Register A
+.equ	ISC00	= 0	; External Interrupt Sense Control Bit
+.equ	ISC01	= 1	; External Interrupt Sense Control Bit
+.equ	ISC10	= 2	; External Interrupt Sense Control Bit
+.equ	ISC11	= 3	; External Interrupt Sense Control Bit
+.equ	ISC20	= 4	; External Interrupt Sense Control Bit
+.equ	ISC21	= 5	; External Interrupt Sense Control Bit
+.equ	ISC30	= 6	; External Interrupt Sense Control Bit
+.equ	ISC31	= 7	; External Interrupt Sense Control Bit
+
+; EICRB - External Interrupt Control Register B
+.equ	ISC40	= 0	; External Interrupt 7-4 Sense Control Bit
+.equ	ISC41	= 1	; External Interrupt 7-4 Sense Control Bit
+.equ	ISC50	= 2	; External Interrupt 7-4 Sense Control Bit
+.equ	ISC51	= 3	; External Interrupt 7-4 Sense Control Bit
+.equ	ISC60	= 4	; External Interrupt 7-4 Sense Control Bit
+.equ	ISC61	= 5	; External Interrupt 7-4 Sense Control Bit
+.equ	ISC70	= 6	; External Interrupt 7-4 Sense Control Bit
+.equ	ISC71	= 7	; External Interrupt 7-4 Sense Control Bit
+
+; EIMSK - External Interrupt Mask Register
+.equ	GICR	= EIMSK	; For compatibility
+.equ	GIMSK	= EIMSK	; For compatibility
+.equ	INT0	= 0	; External Interrupt Request 0 Enable
+.equ	INT1	= 1	; External Interrupt Request 1 Enable
+.equ	INT2	= 2	; External Interrupt Request 2 Enable
+.equ	INT3	= 3	; External Interrupt Request 3 Enable
+.equ	INT4	= 4	; External Interrupt Request 4 Enable
+.equ	INT5	= 5	; External Interrupt Request 5 Enable
+.equ	INT6	= 6	; External Interrupt Request 6 Enable
+.equ	INT7	= 7	; External Interrupt Request 7 Enable
+
+; EIFR - External Interrupt Flag Register
+.equ	GIFR	= EIFR	; For compatibility
+.equ	INTF0	= 0	; External Interrupt Flag 0
+.equ	INTF1	= 1	; External Interrupt Flag 1
+.equ	INTF2	= 2	; External Interrupt Flag 2
+.equ	INTF3	= 3	; External Interrupt Flag 3
+.equ	INTF4	= 4	; External Interrupt Flag 4
+.equ	INTF5	= 5	; External Interrupt Flag 5
+.equ	INTF6	= 6	; External Interrupt Flag 6
+.equ	INTF7	= 7	; External Interrupt Flag 7
+
+
+; ***** EEPROM ***********************
+; EEDR - EEPROM Data Register
+.equ	EEDR0	= 0	; EEPROM Data Register bit 0
+.equ	EEDR1	= 1	; EEPROM Data Register bit 1
+.equ	EEDR2	= 2	; EEPROM Data Register bit 2
+.equ	EEDR3	= 3	; EEPROM Data Register bit 3
+.equ	EEDR4	= 4	; EEPROM Data Register bit 4
+.equ	EEDR5	= 5	; EEPROM Data Register bit 5
+.equ	EEDR6	= 6	; EEPROM Data Register bit 6
+.equ	EEDR7	= 7	; EEPROM Data Register bit 7
+
+; EECR - EEPROM Control Register
+.equ	EERE	= 0	; EEPROM Read Enable
+.equ	EEWE	= 1	; EEPROM Write Enable
+.equ	EEMWE	= 2	; EEPROM Master Write Enable
+.equ	EERIE	= 3	; EEPROM Ready Interrupt Enable
+
+
+; ***** PORTA ************************
+; PORTA - Port A Data Register
+.equ	PORTA0	= 0	; Port A Data Register bit 0
+.equ	PA0	= 0	; For compatibility
+.equ	PORTA1	= 1	; Port A Data Register bit 1
+.equ	PA1	= 1	; For compatibility
+.equ	PORTA2	= 2	; Port A Data Register bit 2
+.equ	PA2	= 2	; For compatibility
+.equ	PORTA3	= 3	; Port A Data Register bit 3
+.equ	PA3	= 3	; For compatibility
+.equ	PORTA4	= 4	; Port A Data Register bit 4
+.equ	PA4	= 4	; For compatibility
+.equ	PORTA5	= 5	; Port A Data Register bit 5
+.equ	PA5	= 5	; For compatibility
+.equ	PORTA6	= 6	; Port A Data Register bit 6
+.equ	PA6	= 6	; For compatibility
+.equ	PORTA7	= 7	; Port A Data Register bit 7
+.equ	PA7	= 7	; For compatibility
+
+; DDRA - Port A Data Direction Register
+.equ	DDA0	= 0	; Data Direction Register, Port A, bit 0
+.equ	DDA1	= 1	; Data Direction Register, Port A, bit 1
+.equ	DDA2	= 2	; Data Direction Register, Port A, bit 2
+.equ	DDA3	= 3	; Data Direction Register, Port A, bit 3
+.equ	DDA4	= 4	; Data Direction Register, Port A, bit 4
+.equ	DDA5	= 5	; Data Direction Register, Port A, bit 5
+.equ	DDA6	= 6	; Data Direction Register, Port A, bit 6
+.equ	DDA7	= 7	; Data Direction Register, Port A, bit 7
+
+; PINA - Port A Input Pins
+.equ	PINA0	= 0	; Input Pins, Port A bit 0
+.equ	PINA1	= 1	; Input Pins, Port A bit 1
+.equ	PINA2	= 2	; Input Pins, Port A bit 2
+.equ	PINA3	= 3	; Input Pins, Port A bit 3
+.equ	PINA4	= 4	; Input Pins, Port A bit 4
+.equ	PINA5	= 5	; Input Pins, Port A bit 5
+.equ	PINA6	= 6	; Input Pins, Port A bit 6
+.equ	PINA7	= 7	; Input Pins, Port A bit 7
+
+
+; ***** PORTB ************************
+; PORTB - Port B Data Register
+.equ	PORTB0	= 0	; Port B Data Register bit 0
+.equ	PB0	= 0	; For compatibility
+.equ	PORTB1	= 1	; Port B Data Register bit 1
+.equ	PB1	= 1	; For compatibility
+.equ	PORTB2	= 2	; Port B Data Register bit 2
+.equ	PB2	= 2	; For compatibility
+.equ	PORTB3	= 3	; Port B Data Register bit 3
+.equ	PB3	= 3	; For compatibility
+.equ	PORTB4	= 4	; Port B Data Register bit 4
+.equ	PB4	= 4	; For compatibility
+.equ	PORTB5	= 5	; Port B Data Register bit 5
+.equ	PB5	= 5	; For compatibility
+.equ	PORTB6	= 6	; Port B Data Register bit 6
+.equ	PB6	= 6	; For compatibility
+.equ	PORTB7	= 7	; Port B Data Register bit 7
+.equ	PB7	= 7	; For compatibility
+
+; DDRB - Port B Data Direction Register
+.equ	DDB0	= 0	; Port B Data Direction Register bit 0
+.equ	DDB1	= 1	; Port B Data Direction Register bit 1
+.equ	DDB2	= 2	; Port B Data Direction Register bit 2
+.equ	DDB3	= 3	; Port B Data Direction Register bit 3
+.equ	DDB4	= 4	; Port B Data Direction Register bit 4
+.equ	DDB5	= 5	; Port B Data Direction Register bit 5
+.equ	DDB6	= 6	; Port B Data Direction Register bit 6
+.equ	DDB7	= 7	; Port B Data Direction Register bit 7
+
+; PINB - Port B Input Pins
+.equ	PINB0	= 0	; Port B Input Pins bit 0
+.equ	PINB1	= 1	; Port B Input Pins bit 1
+.equ	PINB2	= 2	; Port B Input Pins bit 2
+.equ	PINB3	= 3	; Port B Input Pins bit 3
+.equ	PINB4	= 4	; Port B Input Pins bit 4
+.equ	PINB5	= 5	; Port B Input Pins bit 5
+.equ	PINB6	= 6	; Port B Input Pins bit 6
+.equ	PINB7	= 7	; Port B Input Pins bit 7
+
+
+; ***** PORTC ************************
+; PORTC - Port C Data Register
+.equ	PORTC0	= 0	; Port C Data Register bit 0
+.equ	PC0	= 0	; For compatibility
+.equ	PORTC1	= 1	; Port C Data Register bit 1
+.equ	PC1	= 1	; For compatibility
+.equ	PORTC2	= 2	; Port C Data Register bit 2
+.equ	PC2	= 2	; For compatibility
+.equ	PORTC3	= 3	; Port C Data Register bit 3
+.equ	PC3	= 3	; For compatibility
+.equ	PORTC4	= 4	; Port C Data Register bit 4
+.equ	PC4	= 4	; For compatibility
+.equ	PORTC5	= 5	; Port C Data Register bit 5
+.equ	PC5	= 5	; For compatibility
+.equ	PORTC6	= 6	; Port C Data Register bit 6
+.equ	PC6	= 6	; For compatibility
+.equ	PORTC7	= 7	; Port C Data Register bit 7
+.equ	PC7	= 7	; For compatibility
+
+; DDRC - Port C Data Direction Register
+.equ	DDC0	= 0	; Port C Data Direction Register bit 0
+.equ	DDC1	= 1	; Port C Data Direction Register bit 1
+.equ	DDC2	= 2	; Port C Data Direction Register bit 2
+.equ	DDC3	= 3	; Port C Data Direction Register bit 3
+.equ	DDC4	= 4	; Port C Data Direction Register bit 4
+.equ	DDC5	= 5	; Port C Data Direction Register bit 5
+.equ	DDC6	= 6	; Port C Data Direction Register bit 6
+.equ	DDC7	= 7	; Port C Data Direction Register bit 7
+
+; PINC - Port C Input Pins
+.equ	PINC0	= 0	; Port C Input Pins bit 0
+.equ	PINC1	= 1	; Port C Input Pins bit 1
+.equ	PINC2	= 2	; Port C Input Pins bit 2
+.equ	PINC3	= 3	; Port C Input Pins bit 3
+.equ	PINC4	= 4	; Port C Input Pins bit 4
+.equ	PINC5	= 5	; Port C Input Pins bit 5
+.equ	PINC6	= 6	; Port C Input Pins bit 6
+.equ	PINC7	= 7	; Port C Input Pins bit 7
+
+
+; ***** PORTD ************************
+; PORTD - Port D Data Register
+.equ	PORTD0	= 0	; Port D Data Register bit 0
+.equ	PD0	= 0	; For compatibility
+.equ	PORTD1	= 1	; Port D Data Register bit 1
+.equ	PD1	= 1	; For compatibility
+.equ	PORTD2	= 2	; Port D Data Register bit 2
+.equ	PD2	= 2	; For compatibility
+.equ	PORTD3	= 3	; Port D Data Register bit 3
+.equ	PD3	= 3	; For compatibility
+.equ	PORTD4	= 4	; Port D Data Register bit 4
+.equ	PD4	= 4	; For compatibility
+.equ	PORTD5	= 5	; Port D Data Register bit 5
+.equ	PD5	= 5	; For compatibility
+.equ	PORTD6	= 6	; Port D Data Register bit 6
+.equ	PD6	= 6	; For compatibility
+.equ	PORTD7	= 7	; Port D Data Register bit 7
+.equ	PD7	= 7	; For compatibility
+
+; DDRD - Port D Data Direction Register
+.equ	DDD0	= 0	; Port D Data Direction Register bit 0
+.equ	DDD1	= 1	; Port D Data Direction Register bit 1
+.equ	DDD2	= 2	; Port D Data Direction Register bit 2
+.equ	DDD3	= 3	; Port D Data Direction Register bit 3
+.equ	DDD4	= 4	; Port D Data Direction Register bit 4
+.equ	DDD5	= 5	; Port D Data Direction Register bit 5
+.equ	DDD6	= 6	; Port D Data Direction Register bit 6
+.equ	DDD7	= 7	; Port D Data Direction Register bit 7
+
+; PIND - Port D Input Pins
+.equ	PIND0	= 0	; Port D Input Pins bit 0
+.equ	PIND1	= 1	; Port D Input Pins bit 1
+.equ	PIND2	= 2	; Port D Input Pins bit 2
+.equ	PIND3	= 3	; Port D Input Pins bit 3
+.equ	PIND4	= 4	; Port D Input Pins bit 4
+.equ	PIND5	= 5	; Port D Input Pins bit 5
+.equ	PIND6	= 6	; Port D Input Pins bit 6
+.equ	PIND7	= 7	; Port D Input Pins bit 7
+
+
+; ***** PORTE ************************
+; PORTE - Data Register, Port E
+.equ	PORTE0	= 0	; 
+.equ	PE0	= 0	; For compatibility
+.equ	PORTE1	= 1	; 
+.equ	PE1	= 1	; For compatibility
+.equ	PORTE2	= 2	; 
+.equ	PE2	= 2	; For compatibility
+.equ	PORTE3	= 3	; 
+.equ	PE3	= 3	; For compatibility
+.equ	PORTE4	= 4	; 
+.equ	PE4	= 4	; For compatibility
+.equ	PORTE5	= 5	; 
+.equ	PE5	= 5	; For compatibility
+.equ	PORTE6	= 6	; 
+.equ	PE6	= 6	; For compatibility
+.equ	PORTE7	= 7	; 
+.equ	PE7	= 7	; For compatibility
+
+; DDRE - Data Direction Register, Port E
+.equ	DDE0	= 0	; 
+.equ	DDE1	= 1	; 
+.equ	DDE2	= 2	; 
+.equ	DDE3	= 3	; 
+.equ	DDE4	= 4	; 
+.equ	DDE5	= 5	; 
+.equ	DDE6	= 6	; 
+.equ	DDE7	= 7	; 
+
+; PINE - Input Pins, Port E
+.equ	PINE0	= 0	; 
+.equ	PINE1	= 1	; 
+.equ	PINE2	= 2	; 
+.equ	PINE3	= 3	; 
+.equ	PINE4	= 4	; 
+.equ	PINE5	= 5	; 
+.equ	PINE6	= 6	; 
+.equ	PINE7	= 7	; 
+
+
+; ***** PORTF ************************
+; PORTF - Data Register, Port F
+.equ	PORTF0	= 0	; 
+.equ	PF0	= 0	; For compatibility
+.equ	PORTF1	= 1	; 
+.equ	PF1	= 1	; For compatibility
+.equ	PORTF2	= 2	; 
+.equ	PF2	= 2	; For compatibility
+.equ	PORTF3	= 3	; 
+.equ	PF3	= 3	; For compatibility
+.equ	PORTF4	= 4	; 
+.equ	PF4	= 4	; For compatibility
+.equ	PORTF5	= 5	; 
+.equ	PF5	= 5	; For compatibility
+.equ	PORTF6	= 6	; 
+.equ	PF6	= 6	; For compatibility
+.equ	PORTF7	= 7	; 
+.equ	PF7	= 7	; For compatibility
+
+; DDRF - Data Direction Register, Port F
+.equ	DDF0	= 0	; 
+.equ	DDF1	= 1	; 
+.equ	DDF2	= 2	; 
+.equ	DDF3	= 3	; 
+.equ	DDF4	= 4	; 
+.equ	DDF5	= 5	; 
+.equ	DDF6	= 6	; 
+.equ	DDF7	= 7	; 
+
+; PINF - Input Pins, Port F
+.equ	PINF0	= 0	; 
+.equ	PINF1	= 1	; 
+.equ	PINF2	= 2	; 
+.equ	PINF3	= 3	; 
+.equ	PINF4	= 4	; 
+.equ	PINF5	= 5	; 
+.equ	PINF6	= 6	; 
+.equ	PINF7	= 7	; 
+
+
+; ***** PORTG ************************
+; PORTG - Data Register, Port G
+.equ	PORTG0	= 0	; 
+.equ	PG0	= 0	; For compatibility
+.equ	PORTG1	= 1	; 
+.equ	PG1	= 1	; For compatibility
+.equ	PORTG2	= 2	; 
+.equ	PG2	= 2	; For compatibility
+.equ	PORTG3	= 3	; 
+.equ	PG3	= 3	; For compatibility
+.equ	PORTG4	= 4	; 
+.equ	PG4	= 4	; For compatibility
+
+; DDRG - Data Direction Register, Port G
+.equ	DDG0	= 0	; 
+.equ	DDG1	= 1	; 
+.equ	DDG2	= 2	; 
+.equ	DDG3	= 3	; 
+.equ	DDG4	= 4	; 
+
+; PING - Input Pins, Port G
+.equ	PING0	= 0	; 
+.equ	PING1	= 1	; 
+.equ	PING2	= 2	; 
+.equ	PING3	= 3	; 
+.equ	PING4	= 4	; 
+
+
+; ***** TIMER_COUNTER_0 **************
+; TCCR0 - Timer/Counter Control Register
+.equ	CS00	= 0	; Clock Select 0
+.equ	CS01	= 1	; Clock Select 1
+.equ	CS02	= 2	; Clock Select 2
+.equ	WGM01	= 3	; Waveform Generation Mode 1
+.equ	CTC0	= WGM01	; For compatibility
+.equ	COM00	= 4	; Compare match Output Mode 0
+.equ	COM01	= 5	; Compare Match Output Mode 1
+.equ	WGM00	= 6	; Waveform Generation Mode 0
+.equ	PWM0	= WGM00	; For compatibility
+.equ	FOC0	= 7	; Force Output Compare
+
+; TCNT0 - Timer/Counter Register
+.equ	TCNT0_0	= 0	; 
+.equ	TCNT0_1	= 1	; 
+.equ	TCNT0_2	= 2	; 
+.equ	TCNT0_3	= 3	; 
+.equ	TCNT0_4	= 4	; 
+.equ	TCNT0_5	= 5	; 
+.equ	TCNT0_6	= 6	; 
+.equ	TCNT0_7	= 7	; 
+
+; OCR0 - Output Compare Register
+.equ	OCR0_0	= 0	; 
+.equ	OCR0_1	= 1	; 
+.equ	OCR0_2	= 2	; 
+.equ	OCR0_3	= 3	; 
+.equ	OCR0_4	= 4	; 
+.equ	OCR0_5	= 5	; 
+.equ	OCR0_6	= 6	; 
+.equ	OCR0_7	= 7	; 
+
+; ASSR - Asynchronus Status Register
+.equ	TCR0UB	= 0	; Timer/Counter Control Register 0 Update Busy
+.equ	OCR0UB	= 1	; Output Compare register 0 Busy
+.equ	TCN0UB	= 2	; Timer/Counter0 Update Busy
+.equ	AS0	= 3	; Asynchronus Timer/Counter 0
+
+; TIMSK - Timer/Counter Interrupt Mask Register
+.equ	TOIE0	= 0	; Timer/Counter0 Overflow Interrupt Enable
+.equ	OCIE0	= 1	; Timer/Counter0 Output Compare Match Interrupt register
+
+; TIFR - Timer/Counter Interrupt Flag register
+.equ	TOV0	= 0	; Timer/Counter0 Overflow Flag
+.equ	OCF0	= 1	; Output Compare Flag 0
+
+; SFIOR - Special Function IO Register
+;.equ	PSR0	= 1	; Prescaler Reset Timer/Counter0
+;.equ	TSM	= 7	; Timer/Counter Synchronization Mode
+
+
+; ***** TIMER_COUNTER_1 **************
+; TIMSK - Timer/Counter Interrupt Mask Register
+.equ	TOIE1	= 2	; Timer/Counter1 Overflow Interrupt Enable
+.equ	OCIE1B	= 3	; Timer/Counter1 Output CompareB Match Interrupt Enable
+.equ	OCIE1A	= 4	; Timer/Counter1 Output CompareA Match Interrupt Enable
+.equ	TICIE1	= 5	; Timer/Counter1 Input Capture Interrupt Enable
+
+; ETIMSK - Extended Timer/Counter Interrupt Mask Register
+.equ	OCIE1C	= 0	; Timer/Counter 1, Output Compare Match C Interrupt Enable
+
+; TIFR - Timer/Counter Interrupt Flag register
+.equ	TOV1	= 2	; Timer/Counter1 Overflow Flag
+.equ	OCF1B	= 3	; Output Compare Flag 1B
+.equ	OCF1A	= 4	; Output Compare Flag 1A
+.equ	ICF1	= 5	; Input Capture Flag 1
+
+; ETIFR - Extended Timer/Counter Interrupt Flag register
+.equ	OCF1C	= 0	; Timer/Counter 1, Output Compare C Match Flag
+
+; SFIOR - Special Function IO Register
+;.equ	PSR321	= 0	; Prescaler Reset, T/C3, T/C2, T/C1
+;.equ	TSM	= 7	; Timer/Counter Synchronization Mode
+
+; TCCR1A - Timer/Counter1 Control Register A
+.equ	WGM10	= 0	; Waveform Generation Mode Bit 0
+.equ	PWM10	= WGM10	; For compatibility
+.equ	WGM11	= 1	; Waveform Generation Mode Bit 1
+.equ	PWM11	= WGM11	; For compatibility
+.equ	COM1C0	= 2	; Compare Output Mode 1C, bit 0
+.equ	COM1C1	= 3	; Compare Output Mode 1C, bit 1
+.equ	COM1B0	= 4	; Compare Output Mode 1B, bit 0
+.equ	COM1B1	= 5	; Compare Output Mode 1B, bit 1
+.equ	COM1A0	= 6	; Compare Ouput Mode 1A, bit 0
+.equ	COM1A1	= 7	; Compare Output Mode 1A, bit 1
+
+; TCCR1B - Timer/Counter1 Control Register B
+.equ	CS10	= 0	; Clock Select bit 0
+.equ	CS11	= 1	; Clock Select 1 bit 1
+.equ	CS12	= 2	; Clock Select1 bit 2
+.equ	WGM12	= 3	; Waveform Generation Mode
+.equ	CTC10	= WGM12	; For compatibility
+.equ	WGM13	= 4	; Waveform Generation Mode
+.equ	CTC11	= WGM13	; For compatibility
+.equ	ICES1	= 6	; Input Capture 1 Edge Select
+.equ	ICNC1	= 7	; Input Capture 1 Noise Canceler
+
+; TCCR1C - Timer/Counter1 Control Register C
+.equ	FOC1C	= 5	; Force Output Compare for channel C
+.equ	FOC1B	= 6	; Force Output Compare for channel B
+.equ	FOC1A	= 7	; Force Output Compare for channel A
+
+
+; ***** TIMER_COUNTER_2 **************
+; TCCR2 - Timer/Counter Control Register
+.equ	CS20	= 0	; Clock Select
+.equ	CS21	= 1	; Clock Select
+.equ	CS22	= 2	; Clock Select
+.equ	WGM21	= 3	; Waveform Generation Mode
+.equ	CTC2	= WGM21	; For compatibility
+.equ	COM20	= 4	; Compare Match Output Mode
+.equ	COM21	= 5	; Compare Match Output Mode
+.equ	WGM20	= 6	; Wafeform Generation Mode
+.equ	PWM2	= WGM20	; For compatibility
+.equ	FOC2	= 7	; Force Output Compare
+
+; TCNT2 - Timer/Counter Register
+.equ	TCNT2_0	= 0	; Timer/Counter Register Bit 0
+.equ	TCNT2_1	= 1	; Timer/Counter Register Bit 1
+.equ	TCNT2_2	= 2	; Timer/Counter Register Bit 2
+.equ	TCNT2_3	= 3	; Timer/Counter Register Bit 3
+.equ	TCNT2_4	= 4	; Timer/Counter Register Bit 4
+.equ	TCNT2_5	= 5	; Timer/Counter Register Bit 5
+.equ	TCNT2_6	= 6	; Timer/Counter Register Bit 6
+.equ	TCNT2_7	= 7	; Timer/Counter Register Bit 7
+
+; OCR2 - Output Compare Register
+.equ	OCR2_0	= 0	; Output Compare Register Bit 0
+.equ	OCR2_1	= 1	; Output Compare Register Bit 1
+.equ	OCR2_2	= 2	; Output Compare Register Bit 2
+.equ	OCR2_3	= 3	; Output Compare Register Bit 3
+.equ	OCR2_4	= 4	; Output Compare Register Bit 4
+.equ	OCR2_5	= 5	; Output Compare Register Bit 5
+.equ	OCR2_6	= 6	; Output Compare Register Bit 6
+.equ	OCR2_7	= 7	; Output Compare Register Bit 7
+
+; TIMSK - 
+.equ	TOIE2	= 6	; 
+.equ	OCIE2	= 7	; 
+
+; TIFR - Timer/Counter Interrupt Flag Register
+.equ	TOV2	= 6	; Timer/Counter2 Overflow Flag
+.equ	OCF2	= 7	; Output Compare Flag 2
+
+
+; ***** TIMER_COUNTER_3 **************
+; ETIMSK - Extended Timer/Counter Interrupt Mask Register
+.equ	OCIE3C	= 1	; Timer/Counter3, Output Compare Match Interrupt Enable
+.equ	TOIE3	= 2	; Timer/Counter3 Overflow Interrupt Enable
+.equ	OCIE3B	= 3	; Timer/Counter3 Output CompareB Match Interrupt Enable
+.equ	OCIE3A	= 4	; Timer/Counter3 Output CompareA Match Interrupt Enable
+.equ	TICIE3	= 5	; Timer/Counter3 Input Capture Interrupt Enable
+
+; ETIFR - Extended Timer/Counter Interrupt Flag register
+.equ	OCF3C	= 1	; Timer/Counter3 Output Compare C Match Flag
+.equ	TOV3	= 2	; Timer/Counter3 Overflow Flag
+.equ	OCF3B	= 3	; Output Compare Flag 1B
+.equ	OCF3A	= 4	; Output Compare Flag 1A
+.equ	ICF3	= 5	; Input Capture Flag 1
+
+; SFIOR - Special Function IO Register
+;.equ	PSR321	= 0	; Prescaler Reset, T/C3, T/C2, T/C1
+;.equ	PSR1	= PSR321	; For compatibility
+;.equ	PSR2	= PSR321	; For compatibility
+;.equ	TSM	= 7	; Timer/Counter Synchronization Mode
+
+; TCCR3A - Timer/Counter3 Control Register A
+.equ	WGM30	= 0	; Waveform Generation Mode Bit 0
+.equ	PWM30	= WGM30	; For compatibility
+.equ	WGM31	= 1	; Waveform Generation Mode Bit 1
+.equ	PWM31	= WGM31	; For compatibility
+.equ	COM3C0	= 2	; Compare Output Mode 3C, bit 0
+.equ	COM3C1	= 3	; Compare Output Mode 3C, bit 1
+.equ	COM3B0	= 4	; Compare Output Mode 3B, bit 0
+.equ	COM3B1	= 5	; Compare Output Mode 3B, bit 1
+.equ	COM3A0	= 6	; Comparet Ouput Mode 3A, bit 0
+.equ	COM3A1	= 7	; Compare Output Mode 3A, bit 1
+
+; TCCR3B - Timer/Counter3 Control Register B
+.equ	CS30	= 0	; Clock Select 3 bit 0
+.equ	CS31	= 1	; Clock Select 3 bit 1
+.equ	CS32	= 2	; Clock Select3 bit 2
+.equ	WGM32	= 3	; Waveform Generation Mode
+.equ	CTC30	= WGM32	; For compatibility
+.equ	WGM33	= 4	; Waveform Generation Mode
+.equ	CTC31	= WGM33	; For compatibility
+.equ	ICES3	= 6	; Input Capture 3 Edge Select
+.equ	ICNC3	= 7	; Input Capture 3  Noise Canceler
+
+; TCCR3C - Timer/Counter3 Control Register C
+.equ	FOC3C	= 5	; Force Output Compare for channel C
+.equ	FOC3B	= 6	; Force Output Compare for channel B
+.equ	FOC3A	= 7	; Force Output Compare for channel A
+
+; TCNT3L - Timer/Counter3 Low Byte
+.equ	TCN3L0	= 0	; Timer/Counter 3 bit 0
+.equ	TCN3L1	= 1	; Timer/Counter 3 bit 1
+.equ	TCN3L2	= 2	; Timer/Counter 3 bit 2
+.equ	TCN3L3	= 3	; Timer/Counter 3 bit 3
+.equ	TCN3L4	= 4	; Timer/Counter 3 bit 4
+.equ	TCN3L5	= 5	; Timer/Counter 3 bit 5
+.equ	TCN3L6	= 6	; Timer/Counter 3 bit 6
+.equ	TCN3L7	= 7	; Timer/Counter 3 bit 7
+
+
+; ***** WATCHDOG *********************
+; WDTCR - Watchdog Timer Control Register
+.equ	WDTCSR	= WDTCR	; For compatibility
+.equ	WDP0	= 0	; Watch Dog Timer Prescaler bit 0
+.equ	WDP1	= 1	; Watch Dog Timer Prescaler bit 1
+.equ	WDP2	= 2	; Watch Dog Timer Prescaler bit 2
+.equ	WDE	= 3	; Watch Dog Enable
+.equ	WDCE	= 4	; Watchdog Change Enable
+.equ	WDTOE	= WDCE	; For compatibility
+
+
+; ***** AD_CONVERTER *****************
+; ADMUX - The ADC multiplexer Selection Register
+.equ	MUX0	= 0	; Analog Channel and Gain Selection Bits
+.equ	MUX1	= 1	; Analog Channel and Gain Selection Bits
+.equ	MUX2	= 2	; Analog Channel and Gain Selection Bits
+.equ	MUX3	= 3	; Analog Channel and Gain Selection Bits
+.equ	MUX4	= 4	; Analog Channel and Gain Selection Bits
+.equ	ADLAR	= 5	; Left Adjust Result
+.equ	REFS0	= 6	; Reference Selection Bit 0
+.equ	REFS1	= 7	; Reference Selection Bit 1
+
+; ADCSRA - The ADC Control and Status register
+.equ	ADCSR	= ADCSRA	; For compatibility
+.equ	ADPS0	= 0	; ADC  Prescaler Select Bits
+.equ	ADPS1	= 1	; ADC  Prescaler Select Bits
+.equ	ADPS2	= 2	; ADC  Prescaler Select Bits
+.equ	ADIE	= 3	; ADC Interrupt Enable
+.equ	ADIF	= 4	; ADC Interrupt Flag
+.equ	ADFR	= 5	; ADC  Free Running Select
+.equ	ADSC	= 6	; ADC Start Conversion
+.equ	ADEN	= 7	; ADC Enable
+
+; ADCH - ADC Data Register High Byte
+.equ	ADCH0	= 0	; ADC Data Register High Byte Bit 0
+.equ	ADCH1	= 1	; ADC Data Register High Byte Bit 1
+.equ	ADCH2	= 2	; ADC Data Register High Byte Bit 2
+.equ	ADCH3	= 3	; ADC Data Register High Byte Bit 3
+.equ	ADCH4	= 4	; ADC Data Register High Byte Bit 4
+.equ	ADCH5	= 5	; ADC Data Register High Byte Bit 5
+.equ	ADCH6	= 6	; ADC Data Register High Byte Bit 6
+.equ	ADCH7	= 7	; ADC Data Register High Byte Bit 7
+
+; ADCL - ADC Data Register Low Byte
+.equ	ADCL0	= 0	; ADC Data Register Low Byte Bit 0
+.equ	ADCL1	= 1	; ADC Data Register Low Byte Bit 1
+.equ	ADCL2	= 2	; ADC Data Register Low Byte Bit 2
+.equ	ADCL3	= 3	; ADC Data Register Low Byte Bit 3
+.equ	ADCL4	= 4	; ADC Data Register Low Byte Bit 4
+.equ	ADCL5	= 5	; ADC Data Register Low Byte Bit 5
+.equ	ADCL6	= 6	; ADC Data Register Low Byte Bit 6
+.equ	ADCL7	= 7	; ADC Data Register Low Byte Bit 7
+
+
+
+; ***** LOCKSBITS ********************************************************
+.equ	LB1	= 0	; Lock bit
+.equ	LB2	= 1	; Lock bit
+.equ	BLB01	= 2	; Boot Lock bit
+.equ	BLB02	= 3	; Boot Lock bit
+.equ	BLB11	= 4	; Boot lock bit
+.equ	BLB12	= 5	; Boot lock bit
+
+
+; ***** FUSES ************************************************************
+; LOW fuse bits
+.equ	CKSEL0	= 0	; Select Clock Source
+.equ	CKSEL1	= 1	; Select Clock Source
+.equ	CKSEL2	= 2	; Select Clock Source
+.equ	CKSEL3	= 3	; Select Clock Source
+.equ	SUT0	= 4	; Select start-up time
+.equ	SUT1	= 5	; Select start-up time
+.equ	BODEN	= 6	; Brown out detector enable
+.equ	BODLEVEL	= 7	; Brown out detector trigger level
+
+; HIGH fuse bits
+.equ	BOOTRST	= 0	; Select Reset Vector
+.equ	BOOTSZ0	= 1	; Select Boot Size
+.equ	BOOTSZ1	= 2	; Select Boot Size
+.equ	EESAVE	= 3	; EEPROM memory is preserved through chip erase
+.equ	CKOPT	= 4	; Oscillator Options
+.equ	SPIEN	= 5	; Enable Serial programming and Data Downloading
+.equ	JTAGEN	= 6	; Enable JTAG
+.equ	OCDEN	= 7	; Enable OCD
+
+; EXTENDED fuse bits
+.equ	WDTON	= 0	; Watchdog timer always on
+.equ	M103C	= 1	; ATmega103 compatibility mode
+
+
+
+; ***** CPU REGISTER DEFINITIONS *****************************************
+.def	XH	= r27
+.def	XL	= r26
+.def	YH	= r29
+.def	YL	= r28
+.def	ZH	= r31
+.def	ZL	= r30
+
+
+
+; ***** DATA MEMORY DECLARATIONS *****************************************
+.equ	FLASHEND	= 0xffff	; Note: Word address
+.equ	IOEND	= 0x00ff
+.equ	SRAM_START	= 0x0100
+.equ	SRAM_SIZE	= 4096
+.equ	RAMEND	= 0x10ff
+.equ	XRAMEND	= 0xffff
+.equ	E2END	= 0x0fff
+.equ	EEPROMEND	= 0x0fff
+.equ	EEADRBITS	= 12
+#pragma AVRPART MEMORY PROG_FLASH 131072
+#pragma AVRPART MEMORY EEPROM 4096
+#pragma AVRPART MEMORY INT_SRAM SIZE 4096
+#pragma AVRPART MEMORY INT_SRAM START_ADDR 0x100
+
+
+
+; ***** BOOTLOADER DECLARATIONS ******************************************
+.equ	NRWW_START_ADDR	= 0xf000
+.equ	NRWW_STOP_ADDR	= 0xffff
+.equ	RWW_START_ADDR	= 0x0
+.equ	RWW_STOP_ADDR	= 0xefff
+.equ	PAGESIZE	= 128
+.equ	FIRSTBOOTSTART	= 0xfe00
+.equ	SECONDBOOTSTART	= 0xfc00
+.equ	THIRDBOOTSTART	= 0xf800
+.equ	FOURTHBOOTSTART	= 0xf000
+.equ	SMALLBOOTSTART	= FIRSTBOOTSTART
+.equ	LARGEBOOTSTART	= FOURTHBOOTSTART
+
+
+
+; ***** INTERRUPT VECTORS ************************************************
+.equ	INT0addr	= 0x0002	; External Interrupt Request 0
+.equ	INT1addr	= 0x0004	; External Interrupt Request 1
+.equ	INT2addr	= 0x0006	; External Interrupt Request 2
+.equ	INT3addr	= 0x0008	; External Interrupt Request 3
+.equ	INT4addr	= 0x000a	; External Interrupt Request 4
+.equ	INT5addr	= 0x000c	; External Interrupt Request 5
+.equ	INT6addr	= 0x000e	; External Interrupt Request 6
+.equ	INT7addr	= 0x0010	; External Interrupt Request 7
+.equ	OC2addr	= 0x0012	; Timer/Counter2 Compare Match
+.equ	OVF2addr	= 0x0014	; Timer/Counter2 Overflow
+.equ	ICP1addr	= 0x0016	; Timer/Counter1 Capture Event
+.equ	OC1Aaddr	= 0x0018	; Timer/Counter1 Compare Match A
+.equ	OC1Baddr	= 0x001a	; Timer/Counter Compare Match B
+.equ	OVF1addr	= 0x001c	; Timer/Counter1 Overflow
+.equ	OC0addr	= 0x001e	; Timer/Counter0 Compare Match
+.equ	OVF0addr	= 0x0020	; Timer/Counter0 Overflow
+.equ	SPIaddr	= 0x0022	; SPI Serial Transfer Complete
+.equ	URXC0addr	= 0x0024	; USART0, Rx Complete
+.equ	UDRE0addr	= 0x0026	; USART0 Data Register Empty
+.equ	UTXC0addr	= 0x0028	; USART0, Tx Complete
+.equ	ADCCaddr	= 0x002a	; ADC Conversion Complete
+.equ	ERDYaddr	= 0x002c	; EEPROM Ready
+.equ	ACIaddr	= 0x002e	; Analog Comparator
+.equ	OC1Caddr	= 0x0030	; Timer/Counter1 Compare Match C
+.equ	ICP3addr	= 0x0032	; Timer/Counter3 Capture Event
+.equ	OC3Aaddr	= 0x0034	; Timer/Counter3 Compare Match A
+.equ	OC3Baddr	= 0x0036	; Timer/Counter3 Compare Match B
+.equ	OC3Caddr	= 0x0038	; Timer/Counter3 Compare Match C
+.equ	OVF3addr	= 0x003a	; Timer/Counter3 Overflow
+.equ	URXC1addr	= 0x003c	; USART1, Rx Complete
+.equ	UDRE1addr	= 0x003e	; USART1, Data Register Empty
+.equ	UTXC1addr	= 0x0040	; USART1, Tx Complete
+.equ	TWIaddr	= 0x0042	; 2-wire Serial Interface
+.equ	SPMRaddr	= 0x0044	; Store Program Memory Read
+
+.equ	INT_VECTORS_SIZE	= 70	; size in words
+
+#endif  /* _M128DEF_INC_ */
+
+; ***** END OF FILE ******************************************************
diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/macros.asm b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/macros.asm
new file mode 100644
index 00000000..ae3de515
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/macros.asm
@@ -0,0 +1,224 @@
+.equ	high_test = 0x11				;in order to use the full 64k of external mem, everytime a read or write occurs
+										;the address must be checked to make sure it is above or euqal to 0x1100, if it below
+										;then have to perform hack
+.equ	rom_start = 0x80				;high byte test for ROM - sets ammount of ram
+.equ	VIAS		= 0x91
+.equ	sb_mask = 64		
+;--------------------------------------------------------------									
+.MACRO ld_cpuZ      
+		mov		r16,ZH						;test if VIAS being accessed
+		cpi		r16,VIAS
+		breq	hardware
+             
+		cpi		ZH,high_test
+		brlo	dohack1
+		ld		@0,Z						;hack not needed
+		rjmp	exit1
+
+	dohack1:
+		ldi		r16, (1<<XMM1)				;force top address bit 0
+		sts 	XMCRB, r16
+
+		sbr		ZH,sb_mask						;set high bit, so when writing/reading it will use external memory
+
+		ld		@0,Z						;read value
+
+		cbr		ZH,sb_mask						;clear top bit
+
+		ldi 	r16,(0<<XMM1)
+		sts 	XMCRB, r16
+		rjmp	exit1
+	hardware:
+	;	push	retL
+		rcall	vias_access
+		mov		@0,retL
+	;	pop		retL
+
+
+	exit1:
+.ENDMACRO
+;--------------------------------------------------------------
+.MACRO ld_cpuZp                   
+		cpi		ZH,high_test
+		brlo	dohack1
+		ld		@0,Z+						;hack not needed
+		rjmp	exit1
+
+	dohack1:
+		ldi		r16, (1<<XMM1)				;force top address bit 0
+		sts 	XMCRB, r16
+
+		sbr		ZH,sb_mask						;set high bit, so when writing/reading it will use external memory
+
+		ld		@0,Z+						;read value
+
+		cbr		ZH,sb_mask						;clear top bit
+
+		ldi 	r16, (0<<XMM1)
+		sts 	XMCRB, r16
+
+	exit1:
+	
+.ENDMACRO
+;--------------------------------------------------------------
+.MACRO ld_cpuY       
+	
+
+            
+		cpi		YH,high_test
+		brlo	dohack1
+		ld		@0,Y						;hack not needed
+		rjmp	exit1
+
+	dohack1:
+		ldi		r16, (1<<XMM1)				;force top address bit 0
+		sts 	XMCRB, r16
+
+		sbr		YH,sb_mask						;set high bit, so when writing/reading it will use external memory
+
+		ld		@0,Y						;read value
+
+		cbr		YH,sb_mask						;clear top bit
+
+		ldi 	r16, (0<<XMM1)
+		sts 	XMCRB, r16
+
+
+
+	exit1:
+.ENDMACRO
+;--------------------------------------------------------------
+.MACRO ld_cpuYp                   
+		cpi		YH,high_test
+		brlo	dohack1
+		ld		@0,Y+						;hack not needed
+		rjmp	exit1
+
+	dohack1:
+		ldi		r16, (1<<XMM1)				;force top address bit 0
+		sts 	XMCRB, r16
+
+		sbr		YH,sb_mask						;set high bit, so when writing/reading it will use external memory
+
+		ld		@0,Y+						;read value
+
+		cbr		YH,sb_mask						;clear top bit
+
+		ldi 	r16,(0<<XMM1)
+		sts 	XMCRB, r16
+
+	exit1:
+.ENDMACRO
+
+;--------------------------------------------------------------
+
+.MACRO st_cpuZ                  
+		cpi		ZH,high_test
+		brlo	dohack1
+
+		mov		r16,ZH						;when kernal starts, it tests ram untill it finds ROM
+		andi	r16,0b11110000
+		cpi		r16,rom_start
+		breq	exit1
+
+		st		Z,@0						;hack not needed
+		rjmp	exit1
+
+	dohack1:
+		ldi		r16, (1<<XMM1)				;force top address bit 0
+		sts 	XMCRB, r16
+
+		sbr		ZH,sb_mask						;set high bit, so when writing/reading it will use external memory
+
+		st		Z,@0						;store value
+
+		cbr		ZH,sb_mask						;clear top bit
+
+		ldi 	r16, (0<<XMM1)
+		sts 	XMCRB, r16
+
+	exit1:
+.ENDMACRO 
+;--------------------------------------------------------------
+
+.MACRO stack_push ;stack 1FF -> 100
+	
+	ldi		ZH,1			;get next stack address
+	mov		ZL,stack
+
+	;TODO def in lower reagion, setup for write
+	ldi		r16, (1<<XMM1)				;force top address bit 0
+		sts 	XMCRB, r16
+
+		sbr		ZH,sb_mask						;set high bit, so when writing/reading it will use external memory
+
+		st		Z,@0						;store value
+
+		cbr		ZH,sb_mask						;clear top bit
+
+		ldi 	r16, (0<<XMM1)
+		sts 	XMCRB, r16
+;	st		Z,@0				;store value to stack
+
+	dec		stack			;dec stack to next location
+.ENDMACRO
+
+
+.MACRO stack_pop ;stack 1FF -> 100
+	inc		stack			;in stack to prev location
+
+	ldi		ZH,1			;get next stack address
+	mov		ZL,stack
+
+	;TODO def in lower reagion, setup for write
+	ldi		r16, (1<<XMM1)				;force top address bit 0
+		sts 	XMCRB, r16
+
+		sbr		ZH,sb_mask						;set high bit, so when writing/reading it will use external memory
+
+		ld		@0,Z						;read value
+
+		cbr		ZH,sb_mask						;clear top bit
+
+		ldi 	r16,(0<<XMM1)
+		sts 	XMCRB, r16
+;	ld		@0,Z			;get value from stack
+
+.ENDMACRO
+
+
+
+
+
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+;get_pc_mem
+	
+;purpose: 	get next byte pointed to by PC, also inc PC
+;Takes: 	PC
+;Give:		returns byte in first param
+;----------------------------------------------------------------------
+;----------------------------------------------------------------------
+.MACRO get_pc_mem   
+		cpi		XH,high_test
+		brlo	dohack1
+		ld		@0,X+						;hack not needed
+		rjmp	exit1
+
+	dohack1:
+		ldi		r16, (1<<XMM1)				;force top address bit 0
+		sts 	XMCRB, r16
+
+		sbr		XH,sb_mask						;set high bit, so when writing/reading it will use external memory
+
+		ld		@0,X+						;read value
+
+		cbr		XH,sb_mask						;clear top bit
+
+		ldi 	r16, (0<<XMM1)
+		sts 	XMCRB, r16      
+	exit1:  
+		;TODO check is less than 0x1100
+        ;ld		@0,X+;
+.ENDMACRO                   ;
+
diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/vic20.hex b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/vic20.hex
new file mode 100644
index 00000000..14d13210
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/vic20.hex
@@ -0,0 +1,2089 @@
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diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/vic20.lst b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/vic20.lst
new file mode 100644
index 00000000..e83b5bd6
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/vic20.lst
@@ -0,0 +1,19082 @@
+
+AVRASM ver. 2.1.43  VIC20.asm Thu Feb 25 10:51:12 2016
+
+VIC20.asm(2): Including file 'm128def.inc'
+VIC20.asm(74): warning: Register r26 already defined by the .DEF directive
+VIC20.asm(75): warning: Register r27 already defined by the .DEF directive
+VIC20.asm(95): Including file 'macros.asm'
+VIC20.asm(673): Including file '6502cpu.asm'
+VIC20.asm(674): Including file 'io.asm'
+VIC20.asm(675): Including file 'init.asm'
+VIC20.asm(680): Including file 'dbops.asm'
+VIC20.asm(682): Including file 'kernal.asm'
+VIC20.asm(684): Including file 'basic.asm'
+VIC20.asm(686): Including file 'chars.asm'
+VIC20.asm(688): Including file 'game.asm'
+                 
+                 
+                 .include	"m128def.inc"
+                 
+                 ;***** Created: 2011-02-09 12:03 ******* Source: ATmega128.xml ***********
+                 ;*************************************************************************
+                 ;* A P P L I C A T I O N   N O T E   F O R   T H E   A V R   F A M I L Y
+                 ;* 
+                 ;* Number            : AVR000
+                 ;* File Name         : "m128def.inc"
+                 ;* Title             : Register/Bit Definitions for the ATmega128
+                 ;* Date              : 2011-02-09
+                 ;* Version           : 2.35
+                 ;* Support E-mail    : avr@atmel.com
+                 ;* Target MCU        : ATmega128
+                 ;* 
+                 ;* DESCRIPTION
+                 ;* When including this file in the assembly program file, all I/O register 
+                 ;* names and I/O register bit names appearing in the data book can be used.
+                 ;* In addition, the six registers forming the three data pointers X, Y and 
+                 ;* Z have been assigned names XL - ZH. Highest RAM address for Internal 
+                 ;* SRAM is also defined 
+                 ;* 
+                 ;* The Register names are represented by their hexadecimal address.
+                 ;* 
+                 ;* The Register Bit names are represented by their bit number (0-7).
+                 ;* 
+                 ;* Please observe the difference in using the bit names with instructions
+                 ;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc"
+                 ;* (skip if bit in register set/cleared). The following example illustrates
+                 ;* this:
+                 ;* 
+                 ;* in    r16,PORTB             ;read PORTB latch
+                 ;* sbr   r16,(1<<PB6)+(1<<PB5) ;set PB6 and PB5 (use masks, not bit#)
+                 ;* out   PORTB,r16             ;output to PORTB
+                 ;* 
+                 ;* in    r16,TIFR              ;read the Timer Interrupt Flag Register
+                 ;* sbrc  r16,TOV0              ;test the overflow flag (use bit#)
+                 ;* rjmp  TOV0_is_set           ;jump if set
+                 ;* ...                         ;otherwise do something else
+                 ;*************************************************************************
+                 
+                 #ifndef _M128DEF_INC_
+                 #define _M128DEF_INC_
+                 
+                 
+                 #pragma partinc 0
+                 
+                 ; ***** SPECIFY DEVICE ***************************************************
+                 .device ATmega128
+                 #pragma AVRPART ADMIN PART_NAME ATmega128
+                 .equ	SIGNATURE_000	= 0x1e
+                 .equ	SIGNATURE_001	= 0x97
+                 .equ	SIGNATURE_002	= 0x02
+                 
+                 #pragma AVRPART CORE CORE_VERSION V2E
+                 
+                 
+                 ; ***** I/O REGISTER DEFINITIONS *****************************************
+                 ; NOTE:
+                 ; Definitions marked "MEMORY MAPPED"are extended I/O ports
+                 ; and cannot be used with IN/OUT instructions
+                 .equ	UCSR1C	= 0x9d	; MEMORY MAPPED
+                 .equ	UDR1	= 0x9c	; MEMORY MAPPED
+                 .equ	UCSR1A	= 0x9b	; MEMORY MAPPED
+                 .equ	UCSR1B	= 0x9a	; MEMORY MAPPED
+                 .equ	UBRR1H	= 0x98	; MEMORY MAPPED
+                 .equ	UBRR1L	= 0x99	; MEMORY MAPPED
+                 .equ	UCSR0C	= 0x95	; MEMORY MAPPED
+                 .equ	UBRR0H	= 0x90	; MEMORY MAPPED
+                 .equ	TCCR3C	= 0x8c	; MEMORY MAPPED
+                 .equ	TCCR3A	= 0x8b	; MEMORY MAPPED
+                 .equ	TCCR3B	= 0x8a	; MEMORY MAPPED
+                 .equ	TCNT3L	= 0x88	; MEMORY MAPPED
+                 .equ	TCNT3H	= 0x89	; MEMORY MAPPED
+                 .equ	OCR3AL	= 0x86	; MEMORY MAPPED
+                 .equ	OCR3AH	= 0x87	; MEMORY MAPPED
+                 .equ	OCR3BL	= 0x84	; MEMORY MAPPED
+                 .equ	OCR3BH	= 0x85	; MEMORY MAPPED
+                 .equ	OCR3CL	= 0x82	; MEMORY MAPPED
+                 .equ	OCR3CH	= 0x83	; MEMORY MAPPED
+                 .equ	ICR3L	= 0x80	; MEMORY MAPPED
+                 .equ	ICR3H	= 0x81	; MEMORY MAPPED
+                 .equ	ETIMSK	= 0x7d	; MEMORY MAPPED
+                 .equ	ETIFR	= 0x7c	; MEMORY MAPPED
+                 .equ	TCCR1C	= 0x7a	; MEMORY MAPPED
+                 .equ	OCR1CL	= 0x78	; MEMORY MAPPED
+                 .equ	OCR1CH	= 0x79	; MEMORY MAPPED
+                 .equ	TWCR	= 0x74	; MEMORY MAPPED
+                 .equ	TWDR	= 0x73	; MEMORY MAPPED
+                 .equ	TWAR	= 0x72	; MEMORY MAPPED
+                 .equ	TWSR	= 0x71	; MEMORY MAPPED
+                 .equ	TWBR	= 0x70	; MEMORY MAPPED
+                 .equ	OSCCAL	= 0x6f	; MEMORY MAPPED
+                 .equ	XMCRA	= 0x6d	; MEMORY MAPPED
+                 .equ	XMCRB	= 0x6c	; MEMORY MAPPED
+                 .equ	EICRA	= 0x6a	; MEMORY MAPPED
+                 .equ	SPMCSR	= 0x68	; MEMORY MAPPED
+                 .equ	PORTG	= 0x65	; MEMORY MAPPED
+                 .equ	DDRG	= 0x64	; MEMORY MAPPED
+                 .equ	PING	= 0x63	; MEMORY MAPPED
+                 .equ	PORTF	= 0x62	; MEMORY MAPPED
+                 .equ	DDRF	= 0x61	; MEMORY MAPPED
+                 .equ	SREG	= 0x3f
+                 .equ	SPL	= 0x3d
+                 .equ	SPH	= 0x3e
+                 .equ	XDIV	= 0x3c
+                 .equ	RAMPZ	= 0x3b
+                 .equ	EICRB	= 0x3a
+                 .equ	EIMSK	= 0x39
+                 .equ	EIFR	= 0x38
+                 .equ	TIMSK	= 0x37
+                 .equ	TIFR	= 0x36
+                 .equ	MCUCR	= 0x35
+                 .equ	MCUCSR	= 0x34
+                 .equ	TCCR0	= 0x33
+                 .equ	TCNT0	= 0x32
+                 .equ	OCR0	= 0x31
+                 .equ	ASSR	= 0x30
+                 .equ	TCCR1A	= 0x2f
+                 .equ	TCCR1B	= 0x2e
+                 .equ	TCNT1L	= 0x2c
+                 .equ	TCNT1H	= 0x2d
+                 .equ	OCR1AL	= 0x2a
+                 .equ	OCR1AH	= 0x2b
+                 .equ	OCR1BL	= 0x28
+                 .equ	OCR1BH	= 0x29
+                 .equ	ICR1L	= 0x26
+                 .equ	ICR1H	= 0x27
+                 .equ	TCCR2	= 0x25
+                 .equ	TCNT2	= 0x24
+                 .equ	OCR2	= 0x23
+                 .equ	OCDR	= 0x22
+                 .equ	WDTCR	= 0x21
+                 .equ	SFIOR	= 0x20
+                 .equ	EEARL	= 0x1e
+                 .equ	EEARH	= 0x1f
+                 .equ	EEDR	= 0x1d
+                 .equ	EECR	= 0x1c
+                 .equ	PORTA	= 0x1b
+                 .equ	DDRA	= 0x1a
+                 .equ	PINA	= 0x19
+                 .equ	PORTB	= 0x18
+                 .equ	DDRB	= 0x17
+                 .equ	PINB	= 0x16
+                 .equ	PORTC	= 0x15
+                 .equ	DDRC	= 0x14
+                 .equ	PINC	= 0x13
+                 .equ	PORTD	= 0x12
+                 .equ	DDRD	= 0x11
+                 .equ	PIND	= 0x10
+                 .equ	SPDR	= 0x0f
+                 .equ	SPSR	= 0x0e
+                 .equ	SPCR	= 0x0d
+                 .equ	UDR0	= 0x0c
+                 .equ	UCSR0A	= 0x0b
+                 .equ	UCSR0B	= 0x0a
+                 .equ	UBRR0L	= 0x09
+                 .equ	ACSR	= 0x08
+                 .equ	ADMUX	= 0x07
+                 .equ	ADCSRA	= 0x06
+                 .equ	ADCH	= 0x05
+                 .equ	ADCL	= 0x04
+                 .equ	PORTE	= 0x03
+                 .equ	DDRE	= 0x02
+                 .equ	PINE	= 0x01
+                 .equ	PINF	= 0x00
+                 
+                 
+                 ; ***** BIT DEFINITIONS **************************************************
+                 
+                 ; ***** ANALOG_COMPARATOR ************
+                 ; SFIOR - Special Function IO Register
+                 .equ	ACME	= 3	; Analog Comparator Multiplexer Enable
+                 
+                 ; ACSR - Analog Comparator Control And Status Register
+                 .equ	ACIS0	= 0	; Analog Comparator Interrupt Mode Select bit 0
+                 .equ	ACIS1	= 1	; Analog Comparator Interrupt Mode Select bit 1
+                 .equ	ACIC	= 2	; Analog Comparator Input Capture Enable
+                 .equ	ACIE	= 3	; Analog Comparator Interrupt Enable
+                 .equ	ACI	= 4	; Analog Comparator Interrupt Flag
+                 .equ	ACO	= 5	; Analog Compare Output
+                 .equ	ACBG	= 6	; Analog Comparator Bandgap Select
+                 .equ	ACD	= 7	; Analog Comparator Disable
+                 
+                 
+                 ; ***** SPI **************************
+                 ; SPDR - SPI Data Register
+                 .equ	SPDR0	= 0	; SPI Data Register bit 0
+                 .equ	SPDR1	= 1	; SPI Data Register bit 1
+                 .equ	SPDR2	= 2	; SPI Data Register bit 2
+                 .equ	SPDR3	= 3	; SPI Data Register bit 3
+                 .equ	SPDR4	= 4	; SPI Data Register bit 4
+                 .equ	SPDR5	= 5	; SPI Data Register bit 5
+                 .equ	SPDR6	= 6	; SPI Data Register bit 6
+                 .equ	SPDR7	= 7	; SPI Data Register bit 7
+                 
+                 ; SPSR - SPI Status Register
+                 .equ	SPI2X	= 0	; Double SPI Speed Bit
+                 .equ	WCOL	= 6	; Write Collision Flag
+                 .equ	SPIF	= 7	; SPI Interrupt Flag
+                 
+                 ; SPCR - SPI Control Register
+                 .equ	SPR0	= 0	; SPI Clock Rate Select 0
+                 .equ	SPR1	= 1	; SPI Clock Rate Select 1
+                 .equ	CPHA	= 2	; Clock Phase
+                 .equ	CPOL	= 3	; Clock polarity
+                 .equ	MSTR	= 4	; Master/Slave Select
+                 .equ	DORD	= 5	; Data Order
+                 .equ	SPE	= 6	; SPI Enable
+                 .equ	SPIE	= 7	; SPI Interrupt Enable
+                 
+                 
+                 ; ***** TWI **************************
+                 ; TWBR - TWI Bit Rate register
+                 .equ	I2BR	= TWBR	; For compatibility
+                 .equ	TWBR0	= 0	; 
+                 .equ	TWBR1	= 1	; 
+                 .equ	TWBR2	= 2	; 
+                 .equ	TWBR3	= 3	; 
+                 .equ	TWBR4	= 4	; 
+                 .equ	TWBR5	= 5	; 
+                 .equ	TWBR6	= 6	; 
+                 .equ	TWBR7	= 7	; 
+                 
+                 ; TWCR - TWI Control Register
+                 .equ	I2CR	= TWCR	; For compatibility
+                 .equ	TWIE	= 0	; TWI Interrupt Enable
+                 .equ	I2IE	= TWIE	; For compatibility
+                 .equ	TWEN	= 2	; TWI Enable Bit
+                 .equ	I2EN	= TWEN	; For compatibility
+                 .equ	ENI2C	= TWEN	; For compatibility
+                 .equ	TWWC	= 3	; TWI Write Collition Flag
+                 .equ	I2WC	= TWWC	; For compatibility
+                 .equ	TWSTO	= 4	; TWI Stop Condition Bit
+                 .equ	I2STO	= TWSTO	; For compatibility
+                 .equ	TWSTA	= 5	; TWI Start Condition Bit
+                 .equ	I2STA	= TWSTA	; For compatibility
+                 .equ	TWEA	= 6	; TWI Enable Acknowledge Bit
+                 .equ	I2EA	= TWEA	; For compatibility
+                 .equ	TWINT	= 7	; TWI Interrupt Flag
+                 .equ	I2INT	= TWINT	; For compatibility
+                 
+                 ; TWSR - TWI Status Register
+                 .equ	I2SR	= TWSR	; For compatibility
+                 .equ	TWPS0	= 0	; TWI Prescaler
+                 .equ	TWS0	= TWPS0	; For compatibility
+                 .equ	I2GCE	= TWPS0	; For compatibility
+                 .equ	TWPS1	= 1	; TWI Prescaler
+                 .equ	TWS1	= TWPS1	; For compatibility
+                 .equ	TWS3	= 3	; TWI Status
+                 .equ	I2S3	= TWS3	; For compatibility
+                 .equ	TWS4	= 4	; TWI Status
+                 .equ	I2S4	= TWS4	; For compatibility
+                 .equ	TWS5	= 5	; TWI Status
+                 .equ	I2S5	= TWS5	; For compatibility
+                 .equ	TWS6	= 6	; TWI Status
+                 .equ	I2S6	= TWS6	; For compatibility
+                 .equ	TWS7	= 7	; TWI Status
+                 .equ	I2S7	= TWS7	; For compatibility
+                 
+                 ; TWDR - TWI Data register
+                 .equ	I2DR	= TWDR	; For compatibility
+                 .equ	TWD0	= 0	; TWI Data Register Bit 0
+                 .equ	TWD1	= 1	; TWI Data Register Bit 1
+                 .equ	TWD2	= 2	; TWI Data Register Bit 2
+                 .equ	TWD3	= 3	; TWI Data Register Bit 3
+                 .equ	TWD4	= 4	; TWI Data Register Bit 4
+                 .equ	TWD5	= 5	; TWI Data Register Bit 5
+                 .equ	TWD6	= 6	; TWI Data Register Bit 6
+                 .equ	TWD7	= 7	; TWI Data Register Bit 7
+                 
+                 ; TWAR - TWI (Slave) Address register
+                 .equ	I2AR	= TWAR	; For compatibility
+                 .equ	TWGCE	= 0	; TWI General Call Recognition Enable Bit
+                 .equ	TWA0	= 1	; TWI (Slave) Address register Bit 0
+                 .equ	TWA1	= 2	; TWI (Slave) Address register Bit 1
+                 .equ	TWA2	= 3	; TWI (Slave) Address register Bit 2
+                 .equ	TWA3	= 4	; TWI (Slave) Address register Bit 3
+                 .equ	TWA4	= 5	; TWI (Slave) Address register Bit 4
+                 .equ	TWA5	= 6	; TWI (Slave) Address register Bit 5
+                 .equ	TWA6	= 7	; TWI (Slave) Address register Bit 6
+                 
+                 
+                 ; ***** USART0 ***********************
+                 ; UDR0 - USART I/O Data Register
+                 .equ	UDR00	= 0	; USART I/O Data Register bit 0
+                 .equ	UDR01	= 1	; USART I/O Data Register bit 1
+                 .equ	UDR02	= 2	; USART I/O Data Register bit 2
+                 .equ	UDR03	= 3	; USART I/O Data Register bit 3
+                 .equ	UDR04	= 4	; USART I/O Data Register bit 4
+                 .equ	UDR05	= 5	; USART I/O Data Register bit 5
+                 .equ	UDR06	= 6	; USART I/O Data Register bit 6
+                 .equ	UDR07	= 7	; USART I/O Data Register bit 7
+                 
+                 ; UCSR0A - USART Control and Status Register A
+                 .equ	MPCM0	= 0	; Multi-processor Communication Mode
+                 .equ	U2X0	= 1	; Double the USART transmission speed
+                 .equ	UPE0	= 2	; Parity Error
+                 .equ	DOR0	= 3	; Data overRun
+                 .equ	FE0	= 4	; Framing Error
+                 .equ	UDRE0	= 5	; USART Data Register Empty
+                 .equ	TXC0	= 6	; USART Transmitt Complete
+                 .equ	RXC0	= 7	; USART Receive Complete
+                 
+                 ; UCSR0B - USART Control and Status Register B
+                 .equ	TXB80	= 0	; Transmit Data Bit 8
+                 .equ	RXB80	= 1	; Receive Data Bit 8
+                 .equ	UCSZ02	= 2	; Character Size
+                 .equ	UCSZ2	= UCSZ02	; For compatibility
+                 .equ	TXEN0	= 3	; Transmitter Enable
+                 .equ	RXEN0	= 4	; Receiver Enable
+                 .equ	UDRIE0	= 5	; USART Data register Empty Interrupt Enable
+                 .equ	TXCIE0	= 6	; TX Complete Interrupt Enable
+                 .equ	RXCIE0	= 7	; RX Complete Interrupt Enable
+                 
+                 ; UCSR0C - USART Control and Status Register C
+                 .equ	UCPOL0	= 0	; Clock Polarity
+                 .equ	UCSZ00	= 1	; Character Size
+                 .equ	UCSZ01	= 2	; Character Size
+                 .equ	USBS0	= 3	; Stop Bit Select
+                 .equ	UPM00	= 4	; Parity Mode Bit 0
+                 .equ	UPM01	= 5	; Parity Mode Bit 1
+                 .equ	UMSEL0	= 6	; USART Mode Select
+                 
+                 ; UBRR0H - USART Baud Rate Register Hight Byte
+                 .equ	UBRR8	= 0	; USART Baud Rate Register bit 8
+                 .equ	UBRR9	= 1	; USART Baud Rate Register bit 9
+                 .equ	UBRR10	= 2	; USART Baud Rate Register bit 10
+                 .equ	UBRR11	= 3	; USART Baud Rate Register bit 11
+                 
+                 ; UBRR0L - USART Baud Rate Register Low Byte
+                 .equ	UBRR0	= 0	; USART Baud Rate Register bit 0
+                 .equ	UBRR1	= 1	; USART Baud Rate Register bit 1
+                 .equ	UBRR2	= 2	; USART Baud Rate Register bit 2
+                 .equ	UBRR3	= 3	; USART Baud Rate Register bit 3
+                 .equ	UBRR4	= 4	; USART Baud Rate Register bit 4
+                 .equ	UBRR5	= 5	; USART Baud Rate Register bit 5
+                 .equ	UBRR6	= 6	; USART Baud Rate Register bit 6
+                 .equ	UBRR7	= 7	; USART Baud Rate Register bit 7
+                 
+                 
+                 ; ***** USART1 ***********************
+                 ; UDR1 - USART I/O Data Register
+                 .equ	UDR10	= 0	; USART I/O Data Register bit 0
+                 .equ	UDR11	= 1	; USART I/O Data Register bit 1
+                 .equ	UDR12	= 2	; USART I/O Data Register bit 2
+                 .equ	UDR13	= 3	; USART I/O Data Register bit 3
+                 .equ	UDR14	= 4	; USART I/O Data Register bit 4
+                 .equ	UDR15	= 5	; USART I/O Data Register bit 5
+                 .equ	UDR16	= 6	; USART I/O Data Register bit 6
+                 .equ	UDR17	= 7	; USART I/O Data Register bit 7
+                 
+                 ; UCSR1A - USART Control and Status Register A
+                 .equ	MPCM1	= 0	; Multi-processor Communication Mode
+                 .equ	U2X1	= 1	; Double the USART transmission speed
+                 .equ	UPE1	= 2	; Parity Error
+                 .equ	DOR1	= 3	; Data overRun
+                 .equ	FE1	= 4	; Framing Error
+                 .equ	UDRE1	= 5	; USART Data Register Empty
+                 .equ	TXC1	= 6	; USART Transmitt Complete
+                 .equ	RXC1	= 7	; USART Receive Complete
+                 
+                 ; UCSR1B - USART Control and Status Register B
+                 .equ	TXB81	= 0	; Transmit Data Bit 8
+                 .equ	RXB81	= 1	; Receive Data Bit 8
+                 .equ	UCSZ12	= 2	; Character Size
+                 .equ	TXEN1	= 3	; Transmitter Enable
+                 .equ	RXEN1	= 4	; Receiver Enable
+                 .equ	UDRIE1	= 5	; USART Data register Empty Interrupt Enable
+                 .equ	TXCIE1	= 6	; TX Complete Interrupt Enable
+                 .equ	RXCIE1	= 7	; RX Complete Interrupt Enable
+                 
+                 ; UCSR1C - USART Control and Status Register C
+                 .equ	UCPOL1	= 0	; Clock Polarity
+                 .equ	UCSZ10	= 1	; Character Size
+                 .equ	UCSZ11	= 2	; Character Size
+                 .equ	USBS1	= 3	; Stop Bit Select
+                 .equ	UPM10	= 4	; Parity Mode Bit 0
+                 .equ	UPM11	= 5	; Parity Mode Bit 1
+                 .equ	UMSEL1	= 6	; USART Mode Select
+                 
+                 ; UBRR1H - USART Baud Rate Register Hight Byte
+                 ;.equ	UBRR8	= 0	; USART Baud Rate Register bit 8
+                 ;.equ	UBRR9	= 1	; USART Baud Rate Register bit 9
+                 ;.equ	UBRR10	= 2	; USART Baud Rate Register bit 10
+                 ;.equ	UBRR11	= 3	; USART Baud Rate Register bit 11
+                 
+                 ; UBRR1L - USART Baud Rate Register Low Byte
+                 ;.equ	UBRR0	= 0	; USART Baud Rate Register bit 0
+                 ;.equ	UBRR1	= 1	; USART Baud Rate Register bit 1
+                 ;.equ	UBRR2	= 2	; USART Baud Rate Register bit 2
+                 ;.equ	UBRR3	= 3	; USART Baud Rate Register bit 3
+                 ;.equ	UBRR4	= 4	; USART Baud Rate Register bit 4
+                 ;.equ	UBRR5	= 5	; USART Baud Rate Register bit 5
+                 ;.equ	UBRR6	= 6	; USART Baud Rate Register bit 6
+                 ;.equ	UBRR7	= 7	; USART Baud Rate Register bit 7
+                 
+                 
+                 ; ***** CPU **************************
+                 ; SREG - Status Register
+                 .equ	SREG_C	= 0	; Carry Flag
+                 .equ	SREG_Z	= 1	; Zero Flag
+                 .equ	SREG_N	= 2	; Negative Flag
+                 .equ	SREG_V	= 3	; Two's Complement Overflow Flag
+                 .equ	SREG_S	= 4	; Sign Bit
+                 .equ	SREG_H	= 5	; Half Carry Flag
+                 .equ	SREG_T	= 6	; Bit Copy Storage
+                 .equ	SREG_I	= 7	; Global Interrupt Enable
+                 
+                 ; MCUCR - MCU Control Register
+                 .equ	IVCE	= 0	; Interrupt Vector Change Enable
+                 .equ	IVSEL	= 1	; Interrupt Vector Select
+                 .equ	SM2	= 2	; Sleep Mode Select
+                 .equ	SM0	= 3	; Sleep Mode Select
+                 .equ	SM1	= 4	; Sleep Mode Select
+                 .equ	SE	= 5	; Sleep Enable
+                 .equ	SRW10	= 6	; External SRAM Wait State Select
+                 .equ	SRE	= 7	; External SRAM Enable
+                 
+                 ; XMCRA - External Memory Control Register A
+                 .equ	SRW11	= 1	; Wait state select bit upper page
+                 .equ	SRW00	= 2	; Wait state select bit lower page
+                 .equ	SRW01	= 3	; Wait state select bit lower page
+                 .equ	SRL0	= 4	; Wait state page limit
+                 .equ	SRL1	= 5	; Wait state page limit
+                 .equ	SRL2	= 6	; Wait state page limit
+                 
+                 ; XMCRB - External Memory Control Register B
+                 .equ	XMM0	= 0	; External Memory High Mask
+                 .equ	XMM1	= 1	; External Memory High Mask
+                 .equ	XMM2	= 2	; External Memory High Mask
+                 .equ	XMBK	= 7	; External Memory Bus Keeper Enable
+                 
+                 ; OSCCAL - Oscillator Calibration Value
+                 .equ	CAL0	= 0	; Oscillator Calibration Value
+                 .equ	CAL1	= 1	; Oscillator Calibration Value
+                 .equ	CAL2	= 2	; Oscillator Calibration Value
+                 .equ	CAL3	= 3	; Oscillator Calibration Value
+                 .equ	CAL4	= 4	; Oscillator Calibration Value
+                 .equ	CAL5	= 5	; Oscillator Calibration Value
+                 .equ	CAL6	= 6	; Oscillator Calibration Value
+                 .equ	CAL7	= 7	; Oscillator Calibration Value
+                 
+                 ; XDIV - XTAL Divide Control Register
+                 .equ	XDIV0	= 0	; XTAl Divide Select Bit 0
+                 .equ	XDIV1	= 1	; XTAl Divide Select Bit 1
+                 .equ	XDIV2	= 2	; XTAl Divide Select Bit 2
+                 .equ	XDIV3	= 3	; XTAl Divide Select Bit 3
+                 .equ	XDIV4	= 4	; XTAl Divide Select Bit 4
+                 .equ	XDIV5	= 5	; XTAl Divide Select Bit 5
+                 .equ	XDIV6	= 6	; XTAl Divide Select Bit 6
+                 .equ	XDIVEN	= 7	; XTAL Divide Enable
+                 
+                 ; MCUCSR - MCU Control And Status Register
+                 .equ	PORF	= 0	; Power-on reset flag
+                 .equ	EXTRF	= 1	; External Reset Flag
+                 .equ	BORF	= 2	; Brown-out Reset Flag
+                 .equ	WDRF	= 3	; Watchdog Reset Flag
+                 .equ	JTRF	= 4	; JTAG Reset Flag
+                 .equ	JTD	= 7	; JTAG Interface Disable
+                 
+                 ; RAMPZ - RAM Page Z Select Register
+                 .equ	RAMPZ0	= 0	; RAM Page Z Select Register Bit 0
+                 
+                 
+                 ; ***** BOOT_LOAD ********************
+                 ; SPMCSR - Store Program Memory Control Register
+                 .equ	SPMCR	= SPMCSR	; For compatibility
+                 .equ	SPMEN	= 0	; Store Program Memory Enable
+                 .equ	PGERS	= 1	; Page Erase
+                 .equ	PGWRT	= 2	; Page Write
+                 .equ	BLBSET	= 3	; Boot Lock Bit Set
+                 .equ	RWWSRE	= 4	; Read While Write section read enable
+                 .equ	ASRE	= RWWSRE	; For compatibility
+                 .equ	RWWSB	= 6	; Read While Write Section Busy
+                 .equ	ASB	= RWWSB	; For compatibility
+                 .equ	SPMIE	= 7	; SPM Interrupt Enable
+                 
+                 
+                 ; ***** JTAG *************************
+                 ; OCDR - On-Chip Debug Related Register in I/O Memory
+                 .equ	OCDR0	= 0	; On-Chip Debug Register Bit 0
+                 .equ	OCDR1	= 1	; On-Chip Debug Register Bit 1
+                 .equ	OCDR2	= 2	; On-Chip Debug Register Bit 2
+                 .equ	OCDR3	= 3	; On-Chip Debug Register Bit 3
+                 .equ	OCDR4	= 4	; On-Chip Debug Register Bit 4
+                 .equ	OCDR5	= 5	; On-Chip Debug Register Bit 5
+                 .equ	OCDR6	= 6	; On-Chip Debug Register Bit 6
+                 .equ	OCDR7	= 7	; On-Chip Debug Register Bit 7
+                 .equ	IDRD	= OCDR7	; For compatibility
+                 
+                 ; MCUCSR - MCU Control And Status Register
+                 ;.equ	JTRF	= 4	; JTAG Reset Flag
+                 ;.equ	JTD	= 7	; JTAG Interface Disable
+                 
+                 
+                 ; ***** MISC *************************
+                 ; SFIOR - Special Function IO Register
+                 .equ	PSR321	= 0	; Prescaler Reset Timer/Counter3, Timer/Counter2, and Timer/Counter1
+                 .equ	PSR1	= PSR321	; For compatibility
+                 .equ	PSR2	= PSR321	; For compatibility
+                 .equ	PSR3	= PSR321	; For compatibility
+                 .equ	PSR0	= 1	; Prescaler Reset Timer/Counter0
+                 .equ	PUD	= 2	; Pull Up Disable
+                 ;.equ	ACME	= 3	; Analog Comparator Multiplexer Enable
+                 .equ	TSM	= 7	; Timer/Counter Synchronization Mode
+                 
+                 
+                 ; ***** EXTERNAL_INTERRUPT ***********
+                 ; EICRA - External Interrupt Control Register A
+                 .equ	ISC00	= 0	; External Interrupt Sense Control Bit
+                 .equ	ISC01	= 1	; External Interrupt Sense Control Bit
+                 .equ	ISC10	= 2	; External Interrupt Sense Control Bit
+                 .equ	ISC11	= 3	; External Interrupt Sense Control Bit
+                 .equ	ISC20	= 4	; External Interrupt Sense Control Bit
+                 .equ	ISC21	= 5	; External Interrupt Sense Control Bit
+                 .equ	ISC30	= 6	; External Interrupt Sense Control Bit
+                 .equ	ISC31	= 7	; External Interrupt Sense Control Bit
+                 
+                 ; EICRB - External Interrupt Control Register B
+                 .equ	ISC40	= 0	; External Interrupt 7-4 Sense Control Bit
+                 .equ	ISC41	= 1	; External Interrupt 7-4 Sense Control Bit
+                 .equ	ISC50	= 2	; External Interrupt 7-4 Sense Control Bit
+                 .equ	ISC51	= 3	; External Interrupt 7-4 Sense Control Bit
+                 .equ	ISC60	= 4	; External Interrupt 7-4 Sense Control Bit
+                 .equ	ISC61	= 5	; External Interrupt 7-4 Sense Control Bit
+                 .equ	ISC70	= 6	; External Interrupt 7-4 Sense Control Bit
+                 .equ	ISC71	= 7	; External Interrupt 7-4 Sense Control Bit
+                 
+                 ; EIMSK - External Interrupt Mask Register
+                 .equ	GICR	= EIMSK	; For compatibility
+                 .equ	GIMSK	= EIMSK	; For compatibility
+                 .equ	INT0	= 0	; External Interrupt Request 0 Enable
+                 .equ	INT1	= 1	; External Interrupt Request 1 Enable
+                 .equ	INT2	= 2	; External Interrupt Request 2 Enable
+                 .equ	INT3	= 3	; External Interrupt Request 3 Enable
+                 .equ	INT4	= 4	; External Interrupt Request 4 Enable
+                 .equ	INT5	= 5	; External Interrupt Request 5 Enable
+                 .equ	INT6	= 6	; External Interrupt Request 6 Enable
+                 .equ	INT7	= 7	; External Interrupt Request 7 Enable
+                 
+                 ; EIFR - External Interrupt Flag Register
+                 .equ	GIFR	= EIFR	; For compatibility
+                 .equ	INTF0	= 0	; External Interrupt Flag 0
+                 .equ	INTF1	= 1	; External Interrupt Flag 1
+                 .equ	INTF2	= 2	; External Interrupt Flag 2
+                 .equ	INTF3	= 3	; External Interrupt Flag 3
+                 .equ	INTF4	= 4	; External Interrupt Flag 4
+                 .equ	INTF5	= 5	; External Interrupt Flag 5
+                 .equ	INTF6	= 6	; External Interrupt Flag 6
+                 .equ	INTF7	= 7	; External Interrupt Flag 7
+                 
+                 
+                 ; ***** EEPROM ***********************
+                 ; EEDR - EEPROM Data Register
+                 .equ	EEDR0	= 0	; EEPROM Data Register bit 0
+                 .equ	EEDR1	= 1	; EEPROM Data Register bit 1
+                 .equ	EEDR2	= 2	; EEPROM Data Register bit 2
+                 .equ	EEDR3	= 3	; EEPROM Data Register bit 3
+                 .equ	EEDR4	= 4	; EEPROM Data Register bit 4
+                 .equ	EEDR5	= 5	; EEPROM Data Register bit 5
+                 .equ	EEDR6	= 6	; EEPROM Data Register bit 6
+                 .equ	EEDR7	= 7	; EEPROM Data Register bit 7
+                 
+                 ; EECR - EEPROM Control Register
+                 .equ	EERE	= 0	; EEPROM Read Enable
+                 .equ	EEWE	= 1	; EEPROM Write Enable
+                 .equ	EEMWE	= 2	; EEPROM Master Write Enable
+                 .equ	EERIE	= 3	; EEPROM Ready Interrupt Enable
+                 
+                 
+                 ; ***** PORTA ************************
+                 ; PORTA - Port A Data Register
+                 .equ	PORTA0	= 0	; Port A Data Register bit 0
+                 .equ	PA0	= 0	; For compatibility
+                 .equ	PORTA1	= 1	; Port A Data Register bit 1
+                 .equ	PA1	= 1	; For compatibility
+                 .equ	PORTA2	= 2	; Port A Data Register bit 2
+                 .equ	PA2	= 2	; For compatibility
+                 .equ	PORTA3	= 3	; Port A Data Register bit 3
+                 .equ	PA3	= 3	; For compatibility
+                 .equ	PORTA4	= 4	; Port A Data Register bit 4
+                 .equ	PA4	= 4	; For compatibility
+                 .equ	PORTA5	= 5	; Port A Data Register bit 5
+                 .equ	PA5	= 5	; For compatibility
+                 .equ	PORTA6	= 6	; Port A Data Register bit 6
+                 .equ	PA6	= 6	; For compatibility
+                 .equ	PORTA7	= 7	; Port A Data Register bit 7
+                 .equ	PA7	= 7	; For compatibility
+                 
+                 ; DDRA - Port A Data Direction Register
+                 .equ	DDA0	= 0	; Data Direction Register, Port A, bit 0
+                 .equ	DDA1	= 1	; Data Direction Register, Port A, bit 1
+                 .equ	DDA2	= 2	; Data Direction Register, Port A, bit 2
+                 .equ	DDA3	= 3	; Data Direction Register, Port A, bit 3
+                 .equ	DDA4	= 4	; Data Direction Register, Port A, bit 4
+                 .equ	DDA5	= 5	; Data Direction Register, Port A, bit 5
+                 .equ	DDA6	= 6	; Data Direction Register, Port A, bit 6
+                 .equ	DDA7	= 7	; Data Direction Register, Port A, bit 7
+                 
+                 ; PINA - Port A Input Pins
+                 .equ	PINA0	= 0	; Input Pins, Port A bit 0
+                 .equ	PINA1	= 1	; Input Pins, Port A bit 1
+                 .equ	PINA2	= 2	; Input Pins, Port A bit 2
+                 .equ	PINA3	= 3	; Input Pins, Port A bit 3
+                 .equ	PINA4	= 4	; Input Pins, Port A bit 4
+                 .equ	PINA5	= 5	; Input Pins, Port A bit 5
+                 .equ	PINA6	= 6	; Input Pins, Port A bit 6
+                 .equ	PINA7	= 7	; Input Pins, Port A bit 7
+                 
+                 
+                 ; ***** PORTB ************************
+                 ; PORTB - Port B Data Register
+                 .equ	PORTB0	= 0	; Port B Data Register bit 0
+                 .equ	PB0	= 0	; For compatibility
+                 .equ	PORTB1	= 1	; Port B Data Register bit 1
+                 .equ	PB1	= 1	; For compatibility
+                 .equ	PORTB2	= 2	; Port B Data Register bit 2
+                 .equ	PB2	= 2	; For compatibility
+                 .equ	PORTB3	= 3	; Port B Data Register bit 3
+                 .equ	PB3	= 3	; For compatibility
+                 .equ	PORTB4	= 4	; Port B Data Register bit 4
+                 .equ	PB4	= 4	; For compatibility
+                 .equ	PORTB5	= 5	; Port B Data Register bit 5
+                 .equ	PB5	= 5	; For compatibility
+                 .equ	PORTB6	= 6	; Port B Data Register bit 6
+                 .equ	PB6	= 6	; For compatibility
+                 .equ	PORTB7	= 7	; Port B Data Register bit 7
+                 .equ	PB7	= 7	; For compatibility
+                 
+                 ; DDRB - Port B Data Direction Register
+                 .equ	DDB0	= 0	; Port B Data Direction Register bit 0
+                 .equ	DDB1	= 1	; Port B Data Direction Register bit 1
+                 .equ	DDB2	= 2	; Port B Data Direction Register bit 2
+                 .equ	DDB3	= 3	; Port B Data Direction Register bit 3
+                 .equ	DDB4	= 4	; Port B Data Direction Register bit 4
+                 .equ	DDB5	= 5	; Port B Data Direction Register bit 5
+                 .equ	DDB6	= 6	; Port B Data Direction Register bit 6
+                 .equ	DDB7	= 7	; Port B Data Direction Register bit 7
+                 
+                 ; PINB - Port B Input Pins
+                 .equ	PINB0	= 0	; Port B Input Pins bit 0
+                 .equ	PINB1	= 1	; Port B Input Pins bit 1
+                 .equ	PINB2	= 2	; Port B Input Pins bit 2
+                 .equ	PINB3	= 3	; Port B Input Pins bit 3
+                 .equ	PINB4	= 4	; Port B Input Pins bit 4
+                 .equ	PINB5	= 5	; Port B Input Pins bit 5
+                 .equ	PINB6	= 6	; Port B Input Pins bit 6
+                 .equ	PINB7	= 7	; Port B Input Pins bit 7
+                 
+                 
+                 ; ***** PORTC ************************
+                 ; PORTC - Port C Data Register
+                 .equ	PORTC0	= 0	; Port C Data Register bit 0
+                 .equ	PC0	= 0	; For compatibility
+                 .equ	PORTC1	= 1	; Port C Data Register bit 1
+                 .equ	PC1	= 1	; For compatibility
+                 .equ	PORTC2	= 2	; Port C Data Register bit 2
+                 .equ	PC2	= 2	; For compatibility
+                 .equ	PORTC3	= 3	; Port C Data Register bit 3
+                 .equ	PC3	= 3	; For compatibility
+                 .equ	PORTC4	= 4	; Port C Data Register bit 4
+                 .equ	PC4	= 4	; For compatibility
+                 .equ	PORTC5	= 5	; Port C Data Register bit 5
+                 .equ	PC5	= 5	; For compatibility
+                 .equ	PORTC6	= 6	; Port C Data Register bit 6
+                 .equ	PC6	= 6	; For compatibility
+                 .equ	PORTC7	= 7	; Port C Data Register bit 7
+                 .equ	PC7	= 7	; For compatibility
+                 
+                 ; DDRC - Port C Data Direction Register
+                 .equ	DDC0	= 0	; Port C Data Direction Register bit 0
+                 .equ	DDC1	= 1	; Port C Data Direction Register bit 1
+                 .equ	DDC2	= 2	; Port C Data Direction Register bit 2
+                 .equ	DDC3	= 3	; Port C Data Direction Register bit 3
+                 .equ	DDC4	= 4	; Port C Data Direction Register bit 4
+                 .equ	DDC5	= 5	; Port C Data Direction Register bit 5
+                 .equ	DDC6	= 6	; Port C Data Direction Register bit 6
+                 .equ	DDC7	= 7	; Port C Data Direction Register bit 7
+                 
+                 ; PINC - Port C Input Pins
+                 .equ	PINC0	= 0	; Port C Input Pins bit 0
+                 .equ	PINC1	= 1	; Port C Input Pins bit 1
+                 .equ	PINC2	= 2	; Port C Input Pins bit 2
+                 .equ	PINC3	= 3	; Port C Input Pins bit 3
+                 .equ	PINC4	= 4	; Port C Input Pins bit 4
+                 .equ	PINC5	= 5	; Port C Input Pins bit 5
+                 .equ	PINC6	= 6	; Port C Input Pins bit 6
+                 .equ	PINC7	= 7	; Port C Input Pins bit 7
+                 
+                 
+                 ; ***** PORTD ************************
+                 ; PORTD - Port D Data Register
+                 .equ	PORTD0	= 0	; Port D Data Register bit 0
+                 .equ	PD0	= 0	; For compatibility
+                 .equ	PORTD1	= 1	; Port D Data Register bit 1
+                 .equ	PD1	= 1	; For compatibility
+                 .equ	PORTD2	= 2	; Port D Data Register bit 2
+                 .equ	PD2	= 2	; For compatibility
+                 .equ	PORTD3	= 3	; Port D Data Register bit 3
+                 .equ	PD3	= 3	; For compatibility
+                 .equ	PORTD4	= 4	; Port D Data Register bit 4
+                 .equ	PD4	= 4	; For compatibility
+                 .equ	PORTD5	= 5	; Port D Data Register bit 5
+                 .equ	PD5	= 5	; For compatibility
+                 .equ	PORTD6	= 6	; Port D Data Register bit 6
+                 .equ	PD6	= 6	; For compatibility
+                 .equ	PORTD7	= 7	; Port D Data Register bit 7
+                 .equ	PD7	= 7	; For compatibility
+                 
+                 ; DDRD - Port D Data Direction Register
+                 .equ	DDD0	= 0	; Port D Data Direction Register bit 0
+                 .equ	DDD1	= 1	; Port D Data Direction Register bit 1
+                 .equ	DDD2	= 2	; Port D Data Direction Register bit 2
+                 .equ	DDD3	= 3	; Port D Data Direction Register bit 3
+                 .equ	DDD4	= 4	; Port D Data Direction Register bit 4
+                 .equ	DDD5	= 5	; Port D Data Direction Register bit 5
+                 .equ	DDD6	= 6	; Port D Data Direction Register bit 6
+                 .equ	DDD7	= 7	; Port D Data Direction Register bit 7
+                 
+                 ; PIND - Port D Input Pins
+                 .equ	PIND0	= 0	; Port D Input Pins bit 0
+                 .equ	PIND1	= 1	; Port D Input Pins bit 1
+                 .equ	PIND2	= 2	; Port D Input Pins bit 2
+                 .equ	PIND3	= 3	; Port D Input Pins bit 3
+                 .equ	PIND4	= 4	; Port D Input Pins bit 4
+                 .equ	PIND5	= 5	; Port D Input Pins bit 5
+                 .equ	PIND6	= 6	; Port D Input Pins bit 6
+                 .equ	PIND7	= 7	; Port D Input Pins bit 7
+                 
+                 
+                 ; ***** PORTE ************************
+                 ; PORTE - Data Register, Port E
+                 .equ	PORTE0	= 0	; 
+                 .equ	PE0	= 0	; For compatibility
+                 .equ	PORTE1	= 1	; 
+                 .equ	PE1	= 1	; For compatibility
+                 .equ	PORTE2	= 2	; 
+                 .equ	PE2	= 2	; For compatibility
+                 .equ	PORTE3	= 3	; 
+                 .equ	PE3	= 3	; For compatibility
+                 .equ	PORTE4	= 4	; 
+                 .equ	PE4	= 4	; For compatibility
+                 .equ	PORTE5	= 5	; 
+                 .equ	PE5	= 5	; For compatibility
+                 .equ	PORTE6	= 6	; 
+                 .equ	PE6	= 6	; For compatibility
+                 .equ	PORTE7	= 7	; 
+                 .equ	PE7	= 7	; For compatibility
+                 
+                 ; DDRE - Data Direction Register, Port E
+                 .equ	DDE0	= 0	; 
+                 .equ	DDE1	= 1	; 
+                 .equ	DDE2	= 2	; 
+                 .equ	DDE3	= 3	; 
+                 .equ	DDE4	= 4	; 
+                 .equ	DDE5	= 5	; 
+                 .equ	DDE6	= 6	; 
+                 .equ	DDE7	= 7	; 
+                 
+                 ; PINE - Input Pins, Port E
+                 .equ	PINE0	= 0	; 
+                 .equ	PINE1	= 1	; 
+                 .equ	PINE2	= 2	; 
+                 .equ	PINE3	= 3	; 
+                 .equ	PINE4	= 4	; 
+                 .equ	PINE5	= 5	; 
+                 .equ	PINE6	= 6	; 
+                 .equ	PINE7	= 7	; 
+                 
+                 
+                 ; ***** PORTF ************************
+                 ; PORTF - Data Register, Port F
+                 .equ	PORTF0	= 0	; 
+                 .equ	PF0	= 0	; For compatibility
+                 .equ	PORTF1	= 1	; 
+                 .equ	PF1	= 1	; For compatibility
+                 .equ	PORTF2	= 2	; 
+                 .equ	PF2	= 2	; For compatibility
+                 .equ	PORTF3	= 3	; 
+                 .equ	PF3	= 3	; For compatibility
+                 .equ	PORTF4	= 4	; 
+                 .equ	PF4	= 4	; For compatibility
+                 .equ	PORTF5	= 5	; 
+                 .equ	PF5	= 5	; For compatibility
+                 .equ	PORTF6	= 6	; 
+                 .equ	PF6	= 6	; For compatibility
+                 .equ	PORTF7	= 7	; 
+                 .equ	PF7	= 7	; For compatibility
+                 
+                 ; DDRF - Data Direction Register, Port F
+                 .equ	DDF0	= 0	; 
+                 .equ	DDF1	= 1	; 
+                 .equ	DDF2	= 2	; 
+                 .equ	DDF3	= 3	; 
+                 .equ	DDF4	= 4	; 
+                 .equ	DDF5	= 5	; 
+                 .equ	DDF6	= 6	; 
+                 .equ	DDF7	= 7	; 
+                 
+                 ; PINF - Input Pins, Port F
+                 .equ	PINF0	= 0	; 
+                 .equ	PINF1	= 1	; 
+                 .equ	PINF2	= 2	; 
+                 .equ	PINF3	= 3	; 
+                 .equ	PINF4	= 4	; 
+                 .equ	PINF5	= 5	; 
+                 .equ	PINF6	= 6	; 
+                 .equ	PINF7	= 7	; 
+                 
+                 
+                 ; ***** PORTG ************************
+                 ; PORTG - Data Register, Port G
+                 .equ	PORTG0	= 0	; 
+                 .equ	PG0	= 0	; For compatibility
+                 .equ	PORTG1	= 1	; 
+                 .equ	PG1	= 1	; For compatibility
+                 .equ	PORTG2	= 2	; 
+                 .equ	PG2	= 2	; For compatibility
+                 .equ	PORTG3	= 3	; 
+                 .equ	PG3	= 3	; For compatibility
+                 .equ	PORTG4	= 4	; 
+                 .equ	PG4	= 4	; For compatibility
+                 
+                 ; DDRG - Data Direction Register, Port G
+                 .equ	DDG0	= 0	; 
+                 .equ	DDG1	= 1	; 
+                 .equ	DDG2	= 2	; 
+                 .equ	DDG3	= 3	; 
+                 .equ	DDG4	= 4	; 
+                 
+                 ; PING - Input Pins, Port G
+                 .equ	PING0	= 0	; 
+                 .equ	PING1	= 1	; 
+                 .equ	PING2	= 2	; 
+                 .equ	PING3	= 3	; 
+                 .equ	PING4	= 4	; 
+                 
+                 
+                 ; ***** TIMER_COUNTER_0 **************
+                 ; TCCR0 - Timer/Counter Control Register
+                 .equ	CS00	= 0	; Clock Select 0
+                 .equ	CS01	= 1	; Clock Select 1
+                 .equ	CS02	= 2	; Clock Select 2
+                 .equ	WGM01	= 3	; Waveform Generation Mode 1
+                 .equ	CTC0	= WGM01	; For compatibility
+                 .equ	COM00	= 4	; Compare match Output Mode 0
+                 .equ	COM01	= 5	; Compare Match Output Mode 1
+                 .equ	WGM00	= 6	; Waveform Generation Mode 0
+                 .equ	PWM0	= WGM00	; For compatibility
+                 .equ	FOC0	= 7	; Force Output Compare
+                 
+                 ; TCNT0 - Timer/Counter Register
+                 .equ	TCNT0_0	= 0	; 
+                 .equ	TCNT0_1	= 1	; 
+                 .equ	TCNT0_2	= 2	; 
+                 .equ	TCNT0_3	= 3	; 
+                 .equ	TCNT0_4	= 4	; 
+                 .equ	TCNT0_5	= 5	; 
+                 .equ	TCNT0_6	= 6	; 
+                 .equ	TCNT0_7	= 7	; 
+                 
+                 ; OCR0 - Output Compare Register
+                 .equ	OCR0_0	= 0	; 
+                 .equ	OCR0_1	= 1	; 
+                 .equ	OCR0_2	= 2	; 
+                 .equ	OCR0_3	= 3	; 
+                 .equ	OCR0_4	= 4	; 
+                 .equ	OCR0_5	= 5	; 
+                 .equ	OCR0_6	= 6	; 
+                 .equ	OCR0_7	= 7	; 
+                 
+                 ; ASSR - Asynchronus Status Register
+                 .equ	TCR0UB	= 0	; Timer/Counter Control Register 0 Update Busy
+                 .equ	OCR0UB	= 1	; Output Compare register 0 Busy
+                 .equ	TCN0UB	= 2	; Timer/Counter0 Update Busy
+                 .equ	AS0	= 3	; Asynchronus Timer/Counter 0
+                 
+                 ; TIMSK - Timer/Counter Interrupt Mask Register
+                 .equ	TOIE0	= 0	; Timer/Counter0 Overflow Interrupt Enable
+                 .equ	OCIE0	= 1	; Timer/Counter0 Output Compare Match Interrupt register
+                 
+                 ; TIFR - Timer/Counter Interrupt Flag register
+                 .equ	TOV0	= 0	; Timer/Counter0 Overflow Flag
+                 .equ	OCF0	= 1	; Output Compare Flag 0
+                 
+                 ; SFIOR - Special Function IO Register
+                 ;.equ	PSR0	= 1	; Prescaler Reset Timer/Counter0
+                 ;.equ	TSM	= 7	; Timer/Counter Synchronization Mode
+                 
+                 
+                 ; ***** TIMER_COUNTER_1 **************
+                 ; TIMSK - Timer/Counter Interrupt Mask Register
+                 .equ	TOIE1	= 2	; Timer/Counter1 Overflow Interrupt Enable
+                 .equ	OCIE1B	= 3	; Timer/Counter1 Output CompareB Match Interrupt Enable
+                 .equ	OCIE1A	= 4	; Timer/Counter1 Output CompareA Match Interrupt Enable
+                 .equ	TICIE1	= 5	; Timer/Counter1 Input Capture Interrupt Enable
+                 
+                 ; ETIMSK - Extended Timer/Counter Interrupt Mask Register
+                 .equ	OCIE1C	= 0	; Timer/Counter 1, Output Compare Match C Interrupt Enable
+                 
+                 ; TIFR - Timer/Counter Interrupt Flag register
+                 .equ	TOV1	= 2	; Timer/Counter1 Overflow Flag
+                 .equ	OCF1B	= 3	; Output Compare Flag 1B
+                 .equ	OCF1A	= 4	; Output Compare Flag 1A
+                 .equ	ICF1	= 5	; Input Capture Flag 1
+                 
+                 ; ETIFR - Extended Timer/Counter Interrupt Flag register
+                 .equ	OCF1C	= 0	; Timer/Counter 1, Output Compare C Match Flag
+                 
+                 ; SFIOR - Special Function IO Register
+                 ;.equ	PSR321	= 0	; Prescaler Reset, T/C3, T/C2, T/C1
+                 ;.equ	TSM	= 7	; Timer/Counter Synchronization Mode
+                 
+                 ; TCCR1A - Timer/Counter1 Control Register A
+                 .equ	WGM10	= 0	; Waveform Generation Mode Bit 0
+                 .equ	PWM10	= WGM10	; For compatibility
+                 .equ	WGM11	= 1	; Waveform Generation Mode Bit 1
+                 .equ	PWM11	= WGM11	; For compatibility
+                 .equ	COM1C0	= 2	; Compare Output Mode 1C, bit 0
+                 .equ	COM1C1	= 3	; Compare Output Mode 1C, bit 1
+                 .equ	COM1B0	= 4	; Compare Output Mode 1B, bit 0
+                 .equ	COM1B1	= 5	; Compare Output Mode 1B, bit 1
+                 .equ	COM1A0	= 6	; Compare Ouput Mode 1A, bit 0
+                 .equ	COM1A1	= 7	; Compare Output Mode 1A, bit 1
+                 
+                 ; TCCR1B - Timer/Counter1 Control Register B
+                 .equ	CS10	= 0	; Clock Select bit 0
+                 .equ	CS11	= 1	; Clock Select 1 bit 1
+                 .equ	CS12	= 2	; Clock Select1 bit 2
+                 .equ	WGM12	= 3	; Waveform Generation Mode
+                 .equ	CTC10	= WGM12	; For compatibility
+                 .equ	WGM13	= 4	; Waveform Generation Mode
+                 .equ	CTC11	= WGM13	; For compatibility
+                 .equ	ICES1	= 6	; Input Capture 1 Edge Select
+                 .equ	ICNC1	= 7	; Input Capture 1 Noise Canceler
+                 
+                 ; TCCR1C - Timer/Counter1 Control Register C
+                 .equ	FOC1C	= 5	; Force Output Compare for channel C
+                 .equ	FOC1B	= 6	; Force Output Compare for channel B
+                 .equ	FOC1A	= 7	; Force Output Compare for channel A
+                 
+                 
+                 ; ***** TIMER_COUNTER_2 **************
+                 ; TCCR2 - Timer/Counter Control Register
+                 .equ	CS20	= 0	; Clock Select
+                 .equ	CS21	= 1	; Clock Select
+                 .equ	CS22	= 2	; Clock Select
+                 .equ	WGM21	= 3	; Waveform Generation Mode
+                 .equ	CTC2	= WGM21	; For compatibility
+                 .equ	COM20	= 4	; Compare Match Output Mode
+                 .equ	COM21	= 5	; Compare Match Output Mode
+                 .equ	WGM20	= 6	; Wafeform Generation Mode
+                 .equ	PWM2	= WGM20	; For compatibility
+                 .equ	FOC2	= 7	; Force Output Compare
+                 
+                 ; TCNT2 - Timer/Counter Register
+                 .equ	TCNT2_0	= 0	; Timer/Counter Register Bit 0
+                 .equ	TCNT2_1	= 1	; Timer/Counter Register Bit 1
+                 .equ	TCNT2_2	= 2	; Timer/Counter Register Bit 2
+                 .equ	TCNT2_3	= 3	; Timer/Counter Register Bit 3
+                 .equ	TCNT2_4	= 4	; Timer/Counter Register Bit 4
+                 .equ	TCNT2_5	= 5	; Timer/Counter Register Bit 5
+                 .equ	TCNT2_6	= 6	; Timer/Counter Register Bit 6
+                 .equ	TCNT2_7	= 7	; Timer/Counter Register Bit 7
+                 
+                 ; OCR2 - Output Compare Register
+                 .equ	OCR2_0	= 0	; Output Compare Register Bit 0
+                 .equ	OCR2_1	= 1	; Output Compare Register Bit 1
+                 .equ	OCR2_2	= 2	; Output Compare Register Bit 2
+                 .equ	OCR2_3	= 3	; Output Compare Register Bit 3
+                 .equ	OCR2_4	= 4	; Output Compare Register Bit 4
+                 .equ	OCR2_5	= 5	; Output Compare Register Bit 5
+                 .equ	OCR2_6	= 6	; Output Compare Register Bit 6
+                 .equ	OCR2_7	= 7	; Output Compare Register Bit 7
+                 
+                 ; TIMSK - 
+                 .equ	TOIE2	= 6	; 
+                 .equ	OCIE2	= 7	; 
+                 
+                 ; TIFR - Timer/Counter Interrupt Flag Register
+                 .equ	TOV2	= 6	; Timer/Counter2 Overflow Flag
+                 .equ	OCF2	= 7	; Output Compare Flag 2
+                 
+                 
+                 ; ***** TIMER_COUNTER_3 **************
+                 ; ETIMSK - Extended Timer/Counter Interrupt Mask Register
+                 .equ	OCIE3C	= 1	; Timer/Counter3, Output Compare Match Interrupt Enable
+                 .equ	TOIE3	= 2	; Timer/Counter3 Overflow Interrupt Enable
+                 .equ	OCIE3B	= 3	; Timer/Counter3 Output CompareB Match Interrupt Enable
+                 .equ	OCIE3A	= 4	; Timer/Counter3 Output CompareA Match Interrupt Enable
+                 .equ	TICIE3	= 5	; Timer/Counter3 Input Capture Interrupt Enable
+                 
+                 ; ETIFR - Extended Timer/Counter Interrupt Flag register
+                 .equ	OCF3C	= 1	; Timer/Counter3 Output Compare C Match Flag
+                 .equ	TOV3	= 2	; Timer/Counter3 Overflow Flag
+                 .equ	OCF3B	= 3	; Output Compare Flag 1B
+                 .equ	OCF3A	= 4	; Output Compare Flag 1A
+                 .equ	ICF3	= 5	; Input Capture Flag 1
+                 
+                 ; SFIOR - Special Function IO Register
+                 ;.equ	PSR321	= 0	; Prescaler Reset, T/C3, T/C2, T/C1
+                 ;.equ	PSR1	= PSR321	; For compatibility
+                 ;.equ	PSR2	= PSR321	; For compatibility
+                 ;.equ	TSM	= 7	; Timer/Counter Synchronization Mode
+                 
+                 ; TCCR3A - Timer/Counter3 Control Register A
+                 .equ	WGM30	= 0	; Waveform Generation Mode Bit 0
+                 .equ	PWM30	= WGM30	; For compatibility
+                 .equ	WGM31	= 1	; Waveform Generation Mode Bit 1
+                 .equ	PWM31	= WGM31	; For compatibility
+                 .equ	COM3C0	= 2	; Compare Output Mode 3C, bit 0
+                 .equ	COM3C1	= 3	; Compare Output Mode 3C, bit 1
+                 .equ	COM3B0	= 4	; Compare Output Mode 3B, bit 0
+                 .equ	COM3B1	= 5	; Compare Output Mode 3B, bit 1
+                 .equ	COM3A0	= 6	; Comparet Ouput Mode 3A, bit 0
+                 .equ	COM3A1	= 7	; Compare Output Mode 3A, bit 1
+                 
+                 ; TCCR3B - Timer/Counter3 Control Register B
+                 .equ	CS30	= 0	; Clock Select 3 bit 0
+                 .equ	CS31	= 1	; Clock Select 3 bit 1
+                 .equ	CS32	= 2	; Clock Select3 bit 2
+                 .equ	WGM32	= 3	; Waveform Generation Mode
+                 .equ	CTC30	= WGM32	; For compatibility
+                 .equ	WGM33	= 4	; Waveform Generation Mode
+                 .equ	CTC31	= WGM33	; For compatibility
+                 .equ	ICES3	= 6	; Input Capture 3 Edge Select
+                 .equ	ICNC3	= 7	; Input Capture 3  Noise Canceler
+                 
+                 ; TCCR3C - Timer/Counter3 Control Register C
+                 .equ	FOC3C	= 5	; Force Output Compare for channel C
+                 .equ	FOC3B	= 6	; Force Output Compare for channel B
+                 .equ	FOC3A	= 7	; Force Output Compare for channel A
+                 
+                 ; TCNT3L - Timer/Counter3 Low Byte
+                 .equ	TCN3L0	= 0	; Timer/Counter 3 bit 0
+                 .equ	TCN3L1	= 1	; Timer/Counter 3 bit 1
+                 .equ	TCN3L2	= 2	; Timer/Counter 3 bit 2
+                 .equ	TCN3L3	= 3	; Timer/Counter 3 bit 3
+                 .equ	TCN3L4	= 4	; Timer/Counter 3 bit 4
+                 .equ	TCN3L5	= 5	; Timer/Counter 3 bit 5
+                 .equ	TCN3L6	= 6	; Timer/Counter 3 bit 6
+                 .equ	TCN3L7	= 7	; Timer/Counter 3 bit 7
+                 
+                 
+                 ; ***** WATCHDOG *********************
+                 ; WDTCR - Watchdog Timer Control Register
+                 .equ	WDTCSR	= WDTCR	; For compatibility
+                 .equ	WDP0	= 0	; Watch Dog Timer Prescaler bit 0
+                 .equ	WDP1	= 1	; Watch Dog Timer Prescaler bit 1
+                 .equ	WDP2	= 2	; Watch Dog Timer Prescaler bit 2
+                 .equ	WDE	= 3	; Watch Dog Enable
+                 .equ	WDCE	= 4	; Watchdog Change Enable
+                 .equ	WDTOE	= WDCE	; For compatibility
+                 
+                 
+                 ; ***** AD_CONVERTER *****************
+                 ; ADMUX - The ADC multiplexer Selection Register
+                 .equ	MUX0	= 0	; Analog Channel and Gain Selection Bits
+                 .equ	MUX1	= 1	; Analog Channel and Gain Selection Bits
+                 .equ	MUX2	= 2	; Analog Channel and Gain Selection Bits
+                 .equ	MUX3	= 3	; Analog Channel and Gain Selection Bits
+                 .equ	MUX4	= 4	; Analog Channel and Gain Selection Bits
+                 .equ	ADLAR	= 5	; Left Adjust Result
+                 .equ	REFS0	= 6	; Reference Selection Bit 0
+                 .equ	REFS1	= 7	; Reference Selection Bit 1
+                 
+                 ; ADCSRA - The ADC Control and Status register
+                 .equ	ADCSR	= ADCSRA	; For compatibility
+                 .equ	ADPS0	= 0	; ADC  Prescaler Select Bits
+                 .equ	ADPS1	= 1	; ADC  Prescaler Select Bits
+                 .equ	ADPS2	= 2	; ADC  Prescaler Select Bits
+                 .equ	ADIE	= 3	; ADC Interrupt Enable
+                 .equ	ADIF	= 4	; ADC Interrupt Flag
+                 .equ	ADFR	= 5	; ADC  Free Running Select
+                 .equ	ADSC	= 6	; ADC Start Conversion
+                 .equ	ADEN	= 7	; ADC Enable
+                 
+                 ; ADCH - ADC Data Register High Byte
+                 .equ	ADCH0	= 0	; ADC Data Register High Byte Bit 0
+                 .equ	ADCH1	= 1	; ADC Data Register High Byte Bit 1
+                 .equ	ADCH2	= 2	; ADC Data Register High Byte Bit 2
+                 .equ	ADCH3	= 3	; ADC Data Register High Byte Bit 3
+                 .equ	ADCH4	= 4	; ADC Data Register High Byte Bit 4
+                 .equ	ADCH5	= 5	; ADC Data Register High Byte Bit 5
+                 .equ	ADCH6	= 6	; ADC Data Register High Byte Bit 6
+                 .equ	ADCH7	= 7	; ADC Data Register High Byte Bit 7
+                 
+                 ; ADCL - ADC Data Register Low Byte
+                 .equ	ADCL0	= 0	; ADC Data Register Low Byte Bit 0
+                 .equ	ADCL1	= 1	; ADC Data Register Low Byte Bit 1
+                 .equ	ADCL2	= 2	; ADC Data Register Low Byte Bit 2
+                 .equ	ADCL3	= 3	; ADC Data Register Low Byte Bit 3
+                 .equ	ADCL4	= 4	; ADC Data Register Low Byte Bit 4
+                 .equ	ADCL5	= 5	; ADC Data Register Low Byte Bit 5
+                 .equ	ADCL6	= 6	; ADC Data Register Low Byte Bit 6
+                 .equ	ADCL7	= 7	; ADC Data Register Low Byte Bit 7
+                 
+                 
+                 
+                 ; ***** LOCKSBITS ********************************************************
+                 .equ	LB1	= 0	; Lock bit
+                 .equ	LB2	= 1	; Lock bit
+                 .equ	BLB01	= 2	; Boot Lock bit
+                 .equ	BLB02	= 3	; Boot Lock bit
+                 .equ	BLB11	= 4	; Boot lock bit
+                 .equ	BLB12	= 5	; Boot lock bit
+                 
+                 
+                 ; ***** FUSES ************************************************************
+                 ; LOW fuse bits
+                 .equ	CKSEL0	= 0	; Select Clock Source
+                 .equ	CKSEL1	= 1	; Select Clock Source
+                 .equ	CKSEL2	= 2	; Select Clock Source
+                 .equ	CKSEL3	= 3	; Select Clock Source
+                 .equ	SUT0	= 4	; Select start-up time
+                 .equ	SUT1	= 5	; Select start-up time
+                 .equ	BODEN	= 6	; Brown out detector enable
+                 .equ	BODLEVEL	= 7	; Brown out detector trigger level
+                 
+                 ; HIGH fuse bits
+                 .equ	BOOTRST	= 0	; Select Reset Vector
+                 .equ	BOOTSZ0	= 1	; Select Boot Size
+                 .equ	BOOTSZ1	= 2	; Select Boot Size
+                 .equ	EESAVE	= 3	; EEPROM memory is preserved through chip erase
+                 .equ	CKOPT	= 4	; Oscillator Options
+                 .equ	SPIEN	= 5	; Enable Serial programming and Data Downloading
+                 .equ	JTAGEN	= 6	; Enable JTAG
+                 .equ	OCDEN	= 7	; Enable OCD
+                 
+                 ; EXTENDED fuse bits
+                 .equ	WDTON	= 0	; Watchdog timer always on
+                 .equ	M103C	= 1	; ATmega103 compatibility mode
+                 
+                 
+                 
+                 ; ***** CPU REGISTER DEFINITIONS *****************************************
+                 .def	XH	= r27
+                 .def	XL	= r26
+                 .def	YH	= r29
+                 .def	YL	= r28
+                 .def	ZH	= r31
+                 .def	ZL	= r30
+                 
+                 
+                 
+                 ; ***** DATA MEMORY DECLARATIONS *****************************************
+                 .equ	FLASHEND	= 0xffff	; Note: Word address
+                 .equ	IOEND	= 0x00ff
+                 .equ	SRAM_START	= 0x0100
+                 .equ	SRAM_SIZE	= 4096
+                 .equ	RAMEND	= 0x10ff
+                 .equ	XRAMEND	= 0xffff
+                 .equ	E2END	= 0x0fff
+                 .equ	EEPROMEND	= 0x0fff
+                 .equ	EEADRBITS	= 12
+                 #pragma AVRPART MEMORY PROG_FLASH 131072
+                 #pragma AVRPART MEMORY EEPROM 4096
+                 #pragma AVRPART MEMORY INT_SRAM SIZE 4096
+                 #pragma AVRPART MEMORY INT_SRAM START_ADDR 0x100
+                 
+                 
+                 
+                 ; ***** BOOTLOADER DECLARATIONS ******************************************
+                 .equ	NRWW_START_ADDR	= 0xf000
+                 .equ	NRWW_STOP_ADDR	= 0xffff
+                 .equ	RWW_START_ADDR	= 0x0
+                 .equ	RWW_STOP_ADDR	= 0xefff
+                 .equ	PAGESIZE	= 128
+                 .equ	FIRSTBOOTSTART	= 0xfe00
+                 .equ	SECONDBOOTSTART	= 0xfc00
+                 .equ	THIRDBOOTSTART	= 0xf800
+                 .equ	FOURTHBOOTSTART	= 0xf000
+                 .equ	SMALLBOOTSTART	= FIRSTBOOTSTART
+                 .equ	LARGEBOOTSTART	= FOURTHBOOTSTART
+                 
+                 
+                 
+                 ; ***** INTERRUPT VECTORS ************************************************
+                 .equ	INT0addr	= 0x0002	; External Interrupt Request 0
+                 .equ	INT1addr	= 0x0004	; External Interrupt Request 1
+                 .equ	INT2addr	= 0x0006	; External Interrupt Request 2
+                 .equ	INT3addr	= 0x0008	; External Interrupt Request 3
+                 .equ	INT4addr	= 0x000a	; External Interrupt Request 4
+                 .equ	INT5addr	= 0x000c	; External Interrupt Request 5
+                 .equ	INT6addr	= 0x000e	; External Interrupt Request 6
+                 .equ	INT7addr	= 0x0010	; External Interrupt Request 7
+                 .equ	OC2addr	= 0x0012	; Timer/Counter2 Compare Match
+                 .equ	OVF2addr	= 0x0014	; Timer/Counter2 Overflow
+                 .equ	ICP1addr	= 0x0016	; Timer/Counter1 Capture Event
+                 .equ	OC1Aaddr	= 0x0018	; Timer/Counter1 Compare Match A
+                 .equ	OC1Baddr	= 0x001a	; Timer/Counter Compare Match B
+                 .equ	OVF1addr	= 0x001c	; Timer/Counter1 Overflow
+                 .equ	OC0addr	= 0x001e	; Timer/Counter0 Compare Match
+                 .equ	OVF0addr	= 0x0020	; Timer/Counter0 Overflow
+                 .equ	SPIaddr	= 0x0022	; SPI Serial Transfer Complete
+                 .equ	URXC0addr	= 0x0024	; USART0, Rx Complete
+                 .equ	UDRE0addr	= 0x0026	; USART0 Data Register Empty
+                 .equ	UTXC0addr	= 0x0028	; USART0, Tx Complete
+                 .equ	ADCCaddr	= 0x002a	; ADC Conversion Complete
+                 .equ	ERDYaddr	= 0x002c	; EEPROM Ready
+                 .equ	ACIaddr	= 0x002e	; Analog Comparator
+                 .equ	OC1Caddr	= 0x0030	; Timer/Counter1 Compare Match C
+                 .equ	ICP3addr	= 0x0032	; Timer/Counter3 Capture Event
+                 .equ	OC3Aaddr	= 0x0034	; Timer/Counter3 Compare Match A
+                 .equ	OC3Baddr	= 0x0036	; Timer/Counter3 Compare Match B
+                 .equ	OC3Caddr	= 0x0038	; Timer/Counter3 Compare Match C
+                 .equ	OVF3addr	= 0x003a	; Timer/Counter3 Overflow
+                 .equ	URXC1addr	= 0x003c	; USART1, Rx Complete
+                 .equ	UDRE1addr	= 0x003e	; USART1, Data Register Empty
+                 .equ	UTXC1addr	= 0x0040	; USART1, Tx Complete
+                 .equ	TWIaddr	= 0x0042	; 2-wire Serial Interface
+                 .equ	SPMRaddr	= 0x0044	; Store Program Memory Read
+                 
+                 .equ	INT_VECTORS_SIZE	= 70	; size in words
+                 
+                 #endif  /* _M128DEF_INC_ */
+                 
+                 ; ***** END OF FILE ******************************************************
+                 
+                 ;.equ DEBUG = 1
+                 
+                 
+                 
+                 
+                 
+                 
+                 ;------------------------------------------------------
+                 
+                 
+                 ;BIAS CONTROL
+                 .equ	bias_port 	= 	PORTG
+                 .equ	bias_ctrl 	= 	3
+                 .equ	bias_adj	=	4
+                 
+                 
+                 ;LCD
+                 .equ	A0			=	7		
+                 .equ	WR			= 	5
+                 .equ	LCS			=	6
+                 .equ	RD			=	4
+                 .equ	LCD_RST		=	7 				; (port D)
+                 .equ	lcd_pins	= 	PORTE
+                 .equ	lcd_data	=	PORTB
+                 
+                 
+                 ;constants
+                 .equ	chars_line	=	80				;characters per line on lcd (virtual screen)
+                 .equ	lines_screen=	25				;number of lines on screen
+                 
+                 .def	buff_head 	=	r9
+                 .def	buff_tail	=	r10
+                 .def	cus_x		=	r11
+                 .def	cus_y		= 	r12
+                 
+                 
+                 ;SRAM VARIABLES
+                 .dseg
+                 .org 0x100
+                 
+000100           serial_buff:	.BYTE 256				;buffers
+                 
+                 
+000200           vram_text:		.BYTE chars_line*lines_screen	;one screen of text, should be in sync with display
+0009d0           vram_address:	.BYTE 2					;16 bit address of current pos in vram, should be same as display cursor address
+                 
+                 
+                 ;------EQU and DEF for Emulator---
+                 .equ	kernal_start = 0xE000
+                 .equ	basic_start = 0xC000
+                 .equ	char_start = 0x8000
+                 .equ	game_start 	= 0xA000
+                 
+                 .equ	Os = 6		;overflow bit
+                 .equ	Ds = 3		;Decimal
+                 .equ	Is = 7		;Interupt
+                 .equ	Bs = 4		;Break
+                 
+                 .equ	Cs = 0
+                 .equ	Zs = 1
+                 .equ	Ns = 2
+                 
+                 .def	stack	=	r15			;stack pointer
+                 .def	Pstat1 	=	r13			;the Processor status byte is split into 2 registers, this reg deals with C,Z,N
+                 .def	Pstat2 	=	r14			;..this one deals with Int,Dec, Break ,(and now O(V) bit)
+                 								;this is done so I can simply save the AVR Status Reg to r13 for speed, and use native branch instructions
+                 								;bit 0=O
+                 .def	A	=	r21	;accumulator
+                 .def	Xr	=	r22	;X reg
+                 .def	Yr	=	r23	;Y reg
+                 .def	PL 	=	r26	;XL
+                 .def	PH	=	r27	;XH
+                 .def	retL 	= 	r24
+                 .def	retH 	= 	r25
+                 .def	zero_reg= 	r3 ;always 0
+                 
+                 
+                 ;DEBUG
+                 .def	breakL = r4
+                 .def	breakH = r5
+                 
+0009d2           emu_status:		.BYTE 1				;various bits to run emulator
+                 				;0 = LCD refresh toggle (refreshes every other interupt (30fps)
+                 				;1 = Next instuction is do interupt
+                 
+                 ;DEBUG
+0009d3           last_I:			.BYTE 4				;last 4 executed instructions
+                 
+0009d7           last_PC:		.BYTE 2				
+                 
+0009d9           last_rsbyte:		.BYTE 1				;last rs232 byte recived
+                 	.include 	"macros.asm"
+                 
+                 										;the address must be checked to make sure it is above or euqal to 0x1100, if it below
+                 										;then have to perform hack
+                 .equ	rom_start = 0x80				;high byte test for ROM - sets ammount of ram
+                 .equ	VIAS		= 0x91
+                 .equ	sb_mask = 64		
+                 ;--------------------------------------------------------------									
+                 .MACRO ld_cpuZ      
+                 		mov		r16,ZH						;test if VIAS being accessed
+                 		cpi		r16,VIAS
+                 		breq	hardware
+                              
+                 		cpi		ZH,high_test
+                 		brlo	dohack1
+                 		ld		@0,Z						;hack not needed
+                 		rjmp	exit1
+                 
+                 	dohack1:
+                 		ldi		r16, (1<<XMM1)				;force top address bit 0
+                 		sts 	XMCRB, r16
+                 
+                 		sbr		ZH,sb_mask						;set high bit, so when writing/reading it will use external memory
+                 
+                 		ld		@0,Z						;read value
+                 
+                 		cbr		ZH,sb_mask						;clear top bit
+                 
+                 		ldi 	r16,(0<<XMM1)
+                 		sts 	XMCRB, r16
+                 		rjmp	exit1
+                 	hardware:
+                 	;	push	retL
+                 		rcall	vias_access
+                 		mov		@0,retL
+                 	;	pop		retL
+                 
+                 
+                 	exit1:
+                 .ENDMACRO
+                 ;--------------------------------------------------------------
+                 .MACRO ld_cpuZp                   
+                 		cpi		ZH,high_test
+                 		brlo	dohack1
+                 		ld		@0,Z+						;hack not needed
+                 		rjmp	exit1
+                 
+                 	dohack1:
+                 		ldi		r16, (1<<XMM1)				;force top address bit 0
+                 		sts 	XMCRB, r16
+                 
+                 		sbr		ZH,sb_mask						;set high bit, so when writing/reading it will use external memory
+                 
+                 		ld		@0,Z+						;read value
+                 
+                 		cbr		ZH,sb_mask						;clear top bit
+                 
+                 		ldi 	r16, (0<<XMM1)
+                 		sts 	XMCRB, r16
+                 
+                 	exit1:
+                 	
+                 .ENDMACRO
+                 ;--------------------------------------------------------------
+                 .MACRO ld_cpuY       
+                 	
+                 
+                             
+                 		cpi		YH,high_test
+                 		brlo	dohack1
+                 		ld		@0,Y						;hack not needed
+                 		rjmp	exit1
+                 
+                 	dohack1:
+                 		ldi		r16, (1<<XMM1)				;force top address bit 0
+                 		sts 	XMCRB, r16
+                 
+                 		sbr		YH,sb_mask						;set high bit, so when writing/reading it will use external memory
+                 
+                 		ld		@0,Y						;read value
+                 
+                 		cbr		YH,sb_mask						;clear top bit
+                 
+                 		ldi 	r16, (0<<XMM1)
+                 		sts 	XMCRB, r16
+                 
+                 
+                 
+                 	exit1:
+                 .ENDMACRO
+                 ;--------------------------------------------------------------
+                 .MACRO ld_cpuYp                   
+                 		cpi		YH,high_test
+                 		brlo	dohack1
+                 		ld		@0,Y+						;hack not needed
+                 		rjmp	exit1
+                 
+                 	dohack1:
+                 		ldi		r16, (1<<XMM1)				;force top address bit 0
+                 		sts 	XMCRB, r16
+                 
+                 		sbr		YH,sb_mask						;set high bit, so when writing/reading it will use external memory
+                 
+                 		ld		@0,Y+						;read value
+                 
+                 		cbr		YH,sb_mask						;clear top bit
+                 
+                 		ldi 	r16,(0<<XMM1)
+                 		sts 	XMCRB, r16
+                 
+                 	exit1:
+                 .ENDMACRO
+                 
+                 ;--------------------------------------------------------------
+                 
+                 .MACRO st_cpuZ                  
+                 		cpi		ZH,high_test
+                 		brlo	dohack1
+                 
+                 		mov		r16,ZH						;when kernal starts, it tests ram untill it finds ROM
+                 		andi	r16,0b11110000
+                 		cpi		r16,rom_start
+                 		breq	exit1
+                 
+                 		st		Z,@0						;hack not needed
+                 		rjmp	exit1
+                 
+                 	dohack1:
+                 		ldi		r16, (1<<XMM1)				;force top address bit 0
+                 		sts 	XMCRB, r16
+                 
+                 		sbr		ZH,sb_mask						;set high bit, so when writing/reading it will use external memory
+                 
+                 		st		Z,@0						;store value
+                 
+                 		cbr		ZH,sb_mask						;clear top bit
+                 
+                 		ldi 	r16, (0<<XMM1)
+                 		sts 	XMCRB, r16
+                 
+                 	exit1:
+                 .ENDMACRO 
+                 ;--------------------------------------------------------------
+                 
+                 .MACRO stack_push ;stack 1FF -> 100
+                 	
+                 	ldi		ZH,1			;get next stack address
+                 	mov		ZL,stack
+                 
+                 	;TODO def in lower reagion, setup for write
+                 	ldi		r16, (1<<XMM1)				;force top address bit 0
+                 		sts 	XMCRB, r16
+                 
+                 		sbr		ZH,sb_mask						;set high bit, so when writing/reading it will use external memory
+                 
+                 		st		Z,@0						;store value
+                 
+                 		cbr		ZH,sb_mask						;clear top bit
+                 
+                 		ldi 	r16, (0<<XMM1)
+                 		sts 	XMCRB, r16
+                 ;	st		Z,@0				;store value to stack
+                 
+                 	dec		stack			;dec stack to next location
+                 .ENDMACRO
+                 
+                 
+                 .MACRO stack_pop ;stack 1FF -> 100
+                 	inc		stack			;in stack to prev location
+                 
+                 	ldi		ZH,1			;get next stack address
+                 	mov		ZL,stack
+                 
+                 	;TODO def in lower reagion, setup for write
+                 	ldi		r16, (1<<XMM1)				;force top address bit 0
+                 		sts 	XMCRB, r16
+                 
+                 		sbr		ZH,sb_mask						;set high bit, so when writing/reading it will use external memory
+                 
+                 		ld		@0,Z						;read value
+                 
+                 		cbr		ZH,sb_mask						;clear top bit
+                 
+                 		ldi 	r16,(0<<XMM1)
+                 		sts 	XMCRB, r16
+                 ;	ld		@0,Z			;get value from stack
+                 
+                 .ENDMACRO
+                 
+                 
+                 
+                 
+                 
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 ;get_pc_mem
+                 	
+                 ;purpose: 	get next byte pointed to by PC, also inc PC
+                 ;Takes: 	PC
+                 ;Give:		returns byte in first param
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 .MACRO get_pc_mem   
+                 		cpi		XH,high_test
+                 		brlo	dohack1
+                 		ld		@0,X+						;hack not needed
+                 		rjmp	exit1
+                 
+                 	dohack1:
+                 		ldi		r16, (1<<XMM1)				;force top address bit 0
+                 		sts 	XMCRB, r16
+                 
+                 		sbr		XH,sb_mask						;set high bit, so when writing/reading it will use external memory
+                 
+                 		ld		@0,X+						;read value
+                 
+                 		cbr		XH,sb_mask						;clear top bit
+                 
+                 		ldi 	r16, (0<<XMM1)
+                 		sts 	XMCRB, r16      
+                 	exit1:  
+                 		;TODO check is less than 0x1100
+                         ;ld		@0,X+;
+                 .ENDMACRO                   ;
+                 
+                 .cseg
+                 .org	0x00
+000000 c024      	rjmp	start
+                 	;setup stack
+                 .org	0x1E
+00001e c0f6      	rjmp	timer0_cmp
+                 
+                 .org	0x0024		;received a rs232 
+000024 c108      	rjmp	rx_rs232_0
+                 
+                 start:
+000025 e100          LDI 	R16, HIGH(RAMEND) 	;Upper byte
+000026 bf0e          OUT 	SPH,R16 			;to stack pointer
+000027 ef0f          LDI 	R16, LOW(RAMEND) 	;Lower byte
+000028 bf0d          OUT 	SPL,R16 
+                 
+                 	
+                 
+                 k:
+000029 0f01      	add		r16,r17
+                 
+                 ;	rjmp	k
+                 ;	rjmp	skip
+                 
+                 	
+                 
+                 
+                 
+00002a d760      	rcall	init_hardware
+                 
+00002b d09c      	rcall	load_chars_lcd
+                 
+00002c d067      	rcall	load_kernal
+00002d d073      	rcall	load_basic
+00002e d08c      	rcall	load_chars
+00002f d07e      	rcall	load_game
+                 
+                 skip:
+                 
+                 
+                 	;---setup timer--
+000030 e007      	ldi		r16,7
+000031 bf03      	out		TCCR0,r16
+000032 e002      	ldi		r16,2
+000033 bf07      	out		TIMSK,r16
+                 
+                 ;	sei
+                 
+                 
+                 
+                 
+000034 2433      	clr 	zero_reg
+000035 ef0f      	ldi		r16,0xff
+000036 2ef0      	mov		stack,r16
+000037 9300 09d9 	sts		last_rsbyte,r16
+000039 9230 09d2 	sts		emu_status,zero_reg
+                 	
+                 
+00003b efec      	ldi		ZL,0xFC
+00003c efff      	ldi		ZH,0xFF
+00003d 91a1      	ld		PL,Z+
+00003e 81b0      	ld		PH,Z
+                 
+                 
+                 
+                 ;	ldi		PL,0x00
+                 ;	ldi		PH,0x11	
+                 
+00003f e407      	ldi		r16,'G'
+                 ;	rcall	rs232_0_tx
+000040 e40f      	ldi		r16,'O'
+                 ;	rcall	rs232_0_tx
+                 
+                 
+000041 9100 ffff 	lds		r16,0xffff
+                 ;	rcall	rs232_0_tx
+                 
+000043 9100 ffff 	lds		r16,0xffff
+                 ;	rcall	rs232_0_tx
+                 
+000045 9100 e000 	lds		r16,0xe000
+                 ;	rcall	rs232_0_tx
+                 
+000047 9100 fffe 	lds		r16,0xfffe
+                 ;	rcall	rs232_0_tx
+                 
+000049 e410      	LDI		R17,0X40
+00004a 27ff      	CLR		ZH
+00004b ece5      	ldi		ZL, 0xc5
+00004c 31f1
+00004d f030
+00004e 2f0f
+00004f 7f00
+000050 3800
+000051 f059
+000052 8310
+000053 c009
+000054 e002
+000055 9300 006c
+000057 64f0
+000058 8310
+000059 7bff
+00005a e000
+00005b 9300 006c 	st_cpuZ r17
+00005d eceb      	ldi		ZL, 0xcB
+00005e 31f1
+00005f f030
+000060 2f0f
+000061 7f00
+000062 3800
+000063 f059
+000064 8310
+000065 c009
+000066 e002
+000067 9300 006c
+000069 64f0
+00006a 8310
+00006b 7bff
+00006c e000
+00006d 9300 006c 	st_cpuZ r17
+                 
+00006f b70f      	in		r16,SREG
+000070 2ed0      	mov		Pstat1,r16
+                 next_op:
+                 
+                 
+                 	;rjmp	op_ADC
+000071 9478      	sei
+                 
+000072 2700      	clr		r16
+000073 9100 09d2 	lds		r16,emu_status						;check if Interupt
+000075 fd01      	sbrc	r16,1
+000076 d0f0      	rcall	Interupt_IRQ
+                 	
+000077 e8ec      	ldi		ZL,low(opcode_jmps<<1)
+000078 e1f0      	ldi		ZH,high(opcode_jmps<<1)
+                 
+                 .IFDEF DEBUG
+                 .ENDIF
+                 
+                 
+                 
+                 
+                 breakpret:
+                 
+                 
+000079 31b1
+00007a f010
+00007b 918d
+00007c c009
+00007d e002
+00007e 9300 006c
+000080 64b0
+000081 918d
+000082 7bbf
+000083 e000
+000084 9300 006c 	get_pc_mem retL			;GET OPCODE
+                 
+                 
+                 .IFDEF DEBUG
+                 .ENDIF	
+                 
+000086 2700      	clr		r16	
+                 
+000087 0f88      	lsl		retL			;mul opcde by 2 because jump table is 2 bytes per entry
+000088 1d03      	adc		r16,zero_reg	;if carry, then save carry to r16
+                 
+                 
+000089 0fe8      	add		ZL,retL
+00008a 1ff0      	adc		ZH,r16			;add carry from last add, also add any carry from lsl
+                 
+00008b 91c5      	lpm		YL,Z+			;have to use Z for both lpm and IJMP unfortunatly
+00008c 91d4      	lpm		YH,Z
+                 	
+00008d 01fe      	movw	ZL,YL			;copy value to ZL
+                 
+00008e 94f8      	cli
+00008f 9409      	ijmp					;now jump to copcode subroutine
+                 
+                 breakp:
+000090 0000      	nop
+000091 0000      	nop
+000092 0000      	nop
+000093 cfe5      	rjmp	breakpret	
+                 
+                 ;-------LOAD KERNAL INTO MEMORY------------
+                 load_kernal:
+000094 e8ec      	ldi		ZL,low(kernal_rom<<1)
+000095 e1f2      	ldi		ZH,high(kernal_rom<<1)
+000096 e0c0      	ldi		YL,low(kernal_start)
+000097 eed0      	ldi		YH,high(kernal_start)
+000098 2700      	clr		r16
+                 load_kernal_loop1:
+000099 e210      		ldi		r17,32
+                 load_kernal_loop2:
+00009a 9125      			lpm		r18,Z+
+00009b 9329      			st		Y+,r18
+00009c 951a      			dec		r17
+00009d f7e1      		brne	load_kernal_loop2
+00009e 950a      		dec		r16
+00009f f7c9      	brne	load_kernal_loop1
+0000a0 9508      	ret
+                 ;-------LOAD BASIC INTO MEMORY------------
+                 load_basic:
+0000a1 e8ec      	ldi		ZL,low(basic_rom<<1)
+0000a2 e3f2      	ldi		ZH,high(basic_rom<<1)
+0000a3 e0c0      	ldi		YL,low(basic_start)
+0000a4 ecd0      	ldi		YH,high(basic_start)
+0000a5 2700      	clr		r16
+                 load_basic_loop1:
+0000a6 e210      		ldi		r17,32
+                 load_basic_loop2:
+0000a7 9125      			lpm		r18,Z+
+0000a8 9329      			st		Y+,r18
+0000a9 951a      			dec		r17
+0000aa f7e1      		brne	load_basic_loop2
+0000ab 950a      		dec		r16
+0000ac f7c9      	brne	load_basic_loop1
+0000ad 9508      	ret
+                 ;-------LOAD GAME INTO MEMORY------------
+                 load_game:
+0000ae e8ec      	ldi		ZL,low(game_rom<<1)
+0000af e6f2      	ldi		ZH,high(game_rom<<1)
+0000b0 e0c0      	ldi		YL,low(game_start)
+0000b1 ead0      	ldi		YH,high(game_start)
+0000b2 2700      	clr		r16
+                 load_game_loop1:
+0000b3 e210      		ldi		r17,32
+                 load_game_loop2:
+0000b4 9125      			lpm		r18,Z+
+0000b5 9329      			st		Y+,r18
+0000b6 951a      			dec		r17
+0000b7 f7e1      		brne	load_game_loop2
+0000b8 950a      		dec		r16
+0000b9 f7c9      	brne	load_game_loop1
+0000ba 9508      	ret
+                 
+                 ;-------LOAD CHARACTER INTO MEMORY------------
+                 load_chars:
+0000bb e8ec      	ldi		ZL,low(char_rom<<1)
+0000bc e5f2      	ldi		ZH,high(char_rom<<1)
+0000bd e0c0      	ldi		YL,low(char_start)
+0000be e8d0      	ldi		YH,high(char_start)
+0000bf 2700      	clr		r16
+                 load_char_loop1:
+0000c0 e110      		ldi		r17,16
+                 load_char_loop2:
+0000c1 9125      			lpm		r18,Z+
+0000c2 9329      			st		Y+,r18
+0000c3 951a      			dec		r17
+0000c4 f7e1      		brne	load_char_loop2
+0000c5 950a      		dec		r16
+0000c6 f7c9      	brne	load_char_loop1
+0000c7 9508      	ret
+                 
+                 
+                 
+                 ;-------LOAD CHARACTER INTO LCD MEMORY------------
+                 
+                 load_chars_lcd:
+0000c8 e8ec      	ldi		ZL,low(char_rom<<1)
+0000c9 e5f2      	ldi		ZH,high(char_rom<<1)
+0000ca e0c0      	ldi		YL,low(char_start)
+0000cb e8d0      	ldi		YH,high(char_start)
+                 
+                 ;--	set address to start of CGRAM
+0000cc e011      	ldi		r17,1				;command
+0000cd e406      	ldi		r16,0x46
+0000ce d677      	rcall	lcd_send_data
+                 
+0000cf 2711      	clr		r17
+                 	
+0000d0 e000      	ldi		r16,0x00
+0000d1 d674      	rcall	lcd_send_data
+                 
+0000d2 ef00      	ldi		r16,0xf0
+0000d3 d672      	rcall	lcd_send_data
+                 ;--
+                 
+0000d4 e011      	ldi		r17,1				
+0000d5 e402      	ldi		r16,0x42			;send data to cgram
+0000d6 d66f      	rcall	lcd_send_data
+                 
+0000d7 2711      	clr		r17
+                 
+0000d8 2733      	clr		r19
+                 load_chars_lcd_loop1:
+0000d9 e120      		ldi		r18,16
+                 load_chars_lcd_loop2:
+0000da 9105      			lpm		r16,Z+
+0000db d66a      			rcall	lcd_send_data
+                 
+                 		
+0000dc 952a      			dec		r18
+0000dd f7e1      		brne	load_chars_lcd_loop2
+0000de 953a      		dec		r19
+0000df f7c9      	brne	load_chars_lcd_loop1
+0000e0 9508      	ret
+                 
+                 ;----------------------------------------------------------------------
+                 ;lcd_refresh
+                 	
+                 ;purpose: 	copies VRAM to LCD
+                 ;Takes: 	na
+                 ;Give:		na
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 
+                 lcd_refresh:
+0000e1 920f      	push	r0
+0000e2 921f      	push	r1
+0000e3 930f      	push	r16
+0000e4 931f      	push	r17
+0000e5 932f      	push	r18
+0000e6 933f      	push	r19
+0000e7 934f      	push	r20
+0000e8 93ef      	push	ZL
+0000e9 93ff      	push	ZH
+                 	
+0000ea e0e0      	ldi		ZL,LOW(0x1000)
+0000eb e1f0      	ldi		ZH,HIGH(0x1000)
+                 
+                 
+                 
+0000ec e136      	ldi		r19,22
+0000ed e147      	ldi		r20,23
+                 
+0000ee 24cc      	clr		cus_y
+                 lcd_refresh_loop1:
+0000ef 24bb      		clr		cus_x
+0000f0 d5f1      		rcall	cursor_address
+0000f1 d5fb      		rcall	lcd_set_cursor
+                 
+0000f2 e011      		ldi		r17,1						;setup to send data
+0000f3 e402      		ldi		r16,0x42
+0000f4 d651      		rcall	lcd_send_data
+                 
+0000f5 2711      		clr		r17
+                 lcd_refresh_loop2:
+0000f6 31f1
+0000f7 f010
+0000f8 9121
+0000f9 c009
+0000fa e002
+0000fb 9300 006c
+0000fd 64f0
+0000fe 9121
+0000ff 7bff
+000100 e000
+000101 9300 006c 			ld_cpuZp r18
+000103 2f02      			mov		r16,r18
+000104 d641      			rcall	lcd_send_data
+000105 94b3      			inc		cus_x
+000106 16b3      			cp		cus_x,r19
+000107 f771      		brne	lcd_refresh_loop2
+000108 94c3      		inc		cus_y
+                 
+                 	
+                 			
+000109 16c4      		cp		cus_y,r20
+00010a f721      		brne	lcd_refresh_loop1
+                 
+                 
+00010b 91ff      	pop		ZH
+00010c 91ef      	pop		ZL
+00010d 914f      	pop		r20
+00010e 913f      	pop		r19
+00010f 912f      	pop		r18
+000110 911f      	pop		r17
+000111 910f      	pop		r16
+000112 901f      	pop		r1
+000113 900f      	pop		r0
+                 
+                 
+000114 9508      	ret
+                 
+                 
+                 timer0_cmp:
+000115 921f      	push	r1
+000116 b61f      	in		r1,SREG						;preserve main OS status reg.
+000117 930f      	push	r16
+000118 931f      	push	r17
+                 
+000119 9100 09d2 	lds		r16,emu_status
+                 
+00011b ff00      	sbrs	r16,0						;toggle lcd bit
+00011c c002      	rjmp	PC + 3				
+00011d 7f0e      	cbr		r16,1	
+00011e c001      	rjmp	PC+2	
+00011f 6001      	sbr		r16,1
+                 
+000120 ff00      	sbrs	r16,0
+000121 dfbf      	rcall	lcd_refresh
+                 
+000122 2d1e      	mov		r17,Pstat2					;check if interupts enabled
+                 
+000123 7f0d      	cbr		r16,2
+000124 ff17      	sbrs	r17,Is						
+000125 6002      	sbr		r16,2						;if Interupt disable is 0, then set bit 1 in emu_status to next intruction is interupt
+                 
+000126 9300 09d2 	sts		emu_status,r16
+                 	
+000128 911f      	pop		r17
+000129 910f      	pop		r16
+00012a be1f      	out		SREG,r1
+00012b 901f      	pop		r1
+00012c 9518      	reti	
+                 
+                 
+                 
+                 rx_rs232_0:
+00012d 921f      	push	r1
+00012e b61f      	in		r1,SREG						;preserve main OS status reg.
+                 	
+00012f 930f      	push	r16
+000130 931f      	push	r17
+000131 93ef      	push	ZL
+000132 93ff      	push	ZH
+                 	
+                 
+                 	
+000133 b11c      	in		r17,UDR0					;get the incomming char
+                 
+                 ;	sts		last_rsbyte,r17
+                 
+000134 e7e7      	ldi		ZL,low(0x277)
+000135 e0f2      	ldi		ZH,high(0x277)
+000136 31f1
+000137 f030
+000138 2f0f
+000139 7f00
+00013a 3800
+00013b f059
+00013c 8310
+00013d c009
+00013e e002
+00013f 9300 006c
+000141 64f0
+000142 8310
+000143 7bff
+000144 e000
+000145 9300 006c 	st_cpuZ r17
+                 
+000147 e011      	ldi		r17,1
+000148 ece6      	ldi		ZL,low(0xc6)
+000149 e0f0      	ldi		ZH,high(0xc6)
+00014a 31f1
+00014b f030
+00014c 2f0f
+00014d 7f00
+00014e 3800
+00014f f059
+000150 8310
+000151 c009
+000152 e002
+000153 9300 006c
+000155 64f0
+000156 8310
+000157 7bff
+000158 e000
+000159 9300 006c 	st_cpuZ r17
+                 
+                 
+                 
+                 ;	mov		r16,PL
+                 ;	rcall	rs232_0_tx
+                 ;	mov		r16,PH
+                 ;	rcall	rs232_0_tx
+                 
+                 qwe:
+00015b 91ff      	pop		ZH
+00015c 91ef      	pop		ZL
+00015d 911f      	pop		r17
+00015e 910f      	pop		r16
+00015f be1f      	out		SREG,r1							;restore previous status reg
+000160 901f      	pop		r1
+000161 9518      	reti	
+                 								;return to normal pgm status.
+                 rs232_0_tx:
+000162 9b5d      		sbis	UCSR0A,UDRE0
+000163 cffe      	rjmp	rs232_0_tx
+                 
+000164 b90c      	out		UDR0,r16
+000165 d059      	rcall	delay_1ms
+000166 9508      	ret
+                 
+                 
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 ;Interupt_IRQ
+                 	
+                 ;purpose: 	called when IRQ
+                 ;Takes: 	na
+                 ;Give:		na
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 
+                 Interupt_IRQ:
+000167 e0f1
+000168 2def
+000169 e002
+00016a 9300 006c
+00016c 64f0
+00016d 83b0
+00016e 7bff
+00016f e000
+000170 9300 006c
+000172 94fa      	stack_push	PH
+000173 e0f1
+000174 2def
+000175 e002
+000176 9300 006c
+000178 64f0
+000179 83a0
+00017a 7bff
+00017b e000
+00017c 9300 006c
+00017e 94fa      	stack_push	PL
+00017f d549      	rcall	stack_build
+000180 e0f1
+000181 2def
+000182 e002
+000183 9300 006c
+000185 64f0
+000186 8380
+000187 7bff
+000188 e000
+000189 9300 006c
+00018b 94fa      	stack_push	retL
+                 
+00018c 2d0e      	mov		r16,Pstat2					;clear interupt so cant do interupt in interupt
+00018d 6800      	sbr		r16,EXP2(Is)
+00018e 2ee0      	mov		Pstat2,r16
+                 
+                 
+00018f 9100 09d2 	lds		r16,emu_status
+000191 7f0d      	cbr		r16,2
+000192 9300 09d2 	sts		emu_status,r16
+                 
+                 
+000194 efce      	ldi		YL,low(0xFFFE)
+000195 efdf      	ldi		YH,high(0xFFFE)
+000196 91a9      	ld		PL,Y+
+000197 81b8      	ld		PH,Y
+                 
+000198 9508      	ret
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 ;vias_access
+                 	
+                 ;purpose: 	called when a read to the vias has occurded (from Z)
+                 ;Takes: 	Z
+                 ;Give:		retL is result
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 
+                 vias_access:
+000199 931f      	push	r17
+00019a 932f      	push	r18
+00019b 933f      	push	r19
+                 	
+                 
+                 
+00019c 32e1      	cpi		ZL,0x21						;keyboard scan being read
+00019d f029      	breq	keyboard_read
+                 
+                 
+00019e 8180      	ld		retL,Z	
+                 
+                 vias_access_exit:
+00019f 913f      	pop		r19
+0001a0 912f      	pop		r18
+0001a1 911f      	pop		r17
+0001a2 9508      	ret
+                 
+                 
+                 keyboard_read:
+0001a3 ef8f      	ldi		retL,0xff
+                 
+0001a4 9110 09d9 	lds		r17,last_rsbyte				;should be 0-63	
+                 
+0001a6 3f1f      	cpi		r17,255
+0001a7 f3b9      	breq	vias_access_exit
+                 
+0001a8 2f21      	mov		r18,r17
+0001a9 9526      	lsr		r18							;divide by 8 to get  which column
+0001aa 9526      	lsr		r18
+0001ab 9526      	lsr		r18
+                 
+0001ac 9130 9120 	lds		r19,0x9120					;read column byte
+                 
+                 keyboard_read_loop1:
+0001ae 2322      	tst		r18							;test if 18(prob dont need)
+0001af f019      	breq	keyboard_read_loop1_exit
+0001b0 9536      	lsr		r19							;shift right, so column to check is at 0
+0001b1 952a      	dec		r18
+0001b2 cffb      	rjmp	keyboard_read_loop1
+                 
+                 keyboard_read_loop1_exit:
+0001b3 ff30      	sbrs	r19,0						;test if key column is 0
+0001b4 c001      	rjmp	keyboard_read_set_row		;so set appropriate row
+                 	
+                 ;	ldi		retL,0xff					; if here, then a colum with no key is pressed
+0001b5 cfe9      	rjmp	vias_access_exit		
+                 
+                 	
+                 	
+                 keyboard_read_set_row:
+0001b6 7017      	andi	r17,0b00000111				;get lower 3 bits
+0001b7 ef8e      	ldi		retL,0xFE						;set bit 0
+                 
+                 keyboard_read_loop2:
+0001b8 2311      	tst		r17							
+0001b9 f021      	breq	keyboard_read_loop2_exit
+0001ba 9408      	sec
+0001bb 1f88      	rol		retL
+0001bc 951a      	dec		r17
+0001bd cffa      	rjmp	keyboard_read_loop2
+                 
+                 keyboard_read_loop2_exit:
+0001be cfe0      	rjmp	vias_access_exit
+                 
+                 
+                 ;-------------------------------
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 ;delay_1ms
+                 	
+                 ;purpose: 	delays 1ms
+                 ;Takes: 	na
+                 ;Give:		na
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 
+                 delay_1ms:						
+0001bf 933f      	push	r19
+0001c0 932f      	push	r18
+                 
+0001c1 e124      	ldi		r18,20
+                 delay_1ms1:
+0001c2 e835      	ldi		r19,133
+                 delay_1ms1_loop:
+0001c3 953a      			dec		r19
+0001c4 0000      			nop
+0001c5 0000      			nop
+0001c6 0000      			nop
+0001c7 f7d9      		brne	delay_1ms1_loop
+0001c8 952a      		dec		r18
+0001c9 f7c1      	brne	delay_1ms1
+                 
+0001ca 912f      	pop		r18
+0001cb 913f      	pop		r19
+0001cc 9508      	ret
+                 
+                 delay_100ms:
+0001cd 932f      	push	r18
+0001ce e624      	ldi		r18,100
+                 delay_100ms_loop:
+0001cf dfef      		rcall	delay_1ms
+0001d0 952a      		dec		r18
+0001d1 f7e9      	brne	delay_100ms_loop
+0001d2 912f      	pop		r18
+0001d3 9508      	ret
+                 
+                 
+                 .include "6502cpu.asm"
+                 
+                 ;DEBUG STUFF
+                 .equ ZP_offset = 0x00				;offset for Zero page, set to 0 for non debug
+                 .MACRO cp1
+                 
+                 ;	clc
+                 
+                 	cp		@0,@1
+                 
+                 
+                 	brcs	PC+3				;invert carry
+                 	sec	
+                 	rjmp	PC+2	
+                 	clc
+                 
+                 	in		Pstat1,SREG			;save status bits
+                 
+                 .ENDMACRO
+                 
+                 .MACRO move_to_reg
+                 					
+                 	mov		r17,Pstat1			;TEST ME
+                 	tst		@0				;all this is need becase the Z and N flags get changed, but dont in a mov operation	
+                 								;add zero should test register
+                 	
+                 	in		r16,SREG
+                 
+                 	;N flag
+                 	sbrs	r16,2
+                 	cbr		r17,EXP2(Ns)
+                 	sbrc	r16,2
+                 	sbr		r17,EXP2(Ns)
+                 	;Z flag
+                 	sbrs	r16,1
+                 	cbr		r17,EXP2(Zs)
+                 	sbrc	r16,1
+                 	sbr		r17,EXP2(Zs)
+                 
+                 	mov		Pstat1,r17
+                 
+                 .ENDMACRO
+                 ;-----------01-----------------------------------------------------------
+                 op_ORA:							;OR
+0001d4 d334      	rcall	get_value_01
+                 
+0001d5 bedf      	out		SREG,Pstat1			;still need to do this to preserve carry
+0001d6 2b58      	or		A,retL				;perform OR function
+0001d7 b6df      	in		Pstat1,SREG			;save status bits
+0001d8 ce98      	rjmp	next_op
+                 op_AND:							;AND
+0001d9 d32f      	rcall	get_value_01
+                 
+0001da bedf      	out		SREG,Pstat1	
+0001db 2358      	and		A,retL
+0001dc b6df      	in		Pstat1,SREG			;save status bits
+0001dd ce93      	rjmp	next_op
+                 
+                 
+                 op_EOR:							;Exclusive or
+0001de d32a      	rcall	get_value_01
+                 		
+0001df bedf      	out		SREG,Pstat1	
+0001e0 2758      	eor		A,retL
+0001e1 b6df      	in		Pstat1,SREG			;save status bits
+0001e2 ce8e      	rjmp	next_op
+                 op_ADC:							;ADD with carry
+0001e3 d325      	rcall	get_value_01
+                 	
+0001e4 bedf      	out		SREG,Pstat1			;restor status reg for carry op
+                 
+0001e5 e011      	ldi		r17,1
+                 
+                 ;	in		r16,SREG
+                 ;	sbrc	r16,0
+                 ;	add		A,r17
+                 
+0001e6 1f58      	adc		A,retL
+                 
+0001e7 b70f      	in		r16,SREG
+                 
+                 	
+                 
+0001e8 2ed0      	mov		Pstat1,r16			;save status bits
+                 
+                 	
+0001e9 2d1e      	mov		r17,Pstat2
+                 
+                 	;sort out O(V) flag
+0001ea ff03      	sbrs	r16,3
+0001eb 7b1f      	cbr		r17,EXP2(Os)
+0001ec fd03      	sbrc	r16,3
+0001ed 6410      	sbr		r17,EXP2(Os)
+                 
+                 	;sbr		r17,EXP2(Os)
+                 
+0001ee 2ee1      	mov		Pstat2,r17			;copy back
+                 
+0001ef ce81      	rjmp	next_op
+                 
+                 op_STA:							;Store A to mem
+0001f0 d318      	rcall	get_value_01		;Dont acctualy need to get that value, but called to work out address for write
+0001f1 2f85      	mov		retL,A
+0001f2 31f1
+0001f3 f030
+0001f4 2f0f
+0001f5 7f00
+0001f6 3800
+0001f7 f059
+0001f8 8350
+0001f9 c009
+0001fa e002
+0001fb 9300 006c
+0001fd 64f0
+0001fe 8350
+0001ff 7bff
+000200 e000
+000201 9300 006c 	st_cpuZ	A
+000203 ce6d      	rjmp	next_op
+                 
+                 op_LDA:							;Load A with mem
+000204 d304      	rcall	get_value_01
+000205 2f58      	mov		A,retL
+                 
+000206 2d1d
+000207 2355
+000208 b70f
+000209 ff02
+00020a 7f1b
+00020b fd02
+00020c 6014
+00020d ff01
+00020e 7f1d
+00020f fd01
+000210 6012
+000211 2ed1      	move_to_reg A
+                 
+                 
+000212 ce5e      	rjmp	next_op
+                 
+                 op_CMP:							;Compare A and mem
+000213 d2f5      	rcall	get_value_01
+000214 1758
+000215 f010
+000216 9408
+000217 c001
+000218 9488
+000219 b6df      	cp1		A,retL
+                 
+00021a ce56      	rjmp	next_op
+                 op_SBC:							;Subtract A-M with carry
+00021b d2ed      	rcall	get_value_01
+                 	
+                 ;	mov		r18,A			;TEST
+                 
+00021c bedf      	out		SREG,Pstat1			;restor status reg for carry op
+                 
+00021d f010      	brcs	PC+3				;Strange subtraction as works on an inverted carry
+00021e 9408      	sec	
+00021f c001      	rjmp	PC+2	
+000220 9488      	clc
+                 
+                 ;	ldi		r17,1
+                 ;---TEST
+                 ;	in		r16,SREG
+                 ;	sbrc	r16,0
+                 ;	add		A,r17
+                 ;	SUB		A,retL
+                 
+000221 9418      	SEZ							;needed because only clears Z if result <> 0!
+                 
+000222 0b58      	sbc		A,retL
+                 
+000223 f010      	brcs	PC+3				;again..it inverts the carry???
+000224 9408      	sec	
+000225 c001      	rjmp	PC+2	
+000226 9488      	clc
+                 
+000227 b6df      	in		Pstat1,SREG			;save status bits
+                 
+                 
+                 ;	sbc		r18,retL
+                 
+000228 b70f      	in		r16,SREG
+                 	
+000229 2d1e      	mov		r17,Pstat2
+                 
+                 	;sort out O(V) flag
+00022a ff03      	sbrs	r16,3
+00022b 7b1f      	cbr		r17,EXP2(Os)
+00022c fd03      	sbrc	r16,3
+00022d 6410      	sbr		r17,EXP2(Os)
+                 
+                 ;	sbr		r17,EXP2(Os)
+                 
+                 
+00022e 2ee1      	mov		Pstat2,r17			;copy back
+                 
+                 
+                 
+00022f ce41      	rjmp	next_op
+                 
+                 ;-----------10-----------------------------------------------------------
+                 op_ASL:								;Logcial shift left
+000230 d2e9      	rcall 	get_value_10
+000231 0f88      	lsl		retL
+000232 b6df      	in		Pstat1,SREG				;save status bits
+000233 31f1
+000234 f030
+000235 2f0f
+000236 7f00
+000237 3800
+000238 f059
+000239 8380
+00023a c009
+00023b e002
+00023c 9300 006c
+00023e 64f0
+00023f 8380
+000240 7bff
+000241 e000
+000242 9300 006c 	st_cpuZ retL
+000244 ce2c      	rjmp	next_op
+                 
+                 
+                 op_ROL:								;Left shit with caryy
+000245 d2d4      	rcall 	get_value_10
+000246 bedf      	out		SREG,Pstat1				;restor status reg for carry op
+000247 1f88      	rol		retL
+000248 b6df      	in		Pstat1,SREG				;save status bits
+000249 31f1
+00024a f030
+00024b 2f0f
+00024c 7f00
+00024d 3800
+00024e f059
+00024f 8380
+000250 c009
+000251 e002
+000252 9300 006c
+000254 64f0
+000255 8380
+000256 7bff
+000257 e000
+000258 9300 006c 	st_cpuZ retL
+00025a ce16      	rjmp	next_op
+                 
+                 op_LSR:								;Logcial shift right
+00025b d2be      	rcall 	get_value_10
+00025c 9586      	lsr		retL
+00025d b6df      	in		Pstat1,SREG				;save status bits
+00025e 31f1
+00025f f030
+000260 2f0f
+000261 7f00
+000262 3800
+000263 f059
+000264 8380
+000265 c009
+000266 e002
+000267 9300 006c
+000269 64f0
+00026a 8380
+00026b 7bff
+00026c e000
+00026d 9300 006c 	st_cpuZ retL
+00026f ce01      	rjmp	next_op
+                 op_ROR:								;Right shit with caryy
+000270 d2a9      	rcall 	get_value_10
+000271 bedf      	out		SREG,Pstat1				;restor status reg for carry op
+000272 9587      	ror		retL
+000273 b6df      	in		Pstat1,SREG				;save status bits
+000274 31f1
+000275 f030
+000276 2f0f
+000277 7f00
+000278 3800
+000279 f059
+00027a 8380
+00027b c009
+00027c e002
+00027d 9300 006c
+00027f 64f0
+000280 8380
+000281 7bff
+000282 e000
+000283 9300 006c 	st_cpuZ retL
+000285 cdeb      	rjmp	next_op
+                 
+                 op_STX:								;Store X to memory
+000286 d293      	rcall 	get_value_10
+000287 2f86      	mov		retL,Xr
+000288 31f1
+000289 f030
+00028a 2f0f
+00028b 7f00
+00028c 3800
+00028d f059
+00028e 8380
+00028f c009
+000290 e002
+000291 9300 006c
+000293 64f0
+000294 8380
+000295 7bff
+000296 e000
+000297 9300 006c 	st_cpuZ retL
+000299 cdd7      	rjmp	next_op
+                 
+                 op_LDX:								;Load X with memory
+00029a d27f      	rcall 	get_value_10
+00029b 2f68      	mov		Xr,retL
+                 
+00029c 2d1d
+00029d 2366
+00029e b70f
+00029f ff02
+0002a0 7f1b
+0002a1 fd02
+0002a2 6014
+0002a3 ff01
+0002a4 7f1d
+0002a5 fd01
+0002a6 6012
+0002a7 2ed1      	move_to_reg Xr
+0002a8 cdc8      	rjmp	next_op
+                 
+                 op_DEC:								;dec memory
+0002a9 d270      	rcall 	get_value_10
+0002aa bedf      	out		SREG,Pstat1	
+0002ab 958a      	dec		retL
+0002ac b6df      	in		Pstat1,SREG	
+0002ad 31f1
+0002ae f030
+0002af 2f0f
+0002b0 7f00
+0002b1 3800
+0002b2 f059
+0002b3 8380
+0002b4 c009
+0002b5 e002
+0002b6 9300 006c
+0002b8 64f0
+0002b9 8380
+0002ba 7bff
+0002bb e000
+0002bc 9300 006c 	st_cpuZ retL
+0002be cdb2      	rjmp	next_op
+                 
+                 op_INC:
+0002bf d25a      	rcall 	get_value_10
+0002c0 bedf      	out		SREG,Pstat1	
+0002c1 9583      	inc		retL
+0002c2 b6df      	in		Pstat1,SREG	
+0002c3 31f1
+0002c4 f030
+0002c5 2f0f
+0002c6 7f00
+0002c7 3800
+0002c8 f059
+0002c9 8380
+0002ca c009
+0002cb e002
+0002cc 9300 006c
+0002ce 64f0
+0002cf 8380
+0002d0 7bff
+0002d1 e000
+0002d2 9300 006c 	st_cpuZ retL
+0002d4 cd9c      	rjmp	next_op
+                 ;-----------00-----------------------------------------------------------
+                 ;same as 10 but accum missing
+                 op_BIT:	;This instructions is used to test if one or more bits are set in a target memory location. 
+                 		;The mask pattern in A is ANDed with the value in memory to set or clear the zero flag, 
+                 		;but the result is not kept. Bits 7 and 6 of the value from memory are copied into the N and V flags.
+0002d5 d244      	rcall 	get_value_10
+0002d6 bedf      	out		SREG,Pstat1	
+0002d7 2f05      	mov		r16,A				;make copy
+0002d8 2308      	and		r16,retL			;perform AND
+0002d9 b70f      	in		r16,SREG			;copy SREG for Z flag
+                 	
+                 	;sort out N flag
+0002da ff87      	sbrs	retL,7
+0002db 7f0b      	cbr		r16,EXP2(Ns)
+0002dc fd87      	sbrc	retL,7
+0002dd 6004      	sbr		r16,EXP2(Ns)
+                 
+0002de 2ed0      	mov		Pstat1,r16			;copy back
+0002df 2d0e      	mov		r16,Pstat2
+                 
+                 	;sort out O(V) flag
+0002e0 ff86      	sbrs	retL,6
+0002e1 7b0f      	cbr		r16,EXP2(Os)
+0002e2 fd86      	sbrc	retL,6
+0002e3 6400      	sbr		r16,EXP2(Os)
+                 
+0002e4 2ee0      	mov		Pstat2,r16			;copy back
+                 
+0002e5 cd8b      	rjmp	next_op
+                 
+                 op_JMP:									;Jump absolute
+0002e6 31b1
+0002e7 f010
+0002e8 912d
+0002e9 c009
+0002ea e002
+0002eb 9300 006c
+0002ed 64b0
+0002ee 912d
+0002ef 7bbf
+0002f0 e000
+0002f1 9300 006c 	get_pc_mem r18
+0002f3 31b1
+0002f4 f010
+0002f5 911d
+0002f6 c009
+0002f7 e002
+0002f8 9300 006c
+0002fa 64b0
+0002fb 911d
+0002fc 7bbf
+0002fd e000
+0002fe 9300 006c 	get_pc_mem r17
+                 	
+000300 2fa2      	mov		PL,r18
+000301 2fb1      	mov		PH,r17								
+000302 cd6e      	rjmp	next_op
+                 
+                 
+                 op_JMPI:								;Jump absolute indirect
+000303 31b1
+000304 f010
+000305 91cd
+000306 c009
+000307 e002
+000308 9300 006c
+00030a 64b0
+00030b 91cd
+00030c 7bbf
+00030d e000
+00030e 9300 006c 	get_pc_mem YL						;get indirect address
+000310 31b1
+000311 f010
+000312 91dd
+000313 c009
+000314 e002
+000315 9300 006c
+000317 64b0
+000318 91dd
+000319 7bbf
+00031a e000
+00031b 9300 006c 	get_pc_mem YH
+00031d 31d1
+00031e f010
+00031f 81a8
+000320 c009
+000321 e002
+000322 9300 006c
+000324 64d0
+000325 81a8
+000326 7bdf
+000327 e000
+000328 9300 006c 	ld_cpuY		PL						;load PC with indriect value
+00032a 95c3      	inc			YL						;NOTE, not using Y+ because of CPU bug which does not carry the carry to high byte
+00032b 31d1
+00032c f010
+00032d 81b8
+00032e c009
+00032f e002
+000330 9300 006c
+000332 64d0
+000333 81b8
+000334 7bdf
+000335 e000
+000336 9300 006c 	ld_cpuY		PH
+000338 cd38      	rjmp	next_op
+                 
+                 op_STY:									;Store Y to memory						
+000339 d1e0      	rcall 	get_value_10
+00033a 2f87      	mov		retL,Yr
+00033b 31f1
+00033c f030
+00033d 2f0f
+00033e 7f00
+00033f 3800
+000340 f059
+000341 8380
+000342 c009
+000343 e002
+000344 9300 006c
+000346 64f0
+000347 8380
+000348 7bff
+000349 e000
+00034a 9300 006c 	st_cpuZ retL
+00034c cd24      	rjmp	next_op
+                 op_LDY:
+00034d d1cc      	rcall 	get_value_10
+00034e 2f78      	mov		Yr,retL
+                 
+00034f 2d1d
+000350 2377
+000351 b70f
+000352 ff02
+000353 7f1b
+000354 fd02
+000355 6014
+000356 ff01
+000357 7f1d
+000358 fd01
+000359 6012
+00035a 2ed1      	move_to_reg Yr
+00035b cd15      	rjmp	next_op
+                 op_CPY:									;Compare Y with memory
+00035c d1bd      	rcall	get_value_10
+00035d 1778
+00035e f010
+00035f 9408
+000360 c001
+000361 9488
+000362 b6df      	cp1		Yr,retL
+                 
+000363 cd0d      	rjmp	next_op
+                 op_CPX:									;Compare X with memory
+000364 d1b5      	rcall	get_value_10
+                 
+000365 1768
+000366 f010
+000367 9408
+000368 c001
+000369 9488
+00036a b6df      	cp1		Xr,retL
+                 
+00036b cd05      	rjmp	next_op
+                 ;--BRANCHES---
+                 
+                 op_BPL:									;Branch if Positive (N = 0)
+00036c 2d0d      	mov		r16,Pstat1
+00036d ff02      	sbrs	r16,Ns
+00036e c346      	rjmp	Branch_take
+00036f 9611      	adiw	PL,1						;skip over address if no branch
+000370 cd00      	rjmp	next_op
+                 			
+                 op_BMI:									;Branch if minus (N = 1)
+000371 2d0d      	mov		r16,Pstat1
+000372 fd02      	sbrc	r16,Ns
+000373 c341      	rjmp	Branch_take
+000374 9611      	adiw	PL,1				;skip over address if no branch
+000375 ccfb      	rjmp	next_op
+                 op_BVC:							;Branch if (O = 0)
+000376 2d0e      	mov		r16,Pstat2
+000377 ff06      	sbrs	r16,Os
+000378 c33c      	rjmp	Branch_take
+000379 9611      	adiw	PL,1				;skip over address if no branch
+00037a ccf6      	rjmp	next_op
+                 
+                 op_BVS:							;Branch if (O = 1)
+00037b 2d0e      	mov		r16,Pstat2
+00037c fd06      	sbrc	r16,Os
+00037d c337      	rjmp	Branch_take
+00037e 9611      	adiw	PL,1				;skip over address if no branch
+00037f ccf1      	rjmp	next_op
+                 op_BCC:							;Branch is Carry clear
+000380 2d0d      	mov		r16,Pstat1
+000381 ff00      	sbrs	r16,Cs
+000382 c332      	rjmp	Branch_take
+000383 9611      	adiw	PL,1				;skip over address if no branch
+000384 ccec      	rjmp	next_op
+                 op_BCS:
+000385 2d0d      	mov		r16,Pstat1
+000386 fd00      	sbrc	r16,Cs
+000387 c32d      	rjmp	Branch_take
+000388 9611      	adiw	PL,1				;skip over address if no branch
+000389 cce7      	rjmp	next_op
+                 op_BNE:							;Branch is (Z=0)
+00038a 2d0d      	mov		r16,Pstat1
+00038b ff01      	sbrs	r16,Zs
+00038c c328      	rjmp	Branch_take
+00038d 9611      	adiw	PL,1				;skip over address if no branch
+00038e cce2      	rjmp	next_op
+                 op_BEQ:
+00038f 2d0d      	mov		r16,Pstat1
+000390 fd01      	sbrc	r16,Zs
+000391 c323      	rjmp	Branch_take
+000392 9611      	adiw	PL,1				;skip over address if no branch
+000393 ccdd      	rjmp	next_op
+                 
+                 op_BRK:
+                 	;TODO
+000394 e402      	ldi		r16,'B'
+000395 ddcc      	rcall	rs232_0_tx
+000396 0000      	nop
+000397 0000      	nop
+000398 ccd8      	rjmp	next_op
+                 op_JSRA:
+000399 31b1
+00039a f010
+00039b 911d
+00039c c009
+00039d e002
+00039e 9300 006c
+0003a0 64b0
+0003a1 911d
+0003a2 7bbf
+0003a3 e000
+0003a4 9300 006c 	get_pc_mem	r17				;get jump address
+0003a6 e0f1
+0003a7 2def
+0003a8 e002
+0003a9 9300 006c
+0003ab 64f0
+0003ac 83b0
+0003ad 7bff
+0003ae e000
+0003af 9300 006c
+0003b1 94fa      	stack_push	PH				;push address to stack, done here because accutaly save PC-1
+0003b2 e0f1
+0003b3 2def
+0003b4 e002
+0003b5 9300 006c
+0003b7 64f0
+0003b8 83a0
+0003b9 7bff
+0003ba e000
+0003bb 9300 006c
+0003bd 94fa      	stack_push	PL
+0003be 31b1
+0003bf f010
+0003c0 912d
+0003c1 c009
+0003c2 e002
+0003c3 9300 006c
+0003c5 64b0
+0003c6 912d
+0003c7 7bbf
+0003c8 e000
+0003c9 9300 006c 	get_pc_mem 	r18 			;get high jump address
+                 	
+0003cb 2fa1      	mov		PL,r17
+0003cc 2fb2      	mov		PH,r18								
+0003cd cca3      	rjmp	next_op
+                 
+                 op_RTI:
+0003ce 94f3
+0003cf e0f1
+0003d0 2def
+0003d1 e002
+0003d2 9300 006c
+0003d4 64f0
+0003d5 8180
+0003d6 7bff
+0003d7 e000
+0003d8 9300 006c 	stack_pop	retL
+0003da d2f5      	rcall	stack_decomp
+0003db 94f3
+0003dc e0f1
+0003dd 2def
+0003de e002
+0003df 9300 006c
+0003e1 64f0
+0003e2 81a0
+0003e3 7bff
+0003e4 e000
+0003e5 9300 006c 	stack_pop	PL
+0003e7 94f3
+0003e8 e0f1
+0003e9 2def
+0003ea e002
+0003eb 9300 006c
+0003ed 64f0
+0003ee 81b0
+0003ef 7bff
+0003f0 e000
+0003f1 9300 006c 	stack_pop	PH
+0003f3 0000      	nop	;TODO
+0003f4 0000      	nop
+0003f5 cc7b      	rjmp	next_op
+                 
+                 op_RTS:
+0003f6 94f3
+0003f7 e0f1
+0003f8 2def
+0003f9 e002
+0003fa 9300 006c
+0003fc 64f0
+0003fd 81a0
+0003fe 7bff
+0003ff e000
+000400 9300 006c 	stack_pop	PL				;get return address from stack
+000402 94f3
+000403 e0f1
+000404 2def
+000405 e002
+000406 9300 006c
+000408 64f0
+000409 81b0
+00040a 7bff
+00040b e000
+00040c 9300 006c 	stack_pop	PH
+                 
+00040e 9611      	adiw		PL,1			;add on to PC
+                 
+00040f cc61      	rjmp	next_op
+                 
+                 
+                 ;--------SPECIAL CASES and operations only on the accumulator---------
+                 op_ASL_A:							;logical shift left
+000410 0f55      	lsl		A
+                 
+000411 b6df      	in		Pstat1,SREG				;save status bits
+000412 cc5e      	rjmp	next_op
+                 
+                 op_ROL_A:							;shift left with carry
+000413 bedf      	out		SREG,Pstat1				;restor status reg for carry op
+                 
+000414 1f55      	rol		A
+                 
+000415 b6df      	in		Pstat1,SREG				;save status bits
+000416 cc5a      	rjmp	next_op
+                 
+                 
+                 op_LSR_A:
+000417 9556      	lsr		A
+                 
+000418 b6df      	in		Pstat1,SREG				;save status bits
+000419 cc57      	rjmp	next_op
+                 op_ROR_A:
+00041a bedf      	out		SREG,Pstat1				;restor status reg for carry op
+                 
+00041b 9557      	ror		A
+                 
+00041c b6df      	in		Pstat1,SREG				;save status bits
+00041d cc53      	rjmp	next_op
+                 
+                 op_STX_ZPY:										;Store X to memory
+00041e d210      	rcall	get_value_ZP_idx_Y
+                 
+00041f 2f86      	mov		retL,Xr
+000420 31f1
+000421 f030
+000422 2f0f
+000423 7f00
+000424 3800
+000425 f059
+000426 8380
+000427 c009
+000428 e002
+000429 9300 006c
+00042b 64f0
+00042c 8380
+00042d 7bff
+00042e e000
+00042f 9300 006c 	st_cpuZ retL
+000431 cc3f      	rjmp	next_op
+                 
+                 op_LDX_ZPY:
+000432 d1fc      	rcall	get_value_ZP_idx_Y
+000433 2f68      	mov		Xr,retL
+                 
+000434 2d1d
+000435 2366
+000436 b70f
+000437 ff02
+000438 7f1b
+000439 fd02
+00043a 6014
+00043b ff01
+00043c 7f1d
+00043d fd01
+00043e 6012
+00043f 2ed1      	move_to_reg Xr
+000440 cc30      	rjmp	next_op
+                 
+                 op_LDX_XY:
+000441 d211      	rcall	get_value_ZP_abs_idx_Y
+000442 2f68      	mov		Xr,retL
+                 
+000443 2d1d
+000444 2366
+000445 b70f
+000446 ff02
+000447 7f1b
+000448 fd02
+000449 6014
+00044a ff01
+00044b 7f1d
+00044c fd01
+00044d 6012
+00044e 2ed1      	move_to_reg Xr
+00044f cc21      	rjmp	next_op
+                 op_PHP:
+000450 d278      	rcall	stack_build
+000451 e0f1
+000452 2def
+000453 e002
+000454 9300 006c
+000456 64f0
+000457 8380
+000458 7bff
+000459 e000
+00045a 9300 006c
+00045c 94fa      	stack_push retL
+00045d cc13      	rjmp	next_op
+                 
+                 op_PLP:
+00045e 94f3
+00045f e0f1
+000460 2def
+000461 e002
+000462 9300 006c
+000464 64f0
+000465 8180
+000466 7bff
+000467 e000
+000468 9300 006c 	stack_pop	retL
+00046a d265      	rcall	stack_decomp
+00046b cc05      	rjmp	next_op
+                 op_PHA:
+00046c e0f1
+00046d 2def
+00046e e002
+00046f 9300 006c
+000471 64f0
+000472 8350
+000473 7bff
+000474 e000
+000475 9300 006c
+000477 94fa      	stack_push A
+000478 cbf8      	rjmp	next_op
+                 op_PLA:
+000479 94f3
+00047a e0f1
+00047b 2def
+00047c e002
+00047d 9300 006c
+00047f 64f0
+000480 8150
+000481 7bff
+000482 e000
+000483 9300 006c 	stack_pop A
+000485 2d1d
+000486 2355
+000487 b70f
+000488 ff02
+000489 7f1b
+00048a fd02
+00048b 6014
+00048c ff01
+00048d 7f1d
+00048e fd01
+00048f 6012
+000490 2ed1      	move_to_reg A
+000491 cbdf      	rjmp	next_op
+                 op_DEY:
+000492 bedf      	out		SREG,Pstat1				;restor SREG so carry isnt changed
+000493 957a      	dec		Yr						;perform dec
+000494 b6df      	in		Pstat1,SREG				;save changed N and Z
+000495 cbdb      	rjmp	next_op
+                 
+                 op_TAY:								;Transfer A to Y
+                 
+000496 2f75      	mov		Yr,A				;
+                 
+000497 2d1d
+000498 2377
+000499 b70f
+00049a ff02
+00049b 7f1b
+00049c fd02
+00049d 6014
+00049e ff01
+00049f 7f1d
+0004a0 fd01
+0004a1 6012
+0004a2 2ed1      	move_to_reg Yr
+0004a3 cbcd      	rjmp	next_op
+                 
+                 op_INY:
+0004a4 bedf      	out		SREG,Pstat1	
+0004a5 9573      	inc		Yr
+0004a6 b6df      	in		Pstat1,SREG	
+0004a7 cbc9      	rjmp	next_op
+                 
+                 op_INX:
+0004a8 bedf      	out		SREG,Pstat1	
+0004a9 9563      	inc		Xr
+0004aa b6df      	in		Pstat1,SREG	
+0004ab cbc5      	rjmp	next_op
+                 
+                 op_CLC:
+0004ac 2d0d      	mov		r16,Pstat1
+0004ad 7f0e      	cbr		r16,EXP2(Cs)
+0004ae 2ed0      	mov		Pstat1,r16
+0004af cbc1      	rjmp	next_op
+                 op_SEC:
+0004b0 2d0d      	mov		r16,Pstat1
+0004b1 6001      	sbr		r16,EXP2(Cs)
+0004b2 2ed0      	mov		Pstat1,r16
+0004b3 cbbd      	rjmp	next_op
+                 op_CLI:
+0004b4 2d0e      	mov		r16,Pstat2
+0004b5 770f      	cbr		r16,EXP2(Is)
+0004b6 2ee0      	mov		Pstat2,r16
+0004b7 cbb9      	rjmp	next_op
+                 op_SEI:
+0004b8 2d0e      	mov		r16,Pstat2
+0004b9 6800      	sbr		r16,EXP2(Is)
+0004ba 2ee0      	mov		Pstat2,r16
+0004bb cbb5      	rjmp	next_op
+                 op_TYA:							;Transfer Y to A
+0004bc 2f57      	mov		A,Yr				;
+                 
+0004bd 2d1d
+0004be 2355
+0004bf b70f
+0004c0 ff02
+0004c1 7f1b
+0004c2 fd02
+0004c3 6014
+0004c4 ff01
+0004c5 7f1d
+0004c6 fd01
+0004c7 6012
+0004c8 2ed1      	move_to_reg A
+0004c9 cba7      	rjmp	next_op
+                 op_CLV:
+0004ca 2d0e      	mov		r16,Pstat2
+0004cb 7b0f      	cbr		r16,EXP2(Os)
+0004cc 2ee0      	mov		Pstat2,r16
+0004cd cba3      	rjmp	next_op
+                 
+                 op_CLD:
+0004ce 2d0e      	mov		r16,Pstat2
+0004cf 7f07      	cbr		r16,EXP2(Ds)
+0004d0 2ee0      	mov		Pstat2,r16
+0004d1 cb9f      	rjmp	next_op
+                 op_SED:
+0004d2 2d0e      	mov		r16,Pstat2
+0004d3 6008      	sbr		r16,EXP2(Ds)
+0004d4 2ee0      	mov		Pstat2,r16
+0004d5 cb9b      	rjmp	next_op
+                 op_TXA:							;TRans X to A
+0004d6 2f56      	mov		A,Xr				;
+                 
+0004d7 2d1d
+0004d8 2355
+0004d9 b70f
+0004da ff02
+0004db 7f1b
+0004dc fd02
+0004dd 6014
+0004de ff01
+0004df 7f1d
+0004e0 fd01
+0004e1 6012
+0004e2 2ed1      	move_to_reg A
+0004e3 cb8d      	rjmp	next_op
+                 op_TXS:							;transfer X to stack pointer
+0004e4 2ef6      	mov		stack,Xr
+0004e5 cb8b      	rjmp	next_op
+                 
+                 	
+                 op_TAX:							;Transfer A to X
+0004e6 2f65      	mov		Xr,A				;
+                 
+0004e7 2d1d
+0004e8 2366
+0004e9 b70f
+0004ea ff02
+0004eb 7f1b
+0004ec fd02
+0004ed 6014
+0004ee ff01
+0004ef 7f1d
+0004f0 fd01
+0004f1 6012
+0004f2 2ed1      	move_to_reg Xr
+0004f3 cb7d      	rjmp	next_op
+                 
+                 op_TSX:
+0004f4 2d6f      	mov		Xr,stack				;
+                 
+0004f5 2d1d
+0004f6 2366
+0004f7 b70f
+0004f8 ff02
+0004f9 7f1b
+0004fa fd02
+0004fb 6014
+0004fc ff01
+0004fd 7f1d
+0004fe fd01
+0004ff 6012
+000500 2ed1      	move_to_reg Xr
+000501 cb6f      	rjmp	next_op
+                 
+                 op_DEX:
+000502 bedf      	out		SREG,Pstat1				;restor SREG so carry isnt changed
+000503 956a      	dec		Xr						;perform dec
+000504 b6df      	in		Pstat1,SREG				;save changed N and Z
+000505 cb6b      	rjmp	next_op
+                 op_NOP:								;nopys
+000506 0000      	nop
+000507 0000      	nop
+000508 cb68      	rjmp	next_op
+                 ;---------------------------
+                 ;---------------------------
+                 ;---------------------------
+                 get_value_01:						;MEMORY type decoder for xxxxxx01 opcodes
+000509 7388      	andi	retL,0b00111000			;retL still contains opcode, but lsl by one, get mask of memory access type
+                 									;should be a fatser way of doing this with jump tables
+                 									;for now, order with most frequently used at top
+                 
+00050a 3080      	cpi		retL,0b00000000
+00050b f0d9      	breq	get_value_ZP_inx_X_indirj 	
+                 
+00050c 3088      	cpi		retL,0b00001000
+00050d f0d1      	breq	get_value_ZPj
+                 
+00050e 3180      	cpi		retL,0b00010000
+00050f f0c9      	breq	get_value_imedj
+                 
+000510 3188      	cpi		retL,0b00011000
+000511 f0c1      	breq	get_value_absj
+                 
+000512 3280      	cpi		retL,0b00100000
+000513 f0b9      	breq	get_value_ZP_indir_idx_Yj
+                 
+000514 3288      	cpi		retL,0b00101000
+000515 f0b1      	breq	get_value_ZP_idx_Xj
+                 
+                 
+000516 3380      	cpi		retL,0b00110000
+000517 f0b1      	breq	get_value_ZP_abs_idx_Yj
+                 
+000518 3388      	cpi		retL,0b00111000
+000519 f0a9      	breq	get_value_ZP_abs_idx_Xj
+                 ;---------------------------------
+                 get_value_10:						;MEMORY type decoder for xxxxxx10 opcodes
+00051a 7388      	andi	retL,0b00111000			
+                 								
+00051b 3080      	cpi		retL,0b00000000
+00051c f061      	breq	get_value_imedj
+                 	
+00051d 3088      	cpi		retL,0b00001000
+00051e f049      	breq	get_value_ZPj
+                 
+00051f 3180      	cpi		retL,0b00010000
+000520 f079      	breq	get_value_accumj
+                 
+000521 3188      	cpi		retL,0b00011000
+000522 f039      	breq	get_value_absj
+                 
+000523 3288      	cpi		retL,0b00101000
+000524 f039      	breq	get_value_ZP_idx_Xj
+                 
+000525 3388      	cpi		retL,0b00111000
+000526 f041      	breq	get_value_ZP_abs_idx_Xj
+                 
+                 get_value_ZP_inx_X_indirj:
+000527 c009      	rjmp	get_value_ZP_inx_X_indir
+                 get_value_ZPj:
+000528 c046      	rjmp	get_value_ZP
+                 get_value_imedj:
+000529 c067      	rjmp	get_value_imed
+                 get_value_absj:
+00052a c074      	rjmp	get_value_abs
+                 get_value_ZP_indir_idx_Yj:
+00052b c0a1      	rjmp	get_value_ZP_indir_idx_Y
+                 get_value_ZP_idx_Xj:
+00052c c0de      	rjmp	get_value_ZP_idx_X
+                 get_value_ZP_idx_Yj:
+00052d c101      	rjmp	get_value_ZP_idx_Y
+                 get_value_ZP_abs_idx_Yj:
+00052e c124      	rjmp	get_value_ZP_abs_idx_Y
+                 get_value_ZP_abs_idx_Xj:
+00052f c153      	rjmp	get_value_ZP_abs_idx_X
+                 get_value_accumj:
+000530 c182      	rjmp	get_value_accum
+                 
+                 ;----------------------------
+                 get_value_ZP_inx_X_indir:			;Zero page index X, indirect
+                 
+000531 e0d0      	ldi		YH,ZP_offset					;Zero page, so high byte 0
+000532 31b1
+000533 f010
+000534 91cd
+000535 c009
+000536 e002
+000537 9300 006c
+000539 64b0
+00053a 91cd
+00053b 7bbf
+00053c e000
+00053d 9300 006c 	get_pc_mem YL					;get next byte into YL
+00053f 0fc6      	add		YL,Xr					
+000540 1dd3      	adc		YH,zero_reg
+                 
+000541 31d1
+000542 f010
+000543 91e9
+000544 c009
+000545 e002
+000546 9300 006c
+000548 64d0
+000549 91e9
+00054a 7bdf
+00054b e000
+00054c 9300 006c 	ld_cpuYp ZL						;now load Z with indrected address Y
+00054e 31d1
+00054f f010
+000550 81f8
+000551 c009
+000552 e002
+000553 9300 006c
+000555 64d0
+000556 81f8
+000557 7bdf
+000558 e000
+000559 9300 006c 	ld_cpuY	 ZH
+                 
+00055b 2f0f
+00055c 3901
+00055d f071
+00055e 31f1
+00055f f010
+000560 8180
+000561 c00c
+000562 e002
+000563 9300 006c
+000565 64f0
+000566 8180
+000567 7bff
+000568 e000
+000569 9300 006c
+00056b c002
+00056c dc2c
+00056d 2f88      	ld_cpuZ	retL					;load actual value!
+00056e 9508      	ret
+                 
+                 
+                 get_value_ZP:						;Zero Page
+                 	
+00056f e0f0      	ldi		ZH,ZP_offset			;Zero page..
+000570 31b1
+000571 f010
+000572 91ed
+000573 c009
+000574 e002
+000575 9300 006c
+000577 64b0
+000578 91ed
+000579 7bbf
+00057a e000
+00057b 9300 006c 	get_pc_mem ZL					;Get pos in ZP
+                 
+00057d 2f0f
+00057e 3901
+00057f f071
+000580 31f1
+000581 f010
+000582 8180
+000583 c00c
+000584 e002
+000585 9300 006c
+000587 64f0
+000588 8180
+000589 7bff
+00058a e000
+00058b 9300 006c
+00058d c002
+00058e dc0a
+00058f 2f88      	ld_cpuZ	retL					;load value
+000590 9508      	ret
+                 
+                 
+                 get_value_imed:						;immediate mode
+000591 31b1
+000592 f010
+000593 918d
+000594 c009
+000595 e002
+000596 9300 006c
+000598 64b0
+000599 918d
+00059a 7bbf
+00059b e000
+00059c 9300 006c 	get_pc_mem retL
+00059e 9508      	ret
+                 
+                 get_value_abs:						;get absolute (one byte)
+00059f 31b1
+0005a0 f010
+0005a1 91ed
+0005a2 c009
+0005a3 e002
+0005a4 9300 006c
+0005a6 64b0
+0005a7 91ed
+0005a8 7bbf
+0005a9 e000
+0005aa 9300 006c 	get_pc_mem ZL
+0005ac 31b1
+0005ad f010
+0005ae 91fd
+0005af c009
+0005b0 e002
+0005b1 9300 006c
+0005b3 64b0
+0005b4 91fd
+0005b5 7bbf
+0005b6 e000
+0005b7 9300 006c 	get_pc_mem ZH
+                 	
+0005b9 2f0f
+0005ba 3901
+0005bb f071
+0005bc 31f1
+0005bd f010
+0005be 8180
+0005bf c00c
+0005c0 e002
+0005c1 9300 006c
+0005c3 64f0
+0005c4 8180
+0005c5 7bff
+0005c6 e000
+0005c7 9300 006c
+0005c9 c002
+0005ca dbce
+0005cb 2f88      	ld_cpuZ	retL
+0005cc 9508      	ret
+                 
+                 get_value_ZP_indir_idx_Y:			;Zero page indirect, indexed Y
+0005cd e0d0      	ldi		YH,ZP_offset
+0005ce 31b1
+0005cf f010
+0005d0 91cd
+0005d1 c009
+0005d2 e002
+0005d3 9300 006c
+0005d5 64b0
+0005d6 91cd
+0005d7 7bbf
+0005d8 e000
+0005d9 9300 006c 	get_pc_mem YL
+                 
+0005db 31d1
+0005dc f010
+0005dd 91e9
+0005de c009
+0005df e002
+0005e0 9300 006c
+0005e2 64d0
+0005e3 91e9
+0005e4 7bdf
+0005e5 e000
+0005e6 9300 006c 	ld_cpuYp ZL						;now load Z with indrected address Y
+0005e8 31d1
+0005e9 f010
+0005ea 81f8
+0005eb c009
+0005ec e002
+0005ed 9300 006c
+0005ef 64d0
+0005f0 81f8
+0005f1 7bdf
+0005f2 e000
+0005f3 9300 006c 	ld_cpuY	 ZH
+                 
+0005f5 0fe7      	add		ZL,Yr					;add Y reg for indexing
+0005f6 1df3      	adc		ZH,zero_reg				;no wrap around on this one
+                 
+0005f7 2f0f
+0005f8 3901
+0005f9 f071
+0005fa 31f1
+0005fb f010
+0005fc 8180
+0005fd c00c
+0005fe e002
+0005ff 9300 006c
+000601 64f0
+000602 8180
+000603 7bff
+000604 e000
+000605 9300 006c
+000607 c002
+000608 db90
+000609 2f88      	ld_cpuZ	retL					;load value
+00060a 9508      	ret
+                 
+                 get_value_ZP_idx_X:					;Zero page indexd X
+00060b e0f0      	ldi		ZH,ZP_offset
+00060c 31b1
+00060d f010
+00060e 91ed
+00060f c009
+000610 e002
+000611 9300 006c
+000613 64b0
+000614 91ed
+000615 7bbf
+000616 e000
+000617 9300 006c 	get_pc_mem ZL
+                 
+000619 0fe6      	add		ZL,Xr					;add index, 
+00061a 1df3      	adc		ZH,zero_reg
+                 
+00061b 2f0f
+00061c 3901
+00061d f071
+00061e 31f1
+00061f f010
+000620 8180
+000621 c00c
+000622 e002
+000623 9300 006c
+000625 64f0
+000626 8180
+000627 7bff
+000628 e000
+000629 9300 006c
+00062b c002
+00062c db6c
+00062d 2f88      	ld_cpuZ	retL					;get value
+00062e 9508      	ret
+                 
+                 
+                 get_value_ZP_idx_Y:					;Zero page indexd Y (only used with LDX and STX)
+00062f e0f0      	ldi		ZH,ZP_offset
+000630 31b1
+000631 f010
+000632 91ed
+000633 c009
+000634 e002
+000635 9300 006c
+000637 64b0
+000638 91ed
+000639 7bbf
+00063a e000
+00063b 9300 006c 	get_pc_mem ZL
+                 
+00063d 0fe7      	add		ZL,Yr					;add index, with wrap around..humm TODO..?
+00063e 1df3      	adc		ZH,zero_reg
+                 
+00063f 2f0f
+000640 3901
+000641 f071
+000642 31f1
+000643 f010
+000644 8180
+000645 c00c
+000646 e002
+000647 9300 006c
+000649 64f0
+00064a 8180
+00064b 7bff
+00064c e000
+00064d 9300 006c
+00064f c002
+000650 db48
+000651 2f88      	ld_cpuZ	retL					;get value
+000652 9508      	ret
+                 
+                 get_value_ZP_abs_idx_Y:				;absolute, indexd with Y
+000653 31b1
+000654 f010
+000655 91ed
+000656 c009
+000657 e002
+000658 9300 006c
+00065a 64b0
+00065b 91ed
+00065c 7bbf
+00065d e000
+00065e 9300 006c 	get_pc_mem ZL					;get absolut value
+000660 31b1
+000661 f010
+000662 91fd
+000663 c009
+000664 e002
+000665 9300 006c
+000667 64b0
+000668 91fd
+000669 7bbf
+00066a e000
+00066b 9300 006c 	get_pc_mem ZH
+                 
+00066d 0fe7      	add		ZL,Yr
+00066e 1df3      	adc		ZH,zero_reg
+                 	
+00066f 2f0f
+000670 3901
+000671 f071
+000672 31f1
+000673 f010
+000674 8180
+000675 c00c
+000676 e002
+000677 9300 006c
+000679 64f0
+00067a 8180
+00067b 7bff
+00067c e000
+00067d 9300 006c
+00067f c002
+000680 db18
+000681 2f88      	ld_cpuZ	retL
+000682 9508      	ret
+                 	
+                 get_value_ZP_abs_idx_X:				;absolute, indexd with X
+000683 31b1
+000684 f010
+000685 91ed
+000686 c009
+000687 e002
+000688 9300 006c
+00068a 64b0
+00068b 91ed
+00068c 7bbf
+00068d e000
+00068e 9300 006c 	get_pc_mem ZL					;get absolut value
+000690 31b1
+000691 f010
+000692 91fd
+000693 c009
+000694 e002
+000695 9300 006c
+000697 64b0
+000698 91fd
+000699 7bbf
+00069a e000
+00069b 9300 006c 	get_pc_mem ZH
+                 
+00069d 0fe6      	add		ZL,Xr
+00069e 1df3      	adc		ZH,zero_reg
+                 	
+00069f 2f0f
+0006a0 3901
+0006a1 f071
+0006a2 31f1
+0006a3 f010
+0006a4 8180
+0006a5 c00c
+0006a6 e002
+0006a7 9300 006c
+0006a9 64f0
+0006aa 8180
+0006ab 7bff
+0006ac e000
+0006ad 9300 006c
+0006af c002
+0006b0 dae8
+0006b1 2f88      	ld_cpuZ	retL
+0006b2 9508      	ret
+                 
+                 get_value_accum:					;accumulator,	Should not use this, there should be special cases for A ops
+                 
+0006b3 2f85      	mov		retL,A
+0006b4 9508      	ret
+                 
+                 
+                 
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 ;Branch_take
+                 	
+                 ;purpose: 	if a branch is sucessfull
+                 ;Takes: 	
+                 ;Give:		
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 
+                 
+                 Branch_take:
+0006b5 31b1
+0006b6 f010
+0006b7 912d
+0006b8 c009
+0006b9 e002
+0006ba 9300 006c
+0006bc 64b0
+0006bd 912d
+0006be 7bbf
+0006bf e000
+0006c0 9300 006c 	get_pc_mem r18					;get branch modifiyer
+                 
+0006c2 fd27      	sbrc	r18,7					;gotta go signed 8 bit X 16 bit unsigned
+0006c3 ef1f      	ldi		r17,0xff				;todo FIX, DONT USE R16
+0006c4 ff27      	sbrs	r18,7
+0006c5 e010      	ldi		r17,0
+                 	
+0006c6 0fa2      	add		PL,r18
+0006c7 1fb1      	adc		PH,r17
+0006c8 c9a8      	rjmp	next_op
+                 
+                 
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 ;stack_build TODO: make a macro
+                 	
+                 ;purpose: 	Here teh stack is stored as 2 bytes for speed, in order to store on the stack
+                 			;it must be built into one byte
+                 ;Takes: 	
+                 ;Give:		retL as built stack
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 stack_build:
+                 
+0006c9 2d0d      	mov		r16,Pstat1					;copy byte for bottom 3 bits (C,Z,N)
+0006ca 7007      	andi	r16,0b00000111				;clear top bits
+0006cb 2d1e      	mov		r17,Pstat2					
+0006cc 7f18      	andi	r17,0b11111000
+0006cd 2b01      	or		r16,r17
+0006ce 2f80      	mov		retL,r16
+0006cf 9508      	ret
+                 
+                 
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 ;stack_decomp TODO: make a macro
+                 	
+                 ;purpose: 	reverse of stack_build
+                 			
+                 ;Takes: 	retL 
+                 ;Give:		
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 stack_decomp:
+0006d0 2ed8      	mov		Pstat1,retL
+0006d1 2ee8      	mov		Pstat2,retL
+                 
+0006d2 9508      	ret
+                 op_INVALID:
+0006d3 e506      	ldi		r16,'V'
+0006d4 da8d      	rcall	rs232_0_tx
+0006d5 c99b      	rjmp	next_op
+                 
+0006d6 cfff      p:	rjmp p
+                 
+                 
+                 
+                 
+                 
+                 	
+                 
+                 
+                 .include "io.asm"
+                 
+                 
+                 lcd_debug_rx_wait:
+0006d7 9b5f      	sbis	UCSR0A,RXC0					;wait for first byte
+0006d8 cffe      	rjmp	lcd_debug_rx_wait
+                 
+                 
+0006d9 b11c      	in		r17,UDR0
+                 
+                 lcd_debug_rx_wait1:
+0006da 9b5f      	sbis	UCSR0A,RXC0				;wiat for second byte
+0006db cffe      	rjmp	lcd_debug_rx_wait1
+                 
+0006dc b10c      	in		r16,UDR0				;put data on port
+                 			
+0006dd d068      	rcall	lcd_send_data
+                 
+                 	
+                 
+                 lcd_debug_TX:
+0006de 9b5d      	sbis	UCSR0A,UDRE0
+0006df cffe      	rjmp	lcd_debug_TX
+0006e0 b90c      	out		UDR0,r16
+                 	
+                 
+                 
+0006e1 cff5      rjmp	lcd_debug
+                 
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 ;cursor_address
+                 	
+                 ;purpose: 	calculates memory address of cursor
+                 ;Takes: 	cus_x,cus_y
+                 ;Give:		address in r0:r1
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 cursor_address:
+0006e2 930f      	push	r16
+0006e3 931f      	push	r17
+                 
+0006e4 2d0c      	mov		r16,cus_y
+0006e5 e510      	ldi		r17,chars_line
+0006e6 9f10      	mul		r17,r16
+0006e7 2711      	clr		r17
+0006e8 0c0b      	add		r0,cus_x
+0006e9 1e11      	adc		r1,r17
+                 
+0006ea 911f      	pop		r17
+0006eb 910f      	pop		r16
+0006ec 9508      	ret
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 ;lcd_set_cursor
+                 	
+                 ;purpose: 	sets cursor memory address
+                 ;Takes: 	r0,r1 as address
+                 ;Give:		na
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------	
+                 
+                 lcd_set_cursor:
+0006ed 931f      	push	r17
+0006ee 930f      	push	r16
+                 
+0006ef 9200 09d0 	sts		vram_address,r0		;update vram address also
+0006f1 9210 09d1 	sts		vram_address+1,r1
+                 
+0006f3 e011      	ldi		r17,1				;command
+0006f4 e406      	ldi		r16,0x46
+0006f5 d050      	rcall	lcd_send_data
+                 
+0006f6 2711      	clr		r17
+                 	
+0006f7 2d00      	mov		r16,r0
+0006f8 d04d      	rcall	lcd_send_data
+                 
+0006f9 2d01      	mov		r16,r1
+0006fa d04b      	rcall	lcd_send_data
+                 
+0006fb 910f      	pop		r16
+0006fc 911f      	pop		r17
+0006fd 9508      	ret
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 ;lcd_print_chr
+                 	
+                 ;purpose: 	print char to screen at current location
+                 ;Takes: 	r16 as char
+                 ;Give:		na
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------	
+                 lcd_print_chr:
+0006fe 930f      	push	r16
+0006ff 931f      	push	r17
+000700 932f      	push	r18
+000701 93ef      	push	ZL
+000702 93ff      	push	ZH
+                 
+                 
+000703 2f20      	mov		r18,r16
+                 
+000704 e011      	ldi		r17,1						;send to lcd
+000705 e402      	ldi		r16,0x42
+000706 d03f      	rcall	lcd_send_data
+                 
+000707 2711      	clr		r17
+                 
+000708 2f02      	mov		r16,r18
+000709 d03c      	rcall	lcd_send_data
+                 
+00070a 9100 09d0 	lds		r16,vram_address
+00070c 9110 09d1 	lds		r17,vram_address+1
+                 
+00070e e0e0      	ldi		ZL,low(vram_text)
+00070f e0f2      	ldi		ZH,high(vram_text)
+                 
+000710 0fe0      	add		ZL,r16						;add on address offset
+000711 1ff1      	adc		ZH,r17
+                 
+000712 9321      	st		Z+,r18						;auto increment
+                 
+000713 2722      	clr		r18							;ind vram address
+000714 9503      	inc		r16
+000715 1f12      	adc		r17,r18
+                 
+000716 9300 09d0 	sts		vram_address,r16				;update address
+000718 9310 09d1 	sts		vram_address+1,r17
+                 
+                 
+                 
+00071a 91ff      	pop		ZH
+00071b 91ef      	pop		ZL
+00071c 912f      	pop		r18
+00071d 911f      	pop		r17
+00071e 910f      	pop		r16
+                 
+00071f 9508      	ret
+                 
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 ;lcd_print_chr_cursor
+                 	
+                 ;purpose: 	print char to screen at current CURSOR location, so changes lcd cursor address unlike one above
+                 ;Takes: 	r16 as char,cus_x,cusy
+                 ;Give:		na
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------	
+                 lcd_print_chr_cursor:
+000720 920f      	push	r0
+000721 921f      	push	r1
+000722 930f      	push	r16
+000723 931f      	push	r17
+000724 932f      	push	r18
+000725 93ef      	push	ZL
+000726 93ff      	push	ZH
+                 
+000727 dfba      	rcall	cursor_address			;calucates address
+000728 dfc4      	rcall	lcd_set_cursor		
+                 
+000729 2f20      	mov		r18,r16
+                 
+00072a e011      	ldi		r17,1						;send to lcd
+00072b e402      	ldi		r16,0x42
+00072c d019      	rcall	lcd_send_data
+                 
+00072d 2711      	clr		r17
+                 
+00072e 2f02      	mov		r16,r18
+00072f d016      	rcall	lcd_send_data
+                 
+000730 2d00      	mov		r16,r0
+000731 2d11      	mov		r17,r1
+                 
+000732 e0e0      	ldi		ZL,low(vram_text)
+000733 e0f2      	ldi		ZH,high(vram_text)
+                 
+000734 0fe0      	add		ZL,r16						;add on address offset
+000735 1ff1      	adc		ZH,r17
+                 
+000736 9321      	st		Z+,r18						;auto increment
+                 
+000737 2722      	clr		r18							;inc vram address
+000738 9503      	inc		r16
+000739 1f12      	adc		r17,r18
+                 
+00073a 9300 09d0 	sts		vram_address,r16				;update address
+00073c 9310 09d1 	sts		vram_address+1,r17
+                 
+                 
+                 
+00073e 91ff      	pop		ZH
+00073f 91ef      	pop		ZL
+000740 912f      	pop		r18
+000741 911f      	pop		r17
+000742 910f      	pop		r16
+000743 901f      	pop		r1
+000744 900f      	pop		r0
+                 
+000745 9508      	ret
+                 
+                 
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 ;lcd_send_data
+                 	
+                 ;purpose: 	send data for command to lcd
+                 ;Takes: 	r16 and r17
+                 ;Give:		na
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------	
+                 lcd_send_data:
+000746 931f      	push	r17
+000747 930f      	push	r16
+                 
+000748 981e      	cbi		lcd_pins,LCS
+                 
+                 	;rcall	delay_1ms
+                 
+                 
+                 
+000749 ff10      	sbrs	r17,0					;set up a0
+00074a 981f      	cbi		lcd_pins,A0
+00074b fd10      	sbrc	r17,0
+00074c 9a1f      	sbi		lcd_pins,A0
+                 
+00074d bb08      	out 	lcd_data,r16				;put data on port
+                 
+                 
+00074e 0000      	nop
+00074f 0000      	nop
+000750 0000      	nop
+000751 0000      	nop
+                 
+                 
+                 
+000752 981d      	cbi		lcd_pins,WR
+                 
+000753 0000      	nop
+000754 0000      	nop
+000755 0000      	nop
+                 
+000756 9a1d      	sbi		lcd_pins,WR
+                 
+000757 0000      	nop
+000758 0000      	nop
+                 
+                 	;rcall	delay_1ms
+000759 9a1e      	sbi		lcd_pins,LCS
+                 
+00075a 910f      	pop		r16
+00075b 911f      	pop		r17
+                 
+00075c 9508      	ret
+                 
+                 
+                 
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 ;bias_inc
+                 	
+                 ;purpose: 	increment bias one setp
+                 ;Takes: 	na
+                 ;Give:		na
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 
+                 bias_inc:
+00075d 930f      	push	r16
+                 
+00075e 2700      	clr		r16
+00075f 6108      	sbr		r16,EXP2(bias_adj) | EXP2(bias_ctrl)
+000760 9300 0065 	sts		bias_port,r16
+                 
+000762 da5c      	rcall	delay_1ms
+                 
+000763 2700      	clr		r16
+000764 6008      	sbr		r16, EXP2(bias_ctrl)
+000765 9300 0065 	sts		bias_port,r16
+                 
+000767 da57      	rcall	delay_1ms
+                 
+000768 910f      	pop		r16
+000769 9508      	ret
+                 
+                 
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 ;bias_reset
+                 	
+                 ;purpose: 	reset LCD bias to midway
+                 ;Takes: 	na
+                 ;Give:		na
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 bias_reset:
+00076a 930f      	push	r16
+                 
+00076b 2700      	clr		r16
+00076c 6108      	sbr		r16,EXP2(bias_adj) | EXP2(bias_ctrl)
+00076d 9300 0065 	sts		bias_port,r16
+                 
+00076f da4f      	rcall	delay_1ms
+                 
+000770 2700      	clr		r16
+000771 6100      	sbr		r16, EXP2(bias_adj)
+000772 9300 0065 	sts		bias_port,r16
+                 
+000774 da4a      	rcall	delay_1ms
+                 
+000775 2700      	clr		r16
+000776 6108      	sbr		r16,EXP2(bias_adj) | EXP2(bias_ctrl)
+000777 9300 0065 	sts		bias_port,r16
+                 
+                 
+000779 da45      	rcall	delay_1ms
+                 
+00077a 2700      	clr		r16
+00077b 6008      	sbr		r16, EXP2(bias_ctrl)
+00077c 9300 0065 	sts		bias_port,r16
+                 
+00077e da40      	rcall	delay_1ms
+                 
+00077f 910f      	pop		r16
+000780 9508      	ret
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 ;lcd_reset
+                 	
+                 ;purpose: 	reset LCD 
+                 ;Takes: 	na
+                 ;Give:		na
+                 ;----------------------------------------------------------------------
+                 ;----------------------------------------------------------------------
+                 lcd_reset:
+000781 da3d      	rcall	delay_1ms
+000782 9897      	cbi		PORTD,7
+000783 da3b      	rcall	delay_1ms
+000784 9a97      	sbi		PORTD,7
+000785 da39      	rcall	delay_1ms
+000786 da38      	rcall	delay_1ms
+000787 da37      	rcall	delay_1ms
+000788 da36      rcall	delay_1ms
+000789 da35      	rcall	delay_1ms
+00078a 9508      	ret
+                 
+                 
+                 
+                 .include "init.asm"
+                 
+                 ;--setup port directions--
+                 ;bias
+00078b e008      	ldi		r16,EXP2(bias_ctrl)
+00078c 9300 0065 	sts		bias_port,r16
+00078e e108      	ldi		r16,0x18
+00078f 9300 0064 	sts		bias_port-1,r16
+                 ;lcd
+                 
+000791 ef0f      	ldi		r16,255					;data as output
+000792 bb07      	out		lcd_data-1,r16
+000793 e000      	ldi		r16,0
+000794 bb08      	out		lcd_data,r16
+                 
+                 
+000795 9a17      	sbi		lcd_pins-1,A0
+000796 9a15      	sbi		lcd_pins-1,WR
+000797 9a14      	sbi		lcd_pins-1,RD
+000798 9a16      	sbi		lcd_pins-1,LCS
+                 
+000799 9a8f      	sbi		DDRD,7
+                 ;	sbi		lcd_pins-1,LCD_RST
+                 
+00079a 9a97      	sbi		PORTD,7
+                 
+00079b 981f      	cbi		lcd_pins,LCD_RST
+00079c 9a1f      	sbi		lcd_pins,A0
+00079d 9a1d      	sbi		lcd_pins,WR
+00079e 9a1c      	sbi		lcd_pins,RD
+00079f 981e      	cbi		lcd_pins,LCS
+                 
+                 
+                 
+                 ;external memory
+0007a0 ec00      	ldi		r16,128+64
+0007a1 bf05      	out		MCUCR,r16
+                 
+0007a2 e001      	ldi		r16,1
+0007a3 9300 006d 	sts		XMCRA,r16			;wait states
+                 
+                 ;external memory hack
+0007a5 ef0f      	ldi r16, 0xFF				;make top address output if XMMset
+0007a6 bb04      	out DDRC, r16
+0007a7 e000      	ldi r16, 0x00				;Make sure its zero!
+0007a8 bb05      	out PORTC, r16
+                 
+                 ;setup Rs232
+0007a9 e000      	ldi		r16,0x00
+0007aa b90a      	out		UCSR0B,r16
+0007ab b90b      	out   	UCSR0A,r16
+                 	
+0007ac e908      	ldi		r16,0x98				;enable tx,rx and rxint 0x98 (0x18 no int)
+0007ad b90a      	out		UCSR0B,r16
+0007ae e100      	ldi		r16,16					;56000bps
+                 ;	ldi		r16,103					;9600bps
+0007af b909      	out		UBRR0L,r16
+                 
+                 
+                 ;---INITALISE VARIABLE--
+0007b0 24aa      	clr		buff_tail				;points to next char to read
+0007b1 2499      	clr		buff_head				;points to last place stored in buffer,so (head=tail)-> empty, (tail-head = 1)->full
+                 	
+0007b2 24bb      	clr		cus_x
+0007b3 24cc      	clr		cus_y	
+                 	
+0007b4 2700      	clr		r16
+0007b5 9300 09d0 	sts		vram_address,r16
+0007b7 9300 09d1 	sts		vram_address+1,r16			
+                 
+                 
+                 ;------------------------
+                 
+                 
+                 
+                 
+0007b9 da05      	rcall	delay_1ms
+0007ba dfc6      	rcall	lcd_reset
+0007bb da03      	rcall	delay_1ms
+0007bc dfad      	rcall	bias_reset
+0007bd da01      	rcall	delay_1ms
+0007be 981e      	cbi		lcd_pins,LCS
+0007bf d9ff      	rcall	delay_1ms
+0007c0 9a1e      	sbi		lcd_pins,LCS
+                 
+0007c1 e10f      	ldi	r16,31
+                 bias_loop:
+0007c2 df9a      		rcall	bias_inc
+0007c3 950a      		dec		r16
+0007c4 f7e9      	brne	bias_loop
+                 
+0007c5 d026      	rcall	lcd_init
+0007c6 d001      	rcall	clear_text_ram
+                 
+0007c7 9508      	ret
+                 
+                 
+                 
+                 clear_text_ram:
+0007c8 930f      	push	r16
+0007c9 931f      	push	r17
+0007ca 932f      	push	r18
+0007cb 933f      	push	r19
+0007cc 93ef      	push	ZL
+0007cd 93ff      	push	ZH
+                 
+0007ce e0e0      	ldi		ZL,low(vram_text)
+0007cf e0f2      	ldi		ZH,high(vram_text)
+                 
+0007d0 e011      	ldi		r17,1				;command
+0007d1 e402      	ldi		r16,0x42
+0007d2 df73      	rcall	lcd_send_data
+                 
+0007d3 2711      	clr		r17
+                 
+                 
+                 
+0007d4 e139      	ldi		r19,lines_screen
+                 clear_text_ram_l1:
+0007d5 e520      		ldi		r18,chars_line
+                 clear_text_ram_l2:
+0007d6 e200      			ldi		r16,0x20
+0007d7 df6e      			rcall	lcd_send_data				;clear
+0007d8 9311      			st		Z+,r17						;clear internal vram also	
+                 
+0007d9 952a      			dec	r18
+0007da f7d9      		brne	clear_text_ram_l2
+0007db 953a      		dec		r19
+                 
+0007dc f7c1      	brne	clear_text_ram_l1
+                 
+                 ;cursor 0,0
+0007dd e011      	ldi		r17,1				;command
+0007de e406      	ldi		r16,0x46
+0007df df66      	rcall	lcd_send_data
+                 
+0007e0 2711      	clr		r17
+                 
+0007e1 e000      	ldi		r16,0x00
+0007e2 df63      	rcall	lcd_send_data
+                 
+0007e3 e000      	ldi		r16,0x00
+0007e4 df61      	rcall	lcd_send_data
+                 
+0007e5 91ff      	pop		ZH
+0007e6 91ef      	pop		ZL
+0007e7 913f      	pop		r19
+0007e8 912f      	pop		r18
+0007e9 911f      	pop		r17
+0007ea 910f      	pop		r16
+                 
+0007eb 9508      	ret
+                 
+                 
+                 
+                 
+                 
+                 
+                 lcd_init:
+                 ;SYSTEM SET
+0007ec e011      	ldi		r17,1				;command
+0007ed e400      	ldi		r16,0x40
+0007ee df57      	rcall	lcd_send_data
+                 
+0007ef 2711      	clr		r17
+                 
+0007f0 e301      	ldi		r16,0x31			;use CGRAM
+0007f1 df54      	rcall	lcd_send_data
+                 
+0007f2 e807      	ldi		r16,0x87
+0007f3 df52      	rcall	lcd_send_data
+                 
+0007f4 e007      	ldi		r16,0x07
+0007f5 df50      	rcall	lcd_send_data
+                 
+0007f6 e207      	ldi		r16,0x27
+0007f7 df4e      	rcall	lcd_send_data
+                 
+0007f8 e20f      	ldi		r16,0x2F
+0007f9 df4c      	rcall	lcd_send_data
+                 
+0007fa ec07      	ldi		r16,0xC7
+0007fb df4a      	rcall	lcd_send_data
+                 
+0007fc e500      	ldi		r16,0x50			;make a line 80 chars long (displays 40)
+0007fd df48      	rcall	lcd_send_data
+                 
+0007fe e000      	ldi		r16,0x00
+0007ff df46      	rcall	lcd_send_data
+                 
+                 ;CHARACTER RAM ADDR
+000800 e011      	ldi		r17,1				;command
+000801 e50c      	ldi		r16,0x5C
+000802 df43      	rcall	lcd_send_data
+                 
+000803 2711      	clr		r17
+                 
+000804 e000      	ldi		r16,0x00
+000805 df40      	rcall	lcd_send_data
+                 
+000806 ef00      	ldi		r16,0xf0
+000807 df3e      	rcall	lcd_send_data
+                 
+                 
+                 ;SCROLL
+000808 e011      	ldi		r17,1				;command
+000809 e404      	ldi		r16,0x44
+00080a df3b      	rcall	lcd_send_data
+                 
+00080b 2711      	clr		r17
+                 
+00080c e000      	ldi		r16,0x00
+00080d df38      	rcall	lcd_send_data
+                 
+00080e e000      	ldi		r16,0x00
+00080f df36      	rcall	lcd_send_data
+                 
+000810 ec07      	ldi		r16,0xc7
+000811 df34      	rcall	lcd_send_data
+                 
+000812 e000      	ldi		r16,0x00
+000813 df32      	rcall	lcd_send_data
+                 
+000814 e005      	ldi		r16,0x05
+000815 df30      	rcall	lcd_send_data
+                 
+000816 ec07      	ldi		r16,0xc7
+000817 df2e      	rcall	lcd_send_data
+                 
+000818 e000      	ldi		r16,0x00
+000819 df2c      	rcall	lcd_send_data
+                 
+00081a e000      	ldi		r16,0x00
+00081b df2a      	rcall	lcd_send_data
+                 
+00081c e000      	ldi		r16,0x00
+00081d df28      	rcall	lcd_send_data
+                 
+00081e e000      	ldi		r16,0x00
+00081f df26      	rcall	lcd_send_data
+                 
+                 ;DISPLAY OFFSET
+000820 e011      	ldi		r17,1				;command
+000821 e50a      	ldi		r16,0x5a
+000822 df23      	rcall	lcd_send_data
+                 
+000823 2711      	clr		r17
+                 
+000824 e000      	ldi		r16,0x00
+000825 df20      	rcall	lcd_send_data
+                 
+                 ;CUSOR POSITION 0,0
+000826 e011      	ldi		r17,1				;command
+000827 e406      	ldi		r16,0x46
+000828 df1d      	rcall	lcd_send_data
+                 
+000829 2711      	clr		r17
+                 
+00082a e000      	ldi		r16,0x00
+00082b df1a      	rcall	lcd_send_data
+                 
+00082c e000      	ldi		r16,0x00
+00082d df18      	rcall	lcd_send_data
+                 
+                 ;OVERLAY, TEXT + GRAPHICS	
+00082e e011      	ldi		r17,1				;command
+00082f e50b      	ldi		r16,0x5b
+000830 df15      	rcall	lcd_send_data
+                 
+000831 2711      	clr		r17
+                 
+000832 e000      	ldi		r16,0x00
+000833 df12      	rcall	lcd_send_data
+                 
+                 ;CURSOR TYPE (BLOCK 8X8)
+000834 e011      	ldi		r17,1				;command
+000835 e50d      	ldi		r16,0x5D
+000836 df0f      	rcall	lcd_send_data
+                 
+000837 2711      	clr		r17
+                 
+000838 e007      	ldi		r16,0x07
+000839 df0c      	rcall	lcd_send_data
+                 
+00083a e807      	ldi		r16,0x87
+00083b df0a      	rcall	lcd_send_data
+                 
+                 ;CURSOR DIR
+00083c e011      	ldi		r17,1				;command
+00083d e40c      	ldi		r16,0x4C
+00083e df07      	rcall	lcd_send_data
+                 
+                 
+                 
+                 ;DISPLAY ON
+00083f e011      	ldi		r17,1				;command
+000840 e509      	ldi		r16,0x59
+000841 df04      	rcall	lcd_send_data
+                 
+000842 2711      	clr		r17
+                 
+000843 e006      	ldi		r16,0x06
+000844 df01      	rcall	lcd_send_data
+                 ;-----
+                 
+                 
+000845 9508      RET
+                 
+                 .CSEG
+                 ;.org 0x7000
+                 opcode_jmps:
+                 .include "dbops.asm"
+000846 0394
+000847 01d4
+000848 0230
+000849 06d3
+00084a 06d3
+00084b 01d4
+00084c 0230
+00084d 06d3
+00084e 0450
+00084f 01d4
+000850 0410
+000851 06d3
+000852 06d3
+000853 01d4
+000854 0230
+000855 06d3      
+000856 036c
+000857 01d4
+000858 0230
+000859 06d3
+00085a 06d3
+00085b 01d4
+00085c 0230
+00085d 06d3
+00085e 04ac
+00085f 01d4
+000860 0230
+000861 06d3
+000862 06d3
+000863 01d4
+000864 0230
+000865 06d3      .DB low(op_BPL),high(op_BPL),low(op_ORA),high(op_ORA),low(op_ASL),high(op_ASL),low(op_INVALID),high(op_INVALID),low(op_INVALID),high(op_INVALID),low(op_ORA),high(op_ORA),low(op_ASL),high(op_ASL),low(op_INVALID),high(op_INVALID),low(op_CLC),high(op_CLC),lo000866 0399
+000867 01d9
+000868 0245
+000869 06d3
+00086a 02d5
+00086b 01d9
+00086c 0245
+00086d 06d3
+00086e 045e
+00086f 01d9
+000870 0413
+000871 06d3
+000872 02d5
+000873 01d9
+000874 0245
+000875 06d3      w(op_ORA),high(op_ORA),low(op_ASL),high(op_ASL),low(op_INVALID),high(op_INVALID),low(op_INVALID),high(op_INVALID),low(op_ORA),high(op_ORA),low(op_ASL),high(op_ASL),low(op_INVALID),high(op_INVALID)
+000876 0371
+000877 01d9
+000878 0245
+000879 06d3
+00087a 02d5
+00087b 01d9
+00087c 0245
+00087d 06d3
+00087e 04b0
+00087f 01d9
+000880 0245
+000881 06d3
+000882 02d5
+000883 01d9
+000884 0245
+000885 06d3      .DB low(op_JSRA),high(op_JSRA),low(op_AND),high(op_AND),low(op_ROL),high(op_ROL),low(op_INVALID),high(op_INVALID),low(op_BIT),high(op_BIT),low(op_AND),high(op_AND),low(op_ROL),high(op_ROL),low(op_INVALID),high(op_INVALID),low(op_PLP),high(op_PLP),low(op_A000886 03ce
+000887 01de
+000888 025b
+000889 06d3
+00088a 02e6
+00088b 01de
+00088c 025b
+00088d 06d3
+00088e 046c
+00088f 01de
+000890 0417
+000891 06d3
+000892 02e6
+000893 01de
+000894 025b
+000895 06d3      ND),high(op_AND),low(op_ROL_A),high(op_ROL_A),low(op_INVALID),high(op_INVALID),low(op_BIT),high(op_BIT),low(op_AND),high(op_AND),low(op_ROL),high(op_ROL),low(op_INVALID),high(op_INVALID)
+000896 0376
+000897 01de
+000898 025b
+000899 06d3
+00089a 02e6
+00089b 01de
+00089c 025b
+00089d 06d3
+00089e 04b4
+00089f 01de
+0008a0 025b
+0008a1 06d3
+0008a2 02e6
+0008a3 01de
+0008a4 025b
+0008a5 06d3      .DB low(op_BMI),high(op_BMI),low(op_AND),high(op_AND),low(op_ROL),high(op_ROL),low(op_INVALID),high(op_INVALID),low(op_BIT),high(op_BIT),low(op_AND),high(op_AND),low(op_ROL),high(op_ROL),low(op_INVALID),high(op_INVALID),low(op_SEC),high(op_SEC),low(op_AND0008a6 03f6
+0008a7 01e3
+0008a8 0270
+0008a9 06d3
+0008aa 0303
+0008ab 01e3
+0008ac 0270
+0008ad 06d3
+0008ae 0479
+0008af 01e3
+0008b0 041a
+0008b1 06d3
+0008b2 0303
+0008b3 01e3
+0008b4 0270
+0008b5 06d3      ),high(op_AND),low(op_ROL),high(op_ROL),low(op_INVALID),high(op_INVALID),low(op_BIT),high(op_BIT),low(op_AND),high(op_AND),low(op_ROL),high(op_ROL),low(op_INVALID),high(op_INVALID)
+0008b6 037b
+0008b7 01e3
+0008b8 0270
+0008b9 06d3
+0008ba 0303
+0008bb 01e3
+0008bc 0270
+0008bd 06d3
+0008be 04b8
+0008bf 01e3
+0008c0 0270
+0008c1 06d3
+0008c2 0303
+0008c3 01e3
+0008c4 0270
+0008c5 06d3      .DB low(op_RTI),high(op_RTI),low(op_EOR),high(op_EOR),low(op_LSR),high(op_LSR),low(op_INVALID),high(op_INVALID),low(op_JMP),high(op_JMP),low(op_EOR),high(op_EOR),low(op_LSR),high(op_LSR),low(op_INVALID),high(op_INVALID),low(op_PHA),high(op_PHA),low(op_EOR0008c6 0339
+0008c7 01f0
+0008c8 0286
+0008c9 06d3
+0008ca 0339
+0008cb 01f0
+0008cc 0286
+0008cd 06d3
+0008ce 0492
+0008cf 01f0
+0008d0 04d6
+0008d1 06d3
+0008d2 0339
+0008d3 01f0
+0008d4 0286
+0008d5 06d3      ),high(op_EOR),low(op_LSR_A),high(op_LSR_A),low(op_INVALID),high(op_INVALID),low(op_JMP),high(op_JMP),low(op_EOR),high(op_EOR),low(op_LSR),high(op_LSR),low(op_INVALID),high(op_INVALID)
+0008d6 0380
+0008d7 01f0
+0008d8 0286
+0008d9 06d3
+0008da 0339
+0008db 01f0
+0008dc 041e
+0008dd 06d3
+0008de 04bc
+0008df 01f0
+0008e0 04e4
+0008e1 06d3
+0008e2 0339
+0008e3 01f0
+0008e4 0286
+0008e5 06d3      .DB low(op_BVC),high(op_BVC),low(op_EOR),high(op_EOR),low(op_LSR),high(op_LSR),low(op_INVALID),high(op_INVALID),low(op_JMP),high(op_JMP),low(op_EOR),high(op_EOR),low(op_LSR),high(op_LSR),low(op_INVALID),high(op_INVALID),low(op_CLI),high(op_CLI),low(op_EOR0008e6 034d
+0008e7 0204
+0008e8 029a
+0008e9 06d3
+0008ea 034d
+0008eb 0204
+0008ec 029a
+0008ed 06d3
+0008ee 0496
+0008ef 0204
+0008f0 04e6
+0008f1 06d3
+0008f2 034d
+0008f3 0204
+0008f4 029a
+0008f5 06d3      ),high(op_EOR),low(op_LSR),high(op_LSR),low(op_INVALID),high(op_INVALID),low(op_JMP),high(op_JMP),low(op_EOR),high(op_EOR),low(op_LSR),high(op_LSR),low(op_INVALID),high(op_INVALID)
+0008f6 0385
+0008f7 0204
+0008f8 029a
+0008f9 06d3
+0008fa 034d
+0008fb 0204
+0008fc 0432
+0008fd 06d3
+0008fe 04ca
+0008ff 0204
+000900 04f4
+000901 06d3
+000902 034d
+000903 0204
+000904 0441
+000905 06d3      .DB low(op_RTS),high(op_RTS),low(op_ADC),high(op_ADC),low(op_ROR),high(op_ROR),low(op_INVALID),high(op_INVALID),low(op_JMPI),high(op_JMPI),low(op_ADC),high(op_ADC),low(op_ROR),high(op_ROR),low(op_INVALID),high(op_INVALID),low(op_PLA),high(op_PLA),low(op_A000906 035c
+000907 0213
+000908 02a9
+000909 06d3
+00090a 035c
+00090b 0213
+00090c 02a9
+00090d 06d3
+00090e 04a4
+00090f 0213
+000910 0502
+000911 06d3
+000912 035c
+000913 0213
+000914 02a9
+000915 06d3      DC),high(op_ADC),low(op_ROR_A),high(op_ROR_A),low(op_INVALID),high(op_INVALID),low(op_JMPI),high(op_JMPI),low(op_ADC),high(op_ADC),low(op_ROR),high(op_ROR),low(op_INVALID),high(op_INVALID)
+000916 038a
+000917 0213
+000918 02a9
+000919 06d3
+00091a 035c
+00091b 0213
+00091c 02a9
+00091d 06d3
+00091e 04ce
+00091f 0213
+000920 02a9
+000921 06d3
+000922 035c
+000923 0213
+000924 02a9
+000925 06d3      .DB low(op_BVS),high(op_BVS),low(op_ADC),high(op_ADC),low(op_ROR),high(op_ROR),low(op_INVALID),high(op_INVALID),low(op_JMPI),high(op_JMPI),low(op_ADC),high(op_ADC),low(op_ROR),high(op_ROR),low(op_INVALID),high(op_INVALID),low(op_SEI),high(op_SEI),low(op_A000926 0364
+000927 021b
+000928 02bf
+000929 06d3
+00092a 0364
+00092b 021b
+00092c 02bf
+00092d 06d3
+00092e 04a8
+00092f 021b
+000930 0506
+000931 06d3
+000932 0364
+000933 021b
+000934 02bf
+000935 06d3      DC),high(op_ADC),low(op_ROR),high(op_ROR),low(op_INVALID),high(op_INVALID),low(op_JMPI),high(op_JMPI),low(op_ADC),high(op_ADC),low(op_ROR),high(op_ROR),low(op_INVALID),high(op_INVALID)
+000936 038f
+000937 021b
+000938 02bf
+000939 06d3
+00093a 0364
+00093b 021b
+00093c 02bf
+00093d 06d3
+00093e 04d2
+00093f 021b
+000940 02bf
+000941 06d3
+000942 0364
+000943 021b
+000944 02bf
+000945 06d3      .DB low(op_STY),high(op_STY),low(op_STA),high(op_STA),low(op_STX),high(op_STX),low(op_INVALID),high(op_INVALID),low(op_STY),high(op_STY),low(op_STA),high(op_STA),low(op_STX),high(op_STX),low(op_INVALID),high(op_INVALID),low(op_DEY),high(op_DEY),low(op_STA                 kernal_rom:
+                 .include "kernal.asm"
+000946 dc0f
+000947 61a5
+000948 88c9
+000949 0390
+00094a d420
+00094b 20da
+00094c dccc
+00094d 07a5      
+00094e 6918
+00094f f081
+000950 38f3
+000951 01e9
+000952 a248
+000953 b505
+000954 b469
+000955 9561      .DB 24,105,129,240,243,56,233,1,72,162,5,181,105,180,97,149
+000956 9461
+000957 ca69
+000958 f510
+000959 56a5
+00095a 7085
+00095b 5320
+00095c 20d8
+00095d dfb4      .DB 97,148,105,202,16,245,165,86,133,112,32,83,216,32,180,223
+00095e c4a9
+00095f dfa0
+000960 5620
+000961 a9e0
+000962 8500
+000963 686f
+000964 b920
+000965 60da      .DB 169,196,160,223,32,86,224,169,0,133,111,104,32,185,218,96
+000966 7185
+000967 7284
+000968 ca20
+000969 a9db
+00096a 2057
+00096b da28
+00096c 5a20
+00096d a9e0      .DB 133,113,132,114,32,202,219,169,87,32,40,218,32,90,224,169
+00096e a057
+00096f 4c00
+000970 da28
+000971 7185
+000972 7284
+000973 c720
+000974 b1db
+000975 8571      .DB 87,160,0,76,40,218,133,113,132,114,32,199,219,177,113,133
+000976 a467
+000977 c871
+000978 d098
+000979 e602
+00097a 8572
+00097b a471
+00097c 2072
+00097d da28      .DB 103,164,113,200,152,208,2,230,114,133,113,164,114,32,40,218
+00097e 71a5
+00097f 72a4
+000980 6918
+000981 9005
+000982 c801
+000983 7185
+000984 7284
+000985 6720      .DB 165,113,164,114,24,105,5,144,1,200,133,113,132,114,32,103
+000986 a9d8
+000987 a05c
+000988 c600
+000989 d067
+00098a 60e4
+00098b 3598
+00098c 7a44
+00098d 6800      .DB 216,169,92,160,0,198,103,208,228,96,152,53,68,122,0,104
+00098e b128
+00098f 0046
+000990 2b20
+000991 30dc
+000992 d037
+000993 2020
+000994 fff3
+000995 2286      .DB 40,177,70,0,32,43,220,48,55,208,32,32,243,255,134,34
+000996 2384
+000997 04a0
+000998 22b1
+000999 6285
+00099a b1c8
+00099b 8522
+00099c a064
+00099d b108      .DB 132,35,160,4,177,34,133,98,200,177,34,133,100,160,8,177
+00099e 8522
+00099f c863
+0009a0 22b1
+0009a1 6585
+0009a2 e04c
+0009a3 a9e0
+0009a4 a08b
+0009a5 2000      .DB 34,133,99,200,177,34,133,101,76,224,224,169,139,160,0,32
+0009a6 dba2
+0009a7 8aa9
+0009a8 e0a0
+0009a9 2820
+0009aa a9da
+0009ab a08f
+0009ac 20e0
+0009ad d867      .DB 162,219,169,138,160,224,32,40,218,169,143,160,224,32,103,216
+0009ae 65a6
+0009af 62a5
+0009b0 6585
+0009b1 6286
+0009b2 63a6
+0009b3 64a5
+0009b4 6385
+0009b5 6486      .DB 166,101,165,98,133,101,134,98,166,99,165,100,133,99,134,100
+0009b6 00a9
+0009b7 6685
+0009b8 61a5
+0009b9 7085
+0009ba 80a9
+0009bb 6185
+0009bc d720
+0009bd a2d8      .DB 169,0,133,102,165,97,133,112,169,128,133,97,32,215,216,162
+0009be a08b
+0009bf 4c00
+0009c0 dbd4
+0009c1 f0c9
+0009c2 07d0
+0009c3 3884
+0009c4 3786
+0009c5 634c      .DB 139,160,0,76,212,219,201,240,208,7,132,56,134,55,76,99
+0009c6 aac6
+0009c7 02d0
+0009c8 1ea2
+0009c9 374c
+0009ca 20c4
+0009cb ffd2
+0009cc e8b0
+0009cd 2060      .DB 198,170,208,2,162,30,76,55,196,32,210,255,176,232,96,32
+0009ce ffcf
+0009cf e2b0
+0009d0 2060
+0009d1 ffc9
+0009d2 dcb0
+0009d3 2060
+0009d4 ffc6
+0009d5 d6b0      .DB 207,255,176,226,96,32,201,255,176,220,96,32,198,255,176,214
+0009d6 2060
+0009d7 ffe4
+0009d8 d0b0
+0009d9 2060
+0009da cd8a
+0009db f720
+0009dc a9d7
+0009dd 48e1      .DB 96,32,228,255,176,208,96,32,138,205,32,247,215,169,225,72
+0009de 43a9
+0009df ad48
+0009e0 030f
+0009e1 ad48
+0009e2 030c
+0009e3 0dae
+0009e4 ac03
+0009e5 030e      .DB 169,67,72,173,15,3,72,173,12,3,174,13,3,172,14,3
+0009e6 6c28
+0009e7 0014
+0009e8 8d08
+0009e9 030c
+0009ea 0d8e
+0009eb 8c03
+0009ec 030e
+0009ed 8d68      .DB 40,108,20,0,8,141,12,3,142,13,3,140,14,3,104,141
+0009ee 030f
+0009ef 2060
+0009f0 e1d1
+0009f1 2da6
+0009f2 2ea4
+0009f3 2ba9
+0009f4 d820
+0009f5 b0ff      .DB 15,3,96,32,209,225,166,45,164,46,169,43,32,216,255,176
+0009f6 6095
+0009f7 01a9
+0009f8 a92c
+0009f9 8500
+0009fa 200a
+0009fb e1d1
+0009fc 0aa5
+0009fd 2ba6      .DB 149,96,169,1,44,169,0,133,10,32,209,225,165,10,166,43
+0009fe 2ca4
+0009ff d520
+000a00 b0ff
+000a01 a557
+000a02 f00a
+000a03 a21a
+000a04 201c
+000a05 ffb7      .DB 164,44,32,213,255,176,87,165,10,240,26,162,28,32,183,255
+000a06 1029
+000a07 03f0
+000a08 374c
+000a09 a5c4
+000a0a c97a
+000a0b f002
+000a0c a907
+000a0d a064      .DB 41,16,240,3,76,55,196,165,122,201,2,240,7,169,100,160
+000a0e 4cc3
+000a0f cb1e
+000a10 2060
+000a11 ffb7
+000a12 bf29
+000a13 05f0
+000a14 1da2
+000a15 374c      .DB 195,76,30,203,96,32,183,255,41,191,240,5,162,29,76,55
+000a16 a5c4
+000a17 c97b
+000a18 d002
+000a19 860e
+000a1a 842d
+000a1b a92e
+000a1c a076
+000a1d 20c3      .DB 196,165,123,201,2,208,14,134,45,132,46,169,118,160,195,32
+000a1e cb1e
+000a1f 2a4c
+000a20 20c5
+000a21 c68e
+000a22 764c
+000a23 20e4
+000a24 e216
+000a25 c020      .DB 30,203,76,42,197,32,142,198,76,118,228,32,22,226,32,192
+000a26 b0ff
+000a27 600b
+000a28 1620
+000a29 a5e2
+000a2a 2049
+000a2b ffc3
+000a2c c690
+000a2d f64c      .DB 255,176,11,96,32,22,226,165,73,32,195,255,144,198,76,246
+000a2e a9e0
+000a2f 2000
+000a30 ffbd
+000a31 01a2
+000a32 00a0
+000a33 ba20
+000a34 20ff
+000a35 e203      .DB 224,169,0,32,189,255,162,1,160,0,32,186,255,32,3,226
+000a36 5420
+000a37 20e2
+000a38 e203
+000a39 fd20
+000a3a a0e1
+000a3b 8600
+000a3c 2049
+000a3d ffba      .DB 32,84,226,32,3,226,32,253,225,160,0,134,73,32,186,255
+000a3e 0320
+000a3f 20e2
+000a40 e1fd
+000a41 a88a
+000a42 49a6
+000a43 ba4c
+000a44 20ff
+000a45 e20b      .DB 32,3,226,32,253,225,138,168,166,73,76,186,255,32,11,226
+000a46 9e4c
+000a47 20d7
+000a48 0079
+000a49 02d0
+000a4a 6868
+000a4b 2060
+000a4c cefd
+000a4d 7920      .DB 76,158,215,32,121,0,208,2,104,104,96,32,253,206,32,121
+000a4e d000
+000a4f 4cf7
+000a50 cf08
+000a51 00a9
+000a52 bd20
+000a53 20ff
+000a54 e20e
+000a55 9e20      .DB 0,208,247,76,8,207,169,0,32,189,255,32,14,226,32,158
+000a56 86d7
+000a57 8a49
+000a58 01a2
+000a59 00a0
+000a5a ba20
+000a5b 20ff
+000a5c e203
+000a5d fd20      .DB 215,134,73,138,162,1,160,0,32,186,255,32,3,226,32,253
+000a5e 86e1
+000a5f a04a
+000a60 a500
+000a61 e049
+000a62 9003
+000a63 8801
+000a64 ba20
+000a65 20ff      .DB 225,134,74,160,0,165,73,224,3,144,1,136,32,186,255,32
+000a66 e203
+000a67 fd20
+000a68 8ae1
+000a69 a6a8
+000a6a a54a
+000a6b 2049
+000a6c ffba
+000a6d 0320      .DB 3,226,32,253,225,138,168,166,74,165,73,32,186,255,32,3
+000a6e 20e2
+000a6f e20b
+000a70 9e20
+000a71 20cd
+000a72 d6a3
+000a73 22a6
+000a74 23a4
+000a75 bd4c      .DB 226,32,11,226,32,158,205,32,163,214,166,34,164,35,76,189
+000a76 a9ff
+000a77 a0dd
+000a78 20e2
+000a79 d867
+000a7a 0c20
+000a7b a9dc
+000a7c a0e2
+000a7d a6e2      .DB 255,169,221,160,226,32,103,216,32,12,220,169,226,160,226,166
+000a7e 206e
+000a7f db07
+000a80 0c20
+000a81 20dc
+000a82 dccc
+000a83 00a9
+000a84 6f85
+000a85 5320      .DB 110,32,7,219,32,12,220,32,204,220,169,0,133,111,32,83
+000a86 a9d8
+000a87 a0e7
+000a88 20e2
+000a89 d850
+000a8a 66a5
+000a8b 1048
+000a8c 200d
+000a8d d849      .DB 216,169,231,160,226,32,80,216,165,102,72,16,13,32,73,216
+000a8e 66a5
+000a8f 0930
+000a90 12a5
+000a91 ff49
+000a92 1285
+000a93 b420
+000a94 a9df
+000a95 a0e7      .DB 165,102,48,9,165,18,73,255,133,18,32,180,223,169,231,160
+000a96 20e2
+000a97 d867
+000a98 1068
+000a99 2003
+000a9a dfb4
+000a9b eca9
+000a9c e2a0
+000a9d 404c      .DB 226,32,103,216,104,16,3,32,180,223,169,236,160,226,76,64
+000a9e 20e0
+000a9f dbca
+000aa0 00a9
+000aa1 1285
+000aa2 6820
+000aa3 a2e2
+000aa4 a04e
+000aa5 2000      .DB 224,32,202,219,169,0,133,18,32,104,226,162,78,160,0,32
+000aa6 e0f3
+000aa7 57a9
+000aa8 00a0
+000aa9 a220
+000aaa a9db
+000aab 8500
+000aac a566
+000aad 2012      .DB 243,224,169,87,160,0,32,162,219,169,0,133,102,165,18,32
+000aae e2d9
+000aaf 4ea9
+000ab0 00a0
+000ab1 0f4c
+000ab2 48db
+000ab3 9a4c
+000ab4 81e2
+000ab5 0f49      .DB 217,226,169,78,160,0,76,15,219,72,76,154,226,129,73,15
+000ab6 a2da
+000ab7 4983
+000ab8 da0f
+000ab9 7fa2
+000aba 0000
+000abb 0000
+000abc 8405
+000abd 1ae6      .DB 218,162,131,73,15,218,162,127,0,0,0,0,5,132,230,26
+000abe 1b2d
+000abf 2886
+000ac0 fb07
+000ac1 87f8
+000ac2 6899
+000ac3 0189
+000ac4 2387
+000ac5 df35      .DB 45,27,134,40,7,251,248,135,153,104,137,1,135,35,53,223
+000ac6 86e1
+000ac7 5da5
+000ac8 28e7
+000ac9 4983
+000aca da0f
+000acb a5a2
+000acc 4866
+000acd 0310      .DB 225,134,165,93,231,40,131,73,15,218,162,165,102,72,16,3
+000ace b420
+000acf a5df
+000ad0 4861
+000ad1 81c9
+000ad2 0790
+000ad3 bca9
+000ad4 d9a0
+000ad5 0f20      .DB 32,180,223,165,97,72,201,129,144,7,169,188,160,217,32,15
+000ad6 a9db
+000ad7 a03b
+000ad8 20e3
+000ad9 e040
+000ada c968
+000adb 9081
+000adc a907
+000add a0dd      .DB 219,169,59,160,227,32,64,224,104,201,129,144,7,169,221,160
+000ade 20e2
+000adf d850
+000ae0 1068
+000ae1 4c03
+000ae2 dfb4
+000ae3 0b60
+000ae4 b376
+000ae5 bd83      .DB 226,32,80,216,104,16,3,76,180,223,96,11,118,179,131,189
+000ae6 79d3
+000ae7 f41e
+000ae8 f5a6
+000ae9 837b
+000aea b0fc
+000aeb 7c10
+000aec 1f0c
+000aed ca67      .DB 211,121,30,244,166,245,123,131,252,176,16,124,12,31,103,202
+000aee de7c
+000aef cb53
+000af0 7dc1
+000af1 6414
+000af2 4c70
+000af3 b77d
+000af4 51ea
+000af5 7d7a      .DB 124,222,83,203,193,125,20,100,112,76,125,183,234,81,122,125
+000af6 3063
+000af7 7e88
+000af8 927e
+000af9 9944
+000afa 7e3a
+000afb cc4c
+000afc c791
+000afd aa7f      .DB 99,48,136,126,126,146,68,153,58,126,76,204,145,199,127,170
+000afe aaaa
+000aff 8113
+000b00 0000
+000b01 0000
+000b02 5b20
+000b03 20e4
+000b04 e3a4
+000b05 0420      .DB 170,170,19,129,0,0,0,0,32,91,228,32,164,227,32,4
+000b06 a2e4
+000b07 9afb
+000b08 744c
+000b09 e6c4
+000b0a d07a
+000b0b e602
+000b0c ad7b
+000b0d ea60      .DB 228,162,251,154,76,116,196,230,122,208,2,230,123,173,96,234
+000b0e 3ac9
+000b0f 0ab0
+000b10 20c9
+000b11 eff0
+000b12 e938
+000b13 3830
+000b14 d0e9
+000b15 8060      .DB 201,58,176,10,201,32,240,239,56,233,48,56,233,208,96,128
+000b16 c74f
+000b17 5852
+000b18 4ca9
+000b19 5485
+000b1a 0085
+000b1b 48a9
+000b1c d2a0
+000b1d 0185      .DB 79,199,82,88,169,76,133,84,133,0,169,72,160,210,133,1
+000b1e 0284
+000b1f 91a9
+000b20 d3a0
+000b21 0585
+000b22 0684
+000b23 aaa9
+000b24 d1a0
+000b25 0385      .DB 132,2,169,145,160,211,133,5,132,6,169,170,160,209,133,3
+000b26 0484
+000b27 1ca2
+000b28 87bd
+000b29 95e3
+000b2a ca73
+000b2b f810
+000b2c 03a9
+000b2d 5385      .DB 132,4,162,28,189,135,227,149,115,202,16,248,169,3,133,83
+000b2e 00a9
+000b2f 6885
+000b30 1385
+000b31 1885
+000b32 01a2
+000b33 fd8e
+000b34 8e01
+000b35 01fc      .DB 169,0,133,104,133,19,133,24,162,1,142,253,1,142,252,1
+000b36 19a2
+000b37 1686
+000b38 2038
+000b39 ff9c
+000b3a 2b86
+000b3b 2c84
+000b3c 2038
+000b3d ff99      .DB 162,25,134,22,56,32,156,255,134,43,132,44,56,32,153,255
+000b3e 3786
+000b3f 3884
+000b40 3386
+000b41 3484
+000b42 00a0
+000b43 9198
+000b44 e62b
+000b45 d02b      .DB 134,55,132,56,134,51,132,52,160,0,152,145,43,230,43,208
+000b46 e602
+000b47 602c
+000b48 2ba5
+000b49 2ca4
+000b4a 0820
+000b4b a9c4
+000b4c a036
+000b4d 20e4      .DB 2,230,44,96,165,43,164,44,32,8,196,169,54,160,228,32
+000b4e cb1e
+000b4f 37a5
+000b50 e538
+000b51 aa2b
+000b52 38a5
+000b53 2ce5
+000b54 cd20
+000b55 a9dd      .DB 30,203,165,55,56,229,43,170,165,56,229,44,32,205,221,169
+000b56 a029
+000b57 20e4
+000b58 cb1e
+000b59 444c
+000b5a 20c6
+000b5b 5942
+000b5c 4554
+000b5d 2053      .DB 41,160,228,32,30,203,76,68,198,32,66,89,84,69,83,32
+000b5e 5246
+000b5f 4545
+000b60 000d
+000b61 2a93
+000b62 2a2a
+000b63 202a
+000b64 4243
+000b65 204d      .DB 70,82,69,69,13,0,147,42,42,42,42,32,67,66,77,32
+000b66 4142
+000b67 4953
+000b68 2043
+000b69 3256
+000b6a 2a20
+000b6b 2a2a
+000b6c 0d2a
+000b6d 3a00      .DB 66,65,83,73,67,32,86,50,32,42,42,42,42,13,0,58
+000b6e 83c4
+000b6f 7cc4
+000b70 1ac5
+000b71 e4c7
+000b72 86c7
+000b73 a2ce
+000b74 bd0b
+000b75 e44f      .DB 196,131,196,124,197,26,199,228,199,134,206,162,11,189,79,228
+000b76 009d
+000b77 ca03
+000b78 f710
+000b79 2060
+000b7a ffcc
+000b7b 00a9
+000b7c 1385
+000b7d 7a20      .DB 157,0,3,202,16,247,96,32,204,255,169,0,133,19,32,122
+000b7e 58c6
+000b7f 744c
+000b80 41c4
+000b81 3320
+000b82 4cc5
+000b83 c677
+000b84 ffff
+000b85 ffff      .DB 198,88,76,116,196,65,32,51,197,76,119,198,255,255,255,255
+000b86 ffff
+000b87 ffff
+000b88 ffff
+000b89 ffff
+000b8a ffff
+000b8b ffff
+000b8c ffff
+000b8d ffff      .DB 255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255
+000b8e ffff
+000b8f ffff
+000b90 ffff
+000b91 ffff
+000b92 ffff
+000b93 ffff
+000b94 ffff
+000b95 ffff      .DB 255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255
+000b96 2cad
+000b97 2991
+000b98 8ddf
+000b99 912c
+000b9a ad60
+000b9b 912c
+000b9c 2009
+000b9d 2c8d      .DB 173,44,145,41,223,141,44,145,96,173,44,145,9,32,141,44
+000b9e 6091
+000b9f 1fad
+000ba0 cd91
+000ba1 911f
+000ba2 f8d0
+000ba3 604a
+000ba4 b9a6
+000ba5 474c      .DB 145,96,173,31,145,205,31,145,208,248,74,96,166,185,76,71
+000ba6 8af6
+000ba7 08d0
+000ba8 c3a5
+000ba9 ae85
+000baa c4a5
+000bab af85
+000bac 6a4c
+000bad 20f6      .DB 246,138,208,8,165,195,133,174,165,196,133,175,76,106,246,32
+000bae f8e3
+000baf 0390
+000bb0 a968
+000bb1 4c00
+000bb2 f39e
+000bb3 ffff
+000bb4 ffff
+000bb5 ffff      .DB 227,248,144,3,104,169,0,76,158,243,255,255,255,255,255,255
+000bb6 ffff
+000bb7 ffff
+000bb8 ffff
+000bb9 ffff
+000bba ffff
+000bbb ffff
+000bbc ffff
+000bbd ffff      .DB 255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255
+000bbe ffff
+000bbf ffff
+000bc0 ffff
+000bc1 ffff
+000bc2 ffff
+000bc3 ffff
+000bc4 ffff
+000bc5 ffff      .DB 255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255
+000bc6 10a2
+000bc7 91a0
+000bc8 a260
+000bc9 a016
+000bca 6017
+000bcb 07b0
+000bcc d686
+000bcd d384      .DB 162,16,160,145,96,162,22,160,23,96,176,7,134,214,132,211
+000bce 8720
+000bcf a6e5
+000bd0 a4d6
+000bd1 60d3
+000bd2 bb20
+000bd3 ade5
+000bd4 0288
+000bd5 fd29      .DB 32,135,229,166,214,164,211,96,32,187,229,173,136,2,41,253
+000bd6 0a0a
+000bd7 8009
+000bd8 058d
+000bd9 ad90
+000bda 0288
+000bdb 0229
+000bdc 08f0
+000bdd 80a9      .DB 10,10,9,128,141,5,144,173,136,2,41,2,240,8,169,128
+000bde 020d
+000bdf 8d90
+000be0 9002
+000be1 00a9
+000be2 918d
+000be3 8502
+000be4 a9cf
+000be5 8ddc      .DB 13,2,144,141,2,144,169,0,141,145,2,133,207,169,220,141
+000be6 028f
+000be7 eba9
+000be8 908d
+000be9 a902
+000bea 8d0a
+000beb 0289
+000bec 8c8d
+000bed a902      .DB 143,2,169,235,141,144,2,169,10,141,137,2,141,140,2,169
+000bee 8d06
+000bef 0286
+000bf0 04a9
+000bf1 8b8d
+000bf2 a902
+000bf3 850c
+000bf4 85cd
+000bf5 adcc      .DB 6,141,134,2,169,4,141,139,2,169,12,133,205,133,204,173
+000bf6 0288
+000bf7 8009
+000bf8 a9a8
+000bf9 aa00
+000bfa d994
+000bfb 6918
+000bfc 9016
+000bfd c801      .DB 136,2,9,128,168,169,0,170,148,217,24,105,22,144,1,200
+000bfe e0e8
+000bff d018
+000c00 a9f3
+000c01 95ff
+000c02 a2d9
+000c03 2016
+000c04 ea8d
+000c05 10ca      .DB 232,224,24,208,243,169,255,149,217,162,22,32,141,234,202,16
+000c06 a0fa
+000c07 8400
+000c08 84d3
+000c09 a6d6
+000c0a a5d6
+000c0b b4d3
+000c0c 30d9
+000c0d 1808      .DB 250,160,0,132,211,132,214,166,214,165,211,180,217,48,8,24
+000c0e 1669
+000c0f d385
+000c10 10ca
+000c11 b5f4
+000c12 29d9
+000c13 0d03
+000c14 0288
+000c15 d285      .DB 105,22,133,211,202,16,244,181,217,41,3,13,136,2,133,210
+000c16 fdbd
+000c17 85ed
+000c18 a9d1
+000c19 e815
+000c1a d9b4
+000c1b 0630
+000c1c 6918
+000c1d e816      .DB 189,253,237,133,209,169,21,232,180,217,48,6,24,105,22,232
+000c1e f610
+000c1f d585
+000c20 2060
+000c21 e5bb
+000c22 814c
+000c23 a9e5
+000c24 8503
+000c25 a99a      .DB 16,246,133,213,96,32,187,229,76,129,229,169,3,133,154,169
+000c26 8500
+000c27 a299
+000c28 bd10
+000c29 ede3
+000c2a ff9d
+000c2b ca8f
+000c2c f7d0
+000c2d ac60      .DB 0,133,153,162,16,189,227,237,157,255,143,202,208,247,96,172
+000c2e 0277
+000c2f 00a2
+000c30 78bd
+000c31 9d02
+000c32 0277
+000c33 e4e8
+000c34 d0c6
+000c35 c6f5      .DB 119,2,162,0,189,120,2,157,119,2,232,228,198,208,245,198
+000c36 98c6
+000c37 1858
+000c38 2060
+000c39 e742
+000c3a c6a5
+000c3b cc85
+000c3c 928d
+000c3d f002      .DB 198,152,88,24,96,32,66,231,165,198,133,204,141,146,2,240
+000c3e 78f7
+000c3f cfa5
+000c40 0cf0
+000c41 cea5
+000c42 87ae
+000c43 a002
+000c44 8400
+000c45 20cf      .DB 247,120,165,207,240,12,165,206,174,135,2,160,0,132,207,32
+000c46 eaa1
+000c47 cf20
+000c48 c9e5
+000c49 d083
+000c4a a210
+000c4b 7809
+000c4c c686
+000c4d f3bd      .DB 161,234,32,207,229,201,131,208,16,162,9,120,134,198,189,243
+000c4e 9ded
+000c4f 0276
+000c50 d0ca
+000c51 f0f7
+000c52 c9cf
+000c53 d00d
+000c54 a4c8
+000c55 84d5      .DB 237,157,118,2,202,208,247,240,207,201,13,208,200,164,213,132
+000c56 b1d0
+000c57 c9d1
+000c58 d020
+000c59 8803
+000c5a f7d0
+000c5b 84c8
+000c5c a0c8
+000c5d 8c00      .DB 208,177,209,201,32,208,3,136,208,247,200,132,200,160,0,140
+000c5e 0292
+000c5f d384
+000c60 d484
+000c61 c9a5
+000c62 1d30
+000c63 d6a6
+000c64 1920
+000c65 e4e7      .DB 146,2,132,211,132,212,165,201,48,29,166,214,32,25,231,228
+000c66 d0c9
+000c67 d014
+000c68 a512
+000c69 85ca
+000c6a c5d3
+000c6b 90c8
+000c6c b00a
+000c6d 9842      .DB 201,208,20,208,18,165,202,133,211,197,200,144,10,176,66,152
+000c6e 8a48
+000c6f a548
+000c70 f0d0
+000c71 a491
+000c72 b1d3
+000c73 ead1
+000c74 eaea
+000c75 eaea      .DB 72,138,72,165,208,240,145,164,211,177,209,234,234,234,234,234
+000c76 eaea
+000c77 eaea
+000c78 eaea
+000c79 eaea
+000c7a eaea
+000c7b eaea
+000c7c eaea
+000c7d eaea      .DB 234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234
+000c7e eaea
+000c7f d785
+000c80 3f29
+000c81 d706
+000c82 d724
+000c83 0210
+000c84 8009
+000c85 0490      .DB 234,234,133,215,41,63,6,215,36,215,16,2,9,128,144,4
+000c86 d4a6
+000c87 04d0
+000c88 0270
+000c89 4009
+000c8a d3e6
+000c8b b820
+000c8c c4e6
+000c8d d0c8      .DB 166,212,208,4,112,2,9,64,230,211,32,184,230,196,200,208
+000c8e a917
+000c8f 8500
+000c90 a9d0
+000c91 a60d
+000c92 e099
+000c93 f003
+000c94 a606
+000c95 e09a      .DB 23,169,0,133,208,169,13,166,153,224,3,240,6,166,154,224
+000c96 f003
+000c97 2003
+000c98 e742
+000c99 0da9
+000c9a d785
+000c9b aa68
+000c9c a868
+000c9d d7a5      .DB 3,240,3,32,66,231,169,13,133,215,104,170,104,168,165,215
+000c9e dec9
+000c9f 02d0
+000ca0 ffa9
+000ca1 6018
+000ca2 22c9
+000ca3 08d0
+000ca4 d4a5
+000ca5 0149      .DB 201,222,208,2,169,255,24,96,201,34,208,8,165,212,73,1
+000ca6 d485
+000ca7 22a9
+000ca8 0960
+000ca9 a640
+000caa f0c7
+000cab 0902
+000cac a680
+000cad f0d8      .DB 133,212,169,34,96,9,64,166,199,240,2,9,128,166,216,240
+000cae c602
+000caf aed8
+000cb0 0286
+000cb1 a120
+000cb2 20ea
+000cb3 e6ea
+000cb4 a868
+000cb5 d8a5      .DB 2,198,216,174,134,2,32,161,234,32,234,230,104,168,165,216
+000cb6 02f0
+000cb7 d446
+000cb8 aa68
+000cb9 1868
+000cba 6058
+000cbb fa20
+000cbc e6e8
+000cbd a5d3      .DB 240,2,70,212,104,170,104,24,88,96,32,250,232,230,211,165
+000cbe c5d5
+000cbf b0d3
+000cc0 c937
+000cc1 f057
+000cc2 ad2a
+000cc3 0292
+000cc4 03f0
+000cc5 f04c      .DB 213,197,211,176,55,201,87,240,42,173,146,2,240,3,76,240
+000cc6 a6e9
+000cc7 e0d6
+000cc8 9017
+000cc9 2007
+000cca e975
+000ccb d6c6
+000ccc d6a6
+000ccd d916      .DB 233,166,214,224,23,144,7,32,117,233,198,214,166,214,22,217
+000cce d956
+000ccf 5b4c
+000cd0 69ed
+000cd1 8516
+000cd2 b5d5
+000cd3 30d9
+000cd4 ca03
+000cd5 f9d0      .DB 86,217,76,91,237,105,22,133,213,181,217,48,3,202,208,249
+000cd6 7e4c
+000cd7 c6ea
+000cd8 20d6
+000cd9 e8c3
+000cda 00a9
+000cdb d385
+000cdc a660
+000cdd d0d6      .DB 76,126,234,198,214,32,195,232,169,0,133,211,96,166,214,208
+000cde 8606
+000cdf 68d3
+000ce0 d068
+000ce1 caa5
+000ce2 d686
+000ce3 8720
+000ce4 a4e5
+000ce5 84d5      .DB 6,134,211,104,104,208,165,202,134,214,32,135,229,164,213,132
+000ce6 60d3
+000ce7 8548
+000ce8 8ad7
+000ce9 9848
+000cea a948
+000ceb 8500
+000cec a4d0
+000ced a5d3      .DB 211,96,72,133,215,138,72,152,72,169,0,133,208,164,211,165
+000cee 10d7
+000cef 4c03
+000cf0 e800
+000cf1 0dc9
+000cf2 03d0
+000cf3 d84c
+000cf4 c9e8
+000cf5 9020      .DB 215,16,3,76,0,232,201,13,208,3,76,216,232,201,32,144
+000cf6 c910
+000cf7 9060
+000cf8 2904
+000cf9 d0df
+000cfa 2902
+000cfb 203f
+000cfc e6b8
+000cfd c74c      .DB 16,201,96,144,4,41,223,208,2,41,63,32,184,230,76,199
+000cfe a6e6
+000cff f0d8
+000d00 4c03
+000d01 e6cb
+000d02 14c9
+000d03 2ed0
+000d04 d098
+000d05 2006      .DB 230,166,216,240,3,76,203,230,201,20,208,46,152,208,6,32
+000d06 e72d
+000d07 9f4c
+000d08 20e7
+000d09 e8e8
+000d0a 8488
+000d0b 20d3
+000d0c eab2
+000d0d b1c8      .DB 45,231,76,159,231,32,232,232,136,132,211,32,178,234,200,177
+000d0e 88d1
+000d0f d191
+000d10 b1c8
+000d11 88f3
+000d12 f391
+000d13 c4c8
+000d14 d0d5
+000d15 a9ef      .DB 209,136,145,209,200,177,243,136,145,243,200,196,213,208,239,169
+000d16 9120
+000d17 add1
+000d18 0286
+000d19 f391
+000d1a 4d10
+000d1b d4a6
+000d1c 03f0
+000d1d cb4c      .DB 32,145,209,173,134,2,145,243,16,77,166,212,240,3,76,203
+000d1e c9e6
+000d1f d012
+000d20 8502
+000d21 c9c7
+000d22 d013
+000d23 2003
+000d24 e581
+000d25 1dc9      .DB 230,201,18,208,2,133,199,201,19,208,3,32,129,229,201,29
+000d26 17d0
+000d27 20c8
+000d28 e8fa
+000d29 d384
+000d2a c488
+000d2b 90d5
+000d2c c609
+000d2d 20d6      .DB 208,23,200,32,250,232,132,211,136,196,213,144,9,198,214,32
+000d2e e8c3
+000d2f 00a0
+000d30 d384
+000d31 dc4c
+000d32 c9e6
+000d33 d011
+000d34 181d
+000d35 6998      .DB 195,232,160,0,132,211,76,220,230,201,17,208,29,24,152,105
+000d36 a816
+000d37 d6e6
+000d38 d5c5
+000d39 ec90
+000d3a eaf0
+000d3b d6c6
+000d3c 16e9
+000d3d 0490      .DB 22,168,230,214,197,213,144,236,240,234,198,214,233,22,144,4
+000d3e d385
+000d3f f8d0
+000d40 c320
+000d41 4ce8
+000d42 e6dc
+000d43 1220
+000d44 4ce9
+000d45 ed21      .DB 133,211,208,248,32,195,232,76,220,230,32,18,233,76,33,237
+000d46 eaea
+000d47 eaea
+000d48 eaea
+000d49 eaea
+000d4a eaea
+000d4b eaea
+000d4c eaea
+000d4d eaea      .DB 234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234
+000d4e eaea
+000d4f eaea
+000d50 29ea
+000d51 c97f
+000d52 d07f
+000d53 a902
+000d54 ea5e
+000d55 eaea      .DB 234,234,234,234,234,41,127,201,127,208,2,169,94,234,234,234
+000d56 eaea
+000d57 c9ea
+000d58 9020
+000d59 4c03
+000d5a e6c5
+000d5b 0dc9
+000d5c 03d0
+000d5d d84c      .DB 234,234,234,201,32,144,3,76,197,230,201,13,208,3,76,216
+000d5e a6e8
+000d5f d0d4
+000d60 c93f
+000d61 d014
+000d62 a437
+000d63 b1d5
+000d64 c9d1
+000d65 d020      .DB 232,166,212,208,63,201,20,208,55,164,213,177,209,201,32,208
+000d66 c404
+000d67 d0d3
+000d68 c007
+000d69 f057
+000d6a 2024
+000d6b e9ee
+000d6c d5a4
+000d6d b220      .DB 4,196,211,208,7,192,87,240,36,32,238,233,164,213,32,178
+000d6e 88ea
+000d6f d1b1
+000d70 91c8
+000d71 88d1
+000d72 f3b1
+000d73 91c8
+000d74 88f3
+000d75 d3c4      .DB 234,136,177,209,200,145,209,136,177,243,200,145,243,136,196,211
+000d76 efd0
+000d77 20a9
+000d78 d191
+000d79 86ad
+000d7a 9102
+000d7b e6f3
+000d7c 4cd8
+000d7d e6dc      .DB 208,239,169,32,145,209,173,134,2,145,243,230,216,76,220,230
+000d7e d8a6
+000d7f 05f0
+000d80 4009
+000d81 cb4c
+000d82 c9e6
+000d83 d011
+000d84 a616
+000d85 f0d6      .DB 166,216,240,5,9,64,76,203,230,201,17,208,22,166,214,240
+000d86 c637
+000d87 a5d6
+000d88 38d3
+000d89 16e9
+000d8a 0490
+000d8b d385
+000d8c 2a10
+000d8d 8720      .DB 55,198,214,165,211,56,233,22,144,4,133,211,16,42,32,135
+000d8e d0e5
+000d8f c925
+000d90 d012
+000d91 a904
+000d92 8500
+000d93 c9c7
+000d94 d01d
+000d95 9812      .DB 229,208,37,201,18,208,4,169,0,133,199,201,29,208,18,152
+000d96 09f0
+000d97 e820
+000d98 88e8
+000d99 d384
+000d9a dc4c
+000d9b 20e6
+000d9c e72d
+000d9d dc4c      .DB 240,9,32,232,232,136,132,211,76,220,230,32,45,231,76,220
+000d9e c9e6
+000d9f d013
+000da0 2006
+000da1 e55f
+000da2 dc4c
+000da3 09e6
+000da4 2080
+000da5 e912      .DB 230,201,19,208,6,32,95,229,76,220,230,9,128,32,18,233
+000da6 304c
+000da7 46ed
+000da8 a6c9
+000da9 e8d6
+000daa 17e0
+000dab 03d0
+000dac 7520
+000dad b5e9      .DB 76,48,237,70,201,166,214,232,224,23,208,3,32,117,233,181
+000dae 10d9
+000daf 86f4
+000db0 4cd6
+000db1 e587
+000db2 00a2
+000db3 d886
+000db4 c786
+000db5 d486      .DB 217,16,244,134,214,76,135,229,162,0,134,216,134,199,134,212
+000db6 d386
+000db7 c320
+000db8 4ce8
+000db9 e6dc
+000dba 04a2
+000dbb 00a9
+000dbc d3c5
+000dbd 07f0      .DB 134,211,32,195,232,76,220,230,162,4,169,0,197,211,240,7
+000dbe 6918
+000dbf ca16
+000dc0 f6d0
+000dc1 c660
+000dc2 60d6
+000dc3 04a2
+000dc4 15a9
+000dc5 d3c5      .DB 24,105,22,202,208,246,96,198,214,96,162,4,169,21,197,211
+000dc6 07f0
+000dc7 6918
+000dc8 ca16
+000dc9 f6d0
+000dca a660
+000dcb e0d6
+000dcc f017
+000dcd e602      .DB 240,7,24,105,22,202,208,246,96,166,214,224,23,240,2,230
+000dce 60d6
+000dcf 07a2
+000dd0 21dd
+000dd1 f0e9
+000dd2 ca04
+000dd3 f810
+000dd4 8e60
+000dd5 0286      .DB 214,96,162,7,221,33,233,240,4,202,16,248,96,142,134,2
+000dd6 9060
+000dd7 1c05
+000dd8 9c9f
+000dd9 1f1e
+000dda ef9e
+000ddb dfa1
+000ddc e1a6
+000ddd e2b1      .DB 96,144,5,28,159,156,30,31,158,239,161,223,166,225,177,226
+000dde e3b2
+000ddf e4b3
+000de0 e5b4
+000de1 e6b5
+000de2 e7b6
+000de3 e8b7
+000de4 e9b8
+000de5 fab9      .DB 178,227,179,228,180,229,181,230,182,231,183,232,184,233,185,250
+000de6 fbba
+000de7 fcbb
+000de8 ecbc
+000de9 febd
+000dea 84be
+000deb f7bf
+000dec f8c0
+000ded f9db      .DB 186,251,187,252,188,236,189,254,190,132,191,247,192,248,219,249
+000dee eadd
+000def 5ede
+000df0 5be0
+000df1 5de1
+000df2 40e2
+000df3 61b0
+000df4 78b1
+000df5 79db      .DB 221,234,222,94,224,91,225,93,226,64,176,97,177,120,219,121
+000df6 66dd
+000df7 77b6
+000df8 70c0
+000df9 71f0
+000dfa 72f1
+000dfb 73f2
+000dfc 74f3
+000dfd 75f4      .DB 221,102,182,119,192,112,240,113,241,114,242,115,243,116,244,117
+000dfe 76f5
+000dff 7df6
+000e00 a5fd
+000e01 48ac
+000e02 ada5
+000e03 a548
+000e04 48ae
+000e05 afa5      .DB 245,118,246,125,253,165,172,72,165,173,72,165,174,72,165,175
+000e06 a248
+000e07 c6ff
+000e08 c6d6
+000e09 c6c9
+000e0a e8f2
+000e0b 7e20
+000e0c e0ea
+000e0d b016      .DB 72,162,255,198,214,198,201,198,242,232,32,126,234,224,22,176
+000e0e bd0c
+000e0f edfe
+000e10 ac85
+000e11 dab5
+000e12 5620
+000e13 30ea
+000e14 20ec
+000e15 ea8d      .DB 12,189,254,237,133,172,181,218,32,86,234,48,236,32,141,234
+000e16 00a2
+000e17 d9b5
+000e18 7f29
+000e19 dab4
+000e1a 0210
+000e1b 8009
+000e1c d995
+000e1d e0e8      .DB 162,0,181,217,41,127,180,218,16,2,9,128,149,217,232,224
+000e1e d016
+000e1f a5ef
+000e20 09ef
+000e21 8580
+000e22 a5ef
+000e23 10d9
+000e24 e6c4
+000e25 e6d6      .DB 22,208,239,165,239,9,128,133,239,165,217,16,196,230,214,230
+000e26 a9f2
+000e27 8dfb
+000e28 9120
+000e29 21ad
+000e2a c991
+000e2b 08fe
+000e2c f7a9
+000e2d 208d      .DB 242,169,251,141,32,145,173,33,145,201,254,8,169,247,141,32
+000e2e 2891
+000e2f 0bd0
+000e30 00a0
+000e31 caea
+000e32 fcd0
+000e33 d088
+000e34 84f9
+000e35 a6c6      .DB 145,40,208,11,160,0,234,202,208,252,136,208,249,132,198,166
+000e36 68d6
+000e37 af85
+000e38 8568
+000e39 68ae
+000e3a ad85
+000e3b 8568
+000e3c 60ac
+000e3d d6a6      .DB 214,104,133,175,104,133,174,104,133,173,104,133,172,96,166,214
+000e3e b5e8
+000e3f 10d9
+000e40 86fb
+000e41 e0f2
+000e42 f016
+000e43 900d
+000e44 200b
+000e45 e975      .DB 232,181,217,16,251,134,242,224,22,240,13,144,11,32,117,233
+000e46 f2a6
+000e47 c6ca
+000e48 4cd6
+000e49 e70e
+000e4a aca5
+000e4b a548
+000e4c 48ad
+000e4d aea5      .DB 166,242,202,198,214,76,14,231,165,172,72,165,173,72,165,174
+000e4e a548
+000e4f 48af
+000e50 17a2
+000e51 20ca
+000e52 ea7e
+000e53 f2e4
+000e54 0e90
+000e55 0cf0      .DB 72,165,175,72,162,23,202,32,126,234,228,242,144,14,240,12
+000e56 fcbd
+000e57 85ed
+000e58 b5ac
+000e59 20d8
+000e5a ea56
+000e5b ea30
+000e5c 8d20
+000e5d a2ea      .DB 189,252,237,133,172,181,216,32,86,234,48,234,32,141,234,162
+000e5e e415
+000e5f 90f2
+000e60 b50f
+000e61 29da
+000e62 b47f
+000e63 10d9
+000e64 0902
+000e65 9580      .DB 21,228,242,144,15,181,218,41,127,180,217,16,2,9,128,149
+000e66 cada
+000e67 edd0
+000e68 f2a6
+000e69 0e20
+000e6a 68e7
+000e6b af85
+000e6c 8568
+000e6d 68ae      .DB 218,202,208,237,166,242,32,14,231,104,133,175,104,133,174,104
+000e6e ad85
+000e6f 8568
+000e70 60ac
+000e71 0329
+000e72 880d
+000e73 8502
+000e74 20ad
+000e75 ea6e      .DB 133,173,104,133,172,96,41,3,13,136,2,133,173,32,110,234
+000e76 15a0
+000e77 acb1
+000e78 d191
+000e79 aeb1
+000e7a f391
+000e7b 1088
+000e7c 60f5
+000e7d b220      .DB 160,21,177,172,145,209,177,174,145,243,136,16,245,96,32,178
+000e7e a5ea
+000e7f 85ac
+000e80 a5ae
+000e81 29ad
+000e82 0903
+000e83 8594
+000e84 60af
+000e85 fdbd      .DB 234,165,172,133,174,165,173,41,3,9,148,133,175,96,189,253
+000e86 85ed
+000e87 b5d1
+000e88 29d9
+000e89 0d03
+000e8a 0288
+000e8b d285
+000e8c a060
+000e8d 2015      .DB 237,133,209,181,217,41,3,13,136,2,133,210,96,160,21,32
+000e8e ea7e
+000e8f b220
+000e90 a9ea
+000e91 9120
+000e92 a9d1
+000e93 9101
+000e94 88f3
+000e95 f510      .DB 126,234,32,178,234,169,32,145,209,169,1,145,243,136,16,245
+000e96 a860
+000e97 02a9
+000e98 cd85
+000e99 b220
+000e9a 98ea
+000e9b d3a4
+000e9c d191
+000e9d 918a      .DB 96,168,169,2,133,205,32,178,234,152,164,211,145,209,138,145
+000e9e 60f3
+000e9f d1a5
+000ea0 f385
+000ea1 d2a5
+000ea2 0329
+000ea3 9409
+000ea4 f485
+000ea5 2060      .DB 243,96,165,209,133,243,165,210,41,3,9,148,133,244,96,32
+000ea6 ffea
+000ea7 cca5
+000ea8 29d0
+000ea9 cdc6
+000eaa 25d0
+000eab 14a9
+000eac cd85
+000ead d3a4      .DB 234,255,165,204,208,41,198,205,208,37,169,20,133,205,164,211
+000eae cf46
+000eaf 87ae
+000eb0 b102
+000eb1 b0d1
+000eb2 e611
+000eb3 85cf
+000eb4 20ce
+000eb5 eab2      .DB 70,207,174,135,2,177,209,176,17,230,207,133,206,32,178,234
+000eb6 f3b1
+000eb7 878d
+000eb8 ae02
+000eb9 0286
+000eba cea5
+000ebb 8049
+000ebc aa20
+000ebd adea      .DB 177,243,141,135,2,174,134,2,165,206,73,128,32,170,234,173
+000ebe 911f
+000ebf 4029
+000ec0 0bf0
+000ec1 00a0
+000ec2 c084
+000ec3 1cad
+000ec4 0991
+000ec5 d002      .DB 31,145,41,64,240,11,160,0,132,192,173,28,145,9,2,208
+000ec6 a509
+000ec7 d0c0
+000ec8 ad0d
+000ec9 911c
+000eca fd29
+000ecb 1e2c
+000ecc 7091
+000ecd 8d03      .DB 9,165,192,208,13,173,28,145,41,253,44,30,145,112,3,141
+000ece 911c
+000ecf 1e20
+000ed0 2ceb
+000ed1 9124
+000ed2 a868
+000ed3 aa68
+000ed4 4068
+000ed5 00a9      .DB 28,145,32,30,235,44,36,145,104,168,104,170,104,64,169,0
+000ed6 8d8d
+000ed7 a002
+000ed8 8440
+000ed9 8dcb
+000eda 9120
+000edb 21ae
+000edc e091
+000edd f0ff      .DB 141,141,2,160,64,132,203,141,32,145,174,33,145,224,255,240
+000ede a95e
+000edf 8dfe
+000ee0 9120
+000ee1 00a0
+000ee2 5ea9
+000ee3 f585
+000ee4 eca9
+000ee5 f685      .DB 94,169,254,141,32,145,160,0,169,94,133,245,169,236,133,246
+000ee6 08a2
+000ee7 21ad
+000ee8 cd91
+000ee9 9121
+000eea f6d0
+000eeb b04a
+000eec 4816
+000eed f5b1      .DB 162,8,173,33,145,205,33,145,208,246,74,176,22,72,177,245
+000eee 05c9
+000eef 0cb0
+000ef0 03c9
+000ef1 08f0
+000ef2 8d0d
+000ef3 8d02
+000ef4 028d
+000ef5 0210      .DB 201,5,176,12,201,3,240,8,13,141,2,141,141,2,16,2
+000ef6 cb84
+000ef7 c868
+000ef8 41c0
+000ef9 09b0
+000efa d0ca
+000efb 38df
+000efc 202e
+000efd d091      .DB 132,203,104,200,192,65,176,9,202,208,223,56,46,32,145,208
+000efe 6ccf
+000eff 028f
+000f00 cba4
+000f01 f5b1
+000f02 c4aa
+000f03 f0c5
+000f04 a007
+000f05 8c10      .DB 207,108,143,2,164,203,177,245,170,196,197,240,7,160,16,140
+000f06 028c
+000f07 36d0
+000f08 7f29
+000f09 8a2c
+000f0a 3002
+000f0b 7016
+000f0c c949
+000f0d f07f      .DB 140,2,208,54,41,127,44,138,2,48,22,112,73,201,127,240
+000f0e c929
+000f0f f014
+000f10 c90c
+000f11 f020
+000f12 c908
+000f13 f01d
+000f14 c904
+000f15 d011      .DB 41,201,20,240,12,201,32,240,8,201,29,240,4,201,17,208
+000f16 ac35
+000f17 028c
+000f18 05f0
+000f19 8cce
+000f1a d002
+000f1b ce2b
+000f1c 028b
+000f1d 26d0      .DB 53,172,140,2,240,5,206,140,2,208,43,206,139,2,208,38
+000f1e 04a0
+000f1f 8b8c
+000f20 a402
+000f21 88c6
+000f22 1c10
+000f23 cba4
+000f24 c584
+000f25 8dac      .DB 160,4,140,139,2,164,198,136,16,28,164,203,132,197,172,141
+000f26 8c02
+000f27 028e
+000f28 ffe0
+000f29 0ef0
+000f2a a68a
+000f2b ecc6
+000f2c 0289
+000f2d 06b0      .DB 2,140,142,2,224,255,240,14,138,166,198,236,137,2,176,6
+000f2e 779d
+000f2f e802
+000f30 c686
+000f31 f7a9
+000f32 208d
+000f33 6091
+000f34 8dad
+000f35 c902      .DB 157,119,2,232,134,198,169,247,141,32,145,96,173,141,2,201
+000f36 d003
+000f37 cd2c
+000f38 028e
+000f39 eef0
+000f3a 91ad
+000f3b 3002
+000f3c ea56
+000f3d eaea      .DB 3,208,44,205,142,2,240,238,173,145,2,48,86,234,234,234
+000f3e eaea
+000f3f eaea
+000f40 eaea
+000f41 eaea
+000f42 eaea
+000f43 eaea
+000f44 eaea
+000f45 eaea      .DB 234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234
+000f46 05ad
+000f47 4990
+000f48 8d02
+000f49 9005
+000f4a eaea
+000f4b eaea
+000f4c 434c
+000f4d 0aec      .DB 173,5,144,73,2,141,5,144,234,234,234,234,76,67,236,10
+000f4e 08c9
+000f4f 0490
+000f50 06a9
+000f51 eaea
+000f52 eaea
+000f53 eaea
+000f54 eaea
+000f55 eaea      .DB 201,8,144,4,169,6,234,234,234,234,234,234,234,234,234,234
+000f56 eaea
+000f57 eaea
+000f58 eaea
+000f59 eaea
+000f5a eaea
+000f5b eaea
+000f5c eaea
+000f5d eaea      .DB 234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234
+000f5e eaea
+000f5f eaea
+000f60 eaea
+000f61 eaea
+000f62 bdaa
+000f63 ec46
+000f64 f585
+000f65 47bd      .DB 234,234,234,234,234,234,234,234,170,189,70,236,133,245,189,71
+000f66 85ec
+000f67 4cf6
+000f68 eb74
+000f69 ec5e
+000f6a ec9f
+000f6b ece0
+000f6c eda3
+000f6d ec5e      .DB 236,133,246,76,116,235,94,236,159,236,224,236,163,237,94,236
+000f6e ec9f
+000f6f ed69
+000f70 eda3
+000f71 ed21
+000f72 ed69
+000f73 ed69
+000f74 eda3
+000f75 3331      .DB 159,236,105,237,163,237,33,237,105,237,105,237,163,237,49,51
+000f76 3735
+000f77 2b39
+000f78 145c
+000f79 575f
+000f7a 5952
+000f7b 5049
+000f7c 0d2a
+000f7d 4104      .DB 53,55,57,43,92,20,95,87,82,89,73,80,42,13,4,65
+000f7e 4744
+000f7f 4c4a
+000f80 1d3b
+000f81 0103
+000f82 5658
+000f83 2c4e
+000f84 112f
+000f85 5a20      .DB 68,71,74,76,59,29,3,1,88,86,78,44,47,17,32,90
+000f86 4243
+000f87 2e4d
+000f88 8501
+000f89 5302
+000f8a 4846
+000f8b 3a4b
+000f8c 863d
+000f8d 4551      .DB 67,66,77,46,1,133,2,83,70,72,75,58,61,134,81,69
+000f8e 5554
+000f8f 404f
+000f90 875e
+000f91 3432
+000f92 3836
+000f93 2d30
+000f94 8813
+000f95 21ff      .DB 84,85,79,64,94,135,50,52,54,56,48,45,19,136,255,33
+000f96 2523
+000f97 2927
+000f98 a9db
+000f99 5f94
+000f9a d2d7
+000f9b c9d9
+000f9c c0d0
+000f9d 048d      .DB 35,37,39,41,219,169,148,95,215,210,217,201,208,192,141,4
+000f9e c4c1
+000f9f cac7
+000fa0 5dcc
+000fa1 839d
+000fa2 d801
+000fa3 ced6
+000fa4 3f3c
+000fa5 a091      .DB 193,196,199,202,204,93,157,131,1,216,214,206,60,63,145,160
+000fa6 c3da
+000fa7 cdc2
+000fa8 013e
+000fa9 0289
+000faa c6d3
+000fab cbc8
+000fac 3d5b
+000fad d18a      .DB 218,195,194,205,62,1,137,2,211,198,200,203,91,61,138,209
+000fae d4c5
+000faf cfd5
+000fb0 deba
+000fb1 228b
+000fb2 2624
+000fb3 3028
+000fb4 93dd
+000fb5 ff8c      .DB 197,212,213,207,186,222,139,34,36,38,40,48,221,147,140,255
+000fb6 2321
+000fb7 2725
+000fb8 a629
+000fb9 94a8
+000fba b35f
+000fbb b7b2
+000fbc afa2
+000fbd 8ddf      .DB 33,35,37,39,41,166,168,148,95,179,178,183,162,175,223,141
+000fbe b004
+000fbf a5ac
+000fc0 b6b5
+000fc1 9d5d
+000fc2 0183
+000fc3 bebd
+000fc4 3caa
+000fc5 913f      .DB 4,176,172,165,181,182,93,157,131,1,189,190,170,60,63,145
+000fc6 ada0
+000fc7 bfbc
+000fc8 3ea7
+000fc9 8901
+000fca ae02
+000fcb b4bb
+000fcc 5ba1
+000fcd 8a3d      .DB 160,173,188,191,167,62,1,137,2,174,187,180,161,91,61,138
+000fce b1ab
+000fcf b8a3
+000fd0 a4b9
+000fd1 8bde
+000fd2 2422
+000fd3 2826
+000fd4 dc30
+000fd5 8c93      .DB 171,177,163,184,185,164,222,139,34,36,38,40,48,220,147,140
+000fd6 c9ff
+000fd7 d00e
+000fd8 a90b
+000fd9 0d02
+000fda 9005
+000fdb 058d
+000fdc 4c90
+000fdd e6dc      .DB 255,201,14,208,11,169,2,13,5,144,141,5,144,76,220,230
+000fde 8ec9
+000fdf 0bd0
+000fe0 fda9
+000fe1 052d
+000fe2 8d90
+000fe3 9005
+000fe4 dc4c
+000fe5 c9e6      .DB 201,142,208,11,169,253,45,5,144,141,5,144,76,220,230,201
+000fe6 d008
+000fe7 a90a
+000fe8 0d80
+000fe9 0291
+000fea 918d
+000feb 3002
+000fec c9ef
+000fed d009      .DB 8,208,10,169,128,13,145,2,141,145,2,48,239,201,9,208
+000fee a9eb
+000fef 2d7f
+000ff0 0291
+000ff1 918d
+000ff2 1002
+000ff3 e8e1
+000ff4 d9b5
+000ff5 8009      .DB 235,169,127,45,145,2,141,145,2,16,225,232,181,217,9,128
+000ff6 d995
+000ff7 a5ca
+000ff8 18d5
+000ff9 154c
+000ffa ffe7
+000ffb ffff
+000ffc ffff
+000ffd ffff      .DB 149,217,202,165,213,24,76,21,231,255,255,255,255,255,255,255
+000ffe ffff
+000fff ff04
+001000 ffff
+001001 ffff
+001002 9de2
+001003 0183
+001004 ffff
+001005 ffff      .DB 255,255,4,255,255,255,255,255,226,157,131,1,255,255,255,255
+001006 91ff
+001007 ffa0
+001008 ffff
+001009 eeff
+00100a 8901
+00100b ff02
+00100c ffff
+00100d e1ff      .DB 255,145,160,255,255,255,255,238,1,137,2,255,255,255,255,225
+00100e 8afd
+00100f ffff
+001010 ffff
+001011 b0ff
+001012 8be0
+001013 f4f2
+001014 fff6
+001015 edf0      .DB 253,138,255,255,255,255,255,176,224,139,242,244,246,255,240,237
+001016 8c93
+001017 90ff
+001018 9c1c
+001019 121f
+00101a ffff
+00101b 06ff
+00101c 12ff
+00101d ffff      .DB 147,140,255,144,28,156,31,18,255,255,255,6,255,18,255,255
+00101e ffff
+00101f ffff
+001020 ffff
+001021 ffff
+001022 ffff
+001023 ffff
+001024 ffff
+001025 ffff      .DB 255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255
+001026 ffff
+001027 ffff
+001028 ffff
+001029 ffff
+00102a ffff
+00102b ffff
+00102c ffff
+00102d ffff      .DB 255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255
+00102e ffff
+00102f ffff
+001030 ffff
+001031 ffff
+001032 ffff
+001033 05ff
+001034 1e9f
+001035 929e      .DB 255,255,255,255,255,255,255,255,255,255,255,5,159,30,158,146
+001036 ffff
+001037 ffff
+001038 1905
+001039 2e16
+00103a c000
+00103b 0000
+00103c 0000
+00103d 0000      .DB 255,255,255,255,5,25,22,46,0,192,0,0,0,0,0,0
+00103e 0000
+00103f 1b00
+001040 4f4c
+001041 4441
+001042 520d
+001043 4e55
+001044 000d
+001045 2c16      .DB 0,0,0,27,76,79,65,68,13,82,85,78,13,0,22,44
+001046 5842
+001047 846e
+001048 b09a
+001049 dcc6
+00104a 08f2
+00104b 341e
+00104c 604a
+00104d 8c76      .DB 66,88,110,132,154,176,198,220,242,8,30,52,74,96,118,140
+00104e b8a2
+00104f e4ce
+001050 4009
+001051 092c
+001052 2020
+001053 f160
+001054 2448
+001055 1094      .DB 162,184,206,228,9,64,44,9,32,32,96,241,72,36,148,16
+001056 380a
+001057 a366
+001058 4920
+001059 46ee
+00105a 4694
+00105b 68a3
+00105c 9585
+00105d a020      .DB 10,56,102,163,32,73,238,70,148,70,163,104,133,149,32,160
+00105e c9e4
+00105f d03f
+001060 2003
+001061 ef84
+001062 1fad
+001063 0991
+001064 8d80
+001065 911f      .DB 228,201,63,208,3,32,132,239,173,31,145,9,128,141,31,145
+001066 8d20
+001067 20ef
+001068 e4a0
+001069 9620
+00106a 78ef
+00106b a020
+00106c 20e4
+00106d e4b2      .DB 32,141,239,32,160,228,32,150,239,120,32,160,228,32,178,228
+00106e b04a
+00106f 2061
+001070 ef84
+001071 a324
+001072 0c10
+001073 b220
+001074 4ae4
+001075 fa90      .DB 74,176,97,32,132,239,36,163,16,12,32,178,228,74,144,250
+001076 b220
+001077 4ae4
+001078 fab0
+001079 b220
+00107a 4ae4
+00107b fa90
+00107c 8d20
+00107d a9ef      .DB 32,178,228,74,176,250,32,178,228,74,144,250,32,141,239,169
+00107e 8508
+00107f ada5
+001080 911f
+001081 1fcd
+001082 d091
+001083 4af8
+001084 904a
+001085 6638      .DB 8,133,165,173,31,145,205,31,145,208,248,74,74,144,56,102
+001086 b095
+001087 2005
+001088 e4a9
+001089 03d0
+00108a a020
+00108b 20e4
+00108c ef84
+00108d eaea      .DB 149,176,5,32,169,228,208,3,32,160,228,32,132,239,234,234
+00108e eaea
+00108f 2cad
+001090 2991
+001091 09df
+001092 8d02
+001093 912c
+001094 a5c6
+001095 d3d0      .DB 234,234,173,44,145,41,223,9,2,141,44,145,198,165,208,211
+001096 04a9
+001097 298d
+001098 ad91
+001099 912d
+00109a 2029
+00109b 0bd0
+00109c b220
+00109d 4ae4      .DB 169,4,141,41,145,173,45,145,41,32,208,11,32,178,228,74
+00109e f3b0
+00109f 6058
+0010a0 80a9
+0010a1 a92c
+0010a2 2003
+0010a3 fe6a
+0010a4 1858
+0010a5 4990      .DB 176,243,88,96,169,128,44,169,3,32,106,254,88,24,144,73
+0010a6 9585
+0010a7 4020
+0010a8 adee
+0010a9 911f
+0010aa 7f29
+0010ab 1f8d
+0010ac 6091
+0010ad 9585      .DB 133,149,32,64,238,173,31,145,41,127,141,31,145,96,133,149
+0010ae 4020
+0010af 78ee
+0010b0 a920
+0010b1 20e4
+0010b2 eec5
+0010b3 8420
+0010b4 20ef
+0010b5 e4b2      .DB 32,64,238,120,32,169,228,32,197,238,32,132,239,32,178,228
+0010b6 fbb0
+0010b7 6058
+0010b8 9424
+0010b9 0530
+0010ba 6638
+0010bb d094
+0010bc 4805
+0010bd 4920      .DB 176,251,88,96,36,148,48,5,56,102,148,208,5,72,32,73
+0010be 68ee
+0010bf 9585
+0010c0 6018
+0010c1 8d20
+0010c2 adef
+0010c3 911f
+0010c4 8009
+0010c5 1f8d      .DB 238,104,133,149,24,96,32,141,239,173,31,145,9,128,141,31
+0010c6 a991
+0010c7 2c5f
+0010c8 3fa9
+0010c9 1c20
+0010ca 20ee
+0010cb eec5
+0010cc a28a
+0010cd ca0b      .DB 145,169,95,44,169,63,32,28,238,32,197,238,138,162,11,202
+0010ce fdd0
+0010cf 20aa
+0010d0 ef84
+0010d1 a04c
+0010d2 78e4
+0010d3 00a9
+0010d4 a585
+0010d5 8420      .DB 208,253,170,32,132,239,76,160,228,120,169,0,133,165,32,132
+0010d6 20ef
+0010d7 e4b2
+0010d8 fb90
+0010d9 a020
+0010da a9e4
+0010db 8d01
+0010dc 9129
+0010dd 2dad      .DB 239,32,178,228,144,251,32,160,228,169,1,141,41,145,173,45
+0010de 2991
+0010df d020
+0010e0 2007
+0010e1 e4b2
+0010e2 f4b0
+0010e3 1890
+0010e4 a5a5
+0010e5 05f0      .DB 145,41,32,208,7,32,178,228,176,244,144,24,165,165,240,5
+0010e6 02a9
+0010e7 b94c
+0010e8 20ee
+0010e9 e4a9
+0010ea 0c20
+0010eb a9ef
+0010ec 2040
+0010ed fe6a      .DB 169,2,76,185,238,32,169,228,32,12,239,169,64,32,106,254
+0010ee a5e6
+0010ef d5d0
+0010f0 08a9
+0010f1 a585
+0010f2 1fad
+0010f3 cd91
+0010f4 911f
+0010f5 f8d0      .DB 230,165,208,213,169,8,133,165,173,31,145,205,31,145,208,248
+0010f6 904a
+0010f7 4af5
+0010f8 a466
+0010f9 1fad
+0010fa cd91
+0010fb 911f
+0010fc f8d0
+0010fd b04a      .DB 74,144,245,74,102,164,173,31,145,205,31,145,208,248,74,176
+0010fe c6f5
+0010ff d0a5
+001100 20e3
+001101 e4a9
+001102 90a5
+001103 03f0
+001104 0c20
+001105 a5ef      .DB 245,198,165,208,227,32,169,228,165,144,240,3,32,12,239,165
+001106 58a4
+001107 6018
+001108 2cad
+001109 2991
+00110a 8dfd
+00110b 912c
+00110c ad60
+00110d 912c      .DB 164,88,24,96,173,44,145,41,253,141,44,145,96,173,44,145
+00110e 0209
+00110f 2c8d
+001110 6091
+001111 04a9
+001112 298d
+001113 ad91
+001114 912d
+001115 2029      .DB 9,2,141,44,145,96,169,4,141,41,145,173,45,145,41,32
+001116 f9f0
+001117 a560
+001118 f0b4
+001119 3047
+00111a 463f
+00111b a2b6
+00111c 9000
+00111d ca01      .DB 240,249,96,165,180,240,71,48,63,70,182,162,0,144,1,202
+00111e 458a
+00111f 85bd
+001120 c6bd
+001121 f0b4
+001122 8a06
+001123 2029
+001124 b585
+001125 a960      .DB 138,69,189,133,189,198,180,240,6,138,41,32,133,181,96,169
+001126 2c20
+001127 0294
+001128 14f0
+001129 1c30
+00112a 1470
+00112b bda5
+00112c 01d0
+00112d c6ca      .DB 32,44,148,2,240,20,48,28,112,20,165,189,208,1,202,198
+00112e adb4
+00112f 0293
+001130 e310
+001131 b4c6
+001132 dfd0
+001133 b4e6
+001134 f0d0
+001135 bda5      .DB 180,173,147,2,16,227,198,180,208,223,230,180,208,240,165,189
+001136 edf0
+001137 ead0
+001138 e970
+001139 e650
+00113a b4e6
+00113b ffa2
+00113c cbd0
+00113d 94ad      .DB 240,237,208,234,112,233,80,230,230,180,162,255,208,203,173,148
+00113e 4a02
+00113f 0790
+001140 202c
+001141 1091
+001142 501d
+001143 a91e
+001144 8500
+001145 85bd      .DB 2,74,144,7,44,32,145,16,29,80,30,169,0,133,189,133
+001146 aeb5
+001147 0298
+001148 b486
+001149 9dac
+00114a cc02
+00114b 029e
+00114c 13f0
+00114d f9b1      .DB 181,174,152,2,134,180,172,157,2,204,158,2,240,19,177,249
+00114e b685
+00114f 9dee
+001150 6002
+001151 40a9
+001152 a92c
+001153 0d10
+001154 0297
+001155 978d      .DB 133,182,238,157,2,96,169,64,44,169,16,13,151,2,141,151
+001156 a902
+001157 8d40
+001158 911e
+001159 a260
+00115a a909
+00115b 2c20
+00115c 0293
+00115d 01f0      .DB 2,169,64,141,30,145,96,162,9,169,32,44,147,2,240,1
+00115e 50ca
+00115f ca02
+001160 60ca
+001161 a9a6
+001162 2ed0
+001163 a8c6
+001164 31f0
+001165 0d30      .DB 202,80,2,202,202,96,166,169,208,46,198,168,240,49,48,13
+001166 a7a5
+001167 ab45
+001168 ab85
+001169 a746
+00116a aa66
+00116b c660
+00116c a5a8
+00116d f0a7      .DB 165,167,69,171,133,171,70,167,102,170,96,198,168,165,167,240
+00116e ad62
+00116f 0293
+001170 a90a
+001171 6501
+001172 d0a8
+001173 a9ef
+001174 8d90
+001175 911e      .DB 98,173,147,2,10,169,1,101,168,208,239,169,144,141,30,145
+001176 a985
+001177 20a9
+001178 1e8d
+001179 6091
+00117a a7a5
+00117b efd0
+00117c a985
+00117d ac60      .DB 133,169,169,32,141,30,145,96,165,167,208,239,133,169,96,172
+00117e 029b
+00117f ccc8
+001180 029c
+001181 2af0
+001182 9b8c
+001183 8802
+001184 aaa5
+001185 98ae      .DB 155,2,200,204,156,2,240,42,140,155,2,136,165,170,174,152
+001186 e002
+001187 f009
+001188 4a04
+001189 d0e8
+00118a 91f8
+00118b a9f7
+00118c 2c20
+00118d 0294      .DB 2,224,9,240,4,74,232,208,248,145,247,169,32,44,148,2
+00118e b9f0
+00118f b630
+001190 a7a5
+001191 ab45
+001192 03f0
+001193 ae70
+001194 502c
+001195 a9ab      .DB 240,185,48,182,165,167,69,171,240,3,112,174,44,80,171,169
+001196 2c01
+001197 04a9
+001198 a92c
+001199 2c80
+00119a 02a9
+00119b 970d
+00119c 8d02
+00119d 0297      .DB 1,44,169,4,44,169,128,44,169,2,13,151,2,141,151,2
+00119e 5b4c
+00119f a5f0
+0011a0 d0aa
+0011a1 f0f1
+0011a2 4cec
+0011a3 f796
+0011a4 9a85
+0011a5 94ad      .DB 76,91,240,165,170,208,241,240,236,76,150,247,133,154,173,148
+0011a6 4a02
+0011a7 2790
+0011a8 02a9
+0011a9 102c
+0011aa 1091
+0011ab d01d
+0011ac ad1e
+0011ad 911e      .DB 2,74,144,39,169,2,44,16,145,16,29,208,30,173,30,145
+0011ae 3029
+0011af f9d0
+0011b0 102c
+0011b1 7091
+0011b2 adfb
+0011b3 9110
+0011b4 0209
+0011b5 108d      .DB 41,48,208,249,44,16,145,112,251,173,16,145,9,2,141,16
+0011b6 2c91
+0011b7 9110
+0011b8 0570
+0011b9 f930
+0011ba 1620
+0011bb 18f0
+0011bc ac60
+0011bd 029e      .DB 145,44,16,145,112,5,48,249,32,22,240,24,96,172,158,2
+0011be ccc8
+0011bf 029d
+0011c0 f7f0
+0011c1 9e8c
+0011c2 8802
+0011c3 f991
+0011c4 1e2c
+0011c5 5091      .DB 200,204,157,2,240,247,140,158,2,136,145,249,44,30,145,80
+0011c6 6001
+0011c7 99ad
+0011c8 8d02
+0011c9 9114
+0011ca 9aad
+0011cb 8d02
+0011cc 9115
+0011cd c0a9      .DB 1,96,173,153,2,141,20,145,173,154,2,141,21,145,169,192
+0011ce 1e8d
+0011cf 4c91
+0011d0 efee
+0011d1 9985
+0011d2 94ad
+0011d3 4a02
+0011d4 2890
+0011d5 0829      .DB 141,30,145,76,238,239,133,153,173,148,2,74,144,40,41,8
+0011d6 24f0
+0011d7 02a9
+0011d8 102c
+0011d9 1091
+0011da f0bf
+0011db 2c19
+0011dc 911e
+0011dd fb70      .DB 240,36,169,2,44,16,145,16,191,240,25,44,30,145,112,251
+0011de 10ad
+0011df 2991
+0011e0 8dfd
+0011e1 9110
+0011e2 10ad
+0011e3 2991
+0011e4 f004
+0011e5 a9f9      .DB 173,16,145,41,253,141,16,145,173,16,145,41,4,240,249,169
+0011e6 8d90
+0011e7 911e
+0011e8 6018
+0011e9 1ead
+0011ea 2991
+0011eb f030
+0011ec 18f2
+0011ed ac60      .DB 144,141,30,145,24,96,173,30,145,41,48,240,242,24,96,172
+0011ee 029c
+0011ef 9bcc
+0011f0 f002
+0011f1 b106
+0011f2 eef7
+0011f3 029c
+0011f4 a960
+0011f5 6000      .DB 156,2,204,155,2,240,6,177,247,238,156,2,96,169,0,96
+0011f6 ad48
+0011f7 911e
+0011f8 0cf0
+0011f9 1ead
+0011fa 2991
+0011fb d060
+0011fc a9f9
+0011fd 8d10      .DB 72,173,30,145,240,12,173,30,145,41,96,208,249,169,16,141
+0011fe 911e
+0011ff 6068
+001200 490d
+001201 4f2f
+001202 4520
+001203 5252
+001204 524f
+001205 a320      .DB 30,145,104,96,13,73,47,79,32,69,82,82,79,82,32,163
+001206 530d
+001207 4145
+001208 4352
+001209 4948
+00120a 474e
+00120b 46a0
+00120c 524f
+00120d 0da0      .DB 13,83,69,65,82,67,72,73,78,71,160,70,79,82,160,13
+00120e 5250
+00120f 5345
+001210 2053
+001211 4c50
+001212 5941
+001213 4f20
+001214 204e
+001215 4154      .DB 80,82,69,83,83,32,80,76,65,89,32,79,78,32,84,65
+001216 c550
+001217 5250
+001218 5345
+001219 2053
+00121a 4552
+00121b 4f43
+00121c 4452
+00121d 2620      .DB 80,197,80,82,69,83,83,32,82,69,67,79,82,68,32,38
+00121e 5020
+00121f 414c
+001220 2059
+001221 4e4f
+001222 5420
+001223 5041
+001224 0dc5
+001225 4f4c      .DB 32,80,76,65,89,32,79,78,32,84,65,80,197,13,76,79
+001226 4441
+001227 4e49
+001228 0dc7
+001229 4153
+00122a 4956
+00122b 474e
+00122c 0da0
+00122d 4556      .DB 65,68,73,78,199,13,83,65,86,73,78,71,160,13,86,69
+00122e 4952
+00122f 5946
+001230 4e49
+001231 0dc7
+001232 4f46
+001233 4e55
+001234 a044
+001235 4f0d      .DB 82,73,70,89,73,78,199,13,70,79,85,78,68,160,13,79
+001236 8d4b
+001237 9d24
+001238 0d10
+001239 74b9
+00123a 08f1
+00123b 7f29
+00123c d220
+00123d c8ff      .DB 75,141,36,157,16,13,185,116,241,8,41,127,32,210,255,200
+00123e 1028
+00123f 18f3
+001240 a560
+001241 d099
+001242 a508
+001243 f0c6
+001244 786d
+001245 cf4c      .DB 40,16,243,24,96,165,153,208,8,165,198,240,109,120,76,207
+001246 c9e5
+001247 d002
+001248 8418
+001249 2097
+00124a f14f
+00124b 97a4
+00124c 6018
+00124d 99a5      .DB 229,201,2,208,24,132,151,32,79,241,164,151,24,96,165,153
+00124e 0bd0
+00124f d3a5
+001250 ca85
+001251 d6a5
+001252 c985
+001253 4f4c
+001254 c9e6
+001255 d003      .DB 208,11,165,211,133,202,165,214,133,201,76,79,230,201,3,208
+001256 8509
+001257 a5d0
+001258 85d5
+001259 4cc8
+00125a e64f
+00125b 38b0
+00125c 02c9
+00125d 3ff0      .DB 9,133,208,165,213,133,200,76,79,230,176,56,201,2,240,63
+00125e 9786
+00125f 5020
+001260 b0f2
+001261 4816
+001262 5020
+001263 b0f2
+001264 d00d
+001265 a905      .DB 134,151,32,80,242,176,22,72,32,80,242,176,13,208,5,169
+001266 2040
+001267 fe6a
+001268 a6c6
+001269 97a6
+00126a 6068
+00126b 68aa
+00126c a68a
+00126d 6097      .DB 64,32,106,254,198,166,166,151,104,96,170,104,138,166,151,96
+00126e 8a20
+00126f d0f8
+001270 200b
+001271 f8c0
+001272 11b0
+001273 00a9
+001274 a685
+001275 f0f0      .DB 32,138,248,208,11,32,192,248,176,17,169,0,133,166,240,240
+001276 b2b1
+001277 6018
+001278 90a5
+001279 04f0
+00127a 0da9
+00127b 6018
+00127c 194c
+00127d 20ef      .DB 177,178,24,96,165,144,240,4,169,13,24,96,76,25,239,32
+00127e f205
+00127f 05b0
+001280 00c9
+001281 f7f0
+001282 6018
+001283 a548
+001284 c99a
+001285 d003      .DB 5,242,176,5,201,0,240,247,24,96,72,165,154,201,3,208
+001286 6804
+001287 424c
+001288 90e7
+001289 6804
+00128a e44c
+00128b c9ee
+00128c f002
+00128d 682a      .DB 4,104,76,66,231,144,4,104,76,228,238,201,2,240,42,104
+00128e 9e85
+00128f 8a48
+001290 9848
+001291 2048
+001292 f88a
+001293 0ed0
+001294 e320
+001295 b0f8      .DB 133,158,72,138,72,152,72,32,138,248,208,14,32,227,248,176
+001296 a90e
+001297 a002
+001298 9100
+001299 c8b2
+00129a a684
+00129b 9ea5
+00129c b291
+00129d 6818      .DB 14,169,2,160,0,145,178,200,132,166,165,158,145,178,24,104
+00129e 68a8
+00129f 68aa
+0012a0 0290
+0012a1 00a9
+0012a2 6860
+0012a3 9786
+0012a4 9e84
+0012a5 ed20      .DB 168,104,170,104,144,2,169,0,96,104,134,151,132,158,32,237
+0012a6 a6f0
+0012a7 a497
+0012a8 189e
+0012a9 2060
+0012aa f3cf
+0012ab 03f0
+0012ac 844c
+0012ad 20f7      .DB 240,166,151,164,158,24,96,32,207,243,240,3,76,132,247,32
+0012ae f3df
+0012af baa5
+0012b0 16f0
+0012b1 03c9
+0012b2 12f0
+0012b3 14b0
+0012b4 02c9
+0012b5 03d0      .DB 223,243,165,186,240,22,201,3,240,18,176,20,201,2,208,3
+0012b6 164c
+0012b7 a6f1
+0012b8 e0b9
+0012b9 f060
+0012ba 4c03
+0012bb f78d
+0012bc 9985
+0012bd 6018      .DB 76,22,241,166,185,224,96,240,3,76,141,247,133,153,24,96
+0012be 20aa
+0012bf ee14
+0012c0 b9a5
+0012c1 0610
+0012c2 d320
+0012c3 4cee
+0012c4 f301
+0012c5 ce20      .DB 170,32,20,238,165,185,16,6,32,211,238,76,1,243,32,206
+0012c6 8aee
+0012c7 9024
+0012c8 e610
+0012c9 8a4c
+0012ca 20f7
+0012cb f3cf
+0012cc 03f0
+0012cd 844c      .DB 238,138,36,144,16,230,76,138,247,32,207,243,240,3,76,132
+0012ce 20f7
+0012cf f3df
+0012d0 baa5
+0012d1 03d0
+0012d2 904c
+0012d3 c9f7
+0012d4 f003
+0012d5 b00f      .DB 247,32,223,243,165,186,208,3,76,144,247,201,3,240,15,176
+0012d6 c911
+0012d7 d002
+0012d8 4c03
+0012d9 f0bc
+0012da b9a6
+0012db 60e0
+0012dc eaf0
+0012dd 9a85      .DB 17,201,2,208,3,76,188,240,166,185,224,96,240,234,133,154
+0012de 6018
+0012df 20aa
+0012e0 ee17
+0012e1 b9a5
+0012e2 0510
+0012e3 c520
+0012e4 d0ee
+0012e5 2003      .DB 24,96,170,32,23,238,165,185,16,5,32,197,238,208,3,32
+0012e6 eec0
+0012e7 248a
+0012e8 1090
+0012e9 4ce7
+0012ea f78a
+0012eb d420
+0012ec f0f3
+0012ed 1802      .DB 192,238,138,36,144,16,231,76,138,247,32,212,243,240,2,24
+0012ee 2060
+0012ef f3df
+0012f0 488a
+0012f1 baa5
+0012f2 57f0
+0012f3 03c9
+0012f4 53f0
+0012f5 4eb0      .DB 96,32,223,243,138,72,165,186,240,87,201,3,240,83,176,78
+0012f6 02c9
+0012f7 29d0
+0012f8 2068
+0012f9 f3b2
+0012fa 7da9
+0012fb 1e8d
+0012fc a991
+0012fd 8d06      .DB 201,2,208,41,104,32,178,243,169,125,141,30,145,169,6,141
+0012fe 9110
+0012ff eea9
+001300 1c8d
+001301 2091
+001302 fe75
+001303 f8a5
+001304 01f0
+001305 a5c8      .DB 16,145,169,238,141,28,145,32,117,254,165,248,240,1,200,165
+001306 f0fa
+001307 c801
+001308 00a9
+001309 f885
+00130a fa85
+00130b 3c4c
+00130c a5f5
+00130d 29b9      .DB 250,240,1,200,169,0,133,248,133,250,76,60,245,165,185,41
+00130e f00f
+00130f 201e
+001310 f84d
+001311 00a9
+001312 9020
+001313 4cf2
+001314 e4cf
+001315 2eb0      .DB 15,240,30,32,77,248,169,0,32,144,242,76,207,228,176,46
+001316 b9a5
+001317 62c9
+001318 0bd0
+001319 05a9
+00131a e720
+00131b 4cf7
+00131c f3b1
+00131d da20      .DB 165,185,201,98,208,11,169,5,32,231,247,76,177,243,32,218
+00131e 68f6
+00131f c6aa
+001320 e498
+001321 f098
+001322 a414
+001323 b998
+001324 0259
+001325 599d      .DB 246,104,170,198,152,228,152,240,20,164,152,185,89,2,157,89
+001326 b902
+001327 0263
+001328 639d
+001329 b902
+00132a 026d
+00132b 6d9d
+00132c 1802
+00132d a960      .DB 2,185,99,2,157,99,2,185,109,2,157,109,2,24,96,169
+00132e 8500
+00132f 8a90
+001330 98a6
+001331 30ca
+001332 dd15
+001333 0259
+001334 f8d0
+001335 bd60      .DB 0,133,144,138,166,152,202,48,21,221,89,2,208,248,96,189
+001336 0259
+001337 b885
+001338 63bd
+001339 8502
+00133a bdba
+00133b 026d
+00133c b985
+00133d a960      .DB 89,2,133,184,189,99,2,133,186,189,109,2,133,185,96,169
+00133e 8500
+00133f a298
+001340 e403
+001341 b09a
+001342 2003
+001343 ef04
+001344 99e4
+001345 03b0      .DB 0,133,152,162,3,228,154,176,3,32,4,239,228,153,176,3
+001346 f620
+001347 86ee
+001348 a99a
+001349 8500
+00134a 6099
+00134b b8a6
+00134c 03d0
+00134d 8d4c      .DB 32,246,238,134,154,169,0,133,153,96,166,184,208,3,76,141
+00134e 20f7
+00134f f3cf
+001350 03d0
+001351 814c
+001352 a6f7
+001353 e098
+001354 900a
+001355 4c03      .DB 247,32,207,243,208,3,76,129,247,166,152,224,10,144,3,76
+001356 f77e
+001357 98e6
+001358 b8a5
+001359 599d
+00135a a502
+00135b 09b9
+00135c 8560
+00135d 9db9      .DB 126,247,230,152,165,184,157,89,2,165,185,9,96,133,185,157
+00135e 026d
+00135f baa5
+001360 639d
+001361 f002
+001362 c95a
+001363 f003
+001364 9056
+001365 2005      .DB 109,2,165,186,157,99,2,240,90,201,3,240,86,144,5,32
+001366 f495
+001367 4f90
+001368 02c9
+001369 03d0
+00136a c74c
+00136b 20f4
+00136c f84d
+00136d 03b0      .DB 149,244,144,79,201,2,208,3,76,199,244,32,77,248,176,3
+00136e 964c
+00136f a5f7
+001370 29b9
+001371 d00f
+001372 201f
+001373 f894
+001374 36b0
+001375 4720      .DB 76,150,247,165,185,41,15,208,31,32,148,248,176,54,32,71
+001376 a5f6
+001377 f0b7
+001378 200a
+001379 f867
+00137a 1890
+00137b 28f0
+00137c 874c
+00137d 20f7      .DB 246,165,183,240,10,32,103,248,144,24,240,40,76,135,247,32
+00137e f7af
+00137f 20f0
+001380 0c90
+001381 f4b0
+001382 b720
+001383 b0f8
+001384 a917
+001385 2004      .DB 175,247,240,32,144,12,176,244,32,183,248,176,23,169,4,32
+001386 f7e7
+001387 bfa9
+001388 b9a4
+001389 60c0
+00138a 07f0
+00138b 00a0
+00138c 02a9
+00138d b291      .DB 231,247,169,191,164,185,192,96,240,7,160,0,169,2,145,178
+00138e 8598
+00138f 18a6
+001390 a560
+001391 30b9
+001392 a42c
+001393 f0b7
+001394 a528
+001395 20ba      .DB 152,133,166,24,96,165,185,48,44,164,183,240,40,165,186,32
+001396 ee17
+001397 b9a5
+001398 f009
+001399 c020
+00139a a5ee
+00139b 1090
+00139c 6805
+00139d 4c68      .DB 23,238,165,185,9,240,32,192,238,165,144,16,5,104,104,76
+00139e f78a
+00139f b7a5
+0013a0 0cf0
+0013a1 00a0
+0013a2 bbb1
+0013a3 e420
+0013a4 c8ee
+0013a5 b7c4      .DB 138,247,165,183,240,12,160,0,177,187,32,228,238,200,196,183
+0013a6 f6d0
+0013a7 0420
+0013a8 18ef
+0013a9 a960
+0013aa 8d06
+0013ab 9112
+0013ac 108d
+0013ad a991      .DB 208,246,32,4,239,24,96,169,6,141,18,145,141,16,145,169
+0013ae 8dee
+0013af 911c
+0013b0 00a0
+0013b1 978c
+0013b2 c402
+0013b3 f0b7
+0013b4 b10a
+0013b5 99bb      .DB 238,141,28,145,160,0,140,151,2,196,183,240,10,177,187,153
+0013b6 0293
+0013b7 c0c8
+0013b8 d004
+0013b9 20f2
+0013ba f027
+0013bb 988e
+0013bc ad02
+0013bd 0293      .DB 147,2,200,192,4,208,242,32,39,240,142,152,2,173,147,2
+0013be 0f29
+0013bf 00d0
+0013c0 aa0a
+0013c1 5abd
+0013c2 0aff
+0013c3 bda8
+0013c4 ff5b
+0013c5 482a      .DB 41,15,208,0,10,170,189,90,255,10,168,189,91,255,42,72
+0013c6 6998
+0013c7 8dc8
+0013c8 0299
+0013c9 6968
+0013ca 8d00
+0013cb 029a
+0013cc 94ad
+0013cd 4a02      .DB 152,105,200,141,153,2,104,105,0,141,154,2,173,148,2,74
+0013ce 0990
+0013cf 20ad
+0013d0 0a91
+0013d1 03b0
+0013d2 164c
+0013d3 adf0
+0013d4 029b
+0013d5 9c8d      .DB 144,9,173,32,145,10,176,3,76,22,240,173,155,2,141,156
+0013d6 ad02
+0013d7 029e
+0013d8 9d8d
+0013d9 2002
+0013da fe75
+0013db f8a5
+0013dc 05d0
+0013dd 8488      .DB 2,173,158,2,141,157,2,32,117,254,165,248,208,5,136,132
+0013de 86f8
+0013df a5f7
+0013e0 d0fa
+0013e1 8805
+0013e2 fa84
+0013e3 f986
+0013e4 a938
+0013e5 4cf0      .DB 248,134,247,165,250,208,5,136,132,250,134,249,56,169,240,76
+0013e6 fe7b
+0013e7 c386
+0013e8 c484
+0013e9 306c
+0013ea 8503
+0013eb a993
+0013ec 8500
+0013ed a590      .DB 123,254,134,195,132,196,108,48,3,133,147,169,0,133,144,165
+0013ee d0ba
+0013ef 4c03
+0013f0 f796
+0013f1 03c9
+0013f2 f9f0
+0013f3 6e90
+0013f4 b7a4
+0013f5 03d0      .DB 186,208,3,76,150,247,201,3,240,249,144,110,164,183,208,3
+0013f6 934c
+0013f7 20f7
+0013f8 e4bc
+0013f9 60a9
+0013fa b985
+0013fb 9520
+0013fc a5f4
+0013fd 20ba      .DB 76,147,247,32,188,228,169,96,133,185,32,149,244,165,186,32
+0013fe ee14
+0013ff b9a5
+001400 ce20
+001401 20ee
+001402 ef19
+001403 ae85
+001404 90a5
+001405 4a4a      .DB 20,238,165,185,32,206,238,32,25,239,133,174,165,144,74,74
+001406 45b0
+001407 1920
+001408 85ef
+001409 20af
+00140a e4c1
+00140b fda9
+00140c 9025
+00140d 9085      .DB 176,69,32,25,239,133,175,32,193,228,169,253,37,144,133,144
+00140e e120
+00140f d0ff
+001410 4c03
+001411 f6cb
+001412 1920
+001413 aaef
+001414 90a5
+001415 4a4a      .DB 32,225,255,208,3,76,203,246,32,25,239,170,165,144,74,74
+001416 e8b0
+001417 a48a
+001418 f093
+001419 a00c
+00141a d100
+00141b f0ae
+00141c a908
+00141d 2010      .DB 176,232,138,164,147,240,12,160,0,209,174,240,8,169,16,32
+00141e fe6a
+00141f 912c
+001420 e6ae
+001421 d0ae
+001422 e602
+001423 24af
+001424 5090
+001425 20cb      .DB 106,254,44,145,174,230,174,208,2,230,175,36,144,80,203,32
+001426 eef6
+001427 da20
+001428 90f6
+001429 4c7a
+00142a f787
+00142b 02c9
+00142c 03d0
+00142d b94c      .DB 246,238,32,218,246,144,122,76,135,247,201,2,208,3,76,185
+00142e 20f0
+00142f f84d
+001430 03b0
+001431 964c
+001432 20f7
+001433 f894
+001434 68b0
+001435 4720      .DB 240,32,77,248,176,3,76,150,247,32,148,248,176,104,32,71
+001436 a5f6
+001437 f0b7
+001438 2009
+001439 f867
+00143a 0b90
+00143b 5af0
+00143c d9b0
+00143d af20      .DB 246,165,183,240,9,32,103,248,144,11,240,90,176,217,32,175
+00143e f0f7
+00143f b053
+001440 a5d2
+001441 2990
+001442 3810
+001443 4ad0
+001444 01e0
+001445 11f0      .DB 247,240,83,176,210,165,144,41,16,56,208,74,224,1,240,17
+001446 03e0
+001447 ddd0
+001448 01a0
+001449 b2b1
+00144a c385
+00144b b1c8
+00144c 85b2
+00144d b0c4      .DB 224,3,208,221,160,1,177,178,133,195,200,177,178,133,196,176
+00144e a504
+00144f d0b9
+001450 a0ef
+001451 b103
+001452 a0b2
+001453 f101
+001454 aab2
+001455 04a0      .DB 4,165,185,208,239,160,3,177,178,160,1,241,178,170,160,4
+001456 b2b1
+001457 02a0
+001458 b2f1
+001459 18a8
+00145a 658a
+00145b 85c3
+00145c 98ae
+00145d c465      .DB 177,178,160,2,241,178,168,24,138,101,195,133,174,152,101,196
+00145e af85
+00145f c3a5
+001460 c185
+001461 c4a5
+001462 c285
+001463 6a20
+001464 20f6
+001465 f8c9      .DB 133,175,165,195,133,193,165,196,133,194,32,106,246,32,201,248
+001466 1824
+001467 aea6
+001468 afa4
+001469 a560
+00146a 109d
+00146b a01e
+00146c 200c
+00146d f1e6      .DB 36,24,166,174,164,175,96,165,157,16,30,160,12,32,230,241
+00146e b7a5
+00146f 15f0
+001470 17a0
+001471 e620
+001472 a4f1
+001473 f0b7
+001474 a00c
+001475 b100      .DB 165,183,240,21,160,23,32,230,241,164,183,240,12,160,0,177
+001476 20bb
+001477 ffd2
+001478 c4c8
+001479 d0b7
+00147a 60f6
+00147b 49a0
+00147c 93a5
+00147d 02f0      .DB 187,32,210,255,200,196,183,208,246,96,160,73,165,147,240,2
+00147e 59a0
+00147f e24c
+001480 86f1
+001481 84ae
+001482 aaaf
+001483 00b5
+001484 c185
+001485 01b5      .DB 160,89,76,226,241,134,174,132,175,170,181,0,133,193,181,1
+001486 c285
+001487 326c
+001488 a503
+001489 d0ba
+00148a 4c03
+00148b f796
+00148c 03c9
+00148d f9f0      .DB 133,194,108,50,3,165,186,208,3,76,150,247,201,3,240,249
+00148e 5f90
+00148f 61a9
+001490 b985
+001491 b7a4
+001492 03d0
+001493 934c
+001494 20f7
+001495 f495      .DB 144,95,169,97,133,185,164,183,208,3,76,147,247,32,149,244
+001496 2820
+001497 a5f7
+001498 20ba
+001499 ee17
+00149a b9a5
+00149b c020
+00149c a0ee
+00149d 2000      .DB 32,40,247,165,186,32,23,238,165,185,32,192,238,160,0,32
+00149e fbd2
+00149f aca5
+0014a0 e420
+0014a1 a5ee
+0014a2 20ad
+0014a3 eee4
+0014a4 1120
+0014a5 b0fd      .DB 210,251,165,172,32,228,238,165,173,32,228,238,32,17,253,176
+0014a6 b116
+0014a7 20ac
+0014a8 eee4
+0014a9 e120
+0014aa d0ff
+0014ab 2007
+0014ac f6da
+0014ad 00a9      .DB 22,177,172,32,228,238,32,225,255,208,7,32,218,246,169,0
+0014ae 6038
+0014af 1b20
+0014b0 d0fd
+0014b1 20e5
+0014b2 ef04
+0014b3 b924
+0014b4 1130
+0014b5 baa5      .DB 56,96,32,27,253,208,229,32,4,239,36,185,48,17,165,186
+0014b6 1720
+0014b7 a5ee
+0014b8 29b9
+0014b9 09ef
+0014ba 20e0
+0014bb eec0
+0014bc 0420
+0014bd 18ef      .DB 32,23,238,165,185,41,239,9,224,32,192,238,32,4,239,24
+0014be c960
+0014bf d002
+0014c0 4c03
+0014c1 f0b9
+0014c2 4d20
+0014c3 90f8
+0014c4 208c
+0014c5 f8b7      .DB 96,201,2,208,3,76,185,240,32,77,248,144,140,32,183,248
+0014c6 25b0
+0014c7 2820
+0014c8 a2f7
+0014c9 a503
+0014ca 29b9
+0014cb d001
+0014cc a202
+0014cd 8a01      .DB 176,37,32,40,247,162,3,165,185,41,1,208,2,162,1,138
+0014ce e720
+0014cf b0f7
+0014d0 2012
+0014d1 f8e6
+0014d2 0db0
+0014d3 b9a5
+0014d4 0229
+0014d5 06f0      .DB 32,231,247,176,18,32,230,248,176,13,165,185,41,2,240,6
+0014d6 05a9
+0014d7 e720
+0014d8 24f7
+0014d9 6018
+0014da 9da5
+0014db fb10
+0014dc 51a0
+0014dd e620      .DB 169,5,32,231,247,36,24,96,165,157,16,251,160,81,32,230
+0014de 4cf1
+0014df f659
+0014e0 00a2
+0014e1 a2e6
+0014e2 06d0
+0014e3 a1e6
+0014e4 02d0
+0014e5 a0e6      .DB 241,76,89,246,162,0,230,162,208,6,230,161,208,2,230,160
+0014e6 a538
+0014e7 e9a2
+0014e8 a501
+0014e9 e9a1
+0014ea a51a
+0014eb e9a0
+0014ec 904f
+0014ed 8606      .DB 56,165,162,233,1,165,161,233,26,165,160,233,79,144,6,134
+0014ee 86a0
+0014ef 86a1
+0014f0 ada2
+0014f1 912f
+0014f2 2fcd
+0014f3 d091
+0014f4 85f8
+0014f5 6091      .DB 160,134,161,134,162,173,47,145,205,47,145,208,248,133,145,96
+0014f6 a578
+0014f7 a6a2
+0014f8 a4a1
+0014f9 78a0
+0014fa a285
+0014fb a186
+0014fc a084
+0014fd 6058      .DB 120,165,162,166,161,164,160,120,133,162,134,161,132,160,88,96
+0014fe 91a5
+0014ff fec9
+001500 07d0
+001501 2008
+001502 ffcc
+001503 c685
+001504 6028
+001505 01a9      .DB 165,145,201,254,208,7,8,32,204,255,133,198,40,96,169,1
+001506 a92c
+001507 2c02
+001508 03a9
+001509 a92c
+00150a 2c04
+00150b 05a9
+00150c a92c
+00150d 2c06      .DB 44,169,2,44,169,3,44,169,4,44,169,5,44,169,6,44
+00150e 07a9
+00150f a92c
+001510 2c08
+001511 09a9
+001512 2048
+001513 ffcc
+001514 00a0
+001515 9d24      .DB 169,7,44,169,8,44,169,9,72,32,204,255,160,0,36,157
+001516 0a50
+001517 e620
+001518 68f1
+001519 0948
+00151a 2030
+00151b ffd2
+00151c 3868
+00151d a560      .DB 80,10,32,230,241,104,72,9,48,32,210,255,104,56,96,165
+00151e 4893
+00151f c020
+001520 68f8
+001521 9385
+001522 2cb0
+001523 00a0
+001524 b2b1
+001525 05c9      .DB 147,72,32,192,248,104,133,147,176,44,160,0,177,178,201,5
+001526 24f0
+001527 01c9
+001528 08f0
+001529 03c9
+00152a 04f0
+00152b 04c9
+00152c e1d0
+00152d 24aa      .DB 240,36,201,1,240,8,201,3,240,4,201,4,208,225,170,36
+00152e 109d
+00152f a011
+001530 2063
+001531 f1e6
+001532 05a0
+001533 b2b1
+001534 d220
+001535 c8ff      .DB 157,16,17,160,99,32,230,241,160,5,177,178,32,210,255,200
+001536 15c0
+001537 f6d0
+001538 8818
+001539 8560
+00153a 209e
+00153b f84d
+00153c 5e90
+00153d c2a5      .DB 192,21,208,246,24,136,96,133,158,32,77,248,144,94,165,194
+00153e a548
+00153f 48c1
+001540 afa5
+001541 a548
+001542 48ae
+001543 bfa0
+001544 20a9
+001545 b291      .DB 72,165,193,72,165,175,72,165,174,72,160,191,169,32,145,178
+001546 d088
+001547 a5fb
+001548 919e
+001549 c8b2
+00154a c1a5
+00154b b291
+00154c a5c8
+00154d 91c2      .DB 136,208,251,165,158,145,178,200,165,193,145,178,200,165,194,145
+00154e c8b2
+00154f aea5
+001550 b291
+001551 a5c8
+001552 91af
+001553 c8b2
+001554 9f84
+001555 00a0      .DB 178,200,165,174,145,178,200,165,175,145,178,200,132,159,160,0
+001556 9e84
+001557 9ea4
+001558 b7c4
+001559 0cf0
+00155a bbb1
+00155b 9fa4
+00155c b291
+00155d 9ee6      .DB 132,158,164,158,196,183,240,12,177,187,164,159,145,178,230,158
+00155e 9fe6
+00155f eed0
+001560 5420
+001561 a9f8
+001562 8569
+001563 20ab
+001564 f8ea
+001565 68a8      .DB 230,159,208,238,32,84,248,169,105,133,171,32,234,248,168,104
+001566 ae85
+001567 8568
+001568 68af
+001569 c185
+00156a 8568
+00156b 98c2
+00156c a660
+00156d a4b2      .DB 133,174,104,133,175,104,133,193,104,133,194,152,96,166,178,164
+00156e c0b3
+00156f 6002
+001570 4d20
+001571 8af8
+001572 c185
+001573 6918
+001574 85c0
+001575 98ae      .DB 179,192,2,96,32,77,248,138,133,193,24,105,192,133,174,152
+001576 c285
+001577 0069
+001578 af85
+001579 2060
+00157a f7af
+00157b 1db0
+00157c 05a0
+00157d 9f84      .DB 133,194,105,0,133,175,96,32,175,247,176,29,160,5,132,159
+00157e 00a0
+00157f 9e84
+001580 b7c4
+001581 10f0
+001582 bbb1
+001583 9fa4
+001584 b2d1
+001585 e7d0      .DB 160,0,132,158,196,183,240,16,177,187,164,159,209,178,208,231
+001586 9ee6
+001587 9fe6
+001588 9ea4
+001589 ecd0
+00158a 6018
+00158b 4d20
+00158c e6f8
+00158d a4a6      .DB 230,158,230,159,164,158,208,236,24,96,32,77,248,230,166,164
+00158e c0a6
+00158f 60c0
+001590 ab20
+001591 f0f8
+001592 a01c
+001593 201b
+001594 f1e6
+001595 4b20      .DB 166,192,192,96,32,171,248,240,28,160,27,32,230,241,32,75
+001596 20f9
+001597 f8ab
+001598 f8d0
+001599 6aa0
+00159a e64c
+00159b a9f1
+00159c 2c40
+00159d 911f      .DB 249,32,171,248,208,248,160,106,76,230,241,169,64,44,31,145
+00159e 03d0
+00159f 1f2c
+0015a0 1891
+0015a1 2060
+0015a2 f8ab
+0015a3 f9f0
+0015a4 2ea0
+0015a5 dbd0      .DB 208,3,44,31,145,24,96,32,171,248,240,249,160,46,208,219
+0015a6 00a9
+0015a7 9085
+0015a8 9385
+0015a9 5420
+0015aa 20f8
+0015ab f894
+0015ac 1fb0
+0015ad a978      .DB 169,0,133,144,133,147,32,84,248,32,148,248,176,31,120,169
+0015ae 8500
+0015af 85aa
+0015b0 85b4
+0015b1 85b0
+0015b2 859e
+0015b3 859f
+0015b4 a99c
+0015b5 a282      .DB 0,133,170,133,180,133,176,133,158,133,159,133,156,169,130,162
+0015b6 d00e
+0015b7 2011
+0015b8 f854
+0015b9 14a9
+0015ba ab85
+0015bb b720
+0015bc b0f8
+0015bd 7868      .DB 14,208,17,32,84,248,169,20,133,171,32,183,248,176,104,120
+0015be a0a9
+0015bf 08a2
+0015c0 7fa0
+0015c1 2e8c
+0015c2 8d91
+0015c3 912e
+0015c4 6020
+0015c5 adf1      .DB 169,160,162,8,160,127,140,46,145,141,46,145,32,96,241,173
+0015c6 0314
+0015c7 9f8d
+0015c8 ad02
+0015c9 0315
+0015ca a08d
+0015cb 2002
+0015cc fcfb
+0015cd 02a9      .DB 20,3,141,159,2,173,21,3,141,160,2,32,251,252,169,2
+0015ce be85
+0015cf db20
+0015d0 adfb
+0015d1 911c
+0015d2 fd29
+0015d3 0c09
+0015d4 1c8d
+0015d5 8591      .DB 133,190,32,219,251,173,28,145,41,253,9,12,141,28,145,133
+0015d6 a2c0
+0015d7 a0ff
+0015d8 88ff
+0015d9 fdd0
+0015da d0ca
+0015db 8df8
+0015dc 9129
+0015dd ad58      .DB 192,162,255,160,255,136,208,253,202,208,248,141,41,145,88,173
+0015de 02a0
+0015df 15cd
+0015e0 1803
+0015e1 1ff0
+0015e2 4b20
+0015e3 adf9
+0015e4 912d
+0015e5 4029      .DB 160,2,205,21,3,24,240,31,32,75,249,173,45,145,41,64
+0015e6 edf0
+0015e7 14ad
+0015e8 2091
+0015e9 f734
+0015ea 2f4c
+0015eb 20f9
+0015ec ffe1
+0015ed d018      .DB 240,237,173,20,145,32,52,247,76,47,249,32,225,255,24,208
+0015ee 200b
+0015ef fccf
+0015f0 6838
+0015f1 a968
+0015f2 8d00
+0015f3 02a0
+0015f4 8660
+0015f5 a5b1      .DB 11,32,207,252,56,104,104,169,0,141,160,2,96,134,177,165
+0015f6 0ab0
+0015f7 180a
+0015f8 b065
+0015f9 6518
+0015fa 85b1
+0015fb a9b1
+0015fc 2400
+0015fd 30b0      .DB 176,10,10,24,101,176,24,101,177,133,177,169,0,36,176,48
+0015fe 2a01
+0015ff b106
+001600 062a
+001601 2ab1
+001602 adaa
+001603 9128
+001604 15c9
+001605 f990      .DB 1,42,6,177,42,6,177,42,170,173,40,145,201,21,144,249
+001606 b165
+001607 248d
+001608 8a91
+001609 296d
+00160a 8d91
+00160b 9125
+00160c 6058
+00160d 29ae      .DB 101,177,141,36,145,138,109,41,145,141,37,145,88,96,174,41
+00160e a091
+00160f 98ff
+001610 28ed
+001611 ec91
+001612 9129
+001613 f2d0
+001614 b186
+001615 8caa      .DB 145,160,255,152,237,40,145,236,41,145,208,242,134,177,170,140
+001616 9128
+001617 298c
+001618 9891
+001619 b1e5
+00161a b186
+00161b 664a
+00161c 4ab1
+00161d b166      .DB 40,145,140,41,145,152,229,177,134,177,74,102,177,74,102,177
+00161e b0a5
+00161f 6918
+001620 2c3c
+001621 9121
+001622 b1c5
+001623 4ab0
+001624 9ca6
+001625 03f0      .DB 165,176,24,105,60,44,33,145,197,177,176,74,166,156,240,3
+001626 ad4c
+001627 a6fa
+001628 30a3
+001629 a21b
+00162a 6900
+00162b 6530
+00162c c5b0
+00162d b0b1      .DB 76,173,250,166,163,48,27,162,0,105,48,101,176,197,177,176
+00162e e81c
+00162f 2669
+001630 b065
+001631 b1c5
+001632 17b0
+001633 2c69
+001634 b065
+001635 b1c5      .DB 28,232,105,38,101,176,197,177,176,23,105,44,101,176,197,177
+001636 0390
+001637 604c
+001638 a5fa
+001639 f0b4
+00163a 851d
+00163b d0a8
+00163c e619
+00163d b0a9      .DB 144,3,76,96,250,165,180,240,29,133,168,208,25,230,169,176
+00163e c602
+00163f 38a9
+001640 13e9
+001641 b1e5
+001642 9265
+001643 9285
+001644 a4a5
+001645 0149      .DB 2,198,169,56,233,19,229,177,101,146,133,146,165,164,73,1
+001646 a485
+001647 21f0
+001648 d786
+001649 b4a5
+00164a 18f0
+00164b 2d2c
+00164c 5091
+00164d a913      .DB 133,164,240,33,134,215,165,180,240,24,44,45,145,80,19,169
+00164e 8500
+00164f a5a4
+001650 10a3
+001651 3030
+001652 a2c9
+001653 20a6
+001654 f95d
+001655 9ba5      .DB 0,133,164,165,163,16,48,48,201,162,166,32,93,249,165,155
+001656 c3d0
+001657 564c
+001658 a5ff
+001659 f092
+00165a 3007
+00165b c603
+00165c 2cb0
+00165d b0e6      .DB 208,195,76,86,255,165,146,240,7,48,3,198,176,44,230,176
+00165e 00a9
+00165f 9285
+001660 d7e4
+001661 0fd0
+001662 d08a
+001663 a5aa
+001664 30a9
+001665 c9c7      .DB 169,0,133,146,228,215,208,15,138,208,170,165,169,48,199,201
+001666 9010
+001667 85c3
+001668 b096
+001669 8abf
+00166a 9b45
+00166b 9b85
+00166c b4a5
+00166d d2f0      .DB 16,144,195,133,150,176,191,138,69,155,133,155,165,180,240,210
+00166e a3c6
+00166f c530
+001670 d746
+001671 bf66
+001672 daa2
+001673 5d20
+001674 4cf9
+001675 ff56      .DB 198,163,48,197,70,215,102,191,162,218,32,93,249,76,86,255
+001676 96a5
+001677 04f0
+001678 b4a5
+001679 04f0
+00167a a3a5
+00167b 8510
+00167c b146
+00167d 93a9      .DB 165,150,240,4,165,180,240,4,165,163,16,133,70,177,169,147
+00167e e538
+00167f 65b1
+001680 0ab0
+001681 20aa
+001682 f95d
+001683 9ce6
+001684 b4a5
+001685 11d0      .DB 56,229,177,101,176,10,170,32,93,249,230,156,165,180,208,17
+001686 96a5
+001687 26f0
+001688 a885
+001689 00a9
+00168a 9685
+00168b c0a9
+00168c 2e8d
+00168d 8591      .DB 165,150,240,38,133,168,169,0,133,150,169,192,141,46,145,133
+00168e a5b4
+00168f 8596
+001690 f0b5
+001691 a909
+001692 8500
+001693 a9b4
+001694 8d40
+001695 912e      .DB 180,165,150,133,181,240,9,169,0,133,180,169,64,141,46,145
+001696 bfa5
+001697 bd85
+001698 a8a5
+001699 a905
+00169a b685
+00169b 564c
+00169c 20ff
+00169d fbdb      .DB 165,191,133,189,165,168,5,169,133,182,76,86,255,32,219,251
+00169e 9c85
+00169f daa2
+0016a0 5d20
+0016a1 a5f9
+0016a2 f0be
+0016a3 8502
+0016a4 a9a7
+0016a5 240f      .DB 133,156,162,218,32,93,249,165,190,240,2,133,167,169,15,36
+0016a6 10aa
+0016a7 a517
+0016a8 d0b5
+0016a9 a60c
+0016aa cabe
+0016ab 0bd0
+0016ac 08a9
+0016ad 6a20      .DB 170,16,23,165,181,208,12,166,190,202,208,11,169,8,32,106
+0016ae d0fe
+0016af a904
+0016b0 8500
+0016b1 4caa
+0016b2 ff56
+0016b3 3170
+0016b4 18d0
+0016b5 b5a5      .DB 254,208,4,169,0,133,170,76,86,255,112,49,208,24,165,181
+0016b6 f5d0
+0016b7 b6a5
+0016b8 f1d0
+0016b9 a7a5
+0016ba a54a
+0016bb 30bd
+0016bc 9003
+0016bd 1818      .DB 208,245,165,182,208,241,165,167,74,165,189,48,3,144,24,24
+0016be 15b0
+0016bf 0f29
+0016c0 aa85
+0016c1 aac6
+0016c2 ddd0
+0016c3 40a9
+0016c4 aa85
+0016c5 d220      .DB 176,21,41,15,133,170,198,170,208,221,169,64,133,170,32,210
+0016c6 a9fb
+0016c7 8500
+0016c8 f0ab
+0016c9 a9d0
+0016ca 8580
+0016cb d0aa
+0016cc a5ca
+0016cd f0b5      .DB 251,169,0,133,171,240,208,169,128,133,170,208,202,165,181,240
+0016ce a90a
+0016cf 2004
+0016d0 fe6a
+0016d1 00a9
+0016d2 974c
+0016d3 20fb
+0016d4 fd11
+0016d5 0390      .DB 10,169,4,32,106,254,169,0,76,151,251,32,17,253,144,3
+0016d6 954c
+0016d7 a6fb
+0016d8 caa7
+0016d9 2df0
+0016da 93a5
+0016db 0cf0
+0016dc 00a0
+0016dd bda5      .DB 76,149,251,166,167,202,240,45,165,147,240,12,160,0,165,189
+0016de acd1
+0016df 04f0
+0016e0 01a9
+0016e1 b685
+0016e2 b6a5
+0016e3 4bf0
+0016e4 3da2
+0016e5 9ee4      .DB 209,172,240,4,169,1,133,182,165,182,240,75,162,61,228,158
+0016e6 3e90
+0016e7 9ea6
+0016e8 ada5
+0016e9 019d
+0016ea a501
+0016eb 9dac
+0016ec 0100
+0016ed e8e8      .DB 144,62,166,158,165,173,157,1,1,165,172,157,0,1,232,232
+0016ee 9e86
+0016ef 874c
+0016f0 a6fb
+0016f1 e49f
+0016f2 f09e
+0016f3 a535
+0016f4 ddac
+0016f5 0100      .DB 134,158,76,135,251,166,159,228,158,240,53,165,172,221,0,1
+0016f6 2ed0
+0016f7 ada5
+0016f8 01dd
+0016f9 d001
+0016fa e627
+0016fb e69f
+0016fc a59f
+0016fd f093      .DB 208,46,165,173,221,1,1,208,39,230,159,230,159,165,147,240
+0016fe a50b
+0016ff a0bd
+001700 d100
+001701 f0ac
+001702 c817
+001703 b684
+001704 b6a5
+001705 07f0      .DB 11,165,189,160,0,209,172,240,23,200,132,182,165,182,240,7
+001706 10a9
+001707 6a20
+001708 d0fe
+001709 a509
+00170a d093
+00170b a805
+00170c bda5
+00170d ac91      .DB 169,16,32,106,254,208,9,165,147,208,5,168,165,189,145,172
+00170e 1b20
+00170f d0fd
+001710 a93a
+001711 8580
+001712 a6aa
+001713 cabe
+001714 0230
+001715 be86      .DB 32,27,253,208,58,169,128,133,170,166,190,202,48,2,134,190
+001716 a7c6
+001717 08f0
+001718 9ea5
+001719 27d0
+00171a be85
+00171b 23f0
+00171c cf20
+00171d 20fc      .DB 198,167,240,8,165,158,208,39,133,190,240,35,32,207,252,32
+00171e fbd2
+00171f 00a0
+001720 ab84
+001721 acb1
+001722 ab45
+001723 ab85
+001724 1b20
+001725 20fd      .DB 210,251,160,0,132,171,177,172,69,171,133,171,32,27,253,32
+001726 fd11
+001727 f290
+001728 aba5
+001729 bd45
+00172a 05f0
+00172b 20a9
+00172c 6a20
+00172d 4cfe      .DB 17,253,144,242,165,171,69,189,240,5,169,32,32,106,254,76
+00172e ff56
+00172f c2a5
+001730 ad85
+001731 c1a5
+001732 ac85
+001733 a960
+001734 8508
+001735 a9a3      .DB 86,255,165,194,133,173,165,193,133,172,96,169,8,133,163,169
+001736 8500
+001737 85a4
+001738 85a8
+001739 859b
+00173a 60a9
+00173b bda5
+00173c a94a
+00173d 9060      .DB 0,133,164,133,168,133,155,133,169,96,165,189,74,169,96,144
+00173e a902
+00173f a2b0
+001740 8d00
+001741 9128
+001742 298e
+001743 ad91
+001744 9120
+001745 0849      .DB 2,169,176,162,0,141,40,145,142,41,145,173,32,145,73,8
+001746 208d
+001747 2991
+001748 6008
+001749 6638
+00174a 30ad
+00174b a53c
+00174c d0a8
+00174d a912      .DB 141,32,145,41,8,96,56,102,173,48,60,165,168,208,18,169
+00174e a210
+00174f 2001
+001750 fbf5
+001751 2fd0
+001752 a8e6
+001753 ada5
+001754 2910
+001755 954c      .DB 16,162,1,32,245,251,208,47,230,168,165,173,16,41,76,149
+001756 a5fc
+001757 d0a9
+001758 2009
+001759 fbf1
+00175a 1dd0
+00175b a9e6
+00175c 19d0
+00175d ea20      .DB 252,165,169,208,9,32,241,251,208,29,230,169,208,25,32,234
+00175e d0fb
+00175f a514
+001760 49a4
+001761 8501
+001762 f0a4
+001763 a50f
+001764 49bd
+001765 8501      .DB 251,208,20,165,164,73,1,133,164,240,15,165,189,73,1,133
+001766 29bd
+001767 4501
+001768 859b
+001769 4c9b
+00176a ff56
+00176b bd46
+00176c a3c6
+00176d a3a5      .DB 189,41,1,69,155,133,155,76,86,255,70,189,198,163,165,163
+00176e 3af0
+00176f f310
+001770 db20
+001771 58fb
+001772 a5a5
+001773 12f0
+001774 00a2
+001775 d786      .DB 240,58,16,243,32,219,251,88,165,165,240,18,162,0,134,215
+001776 a5c6
+001777 bea6
+001778 02e0
+001779 02d0
+00177a 8009
+00177b bd85
+00177c d9d0
+00177d 1120      .DB 198,165,166,190,224,2,208,2,9,128,133,189,208,217,32,17
+00177e 90fd
+00177f d00a
+001780 e691
+001781 a5ad
+001782 85d7
+001783 b0bd
+001784 a0ca
+001785 b100      .DB 253,144,10,208,145,230,173,165,215,133,189,176,202,160,0,177
+001786 85ac
+001787 45bd
+001788 85d7
+001789 20d7
+00178a fd1b
+00178b bbd0
+00178c 9ba5
+00178d 0149      .DB 172,133,189,69,215,133,215,32,27,253,208,187,165,155,73,1
+00178e bd85
+00178f 564c
+001790 c6ff
+001791 d0be
+001792 2003
+001793 fd08
+001794 50a9
+001795 a785      .DB 133,189,76,86,255,198,190,208,3,32,8,253,169,80,133,167
+001796 08a2
+001797 2078
+001798 fcfb
+001799 ead0
+00179a 78a9
+00179b f320
+00179c d0fb
+00179d c6e3      .DB 162,8,120,32,251,252,208,234,169,120,32,243,251,208,227,198
+00179e d0a7
+00179f 20df
+0017a0 fbdb
+0017a1 abc6
+0017a2 d810
+0017a3 0aa2
+0017a4 fb20
+0017a5 58fc      .DB 167,208,223,32,219,251,198,171,16,216,162,10,32,251,252,88
+0017a6 abe6
+0017a7 bea5
+0017a8 30f0
+0017a9 d220
+0017aa a2fb
+0017ab 8609
+0017ac d0a5
+0017ad 0885      .DB 230,171,165,190,240,48,32,210,251,162,9,134,165,208,133,8
+0017ae 2078
+0017af fd08
+0017b0 7fa9
+0017b1 2e8d
+0017b2 a991
+0017b3 8df7
+0017b4 9120
+0017b5 40a9      .DB 120,32,8,253,169,127,141,46,145,169,247,141,32,145,169,64
+0017b6 2b8d
+0017b7 2091
+0017b8 fe39
+0017b9 a0ad
+0017ba f002
+0017bb 8d09
+0017bc 0315
+0017bd 9fad      .DB 141,43,145,32,57,254,173,160,2,240,9,141,21,3,173,159
+0017be 8d02
+0017bf 0314
+0017c0 6028
+0017c1 cf20
+0017c2 f0fc
+0017c3 bd97
+0017c4 fde9
+0017c5 148d      .DB 2,141,20,3,40,96,32,207,252,240,151,189,233,253,141,20
+0017c6 bd03
+0017c7 fdea
+0017c8 158d
+0017c9 6003
+0017ca 1cad
+0017cb 0991
+0017cc 8d0e
+0017cd 911c      .DB 3,189,234,253,141,21,3,96,173,28,145,9,14,141,28,145
+0017ce 3860
+0017cf aca5
+0017d0 aee5
+0017d1 ada5
+0017d2 afe5
+0017d3 e660
+0017d4 d0ac
+0017d5 e602      .DB 96,56,165,172,229,174,165,173,229,175,96,230,172,208,2,230
+0017d6 60ad
+0017d7 ffa2
+0017d8 9a78
+0017d9 20d8
+0017da fd3f
+0017db 03d0
+0017dc 006c
+0017dd 20a0      .DB 173,96,162,255,120,154,216,32,63,253,208,3,108,0,160,32
+0017de fd8d
+0017df 5220
+0017e0 20fd
+0017e1 fdf9
+0017e2 1820
+0017e3 58e5
+0017e4 006c
+0017e5 a2c0      .DB 141,253,32,82,253,32,249,253,32,24,229,88,108,0,192,162
+0017e6 bd05
+0017e7 fd4c
+0017e8 03dd
+0017e9 d0a0
+0017ea ca03
+0017eb f5d0
+0017ec 4160
+0017ed c330      .DB 5,189,76,253,221,3,160,208,3,202,208,245,96,65,48,195
+0017ee cdc2
+0017ef 6da2
+0017f0 fda0
+0017f1 8618
+0017f2 84c3
+0017f3 a0c4
+0017f4 b91f
+0017f5 0314      .DB 194,205,162,109,160,253,24,134,195,132,196,160,31,185,20,3
+0017f6 02b0
+0017f7 c3b1
+0017f8 c391
+0017f9 1499
+0017fa 8803
+0017fb f110
+0017fc bf60
+0017fd d2ea      .DB 176,2,177,195,145,195,153,20,3,136,16,241,96,191,234,210
+0017fe adfe
+0017ff 0afe
+001800 4af4
+001801 c7f3
+001802 09f2
+001803 f3f3
+001804 0ef3
+001805 7af2      .DB 254,173,254,10,244,74,243,199,242,9,243,243,243,14,242,122
+001806 70f2
+001807 f5f7
+001808 eff1
+001809 d2f3
+00180a 49fe
+00180b 85f5
+00180c a9f6
+00180d aa00      .DB 242,112,247,245,241,239,243,210,254,73,245,133,246,169,0,170
+00180e 0095
+00180f 009d
+001810 9d02
+001811 0300
+001812 d0e8
+001813 a2f5
+001814 a03c
+001815 8603      .DB 149,0,157,0,2,157,0,3,232,208,245,162,60,160,3,134
+001816 84b2
+001817 85b3
+001818 85c1
+001819 8d97
+00181a 0281
+00181b a9a8
+00181c 8504
+00181d e6c2      .DB 178,132,179,133,193,133,151,141,129,2,168,169,4,133,194,230
+00181e d0c1
+00181f e602
+001820 20c2
+001821 fe91
+001822 97a5
+001823 22f0
+001824 f1b0
+001825 c2a4      .DB 193,208,2,230,194,32,145,254,165,151,240,34,176,241,164,194
+001826 c1a6
+001827 20c0
+001828 2590
+001829 21c0
+00182a 08b0
+00182b 1ea0
+00182c 888c
+00182d 4c02      .DB 166,193,192,32,144,37,192,33,176,8,160,30,140,136,2,76
+00182e fe7b
+00182f 12a9
+001830 828d
+001831 a902
+001832 8d10
+001833 0288
+001834 f1d0
+001835 cf90      .DB 123,254,169,18,141,130,2,169,16,141,136,2,208,241,144,207
+001836 c2a5
+001837 828d
+001838 8502
+001839 c997
+00183a 9011
+00183b 20c4
+00183c e5c3
+00183d eb4c      .DB 165,194,141,130,2,133,151,201,17,144,196,32,195,229,76,235
+00183e a8fd
+00183f 0bfc
+001840 bffc
+001841 8eea
+001842 a9f9
+001843 8d7f
+001844 911e
+001845 2e8d      .DB 253,168,252,11,252,191,234,142,249,169,127,141,30,145,141,46
+001846 a991
+001847 8d40
+001848 912b
+001849 40a9
+00184a 1b8d
+00184b a991
+00184c 8dfe
+00184d 911c      .DB 145,169,64,141,43,145,169,64,141,27,145,169,254,141,28,145
+00184e dea9
+00184f 2c8d
+001850 a291
+001851 8e00
+001852 9112
+001853 ffa2
+001854 228e
+001855 a291      .DB 169,222,141,44,145,162,0,142,18,145,162,255,142,34,145,162
+001856 8e00
+001857 9123
+001858 80a2
+001859 138e
+00185a a291
+00185b 8e00
+00185c 911f
+00185d 8420      .DB 0,142,35,145,162,128,142,19,145,162,0,142,31,145,32,132
+00185e a9ef
+00185f 8d82
+001860 911e
+001861 8d20
+001862 a9ef
+001863 8dc0
+001864 912e
+001865 89a9      .DB 239,169,130,141,30,145,32,141,239,169,192,141,46,145,169,137
+001866 248d
+001867 a991
+001868 8d42
+001869 9125
+00186a 8560
+00186b 86b7
+00186c 84bb
+00186d 60bc      .DB 141,36,145,169,66,141,37,145,96,133,183,134,187,132,188,96
+00186e b885
+00186f ba86
+001870 b984
+001871 a560
+001872 c9ba
+001873 d002
+001874 ad0b
+001875 0297      .DB 133,184,134,186,132,185,96,165,186,201,2,208,11,173,151,2
+001876 00a9
+001877 978d
+001878 6002
+001879 9d85
+00187a 90a5
+00187b 9005
+00187c 9085
+00187d 8d60      .DB 169,0,141,151,2,96,133,157,165,144,5,144,133,144,96,141
+00187e 0285
+00187f 9060
+001880 ae06
+001881 0283
+001882 84ac
+001883 8e02
+001884 0283
+001885 848c      .DB 133,2,96,144,6,174,131,2,172,132,2,142,131,2,140,132
+001886 6002
+001887 0690
+001888 81ae
+001889 ac02
+00188a 0282
+00188b 818e
+00188c 8c02
+00188d 0282      .DB 2,96,144,6,174,129,2,172,130,2,142,129,2,140,130,2
+00188e b160
+00188f aac1
+001890 55a9
+001891 c191
+001892 c1d1
+001893 08d0
+001894 916a
+001895 d1c1      .DB 96,177,193,170,169,85,145,193,209,193,208,8,106,145,193,209
+001896 d0c1
+001897 a901
+001898 8a18
+001899 c191
+00189a 7860
+00189b 186c
+00189c 4803
+00189d 488a      .DB 193,208,1,169,24,138,145,193,96,120,108,24,3,72,138,72
+00189e 4898
+00189f 1dad
+0018a0 1091
+0018a1 2d48
+0018a2 911e
+0018a3 29aa
+0018a4 f002
+0018a5 201f      .DB 152,72,173,29,145,16,72,45,30,145,170,41,2,240,31,32
+0018a6 fd3f
+0018a7 03d0
+0018a8 026c
+0018a9 2ca0
+0018aa 9111
+0018ab 3420
+0018ac 20f7
+0018ad ffe1      .DB 63,253,208,3,108,2,160,44,17,145,32,52,247,32,225,255
+0018ae 2dd0
+0018af 5220
+0018b0 20fd
+0018b1 fdf9
+0018b2 1820
+0018b3 6ce5
+0018b4 c002
+0018b5 1ead      .DB 208,45,32,82,253,32,249,253,32,24,229,108,2,192,173,30
+0018b6 0991
+0018b7 4880
+0018b8 7fa9
+0018b9 1e8d
+0018ba 8a91
+0018bb 4029
+0018bc 14f0
+0018bd cea9      .DB 145,9,128,72,169,127,141,30,145,138,41,64,240,20,169,206
+0018be b505
+0018bf 1c8d
+0018c0 ad91
+0018c1 9114
+0018c2 8d68
+0018c3 911e
+0018c4 a320
+0018c5 4cef      .DB 5,181,141,28,145,173,20,145,104,141,30,145,32,163,239,76
+0018c6 ff56
+0018c7 298a
+0018c8 f020
+0018c9 ad25
+0018ca 9110
+0018cb 0129
+0018cc a785
+0018cd 18ad      .DB 86,255,138,41,32,240,37,173,16,145,41,1,133,167,173,24
+0018ce e991
+0018cf 6d16
+0018d0 0299
+0018d1 188d
+0018d2 ad91
+0018d3 9119
+0018d4 9a6d
+0018d5 8d02      .DB 145,233,22,109,153,2,141,24,145,173,25,145,109,154,2,141
+0018d6 9119
+0018d7 8d68
+0018d8 911e
+0018d9 3620
+0018da 4cf0
+0018db ff56
+0018dc 298a
+0018dd f010      .DB 25,145,104,141,30,145,32,54,240,76,86,255,138,41,16,240
+0018de ad25
+0018df 0293
+0018e0 0f29
+0018e1 00d0
+0018e2 aa0a
+0018e3 5abd
+0018e4 8dff
+0018e5 9118      .DB 37,173,147,2,41,15,208,0,10,170,189,90,255,141,24,145
+0018e6 5bbd
+0018e7 8dff
+0018e8 9119
+0018e9 10ad
+0018ea 6891
+0018eb 2009
+0018ec ef29
+0018ed 1e8d      .DB 189,91,255,141,25,145,173,16,145,104,9,32,41,239,141,30
+0018ee ae91
+0018ef 0298
+0018f0 a886
+0018f1 a868
+0018f2 aa68
+0018f3 4068
+0018f4 2792
+0018f5 1a40      .DB 145,174,152,2,134,168,104,168,104,170,104,64,146,39,64,26
+0018f6 11c6
+0018f7 0e74
+0018f8 0cee
+0018f9 0645
+0018fa 02f1
+0018fb 0146
+0018fc 00b8
+0018fd 0071      .DB 198,17,116,14,238,12,69,6,241,2,70,1,184,0,113,0
+0018fe 002a
+0018ff 8a48
+001900 9848
+001901 ba48
+001902 04bd
+001903 2901
+001904 f010
+001905 6c03      .DB 42,0,72,138,72,152,72,186,189,4,1,41,16,240,3,108
+001906 0316
+001907 146c
+001908 ff03
+001909 ffff
+00190a ffff
+00190b 524c
+00190c 4cfd
+00190d fd57      .DB 22,3,108,20,3,255,255,255,255,255,76,82,253,76,87,253
+00190e 664c
+00190f 4cfe
+001910 eec0
+001911 ce4c
+001912 4cee
+001913 fe73
+001914 824c
+001915 4cfe      .DB 76,102,254,76,192,238,76,206,238,76,115,254,76,130,254,76
+001916 eb1e
+001917 6f4c
+001918 4cfe
+001919 ef19
+00191a e44c
+00191b 4cee
+00191c eef6
+00191d 044c      .DB 30,235,76,111,254,76,25,239,76,228,238,76,246,238,76,4
+00191e 4cef
+00191f ee17
+001920 144c
+001921 4cee
+001922 fe57
+001923 504c
+001924 4cfe
+001925 fe49      .DB 239,76,23,238,76,20,238,76,87,254,76,80,254,76,73,254
+001926 1a6c
+001927 6c03
+001928 031c
+001929 1e6c
+00192a 6c03
+00192b 0320
+00192c 226c
+00192d 6c03      .DB 108,26,3,108,28,3,108,30,3,108,32,3,108,34,3,108
+00192e 0324
+00192f 266c
+001930 4c03
+001931 f542
+001932 754c
+001933 4cf6
+001934 f767
+001935 604c      .DB 36,3,108,38,3,76,66,245,76,117,246,76,103,247,76,96
+001936 6cf7
+001937 0328
+001938 2a6c
+001939 6c03
+00193a 032c
+00193b 344c
+00193c 4cf7
+00193d e505      .DB 247,108,40,3,108,42,3,108,44,3,76,52,247,76,5,229
+00193e 0a4c
+00193f 4ce5
+001940 e500
+001941 ffff
+001942 ffff
+001943 fea9
+001944 fd22
+001945 ff72      .DB 76,10,229,76,0,229,255,255,255,255,169,254,34,253,114,255
+                 basic_rom:
+                 .include "basic.asm"
+001946 e378
+001947 e467
+001948 4243
+001949 424d
+00194a 5341
+00194b 4349
+00194c c830
+00194d c741      
+00194e cd1d
+00194f c8f7
+001950 cba4
+001951 cbbe
+001952 d080
+001953 cc05
+001954 c9a4
+001955 c89f      .DB 29,205,247,200,164,203,190,203,128,208,5,204,164,201,159,200
+001956 c870
+001957 c927
+001958 c81c
+001959 c882
+00195a c8d1
+00195b c93a
+00195c c82e
+00195d c94a      .DB 112,200,39,201,28,200,130,200,209,200,58,201,46,200,74,201
+00195e d82c
+00195f e164
+001960 e152
+001961 e161
+001962 d3b2
+001963 d823
+001964 ca7f
+001965 ca9f      .DB 44,216,100,225,82,225,97,225,178,211,35,216,127,202,159,202
+001966 c856
+001967 c69b
+001968 c65d
+001969 ca85
+00196a e126
+00196b e1ba
+00196c e1c3
+00196d cb7a      .DB 86,200,155,198,93,198,133,202,38,225,186,225,195,225,122,203
+00196e c641
+00196f dc39
+001970 dccc
+001971 dc58
+001972 0000
+001973 d37d
+001974 d39e
+001975 df71      .DB 65,198,57,220,204,220,88,220,0,0,125,211,158,211,113,223
+001976 e094
+001977 d9ea
+001978 dfed
+001979 e261
+00197a e268
+00197b e2b1
+00197c e30b
+00197d d80d      .DB 148,224,234,217,237,223,97,226,104,226,177,226,11,227,13,216
+00197e d77c
+00197f d465
+001980 d7ad
+001981 d78b
+001982 d6ec
+001983 d700
+001984 d72c
+001985 d737      .DB 124,215,101,212,173,215,139,215,236,214,0,215,44,215,55,215
+001986 6979
+001987 79d8
+001988 d852
+001989 2a7b
+00198a 7bda
+00198b db11
+00198c 7a7f
+00198d 50df      .DB 121,105,216,121,82,216,123,42,218,123,17,219,127,122,223,80
+00198e cfe8
+00198f e546
+001990 7dcf
+001991 dfb3
+001992 d35a
+001993 64ce
+001994 d015
+001995 4e45      .DB 232,207,70,229,207,125,179,223,90,211,206,100,21,208,69,78
+001996 46c4
+001997 d24f
+001998 454e
+001999 d458
+00199a 4144
+00199b c154
+00199c 4e49
+00199d 5550      .DB 196,70,79,210,78,69,88,212,68,65,84,193,73,78,80,85
+00199e a354
+00199f 4e49
+0019a0 5550
+0019a1 44d4
+0019a2 cd49
+0019a3 4552
+0019a4 c441
+0019a5 454c      .DB 84,163,73,78,80,85,212,68,73,205,82,69,65,196,76,69
+0019a6 47d4
+0019a7 544f
+0019a8 52cf
+0019a9 ce55
+0019aa c649
+0019ab 4552
+0019ac 5453
+0019ad 524f      .DB 212,71,79,84,207,82,85,206,73,198,82,69,83,84,79,82
+0019ae 47c5
+0019af 534f
+0019b0 c255
+0019b1 4552
+0019b2 5554
+0019b3 ce52
+0019b4 4552
+0019b5 53cd      .DB 197,71,79,83,85,194,82,69,84,85,82,206,82,69,205,83
+0019b6 4f54
+0019b7 4fd0
+0019b8 57ce
+0019b9 4941
+0019ba 4cd4
+0019bb 414f
+0019bc 53c4
+0019bd 5641      .DB 84,79,208,79,206,87,65,73,212,76,79,65,196,83,65,86
+0019be 56c5
+0019bf 5245
+0019c0 4649
+0019c1 44d9
+0019c2 c645
+0019c3 4f50
+0019c4 c54b
+0019c5 5250      .DB 197,86,69,82,73,70,217,68,69,198,80,79,75,197,80,82
+0019c6 4e49
+0019c7 a354
+0019c8 5250
+0019c9 4e49
+0019ca 43d4
+0019cb 4e4f
+0019cc 4cd4
+0019cd 5349      .DB 73,78,84,163,80,82,73,78,212,67,79,78,212,76,73,83
+0019ce 43d4
+0019cf d24c
+0019d0 4d43
+0019d1 53c4
+0019d2 d359
+0019d3 504f
+0019d4 ce45
+0019d5 4c43      .DB 212,67,76,210,67,77,196,83,89,211,79,80,69,206,67,76
+0019d6 534f
+0019d7 47c5
+0019d8 d445
+0019d9 454e
+0019da 54d7
+0019db 4241
+0019dc 54a8
+0019dd 46cf      .DB 79,83,197,71,69,212,78,69,215,84,65,66,168,84,207,70
+0019de 53ce
+0019df 4350
+0019e0 54a8
+0019e1 4548
+0019e2 4ece
+0019e3 d44f
+0019e4 5453
+0019e5 d045      .DB 206,83,80,67,168,84,72,69,206,78,79,212,83,84,69,208
+0019e6 adab
+0019e7 afaa
+0019e8 41de
+0019e9 c44e
+0019ea d24f
+0019eb bdbe
+0019ec 53bc
+0019ed ce47      .DB 171,173,170,175,222,65,78,196,79,210,190,189,188,83,71,206
+0019ee 4e49
+0019ef 41d4
+0019f0 d342
+0019f1 5355
+0019f2 46d2
+0019f3 c552
+0019f4 4f50
+0019f5 53d3      .DB 73,78,212,65,66,211,85,83,210,70,82,197,80,79,211,83
+0019f6 d251
+0019f7 4e52
+0019f8 4cc4
+0019f9 c74f
+0019fa 5845
+0019fb 43d0
+0019fc d34f
+0019fd 4953      .DB 81,210,82,78,196,76,79,199,69,88,208,67,79,211,83,73
+0019fe 54ce
+0019ff ce41
+001a00 5441
+001a01 50ce
+001a02 4545
+001a03 4ccb
+001a04 ce45
+001a05 5453      .DB 206,84,65,206,65,84,206,80,69,69,203,76,69,206,83,84
+001a06 a452
+001a07 4156
+001a08 41cc
+001a09 c353
+001a0a 4843
+001a0b a452
+001a0c 454c
+001a0d 5446      .DB 82,164,86,65,204,65,83,195,67,72,82,164,76,69,70,84
+001a0e 52a4
+001a0f 4749
+001a10 5448
+001a11 4da4
+001a12 4449
+001a13 47a4
+001a14 00cf
+001a15 4f54      .DB 164,82,73,71,72,84,164,77,73,68,164,71,207,0,84,79
+001a16 204f
+001a17 414d
+001a18 594e
+001a19 4620
+001a1a 4c49
+001a1b d345
+001a1c 4946
+001a1d 454c      .DB 79,32,77,65,78,89,32,70,73,76,69,211,70,73,76,69
+001a1e 4f20
+001a1f 4550
+001a20 46ce
+001a21 4c49
+001a22 2045
+001a23 4f4e
+001a24 2054
+001a25 504f      .DB 32,79,80,69,206,70,73,76,69,32,78,79,84,32,79,80
+001a26 ce45
+001a27 4946
+001a28 454c
+001a29 4e20
+001a2a 544f
+001a2b 4620
+001a2c 554f
+001a2d c44e      .DB 69,206,70,73,76,69,32,78,79,84,32,70,79,85,78,196
+001a2e 4544
+001a2f 4956
+001a30 4543
+001a31 4e20
+001a32 544f
+001a33 5020
+001a34 4552
+001a35 4553      .DB 68,69,86,73,67,69,32,78,79,84,32,80,82,69,83,69
+001a36 d44e
+001a37 4f4e
+001a38 2054
+001a39 4e49
+001a3a 5550
+001a3b 2054
+001a3c 4946
+001a3d c54c      .DB 78,212,78,79,84,32,73,78,80,85,84,32,70,73,76,197
+001a3e 4f4e
+001a3f 2054
+001a40 554f
+001a41 5054
+001a42 5455
+001a43 4620
+001a44 4c49
+001a45 4dc5      .DB 78,79,84,32,79,85,84,80,85,84,32,70,73,76,197,77
+001a46 5349
+001a47 4953
+001a48 474e
+001a49 4620
+001a4a 4c49
+001a4b 2045
+001a4c 414e
+001a4d c54d      .DB 73,83,83,73,78,71,32,70,73,76,69,32,78,65,77,197
+001a4e 4c49
+001a4f 454c
+001a50 4147
+001a51 204c
+001a52 4544
+001a53 4956
+001a54 4543
+001a55 4e20      .DB 73,76,76,69,71,65,76,32,68,69,86,73,67,69,32,78
+001a56 4d55
+001a57 4542
+001a58 4ed2
+001a59 5845
+001a5a 2054
+001a5b 4957
+001a5c 4854
+001a5d 554f      .DB 85,77,66,69,210,78,69,88,84,32,87,73,84,72,79,85
+001a5e 2054
+001a5f 4f46
+001a60 53d2
+001a61 4e59
+001a62 4154
+001a63 52d8
+001a64 5445
+001a65 5255      .DB 84,32,70,79,210,83,89,78,84,65,216,82,69,84,85,82
+001a66 204e
+001a67 4957
+001a68 4854
+001a69 554f
+001a6a 2054
+001a6b 4f47
+001a6c 5553
+001a6d 4fc2      .DB 78,32,87,73,84,72,79,85,84,32,71,79,83,85,194,79
+001a6e 5455
+001a6f 4f20
+001a70 2046
+001a71 4144
+001a72 c154
+001a73 4c49
+001a74 454c
+001a75 4147      .DB 85,84,32,79,70,32,68,65,84,193,73,76,76,69,71,65
+001a76 204c
+001a77 5551
+001a78 4e41
+001a79 4954
+001a7a d954
+001a7b 564f
+001a7c 5245
+001a7d 4c46      .DB 76,32,81,85,65,78,84,73,84,217,79,86,69,82,70,76
+001a7e d74f
+001a7f 554f
+001a80 2054
+001a81 464f
+001a82 4d20
+001a83 4d45
+001a84 524f
+001a85 55d9      .DB 79,215,79,85,84,32,79,70,32,77,69,77,79,82,217,85
+001a86 444e
+001a87 4645
+001a88 4427
+001a89 5320
+001a8a 4154
+001a8b 4554
+001a8c 454d
+001a8d d44e      .DB 78,68,69,70,39,68,32,83,84,65,84,69,77,69,78,212
+001a8e 4142
+001a8f 2044
+001a90 5553
+001a91 5342
+001a92 5243
+001a93 5049
+001a94 52d4
+001a95 4445      .DB 66,65,68,32,83,85,66,83,67,82,73,80,212,82,69,68
+001a96 4d49
+001a97 4427
+001a98 4120
+001a99 5252
+001a9a d941
+001a9b 4944
+001a9c 4956
+001a9d 4953      .DB 73,77,39,68,32,65,82,82,65,217,68,73,86,73,83,73
+001a9e 4e4f
+001a9f 4220
+001aa0 2059
+001aa1 455a
+001aa2 cf52
+001aa3 4c49
+001aa4 454c
+001aa5 4147      .DB 79,78,32,66,89,32,90,69,82,207,73,76,76,69,71,65
+001aa6 204c
+001aa7 4944
+001aa8 4552
+001aa9 d443
+001aaa 5954
+001aab 4550
+001aac 4d20
+001aad 5349      .DB 76,32,68,73,82,69,67,212,84,89,80,69,32,77,73,83
+001aae 414d
+001aaf 4354
+001ab0 53c8
+001ab1 5254
+001ab2 4e49
+001ab3 2047
+001ab4 4f54
+001ab5 204f      .DB 77,65,84,67,200,83,84,82,73,78,71,32,84,79,79,32
+001ab6 4f4c
+001ab7 c74e
+001ab8 4946
+001ab9 454c
+001aba 4420
+001abb 5441
+001abc 46c1
+001abd 524f      .DB 76,79,78,199,70,73,76,69,32,68,65,84,193,70,79,82
+001abe 554d
+001abf 414c
+001ac0 5420
+001ac1 4f4f
+001ac2 4320
+001ac3 4d4f
+001ac4 4c50
+001ac5 d845      .DB 77,85,76,65,32,84,79,79,32,67,79,77,80,76,69,216
+001ac6 4143
+001ac7 274e
+001ac8 2054
+001ac9 4f43
+001aca 544e
+001acb 4e49
+001acc c555
+001acd 4e55      .DB 67,65,78,39,84,32,67,79,78,84,73,78,85,197,85,78
+001ace 4544
+001acf 2746
+001ad0 2044
+001ad1 5546
+001ad2 434e
+001ad3 4954
+001ad4 ce4f
+001ad5 4556      .DB 68,69,70,39,68,32,70,85,78,67,84,73,79,206,86,69
+001ad6 4952
+001ad7 d946
+001ad8 4f4c
+001ad9 c441
+001ada c19e
+001adb c1ac
+001adc c1b5
+001add c1c2      .DB 82,73,70,217,76,79,65,196,158,193,172,193,181,193,194,193
+001ade c1d0
+001adf c1e2
+001ae0 c1f0
+001ae1 c1ff
+001ae2 c210
+001ae3 c225
+001ae4 c235
+001ae5 c23b      .DB 208,193,226,193,240,193,255,193,16,194,37,194,53,194,59,194
+001ae6 c24f
+001ae7 c25a
+001ae8 c26a
+001ae9 c272
+001aea c27f
+001aeb c290
+001aec c29d
+001aed c2aa      .DB 79,194,90,194,106,194,114,194,127,194,144,194,157,194,170,194
+001aee c2ba
+001aef c2c8
+001af0 c2d5
+001af1 c2e4
+001af2 c2ed
+001af3 c300
+001af4 c30e
+001af5 c31e      .DB 186,194,200,194,213,194,228,194,237,194,0,195,14,195,30,195
+001af6 c324
+001af7 c383
+001af8 4f0d
+001af9 0d4b
+001afa 0d00
+001afb 4520
+001afc 5252
+001afd 524f      .DB 36,195,131,195,13,79,75,13,0,13,32,69,82,82,79,82
+001afe 2000
+001aff 4e49
+001b00 0020
+001b01 0a0d
+001b02 4552
+001b03 4441
+001b04 2e59
+001b05 0a0d      .DB 0,32,73,78,32,0,13,10,82,69,65,68,89,46,13,10
+001b06 0d00
+001b07 420a
+001b08 4552
+001b09 4b41
+001b0a a000
+001b0b e8ba
+001b0c e8e8
+001b0d bde8      .DB 0,13,10,66,82,69,65,75,0,160,186,232,232,232,232,189
+001b0e 0101
+001b0f 81c9
+001b10 21d0
+001b11 4aa5
+001b12 0ad0
+001b13 02bd
+001b14 8501
+001b15 bd49      .DB 1,1,201,129,208,33,165,74,208,10,189,2,1,133,73,189
+001b16 0103
+001b17 4a85
+001b18 03dd
+001b19 d001
+001b1a a507
+001b1b dd49
+001b1c 0102
+001b1d 07f0      .DB 3,1,133,74,221,3,1,208,7,165,73,221,2,1,240,7
+001b1e 188a
+001b1f 1269
+001b20 d0aa
+001b21 60d8
+001b22 0820
+001b23 85c4
+001b24 8431
+001b25 3832      .DB 138,24,105,18,170,208,216,96,32,8,196,133,49,132,50,56
+001b26 5aa5
+001b27 5fe5
+001b28 2285
+001b29 a5a8
+001b2a e55b
+001b2b aa60
+001b2c 98e8
+001b2d 23f0      .DB 165,90,229,95,133,34,168,165,91,229,96,170,232,152,240,35
+001b2e 5aa5
+001b2f e538
+001b30 8522
+001b31 b05a
+001b32 c603
+001b33 385b
+001b34 58a5
+001b35 22e5      .DB 165,90,56,229,34,133,90,176,3,198,91,56,165,88,229,34
+001b36 5885
+001b37 08b0
+001b38 59c6
+001b39 0490
+001b3a 5ab1
+001b3b 5891
+001b3c d088
+001b3d b1f9      .DB 133,88,176,8,198,89,144,4,177,90,145,88,136,208,249,177
+001b3e 915a
+001b3f c658
+001b40 c65b
+001b41 ca59
+001b42 f2d0
+001b43 0a60
+001b44 3e69
+001b45 35b0      .DB 90,145,88,198,91,198,89,202,208,242,96,10,105,62,176,53
+001b46 2285
+001b47 e4ba
+001b48 9022
+001b49 602e
+001b4a 34c4
+001b4b 2890
+001b4c 04d0
+001b4d 33c5      .DB 133,34,186,228,34,144,46,96,196,52,144,40,208,4,197,51
+001b4e 2290
+001b4f a248
+001b50 9809
+001b51 b548
+001b52 ca57
+001b53 fa10
+001b54 2620
+001b55 a2d5      .DB 144,34,72,162,9,152,72,181,87,202,16,250,32,38,213,162
+001b56 68f7
+001b57 6195
+001b58 30e8
+001b59 68fa
+001b5a 68a8
+001b5b 34c4
+001b5c 0690
+001b5d 05d0      .DB 247,104,149,97,232,48,250,104,168,104,196,52,144,6,208,5
+001b5e 33c5
+001b5f 01b0
+001b60 a260
+001b61 6c10
+001b62 0300
+001b63 0a8a
+001b64 bdaa
+001b65 c326      .DB 197,51,176,1,96,162,16,108,0,3,138,10,170,189,38,195
+001b66 2285
+001b67 27bd
+001b68 85c3
+001b69 2023
+001b6a ffcc
+001b6b 00a9
+001b6c 1385
+001b6d d720      .DB 133,34,189,39,195,133,35,32,204,255,169,0,133,19,32,215
+001b6e 20ca
+001b6f cb45
+001b70 00a0
+001b71 22b1
+001b72 2948
+001b73 207f
+001b74 cb47
+001b75 68c8      .DB 202,32,69,203,160,0,177,34,72,41,127,32,71,203,200,104
+001b76 f410
+001b77 7a20
+001b78 a9c6
+001b79 a069
+001b7a 20c3
+001b7b cb1e
+001b7c 3aa4
+001b7d f0c8      .DB 16,244,32,122,198,169,105,160,195,32,30,203,164,58,200,240
+001b7e 2003
+001b7f ddc2
+001b80 76a9
+001b81 c3a0
+001b82 1e20
+001b83 a9cb
+001b84 2080
+001b85 ff90      .DB 3,32,194,221,169,118,160,195,32,30,203,169,128,32,144,255
+001b86 026c
+001b87 2003
+001b88 c560
+001b89 7a86
+001b8a 7b84
+001b8b 7320
+001b8c aa00
+001b8d f0f0      .DB 108,2,3,32,96,197,134,122,132,123,32,115,0,170,240,240
+001b8e ffa2
+001b8f 3a86
+001b90 0690
+001b91 7920
+001b92 4cc5
+001b93 c7e1
+001b94 6b20
+001b95 20c9      .DB 162,255,134,58,144,6,32,121,197,76,225,199,32,107,201,32
+001b96 c579
+001b97 0b84
+001b98 1320
+001b99 90c6
+001b9a a044
+001b9b b101
+001b9c 855f
+001b9d a523      .DB 121,197,132,11,32,19,198,144,68,160,1,177,95,133,35,165
+001b9e 852d
+001b9f a522
+001ba0 8560
+001ba1 a525
+001ba2 885f
+001ba3 5ff1
+001ba4 6518
+001ba5 852d      .DB 45,133,34,165,96,133,37,165,95,136,241,95,24,101,45,133
+001ba6 852d
+001ba7 a524
+001ba8 692e
+001ba9 85ff
+001baa e52e
+001bab aa60
+001bac a538
+001bad e55f      .DB 45,133,36,165,46,105,255,133,46,229,96,170,56,165,95,229
+001bae a82d
+001baf 03b0
+001bb0 c6e8
+001bb1 1825
+001bb2 2265
+001bb3 0390
+001bb4 23c6
+001bb5 b118      .DB 45,168,176,3,232,198,37,24,101,34,144,3,198,35,24,177
+001bb6 9122
+001bb7 c824
+001bb8 f9d0
+001bb9 23e6
+001bba 25e6
+001bbb d0ca
+001bbc 20f2
+001bbd c659      .DB 34,145,36,200,208,249,230,35,230,37,202,208,242,32,89,198
+001bbe 3320
+001bbf adc5
+001bc0 0200
+001bc1 88f0
+001bc2 a518
+001bc3 852d
+001bc4 655a
+001bc5 850b      .DB 32,51,197,173,0,2,240,136,24,165,45,133,90,101,11,133
+001bc6 a458
+001bc7 842e
+001bc8 905b
+001bc9 c801
+001bca 5984
+001bcb b820
+001bcc a5c3
+001bcd a414      .DB 88,164,46,132,91,144,1,200,132,89,32,184,195,165,20,164
+001bce 8d15
+001bcf 01fe
+001bd0 ff8c
+001bd1 a501
+001bd2 a431
+001bd3 8532
+001bd4 842d
+001bd5 a42e      .DB 21,141,254,1,140,255,1,165,49,164,50,133,45,132,46,164
+001bd6 880b
+001bd7 fcb9
+001bd8 9101
+001bd9 885f
+001bda f810
+001bdb 5920
+001bdc 20c6
+001bdd c533      .DB 11,136,185,252,1,145,95,136,16,248,32,89,198,32,51,197
+001bde 804c
+001bdf a5c4
+001be0 a42b
+001be1 852c
+001be2 8422
+001be3 1823
+001be4 01a0
+001be5 22b1      .DB 76,128,196,165,43,164,44,133,34,132,35,24,160,1,177,34
+001be6 1df0
+001be7 04a0
+001be8 b1c8
+001be9 d022
+001bea c8fb
+001beb 6598
+001bec aa22
+001bed 00a0      .DB 240,29,160,4,200,177,34,208,251,200,152,101,34,170,160,0
+001bee 2291
+001bef 23a5
+001bf0 0069
+001bf1 91c8
+001bf2 8622
+001bf3 8522
+001bf4 9023
+001bf5 60dd      .DB 145,34,165,35,105,0,200,145,34,134,34,133,35,144,221,96
+001bf6 00a2
+001bf7 0f20
+001bf8 c9e1
+001bf9 f00d
+001bfa 9d0d
+001bfb 0200
+001bfc e0e8
+001bfd 9059      .DB 162,0,32,15,225,201,13,240,13,157,0,2,232,224,89,144
+001bfe a2f1
+001bff 4c17
+001c00 c437
+001c01 ca4c
+001c02 6cca
+001c03 0304
+001c04 7aa6
+001c05 04a0      .DB 241,162,23,76,55,196,76,202,202,108,4,3,166,122,160,4
+001c06 0f84
+001c07 00bd
+001c08 1002
+001c09 c907
+001c0a f0ff
+001c0b e83e
+001c0c f4d0
+001c0d 20c9      .DB 132,15,189,0,2,16,7,201,255,240,62,232,208,244,201,32
+001c0e 37f0
+001c0f 0885
+001c10 22c9
+001c11 56f0
+001c12 0f24
+001c13 2d70
+001c14 3fc9
+001c15 04d0      .DB 240,55,133,8,201,34,240,86,36,15,112,45,201,63,208,4
+001c16 99a9
+001c17 25d0
+001c18 30c9
+001c19 0490
+001c1a 3cc9
+001c1b 1d90
+001c1c 7184
+001c1d 00a0      .DB 169,153,208,37,201,48,144,4,201,60,144,29,132,113,160,0
+001c1e 0b84
+001c1f 8688
+001c20 ca7a
+001c21 e8c8
+001c22 00bd
+001c23 3802
+001c24 9ef9
+001c25 f0c0      .DB 132,11,136,134,122,202,200,232,189,0,2,56,249,158,192,240
+001c26 c9f5
+001c27 d080
+001c28 0530
+001c29 a40b
+001c2a e871
+001c2b 99c8
+001c2c 01fb
+001c2d fbb9      .DB 245,201,128,208,48,5,11,164,113,232,200,153,251,1,185,251
+001c2e f001
+001c2f 3836
+001c30 3ae9
+001c31 04f0
+001c32 49c9
+001c33 02d0
+001c34 0f85
+001c35 e938      .DB 1,240,54,56,233,58,240,4,201,73,208,2,133,15,56,233
+001c36 d055
+001c37 859f
+001c38 bd08
+001c39 0200
+001c3a dff0
+001c3b 08c5
+001c3c dbf0
+001c3d 99c8      .DB 85,208,159,133,8,189,0,2,240,223,197,8,240,219,200,153
+001c3e 01fb
+001c3f d0e8
+001c40 a6f0
+001c41 e67a
+001c42 c80b
+001c43 9db9
+001c44 10c0
+001c45 b9fa      .DB 251,1,232,208,240,166,122,230,11,200,185,157,192,16,250,185
+001c46 c09e
+001c47 b4d0
+001c48 00bd
+001c49 1002
+001c4a 99be
+001c4b 01fd
+001c4c 7bc6
+001c4d ffa9      .DB 158,192,208,180,189,0,2,16,190,153,253,1,198,123,169,255
+001c4e 7a85
+001c4f a560
+001c50 a62b
+001c51 a02c
+001c52 8501
+001c53 865f
+001c54 b160
+001c55 f05f      .DB 133,122,96,165,43,166,44,160,1,133,95,134,96,177,95,240
+001c56 c81f
+001c57 a5c8
+001c58 d115
+001c59 905f
+001c5a f018
+001c5b 8803
+001c5c 09d0
+001c5d 14a5      .DB 31,200,200,165,21,209,95,144,24,240,3,136,208,9,165,20
+001c5e d188
+001c5f 905f
+001c60 f00c
+001c61 880a
+001c62 5fb1
+001c63 88aa
+001c64 5fb1
+001c65 d7b0      .DB 136,209,95,144,12,240,10,136,177,95,170,136,177,95,176,215
+001c66 6018
+001c67 fdd0
+001c68 00a9
+001c69 91a8
+001c6a c82b
+001c6b 2b91
+001c6c 2ba5
+001c6d 6918      .DB 24,96,208,253,169,0,168,145,43,200,145,43,165,43,24,105
+001c6e 8502
+001c6f a52d
+001c70 692c
+001c71 8500
+001c72 202e
+001c73 c68e
+001c74 00a9
+001c75 2dd0      .DB 2,133,45,165,44,105,0,133,46,32,142,198,169,0,208,45
+001c76 e720
+001c77 a5ff
+001c78 a437
+001c79 8538
+001c7a 8433
+001c7b a534
+001c7c a42d
+001c7d 852e      .DB 32,231,255,165,55,164,56,133,51,132,52,165,45,164,46,133
+001c7e 842f
+001c7f 8530
+001c80 8431
+001c81 2032
+001c82 c81d
+001c83 19a2
+001c84 1686
+001c85 a868      .DB 47,132,48,133,49,132,50,32,29,200,162,25,134,22,104,168
+001c86 a268
+001c87 9afa
+001c88 9848
+001c89 a948
+001c8a 8500
+001c8b 853e
+001c8c 6010
+001c8d a518      .DB 104,162,250,154,72,152,72,169,0,133,62,133,16,96,24,165
+001c8e 692b
+001c8f 85ff
+001c90 a57a
+001c91 692c
+001c92 85ff
+001c93 607b
+001c94 0690
+001c95 04f0      .DB 43,105,255,133,122,165,44,105,255,133,123,96,144,6,240,4
+001c96 abc9
+001c97 e9d0
+001c98 6b20
+001c99 20c9
+001c9a c613
+001c9b 7920
+001c9c f000
+001c9d c90c      .DB 201,171,208,233,32,107,201,32,19,198,32,121,0,240,12,201
+001c9e d0ab
+001c9f 208e
+001ca0 0073
+001ca1 6b20
+001ca2 d0c9
+001ca3 6886
+001ca4 a568
+001ca5 0514      .DB 171,208,142,32,115,0,32,107,201,208,134,104,104,165,20,5
+001ca6 d015
+001ca7 a906
+001ca8 85ff
+001ca9 8514
+001caa a015
+001cab 8401
+001cac b10f
+001cad f05f      .DB 21,208,6,169,255,133,20,133,21,160,1,132,15,177,95,240
+001cae 2043
+001caf c82c
+001cb0 d720
+001cb1 c8ca
+001cb2 5fb1
+001cb3 c8aa
+001cb4 5fb1
+001cb5 15c5      .DB 67,32,44,200,32,215,202,200,177,95,170,200,177,95,197,21
+001cb6 04d0
+001cb7 14e4
+001cb8 02f0
+001cb9 2cb0
+001cba 4984
+001cbb cd20
+001cbc a9dd
+001cbd a420      .DB 208,4,228,20,240,2,176,44,132,73,32,205,221,169,32,164
+001cbe 2949
+001cbf 207f
+001cc0 cb47
+001cc1 22c9
+001cc2 06d0
+001cc3 0fa5
+001cc4 ff49
+001cc5 0f85      .DB 73,41,127,32,71,203,201,34,208,6,165,15,73,255,133,15
+001cc6 f0c8
+001cc7 b111
+001cc8 d05f
+001cc9 a810
+001cca 5fb1
+001ccb c8aa
+001ccc 5fb1
+001ccd 5f86      .DB 200,240,17,177,95,208,16,168,177,95,170,200,177,95,134,95
+001cce 6085
+001ccf b5d0
+001cd0 744c
+001cd1 6cc4
+001cd2 0306
+001cd3 d710
+001cd4 ffc9
+001cd5 d3f0      .DB 133,96,208,181,76,116,196,108,6,3,16,215,201,255,240,211
+001cd6 0f24
+001cd7 cf30
+001cd8 e938
+001cd9 aa7f
+001cda 4984
+001cdb ffa0
+001cdc f0ca
+001cdd c808      .DB 36,15,48,207,56,233,127,170,132,73,160,255,202,240,8,200
+001cde 9eb9
+001cdf 10c0
+001ce0 30fa
+001ce1 c8f5
+001ce2 9eb9
+001ce3 30c0
+001ce4 20b2
+001ce5 cb47      .DB 185,158,192,16,250,48,245,200,185,158,192,48,178,32,71,203
+001ce6 f5d0
+001ce7 80a9
+001ce8 1085
+001ce9 a520
+001cea 20c9
+001ceb c38a
+001cec 05d0
+001ced 698a      .DB 208,245,169,128,133,16,32,165,201,32,138,195,208,5,138,105
+001cee aa0f
+001cef 689a
+001cf0 a968
+001cf1 2009
+001cf2 c3fb
+001cf3 0620
+001cf4 18c9
+001cf5 6598      .DB 15,170,154,104,104,169,9,32,251,195,32,6,201,24,152,101
+001cf6 487a
+001cf7 7ba5
+001cf8 0069
+001cf9 a548
+001cfa 483a
+001cfb 39a5
+001cfc a948
+001cfd 20a4      .DB 122,72,165,123,105,0,72,165,58,72,165,57,72,169,164,32
+001cfe ceff
+001cff 8d20
+001d00 20cd
+001d01 cd8a
+001d02 66a5
+001d03 7f09
+001d04 6225
+001d05 6285      .DB 255,206,32,141,205,32,138,205,165,102,9,127,37,98,133,98
+001d06 8ba9
+001d07 c7a0
+001d08 2285
+001d09 2384
+001d0a 434c
+001d0b a9ce
+001d0c a0bc
+001d0d 20d9      .DB 169,139,160,199,133,34,132,35,76,67,206,169,188,160,217,32
+001d0e dba2
+001d0f 7920
+001d10 c900
+001d11 d0a9
+001d12 2006
+001d13 0073
+001d14 8a20
+001d15 20cd      .DB 162,219,32,121,0,201,169,208,6,32,115,0,32,138,205,32
+001d16 dc2b
+001d17 3820
+001d18 a5ce
+001d19 484a
+001d1a 49a5
+001d1b a948
+001d1c 4881
+001d1d 2c20      .DB 43,220,32,56,206,165,74,72,165,73,72,169,129,72,32,44
+001d1e a5c8
+001d1f a47a
+001d20 c07b
+001d21 ea02
+001d22 04f0
+001d23 3d85
+001d24 3e84
+001d25 00a0      .DB 200,165,122,164,123,192,2,234,240,4,133,61,132,62,160,0
+001d26 7ab1
+001d27 43d0
+001d28 02a0
+001d29 7ab1
+001d2a d018
+001d2b 4c03
+001d2c c84b
+001d2d b1c8      .DB 177,122,208,67,160,2,177,122,24,208,3,76,75,200,200,177
+001d2e 857a
+001d2f c839
+001d30 7ab1
+001d31 3a85
+001d32 6598
+001d33 857a
+001d34 907a
+001d35 e602      .DB 122,133,57,200,177,122,133,58,152,101,122,133,122,144,2,230
+001d36 6c7b
+001d37 0308
+001d38 7320
+001d39 2000
+001d3a c7ed
+001d3b ae4c
+001d3c f0c7
+001d3d e93c      .DB 123,108,8,3,32,115,0,32,237,199,76,174,199,240,60,233
+001d3e 9080
+001d3f c911
+001d40 b023
+001d41 0a17
+001d42 b9a8
+001d43 c00d
+001d44 b948
+001d45 c00c      .DB 128,144,17,201,35,176,23,10,168,185,13,192,72,185,12,192
+001d46 4c48
+001d47 0073
+001d48 a54c
+001d49 c9c9
+001d4a f03a
+001d4b 4cd6
+001d4c cf08
+001d4d 4bc9      .DB 72,76,115,0,76,165,201,201,58,240,214,76,8,207,201,75
+001d4e f9d0
+001d4f 7320
+001d50 a900
+001d51 20a4
+001d52 ceff
+001d53 a04c
+001d54 38c8
+001d55 2ba5      .DB 208,249,32,115,0,169,164,32,255,206,76,160,200,56,165,43
+001d56 01e9
+001d57 2ca4
+001d58 01b0
+001d59 8588
+001d5a 8441
+001d5b 6042
+001d5c e120
+001d5d b0ff      .DB 233,1,164,44,176,1,136,133,65,132,66,96,32,225,255,176
+001d5e 1801
+001d5f 3cd0
+001d60 7aa5
+001d61 7ba4
+001d62 3aa6
+001d63 f0e8
+001d64 850c
+001d65 843d      .DB 1,24,208,60,165,122,164,123,166,58,232,240,12,133,61,132
+001d66 a53e
+001d67 a439
+001d68 853a
+001d69 843b
+001d6a 683c
+001d6b a968
+001d6c a081
+001d6d 90c3      .DB 62,165,57,164,58,133,59,132,60,104,104,169,129,160,195,144
+001d6e 4c03
+001d6f c469
+001d70 744c
+001d71 d0c4
+001d72 a217
+001d73 a41a
+001d74 d03e
+001d75 4c03      .DB 3,76,105,196,76,116,196,208,23,162,26,164,62,208,3,76
+001d76 c437
+001d77 3da5
+001d78 7a85
+001d79 7b84
+001d7a 3ba5
+001d7b 3ca4
+001d7c 3985
+001d7d 3a84      .DB 55,196,165,61,133,122,132,123,165,59,164,60,133,57,132,58
+001d7e 0860
+001d7f 00a9
+001d80 9020
+001d81 28ff
+001d82 03d0
+001d83 594c
+001d84 20c6
+001d85 c660      .DB 96,8,169,0,32,144,255,40,208,3,76,89,198,32,96,198
+001d86 974c
+001d87 a9c8
+001d88 2003
+001d89 c3fb
+001d8a 7ba5
+001d8b a548
+001d8c 487a
+001d8d 3aa5      .DB 76,151,200,169,3,32,251,195,165,123,72,165,122,72,165,58
+001d8e a548
+001d8f 4839
+001d90 8da9
+001d91 2048
+001d92 0079
+001d93 a020
+001d94 4cc8
+001d95 c7ae      .DB 72,165,57,72,169,141,72,32,121,0,32,160,200,76,174,199
+001d96 6b20
+001d97 20c9
+001d98 c909
+001d99 a538
+001d9a e539
+001d9b a514
+001d9c e53a
+001d9d b015      .DB 32,107,201,32,9,201,56,165,57,229,20,165,58,229,21,176
+001d9e 980b
+001d9f 6538
+001da0 a67a
+001da1 907b
+001da2 e807
+001da3 04b0
+001da4 2ba5
+001da5 2ca6      .DB 11,152,56,101,122,166,123,144,7,232,176,4,165,43,166,44
+001da6 1720
+001da7 90c6
+001da8 a51e
+001da9 e95f
+001daa 8501
+001dab a57a
+001dac e960
+001dad 8500      .DB 32,23,198,144,30,165,95,233,1,133,122,165,96,233,0,133
+001dae 607b
+001daf fdd0
+001db0 ffa9
+001db1 4a85
+001db2 8a20
+001db3 9ac3
+001db4 8dc9
+001db5 0bf0      .DB 123,96,208,253,169,255,133,74,32,138,195,154,201,141,240,11
+001db6 0ca2
+001db7 a22c
+001db8 4c11
+001db9 c437
+001dba 084c
+001dbb 68cf
+001dbc 8568
+001dbd 6839      .DB 162,12,44,162,17,76,55,196,76,8,207,104,104,133,57,104
+001dbe 3a85
+001dbf 8568
+001dc0 687a
+001dc1 7b85
+001dc2 0620
+001dc3 98c9
+001dc4 6518
+001dc5 857a      .DB 133,58,104,133,122,104,133,123,32,6,201,152,24,101,122,133
+001dc6 907a
+001dc7 e602
+001dc8 607b
+001dc9 3aa2
+001dca a22c
+001dcb 8600
+001dcc a007
+001dcd 8400      .DB 122,144,2,230,123,96,162,58,44,162,0,134,7,160,0,132
+001dce a508
+001dcf a608
+001dd0 8507
+001dd1 8607
+001dd2 b108
+001dd3 f07a
+001dd4 c5e8
+001dd5 f008      .DB 8,165,8,166,7,133,7,134,8,177,122,240,232,197,8,240
+001dd6 c8e4
+001dd7 22c9
+001dd8 f3d0
+001dd9 e9f0
+001dda 9e20
+001ddb 20cd
+001ddc 0079
+001ddd 89c9      .DB 228,200,201,34,208,243,240,233,32,158,205,32,121,0,201,137
+001dde 05f0
+001ddf a7a9
+001de0 ff20
+001de1 a5ce
+001de2 d061
+001de3 2005
+001de4 c909
+001de5 bbf0      .DB 240,5,169,167,32,255,206,165,97,208,5,32,9,201,240,187
+001de6 7920
+001de7 b000
+001de8 4c03
+001de9 c8a0
+001dea ed4c
+001deb 20c7
+001dec d79e
+001ded c948      .DB 32,121,0,176,3,76,160,200,76,237,199,32,158,215,72,201
+001dee f08d
+001def c904
+001df0 d089
+001df1 c691
+001df2 d065
+001df3 6804
+001df4 ef4c
+001df5 20c7      .DB 141,240,4,201,137,208,145,198,101,208,4,104,76,239,199,32
+001df6 0073
+001df7 6b20
+001df8 c9c9
+001df9 f02c
+001dfa 68ee
+001dfb a260
+001dfc 8600
+001dfd 8614      .DB 115,0,32,107,201,201,44,240,238,104,96,162,0,134,20,134
+001dfe b015
+001dff e9f7
+001e00 852f
+001e01 a507
+001e02 8515
+001e03 c922
+001e04 b019
+001e05 a5d4      .DB 21,176,247,233,47,133,7,165,21,133,34,201,25,176,212,165
+001e06 0a14
+001e07 2226
+001e08 260a
+001e09 6522
+001e0a 8514
+001e0b a514
+001e0c 6522
+001e0d 8515      .DB 20,10,38,34,10,38,34,101,20,133,20,165,34,101,21,133
+001e0e 0615
+001e0f 2614
+001e10 a515
+001e11 6514
+001e12 8507
+001e13 9014
+001e14 e602
+001e15 2015      .DB 21,6,20,38,21,165,20,101,7,133,20,144,2,230,21,32
+001e16 0073
+001e17 714c
+001e18 20c9
+001e19 d08b
+001e1a 4985
+001e1b 4a84
+001e1c b2a9
+001e1d ff20      .DB 115,0,76,113,201,32,139,208,133,73,132,74,169,178,32,255
+001e1e a5ce
+001e1f 480e
+001e20 0da5
+001e21 2048
+001e22 cd9e
+001e23 2a68
+001e24 9020
+001e25 d0cd      .DB 206,165,14,72,165,13,72,32,158,205,104,42,32,144,205,208
+001e26 6818
+001e27 1210
+001e28 1b20
+001e29 20dc
+001e2a d1bf
+001e2b 00a0
+001e2c 64a5
+001e2d 4991      .DB 24,104,16,18,32,27,220,32,191,209,160,0,165,100,145,73
+001e2e a5c8
+001e2f 9165
+001e30 6049
+001e31 d04c
+001e32 68db
+001e33 4aa4
+001e34 dfc0
+001e35 4cd0      .DB 200,165,101,145,73,96,76,208,219,104,164,74,192,223,208,76
+001e36 a620
+001e37 c9d6
+001e38 d006
+001e39 a03d
+001e3a 8400
+001e3b 8461
+001e3c 8466
+001e3d 2071      .DB 32,166,214,201,6,208,61,160,0,132,97,132,102,132,113,32
+001e3e ca1d
+001e3f e220
+001e40 e6da
+001e41 a471
+001e42 2071
+001e43 ca1d
+001e44 0c20
+001e45 aadc      .DB 29,202,32,226,218,230,113,164,113,32,29,202,32,12,220,170
+001e46 05f0
+001e47 8ae8
+001e48 ed20
+001e49 a4da
+001e4a c871
+001e4b 06c0
+001e4c dfd0
+001e4d e220      .DB 240,5,232,138,32,237,218,164,113,200,192,6,208,223,32,226
+001e4e 20da
+001e4f dc9b
+001e50 64a6
+001e51 63a4
+001e52 65a5
+001e53 db4c
+001e54 b1ff
+001e55 2022      .DB 218,32,155,220,166,100,164,99,165,101,76,219,255,177,34,32
+001e56 0080
+001e57 0390
+001e58 484c
+001e59 e9d2
+001e5a 4c2f
+001e5b dd7e
+001e5c 02a0
+001e5d 64b1      .DB 128,0,144,3,76,72,210,233,47,76,126,221,160,2,177,100
+001e5e 34c5
+001e5f 1790
+001e60 07d0
+001e61 b188
+001e62 c564
+001e63 9033
+001e64 a40e
+001e65 c465      .DB 197,52,144,23,208,7,136,177,100,197,51,144,14,164,101,196
+001e66 902e
+001e67 d008
+001e68 a50d
+001e69 c564
+001e6a b02d
+001e6b a507
+001e6c a464
+001e6d 4c65      .DB 46,144,8,208,13,165,100,197,45,176,7,165,100,164,101,76
+001e6e ca68
+001e6f 00a0
+001e70 64b1
+001e71 7520
+001e72 a5d4
+001e73 a450
+001e74 8551
+001e75 846f      .DB 104,202,160,0,177,100,32,117,212,165,80,164,81,133,111,132
+001e76 2070
+001e77 d67a
+001e78 61a9
+001e79 00a0
+001e7a 5085
+001e7b 5184
+001e7c db20
+001e7d a0d6      .DB 112,32,122,214,169,97,160,0,133,80,132,81,32,219,214,160
+001e7e b100
+001e7f 9150
+001e80 c849
+001e81 50b1
+001e82 4991
+001e83 b1c8
+001e84 9150
+001e85 6049      .DB 0,177,80,145,73,200,177,80,145,73,200,177,80,145,73,96
+001e86 8620
+001e87 4cca
+001e88 cbb5
+001e89 9e20
+001e8a f0d7
+001e8b a905
+001e8c 202c
+001e8d ceff      .DB 32,134,202,76,181,203,32,158,215,240,5,169,44,32,255,206
+001e8e 8608
+001e8f 2013
+001e90 e115
+001e91 4c28
+001e92 caa0
+001e93 2120
+001e94 20cb
+001e95 0079      .DB 8,134,19,32,21,225,40,76,160,202,32,33,203,32,121,0
+001e96 35f0
+001e97 43f0
+001e98 a3c9
+001e99 50f0
+001e9a a6c9
+001e9b f018
+001e9c c94b
+001e9d f02c      .DB 240,53,240,67,201,163,240,80,201,166,24,240,75,201,44,240
+001e9e c937
+001e9f f03b
+001ea0 205e
+001ea1 cd9e
+001ea2 0d24
+001ea3 de30
+001ea4 dd20
+001ea5 20dd      .DB 55,201,59,240,94,32,158,205,36,13,48,222,32,221,221,32
+001ea6 d487
+001ea7 2120
+001ea8 20cb
+001ea9 cb3b
+001eaa d3d0
+001eab 00a9
+001eac 009d
+001ead a202      .DB 135,212,32,33,203,32,59,203,208,211,169,0,157,0,2,162
+001eae a0ff
+001eaf a501
+001eb0 d013
+001eb1 a910
+001eb2 200d
+001eb3 cb47
+001eb4 1324
+001eb5 0510      .DB 255,160,1,165,19,208,16,169,13,32,71,203,36,19,16,5
+001eb6 0aa9
+001eb7 4720
+001eb8 49cb
+001eb9 60ff
+001eba 2038
+001ebb fff0
+001ebc 3898
+001ebd 0be9      .DB 169,10,32,71,203,73,255,96,56,32,240,255,152,56,233,11
+001ebe fcb0
+001ebf ff49
+001ec0 0169
+001ec1 16d0
+001ec2 3808
+001ec3 f020
+001ec4 84ff
+001ec5 2009      .DB 176,252,73,255,105,1,208,22,8,56,32,240,255,132,9,32
+001ec6 d79b
+001ec7 29c9
+001ec8 59d0
+001ec9 9028
+001eca 8a06
+001ecb 09e5
+001ecc 0590
+001ecd e8aa      .DB 155,215,201,41,208,89,40,144,6,138,229,9,144,5,170,232
+001ece d0ca
+001ecf 2006
+001ed0 0073
+001ed1 a24c
+001ed2 20ca
+001ed3 cb3b
+001ed4 f2d0
+001ed5 8720      .DB 202,208,6,32,115,0,76,162,202,32,59,203,208,242,32,135
+001ed6 20d4
+001ed7 d6a6
+001ed8 a0aa
+001ed9 e800
+001eda f0ca
+001edb b1bc
+001edc 2022
+001edd cb47      .DB 212,32,166,214,170,160,0,232,202,240,188,177,34,32,71,203
+001ede c9c8
+001edf d00d
+001ee0 20f3
+001ee1 cae5
+001ee2 284c
+001ee3 a5cb
+001ee4 f013
+001ee5 a903      .DB 200,201,13,208,243,32,229,202,76,40,203,165,19,240,3,169
+001ee6 2c20
+001ee7 1da9
+001ee8 a92c
+001ee9 203f
+001eea e109
+001eeb ff29
+001eec a560
+001eed f011      .DB 32,44,169,29,44,169,63,32,9,225,41,255,96,165,17,240
+001eee 3011
+001eef a004
+001ef0 d0ff
+001ef1 a504
+001ef2 a43f
+001ef3 8540
+001ef4 8439
+001ef5 4c3a      .DB 17,48,4,160,255,208,4,165,63,164,64,133,57,132,58,76
+001ef6 cf08
+001ef7 13a5
+001ef8 05f0
+001ef9 18a2
+001efa 374c
+001efb a9c4
+001efc a00c
+001efd 20cd      .DB 8,207,165,19,240,5,162,24,76,55,196,169,12,160,205,32
+001efe cb1e
+001eff 3da5
+001f00 3ea4
+001f01 7a85
+001f02 7b84
+001f03 2060
+001f04 d3a6
+001f05 23c9      .DB 30,203,165,61,164,62,133,122,132,123,96,32,166,211,201,35
+001f06 10d0
+001f07 7320
+001f08 2000
+001f09 d79e
+001f0a 2ca9
+001f0b ff20
+001f0c 86ce
+001f0d 2013      .DB 208,16,32,115,0,32,158,215,169,44,32,255,206,134,19,32
+001f0e e11b
+001f0f 01a2
+001f10 02a0
+001f11 00a9
+001f12 018d
+001f13 a902
+001f14 2040
+001f15 cc0f      .DB 27,225,162,1,160,2,169,0,141,1,2,169,64,32,15,204
+001f16 13a6
+001f17 13d0
+001f18 2060
+001f19 d79e
+001f1a 2ca9
+001f1b ff20
+001f1c 86ce
+001f1d 2013      .DB 166,19,208,19,96,32,158,215,169,44,32,255,206,134,19,32
+001f1e e11b
+001f1f ce20
+001f20 a5cb
+001f21 2013
+001f22 ffcc
+001f23 00a2
+001f24 1386
+001f25 c960      .DB 27,225,32,206,203,165,19,32,204,255,162,0,134,19,96,201
+001f26 d022
+001f27 200b
+001f28 cebd
+001f29 3ba9
+001f2a ff20
+001f2b 20ce
+001f2c cb21
+001f2d a620      .DB 34,208,11,32,189,206,169,59,32,255,206,32,33,203,32,166
+001f2e a9d3
+001f2f 8d2c
+001f30 01ff
+001f31 f920
+001f32 a5cb
+001f33 f013
+001f34 200d
+001f35 ffb7      .DB 211,169,44,141,255,1,32,249,203,165,19,240,13,32,183,255
+001f36 0229
+001f37 06f0
+001f38 b520
+001f39 4ccb
+001f3a c8f8
+001f3b 00ad
+001f3c d002
+001f3d a51e      .DB 41,2,240,6,32,181,203,76,248,200,173,0,2,208,30,165
+001f3e d013
+001f3f 20e3
+001f40 c906
+001f41 fb4c
+001f42 a5c8
+001f43 d013
+001f44 2006
+001f45 cb45      .DB 19,208,227,32,6,201,76,251,200,165,19,208,6,32,69,203
+001f46 3b20
+001f47 4ccb
+001f48 c560
+001f49 41a6
+001f4a 42a4
+001f4b 98a9
+001f4c a92c
+001f4d 8500      .DB 32,59,203,76,96,197,166,65,164,66,169,152,44,169,0,133
+001f4e 8611
+001f4f 8443
+001f50 2044
+001f51 d08b
+001f52 4985
+001f53 4a84
+001f54 7aa5
+001f55 7ba4      .DB 17,134,67,132,68,32,139,208,133,73,132,74,165,122,164,123
+001f56 4b85
+001f57 4c84
+001f58 43a6
+001f59 44a4
+001f5a 7a86
+001f5b 7b84
+001f5c 7920
+001f5d d000      .DB 133,75,132,76,166,67,164,68,134,122,132,123,32,121,0,208
+001f5e 2420
+001f5f 5011
+001f60 200c
+001f61 e121
+001f62 008d
+001f63 a202
+001f64 a0ff
+001f65 d001      .DB 32,36,17,80,12,32,33,225,141,0,2,162,255,160,1,208
+001f66 300c
+001f67 a575
+001f68 d013
+001f69 2003
+001f6a cb45
+001f6b f920
+001f6c 86cb
+001f6d 847a      .DB 12,48,117,165,19,208,3,32,69,203,32,249,203,134,122,132
+001f6e 207b
+001f6f 0073
+001f70 0d24
+001f71 3110
+001f72 1124
+001f73 0950
+001f74 86e8
+001f75 a97a      .DB 123,32,115,0,36,13,16,49,36,17,80,9,232,134,122,169
+001f76 8500
+001f77 f007
+001f78 850c
+001f79 c907
+001f7a f022
+001f7b a907
+001f7c 853a
+001f7d a907      .DB 0,133,7,240,12,133,7,201,34,240,7,169,58,133,7,169
+001f7e 182c
+001f7f 0885
+001f80 7aa5
+001f81 7ba4
+001f82 0069
+001f83 0190
+001f84 20c8
+001f85 d48d      .DB 44,24,133,8,165,122,164,123,105,0,144,1,200,32,141,212
+001f86 e220
+001f87 20d7
+001f88 c9da
+001f89 914c
+001f8a 20cc
+001f8b dcf3
+001f8c 0ea5
+001f8d c220      .DB 32,226,215,32,218,201,76,145,204,32,243,220,165,14,32,194
+001f8e 20c9
+001f8f 0079
+001f90 07f0
+001f91 2cc9
+001f92 03f0
+001f93 4d4c
+001f94 a5cb
+001f95 a47a      .DB 201,32,121,0,240,7,201,44,240,3,76,77,203,165,122,164
+001f96 857b
+001f97 8443
+001f98 a544
+001f99 a44b
+001f9a 854c
+001f9b 847a
+001f9c 207b
+001f9d 0079      .DB 123,133,67,132,68,165,75,164,76,133,122,132,123,32,121,0
+001f9e 2df0
+001f9f fd20
+001fa0 4cce
+001fa1 cc15
+001fa2 0620
+001fa3 c8c9
+001fa4 d0aa
+001fa5 a212      .DB 240,45,32,253,206,76,21,204,32,6,201,200,170,208,18,162
+001fa6 c80d
+001fa7 7ab1
+001fa8 6cf0
+001fa9 b1c8
+001faa 857a
+001fab c83f
+001fac 7ab1
+001fad 85c8      .DB 13,200,177,122,240,108,200,177,122,133,63,200,177,122,200,133
+001fae 2040
+001faf c8fb
+001fb0 7920
+001fb1 aa00
+001fb2 83e0
+001fb3 dcd0
+001fb4 514c
+001fb5 a5cc      .DB 64,32,251,200,32,121,0,170,224,131,208,220,76,81,204,165
+001fb6 a443
+001fb7 a644
+001fb8 1011
+001fb9 4c03
+001fba c827
+001fbb 00a0
+001fbc 43b1
+001fbd 0bf0      .DB 67,164,68,166,17,16,3,76,39,200,160,0,177,67,240,11
+001fbe 13a5
+001fbf 07d0
+001fc0 fca9
+001fc1 cca0
+001fc2 1e4c
+001fc3 60cb
+001fc4 453f
+001fc5 5458      .DB 165,19,208,7,169,252,160,204,76,30,203,96,63,69,88,84
+001fc6 4152
+001fc7 4920
+001fc8 4e47
+001fc9 524f
+001fca 4445
+001fcb 000d
+001fcc 523f
+001fcd 4445      .DB 82,65,32,73,71,78,79,82,69,68,13,0,63,82,69,68
+001fce 204f
+001fcf 5246
+001fd0 4d4f
+001fd1 5320
+001fd2 4154
+001fd3 5452
+001fd4 000d
+001fd5 04d0      .DB 79,32,70,82,79,77,32,83,84,65,82,84,13,0,208,4
+001fd6 00a0
+001fd7 03f0
+001fd8 8b20
+001fd9 85d0
+001fda 8449
+001fdb 204a
+001fdc c38a
+001fdd 05f0      .DB 160,0,240,3,32,139,208,133,73,132,74,32,138,195,240,5
+001fde 0aa2
+001fdf 374c
+001fe0 9ac4
+001fe1 188a
+001fe2 0469
+001fe3 6948
+001fe4 8506
+001fe5 6824      .DB 162,10,76,55,196,154,138,24,105,4,72,105,6,133,36,104
+001fe6 01a0
+001fe7 a220
+001fe8 badb
+001fe9 09bd
+001fea 8501
+001feb a566
+001fec a449
+001fed 204a      .DB 160,1,32,162,219,186,189,9,1,133,102,165,73,164,74,32
+001fee d867
+001fef d020
+001ff0 a0db
+001ff1 2001
+001ff2 dc5d
+001ff3 38ba
+001ff4 09fd
+001ff5 f001      .DB 103,216,32,208,219,160,1,32,93,220,186,56,253,9,1,240
+001ff6 bd17
+001ff7 010f
+001ff8 3985
+001ff9 10bd
+001ffa 8501
+001ffb bd3a
+001ffc 0112
+001ffd 7a85      .DB 23,189,15,1,133,57,189,16,1,133,58,189,18,1,133,122
+001ffe 11bd
+001fff 8501
+002000 4c7b
+002001 c7ae
+002002 698a
+002003 aa11
+002004 209a
+002005 0079      .DB 189,17,1,133,123,76,174,199,138,105,17,170,154,32,121,0
+002006 2cc9
+002007 f1d0
+002008 7320
+002009 2000
+00200a cd24
+00200b 9e20
+00200c 18cd
+00200d 3824      .DB 201,44,208,241,32,115,0,32,36,205,32,158,205,24,36,56
+00200e 0d24
+00200f 0330
+002010 03b0
+002011 b060
+002012 a2fd
+002013 4c16
+002014 c437
+002015 7aa6      .DB 36,13,48,3,176,3,96,176,253,162,22,76,55,196,166,122
+002016 02d0
+002017 7bc6
+002018 7ac6
+002019 00a2
+00201a 4824
+00201b 488a
+00201c 01a9
+00201d fb20      .DB 208,2,198,123,198,122,162,0,36,72,138,72,169,1,32,251
+00201e 20c3
+00201f ce83
+002020 00a9
+002021 4d85
+002022 7920
+002023 3800
+002024 b1e9
+002025 1790      .DB 195,32,131,206,169,0,133,77,32,121,0,56,233,177,144,23
+002026 03c9
+002027 13b0
+002028 01c9
+002029 492a
+00202a 4501
+00202b c54d
+00202c 904d
+00202d 8561      .DB 201,3,176,19,201,1,42,73,1,69,77,197,77,144,97,133
+00202e 204d
+00202f 0073
+002030 bb4c
+002031 a6cd
+002032 d04d
+002033 b02c
+002034 697b
+002035 9007      .DB 77,32,115,0,76,187,205,166,77,208,44,176,123,105,7,144
+002036 6577
+002037 d00d
+002038 4c03
+002039 d63d
+00203a ff69
+00203b 2285
+00203c 650a
+00203d a822      .DB 119,101,13,208,3,76,61,214,105,255,133,34,10,101,34,168
+00203e d968
+00203f c080
+002040 67b0
+002041 8d20
+002042 48cd
+002043 2020
+002044 68ce
+002045 4ba4      .DB 104,217,128,192,176,103,32,141,205,72,32,32,206,104,164,75
+002046 1710
+002047 f0aa
+002048 d056
+002049 465f
+00204a 8a0d
+00204b a62a
+00204c d07a
+00204d c602      .DB 16,23,170,240,86,208,95,70,13,138,42,166,122,208,2,198
+00204e c67b
+00204f a07a
+002050 851b
+002051 d04d
+002052 d9d7
+002053 c080
+002054 48b0
+002055 d990      .DB 123,198,122,160,27,133,77,208,215,217,128,192,176,72,144,217
+002056 82b9
+002057 48c0
+002058 81b9
+002059 48c0
+00205a 3320
+00205b a5ce
+00205c 4c4d
+00205d cda9      .DB 185,130,192,72,185,129,192,72,32,51,206,165,77,76,169,205
+00205e 084c
+00205f a5cf
+002060 be66
+002061 c080
+002062 68a8
+002063 2285
+002064 22e6
+002065 8568      .DB 76,8,207,165,102,190,128,192,168,104,133,34,230,34,104,133
+002066 9823
+002067 2048
+002068 dc1b
+002069 65a5
+00206a a548
+00206b 4864
+00206c 63a5
+00206d a548      .DB 35,152,72,32,27,220,165,101,72,165,100,72,165,99,72,165
+00206e 4862
+00206f 61a5
+002070 6c48
+002071 0022
+002072 ffa0
+002073 f068
+002074 c923
+002075 f064      .DB 98,72,165,97,72,108,34,0,160,255,104,240,35,201,100,240
+002076 2003
+002077 cd8d
+002078 4b84
+002079 4a68
+00207a 1285
+00207b 8568
+00207c 6869
+00207d 6a85      .DB 3,32,141,205,132,75,104,74,133,18,104,133,105,104,133,106
+00207e 8568
+00207f 686b
+002080 6c85
+002081 8568
+002082 686d
+002083 6e85
+002084 6645
+002085 6f85      .DB 104,133,107,104,133,108,104,133,109,104,133,110,69,102,133,111
+002086 61a5
+002087 6c60
+002088 030a
+002089 00a9
+00208a 0d85
+00208b 7320
+00208c b000
+00208d 4c03      .DB 165,97,96,108,10,3,169,0,133,13,32,115,0,176,3,76
+00208e dcf3
+00208f 1320
+002090 90d1
+002091 4c03
+002092 cf28
+002093 ffc9
+002094 0fd0
+002095 a8a9      .DB 243,220,32,19,209,144,3,76,40,207,201,255,208,15,169,168
+002096 cea0
+002097 a220
+002098 4cdb
+002099 0073
+00209a 4982
+00209b da0f
+00209c c9a1
+00209d f02e      .DB 160,206,32,162,219,76,115,0,130,73,15,218,161,201,46,240
+00209e c9de
+00209f f0ab
+0020a0 c958
+0020a1 f0aa
+0020a2 c9d1
+0020a3 d022
+0020a4 a50f
+0020a5 a47a      .DB 222,201,171,240,88,201,170,240,209,201,34,208,15,165,122,164
+0020a6 697b
+0020a7 9000
+0020a8 c801
+0020a9 8720
+0020aa 4cd4
+0020ab d7e2
+0020ac a8c9
+0020ad 13d0      .DB 123,105,0,144,1,200,32,135,212,76,226,215,201,168,208,19
+0020ae 18a0
+0020af 3bd0
+0020b0 bf20
+0020b1 a5d1
+0020b2 4965
+0020b3 a8ff
+0020b4 64a5
+0020b5 ff49      .DB 160,24,208,59,32,191,209,165,101,73,255,168,165,100,73,255
+0020b6 914c
+0020b7 c9d3
+0020b8 d0a5
+0020b9 4c03
+0020ba d3f4
+0020bb b4c9
+0020bc 0390
+0020bd a74c      .DB 76,145,211,201,165,208,3,76,244,211,201,180,144,3,76,167
+0020be 20cf
+0020bf cefa
+0020c0 9e20
+0020c1 a9cd
+0020c2 2c29
+0020c3 28a9
+0020c4 a92c
+0020c5 a02c      .DB 207,32,250,206,32,158,205,169,41,44,169,40,44,169,44,160
+0020c6 d100
+0020c7 d07a
+0020c8 4c03
+0020c9 0073
+0020ca 0ba2
+0020cb 374c
+0020cc a0c4
+0020cd 6815      .DB 0,209,122,208,3,76,115,0,162,11,76,55,196,160,21,104
+0020ce 4c68
+0020cf cdfa
+0020d0 a538
+0020d1 e964
+0020d2 a500
+0020d3 e965
+0020d4 90c0
+0020d5 a908      .DB 104,76,250,205,56,165,100,233,0,165,101,233,192,144,8,169
+0020d6 e587
+0020d7 a964
+0020d8 e5e3
+0020d9 6065
+0020da 8b20
+0020db 85d0
+0020dc 8464
+0020dd a665      .DB 135,229,100,169,227,229,101,96,32,139,208,133,100,132,101,166
+0020de a445
+0020df a546
+0020e0 f00d
+0020e1 a926
+0020e2 8500
+0020e3 2070
+0020e4 cf14
+0020e5 1c90      .DB 69,164,70,165,13,240,38,169,0,133,112,32,20,207,144,28
+0020e6 54e0
+0020e7 18d0
+0020e8 c9c0
+0020e9 14d0
+0020ea 8420
+0020eb 84cf
+0020ec 885e
+0020ed 7184      .DB 224,84,208,24,192,201,208,20,32,132,207,132,94,136,132,113
+0020ee 06a0
+0020ef 5d84
+0020f0 24a0
+0020f1 6820
+0020f2 4cde
+0020f3 d46f
+0020f4 2460
+0020f5 100e      .DB 160,6,132,93,160,36,32,104,222,76,111,212,96,36,14,16
+0020f6 a00d
+0020f7 b100
+0020f8 aa64
+0020f9 b1c8
+0020fa a864
+0020fb 4c8a
+0020fc d391
+0020fd 1420      .DB 13,160,0,177,100,170,200,177,100,168,138,76,145,211,32,20
+0020fe 90cf
+0020ff e02d
+002100 d054
+002101 c01b
+002102 d049
+002103 2025
+002104 cf84
+002105 a298      .DB 207,144,45,224,84,208,27,192,73,208,37,32,132,207,152,162
+002106 4ca0
+002107 dc4f
+002108 de20
+002109 86ff
+00210a 8464
+00210b 8563
+00210c a065
+00210d 8400      .DB 160,76,79,220,32,222,255,134,100,132,99,133,101,160,0,132
+00210e 6062
+00210f 53e0
+002110 0ad0
+002111 54c0
+002112 06d0
+002113 b720
+002114 4cff
+002115 dc3c      .DB 98,96,224,83,208,10,192,84,208,6,32,183,255,76,60,220
+002116 64a5
+002117 65a4
+002118 a24c
+002119 0adb
+00211a aa48
+00211b 7320
+00211c e000
+00211d 908f      .DB 165,100,164,101,76,162,219,10,72,170,32,115,0,224,143,144
+00211e 2020
+00211f cefa
+002120 9e20
+002121 20cd
+002122 cefd
+002123 8f20
+002124 68cd
+002125 a5aa      .DB 32,32,250,206,32,158,205,32,253,206,32,143,205,104,170,165
+002126 4865
+002127 64a5
+002128 8a48
+002129 2048
+00212a d79e
+00212b a868
+00212c 488a
+00212d d64c      .DB 101,72,165,100,72,138,72,32,158,215,104,168,138,72,76,214
+00212e 20cf
+00212f cef1
+002130 a868
+002131 eab9
+002132 85bf
+002133 b955
+002134 bfeb
+002135 5685      .DB 207,32,241,206,104,168,185,234,191,133,85,185,235,191,133,86
+002136 5420
+002137 4c00
+002138 cd8d
+002139 ffa0
+00213a a02c
+00213b 8400
+00213c 200b
+00213d d1bf      .DB 32,84,0,76,141,205,160,255,44,160,0,132,11,32,191,209
+00213e 64a5
+00213f 0b45
+002140 0785
+002141 65a5
+002142 0b45
+002143 0885
+002144 fc20
+002145 20db      .DB 165,100,69,11,133,7,165,101,69,11,133,8,32,252,219,32
+002146 d1bf
+002147 65a5
+002148 0b45
+002149 0825
+00214a 0b45
+00214b a5a8
+00214c 4564
+00214d 250b      .DB 191,209,165,101,69,11,37,8,69,11,168,165,100,69,11,37
+00214e 4507
+00214f 4c0b
+002150 d391
+002151 9020
+002152 b0cd
+002153 a513
+002154 096e
+002155 257f      .DB 7,69,11,76,145,211,32,144,205,176,19,165,110,9,127,37
+002156 856a
+002157 a96a
+002158 a069
+002159 2000
+00215a dc5b
+00215b 4caa
+00215c d061
+00215d 00a9      .DB 106,133,106,169,105,160,0,32,91,220,170,76,97,208,169,0
+00215e 0d85
+00215f 4dc6
+002160 a620
+002161 85d6
+002162 8661
+002163 8462
+002164 a563
+002165 a46c      .DB 133,13,198,77,32,166,214,133,97,134,98,132,99,165,108,164
+002166 206d
+002167 d6aa
+002168 6c86
+002169 6d84
+00216a 38aa
+00216b 61e5
+00216c 08f0
+00216d 01a9      .DB 109,32,170,214,134,108,132,109,170,56,229,97,240,8,169,1
+00216e 0490
+00216f 61a6
+002170 ffa9
+002171 6685
+002172 ffa0
+002173 c8e8
+002174 d0ca
+002175 a607      .DB 144,4,166,97,169,255,133,102,160,255,232,200,202,208,7,166
+002176 3066
+002177 180f
+002178 0c90
+002179 6cb1
+00217a 62d1
+00217b eff0
+00217c ffa2
+00217d 02b0      .DB 102,48,15,24,144,12,177,108,209,98,240,239,162,255,176,2
+00217e 01a2
+00217f 8ae8
+002180 252a
+002181 f012
+002182 a902
+002183 4cff
+002184 dc3c
+002185 fd20      .DB 162,1,232,138,42,37,18,240,2,169,255,76,60,220,32,253
+002186 aace
+002187 9020
+002188 20d0
+002189 0079
+00218a f4d0
+00218b a260
+00218c 2000
+00218d 0079      .DB 206,170,32,144,208,32,121,0,208,244,96,162,0,32,121,0
+00218e 0c86
+00218f 4585
+002190 7920
+002191 2000
+002192 d113
+002193 03b0
+002194 084c
+002195 a2cf      .DB 134,12,133,69,32,121,0,32,19,209,176,3,76,8,207,162
+002196 8600
+002197 860d
+002198 200e
+002199 0073
+00219a 0590
+00219b 1320
+00219c 90d1
+00219d aa0b      .DB 0,134,13,134,14,32,115,0,144,5,32,19,209,144,11,170
+00219e 7320
+00219f 9000
+0021a0 20fb
+0021a1 d113
+0021a2 f6b0
+0021a3 24c9
+0021a4 06d0
+0021a5 ffa9      .DB 32,115,0,144,251,32,19,209,176,246,201,36,208,6,169,255
+0021a6 0d85
+0021a7 10d0
+0021a8 25c9
+0021a9 13d0
+0021aa 10a5
+0021ab d0d0
+0021ac 80a9
+0021ad 0e85      .DB 133,13,208,16,201,37,208,19,165,16,208,208,169,128,133,14
+0021ae 4505
+0021af 4585
+0021b0 098a
+0021b1 aa80
+0021b2 7320
+0021b3 8600
+0021b4 3846
+0021b5 1005      .DB 5,69,133,69,138,9,128,170,32,115,0,134,70,56,5,16
+0021b6 28e9
+0021b7 03d0
+0021b8 d14c
+0021b9 a0d1
+0021ba 8400
+0021bb a510
+0021bc a62d
+0021bd 862e      .DB 233,40,208,3,76,209,209,160,0,132,16,165,45,166,46,134
+0021be 8560
+0021bf e45f
+0021c0 d030
+0021c1 c504
+0021c2 f02f
+0021c3 a522
+0021c4 d145
+0021c5 d05f      .DB 96,133,95,228,48,208,4,197,47,240,34,165,69,209,95,208
+0021c6 a508
+0021c7 c846
+0021c8 5fd1
+0021c9 7df0
+0021ca 1888
+0021cb 5fa5
+0021cc 0769
+0021cd e190      .DB 8,165,70,200,209,95,240,125,136,24,165,95,105,7,144,225
+0021ce d0e8
+0021cf c9dc
+0021d0 9041
+0021d1 e905
+0021d2 385b
+0021d3 a5e9
+0021d4 6860
+0021d5 c948      .DB 232,208,220,201,65,144,5,233,91,56,233,165,96,104,72,201
+0021d6 d02a
+0021d7 a905
+0021d8 a013
+0021d9 60df
+0021da 45a5
+0021db 46a4
+0021dc 54c9
+0021dd 0bd0      .DB 42,208,5,169,19,160,223,96,165,69,164,70,201,84,208,11
+0021de c9c0
+0021df eff0
+0021e0 49c0
+0021e1 03d0
+0021e2 084c
+0021e3 c9cf
+0021e4 d053
+0021e5 c004      .DB 192,201,240,239,192,73,208,3,76,8,207,201,83,208,4,192
+0021e6 f054
+0021e7 a5f5
+0021e8 a42f
+0021e9 8530
+0021ea 845f
+0021eb a560
+0021ec a431
+0021ed 8532      .DB 84,240,245,165,47,164,48,133,95,132,96,165,49,164,50,133
+0021ee 845a
+0021ef 185b
+0021f0 0769
+0021f1 0190
+0021f2 85c8
+0021f3 8458
+0021f4 2059
+0021f5 c3b8      .DB 90,132,91,24,105,7,144,1,200,133,88,132,89,32,184,195
+0021f6 58a5
+0021f7 59a4
+0021f8 85c8
+0021f9 842f
+0021fa a030
+0021fb a500
+0021fc 9145
+0021fd c85f      .DB 165,88,164,89,200,133,47,132,48,160,0,165,69,145,95,200
+0021fe 46a5
+0021ff 5f91
+002200 00a9
+002201 91c8
+002202 c85f
+002203 5f91
+002204 91c8
+002205 c85f      .DB 165,70,145,95,169,0,200,145,95,200,145,95,200,145,95,200
+002206 5f91
+002207 91c8
+002208 a55f
+002209 185f
+00220a 0269
+00220b 60a4
+00220c 0190
+00220d 85c8      .DB 145,95,200,145,95,165,95,24,105,2,164,96,144,1,200,133
+00220e 8447
+00220f 6048
+002210 0ba5
+002211 690a
+002212 6505
+002213 a45f
+002214 9060
+002215 c801      .DB 71,132,72,96,165,11,10,105,5,101,95,164,96,144,1,200
+002216 5885
+002217 5984
+002218 9060
+002219 0080
+00221a 0000
+00221b bf20
+00221c a5d1
+00221d a464      .DB 133,88,132,89,96,144,128,0,0,0,32,191,209,165,100,164
+00221e 6065
+00221f 7320
+002220 2000
+002221 cd9e
+002222 8d20
+002223 a5cd
+002224 3066
+002225 a50d      .DB 101,96,32,115,0,32,158,205,32,141,205,165,102,48,13,165
+002226 c961
+002227 9090
+002228 a909
+002229 a0a5
+00222a 20d1
+00222b dc5b
+00222c 7ad0
+00222d 9b4c      .DB 97,201,144,144,9,169,165,160,209,32,91,220,208,122,76,155
+00222e a5dc
+00222f 050c
+002230 480e
+002231 0da5
+002232 a048
+002233 9800
+002234 a548
+002235 4846      .DB 220,165,12,5,14,72,165,13,72,160,0,152,72,165,70,72
+002236 45a5
+002237 2048
+002238 d1b2
+002239 8568
+00223a 6845
+00223b 4685
+00223c a868
+00223d bdba      .DB 165,69,72,32,178,209,104,133,69,104,133,70,104,168,186,189
+00223e 0102
+00223f bd48
+002240 0101
+002241 a548
+002242 9d64
+002243 0102
+002244 65a5
+002245 019d      .DB 2,1,72,189,1,1,72,165,100,157,2,1,165,101,157,1
+002246 c801
+002247 7920
+002248 c900
+002249 f02c
+00224a 84d2
+00224b 200b
+00224c cef7
+00224d 8568      .DB 1,200,32,121,0,201,44,240,210,132,11,32,247,206,104,133
+00224e 680d
+00224f 0e85
+002250 7f29
+002251 0c85
+002252 2fa6
+002253 30a5
+002254 5f86
+002255 6085      .DB 13,104,133,14,41,127,133,12,166,47,165,48,134,95,133,96
+002256 32c5
+002257 04d0
+002258 31e4
+002259 39f0
+00225a 00a0
+00225b 5fb1
+00225c c5c8
+00225d d045      .DB 197,50,208,4,228,49,240,57,160,0,177,95,200,197,69,208
+00225e a506
+00225f d146
+002260 f05f
+002261 c816
+002262 5fb1
+002263 6518
+002264 aa5f
+002265 b1c8      .DB 6,165,70,209,95,240,22,200,177,95,24,101,95,170,200,177
+002266 655f
+002267 9060
+002268 a2d7
+002269 2c12
+00226a 0ea2
+00226b 374c
+00226c a2c4
+00226d a513      .DB 95,101,96,144,215,162,18,44,162,14,76,55,196,162,19,165
+00226e d00c
+00226f 20f7
+002270 d194
+002271 0ba5
+002272 04a0
+002273 5fd1
+002274 e7d0
+002275 ea4c      .DB 12,208,247,32,148,209,165,11,160,4,209,95,208,231,76,234
+002276 20d2
+002277 d194
+002278 0820
+002279 a0c4
+00227a 8400
+00227b a272
+00227c a505
+00227d 9145      .DB 210,32,148,209,32,8,196,160,0,132,114,162,5,165,69,145
+00227e 105f
+00227f ca01
+002280 a5c8
+002281 9146
+002282 105f
+002283 ca02
+002284 86ca
+002285 a571      .DB 95,16,1,202,200,165,70,145,95,16,2,202,202,134,113,165
+002286 c80b
+002287 c8c8
+002288 5f91
+002289 0ba2
+00228a 00a9
+00228b 0c24
+00228c 0850
+00228d 1868      .DB 11,200,200,200,145,95,162,11,169,0,36,12,80,8,104,24
+00228e 0169
+00228f 68aa
+002290 0069
+002291 91c8
+002292 c85f
+002293 918a
+002294 205f
+002295 d34c      .DB 105,1,170,104,105,0,200,145,95,200,138,145,95,32,76,211
+002296 7186
+002297 7285
+002298 22a4
+002299 0bc6
+00229a dcd0
+00229b 5965
+00229c 5db0
+00229d 5985      .DB 134,113,133,114,164,34,198,11,208,220,101,89,176,93,133,89
+00229e 8aa8
+00229f 5865
+0022a0 0390
+0022a1 f0c8
+0022a2 2052
+0022a3 c408
+0022a4 3185
+0022a5 3284      .DB 168,138,101,88,144,3,200,240,82,32,8,196,133,49,132,50
+0022a6 00a9
+0022a7 72e6
+0022a8 71a4
+0022a9 05f0
+0022aa 9188
+0022ab d058
+0022ac c6fb
+0022ad c659      .DB 169,0,230,114,164,113,240,5,136,145,88,208,251,198,89,198
+0022ae d072
+0022af e6f5
+0022b0 3859
+0022b1 31a5
+0022b2 5fe5
+0022b3 02a0
+0022b4 5f91
+0022b5 32a5      .DB 114,208,245,230,89,56,165,49,229,95,160,2,145,95,165,50
+0022b6 e5c8
+0022b7 9160
+0022b8 a55f
+0022b9 d00c
+0022ba c862
+0022bb 5fb1
+0022bc 0b85
+0022bd 00a9      .DB 200,229,96,145,95,165,12,208,98,200,177,95,133,11,169,0
+0022be 7185
+0022bf 7285
+0022c0 68c8
+0022c1 85aa
+0022c2 6864
+0022c3 6585
+0022c4 5fd1
+0022c5 0e90      .DB 133,113,133,114,200,104,170,133,100,104,133,101,209,95,144,14
+0022c6 06d0
+0022c7 8ac8
+0022c8 5fd1
+0022c9 0790
+0022ca 454c
+0022cb 4cd2
+0022cc c435
+0022cd a5c8      .DB 208,6,200,138,209,95,144,7,76,69,210,76,53,196,200,165
+0022ce 0572
+0022cf 1871
+0022d0 0af0
+0022d1 4c20
+0022d2 8ad3
+0022d3 6465
+0022d4 98aa
+0022d5 22a4      .DB 114,5,113,24,240,10,32,76,211,138,101,100,170,152,164,34
+0022d6 6565
+0022d7 7186
+0022d8 0bc6
+0022d9 cad0
+0022da 7285
+0022db 05a2
+0022dc 45a5
+0022dd 0110      .DB 101,101,134,113,198,11,208,202,133,114,162,5,165,69,16,1
+0022de a5ca
+0022df 1046
+0022e0 ca02
+0022e1 86ca
+0022e2 a928
+0022e3 2000
+0022e4 d355
+0022e5 658a      .DB 202,165,70,16,2,202,202,134,40,169,0,32,85,211,138,101
+0022e6 8558
+0022e7 9847
+0022e8 5965
+0022e9 4885
+0022ea a5a8
+0022eb 6047
+0022ec 2284
+0022ed 5fb1      .DB 88,133,71,152,101,89,133,72,168,165,71,96,132,34,177,95
+0022ee 2885
+0022ef b188
+0022f0 855f
+0022f1 a929
+0022f2 8510
+0022f3 a25d
+0022f4 a000
+0022f5 8a00      .DB 133,40,136,177,95,133,41,169,16,133,93,162,0,160,0,138
+0022f6 aa0a
+0022f7 2a98
+0022f8 b0a8
+0022f9 06a4
+0022fa 2671
+0022fb 9072
+0022fc 180b
+0022fd 658a      .DB 10,170,152,42,168,176,164,6,113,38,114,144,11,24,138,101
+0022fe aa28
+0022ff 6598
+002300 a829
+002301 93b0
+002302 5dc6
+002303 e3d0
+002304 a560
+002305 f00d      .DB 40,170,152,101,41,168,176,147,198,93,208,227,96,165,13,240
+002306 2003
+002307 d6a6
+002308 2620
+002309 38d5
+00230a 33a5
+00230b 31e5
+00230c a5a8
+00230d e534      .DB 3,32,166,214,32,38,213,56,165,51,229,49,168,165,52,229
+00230e a232
+00230f 8600
+002310 850d
+002311 8462
+002312 a263
+002313 4c90
+002314 dc44
+002315 2038      .DB 50,162,0,134,13,133,98,132,99,162,144,76,68,220,56,32
+002316 fff0
+002317 00a9
+002318 ebf0
+002319 3aa6
+00231a d0e8
+00231b a2a0
+00231c 2c15
+00231d 1ba2      .DB 240,255,169,0,240,235,166,58,232,208,160,162,21,44,162,27
+00231e 374c
+00231f 20c4
+002320 d3e1
+002321 a620
+002322 20d3
+002323 cefa
+002324 80a9
+002325 1085      .DB 76,55,196,32,225,211,32,166,211,32,250,206,169,128,133,16
+002326 8b20
+002327 20d0
+002328 cd8d
+002329 f720
+00232a a9ce
+00232b 20b2
+00232c ceff
+00232d a548      .DB 32,139,208,32,141,205,32,247,206,169,178,32,255,206,72,165
+00232e 4848
+00232f 47a5
+002330 a548
+002331 487b
+002332 7aa5
+002333 2048
+002334 c8f8
+002335 4f4c      .DB 72,72,165,71,72,165,123,72,165,122,72,32,248,200,76,79
+002336 a9d4
+002337 20a5
+002338 ceff
+002339 8009
+00233a 1085
+00233b 9220
+00233c 85d0
+00233d 844e      .DB 212,169,165,32,255,206,9,128,133,16,32,146,208,133,78,132
+00233e 4c4f
+00233f cd8d
+002340 e120
+002341 a5d3
+002342 484f
+002343 4ea5
+002344 2048
+002345 cef1      .DB 79,76,141,205,32,225,211,165,79,72,165,78,72,32,241,206
+002346 8d20
+002347 68cd
+002348 4e85
+002349 8568
+00234a a04f
+00234b b102
+00234c 854e
+00234d aa47      .DB 32,141,205,104,133,78,104,133,79,160,2,177,78,133,71,170
+00234e b1c8
+00234f f04e
+002350 8599
+002351 c848
+002352 47b1
+002353 8848
+002354 fa10
+002355 48a4      .DB 200,177,78,240,153,133,72,200,177,71,72,136,16,250,164,72
+002356 d420
+002357 a5db
+002358 487b
+002359 7aa5
+00235a b148
+00235b 854e
+00235c c87a
+00235d 4eb1      .DB 32,212,219,165,123,72,165,122,72,177,78,133,122,200,177,78
+00235e 7b85
+00235f 48a5
+002360 a548
+002361 4847
+002362 8a20
+002363 68cd
+002364 4e85
+002365 8568      .DB 133,123,165,72,72,165,71,72,32,138,205,104,133,78,104,133
+002366 204f
+002367 0079
+002368 03f0
+002369 084c
+00236a 68cf
+00236b 7a85
+00236c 8568
+00236d a07b      .DB 79,32,121,0,240,3,76,8,207,104,133,122,104,133,123,160
+00236e 6800
+00236f 4e91
+002370 c868
+002371 4e91
+002372 c868
+002373 4e91
+002374 c868
+002375 4e91      .DB 0,104,145,78,104,200,145,78,104,200,145,78,104,200,145,78
+002376 c868
+002377 4e91
+002378 2060
+002379 cd8d
+00237a 00a0
+00237b df20
+00237c 68dd
+00237d a968      .DB 104,200,145,78,96,32,141,205,160,0,32,223,221,104,104,169
+00237e a0ff
+00237f f000
+002380 a612
+002381 a464
+002382 8665
+002383 8450
+002384 2051
+002385 d4f4      .DB 255,160,0,240,18,166,100,164,101,134,80,132,81,32,244,212
+002386 6286
+002387 6384
+002388 6185
+002389 a260
+00238a 8622
+00238b 8607
+00238c 8508
+00238d 846f      .DB 134,98,132,99,133,97,96,162,34,134,7,134,8,133,111,132
+00238e 8570
+00238f 8462
+002390 a063
+002391 c8ff
+002392 6fb1
+002393 0cf0
+002394 07c5
+002395 04f0      .DB 112,133,98,132,99,160,255,200,177,111,240,12,197,7,240,4
+002396 08c5
+002397 f3d0
+002398 22c9
+002399 01f0
+00239a 8418
+00239b 9861
+00239c 6f65
+00239d 7185      .DB 197,8,208,243,201,34,240,1,24,132,97,152,101,111,133,113
+00239e 70a6
+00239f 0190
+0023a0 86e8
+0023a1 a572
+0023a2 f070
+0023a3 c904
+0023a4 d002
+0023a5 980b      .DB 166,112,144,1,232,134,114,165,112,240,4,201,2,208,11,152
+0023a6 7520
+0023a7 a6d4
+0023a8 a46f
+0023a9 2070
+0023aa d688
+0023ab 16a6
+0023ac 22e0
+0023ad 05d0      .DB 32,117,212,166,111,164,112,32,136,214,166,22,224,34,208,5
+0023ae 19a2
+0023af 374c
+0023b0 a5c4
+0023b1 9561
+0023b2 a500
+0023b3 9562
+0023b4 a501
+0023b5 9563      .DB 162,25,76,55,196,165,97,149,0,165,98,149,1,165,99,149
+0023b6 a002
+0023b7 8600
+0023b8 8464
+0023b9 8465
+0023ba 8870
+0023bb 0d84
+0023bc 1786
+0023bd e8e8      .DB 2,160,0,134,100,132,101,132,112,136,132,13,134,23,232,232
+0023be 86e8
+0023bf 6016
+0023c0 0f46
+0023c1 4948
+0023c2 38ff
+0023c3 3365
+0023c4 34a4
+0023c5 01b0      .DB 232,134,22,96,70,15,72,73,255,56,101,51,164,52,176,1
+0023c6 c488
+0023c7 9032
+0023c8 d011
+0023c9 c504
+0023ca 9031
+0023cb 850b
+0023cc 8433
+0023cd 8534      .DB 136,196,50,144,17,208,4,197,49,144,11,133,51,132,52,133
+0023ce 8435
+0023cf aa36
+0023d0 6068
+0023d1 10a2
+0023d2 0fa5
+0023d3 b630
+0023d4 2620
+0023d5 a9d5      .DB 53,132,54,170,104,96,162,16,165,15,48,182,32,38,213,169
+0023d6 8580
+0023d7 680f
+0023d8 d0d0
+0023d9 37a6
+0023da 38a5
+0023db 3386
+0023dc 3485
+0023dd 00a0      .DB 128,133,15,104,208,208,166,55,165,56,134,51,133,52,160,0
+0023de 4f84
+0023df 4e84
+0023e0 31a5
+0023e1 32a6
+0023e2 5f85
+0023e3 6086
+0023e4 19a9
+0023e5 00a2      .DB 132,79,132,78,165,49,166,50,133,95,134,96,169,25,162,0
+0023e6 2285
+0023e7 2386
+0023e8 16c5
+0023e9 05f0
+0023ea c720
+0023eb f0d5
+0023ec a9f7
+0023ed 8507      .DB 133,34,134,35,197,22,240,5,32,199,213,240,247,169,7,133
+0023ee a553
+0023ef a62d
+0023f0 852e
+0023f1 8622
+0023f2 e423
+0023f3 d030
+0023f4 c504
+0023f5 f02f      .DB 83,165,45,166,46,133,34,134,35,228,48,208,4,197,47,240
+0023f6 2005
+0023f7 d5bd
+0023f8 f3f0
+0023f9 5885
+0023fa 5986
+0023fb 03a9
+0023fc 5385
+0023fd 58a5      .DB 5,32,189,213,240,243,133,88,134,89,169,3,133,83,165,88
+0023fe 59a6
+0023ff 32e4
+002400 07d0
+002401 31c5
+002402 03d0
+002403 064c
+002404 85d6
+002405 8622      .DB 166,89,228,50,208,7,197,49,208,3,76,6,214,133,34,134
+002406 a023
+002407 b100
+002408 aa22
+002409 b1c8
+00240a 0822
+00240b b1c8
+00240c 6522
+00240d 8558      .DB 35,160,0,177,34,170,200,177,34,8,200,177,34,101,88,133
+00240e c858
+00240f 22b1
+002410 5965
+002411 5985
+002412 1028
+002413 8ad3
+002414 d030
+002415 b1c8      .DB 88,200,177,34,101,89,133,89,40,16,211,138,48,208,200,177
+002416 a022
+002417 0a00
+002418 0569
+002419 2265
+00241a 2285
+00241b 0290
+00241c 23e6
+00241d 23a6      .DB 34,160,0,10,105,5,101,34,133,34,144,2,230,35,166,35
+00241e 59e4
+00241f 04d0
+002420 58c5
+002421 baf0
+002422 c720
+002423 f0d5
+002424 b1f3
+002425 3022      .DB 228,89,208,4,197,88,240,186,32,199,213,240,243,177,34,48
+002426 c835
+002427 22b1
+002428 3010
+002429 b1c8
+00242a f022
+00242b c82b
+00242c 22b1
+00242d c8aa      .DB 53,200,177,34,16,48,200,177,34,240,43,200,177,34,170,200
+00242e 22b1
+00242f 34c5
+002430 0690
+002431 1ed0
+002432 33e4
+002433 1ab0
+002434 60c5
+002435 1690      .DB 177,34,197,52,144,6,208,30,228,51,176,26,197,96,144,22
+002436 04d0
+002437 5fe4
+002438 1090
+002439 5f86
+00243a 6085
+00243b 22a5
+00243c 23a6
+00243d 4e85      .DB 208,4,228,95,144,16,134,95,133,96,165,34,166,35,133,78
+00243e 4f86
+00243f 53a5
+002440 5585
+002441 53a5
+002442 6518
+002443 8522
+002444 9022
+002445 e602      .DB 134,79,165,83,133,85,165,83,24,101,34,133,34,144,2,230
+002446 a623
+002447 a023
+002448 6000
+002449 4fa5
+00244a 4e05
+00244b f5f0
+00244c 55a5
+00244d 0429      .DB 35,166,35,160,0,96,165,79,5,78,240,245,165,85,41,4
+00244e a84a
+00244f 5585
+002450 4eb1
+002451 5f65
+002452 5a85
+002453 60a5
+002454 0069
+002455 5b85      .DB 74,168,133,85,177,78,101,95,133,90,165,96,105,0,133,91
+002456 33a5
+002457 34a6
+002458 5885
+002459 5986
+00245a bf20
+00245b a4c3
+00245c c855
+00245d 58a5      .DB 165,51,166,52,133,88,134,89,32,191,195,164,85,200,165,88
+00245e 4e91
+00245f e6aa
+002460 a559
+002461 c859
+002462 4e91
+002463 2a4c
+002464 a5d5
+002465 4865      .DB 145,78,170,230,89,165,89,200,145,78,76,42,213,165,101,72
+002466 64a5
+002467 2048
+002468 ce83
+002469 8f20
+00246a 68cd
+00246b 6f85
+00246c 8568
+00246d a070      .DB 165,100,72,32,131,206,32,143,205,104,133,111,104,133,112,160
+00246e b100
+00246f 186f
+002470 6471
+002471 0590
+002472 17a2
+002473 374c
+002474 20c4
+002475 d475      .DB 0,177,111,24,113,100,144,5,162,23,76,55,196,32,117,212
+002476 7a20
+002477 a5d6
+002478 a450
+002479 2051
+00247a d6aa
+00247b 8c20
+00247c a5d6
+00247d a46f      .DB 32,122,214,165,80,164,81,32,170,214,32,140,214,165,111,164
+00247e 2070
+00247f d6aa
+002480 ca20
+002481 4cd4
+002482 cdb8
+002483 00a0
+002484 6fb1
+002485 c848      .DB 112,32,170,214,32,202,212,76,184,205,160,0,177,111,72,200
+002486 6fb1
+002487 c8aa
+002488 6fb1
+002489 68a8
+00248a 2286
+00248b 2384
+00248c f0a8
+00248d 480a      .DB 177,111,170,200,177,111,168,104,134,34,132,35,168,240,10,72
+00248e b188
+00248f 9122
+002490 9835
+002491 f8d0
+002492 1868
+002493 3565
+002494 3585
+002495 0290      .DB 136,177,34,145,53,152,208,248,104,24,101,53,133,53,144,2
+002496 36e6
+002497 2060
+002498 cd8f
+002499 64a5
+00249a 65a4
+00249b 2285
+00249c 2384
+00249d db20      .DB 230,54,96,32,143,205,165,100,164,101,133,34,132,35,32,219
+00249e 08d6
+00249f 00a0
+0024a0 22b1
+0024a1 c848
+0024a2 22b1
+0024a3 c8aa
+0024a4 22b1
+0024a5 68a8      .DB 214,8,160,0,177,34,72,200,177,34,170,200,177,34,168,104
+0024a6 d028
+0024a7 c413
+0024a8 d034
+0024a9 e40f
+0024aa d033
+0024ab 480b
+0024ac 6518
+0024ad 8533      .DB 40,208,19,196,52,208,15,228,51,208,11,72,24,101,51,133
+0024ae 9033
+0024af e602
+0024b0 6834
+0024b1 2286
+0024b2 2384
+0024b3 c460
+0024b4 d018
+0024b5 c50c      .DB 51,144,2,230,52,104,134,34,132,35,96,196,24,208,12,197
+0024b6 d017
+0024b7 8508
+0024b8 e916
+0024b9 8503
+0024ba a017
+0024bb 6000
+0024bc a120
+0024bd 8ad7      .DB 23,208,8,133,22,233,3,133,23,160,0,96,32,161,215,138
+0024be a948
+0024bf 2001
+0024c0 d47d
+0024c1 a068
+0024c2 9100
+0024c3 6862
+0024c4 4c68
+0024c5 d4ca      .DB 72,169,1,32,125,212,104,160,0,145,98,104,104,76,202,212
+0024c6 6120
+0024c7 d1d7
+0024c8 9850
+0024c9 0490
+0024ca 50b1
+0024cb 98aa
+0024cc 8a48
+0024cd 2048      .DB 32,97,215,209,80,152,144,4,177,80,170,152,72,138,72,32
+0024ce d47d
+0024cf 50a5
+0024d0 51a4
+0024d1 aa20
+0024d2 68d6
+0024d3 68a8
+0024d4 6518
+0024d5 8522      .DB 125,212,165,80,164,81,32,170,214,104,168,104,24,101,34,133
+0024d6 9022
+0024d7 e602
+0024d8 9823
+0024d9 8c20
+0024da 4cd6
+0024db d4ca
+0024dc 6120
+0024dd 18d7      .DB 34,144,2,230,35,152,32,140,214,76,202,212,32,97,215,24
+0024de 50f1
+0024df ff49
+0024e0 064c
+0024e1 a9d7
+0024e2 85ff
+0024e3 2065
+0024e4 0079
+0024e5 29c9      .DB 241,80,73,255,76,6,215,169,255,133,101,32,121,0,201,41
+0024e6 06f0
+0024e7 fd20
+0024e8 20ce
+0024e9 d79e
+0024ea 6120
+0024eb f0d7
+0024ec ca4b
+0024ed 488a      .DB 240,6,32,253,206,32,158,215,32,97,215,240,75,202,138,72
+0024ee a218
+0024ef f100
+0024f0 b050
+0024f1 49b6
+0024f2 c5ff
+0024f3 9065
+0024f4 a5b1
+0024f5 b065      .DB 24,162,0,241,80,176,182,73,255,197,101,144,177,165,101,176
+0024f6 20ad
+0024f7 cef7
+0024f8 a868
+0024f9 8568
+0024fa 6855
+0024fb 6868
+0024fc 68aa
+0024fd 5085      .DB 173,32,247,206,104,168,104,133,85,104,104,104,170,104,133,80
+0024fe 8568
+0024ff a551
+002500 4855
+002501 4898
+002502 00a0
+002503 608a
+002504 8220
+002505 4cd7      .DB 104,133,81,165,85,72,152,72,160,0,138,96,32,130,215,76
+002506 d3a2
+002507 a320
+002508 a2d6
+002509 8600
+00250a a80d
+00250b 2060
+00250c d782
+00250d 08f0      .DB 162,211,32,163,214,162,0,134,13,168,96,32,130,215,240,8
+00250e 00a0
+00250f 22b1
+002510 4ca8
+002511 d3a2
+002512 484c
+002513 20d2
+002514 0073
+002515 8a20      .DB 160,0,177,34,168,76,162,211,76,72,210,32,115,0,32,138
+002516 20cd
+002517 d1b8
+002518 64a6
+002519 f0d0
+00251a 65a6
+00251b 794c
+00251c 2000
+00251d d782      .DB 205,32,184,209,166,100,208,240,166,101,76,121,0,32,130,215
+00251e 03d0
+00251f f74c
+002520 a6d8
+002521 a47a
+002522 867b
+002523 8471
+002524 a672
+002525 8622      .DB 208,3,76,247,216,166,122,164,123,134,113,132,114,166,34,134
+002526 187a
+002527 2265
+002528 2485
+002529 23a6
+00252a 7b86
+00252b 0190
+00252c 86e8
+00252d a025      .DB 122,24,101,34,133,36,166,35,134,123,144,1,232,134,37,160
+00252e b100
+00252f 4824
+002530 9198
+002531 2024
+002532 0079
+002533 f320
+002534 68dc
+002535 00a0      .DB 0,177,36,72,152,145,36,32,121,0,32,243,220,104,160,0
+002536 2491
+002537 71a6
+002538 72a4
+002539 7a86
+00253a 7b84
+00253b 2060
+00253c cd8a
+00253d f720      .DB 145,36,166,113,164,114,134,122,132,123,96,32,138,205,32,247
+00253e 20d7
+00253f cefd
+002540 9e4c
+002541 a5d7
+002542 3066
+002543 a59d
+002544 c961
+002545 b091      .DB 215,32,253,206,76,158,215,165,102,48,157,165,97,201,145,176
+002546 2097
+002547 dc9b
+002548 64a5
+002549 65a4
+00254a 1484
+00254b 1585
+00254c a560
+00254d 4815      .DB 151,32,155,220,165,100,164,101,132,20,133,21,96,165,21,72
+00254e 14a5
+00254f 2048
+002550 d7f7
+002551 00a0
+002552 14b1
+002553 68a8
+002554 1485
+002555 8568      .DB 165,20,72,32,247,215,160,0,177,20,168,104,133,20,104,133
+002556 4c15
+002557 d3a2
+002558 eb20
+002559 8ad7
+00255a 00a0
+00255b 1491
+00255c 2060
+00255d d7eb      .DB 21,76,162,211,32,235,215,138,160,0,145,20,96,32,235,215
+00255e 4986
+00255f 00a2
+002560 7920
+002561 f000
+002562 2003
+002563 d7f1
+002564 4a86
+002565 00a0      .DB 134,73,162,0,32,121,0,240,3,32,241,215,134,74,160,0
+002566 14b1
+002567 4a45
+002568 4925
+002569 f8f0
+00256a a960
+00256b a011
+00256c 4cdf
+00256d d867      .DB 177,20,69,74,37,73,240,248,96,169,17,160,223,76,103,216
+00256e 8c20
+00256f a5da
+002570 4966
+002571 85ff
+002572 4566
+002573 856e
+002574 a56f
+002575 4c61      .DB 32,140,218,165,102,73,255,133,102,69,110,133,111,165,97,76
+002576 d86a
+002577 9920
+002578 90d9
+002579 203c
+00257a da8c
+00257b 03d0
+00257c fc4c
+00257d a6db      .DB 106,216,32,153,217,144,60,32,140,218,208,3,76,252,219,166
+00257e 8670
+00257f a256
+002580 a569
+002581 a869
+002582 cef0
+002583 e538
+002584 f061
+002585 9024      .DB 112,134,86,162,105,165,105,168,240,206,56,229,97,240,36,144
+002586 8412
+002587 a461
+002588 846e
+002589 4966
+00258a 69ff
+00258b a000
+00258c 8400
+00258d a256      .DB 18,132,97,164,110,132,102,73,255,105,0,160,0,132,86,162
+00258e d061
+00258f a004
+002590 8400
+002591 c970
+002592 30f9
+002593 a8c7
+002594 70a5
+002595 0156      .DB 97,208,4,160,0,132,112,201,249,48,199,168,165,112,86,1
+002596 b020
+002597 24d9
+002598 106f
+002599 a057
+00259a e061
+00259b f069
+00259c a002
+00259d 3869      .DB 32,176,217,36,111,16,87,160,97,224,105,240,2,160,105,56
+00259e ff49
+00259f 5665
+0025a0 7085
+0025a1 04b9
+0025a2 f500
+0025a3 8504
+0025a4 b965
+0025a5 0003      .DB 73,255,101,86,133,112,185,4,0,245,4,133,101,185,3,0
+0025a6 03f5
+0025a7 6485
+0025a8 02b9
+0025a9 f500
+0025aa 8502
+0025ab b963
+0025ac 0001
+0025ad 01f5      .DB 245,3,133,100,185,2,0,245,2,133,99,185,1,0,245,1
+0025ae 6285
+0025af 03b0
+0025b0 4720
+0025b1 a0d9
+0025b2 9800
+0025b3 a618
+0025b4 d062
+0025b5 a64a      .DB 133,98,176,3,32,71,217,160,0,152,24,166,98,208,74,166
+0025b6 8663
+0025b7 a662
+0025b8 8664
+0025b9 a663
+0025ba 8665
+0025bb a664
+0025bc 8670
+0025bd 8465      .DB 99,134,98,166,100,134,99,166,101,134,100,166,112,134,101,132
+0025be 6970
+0025bf c908
+0025c0 d020
+0025c1 a9e4
+0025c2 8500
+0025c3 8561
+0025c4 6066
+0025c5 5665      .DB 112,105,8,201,32,208,228,169,0,133,97,133,102,96,101,86
+0025c6 7085
+0025c7 65a5
+0025c8 6d65
+0025c9 6585
+0025ca 64a5
+0025cb 6c65
+0025cc 6485
+0025cd 63a5      .DB 133,112,165,101,101,109,133,101,165,100,101,108,133,100,165,99
+0025ce 6b65
+0025cf 6385
+0025d0 62a5
+0025d1 6a65
+0025d2 6285
+0025d3 364c
+0025d4 69d9
+0025d5 0601      .DB 101,107,133,99,165,98,101,106,133,98,76,54,217,105,1,6
+0025d6 2670
+0025d7 2665
+0025d8 2664
+0025d9 2663
+0025da 1062
+0025db 38f2
+0025dc 61e5
+0025dd c7b0      .DB 112,38,101,38,100,38,99,38,98,16,242,56,229,97,176,199
+0025de ff49
+0025df 0169
+0025e0 6185
+0025e1 0e90
+0025e2 61e6
+0025e3 42f0
+0025e4 6266
+0025e5 6366      .DB 73,255,105,1,133,97,144,14,230,97,240,66,102,98,102,99
+0025e6 6466
+0025e7 6566
+0025e8 7066
+0025e9 a560
+0025ea 4966
+0025eb 85ff
+0025ec a566
+0025ed 4962      .DB 102,100,102,101,102,112,96,165,102,73,255,133,102,165,98,73
+0025ee 85ff
+0025ef a562
+0025f0 4963
+0025f1 85ff
+0025f2 a563
+0025f3 4964
+0025f4 85ff
+0025f5 a564      .DB 255,133,98,165,99,73,255,133,99,165,100,73,255,133,100,165
+0025f6 4965
+0025f7 85ff
+0025f8 a565
+0025f9 4970
+0025fa 85ff
+0025fb e670
+0025fc d070
+0025fd e60e      .DB 101,73,255,133,101,165,112,73,255,133,112,230,112,208,14,230
+0025fe d065
+0025ff e60a
+002600 d064
+002601 e606
+002602 d063
+002603 e602
+002604 6062
+002605 0fa2      .DB 101,208,10,230,100,208,6,230,99,208,2,230,98,96,162,15
+002606 374c
+002607 a2c4
+002608 b425
+002609 8404
+00260a b470
+00260b 9403
+00260c b404
+00260d 9402      .DB 76,55,196,162,37,180,4,132,112,180,3,148,4,180,2,148
+00260e b403
+00260f 9401
+002610 a402
+002611 9468
+002612 6901
+002613 3008
+002614 f0e8
+002615 e9e6      .DB 3,180,1,148,2,164,104,148,1,105,8,48,232,240,230,233
+002616 a808
+002617 70a5
+002618 14b0
+002619 0116
+00261a 0290
+00261b 01f6
+00261c 0176
+00261d 0176      .DB 8,168,165,112,176,20,22,1,144,2,246,1,118,1,118,1
+00261e 0276
+00261f 0376
+002620 0476
+002621 c86a
+002622 ecd0
+002623 6018
+002624 0081
+002625 0000      .DB 118,2,118,3,118,4,106,200,208,236,24,96,129,0,0,0
+002626 0300
+002627 5e7f
+002628 cb56
+002629 8079
+00262a 9b13
+00262b 640b
+00262c 7680
+00262d 9338      .DB 0,3,127,94,86,203,121,128,19,155,11,100,128,118,56,147
+00262e 8216
+00262f aa38
+002630 203b
+002631 3580
+002632 f304
+002633 8134
+002634 0435
+002635 34f3      .DB 22,130,56,170,59,32,128,53,4,243,52,129,53,4,243,52
+002636 8080
+002637 0000
+002638 8000
+002639 7231
+00263a f817
+00263b 2b20
+00263c f0dc
+00263d 1002      .DB 128,128,0,0,0,128,49,114,23,248,32,43,220,240,2,16
+00263e 4c03
+00263f d248
+002640 61a5
+002641 7fe9
+002642 a948
+002643 8580
+002644 a961
+002645 a0d6      .DB 3,76,72,210,165,97,233,127,72,169,128,133,97,169,214,160
+002646 20d9
+002647 d867
+002648 dba9
+002649 d9a0
+00264a 0f20
+00264b a9db
+00264c a0bc
+00264d 20d9      .DB 217,32,103,216,169,219,160,217,32,15,219,169,188,160,217,32
+00264e d850
+00264f c1a9
+002650 d9a0
+002651 4020
+002652 a9e0
+002653 a0e0
+002654 20d9
+002655 d867      .DB 80,216,169,193,160,217,32,64,224,169,224,160,217,32,103,216
+002656 2068
+002657 dd7e
+002658 e5a9
+002659 d9a0
+00265a 8c20
+00265b d0da
+00265c 4c03
+00265d da8b      .DB 104,32,126,221,169,229,160,217,32,140,218,208,3,76,139,218
+00265e b720
+00265f a9da
+002660 8500
+002661 8526
+002662 8527
+002663 8528
+002664 a529
+002665 2070      .DB 32,183,218,169,0,133,38,133,39,133,40,133,41,165,112,32
+002666 da59
+002667 65a5
+002668 5920
+002669 a5da
+00266a 2064
+00266b da59
+00266c 63a5
+00266d 5920      .DB 89,218,165,101,32,89,218,165,100,32,89,218,165,99,32,89
+00266e a5da
+00266f 2062
+002670 da5e
+002671 8f4c
+002672 d0db
+002673 4c03
+002674 d983
+002675 094a      .DB 218,165,98,32,94,218,76,143,219,208,3,76,131,217,74,9
+002676 a880
+002677 1990
+002678 a518
+002679 6529
+00267a 856d
+00267b a529
+00267c 6528
+00267d 856c      .DB 128,168,144,25,24,165,41,101,109,133,41,165,40,101,108,133
+00267e a528
+00267f 6527
+002680 856b
+002681 a527
+002682 6526
+002683 856a
+002684 6626
+002685 6626      .DB 40,165,39,101,107,133,39,165,38,101,106,133,38,102,38,102
+002686 6627
+002687 6628
+002688 6629
+002689 9870
+00268a d04a
+00268b 60d6
+00268c 2285
+00268d 2384      .DB 39,102,40,102,41,102,112,152,74,208,214,96,133,34,132,35
+00268e 04a0
+00268f 22b1
+002690 6d85
+002691 b188
+002692 8522
+002693 886c
+002694 22b1
+002695 6b85      .DB 160,4,177,34,133,109,136,177,34,133,108,136,177,34,133,107
+002696 b188
+002697 8522
+002698 456e
+002699 8566
+00269a a56f
+00269b 096e
+00269c 8580
+00269d 886a      .DB 136,177,34,133,110,69,102,133,111,165,110,9,128,133,106,136
+00269e 22b1
+00269f 6985
+0026a0 61a5
+0026a1 a560
+0026a2 f069
+0026a3 181f
+0026a4 6165
+0026a5 0490      .DB 177,34,133,105,165,97,96,165,105,240,31,24,101,97,144,4
+0026a6 1d30
+0026a7 2c18
+0026a8 1410
+0026a9 8069
+0026aa 6185
+0026ab 03d0
+0026ac fb4c
+0026ad a5d8      .DB 48,29,24,44,16,20,105,128,133,97,208,3,76,251,216,165
+0026ae 856f
+0026af 6066
+0026b0 66a5
+0026b1 ff49
+0026b2 0530
+0026b3 6868
+0026b4 f74c
+0026b5 4cd8      .DB 111,133,102,96,165,102,73,255,48,5,104,104,76,247,216,76
+0026b6 d97e
+0026b7 0c20
+0026b8 aadc
+0026b9 10f0
+0026ba 6918
+0026bb b002
+0026bc a2f2
+0026bd 8600      .DB 126,217,32,12,220,170,240,16,24,105,2,176,242,162,0,134
+0026be 206f
+0026bf d877
+0026c0 61e6
+0026c1 e7f0
+0026c2 8460
+0026c3 0020
+0026c4 0000
+0026c5 0c20      .DB 111,32,119,216,230,97,240,231,96,132,32,0,0,0,32,12
+0026c6 a9dc
+0026c7 a0f9
+0026c8 a2da
+0026c9 8600
+0026ca 206f
+0026cb dba2
+0026cc 124c
+0026cd 20db      .DB 220,169,249,160,218,162,0,134,111,32,162,219,76,18,219,32
+0026ce da8c
+0026cf 76f0
+0026d0 1b20
+0026d1 a9dc
+0026d2 3800
+0026d3 61e5
+0026d4 6185
+0026d5 b720      .DB 140,218,240,118,32,27,220,169,0,56,229,97,133,97,32,183
+0026d6 e6da
+0026d7 f061
+0026d8 a2ba
+0026d9 a9fc
+0026da a401
+0026db c46a
+0026dc d062
+0026dd a410      .DB 218,230,97,240,186,162,252,169,1,164,106,196,98,208,16,164
+0026de c46b
+0026df d063
+0026e0 a40a
+0026e1 c46c
+0026e2 d064
+0026e3 a404
+0026e4 c46d
+0026e5 0865      .DB 107,196,99,208,10,164,108,196,100,208,4,164,109,196,101,8
+0026e6 902a
+0026e7 e809
+0026e8 2995
+0026e9 32f0
+0026ea 3410
+0026eb 01a9
+0026ec b028
+0026ed 060e      .DB 42,144,9,232,149,41,240,50,16,52,169,1,40,176,14,6
+0026ee 266d
+0026ef 266c
+0026f0 266b
+0026f1 b06a
+0026f2 30e6
+0026f3 10ce
+0026f4 a8e2
+0026f5 6da5      .DB 109,38,108,38,107,38,106,176,230,48,206,16,226,168,165,109
+0026f6 65e5
+0026f7 6d85
+0026f8 6ca5
+0026f9 64e5
+0026fa 6c85
+0026fb 6ba5
+0026fc 63e5
+0026fd 6b85      .DB 229,101,133,109,165,108,229,100,133,108,165,107,229,99,133,107
+0026fe 6aa5
+0026ff 62e5
+002700 6a85
+002701 4c98
+002702 db4f
+002703 40a9
+002704 ced0
+002705 0a0a      .DB 165,106,229,98,133,106,152,76,79,219,169,64,208,206,10,10
+002706 0a0a
+002707 0a0a
+002708 7085
+002709 4c28
+00270a db8f
+00270b 14a2
+00270c 374c
+00270d a5c4      .DB 10,10,10,10,133,112,40,76,143,219,162,20,76,55,196,165
+00270e 8526
+00270f a562
+002710 8527
+002711 a563
+002712 8528
+002713 a564
+002714 8529
+002715 4c65      .DB 38,133,98,165,39,133,99,165,40,133,100,165,41,133,101,76
+002716 d8d7
+002717 2285
+002718 2384
+002719 04a0
+00271a 22b1
+00271b 6585
+00271c b188
+00271d 8522      .DB 215,216,133,34,132,35,160,4,177,34,133,101,136,177,34,133
+00271e 8864
+00271f 22b1
+002720 6385
+002721 b188
+002722 8522
+002723 0966
+002724 8580
+002725 8862      .DB 100,136,177,34,133,99,136,177,34,133,102,9,128,133,98,136
+002726 22b1
+002727 6185
+002728 7084
+002729 a260
+00272a 2c5c
+00272b 57a2
+00272c 00a0
+00272d 04f0      .DB 177,34,133,97,132,112,96,162,92,44,162,87,160,0,240,4
+00272e 49a6
+00272f 4aa4
+002730 1b20
+002731 86dc
+002732 8422
+002733 a023
+002734 a504
+002735 9165      .DB 166,73,164,74,32,27,220,134,34,132,35,160,4,165,101,145
+002736 8822
+002737 64a5
+002738 2291
+002739 a588
+00273a 9163
+00273b 8822
+00273c 66a5
+00273d 7f09      .DB 34,136,165,100,145,34,136,165,99,145,34,136,165,102,9,127
+00273e 6225
+00273f 2291
+002740 a588
+002741 9161
+002742 8422
+002743 6070
+002744 6ea5
+002745 6685      .DB 37,98,145,34,136,165,97,145,34,132,112,96,165,110,133,102
+002746 05a2
+002747 68b5
+002748 6095
+002749 d0ca
+00274a 86f9
+00274b 6070
+00274c 1b20
+00274d a2dc      .DB 162,5,181,104,149,96,202,208,249,134,112,96,32,27,220,162
+00274e b506
+00274f 9560
+002750 ca68
+002751 f9d0
+002752 7086
+002753 a560
+002754 f061
+002755 06fb      .DB 6,181,96,149,104,202,208,249,134,112,96,165,97,240,251,6
+002756 9070
+002757 20f7
+002758 d96f
+002759 f2d0
+00275a 384c
+00275b a5d9
+00275c f061
+00275d a509      .DB 112,144,247,32,111,217,208,242,76,56,217,165,97,240,9,165
+00275e 2a66
+00275f ffa9
+002760 02b0
+002761 01a9
+002762 2060
+002763 dc2b
+002764 6285
+002765 00a9      .DB 102,42,169,255,176,2,169,1,96,32,43,220,133,98,169,0
+002766 6385
+002767 88a2
+002768 62a5
+002769 ff49
+00276a a92a
+00276b 8500
+00276c 8565
+00276d 8664      .DB 133,99,162,136,165,98,73,255,42,169,0,133,101,133,100,134
+00276e 8561
+00276f 8570
+002770 4c66
+002771 d8d2
+002772 6646
+002773 8560
+002774 8424
+002775 a025      .DB 97,133,112,133,102,76,210,216,70,102,96,133,36,132,37,160
+002776 b100
+002777 c824
+002778 f0aa
+002779 b1c4
+00277a 4524
+00277b 3066
+00277c e4c2
+00277d d061      .DB 0,177,36,200,170,240,196,177,36,69,102,48,194,228,97,208
+00277e b121
+00277f 0924
+002780 c580
+002781 d062
+002782 c819
+002783 24b1
+002784 63c5
+002785 12d0      .DB 33,177,36,9,128,197,98,208,25,200,177,36,197,99,208,18
+002786 b1c8
+002787 c524
+002788 d064
+002789 c80b
+00278a 7fa9
+00278b 70c5
+00278c 24b1
+00278d 65e5      .DB 200,177,36,197,100,208,11,200,169,127,197,112,177,36,229,101
+00278e 28f0
+00278f 66a5
+002790 0290
+002791 ff49
+002792 314c
+002793 a5dc
+002794 f061
+002795 384a      .DB 240,40,165,102,144,2,73,255,76,49,220,165,97,240,74,56
+002796 a0e9
+002797 6624
+002798 0910
+002799 a9aa
+00279a 85ff
+00279b 2068
+00279c d94d
+00279d a28a      .DB 233,160,36,102,16,9,170,169,255,133,104,32,77,217,138,162
+00279e c961
+00279f 10f9
+0027a0 2006
+0027a1 d999
+0027a2 6884
+0027a3 a860
+0027a4 66a5
+0027a5 8029      .DB 97,201,249,16,6,32,153,217,132,104,96,168,165,102,41,128
+0027a6 6246
+0027a7 6205
+0027a8 6285
+0027a9 b020
+0027aa 84d9
+0027ab 6068
+0027ac 61a5
+0027ad a0c9      .DB 70,98,5,98,133,98,32,176,217,132,104,96,165,97,201,160
+0027ae 20b0
+0027af 9b20
+0027b0 84dc
+0027b1 a570
+0027b2 8466
+0027b3 4966
+0027b4 2a80
+0027b5 a0a9      .DB 176,32,32,155,220,132,112,165,102,132,102,73,128,42,169,160
+0027b6 6185
+0027b7 65a5
+0027b8 0785
+0027b9 d24c
+0027ba 85d8
+0027bb 8562
+0027bc 8563
+0027bd 8564      .DB 133,97,165,101,133,7,76,210,216,133,98,133,99,133,100,133
+0027be a865
+0027bf a060
+0027c0 a200
+0027c1 940a
+0027c2 ca5d
+0027c3 fb10
+0027c4 0f90
+0027c5 2dc9      .DB 101,168,96,160,0,162,10,148,93,202,16,251,144,15,201,45
+0027c6 04d0
+0027c7 6786
+0027c8 04f0
+0027c9 2bc9
+0027ca 05d0
+0027cb 7320
+0027cc 9000
+0027cd c95b      .DB 208,4,134,103,240,4,201,43,208,5,32,115,0,144,91,201
+0027ce f02e
+0027cf c92e
+0027d0 d045
+0027d1 2030
+0027d2 0073
+0027d3 1790
+0027d4 abc9
+0027d5 0ef0      .DB 46,240,46,201,69,208,48,32,115,0,144,23,201,171,240,14
+0027d6 2dc9
+0027d7 0af0
+0027d8 aac9
+0027d9 08f0
+0027da 2bc9
+0027db 04f0
+0027dc 07d0
+0027dd 6066      .DB 201,45,240,10,201,170,240,8,201,43,240,4,208,7,102,96
+0027de 7320
+0027df 9000
+0027e0 245c
+0027e1 1060
+0027e2 a90e
+0027e3 3800
+0027e4 5ee5
+0027e5 494c      .DB 32,115,0,144,92,36,96,16,14,169,0,56,229,94,76,73
+0027e6 66dd
+0027e7 245f
+0027e8 505f
+0027e9 a5c3
+0027ea 385e
+0027eb 5de5
+0027ec 5e85
+0027ed 12f0      .DB 221,102,95,36,95,80,195,165,94,56,229,93,133,94,240,18
+0027ee 0910
+0027ef fe20
+0027f0 e6da
+0027f1 d05e
+0027f2 f0f9
+0027f3 2007
+0027f4 dae2
+0027f5 5ec6      .DB 16,9,32,254,218,230,94,208,249,240,7,32,226,218,198,94
+0027f6 f9d0
+0027f7 67a5
+0027f8 0130
+0027f9 4c60
+0027fa dfb4
+0027fb 2448
+0027fc 105f
+0027fd e602      .DB 208,249,165,103,48,1,96,76,180,223,72,36,95,16,2,230
+0027fe 205d
+0027ff dae2
+002800 3868
+002801 30e9
+002802 7e20
+002803 4cdd
+002804 dd0a
+002805 2048      .DB 93,32,226,218,104,56,233,48,32,126,221,76,10,221,72,32
+002806 dc0c
+002807 2068
+002808 dc3c
+002809 6ea5
+00280a 6645
+00280b 6f85
+00280c 61a6
+00280d 6a4c      .DB 12,220,104,32,60,220,165,110,69,102,133,111,166,97,76,106
+00280e a5d8
+00280f c95e
+002810 900a
+002811 a909
+002812 2464
+002813 3060
+002814 4c11
+002815 d97e      .DB 216,165,94,201,10,144,9,169,100,36,96,48,17,76,126,217
+002816 0a0a
+002817 6518
+002818 0a5e
+002819 a018
+00281a 7100
+00281b 387a
+00281c 30e9
+00281d 5e85      .DB 10,10,24,101,94,10,24,160,0,113,122,56,233,48,133,94
+00281e 304c
+00281f 9bdd
+002820 bc3e
+002821 fd1f
+002822 6e9e
+002823 276b
+002824 9efd
+002825 6b6e      .DB 76,48,221,155,62,188,31,253,158,110,107,39,253,158,110,107
+002826 0028
+002827 71a9
+002828 c3a0
+002829 da20
+00282a a5dd
+00282b a63a
+00282c 8539
+00282d 8662      .DB 40,0,169,113,160,195,32,218,221,165,58,166,57,133,98,134
+00282e a263
+00282f 3890
+002830 4920
+002831 20dc
+002832 dddf
+002833 1e4c
+002834 a0cb
+002835 a901      .DB 99,162,144,56,32,73,220,32,223,221,76,30,203,160,1,169
+002836 2420
+002837 1066
+002838 a902
+002839 992d
+00283a 00ff
+00283b 6685
+00283c 7184
+00283d a9c8      .DB 32,36,102,16,2,169,45,153,255,0,133,102,132,113,200,169
+00283e a630
+00283f d061
+002840 4c03
+002841 df04
+002842 00a9
+002843 80e0
+002844 02f0
+002845 09b0      .DB 48,166,97,208,3,76,4,223,169,0,224,128,240,2,176,9
+002846 bda9
+002847 dda0
+002848 2820
+002849 a9da
+00284a 85f7
+00284b a95d
+00284c a0b8
+00284d 20dd      .DB 169,189,160,221,32,40,218,169,247,133,93,169,184,160,221,32
+00284e dc5b
+00284f 1ef0
+002850 1210
+002851 b3a9
+002852 dda0
+002853 5b20
+002854 f0dc
+002855 1002      .DB 91,220,240,30,16,18,169,179,160,221,32,91,220,240,2,16
+002856 200e
+002857 dae2
+002858 5dc6
+002859 eed0
+00285a fe20
+00285b e6da
+00285c d05d
+00285d 20dc      .DB 14,32,226,218,198,93,208,238,32,254,218,230,93,208,220,32
+00285e d849
+00285f 9b20
+002860 a2dc
+002861 a501
+002862 185d
+002863 0a69
+002864 0930
+002865 0bc9      .DB 73,216,32,155,220,162,1,165,93,24,105,10,48,9,201,11
+002866 06b0
+002867 ff69
+002868 a9aa
+002869 3802
+00286a 02e9
+00286b 5e85
+00286c 5d86
+00286d f08a      .DB 176,6,105,255,170,169,2,56,233,2,133,94,134,93,138,240
+00286e 1002
+00286f a413
+002870 a971
+002871 c82e
+002872 ff99
+002873 8a00
+002874 06f0
+002875 30a9      .DB 2,16,19,164,113,169,46,200,153,255,0,138,240,6,169,48
+002876 99c8
+002877 00ff
+002878 7184
+002879 00a0
+00287a 80a2
+00287b 65a5
+00287c 7918
+00287d df19      .DB 200,153,255,0,132,113,160,0,162,128,165,101,24,121,25,223
+00287e 6585
+00287f 64a5
+002880 1879
+002881 85df
+002882 a564
+002883 7963
+002884 df17
+002885 6385      .DB 133,101,165,100,121,24,223,133,100,165,99,121,23,223,133,99
+002886 62a5
+002887 1679
+002888 85df
+002889 e862
+00288a 04b0
+00288b de10
+00288c 0230
+00288d da30      .DB 165,98,121,22,223,133,98,232,176,4,16,222,48,2,48,218
+00288e 908a
+00288f 4904
+002890 69ff
+002891 690a
+002892 c82f
+002893 c8c8
+002894 84c8
+002895 a447      .DB 138,144,4,73,255,105,10,105,47,200,200,200,200,132,71,164
+002896 c871
+002897 29aa
+002898 997f
+002899 00ff
+00289a 5dc6
+00289b 06d0
+00289c 2ea9
+00289d 99c8      .DB 113,200,170,41,127,153,255,0,198,93,208,6,169,46,200,153
+00289e 00ff
+00289f 7184
+0028a0 47a4
+0028a1 498a
+0028a2 29ff
+0028a3 aa80
+0028a4 24c0
+0028a5 04f0      .DB 255,0,132,113,164,71,138,73,255,41,128,170,192,36,240,4
+0028a6 3cc0
+0028a7 a6d0
+0028a8 71a4
+0028a9 ffb9
+0028aa 8800
+0028ab 30c9
+0028ac f8f0
+0028ad 2ec9      .DB 192,60,208,166,164,113,185,255,0,136,201,48,240,248,201,46
+0028ae 01f0
+0028af a9c8
+0028b0 a62b
+0028b1 f05e
+0028b2 102e
+0028b3 a908
+0028b4 3800
+0028b5 5ee5      .DB 240,1,200,169,43,166,94,240,46,16,8,169,0,56,229,94
+0028b6 a9aa
+0028b7 992d
+0028b8 0101
+0028b9 45a9
+0028ba 0099
+0028bb 8a01
+0028bc 2fa2
+0028bd e838      .DB 170,169,45,153,1,1,169,69,153,0,1,138,162,47,56,232
+0028be 0ae9
+0028bf fbb0
+0028c0 3a69
+0028c1 0399
+0028c2 8a01
+0028c3 0299
+0028c4 a901
+0028c5 9900      .DB 233,10,176,251,105,58,153,3,1,138,153,2,1,169,0,153
+0028c6 0104
+0028c7 08f0
+0028c8 ff99
+0028c9 a900
+0028ca 9900
+0028cb 0100
+0028cc 00a9
+0028cd 01a0      .DB 4,1,240,8,153,255,0,169,0,153,0,1,169,0,160,1
+0028ce 8060
+0028cf 0000
+0028d0 0000
+0028d1 0afa
+0028d2 001f
+0028d3 9800
+0028d4 8096
+0028d5 f0ff      .DB 96,128,0,0,0,0,250,10,31,0,0,152,150,128,255,240
+0028d6 c0bd
+0028d7 0100
+0028d8 a086
+0028d9 ffff
+0028da f0d8
+0028db 0000
+0028dc e803
+0028dd ffff      .DB 189,192,0,1,134,160,255,255,216,240,0,0,3,232,255,255
+0028de 9cff
+0028df 0000
+0028e0 0a00
+0028e1 ffff
+0028e2 ffff
+0028e3 dfff
+0028e4 800a
+0028e5 0300      .DB 255,156,0,0,0,10,255,255,255,255,255,223,10,128,0,3
+0028e6 c04b
+0028e7 ffff
+0028e8 6073
+0028e9 0000
+0028ea 100e
+0028eb ffff
+0028ec a8fd
+0028ed 0000      .DB 75,192,255,255,115,96,0,0,14,16,255,255,253,168,0,0
+0028ee 3c00
+0028ef aabf
+0028f0 aaaa
+0028f1 aaaa
+0028f2 aaaa
+0028f3 aaaa
+0028f4 aaaa
+0028f5 aaaa      .DB 0,60,191,170,170,170,170,170,170,170,170,170,170,170,170,170
+0028f6 aaaa
+0028f7 aaaa
+0028f8 aaaa
+0028f9 aaaa
+0028fa aaaa
+0028fb aaaa
+0028fc aaaa
+0028fd aaaa      .DB 170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,170
+0028fe 20aa
+0028ff dc0c
+002900 11a9
+002901 dfa0
+002902 a220
+002903 f0db
+002904 a570
+002905 d069      .DB 170,32,12,220,169,17,160,223,32,162,219,240,112,165,105,208
+002906 4c03
+002907 d8f9
+002908 4ea2
+002909 00a0
+00290a d420
+00290b a5db
+00290c 106e
+00290d 200f      .DB 3,76,249,216,162,78,160,0,32,212,219,165,110,16,15,32
+00290e dccc
+00290f 4ea9
+002910 00a0
+002911 5b20
+002912 d0dc
+002913 9803
+002914 07a4
+002915 fe20      .DB 204,220,169,78,160,0,32,91,220,208,3,152,164,7,32,254
+002916 98db
+002917 2048
+002918 d9ea
+002919 4ea9
+00291a 00a0
+00291b 2820
+00291c 20da
+00291d dfed      .DB 219,152,72,32,234,217,169,78,160,0,32,40,218,32,237,223
+00291e 4a68
+00291f 0a90
+002920 61a5
+002921 06f0
+002922 66a5
+002923 ff49
+002924 6685
+002925 8160      .DB 104,74,144,10,165,97,240,6,165,102,73,255,133,102,96,129
+002926 aa38
+002927 293b
+002928 7107
+002929 5834
+00292a 563e
+00292b 1674
+00292c b37e
+00292d 771b      .DB 56,170,59,41,7,113,52,88,62,86,116,22,126,179,27,119
+00292e ee2f
+00292f 85e3
+002930 1d7a
+002931 1c84
+002932 7c2a
+002933 5963
+002934 0a58
+002935 757e      .DB 47,238,227,133,122,29,132,28,42,124,99,89,88,10,126,117
+002936 e7fd
+002937 80c6
+002938 7231
+002939 1018
+00293a 0081
+00293b 0000
+00293c a900
+00293d a0bf      .DB 253,231,198,128,49,114,24,16,129,0,0,0,0,169,191,160
+00293e 20df
+00293f da28
+002940 70a5
+002941 5069
+002942 0390
+002943 2320
+002944 85dc
+002945 2056      .DB 223,32,40,218,165,112,105,80,144,3,32,35,220,133,86,32
+                 char_rom:
+                 .include "chars.asm"
+002946 221c
+002947 564a
+002948 204c
+002949 001e
+00294a 2418
+00294b 7e42
+00294c 4242
+00294d 0042      
+00294e 227c
+00294f 3c22
+002950 2222
+002951 007c
+002952 221c
+002953 4040
+002954 2240
+002955 001c      .DB 124,34,34,60,34,34,124,0,28,34,64,64,64,34,28,0
+002956 2478
+002957 2222
+002958 2422
+002959 0078
+00295a 407e
+00295b 7840
+00295c 4040
+00295d 007e      .DB 120,36,34,34,34,36,120,0,126,64,64,120,64,64,126,0
+00295e 407e
+00295f 7840
+002960 4040
+002961 0040
+002962 221c
+002963 4e40
+002964 2242
+002965 001c      .DB 126,64,64,120,64,64,64,0,28,34,64,78,66,34,28,0
+002966 4242
+002967 7e42
+002968 4242
+002969 0042
+00296a 081c
+00296b 0808
+00296c 0808
+00296d 001c      .DB 66,66,66,126,66,66,66,0,28,8,8,8,8,8,28,0
+00296e 040e
+00296f 0404
+002970 4404
+002971 0038
+002972 4442
+002973 7048
+002974 4448
+002975 0042      .DB 14,4,4,4,4,68,56,0,66,68,72,112,72,68,66,0
+002976 4040
+002977 4040
+002978 4040
+002979 007e
+00297a 6642
+00297b 5a5a
+00297c 4242
+00297d 0042      .DB 64,64,64,64,64,64,126,0,66,102,90,90,66,66,66,0
+00297e 6242
+00297f 4a52
+002980 4246
+002981 0042
+002982 2418
+002983 4242
+002984 2442
+002985 0018      .DB 66,98,82,74,70,66,66,0,24,36,66,66,66,36,24,0
+002986 427c
+002987 7c42
+002988 4040
+002989 0040
+00298a 2418
+00298b 4242
+00298c 244a
+00298d 001a      .DB 124,66,66,124,64,64,64,0,24,36,66,66,74,36,26,0
+00298e 427c
+00298f 7c42
+002990 4448
+002991 0042
+002992 423c
+002993 3c40
+002994 4202
+002995 003c      .DB 124,66,66,124,72,68,66,0,60,66,64,60,2,66,60,0
+002996 083e
+002997 0808
+002998 0808
+002999 0008
+00299a 4242
+00299b 4242
+00299c 4242
+00299d 003c      .DB 62,8,8,8,8,8,8,0,66,66,66,66,66,66,60,0
+00299e 4242
+00299f 2442
+0029a0 1824
+0029a1 0018
+0029a2 4242
+0029a3 5a42
+0029a4 665a
+0029a5 0042      .DB 66,66,66,36,36,24,24,0,66,66,66,90,90,102,66,0
+0029a6 4242
+0029a7 1824
+0029a8 4224
+0029a9 0042
+0029aa 2222
+0029ab 1c22
+0029ac 0808
+0029ad 0008      .DB 66,66,36,24,36,66,66,0,34,34,34,28,8,8,8,0
+0029ae 027e
+0029af 1804
+0029b0 4020
+0029b1 007e
+0029b2 203c
+0029b3 2020
+0029b4 2020
+0029b5 003c      .DB 126,2,4,24,32,64,126,0,60,32,32,32,32,32,60,0
+0029b6 100c
+0029b7 3c10
+0029b8 7010
+0029b9 006e
+0029ba 043c
+0029bb 0404
+0029bc 0404
+0029bd 003c      .DB 12,16,16,60,16,112,110,0,60,4,4,4,4,4,60,0
+0029be 0800
+0029bf 2a1c
+0029c0 0808
+0029c1 0808
+0029c2 0000
+0029c3 2010
+0029c4 207f
+0029c5 0010      .DB 0,8,28,42,8,8,8,8,0,0,16,32,127,32,16,0
+0029c6 0000
+0029c7 0000
+0029c8 0000
+0029c9 0000
+0029ca 0808
+0029cb 0808
+0029cc 0000
+0029cd 0008      .DB 0,0,0,0,0,0,0,0,8,8,8,8,0,0,8,0
+0029ce 2424
+0029cf 0024
+0029d0 0000
+0029d1 0000
+0029d2 2424
+0029d3 247e
+0029d4 247e
+0029d5 0024      .DB 36,36,36,0,0,0,0,0,36,36,126,36,126,36,36,0
+0029d6 1e08
+0029d7 1c28
+0029d8 3c0a
+0029d9 0008
+0029da 6200
+0029db 0864
+0029dc 2610
+0029dd 0046      .DB 8,30,40,28,10,60,8,0,0,98,100,8,16,38,70,0
+0029de 4830
+0029df 3048
+0029e0 444a
+0029e1 003a
+0029e2 0804
+0029e3 0010
+0029e4 0000
+0029e5 0000      .DB 48,72,72,48,74,68,58,0,4,8,16,0,0,0,0,0
+0029e6 0804
+0029e7 1010
+0029e8 0810
+0029e9 0004
+0029ea 1020
+0029eb 0808
+0029ec 1008
+0029ed 0020      .DB 4,8,16,16,16,8,4,0,32,16,8,8,8,16,32,0
+0029ee 2a08
+0029ef 3e1c
+0029f0 2a1c
+0029f1 0008
+0029f2 0800
+0029f3 3e08
+0029f4 0808
+0029f5 0000      .DB 8,42,28,62,28,42,8,0,0,8,8,62,8,8,0,0
+0029f6 0000
+0029f7 0000
+0029f8 0800
+0029f9 1008
+0029fa 0000
+0029fb 7e00
+0029fc 0000
+0029fd 0000      .DB 0,0,0,0,0,8,8,16,0,0,0,126,0,0,0,0
+0029fe 0000
+0029ff 0000
+002a00 1800
+002a01 0018
+002a02 0200
+002a03 0804
+002a04 2010
+002a05 0040      .DB 0,0,0,0,0,24,24,0,0,2,4,8,16,32,64,0
+002a06 423c
+002a07 5a46
+002a08 4262
+002a09 003c
+002a0a 1808
+002a0b 0828
+002a0c 0808
+002a0d 003e      .DB 60,66,70,90,98,66,60,0,8,24,40,8,8,8,62,0
+002a0e 423c
+002a0f 0c02
+002a10 4030
+002a11 007e
+002a12 423c
+002a13 1c02
+002a14 4202
+002a15 003c      .DB 60,66,2,12,48,64,126,0,60,66,2,28,2,66,60,0
+002a16 0c04
+002a17 2414
+002a18 047e
+002a19 0004
+002a1a 407e
+002a1b 0478
+002a1c 4402
+002a1d 0038      .DB 4,12,20,36,126,4,4,0,126,64,120,4,2,68,56,0
+002a1e 201c
+002a1f 7c40
+002a20 4242
+002a21 003c
+002a22 427e
+002a23 0804
+002a24 1010
+002a25 0010      .DB 28,32,64,124,66,66,60,0,126,66,4,8,16,16,16,0
+002a26 423c
+002a27 3c42
+002a28 4242
+002a29 003c
+002a2a 423c
+002a2b 3e42
+002a2c 0402
+002a2d 0038      .DB 60,66,66,60,66,66,60,0,60,66,66,62,2,4,56,0
+002a2e 0000
+002a2f 0008
+002a30 0800
+002a31 0000
+002a32 0000
+002a33 0008
+002a34 0800
+002a35 1008      .DB 0,0,8,0,0,8,0,0,0,0,8,0,0,8,8,16
+002a36 180e
+002a37 6030
+002a38 1830
+002a39 000e
+002a3a 0000
+002a3b 007e
+002a3c 007e
+002a3d 0000      .DB 14,24,48,96,48,24,14,0,0,0,126,0,126,0,0,0
+002a3e 1870
+002a3f 060c
+002a40 180c
+002a41 0070
+002a42 423c
+002a43 0c02
+002a44 0010
+002a45 0010      .DB 112,24,12,6,12,24,112,0,60,66,2,12,16,0,16,0
+002a46 0000
+002a47 0000
+002a48 00ff
+002a49 0000
+002a4a 1c08
+002a4b 7f3e
+002a4c 1c7f
+002a4d 003e      .DB 0,0,0,0,255,0,0,0,8,28,62,127,127,28,62,0
+002a4e 1010
+002a4f 1010
+002a50 1010
+002a51 1010
+002a52 0000
+002a53 ff00
+002a54 0000
+002a55 0000      .DB 16,16,16,16,16,16,16,16,0,0,0,255,0,0,0,0
+002a56 0000
+002a57 00ff
+002a58 0000
+002a59 0000
+002a5a ff00
+002a5b 0000
+002a5c 0000
+002a5d 0000      .DB 0,0,255,0,0,0,0,0,0,255,0,0,0,0,0,0
+002a5e 0000
+002a5f 0000
+002a60 ff00
+002a61 0000
+002a62 2020
+002a63 2020
+002a64 2020
+002a65 2020      .DB 0,0,0,0,0,255,0,0,32,32,32,32,32,32,32,32
+002a66 0404
+002a67 0404
+002a68 0404
+002a69 0404
+002a6a 0000
+002a6b 0000
+002a6c 10e0
+002a6d 0808      .DB 4,4,4,4,4,4,4,4,0,0,0,0,224,16,8,8
+002a6e 0808
+002a6f 0408
+002a70 0003
+002a71 0000
+002a72 0808
+002a73 1008
+002a74 00e0
+002a75 0000      .DB 8,8,8,4,3,0,0,0,8,8,8,16,224,0,0,0
+002a76 8080
+002a77 8080
+002a78 8080
+002a79 ff80
+002a7a 4080
+002a7b 1020
+002a7c 0408
+002a7d 0102      .DB 128,128,128,128,128,128,128,255,128,64,32,16,8,4,2,1
+002a7e 0201
+002a7f 0804
+002a80 2010
+002a81 8040
+002a82 80ff
+002a83 8080
+002a84 8080
+002a85 8080      .DB 1,2,4,8,16,32,64,128,255,128,128,128,128,128,128,128
+002a86 01ff
+002a87 0101
+002a88 0101
+002a89 0101
+002a8a 3c00
+002a8b 7e7e
+002a8c 7e7e
+002a8d 003c      .DB 255,1,1,1,1,1,1,1,0,60,126,126,126,126,60,0
+002a8e 0000
+002a8f 0000
+002a90 0000
+002a91 00ff
+002a92 7f36
+002a93 7f7f
+002a94 1c3e
+002a95 0008      .DB 0,0,0,0,0,0,255,0,54,127,127,127,62,28,8,0
+002a96 4040
+002a97 4040
+002a98 4040
+002a99 4040
+002a9a 0000
+002a9b 0000
+002a9c 0403
+002a9d 0808      .DB 64,64,64,64,64,64,64,64,0,0,0,0,3,4,8,8
+002a9e 4281
+002a9f 1824
+002aa0 2418
+002aa1 8142
+002aa2 3c00
+002aa3 4242
+002aa4 4242
+002aa5 003c      .DB 129,66,36,24,24,36,66,129,0,60,66,66,66,66,60,0
+002aa6 1c08
+002aa7 772a
+002aa8 082a
+002aa9 0008
+002aaa 0202
+002aab 0202
+002aac 0202
+002aad 0202      .DB 8,28,42,119,42,8,8,0,2,2,2,2,2,2,2,2
+002aae 1c08
+002aaf 7f3e
+002ab0 1c3e
+002ab1 0008
+002ab2 0808
+002ab3 0808
+002ab4 08ff
+002ab5 0808      .DB 8,28,62,127,62,28,8,0,8,8,8,8,255,8,8,8
+002ab6 50a0
+002ab7 50a0
+002ab8 50a0
+002ab9 50a0
+002aba 0808
+002abb 0808
+002abc 0808
+002abd 0808      .DB 160,80,160,80,160,80,160,80,8,8,8,8,8,8,8,8
+002abe 0000
+002abf 3e01
+002ac0 1454
+002ac1 0014
+002ac2 7fff
+002ac3 1f3f
+002ac4 070f
+002ac5 0103      .DB 0,0,1,62,84,20,20,0,255,127,63,31,15,7,3,1
+002ac6 0000
+002ac7 0000
+002ac8 0000
+002ac9 0000
+002aca f0f0
+002acb f0f0
+002acc f0f0
+002acd f0f0      .DB 0,0,0,0,0,0,0,0,240,240,240,240,240,240,240,240
+002ace 0000
+002acf 0000
+002ad0 ffff
+002ad1 ffff
+002ad2 00ff
+002ad3 0000
+002ad4 0000
+002ad5 0000      .DB 0,0,0,0,255,255,255,255,255,0,0,0,0,0,0,0
+002ad6 0000
+002ad7 0000
+002ad8 0000
+002ad9 ff00
+002ada 8080
+002adb 8080
+002adc 8080
+002add 8080      .DB 0,0,0,0,0,0,0,255,128,128,128,128,128,128,128,128
+002ade 55aa
+002adf 55aa
+002ae0 55aa
+002ae1 55aa
+002ae2 0101
+002ae3 0101
+002ae4 0101
+002ae5 0101      .DB 170,85,170,85,170,85,170,85,1,1,1,1,1,1,1,1
+002ae6 0000
+002ae7 0000
+002ae8 55aa
+002ae9 55aa
+002aea feff
+002aeb f8fc
+002aec e0f0
+002aed 80c0      .DB 0,0,0,0,170,85,170,85,255,254,252,248,240,224,192,128
+002aee 0303
+002aef 0303
+002af0 0303
+002af1 0303
+002af2 0808
+002af3 0808
+002af4 080f
+002af5 0808      .DB 3,3,3,3,3,3,3,3,8,8,8,8,15,8,8,8
+002af6 0000
+002af7 0000
+002af8 0f0f
+002af9 0f0f
+002afa 0808
+002afb 0808
+002afc 000f
+002afd 0000      .DB 0,0,0,0,15,15,15,15,8,8,8,8,15,0,0,0
+002afe 0000
+002aff 0000
+002b00 08f8
+002b01 0808
+002b02 0000
+002b03 0000
+002b04 0000
+002b05 ffff      .DB 0,0,0,0,248,8,8,8,0,0,0,0,0,0,255,255
+002b06 0000
+002b07 0000
+002b08 080f
+002b09 0808
+002b0a 0808
+002b0b 0808
+002b0c 00ff
+002b0d 0000      .DB 0,0,0,0,15,8,8,8,8,8,8,8,255,0,0,0
+002b0e 0000
+002b0f 0000
+002b10 08ff
+002b11 0808
+002b12 0808
+002b13 0808
+002b14 08f8
+002b15 0808      .DB 0,0,0,0,255,8,8,8,8,8,8,8,248,8,8,8
+002b16 c0c0
+002b17 c0c0
+002b18 c0c0
+002b19 c0c0
+002b1a e0e0
+002b1b e0e0
+002b1c e0e0
+002b1d e0e0      .DB 192,192,192,192,192,192,192,192,224,224,224,224,224,224,224,224
+002b1e 0707
+002b1f 0707
+002b20 0707
+002b21 0707
+002b22 ffff
+002b23 0000
+002b24 0000
+002b25 0000      .DB 7,7,7,7,7,7,7,7,255,255,0,0,0,0,0,0
+002b26 ffff
+002b27 00ff
+002b28 0000
+002b29 0000
+002b2a 0000
+002b2b 0000
+002b2c ff00
+002b2d ffff      .DB 255,255,255,0,0,0,0,0,0,0,0,0,0,255,255,255
+002b2e 0101
+002b2f 0101
+002b30 0101
+002b31 ff01
+002b32 0000
+002b33 0000
+002b34 f0f0
+002b35 f0f0      .DB 1,1,1,1,1,1,1,255,0,0,0,0,240,240,240,240
+002b36 0f0f
+002b37 0f0f
+002b38 0000
+002b39 0000
+002b3a 0808
+002b3b 0808
+002b3c 00f8
+002b3d 0000      .DB 15,15,15,15,0,0,0,0,8,8,8,8,248,0,0,0
+002b3e f0f0
+002b3f f0f0
+002b40 0000
+002b41 0000
+002b42 f0f0
+002b43 f0f0
+002b44 0f0f
+002b45 0f0f      .DB 240,240,240,240,0,0,0,0,240,240,240,240,15,15,15,15
+002b46 dde3
+002b47 a9b5
+002b48 dfb3
+002b49 ffe1
+002b4a dbe7
+002b4b 81bd
+002b4c bdbd
+002b4d ffbd      .DB 227,221,181,169,179,223,225,255,231,219,189,129,189,189,189,255
+002b4e dd83
+002b4f c3dd
+002b50 dddd
+002b51 ff83
+002b52 dde3
+002b53 bfbf
+002b54 ddbf
+002b55 ffe3      .DB 131,221,221,195,221,221,131,255,227,221,191,191,191,221,227,255
+002b56 db87
+002b57 dddd
+002b58 dbdd
+002b59 ff87
+002b5a bf81
+002b5b 87bf
+002b5c bfbf
+002b5d ff81      .DB 135,219,221,221,221,219,135,255,129,191,191,135,191,191,129,255
+002b5e bf81
+002b5f 87bf
+002b60 bfbf
+002b61 ffbf
+002b62 dde3
+002b63 b1bf
+002b64 ddbd
+002b65 ffe3      .DB 129,191,191,135,191,191,191,255,227,221,191,177,189,221,227,255
+002b66 bdbd
+002b67 81bd
+002b68 bdbd
+002b69 ffbd
+002b6a f7e3
+002b6b f7f7
+002b6c f7f7
+002b6d ffe3      .DB 189,189,189,129,189,189,189,255,227,247,247,247,247,247,227,255
+002b6e fbf1
+002b6f fbfb
+002b70 bbfb
+002b71 ffc7
+002b72 bbbd
+002b73 8fb7
+002b74 bbb7
+002b75 ffbd      .DB 241,251,251,251,251,187,199,255,189,187,183,143,183,187,189,255
+002b76 bfbf
+002b77 bfbf
+002b78 bfbf
+002b79 ff81
+002b7a 99bd
+002b7b a5a5
+002b7c bdbd
+002b7d ffbd      .DB 191,191,191,191,191,191,129,255,189,153,165,165,189,189,189,255
+002b7e 9dbd
+002b7f b5ad
+002b80 bdb9
+002b81 ffbd
+002b82 dbe7
+002b83 bdbd
+002b84 dbbd
+002b85 ffe7      .DB 189,157,173,181,185,189,189,255,231,219,189,189,189,219,231,255
+002b86 bd83
+002b87 83bd
+002b88 bfbf
+002b89 ffbf
+002b8a dbe7
+002b8b bdbd
+002b8c dbb5
+002b8d ffe5      .DB 131,189,189,131,191,191,191,255,231,219,189,189,181,219,229,255
+002b8e bd83
+002b8f 83bd
+002b90 bbb7
+002b91 ffbd
+002b92 bdc3
+002b93 c3bf
+002b94 bdfd
+002b95 ffc3      .DB 131,189,189,131,183,187,189,255,195,189,191,195,253,189,195,255
+002b96 f7c1
+002b97 f7f7
+002b98 f7f7
+002b99 fff7
+002b9a bdbd
+002b9b bdbd
+002b9c bdbd
+002b9d ffc3      .DB 193,247,247,247,247,247,247,255,189,189,189,189,189,189,195,255
+002b9e bdbd
+002b9f dbbd
+002ba0 e7db
+002ba1 ffe7
+002ba2 bdbd
+002ba3 a5bd
+002ba4 99a5
+002ba5 ffbd      .DB 189,189,189,219,219,231,231,255,189,189,189,165,165,153,189,255
+002ba6 bdbd
+002ba7 e7db
+002ba8 bddb
+002ba9 ffbd
+002baa dddd
+002bab e3dd
+002bac f7f7
+002bad fff7      .DB 189,189,219,231,219,189,189,255,221,221,221,227,247,247,247,255
+002bae fd81
+002baf e7fb
+002bb0 bfdf
+002bb1 ff81
+002bb2 dfc3
+002bb3 dfdf
+002bb4 dfdf
+002bb5 ffc3      .DB 129,253,251,231,223,191,129,255,195,223,223,223,223,223,195,255
+002bb6 eff3
+002bb7 c3ef
+002bb8 8fef
+002bb9 ff91
+002bba fbc3
+002bbb fbfb
+002bbc fbfb
+002bbd ffc3      .DB 243,239,239,195,239,143,145,255,195,251,251,251,251,251,195,255
+002bbe f7ff
+002bbf d5e3
+002bc0 f7f7
+002bc1 f7f7
+002bc2 ffff
+002bc3 dfef
+002bc4 df80
+002bc5 ffef      .DB 255,247,227,213,247,247,247,247,255,255,239,223,128,223,239,255
+002bc6 ffff
+002bc7 ffff
+002bc8 ffff
+002bc9 ffff
+002bca f7f7
+002bcb f7f7
+002bcc ffff
+002bcd fff7      .DB 255,255,255,255,255,255,255,255,247,247,247,247,255,255,247,255
+002bce dbdb
+002bcf ffdb
+002bd0 ffff
+002bd1 ffff
+002bd2 dbdb
+002bd3 db81
+002bd4 db81
+002bd5 ffdb      .DB 219,219,219,255,255,255,255,255,219,219,129,219,129,219,219,255
+002bd6 e1f7
+002bd7 e3d7
+002bd8 c3f5
+002bd9 fff7
+002bda 9dff
+002bdb f79b
+002bdc d9ef
+002bdd ffb9      .DB 247,225,215,227,245,195,247,255,255,157,155,247,239,217,185,255
+002bde b7cf
+002bdf cfb7
+002be0 bbb5
+002be1 ffc5
+002be2 f7fb
+002be3 ffef
+002be4 ffff
+002be5 ffff      .DB 207,183,183,207,181,187,197,255,251,247,239,255,255,255,255,255
+002be6 f7fb
+002be7 efef
+002be8 f7ef
+002be9 fffb
+002bea efdf
+002beb f7f7
+002bec eff7
+002bed ffdf      .DB 251,247,239,239,239,247,251,255,223,239,247,247,247,239,223,255
+002bee d5f7
+002bef c1e3
+002bf0 d5e3
+002bf1 fff7
+002bf2 f7ff
+002bf3 c1f7
+002bf4 f7f7
+002bf5 ffff      .DB 247,213,227,193,227,213,247,255,255,247,247,193,247,247,255,255
+002bf6 ffff
+002bf7 ffff
+002bf8 f7ff
+002bf9 eff7
+002bfa ffff
+002bfb 81ff
+002bfc ffff
+002bfd ffff      .DB 255,255,255,255,255,247,247,239,255,255,255,129,255,255,255,255
+002bfe ffff
+002bff ffff
+002c00 e7ff
+002c01 ffe7
+002c02 fdff
+002c03 f7fb
+002c04 dfef
+002c05 ffbf      .DB 255,255,255,255,255,231,231,255,255,253,251,247,239,223,191,255
+002c06 bdc3
+002c07 a5b9
+002c08 bd9d
+002c09 ffc3
+002c0a e7f7
+002c0b f7d7
+002c0c f7f7
+002c0d ffc1      .DB 195,189,185,165,157,189,195,255,247,231,215,247,247,247,193,255
+002c0e bdc3
+002c0f f3fd
+002c10 bfcf
+002c11 ff81
+002c12 bdc3
+002c13 e3fd
+002c14 bdfd
+002c15 ffc3      .DB 195,189,253,243,207,191,129,255,195,189,253,227,253,189,195,255
+002c16 f3fb
+002c17 dbeb
+002c18 fb81
+002c19 fffb
+002c1a bf81
+002c1b fb87
+002c1c bbfd
+002c1d ffc7      .DB 251,243,235,219,129,251,251,255,129,191,135,251,253,187,199,255
+002c1e dfe3
+002c1f 83bf
+002c20 bdbd
+002c21 ffc3
+002c22 bd81
+002c23 f7fb
+002c24 efef
+002c25 ffef      .DB 227,223,191,131,189,189,195,255,129,189,251,247,239,239,239,255
+002c26 bdc3
+002c27 c3bd
+002c28 bdbd
+002c29 ffc3
+002c2a bdc3
+002c2b c1bd
+002c2c fbfd
+002c2d ffc7      .DB 195,189,189,195,189,189,195,255,195,189,189,193,253,251,199,255
+002c2e ffff
+002c2f fff7
+002c30 f7ff
+002c31 ffff
+002c32 ffff
+002c33 fff7
+002c34 f7ff
+002c35 eff7      .DB 255,255,247,255,255,247,255,255,255,255,247,255,255,247,247,239
+002c36 e7f1
+002c37 9fcf
+002c38 e7cf
+002c39 fff1
+002c3a ffff
+002c3b ff81
+002c3c ff81
+002c3d ffff      .DB 241,231,207,159,207,231,241,255,255,255,129,255,129,255,255,255
+002c3e e78f
+002c3f f9f3
+002c40 e7f3
+002c41 ff8f
+002c42 bdc3
+002c43 f3fd
+002c44 ffef
+002c45 ffef      .DB 143,231,243,249,243,231,143,255,195,189,253,243,239,255,239,255
+002c46 ffff
+002c47 ffff
+002c48 ff00
+002c49 ffff
+002c4a e3f7
+002c4b 80c1
+002c4c e380
+002c4d ffc1      .DB 255,255,255,255,0,255,255,255,247,227,193,128,128,227,193,255
+002c4e efef
+002c4f efef
+002c50 efef
+002c51 efef
+002c52 ffff
+002c53 00ff
+002c54 ffff
+002c55 ffff      .DB 239,239,239,239,239,239,239,239,255,255,255,0,255,255,255,255
+002c56 ffff
+002c57 ff00
+002c58 ffff
+002c59 ffff
+002c5a 00ff
+002c5b ffff
+002c5c ffff
+002c5d ffff      .DB 255,255,0,255,255,255,255,255,255,0,255,255,255,255,255,255
+002c5e ffff
+002c5f ffff
+002c60 00ff
+002c61 ffff
+002c62 dfdf
+002c63 dfdf
+002c64 dfdf
+002c65 dfdf      .DB 255,255,255,255,255,0,255,255,223,223,223,223,223,223,223,223
+002c66 fbfb
+002c67 fbfb
+002c68 fbfb
+002c69 fbfb
+002c6a ffff
+002c6b ffff
+002c6c ef1f
+002c6d f7f7      .DB 251,251,251,251,251,251,251,251,255,255,255,255,31,239,247,247
+002c6e f7f7
+002c6f fbf7
+002c70 fffc
+002c71 ffff
+002c72 f7f7
+002c73 eff7
+002c74 ff1f
+002c75 ffff      .DB 247,247,247,251,252,255,255,255,247,247,247,239,31,255,255,255
+002c76 7f7f
+002c77 7f7f
+002c78 7f7f
+002c79 007f
+002c7a bf7f
+002c7b efdf
+002c7c fbf7
+002c7d fefd      .DB 127,127,127,127,127,127,127,0,127,191,223,239,247,251,253,254
+002c7e fdfe
+002c7f f7fb
+002c80 dfef
+002c81 7fbf
+002c82 7f00
+002c83 7f7f
+002c84 7f7f
+002c85 7f7f      .DB 254,253,251,247,239,223,191,127,0,127,127,127,127,127,127,127
+002c86 fe00
+002c87 fefe
+002c88 fefe
+002c89 fefe
+002c8a c3ff
+002c8b 8181
+002c8c 8181
+002c8d ffc3      .DB 0,254,254,254,254,254,254,254,255,195,129,129,129,129,195,255
+002c8e ffff
+002c8f ffff
+002c90 ffff
+002c91 ff00
+002c92 80c9
+002c93 8080
+002c94 e3c1
+002c95 fff7      .DB 255,255,255,255,255,255,0,255,201,128,128,128,193,227,247,255
+002c96 bfbf
+002c97 bfbf
+002c98 bfbf
+002c99 bfbf
+002c9a ffff
+002c9b ffff
+002c9c fbfc
+002c9d f7f7      .DB 191,191,191,191,191,191,191,191,255,255,255,255,252,251,247,247
+002c9e bd7e
+002c9f e7db
+002ca0 dbe7
+002ca1 7ebd
+002ca2 c3ff
+002ca3 bdbd
+002ca4 bdbd
+002ca5 ffc3      .DB 126,189,219,231,231,219,189,126,255,195,189,189,189,189,195,255
+002ca6 e3f7
+002ca7 88d5
+002ca8 f7d5
+002ca9 fff7
+002caa fdfd
+002cab fdfd
+002cac fdfd
+002cad fdfd      .DB 247,227,213,136,213,247,247,255,253,253,253,253,253,253,253,253
+002cae e3f7
+002caf 80c1
+002cb0 e3c1
+002cb1 fff7
+002cb2 f7f7
+002cb3 f7f7
+002cb4 f700
+002cb5 f7f7      .DB 247,227,193,128,193,227,247,255,247,247,247,247,0,247,247,247
+002cb6 af5f
+002cb7 af5f
+002cb8 af5f
+002cb9 af5f
+002cba f7f7
+002cbb f7f7
+002cbc f7f7
+002cbd f7f7      .DB 95,175,95,175,95,175,95,175,247,247,247,247,247,247,247,247
+002cbe ffff
+002cbf c1fe
+002cc0 ebab
+002cc1 ffeb
+002cc2 8000
+002cc3 e0c0
+002cc4 f8f0
+002cc5 fefc      .DB 255,255,254,193,171,235,235,255,0,128,192,224,240,248,252,254
+002cc6 ffff
+002cc7 ffff
+002cc8 ffff
+002cc9 ffff
+002cca 0f0f
+002ccb 0f0f
+002ccc 0f0f
+002ccd 0f0f      .DB 255,255,255,255,255,255,255,255,15,15,15,15,15,15,15,15
+002cce ffff
+002ccf ffff
+002cd0 0000
+002cd1 0000
+002cd2 ff00
+002cd3 ffff
+002cd4 ffff
+002cd5 ffff      .DB 255,255,255,255,0,0,0,0,0,255,255,255,255,255,255,255
+002cd6 ffff
+002cd7 ffff
+002cd8 ffff
+002cd9 00ff
+002cda 7f7f
+002cdb 7f7f
+002cdc 7f7f
+002cdd 7f7f      .DB 255,255,255,255,255,255,255,0,127,127,127,127,127,127,127,127
+002cde aa55
+002cdf aa55
+002ce0 aa55
+002ce1 aa55
+002ce2 fefe
+002ce3 fefe
+002ce4 fefe
+002ce5 fefe      .DB 85,170,85,170,85,170,85,170,254,254,254,254,254,254,254,254
+002ce6 ffff
+002ce7 ffff
+002ce8 aa55
+002ce9 aa55
+002cea 0100
+002ceb 0703
+002cec 1f0f
+002ced 7f3f      .DB 255,255,255,255,85,170,85,170,0,1,3,7,15,31,63,127
+002cee fcfc
+002cef fcfc
+002cf0 fcfc
+002cf1 fcfc
+002cf2 f7f7
+002cf3 f7f7
+002cf4 f7f0
+002cf5 f7f7      .DB 252,252,252,252,252,252,252,252,247,247,247,247,240,247,247,247
+002cf6 ffff
+002cf7 ffff
+002cf8 f0f0
+002cf9 f0f0
+002cfa f7f7
+002cfb f7f7
+002cfc fff0
+002cfd ffff      .DB 255,255,255,255,240,240,240,240,247,247,247,247,240,255,255,255
+002cfe ffff
+002cff ffff
+002d00 f707
+002d01 f7f7
+002d02 ffff
+002d03 ffff
+002d04 ffff
+002d05 0000      .DB 255,255,255,255,7,247,247,247,255,255,255,255,255,255,0,0
+002d06 ffff
+002d07 ffff
+002d08 f7f0
+002d09 f7f7
+002d0a f7f7
+002d0b f7f7
+002d0c ff00
+002d0d ffff      .DB 255,255,255,255,240,247,247,247,247,247,247,247,0,255,255,255
+002d0e ffff
+002d0f ffff
+002d10 f700
+002d11 f7f7
+002d12 f7f7
+002d13 f7f7
+002d14 f707
+002d15 f7f7      .DB 255,255,255,255,0,247,247,247,247,247,247,247,7,247,247,247
+002d16 3f3f
+002d17 3f3f
+002d18 3f3f
+002d19 3f3f
+002d1a 1f1f
+002d1b 1f1f
+002d1c 1f1f
+002d1d 1f1f      .DB 63,63,63,63,63,63,63,63,31,31,31,31,31,31,31,31
+002d1e f8f8
+002d1f f8f8
+002d20 f8f8
+002d21 f8f8
+002d22 0000
+002d23 ffff
+002d24 ffff
+002d25 ffff      .DB 248,248,248,248,248,248,248,248,0,0,255,255,255,255,255,255
+002d26 0000
+002d27 ff00
+002d28 ffff
+002d29 ffff
+002d2a ffff
+002d2b ffff
+002d2c 00ff
+002d2d 0000      .DB 0,0,0,255,255,255,255,255,255,255,255,255,255,0,0,0
+002d2e fefe
+002d2f fefe
+002d30 fefe
+002d31 00fe
+002d32 ffff
+002d33 ffff
+002d34 0f0f
+002d35 0f0f      .DB 254,254,254,254,254,254,254,0,255,255,255,255,15,15,15,15
+002d36 f0f0
+002d37 f0f0
+002d38 ffff
+002d39 ffff
+002d3a f7f7
+002d3b f7f7
+002d3c ff07
+002d3d ffff      .DB 240,240,240,240,255,255,255,255,247,247,247,247,7,255,255,255
+002d3e 0f0f
+002d3f 0f0f
+002d40 ffff
+002d41 ffff
+002d42 0f0f
+002d43 0f0f
+002d44 f0f0
+002d45 f0f0      .DB 15,15,15,15,255,255,255,255,15,15,15,15,240,240,240,240
+002d46 221c
+002d47 564a
+002d48 204c
+002d49 001e
+002d4a 0000
+002d4b 0438
+002d4c 443c
+002d4d 003a      .DB 28,34,74,86,76,32,30,0,0,0,56,4,60,68,58,0
+002d4e 4040
+002d4f 625c
+002d50 6242
+002d51 005c
+002d52 0000
+002d53 423c
+002d54 4240
+002d55 003c      .DB 64,64,92,98,66,98,92,0,0,0,60,66,64,66,60,0
+002d56 0202
+002d57 463a
+002d58 4642
+002d59 003a
+002d5a 0000
+002d5b 423c
+002d5c 407e
+002d5d 003c      .DB 2,2,58,70,66,70,58,0,0,0,60,66,126,64,60,0
+002d5e 120c
+002d5f 7c10
+002d60 1010
+002d61 0010
+002d62 0000
+002d63 463a
+002d64 3a46
+002d65 3c02      .DB 12,18,16,124,16,16,16,0,0,0,58,70,70,58,2,60
+002d66 4040
+002d67 625c
+002d68 4242
+002d69 0042
+002d6a 0008
+002d6b 0818
+002d6c 0808
+002d6d 001c      .DB 64,64,92,98,66,66,66,0,8,0,24,8,8,8,28,0
+002d6e 0004
+002d6f 040c
+002d70 0404
+002d71 3844
+002d72 4040
+002d73 4844
+002d74 6850
+002d75 0044      .DB 4,0,12,4,4,4,68,56,64,64,68,72,80,104,68,0
+002d76 0818
+002d77 0808
+002d78 0808
+002d79 001c
+002d7a 0000
+002d7b 4976
+002d7c 4949
+002d7d 0049      .DB 24,8,8,8,8,8,28,0,0,0,118,73,73,73,73,0
+002d7e 0000
+002d7f 625c
+002d80 4242
+002d81 0042
+002d82 0000
+002d83 423c
+002d84 4242
+002d85 003c      .DB 0,0,92,98,66,66,66,0,0,0,60,66,66,66,60,0
+002d86 0000
+002d87 625c
+002d88 5c62
+002d89 4040
+002d8a 0000
+002d8b 463a
+002d8c 3a46
+002d8d 0202      .DB 0,0,92,98,98,92,64,64,0,0,58,70,70,58,2,2
+002d8e 0000
+002d8f 625c
+002d90 4040
+002d91 0040
+002d92 0000
+002d93 403e
+002d94 023c
+002d95 007c      .DB 0,0,92,98,64,64,64,0,0,0,62,64,60,2,124,0
+002d96 1010
+002d97 107c
+002d98 1210
+002d99 000c
+002d9a 0000
+002d9b 4242
+002d9c 4642
+002d9d 003a      .DB 16,16,124,16,16,18,12,0,0,0,66,66,66,70,58,0
+002d9e 0000
+002d9f 4242
+002da0 2442
+002da1 0018
+002da2 0000
+002da3 4941
+002da4 4949
+002da5 0036      .DB 0,0,66,66,66,36,24,0,0,0,65,73,73,73,54,0
+002da6 0000
+002da7 2442
+002da8 2418
+002da9 0042
+002daa 0000
+002dab 4242
+002dac 3a46
+002dad 3c02      .DB 0,0,66,36,24,36,66,0,0,0,66,66,70,58,2,60
+002dae 0000
+002daf 047e
+002db0 2018
+002db1 007e
+002db2 203c
+002db3 2020
+002db4 2020
+002db5 003c      .DB 0,0,126,4,24,32,126,0,60,32,32,32,32,32,60,0
+002db6 100c
+002db7 3c10
+002db8 7010
+002db9 006e
+002dba 043c
+002dbb 0404
+002dbc 0404
+002dbd 003c      .DB 12,16,16,60,16,112,110,0,60,4,4,4,4,4,60,0
+002dbe 0800
+002dbf 2a1c
+002dc0 0808
+002dc1 0808
+002dc2 0000
+002dc3 2010
+002dc4 207f
+002dc5 0010      .DB 0,8,28,42,8,8,8,8,0,0,16,32,127,32,16,0
+002dc6 0000
+002dc7 0000
+002dc8 0000
+002dc9 0000
+002dca 0808
+002dcb 0808
+002dcc 0000
+002dcd 0008      .DB 0,0,0,0,0,0,0,0,8,8,8,8,0,0,8,0
+002dce 2424
+002dcf 0024
+002dd0 0000
+002dd1 0000
+002dd2 2424
+002dd3 247e
+002dd4 247e
+002dd5 0024      .DB 36,36,36,0,0,0,0,0,36,36,126,36,126,36,36,0
+002dd6 1e08
+002dd7 1c28
+002dd8 3c0a
+002dd9 0008
+002dda 6200
+002ddb 0864
+002ddc 2610
+002ddd 0046      .DB 8,30,40,28,10,60,8,0,0,98,100,8,16,38,70,0
+002dde 4830
+002ddf 3048
+002de0 444a
+002de1 003a
+002de2 0804
+002de3 0010
+002de4 0000
+002de5 0000      .DB 48,72,72,48,74,68,58,0,4,8,16,0,0,0,0,0
+002de6 0804
+002de7 1010
+002de8 0810
+002de9 0004
+002dea 1020
+002deb 0808
+002dec 1008
+002ded 0020      .DB 4,8,16,16,16,8,4,0,32,16,8,8,8,16,32,0
+002dee 2a08
+002def 3e1c
+002df0 2a1c
+002df1 0008
+002df2 0800
+002df3 3e08
+002df4 0808
+002df5 0000      .DB 8,42,28,62,28,42,8,0,0,8,8,62,8,8,0,0
+002df6 0000
+002df7 0000
+002df8 0800
+002df9 1008
+002dfa 0000
+002dfb 7e00
+002dfc 0000
+002dfd 0000      .DB 0,0,0,0,0,8,8,16,0,0,0,126,0,0,0,0
+002dfe 0000
+002dff 0000
+002e00 1800
+002e01 0018
+002e02 0200
+002e03 0804
+002e04 2010
+002e05 0040      .DB 0,0,0,0,0,24,24,0,0,2,4,8,16,32,64,0
+002e06 423c
+002e07 5a46
+002e08 4262
+002e09 003c
+002e0a 1808
+002e0b 0828
+002e0c 0808
+002e0d 003e      .DB 60,66,70,90,98,66,60,0,8,24,40,8,8,8,62,0
+002e0e 423c
+002e0f 0c02
+002e10 4030
+002e11 007e
+002e12 423c
+002e13 1c02
+002e14 4202
+002e15 003c      .DB 60,66,2,12,48,64,126,0,60,66,2,28,2,66,60,0
+002e16 0c04
+002e17 2414
+002e18 047e
+002e19 0004
+002e1a 407e
+002e1b 0478
+002e1c 4402
+002e1d 0038      .DB 4,12,20,36,126,4,4,0,126,64,120,4,2,68,56,0
+002e1e 201c
+002e1f 7c40
+002e20 4242
+002e21 003c
+002e22 427e
+002e23 0804
+002e24 1010
+002e25 0010      .DB 28,32,64,124,66,66,60,0,126,66,4,8,16,16,16,0
+002e26 423c
+002e27 3c42
+002e28 4242
+002e29 003c
+002e2a 423c
+002e2b 3e42
+002e2c 0402
+002e2d 0038      .DB 60,66,66,60,66,66,60,0,60,66,66,62,2,4,56,0
+002e2e 0000
+002e2f 0008
+002e30 0800
+002e31 0000
+002e32 0000
+002e33 0008
+002e34 0800
+002e35 1008      .DB 0,0,8,0,0,8,0,0,0,0,8,0,0,8,8,16
+002e36 180e
+002e37 6030
+002e38 1830
+002e39 000e
+002e3a 0000
+002e3b 007e
+002e3c 007e
+002e3d 0000      .DB 14,24,48,96,48,24,14,0,0,0,126,0,126,0,0,0
+002e3e 1870
+002e3f 060c
+002e40 180c
+002e41 0070
+002e42 423c
+002e43 0c02
+002e44 0010
+002e45 0010      .DB 112,24,12,6,12,24,112,0,60,66,2,12,16,0,16,0
+002e46 0000
+002e47 0000
+002e48 00ff
+002e49 0000
+002e4a 2418
+002e4b 7e42
+002e4c 4242
+002e4d 0042      .DB 0,0,0,0,255,0,0,0,24,36,66,126,66,66,66,0
+002e4e 227c
+002e4f 3c22
+002e50 2222
+002e51 007c
+002e52 221c
+002e53 4040
+002e54 2240
+002e55 001c      .DB 124,34,34,60,34,34,124,0,28,34,64,64,64,34,28,0
+002e56 2478
+002e57 2222
+002e58 2422
+002e59 0078
+002e5a 407e
+002e5b 7840
+002e5c 4040
+002e5d 007e      .DB 120,36,34,34,34,36,120,0,126,64,64,120,64,64,126,0
+002e5e 407e
+002e5f 7840
+002e60 4040
+002e61 0040
+002e62 221c
+002e63 4e40
+002e64 2242
+002e65 001c      .DB 126,64,64,120,64,64,64,0,28,34,64,78,66,34,28,0
+002e66 4242
+002e67 7e42
+002e68 4242
+002e69 0042
+002e6a 081c
+002e6b 0808
+002e6c 0808
+002e6d 001c      .DB 66,66,66,126,66,66,66,0,28,8,8,8,8,8,28,0
+002e6e 040e
+002e6f 0404
+002e70 4404
+002e71 0038
+002e72 4442
+002e73 7048
+002e74 4448
+002e75 0042      .DB 14,4,4,4,4,68,56,0,66,68,72,112,72,68,66,0
+002e76 4040
+002e77 4040
+002e78 4040
+002e79 007e
+002e7a 6642
+002e7b 5a5a
+002e7c 4242
+002e7d 0042      .DB 64,64,64,64,64,64,126,0,66,102,90,90,66,66,66,0
+002e7e 6242
+002e7f 4a52
+002e80 4246
+002e81 0042
+002e82 2418
+002e83 4242
+002e84 2442
+002e85 0018      .DB 66,98,82,74,70,66,66,0,24,36,66,66,66,36,24,0
+002e86 427c
+002e87 7c42
+002e88 4040
+002e89 0040
+002e8a 2418
+002e8b 4242
+002e8c 244a
+002e8d 001a      .DB 124,66,66,124,64,64,64,0,24,36,66,66,74,36,26,0
+002e8e 427c
+002e8f 7c42
+002e90 4448
+002e91 0042
+002e92 423c
+002e93 3c40
+002e94 4202
+002e95 003c      .DB 124,66,66,124,72,68,66,0,60,66,64,60,2,66,60,0
+002e96 083e
+002e97 0808
+002e98 0808
+002e99 0008
+002e9a 4242
+002e9b 4242
+002e9c 4242
+002e9d 003c      .DB 62,8,8,8,8,8,8,0,66,66,66,66,66,66,60,0
+002e9e 4242
+002e9f 2442
+002ea0 1824
+002ea1 0018
+002ea2 4242
+002ea3 5a42
+002ea4 665a
+002ea5 0042      .DB 66,66,66,36,36,24,24,0,66,66,66,90,90,102,66,0
+002ea6 4242
+002ea7 1824
+002ea8 4224
+002ea9 0042
+002eaa 2222
+002eab 1c22
+002eac 0808
+002ead 0008      .DB 66,66,36,24,36,66,66,0,34,34,34,28,8,8,8,0
+002eae 027e
+002eaf 1804
+002eb0 4020
+002eb1 007e
+002eb2 0808
+002eb3 0808
+002eb4 08ff
+002eb5 0808      .DB 126,2,4,24,32,64,126,0,8,8,8,8,255,8,8,8
+002eb6 50a0
+002eb7 50a0
+002eb8 50a0
+002eb9 50a0
+002eba 0808
+002ebb 0808
+002ebc 0808
+002ebd 0808      .DB 160,80,160,80,160,80,160,80,8,8,8,8,8,8,8,8
+002ebe cccc
+002ebf 3333
+002ec0 cccc
+002ec1 3333
+002ec2 66cc
+002ec3 9933
+002ec4 66cc
+002ec5 9933      .DB 204,204,51,51,204,204,51,51,204,102,51,153,204,102,51,153
+002ec6 0000
+002ec7 0000
+002ec8 0000
+002ec9 0000
+002eca f0f0
+002ecb f0f0
+002ecc f0f0
+002ecd f0f0      .DB 0,0,0,0,0,0,0,0,240,240,240,240,240,240,240,240
+002ece 0000
+002ecf 0000
+002ed0 ffff
+002ed1 ffff
+002ed2 00ff
+002ed3 0000
+002ed4 0000
+002ed5 0000      .DB 0,0,0,0,255,255,255,255,255,0,0,0,0,0,0,0
+002ed6 0000
+002ed7 0000
+002ed8 0000
+002ed9 ff00
+002eda 8080
+002edb 8080
+002edc 8080
+002edd 8080      .DB 0,0,0,0,0,0,0,255,128,128,128,128,128,128,128,128
+002ede 55aa
+002edf 55aa
+002ee0 55aa
+002ee1 55aa
+002ee2 0101
+002ee3 0101
+002ee4 0101
+002ee5 0101      .DB 170,85,170,85,170,85,170,85,1,1,1,1,1,1,1,1
+002ee6 0000
+002ee7 0000
+002ee8 55aa
+002ee9 55aa
+002eea 3399
+002eeb cc66
+002eec 3399
+002eed cc66      .DB 0,0,0,0,170,85,170,85,153,51,102,204,153,51,102,204
+002eee 0303
+002eef 0303
+002ef0 0303
+002ef1 0303
+002ef2 0808
+002ef3 0808
+002ef4 080f
+002ef5 0808      .DB 3,3,3,3,3,3,3,3,8,8,8,8,15,8,8,8
+002ef6 0000
+002ef7 0000
+002ef8 0f0f
+002ef9 0f0f
+002efa 0808
+002efb 0808
+002efc 000f
+002efd 0000      .DB 0,0,0,0,15,15,15,15,8,8,8,8,15,0,0,0
+002efe 0000
+002eff 0000
+002f00 08f8
+002f01 0808
+002f02 0000
+002f03 0000
+002f04 0000
+002f05 ffff      .DB 0,0,0,0,248,8,8,8,0,0,0,0,0,0,255,255
+002f06 0000
+002f07 0000
+002f08 080f
+002f09 0808
+002f0a 0808
+002f0b 0808
+002f0c 00ff
+002f0d 0000      .DB 0,0,0,0,15,8,8,8,8,8,8,8,255,0,0,0
+002f0e 0000
+002f0f 0000
+002f10 08ff
+002f11 0808
+002f12 0808
+002f13 0808
+002f14 08f8
+002f15 0808      .DB 0,0,0,0,255,8,8,8,8,8,8,8,248,8,8,8
+002f16 c0c0
+002f17 c0c0
+002f18 c0c0
+002f19 c0c0
+002f1a e0e0
+002f1b e0e0
+002f1c e0e0
+002f1d e0e0      .DB 192,192,192,192,192,192,192,192,224,224,224,224,224,224,224,224
+002f1e 0707
+002f1f 0707
+002f20 0707
+002f21 0707
+002f22 ffff
+002f23 0000
+002f24 0000
+002f25 0000      .DB 7,7,7,7,7,7,7,7,255,255,0,0,0,0,0,0
+002f26 ffff
+002f27 00ff
+002f28 0000
+002f29 0000
+002f2a 0000
+002f2b 0000
+002f2c ff00
+002f2d ffff      .DB 255,255,255,0,0,0,0,0,0,0,0,0,0,255,255,255
+002f2e 0201
+002f2f 4844
+002f30 6050
+002f31 0040
+002f32 0000
+002f33 0000
+002f34 f0f0
+002f35 f0f0      .DB 1,2,68,72,80,96,64,0,0,0,0,0,240,240,240,240
+002f36 0f0f
+002f37 0f0f
+002f38 0000
+002f39 0000
+002f3a 0808
+002f3b 0808
+002f3c 00f8
+002f3d 0000      .DB 15,15,15,15,0,0,0,0,8,8,8,8,248,0,0,0
+002f3e f0f0
+002f3f f0f0
+002f40 0000
+002f41 0000
+002f42 f0f0
+002f43 f0f0
+002f44 0f0f
+002f45 0f0f      .DB 240,240,240,240,0,0,0,0,240,240,240,240,15,15,15,15
+002f46 dde3
+002f47 a9b5
+002f48 dfb3
+002f49 ffe1
+002f4a ffff
+002f4b fbc7
+002f4c bbc3
+002f4d ffc5      .DB 227,221,181,169,179,223,225,255,255,255,199,251,195,187,197,255
+002f4e bfbf
+002f4f 9da3
+002f50 9dbd
+002f51 ffa3
+002f52 ffff
+002f53 bdc3
+002f54 bdbf
+002f55 ffc3      .DB 191,191,163,157,189,157,163,255,255,255,195,189,191,189,195,255
+002f56 fdfd
+002f57 b9c5
+002f58 b9bd
+002f59 ffc5
+002f5a ffff
+002f5b bdc3
+002f5c bf81
+002f5d ffc3      .DB 253,253,197,185,189,185,197,255,255,255,195,189,129,191,195,255
+002f5e edf3
+002f5f 83ef
+002f60 efef
+002f61 ffef
+002f62 ffff
+002f63 b9c5
+002f64 c5b9
+002f65 c3fd      .DB 243,237,239,131,239,239,239,255,255,255,197,185,185,197,253,195
+002f66 bfbf
+002f67 9da3
+002f68 bdbd
+002f69 ffbd
+002f6a fff7
+002f6b f7e7
+002f6c f7f7
+002f6d ffe3      .DB 191,191,163,157,189,189,189,255,247,255,231,247,247,247,227,255
+002f6e fffb
+002f6f fbf3
+002f70 fbfb
+002f71 c7bb
+002f72 bfbf
+002f73 b7bb
+002f74 97af
+002f75 ffbb      .DB 251,255,243,251,251,251,187,199,191,191,187,183,175,151,187,255
+002f76 f7e7
+002f77 f7f7
+002f78 f7f7
+002f79 ffe3
+002f7a ffff
+002f7b b689
+002f7c b6b6
+002f7d ffb6      .DB 231,247,247,247,247,247,227,255,255,255,137,182,182,182,182,255
+002f7e ffff
+002f7f 9da3
+002f80 bdbd
+002f81 ffbd
+002f82 ffff
+002f83 bdc3
+002f84 bdbd
+002f85 ffc3      .DB 255,255,163,157,189,189,189,255,255,255,195,189,189,189,195,255
+002f86 ffff
+002f87 9da3
+002f88 a39d
+002f89 bfbf
+002f8a ffff
+002f8b b9c5
+002f8c c5b9
+002f8d fdfd      .DB 255,255,163,157,157,163,191,191,255,255,197,185,185,197,253,253
+002f8e ffff
+002f8f 9da3
+002f90 bfbf
+002f91 ffbf
+002f92 ffff
+002f93 bfc1
+002f94 fdc3
+002f95 ff83      .DB 255,255,163,157,191,191,191,255,255,255,193,191,195,253,131,255
+002f96 efef
+002f97 ef83
+002f98 edef
+002f99 fff3
+002f9a ffff
+002f9b bdbd
+002f9c b9bd
+002f9d ffc5      .DB 239,239,131,239,239,237,243,255,255,255,189,189,189,185,197,255
+002f9e ffff
+002f9f bdbd
+002fa0 dbbd
+002fa1 ffe7
+002fa2 ffff
+002fa3 b6be
+002fa4 b6b6
+002fa5 ffc9      .DB 255,255,189,189,189,219,231,255,255,255,190,182,182,182,201,255
+002fa6 ffff
+002fa7 dbbd
+002fa8 dbe7
+002fa9 ffbd
+002faa ffff
+002fab bdbd
+002fac c5b9
+002fad c3fd      .DB 255,255,189,219,231,219,189,255,255,255,189,189,185,197,253,195
+002fae ffff
+002faf fb81
+002fb0 dfe7
+002fb1 ff81
+002fb2 dfc3
+002fb3 dfdf
+002fb4 dfdf
+002fb5 ffc3      .DB 255,255,129,251,231,223,129,255,195,223,223,223,223,223,195,255
+002fb6 eff3
+002fb7 c3ef
+002fb8 8fef
+002fb9 ff91
+002fba fbc3
+002fbb fbfb
+002fbc fbfb
+002fbd ffc3      .DB 243,239,239,195,239,143,145,255,195,251,251,251,251,251,195,255
+002fbe f7ff
+002fbf d5e3
+002fc0 f7f7
+002fc1 f7f7
+002fc2 ffff
+002fc3 dfef
+002fc4 df80
+002fc5 ffef      .DB 255,247,227,213,247,247,247,247,255,255,239,223,128,223,239,255
+002fc6 ffff
+002fc7 ffff
+002fc8 ffff
+002fc9 ffff
+002fca f7f7
+002fcb f7f7
+002fcc ffff
+002fcd fff7      .DB 255,255,255,255,255,255,255,255,247,247,247,247,255,255,247,255
+002fce dbdb
+002fcf ffdb
+002fd0 ffff
+002fd1 ffff
+002fd2 dbdb
+002fd3 db81
+002fd4 db81
+002fd5 ffdb      .DB 219,219,219,255,255,255,255,255,219,219,129,219,129,219,219,255
+002fd6 e1f7
+002fd7 e3d7
+002fd8 c3f5
+002fd9 fff7
+002fda 9dff
+002fdb f79b
+002fdc d9ef
+002fdd ffb9      .DB 247,225,215,227,245,195,247,255,255,157,155,247,239,217,185,255
+002fde b7cf
+002fdf cfb7
+002fe0 bbb5
+002fe1 ffc5
+002fe2 f7fb
+002fe3 ffef
+002fe4 ffff
+002fe5 ffff      .DB 207,183,183,207,181,187,197,255,251,247,239,255,255,255,255,255
+002fe6 f7fb
+002fe7 efef
+002fe8 f7ef
+002fe9 fffb
+002fea efdf
+002feb f7f7
+002fec eff7
+002fed ffdf      .DB 251,247,239,239,239,247,251,255,223,239,247,247,247,239,223,255
+002fee d5f7
+002fef c1e3
+002ff0 d5e3
+002ff1 fff7
+002ff2 f7ff
+002ff3 c1f7
+002ff4 f7f7
+002ff5 ffff      .DB 247,213,227,193,227,213,247,255,255,247,247,193,247,247,255,255
+002ff6 ffff
+002ff7 ffff
+002ff8 f7ff
+002ff9 eff7
+002ffa ffff
+002ffb 81ff
+002ffc ffff
+002ffd ffff      .DB 255,255,255,255,255,247,247,239,255,255,255,129,255,255,255,255
+002ffe ffff
+002fff ffff
+003000 e7ff
+003001 ffe7
+003002 fdff
+003003 f7fb
+003004 dfef
+003005 ffbf      .DB 255,255,255,255,255,231,231,255,255,253,251,247,239,223,191,255
+003006 bdc3
+003007 a5b9
+003008 bd9d
+003009 ffc3
+00300a e7f7
+00300b f7d7
+00300c f7f7
+00300d ffc1      .DB 195,189,185,165,157,189,195,255,247,231,215,247,247,247,193,255
+00300e bdc3
+00300f f3fd
+003010 bfcf
+003011 ff81
+003012 bdc3
+003013 e3fd
+003014 bdfd
+003015 ffc3      .DB 195,189,253,243,207,191,129,255,195,189,253,227,253,189,195,255
+003016 f3fb
+003017 dbeb
+003018 fb81
+003019 fffb
+00301a bf81
+00301b fb87
+00301c bbfd
+00301d ffc7      .DB 251,243,235,219,129,251,251,255,129,191,135,251,253,187,199,255
+00301e dfe3
+00301f 83bf
+003020 bdbd
+003021 ffc3
+003022 bd81
+003023 f7fb
+003024 efef
+003025 ffef      .DB 227,223,191,131,189,189,195,255,129,189,251,247,239,239,239,255
+003026 bdc3
+003027 c3bd
+003028 bdbd
+003029 ffc3
+00302a bdc3
+00302b c1bd
+00302c fbfd
+00302d ffc7      .DB 195,189,189,195,189,189,195,255,195,189,189,193,253,251,199,255
+00302e ffff
+00302f fff7
+003030 f7ff
+003031 ffff
+003032 ffff
+003033 fff7
+003034 f7ff
+003035 eff7      .DB 255,255,247,255,255,247,255,255,255,255,247,255,255,247,247,239
+003036 e7f1
+003037 9fcf
+003038 e7cf
+003039 fff1
+00303a ffff
+00303b ff81
+00303c ff81
+00303d ffff      .DB 241,231,207,159,207,231,241,255,255,255,129,255,129,255,255,255
+00303e e78f
+00303f f9f3
+003040 e7f3
+003041 ff8f
+003042 bdc3
+003043 f3fd
+003044 ffef
+003045 ffef      .DB 143,231,243,249,243,231,143,255,195,189,253,243,239,255,239,255
+003046 ffff
+003047 ffff
+003048 ff00
+003049 ffff
+00304a dbe7
+00304b 81bd
+00304c bdbd
+00304d ffbd      .DB 255,255,255,255,0,255,255,255,231,219,189,129,189,189,189,255
+00304e dd83
+00304f c3dd
+003050 dddd
+003051 ff83
+003052 dde3
+003053 bfbf
+003054 ddbf
+003055 ffe3      .DB 131,221,221,195,221,221,131,255,227,221,191,191,191,221,227,255
+003056 db87
+003057 dddd
+003058 dbdd
+003059 ff87
+00305a bf81
+00305b 87bf
+00305c bfbf
+00305d ff81      .DB 135,219,221,221,221,219,135,255,129,191,191,135,191,191,129,255
+00305e bf81
+00305f 87bf
+003060 bfbf
+003061 ffbf
+003062 dde3
+003063 b1bf
+003064 ddbd
+003065 ffe3      .DB 129,191,191,135,191,191,191,255,227,221,191,177,189,221,227,255
+003066 bdbd
+003067 81bd
+003068 bdbd
+003069 ffbd
+00306a f7e3
+00306b f7f7
+00306c f7f7
+00306d ffe3      .DB 189,189,189,129,189,189,189,255,227,247,247,247,247,247,227,255
+00306e fbf1
+00306f fbfb
+003070 bbfb
+003071 ffc7
+003072 bbbd
+003073 8fb7
+003074 bbb7
+003075 ffbd      .DB 241,251,251,251,251,187,199,255,189,187,183,143,183,187,189,255
+003076 bfbf
+003077 bfbf
+003078 bfbf
+003079 ff81
+00307a 99bd
+00307b a5a5
+00307c bdbd
+00307d ffbd      .DB 191,191,191,191,191,191,129,255,189,153,165,165,189,189,189,255
+00307e 9dbd
+00307f b5ad
+003080 bdb9
+003081 ffbd
+003082 dbe7
+003083 bdbd
+003084 dbbd
+003085 ffe7      .DB 189,157,173,181,185,189,189,255,231,219,189,189,189,219,231,255
+003086 bd83
+003087 83bd
+003088 bfbf
+003089 ffbf
+00308a dbe7
+00308b bdbd
+00308c dbb5
+00308d ffe5      .DB 131,189,189,131,191,191,191,255,231,219,189,189,181,219,229,255
+00308e bd83
+00308f 83bd
+003090 bbb7
+003091 ffbd
+003092 bdc3
+003093 c3bf
+003094 bdfd
+003095 ffc3      .DB 131,189,189,131,183,187,189,255,195,189,191,195,253,189,195,255
+003096 f7c1
+003097 f7f7
+003098 f7f7
+003099 fff7
+00309a bdbd
+00309b bdbd
+00309c bdbd
+00309d ffc3      .DB 193,247,247,247,247,247,247,255,189,189,189,189,189,189,195,255
+00309e bdbd
+00309f dbbd
+0030a0 e7db
+0030a1 ffe7
+0030a2 bdbd
+0030a3 a5bd
+0030a4 99a5
+0030a5 ffbd      .DB 189,189,189,219,219,231,231,255,189,189,189,165,165,153,189,255
+0030a6 bdbd
+0030a7 e7db
+0030a8 bddb
+0030a9 ffbd
+0030aa dddd
+0030ab e3dd
+0030ac f7f7
+0030ad fff7      .DB 189,189,219,231,219,189,189,255,221,221,221,227,247,247,247,255
+0030ae fd81
+0030af e7fb
+0030b0 bfdf
+0030b1 ff81
+0030b2 f7f7
+0030b3 f7f7
+0030b4 f700
+0030b5 f7f7      .DB 129,253,251,231,223,191,129,255,247,247,247,247,0,247,247,247
+0030b6 af5f
+0030b7 af5f
+0030b8 af5f
+0030b9 af5f
+0030ba f7f7
+0030bb f7f7
+0030bc f7f7
+0030bd f7f7      .DB 95,175,95,175,95,175,95,175,247,247,247,247,247,247,247,247
+0030be 3333
+0030bf cccc
+0030c0 3333
+0030c1 cccc
+0030c2 9933
+0030c3 66cc
+0030c4 9933
+0030c5 66cc      .DB 51,51,204,204,51,51,204,204,51,153,204,102,51,153,204,102
+0030c6 ffff
+0030c7 ffff
+0030c8 ffff
+0030c9 ffff
+0030ca 0f0f
+0030cb 0f0f
+0030cc 0f0f
+0030cd 0f0f      .DB 255,255,255,255,255,255,255,255,15,15,15,15,15,15,15,15
+0030ce ffff
+0030cf ffff
+0030d0 0000
+0030d1 0000
+0030d2 ff00
+0030d3 ffff
+0030d4 ffff
+0030d5 ffff      .DB 255,255,255,255,0,0,0,0,0,255,255,255,255,255,255,255
+0030d6 ffff
+0030d7 ffff
+0030d8 ffff
+0030d9 00ff
+0030da 7f7f
+0030db 7f7f
+0030dc 7f7f
+0030dd 7f7f      .DB 255,255,255,255,255,255,255,0,127,127,127,127,127,127,127,127
+0030de aa55
+0030df aa55
+0030e0 aa55
+0030e1 aa55
+0030e2 fefe
+0030e3 fefe
+0030e4 fefe
+0030e5 fefe      .DB 85,170,85,170,85,170,85,170,254,254,254,254,254,254,254,254
+0030e6 ffff
+0030e7 ffff
+0030e8 aa55
+0030e9 aa55
+0030ea cc66
+0030eb 3399
+0030ec cc66
+0030ed 3399      .DB 255,255,255,255,85,170,85,170,102,204,153,51,102,204,153,51
+0030ee fcfc
+0030ef fcfc
+0030f0 fcfc
+0030f1 fcfc
+0030f2 f7f7
+0030f3 f7f7
+0030f4 f7f0
+0030f5 f7f7      .DB 252,252,252,252,252,252,252,252,247,247,247,247,240,247,247,247
+0030f6 ffff
+0030f7 ffff
+0030f8 f0f0
+0030f9 f0f0
+0030fa f7f7
+0030fb f7f7
+0030fc fff0
+0030fd ffff      .DB 255,255,255,255,240,240,240,240,247,247,247,247,240,255,255,255
+0030fe ffff
+0030ff ffff
+003100 f707
+003101 f7f7
+003102 ffff
+003103 ffff
+003104 ffff
+003105 0000      .DB 255,255,255,255,7,247,247,247,255,255,255,255,255,255,0,0
+003106 ffff
+003107 ffff
+003108 f7f0
+003109 f7f7
+00310a f7f7
+00310b f7f7
+00310c ff00
+00310d ffff      .DB 255,255,255,255,240,247,247,247,247,247,247,247,0,255,255,255
+00310e ffff
+00310f ffff
+003110 f700
+003111 f7f7
+003112 f7f7
+003113 f7f7
+003114 f707
+003115 f7f7      .DB 255,255,255,255,0,247,247,247,247,247,247,247,7,247,247,247
+003116 3f3f
+003117 3f3f
+003118 3f3f
+003119 3f3f
+00311a 1f1f
+00311b 1f1f
+00311c 1f1f
+00311d 1f1f      .DB 63,63,63,63,63,63,63,63,31,31,31,31,31,31,31,31
+00311e f8f8
+00311f f8f8
+003120 f8f8
+003121 f8f8
+003122 0000
+003123 ffff
+003124 ffff
+003125 ffff      .DB 248,248,248,248,248,248,248,248,0,0,255,255,255,255,255,255
+003126 0000
+003127 ff00
+003128 ffff
+003129 ffff
+00312a ffff
+00312b ffff
+00312c 00ff
+00312d 0000      .DB 0,0,0,255,255,255,255,255,255,255,255,255,255,0,0,0
+00312e fdfe
+00312f b7bb
+003130 9faf
+003131 ffbf
+003132 ffff
+003133 ffff
+003134 0f0f
+003135 0f0f      .DB 254,253,187,183,175,159,191,255,255,255,255,255,15,15,15,15
+003136 f0f0
+003137 f0f0
+003138 ffff
+003139 ffff
+00313a f7f7
+00313b f7f7
+00313c ff07
+00313d ffff      .DB 240,240,240,240,255,255,255,255,247,247,247,247,7,255,255,255
+00313e 0f0f
+00313f 0f0f
+003140 ffff
+003141 ffff
+003142 0f0f
+003143 0f0f
+003144 f0f0
+003145 f0f0      .DB 15,15,15,15,255,255,255,255,15,15,15,15,240,240,240,240
+                 game_rom:
+                 .include "game.asm"
+003146 0000
+003147 0000
+003148 0000
+003149 0000
+00314a 0000
+00314b 0000
+00314c 0000
+00314d 0000      
+00314e 0000
+00314f 0000
+003150 0000
+003151 0000
+003152 0000
+003153 0000
+003154 0000
+003155 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003156 0000
+003157 0000
+003158 0000
+003159 0000
+00315a 0000
+00315b 0000
+00315c 0000
+00315d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00315e 0000
+00315f 0000
+003160 0000
+003161 0000
+003162 0000
+003163 0000
+003164 0000
+003165 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003166 0000
+003167 0000
+003168 0000
+003169 0000
+00316a 0000
+00316b 0000
+00316c 0000
+00316d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00316e 0000
+00316f 0000
+003170 0000
+003171 0000
+003172 0000
+003173 0000
+003174 0000
+003175 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003176 0000
+003177 0000
+003178 0000
+003179 0000
+00317a 0000
+00317b 0000
+00317c 0000
+00317d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00317e 0000
+00317f 0000
+003180 0000
+003181 0000
+003182 0000
+003183 0000
+003184 0000
+003185 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003186 0000
+003187 0000
+003188 0000
+003189 0000
+00318a 0000
+00318b 0000
+00318c 0000
+00318d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00318e 0000
+00318f 0000
+003190 0000
+003191 0000
+003192 0000
+003193 0000
+003194 0000
+003195 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003196 0000
+003197 0000
+003198 0000
+003199 0000
+00319a 0000
+00319b 0000
+00319c 0000
+00319d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00319e 0000
+00319f 0000
+0031a0 0000
+0031a1 0000
+0031a2 0000
+0031a3 0000
+0031a4 0000
+0031a5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0031a6 0000
+0031a7 0000
+0031a8 0000
+0031a9 0000
+0031aa 0000
+0031ab 0000
+0031ac 0000
+0031ad 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0031ae 0000
+0031af 0000
+0031b0 0000
+0031b1 0000
+0031b2 0000
+0031b3 0000
+0031b4 0000
+0031b5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0031b6 0000
+0031b7 0000
+0031b8 0000
+0031b9 0000
+0031ba 0000
+0031bb 0000
+0031bc 0000
+0031bd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0031be 0000
+0031bf 0000
+0031c0 0000
+0031c1 0000
+0031c2 0000
+0031c3 0000
+0031c4 0000
+0031c5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0031c6 0000
+0031c7 0000
+0031c8 0000
+0031c9 0000
+0031ca 0000
+0031cb 0000
+0031cc 0000
+0031cd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0031ce 0000
+0031cf 0000
+0031d0 0000
+0031d1 0000
+0031d2 0000
+0031d3 0000
+0031d4 0000
+0031d5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0031d6 0000
+0031d7 0000
+0031d8 0000
+0031d9 0000
+0031da 0000
+0031db 0000
+0031dc 0000
+0031dd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0031de 0000
+0031df 0000
+0031e0 0000
+0031e1 0000
+0031e2 0000
+0031e3 0000
+0031e4 0000
+0031e5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0031e6 0000
+0031e7 0000
+0031e8 0000
+0031e9 0000
+0031ea 0000
+0031eb 0000
+0031ec 0000
+0031ed 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0031ee 0000
+0031ef 0000
+0031f0 0000
+0031f1 0000
+0031f2 0000
+0031f3 0000
+0031f4 0000
+0031f5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0031f6 0000
+0031f7 0000
+0031f8 0000
+0031f9 0000
+0031fa 0000
+0031fb 0000
+0031fc 0000
+0031fd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0031fe 0000
+0031ff 0000
+003200 0000
+003201 0000
+003202 0000
+003203 0000
+003204 0000
+003205 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003206 0000
+003207 0000
+003208 0000
+003209 0000
+00320a 0000
+00320b 0000
+00320c 0000
+00320d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00320e 0000
+00320f 0000
+003210 0000
+003211 0000
+003212 0000
+003213 0000
+003214 0000
+003215 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003216 0000
+003217 0000
+003218 0000
+003219 0000
+00321a 0000
+00321b 0000
+00321c 0000
+00321d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00321e 0000
+00321f 0000
+003220 0000
+003221 0000
+003222 0000
+003223 0000
+003224 0000
+003225 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003226 0000
+003227 0000
+003228 0000
+003229 0000
+00322a 0000
+00322b 0000
+00322c 0000
+00322d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00322e 0000
+00322f 0000
+003230 0000
+003231 0000
+003232 0000
+003233 0000
+003234 0000
+003235 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003236 0000
+003237 0000
+003238 0000
+003239 0000
+00323a 0000
+00323b 0000
+00323c 0000
+00323d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00323e 0000
+00323f 0000
+003240 0000
+003241 0000
+003242 0000
+003243 0000
+003244 0000
+003245 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003246 0000
+003247 0000
+003248 0000
+003249 0000
+00324a 0000
+00324b 0000
+00324c 0000
+00324d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00324e 0000
+00324f 0000
+003250 0000
+003251 0000
+003252 0000
+003253 0000
+003254 0000
+003255 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003256 0000
+003257 0000
+003258 0000
+003259 0000
+00325a 0000
+00325b 0000
+00325c 0000
+00325d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00325e 0000
+00325f 0000
+003260 0000
+003261 0000
+003262 0000
+003263 0000
+003264 0000
+003265 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003266 0000
+003267 0000
+003268 0000
+003269 0000
+00326a 0000
+00326b 0000
+00326c 0000
+00326d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00326e 0000
+00326f 0000
+003270 0000
+003271 0000
+003272 0000
+003273 0000
+003274 0000
+003275 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003276 0000
+003277 0000
+003278 0000
+003279 0000
+00327a 0000
+00327b 0000
+00327c 0000
+00327d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00327e 0000
+00327f 0000
+003280 0000
+003281 0000
+003282 0000
+003283 0000
+003284 0000
+003285 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003286 0000
+003287 0000
+003288 0000
+003289 0000
+00328a 0000
+00328b 0000
+00328c 0000
+00328d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00328e 0000
+00328f 0000
+003290 0000
+003291 0000
+003292 0000
+003293 0000
+003294 0000
+003295 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003296 0000
+003297 0000
+003298 0000
+003299 0000
+00329a 0000
+00329b 0000
+00329c 0000
+00329d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00329e 0000
+00329f 0000
+0032a0 0000
+0032a1 0000
+0032a2 0000
+0032a3 0000
+0032a4 0000
+0032a5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0032a6 0000
+0032a7 0000
+0032a8 0000
+0032a9 0000
+0032aa 0000
+0032ab 0000
+0032ac 0000
+0032ad 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0032ae 0000
+0032af 0000
+0032b0 0000
+0032b1 0000
+0032b2 0000
+0032b3 0000
+0032b4 0000
+0032b5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0032b6 0000
+0032b7 0000
+0032b8 0000
+0032b9 0000
+0032ba 0000
+0032bb 0000
+0032bc 0000
+0032bd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0032be 0000
+0032bf 0000
+0032c0 0000
+0032c1 0000
+0032c2 0000
+0032c3 0000
+0032c4 0000
+0032c5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0032c6 0000
+0032c7 0000
+0032c8 0000
+0032c9 0000
+0032ca 0000
+0032cb 0000
+0032cc 0000
+0032cd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0032ce 0000
+0032cf 0000
+0032d0 0000
+0032d1 0000
+0032d2 0000
+0032d3 0000
+0032d4 0000
+0032d5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0032d6 0000
+0032d7 0000
+0032d8 0000
+0032d9 0000
+0032da 0000
+0032db 0000
+0032dc 0000
+0032dd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0032de 0000
+0032df 0000
+0032e0 0000
+0032e1 0000
+0032e2 0000
+0032e3 0000
+0032e4 0000
+0032e5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0032e6 0000
+0032e7 0000
+0032e8 0000
+0032e9 0000
+0032ea 0000
+0032eb 0000
+0032ec 0000
+0032ed 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0032ee 0000
+0032ef 0000
+0032f0 0000
+0032f1 0000
+0032f2 0000
+0032f3 0000
+0032f4 0000
+0032f5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0032f6 0000
+0032f7 0000
+0032f8 0000
+0032f9 0000
+0032fa 0000
+0032fb 0000
+0032fc 0000
+0032fd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0032fe 0000
+0032ff 0000
+003300 0000
+003301 0000
+003302 0000
+003303 0000
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+003305 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003306 0000
+003307 0000
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+00330a 0000
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+00330c 0000
+00330d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00330e 0000
+00330f 0000
+003310 0000
+003311 0000
+003312 0000
+003313 0000
+003314 0000
+003315 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003316 0000
+003317 0000
+003318 0000
+003319 0000
+00331a 0000
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+00331c 0000
+00331d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00331e 0000
+00331f 0000
+003320 0000
+003321 0000
+003322 0000
+003323 0000
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+003325 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003326 0000
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+003328 0000
+003329 0000
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+00332d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00332e 0000
+00332f 0000
+003330 0000
+003331 0000
+003332 0000
+003333 0000
+003334 0000
+003335 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003336 0000
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+00333a 0000
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+00333c 0000
+00333d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00333e 0000
+00333f 0000
+003340 0000
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+003343 0000
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+003345 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003346 0000
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+00334a 0000
+00334b 0000
+00334c 0000
+00334d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00334e 0000
+00334f 0000
+003350 0000
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+003352 0000
+003353 0000
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+003355 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003356 0000
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+00335a 0000
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+00335c 0000
+00335d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00335e 0000
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+003360 0000
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+003365 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003366 0000
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+00336a 0000
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+00336c 0000
+00336d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00336e 0000
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+003370 0000
+003371 0000
+003372 0000
+003373 0000
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+003375 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003376 0000
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+003379 0000
+00337a 0000
+00337b 0000
+00337c 0000
+00337d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00337e 0000
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+003380 0000
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+003382 0000
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+003385 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003386 0000
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+003389 0000
+00338a 0000
+00338b 0000
+00338c 0000
+00338d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00338e 0000
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+003390 0000
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+003392 0000
+003393 0000
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+003395 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003396 0000
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+003399 0000
+00339a 0000
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+00339c 0000
+00339d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00339e 0000
+00339f 0000
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+0033a1 0000
+0033a2 0000
+0033a3 0000
+0033a4 0000
+0033a5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0033a6 0000
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+0033aa 0000
+0033ab 0000
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+0033ad 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0033ae 0000
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+0033b0 0000
+0033b1 0000
+0033b2 0000
+0033b3 0000
+0033b4 0000
+0033b5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0033b6 0000
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+0033ba 0000
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+0033bd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0033be 0000
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+0033c1 0000
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+0033c5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0033c6 0000
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+0033ca 0000
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+0033cd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0033ce 0000
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+0033d1 0000
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+0033e1 0000
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+0033e5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
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+0033f0 0000
+0033f1 0000
+0033f2 0000
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+0033f4 0000
+0033f5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
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+0033fa 0000
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+0033fd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0033fe 0000
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+003400 0000
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+003406 0000
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+00340d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
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+003410 0000
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+003415 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003416 0000
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+00341a 0000
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+00341d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00341e 0000
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+003420 0000
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+003426 0000
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+00342a 0000
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+00342d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00342e 0000
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+003430 0000
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+003436 0000
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+00343d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00343e 0000
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+003440 0000
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+003446 0000
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+00344d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00344e 0000
+00344f 0000
+003450 0000
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+003453 0000
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+003455 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003456 0000
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+00345a 0000
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+00345c 0000
+00345d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00345e 0000
+00345f 0000
+003460 0000
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+003466 0000
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+00346a 0000
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+00346c 0000
+00346d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00346e 0000
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+003470 0000
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+003476 0000
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+00347a 0000
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+00347d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00347e 0000
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+003480 0000
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+003486 0000
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+00348d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00348e 0000
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+003490 0000
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+003496 0000
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+0034a1 0000
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+0034b1 0000
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+0034c1 0000
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+003516 0000
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+00356d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00356e 0000
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+003570 0000
+003571 0000
+003572 0000
+003573 0000
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+003575 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003576 0000
+003577 0000
+003578 0000
+003579 0000
+00357a 0000
+00357b 0000
+00357c 0000
+00357d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00357e 0000
+00357f 0000
+003580 0000
+003581 0000
+003582 0000
+003583 0000
+003584 0000
+003585 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003586 0000
+003587 0000
+003588 0000
+003589 0000
+00358a 0000
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+00358c 0000
+00358d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00358e 0000
+00358f 0000
+003590 0000
+003591 0000
+003592 0000
+003593 0000
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+003595 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003596 0000
+003597 0000
+003598 0000
+003599 0000
+00359a 0000
+00359b 0000
+00359c 0000
+00359d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00359e 0000
+00359f 0000
+0035a0 0000
+0035a1 0000
+0035a2 0000
+0035a3 0000
+0035a4 0000
+0035a5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0035a6 0000
+0035a7 0000
+0035a8 0000
+0035a9 0000
+0035aa 0000
+0035ab 0000
+0035ac 0000
+0035ad 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0035ae 0000
+0035af 0000
+0035b0 0000
+0035b1 0000
+0035b2 0000
+0035b3 0000
+0035b4 0000
+0035b5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0035b6 0000
+0035b7 0000
+0035b8 0000
+0035b9 0000
+0035ba 0000
+0035bb 0000
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+0035bd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0035be 0000
+0035bf 0000
+0035c0 0000
+0035c1 0000
+0035c2 0000
+0035c3 0000
+0035c4 0000
+0035c5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0035c6 0000
+0035c7 0000
+0035c8 0000
+0035c9 0000
+0035ca 0000
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+0035cd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0035ce 0000
+0035cf 0000
+0035d0 0000
+0035d1 0000
+0035d2 0000
+0035d3 0000
+0035d4 0000
+0035d5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0035d6 0000
+0035d7 0000
+0035d8 0000
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+0035da 0000
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+0035dd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0035de 0000
+0035df 0000
+0035e0 0000
+0035e1 0000
+0035e2 0000
+0035e3 0000
+0035e4 0000
+0035e5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0035e6 0000
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+0035ea 0000
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+0035ed 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0035ee 0000
+0035ef 0000
+0035f0 0000
+0035f1 0000
+0035f2 0000
+0035f3 0000
+0035f4 0000
+0035f5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0035f6 0000
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+0035fa 0000
+0035fb 0000
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+0035fd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0035fe 0000
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+003600 0000
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+003606 0000
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+00360d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00360e 0000
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+003610 0000
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+003612 0000
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+003615 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003616 0000
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+00361a 0000
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+00361d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00361e 0000
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+003620 0000
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+003626 0000
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+00362a 0000
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+00362d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00362e 0000
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+003630 0000
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+003632 0000
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+003635 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003636 0000
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+00363d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00363e 0000
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+003640 0000
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+003646 0000
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+00364e 0000
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+003650 0000
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+003653 0000
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+003655 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003656 0000
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+00365a 0000
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+00365d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00365e 0000
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+003660 0000
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+003665 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003666 0000
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+00366d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00366e 0000
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+003670 0000
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+003675 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003676 0000
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+00367d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00367e 0000
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+003680 0000
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+003686 0000
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+00368d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00368e 0000
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+003690 0000
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+003696 0000
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+00369d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00369e 0000
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+0036a0 0000
+0036a1 0000
+0036a2 0000
+0036a3 0000
+0036a4 0000
+0036a5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0036a6 0000
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+0036aa 0000
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+0036ae 0000
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+0036b1 0000
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+0036b4 0000
+0036b5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0036b6 0000
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+0036c0 0000
+0036c1 0000
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+0036c5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
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+0036d1 0000
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+0036d6 0000
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+0036e0 0000
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+0036e5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0036e6 0000
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+0036ee 0000
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+0036f0 0000
+0036f1 0000
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+0036f5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0036f6 0000
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+0036fa 0000
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+0036fe 0000
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+003700 0000
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+003706 0000
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+00370a 0000
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+003710 0000
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+003716 0000
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+00371a 0000
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+00371e 0000
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+003720 0000
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+003726 0000
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+003736 0000
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+003746 0000
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+003756 0000
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+003766 0000
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+003776 0000
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+003786 0000
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+003796 0000
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+003846 0000
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+003856 0000
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+003b45 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003b46 0000
+003b47 0000
+003b48 0000
+003b49 0000
+003b4a 0000
+003b4b 0000
+003b4c 0000
+003b4d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003b4e 0000
+003b4f 0000
+003b50 0000
+003b51 0000
+003b52 0000
+003b53 0000
+003b54 0000
+003b55 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003b56 0000
+003b57 0000
+003b58 0000
+003b59 0000
+003b5a 0000
+003b5b 0000
+003b5c 0000
+003b5d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003b5e 0000
+003b5f 0000
+003b60 0000
+003b61 0000
+003b62 0000
+003b63 0000
+003b64 0000
+003b65 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003b66 0000
+003b67 0000
+003b68 0000
+003b69 0000
+003b6a 0000
+003b6b 0000
+003b6c 0000
+003b6d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003b6e 0000
+003b6f 0000
+003b70 0000
+003b71 0000
+003b72 0000
+003b73 0000
+003b74 0000
+003b75 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003b76 0000
+003b77 0000
+003b78 0000
+003b79 0000
+003b7a 0000
+003b7b 0000
+003b7c 0000
+003b7d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003b7e 0000
+003b7f 0000
+003b80 0000
+003b81 0000
+003b82 0000
+003b83 0000
+003b84 0000
+003b85 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003b86 0000
+003b87 0000
+003b88 0000
+003b89 0000
+003b8a 0000
+003b8b 0000
+003b8c 0000
+003b8d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003b8e 0000
+003b8f 0000
+003b90 0000
+003b91 0000
+003b92 0000
+003b93 0000
+003b94 0000
+003b95 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003b96 0000
+003b97 0000
+003b98 0000
+003b99 0000
+003b9a 0000
+003b9b 0000
+003b9c 0000
+003b9d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003b9e 0000
+003b9f 0000
+003ba0 0000
+003ba1 0000
+003ba2 0000
+003ba3 0000
+003ba4 0000
+003ba5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003ba6 0000
+003ba7 0000
+003ba8 0000
+003ba9 0000
+003baa 0000
+003bab 0000
+003bac 0000
+003bad 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003bae 0000
+003baf 0000
+003bb0 0000
+003bb1 0000
+003bb2 0000
+003bb3 0000
+003bb4 0000
+003bb5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003bb6 0000
+003bb7 0000
+003bb8 0000
+003bb9 0000
+003bba 0000
+003bbb 0000
+003bbc 0000
+003bbd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003bbe 0000
+003bbf 0000
+003bc0 0000
+003bc1 0000
+003bc2 0000
+003bc3 0000
+003bc4 0000
+003bc5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003bc6 0000
+003bc7 0000
+003bc8 0000
+003bc9 0000
+003bca 0000
+003bcb 0000
+003bcc 0000
+003bcd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003bce 0000
+003bcf 0000
+003bd0 0000
+003bd1 0000
+003bd2 0000
+003bd3 0000
+003bd4 0000
+003bd5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003bd6 0000
+003bd7 0000
+003bd8 0000
+003bd9 0000
+003bda 0000
+003bdb 0000
+003bdc 0000
+003bdd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003bde 0000
+003bdf 0000
+003be0 0000
+003be1 0000
+003be2 0000
+003be3 0000
+003be4 0000
+003be5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003be6 0000
+003be7 0000
+003be8 0000
+003be9 0000
+003bea 0000
+003beb 0000
+003bec 0000
+003bed 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003bee 0000
+003bef 0000
+003bf0 0000
+003bf1 0000
+003bf2 0000
+003bf3 0000
+003bf4 0000
+003bf5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003bf6 0000
+003bf7 0000
+003bf8 0000
+003bf9 0000
+003bfa 0000
+003bfb 0000
+003bfc 0000
+003bfd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003bfe 0000
+003bff 0000
+003c00 0000
+003c01 0000
+003c02 0000
+003c03 0000
+003c04 0000
+003c05 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003c06 0000
+003c07 0000
+003c08 0000
+003c09 0000
+003c0a 0000
+003c0b 0000
+003c0c 0000
+003c0d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003c0e 0000
+003c0f 0000
+003c10 0000
+003c11 0000
+003c12 0000
+003c13 0000
+003c14 0000
+003c15 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003c16 0000
+003c17 0000
+003c18 0000
+003c19 0000
+003c1a 0000
+003c1b 0000
+003c1c 0000
+003c1d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003c1e 0000
+003c1f 0000
+003c20 0000
+003c21 0000
+003c22 0000
+003c23 0000
+003c24 0000
+003c25 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003c26 0000
+003c27 0000
+003c28 0000
+003c29 0000
+003c2a 0000
+003c2b 0000
+003c2c 0000
+003c2d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003c2e 0000
+003c2f 0000
+003c30 0000
+003c31 0000
+003c32 0000
+003c33 0000
+003c34 0000
+003c35 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003c36 0000
+003c37 0000
+003c38 0000
+003c39 0000
+003c3a 0000
+003c3b 0000
+003c3c 0000
+003c3d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003c3e 0000
+003c3f 0000
+003c40 0000
+003c41 0000
+003c42 0000
+003c43 0000
+003c44 0000
+003c45 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003c46 0000
+003c47 0000
+003c48 0000
+003c49 0000
+003c4a 0000
+003c4b 0000
+003c4c 0000
+003c4d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003c4e 0000
+003c4f 0000
+003c50 0000
+003c51 0000
+003c52 0000
+003c53 0000
+003c54 0000
+003c55 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003c56 0000
+003c57 0000
+003c58 0000
+003c59 0000
+003c5a 0000
+003c5b 0000
+003c5c 0000
+003c5d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003c5e 0000
+003c5f 0000
+003c60 0000
+003c61 0000
+003c62 0000
+003c63 0000
+003c64 0000
+003c65 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003c66 0000
+003c67 0000
+003c68 0000
+003c69 0000
+003c6a 0000
+003c6b 0000
+003c6c 0000
+003c6d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003c6e 0000
+003c6f 0000
+003c70 0000
+003c71 0000
+003c72 0000
+003c73 0000
+003c74 0000
+003c75 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003c76 0000
+003c77 0000
+003c78 0000
+003c79 0000
+003c7a 0000
+003c7b 0000
+003c7c 0000
+003c7d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003c7e 0000
+003c7f 0000
+003c80 0000
+003c81 0000
+003c82 0000
+003c83 0000
+003c84 0000
+003c85 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003c86 0000
+003c87 0000
+003c88 0000
+003c89 0000
+003c8a 0000
+003c8b 0000
+003c8c 0000
+003c8d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003c8e 0000
+003c8f 0000
+003c90 0000
+003c91 0000
+003c92 0000
+003c93 0000
+003c94 0000
+003c95 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003c96 0000
+003c97 0000
+003c98 0000
+003c99 0000
+003c9a 0000
+003c9b 0000
+003c9c 0000
+003c9d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003c9e 0000
+003c9f 0000
+003ca0 0000
+003ca1 0000
+003ca2 0000
+003ca3 0000
+003ca4 0000
+003ca5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003ca6 0000
+003ca7 0000
+003ca8 0000
+003ca9 0000
+003caa 0000
+003cab 0000
+003cac 0000
+003cad 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003cae 0000
+003caf 0000
+003cb0 0000
+003cb1 0000
+003cb2 0000
+003cb3 0000
+003cb4 0000
+003cb5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003cb6 0000
+003cb7 0000
+003cb8 0000
+003cb9 0000
+003cba 0000
+003cbb 0000
+003cbc 0000
+003cbd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003cbe 0000
+003cbf 0000
+003cc0 0000
+003cc1 0000
+003cc2 0000
+003cc3 0000
+003cc4 0000
+003cc5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003cc6 0000
+003cc7 0000
+003cc8 0000
+003cc9 0000
+003cca 0000
+003ccb 0000
+003ccc 0000
+003ccd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003cce 0000
+003ccf 0000
+003cd0 0000
+003cd1 0000
+003cd2 0000
+003cd3 0000
+003cd4 0000
+003cd5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003cd6 0000
+003cd7 0000
+003cd8 0000
+003cd9 0000
+003cda 0000
+003cdb 0000
+003cdc 0000
+003cdd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003cde 0000
+003cdf 0000
+003ce0 0000
+003ce1 0000
+003ce2 0000
+003ce3 0000
+003ce4 0000
+003ce5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003ce6 0000
+003ce7 0000
+003ce8 0000
+003ce9 0000
+003cea 0000
+003ceb 0000
+003cec 0000
+003ced 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003cee 0000
+003cef 0000
+003cf0 0000
+003cf1 0000
+003cf2 0000
+003cf3 0000
+003cf4 0000
+003cf5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003cf6 0000
+003cf7 0000
+003cf8 0000
+003cf9 0000
+003cfa 0000
+003cfb 0000
+003cfc 0000
+003cfd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003cfe 0000
+003cff 0000
+003d00 0000
+003d01 0000
+003d02 0000
+003d03 0000
+003d04 0000
+003d05 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003d06 0000
+003d07 0000
+003d08 0000
+003d09 0000
+003d0a 0000
+003d0b 0000
+003d0c 0000
+003d0d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003d0e 0000
+003d0f 0000
+003d10 0000
+003d11 0000
+003d12 0000
+003d13 0000
+003d14 0000
+003d15 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003d16 0000
+003d17 0000
+003d18 0000
+003d19 0000
+003d1a 0000
+003d1b 0000
+003d1c 0000
+003d1d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003d1e 0000
+003d1f 0000
+003d20 0000
+003d21 0000
+003d22 0000
+003d23 0000
+003d24 0000
+003d25 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003d26 0000
+003d27 0000
+003d28 0000
+003d29 0000
+003d2a 0000
+003d2b 0000
+003d2c 0000
+003d2d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003d2e 0000
+003d2f 0000
+003d30 0000
+003d31 0000
+003d32 0000
+003d33 0000
+003d34 0000
+003d35 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003d36 0000
+003d37 0000
+003d38 0000
+003d39 0000
+003d3a 0000
+003d3b 0000
+003d3c 0000
+003d3d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003d3e 0000
+003d3f 0000
+003d40 0000
+003d41 0000
+003d42 0000
+003d43 0000
+003d44 0000
+003d45 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003d46 0000
+003d47 0000
+003d48 0000
+003d49 0000
+003d4a 0000
+003d4b 0000
+003d4c 0000
+003d4d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003d4e 0000
+003d4f 0000
+003d50 0000
+003d51 0000
+003d52 0000
+003d53 0000
+003d54 0000
+003d55 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003d56 0000
+003d57 0000
+003d58 0000
+003d59 0000
+003d5a 0000
+003d5b 0000
+003d5c 0000
+003d5d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003d5e 0000
+003d5f 0000
+003d60 0000
+003d61 0000
+003d62 0000
+003d63 0000
+003d64 0000
+003d65 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003d66 0000
+003d67 0000
+003d68 0000
+003d69 0000
+003d6a 0000
+003d6b 0000
+003d6c 0000
+003d6d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003d6e 0000
+003d6f 0000
+003d70 0000
+003d71 0000
+003d72 0000
+003d73 0000
+003d74 0000
+003d75 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003d76 0000
+003d77 0000
+003d78 0000
+003d79 0000
+003d7a 0000
+003d7b 0000
+003d7c 0000
+003d7d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003d7e 0000
+003d7f 0000
+003d80 0000
+003d81 0000
+003d82 0000
+003d83 0000
+003d84 0000
+003d85 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003d86 0000
+003d87 0000
+003d88 0000
+003d89 0000
+003d8a 0000
+003d8b 0000
+003d8c 0000
+003d8d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003d8e 0000
+003d8f 0000
+003d90 0000
+003d91 0000
+003d92 0000
+003d93 0000
+003d94 0000
+003d95 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003d96 0000
+003d97 0000
+003d98 0000
+003d99 0000
+003d9a 0000
+003d9b 0000
+003d9c 0000
+003d9d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003d9e 0000
+003d9f 0000
+003da0 0000
+003da1 0000
+003da2 0000
+003da3 0000
+003da4 0000
+003da5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003da6 0000
+003da7 0000
+003da8 0000
+003da9 0000
+003daa 0000
+003dab 0000
+003dac 0000
+003dad 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003dae 0000
+003daf 0000
+003db0 0000
+003db1 0000
+003db2 0000
+003db3 0000
+003db4 0000
+003db5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003db6 0000
+003db7 0000
+003db8 0000
+003db9 0000
+003dba 0000
+003dbb 0000
+003dbc 0000
+003dbd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003dbe 0000
+003dbf 0000
+003dc0 0000
+003dc1 0000
+003dc2 0000
+003dc3 0000
+003dc4 0000
+003dc5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003dc6 0000
+003dc7 0000
+003dc8 0000
+003dc9 0000
+003dca 0000
+003dcb 0000
+003dcc 0000
+003dcd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003dce 0000
+003dcf 0000
+003dd0 0000
+003dd1 0000
+003dd2 0000
+003dd3 0000
+003dd4 0000
+003dd5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003dd6 0000
+003dd7 0000
+003dd8 0000
+003dd9 0000
+003dda 0000
+003ddb 0000
+003ddc 0000
+003ddd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003dde 0000
+003ddf 0000
+003de0 0000
+003de1 0000
+003de2 0000
+003de3 0000
+003de4 0000
+003de5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003de6 0000
+003de7 0000
+003de8 0000
+003de9 0000
+003dea 0000
+003deb 0000
+003dec 0000
+003ded 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003dee 0000
+003def 0000
+003df0 0000
+003df1 0000
+003df2 0000
+003df3 0000
+003df4 0000
+003df5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003df6 0000
+003df7 0000
+003df8 0000
+003df9 0000
+003dfa 0000
+003dfb 0000
+003dfc 0000
+003dfd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003dfe 0000
+003dff 0000
+003e00 0000
+003e01 0000
+003e02 0000
+003e03 0000
+003e04 0000
+003e05 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003e06 0000
+003e07 0000
+003e08 0000
+003e09 0000
+003e0a 0000
+003e0b 0000
+003e0c 0000
+003e0d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003e0e 0000
+003e0f 0000
+003e10 0000
+003e11 0000
+003e12 0000
+003e13 0000
+003e14 0000
+003e15 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003e16 0000
+003e17 0000
+003e18 0000
+003e19 0000
+003e1a 0000
+003e1b 0000
+003e1c 0000
+003e1d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003e1e 0000
+003e1f 0000
+003e20 0000
+003e21 0000
+003e22 0000
+003e23 0000
+003e24 0000
+003e25 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003e26 0000
+003e27 0000
+003e28 0000
+003e29 0000
+003e2a 0000
+003e2b 0000
+003e2c 0000
+003e2d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003e2e 0000
+003e2f 0000
+003e30 0000
+003e31 0000
+003e32 0000
+003e33 0000
+003e34 0000
+003e35 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003e36 0000
+003e37 0000
+003e38 0000
+003e39 0000
+003e3a 0000
+003e3b 0000
+003e3c 0000
+003e3d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003e3e 0000
+003e3f 0000
+003e40 0000
+003e41 0000
+003e42 0000
+003e43 0000
+003e44 0000
+003e45 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003e46 0000
+003e47 0000
+003e48 0000
+003e49 0000
+003e4a 0000
+003e4b 0000
+003e4c 0000
+003e4d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003e4e 0000
+003e4f 0000
+003e50 0000
+003e51 0000
+003e52 0000
+003e53 0000
+003e54 0000
+003e55 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003e56 0000
+003e57 0000
+003e58 0000
+003e59 0000
+003e5a 0000
+003e5b 0000
+003e5c 0000
+003e5d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003e5e 0000
+003e5f 0000
+003e60 0000
+003e61 0000
+003e62 0000
+003e63 0000
+003e64 0000
+003e65 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003e66 0000
+003e67 0000
+003e68 0000
+003e69 0000
+003e6a 0000
+003e6b 0000
+003e6c 0000
+003e6d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003e6e 0000
+003e6f 0000
+003e70 0000
+003e71 0000
+003e72 0000
+003e73 0000
+003e74 0000
+003e75 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003e76 0000
+003e77 0000
+003e78 0000
+003e79 0000
+003e7a 0000
+003e7b 0000
+003e7c 0000
+003e7d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003e7e 0000
+003e7f 0000
+003e80 0000
+003e81 0000
+003e82 0000
+003e83 0000
+003e84 0000
+003e85 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003e86 0000
+003e87 0000
+003e88 0000
+003e89 0000
+003e8a 0000
+003e8b 0000
+003e8c 0000
+003e8d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003e8e 0000
+003e8f 0000
+003e90 0000
+003e91 0000
+003e92 0000
+003e93 0000
+003e94 0000
+003e95 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003e96 0000
+003e97 0000
+003e98 0000
+003e99 0000
+003e9a 0000
+003e9b 0000
+003e9c 0000
+003e9d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003e9e 0000
+003e9f 0000
+003ea0 0000
+003ea1 0000
+003ea2 0000
+003ea3 0000
+003ea4 0000
+003ea5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003ea6 0000
+003ea7 0000
+003ea8 0000
+003ea9 0000
+003eaa 0000
+003eab 0000
+003eac 0000
+003ead 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003eae 0000
+003eaf 0000
+003eb0 0000
+003eb1 0000
+003eb2 0000
+003eb3 0000
+003eb4 0000
+003eb5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003eb6 0000
+003eb7 0000
+003eb8 0000
+003eb9 0000
+003eba 0000
+003ebb 0000
+003ebc 0000
+003ebd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003ebe 0000
+003ebf 0000
+003ec0 0000
+003ec1 0000
+003ec2 0000
+003ec3 0000
+003ec4 0000
+003ec5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003ec6 0000
+003ec7 0000
+003ec8 0000
+003ec9 0000
+003eca 0000
+003ecb 0000
+003ecc 0000
+003ecd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003ece 0000
+003ecf 0000
+003ed0 0000
+003ed1 0000
+003ed2 0000
+003ed3 0000
+003ed4 0000
+003ed5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003ed6 0000
+003ed7 0000
+003ed8 0000
+003ed9 0000
+003eda 0000
+003edb 0000
+003edc 0000
+003edd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003ede 0000
+003edf 0000
+003ee0 0000
+003ee1 0000
+003ee2 0000
+003ee3 0000
+003ee4 0000
+003ee5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003ee6 0000
+003ee7 0000
+003ee8 0000
+003ee9 0000
+003eea 0000
+003eeb 0000
+003eec 0000
+003eed 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003eee 0000
+003eef 0000
+003ef0 0000
+003ef1 0000
+003ef2 0000
+003ef3 0000
+003ef4 0000
+003ef5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003ef6 0000
+003ef7 0000
+003ef8 0000
+003ef9 0000
+003efa 0000
+003efb 0000
+003efc 0000
+003efd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003efe 0000
+003eff 0000
+003f00 0000
+003f01 0000
+003f02 0000
+003f03 0000
+003f04 0000
+003f05 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003f06 0000
+003f07 0000
+003f08 0000
+003f09 0000
+003f0a 0000
+003f0b 0000
+003f0c 0000
+003f0d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003f0e 0000
+003f0f 0000
+003f10 0000
+003f11 0000
+003f12 0000
+003f13 0000
+003f14 0000
+003f15 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003f16 0000
+003f17 0000
+003f18 0000
+003f19 0000
+003f1a 0000
+003f1b 0000
+003f1c 0000
+003f1d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003f1e 0000
+003f1f 0000
+003f20 0000
+003f21 0000
+003f22 0000
+003f23 0000
+003f24 0000
+003f25 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003f26 0000
+003f27 0000
+003f28 0000
+003f29 0000
+003f2a 0000
+003f2b 0000
+003f2c 0000
+003f2d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003f2e 0000
+003f2f 0000
+003f30 0000
+003f31 0000
+003f32 0000
+003f33 0000
+003f34 0000
+003f35 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003f36 0000
+003f37 0000
+003f38 0000
+003f39 0000
+003f3a 0000
+003f3b 0000
+003f3c 0000
+003f3d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003f3e 0000
+003f3f 0000
+003f40 0000
+003f41 0000
+003f42 0000
+003f43 0000
+003f44 0000
+003f45 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003f46 0000
+003f47 0000
+003f48 0000
+003f49 0000
+003f4a 0000
+003f4b 0000
+003f4c 0000
+003f4d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003f4e 0000
+003f4f 0000
+003f50 0000
+003f51 0000
+003f52 0000
+003f53 0000
+003f54 0000
+003f55 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003f56 0000
+003f57 0000
+003f58 0000
+003f59 0000
+003f5a 0000
+003f5b 0000
+003f5c 0000
+003f5d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003f5e 0000
+003f5f 0000
+003f60 0000
+003f61 0000
+003f62 0000
+003f63 0000
+003f64 0000
+003f65 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003f66 0000
+003f67 0000
+003f68 0000
+003f69 0000
+003f6a 0000
+003f6b 0000
+003f6c 0000
+003f6d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003f6e 0000
+003f6f 0000
+003f70 0000
+003f71 0000
+003f72 0000
+003f73 0000
+003f74 0000
+003f75 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003f76 0000
+003f77 0000
+003f78 0000
+003f79 0000
+003f7a 0000
+003f7b 0000
+003f7c 0000
+003f7d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003f7e 0000
+003f7f 0000
+003f80 0000
+003f81 0000
+003f82 0000
+003f83 0000
+003f84 0000
+003f85 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003f86 0000
+003f87 0000
+003f88 0000
+003f89 0000
+003f8a 0000
+003f8b 0000
+003f8c 0000
+003f8d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003f8e 0000
+003f8f 0000
+003f90 0000
+003f91 0000
+003f92 0000
+003f93 0000
+003f94 0000
+003f95 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003f96 0000
+003f97 0000
+003f98 0000
+003f99 0000
+003f9a 0000
+003f9b 0000
+003f9c 0000
+003f9d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003f9e 0000
+003f9f 0000
+003fa0 0000
+003fa1 0000
+003fa2 0000
+003fa3 0000
+003fa4 0000
+003fa5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003fa6 0000
+003fa7 0000
+003fa8 0000
+003fa9 0000
+003faa 0000
+003fab 0000
+003fac 0000
+003fad 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003fae 0000
+003faf 0000
+003fb0 0000
+003fb1 0000
+003fb2 0000
+003fb3 0000
+003fb4 0000
+003fb5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003fb6 0000
+003fb7 0000
+003fb8 0000
+003fb9 0000
+003fba 0000
+003fbb 0000
+003fbc 0000
+003fbd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003fbe 0000
+003fbf 0000
+003fc0 0000
+003fc1 0000
+003fc2 0000
+003fc3 0000
+003fc4 0000
+003fc5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003fc6 0000
+003fc7 0000
+003fc8 0000
+003fc9 0000
+003fca 0000
+003fcb 0000
+003fcc 0000
+003fcd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003fce 0000
+003fcf 0000
+003fd0 0000
+003fd1 0000
+003fd2 0000
+003fd3 0000
+003fd4 0000
+003fd5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003fd6 0000
+003fd7 0000
+003fd8 0000
+003fd9 0000
+003fda 0000
+003fdb 0000
+003fdc 0000
+003fdd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003fde 0000
+003fdf 0000
+003fe0 0000
+003fe1 0000
+003fe2 0000
+003fe3 0000
+003fe4 0000
+003fe5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003fe6 0000
+003fe7 0000
+003fe8 0000
+003fe9 0000
+003fea 0000
+003feb 0000
+003fec 0000
+003fed 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003fee 0000
+003fef 0000
+003ff0 0000
+003ff1 0000
+003ff2 0000
+003ff3 0000
+003ff4 0000
+003ff5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003ff6 0000
+003ff7 0000
+003ff8 0000
+003ff9 0000
+003ffa 0000
+003ffb 0000
+003ffc 0000
+003ffd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+003ffe 0000
+003fff 0000
+004000 0000
+004001 0000
+004002 0000
+004003 0000
+004004 0000
+004005 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+004006 0000
+004007 0000
+004008 0000
+004009 0000
+00400a 0000
+00400b 0000
+00400c 0000
+00400d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00400e 0000
+00400f 0000
+004010 0000
+004011 0000
+004012 0000
+004013 0000
+004014 0000
+004015 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+004016 0000
+004017 0000
+004018 0000
+004019 0000
+00401a 0000
+00401b 0000
+00401c 0000
+00401d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00401e 0000
+00401f 0000
+004020 0000
+004021 0000
+004022 0000
+004023 0000
+004024 0000
+004025 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+004026 0000
+004027 0000
+004028 0000
+004029 0000
+00402a 0000
+00402b 0000
+00402c 0000
+00402d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00402e 0000
+00402f 0000
+004030 0000
+004031 0000
+004032 0000
+004033 0000
+004034 0000
+004035 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+004036 0000
+004037 0000
+004038 0000
+004039 0000
+00403a 0000
+00403b 0000
+00403c 0000
+00403d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00403e 0000
+00403f 0000
+004040 0000
+004041 0000
+004042 0000
+004043 0000
+004044 0000
+004045 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+004046 0000
+004047 0000
+004048 0000
+004049 0000
+00404a 0000
+00404b 0000
+00404c 0000
+00404d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00404e 0000
+00404f 0000
+004050 0000
+004051 0000
+004052 0000
+004053 0000
+004054 0000
+004055 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+004056 0000
+004057 0000
+004058 0000
+004059 0000
+00405a 0000
+00405b 0000
+00405c 0000
+00405d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00405e 0000
+00405f 0000
+004060 0000
+004061 0000
+004062 0000
+004063 0000
+004064 0000
+004065 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+004066 0000
+004067 0000
+004068 0000
+004069 0000
+00406a 0000
+00406b 0000
+00406c 0000
+00406d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00406e 0000
+00406f 0000
+004070 0000
+004071 0000
+004072 0000
+004073 0000
+004074 0000
+004075 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+004076 0000
+004077 0000
+004078 0000
+004079 0000
+00407a 0000
+00407b 0000
+00407c 0000
+00407d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00407e 0000
+00407f 0000
+004080 0000
+004081 0000
+004082 0000
+004083 0000
+004084 0000
+004085 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+004086 0000
+004087 0000
+004088 0000
+004089 0000
+00408a 0000
+00408b 0000
+00408c 0000
+00408d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00408e 0000
+00408f 0000
+004090 0000
+004091 0000
+004092 0000
+004093 0000
+004094 0000
+004095 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+004096 0000
+004097 0000
+004098 0000
+004099 0000
+00409a 0000
+00409b 0000
+00409c 0000
+00409d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00409e 0000
+00409f 0000
+0040a0 0000
+0040a1 0000
+0040a2 0000
+0040a3 0000
+0040a4 0000
+0040a5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0040a6 0000
+0040a7 0000
+0040a8 0000
+0040a9 0000
+0040aa 0000
+0040ab 0000
+0040ac 0000
+0040ad 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0040ae 0000
+0040af 0000
+0040b0 0000
+0040b1 0000
+0040b2 0000
+0040b3 0000
+0040b4 0000
+0040b5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0040b6 0000
+0040b7 0000
+0040b8 0000
+0040b9 0000
+0040ba 0000
+0040bb 0000
+0040bc 0000
+0040bd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0040be 0000
+0040bf 0000
+0040c0 0000
+0040c1 0000
+0040c2 0000
+0040c3 0000
+0040c4 0000
+0040c5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0040c6 0000
+0040c7 0000
+0040c8 0000
+0040c9 0000
+0040ca 0000
+0040cb 0000
+0040cc 0000
+0040cd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0040ce 0000
+0040cf 0000
+0040d0 0000
+0040d1 0000
+0040d2 0000
+0040d3 0000
+0040d4 0000
+0040d5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0040d6 0000
+0040d7 0000
+0040d8 0000
+0040d9 0000
+0040da 0000
+0040db 0000
+0040dc 0000
+0040dd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0040de 0000
+0040df 0000
+0040e0 0000
+0040e1 0000
+0040e2 0000
+0040e3 0000
+0040e4 0000
+0040e5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0040e6 0000
+0040e7 0000
+0040e8 0000
+0040e9 0000
+0040ea 0000
+0040eb 0000
+0040ec 0000
+0040ed 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0040ee 0000
+0040ef 0000
+0040f0 0000
+0040f1 0000
+0040f2 0000
+0040f3 0000
+0040f4 0000
+0040f5 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0040f6 0000
+0040f7 0000
+0040f8 0000
+0040f9 0000
+0040fa 0000
+0040fb 0000
+0040fc 0000
+0040fd 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+0040fe 0000
+0040ff 0000
+004100 0000
+004101 0000
+004102 0000
+004103 0000
+004104 0000
+004105 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+004106 0000
+004107 0000
+004108 0000
+004109 0000
+00410a 0000
+00410b 0000
+00410c 0000
+00410d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00410e 0000
+00410f 0000
+004110 0000
+004111 0000
+004112 0000
+004113 0000
+004114 0000
+004115 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+004116 0000
+004117 0000
+004118 0000
+004119 0000
+00411a 0000
+00411b 0000
+00411c 0000
+00411d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00411e 0000
+00411f 0000
+004120 0000
+004121 0000
+004122 0000
+004123 0000
+004124 0000
+004125 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+004126 0000
+004127 0000
+004128 0000
+004129 0000
+00412a 0000
+00412b 0000
+00412c 0000
+00412d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00412e 0000
+00412f 0000
+004130 0000
+004131 0000
+004132 0000
+004133 0000
+004134 0000
+004135 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+004136 0000
+004137 0000
+004138 0000
+004139 0000
+00413a 0000
+00413b 0000
+00413c 0000
+00413d 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+00413e 0000
+00413f 0000
+004140 0000
+004141 0000
+004142 0000
+004143 0000
+004144 0000
+004145 0000      .DB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+                 
+                 
+                 
+                 
+                 
+                 
+                 
+                 
+                 
+
+
+RESOURCE USE INFORMATION
+------------------------
+
+Notice:
+The register and instruction counts are symbol table hit counts,
+and hence implicitly used resources are not counted, eg, the
+'lpm' instruction without operands implicitly uses r0 and z,
+none of which are counted.
+
+x,y,z are separate entities in the symbol table and are
+counted separately from r26..r31 here.
+
+.dseg memory usage only counts static data declared with .byte
+
+ATmega128 register use summary:
+r0 :   8 r1 :  16 r2 :   0 r3 :   9 r4 :   0 r5 :   0 r6 :   0 r7 :   0 
+r8 :   0 r9 :   1 r10:   1 r11:   5 r12:   5 r13:  74 r14:  23 r15:  31 
+r16: 612 r17: 184 r18:  60 r19:  19 r20:   4 r21:  26 r22:  20 r23:  12 
+r24: 112 r25:   0 r26:  20 r27:  71 r28:  16 r29:  30 r30:  65 r31: 178 
+x  :  40 y  :  18 z  :  73 
+Registers used: 28 out of 35 (80.0%)
+
+ATmega128 instruction use summary:
+.lds  :   0 .sts  :   0 adc   :  15 add   :  12 adiw  :   9 and   :   2 
+andi  :  19 asr   :   0 bclr  :   0 bld   :   0 brbc  :   0 brbs  :   0 
+brcc  :   0 brcs  :   5 break :   0 breq  :  40 brge  :   0 brhc  :   0 
+brhs  :   0 brid  :   0 brie  :   0 brlo  :  49 brlt  :   0 brmi  :   0 
+brne  :  18 brpl  :   0 brsh  :   0 brtc  :   0 brts  :   0 brvc  :   0 
+brvs  :   0 bset  :   0 bst   :   0 call  :   0 cbi   :   7 cbr   :  96 
+clc   :   5 clh   :   0 cli   :   1 cln   :   0 clr   :  41 cls   :   0 
+clt   :   0 clv   :   0 clz   :   0 com   :   0 cp    :   5 cpc   :   0 
+cpi   :  87 cpse  :   0 dec   :  28 elpm  :   0 eor   :   1 fmul  :   0 
+fmuls :   0 fmulsu:   0 icall :   0 ijmp  :   1 in    :  41 inc   :  15 
+jmp   :   0 ld    :  82 ldd   :   0 ldi   : 292 lds   :  11 lpm   :   8 
+lsl   :   3 lsr   :   6 mov   : 138 movw  :   1 mul   :   1 muls  :   0 
+mulsu :   0 neg   :   0 nop   :  21 or    :   2 ori   :   0 out   :  34 
+pop   :  49 push  :  49 rcall : 130 ret   :  34 reti  :   2 rjmp  : 163 
+rol   :   3 ror   :   2 sbc   :   1 sbci  :   0 sbi   :  14 sbic  :   0 
+sbis  :   4 sbiw  :   0 sbr   : 101 sbrc  :  33 sbrs  :  36 sec   :   6 
+seh   :   0 sei   :   1 sen   :   0 ser   :   0 ses   :   0 set   :   0 
+sev   :   0 sez   :   1 sleep :   0 spm   :   0 st    :  42 std   :   0 
+sts   : 147 sub   :   0 subi  :   0 swap  :   0 tst   :  13 wdr   :   0 
+
+Instructions used: 53 out of 114 (46.5%)
+
+ATmega128 memory use summary [bytes]:
+Segment   Begin    End      Code   Data   Used    Size   Use%
+---------------------------------------------------------------
+[.cseg] 0x000000 0x00828c   4168  29184  33352  131072  25.4%
+[.dseg] 0x000100 0x0009da      0   2266   2266    4096  55.3%
+[.eseg] 0x000000 0x000000      0      0      0    4096   0.0%
+
+Assembly complete, 0 errors, 2 warnings
diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/vic20.map b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/vic20.map
new file mode 100644
index 00000000..391e46b6
--- /dev/null
+++ b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/vic20.map
@@ -0,0 +1,1183 @@
+
+AVRASM ver. 2.1.43  VIC20.asm Thu Feb 25 10:51:12 2016
+
+
+EQU  SIGNATURE_000 0000001e
+EQU  SIGNATURE_001 00000097
+EQU  SIGNATURE_002 00000002
+EQU  UCSR1C       0000009d
+EQU  UDR1         0000009c
+EQU  UCSR1A       0000009b
+EQU  UCSR1B       0000009a
+EQU  UBRR1H       00000098
+EQU  UBRR1L       00000099
+EQU  UCSR0C       00000095
+EQU  UBRR0H       00000090
+EQU  TCCR3C       0000008c
+EQU  TCCR3A       0000008b
+EQU  TCCR3B       0000008a
+EQU  TCNT3L       00000088
+EQU  TCNT3H       00000089
+EQU  OCR3AL       00000086
+EQU  OCR3AH       00000087
+EQU  OCR3BL       00000084
+EQU  OCR3BH       00000085
+EQU  OCR3CL       00000082
+EQU  OCR3CH       00000083
+EQU  ICR3L        00000080
+EQU  ICR3H        00000081
+EQU  ETIMSK       0000007d
+EQU  ETIFR        0000007c
+EQU  TCCR1C       0000007a
+EQU  OCR1CL       00000078
+EQU  OCR1CH       00000079
+EQU  TWCR         00000074
+EQU  TWDR         00000073
+EQU  TWAR         00000072
+EQU  TWSR         00000071
+EQU  TWBR         00000070
+EQU  OSCCAL       0000006f
+EQU  XMCRA        0000006d
+EQU  XMCRB        0000006c
+EQU  EICRA        0000006a
+EQU  SPMCSR       00000068
+EQU  PORTG        00000065
+EQU  DDRG         00000064
+EQU  PING         00000063
+EQU  PORTF        00000062
+EQU  DDRF         00000061
+EQU  SREG         0000003f
+EQU  SPL          0000003d
+EQU  SPH          0000003e
+EQU  XDIV         0000003c
+EQU  RAMPZ        0000003b
+EQU  EICRB        0000003a
+EQU  EIMSK        00000039
+EQU  EIFR         00000038
+EQU  TIMSK        00000037
+EQU  TIFR         00000036
+EQU  MCUCR        00000035
+EQU  MCUCSR       00000034
+EQU  TCCR0        00000033
+EQU  TCNT0        00000032
+EQU  OCR0         00000031
+EQU  ASSR         00000030
+EQU  TCCR1A       0000002f
+EQU  TCCR1B       0000002e
+EQU  TCNT1L       0000002c
+EQU  TCNT1H       0000002d
+EQU  OCR1AL       0000002a
+EQU  OCR1AH       0000002b
+EQU  OCR1BL       00000028
+EQU  OCR1BH       00000029
+EQU  ICR1L        00000026
+EQU  ICR1H        00000027
+EQU  TCCR2        00000025
+EQU  TCNT2        00000024
+EQU  OCR2         00000023
+EQU  OCDR         00000022
+EQU  WDTCR        00000021
+EQU  SFIOR        00000020
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+EQU  EEDR         0000001d
+EQU  EECR         0000001c
+EQU  PORTA        0000001b
+EQU  DDRA         0000001a
+EQU  PINA         00000019
+EQU  PORTB        00000018
+EQU  DDRB         00000017
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+EQU  PIND         00000010
+EQU  SPDR         0000000f
+EQU  SPSR         0000000e
+EQU  SPCR         0000000d
+EQU  UDR0         0000000c
+EQU  UCSR0A       0000000b
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+EQU  UBRR0L       00000009
+EQU  ACSR         00000008
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+EQU  ADCH         00000005
+EQU  ADCL         00000004
+EQU  PORTE        00000003
+EQU  DDRE         00000002
+EQU  PINE         00000001
+EQU  PINF         00000000
+EQU  ACME         00000003
+EQU  ACIS0        00000000
+EQU  ACIS1        00000001
+EQU  ACIC         00000002
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+EQU  ACI          00000004
+EQU  ACO          00000005
+EQU  ACBG         00000006
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+EQU  SPDR0        00000000
+EQU  SPDR1        00000001
+EQU  SPDR2        00000002
+EQU  SPDR3        00000003
+EQU  SPDR4        00000004
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+EQU  SPDR6        00000006
+EQU  SPDR7        00000007
+EQU  SPI2X        00000000
+EQU  WCOL         00000006
+EQU  SPIF         00000007
+EQU  SPR0         00000000
+EQU  SPR1         00000001
+EQU  CPHA         00000002
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+EQU  SPE          00000006
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+EQU  I2CR         00000074
+EQU  TWIE         00000000
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+EQU  TWA0         00000001
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+EQU  UDRIE0       00000005
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+EQU  UCSZ00       00000001
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+EQU  UPM00        00000004
+EQU  UPM01        00000005
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+EQU  UBRR10       00000002
+EQU  UBRR11       00000003
+EQU  UBRR0        00000000
+EQU  UBRR1        00000001
+EQU  UBRR2        00000002
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+EQU  UDR10        00000000
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+EQU  UDR14        00000004
+EQU  UDR15        00000005
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+EQU  MPCM1        00000000
+EQU  U2X1         00000001
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+EQU  FE1          00000004
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+EQU  TXC1         00000006
+EQU  RXC1         00000007
+EQU  TXB81        00000000
+EQU  RXB81        00000001
+EQU  UCSZ12       00000002
+EQU  TXEN1        00000003
+EQU  RXEN1        00000004
+EQU  UDRIE1       00000005
+EQU  TXCIE1       00000006
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+EQU  UCPOL1       00000000
+EQU  UCSZ10       00000001
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+EQU  UMSEL1       00000006
+EQU  SREG_C       00000000
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+EQU  SREG_N       00000002
+EQU  SREG_V       00000003
+EQU  SREG_S       00000004
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+EQU  SREG_T       00000006
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+EQU  IVCE         00000000
+EQU  IVSEL        00000001
+EQU  SM2          00000002
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+EQU  SE           00000005
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+EQU  SPMCR        00000068
+EQU  SPMEN        00000000
+EQU  PGERS        00000001
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+EQU  ISC00        00000000
+EQU  ISC01        00000001
+EQU  ISC10        00000002
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+EQU  ISC20        00000004
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+EQU  ISC30        00000006
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+EQU  ISC40        00000000
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+EQU  GICR         00000039
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+EQU  INTF2        00000002
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+EQU  PORTB0       00000000
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+EQU  DDB0         00000000
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+EQU  PINB0        00000000
+EQU  PINB1        00000001
+EQU  PINB2        00000002
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+EQU  PORTC0       00000000
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+EQU  PORTC1       00000001
+EQU  PC1          00000001
+EQU  PORTC2       00000002
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+EQU  DDC0         00000000
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+EQU  DDC5         00000005
+EQU  DDC6         00000006
+EQU  DDC7         00000007
+EQU  PINC0        00000000
+EQU  PINC1        00000001
+EQU  PINC2        00000002
+EQU  PINC3        00000003
+EQU  PINC4        00000004
+EQU  PINC5        00000005
+EQU  PINC6        00000006
+EQU  PINC7        00000007
+EQU  PORTD0       00000000
+EQU  PD0          00000000
+EQU  PORTD1       00000001
+EQU  PD1          00000001
+EQU  PORTD2       00000002
+EQU  PD2          00000002
+EQU  PORTD3       00000003
+EQU  PD3          00000003
+EQU  PORTD4       00000004
+EQU  PD4          00000004
+EQU  PORTD5       00000005
+EQU  PD5          00000005
+EQU  PORTD6       00000006
+EQU  PD6          00000006
+EQU  PORTD7       00000007
+EQU  PD7          00000007
+EQU  DDD0         00000000
+EQU  DDD1         00000001
+EQU  DDD2         00000002
+EQU  DDD3         00000003
+EQU  DDD4         00000004
+EQU  DDD5         00000005
+EQU  DDD6         00000006
+EQU  DDD7         00000007
+EQU  PIND0        00000000
+EQU  PIND1        00000001
+EQU  PIND2        00000002
+EQU  PIND3        00000003
+EQU  PIND4        00000004
+EQU  PIND5        00000005
+EQU  PIND6        00000006
+EQU  PIND7        00000007
+EQU  PORTE0       00000000
+EQU  PE0          00000000
+EQU  PORTE1       00000001
+EQU  PE1          00000001
+EQU  PORTE2       00000002
+EQU  PE2          00000002
+EQU  PORTE3       00000003
+EQU  PE3          00000003
+EQU  PORTE4       00000004
+EQU  PE4          00000004
+EQU  PORTE5       00000005
+EQU  PE5          00000005
+EQU  PORTE6       00000006
+EQU  PE6          00000006
+EQU  PORTE7       00000007
+EQU  PE7          00000007
+EQU  DDE0         00000000
+EQU  DDE1         00000001
+EQU  DDE2         00000002
+EQU  DDE3         00000003
+EQU  DDE4         00000004
+EQU  DDE5         00000005
+EQU  DDE6         00000006
+EQU  DDE7         00000007
+EQU  PINE0        00000000
+EQU  PINE1        00000001
+EQU  PINE2        00000002
+EQU  PINE3        00000003
+EQU  PINE4        00000004
+EQU  PINE5        00000005
+EQU  PINE6        00000006
+EQU  PINE7        00000007
+EQU  PORTF0       00000000
+EQU  PF0          00000000
+EQU  PORTF1       00000001
+EQU  PF1          00000001
+EQU  PORTF2       00000002
+EQU  PF2          00000002
+EQU  PORTF3       00000003
+EQU  PF3          00000003
+EQU  PORTF4       00000004
+EQU  PF4          00000004
+EQU  PORTF5       00000005
+EQU  PF5          00000005
+EQU  PORTF6       00000006
+EQU  PF6          00000006
+EQU  PORTF7       00000007
+EQU  PF7          00000007
+EQU  DDF0         00000000
+EQU  DDF1         00000001
+EQU  DDF2         00000002
+EQU  DDF3         00000003
+EQU  DDF4         00000004
+EQU  DDF5         00000005
+EQU  DDF6         00000006
+EQU  DDF7         00000007
+EQU  PINF0        00000000
+EQU  PINF1        00000001
+EQU  PINF2        00000002
+EQU  PINF3        00000003
+EQU  PINF4        00000004
+EQU  PINF5        00000005
+EQU  PINF6        00000006
+EQU  PINF7        00000007
+EQU  PORTG0       00000000
+EQU  PG0          00000000
+EQU  PORTG1       00000001
+EQU  PG1          00000001
+EQU  PORTG2       00000002
+EQU  PG2          00000002
+EQU  PORTG3       00000003
+EQU  PG3          00000003
+EQU  PORTG4       00000004
+EQU  PG4          00000004
+EQU  DDG0         00000000
+EQU  DDG1         00000001
+EQU  DDG2         00000002
+EQU  DDG3         00000003
+EQU  DDG4         00000004
+EQU  PING0        00000000
+EQU  PING1        00000001
+EQU  PING2        00000002
+EQU  PING3        00000003
+EQU  PING4        00000004
+EQU  CS00         00000000
+EQU  CS01         00000001
+EQU  CS02         00000002
+EQU  WGM01        00000003
+EQU  CTC0         00000003
+EQU  COM00        00000004
+EQU  COM01        00000005
+EQU  WGM00        00000006
+EQU  PWM0         00000006
+EQU  FOC0         00000007
+EQU  TCNT0_0      00000000
+EQU  TCNT0_1      00000001
+EQU  TCNT0_2      00000002
+EQU  TCNT0_3      00000003
+EQU  TCNT0_4      00000004
+EQU  TCNT0_5      00000005
+EQU  TCNT0_6      00000006
+EQU  TCNT0_7      00000007
+EQU  OCR0_0       00000000
+EQU  OCR0_1       00000001
+EQU  OCR0_2       00000002
+EQU  OCR0_3       00000003
+EQU  OCR0_4       00000004
+EQU  OCR0_5       00000005
+EQU  OCR0_6       00000006
+EQU  OCR0_7       00000007
+EQU  TCR0UB       00000000
+EQU  OCR0UB       00000001
+EQU  TCN0UB       00000002
+EQU  AS0          00000003
+EQU  TOIE0        00000000
+EQU  OCIE0        00000001
+EQU  TOV0         00000000
+EQU  OCF0         00000001
+EQU  TOIE1        00000002
+EQU  OCIE1B       00000003
+EQU  OCIE1A       00000004
+EQU  TICIE1       00000005
+EQU  OCIE1C       00000000
+EQU  TOV1         00000002
+EQU  OCF1B        00000003
+EQU  OCF1A        00000004
+EQU  ICF1         00000005
+EQU  OCF1C        00000000
+EQU  WGM10        00000000
+EQU  PWM10        00000000
+EQU  WGM11        00000001
+EQU  PWM11        00000001
+EQU  COM1C0       00000002
+EQU  COM1C1       00000003
+EQU  COM1B0       00000004
+EQU  COM1B1       00000005
+EQU  COM1A0       00000006
+EQU  COM1A1       00000007
+EQU  CS10         00000000
+EQU  CS11         00000001
+EQU  CS12         00000002
+EQU  WGM12        00000003
+EQU  CTC10        00000003
+EQU  WGM13        00000004
+EQU  CTC11        00000004
+EQU  ICES1        00000006
+EQU  ICNC1        00000007
+EQU  FOC1C        00000005
+EQU  FOC1B        00000006
+EQU  FOC1A        00000007
+EQU  CS20         00000000
+EQU  CS21         00000001
+EQU  CS22         00000002
+EQU  WGM21        00000003
+EQU  CTC2         00000003
+EQU  COM20        00000004
+EQU  COM21        00000005
+EQU  WGM20        00000006
+EQU  PWM2         00000006
+EQU  FOC2         00000007
+EQU  TCNT2_0      00000000
+EQU  TCNT2_1      00000001
+EQU  TCNT2_2      00000002
+EQU  TCNT2_3      00000003
+EQU  TCNT2_4      00000004
+EQU  TCNT2_5      00000005
+EQU  TCNT2_6      00000006
+EQU  TCNT2_7      00000007
+EQU  OCR2_0       00000000
+EQU  OCR2_1       00000001
+EQU  OCR2_2       00000002
+EQU  OCR2_3       00000003
+EQU  OCR2_4       00000004
+EQU  OCR2_5       00000005
+EQU  OCR2_6       00000006
+EQU  OCR2_7       00000007
+EQU  TOIE2        00000006
+EQU  OCIE2        00000007
+EQU  TOV2         00000006
+EQU  OCF2         00000007
+EQU  OCIE3C       00000001
+EQU  TOIE3        00000002
+EQU  OCIE3B       00000003
+EQU  OCIE3A       00000004
+EQU  TICIE3       00000005
+EQU  OCF3C        00000001
+EQU  TOV3         00000002
+EQU  OCF3B        00000003
+EQU  OCF3A        00000004
+EQU  ICF3         00000005
+EQU  WGM30        00000000
+EQU  PWM30        00000000
+EQU  WGM31        00000001
+EQU  PWM31        00000001
+EQU  COM3C0       00000002
+EQU  COM3C1       00000003
+EQU  COM3B0       00000004
+EQU  COM3B1       00000005
+EQU  COM3A0       00000006
+EQU  COM3A1       00000007
+EQU  CS30         00000000
+EQU  CS31         00000001
+EQU  CS32         00000002
+EQU  WGM32        00000003
+EQU  CTC30        00000003
+EQU  WGM33        00000004
+EQU  CTC31        00000004
+EQU  ICES3        00000006
+EQU  ICNC3        00000007
+EQU  FOC3C        00000005
+EQU  FOC3B        00000006
+EQU  FOC3A        00000007
+EQU  TCN3L0       00000000
+EQU  TCN3L1       00000001
+EQU  TCN3L2       00000002
+EQU  TCN3L3       00000003
+EQU  TCN3L4       00000004
+EQU  TCN3L5       00000005
+EQU  TCN3L6       00000006
+EQU  TCN3L7       00000007
+EQU  WDTCSR       00000021
+EQU  WDP0         00000000
+EQU  WDP1         00000001
+EQU  WDP2         00000002
+EQU  WDE          00000003
+EQU  WDCE         00000004
+EQU  WDTOE        00000004
+EQU  MUX0         00000000
+EQU  MUX1         00000001
+EQU  MUX2         00000002
+EQU  MUX3         00000003
+EQU  MUX4         00000004
+EQU  ADLAR        00000005
+EQU  REFS0        00000006
+EQU  REFS1        00000007
+EQU  ADCSR        00000006
+EQU  ADPS0        00000000
+EQU  ADPS1        00000001
+EQU  ADPS2        00000002
+EQU  ADIE         00000003
+EQU  ADIF         00000004
+EQU  ADFR         00000005
+EQU  ADSC         00000006
+EQU  ADEN         00000007
+EQU  ADCH0        00000000
+EQU  ADCH1        00000001
+EQU  ADCH2        00000002
+EQU  ADCH3        00000003
+EQU  ADCH4        00000004
+EQU  ADCH5        00000005
+EQU  ADCH6        00000006
+EQU  ADCH7        00000007
+EQU  ADCL0        00000000
+EQU  ADCL1        00000001
+EQU  ADCL2        00000002
+EQU  ADCL3        00000003
+EQU  ADCL4        00000004
+EQU  ADCL5        00000005
+EQU  ADCL6        00000006
+EQU  ADCL7        00000007
+EQU  LB1          00000000
+EQU  LB2          00000001
+EQU  BLB01        00000002
+EQU  BLB02        00000003
+EQU  BLB11        00000004
+EQU  BLB12        00000005
+EQU  CKSEL0       00000000
+EQU  CKSEL1       00000001
+EQU  CKSEL2       00000002
+EQU  CKSEL3       00000003
+EQU  SUT0         00000004
+EQU  SUT1         00000005
+EQU  BODEN        00000006
+EQU  BODLEVEL     00000007
+EQU  BOOTRST      00000000
+EQU  BOOTSZ0      00000001
+EQU  BOOTSZ1      00000002
+EQU  EESAVE       00000003
+EQU  CKOPT        00000004
+EQU  SPIEN        00000005
+EQU  JTAGEN       00000006
+EQU  OCDEN        00000007
+EQU  WDTON        00000000
+EQU  M103C        00000001
+DEF  XH           r27
+DEF  XL           r26
+DEF  YH           r29
+DEF  YL           r28
+DEF  ZH           r31
+DEF  ZL           r30
+EQU  FLASHEND     0000ffff
+EQU  IOEND        000000ff
+EQU  SRAM_START   00000100
+EQU  SRAM_SIZE    00001000
+EQU  RAMEND       000010ff
+EQU  XRAMEND      0000ffff
+EQU  E2END        00000fff
+EQU  EEPROMEND    00000fff
+EQU  EEADRBITS    0000000c
+EQU  NRWW_START_ADDR 0000f000
+EQU  NRWW_STOP_ADDR 0000ffff
+EQU  RWW_START_ADDR 00000000
+EQU  RWW_STOP_ADDR 0000efff
+EQU  PAGESIZE     00000080
+EQU  FIRSTBOOTSTART 0000fe00
+EQU  SECONDBOOTSTART 0000fc00
+EQU  THIRDBOOTSTART 0000f800
+EQU  FOURTHBOOTSTART 0000f000
+EQU  SMALLBOOTSTART 0000fe00
+EQU  LARGEBOOTSTART 0000f000
+EQU  INT0addr     00000002
+EQU  INT1addr     00000004
+EQU  INT2addr     00000006
+EQU  INT3addr     00000008
+EQU  INT4addr     0000000a
+EQU  INT5addr     0000000c
+EQU  INT6addr     0000000e
+EQU  INT7addr     00000010
+EQU  OC2addr      00000012
+EQU  OVF2addr     00000014
+EQU  ICP1addr     00000016
+EQU  OC1Aaddr     00000018
+EQU  OC1Baddr     0000001a
+EQU  OVF1addr     0000001c
+EQU  OC0addr      0000001e
+EQU  OVF0addr     00000020
+EQU  SPIaddr      00000022
+EQU  URXC0addr    00000024
+EQU  UDRE0addr    00000026
+EQU  UTXC0addr    00000028
+EQU  ADCCaddr     0000002a
+EQU  ERDYaddr     0000002c
+EQU  ACIaddr      0000002e
+EQU  OC1Caddr     00000030
+EQU  ICP3addr     00000032
+EQU  OC3Aaddr     00000034
+EQU  OC3Baddr     00000036
+EQU  OC3Caddr     00000038
+EQU  OVF3addr     0000003a
+EQU  URXC1addr    0000003c
+EQU  UDRE1addr    0000003e
+EQU  UTXC1addr    00000040
+EQU  TWIaddr      00000042
+EQU  SPMRaddr     00000044
+EQU  INT_VECTORS_SIZE 00000046
+EQU  bias_port    00000065
+EQU  bias_ctrl    00000003
+EQU  bias_adj     00000004
+EQU  A0           00000007
+EQU  WR           00000005
+EQU  LCS          00000006
+EQU  RD           00000004
+EQU  LCD_RST      00000007
+EQU  lcd_pins     00000003
+EQU  lcd_data     00000018
+EQU  chars_line   00000050
+EQU  lines_screen 00000019
+DEF  buff_head    r9
+DEF  buff_tail    r10
+DEF  cus_x        r11
+DEF  cus_y        r12
+DSEG serial_buff  00000100
+DSEG vram_text    00000200
+DSEG vram_address 000009d0
+EQU  kernal_start 0000e000
+EQU  basic_start  0000c000
+EQU  char_start   00008000
+EQU  game_start   0000a000
+EQU  Os           00000006
+EQU  Ds           00000003
+EQU  Is           00000007
+EQU  Bs           00000004
+EQU  Cs           00000000
+EQU  Zs           00000001
+EQU  Ns           00000002
+DEF  stack        r15
+DEF  Pstat1       r13
+DEF  Pstat2       r14
+DEF  A            r21
+DEF  Xr           r22
+DEF  Yr           r23
+DEF  PL           r26
+DEF  PH           r27
+DEF  retL         r24
+DEF  retH         r25
+DEF  zero_reg     r3
+DEF  breakL       r4
+DEF  breakH       r5
+DSEG emu_status   000009d2
+DSEG last_I       000009d3
+DSEG last_PC      000009d7
+DSEG last_rsbyte  000009d9
+EQU  high_test    00000011
+EQU  rom_start    00000080
+EQU  VIAS         00000091
+EQU  sb_mask      00000040
+CSEG start        00000025
+CSEG timer0_cmp   00000115
+CSEG rx_rs232_0   0000012d
+CSEG k            00000029
+CSEG init_hardware 0000078b
+CSEG load_chars_lcd 000000c8
+CSEG load_kernal  00000094
+CSEG load_basic   000000a1
+CSEG load_chars   000000bb
+CSEG load_game    000000ae
+CSEG skip         00000030
+CSEG dohack1@st_cpuZ@1626 00000054
+CSEG exit1@st_cpuZ@1626 0000005d
+CSEG dohack1@st_cpuZ@1655 00000066
+CSEG exit1@st_cpuZ@1655 0000006f
+CSEG next_op      00000071
+CSEG Interupt_IRQ 00000167
+CSEG opcode_jmps  00000846
+CSEG breakpret    00000079
+CSEG dohack1@get_pc_mem@1714 0000007d
+CSEG exit1@get_pc_mem@1714 00000086
+CSEG breakp       00000090
+CSEG kernal_rom   00000946
+CSEG load_kernal_loop1 00000099
+CSEG load_kernal_loop2 0000009a
+CSEG basic_rom    00001946
+CSEG load_basic_loop1 000000a6
+CSEG load_basic_loop2 000000a7
+CSEG game_rom     00003146
+CSEG load_game_loop1 000000b3
+CSEG load_game_loop2 000000b4
+CSEG char_rom     00002946
+CSEG load_char_loop1 000000c0
+CSEG load_char_loop2 000000c1
+CSEG lcd_send_data 00000746
+CSEG load_chars_lcd_loop1 000000d9
+CSEG load_chars_lcd_loop2 000000da
+CSEG lcd_refresh  000000e1
+CSEG lcd_refresh_loop1 000000ef
+CSEG cursor_address 000006e2
+CSEG lcd_set_cursor 000006ed
+CSEG lcd_refresh_loop2 000000f6
+CSEG dohack1@ld_cpuZp@1929 000000fa
+CSEG exit1@ld_cpuZp@1929 00000103
+CSEG dohack1@st_cpuZ@2029 0000013e
+CSEG exit1@st_cpuZ@2029 00000147
+CSEG dohack1@st_cpuZ@2061 00000152
+CSEG exit1@st_cpuZ@2061 0000015b
+CSEG qwe          0000015b
+CSEG rs232_0_tx   00000162
+CSEG delay_1ms    000001bf
+CSEG stack_build  000006c9
+CSEG vias_access  00000199
+CSEG keyboard_read 000001a3
+CSEG vias_access_exit 0000019f
+CSEG keyboard_read_loop1 000001ae
+CSEG keyboard_read_loop1_exit 000001b3
+CSEG keyboard_read_set_row 000001b6
+CSEG keyboard_read_loop2 000001b8
+CSEG keyboard_read_loop2_exit 000001be
+CSEG delay_1ms1   000001c2
+CSEG delay_1ms1_loop 000001c3
+CSEG delay_100ms  000001cd
+CSEG delay_100ms_loop 000001cf
+EQU  ZP_offset    00000000
+CSEG op_ORA       000001d4
+CSEG get_value_01 00000509
+CSEG op_AND       000001d9
+CSEG op_EOR       000001de
+CSEG op_ADC       000001e3
+CSEG op_STA       000001f0
+CSEG dohack1@st_cpuZ@2432 000001fa
+CSEG exit1@st_cpuZ@2432 00000203
+CSEG op_LDA       00000204
+CSEG op_CMP       00000213
+CSEG op_SBC       0000021b
+CSEG op_ASL       00000230
+CSEG get_value_10 0000051a
+CSEG dohack1@st_cpuZ@2570 0000023b
+CSEG exit1@st_cpuZ@2570 00000244
+CSEG op_ROL       00000245
+CSEG dohack1@st_cpuZ@2606 00000251
+CSEG exit1@st_cpuZ@2606 0000025a
+CSEG op_LSR       0000025b
+CSEG dohack1@st_cpuZ@2640 00000266
+CSEG exit1@st_cpuZ@2640 0000026f
+CSEG op_ROR       00000270
+CSEG dohack1@st_cpuZ@2674 0000027c
+CSEG exit1@st_cpuZ@2674 00000285
+CSEG op_STX       00000286
+CSEG dohack1@st_cpuZ@2707 00000290
+CSEG exit1@st_cpuZ@2707 00000299
+CSEG op_LDX       0000029a
+CSEG op_DEC       000002a9
+CSEG dohack1@st_cpuZ@2771 000002b5
+CSEG exit1@st_cpuZ@2771 000002be
+CSEG op_INC       000002bf
+CSEG dohack1@st_cpuZ@2806 000002cb
+CSEG exit1@st_cpuZ@2806 000002d4
+CSEG op_BIT       000002d5
+CSEG op_JMP       000002e6
+CSEG dohack1@get_pc_mem@2866 000002ea
+CSEG exit1@get_pc_mem@2866 000002f3
+CSEG dohack1@get_pc_mem@2889 000002f7
+CSEG exit1@get_pc_mem@2889 00000300
+CSEG op_JMPI      00000303
+CSEG dohack1@get_pc_mem@2919 00000307
+CSEG exit1@get_pc_mem@2919 00000310
+CSEG dohack1@get_pc_mem@2942 00000314
+CSEG exit1@get_pc_mem@2942 0000031d
+CSEG dohack1@ld_cpuY@2965 00000321
+CSEG exit1@ld_cpuY@2965 0000032a
+CSEG dohack1@ld_cpuY@2993 0000032f
+CSEG exit1@ld_cpuY@2993 00000338
+CSEG op_STY       00000339
+CSEG dohack1@st_cpuZ@3025 00000343
+CSEG exit1@st_cpuZ@3025 0000034c
+CSEG op_LDY       0000034d
+CSEG op_CPY       0000035c
+CSEG op_CPX       00000364
+CSEG op_BPL       0000036c
+CSEG Branch_take  000006b5
+CSEG op_BMI       00000371
+CSEG op_BVC       00000376
+CSEG op_BVS       0000037b
+CSEG op_BCC       00000380
+CSEG op_BCS       00000385
+CSEG op_BNE       0000038a
+CSEG op_BEQ       0000038f
+CSEG op_BRK       00000394
+CSEG op_JSRA      00000399
+CSEG dohack1@get_pc_mem@3184 0000039d
+CSEG exit1@get_pc_mem@3184 000003a6
+CSEG dohack1@get_pc_mem@3251 000003c2
+CSEG exit1@get_pc_mem@3251 000003cb
+CSEG op_RTI       000003ce
+CSEG stack_decomp 000006d0
+CSEG op_RTS       000003f6
+CSEG op_ASL_A     00000410
+CSEG op_ROL_A     00000413
+CSEG op_LSR_A     00000417
+CSEG op_ROR_A     0000041a
+CSEG op_STX_ZPY   0000041e
+CSEG get_value_ZP_idx_Y 0000062f
+CSEG dohack1@st_cpuZ@3435 00000428
+CSEG exit1@st_cpuZ@3435 00000431
+CSEG op_LDX_ZPY   00000432
+CSEG op_LDX_XY    00000441
+CSEG get_value_ZP_abs_idx_Y 00000653
+CSEG op_PHP       00000450
+CSEG op_PLP       0000045e
+CSEG op_PHA       0000046c
+CSEG op_PLA       00000479
+CSEG op_DEY       00000492
+CSEG op_TAY       00000496
+CSEG op_INY       000004a4
+CSEG op_INX       000004a8
+CSEG op_CLC       000004ac
+CSEG op_SEC       000004b0
+CSEG op_CLI       000004b4
+CSEG op_SEI       000004b8
+CSEG op_TYA       000004bc
+CSEG op_CLV       000004ca
+CSEG op_CLD       000004ce
+CSEG op_SED       000004d2
+CSEG op_TXA       000004d6
+CSEG op_TXS       000004e4
+CSEG op_TAX       000004e6
+CSEG op_TSX       000004f4
+CSEG op_DEX       00000502
+CSEG op_NOP       00000506
+CSEG get_value_ZP_inx_X_indirj 00000527
+CSEG get_value_ZPj 00000528
+CSEG get_value_imedj 00000529
+CSEG get_value_absj 0000052a
+CSEG get_value_ZP_indir_idx_Yj 0000052b
+CSEG get_value_ZP_idx_Xj 0000052c
+CSEG get_value_ZP_abs_idx_Yj 0000052e
+CSEG get_value_ZP_abs_idx_Xj 0000052f
+CSEG get_value_accumj 00000530
+CSEG get_value_ZP_inx_X_indir 00000531
+CSEG get_value_ZP 0000056f
+CSEG get_value_imed 00000591
+CSEG get_value_abs 0000059f
+CSEG get_value_ZP_indir_idx_Y 000005cd
+CSEG get_value_ZP_idx_X 0000060b
+CSEG get_value_ZP_idx_Yj 0000052d
+CSEG get_value_ZP_abs_idx_X 00000683
+CSEG get_value_accum 000006b3
+CSEG dohack1@get_pc_mem@3930 00000536
+CSEG exit1@get_pc_mem@3930 0000053f
+CSEG dohack1@ld_cpuYp@3956 00000545
+CSEG exit1@ld_cpuYp@3956 0000054e
+CSEG dohack1@ld_cpuY@3978 00000552
+CSEG exit1@ld_cpuY@3978 0000055b
+CSEG dohack1@ld_cpuZ@4006 00000562
+CSEG hardware@ld_cpuZ@4006 0000056c
+CSEG exit1@ld_cpuZ@4006 0000056e
+CSEG dohack1@get_pc_mem@4045 00000574
+CSEG exit1@get_pc_mem@4045 0000057d
+CSEG dohack1@ld_cpuZ@4069 00000584
+CSEG hardware@ld_cpuZ@4069 0000058e
+CSEG exit1@ld_cpuZ@4069 00000590
+CSEG dohack1@get_pc_mem@4106 00000595
+CSEG exit1@get_pc_mem@4106 0000059e
+CSEG dohack1@get_pc_mem@4132 000005a3
+CSEG exit1@get_pc_mem@4132 000005ac
+CSEG dohack1@get_pc_mem@4155 000005b0
+CSEG exit1@get_pc_mem@4155 000005b9
+CSEG dohack1@ld_cpuZ@4179 000005c0
+CSEG hardware@ld_cpuZ@4179 000005ca
+CSEG exit1@ld_cpuZ@4179 000005cc
+CSEG dohack1@get_pc_mem@4216 000005d2
+CSEG exit1@get_pc_mem@4216 000005db
+CSEG dohack1@ld_cpuYp@4240 000005df
+CSEG exit1@ld_cpuYp@4240 000005e8
+CSEG dohack1@ld_cpuY@4262 000005ec
+CSEG exit1@ld_cpuY@4262 000005f5
+CSEG dohack1@ld_cpuZ@4293 000005fe
+CSEG hardware@ld_cpuZ@4293 00000608
+CSEG exit1@ld_cpuZ@4293 0000060a
+CSEG dohack1@get_pc_mem@4330 00000610
+CSEG exit1@get_pc_mem@4330 00000619
+CSEG dohack1@ld_cpuZ@4357 00000622
+CSEG hardware@ld_cpuZ@4357 0000062c
+CSEG exit1@ld_cpuZ@4357 0000062e
+CSEG dohack1@get_pc_mem@4395 00000634
+CSEG exit1@get_pc_mem@4395 0000063d
+CSEG dohack1@ld_cpuZ@4422 00000646
+CSEG hardware@ld_cpuZ@4422 00000650
+CSEG exit1@ld_cpuZ@4422 00000652
+CSEG dohack1@get_pc_mem@4458 00000657
+CSEG exit1@get_pc_mem@4458 00000660
+CSEG dohack1@get_pc_mem@4481 00000664
+CSEG exit1@get_pc_mem@4481 0000066d
+CSEG dohack1@ld_cpuZ@4508 00000676
+CSEG hardware@ld_cpuZ@4508 00000680
+CSEG exit1@ld_cpuZ@4508 00000682
+CSEG dohack1@get_pc_mem@4544 00000687
+CSEG exit1@get_pc_mem@4544 00000690
+CSEG dohack1@get_pc_mem@4567 00000694
+CSEG exit1@get_pc_mem@4567 0000069d
+CSEG dohack1@ld_cpuZ@4594 000006a6
+CSEG hardware@ld_cpuZ@4594 000006b0
+CSEG exit1@ld_cpuZ@4594 000006b2
+CSEG dohack1@get_pc_mem@4648 000006b9
+CSEG exit1@get_pc_mem@4648 000006c2
+CSEG op_INVALID   000006d3
+CSEG p            000006d6
+CSEG lcd_debug    000006d7
+CSEG lcd_debug_rx_wait 000006d7
+CSEG lcd_debug_rx_wait1 000006da
+CSEG lcd_debug_TX 000006de
+CSEG lcd_print_chr 000006fe
+CSEG lcd_print_chr_cursor 00000720
+CSEG bias_inc     0000075d
+CSEG bias_reset   0000076a
+CSEG lcd_reset    00000781
+CSEG bias_loop    000007c2
+CSEG lcd_init     000007ec
+CSEG clear_text_ram 000007c8
+CSEG clear_text_ram_l1 000007d5
+CSEG clear_text_ram_l2 000007d6
diff --git a/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/vic20.obj b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/vic20.obj
new file mode 100644
index 00000000..568ec60f
Binary files /dev/null and b/trunk/AVRProjects/AVR_6502/avr-vic20_1284p/AVRCODE/vic20.obj differ
diff --git a/trunk/AVRProjects/sd2iec/CBM-FileBrowser_v1.6.zip b/trunk/AVRProjects/sd2iec/CBM-FileBrowser_v1.6.zip
new file mode 100644
index 00000000..7a543df3
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/CBM-FileBrowser_v1.6.zip differ
diff --git a/trunk/AVRProjects/sd2iec/Replacing the Raspberry Pi's SD Card Socket  Pieter-Jan.com.website b/trunk/AVRProjects/sd2iec/Replacing the Raspberry Pi's SD Card Socket  Pieter-Jan.com.website
new file mode 100644
index 00000000..9237e7a9
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/Replacing the Raspberry Pi's SD Card Socket  Pieter-Jan.com.website	
@@ -0,0 +1,13 @@
+[{000214A0-0000-0000-C000-000000000046}]
+Prop4=31,Replacing the Raspberry Pi's SD Card Socket | Pieter-Jan.com
+Prop3=19,2
+[{A7AF692E-098D-4C08-A225-D433CA835ED0}]
+Prop5=3,0
+Prop9=19,0
+[InternetShortcut]
+URL=http://www.pieter-jan.com/node/12
+IDList=
+IconFile=http://www.pieter-jan.com/sites/default/files/LOGOCOMPACT.png
+IconIndex=1
+[{9F4C2855-9F79-4B39-A8D0-E1D42DE1D5F3}]
+Prop5=8,Microsoft.Website.750B39C6.3D1C4A57
diff --git a/trunk/AVRProjects/sd2iec/SD2IEC Info.website b/trunk/AVRProjects/sd2iec/SD2IEC Info.website
new file mode 100644
index 00000000..a19e1b61
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/SD2IEC Info.website	
@@ -0,0 +1,15 @@
+[{000214A0-0000-0000-C000-000000000046}]
+Prop4=31,SD2IEC Info
+Prop3=19,2
+[{A7AF692E-098D-4C08-A225-D433CA835ED0}]
+Prop5=3,0
+Prop9=19,0
+Prop2=65,2C0000000000000001000000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFD2F9FFFF1A02000023FEFFFF380400005D
+Prop6=3,1
+[InternetShortcut]
+URL=http://www.thefuturewas8bit.com/index.php/sd2iec-info
+IDList=
+IconFile=http://www.thefuturewas8bit.com/media/favicon/default/logo90x90.gif
+IconIndex=1
+[{9F4C2855-9F79-4B39-A8D0-E1D42DE1D5F3}]
+Prop5=8,Microsoft.Website.B1BAF8B6.88F92946
diff --git a/trunk/AVRProjects/sd2iec/SD2IEC home.website b/trunk/AVRProjects/sd2iec/SD2IEC home.website
new file mode 100644
index 00000000..c981a27c
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/SD2IEC home.website	
@@ -0,0 +1,11 @@
+[{000214A0-0000-0000-C000-000000000046}]
+Prop4=31,Index of /
+Prop3=19,2
+[{A7AF692E-098D-4C08-A225-D433CA835ED0}]
+Prop5=3,0
+Prop9=19,0
+[InternetShortcut]
+URL=http://www.sd2iec.de/
+IDList=
+[{9F4C2855-9F79-4B39-A8D0-E1D42DE1D5F3}]
+Prop5=8,Microsoft.Website.3AC1273C.8258BA13
diff --git a/trunk/AVRProjects/sd2iec/SD_CARD.jpg b/trunk/AVRProjects/sd2iec/SD_CARD.jpg
new file mode 100644
index 00000000..65b63b0f
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/SD_CARD.jpg differ
diff --git a/trunk/AVRProjects/sd2iec/SD_CARD.png b/trunk/AVRProjects/sd2iec/SD_CARD.png
new file mode 100644
index 00000000..daaf1592
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/SD_CARD.png differ
diff --git a/trunk/AVRProjects/sd2iec/bin/COPYING b/trunk/AVRProjects/sd2iec/bin/COPYING
new file mode 100644
index 00000000..d511905c
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/bin/COPYING
@@ -0,0 +1,339 @@
+		    GNU GENERAL PUBLIC LICENSE
+		       Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+			    Preamble
+
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users.  This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it.  (Some other Free Software Foundation software is covered by
+the GNU Lesser General Public License instead.)  You can apply it to
+your programs, too.
+
+  When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+
+  To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+
+  For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have.  You must make sure that they, too, receive or can get the
+source code.  And you must show them these terms so they know their
+rights.
+
+  We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+
+  Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software.  If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors' reputations.
+
+  Finally, any free program is threatened constantly by software
+patents.  We wish to avoid the danger that redistributors of a free
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+program proprietary.  To prevent this, we have made it clear that any
+patent must be licensed for everyone's free use or not licensed at all.
+
+  The precise terms and conditions for copying, distribution and
+modification follow.
+
+		    GNU GENERAL PUBLIC LICENSE
+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+  0. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License.  The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
+either verbatim or with modifications and/or translated into another
+language.  (Hereinafter, translation is included without limitation in
+the term "modification".)  Each licensee is addressed as "you".
+
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope.  The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+
+  1. You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+
+  2. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+
+    a) You must cause the modified files to carry prominent notices
+    stating that you changed the files and the date of any change.
+
+    b) You must cause any work that you distribute or publish, that in
+    whole or in part contains or is derived from the Program or any
+    part thereof, to be licensed as a whole at no charge to all third
+    parties under the terms of this License.
+
+    c) If the modified program normally reads commands interactively
+    when run, you must cause it, when started running for such
+    interactive use in the most ordinary way, to print or display an
+    announcement including an appropriate copyright notice and a
+    notice that there is no warranty (or else, saying that you provide
+    a warranty) and that users may redistribute the program under
+    these conditions, and telling the user how to view a copy of this
+    License.  (Exception: if the Program itself is interactive but
+    does not normally print such an announcement, your work based on
+    the Program is not required to print an announcement.)
+
+These requirements apply to the modified work as a whole.  If
+identifiable sections of that work are not derived from the Program,
+and can be reasonably considered independent and separate works in
+themselves, then this License, and its terms, do not apply to those
+sections when you distribute them as separate works.  But when you
+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote it.
+
+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
+collective works based on the Program.
+
+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
+
+  3. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
+
+    a) Accompany it with the complete corresponding machine-readable
+    source code, which must be distributed under the terms of Sections
+    1 and 2 above on a medium customarily used for software interchange; or,
+
+    b) Accompany it with a written offer, valid for at least three
+    years, to give any third party, for a charge no more than your
+    cost of physically performing source distribution, a complete
+    machine-readable copy of the corresponding source code, to be
+    distributed under the terms of Sections 1 and 2 above on a medium
+    customarily used for software interchange; or,
+
+    c) Accompany it with the information you received as to the offer
+    to distribute corresponding source code.  (This alternative is
+    allowed only for noncommercial distribution and only if you
+    received the program in object code or executable form with such
+    an offer, in accord with Subsection b above.)
+
+The source code for a work means the preferred form of the work for
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+If distribution of executable or object code is made by offering
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+distribution of the source code, even though third parties are not
+compelled to copy the source along with the object code.
+
+  4. You may not copy, modify, sublicense, or distribute the Program
+except as expressly provided under this License.  Any attempt
+otherwise to copy, modify, sublicense or distribute the Program is
+void, and will automatically terminate your rights under this License.
+However, parties who have received copies, or rights, from you under
+this License will not have their licenses terminated so long as such
+parties remain in full compliance.
+
+  5. You are not required to accept this License, since you have not
+signed it.  However, nothing else grants you permission to modify or
+distribute the Program or its derivative works.  These actions are
+prohibited by law if you do not accept this License.  Therefore, by
+modifying or distributing the Program (or any work based on the
+Program), you indicate your acceptance of this License to do so, and
+all its terms and conditions for copying, distributing or modifying
+the Program or works based on it.
+
+  6. Each time you redistribute the Program (or any work based on the
+Program), the recipient automatically receives a license from the
+original licensor to copy, distribute or modify the Program subject to
+these terms and conditions.  You may not impose any further
+restrictions on the recipients' exercise of the rights granted herein.
+You are not responsible for enforcing compliance by third parties to
+this License.
+
+  7. If, as a consequence of a court judgment or allegation of patent
+infringement or for any other reason (not limited to patent issues),
+conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License.  If you cannot
+distribute so as to satisfy simultaneously your obligations under this
+License and any other pertinent obligations, then as a consequence you
+may not distribute the Program at all.  For example, if a patent
+license would not permit royalty-free redistribution of the Program by
+all those who receive copies directly or indirectly through you, then
+the only way you could satisfy both it and this License would be to
+refrain entirely from distribution of the Program.
+
+If any portion of this section is held invalid or unenforceable under
+any particular circumstance, the balance of the section is intended to
+apply and the section as a whole is intended to apply in other
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+
+It is not the purpose of this section to induce you to infringe any
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+such claims; this section has the sole purpose of protecting the
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+to distribute software through any other system and a licensee cannot
+impose that choice.
+
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+
+  8. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
+may add an explicit geographical distribution limitation excluding
+those countries, so that distribution is permitted only in or among
+countries not thus excluded.  In such case, this License incorporates
+the limitation as if written in the body of this License.
+
+  9. The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time.  Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+Each version is given a distinguishing version number.  If the Program
+specifies a version number of this License which applies to it and "any
+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation.  If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+
+  10. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
+to ask for permission.  For software which is copyrighted by the Free
+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this.  Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+
+			    NO WARRANTY
+
+  11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE RISK AS
+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+
+  12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+		     END OF TERMS AND CONDITIONS
+
+	    How to Apply These Terms to Your New Programs
+
+  If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+  To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+    <one line to give the program's name and a brief idea of what it does.>
+    Copyright (C) <year>  <name of author>
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License along
+    with this program; if not, write to the Free Software Foundation, Inc.,
+    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+    Gnomovision version 69, Copyright (C) year name of author
+    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+    This is free software, and you are welcome to redistribute it
+    under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License.  Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  Here is a sample; alter the names:
+
+  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+  `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+  <signature of Ty Coon>, 1 April 1989
+  Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs.  If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library.  If this is what you want to do, use the GNU Lesser General
+Public License instead of this License.
diff --git a/trunk/AVRProjects/sd2iec/bin/NEWS b/trunk/AVRProjects/sd2iec/bin/NEWS
new file mode 100644
index 00000000..67200997
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/bin/NEWS
@@ -0,0 +1,267 @@
+2012-02-26 - release 0.10.3
+        - Bugfix: Un-break I2C display communication
+
+2011-12-18 - release 0.10.2
+        - Bugfix: End of generated raw directory was incorrect
+        - Bugfix: Various compilation fixes when fastloaders are disabled
+        - ULoad M3 automatically exits when ATN becomes active
+        - Minor code space improvements
+        - New fastloader: ELoad Version 1 (EasyProg)
+
+2010-12-25 - release 0.10.1
+        - Bugfix: Remove remains of previous commands while parsing B-*
+        - Bugfix: Fix response of UI command for unknown suffix chars
+        - small improvement of JiffyDOS transfer speeds
+
+2010-11-07 - release 0.10.0
+        - Deprecation notice:
+          E-R and E-W commands will be removed in the next release
+        - Improved reliability of Nippon loader
+
+2010-10-31 - release 0.10.0pre5
+        - Bugfix: Avoid duplicate file name when DEL/DIR matches
+        - Bugfix: Reduce chance of data corruption in Wheels
+        - Bugfix: Slightly relax IEC timing while waiting for command
+        - Added AR6 1581 fastloader+saver (PAL)
+
+2010-10-26 - release 0.10.0pre4
+        - Bugfix: Wheels with SuperCPU timing issue corrected
+        - Bugfix: Rare problem with ~ in FAT file names fixed
+        - Added compile-time option to capture fastloader code
+        - Added Wheels 4.4 fast loaders
+        - Added another variation of the Epyx Fastload cart
+        - Added Nippon fast loader
+
+2010-10-16 - release 0.10.0pre3
+        - Bugfix: Wheels 128 loader detection fixed
+        - Added a second Epyx Fastload variation
+
+2010-10-15 - release 0.10.0pre2
+        - Bugfix: G-P answer fixed
+        - Bugfix: Strip 0x0d from file names when appropiate
+        - Wheels support
+
+2010-08-06 - release 0.10.0pre1
+        - GEOS 2.0 support (d64/d71/d81 images only)
+        - File-based M-R emulation
+        - Removed "oldnkc" configuration
+
+2010-08-02 - release 0.9.3
+        - Bugfix: Extension hiding works again with names >12 characters
+        - Bugfix: Increase data hold time during standard TALK
+        - Testing aid: card detect-to-LED function
+
+2010-06-21 - release 0.9.2
+        - Bugfix: Rename was broken on FAT
+        - Turbodisk is now disabled when running on internal RC clock
+        - button debounce timeout increased
+
+2010-03-07 - release 0.9.1
+        - Bugfix: Filling unused REL records used wrong offsets
+        - Bugfix: Unbreak case-insensitive matching of FAT file names
+        - Bugfix: Fix raw directory mode for D64/D71/D81
+        - Bugfix: Tell the display about REL files too
+        - add preliminary support for the ATmega1284P
+
+2010-02-28 - release 0.9.0
+        - Bugfix: REL offset calculation for records 256,512,...
+        - Bugfix: Non-REL P command parameters now match README
+        - Bugfix: Reading after EOI behaves correctly now
+        - Red LED only active while unwritten data in memory
+        - Remove XC,XJ commands
+        - New fastloader: ULoad Model 3
+        - New fastloader: G.I. Joe (said to be commonly ripped)
+        - New fastloader: Epyx FastLoad cartridge
+        - Support reading raw directory ($ with secondary > 0)
+        - "display disk images as directories"-mode
+        - DNP support
+        - remote display support
+        - build system doesn't require gawk anymore
+
+2009-12-16 - release 0.8.3
+        - Bugfix: Really prevent random corruption on FAT32 media
+        - Bugfix: Free buffer after copying files
+
+2009-09-27 - release 0.8.2
+        - Bugfix: Prevent random storage corruption on FAT32 media
+        - Bugfix: Image files not mountable if read-only file or media
+        - Bugfix: Do not clear error channel if sec. 15 is closed
+        - Add a dummy RTC read during init (to update year if required)
+        - Enable I2C RTC support in LarsP configuration for Final Expansion 3
+        - Acknowledge ATN during initialisation to stall C64 if required
+
+2009-05-24 - release 0.8.1a
+        - Fix bootloader version number generation
+
+2009-05-20 - release 0.8.1
+        - Fix uIEC/IDE SD card change detection
+        - Dreamload support for uIEC
+        - Mark the RTC time as valid after setting the clock
+        - Delay SPI initialisation until absolutely required
+        - Show disk change confirmation even when the error blink is active
+        - Exit the FC3 fastloader if ATN is active
+        - Fix indentation of 1000+ block files
+        - Remove 0-byte from the long version message
+        - Fix multiple save-with-replace bugs
+        - Ignore directories when matching file name wildcards
+
+2009-03-08 - release 0.8.0
+        - direct sector access of the real storage device
+        - ignore DEL files in file_open
+        - drive mapper
+        - EXOS V3 fastloader support
+        - requires avr-libc 1.6.x
+
+2008-10-02 - release 0.8.0pre1
+        - Implement Dreamload emulation
+        - RTC support
+        - Dataflash support
+        - Multi-file scratch
+        - Copy command
+        - Large buffer support
+        - Final Cartridge 3 freezed file fastloader support
+        - D71/D81 disk image support
+        - parse FSINFO sector for faster FAT32 free space calculation
+        - partial REL file support
+
+2008-07-09 - release 0.7.3
+        - Bugfix: Free buffers on error in M2I and D64
+          (fixes "D64 size increases to 1.1M when its free space runs out")
+
+2008-06-10 - release 0.7.2
+        - Bugfix: rename doesn't corrupt files with hidden extensions anymore
+        - Bugfix: RD works again
+        - Bugfix: On uIEC the ATN ACK interrupt was never disabled
+        - case-insensitive matching of FAT filenames
+
+2008-06-05 - release 0.7.1
+        - Bugfix: Mark sectors 18/0 and 18/1 as used during D64 format
+        - Bugfix: Single-char dir patterns are directory numbers
+        - Bugfix: Short N: on D64 should clean only the first dir sector
+        - case-insensitive matching of FAT filenames
+        - ask the AR6 to not use its fastloader/-saver
+
+2008-05-02 - release 0.7.0
+        - does not support the ATmega32 anymore
+        - Match trailing part of names after * too
+          + option to disable that
+        - Multi-drive/partition support
+        - Dual SD card support (some configurations)
+        - Rename
+        - transparent support for P/S/U/R00 files (read+create)
+          + option to disable x00 writing
+        - file-type suffix detection+generation
+          + option to disable that
+        - Final Cartridge III fast-load/save
+        - Sleep mode
+        - Extended swaplist navigation (next/prev/home)
+        - extended version query
+        - CMD-style timestamped short directory listings
+        - CMD-style partition directory
+        - CMD-style G-P command (get partition info)
+        - FAT32 free block count can be disabled
+        - D64 error info block parsing
+        - stricter, but better parser (supports wildcards in path names)
+
+2008-03-27 - release 0.6.4
+        - Change some details of the SD card initialisation
+        - Bugfix: Initialize cards only when sd2iec is accessed to avoid
+                  hogging the bus during this time.
+        - Prepare NKC configuration for bootloader and mega644
+
+2008-03-19 - release 0.6.3
+        - Bugfix: Ignore trailing separation characters of B-* parameters
+        - Bugfix: Always ignore volume labels while scanning for LFNs
+        - Bugfix: SDHC was always disabled in 0.6.x
+        - Bugfix: Ignore spaces in drive number
+        - Bugfix: Fix possible error after changing partitioned cards
+        - Bugfix: Case-insensitive name matching in the FAT library
+                  (but not in sd2iec)
+        - Bugfix: Fix compile error with larsp configuration on mega644
+        - Wait for the release of the disk change key before trying to
+          access a swap list
+        - Remove some ancient not-true-anymore statements from README
+        - Improve sector read performance
+        - Reduce unecessary reads during seeking
+ 
+2008-02-24 - release 0.6.2
+        - Bugfix: Read the correct pins when determining the device
+                  address in LarsP and NKC configurations
+
+2008-02-22 - release 0.6.1
+        - support for NKC MMC2IEC boards (untested)
+        - case-insensitive matching of M2I and D64
+
+2008-02-20 - release 0.6
+        - Bugfix: Properly emulate B-R/B-W (fixes Pirates!)
+        - Bugfix: Close buffers on I (fixes Drazpaint)
+        - Bugfix: Create new error message after closing channel 15
+        - Bugfix: Check for illegal track/sector while D64 is active
+        - reworked source configuration system
+        - externalized bootloader signature generation
+        - Support for long file names on FAT
+        - M-R returns (random) data
+        - New commands E-R, E-W: Read/write reserved area of EEPROM
+        - Added U0> for device address changes
+        - device address is stored in the EEPROM
+        - Directories starting with . are hidden in FAT
+        - support for sd2iec 1.0 PCBs
+
+2008-01-13 - release 0.5.1
+        - Bugfix: Really disable JTAG - fixes very slow access on some
+          hardware variants
+
+2008-01-12 - release 0.5
+        - Bugfix: Recode ~/pi in both directions
+        - Bugfix: Fastloaders now work on LarsP-style hardware too
+        - Disk change key support
+        - Full JiffyDos support
+        - EEPROM configuration storage
+        - Full support for D64, read/write/sector access
+
+2007-12-25 - release 0.4.2
+        - Bugfix: LarsP-style hardware actually works now
+
+2007-12-19 - release 0.4.1
+        - Bugfix: Creating a new file within an M2I image wrote
+                  a terminating zero byte into the M2I directory entry
+        - Bugfix: Another guesstimated delay in iec_putc
+        - AVR Studio project file updated
+
+2007-12-07 - release 0.4
+        - Extended DOS commands:
+          - Enable/Disable JiffyDOS
+          - Set oscillator calibration
+        - Full support for M2I images
+
+2007-11-29 - release 0.3
+        - disable interrupts during iec_getc
+        - add full CRC checking in SD code with retries on errors
+        - software fastloader support: Turbodisk protocol
+        - card change detection
+        - better file name parsing
+        - directory loading supports wildcards
+        - support for file overwrite (@)
+        - option to display hidden files in directory
+        - filename matching for open
+        - filename matching for scratch
+
+2007-11-02 - release 0.2.1
+        - bugfix: Don't cause repeated entries at the end of the directory
+        - bugfix: Don't repeast the last block of a saved file (1:256 chance)
+        - bugfix: Increase all timeouts in the card initialisation
+        - Recode 0xff in filenames to ~, both characters map to the pi
+          symbol on the C64
+
+2007-11-01 - release 0.2
+        - conditional compilation via make command line for chip type
+          and IO pin assignment (Shadowwolf/LarsP)
+        - object files are generated in a subdirectory
+        - bug fixes in IEC and buffer handling
+        - added project file for AVR Studio (untested)
+        - support for subdirectories
+        - support for UI+/UI- commands (faster bus for VC20)
+        - slightly improved command parser
+
+2007-10-16 - release 0.1
+        Initial release
diff --git a/trunk/AVRProjects/sd2iec/bin/README b/trunk/AVRProjects/sd2iec/bin/README
new file mode 100644
index 00000000..dde5a824
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/bin/README
@@ -0,0 +1,825 @@
+sd2iec - a controller/interface adapting storage devices to the CBM serial bus
+Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+Parts based on code from others, see comments in main.c for details.
+JiffyDos send based on code by M.Kiesel
+Fat LFN support and lots of other ideas+code by Jim Brain
+Final Cartridge III fastloader support by Thomas Giesel
+
+Free software under GPL version 2 ONLY, see comments in main.c and
+COPYING for details.
+
+FIXME:This file still needs to be expanded. A lot.
+
+Deprecation notices
+===================
+The following feature(s) will be removed in the next release:
+- M2I support
+   M2I support has been redundant since the introduction of transparent
+   P00 support. To continue to use your M2I-format software, convert
+   your files to P00 format (e.g. with m2itopc64.c) and set your device
+   to extension mode 2 (XE2).
+
+Introduction:
+=============
+sd2iec is firmware, used in hardware designs like MMC2IEC, SD2IEC, or uIEC,
+that allows the Commodore serial bus to access removable storage devices
+(MMC, SD, CF) - think of it as a 1541 with a modern storage medium instead
+of disks. The project was inspired by (and uses a few bits of code from)
+MMC2IEC[1] by Lars Pontoppidan and once ran on the same hardware before it
+grew too big for the ATmega32 used there.
+
+Currently, the firmware provide good DOS and file-level compatibility with CBM
+drives, but much work remains.  Unless specifically noted, anything that tries
+to execute code on the 1541 will not work, this includes every software
+fastloader.
+
+[1] Homepage: http://pontoppidan.info/lars/index.php?proj=mmc2iec
+
+Please note: Whenever this file talks about "D64 images" the text applies to
+all Dxx image types, i.e. D64/D71/D81/DNP unless specifically noted.
+
+If you are the author of a program that needs to detect sd2iec for
+some reason, DO NOT use M-R for this purpose. Use the UI command
+instead and check the message you get for "sd2iec" and "uiec" instead.
+
+
+Supported commands:
+===================
+- General notes:
+  Any command not listed below is currently not supported.
+
+- Directory filters:
+  To show only directories, both =B (CMD-compatible) and =D can be used.
+  On a real Commodore drive D matches everything.
+  To include hidden files in the directory, use *=H - on a 1541 this doesn't
+  do anything. sd2iec marks hidden files with an H after the lock mark,
+  i.e. "PRG<H" or "PRG H".
+
+  CMD-style "short" and "long" directory listings with timestamps are supported
+  ("$=T"), including timestamp filters. Please read a CMD manual for the syntax
+  until this file is updated.
+
+- Partition directory:
+  The CMD-style partition directory ($=P) is supported, including filters
+  ($=P:S*). All partitions are listed with type "FAT", although this could
+  change to "NAT" later for compatibility.
+
+- CD/MD/RD:
+  Subdirectory access is compatible to the syntax used by the CMD drives,
+  although drive/partition numbers are completely ignored.
+
+  Quick syntax overview:
+    CD:_         changes into the parent dir (_ is the left arrow on the C64)
+    CD_          dito
+    CD:foo       changes into foo
+    CD/foo       dito
+    CD//foo      changes into \foo
+    CD/foo/:bar  changes into foo\bar
+    CD/foo/bar   dito
+
+  You can use wildcards anywhere in the path. To change into an M2I or D64
+  image the image file must be named after the :, it will not be recognized
+  otherwise.
+
+  MD uses a syntax similiar to CD and will create the directory listed
+  after the colon (:) relative to any directory listed before it.
+
+    MD/foo/:bar  creates bar in foo
+    MD//foo/:bar creates bar in \foo
+
+  RD can only remove subdirectories of the current directory.
+
+    RD:foo       deletes foo
+
+  CD is also used to mount/unmount image files. Just change into them
+  as if they were a directory and use CD:_ (left arrow on the C64) to leave.
+  Please note that image files are detected by file extension and file size
+  and there is no reliable way to see if a file is a valid image file.
+
+- CP, C<Shift-P>
+  This changes the current partition, see "Partitions" below for details.
+
+- C:
+  File copy command, should be CMD compatible. The syntax is
+   C[partition][path]:targetname=[[partition][path]:]sourcename[,[[p][p]:]sourcename...]
+  You can use this command to copy multiple files into a single target
+  file in which case all source files will be appended into the target
+  file. Parsing restarts for every source file name which means that
+  every source name is assumed to be relative to the current directory.
+  You can use wildcards in the source names, but only the first
+  file matching will be copied.
+
+  Copying REL files should work, but isn't tested well. Mixing REL and
+  non-REL files in an append operation isn't supported.
+
+- D
+  Direct sector access, this is a command group introduced by sd2iec.
+  Some Commodore drives use D for disk duplication between two drives
+  in the same unit, an attempt to use that command with sd2iec should
+  result in an error message.
+
+  D has three subcommands: DI (Info), DR (Read) and DW (Write).
+  Each of those commands requires a buffer to be opened (similiar
+  to U1/U2), but due to the larger sector size of the storage devices
+  used by sd2iec it needs to be a large buffer of size 2 (512 bytes)
+  or larger. The exception is the DI command with page set to 0,
+  its result will always fir into a standard 256 byte buffer.
+  If you try to use one of the commands with a buffer that is too
+  small a new error message is returned, "78,BUFFER TOO SMALL,00,00".
+
+  In the following paragraphs the secondary address that was used
+  to open the buffer is called "bufchan".
+
+  - DI
+    In BASIC notation the command format is
+      "DI"+chr$(bufchan)+chr$(device)+chr$(page)
+
+    "device" is the number of the physical device to be queried,
+    "page" the information page to be retrieved. Currently the
+    only page implemented is page 0 which will return the
+    following data structure:
+     1 byte : Number of valid bytes in this structure
+              This includes this byte and is meant to provide
+              backwards compatibility if this structure is extended
+              at a later time. New fields will always be added to
+              the end so old programs can still read the fields
+              they know about.
+     1 byte : Highest diskinfo page supported
+              Always 0 for now, will increase if more information
+              pages are added (planned: Complete ATA IDENTIFY
+              output for IDE and CSD for SD)
+     1 byte : Disk type
+              This field identifies the device type, currently
+              implemented values are:
+                0  IDE
+                2  SD
+                3  Dataflash
+     1 byte : Sector size divided by 256
+              This field holds the sector size of the storage device
+              divided by 256.
+     4 bytes: Number of sectors on the device 
+              A little-endian (same byte order as the 6502) value
+              of the number of sectors on the storage device.
+              If there is ever a need to increase the reported
+              capacity beyond 2TB (for 512 byte sectors) this
+              field will return 0 and a 64-bit value will be added
+              to this diskinfo page.
+
+    If you want to determine if there is a device that responds
+    to a given number, read info page 0 for it. If there is no
+    device present that corresponds to the number you will see
+    a DRIVE NOT READY error on the error channel and the
+    "number of valid bytes" entry in the structure will be 0.
+
+    Do not assume that device numbers are stable between releases
+    and do not assume that they are continuous either. To scan
+    for all present devices you should query at least 0-7 for now,
+    but this limit may increase in later releases.
+
+  - DR/DW
+    In BASIC notation the command format would be
+      "DR"+chr$(bufchan)+chr$(device)
+          +chr$(sector AND 255)
+          +chr$((sector/256) AND 255)
+          +chr$((sector/65536) AND 255)
+          +chr$((sector/16777216) AND 255)
+    (or "DW" instead of "DR)
+    but this won't work on the C64 because AND does not accept
+    parameters larger than 32767. The principle should be clear
+    though, the last four bytes are a 32 bit sector number in
+    little-endian byte order.
+
+    DR reads the sector to the buffer, DW writes the contents
+    of the buffer to the sector. Both commands will update the
+    error channel if an error occurs, for DR the 20,READ ERROR
+    was chosen to represent read errors; for write problems
+    during DW it sets 25,WRITE ERROR for errors and 26,WRITE
+    PROTECT ON if the device is read-only.
+
+- G-P
+  Get partition info, see CMD FD/HD manual for details. The reported
+  information is partially faked, feedback is welcome.
+
+- P
+  Positioning doesn't just work for REL files but also for regular
+  files on a FAT partition. When used for regular files the format
+  is "P"+chr$(channel)+chr$(lo)+chr$(midlo)+chr$(midhi)+chr$(hi)
+  which will seek to the 0-based offset hi*2^24+midhi*65536+256*midlo+lo
+  in the file. If you send less than four bytes for the offset, the
+  missing bytes are assumed to be zero.
+
+- N:
+  Format works only if a D64 image is already mounted. This command is
+  limited to 1541 disk images, usually known as .D64.
+
+- R
+  Renaming files should work the same as it does on CMD drives, although
+  the errors flagged for invalid characters in the name may differ.
+
+- S:
+  Name matching is fully supported, directories are ignored.
+  Scratching of multiple files separated by , is also supported with no
+  limit to the number of files except for the maximum command line length
+  (usually 100 to 120 characters).
+
+- T-R and T-W
+  If your hardware features RTC support the commands T-R (time read) and T-W
+  (time write) are available. If the RTC isn't present, both commands return
+  30,SYNTAX ERROR,00,00; if the RTC is present but not set correctly T-R will
+  return 31,SYNTAX ERROR,00,00.
+
+  Both commands expect a fourth character that specifies the time format
+  to be used, T-W expects that the new time follows that character in EXACTLY
+  the format returned by T-R with the same format char. Do NOT add a space
+  between the "T-W" and the time string.
+
+  The possible formats are:
+   - "A"SCII: "SUN. 01/20/08 01:23:45 PM"+CHR$(13)
+      The day-of-week string can be any of "SUN.", "MON.", "TUES", "WED.",
+      "THUR", "FRI.", "SAT.". The year field is modulo 100.
+   - "B"CD or "D"ecimal:
+     Both these formats use 9 bytes to specify the time. For BCD everything
+     is BCD-encoded, for Decimal the numbers are sent/parsed as-is.
+      Byte 0: Day of the week (0 for sunday)
+           1: Year (modulo 100 for BCD; -1900 for Decimal, i.e. 108 for 2008)
+           2: Month (1-based)
+           3: Day (1-based)
+           4: Hour   (1-12)
+           5: Minute (0-59)
+           6: Second (0-59)
+           7: AM/PM-Flag (0 is AM, everything else is PM)
+           8: CHR$(13)
+
+      When the time is set a year less than 80 is interpreted as 20xx.
+
+- U0
+  Device address changing with "U0>"+chr$(new address) is supported,
+  other U0 commands are currently not implemented.
+
+- U1/U2/B-R/B-W
+  Block reading and writing is fully supported while a D64 image is mounted.
+
+- B-P
+  Supported, not checked against the original rom at all.
+
+- UI+/UI-
+  Switching the slightly faster bus protocol for the VC20 on and off works,
+  it hasn't been tested much though.
+
+- UI/UJ
+  Soft/Hard reset - UI just sets the "73,..." message on the error channel,
+  UJ closes all active buffers but doesn't reset the current directory,
+  mounted image, swap list or anything else.
+
+- U<Shift-J>
+  Real hard reset - this command causes a restart of the AVR processor
+  (skipping the bootloader if installed). <Shift-J> is character code 202.
+
+- X: Extended commands. If you use JiffyDOS, you can send them by using
+  @"X..." - without quotes you'll just receive an error.
+
+  - XEnum    Sets the "file extension mode". This setting controls if
+             files on FAT are written with an x00 header and extension or not.
+             Possible values for num are:
+               0: Never write x00 format files.
+               1: Write x00 format files for SEQ/USR/REL, but not for PRG
+               2: Always write x00 format files.
+               3: Use SEQ/USR/REL file extensions, no x00 header
+               4: Same as 3, but also for PRG
+             If you set mode 3 or 4, extension hiding is automatically enabled.
+             This setting can be saved in the EEPROM using XW, the default
+             value is 1.
+
+             For compatibility with existing programs that write D64 files,
+             PRG files that have D64, D41, D71, D81, DNP or M2I as an extension
+             will always be written without an x00 header and without
+             any additional PRG file extension.
+
+  - XE+/XE-  Enable/disable extension hiding. If enabled, files in FAT with
+             a PRG/SEQ/USR/REL extension will have their extension removed
+             and the file type changed to the type specified by the file
+             extension - e.g. APPLICATION.PRG will become a PRG file named
+             "APPLICATION", "README.SEQ" will become a SEQ file named "README".
+             This flag can be saved in the EEPROM using XW, the default
+             value is disabled (-).
+
+  - XInum    Switches the display mode for mountables files (i.e. disk images
+             and M2I). num can be 0, in which case the file will be shown
+             with its normal type in the directory or 1 which will show all
+             mountable files as DIRectory entries (but they can still be
+             accessed as files too) or 2 in which case they will show up
+             twice - once with its normal type and once as directory.
+             The default value is 0 and this setting can be stored
+             permanently using XW.
+
+             It may be useful to set it to 1 or 2 when using software that
+             was originally written for CMD devices and which wouldn't
+             recognize disk images/M2I files as mountable on its own.
+             However, due to limitations of the current implementation of
+             the CD command such software may still fail to mount a disk
+             image with this option enabled.
+
+  - XB+/XB-  Enable/disable free block calculation for FAT32 drives.
+             As the free block calculation for FAT32 can take a lot of time
+             it can be disabled using XB-. If it is disabled, sd2iec will
+             always report "1 BLOCKS FREE" for FAT32 drives. The free block
+             calculation on FAT12/FAT16 isn't affected because it takes just
+             two seconds at most. This flag can be saved in the EEPROM using
+             XW, the default value is enabled (+).
+
+  - X*+/X*-  Enable/disable 1581-style * matching. If enabled, characters
+             after a * will be matched against the end of the file name.
+             If disabled, any characters after a * will be ignored.
+             This flag can be saved in the EEPROM using XW, the default value
+             is enabled (+).
+
+  - XDdrv=val Configure drives.  On ATA-based units or units with multiple
+             drive types, this command can be used to enable or reorder
+             the drives.  drv is the drive slot (0-7), while val is one
+             of:
+                0: Master ATA device
+                1: Slave ATA device
+                4: Primary SD/MMC device
+                5: Secondary SD/MMC device
+                6: Dataflash device
+               15: no device
+
+             Note that only devices supported by the specific hardware
+             can be selected.  Unsupported device types will return an
+             error if requested.  Also, note that you cannot select a device
+             in multiple drive slots.  Finally, while it is possible to
+             re-order ATA devices using this functionality, it is strongly
+             discouraged.  Use the master/slave jumpers on the ATA devices
+             instead.  To reset the drive configuration, set all drive slots
+             to "no device".  This value can be permanently saved in the
+             EEPROM using XW.
+
+    XD?      View the current drive configuration.  Example result:
+             "03,D:00=04:01=00:02=01,10,01".  The track indicates the
+             current device address, while the sector indicates extended
+             drive configuration status information.
+
+  - X        X without any following characters reports the current state
+             of all extended parameters via the error channel, similiar
+             to DolphinDOS. Example result: "03,J-:C152:E01+:B+:*+,08,00"
+             The track indicates the current device address.
+
+  - XS:name  Set up a swap list - see "Changing Disk Images" below.
+    XS       Disable swap list
+
+  - XR:name  Set the file used for file-based M-R emulation.
+    XR       Disable file-based M-R emulation.
+             See "M-R, M-W, M-E" below. This setting can be
+             permanently saved in the EEPROM using XW.
+
+  - XW       Store configuration to EEPROM
+             This commands stores the current configuration in the EEPROM.
+             It will automatically be read when the AVR is reset, so
+             any changes you made will persist even after turning off
+             the hardware.
+
+             The stored configuration include the extension mode,
+             drive configuration and the current device address.
+             If you have changed the device address by software,
+             sd2iec will power up with that address unless
+             you have changed the device address jumpers (if available) to
+             a different setting than the one active at the time the
+             configuration was saved. You can think of this feature as
+             changing the meaning of one specific setting of the jumpers
+             to a different address if this sounds logical enough to you.
+
+             The "hardware overrides software overrides hardware" priority
+             was chosen to allow accessing sd2iec even when it is soft-
+             configured for a device number that is already taken by
+             another device on the bus without having to remove that
+             device to reconfigure sd2iec (e.g. when using a C128D).
+
+  - X?       Extended version query
+             This commands returns the extended version string which
+             consists of the version, the processor type set at build time
+             and the suffix of the configuration file (usually corresponds
+             to the short name of the hardware sd2iec was compiled for).
+
+- M-R, M-W, M-E
+  When no file is set up using XR, M-R will check a small internal
+  table of common drive-detection addresses and return data that
+  forces most of the supported fast loaders into a compatible mode
+  (e.g. 1541 mode for Dreamload and ULoad Model 3, disabled fastloader
+  for Action Replay 6). If the address is not recognized, more-or-less
+  random data will be returned.
+
+  Unfortunately GEOS reads rather large parts of the drive rom using
+  M-R to detect the drive, which cannot be reasonably added into the
+  internal table. To enable the GEOS drive detection to work properly
+  with sd2iec and to allow switching between 1541/71/81 modes,
+  file-based M-R emulation has been implemented. If a file has been
+  set up as M-R data source using the XR command, its contents will be
+  returned for M-R commands that try to read an address in the range
+  of $8000-$ffff. The rom file should be a copy of the rom contents of
+  a 1541/71/81 drive (any headers will be skipped automatically), its
+  name must be 16 characters or less. When an M-R command is received,
+  the file will be searched in three locations on the storage medium:
+    1) in the current directory of the current partition
+    2) in the root directory of the current partition
+    3) in the root directory of the first partition
+
+  The internal emulation table will be used if the file wasn't found
+  in any of those locations or an error occured while reading
+  it. Please be aware that the rom file is ONLY used for M-R
+  commands. Except for some very specific situations where drive
+  detection fails (e.g. GEOS) it will probably decrease compatibility
+  of sd2iec because most of the implemented fast loaders will only
+  recognize the 1541 variation of the loader.
+
+  Memory writing knows about the address used for changing the device
+  address on a 1541 and will change the address of sd2iec to the
+  requested value. It will also check if the transmitted data
+  corresponds to any of the known software fastloaders so the correct
+  emulation code can be used when M-E is called.
+
+- E-R, E-W
+  NOTICE: These commands will be removed in the next release.
+
+  Both commands work like M-R and M-W, but instead of reading/writing RAM
+  they allow access to a user-area of the EEPROM. This area currently holds
+  512 bytes and accesses beyond its end will result in a 32 SYNTAX ERROR.
+  It is strongly recommended to work on a protocol for sharing this area
+  between multiple applications that want to store their configuration in
+  there, but that is beyond the scope of this project.
+
+  As the contents of the EEPROM have to be copied to RAM before they can
+  be sent to the computer it is not possible to read more data with a
+  single command than the error message buffer (default size: 36 bytes)
+  can hold. Similiarly, writing is restricted by the size of the command
+  buffer (at least 42 bytes for compatibility, expected to be at least
+  100 bytes in release versions).
+
+  The user-area does not interfere with the stored configuration (XW) in
+  any way.
+
+Large buffers:
+==============
+To support commands which directly access the storage devices support
+for larger buffers was added. A large buffer can be allocated by
+opening a file named "##<d>" (exactly three characters" with <d> replaced
+by a single digit specifying the number of 256-byte buffers to be
+chained into one large buffer - e.g. "##2" for a 512 byte buffer,
+"##4" for 1024 bytes etc. Unlike a standard buffer where the read/write
+pointer is set to byte 1, a large buffer will start with the r/w pointer
+pointing to byte 0 because that seems to be more sensible to the author.
+
+If there aren't enough free buffers to support the size you requested
+a 70,NO CHANNEL message is set in the error channel and no file is
+opened. If the file name isn't exactly three bytes long a standard
+buffer ("#") will be allocated instead for compatibility.
+
+The B-P command supports a third parameter that holds the high byte
+of the buffer position, For example, "B-P 9 4 1" positions to byte
+260 (1*256+4) of the buffer on secondary address 9.
+
+No command is implemented at this time which uses large buffers.
+
+Long File Names:
+================
+Long file names (i.e names not within the 8.3 limits) are supported on
+FAT, but for compatibility reasons the 8.3 name is used if the long
+name exceeds 16 characters. If you use anything but ASCII characters
+on the PC or their PETSCII equivalents on the Commodore you may
+get strange characters on the other system because the LFN use
+unicode characters on disk, but sd2iec parses only the low byte
+of each character in the name.
+
+Partition:
+==========
+sd2iec features a multi-partition support similiar to that of the CMD
+drives. The partitions (which may be on separate drives for some hardware
+configurations) are accessed using the drive number of the commands
+sent from the computer and are numbered starting with 1. Partition 0
+is a special case: Because most software doesn't support drive numbers
+or always sends drive number 0, this partition points to the currently
+selected partition. By default, accesses to partition 0 will access
+partition 1, this can be changed by sending "CP<num>" over the command
+channel with <num> being an ASCII number from 1 to 255. "C<Shift-P"
+(0x42 0xd0) works the same, but expects a binary partition number as the
+third character of the command.
+
+Software fastloaders:
+=====================
+Note: Using sd2iec without an external crystal or similiar precise
+      clock source is not a supported configuration.
+      If you try that anyway, be prepared to suffer from random
+      data corruption. You have been warned.
+      Some fastloader implementations will actively refuse to work
+      if you use an unsuitable clock source.
+
+  Turbodisk
+  ---------
+  Turbodisk is detected by the CRC of its 493 byte long floppy code and
+  the M-E address 0x0303. The same code seems to be used under various names,
+  among them "Turbodisk" (both 2.1 and 2.2) and "Fast-Load".
+  It is not known if there is an NTSC-compatible version of this fastloader.
+
+  Final Cartridge III
+  -------------------
+  Both the fast loader and the fast saver of Final Cartridge III are supported.
+  The FC3 is both PAL and NTSC compatible.
+
+  The slightly different fastloader used for files freezed with the FC3
+  is also supported.
+
+  EXOS V3 and The Beast System
+  ----------------------------
+  Both supported, the loader used by these kernals is very similiar to
+  the FC3 fast loader.
+
+  Action Replay 6
+  ---------------
+  The AR6 reads a byte from the drive rom to check which fastloader it should
+  use. When file-based M-R emulation is disabled sd2iec returns a value that
+  should force the cartridge to use the standard kernal loader instead of its
+  many fastloaders/-savers. This means that accessind sd2iec with
+  file-based rom emulation enabled will fail because the cartridge
+  will enable fastloader that will probably not be recognized.
+
+  Currently the only recognized AR6 fastloader and fastsaver are the
+  ones for the 1581.
+
+  Dreamload
+  ---------
+  Dreamload uses direct track/sector access, so it is only supported
+  on D64 or similiar disk image formats. As sd2iec has to wait for commands
+  from the C64 constantly the disk change buttons may become unresponsive,
+  try multiple times if you need to. Dreamload is a "captive" fastloader,
+  sd2iec stay in Dreamload mode until it receives a "quit loader" command
+  from the C64. To force sd2iec to resume normal operation, hold the disk
+  change button until the red LED turns on (just like sleep mode).
+
+  Please note that Dreamload does not work with more than one device on the
+  serial bus due to the way it uses the ATN line.
+
+  ULoad Model 3
+  -------------
+  ULoad Model 3 uses direct track/sector access, so it is only supported
+  on D64 or similiar disk image formats. Currently there is exactly one
+  supported variant of ULoad Model 3, which is the one used by
+  Ultima 3 Gold. There are no other known variants at this time, but
+  this may change.
+
+  If you are a coder and want to use ULoad Model 3 in your own program,
+  either configure it to produce the same drive code as U3Gold or
+  contact me so we can work out a way to trigger ULoad M3 support
+  without uploading any drive code at all.
+
+  G.I. Joe Loader
+  ---------------
+  Said to be the most-ripped IRQ loader. Unfortunately this is a
+  "captive" fastloader similiar to dreamload (but not restricted
+  to disk images because it is file name-based) and there is no
+  reliable way to detect if the computer has been reset to switch
+  back to the standard protocol. To exit this loader, hold down
+  the disk change button until the red LED turns on, just like
+  sleep mode.
+
+  Epyx FastLoad Cartridge
+  -----------------------
+  ONLY the fast loader from this cartridge is supported, no
+  disk editor/copier/whatever functions.
+
+  GEOS
+  ----
+  GEOS 2.0 can be booted from D64 images made from original disks
+  as well as D41/71/81 images created using geoMakeBoot (make sure to
+  Configure the system for a 1541/1571/1581 before using geoMakeBoot).
+  When file-based M-R emulation is disabled, GEOS may detect sd2iec as
+  a 1541 or 1581, depending on the version of Configure used. This may
+  cause the system to fail to boot, e.g. if sd2iec is detected as a 1581
+  while booting from a D64 disk image. It is recommended to set up file-
+  based M-R emulation when using GEOS to avoid these problems.
+
+  GEOS 1.3 may or may not work - it boots, but wasn't tested in-depth.
+  Gateway seems to work but was not tested beyond booting it from a D64
+  image.
+
+  Using the buttons for changing the current disk image is supported,
+  but do make sure that you only access disk images that the drive
+  type that is selected in GEOS would support (i.e. D64 for a 1541,
+  D64/D71 for a 1571 and D81 for a 1581).
+
+  Wheels
+  ------
+  Wheels can be booted from any disk image type it supports. The correct
+  rom emulation file (XR) MUST be set, especially for CMD HD emulation.
+
+  Do not use the disk change feature to change disk images when HD emulation
+  is in use - Wheels does not check for disk changes on that drive!
+  For other drive types the restrictions on disk image type of GEOS also
+  apply to Wheels.
+
+  ELoad Version 1
+  ---------------
+  This loader was made for EasyProg but may also be used in other programs.
+  It detects and supports the sd2iec natively.
+
+JiffyDOS:
+=========
+The JiffyDOS protocol has very relaxed timing constraints compared to
+Turbodisk, but still not as relaxed as the standard Commodore IEC protocol.
+
+x00 files:
+==========
+P00/S00/U00/R00 files are transparently supported, that means they show
+up in the directory listing with their internal file name instead of the
+FAT file name. Renaming them only changes the internal name. The XE
+command defines if x00 extensions are used when writing files, by
+default sd2iec uses them for SEQ/USR/REL files but not for PRG.
+Parsing of x00 files is always enabled even when writing them is not.
+
+x00 files are recognized by checking both the extension of the file
+(P/S/U/R with a two-digit suffix) and the header signature.
+
+Disk Images:
+============
+Disk images are recognized by their file extension (.D64, .D41, .D71, .D81,
+.DNP) and their file size (must be one of 174848, 175531, 349696, 351062,
+819200 or a multiple of 65536 for DNP). If the image has an error info block
+appended it will be used to simulate read errors. Writing to a sector with
+an error will always work, but it will not clear the indicated error.
+D81 images with error info blocks are not supported.
+
+Warning: There is at least one program out there (DirMaster v2.1/Style by
+THE WIZ) which generates broken DNP files. The usual symptom is that
+moving from a subdirectory that was created with this program back to
+its parent directory using CD:_ (left arrow) sets the current directory
+not to the parent directory, but to an incorrect sector instead. A
+workaround for this problem in sd2iec would require an unreasonable
+amount of system resources, so it is recommended to avoid creating
+subdirectories with this version of DirMaster. It is possible to fix
+this problem using a hex editor, but the exact process is beyond the scope
+of this document.
+
+M2I files:
+==========
+NOTICE: Support for M2I files will be removed in the next release, see
+        the deprecation notices at the top of this file for advice.
+
+M2I files are fully supported. sd2iec supports SEQ and USR files in this
+format in addition to PRG and DEL which were already implemented in MMC2IEC.
+For compatibility reasons the file type is not checked when opening files.
+Inside an M2I file the files are always shown as 0 (DEL) or 1 blocks
+because calling stat for every file was slowing down the directory listing
+too much. For compatibility with existing M2I files the data files do not
+use P00 headers even when the file type is SEQ or USR.
+
+REL files:
+==========
+Partial REL file support is implemented. It should work fine for existing
+files, but creating new files and/or adding records to existing files
+may fail. REL files in disk images are not supported yet, only as files
+on a FAT medium. When x00 support is disabled the first byte of a REL
+file is assumed to be the record length.
+
+Changing Disk Images
+====================
+Because some programs require more than one disk side there is support
+for changing the currently mounted disk image with a button connected
+to the disk change pin.
+
+If your circuit doesn't have a disk change pin/button you might be able to
+add it yourself:
+- For the original MMC2IEC:
+  Connect a button from PA4 to ground. PA4 is pin 36 on the DIL version
+  of the controller or pin 33 on the surface-mount version.
+- For Shadowolf's MMC2IEC 1.x PCBs:
+  Connect a button from PC4 to ground. PC4 is pin 23 on the DIL version
+  of the controller or pin 23 on the surface-mount version.
+- Any other circuit without disk change pin on a convenient connector
+  somewhere and no button dedicated to that function: Please check
+  with the supplier of the board and read config.h in the sources
+  to find out how to connect it.
+
+To use this functionality, create a text file that lists the file
+names of all disk images you want to swap between, one per line.
+The file names are parsed in the same way as the CD command, so you
+can include a path to the image if desired.
+
+Examples:
+=== example 1 ===
+FOO.D64
+BAR.D64
+BAZ.D64
+=== end of example 1 ===
+
+=== example 2 ===
+//NEATGAME/:DISK1A.D64
+//NEATGAME/:DISK1B.D64
+//NEATGAME/:DISK2A.D64
+//NEATGAME/:DISK2B.D64
+=== end of example 2 ===
+
+The swap list is enabled by sending "XS:filename" over the command channel
+with filename being the name of the image list you created, parsed
+in the same way as any other file name.
+
+After sending XS the first image in the list is automatically
+mounted. To switch to the next image in the list, push the button. If
+the new image was mounted successfully both LEDs will blink twice.
+When you've reached the last image in the list pushing the button will
+mount the first image again. All of this is completely compatible with
+normal image mounting/unmounting, so you can unmount the disk image
+any time you want and resume the mount cycle later by pushing the
+button.
+
+Due to the way this feature is implemented you are not limited to a
+swap list containing just D64 images, M2I and even FAT directories
+will work too.  FIXME: Does that still work?
+
+If you press the button when no list has been set before or when the
+previous list was cleared by sending XS the software will look for a
+file called AUTOSWAP.LST in the current (FAT-)directory and use this
+as the current swap list until you deactivate it or manually change
+the directory (otherwise an AUTOSWAP.LST in the new directory would be
+ignored until you send XS, killing the nice "it just works" feeling).
+
+FIXME: Integrate the following into the preceding
+
+The second disk change button is on
+- PA5 for LarsP
+- PC3 for Shadowolf's MMC2IEC 1.x
+- PC2 for Shadowolf's sd2iec 1.x ("Reserve" on the header)
+- PG4 for uIEC
+
+Either of those buttons will trigger the use of AUTOSWAP.LST.
+If a swap list is already active, the first button will switch
+to the next image in the list, the second button will switch
+to the previous image in the list and pushing both buttons
+together will switch to the first image in the list.
+
+The confirmation blink is red+green followed by
+green for "next", by red for "previous" and by
+red+green for "first".
+
+Sleep Mode:
+===========
+If you hold the disk change button down for two seconds, sd2iec will
+enter "sleep mode". In this mode it doesn't listen to the bus at all
+until you hold down the disk change button for two seconds again
+which resumes normal operation. Sleep mode allows you to keep
+sd2iec connected to the serial bus even when you load something
+from a different drive that uses a fast loader that doesn't
+work with more than one device on the bus.
+
+While sleep mode is active, the red LED will be on and the green LED
+will be off.
+
+Card detection test:
+====================
+Because some SD slots seem to suffer from bad/unreliable card detect
+switches a test mode for this has been implemented on the units that
+have SD card support. If you hold down the PREV button during powerup,
+the red (dirty) LED will reflect the card detect status - if the LED
+is on the card detect switch is closed. Please note that this does not
+indicate successful communication with the card but merely that the
+mechanical switch in the SD card slot is closed.
+
+On units with two sd2iec-controlled LEDs, the green (busy) LED will
+indicate the state of the write protect switch - if the LED is lit,
+the write protection is on. Due to the way the write protect notch
+works on SD cards, the indication is only valid when the card is fully
+inserted into the slot.
+
+To exit from the diagnostic mode, power-cycle the device or push the
+NEXT button once.
+
+Other important notes:
+======================
+- When you hold down the disk change (forward) button during power
+  on the software will use default values instead of those stored
+  in the EEPROM.
+- File overwrite (@foo) is implemented by deleting the file first.
+- File sizes in the directory are in blocks (of 254 bytes), but
+  the blocks free message actually reports free clusters. It is
+  a compromise of compatibility, accuracy and code size.
+- If known, the low byte of the next line link pointer of the directory
+  listing will be set to (filesize MOD 254)+2, so you can calculate the
+  true size of the file if required. The 2 is added so it can never be
+  mistaken for an end marker (0) or for the default value (1, used by at
+  least the 1541 and 1571 disk drives).
+- If your hardware supports more than one SD card, changing either one
+  will reset the current partition to 1 and the current directory of
+  all partitions to the root drive. Doing this just for the card that
+  was changed would cause lots of problems if the number of partitions
+  on the previous and the newly inserted cards are different.
+
+Compilation notes:
+==================
+sd2iec requires avr-libc version 1.6.x.
+
+sd2iec is set up to be compiled in multiple configurations, controlled by
+configuration files. By default the Makefile looks for a file named
+'config', but you can override it by providing the name on the make
+command line with "make CONFIG=filename".
+
+An example configuration file named "config-example" is provided with
+the source code, as well as abridged files corresponding to the
+release binaries. If you want to compile sd2iec for a custom hardware
+you may have to edit config.h too to change the port definitions.
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diff --git a/trunk/AVRProjects/sd2iec/bin/sd2iec-1.0.0alpha0-98-gaa8395c-arm2iec1.hex b/trunk/AVRProjects/sd2iec/bin/sd2iec-1.0.0alpha0-98-gaa8395c-arm2iec1.hex
new file mode 100644
index 00000000..86b3dd40
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/bin/sd2iec-1.0.0alpha0-98-gaa8395c-arm2iec1.hex
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diff --git a/trunk/AVRProjects/sd2iec/bin/sd2iec-1.0.0alpha0-98-gaa8395c-larsp-m1284p.bin b/trunk/AVRProjects/sd2iec/bin/sd2iec-1.0.0alpha0-98-gaa8395c-larsp-m1284p.bin
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diff --git a/trunk/AVRProjects/sd2iec/bin/sd2iec-1.0.0alpha0-98-gaa8395c-petSD-m1284p.bin b/trunk/AVRProjects/sd2iec/bin/sd2iec-1.0.0alpha0-98-gaa8395c-petSD-m1284p.bin
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diff --git a/trunk/AVRProjects/sd2iec/bin/sd2iec-1.0.0alpha0-98-gaa8395c-uIEC-m1281.bin b/trunk/AVRProjects/sd2iec/bin/sd2iec-1.0.0alpha0-98-gaa8395c-uIEC-m1281.bin
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diff --git a/trunk/AVRProjects/sd2iec/larsp/16bit Dust.website b/trunk/AVRProjects/sd2iec/larsp/16bit Dust.website
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+Comment=4 out of 5 dentists recommend this site!!
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diff --git a/trunk/AVRProjects/sd2iec/larsp/Firmware/sd2iec-0.10.3-larsp-m1284p with newboot-0.3-larsp-m1284p.bin b/trunk/AVRProjects/sd2iec/larsp/Firmware/sd2iec-0.10.3-larsp-m1284p with newboot-0.3-larsp-m1284p.bin
new file mode 100644
index 00000000..41be534b
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/larsp/Firmware/sd2iec-0.10.3-larsp-m1284p with newboot-0.3-larsp-m1284p.bin differ
diff --git a/trunk/AVRProjects/sd2iec/larsp/Firmware/sd2iec-0.10.3-larsp-m1284p.bin b/trunk/AVRProjects/sd2iec/larsp/Firmware/sd2iec-0.10.3-larsp-m1284p.bin
new file mode 100644
index 00000000..64651555
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/larsp/Firmware/sd2iec-0.10.3-larsp-m1284p.bin differ
diff --git a/trunk/AVRProjects/sd2iec/larsp/Firmware/sd2iec-0.10.3-larsp-m644p.bin b/trunk/AVRProjects/sd2iec/larsp/Firmware/sd2iec-0.10.3-larsp-m644p.bin
new file mode 100644
index 00000000..b5055ee2
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/larsp/Firmware/sd2iec-0.10.3-larsp-m644p.bin differ
diff --git a/trunk/AVRProjects/sd2iec/larsp/SD2IEC v1.2 LF33CV.brd b/trunk/AVRProjects/sd2iec/larsp/SD2IEC v1.2 LF33CV.brd
new file mode 100644
index 00000000..29a12160
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/larsp/SD2IEC v1.2 LF33CV.brd	
@@ -0,0 +1,3410 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!DOCTYPE eagle SYSTEM "eagle.dtd">
+<eagle version="6.4">
+<drawing>
+<settings>
+<setting alwaysvectorfont="no"/>
+<setting verticaltext="up"/>
+</settings>
+<grid distance="0.00625" unitdist="inch" unit="mil" style="dots" multiple="1" display="yes" altdistance="0.025" altunitdist="inch" altunit="inch"/>
+<layers>
+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>
+<layer number="2" name="Route2" color="1" fill="3" visible="yes" active="yes"/>
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+<layer number="45" name="Holes" color="7" fill="1" visible="no" active="yes"/>
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+<layer number="54" name="bGND_GNDA" color="1" fill="9" visible="no" active="no"/>
+<layer number="56" name="wert" color="7" fill="1" visible="no" active="yes"/>
+<layer number="57" name="tCAD" color="7" fill="1" visible="no" active="no"/>
+<layer number="91" name="Nets" color="2" fill="1" visible="no" active="no"/>
+<layer number="92" name="Busses" color="1" fill="1" visible="no" active="no"/>
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+<layer number="101" name="Patch_Top" color="12" fill="4" visible="no" active="yes"/>
+<layer number="102" name="Vscore" color="7" fill="1" visible="no" active="yes"/>
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+<layer number="104" name="Name" color="7" fill="1" visible="no" active="yes"/>
+<layer number="105" name="Beschreib" color="9" fill="1" visible="no" active="yes"/>
+<layer number="106" name="BGA-Top" color="4" fill="1" visible="no" active="yes"/>
+<layer number="107" name="BD-Top" color="5" fill="1" visible="no" active="yes"/>
+<layer number="108" name="fp8" color="7" fill="1" visible="no" active="yes"/>
+<layer number="109" name="fp9" color="7" fill="1" visible="no" active="yes"/>
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+<layer number="112" name="tSilk" color="7" fill="1" visible="no" active="yes"/>
+<layer number="116" name="Patch_BOT" color="9" fill="4" visible="no" active="yes"/>
+<layer number="121" name="_tsilk" color="7" fill="1" visible="no" active="yes"/>
+<layer number="122" name="_bsilk" color="7" fill="1" visible="no" active="yes"/>
+<layer number="123" name="tTestmark" color="7" fill="1" visible="no" active="yes"/>
+<layer number="124" name="bTestmark" color="7" fill="1" visible="no" active="yes"/>
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+<layer number="144" name="Drill_legend" color="7" fill="1" visible="no" active="yes"/>
+<layer number="150" name="Notes" color="7" fill="1" visible="no" active="yes"/>
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+<layer number="251" name="SMDround" color="7" fill="1" visible="no" active="no"/>
+<layer number="254" name="cooling" color="7" fill="1" visible="no" active="yes"/>
+</layers>
+<board>
+<plain>
+<wire x1="0" y1="0" x2="65.71" y2="0" width="0" layer="20"/>
+<wire x1="65.71" y1="0" x2="65.71" y2="80" width="0" layer="20"/>
+<wire x1="65.71" y1="80" x2="0" y2="80" width="0" layer="20"/>
+<wire x1="0" y1="80" x2="0" y2="0" width="0" layer="20"/>
+<text x="60.325" y="37.7825" size="1.778" layer="16" rot="MR270">SD2IEC (larsp layout)
+DIY by Solo761
+v1.2</text>
+</plain>
+<libraries>
+<library name="atmel">
+<description>&lt;b&gt;AVR Devices&lt;/b&gt;&lt;p&gt;
+Configurable logic, microcontrollers, nonvolatile memories&lt;p&gt;
+Based on the following sources:&lt;p&gt;
+&lt;ul&gt;
+&lt;li&gt;www.atmel.com
+&lt;li&gt;CD-ROM : Configurable Logic Microcontroller Nonvolatile Memory
+&lt;li&gt;CadSoft download site, www.cadsoft.de or www.cadsoftusa.com , file at90smcu_v400.zip
+&lt;li&gt;avr.lbr
+&lt;/ul&gt;
+&lt;author&gt;Revised by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="DIL40">
+<description>&lt;B&gt;Dual In Line&lt;/B&gt;</description>
+<wire x1="-26.416" y1="-1.27" x2="-26.416" y2="-6.604" width="0.1524" layer="21"/>
+<wire x1="-26.416" y1="1.27" x2="-26.416" y2="-1.27" width="0.1524" layer="21" curve="-180"/>
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+<wire x1="-26.416" y1="6.604" x2="26.416" y2="6.604" width="0.1524" layer="21"/>
+<wire x1="-26.416" y1="-6.604" x2="26.416" y2="-6.604" width="0.1524" layer="21"/>
+<pad name="1" x="-24.13" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="2" x="-21.59" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="3" x="-19.05" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="4" x="-16.51" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="5" x="-13.97" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="6" x="-11.43" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="7" x="-8.89" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="8" x="-6.35" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="9" x="-3.81" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="10" x="-1.27" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="11" x="1.27" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="12" x="3.81" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
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+<pad name="17" x="16.51" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="18" x="19.05" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="19" x="21.59" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="20" x="24.13" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="21" x="24.13" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="22" x="21.59" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="23" x="19.05" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="24" x="16.51" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="25" x="13.97" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="26" x="11.43" y="7.62" drill="0.8128" shape="long" rot="R90"/>
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+<pad name="28" x="6.35" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="29" x="3.81" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="30" x="1.27" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="31" x="-1.27" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="32" x="-3.81" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="33" x="-6.35" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="34" x="-8.89" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="35" x="-11.43" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="36" x="-13.97" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="37" x="-16.51" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="38" x="-19.05" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="39" x="-21.59" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="40" x="-24.13" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<text x="-26.67" y="-6.35" size="1.778" layer="25" ratio="10" rot="R90">&gt;NAME</text>
+<text x="-21.59" y="-2.2352" size="1.778" layer="27" ratio="10">&gt;VALUE</text>
+</package>
+</packages>
+</library>
+<library name="resistor">
+<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;
+Based on the previous libraries:
+&lt;ul&gt;
+&lt;li&gt;r.lbr
+&lt;li&gt;cap.lbr 
+&lt;li&gt;cap-fe.lbr
+&lt;li&gt;captant.lbr
+&lt;li&gt;polcap.lbr
+&lt;li&gt;ipc-smd.lbr
+&lt;/ul&gt;
+All SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;
+&lt;p&gt;
+for Electrolyt Capacitors see also :&lt;p&gt;
+www.bccomponents.com &lt;p&gt;
+www.panasonic.com&lt;p&gt;
+www.kemet.com&lt;p&gt;
+&lt;p&gt;
+for trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;
+
+&lt;map name="nav_main"&gt;
+&lt;area shape="rect" coords="0,1,140,23" href="../military_specs.asp" title=""&gt;
+&lt;area shape="rect" coords="0,24,140,51" href="../about.asp" title=""&gt;
+&lt;area shape="rect" coords="1,52,140,77" href="../rfq.asp" title=""&gt;
+&lt;area shape="rect" coords="0,78,139,103" href="../products.asp" title=""&gt;
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+&lt;area shape="rect" coords="1,151,139,178" href="../industry_links.asp" title=""&gt;
+&lt;area shape="rect" coords="0,179,139,201" href="../comments.asp" title=""&gt;
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+&lt;area shape="default" nohref&gt;
+&lt;/map&gt;
+
+&lt;html&gt;
+
+&lt;title&gt;&lt;/title&gt;
+
+ &lt;LINK REL="StyleSheet" TYPE="text/css" HREF="style-sheet.css"&gt;
+
+&lt;body bgcolor="#ffffff" text="#000000" marginwidth="0" marginheight="0" topmargin="0" leftmargin="0"&gt;
+&lt;table border=0 cellspacing=0 cellpadding=0 width="100%" cellpaddding=0 height="55%"&gt;
+&lt;tr valign="top"&gt;
+
+&lt;/td&gt;
+&lt;! &lt;td width="10"&gt;&amp;nbsp;&lt;/td&gt;
+&lt;td width="90%"&gt;
+
+&lt;b&gt;&lt;font color="#0000FF" size="4"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;
+&lt;P&gt;
+&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;
+  &lt;TR&gt;
+    &lt;TD COLSPAN=8&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
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+  &lt;TR&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
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+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;DALE-VISHAY&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;PHILIPS/MEPCO&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;MURATA&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;PANASONIC&lt;/FONT&gt;
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+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;MILSPEC&lt;/FONT&gt;
+      &lt;/B&gt;
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+<wire x1="3.81" y1="0" x2="3.81" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="3.175" y1="-2.921" x2="1.905" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="0.635" y1="-2.921" x2="-0.635" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="-0.635" y1="-2.921" x2="-1.27" y2="-2.921" width="0.127" layer="21"/>
+<wire x1="-3.556" y1="-2.921" x2="-3.175" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="-3.175" y1="-2.921" x2="-3.175" y2="-2.286" width="0.254" layer="21"/>
+<wire x1="-3.175" y1="-2.286" x2="-1.905" y2="-2.286" width="0.254" layer="21"/>
+<wire x1="-1.905" y1="-2.286" x2="-1.905" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="-1.905" y1="-2.921" x2="-3.175" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="-1.905" y1="-2.921" x2="-0.635" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="-0.635" y1="-2.921" x2="-0.635" y2="-2.286" width="0.254" layer="21"/>
+<wire x1="-0.635" y1="-2.286" x2="0.635" y2="-2.286" width="0.254" layer="21"/>
+<wire x1="0.635" y1="-2.286" x2="0.635" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="0.635" y1="-2.921" x2="1.905" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="1.905" y1="-2.921" x2="1.905" y2="-2.286" width="0.254" layer="21"/>
+<wire x1="1.905" y1="-2.286" x2="3.175" y2="-2.286" width="0.254" layer="21"/>
+<wire x1="3.175" y1="-2.286" x2="3.175" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="3.175" y1="-2.921" x2="3.81" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="-2.54" y1="1.905" x2="-2.54" y2="2.921" width="0.254" layer="21"/>
+<wire x1="-2.54" y1="1.905" x2="-2.286" y2="1.905" width="0.254" layer="21"/>
+<wire x1="-2.286" y1="1.905" x2="2.286" y2="1.905" width="0.254" layer="21"/>
+<wire x1="2.286" y1="1.905" x2="2.54" y2="1.905" width="0.254" layer="21"/>
+<wire x1="2.54" y1="1.905" x2="2.54" y2="2.921" width="0.254" layer="21"/>
+<wire x1="-2.54" y1="1.905" x2="-2.286" y2="1.397" width="0.254" layer="21"/>
+<wire x1="-2.286" y1="2.921" x2="-2.286" y2="1.905" width="0.254" layer="21"/>
+<wire x1="-2.286" y1="1.397" x2="2.286" y2="1.397" width="0.254" layer="21"/>
+<wire x1="2.286" y1="1.397" x2="2.54" y2="1.905" width="0.254" layer="21"/>
+<wire x1="2.286" y1="2.921" x2="2.286" y2="1.905" width="0.254" layer="21"/>
+<pad name="3" x="-2.54" y="0" drill="1.016" shape="long" rot="R90"/>
+<pad name="2" x="0" y="0" drill="1.016" shape="long" rot="R90"/>
+<pad name="1" x="2.54" y="0" drill="1.016" shape="long" rot="R90"/>
+<text x="-3.7831" y="3.2751" size="1.016" layer="25" ratio="10">&gt;NAME</text>
+<text x="4.4181" y="-0.7381" size="1.27" layer="21" ratio="14">1</text>
+<text x="-4.9799" y="-0.6873" size="1.27" layer="21" ratio="14">3</text>
+<text x="-3.7831" y="-4.5989" size="0.8128" layer="27" ratio="10">&gt;VALUE</text>
+<rectangle x1="-2.794" y1="-0.254" x2="-2.286" y2="0.254" layer="51"/>
+<rectangle x1="-0.254" y1="-0.254" x2="0.254" y2="0.254" layer="51"/>
+<rectangle x1="2.286" y1="-0.254" x2="2.794" y2="0.254" layer="51"/>
+</package>
+</packages>
+</library>
+<library name="rcl">
+<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;
+Based on the previous libraries:
+&lt;ul&gt;
+&lt;li&gt;r.lbr
+&lt;li&gt;cap.lbr 
+&lt;li&gt;cap-fe.lbr
+&lt;li&gt;captant.lbr
+&lt;li&gt;polcap.lbr
+&lt;li&gt;ipc-smd.lbr
+&lt;/ul&gt;
+All SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;
+&lt;p&gt;
+for Electrolyt Capacitors see also :&lt;p&gt;
+www.bccomponents.com &lt;p&gt;
+www.panasonic.com&lt;p&gt;
+www.kemet.com&lt;p&gt;
+http://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf &lt;b&gt;(SANYO)&lt;/b&gt;
+&lt;p&gt;
+for trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;
+
+&lt;table border=0 cellspacing=0 cellpadding=0 width="100%" cellpaddding=0&gt;
+&lt;tr valign="top"&gt;
+
+&lt;! &lt;td width="10"&gt;&amp;nbsp;&lt;/td&gt;
+&lt;td width="90%"&gt;
+
+&lt;b&gt;&lt;font color="#0000FF" size="4"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;
+&lt;P&gt;
+&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;
+  &lt;TR&gt;
+    &lt;TD COLSPAN=8&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+  &lt;/TR&gt;
+  &lt;TR&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;BOURNS&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;DALE-VISHAY&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;PHILIPS/MEPCO&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;MURATA&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;PANASONIC&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;SPECTROL&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;MILSPEC&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;&lt;TD&gt;&amp;nbsp;&lt;/TD&gt;
+  &lt;/TR&gt;
+  &lt;TR&gt;
+    &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3 &gt;
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+    &lt;/TD&gt;
+    &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
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+      -&lt;BR&gt;
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+      -&lt;BR&gt;
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+      -&lt;BR&gt;
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+      -&lt;BR&gt;
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+    &lt;/TD&gt;
+    &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      RT/RTR12&lt;BR&gt;
+      RT/RTR12&lt;BR&gt;
+      RT/RTR12&lt;BR&gt;
+      -&lt;BR&gt;
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+      RJ/RJR12&lt;BR&gt;
+      RJ/RJR12&lt;BR&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+  &lt;/TR&gt;
+  &lt;TR&gt;
+    &lt;TD COLSPAN=8&gt;&amp;nbsp;
+    &lt;/TD&gt;
+  &lt;/TR&gt;
+  &lt;TR&gt;
+    &lt;TD COLSPAN=8&gt;
+      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SQUARE MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+  &lt;/TR&gt;
+  &lt;TR&gt;
+   &lt;TD ALIGN=CENTER&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+  &lt;/TR&gt;
+  &lt;TR&gt;
+    &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
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+    &lt;/TD&gt;
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+    &lt;/TD&gt;
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+  &lt;/TR&gt;
+  &lt;TR&gt;
+    &lt;TD&gt;
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+    &lt;/TD&gt;
+    &lt;TD&gt;
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+    &lt;TD&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+    &lt;TD&gt;
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+<pad name="1" x="-2.54" y="0" drill="1.016" rot="R90"/>
+<pad name="2" x="0" y="0" drill="1.016" rot="R90"/>
+<pad name="3" x="2.54" y="0" drill="1.016" rot="R90"/>
+<text x="-3.8862" y="1.8288" size="1.27" layer="25" ratio="10">&gt;NAME</text>
+<text x="-3.81" y="-3.175" size="1.27" layer="27">&gt;VALUE</text>
+<rectangle x1="-0.254" y1="-0.254" x2="0.254" y2="0.254" layer="51"/>
+<rectangle x1="-2.794" y1="-0.254" x2="-2.286" y2="0.254" layer="51"/>
+<rectangle x1="2.286" y1="-0.254" x2="2.794" y2="0.254" layer="51"/>
+</package>
+</packages>
+</library>
+<library name="v-reg">
+<description>&lt;b&gt;Voltage Regulators&lt;/b&gt;&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="78XXS">
+<description>&lt;b&gt;VOLTAGE REGULATOR&lt;/b&gt;</description>
+<wire x1="4.826" y1="-4.318" x2="5.08" y2="-4.064" width="0.1524" layer="21"/>
+<wire x1="4.826" y1="-4.318" x2="-4.826" y2="-4.318" width="0.1524" layer="21"/>
+<wire x1="-5.08" y1="-4.064" x2="-4.826" y2="-4.318" width="0.1524" layer="21"/>
+<wire x1="5.08" y1="-1.143" x2="5.08" y2="-4.064" width="0.1524" layer="21"/>
+<wire x1="-5.08" y1="-4.064" x2="-5.08" y2="-1.143" width="0.1524" layer="21"/>
+<circle x="-4.6228" y="-3.7084" radius="0.254" width="0" layer="21"/>
+<pad name="IN" x="-2.54" y="-2.54" drill="1.016" shape="long" rot="R90"/>
+<pad name="GND" x="0" y="-2.54" drill="1.016" shape="long" rot="R90"/>
+<pad name="OUT" x="2.54" y="-2.54" drill="1.016" shape="long" rot="R90"/>
+<text x="-5.08" y="-6.0452" size="1.27" layer="25" ratio="10">&gt;NAME</text>
+<text x="-5.08" y="-7.62" size="1.27" layer="27" ratio="10">&gt;VALUE</text>
+<text x="-0.635" y="-3.81" size="1.27" layer="51" ratio="10">-</text>
+<text x="-3.175" y="-3.81" size="1.27" layer="51" ratio="10">I</text>
+<text x="1.905" y="-3.81" size="1.27" layer="51" ratio="10">O</text>
+<rectangle x1="-5.334" y1="-1.27" x2="-3.429" y2="0" layer="21"/>
+<rectangle x1="-3.429" y1="-0.762" x2="-1.651" y2="0" layer="21"/>
+<rectangle x1="-1.651" y1="-1.27" x2="-0.889" y2="0" layer="21"/>
+<rectangle x1="-0.889" y1="-0.762" x2="0.889" y2="0" layer="21"/>
+<rectangle x1="0.889" y1="-1.27" x2="1.651" y2="0" layer="21"/>
+<rectangle x1="1.651" y1="-0.762" x2="3.429" y2="0" layer="21"/>
+<rectangle x1="3.429" y1="-1.27" x2="5.334" y2="0" layer="21"/>
+<rectangle x1="-3.429" y1="-1.27" x2="-1.651" y2="-0.762" layer="51"/>
+<rectangle x1="-0.889" y1="-1.27" x2="0.889" y2="-0.762" layer="51"/>
+<rectangle x1="1.651" y1="-1.27" x2="3.429" y2="-0.762" layer="51"/>
+</package>
+</packages>
+</library>
+</libraries>
+<attributes>
+</attributes>
+<variantdefs>
+</variantdefs>
+<classes>
+<class number="0" name="default" width="0" drill="0">
+</class>
+</classes>
+<designrules name="default">
+<description language="de">&lt;b&gt;EAGLE Design Rules&lt;/b&gt;
+&lt;p&gt;
+Die Standard-Design-Rules sind so gewählt, dass sie für 
+die meisten Anwendungen passen. Sollte ihre Platine 
+besondere Anforderungen haben, treffen Sie die erforderlichen
+Einstellungen hier und speichern die Design Rules unter 
+einem neuen Namen ab.</description>
+<description language="en">&lt;b&gt;EAGLE Design Rules&lt;/b&gt;
+&lt;p&gt;
+The default Design Rules have been set to cover
+a wide range of applications. Your particular design
+may have different requirements, so please make the
+necessary adjustments and save your customized
+design rules under a new name.</description>
+<param name="layerSetup" value="(1*16)"/>
+<param name="mtCopper" value="0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm"/>
+<param name="mtIsolate" value="1.5mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm"/>
+<param name="mdWireWire" value="8mil"/>
+<param name="mdWirePad" value="8mil"/>
+<param name="mdWireVia" value="8mil"/>
+<param name="mdPadPad" value="8mil"/>
+<param name="mdPadVia" value="8mil"/>
+<param name="mdViaVia" value="8mil"/>
+<param name="mdSmdPad" value="8mil"/>
+<param name="mdSmdVia" value="8mil"/>
+<param name="mdSmdSmd" value="8mil"/>
+<param name="mdViaViaSameLayer" value="8mil"/>
+<param name="mnLayersViaInSmd" value="2"/>
+<param name="mdCopperDimension" value="40mil"/>
+<param name="mdDrill" value="8mil"/>
+<param name="mdSmdStop" value="0mil"/>
+<param name="msWidth" value="10mil"/>
+<param name="msDrill" value="24mil"/>
+<param name="msMicroVia" value="9.99mm"/>
+<param name="msBlindViaRatio" value="0.5"/>
+<param name="rvPadTop" value="0.25"/>
+<param name="rvPadInner" value="0.25"/>
+<param name="rvPadBottom" value="0.25"/>
+<param name="rvViaOuter" value="0.25"/>
+<param name="rvViaInner" value="0.25"/>
+<param name="rvMicroViaOuter" value="0.25"/>
+<param name="rvMicroViaInner" value="0.25"/>
+<param name="rlMinPadTop" value="10mil"/>
+<param name="rlMaxPadTop" value="20mil"/>
+<param name="rlMinPadInner" value="10mil"/>
+<param name="rlMaxPadInner" value="20mil"/>
+<param name="rlMinPadBottom" value="10mil"/>
+<param name="rlMaxPadBottom" value="20mil"/>
+<param name="rlMinViaOuter" value="8mil"/>
+<param name="rlMaxViaOuter" value="20mil"/>
+<param name="rlMinViaInner" value="8mil"/>
+<param name="rlMaxViaInner" value="20mil"/>
+<param name="rlMinMicroViaOuter" value="4mil"/>
+<param name="rlMaxMicroViaOuter" value="20mil"/>
+<param name="rlMinMicroViaInner" value="4mil"/>
+<param name="rlMaxMicroViaInner" value="20mil"/>
+<param name="psTop" value="-1"/>
+<param name="psBottom" value="-1"/>
+<param name="psFirst" value="-1"/>
+<param name="psElongationLong" value="100"/>
+<param name="psElongationOffset" value="100"/>
+<param name="mvStopFrame" value="1"/>
+<param name="mvCreamFrame" value="0"/>
+<param name="mlMinStopFrame" value="4mil"/>
+<param name="mlMaxStopFrame" value="4mil"/>
+<param name="mlMinCreamFrame" value="0mil"/>
+<param name="mlMaxCreamFrame" value="0mil"/>
+<param name="mlViaStopLimit" value="0mil"/>
+<param name="srRoundness" value="0"/>
+<param name="srMinRoundness" value="0mil"/>
+<param name="srMaxRoundness" value="0mil"/>
+<param name="slThermalIsolate" value="10mil"/>
+<param name="slThermalsForVias" value="0"/>
+<param name="dpMaxLengthDifference" value="10mm"/>
+<param name="dpGapFactor" value="2.5"/>
+<param name="checkGrid" value="0"/>
+<param name="checkAngle" value="0"/>
+<param name="checkFont" value="1"/>
+<param name="checkRestrict" value="1"/>
+<param name="useDiameter" value="13"/>
+<param name="maxErrors" value="50"/>
+</designrules>
+<autorouter>
+<pass name="Default">
+<param name="RoutingGrid" value="50mil"/>
+<param name="tpViaShape" value="round"/>
+<param name="PrefDir.1" value="|"/>
+<param name="PrefDir.2" value="0"/>
+<param name="PrefDir.3" value="0"/>
+<param name="PrefDir.4" value="0"/>
+<param name="PrefDir.5" value="0"/>
+<param name="PrefDir.6" value="0"/>
+<param name="PrefDir.7" value="0"/>
+<param name="PrefDir.8" value="0"/>
+<param name="PrefDir.9" value="0"/>
+<param name="PrefDir.10" value="0"/>
+<param name="PrefDir.11" value="0"/>
+<param name="PrefDir.12" value="0"/>
+<param name="PrefDir.13" value="0"/>
+<param name="PrefDir.14" value="0"/>
+<param name="PrefDir.15" value="0"/>
+<param name="PrefDir.16" value="-"/>
+<param name="cfVia" value="8"/>
+<param name="cfNonPref" value="5"/>
+<param name="cfChangeDir" value="2"/>
+<param name="cfOrthStep" value="2"/>
+<param name="cfDiagStep" value="3"/>
+<param name="cfExtdStep" value="0"/>
+<param name="cfBonusStep" value="1"/>
+<param name="cfMalusStep" value="1"/>
+<param name="cfPadImpact" value="4"/>
+<param name="cfSmdImpact" value="4"/>
+<param name="cfBusImpact" value="0"/>
+<param name="cfHugging" value="3"/>
+<param name="cfAvoid" value="4"/>
+<param name="cfPolygon" value="10"/>
+<param name="cfBase.1" value="0"/>
+<param name="cfBase.2" value="1"/>
+<param name="cfBase.3" value="1"/>
+<param name="cfBase.4" value="1"/>
+<param name="cfBase.5" value="1"/>
+<param name="cfBase.6" value="1"/>
+<param name="cfBase.7" value="1"/>
+<param name="cfBase.8" value="1"/>
+<param name="cfBase.9" value="1"/>
+<param name="cfBase.10" value="1"/>
+<param name="cfBase.11" value="1"/>
+<param name="cfBase.12" value="1"/>
+<param name="cfBase.13" value="1"/>
+<param name="cfBase.14" value="1"/>
+<param name="cfBase.15" value="1"/>
+<param name="cfBase.16" value="0"/>
+<param name="mnVias" value="20"/>
+<param name="mnSegments" value="9999"/>
+<param name="mnExtdSteps" value="9999"/>
+<param name="mnRipupLevel" value="10"/>
+<param name="mnRipupSteps" value="100"/>
+<param name="mnRipupTotal" value="100"/>
+</pass>
+<pass name="Follow-me" refer="Default" active="yes">
+</pass>
+<pass name="Busses" refer="Default" active="yes">
+<param name="cfNonPref" value="4"/>
+<param name="cfBusImpact" value="4"/>
+<param name="cfHugging" value="0"/>
+<param name="mnVias" value="0"/>
+</pass>
+<pass name="Route" refer="Default" active="yes">
+</pass>
+<pass name="Optimize1" refer="Default" active="yes">
+<param name="cfVia" value="99"/>
+<param name="cfExtdStep" value="10"/>
+<param name="cfHugging" value="1"/>
+<param name="mnExtdSteps" value="1"/>
+<param name="mnRipupLevel" value="0"/>
+</pass>
+<pass name="Optimize2" refer="Optimize1" active="yes">
+<param name="cfNonPref" value="0"/>
+<param name="cfChangeDir" value="6"/>
+<param name="cfExtdStep" value="0"/>
+<param name="cfBonusStep" value="2"/>
+<param name="cfMalusStep" value="2"/>
+<param name="cfPadImpact" value="2"/>
+<param name="cfSmdImpact" value="2"/>
+<param name="cfHugging" value="0"/>
+</pass>
+<pass name="Optimize3" refer="Optimize2" active="yes">
+<param name="cfChangeDir" value="8"/>
+<param name="cfPadImpact" value="0"/>
+<param name="cfSmdImpact" value="0"/>
+</pass>
+<pass name="Optimize4" refer="Optimize3" active="yes">
+<param name="cfChangeDir" value="25"/>
+</pass>
+</autorouter>
+<elements>
+<element name="IC1" library="atmel" package="DIL40" value="ATMEGA644-20PU" x="35.56" y="68.58">
+<attribute name="OC_NEWARK" value="23M5060" x="74.93" y="15.24" size="1.778" layer="27" display="off"/>
+<attribute name="MPN" value="ATMEGA644-20PU" x="74.93" y="15.24" size="1.778" layer="27" display="off"/>
+<attribute name="MF" value="" x="74.93" y="15.24" size="1.778" layer="27" display="off"/>
+<attribute name="OC_FARNELL" value="1288340" x="74.93" y="15.24" size="1.778" layer="27" display="off"/>
+</element>
+<element name="R1" library="resistor" package="0207/12" value="1k8" x="21.59" y="48.26" rot="R270"/>
+<element name="LED1" library="led" package="LED5MM" value="Green" x="4.7625" y="72.7075" rot="R90"/>
+<element name="LED2" library="led" package="LED5MM" value="Red" x="4.7625" y="65.7225" rot="R90"/>
+<element name="C1" library="resistor" package="C025-025X050" value="100nF" x="45.72" y="26.035" rot="R180"/>
+<element name="C2" library="resistor" package="C025-025X050" value="100nF" x="43.815" y="70.8025" rot="R90"/>
+<element name="C3" library="resistor" package="E2,5-5" value="2.2uF" x="38.25875" y="21.74875" rot="R90"/>
+<element name="PWR" library="con-molex" package="6410-02" value="22-27-2021-02" x="46.99" y="5.08" rot="R180">
+<attribute name="OC_NEWARK" value="unknown" x="-10.16" y="73.66" size="1.778" layer="27" rot="R180" display="off"/>
+<attribute name="MPN" value="" x="-10.16" y="73.66" size="1.778" layer="27" rot="R180" display="off"/>
+<attribute name="MF" value="" x="-10.16" y="73.66" size="1.778" layer="27" rot="R180" display="off"/>
+<attribute name="OC_FARNELL" value="unknown" x="-10.16" y="73.66" size="1.778" layer="27" rot="R180" display="off"/>
+</element>
+<element name="IEC" library="con-molex" package="6410-03" value="22-27-2031-03" x="59.69" y="5.08" rot="R180">
+<attribute name="OC_NEWARK" value="unknown" x="13.97" y="73.66" size="1.778" layer="27" rot="R180" display="off"/>
+<attribute name="MPN" value="" x="13.97" y="73.66" size="1.778" layer="27" rot="R180" display="off"/>
+<attribute name="MF" value="" x="13.97" y="73.66" size="1.778" layer="27" rot="R180" display="off"/>
+<attribute name="OC_FARNELL" value="unknown" x="13.97" y="73.66" size="1.778" layer="27" rot="R180" display="off"/>
+</element>
+<element name="R2" library="resistor" package="0207/12" value="1k8" x="24.13" y="48.26" rot="R270"/>
+<element name="R3" library="resistor" package="0207/12" value="1k8" x="29.21" y="48.26" rot="R270"/>
+<element name="C4" library="rcl" package="C025-025X050" value="33pF" x="50.165" y="46.99" rot="R270"/>
+<element name="C5" library="rcl" package="C025-025X050" value="33pF" x="55.245" y="46.99" rot="R270"/>
+<element name="Q1" library="special" package="QS" value="8 Mhz" x="52.705" y="53.34"/>
+<element name="R4" library="resistor" package="0207/12" value="3k3" x="27.94" y="39.37"/>
+<element name="R5" library="resistor" package="0207/12" value="3k3" x="30.1625" y="36.5125"/>
+<element name="R6" library="resistor" package="0207/12" value="3k3" x="30.1625" y="33.3375"/>
+<element name="R7" library="resistor" package="0207/12" value="560" x="20.32" y="71.12" rot="R180"/>
+<element name="R8" library="resistor" package="0207/12" value="560" x="20.32" y="68.2625" rot="R180"/>
+<element name="R9" library="resistor" package="0207/12" value="10k" x="40.64" y="42.2275" rot="R180"/>
+<element name="RESET" library="switch-omron" package="B3F-10XX" value="" x="36.195" y="51.1175" rot="R270">
+<attribute name="OC_NEWARK" value="36M3542" x="-47.625" y="32.0675" size="1.778" layer="27" rot="R270" display="off"/>
+<attribute name="MPN" value="B3F-1000" x="-47.625" y="32.0675" size="1.778" layer="27" rot="R270" display="off"/>
+<attribute name="MF" value="" x="-47.625" y="32.0675" size="1.778" layer="27" rot="R270" display="off"/>
+<attribute name="OC_FARNELL" value="176432" x="-47.625" y="32.0675" size="1.778" layer="27" rot="R270" display="off"/>
+</element>
+<element name="U$1" library="adafruit" package="06132" value="SDMMC06132" x="16.51" y="24.13" rot="MR0"/>
+<element name="DISK1" library="switch-omron" package="B3F-10XX" value="" x="13.6525" y="53.34" rot="R180">
+<attribute name="OC_NEWARK" value="36M3542" x="13.6525" y="53.34" size="1.778" layer="27" rot="R180" display="off"/>
+<attribute name="MPN" value="B3F-1000" x="13.6525" y="53.34" size="1.778" layer="27" rot="R180" display="off"/>
+<attribute name="MF" value="" x="13.6525" y="53.34" size="1.778" layer="27" rot="R180" display="off"/>
+<attribute name="OC_FARNELL" value="176432" x="13.6525" y="53.34" size="1.778" layer="27" rot="R180" display="off"/>
+</element>
+<element name="DISK2" library="switch-omron" package="B3F-10XX" value="" x="13.6525" y="43.815" rot="R180">
+<attribute name="OC_NEWARK" value="36M3542" x="13.6525" y="43.815" size="1.778" layer="27" rot="R180" display="off"/>
+<attribute name="MPN" value="B3F-1000" x="13.6525" y="43.815" size="1.778" layer="27" rot="R180" display="off"/>
+<attribute name="MF" value="" x="13.6525" y="43.815" size="1.778" layer="27" rot="R180" display="off"/>
+<attribute name="OC_FARNELL" value="176432" x="13.6525" y="43.815" size="1.778" layer="27" rot="R180" display="off"/>
+</element>
+<element name="ID8/9" library="adafruit" package="1X03" value="" x="5.08" y="53.34" rot="R270"/>
+<element name="ID10/11" library="adafruit" package="1X03" value="" x="5.08" y="43.4975" rot="R270"/>
+<element name="LF33CV" library="v-reg" package="78XXS" value="" x="45.72" y="12.065" rot="R180"/>
+</elements>
+<signals>
+<signal name="1">
+<contactref element="PWR" pad="2"/>
+<contactref element="IC1" pad="10"/>
+<contactref element="C1" pad="1"/>
+<contactref element="C2" pad="2"/>
+<contactref element="R7" pad="1"/>
+<contactref element="R8" pad="1"/>
+<contactref element="R9" pad="1"/>
+<contactref element="IC1" pad="30"/>
+<wire x1="26.67" y1="71.12" x2="26.67" y2="68.2625" width="0.8128" layer="16"/>
+<wire x1="46.99" y1="26.035" x2="48.26" y2="24.765" width="0.8128" layer="16"/>
+<wire x1="34.29" y1="60.96" x2="34.29" y2="66.04" width="0.8128" layer="16"/>
+<wire x1="34.29" y1="66.04" x2="34.29" y2="70.485" width="0.8128" layer="16"/>
+<wire x1="34.29" y1="70.485" x2="36.83" y2="73.025" width="0.8128" layer="16"/>
+<wire x1="36.83" y1="73.025" x2="36.83" y2="76.2" width="0.8128" layer="16"/>
+<wire x1="34.29" y1="66.04" x2="28.8925" y2="66.04" width="0.8128" layer="16"/>
+<wire x1="28.8925" y1="66.04" x2="26.67" y2="68.2625" width="0.8128" layer="16"/>
+<wire x1="46.99" y1="42.2275" x2="46.99" y2="26.035" width="0.8128" layer="16"/>
+<wire x1="46.99" y1="42.2275" x2="40.3225" y2="42.2275" width="0.8128" layer="16"/>
+<wire x1="40.3225" y1="42.2275" x2="36.195" y2="46.355" width="0.8128" layer="16"/>
+<wire x1="36.195" y1="46.355" x2="36.195" y2="56.515" width="0.8128" layer="16"/>
+<wire x1="36.195" y1="56.515" x2="34.29" y2="58.42" width="0.8128" layer="16"/>
+<wire x1="34.29" y1="58.42" x2="34.29" y2="60.96" width="0.8128" layer="16"/>
+<wire x1="43.815" y1="72.0725" x2="41.91" y2="72.0725" width="0.8128" layer="16"/>
+<wire x1="41.91" y1="72.0725" x2="41.5925" y2="73.025" width="0.8128" layer="16"/>
+<wire x1="41.5925" y1="73.025" x2="36.83" y2="73.025" width="0.8128" layer="16"/>
+<contactref element="LF33CV" pad="IN"/>
+<wire x1="48.26" y1="24.60625" x2="48.26" y2="14.605" width="0.8128" layer="16"/>
+<wire x1="48.26" y1="14.605" x2="48.26" y2="5.08" width="0.8128" layer="16"/>
+<wire x1="48.26" y1="24.60625" x2="48.26" y2="24.765" width="0" layer="19" extent="16-16"/>
+</signal>
+<signal name="GND">
+<contactref element="PWR" pad="1"/>
+<contactref element="R6" pad="2"/>
+<contactref element="C4" pad="2"/>
+<contactref element="C5" pad="2"/>
+<contactref element="IC1" pad="11"/>
+<contactref element="C1" pad="2"/>
+<contactref element="R5" pad="2"/>
+<contactref element="R4" pad="2"/>
+<contactref element="C2" pad="1"/>
+<contactref element="C3" pad="-"/>
+<contactref element="IC1" pad="31"/>
+<contactref element="RESET" pad="1"/>
+<wire x1="34.29" y1="39.37" x2="36.5125" y2="36.5125" width="0.8128" layer="16"/>
+<wire x1="36.5125" y1="36.5125" x2="36.5125" y2="33.3375" width="0.8128" layer="16"/>
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+<contactref element="IC1" pad="38"/>
+<contactref element="ID8/9" pad="1"/>
+<wire x1="16.51" y1="76.2" x2="16.51" y2="67.945" width="0.8128" layer="16"/>
+<wire x1="16.51" y1="67.945" x2="14.9225" y2="66.3575" width="0.8128" layer="16"/>
+<wire x1="14.9225" y1="66.3575" x2="10.16" y2="66.3575" width="0.8128" layer="16"/>
+<wire x1="10.16" y1="66.3575" x2="5.08" y2="61.2775" width="0.8128" layer="16"/>
+<wire x1="5.08" y1="61.2775" x2="5.08" y2="55.88" width="0.8128" layer="16"/>
+</signal>
+<signal name="N$18">
+<contactref element="RESET" pad="3"/>
+<contactref element="R9" pad="2"/>
+<contactref element="IC1" pad="9"/>
+<wire x1="34.29" y1="42.2275" x2="34.29" y2="45.4025" width="0.8128" layer="16"/>
+<wire x1="34.29" y1="45.4025" x2="33.9725" y2="45.72" width="0.8128" layer="16"/>
+<wire x1="33.9725" y1="45.72" x2="33.9725" y2="54.3306" width="0.8128" layer="16"/>
+<wire x1="33.9725" y1="54.3306" x2="33.9344" y2="54.3687" width="0.8128" layer="16"/>
+<wire x1="33.9344" y1="54.3687" x2="33.9344" y2="55.2831" width="0.8128" layer="16"/>
+<wire x1="33.9344" y1="55.2831" x2="31.75" y2="57.4675" width="0.8128" layer="16"/>
+<wire x1="31.75" y1="57.4675" x2="31.75" y2="60.96" width="0.8128" layer="16"/>
+<contactref element="RESET" pad="4"/>
+<wire x1="33.9725" y1="45.72" x2="33.9344" y2="47.8663" width="0" layer="19" extent="16-16"/>
+</signal>
+<signal name="VDD">
+<contactref element="C3" pad="+"/>
+<contactref element="U$1" pad="4"/>
+<wire x1="20.32" y1="11.43" x2="17.145" y2="14.605" width="0.8128" layer="16"/>
+<wire x1="17.145" y1="14.605" x2="17.145" y2="24.60625" width="0.8128" layer="16"/>
+<contactref element="LF33CV" pad="OUT"/>
+<wire x1="17.145" y1="24.60625" x2="17.145" y2="25.0825" width="0.8128" layer="16"/>
+<wire x1="38.25875" y1="20.47875" x2="38.25875" y2="19.52625" width="0.8128" layer="16"/>
+<wire x1="38.25875" y1="19.52625" x2="43.18" y2="14.605" width="0.8128" layer="16"/>
+<wire x1="38.25875" y1="20.47875" x2="38.25875" y2="15.875" width="0.8128" layer="16"/>
+<wire x1="38.25875" y1="15.875" x2="33.81375" y2="11.43" width="0.8128" layer="16"/>
+<wire x1="33.81375" y1="11.43" x2="20.32" y2="11.43" width="0.8128" layer="16"/>
+<wire x1="17.11" y1="25.03" x2="17.145" y2="25.03" width="0.4064" layer="16"/>
+<wire x1="17.145" y1="25.03" x2="17.145" y2="24.60625" width="0.4064" layer="16"/>
+</signal>
+<signal name="N$4">
+<via x="39.0525" y="69.5325" extent="1-16" drill="0.6" diameter="1.6764"/>
+</signal>
+<signal name="N$6">
+<via x="31.115" y="69.5325" extent="1-16" drill="0.6" diameter="1.6764"/>
+</signal>
+<signal name="N$7">
+<contactref element="IC1" pad="16"/>
+<contactref element="U$1" pad="CD"/>
+<wire x1="54.2925" y1="35.40125" x2="54.2925" y2="40.64" width="0.8128" layer="16"/>
+<wire x1="54.2925" y1="40.64" x2="57.4675" y2="43.815" width="0.8128" layer="16"/>
+<wire x1="57.4675" y1="43.815" x2="57.4675" y2="54.61" width="0.8128" layer="16"/>
+<wire x1="57.4675" y1="54.61" x2="54.13375" y2="57.94375" width="0.8128" layer="16"/>
+<wire x1="54.13375" y1="57.94375" x2="50.8" y2="57.94375" width="0.8128" layer="16"/>
+<wire x1="50.8" y1="57.94375" x2="49.53" y2="59.21375" width="0.8128" layer="16"/>
+<wire x1="49.53" y1="59.21375" x2="49.53" y2="60.96" width="0.8128" layer="16"/>
+<wire x1="41.5925" y1="35.40125" x2="54.2925" y2="35.40125" width="0.8128" layer="1"/>
+<via x="54.2925" y="35.40125" extent="1-16" drill="0.6" diameter="1.6764"/>
+<wire x1="27.46375" y1="25.0825" x2="27.46375" y2="25.55875" width="0.6096" layer="16"/>
+<wire x1="27.46375" y1="25.55875" x2="27.46375" y2="28.2575" width="0.6096" layer="16"/>
+<wire x1="27.46375" y1="28.2575" x2="28.8925" y2="29.68625" width="0.6096" layer="16"/>
+<wire x1="28.8925" y1="29.68625" x2="35.8775" y2="29.68625" width="0.8128" layer="16"/>
+<wire x1="35.8775" y1="29.68625" x2="41.5925" y2="35.40125" width="0.8128" layer="16"/>
+<via x="41.5925" y="35.40125" extent="1-16" drill="0.6" diameter="1.6764"/>
+<wire x1="27.51" y1="25.03" x2="27.46375" y2="25.03" width="0.4064" layer="16"/>
+<wire x1="27.46375" y1="25.03" x2="27.46375" y2="25.55875" width="0.4064" layer="16"/>
+</signal>
+<signal name="N$3">
+<contactref element="IC1" pad="37"/>
+<contactref element="ID10/11" pad="1"/>
+<wire x1="19.05" y1="76.2" x2="19.05" y2="68.2625" width="0.8128" layer="16"/>
+<wire x1="19.05" y1="68.2625" x2="15.5575" y2="64.77" width="0.8128" layer="16"/>
+<wire x1="15.5575" y1="64.77" x2="10.795" y2="64.77" width="0.8128" layer="16"/>
+<wire x1="10.795" y1="64.77" x2="7.3025" y2="61.2775" width="0.8128" layer="16"/>
+<wire x1="7.3025" y1="61.2775" x2="7.3025" y2="49.8475" width="0.8128" layer="16"/>
+<wire x1="7.3025" y1="49.8475" x2="5.08" y2="47.625" width="0.8128" layer="16"/>
+<wire x1="5.08" y1="47.625" x2="5.08" y2="46.0375" width="0.8128" layer="16"/>
+</signal>
+<signal name="N$20">
+<contactref element="IC1" pad="36"/>
+<contactref element="DISK1" pad="3"/>
+<wire x1="21.59" y1="76.2" x2="21.59" y2="67.945" width="0.8128" layer="16"/>
+<wire x1="21.59" y1="67.945" x2="17.78" y2="64.135" width="0.8128" layer="16"/>
+<wire x1="17.78" y1="63.1825" x2="17.78" y2="58.7375" width="0.4064" layer="16"/>
+<wire x1="17.78" y1="63.1825" x2="17.78" y2="64.135" width="0.8128" layer="16"/>
+<wire x1="17.78" y1="58.7375" x2="17.78" y2="56.515" width="0.8128" layer="16"/>
+<wire x1="17.78" y1="56.515" x2="16.8275" y2="55.5625" width="0.8128" layer="16"/>
+<wire x1="16.8275" y1="55.5625" x2="16.9037" y2="55.6006" width="0" layer="19" extent="16-16"/>
+</signal>
+<signal name="N$27">
+<wire x1="54.2925" y1="32.385" x2="56.67375" y2="32.385" width="0.8128" layer="16"/>
+<wire x1="56.67375" y1="32.385" x2="56.67375" y2="39.88214375" width="0.8128" layer="16"/>
+<contactref element="IC1" pad="20"/>
+<contactref element="U$1" pad="WP"/>
+<wire x1="59.813709375" y1="43.022103125" x2="59.69" y2="60.96" width="0.8128" layer="16"/>
+<wire x1="41.5925" y1="32.385" x2="54.2925" y2="32.385" width="0.8128" layer="1"/>
+<via x="54.2925" y="32.385" extent="1-16" drill="0.6" diameter="1.6764"/>
+<wire x1="28.73375" y1="25.24125" x2="28.73375" y2="27.305" width="0.6096" layer="16"/>
+<wire x1="28.73375" y1="27.305" x2="29.5275" y2="28.09875" width="0.6096" layer="16"/>
+<wire x1="29.5275" y1="28.09875" x2="37.30625" y2="28.09875" width="0.8128" layer="16"/>
+<wire x1="37.30625" y1="28.09875" x2="41.5925" y2="32.385" width="0.8128" layer="16"/>
+<via x="41.5925" y="32.385" extent="1-16" drill="0.6" diameter="1.6764"/>
+<wire x1="56.67375" y1="39.88214375" x2="59.813709375" y2="43.022103125" width="0.8128" layer="16"/>
+<wire x1="28.71" y1="25.03" x2="28.73375" y2="25.03" width="0.4064" layer="16"/>
+<wire x1="28.73375" y1="25.03" x2="28.73375" y2="24.4475" width="0.4064" layer="16"/>
+<wire x1="28.73375" y1="23.65375" x2="28.73375" y2="24.4475" width="0.4064" layer="16"/>
+<wire x1="28.73375" y1="25.03" x2="28.73375" y2="25.24125" width="0.4064" layer="16"/>
+</signal>
+<signal name="N$22">
+<wire x1="20.32" y1="63.1825" x2="20.32" y2="59.3725" width="0.4064" layer="16"/>
+<wire x1="20.32" y1="59.3725" x2="19.685" y2="58.57875" width="0.4064" layer="16"/>
+<wire x1="24.13" y1="67.945" x2="20.32" y2="64.135" width="0.8128" layer="16"/>
+<wire x1="20.32" y1="64.135" x2="20.32" y2="63.1825" width="0.8128" layer="16"/>
+<wire x1="19.685" y1="58.57875" x2="19.685" y2="47.46625" width="0.8128" layer="16"/>
+<wire x1="16.8275" y1="46.0375" x2="18.25625" y2="46.0375" width="0.8128" layer="16"/>
+<wire x1="18.25625" y1="46.0375" x2="19.685" y2="47.46625" width="0.8128" layer="16"/>
+<contactref element="IC1" pad="35"/>
+<contactref element="DISK2" pad="3"/>
+<wire x1="24.13" y1="76.2" x2="24.13" y2="67.945" width="0.8128" layer="16"/>
+<wire x1="16.9037" y1="46.0756" x2="16.8275" y2="46.0375" width="0" layer="19" extent="16-16"/>
+</signal>
+</signals>
+</board>
+</drawing>
+<compatibility>
+<note version="6.3" minversion="6.2.2" severity="warning">
+Since Version 6.2.2 text objects can contain more than one line,
+which will not be processed correctly with this version.
+</note>
+</compatibility>
+</eagle>
diff --git a/trunk/AVRProjects/sd2iec/larsp/SD2IEC v1.2 LF33CV.png b/trunk/AVRProjects/sd2iec/larsp/SD2IEC v1.2 LF33CV.png
new file mode 100644
index 00000000..05243af8
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/larsp/SD2IEC v1.2 LF33CV.png differ
diff --git a/trunk/AVRProjects/sd2iec/larsp/SD2IEC v1.2 LF33CV.sch b/trunk/AVRProjects/sd2iec/larsp/SD2IEC v1.2 LF33CV.sch
new file mode 100644
index 00000000..17d6d765
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/larsp/SD2IEC v1.2 LF33CV.sch	
@@ -0,0 +1,17387 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!DOCTYPE eagle SYSTEM "eagle.dtd">
+<eagle version="6.4">
+<drawing>
+<settings>
+<setting alwaysvectorfont="no"/>
+<setting verticaltext="up"/>
+</settings>
+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/>
+<layers>
+<layer number="1" name="Top" color="4" fill="1" visible="no" active="no"/>
+<layer number="2" name="Route2" color="1" fill="3" visible="no" active="no"/>
+<layer number="3" name="Route3" color="4" fill="3" visible="no" active="no"/>
+<layer number="4" name="Route4" color="1" fill="4" visible="no" active="no"/>
+<layer number="5" name="Route5" color="4" fill="4" visible="no" active="no"/>
+<layer number="6" name="Route6" color="1" fill="8" visible="no" active="no"/>
+<layer number="7" name="Route7" color="4" fill="8" visible="no" active="no"/>
+<layer number="8" name="Route8" color="1" fill="2" visible="no" active="no"/>
+<layer number="9" name="Route9" color="4" fill="2" visible="no" active="no"/>
+<layer number="10" name="Route10" color="1" fill="7" visible="no" active="no"/>
+<layer number="11" name="Route11" color="4" fill="7" visible="no" active="no"/>
+<layer number="12" name="Route12" color="1" fill="5" visible="no" active="no"/>
+<layer number="13" name="Route13" color="4" fill="5" visible="no" active="no"/>
+<layer number="14" name="Route14" color="1" fill="6" visible="no" active="no"/>
+<layer number="15" name="Route15" color="4" fill="6" visible="no" active="no"/>
+<layer number="16" name="Bottom" color="1" fill="1" visible="no" active="no"/>
+<layer number="17" name="Pads" color="2" fill="1" visible="no" active="no"/>
+<layer number="18" name="Vias" color="2" fill="1" visible="no" active="no"/>
+<layer number="19" name="Unrouted" color="6" fill="1" visible="no" active="no"/>
+<layer number="20" name="Dimension" color="15" fill="1" visible="no" active="no"/>
+<layer number="21" name="tPlace" color="7" fill="1" visible="no" active="no"/>
+<layer number="22" name="bPlace" color="7" fill="1" visible="no" active="no"/>
+<layer number="23" name="tOrigins" color="15" fill="1" visible="no" active="no"/>
+<layer number="24" name="bOrigins" color="15" fill="1" visible="no" active="no"/>
+<layer number="25" name="tNames" color="7" fill="1" visible="no" active="no"/>
+<layer number="26" name="bNames" color="7" fill="1" visible="no" active="no"/>
+<layer number="27" name="tValues" color="7" fill="1" visible="no" active="no"/>
+<layer number="28" name="bValues" color="7" fill="1" visible="no" active="no"/>
+<layer number="29" name="tStop" color="7" fill="3" visible="no" active="no"/>
+<layer number="30" name="bStop" color="7" fill="6" visible="no" active="no"/>
+<layer number="31" name="tCream" color="7" fill="4" visible="no" active="no"/>
+<layer number="32" name="bCream" color="7" fill="5" visible="no" active="no"/>
+<layer number="33" name="tFinish" color="6" fill="3" visible="no" active="no"/>
+<layer number="34" name="bFinish" color="6" fill="6" visible="no" active="no"/>
+<layer number="35" name="tGlue" color="7" fill="4" visible="no" active="no"/>
+<layer number="36" name="bGlue" color="7" fill="5" visible="no" active="no"/>
+<layer number="37" name="tTest" color="7" fill="1" visible="no" active="no"/>
+<layer number="38" name="bTest" color="7" fill="1" visible="no" active="no"/>
+<layer number="39" name="tKeepout" color="4" fill="11" visible="no" active="no"/>
+<layer number="40" name="bKeepout" color="1" fill="11" visible="no" active="no"/>
+<layer number="41" name="tRestrict" color="4" fill="10" visible="no" active="no"/>
+<layer number="42" name="bRestrict" color="1" fill="10" visible="no" active="no"/>
+<layer number="43" name="vRestrict" color="2" fill="10" visible="no" active="no"/>
+<layer number="44" name="Drills" color="7" fill="1" visible="no" active="no"/>
+<layer number="45" name="Holes" color="7" fill="1" visible="no" active="no"/>
+<layer number="46" name="Milling" color="3" fill="1" visible="no" active="no"/>
+<layer number="47" name="Measures" color="7" fill="1" visible="no" active="no"/>
+<layer number="48" name="Document" color="7" fill="1" visible="no" active="no"/>
+<layer number="49" name="Reference" color="7" fill="1" visible="no" active="no"/>
+<layer number="50" name="dxf" color="7" fill="1" visible="no" active="no"/>
+<layer number="51" name="tDocu" color="7" fill="1" visible="no" active="no"/>
+<layer number="52" name="bDocu" color="7" fill="1" visible="no" active="no"/>
+<layer number="53" name="tGND_GNDA" color="7" fill="9" visible="no" active="no"/>
+<layer number="54" name="bGND_GNDA" color="1" fill="9" visible="no" active="no"/>
+<layer number="56" name="wert" color="7" fill="1" visible="no" active="no"/>
+<layer number="57" name="tCAD" color="7" fill="1" visible="no" active="no"/>
+<layer number="91" name="Nets" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="92" name="Busses" color="1" fill="1" visible="yes" active="yes"/>
+<layer number="93" name="Pins" color="2" fill="1" visible="no" active="yes"/>
+<layer number="94" name="Symbols" color="4" fill="1" visible="yes" active="yes"/>
+<layer number="95" name="Names" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="96" name="Values" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="97" name="Info" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/>
+<layer number="100" name="Muster" color="7" fill="1" visible="no" active="no"/>
+<layer number="101" name="Patch_Top" color="12" fill="4" visible="yes" active="yes"/>
+<layer number="102" name="Vscore" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="103" name="fp3" color="7" fill="1" visible="no" active="yes"/>
+<layer number="104" name="Name" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="105" name="Beschreib" color="9" fill="1" visible="yes" active="yes"/>
+<layer number="106" name="BGA-Top" color="4" fill="1" visible="yes" active="yes"/>
+<layer number="107" name="BD-Top" color="5" fill="1" visible="yes" active="yes"/>
+<layer number="108" name="fp8" color="7" fill="1" visible="no" active="yes"/>
+<layer number="109" name="fp9" color="7" fill="1" visible="no" active="yes"/>
+<layer number="110" name="fp0" color="7" fill="1" visible="no" active="yes"/>
+<layer number="111" name="LPC17xx" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="112" name="tSilk" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="116" name="Patch_BOT" color="9" fill="4" visible="yes" active="yes"/>
+<layer number="121" name="_tsilk" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="122" name="_bsilk" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="123" name="tTestmark" color="7" fill="1" visible="no" active="yes"/>
+<layer number="124" name="bTestmark" color="7" fill="1" visible="no" active="yes"/>
+<layer number="125" name="_tNames" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="126" name="_bNames" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="127" name="_tValues" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="128" name="_bValues" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="131" name="tAdjust" color="7" fill="1" visible="no" active="yes"/>
+<layer number="132" name="bAdjust" color="7" fill="1" visible="no" active="yes"/>
+<layer number="144" name="Drill_legend" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="150" name="Notes" color="7" fill="1" visible="no" active="yes"/>
+<layer number="151" name="HeatSink" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="152" name="_bDocu" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="153" name="FabDoc1" color="6" fill="1" visible="no" active="no"/>
+<layer number="154" name="FabDoc2" color="2" fill="1" visible="no" active="no"/>
+<layer number="155" name="FabDoc3" color="7" fill="15" visible="no" active="no"/>
+<layer number="199" name="Contour" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="200" name="200bmp" color="1" fill="10" visible="yes" active="yes"/>
+<layer number="201" name="201bmp" color="2" fill="1" visible="no" active="no"/>
+<layer number="202" name="202bmp" color="3" fill="1" visible="no" active="no"/>
+<layer number="203" name="203bmp" color="4" fill="10" visible="yes" active="yes"/>
+<layer number="204" name="204bmp" color="5" fill="10" visible="yes" active="yes"/>
+<layer number="205" name="205bmp" color="6" fill="10" visible="yes" active="yes"/>
+<layer number="206" name="206bmp" color="7" fill="10" visible="yes" active="yes"/>
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+<layer number="208" name="208bmp" color="9" fill="10" visible="yes" active="yes"/>
+<layer number="209" name="209bmp" color="7" fill="1" visible="no" active="yes"/>
+<layer number="210" name="210bmp" color="7" fill="1" visible="no" active="yes"/>
+<layer number="211" name="211bmp" color="7" fill="1" visible="yes" active="yes"/>
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+<layer number="213" name="213bmp" color="7" fill="1" visible="yes" active="yes"/>
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+<layer number="217" name="217bmp" color="18" fill="1" visible="no" active="no"/>
+<layer number="218" name="218bmp" color="19" fill="1" visible="no" active="no"/>
+<layer number="219" name="219bmp" color="20" fill="1" visible="no" active="no"/>
+<layer number="220" name="220bmp" color="21" fill="1" visible="no" active="no"/>
+<layer number="221" name="221bmp" color="22" fill="1" visible="no" active="no"/>
+<layer number="222" name="222bmp" color="23" fill="1" visible="no" active="no"/>
+<layer number="223" name="223bmp" color="24" fill="1" visible="no" active="no"/>
+<layer number="224" name="224bmp" color="25" fill="1" visible="no" active="no"/>
+<layer number="248" name="Housing" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="249" name="Edge" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="250" name="Descript" color="7" fill="1" visible="no" active="no"/>
+<layer number="251" name="SMDround" color="7" fill="1" visible="no" active="no"/>
+<layer number="254" name="cooling" color="7" fill="1" visible="yes" active="yes"/>
+</layers>
+<schematic xreflabel="%F%N/%S.%C%R" xrefpart="/%S.%C%R">
+<libraries>
+<library name="atmel">
+<description>&lt;b&gt;AVR Devices&lt;/b&gt;&lt;p&gt;
+Configurable logic, microcontrollers, nonvolatile memories&lt;p&gt;
+Based on the following sources:&lt;p&gt;
+&lt;ul&gt;
+&lt;li&gt;www.atmel.com
+&lt;li&gt;CD-ROM : Configurable Logic Microcontroller Nonvolatile Memory
+&lt;li&gt;CadSoft download site, www.cadsoft.de or www.cadsoftusa.com , file at90smcu_v400.zip
+&lt;li&gt;avr.lbr
+&lt;/ul&gt;
+&lt;author&gt;Revised by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="DIL40">
+<description>&lt;B&gt;Dual In Line&lt;/B&gt;</description>
+<wire x1="-26.416" y1="-1.27" x2="-26.416" y2="-6.604" width="0.1524" layer="21"/>
+<wire x1="-26.416" y1="1.27" x2="-26.416" y2="-1.27" width="0.1524" layer="21" curve="-180"/>
+<wire x1="26.416" y1="-6.604" x2="26.416" y2="6.604" width="0.1524" layer="21"/>
+<wire x1="-26.416" y1="6.604" x2="-26.416" y2="1.27" width="0.1524" layer="21"/>
+<wire x1="-26.416" y1="6.604" x2="26.416" y2="6.604" width="0.1524" layer="21"/>
+<wire x1="-26.416" y1="-6.604" x2="26.416" y2="-6.604" width="0.1524" layer="21"/>
+<pad name="1" x="-24.13" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="2" x="-21.59" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="3" x="-19.05" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="4" x="-16.51" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="5" x="-13.97" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="6" x="-11.43" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="7" x="-8.89" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="8" x="-6.35" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="9" x="-3.81" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="10" x="-1.27" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="11" x="1.27" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="12" x="3.81" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="13" x="6.35" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="14" x="8.89" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="15" x="11.43" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="16" x="13.97" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="17" x="16.51" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="18" x="19.05" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="19" x="21.59" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="20" x="24.13" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="21" x="24.13" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="22" x="21.59" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="23" x="19.05" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="24" x="16.51" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="25" x="13.97" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="26" x="11.43" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="27" x="8.89" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="28" x="6.35" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="29" x="3.81" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="30" x="1.27" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="31" x="-1.27" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="32" x="-3.81" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="33" x="-6.35" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="34" x="-8.89" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="35" x="-11.43" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="36" x="-13.97" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="37" x="-16.51" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="38" x="-19.05" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="39" x="-21.59" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="40" x="-24.13" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<text x="-26.67" y="-6.35" size="1.778" layer="25" ratio="10" rot="R90">&gt;NAME</text>
+<text x="-21.59" y="-2.2352" size="1.778" layer="27" ratio="10">&gt;VALUE</text>
+</package>
+</packages>
+<symbols>
+<symbol name="ATMEGA644-20PU">
+<wire x1="-27.94" y1="-27.94" x2="27.94" y2="-27.94" width="0.254" layer="94"/>
+<wire x1="27.94" y1="-27.94" x2="27.94" y2="25.4" width="0.254" layer="94"/>
+<wire x1="27.94" y1="25.4" x2="-27.94" y2="25.4" width="0.254" layer="94"/>
+<wire x1="-27.94" y1="25.4" x2="-27.94" y2="-27.94" width="0.254" layer="94"/>
+<text x="-27.94" y="26.67" size="1.778" layer="95">&gt;NAME</text>
+<text x="-27.94" y="-30.48" size="1.778" layer="96">&gt;VALUE</text>
+<pin name="PCINT8/XCK0/T0_PB0" x="-30.48" y="22.86" length="short"/>
+<pin name="PCINT9/CLKO/T1_PB1" x="-30.48" y="20.32" length="short"/>
+<pin name="PCINT10/INT2/AIN0_PB2" x="-30.48" y="17.78" length="short"/>
+<pin name="PCINT11/OC0A/AIN1_PB3" x="-30.48" y="15.24" length="short"/>
+<pin name="PCINT12/OC0B/SS_PB4" x="-30.48" y="12.7" length="short"/>
+<pin name="PCINT13/MOSI_PB5" x="-30.48" y="10.16" length="short"/>
+<pin name="PCINT14/MISO_PB6" x="-30.48" y="7.62" length="short"/>
+<pin name="PCINT15/SCK_PB7" x="-30.48" y="5.08" length="short"/>
+<pin name="!RESET" x="-30.48" y="2.54" length="short" direction="in"/>
+<pin name="VCC" x="-30.48" y="0" length="short" direction="pwr"/>
+<pin name="GND" x="-30.48" y="-2.54" length="short" direction="pwr"/>
+<pin name="XTAL2" x="-30.48" y="-5.08" length="short" direction="out"/>
+<pin name="XTAL1" x="-30.48" y="-7.62" length="short" direction="in"/>
+<pin name="PCINT24/RXD0_PD0" x="-30.48" y="-10.16" length="short"/>
+<pin name="PCINT25/TXD0_PD1" x="-30.48" y="-12.7" length="short"/>
+<pin name="PCINT26/INT0_PD2" x="-30.48" y="-15.24" length="short"/>
+<pin name="PCINT27/INT1_PD3" x="-30.48" y="-17.78" length="short"/>
+<pin name="PCINT28/OC1B_PD4" x="-30.48" y="-20.32" length="short"/>
+<pin name="PCINT29/OC1A_PD5" x="-30.48" y="-22.86" length="short"/>
+<pin name="PCINT30/OC2B/ICP_PD6" x="-30.48" y="-25.4" length="short"/>
+<pin name="PCINT31/OC2A_PD7" x="30.48" y="-25.4" length="short" rot="R180"/>
+<pin name="PCINT16/SCL_PC0" x="30.48" y="-22.86" length="short" rot="R180"/>
+<pin name="PCINT17/SDA_PC1" x="30.48" y="-20.32" length="short" rot="R180"/>
+<pin name="PCINT18/TCK_PC2" x="30.48" y="-17.78" length="short" rot="R180"/>
+<pin name="PCINT19/TMS_PC3" x="30.48" y="-15.24" length="short" rot="R180"/>
+<pin name="PCINT20/TDO_PC4" x="30.48" y="-12.7" length="short" rot="R180"/>
+<pin name="PCINT21/TDI_PC5" x="30.48" y="-10.16" length="short" rot="R180"/>
+<pin name="PCINT22/TOSC1_PC6" x="30.48" y="-7.62" length="short" rot="R180"/>
+<pin name="PCINT23/TOSC2_PC7" x="30.48" y="-5.08" length="short" rot="R180"/>
+<pin name="AVCC" x="30.48" y="-2.54" length="short" direction="pwr" rot="R180"/>
+<pin name="GND@1" x="30.48" y="0" length="short" direction="pwr" rot="R180"/>
+<pin name="AREF" x="30.48" y="2.54" length="short" direction="pas" rot="R180"/>
+<pin name="PCINT7/ADC7_PA7" x="30.48" y="5.08" length="short" rot="R180"/>
+<pin name="PCINT6/ADC6_PA6" x="30.48" y="7.62" length="short" rot="R180"/>
+<pin name="PCINT5/ADC5_PA5" x="30.48" y="10.16" length="short" rot="R180"/>
+<pin name="PCINT4/ADC4_PA4" x="30.48" y="12.7" length="short" rot="R180"/>
+<pin name="PCINT3/ADC3_PA3" x="30.48" y="15.24" length="short" rot="R180"/>
+<pin name="PCINT2/ADC2_PA2" x="30.48" y="17.78" length="short" rot="R180"/>
+<pin name="PCINT1/ADC1_PA1" x="30.48" y="20.32" length="short" rot="R180"/>
+<pin name="PCINT0/ADC0_PA0" x="30.48" y="22.86" length="short" rot="R180"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="ATMEGA644-*PU" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 64K Bytes In-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Auto generated by &lt;i&gt;make-symbol-device-package-bsdl.ulp Rev. 34&lt;/i&gt;&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2593.pdf</description>
+<gates>
+<gate name="G$1" symbol="ATMEGA644-20PU" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="!RESET" pad="9"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="GND@1" pad="31"/>
+<connect gate="G$1" pin="PCINT0/ADC0_PA0" pad="40"/>
+<connect gate="G$1" pin="PCINT1/ADC1_PA1" pad="39"/>
+<connect gate="G$1" pin="PCINT10/INT2/AIN0_PB2" pad="3"/>
+<connect gate="G$1" pin="PCINT11/OC0A/AIN1_PB3" pad="4"/>
+<connect gate="G$1" pin="PCINT12/OC0B/SS_PB4" pad="5"/>
+<connect gate="G$1" pin="PCINT13/MOSI_PB5" pad="6"/>
+<connect gate="G$1" pin="PCINT14/MISO_PB6" pad="7"/>
+<connect gate="G$1" pin="PCINT15/SCK_PB7" pad="8"/>
+<connect gate="G$1" pin="PCINT16/SCL_PC0" pad="22"/>
+<connect gate="G$1" pin="PCINT17/SDA_PC1" pad="23"/>
+<connect gate="G$1" pin="PCINT18/TCK_PC2" pad="24"/>
+<connect gate="G$1" pin="PCINT19/TMS_PC3" pad="25"/>
+<connect gate="G$1" pin="PCINT2/ADC2_PA2" pad="38"/>
+<connect gate="G$1" pin="PCINT20/TDO_PC4" pad="26"/>
+<connect gate="G$1" pin="PCINT21/TDI_PC5" pad="27"/>
+<connect gate="G$1" pin="PCINT22/TOSC1_PC6" pad="28"/>
+<connect gate="G$1" pin="PCINT23/TOSC2_PC7" pad="29"/>
+<connect gate="G$1" pin="PCINT24/RXD0_PD0" pad="14"/>
+<connect gate="G$1" pin="PCINT25/TXD0_PD1" pad="15"/>
+<connect gate="G$1" pin="PCINT26/INT0_PD2" pad="16"/>
+<connect gate="G$1" pin="PCINT27/INT1_PD3" pad="17"/>
+<connect gate="G$1" pin="PCINT28/OC1B_PD4" pad="18"/>
+<connect gate="G$1" pin="PCINT29/OC1A_PD5" pad="19"/>
+<connect gate="G$1" pin="PCINT3/ADC3_PA3" pad="37"/>
+<connect gate="G$1" pin="PCINT30/OC2B/ICP_PD6" pad="20"/>
+<connect gate="G$1" pin="PCINT31/OC2A_PD7" pad="21"/>
+<connect gate="G$1" pin="PCINT4/ADC4_PA4" pad="36"/>
+<connect gate="G$1" pin="PCINT5/ADC5_PA5" pad="35"/>
+<connect gate="G$1" pin="PCINT6/ADC6_PA6" pad="34"/>
+<connect gate="G$1" pin="PCINT7/ADC7_PA7" pad="33"/>
+<connect gate="G$1" pin="PCINT8/XCK0/T0_PB0" pad="1"/>
+<connect gate="G$1" pin="PCINT9/CLKO/T1_PB1" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644V-10PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288342" constant="no"/>
+<attribute name="OC_NEWARK" value="23M5062" constant="no"/>
+</technology>
+<technology name="20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644-20PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288340" constant="no"/>
+<attribute name="OC_NEWARK" value="23M5060" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="resistor">
+<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;
+Based on the previous libraries:
+&lt;ul&gt;
+&lt;li&gt;r.lbr
+&lt;li&gt;cap.lbr 
+&lt;li&gt;cap-fe.lbr
+&lt;li&gt;captant.lbr
+&lt;li&gt;polcap.lbr
+&lt;li&gt;ipc-smd.lbr
+&lt;/ul&gt;
+All SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;
+&lt;p&gt;
+for Electrolyt Capacitors see also :&lt;p&gt;
+www.bccomponents.com &lt;p&gt;
+www.panasonic.com&lt;p&gt;
+www.kemet.com&lt;p&gt;
+&lt;p&gt;
+for trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;
+
+&lt;map name="nav_main"&gt;
+&lt;area shape="rect" coords="0,1,140,23" href="../military_specs.asp" title=""&gt;
+&lt;area shape="rect" coords="0,24,140,51" href="../about.asp" title=""&gt;
+&lt;area shape="rect" coords="1,52,140,77" href="../rfq.asp" title=""&gt;
+&lt;area shape="rect" coords="0,78,139,103" href="../products.asp" title=""&gt;
+&lt;area shape="rect" coords="1,102,138,128" href="../excess_inventory.asp" title=""&gt;
+&lt;area shape="rect" coords="1,129,138,150" href="../edge.asp" title=""&gt;
+&lt;area shape="rect" coords="1,151,139,178" href="../industry_links.asp" title=""&gt;
+&lt;area shape="rect" coords="0,179,139,201" href="../comments.asp" title=""&gt;
+&lt;area shape="rect" coords="1,203,138,231" href="../directory.asp" title=""&gt;
+&lt;area shape="default" nohref&gt;
+&lt;/map&gt;
+
+&lt;html&gt;
+
+&lt;title&gt;&lt;/title&gt;
+
+ &lt;LINK REL="StyleSheet" TYPE="text/css" HREF="style-sheet.css"&gt;
+
+&lt;body bgcolor="#ffffff" text="#000000" marginwidth="0" marginheight="0" topmargin="0" leftmargin="0"&gt;
+&lt;table border=0 cellspacing=0 cellpadding=0 width="100%" cellpaddding=0 height="55%"&gt;
+&lt;tr valign="top"&gt;
+
+&lt;/td&gt;
+&lt;! &lt;td width="10"&gt;&amp;nbsp;&lt;/td&gt;
+&lt;td width="90%"&gt;
+
+&lt;b&gt;&lt;font color="#0000FF" size="4"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;
+&lt;P&gt;
+&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;
+  &lt;TR&gt;
+    &lt;TD COLSPAN=8&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+  &lt;/TR&gt;
+  &lt;TR&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;BOURNS&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;DALE-VISHAY&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;PHILIPS/MEPCO&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;MURATA&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;PANASONIC&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;SPECTROL&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;MILSPEC&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;&lt;TD&gt;&amp;nbsp;&lt;/TD&gt;
+  &lt;/TR&gt;
+  &lt;TR&gt;
+    &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3 &gt;
+      3005P&lt;BR&gt;
+      3006P&lt;BR&gt;
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+      3006Y&lt;BR&gt;
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+      3059P&lt;BR&gt;
+      3059Y&lt;BR&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+    &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
+      -&lt;BR&gt;
+      89P&lt;BR&gt;
+      89W&lt;BR&gt;
+      89X&lt;BR&gt;
+      89PH&lt;BR&gt;
+      76P&lt;BR&gt;
+      89XH&lt;BR&gt;
+      78SLT&lt;BR&gt;
+      78L&amp;nbsp;ALT&lt;BR&gt;
+      56P&amp;nbsp;ALT&lt;BR&gt;
+      78P&amp;nbsp;ALT&lt;BR&gt;
+      T8S&lt;BR&gt;
+      78L&lt;BR&gt;
+      56P&lt;BR&gt;
+      78P&lt;BR&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
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+<smd name="+" x="-3.15" y="0" dx="2.4" dy="2.8" layer="1"/>
+<smd name="-" x="3.15" y="0" dx="2.4" dy="2.8" layer="1" rot="R180"/>
+<text x="-2.54" y="2.54" size="1.016" layer="25">&gt;NAME</text>
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+<rectangle x1="-3.5" y1="-2.1" x2="-2.4" y2="2.1" layer="51"/>
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+<symbol name="R-EU">
+<wire x1="-2.54" y1="-0.889" x2="2.54" y2="-0.889" width="0.254" layer="94"/>
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+<text x="-3.81" y="1.4986" size="1.778" layer="95">&gt;NAME</text>
+<text x="-3.81" y="-3.302" size="1.778" layer="96">&gt;VALUE</text>
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+<pin name="1" x="-5.08" y="0" visible="off" length="short" direction="pas" swaplevel="1"/>
+</symbol>
+<symbol name="C-EU">
+<wire x1="0" y1="0" x2="0" y2="-0.508" width="0.1524" layer="94"/>
+<wire x1="0" y1="-2.54" x2="0" y2="-2.032" width="0.1524" layer="94"/>
+<text x="1.524" y="0.381" size="1.778" layer="95">&gt;NAME</text>
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+<pin name="2" x="0" y="-5.08" visible="off" length="short" direction="pas" swaplevel="1" rot="R90"/>
+</symbol>
+<symbol name="CPOL">
+<wire x1="-1.524" y1="-0.889" x2="1.524" y2="-0.889" width="0.254" layer="94"/>
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+<text x="1.143" y="0.4826" size="1.778" layer="95">&gt;NAME</text>
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+<text x="1.143" y="-4.5974" size="1.778" layer="96">&gt;VALUE</text>
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+</symbol>
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+<deviceset name="R-EU_" prefix="R" uservalue="yes">
+<description>&lt;B&gt;RESISTOR&lt;/B&gt;, European symbol</description>
+<gates>
+<gate name="G$1" symbol="R-EU" x="0" y="0"/>
+</gates>
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+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
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+<connect gate="G$1" pin="1" pad="1"/>
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+<connect gate="G$1" pin="1" pad="1"/>
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+</device>
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+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
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+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
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+<connect gate="G$1" pin="1" pad="1"/>
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+<connect gate="G$1" pin="1" pad="1"/>
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+</device>
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+<connect gate="G$1" pin="1" pad="1"/>
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+<technology name=""/>
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+<connect gate="G$1" pin="1" pad="1"/>
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+<technologies>
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+<connect gate="G$1" pin="1" pad="1"/>
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+<technologies>
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+</device>
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+<connect gate="G$1" pin="1" pad="1"/>
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+</connects>
+<technologies>
+<technology name=""/>
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+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
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+<technologies>
+<technology name=""/>
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+</device>
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+<connect gate="G$1" pin="1" pad="1"/>
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+<technology name=""/>
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+</device>
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+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
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+<connect gate="G$1" pin="1" pad="1"/>
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+<connect gate="G$1" pin="1" pad="1"/>
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+<connect gate="G$1" pin="1" pad="1"/>
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+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
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+<connect gate="G$1" pin="2" pad="2"/>
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+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
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+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
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+<technologies>
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+</device>
+<device name="MELF0207R" package="MINI_MELF-0207R">
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+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
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+</device>
+<device name="MELF0207W" package="MINI_MELF-0207W">
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+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
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+<technologies>
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+</device>
+<device name="0922V" package="0922V">
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+<connect gate="G$1" pin="1" pad="1"/>
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+</device>
+<device name="RDH/15" package="RDH/15">
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+<connect gate="G$1" pin="1" pad="1"/>
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+</device>
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+<connect gate="G$1" pin="2" pad="2"/>
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+</deviceset>
+<deviceset name="C-EU" prefix="C" uservalue="yes">
+<description>&lt;B&gt;CAPACITOR&lt;/B&gt;, European symbol</description>
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+<gate name="G$1" symbol="C-EU" x="0" y="0"/>
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+</device>
+<device name="C1005" package="C1005">
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+<device name="C1206" package="C1206">
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+<device name="C1210" package="C1210">
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+<device name="C1310" package="C1310">
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+<device name="C1608" package="C1608">
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+<device name="C1812" package="C1812">
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+<device name="C4564" package="C4564">
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+<device name="025-024X044" package="C025-024X044">
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+<device name="025-025X050" package="C025-025X050">
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+<connect gate="G$1" pin="1" pad="1"/>
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+<device name="025-050X050" package="C025-050X050">
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+<device name="C025_050-024X070" package="C025_050-024X070">
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+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
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+<device name="025_050-025X075" package="C025_050-025X075">
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+<device name="025_050-035X075" package="C025_050-035X075">
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+<device name="150-091X182" package="C150-091X182">
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+<device name="325-137X374" package="C325-137X374">
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+<device name="325-162X374" package="C325-162X374">
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+<device name="375-192X418" package="C375-192X418">
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+<device name="075-063X106" package="C075-063X106">
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+<technologies>
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+</device>
+</devices>
+</deviceset>
+<deviceset name="CPOL-EU" prefix="C" uservalue="yes">
+<description>&lt;B&gt;POLARIZED CAPACITOR&lt;/B&gt;, European symbol</description>
+<gates>
+<gate name="G$1" symbol="CPOL" x="0" y="0"/>
+</gates>
+<devices>
+<device name="CT3216" package="CT3216">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
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+<device name="CT3528" package="CT3528">
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+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
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+<device name="CT6032" package="CT6032">
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+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
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+<technologies>
+<technology name=""/>
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+<rectangle x1="-1.75" y1="-1.1" x2="-1.6" y2="-0.6" layer="51"/>
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+</polygon>
+</package>
+<package name="SML0805">
+<description>&lt;b&gt;SML0805-2CW-TR (0805 PROFILE)&lt;/b&gt; COOL WHITE&lt;p&gt;
+Source: http://www.ledtronics.com/ds/smd-0603/Dstr0093.pdf</description>
+<wire x1="-0.95" y1="-0.55" x2="0.95" y2="-0.55" width="0.1016" layer="51"/>
+<wire x1="0.95" y1="-0.55" x2="0.95" y2="0.55" width="0.1016" layer="51"/>
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+<smd name="A" x="1.05" y="0" dx="1.2" dy="1.2" layer="1"/>
+<text x="-1.5" y="1" size="1.27" layer="25">&gt;NAME</text>
+<text x="-1.5" y="-2" size="1.27" layer="27">&gt;VALUE</text>
+</package>
+<package name="SML1206">
+<description>&lt;b&gt;SML10XXKH-TR (HIGH INTENSITY) LED&lt;/b&gt;&lt;p&gt;
+&lt;table&gt;
+&lt;tr&gt;&lt;td&gt;SML10R3KH-TR&lt;/td&gt;&lt;td&gt;ULTRA RED&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;SML10E3KH-TR&lt;/td&gt;&lt;td&gt;SUPER REDSUPER BLUE&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;SML10O3KH-TR&lt;/td&gt;&lt;td&gt;SUPER ORANGE&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;SML10PY3KH-TR&lt;/td&gt;&lt;td&gt;PURE YELLOW&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;SML10OY3KH-TR&lt;/td&gt;&lt;td&gt;ULTRA YELLOW&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;SML10AG3KH-TR&lt;/td&gt;&lt;td&gt;AQUA GREEN&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;SML10BG3KH-TR&lt;/td&gt;&lt;td&gt;BLUE GREEN&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;SML10PB1KH-TR&lt;/td&gt;&lt;td&gt;SUPER BLUE&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;SML10CW1KH-TR&lt;/td&gt;&lt;td&gt;WHITE&lt;/td&gt;&lt;/tr&gt;
+&lt;/table&gt;
+
+Source: http://www.ledtronics.com/ds/smd-1206/dstr0094.PDF</description>
+<wire x1="-1.5" y1="0.5" x2="-1.5" y2="-0.5" width="0.2032" layer="51" curve="-180"/>
+<wire x1="1.5" y1="-0.5" x2="1.5" y2="0.5" width="0.2032" layer="51" curve="-180"/>
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+<smd name="C" x="-1.75" y="0" dx="1.5" dy="1.5" layer="1"/>
+<smd name="A" x="1.75" y="0" dx="1.5" dy="1.5" layer="1"/>
+<text x="-1.5" y="1" size="1.27" layer="25">&gt;NAME</text>
+<text x="-1.5" y="-2.5" size="1.27" layer="27">&gt;VALUE</text>
+<rectangle x1="-1.6" y1="0.4" x2="-1.15" y2="0.8" layer="51"/>
+<rectangle x1="-1.6" y1="-0.8" x2="-1.15" y2="-0.4" layer="51"/>
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+<rectangle x1="1.15" y1="-0.8" x2="1.6" y2="-0.4" layer="51" rot="R180"/>
+<rectangle x1="1.15" y1="0.4" x2="1.6" y2="0.8" layer="51" rot="R180"/>
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+<rectangle x1="-0.1" y1="-0.1" x2="0.1" y2="0.1" layer="21"/>
+</package>
+<package name="SML0603">
+<description>&lt;b&gt;SML0603-XXX (HIGH INTENSITY) LED&lt;/b&gt;&lt;p&gt;
+&lt;table&gt;
+&lt;tr&gt;&lt;td&gt;AG3K&lt;/td&gt;&lt;td&gt;AQUA GREEN&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;B1K&lt;/td&gt;&lt;td&gt;SUPER BLUE&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;R1K&lt;/td&gt;&lt;td&gt;SUPER RED&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;R3K&lt;/td&gt;&lt;td&gt;ULTRA RED&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;O3K&lt;/td&gt;&lt;td&gt;SUPER ORANGE&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;O3KH&lt;/td&gt;&lt;td&gt;SOFT ORANGE&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;Y3KH&lt;/td&gt;&lt;td&gt;SUPER YELLOW&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;Y3K&lt;/td&gt;&lt;td&gt;SUPER YELLOW&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;2CW&lt;/td&gt;&lt;td&gt;WHITE&lt;/td&gt;&lt;/tr&gt;
+&lt;/table&gt;
+Source: http://www.ledtronics.com/ds/smd-0603/Dstr0092.pdf</description>
+<wire x1="-0.75" y1="0.35" x2="0.75" y2="0.35" width="0.1016" layer="51"/>
+<wire x1="0.75" y1="0.35" x2="0.75" y2="-0.35" width="0.1016" layer="51"/>
+<wire x1="0.75" y1="-0.35" x2="-0.75" y2="-0.35" width="0.1016" layer="51"/>
+<wire x1="-0.75" y1="-0.35" x2="-0.75" y2="0.35" width="0.1016" layer="51"/>
+<wire x1="-0.45" y1="0.3" x2="-0.45" y2="-0.3" width="0.1016" layer="51"/>
+<wire x1="0.45" y1="0.3" x2="0.45" y2="-0.3" width="0.1016" layer="51"/>
+<wire x1="-0.2" y1="0.35" x2="0.2" y2="0.35" width="0.1016" layer="21"/>
+<wire x1="-0.2" y1="-0.35" x2="0.2" y2="-0.35" width="0.1016" layer="21"/>
+<smd name="C" x="-0.75" y="0" dx="0.8" dy="0.8" layer="1"/>
+<smd name="A" x="0.75" y="0" dx="0.8" dy="0.8" layer="1"/>
+<text x="-1" y="1" size="1.27" layer="25">&gt;NAME</text>
+<text x="-1" y="-2" size="1.27" layer="27">&gt;VALUE</text>
+<rectangle x1="-0.4" y1="0.175" x2="0" y2="0.4" layer="51"/>
+<rectangle x1="-0.25" y1="0.175" x2="0" y2="0.4" layer="21"/>
+</package>
+</packages>
+<symbols>
+<symbol name="LED">
+<wire x1="1.27" y1="0" x2="0" y2="-2.54" width="0.254" layer="94"/>
+<wire x1="0" y1="-2.54" x2="-1.27" y2="0" width="0.254" layer="94"/>
+<wire x1="1.27" y1="-2.54" x2="0" y2="-2.54" width="0.254" layer="94"/>
+<wire x1="0" y1="-2.54" x2="-1.27" y2="-2.54" width="0.254" layer="94"/>
+<wire x1="1.27" y1="0" x2="0" y2="0" width="0.254" layer="94"/>
+<wire x1="0" y1="0" x2="-1.27" y2="0" width="0.254" layer="94"/>
+<wire x1="0" y1="0" x2="0" y2="-2.54" width="0.1524" layer="94"/>
+<wire x1="-2.032" y1="-0.762" x2="-3.429" y2="-2.159" width="0.1524" layer="94"/>
+<wire x1="-1.905" y1="-1.905" x2="-3.302" y2="-3.302" width="0.1524" layer="94"/>
+<text x="3.556" y="-4.572" size="1.778" layer="95" rot="R90">&gt;NAME</text>
+<text x="5.715" y="-4.572" size="1.778" layer="96" rot="R90">&gt;VALUE</text>
+<pin name="C" x="0" y="-5.08" visible="off" length="short" direction="pas" rot="R90"/>
+<pin name="A" x="0" y="2.54" visible="off" length="short" direction="pas" rot="R270"/>
+<polygon width="0.1524" layer="94">
+<vertex x="-3.429" y="-2.159"/>
+<vertex x="-3.048" y="-1.27"/>
+<vertex x="-2.54" y="-1.778"/>
+</polygon>
+<polygon width="0.1524" layer="94">
+<vertex x="-3.302" y="-3.302"/>
+<vertex x="-2.921" y="-2.413"/>
+<vertex x="-2.413" y="-2.921"/>
+</polygon>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="LED" prefix="LED" uservalue="yes">
+<description>&lt;b&gt;LED&lt;/b&gt;&lt;p&gt;
+&lt;u&gt;OSRAM&lt;/u&gt;:&lt;br&gt;
+
+- &lt;u&gt;CHIPLED&lt;/u&gt;&lt;br&gt;
+LG R971, LG N971, LY N971, LG Q971, LY Q971, LO R971, LY R971
+LH N974, LH R974&lt;br&gt;
+LS Q976, LO Q976, LY Q976&lt;br&gt;
+LO Q996&lt;br&gt;
+
+- &lt;u&gt;Hyper CHIPLED&lt;/u&gt;&lt;br&gt;
+LW Q18S&lt;br&gt;
+LB Q993, LB Q99A, LB R99A&lt;br&gt;
+
+- &lt;u&gt;SideLED&lt;/u&gt;&lt;br&gt;
+LS A670, LO A670, LY A670, LG A670, LP A670&lt;br&gt;
+LB A673, LV A673, LT A673, LW A673&lt;br&gt;
+LH A674&lt;br&gt;
+LY A675&lt;br&gt;
+LS A676, LA A676, LO A676, LY A676, LW A676&lt;br&gt;
+LS A679, LY A679, LG A679&lt;br&gt;
+
+-  &lt;u&gt;Hyper Micro SIDELED®&lt;/u&gt;&lt;br&gt;
+LS Y876, LA Y876, LO Y876, LY Y876&lt;br&gt;
+LT Y87S&lt;br&gt;
+
+- &lt;u&gt;SmartLED&lt;/u&gt;&lt;br&gt;
+LW L88C, LW L88S&lt;br&gt;
+LB L89C, LB L89S, LG L890&lt;br&gt;
+LS L89K, LO L89K, LY L89K&lt;br&gt;
+LS L896, LA L896, LO L896, LY L896&lt;br&gt;
+
+- &lt;u&gt;TOPLED&lt;/u&gt;&lt;br&gt;
+LS T670, LO T670, LY T670, LG T670, LP T670&lt;br&gt;
+LSG T670, LSP T670, LSY T670, LOP T670, LYG T670&lt;br&gt;
+LG T671, LOG T671, LSG T671&lt;br&gt;
+LB T673, LV T673, LT T673, LW T673&lt;br&gt;
+LH T674&lt;br&gt;
+LS T676, LA T676, LO T676, LY T676, LB T676, LH T676, LSB T676, LW T676&lt;br&gt;
+LB T67C, LV T67C, LT T67C, LS T67K, LO T67K, LY T67K, LW E67C&lt;br&gt;
+LS E67B, LA E67B, LO E67B, LY E67B, LB E67C, LV E67C, LT E67C&lt;br&gt;
+LW T67C&lt;br&gt;
+LS T679, LY T679, LG T679&lt;br&gt;
+LS T770, LO T770, LY T770, LG T770, LP T770&lt;br&gt;
+LB T773, LV T773, LT T773, LW T773&lt;br&gt;
+LH T774&lt;br&gt;
+LS E675, LA E675, LY E675, LS T675&lt;br&gt;
+LS T776, LA T776, LO T776, LY T776, LB T776&lt;br&gt;
+LHGB T686&lt;br&gt;
+LT T68C, LB T68C&lt;br&gt;
+
+- &lt;u&gt;Hyper Mini TOPLED®&lt;/u&gt;&lt;br&gt;
+LB M676&lt;br&gt;
+
+- &lt;u&gt;Mini TOPLED Santana®&lt;/u&gt;&lt;br&gt;
+LG M470&lt;br&gt;
+LS M47K, LO M47K, LY M47K
+&lt;p&gt;
+Source: http://www.osram.convergy.de&lt;p&gt;
+
+&lt;u&gt;LUXEON:&lt;/u&gt;&lt;br&gt;
+- &lt;u&gt;LUMILED®&lt;/u&gt;&lt;br&gt;
+LXK2-PW12-R00, LXK2-PW12-S00, LXK2-PW14-U00, LXK2-PW14-V00&lt;br&gt;
+LXK2-PM12-R00, LXK2-PM12-S00, LXK2-PM14-U00&lt;br&gt;
+LXK2-PE12-Q00, LXK2-PE12-R00, LXK2-PE12-S00, LXK2-PE14-T00, LXK2-PE14-U00&lt;br&gt;
+LXK2-PB12-K00, LXK2-PB12-L00, LXK2-PB12-M00, LXK2-PB14-N00, LXK2-PB14-P00, LXK2-PB14-Q00&lt;br&gt;
+LXK2-PR12-L00, LXK2-PR12-M00, LXK2-PR14-Q00, LXK2-PR14-R00&lt;br&gt;
+LXK2-PD12-Q00, LXK2-PD12-R00, LXK2-PD12-S00&lt;br&gt;
+LXK2-PH12-R00, LXK2-PH12-S00&lt;br&gt;
+LXK2-PL12-P00, LXK2-PL12-Q00, LXK2-PL12-R00
+&lt;p&gt;
+Source: www.luxeon.com&lt;p&gt;
+
+&lt;u&gt;KINGBRIGHT:&lt;/U&gt;&lt;p&gt;
+KA-3528ASYC&lt;br&gt;
+Source: www.kingbright.com</description>
+<gates>
+<gate name="G$1" symbol="LED" x="0" y="0"/>
+</gates>
+<devices>
+<device name="SMT1206" package="1206">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="LD260" package="LD260">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SQR2X5" package="LED2X5">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="3MM" package="LED3MM">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="5MM" package="LED5MM">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="LSU260" package="LSU260">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="LZR181" package="LZR181">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="B152" package="Q62902-B152">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="B153" package="Q62902-B153">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="B155" package="Q62902-B155">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="B156" package="Q62902-B156">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SFH480" package="SFH480">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SFH482" package="SFH482">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SQR5.7X3.2" package="U57X32">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="IRL80A" package="IRL80A">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="P-LCC-2" package="P-LCC-2">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="MINI-TOP" package="OSRAM-MINI-TOP-LED">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SIDELED" package="OSRAM-SIDELED">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SMART-LED" package="SMART-LED">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="B"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="P-LCC-2-BACK" package="P-LCC-2-TOPLED-RG">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="MICRO-SIDELED" package="MICRO-SIDELED">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="P-LCC-4" package="P-LCC-4">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C@4"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CHIP-LED0603" package="CHIP-LED0603">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CHIP-LED0805" package="CHIP-LED0805">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="TOPLED-SANTANA" package="MINI-TOPLED-SANTANA">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CHIPLED_0805" package="CHIPLED_0805">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CHIPLED_1206" package="CHIPLED_1206">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CHIPLED_0603" package="CHIPLED_0603">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CHIPLED-0603-TTW" package="CHIPLED-0603-TTW">
+<connects>
+<connect gate="G$1" pin="A" pad="A@1"/>
+<connect gate="G$1" pin="C" pad="C@1"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="" package="SMARTLED-TTW">
+<connects>
+<connect gate="G$1" pin="A" pad="A@1"/>
+<connect gate="G$1" pin="C" pad="C@1"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="-LUMILED+" package="LUMILED+">
+<connects>
+<connect gate="G$1" pin="A" pad="2+"/>
+<connect gate="G$1" pin="C" pad="4-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="-LUMILED" package="LUMILED">
+<connects>
+<connect gate="G$1" pin="A" pad="2+"/>
+<connect gate="G$1" pin="C" pad="4-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="10MM" package="LED10MM">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="KA-3528ASYC" package="KA-3528ASYC">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SML0805" package="SML0805">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SML1206" package="SML1206">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SML0603" package="SML0603">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="con-molex">
+<description>&lt;b&gt;Molex Connectors&lt;/b&gt;&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="7395-02">
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+<wire x1="0.635" y1="-2.286" x2="0.635" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="0.635" y1="-2.921" x2="1.905" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="1.905" y1="-2.921" x2="1.905" y2="-2.286" width="0.254" layer="21"/>
+<wire x1="1.905" y1="-2.286" x2="3.175" y2="-2.286" width="0.254" layer="21"/>
+<wire x1="3.175" y1="-2.286" x2="3.175" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="3.175" y1="-2.921" x2="3.81" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="-2.54" y1="1.905" x2="-2.54" y2="2.921" width="0.254" layer="21"/>
+<wire x1="-2.54" y1="1.905" x2="-2.286" y2="1.905" width="0.254" layer="21"/>
+<wire x1="-2.286" y1="1.905" x2="2.286" y2="1.905" width="0.254" layer="21"/>
+<wire x1="2.286" y1="1.905" x2="2.54" y2="1.905" width="0.254" layer="21"/>
+<wire x1="2.54" y1="1.905" x2="2.54" y2="2.921" width="0.254" layer="21"/>
+<wire x1="-2.54" y1="1.905" x2="-2.286" y2="1.397" width="0.254" layer="21"/>
+<wire x1="-2.286" y1="2.921" x2="-2.286" y2="1.905" width="0.254" layer="21"/>
+<wire x1="-2.286" y1="1.397" x2="2.286" y2="1.397" width="0.254" layer="21"/>
+<wire x1="2.286" y1="1.397" x2="2.54" y2="1.905" width="0.254" layer="21"/>
+<wire x1="2.286" y1="2.921" x2="2.286" y2="1.905" width="0.254" layer="21"/>
+<pad name="3" x="-2.54" y="0" drill="1.016" shape="long" rot="R90"/>
+<pad name="2" x="0" y="0" drill="1.016" shape="long" rot="R90"/>
+<pad name="1" x="2.54" y="0" drill="1.016" shape="long" rot="R90"/>
+<text x="-3.7831" y="3.2751" size="1.016" layer="25" ratio="10">&gt;NAME</text>
+<text x="4.4181" y="-0.7381" size="1.27" layer="21" ratio="14">1</text>
+<text x="-4.9799" y="-0.6873" size="1.27" layer="21" ratio="14">3</text>
+<text x="-3.7831" y="-4.5989" size="0.8128" layer="27" ratio="10">&gt;VALUE</text>
+<rectangle x1="-2.794" y1="-0.254" x2="-2.286" y2="0.254" layer="51"/>
+<rectangle x1="-0.254" y1="-0.254" x2="0.254" y2="0.254" layer="51"/>
+<rectangle x1="2.286" y1="-0.254" x2="2.794" y2="0.254" layer="51"/>
+</package>
+</packages>
+<symbols>
+<symbol name="MV">
+<wire x1="1.27" y1="0" x2="0" y2="0" width="0.6096" layer="94"/>
+<text x="2.54" y="-0.762" size="1.524" layer="95">&gt;NAME</text>
+<text x="-0.762" y="1.397" size="1.778" layer="96">&gt;VALUE</text>
+<pin name="S" x="-2.54" y="0" visible="off" length="short" direction="pas"/>
+</symbol>
+<symbol name="M">
+<wire x1="1.27" y1="0" x2="0" y2="0" width="0.6096" layer="94"/>
+<text x="2.54" y="-0.762" size="1.524" layer="95">&gt;NAME</text>
+<pin name="S" x="-2.54" y="0" visible="off" length="short" direction="pas"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="22-?-02" prefix="J">
+<description>&lt;b&gt;CONNECTOR&lt;/b&gt;&lt;p&gt;
+wire to board 2.54 mm (.1 inch) pitch header</description>
+<gates>
+<gate name="-1" symbol="MV" x="0" y="0" addlevel="always" swaplevel="1"/>
+<gate name="-2" symbol="M" x="0" y="-5.08" addlevel="always" swaplevel="1"/>
+</gates>
+<devices>
+<device name="05-7028" package="7395-02">
+<connects>
+<connect gate="-1" pin="S" pad="1"/>
+<connect gate="-2" pin="S" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="9731601" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="27-2021" package="6410-02">
+<connects>
+<connect gate="-1" pin="S" pad="1"/>
+<connect gate="-2" pin="S" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="22-?-03" prefix="J">
+<description>&lt;b&gt;CONNECTOR&lt;/b&gt;&lt;p&gt;
+wire to board 2.54 mm (.1 inch) pitch header</description>
+<gates>
+<gate name="-1" symbol="MV" x="0" y="5.08" addlevel="always" swaplevel="1"/>
+<gate name="-2" symbol="M" x="0" y="0" addlevel="always" swaplevel="1"/>
+<gate name="-3" symbol="M" x="0" y="-5.08" addlevel="always" swaplevel="1"/>
+</gates>
+<devices>
+<device name="05-7038" package="7395-03">
+<connects>
+<connect gate="-1" pin="S" pad="1"/>
+<connect gate="-2" pin="S" pad="2"/>
+<connect gate="-3" pin="S" pad="3"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="27-2031" package="6410-03">
+<connects>
+<connect gate="-1" pin="S" pad="1"/>
+<connect gate="-2" pin="S" pad="2"/>
+<connect gate="-3" pin="S" pad="3"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="rcl">
+<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;
+Based on the previous libraries:
+&lt;ul&gt;
+&lt;li&gt;r.lbr
+&lt;li&gt;cap.lbr 
+&lt;li&gt;cap-fe.lbr
+&lt;li&gt;captant.lbr
+&lt;li&gt;polcap.lbr
+&lt;li&gt;ipc-smd.lbr
+&lt;/ul&gt;
+All SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;
+&lt;p&gt;
+for Electrolyt Capacitors see also :&lt;p&gt;
+www.bccomponents.com &lt;p&gt;
+www.panasonic.com&lt;p&gt;
+www.kemet.com&lt;p&gt;
+http://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf &lt;b&gt;(SANYO)&lt;/b&gt;
+&lt;p&gt;
+for trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;
+
+&lt;table border=0 cellspacing=0 cellpadding=0 width="100%" cellpaddding=0&gt;
+&lt;tr valign="top"&gt;
+
+&lt;! &lt;td width="10"&gt;&amp;nbsp;&lt;/td&gt;
+&lt;td width="90%"&gt;
+
+&lt;b&gt;&lt;font color="#0000FF" size="4"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;
+&lt;P&gt;
+&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;
+  &lt;TR&gt;
+    &lt;TD COLSPAN=8&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+  &lt;/TR&gt;
+  &lt;TR&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;BOURNS&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;DALE-VISHAY&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;PHILIPS/MEPCO&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;MURATA&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;PANASONIC&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;SPECTROL&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;MILSPEC&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;&lt;TD&gt;&amp;nbsp;&lt;/TD&gt;
+  &lt;/TR&gt;
+  &lt;TR&gt;
+    &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3 &gt;
+      3005P&lt;BR&gt;
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+      3006W&lt;BR&gt;
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+    &lt;/TD&gt;
+    &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
+      -&lt;BR&gt;
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+      78P&lt;BR&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+    &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
+      -&lt;BR&gt;
+      T18/784&lt;BR&gt;
+      783&lt;BR&gt;
+      781&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
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+      1697/1897&lt;BR&gt;
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+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+    &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
+      -&lt;BR&gt;
+      8035EKP/CT20/RJ-20P&lt;BR&gt;
+      -&lt;BR&gt;
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+      -&lt;BR&gt;
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+    &lt;/TD&gt;
+    &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
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+    &lt;/TD&gt;
+    &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
+      -&lt;BR&gt;
+      EVMCOG&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
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+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+    &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
+      -&lt;BR&gt;
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+      43Y&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
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+      -&lt;BR&gt;
+      40L&lt;BR&gt;
+      40P&lt;BR&gt;
+      40Y&lt;BR&gt;
+      70Y-T602&lt;BR&gt;
+      70L&lt;BR&gt;
+      70P&lt;BR&gt;
+      70Y&lt;BR&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+    &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      RT/RTR12&lt;BR&gt;
+      RT/RTR12&lt;BR&gt;
+      RT/RTR12&lt;BR&gt;
+      -&lt;BR&gt;
+      RJ/RJR12&lt;BR&gt;
+      RJ/RJR12&lt;BR&gt;
+      RJ/RJR12&lt;BR&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+  &lt;/TR&gt;
+  &lt;TR&gt;
+    &lt;TD COLSPAN=8&gt;&amp;nbsp;
+    &lt;/TD&gt;
+  &lt;/TR&gt;
+  &lt;TR&gt;
+    &lt;TD COLSPAN=8&gt;
+      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SQUARE MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+  &lt;/TR&gt;
+  &lt;TR&gt;
+   &lt;TD ALIGN=CENTER&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+  &lt;/TR&gt;
+  &lt;TR&gt;
+    &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
+      3250L&lt;BR&gt;
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+    &lt;/TD&gt;
+    &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
+      -&lt;BR&gt;
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+    &lt;/TD&gt;
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+</device>
+<device name="075-042X103" package="C075-042X103">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="075-052X106" package="C075-052X106">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="102-043X133" package="C102-043X133">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="102-054X133" package="C102-054X133">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="102-064X133" package="C102-064X133">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="102_152-062X184" package="C102_152-062X184">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="150-054X183" package="C150-054X183">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="150-064X183" package="C150-064X183">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="150-072X183" package="C150-072X183">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="150-084X183" package="C150-084X183">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="150-091X182" package="C150-091X182">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="225-062X268" package="C225-062X268">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="225-074X268" package="C225-074X268">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="225-087X268" package="C225-087X268">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="225-108X268" package="C225-108X268">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="225-113X268" package="C225-113X268">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="275-093X316" package="C275-093X316">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="275-113X316" package="C275-113X316">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="275-134X316" package="C275-134X316">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="275-205X316" package="C275-205X316">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="325-137X374" package="C325-137X374">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="325-162X374" package="C325-162X374">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="325-182X374" package="C325-182X374">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="375-192X418" package="C375-192X418">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="375-203X418" package="C375-203X418">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="050-035X075" package="C050-035X075">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="375-155X418" package="C375-155X418">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="075-063X106" package="C075-063X106">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="275-154X316" package="C275-154X316">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="275-173X316" package="C275-173X316">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C0402K" package="C0402K">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C0603K" package="C0603K">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C0805K" package="C0805K">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C1206K" package="C1206K">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C1210K" package="C1210K">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C1812K" package="C1812K">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C1825K" package="C1825K">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C2220K" package="C2220K">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C2225K" package="C2225K">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="HPC0201" package="HPC0201">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C0201" package="C0201">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C1808" package="C1808">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C3640" package="C3640">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="special">
+<description>&lt;b&gt;Special Devices&lt;/b&gt;&lt;p&gt;
+7-segment displays, switches, heatsinks, crystals, transformers, etc.&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="QS">
+<description>&lt;B&gt;CRYSTAL&lt;/B&gt;</description>
+<wire x1="-3.429" y1="-2.286" x2="3.429" y2="-2.286" width="0.1524" layer="21"/>
+<wire x1="3.429" y1="2.286" x2="-3.429" y2="2.286" width="0.1524" layer="21"/>
+<wire x1="-3.429" y1="-1.778" x2="3.429" y2="-1.778" width="0.0508" layer="21"/>
+<wire x1="3.429" y1="1.778" x2="-3.429" y2="1.778" width="0.0508" layer="21"/>
+<wire x1="3.429" y1="1.778" x2="3.429" y2="-1.778" width="0.0508" layer="21" curve="-180"/>
+<wire x1="3.429" y1="2.286" x2="3.429" y2="-2.286" width="0.1524" layer="21" curve="-180"/>
+<wire x1="-3.429" y1="2.286" x2="-3.429" y2="-2.286" width="0.1524" layer="21" curve="180"/>
+<wire x1="-3.429" y1="1.778" x2="-3.429" y2="-1.778" width="0.0508" layer="21" curve="180"/>
+<pad name="1" x="-2.54" y="0" drill="0.6096" shape="long" rot="R90"/>
+<pad name="2" x="2.54" y="0" drill="0.6096" shape="long" rot="R90"/>
+<text x="-5.08" y="-3.937" size="1.27" layer="27" ratio="10">&gt;VALUE</text>
+<text x="-5.08" y="2.667" size="1.27" layer="25" ratio="10">&gt;NAME</text>
+</package>
+</packages>
+<symbols>
+<symbol name="XTAL">
+<wire x1="-1.27" y1="2.54" x2="1.397" y2="2.54" width="0.4064" layer="94"/>
+<wire x1="1.397" y1="2.54" x2="1.397" y2="-2.54" width="0.4064" layer="94"/>
+<wire x1="1.397" y1="-2.54" x2="-1.27" y2="-2.54" width="0.4064" layer="94"/>
+<wire x1="-1.27" y1="2.54" x2="-1.27" y2="-2.54" width="0.4064" layer="94"/>
+<wire x1="2.3368" y1="2.54" x2="2.3368" y2="-2.54" width="0.4064" layer="94"/>
+<wire x1="-2.286" y1="2.54" x2="-2.286" y2="-2.54" width="0.4064" layer="94"/>
+<text x="-5.08" y="3.81" size="1.778" layer="95">&gt;NAME</text>
+<text x="-5.08" y="-5.08" size="1.778" layer="96">&gt;VALUE</text>
+<pin name="2" x="5.08" y="0" visible="pad" length="short" direction="pas" swaplevel="1" rot="R180"/>
+<pin name="1" x="-5.08" y="0" visible="pad" length="short" direction="pas" swaplevel="1"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="XTAL/S" prefix="Q" uservalue="yes">
+<description>&lt;B&gt;CRYSTAL&lt;/B&gt;</description>
+<gates>
+<gate name="G$1" symbol="XTAL" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="QS">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="supply1">
+<description>&lt;b&gt;Supply Symbols&lt;/b&gt;&lt;p&gt;
+ GND, VCC, 0V, +5V, -5V, etc.&lt;p&gt;
+ Please keep in mind, that these devices are necessary for the
+ automatic wiring of the supply signals.&lt;p&gt;
+ The pin name defined in the symbol is identical to the net which is to be wired automatically.&lt;p&gt;
+ In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.&lt;p&gt;
+ &lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+</packages>
+<symbols>
+<symbol name="VCC">
+<wire x1="1.27" y1="-1.905" x2="0" y2="0" width="0.254" layer="94"/>
+<wire x1="0" y1="0" x2="-1.27" y2="-1.905" width="0.254" layer="94"/>
+<text x="-2.54" y="-2.54" size="1.778" layer="96" rot="R90">&gt;VALUE</text>
+<pin name="VCC" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/>
+</symbol>
+<symbol name="GND">
+<wire x1="-1.905" y1="0" x2="1.905" y2="0" width="0.254" layer="94"/>
+<text x="-2.54" y="-2.54" size="1.778" layer="96">&gt;VALUE</text>
+<pin name="GND" x="0" y="2.54" visible="off" length="short" direction="sup" rot="R270"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="VCC" prefix="P+">
+<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>
+<gates>
+<gate name="VCC" symbol="VCC" x="0" y="0"/>
+</gates>
+<devices>
+<device name="">
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="GND" prefix="GND">
+<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>
+<gates>
+<gate name="1" symbol="GND" x="0" y="0"/>
+</gates>
+<devices>
+<device name="">
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="switch-omron">
+<description>&lt;b&gt;Omron Switches&lt;/b&gt;&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="B3F-10XX">
+<description>&lt;b&gt;OMRON SWITCH&lt;/b&gt;</description>
+<wire x1="3.302" y1="-0.762" x2="3.048" y2="-0.762" width="0.1524" layer="21"/>
+<wire x1="3.302" y1="-0.762" x2="3.302" y2="0.762" width="0.1524" layer="21"/>
+<wire x1="3.048" y1="0.762" x2="3.302" y2="0.762" width="0.1524" layer="21"/>
+<wire x1="3.048" y1="1.016" x2="3.048" y2="2.54" width="0.1524" layer="51"/>
+<wire x1="-3.302" y1="0.762" x2="-3.048" y2="0.762" width="0.1524" layer="21"/>
+<wire x1="-3.302" y1="0.762" x2="-3.302" y2="-0.762" width="0.1524" layer="21"/>
+<wire x1="-3.048" y1="-0.762" x2="-3.302" y2="-0.762" width="0.1524" layer="21"/>
+<wire x1="3.048" y1="2.54" x2="2.54" y2="3.048" width="0.1524" layer="51"/>
+<wire x1="2.54" y1="-3.048" x2="3.048" y2="-2.54" width="0.1524" layer="51"/>
+<wire x1="3.048" y1="-2.54" x2="3.048" y2="-1.016" width="0.1524" layer="51"/>
+<wire x1="-2.54" y1="3.048" x2="-3.048" y2="2.54" width="0.1524" layer="51"/>
+<wire x1="-3.048" y1="2.54" x2="-3.048" y2="1.016" width="0.1524" layer="51"/>
+<wire x1="-2.54" y1="-3.048" x2="-3.048" y2="-2.54" width="0.1524" layer="51"/>
+<wire x1="-3.048" y1="-2.54" x2="-3.048" y2="-1.016" width="0.1524" layer="51"/>
+<wire x1="-1.27" y1="1.27" x2="-1.27" y2="-1.27" width="0.0508" layer="51"/>
+<wire x1="1.27" y1="-1.27" x2="-1.27" y2="-1.27" width="0.0508" layer="51"/>
+<wire x1="1.27" y1="-1.27" x2="1.27" y2="1.27" width="0.0508" layer="51"/>
+<wire x1="-1.27" y1="1.27" x2="1.27" y2="1.27" width="0.0508" layer="51"/>
+<wire x1="-1.27" y1="3.048" x2="-1.27" y2="2.794" width="0.0508" layer="21"/>
+<wire x1="1.27" y1="2.794" x2="-1.27" y2="2.794" width="0.0508" layer="21"/>
+<wire x1="1.27" y1="2.794" x2="1.27" y2="3.048" width="0.0508" layer="21"/>
+<wire x1="1.143" y1="-2.794" x2="-1.27" y2="-2.794" width="0.0508" layer="21"/>
+<wire x1="1.143" y1="-2.794" x2="1.143" y2="-3.048" width="0.0508" layer="21"/>
+<wire x1="-1.27" y1="-2.794" x2="-1.27" y2="-3.048" width="0.0508" layer="21"/>
+<wire x1="2.54" y1="-3.048" x2="2.159" y2="-3.048" width="0.1524" layer="51"/>
+<wire x1="-2.54" y1="-3.048" x2="-2.159" y2="-3.048" width="0.1524" layer="51"/>
+<wire x1="-2.159" y1="-3.048" x2="-1.27" y2="-3.048" width="0.1524" layer="21"/>
+<wire x1="-2.54" y1="3.048" x2="-2.159" y2="3.048" width="0.1524" layer="51"/>
+<wire x1="2.54" y1="3.048" x2="2.159" y2="3.048" width="0.1524" layer="51"/>
+<wire x1="2.159" y1="3.048" x2="1.27" y2="3.048" width="0.1524" layer="21"/>
+<wire x1="1.27" y1="3.048" x2="-1.27" y2="3.048" width="0.1524" layer="21"/>
+<wire x1="-1.27" y1="3.048" x2="-2.159" y2="3.048" width="0.1524" layer="21"/>
+<wire x1="-1.27" y1="-3.048" x2="1.143" y2="-3.048" width="0.1524" layer="21"/>
+<wire x1="1.143" y1="-3.048" x2="2.159" y2="-3.048" width="0.1524" layer="21"/>
+<wire x1="3.048" y1="-0.762" x2="3.048" y2="-1.016" width="0.1524" layer="21"/>
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+<wire x1="1.27" y1="5.08" x2="-6.35" y2="5.08" width="0.4064" layer="94"/>
+<wire x1="-6.35" y1="5.08" x2="-6.35" y2="-5.08" width="0.4064" layer="94"/>
+<text x="-6.35" y="5.715" size="1.778" layer="95">&gt;NAME</text>
+<text x="-6.35" y="-7.62" size="1.778" layer="96">&gt;VALUE</text>
+<pin name="1" x="-2.54" y="2.54" visible="pad" length="short" direction="pas" function="dot"/>
+<pin name="2" x="-2.54" y="0" visible="pad" length="short" direction="pas" function="dot"/>
+<pin name="3" x="-2.54" y="-2.54" visible="pad" length="short" direction="pas" function="dot"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="SDMMC">
+<description>&lt;b&gt;SD MMC Card holder&lt;/b&gt;
+&lt;p&gt;
+4UCON part #06132 - easy to solder</description>
+<gates>
+<gate name="G$1" symbol="SD-MMC" x="-2.54" y="0"/>
+</gates>
+<devices>
+<device name="SCDA" package="SCDA">
+<connects>
+<connect gate="G$1" pin="CARD_DETECT" pad="10"/>
+<connect gate="G$1" pin="COMMON_SW" pad="11"/>
+<connect gate="G$1" pin="CS" pad="1"/>
+<connect gate="G$1" pin="DAT1" pad="8"/>
+<connect gate="G$1" pin="DAT2" pad="9"/>
+<connect gate="G$1" pin="DATA_IN" pad="2"/>
+<connect gate="G$1" pin="DATA_OUT" pad="7"/>
+<connect gate="G$1" pin="GND" pad="13"/>
+<connect gate="G$1" pin="SCLK" pad="5"/>
+<connect gate="G$1" pin="VDD" pad="4"/>
+<connect gate="G$1" pin="VSS1" pad="3"/>
+<connect gate="G$1" pin="VSS2" pad="6"/>
+<connect gate="G$1" pin="WRITE_PROTECT" pad="12"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="18650" package="SDCARD">
+<connects>
+<connect gate="G$1" pin="CARD_DETECT" pad="CD"/>
+<connect gate="G$1" pin="COMMON_SW" pad="COM"/>
+<connect gate="G$1" pin="CS" pad="1"/>
+<connect gate="G$1" pin="DAT1" pad="8"/>
+<connect gate="G$1" pin="DAT2" pad="9"/>
+<connect gate="G$1" pin="DATA_IN" pad="2"/>
+<connect gate="G$1" pin="DATA_OUT" pad="7"/>
+<connect gate="G$1" pin="GND" pad="MT1"/>
+<connect gate="G$1" pin="SCLK" pad="5"/>
+<connect gate="G$1" pin="VDD" pad="4"/>
+<connect gate="G$1" pin="VSS1" pad="3"/>
+<connect gate="G$1" pin="VSS2" pad="6"/>
+<connect gate="G$1" pin="WRITE_PROTECT" pad="WP"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="06132" package="06132">
+<connects>
+<connect gate="G$1" pin="CARD_DETECT" pad="CD"/>
+<connect gate="G$1" pin="COMMON_SW" pad="GP3"/>
+<connect gate="G$1" pin="CS" pad="1"/>
+<connect gate="G$1" pin="DAT1" pad="8"/>
+<connect gate="G$1" pin="DAT2" pad="9"/>
+<connect gate="G$1" pin="DATA_IN" pad="2"/>
+<connect gate="G$1" pin="DATA_OUT" pad="7"/>
+<connect gate="G$1" pin="GND" pad="GP"/>
+<connect gate="G$1" pin="SCLK" pad="5"/>
+<connect gate="G$1" pin="VDD" pad="4"/>
+<connect gate="G$1" pin="VSS1" pad="3"/>
+<connect gate="G$1" pin="VSS2" pad="6"/>
+<connect gate="G$1" pin="WRITE_PROTECT" pad="WP"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="PINHD-1X3" prefix="JP" uservalue="yes">
+<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>
+<gates>
+<gate name="A" symbol="PINHD3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="1X03">
+<connects>
+<connect gate="A" pin="1" pad="1"/>
+<connect gate="A" pin="2" pad="2"/>
+<connect gate="A" pin="3" pad="3"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CB" package="1X03-CLEANBIG">
+<connects>
+<connect gate="A" pin="1" pad="1"/>
+<connect gate="A" pin="2" pad="2"/>
+<connect gate="A" pin="3" pad="3"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="v-reg">
+<description>&lt;b&gt;Voltage Regulators&lt;/b&gt;&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="78XXS">
+<description>&lt;b&gt;VOLTAGE REGULATOR&lt;/b&gt;</description>
+<wire x1="4.826" y1="-4.318" x2="5.08" y2="-4.064" width="0.1524" layer="21"/>
+<wire x1="4.826" y1="-4.318" x2="-4.826" y2="-4.318" width="0.1524" layer="21"/>
+<wire x1="-5.08" y1="-4.064" x2="-4.826" y2="-4.318" width="0.1524" layer="21"/>
+<wire x1="5.08" y1="-1.143" x2="5.08" y2="-4.064" width="0.1524" layer="21"/>
+<wire x1="-5.08" y1="-4.064" x2="-5.08" y2="-1.143" width="0.1524" layer="21"/>
+<circle x="-4.6228" y="-3.7084" radius="0.254" width="0" layer="21"/>
+<pad name="IN" x="-2.54" y="-2.54" drill="1.016" shape="long" rot="R90"/>
+<pad name="GND" x="0" y="-2.54" drill="1.016" shape="long" rot="R90"/>
+<pad name="OUT" x="2.54" y="-2.54" drill="1.016" shape="long" rot="R90"/>
+<text x="-5.08" y="-6.0452" size="1.27" layer="25" ratio="10">&gt;NAME</text>
+<text x="-5.08" y="-7.62" size="1.27" layer="27" ratio="10">&gt;VALUE</text>
+<text x="-0.635" y="-3.81" size="1.27" layer="51" ratio="10">-</text>
+<text x="-3.175" y="-3.81" size="1.27" layer="51" ratio="10">I</text>
+<text x="1.905" y="-3.81" size="1.27" layer="51" ratio="10">O</text>
+<rectangle x1="-5.334" y1="-1.27" x2="-3.429" y2="0" layer="21"/>
+<rectangle x1="-3.429" y1="-0.762" x2="-1.651" y2="0" layer="21"/>
+<rectangle x1="-1.651" y1="-1.27" x2="-0.889" y2="0" layer="21"/>
+<rectangle x1="-0.889" y1="-0.762" x2="0.889" y2="0" layer="21"/>
+<rectangle x1="0.889" y1="-1.27" x2="1.651" y2="0" layer="21"/>
+<rectangle x1="1.651" y1="-0.762" x2="3.429" y2="0" layer="21"/>
+<rectangle x1="3.429" y1="-1.27" x2="5.334" y2="0" layer="21"/>
+<rectangle x1="-3.429" y1="-1.27" x2="-1.651" y2="-0.762" layer="51"/>
+<rectangle x1="-0.889" y1="-1.27" x2="0.889" y2="-0.762" layer="51"/>
+<rectangle x1="1.651" y1="-1.27" x2="3.429" y2="-0.762" layer="51"/>
+</package>
+</packages>
+<symbols>
+<symbol name="78XX">
+<wire x1="-5.08" y1="-5.08" x2="5.08" y2="-5.08" width="0.4064" layer="94"/>
+<wire x1="5.08" y1="-5.08" x2="5.08" y2="2.54" width="0.4064" layer="94"/>
+<wire x1="5.08" y1="2.54" x2="-5.08" y2="2.54" width="0.4064" layer="94"/>
+<wire x1="-5.08" y1="2.54" x2="-5.08" y2="-5.08" width="0.4064" layer="94"/>
+<text x="2.54" y="-7.62" size="1.778" layer="95">&gt;NAME</text>
+<text x="2.54" y="-10.16" size="1.778" layer="96">&gt;VALUE</text>
+<text x="-2.032" y="-4.318" size="1.524" layer="95">GND</text>
+<text x="-4.445" y="-0.635" size="1.524" layer="95">IN</text>
+<text x="0.635" y="-0.635" size="1.524" layer="95">OUT</text>
+<pin name="IN" x="-7.62" y="0" visible="off" length="short" direction="in"/>
+<pin name="GND" x="0" y="-7.62" visible="off" length="short" direction="in" rot="R90"/>
+<pin name="OUT" x="7.62" y="0" visible="off" length="short" direction="pas" rot="R180"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="78XXS" prefix="IC" uservalue="yes">
+<description>&lt;b&gt;VOLTAGE REGULATOR&lt;/b&gt;</description>
+<gates>
+<gate name="1" symbol="78XX" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="78XXS">
+<connects>
+<connect gate="1" pin="GND" pad="GND"/>
+<connect gate="1" pin="IN" pad="IN"/>
+<connect gate="1" pin="OUT" pad="OUT"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+</libraries>
+<attributes>
+</attributes>
+<variantdefs>
+</variantdefs>
+<classes>
+<class number="0" name="default" width="0" drill="0">
+</class>
+</classes>
+<parts>
+<part name="IC1" library="atmel" deviceset="ATMEGA644-*PU" device="" technology="20"/>
+<part name="R1" library="resistor" deviceset="R-EU_" device="0207/12" value="1k8"/>
+<part name="LED1" library="led" deviceset="LED" device="5MM" value="Green"/>
+<part name="LED2" library="led" deviceset="LED" device="5MM" value="Red"/>
+<part name="C1" library="resistor" deviceset="C-EU" device="025-025X050" value="100nF"/>
+<part name="C2" library="resistor" deviceset="C-EU" device="025-025X050" value="100nF"/>
+<part name="C3" library="resistor" deviceset="CPOL-EU" device="E2.5-5" value="2.2uF"/>
+<part name="PWR" library="con-molex" deviceset="22-?-02" device="27-2021"/>
+<part name="IEC" library="con-molex" deviceset="22-?-03" device="27-2031"/>
+<part name="R2" library="resistor" deviceset="R-EU_" device="0207/12" value="1k8"/>
+<part name="R3" library="resistor" deviceset="R-EU_" device="0207/12" value="1k8"/>
+<part name="C4" library="rcl" deviceset="C-EU" device="025-025X050" value="33pF"/>
+<part name="C5" library="rcl" deviceset="C-EU" device="025-025X050" value="33pF"/>
+<part name="Q1" library="special" deviceset="XTAL/S" device="" value="8 Mhz"/>
+<part name="P+1" library="supply1" deviceset="VCC" device=""/>
+<part name="GND1" library="supply1" deviceset="GND" device=""/>
+<part name="R4" library="resistor" deviceset="R-EU_" device="0207/12" value="3k3"/>
+<part name="R5" library="resistor" deviceset="R-EU_" device="0207/12" value="3k3"/>
+<part name="R6" library="resistor" deviceset="R-EU_" device="0207/12" value="3k3"/>
+<part name="P+2" library="supply1" deviceset="VCC" device=""/>
+<part name="GND2" library="supply1" deviceset="GND" device=""/>
+<part name="R7" library="resistor" deviceset="R-EU_" device="0207/12" value="560"/>
+<part name="R8" library="resistor" deviceset="R-EU_" device="0207/12" value="560"/>
+<part name="P+3" library="supply1" deviceset="VCC" device=""/>
+<part name="GND3" library="supply1" deviceset="GND" device=""/>
+<part name="GND4" library="supply1" deviceset="GND" device=""/>
+<part name="R9" library="resistor" deviceset="R-EU_" device="0207/12" value="10k"/>
+<part name="P+4" library="supply1" deviceset="VCC" device=""/>
+<part name="RESET" library="switch-omron" deviceset="10-XX" device=""/>
+<part name="GND5" library="supply1" deviceset="GND" device=""/>
+<part name="P+5" library="supply1" deviceset="VCC" device=""/>
+<part name="U$1" library="adafruit" deviceset="SDMMC" device="06132"/>
+<part name="DISK1" library="switch-omron" deviceset="10-XX" device=""/>
+<part name="DISK2" library="switch-omron" deviceset="10-XX" device=""/>
+<part name="ID8/9" library="adafruit" deviceset="PINHD-1X3" device=""/>
+<part name="ID10/11" library="adafruit" deviceset="PINHD-1X3" device=""/>
+<part name="LF33CV" library="v-reg" deviceset="78XXS" device=""/>
+</parts>
+<sheets>
+<sheet>
+<plain>
+<text x="154.94" y="30.48" size="1.778" layer="91">CLK</text>
+<text x="154.94" y="25.4" size="1.778" layer="91">DATA</text>
+<text x="154.94" y="20.32" size="1.778" layer="91">ATN</text>
+<text x="203.2" y="66.04" size="1.778" layer="91" rot="R180">2 - ID8
+3 - ID9</text>
+<text x="195.58" y="50.8" size="1.778" layer="91">5 - ID10
+4 - ID11</text>
+</plain>
+<instances>
+<instance part="IC1" gate="G$1" x="111.76" y="48.26"/>
+<instance part="R1" gate="G$1" x="71.12" y="60.96" rot="R180"/>
+<instance part="LED1" gate="G$1" x="157.48" y="71.12" rot="R270"/>
+<instance part="LED2" gate="G$1" x="167.64" y="68.58" rot="R270"/>
+<instance part="C1" gate="G$1" x="50.8" y="43.18"/>
+<instance part="C2" gate="G$1" x="-10.16" y="116.84" rot="R180"/>
+<instance part="C3" gate="G$1" x="20.32" y="119.38"/>
+<instance part="PWR" gate="-1" x="5.08" y="35.56" rot="R180"/>
+<instance part="PWR" gate="-2" x="5.08" y="40.64" rot="R180"/>
+<instance part="IEC" gate="-1" x="162.56" y="30.48"/>
+<instance part="IEC" gate="-2" x="162.56" y="25.4"/>
+<instance part="IEC" gate="-3" x="162.56" y="20.32"/>
+<instance part="R2" gate="G$1" x="60.96" y="58.42" rot="R180"/>
+<instance part="R3" gate="G$1" x="71.12" y="53.34" rot="R180"/>
+<instance part="C4" gate="G$1" x="45.72" y="27.94" rot="R270"/>
+<instance part="C5" gate="G$1" x="45.72" y="17.78" rot="R270"/>
+<instance part="Q1" gate="G$1" x="55.88" y="22.86" rot="R270"/>
+<instance part="P+1" gate="VCC" x="10.16" y="48.26"/>
+<instance part="GND1" gate="1" x="10.16" y="27.94"/>
+<instance part="R4" gate="G$1" x="17.78" y="55.88" rot="R270"/>
+<instance part="R5" gate="G$1" x="25.4" y="53.34" rot="R270"/>
+<instance part="R6" gate="G$1" x="33.02" y="48.26" rot="R270"/>
+<instance part="P+2" gate="VCC" x="-22.86" y="137.16"/>
+<instance part="GND2" gate="1" x="5.08" y="104.14"/>
+<instance part="R7" gate="G$1" x="177.8" y="71.12" rot="R180"/>
+<instance part="R8" gate="G$1" x="190.5" y="68.58" rot="R180"/>
+<instance part="P+3" gate="VCC" x="200.66" y="81.28"/>
+<instance part="GND3" gate="1" x="154.94" y="45.72"/>
+<instance part="GND4" gate="1" x="226.06" y="10.16"/>
+<instance part="R9" gate="G$1" x="48.26" y="83.82" rot="R270"/>
+<instance part="P+4" gate="VCC" x="48.26" y="99.06"/>
+<instance part="RESET" gate="1" x="63.5" y="83.82" rot="R270"/>
+<instance part="GND5" gate="1" x="73.66" y="76.2"/>
+<instance part="P+5" gate="VCC" x="165.1" y="45.72"/>
+<instance part="U$1" gate="G$1" x="-33.02" y="78.74" rot="R180"/>
+<instance part="DISK1" gate="1" x="210.82" y="30.48" rot="R270"/>
+<instance part="DISK2" gate="1" x="210.82" y="17.78" rot="R270"/>
+<instance part="ID8/9" gate="A" x="213.36" y="63.5"/>
+<instance part="ID10/11" gate="A" x="213.36" y="48.26"/>
+<instance part="LF33CV" gate="1" x="5.08" y="124.46"/>
+</instances>
+<busses>
+</busses>
+<nets>
+<net name="1" class="0">
+<segment>
+<pinref part="PWR" gate="-2" pin="S"/>
+<pinref part="IC1" gate="G$1" pin="VCC"/>
+<wire x1="7.62" y1="40.64" x2="10.16" y2="40.64" width="0.1524" layer="91"/>
+<pinref part="P+1" gate="VCC" pin="VCC"/>
+<wire x1="10.16" y1="40.64" x2="43.18" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="43.18" y1="40.64" x2="43.18" y2="48.26" width="0.1524" layer="91"/>
+<wire x1="43.18" y1="48.26" x2="50.8" y2="48.26" width="0.1524" layer="91"/>
+<wire x1="50.8" y1="48.26" x2="81.28" y2="48.26" width="0.1524" layer="91"/>
+<wire x1="10.16" y1="45.72" x2="10.16" y2="40.64" width="0.1524" layer="91"/>
+<junction x="10.16" y="40.64"/>
+<junction x="50.8" y="48.26"/>
+<pinref part="C1" gate="G$1" pin="1"/>
+<wire x1="50.8" y1="48.26" x2="50.8" y2="45.72" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="P+2" gate="VCC" pin="VCC"/>
+<wire x1="-22.86" y1="134.62" x2="-22.86" y2="124.46" width="0.1524" layer="91"/>
+<wire x1="-22.86" y1="124.46" x2="-10.16" y2="124.46" width="0.1524" layer="91"/>
+<pinref part="C2" gate="G$1" pin="2"/>
+<wire x1="-10.16" y1="124.46" x2="-10.16" y2="121.92" width="0.1524" layer="91"/>
+<junction x="-10.16" y="124.46"/>
+<wire x1="-2.54" y1="124.46" x2="-10.16" y2="124.46" width="0.1524" layer="91"/>
+<pinref part="LF33CV" gate="1" pin="IN"/>
+</segment>
+<segment>
+<pinref part="P+3" gate="VCC" pin="VCC"/>
+<wire x1="200.66" y1="78.74" x2="200.66" y2="71.12" width="0.1524" layer="91"/>
+<pinref part="R7" gate="G$1" pin="1"/>
+<wire x1="200.66" y1="71.12" x2="182.88" y2="71.12" width="0.1524" layer="91"/>
+<junction x="200.66" y="71.12"/>
+<pinref part="R8" gate="G$1" pin="1"/>
+<wire x1="195.58" y1="68.58" x2="200.66" y2="68.58" width="0.1524" layer="91"/>
+<wire x1="200.66" y1="68.58" x2="200.66" y2="71.12" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="P+4" gate="VCC" pin="VCC"/>
+<pinref part="R9" gate="G$1" pin="1"/>
+<wire x1="48.26" y1="96.52" x2="48.26" y2="88.9" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="IC1" gate="G$1" pin="AVCC"/>
+<pinref part="P+5" gate="VCC" pin="VCC"/>
+<wire x1="142.24" y1="45.72" x2="149.86" y2="45.72" width="0.1524" layer="91"/>
+<wire x1="149.86" y1="45.72" x2="149.86" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="149.86" y1="40.64" x2="165.1" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="165.1" y1="40.64" x2="165.1" y2="43.18" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="GND" class="0">
+<segment>
+<pinref part="PWR" gate="-1" pin="S"/>
+<junction x="10.16" y="35.56"/>
+<junction x="33.02" y="35.56"/>
+<pinref part="R6" gate="G$1" pin="2"/>
+<wire x1="33.02" y1="43.18" x2="33.02" y2="35.56" width="0.1524" layer="91"/>
+<pinref part="C4" gate="G$1" pin="2"/>
+<wire x1="40.64" y1="27.94" x2="38.1" y2="27.94" width="0.1524" layer="91"/>
+<pinref part="C5" gate="G$1" pin="2"/>
+<wire x1="40.64" y1="17.78" x2="38.1" y2="17.78" width="0.1524" layer="91"/>
+<wire x1="38.1" y1="17.78" x2="38.1" y2="27.94" width="0.1524" layer="91"/>
+<junction x="38.1" y="27.94"/>
+<wire x1="38.1" y1="27.94" x2="38.1" y2="35.56" width="0.1524" layer="91"/>
+<pinref part="IC1" gate="G$1" pin="GND"/>
+<wire x1="81.28" y1="45.72" x2="60.96" y2="45.72" width="0.1524" layer="91"/>
+<wire x1="60.96" y1="45.72" x2="60.96" y2="35.56" width="0.1524" layer="91"/>
+<wire x1="60.96" y1="35.56" x2="50.8" y2="35.56" width="0.1524" layer="91"/>
+<pinref part="C1" gate="G$1" pin="2"/>
+<wire x1="50.8" y1="38.1" x2="50.8" y2="35.56" width="0.1524" layer="91"/>
+<junction x="50.8" y="35.56"/>
+<wire x1="50.8" y1="35.56" x2="38.1" y2="35.56" width="0.1524" layer="91"/>
+<junction x="38.1" y="35.56"/>
+<wire x1="38.1" y1="35.56" x2="33.02" y2="35.56" width="0.1524" layer="91"/>
+<wire x1="33.02" y1="35.56" x2="25.4" y2="35.56" width="0.1524" layer="91"/>
+<junction x="25.4" y="35.56"/>
+<pinref part="R5" gate="G$1" pin="2"/>
+<wire x1="25.4" y1="48.26" x2="25.4" y2="35.56" width="0.1524" layer="91"/>
+<wire x1="25.4" y1="35.56" x2="17.78" y2="35.56" width="0.1524" layer="91"/>
+<junction x="17.78" y="35.56"/>
+<pinref part="R4" gate="G$1" pin="2"/>
+<wire x1="17.78" y1="50.8" x2="17.78" y2="35.56" width="0.1524" layer="91"/>
+<wire x1="17.78" y1="35.56" x2="10.16" y2="35.56" width="0.1524" layer="91"/>
+<wire x1="10.16" y1="35.56" x2="7.62" y2="35.56" width="0.1524" layer="91"/>
+<pinref part="GND1" gate="1" pin="GND"/>
+<wire x1="10.16" y1="30.48" x2="10.16" y2="35.56" width="0.1524" layer="91"/>
+<junction x="38.1" y="35.56"/>
+<wire x1="38.1" y1="81.28" x2="38.1" y2="88.9" width="0.1524" layer="91"/>
+<wire x1="38.1" y1="91.44" x2="-20.32" y2="91.44" width="0.1524" layer="91"/>
+<wire x1="38.1" y1="91.44" x2="38.1" y2="88.9" width="0.1524" layer="91"/>
+<wire x1="38.1" y1="88.9" x2="-20.32" y2="88.9" width="0.1524" layer="91"/>
+<junction x="38.1" y="91.44"/>
+<wire x1="38.1" y1="81.28" x2="-20.32" y2="81.28" width="0.1524" layer="91"/>
+<junction x="38.1" y="78.74"/>
+<junction x="38.1" y="81.28"/>
+<wire x1="-20.32" y1="78.74" x2="38.1" y2="78.74" width="0.1524" layer="91"/>
+<wire x1="38.1" y1="81.28" x2="38.1" y2="78.74" width="0.1524" layer="91"/>
+<wire x1="38.1" y1="78.74" x2="38.1" y2="35.56" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$1" pin="VSS1"/>
+<pinref part="U$1" gate="G$1" pin="VSS2"/>
+<pinref part="U$1" gate="G$1" pin="DAT1"/>
+<pinref part="U$1" gate="G$1" pin="DAT2"/>
+<junction x="38.1" y="88.9"/>
+<label x="-10.16" y="88.9" size="1.778" layer="95"/>
+<label x="-10.16" y="91.44" size="1.778" layer="95"/>
+<label x="-10.16" y="81.28" size="1.778" layer="95"/>
+<label x="-10.16" y="78.74" size="1.778" layer="95"/>
+<wire x1="38.1" y1="91.44" x2="38.1" y2="96.52" width="0.1524" layer="91"/>
+<wire x1="38.1" y1="96.52" x2="-20.32" y2="96.52" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$1" pin="GND"/>
+<label x="-10.16" y="96.52" size="1.778" layer="95"/>
+</segment>
+<segment>
+<pinref part="GND2" gate="1" pin="GND"/>
+<junction x="5.08" y="111.76"/>
+<wire x1="5.08" y1="111.76" x2="5.08" y2="106.68" width="0.1524" layer="91"/>
+<wire x1="5.08" y1="111.76" x2="-10.16" y2="111.76" width="0.1524" layer="91"/>
+<pinref part="C2" gate="G$1" pin="1"/>
+<wire x1="-10.16" y1="111.76" x2="-10.16" y2="114.3" width="0.1524" layer="91"/>
+<pinref part="C3" gate="G$1" pin="-"/>
+<wire x1="20.32" y1="114.3" x2="20.32" y2="111.76" width="0.1524" layer="91"/>
+<wire x1="20.32" y1="111.76" x2="5.08" y2="111.76" width="0.1524" layer="91"/>
+<pinref part="LF33CV" gate="1" pin="GND"/>
+<wire x1="5.08" y1="116.84" x2="5.08" y2="111.76" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="GND3" gate="1" pin="GND"/>
+<pinref part="IC1" gate="G$1" pin="GND@1"/>
+<wire x1="154.94" y1="48.26" x2="142.24" y2="48.26" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="RESET" gate="1" pin="S"/>
+<pinref part="GND5" gate="1" pin="GND"/>
+<wire x1="68.58" y1="83.82" x2="73.66" y2="83.82" width="0.1524" layer="91"/>
+<wire x1="73.66" y1="83.82" x2="73.66" y2="81.28" width="0.1524" layer="91"/>
+<junction x="73.66" y="81.28"/>
+<wire x1="73.66" y1="81.28" x2="73.66" y2="78.74" width="0.1524" layer="91"/>
+<pinref part="RESET" gate="1" pin="S1"/>
+<wire x1="68.58" y1="81.28" x2="73.66" y2="81.28" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="GND4" gate="1" pin="GND"/>
+<wire x1="226.06" y1="55.88" x2="226.06" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="226.06" y1="40.64" x2="226.06" y2="30.48" width="0.1524" layer="91"/>
+<wire x1="226.06" y1="30.48" x2="226.06" y2="17.78" width="0.1524" layer="91"/>
+<wire x1="226.06" y1="17.78" x2="226.06" y2="12.7" width="0.1524" layer="91"/>
+<junction x="226.06" y="30.48"/>
+<junction x="226.06" y="17.78"/>
+<pinref part="DISK1" gate="1" pin="S"/>
+<wire x1="215.9" y1="30.48" x2="226.06" y2="30.48" width="0.1524" layer="91"/>
+<pinref part="DISK2" gate="1" pin="S"/>
+<wire x1="215.9" y1="17.78" x2="226.06" y2="17.78" width="0.1524" layer="91"/>
+<pinref part="ID8/9" gate="A" pin="2"/>
+<wire x1="210.82" y1="63.5" x2="208.28" y2="63.5" width="0.1524" layer="91"/>
+<wire x1="208.28" y1="63.5" x2="208.28" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="208.28" y1="55.88" x2="226.06" y2="55.88" width="0.1524" layer="91"/>
+<junction x="226.06" y="40.64"/>
+<pinref part="ID10/11" gate="A" pin="2"/>
+<wire x1="210.82" y1="48.26" x2="208.28" y2="48.26" width="0.1524" layer="91"/>
+<wire x1="208.28" y1="48.26" x2="208.28" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="208.28" y1="40.64" x2="226.06" y2="40.64" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$1" class="0">
+<segment>
+<pinref part="Q1" gate="G$1" pin="1"/>
+<pinref part="C4" gate="G$1" pin="1"/>
+<wire x1="55.88" y1="27.94" x2="48.26" y2="27.94" width="0.1524" layer="91"/>
+<junction x="55.88" y="27.94"/>
+<wire x1="55.88" y1="27.94" x2="63.5" y2="27.94" width="0.1524" layer="91"/>
+<wire x1="63.5" y1="27.94" x2="63.5" y2="43.18" width="0.1524" layer="91"/>
+<pinref part="IC1" gate="G$1" pin="XTAL2"/>
+<wire x1="63.5" y1="43.18" x2="81.28" y2="43.18" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$2" class="0">
+<segment>
+<pinref part="Q1" gate="G$1" pin="2"/>
+<pinref part="C5" gate="G$1" pin="1"/>
+<wire x1="55.88" y1="17.78" x2="48.26" y2="17.78" width="0.1524" layer="91"/>
+<junction x="55.88" y="17.78"/>
+<pinref part="IC1" gate="G$1" pin="XTAL1"/>
+<wire x1="81.28" y1="40.64" x2="66.04" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="66.04" y1="40.64" x2="66.04" y2="17.78" width="0.1524" layer="91"/>
+<wire x1="66.04" y1="17.78" x2="55.88" y2="17.78" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="CLOCK" class="0">
+<segment>
+<pinref part="R6" gate="G$1" pin="1"/>
+<pinref part="R3" gate="G$1" pin="2"/>
+<wire x1="33.02" y1="53.34" x2="66.04" y2="53.34" width="0.1524" layer="91"/>
+<junction x="33.02" y="53.34"/>
+<wire x1="33.02" y1="53.34" x2="33.02" y2="73.66" width="0.1524" layer="91"/>
+<wire x1="33.02" y1="73.66" x2="-20.32" y2="73.66" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$1" pin="SCLK"/>
+<label x="-10.16" y="73.66" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="N$5" class="0">
+<segment>
+<pinref part="R3" gate="G$1" pin="1"/>
+<pinref part="IC1" gate="G$1" pin="PCINT15/SCK_PB7"/>
+<wire x1="76.2" y1="53.34" x2="81.28" y2="53.34" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="CARD_SELECT" class="0">
+<segment>
+<pinref part="R4" gate="G$1" pin="1"/>
+<pinref part="R1" gate="G$1" pin="2"/>
+<wire x1="17.78" y1="60.96" x2="66.04" y2="60.96" width="0.1524" layer="91"/>
+<junction x="17.78" y="60.96"/>
+<wire x1="17.78" y1="60.96" x2="17.78" y2="76.2" width="0.1524" layer="91"/>
+<wire x1="17.78" y1="76.2" x2="-20.32" y2="76.2" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$1" pin="CS"/>
+<label x="-10.16" y="76.2" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="N$8" class="0">
+<segment>
+<pinref part="R1" gate="G$1" pin="1"/>
+<pinref part="IC1" gate="G$1" pin="PCINT12/OC0B/SS_PB4"/>
+<wire x1="76.2" y1="60.96" x2="81.28" y2="60.96" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$9" class="0">
+<segment>
+<pinref part="R2" gate="G$1" pin="1"/>
+<pinref part="IC1" gate="G$1" pin="PCINT13/MOSI_PB5"/>
+<wire x1="66.04" y1="58.42" x2="81.28" y2="58.42" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="DATA_IN" class="0">
+<segment>
+<pinref part="R2" gate="G$1" pin="2"/>
+<pinref part="R5" gate="G$1" pin="1"/>
+<wire x1="25.4" y1="58.42" x2="55.88" y2="58.42" width="0.1524" layer="91"/>
+<junction x="25.4" y="58.42"/>
+<wire x1="25.4" y1="58.42" x2="25.4" y2="71.12" width="0.1524" layer="91"/>
+<wire x1="25.4" y1="71.12" x2="-20.32" y2="71.12" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$1" pin="DATA_IN"/>
+<label x="-10.16" y="71.12" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="DATA_OUT" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="PCINT14/MISO_PB6"/>
+<wire x1="81.28" y1="55.88" x2="40.64" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="40.64" y1="55.88" x2="40.64" y2="68.58" width="0.1524" layer="91"/>
+<wire x1="40.64" y1="68.58" x2="-20.32" y2="68.58" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$1" pin="DATA_OUT"/>
+<label x="-10.16" y="68.58" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="N$13" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="PCINT16/SCL_PC0"/>
+<pinref part="IEC" gate="-3" pin="S"/>
+<wire x1="142.24" y1="25.4" x2="149.86" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="149.86" y1="25.4" x2="149.86" y2="20.32" width="0.1524" layer="91"/>
+<wire x1="149.86" y1="20.32" x2="160.02" y2="20.32" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$14" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="PCINT17/SDA_PC1"/>
+<wire x1="142.24" y1="27.94" x2="152.4" y2="27.94" width="0.1524" layer="91"/>
+<wire x1="152.4" y1="27.94" x2="152.4" y2="25.4" width="0.1524" layer="91"/>
+<pinref part="IEC" gate="-2" pin="S"/>
+<wire x1="152.4" y1="25.4" x2="160.02" y2="25.4" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$15" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="PCINT18/TCK_PC2"/>
+<wire x1="142.24" y1="30.48" x2="160.02" y2="30.48" width="0.1524" layer="91"/>
+<pinref part="IEC" gate="-1" pin="S"/>
+</segment>
+</net>
+<net name="N$11" class="0">
+<segment>
+<pinref part="R7" gate="G$1" pin="2"/>
+<pinref part="LED1" gate="G$1" pin="A"/>
+<wire x1="172.72" y1="71.12" x2="160.02" y2="71.12" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$12" class="0">
+<segment>
+<pinref part="LED1" gate="G$1" pin="C"/>
+<pinref part="IC1" gate="G$1" pin="PCINT0/ADC0_PA0"/>
+<wire x1="152.4" y1="71.12" x2="142.24" y2="71.12" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$16" class="0">
+<segment>
+<pinref part="LED2" gate="G$1" pin="C"/>
+<pinref part="IC1" gate="G$1" pin="PCINT1/ADC1_PA1"/>
+<wire x1="162.56" y1="68.58" x2="142.24" y2="68.58" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$17" class="0">
+<segment>
+<pinref part="LED2" gate="G$1" pin="A"/>
+<pinref part="R8" gate="G$1" pin="2"/>
+<wire x1="170.18" y1="68.58" x2="185.42" y2="68.58" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$19" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="PCINT2/ADC2_PA2"/>
+<pinref part="ID8/9" gate="A" pin="1"/>
+<wire x1="142.24" y1="66.04" x2="210.82" y2="66.04" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$18" class="0">
+<segment>
+<pinref part="RESET" gate="1" pin="P"/>
+<pinref part="R9" gate="G$1" pin="2"/>
+<wire x1="48.26" y1="78.74" x2="48.26" y2="50.8" width="0.1524" layer="91"/>
+<pinref part="IC1" gate="G$1" pin="!RESET"/>
+<wire x1="48.26" y1="50.8" x2="53.34" y2="50.8" width="0.1524" layer="91"/>
+<junction x="53.34" y="50.8"/>
+<wire x1="53.34" y1="50.8" x2="81.28" y2="50.8" width="0.1524" layer="91"/>
+<wire x1="58.42" y1="83.82" x2="53.34" y2="83.82" width="0.1524" layer="91"/>
+<wire x1="53.34" y1="83.82" x2="53.34" y2="81.28" width="0.1524" layer="91"/>
+<junction x="53.34" y="81.28"/>
+<wire x1="53.34" y1="81.28" x2="53.34" y2="50.8" width="0.1524" layer="91"/>
+<pinref part="RESET" gate="1" pin="P1"/>
+<wire x1="53.34" y1="81.28" x2="58.42" y2="81.28" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="VDD" class="0">
+<segment>
+<pinref part="C3" gate="G$1" pin="+"/>
+<wire x1="20.32" y1="124.46" x2="20.32" y2="121.92" width="0.1524" layer="91"/>
+<wire x1="20.32" y1="124.46" x2="33.02" y2="124.46" width="0.1524" layer="91"/>
+<wire x1="33.02" y1="124.46" x2="33.02" y2="86.36" width="0.1524" layer="91"/>
+<wire x1="33.02" y1="86.36" x2="-20.32" y2="86.36" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$1" pin="VDD"/>
+<label x="-10.16" y="86.36" size="1.778" layer="95"/>
+<junction x="20.32" y="124.46"/>
+<wire x1="12.7" y1="124.46" x2="20.32" y2="124.46" width="0.1524" layer="91"/>
+<pinref part="LF33CV" gate="1" pin="OUT"/>
+</segment>
+</net>
+<net name="N$7" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="PCINT26/INT0_PD2"/>
+<wire x1="81.28" y1="33.02" x2="76.2" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="76.2" y1="33.02" x2="76.2" y2="10.16" width="0.1524" layer="91"/>
+<wire x1="76.2" y1="10.16" x2="-15.24" y2="10.16" width="0.1524" layer="91"/>
+<wire x1="-15.24" y1="10.16" x2="-15.24" y2="58.42" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$1" pin="CARD_DETECT"/>
+<wire x1="-15.24" y1="58.42" x2="-20.32" y2="58.42" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$27" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="PCINT30/OC2B/ICP_PD6"/>
+<wire x1="81.28" y1="22.86" x2="78.74" y2="22.86" width="0.1524" layer="91"/>
+<wire x1="78.74" y1="22.86" x2="78.74" y2="7.62" width="0.1524" layer="91"/>
+<wire x1="78.74" y1="7.62" x2="-12.7" y2="7.62" width="0.1524" layer="91"/>
+<wire x1="-12.7" y1="7.62" x2="-12.7" y2="63.5" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$1" pin="WRITE_PROTECT"/>
+<wire x1="-12.7" y1="63.5" x2="-20.32" y2="63.5" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$3" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="PCINT3/ADC3_PA3"/>
+<wire x1="142.24" y1="63.5" x2="172.72" y2="63.5" width="0.1524" layer="91"/>
+<wire x1="172.72" y1="63.5" x2="172.72" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="172.72" y1="55.88" x2="185.42" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="185.42" y1="55.88" x2="185.42" y2="50.8" width="0.1524" layer="91"/>
+<wire x1="185.42" y1="50.8" x2="210.82" y2="50.8" width="0.1524" layer="91"/>
+<pinref part="ID10/11" gate="A" pin="1"/>
+</segment>
+</net>
+<net name="N$20" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="PCINT4/ADC4_PA4"/>
+<wire x1="142.24" y1="60.96" x2="170.18" y2="60.96" width="0.1524" layer="91"/>
+<wire x1="170.18" y1="60.96" x2="170.18" y2="53.34" width="0.1524" layer="91"/>
+<wire x1="170.18" y1="53.34" x2="182.88" y2="53.34" width="0.1524" layer="91"/>
+<wire x1="182.88" y1="53.34" x2="182.88" y2="30.48" width="0.1524" layer="91"/>
+<pinref part="DISK1" gate="1" pin="P"/>
+<wire x1="182.88" y1="30.48" x2="205.74" y2="30.48" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$22" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="PCINT5/ADC5_PA5"/>
+<wire x1="142.24" y1="58.42" x2="167.64" y2="58.42" width="0.1524" layer="91"/>
+<wire x1="167.64" y1="58.42" x2="167.64" y2="50.8" width="0.1524" layer="91"/>
+<wire x1="167.64" y1="50.8" x2="180.34" y2="50.8" width="0.1524" layer="91"/>
+<wire x1="180.34" y1="50.8" x2="180.34" y2="17.78" width="0.1524" layer="91"/>
+<pinref part="DISK2" gate="1" pin="P"/>
+<wire x1="180.34" y1="17.78" x2="205.74" y2="17.78" width="0.1524" layer="91"/>
+</segment>
+</net>
+</nets>
+</sheet>
+</sheets>
+<errors>
+<approved hash="104,1,142.24,45.72,IC1,AVCC,VCC,,,"/>
+<approved hash="113,1,63.5,85.9705,RESET,,,,,"/>
+</errors>
+</schematic>
+</drawing>
+<compatibility>
+<note version="6.3" minversion="6.2.2" severity="warning">
+Since Version 6.2.2 text objects can contain more than one line,
+which will not be processed correctly with this version.
+</note>
+</compatibility>
+</eagle>
diff --git a/trunk/AVRProjects/sd2iec/larsp/SD2IEC v1.2 LM1117T.brd b/trunk/AVRProjects/sd2iec/larsp/SD2IEC v1.2 LM1117T.brd
new file mode 100644
index 00000000..9c146ccb
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/larsp/SD2IEC v1.2 LM1117T.brd	
@@ -0,0 +1,3398 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!DOCTYPE eagle SYSTEM "eagle.dtd">
+<eagle version="6.4">
+<drawing>
+<settings>
+<setting alwaysvectorfont="no"/>
+<setting verticaltext="up"/>
+</settings>
+<grid distance="0.00625" unitdist="inch" unit="inch" style="dots" multiple="1" display="yes" altdistance="0.025" altunitdist="inch" altunit="inch"/>
+<layers>
+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>
+<layer number="2" name="Route2" color="1" fill="3" visible="yes" active="yes"/>
+<layer number="3" name="Route3" color="4" fill="3" visible="yes" active="yes"/>
+<layer number="4" name="Route4" color="1" fill="4" visible="yes" active="yes"/>
+<layer number="5" name="Route5" color="4" fill="4" visible="yes" active="yes"/>
+<layer number="6" name="Route6" color="1" fill="8" visible="yes" active="yes"/>
+<layer number="7" name="Route7" color="4" fill="8" visible="yes" active="yes"/>
+<layer number="8" name="Route8" color="1" fill="2" visible="yes" active="yes"/>
+<layer number="9" name="Route9" color="4" fill="2" visible="yes" active="yes"/>
+<layer number="10" name="Route10" color="1" fill="7" visible="yes" active="yes"/>
+<layer number="11" name="Route11" color="4" fill="7" visible="yes" active="yes"/>
+<layer number="12" name="Route12" color="1" fill="5" visible="yes" active="yes"/>
+<layer number="13" name="Route13" color="4" fill="5" visible="yes" active="yes"/>
+<layer number="14" name="Route14" color="1" fill="6" visible="yes" active="yes"/>
+<layer number="15" name="Route15" color="4" fill="6" visible="yes" active="yes"/>
+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>
+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/>
+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/>
+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/>
+<layer number="24" name="bOrigins" color="15" fill="1" visible="yes" active="yes"/>
+<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="26" name="bNames" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="28" name="bValues" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="29" name="tStop" color="7" fill="3" visible="no" active="yes"/>
+<layer number="30" name="bStop" color="7" fill="6" visible="no" active="yes"/>
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+<layer number="32" name="bCream" color="7" fill="5" visible="no" active="yes"/>
+<layer number="33" name="tFinish" color="6" fill="3" visible="no" active="yes"/>
+<layer number="34" name="bFinish" color="6" fill="6" visible="no" active="yes"/>
+<layer number="35" name="tGlue" color="7" fill="4" visible="no" active="yes"/>
+<layer number="36" name="bGlue" color="7" fill="5" visible="no" active="yes"/>
+<layer number="37" name="tTest" color="7" fill="1" visible="no" active="yes"/>
+<layer number="38" name="bTest" color="7" fill="1" visible="no" active="yes"/>
+<layer number="39" name="tKeepout" color="4" fill="11" visible="yes" active="yes"/>
+<layer number="40" name="bKeepout" color="1" fill="11" visible="yes" active="yes"/>
+<layer number="41" name="tRestrict" color="4" fill="10" visible="yes" active="yes"/>
+<layer number="42" name="bRestrict" color="1" fill="10" visible="yes" active="yes"/>
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+<layer number="44" name="Drills" color="7" fill="1" visible="no" active="yes"/>
+<layer number="45" name="Holes" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="46" name="Milling" color="3" fill="1" visible="no" active="yes"/>
+<layer number="47" name="Measures" color="7" fill="1" visible="no" active="yes"/>
+<layer number="48" name="Document" color="7" fill="1" visible="yes" active="yes"/>
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+<layer number="50" name="dxf" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="51" name="tDocu" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="52" name="bDocu" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="53" name="tGND_GNDA" color="7" fill="9" visible="no" active="no"/>
+<layer number="54" name="bGND_GNDA" color="1" fill="9" visible="no" active="no"/>
+<layer number="56" name="wert" color="7" fill="1" visible="no" active="yes"/>
+<layer number="57" name="tCAD" color="7" fill="1" visible="no" active="no"/>
+<layer number="91" name="Nets" color="2" fill="1" visible="no" active="no"/>
+<layer number="92" name="Busses" color="1" fill="1" visible="no" active="no"/>
+<layer number="93" name="Pins" color="2" fill="1" visible="no" active="no"/>
+<layer number="94" name="Symbols" color="4" fill="1" visible="no" active="no"/>
+<layer number="95" name="Names" color="7" fill="1" visible="no" active="no"/>
+<layer number="96" name="Values" color="7" fill="1" visible="no" active="no"/>
+<layer number="97" name="Info" color="7" fill="1" visible="no" active="no"/>
+<layer number="98" name="Guide" color="6" fill="1" visible="no" active="no"/>
+<layer number="100" name="Muster" color="7" fill="1" visible="no" active="no"/>
+<layer number="101" name="Patch_Top" color="12" fill="4" visible="no" active="yes"/>
+<layer number="102" name="Vscore" color="7" fill="1" visible="no" active="yes"/>
+<layer number="103" name="fp3" color="7" fill="1" visible="no" active="yes"/>
+<layer number="104" name="Name" color="7" fill="1" visible="no" active="yes"/>
+<layer number="105" name="Beschreib" color="9" fill="1" visible="no" active="yes"/>
+<layer number="106" name="BGA-Top" color="4" fill="1" visible="no" active="yes"/>
+<layer number="107" name="BD-Top" color="5" fill="1" visible="no" active="yes"/>
+<layer number="108" name="fp8" color="7" fill="1" visible="no" active="yes"/>
+<layer number="109" name="fp9" color="7" fill="1" visible="no" active="yes"/>
+<layer number="110" name="fp0" color="7" fill="1" visible="no" active="yes"/>
+<layer number="111" name="LPC17xx" color="7" fill="1" visible="no" active="yes"/>
+<layer number="112" name="tSilk" color="7" fill="1" visible="no" active="yes"/>
+<layer number="116" name="Patch_BOT" color="9" fill="4" visible="no" active="yes"/>
+<layer number="121" name="_tsilk" color="7" fill="1" visible="no" active="yes"/>
+<layer number="122" name="_bsilk" color="7" fill="1" visible="no" active="yes"/>
+<layer number="123" name="tTestmark" color="7" fill="1" visible="no" active="yes"/>
+<layer number="124" name="bTestmark" color="7" fill="1" visible="no" active="yes"/>
+<layer number="125" name="_tNames" color="7" fill="1" visible="no" active="yes"/>
+<layer number="126" name="_bNames" color="7" fill="1" visible="no" active="yes"/>
+<layer number="127" name="_tValues" color="7" fill="1" visible="no" active="yes"/>
+<layer number="128" name="_bValues" color="7" fill="1" visible="no" active="yes"/>
+<layer number="131" name="tAdjust" color="7" fill="1" visible="no" active="yes"/>
+<layer number="132" name="bAdjust" color="7" fill="1" visible="no" active="yes"/>
+<layer number="144" name="Drill_legend" color="7" fill="1" visible="no" active="yes"/>
+<layer number="150" name="Notes" color="7" fill="1" visible="no" active="yes"/>
+<layer number="151" name="HeatSink" color="7" fill="1" visible="no" active="yes"/>
+<layer number="152" name="_bDocu" color="7" fill="1" visible="no" active="yes"/>
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+<layer number="154" name="FabDoc2" color="2" fill="1" visible="no" active="no"/>
+<layer number="155" name="FabDoc3" color="7" fill="15" visible="no" active="no"/>
+<layer number="199" name="Contour" color="7" fill="1" visible="no" active="yes"/>
+<layer number="200" name="200bmp" color="1" fill="10" visible="no" active="yes"/>
+<layer number="201" name="201bmp" color="2" fill="1" visible="no" active="no"/>
+<layer number="202" name="202bmp" color="3" fill="1" visible="no" active="no"/>
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+<layer number="207" name="207bmp" color="8" fill="10" visible="no" active="yes"/>
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+<layer number="209" name="209bmp" color="7" fill="1" visible="no" active="yes"/>
+<layer number="210" name="210bmp" color="7" fill="1" visible="no" active="yes"/>
+<layer number="211" name="211bmp" color="7" fill="1" visible="no" active="yes"/>
+<layer number="212" name="212bmp" color="7" fill="1" visible="no" active="yes"/>
+<layer number="213" name="213bmp" color="7" fill="1" visible="no" active="yes"/>
+<layer number="214" name="214bmp" color="7" fill="1" visible="no" active="yes"/>
+<layer number="215" name="215bmp" color="7" fill="1" visible="no" active="yes"/>
+<layer number="216" name="216bmp" color="7" fill="1" visible="no" active="yes"/>
+<layer number="217" name="217bmp" color="18" fill="1" visible="no" active="no"/>
+<layer number="218" name="218bmp" color="19" fill="1" visible="no" active="no"/>
+<layer number="219" name="219bmp" color="20" fill="1" visible="no" active="no"/>
+<layer number="220" name="220bmp" color="21" fill="1" visible="no" active="no"/>
+<layer number="221" name="221bmp" color="22" fill="1" visible="no" active="no"/>
+<layer number="222" name="222bmp" color="23" fill="1" visible="no" active="no"/>
+<layer number="223" name="223bmp" color="24" fill="1" visible="no" active="no"/>
+<layer number="224" name="224bmp" color="25" fill="1" visible="no" active="no"/>
+<layer number="248" name="Housing" color="7" fill="1" visible="no" active="yes"/>
+<layer number="249" name="Edge" color="7" fill="1" visible="no" active="yes"/>
+<layer number="250" name="Descript" color="7" fill="1" visible="no" active="no"/>
+<layer number="251" name="SMDround" color="7" fill="1" visible="no" active="no"/>
+<layer number="254" name="cooling" color="7" fill="1" visible="no" active="yes"/>
+</layers>
+<board>
+<plain>
+<wire x1="0" y1="0" x2="65.71" y2="0" width="0" layer="20"/>
+<wire x1="65.71" y1="0" x2="65.71" y2="80" width="0" layer="20"/>
+<wire x1="65.71" y1="80" x2="0" y2="80" width="0" layer="20"/>
+<wire x1="0" y1="80" x2="0" y2="0" width="0" layer="20"/>
+<text x="50.4825" y="4.1275" size="1.778" layer="16" rot="MR0">+</text>
+<text x="44.29125" y="4.445" size="1.778" layer="16" rot="MR0">-</text>
+<text x="60.6425" y="37.94125" size="1.778" layer="16" rot="MR270">SD2IEC (larsp layout)</text>
+<text x="57.94375" y="31.115" size="1.778" layer="16" rot="MR270">DIY by Solo761</text>
+<text x="55.40375" y="19.05" size="1.778" layer="16" rot="MR270">v1.2</text>
+</plain>
+<libraries>
+<library name="atmel">
+<description>&lt;b&gt;AVR Devices&lt;/b&gt;&lt;p&gt;
+Configurable logic, microcontrollers, nonvolatile memories&lt;p&gt;
+Based on the following sources:&lt;p&gt;
+&lt;ul&gt;
+&lt;li&gt;www.atmel.com
+&lt;li&gt;CD-ROM : Configurable Logic Microcontroller Nonvolatile Memory
+&lt;li&gt;CadSoft download site, www.cadsoft.de or www.cadsoftusa.com , file at90smcu_v400.zip
+&lt;li&gt;avr.lbr
+&lt;/ul&gt;
+&lt;author&gt;Revised by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="DIL40">
+<description>&lt;B&gt;Dual In Line&lt;/B&gt;</description>
+<wire x1="-26.416" y1="-1.27" x2="-26.416" y2="-6.604" width="0.1524" layer="21"/>
+<wire x1="-26.416" y1="1.27" x2="-26.416" y2="-1.27" width="0.1524" layer="21" curve="-180"/>
+<wire x1="26.416" y1="-6.604" x2="26.416" y2="6.604" width="0.1524" layer="21"/>
+<wire x1="-26.416" y1="6.604" x2="-26.416" y2="1.27" width="0.1524" layer="21"/>
+<wire x1="-26.416" y1="6.604" x2="26.416" y2="6.604" width="0.1524" layer="21"/>
+<wire x1="-26.416" y1="-6.604" x2="26.416" y2="-6.604" width="0.1524" layer="21"/>
+<pad name="1" x="-24.13" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="2" x="-21.59" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="3" x="-19.05" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="4" x="-16.51" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="5" x="-13.97" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="6" x="-11.43" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="7" x="-8.89" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="8" x="-6.35" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="9" x="-3.81" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="10" x="-1.27" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="11" x="1.27" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="12" x="3.81" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="13" x="6.35" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="14" x="8.89" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="15" x="11.43" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="16" x="13.97" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="17" x="16.51" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="18" x="19.05" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="19" x="21.59" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="20" x="24.13" y="-7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="21" x="24.13" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="22" x="21.59" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="23" x="19.05" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="24" x="16.51" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="25" x="13.97" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="26" x="11.43" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="27" x="8.89" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="28" x="6.35" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="29" x="3.81" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="30" x="1.27" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="31" x="-1.27" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="32" x="-3.81" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="33" x="-6.35" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="34" x="-8.89" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="35" x="-11.43" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="36" x="-13.97" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="37" x="-16.51" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="38" x="-19.05" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="39" x="-21.59" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<pad name="40" x="-24.13" y="7.62" drill="0.8128" shape="long" rot="R90"/>
+<text x="-26.67" y="-6.35" size="1.778" layer="25" ratio="10" rot="R90">&gt;NAME</text>
+<text x="-21.59" y="-2.2352" size="1.778" layer="27" ratio="10">&gt;VALUE</text>
+</package>
+</packages>
+</library>
+<library name="resistor">
+<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;
+Based on the previous libraries:
+&lt;ul&gt;
+&lt;li&gt;r.lbr
+&lt;li&gt;cap.lbr 
+&lt;li&gt;cap-fe.lbr
+&lt;li&gt;captant.lbr
+&lt;li&gt;polcap.lbr
+&lt;li&gt;ipc-smd.lbr
+&lt;/ul&gt;
+All SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;
+&lt;p&gt;
+for Electrolyt Capacitors see also :&lt;p&gt;
+www.bccomponents.com &lt;p&gt;
+www.panasonic.com&lt;p&gt;
+www.kemet.com&lt;p&gt;
+&lt;p&gt;
+for trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;
+
+&lt;map name="nav_main"&gt;
+&lt;area shape="rect" coords="0,1,140,23" href="../military_specs.asp" title=""&gt;
+&lt;area shape="rect" coords="0,24,140,51" href="../about.asp" title=""&gt;
+&lt;area shape="rect" coords="1,52,140,77" href="../rfq.asp" title=""&gt;
+&lt;area shape="rect" coords="0,78,139,103" href="../products.asp" title=""&gt;
+&lt;area shape="rect" coords="1,102,138,128" href="../excess_inventory.asp" title=""&gt;
+&lt;area shape="rect" coords="1,129,138,150" href="../edge.asp" title=""&gt;
+&lt;area shape="rect" coords="1,151,139,178" href="../industry_links.asp" title=""&gt;
+&lt;area shape="rect" coords="0,179,139,201" href="../comments.asp" title=""&gt;
+&lt;area shape="rect" coords="1,203,138,231" href="../directory.asp" title=""&gt;
+&lt;area shape="default" nohref&gt;
+&lt;/map&gt;
+
+&lt;html&gt;
+
+&lt;title&gt;&lt;/title&gt;
+
+ &lt;LINK REL="StyleSheet" TYPE="text/css" HREF="style-sheet.css"&gt;
+
+&lt;body bgcolor="#ffffff" text="#000000" marginwidth="0" marginheight="0" topmargin="0" leftmargin="0"&gt;
+&lt;table border=0 cellspacing=0 cellpadding=0 width="100%" cellpaddding=0 height="55%"&gt;
+&lt;tr valign="top"&gt;
+
+&lt;/td&gt;
+&lt;! &lt;td width="10"&gt;&amp;nbsp;&lt;/td&gt;
+&lt;td width="90%"&gt;
+
+&lt;b&gt;&lt;font color="#0000FF" size="4"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;
+&lt;P&gt;
+&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;
+  &lt;TR&gt;
+    &lt;TD COLSPAN=8&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+  &lt;/TR&gt;
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+<wire x1="2.413" y1="-1.016" x2="-2.413" y2="-1.016" width="0.1524" layer="21"/>
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+<wire x1="2.921" y1="-1.143" x2="2.54" y2="-1.143" width="0.1524" layer="21"/>
+<wire x1="3.175" y1="-0.889" x2="3.175" y2="0.889" width="0.1524" layer="21"/>
+<wire x1="4.445" y1="0" x2="4.064" y2="0" width="0.6096" layer="21"/>
+<wire x1="-4.445" y1="0" x2="-4.064" y2="0" width="0.6096" layer="21"/>
+<pad name="1" x="-6.35" y="0" drill="0.8128" shape="octagon"/>
+<pad name="2" x="6.35" y="0" drill="0.8128" shape="octagon"/>
+<text x="-3.175" y="1.397" size="1.27" layer="25" ratio="10">&gt;NAME</text>
+<text x="-2.286" y="-0.6858" size="1.27" layer="27" ratio="10">&gt;VALUE</text>
+<rectangle x1="3.175" y1="-0.3048" x2="4.0386" y2="0.3048" layer="21"/>
+<rectangle x1="-4.0386" y1="-0.3048" x2="-3.175" y2="0.3048" layer="21"/>
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+<rectangle x1="-5.3086" y1="-0.3048" x2="-4.445" y2="0.3048" layer="21"/>
+</package>
+<package name="C025-025X050">
+<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;
+grid 2.5 mm, outline 2.5 x 5 mm</description>
+<wire x1="-2.159" y1="1.27" x2="2.159" y2="1.27" width="0.1524" layer="21"/>
+<wire x1="2.159" y1="-1.27" x2="-2.159" y2="-1.27" width="0.1524" layer="21"/>
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+<wire x1="-2.413" y1="1.016" x2="-2.159" y2="1.27" width="0.1524" layer="21" curve="-90"/>
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+<wire x1="-2.413" y1="-1.016" x2="-2.159" y2="-1.27" width="0.1524" layer="21" curve="90"/>
+<wire x1="0.762" y1="0" x2="0.381" y2="0" width="0.1524" layer="51"/>
+<wire x1="0.381" y1="0" x2="0.254" y2="0" width="0.1524" layer="21"/>
+<wire x1="0.254" y1="0" x2="0.254" y2="0.762" width="0.254" layer="21"/>
+<wire x1="0.254" y1="0" x2="0.254" y2="-0.762" width="0.254" layer="21"/>
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+<wire x1="-0.381" y1="0" x2="-0.762" y2="0" width="0.1524" layer="51"/>
+<pad name="1" x="-1.27" y="0" drill="0.8128" shape="octagon"/>
+<pad name="2" x="1.27" y="0" drill="0.8128" shape="octagon"/>
+<text x="-2.286" y="1.524" size="1.27" layer="25" ratio="10">&gt;NAME</text>
+<text x="-2.286" y="-2.794" size="1.27" layer="27" ratio="10">&gt;VALUE</text>
+</package>
+<package name="E2,5-5">
+<description>&lt;b&gt;ELECTROLYTIC CAPACITOR&lt;/b&gt;&lt;p&gt;
+grid 2.54 mm, diameter 5 mm</description>
+<wire x1="-1.651" y1="1.27" x2="-1.397" y2="1.27" width="0.1524" layer="21"/>
+<wire x1="-1.397" y1="1.016" x2="-1.397" y2="1.27" width="0.1524" layer="21"/>
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+<wire x1="-1.651" y1="0" x2="-0.762" y2="0" width="0.1524" layer="51"/>
+<wire x1="-0.762" y1="0" x2="-0.762" y2="-1.27" width="0.1524" layer="51"/>
+<wire x1="-0.762" y1="-1.27" x2="-0.254" y2="-1.27" width="0.1524" layer="51"/>
+<wire x1="-0.254" y1="-1.27" x2="-0.254" y2="1.27" width="0.1524" layer="51"/>
+<wire x1="-0.254" y1="1.27" x2="-0.762" y2="1.27" width="0.1524" layer="51"/>
+<wire x1="-0.762" y1="1.27" x2="-0.762" y2="0" width="0.1524" layer="51"/>
+<wire x1="0.635" y1="0" x2="1.651" y2="0" width="0.1524" layer="51"/>
+<circle x="0" y="0" radius="2.54" width="0.1524" layer="21"/>
+<pad name="-" x="1.27" y="0" drill="0.8128" diameter="1.6002" shape="octagon"/>
+<pad name="+" x="-1.27" y="0" drill="0.8128" diameter="1.6002"/>
+<text x="2.413" y="1.27" size="1.27" layer="25" ratio="10">&gt;NAME</text>
+<text x="2.413" y="-2.413" size="1.27" layer="27" ratio="10">&gt;VALUE</text>
+<rectangle x1="0.254" y1="-1.27" x2="0.762" y2="1.27" layer="51"/>
+</package>
+</packages>
+</library>
+<library name="led">
+<description>&lt;b&gt;LEDs&lt;/b&gt;&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;br&gt;
+Extended by Federico Battaglin &lt;author&gt;&amp;lt;federico.rd@fdpinternational.com&amp;gt;&lt;/author&gt; with DUOLED</description>
+<packages>
+<package name="LED5MM">
+<description>&lt;B&gt;LED&lt;/B&gt;&lt;p&gt;
+5 mm, round</description>
+<wire x1="2.54" y1="-1.905" x2="2.54" y2="1.905" width="0.2032" layer="21"/>
+<wire x1="2.54" y1="-1.905" x2="2.54" y2="1.905" width="0.254" layer="21" curve="-286.260205"/>
+<wire x1="-1.143" y1="0" x2="0" y2="1.143" width="0.1524" layer="51" curve="-90"/>
+<wire x1="0" y1="-1.143" x2="1.143" y2="0" width="0.1524" layer="51" curve="90"/>
+<wire x1="-1.651" y1="0" x2="0" y2="1.651" width="0.1524" layer="51" curve="-90"/>
+<wire x1="0" y1="-1.651" x2="1.651" y2="0" width="0.1524" layer="51" curve="90"/>
+<wire x1="-2.159" y1="0" x2="0" y2="2.159" width="0.1524" layer="51" curve="-90"/>
+<wire x1="0" y1="-2.159" x2="2.159" y2="0" width="0.1524" layer="51" curve="90"/>
+<circle x="0" y="0" radius="2.54" width="0.1524" layer="21"/>
+<pad name="A" x="-1.27" y="0" drill="0.8128" shape="octagon"/>
+<pad name="K" x="1.27" y="0" drill="0.8128" shape="octagon"/>
+<text x="3.175" y="0.5334" size="1.27" layer="25" ratio="10">&gt;NAME</text>
+<text x="3.2004" y="-1.8034" size="1.27" layer="27" ratio="10">&gt;VALUE</text>
+</package>
+</packages>
+</library>
+<library name="con-molex">
+<description>&lt;b&gt;Molex Connectors&lt;/b&gt;&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="6410-02">
+<description>&lt;b&gt;MOLEX 2.54mm KK  CONNECTOR&lt;/b&gt;</description>
+<wire x1="-1.27" y1="2.54" x2="-1.27" y2="2.921" width="0.127" layer="21"/>
+<wire x1="-2.54" y1="0" x2="-2.54" y2="2.921" width="0.254" layer="21"/>
+<wire x1="-2.54" y1="2.921" x2="-1.27" y2="2.921" width="0.254" layer="21"/>
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+<wire x1="-1.27" y1="2.921" x2="0" y2="2.921" width="0.254" layer="21"/>
+<wire x1="2.54" y1="0" x2="2.54" y2="2.921" width="0.254" layer="21"/>
+<wire x1="2.54" y1="2.921" x2="0" y2="2.921" width="0.127" layer="21"/>
+<wire x1="-2.54" y1="0" x2="-2.54" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="-2.54" y1="-2.921" x2="0" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="2.54" y1="0" x2="2.54" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="2.54" y1="-2.921" x2="1.905" y2="-2.921" width="0.127" layer="21"/>
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+<wire x1="-1.905" y1="-2.921" x2="-1.905" y2="-2.286" width="0.254" layer="21"/>
+<wire x1="-1.905" y1="-2.286" x2="-0.635" y2="-2.286" width="0.254" layer="21"/>
+<wire x1="-0.635" y1="-2.286" x2="-0.635" y2="-2.921" width="0.254" layer="21"/>
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+<wire x1="0.635" y1="-2.921" x2="0.635" y2="-2.286" width="0.254" layer="21"/>
+<wire x1="0.635" y1="-2.286" x2="1.905" y2="-2.286" width="0.254" layer="21"/>
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+<wire x1="1.905" y1="-2.921" x2="2.54" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="-1.27" y1="1.905" x2="-1.27" y2="2.921" width="0.254" layer="21"/>
+<wire x1="-1.27" y1="1.905" x2="-1.016" y2="1.905" width="0.254" layer="21"/>
+<wire x1="-1.016" y1="1.905" x2="1.016" y2="1.905" width="0.254" layer="21"/>
+<wire x1="1.016" y1="1.905" x2="1.27" y2="1.905" width="0.254" layer="21"/>
+<wire x1="1.27" y1="1.905" x2="1.27" y2="2.921" width="0.254" layer="21"/>
+<wire x1="-1.27" y1="1.905" x2="-1.016" y2="1.397" width="0.254" layer="21"/>
+<wire x1="-1.016" y1="2.921" x2="-1.016" y2="1.905" width="0.254" layer="21"/>
+<wire x1="-1.016" y1="1.397" x2="1.016" y2="1.397" width="0.254" layer="21"/>
+<wire x1="1.016" y1="1.397" x2="1.27" y2="1.905" width="0.254" layer="21"/>
+<wire x1="1.016" y1="2.921" x2="1.016" y2="1.905" width="0.254" layer="21"/>
+<pad name="2" x="-1.27" y="0" drill="1.016" shape="long" rot="R90"/>
+<pad name="1" x="1.27" y="0" drill="1.016" shape="long" rot="R90"/>
+<text x="-2.5131" y="3.2751" size="1.016" layer="25" ratio="10">&gt;NAME</text>
+<text x="3.2751" y="-0.6111" size="1.27" layer="21" ratio="14">1</text>
+<text x="-3.7099" y="-0.6873" size="1.27" layer="21" ratio="14">2</text>
+<text x="-2.5131" y="-4.5989" size="0.8128" layer="27" ratio="10">&gt;VALUE</text>
+<rectangle x1="-1.524" y1="-0.254" x2="-1.016" y2="0.254" layer="51"/>
+<rectangle x1="1.016" y1="-0.254" x2="1.524" y2="0.254" layer="51"/>
+</package>
+<package name="6410-03">
+<description>&lt;b&gt;MOLEX 2.54mm KK  CONNECTOR&lt;/b&gt;</description>
+<wire x1="-2.54" y1="2.54" x2="-2.54" y2="2.921" width="0.127" layer="21"/>
+<wire x1="-3.81" y1="0" x2="-3.81" y2="2.921" width="0.254" layer="21"/>
+<wire x1="-3.81" y1="2.921" x2="-2.54" y2="2.921" width="0.254" layer="21"/>
+<wire x1="-2.286" y1="2.921" x2="-2.54" y2="2.921" width="0.127" layer="21"/>
+<wire x1="-2.54" y1="2.921" x2="-1.27" y2="2.921" width="0.254" layer="21"/>
+<wire x1="3.81" y1="0" x2="3.81" y2="2.921" width="0.254" layer="21"/>
+<wire x1="3.81" y1="2.921" x2="-1.27" y2="2.921" width="0.254" layer="21"/>
+<wire x1="-3.81" y1="0" x2="-3.81" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="-3.81" y1="-2.921" x2="-1.27" y2="-2.921" width="0.127" layer="21"/>
+<wire x1="3.81" y1="0" x2="3.81" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="3.175" y1="-2.921" x2="1.905" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="0.635" y1="-2.921" x2="-0.635" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="-0.635" y1="-2.921" x2="-1.27" y2="-2.921" width="0.127" layer="21"/>
+<wire x1="-3.556" y1="-2.921" x2="-3.175" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="-3.175" y1="-2.921" x2="-3.175" y2="-2.286" width="0.254" layer="21"/>
+<wire x1="-3.175" y1="-2.286" x2="-1.905" y2="-2.286" width="0.254" layer="21"/>
+<wire x1="-1.905" y1="-2.286" x2="-1.905" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="-1.905" y1="-2.921" x2="-3.175" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="-1.905" y1="-2.921" x2="-0.635" y2="-2.921" width="0.254" layer="21"/>
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+<wire x1="-0.635" y1="-2.286" x2="0.635" y2="-2.286" width="0.254" layer="21"/>
+<wire x1="0.635" y1="-2.286" x2="0.635" y2="-2.921" width="0.254" layer="21"/>
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+<wire x1="1.905" y1="-2.921" x2="1.905" y2="-2.286" width="0.254" layer="21"/>
+<wire x1="1.905" y1="-2.286" x2="3.175" y2="-2.286" width="0.254" layer="21"/>
+<wire x1="3.175" y1="-2.286" x2="3.175" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="3.175" y1="-2.921" x2="3.81" y2="-2.921" width="0.254" layer="21"/>
+<wire x1="-2.54" y1="1.905" x2="-2.54" y2="2.921" width="0.254" layer="21"/>
+<wire x1="-2.54" y1="1.905" x2="-2.286" y2="1.905" width="0.254" layer="21"/>
+<wire x1="-2.286" y1="1.905" x2="2.286" y2="1.905" width="0.254" layer="21"/>
+<wire x1="2.286" y1="1.905" x2="2.54" y2="1.905" width="0.254" layer="21"/>
+<wire x1="2.54" y1="1.905" x2="2.54" y2="2.921" width="0.254" layer="21"/>
+<wire x1="-2.54" y1="1.905" x2="-2.286" y2="1.397" width="0.254" layer="21"/>
+<wire x1="-2.286" y1="2.921" x2="-2.286" y2="1.905" width="0.254" layer="21"/>
+<wire x1="-2.286" y1="1.397" x2="2.286" y2="1.397" width="0.254" layer="21"/>
+<wire x1="2.286" y1="1.397" x2="2.54" y2="1.905" width="0.254" layer="21"/>
+<wire x1="2.286" y1="2.921" x2="2.286" y2="1.905" width="0.254" layer="21"/>
+<pad name="3" x="-2.54" y="0" drill="1.016" shape="long" rot="R90"/>
+<pad name="2" x="0" y="0" drill="1.016" shape="long" rot="R90"/>
+<pad name="1" x="2.54" y="0" drill="1.016" shape="long" rot="R90"/>
+<text x="-3.7831" y="3.2751" size="1.016" layer="25" ratio="10">&gt;NAME</text>
+<text x="4.4181" y="-0.7381" size="1.27" layer="21" ratio="14">1</text>
+<text x="-4.9799" y="-0.6873" size="1.27" layer="21" ratio="14">3</text>
+<text x="-3.7831" y="-4.5989" size="0.8128" layer="27" ratio="10">&gt;VALUE</text>
+<rectangle x1="-2.794" y1="-0.254" x2="-2.286" y2="0.254" layer="51"/>
+<rectangle x1="-0.254" y1="-0.254" x2="0.254" y2="0.254" layer="51"/>
+<rectangle x1="2.286" y1="-0.254" x2="2.794" y2="0.254" layer="51"/>
+</package>
+</packages>
+</library>
+<library name="rcl">
+<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;
+Based on the previous libraries:
+&lt;ul&gt;
+&lt;li&gt;r.lbr
+&lt;li&gt;cap.lbr 
+&lt;li&gt;cap-fe.lbr
+&lt;li&gt;captant.lbr
+&lt;li&gt;polcap.lbr
+&lt;li&gt;ipc-smd.lbr
+&lt;/ul&gt;
+All SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;
+&lt;p&gt;
+for Electrolyt Capacitors see also :&lt;p&gt;
+www.bccomponents.com &lt;p&gt;
+www.panasonic.com&lt;p&gt;
+www.kemet.com&lt;p&gt;
+http://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf &lt;b&gt;(SANYO)&lt;/b&gt;
+&lt;p&gt;
+for trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;
+
+&lt;table border=0 cellspacing=0 cellpadding=0 width="100%" cellpaddding=0&gt;
+&lt;tr valign="top"&gt;
+
+&lt;! &lt;td width="10"&gt;&amp;nbsp;&lt;/td&gt;
+&lt;td width="90%"&gt;
+
+&lt;b&gt;&lt;font color="#0000FF" size="4"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;
+&lt;P&gt;
+&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;
+  &lt;TR&gt;
+    &lt;TD COLSPAN=8&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+  &lt;/TR&gt;
+  &lt;TR&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;BOURNS&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;DALE-VISHAY&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;PHILIPS/MEPCO&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
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+&lt;P&gt;&amp;nbsp;&lt;P&gt;
+&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3&gt;
+  &lt;TR&gt;
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+      EVM-1E&lt;BR&gt;
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+      DVR-43A&lt;BR&gt;
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+&lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;ALT =&amp;nbsp;ALTERNATE&lt;/B&gt;&lt;/FONT&gt;
+&lt;P&gt;
+
+&amp;nbsp;
+&lt;P&gt;
+&lt;/td&gt;
+&lt;/tr&gt;
+&lt;/table&gt;</description>
+<packages>
+<package name="C025-025X050">
+<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;
+grid 2.5 mm, outline 2.5 x 5 mm</description>
+<wire x1="-2.159" y1="1.27" x2="2.159" y2="1.27" width="0.1524" layer="21"/>
+<wire x1="2.159" y1="-1.27" x2="-2.159" y2="-1.27" width="0.1524" layer="21"/>
+<wire x1="2.413" y1="1.016" x2="2.413" y2="-1.016" width="0.1524" layer="21"/>
+<wire x1="-2.413" y1="1.016" x2="-2.413" y2="-1.016" width="0.1524" layer="21"/>
+<wire x1="2.159" y1="1.27" x2="2.413" y2="1.016" width="0.1524" layer="21" curve="-90"/>
+<wire x1="-2.413" y1="1.016" x2="-2.159" y2="1.27" width="0.1524" layer="21" curve="-90"/>
+<wire x1="2.159" y1="-1.27" x2="2.413" y2="-1.016" width="0.1524" layer="21" curve="90"/>
+<wire x1="-2.413" y1="-1.016" x2="-2.159" y2="-1.27" width="0.1524" layer="21" curve="90"/>
+<wire x1="0.762" y1="0" x2="0.381" y2="0" width="0.1524" layer="51"/>
+<wire x1="0.381" y1="0" x2="0.254" y2="0" width="0.1524" layer="21"/>
+<wire x1="0.254" y1="0" x2="0.254" y2="0.762" width="0.254" layer="21"/>
+<wire x1="0.254" y1="0" x2="0.254" y2="-0.762" width="0.254" layer="21"/>
+<wire x1="-0.254" y1="0.762" x2="-0.254" y2="0" width="0.254" layer="21"/>
+<wire x1="-0.254" y1="0" x2="-0.254" y2="-0.762" width="0.254" layer="21"/>
+<wire x1="-0.254" y1="0" x2="-0.381" y2="0" width="0.1524" layer="21"/>
+<wire x1="-0.381" y1="0" x2="-0.762" y2="0" width="0.1524" layer="51"/>
+<pad name="1" x="-1.27" y="0" drill="0.8128" shape="octagon"/>
+<pad name="2" x="1.27" y="0" drill="0.8128" shape="octagon"/>
+<text x="-2.286" y="1.524" size="1.27" layer="25" ratio="10">&gt;NAME</text>
+<text x="-2.286" y="-2.794" size="1.27" layer="27" ratio="10">&gt;VALUE</text>
+</package>
+</packages>
+</library>
+<library name="special">
+<description>&lt;b&gt;Special Devices&lt;/b&gt;&lt;p&gt;
+7-segment displays, switches, heatsinks, crystals, transformers, etc.&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="QS">
+<description>&lt;B&gt;CRYSTAL&lt;/B&gt;</description>
+<wire x1="-3.429" y1="-2.286" x2="3.429" y2="-2.286" width="0.1524" layer="21"/>
+<wire x1="3.429" y1="2.286" x2="-3.429" y2="2.286" width="0.1524" layer="21"/>
+<wire x1="-3.429" y1="-1.778" x2="3.429" y2="-1.778" width="0.0508" layer="21"/>
+<wire x1="3.429" y1="1.778" x2="-3.429" y2="1.778" width="0.0508" layer="21"/>
+<wire x1="3.429" y1="1.778" x2="3.429" y2="-1.778" width="0.0508" layer="21" curve="-180"/>
+<wire x1="3.429" y1="2.286" x2="3.429" y2="-2.286" width="0.1524" layer="21" curve="-180"/>
+<wire x1="-3.429" y1="2.286" x2="-3.429" y2="-2.286" width="0.1524" layer="21" curve="180"/>
+<wire x1="-3.429" y1="1.778" x2="-3.429" y2="-1.778" width="0.0508" layer="21" curve="180"/>
+<pad name="1" x="-2.54" y="0" drill="0.6096" shape="long" rot="R90"/>
+<pad name="2" x="2.54" y="0" drill="0.6096" shape="long" rot="R90"/>
+<text x="-5.08" y="-3.937" size="1.27" layer="27" ratio="10">&gt;VALUE</text>
+<text x="-5.08" y="2.667" size="1.27" layer="25" ratio="10">&gt;NAME</text>
+</package>
+</packages>
+</library>
+<library name="switch-omron">
+<description>&lt;b&gt;Omron Switches&lt;/b&gt;&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="B3F-10XX">
+<description>&lt;b&gt;OMRON SWITCH&lt;/b&gt;</description>
+<wire x1="3.302" y1="-0.762" x2="3.048" y2="-0.762" width="0.1524" layer="21"/>
+<wire x1="3.302" y1="-0.762" x2="3.302" y2="0.762" width="0.1524" layer="21"/>
+<wire x1="3.048" y1="0.762" x2="3.302" y2="0.762" width="0.1524" layer="21"/>
+<wire x1="3.048" y1="1.016" x2="3.048" y2="2.54" width="0.1524" layer="51"/>
+<wire x1="-3.302" y1="0.762" x2="-3.048" y2="0.762" width="0.1524" layer="21"/>
+<wire x1="-3.302" y1="0.762" x2="-3.302" y2="-0.762" width="0.1524" layer="21"/>
+<wire x1="-3.048" y1="-0.762" x2="-3.302" y2="-0.762" width="0.1524" layer="21"/>
+<wire x1="3.048" y1="2.54" x2="2.54" y2="3.048" width="0.1524" layer="51"/>
+<wire x1="2.54" y1="-3.048" x2="3.048" y2="-2.54" width="0.1524" layer="51"/>
+<wire x1="3.048" y1="-2.54" x2="3.048" y2="-1.016" width="0.1524" layer="51"/>
+<wire x1="-2.54" y1="3.048" x2="-3.048" y2="2.54" width="0.1524" layer="51"/>
+<wire x1="-3.048" y1="2.54" x2="-3.048" y2="1.016" width="0.1524" layer="51"/>
+<wire x1="-2.54" y1="-3.048" x2="-3.048" y2="-2.54" width="0.1524" layer="51"/>
+<wire x1="-3.048" y1="-2.54" x2="-3.048" y2="-1.016" width="0.1524" layer="51"/>
+<wire x1="-1.27" y1="1.27" x2="-1.27" y2="-1.27" width="0.0508" layer="51"/>
+<wire x1="1.27" y1="-1.27" x2="-1.27" y2="-1.27" width="0.0508" layer="51"/>
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+<wire x1="-1.27" y1="1.27" x2="1.27" y2="1.27" width="0.0508" layer="51"/>
+<wire x1="-1.27" y1="3.048" x2="-1.27" y2="2.794" width="0.0508" layer="21"/>
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+<wire x1="-1.27" y1="-2.159" x2="1.27" y2="-2.159" width="0.1524" layer="51"/>
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+<wire x1="-2.413" y1="1.27" x2="-2.413" y2="0.508" width="0.1524" layer="51"/>
+<wire x1="-2.413" y1="-0.508" x2="-2.413" y2="-1.27" width="0.1524" layer="51"/>
+<wire x1="-2.413" y1="0.508" x2="-2.159" y2="-0.381" width="0.1524" layer="51"/>
+<circle x="0" y="0" radius="1.778" width="0.1524" layer="21"/>
+<circle x="-2.159" y="-2.159" radius="0.508" width="0.1524" layer="51"/>
+<circle x="2.159" y="-2.032" radius="0.508" width="0.1524" layer="51"/>
+<circle x="2.159" y="2.159" radius="0.508" width="0.1524" layer="51"/>
+<circle x="-2.159" y="2.159" radius="0.508" width="0.1524" layer="51"/>
+<circle x="0" y="0" radius="0.635" width="0.0508" layer="51"/>
+<circle x="0" y="0" radius="0.254" width="0.1524" layer="21"/>
+<pad name="1" x="-3.2512" y="2.2606" drill="1.016" shape="long"/>
+<pad name="3" x="-3.2512" y="-2.2606" drill="1.016" shape="long"/>
+<pad name="2" x="3.2512" y="2.2606" drill="1.016" shape="long"/>
+<pad name="4" x="3.2512" y="-2.2606" drill="1.016" shape="long"/>
+<text x="-3.048" y="3.683" size="1.27" layer="25" ratio="10">&gt;NAME</text>
+<text x="-3.048" y="-5.08" size="1.27" layer="27" ratio="10">&gt;VALUE</text>
+<text x="-4.318" y="1.651" size="1.27" layer="51" ratio="10">1</text>
+<text x="3.556" y="1.524" size="1.27" layer="51" ratio="10">2</text>
+<text x="-4.572" y="-2.794" size="1.27" layer="51" ratio="10">3</text>
+<text x="3.556" y="-2.794" size="1.27" layer="51" ratio="10">4</text>
+</package>
+</packages>
+</library>
+<library name="adafruit">
+<packages>
+<package name="06132">
+<wire x1="-13.2" y1="-25.1" x2="-13.2" y2="0" width="0.127" layer="21"/>
+<wire x1="-13.2" y1="0" x2="10.6" y2="0" width="0.127" layer="21"/>
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+<wire x1="13.3" y1="-25.1" x2="12.2" y2="-25.1" width="0.127" layer="21"/>
+<wire x1="12.2" y1="-25.1" x2="-12.3" y2="-25.1" width="0.127" layer="21"/>
+<wire x1="-12.3" y1="-25.1" x2="-13.2" y2="-25.1" width="0.127" layer="21"/>
+<wire x1="-12.4" y1="-24.8" x2="12" y2="-25" width="0.127" layer="21" curve="-27.095878"/>
+<wire x1="-12.4" y1="-24.8" x2="-12.3" y2="-25.1" width="0.127" layer="21"/>
+<wire x1="12" y1="-25" x2="12.2" y2="-25.1" width="0.127" layer="21"/>
+<smd name="GP" x="-13.8" y="-21.8" dx="2.8" dy="2" layer="1" rot="R90"/>
+<smd name="GP2" x="14.1" y="-21.8" dx="2.8" dy="2" layer="1" rot="R90"/>
+<smd name="GP4" x="-13.9" y="-1" dx="2.8" dy="2" layer="1" rot="R90"/>
+<smd name="WP" x="-12.2" y="0.9" dx="4" dy="0.7" layer="1" rot="R90"/>
+<smd name="8" x="-9.7" y="0.9" dx="4" dy="0.7" layer="1" rot="R90"/>
+<smd name="7" x="-8.1" y="0.9" dx="4" dy="1.2" layer="1" rot="R90"/>
+<smd name="6" x="-5.6" y="0.9" dx="4" dy="1.2" layer="1" rot="R90"/>
+<smd name="5" x="-3.1" y="0.9" dx="4" dy="1.2" layer="1" rot="R90"/>
+<smd name="2" x="4.4" y="0.9" dx="4" dy="1.2" layer="1" rot="R90"/>
+<smd name="4" x="-0.6" y="0.9" dx="4" dy="1.2" layer="1" rot="R90"/>
+<smd name="1" x="6.9" y="0.9" dx="4" dy="1.2" layer="1" rot="R90"/>
+<smd name="3" x="1.9" y="0.9" dx="4" dy="1.2" layer="1" rot="R90"/>
+<smd name="9" x="9.4" y="0.9" dx="4" dy="1.2" layer="1" rot="R90"/>
+<smd name="CD" x="-11" y="0.9" dx="4" dy="0.7" layer="1" rot="R90"/>
+<smd name="GP3" x="11.7" y="-0.9" dx="2.8" dy="2" layer="1" rot="R90"/>
+<hole x="-11.6" y="-2.1" drill="1.1"/>
+<hole x="9.5" y="-2.1" drill="1.6"/>
+</package>
+<package name="1X03">
+<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>
+<wire x1="-3.175" y1="1.27" x2="-1.905" y2="1.27" width="0.1524" layer="21"/>
+<wire x1="-1.905" y1="1.27" x2="-1.27" y2="0.635" width="0.1524" layer="21"/>
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+<wire x1="1.27" y1="0.635" x2="1.27" y2="-0.635" width="0.1524" layer="21"/>
+<wire x1="1.27" y1="-0.635" x2="0.635" y2="-1.27" width="0.1524" layer="21"/>
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+<wire x1="-3.81" y1="-0.635" x2="-3.175" y2="-1.27" width="0.1524" layer="21"/>
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+<wire x1="1.905" y1="1.27" x2="3.175" y2="1.27" width="0.1524" layer="21"/>
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+<wire x1="3.81" y1="-0.635" x2="3.175" y2="-1.27" width="0.1524" layer="21"/>
+<wire x1="3.175" y1="-1.27" x2="1.905" y2="-1.27" width="0.1524" layer="21"/>
+<wire x1="1.905" y1="-1.27" x2="1.27" y2="-0.635" width="0.1524" layer="21"/>
+<pad name="1" x="-2.54" y="0" drill="1.016" rot="R90"/>
+<pad name="2" x="0" y="0" drill="1.016" rot="R90"/>
+<pad name="3" x="2.54" y="0" drill="1.016" rot="R90"/>
+<text x="-3.8862" y="1.8288" size="1.27" layer="25" ratio="10">&gt;NAME</text>
+<text x="-3.81" y="-3.175" size="1.27" layer="27">&gt;VALUE</text>
+<rectangle x1="-0.254" y1="-0.254" x2="0.254" y2="0.254" layer="51"/>
+<rectangle x1="-2.794" y1="-0.254" x2="-2.286" y2="0.254" layer="51"/>
+<rectangle x1="2.286" y1="-0.254" x2="2.794" y2="0.254" layer="51"/>
+</package>
+</packages>
+</library>
+<library name="MyCustomLibrary">
+<packages>
+<package name="LM1117T">
+<description>&lt;b&gt;VOLTAGE REGULATOR&lt;/b&gt;</description>
+<wire x1="4.826" y1="-4.318" x2="5.08" y2="-4.064" width="0.1524" layer="21"/>
+<wire x1="4.826" y1="-4.318" x2="-4.826" y2="-4.318" width="0.1524" layer="21"/>
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+<wire x1="5.08" y1="-1.143" x2="5.08" y2="-4.064" width="0.1524" layer="21"/>
+<wire x1="-5.08" y1="-4.064" x2="-5.08" y2="-1.143" width="0.1524" layer="21"/>
+<circle x="-4.6228" y="-3.7084" radius="0.254" width="0" layer="21"/>
+<pad name="IN" x="-2.54" y="-2.54" drill="1.016" shape="long" rot="R90"/>
+<pad name="GND" x="0" y="-2.54" drill="1.016" shape="long" rot="R90"/>
+<pad name="OUT" x="2.54" y="-2.54" drill="1.016" shape="long" rot="R90"/>
+<text x="-5.08" y="-6.0452" size="1.27" layer="25" ratio="10">&gt;NAME</text>
+<text x="-5.08" y="-7.62" size="1.27" layer="27" ratio="10">&gt;VALUE</text>
+<text x="-0.635" y="-3.81" size="1.27" layer="51" ratio="10">-</text>
+<text x="-3.175" y="-3.81" size="1.27" layer="51" ratio="10">I</text>
+<text x="1.905" y="-3.81" size="1.27" layer="51" ratio="10">O</text>
+<rectangle x1="-5.334" y1="-1.27" x2="-3.429" y2="0" layer="21"/>
+<rectangle x1="-3.429" y1="-0.762" x2="-1.651" y2="0" layer="21"/>
+<rectangle x1="-1.651" y1="-1.27" x2="-0.889" y2="0" layer="21"/>
+<rectangle x1="-0.889" y1="-0.762" x2="0.889" y2="0" layer="21"/>
+<rectangle x1="0.889" y1="-1.27" x2="1.651" y2="0" layer="21"/>
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+<rectangle x1="3.429" y1="-1.27" x2="5.334" y2="0" layer="21"/>
+<rectangle x1="-3.429" y1="-1.27" x2="-1.651" y2="-0.762" layer="51"/>
+<rectangle x1="-0.889" y1="-1.27" x2="0.889" y2="-0.762" layer="51"/>
+<rectangle x1="1.651" y1="-1.27" x2="3.429" y2="-0.762" layer="51"/>
+</package>
+</packages>
+</library>
+</libraries>
+<attributes>
+</attributes>
+<variantdefs>
+</variantdefs>
+<classes>
+<class number="0" name="default" width="0" drill="0">
+</class>
+</classes>
+<designrules name="default *">
+<description language="de">&lt;b&gt;EAGLE Design Rules&lt;/b&gt;
+&lt;p&gt;
+Die Standard-Design-Rules sind so gewählt, dass sie für 
+die meisten Anwendungen passen. Sollte ihre Platine 
+besondere Anforderungen haben, treffen Sie die erforderlichen
+Einstellungen hier und speichern die Design Rules unter 
+einem neuen Namen ab.</description>
+<description language="en">&lt;b&gt;EAGLE Design Rules&lt;/b&gt;
+&lt;p&gt;
+The default Design Rules have been set to cover
+a wide range of applications. Your particular design
+may have different requirements, so please make the
+necessary adjustments and save your customized
+design rules under a new name.</description>
+<param name="layerSetup" value="(1*16)"/>
+<param name="mtCopper" value="0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm"/>
+<param name="mtIsolate" value="1.5mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm"/>
+<param name="mdWireWire" value="8mil"/>
+<param name="mdWirePad" value="8mil"/>
+<param name="mdWireVia" value="8mil"/>
+<param name="mdPadPad" value="8mil"/>
+<param name="mdPadVia" value="8mil"/>
+<param name="mdViaVia" value="8mil"/>
+<param name="mdSmdPad" value="8mil"/>
+<param name="mdSmdVia" value="8mil"/>
+<param name="mdSmdSmd" value="8mil"/>
+<param name="mdViaViaSameLayer" value="8mil"/>
+<param name="mnLayersViaInSmd" value="2"/>
+<param name="mdCopperDimension" value="40mil"/>
+<param name="mdDrill" value="8mil"/>
+<param name="mdSmdStop" value="0mil"/>
+<param name="msWidth" value="10mil"/>
+<param name="msDrill" value="24mil"/>
+<param name="msMicroVia" value="9.99mm"/>
+<param name="msBlindViaRatio" value="0.5"/>
+<param name="rvPadTop" value="0.25"/>
+<param name="rvPadInner" value="0.25"/>
+<param name="rvPadBottom" value="0.25"/>
+<param name="rvViaOuter" value="0.25"/>
+<param name="rvViaInner" value="0.25"/>
+<param name="rvMicroViaOuter" value="0.25"/>
+<param name="rvMicroViaInner" value="0.25"/>
+<param name="rlMinPadTop" value="10mil"/>
+<param name="rlMaxPadTop" value="20mil"/>
+<param name="rlMinPadInner" value="10mil"/>
+<param name="rlMaxPadInner" value="20mil"/>
+<param name="rlMinPadBottom" value="10mil"/>
+<param name="rlMaxPadBottom" value="20mil"/>
+<param name="rlMinViaOuter" value="8mil"/>
+<param name="rlMaxViaOuter" value="20mil"/>
+<param name="rlMinViaInner" value="8mil"/>
+<param name="rlMaxViaInner" value="20mil"/>
+<param name="rlMinMicroViaOuter" value="4mil"/>
+<param name="rlMaxMicroViaOuter" value="20mil"/>
+<param name="rlMinMicroViaInner" value="4mil"/>
+<param name="rlMaxMicroViaInner" value="20mil"/>
+<param name="psTop" value="-1"/>
+<param name="psBottom" value="-1"/>
+<param name="psFirst" value="-1"/>
+<param name="psElongationLong" value="100"/>
+<param name="psElongationOffset" value="100"/>
+<param name="mvStopFrame" value="1"/>
+<param name="mvCreamFrame" value="0"/>
+<param name="mlMinStopFrame" value="4mil"/>
+<param name="mlMaxStopFrame" value="4mil"/>
+<param name="mlMinCreamFrame" value="0mil"/>
+<param name="mlMaxCreamFrame" value="0mil"/>
+<param name="mlViaStopLimit" value="0mil"/>
+<param name="srRoundness" value="0"/>
+<param name="srMinRoundness" value="0mil"/>
+<param name="srMaxRoundness" value="0mil"/>
+<param name="slThermalIsolate" value="10mil"/>
+<param name="slThermalsForVias" value="0"/>
+<param name="dpMaxLengthDifference" value="10mm"/>
+<param name="dpGapFactor" value="2.5"/>
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+<param name="checkFont" value="1"/>
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+<param name="useDiameter" value="13"/>
+<param name="maxErrors" value="50"/>
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+<param name="tpViaShape" value="round"/>
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+</signal>
+<signal name="N$22">
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+<contactref element="IC1" pad="35"/>
+<contactref element="DISK2" pad="3"/>
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+<wire x1="16.9037" y1="46.0756" x2="16.8275" y2="46.0375" width="0" layer="19" extent="16-16"/>
+</signal>
+</signals>
+</board>
+</drawing>
+</eagle>
diff --git a/trunk/AVRProjects/sd2iec/larsp/SD2IEC v1.2 LM1117T.png b/trunk/AVRProjects/sd2iec/larsp/SD2IEC v1.2 LM1117T.png
new file mode 100644
index 00000000..ef3b7ff8
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/larsp/SD2IEC v1.2 LM1117T.png differ
diff --git a/trunk/AVRProjects/sd2iec/larsp/SD2IEC v1.2 LM1117T.sch b/trunk/AVRProjects/sd2iec/larsp/SD2IEC v1.2 LM1117T.sch
new file mode 100644
index 00000000..96d7c29a
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/larsp/SD2IEC v1.2 LM1117T.sch	
@@ -0,0 +1,17385 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!DOCTYPE eagle SYSTEM "eagle.dtd">
+<eagle version="6.4">
+<drawing>
+<settings>
+<setting alwaysvectorfont="no"/>
+<setting verticaltext="up"/>
+</settings>
+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/>
+<layers>
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+<layer number="254" name="cooling" color="7" fill="1" visible="yes" active="yes"/>
+</layers>
+<schematic xreflabel="%F%N/%S.%C%R" xrefpart="/%S.%C%R">
+<libraries>
+<library name="atmel">
+<description>&lt;b&gt;AVR Devices&lt;/b&gt;&lt;p&gt;
+Configurable logic, microcontrollers, nonvolatile memories&lt;p&gt;
+Based on the following sources:&lt;p&gt;
+&lt;ul&gt;
+&lt;li&gt;www.atmel.com
+&lt;li&gt;CD-ROM : Configurable Logic Microcontroller Nonvolatile Memory
+&lt;li&gt;CadSoft download site, www.cadsoft.de or www.cadsoftusa.com , file at90smcu_v400.zip
+&lt;li&gt;avr.lbr
+&lt;/ul&gt;
+&lt;author&gt;Revised by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="DIL40">
+<description>&lt;B&gt;Dual In Line&lt;/B&gt;</description>
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+<text x="-21.59" y="-2.2352" size="1.778" layer="27" ratio="10">&gt;VALUE</text>
+</package>
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+<pin name="VCC" x="-30.48" y="0" length="short" direction="pwr"/>
+<pin name="GND" x="-30.48" y="-2.54" length="short" direction="pwr"/>
+<pin name="XTAL2" x="-30.48" y="-5.08" length="short" direction="out"/>
+<pin name="XTAL1" x="-30.48" y="-7.62" length="short" direction="in"/>
+<pin name="PCINT24/RXD0_PD0" x="-30.48" y="-10.16" length="short"/>
+<pin name="PCINT25/TXD0_PD1" x="-30.48" y="-12.7" length="short"/>
+<pin name="PCINT26/INT0_PD2" x="-30.48" y="-15.24" length="short"/>
+<pin name="PCINT27/INT1_PD3" x="-30.48" y="-17.78" length="short"/>
+<pin name="PCINT28/OC1B_PD4" x="-30.48" y="-20.32" length="short"/>
+<pin name="PCINT29/OC1A_PD5" x="-30.48" y="-22.86" length="short"/>
+<pin name="PCINT30/OC2B/ICP_PD6" x="-30.48" y="-25.4" length="short"/>
+<pin name="PCINT31/OC2A_PD7" x="30.48" y="-25.4" length="short" rot="R180"/>
+<pin name="PCINT16/SCL_PC0" x="30.48" y="-22.86" length="short" rot="R180"/>
+<pin name="PCINT17/SDA_PC1" x="30.48" y="-20.32" length="short" rot="R180"/>
+<pin name="PCINT18/TCK_PC2" x="30.48" y="-17.78" length="short" rot="R180"/>
+<pin name="PCINT19/TMS_PC3" x="30.48" y="-15.24" length="short" rot="R180"/>
+<pin name="PCINT20/TDO_PC4" x="30.48" y="-12.7" length="short" rot="R180"/>
+<pin name="PCINT21/TDI_PC5" x="30.48" y="-10.16" length="short" rot="R180"/>
+<pin name="PCINT22/TOSC1_PC6" x="30.48" y="-7.62" length="short" rot="R180"/>
+<pin name="PCINT23/TOSC2_PC7" x="30.48" y="-5.08" length="short" rot="R180"/>
+<pin name="AVCC" x="30.48" y="-2.54" length="short" direction="pwr" rot="R180"/>
+<pin name="GND@1" x="30.48" y="0" length="short" direction="pwr" rot="R180"/>
+<pin name="AREF" x="30.48" y="2.54" length="short" direction="pas" rot="R180"/>
+<pin name="PCINT7/ADC7_PA7" x="30.48" y="5.08" length="short" rot="R180"/>
+<pin name="PCINT6/ADC6_PA6" x="30.48" y="7.62" length="short" rot="R180"/>
+<pin name="PCINT5/ADC5_PA5" x="30.48" y="10.16" length="short" rot="R180"/>
+<pin name="PCINT4/ADC4_PA4" x="30.48" y="12.7" length="short" rot="R180"/>
+<pin name="PCINT3/ADC3_PA3" x="30.48" y="15.24" length="short" rot="R180"/>
+<pin name="PCINT2/ADC2_PA2" x="30.48" y="17.78" length="short" rot="R180"/>
+<pin name="PCINT1/ADC1_PA1" x="30.48" y="20.32" length="short" rot="R180"/>
+<pin name="PCINT0/ADC0_PA0" x="30.48" y="22.86" length="short" rot="R180"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="ATMEGA644-*PU" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 64K Bytes In-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Auto generated by &lt;i&gt;make-symbol-device-package-bsdl.ulp Rev. 34&lt;/i&gt;&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2593.pdf</description>
+<gates>
+<gate name="G$1" symbol="ATMEGA644-20PU" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="!RESET" pad="9"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="GND@1" pad="31"/>
+<connect gate="G$1" pin="PCINT0/ADC0_PA0" pad="40"/>
+<connect gate="G$1" pin="PCINT1/ADC1_PA1" pad="39"/>
+<connect gate="G$1" pin="PCINT10/INT2/AIN0_PB2" pad="3"/>
+<connect gate="G$1" pin="PCINT11/OC0A/AIN1_PB3" pad="4"/>
+<connect gate="G$1" pin="PCINT12/OC0B/SS_PB4" pad="5"/>
+<connect gate="G$1" pin="PCINT13/MOSI_PB5" pad="6"/>
+<connect gate="G$1" pin="PCINT14/MISO_PB6" pad="7"/>
+<connect gate="G$1" pin="PCINT15/SCK_PB7" pad="8"/>
+<connect gate="G$1" pin="PCINT16/SCL_PC0" pad="22"/>
+<connect gate="G$1" pin="PCINT17/SDA_PC1" pad="23"/>
+<connect gate="G$1" pin="PCINT18/TCK_PC2" pad="24"/>
+<connect gate="G$1" pin="PCINT19/TMS_PC3" pad="25"/>
+<connect gate="G$1" pin="PCINT2/ADC2_PA2" pad="38"/>
+<connect gate="G$1" pin="PCINT20/TDO_PC4" pad="26"/>
+<connect gate="G$1" pin="PCINT21/TDI_PC5" pad="27"/>
+<connect gate="G$1" pin="PCINT22/TOSC1_PC6" pad="28"/>
+<connect gate="G$1" pin="PCINT23/TOSC2_PC7" pad="29"/>
+<connect gate="G$1" pin="PCINT24/RXD0_PD0" pad="14"/>
+<connect gate="G$1" pin="PCINT25/TXD0_PD1" pad="15"/>
+<connect gate="G$1" pin="PCINT26/INT0_PD2" pad="16"/>
+<connect gate="G$1" pin="PCINT27/INT1_PD3" pad="17"/>
+<connect gate="G$1" pin="PCINT28/OC1B_PD4" pad="18"/>
+<connect gate="G$1" pin="PCINT29/OC1A_PD5" pad="19"/>
+<connect gate="G$1" pin="PCINT3/ADC3_PA3" pad="37"/>
+<connect gate="G$1" pin="PCINT30/OC2B/ICP_PD6" pad="20"/>
+<connect gate="G$1" pin="PCINT31/OC2A_PD7" pad="21"/>
+<connect gate="G$1" pin="PCINT4/ADC4_PA4" pad="36"/>
+<connect gate="G$1" pin="PCINT5/ADC5_PA5" pad="35"/>
+<connect gate="G$1" pin="PCINT6/ADC6_PA6" pad="34"/>
+<connect gate="G$1" pin="PCINT7/ADC7_PA7" pad="33"/>
+<connect gate="G$1" pin="PCINT8/XCK0/T0_PB0" pad="1"/>
+<connect gate="G$1" pin="PCINT9/CLKO/T1_PB1" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644V-10PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288342" constant="no"/>
+<attribute name="OC_NEWARK" value="23M5062" constant="no"/>
+</technology>
+<technology name="20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644-20PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288340" constant="no"/>
+<attribute name="OC_NEWARK" value="23M5060" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="resistor">
+<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;
+Based on the previous libraries:
+&lt;ul&gt;
+&lt;li&gt;r.lbr
+&lt;li&gt;cap.lbr 
+&lt;li&gt;cap-fe.lbr
+&lt;li&gt;captant.lbr
+&lt;li&gt;polcap.lbr
+&lt;li&gt;ipc-smd.lbr
+&lt;/ul&gt;
+All SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;
+&lt;p&gt;
+for Electrolyt Capacitors see also :&lt;p&gt;
+www.bccomponents.com &lt;p&gt;
+www.panasonic.com&lt;p&gt;
+www.kemet.com&lt;p&gt;
+&lt;p&gt;
+for trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;
+
+&lt;map name="nav_main"&gt;
+&lt;area shape="rect" coords="0,1,140,23" href="../military_specs.asp" title=""&gt;
+&lt;area shape="rect" coords="0,24,140,51" href="../about.asp" title=""&gt;
+&lt;area shape="rect" coords="1,52,140,77" href="../rfq.asp" title=""&gt;
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+&lt;area shape="default" nohref&gt;
+&lt;/map&gt;
+
+&lt;html&gt;
+
+&lt;title&gt;&lt;/title&gt;
+
+ &lt;LINK REL="StyleSheet" TYPE="text/css" HREF="style-sheet.css"&gt;
+
+&lt;body bgcolor="#ffffff" text="#000000" marginwidth="0" marginheight="0" topmargin="0" leftmargin="0"&gt;
+&lt;table border=0 cellspacing=0 cellpadding=0 width="100%" cellpaddding=0 height="55%"&gt;
+&lt;tr valign="top"&gt;
+
+&lt;/td&gt;
+&lt;! &lt;td width="10"&gt;&amp;nbsp;&lt;/td&gt;
+&lt;td width="90%"&gt;
+
+&lt;b&gt;&lt;font color="#0000FF" size="4"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;
+&lt;P&gt;
+&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;
+  &lt;TR&gt;
+    &lt;TD COLSPAN=8&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
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+  &lt;TR&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;BOURNS&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;DALE-VISHAY&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;PHILIPS/MEPCO&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;MURATA&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;PANASONIC&lt;/FONT&gt;
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+      &lt;B&gt;
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+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;MILSPEC&lt;/FONT&gt;
+      &lt;/B&gt;
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+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
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+<package name="MINI_MELF-0204W">
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+<package name="MINI_MELF-0207R">
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+<package name="MINI_MELF-0207W">
+<description>&lt;b&gt;CECC Size RC6123&lt;/b&gt; Wave Soldering&lt;p&gt;
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+<connect gate="G$1" pin="2" pad="2"/>
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+<device name="050-030X075" package="C050-030X075">
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+<device name="050-050X075" package="C050-050X075">
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+<device name="050-055X075" package="C050-055X075">
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+<technology name=""/>
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+<device name="050-075X075" package="C050-075X075">
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+<connect gate="G$1" pin="1" pad="1"/>
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+<technology name=""/>
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+<device name="050H075X075" package="C050H075X075">
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+<connect gate="G$1" pin="1" pad="1"/>
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+<technologies>
+<technology name=""/>
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+</device>
+<device name="075-032X103" package="C075-032X103">
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+<connect gate="G$1" pin="1" pad="1"/>
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+<technology name=""/>
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+</device>
+<device name="075-042X103" package="C075-042X103">
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+<connect gate="G$1" pin="1" pad="1"/>
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+<technology name=""/>
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+<device name="075-052X106" package="C075-052X106">
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+<connect gate="G$1" pin="1" pad="1"/>
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+<technology name=""/>
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+</device>
+<device name="102-043X133" package="C102-043X133">
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+<connect gate="G$1" pin="1" pad="1"/>
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+<technologies>
+<technology name=""/>
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+</device>
+<device name="102-054X133" package="C102-054X133">
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+<connect gate="G$1" pin="1" pad="1"/>
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+<technologies>
+<technology name=""/>
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+</device>
+<device name="102-064X133" package="C102-064X133">
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+<connect gate="G$1" pin="1" pad="1"/>
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+<technology name=""/>
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+</device>
+<device name="102_152-062X184" package="C102_152-062X184">
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+<connect gate="G$1" pin="1" pad="1"/>
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+<technology name=""/>
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+<device name="150-054X183" package="C150-054X183">
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+<connect gate="G$1" pin="1" pad="1"/>
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+<technology name=""/>
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+<device name="150-064X183" package="C150-064X183">
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+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
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+<technologies>
+<technology name=""/>
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+</device>
+<device name="150-072X183" package="C150-072X183">
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+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
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+<technologies>
+<technology name=""/>
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+</device>
+<device name="150-084X183" package="C150-084X183">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
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+<technologies>
+<technology name=""/>
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+</device>
+<device name="150-091X182" package="C150-091X182">
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+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
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+<technologies>
+<technology name=""/>
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+</device>
+<device name="225-062X268" package="C225-062X268">
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+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
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+<technologies>
+<technology name=""/>
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+</device>
+<device name="225-074X268" package="C225-074X268">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
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+<technologies>
+<technology name=""/>
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+</device>
+<device name="225-087X268" package="C225-087X268">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
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+<technologies>
+<technology name=""/>
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+</device>
+<device name="225-108X268" package="C225-108X268">
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+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
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+<technologies>
+<technology name=""/>
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+</device>
+<device name="225-113X268" package="C225-113X268">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
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+<device name="275-093X316" package="C275-093X316">
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+<connect gate="G$1" pin="1" pad="1"/>
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+<device name="275-113X316" package="C275-113X316">
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+<connect gate="G$1" pin="1" pad="1"/>
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+<technology name=""/>
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+<device name="275-134X316" package="C275-134X316">
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+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
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+<technology name=""/>
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+<device name="275-205X316" package="C275-205X316">
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+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
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+<technologies>
+<technology name=""/>
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+</device>
+<device name="325-137X374" package="C325-137X374">
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+<connect gate="G$1" pin="1" pad="1"/>
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+<technology name=""/>
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+</device>
+<device name="325-162X374" package="C325-162X374">
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+<connect gate="G$1" pin="1" pad="1"/>
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+<technology name=""/>
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+</device>
+<device name="325-182X374" package="C325-182X374">
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+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
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+<technologies>
+<technology name=""/>
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+</device>
+<device name="375-192X418" package="C375-192X418">
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+<connect gate="G$1" pin="1" pad="1"/>
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+<device name="375-203X418" package="C375-203X418">
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+<connect gate="G$1" pin="1" pad="1"/>
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+<device name="050-035X075" package="C050-035X075">
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+<connect gate="G$1" pin="1" pad="1"/>
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+<device name="375-155X418" package="C375-155X418">
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+<device name="075-063X106" package="C075-063X106">
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+<device name="275-173X316" package="C275-173X316">
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+</device>
+<device name="C0402K" package="C0402K">
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+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
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+<technology name=""/>
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+</device>
+<device name="C0603K" package="C0603K">
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+<connect gate="G$1" pin="1" pad="1"/>
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+<device name="C0805K" package="C0805K">
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+<device name="C1206K" package="C1206K">
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+</devices>
+</deviceset>
+<deviceset name="CPOL-EU" prefix="C" uservalue="yes">
+<description>&lt;B&gt;POLARIZED CAPACITOR&lt;/B&gt;, European symbol</description>
+<gates>
+<gate name="G$1" symbol="CPOL" x="0" y="0"/>
+</gates>
+<devices>
+<device name="CT3216" package="CT3216">
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+<connect gate="G$1" pin="-" pad="-"/>
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+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
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+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
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+<connect gate="G$1" pin="-" pad="-"/>
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+<connect gate="G$1" pin="+" pad="+"/>
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+</device>
+<device name="P128-35" package="P128-35">
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+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
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+</device>
+<device name="P128-50" package="P128-50">
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+<device name="P128-60" package="P128-60">
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+<device name="TAP5-45" package="TAP5-45">
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+<connect gate="G$1" pin="-" pad="-"/>
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+<technology name=""/>
+</technologies>
+</device>
+<device name="E/7260-38R" package="E/7260-38R">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E/7260-38W" package="E/7260-38W">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="R/2012-12R" package="R/2012-12R">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
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+</device>
+<device name="R/2012-12W" package="R/2012-12W">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="A" package="PANASONIC_A">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="B" package="PANASONIC_B">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C" package="PANASONIC_C">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="D" package="PANASONIC_D">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
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+</device>
+<device name="E" package="PANASONIC_E">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
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+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="F" package="PANASONIC_F">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="G" package="PANASONIC_G">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="TT2D5L" package="TT2D5L">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
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+</device>
+<device name="E2,5-6E" package="E2,5-6E">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SMCA" package="SMC_A">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SMCZ" package="SMC_Z">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
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+<technologies>
+<technology name=""/>
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+</device>
+<device name="SMCP" package="SMC_P">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
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+<technology name=""/>
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+<device name="SMCB" package="SMC_B">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
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+<technology name=""/>
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+</device>
+<device name="SMCC" package="SMC_C">
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+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
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+<technology name=""/>
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+<device name="SMCD" package="SMC_D">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
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+<technology name=""/>
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+</device>
+<device name="SMCE" package="SMC_E">
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+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
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+<technologies>
+<technology name=""/>
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+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="led">
+<description>&lt;b&gt;LEDs&lt;/b&gt;&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;br&gt;
+Extended by Federico Battaglin &lt;author&gt;&amp;lt;federico.rd@fdpinternational.com&amp;gt;&lt;/author&gt; with DUOLED</description>
+<packages>
+<package name="1206">
+<description>&lt;b&gt;CHICAGO MINIATURE LAMP, INC.&lt;/b&gt;&lt;p&gt;
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+<package name="LED3MM">
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+<package name="LED5MM">
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+&lt;tr&gt;&lt;td&gt;SML10R3KH-TR&lt;/td&gt;&lt;td&gt;ULTRA RED&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;SML10E3KH-TR&lt;/td&gt;&lt;td&gt;SUPER REDSUPER BLUE&lt;/td&gt;&lt;/tr&gt;
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+&lt;tr&gt;&lt;td&gt;SML10BG3KH-TR&lt;/td&gt;&lt;td&gt;BLUE GREEN&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;SML10PB1KH-TR&lt;/td&gt;&lt;td&gt;SUPER BLUE&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;SML10CW1KH-TR&lt;/td&gt;&lt;td&gt;WHITE&lt;/td&gt;&lt;/tr&gt;
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+Source: http://www.ledtronics.com/ds/smd-1206/dstr0094.PDF</description>
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+&lt;tr&gt;&lt;td&gt;R1K&lt;/td&gt;&lt;td&gt;SUPER RED&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;R3K&lt;/td&gt;&lt;td&gt;ULTRA RED&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;O3K&lt;/td&gt;&lt;td&gt;SUPER ORANGE&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;O3KH&lt;/td&gt;&lt;td&gt;SOFT ORANGE&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;Y3KH&lt;/td&gt;&lt;td&gt;SUPER YELLOW&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;Y3K&lt;/td&gt;&lt;td&gt;SUPER YELLOW&lt;/td&gt;&lt;/tr&gt;
+&lt;tr&gt;&lt;td&gt;2CW&lt;/td&gt;&lt;td&gt;WHITE&lt;/td&gt;&lt;/tr&gt;
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+Source: http://www.ledtronics.com/ds/smd-0603/Dstr0092.pdf</description>
+<wire x1="-0.75" y1="0.35" x2="0.75" y2="0.35" width="0.1016" layer="51"/>
+<wire x1="0.75" y1="0.35" x2="0.75" y2="-0.35" width="0.1016" layer="51"/>
+<wire x1="0.75" y1="-0.35" x2="-0.75" y2="-0.35" width="0.1016" layer="51"/>
+<wire x1="-0.75" y1="-0.35" x2="-0.75" y2="0.35" width="0.1016" layer="51"/>
+<wire x1="-0.45" y1="0.3" x2="-0.45" y2="-0.3" width="0.1016" layer="51"/>
+<wire x1="0.45" y1="0.3" x2="0.45" y2="-0.3" width="0.1016" layer="51"/>
+<wire x1="-0.2" y1="0.35" x2="0.2" y2="0.35" width="0.1016" layer="21"/>
+<wire x1="-0.2" y1="-0.35" x2="0.2" y2="-0.35" width="0.1016" layer="21"/>
+<smd name="C" x="-0.75" y="0" dx="0.8" dy="0.8" layer="1"/>
+<smd name="A" x="0.75" y="0" dx="0.8" dy="0.8" layer="1"/>
+<text x="-1" y="1" size="1.27" layer="25">&gt;NAME</text>
+<text x="-1" y="-2" size="1.27" layer="27">&gt;VALUE</text>
+<rectangle x1="-0.4" y1="0.175" x2="0" y2="0.4" layer="51"/>
+<rectangle x1="-0.25" y1="0.175" x2="0" y2="0.4" layer="21"/>
+</package>
+</packages>
+<symbols>
+<symbol name="LED">
+<wire x1="1.27" y1="0" x2="0" y2="-2.54" width="0.254" layer="94"/>
+<wire x1="0" y1="-2.54" x2="-1.27" y2="0" width="0.254" layer="94"/>
+<wire x1="1.27" y1="-2.54" x2="0" y2="-2.54" width="0.254" layer="94"/>
+<wire x1="0" y1="-2.54" x2="-1.27" y2="-2.54" width="0.254" layer="94"/>
+<wire x1="1.27" y1="0" x2="0" y2="0" width="0.254" layer="94"/>
+<wire x1="0" y1="0" x2="-1.27" y2="0" width="0.254" layer="94"/>
+<wire x1="0" y1="0" x2="0" y2="-2.54" width="0.1524" layer="94"/>
+<wire x1="-2.032" y1="-0.762" x2="-3.429" y2="-2.159" width="0.1524" layer="94"/>
+<wire x1="-1.905" y1="-1.905" x2="-3.302" y2="-3.302" width="0.1524" layer="94"/>
+<text x="3.556" y="-4.572" size="1.778" layer="95" rot="R90">&gt;NAME</text>
+<text x="5.715" y="-4.572" size="1.778" layer="96" rot="R90">&gt;VALUE</text>
+<pin name="C" x="0" y="-5.08" visible="off" length="short" direction="pas" rot="R90"/>
+<pin name="A" x="0" y="2.54" visible="off" length="short" direction="pas" rot="R270"/>
+<polygon width="0.1524" layer="94">
+<vertex x="-3.429" y="-2.159"/>
+<vertex x="-3.048" y="-1.27"/>
+<vertex x="-2.54" y="-1.778"/>
+</polygon>
+<polygon width="0.1524" layer="94">
+<vertex x="-3.302" y="-3.302"/>
+<vertex x="-2.921" y="-2.413"/>
+<vertex x="-2.413" y="-2.921"/>
+</polygon>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="LED" prefix="LED" uservalue="yes">
+<description>&lt;b&gt;LED&lt;/b&gt;&lt;p&gt;
+&lt;u&gt;OSRAM&lt;/u&gt;:&lt;br&gt;
+
+- &lt;u&gt;CHIPLED&lt;/u&gt;&lt;br&gt;
+LG R971, LG N971, LY N971, LG Q971, LY Q971, LO R971, LY R971
+LH N974, LH R974&lt;br&gt;
+LS Q976, LO Q976, LY Q976&lt;br&gt;
+LO Q996&lt;br&gt;
+
+- &lt;u&gt;Hyper CHIPLED&lt;/u&gt;&lt;br&gt;
+LW Q18S&lt;br&gt;
+LB Q993, LB Q99A, LB R99A&lt;br&gt;
+
+- &lt;u&gt;SideLED&lt;/u&gt;&lt;br&gt;
+LS A670, LO A670, LY A670, LG A670, LP A670&lt;br&gt;
+LB A673, LV A673, LT A673, LW A673&lt;br&gt;
+LH A674&lt;br&gt;
+LY A675&lt;br&gt;
+LS A676, LA A676, LO A676, LY A676, LW A676&lt;br&gt;
+LS A679, LY A679, LG A679&lt;br&gt;
+
+-  &lt;u&gt;Hyper Micro SIDELED®&lt;/u&gt;&lt;br&gt;
+LS Y876, LA Y876, LO Y876, LY Y876&lt;br&gt;
+LT Y87S&lt;br&gt;
+
+- &lt;u&gt;SmartLED&lt;/u&gt;&lt;br&gt;
+LW L88C, LW L88S&lt;br&gt;
+LB L89C, LB L89S, LG L890&lt;br&gt;
+LS L89K, LO L89K, LY L89K&lt;br&gt;
+LS L896, LA L896, LO L896, LY L896&lt;br&gt;
+
+- &lt;u&gt;TOPLED&lt;/u&gt;&lt;br&gt;
+LS T670, LO T670, LY T670, LG T670, LP T670&lt;br&gt;
+LSG T670, LSP T670, LSY T670, LOP T670, LYG T670&lt;br&gt;
+LG T671, LOG T671, LSG T671&lt;br&gt;
+LB T673, LV T673, LT T673, LW T673&lt;br&gt;
+LH T674&lt;br&gt;
+LS T676, LA T676, LO T676, LY T676, LB T676, LH T676, LSB T676, LW T676&lt;br&gt;
+LB T67C, LV T67C, LT T67C, LS T67K, LO T67K, LY T67K, LW E67C&lt;br&gt;
+LS E67B, LA E67B, LO E67B, LY E67B, LB E67C, LV E67C, LT E67C&lt;br&gt;
+LW T67C&lt;br&gt;
+LS T679, LY T679, LG T679&lt;br&gt;
+LS T770, LO T770, LY T770, LG T770, LP T770&lt;br&gt;
+LB T773, LV T773, LT T773, LW T773&lt;br&gt;
+LH T774&lt;br&gt;
+LS E675, LA E675, LY E675, LS T675&lt;br&gt;
+LS T776, LA T776, LO T776, LY T776, LB T776&lt;br&gt;
+LHGB T686&lt;br&gt;
+LT T68C, LB T68C&lt;br&gt;
+
+- &lt;u&gt;Hyper Mini TOPLED®&lt;/u&gt;&lt;br&gt;
+LB M676&lt;br&gt;
+
+- &lt;u&gt;Mini TOPLED Santana®&lt;/u&gt;&lt;br&gt;
+LG M470&lt;br&gt;
+LS M47K, LO M47K, LY M47K
+&lt;p&gt;
+Source: http://www.osram.convergy.de&lt;p&gt;
+
+&lt;u&gt;LUXEON:&lt;/u&gt;&lt;br&gt;
+- &lt;u&gt;LUMILED®&lt;/u&gt;&lt;br&gt;
+LXK2-PW12-R00, LXK2-PW12-S00, LXK2-PW14-U00, LXK2-PW14-V00&lt;br&gt;
+LXK2-PM12-R00, LXK2-PM12-S00, LXK2-PM14-U00&lt;br&gt;
+LXK2-PE12-Q00, LXK2-PE12-R00, LXK2-PE12-S00, LXK2-PE14-T00, LXK2-PE14-U00&lt;br&gt;
+LXK2-PB12-K00, LXK2-PB12-L00, LXK2-PB12-M00, LXK2-PB14-N00, LXK2-PB14-P00, LXK2-PB14-Q00&lt;br&gt;
+LXK2-PR12-L00, LXK2-PR12-M00, LXK2-PR14-Q00, LXK2-PR14-R00&lt;br&gt;
+LXK2-PD12-Q00, LXK2-PD12-R00, LXK2-PD12-S00&lt;br&gt;
+LXK2-PH12-R00, LXK2-PH12-S00&lt;br&gt;
+LXK2-PL12-P00, LXK2-PL12-Q00, LXK2-PL12-R00
+&lt;p&gt;
+Source: www.luxeon.com&lt;p&gt;
+
+&lt;u&gt;KINGBRIGHT:&lt;/U&gt;&lt;p&gt;
+KA-3528ASYC&lt;br&gt;
+Source: www.kingbright.com</description>
+<gates>
+<gate name="G$1" symbol="LED" x="0" y="0"/>
+</gates>
+<devices>
+<device name="SMT1206" package="1206">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="LD260" package="LD260">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SQR2X5" package="LED2X5">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="3MM" package="LED3MM">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="5MM" package="LED5MM">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="LSU260" package="LSU260">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="LZR181" package="LZR181">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="B152" package="Q62902-B152">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="B153" package="Q62902-B153">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="B155" package="Q62902-B155">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="B156" package="Q62902-B156">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SFH480" package="SFH480">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SFH482" package="SFH482">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SQR5.7X3.2" package="U57X32">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="IRL80A" package="IRL80A">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="P-LCC-2" package="P-LCC-2">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="MINI-TOP" package="OSRAM-MINI-TOP-LED">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SIDELED" package="OSRAM-SIDELED">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SMART-LED" package="SMART-LED">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="B"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="P-LCC-2-BACK" package="P-LCC-2-TOPLED-RG">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="MICRO-SIDELED" package="MICRO-SIDELED">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="P-LCC-4" package="P-LCC-4">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C@4"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CHIP-LED0603" package="CHIP-LED0603">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CHIP-LED0805" package="CHIP-LED0805">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="TOPLED-SANTANA" package="MINI-TOPLED-SANTANA">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CHIPLED_0805" package="CHIPLED_0805">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CHIPLED_1206" package="CHIPLED_1206">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CHIPLED_0603" package="CHIPLED_0603">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CHIPLED-0603-TTW" package="CHIPLED-0603-TTW">
+<connects>
+<connect gate="G$1" pin="A" pad="A@1"/>
+<connect gate="G$1" pin="C" pad="C@1"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="" package="SMARTLED-TTW">
+<connects>
+<connect gate="G$1" pin="A" pad="A@1"/>
+<connect gate="G$1" pin="C" pad="C@1"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="-LUMILED+" package="LUMILED+">
+<connects>
+<connect gate="G$1" pin="A" pad="2+"/>
+<connect gate="G$1" pin="C" pad="4-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="-LUMILED" package="LUMILED">
+<connects>
+<connect gate="G$1" pin="A" pad="2+"/>
+<connect gate="G$1" pin="C" pad="4-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="10MM" package="LED10MM">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="KA-3528ASYC" package="KA-3528ASYC">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SML0805" package="SML0805">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SML1206" package="SML1206">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SML0603" package="SML0603">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="con-molex">
+<description>&lt;b&gt;Molex Connectors&lt;/b&gt;&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="7395-02">
+<description>&lt;b&gt;MOLEX 2.54mm KK RA CONNECTOR&lt;/b&gt;
+&lt;br&gt;Fixed Orientation</description>
+<wire x1="2.54" y1="-5.08" x2="2.54" y2="-1.905" width="0.254" layer="21"/>
+<wire x1="2.54" y1="-1.905" x2="1.905" y2="-1.905" width="0.254" layer="21"/>
+<wire x1="1.905" y1="-1.905" x2="1.905" y2="-2.54" width="0.254" layer="21"/>
+<wire x1="1.905" y1="-2.54" x2="0.635" y2="-2.54" width="0.254" layer="21"/>
+<wire x1="0.635" y1="-2.54" x2="0.635" y2="-1.905" width="0.254" layer="21"/>
+<wire x1="0.635" y1="-1.905" x2="-0.635" y2="-1.905" width="0.254" layer="21"/>
+<wire x1="-0.635" y1="-1.905" x2="-0.635" y2="-2.54" width="0.254" layer="21"/>
+<wire x1="-0.635" y1="-2.54" x2="-1.905" y2="-2.54" width="0.254" layer="21"/>
+<wire x1="-1.905" y1="-2.54" x2="-1.905" y2="-1.905" width="0.254" layer="21"/>
+<wire x1="-1.905" y1="-1.905" x2="-2.54" y2="-1.905" width="0.254" layer="21"/>
+<wire x1="-2.54" y1="-1.905" x2="-2.54" y2="-5.08" width="0.254" layer="21"/>
+<wire x1="-2.54" y1="-5.08" x2="-1.651" y2="-5.08" width="0.254" layer="21"/>
+<wire x1="-1.651" y1="-5.08" x2="1.27" y2="-5.08" width="0.254" layer="21"/>
+<wire x1="1.27" y1="-5.08" x2="2.54" y2="-5.08" width="0.254" layer="21"/>
+<wire x1="1.27" y1="-5.08" x2="1.27" y2="-13.081" width="0.254" layer="21"/>
+<wire x1="1.27" y1="-13.081" x2="1.016" y2="-13.589" width="0.254" layer="21"/>
+<wire x1="1.016" y1="-13.589" x2="-0.0508" y2="-13.589" width="0.254" layer="21"/>
+<wire x1="-1.27" y1="-5.08" x2="-1.27" y2="-13.081" width="0.254" layer="21"/>
+<wire x1="-1.27" y1="-13.081" x2="-1.016" y2="-13.589" width="0.254" layer="21"/>
+<wire x1="-1.016" y1="-13.589" x2="-0.0508" y2="-13.589" width="0.254" layer="21"/>
+<wire x1="-0.0508" y1="-13.589" x2="0.0508" y2="-13.589" width="0.254" layer="21"/>
+<wire x1="1.27" y1="-5.08" x2="0.889" y2="-5.08" width="0.254" layer="51"/>
+<wire x1="-1.651" y1="-5.08" x2="-1.651" y2="-11.303" width="0.254" layer="21"/>
+<wire x1="-1.651" y1="-11.303" x2="-1.3208" y2="-11.6586" width="0.254" layer="21"/>
+<wire x1="1.651" y1="-5.08" x2="1.651" y2="-11.303" width="0.254" layer="21"/>
+<wire x1="1.651" y1="-11.303" x2="1.3208" y2="-11.6586" width="0.254" layer="21"/>
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+<text x="2.6401" y="2.9479" size="1.016" layer="25" ratio="10" rot="R180">&gt;NAME</text>
+<text x="0.7859" y="-3.4021" size="1.27" layer="21" ratio="14" rot="R270">1</text>
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+</package>
+<package name="6410-02">
+<description>&lt;b&gt;MOLEX 2.54mm KK  CONNECTOR&lt;/b&gt;</description>
+<wire x1="-1.27" y1="2.54" x2="-1.27" y2="2.921" width="0.127" layer="21"/>
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+<text x="-2.5131" y="3.2751" size="1.016" layer="25" ratio="10">&gt;NAME</text>
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+<rectangle x1="1.016" y1="-0.254" x2="1.524" y2="0.254" layer="51"/>
+</package>
+<package name="7395-03">
+<description>&lt;b&gt;MOLEX 2.54mm KK RA CONNECTOR&lt;/b&gt;
+&lt;br&gt;Fixed Orientation</description>
+<wire x1="3.81" y1="-5.08" x2="3.81" y2="-1.905" width="0.254" layer="21"/>
+<wire x1="3.81" y1="-1.905" x2="3.175" y2="-1.905" width="0.254" layer="21"/>
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+<wire x1="2.921" y1="-11.303" x2="2.5908" y2="-11.6586" width="0.254" layer="21"/>
+<pad name="1" x="2.54" y="0" drill="1.016" shape="long" rot="R90"/>
+<pad name="2" x="0" y="0" drill="1.016" shape="long" rot="R90"/>
+<pad name="3" x="-2.54" y="0" drill="1.016" shape="long" rot="R90"/>
+<text x="3.9101" y="2.9479" size="1.016" layer="25" ratio="10" rot="R180">&gt;NAME</text>
+<text x="2.0559" y="-3.4021" size="1.27" layer="21" ratio="14" rot="R270">1</text>
+<text x="-2.9733" y="-3.2751" size="1.27" layer="21" ratio="14" rot="R270">3</text>
+<text x="4.6721" y="-2.4399" size="0.8128" layer="27" ratio="10" rot="R270">&gt;VALUE</text>
+<rectangle x1="2.286" y1="-0.254" x2="2.794" y2="0.254" layer="51"/>
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+<rectangle x1="-2.794" y1="-2.5146" x2="-2.286" y2="-0.2794" layer="51"/>
+</package>
+<package name="6410-03">
+<description>&lt;b&gt;MOLEX 2.54mm KK  CONNECTOR&lt;/b&gt;</description>
+<wire x1="-2.54" y1="2.54" x2="-2.54" y2="2.921" width="0.127" layer="21"/>
+<wire x1="-3.81" y1="0" x2="-3.81" y2="2.921" width="0.254" layer="21"/>
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+<wire x1="2.54" y1="1.905" x2="2.54" y2="2.921" width="0.254" layer="21"/>
+<wire x1="-2.54" y1="1.905" x2="-2.286" y2="1.397" width="0.254" layer="21"/>
+<wire x1="-2.286" y1="2.921" x2="-2.286" y2="1.905" width="0.254" layer="21"/>
+<wire x1="-2.286" y1="1.397" x2="2.286" y2="1.397" width="0.254" layer="21"/>
+<wire x1="2.286" y1="1.397" x2="2.54" y2="1.905" width="0.254" layer="21"/>
+<wire x1="2.286" y1="2.921" x2="2.286" y2="1.905" width="0.254" layer="21"/>
+<pad name="3" x="-2.54" y="0" drill="1.016" shape="long" rot="R90"/>
+<pad name="2" x="0" y="0" drill="1.016" shape="long" rot="R90"/>
+<pad name="1" x="2.54" y="0" drill="1.016" shape="long" rot="R90"/>
+<text x="-3.7831" y="3.2751" size="1.016" layer="25" ratio="10">&gt;NAME</text>
+<text x="4.4181" y="-0.7381" size="1.27" layer="21" ratio="14">1</text>
+<text x="-4.9799" y="-0.6873" size="1.27" layer="21" ratio="14">3</text>
+<text x="-3.7831" y="-4.5989" size="0.8128" layer="27" ratio="10">&gt;VALUE</text>
+<rectangle x1="-2.794" y1="-0.254" x2="-2.286" y2="0.254" layer="51"/>
+<rectangle x1="-0.254" y1="-0.254" x2="0.254" y2="0.254" layer="51"/>
+<rectangle x1="2.286" y1="-0.254" x2="2.794" y2="0.254" layer="51"/>
+</package>
+</packages>
+<symbols>
+<symbol name="MV">
+<wire x1="1.27" y1="0" x2="0" y2="0" width="0.6096" layer="94"/>
+<text x="2.54" y="-0.762" size="1.524" layer="95">&gt;NAME</text>
+<text x="-0.762" y="1.397" size="1.778" layer="96">&gt;VALUE</text>
+<pin name="S" x="-2.54" y="0" visible="off" length="short" direction="pas"/>
+</symbol>
+<symbol name="M">
+<wire x1="1.27" y1="0" x2="0" y2="0" width="0.6096" layer="94"/>
+<text x="2.54" y="-0.762" size="1.524" layer="95">&gt;NAME</text>
+<pin name="S" x="-2.54" y="0" visible="off" length="short" direction="pas"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="22-?-02" prefix="J">
+<description>&lt;b&gt;CONNECTOR&lt;/b&gt;&lt;p&gt;
+wire to board 2.54 mm (.1 inch) pitch header</description>
+<gates>
+<gate name="-1" symbol="MV" x="0" y="0" addlevel="always" swaplevel="1"/>
+<gate name="-2" symbol="M" x="0" y="-5.08" addlevel="always" swaplevel="1"/>
+</gates>
+<devices>
+<device name="05-7028" package="7395-02">
+<connects>
+<connect gate="-1" pin="S" pad="1"/>
+<connect gate="-2" pin="S" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="9731601" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="27-2021" package="6410-02">
+<connects>
+<connect gate="-1" pin="S" pad="1"/>
+<connect gate="-2" pin="S" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="22-?-03" prefix="J">
+<description>&lt;b&gt;CONNECTOR&lt;/b&gt;&lt;p&gt;
+wire to board 2.54 mm (.1 inch) pitch header</description>
+<gates>
+<gate name="-1" symbol="MV" x="0" y="5.08" addlevel="always" swaplevel="1"/>
+<gate name="-2" symbol="M" x="0" y="0" addlevel="always" swaplevel="1"/>
+<gate name="-3" symbol="M" x="0" y="-5.08" addlevel="always" swaplevel="1"/>
+</gates>
+<devices>
+<device name="05-7038" package="7395-03">
+<connects>
+<connect gate="-1" pin="S" pad="1"/>
+<connect gate="-2" pin="S" pad="2"/>
+<connect gate="-3" pin="S" pad="3"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="27-2031" package="6410-03">
+<connects>
+<connect gate="-1" pin="S" pad="1"/>
+<connect gate="-2" pin="S" pad="2"/>
+<connect gate="-3" pin="S" pad="3"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="rcl">
+<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;
+Based on the previous libraries:
+&lt;ul&gt;
+&lt;li&gt;r.lbr
+&lt;li&gt;cap.lbr 
+&lt;li&gt;cap-fe.lbr
+&lt;li&gt;captant.lbr
+&lt;li&gt;polcap.lbr
+&lt;li&gt;ipc-smd.lbr
+&lt;/ul&gt;
+All SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;
+&lt;p&gt;
+for Electrolyt Capacitors see also :&lt;p&gt;
+www.bccomponents.com &lt;p&gt;
+www.panasonic.com&lt;p&gt;
+www.kemet.com&lt;p&gt;
+http://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf &lt;b&gt;(SANYO)&lt;/b&gt;
+&lt;p&gt;
+for trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;
+
+&lt;table border=0 cellspacing=0 cellpadding=0 width="100%" cellpaddding=0&gt;
+&lt;tr valign="top"&gt;
+
+&lt;! &lt;td width="10"&gt;&amp;nbsp;&lt;/td&gt;
+&lt;td width="90%"&gt;
+
+&lt;b&gt;&lt;font color="#0000FF" size="4"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;
+&lt;P&gt;
+&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;
+  &lt;TR&gt;
+    &lt;TD COLSPAN=8&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+  &lt;/TR&gt;
+  &lt;TR&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;BOURNS&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;DALE-VISHAY&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;PHILIPS/MEPCO&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;MURATA&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;PANASONIC&lt;/FONT&gt;
+      &lt;/B&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;SPECTROL&lt;/FONT&gt;
+      &lt;/B&gt;
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+    &lt;TD ALIGN=CENTER&gt;
+      &lt;B&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;MILSPEC&lt;/FONT&gt;
+      &lt;/B&gt;
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+  &lt;/TR&gt;
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+      T8S&lt;BR&gt;
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+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      RT/RTR12&lt;BR&gt;
+      RT/RTR12&lt;BR&gt;
+      RT/RTR12&lt;BR&gt;
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+      RJ/RJR12&lt;BR&gt;
+      RJ/RJR12&lt;BR&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+  &lt;/TR&gt;
+  &lt;TR&gt;
+    &lt;TD COLSPAN=8&gt;&amp;nbsp;
+    &lt;/TD&gt;
+  &lt;/TR&gt;
+  &lt;TR&gt;
+    &lt;TD COLSPAN=8&gt;
+      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SQUARE MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;
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+   &lt;TD ALIGN=CENTER&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;
+    &lt;/TD&gt;
+    &lt;TD ALIGN=CENTER&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;
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+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;
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+    &lt;TD ALIGN=CENTER&gt;
+      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;
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+    &lt;/TD&gt;
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+      T63YB&lt;BR&gt;
+      T63XB&lt;BR&gt;
+      -&lt;BR&gt;
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+      5887&lt;BR&gt;
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+      5880&lt;BR&gt;
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+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
+      -&lt;BR&gt;
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+<package name="C2220K">
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+<package name="C2225K">
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+<package name="HPC0201">
+<description>&lt;b&gt; &lt;/b&gt;&lt;p&gt;
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+<package name="C0201">
+<description>Source: http://www.avxcorp.com/docs/catalogs/cx5r.pdf</description>
+<smd name="1" x="-0.25" y="0" dx="0.25" dy="0.35" layer="1"/>
+<smd name="2" x="0.25" y="0" dx="0.25" dy="0.35" layer="1"/>
+<text x="-0.635" y="0.635" size="1.27" layer="25">&gt;NAME</text>
+<text x="-0.635" y="-1.905" size="1.27" layer="27">&gt;VALUE</text>
+<rectangle x1="-0.3" y1="-0.15" x2="-0.15" y2="0.15" layer="51"/>
+<rectangle x1="0.15" y1="-0.15" x2="0.3" y2="0.15" layer="51"/>
+<rectangle x1="-0.15" y1="0.1" x2="0.15" y2="0.15" layer="51"/>
+<rectangle x1="-0.15" y1="-0.15" x2="0.15" y2="-0.1" layer="51"/>
+</package>
+<package name="C1808">
+<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;
+Source: AVX .. aphvc.pdf</description>
+<wire x1="-1.4732" y1="0.9502" x2="1.4732" y2="0.9502" width="0.1016" layer="51"/>
+<wire x1="-1.4478" y1="-0.9502" x2="1.4732" y2="-0.9502" width="0.1016" layer="51"/>
+<smd name="1" x="-1.95" y="0" dx="1.6" dy="2.2" layer="1"/>
+<smd name="2" x="1.95" y="0" dx="1.6" dy="2.2" layer="1"/>
+<text x="-2.233" y="1.827" size="1.27" layer="25">&gt;NAME</text>
+<text x="-2.233" y="-2.842" size="1.27" layer="27">&gt;VALUE</text>
+<rectangle x1="-2.275" y1="-1.015" x2="-1.225" y2="1.015" layer="51"/>
+<rectangle x1="1.225" y1="-1.015" x2="2.275" y2="1.015" layer="51"/>
+</package>
+<package name="C3640">
+<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;
+Source: AVX .. aphvc.pdf</description>
+<wire x1="-3.8322" y1="5.0496" x2="3.8322" y2="5.0496" width="0.1016" layer="51"/>
+<wire x1="-3.8322" y1="-5.0496" x2="3.8322" y2="-5.0496" width="0.1016" layer="51"/>
+<smd name="1" x="-4.267" y="0" dx="2.6" dy="10.7" layer="1"/>
+<smd name="2" x="4.267" y="0" dx="2.6" dy="10.7" layer="1"/>
+<text x="-4.647" y="6.465" size="1.27" layer="25">&gt;NAME</text>
+<text x="-4.647" y="-7.255" size="1.27" layer="27">&gt;VALUE</text>
+<rectangle x1="-4.57" y1="-5.1" x2="-3.05" y2="5.1" layer="51"/>
+<rectangle x1="3.05" y1="-5.1" x2="4.5688" y2="5.1" layer="51"/>
+</package>
+</packages>
+<symbols>
+<symbol name="C-EU">
+<wire x1="0" y1="0" x2="0" y2="-0.508" width="0.1524" layer="94"/>
+<wire x1="0" y1="-2.54" x2="0" y2="-2.032" width="0.1524" layer="94"/>
+<text x="1.524" y="0.381" size="1.778" layer="95">&gt;NAME</text>
+<text x="1.524" y="-4.699" size="1.778" layer="96">&gt;VALUE</text>
+<rectangle x1="-2.032" y1="-2.032" x2="2.032" y2="-1.524" layer="94"/>
+<rectangle x1="-2.032" y1="-1.016" x2="2.032" y2="-0.508" layer="94"/>
+<pin name="1" x="0" y="2.54" visible="off" length="short" direction="pas" swaplevel="1" rot="R270"/>
+<pin name="2" x="0" y="-5.08" visible="off" length="short" direction="pas" swaplevel="1" rot="R90"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="C-EU" prefix="C" uservalue="yes">
+<description>&lt;B&gt;CAPACITOR&lt;/B&gt;, European symbol</description>
+<gates>
+<gate name="G$1" symbol="C-EU" x="0" y="0"/>
+</gates>
+<devices>
+<device name="C0402" package="C0402">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C0504" package="C0504">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C0603" package="C0603">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C0805" package="C0805">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C1005" package="C1005">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C1206" package="C1206">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C1210" package="C1210">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C1310" package="C1310">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C1608" package="C1608">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C1812" package="C1812">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C1825" package="C1825">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C2012" package="C2012">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C3216" package="C3216">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C3225" package="C3225">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C4532" package="C4532">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C4564" package="C4564">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="025-024X044" package="C025-024X044">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="025-025X050" package="C025-025X050">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="025-030X050" package="C025-030X050">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="025-040X050" package="C025-040X050">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="025-050X050" package="C025-050X050">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="025-060X050" package="C025-060X050">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C025_050-024X070" package="C025_050-024X070">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="025_050-025X075" package="C025_050-025X075">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="025_050-035X075" package="C025_050-035X075">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="025_050-045X075" package="C025_050-045X075">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="025_050-055X075" package="C025_050-055X075">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="050-024X044" package="C050-024X044">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="050-025X075" package="C050-025X075">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="050-045X075" package="C050-045X075">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="050-030X075" package="C050-030X075">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="050-050X075" package="C050-050X075">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="050-055X075" package="C050-055X075">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="050-075X075" package="C050-075X075">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="050H075X075" package="C050H075X075">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="075-032X103" package="C075-032X103">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="075-042X103" package="C075-042X103">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="075-052X106" package="C075-052X106">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="102-043X133" package="C102-043X133">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="102-054X133" package="C102-054X133">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="102-064X133" package="C102-064X133">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="102_152-062X184" package="C102_152-062X184">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="150-054X183" package="C150-054X183">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="150-064X183" package="C150-064X183">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="150-072X183" package="C150-072X183">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="150-084X183" package="C150-084X183">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="150-091X182" package="C150-091X182">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="225-062X268" package="C225-062X268">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="225-074X268" package="C225-074X268">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="225-087X268" package="C225-087X268">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="225-108X268" package="C225-108X268">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="225-113X268" package="C225-113X268">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="275-093X316" package="C275-093X316">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="275-113X316" package="C275-113X316">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="275-134X316" package="C275-134X316">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="275-205X316" package="C275-205X316">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="325-137X374" package="C325-137X374">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="325-162X374" package="C325-162X374">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="325-182X374" package="C325-182X374">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="375-192X418" package="C375-192X418">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="375-203X418" package="C375-203X418">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="050-035X075" package="C050-035X075">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="375-155X418" package="C375-155X418">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="075-063X106" package="C075-063X106">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="275-154X316" package="C275-154X316">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="275-173X316" package="C275-173X316">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C0402K" package="C0402K">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C0603K" package="C0603K">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C0805K" package="C0805K">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C1206K" package="C1206K">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C1210K" package="C1210K">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C1812K" package="C1812K">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C1825K" package="C1825K">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C2220K" package="C2220K">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C2225K" package="C2225K">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="HPC0201" package="HPC0201">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C0201" package="C0201">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C1808" package="C1808">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C3640" package="C3640">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="special">
+<description>&lt;b&gt;Special Devices&lt;/b&gt;&lt;p&gt;
+7-segment displays, switches, heatsinks, crystals, transformers, etc.&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="QS">
+<description>&lt;B&gt;CRYSTAL&lt;/B&gt;</description>
+<wire x1="-3.429" y1="-2.286" x2="3.429" y2="-2.286" width="0.1524" layer="21"/>
+<wire x1="3.429" y1="2.286" x2="-3.429" y2="2.286" width="0.1524" layer="21"/>
+<wire x1="-3.429" y1="-1.778" x2="3.429" y2="-1.778" width="0.0508" layer="21"/>
+<wire x1="3.429" y1="1.778" x2="-3.429" y2="1.778" width="0.0508" layer="21"/>
+<wire x1="3.429" y1="1.778" x2="3.429" y2="-1.778" width="0.0508" layer="21" curve="-180"/>
+<wire x1="3.429" y1="2.286" x2="3.429" y2="-2.286" width="0.1524" layer="21" curve="-180"/>
+<wire x1="-3.429" y1="2.286" x2="-3.429" y2="-2.286" width="0.1524" layer="21" curve="180"/>
+<wire x1="-3.429" y1="1.778" x2="-3.429" y2="-1.778" width="0.0508" layer="21" curve="180"/>
+<pad name="1" x="-2.54" y="0" drill="0.6096" shape="long" rot="R90"/>
+<pad name="2" x="2.54" y="0" drill="0.6096" shape="long" rot="R90"/>
+<text x="-5.08" y="-3.937" size="1.27" layer="27" ratio="10">&gt;VALUE</text>
+<text x="-5.08" y="2.667" size="1.27" layer="25" ratio="10">&gt;NAME</text>
+</package>
+</packages>
+<symbols>
+<symbol name="XTAL">
+<wire x1="-1.27" y1="2.54" x2="1.397" y2="2.54" width="0.4064" layer="94"/>
+<wire x1="1.397" y1="2.54" x2="1.397" y2="-2.54" width="0.4064" layer="94"/>
+<wire x1="1.397" y1="-2.54" x2="-1.27" y2="-2.54" width="0.4064" layer="94"/>
+<wire x1="-1.27" y1="2.54" x2="-1.27" y2="-2.54" width="0.4064" layer="94"/>
+<wire x1="2.3368" y1="2.54" x2="2.3368" y2="-2.54" width="0.4064" layer="94"/>
+<wire x1="-2.286" y1="2.54" x2="-2.286" y2="-2.54" width="0.4064" layer="94"/>
+<text x="-5.08" y="3.81" size="1.778" layer="95">&gt;NAME</text>
+<text x="-5.08" y="-5.08" size="1.778" layer="96">&gt;VALUE</text>
+<pin name="2" x="5.08" y="0" visible="pad" length="short" direction="pas" swaplevel="1" rot="R180"/>
+<pin name="1" x="-5.08" y="0" visible="pad" length="short" direction="pas" swaplevel="1"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="XTAL/S" prefix="Q" uservalue="yes">
+<description>&lt;B&gt;CRYSTAL&lt;/B&gt;</description>
+<gates>
+<gate name="G$1" symbol="XTAL" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="QS">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="supply1">
+<description>&lt;b&gt;Supply Symbols&lt;/b&gt;&lt;p&gt;
+ GND, VCC, 0V, +5V, -5V, etc.&lt;p&gt;
+ Please keep in mind, that these devices are necessary for the
+ automatic wiring of the supply signals.&lt;p&gt;
+ The pin name defined in the symbol is identical to the net which is to be wired automatically.&lt;p&gt;
+ In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.&lt;p&gt;
+ &lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+</packages>
+<symbols>
+<symbol name="VCC">
+<wire x1="1.27" y1="-1.905" x2="0" y2="0" width="0.254" layer="94"/>
+<wire x1="0" y1="0" x2="-1.27" y2="-1.905" width="0.254" layer="94"/>
+<text x="-2.54" y="-2.54" size="1.778" layer="96" rot="R90">&gt;VALUE</text>
+<pin name="VCC" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/>
+</symbol>
+<symbol name="GND">
+<wire x1="-1.905" y1="0" x2="1.905" y2="0" width="0.254" layer="94"/>
+<text x="-2.54" y="-2.54" size="1.778" layer="96">&gt;VALUE</text>
+<pin name="GND" x="0" y="2.54" visible="off" length="short" direction="sup" rot="R270"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="VCC" prefix="P+">
+<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>
+<gates>
+<gate name="VCC" symbol="VCC" x="0" y="0"/>
+</gates>
+<devices>
+<device name="">
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="GND" prefix="GND">
+<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>
+<gates>
+<gate name="1" symbol="GND" x="0" y="0"/>
+</gates>
+<devices>
+<device name="">
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="switch-omron">
+<description>&lt;b&gt;Omron Switches&lt;/b&gt;&lt;p&gt;
+&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="B3F-10XX">
+<description>&lt;b&gt;OMRON SWITCH&lt;/b&gt;</description>
+<wire x1="3.302" y1="-0.762" x2="3.048" y2="-0.762" width="0.1524" layer="21"/>
+<wire x1="3.302" y1="-0.762" x2="3.302" y2="0.762" width="0.1524" layer="21"/>
+<wire x1="3.048" y1="0.762" x2="3.302" y2="0.762" width="0.1524" layer="21"/>
+<wire x1="3.048" y1="1.016" x2="3.048" y2="2.54" width="0.1524" layer="51"/>
+<wire x1="-3.302" y1="0.762" x2="-3.048" y2="0.762" width="0.1524" layer="21"/>
+<wire x1="-3.302" y1="0.762" x2="-3.302" y2="-0.762" width="0.1524" layer="21"/>
+<wire x1="-3.048" y1="-0.762" x2="-3.302" y2="-0.762" width="0.1524" layer="21"/>
+<wire x1="3.048" y1="2.54" x2="2.54" y2="3.048" width="0.1524" layer="51"/>
+<wire x1="2.54" y1="-3.048" x2="3.048" y2="-2.54" width="0.1524" layer="51"/>
+<wire x1="3.048" y1="-2.54" x2="3.048" y2="-1.016" width="0.1524" layer="51"/>
+<wire x1="-2.54" y1="3.048" x2="-3.048" y2="2.54" width="0.1524" layer="51"/>
+<wire x1="-3.048" y1="2.54" x2="-3.048" y2="1.016" width="0.1524" layer="51"/>
+<wire x1="-2.54" y1="-3.048" x2="-3.048" y2="-2.54" width="0.1524" layer="51"/>
+<wire x1="-3.048" y1="-2.54" x2="-3.048" y2="-1.016" width="0.1524" layer="51"/>
+<wire x1="-1.27" y1="1.27" x2="-1.27" y2="-1.27" width="0.0508" layer="51"/>
+<wire x1="1.27" y1="-1.27" x2="-1.27" y2="-1.27" width="0.0508" layer="51"/>
+<wire x1="1.27" y1="-1.27" x2="1.27" y2="1.27" width="0.0508" layer="51"/>
+<wire x1="-1.27" y1="1.27" x2="1.27" y2="1.27" width="0.0508" layer="51"/>
+<wire x1="-1.27" y1="3.048" x2="-1.27" y2="2.794" width="0.0508" layer="21"/>
+<wire x1="1.27" y1="2.794" x2="-1.27" y2="2.794" width="0.0508" layer="21"/>
+<wire x1="1.27" y1="2.794" x2="1.27" y2="3.048" width="0.0508" layer="21"/>
+<wire x1="1.143" y1="-2.794" x2="-1.27" y2="-2.794" width="0.0508" layer="21"/>
+<wire x1="1.143" y1="-2.794" x2="1.143" y2="-3.048" width="0.0508" layer="21"/>
+<wire x1="-1.27" y1="-2.794" x2="-1.27" y2="-3.048" width="0.0508" layer="21"/>
+<wire x1="2.54" y1="-3.048" x2="2.159" y2="-3.048" width="0.1524" layer="51"/>
+<wire x1="-2.54" y1="-3.048" x2="-2.159" y2="-3.048" width="0.1524" layer="51"/>
+<wire x1="-2.159" y1="-3.048" x2="-1.27" y2="-3.048" width="0.1524" layer="21"/>
+<wire x1="-2.54" y1="3.048" x2="-2.159" y2="3.048" width="0.1524" layer="51"/>
+<wire x1="2.54" y1="3.048" x2="2.159" y2="3.048" width="0.1524" layer="51"/>
+<wire x1="2.159" y1="3.048" x2="1.27" y2="3.048" width="0.1524" layer="21"/>
+<wire x1="1.27" y1="3.048" x2="-1.27" y2="3.048" width="0.1524" layer="21"/>
+<wire x1="-1.27" y1="3.048" x2="-2.159" y2="3.048" width="0.1524" layer="21"/>
+<wire x1="-1.27" y1="-3.048" x2="1.143" y2="-3.048" width="0.1524" layer="21"/>
+<wire x1="1.143" y1="-3.048" x2="2.159" y2="-3.048" width="0.1524" layer="21"/>
+<wire x1="3.048" y1="-0.762" x2="3.048" y2="-1.016" width="0.1524" layer="21"/>
+<wire x1="3.048" y1="0.762" x2="3.048" y2="1.016" width="0.1524" layer="21"/>
+<wire x1="-3.048" y1="-0.762" x2="-3.048" y2="-1.016" width="0.1524" layer="21"/>
+<wire x1="-3.048" y1="0.762" x2="-3.048" y2="1.016" width="0.1524" layer="21"/>
+<wire x1="-1.27" y1="-2.159" x2="1.27" y2="-2.159" width="0.1524" layer="51"/>
+<wire x1="1.27" y1="2.286" x2="-1.27" y2="2.286" width="0.1524" layer="51"/>
+<wire x1="-2.413" y1="1.27" x2="-2.413" y2="0.508" width="0.1524" layer="51"/>
+<wire x1="-2.413" y1="-0.508" x2="-2.413" y2="-1.27" width="0.1524" layer="51"/>
+<wire x1="-2.413" y1="0.508" x2="-2.159" y2="-0.381" width="0.1524" layer="51"/>
+<circle x="0" y="0" radius="1.778" width="0.1524" layer="21"/>
+<circle x="-2.159" y="-2.159" radius="0.508" width="0.1524" layer="51"/>
+<circle x="2.159" y="-2.032" radius="0.508" width="0.1524" layer="51"/>
+<circle x="2.159" y="2.159" radius="0.508" width="0.1524" layer="51"/>
+<circle x="-2.159" y="2.159" radius="0.508" width="0.1524" layer="51"/>
+<circle x="0" y="0" radius="0.635" width="0.0508" layer="51"/>
+<circle x="0" y="0" radius="0.254" width="0.1524" layer="21"/>
+<pad name="1" x="-3.2512" y="2.2606" drill="1.016" shape="long"/>
+<pad name="3" x="-3.2512" y="-2.2606" drill="1.016" shape="long"/>
+<pad name="2" x="3.2512" y="2.2606" drill="1.016" shape="long"/>
+<pad name="4" x="3.2512" y="-2.2606" drill="1.016" shape="long"/>
+<text x="-3.048" y="3.683" size="1.27" layer="25" ratio="10">&gt;NAME</text>
+<text x="-3.048" y="-5.08" size="1.27" layer="27" ratio="10">&gt;VALUE</text>
+<text x="-4.318" y="1.651" size="1.27" layer="51" ratio="10">1</text>
+<text x="3.556" y="1.524" size="1.27" layer="51" ratio="10">2</text>
+<text x="-4.572" y="-2.794" size="1.27" layer="51" ratio="10">3</text>
+<text x="3.556" y="-2.794" size="1.27" layer="51" ratio="10">4</text>
+</package>
+</packages>
+<symbols>
+<symbol name="TS2">
+<wire x1="0" y1="1.905" x2="0" y2="2.54" width="0.254" layer="94"/>
+<wire x1="-4.445" y1="1.905" x2="-3.175" y2="1.905" width="0.254" layer="94"/>
+<wire x1="-4.445" y1="-1.905" x2="-3.175" y2="-1.905" width="0.254" layer="94"/>
+<wire x1="-4.445" y1="1.905" x2="-4.445" y2="0" width="0.254" layer="94"/>
+<wire x1="-4.445" y1="0" x2="-4.445" y2="-1.905" width="0.254" layer="94"/>
+<wire x1="-2.54" y1="0" x2="-1.905" y2="0" width="0.1524" layer="94"/>
+<wire x1="-1.27" y1="0" x2="-0.635" y2="0" width="0.1524" layer="94"/>
+<wire x1="-4.445" y1="0" x2="-3.175" y2="0" width="0.1524" layer="94"/>
+<wire x1="2.54" y1="2.54" x2="0" y2="2.54" width="0.1524" layer="94"/>
+<wire x1="2.54" y1="-2.54" x2="0" y2="-2.54" width="0.1524" layer="94"/>
+<wire x1="0" y1="-2.54" x2="-1.27" y2="1.905" width="0.254" layer="94"/>
+<circle x="0" y="-2.54" radius="0.127" width="0.4064" layer="94"/>
+<circle x="0" y="2.54" radius="0.127" width="0.4064" layer="94"/>
+<text x="-6.35" y="-2.54" size="1.778" layer="95" rot="R90">&gt;NAME</text>
+<text x="-3.81" y="3.175" size="1.778" layer="96" rot="R90">&gt;VALUE</text>
+<pin name="P" x="0" y="-5.08" visible="pad" length="short" direction="pas" swaplevel="2" rot="R90"/>
+<pin name="S" x="0" y="5.08" visible="pad" length="short" direction="pas" swaplevel="1" rot="R270"/>
+<pin name="S1" x="2.54" y="5.08" visible="pad" length="short" direction="pas" swaplevel="1" rot="R270"/>
+<pin name="P1" x="2.54" y="-5.08" visible="pad" length="short" direction="pas" swaplevel="2" rot="R90"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="10-XX" prefix="S" uservalue="yes">
+<description>&lt;b&gt;OMRON SWITCH&lt;/b&gt;</description>
+<gates>
+<gate name="1" symbol="TS2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="B3F-10XX">
+<connects>
+<connect gate="1" pin="P" pad="3"/>
+<connect gate="1" pin="P1" pad="4"/>
+<connect gate="1" pin="S" pad="1"/>
+<connect gate="1" pin="S1" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="B3F-1000" constant="no"/>
+<attribute name="OC_FARNELL" value="176432" constant="no"/>
+<attribute name="OC_NEWARK" value="36M3542" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="adafruit">
+<packages>
+<package name="SCDA">
+<wire x1="-14" y1="-26.3" x2="-14" y2="2.8" width="0.127" layer="21"/>
+<wire x1="-14" y1="2.8" x2="14.1" y2="2.8" width="0.127" layer="21"/>
+<wire x1="14.1" y1="2.8" x2="14.1" y2="-26.3" width="0.127" layer="21"/>
+<wire x1="14.1" y1="-26.3" x2="12" y2="-26.3" width="0.127" layer="21"/>
+<wire x1="12" y1="-26.3" x2="-12.4" y2="-26.3" width="0.127" layer="21"/>
+<wire x1="-12.4" y1="-26.3" x2="-14" y2="-26.3" width="0.127" layer="21"/>
+<wire x1="-12.4" y1="-25.5" x2="12" y2="-25.7" width="0.127" layer="21" curve="-27.095878"/>
+<wire x1="-12.4" y1="-25.5" x2="-12.4" y2="-26.3" width="0.127" layer="21"/>
+<wire x1="12" y1="-25.7" x2="12" y2="-26.3" width="0.127" layer="21"/>
+<smd name="12" x="-14.2" y="-23.5" dx="1.7" dy="3.1" layer="1"/>
+<smd name="13" x="14.2" y="-24.1" dx="1.9" dy="1.9" layer="1"/>
+<smd name="11" x="-14.1" y="-1.7" dx="1.7" dy="1.8" layer="1"/>
+<smd name="10" x="-12.8" y="3.7" dx="4" dy="1.2" layer="1" rot="R90"/>
+<smd name="8" x="-10.4" y="3.7" dx="4" dy="1.2" layer="1" rot="R90"/>
+<smd name="7" x="-8.4" y="3.7" dx="4" dy="1.2" layer="1" rot="R90"/>
+<smd name="6" x="-6.1" y="3.7" dx="4" dy="1.2" layer="1" rot="R90"/>
+<smd name="5" x="-3.6" y="3.7" dx="4" dy="1.2" layer="1" rot="R90"/>
+<smd name="2" x="3.9" y="3.7" dx="4" dy="1.2" layer="1" rot="R90"/>
+<smd name="4" x="-1.1" y="3.7" dx="4" dy="1.2" layer="1" rot="R90"/>
+<smd name="1" x="6.4" y="3.7" dx="4" dy="1.2" layer="1" rot="R90"/>
+<smd name="3" x="1.4" y="3.7" dx="4" dy="1.2" layer="1" rot="R90"/>
+<smd name="9" x="8.9" y="3.7" dx="4" dy="1.2" layer="1" rot="R90"/>
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+<text x="0.635" y="-0.635" size="1.524" layer="95">OUT</text>
+<pin name="IN" x="-7.62" y="0" visible="off" length="short" direction="in"/>
+<pin name="GND" x="0" y="-7.62" visible="off" length="short" direction="in" rot="R90"/>
+<pin name="OUT" x="7.62" y="0" visible="off" length="short" direction="pas" rot="R180"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="LM1117T" prefix="IC" uservalue="yes">
+<description>&lt;b&gt;VOLTAGE REGULATOR&lt;/b&gt;</description>
+<gates>
+<gate name="1" symbol="LM1117T" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="LM1117T">
+<connects>
+<connect gate="1" pin="GND" pad="IN"/>
+<connect gate="1" pin="IN" pad="OUT"/>
+<connect gate="1" pin="OUT" pad="GND"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+</libraries>
+<attributes>
+</attributes>
+<variantdefs>
+</variantdefs>
+<classes>
+<class number="0" name="default" width="0" drill="0">
+</class>
+</classes>
+<parts>
+<part name="IC1" library="atmel" deviceset="ATMEGA644-*PU" device="" technology="20"/>
+<part name="R1" library="resistor" deviceset="R-EU_" device="0207/12" value="1k8"/>
+<part name="LED1" library="led" deviceset="LED" device="5MM" value="Green"/>
+<part name="LED2" library="led" deviceset="LED" device="5MM" value="Red"/>
+<part name="C1" library="resistor" deviceset="C-EU" device="025-025X050" value="100nF"/>
+<part name="C3" library="resistor" deviceset="CPOL-EU" device="E2.5-5" value="10uF"/>
+<part name="PWR" library="con-molex" deviceset="22-?-02" device="27-2021"/>
+<part name="IEC" library="con-molex" deviceset="22-?-03" device="27-2031"/>
+<part name="R2" library="resistor" deviceset="R-EU_" device="0207/12" value="1k8"/>
+<part name="R3" library="resistor" deviceset="R-EU_" device="0207/12" value="1k8"/>
+<part name="C4" library="rcl" deviceset="C-EU" device="025-025X050" value="33pF"/>
+<part name="C5" library="rcl" deviceset="C-EU" device="025-025X050" value="33pF"/>
+<part name="Q1" library="special" deviceset="XTAL/S" device="" value="8 Mhz"/>
+<part name="P+1" library="supply1" deviceset="VCC" device=""/>
+<part name="GND1" library="supply1" deviceset="GND" device=""/>
+<part name="R4" library="resistor" deviceset="R-EU_" device="0207/12" value="3k3"/>
+<part name="R5" library="resistor" deviceset="R-EU_" device="0207/12" value="3k3"/>
+<part name="R6" library="resistor" deviceset="R-EU_" device="0207/12" value="3k3"/>
+<part name="P+2" library="supply1" deviceset="VCC" device=""/>
+<part name="GND2" library="supply1" deviceset="GND" device=""/>
+<part name="R7" library="resistor" deviceset="R-EU_" device="0207/12" value="560"/>
+<part name="R8" library="resistor" deviceset="R-EU_" device="0207/12" value="560"/>
+<part name="P+3" library="supply1" deviceset="VCC" device=""/>
+<part name="GND3" library="supply1" deviceset="GND" device=""/>
+<part name="GND4" library="supply1" deviceset="GND" device=""/>
+<part name="R9" library="resistor" deviceset="R-EU_" device="0207/12" value="10k"/>
+<part name="P+4" library="supply1" deviceset="VCC" device=""/>
+<part name="RESET" library="switch-omron" deviceset="10-XX" device=""/>
+<part name="GND5" library="supply1" deviceset="GND" device=""/>
+<part name="P+5" library="supply1" deviceset="VCC" device=""/>
+<part name="U$1" library="adafruit" deviceset="SDMMC" device="06132"/>
+<part name="LM1117T" library="MyCustomLibrary" deviceset="LM1117T" device=""/>
+<part name="DISK1" library="switch-omron" deviceset="10-XX" device=""/>
+<part name="DISK2" library="switch-omron" deviceset="10-XX" device=""/>
+<part name="ID8/9" library="adafruit" deviceset="PINHD-1X3" device=""/>
+<part name="ID10/11" library="adafruit" deviceset="PINHD-1X3" device=""/>
+<part name="C2" library="resistor" deviceset="CPOL-EU" device="E2.5-5" value="10uF"/>
+</parts>
+<sheets>
+<sheet>
+<plain>
+<text x="154.94" y="30.48" size="1.778" layer="91">CLK</text>
+<text x="154.94" y="25.4" size="1.778" layer="91">DATA</text>
+<text x="154.94" y="20.32" size="1.778" layer="91">ATN</text>
+<text x="203.2" y="66.04" size="1.778" layer="91" rot="R180">2 - ID8
+3 - ID9</text>
+<text x="195.58" y="50.8" size="1.778" layer="91">5 - ID10
+4 - ID11</text>
+</plain>
+<instances>
+<instance part="IC1" gate="G$1" x="111.76" y="48.26"/>
+<instance part="R1" gate="G$1" x="71.12" y="60.96" rot="R180"/>
+<instance part="LED1" gate="G$1" x="157.48" y="71.12" rot="R270"/>
+<instance part="LED2" gate="G$1" x="167.64" y="68.58" rot="R270"/>
+<instance part="C1" gate="G$1" x="50.8" y="43.18"/>
+<instance part="C3" gate="G$1" x="20.32" y="119.38"/>
+<instance part="PWR" gate="-1" x="5.08" y="35.56" rot="R180"/>
+<instance part="PWR" gate="-2" x="5.08" y="40.64" rot="R180"/>
+<instance part="IEC" gate="-1" x="162.56" y="30.48"/>
+<instance part="IEC" gate="-2" x="162.56" y="25.4"/>
+<instance part="IEC" gate="-3" x="162.56" y="20.32"/>
+<instance part="R2" gate="G$1" x="60.96" y="58.42" rot="R180"/>
+<instance part="R3" gate="G$1" x="71.12" y="53.34" rot="R180"/>
+<instance part="C4" gate="G$1" x="45.72" y="27.94" rot="R270"/>
+<instance part="C5" gate="G$1" x="45.72" y="17.78" rot="R270"/>
+<instance part="Q1" gate="G$1" x="55.88" y="22.86" rot="R270"/>
+<instance part="P+1" gate="VCC" x="10.16" y="48.26"/>
+<instance part="GND1" gate="1" x="10.16" y="27.94"/>
+<instance part="R4" gate="G$1" x="17.78" y="55.88" rot="R270"/>
+<instance part="R5" gate="G$1" x="25.4" y="53.34" rot="R270"/>
+<instance part="R6" gate="G$1" x="33.02" y="48.26" rot="R270"/>
+<instance part="P+2" gate="VCC" x="-22.86" y="137.16"/>
+<instance part="GND2" gate="1" x="5.08" y="104.14"/>
+<instance part="R7" gate="G$1" x="177.8" y="71.12" rot="R180"/>
+<instance part="R8" gate="G$1" x="190.5" y="68.58" rot="R180"/>
+<instance part="P+3" gate="VCC" x="200.66" y="81.28"/>
+<instance part="GND3" gate="1" x="154.94" y="45.72"/>
+<instance part="GND4" gate="1" x="226.06" y="10.16"/>
+<instance part="R9" gate="G$1" x="48.26" y="83.82" rot="R270"/>
+<instance part="P+4" gate="VCC" x="48.26" y="99.06"/>
+<instance part="RESET" gate="1" x="63.5" y="83.82" rot="R270"/>
+<instance part="GND5" gate="1" x="73.66" y="76.2"/>
+<instance part="P+5" gate="VCC" x="165.1" y="45.72"/>
+<instance part="U$1" gate="G$1" x="-33.02" y="78.74" rot="R180"/>
+<instance part="LM1117T" gate="1" x="5.08" y="124.46"/>
+<instance part="DISK1" gate="1" x="210.82" y="30.48" rot="R270"/>
+<instance part="DISK2" gate="1" x="210.82" y="17.78" rot="R270"/>
+<instance part="ID8/9" gate="A" x="213.36" y="63.5"/>
+<instance part="ID10/11" gate="A" x="213.36" y="48.26"/>
+<instance part="C2" gate="G$1" x="-10.16" y="119.38"/>
+</instances>
+<busses>
+</busses>
+<nets>
+<net name="1" class="0">
+<segment>
+<pinref part="PWR" gate="-2" pin="S"/>
+<pinref part="IC1" gate="G$1" pin="VCC"/>
+<wire x1="7.62" y1="40.64" x2="10.16" y2="40.64" width="0.1524" layer="91"/>
+<pinref part="P+1" gate="VCC" pin="VCC"/>
+<wire x1="10.16" y1="40.64" x2="43.18" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="43.18" y1="40.64" x2="43.18" y2="48.26" width="0.1524" layer="91"/>
+<wire x1="43.18" y1="48.26" x2="50.8" y2="48.26" width="0.1524" layer="91"/>
+<wire x1="50.8" y1="48.26" x2="81.28" y2="48.26" width="0.1524" layer="91"/>
+<wire x1="10.16" y1="45.72" x2="10.16" y2="40.64" width="0.1524" layer="91"/>
+<junction x="10.16" y="40.64"/>
+<junction x="50.8" y="48.26"/>
+<pinref part="C1" gate="G$1" pin="1"/>
+<wire x1="50.8" y1="48.26" x2="50.8" y2="45.72" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="P+2" gate="VCC" pin="VCC"/>
+<wire x1="-22.86" y1="134.62" x2="-22.86" y2="124.46" width="0.1524" layer="91"/>
+<wire x1="-22.86" y1="124.46" x2="-10.16" y2="124.46" width="0.1524" layer="91"/>
+<pinref part="LM1117T" gate="1" pin="IN"/>
+<junction x="-10.16" y="124.46"/>
+<wire x1="-10.16" y1="124.46" x2="-2.54" y2="124.46" width="0.1524" layer="91"/>
+<pinref part="C2" gate="G$1" pin="+"/>
+<wire x1="-10.16" y1="124.46" x2="-10.16" y2="121.92" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="P+3" gate="VCC" pin="VCC"/>
+<wire x1="200.66" y1="78.74" x2="200.66" y2="71.12" width="0.1524" layer="91"/>
+<pinref part="R7" gate="G$1" pin="1"/>
+<wire x1="200.66" y1="71.12" x2="182.88" y2="71.12" width="0.1524" layer="91"/>
+<junction x="200.66" y="71.12"/>
+<pinref part="R8" gate="G$1" pin="1"/>
+<wire x1="195.58" y1="68.58" x2="200.66" y2="68.58" width="0.1524" layer="91"/>
+<wire x1="200.66" y1="68.58" x2="200.66" y2="71.12" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="P+4" gate="VCC" pin="VCC"/>
+<pinref part="R9" gate="G$1" pin="1"/>
+<wire x1="48.26" y1="96.52" x2="48.26" y2="88.9" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="IC1" gate="G$1" pin="AVCC"/>
+<pinref part="P+5" gate="VCC" pin="VCC"/>
+<wire x1="142.24" y1="45.72" x2="149.86" y2="45.72" width="0.1524" layer="91"/>
+<wire x1="149.86" y1="45.72" x2="149.86" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="149.86" y1="40.64" x2="165.1" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="165.1" y1="40.64" x2="165.1" y2="43.18" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="GND" class="0">
+<segment>
+<pinref part="PWR" gate="-1" pin="S"/>
+<junction x="10.16" y="35.56"/>
+<junction x="33.02" y="35.56"/>
+<pinref part="R6" gate="G$1" pin="2"/>
+<wire x1="33.02" y1="43.18" x2="33.02" y2="35.56" width="0.1524" layer="91"/>
+<pinref part="C4" gate="G$1" pin="2"/>
+<wire x1="40.64" y1="27.94" x2="38.1" y2="27.94" width="0.1524" layer="91"/>
+<pinref part="C5" gate="G$1" pin="2"/>
+<wire x1="40.64" y1="17.78" x2="38.1" y2="17.78" width="0.1524" layer="91"/>
+<wire x1="38.1" y1="17.78" x2="38.1" y2="27.94" width="0.1524" layer="91"/>
+<junction x="38.1" y="27.94"/>
+<wire x1="38.1" y1="27.94" x2="38.1" y2="35.56" width="0.1524" layer="91"/>
+<pinref part="IC1" gate="G$1" pin="GND"/>
+<wire x1="81.28" y1="45.72" x2="60.96" y2="45.72" width="0.1524" layer="91"/>
+<wire x1="60.96" y1="45.72" x2="60.96" y2="35.56" width="0.1524" layer="91"/>
+<wire x1="60.96" y1="35.56" x2="50.8" y2="35.56" width="0.1524" layer="91"/>
+<pinref part="C1" gate="G$1" pin="2"/>
+<wire x1="50.8" y1="38.1" x2="50.8" y2="35.56" width="0.1524" layer="91"/>
+<junction x="50.8" y="35.56"/>
+<wire x1="50.8" y1="35.56" x2="38.1" y2="35.56" width="0.1524" layer="91"/>
+<junction x="38.1" y="35.56"/>
+<wire x1="38.1" y1="35.56" x2="33.02" y2="35.56" width="0.1524" layer="91"/>
+<wire x1="33.02" y1="35.56" x2="25.4" y2="35.56" width="0.1524" layer="91"/>
+<junction x="25.4" y="35.56"/>
+<pinref part="R5" gate="G$1" pin="2"/>
+<wire x1="25.4" y1="48.26" x2="25.4" y2="35.56" width="0.1524" layer="91"/>
+<wire x1="25.4" y1="35.56" x2="17.78" y2="35.56" width="0.1524" layer="91"/>
+<junction x="17.78" y="35.56"/>
+<pinref part="R4" gate="G$1" pin="2"/>
+<wire x1="17.78" y1="50.8" x2="17.78" y2="35.56" width="0.1524" layer="91"/>
+<wire x1="17.78" y1="35.56" x2="10.16" y2="35.56" width="0.1524" layer="91"/>
+<wire x1="10.16" y1="35.56" x2="7.62" y2="35.56" width="0.1524" layer="91"/>
+<pinref part="GND1" gate="1" pin="GND"/>
+<wire x1="10.16" y1="30.48" x2="10.16" y2="35.56" width="0.1524" layer="91"/>
+<junction x="38.1" y="35.56"/>
+<wire x1="38.1" y1="81.28" x2="38.1" y2="88.9" width="0.1524" layer="91"/>
+<wire x1="38.1" y1="91.44" x2="-20.32" y2="91.44" width="0.1524" layer="91"/>
+<wire x1="38.1" y1="91.44" x2="38.1" y2="88.9" width="0.1524" layer="91"/>
+<wire x1="38.1" y1="88.9" x2="-20.32" y2="88.9" width="0.1524" layer="91"/>
+<junction x="38.1" y="91.44"/>
+<wire x1="38.1" y1="81.28" x2="-20.32" y2="81.28" width="0.1524" layer="91"/>
+<junction x="38.1" y="78.74"/>
+<junction x="38.1" y="81.28"/>
+<wire x1="-20.32" y1="78.74" x2="38.1" y2="78.74" width="0.1524" layer="91"/>
+<wire x1="38.1" y1="81.28" x2="38.1" y2="78.74" width="0.1524" layer="91"/>
+<wire x1="38.1" y1="78.74" x2="38.1" y2="35.56" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$1" pin="VSS1"/>
+<pinref part="U$1" gate="G$1" pin="VSS2"/>
+<pinref part="U$1" gate="G$1" pin="DAT1"/>
+<pinref part="U$1" gate="G$1" pin="DAT2"/>
+<junction x="38.1" y="88.9"/>
+<label x="-10.16" y="88.9" size="1.778" layer="95"/>
+<label x="-10.16" y="91.44" size="1.778" layer="95"/>
+<label x="-10.16" y="81.28" size="1.778" layer="95"/>
+<label x="-10.16" y="78.74" size="1.778" layer="95"/>
+<wire x1="38.1" y1="91.44" x2="38.1" y2="96.52" width="0.1524" layer="91"/>
+<wire x1="38.1" y1="96.52" x2="-20.32" y2="96.52" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$1" pin="GND"/>
+<label x="-10.16" y="96.52" size="1.778" layer="95"/>
+</segment>
+<segment>
+<pinref part="GND2" gate="1" pin="GND"/>
+<junction x="5.08" y="111.76"/>
+<wire x1="5.08" y1="111.76" x2="5.08" y2="106.68" width="0.1524" layer="91"/>
+<wire x1="5.08" y1="111.76" x2="-10.16" y2="111.76" width="0.1524" layer="91"/>
+<pinref part="C3" gate="G$1" pin="-"/>
+<wire x1="20.32" y1="114.3" x2="20.32" y2="111.76" width="0.1524" layer="91"/>
+<wire x1="20.32" y1="111.76" x2="5.08" y2="111.76" width="0.1524" layer="91"/>
+<pinref part="LM1117T" gate="1" pin="GND"/>
+<wire x1="5.08" y1="116.84" x2="5.08" y2="111.76" width="0.1524" layer="91"/>
+<pinref part="C2" gate="G$1" pin="-"/>
+<wire x1="-10.16" y1="114.3" x2="-10.16" y2="111.76" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="GND3" gate="1" pin="GND"/>
+<pinref part="IC1" gate="G$1" pin="GND@1"/>
+<wire x1="154.94" y1="48.26" x2="142.24" y2="48.26" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="RESET" gate="1" pin="S"/>
+<pinref part="GND5" gate="1" pin="GND"/>
+<wire x1="68.58" y1="83.82" x2="73.66" y2="83.82" width="0.1524" layer="91"/>
+<wire x1="73.66" y1="83.82" x2="73.66" y2="81.28" width="0.1524" layer="91"/>
+<pinref part="RESET" gate="1" pin="S1"/>
+<wire x1="73.66" y1="81.28" x2="73.66" y2="78.74" width="0.1524" layer="91"/>
+<wire x1="68.58" y1="81.28" x2="73.66" y2="81.28" width="0.1524" layer="91"/>
+<junction x="73.66" y="81.28"/>
+</segment>
+<segment>
+<pinref part="GND4" gate="1" pin="GND"/>
+<wire x1="226.06" y1="55.88" x2="226.06" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="226.06" y1="40.64" x2="226.06" y2="30.48" width="0.1524" layer="91"/>
+<wire x1="226.06" y1="30.48" x2="226.06" y2="17.78" width="0.1524" layer="91"/>
+<wire x1="226.06" y1="17.78" x2="226.06" y2="12.7" width="0.1524" layer="91"/>
+<junction x="226.06" y="30.48"/>
+<junction x="226.06" y="17.78"/>
+<pinref part="DISK1" gate="1" pin="S"/>
+<wire x1="215.9" y1="30.48" x2="226.06" y2="30.48" width="0.1524" layer="91"/>
+<pinref part="DISK2" gate="1" pin="S"/>
+<wire x1="215.9" y1="17.78" x2="226.06" y2="17.78" width="0.1524" layer="91"/>
+<pinref part="ID8/9" gate="A" pin="2"/>
+<wire x1="210.82" y1="63.5" x2="208.28" y2="63.5" width="0.1524" layer="91"/>
+<wire x1="208.28" y1="63.5" x2="208.28" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="208.28" y1="55.88" x2="226.06" y2="55.88" width="0.1524" layer="91"/>
+<junction x="226.06" y="40.64"/>
+<pinref part="ID10/11" gate="A" pin="2"/>
+<wire x1="210.82" y1="48.26" x2="208.28" y2="48.26" width="0.1524" layer="91"/>
+<wire x1="208.28" y1="48.26" x2="208.28" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="208.28" y1="40.64" x2="226.06" y2="40.64" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$1" class="0">
+<segment>
+<pinref part="Q1" gate="G$1" pin="1"/>
+<pinref part="C4" gate="G$1" pin="1"/>
+<wire x1="55.88" y1="27.94" x2="48.26" y2="27.94" width="0.1524" layer="91"/>
+<junction x="55.88" y="27.94"/>
+<wire x1="55.88" y1="27.94" x2="63.5" y2="27.94" width="0.1524" layer="91"/>
+<wire x1="63.5" y1="27.94" x2="63.5" y2="43.18" width="0.1524" layer="91"/>
+<pinref part="IC1" gate="G$1" pin="XTAL2"/>
+<wire x1="63.5" y1="43.18" x2="81.28" y2="43.18" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$2" class="0">
+<segment>
+<pinref part="Q1" gate="G$1" pin="2"/>
+<pinref part="C5" gate="G$1" pin="1"/>
+<wire x1="55.88" y1="17.78" x2="48.26" y2="17.78" width="0.1524" layer="91"/>
+<junction x="55.88" y="17.78"/>
+<pinref part="IC1" gate="G$1" pin="XTAL1"/>
+<wire x1="81.28" y1="40.64" x2="66.04" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="66.04" y1="40.64" x2="66.04" y2="17.78" width="0.1524" layer="91"/>
+<wire x1="66.04" y1="17.78" x2="55.88" y2="17.78" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="CLOCK" class="0">
+<segment>
+<pinref part="R6" gate="G$1" pin="1"/>
+<pinref part="R3" gate="G$1" pin="2"/>
+<wire x1="33.02" y1="53.34" x2="66.04" y2="53.34" width="0.1524" layer="91"/>
+<junction x="33.02" y="53.34"/>
+<wire x1="33.02" y1="53.34" x2="33.02" y2="73.66" width="0.1524" layer="91"/>
+<wire x1="33.02" y1="73.66" x2="-20.32" y2="73.66" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$1" pin="SCLK"/>
+<label x="-10.16" y="73.66" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="N$5" class="0">
+<segment>
+<pinref part="R3" gate="G$1" pin="1"/>
+<pinref part="IC1" gate="G$1" pin="PCINT15/SCK_PB7"/>
+<wire x1="76.2" y1="53.34" x2="81.28" y2="53.34" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="CARD_SELECT" class="0">
+<segment>
+<pinref part="R4" gate="G$1" pin="1"/>
+<pinref part="R1" gate="G$1" pin="2"/>
+<wire x1="17.78" y1="60.96" x2="66.04" y2="60.96" width="0.1524" layer="91"/>
+<junction x="17.78" y="60.96"/>
+<wire x1="17.78" y1="60.96" x2="17.78" y2="76.2" width="0.1524" layer="91"/>
+<wire x1="17.78" y1="76.2" x2="-20.32" y2="76.2" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$1" pin="CS"/>
+<label x="-10.16" y="76.2" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="N$8" class="0">
+<segment>
+<pinref part="R1" gate="G$1" pin="1"/>
+<pinref part="IC1" gate="G$1" pin="PCINT12/OC0B/SS_PB4"/>
+<wire x1="76.2" y1="60.96" x2="81.28" y2="60.96" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$9" class="0">
+<segment>
+<pinref part="R2" gate="G$1" pin="1"/>
+<pinref part="IC1" gate="G$1" pin="PCINT13/MOSI_PB5"/>
+<wire x1="66.04" y1="58.42" x2="81.28" y2="58.42" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="DATA_IN" class="0">
+<segment>
+<pinref part="R2" gate="G$1" pin="2"/>
+<pinref part="R5" gate="G$1" pin="1"/>
+<wire x1="25.4" y1="58.42" x2="55.88" y2="58.42" width="0.1524" layer="91"/>
+<junction x="25.4" y="58.42"/>
+<wire x1="25.4" y1="58.42" x2="25.4" y2="71.12" width="0.1524" layer="91"/>
+<wire x1="25.4" y1="71.12" x2="-20.32" y2="71.12" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$1" pin="DATA_IN"/>
+<label x="-10.16" y="71.12" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="DATA_OUT" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="PCINT14/MISO_PB6"/>
+<wire x1="81.28" y1="55.88" x2="40.64" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="40.64" y1="55.88" x2="40.64" y2="68.58" width="0.1524" layer="91"/>
+<wire x1="40.64" y1="68.58" x2="-20.32" y2="68.58" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$1" pin="DATA_OUT"/>
+<label x="-10.16" y="68.58" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="N$13" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="PCINT16/SCL_PC0"/>
+<pinref part="IEC" gate="-3" pin="S"/>
+<wire x1="142.24" y1="25.4" x2="149.86" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="149.86" y1="25.4" x2="149.86" y2="20.32" width="0.1524" layer="91"/>
+<wire x1="149.86" y1="20.32" x2="160.02" y2="20.32" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$14" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="PCINT17/SDA_PC1"/>
+<wire x1="142.24" y1="27.94" x2="152.4" y2="27.94" width="0.1524" layer="91"/>
+<wire x1="152.4" y1="27.94" x2="152.4" y2="25.4" width="0.1524" layer="91"/>
+<pinref part="IEC" gate="-2" pin="S"/>
+<wire x1="152.4" y1="25.4" x2="160.02" y2="25.4" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$15" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="PCINT18/TCK_PC2"/>
+<wire x1="142.24" y1="30.48" x2="160.02" y2="30.48" width="0.1524" layer="91"/>
+<pinref part="IEC" gate="-1" pin="S"/>
+</segment>
+</net>
+<net name="N$11" class="0">
+<segment>
+<pinref part="R7" gate="G$1" pin="2"/>
+<pinref part="LED1" gate="G$1" pin="A"/>
+<wire x1="172.72" y1="71.12" x2="160.02" y2="71.12" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$12" class="0">
+<segment>
+<pinref part="LED1" gate="G$1" pin="C"/>
+<pinref part="IC1" gate="G$1" pin="PCINT0/ADC0_PA0"/>
+<wire x1="152.4" y1="71.12" x2="142.24" y2="71.12" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$16" class="0">
+<segment>
+<pinref part="LED2" gate="G$1" pin="C"/>
+<pinref part="IC1" gate="G$1" pin="PCINT1/ADC1_PA1"/>
+<wire x1="162.56" y1="68.58" x2="142.24" y2="68.58" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$17" class="0">
+<segment>
+<pinref part="LED2" gate="G$1" pin="A"/>
+<pinref part="R8" gate="G$1" pin="2"/>
+<wire x1="170.18" y1="68.58" x2="185.42" y2="68.58" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$19" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="PCINT2/ADC2_PA2"/>
+<pinref part="ID8/9" gate="A" pin="1"/>
+<wire x1="142.24" y1="66.04" x2="210.82" y2="66.04" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$18" class="0">
+<segment>
+<pinref part="RESET" gate="1" pin="P"/>
+<pinref part="R9" gate="G$1" pin="2"/>
+<wire x1="48.26" y1="78.74" x2="48.26" y2="50.8" width="0.1524" layer="91"/>
+<pinref part="IC1" gate="G$1" pin="!RESET"/>
+<wire x1="48.26" y1="50.8" x2="53.34" y2="50.8" width="0.1524" layer="91"/>
+<junction x="53.34" y="50.8"/>
+<wire x1="53.34" y1="50.8" x2="81.28" y2="50.8" width="0.1524" layer="91"/>
+<wire x1="58.42" y1="83.82" x2="53.34" y2="83.82" width="0.1524" layer="91"/>
+<wire x1="53.34" y1="83.82" x2="53.34" y2="81.28" width="0.1524" layer="91"/>
+<pinref part="RESET" gate="1" pin="P1"/>
+<wire x1="53.34" y1="81.28" x2="53.34" y2="50.8" width="0.1524" layer="91"/>
+<wire x1="58.42" y1="81.28" x2="53.34" y2="81.28" width="0.1524" layer="91"/>
+<junction x="53.34" y="81.28"/>
+</segment>
+</net>
+<net name="VDD" class="0">
+<segment>
+<pinref part="C3" gate="G$1" pin="+"/>
+<wire x1="20.32" y1="124.46" x2="20.32" y2="121.92" width="0.1524" layer="91"/>
+<wire x1="20.32" y1="124.46" x2="33.02" y2="124.46" width="0.1524" layer="91"/>
+<wire x1="33.02" y1="124.46" x2="33.02" y2="86.36" width="0.1524" layer="91"/>
+<wire x1="33.02" y1="86.36" x2="-20.32" y2="86.36" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$1" pin="VDD"/>
+<label x="-10.16" y="86.36" size="1.778" layer="95"/>
+<junction x="20.32" y="124.46"/>
+<pinref part="LM1117T" gate="1" pin="OUT"/>
+<wire x1="12.7" y1="124.46" x2="20.32" y2="124.46" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$7" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="PCINT26/INT0_PD2"/>
+<wire x1="81.28" y1="33.02" x2="76.2" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="76.2" y1="33.02" x2="76.2" y2="10.16" width="0.1524" layer="91"/>
+<wire x1="76.2" y1="10.16" x2="-15.24" y2="10.16" width="0.1524" layer="91"/>
+<wire x1="-15.24" y1="10.16" x2="-15.24" y2="58.42" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$1" pin="CARD_DETECT"/>
+<wire x1="-15.24" y1="58.42" x2="-20.32" y2="58.42" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$27" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="PCINT30/OC2B/ICP_PD6"/>
+<wire x1="81.28" y1="22.86" x2="78.74" y2="22.86" width="0.1524" layer="91"/>
+<wire x1="78.74" y1="22.86" x2="78.74" y2="7.62" width="0.1524" layer="91"/>
+<wire x1="78.74" y1="7.62" x2="-12.7" y2="7.62" width="0.1524" layer="91"/>
+<wire x1="-12.7" y1="7.62" x2="-12.7" y2="63.5" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$1" pin="WRITE_PROTECT"/>
+<wire x1="-12.7" y1="63.5" x2="-20.32" y2="63.5" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$3" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="PCINT3/ADC3_PA3"/>
+<wire x1="142.24" y1="63.5" x2="172.72" y2="63.5" width="0.1524" layer="91"/>
+<wire x1="172.72" y1="63.5" x2="172.72" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="172.72" y1="55.88" x2="185.42" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="185.42" y1="55.88" x2="185.42" y2="50.8" width="0.1524" layer="91"/>
+<wire x1="185.42" y1="50.8" x2="210.82" y2="50.8" width="0.1524" layer="91"/>
+<pinref part="ID10/11" gate="A" pin="1"/>
+</segment>
+</net>
+<net name="N$20" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="PCINT4/ADC4_PA4"/>
+<wire x1="142.24" y1="60.96" x2="170.18" y2="60.96" width="0.1524" layer="91"/>
+<wire x1="170.18" y1="60.96" x2="170.18" y2="53.34" width="0.1524" layer="91"/>
+<wire x1="170.18" y1="53.34" x2="182.88" y2="53.34" width="0.1524" layer="91"/>
+<wire x1="182.88" y1="53.34" x2="182.88" y2="30.48" width="0.1524" layer="91"/>
+<pinref part="DISK1" gate="1" pin="P"/>
+<wire x1="182.88" y1="30.48" x2="205.74" y2="30.48" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$22" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="PCINT5/ADC5_PA5"/>
+<wire x1="142.24" y1="58.42" x2="167.64" y2="58.42" width="0.1524" layer="91"/>
+<wire x1="167.64" y1="58.42" x2="167.64" y2="50.8" width="0.1524" layer="91"/>
+<wire x1="167.64" y1="50.8" x2="180.34" y2="50.8" width="0.1524" layer="91"/>
+<wire x1="180.34" y1="50.8" x2="180.34" y2="17.78" width="0.1524" layer="91"/>
+<pinref part="DISK2" gate="1" pin="P"/>
+<wire x1="180.34" y1="17.78" x2="205.74" y2="17.78" width="0.1524" layer="91"/>
+</segment>
+</net>
+</nets>
+</sheet>
+</sheets>
+<errors>
+<approved hash="104,1,142.24,45.72,IC1,AVCC,VCC,,,"/>
+<approved hash="113,1,63.5,85.9705,RESET,,,,,"/>
+</errors>
+</schematic>
+</drawing>
+<compatibility>
+<note version="6.3" minversion="6.2.2" severity="warning">
+Since Version 6.2.2 text objects can contain more than one line,
+which will not be processed correctly with this version.
+</note>
+</compatibility>
+</eagle>
diff --git a/trunk/AVRProjects/sd2iec/larsp/sd2iecv1-2.rar b/trunk/AVRProjects/sd2iec/larsp/sd2iecv1-2.rar
new file mode 100644
index 00000000..7a299fd8
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/larsp/sd2iecv1-2.rar differ
diff --git a/trunk/AVRProjects/sd2iec/newboot-0.4.1-binaries.zip b/trunk/AVRProjects/sd2iec/newboot-0.4.1-binaries.zip
new file mode 100644
index 00000000..07c0ffb6
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/newboot-0.4.1-binaries.zip differ
diff --git a/trunk/AVRProjects/sd2iec/sd2iec (Firmware) – C64-Wiki.website b/trunk/AVRProjects/sd2iec/sd2iec (Firmware) – C64-Wiki.website
new file mode 100644
index 00000000..58617fba
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/sd2iec (Firmware) – C64-Wiki.website	
@@ -0,0 +1,17 @@
+[{000214A0-0000-0000-C000-000000000046}]
+Prop4=31,sd2iec (Firmware) – C64-Wiki
+Prop3=19,11
+[{000214A0-0000-0000-C000-000000000046}.A]
+Prop4=31,sd2iec (Firmware) – C64-Wiki
+[{000214A0-0000-0000-C000-000000000046}.W]
+Prop4=31,sd2iec (Firmware) +IBM- C64-Wiki
+[{A7AF692E-098D-4C08-A225-D433CA835ED0}]
+Prop5=3,0
+Prop9=19,0
+[InternetShortcut]
+URL=https://www.c64-wiki.de/index.php/sd2iec_(Firmware)
+IDList=
+IconFile=https://www.c64-wiki.de/favicon.ico
+IconIndex=1
+[{9F4C2855-9F79-4B39-A8D0-E1D42DE1D5F3}]
+Prop5=8,Microsoft.Website.B6800B9.361E60D2
diff --git a/trunk/AVRProjects/sd2iec/sd2iec-current-binaries_1.0.0.zip b/trunk/AVRProjects/sd2iec/sd2iec-current-binaries_1.0.0.zip
new file mode 100644
index 00000000..1522b2f0
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/sd2iec-current-binaries_1.0.0.zip differ
diff --git a/trunk/AVRProjects/sd2iec/sd2iec-current-sources_1.0.0.tar.gz b/trunk/AVRProjects/sd2iec/sd2iec-current-sources_1.0.0.tar.gz
new file mode 100644
index 00000000..592ec8a6
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/sd2iec-current-sources_1.0.0.tar.gz differ
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/COPYING b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/COPYING
new file mode 100644
index 00000000..d511905c
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/COPYING
@@ -0,0 +1,339 @@
+		    GNU GENERAL PUBLIC LICENSE
+		       Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+			    Preamble
+
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users.  This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it.  (Some other Free Software Foundation software is covered by
+the GNU Lesser General Public License instead.)  You can apply it to
+your programs, too.
+
+  When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+
+  To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+
+  For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have.  You must make sure that they, too, receive or can get the
+source code.  And you must show them these terms so they know their
+rights.
+
+  We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+
+  Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software.  If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors' reputations.
+
+  Finally, any free program is threatened constantly by software
+patents.  We wish to avoid the danger that redistributors of a free
+program will individually obtain patent licenses, in effect making the
+program proprietary.  To prevent this, we have made it clear that any
+patent must be licensed for everyone's free use or not licensed at all.
+
+  The precise terms and conditions for copying, distribution and
+modification follow.
+
+		    GNU GENERAL PUBLIC LICENSE
+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+  0. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License.  The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
+either verbatim or with modifications and/or translated into another
+language.  (Hereinafter, translation is included without limitation in
+the term "modification".)  Each licensee is addressed as "you".
+
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope.  The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+
+  1. You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+
+  2. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+
+    a) You must cause the modified files to carry prominent notices
+    stating that you changed the files and the date of any change.
+
+    b) You must cause any work that you distribute or publish, that in
+    whole or in part contains or is derived from the Program or any
+    part thereof, to be licensed as a whole at no charge to all third
+    parties under the terms of this License.
+
+    c) If the modified program normally reads commands interactively
+    when run, you must cause it, when started running for such
+    interactive use in the most ordinary way, to print or display an
+    announcement including an appropriate copyright notice and a
+    notice that there is no warranty (or else, saying that you provide
+    a warranty) and that users may redistribute the program under
+    these conditions, and telling the user how to view a copy of this
+    License.  (Exception: if the Program itself is interactive but
+    does not normally print such an announcement, your work based on
+    the Program is not required to print an announcement.)
+
+These requirements apply to the modified work as a whole.  If
+identifiable sections of that work are not derived from the Program,
+and can be reasonably considered independent and separate works in
+themselves, then this License, and its terms, do not apply to those
+sections when you distribute them as separate works.  But when you
+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote it.
+
+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
+collective works based on the Program.
+
+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
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+  3. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
+
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+
+  4. You may not copy, modify, sublicense, or distribute the Program
+except as expressly provided under this License.  Any attempt
+otherwise to copy, modify, sublicense or distribute the Program is
+void, and will automatically terminate your rights under this License.
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+  5. You are not required to accept this License, since you have not
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+
+  6. Each time you redistribute the Program (or any work based on the
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+
+If any portion of this section is held invalid or unenforceable under
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+
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+
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+
+  8. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
+may add an explicit geographical distribution limitation excluding
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+
+  9. The Free Software Foundation may publish revised and/or new versions
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+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+Each version is given a distinguishing version number.  If the Program
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+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation.  If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+
+  10. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
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+			    NO WARRANTY
+
+  11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
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+  12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
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+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
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+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+		     END OF TERMS AND CONDITIONS
+
+	    How to Apply These Terms to Your New Programs
+
+  If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+  To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+    <one line to give the program's name and a brief idea of what it does.>
+    Copyright (C) <year>  <name of author>
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License along
+    with this program; if not, write to the Free Software Foundation, Inc.,
+    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+    Gnomovision version 69, Copyright (C) year name of author
+    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+    This is free software, and you are welcome to redistribute it
+    under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License.  Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  Here is a sample; alter the names:
+
+  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+  `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+  <signature of Ty Coon>, 1 April 1989
+  Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs.  If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library.  If this is what you want to do, use the GNU Lesser General
+Public License instead of this License.
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/Makefile b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/Makefile
new file mode 100644
index 00000000..3250bd9b
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/Makefile
@@ -0,0 +1,37 @@
+# Hey Emacs, this is a -*- makefile -*-
+
+ifndef CONFIG
+  CONFIG = config
+endif
+
+CONFDATA     := $(shell scripts/configparser.pl --confdata $(CONFIG))
+CONFIGSUFFIX := $(word 1,$(CONFDATA))
+OBJDIR       := obj-$(CONFIGSUFFIX)
+CONFFILES    := $(wordlist 2,99,$(CONFDATA))
+
+export CONFIGSUFFIX CONFIG OBJDIR
+
+# Enable verbose compilation with "make V=1"
+ifdef V
+ Q :=
+ E := @:
+else
+ Q := @
+ E := @echo
+endif
+
+all: $(OBJDIR) $(OBJDIR)/make.inc
+	$(Q)$(MAKE) --no-print-directory -f scripts/Makefile.main
+
+$(OBJDIR)/make.inc: $(CONFFILES) | $(OBJDIR)
+	$(E) "  CONFIG $(CONFFILES)"
+	$(Q)scripts/configparser.pl --genfiles --makeinc $(OBJDIR)/make.inc --header $(OBJDIR)/autoconf.h $(CONFIG)
+
+$(OBJDIR):
+	$(E) "  MKDIR  $(OBJDIR)"
+	-$(Q)mkdir $(OBJDIR)
+
+copy clean fuses program: FORCE | $(OBJDIR) $(OBJDIR)/make.inc
+	$(Q)$(MAKE) --no-print-directory -f scripts/Makefile.main $@
+
+FORCE: ;
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/NEWS b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/NEWS
new file mode 100644
index 00000000..155e5f43
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/NEWS
@@ -0,0 +1,281 @@
+201x-xx-xx - release 1.0.0
+        - Bugfix: use valid default date if RTC is not detected
+        - formatting for D71/D81/DNP images
+        - DolphinDOS parallel speeder support
+        - PREV button mounts last line of autoswap.lst
+        - removed XB command
+        - explicit PETSCII marker in swaplists
+        - load previous file when "*" is used
+        - redirect C128 boot sector to bootsect.128 on FAT
+        - ISO8601-like format for T-R and T-W
+        - autoswap list generation
+        - persistent mini-filesystem in EEPROM
+        - Maniac Mansion + Zak McKracken loaders
+
+2012-02-26 - release 0.10.3
+        - Bugfix: Un-break I2C display communication
+
+2011-12-18 - release 0.10.2
+        - Bugfix: End of generated raw directory was incorrect
+        - Bugfix: Various compilation fixes when fastloaders are disabled
+        - ULoad M3 automatically exits when ATN becomes active
+        - Minor code space improvements
+        - New fastloader: ELoad Version 1 (EasyProg)
+
+2010-12-25 - release 0.10.1
+        - Bugfix: Remove remains of previous commands while parsing B-*
+        - Bugfix: Fix response of UI command for unknown suffix chars
+        - small improvement of JiffyDOS transfer speeds
+
+2010-11-07 - release 0.10.0
+        - Deprecation notice:
+          E-R and E-W commands will be removed in the next release
+        - Improved reliability of Nippon loader
+
+2010-10-31 - release 0.10.0pre5
+        - Bugfix: Avoid duplicate file name when DEL/DIR matches
+        - Bugfix: Reduce chance of data corruption in Wheels
+        - Bugfix: Slightly relax IEC timing while waiting for command
+        - Added AR6 1581 fastloader+saver (PAL)
+
+2010-10-26 - release 0.10.0pre4
+        - Bugfix: Wheels with SuperCPU timing issue corrected
+        - Bugfix: Rare problem with ~ in FAT file names fixed
+        - Added compile-time option to capture fastloader code
+        - Added Wheels 4.4 fast loaders
+        - Added another variation of the Epyx Fastload cart
+        - Added Nippon fast loader
+
+2010-10-16 - release 0.10.0pre3
+        - Bugfix: Wheels 128 loader detection fixed
+        - Added a second Epyx Fastload variation
+
+2010-10-15 - release 0.10.0pre2
+        - Bugfix: G-P answer fixed
+        - Bugfix: Strip 0x0d from file names when appropiate
+        - Wheels support
+
+2010-08-06 - release 0.10.0pre1
+        - GEOS 2.0 support (d64/d71/d81 images only)
+        - File-based M-R emulation
+        - Removed "oldnkc" configuration
+
+2010-08-02 - release 0.9.3
+        - Bugfix: Extension hiding works again with names >12 characters
+        - Bugfix: Increase data hold time during standard TALK
+        - Testing aid: card detect-to-LED function
+
+2010-06-21 - release 0.9.2
+        - Bugfix: Rename was broken on FAT
+        - Turbodisk is now disabled when running on internal RC clock
+        - button debounce timeout increased
+
+2010-03-07 - release 0.9.1
+        - Bugfix: Filling unused REL records used wrong offsets
+        - Bugfix: Unbreak case-insensitive matching of FAT file names
+        - Bugfix: Fix raw directory mode for D64/D71/D81
+        - Bugfix: Tell the display about REL files too
+        - add preliminary support for the ATmega1284P
+
+2010-02-28 - release 0.9.0
+        - Bugfix: REL offset calculation for records 256,512,...
+        - Bugfix: Non-REL P command parameters now match README
+        - Bugfix: Reading after EOI behaves correctly now
+        - Red LED only active while unwritten data in memory
+        - Remove XC,XJ commands
+        - New fastloader: ULoad Model 3
+        - New fastloader: G.I. Joe (said to be commonly ripped)
+        - New fastloader: Epyx FastLoad cartridge
+        - Support reading raw directory ($ with secondary > 0)
+        - "display disk images as directories"-mode
+        - DNP support
+        - remote display support
+        - build system doesn't require gawk anymore
+
+2009-12-16 - release 0.8.3
+        - Bugfix: Really prevent random corruption on FAT32 media
+        - Bugfix: Free buffer after copying files
+
+2009-09-27 - release 0.8.2
+        - Bugfix: Prevent random storage corruption on FAT32 media
+        - Bugfix: Image files not mountable if read-only file or media
+        - Bugfix: Do not clear error channel if sec. 15 is closed
+        - Add a dummy RTC read during init (to update year if required)
+        - Enable I2C RTC support in LarsP configuration for Final Expansion 3
+        - Acknowledge ATN during initialisation to stall C64 if required
+
+2009-05-24 - release 0.8.1a
+        - Fix bootloader version number generation
+
+2009-05-20 - release 0.8.1
+        - Fix uIEC/IDE SD card change detection
+        - Dreamload support for uIEC
+        - Mark the RTC time as valid after setting the clock
+        - Delay SPI initialisation until absolutely required
+        - Show disk change confirmation even when the error blink is active
+        - Exit the FC3 fastloader if ATN is active
+        - Fix indentation of 1000+ block files
+        - Remove 0-byte from the long version message
+        - Fix multiple save-with-replace bugs
+        - Ignore directories when matching file name wildcards
+
+2009-03-08 - release 0.8.0
+        - direct sector access of the real storage device
+        - ignore DEL files in file_open
+        - drive mapper
+        - EXOS V3 fastloader support
+        - requires avr-libc 1.6.x
+
+2008-10-02 - release 0.8.0pre1
+        - Implement Dreamload emulation
+        - RTC support
+        - Dataflash support
+        - Multi-file scratch
+        - Copy command
+        - Large buffer support
+        - Final Cartridge 3 freezed file fastloader support
+        - D71/D81 disk image support
+        - parse FSINFO sector for faster FAT32 free space calculation
+        - partial REL file support
+
+2008-07-09 - release 0.7.3
+        - Bugfix: Free buffers on error in M2I and D64
+          (fixes "D64 size increases to 1.1M when its free space runs out")
+
+2008-06-10 - release 0.7.2
+        - Bugfix: rename doesn't corrupt files with hidden extensions anymore
+        - Bugfix: RD works again
+        - Bugfix: On uIEC the ATN ACK interrupt was never disabled
+        - case-insensitive matching of FAT filenames
+
+2008-06-05 - release 0.7.1
+        - Bugfix: Mark sectors 18/0 and 18/1 as used during D64 format
+        - Bugfix: Single-char dir patterns are directory numbers
+        - Bugfix: Short N: on D64 should clean only the first dir sector
+        - case-insensitive matching of FAT filenames
+        - ask the AR6 to not use its fastloader/-saver
+
+2008-05-02 - release 0.7.0
+        - does not support the ATmega32 anymore
+        - Match trailing part of names after * too
+          + option to disable that
+        - Multi-drive/partition support
+        - Dual SD card support (some configurations)
+        - Rename
+        - transparent support for P/S/U/R00 files (read+create)
+          + option to disable x00 writing
+        - file-type suffix detection+generation
+          + option to disable that
+        - Final Cartridge III fast-load/save
+        - Sleep mode
+        - Extended swaplist navigation (next/prev/home)
+        - extended version query
+        - CMD-style timestamped short directory listings
+        - CMD-style partition directory
+        - CMD-style G-P command (get partition info)
+        - FAT32 free block count can be disabled
+        - D64 error info block parsing
+        - stricter, but better parser (supports wildcards in path names)
+
+2008-03-27 - release 0.6.4
+        - Change some details of the SD card initialisation
+        - Bugfix: Initialize cards only when sd2iec is accessed to avoid
+                  hogging the bus during this time.
+        - Prepare NKC configuration for bootloader and mega644
+
+2008-03-19 - release 0.6.3
+        - Bugfix: Ignore trailing separation characters of B-* parameters
+        - Bugfix: Always ignore volume labels while scanning for LFNs
+        - Bugfix: SDHC was always disabled in 0.6.x
+        - Bugfix: Ignore spaces in drive number
+        - Bugfix: Fix possible error after changing partitioned cards
+        - Bugfix: Case-insensitive name matching in the FAT library
+                  (but not in sd2iec)
+        - Bugfix: Fix compile error with larsp configuration on mega644
+        - Wait for the release of the disk change key before trying to
+          access a swap list
+        - Remove some ancient not-true-anymore statements from README
+        - Improve sector read performance
+        - Reduce unecessary reads during seeking
+ 
+2008-02-24 - release 0.6.2
+        - Bugfix: Read the correct pins when determining the device
+                  address in LarsP and NKC configurations
+
+2008-02-22 - release 0.6.1
+        - support for NKC MMC2IEC boards (untested)
+        - case-insensitive matching of M2I and D64
+
+2008-02-20 - release 0.6
+        - Bugfix: Properly emulate B-R/B-W (fixes Pirates!)
+        - Bugfix: Close buffers on I (fixes Drazpaint)
+        - Bugfix: Create new error message after closing channel 15
+        - Bugfix: Check for illegal track/sector while D64 is active
+        - reworked source configuration system
+        - externalized bootloader signature generation
+        - Support for long file names on FAT
+        - M-R returns (random) data
+        - New commands E-R, E-W: Read/write reserved area of EEPROM
+        - Added U0> for device address changes
+        - device address is stored in the EEPROM
+        - Directories starting with . are hidden in FAT
+        - support for sd2iec 1.0 PCBs
+
+2008-01-13 - release 0.5.1
+        - Bugfix: Really disable JTAG - fixes very slow access on some
+          hardware variants
+
+2008-01-12 - release 0.5
+        - Bugfix: Recode ~/pi in both directions
+        - Bugfix: Fastloaders now work on LarsP-style hardware too
+        - Disk change key support
+        - Full JiffyDos support
+        - EEPROM configuration storage
+        - Full support for D64, read/write/sector access
+
+2007-12-25 - release 0.4.2
+        - Bugfix: LarsP-style hardware actually works now
+
+2007-12-19 - release 0.4.1
+        - Bugfix: Creating a new file within an M2I image wrote
+                  a terminating zero byte into the M2I directory entry
+        - Bugfix: Another guesstimated delay in iec_putc
+        - AVR Studio project file updated
+
+2007-12-07 - release 0.4
+        - Extended DOS commands:
+          - Enable/Disable JiffyDOS
+          - Set oscillator calibration
+        - Full support for M2I images
+
+2007-11-29 - release 0.3
+        - disable interrupts during iec_getc
+        - add full CRC checking in SD code with retries on errors
+        - software fastloader support: Turbodisk protocol
+        - card change detection
+        - better file name parsing
+        - directory loading supports wildcards
+        - support for file overwrite (@)
+        - option to display hidden files in directory
+        - filename matching for open
+        - filename matching for scratch
+
+2007-11-02 - release 0.2.1
+        - bugfix: Don't cause repeated entries at the end of the directory
+        - bugfix: Don't repeast the last block of a saved file (1:256 chance)
+        - bugfix: Increase all timeouts in the card initialisation
+        - Recode 0xff in filenames to ~, both characters map to the pi
+          symbol on the C64
+
+2007-11-01 - release 0.2
+        - conditional compilation via make command line for chip type
+          and IO pin assignment (Shadowwolf/LarsP)
+        - object files are generated in a subdirectory
+        - bug fixes in IEC and buffer handling
+        - added project file for AVR Studio (untested)
+        - support for subdirectories
+        - support for UI+/UI- commands (faster bus for VC20)
+        - slightly improved command parser
+
+2007-10-16 - release 0.1
+        Initial release
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/README b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/README
new file mode 100644
index 00000000..ad99793b
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/README
@@ -0,0 +1,919 @@
+sd2iec - a controller/interface adapting storage devices to the CBM serial bus
+Copyright (C) 2007-2014  Ingo Korb <ingo@akana.de>
+Parts based on code from others, see comments in main.c for details.
+JiffyDos send based on code by M.Kiesel
+Fat LFN support and lots of other ideas+code by Jim Brain
+Final Cartridge III fastloader support by Thomas Giesel
+IEEE488 support by Nils Eilers
+
+Free software under GPL version 2 ONLY, see comments in main.c and
+COPYING for details.
+
+FIXME:This file still needs to be expanded. A lot.
+FIXME: sprinkle mentions of IEEE488 where appropiate
+
+Deprecation notices
+===================
+The following feature(s) will be removed in the next release:
+- M2I support
+   M2I support has been redundant since the introduction of transparent
+   P00 support. To continue to use your M2I-format software, convert
+   your files to P00 format (e.g. with m2itopc64.c) and set your device
+   to extension mode 2 (XE2).
+
+Introduction:
+=============
+sd2iec is firmware, used in hardware designs like MMC2IEC, SD2IEC, or uIEC,
+that allows the Commodore serial bus to access removable storage devices
+(MMC, SD, CF) - think of it as a 1541 with a modern storage medium instead
+of disks. The project was inspired by (and uses a few bits of code from)
+MMC2IEC[1] by Lars Pontoppidan and once ran on the same hardware before it
+grew too big for the ATmega32 used there.
+
+Currently, the firmware provide good DOS and file-level compatibility with CBM
+drives, but much work remains.  Unless specifically noted, anything that tries
+to execute code on the 1541 will not work, this includes every software
+fastloader.
+
+[1] Homepage: http://pontoppidan.info/lars/index.php?proj=mmc2iec
+
+Please note: Whenever this file talks about "D64 images" the text applies to
+all Dxx image types, i.e. D64/D71/D81/DNP unless specifically noted.
+
+If you are the author of a program that needs to detect sd2iec for
+some reason, DO NOT use M-R for this purpose. Use the UI command
+instead and check the message you get for "sd2iec" and "uiec" instead.
+
+
+Supported commands:
+===================
+- General notes:
+  Any command not listed below is currently not supported.
+
+- Directory filters:
+  To show only directories, both =B (CMD-compatible) and =D can be used.
+  On a real Commodore drive D matches everything.
+  To include hidden files in the directory, use *=H - on a 1541 this doesn't
+  do anything. sd2iec marks hidden files with an H after the lock mark,
+  i.e. "PRG<H" or "PRG H".
+
+  CMD-style "short" and "long" directory listings with timestamps are supported
+  ("$=T"), including timestamp filters. Please read a CMD manual for the syntax
+  until this file is updated.
+
+- Partition directory:
+  The CMD-style partition directory ($=P) is supported, including filters
+  ($=P:S*). All partitions are listed with type "FAT", although this could
+  change to "NAT" later for compatibility.
+
+- CD/MD/RD:
+  Subdirectory access is compatible to the syntax used by the CMD drives,
+  although drive/partition numbers are completely ignored.
+
+  Quick syntax overview:
+    CD:_         changes into the parent dir (_ is the left arrow on the C64)
+    CD_          dito
+    CD:foo       changes into foo
+    CD/foo       dito
+    CD//foo      changes into \foo
+    CD/foo/:bar  changes into foo\bar
+    CD/foo/bar   dito
+
+  You can use wildcards anywhere in the path. To change into an M2I or D64
+  image the image file must be the last component in the path, either
+  after a slash or a colon character.
+
+  MD uses a syntax similiar to CD and will create the directory listed
+  after the colon (:) relative to any directory listed before it.
+
+    MD/foo/:bar  creates bar in foo
+    MD//foo/:bar creates bar in \foo
+
+  RD can only remove subdirectories of the current directory.
+
+    RD:foo       deletes foo
+
+  CD is also used to mount/unmount image files. Just change into them
+  as if they were a directory and use CD:_ (left arrow on the C64) to leave.
+  Please note that image files are detected by file extension and file size
+  and there is no reliable way to see if a file is a valid image file.
+
+- CP, C<Shift-P>
+  This changes the current partition, see "Partitions" below for details.
+
+- C:
+  File copy command, should be CMD compatible. The syntax is
+   C[partition][path]:targetname=[[partition][path]:]sourcename[,[[p][p]:]sourcename...]
+  You can use this command to copy multiple files into a single target
+  file in which case all source files will be appended into the target
+  file. Parsing restarts for every source file name which means that
+  every source name is assumed to be relative to the current directory.
+  You can use wildcards in the source names, but only the first
+  file matching will be copied.
+
+  Copying REL files should work, but isn't tested well. Mixing REL and
+  non-REL files in an append operation isn't supported.
+
+- D
+  Direct sector access, this is a command group introduced by sd2iec.
+  Some Commodore drives use D for disk duplication between two drives
+  in the same unit, an attempt to use that command with sd2iec should
+  result in an error message.
+
+  D has three subcommands: DI (Info), DR (Read) and DW (Write).
+  Each of those commands requires a buffer to be opened (similiar
+  to U1/U2), but due to the larger sector size of the storage devices
+  used by sd2iec it needs to be a large buffer of size 2 (512 bytes)
+  or larger. The exception is the DI command with page set to 0,
+  its result will always fir into a standard 256 byte buffer.
+  If you try to use one of the commands with a buffer that is too
+  small a new error message is returned, "78,BUFFER TOO SMALL,00,00".
+
+  In the following paragraphs the secondary address that was used
+  to open the buffer is called "bufchan".
+
+  - DI
+    In BASIC notation the command format is
+      "DI"+chr$(bufchan)+chr$(device)+chr$(page)
+
+    "device" is the number of the physical device to be queried,
+    "page" the information page to be retrieved. Currently the
+    only page implemented is page 0 which will return the
+    following data structure:
+     1 byte : Number of valid bytes in this structure
+              This includes this byte and is meant to provide
+              backwards compatibility if this structure is extended
+              at a later time. New fields will always be added to
+              the end so old programs can still read the fields
+              they know about.
+     1 byte : Highest diskinfo page supported
+              Always 0 for now, will increase if more information
+              pages are added (planned: Complete ATA IDENTIFY
+              output for IDE and CSD for SD)
+     1 byte : Disk type
+              This field identifies the device type, currently
+              implemented values are:
+                0  IDE
+                2  SD
+                3  (reserved)
+     1 byte : Sector size divided by 256
+              This field holds the sector size of the storage device
+              divided by 256.
+     4 bytes: Number of sectors on the device 
+              A little-endian (same byte order as the 6502) value
+              of the number of sectors on the storage device.
+              If there is ever a need to increase the reported
+              capacity beyond 2TB (for 512 byte sectors) this
+              field will return 0 and a 64-bit value will be added
+              to this diskinfo page.
+
+    If you want to determine if there is a device that responds
+    to a given number, read info page 0 for it. If there is no
+    device present that corresponds to the number you will see
+    a DRIVE NOT READY error on the error channel and the
+    "number of valid bytes" entry in the structure will be 0.
+
+    Do not assume that device numbers are stable between releases
+    and do not assume that they are continuous either. To scan
+    for all present devices you should query at least 0-7 for now,
+    but this limit may increase in later releases.
+
+  - DR/DW
+    In BASIC notation the command format would be
+      "DR"+chr$(bufchan)+chr$(device)
+          +chr$(sector AND 255)
+          +chr$((sector/256) AND 255)
+          +chr$((sector/65536) AND 255)
+          +chr$((sector/16777216) AND 255)
+    (or "DW" instead of "DR)
+    but this won't work on the C64 because AND does not accept
+    parameters larger than 32767. The principle should be clear
+    though, the last four bytes are a 32 bit sector number in
+    little-endian byte order.
+
+    DR reads the sector to the buffer, DW writes the contents
+    of the buffer to the sector. Both commands will update the
+    error channel if an error occurs, for DR the 20,READ ERROR
+    was chosen to represent read errors; for write problems
+    during DW it sets 25,WRITE ERROR for errors and 26,WRITE
+    PROTECT ON if the device is read-only.
+
+- G-P
+  Get partition info, see CMD FD/HD manual for details. The reported
+  information is partially faked, feedback is welcome.
+
+- P
+  Positioning doesn't just work for REL files but also for regular
+  files on a FAT partition. When used for regular files the format
+  is "P"+chr$(channel)+chr$(lo)+chr$(midlo)+chr$(midhi)+chr$(hi)
+  which will seek to the 0-based offset hi*2^24+midhi*65536+256*midlo+lo
+  in the file. If you send less than four bytes for the offset, the
+  missing bytes are assumed to be zero.
+
+- N:
+  Format works only if a D64 image is already mounted. This command will
+  be ignored for DNP images unless the current directory is the root
+  directory of the DNP image.
+
+- R
+  Renaming files should work the same as it does on CMD drives, although
+  the errors flagged for invalid characters in the name may differ.
+
+- S:
+  Name matching is fully supported, directories are ignored.
+  Scratching of multiple files separated by , is also supported with no
+  limit to the number of files except for the maximum command line length
+  (usually 100 to 120 characters).
+
+- T-R and T-W
+  If your hardware features RTC support the commands T-R (time read) and T-W
+  (time write) are available. If the RTC isn't present, both commands return
+  30,SYNTAX ERROR,00,00; if the RTC is present but not set correctly T-R will
+  return 31,SYNTAX ERROR,00,00.
+
+  Both commands expect a fourth character that specifies the time format
+  to be used. T-W expects that the new time follows that character
+  with no space or other characters inbetween. For the A, B and D
+  formats, the expected input format is exactly the same as returned
+  by T-R with the same format character; for the I format the day of
+  week is ignored and calculated based on the date instead.
+
+  The possible formats are:
+   - "A"SCII: "SUN. 01/20/08 01:23:45 PM"+CHR$(13)
+      The day-of-week string can be any of "SUN.", "MON.", "TUES", "WED.",
+      "THUR", "FRI.", "SAT.". The year field is modulo 100.
+
+   - "B"CD or "D"ecimal:
+     Both these formats use 9 bytes to specify the time. For BCD everything
+     is BCD-encoded, for Decimal the numbers are sent/parsed as-is.
+      Byte 0: Day of the week (0 for sunday)
+           1: Year (modulo 100 for BCD; -1900 for Decimal, i.e. 108 for 2008)
+           2: Month (1-based)
+           3: Day (1-based)
+           4: Hour   (1-12)
+           5: Minute (0-59)
+           6: Second (0-59)
+           7: AM/PM-Flag (0 is AM, everything else is PM)
+           8: CHR$(13)
+
+      When the time is set a year less than 80 is interpreted as 20xx.
+
+   - "I"SO 8601 subset: "2008-01-20T13:23:45 SUN"+CHR$(13)
+     This format complies with ISO 8601 and adds a day of week
+     abbreviation using the same table as the A format, but omitting
+     the fourth character. When it is used with T-W, anything beyond
+     the seconds field is ignored and the day of week is calculated
+     based on the specified date. The year must always be specified
+     including the century if this format is used to set the time.
+     To save space, sd2iec only accepts this particular date/time
+     representation when setting the time with T-WI and no other ISo
+     8601-compliant representation.
+
+- U0
+  Device address changing with "U0>"+chr$(new address) is supported,
+  other U0 commands are currently not implemented.
+
+- U1/U2/B-R/B-W
+  Block reading and writing is fully supported while a D64 image is mounted.
+
+- B-P
+  Supported, not checked against the original rom at all.
+
+- UI+/UI-
+  Switching the slightly faster bus protocol for the VC20 on and off works,
+  it hasn't been tested much though.
+
+- UI/UJ
+  Soft/Hard reset - UI just sets the "73,..." message on the error channel,
+  UJ closes all active buffers but doesn't reset the current directory,
+  mounted image, swap list or anything else.
+
+- U<Shift-J>
+  Real hard reset - this command causes a restart of the AVR processor
+  (skipping the bootloader if installed). <Shift-J> is character code 202.
+
+- X: Extended commands. If you use JiffyDOS, you can send them by using
+  @"X..." - without quotes you'll just receive an error.
+
+  - XEnum    Sets the "file extension mode". This setting controls if
+             files on FAT are written with an x00 header and extension or not.
+             Possible values for num are:
+               0: Never write x00 format files.
+               1: Write x00 format files for SEQ/USR/REL, but not for PRG
+               2: Always write x00 format files.
+               3: Use SEQ/USR/REL file extensions, no x00 header
+               4: Same as 3, but also for PRG
+             If you set mode 3 or 4, extension hiding is automatically enabled.
+             This setting can be saved in the EEPROM using XW, the default
+             value is 1.
+
+             For compatibility with existing programs that write D64 files,
+             PRG files that have D64, D41, D71, D81, DNP or M2I as an extension
+             will always be written without an x00 header and without
+             any additional PRG file extension.
+
+  - XE+/XE-  Enable/disable extension hiding. If enabled, files in FAT with
+             a PRG/SEQ/USR/REL extension will have their extension removed
+             and the file type changed to the type specified by the file
+             extension - e.g. APPLICATION.PRG will become a PRG file named
+             "APPLICATION", "README.SEQ" will become a SEQ file named "README".
+             This flag can be saved in the EEPROM using XW, the default
+             value is disabled (-).
+
+  - XInum    Switches the display mode for mountables files (i.e. disk images
+             and M2I). num can be 0, in which case the file will be shown
+             with its normal type in the directory or 1 which will show all
+             mountable files as DIRectory entries (but they can still be
+             accessed as files too) or 2 in which case they will show up
+             twice - once with its normal type and once as directory.
+             The default value is 0 and this setting can be stored
+             permanently using XW.
+
+             It may be useful to set it to 1 or 2 when using software that
+             was originally written for CMD devices and which wouldn't
+             recognize disk images/M2I files as mountable on its own.
+             However, due to limitations of the current implementation of
+             the CD command such software may still fail to mount a disk
+             image with this option enabled.
+
+  - X*+/X*-  Enable/disable 1581-style * matching. If enabled, characters
+             after a * will be matched against the end of the file name.
+             If disabled, any characters after a * will be ignored.
+             This flag can be saved in the EEPROM using XW, the default value
+             is enabled (+).
+
+  - XDdrv=val Configure drives.  On ATA-based units or units with multiple
+             drive types, this command can be used to enable or reorder
+             the drives.  drv is the drive slot (0-7), while val is one
+             of:
+                0: Master ATA device
+                1: Slave ATA device
+                4: Primary SD/MMC device
+                5: Secondary SD/MMC device
+                6: (reserved)
+               15: no device
+
+             Note that only devices supported by the specific hardware
+             can be selected.  Unsupported device types will return an
+             error if requested.  Also, note that you cannot select a device
+             in multiple drive slots.  Finally, while it is possible to
+             re-order ATA devices using this functionality, it is strongly
+             discouraged.  Use the master/slave jumpers on the ATA devices
+             instead.  To reset the drive configuration, set all drive slots
+             to "no device".  This value can be permanently saved in the
+             EEPROM using XW.
+
+    XD?      View the current drive configuration.  Example result:
+             "03,D:00=04:01=00:02=01,10,01".  The track indicates the
+             current device address, while the sector indicates extended
+             drive configuration status information.
+
+  - X        X without any following characters reports the current state
+             of all extended parameters via the error channel, similiar
+             to DolphinDOS. Example result: "03,J-:C152:E01+:B+:*+,08,00"
+             The track indicates the current device address.
+
+  - XS:name  Set up a swap list - see "Changing Disk Images" below.
+    XS       Disable swap list
+
+  - XR:name  Set the file used for file-based M-R emulation.
+    XR       Disable file-based M-R emulation.
+             See "M-R, M-W, M-E" below. This setting can be
+             permanently saved in the EEPROM using XW.
+
+  - XW       Store configuration to EEPROM
+             This commands stores the current configuration in the EEPROM.
+             It will automatically be read when the AVR is reset, so
+             any changes you made will persist even after turning off
+             the hardware.
+
+             The stored configuration include the extension mode,
+             drive configuration and the current device address.
+             If you have changed the device address by software,
+             sd2iec will power up with that address unless
+             you have changed the device address jumpers (if available) to
+             a different setting than the one active at the time the
+             configuration was saved. You can think of this feature as
+             changing the meaning of one specific setting of the jumpers
+             to a different address if this sounds logical enough to you.
+
+             The "hardware overrides software overrides hardware" priority
+             was chosen to allow accessing sd2iec even when it is soft-
+             configured for a device number that is already taken by
+             another device on the bus without having to remove that
+             device to reconfigure sd2iec (e.g. when using a C128D).
+
+  - X?       Extended version query
+             This commands returns the extended version string which
+             consists of the version, the processor type set at build time
+             and the suffix of the configuration file (usually corresponds
+             to the short name of the hardware sd2iec was compiled for).
+
+- M-R, M-W, M-E
+  When no file is set up using XR, M-R will check a small internal
+  table of common drive-detection addresses and return data that
+  forces most of the supported fast loaders into a compatible mode
+  (e.g. 1541 mode for Dreamload and ULoad Model 3, disabled fastloader
+  for Action Replay 6). If the address is not recognized, more-or-less
+  random data will be returned.
+
+  Unfortunately GEOS reads rather large parts of the drive rom using
+  M-R to detect the drive, which cannot be reasonably added into the
+  internal table. To enable the GEOS drive detection to work properly
+  with sd2iec and to allow switching between 1541/71/81 modes,
+  file-based M-R emulation has been implemented. If a file has been
+  set up as M-R data source using the XR command, its contents will be
+  returned for M-R commands that try to read an address in the range
+  of $8000-$ffff. The rom file should be a copy of the rom contents of
+  a 1541/71/81 drive (any headers will be skipped automatically), its
+  name must be 16 characters or less. When an M-R command is received,
+  the file will be searched in three locations on the storage medium:
+    1) in the current directory of the current partition
+    2) in the root directory of the current partition
+    3) in the root directory of the first partition
+
+  The internal emulation table will be used if the file wasn't found
+  in any of those locations or an error occured while reading
+  it. Please be aware that the rom file is ONLY used for M-R
+  commands. Except for some very specific situations where drive
+  detection fails (e.g. GEOS) it will probably decrease compatibility
+  of sd2iec because most of the implemented fast loaders will only
+  recognize the 1541 variation of the loader.
+
+  Memory writing knows about the address used for changing the device
+  address on a 1541 and will change the address of sd2iec to the
+  requested value. It will also check if the transmitted data
+  corresponds to any of the known software fastloaders so the correct
+  emulation code can be used when M-E is called.
+
+Large buffers:
+==============
+To support commands which directly access the storage devices support
+for larger buffers was added. A large buffer can be allocated by
+opening a file named "##<d>" (exactly three characters" with <d> replaced
+by a single digit specifying the number of 256-byte buffers to be
+chained into one large buffer - e.g. "##2" for a 512 byte buffer,
+"##4" for 1024 bytes etc. Unlike a standard buffer where the read/write
+pointer is set to byte 1, a large buffer will start with the r/w pointer
+pointing to byte 0 because that seems to be more sensible to the author.
+
+If there aren't enough free buffers to support the size you requested
+a 70,NO CHANNEL message is set in the error channel and no file is
+opened. If the file name isn't exactly three bytes long a standard
+buffer ("#") will be allocated instead for compatibility.
+
+The B-P command supports a third parameter that holds the high byte
+of the buffer position, For example, "B-P 9 4 1" positions to byte
+260 (1*256+4) of the buffer on secondary address 9.
+
+Long File Names:
+================
+Long file names (i.e names not within the 8.3 limits) are supported on
+FAT, but for compatibility reasons the 8.3 name is used if the long
+name exceeds 16 characters. If you use anything but ASCII characters
+on the PC or their PETSCII equivalents on the Commodore you may
+get strange characters on the other system because the LFN use
+unicode characters on disk, but sd2iec parses only the low byte
+of each character in the name.
+
+EEPROM file system
+==================
+*WARNING*: The EEPROM file system is a newly-implemented file system
+that may still contain bugs. Do not store data on it that you cannot
+affort to lose. Always make sure that you have a backup. Also, the
+format may change in later releases, so please expect that the
+partition may need to be erased in the future.
+
+Devices running sd2iec always have an EEPROM to store the system
+configuration, but on some devices this EEPROM is much larger than
+required. To utilize the empty space on these devices (currently any
+microcontroller with at least 128K of flash), a special EEPROM file
+system has been implemented. This can for example be used to store a
+small file browser or fast loader so it can be used independent of the
+storage medium that is currently inserted.
+
+The EEPROM file system will always register itself on the last
+partition number (see "Partitions" below). You can check the list of
+partitions ("$=P") to find the current partition number of the EEPROM
+file system or use the alias function (see below) to access it.
+
+To simplify calculations, block numbers on the EEPROMFS are calculated
+using 256 bytes per block instead of the usual 254 bytes as used by
+Commodore drives. Internally, the allocation is even more fine-grained
+(using 64 byte sectors), which means that the number of free blocks
+shown on an empty file system may be less than the sum of the number
+of blocks of all files on a full file system.
+
+The EEPROM file system does not support subdirectories. It can be
+formatted using the N: command as usual, but the disk name and ID are
+ignored. The capacity of the EEPROM file system varies between
+devices: On AVR devices it is 3.25 KBytes and at most 8 files can be
+stored on it. On a2iec, the file system can hold 7 KBytes and at most
+16 files can be stored on it. The actual number of files that can be
+stored depends on the length of the files, longer files need more than
+one directory entry.
+
+
+Partitions:
+===========
+sd2iec features a multi-partition support similiar to that of the CMD
+drives. The partitions (which may be on separate drives for some hardware
+configurations) are accessed using the drive number of the commands
+sent from the computer and are numbered starting with 1. Partition 0
+is a special case: Because most software doesn't support drive numbers
+or always sends drive number 0, this partition points to the currently
+selected partition. By default, accesses to partition 0 will access
+partition 1, this can be changed by sending "CP<num>" over the command
+channel with <num> being an ASCII number from 1 to 255. "C<Shift-P"
+(0x42 0xd0) works the same, but expects a binary partition number as the
+third character of the command.
+
+To allow a "stable" access to the EEPROM file system no matter how
+many partitions are currently available, a special character has been
+introduced that will always access the EEPROM file system (if
+available). When sd2iec sees a "!" character where it expects a
+partition number and the "!" character is directly followed by a colon
+(i.e. "!:"), it will access the EEPROMFS if available. Direct access
+using the assigned partition number is of course still
+available. Additionally "$!" will always load the directory of the
+EEPROM file system partition (if available), similar to "$1" to "$9"
+for partitions 1 to 9.
+
+Software fastloaders:
+=====================
+Note: Using sd2iec without an external crystal or similiar precise
+      clock source is not a supported configuration.
+      If you try that anyway, be prepared to suffer from random
+      data corruption. You have been warned.
+      Some fastloader implementations will actively refuse to work
+      if you use an unsuitable clock source.
+
+  Turbodisk
+  ---------
+  Turbodisk is detected by the CRC of its 493 byte long floppy code and
+  the M-E address 0x0303. The same code seems to be used under various names,
+  among them "Turbodisk" (both 2.1 and 2.2) and "Fast-Load".
+  It is not known if there is an NTSC-compatible version of this fastloader.
+
+  Final Cartridge III
+  -------------------
+  Both the fast loader and the fast saver of Final Cartridge III are supported.
+  The FC3 is both PAL and NTSC compatible.
+
+  The slightly different fastloader used for files freezed with the FC3
+  is also supported.
+
+  EXOS V3 and The Beast System
+  ----------------------------
+  Both supported, the loader used by these kernals is very similiar to
+  the FC3 fast loader.
+
+  Action Replay 6
+  ---------------
+  The AR6 reads a byte from the drive rom to check which fastloader it should
+  use. When file-based M-R emulation is disabled sd2iec returns a value that
+  should force the cartridge to use the standard kernal loader instead of its
+  many fastloaders/-savers. This means that accessind sd2iec with
+  file-based rom emulation enabled will fail because the cartridge
+  will enable fastloader that will probably not be recognized.
+
+  Currently the only recognized AR6 fastloader and fastsaver are the
+  ones for the 1581.
+
+  Dreamload
+  ---------
+  Dreamload uses direct track/sector access, so it is only supported
+  on D64 or similiar disk image formats. As sd2iec has to wait for commands
+  from the C64 constantly the disk change buttons may become unresponsive,
+  try multiple times if you need to. Dreamload is a "captive" fastloader,
+  sd2iec stay in Dreamload mode until it receives a "quit loader" command
+  from the C64. To force sd2iec to resume normal operation, hold the disk
+  change button until the red LED turns on (just like sleep mode).
+
+  Please note that Dreamload does not work with more than one device on the
+  serial bus due to the way it uses the ATN line.
+
+  ULoad Model 3
+  -------------
+  ULoad Model 3 uses direct track/sector access, so it is only supported
+  on D64 or similiar disk image formats. Currently there is exactly one
+  supported variant of ULoad Model 3, which is the one used by
+  Ultima 3 Gold. There are no other known variants at this time, but
+  this may change.
+
+  If you are a coder and want to use ULoad Model 3 in your own program,
+  either configure it to produce the same drive code as U3Gold or
+  contact me so we can work out a way to trigger ULoad M3 support
+  without uploading any drive code at all.
+
+  G.I. Joe Loader
+  ---------------
+  Said to be the most-ripped IRQ loader. Unfortunately this is a
+  "captive" fastloader similiar to dreamload (but not restricted
+  to disk images because it is file name-based) and there is no
+  reliable way to detect if the computer has been reset to switch
+  back to the standard protocol. To exit this loader, hold down
+  the disk change button until the red LED turns on, just like
+  sleep mode.
+
+  Epyx FastLoad Cartridge
+  -----------------------
+  ONLY the fast loader from this cartridge is supported, no
+  disk editor/copier/whatever functions.
+
+  GEOS
+  ----
+  GEOS 2.0 can be booted from D64 images made from original disks
+  as well as D41/71/81 images created using geoMakeBoot (make sure to
+  Configure the system for a 1541/1571/1581 before using geoMakeBoot).
+  When file-based M-R emulation is disabled, GEOS may detect sd2iec as
+  a 1541 or 1581, depending on the version of Configure used. This may
+  cause the system to fail to boot, e.g. if sd2iec is detected as a 1581
+  while booting from a D64 disk image. It is recommended to set up file-
+  based M-R emulation when using GEOS to avoid these problems.
+
+  GEOS 1.3 may or may not work - it boots, but wasn't tested in-depth.
+  Gateway seems to work but was not tested beyond booting it from a D64
+  image.
+
+  Using the buttons for changing the current disk image is supported,
+  but do make sure that you only access disk images that the drive
+  type that is selected in GEOS would support (i.e. D64 for a 1541,
+  D64/D71 for a 1571 and D81 for a 1581).
+
+  Wheels
+  ------
+  Wheels can be booted from any disk image type it supports. The correct
+  rom emulation file (XR) MUST be set, especially for CMD HD emulation.
+
+  Do not use the disk change feature to change disk images when HD emulation
+  is in use - Wheels does not check for disk changes on that drive!
+  For other drive types the restrictions on disk image type of GEOS also
+  apply to Wheels.
+
+  ELoad Version 1
+  ---------------
+  This loader was made for EasyProg but may also be used in other programs.
+  It detects and supports the sd2iec natively.
+
+  Maniac Mansion
+  --------------
+  Original versions of Maniac Mansion have an additional copy protection
+  check that is not supported by sd2iec. Please use a cracked version
+  instead - the ones from Gamebase 64 seem to work. Please remember to
+  add an empty D64 for the save/load disk to your swaplist if you want
+  to save your game.
+
+  The game uses a captive loader that unfortunately cannot detect if it
+  should exit automatically - to resume normal operation, you need to
+  hold down the NEXT button until the red LED turns on.
+
+  Zak McKracken
+  -------------
+  Same as Maniac Mansion, but this game only has a code list protection,
+  so images of original disks should work fine.
+
+JiffyDOS:
+=========
+The JiffyDOS protocol has very relaxed timing constraints compared to
+Turbodisk, but still not as relaxed as the standard Commodore IEC protocol.
+
+x00 files:
+==========
+P00/S00/U00/R00 files are transparently supported, that means they show
+up in the directory listing with their internal file name instead of the
+FAT file name. Renaming them only changes the internal name. The XE
+command defines if x00 extensions are used when writing files, by
+default sd2iec uses them for SEQ/USR/REL files but not for PRG.
+Parsing of x00 files is always enabled even when writing them is not.
+
+x00 files are recognized by checking both the extension of the file
+(P/S/U/R with a two-digit suffix) and the header signature.
+
+Disk Images:
+============
+Disk images are recognized by their file extension (.D64, .D41, .D71, .D81,
+.DNP) and their file size (must be one of 174848, 175531, 349696, 351062,
+819200 or a multiple of 65536 for DNP). If the image has an error info block
+appended it will be used to simulate read errors. Writing to a sector with
+an error will always work, but it will not clear the indicated error.
+D81 images with error info blocks are not supported.
+
+Warning: There is at least one program out there (DirMaster v2.1/Style by
+THE WIZ) which generates broken DNP files. The usual symptom is that
+moving from a subdirectory that was created with this program back to
+its parent directory using CD:_ (left arrow) sets the current directory
+not to the parent directory, but to an incorrect sector instead. A
+workaround for this problem in sd2iec would require an unreasonable
+amount of system resources, so it is recommended to avoid creating
+subdirectories with this version of DirMaster. It is possible to fix
+this problem using a hex editor, but the exact process is beyond the scope
+of this document.
+
+M2I files:
+==========
+NOTICE: Support for M2I files will be removed in the next release, see
+        the deprecation notices at the top of this file for advice.
+
+M2I files are fully supported. sd2iec supports SEQ and USR files in this
+format in addition to PRG and DEL which were already implemented in MMC2IEC.
+For compatibility reasons the file type is not checked when opening files.
+Inside an M2I file the files are always shown as 0 (DEL) or 1 blocks
+because calling stat for every file was slowing down the directory listing
+too much. For compatibility with existing M2I files the data files do not
+use P00 headers even when the file type is SEQ or USR.
+
+REL files:
+==========
+Partial REL file support is implemented. It should work fine for existing
+files, but creating new files and/or adding records to existing files
+may fail. REL files in disk images are not supported yet, only as files
+on a FAT medium. When x00 support is disabled the first byte of a REL
+file is assumed to be the record length.
+
+Changing Disk Images
+====================
+Because some programs require more than one disk side there is support
+for changing the currently mounted disk image with two buttons called
+NEXT and PREV connected to the AVR.
+
+If your circuit doesn't have disk change pins/buttons you might be able to
+add it yourself. In all cases the buttons need to connect the given
+pins of the chip to ground.
+
+- For the original MMC2IEC ("larsp"):
+  The NEXT button is in input PA4, the PREV button is on PA5.
+  PA4 is pin 36 on the DIL version of the controller or pin 33 on the
+  surface-mount version. PA5 is pin 35 on DIL, pin 32 on SMD.
+
+- For Shadowolf's MMC2IEC 1.x PCBs ("sw1"):
+  The NExT button is on input PC4, the PREV button is on PC3.
+  PC4 is pin 26 on the DIL version of the controller or pin 23 on the
+  surface-mount version. PC3 is pin 25 on DIL, pin 22 on SMD.
+
+- For Shadowolf's sd2iec 1.x PCBs ("sw2"):
+  The two required pins are available on the pin header which runs
+  parallel to the long side of the board. In the documentation of the
+  board, the NEXT button is named "DISKSWITCH", the PREV button is
+  named "RESERVE".
+
+- Any other circuit without disk change pin on a convenient connector
+  somewhere and no button dedicated to that function: Please check
+  with the supplier of the board and read config.h in the sources
+  to find out how to connect it.
+
+To use this functionality, you can either create a swap list file
+yourself or let sd2iec create one for you.
+
+Creating a swap list
+--------------------
+A swap list is a text file with one line per disk image or directory
+you want to be able to change into. You are not limited to using disk
+images, a swap list file may also refer to standard directories on the
+SD card or anything else the CD command of sd2iec will accept.
+
+The swap list file is relatively tolerant against multiple styles of
+line-endings, sd2iec should be able to parse the file no matter if you
+create it on a Windows system, Unix or even the C64 itself - as a side
+effect, empty lines are also ignored. By default sd2iec assumes that
+the file is encoded in ASCII (for files created on a PC or similar),
+but if the first line of the file exactly reads "#PETSCII" (in hex: 23
+50 45 54 53 43 49 49), file names are assumed to be encoded in PETSCII
+instead and this marker line is skipped.
+
+An example swap list file could look like this:
+=== example 1 ===
+FOO.D64
+BAR.D64
+BAZ.D64
+=== end of example 1 ===
+
+=== example 2 ===
+//NEATGAME/:DISK1A.D64
+//NEATGAME/:DISK1B.D64
+//NEATGAME/:DISK2A.D64
+//NEATGAME/:DISK2B.D64
+=== end of example 2 ===
+
+The swap list is enabled by sending "XS:filename" over the command
+channel with filename being the name of the swap list. A list
+activated in this way stays active until you explicitly disable it
+again by sending "XS" on the command channel or you manually activate
+another swap list with "XS:otherfilename".
+
+Since the manual activation of swap lists is still a bit of a hassle,
+sd2iec will automatically try to activate a swap list named
+"AUTOSWAP.LST" in the current directory if you use the disk change
+buttons while no swap list is active. A swap list enabled in this way
+behaves almost exactly as a swap list enabled with XS, but it
+auto-deactivates when a CD (change directory) command is received by
+sd2iec. This way a different AUTOSWAP.LST file is always correctly
+recognized after you have changed into a different directory.
+
+sd2iec can even auto-generate a swap list for you that contains all
+disk images (e.g. D64/D71/D81/DNP) in the current directory if no
+AUTOSWAP.LST is present in this directory. To do so, change into the
+directory that you want scanned and use the HOME function (see below).
+sd2iec will then create a file called AUTOSWAP.GEN and activate it as
+if it was the standard AUTOSWAP.LST, including its auto-deactivation
+features. The AUTOSWAP.GEN file will never be recognized the same way
+as AUTOSWAP.LST, so you will need to either rename the file
+(R:AUTOSWAP.LST=AUTOSWAP.GEN) or ask sd2iec to generate it again by
+using the HOME function in the same directory if you want to use it
+again. This mode of operation was chosen to avoid the accidental
+destruction of pre-existing AUTOSWAP.LST files and to allow sd2iec to
+recognize newly-added disk images in the directory without manually
+removing the generated swap list.
+
+Please note that using the swap-list auto generation feature will
+currently leave an empty AUTOSWAP.GEN file on the card if no disk
+images were found. This may be fixed in the future.
+
+Using a swap list
+-----------------
+Navigation in a swap list is really simple: Press the NEXT button to
+activate the next line of the file or the PREV button to activate the
+previous line of the file. Both of these buttons wrap to the other end
+of the file if they hit the beginning/end of the list. You can also
+hit both buttons together to trigger the HOME function which jumps to
+the first entry of the swap list.
+
+sd2iec will confirm each of these three actions with a specific
+flashing pattern on the device's LEDs. The pattern first flashed both
+the red and green LEDs on for a short moment, then it flashes either
+one or both of them. For the NEXT function, the green LED flashes; for
+the PREV function the red LED flashes and for HOME both LEDs flash.
+
+If any of these three functions is activated without an active swap
+list and sd2iec finds an AUTOSWAP.LST file, they will all be treated
+as the HOME function: The first line of the file is active and the
+red and green LEDs both flash twice. The same happens when an
+AUTOSWAP.GEN file is created, although the flashing pattern may not be
+very discernible because of the preceding card activity.
+
+
+Sleep Mode:
+===========
+If you hold the disk change button down for two seconds, sd2iec will
+enter "sleep mode". In this mode it doesn't listen to the bus at all
+until you hold down the disk change button for two seconds again
+which resumes normal operation. Sleep mode allows you to keep
+sd2iec connected to the serial bus even when you load something
+from a different drive that uses a fast loader that doesn't
+work with more than one device on the bus.
+
+While sleep mode is active, the red LED will be on and the green LED
+will be off.
+
+Card detection test:
+====================
+Because some SD slots seem to suffer from bad/unreliable card detect
+switches a test mode for this has been implemented on the units that
+have SD card support. If you hold down the PREV button during powerup,
+the red (dirty) LED will reflect the card detect status - if the LED
+is on the card detect switch is closed. Please note that this does not
+indicate successful communication with the card but merely that the
+mechanical switch in the SD card slot is closed.
+
+On units with two sd2iec-controlled LEDs, the green (busy) LED will
+indicate the state of the write protect switch - if the LED is lit,
+the write protection is on. Due to the way the write protect notch
+works on SD cards, the indication is only valid when the card is fully
+inserted into the slot.
+
+To exit from the diagnostic mode, power-cycle the device or push the
+NEXT button once.
+
+Other important notes:
+======================
+- When you hold down the disk change (forward) button during power
+  on the software will use default values instead of those stored
+  in the EEPROM.
+- File overwrite (@foo) is implemented by deleting the file first.
+- File sizes in the directory are in blocks (of 254 bytes), but
+  the blocks free message actually reports free clusters. It is
+  a compromise of compatibility, accuracy and code size.
+- If known, the low byte of the next line link pointer of the directory
+  listing will be set to (filesize MOD 254)+2, so you can calculate the
+  true size of the file if required. The 2 is added so it can never be
+  mistaken for an end marker (0) or for the default value (1, used by at
+  least the 1541 and 1571 disk drives).
+- If your hardware supports more than one SD card, changing either one
+  will reset the current partition to 1 and the current directory of
+  all partitions to the root drive. Doing this just for the card that
+  was changed would cause lots of problems if the number of partitions
+  on the previous and the newly inserted cards are different.
+
+Compilation notes:
+==================
+sd2iec requires avr-libc version 1.6.x.
+
+sd2iec is set up to be compiled in multiple configurations, controlled by
+configuration files. By default the Makefile looks for a file named
+'config', but you can override it by providing the name on the make
+command line with "make CONFIG=filename[,filename...]".
+
+An example configuration file named "config-example" is provided with
+the source code, as well as abridged files corresponding to the
+release binaries. If you want to compile sd2iec for a custom hardware
+you may have to edit config.h too to change the port definitions.
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/addconfig-64k b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/addconfig-64k
new file mode 100644
index 00000000..d27653f7
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/addconfig-64k
@@ -0,0 +1,11 @@
+# This is not actually a -*- makefile -*- but it looks nicer
+# if it uses the same syntax-highlighting ;)
+#
+# configuration addon for atmega644 chips with a few features disabled
+
+CONFIG_MCU=atmega644p
+CONFIG_REMOTE_DISPLAY=n
+CONFIG_M2I=n
+CONFIG_P00CACHE=n
+NAME_OVERRIDE=mini
+CONFIG_HAVE_EEPROMFS=n
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-XS-1541 b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-XS-1541
new file mode 100644
index 00000000..01b26f11
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-XS-1541
@@ -0,0 +1,50 @@
+# This may not look like it, but it's a -*- makefile -*-
+#
+# sd2iec - SD/MMC to Commodore serial bus interface/controller
+# Copyright (C) 2007-2014  Ingo Korb <ingo@akana.de>
+#
+#  Inspired by MMC2IEC by Lars Pontoppidan et al.
+#
+#  FAT filesystem access based on code from ChaN, see tff.c|h.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License only.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+#  config-XS-1541: sd2iec configuration for XS-1541 boards
+#                  (currently IEEE488-only)
+#
+#
+# This file is included in the main sd2iec Makefile and also parsed
+# into autoconf.h.
+
+CONFIG_HARDWARE_VARIANT=9
+CONFIG_HARDWARE_NAME=XS-1541
+CONFIG_ARCH=avr
+CONFIG_MCU=atmega644p
+CONFIG_LINKER_RELAX=y
+CONFIG_MCU_FREQ=14745600
+CONFIG_UART_DEBUG=y
+CONFIG_UART_BAUDRATE=115200
+CONFIG_UART_BUF_SHIFT=8
+CONFIG_COMMAND_CHANNEL_DUMP=y
+CONFIG_SD_AUTO_RETRIES=10
+CONFIG_SD_DATACRC=y
+CONFIG_ERROR_BUFFER_SIZE=100
+CONFIG_COMMAND_BUFFER_SIZE=120
+CONFIG_BUFFER_COUNT=6
+CONFIG_MAX_PARTITIONS=2
+CONFIG_RTC_SOFTWARE=y
+#CONFIG_HAVE_IEEE=y
+# Device has a serial Commodore bus
+#CONFIG_HAVE_IEC=y
+CONFIG_M2I=y
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-arm2iec1 b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-arm2iec1
new file mode 100644
index 00000000..290f7a89
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-arm2iec1
@@ -0,0 +1,68 @@
+# This may not look like it, but it's a -*- makefile -*-
+#
+# sd2iec - SD/MMC to Commodore serial bus interface/controller
+# Copyright (C) 2007-2014  Ingo Korb <ingo@akana.de>
+#
+#  Inspired by MMC2IEC by Lars Pontoppidan et al.
+#
+#  FAT filesystem access based on code from ChaN, see tff.c|h.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License only.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+#  config-arm2iec: sd2iec configuration for arm2iec V1.x boards
+#
+#
+# This file is included in the main sd2iec Makefile and also parsed
+# into autoconf.h.
+
+CONFIG_ARCH=lpc17xx
+CONFIG_MCU=lpc1768
+CONFIG_MCU_FREQ=100000000
+CONFIG_BOOTLOADER=y
+CONFIG_BOOT_DEVID=0x31693261
+CONFIG_UART_DEBUG=y
+CONFIG_UART_BAUDRATE=115200
+CONFIG_UART_TX_BUF_SHIFT=8
+CONFIG_COMMAND_CHANNEL_DUMP=y
+CONFIG_LOADER_TURBODISK=y
+CONFIG_LOADER_FC3=y
+CONFIG_LOADER_DREAMLOAD=y
+CONFIG_LOADER_ULOAD3=y
+CONFIG_LOADER_GIJOE=y
+CONFIG_LOADER_EPYXCART=y
+CONFIG_LOADER_GEOS=y
+CONFIG_LOADER_WHEELS=y
+CONFIG_LOADER_NIPPON=y
+CONFIG_LOADER_AR6=y
+CONFIG_LOADER_ELOAD1=y
+CONFIG_HARDWARE_VARIANT=101
+CONFIG_HARDWARE_NAME=sd2iec-a2i1
+CONFIG_SD_AUTO_RETRIES=10
+CONFIG_SD_DATACRC=y
+CONFIG_SD_BLOCKTRANSFER=y
+CONFIG_ERROR_BUFFER_SIZE=100
+CONFIG_COMMAND_BUFFER_SIZE=250
+CONFIG_BUFFER_COUNT=15
+CONFIG_MAX_PARTITIONS=4
+CONFIG_RTC_LPC17XX=y
+CONFIG_RTC_DS3231=y
+#CONFIG_REMOTE_DISPLAY=y
+CONFIG_DISPLAY_BUFFER_SIZE=80
+CONFIG_HAVE_IEC=y
+CONFIG_M2I=y
+CONFIG_P00CACHE=y
+CONFIG_P00CACHE_SIZE=32768
+CONFIG_PARALLEL_DOLPHIN=y
+CONFIG_HAVE_EEPROMFS=y
+CONFIG_LOADER_MMZAK=y
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-example b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-example
new file mode 100644
index 00000000..696d00ea
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-example
@@ -0,0 +1,199 @@
+# This may not look like it, but it's a -*- makefile -*-
+#
+# sd2iec - SD/MMC to Commodore serial bus interface/controller
+# Copyright (C) 2007-2014  Ingo Korb <ingo@akana.de>
+#
+#  Inspired by MMC2IEC by Lars Pontoppidan et al.
+#
+#  FAT filesystem access based on code from ChaN, see tff.c|h.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License only.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+#  config: User-configurable options to simplify hardware changes and/or
+#          reduce the code/ram requirements of the code.
+#
+#
+# This file is included in the main sd2iec Makefile and also parsed
+# into autoconf.h.
+
+# Device has serial Commodore bus?
+CONFIG_HAVE_IEC=y
+
+# Device has old parallel IEEE 488 bus?
+#CONFIG_HAVE_IEEE=y
+
+# device has EEPROM filesystem - EEPROM should be at least 4k
+#CONFIG_HAVE_EEPROMFS=y
+
+# target architecture
+CONFIG_ARCH=avr
+
+# MCU to compile for
+CONFIG_MCU=atmega644p
+
+# Use the -relax parameter when linking?
+# Passing -O9 and -relax to the linker saves ~650 bytes of flash,
+# but the option is broken in certain binutils versions.
+# (known troublemakers: binutils 2.17, 2.18 seems fine)
+CONFIG_LINKER_RELAX=n
+
+# MCU frequency in Hz - the fastloader code is hardcoded for 8MHz
+CONFIG_MCU_FREQ=8000000
+
+# Add a bootloader signature
+CONFIG_BOOTLOADER=n
+
+# Value of the signature word
+CONFIG_BOOT_DEVID=0x49454321
+
+
+# Enable UART debugging - requires 24 bytes plus buffer size in RAM
+CONFIG_UART_DEBUG=n
+
+# Baud rate of the UART, not used if CONFIG_UART_DEBUG is disabled
+CONFIG_UART_BAUDRATE=19200
+
+# log2 of the UART buffer size, i.e. 6 for 64, 7 for 128, 8 for 256 etc.
+CONFIG_UART_BUF_SHIFT=6
+
+# Output a hex dump of all received commands via serial?
+# Not used if CONFIG_UART_DEBUG is disabled.
+CONFIG_COMMAND_CHANNEL_DUMP=y
+
+
+# Enable Turbodisk soft fastloader support
+# This option requires an external crystal oscillator!
+CONFIG_LOADER_TURBODISK=y
+
+# Enable Final Cartridge III fast loader
+CONFIG_LOADER_FC3=y
+
+# Enable Dreamload fast loader
+CONFIG_LOADER_DREAMLOAD=y
+
+# Enable ULoad Model 3 fast loader
+CONFIG_LOADER_ULOAD3=y
+
+# Enable G.I. Joe fast loader
+CONFIG_LOADER_GIJOE=y
+
+# Enable Epyx Fast Load cartridge fast loader
+CONFIG_LOADER_EPYXCART=y
+
+# Enable GEOS fast loaders
+CONFIG_LOADER_GEOS=y
+
+# Enable Wheels fast loaders (requires CONFIG_LOADER_GEOS=y)
+CONFIG_LOADER_WHEELS=y
+
+# Enable Nippon fast loader
+CONFIG_LOADER_NIPPON=y
+
+# Enable (some) Action Replay 6 fast loaders
+CONFIG_LOADER_AR6=y
+
+# Enable ELoad Version 1 fast loader
+CONFIG_LOADER_ELOAD1=y
+
+# Enable Maniac Mansion/Zak McKracken fast loader
+CONFIG_LOADER_MMZAK=y
+
+# Enable DolphinDOS parallel speeder
+CONFIG_PARALLEL_DOLPHIN=y
+
+# Select which hardware to compile for
+# Valid values:
+#   1 - example configuration in config.h (won't compile!)
+#   2 - Shadowolf MMC2IEC PCBs version 1.x
+#   3 - original MMC2IEC
+#   4 - uIEC
+#   5 - Shadowolf sd2iec PCBs version 1.x
+#   6 - unused, was NKC-modified MMC2IEC
+#   7 - uIEC/SD
+CONFIG_HARDWARE_VARIANT=1
+CONFIG_HARDWARE_NAME=sd2iec-example
+
+# Number of retries if the SD communication fails
+CONFIG_SD_AUTO_RETRIES=10
+
+# Use CRC checks for all SD data transmissions?
+CONFIG_SD_DATACRC=y
+
+# Use two SD cards? Works only if SD2 hardware definitions
+# in config.h are present for the selected hardware variant.
+CONFIG_TWINSD=y
+
+# Additional storage device support
+# You don't need to enable the "native" storage device of your hardware
+# here, the build system will add that itself (requires definitions in
+# config.h).
+#
+# At this time no hardware is set up to support storage devices other than
+# its native one.
+#
+# Add SD support
+#CONFIG_ADD_SD=y
+# Add ATA support
+#CONFIG_ADD_ATA=y
+
+# Length of error message buffer - 1571 uses 36 bytes
+# Increased to 100 because the long version message can be a bit long
+# (especially the ones generated by the autobuilder)
+CONFIG_ERROR_BUFFER_SIZE=100
+
+# Length of command/filename buffer - 1571 uses 42 bytes
+# The buffer is actually 2 bytes larger to simplify parsing.
+CONFIG_COMMAND_BUFFER_SIZE=120
+
+# Number of sector buffers (256 byte+a bit of overhead)
+#  In general: More buffers -> More open files at the same time
+CONFIG_BUFFER_COUNT=6
+
+# Track the stack size
+# Warning: This option increases the code size a lot.
+CONFIG_STACK_TRACKING=n
+
+# Maximum number of partitions
+CONFIG_MAX_PARTITIONS=2
+
+# Real Time Clock option
+#   disable all to disable T-R/T-W commands
+CONFIG_RTC_SOFTWARE=y
+#CONFIG_RTC_PCF8583=y
+#CONFIG_RTC_LPC17XX=y
+#   Note: DS3231 and 1307 cannot both be enabled
+#CONFIG_RTC_DS3231=y
+CONFIG_RTC_DS1307=y
+
+# I2C display
+CONFIG_REMOTE_DISPLAY=y
+
+# Display buffer size
+# This buffer is used as temporary space when sending commands to
+# the display. Longer texts will be truncated.
+CONFIG_DISPLAY_BUFFER_SIZE=40
+
+# Capture unknown loaders to file
+#CONFIG_CAPTURE_LOADERS=y
+#CONFIG_CAPTURE_BUFFER_SIZE=3000
+
+# cache [PSUR]00 internal file names
+#CONFIG_P00CACHE=y
+
+# size of the [PSUR]00 name cache in bytes
+#CONFIG_P00CACHE_SIZE=32768
+
+# disable SD support
+# (the build system assumes that everything uses SD unless you enable this)
+#CONFIG_NO_SD=y
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-larsp b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-larsp
new file mode 100644
index 00000000..204889b2
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-larsp
@@ -0,0 +1,64 @@
+# This may not look like it, but it's a -*- makefile -*-
+#
+# sd2iec - SD/MMC to Commodore serial bus interface/controller
+# Copyright (C) 2007-2014  Ingo Korb <ingo@akana.de>
+#
+#  Inspired by MMC2IEC by Lars Pontoppidan et al.
+#
+#  FAT filesystem access based on code from ChaN, see tff.c|h.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License only.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+# config-larsp: sd2iec configuration for Lars Pontoppidan's MMC2IEC
+#
+#
+# This file is included in the main sd2iec Makefile and also parsed
+# into autoconf.h.
+
+CONFIG_ARCH=avr
+CONFIG_MCU=atmega1284p
+CONFIG_LINKER_RELAX=y
+CONFIG_MCU_FREQ=8000000
+CONFIG_BOOTLOADER=y
+CONFIG_BOOT_DEVID=0x5053524c
+CONFIG_COMMAND_CHANNEL_DUMP=y
+# In case someone added a crystal to his board
+CONFIG_LOADER_TURBODISK=y
+CONFIG_LOADER_FC3=y
+CONFIG_LOADER_DREAMLOAD=y
+CONFIG_LOADER_ULOAD3=y
+CONFIG_LOADER_GIJOE=y
+CONFIG_LOADER_EPYXCART=y
+CONFIG_LOADER_GEOS=y
+CONFIG_LOADER_WHEELS=y
+CONFIG_LOADER_NIPPON=y
+CONFIG_LOADER_AR6=y
+CONFIG_LOADER_ELOAD1=y
+CONFIG_HARDWARE_VARIANT=3
+CONFIG_HARDWARE_NAME=mmc2iec
+CONFIG_SD_AUTO_RETRIES=10
+CONFIG_SD_DATACRC=y
+CONFIG_ERROR_BUFFER_SIZE=100
+CONFIG_COMMAND_BUFFER_SIZE=120
+CONFIG_BUFFER_COUNT=6
+CONFIG_MAX_PARTITIONS=2
+CONFIG_RTC_PCF8583=y
+CONFIG_REMOTE_DISPLAY=y
+CONFIG_DISPLAY_BUFFER_SIZE=40
+CONFIG_HAVE_IEC=y
+CONFIG_M2I=y
+CONFIG_P00CACHE=y
+CONFIG_P00CACHE_SIZE=12000
+CONFIG_HAVE_EEPROMFS=y
+CONFIG_LOADER_MMZAK=y
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-mbed b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-mbed
new file mode 100644
index 00000000..356e25ad
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-mbed
@@ -0,0 +1,61 @@
+# This may not look like it, but it's a -*- makefile -*-
+#
+# sd2iec - SD/MMC to Commodore serial bus interface/controller
+# Copyright (C) 2007-2014  Ingo Korb <ingo@akana.de>
+#
+#  Inspired by MMC2IEC by Lars Pontoppidan et al.
+#
+#  FAT filesystem access based on code from ChaN, see tff.c|h.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License only.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+#  config-mbed: EXPERIMENTAL sd2iec configuration
+#               for mbed LPC1768 modules (needs external stuff!)
+#
+#
+# This file is included in the main sd2iec Makefile and also parsed
+# into autoconf.h.
+
+CONFIG_ARCH=lpc17xx
+CONFIG_MCU=lpc1768
+CONFIG_MCU_FREQ=100000000
+CONFIG_UART_DEBUG=y
+CONFIG_UART_BAUDRATE=115200
+CONFIG_UART_TX_BUF_SHIFT=8
+CONFIG_COMMAND_CHANNEL_DUMP=y
+CONFIG_LOADER_TURBODISK=y
+CONFIG_LOADER_FC3=y
+CONFIG_LOADER_DREAMLOAD=y
+CONFIG_LOADER_ULOAD3=y
+CONFIG_LOADER_GIJOE=y
+CONFIG_LOADER_EPYXCART=y
+CONFIG_LOADER_GEOS=y
+CONFIG_LOADER_WHEELS=y
+CONFIG_LOADER_NIPPON=y
+CONFIG_LOADER_AR6=y
+CONFIG_LOADER_ELOAD1=y
+CONFIG_HARDWARE_VARIANT=100
+CONFIG_HARDWARE_NAME=sd2iec-mbed
+CONFIG_SD_AUTO_RETRIES=10
+CONFIG_SD_DATACRC=y
+CONFIG_SD_BLOCKTRANSFER=y
+CONFIG_ERROR_BUFFER_SIZE=100
+CONFIG_COMMAND_BUFFER_SIZE=250
+CONFIG_BUFFER_COUNT=15
+CONFIG_MAX_PARTITIONS=4
+CONFIG_RTC_LPC178x=y
+CONFIG_REMOTE_DISPLAY=y
+CONFIG_DISPLAY_BUFFER_SIZE=80
+CONFIG_HAVE_IEC=y
+CONFIG_M2I=y
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-petSD b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-petSD
new file mode 100644
index 00000000..8a5840f4
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-petSD
@@ -0,0 +1,54 @@
+# This may not look like it, but it's a -*- makefile -*-
+#
+# sd2iec - SD/MMC to Commodore serial bus interface/controller
+# Copyright (C) 2007-2014  Ingo Korb <ingo@akana.de>
+#
+#  Inspired by MMC2IEC by Lars Pontoppidan et al.
+#
+#  FAT filesystem access based on code from ChaN, see tff.c|h.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License only.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+#  config-petSD: sd2iec configuration for Nils Eilers' petSD
+#
+#
+# This file is included in the main sd2iec Makefile and also parsed
+# into autoconf.h.
+
+CONFIG_ARCH=avr
+CONFIG_HARDWARE_NAME=petSD
+CONFIG_HARDWARE_VARIANT=8
+CONFIG_MCU=atmega1284p
+CONFIG_LINKER_RELAX=y
+CONFIG_MCU_FREQ=18432000
+CONFIG_BOOTLOADER=y
+CONFIG_BOOT_DEVID=0x44537470
+CONFIG_UART_DEBUG=y
+CONFIG_UART_BAUDRATE=115200
+CONFIG_UART_BUF_SHIFT=8
+CONFIG_COMMAND_CHANNEL_DUMP=y
+CONFIG_SD_AUTO_RETRIES=10
+CONFIG_SD_DATACRC=y
+CONFIG_ERROR_BUFFER_SIZE=100
+CONFIG_COMMAND_BUFFER_SIZE=120
+CONFIG_BUFFER_COUNT=15
+CONFIG_MAX_PARTITIONS=2
+CONFIG_RTC_DS1307=y
+CONFIG_HAVE_IEEE=y
+CONFIG_REMOTE_DISPLAY=y
+CONFIG_DISPLAY_BUFFER_SIZE=40
+CONFIG_M2I=y
+CONFIG_P00CACHE=y
+CONFIG_P00CACHE_SIZE=9000
+CONFIG_HAVE_EEPROMFS=y
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-sw1 b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-sw1
new file mode 100644
index 00000000..4266f15f
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-sw1
@@ -0,0 +1,63 @@
+# This may not look like it, but it's a -*- makefile -*-
+#
+# sd2iec - SD/MMC to Commodore serial bus interface/controller
+# Copyright (C) 2007-2014  Ingo Korb <ingo@akana.de>
+#
+#  Inspired by MMC2IEC by Lars Pontoppidan et al.
+#
+#  FAT filesystem access based on code from ChaN, see tff.c|h.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License only.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+#  config-sw1: sd2iec configuration for Shadowolf's MMC2IEC PCBs
+#              version 1.0-1.9
+#
+#
+# This file is included in the main sd2iec Makefile and also parsed
+# into autoconf.h.
+
+CONFIG_ARCH=avr
+CONFIG_MCU=atmega1284p
+CONFIG_LINKER_RELAX=y
+CONFIG_MCU_FREQ=8000000
+CONFIG_BOOTLOADER=y
+CONFIG_BOOT_DEVID=0x49454321
+CONFIG_UART_DEBUG=n
+CONFIG_COMMAND_CHANNEL_DUMP=n
+# Turbodisk requires a crystal which is usually only present on 1.8 or later
+CONFIG_LOADER_TURBODISK=y
+CONFIG_LOADER_FC3=y
+CONFIG_LOADER_DREAMLOAD=y
+CONFIG_LOADER_ULOAD3=y
+CONFIG_LOADER_GIJOE=y
+CONFIG_LOADER_EPYXCART=y
+CONFIG_LOADER_GEOS=y
+CONFIG_LOADER_WHEELS=y
+CONFIG_LOADER_NIPPON=y
+CONFIG_LOADER_AR6=y
+CONFIG_LOADER_ELOAD1=y
+CONFIG_HARDWARE_VARIANT=2
+CONFIG_HARDWARE_NAME=sd2iec-sw1
+CONFIG_SD_AUTO_RETRIES=10
+CONFIG_SD_DATACRC=y
+CONFIG_ERROR_BUFFER_SIZE=100
+CONFIG_COMMAND_BUFFER_SIZE=120
+CONFIG_BUFFER_COUNT=6
+CONFIG_MAX_PARTITIONS=2
+CONFIG_HAVE_IEC=y
+CONFIG_M2I=y
+CONFIG_P00CACHE=y
+CONFIG_P00CACHE_SIZE=12000
+CONFIG_HAVE_EEPROMFS=y
+CONFIG_LOADER_MMZAK=y
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-sw2 b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-sw2
new file mode 100644
index 00000000..2d1d89b7
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-sw2
@@ -0,0 +1,64 @@
+# This may not look like it, but it's a -*- makefile -*-
+#
+# sd2iec - SD/MMC to Commodore serial bus interface/controller
+# Copyright (C) 2007-2014  Ingo Korb <ingo@akana.de>
+#
+#  Inspired by MMC2IEC by Lars Pontoppidan et al.
+#
+#  FAT filesystem access based on code from ChaN, see tff.c|h.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License only.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+#  config-sw2: sd2iec configuration for Shadowolf's sd2iec PCBs
+#              version 1.x
+#
+#
+# This file is included in the main sd2iec Makefile and also parsed
+# into autoconf.h.
+
+CONFIG_ARCH=avr
+CONFIG_MCU=atmega1284p
+CONFIG_LINKER_RELAX=y
+CONFIG_MCU_FREQ=8000000
+CONFIG_BOOTLOADER=y
+CONFIG_BOOT_DEVID=0x31434549
+CONFIG_COMMAND_CHANNEL_DUMP=y
+CONFIG_LOADER_TURBODISK=y
+CONFIG_LOADER_FC3=y
+CONFIG_LOADER_DREAMLOAD=y
+CONFIG_LOADER_ULOAD3=y
+CONFIG_LOADER_GIJOE=y
+CONFIG_LOADER_EPYXCART=y
+CONFIG_LOADER_GEOS=y
+CONFIG_LOADER_WHEELS=y
+CONFIG_LOADER_NIPPON=y
+CONFIG_LOADER_AR6=y
+CONFIG_LOADER_ELOAD1=y
+CONFIG_HARDWARE_VARIANT=5
+CONFIG_HARDWARE_NAME=sd2iec-sw2
+CONFIG_SD_AUTO_RETRIES=10
+CONFIG_SD_DATACRC=y
+CONFIG_ERROR_BUFFER_SIZE=100
+CONFIG_COMMAND_BUFFER_SIZE=120
+CONFIG_BUFFER_COUNT=6
+CONFIG_MAX_PARTITIONS=4
+CONFIG_RTC_PCF8583=y
+CONFIG_REMOTE_DISPLAY=y
+CONFIG_DISPLAY_BUFFER_SIZE=40
+CONFIG_HAVE_IEC=y
+CONFIG_M2I=y
+CONFIG_P00CACHE=y
+CONFIG_P00CACHE_SIZE=12000
+CONFIG_HAVE_EEPROMFS=y
+CONFIG_LOADER_MMZAK=y
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-uIEC b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-uIEC
new file mode 100644
index 00000000..5cb5180e
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-uIEC
@@ -0,0 +1,67 @@
+# This may not look like it, but it's a -*- makefile -*-
+#
+# sd2iec - SD/MMC to Commodore serial bus interface/controller
+# Copyright (C) 2007-2014  Ingo Korb <ingo@akana.de>
+#
+#  Inspired by MMC2IEC by Lars Pontoppidan et al.
+#
+#  FAT filesystem access based on code from ChaN, see tff.c|h.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License only.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+#  config: User-configurable options to simplify hardware changes and/or
+#          reduce the code/ram requirements of the code.
+#
+#
+# This file is included in the main sd2iec Makefile and also parsed
+# into autoconf.h.
+
+CONFIG_ARCH=avr
+CONFIG_MCU=atmega1281
+CONFIG_LINKER_RELAX=y
+CONFIG_MCU_FREQ=8000000
+CONFIG_BOOTLOADER=y
+CONFIG_BOOT_DEVID=0x32304955
+CONFIG_UART_DEBUG=y
+CONFIG_UART_BAUDRATE=38400
+CONFIG_UART_BUF_SHIFT=6
+CONFIG_DEADLOCK_ME_HARDER=n
+CONFIG_COMMAND_CHANNEL_DUMP=y
+CONFIG_LOADER_TURBODISK=y
+CONFIG_LOADER_FC3=y
+CONFIG_LOADER_DREAMLOAD=y
+CONFIG_LOADER_ULOAD3=y
+CONFIG_LOADER_GIJOE=y
+CONFIG_LOADER_EPYXCART=y
+CONFIG_LOADER_GEOS=y
+CONFIG_LOADER_WHEELS=y
+CONFIG_LOADER_NIPPON=y
+CONFIG_LOADER_AR6=y
+CONFIG_LOADER_ELOAD1=y
+CONFIG_HARDWARE_VARIANT=4
+CONFIG_HARDWARE_NAME=uIEC
+CONFIG_SD_AUTO_RETRIES=10
+CONFIG_SD_DATACRC=y
+CONFIG_ERROR_BUFFER_SIZE=100
+CONFIG_COMMAND_BUFFER_SIZE=254
+CONFIG_BUFFER_COUNT=15
+CONFIG_MAX_PARTITIONS=20
+CONFIG_RTC_SOFTWARE=y
+CONFIG_ADD_ATA=1
+CONFIG_REMOTE_DISPLAY=y
+CONFIG_DISPLAY_BUFFER_SIZE=40
+CONFIG_HAVE_IEC=y
+CONFIG_M2I=y
+CONFIG_HAVE_EEPROMFS=y
+CONFIG_LOADER_MMZAK=y
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-uIEC3 b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-uIEC3
new file mode 100644
index 00000000..cdb8bb36
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/configs/config-uIEC3
@@ -0,0 +1,65 @@
+# This may not look like it, but it's a -*- makefile -*-
+#
+# sd2iec - SD/MMC to Commodore serial bus interface/controller
+# Copyright (C) 2007-2014  Ingo Korb <ingo@akana.de>
+#
+#  Inspired by MMC2IEC by Lars Pontoppidan et al.
+#
+#  FAT filesystem access based on code from ChaN, see tff.c|h.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License only.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+#  config: User-configurable options to simplify hardware changes and/or
+#          reduce the code/ram requirements of the code.
+#
+#
+# This file is included in the main sd2iec Makefile and also parsed
+# into autoconf.h.
+
+CONFIG_ARCH=avr
+CONFIG_MCU=atmega1281
+CONFIG_LINKER_RELAX=y
+CONFIG_MCU_FREQ=8000000
+CONFIG_BOOTLOADER=y
+CONFIG_BOOT_DEVID=0x33304955
+CONFIG_UART_DEBUG=y
+CONFIG_UART_BAUDRATE=38400
+CONFIG_UART_BUF_SHIFT=6
+CONFIG_DEADLOCK_ME_HARDER=n
+CONFIG_COMMAND_CHANNEL_DUMP=y
+CONFIG_LOADER_TURBODISK=y
+CONFIG_LOADER_FC3=y
+CONFIG_LOADER_DREAMLOAD=y
+CONFIG_LOADER_ULOAD3=y
+CONFIG_LOADER_GIJOE=y
+CONFIG_LOADER_EPYXCART=y
+CONFIG_LOADER_GEOS=y
+CONFIG_LOADER_WHEELS=y
+CONFIG_LOADER_NIPPON=y
+CONFIG_LOADER_AR6=y
+CONFIG_LOADER_ELOAD1=y
+CONFIG_HARDWARE_VARIANT=7
+CONFIG_HARDWARE_NAME=uIEC
+CONFIG_TWINSD=n
+CONFIG_SD_AUTO_RETRIES=10
+CONFIG_SD_DATACRC=y
+CONFIG_ERROR_BUFFER_SIZE=100
+CONFIG_COMMAND_BUFFER_SIZE=254
+CONFIG_BUFFER_COUNT=15
+CONFIG_MAX_PARTITIONS=20
+CONFIG_RTC_SOFTWARE=y
+CONFIG_HAVE_IEC=y
+CONFIG_M2I=y
+CONFIG_HAVE_EEPROMFS=y
+CONFIG_LOADER_MMZAK=y
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/actionreplay.txt b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/actionreplay.txt
new file mode 100644
index 00000000..33adb718
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/actionreplay.txt
@@ -0,0 +1,88 @@
+Action Replay fast loader/saver protocols
+=========================================
+
+Documented by Ingo Korb
+
+Note 1: This document is currently incomplete, many of the loaders
+supported by the AR6 are missing.
+
+Note 2: The contents of this document have been tested only on a PAL
+system, because the author currently has no NTSC Action Replay
+cartridge.
+
+Note 3: An Action Replay 6 cartridge has been used as reference, other
+versions may or may not use different fast loaders.
+
+1541 fastloader
+---------------
+The default 1541 fast loader is a track loader that does the file name
+matching on the C64 instead of the drive. It has not been further
+analyzed due to this limitation.
+
+1581 fastloader
+---------------
+The 1581 fastloader opens the target file on secondary address 0 to
+read the start address. When the loader is uploaded, it will pull the
+clock line low and the data line high to signal that it's currently
+busy processing. It is recommended to add a short delay (one
+millisecond is sufficient) at this point because the C64 will miss the
+drive becoming ready if the time between M-E and the first byte
+transmission is too short.
+
+Bytes are transmitted according to this timing, synchronized by the
+low-to-high transision of the data line initated by the C64:
+
+   Time  Clock Data
+   ----------------
+    0us    1   0->1 (timing reference)
+    5us    b0   b1
+   13us    b2   b3
+   21us    b4   b5
+   29us    b6   b7
+ 37.5us    0    1
+  ~47us    0    1   (bus settle delay)
+
+Each sector of the file is transferred by sending the number of valid
+bytes in the current sector (i.e. 254 for a full sector or the second
+byte minus one for the last one on a D64-style disk) followed by the
+data bytes of the sector in forward order.
+
+After transmitting the last sector a single byte with value 0 is sent
+to the computer to mark the end of the transmission. There is no way
+to signal read errors to the computer. The computer will send a
+command to close the file itself.
+
+Note: The final bus settle delay doesn't need to be explicit if your
+CPU is slow enough, but a fast processor might see its own data high
+as start condition because of the slow rise times of the
+open-collector serial bus.
+
+1581 fastsaver
+--------------
+Note: This fastsaver is known to use different timing on PAL and NTSC.
+
+The 1581 fastsaver opens the target file on secondary address 1 for
+writing. When the loader is uploaded, it will pull the clock line low
+and the data line high. The original code waits approximately 800
+microseonds at this point.
+
+For every sector of the file (254 bytes of data), 256(!) bytes are
+received in forward order. The first two bytes of this data block are
+not part of file contents. If the first byte is non-zero, more sectors
+will follow. If the first byte is zero, the second byte is the offset
+in the received data buffer (including the two initial bytes) of the
+first byte that is not part of the file anymore (0 if everything is
+part of the file).
+
+The timing for receiving a single byte in the PAL version is:
+
+   Time  Clock Data
+   ----------------
+  setup    1    1   (set lines high on the drive side)
+    0us    1   0->1 (wait for change, not level! - timing reference)
+   12us   !b7  !b5
+   22us   !b6  !b4
+   38us   !b3  !b1
+   48us   !b2  !b0
+   53us    0    1   (set by drive)
+
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/buffers.txt b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/buffers.txt
new file mode 100644
index 00000000..932a229d
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/buffers.txt
@@ -0,0 +1,54 @@
+Notes on buffer_t and its use
+-----------------------------
+
+buffer_t is the struct holding all information for the dynamically allocated
+buffers in sd2iec. Usually they are associated with a secondary address,
+but they can also be used for internal purposes, e.g. to read the file
+names in a swaplist or to store the BAM of a mounted disk image.
+
+If you allocate a temporary buffer or do an early return from a function
+that has allocated a buffer for some purpose you do not need to do
+anything - every buffer returned from alloc_buffer or alloc_system_buffer
+is maked as "not sticky" which means that it will get freed without calling
+the cleanup function at the end of the IEC mainloop.
+
+If you do need a buffer that should stay around for longer than that
+(e.g. for a buffer associated with a file), call stick_buffer(buffer_t *)
+on it. After doing this you need to make sure that free_buffer(buffer_t *)
+is called on the buffer when it isn't needed anymore.
+
+Another independent distinction in buffer types is system buffers vs.
+user buffers. alloc_system_buffer will return a buffer with the secondary
+field set to BUFFER_SEC_SYSTEM while alloc_buffer returns a buffer
+with the secondary field set to 0. This difference is used when updating
+the device LEDs - the number of allocated user buffers is tracked in
+active_buffers and the BUSY LED will be turned on by alloc_buffer
+and off by free_buffer as long as at least one user buffer is allocated.
+Similiar to that the DIRTY LED is controlled by mark_write_buffer and
+free_buffer - please do not call mark_write_buffer on a system buffer.
+
+free_multiple_buffers takes a flag parameter which specifies which buffer(s)
+should be freed. It is a bit field with the following base values:
+ - FMB_CLEAN
+     Call the cleanup callback before freeing the buffer. If this is
+     specified, the return value of free_multiple_buffers will be 1 if
+     any of the called cleanup functions returned a non-zero value
+     or 0 otherwise.
+ - FMB_FREE_STICKY
+     Free sticky buffers too (will free only not-sticky buffers otherwise)
+ - FMB_FREE_SYSTEM
+     Free system buffers too (will free only non-system buffers otherwise)
+
+For convenience there are a few macros for common use cases:
+ - FMB_ALL
+     free all buffers, no cleanups
+ - FMB_ALL_CLEAN
+     free all buffers and call their cleanup functions
+ - FMB_USER
+     free all non-system buffers, no cleanups
+ - FMB_USER_CLEAN
+     free all non-system buffers and call their cleanup functions
+ - FMB_UNSTICKY
+     free all non-sticky buffers, no cleanups
+ - FMB_UNSTICKY_CLEAN
+     free all non-sticky buffers and call their cleanup functions
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/dreamload.txt b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/dreamload.txt
new file mode 100644
index 00000000..6667e7a5
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/dreamload.txt
@@ -0,0 +1,141 @@
+The DreamLoad Fast Loader Protocol
+==================================
+
+analysed by Thomas Giesel
+
+This document describes the fast loader protocol implemented in DreamLoad. The
+description may not be accurate in any point.
+
+DreamLoad is a two bit IRQ fast loader. This means that the timing of the C64
+(host) may be deferred by IRQs at any time. The timing is given by the host,
+so the drive code must be always listening. The only exception is after the
+host sent a command to load a sector to the drive. Then the host starts the
+protocol after having seen the first two bits (always 0) on the bus.
+
+All the directory and sector chain stuff is done by the host.
+
+DRIVE DETECTION
+===============
+
+DreamLoad reads out some bytes from the drive memory using "m-r" to detect the
+drive type. To find a 1541 it expects following values:
+
+0xfea0: 0x0d
+0xe5c6: 0x34 0xb1
+
+Then it uploads the initial loader using "m-w".
+
+INITIAL LOADER
+==============
+
+The first part of code uploaded by the host into the drive is a short program
+which has the task to download the final drive code using the send protocol
+described below. The initial loader contains the length of the final drive
+code. It's a simple loop which receives 1024 bytes from the host, stores them
+into the drive RAM and starts the final drive code.
+
+BYTE TO DRIVE PROTOCOL
+======================
+
+This protocol is used by the host to send the final drive code and in newer
+versions of DreamLoad also to send commands to the drive.
+
+The ATN line is not used for this transfer.
+
+The drive has to wait for CLOCK to become low. A short time later it reads
+bit 7 from DATA (low = 1). After the next CLOCK high bit 6 is read from DATA
+This procedure is repeated 4 times to read all 8 bits.
+
+Note that the host write CLOCK and DATA at once, nevertheless the drive must
+read them in two steps to avoid race conditions cause by the ramp times.
+
+OLD BYTE TO DRIVE PROTOCOL
+==========================
+
+Older implementations of DreamLoad us a different protocol for the command
+bytes.
+
+The drive waits for ATN low, then it reads bit 5 from DATA and 7 from CLOCK.
+After the next ATN high bit 4 follows on DATA and bit 6 on CLOCK.
+This is repeated for bits 1, 3, 0, 2.
+
+BYTE TO HOST PROTOCOL
+=====================
+
+This protocol is used to send bytes from the drive to the host.
+
+Bit 0 of each byte is sent on CLOCK, bit 1 on DATA. High level means 1. This
+bit pair is acknowledged by the host by pulling ATN down. Directly after this
+ack the drive must put the next two bytes on CLOCK and DATA, the will be ack'd
+with a high level on ATN. The rest of the byte follow in the same manner.
+
+If there there are no additional bytes to be transfered, the drive releases
+DATA and CLOCK to high.
+
+BLOCK TO HOST PROTOCOL
+======================
+
+The first byte is a status code. If it is 0 a block of 256 bytes will follow.
+As the host waits for DATA to become low before receiving this byte, bit 1 must
+always be zero in this byte.
+
+Is the value is not 0, it is an error indication. No additional bytes follow in
+this case. The C64 code returns an error flag to the application in this case.
+
+After a block a checksum follows. All bytes of the block are EORed beginning
+with 0, the result is transfered as checksum.
+
+DREAMLOAD VARIANTS
+==================
+
+This is a list of DreamLoad version at the programs they were found in.
+EORing all bytes of the final code gives the version code used below.
+The versions 0xac and 0xdc use the old byte protocol.
+
+Checksum 0x48:
+Cauldron by Exceed, Resource, The Dreams (2008)
+http://noname.c64.org/csdb/release/?id=64204
+state: works
+
+8-bit Garden by Digital Sounds System (2008)
+http://noname.c64.org/csdb/release/?id=64142
+state: works
+
+Breakpoint 2008 Invitation by Resource, The Dreams (2008)
+http://noname.c64.org/csdb/release/?id=62891
+state: works
+
+Checksum 0xac:
+Perfect Pixels by Chorus (2007)
+http://noname.c64.org/csdb/release/?id=59862
+state: works
+
+69 positions 100% by Vulture Design (2006)
+http://noname.c64.org/csdb/release/?id=45031
+state: works, including disk change
+
+Deep 90% by Chorus (2006)
+http://noname.c64.org/csdb/release/?id=36852
+state: works
+
+The True Story About Knoops by The Dreams (2003)
+http://noname.c64.org/csdb/release/?id=9748
+state: works
+
+Flut by K2 (2004)
+http://noname.c64.org/csdb/release/?id=12744
+state: works, including disk change
+
+Checksum 0xdc:
+Darwin by The Dreams (2004)
+http://noname.c64.org/csdb/release/?id=12732
+state: works
+
+Checksum 0xbf:
+Error 23 91% by Resource, The Dreams (2006)
+http://noname.c64.org/csdb/release/?id=32411
+state: 91% version works, older 90% version doesn't
+
+10 Years HVSC by HVSC Crew (2006)
+http://noname.c64.org/csdb/release/?id=44014
+state: works, including disk change
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/eload.txt b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/eload.txt
new file mode 100644
index 00000000..b0fb35aa
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/eload.txt
@@ -0,0 +1,91 @@
+ELoad Version 1 Protocol
+========================
+
+Eload Version 1 by Thomas Giesel, http://www.skoe.de/easyflash
+documented by Ingo Korb, Thomas Giesel
+
+ELoad Version 1 is based on ULoad Model 3, it uses a very similar protocol.
+It is a 2-bit byte-synchronizing fast loader that doesn't use ATN.
+
+Files are opened using the standard DOS procedure with secondary address 0.
+It opens the file and reads the first byte to check if the file exists and
+is readable. It does not close the file before starting the fast loader, so
+it just starts with the last sector loaded.
+
+ELoad detects sd2iec or uIEC directly by examining the ID string.
+
+ELoad has its own "idle loop" that reads a command byte and reacts
+accordingly. It aborts when the ATN line is low while waiting for
+synchronization in the byte receive or send subroutine.
+Version 1 supports "Load a file" only.
+
+"Idle loop"
+-----------
+1) Receive a byte
+2) If byte is 1, call "Load a file"
+5) Otherwise send a 0xff byte
+6) Go to 1
+
+Load a file (command code 1)
+----------------------------
+1) Start with the last file opened
+2) Read sector into buffer (up to 254 data bytes)
+   If reading failed: Send 0xff, return to Idle loop
+   If no data left (EOF): Send 0, return to Idle loop
+   Otherwise: Send number of bytes used in this sector
+3) Send that many data bytes
+4) Go to 2
+
+
+Low level
+=========
+
+Receiving a byte
+----------------
+1) set clock low, data high
+2) wait until data is low; if ATN is low return to the standard bus loop
+3) set clock high, data high
+4) wait until data is high
+5) transfer data (see table below)
+6) invert resulting byte
+7) delay for about 20 microseconds to make sure the C64 has returned
+   the bus to clock high/data high, otherwise the next send/receive
+   call can fail
+
+Sampling times for reception:
+
+Time Clk Data
+-------------
+ 0us (1) 0->1   (data low -> high transition in step 4 is the timing reference)
+14us  b7   b5
+24us  b6   b4
+38us  b3   b1
+48us  b2   b0
+
+The original transfer code reads the first data sample between 11us and 17us
+after the data line transition.
+
+Sending a byte
+--------------
+1) set clock high, data low
+2) wait until clock is low; if ATN is low return to the standard bus loop
+3) set clock high, data high
+4) wait until clock is high
+5) transfer data (see table below)
+6) set clock high, data high
+
+Timing for transmission:
+
+Time Clk Data
+-------------
+ 0us 0->1 (1)   (clock low -> high transition in step 4 is the timing reference)
+14us  b0   b1
+22us  b2   b3
+30us  b4   b5
+38us  b6   b7
+48us  1    1    (step 6)
+
+Note: Bits are sent without inversion, i.e. low for a 0-bit, high for a 1-bit.
+
+The original transfer code sends the first bit pair between 12us and 15us
+after the clock line transition.
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/epyxfastload.txt b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/epyxfastload.txt
new file mode 100644
index 00000000..49f323b5
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/epyxfastload.txt
@@ -0,0 +1,61 @@
+Epyx Fast Load Cartridge Protocol
+=================================
+
+Documented by Ingo Korb
+
+This document describes the fast loader protocol used by the
+Epyx Fast Load cartridge. The cartridge has some other options that also
+upload custom drive code, but those are beyond the scope of this file.
+
+General
+-------
+The Epyx Fast Load cartridge (EFL) uses a two-stage upload process. The
+first stage is sent using M-E and executes at 0x1a9. This first stage
+receives another 256 bytes from the computer and jumpts to that code.
+
+First stage protocol
+--------------------
+The first stage sets data high and clock low and waits until data is low.
+It then releases clock and reads 256 bytes using the same protocol as
+G.I.Joe (see that document). There are at least two versions of the
+second stage, but they are protocol-compatible. Both don't need the
+full 256 bytes that are uploaded - only 237/238 bytes are actually
+used during execution. XORing the first 237 bytes together yields a
+result of 0x91 and 0x5b respectively.
+
+Second stage protocol
+---------------------
+The second stage also uses the same byte reception protocol as the G.I.Joe
+loader. It first receives one byte which is the length of the file name
+to be read and then receives that many bytes for the file name, starting
+with the last character of the name.
+
+After receiving the file name, clock is pulled low and the file is opened.
+If opening fails, set clock high and return to the standard dos idle loop.
+
+Every sector of the file is transferred in order. First data and clock
+are released, then the actual number of bytes following is sent
+(byte transfer protocol described below), then the data bytes of
+the sector. If another sector is following, pull clock low, read the
+data from the storage medium and repeat this process.
+
+After the last sector is transferred, set clock and data high and
+return to the standard dos idle loop.
+
+Sending a byte
+--------------
+To send a byte, set clock and data high, wait until data is low and send
+the inverted bits as shown in this table:
+
+Time Clk Data
+-------------
+ 0us  (1) 0->1  (data low -> high transition is the timing reference)
+10us  !b7 !b5
+20us  !b6 !b4
+30us  !b3 !b1
+40us  !b2 !b0
+60us  -    -
+
+The final delay is used to ensure that the C64 has time to read bit 2/0.
+The original drive code needs about 20-30 cycles to prepare the next
+byte for transmission.
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/fc3-protocol.txt b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/fc3-protocol.txt
new file mode 100644
index 00000000..cec6942b
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/fc3-protocol.txt
@@ -0,0 +1,238 @@
+The Final Cartridge III Fast Loader and Saver Protocol
+======================================================
+
+analysed by Thomas Giesel
+notes about the Freezer-variation and EXOS V3 by Ingo Korb
+
+This document describes the fast loader and saver protocol of the FC3. The
+description may not be accurate in any point.
+
+LOADING
+=======
+
+First of all the FC3 opens the file and reads the first two bytes to check the
+load address. It does not close the file before starting the fast loader, so
+that one just starts with the last sector loaded.
+
+When the loader starts it sets both data and clock to high to signal that it
+is currently busy.
+
+The FC3 does always transfer whole blocks, even if not all bytes are used.
+Each block is transferred in 65 tuples with 4 bytes each.
+
+Before sending a block the drives pulls CLOCK low and waits for the host to
+respond by pulling DATA low. Then drive and host release these lines.
+
+The first tuple is sent about 180 us after this handshake. As each tuple has
+its own synchronization this timing doesn't need to be accurate. Between two
+tuples there are about 190 us. In sd2iec these to delays were originally
+reduced to 150 us which works fine for the FC3, but fails with EXOS.
+
+1st tuple:
+0: not used (always 7, data marker on disk)
+1: block counter, starting at 0
+2: 0 if all bytes must be used, number of bytes otherwise
+3: First byte of block
+
+The protocol is able to transfer sectors out-of-file-order as they are read
+from disk, the block counter is used to store them in the correct order on
+the C64 side.
+
+2nd..64th tuple:
+4 bytes from block
+
+65th tuple:
+0: last byte of block
+1..3: not used
+
+Each tuple is syncronized by the drive pulling CLOCK low, then 2 bits are
+transfered at once until the 4 bytes are done. Bit 0 is on CLOCK, Bit 1 on
+DATA and so on. Electrical 0 means binary 0. Finally CLOCK and DATA are
+released to high level.
+
+EOF is marked by pulling DATA low instead of starting a new handshake.
+I/O errors are marked by pulling DATA and CLOCK low.
+
+The "|" marks are the point of time when the bus is written or read.
+
+===============================================================================
+C64 read (PAL)
+ 1   (+12)   13  (+12)   25  (+12)    37  (+12)   49   (+14)    63 (+12)  cycle
+-|||||||-----|||||||-----|||||||------|||||||-----|||||||-------|||||||--
+ 1..7        13.2..19.2  25.4..31.4   37.6..43.6  49.7..55.7    63.9..69.9   us
+ (sync)
+
+1541 write
+|-----------|-----------|------------|-----------|------------|----------
+0   (+12)   12  (+12)   24   (+13)   37  (+12)   49   (+13)   62  (+12)      us
+CLK low     1st pair    2nd pair     3rd pair    4th pair     5th pair
+
+sd2iec write
+|-----------|-----------|-----------|-----------|-------------|----------
+0  (+12)    12  (+12)   24  (+12)   36  (+12)   48   (+14)    62  (+12)      us
+
+===============================================================================
+C64 read (PAL) cont'd
+     75  (+12)   87  (+12)   99   (+14)     113  (+12)   125   (+12)      cycle
+...--|||||||-----|||||||-----|||||||--------|||||||------|||||||---------
+     76.1..82.1  88.3..94.3  00.5..06.5     14.7..20.7   26.9..32.9          us
+
+1541 write
+..-|------------|-----------|------------|-----------|-------------------
+   74   (+13)   87   (+12)  99   (+13)   112  (+12)  124  (+13)              us
+   6th pair     7th pair    8th pair     9th pair    10th pair
+
+sd2iec write
+..-|-----------|-----------|-------------|-----------|-------------------
+   74  (+12)   86  (+12)   98   (+14)    112  (+12)  124  (+12)              us
+
+===============================================================================
+C64 read (PAL) cont'd
+        137  (+12)  149   (+14)   163  (+12)   175  (+12)  187  (+12)     cycle
+...-----|||||||-----|||||||-------|||||||------|||||||-----|||||||-------
+        39.1..45.1  51.2..57.2    65.4..71.4   77.6..83.6  89.8..95.8        us
+
+1541 write
+...---|-----------|------------|-----------|------------|----------------
+      137  (+12)  149  (+13)   162  (+12)  174  (+13)   187  (+12)           us
+      11th pair   12th pair    13th pair   14th pair    15th pair
+
+sd2iec write
+...--|-----------|-------------|-----------|-----------|----------------
+     136  (+12)  148  (+14)    162  (+12)  174  (+12)  186  (+12)            us
+
+===============================================================================
+C64 read (PAL) cont'd
+           199                                                            cycle
+...--------|||||||-------------------------------------------------------
+           02.0..08.0                                                        us
+
+1541 write
+...-----|----------------------------------------------------------------
+        199  (+16)                                                           us
+        16th pair
+
+sd2iec write
+...----|----------------------------------------------------------------
+       198   (+14)                                                           us
+
+
+Fastloader in freezed files
+===========================
+Programs freezed using the "F.DISK" command of the FC3 use a fast loader
+similiar to the normal FC3 fastloader. Like the normal fastloader it opens
+the target file for reading with the standard protocol and it also uses
+the same protocol and timing to transmit a four-byte tuple to the C64.
+However, the handshaking inbetween and the contents of the first tuple
+are different. The freezer-variant transmits the data from disk directly
+which means that the first tuple contains a 0x07, the track and sector
+of the next sector in a file and the first data byte. Everything but
+the data byte is ignored by the C64-side code, so the blocks must
+be sent in file order.
+
+Both end-of-file and error conditions are signalled by pulling DATA low.
+A full clock/data handshake is done before the transmission of every tuple
+which means that the fixed delays between tuples can be dropped.
+
+The freeze-loader closes and reopens the data file using the standard
+protocol after the fast protocol has finished transmitting the file.
+
+
+Old Fastloader in freezed files
+===============================
+Some older versions of the Final Cartridge 3 appear to use a different
+fast loader in freezed files. This has been confirmed for a cartridge
+ROM that reports itself as "SEP 1987", Disk Operations V1.0. This
+particular loader is a simple 2-bit fastloader using the following
+timing tables:
+
+PAL:
+   Time  Clock Data
+   ----------------
+    0us  0->1  (1)  (timing reference)
+   14us   !b0  !b1
+   22us   !b2  !b3
+   30us   !b4  !b5
+   38us   !b6  !b7
+   46us    1    0   (busy marker)
+
+NTSC:
+   Time  Clock Data
+   ----------------
+    0us  0->1  (1)  (timing reference)
+   14us   !b0  !b1
+   24us   !b2  !b3
+   34us   !b4  !b5
+   44us   !b6  !b7
+   52us    1    0   (busy marker)
+
+The timing reference check on the clock line should be implemented as
+an actual check for a transition as the C64 sets the clock line low 53
+cycles (PAL) after the timing reference - if the sending device is fast
+enough, a simple check for clock high will misread the busy marker at
+the end as a start signal for the next byte.
+
+Sectors are read in sequence, only the data is transferred. Upon
+start and between the transmission of two bytes, the loader sets clock
+high, data low as "busy" marker. It appears that this loader does not
+transmit any end-of-file indication. No specific file is opened,
+instead the transfer starts with the last track/sector that was
+accessed which should correspond to the file open on secondary address
+0. The specific specs for a file transfer are as follows:
+
+- set clock high, data low
+- read current sector
+- transmit all bytes in file:
+  - set clock and data high
+  - (maybe delay clock check until 17us after clock/data high)
+  - wait until clock is high
+  - follow timing table above
+- exit (implicitly resets clock/data to high)
+
+
+
+EXOS V3
+=======
+The protocol used by the EXOS V3 kernal by J. Schemmel is exactly the same
+as the one used by the FC3, but it seems that the C64-side code is slightly
+less efficient - the delay between two tuples must be increased a bit
+(150us fails, 190us works, exact limit not tested) or loading will hang.
+
+Judging from the code differences and the relative release dates both
+are probably derived from a common source whose code was optimized in
+different ways by the two authors.
+
+There is also a kernal called "The Beast System" which is based on EXOS
+and uses the same fast loader code.
+
+SAVING
+======
+
+The FC3 first opens the file for writing, if this works well, it starts its
+drive code. This code receives and saves the data.
+
+The first byte marks the size of the block. If this byte is 0, a full block of
+254 bytes follows which is not the last one. If other numbers are received,
+n - 1 bytes will follow and this will be the last block. Note that transferred
+blocks do not correspond to disk sectors, as each full block has 254 bytes,
+also the first one which contains the start address.
+
+The drive releases DATA to show that it's ready to receive data. Then the C64
+releases CLOCK to synchronize the file transfer.
+
+The following diagram shows the position of each bit being transfered. The bits
+are send low-active.
+
+C64 write (PAL)
+0   (+12)   12  (+10) 22    (+16)    38  (+10) 48  (+10) 58               cycle
+|-----------|---------|--------------|---------|---------|---------------
+0           11.8      21.7           37.4      47.3      57.1                us
+CLOCK high  D=5       D=4            D=1       D=0       CLOCK low
+(sync)      C=7       C=6            C=3       C=2       (busy)
+
+sd2iec read
+|----------------|------------|-----------|---------|--------------------
+0     (+17)      17   (+13)   30  (+12)   42  (+10) 52                       us
+
+After reading the last pair of bits the drive pulls DATA down to show it's
+busy. Apparently there's no mechanism to signal situations like "disk full".
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/geos-protocol.txt b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/geos-protocol.txt
new file mode 100644
index 00000000..19950adf
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/geos-protocol.txt
@@ -0,0 +1,395 @@
+GEOS fast loader protocol
+=========================
+
+Documented by Ingo Korb
+
+GEOS 64 2.0 uses multiple (but similiar) drive codes during its boot process,
+all of them uploaded using M-W. The protocol is the same for every
+drive type (FIXME: check FD/HD), but the addresses sent differ between
+drives and also between stages. The first stage loader sends hard-coded
+sector chains to the computer, stage 2 and 3 receive commands (actually
+jump addresses in drive memory) from the computer. Copy protection checks
+happen in both stage 1 and 2, but the check in stage 2 is completely
+transparent for a reimplementation that does not plan on failing it.
+
+GEOS 128 2.0 uses a stage 2 loader that is almost identical to the
+GEOS 64 stage 3 loader, handling it the same in emulation will work
+because the changes are only related to copy protection checks.
+
+GEOS 1.3 uses the same stage 1 and 2 code as GEOS 2.0, but does not
+upload a stage 3 version. It was not tested in-depth, some operation
+addresses may be missing.
+
+An implementation of this speeder will need to reserve a 256 byte
+buffer for data and a second buffer of at least 4 bytes (no larger
+transfers have been observed yet, but the protocol could support
+up to 256 bytes containing arbitrary 6502 code) for receiving commands.
+
+During boot GEOS will try to auto-detect the drive type by reading
+large parts of the rom using M-R. The specifics of this rom check have
+not been analyzed yet, but GEOS will assume a 1541 for the boot drive
+and no drive for any other when it sees semi-random data (as in the
+implementation of M-R in sd2iec). Selecting a drive in Configure will
+also result in a rom check, but it seems to accept the choice anyway
+if nonsensical data is returned.
+
+This file is roughly ordered from lowest to highest protocol level.
+
+
+Low-Level byte reception
+------------------------
+Both data and clock should be set to high already from previous
+operations. Using the high->low transition of clock as a timing
+reference, receive bits as shown in the following tables. The timing
+differs for 1MHz (1541) and 2MHz (1571/1581) drives.
+
+1MHz:
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+   15us   !b4  !b5
+   29us   !b6  !b7
+   43us   !b3  !b1
+   59us   !b2  !b0
+
+2MHz:
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+   15us   !b4  !b5
+   29us   !b6  !b7
+   39.5us !b3  !b1
+   50.5us !b2  !b0
+
+During a block reception, the time from the completion of one byte and
+the beginning of the next is 9+11us (before+after). Without a bit of
+post-transfer delay the next transfer may be garbled.
+
+
+Low-Level byte transmission
+---------------------------
+To transmit a data byte, do this:
+- release both clock and data
+(- add a small delay so the bus can charge to high level)
+- wait until clock is low
+- use the following tables for bit timings, using the low->high transition of
+  the clock line as timing reference - there are three variations for
+  1MHz (1541), 2MHz (1571/1581 in Configure 2.0 or 2.1) drives:
+
+1MHz:
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+   18us   !b3  !b1
+   28us   !b2  !b0
+   39us    b4   b5
+   51us    b6   b7
+   70us    -    -   (hold time so the C64 has time to read b6/b7)
+
+2MHz for 1571 (always) and 1581 (Configure 2.0):
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+    9us   !b3  !b1
+   20us   !b2  !b0
+   32us    b4   b5
+   44us    b6   b7
+   66us    -    -   (hold time so the C64 has time to read b6/b7)
+
+2MHz for 1581 (Configure 2.1):
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+    7us    b0   b1
+   14us    b2   b3
+   24us    b4   b5
+   33us    b6   b7
+   45us    -    -   (hold time so the C64 has time to read b6/b7)
+
+
+Note: This description assumes that the reimplementation can
+synchronize to the falling edge of the clock line with much less
+jitter than a 1541 can. The original 1MHz code also tests for the
+rising edge of the 10us pulse on the clock line in order to reduce the
+timing jitter from seven to five clock cycles.
+
+
+Receiving a block
+-----------------
+Data is transferred from the C64 to the drive in blocks of variable
+size from 1-256 bytes. A block transfer of k bytes happens as follows:
+
+- wait until clock is high
+- set data high
+(- delay 15us?)
+- receive k bytes, starting at the end of the buffer
+- set data low
+
+To receive a block from the C64, this block transfer is invoked
+twice. First a one-byte transfer is used to set the block length (0
+stands for 256 bytes), then a second transfer with that number of
+bytes is used to transfer the data. Please note that the data is
+transferred backwards (i.e. sending buffer[k-1], [k-2], ..., [0]).
+
+
+Transmitting the job result (STATUS)
+------------------------------------
+The STATUS operation is called occasionally to check if a previous
+operation has completed successfully. It transmits a single byte which
+is a job status code read from $0000 in the original implementation. A
+minimal implementation that just sends 1 for ok and 2 if a disk
+read/write operation failed is sufficient. The STATUS operation does
+the following:
+
+- wait until clock is high
+- set data high
+- send a single 0x01 byte as length indicator
+- set clock high, data low
+- delay 15us (time guessed, but works)
+- wait until clock is low
+- set data high
+- send the status byte
+- set clock high, data low
+- delay 15us (time guessed, but works)
+
+
+Transmitting the data buffer (TRANSMIT_3)
+-----------------------------------------
+The TRANSMIT operation of stage 3 is usually called after reading a
+sector to transfer its contents to the C64. It works as follows:
+
+- wait until clock is high
+- set data high
+- transmit all 256 bytes of the buffer, starting at last byte
+- set clock high, data low
+- delay 15us (time guessed, but works)
+- call the STATUS operation
+
+Please note that the transmit operation transfers data backwards, just
+as receive does.
+
+
+Transmitting the data buffer (TRANSMIT_2)
+-----------------------------------------
+Stage 2 uses a slightly different implementation of TRANSMIT. Instead
+of always sending the data buffer it will instead execute a STATUS
+operation if a previous operation returned an error and a modified
+TRANSMIT operation if the previous operation was successful. The
+modified TRANSMIT operation works as follows:
+
+- wait until clock is high
+- set data high
+- send a single 0x00 byte as length indicator
+- set clock high, data low
+- delay 15us (time guessed, but works)
+(same steps as TRANSMIT_3 from here)
+- wait until clock is high
+- set data high
+- transmit all 256 bytes of the buffer, starting at last byte
+- set clock high, data low
+- delay 15us (time guessed, but works)
+- call the STATUS operation
+
+
+Transmitting the data buffer (TRANSMIT_81)
+------------------------------------------
+The 1581 code uses yet another variation on the transmit scheme. If
+bit 7 of the first parameter byte is 0, it sends all 256 bytes of the
+buffer followed by a status operation (exactly as TRANSMIT_3). If bit
+7 if the first parameter byte is 1, it just sends the first two bytes
+(still in reverse order) before running STATUS.
+
+
+Reading a sector (READ)
+-----------------------
+The READ operation requires no communication with the computer. The
+first parameter (see main loop entry below) is the track, the second
+parameter is the sector number.
+
+
+Reading and transmitting a sector (READ_AND_SEND)
+-------------------------------------------------
+This operation is only found in the 1571 (FIXME: 1581 too?) drive
+code. It reads the track/sector sent as parameter (as READ) and
+immediately transmits it to the computer, followed by a STATUS
+operation (same as TRANSMIT_3).
+
+
+Writing a sector (WRITE_41)
+---------------------------
+The WRITE_41 operation receives a block into the data buffer and writes
+it to the track/sector specified by the first/second parameter (see
+main loop entry below).
+
+
+Writing a sector (WRITE_71)
+---------------------------
+The 1571/1581 code uses a slightly different WRITE operation.
+It still uses the first/second parameter as track/sector, but always
+receives exactly 256 bytes (without length byte prefix). After
+receiving the data, the STATUS operation is called
+
+
+Exiting the fastloader (QUIT)
+-----------------------------
+GEOS only enables its fast loader on one drive at a time and will also
+quit it if it needs to run standard CBM DOS commands, e.g. for
+formatting a disk. At least during boot the system will assume that
+the fast loader code is still present in the drive ram and M-E it
+without another upload. The QUIT operation does the following:
+
+- wait until clock is high
+- set data high
+- return to the standard serial bus handler
+
+Note: The original stage 2 does not wait, but using the stage 3
+      implementation for stage 2 works fine.
+
+
+Initializing a disk (INITIALIZE)
+--------------------------------
+In the original code this operation will try to find a readable track
+and set the bit rate to the correct value for this track. A
+reimplementation can completely ignore this operation. In the 1581
+code this operation implicitly calls FLUSH.
+
+
+Flushing dirty buffers (FLUSH)
+------------------------------
+The 1581 code has an operation that is not seen in the 1541/1571
+code. It flushes dirty buffer contents to disks, without any
+communication with the computer. A reimplementation can handle it the
+same way as INITIALIZE, i.e. ignore it.
+
+
+Change device address (SET_ADDRESS)
+-----------------------------------
+This operation is used when swapping the C drive with either A or B
+and changes the device address used during standard serial
+communication. The parameter byte is the new address ORed with 0x20.
+
+
+Stage 2/3 initialisation and main loop
+--------------------------------------
+The diskTurbo protocol uses a very simple handshake when it is
+executed with M-E:
+
+- set data low
+- wait until CLOCK is low
+
+After that it enters its own main loop which runs until a QUIT
+operation is received. The main loop just does a block receive into
+the command buffer, which should transfer just 2-4 bytes (FIXME: Check
+that). The first two bytes are used as an indirect jump address (low
+byte first), the third and fourth byte (if they exist) are optional
+parameters for the operation.
+
+Because of the indirect jump used it is possible that this
+documentation is missing operations, but the seven operations listed
+are the only ones that have been seen during testing and all the code
+uploaded to the drive has been accounted for.
+
+The following addresses have been observed in the various stages and
+drive variations until now. (FIXME: Unique between all variations?)
+
+Addr   Function
+----  ----------
+031f  STATUS        (1541 stage 2 - only used in GEOS 1.3; 1571)
+031f  TRANSMIT_81   (1581)
+0320  TRANSMIT_3    (1541 stage 3)
+0325  STATUS        (1541 stage 3)
+032b  STATUS        (1581)
+0412  QUIT          (1541 stage 2)
+0420  QUIT          (1541 stage 3)
+0428  SET_ADDRESS   (1541 stage 2 - guessed from code, not seen in action yet)
+0432  TRANSMIT_2    (1541 stage 2)
+0439  SET_ADDRESS   (1541 stage 3)
+0457  QUIT          (1581)
+0475  QUIT          (1571)
+047c  WRITE_71      (1581) [sic!]
+049b  INITIALIZE    (1581)
+04a5  SET_ADDRESS   (1571)
+04af  READ_AND_SEND (1571)
+04b9  FLUSH         (1581)
+04cc  READ          (1581)
+04dc  INITIALIZE    (1541 stage 3)
+0504  INITIALIZE    (1541 stage 2 - only used in GEOS 1.3)
+057c  WRITE_41      (1541 stage 2 and 3)
+057e  INITIALIZE    (1571)
+058e  READ          (1541 stage 2 and 3)
+05fe  WRITE_71      (1571)
+
+Please note that address 031f is used with different functions in the
+1541/71 and 1581 code.
+
+There is no SET_ADDRESS function for the 1581, GEOS uses the standard
+U0> command instead.
+
+
+Stage 1 sector chain transfer
+-----------------------------
+The chain transfer in stage 1 works similiarly to a file transfer from
+a D64 in standard mode - a track/sector number is passed to the transfer
+subroutine which will read that sector, transfer its data and switch
+to the next track/sector specified in the first two bytes of the
+sector unless the track byte is 0 to mark the end of the chain.
+
+A transfer of a single sector in a chain works like this:
+- read the current sector (specified by track and sector numbers,
+  initial value passed as parameter)
+- decrypt the data starting at offset 2 of the sector if necessary
+- calculate the actual number of bytes in the sector
+  (sectordata[1]-1 if sectordata[0] is zero; 254 otherwise)
+- wait until clock is low
+- set data high
+- send the actual number of bytes in the sector
+- set clock high, data low
+- delay 15us
+(same steps as TRANSMIT_3 from here, just with a different number of bytes)
+- wait until clock is high
+- set data high
+- transmit data bytes, starting at the last byte
+- set clock high, data low
+- delay 15us (time guessed, but works)
+- call the STATUS operation
+- if sectordata[0] is non-zero:
+  - use sectordata[0] as current track, sectordata[1] as current sector
+  - transfer the next sector
+
+After sending the last sector in the chain, one more byte must be sent:
+- wait until clock is high
+- set data high
+- send a 0-byte
+- set clock high, data low
+- delay 15us
+
+
+Stage 1 operation
+-----------------
+Stage 1 is a fixed-function loader that sends three hard-coded sector
+chains to the computer, decrypting the second and third by XORing the
+data bytes with parts of its own code. The decryption key can be
+captured from the M-W commands used to upload stage 1, the key
+consists of 254 bytes starting at memory address 0x042a for GEOS 64 or
+0x044f for GEOS 128.
+
+To decrypt a data buffer before sending it to the computer, XOR each
+byte of the data buffer with the corresponding byte of the key, i.e.:
+    for (i=0;i<254;i++)
+      buffer[i] = buffer[i] ^ key[i];
+
+The stage 1 loader in GEOS 64 does the following:
+- set data low
+- wait until clock is low
+- transfer the sector chain starting at track 19 sector 13
+  (without decryption)
+- transfer the sector chain starting at track 20 sector 15
+  (including decryption)
+- transfer the sector chain starting at track 20 sector 17
+  (including decryption)
+- set data high
+- return to the standard serial bus handler
+
+In GEOS 128 the operation is basically the same, but the sector chains
+are different. The unencrypted one is 19/12, followed by decrypted
+chains 20/15, 23/6 and 24/4.
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/gijoe.txt b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/gijoe.txt
new file mode 100644
index 00000000..99730594
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/gijoe.txt
@@ -0,0 +1,97 @@
+G.I. Joe Loader Protocol
+========================
+
+Documented by Ingo Korb
+
+Said to be the most-ripped IRQ loader, although only three programs using
+it have been located yet:
+- G.I. Joe
+- Crown (cracked by Sharks)
+- Cucumber Juice II by Hitmen (switch to IRQ loader mode manually)
+
+Each of these uploads the drive code with M-W statements of different
+length, but all of them send the commands in increasing memory address
+order. A CRC-based detection scheme may need to compare the CRC after
+every byte instead of every command to trigger reliably.
+
+The protocol used in this loader is completely synchronous, triggered
+by both edges of the CLK line; ATN is unused but may change anyway
+in some implementations of the C64 side.
+
+High Level
+==========
+
+After the M-E command has been received, set both DATA and CLK high
+and disable ATN acknowledge. The original drive code uses a slightly
+weird loop to wait until the bus is completely idle at this point,
+simply waiting 10 milliseconds and then looping until both DATA and
+CLK are high seems to be sufficient.
+
+Main loop
+---------
+1) Set CLK low
+2) Wait until DATA is low
+3) Set CLK high
+4) Read a byte, discard it
+5) Read two bytes
+6) Set CLK low
+7) Try to open a file whose name starts with the two bytes received in step 5
+8) If not successful, send error and restart main loop
+9) Send file contents
+10) Send 0xac 0xff
+11) (Close file if neccessary)
+12) Restart main loop
+
+Sending file contents
+---------------------
+1) Send file in blocks of 254 bytes (or less for the last block):
+  2) Set CLK high
+  3) Send all bytes in file order - if byte is 0xac, send twice
+  4) If another block is available to send:
+    5) Send 0xac 0xc3
+    6) Set CLK low
+5) Send 0xac 0xff as end marker
+6) (Close file if necessary)
+
+If a read error is encountered while sending the file contents,
+send error and return to main loop.
+
+Sending error
+-------------
+1) Set CLK high
+2) Send 0xfe 0xfe 0xac 0xf7
+3) (Close file if neccessary)
+
+Low Level
+=========
+
+Receiving a byte
+----------------
+1) byte = 0
+2) Repeat 4 times:
+  3) Wait until CLK is low
+  4) delay ~2-5 microseconds
+  5) byte = byte >> 1
+  6) Read DATA
+  7) If DATA was low in step 6: byte = byte | 0x80
+  8) Wait until CLK is high
+  9) delay ~2-5 microseconds
+ 10) byte = byte >> 1
+ 11) Read DATA
+ 12) If DATA was low in step 11: byte = byte | 0x80
+
+Note: The delays in step 4 and 9 are recommended because the C64 sets
+      both the clock and data line at the same time. A small
+      difference in propagation time between the two lines can easily
+      cause data corruption when the delay is too small.
+
+Sending a byte
+--------------
+1) Repeat 4 times:
+  2) Wait until CLK is high
+  3) Set data to (byte & 1)
+  4) byte = byte >> 1
+  5) Wait until CLK is low
+  6) Set data to (byte & 1)
+  7) byte = byte >> 1
+
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/mbed-pinout.txt b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/mbed-pinout.txt
new file mode 100644
index 00000000..94a421ac
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/mbed-pinout.txt
@@ -0,0 +1,40 @@
+Quick notes on using sd2iec with an mbed LPC1768:
+- if in any doubt, wait until someone has designed a nice PCB for this
+- this information can become obsolete faster than you expect, so
+  don't complain if you need to rewire your device
+- an XPresso LPC1768 should also work, but I haven't tested that
+- UART 0 is the debug serial port (USB-connected on mbed)
+- an external 24C02 or similiar EEPROM is required for the
+  configuration settings - steal one from an old DIMM ;)
+- an external 3.3V regulator may or may not be required
+  (I'm using one, but VOUT of the mbed may be sufficient)
+- SD card interface:
+  - p11  DI
+  - p12  DO
+  - p13  CLK
+  - p14  SD card CS
+  - p17  card detect switch (grounded if card inserted)
+  - p18  write protect switch (grounded if write protection disabled)
+- I2C interface to the EEPROM (and display - untested!)
+  - p9   SDA
+  - p10  SCL
+  - use external 4k7 pullups to 3.3V!
+- address selection
+  - p21  8/9
+  - p22  8/10
+- buttons
+  - p23  Next
+  - p24  Previous
+- serial bus
+  - inputs connected via a 74HCT14 (LS is ok too, HC is NOT)
+  - outputs connected via a 74HCT06 (LS is ok too, HC is NOT)
+  - inputs:
+    - p15 ATN
+    - p30 Clock
+    - p29 Data
+    - p16 SRQ
+  - outputs:
+    - p6 ATN
+    - p8 Clock
+    - p7 Data
+    - p5 SRQ
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/nippon-loader.txt b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/nippon-loader.txt
new file mode 100644
index 00000000..2d9e7484
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/nippon-loader.txt
@@ -0,0 +1,387 @@
+Nippon Loader (by Joerg Jungermann)
+=============
+This document describes the reverse engineered portion of the loader used
+in the german adventure role playing game "Nippon".
+It is unknown if this loader is used in other releases.
+
+The loader is not fast, but the timing is relaxed.
+It works without crystal and allows IRQs to be enabled on the C64 side.
+
+
+State machine
+-------------
+The code executed in the 15x1 implements the following state machine.
+ATN low and CLOCK are used to syncronise C64 and Floppy. The data is transmitted via DATA.
+
+The state machine is started by uploading multiple chunks of code in 16byte blocks to drives
+memory from $0300 to $041f. The last block uploaded begins at $0410 and has the checksum $43c1.
+Therefor it is used to identify the loader, if a successive call using M-E executes code at $0300.
+
+       START
+      +---------+
+ +->--|idle loop|
+ |    +---------+
+ |       |
+ |       | ATN low
+ ^       |
+ |       |
+ |       V
+ |    +-------+  T > $80       +-----------------+
+ |    |get T/S|--------------->| exit to CBM-DOS |
+ |    +-------+                +-----------------+
+ |       |  |
+ |       |  +------------------+
+ |       |                     |
+ ^       | S < $80             | S > $80
+ |       V                     V
+ |    +---------+            +----------------------+
+ +-<--|write T/S|            |read T/S with S &= $7f|
+ |    +---------+            +----------------------+
+ |                                   V
+ +--<--------------------<-----------+
+
+
+Idle loop
+---------
+The idle loop set ATN,CLOCK and DATA high, and waits for ATN low to get track, sector and command.
+
+
+Get track & sector
+------------------
+In this state the drive code expects two bytes from the C64. Before any bit is received or sent over
+the IEC bus a special handshake is done to synchronize drive and computer.
+
+The first byte identifies the track for the next action.
+If the track byte is larger than $80 (bit 7 is set) the drive code jumps to the 1541 reset vector.
+This is usually called, if the game is left throug the in game menu.
+
+The second byte fetched contains the command and the sector information: Bit 7 determines if command
+read or write. if bit 7 is set the command is read, otherwise write.
+The sector is the 2nd byte & $80.
+
+
+Synchronisatiion handshake
+--------------------------
+This handshake is done before any bit transfer.
+1. If ATN low, set CLOCK low and jump back to idle loop. Drive code is out of sync with Cevi.
+   Strangly nothing is done to detect such errors an C64 side, except for a endless loop,
+   so the game will work or simply crash.
+2. Wait CLOCK to become low
+
+
+Read byte
+---------
+1. CLK, DATA are set high
+2. Until 8 bits are received via IEC
+ a. Wait for syncronisation handshake to finish, first bit received is bit 0.
+ b. read one bit from DATA
+3. set CLK low and DATA high
+
+Write byte
+----------
+1. CLK, DATA are set high
+2. Until 8 bits are send over IEC
+ a. Wait for syncronisation handshake to finish
+ b. write one bit to DATA, first bit sent is bit 0
+3. set CLK low and DATA high
+
+Read T/S
+--------
+1. Sector T/S is fetched into buffer
+2. Byte after byte is tranfered starting with byte 0 to byte $ff. A full sector is transfered.
+
+Write T/S
+--------
+1. $ff bytes are fetched into a buffer.
+2. Buffer is written as sector T/S.
+
+
+
+Disassembled floppy code
+------------------------
+; CBM Dasm V2.24
+
+*=$0300
+
+; $1800 bits
+;   bit 7  - ATN in inverted, to read bus bit 4 must be 0
+;  ......
+;   bit 4  - ATN out inverted
+;   bit 3  - Clock out inverted
+;   bit 2  - Clock in inverted, to read bus bit 3 must be 0
+;   bit 1  - Data out inverted
+;   bit 0  - Data in inverted, to read bus bit 1 must be 0
+
+; $C6 = tmp ? counter ? transfer byte
+
+; set drive led off and IRQs off
+0300    20  ED  03   JSR $03ED       
+0303    A2  45       LDX #$45        
+0305    86  C6       STX $C6         
+; stack pointer init
+0307    9A           TXS             
+
+; idle loop - wait for ATN low
+; set ATN = CLK = Data = high
+0308    A9  00       LDA #$00        
+030A    8D  00  18   STA $1800       
+030D    AD  00  18   LDA $1800       
+; when ATN low Acc > $80 branch
+0310    30  18       BMI $032A       
+0312    C6  C6       DEC $C6         
+; branch when $c6 is not $00
+0314    D0  F2       BNE $0308       
+; set CLK to 0
+0316    09  08       ORA #$08        
+0318    8D  00  18   STA $1800       
+031B    EA           NOP             
+031C    EA           NOP             
+031D    EA           NOP             
+031E    EA           NOP             
+; branch if ATN low
+031F    AD  00  18   LDA $1800       
+0322    30  0B       BMI $032F       
+; ab undzumal nen irq zulassen
+0324    58           CLI             
+0325    EA           NOP             
+0326    78           SEI             
+0327    4C  08  03   JMP $0308       
+
+
+; fetch track byte
+; CLK to low
+032A    09  08       ORA #$08        
+032C    8D  00  18   STA $1800       
+; wait for ATN high
+032F    AD  00  18   LDA $1800       
+0332    30  FB       BMI $032F       
+; drive LED on
+0334    20  F7  03   JSR $03F7       
+; fetch track byte from IEC
+0337    20  6D  03   JSR $036D       
+; if Accu > $80 reset floppy, exit this code
+033A    10  03       BPL $033F       
+033C    4C  A0  EA   JMP $EAA0       
+
+; store track byte in command for buffer 4
+033F    85  0E       STA $0E         
+
+; fetch a byte from IEC
+0341    20  6D  03   JSR $036D       
+; if Acc < $80 fetch $100 bytes in buffer 4, else read sector to buffer 4
+0344    30  13       BMI $0359       
+; store sector in command for buffer 4
+0346    85  0F       STA $0F         
+; fetch $100 bytes via IEC to $0700 buffer 4
+0348    A0  00       LDY #$00        
+034A    20  6D  03   JSR $036D       
+034D    99  00  07   STA $0700,Y     
+0350    C8           INY             
+0351    D0  F7       BNE $034A       
+; store bytes in buffer 4 to track/sector job 4
+0353    20  01  04   JSR $0401       
+; restart idle loop
+0356    4C  00  03   JMP $0300       
+; store sector in command for buffer 4
+0359    29  7F       AND #$7F        
+035B    85  0F       STA $0F         
+; read sector to buffer 4
+035D    20  04  04   JSR $0404       
+; transfer $100 bytes via IEC
+0360    A0  00       LDY #$00        
+0362    B9  00  07   LDA $0700,Y     
+; send byte
+0365    20  93  03   JSR $0393       
+0368    C8           INY             
+0369    D0  F7       BNE $0362       
+; branch always to idle loop
+036B    F0  93       BEQ $0300       
+
+
+
+; fetch a byte to Accu via IEC
+; bit counter to 8 count down 
+036D    A2  08       LDX #$08        
+; set CLK DATA high
+036F    AD  00  18   LDA $1800       
+0372    29  F5       AND #$F5        
+0374    8D  00  18   STA $1800       
+; wait for ATN, CLOCK low
+0377    20  C2  03   JSR $03C2       
+; fetch DATA in to Carry-Flag
+037A    AD  00  18   LDA $1800       
+037D    4A           LSR             
+; push carry to bit 7 of $c6
+037E    66  C6       ROR $C6         
+; wait Clock high
+0380    20  BA  03   JSR $03BA       
+; bit count decrement
+0383    CA           DEX             
+; fetch next bit
+0384    D0  F1       BNE $0377       
+; data out high, clock low
+0386    AD  00  18   LDA $1800       
+0389    29  FD       AND #$FD        
+038B    09  08       ORA #$08        
+038D    8D  00  18   STA $1800       
+; byte in accu holen
+0390    A5  C6       LDA $C6         
+0392    60           RTS             
+
+
+
+; tranfer byte in Accu via IEC
+; invert Accu and store to $c6
+0393    49  FF       EOR #$FF        
+0395    85  C6       STA $C6         
+; byte counter
+0397    A2  08       LDX #$08        
+; set CLK high
+0399    A9  F7       LDA #$F7        
+039B    2D  00  18   AND $1800       
+039E    8D  00  18   STA $1800       
+; wait for ATN, CLOCK low
+03A1    20  C2  03   JSR $03C2       
+; fetch a bit from $C6
+03A4    A9  00       LDA #$00        
+03A6    46  C6       LSR $C6         
+; bracch if bit to transfer 0 carry clear 
+03A8    90  05       BCC $03AF       
+; bit = 1
+03AA    20  E4  03   JSR $03E4       
+; branch always
+03AD    D0  03       BNE $03B2       
+; bit = 0
+03AF    20  DB  03   JSR $03DB       
+; wait for clock high
+03B2    20  BA  03   JSR $03BA       
+; decrement byte counter
+03B5    CA           DEX 
+; do it till 8 bytes are transfered
+03B6    D0  E9       BNE $03A1
+; branch always
+03B8    F0  CC       BEQ $0386       
+
+
+
+; wait for Clock high
+03BA    A9  04       LDA #$04        
+03BC    2C  00  18   BIT $1800       
+03BF    D0  F9       BNE $03BA       
+03C1    60           RTS             
+
+
+
+; wait for atn, clock low
+; when ATN high and Clock high reinit
+03C2    A9  04       LDA #$04        
+03C4    2C  00  18   BIT $1800       
+; branch if ATN low
+03C7    30  03       BMI $03CC       
+; when CLOCK high wait again for ATN high
+03C9    F0  F7       BEQ $03C2       
+; when ATN, Clock low return
+03CB    60           RTS             
+; set clock low
+03CC    0A           ASL             
+03CD    0D  00  18   ORA $1800       
+03D0    8D  00  18   STA $1800       
+; wait for ATN high
+03D3    2C  00  18   BIT $1800       
+03D6    30  FB       BMI $03D3       
+; reinit
+03D8    4C  00  03   JMP $0300       
+
+
+; set Data high
+03DB    A9  FD       LDA #$FD        
+03DD    2D  00  18   AND $1800       
+03E0    8D  00  18   STA $1800       
+03E3    60           RTS             
+
+; set Data low
+03E4    A9  02       LDA #$02        
+03E6    0D  00  18   ORA $1800       
+03E9    8D  00  18   STA $1800       
+03EC    60           RTS             
+
+
+; drive LED off
+03ED    78           SEI             
+03EE    A9  F7       LDA #$F7        
+03F0    2D  00  1C   AND $1C00       
+03F3    8D  00  1C   STA $1C00       
+03F6    60           RTS             
+
+; drive LED on
+03F7    78           SEI             
+03F8    A9  08       LDA #$08        
+03FA    0D  00  1C   ORA $1C00       
+03FD    8D  00  1C   STA $1C00       
+0400    60           RTS             
+
+
+; exec write sector job code, wait for end
+0401    A9  90       LDA #$90        
+0403    2C  A9  80   BIT $80A9       
+
+; exec read sector job code, wait for end
+  0404 LDA #$80
+0406    85  04       STA $04         
+0408    58           CLI             
+0409    A5  04       LDA $04         
+040B    30  FC       BMI $0409       
+040D    78           SEI             
+040E    60           RTS             
+
+
+040F    50  85       BVC $0396       
+0411    48           PHA             
+0412    60           RTS             
+
+
+0413    0D  00  18   ORA $1800       
+0416    8D  00  18   STA $1800       
+0419    2C  00  18   BIT $1800       
+041C    30  FB       BMI $0419       
+041E    4C  00  03   JMP $0300       
+
+
+0421    A9  FD       LDA #$FD        
+0423    2D  00  18   AND $1800       
+0426    8D  00  18   STA $1800       
+0429    60           RTS             
+
+
+042A    A9  02       LDA #$02        
+042C    0D  00  18   ORA $1800       
+042F    8D  00  18   STA $1800       
+0432    60           RTS             
+
+
+0433    78           SEI             
+0434    A9  F7       LDA #$F7        
+0436    2D  00  1C   AND $1C00       
+0439    8D  00  1C   STA $1C00       
+043C    60           RTS             
+
+
+043D    A9  90       LDA #$90        
+043F    2C  A9  80   BIT $80A9       
+0442    85  04       STA $04         
+0444    A5  04       LDA $04         
+0446    30  FC       BMI $0444       
+0448    60           RTS             
+
+
+0449    04                   
+044A    30  FC       BMI $0448       
+044C    60           RTS             
+
+
+044D    FF                   
+044E    FF                   
+044F    FF                   
+0450-04FF    00           BRK             
+
+; End of file.
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/uloadm3.txt b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/uloadm3.txt
new file mode 100644
index 00000000..ee4dc945
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/uloadm3.txt
@@ -0,0 +1,129 @@
+ULoad Model 3 Protocol
+======================
+
+ULoad Model 3 by MagerValp, http://www.paradroid.net/uload/
+documented by Ingo Korb
+
+ULoad Model 3 is a 2-bit byte-synchronizing fast loader that
+doesn't use ATN and assumes a track/sector-organized medium with
+a standard CBM directory layout. It uses the same drive detection
+code as Dreamload, but unlike Dreamload it can also change existing
+files.
+
+High level
+==========
+
+ULoad Model 3 has its own "idle loop" that reads a command byte and
+reacts accordingly. It aborts when the ATN line is low while waiting
+for synchronisation in the byte receive subroutine.
+
+"Idle loop"
+-----------
+1) Receive a byte
+2) If byte is 1, call "Load a file"
+3) If byte is 2, call "Replace a file"
+4) If byte is 36 ('$'), call "Directory"
+5) Otherwise send a 0xff byte
+6) Go to 1
+
+Load a file (command code 1)
+----------------------------
+1) Receive a byte, store as track number
+2) Receive a byte, store as sector number
+3) Call Chain transmission
+
+Replace a file (command code 2)
+-------------------------------
+1) Receive a byte, store as track number
+2) Receive a byte, store as sector number
+3) Read current track/sector to buffer
+   If reading was not successful: Send 0xff, return to Idle loop
+4) Get the number of bytes used in the current sector
+   (buffer[1]-1 if buffer[0] is 0, 254 otherwise)
+5) Send number of byte used
+6) If this is the first sector:
+   a) Send buffer[2] (start address low)
+   b) Send buffer[3] (start address high)
+   c) Start at buffer[4], reduce number of bytes by 2
+   Otherwise:
+   a) Start at buffer[2]
+7) Receive <number of bytes> bytes into buffer
+8) Write buffer contents to disk, same track/sector
+   If writing was not successful: Send 0xff, return to Idle loop
+9) Set track = buffer[0], sector = buffer[1]
+10) If track != 0, go to 3
+11) Send 0
+12) Return to Idle loop
+
+Directory
+---------
+1) Get the start of directory from somewhere, store as track/sector
+   (track 18 sector 1 on a 1541)
+2) Call Chain transmission
+
+Chain transmission
+------------------
+1) Read current track/sector to buffer
+   If reading was not successful: Send 0xff, return to Idle loop
+2) Get the number of bytes used in the current sector
+   (buffer[1]-1 if buffer[0] is 0, 254 otherwise)
+3) Send number of bytes used
+4) Send that many bytes, starting at buffer[2]
+5) Set track = buffer[0], sector = buffer[1]
+6) If track != 0, go to 1
+7) Send 0
+8) Return to Idle loop
+
+
+Low level
+=========
+
+Receiving a byte
+----------------
+1) set clock low, data high
+2) wait until data is low; if ATN is low return to the standard bus loop
+3) set clock high, data high
+4) wait until data is high
+5) transfer data (see table below)
+6) invert resulting byte
+7) delay for about 20 microseconds to make sure the C64 has returned
+   the bus to clock high/data high, otherwise the next send/receive
+   call can fail
+
+Sampling times for reception:
+
+Time Clk Data
+-------------
+ 0us (1) 0->1   (data low -> high transition in step 4 is the timing reference)
+14us  b7   b5
+24us  b6   b4
+38us  b3   b1
+48us  b2   b0
+
+The original transfer code reads the first data sample between 11us and 17us
+after the data line transition.
+
+Sending a byte
+--------------
+1) set clock high, data low
+2) wait until clock is low; no ATN abort in the original, but it wouldn't hurt
+3) set clock high, data high
+4) wait until clock is high
+5) transfer data (see table below)
+6) set clock high, data high
+
+Timing for transmission:
+
+Time Clk Data
+-------------
+ 0us 0->1 (1)   (clock low -> high transition in step 4 is the timing reference)
+14us  b0   b1
+22us  b2   b3
+30us  b4   b5
+38us  b6   b7
+48us  1    1    (step 6)
+
+Note: Bits are sent without inversion, i.e. low for a 0-bit, high for a 1-bit.
+
+The original transfer code sends the first bit pair between 11us and 17us
+after the clock line transition.
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/wheels-protocol.txt b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/wheels-protocol.txt
new file mode 100644
index 00000000..1a4281cd
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/doc/wheels-protocol.txt
@@ -0,0 +1,405 @@
+Wheels fast loader protocol
+===========================
+
+Documented by Ingo Korb
+
+Wheels 4.4 note
+---------------
+Although the analyzed pre-4.4 versions of wheels had a nice,
+consistent loader design with just two different byte
+transmission/reception variations and a fully compatible protocol
+between all drive types, Wheels 4.4 ditched that for some reason. The
+protocol is still similiar to the previous versions, but there are
+some important differences which depend on the drive type. The pre-4.4
+versions are used as the baseline in this document, changes in 4.4 are
+noted where appropiate.
+
+Low-Level byte transmission
+---------------------------
+Both data and clock should be set to high already from previous
+operations. Using the high->low transition of clock as a timing
+reference, send bits as shown in the following table. For older
+versions of Wheels the timing and bit order only differs between 1MHz
+(154) and 2MHz (everything else) drives. Wheels 4.4 runs the 1571 in
+1MHz mode using the 1541 timing from previous Wheels versions and
+uses a slowed-down timing for the 1581 and CMD drives.
+
+1541 (all versions) and 1571 (Wheels 4.4):
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+    9us   !b3  !b1
+   23us   !b2  !b0
+   37us   !b7  !b5
+   51us   !b6  !b4
+   73us    -    -   (hold time so the C64 has time to read b6/b4)
+
+2MHz (Wheels pre-4.4 - identical to GEOS 1581 with Configure 2.1):
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+    7us    b0   b1
+   14us    b2   b3
+   24us    b4   b5
+   33us    b6   b7
+   45us    -    -   (hold time so the C64 has time to read b6/b7)
+
+1581/CMD (Wheels 4.4):
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+    7us    b0   b1
+   15us    b2   b3
+   26us    b4   b5
+   37us    b6   b7
+   52us    -    -   (hold time so the C64 has time to read b6/b7)
+
+
+Low-Level byte reception
+------------------------
+Both data and clock should be set to high already from previous
+operations. Using the high->low transition of clock as a timing
+reference, receive bits as shown in the following table. The timing
+and bit order differs for 1MHz (1541) and 2MHz (everything else)
+drives:
+
+1MHz (Wheels pre-4.4):
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+   16us   !b7  !b5
+   26us   !b6  !b4
+   41us   !b3  !b1
+   54us   !b2  !b0
+
+2MHz (Wheels pre-4.4 - identical to GEOS 2MHz timing):
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+   15us   !b4  !b5
+   29us   !b6  !b7
+   39.5us !b3  !b1
+   50.5us !b2  !b0
+
+1541/1571 (Wheels 4.4):
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+   17us   !b7  !b5
+   28us   !b6  !b4
+   45us   !b3  !b1
+   61us   !b2  !b0
+   81us   -    -    (recommended delay before returning)
+
+1581/CMD (Wheels 4.4):
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+   15us   !b0  !b1
+   26us   !b2  !b3
+   37us   !b4  !b5
+   48us   !b6  !b7
+   60us   -    -    (recommended delay before returning)
+
+
+Receiving a block
+-----------------
+Data is transferred from the C64 to the drive in blocks of variable
+size from 1-256 bytes. A block transfer of k bytes happens as follows:
+
+- wait until clock is high
+- set data high
+(- delay 15us?)
+- receive k bytes, starting at the end of the buffer
+- Wheels 4.4 only: Wait until clock is low
+- set data low
+
+Unlike GEOS, the block length is always determined on the drive
+side. The only sizes used are 4 bytes for commands and 256 bytes when
+receiving a sector to write.
+
+Transmitting a block
+--------------------
+When transferring data to the C64 the block size is variable from 1 to
+256 bytes and is not explicitly sent to the computer. A block transfer
+of k bytes happens as follows:
+
+- wait until clock is high
+- set data and clock high
+- transmit all k data bytes, starting with the last byte
+- delay 20us
+- Wheels pre-4.4 and 4.4 on 1541/1571:
+  - set data low, clock high
+  - wait until clock is low
+- Wheels 4.4 on 1581/CMD
+  - set data and clock high
+  - wait until clock is low
+  - set data low
+
+
+Parallel block transfer (HD only)
+---------------------------------
+Note: This section is based on a disassembly of the drive code only
+and has not been verified in reality.
+
+Wheels can utilize the parallel port of the CMD HD for increased
+transfer speed. Before every block transfer the drive checks if a flag
+byte at $031e (inside the drive code) has bit 7 set - if it is set,
+parallel mode is used instead of the serial transfer described
+above. The flag is never set within the drive code, it is assumed that
+it'll be set when the code is uploaded (if at all). The flag is reset
+in the drive code in a single place - if the high byte of the RPC
+address is anything except $03, the code calls STATUS, sets clock/data
+high, clears the parallel flag and runs QUIT to exit.
+
+NOTE: Wheels 4.4 does not use the serial port at all after starting
+the drive code with the parallel mode flag set. Instead of waiting for
+a certain state on the clock line it waits for the inverted state on
+bit 6 of port B (PB6) of the 8255 and instead of setting the data line low
+or high it sets bit 7 of port C (PC7) of the 8255 to high/low. It is
+currently assumed that those two pins are connected to the handshake
+lines of the parallel connector of the HD, but it is not known if this
+connection is inverted or not.
+
+Parallel block reception pre-4.4
+--------------------------------
+The parallel block reception is called instead of the standard block
+reception subroutine and expects a byte count (1-256) as parameter.
+
+- wait until clock is high
+- set data and clock high
+- reception loop:
+  - wait until clock is low
+  - read parallel port
+  - set data low
+  - store received byte
+  - decrement count
+  - exit loop if count is now 0
+
+  - wait until clock is high
+  - read parallel port
+  - set data high
+  - store received byte
+  - decrement count
+  - exit loop if count is now 0
+- wait until clock is low (always, exit point in loop doesn't matter)
+- set data low (same)
+
+Parallel block reception 4.4
+----------------------------
+Again the parallel block reception is called instead of the standard
+block reception subroutine.
+
+- reception loop (one iteration per byte):
+  - wait until PB6 is 0
+  - read parallel port
+  - set PC7 to 1
+  - wait until PB6 is 1
+  - set PC7 to 0
+  - store received byte
+
+Parallel block transmission pre-4.4
+-----------------------------------
+The parallel block transmission is called instead of the standard
+block transmission subroutine and expects a byte count (1-256) as
+parameter.
+
+- set parallel port to output
+- wait until clock is high
+- set clock and data high
+- transmission loop:
+  - wait until clock is low
+  - read next data byte
+  - send byte to parallel port
+  - set data low
+  - wait until clock is high
+  - decrement count
+  - exit loop if count is now 0
+
+  - read next data byte
+  - send byte to parallel port
+  - set data high
+  - decrement count
+  - exit loop if count is now 0
+- set clock/data high
+- wait until clock is low
+- set data low
+- set parallel port to input
+
+Parallel block transmission 4.4
+-------------------------------
+Again the parallel block transmission is called instead of the
+standard block transmission subroutine.
+
+- set parallel port to output
+- reception loop (one iteration per byte):
+  - read next data byte
+  - wait until PB6 is 0
+  - send byte to parallel port
+  - set PC7 to 1
+  - wait until PB6 is 1
+  - set PC7 to 0
+- set parallel port to input
+
+Stage 1 loader
+--------------
+Note: This stage is only used for 1541/1571 drives, all others load
+the system file with standard KERNAL calls.
+
+The stage 1 loader is a fixed-filename loader that searches for a
+predetermined file and transmits it to the computer. The file name is
+"SYSTEM1" for the C64 version and "128SYSTEM1" for the C128. In the
+1541 loader it is located at $5d9 in drive memory, the number of
+characters compared is at $597. The name in drive memory is terminated
+with a $a0 character that is included in the comparision.
+
+The stage 1 loader does the following:
+- wait until clock is low
+- set data low
+- attempt to open the target file (SYSTEM1 or 128SYSTEM1)
+  - return to the dos main loop if the file wasn't found
+- transfer each sector of the file:
+  - wait until clock is high
+  - set clock/data high
+  - transmit the sector contents starting at the end
+  - set data low
+  - wait until clock is low
+  - advance to the next sector in the chain
+  - exit after the last sector of the file was transferred
+- wait until clock is low
+- set clock/data high
+- return to the dos main loop
+
+
+Stage 2 functions
+=================
+Note: Addresses are for Wheels versions before 4.4. In 4.4 the jump
+table is moved to 0403 for the 1541/1571, to 0503 for the CMD FD/HD,
+but stays at 0303 for the 1581.
+
+Exiting the fastloader (QUIT - 0303)
+------------------------------------
+This function exits the fast loader and returns to the standard dos
+main loop. Wheels may restart the loader with M-E without re-uploading
+the drive code.
+
+- wait until clock is high
+- set clock/data high
+- return to the dos main loop
+
+Writing a sector (WRITE - 0306)
+-------------------------------
+This function receives a sector (256 bytes) and writes them to the
+track/sector already received in the function call. After writing it
+jumps to the STATUS function.
+
+Reading a sector (READ - 0309)
+------------------------------
+This function reads the track/sector that was received together with
+the function address and transmits it to the computer. Regardless of
+the success of the read operation, the full 256 bytes of data are
+always transmitted as a block transfer. After transmitting the sector
+data the loader jumps to the STATUS function.
+
+Reading a sector link pointer (READLINK - 030c)
+-----------------------------------------------
+This function works exactly as READ, but transmits only the first two
+bytes of the sector instead of its full contents.
+
+Transmitting the job result (STATUS - 030f)
+-------------------------------------------
+This function uses the block transfer operation to transmit a single
+byte to the C64. This byte is the job result code from the buffer that
+is used for disk operations.
+
+Calculating the number of free blocks (NATIVE_FREE - 0312)
+----------------------------------------------------------
+This function calculates the number of free blocks in a CMD native
+partition. The first parameter byte is the sector number of the last
+BAM sector that should be read, the second parameter is the last
+byte in that sector that should be added into the result ($00 means
+every byte). Currently there has been no situation observed in which
+those two parameters had values that would limit the calculation to
+less than the entire partition.
+
+The function transmits two bytes to the C64 which are the number of
+free sectors in the current partition (must be CMD native, but isn't
+used for anything else anyway) in little-endian byte order. After
+transmitting this function calls the STATUS function.
+
+Reading the current partition and dir (GET_CURRENT_PART_DIR - 0315)
+-------------------------------------------------------------------
+This function transmits three bytes to the C64. The first two are the
+track and sector of the directory head sector of the current directory
+in the current partition, the third is the number of the current
+partition (1-based as usual).
+
+Setting the current partition and dir (SET_CURRENT_PART_DIR - 0318)
+-------------------------------------------------------------------
+This function changes the current directory and/or partition. It
+received three bytes from the C64. The third byte is the new current
+partition (0 indicates no change), the first two bytes are used as the
+current directory head track and sector in that partition.
+
+Checking for disk change (CHECK_CHANGE - 031b)
+----------------------------------------------
+This function transmits a single byte to the computer using the block
+transfer operation. The byte is either $00 if the disk was not changed
+or $03 if it was. On a 1541 the flag value is obtained from address
+$1c which will be set on a disk change, but is not reset at all while
+the loader is running. If this function returns a "disk changed"
+state, Wheels will exit the loader and send the Initialize dos
+command. A simple implementation that always returns $03 works fine
+for 1541/71/81 modes, but will fail if a CMD FD is emulated.
+
+In Wheels 4.4 an implementation that always returns $03 will fail for
+every drive type (except HD). For a 1571 Wheels 4.4 expects a return
+value of 0 for single-sided disks or $80 for double-sided disks (value
+taken from byte 4 of sector 18/0).
+
+
+Stage 2 loader
+--------------
+The stage 2 loader uses a remote function call system similiar to the
+GEOS 2.0 stage 2/3 loaders. It starts with a simple handshake:
+
+- wait until clock is low
+- set data low
+
+After that it starts its main loop:
+
+- wait until clock is high
+- turn on drive LED
+- receive 4 bytes (in transmission order: sector, track, highbyte, lowbyte)
+- jump to the address received
+- wait until clock is low
+- turn off drive LED
+- restart loader main loop
+
+Unlike the GEOS loaders Wheels calls every function using a jump table
+located at $0303-$031d, so the addresses transmitted are the same for
+every drive type.
+
+0303: QUIT
+0306: WRITE
+0309: READ
+030c: READLINK
+030f: STATUS
+0312: NATIVE_FREE
+0315: GET_CURRENT_PART_DIR
+0318: SET_CURRENT_PART_DIR
+031b: CHECK_CHANGE
+
+NOTE: Wheels 4.4 moves the jump table to 0403 on the 1541 and 1571 or
+0503 on the CMD FD/HD, but the functions and their order is the same.
+
+For CMD drives there are two variations of the loader - one is used
+for native partitions and implements NATIVE_FREE and
+GET_CURRENT_PART_DIR, the other is used for 1581 partitions and omits
+those two functions.
+
+The CMD FD is the only drive that implements all of these
+functions. For the HD, the CHECK_CHANGE function is always dummied out
+(nop/nop/rts), for standard Commodore drives the NATIVE_FREE,
+GET_CURRENT_PART_DIR and SET_CURRENT_PART_DIR functions are dummied
+out (nop/nop/rts).
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/Makefile b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/Makefile
new file mode 100644
index 00000000..4a3d5317
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/Makefile
@@ -0,0 +1,545 @@
+# Hey Emacs, this is a -*- makefile -*-
+
+# FIXME: Reduce overlap between this and the main Makefile
+
+# Define version number
+MAJOR = 0
+MINOR = 0
+PATCHLEVEL = 1
+FIX =
+
+#----------------------------------------------------------------------------
+# WinAVR Makefile Template written by Eric B. Weddington, Joerg Wunsch, et al.
+#
+# Released to the Public Domain
+#
+# Additional material for this makefile was written by:
+# Peter Fleury
+# Tim Henigan
+# Colin O'Flynn
+# Reiner Patommel
+# Markus Pfaff
+# Sander Pool
+# Frederik Rouleau
+#
+#
+# Extensively modified for sd2iec by Ingo Korb
+#
+# To rebuild project do "make clean" then "make all".
+#----------------------------------------------------------------------------
+
+# Read configuration file
+ifdef CONFIG
+ CONFIGSUFFIX = $(CONFIG:config%=%)
+else
+ CONFIG = config
+ CONFIGSUFFIX =
+endif
+
+# Enable verbose compilation with "make V=1"
+ifdef V
+ Q :=
+ E := @:
+else
+ Q := @
+ E := @echo
+endif
+
+# Include the configuration file
+include $(CONFIG)
+
+# Set MCU name and length of binary for bootloader
+MCU := $(CONFIG_MCU)
+ifeq ($(CONFIG_BOOTLOADER),y)
+  ifeq ($(MCU),atmega32)
+    BINARY_LENGTH = 0x7800
+  else ifeq ($(MCU),atmega128)
+    BINARY_LENGTH = 0x1f000
+  else ifeq ($(MCU),atmega1281)
+    BINARY_LENGTH = 0x1f000
+  else ifeq ($(MCU),atmega2561)
+    BINARY_LENGTH = 0x3f000
+  else ifeq ($(MCU),atmega644)
+    BINARY_LENGTH = 0xf000
+  else ifeq ($(MCU),atmega644p)
+    BINARY_LENGTH = 0xf000
+  else
+.PHONY: nochip
+nochip:
+	@echo '=============================================================='
+	@echo 'No known target chip specified.'
+	@echo
+	@echo 'Please disable CONFIG_BOOTLOADER or add the size of the'
+	@echo 'binary to the Makefile.'
+	@exit 1
+  endif
+endif
+
+# Directory for all generated files
+OBJDIR := obj-$(CONFIG_MCU:atmega%=m%)$(CONFIGSUFFIX)
+
+# CPU clock
+F_CPU := $(CONFIG_MCU_FREQ)
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+
+# Target file name (without extension).
+TARGET = $(OBJDIR)/i2clcd
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = main.c lcd.c menu.c encoder.c timer.c
+
+# List Assembler source files here.
+#     Make them always end in a capital .S.  Files ending in a lowercase .s
+#     will not be considered source files but generated files (assembler
+#     output from the compiler), and will be deleted upon "make clean"!
+#     Even though the DOS/Win* filesystem matches both .s and .S the same,
+#     it will preserve the spelling of the filenames, and gcc itself does
+#     care about how the name is spelled on its command-line.
+ASRC =
+
+
+# Optimization level, can be [0, 1, 2, 3, s]. 
+#     0 = turn off optimization. s = optimize for size.
+#     (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+# Use s -mcall-prologues when you really need size...
+#OPT = 2
+OPT = s
+
+# Debugging format.
+#     Native formats for AVR-GCC's -g are dwarf-2 [default] or stabs.
+#     AVR Studio 4.10 requires dwarf-2.
+#     AVR [Extended] COFF format requires stabs, plus an avr-objcopy run.
+DEBUG = dwarf-2
+
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+#     Use forward slashes for directory separators.
+#     For a directory that has spaces, enclose it in quotes.
+EXTRAINCDIRS =
+
+
+# Compiler flag to set the C Standard level.
+#     c89   = "ANSI" C
+#     gnu89 = c89 plus GCC extensions
+#     c99   = ISO C99 standard (not yet fully implemented)
+#     gnu99 = c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+
+# Place -D or -U options here
+CDEFS = -DF_CPU=$(F_CPU)UL
+
+# Calculate bootloader version
+BOOT_VERSION = 0x$(MAJOR)$(MINOR)$(PATCHLEVEL)$(FIX)
+
+# Create a version number define
+ifdef PATCHLEVEL
+ifdef FIX
+PROGRAMVERSION := $(MAJOR).$(MINOR).$(PATCHLEVEL).$(FIX)
+else
+PROGRAMVERSION := $(MAJOR).$(MINOR).$(PATCHLEVEL)
+endif
+else
+PROGRAMVERSION := $(MAJOR).$(MINOR)
+endif
+
+LONGVERSION := -$(CONFIG_MCU:atmega%=m%)$(CONFIGSUFFIX)
+
+CDEFS += -DVERSION=\"$(PROGRAMVERSION)\" -DLONGVERSION=\"$(LONGVERSION)\"
+
+# Place -I options here
+CINCS = -I..
+
+
+
+#---------------- Compiler Options ----------------
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT)
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+CFLAGS += -Wall -Wstrict-prototypes -Werror
+#CFLAGS += -Wa,-adhlns=$(OBJDIR)/$(<:.c=.lst)
+CFLAGS += -I$(OBJDIR)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+
+ifeq ($(CONFIG_STACK_TRACKING),y)
+  CFLAGS += -finstrument-functions
+endif
+
+
+#---------------- Assembler Options ----------------
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(OBJDIR)/$(<:.S=.lst),-gstabs -I$(OBJDIR)
+
+
+#---------------- Library Options ----------------
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+# If this is left blank, then it will use the Standard printf version.
+PRINTF_LIB = 
+#PRINTF_LIB = $(PRINTF_LIB_MIN)
+#PRINTF_LIB = $(PRINTF_LIB_FLOAT)
+
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+# If this is left blank, then it will use the Standard scanf version.
+SCANF_LIB = 
+#SCANF_LIB = $(SCANF_LIB_MIN)
+#SCANF_LIB = $(SCANF_LIB_FLOAT)
+
+
+MATH_LIB = -lm
+
+
+
+#---------------- External Memory Options ----------------
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+
+
+#---------------- Linker Options ----------------
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+ifeq ($(CONFIG_LINKER_RELAX),y)
+  LDFLAGS += -Wl,-O9,-relax
+endif
+
+
+
+#---------------- Programming Options (avrdude) ----------------
+
+# Programming hardware: alf avr910 avrisp bascom bsd 
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500 stk500v2
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+AVRDUDE_PROGRAMMER = stk200
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = lpt1    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+# AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude> 
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+#---------------- Debugging Options ----------------
+
+# For simulavr only - target MCU frequency.
+DEBUG_MFREQ = $(F_CPU)
+
+# Set the DEBUG_UI to either gdb or insight.
+# DEBUG_UI = gdb
+DEBUG_UI = insight
+
+# Set the debugging back-end to either avarice, simulavr.
+DEBUG_BACKEND = avarice
+#DEBUG_BACKEND = simulavr
+
+# GDB Init Filename.
+GDBINIT_FILE = __avr_gdbinit
+
+# When using avarice settings for the JTAG
+JTAG_DEV = /dev/com1
+
+# Debugging port used to communicate between GDB / avarice / simulavr.
+DEBUG_PORT = 4242
+
+# Debugging host used to communicate between GDB / avarice / simulavr, normally
+#     just set to localhost unless doing some sort of crazy debugging when 
+#     avarice is running on a different computer.
+DEBUG_HOST = localhost
+
+
+
+#============================================================================
+
+# Define programs and commands.
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+WINSHELL = cmd
+
+
+# De-dupe the list of C source files
+CSRC := $(sort $(SRC))
+
+# Define all object files.
+OBJ := $(patsubst %,$(OBJDIR)/%,$(CSRC:.c=.o) $(ASRC:.S=.o))
+
+# Define all listing files.
+LST := $(patsubst %,$(OBJDIR)/%,$(CSRC:.c=.lst) $(ASRC:.S=.lst))
+
+
+# Compiler flags to generate dependency files.
+GENDEPFLAGS = -MMD -MP -MF .dep/$(@F).d
+
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS) $(CDEFS)
+
+
+
+
+
+# Default target.
+all: build
+
+build: elf bin hex
+	$(E) "  SIZE   $(TARGET).elf"
+	$(Q)$(ELFSIZE)|grep -v debug
+
+elf: $(TARGET).elf
+bin: $(TARGET).bin
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss 
+sym: $(TARGET).sym
+
+# A little helper target for the maintainer =)
+copy2card:
+	mount /mnt
+	cp $(TARGET).bin /mnt
+	umount /mnt
+	sync
+
+
+# Doxygen output:
+doxygen:
+	-rm -rf doxyinput
+	mkdir doxyinput
+	cp *.h *.c doxyinput
+	src2doxy.pl doxyinput/*.h doxyinput/*.c
+	doxygen doxygen.conf
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+AVRMEM = avr-mem.sh $(TARGET).elf $(MCU)
+
+# Program the device.  
+program: $(TARGET).hex $(TARGET).eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH)  $(AVRDUDE_WRITE_EEPROM)
+
+
+# Generate avr-gdb config/init file which does the following:
+#     define the reset signal, load the target file, connect to target, and set 
+#     a breakpoint at main().
+gdb-config: 
+	@$(REMOVE) $(GDBINIT_FILE)
+	@echo define reset >> $(GDBINIT_FILE)
+	@echo SIGNAL SIGHUP >> $(GDBINIT_FILE)
+	@echo end >> $(GDBINIT_FILE)
+	@echo file $(TARGET).elf >> $(GDBINIT_FILE)
+	@echo target remote $(DEBUG_HOST):$(DEBUG_PORT)  >> $(GDBINIT_FILE)
+ifeq ($(DEBUG_BACKEND),simulavr)
+	@echo load  >> $(GDBINIT_FILE)
+endif	
+	@echo break main >> $(GDBINIT_FILE)
+
+debug: gdb-config $(TARGET).elf
+ifeq ($(DEBUG_BACKEND), avarice)
+	@echo Starting AVaRICE - Press enter when "waiting to connect" message displays.
+	@$(WINSHELL) /c start avarice --jtag $(JTAG_DEV) --erase --program --file \
+	$(TARGET).elf $(DEBUG_HOST):$(DEBUG_PORT)
+	@$(WINSHELL) /c pause
+
+else
+	@$(WINSHELL) /c start simulavr --gdbserver --device $(MCU) --clock-freq \
+	$(DEBUG_MFREQ) --port $(DEBUG_PORT)
+endif
+	@$(WINSHELL) /c start avr-$(DEBUG_UI) --command=$(GDBINIT_FILE)
+
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000 
+
+
+coff: $(TARGET).elf
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+# Generate autoconf.h from config
+.PRECIOUS : $(OBJDIR)/autoconf.h
+$(OBJDIR)/autoconf.h: $(CONFIG) | $(OBJDIR)
+	$(E) "  CONF2H $(CONFIG)"
+	$(Q)gawk -f ../conf2h.awk $(CONFIG) > $(OBJDIR)/autoconf.h
+
+# Create final output files (.hex, .eep) from ELF output file.
+ifeq ($(CONFIG_BOOTLOADER),y)
+$(OBJDIR)/%.bin: $(OBJDIR)/%.elf
+	$(E) "  BIN    $@"
+	$(Q)$(OBJCOPY) -O binary -R .eeprom $< $@
+	$(E) "  CRCGEN $@"
+	-$(Q)crcgen-new $@ $(BINARY_LENGTH) $(CONFIG_BOOT_DEVID) $(BOOT_VERSION)
+	$(E) "  COPY   $(CONFIG_HARDWARE_NAME)-bootloader-$(PROGRAMVERSION).bin"
+	$(Q)$(COPY) $@ $(OBJDIR)/$(CONFIG_HARDWARE_NAME)-bootloader-$(PROGRAMVERSION).bin
+else
+$(OBJDIR)/%.bin: $(OBJDIR)/%.elf
+	$(E) "  BIN    $@"
+	$(Q)$(OBJCOPY) -O binary -R .eeprom $< $@
+endif
+
+
+$(OBJDIR)/%.hex: $(OBJDIR)/%.elf
+	$(E) "  HEX    $@"
+	$(Q)$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+$(OBJDIR)/%.eep: $(OBJDIR)/%.elf
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+$(OBJDIR)/%.lss: $(OBJDIR)/%.elf
+	$(E) "  LSS    $<"
+	$(Q)$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+$(OBJDIR)/%.sym: $(OBJDIR)/%.elf
+	$(E) "  SYM    $<"
+	$(E)$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+$(OBJDIR)/%.elf: $(OBJ)
+	$(E) "  LINK   $@"
+	$(Q)$(CC) $(ALL_CFLAGS) $^ --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+$(OBJDIR)/%.o : %.c | $(OBJDIR) $(OBJDIR)/autoconf.h
+	$(E) "  CC     $<"
+	$(Q)$(CC) -c $(ALL_CFLAGS) $< -o $@ 
+
+
+# Compile: create assembler files from C source files.
+$(OBJDIR)/%.s : %.c | $(OBJDIR) $(OBJDIR)/autoconf.h
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+$(OBJDIR)/%.o : %.S | $(OBJDIR) $(OBJDIR)/autoconf.h
+	$(E) "  AS     $<"
+	$(Q)$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+# Create preprocessed source for use in sending a bug report.
+$(OBJDIR)/%.i : %.c | $(OBJDIR) $(OBJDIR)/autoconf.h
+	$(CC) -E -mmcu=$(MCU) -I. $(CFLAGS) $< -o $@ 
+
+# Create the output directory
+$(OBJDIR):
+	$(E) "  MKDIR  $(OBJDIR)"
+	$(Q)mkdir $(OBJDIR)
+
+# Target: clean project.
+clean: begin clean_list end
+
+clean_list :
+	$(E) "  CLEAN"
+	$(Q)$(REMOVE) $(TARGET).hex
+	$(Q)$(REMOVE) $(TARGET).bin
+	$(Q)$(REMOVE) $(TARGET).eep
+	$(Q)$(REMOVE) $(TARGET).cof
+	$(Q)$(REMOVE) $(TARGET).elf
+	$(Q)$(REMOVE) $(TARGET).map
+	$(Q)$(REMOVE) $(TARGET).sym
+	$(Q)$(REMOVE) $(TARGET).lss
+	$(Q)$(REMOVE) $(OBJ)
+	$(Q)$(REMOVE) $(OBJDIR)/autoconf.h
+	$(Q)$(REMOVE) $(OBJDIR)/*.bin
+	$(Q)$(REMOVE) $(LST)
+	$(Q)$(REMOVE) $(CSRC:.c=.s)
+	$(Q)$(REMOVE) $(CSRC:.c=.d)
+	$(Q)$(REMOVE) .dep/*
+	$(Q)$(REMOVE) -rf codedoc
+	$(Q)$(REMOVE) -rf doxyinput
+	-$(Q)rmdir $(OBJDIR)
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program debug gdb-config doxygen
+
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/README b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/README
new file mode 100644
index 00000000..d90c5c6a
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/README
@@ -0,0 +1,191 @@
+The code in this directory is meant to run on a second AVR chip,
+connected to the one running sd2iec over I2C plus one additional line
+called IntRequest. 
+
+It is only meant as an example, a display compatible to the 27x4 it is
+currently set up for is probably hard to find. To adapt the code for a
+different display, change config.h as noted in its comments and adjust
+the layout in main.c (status line length, positions of the
+address/partition fields, if changing the number of lines also edit
+set_part(), every call to set_line and set_line_part, "case
+DISPLAY_ADDRESS:" branch in parse_display).
+
+The two-chip design was chosen to minimize the resource requirements
+on the drive side. Although a simple status-only display could be
+implemented just on the drive AVR, the ram requirements for a
+directory selection menu can be rather high if there are many entries
+with a high average length. On an ATmega324 or other 2K ram chips it
+should be possible to display 100 entries with an average length of
+12, on an ATmega644 the average length is increased to more than 30
+for the same number of entries.
+
+The drive side has no knowledge of the presentation method and/or
+layout used by the display side, it just sends status information and
+menu entries to the display which is free to use or discard any of
+the status informations as required. Menus are only shown after the
+user interacts with the display in which case the display AVR uses the
+IntRequest line to signal the drive side. The drive side does not
+remember which data it sent for the menu entries, so it may expect to
+read them back exactly as sent for further processing.
+
+
+Random Protocol Details
+=======================
+The display uses I2C address 0x64 (already shifted, so writing uses
+0x65) to communicate. The first byte written is the command number,
+everything after that are command-specific parameters. Whenever a
+command requires a string parameter, the string is sent in PETSCII
+encoding. Strings are NOT zero-terminated unless noted. Partition
+numbers are 0-based, to get the user-visible number just add 1.
+
+Menus
+-----
+The model for menus used in the communication between drive and
+display is an ordered list of strings, one for each menu entry. Menu
+entries must be stored on the display side, although entries may be
+dropped if the local memory is exhausted. The buffered menu entries
+are cleared by the DISPLAY_MENU_RESET command, entries are added one
+by one using the DISPLAY_MENU_ADD command. The order of menu entries
+should be preserved both for reasonable presentation to the user and
+for returning the correct entry number to the drive. Menu entries are
+sent as PETSCII, the only character in PETSCII that is not in ASCII
+that should really be supported is the left arrow (code 0x5f) because
+it is used in directory listings as a shorthand for the parent
+directory.
+
+Commands
+--------
+The format of the command description:
+<enum name>: <numerical value sent>
+Parameter(s): <parameters included>
+
+<description>
+Parameter types are given as "string" (PETSCII character string,
+NOT zero-terminated unless noted otherwise) or "byte" (single byte
+value, unsigned).
+
+
+DISPLAY_INIT: 0
+Parameter: string version
+
+This command is issued during startup and should clear the display,
+display the version string (if desired) and leave any menu that may
+still be active. It is recommended to lower-case the version string
+before displaying it.
+
+
+DISPLAY_ADDRESS: 1
+Parameter: byte address
+
+This command is issued during startup and whenever the IEC address the
+device is listening on changes.
+
+
+DISPLAY_FILENAME_READ: 2
+Parameters: byte partition, string filename
+
+This command is issued when a file is opened for reading. The
+partition byte is the partition the file is on, the file name is the
+actual file name that is opened with wildcards already resolved. The
+file name is always zero-terminated; additional data may be sent after
+the terminating zero-byte, but should be ignored.
+
+
+DISPLAY_FILENAME_WRITE: 3
+Parameters: byte partition, string filename
+
+This command works exactly as DISPLAY_FILENAME_READ, but is issued
+when a file is opened for writing or appending or if the file is a REL
+file.
+
+
+DISPLAY_DOSCOMMAND: 4
+Parameter: string command
+
+This command is issued when the drive receives a command on the
+command channel and transmits the command as-is. Please note that some
+dos commands may contain binary data (e.g. M-W and P), so please
+filter the data as required to make sure your output device isn't
+confused by random data sent to it. The command string is NOT
+zero-terminated.
+
+
+DISPLAY_ERRORCHANNEL: 5
+Parameter: string message
+
+This command is issued whenever the error channel conents change,
+which may be multiple times during the execution of a single drive
+operation. The message is sent without the final 0x0d character, but
+otherwise exactly as it is stored in the message buffer on the drive
+side.
+
+
+DISPLAY_CURRENT_DIR: 6
+Parameters: byte partition, string name
+
+This command is issued when the current directory on a partition
+changes and transmits the affected partition number as well as the
+name of the new directory. The name is the same as the string in the
+header line of a directory listing. 
+
+
+DISPLAY_CURRENT_PART: 7
+Parameter: byte partition
+
+This command is issued when the current partition is changed using the
+dos command "CP".
+
+
+DISPLAY_MENU_RESET: 64
+Parameter: nothing
+
+This command resets the menu. The display should return to the status
+screen (the data for that must be saved internally) and clear out the
+menu entry buffer.
+
+
+DISPLAY_MENU_ADD: 65
+Parameter: string entry
+
+This command adds a new menu entry to the buffer. The entry string is
+always zero-terminated. If the menu buffer is full (too many lines or
+not enough memory to store another string) it may be ignored. Adding
+menu entres while a menu is currently displayed is not required.
+
+
+DISPLAY_MENU_SHOW: 66
+Parameter: byte position
+
+This command switches from the status display to the menu display
+using the menu entries in the buffer. The position parameter specifies
+which entry should be selected initially and is 0-based. It is used
+for the device address menu to select the current address as default.
+
+
+DISPLAY_MENU_GETSELECTION: 67
+Parameter: nothing
+
+This command is issued to read the entry number (0-based) of the
+currently selected entry. The number is returned as a single byte value
+on the next read on address 0x64.
+
+
+DISPLAY_MENU_GETENTRY: 68
+Parameter: nothing
+
+This command is issued to read the entry string of the currently
+selected entry. The string is returned without zero-termination in
+PETSCII encoding on the next read on address 0x64. The data in the
+menu buffer may be modified to do this as the menu will be reset soon
+after this command.
+
+
+Interrupt Request Line
+----------------------
+The interrupt request line is used by the display to signal the drive
+that it has received user interaction that needs the attention of the
+drive. It should be pulled low until an I2C read to the display's
+address has been issued. The current display implementation issues an
+interrupt request whenever the user pushes the button connected to the
+display controller, the drive will either set up a menu or read a menu
+selection in response.
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/config-example b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/config-example
new file mode 100644
index 00000000..6c8a2f07
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/config-example
@@ -0,0 +1,54 @@
+# This may not look like it, but it's a -*- makefile -*-
+#
+# sd2iec - SD/MMC to Commodore serial bus interface/controller
+# Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+#
+#  Inspired by MMC2IEC by Lars Pontoppidan et al.
+#
+#  FAT filesystem access based on code from ChaN, see tff.c|h.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License only.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+#  config: User-configurable options to simplify hardware changes and/or
+#          reduce the code/ram requirements of the code.
+#
+# This is the config-example file for the display.
+#
+#
+# This file is included in the main Makefile and also parsed
+# into autoconf.h.
+
+# MCU to compile for
+CONFIG_MCU=atmega644
+
+# Use the -relax parameter when linking?
+# Passing -O9 and -relax to the linker saves a bit of flash,
+# but the option is broken in certain binutils versions.
+# (known troublemakers: binutils 2.17, 2.18 seems fine)
+CONFIG_LINKER_RELAX=n
+
+# MCU frequency in Hz
+CONFIG_MCU_FREQ=8000000
+
+# Display buffer size
+# This buffer is used during reception of I2C messages,
+# data that doesn't fit will be silently dropped.
+CONFIG_I2C_BUFFER_SIZE=40
+
+# Maximum number of menu entries
+# This is the maximum number of menu entries that can
+# be used. Further entries are silently dropped,
+# the actual number of menu entries may be lower than this
+# limit if there isn't enough free ram to store the text.
+CONFIG_MAX_MENU_ENTRIES=100
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/config.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/config.h
new file mode 100644
index 00000000..0bae1586
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/config.h
@@ -0,0 +1,90 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   config.h: User-configurable options to simplify hardware changes and/or
+             reduce the code/ram requirements of the code.
+
+   This is the display-side config.h.
+*/
+
+#ifndef CONFIG_H
+#define CONFIG_H
+
+#include "autoconf.h"
+
+/* LCD pin assignments. The code assumes that the data lines are */
+/* continuous and in ascending order and the control lines are   */
+/* connected to the same port as the data lines.                 */
+#define LCD_PORT         PORTA
+#define LCD_PIN          PINA
+#define LCD_DDR          DDRA
+
+#define LCD_RS           _BV(PA0)
+#define LCD_RW           _BV(PA1)
+#define LCD_E1           _BV(PA2)
+
+/* Number of bits to left-shift data nibbles,         */
+/* e.g. 4 if the data lines are connected to PA4-PA7. */
+#define LCD_DATA_SHIFT   4
+
+/* E2 is used for dual-controller displays that split the displayed */
+/* lines between two LCD controllers. Define to 0 for a single-     */
+/* controller display.                                              */
+#define LCD_E2           _BV(PA3)
+
+/* Number of lines and columns of the display.              */
+/* Set LCD_ROWS_BOTTOM to 0 for single-controller displays. */
+#define LCD_COLUMNS     27
+#define LCD_ROWS_TOP    2
+#define LCD_ROWS_BOTTOM 2
+
+/* Start address of the display lines in the controller ram. For dual- */
+/* controller displays it is assumed that both use the same addresses. */
+#define LCD_ROWADDR {0x00, 0x40}
+
+/* Example for a single-controller 4 row display: */
+//#define LCD_ROWADDR {0x00, 0x40, 0x14, 0x54}
+
+/* Encoder port assignments */
+#define ENCODER_PIN         PINC
+#define ENCODER_PORT        PORTC
+#define ENCODER_DDR         DDRC
+#define ENCODER_PCMSK       PCMSK2
+#define ENCODER_INT_VECT    PCINT2_vect
+#define ENCODER_INT_SETUP() do { PCICR |= _BV(PCIE2); PCIFR |= _BV(PCIF2); } while (0)
+
+/* Encoder pins - A is the line that toggles between "clicks", */
+/*                B is the one that toggles at "clicks".       */
+/* If in doubt: Try it, if the menu arrow "flickers" swap the lines */
+#define ENCODER_A      _BV(PC2)
+#define ENCODER_B      _BV(PC3)
+#define ENCODER_BUTTON _BV(PC4)
+
+/* Interrupt request line from the display to sd2iec */
+#define INTRQ_PORT    PORTD
+#define INTRQ_BIT     _BV(PD6)
+#define INTRQ_SETUP() do { PORTD |= _BV(PD6); DDRD |= _BV(PD6); } while (0)
+
+/* Scroll-timing */
+#define TICKS_BEFORE_SCROLLING (1*HZ)
+#define TICKS_PER_CHARACTER (HZ/5)
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/encoder.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/encoder.c
new file mode 100644
index 00000000..d701ed65
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/encoder.c
@@ -0,0 +1,92 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   encoder.c: Encoder and button polling
+
+*/
+
+#include "config.h"
+#include <avr/io.h>
+#include <util/delay.h>
+#include "timer.h"
+#include "encoder.h"
+
+volatile int8_t  encoder_position;
+volatile uint8_t button_state;
+volatile tick_t  last_button_change;
+
+static uint8_t laststate;
+static tick_t  debounce_timer;
+
+/* Encoder gets its own on-change ISR, polling would require ~1000Hz */
+ISR(ENCODER_INT_VECT) {
+  uint8_t curstate;
+
+  curstate = ENCODER_PIN & (ENCODER_A | ENCODER_B);
+
+  // Encoder
+  if ((laststate & ENCODER_A) ^ (curstate & ENCODER_A)) {
+    if (!!(curstate & ENCODER_A) == !!(curstate & ENCODER_B)) {
+      encoder_position--;
+    } else {
+      encoder_position++;
+    }
+    laststate = curstate;
+  }
+}
+
+/* Polling is easier for debouncing a button and works fine at 100Hz */
+void encoder_buttonisr(void) {
+  uint8_t curstate;
+
+  // Button
+  curstate = !(ENCODER_PIN & ENCODER_BUTTON);
+  if (curstate != button_state) {
+    if (last_button_change != debounce_timer) {
+      if (time_after(ticks,debounce_timer + HZ/20)) {
+	last_button_change = ticks;
+	debounce_timer = ticks;
+	button_state = curstate;
+      }
+    } else {
+      debounce_timer = ticks;
+    }
+  } else {
+    // bounced - reset timer
+    debounce_timer = last_button_change;
+  }
+}
+
+void encoder_init(void) {
+  ENCODER_DDR  &= (uint8_t)~(ENCODER_A | ENCODER_B | ENCODER_BUTTON);
+  ENCODER_PORT |= ENCODER_A | ENCODER_B | ENCODER_BUTTON;
+  _delay_ms(5); // long wires...
+  laststate = ENCODER_PIN & (ENCODER_A | ENCODER_B);
+
+  encoder_position = 0;
+  button_state = !(ENCODER_PIN & ENCODER_BUTTON);
+  last_button_change = 0;
+  debounce_timer = 0;
+
+  ENCODER_PCMSK |= ENCODER_A; /* No B! */
+  ENCODER_INT_SETUP();
+}
+
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/encoder.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/encoder.h
new file mode 100644
index 00000000..c5327efe
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/encoder.h
@@ -0,0 +1,38 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   encoder.h: Encoder and button polling
+
+*/
+
+#ifndef ENCODER_H
+#define ENCODER_H
+
+#include "timer.h"
+
+void encoder_init(void);
+void encoder_buttonisr(void);
+
+extern volatile int8_t  encoder_position;
+extern volatile uint8_t button_state;
+extern volatile tick_t  last_button_change;
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/lcd.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/lcd.c
new file mode 100644
index 00000000..5c51424d
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/lcd.c
@@ -0,0 +1,258 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   lcd.c: HD44780-compatible display access
+
+*/
+
+#include "config.h"
+#include <avr/io.h>
+#include <avr/pgmspace.h>
+#include <util/delay.h>
+#include <stdio.h>
+#include "lcd.h"
+
+#define LCD_UPPER 1
+#define LCD_LOWER 2
+#define LCD_BOTH  3
+
+#define DISPLAY_ON   0x0c
+
+#define SET_DD_ADDRESS 0x80
+
+uint8_t cursor_x;
+uint8_t cursor_y;
+uint8_t cursor_mode;
+
+#ifdef USE_LCD_STDOUT
+static FILE lcd_stdout = FDEV_SETUP_STREAM(lcd_putc, NULL, _FDEV_SETUP_WRITE);
+#endif
+
+static const PROGMEM uint8_t lcd_rowaddr[] = LCD_ROWADDR;
+static uint8_t cursor_controller;
+
+static void inline lcd1_strobe(void) {
+  LCD_PORT |=  LCD_E1;
+  _delay_us(1);
+  LCD_PORT &= (uint8_t)~LCD_E1;
+}
+
+static void inline lcd2_strobe(void) {
+  LCD_PORT |=  LCD_E2;
+  _delay_us(1);
+  LCD_PORT &= (uint8_t)~LCD_E2;
+}
+
+static void lcd_strobe(uint8_t controller) {
+  if (controller & LCD_UPPER)
+    lcd1_strobe();
+  if ((LCD_ROWS_BOTTOM > 0) && (controller & LCD_LOWER))
+    lcd2_strobe();
+}
+
+
+static void lcd_wait(uint8_t controller) {
+  uint8_t tmp;
+
+  LCD_DDR = LCD_RS | LCD_RW | LCD_E1 | LCD_E2;
+  
+  LCD_PORT |=  LCD_RW;
+  LCD_PORT &= (uint8_t)~LCD_RS;
+
+  if (controller & LCD_UPPER) {
+    do {
+      LCD_PORT |= LCD_E1;
+      _delay_us(5);
+      tmp = (LCD_PIN >> LCD_DATA_SHIFT) & 0x08;
+      LCD_PORT &= (uint8_t)~LCD_E1;
+      _delay_us(5);
+      LCD_PORT |= LCD_E1;
+      _delay_us(5);
+      LCD_PORT &= (uint8_t)~LCD_E1;
+    } while (tmp);
+  }
+  if ((LCD_ROWS_BOTTOM > 0) && (controller & LCD_LOWER)) {
+    do {
+      LCD_PORT |= LCD_E2;
+      _delay_us(5);
+      tmp = (LCD_PIN >> LCD_DATA_SHIFT) & 0x08;
+      LCD_PORT &= (uint8_t)~LCD_E2;
+      _delay_us(5);
+      LCD_PORT |= LCD_E2;
+      _delay_us(5);
+      LCD_PORT &= (uint8_t)~LCD_E2;
+    } while (tmp);
+  }
+  LCD_PORT = 0;
+  LCD_DDR  = 0xff;
+}
+
+static void lcd_write(uint8_t controller, uint8_t rs, uint8_t value) {
+  uint8_t tmp;
+
+  if (rs)
+    tmp = LCD_RS;
+  else
+    tmp = 0;
+
+  lcd_wait(controller);
+
+  LCD_PORT = tmp | (uint8_t)((value >> 4) << LCD_DATA_SHIFT);
+  lcd_strobe(controller);
+  LCD_PORT = tmp | (uint8_t)((value & 0x0f) << LCD_DATA_SHIFT);
+  lcd_strobe(controller);
+}
+
+void lcd_init(void) {
+  LCD_PORT = 0;
+  LCD_DDR  = 0xff;
+  _delay_ms(15);
+
+  LCD_PORT = 0x03 << LCD_DATA_SHIFT;
+  lcd_strobe(LCD_BOTH);
+  _delay_ms(5);
+  lcd_strobe(LCD_BOTH);
+  _delay_ms(0.100);
+  lcd_strobe(LCD_BOTH);
+  lcd_wait(LCD_BOTH);
+
+  LCD_PORT = 0x02 << LCD_DATA_SHIFT;
+  lcd_strobe(LCD_BOTH);
+  lcd_wait(LCD_BOTH);
+
+  lcd_write(LCD_BOTH,0,0x28); // System Set: 4 Bit, 2 Zeilen, 5x7
+  // FIXME: Einmal sollte eigentlich reichen?
+  lcd_write(LCD_BOTH,0,0x28); // System Set: 4 Bit, 2 Zeilen, 5x7
+  lcd_write(LCD_BOTH,0,0x08); // Display aus
+  lcd_write(LCD_BOTH,0,0x0c); // Display an, kein Cursor
+  lcd_write(LCD_BOTH,0,0x06); // Cursor beim Schreiben vorwaerts
+  lcd_write(LCD_BOTH,0,0x01); // Anzeige loeschen
+
+  cursor_x = 0;
+  cursor_y = 0;
+  cursor_mode = LCD_CURSOR_NONE;
+  cursor_controller = LCD_UPPER;
+
+#ifdef USE_LCD_STDOUT
+  stdout = &lcd_stdout;
+#endif
+}
+
+// Anzeige des Cursors auf richtigem Display aktivieren
+void static updatecursor(void) {
+  if (LCD_ROWS_BOTTOM == 0 || cursor_y < LCD_ROWS_TOP) {
+    lcd_write(LCD_UPPER,0,DISPLAY_ON | cursor_mode);
+    lcd_write(LCD_LOWER,0,DISPLAY_ON);
+  } else {
+    lcd_write(LCD_UPPER,0,DISPLAY_ON);
+    lcd_write(LCD_LOWER,0,DISPLAY_ON | cursor_mode);
+  }
+}
+
+void lcd_clrscr(void) {
+  lcd_write(LCD_BOTH,0,0x01);
+  cursor_x = 0;
+  cursor_y = 0;
+  cursor_controller = LCD_UPPER;
+  updatecursor();
+}
+
+void lcd_setcursormode(uint8_t mode) {
+  cursor_mode = mode;
+  lcd_gotoxy(cursor_x,cursor_y);
+}
+
+void lcd_gotoxy(uint8_t x, uint8_t y) {
+  cursor_x = x;
+  cursor_y = y;
+  if (LCD_ROWS_BOTTOM == 0 || y < LCD_ROWS_TOP) {
+    lcd_write(LCD_UPPER,0,SET_DD_ADDRESS + x +
+              pgm_read_byte(lcd_rowaddr + y));
+    cursor_controller = LCD_UPPER;
+  } else {
+    lcd_write(LCD_LOWER,0,SET_DD_ADDRESS + x +
+              pgm_read_byte(lcd_rowaddr + y - LCD_ROWS_TOP));
+    cursor_controller = LCD_LOWER;
+  }
+}
+
+void lcd_putch(char c) {
+  lcd_write(cursor_controller,1,c);
+  if (++cursor_x > LCD_COLUMNS-1)
+    lcd_gotoxy(0,(cursor_y+1) % LCD_ROWS);
+}
+
+#ifdef USE_LCD_STDOUT
+int lcd_putc(char c, FILE *stream) {
+  if (c == '\n') {
+    lcd_gotoxy(0,(cursor_y+1) % LCD_ROWS);
+  } else {
+    lcd_putch(c);
+  }
+  return 0;
+}
+#endif
+
+void lcd_puts_P(prog_char *text) {
+  uint8_t ch;
+
+  while ((ch = pgm_read_byte(text++))) {
+    if (ch == '\n') {
+      lcd_gotoxy(0,(cursor_y+1) % LCD_ROWS);
+    } else {
+      lcd_putch(ch);
+    }
+  }
+  updatecursor();
+}
+
+void lcd_putxy_P(uint8_t xpos, uint8_t ypos, prog_char *text) {
+  if (xpos > (LCD_COLUMNS-1) || ypos > (LCD_ROWS-1)) return;
+
+  lcd_gotoxy(xpos,ypos);
+  lcd_puts_P(text);
+}
+
+void lcd_puts(char *text) {
+  while (*text) {
+    lcd_putch(*text++);
+  }
+  updatecursor();
+}
+
+void lcd_putxy(uint8_t xpos, uint8_t ypos, char *text) {
+  if (xpos > (LCD_COLUMNS-1) || ypos > (LCD_ROWS-1)) return;
+
+  lcd_gotoxy(xpos,ypos);
+  lcd_puts(text);
+}
+
+void lcd_customchar(uint8_t num, uint8_t b0, uint8_t b1,
+		    uint8_t b2,  uint8_t b3, uint8_t b4,
+		    uint8_t b5,  uint8_t b6, uint8_t b7) {
+  if (num > 7) return;
+  lcd_write(LCD_BOTH,0,0x40+8*num);
+  lcd_write(LCD_BOTH,1,b0);
+  lcd_write(LCD_BOTH,1,b1);
+  lcd_write(LCD_BOTH,1,b2);
+  lcd_write(LCD_BOTH,1,b3);
+  lcd_write(LCD_BOTH,1,b4);
+  lcd_write(LCD_BOTH,1,b5);
+  lcd_write(LCD_BOTH,1,b6);
+  lcd_write(LCD_BOTH,1,b7);
+  lcd_gotoxy(cursor_x,cursor_y);
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/lcd.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/lcd.h
new file mode 100644
index 00000000..9f761059
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/lcd.h
@@ -0,0 +1,55 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   lcd.h: HD44780-compatible display access
+
+*/
+
+#ifndef LCD_H
+#define LCD_H
+
+#include <avr/pgmspace.h>
+
+#define LCD_CURSOR_NONE  0x00
+#define LCD_CURSOR_LINE  0x02
+#define LCD_CURSOR_BLOCK 0x01
+
+#define LCD_ROWS    (LCD_ROWS_TOP+LCD_ROWS_BOTTOM)
+
+void lcd_init(void);
+void lcd_clrscr(void);
+void lcd_putxy_P(uint8_t xpos, uint8_t ypos, prog_char *text);
+void lcd_putxy(uint8_t xpos, uint8_t ypos, char *text);
+void lcd_puts_P(prog_char *text);
+void lcd_puts(char *text);
+void lcd_setcursormode(uint8_t mode);
+void lcd_gotoxy(uint8_t x, uint8_t y);
+void lcd_putch(char c);
+void lcd_customchar(uint8_t num, uint8_t b0, uint8_t b1,
+		    uint8_t b2,  uint8_t b3, uint8_t b4,
+		    uint8_t b5,  uint8_t b6, uint8_t b7);
+
+#ifdef USE_LCD_STDOUT
+# include <stdio.h>
+int lcd_putc(char c, FILE *stream);
+#endif
+
+extern uint8_t cursor_x;
+extern uint8_t cursor_y;
+extern uint8_t cursor_mode;
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/main.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/main.c
new file mode 100644
index 00000000..f0973bc6
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/main.c
@@ -0,0 +1,534 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   main.c: Main display code
+
+*/
+
+#include "config.h"
+#include <avr/io.h>
+#include <avr/interrupt.h>
+#include <avr/pgmspace.h>
+#include <avr/sleep.h>
+#include <avr/power.h>
+#include <util/atomic.h>
+#include <util/delay.h>
+#include <ctype.h>
+#include <stdio.h>
+#include <string.h>
+#include "avrcompat.h"
+#include "display.h"
+#include "encoder.h"
+#include "lcd.h"
+#include "menu.h"
+#include "timer.h"
+#include "utils.h"
+
+/* ------------------------------------------------------------------------- */
+/*  Global variables                                                         */
+/* ------------------------------------------------------------------------- */
+
+/* Status line */
+static const PROGMEM char status_line_str[] = "P___                    A__";
+#define STATUS_ADDR 25
+#define STATUS_PART 1
+
+/* Buffers for the LCD rows */
+typedef struct {
+  char    contents[CONFIG_I2C_BUFFER_SIZE+1];
+  int8_t  scrollofs;
+  tick_t  scrolltick;
+  int     updated:1;
+  int     scrolling:1;
+} linebuffer_t;
+
+static linebuffer_t lcdline[LCD_ROWS];
+
+static volatile uint8_t updatedisplay;
+
+/* Menu state */
+static enum { MST_INACTIVE = 0, MST_RESET, MST_INIT, MST_ACTIVE } menustate;
+static int8_t menuentry;
+
+/* I2C rx buffer and tx pointers */
+static uint8_t rxbuffer[CONFIG_I2C_BUFFER_SIZE];
+static uint8_t *rxbufptr = rxbuffer;
+static uint8_t *txdata;
+static uint8_t txlen;
+
+/* ------------------------------------------------------------------------- */
+/*  Utility functions                                                        */
+/* ------------------------------------------------------------------------- */
+
+/* Set INTRQ-pin to low (state == 0) or high (state != 0) */
+static inline void set_intrq(uint8_t state) {
+  if (state)
+    INTRQ_PORT |= INTRQ_BIT;
+  else
+    INTRQ_PORT &= (uint8_t)~INTRQ_BIT;
+}
+
+/**
+ * pet2asc - convert string from PETSCII to ASCII
+ * @buf: pointer to the string to be converted
+ *
+ * This function converts the string in the given buffer from PETSCII to
+ * ASCII in-place. Modified for LCD use, substitutes _ with 0x01 to
+ * use the custom "left arrow" character.
+ */
+static void pet2asc(uint8_t *buf) {
+  uint8_t ch;
+  while (*buf) {
+    ch = *buf;
+    if (ch == 95) // left arrow, use custom LCD char
+      ch = 0x01;
+    if (ch > (128+64) && ch < (128+91))
+      ch -= 128;
+    else if (ch > (96-32) && ch < (123-32))
+      ch += 32;
+    else if (ch > (192-128) && ch < (219-128))
+      ch += 128;
+    else if (ch == 255)
+      ch = '~';
+    *buf = ch;
+    buf++;
+  }
+}
+
+/**
+ * asc2pet - convert string from ASCII to PETSCII
+ * @buf: pointer to the string to be converted
+ *
+ * This function converts the string in the given buffer from ASCII to
+ * PETSCII in-place. Modified for LCD use, substitutes the custom
+ * "left arrow" character 0x01 with _.
+ */
+static void asc2pet(uint8_t *buf) {
+  uint8_t ch;
+  while (*buf) {
+    ch = *buf;
+    if (ch == 1) // left arrow
+      ch = '_';
+    if (ch > 64 && ch < 91)
+      ch += 128;
+    else if (ch > 96 && ch < 123)
+      ch -= 32;
+    else if (ch > 192 && ch < 219)
+      ch -= 128;
+    else if (ch == '~')
+      ch = 255;
+    *buf = ch;
+    buf++;
+  }
+}
+
+/**
+ * set_line - format text data for display line
+ * @line   : output in this display line
+ * @len    : length of string
+ * @string : string to be displayed
+ * @convert: do PETSCII conversion
+ *
+ * This function will copy up to len bytes from string to
+ * the lcd-line buffer for line, marking it as updated.
+ * If convert is non-zero, PETSCII to ASCII conversion will
+ * be applied to string first. Copying stops at the first
+ * ASCII character > 126.
+ */
+static void set_line(uint8_t line, uint8_t len, uint8_t *string, uint8_t convert) {
+  char *ptr = lcdline[line].contents;
+
+  memset(&lcdline[line],0,sizeof(linebuffer_t));
+  lcdline[line].updated = 1;
+  updatedisplay++;
+
+  if (convert)
+    pet2asc(string);
+
+  while (*string <= 126 && len-- > 0)
+    *ptr++ = *string++;
+}
+
+/**
+ * set_line_part - format partition+text data for display line
+ * @line   : output in this display line
+ * @prefix : prefix character
+ * @len    : length of string
+ * @data   : data to be displayed
+ *
+ * This function will copy data to the lcd-line buffer for line,
+ * marking it as updated. If prefix is non-zero, it will be
+ * the first character in the new line contents. The first
+ * byte of data is displayed as a decimal number followed by
+ * a colon, followed by the remainder of data converted
+ * from PETSCII to ASCII. Copying stops at the first ASCII
+ * character > 126.
+ */
+static void set_line_part(uint8_t line, uint8_t prefix, uint8_t len, uint8_t *data) {
+  char *ptr = lcdline[line].contents;
+
+  memset(&lcdline[line],0,sizeof(linebuffer_t));
+  lcdline[line].updated = 1;
+  updatedisplay++;
+
+  if (prefix)
+    *ptr++ = prefix;
+
+  data[0] += 1;
+  if (data[0] > 100)
+    *ptr++ = '0'+data[0]/100;
+  if (data[0] > 10)
+    *ptr++ = '0'+(data[0]%100)/10;
+  *ptr++ = '0'+(data[0]%10);
+
+  *ptr++ = ':';
+  pet2asc(++data);
+  while (*data <= 126 && --len > 0)
+    *ptr++ = *data++;
+}
+
+/**
+ * set_part - set the partition number in the status line
+ * @part: new partition number
+ *
+ * This function updates the partition number in the fourth
+ * line of the display to show part.
+ */
+static void set_part(uint8_t part) {
+  char *ptr = &lcdline[3].contents[STATUS_PART];
+
+  lcdline[3].contents[STATUS_PART]   = ' ';
+  lcdline[3].contents[STATUS_PART+1] = ' ';
+  lcdline[3].contents[STATUS_PART+2] = ' ';
+  if (part > 100)
+    *ptr++ = '0'+part/100;
+  if (part > 10)
+    *ptr++ = '0'+(part%100)/10;
+  *ptr = '0'+(part%10);
+
+  lcdline[3].updated = 1;
+  updatedisplay++;
+}
+
+/**
+ * parse_display - parse display message
+ * @length: length of message
+ * @data  : message contents
+ *
+ * This function parses a display message received over
+ * I2C and acts upon it.
+ */
+static void parse_display(uint8_t length, uint8_t *data) {
+  uint8_t i;
+
+  switch (data[0]) {
+  case DISPLAY_INIT:
+    lcd_clrscr();
+    menu_resetlines();
+    menuentry = -1;
+    menustate = MST_RESET;
+    for (i=0;i<sizeof(lcdline)/sizeof(linebuffer_t);i++) {
+      memset(&lcdline[i],0,sizeof(linebuffer_t));
+    }
+    for (i=0;i<length-1;i++)
+      data[i+1] = tolower(data[i+1]);
+    set_line(0, length-1, data+1, 0);
+    strcpy_P(lcdline[3].contents, status_line_str);
+    break;
+
+  case DISPLAY_ADDRESS:
+    lcdline[3].contents[STATUS_ADDR]   = '0'+data[1] / 10;
+    lcdline[3].contents[STATUS_ADDR+1] = '0'+data[1] % 10;
+    lcdline[3].updated = 1;
+    updatedisplay++;
+    break;
+
+  case DISPLAY_FILENAME_READ:
+    set_line_part(0, 'L', length-1, data+1);
+    break;
+
+  case DISPLAY_FILENAME_WRITE:
+    set_line_part(0, 'S', length-1, data+1);
+    break;
+
+  case DISPLAY_DOSCOMMAND:
+    set_line(0, length-1, data+1, 1);
+    break;
+
+  case DISPLAY_ERRORCHANNEL:
+    set_line(2, length-1, data+1, 1);
+    break;
+
+  case DISPLAY_CURRENT_DIR:
+    if (length == 2) {
+      /* Special case: root dir */
+      length = 3;
+      data[2] = '/';
+    }
+    set_line_part(1, 0, length-1, data+1);
+    break;
+
+  case DISPLAY_CURRENT_PART:
+    set_part(data[1]+1);
+    break;
+
+  case DISPLAY_MENU_RESET:
+    menu_resetlines();
+    menustate = MST_RESET;
+    break;
+
+  case DISPLAY_MENU_ADD:
+    pet2asc(data+1);
+    menu_addline((char *)data+1);
+    break;
+
+  case DISPLAY_MENU_SHOW:
+    menustate = MST_INIT;
+    if (length > 1)
+      menuentry = data[1];
+    else
+      menuentry = 0;
+    break;
+
+  case DISPLAY_MENU_GETSELECTION:
+    txdata = (uint8_t *)&menuentry;
+    txlen = 1;
+    break;
+
+  case DISPLAY_MENU_GETENTRY:
+    asc2pet((uint8_t *)menulines[menuentry]);
+    txdata = (uint8_t *)menulines[menuentry];
+    txlen = strlen(menulines[menuentry]);
+    break;
+  }
+}
+
+/* I2C interrupt function, calls parse_display */
+ISR(TWI_vect) {
+  //uart_puthex(TWSR & 0b11111000);uart_putcrlf();
+
+  /* gcc produces 16-bit comparisons with masking instead of shifts */
+  switch(TWSR >> 3) {
+
+    /* ----- Slave receiver ----- */
+
+  case (0x60 >> 3): // Own SLA+W received
+    rxbufptr = rxbuffer;
+    TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWINT) | _BV(TWEA); // Return ACK for data byte
+    break;
+
+  case (0x80 >> 3): // Own SLA+W active, data received and ACKed
+    *rxbufptr = TWDR;
+    rxbufptr++;
+    if (rxbufptr == rxbuffer+sizeof(rxbuffer))
+      TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWINT); // Buffer full, stop ACKing
+    else
+      TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWINT) | _BV(TWEA);
+    break;
+
+  case (0x88 >> 3): // Own SLA+W active, data received and NAKed
+  case (0xa0 >> 3): // STOP condition received while we were addressed
+    parse_display(rxbufptr-rxbuffer, rxbuffer);
+
+    rxbufptr = rxbuffer;
+    /* Return ACK for address */
+    TWCR = _BV(TWEN) | _BV(TWIE) |  _BV(TWINT) | _BV(TWEA);
+    break;
+
+    /* ----- Slave transmitter ----- */
+
+  case (0xa8 >> 3): // SLA+R received, ACK returned
+  case (0xb8 >> 3): // Data byte transmitted in slave tx mode, ACK received
+    /* Transmit a byte and expect ACK */
+    set_intrq(1);
+    if (txlen > 0) {
+      TWDR = *txdata++;
+      txlen--;
+    } else
+      TWDR = 0;
+    TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWINT) | _BV(TWEA);
+    break;
+
+  case (0xc0 >> 3): // Data byte transmitted in slave tx mode, NACK received
+  case (0xc8 >> 3): // Data byte transmitted in slave tx mode, ACK received whick NACK expected
+    /* Switch to not-addressed slave mode */
+    /* Return ACK for address */
+    TWCR = _BV(TWEN) | _BV(TWIE) |  _BV(TWINT) | _BV(TWEA);
+    break;
+
+
+    /* ----- General status codes ----- */
+
+  case (0xf8 >> 3): // No relevant state information available
+    break;
+
+  case (0x00 >> 3): // Illegal bus condition
+    TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWSTO) | _BV(TWINT) | _BV(TWEA);
+    break;
+
+  default:
+    //uart_puthex(TWSR & 0b11111000); uart_putcrlf();
+    TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWINT) | _BV(TWEA);
+    break;
+  }
+}
+
+/**
+ * update_display - update display contents based on lcdline array
+ *
+ * This function reads the contents of the lcdline array and
+ * updates and/or scrolls lines as neccessary.
+ */
+static void update_display(void) {
+  static uint8_t scrolling;
+  char    tmpbuf[LCD_COLUMNS+1];
+  char   *ptr;
+  uint8_t i,j,flag;
+  int8_t  scrollofs;
+
+  flag = 0;
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    if (updatedisplay) {
+      flag = 1;
+      updatedisplay--;
+    }
+  }
+  if (!flag && !scrolling)
+    return;
+
+  scrolling = 0;
+  tmpbuf[LCD_COLUMNS] = 0;
+  for (i=0;i<LCD_ROWS;i++) {
+    ptr = tmpbuf;
+    flag = 0;
+    ATOMIC_BLOCK(ATOMIC_FORCEON) {
+      if (lcdline[i].updated ||
+          (lcdline[i].scrolling && time_after(ticks,lcdline[i].scrolltick))) {
+
+        if (!lcdline[i].scrolling) {
+          scrollofs = 0;
+          if (strlen(lcdline[i].contents) > LCD_COLUMNS) {
+            /* Initialize scrolling for this line */
+            lcdline[i].scrolling = 1;
+            lcdline[i].scrollofs = -1;
+            lcdline[i].scrolltick = ticks + 2*TICKS_BEFORE_SCROLLING;
+          }
+        } else {
+          /* Line is scrolling (scrolling gets reset when updated is set) */
+          scrollofs = lcdline[i].scrollofs + 1;
+          if (scrollofs == strlen(lcdline[i].contents)-LCD_COLUMNS) {
+            /* Scrolled to the end: Wait longer */
+            lcdline[i].scrolltick = ticks + 2*TICKS_BEFORE_SCROLLING;
+          } else if (scrollofs > strlen(lcdline[i].contents)-LCD_COLUMNS) {
+            /* Beyond the end: Reset, wait longer */
+            scrollofs = 0;
+            lcdline[i].scrolltick = ticks + 2*TICKS_BEFORE_SCROLLING;
+          } else {
+            lcdline[i].scrolltick = ticks + TICKS_PER_CHARACTER;
+          }
+          lcdline[i].scrollofs = scrollofs;
+        }
+
+        for (j=0;j<LCD_COLUMNS && lcdline[i].contents[j+scrollofs];j++)
+          *ptr++ = lcdline[i].contents[j+scrollofs];
+        for (;j<LCD_COLUMNS;j++)
+          *ptr++ = ' ';
+
+        lcdline[i].updated = 0;
+        flag = 1;
+      }
+    }
+    if (lcdline[i].scrolling)
+        scrolling = 1;
+
+    if (flag) {
+      lcd_gotoxy(0,i);
+      lcd_puts(tmpbuf);
+    }
+  }
+}
+
+
+int main(void) {
+  // Disable JTAG
+#if defined __AVR_ATmega644__ || defined __AVR_ATmega644P__ || defined __AVR_ATmega2561__
+  asm volatile("in  r24, %0\n"
+               "ori r24, 0x80\n"
+               "out %0, r24\n"
+               "out %0, r24\n"
+               :
+               : "I" (_SFR_IO_ADDR(MCUCR))
+               : "r24"
+               );
+#else
+#  error Unknown chip!
+#endif
+
+  /* I2C initialisation, no need to set TWBR because we don't act as master */
+  HWI2C_PORT |= HWI2C_SDA | HWI2C_SCL;
+  TWAR = DISPLAY_I2C_ADDR;
+  TWCR = _BV(TWEA) | _BV(TWEN) | _BV(TWIE);
+
+  INTRQ_SETUP();
+
+  lcd_init();
+  lcd_customchar(1,0,4,8,31,8,4,0,0); // define left arrow
+  menu_init();
+  encoder_init();
+  timer_init();
+
+  strcpy_P((char *)rxbuffer,PSTR("Waiting for data..."));
+  set_line(0,strlen((char *)rxbuffer),rxbuffer,0);
+
+  sei();
+
+  uint8_t prevkey,curkey;
+
+  prevkey = 0;
+  while (1) {
+    if (menustate == MST_INIT) {
+      menuentry = menu_display(1,menuentry);
+      menustate = MST_ACTIVE;
+    } else if (menustate == MST_ACTIVE) {
+      menuentry = menu_display(0,menuentry);
+    } else if (menustate == MST_RESET) {
+      lcd_clrscr();
+      ATOMIC_BLOCK(ATOMIC_FORCEON) {
+        updatedisplay++;
+        for (uint8_t i=0;i<LCD_ROWS;i++)
+          lcdline[i].updated = 1;
+        menustate = MST_INACTIVE;
+      }
+    } else {
+      update_display();
+    }
+
+    curkey = button_state;
+    if (!prevkey && curkey) {
+      if (menustate == MST_ACTIVE) {
+        menustate = MST_RESET;
+      }
+      set_intrq(0);
+    }
+
+    prevkey = curkey;
+  }
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/menu.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/menu.c
new file mode 100644
index 00000000..729be040
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/menu.c
@@ -0,0 +1,187 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+   
+   menu.c: Generic menu code
+
+*/
+
+#include "config.h"
+#include <avr/io.h>
+#include <string.h>
+#include "encoder.h"
+#include "lcd.h"
+#include "timer.h"
+#include "utils.h"
+#include "menu.h"
+
+
+char *menulines[CONFIG_MAX_MENU_ENTRIES];
+static uint8_t entrycount;
+static char *menuheap;
+extern char __heap_start;
+
+static void show_menu(char **entries, uint8_t count, uint8_t start) {
+  uint8_t i,j;
+
+  lcd_gotoxy(0,0);
+  lcd_putch(' ');
+
+  /* Output menu entries */
+  for (i=0;i<min(count-start,LCD_ROWS);i++) {
+    for (j=0;j<LCD_COLUMNS-1 && entries[i+start][j];j++)
+      lcd_putch(entries[i+start][j]);
+    for (;j<LCD_COLUMNS;j++)
+      lcd_putch(' ');
+  }
+
+  /* Clear remaining rows */
+  for (;i<LCD_ROWS;i++)
+    for (j=0;j<LCD_COLUMNS;j++)
+      lcd_putch(' ');
+}
+
+void menu_init(void) {
+  /* Arrow for highlighing an entry */
+  lcd_customchar(3,0x08,0x0c,0x0e,0x0f,0x0e,0x0c,0x08,0x00);
+  menu_resetlines();
+}
+
+void menu_resetlines(void) {
+  menuheap = &__heap_start;
+  entrycount = 0;
+}
+  
+uint8_t menu_addline(char *line) {
+  /* Check remaining heap space */
+  if (((uint16_t)menuheap+strlen(line)+1) > SP-32 || entrycount >= CONFIG_MAX_MENU_ENTRIES) {
+    return 1;
+  }
+
+  strcpy(menuheap,line);
+  menulines[entrycount++] = menuheap;
+  menuheap += strlen(line)+1;
+
+  return 0;
+}
+
+
+uint8_t menu_display(uint8_t init, uint8_t startentry) {
+  static int8_t  prevoffset,curoffset,preventry,scrollofs;
+  static int8_t  curencoder,prevencoder,curentry;
+  static uint8_t entrylen;
+  static tick_t  scrolltime;
+
+  if (init) {
+    lcd_setcursormode(LCD_CURSOR_NONE);
+    lcd_clrscr();
+
+    prevencoder = encoder_position;
+    prevoffset  = -1;
+    preventry   = curentry;
+    scrollofs   = -1;
+    scrolltime  = 0;
+    entrylen    = strlen(menulines[curentry]);
+    if (startentry < entrycount)
+      curentry = startentry;
+    else
+      curentry = 0;
+
+    curoffset = curentry-LCD_ROWS/2+1;
+    if (curoffset+LCD_ROWS-1 >= entrycount) curoffset = entrycount-LCD_ROWS;
+    if (curoffset < 0) curoffset = 0;
+  }
+
+  curencoder = encoder_position;
+
+  /* Encoder position changed */
+  if (curencoder != prevencoder) {
+    curentry += (curencoder-prevencoder);
+    if (curentry >= entrycount) curentry = 0;
+    if (curentry < 0) curentry = entrycount-1;
+  }
+
+  /* Move offset until the marker is back into visible area */
+  while (curentry-curoffset < 1 && curoffset > 0) curoffset--;
+  while (curentry-curoffset >= LCD_ROWS-1 && curentry < entrycount-1) curoffset++;
+  if (curentry-curoffset >= LCD_ROWS) {
+    /* Special case for wrapping to the last entry */
+    curoffset = curentry-LCD_ROWS+1;
+  }
+
+  /* Redraw when offset changed */
+  if (curoffset != prevoffset) {
+    show_menu(menulines,entrycount,curoffset);
+    prevoffset = curoffset;
+    scrollofs  = -1;
+
+    lcd_gotoxy(0,curentry-curoffset);
+    lcd_putch(3);
+
+    entrylen = strlen(menulines[curentry]);
+    preventry = curentry;
+  } else if (preventry != curentry) {
+    /* Move marker if only the entry changed */
+    lcd_gotoxy(0,preventry-curoffset);
+    lcd_putch(' ');
+
+    if (scrollofs != -1) {
+      uint8_t i;
+
+      lcd_gotoxy(1,preventry-curoffset);
+      for (i=0;i<LCD_COLUMNS-1;i++)
+        lcd_putch(menulines[preventry][i]);
+      scrollofs = -1;
+    }
+
+    lcd_gotoxy(0,curentry-curoffset);
+    lcd_putch(3);
+
+    entrylen = strlen(menulines[curentry]);
+
+    preventry = curentry;
+  }
+
+  /* Current entry is too long -> scroll */
+  if (entrylen >= LCD_COLUMNS) {
+    if (scrollofs == -1) {
+      /* Haven't scrolled yet, start in a few ticks */
+      scrollofs  = 0;
+      scrolltime = getticks() + TICKS_BEFORE_SCROLLING;
+    } else if (time_after(getticks(),scrolltime)) {
+      /* Scrolling */
+      uint8_t i;
+
+      scrollofs++;
+      if (scrollofs > entrylen+2) scrollofs = 0;
+      scrolltime += TICKS_PER_CHARACTER;
+
+      lcd_gotoxy(1,curentry-curoffset);
+      for (i=0;i<LCD_COLUMNS-1;i++) {
+        if (scrollofs+i < entrylen) {
+          lcd_putch(menulines[curentry][scrollofs+i]);
+        } else if (scrollofs+i < entrylen+3) {
+          lcd_putch(' ');
+        } else
+          lcd_putch(menulines[curentry][scrollofs+i-entrylen-3]);
+      }
+    }
+  }
+
+  prevencoder = curencoder;
+
+  return curentry;
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/menu.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/menu.h
new file mode 100644
index 00000000..0b9bc866
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/menu.h
@@ -0,0 +1,32 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+   
+   menu.h: Generic menu code
+
+*/
+
+#ifndef MENU_H
+#define MENU_H
+
+extern char *menulines[CONFIG_MAX_MENU_ENTRIES];
+
+void    menu_init(void);
+uint8_t menu_display(uint8_t init, uint8_t startentry);
+void    menu_resetlines(void);
+uint8_t menu_addline(char *line);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/timer.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/timer.c
new file mode 100644
index 00000000..65f1690d
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/lcd-i2c/timer.c
@@ -0,0 +1,47 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   timer.c: System timer
+
+*/
+
+#include "config.h"
+#include <avr/interrupt.h>
+#include <avr/io.h>
+#include "avrcompat.h"
+#include "encoder.h"
+#include "timer.h"
+
+volatile tick_t ticks;
+
+/* The main timer interrupt */
+ISR(TIMER1_COMPA_vect) {
+  ticks++;
+  encoder_buttonisr();
+}
+
+void timer_init(void) {
+  /* Count F_CPU/8 in timer 0 */
+  TCCR0B = _BV(CS01);
+
+  /* Set up a 100Hz interrupt using timer 1 */
+  OCR1A  = 1250*((float)F_CPU/8000000.0) -1;
+  TCNT1  = 0;
+  TCCR1A = 0;
+  TCCR1B = _BV(WGM12) | _BV(CS10) | _BV(CS11);
+  TIMSK1 |= _BV(OCIE1A);
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/Makefile.main b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/Makefile.main
new file mode 100644
index 00000000..52901bd9
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/Makefile.main
@@ -0,0 +1,408 @@
+# Hey Emacs, this is a -*- makefile -*-
+
+# Define version number
+MAJOR = 1
+MINOR = 0
+PATCHLEVEL = 0
+FIX =
+
+# Forces bootloader version to 0, comment out or leave empty for release
+PRERELEASE = alpha0
+
+#----------------------------------------------------------------------------
+# WinAVR Makefile Template written by Eric B. Weddington, Joerg Wunsch, et al.
+#
+# Released to the Public Domain
+#
+# Additional material for this makefile was written by:
+# Peter Fleury
+# Tim Henigan
+# Colin O'Flynn
+# Reiner Patommel
+# Markus Pfaff
+# Sander Pool
+# Frederik Rouleau
+# Carlos Lamas
+#
+#
+# Extensively modified for sd2iec by Ingo Korb
+#
+# To rebuild project do "make clean" then "make all".
+#----------------------------------------------------------------------------
+
+# Enable verbose compilation with "make V=1"
+ifdef V
+ Q :=
+ E := @:
+else
+ Q := @
+ E := @echo
+endif
+
+# Include the configuration file
+include $(OBJDIR)/make.inc
+
+# Output format. (can be srec, ihex, binary)
+HEXFORMAT = ihex
+
+# Target file name (without extension).
+TARGET = $(OBJDIR)/sd2iec
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC  = buffers.c fatops.c fileops.c main.c errormsg.c
+SRC += doscmd.c ff.c d64ops.c diskchange.c
+SRC += eeprom-conf.c parser.c utils.c led.c diskio.c
+SRC += timer.c $(CONFIG_ARCH)/arch-timer.c $(CONFIG_ARCH)/spi.c
+SRC += $(CONFIG_ARCH)/system.c
+
+ifneq ($(CONFIG_NO_SD),y)
+  SRC += sdcard.c
+endif
+
+ifeq ($(CONFIG_M2I),y)
+  SRC += m2iops.c
+endif
+
+ifneq ($(CONFIG_HAVE_IEC),y)
+  ifneq ($(CONFIG_HAVE_IEEE),y)
+    .PHONY: nobus
+    nobus:
+	@echo 'Neither CONFIG_HAVE_IEC nor CONFIG_HAVE_IEEE are set.'
+	@echo "Please edit $(CONFIG)."
+  endif
+endif
+
+ifeq ($(CONFIG_HAVE_IEC),y)
+  SRC += iec.c fastloader.c
+endif
+
+ifeq ($(CONFIG_HAVE_IEEE),y)
+  SRC += ieee.c
+endif
+
+ifeq ($(CONFIG_UART_DEBUG),y)
+  SRC += $(CONFIG_ARCH)/uart.c
+endif
+
+ifeq ($(CONFIG_REMOTE_DISPLAY),y)
+  SRC += display.c
+  NEED_I2C := y
+endif
+
+ifeq ($(CONFIG_P00CACHE),y)
+  SRC += p00cache.c
+endif
+
+ifeq ($(CONFIG_HAVE_EEPROMFS),y)
+  SRC += eeprom-fs.c eefs-ops.c
+endif
+
+# Additional hardware support enabled in the config file
+ifdef CONFIG_ADD_SD
+  SRC += sdcard.c
+endif
+
+ifdef CONFIG_ADD_ATA
+  SRC += $(CONFIG_ARCH)/ata.c
+endif
+
+# Various RTC implementations
+ifeq ($(CONFIG_RTC_DS1307),y)
+  SRC += rtc.c ds1307-3231.c
+  NEED_I2C := y
+endif
+
+ifeq ($(CONFIG_RTC_DS3231),y)
+  SRC += rtc.c ds1307-3231.c
+  NEED_I2C := y
+endif
+
+# Note: 3 is the LPC17xx internal RTC
+
+ifeq ($(CONFIG_RTC_PCF8583),y)
+  SRC += rtc.c pcf8583.c
+  NEED_I2C := y
+endif
+
+ifeq ($(CONFIG_RTC_SOFTWARE),y)
+  SRC += rtc.c avr/softrtc.c
+endif
+
+# Optimization level, can be [0, 1, 2, 3, s].
+#     0 = turn off optimization. s = optimize for size.
+#     (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+# Use s -mcall-prologues when you really need size...
+#OPT = 2
+OPT = s
+
+# Debugging format.
+#     Native formats for AVR-GCC's -g are dwarf-2 [default] or stabs.
+#     AVR Studio 4.10 requires dwarf-2.
+#     AVR [Extended] COFF format requires stabs, plus an avr-objcopy run.
+DEBUG = dwarf-2
+
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+#     Use forward slashes for directory separators.
+#     For a directory that has spaces, enclose it in quotes.
+EXTRAINCDIRS =
+
+
+# Compiler flag to set the C Standard level.
+#     c89   = "ANSI" C
+#     gnu89 = c89 plus GCC extensions
+#     c99   = ISO C99 standard (not yet fully implemented)
+#     gnu99 = c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+
+# Place -D or -U options here
+CDEFS = -DF_CPU=$(CONFIG_MCU_FREQ)UL
+
+# Calculate bootloader version
+ifdef PRERELEASE
+BOOT_VERSION := 0
+else
+BOOT_VERSION := 0x$(MAJOR)$(MINOR)$(PATCHLEVEL)$(FIX)
+endif
+
+# Create a version number define
+ifdef PATCHLEVEL
+ifdef FIX
+PROGRAMVERSION := $(MAJOR).$(MINOR).$(PATCHLEVEL).$(FIX)
+else
+PROGRAMVERSION := $(MAJOR).$(MINOR).$(PATCHLEVEL)
+BOOT_VERSION := $(BOOT_VERSION)0
+endif
+else
+PROGRAMVERSION := $(MAJOR).$(MINOR)
+BOOT_VERSION := $(BOOT_VERSION)00
+endif
+
+ifdef PRERELEASE
+PROGRAMVERSION := $(PROGRAMVERSION)$(PRERELEASE)
+endif
+
+LONGVERSION := -$(CONFIGSUFFIX)
+CDEFS += -DVERSION=\"$(PROGRAMVERSION)\" -DLONGVERSION=\"$(LONGVERSION)\"
+
+
+# Define programs and commands.
+# CC must be defined here to generate the correct CFLAGS
+SHELL = sh
+REMOVE = rm -f
+COPY = cp
+WINSHELL = cmd
+AWK = awk
+
+# Include architecture-specific variables
+include scripts/$(CONFIG_ARCH)/variables.mk
+
+#---------------- Compiler Options ----------------
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS)
+CFLAGS += -O$(OPT) -fno-strict-aliasing
+CFLAGS += -Wall -Wstrict-prototypes -Werror
+#CFLAGS += -Wa,-adhlns=$(OBJDIR)/$(<:.c=.lst)
+CFLAGS += -I$(OBJDIR) -Isrc -Isrc/$(CONFIG_ARCH)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+CFLAGS += -ffunction-sections -fdata-sections
+
+ifdef NEED_I2C
+  CFLAGS += -DHAVE_I2C
+endif
+
+#---------------- Assembler Options ----------------
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-gstabs -I$(OBJDIR) -Isrc -Isrc/$(CONFIG_ARCH)
+
+
+#---------------- Linker Options ----------------
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += -Wl,--gc-sections
+ifeq ($(CONFIG_LINKER_RELAX),y)
+  LDFLAGS += -Wl,-O9,--relax
+endif
+
+
+#============================================================================
+
+
+# De-dupe the list of C source files
+CSRC := $(patsubst %,src/%,$(sort $(SRC)))
+
+# Add subdir to assembler source files
+ASMSRC_DIR := $(patsubst %,src/%,$(ASMSRC))
+
+# Define all object files.
+OBJ := $(patsubst %,$(OBJDIR)/%,$(CSRC:.c=.o) $(ASMSRC_DIR:.S=.o))
+
+# Define all listing files.
+LST := $(patsubst %,$(OBJDIR)/%,$(CSRC:.c=.lst) $(ASMSRC_DIR:.S=.lst))
+
+# Define the object directories
+OBJDIRS := $(sort $(dir $(OBJ)))
+
+# Compiler flags to generate dependency files.
+GENDEPFLAGS = -MMD -MP -MF .dep/$(@F).d
+
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS  = $(ARCH_CFLAGS)  $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = $(ARCH_ASFLAGS) -x assembler-with-cpp $(ASFLAGS) $(CDEFS)
+ALL_LDFLAGS = $(ARCH_LDFLAGS) $(LDFLAGS)
+
+
+# Default target.
+all: build
+
+# include architecture-dependent rules
+include scripts/$(CONFIG_ARCH)/targets.mk
+
+build: elf bin hex
+	$(E) "  SIZE   $(TARGET).elf"
+	$(Q)$(ELFSIZE)|grep -v debug
+
+elf: $(TARGET).elf
+bin: $(TARGET).bin
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss
+sym: $(TARGET).sym
+
+
+# Doxygen output:
+doxygen:
+	-rm -rf doxyinput
+	mkdir doxyinput
+	cp src/*.h src/*.c doxyinput
+	scripts/src2doxy.pl doxyinput/*.h doxyinput/*.c
+	doxygen scripts/doxygen.conf
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+
+
+# Generate macro-only asmconfig.h from autoconf.h
+.PRECIOUS: $(OBJDIR)/asmconfig.h
+$(OBJDIR)/asmconfig.h: $(CONFFILES) src/config.h src/$(CONFIG_ARCH)/arch-config.h | $(OBJDIR)
+	$(E) "  CPP    config.h"
+	$(Q)$(CC) -E -dM $(ALL_ASFLAGS) src/config.h | grep -v "^#define __" > $@
+
+# Create final output files (.hex, .eep) from ELF output file.
+ifeq ($(CONFIG_BOOTLOADER),y)
+$(OBJDIR)/%.bin: $(OBJDIR)/%.elf
+	$(E) "  BIN    $@"
+	$(Q)$(OBJCOPY) -O binary -R .eeprom $< $@
+	$(E) "  CRCGEN $@"
+	$(Q)$(CRCGEN) $@ $(BINARY_LENGTH) $(CONFIG_BOOT_DEVID) $(BOOT_VERSION)
+else
+$(OBJDIR)/%.bin: $(OBJDIR)/%.elf
+	$(E) "  BIN    $@"
+	$(Q)$(OBJCOPY) -O binary -R .eeprom $< $@
+endif
+
+
+$(OBJDIR)/%.hex: $(OBJDIR)/%.elf
+	$(E) "  HEX    $@"
+	$(Q)$(OBJCOPY) -O $(HEXFORMAT) -R .eeprom $< $@
+
+$(OBJDIR)/%.eep: $(OBJDIR)/%.elf
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(HEXFORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+$(OBJDIR)/%.lss: $(OBJDIR)/%.elf
+	$(E) "  LSS    $<"
+	$(Q)$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+$(OBJDIR)/%.sym: $(OBJDIR)/%.elf
+	$(E) "  SYM    $<"
+	$(E)$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+$(OBJDIR)/%.elf: $(OBJ)
+	$(E) "  LINK   $@"
+	$(Q)$(CC) $(ALL_CFLAGS) $^ --output $@ $(ALL_LDFLAGS)
+
+
+# Compile: create object files from C source files.
+$(OBJDIR)/%.o : %.c $(CONFFILES) | $(OBJDIR)/src
+	$(E) "  CC     $<"
+	$(Q)$(CC) -c $(ALL_CFLAGS) $< -o $@
+
+
+# Compile: create assembler files from C source files.
+$(OBJDIR)/%.s : %.c $(CONFFILES) | $(OBJDIR)/src
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+$(OBJDIR)/%.o : %.S $(OBJDIR)/asmconfig.h $(CONFFILES) | $(OBJDIR)/src
+	$(E) "  AS     $<"
+	$(Q)$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+# Create preprocessed source for use in sending a bug report.
+$(OBJDIR)/%.i : %.c $(CONFFILES) | $(OBJDIR)/src
+	$(CC) -E -mmcu=$(MCU) -I. $(CFLAGS) $< -o $@
+
+# Create the output directories
+$(OBJDIR)/src:
+	$(E) "  MKDIR  $(OBJDIRS)"
+	-$(Q)mkdir -p $(OBJDIRS)
+
+# Target: clean project.
+clean:
+	$(E) "  CLEAN"
+	$(Q)$(REMOVE) $(TARGET).hex
+	$(Q)$(REMOVE) $(TARGET).bin
+	$(Q)$(REMOVE) $(TARGET).eep
+	$(Q)$(REMOVE) $(TARGET).cof
+	$(Q)$(REMOVE) $(TARGET).elf
+	$(Q)$(REMOVE) $(TARGET).map
+	$(Q)$(REMOVE) $(TARGET).sym
+	$(Q)$(REMOVE) $(TARGET).lss
+	$(Q)$(REMOVE) $(OBJ)
+	$(Q)$(REMOVE) $(OBJDIR)/autoconf.h
+	$(Q)$(REMOVE) $(OBJDIR)/make.inc
+	$(Q)$(REMOVE) $(OBJDIR)/asmconfig.h
+	$(Q)$(REMOVE) $(OBJDIR)/*.bin
+	$(Q)$(REMOVE) $(LST)
+	$(Q)$(REMOVE) $(CSRC:.c=.s)
+	$(Q)$(REMOVE) $(CSRC:.c=.d)
+	$(Q)$(REMOVE) .dep/*
+	$(Q)$(REMOVE) -rf codedoc
+	$(Q)$(REMOVE) -rf doxyinput
+	-$(Q)rmdir --ignore-fail-on-non-empty -p $(OBJDIRS)
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+# Listing of phony targets.
+.PHONY : all sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program debug gdb-config doxygen
+
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/avr/crcgen-avr.pl b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/avr/crcgen-avr.pl
new file mode 100644
index 00000000..5a4d7c9f
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/avr/crcgen-avr.pl
@@ -0,0 +1,135 @@
+#!/usr/bin/env perl
+#
+# Generate bootloader CRC for the LPC176x version of sd2iec
+#
+#  Copyright (C) 2012-2016  Ingo Korb <ingo@akana.de>
+#  All rights reserved.
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#  1. Redistributions of source code must retain the above copyright
+#     notice, this list of conditions and the following disclaimer.
+#  2. Redistributions in binary form must reproduce the above copyright
+#     notice, this list of conditions and the following disclaimer in the
+#     documentation and/or other materials provided with the distribution.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+#  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+#  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+#  ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+#  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+#  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+#  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+#  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+#  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+#  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+#  SUCH DAMAGE.
+
+use strict;
+use warnings;
+use feature ':5.10';
+
+my $BOOTINFO_SIZE = 8;
+my $CRC_SIZE      = 2;
+
+# translated from avr-libc version because it appears that
+# it implements a non-standard variant of this CRC
+sub crc_ccitt_update {
+    my $crc  = shift;
+    my $data = ord(shift);
+
+    $data ^= $crc & 0xff;
+    $data = ($data ^ ($data << 4)) & 0xff;
+
+    return ((($data << 8) & 0xffff) | (($crc >> 8) & 0xff))     ^
+           ((($data >> 4) & 0xff)   ^ (($data << 3) & 0xffff));
+}
+
+# insert new data in a bootinfo block
+sub update_bootinfo {
+    my $bufref  = shift;
+    my $address = shift;
+    my $devid   = shift;
+    my $version = shift;
+
+    my $bootinfo = pack("Vvv", $devid, $version, 0);
+
+    substr($$bufref, $address, length($bootinfo)) = $bootinfo;
+}
+
+# insert new CRC in a bootinfo block
+sub update_crc {
+    my $bufref  = shift;
+    my $address = shift;
+    my $crc     = shift;
+
+    my $bincrc  = pack("v", $crc);
+
+    substr($$bufref, $address, 2) = $bincrc;
+}
+
+# parse command line
+if (scalar(@ARGV) != 4) {
+    say "Usage: $0 <filename> <length> <signature> <version>";
+    exit 1;
+}
+
+my $filename = shift;
+my $length   = shift;
+my $devid    = hex shift;
+my $version  = hex shift;
+
+if ($length =~ /^0/) {
+    $length = oct $length;
+} else {
+    $length = 0+$length;
+}
+
+# samity checks
+if (! -e $filename) {
+    say STDERR "ERROR: Input file >$filename< does not exist";
+    exit 2;
+}
+
+if (-s $filename > $length) {
+    say STDERR "ERROR: Input file is longer than specified length";
+    exit 2;
+}
+
+# read file into buffer
+my $buffer;
+
+open IN,"<",$filename or die "Can't open $filename: $!";
+binmode IN;
+if (-s $filename > 0) {
+    read IN, $buffer, (-s $filename) or die "Error reading file: $!";
+} else {
+    # accept empty files for testing
+    $buffer = "";
+}
+close IN;
+
+# pad up to specified length
+if (length($buffer) < $length) {
+    $buffer .= chr(0xff)x($length - length($buffer));
+}
+
+# update bootinfo block
+update_bootinfo(\$buffer, $length - $BOOTINFO_SIZE, $devid, $version);
+
+# calculate CRC
+my $crc = 0xffff;
+
+for (my $i = 0; $i < $length - $CRC_SIZE; $i++) {
+    $crc = crc_ccitt_update($crc, substr($buffer, $i, 1));
+}
+
+# insert CRC
+update_crc(\$buffer, $length - $CRC_SIZE, $crc);
+
+# write new file
+open OUT,">",$filename or die "Can't open $filename for writing: $!";
+binmode OUT;
+print OUT $buffer;
+close OUT;
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/avr/targets.mk b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/avr/targets.mk
new file mode 100644
index 00000000..bba50c5c
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/avr/targets.mk
@@ -0,0 +1,14 @@
+# architecture-dependent additional targets and manual dependencies
+
+# Program the device.
+program: bin hex eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH)  $(AVRDUDE_WRITE_EEPROM)
+
+# Set fuses of the device
+fuses: $(CONFIG)
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FUSES)
+
+
+# Manual dependency for the assembler module
+$(OBJDIR)/fastloader-ll.o: include/config.h include/fastloader.h $(OBJDIR)/autoconf.h
+
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/avr/variables.mk b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/avr/variables.mk
new file mode 100644
index 00000000..45ce04cc
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/avr/variables.mk
@@ -0,0 +1,166 @@
+# architecture-dependent variables
+
+#---------------- Source code ----------------
+ASMSRC = avr/crc7asm.S
+
+ifeq ($(CONFIG_HAVE_IEC),y)
+  ASMSRC += avr/fastloader-ll.S
+endif
+
+ifdef NEED_I2C
+  SRC += avr/softi2c.c
+endif
+
+#---------------- Toolchain ----------------
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+
+
+#---------------- Bootloader, fuses etc. ----------------
+# Set MCU name and length of binary for bootloader
+# WARNING: Fuse settings not tested!
+MCU    := $(CONFIG_MCU)
+CRCGEN := scripts/avr/crcgen-avr.pl
+
+ifeq ($(MCU),atmega128)
+  BINARY_LENGTH = 0x1f000
+#  EFUSE = 0xff
+#  HFUSE = 0x91
+#  LFUSE = 0xaf
+else ifeq ($(MCU),atmega1281)
+  BINARY_LENGTH = 0x1f000
+  BOOTLDRSIZE = 0x0800
+  EFUSE = 0xff
+  HFUSE = 0xd2
+  LFUSE = 0xfc
+else ifeq ($(MCU),atmega2561)
+  BINARY_LENGTH = 0x3f000
+  EFUSE = 0xfd
+  HFUSE = 0x93
+  LFUSE = 0xef
+else ifeq ($(MCU),atmega644)
+  BINARY_LENGTH = 0xf000
+  EFUSE = 0xfd
+  HFUSE = 0x91
+  LFUSE = 0xef
+else ifeq ($(MCU),atmega644p)
+  BINARY_LENGTH = 0xf000
+  EFUSE = 0xfd
+  HFUSE = 0x91
+  LFUSE = 0xef
+else ifeq ($(MCU),atmega1284p)
+  BINARY_LENGTH = 0x1f000
+  EFUSE = 0xfd
+  HFUSE = 0xd2
+  LFUSE = 0xe7
+else
+.PHONY: nochip
+nochip:
+	@echo '=============================================================='
+	@echo 'No known target chip specified.'
+	@echo
+	@echo 'Please edit the Makefile.'
+	@exit 1
+endif
+
+#---------------- External Memory Options ----------------
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+#---------------- Programming Options (avrdude) ----------------
+
+# Programming hardware: alf avr910 avrisp bascom bsd
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500 stk500v2
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+AVRDUDE_PROGRAMMER = stk200
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = lpt1    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+# AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+# Allow fuse overrides from the config file
+ifdef CONFIG_EFUSE
+  EFUSE := CONFIG_EFUSE
+endif
+ifdef CONFIG_HFUSE
+  HFUSE := CONFIG_HFUSE
+endif
+ifdef CONFIG_LFUSE
+  LFUSE := CONFIG_LFUSE
+endif
+
+# Calculate command line arguments for fuses
+AVRDUDE_WRITE_FUSES :=
+ifdef EFUSE
+  AVRDUDE_WRITE_FUSES += -U efuse:w:$(EFUSE):m
+endif
+ifdef HFUSE
+  AVRDUDE_WRITE_FUSES += -U hfuse:w:$(HFUSE):m
+endif
+ifdef LFUSE
+  AVRDUDE_WRITE_FUSES += -U lfuse:w:$(LFUSE):m
+endif
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude>
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+#---------------- Architecture variables ----------------
+ARCH_CFLAGS  = -mmcu=$(MCU) -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums -mcall-prologues
+ARCH_ASFLAGS = -mmcu=$(MCU)
+ARCH_LDFLAGS = $(EXTMEMOPTS)
+
+# these are needed for GCC 4.3.2, which is more aggressive at inlining
+# gcc-4.2 knows one of those, but it tends to increase code size
+ifeq ($(shell $(CC) --version|scripts/gcctest.pl),YES)
+#ARCH_CFLAGS += --param inline-call-cost=3
+ARCH_CFLAGS += -fno-inline-small-functions
+ARCH_CFLAGS += -fno-move-loop-invariants
+ARCH_CFLAGS += -fno-split-wide-types
+
+# turn these on to keep the functions in the same order as in the source
+# this is only useful if you're looking at disassembly
+#ARCH_CFLAGS += -fno-reorder-blocks
+#ARCH_CFLAGS += -fno-reorder-blocks-and-partition
+#ARCH_CFLAGS += -fno-reorder-functions
+#ARCH_CFLAGS += -fno-toplevel-reorder
+endif
+
+#---------------- Config ----------------
+ifeq ($(CONFIG_STACK_TRACKING),y)
+  ARCH_CFLAGS += -finstrument-functions
+endif
+
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/configparser.pl b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/configparser.pl
new file mode 100644
index 00000000..77ce8de4
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/configparser.pl
@@ -0,0 +1,232 @@
+#!/usr/bin/perl
+#
+#  sd2iec - SD/MMC to Commodore serial bus interface/controller
+#  Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+#
+#  Inspired by MMC2IEC by Lars Pontoppidan et al.
+#
+#  FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; either version 2 of the License, or
+#  (at your option) any later version.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+#
+#  configparser.pl: Overcomplicated generator for
+#                   a Makefile include and autoconf.h
+#
+
+use File::Spec;
+use Getopt::Long;
+use Pod::Usage;
+use warnings;
+use strict;
+use feature ':5.10';
+
+# --- utility ---
+
+# strips directories from the given file name
+# also works for arrays
+sub basename(\[$@]) {
+    my $param = shift;
+    local $_;
+
+    if (ref $param eq "SCALAR") {
+        return (File::Spec->splitpath($$param))[2];
+    } else {
+        return map { (File::Spec->splitpath($_))[2] } @$param;
+    }
+}
+
+# unquotes a string, might do more in a later version
+sub parse_string($) {
+    my $str = shift;
+
+    if ($str =~ /^\s*\"(.*)\"\s*$/) {
+        return $1;
+    } else {
+        return $str;
+    }
+}
+
+# returns a list of the config files passed on the command line
+sub config_files() {
+    my @list = ();
+
+    foreach my $f (@ARGV) {
+        push @list, split /,/, $f;
+    }
+    return @list;
+}
+
+# parse all config files, returns an array of the intended name and a hash of the entries
+sub parse_config() {
+    my $confname = "";
+    my $prefix   = "";
+    my %configitems;
+
+    $configitems{CONFFILES} = "";
+    foreach my $file (config_files()) {
+        my $curname = basename($file);
+        $curname =~ s/^(add)?config-?//;
+
+        open FD,"<",$file or die "Can't open $file: $!";
+
+        my $line;
+        while (defined($line = <FD>)) {
+            chomp $line;
+            $line =~ s/^\s+//;
+            $line =~ s/\s+$//;
+
+            if ($line =~ /^#/) { # skip comments
+                next;
+            } elsif ($line =~ /^$/) { # skip empty lines
+                next;
+            } elsif ($line =~ /^NAME_OVERRIDE\s*=\s*(.*)$/) {
+                $curname = parse_string($1);
+            } elsif ($line =~ /^NAME_PREFIX\s*=\s*(.*)$/) {
+                $prefix = parse_string($1);
+            } elsif ($line =~ /^(CONFIG_[^ ]+)\s*=\s*([^#]+)/) {
+                my $item  = $1;
+                my $value = $2;
+                $value =~ s/\s*$//;
+                $configitems{$item} = $value;
+            } else {
+                say "Warning: Cannot parse line $. of file $file";
+            }
+        }
+        close FD;
+        $confname .= "-$curname" unless $curname eq "";
+        $configitems{CONFFILES} .= " $file";
+    }
+    $confname = "-$prefix$confname" unless $prefix eq "";
+    $configitems{CONFFILES} =~ s/^\s+//;
+
+    return ($confname, %configitems);
+}
+
+# --- run modes ---
+
+sub generate_files($$) {
+    my $tgt_header  = shift;
+    my $tgt_makeinc = shift;
+    my %configitems;
+
+    (undef, %configitems) = parse_config();
+
+    # write files
+    my @files = config_files();
+
+    open HEADER,">",$tgt_header or die "Can't open $tgt_header: $!";
+    open MAKE,">",$tgt_makeinc or die "Can't open $tgt_makeinc: $!";
+
+    say HEADER "// ", basename($tgt_header), " generated from ",
+               join(",",basename(@files)), " at ",scalar(localtime),"\n";
+    say MAKE "# ", basename($tgt_makeinc), " generated from ",
+               join(",",basename(@files)), " at ",scalar(localtime),"\n";
+
+    my $configguard = uc(basename($tgt_header));
+    $configguard =~ tr/A-Z0-9/_/cs;
+    say HEADER "#ifndef $configguard";
+    say HEADER "#define $configguard\n";
+
+    foreach my $ci (sort keys %configitems) {
+        next if lc($configitems{$ci}) eq "n";
+
+        if (lc($configitems{$ci}) eq "y") {
+            say HEADER "#define $ci";
+            say MAKE   "$ci=y";
+        } else {
+            if ($configitems{$ci} =~ / /) {
+                say HEADER "#define $ci \"$configitems{$ci}\"";
+            } else {
+                say HEADER "#define $ci $configitems{$ci}";
+            }
+            say MAKE "$ci=$configitems{$ci}";
+        }
+    }
+
+    say HEADER "\n#endif";
+
+    close HEADER;
+    close MAKE;
+}
+
+
+sub generate_confdata() {
+    my ($confname, %configitems);
+
+    ($confname, %configitems) = parse_config();
+    my $mcu = $configitems{CONFIG_MCU};
+    $mcu =~ s/atmega/m/;
+    say "$mcu$confname $configitems{CONFFILES}";
+}
+
+# --- main ---
+
+my $run_mode    = "";
+my $tgt_header  = "autoconf.h";
+my $tgt_makeinc = "make.inc";
+
+GetOptions(
+    "confdata"   => sub { $run_mode ||= "confdata"; },
+    "genfiles"   => sub { $run_mode ||= "genfiles"; },
+    "header=s"   => \$tgt_header,
+    "makeinc=s"  => \$tgt_makeinc,
+    "help"       => sub { $run_mode   = "help";       },
+    ) or pod2usage(2);
+
+pod2usage(1) if $run_mode eq "help";
+
+if ($run_mode eq "") {
+    pod2usage(-message => "ERROR: No run mode specified",
+              -verbose => 2, -exitval => 2, -noperldoc => 1);
+} elsif ($run_mode eq "help") {
+    pod2usage(-verbose => 2, -exitval => 0, -noperldoc => 1);
+} elsif ($run_mode eq "confdata") {
+    generate_confdata();
+} elsif ($run_mode eq "genfiles") {
+    generate_files($tgt_header, $tgt_makeinc);
+}
+
+=head1 SYNOPSIS
+
+configparser [options] configfile [configfile...]
+
+=head1 OPTIONS
+
+=over 8
+
+=item B<--help>
+
+prints this help message
+
+=item B<--confdata>
+
+prints some things chosen front he config files to stdout
+
+=item B<--genfiles>
+
+parse the config files and output make/.h files
+
+=item B<--header>
+
+set the file name of the generated header file
+
+=item B<--makeinc>
+
+set the file name of the generated make include file
+
+=back
+
+=cut
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/doxygen.conf b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/doxygen.conf
new file mode 100644
index 00000000..753a7181
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/doxygen.conf
@@ -0,0 +1,1310 @@
+# Doxyfile 1.5.4
+
+# This file describes the settings to be used by the documentation system
+# doxygen (www.doxygen.org) for a project
+#
+# All text after a hash (#) is considered a comment and will be ignored
+# The format is:
+#       TAG = value [value, ...]
+# For lists items can also be appended using:
+#       TAG += value [value, ...]
+# Values that contain spaces should be placed between quotes (" ")
+
+#---------------------------------------------------------------------------
+# Project related configuration options
+#---------------------------------------------------------------------------
+
+# This tag specifies the encoding used for all characters in the config file that
+# follow. The default is UTF-8 which is also the encoding used for all text before
+# the first occurrence of this tag. Doxygen uses libiconv (or the iconv built into
+# libc) for the transcoding. See http://www.gnu.org/software/libiconv for the list of
+# possible encodings.
+
+DOXYFILE_ENCODING      = UTF-8
+
+# The PROJECT_NAME tag is a single word (or a sequence of words surrounded
+# by quotes) that should identify the project.
+
+PROJECT_NAME           = sd2iec
+
+# The PROJECT_NUMBER tag can be used to enter a project or revision number.
+# This could be handy for archiving the generated documentation or
+# if some version control system is used.
+
+PROJECT_NUMBER         =
+
+# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute)
+# base path where the generated documentation will be put.
+# If a relative path is entered, it will be relative to the location
+# where doxygen was started. If left blank the current directory will be used.
+
+OUTPUT_DIRECTORY       = codedoc
+
+# If the CREATE_SUBDIRS tag is set to YES, then doxygen will create
+# 4096 sub-directories (in 2 levels) under the output directory of each output
+# format and will distribute the generated files over these directories.
+# Enabling this option can be useful when feeding doxygen a huge amount of
+# source files, where putting all generated files in the same directory would
+# otherwise cause performance problems for the file system.
+
+CREATE_SUBDIRS         = NO
+
+# The OUTPUT_LANGUAGE tag is used to specify the language in which all
+# documentation generated by doxygen is written. Doxygen will use this
+# information to generate all constant output in the proper language.
+# The default language is English, other supported languages are:
+# Afrikaans, Arabic, Brazilian, Catalan, Chinese, Chinese-Traditional,
+# Croatian, Czech, Danish, Dutch, Finnish, French, German, Greek, Hungarian,
+# Italian, Japanese, Japanese-en (Japanese with English messages), Korean,
+# Korean-en, Lithuanian, Norwegian, Polish, Portuguese, Romanian, Russian,
+# Serbian, Slovak, Slovene, Spanish, Swedish, and Ukrainian.
+
+OUTPUT_LANGUAGE        = English
+
+# If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will
+# include brief member descriptions after the members that are listed in
+# the file and class documentation (similar to JavaDoc).
+# Set to NO to disable this.
+
+BRIEF_MEMBER_DESC      = YES
+
+# If the REPEAT_BRIEF tag is set to YES (the default) Doxygen will prepend
+# the brief description of a member or function before the detailed description.
+# Note: if both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the
+# brief descriptions will be completely suppressed.
+
+REPEAT_BRIEF           = YES
+
+# This tag implements a quasi-intelligent brief description abbreviator
+# that is used to form the text in various listings. Each string
+# in this list, if found as the leading text of the brief description, will be
+# stripped from the text and the result after processing the whole list, is
+# used as the annotated text. Otherwise, the brief description is used as-is.
+# If left blank, the following values are used ("$name" is automatically
+# replaced with the name of the entity): "The $name class" "The $name widget"
+# "The $name file" "is" "provides" "specifies" "contains"
+# "represents" "a" "an" "the"
+
+ABBREVIATE_BRIEF       =
+
+# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then
+# Doxygen will generate a detailed section even if there is only a brief
+# description.
+
+ALWAYS_DETAILED_SEC    = NO
+
+# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all
+# inherited members of a class in the documentation of that class as if those
+# members were ordinary class members. Constructors, destructors and assignment
+# operators of the base classes will not be shown.
+
+INLINE_INHERITED_MEMB  = NO
+
+# If the FULL_PATH_NAMES tag is set to YES then Doxygen will prepend the full
+# path before files name in the file list and in the header files. If set
+# to NO the shortest path that makes the file name unique will be used.
+
+FULL_PATH_NAMES        = NO
+
+# If the FULL_PATH_NAMES tag is set to YES then the STRIP_FROM_PATH tag
+# can be used to strip a user-defined part of the path. Stripping is
+# only done if one of the specified strings matches the left-hand part of
+# the path. The tag can be used to show relative paths in the file list.
+# If left blank the directory from which doxygen is run is used as the
+# path to strip.
+
+STRIP_FROM_PATH        =
+
+# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of
+# the path mentioned in the documentation of a class, which tells
+# the reader which header file to include in order to use a class.
+# If left blank only the name of the header file containing the class
+# definition is used. Otherwise one should specify the include paths that
+# are normally passed to the compiler using the -I flag.
+
+STRIP_FROM_INC_PATH    =
+
+# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter
+# (but less readable) file names. This can be useful is your file systems
+# doesn't support long names like on DOS, Mac, or CD-ROM.
+
+SHORT_NAMES            = NO
+
+# If the JAVADOC_AUTOBRIEF tag is set to YES then Doxygen
+# will interpret the first line (until the first dot) of a JavaDoc-style
+# comment as the brief description. If set to NO, the JavaDoc
+# comments will behave just like regular Qt-style comments
+# (thus requiring an explicit @brief command for a brief description.)
+
+JAVADOC_AUTOBRIEF      = NO
+
+# If the QT_AUTOBRIEF tag is set to YES then Doxygen will
+# interpret the first line (until the first dot) of a Qt-style
+# comment as the brief description. If set to NO, the comments
+# will behave just like regular Qt-style comments (thus requiring
+# an explicit \brief command for a brief description.)
+
+QT_AUTOBRIEF           = YES
+
+# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make Doxygen
+# treat a multi-line C++ special comment block (i.e. a block of //! or ///
+# comments) as a brief description. This used to be the default behaviour.
+# The new default is to treat a multi-line C++ comment block as a detailed
+# description. Set this tag to YES if you prefer the old behaviour instead.
+
+MULTILINE_CPP_IS_BRIEF = NO
+
+# If the DETAILS_AT_TOP tag is set to YES then Doxygen
+# will output the detailed description near the top, like JavaDoc.
+# If set to NO, the detailed description appears after the member
+# documentation.
+
+DETAILS_AT_TOP         = NO
+
+# If the INHERIT_DOCS tag is set to YES (the default) then an undocumented
+# member inherits the documentation from any documented member that it
+# re-implements.
+
+INHERIT_DOCS           = YES
+
+# If the SEPARATE_MEMBER_PAGES tag is set to YES, then doxygen will produce
+# a new page for each member. If set to NO, the documentation of a member will
+# be part of the file/class/namespace that contains it.
+
+SEPARATE_MEMBER_PAGES  = NO
+
+# The TAB_SIZE tag can be used to set the number of spaces in a tab.
+# Doxygen uses this value to replace tabs by spaces in code fragments.
+
+TAB_SIZE               = 8
+
+# This tag can be used to specify a number of aliases that acts
+# as commands in the documentation. An alias has the form "name=value".
+# For example adding "sideeffect=\par Side Effects:\n" will allow you to
+# put the command \sideeffect (or @sideeffect) in the documentation, which
+# will result in a user-defined paragraph with heading "Side Effects:".
+# You can put \n's in the value part of an alias to insert newlines.
+
+ALIASES                =
+
+# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C
+# sources only. Doxygen will then generate output that is more tailored for C.
+# For instance, some of the names that are used will be different. The list
+# of all members will be omitted, etc.
+
+OPTIMIZE_OUTPUT_FOR_C  = YES
+
+# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java
+# sources only. Doxygen will then generate output that is more tailored for Java.
+# For instance, namespaces will be presented as packages, qualified scopes
+# will look different, etc.
+
+OPTIMIZE_OUTPUT_JAVA   = NO
+
+# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want to
+# include (a tag file for) the STL sources as input, then you should
+# set this tag to YES in order to let doxygen match functions declarations and
+# definitions whose arguments contain STL classes (e.g. func(std::string); v.s.
+# func(std::string) {}). This also make the inheritance and collaboration
+# diagrams that involve STL classes more complete and accurate.
+
+BUILTIN_STL_SUPPORT    = NO
+
+# If you use Microsoft's C++/CLI language, you should set this option to YES to
+# enable parsing support.
+
+CPP_CLI_SUPPORT        = NO
+
+# Set the SIP_SUPPORT tag to YES if your project consists of sip sources only.
+# Doxygen will parse them like normal C++ but will assume all classes use public
+# instead of private inheritance when no explicit protection keyword is present.
+
+SIP_SUPPORT            = NO
+
+# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC
+# tag is set to YES, then doxygen will reuse the documentation of the first
+# member in the group (if any) for the other members of the group. By default
+# all members of a group must be documented explicitly.
+
+DISTRIBUTE_GROUP_DOC   = NO
+
+# Set the SUBGROUPING tag to YES (the default) to allow class member groups of
+# the same type (for instance a group of public functions) to be put as a
+# subgroup of that type (e.g. under the Public Functions section). Set it to
+# NO to prevent subgrouping. Alternatively, this can be done per class using
+# the \nosubgrouping command.
+
+SUBGROUPING            = YES
+
+# When TYPEDEF_HIDES_STRUCT is enabled, a typedef of a struct (or union) is
+# documented as struct with the name of the typedef. So
+# typedef struct TypeS {} TypeT, will appear in the documentation as a struct
+# with name TypeT. When disabled the typedef will appear as a member of a file,
+# namespace, or class. And the struct will be named TypeS. This can typically
+# be useful for C code where the coding convention is that all structs are
+# typedef'ed and only the typedef is referenced never the struct's name.
+
+TYPEDEF_HIDES_STRUCT   = NO
+
+#---------------------------------------------------------------------------
+# Build related configuration options
+#---------------------------------------------------------------------------
+
+# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in
+# documentation are documented, even if no documentation was available.
+# Private class members and static file members will be hidden unless
+# the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES
+
+EXTRACT_ALL            = YES
+
+# If the EXTRACT_PRIVATE tag is set to YES all private members of a class
+# will be included in the documentation.
+
+EXTRACT_PRIVATE        = NO
+
+# If the EXTRACT_STATIC tag is set to YES all static members of a file
+# will be included in the documentation.
+
+EXTRACT_STATIC         = YES
+
+# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs)
+# defined locally in source files will be included in the documentation.
+# If set to NO only classes defined in header files are included.
+
+EXTRACT_LOCAL_CLASSES  = YES
+
+# This flag is only useful for Objective-C code. When set to YES local
+# methods, which are defined in the implementation section but not in
+# the interface are included in the documentation.
+# If set to NO (the default) only methods in the interface are included.
+
+EXTRACT_LOCAL_METHODS  = NO
+
+# If this flag is set to YES, the members of anonymous namespaces will be extracted
+# and appear in the documentation as a namespace called 'anonymous_namespace{file}',
+# where file will be replaced with the base name of the file that contains the anonymous
+# namespace. By default anonymous namespace are hidden.
+
+EXTRACT_ANON_NSPACES   = NO
+
+# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all
+# undocumented members of documented classes, files or namespaces.
+# If set to NO (the default) these members will be included in the
+# various overviews, but no documentation section is generated.
+# This option has no effect if EXTRACT_ALL is enabled.
+
+HIDE_UNDOC_MEMBERS     = NO
+
+# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all
+# undocumented classes that are normally visible in the class hierarchy.
+# If set to NO (the default) these classes will be included in the various
+# overviews. This option has no effect if EXTRACT_ALL is enabled.
+
+HIDE_UNDOC_CLASSES     = NO
+
+# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all
+# friend (class|struct|union) declarations.
+# If set to NO (the default) these declarations will be included in the
+# documentation.
+
+HIDE_FRIEND_COMPOUNDS  = NO
+
+# If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any
+# documentation blocks found inside the body of a function.
+# If set to NO (the default) these blocks will be appended to the
+# function's detailed documentation block.
+
+HIDE_IN_BODY_DOCS      = NO
+
+# The INTERNAL_DOCS tag determines if documentation
+# that is typed after a \internal command is included. If the tag is set
+# to NO (the default) then the documentation will be excluded.
+# Set it to YES to include the internal documentation.
+
+INTERNAL_DOCS          = NO
+
+# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate
+# file names in lower-case letters. If set to YES upper-case letters are also
+# allowed. This is useful if you have classes or files whose names only differ
+# in case and if your file system supports case sensitive file names. Windows
+# and Mac users are advised to set this option to NO.
+
+CASE_SENSE_NAMES       = YES
+
+# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen
+# will show members with their full class and namespace scopes in the
+# documentation. If set to YES the scope will be hidden.
+
+HIDE_SCOPE_NAMES       = NO
+
+# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen
+# will put a list of the files that are included by a file in the documentation
+# of that file.
+
+SHOW_INCLUDE_FILES     = YES
+
+# If the INLINE_INFO tag is set to YES (the default) then a tag [inline]
+# is inserted in the documentation for inline members.
+
+INLINE_INFO            = YES
+
+# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen
+# will sort the (detailed) documentation of file and class members
+# alphabetically by member name. If set to NO the members will appear in
+# declaration order.
+
+SORT_MEMBER_DOCS       = YES
+
+# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the
+# brief documentation of file, namespace and class members alphabetically
+# by member name. If set to NO (the default) the members will appear in
+# declaration order.
+
+SORT_BRIEF_DOCS        = NO
+
+# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be
+# sorted by fully-qualified names, including namespaces. If set to
+# NO (the default), the class list will be sorted only by class name,
+# not including the namespace part.
+# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES.
+# Note: This option applies only to the class list, not to the
+# alphabetical list.
+
+SORT_BY_SCOPE_NAME     = NO
+
+# The GENERATE_TODOLIST tag can be used to enable (YES) or
+# disable (NO) the todo list. This list is created by putting \todo
+# commands in the documentation.
+
+GENERATE_TODOLIST      = YES
+
+# The GENERATE_TESTLIST tag can be used to enable (YES) or
+# disable (NO) the test list. This list is created by putting \test
+# commands in the documentation.
+
+GENERATE_TESTLIST      = YES
+
+# The GENERATE_BUGLIST tag can be used to enable (YES) or
+# disable (NO) the bug list. This list is created by putting \bug
+# commands in the documentation.
+
+GENERATE_BUGLIST       = YES
+
+# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or
+# disable (NO) the deprecated list. This list is created by putting
+# \deprecated commands in the documentation.
+
+GENERATE_DEPRECATEDLIST= YES
+
+# The ENABLED_SECTIONS tag can be used to enable conditional
+# documentation sections, marked by \if sectionname ... \endif.
+
+ENABLED_SECTIONS       =
+
+# The MAX_INITIALIZER_LINES tag determines the maximum number of lines
+# the initial value of a variable or define consists of for it to appear in
+# the documentation. If the initializer consists of more lines than specified
+# here it will be hidden. Use a value of 0 to hide initializers completely.
+# The appearance of the initializer of individual variables and defines in the
+# documentation can be controlled using \showinitializer or \hideinitializer
+# command in the documentation regardless of this setting.
+
+MAX_INITIALIZER_LINES  = 30
+
+# Set the SHOW_USED_FILES tag to NO to disable the list of files generated
+# at the bottom of the documentation of classes and structs. If set to YES the
+# list will mention the files that were used to generate the documentation.
+
+SHOW_USED_FILES        = YES
+
+# If the sources in your project are distributed over multiple directories
+# then setting the SHOW_DIRECTORIES tag to YES will show the directory hierarchy
+# in the documentation. The default is NO.
+
+SHOW_DIRECTORIES       = NO
+
+# The FILE_VERSION_FILTER tag can be used to specify a program or script that
+# doxygen should invoke to get the current version for each file (typically from the
+# version control system). Doxygen will invoke the program by executing (via
+# popen()) the command <command> <input-file>, where <command> is the value of
+# the FILE_VERSION_FILTER tag, and <input-file> is the name of an input file
+# provided by doxygen. Whatever the program writes to standard output
+# is used as the file version. See the manual for examples.
+
+FILE_VERSION_FILTER    =
+
+#---------------------------------------------------------------------------
+# configuration options related to warning and progress messages
+#---------------------------------------------------------------------------
+
+# The QUIET tag can be used to turn on/off the messages that are generated
+# by doxygen. Possible values are YES and NO. If left blank NO is used.
+
+QUIET                  = YES
+
+# The WARNINGS tag can be used to turn on/off the warning messages that are
+# generated by doxygen. Possible values are YES and NO. If left blank
+# NO is used.
+
+WARNINGS               = YES
+
+# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings
+# for undocumented members. If EXTRACT_ALL is set to YES then this flag will
+# automatically be disabled.
+
+WARN_IF_UNDOCUMENTED   = YES
+
+# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for
+# potential errors in the documentation, such as not documenting some
+# parameters in a documented function, or documenting parameters that
+# don't exist or using markup commands wrongly.
+
+WARN_IF_DOC_ERROR      = YES
+
+# This WARN_NO_PARAMDOC option can be abled to get warnings for
+# functions that are documented, but have no documentation for their parameters
+# or return value. If set to NO (the default) doxygen will only warn about
+# wrong or incomplete parameter documentation, but not about the absence of
+# documentation.
+
+WARN_NO_PARAMDOC       = NO
+
+# The WARN_FORMAT tag determines the format of the warning messages that
+# doxygen can produce. The string should contain the $file, $line, and $text
+# tags, which will be replaced by the file and line number from which the
+# warning originated and the warning text. Optionally the format may contain
+# $version, which will be replaced by the version of the file (if it could
+# be obtained via FILE_VERSION_FILTER)
+
+WARN_FORMAT            = "$file:$line: $text"
+
+# The WARN_LOGFILE tag can be used to specify a file to which warning
+# and error messages should be written. If left blank the output is written
+# to stderr.
+
+WARN_LOGFILE           =
+
+#---------------------------------------------------------------------------
+# configuration options related to the input files
+#---------------------------------------------------------------------------
+
+# The INPUT tag can be used to specify the files and/or directories that contain
+# documented source files. You may enter file names like "myfile.cpp" or
+# directories like "/usr/src/myproject". Separate the files or directories
+# with spaces.
+
+INPUT                  = doxyinput
+
+# This tag can be used to specify the character encoding of the source files that
+# doxygen parses. Internally doxygen uses the UTF-8 encoding, which is also the default
+# input encoding. Doxygen uses libiconv (or the iconv built into libc) for the transcoding.
+# See http://www.gnu.org/software/libiconv for the list of possible encodings.
+
+INPUT_ENCODING         = UTF-8
+
+# If the value of the INPUT tag contains directories, you can use the
+# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp
+# and *.h) to filter out the source-files in the directories. If left
+# blank the following patterns are tested:
+# *.c *.cc *.cxx *.cpp *.c++ *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh *.hxx
+# *.hpp *.h++ *.idl *.odl *.cs *.php *.php3 *.inc *.m *.mm *.py *.f90
+
+FILE_PATTERNS          = *.c *.h
+
+# The RECURSIVE tag can be used to turn specify whether or not subdirectories
+# should be searched for input files as well. Possible values are YES and NO.
+# If left blank NO is used.
+
+RECURSIVE              = NO
+
+# The EXCLUDE tag can be used to specify files and/or directories that should
+# excluded from the INPUT source files. This way you can easily exclude a
+# subdirectory from a directory tree whose root is specified with the INPUT tag.
+
+EXCLUDE                =
+
+# The EXCLUDE_SYMLINKS tag can be used select whether or not files or
+# directories that are symbolic links (a Unix filesystem feature) are excluded
+# from the input.
+
+EXCLUDE_SYMLINKS       = NO
+
+# If the value of the INPUT tag contains directories, you can use the
+# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude
+# certain files from those directories. Note that the wildcards are matched
+# against the file with absolute path, so to exclude all test directories
+# for example use the pattern */test/*
+
+EXCLUDE_PATTERNS       =
+
+# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names
+# (namespaces, classes, functions, etc.) that should be excluded from the output.
+# The symbol name can be a fully qualified name, a word, or if the wildcard * is used,
+# a substring. Examples: ANamespace, AClass, AClass::ANamespace, ANamespace::*Test
+
+EXCLUDE_SYMBOLS        =
+
+# The EXAMPLE_PATH tag can be used to specify one or more files or
+# directories that contain example code fragments that are included (see
+# the \include command).
+
+EXAMPLE_PATH           =
+
+# If the value of the EXAMPLE_PATH tag contains directories, you can use the
+# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp
+# and *.h) to filter out the source-files in the directories. If left
+# blank all files are included.
+
+EXAMPLE_PATTERNS       =
+
+# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be
+# searched for input files to be used with the \include or \dontinclude
+# commands irrespective of the value of the RECURSIVE tag.
+# Possible values are YES and NO. If left blank NO is used.
+
+EXAMPLE_RECURSIVE      = NO
+
+# The IMAGE_PATH tag can be used to specify one or more files or
+# directories that contain image that are included in the documentation (see
+# the \image command).
+
+IMAGE_PATH             =
+
+# The INPUT_FILTER tag can be used to specify a program that doxygen should
+# invoke to filter for each input file. Doxygen will invoke the filter program
+# by executing (via popen()) the command <filter> <input-file>, where <filter>
+# is the value of the INPUT_FILTER tag, and <input-file> is the name of an
+# input file. Doxygen will then use the output that the filter program writes
+# to standard output.  If FILTER_PATTERNS is specified, this tag will be
+# ignored.
+
+INPUT_FILTER           =
+
+# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern
+# basis.  Doxygen will compare the file name with each pattern and apply the
+# filter if there is a match.  The filters are a list of the form:
+# pattern=filter (like *.cpp=my_cpp_filter). See INPUT_FILTER for further
+# info on how filters are used. If FILTER_PATTERNS is empty, INPUT_FILTER
+# is applied to all files.
+
+FILTER_PATTERNS        =
+
+# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using
+# INPUT_FILTER) will be used to filter the input files when producing source
+# files to browse (i.e. when SOURCE_BROWSER is set to YES).
+
+FILTER_SOURCE_FILES    = NO
+
+#---------------------------------------------------------------------------
+# configuration options related to source browsing
+#---------------------------------------------------------------------------
+
+# If the SOURCE_BROWSER tag is set to YES then a list of source files will
+# be generated. Documented entities will be cross-referenced with these sources.
+# Note: To get rid of all source code in the generated output, make sure also
+# VERBATIM_HEADERS is set to NO. If you have enabled CALL_GRAPH or CALLER_GRAPH
+# then you must also enable this option. If you don't then doxygen will produce
+# a warning and turn it on anyway
+
+SOURCE_BROWSER         = YES
+
+# Setting the INLINE_SOURCES tag to YES will include the body
+# of functions and classes directly in the documentation.
+
+INLINE_SOURCES         = YES
+
+# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct
+# doxygen to hide any special comment blocks from generated source code
+# fragments. Normal C and C++ comments will always remain visible.
+
+STRIP_CODE_COMMENTS    = NO
+
+# If the REFERENCED_BY_RELATION tag is set to YES (the default)
+# then for each documented function all documented
+# functions referencing it will be listed.
+
+REFERENCED_BY_RELATION = YES
+
+# If the REFERENCES_RELATION tag is set to YES (the default)
+# then for each documented function all documented entities
+# called/used by that function will be listed.
+
+REFERENCES_RELATION    = YES
+
+# If the REFERENCES_LINK_SOURCE tag is set to YES (the default)
+# and SOURCE_BROWSER tag is set to YES, then the hyperlinks from
+# functions in REFERENCES_RELATION and REFERENCED_BY_RELATION lists will
+# link to the source code.  Otherwise they will link to the documentstion.
+
+REFERENCES_LINK_SOURCE = YES
+
+# If the USE_HTAGS tag is set to YES then the references to source code
+# will point to the HTML generated by the htags(1) tool instead of doxygen
+# built-in source browser. The htags tool is part of GNU's global source
+# tagging system (see http://www.gnu.org/software/global/global.html). You
+# will need version 4.8.6 or higher.
+
+USE_HTAGS              = NO
+
+# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen
+# will generate a verbatim copy of the header file for each class for
+# which an include is specified. Set to NO to disable this.
+
+VERBATIM_HEADERS       = YES
+
+#---------------------------------------------------------------------------
+# configuration options related to the alphabetical class index
+#---------------------------------------------------------------------------
+
+# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index
+# of all compounds will be generated. Enable this if the project
+# contains a lot of classes, structs, unions or interfaces.
+
+ALPHABETICAL_INDEX     = NO
+
+# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then
+# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns
+# in which this list will be split (can be a number in the range [1..20])
+
+COLS_IN_ALPHA_INDEX    = 5
+
+# In case all classes in a project start with a common prefix, all
+# classes will be put under the same header in the alphabetical index.
+# The IGNORE_PREFIX tag can be used to specify one or more prefixes that
+# should be ignored while generating the index headers.
+
+IGNORE_PREFIX          =
+
+#---------------------------------------------------------------------------
+# configuration options related to the HTML output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_HTML tag is set to YES (the default) Doxygen will
+# generate HTML output.
+
+GENERATE_HTML          = YES
+
+# The HTML_OUTPUT tag is used to specify where the HTML docs will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
+# put in front of it. If left blank `html' will be used as the default path.
+
+HTML_OUTPUT            = html
+
+# The HTML_FILE_EXTENSION tag can be used to specify the file extension for
+# each generated HTML page (for example: .htm,.php,.asp). If it is left blank
+# doxygen will generate files with .html extension.
+
+HTML_FILE_EXTENSION    = .html
+
+# The HTML_HEADER tag can be used to specify a personal HTML header for
+# each generated HTML page. If it is left blank doxygen will generate a
+# standard header.
+
+HTML_HEADER            =
+
+# The HTML_FOOTER tag can be used to specify a personal HTML footer for
+# each generated HTML page. If it is left blank doxygen will generate a
+# standard footer.
+
+HTML_FOOTER            =
+
+# The HTML_STYLESHEET tag can be used to specify a user-defined cascading
+# style sheet that is used by each HTML page. It can be used to
+# fine-tune the look of the HTML output. If the tag is left blank doxygen
+# will generate a default style sheet. Note that doxygen will try to copy
+# the style sheet file to the HTML output directory, so don't put your own
+# stylesheet in the HTML output directory as well, or it will be erased!
+
+HTML_STYLESHEET        =
+
+# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes,
+# files or namespaces will be aligned in HTML using tables. If set to
+# NO a bullet list will be used.
+
+HTML_ALIGN_MEMBERS     = YES
+
+# If the GENERATE_HTMLHELP tag is set to YES, additional index files
+# will be generated that can be used as input for tools like the
+# Microsoft HTML help workshop to generate a compressed HTML help file (.chm)
+# of the generated HTML documentation.
+
+GENERATE_HTMLHELP      = NO
+
+# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML
+# documentation will contain sections that can be hidden and shown after the
+# page has loaded. For this to work a browser that supports
+# JavaScript and DHTML is required (for instance Mozilla 1.0+, Firefox
+# Netscape 6.0+, Internet explorer 5.0+, Konqueror, or Safari).
+
+HTML_DYNAMIC_SECTIONS  = NO
+
+# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can
+# be used to specify the file name of the resulting .chm file. You
+# can add a path in front of the file if the result should not be
+# written to the html output directory.
+
+CHM_FILE               =
+
+# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can
+# be used to specify the location (absolute path including file name) of
+# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run
+# the HTML help compiler on the generated index.hhp.
+
+HHC_LOCATION           =
+
+# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag
+# controls if a separate .chi index file is generated (YES) or that
+# it should be included in the master .chm file (NO).
+
+GENERATE_CHI           = NO
+
+# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag
+# controls whether a binary table of contents is generated (YES) or a
+# normal table of contents (NO) in the .chm file.
+
+BINARY_TOC             = NO
+
+# The TOC_EXPAND flag can be set to YES to add extra items for group members
+# to the contents of the HTML help documentation and to the tree view.
+
+TOC_EXPAND             = NO
+
+# The DISABLE_INDEX tag can be used to turn on/off the condensed index at
+# top of each HTML page. The value NO (the default) enables the index and
+# the value YES disables it.
+
+DISABLE_INDEX          = NO
+
+# This tag can be used to set the number of enum values (range [1..20])
+# that doxygen will group on one line in the generated HTML documentation.
+
+ENUM_VALUES_PER_LINE   = 4
+
+# If the GENERATE_TREEVIEW tag is set to YES, a side panel will be
+# generated containing a tree-like index structure (just like the one that
+# is generated for HTML Help). For this to work a browser that supports
+# JavaScript, DHTML, CSS and frames is required (for instance Mozilla 1.0+,
+# Netscape 6.0+, Internet explorer 5.0+, or Konqueror). Windows users are
+# probably better off using the HTML help feature.
+
+GENERATE_TREEVIEW      = YES
+
+# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be
+# used to set the initial width (in pixels) of the frame in which the tree
+# is shown.
+
+TREEVIEW_WIDTH         = 250
+
+#---------------------------------------------------------------------------
+# configuration options related to the LaTeX output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will
+# generate Latex output.
+
+GENERATE_LATEX         = NO
+
+# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
+# put in front of it. If left blank `latex' will be used as the default path.
+
+LATEX_OUTPUT           = latex
+
+# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be
+# invoked. If left blank `latex' will be used as the default command name.
+
+LATEX_CMD_NAME         = latex
+
+# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to
+# generate index for LaTeX. If left blank `makeindex' will be used as the
+# default command name.
+
+MAKEINDEX_CMD_NAME     = makeindex
+
+# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact
+# LaTeX documents. This may be useful for small projects and may help to
+# save some trees in general.
+
+COMPACT_LATEX          = NO
+
+# The PAPER_TYPE tag can be used to set the paper type that is used
+# by the printer. Possible values are: a4, a4wide, letter, legal and
+# executive. If left blank a4wide will be used.
+
+PAPER_TYPE             = a4wide
+
+# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX
+# packages that should be included in the LaTeX output.
+
+EXTRA_PACKAGES         =
+
+# The LATEX_HEADER tag can be used to specify a personal LaTeX header for
+# the generated latex document. The header should contain everything until
+# the first chapter. If it is left blank doxygen will generate a
+# standard header. Notice: only use this tag if you know what you are doing!
+
+LATEX_HEADER           =
+
+# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated
+# is prepared for conversion to pdf (using ps2pdf). The pdf file will
+# contain links (just like the HTML output) instead of page references
+# This makes the output suitable for online browsing using a pdf viewer.
+
+PDF_HYPERLINKS         = NO
+
+# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of
+# plain latex in the generated Makefile. Set this option to YES to get a
+# higher quality PDF documentation.
+
+USE_PDFLATEX           = NO
+
+# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode.
+# command to the generated LaTeX files. This will instruct LaTeX to keep
+# running if errors occur, instead of asking the user for help.
+# This option is also used when generating formulas in HTML.
+
+LATEX_BATCHMODE        = NO
+
+# If LATEX_HIDE_INDICES is set to YES then doxygen will not
+# include the index chapters (such as File Index, Compound Index, etc.)
+# in the output.
+
+LATEX_HIDE_INDICES     = NO
+
+#---------------------------------------------------------------------------
+# configuration options related to the RTF output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output
+# The RTF output is optimized for Word 97 and may not look very pretty with
+# other RTF readers or editors.
+
+GENERATE_RTF           = NO
+
+# The RTF_OUTPUT tag is used to specify where the RTF docs will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
+# put in front of it. If left blank `rtf' will be used as the default path.
+
+RTF_OUTPUT             = rtf
+
+# If the COMPACT_RTF tag is set to YES Doxygen generates more compact
+# RTF documents. This may be useful for small projects and may help to
+# save some trees in general.
+
+COMPACT_RTF            = NO
+
+# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated
+# will contain hyperlink fields. The RTF file will
+# contain links (just like the HTML output) instead of page references.
+# This makes the output suitable for online browsing using WORD or other
+# programs which support those fields.
+# Note: wordpad (write) and others do not support links.
+
+RTF_HYPERLINKS         = NO
+
+# Load stylesheet definitions from file. Syntax is similar to doxygen's
+# config file, i.e. a series of assignments. You only have to provide
+# replacements, missing definitions are set to their default value.
+
+RTF_STYLESHEET_FILE    =
+
+# Set optional variables used in the generation of an rtf document.
+# Syntax is similar to doxygen's config file.
+
+RTF_EXTENSIONS_FILE    =
+
+#---------------------------------------------------------------------------
+# configuration options related to the man page output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_MAN tag is set to YES (the default) Doxygen will
+# generate man pages
+
+GENERATE_MAN           = NO
+
+# The MAN_OUTPUT tag is used to specify where the man pages will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
+# put in front of it. If left blank `man' will be used as the default path.
+
+MAN_OUTPUT             = man
+
+# The MAN_EXTENSION tag determines the extension that is added to
+# the generated man pages (default is the subroutine's section .3)
+
+MAN_EXTENSION          = .3
+
+# If the MAN_LINKS tag is set to YES and Doxygen generates man output,
+# then it will generate one additional man file for each entity
+# documented in the real man page(s). These additional files
+# only source the real man page, but without them the man command
+# would be unable to find the correct page. The default is NO.
+
+MAN_LINKS              = NO
+
+#---------------------------------------------------------------------------
+# configuration options related to the XML output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_XML tag is set to YES Doxygen will
+# generate an XML file that captures the structure of
+# the code including all documentation.
+
+GENERATE_XML           = NO
+
+# The XML_OUTPUT tag is used to specify where the XML pages will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
+# put in front of it. If left blank `xml' will be used as the default path.
+
+XML_OUTPUT             = xml
+
+# The XML_SCHEMA tag can be used to specify an XML schema,
+# which can be used by a validating XML parser to check the
+# syntax of the XML files.
+
+XML_SCHEMA             =
+
+# The XML_DTD tag can be used to specify an XML DTD,
+# which can be used by a validating XML parser to check the
+# syntax of the XML files.
+
+XML_DTD                =
+
+# If the XML_PROGRAMLISTING tag is set to YES Doxygen will
+# dump the program listings (including syntax highlighting
+# and cross-referencing information) to the XML output. Note that
+# enabling this will significantly increase the size of the XML output.
+
+XML_PROGRAMLISTING     = YES
+
+#---------------------------------------------------------------------------
+# configuration options for the AutoGen Definitions output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will
+# generate an AutoGen Definitions (see autogen.sf.net) file
+# that captures the structure of the code including all
+# documentation. Note that this feature is still experimental
+# and incomplete at the moment.
+
+GENERATE_AUTOGEN_DEF   = NO
+
+#---------------------------------------------------------------------------
+# configuration options related to the Perl module output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_PERLMOD tag is set to YES Doxygen will
+# generate a Perl module file that captures the structure of
+# the code including all documentation. Note that this
+# feature is still experimental and incomplete at the
+# moment.
+
+GENERATE_PERLMOD       = NO
+
+# If the PERLMOD_LATEX tag is set to YES Doxygen will generate
+# the necessary Makefile rules, Perl scripts and LaTeX code to be able
+# to generate PDF and DVI output from the Perl module output.
+
+PERLMOD_LATEX          = NO
+
+# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be
+# nicely formatted so it can be parsed by a human reader.  This is useful
+# if you want to understand what is going on.  On the other hand, if this
+# tag is set to NO the size of the Perl module output will be much smaller
+# and Perl will parse it just the same.
+
+PERLMOD_PRETTY         = YES
+
+# The names of the make variables in the generated doxyrules.make file
+# are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX.
+# This is useful so different doxyrules.make files included by the same
+# Makefile don't overwrite each other's variables.
+
+PERLMOD_MAKEVAR_PREFIX =
+
+#---------------------------------------------------------------------------
+# Configuration options related to the preprocessor
+#---------------------------------------------------------------------------
+
+# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will
+# evaluate all C-preprocessor directives found in the sources and include
+# files.
+
+ENABLE_PREPROCESSING   = YES
+
+# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro
+# names in the source code. If set to NO (the default) only conditional
+# compilation will be performed. Macro expansion can be done in a controlled
+# way by setting EXPAND_ONLY_PREDEF to YES.
+
+MACRO_EXPANSION        = NO
+
+# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES
+# then the macro expansion is limited to the macros specified with the
+# PREDEFINED and EXPAND_AS_DEFINED tags.
+
+EXPAND_ONLY_PREDEF     = NO
+
+# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files
+# in the INCLUDE_PATH (see below) will be search if a #include is found.
+
+SEARCH_INCLUDES        = YES
+
+# The INCLUDE_PATH tag can be used to specify one or more directories that
+# contain include files that are not input files but should be processed by
+# the preprocessor.
+
+INCLUDE_PATH           =
+
+# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard
+# patterns (like *.h and *.hpp) to filter out the header-files in the
+# directories. If left blank, the patterns specified with FILE_PATTERNS will
+# be used.
+
+INCLUDE_FILE_PATTERNS  =
+
+# The PREDEFINED tag can be used to specify one or more macro names that
+# are defined before the preprocessor is started (similar to the -D option of
+# gcc). The argument of the tag is a list of macros of the form: name
+# or name=definition (no spaces). If the definition and the = are
+# omitted =1 is assumed. To prevent a macro definition from being
+# undefined via #undef or recursively expanded use the := operator
+# instead of the = operator.
+
+PREDEFINED             =
+
+# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then
+# this tag can be used to specify a list of macro names that should be expanded.
+# The macro definition that is found in the sources will be used.
+# Use the PREDEFINED tag if you want to use a different macro definition.
+
+EXPAND_AS_DEFINED      =
+
+# If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then
+# doxygen's preprocessor will remove all function-like macros that are alone
+# on a line, have an all uppercase name, and do not end with a semicolon. Such
+# function macros are typically used for boiler-plate code, and will confuse
+# the parser if not removed.
+
+SKIP_FUNCTION_MACROS   = YES
+
+#---------------------------------------------------------------------------
+# Configuration::additions related to external references
+#---------------------------------------------------------------------------
+
+# The TAGFILES option can be used to specify one or more tagfiles.
+# Optionally an initial location of the external documentation
+# can be added for each tagfile. The format of a tag file without
+# this location is as follows:
+#   TAGFILES = file1 file2 ...
+# Adding location for the tag files is done as follows:
+#   TAGFILES = file1=loc1 "file2 = loc2" ...
+# where "loc1" and "loc2" can be relative or absolute paths or
+# URLs. If a location is present for each tag, the installdox tool
+# does not have to be run to correct the links.
+# Note that each tag file must have a unique name
+# (where the name does NOT include the path)
+# If a tag file is not located in the directory in which doxygen
+# is run, you must also specify the path to the tagfile here.
+
+TAGFILES               =
+
+# When a file name is specified after GENERATE_TAGFILE, doxygen will create
+# a tag file that is based on the input files it reads.
+
+GENERATE_TAGFILE       =
+
+# If the ALLEXTERNALS tag is set to YES all external classes will be listed
+# in the class index. If set to NO only the inherited external classes
+# will be listed.
+
+ALLEXTERNALS           = NO
+
+# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed
+# in the modules index. If set to NO, only the current project's groups will
+# be listed.
+
+EXTERNAL_GROUPS        = YES
+
+# The PERL_PATH should be the absolute path and name of the perl script
+# interpreter (i.e. the result of `which perl').
+
+PERL_PATH              = /usr/bin/perl
+
+#---------------------------------------------------------------------------
+# Configuration options related to the dot tool
+#---------------------------------------------------------------------------
+
+# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will
+# generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base
+# or super classes. Setting the tag to NO turns the diagrams off. Note that
+# this option is superseded by the HAVE_DOT option below. This is only a
+# fallback. It is recommended to install and use dot, since it yields more
+# powerful graphs.
+
+CLASS_DIAGRAMS         = YES
+
+# You can define message sequence charts within doxygen comments using the \msc
+# command. Doxygen will then run the mscgen tool (see http://www.mcternan.me.uk/mscgen/) to
+# produce the chart and insert it in the documentation. The MSCGEN_PATH tag allows you to
+# specify the directory where the mscgen tool resides. If left empty the tool is assumed to
+# be found in the default search path.
+
+MSCGEN_PATH            =
+
+# If set to YES, the inheritance and collaboration graphs will hide
+# inheritance and usage relations if the target is undocumented
+# or is not a class.
+
+HIDE_UNDOC_RELATIONS   = YES
+
+# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is
+# available from the path. This tool is part of Graphviz, a graph visualization
+# toolkit from AT&T and Lucent Bell Labs. The other options in this section
+# have no effect if this option is set to NO (the default)
+
+HAVE_DOT               = NO
+
+# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen
+# will generate a graph for each documented class showing the direct and
+# indirect inheritance relations. Setting this tag to YES will force the
+# the CLASS_DIAGRAMS tag to NO.
+
+CLASS_GRAPH            = YES
+
+# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen
+# will generate a graph for each documented class showing the direct and
+# indirect implementation dependencies (inheritance, containment, and
+# class references variables) of the class with other documented classes.
+
+COLLABORATION_GRAPH    = YES
+
+# If the GROUP_GRAPHS and HAVE_DOT tags are set to YES then doxygen
+# will generate a graph for groups, showing the direct groups dependencies
+
+GROUP_GRAPHS           = YES
+
+# If the UML_LOOK tag is set to YES doxygen will generate inheritance and
+# collaboration diagrams in a style similar to the OMG's Unified Modeling
+# Language.
+
+UML_LOOK               = NO
+
+# If set to YES, the inheritance and collaboration graphs will show the
+# relations between templates and their instances.
+
+TEMPLATE_RELATIONS     = NO
+
+# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT
+# tags are set to YES then doxygen will generate a graph for each documented
+# file showing the direct and indirect include dependencies of the file with
+# other documented files.
+
+INCLUDE_GRAPH          = YES
+
+# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and
+# HAVE_DOT tags are set to YES then doxygen will generate a graph for each
+# documented header file showing the documented files that directly or
+# indirectly include this file.
+
+INCLUDED_BY_GRAPH      = YES
+
+# If the CALL_GRAPH, SOURCE_BROWSER and HAVE_DOT tags are set to YES then doxygen will
+# generate a call dependency graph for every global function or class method.
+# Note that enabling this option will significantly increase the time of a run.
+# So in most cases it will be better to enable call graphs for selected
+# functions only using the \callgraph command.
+
+CALL_GRAPH             = NO
+
+# If the CALLER_GRAPH, SOURCE_BROWSER and HAVE_DOT tags are set to YES then doxygen will
+# generate a caller dependency graph for every global function or class method.
+# Note that enabling this option will significantly increase the time of a run.
+# So in most cases it will be better to enable caller graphs for selected
+# functions only using the \callergraph command.
+
+CALLER_GRAPH           = NO
+
+# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen
+# will graphical hierarchy of all classes instead of a textual one.
+
+GRAPHICAL_HIERARCHY    = YES
+
+# If the DIRECTORY_GRAPH, SHOW_DIRECTORIES and HAVE_DOT tags are set to YES
+# then doxygen will show the dependencies a directory has on other directories
+# in a graphical way. The dependency relations are determined by the #include
+# relations between the files in the directories.
+
+DIRECTORY_GRAPH        = YES
+
+# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images
+# generated by dot. Possible values are png, jpg, or gif
+# If left blank png will be used.
+
+DOT_IMAGE_FORMAT       = png
+
+# The tag DOT_PATH can be used to specify the path where the dot tool can be
+# found. If left blank, it is assumed the dot tool can be found in the path.
+
+DOT_PATH               =
+
+# The DOTFILE_DIRS tag can be used to specify one or more directories that
+# contain dot files that are included in the documentation (see the
+# \dotfile command).
+
+DOTFILE_DIRS           =
+
+# The MAX_DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of
+# nodes that will be shown in the graph. If the number of nodes in a graph
+# becomes larger than this value, doxygen will truncate the graph, which is
+# visualized by representing a node as a red box. Note that doxygen if the number
+# of direct children of the root node in a graph is already larger than
+# MAX_DOT_GRAPH_NOTES then the graph will not be shown at all. Also note
+# that the size of a graph can be further restricted by MAX_DOT_GRAPH_DEPTH.
+
+DOT_GRAPH_MAX_NODES    = 50
+
+# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the
+# graphs generated by dot. A depth value of 3 means that only nodes reachable
+# from the root by following a path via at most 3 edges will be shown. Nodes
+# that lay further from the root node will be omitted. Note that setting this
+# option to 1 or 2 may greatly reduce the computation time needed for large
+# code bases. Also note that the size of a graph can be further restricted by
+# DOT_GRAPH_MAX_NODES. Using a depth of 0 means no depth restriction.
+
+MAX_DOT_GRAPH_DEPTH    = 0
+
+# Set the DOT_TRANSPARENT tag to YES to generate images with a transparent
+# background. This is disabled by default, which results in a white background.
+# Warning: Depending on the platform used, enabling this option may lead to
+# badly anti-aliased labels on the edges of a graph (i.e. they become hard to
+# read).
+
+DOT_TRANSPARENT        = YES
+
+# Set the DOT_MULTI_TARGETS tag to YES allow dot to generate multiple output
+# files in one run (i.e. multiple -o and -T options on the command line). This
+# makes dot run faster, but since only newer versions of dot (>1.8.10)
+# support this, this feature is disabled by default.
+
+DOT_MULTI_TARGETS      = NO
+
+# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will
+# generate a legend page explaining the meaning of the various boxes and
+# arrows in the dot generated graphs.
+
+GENERATE_LEGEND        = YES
+
+# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will
+# remove the intermediate dot files that are used to generate
+# the various graphs.
+
+DOT_CLEANUP            = YES
+
+#---------------------------------------------------------------------------
+# Configuration::additions related to the search engine
+#---------------------------------------------------------------------------
+
+# The SEARCHENGINE tag specifies whether or not a search engine should be
+# used. If set to NO the values of all tags below this one will be ignored.
+
+SEARCHENGINE           = NO
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/gcctest.pl b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/gcctest.pl
new file mode 100644
index 00000000..f09c1173
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/gcctest.pl
@@ -0,0 +1,18 @@
+#!/usr/bin/env perl
+
+use warnings;
+use strict;
+use feature ':5.10';
+
+my $found_4_3 = 0;
+
+while (<>) {
+    next unless /gcc\s+\([^)]+\)\s+(\d+)\.(\d+)\./i;
+    my $major = 0+$1;
+    my $minor = 0+$2;
+    if ($major > 4 || ($major == 4 && $minor > 2)) {
+        $found_4_3 = 1;
+    }
+}
+
+say "YES" if $found_4_3;
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/lpc17xx/crcgen-lpc.pl b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/lpc17xx/crcgen-lpc.pl
new file mode 100644
index 00000000..900a7f81
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/lpc17xx/crcgen-lpc.pl
@@ -0,0 +1,138 @@
+#!/usr/bin/env perl
+#
+# Generate bootloader CRC for the LPC176x version of sd2iec
+#
+#  Copyright (C) 2012-2016  Ingo Korb <ingo@akana.de>
+#  All rights reserved.
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#  1. Redistributions of source code must retain the above copyright
+#     notice, this list of conditions and the following disclaimer.
+#  2. Redistributions in binary form must reproduce the above copyright
+#     notice, this list of conditions and the following disclaimer in the
+#     documentation and/or other materials provided with the distribution.
+#  3. Neither the name of the University nor the names of its contributors
+#     may be used to endorse or promote products derived from this software
+#     without specific prior written permission.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+#  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+#  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+#  ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+#  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+#  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+#  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+#  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+#  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+#  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+#  SUCH DAMAGE.
+
+use strict;
+use warnings;
+use feature ':5.10';
+
+my @BOOTINFO_OFFSETS    = (0x100, 0x4100);
+my $MAIN_PROGRAM_OFFSET = 0x4000;
+
+sub crc_ccitt_update {
+    my $crc  = shift;
+    my $data = ord(shift);
+
+    for (my $i = 0x80; $i > 0; $i >>= 1) {
+        my $bit = $crc & (1 << 15);
+
+        $bit = !$bit if ($data & $i);
+        $crc <<= 1;
+        $crc ^= 0x1021 if $bit;
+    }
+
+    return ($crc & 0xffff);
+}
+
+# insert new data in a bootinfo block
+sub update_bootinfo {
+    my $bufref  = shift;
+    my $address = shift;
+    my $devid   = shift;
+    my $version = shift;
+
+    my $bootinfo = pack("Vvv", $devid, $version, 0);
+
+    substr($$bufref, $address, length($bootinfo)) = $bootinfo;
+}
+
+# insert new CRC in a bootinfo block
+sub update_crc {
+    my $bufref  = shift;
+    my $address = shift;
+    my $crc     = shift;
+
+    my $bincrc  = pack("v", $crc);
+
+    substr($$bufref, $address + 6, 2) = $bincrc;
+}
+
+# parse command line
+if (scalar(@ARGV) != 4) {
+    say "Usage: $0 <filename> <length> <signature> <version>";
+    exit 1;
+}
+
+my $filename = shift;
+my $length   = shift;
+my $devid    = hex shift;
+my $version  = hex shift;
+
+if ($length =~ /^0/) {
+    $length = oct $length;
+} else {
+    $length = 0+$length;
+}
+
+if (! -e $filename) {
+    say STDERR "ERROR: Input file >$filename< does not exist";
+    exit 2;
+}
+
+if (-s $filename > $length) {
+    say STDERR "ERROR: Input file is longer than specified length";
+    exit 2;
+}
+
+# read file into buffer
+my $buffer;
+
+open IN,"<",$filename or die "Can't open $filename: $!";
+binmode IN;
+read IN, $buffer, (-s $filename) or die "Error reading file: $!";
+close IN;
+
+# pad up to specified length
+if (length($buffer) < $length) {
+    $buffer .= chr(0xff)x($length - length($buffer));
+}
+
+# update bootinfo blocks
+foreach my $addr (@BOOTINFO_OFFSETS) {
+    update_bootinfo(\$buffer, $addr, $devid, $version);
+}
+
+# calculate CRC over the updated data
+my $crc = 0xffff;
+
+for (my $i = $MAIN_PROGRAM_OFFSET; $i < $length; $i++) {
+    $crc = crc_ccitt_update($crc, substr($buffer, $i, 1));
+}
+
+# insert CRCs
+foreach my $addr (@BOOTINFO_OFFSETS) {
+    update_crc(\$buffer, $addr, $crc);
+}
+
+# write new file
+open OUT,">",$filename or die "Can't open $filename for writing: $!";
+binmode OUT;
+print OUT $buffer;
+close OUT;
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/lpc17xx/lpc1768.ld b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/lpc17xx/lpc1768.ld
new file mode 100644
index 00000000..466f1c41
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/lpc17xx/lpc1768.ld
@@ -0,0 +1,149 @@
+/* Linker script for LPC1768
+ *
+ * Written 2010 by Ingo Korb
+ *
+ * Partially based on the linker scripts of avr-libc
+ */
+
+OUTPUT_FORMAT(elf32-littlearm)
+ENTRY(_start)
+
+MEMORY
+{
+  boot   (rx)  : ORIGIN = 0x00000000, LENGTH = 16K
+  flash  (rx)  : ORIGIN = 0x00004000, LENGTH = 496K
+  ram    (rwx) : ORIGIN = 0x10000000, LENGTH = 32K
+  ahbram (rwx) : ORIGIN = 0x2007C000, LENGTH = 32K
+  eeprom (rw)  : ORIGIN = 0x80000000, LENGTH = 64K /* hack ;) */
+}
+
+SECTIONS
+{
+  /* provide some dummy data so the binary can be flashed directly without bootloader */
+  .boot :
+  {
+    KEEP(*(.bootvectors))
+    . = 0x100;
+    KEEP(*(.bootinfo))    /* info block for the on-disk firmware */
+    KEEP(*(.boottrampoline))
+  } > boot
+
+  .text :
+  {
+    KEEP(*(.vectors))
+    . = 0x100;
+    KEEP(*(.mainbootinfo)) /* info block for the flashed firmware */
+    KEEP(*(.init))
+    *(.text)
+    *(.text.*)
+    *(.gnu.linkonce.t.*)
+
+    /* C++ con-/destructors */
+    __ctors_start = . ;
+    *(.ctors)
+    __ctors_end = . ;
+    __dtors_start = . ;
+    *(.dtors)
+    __dtors_end = . ;
+    KEEP(SORT(*)(.ctors))
+    KEEP(SORT(*)(.dtors))
+
+    KEEP(*(.fini))
+
+    __text_end = .;
+  } > flash
+
+  /* .ARM.exidx is sorted, so has to go in its own output section.  */
+  __exidx_start = .;
+  .ARM.exidx :
+  {
+    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+  } >flash
+  __exidx_end = .;
+
+  /* read-only data section */
+  .rodata : AT (ALIGN(__exidx_end,4))
+  {
+    *(.rodata)
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    __rodata_end = .;
+  } > flash
+
+  /* Data section */
+  .data : AT (ALIGN(__rodata_end,4))
+  {
+    __data_start = .;
+    *(.data)
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    __data_end = .;
+  } > ram
+
+  /* Addresses of in-rom data section */
+  __data_load_start = LOADADDR(.data);
+  __data_load_end   = __data_load_start + SIZEOF(.data);
+
+  . = ALIGN(4);
+
+  /* BSS */
+  .bss :
+  {
+    __bss_start__ = .;
+    *(.bss)
+    *(.bss.*)
+    *(COMMON)
+    __bss_end__ = .;
+  } > ram
+
+  /* second BSS in AHB ram */
+  .ahbram (NOLOAD) :
+  {
+    __ahbram_start__ = .;
+    *(.ahbram)
+    *(.ahbram.*)
+    __ahbram_end__ = .;
+  } > ahbram
+
+  __heap_start = ALIGN(__bss_end__, 4);
+
+  /* Default stack starts at end of ram */
+  PROVIDE(__stack = ORIGIN(ram) + LENGTH(ram)) ;
+
+  .eeprom (NOLOAD) :
+  {
+    *(.eeprom)
+    *(.eeprom.*)
+  } > eeprom
+
+  /* Everyone seems to copy the stuff below straight from somewhere else, so I'll do that too */
+
+  /* Stabs debugging sections.  */
+  .stab 0 : { *(.stab) }
+  .stabstr 0 : { *(.stabstr) }
+  .stab.excl 0 : { *(.stab.excl) }
+  .stab.exclstr 0 : { *(.stab.exclstr) }
+  .stab.index 0 : { *(.stab.index) }
+  .stab.indexstr 0 : { *(.stab.indexstr) }
+  .comment 0 : { *(.comment) }
+  /* DWARF debug sections.
+     Symbols in the DWARF debugging sections are relative to the beginning
+     of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info) *(.gnu.linkonce.wi.*) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) }
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) }
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/lpc17xx/lpc_checksum.pl b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/lpc17xx/lpc_checksum.pl
new file mode 100644
index 00000000..155e1be3
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/lpc17xx/lpc_checksum.pl
@@ -0,0 +1,30 @@
+#!/usr/bin/perl -w
+
+use strict;
+
+if (scalar(@ARGV) != 1) {
+    print "Usage: $0 binfile\n";
+    exit 1;
+}
+
+open FD,"+<",$ARGV[0] or die "Can't open $ARGV[0]: $!";
+
+my $buffer;
+if (sysread(FD, $buffer, 4*7) != 4*7) {
+    die "Short read from file: $!";
+}
+
+my @vecs = unpack("V*", $buffer);
+my $checksum = 0;
+
+while (scalar(@vecs) > 0) {
+    $checksum += pop(@vecs);
+}
+
+$checksum = (-$checksum) & 0xffffffff;
+
+if (syswrite(FD, pack("V", $checksum), 4) != 4) {
+    die "Short write to file: $!";
+}
+
+close FD;
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/lpc17xx/targets.mk b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/lpc17xx/targets.mk
new file mode 100644
index 00000000..bacd40fe
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/lpc17xx/targets.mk
@@ -0,0 +1,41 @@
+# architecture-dependent additional targets and manual dependencies
+
+# A little helper target for the maintainer =)
+copy:
+	cp $(TARGET).bin /mbed
+
+bin:
+	$(E) "  CHKSUM $(TARGET).bin"
+	$(Q)scripts/lpc17xx/lpc_checksum.pl $(TARGET).bin
+
+program: bin
+	$(E) "  FLASH  $(TARGET).bin"
+	$(Q)openocd -f .openocd-lpc.cfg -c init -c "flash_bin $(TARGET).bin" -c shutdown
+
+# example cfg file for program target:
+#    set CCLK 100000
+#    source [find interface/openocd-usb.cfg]
+#    source [find target/lpc1768.cfg]
+#
+#    jtag_khz 1000
+#
+#    proc wdtreset {} {
+#        mww 0x40000004 0x100
+#        mww 0x40000010 0x80000000
+#        mww 0x40000000 3
+#        mww 0x40000008 0xaa
+#        mww 0x40000008 0x55
+#    }
+#
+#    proc flash_bin { fname } {
+#        halt
+#        wait_halt
+#        flash write_image erase unlock $fname
+#        sleep 200
+#        wdtreset
+#    }
+
+# Manual dependencies for the bootinfo include
+$(OBJDIR)/src/lpc17xx/startup.o: src/lpc17xx/bootinfo.S
+
+$(OBJDIR)/src/lpc17xx/pseudoboot.o: src/lpc17xx/bootinfo.S
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/lpc17xx/variables.mk b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/lpc17xx/variables.mk
new file mode 100644
index 00000000..78a95bdc
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/lpc17xx/variables.mk
@@ -0,0 +1,40 @@
+# architecture-dependent variables
+
+#---------------- Source code ----------------
+ASMSRC = lpc17xx/pseudoboot.S lpc17xx/startup.S lpc17xx/crc.S
+
+SRC += lpc17xx/fastloader-ll.c lpc17xx/iec-bus.c
+
+ifeq ($(CONFIG_UART_DEBUG),y)
+  SRC += lpc17xx/printf.c
+endif
+
+# Various RTC implementations
+ifeq ($(CONFIG_RTC_LPC17XX),y)
+  SRC += rtc.c lpc17xx/rtc_lpc17xx.c
+endif
+
+# I2C is always needed for the config EEPROM
+NEED_I2C := y
+SRC += lpc17xx/i2c_lpc17xx.c lpc17xx/arch-eeprom.c
+
+#---------------- Toolchain ----------------
+CC = arm-none-eabi-gcc
+OBJCOPY = arm-none-eabi-objcopy
+OBJDUMP = arm-none-eabi-objdump
+SIZE = arm-none-eabi-size
+NM = arm-none-eabi-nm
+
+
+#---------------- Bootloader ----------------
+BINARY_LENGTH = 0x80000
+CRCGEN        = scripts/lpc17xx/crcgen-lpc.pl
+
+
+#---------------- Architecture variables ----------------
+ARCH_CFLAGS  = -mthumb -mcpu=cortex-m3 -nostartfiles
+ARCH_ASFLAGS = -mthumb -mcpu=cortex-m3
+ARCH_LDFLAGS = -Tscripts/lpc17xx/$(CONFIG_MCU).ld
+
+#---------------- Config ----------------
+# currently no stack tracking supported
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/src2doxy.pl b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/src2doxy.pl
new file mode 100644
index 00000000..466a6ab3
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/scripts/src2doxy.pl
@@ -0,0 +1,75 @@
+#!/usr/bin/perl -w -i~
+
+# src2doxy.pl - create doxygen-compatible comments from readable C source
+# Copyright (C) 2008  Ingo Korb <ingo@akana.de>
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License only.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+# This script parses a subset of kernel-doc style comments and rewrites
+# them as something doxygen will understand.
+use strict;
+
+my $incomment = 0;
+my $inspecialcomment = 0;
+my @postcomment = ();
+my @outputstack;
+
+while (<>) {
+    my $filename;
+    ($filename = $ARGV) =~ s!.*/!!;
+
+    chomp;
+    s/\r$//;
+    s/\s+$//;
+
+    # doxygen is too stupid to understand after-the-variable comments
+    # without external help. WARNING: Will substitute within strings!
+    s!([^ \t]\s+)/// !$1///< !;
+    
+    $incomment = 1 if m!^/\*!;
+    if (m!^/\*\*$!) {
+        $inspecialcomment = 1;
+        # Kill output
+        $_ = "";
+        next;
+    }
+
+    if ($incomment) {
+        if (m!\*/$!) {
+            # End of comment
+            $incomment = 0;
+            $inspecialcomment = 0;
+            @outputstack = @postcomment;
+            @postcomment = ();
+        } elsif (/$filename:\s+(.*).?\s*$/) {
+            # Add file description
+            push @postcomment, "\n/*! \\file $ARGV\n * \\brief $1. */\n";
+        }
+        if ($inspecialcomment == 1) {
+            # First line of special comment: Brief description
+            $inspecialcomment = 2;
+            m/^\s*\*\s*((struct |union )?[^: \t]+):?\s+-?\s*(.*)\s*$/;
+            $_ = "/*! \\brief $3\n *";
+        } elsif ($inspecialcomment == 2) {
+            # Modify parameters
+            s/\@([^: \t]+)\s*:\s+(.*)\s*$/\\param $1 $2/;
+        }
+    }
+} continue {
+    print "$_\n";
+    while (scalar(@outputstack)) {
+        print shift @outputstack,"\n";
+    }
+}
+
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ata.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ata.h
new file mode 100644
index 00000000..d25fb1dc
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ata.h
@@ -0,0 +1,82 @@
+#ifndef ATA_H_
+#define ATA_H_
+
+/* ATA command */
+#define ATA_CMD_RESET        0x08 /* DEVICE RESET */
+#define ATA_CMD_READ         0x20 /* READ SECTOR(S) */
+#define ATA_CMD_WRITE        0x30 /* WRITE SECTOR(S) */
+#define ATA_CMD_IDENTIFY     0xec /* DEVICE IDENTIFY */
+#define ATA_CMD_SETFEATURES  0xef /* SET FEATURES */
+#define ATA_CMD_SPINDOWN     0xe0
+#define ATA_CMD_SPINUP       0xe1
+#define ATA_CMD_READ_EXT     0x24
+#define ATA_CMD_WRITE_EXT    0x34
+
+/* ATA register bit definitions */
+#define ATA_LBA3_LBA         0x40
+
+#define ATA_STATUS_BSY       0x80
+#define ATA_STATUS_DRDY      0x40
+#define ATA_STATUS_DRQ       0x08
+#define ATA_STATUS_ERR       0x01
+
+#define ATA_DEVCTRL_SRST     0x40
+#define ATA_DEVCTRL_NIEN     0x20
+
+/* Control Ports */
+#define ATA_PORT_CTRL_OUT    PORTF
+#define ATA_PORT_CTRL_DDR    DDRF
+#define ATA_PORT_DATA_HI_OUT PORTC
+#define ATA_PORT_DATA_HI_DDR DDRC
+#define ATA_PORT_DATA_HI_IN  PINC
+#define ATA_PORT_DATA_LO_OUT PORTA
+#define ATA_PORT_DATA_LO_DDR DDRA
+#define ATA_PORT_DATA_LO_IN  PINA
+
+/* Bit definitions for Control Port */
+
+#define ATA_PIN_RESET        (1<<PIN5)
+#define ATA_PIN_WR           (1<<PIN7)
+#define ATA_PIN_RD           (1<<PIN6)
+#define ATA_PIN_A0           (1<<PIN2)
+#define ATA_PIN_A1           (1<<PIN3)
+#define ATA_PIN_A2           (1<<PIN4)
+#define ATA_PIN_CS0          (1<<PIN0)
+#define ATA_PIN_CS1          (1<<PIN1)
+
+#define ATA_REG_BASE         (ATA_PIN_RD | ATA_PIN_WR | ATA_PIN_RESET)
+#define ATA_REG_DATA             (ATA_REG_BASE | ATA_PIN_CS1)
+
+#define ATA_REG_ERROR        (ATA_REG_BASE | ATA_PIN_CS1 | ATA_PIN_A0)
+#define ATA_REG_FEATURES     ATA_REG_ERROR
+#define ATA_REG_COUNT        (ATA_REG_BASE | ATA_PIN_CS1 | ATA_PIN_A1)
+#define ATA_REG_LBA0         (ATA_REG_BASE | ATA_PIN_CS1 | ATA_PIN_A1 | ATA_PIN_A0)
+#define ATA_REG_LBA1         (ATA_REG_BASE | ATA_PIN_CS1 | ATA_PIN_A2)
+#define ATA_REG_LBA2         (ATA_REG_BASE | ATA_PIN_CS1 | ATA_PIN_A2 | ATA_PIN_A0)
+#define ATA_REG_LBA3         (ATA_REG_BASE | ATA_PIN_CS1 | ATA_PIN_A2 | ATA_PIN_A1)
+#define ATA_REG_STATUS       (ATA_REG_BASE | ATA_PIN_CS1 | ATA_PIN_A2 | ATA_PIN_A1 | ATA_PIN_A0)
+#define ATA_REG_CMD          ATA_REG_STATUS
+#define ATA_REG_ALTSTAT      (ATA_REG_BASE | ATA_PIN_CS0 | ATA_PIN_A2 | ATA_PIN_A1)
+#define ATA_REG_DEVCTRL      (ATA_REG_BASE | ATA_PIN_CS0 | ATA_PIN_A2 | ATA_PIN_A1 | ATA_PIN_A0)
+
+#define ATA_DEV_MASTER       0x00
+#define ATA_DEV_SLAVE        0x10
+
+#define STA_48BIT            0x08
+#define STA_FIRSTTIME        0x80
+
+#define RESET_DELAY          100   /* ms to hold RESET line low to init CF and IDE */
+
+/* These functions are weak-aliased to disk_... */
+void ata_init(void);
+DSTATUS ata_initialize (BYTE drv);
+DSTATUS ata_status (BYTE drv);
+DRESULT ata_read (BYTE drv, BYTE *data, DWORD sector, BYTE count);
+DRESULT ata_write (BYTE drv, const BYTE *data, DWORD sector, BYTE count);
+#if _USE_IOCTL != 0
+DRESULT ata_ioctl (BYTE drv, BYTE ctrl, void *buff);
+#endif
+DRESULT ata_getinfo(BYTE drv, BYTE page, void *buffer);
+
+
+#endif /*ATA_H_*/
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/arch-config.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/arch-config.h
new file mode 100644
index 00000000..60797196
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/arch-config.h
@@ -0,0 +1,1393 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   arch-config.h: The main architecture-specific config header
+
+*/
+
+#ifndef ARCH_CONFIG_H
+#define ARCH_CONFIG_H
+
+#include <avr/io.h>
+#include <avr/interrupt.h>
+/* Include avrcompat.h to get the PA0..PD7 macros on 1284P */
+#include "avrcompat.h"
+
+/* ----- Common definitions for all AVR hardware variants ------ */
+
+/* Return value of buttons_read() */
+typedef uint8_t rawbutton_t;
+
+/* Interrupt handler for system tick */
+#define SYSTEM_TICK_HANDLER ISR(TIMER1_COMPA_vect)
+
+/* EEPROMFS: offset and size must be multiples of 4 */
+/* to actually enable it, CONFIG_HAVE_EEPROMFS must be set in config */
+#  define EEPROMFS_OFFSET     512
+#  define EEPROMFS_SIZE       3584
+#  define EEPROMFS_ENTRIES    8
+#  define EEPROMFS_SECTORSIZE 64
+
+
+#if CONFIG_HARDWARE_VARIANT==1
+/* ---------- Hardware configuration: Example ---------- */
+/* This is a commented example for most of the available options    */
+/* in case someone wants to build Yet Another[tm] hardware variant. */
+/* Some of the values are chosen randomly, so this variant is not   */
+/* expected to compile successfully.                                */
+
+/*** SD card support ***/
+/* If your device supports SD cards by default, define this symbol. */
+#  define HAVE_SD
+
+/* Declaration of the interrupt handler for SD card change */
+#  define SD_CHANGE_HANDLER ISR(INT0_vect)
+
+/* Declaration of the interrupt handler for SD card 2 change */
+#  define SD2_CHANGE_HANDLER ISR(INT9_vect)
+
+/* Initialize all pins and interrupts related to SD - except SPI */
+static inline void sdcard_interface_init(void) {
+  /* card detect (SD1) */
+  DDRD  &= ~_BV(PD2);
+  PORTD |=  _BV(PD2);
+  /* write protect (SD1) */
+  DDRD &= ~_BV(PD6);
+  PORTD |= _BV(PD6);
+  /* card change interrupt (SD1) */
+  EICRA |= _BV(ISC00);
+  EIMSK |= _BV(INT0);
+  // Note: Wrapping SD2 in CONFIG_TWINSD may be a good idea
+  /* chip select (SD2) */
+  PORTD |= _BV(PD4);
+  DDRD |= _BV(PD4);
+  /* card detect (SD2) */
+  DDRD &= ~_BV(PD3);
+  PORTD |= _BV(PD3);
+  /* write protect (SD2) */
+  DDRD &= ~_BV(PD7);
+  PORTD |= _BV(PD7);
+  /* card change interrupt (SD2) */
+  EICRA |=  _BV(ISC90); // Change interrupt
+  EIMSK |=  _BV(INT9);  // Change interrupt
+}
+
+/* sdcard_detect() must return non-zero while a card is inserted */
+/* This must be a pin capable of generating interrupts.          */
+static inline uint8_t sdcard_detect(void) {
+  return !(PIND & _BV(PD2));
+}
+
+/* Returns non-zero when the currently inserted card is write-protected */
+static inline uint8_t sdcard_wp(void) {
+  return PIND & _BV(PD6);
+}
+
+/* Support for a second SD card - use CONFIG_TWINSD=y in your config file to enable! */
+/* Same as the two functions above, but for card 2 */
+static inline uint8_t sdcard2_detect(void) {
+  return !(PIND & _BV(PD3));
+}
+static inline uint8_t sdcard2_wp(void) {
+  return PIND & _BV(PD7);
+}
+
+/* SD card 1 is assumed to use the standard SS pin   */
+/* If that's not true, #define SDCARD_SS_SPECIAL and */
+/* implement this function:                          */
+//static inline __attribute__((always_inline)) void sdcard_set_ss(uint8_t state) {
+//  if (state)
+//    PORTZ |= _BV(PZ9);
+//  else
+//    PORTZ &= ~_BV(PZ9);
+//}
+
+/* SD card 2 CS pin */
+static inline __attribute__((always_inline)) void sdcard2_set_ss(uint8_t state) {
+  if (state)
+    PORTD |= _BV(PD4);
+  else
+    PORTD &= ~_BV(PD4);
+}
+
+/* SD Card supply voltage - choose the one appropiate to your board */
+/* #  define SD_SUPPLY_VOLTAGE (1L<<15)  / * 2.7V - 2.8V */
+/* #  define SD_SUPPLY_VOLTAGE (1L<<16)  / * 2.8V - 2.9V */
+/* #  define SD_SUPPLY_VOLTAGE (1L<<17)  / * 2.9V - 3.0V */
+#  define SD_SUPPLY_VOLTAGE (1L<<18)  /* 3.0V - 3.1V */
+/* #  define SD_SUPPLY_VOLTAGE (1L<<19)  / * 3.1V - 3.2V */
+/* #  define SD_SUPPLY_VOLTAGE (1L<<20)  / * 3.2V - 3.3V */
+/* #  define SD_SUPPLY_VOLTAGE (1L<<21)  / * 3.3V - 3.4V */
+/* #  define SD_SUPPLY_VOLTAGE (1L<<22)  / * 3.4V - 3.5V */
+/* #  define SD_SUPPLY_VOLTAGE (1L<<23)  / * 3.5V - 3.6V */
+
+/* SPI clock divisors - the slow one must be 400KHz or slower,        */
+/* the fast one can be as high as you thing your hardware will handle */
+#  define SPI_DIVISOR_SLOW 32
+#  define SPI_DIVISOR_FAST 4
+
+
+/*** Device address selection ***/
+/* device_hw_address() returns the hardware-selected device address */
+static inline uint8_t device_hw_address(void) {
+  return 8 + !(PIND & _BV(PD7)) + 2*!(PIND & _BV(PD5));
+}
+
+/* Configure hardware device address pins */
+static inline void device_hw_address_init(void) {
+  DDRD  &= ~(_BV(PD7) | _BV(PD5));
+  PORTD |=   _BV(PD7) | _BV(PD5);
+}
+
+
+/*** LEDs ***/
+/* Please don't build single-LED hardware anymore... */
+
+/* Initialize ports for all LEDs */
+static inline void leds_init(void) {
+  /* Note: Depending on the chip and register these lines can compile */
+  /*       to one instruction each on AVR. For two bits this is one   */
+  /*       instruction shorter than "DDRC |= _BV(PC0) | _BV(PC1);"    */
+  DDRC |= _BV(PC0);
+  DDRC |= _BV(PC1);
+}
+
+/* --- "BUSY" led, recommended color: green (usage similiar to 1541 LED) --- */
+static inline __attribute__((always_inline)) void set_busy_led(uint8_t state) {
+  if (state)
+    PORTC |= _BV(PC0);
+  else
+    PORTC &= ~_BV(PC0);
+}
+
+/* --- "DIRTY" led, recommended color: red (errors, unwritten data in memory) --- */
+static inline __attribute__((always_inline)) void set_dirty_led(uint8_t state) {
+  if (state)
+    PORTC |= _BV(PC1);
+  else
+    PORTC &= ~_BV(PC1);
+}
+
+/* Toggle function used for error blinking */
+static inline void toggle_dirty_led(void) {
+  /* Sufficiently new AVR cores have a toggle function */
+  PINC |= _BV(PC1);
+}
+
+
+/*** IEC signals ***/
+#  define IEC_INPUT PINA
+#  define IEC_DDR   DDRA
+#  define IEC_PORT  PORTA
+
+/* Pins assigned for the IEC lines */
+#  define IEC_PIN_ATN   PA0
+#  define IEC_PIN_DATA  PA1
+#  define IEC_PIN_CLOCK PA2
+#  define IEC_PIN_SRQ   PA3
+
+/* Use separate input/output lines?                                    */
+/* The code assumes that the input is NOT inverted, but the output is. */
+//#  define IEC_SEPARATE_OUT
+//#  define IEC_OPIN_ATN   PA4
+//#  define IEC_OPIN_DATA  PA5
+//#  define IEC_OPIN_CLOCK PA6
+//#  define IEC_OPIN_SRQ   PA7
+
+/* You can use different ports for input and output bits. The code tries */
+/* to not stomp on the unused bits. IEC output is on IEC_PORT.           */
+/* Not well-tested yet.                                                  */
+//#  define IEC_DDRIN      DDRX
+//#  define IEC_DDROUT     DDRY
+//#  define IEC_PORTIN     PORTX
+
+/* ATN interrupt (required) */
+#  define IEC_ATN_INT_VECT    PCINT0_vect
+static inline void iec_interrupts_init(void) {
+  PCMSK0 = _BV(PCINT0);
+  PCIFR |= _BV(PCIF0);
+}
+
+/* CLK interrupt (not required) */
+/* Dreamload requires interrupts for both the ATN and CLK lines. If both are served by */
+/* the same PCINT vector, define that as ATN interrupt above and define IEC_PCMSK.     */
+//#  define IEC_PCMSK             PCMSK0
+/* If the CLK line has its own dedicated interrupt, use the following definitions: */
+//#  define IEC_CLK_INT           INT5
+//#  define IEC_CLK_INT_VECT      INT5_vect
+//static inline void iec_clock_int_setup(void) {
+//  EICRB |= _BV(ISC50);
+//}
+
+
+/*** IEEE signals ***/
+/* not documented yet, look at petSD/XS-1541 for guidance */
+
+/*** User interface ***/
+/* Button NEXT changes to the next disk image and enables sleep mode (held) */
+#  define BUTTON_NEXT _BV(PC4)
+
+/* Button PREV changes to the previous disk image */
+#  define BUTTON_PREV _BV(PC3)
+
+/* Read the raw button state - a depressed button should read as 0 */
+static inline rawbutton_t buttons_read(void) {
+  return PINC & (BUTTON_NEXT | BUTTON_PREV);
+}
+
+static inline void buttons_init(void) {
+  DDRC  &= (uint8_t)~(BUTTON_NEXT | BUTTON_PREV);
+  PORTC |= BUTTON_NEXT | BUTTON_PREV;
+}
+
+/* Software I2C lines for the RTC and display */
+#  define SOFTI2C_PORT    PORTC
+#  define SOFTI2C_PIN     PINC
+#  define SOFTI2C_DDR     DDRC
+#  define SOFTI2C_BIT_SCL PC4
+#  define SOFTI2C_BIT_SDA PC5
+#  define SOFTI2C_DELAY   6
+
+
+/*** board-specific initialisation ***/
+/* Currently used on uIEC/CF and uIEC/SD only */
+//#define HAVE_BOARD_INIT
+//static inline void board_init(void) {
+//  // turn on power LED
+//  DDRG  |= _BV(PG1);
+//  PORTG |= _BV(PG1);
+//}
+
+
+/* Pre-configurated hardware variants */
+
+#elif CONFIG_HARDWARE_VARIANT==2
+/* ---------- Hardware configuration: Shadowolf 1 ---------- */
+#  define HAVE_SD
+#  define SD_CHANGE_HANDLER     ISR(INT0_vect)
+#  define SD_SUPPLY_VOLTAGE     (1L<<18)
+
+/* 250kHz slow, 2MHz fast */
+#  define SPI_DIVISOR_SLOW 32
+#  define SPI_DIVISOR_FAST 4
+
+static inline void sdcard_interface_init(void) {
+  DDRD &= ~_BV(PD2);
+  PORTD |= _BV(PD2);
+  DDRD &= ~_BV(PD6);
+  PORTD |= _BV(PD6);
+  EICRA |= _BV(ISC00);
+  EIMSK |= _BV(INT0);
+}
+
+static inline uint8_t sdcard_detect(void) {
+  return !(PIND & _BV(PD2));
+}
+
+static inline uint8_t sdcard_wp(void) {
+  return PIND & _BV(PD6);
+}
+
+static inline uint8_t device_hw_address(void) {
+  return 8 + !(PIND & _BV(PD7)) + 2*!(PIND & _BV(PD5));
+}
+
+static inline void device_hw_address_init(void) {
+  DDRD  &= ~(_BV(PD7)|_BV(PD5));
+  PORTD |=   _BV(PD7)|_BV(PD5);
+}
+
+static inline void leds_init(void) {
+  DDRC |= _BV(PC0);
+  DDRC |= _BV(PC1);
+}
+
+static inline __attribute__((always_inline)) void set_busy_led(uint8_t state) {
+  if (state)
+    PORTC |= _BV(PC0);
+  else
+    PORTC &= ~_BV(PC0);
+}
+
+static inline __attribute__((always_inline)) void set_dirty_led(uint8_t state) {
+  if (state)
+    PORTC |= _BV(PC1);
+  else
+    PORTC &= ~_BV(PC1);
+}
+
+static inline void toggle_dirty_led(void) {
+  PINC |= _BV(PC1);
+}
+
+#  define IEC_INPUT             PINA
+#  define IEC_DDR               DDRA
+#  define IEC_PORT              PORTA
+#  define IEC_PIN_ATN           PA0
+#  define IEC_PIN_DATA          PA1
+#  define IEC_PIN_CLOCK         PA2
+#  define IEC_PIN_SRQ           PA3
+#  define IEC_ATN_INT_VECT      PCINT0_vect
+#  define IEC_PCMSK             PCMSK0
+
+static inline void iec_interrupts_init(void) {
+  PCICR |= _BV(PCIE0);
+  PCIFR |= _BV(PCIF0);
+}
+
+#  define BUTTON_NEXT           _BV(PC4)
+#  define BUTTON_PREV           _BV(PC3)
+
+static inline rawbutton_t buttons_read(void) {
+  return PINC & (BUTTON_NEXT | BUTTON_PREV);
+}
+
+static inline void buttons_init(void) {
+  DDRC  &= (uint8_t)~(BUTTON_NEXT | BUTTON_PREV);
+  PORTC |= BUTTON_NEXT | BUTTON_PREV;
+}
+
+
+#elif CONFIG_HARDWARE_VARIANT == 3
+/* ---------- Hardware configuration: LarsP ---------- */
+#  define HAVE_SD
+#  define SD_CHANGE_HANDLER     ISR(INT0_vect)
+#  define SD_SUPPLY_VOLTAGE     (1L<<21)
+
+#  define SPI_DIVISOR_SLOW 32
+#  define SPI_DIVISOR_FAST 4
+
+static inline void sdcard_interface_init(void) {
+  DDRD  &= ~_BV(PD2);
+  PORTD |=  _BV(PD2);
+  DDRD  &= ~_BV(PD6);
+  PORTD |=  _BV(PD6);
+  EICRA |=  _BV(ISC00);
+  EIMSK |=  _BV(INT0);
+}
+
+static inline uint8_t sdcard_detect(void) {
+  return !(PIND & _BV(PD2));
+}
+
+static inline uint8_t sdcard_wp(void) {
+  return PIND & _BV(PD6);
+}
+
+static inline uint8_t device_hw_address(void) {
+  return 8 + !(PINA & _BV(PA2)) + 2*!(PINA & _BV(PA3));
+}
+
+static inline void device_hw_address_init(void) {
+  DDRA  &= ~(_BV(PA2)|_BV(PA3));
+  PORTA |=   _BV(PA2)|_BV(PA3);
+}
+
+static inline void leds_init(void) {
+  DDRA |= _BV(PA0);
+  DDRA |= _BV(PA1);
+}
+
+static inline __attribute__((always_inline)) void set_busy_led(uint8_t state) {
+  if (state)
+    PORTA &= ~_BV(PA0);
+  else
+    PORTA |= _BV(PA0);
+}
+
+static inline __attribute__((always_inline)) void set_dirty_led(uint8_t state) {
+  if (state)
+    PORTA &= ~_BV(PA1);
+  else
+    PORTA |= _BV(PA1);
+}
+
+static inline void toggle_dirty_led(void) {
+  PINA |= _BV(PA1);
+}
+
+#  define IEC_INPUT             PINC
+#  define IEC_DDR               DDRC
+#  define IEC_PORT              PORTC
+#  define IEC_PIN_ATN           PC0
+#  define IEC_PIN_DATA          PC1
+#  define IEC_PIN_CLOCK         PC2
+#  define IEC_PIN_SRQ           PC3
+#  define IEC_ATN_INT_VECT      PCINT2_vect
+#  define IEC_PCMSK             PCMSK2
+
+static inline void iec_interrupts_init(void) {
+  PCICR |= _BV(PCIE2);
+  PCIFR |= _BV(PCIF2);
+}
+
+#  define BUTTON_NEXT           _BV(PA4)
+#  define BUTTON_PREV           _BV(PA5)
+
+static inline rawbutton_t buttons_read(void) {
+  return PINA & (BUTTON_NEXT | BUTTON_PREV);
+}
+
+static inline void buttons_init(void) {
+  DDRA  &= (uint8_t)~(BUTTON_NEXT | BUTTON_PREV);
+  PORTA |= BUTTON_NEXT | BUTTON_PREV;
+}
+
+#  define SOFTI2C_PORT          PORTC
+#  define SOFTI2C_PIN           PINC
+#  define SOFTI2C_DDR           DDRC
+#  define SOFTI2C_BIT_SCL       PC6
+#  define SOFTI2C_BIT_SDA       PC5
+#  define SOFTI2C_BIT_INTRQ     PC7
+#  define SOFTI2C_DELAY         6
+
+
+#elif CONFIG_HARDWARE_VARIANT == 4
+/* ---------- Hardware configuration: uIEC ---------- */
+/* Note: This CONFIG_HARDWARE_VARIANT number is tested in system.c */
+#  define HAVE_ATA
+#  ifndef CONFIG_NO_SD
+#    define HAVE_SD
+#  endif
+#  define SPI_LATE_INIT
+#  define CF_CHANGE_HANDLER     ISR(INT7_vect)
+#  define SD_CHANGE_HANDLER     ISR(PCINT0_vect)
+#  define SD_SUPPLY_VOLTAGE     (1L<<21)
+
+/* 250kHz slow, 2MHz fast */
+#  define SPI_DIVISOR_SLOW 32
+#  define SPI_DIVISOR_FAST 4
+
+#  define SINGLE_LED
+
+static inline void cfcard_interface_init(void) {
+  DDRE  &= ~_BV(PE7);
+  PORTE |=  _BV(PE7);
+  EICRB |=  _BV(ISC70);
+  EIMSK |=  _BV(INT7);
+}
+
+static inline uint8_t cfcard_detect(void) {
+  return !(PINE & _BV(PE7));
+}
+
+static inline void sdcard_interface_init(void) {
+  DDRB   &= ~_BV(PB7);
+  PORTB  |=  _BV(PB7);
+  DDRB   &= ~_BV(PB6);
+  PORTB  |=  _BV(PB6);
+  PCMSK0 |=  _BV(PCINT7);
+  PCICR  |=  _BV(PCIE0);
+  PCIFR  |=  _BV(PCIF0);
+}
+
+static inline uint8_t sdcard_detect(void) {
+  return !(PINB & _BV(PB7));
+}
+
+static inline uint8_t sdcard_wp(void) {
+  return PINB & _BV(PB6);
+}
+
+static inline uint8_t device_hw_address(void) {
+  /* No device jumpers on uIEC */
+  return 10;
+}
+
+static inline void device_hw_address_init(void) {
+  return;
+}
+
+static inline void leds_init(void) {
+  DDRE |= _BV(PE3);
+}
+
+static inline __attribute__((always_inline)) void set_led(uint8_t state) {
+  if (state)
+    PORTE |= _BV(PE3);
+  else
+    PORTE &= ~_BV(PE3);
+}
+
+static inline void toggle_led(void) {
+  PINE |= _BV(PE3);
+}
+
+#  define IEC_INPUT             PINE
+#  define IEC_DDR               DDRE
+#  define IEC_PORT              PORTE
+#  define IEC_PIN_ATN           PE6
+#  define IEC_PIN_DATA          PE4
+#  define IEC_PIN_CLOCK         PE5
+#  define IEC_PIN_SRQ           PE2
+#  define IEC_ATN_INT           INT6
+#  define IEC_ATN_INT_VECT      INT6_vect
+#  define IEC_CLK_INT           INT5
+#  define IEC_CLK_INT_VECT      INT5_vect
+
+static inline void iec_interrupts_init(void) {
+  EICRB |= _BV(ISC60);
+  EICRB |= _BV(ISC50);
+}
+
+#  define BUTTON_NEXT           _BV(PG4)
+#  define BUTTON_PREV           _BV(PG3)
+
+static inline rawbutton_t buttons_read(void) {
+  return PING & (BUTTON_NEXT | BUTTON_PREV);
+}
+
+static inline void buttons_init(void) {
+  DDRG  &= (uint8_t)~(BUTTON_NEXT | BUTTON_PREV);
+  PORTG |= BUTTON_NEXT | BUTTON_PREV;
+}
+
+#  define SOFTI2C_PORT          PORTD
+#  define SOFTI2C_PIN           PIND
+#  define SOFTI2C_DDR           DDRD
+#  define SOFTI2C_BIT_SCL       PD0
+#  define SOFTI2C_BIT_SDA       PD1
+#  define SOFTI2C_BIT_INTRQ     PD2
+#  define SOFTI2C_DELAY         6
+
+/* parallel cable - conflicts with the SOFTI2C pins above! */
+#  ifdef CONFIG_NO_SD
+#    define HAVE_PARALLEL
+#    define PARALLEL_HANDLER      ISR(PCINT0_vect)
+#    define PARALLEL_PDDR         DDRD      // CONN2 pins 1,3,...,15
+#    define PARALLEL_PPORT        PORTD
+#    define PARALLEL_PPIN         PIND
+#    define PARALLEL_HDDR         DDRB
+#    define PARALLEL_HPORT        PORTB
+#    define PARALLEL_HPIN         PINB
+#    define PARALLEL_HSK_OUT_BIT  5         // CONN2 pin 14, to C64 FLAG2
+#    define PARALLEL_HSK_IN_BIT   4         // CONN2 pin 16, to C64 PC2
+#    define PARALLEL_PCMSK        PCMSK0
+#    define PARALLEL_PCINT_GROUP  0
+#  elif defined(CONFIG_PARALLEL_DOLPHIN)
+#    error CONFIG_PARALLEL_DOLPHIN on uIEC requires CONFIG_NO_SD=y !
+#  endif
+
+/* Use diskmux code to optionally turn off second IDE drive */
+#  define NEED_DISKMUX
+
+#  define HAVE_BOARD_INIT
+
+static inline void board_init(void) {
+  /* Force control lines of the external SRAM high */
+  DDRG  = _BV(PG0) | _BV(PG1) | _BV(PG2);
+  PORTG = _BV(PG0) | _BV(PG1) | _BV(PG2);
+}
+
+
+#elif CONFIG_HARDWARE_VARIANT==5
+/* ---------- Hardware configuration: Shadowolf 2 aka sd2iec 1.x ---------- */
+#  define HAVE_SD
+#  define SD_CHANGE_HANDLER     ISR(INT0_vect)
+#  define SD2_CHANGE_HANDLER    ISR(INT2_vect)
+#  define SD_SUPPLY_VOLTAGE     (1L<<18)
+
+/* 250kHz slow, 2MHz fast */
+#  define SPI_DIVISOR_SLOW 32
+#  define SPI_DIVISOR_FAST 4
+
+static inline void sdcard_interface_init(void) {
+  DDRD  &= ~_BV(PD2);
+  PORTD |=  _BV(PD2);
+  DDRD  &= ~_BV(PD6);
+  PORTD |=  _BV(PD6);
+  EICRA |=  _BV(ISC00);
+  EIMSK |=  _BV(INT0);
+#ifdef CONFIG_TWINSD
+  PORTD |=  _BV(PD3); // CS
+  DDRD  |=  _BV(PD3); // CS
+  DDRC  &= ~_BV(PC7); // WP
+  PORTC |=  _BV(PC7); // WP
+  DDRB  &= ~_BV(PB2); // Detect
+  PORTB |=  _BV(PB2); // Detect
+  EICRA |=  _BV(ISC20); // Change interrupt
+  EIMSK |=  _BV(INT2);  // Change interrupt
+#endif
+}
+
+static inline uint8_t sdcard_detect(void) {
+  return !(PIND & _BV(PD2));
+}
+
+static inline uint8_t sdcard_wp(void) {
+  return PIND & _BV(PD6);
+}
+
+static inline uint8_t sdcard2_detect(void) {
+  return !(PINB & _BV(PB2));
+}
+
+static inline uint8_t sdcard2_wp(void) {
+  return PINC & _BV(PC7);
+}
+
+static inline __attribute__((always_inline)) void sdcard2_set_ss(uint8_t state) {
+  if (state)
+    PORTD |= _BV(PD3);
+  else
+    PORTD &= ~_BV(PD3);
+}
+
+static inline uint8_t device_hw_address(void) {
+  return 8 + !(PIND & _BV(PD7)) + 2*!(PIND & _BV(PD5));
+}
+
+static inline void device_hw_address_init(void) {
+  DDRD  &= ~(_BV(PD7)|_BV(PD5));
+  PORTD |=   _BV(PD7)|_BV(PD5);
+}
+
+static inline void leds_init(void) {
+  DDRC |= _BV(PC0);
+  DDRC |= _BV(PC1);
+}
+
+static inline __attribute__((always_inline)) void set_busy_led(uint8_t state) {
+  if (state)
+    PORTC |= _BV(PC0);
+  else
+    PORTC &= ~_BV(PC0);
+}
+
+static inline __attribute__((always_inline)) void set_dirty_led(uint8_t state) {
+  if (state)
+    PORTC |= _BV(PC1);
+  else
+    PORTC &= ~_BV(PC1);
+}
+
+static inline void toggle_dirty_led(void) {
+  PINC |= _BV(PC1);
+}
+
+#  define IEC_INPUT             PINA
+#  define IEC_DDR               DDRA
+#  define IEC_PORT              PORTA
+#  define IEC_PIN_ATN           PA0
+#  define IEC_PIN_DATA          PA1
+#  define IEC_PIN_CLOCK         PA2
+#  define IEC_PIN_SRQ           PA3
+#  define IEC_SEPARATE_OUT
+#  define IEC_OPIN_ATN          PA4
+#  define IEC_OPIN_DATA         PA5
+#  define IEC_OPIN_CLOCK        PA6
+#  define IEC_OPIN_SRQ          PA7
+#  define IEC_ATN_INT_VECT      PCINT0_vect
+#  define IEC_PCMSK             PCMSK0
+
+static inline void iec_interrupts_init(void) {
+  PCICR |= _BV(PCIE0);
+  PCIFR |= _BV(PCIF0);
+}
+
+#  define BUTTON_NEXT           _BV(PC3)
+#  define BUTTON_PREV           _BV(PC2)
+
+static inline rawbutton_t buttons_read(void) {
+  return PINC & (BUTTON_NEXT | BUTTON_PREV);
+}
+
+static inline void buttons_init(void) {
+  DDRC  &= (uint8_t)~(BUTTON_NEXT | BUTTON_PREV);
+  PORTC |= BUTTON_NEXT | BUTTON_PREV;
+}
+
+#  define SOFTI2C_PORT          PORTC
+#  define SOFTI2C_PIN           PINC
+#  define SOFTI2C_DDR           DDRC
+#  define SOFTI2C_BIT_SCL       PC4
+#  define SOFTI2C_BIT_SDA       PC5
+#  define SOFTI2C_BIT_INTRQ     PC6
+#  define SOFTI2C_DELAY         6
+
+
+/* Hardware configuration 6 was old NKC MMC2IEC */
+
+
+#elif CONFIG_HARDWARE_VARIANT == 7
+/* ---------- Hardware configuration: uIEC v3 ---------- */
+#  define HAVE_SD
+#  define SD_CHANGE_HANDLER     ISR(INT6_vect)
+#  define SD_SUPPLY_VOLTAGE     (1L<<21)
+
+/* 250kHz slow, 2MHz fast */
+#  define SPI_DIVISOR_SLOW 32
+#  define SPI_DIVISOR_FAST 4
+
+#  define SINGLE_LED
+
+static inline void sdcard_interface_init(void) {
+  DDRE  &= ~_BV(PE6);
+  PORTE |=  _BV(PE6);
+  DDRE  &= ~_BV(PE2);
+  PORTE |=  _BV(PE2);
+  EICRB |=  _BV(ISC60);
+  EIMSK |=  _BV(INT6);
+}
+
+static inline uint8_t sdcard_detect(void) {
+  return !(PINE & _BV(PE6));
+}
+
+static inline uint8_t sdcard_wp(void) {
+  return PINE & _BV(PE2);
+}
+
+static inline uint8_t device_hw_address(void) {
+  /* No device jumpers on uIEC */
+  return 10;
+}
+
+static inline void device_hw_address_init(void) {
+  return;
+}
+
+static inline void leds_init(void) {
+  DDRG |= _BV(PG0);
+}
+
+static inline __attribute__((always_inline)) void set_led(uint8_t state) {
+  if (state)
+    PORTG |= _BV(PG0);
+  else
+    PORTG &= ~_BV(PG0);
+}
+
+static inline void toggle_led(void) {
+  PING |= _BV(PG0);
+}
+
+#  define IEC_INPUT             PINB
+#  define IEC_DDRIN             DDRB
+#  define IEC_PORTIN            PORTB
+#  define IEC_PIN_ATN           PB4
+#  define IEC_PIN_DATA          PB5
+#  define IEC_PIN_CLOCK         PB6
+#  define IEC_PIN_SRQ           PB7
+#  define IEC_SEPARATE_OUT
+#  define IEC_PORT              PORTD
+#  define IEC_DDROUT            DDRD
+#  define IEC_OPIN_ATN          PD4
+#  define IEC_OPIN_DATA         PD5
+#  define IEC_OPIN_CLOCK        PD6
+#  define IEC_OPIN_SRQ          PD7
+#  define IEC_ATN_INT_VECT      PCINT0_vect
+#  define IEC_PCMSK             PCMSK0
+
+static inline void iec_interrupts_init(void) {
+  PCICR |= _BV(PCIE0);
+  PCIFR |= _BV(PCIF0);
+}
+
+#  define BUTTON_NEXT           _BV(PG4)
+#  define BUTTON_PREV           _BV(PG3)
+
+static inline rawbutton_t buttons_read(void) {
+  return PING & (BUTTON_NEXT | BUTTON_PREV);
+}
+
+static inline void buttons_init(void) {
+  DDRG  &= (uint8_t)~(BUTTON_NEXT | BUTTON_PREV);
+  PORTG |= BUTTON_NEXT | BUTTON_PREV;
+}
+
+#  define HAVE_BOARD_INIT
+
+static inline void board_init(void) {
+  // turn on power LED
+  DDRG  |= _BV(PG1);
+  PORTG |= _BV(PG1);
+}
+
+#elif CONFIG_HARDWARE_VARIANT == 8
+/* ---------- Hardware configuration: petSD ---------- */
+#  define HAVE_SD
+#  define SD_CHANGE_HANDLER     ISR(PCINT3_vect)
+#  define SD_SUPPLY_VOLTAGE (1L<<21)
+
+/* 288 kHz slow, 2.304 MHz fast */
+#  define SPI_DIVISOR_SLOW 64
+#  define SPI_DIVISOR_FAST 8
+
+static inline void sdcard_interface_init(void) {
+  DDRD   &= ~_BV(PD4);            /* card detect */
+  PORTD  |=  _BV(PD4);
+  DDRC   &= ~_BV(PC3);            /* write protect  */
+  PORTC  |=  _BV(PC3);
+  PCMSK3 |=  _BV(PCINT28);        /* card change interrupt */
+  PCICR  |=  _BV(PCIE3);
+  PCIFR  |=  _BV(PCIF3);
+}
+
+static inline uint8_t sdcard_detect(void) {
+  return (!(PIND & _BV(PD4)));
+}
+
+static inline uint8_t sdcard_wp(void) {
+  return (PINC & _BV(PC3));
+}
+
+static inline uint8_t device_hw_address(void) {
+  /* No device jumpers on petSD */
+  return 8;
+}
+static inline void device_hw_address_init(void) {
+  return;
+}
+
+static inline void leds_init(void) {
+  DDRD |= _BV(PD5);
+  DDRD |= _BV(PD6);
+}
+
+static inline __attribute__((always_inline)) void set_busy_led(uint8_t state) {
+  if (state)
+    PORTD |= _BV(PD5);
+  else
+    PORTD &= (uint8_t) ~_BV(PD5);
+}
+
+static inline __attribute__((always_inline)) void set_dirty_led(uint8_t state) {
+  if (state)
+    PORTD |= _BV(PD6);
+  else
+    PORTD &= (uint8_t) ~_BV(PD6);
+}
+
+static inline void toggle_dirty_led(void) {
+  PIND |= _BV(PD6);
+}
+
+#  define HAVE_IEEE
+#  define IEEE_ATN_INT          INT0    /* ATN interrupt (required!) */
+#  define IEEE_ATN_INT_VECT     INT0_vect
+
+static inline void ieee_interrupts_init(void) {
+  DDRD &= ~_BV(PD2);
+  PORTD |= _BV(PD2);
+  EICRA |= _BV(ISC00);
+  EIMSK |= _BV(INT0);
+}
+
+#  define HAVE_7516X            /* Device uses 75160/75161 bus drivers */
+#  define IEEE_PORT_TE          PORTB   /* TE */
+#  define IEEE_DDR_TE           DDRB
+#  define IEEE_PIN_TE           PB0
+#  define IEEE_PORT_DC          PORTC   /* DC */
+#  define IEEE_DDR_DC           DDRC
+#  define IEEE_PIN_DC           PC5
+#  define IEEE_INPUT_ATN        PIND    /* ATN */
+#  define IEEE_PORT_ATN         PORTD
+#  define IEEE_DDR_ATN          DDRD
+#  define IEEE_PIN_ATN          PD2
+#  define IEEE_INPUT_NDAC       PINC    /* NDAC */
+#  define IEEE_PORT_NDAC        PORTC
+#  define IEEE_DDR_NDAC         DDRC
+#  define IEEE_PIN_NDAC         PC6
+#  define IEEE_INPUT_NRFD       PINC    /* NRFD */
+#  define IEEE_PORT_NRFD        PORTC
+#  define IEEE_DDR_NRFD         DDRC
+#  define IEEE_PIN_NRFD         PC7
+#  define IEEE_INPUT_DAV        PINB    /* DAV */
+#  define IEEE_PORT_DAV         PORTB
+#  define IEEE_DDR_DAV          DDRB
+#  define IEEE_PIN_DAV          PB2
+#  define IEEE_INPUT_EOI        PIND    /* EOI */
+#  define IEEE_PORT_EOI         PORTD
+#  define IEEE_DDR_EOI          DDRD
+#  define IEEE_PIN_EOI          PD7
+#  define IEEE_INPUT_SRQ                /* SRQ */
+#  define IEEE_PORT_SRQ         PORTA
+#  define IEEE_DDR_SRQ          DDRA
+#  define IEEE_PIN_SRQ
+#  define IEEE_INPUT_IFC                /* IFC */
+#  define IEEE_PORT_IFC         PORTA
+#  define IEEE_DDR_IFC          DDRA
+#  define IEEE_PIN_IFC
+#  define IEEE_INPUT_REN                /* REN */
+#  define IEEE_PORT_REN         PORTA
+#  define IEEE_DDR_REN          DDRA
+#  define IEEE_PIN_REN
+#  define IEEE_D_PIN            PINA    /* Data */
+#  define IEEE_D_PORT           PORTA
+#  define IEEE_D_DDR            DDRA
+#  define IEEE_BIT_DC           _BV(IEEE_PIN_DC)
+#  define IEEE_BIT_TE           _BV(IEEE_PIN_TE)
+#  define IEEE_BIT_SRQ          0   /* Define as 0 if SRQ not connected */
+#  define IEEE_BIT_REN          0   /* Define as 0 if REN not connected */
+#  define IEEE_BIT_IFC          0   /* Define as 0 if IFC not connected */
+
+static inline void ieee_interface_init(void) {
+  IEEE_PORT_TE  &= (uint8_t) ~ IEEE_BIT_TE;         // Set TE low
+  IEEE_PORT_DC  |= IEEE_BIT_DC;                     // Set DC high
+  IEEE_PORT_SRQ |= IEEE_BIT_SRQ;                    // Set SRQ high
+  IEEE_DDR_TE   |= IEEE_BIT_TE;                     // Define TE  as output
+  IEEE_DDR_DC   |= IEEE_BIT_DC;                     // Define DC  as output
+  IEEE_DDR_SRQ  |= IEEE_BIT_SRQ;                    // Define SRQ as output
+  IEEE_PORT_ATN |= _BV(IEEE_PIN_ATN);               // Enable pull-up for ATN
+  IEEE_PORT_REN |= IEEE_BIT_REN;                    // Enable pull-up for REN
+  IEEE_PORT_IFC |= IEEE_BIT_IFC;                    // Enable pull-up for IFC
+  IEEE_DDR_ATN  &= (uint8_t) ~ _BV(IEEE_PIN_ATN);   // Define ATN as input
+  IEEE_DDR_REN  &= (uint8_t) ~ IEEE_BIT_REN;        // Define REN as input
+  IEEE_DDR_IFC  &= (uint8_t) ~ IEEE_BIT_IFC;        // Define IFC as input
+}
+
+#  define BUTTON_NEXT           _BV(PB1)
+#  define BUTTON_PREV           _BV(PB3)
+
+static inline rawbutton_t buttons_read(void) {
+  return (PINB & (BUTTON_NEXT | BUTTON_PREV));
+}
+
+static inline void buttons_init(void) {
+  DDRB  &= (uint8_t)~(BUTTON_NEXT | BUTTON_PREV);
+  PORTB |= BUTTON_NEXT | BUTTON_PREV;
+}
+
+#  define SOFTI2C_PORT          PORTC
+#  define SOFTI2C_PIN           PINC
+#  define SOFTI2C_DDR           DDRC
+#  define SOFTI2C_BIT_SCL       PC0
+#  define SOFTI2C_BIT_SDA       PC1
+#  define SOFTI2C_BIT_INTRQ     PC2
+#  define SOFTI2C_DELAY         6
+
+#  define HAVE_BOARD_INIT
+
+static inline void board_init(void) {
+  DDRC  |= _BV(PC4);
+  PORTC |= _BV(PC4);       /* Disable  ENC28J60 */
+}
+
+
+#elif CONFIG_HARDWARE_VARIANT == 9
+/* ---------- Hardware configuration: XS-1541 ---------- */
+#  define HAVE_SD
+#  define SD_SUPPLY_VOLTAGE     (1L<<18)
+
+/* 230 kHz slow, 1.8432 2MHz fast */
+#  define SPI_DIVISOR_SLOW 64
+#  define SPI_DIVISOR_FAST 8
+
+static inline void sdcard_interface_init(void) {
+  /* No card detect switch, no write protect switch... nothing */
+  return;
+}
+
+static inline uint8_t sdcard_detect(void) {
+  return 1; /* assume it's always there */
+}
+
+static inline uint8_t sdcard_wp(void) {
+  return 0;
+}
+
+static inline uint8_t device_hw_address(void) {
+  /* No device jumpers on XS-1541 */
+  return 8;
+}
+
+static inline void device_hw_address_init(void) {
+  return;
+}
+
+static inline void leds_init(void) {
+  DDRC |= _BV(PC0);  /* busy LED onboard */
+  DDRB |= _BV(PB0);  /* dirty LED extern */
+}
+
+static inline __attribute__((always_inline)) void set_busy_led(uint8_t state) {
+  if (state)
+    PORTC |= _BV(PC0);
+  else
+    PORTC &= ~_BV(PC0);
+}
+
+static inline __attribute__((always_inline)) void set_dirty_led(uint8_t state) {
+  if (state)
+    PORTB |= _BV(PB0);
+  else
+    PORTB &= ~_BV(PB0);
+}
+
+static inline void toggle_dirty_led(void) {
+  PINB |= _BV(PB0);
+}
+
+// dual-interface device, currently only as a compile-time option
+#ifdef CONFIG_HAVE_IEC
+#  define IEC_INPUT             PORTD
+#  define IEC_DDR               DDRD
+#  define IEC_PORT              PORTD
+#  define IEC_PIN_ATN           PD2
+#  define IEC_PIN_DATA          PD4
+#  define IEC_PIN_CLOCK         PD7
+#  define IEC_PIN_SRQ           PD5
+#  define IEC_ATN_INT_VECT      PCINT3_vect
+#  define IEC_PCMSK             PCMSK3
+
+static inline void iec_interrupts_init(void) {
+  PCICR |= _BV(PCIE3);
+  PCIFR |= _BV(PCIF3);
+}
+#endif // CONFIG_HAVE_IEC
+
+#ifdef CONFIG_HAVE_IEEE
+#  define IEEE_ATN_INT          PCINT3
+#  define IEEE_PCMSK            PCMSK3
+#  define IEEE_PCINT            PCINT27
+#  define IEEE_ATN_INT_VECT     PCINT3_vect
+
+static inline void ieee_interrupts_init(void)  {
+  /* clear interrupt flag */
+  PCIFR |= _BV(PCIF3);
+
+  /* enable ATN in pin change enable mask */
+  IEEE_PCMSK |= _BV(IEEE_PCINT);
+
+  /* Enable pin change interrupt 3 (PCINT31..24) */
+  PCICR |= _BV(PCIE3);
+}
+
+#  define IEEE_C_PIN            PINC    /* Control signals */
+#  define IEEE_C_DDR            DDRC
+#  define IEEE_C_PORT           PORTC
+#  define IEEE_C_ATN_PIN        PIND
+#  define IEEE_C_ATN_PORT       PORTD
+#  define IEEE_C_ATN_DDR        DDRD
+#  define IEEE_PIN_TE           0       /* 7516x only */
+#  define IEEE_PIN_DC           0       /* 7516x only */
+#  define IEEE_PIN_NDAC         PC4
+#  define IEEE_PIN_NRFD         PC5
+#  define IEEE_PIN_DAV          PC6
+#  define IEEE_PIN_EOI          PC7
+#  define IEEE_PIN_ATN          PD3
+#  define IEEE_PIN_SRQ          PC3
+#  define IEEE_PIN_REN          PC1
+#  define IEEE_PIN_IFC          PC2
+#  define IEEE_D_PIN            PINA    /* Data */
+#  define IEEE_D_DDR            DDRA
+#  define IEEE_D_PORT           PORTA
+#  define IEEE_BIT_DC           _BV(IEEE_PIN_DC)
+#  define IEEE_BIT_TE           _BV(IEEE_PIN_TE)
+#  define IEEE_BIT_SRQ          _BV(IEEE_PIN_SRQ)
+#  define IEEE_BIT_REN          _BV(IEEE_PIN_REN)
+#  define IEEE_BIT_IFC          _BV(IEEE_PIN_IFC)
+
+static inline void ieee_interface_init(void) {
+  /* Define TE, DC, SRQ as outputs */
+  IEEE_C_DDR |= IEEE_BIT_TE | IEEE_BIT_DC | IEEE_BIT_SRQ;
+
+  /* Define REN, IFC as inputs */
+  IEEE_C_DDR &= (uint8_t) ~ (IEEE_BIT_REN | IEEE_BIT_IFC);
+
+  /* DC and SRQ high, pull-up for REN and IFC */
+  IEEE_C_PORT     |= IEEE_BIT_DC | IEEE_BIT_SRQ | IEEE_BIT_REN | IEEE_BIT_IFC;
+  IEEE_C_ATN_DDR  &= (uint8_t)~_BV(IEEE_PIN_ATN); // ATN as input
+  IEEE_C_ATN_PORT |= _BV(IEEE_PIN_ATN);           // enable ATN pullup
+}
+
+#endif // CONFIG_HAVE_IEEE
+
+#  define BUTTON_NEXT           _BV(PB1)
+#  define BUTTON_PREV           _BV(PB2)
+
+static inline rawbutton_t buttons_read(void) {
+  return (PINB & (BUTTON_NEXT | BUTTON_PREV));
+}
+
+static inline void buttons_init(void) {
+  DDRB &= (uint8_t) ~ (BUTTON_NEXT | BUTTON_PREV);
+  PORTB |= BUTTON_NEXT | BUTTON_PREV;
+}
+
+
+#else
+#  error "CONFIG_HARDWARE_VARIANT is unset or set to an unknown value."
+#endif
+
+
+/* ---------------- End of user-configurable options ---------------- */
+
+#if !defined(CONFIG_HAVE_IEC) && !defined(CONFIG_HAVE_IEEE)
+#  error Need CONFIG_HAVE_IEC and/or CONFIG_HAVE_IEEE
+// Please edit your config-<devicename> if this error occurs.
+#endif
+
+#if defined(CONFIG_HAVE_IEC) && defined(CONFIG_HAVE_IEEE)
+#  error Sorry, dual-interface devices must select only one interface at compile time!
+#endif
+
+
+/* --- IEC --- */
+#ifdef CONFIG_HAVE_IEC
+
+#define IEC_BIT_ATN      _BV(IEC_PIN_ATN)
+#define IEC_BIT_DATA     _BV(IEC_PIN_DATA)
+#define IEC_BIT_CLOCK    _BV(IEC_PIN_CLOCK)
+#define IEC_BIT_SRQ      _BV(IEC_PIN_SRQ)
+
+/* Return type of iec_bus_read() */
+typedef uint8_t iec_bus_t;
+
+/* OPIN definitions are only used in the assembler module */
+#ifdef IEC_SEPARATE_OUT
+#  define IEC_OBIT_ATN   _BV(IEC_OPIN_ATN)
+#  define IEC_OBIT_DATA  _BV(IEC_OPIN_DATA)
+#  define IEC_OBIT_CLOCK _BV(IEC_OPIN_CLOCK)
+#  define IEC_OBIT_SRQ   _BV(IEC_OPIN_SRQ)
+#  define IEC_OUTPUT     IEC_PORT
+#else
+#  define IEC_OPIN_ATN   IEC_PIN_ATN
+#  define IEC_OPIN_DATA  IEC_PIN_DATA
+#  define IEC_OPIN_CLOCK IEC_PIN_CLOCK
+#  define IEC_OPIN_SRQ   IEC_PIN_SRQ
+#  define IEC_OBIT_ATN   IEC_BIT_ATN
+#  define IEC_OBIT_DATA  IEC_BIT_DATA
+#  define IEC_OBIT_CLOCK IEC_BIT_CLOCK
+#  define IEC_OBIT_SRQ   IEC_BIT_SRQ
+#  define IEC_OUTPUT     IEC_DDR
+#endif
+
+#ifndef IEC_PORTIN
+#  define IEC_PORTIN IEC_PORT
+#endif
+
+#ifndef IEC_DDRIN
+#  define IEC_DDRIN  IEC_DDR
+#  define IEC_DDROUT IEC_DDR
+#endif
+
+/* The AVR asm modules don't support noninverted output lines, */
+/* so this can be staticalle defined for all configurations.   */
+#define IEC_OUTPUTS_INVERTED
+
+#ifdef IEC_PCMSK
+   /* For hardware configurations using PCINT for IEC IRQs */
+#  define set_atn_irq(x) \
+     if (x) { IEC_PCMSK |= _BV(IEC_PIN_ATN); } \
+     else { IEC_PCMSK &= (uint8_t)~_BV(IEC_PIN_ATN); }
+#  define set_clock_irq(x) \
+     if (x) { IEC_PCMSK |= _BV(IEC_PIN_CLOCK); } \
+     else { IEC_PCMSK &= (uint8_t)~_BV(IEC_PIN_CLOCK); }
+#  define HAVE_CLOCK_IRQ
+#else
+     /* Hardware ATN interrupt */
+#  define set_atn_irq(x) \
+     if (x) { EIMSK |= _BV(IEC_ATN_INT); } \
+     else { EIMSK &= (uint8_t)~_BV(IEC_ATN_INT); }
+
+#  ifdef IEC_CLK_INT
+     /* Hardware has a CLK interrupt */
+#    define set_clock_irq(x) \
+       if (x) { EIMSK |= _BV(IEC_CLK_INT); } \
+       else { EIMSK &= (uint8_t)~_BV(IEC_CLK_INT); }
+#    define HAVE_CLOCK_IRQ
+#  endif
+#endif
+
+/* IEC output functions */
+#ifdef IEC_OUTPUTS_INVERTED
+#  define COND_INV(x) (!(x))
+#else
+#  define COND_INV(x) (x)
+#endif
+
+static inline __attribute__((always_inline)) void set_atn(uint8_t state) {
+  if (COND_INV(state))
+    IEC_OUTPUT |= IEC_OBIT_ATN;
+  else
+    IEC_OUTPUT &= ~IEC_OBIT_ATN;
+}
+
+static inline __attribute__((always_inline)) void set_data(uint8_t state) {
+  if (COND_INV(state))
+    IEC_OUTPUT |= IEC_OBIT_DATA;
+  else
+    IEC_OUTPUT &= ~IEC_OBIT_DATA;
+}
+
+static inline __attribute__((always_inline)) void set_clock(uint8_t state) {
+  if (COND_INV(state))
+    IEC_OUTPUT |= IEC_OBIT_CLOCK;
+  else
+    IEC_OUTPUT &= ~IEC_OBIT_CLOCK;
+}
+
+#ifdef IEC_SEPARATE_OUT
+static inline __attribute__((always_inline)) void set_srq(uint8_t state) {
+  if (COND_INV(state))
+    IEC_OUTPUT |= IEC_OBIT_SRQ;
+  else
+    IEC_OUTPUT &= ~IEC_OBIT_SRQ;
+}
+#else
+/* this version of the function turns on the pullups when state is 1 */
+/* note: same pin for in/out implies inverted output via DDR */
+static inline __attribute__((always_inline)) void set_srq(uint8_t state) {
+  if (state) {
+    IEC_DDR  &= ~IEC_OBIT_SRQ;
+    IEC_PORT |=  IEC_OBIT_SRQ;
+  } else {
+    IEC_PORT &= ~IEC_OBIT_SRQ;
+    IEC_DDR  |=  IEC_OBIT_SRQ;
+  }
+}
+#endif
+
+#undef COND_INV
+
+// for testing purposes only, probably does not do what you want!
+#define toggle_srq() IEC_INPUT |= IEC_OBIT_SRQ
+
+/* IEC lines initialisation */
+static inline void iec_interface_init(void) {
+#ifdef IEC_SEPARATE_OUT
+  /* Set up the input port - pullups on all lines */
+  IEC_DDRIN  &= (uint8_t)~(IEC_BIT_ATN  | IEC_BIT_CLOCK  | IEC_BIT_DATA  | IEC_BIT_SRQ);
+  IEC_PORTIN |= IEC_BIT_ATN | IEC_BIT_CLOCK | IEC_BIT_DATA | IEC_BIT_SRQ;
+  /* Set up the output port - all lines high */
+  IEC_DDROUT |=            IEC_OBIT_ATN | IEC_OBIT_CLOCK | IEC_OBIT_DATA | IEC_OBIT_SRQ;
+  IEC_PORT   &= (uint8_t)~(IEC_OBIT_ATN | IEC_OBIT_CLOCK | IEC_OBIT_DATA | IEC_OBIT_SRQ);
+#else
+  /* Pullups would be nice, but AVR can't switch from */
+  /* low output to hi-z input directly                */
+  IEC_DDR  &= (uint8_t)~(IEC_BIT_ATN | IEC_BIT_CLOCK | IEC_BIT_DATA | IEC_BIT_SRQ);
+  IEC_PORT &= (uint8_t)~(IEC_BIT_ATN | IEC_BIT_CLOCK | IEC_BIT_DATA);
+  /* SRQ is special-cased because it may be unconnected */
+  IEC_PORT |= IEC_BIT_SRQ;
+#endif
+
+#ifdef HAVE_PARALLEL
+  /* set data lines to input with pullup */
+  PARALLEL_PDDR  = 0;
+  PARALLEL_PPORT = 0xff;
+
+  /* set HSK_OUT and _IN to input with pullup */
+  PARALLEL_HDDR  &= ~(_BV(PARALLEL_HSK_OUT_BIT) |
+                      _BV(PARALLEL_HSK_IN_BIT));
+  PARALLEL_HPORT |= _BV(PARALLEL_HSK_OUT_BIT) |
+                    _BV(PARALLEL_HSK_IN_BIT);
+
+  /* enable interrupt for parallel handshake */
+#  ifdef PARALLEL_PCINT_GROUP
+  /* excluse PCINT group */
+  PARALLEL_PCMSK |= _BV(PARALLEL_HSK_IN_BIT);
+  PCICR |= _BV(PARALLEL_PCINT_GROUP);
+  PCIFR |= _BV(PARALLEL_PCINT_GROUP);
+#  else
+  /* exclusive INTx line */
+#    error Implement me!
+#  endif
+#endif
+}
+
+/* weak-aliasing is resolved at link time, so it doesn't work */
+/* for static inline functions - use a conditionally compiled */
+/* wrapper instead                                            */
+#  ifndef CONFIG_HAVE_IEEE
+static inline void bus_interface_init(void) {
+  iec_interface_init();
+}
+#  endif
+#endif /* CONFIG_HAVE_IEC */
+
+
+/* --- IEEE --- */
+#ifdef CONFIG_HAVE_IEEE
+#  ifdef IEEE_PCMSK
+/* IEEE-488 ATN interrupt using PCINT */
+static inline void set_atn_irq(uint8_t x) {
+  if (x)
+    IEEE_PCMSK |= _BV(IEEE_PCINT);
+  else
+    IEEE_PCMSK &= (uint8_t) ~_BV(IEEE_PCINT);
+}
+#  else
+/* Hardware ATN interrupt */
+static inline void set_atn_irq(uint8_t x) {
+  if (x)
+    EIMSK |= _BV(IEEE_ATN_INT);
+  else
+    EIMSK &= (uint8_t) ~_BV(IEEE_ATN_INT);
+}
+#  endif
+
+/* same weak alias problem as in IEC version */
+#  ifndef CONFIG_HAVE_IEC
+static inline void bus_interface_init(void) {
+  ieee_interface_init();
+}
+#  endif
+#endif /* CONFIG_HAVE_IEEE */
+
+
+
+/* The assembler module needs the vector names, */
+/* so the _HANDLER macros are created here.     */
+#define IEC_ATN_HANDLER   ISR(IEC_ATN_INT_VECT)
+#define IEC_CLOCK_HANDLER ISR(IEC_CLK_INT_VECT)
+#define IEEE_ATN_HANDLER  ISR(IEEE_ATN_INT_VECT)
+
+/* SD SS pin default implementation */
+#ifndef SDCARD_SS_SPECIAL
+static inline __attribute__((always_inline)) void sdcard_set_ss(uint8_t state) {
+  if (state)
+    SPI_PORT |= SPI_SS;
+  else
+    SPI_PORT &= ~SPI_SS;
+}
+#endif
+
+/* Display interrupt pin */
+#ifdef CONFIG_REMOTE_DISPLAY
+static inline void display_intrq_init(void) {
+  /* Enable pullup on the interrupt line */
+  SOFTI2C_PORT |= _BV(SOFTI2C_BIT_INTRQ);
+}
+
+static inline uint8_t display_intrq_active(void) {
+  return !(SOFTI2C_PIN & _BV(SOFTI2C_BIT_INTRQ));
+}
+#endif
+
+/* P00 name cache is in bss by default */
+#ifndef P00CACHE_ATTRIB
+#  define P00CACHE_ATTRIB
+#endif
+
+/* -- ensure that the timing for Dolphin is achievable        -- */
+/* the C64 will switch to an alternate, not-implemented protocol */
+/* if the answer to the XQ/XZ commands is too late and the       */
+/* file name/command dump takes too long if the buffer is        */
+/* smaller than the output from uart_trace                       */
+#if defined(CONFIG_PARALLEL_DOLPHIN) && \
+    defined(CONFIG_UART_DEBUG) && \
+  CONFIG_UART_BUF_SHIFT < 8  // 7 may work with short file names
+#  error Enabling both DolphinDOS and UART debugging requires CONFIG_UART_BUF_SHIFT >= 8 !
+#endif
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/arch-eeprom.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/arch-eeprom.h
new file mode 100644
index 00000000..eae381d0
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/arch-eeprom.h
@@ -0,0 +1,36 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   arch-eeprom.h: Wrapper for EEPROM functions
+
+*/
+
+#ifndef ARCH_EEPROM_H
+#define ARCH_EEPROM_H
+
+#include <avr/eeprom.h>
+
+/* AVR: Set EEPROM address pointer to the dummy entry */
+static inline void eeprom_safety(void) {
+  EEAR = 0;
+}
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/arch-timer.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/arch-timer.c
new file mode 100644
index 00000000..b946baaa
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/arch-timer.c
@@ -0,0 +1,39 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   timer-init.c: System timer initialisation (AVR version)
+
+*/
+
+#include "config.h"
+#include "timer.h"
+
+void timer_init(void) {
+  /* Count F_CPU/8 in timer 0 */
+  TCCR0B = _BV(CS01);
+
+  /* Set up a 100Hz interrupt using timer 1 */
+  OCR1A  = F_CPU / 64 / 100 - 1;
+  TCNT1  = 0;
+  TCCR1A = 0;
+  TCCR1B = _BV(WGM12) | _BV(CS10) | _BV(CS11);
+  TIMSK1 |= _BV(OCIE1A);
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/arch-timer.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/arch-timer.h
new file mode 100644
index 00000000..98bafc30
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/arch-timer.h
@@ -0,0 +1,62 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   arch-timer.h: Architecture-specific system timer definitions
+
+*/
+
+#ifndef ARCH_TIMER_H
+#define ARCH_TIMER_H
+
+#include <util/delay.h>
+
+#define delay_ms(x) _delay_ms(x)
+#define delay_us(x) _delay_us(x)
+
+/* Types for unsigned and signed tick values */
+typedef uint16_t tick_t;
+typedef int16_t stick_t;
+
+/**
+ * start_timeout - start a timeout using timer0
+ * @usecs: number of microseconds before timeout (maximum 256 for 8MHz clock)
+ *
+ * This function sets timer 0 so it will time out after the specified number
+ * of microseconds. DON'T use a variable as parameter because it would cause
+ * run-time floating point calculations (slow and huge).
+ */
+static inline __attribute__((always_inline)) void start_timeout(uint16_t usecs) {
+  TCNT0  = 256 - ((float)F_CPU/8000000.0) * usecs;
+  TIFR0 |= _BV(TOV0);
+}
+
+/**
+ * has_timed_out - returns true if timeout was reached
+ *
+ * This function returns true if the overflow flag of timer 0 is set which
+ * (together with start_timeout and TIMEOUT_US) will happen when the
+ * specified time has elapsed.
+ */
+static inline uint8_t has_timed_out(void) {
+  return TIFR0 & _BV(TOV0);
+}
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/ata.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/ata.c
new file mode 100644
index 00000000..0cd1c3e2
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/ata.c
@@ -0,0 +1,428 @@
+/*
+    Copyright Jim Brain and Brain Innovations, 2005
+
+    This file is part of uIEC.
+
+    uIEC is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    uIEC is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with uIEC; if not, write to the Free Software
+    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+    The exported functions in this file are weak-aliased to their corresponding
+    versions defined in diskio.h so when this file is the only diskio provider
+    compiled in they will be automatically used by the linker.
+
+*/
+#include <inttypes.h>
+#include <util/delay.h>
+#include <avr/interrupt.h>
+#include <avr/io.h>
+#include "config.h"
+
+#include "diskio.h"
+#include "ata.h"
+
+/*--------------------------------------------------------------------------
+
+   Module Private Functions
+
+---------------------------------------------------------------------------*/
+
+
+static DSTATUS ATA_drv_flags[2];
+
+#define ATA_WRITE_CMD(cmd) { ata_write_reg(ATA_REG_CMD,cmd); }
+
+/* Yes, this is a very inaccurate delay mechanism, but this interface only
+ * uses it for timeout that will cause a fatal error, so it should be fine.
+ * About the only downside is a possible additional delay if a drive is not
+ * present on the bus.
+ */
+
+#define DELAY_VALUE(ms) ((double)F_CPU/40000UL * ms)
+#define ATA_INIT_TIMEOUT 31000  /* 31 sec */
+
+/*-----------------------------------------------------------------------*/
+/* Read an ATA register                                                  */
+/*-----------------------------------------------------------------------*/
+
+static BYTE ata_read_reg(BYTE reg) {
+  BYTE data;
+
+  ATA_PORT_CTRL_OUT = reg;
+  ATA_PORT_CTRL_OUT &= (BYTE)~ATA_PIN_RD;
+  ATA_PORT_CTRL_OUT &= (BYTE)~ATA_PIN_RD;
+  ATA_PORT_CTRL_OUT &= (BYTE)~ATA_PIN_RD;
+  data = ATA_PORT_DATA_LO_IN;
+  ATA_PORT_CTRL_OUT |= ATA_PIN_RD;
+  return data;
+}
+
+
+/*-----------------------------------------------------------------------*/
+/* Write a byte to an ATA register                                       */
+/*-----------------------------------------------------------------------*/
+
+static void ata_write_reg(BYTE reg, BYTE data) {
+  ATA_PORT_DATA_LO_DDR = 0xff;            /* bring to output */
+  ATA_PORT_DATA_LO_OUT = data;
+  ATA_PORT_CTRL_OUT = reg;
+  ATA_PORT_CTRL_OUT &= (BYTE)~ATA_PIN_WR;
+  ATA_PORT_CTRL_OUT &= (BYTE)~ATA_PIN_WR; /* delay */
+  ATA_PORT_CTRL_OUT |= ATA_PIN_WR;
+  ATA_PORT_DATA_LO_OUT = 0xff;
+  ATA_PORT_DATA_LO_DDR = 0x00;            /* bring to input */
+}
+
+
+/*-----------------------------------------------------------------------*/
+/* Wait for Data Ready                                                   */
+/*-----------------------------------------------------------------------*/
+
+static BOOL ata_wait_data(void) {
+  BYTE s;
+  DWORD i = DELAY_VALUE(1000);
+  do {
+    if(!--i) return FALSE;
+    s=ata_read_reg(ATA_REG_STATUS);
+  } while((s & (ATA_STATUS_BSY | ATA_STATUS_DRQ)) != ATA_STATUS_DRQ && !(s & ATA_STATUS_ERR));
+  //} while((s&ATA_STATUS_BSY)!= 0 && (s&ATA_STATUS_ERR)==0 && (s & (ATA_STATUS_DRDY | ATA_STATUS_DRQ)) != (ATA_STATUS_DRDY | ATA_STATUS_DRQ));
+  if(s & ATA_STATUS_ERR)
+    return FALSE;
+
+  ata_read_reg(ATA_REG_ALTSTAT);
+  return TRUE;
+}
+
+
+static void ata_select_sector(BYTE drv, DWORD sector, BYTE count) {
+  if(ATA_drv_flags[drv] & STA_48BIT) {
+    ata_write_reg (ATA_REG_COUNT, 0);
+    ata_write_reg (ATA_REG_COUNT, count);
+    ata_write_reg (ATA_REG_LBA0, (uint8_t)(sector >> 24));
+    ata_write_reg (ATA_REG_LBA0, (uint8_t)sector);
+    ata_write_reg (ATA_REG_LBA1, 0);
+    ata_write_reg (ATA_REG_LBA1, (uint8_t)(sector >> 16));
+    ata_write_reg (ATA_REG_LBA2, 0);
+    ata_write_reg (ATA_REG_LBA2, (uint8_t)(sector >> 8));
+    ata_write_reg (ATA_REG_LBA3, ATA_LBA3_LBA
+                                 | (drv ? ATA_DEV_SLAVE : ATA_DEV_MASTER));
+  } else {
+    ata_write_reg(ATA_REG_COUNT, count);
+    ata_write_reg(ATA_REG_LBA0, (BYTE)sector);
+    ata_write_reg(ATA_REG_LBA1, (BYTE)(sector >> 8));
+    ata_write_reg(ATA_REG_LBA2, (BYTE)(sector >> 16));
+    ata_write_reg(ATA_REG_LBA3, ((BYTE)(sector >> 24) & 0x0F)
+                                | ATA_LBA3_LBA
+                                | ( drv ? ATA_DEV_SLAVE : ATA_DEV_MASTER));
+  }
+}
+
+
+/*-----------------------------------------------------------------------*/
+/* Read a part of data block                                             */
+/*-----------------------------------------------------------------------*/
+
+static void ata_read_part (BYTE *buff, BYTE ofs, BYTE count) {
+  BYTE c = 0, dl, dh;
+
+  ATA_PORT_CTRL_OUT = ATA_REG_DATA;          /* Select Data register */
+  do {
+    ATA_PORT_CTRL_OUT &= (BYTE)~ATA_PIN_RD;  /* IORD = L */
+    ATA_PORT_CTRL_OUT &= (BYTE)~ATA_PIN_RD;  /* delay */
+    dl = ATA_PORT_DATA_LO_IN;                /* Read even data */
+    dh = ATA_PORT_DATA_HI_IN;                /* Read odd data */
+    ATA_PORT_CTRL_OUT |= ATA_PIN_RD;         /* IORD = H */
+    if (count && (c >= ofs)) {               /* Pick up a part of block */
+      *buff++ = dl;
+      *buff++ = dh;
+      count--;
+    }
+  } while (++c);
+  ata_read_reg(ATA_REG_ALTSTAT);
+  ata_read_reg(ATA_REG_STATUS);
+}
+
+/*--------------------------------------------------------------------------
+
+   Public Functions
+
+---------------------------------------------------------------------------*/
+
+
+static void reset_disk(void) {
+  ATA_PORT_CTRL_OUT = (BYTE)~ATA_PIN_RESET;
+  // wait a bit for the drive to reset.
+  _delay_ms(RESET_DELAY);
+  ATA_PORT_CTRL_OUT |= ATA_PIN_RESET;
+  ATA_drv_flags[0] = STA_NOINIT;
+  ATA_drv_flags[1] = STA_NOINIT;
+}
+
+
+#ifdef CF_CHANGE_HANDLER
+CF_CHANGE_HANDLER {
+  if (cfcard_detect())
+    disk_state = DISK_CHANGED;
+  else
+    disk_state = DISK_REMOVED;
+}
+#endif
+
+
+void ata_init(void) {
+  cfcard_interface_init();
+  disk_state=DISK_OK;
+  ATA_drv_flags[0] = STA_NOINIT | STA_FIRSTTIME;
+  if(ATA_PORT_DATA_HI_OUT == 0xff)
+    ATA_drv_flags[0] = STA_NOINIT | STA_NODISK;
+  ATA_drv_flags[1] = STA_NOINIT | STA_FIRSTTIME;
+
+  /* Initialize the ATA control port */
+  ATA_PORT_CTRL_OUT=0xff;
+  ATA_PORT_CTRL_DDR=0xff;
+}
+void disk_init(void) __attribute__ ((weak, alias("ata_init")));
+
+
+/*-----------------------------------------------------------------------*/
+/* Initialize Disk Drive                                                 */
+/*-----------------------------------------------------------------------*/
+
+DSTATUS ata_initialize (BYTE drv) {
+  BYTE data[(83 - 49 + 1) * 2];
+  DWORD i = DELAY_VALUE(ATA_INIT_TIMEOUT);
+
+  if(drv>1) return STA_NOINIT;
+  if(!(ATA_drv_flags[drv] & STA_FIRSTTIME) && disk_state != DISK_OK)
+    reset_disk();
+  if(ATA_drv_flags[drv] & STA_NODISK) return STA_NOINIT; // cannot initialize a drive with no disk in it.
+  // we need to set the drive.
+  ata_write_reg (ATA_REG_LBA3, ATA_LBA3_LBA | (drv ? ATA_DEV_SLAVE : ATA_DEV_MASTER));
+  do {
+    if (!--i) goto di_error;
+  } while ((ata_read_reg(ATA_REG_STATUS) & (ATA_STATUS_BSY | ATA_STATUS_DRDY)) == ATA_STATUS_BSY);
+
+  ata_write_reg(ATA_REG_DEVCTRL, ATA_DEVCTRL_SRST | ATA_DEVCTRL_NIEN);  /* Software reset */
+  _delay_ms(20);
+  ata_write_reg(ATA_REG_DEVCTRL, ATA_DEVCTRL_NIEN);
+  _delay_ms(20);
+  i = DELAY_VALUE(ATA_INIT_TIMEOUT);
+  do {
+    if (!--i) goto di_error;
+  } while ((ata_read_reg(ATA_REG_STATUS) & (ATA_STATUS_DRDY|ATA_STATUS_BSY)) != ATA_STATUS_DRDY);
+
+  ata_write_reg (ATA_REG_FEATURES, 3); /* set PIO mode 0 */
+  ata_write_reg (ATA_REG_COUNT, 1);
+  ATA_WRITE_CMD (ATA_CMD_SETFEATURES);
+  i = DELAY_VALUE(1000);
+  do {
+    if(!--i) goto di_error;
+  } while(ata_read_reg(ATA_REG_STATUS) & ATA_STATUS_BSY);  /* Wait cmd ready */
+  ATA_WRITE_CMD(ATA_CMD_IDENTIFY);
+  if(!ata_wait_data()) goto di_error;
+  ata_read_part(data, 49, 83 - 49 + 1);
+  if(!(data[1] & 0x02)) goto di_error; /* No LBA support */
+  if(data[(83 - 49) * 2 + 1] & 0x04)   /* 48 bit addressing... */
+    ATA_drv_flags[drv] |= STA_48BIT;
+  ATA_drv_flags[drv] &= (BYTE)~( STA_NOINIT | STA_NODISK);
+
+  disk_state = DISK_OK;
+  return 0;
+
+di_error:
+  ATA_drv_flags[drv]=(STA_NOINIT | STA_NODISK); // no disk in drive
+  return STA_NOINIT | STA_NODISK;
+}
+DSTATUS disk_initialize (BYTE drv) __attribute__ ((weak, alias("ata_initialize")));
+
+
+/*-----------------------------------------------------------------------*/
+/* Return Disk Status                                                    */
+/*-----------------------------------------------------------------------*/
+
+DSTATUS ata_status (BYTE drv) {
+  if(drv>1)
+     return STA_NOINIT;
+  return ATA_drv_flags[drv] & (STA_NOINIT | STA_NODISK);
+}
+DSTATUS disk_status (BYTE drv) __attribute__ ((weak, alias("ata_status")));
+
+
+/*-----------------------------------------------------------------------*/
+/* Read Sector(s)                                                        */
+/*-----------------------------------------------------------------------*/
+
+DRESULT ata_read (BYTE drv, BYTE *data, DWORD sector, BYTE count) {
+  BYTE c, iord_l, iord_h;
+
+  if (drv > 1 || !count) return RES_PARERR;
+  if (ATA_drv_flags[drv] & STA_NOINIT) return RES_NOTRDY;
+
+  /* Issue Read Sector(s) command */
+  ata_select_sector(drv, sector, count);
+  ATA_WRITE_CMD(ATA_drv_flags[drv] & STA_48BIT ? ATA_CMD_READ_EXT : ATA_CMD_READ);
+
+  iord_h = ATA_REG_DATA;
+  iord_l = ATA_REG_DATA & (BYTE)~ATA_PIN_RD;
+  do {
+    if (!ata_wait_data()) return RES_ERROR; /* Wait data ready */
+    ATA_PORT_CTRL_OUT = ATA_REG_DATA;
+    c = 0;
+    do {
+      ATA_PORT_CTRL_OUT = iord_l;       /* IORD = L */
+      ATA_PORT_CTRL_OUT = iord_l;       /* delay */
+      ATA_PORT_CTRL_OUT = iord_l;       /* delay */
+      ATA_PORT_CTRL_OUT = iord_l;       /* delay */
+      ATA_PORT_CTRL_OUT = iord_l;       /* delay */
+      *data++ = ATA_PORT_DATA_LO_IN;    /* Get even data */
+      *data++ = ATA_PORT_DATA_HI_IN;    /* Get odd data */
+      ATA_PORT_CTRL_OUT = iord_h;       /* IORD = H */
+      ATA_PORT_CTRL_OUT = iord_h;       /* delay */
+      ATA_PORT_CTRL_OUT = iord_h;       /* delay */
+      ATA_PORT_CTRL_OUT = iord_h;       /* delay */
+    } while (++c);
+  } while (--count);
+
+  ata_read_reg(ATA_REG_ALTSTAT);
+  ata_read_reg(ATA_REG_STATUS);
+
+  return RES_OK;
+}
+DRESULT disk_read (BYTE drv, BYTE *data, DWORD sector, BYTE count) __attribute__ ((weak, alias("ata_read")));
+
+
+/*-----------------------------------------------------------------------*/
+/* Write Sector(s)                                                       */
+/*-----------------------------------------------------------------------*/
+
+#if _READONLY == 0
+DRESULT ata_write (BYTE drv, const BYTE *data, DWORD sector, BYTE count) {
+  BYTE s, c, iowr_l, iowr_h;
+
+  if (drv > 1 || !count) return RES_PARERR;
+  if (ATA_drv_flags[drv] & STA_NOINIT) return RES_NOTRDY;
+
+  /* Issue Write Setor(s) command */
+  ata_select_sector(drv,sector,count);
+  ATA_WRITE_CMD(ATA_drv_flags[drv] & STA_48BIT ? ATA_CMD_WRITE_EXT : ATA_CMD_WRITE);
+
+  iowr_h = ATA_REG_DATA;
+  iowr_l = ATA_REG_DATA & (BYTE)~ATA_PIN_WR;
+  do {
+    if (!ata_wait_data()) return RES_ERROR;
+    ATA_PORT_CTRL_OUT = ATA_REG_DATA;
+    ATA_PORT_DATA_LO_DDR = 0xff;      /* bring to output */
+    ATA_PORT_DATA_HI_DDR = 0xff;      /* bring to output */
+    c = 0;
+    do {
+      ATA_PORT_DATA_LO_OUT = *data++; /* Set even data */
+      ATA_PORT_DATA_HI_OUT = *data++; /* Set odd data */
+      ATA_PORT_CTRL_OUT = iowr_l;     /* IOWR = L */
+      ATA_PORT_CTRL_OUT = iowr_h;     /* IOWR = H */
+    } while (++c);
+  } while (--count);
+  ATA_PORT_DATA_LO_OUT = 0xff;        /* Set D0-D15 as input */
+  ATA_PORT_DATA_HI_OUT = 0xff;
+  ATA_PORT_DATA_LO_DDR = 0x00;        /* bring to input */
+  ATA_PORT_DATA_HI_DDR = 0x00;        /* bring to input */
+
+  DWORD i = DELAY_VALUE(1000);
+  do {
+    if(!--i) return RES_ERROR;
+    s=ata_read_reg(ATA_REG_STATUS);   /* Wait cmd ready */
+  } while(s & ATA_STATUS_BSY);
+  if (s & ATA_STATUS_ERR) return RES_ERROR;
+  ata_read_reg(ATA_REG_ALTSTAT);
+  ata_read_reg(ATA_REG_STATUS);
+
+  return RES_OK;
+}
+DRESULT disk_write (BYTE drv, const BYTE *data, DWORD sector, BYTE count) __attribute__ ((weak, alias("ata_write")));
+#endif /* _READONLY == 0 */
+
+
+/*-----------------------------------------------------------------------*/
+/* Miscellaneous Functions                                               */
+/*-----------------------------------------------------------------------*/
+
+#if _USE_IOCTL != 0
+DRESULT ata_ioctl (BYTE drv, BYTE ctrl, void *buff) {
+  BYTE n, dl, dh, ofs, w, *ptr = buff;
+
+  if (drv > 1) return RES_PARERR;
+  if (ATA_drv_flags[drv] & STA_NOINIT) return RES_NOTRDY;
+
+  switch (ctrl) {
+    case GET_SECTOR_COUNT : /* Get number of sectors on the disk (DWORD) */
+      ofs = 60; w = 2; n = 0;
+      break;
+
+    case GET_SECTOR_SIZE :  /* Get sectors on the disk (WORD) */
+      *(WORD*)buff = 512;
+      return RES_OK;
+
+    case GET_BLOCK_SIZE :   /* Get erase block size in sectors (DWORD) */
+      *(DWORD*)buff = 1;
+      return RES_OK;
+
+    case CTRL_SYNC :        /* Nothing to do */
+      return RES_OK;
+
+    case ATA_GET_REV :      /* Get firmware revision (8 chars) */
+      ofs = 23; w = 4; n = 4;
+      break;
+
+    case ATA_GET_MODEL :    /* Get model name (40 chars) */
+      ofs = 27; w = 20; n = 20;
+      break;
+
+    case ATA_GET_SN :       /* Get serial number (20 chars) */
+      ofs = 10; w = 10; n = 10;
+      break;
+
+    default:
+      return RES_PARERR;
+  }
+
+  ATA_WRITE_CMD(ATA_CMD_IDENTIFY);
+  if (!ata_wait_data()) return RES_ERROR;
+  ata_read_part(ptr, ofs, w);
+  while (n--) {
+    dl = *ptr; dh = *(ptr+1);
+    *ptr++ = dh; *ptr++ = dl;
+  }
+
+  return RES_OK;
+}
+DRESULT disk_ioctl (BYTE drv, BYTE ctrl, void *buff) __attribute__ ((weak, alias("ata_ioctl")));
+#endif /*  _USE_IOCTL != 0 */
+
+DRESULT ata_getinfo(BYTE drv, BYTE page, void *buffer) {
+  diskinfo0_t *di = buffer;
+
+  if (page != 0)
+    return RES_ERROR;
+
+  ATA_WRITE_CMD(ATA_CMD_IDENTIFY);
+  if (!ata_wait_data()) return RES_ERROR;
+
+  ata_read_part((BYTE *)&di->sectorcount, 60, 2);
+
+  di->validbytes = sizeof(diskinfo0_t);
+  di->disktype   = DISK_TYPE_ATA;
+  di->sectorsize = 2;
+
+  return RES_OK;
+}
+DRESULT disk_getinfo(BYTE drv, BYTE page, void *buffer) __attribute__ ((weak, alias("ata_getinfo")));
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/atomic.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/atomic.h
new file mode 100644
index 00000000..2734c067
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/atomic.h
@@ -0,0 +1,31 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   atomic.h: Wrapper for atomic blocks
+
+*/
+
+#ifndef ATOMIC_H
+#define ATOMIC_H
+
+#include <util/atomic.h>
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/avrcompat.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/avrcompat.h
new file mode 100644
index 00000000..d3917e8e
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/avrcompat.h
@@ -0,0 +1,204 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   avrcompat.h: Compatibility defines for multiple target chips
+*/
+
+#ifndef AVRCOMPAT_H
+#define AVRCOMPAT_H
+
+/* USART */
+
+#if defined __AVR_ATmega644__  \
+ || defined __AVR_ATmega644P__ \
+ || defined __AVR_ATmega1281__ \
+ || defined __AVR_ATmega2561__ \
+ || defined __AVR_ATmega1284P__
+
+#  ifdef USE_UART1
+#    define RXC   RXC1
+#    define RXEN  RXEN1
+#    define TXC   TXC1
+#    define TXEN  TXEN1
+#    define UBRRH UBRR1H
+#    define UBRRL UBRR1L
+#    define UCSRA UCSR1A
+#    define UCSRB UCSR1B
+#    define UCSRC UCSR1C
+#    define UCSZ0 UCSZ10
+#    define UCSZ1 UCSZ11
+#    define UDR   UDR1
+#    define UDRIE UDRIE1
+#    define RXCIE RXCIE1
+#    define USART_UDRE_vect USART1_UDRE_vect
+#    define USART_RX_vect   USART1_RX_vect
+#  else
+     /* Default is USART0 */
+#    define RXC   RXC0
+#    define RXEN  RXEN0
+#    define TXC   TXC0
+#    define TXEN  TXEN0
+#    define UBRRH UBRR0H
+#    define UBRRL UBRR0L
+#    define UCSRA UCSR0A
+#    define UCSRB UCSR0B
+#    define UCSRC UCSR0C
+#    define UCSZ0 UCSZ00
+#    define UCSZ1 UCSZ01
+#    define UDR   UDR0
+#    define UDRIE UDRIE0
+#    define RXCIE RXCIE0
+#    define USART_UDRE_vect USART0_UDRE_vect
+#    define USART_RX_vect   USART0_RX_vect
+#  endif
+
+#elif defined __AVR_ATmega48__ || defined __AVR_ATmega88__ || defined __AVR_ATmega168__
+/* These chips include the USART number in their register names, */
+/* but not in the ISR name. */
+#    define RXC   RXC0
+#    define RXEN  RXEN0
+#    define TXC   TXC0
+#    define TXEN  TXEN0
+#    define UBRRH UBRR0H
+#    define UBRRL UBRR0L
+#    define UCSRA UCSR0A
+#    define UCSRB UCSR0B
+#    define UCSRC UCSR0C
+#    define UCSZ0 UCSZ00
+#    define UCSZ1 UCSZ01
+#    define UDR   UDR0
+#    define UDRIE UDRIE0
+
+#elif defined __AVR_ATmega32__
+#  define TIMER2_COMPA_vect TIMER2_COMP_vect
+#  define TCCR0B TCCR0
+#  define TCCR2A TCCR2
+#  define TCCR2B TCCR2
+#  define TIFR0  TIFR
+#  define TIMSK2 TIMSK
+#  define OCIE2A OCIE2
+#  define OCR2A  OCR2
+
+#elif defined __AVR_ATmega128__
+#  define UBRRH  UBRR0H
+#  define UBRRL  UBRR0L
+#  define UCSRA  UCSR0A
+#  define UCSRB  UCSR0B
+#  define UCSRC  UCSR0C
+#  define UDR    UDR0
+#  define USART_UDRE_vect USART0_UDRE_vect
+#  define TIMER2_COMPA_vect TIMER2_COMP_vect
+#  define TCCR0B TCCR0
+#  define TCCR2A TCCR2
+#  define TCCR2B TCCR2
+#  define TIFR0  TIFR
+#  define TIMSK1 TIMSK
+#  define TIMSK2 TIMSK
+#  define OCIE2A OCIE2
+#  define OCR2A  OCR2
+
+#else
+#  error Unknown chip! (USART)
+#endif
+
+/* SPI and I2C */
+#if defined __AVR_ATmega32__    \
+ || defined __AVR_ATmega644__   \
+ || defined __AVR_ATmega644P__  \
+ || defined __AVR_ATmega1284P__
+
+#  define SPI_PORT   PORTB
+#  define SPI_DDR    DDRB
+#  define SPI_SS     _BV(PB4)
+#  define SPI_MOSI   _BV(PB5)
+#  define SPI_MISO   _BV(PB6)
+#  define SPI_SCK    _BV(PB7)
+#  define HWI2C_PORT PORTC
+#  define HWI2C_SDA  _BV(PC1)
+#  define HWI2C_SCL  _BV(PC0)
+
+#elif defined __AVR_ATmega128__ || defined __AVR_ATmega1281__ || defined __AVR_ATmega2561__
+
+#  define SPI_PORT  PORTB
+#  define SPI_DDR   DDRB
+#  define SPI_SS    _BV(PB0)
+#  define SPI_SCK   _BV(PB1)
+#  define SPI_MOSI  _BV(PB2)
+#  define SPI_MISO  _BV(PB3)
+#  define HWI2C_PORT PORTD
+#  define HWI2C_SDA  _BV(PD1)
+#  define HWI2C_SCL  _BV(PD0)
+
+#elif defined __AVR_ATmega48__ || defined __AVR_ATmega88__ || defined __AVR_ATmega168__
+
+#  define SPI_PORT   PORTB
+#  define SPI_DDR    DDRB
+#  define SPI_SS     _BV(PB2)
+#  define SPI_SCK    _BV(PB5)
+#  define SPI_MOSI   _BV(PB3)
+#  define SPI_MISO   _BV(PB4)
+#  define HWI2C_PORT PORTC
+#  define HWI2C_SDA  _BV(PC4)
+#  define HWI2C_SCL  _BV(PC5)
+
+#else
+#  error Unknown chip! (SPI/TWI)
+#endif
+
+#define SPI_MASK (SPI_SS|SPI_MOSI|SPI_MISO|SPI_SCK)
+
+/* Fix for incompatible include in avr-libc for the 1284P */
+#if defined __AVR_ATmega1284P__ && !defined(PA0)
+#  define PA0 0
+#  define PA1 1
+#  define PA2 2
+#  define PA3 3
+#  define PA4 4
+#  define PA5 5
+#  define PA6 6
+#  define PA7 7
+#  define PB0 0
+#  define PB1 1
+#  define PB2 2
+#  define PB3 3
+#  define PB4 4
+#  define PB5 5
+#  define PB6 6
+#  define PB7 7
+#  define PC0 0
+#  define PC1 1
+#  define PC2 2
+#  define PC3 3
+#  define PC4 4
+#  define PC5 5
+#  define PC6 6
+#  define PC7 7
+#  define PD0 0
+#  define PD1 1
+#  define PD2 2
+#  define PD3 3
+#  define PD4 4
+#  define PD5 5
+#  define PD6 6
+#  define PD7 7
+#endif
+
+#endif /* AVRCOMPAT_H */
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/crc.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/crc.h
new file mode 100644
index 00000000..66db9394
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/crc.h
@@ -0,0 +1,46 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   crc.h: Definitions for CRC calculation routines (AVR version)
+
+*/
+
+#ifndef CRC_H
+#define CRC_H
+
+#include <util/crc16.h>
+
+uint8_t crc7update(uint8_t crc, uint8_t data);
+
+#define crc_xmodem_update(crc, data) _crc_xmodem_update(crc, data)
+#define crc16_update(crc, data) _crc16_update(crc, data)
+
+/* Calculate a CRC over a block of data - more efficient if inlined */
+static inline uint16_t crc_xmodem_block(uint16_t crc, const uint8_t *data, unsigned int length) {
+  while (length--) {
+    crc = _crc_xmodem_update(crc, *data++);
+  }
+  return crc;
+}
+
+
+#endif
+
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/crc7asm.S b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/crc7asm.S
new file mode 100644
index 00000000..15d55a49
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/crc7asm.S
@@ -0,0 +1,50 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN, see tff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   crc7asm.S: space-efficient CRC7 implementation for AVR
+
+*/
+
+        .section .text
+
+        .global crc7update
+        ;; uint8_t crc7update(uint8_t crc, uint8_t data)
+        ;;
+        ;; input : r24: crc, r22: data
+        ;; output: r24: new crc
+crc7update:
+        ldi     r18, 8       ; number of bits to process
+        ldi     r19, 0x09    ; CRC7 polynomial
+        ldi     r20, 0x80    ; constant for inverting the top bit of the CRC
+
+loop:   lsl     r24          ; shift CRC
+        lsl     r22          ; shift data byte
+        brcc    0f           ; jump if top data bit was 0
+        eor     r24, r20     ; invert top bit of CRC if not
+0:      bst     r24, 7       ; read top bit of CRC
+        brtc    1f           ; skip if top bit of CRC is now clear
+        eor     r24, r19     ; apply polynomial
+1:      dec     r18          ; decrement bit counter
+        brne    loop         ; loop for next bit
+        andi    r24, 0x7f    ; clear top bit of CRC
+        ret                  ; return
+
+        .end
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/fastloader-ll.S b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/fastloader-ll.S
new file mode 100644
index 00000000..c82a03ac
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/fastloader-ll.S
@@ -0,0 +1,1761 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+   Copyright (C) 2007-2008  M.Kiesel <mayne@users.sourceforge.net>
+   Final Cartridge III, DreamLoad fastloader support:
+   Copyright (C) 2008  Thomas Giesel <skoe@directbox.com>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN, see tff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   fastloader.S: Low level fastloader transfer routines.
+
+   Thanks to Jochen Adler for his Jiffy docs at http://www.nlq.de/
+
+*/
+
+
+#include "asmconfig.h"
+#include "fastloader.h"
+#include <avr/io.h>
+
+/* Timing offsets for JiffyDos read/write */
+/* These values are added to the delayloop counter before the first      */
+/* bitpair read/write. They were determined experimentally to center the */
+/* range of working OSCCAL values around the default value.              */
+#define JIFFY_OFFSET_WRITE 30
+#define JIFFY_OFFSET_READ  30
+
+        .section .text
+
+#if defined(IEC_ATN_INT_VECT) && defined(CONFIG_LOADER_DREAMLOAD)
+        ;; ===================================================================
+        ;; ATN(+CLK) Interrupt service routine for IEC bus
+        ;; ===================================================================
+        ;
+        ; Functions called from here may change these registers:
+        ; r0, r18, r19, r24
+        ; Other registers must be saved and restored by the called functions
+        ;
+        .global IEC_ATN_INT_VECT
+IEC_ATN_INT_VECT:
+        ; functions called from here must only change these registers:
+        push    r18
+        in      r18, _SFR_IO_ADDR(SREG)
+        push    r18
+        push    r19
+        push    r24
+        push    r0
+
+#ifdef IEC_PCMSK
+        lds     r18, _SFR_ADDR(IEC_PCMSK)
+        bst     r18, IEC_PIN_ATN        ; only check ATN
+        brtc    iiv_atn_irq_end         ; if it is an IRQ source
+#endif
+
+        ; check if ATN is low
+        sbic    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_ATN
+        rjmp    iiv_atn_irq_end
+
+        ; ATN is low, continue depending from active fast loader
+        lds     r18, detected_loader
+        cpi     r18, FLCODE_DREAMLOAD_OLD
+        brne    iiv_not_fl_dreamload_old
+        ; dreamload (old), receive a command code
+        rcall   dreamload_get_command_old
+        rjmp    iiv_atn_irq_end         ; no other ATN action needed
+
+iiv_not_fl_dreamload_old:
+        ; no custom behaviour, this is ATN ACK
+        sbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_DATA    ; DATA low
+
+iiv_atn_irq_end:
+#ifdef IEC_PCMSK
+        lds     r18, _SFR_ADDR(IEC_PCMSK)
+        bst     r18, IEC_PIN_CLOCK      ; only check CLOCK
+        brtc    iiv_clock_irq_end       ; if it is an IRQ source
+
+        ; check if CLOCK is low
+        sbic    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_CLOCK
+        rjmp    iiv_clock_irq_end
+
+        ; CLOCK is low, continue depending from active fast loader
+        lds     r18, detected_loader
+        cpi     r18, FLCODE_DREAMLOAD
+        brne    iiv_not_fl_dreamload
+        ; dreamload, receive a command code
+        rcall   dreamload_get_command
+        rjmp    iiv_clock_irq_end       ; no other CLOCK action needed
+
+iiv_not_fl_dreamload:
+#endif // ifdef IEC_PCMSK
+
+iiv_clock_irq_end:
+
+        pop     r0
+        pop     r24
+        pop     r19
+        pop     r18
+        out     _SFR_IO_ADDR(SREG), r18
+        pop     r18
+        reti
+#endif // ifdef IEC_ATN_INT_VECT
+
+
+#ifdef IEC_CLK_INT_VECT
+        ;; ===================================================================
+        ;; CLK Interrupt service routine for IEC bus
+        ;; ===================================================================
+        ;
+        ; Functions called from here may change these registers:
+        ; r0, r18, r19, r24
+        ; Other registers must be saved and restored by the called functions
+        ;
+        .global IEC_CLK_INT_VECT
+IEC_CLK_INT_VECT:
+        ; functions called from here must only change these registers:
+        push    r18
+        in      r18, _SFR_IO_ADDR(SREG)
+        push    r18
+        push    r19
+        push    r24
+        push    r0
+
+        ; check if CLOCK is low
+        sbic    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_CLOCK
+        rjmp    clk_irq_end
+
+        ; CLOCK is low, continue depending from active fast loader
+#ifdef CONFIG_LOADER_DREAMLOAD
+        lds     r18, detected_loader
+        cpi     r18, FLCODE_DREAMLOAD
+        brne    clk_not_fl_dreamload
+        ; dreamload, receive a command code
+        rcall   dreamload_get_command
+        rjmp    clk_irq_end       ; no other CLOCK action needed
+clk_not_fl_dreamload:
+#endif // ifdef CONFIG_LOADER_DREAMLOAD
+
+clk_irq_end:
+
+        pop     r0
+        pop     r24
+        pop     r19
+        pop     r18
+        out     _SFR_IO_ADDR(SREG), r18
+        pop     r18
+        reti
+#endif // ifdef IEC_CLK_INT_VECT
+
+
+        ;; ===================================================================
+        ;;  Utility routines
+        ;; ===================================================================
+
+        ;;  Used by the macro below, don't call directly
+cycleloop2:
+        nop                     ; 1
+cycleloop1:
+        nop                     ; 1
+cycleloop0:
+        dec     r18             ; 1
+        brne    cycleloop0      ; 2/1
+        ret                     ; 4
+
+        ;; This macro waits for the specified number of cycles
+        ;;  Uses r18
+        .macro delay_cycles num
+        ldi     r18, 1 + (\num - 10) / 3 ; 1
+        .if (\num - 10) % 3 == 0
+        rcall   cycleloop0      ; 3
+        .elseif (\num - 10) % 3 == 1
+        rcall   cycleloop1      ; 3
+        .else
+        rcall   cycleloop2      ; 3
+        .endif
+        .endm
+
+
+        ;; Including the rcall this will delay for 8 cycles
+delay1us:
+        nop                     ; 1
+        ret                     ; 4
+
+        ;; wait for ATN high
+wait_atn_high:
+        sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_ATN
+        rjmp    wait_atn_high
+        ret
+
+        ;; wait for ATN low
+wait_atn_low:
+        sbic    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_ATN
+        rjmp    wait_atn_low
+        ret
+
+
+        ;; ====================================================================
+        ;;  JiffyDOS
+        ;; ====================================================================
+
+        ;;
+        ;; Receives a single byte using the JiffyDOS protocol
+        ;; return uint8_t reveicedbyte (r24)
+        ;;
+        .global jiffy_receive
+jiffy_receive:
+        ;; Disable interrupts
+        cli
+
+        ;; Move pointer to EOF variable into Z
+        movw    r30,r24
+        clr     r24             ; clear output register
+        clr     r25             ; clear high byte of return value
+
+        ;; Set clock+data high
+        cbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_CLOCK
+        cbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_DATA
+
+        ;; Wait until clock is high and emulate ATN-Ack
+0:      sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_ATN
+        sbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_DATA ; Data low if ATN is low
+        sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_CLOCK
+        rjmp    0b
+
+        ;; Wait for 13us from clock high -> 104 cycles
+        delay_cycles 104 + JIFFY_OFFSET_READ ; 104 + Offset
+
+        ;; Read bit 5+4
+        in      r0, _SFR_IO_ADDR(IEC_INPUT) ; 1
+
+        ;; Store bits in r24
+        bst     r0, IEC_PIN_DATA  ; 1 - get data bit
+        bld     r24, 5            ; 1 - store as bit 5
+        bst     r0, IEC_PIN_CLOCK ; 1 - get clock bit
+        bld     r24, 4            ; 1 - store as bit 4
+
+        ;; Wait 13us -> 104-5=99 cycles
+        delay_cycles 99         ; 99
+
+        ;; Read bit 7+6
+        in      r0, _SFR_IO_ADDR(IEC_INPUT) ; 1
+
+        ;; Store bits in r24
+        bst     r0, IEC_PIN_DATA  ; 1 - get data bit
+        bld     r24, 7            ; 1 - store as bit 7
+        bst     r0, IEC_PIN_CLOCK ; 1 - get clock bit
+        bld     r24, 6            ; 1 - store as bit 6
+
+        ;; Wait 11us -> 88-5=83 cycles
+        delay_cycles 83         ; 83
+
+        ;; Read bit 1+3 [sic]
+        in      r0, _SFR_IO_ADDR(IEC_INPUT) ; 1
+        bst     r0, IEC_PIN_DATA  ; 1 - get data bit
+        bld     r24, 1            ; 1 - store as bit 1
+        bst     r0, IEC_PIN_CLOCK ; 1 - get clock bit
+        bld     r24, 3            ; 1 - store as bit 3
+
+        ;; Wait 13us -> 104-5=99 cycles
+        delay_cycles 99         ; 99
+
+        ;; Read Bit 0+2
+        in      r0, _SFR_IO_ADDR(IEC_INPUT) ; 1
+        bst     r0, IEC_PIN_DATA  ; 1 - get data bit
+        bld     r24, 0            ; 1 - store as bit 0
+        bst     r0, IEC_PIN_CLOCK ; 1 - get clock bit
+        bld     r24, 2            ; 1 - store as bit 2
+
+        ;; Wait 13us -> 104-5=99 cycles
+        delay_cycles 99         ; 99
+
+        ;; Read EOI mark
+        in      r19, _SFR_IO_ADDR(IEC_INPUT) ; 1
+
+        ;; Wait 6us -> 48-1=47 cycles
+        delay_cycles 47         ; 47
+
+        ;; Data low
+        sbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_DATA ; 1
+        delay_cycles 10*8       ; make sure the C64 can see that
+
+        ;; Post-process data and store last bus state
+        com     r24             ; invert received data (result)
+        st      Z, r19          ; store last bus state
+        sei                     ; enable interrupts
+        ret
+
+
+
+        ;; Shifts the lowest two bits from r0 to r19
+        ;; and sends then on the bus at cycle 12
+        ;; Needs 16 cycles including the rcall
+jiffy_sendbits:
+        in      r19, _SFR_IO_ADDR(IEC_OUTPUT) ; 1 - read port
+        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+                                    ; 1 - mask IEC bits
+        bst     r0, 0               ; 1 - get bit 0
+        bld     r19, IEC_OPIN_CLOCK ; 1 - send on the clock line
+        bst     r0, 1               ; 1 - get bit 1
+        bld     r19, IEC_OPIN_DATA  ; 1 - send on the data line
+        lsr     r0                  ; 1 - remove source bits
+        lsr     r0                  ; 1
+        out     _SFR_IO_ADDR(IEC_OUTPUT), r19 ; 1 - output the bit pair
+        ret                         ; 4
+
+        ;;
+        ;; Sends a single byte using the Jiffy protocol
+        ;; uint8_t value (r24), uint8_t eoi (r22), uint8_t loadflags (r20)
+        ;; return uint8_t atnactive (r24)
+        ;;
+        ;; eoi should always be 0 for LOAD because the eoi marker is
+        ;; transmitted in a different way there (see C code).
+        ;;
+        ;; Loadflags has a dual purpose:
+        ;;  - if it's != 0, the start condition will be modified for Jiffy-LOAD
+        ;;  - bit 7 will be cleared after that
+        ;;  - if it's still != 0, the function will exit after sending
+        ;;    the last bitpair - required for all but the final byte of a block
+        ;;    during LOAD
+        .global jiffy_send
+jiffy_send:
+        cli                     ; Disable interrupts
+
+        ;; Calculate bus wait condition based on current state
+        ;; The loop below will spin while ATN and Clock are high and
+        ;; - Data is low  (single-byte transfer)
+        ;; - Data is high (LOAD)
+        ldi     r21, IEC_BIT_CLOCK | IEC_BIT_ATN
+        tst     r20             ; loadflag set?
+        breq    0f              ; Yes, skip
+                ; No: Set data bit
+        ori     r21, IEC_BIT_DATA
+
+0:      andi    r20, 0x7f       ; Clear bit 7 of loadflags
+
+        ;; Calculate bus state for EOI/not-EOI mark
+        tst     r22             ; EOI flag set?
+        breq    0f              ; No, branch
+
+        in      r22, _SFR_IO_ADDR(IEC_OUTPUT)
+        andi    r22, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+        ori     r22, IEC_OBIT_DATA ; Data low, Clock hi on EOI
+        rjmp    1f
+
+0:      in      r22, _SFR_IO_ADDR(IEC_OUTPUT)
+        andi    r22, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+        ori     r22, IEC_OBIT_CLOCK ; Data hi, Clock low on non-EOI
+
+1:
+        ;; Set clock and data high/inactive - FFB5
+        cbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_DATA
+                ; this is the actual ready signal for the C64
+        cbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_CLOCK
+
+        ;; Wait 1us to allow the bus to settle (J1541 needs 4us here)
+        rcall   delay1us
+
+        ;; Set up a few registers
+        mov     r0, r24         ; move data byte to r0
+        com     r0              ; invert data byte
+
+        ;; Wait for start condition (calculated above) from C64 - FFB8
+0:      in      r24, _SFR_IO_ADDR(IEC_INPUT)
+        andi    r24, IEC_BIT_CLOCK | IEC_BIT_DATA | IEC_BIT_ATN ; 1
+        cp      r24, r21        ; 1
+        breq    0b              ; 1
+
+        ;; Check for ATN (J1541 doesn't do this, but I'm paranoid)
+        ;; Doesn't work, further analysis required
+        andi    r24, IEC_BIT_ATN ; 1
+        breq    js_finish        ; 1 - jump if ATN is low
+
+        ;; Output the first bitpair 6us (48 cycles) after the start
+        ;; 6us is the best-case time from bus check to transmission in J1541
+        delay_cycles 31 + JIFFY_OFFSET_WRITE
+                                ; 31 = 48-17
+        rcall   jiffy_sendbits  ; 12+4 - [FFBD]
+
+        ;; Output the second bitpair 10us (80 cycles) after the first
+        delay_cycles 64         ; 64 = 80-16
+
+        rcall   jiffy_sendbits  ; 12+4 - [FFC4]
+
+        ;; Output the third bitpair 11us (88 cycles) after the second
+        delay_cycles 72         ; 72 = 88-16
+
+        rcall   jiffy_sendbits  ; 12+4 - [FFCC]
+
+        ;; Output the fourth bitpair 10us (80 cycles) after the third
+        delay_cycles 64         ; 64 = 80-16
+
+        rcall   jiffy_sendbits  ; 12+4 - [FFD3]
+
+        ;; Skip sending EOI for LOAD code path
+        tst     r20             ; 1
+        brne    js_finish       ; 1
+
+        ;; Output EOI marker 11us (88 cycles) after the last bitpair
+        delay_cycles 81         ; 81 = 88-7
+
+        out     _SFR_IO_ADDR(IEC_OUTPUT), r22 ; 1 - output EOI marker [FFDB]
+
+        ;; Wait 1us to allow the bus to settle (J1541 needs 4us here)
+        rcall   delay1us
+
+        ;; Wait until data is low, check ATN [FFDE]
+        ;; This loop won't wait when EOI is signalled.
+0:      in      r24, _SFR_IO_ADDR(IEC_INPUT) ; Read bus
+        sbrs    r24, IEC_PIN_ATN           ; Skip if ATN is high
+        rjmp    js_finish                  ; ATN low, exit loop
+        sbrc    r24, IEC_PIN_DATA          ; Skip if Data is low
+        rjmp    0b                         ; No Data, no ATN -> loop
+
+js_finish:
+        com     r24             ; invert port state (ATN low returns true)
+        andi    r24, IEC_BIT_ATN ; single out ATN bit
+
+        sei                     ; re-enable interrupts
+        ret
+
+
+#ifdef CONFIG_LOADER_TURBODISK
+        ;; ====================================================================
+        ;;  Turbodisk
+        ;; ====================================================================
+
+        ;;
+        ;; Sends a single byte in r24 using the Turbodisk protocol
+        ;;
+        .global turbodisk_byte
+turbodisk_byte:
+        ;; Wait until data is low
+        sbic    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_DATA
+        rjmp    turbodisk_byte
+
+        ;; Byte preparation
+        com     r24             ; Invert the data byte
+
+        ;; All bus lines high
+        in      r18, _SFR_IO_ADDR(IEC_OUTPUT)
+        andi    r18, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+        out     _SFR_IO_ADDR(IEC_OUTPUT), r18
+
+        ;; Wait until data is high
+0:      sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_DATA ; 2
+        rjmp    0b
+
+        rcall   delay1us        ; Move the timing window slightly
+
+        ldi     r20, 4          ; 1 - Bitpair counter
+
+tdbitloop:
+        in      r19, _SFR_IO_ADDR(IEC_OUTPUT) ; 1 - read & mask unused IEC port lines
+        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ) ; 1
+        bst     r24, 7              ; 1 - grab bit 7
+        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+        bst     r24, 6              ; 1 - grab bit 6
+        bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+        lsl     r24                 ; 1 - remove source bits
+        lsl     r24                 ; 1
+
+        ;; Wait for 28us from data high -> 224-9=215 cycles
+        delay_cycles 215        ; 215
+
+        out     _SFR_IO_ADDR(IEC_OUTPUT), r19      ; 1 - output the bit pair
+
+        rcall   delay1us        ; 8 - additional us for loops 2-4
+
+        dec     r20             ; 1 - Decrement bitpair counter
+        brne    tdbitloop       ; 2/1 - loop until done
+
+        ;; Wait for 26us from last bitpair -> 208-12=196 cycles
+        delay_cycles 196        ; 196
+
+        ;; Data high, Clock low
+        in      r18, _SFR_IO_ADDR(IEC_OUTPUT)
+        andi    r18, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+        ori     r18, IEC_OBIT_CLOCK
+        out     _SFR_IO_ADDR(IEC_OUTPUT), r18
+
+        ret
+
+
+        ;;
+        ;; Sends a complete buffer of r22 bytes at r24/r25 using the Turbodisk protocol
+        ;;
+        .global turbodisk_buffer
+turbodisk_buffer:
+        ;; Wait until data is low
+        sbic    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_DATA
+        rjmp    turbodisk_buffer
+
+        ;; All bus lines high
+        in      r18, _SFR_IO_ADDR(IEC_OUTPUT)
+        andi    r18, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+        out     _SFR_IO_ADDR(IEC_OUTPUT), r18
+
+        movw    r30,r24         ; output pointer
+
+        ;; Wait until data is high
+0:      sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_DATA ; 2
+        rjmp    0b
+
+        ;; Initial delay of 4 us + move the timing window by 1 us for stability
+        delay_cycles (4+1)*8    ; 40
+
+        ;; 287 AVR cycles from here to first LDA $DD00 on C64 side ($F822)
+tdbyteloop:
+        ld      r0, Z+          ; 2 - load byte
+        ldi     r20, 4          ; 1 - bitpair counter
+        com     r0              ; 1 - invert data byte
+
+        ;; Waste another 12 us -> 96-4=92 cycles
+        delay_cycles 92         ; 92
+
+tdbitloop2:
+        in      r19, _SFR_IO_ADDR(IEC_OUTPUT) ; 1 - read & mask unused IEC port lines
+        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ) ; 1
+        bst     r0, 7               ; 1 - grab bit 7
+        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+        bst     r0, 6               ; 1 - grab bit 6
+        bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+        lsl     r0                  ; 1 - remove source bits
+        lsl     r0                  ; 1
+
+        ;; Wait another 24 us -> 192-9=183 cycles
+        delay_cycles 183        ; 183
+
+        out     _SFR_IO_ADDR(IEC_OUTPUT), r19      ; 1 - output the bit pair
+
+        ;; 5 us -> 40-3=37 cycles
+        delay_cycles 37         ; 37
+
+        dec     r20             ; 1 - Decrement bitpair counter
+        brne    tdbitloop2      ; 2/1 - loop until done
+
+        ;; Wait 10 us -> 80-3+1=78 cycles
+        delay_cycles 78         ; 78
+
+        dec     r22             ; 1 - Decrement byte counter
+        brne    tdbyteloop      ; 2/1 - loop until done
+
+        ;; Final delay: 11 us -> 88 cycles
+        delay_cycles 88         ; 88
+
+        ;; Data high, Clock low
+        in      r18, _SFR_IO_ADDR(IEC_OUTPUT)
+        andi    r18, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+        ori     r18, IEC_OBIT_CLOCK
+        out     _SFR_IO_ADDR(IEC_OUTPUT), r18
+
+        ret
+#endif
+
+#if defined(CONFIG_LOADER_DREAMLOAD) || defined(CONFIG_LOADER_FC3) || defined(CONFIG_LOADER_ULOAD3) || defined(CONFIG_LOADER_ELOAD1) || defined(CONFIG_LOADER_GEOS)
+        ;;
+        ;; Set bit 0 of r0 on CLOCK and bit 1 on DATA
+        ;; A bit value of one means pull down
+        ;; After sending these two bits r0 is shifted right two bits
+        ;;
+        ;; r19 is used as scratch reg here
+        ;;
+        ;; Takes 10 cycles before OUT (incl. rcall)
+        ;; Takes 6 cycles to return after OUT
+        ;;
+send_bits_to_clk_data:
+        ; rcall                  ; 3
+        in   r19, _SFR_IO_ADDR(IEC_OUTPUT) ; 1 - read & mask unused IEC port lines
+        andi r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ) ; 1
+        bst  r0, 0               ; 1 - take bit 0 (lsb)
+        bld  r19, IEC_OPIN_CLOCK ; 1 - for CLOCK line
+        bst  r0, 1               ; 1 - take bit 1
+        bld  r19, IEC_OPIN_DATA  ; 1 - for DATA line
+        out  _SFR_IO_ADDR(IEC_OUTPUT), r19 ; 1 - output the bit pair
+
+        lsr  r0                  ; 1
+        lsr  r0                  ; 1 - prepare next two bits
+
+        ret                      ; 4
+
+        ;;
+        ;; Get DATA  => bit 0
+        ;; and CLOCK => bit 2 of r24
+        ;; Low level means value 0 here
+        ;;
+        ;; r19 is used as scratch reg here
+        ;;
+        ;; Takes 4 cycles before IN (incl. rcall)
+        ;; Takes 8 cycles to return after IN
+        ;;
+get_bits_from_clk_data:
+        ; rcall                         ; 3
+        in      r19, _SFR_IO_ADDR(IEC_INPUT)  ; 1
+        bst     r19, IEC_PIN_DATA       ; 1
+        bld     r24, 0                  ; 1
+        bst     r19, IEC_PIN_CLOCK      ; 1
+        bld     r24, 2                  ; 1
+        ret                             ; 4
+
+#endif
+
+#if defined(CONFIG_LOADER_FC3) || defined(CONFIG_LOADER_ULOAD3) || defined(CONFIG_LOADER_ELOAD1)
+        ;;
+        ;; Do this kind of handshake:
+        ;; set CLOCK low, wait for DATA going low,
+        ;; release CLOCK, wait for DATA going high
+        ;; returns without waiting if ATN is low
+        ;;
+        ;; cycles from DATA high to return to caller: 5-10
+        ;;
+        .global clk_data_handshake
+clk_data_handshake:
+        sbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_CLOCK
+1:
+        sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_ATN
+        rjmp    2f
+        sbic    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_DATA
+        rjmp    1b
+        cbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_CLOCK
+1:
+        sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_ATN
+        rjmp    2f
+        sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_DATA
+        rjmp    1b
+2:
+        ret
+#endif
+
+#ifdef CONFIG_LOADER_FC3
+        ;;
+        ;; Sends four bytes at r24/r25 using the FC3 protocol
+        ;;
+        .global fastloader_fc3_send_block
+fastloader_fc3_send_block:
+        cli
+        movw    r30,r24         ; Z = output pointer
+
+        ; pull CLOCK low for sync
+        sbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_CLOCK ; 1
+
+        ; 12 us between sync and bitpair
+        delay_cycles 12 * 8 - 14 ; 83
+
+        ldi     r21, 4          ; 1 - byte counter
+fc3_byteloop:
+        ld      r0, Z+          ; 2 - load byte
+
+        com     r0              ; 1 - negate all bits
+
+        ldi     r20, 4          ; 1 - bitpair counter
+fc3_bitloop:
+        ; send r0[0,1] to CLOCK and DATA, shift r0 right two times
+        ; changes r19
+        rcall   send_bits_to_clk_data ; 10 + 6
+
+        ; wait 12 us between bitpair
+        delay_cycles 12*8-19
+
+        dec     r20             ; 1 - decrement bitpair counter
+        brne    fc3_bitloop     ; 2/1 - loop until done
+fc3_next_byte:
+        ; wait 2 us more between two bytes (16 cycles = -1 + 17)
+        rcall   delay1us        ; 8
+        rjmp    0f              ; 2
+0:
+        dec     r21             ; 1 - decrement byte counter
+        brne    fc3_byteloop    ; 2/1 - loop until done
+
+        ; release CLOCK and DATA
+        in      r19, _SFR_IO_ADDR(IEC_OUTPUT) ; read & mask unused IEC port lines
+        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+        out     _SFR_IO_ADDR(IEC_OUTPUT), r19 ; release CLOCK and DATA
+
+        sei
+        ret
+
+        ;;
+        ;; Receive one byte using the FC3 save protocol
+        ;;
+        .global fc3_get_byte
+fc3_get_byte:
+        cli
+
+        clr     r24     ; clear data byte
+
+        ; wait a moment before releasing data, otherwise the loop would run
+        ; too fast. I confess that this value is guessed.
+        delay_cycles 10 * 8
+
+        ; release DATA
+        cbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_DATA
+
+        ; wait until CLOCK goes high
+1:
+        sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_CLOCK ; 1/2?
+        rjmp    1b
+
+        ; 17 us later...
+        delay_cycles 17 * 8 - 6
+
+        ; get bits 5,7 @ 0,2 - changes r19
+        rcall   get_bits_from_clk_data  ; 4 + 8 r24 = .....7.5
+        lsl     r24                     ; 1     r24 = ....7.5.
+
+        ; 13 us later...
+        delay_cycles 13 * 8 - 13
+
+        ; get bits 4,6 @ 0,2 - changes r19
+        rcall   get_bits_from_clk_data  ; 4 + 8 r24 = ....7654
+        swap    r24                     ; 1     r24 = 7654....
+        lsr     r24                     ; 1     r24 = .7654...
+
+        ; 12 us later...
+        delay_cycles 12 * 8 - 14
+
+        ; get bits 1,3 @ 0,2 - changes r19
+        rcall   get_bits_from_clk_data  ; 4 + 8 r24 = .76543.1
+        lsl     r24                     ; 1     r24 = 76543.1.
+
+        ; 10 us later...
+        delay_cycles 10 * 8 - 13
+
+        ; get bits 0,2 @ 0,2 - changes r19
+        rcall   get_bits_from_clk_data  ; 4 + 8 r24 = 76543210
+
+        ; Pull DATA down
+        sbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_DATA
+
+        sei
+        com     r24     ; negate all bits
+        clr     r25     ; clear hi-byte of return val
+        ret
+
+
+        ;;
+        ;; Send one byte using the old FC3 freezer protocol, PAL version
+        ;;
+        .global fc3_oldfreeze_pal_send
+fc3_oldfreeze_pal_send:
+        cli
+        mov     r0, r24         ; bitpair subroutine expects data in r0
+
+        ;; clear busy signal
+        cbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_DATA
+
+        ;; wait for start signal (clock low->high)
+1:      sbic    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_CLOCK
+        rjmp    1b
+
+2:      sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_CLOCK
+        rjmp    2b
+
+        ;; send bits 0+1
+        delay_cycles 14 * 8 - 10
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; send bits 2+3
+        delay_cycles (22 - 14) * 8 - 16
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; send bits 4+5
+        delay_cycles (30 - 22) * 8 - 16
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; send bits 6+7
+        delay_cycles (38 - 30) * 8 - 16
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; hold time before re-enabling busy
+        delay_cycles (46 - 38) * 8 - 6 - 1
+        cbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_CLOCK ; 1
+        sbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_DATA  ; 1
+        rcall   delay1us
+
+        ;; return inverted ATN state in r24
+        in      r24, _SFR_IO_ADDR(IEC_INPUT)
+        com     r24
+        andi    r24, IEC_BIT_ATN
+        sei
+        ret
+
+
+        ;;
+        ;; Send one byte using the old FC3 freezer protocol, NTSC version
+        ;;
+        .global fc3_oldfreeze_ntsc_send
+fc3_oldfreeze_ntsc_send:
+        cli
+        mov     r0, r24         ; bitpair subroutine expects data in r0
+
+        ;; clear busy signal
+        cbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_DATA
+
+        ;; wait for start signal (clock low->high)
+1:      sbic    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_CLOCK
+        rjmp    1b
+
+2:      sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_CLOCK
+        rjmp    2b
+
+        ;; send bits 0+1
+        delay_cycles 14 * 8 - 10
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; send bits 2+3
+        delay_cycles (24 - 14) * 8 - 16
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; send bits 4+5
+        delay_cycles (34 - 24) * 8 - 16
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; send bits 6+7
+        delay_cycles (44 - 34) * 8 - 16
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; hold time before re-enabling busy
+        delay_cycles (52 - 44) * 8 - 6 - 1
+        cbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_CLOCK ; 1
+        sbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_DATA  ; 1
+        rcall   delay1us
+
+        ;; return inverted ATN state in r24
+        in      r24, _SFR_IO_ADDR(IEC_INPUT)
+        com     r24
+        andi    r24, IEC_BIT_ATN
+        sei
+        ret
+#endif
+
+
+#ifdef CONFIG_LOADER_DREAMLOAD
+        ;;
+        ;; Receive a command (track/sector) using the DreamLoad protocol
+        ;;
+dreamload_get_command:
+        rcall   dreamload_get_byte
+        sts     fl_track, r24
+        rcall   dreamload_get_byte
+        sts     fl_sector, r24
+        ret
+
+        ;;
+        ;; Receive a byte using the DreamLoad protocol
+        ;;
+        .global dreamload_get_byte
+dreamload_get_byte:
+
+        ldi     r18, 4  ; 4 * 2 bits to load
+dl_bitloop:
+        ; wait until clock goes low
+1:
+        sbic    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_CLOCK
+        rjmp    1b
+
+        lsl     r24
+
+        ; read data a short time later
+        in      r19, _SFR_IO_ADDR(IEC_INPUT)
+        bst     r19, IEC_PIN_DATA
+        bld     r24, 0
+
+        ; wait until clock goes high
+2:
+        sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_CLOCK
+        rjmp    2b
+
+        lsl     r24
+
+        ; read data a short time later
+        in      r19, _SFR_IO_ADDR(IEC_INPUT)
+        bst     r19, IEC_PIN_DATA
+        bld     r24, 0
+
+        dec     r18
+        brne     dl_bitloop
+
+        com     r24     ; negate all bits
+        ret
+
+        ;;
+        ;; Receive a command (track/sector) using the old DreamLoad protocol
+        ;;
+dreamload_get_command_old:
+        rcall   dreamload_get_byte_old
+        sts     fl_track, r24
+        rcall   dreamload_get_byte_old
+        sts     fl_sector, r24
+        ret
+
+        ;;
+        ;; Receive a byte using the old DreamLoad protocol
+        ;;
+dreamload_get_byte_old:
+        ; 2 nibbles
+        ldi     r18, 2
+dlgb_nibble:
+        swap    r24                     ; 2nd loop: r24 = 7654....
+        lsr     r24                     ; 2nd loop: r24 = .7654...
+
+        rcall   wait_atn_low
+        ; 1st: get bits 5,7 @ 0,2 / 2nd: get bits 1,3 @ 0,2 - changes r19
+        rcall   get_bits_from_clk_data  ; 1st: r24 = .....7.5 / 2nd: .76543.1
+        lsl     r24                     ; 1st: r24 = ....7.5. / 2nd: 76543.1.
+
+        rcall   wait_atn_high
+        ; 1st: get bits 4,6 @ 0,2 / 2nd: get bits 0,2 @ 0,2 - changes r19
+        rcall   get_bits_from_clk_data  ; 1st: r24 = ....7654 / 2nd: 76543210
+
+        dec     r18
+        brne    dlgb_nibble
+
+        com     r24     ; negate all bits
+        ret
+
+        ;;
+        ;; Send the byte in r24 using the DreamLoad protocol
+        ;;
+        .global dreamload_send_byte
+dreamload_send_byte:
+
+        ; inverse all bits
+        mov     r0, r24
+        com     r0
+
+        ldi     r18, 2          ; loop counter
+
+dsb_bitloop:
+        ; send r0[0,1] to CLOCK and DATA, shift r0 right two times
+        ; changes r19
+        rcall   send_bits_to_clk_data
+        rcall   wait_atn_low
+
+        ; send r0[0,1] to CLOCK and DATA, shift r0 right two times
+        ; changes r19
+        rcall   send_bits_to_clk_data
+        rcall   wait_atn_high
+
+        dec     r18             ; decrement bitpair counter
+        brne    dsb_bitloop     ; loop until done
+        ret
+#endif
+
+#if defined CONFIG_LOADER_ULOAD3 || defined CONFIG_LOADER_ELOAD1
+        ;;
+        ;; Receive a byte using the ULoad Model 3 protocol
+        ;;
+        .global uload3_get_byte
+uload3_get_byte:
+        cli
+        ldi     r25, 0xff       ; prepare a negative return value
+        clr     r24
+        rcall   clk_data_handshake
+        sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_ATN ;skip ret if ATN is high
+        rjmp    uload3_abort                       ;return if ATN is low
+
+        ;; assuming an average of 10 cycles between DATA high and the following instruction
+        delay_cycles 14 * 8 - 10 - 4
+
+        ;; read bits 7/5
+        rcall   get_bits_from_clk_data ;4+8 r24 = _____7_5
+        lsl     r24                    ;1   r24 = ____7_5_
+
+        delay_cycles 10 * 8 - 13
+
+        ;; read bits 6/4
+        rcall   get_bits_from_clk_data ;4+8 r24 = ____7654
+        swap    r24                    ;1   r24 = 7654____
+        lsr     r24                    ;1   r24 = _7654___
+
+        delay_cycles 14 * 8 - 14
+
+        ;; read bits 3/1
+        rcall   get_bits_from_clk_data ;4+8 r24 = _76543_1
+        lsl     r24                    ;1   r24 = 76543_1_
+
+        delay_cycles 10 * 8 - 13
+
+        ;; read bits 2/0
+        rcall   get_bits_from_clk_data ;4+8 r24 = 76543210
+
+        delay_cycles 20*8       ; wait a bit so the C64 can return the bus to idle state
+
+        clr     r25             ; clear upper byte of return value
+        com     r24             ; invert data byte
+
+uload3_abort:
+        sei
+        ret
+
+
+        ;;
+        ;; Send a byte using the ULoad Model 3 protocol
+        ;;
+        .global uload3_send_byte
+uload3_send_byte:
+        cli
+
+        ;; DATA low
+        sbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_DATA
+
+        ;; wait for CLOCK low
+1:      sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_ATN
+        rjmp    2f
+        sbic    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_CLOCK
+        rjmp    1b
+
+        ;; DATA high
+        cbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_DATA
+
+        ;; wait for CLOCK high - 2 to 7 cycles, assuming 5
+1:
+        sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_ATN
+        rjmp    2f
+        sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_CLOCK
+        rjmp    1b
+
+        ;; prepare transmission
+        mov     r0, r24         ;1 - move data to output register
+        com     r0              ;1 - invert byte
+        ldi     r24, 4          ;1 - number of loops
+        delay_cycles (14-8) * 8 - 8 + 6 + 3 ; initial delay before first bit pair
+
+uload3_bitloop:
+        delay_cycles 8 * 8 - 16 - 3   ; delay between bit pairs
+        rcall   send_bits_to_clk_data ;10+6
+        dec     r24                   ;1 - decrement pair counter
+        brne    uload3_bitloop        ;2 - continue loop
+
+        delay_cycles 10*8 - 9   ; delay before releasing clock/data
+
+        ;; release CLOCK+DATA
+        cbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_CLOCK
+        cbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_DATA
+        rcall   delay1us        ; safety
+2:
+        sei
+        ret
+#endif
+
+#ifdef CONFIG_LOADER_EPYXCART
+        ;; send bits 7 and 5 of r0 to clock/data
+        ;; masked contents of IEC_OUTPUT expected in r19
+        ;; 8 cycles from rcall to out, 4 to return
+epyx_bitpair:
+        ;; rcall - 3
+        bst     r0, 7                      ; 1
+        bld     r19, IEC_OPIN_CLOCK        ; 1
+        bst     r0, 5                      ; 1
+        bld     r19, IEC_OPIN_DATA         ; 1
+        out     _SFR_IO_ADDR(IEC_OUTPUT), r19 ; 1
+        ret                                ; 4
+
+        ;;
+        ;; Send a byte using the Epyx Fastload cartridge protocol
+        ;;
+        .global epyxcart_send_byte
+epyxcart_send_byte:
+        ;; DATA and CLOCK high
+        cbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_DATA
+        cbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_CLOCK
+        rcall   delay1us
+
+        ;; prepare data
+        in      r19, _SFR_IO_ADDR(IEC_OUTPUT)
+        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+
+        ;; wait for DATA high or ATN low
+1:      sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_ATN
+        rjmp    epyxcart_atnabort
+        sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_DATA
+        rjmp    1b
+
+        mov     r0, r24             ; 1
+        delay_cycles (10*8 - 9)
+        rcall   epyx_bitpair        ; 8+4 - bits 7 and 5
+
+        lsl     r0                  ; 1
+        delay_cycles (10*8 - 13)
+        rcall   epyx_bitpair        ; 8+4 - bits 6 and 4
+
+        swap    r24                 ; 1
+        mov     r0, r24             ; 1
+        delay_cycles (10*8 - 14)
+        rcall   epyx_bitpair        ; 8+4 - bits 3 and 1
+
+        lsl     r0                  ; 1
+        delay_cycles (10*8 - 13)
+        rcall   epyx_bitpair        ; 8+4 - bits 2 and 0
+
+        delay_cycles 20*8  ; final delay so the data stays valid long enough
+
+        clr     r24
+        ret
+
+epyxcart_atnabort:
+        ldi     r24, 1
+        ret
+
+#endif
+
+#ifdef CONFIG_LOADER_GEOS
+        ;;
+        ;; read a byte using the GEOS protocol (common part)
+        ;;
+geos_get_byte_common:
+        clr     r24
+
+        ;; wait until clock is high
+1:      sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_CLOCK
+        rjmp    1b
+
+        ;; wait until clock is low
+1:      sbic    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_CLOCK ; 1/2
+        rjmp    1b
+
+        ;; delay
+        delay_cycles 15*8 - 2
+
+        ;; get bits 4 and 5
+        in      r19, _SFR_IO_ADDR(IEC_INPUT) ; 1
+        bst     r19, IEC_PIN_CLOCK         ; 1
+        bld     r24, 4-1                   ; 1 - r24 = ....4...
+        bst     r19, IEC_PIN_DATA          ; 1
+        bld     r24, 5-1                   ; 1 - r24 = ...54...
+
+        ;; delay
+        delay_cycles 14*8 - 5
+
+        ;; get bits 6 and 7
+        in      r19, _SFR_IO_ADDR(IEC_INPUT) ; 1
+        bst     r19, IEC_PIN_CLOCK         ; 1
+        bld     r24, 6-1                   ; 1 - r24 = ..654...
+        bst     r19, IEC_PIN_DATA          ; 1
+        bld     r24, 7-1                   ; 1 - r24 = .7654...
+
+        ret                                ; 4
+
+        ;;
+        ;; read a byte using the GEOS 1MHz (1541) protocol
+        ;;
+        .global geos_get_byte_1mhz
+geos_get_byte_1mhz:
+        rcall   geos_get_byte_common   ; 3
+
+        ;; delay
+        delay_cycles 14*8 - 9 - 4
+
+        ;; get bits 3 and 1
+        rcall   get_bits_from_clk_data ; 4+8 - r24 = .76543.1
+        lsl     r24                    ; 1     r24 = 76543.1.
+
+        ;; delay
+        delay_cycles 16*8 - 9 - 4
+
+        ;; get bits 2 and 0
+        rcall   get_bits_from_clk_data ; 4+8 - r24 = 76543210
+
+        ;; post-process received value and return
+        delay_cycles 11*8
+        com     r24             ; negate all bits
+        clr     r25             ; clear high byte of return value
+        ret
+
+
+        ;;
+        ;; read a byte using the GEOS 2MHz (1571/81) protocol
+        ;;
+        .global geos_get_byte_2mhz
+geos_get_byte_2mhz:
+        rcall   geos_get_byte_common   ; 3
+
+        ;; delay
+        delay_cycles 19*4 - 9 - 4
+
+        ;; get bits 3 and 1
+        rcall   get_bits_from_clk_data ; 4+8 - r24 = .76543.1
+        lsl     r24                    ; 1     r24 = 76543.1.
+
+        ;; delay
+        delay_cycles 22*4 - 9 - 4
+
+        ;; get bits 2 and 0
+        rcall   get_bits_from_clk_data ; 4+8 - r24 = 76543210
+
+        ;;  post process received value and return
+        delay_cycles 11*8
+        com     r24             ; negate all bits
+        clr     r25             ; clear high byte of return value
+        ret
+
+
+        ;;
+        ;; common part of all geos_send_byte implementations
+        ;;  returns 7 cycles after clock low
+        ;;
+geos_send_byte_common:
+        ;; CLOCK/DATA high
+        cbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_CLOCK
+        cbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_DATA
+        rcall   delay1us
+
+        ;; wait until CLOCK is low
+1:      sbic    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_CLOCK
+        rjmp    1b
+
+        ;; preserve non-IEC lines on IEC_OUTPUT port
+        in      r19, _SFR_IO_ADDR(IEC_OUTPUT) ; 1
+        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ) ; 1
+        mov     r0, r19             ; 1
+        ret                         ; 4
+
+        ;;
+        ;; send a byte using the GEOS 1MHz protocol
+        ;; called with byte in r24, return value undefined
+        ;;
+        .global geos_send_byte_1mhz
+geos_send_byte_1mhz:
+        rcall   geos_send_byte_common ; 7
+
+        ;; prepare bits 3+1
+        bst     r24, 3              ; 1 - read bit 3
+        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+        bst     r24, 1              ; 1 - read bit 1
+        bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+
+        ;; delay (1MHz speeder)
+        delay_cycles 18*8 - 14
+        rjmp    geos_send_byte_tail   ; 2
+
+
+        ;;
+        ;; send a byte using the GEOS 2MHz protocol
+        ;; called with byte in r24, return value undefined
+        ;;
+        .global geos_send_byte_2mhz
+geos_send_byte_2mhz:
+        rcall   geos_send_byte_common ; 7
+
+        ;; prepare bits 3+1
+        bst     r24, 3              ; 1 - read bit 3
+        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+        bst     r24, 1              ; 1 - read bit 1
+        bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+
+        ;; delay (2MHz speeder)
+1:      delay_cycles 9*8 - 12
+
+geos_send_byte_tail:
+        ;; send to bus
+        out     _SFR_IO_ADDR(IEC_OUTPUT), r19 ; 1 - send to bus
+
+        ;; prepare bits 2+0
+        mov     r19, r0             ; 1
+        bst     r24, 2              ; 1 - read bit 2
+        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+        bst     r24, 0              ; 1 - read bit 0
+        bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+
+        ;; delay
+        delay_cycles 10*8 - 6
+
+        ;; send to bus
+        out     _SFR_IO_ADDR(IEC_OUTPUT), r19 ; 1
+
+        ;; prepare bits 4+5
+        com     r24                 ; 1 - remaining bits are sent with high=1
+        mov     r19, r0             ; 1
+        bst     r24, 4              ; 1 - read bit 4
+        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+        bst     r24, 5              ; 1 - read bit 5
+        bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+
+        ;; delay
+        delay_cycles 11*8 - 7
+
+        ;; send to bus
+        out     _SFR_IO_ADDR(IEC_OUTPUT), r19 ; 1
+
+        ;; prepare bits 6+7
+        mov     r19, r0             ; 1
+        bst     r24, 6              ; 1 - read bit 6
+        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+        bst     r24, 7              ; 1 - read bit 7
+        bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+
+        ;; delay
+        delay_cycles 12*8 - 6
+
+        ;; send to bus
+        out     _SFR_IO_ADDR(IEC_OUTPUT), r19 ; 1
+
+        ;; final delay
+        delay_cycles 22*8
+
+        ret
+
+
+        ;;
+        ;; send a byte using the 2MHz 1581 Configure 2.1 GEOS protocol
+        ;; called with byte in r24, return value undefined
+        ;;
+        .global geos_send_byte_1581_21
+geos_send_byte_1581_21:
+        com     r24                   ; invert so the bits are sent with high=1
+        rcall   geos_send_byte_common ; 7
+        mov     r0, r24               ; 1 - move data to target register
+
+        ;; delay
+        delay_cycles 7*8 - 18
+
+        ;; send bits 0+1
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; delay
+        delay_cycles 7*8 - 16
+
+        ;; send bits 2+3
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; delay
+        delay_cycles 10*8 - 16
+
+        ;; send bits 4+5
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; delay
+        delay_cycles 9*8 - 16
+
+        ;; send bits 6+7
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; final delay
+        delay_cycles 12*8
+
+        ret
+
+#endif
+
+#ifdef CONFIG_LOADER_WHEELS
+        ;;
+        ;; send a byte using the Wheels protocol
+        ;; called with byte in r24, return value undefined
+        ;;
+        .global wheels_send_byte_1mhz
+wheels_send_byte_1mhz:
+        rcall   geos_send_byte_common ; 7
+
+        rcall   wheels_nibble       ; 3 - send lower nibble
+        swap    r24                 ; 1 - swap nibbles
+
+        delay_cycles (14-9)*8 + 15 - 14
+        rcall   wheels_nibble       ; 3 - send upper nibble
+
+        ;; final delay
+        delay_cycles 22*8
+        ret
+
+wheels_nibble:
+        ;; prepare bits 3+1 (7+5)
+        mov     r19, r0             ; 1
+        bst     r24, 3              ; 1 - read bit 3
+        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+        bst     r24, 1              ; 1 - read bit 1
+        bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+
+        ;; delay
+        delay_cycles 9*8 - 15
+
+        ;; send to bus
+        out     _SFR_IO_ADDR(IEC_OUTPUT), r19 ; 1 - send to bus
+
+        ;; prepare bits 2+0 (6+4)
+        mov     r19, r0             ; 1
+        bst     r24, 2              ; 1 - read bit 2
+        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+        bst     r24, 0              ; 1 - read bit 0
+        bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+
+        ;; delay
+        delay_cycles 14*8 - 6
+
+        ;; send to bus
+        out     _SFR_IO_ADDR(IEC_OUTPUT), r19 ; 1 - send to bus
+        ret                                ; 4
+
+
+        ;;
+        ;; read a byte using the Wheels protocol
+        ;;
+        .global wheels_get_byte_1mhz
+wheels_get_byte_1mhz:
+        clr     r24
+
+        ;; wait until clock is high
+1:      sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_CLOCK
+        rjmp    1b
+
+        ;; wait until clock is low
+1:      sbic    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_CLOCK ; 1/2
+        rjmp    1b
+
+        ;; delay
+        delay_cycles 16 * 8 - 5
+
+        ;; read bits 7/5
+        rcall   get_bits_from_clk_data ; 4+8 r24 = _____7_5
+        lsl     r24                    ; 1   r24 = ____7_5_
+
+        delay_cycles 10 * 8 - 13
+
+        ;; read bits 6/4
+        rcall   get_bits_from_clk_data ; 4+8 r24 = ____7654
+        swap    r24                    ; 1   r24 = 7654____
+        lsr     r24                    ; 1   r24 = _7654___
+
+        delay_cycles 15 * 8 - 14
+
+        ;; read bits 3/1
+        rcall   get_bits_from_clk_data ; 4+8 r24 = _76543_1
+        lsl     r24                    ; 1   r24 = 76543_1_
+
+        delay_cycles 13 * 8 - 13
+
+        ;; read bits 2/0
+        rcall   get_bits_from_clk_data ; 4+8 r24 = 76543210
+
+        delay_cycles 20*8
+
+        clr     r25             ; clear upper byte of return value
+        com     r24             ; invert data byte
+
+        ret
+
+        ;;
+        ;; read a byte using the Wheels 4.4 1MHz protocol
+        ;;
+        .global wheels44_get_byte_1mhz
+wheels44_get_byte_1mhz:
+        clr     r24
+
+        ;; wait until clock is high
+1:      sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_CLOCK
+        rjmp    1b
+
+        ;; wait until clock is low
+1:      sbic    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_CLOCK ; 1/2
+        rjmp    1b
+
+        ;; delay
+        delay_cycles 17 * 8 - 5
+
+        ;; read bits 7/5
+        rcall   get_bits_from_clk_data ; 4+8 r24 = _____7_5
+        lsl     r24                    ; 1   r24 = ____7_5_
+
+        delay_cycles 11 * 8 - 13
+
+        ;; read bits 6/4
+        rcall   get_bits_from_clk_data ; 4+8 r24 = ____7654
+        swap    r24                    ; 1   r24 = 7654____
+        lsr     r24                    ; 1   r24 = _7654___
+
+        delay_cycles 17 * 8 - 14
+
+        ;; read bits 3/1
+        rcall   get_bits_from_clk_data ; 4+8 r24 = _76543_1
+        lsl     r24                    ; 1   r24 = 76543_1_
+
+        delay_cycles 16 * 8 - 13
+
+        ;; read bits 2/0
+        rcall   get_bits_from_clk_data ; 4+8 r24 = 76543210
+
+        delay_cycles 20*8
+
+        clr     r25             ; clear upper byte of return value
+        com     r24             ; invert data byte
+
+        ret
+
+        ;;
+        ;; read a byte using the Wheels 4.4 2MHz protocol
+        ;;
+        .global wheels44_get_byte_2mhz
+wheels44_get_byte_2mhz:
+        clr     r24
+
+        ;; wait until clock is high
+1:      sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_CLOCK
+        rjmp    1b
+
+        ;; wait until clock is low
+1:      sbic    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_CLOCK ; 1/2
+        rjmp    1b
+
+        ;; delay
+        delay_cycles 15*8 - 2
+
+        ;; get bits 0 and 1
+        in      r19, _SFR_IO_ADDR(IEC_INPUT) ; 1
+        bst     r19, IEC_PIN_CLOCK         ; 1
+        bld     r24, 0                     ; 1 - r24 = .......0
+        bst     r19, IEC_PIN_DATA          ; 1
+        bld     r24, 1                     ; 1 - r24 = ......10
+
+        ;; delay
+        delay_cycles 11*8 - 5
+
+        ;; get bits 2 and 3
+        in      r19, _SFR_IO_ADDR(IEC_INPUT) ; 1
+        bst     r19, IEC_PIN_CLOCK         ; 1
+        bld     r24, 2                     ; 1 - r24 = .....210
+        bst     r19, IEC_PIN_DATA          ; 1
+        bld     r24, 3                     ; 1 - r24 = ....3210
+
+        ;; delay
+        delay_cycles 11*8 - 5
+
+        ;; get bits 4 and 5
+        in      r19, _SFR_IO_ADDR(IEC_INPUT) ; 1
+        bst     r19, IEC_PIN_CLOCK         ; 1
+        bld     r24, 4                     ; 1 - r24 = ...43210
+        bst     r19, IEC_PIN_DATA          ; 1
+        bld     r24, 5                     ; 1 - r24 = ..543210
+
+        ;; delay
+        delay_cycles 11*8 - 5
+
+        ;; get bits 6 and 7
+        in      r19, _SFR_IO_ADDR(IEC_INPUT) ; 1
+        bst     r19, IEC_PIN_CLOCK         ; 1
+        bld     r24, 6                     ; 1 - r24 = .6543210
+        bst     r19, IEC_PIN_DATA          ; 1
+        bld     r24, 7                     ; 1 - r24 = 76543210
+
+        ;; safety delay
+        delay_cycles 12*8
+
+        ;; post process received value and return
+        com     r24                  ; negate all bits
+        clr     r25                  ; clear high byte of return value
+        ret
+
+
+        ;;
+        ;; send a byte using the Wheels 4.4 2MHz protocol
+        ;; called with byte in r24, return value undefined
+        ;;
+        .global wheels44_send_byte_2mhz
+wheels44_send_byte_2mhz:
+        com     r24                   ; invert so the bits are sent with high=1
+        rcall   geos_send_byte_common ; 7
+        mov     r0, r24               ; 1 - move data to target register
+
+        ;; delay
+        delay_cycles 7*8 - 18
+
+        ;; send bits 0+1
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; delay
+        delay_cycles 8*8 - 16
+
+        ;; send bits 2+3
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; delay
+        delay_cycles 11*8 - 16
+
+        ;; send bits 4+5
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; delay
+        delay_cycles 11*8 - 16
+
+        ;; send bits 6+7
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; final delay
+        delay_cycles 14*8
+
+        ret
+
+#endif
+
+#ifdef CONFIG_LOADER_AR6
+        ;;
+        ;; send a byte using the AR6-1581 protocol
+        ;; called with byte in r24, no return value
+        ;;
+        .global ar6_1581_send_byte
+ar6_1581_send_byte:
+        cli
+
+        ;; set up data byte for transmission
+        com     r24
+        mov     r0, r24
+
+        ;; clock high
+        cbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_CLOCK
+
+        ;; wait until data is high
+1:      sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_DATA
+        rjmp    1b
+
+        ;; delay
+        delay_cycles 5*8 - 10
+
+        ;; send bits 0+1
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; delay
+        delay_cycles 8*8 - 16
+
+        ;; send bits 2+3
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; delay
+        delay_cycles 8*8 - 16
+
+        ;; send bits 4+5
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; delay
+        delay_cycles 8*8 - 16
+
+        ;; send bits 6+7
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; delay
+        delay_cycles 8*8+4 - 6 - 2
+
+        ;; set clock low, data high
+        cbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_DATA  ; 1
+        sbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_CLOCK ; 1
+
+        sei
+        ret
+
+        ;;
+        ;; receive a byte using the AR6-1581-PAL protocol
+        ;; returns byte in r24
+        ;;
+        .global ar6_1581p_get_byte
+ar6_1581p_get_byte:
+        cli
+
+        clr     r24
+
+        ;; clock high
+        cbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_CLOCK
+
+        ;; wait until data is low
+1:      sbic    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_DATA
+        rjmp    1b
+
+        ;; wait until data is high
+1:      sbis    _SFR_IO_ADDR(IEC_INPUT), IEC_PIN_DATA
+        rjmp    1b
+
+        ;; delay
+        delay_cycles 12*8 - 4
+
+        ;; receive bits 7+5
+        rcall   get_bits_from_clk_data ; 4+8 - r24 = .....7.5
+        lsl     r24                    ; 1   - r24 = ....7.5.
+
+        ;; delay
+        delay_cycles 10*8 - 9 - 4
+
+        ;; receive bits 6+4
+        rcall   get_bits_from_clk_data ; 4+8 - r24 = ....7654
+        swap    r24                    ; 1   - r24 = 7654....
+        lsr     r24                    ; 1   - r24 = .7654...
+
+        ;; delay
+        delay_cycles 16*8 - 10 - 4
+
+        ;; receive bits 3+1
+        rcall   get_bits_from_clk_data ; 4+8 - r24 = .76543.1
+        lsl     r24                    ; 1   - r24 = 76543.1.
+
+        ;; delay
+        delay_cycles 10*8 - 9 - 4
+
+        ;; receive bits 2+0
+        rcall   get_bits_from_clk_data ; 4+8 - r24 = 76543210
+
+        ;; delay
+        delay_cycles 5*8 - 8 - 1
+
+        ;; set clock low
+        sbi     _SFR_IO_ADDR(IEC_OUTPUT), IEC_OPIN_CLOCK
+
+        ;; post-processing
+        sei
+        com     r24
+        clr     r25
+        ret
+#endif
+
+#ifdef PARALLEL_ENABLED
+        ;; ====================================================================
+        ;;  Parallel port
+        ;; ====================================================================
+
+        ;; uint8_t parallel_read(void)
+        .global parallel_read
+parallel_read:
+        in      r24, _SFR_IO_ADDR(PARALLEL_PPIN)
+        ret
+
+        ;; void parallel_write(uint8_t value)
+        .global parallel_write
+parallel_write:
+        out     _SFR_IO_ADDR(PARALLEL_PDDR),  r1   ; set all lines to input
+        out     _SFR_IO_ADDR(PARALLEL_PPORT), r24  ; enable pullups on 1-bits
+        com     r24                                ; invert byte
+        out     _SFR_IO_ADDR(PARALLEL_PDDR), r24   ; set 0-bits to output to simulate open collector
+        call    delay1us
+        ret
+
+        ;; void parallel_set_dir(parallel_dir_t direction)
+        .global parallel_set_dir
+parallel_set_dir:
+        tst     r24                               ; check if input is selected
+        brne    1f                                ; do nothing if not
+        out     _SFR_IO_ADDR(PARALLEL_PDDR), r1   ; set all lines to input
+        com     r24                               ; set r24=0xff
+        out     _SFR_IO_ADDR(PARALLEL_PPORT), r24 ; enable all pullups
+1:      ret
+
+        ;; void parallel_send_handshake(void)
+        .global parallel_send_handshake
+parallel_send_handshake:
+        cbi     _SFR_IO_ADDR(PARALLEL_HPORT), PARALLEL_HSK_OUT_BIT ; prepare 0 in PORT register
+        sbi     _SFR_IO_ADDR(PARALLEL_HDDR), PARALLEL_HSK_OUT_BIT  ; set pin to output
+        call    delay1us                                           ; delay
+        call    delay1us
+        cbi     _SFR_IO_ADDR(PARALLEL_HDDR), PARALLEL_HSK_OUT_BIT  ; set pin to input
+        sbi     _SFR_IO_ADDR(PARALLEL_HPORT), PARALLEL_HSK_OUT_BIT ; enable pullup
+        ret
+
+#endif
+
+        .end
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/progmem.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/progmem.h
new file mode 100644
index 00000000..65c2b7dd
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/progmem.h
@@ -0,0 +1,31 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   progmem.h: avr/pgmspace.h wrapper header
+
+*/
+
+#ifndef PROGMEM_H
+#define PROGMEM_H
+
+#include <avr/pgmspace.h>
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/softi2c.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/softi2c.c
new file mode 100644
index 00000000..5eac561b
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/softi2c.c
@@ -0,0 +1,205 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   softi2c.c: Software I2C bus master
+
+*/
+
+#include <avr/io.h>
+#include <util/delay.h>
+#include "config.h"
+#include "i2c.h"
+
+#define SOFTI2C_SDA _BV(SOFTI2C_BIT_SDA)
+#define SOFTI2C_SCL _BV(SOFTI2C_BIT_SCL)
+
+static void set_scl(uint8_t x) {
+  if (x) {
+    SOFTI2C_DDR  &= (uint8_t)~SOFTI2C_SCL;
+    SOFTI2C_PORT |= SOFTI2C_SCL;
+    // Clock stretching
+    loop_until_bit_is_set(SOFTI2C_PIN, SOFTI2C_BIT_SCL);
+  } else {
+    SOFTI2C_DDR  |= SOFTI2C_SCL;
+    SOFTI2C_PORT &= (uint8_t)~SOFTI2C_SCL;
+  }
+}
+
+static void set_sda(uint8_t x) {
+  if (x) {
+    SOFTI2C_DDR  &= (uint8_t)~SOFTI2C_SDA;
+    SOFTI2C_PORT |= SOFTI2C_SDA;
+  } else {
+    SOFTI2C_DDR  |= SOFTI2C_SDA;
+    SOFTI2C_PORT &= (uint8_t)~SOFTI2C_SDA;
+  }
+}
+
+
+static void start_condition(void) {
+  set_sda(1);
+  set_scl(1);
+  _delay_us(SOFTI2C_DELAY);
+  set_sda(0);
+  _delay_us(SOFTI2C_DELAY);
+  set_scl(0);
+}
+
+static void stop_condition(void) {
+  set_sda(0);
+  _delay_us(SOFTI2C_DELAY);
+  set_scl(1);
+  _delay_us(SOFTI2C_DELAY);
+  set_sda(1);
+  _delay_us(SOFTI2C_DELAY);
+}
+
+/* Returns value of the acknowledge bit */
+static uint8_t i2c_send_byte(uint8_t value) {
+  uint8_t i;
+
+  for (i=8;i!=0;i--) {
+    set_scl(0);
+    _delay_us(SOFTI2C_DELAY/2);
+    set_sda(value & 128);
+    _delay_us(SOFTI2C_DELAY/2);
+    set_scl(1);
+    _delay_us(SOFTI2C_DELAY);
+    value <<= 1;
+  }
+  set_scl(0);
+  _delay_us(SOFTI2C_DELAY/2);
+  set_sda(1);
+  _delay_us(SOFTI2C_DELAY/2);
+  set_scl(1);
+  _delay_us(SOFTI2C_DELAY/2);
+  i = !!(SOFTI2C_PIN & SOFTI2C_SDA);
+  _delay_us(SOFTI2C_DELAY/2);
+  set_scl(0);
+
+  return i;
+}
+
+/* Returns value of the byte read */
+static uint8_t i2c_recv_byte(uint8_t sendack) {
+  uint8_t i;
+  uint8_t value = 0;
+
+  set_sda(1);
+  _delay_us(SOFTI2C_DELAY/2);
+  for (i=8;i!=0;i--) {
+    _delay_us(SOFTI2C_DELAY/2);
+    set_scl(1);
+    _delay_us(SOFTI2C_DELAY/2);
+    value = (value << 1) + !!(SOFTI2C_PIN & SOFTI2C_SDA);
+    _delay_us(SOFTI2C_DELAY/2);
+    set_scl(0);
+    _delay_us(SOFTI2C_DELAY/2);
+  }
+  set_sda(!sendack);
+  _delay_us(SOFTI2C_DELAY/2);
+  set_scl(1);
+  _delay_us(SOFTI2C_DELAY);
+  set_scl(0);
+  set_sda(1);
+
+  return value;
+}
+
+/* Returns 1 if there was no ACK to the address */
+uint8_t i2c_write_register(uint8_t address, uint8_t reg, uint8_t val) {
+  start_condition();
+  if (i2c_send_byte(address)) {
+    stop_condition();
+    return 1;
+  }
+  i2c_send_byte(reg);
+  i2c_send_byte(val);
+  stop_condition();
+  return 0;
+}
+
+/* Returns 1 if there was no ACK to the address */
+uint8_t i2c_write_registers(uint8_t address, uint8_t startreg, uint8_t count, const void *data) {
+  uint8_t i;
+
+  start_condition();
+  if (i2c_send_byte(address)) {
+    stop_condition();
+    return 1;
+  }
+  i2c_send_byte(startreg);
+  for (i=0;i<count;i++)
+    i2c_send_byte(((uint8_t *)data)[i]);
+  stop_condition();
+  return 0;
+}
+
+/* Returns -1 if there was no ACK to the address, register contents otherwise */
+int16_t i2c_read_register(uint8_t address, uint8_t reg) {
+  uint8_t val;
+
+  start_condition();
+  if (i2c_send_byte(address)) {
+    stop_condition();
+    return -1;
+  }
+  i2c_send_byte(reg);
+  start_condition();
+  if (i2c_send_byte(address|1)) {
+    stop_condition();
+    return -1;
+  }
+  val = i2c_recv_byte(0);
+  stop_condition();
+  return val;
+}
+
+/* Returns 1 if there was no ACK to the address */
+uint8_t i2c_read_registers(uint8_t address, uint8_t startreg, uint8_t count, void *data) {
+  uint8_t i;
+
+  start_condition();
+  if (i2c_send_byte(address)) {
+    stop_condition();
+    return 1;
+  }
+  i2c_send_byte(startreg);
+  start_condition();
+  if (i2c_send_byte(address|1)) {
+    stop_condition();
+    return 1;
+  }
+  for (i=0;i<count-1;i++)
+    ((uint8_t *)data)[i] = i2c_recv_byte(1);
+  ((uint8_t *)data)[i] = i2c_recv_byte(0);
+  stop_condition();
+  return 0;
+}
+
+void i2c_init(void) {
+  /* Set I2C pins to input -> high with external pullups */
+  SOFTI2C_DDR  &= (uint8_t)~(SOFTI2C_SCL|SOFTI2C_SDA);
+  SOFTI2C_PORT &= (uint8_t)~(SOFTI2C_SCL|SOFTI2C_SDA);
+
+  set_sda(1);
+  set_scl(1);
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/softrtc.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/softrtc.c
new file mode 100644
index 00000000..77c621e1
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/softrtc.c
@@ -0,0 +1,151 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   softrtc.c: software RTC emulation
+
+   The exported functions in this file are weak-aliased to their corresponding
+   versions defined in rtc.h so when this file is the only RTC implementation
+   compiled in they will be automatically used by the linker.
+
+*/
+
+#include <inttypes.h>
+#include <avr/interrupt.h>
+#include <util/atomic.h>
+#include "config.h"
+#include "progmem.h"
+#include "time.h"
+#include "rtc.h"
+#include "uart.h"
+#include "softrtc.h"
+
+static volatile uint8_t ms;
+static softtime_t rtc = 1217647125; // Sat Aug  2 03:18:45 2008 UTC
+static const PROGMEM uint8_t month_days[12] = {
+  31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
+};
+
+#define days_in_year(a)   (is_leap(a) ? 366 : 365)
+#define days_in_month(a)  (pgm_read_byte(month_days + a))
+#define is_leap(year) \
+  ((year) % 4 == 0 && ((year) % 100 != 0 || (year) % 400 == 0))
+
+/* Minimal <time> functionality */
+
+// mktime copied code from Linux kernel source kernel/time.c, ca. 2.6.20
+
+/* Converts Gregorian date to seconds since 1970-01-01 00:00:00.
+ * Assumes input in normal date format, i.e. 1980-12-31 23:59:59
+ * => year=1980, mon=12, day=31, hour=23, min=59, sec=59.
+ *
+ * [For the Julian calendar (which was used in Russia before 1917,
+ * Britain & colonies before 1752, anywhere else before 1582,
+ * and is still in use by some communities) leave out the
+ * -year/100+year/400 terms, and add 10.]
+ *
+ * This algorithm was first published by Gauss (I think).
+ *
+ * WARNING: this function will overflow on 2106-02-07 06:28:16 on
+ * machines were long is 32-bit! (However, as softtime_t is signed, we
+ * will already get problems at other places on 2038-01-19 03:14:08)
+ */
+static softtime_t mktime(struct tm *tm)
+{
+  uint8_t mon = tm->tm_mon + 1;
+  uint16_t year = tm->tm_year + 1900;
+
+  if (0 >= (int) (mon -= 2)) {  /* 1..12 -> 11,12,1..10 */
+    mon += 12;  /* Puts Feb last since it has leap day */
+    year -= 1;
+  }
+  return (((
+      (uint32_t)(year/4 - year/100 + year/400 + 367*mon/12 + tm->tm_mday) +
+        (uint32_t)year*365 - 719499
+      )*24 + tm->tm_hour /* now have hours */
+     )*60 + tm->tm_min /* now have minutes */
+    )*60 + tm->tm_sec; /* finally seconds */
+}
+
+static void gmtime(softtime_t *t, struct tm * tm)
+{
+  uint32_t    tim = *t;
+  uint16_t    i;
+
+  tm->tm_sec=tim%60;
+  tim/=60; // now it is minutes
+  tm->tm_min=tim%60;
+  tim/=60; // now it is hours
+  tm->tm_hour=tim%24;
+  tim/=24; // now it is days
+  tm->tm_wday=(tim+4)%7;
+
+  /* Number of years in days */
+  for (i = 1970; tim >= days_in_year(i); i++)
+    tim -= days_in_year(i);
+  tm->tm_year = i - 1900;
+
+  /* Number of months in days left */
+  for (i = 0; tim >= days_in_month(i); i++) {
+    tim -= days_in_month(i);
+    if(i == 1 && is_leap(tm->tm_year))
+      tim-= 1;
+  }
+  tm->tm_mon = i;
+
+  /* Days are what is left over (+1) from all that. */
+  tm->tm_mday = tim + 1;
+}
+
+/* Public functions */
+
+void softrtc_tick(void) {
+  ms++;
+  if(ms == 100) {
+    rtc++;
+    ms = 0;
+  }
+}
+
+/* Read the current time from the RTC */
+void softrtc_read(struct tm *time) {
+  softtime_t t;
+
+  ATOMIC_BLOCK( ATOMIC_FORCEON ) {
+    t = rtc;
+  }
+  gmtime(&t,time);
+}
+void read_rtc(struct tm *time) __attribute__ ((weak, alias("softrtc_read")));
+
+/* Set the time in the RTC */
+void softrtc_set(struct tm *time) {
+  softtime_t t = mktime(time);
+
+  ATOMIC_BLOCK( ATOMIC_FORCEON ) {
+    rtc = t;
+  }
+}
+void set_rtc(struct tm *time) __attribute__ ((weak, alias("softrtc_set")));
+
+void softrtc_init(void) {
+  rtc_state = RTC_OK;
+}
+void rtc_init(void) __attribute__ ((weak, alias("softrtc_init")));
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/spi.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/spi.c
new file mode 100644
index 00000000..9d332835
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/spi.c
@@ -0,0 +1,112 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   spi.c: Low-level SPI routines, AVR version
+
+*/
+
+#include <avr/io.h>
+#include "config.h"
+#include "avrcompat.h"
+#include "spi.h"
+
+/* interrupts disabled, SPI enabled, MSB first, master mode */
+/* leading edge rising, sample on leading edge, clock bits cleared */
+#define SPCR_VAL 0b01010000
+
+/* set up SPSR+SPCR according to the divisor */
+/* compiles to 3-4 instructions */
+static inline __attribute__((always_inline)) void spi_set_divisor(const uint8_t div) {
+  if (div == 2 || div == 8 || div == 32) {
+    SPSR = _BV(SPI2X);
+  } else {
+    SPSR = 0;
+  }
+
+  if (div == 2 || div == 4) {
+    SPCR = SPCR_VAL;
+  } else if (div == 8 || div == 16) {
+    SPCR = SPCR_VAL | _BV(SPR0);
+  } else if (div == 32 || div == 64) {
+    SPCR = SPCR_VAL | _BV(SPR1);
+  } else { // div == 128
+    SPCR = SPCR_VAL | _BV(SPR0) | _BV(SPR1);
+  }
+}
+
+void spi_set_speed(spi_speed_t speed) {
+  if (speed == SPI_SPEED_FAST) {
+    spi_set_divisor(SPI_DIVISOR_FAST);
+  } else {
+    spi_set_divisor(SPI_DIVISOR_SLOW);
+  }
+}
+
+void spi_init(spi_speed_t speed) {
+  /* set up SPI I/O pins */
+  SPI_PORT = (SPI_PORT & ~SPI_MASK) | SPI_SCK | SPI_SS | SPI_MISO;
+  SPI_DDR  = (SPI_DDR  & ~SPI_MASK) | SPI_SCK | SPI_SS | SPI_MOSI;
+
+  /* enable and initialize SPI */
+  if (speed == SPI_SPEED_FAST) {
+    spi_set_divisor(SPI_DIVISOR_FAST);
+  } else {
+    spi_set_divisor(SPI_DIVISOR_SLOW);
+  }
+
+  /* Clear buffers, just to be sure */
+  (void) SPSR;
+  (void) SPDR;
+}
+
+/* Simple and braindead, just like the AVR's SPI unit */
+static uint8_t spi_exchange_byte(uint8_t output) {
+  SPDR = output;
+  loop_until_bit_is_set(SPSR, SPIF);
+  return SPDR;
+}
+
+void spi_tx_byte(uint8_t data) {
+  spi_exchange_byte(data);
+}
+
+uint8_t spi_rx_byte(void) {
+  return spi_exchange_byte(0xff);
+}
+
+void spi_exchange_block(void *vdata, unsigned int length, uint8_t write) {
+  uint8_t *data = (uint8_t*)vdata;
+
+  while (length--) {
+    if (!write)
+      SPDR = *data;
+    else
+      SPDR = 0xff;
+
+    loop_until_bit_is_set(SPSR, SPIF);
+
+    if (write)
+      *data = SPDR;
+    else
+      (void) SPDR;
+    data++;
+  }
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/spi.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/spi.h
new file mode 100644
index 00000000..3b11dfed
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/spi.h
@@ -0,0 +1,80 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   spi.h: Definitions for the low-level SPI routines - AVR version
+
+*/
+#ifndef SPI_H
+#define SPI_H
+
+#include "config.h"
+
+/* Low speed 400kHz for init, fast speed <=20MHz (MMC limit) */
+typedef enum { SPI_SPEED_FAST, SPI_SPEED_SLOW } spi_speed_t;
+
+/* Available SPI devices - special case to select all SD cards during init */
+/* Note: SD cards must be 1 and 2 */
+/* AVR note: The code assumes that spi_device_t can be used as bit field of selected cards */
+typedef enum { SPIDEV_NONE     = 0,
+               SPIDEV_CARD0    = 1,
+               SPIDEV_CARD1    = 2,
+               SPIDEV_ALLCARDS = 3 } spi_device_t;
+
+/* Initialize SPI interface */
+void spi_init(spi_speed_t speed);
+
+/* select device */
+static inline void spi_select_device(spi_device_t dev) {
+  if (dev & 1)
+    sdcard_set_ss(0);
+  else
+    sdcard_set_ss(1);
+#ifdef CONFIG_TWINSD
+  if (dev & 2)
+    sdcard2_set_ss(0);
+  else
+    sdcard2_set_ss(1);
+#endif
+}
+
+/* Transmit a single byte */
+void spi_tx_byte(uint8_t data);
+
+/* Exchange a data block - internal API only! */
+void spi_exchange_block(void *data, unsigned int length, uint8_t write);
+
+/* Receive a data block */
+static inline void spi_tx_block(const void *data, unsigned int length) {
+  spi_exchange_block((void *)data, length, 0);
+}
+
+/* Receive a single byte */
+uint8_t spi_rx_byte(void);
+
+/* Receive a data block */
+static inline void spi_rx_block(void *data, unsigned int length) {
+  spi_exchange_block(data, length, 1);
+}
+
+/* Switch speed of SPI interface */
+void spi_set_speed(spi_speed_t speed);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/system.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/system.c
new file mode 100644
index 00000000..e2de908f
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/system.c
@@ -0,0 +1,138 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   system.c: System-specific initialisation (AVR version)
+
+*/
+
+#include "config.h"
+#include <avr/boot.h>
+#include <avr/interrupt.h>
+#include <avr/pgmspace.h>
+#include <avr/power.h>
+#include <avr/sleep.h>
+#include <avr/wdt.h>
+#include "system.h"
+
+static __attribute__((noreturn)) void (*restart_call)(void) = 0;
+
+/* Make sure the watchdog is disabled as soon as possible    */
+/* Copy this code to your bootloader if you use one and your */
+/* MCU doesn't disable the WDT after reset!                  */
+/* This function is merged into the startup and doesn't need to be called explicitly */
+void get_mcusr(void) \
+      __attribute__((naked)) \
+      __attribute__((section(".init3")));
+void get_mcusr(void)
+{
+  MCUSR = 0;
+  wdt_disable();
+}
+
+#ifdef CONFIG_MEMPOISON
+void poison_memory(void) \
+  __attribute__((naked)) \
+  __attribute__((section(".init1")));
+void poison_memory(void) {
+  register uint16_t i;
+  register uint8_t  *ptr;
+
+  asm("clr r1\n");
+  /* There is no RAMSTARt variable =( */
+  if (RAMEND > 2048 && RAMEND < 4096) {
+    /* 2K memory */
+    ptr = (void *)RAMEND-2047;
+    for (i=0;i<2048;i++)
+      ptr[i] = 0x55;
+  } else if (RAMEND > 4096 && RAMEND < 8192) {
+    /* 4K memory */
+    ptr = (void *)RAMEND-4095;
+    for (i=0;i<4096;i++)
+      ptr[i] = 0x55;
+  } else {
+    /* Assume 8K memory */
+    ptr = (void *)RAMEND-8191;
+    for (i=0;i<8192;i++)
+      ptr[i] = 0x55;
+  }
+}
+#endif
+
+/* Early system initalisation */
+void system_init_early(void) {
+#if defined __AVR_ATmega644__  || defined __AVR_ATmega644P__ || \
+    defined __AVR_ATmega1281__ || defined __AVR_ATmega2561__ || \
+    defined __AVR_ATmega1284P__
+  asm volatile("in  r24, %0\n"
+               "ori r24, 0x80\n"
+               "out %0, r24\n"
+               "out %0, r24\n"
+               :
+               : "I" (_SFR_IO_ADDR(MCUCR))
+               : "r24"
+               );
+#elif defined __AVR_ATmega32__
+  asm volatile ("in  r24, %0\n"
+                "ori r24, 0x80\n"
+                "out %0, r24\n"
+                "out %0, r24\n"
+                :
+                : "I" (_SFR_IO_ADDR(MCUCSR))
+                : "r24"
+                );
+#elif defined __AVR_ATmega128__ || defined __AVR_ATmega1281__
+  /* Just assume that JTAG doesn't hurt us on the m128 */
+#else
+#  error Unknown chip!
+#endif
+
+#ifdef CLOCK_PRESCALE
+  clock_prescale_set(CLOCK_PRESCALE);
+#endif
+}
+
+/* Late system initialisation - currently unused on AVR */
+void system_init_late(void) {
+  set_sleep_mode(SLEEP_MODE_IDLE);
+  sleep_enable();
+}
+
+/* Put MCU into low-power mode */
+void system_sleep(void) {
+  sleep_cpu();
+}
+
+/* Reset MCU */
+void system_reset(void) {
+  cli();
+  restart_call();
+}
+
+/* Disable interrupts */
+void disable_interrupts(void) {
+  cli();
+}
+
+/* Enable interrupts */
+void enable_interrupts(void) {
+  sei();
+}
+
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/uart.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/uart.c
new file mode 100644
index 00000000..c422fc14
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/avr/uart.c
@@ -0,0 +1,163 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   uart.c: UART access routines
+
+*/
+
+#include <avr/io.h>
+#include <avr/interrupt.h>
+#include <avr/pgmspace.h>
+#include <stdio.h>
+#include "config.h"
+#include "avrcompat.h"
+#include "uart.h"
+
+static uint8_t txbuf[1 << CONFIG_UART_BUF_SHIFT];
+static volatile uint16_t read_idx;
+static volatile uint16_t write_idx;
+
+ISR(USART_UDRE_vect) {
+  if (read_idx == write_idx) return;
+  UDR = txbuf[read_idx];
+  read_idx = (read_idx+1) & (sizeof(txbuf)-1);
+  if (read_idx == write_idx)
+    UCSRB &= ~ _BV(UDRIE);
+}
+
+void uart_putc(char c) {
+  uint16_t t=(write_idx+1) & (sizeof(txbuf)-1);
+#ifndef CONFIG_DEADLOCK_ME_HARDER // :-)
+  UCSRB &= ~ _BV(UDRIE);   // turn off RS232 irq
+#else
+  while (t == read_idx);   // wait for free space
+#endif
+  txbuf[write_idx] = c;
+  write_idx = t;
+  //if (read_idx == write_idx) PORTD |= _BV(PD7);
+  UCSRB |= _BV(UDRIE);
+}
+
+void uart_puthex(uint8_t num) {
+  uint8_t tmp;
+  tmp = (num & 0xf0) >> 4;
+  if (tmp < 10)
+    uart_putc('0'+tmp);
+  else
+    uart_putc('a'+tmp-10);
+
+  tmp = num & 0x0f;
+  if (tmp < 10)
+    uart_putc('0'+tmp);
+  else
+    uart_putc('a'+tmp-10);
+}
+
+void uart_trace(void *ptr, uint16_t start, uint16_t len) {
+  uint16_t i;
+  uint8_t j;
+  uint8_t ch;
+  uint8_t *data = ptr;
+
+  data+=start;
+  for(i=0;i<len;i+=16) {
+
+    uart_puthex(start>>8);
+    uart_puthex(start&0xff);
+    uart_putc('|');
+    uart_putc(' ');
+    for(j=0;j<16;j++) {
+      if(i+j<len) {
+        ch=*(data + j);
+        uart_puthex(ch);
+      } else {
+        uart_putc(' ');
+        uart_putc(' ');
+      }
+      uart_putc(' ');
+    }
+    uart_putc('|');
+    for(j=0;j<16;j++) {
+      if(i+j<len) {
+        ch=*(data++);
+        if(ch<32 || ch>0x7e)
+          ch='.';
+        uart_putc(ch);
+      } else {
+        uart_putc(' ');
+      }
+    }
+    uart_putc('|');
+    uart_putcrlf();
+    start+=16;
+  }
+}
+
+static int ioputc(char c, FILE *stream) {
+  if (c == '\n') uart_putc('\r');
+  uart_putc(c);
+  return 0;
+}
+
+uint8_t uart_getc(void) {
+  loop_until_bit_is_set(UCSRA,RXC);
+  return UDR;
+}
+
+void uart_flush(void) {
+  while (read_idx != write_idx) ;
+}
+
+void uart_puts_P(const char *text) {
+  uint8_t ch;
+
+  while ((ch = pgm_read_byte(text++))) {
+    uart_putc(ch);
+  }
+}
+
+void uart_putcrlf(void) {
+  uart_putc(13);
+  uart_putc(10);
+}
+
+static FILE mystdout = FDEV_SETUP_STREAM(ioputc, NULL, _FDEV_SETUP_WRITE);
+
+void uart_init(void) {
+  /* Seriellen Port konfigurieren */
+
+  UBRRH = (int)((double)F_CPU/(16.0*CONFIG_UART_BAUDRATE)-1) >> 8;
+  UBRRL = (int)((double)F_CPU/(16.0*CONFIG_UART_BAUDRATE)-1) & 0xff;
+
+  UCSRB = _BV(RXEN) | _BV(TXEN);
+  // I really don't like random #ifdefs in the code =(
+#if defined __AVR_ATmega32__
+  UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0);
+#else
+  UCSRC = _BV(UCSZ1) | _BV(UCSZ0);
+#endif
+
+  stdout = &mystdout;
+
+  //UCSRB |= _BV(UDRIE);
+  read_idx  = 0;
+  write_idx = 0;
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/buffers.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/buffers.c
new file mode 100644
index 00000000..d6b8d30a
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/buffers.c
@@ -0,0 +1,301 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   buffers.c: Internal buffer management
+*/
+
+#include <stdint.h>
+#include <string.h>
+#include "config.h"
+#include "dirent.h"
+#include "errormsg.h"
+#include "ff.h"
+#include "led.h"
+#include "buffers.h"
+
+dh_t    matchdh;
+uint8_t ops_scratch[33];
+
+/// One additional buffer structure for channel 15
+buffer_t buffers[CONFIG_BUFFER_COUNT+1];
+
+/// The actual data buffers
+static uint8_t bufferdata[CONFIG_BUFFER_COUNT*256];
+
+/// Number of active data buffers + 16 * number of dirty buffers
+uint8_t active_buffers;
+
+/**
+ * callback_dummy - dummy function for the buffer callbacks
+ * @buf: pointer to a buffer
+ *
+ * This is the default function used for all buffer callbacks so
+ * the caller doesn't need to check if the callbacks are valid.
+ * It always returns 0 for success.
+ */
+uint8_t callback_dummy(buffer_t *buf) {
+  return 0;
+}
+
+/**
+ * buffers_init - initializes the buffer data structures
+ *
+ * This function initialized all the buffer-related data structures.
+ */
+void buffers_init(void) {
+  uint8_t i;
+
+  memset(buffers,0,sizeof(buffers));
+  for (i=0;i<CONFIG_BUFFER_COUNT;i++)
+    buffers[i].data = bufferdata + 256*i;
+
+  buffers[ERRORBUFFER_IDX].data      = error_buffer;
+  buffers[ERRORBUFFER_IDX].secondary = 15;
+  buffers[ERRORBUFFER_IDX].allocated = 1;
+  buffers[ERRORBUFFER_IDX].read      = 1;
+  buffers[ERRORBUFFER_IDX].write     = 1;
+  buffers[ERRORBUFFER_IDX].sendeoi   = 1;
+  buffers[ERRORBUFFER_IDX].refill    = set_ok_message;
+  buffers[ERRORBUFFER_IDX].cleanup   = callback_dummy;
+}
+
+/**
+ * alloc_specific_buffer - allocate a specific buffer for system use
+ *
+ * This function allocates the specified buffer and marks it as used.
+ * Returns without doing anything if the buffer is already allocated.
+ */
+static void alloc_specific_buffer(uint8_t bufnum) {
+  if (!buffers[bufnum].allocated) {
+    /* Clear everything except the data pointer */
+    memset(sizeof(uint8_t *)+(char *)&(buffers[bufnum]),0,sizeof(buffer_t)-sizeof(uint8_t *));
+    buffers[bufnum].allocated = 1;
+    buffers[bufnum].secondary = BUFFER_SEC_SYSTEM;
+    buffers[bufnum].refill    = callback_dummy;
+    buffers[bufnum].cleanup   = callback_dummy;
+  }
+}
+
+/**
+ * alloc_system_buffer - allocate a buffer for system use
+ *
+ * This function allocates a buffer and marks it as used. Returns a
+ * pointer to the buffer structure or NULL of no buffer is free.
+ */
+buffer_t *alloc_system_buffer(void) {
+  uint8_t i;
+
+  for (i=0;i<CONFIG_BUFFER_COUNT;i++) {
+    if (!buffers[i].allocated) {
+      alloc_specific_buffer(i);
+      return &buffers[i];
+    }
+  }
+
+  set_error(ERROR_NO_CHANNEL);
+  return NULL;
+}
+
+/**
+ * alloc_buffer - allocates a buffer
+ *
+ * This function allocates a buffer and marks it as used. It will also
+ * turn on the busy LED to notify the user. Returns a pointer to the
+ * buffer structure or NULL if no buffer is free.
+ */
+buffer_t *alloc_buffer(void) {
+  buffer_t *buf = alloc_system_buffer();
+  if (buf != NULL) {
+    buf->secondary = 0;
+    active_buffers++;
+    set_busy_led(1);
+  }
+  return buf;
+}
+
+/**
+ * alloc_linked_buffers - allocates linked buffers
+ * @count    : Number of buffers to allocate
+ *
+ * This function allocates count buffers, marks them as used and
+ * links them. It will also turn on the busy LED to notify the user.
+ * Returns a pointer to the first buffer structure or NULL if
+ * not enough buffers are free. The data segments of the allocated
+ * buffers are guaranteed to be continuous.
+ */
+buffer_t *alloc_linked_buffers(uint8_t count) {
+  uint8_t i,freebufs,start;
+
+  freebufs = 0;
+  start    = 0;
+  for (i=0;i<CONFIG_BUFFER_COUNT;i++) {
+    if (buffers[i].allocated) {
+      /* Look for continuous buffers */
+      /* Switching data segments is possible, but probably not required */
+      freebufs = 0;
+    } else {
+      if (freebufs == 0)
+        start = i;
+      freebufs++;
+      /* Found enough free space */
+      if (freebufs == count)
+        break;
+    }
+  }
+
+  if (freebufs < count) {
+    set_error(ERROR_NO_CHANNEL);
+    return NULL;
+  }
+
+  /* Chain the buffers */
+  for (i=0;i<count;i++) {
+    alloc_specific_buffer(start+i);
+    active_buffers++;
+    buffers[start+i].secondary = 0;
+    buffers[start+i].pvt.buffer.next  = &buffers[start+i+1];
+    buffers[start+i].pvt.buffer.first = &buffers[start];
+    buffers[start+i].pvt.buffer.size  = count;
+  }
+
+  set_busy_led(1);
+
+  buffers[start+count-1].pvt.buffer.next = NULL;
+
+  return &buffers[start];
+}
+
+/**
+ * cleanup_and_free_buffer - cleanup and deallocate a buffer
+ * @buffer: pointer to the buffer structure to cleanup and mark as free
+ *
+ * This function calls the cleanup function and deallocates the buffer.
+ */
+void cleanup_and_free_buffer(buffer_t *buffer) {
+  buffer->cleanup(buffer);
+  free_buffer(buffer);
+}
+
+/**
+ * free_buffer - deallocate a buffer
+ * @buffer: pointer to the buffer structure to mark as free
+ *
+ * This function deallocates the given buffer. If the pointer is NULL,
+ * the buffer is already freed or the buffer is assigned to secondary
+ * address 15 nothing will happen. This function will also update the
+ * two LEDs according to the remaining number of open and writable
+ * buffers.
+ */
+void free_buffer(buffer_t *buffer) {
+  if (buffer == NULL) return;
+  if (buffer->secondary == 15) return;
+  if (!buffer->allocated) return;
+
+  buffer->allocated = 0;
+
+  if (buffer->dirty)
+    active_buffers -= 16;
+  if (buffer->secondary < BUFFER_SEC_SYSTEM)
+    active_buffers--;
+
+  update_leds();
+}
+
+/**
+ * free_multiple_buffers - deallocates multiple buffers
+ * @flags: Defines which buffers should be deallocated
+ *
+ * This function iterates over all buffers and frees those which match the
+ * specification in flags (see FMB_* defines). If FMB_CLEAN is set it will
+ * also call the cleanup function for those buffers which are about to be
+ * freed. When FMB_CLEAN is set, the function returns 0 if all cleanup
+ * functions returned 0 or 1 if at least one did not. When FMB_CLEAN is not
+ * set, returns 0.
+ */
+uint8_t free_multiple_buffers(uint8_t flags) {
+  uint8_t i,res;
+
+  res = 0;
+
+  for (i=0;i<CONFIG_BUFFER_COUNT;i++) {
+    if (buffers[i].allocated) {
+      if ((flags & FMB_FREE_SYSTEM) || buffers[i].secondary < BUFFER_SEC_SYSTEM) {
+        if ((flags & FMB_FREE_STICKY) || !buffers[i].sticky) {
+          if (flags & FMB_CLEAN) {
+            res = res || buffers[i].cleanup(&buffers[i]);
+          }
+          free_buffer(&buffers[i]);
+        }
+      }
+    }
+  }
+
+  return res;
+}
+
+/**
+ * find_buffer - find the buffer corresponding to a secondary address
+ * @secondary: secondary address to look for
+ *
+ * This function returns a pointer to the first buffer structure whose
+ * secondary address is the same as the one given. Returns NULL if
+ * no matching buffer was found.
+ */
+buffer_t *find_buffer(uint8_t secondary) {
+  uint8_t i;
+
+  for (i=0;i<CONFIG_BUFFER_COUNT+1;i++) {
+    if (buffers[i].allocated && buffers[i].secondary == secondary)
+      return &buffers[i];
+  }
+  return NULL;
+}
+
+/**
+ * mark_buffer_dirty - mark a buffer as dirty
+ * @buf: pointer to the buffer
+ *
+ * This function marks the given buffer as dirty, tracks
+ * this in active_buffers and turns on the dirty LED.
+ */
+void mark_buffer_dirty(buffer_t *buf) {
+  if (!buf->dirty) {
+    buf->dirty = 1;
+    active_buffers += 16;
+    set_dirty_led(1);
+  }
+}
+
+/**
+ * mark_buffer_clean - mark a buffer as clean
+ * @buf: pointer to the buffer
+ *
+ * This function marks the given buffer as clean, tracks
+ * this in active_buffers and turns off the dirty LED if required.
+ */
+void mark_buffer_clean(buffer_t *buf) {
+  if (buf->dirty) {
+    buf->dirty = 0;
+    active_buffers -= 16;
+    if (get_dirty_buffer_count() == 0)
+      set_dirty_led(0);
+  }
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/buffers.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/buffers.h
new file mode 100644
index 00000000..dee1dfb8
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/buffers.h
@@ -0,0 +1,210 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   buffers.h: Data structures for the internal buffers
+*/
+
+#ifndef BUFFERS_H
+#define BUFFERS_H
+
+#include <stdint.h>
+#include "dirent.h"
+
+#define ERRORBUFFER_IDX   CONFIG_BUFFER_COUNT
+#define BUFFER_SEC_SYSTEM 100
+
+/* Special-purpose buffer numbers */
+#define BUFFER_SYS_BAM      (BUFFER_SEC_SYSTEM+1)
+
+// fastloader data capture
+#define BUFFER_SYS_CAPTURE1 (BUFFER_SEC_SYSTEM+2)
+#define BUFFER_SYS_CAPTURE2 (BUFFER_SEC_SYSTEM+3)
+#define BUFFER_SYS_CAPTURE3 (BUFFER_SEC_SYSTEM+4)
+
+/* chained buffers use (BUFFER_SEC_CHAIN-14)..BUFFER_SEC_CHAIN */
+/* to distinguish secondary addresses */
+#define BUFFER_SEC_CHAIN    (BUFFER_SEC_SYSTEM-1)
+
+/* Flags for free_multiple_buffers */
+#define FMB_CLEAN          (1<<0)
+#define FMB_FREE_SYSTEM    (1<<1)
+#define FMB_FREE_STICKY    (1<<2)
+#define FMB_ALL            (FMB_FREE_STICKY|FMB_FREE_SYSTEM)
+#define FMB_ALL_CLEAN      (FMB_FREE_STICKY|FMB_FREE_SYSTEM|FMB_CLEAN)
+#define FMB_USER           (FMB_FREE_STICKY)
+#define FMB_USER_CLEAN     (FMB_FREE_STICKY|FMB_CLEAN)
+#define FMB_UNSTICKY       (FMB_FREE_SYSTEM)
+#define FMB_UNSTICKY_CLEAN (FMB_FREE_SYSTEM|FMB_CLEAN)
+
+typedef enum { DIR_FMT_CBM, DIR_FMT_CMD_SHORT, DIR_FMT_CMD_LONG } dirformat_t;
+
+/**
+ * struct buffer_s - buffer handling structire
+ * @data     : Pointer to the data area of the buffer, MUST be the first field
+ * @lastused : Index to the last used byted
+ * @position : Index of the byte that will be read/written next
+ * @seconday : Secondary address the buffer is associated with
+ * @recordlen: Record length, if buffer points to a REL file
+ * @allocated: Flags if the buffer is allocated or not
+ * @mustflush: Flags if the buffer must be flushed before adding characters
+ * @read     : Flags if the buffer was opened for reading
+ * @write    : Flags if the buffer was opened for writing
+ * @sendeoi  : Flags if the last byte should be sent with EOI
+ * @sticky   : Flags if the buffer will survive garbage collection
+ * @refill   : Callback to refill/write out the buffer, returns true on error
+ * @cleanup  : Callback to clean up and save remaining data, returns true on error
+ *
+ * Most allocated buffers point into the same bufferdata array, but
+ * the error channel uses the same structure to avoid special-casing it
+ * everywhere.
+ */
+typedef struct buffer_s {
+  /* The error channel uses the same data structure for convenience reasons, */
+  /* so data must be a pointer. It also allows swapping the buffers around   */
+  /* in case I ever add external ram (not XRAM) to the design (which will    */
+  /* require locking =( ).                                                   */
+  uint8_t *data;
+  uint8_t lastused;
+  uint8_t position;
+  uint8_t secondary;
+  uint8_t recordlen;
+  uint32_t fptr;  // FIXME: Missing from doc comment
+  int     allocated:1;
+  int     mustflush:1;
+  int     read:1;
+  int     write:1;
+  int     dirty:1;
+  int     sendeoi:1;
+  int     sticky:1;
+  uint8_t (*seek) (struct buffer_s *buffer, uint32_t position, uint8_t index);
+  uint8_t (*refill)(struct buffer_s *buffer);
+  uint8_t (*cleanup)(struct buffer_s *buffer);
+
+  /* private: */
+  union {
+    struct {
+      dh_t dh;             /* Directory handle */
+      uint8_t filetype;    /* File type */
+      dirformat_t format;  /* Dir format */
+      uint8_t *matchstr;   /* Pointer to filename pattern */
+      date_t *match_start; /* Start matching date */
+      date_t *match_end;   /* End matching date */
+      uint8_t counter;     /* used for counting raw entries */
+    } dir;
+    struct {
+      FIL fh;              /* File access via FAT */
+      uint8_t headersize;  /* offset to start of file data */
+    } fat;
+    d64fh_t d64;           /* File access on D64  */
+    eefs_fh_t eefh;        /* File handle for eepromfs */
+    struct {
+      uint8_t part;        /* partition number for $=P */
+      uint8_t *matchstr;   /* Pointer to filename pattern */
+    } pdir;
+    struct {
+      uint8_t part;        /* partition number where the BAM came from */
+      uint8_t track;       /* BAM-track (if more than one) */
+      uint8_t sector;      /* BAM-sector (if more than one) */
+    } bam;
+    struct {
+      uint8_t part;           /* current partition at buffer creation time */
+      uint8_t size;           /* Number of buffers in chain  */
+      struct buffer_s *first; /* Pointer to the first buffer */
+      struct buffer_s *next;  /* Pointer to the next buffer  */
+    } buffer;
+  } pvt;
+} buffer_t;
+
+extern dh_t matchdh;         /// Directory handle used in file matching
+extern buffer_t buffers[];   /// Simplifies access to the error buffer length
+
+extern uint8_t ops_scratch[33]; /// scratch space for use in fileops code
+
+/* Initializes the buffer structures */
+void buffers_init(void);
+
+/* Dummy callback */
+uint8_t callback_dummy(buffer_t *buf);
+
+/* Allocates a buffer for internal use */
+buffer_t *alloc_system_buffer(void);
+
+/* Allocates a buffer - returns pointer to buffer or NULL if failure */
+buffer_t *alloc_buffer(void);
+
+/* Allocates linked buffers - returns pointer to first buffer or NULL if failure */
+/* Buffers are guranteed to have continuous data segments. */
+buffer_t *alloc_linked_buffers(uint8_t count);
+
+/* Call the cleanup function and deallocate a buffer */
+void cleanup_and_free_buffer(buffer_t *buffer);
+
+/* Deallocates a buffer */
+void free_buffer(buffer_t *buffer);
+
+/* Deallocates multiple buffers */
+uint8_t free_multiple_buffers(uint8_t flags);
+
+/* Mark a buffer as sticky */
+static void inline stick_buffer(buffer_t *buf) {
+  buf->sticky = 1;
+}
+
+/* remove sticky mark */
+static void inline unstick_buffer(buffer_t *buf) {
+  buf->sticky = 0;
+}
+
+/* Finds the buffer corresponding to a secondary address */
+/* Returns pointer to buffer on success or NULL on failure */
+buffer_t *find_buffer(uint8_t secondary);
+
+/* Number of currently allocated buffers + 16 * number of write buffers */
+extern uint8_t active_buffers;
+
+/* Check if any buffers are free */
+#define check_free_buffers() ((active_buffers & 0x0f) < CONFIG_BUFFER_COUNT)
+
+/* Return the number of dirty buffers */
+#define get_dirty_buffer_count() (active_buffers >> 4)
+
+/* Mark a buffer as write-buffer and sticky it */
+// Note: inline function is smaller than external on AVR with gcc 4.8.2
+static inline void mark_write_buffer(buffer_t *buf) {
+  buf->write = 1;
+  stick_buffer(buf);
+}
+
+/* Mark a buffer as dirty */
+void mark_buffer_dirty(buffer_t *buf);
+
+/* Mark a buffer as clean */
+void mark_buffer_clean(buffer_t *buf);
+
+
+#ifdef __AVR__
+/* AVR-specific hack: Address 1 is r1 which is always zero in C code */
+#  define NULLSTRING ((uint8_t *)1)
+#else
+#  define NULLSTRING ((uint8_t *)"")
+#endif
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/bus.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/bus.h
new file mode 100644
index 00000000..c7ee0f07
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/bus.h
@@ -0,0 +1,35 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   bus.h: Common IEC/IEEE bus definitions
+
+*/
+
+#ifndef BUS_H
+#define BUS_H
+
+extern uint8_t device_address;
+
+void bus_interface_init(void);
+void bus_init(void);
+void __attribute__((noreturn)) bus_mainloop(void);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/config.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/config.h
new file mode 100644
index 00000000..f70df533
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/config.h
@@ -0,0 +1,110 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   config.h: The main configuration header file which actually doesn't have
+             any configuration options in it anymore.
+
+*/
+
+#ifndef CONFIG_H
+#define CONFIG_H
+
+/* disable assertions */
+#ifndef CONFIG_ASSERTIONS
+#  define NDEBUG
+#endif
+
+#include "autoconf.h"
+#include "arch-config.h"
+
+/* Disable COMMAND_CHANNEL_DUMP if UART_DEBUG is disabled */
+#ifndef CONFIG_UART_DEBUG
+#  undef CONFIG_COMMAND_CHANNEL_DUMP
+#endif
+
+/* An interrupt for detecting card changes implies hotplugging capability */
+#if defined(SD_CHANGE_HANDLER) || defined (CF_CHANGE_HANDLER)
+#  define HAVE_HOTPLUG
+#endif
+
+/* Generate a dummy function if there is no board-specific initialisation */
+#ifndef HAVE_BOARD_INIT
+static inline void board_init(void) {
+  return;
+}
+#endif
+
+/* ----- Translate CONFIG_ADD symbols to HAVE symbols ----- */
+/* By using two symbols for this purpose it's easier to determine if */
+/* support was enabled by default or added in the config file.       */
+#if defined(CONFIG_ADD_SD) && !defined(HAVE_SD)
+#  define HAVE_SD
+#endif
+
+#if defined(CONFIG_ADD_ATA) && !defined(HAVE_ATA)
+#  define HAVE_ATA
+#endif
+
+/* Enable the diskmux if more than one storage device is enabled. */
+#if !defined(NEED_DISKMUX) && (defined(HAVE_SD) + defined(HAVE_ATA)) > 1
+#  define NEED_DISKMUX
+#endif
+
+/* Hardcoded maximum - reducing this won't save any ram */
+#define MAX_DRIVES 8
+
+/* SD access LED dummy */
+#ifndef HAVE_SD_LED
+# define set_sd_led(x) do {} while (0)
+#endif
+
+/* Sanity checks */
+#if defined(CONFIG_LOADER_WHEELS) && !defined(CONFIG_LOADER_GEOS)
+#  error "CONFIG_LOADER_GEOS must be enabled for Wheels support!"
+#endif
+
+#if defined(CONFIG_PARALLEL_DOLPHIN)
+#  if !defined(HAVE_PARALLEL)
+#    error "CONFIG_PARALLEL_DOLPHIN enabled on a hardware without parallel port!"
+#  else
+#    define PARALLEL_ENABLED
+#  endif
+#endif
+
+/* ----- Translate CONFIG_RTC_* symbols to HAVE_RTC symbol ----- */
+#if defined(CONFIG_RTC_SOFTWARE) || \
+    defined(CONFIG_RTC_PCF8583)  || \
+    defined(CONFIG_RTC_LPC17XX)  || \
+    defined(CONFIG_RTC_DS3231)   || \
+    defined(CONFIG_RTC_DS1307)
+#  define HAVE_RTC
+
+/* calculate the number of enabled RTCs */
+#  if defined(CONFIG_RTC_SOFTWARE) + \
+      defined(CONFIG_RTC_PCF8583)  + \
+      defined(CONFIG_RTC_LPC17XX)  + \
+      defined(CONFIG_RTC_DS3231)   + \
+      defined(CONFIG_RTC_DS1307) > 1
+#    define NEED_RTCMUX
+#  endif
+#endif
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/d64ops.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/d64ops.c
new file mode 100644
index 00000000..b70c4fda
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/d64ops.c
@@ -0,0 +1,2048 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   d64ops.c: D64 operations
+
+*/
+
+#include <stdint.h>
+#include <string.h>
+#include "config.h"
+#include "buffers.h"
+#include "dirent.h"
+#include "errormsg.h"
+#include "fatops.h"
+#include "ff.h"
+#include "parser.h"
+#include "progmem.h"
+#include "rtc.h"
+#include "ustring.h"
+#include "wrapops.h"
+#include "d64ops.h"
+
+#define D41_ERROR_OFFSET 174848
+#define D71_ERROR_OFFSET 349696
+#define D81_ERROR_OFFSET 819200
+
+#define D41_BAM_TRACK           18
+#define D41_BAM_SECTOR          0
+#define D41_BAM_BYTES_PER_TRACK 4
+#define D41_BAM_BITFIELD_BYTES  3
+
+#define D81_BAM_TRACK           40
+#define D81_BAM_SECTOR1         1
+#define D81_BAM_SECTOR2         2
+#define D81_BAM_OFFSET          10
+#define D81_BAM_BYTES_PER_TRACK 6
+#define D81_BAM_BITFIELD_BYTES  5
+
+#define D71_BAM2_TRACK  53
+#define D71_BAM2_SECTOR 0
+#define D71_BAM2_BYTES_PER_TRACK 3
+#define D71_BAM_COUNTER2OFFSET   0xdd
+
+#define DNP_BAM_TRACK                     1
+#define DNP_BAM_SECTOR                    2
+#define DNP_BAM_LAST_TRACK_OFS            8
+#define DNP_ROOTDIR_SECTOR               34 // only for formatting!
+#define DNP_BAM_BYTES_PER_TRACK          32
+#define DNP_DIRHEADER_DIR_TRACK           0
+#define DNP_DIRHEADER_DIR_SECTOR          1
+#define DNP_DIRHEADER_ROOTHDR_TRACK      32
+#define DNP_DIRHEADER_ROOTHDR_SECTOR     33
+#define DNP_DIRHEADER_PARENTHDR_TRACK    34
+#define DNP_DIRHEADER_PARENTHDR_SECTOR   35
+#define DNP_DIRHEADER_PARENTENTRY_TRACK  36
+#define DNP_DIRHEADER_PARENTENTRY_SECTOR 37
+#define DNP_DIRHEADER_PARENTENTRY_OFFSET 38
+#define DNP_LABEL_OFFSET                  4
+#define DNP_LABEL_AREA_SIZE             (28-4+1)
+#define DNP_ID_OFFSET                    22
+
+/* used for error info only */
+#define MAX_SECTORS_PER_TRACK 40
+
+typedef enum { BAM_BITFIELD, BAM_FREECOUNT } bamdata_t;
+
+struct {
+  uint8_t part;
+  uint8_t track;
+  uint8_t errors[MAX_SECTORS_PER_TRACK];
+} errorcache;
+
+static buffer_t *bam_buffer;  // recently-used buffer
+static buffer_t *bam_buffer2; // secondary buffer
+static uint8_t   bam_refcount;
+
+/* ------------------------------------------------------------------------- */
+/*  Forward declarations                                                     */
+/* ------------------------------------------------------------------------- */
+
+static uint8_t d64_opendir(dh_t *dh, path_t *path);
+
+static void format_d41_image(uint8_t part, buffer_t *buf, uint8_t *name, uint8_t *idbuf);
+static void format_d71_image(uint8_t part, buffer_t *buf, uint8_t *name, uint8_t *idbuf);
+static void format_d81_image(uint8_t part, buffer_t *buf, uint8_t *name, uint8_t *idbuf);
+static void format_dnp_image(uint8_t part, buffer_t *buf, uint8_t *name, uint8_t *idbuf);
+
+/* ------------------------------------------------------------------------- */
+/*  Utility functions                                                        */
+/* ------------------------------------------------------------------------- */
+
+static const PROGMEM struct param_s d41param = {
+  18, 1, 35, 0x90, 0xa2, 10, 3, format_d41_image
+};
+
+static const PROGMEM struct param_s d71param = {
+  18, 1, 70, 0x90, 0xa2, 6, 3, format_d71_image
+};
+
+static const PROGMEM struct param_s d81param = {
+  40, 3, 80, 0x04, 0x16, 1, 1, format_d81_image
+};
+
+static const PROGMEM struct param_s dnpparam = {
+  1, 1, 0, DNP_LABEL_OFFSET, DNP_ID_OFFSET, 1, 1, format_dnp_image
+};
+
+/**
+ * get_param - get a format-dependent parameter
+ * @part : partition number
+ * @param: parameter to retrieve
+ *
+ * Returns a parameter that is format-dependent for the image type mounted
+ * on the specified partition.
+ */
+static uint8_t get_param(uint8_t part, param_t param) {
+  return *(((uint8_t *)&partition[part].d64data)+param);
+}
+
+/**
+ * sector_lba - Transform a track/sector pair into a LBA sector number
+ * @part  : partition number
+ * @track : Track number
+ * @sector: Sector number
+ *
+ * Calculates an LBA-style sector number for a given track/sector pair.
+ */
+/* This version used the least code of all tested variants. */
+static uint16_t sector_lba(uint8_t part, uint8_t track, const uint8_t sector) {
+  uint16_t offset = 0;
+
+  track--; /* Track numbers are 1-based */
+
+  switch (partition[part].imagetype & D64_TYPE_MASK) {
+  case D64_TYPE_D41:
+  case D64_TYPE_D71:
+  default:
+    if (track >= 35) {
+      offset = 683;
+      track -= 35;
+    }
+    if (track < 17)
+      return track*21 + sector + offset;
+    if (track < 24)
+      return 17*21 + (track-17)*19 + sector + offset;
+    if (track < 30)
+      return 17*21 + 7*19 + (track-24)*18 + sector + offset;
+    return 17*21 + 7*19 + 6*18 + (track-30)*17 + sector + offset;
+
+  case D64_TYPE_D81:
+    return track*40 + sector;
+
+  case D64_TYPE_DNP:
+    return track*256 + sector;
+  }
+}
+
+/**
+ * sector_offset - Transform a track/sector pair into a D64 offset
+ * @part  : partition number
+ * @track : Track number
+ * @sector: Sector number
+ *
+ * Calculates an offset into a D64 file from a track and sector number.
+ */
+static uint32_t sector_offset(uint8_t part, uint8_t track, const uint8_t sector) {
+  return 256L * sector_lba(part,track,sector);
+}
+
+/**
+ * sectors_per_track - number of sectors on given track
+ * @part : partition number
+ * @track: Track number
+ *
+ * This function returns the number of sectors on the given track
+ * of a 1541/71/81 disk. Invalid track numbers will return invalid results.
+ */
+static uint16_t sectors_per_track(uint8_t part, uint8_t track) {
+  switch (partition[part].imagetype & D64_TYPE_MASK) {
+  case D64_TYPE_D41:
+  case D64_TYPE_D71:
+  default:
+    if (track > 35)
+      track -= 35;
+    if (track < 18)
+      return 21;
+    if (track < 25)
+      return 19;
+    if (track < 31)
+      return 18;
+    return 17;
+
+  case D64_TYPE_D81:
+    return 40;
+
+  case D64_TYPE_DNP:
+    return 256;
+  }
+}
+
+/**
+ * checked_read - read a specified sector after range-checking
+ * @part  : partition number
+ * @track : track number to be read
+ * @sector: sector number to be read
+ * @buf   : pointer to where the data should be read to
+ * @len   : number of bytes to be read
+ * @error : error number to be flagged if the range check fails
+ *
+ * This function checks if the track and sector are within the
+ * limits for the image format and calls image_read to read
+ * the data if they are. Returns the result of image_read or
+ * 2 if the range check failed.
+ */
+static uint8_t checked_read(uint8_t part, uint8_t track, uint8_t sector, uint8_t *buf, uint16_t len, uint8_t error) {
+  if (track < 1 || track > get_param(part, LAST_TRACK) ||
+      sector >= sectors_per_track(part, track)) {
+    set_error_ts(error,track,sector);
+    return 2;
+  }
+
+  if (partition[part].imagetype & D64_HAS_ERRORINFO) {
+    /* Check if the sector is marked as bad */
+    if (errorcache.part != part || errorcache.track != track) {
+      /* Read the error info for this track */
+      memset(errorcache.errors, 1, sizeof(errorcache.errors));
+
+      switch (partition[part].imagetype & D64_TYPE_MASK) {
+      case D64_TYPE_D41:
+        if (image_read(part, D41_ERROR_OFFSET + sector_lba(part,track,0),
+                       errorcache.errors, sectors_per_track(part, track)) >= 2)
+          return 2;
+        break;
+
+      case D64_TYPE_D71:
+        if (image_read(part, D71_ERROR_OFFSET + sector_lba(part,track,0),
+                       errorcache.errors, sectors_per_track(part, track)) >= 2)
+          return 2;
+        break;
+
+      case D64_TYPE_D81:
+        if (image_read(part, D81_ERROR_OFFSET + sector_lba(part,track,0),
+                       errorcache.errors, sectors_per_track(part, track)) >= 2)
+          return 2;
+        break;
+
+      default:
+        /* Should not happen unless someone enables error info
+           for additional image formats */
+        return 2;
+
+      }
+      errorcache.part  = part;
+      errorcache.track = track;
+    }
+
+    /* Calculate error message from the code */
+    if (errorcache.errors[sector] >= 2 && errorcache.errors[sector] <= 11) {
+      /* Most codes can be mapped directly */
+      set_error_ts(errorcache.errors[sector]-2+20,track,sector);
+      return 2;
+    }
+    if (errorcache.errors[sector] == 15) {
+      /* Drive not ready */
+      set_error(74);
+      return 2;
+    }
+    /* 1 is OK, unknown values are accepted too */
+  }
+
+  return image_read(part, sector_offset(part,track,sector), buf, len);
+}
+
+/**
+ * update_timestamp - update timestamp of a directory entry
+ * @buffer: pointer to the directory entry
+ *
+ * This function updates the time stamp of a directory entry
+ * at the address pointed to by @buffer with the current
+ * date/time if available or the default timestamp if not.
+ */
+static void update_timestamp(uint8_t *buffer) {
+#ifdef HAVE_RTC
+  struct tm time;
+
+  read_rtc(&time);
+  buffer[DIR_OFS_YEAR]   = time.tm_year % 100;
+  buffer[DIR_OFS_MONTH]  = time.tm_mon + 1;
+  buffer[DIR_OFS_DAY]    = time.tm_mday;
+  buffer[DIR_OFS_HOUR]   = time.tm_hour;
+  buffer[DIR_OFS_MINUTE] = time.tm_min;
+#else
+  buffer[DIR_OFS_YEAR]   = 82;
+  buffer[DIR_OFS_MONTH]  = 8;
+  buffer[DIR_OFS_DAY]    = 31;
+  buffer[DIR_OFS_HOUR]   = 0;
+  buffer[DIR_OFS_MINUTE] = 0;
+#endif
+}
+
+/**
+ * write_entry - write a single directory entry
+ * @part : partition number
+ * @dh   : pointer to d64dh pointing to the entry
+ * @buf  : pointer to the buffer where the data should be read from
+ * @flush: if true, data is flushed to disk immediately
+ *
+ * This function writes a single directory entry specified by @dh
+ * from the buffer @buf.
+ * Assumes that it is never called with an invalid track/sector.
+ * Returns the same as image_write
+ */
+static uint8_t write_entry(uint8_t part, struct d64dh *dh, uint8_t *buf, uint8_t flush) {
+  return image_write(part, sector_offset(part, dh->track, dh->sector) +
+                           dh->entry * 32, buf, 32, flush);
+}
+
+/**
+ * read_entry - read a single directory entry
+ * @part: partition number
+ * @dh  : pointer to d64dh pointing to the entry
+ * @buf : pointer to the buffer where the data should be stored
+ *
+ * This function reads a single directory entry specified by dh
+ * into the buffer buf which needs to be at least 32 bytes big.
+ * Assumes that it is never called with an invalid track/sector.
+ * Returns the same as image_read (0 success, 1 partial read, 2 failed)
+ */
+static uint8_t read_entry(uint8_t part, struct d64dh *dh, uint8_t *buf) {
+  return image_read(part, sector_offset(part, dh->track, dh->sector) +
+                          dh->entry * 32, buf, 32);
+}
+
+/**
+ * strnsubst - substitute one character with another in a buffer
+ * @buffer : pointer to the buffer
+ * @len    : length of buffer
+ * @oldchar: character to be replaced
+ * @newchar: character to be used as a replacement
+ *
+ * This functions changes all occurences of oldchar in the first len
+ * byte of buffer with newchar. Although it is named str*, it doesn't
+ * care about zero bytes in any way.
+ */
+static void strnsubst(uint8_t *buffer, uint8_t len, uint8_t oldchar, uint8_t newchar) {
+  uint8_t i=len-1;
+
+  do {
+    if (buffer[i] == oldchar)
+      buffer[i] = newchar;
+  } while (i--);
+}
+
+/* fill a sector with 0 0xff 0* to generate a new empty directory sector */
+/* needs a 256 byte work area in *data */
+static uint8_t clear_dir_sector(uint8_t part, uint8_t t, uint8_t s, uint8_t *data) {
+  memset(data, 0, 256);
+
+  data[1] = 0xff;
+  return image_write(part, sector_offset(part, t, s), data, 256, 0);
+}
+
+
+/* ------------------------------------------------------------------------- */
+/*  BAM buffer handling                                                      */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * bam_buffer_flush - write BAM buffer to disk
+ * @buf: pointer to the BAM buffer
+ *
+ * This function writes the contents of the BAM buffer to the disk image.
+ * Returns 0 if successful, != 0 otherwise.
+ */
+static uint8_t bam_buffer_flush(buffer_t *buf) {
+  uint8_t res;
+
+  if (buf->mustflush && buf->pvt.bam.part < max_part) {
+    res = image_write(buf->pvt.bam.part,
+                      sector_offset(buf->pvt.bam.part,
+                                    buf->pvt.bam.track,
+                                    buf->pvt.bam.sector),
+                      buf->data, 256, 1);
+    buf->mustflush = 0;
+
+    return res;
+  } else
+    return 0;
+}
+
+/**
+ * d64_bam_commit - write BAM buffers to disk
+ *
+ * This function is the exported interface to force the BAM buffer
+ * contents to disk. Returns 0 if successful, != 0 otherwise.
+ */
+uint8_t d64_bam_commit(void) {
+  uint8_t res = 0;
+
+  if (bam_buffer)
+    res |= bam_buffer->cleanup(bam_buffer);
+
+  if (bam_buffer2)
+    res |= bam_buffer2->cleanup(bam_buffer2);
+
+  return 0;
+}
+
+/**
+ * bam_buffer_alloc - allocates a buffer for the BAM
+ * @buf: pointer to the BAM buffer pointer
+ *
+ * This function tries to allocate a buffer for holding the BAM,
+ * using the pointer pointed to by @buf. Returns 0 if successful,
+ * != 0 otherwise.
+ */
+static uint8_t bam_buffer_alloc(buffer_t **buf) {
+  *buf = alloc_system_buffer();
+  if (!*buf)
+    return 1;
+
+  (*buf)->secondary    = BUFFER_SYS_BAM;
+  (*buf)->pvt.bam.part = 255;
+  (*buf)->cleanup      = bam_buffer_flush;
+  stick_buffer(*buf);
+
+  return 0;
+}
+
+/**
+ * bam_buffer_swap - swap the two BAM buffers
+ *
+ * Thus function swaps the pointers to the two BAM buffers
+ */
+static void bam_buffer_swap(void) {
+  buffer_t *tmp = bam_buffer;
+  bam_buffer    = bam_buffer2;
+  bam_buffer2   = tmp;
+}
+
+/**
+ * bam_buffer_match - checks if a BAM buffer contains a specific sector
+ * @buf   : BAM buffer to check
+ * @part  : partition
+ * @track : track
+ * @sector: sector
+ *
+ * This function checks if the BAM buffer @buf currently holds the data
+ * for the given @part, @track and @sector. Returns 1 if it does,
+ * 0 otherwise.
+ */
+static uint8_t bam_buffer_match(buffer_t *buf, uint8_t part,
+                                uint8_t track, uint8_t sector) {
+  if (buf->pvt.bam.part   == part  &&
+      buf->pvt.bam.track  == track &&
+      buf->pvt.bam.sector == sector)
+    return 1;
+  else
+    return 0;
+}
+
+/**
+ * move_bam_window - read correct BAM sector into window.
+ * @part  : partition
+ * @track : track number
+ * @type  : type of pointer requested
+ * @ptr   : pointer to track information in BAM sector
+ *
+ * This function reads the correct BAM sector into memory for the requested
+ * track, flushing an existing BAM sector to disk if needed.  It also
+ * calculates the correct pointer into the BAM sector for the appropriate
+ * track.  Since the BAM contains both sector counts and sector allocation
+ * bitmaps, type is used to signal which reference is desired.
+ * This function may swap the BAM buffer pointers, after it returns
+ * bam_buffer is always the buffer with the requested sector.
+ * Returns 0 if successful, != 0 otherwise.
+ */
+static uint8_t move_bam_window(uint8_t part, uint8_t track, bamdata_t type, uint8_t **ptr) {
+  uint8_t res;
+  uint8_t t,s, pos;
+
+  switch(partition[part].imagetype & D64_TYPE_MASK) {
+  case D64_TYPE_D41:
+  default:
+    t   = D41_BAM_TRACK;
+    s   = D41_BAM_SECTOR;
+    pos = D41_BAM_BYTES_PER_TRACK * track + (type == BAM_BITFIELD ? 1:0);
+    break;
+
+  case D64_TYPE_D71:
+    if (track > 35 && type == BAM_BITFIELD) {
+      t   = D71_BAM2_TRACK;
+      s   = D71_BAM2_SECTOR;
+      pos = (track - 36) * D71_BAM2_BYTES_PER_TRACK;
+    } else {
+      t = D41_BAM_TRACK;
+      s = D41_BAM_SECTOR;
+      if (track > 35) {
+        pos = (track - 36) + D71_BAM_COUNTER2OFFSET;
+      } else {
+        pos = D41_BAM_BYTES_PER_TRACK * track + (type == BAM_BITFIELD ? 1:0);
+      }
+    }
+    break;
+
+  case D64_TYPE_D81:
+    t   = D81_BAM_TRACK;
+    s   = (track < 41 ? D81_BAM_SECTOR1 : D81_BAM_SECTOR2);
+    if (track > 40)
+      track -= 40;
+    pos = D81_BAM_OFFSET + track * D81_BAM_BYTES_PER_TRACK + (type == BAM_BITFIELD ? 1:0);
+    break;
+
+  case D64_TYPE_DNP:
+    t   = DNP_BAM_TRACK;
+    s   = DNP_BAM_SECTOR + (track >> 3);
+    pos = (track & 0x07) * 32;
+    break;
+  }
+
+  if (!bam_buffer_match(bam_buffer, part, t, s)) {
+    /* check if the second BAM buffer exists */
+    if (bam_buffer2) {
+      /* unconditionally swap to the other BAM buffer        */
+      /* either it has the data or it was less-recently used */
+
+      /* Note for future optimization:
+       * If buf1 is invalid and buf2 valid but not matching this will swap and
+       * use buf2 for the data instead of buf1 - using buf1
+       * while keeping buf2 without swapping would be better.
+       */
+      bam_buffer_swap();
+
+      /* check again, now in the other buffer */
+      if (bam_buffer_match(bam_buffer, part, t, s))
+        goto found;
+    } else {
+      /* allocate and swap to the second BAM buffer if the first one is valid */
+      if (bam_buffer->pvt.bam.part != 255) {
+        if (bam_buffer_alloc(&bam_buffer2)) {
+          /* allocation failed, reset error and continue with just one buffer */
+          set_error(ERROR_OK);
+        } else {
+          /* switch to the new buffer */
+          bam_buffer_swap();
+        }
+      }
+    }
+
+    /* Need to read the BAM sector - flush only the target buffer */
+    if (bam_buffer->cleanup(bam_buffer))
+      return 1;
+
+    res = image_read(part, sector_offset(part, t, s), bam_buffer->data, 256);
+    if(res)
+      return res;
+
+    bam_buffer->pvt.bam.part   = part;
+    bam_buffer->pvt.bam.track  = t;
+    bam_buffer->pvt.bam.sector = s;
+  }
+
+ found:
+  *ptr = bam_buffer->data + pos;
+  return 0;
+}
+
+/**
+ * is_free - checks if the given sector is marked as free
+ * @part  : partition
+ * @track : track number
+ * @sector: sector number
+ *
+ * This function checks if the given sector is marked as free in
+ * the BAM of drive "part". Returns 0 if allocated, >0 if free, <0 on error.
+ */
+static int8_t is_free(uint8_t part, uint8_t track, uint8_t sector) {
+  uint8_t res;
+  uint8_t *ptr = NULL;
+
+  res = move_bam_window(part,track,BAM_BITFIELD,&ptr);
+  if(res)
+    return -1;
+
+  if (partition[part].imagetype == D64_TYPE_DNP)
+    return (ptr[sector>>3] & (0x80>>(sector&7))) != 0;
+  else
+    return (ptr[sector>>3] & (1<<(sector&7))) != 0;
+}
+
+/**
+ * sectors_free - returns the number of free sectors on a given track
+ * @part  : partition
+ * @track : track number
+ *
+ * This function returns the number of free sectors on the given track
+ * of partition part.
+ */
+static uint16_t sectors_free(uint8_t part, uint8_t track) {
+  uint8_t *trackmap = NULL;
+
+  if (track < 1 || track > get_param(part, LAST_TRACK))
+    return 0;
+
+  switch (partition[part].imagetype & D64_TYPE_MASK) {
+
+  case D64_TYPE_DNP:
+    if(move_bam_window(part,track,BAM_FREECOUNT,&trackmap))
+      return 0;
+
+    uint16_t blocks = 0;
+    for (uint8_t i=0;i < DNP_BAM_BYTES_PER_TRACK;i++) {
+      // From http://everything2.com/title/counting%25201%2520bits
+      uint8_t b = (trackmap[i] & 0x55) + (trackmap[i]>>1 & 0x55);
+      b = (b & 0x33) + (b >> 2 & 0x33);
+      b = (b & 0x0f) + (b >> 4 & 0x0f);
+      blocks += b;
+    }
+    return blocks;
+
+  case D64_TYPE_D71:
+  case D64_TYPE_D81:
+  case D64_TYPE_D41:
+  default:
+    if(move_bam_window(part,track,BAM_FREECOUNT,&trackmap))
+      return 0;
+    return *trackmap;
+  }
+}
+
+/**
+ * allocate_sector - mark a sector as used
+ * @part  : partitoin
+ * @track : track number
+ * @sector: sector number
+ *
+ * This function marks the given sector as used in the BAM of drive part.
+ * If the sector was already marked as used nothing is changed.
+ * Returns 0 if successful, 1 on error.
+ */
+static uint8_t allocate_sector(uint8_t part, uint8_t track, uint8_t sector) {
+  uint8_t *trackmap;
+  int8_t res = is_free(part,track,sector);
+
+  if (res < 0)
+    return 1;
+
+  if (res != 0) {
+    /* do the bitfield first, since is_free already set it up for us. */
+    if(move_bam_window(part,track,BAM_BITFIELD,&trackmap))
+      return 1;
+
+    bam_buffer->mustflush = 1;
+
+    if (partition[part].imagetype == D64_TYPE_DNP) {
+      /* For some reason DNP has its bitfield reversed */
+      trackmap[sector>>3] &= (uint8_t)~(0x80>>(sector&7));
+
+      /* DNP has no counter in its BAM */
+      return 0;
+    }
+
+    trackmap[sector>>3] &= (uint8_t)~(1<<(sector&7));
+
+    if(move_bam_window(part,track,BAM_FREECOUNT,&trackmap))
+      return 1;
+
+    if (trackmap[0] > 0) {
+      trackmap[0]--;
+      bam_buffer->mustflush = 1;
+    }
+  }
+  return 0;
+}
+
+/**
+ * free_sector - mark a sector as free
+ * @part  : partition
+ * @track : track number
+ * @sector: sector number
+ *
+ * This function marks the given sector as free in the BAM of partition
+ * part. If the sector was already marked as free nothing is changed.
+ * Returns 0 if successful, 1 on error.
+ */
+static uint8_t free_sector(uint8_t part, uint8_t track, uint8_t sector) {
+  uint8_t *trackmap;
+  int8_t res = is_free(part,track,sector);
+
+  if (res < 0)
+    return 1;
+
+  if (res == 0) {
+    /* do the bitfield first, since is_free already set it up for us. */
+    if(move_bam_window(part,track,BAM_BITFIELD,&trackmap))
+      return 1;
+
+    bam_buffer->mustflush = 1;
+
+    if (partition[part].imagetype == D64_TYPE_DNP) {
+      /* For some reason DNP has its bitfield reversed */
+      trackmap[sector>>3] |= 0x80>>(sector&7);
+
+      /* DNP has no counter in its BAM */
+      return 0;
+    }
+
+    trackmap[sector>>3] |= 1<<(sector&7);
+
+    if(move_bam_window(part,track,BAM_FREECOUNT,&trackmap))
+      return 1;
+
+    if(trackmap[0] < sectors_per_track(part, track)) {
+      trackmap[0]++;
+      bam_buffer->mustflush = 1;
+    }
+  }
+  return 0;
+}
+
+/**
+ * get_first_sector - calculate the first sector for a new file
+ * @part  : partition
+ * @track : pointer to a variable holding the track
+ * @sector: pointer to a variable holding the sector
+ *
+ * This function calculates the first sector to be allocated for a new
+ * file. The algorithm is based on the description found at
+ * http://ist.uwaterloo.ca/~schepers/formats/DISK.TXT
+ * Returns 0 if successful or 1 if any error occured.
+ *
+ * This code will not skip track 53 of a D71 if there are any free
+ * sectors on it - this behaviour is consistent with that of a 1571
+ * with a revision 3.0 ROM.
+ */
+static uint8_t get_first_sector(uint8_t part, uint8_t *track, uint8_t *sector) {
+  int8_t distance = 1;
+
+  /* DNP uses a simple "first free" allocation scheme, starting at track 2.  */
+  /* It is not known if this is the same algorithm as used in the original   */
+  /* CMD drives, but track 1 seems to be semi-reserved for directory sectors.*/
+  if (partition[part].imagetype == D64_TYPE_DNP) {
+    *track = 2;
+    while (sectors_free(part, *track) == 0) {
+      (*track)++;
+
+      if (*track == get_param(part, LAST_TRACK) ||
+          *track == 0) {
+        /* Wrap to track 1 */
+        *track = 1;
+      }
+
+      if (*track == 2)
+        /* If we're at track 2 again there are no free sectors anywhere */
+        return 1;
+    }
+  } else {
+    /* Look for a track with free sectors close to the directory */
+    while (distance < get_param(part, LAST_TRACK)) {
+      if (sectors_free(part, get_param(part, DIR_TRACK)-distance))
+        break;
+
+      /* Invert sign */
+      distance = -distance;
+
+      /* Increase distance every second try */
+      if (distance > 0)
+        distance++;
+    }
+
+    if (distance == get_param(part, LAST_TRACK)) {
+      if (current_error == ERROR_OK)
+        set_error(ERROR_DISK_FULL);
+      return 1;
+    }
+
+    *track = get_param(part, DIR_TRACK)-distance;
+  }
+
+  /* Search for the first free sector on this track */
+  for (*sector = 0;*sector < sectors_per_track(part, *track); *sector += 1)
+    if (is_free(part, *track, *sector) > 0)
+      return 0;
+
+  /* If we're here the BAM is invalid or couldn't be read */
+  if (current_error == ERROR_OK)
+    set_error(ERROR_DISK_FULL);
+  return 1;
+}
+
+/**
+ * get_next_sector - calculate the next sector for a file
+ * @part  : partition
+ * @track : pointer to a variable holding the track
+ * @sector: pointer to a variable holding the sector
+ *
+ * This function calculates the next sector to be allocated for a file
+ * based on the current sector in the variables pointed to by track/sector.
+ * The algorithm is based on the description found at
+ * http://ist.uwaterloo.ca/~schepers/formats/DISK.TXT
+ * Returns 0 if successful or 1 if any error occured.
+ */
+static uint8_t get_next_sector(uint8_t part, uint8_t *track, uint8_t *sector) {
+  if (partition[part].imagetype == D64_TYPE_DNP) {
+    uint8_t newtrack = *track;
+
+    /* Find a track with free sectors */
+    while (sectors_free(part, newtrack) == 0) {
+      newtrack++;
+
+      if (newtrack == get_param(part, LAST_TRACK) ||
+          newtrack == 0) {
+        /* Wrap to track 1 */
+        newtrack = 1;
+      }
+
+      if (newtrack == *track)
+        /* Returned to the start track -> no free sectors anywhere */
+        return 1;
+    }
+
+    uint8_t newsector;
+
+    if (newtrack == *track) {
+      /* Same track: start at the previous sector */
+      newsector = *sector;
+    } else {
+      /* New track: start at sector 0 */
+      newsector = 0;
+    }
+
+    while (!is_free(part, newtrack, newsector))
+      newsector++; // will automatically wrap from 255->0
+
+    *track = newtrack;
+    *sector = newsector;
+
+    return 0;
+  }
+
+  uint8_t interleave,tries;
+
+  if (*track == get_param(part, DIR_TRACK)) {
+    if (sectors_free(part, get_param(part, DIR_TRACK)) == 0) {
+      if (current_error == ERROR_OK)
+        set_error(ERROR_DISK_FULL);
+      return 1;
+    }
+    interleave = get_param(part, DIR_INTERLEAVE);
+  } else
+    interleave = get_param(part, FILE_INTERLEAVE);
+
+  /* Look for a track with free sectors */
+  tries = 0;
+  while (tries < 3 && !sectors_free(part, *track)) {
+    /* No more space on current track, try another */
+    if (*track < get_param(part, DIR_TRACK))
+      *track -= 1;
+    else {
+      *track += 1;
+      /* Skip track 53 on D71 images */
+      if ((partition[part].imagetype & D64_TYPE_MASK) == D64_TYPE_D71 &&
+          *track == D71_BAM2_TRACK)
+        *track += 1;
+    }
+
+    if (*track < 1) {
+      *track = get_param(part, DIR_TRACK) + 1;
+      *sector = 0;
+      tries++;
+    }
+    if (*track > get_param(part, LAST_TRACK)) {
+      *track = get_param(part, DIR_TRACK) - 1;
+      *sector = 0;
+      tries++;
+    }
+  }
+
+  if (tries == 3) {
+    if (current_error == ERROR_OK)
+      set_error(ERROR_DISK_FULL);
+    return 1;
+  }
+
+  /* Look for a sector at interleave distance */
+  *sector += interleave;
+  if (*sector >= sectors_per_track(part, *track)) {
+    *sector -= sectors_per_track(part, *track);
+    if (*sector != 0)
+      *sector -= 1;
+  }
+
+  /* Increase distance until an empty sector is found */
+  tries = 99;
+  while (is_free(part,*track,*sector) <= 0 && tries--) {
+    *sector += 1;
+    if (*sector >= sectors_per_track(part, *track))
+      *sector = 0;
+  }
+
+  if (tries)
+    return 0;
+
+  if (current_error == ERROR_OK)
+    set_error(ERROR_DISK_FULL);
+  return 1;
+}
+
+/**
+ * nextdirentry - read the next dir entry to ops_scratch
+ * @dh: directory handle
+ *
+ * This function reads the next directory entry from the disk
+ * into ops_scratch. Returns 1 if an error occured, -1 if there
+ * are no more directory entries and 0 if successful. This
+ * function will return every entry, even deleted ones.
+ */
+static int8_t nextdirentry(dh_t *dh) {
+  /* End of directory entries in this sector? */
+  if (dh->dir.d64.entry == 8) {
+    /* Read link pointer */
+    if (checked_read(dh->part, dh->dir.d64.track, dh->dir.d64.sector, ops_scratch, 2, ERROR_ILLEGAL_TS_LINK))
+      return 1;
+
+    /* Final directory sector? */
+    if (ops_scratch[0] == 0)
+      return -1;
+
+    dh->dir.d64.track  = ops_scratch[0];
+    dh->dir.d64.sector = ops_scratch[1];
+    dh->dir.d64.entry  = 0;
+  }
+
+  if (dh->dir.d64.track < 1 || dh->dir.d64.track > get_param(dh->part, LAST_TRACK) ||
+      dh->dir.d64.sector >= sectors_per_track(dh->part, dh->dir.d64.track)) {
+    set_error_ts(ERROR_ILLEGAL_TS_LINK,dh->dir.d64.track,dh->dir.d64.sector);
+    return 1;
+  }
+
+  if (read_entry(dh->part, &dh->dir.d64, ops_scratch))
+    return 1;
+
+  dh->dir.d64.entry++;
+
+  return 0;
+}
+
+/**
+ * find_empty_entry - find an empty directory entry
+ * @path: path of the directory
+ * @dh: directory handle
+ *
+ * This funtion finds an empty entry in the directory, creating
+ * a new directory sector if required.
+ * Returns 0 if successful or 1 if not.
+ */
+static uint8_t find_empty_entry(path_t *path, dh_t *dh) {
+  int8_t res;
+
+  d64_opendir(dh, path);
+  do {
+    res = nextdirentry(dh);
+    if (res > 0)
+      return 1;
+  } while (res == 0 && ops_scratch[DIR_OFS_FILE_TYPE] != 0);
+
+  /* Allocate a new directory sector if no empty entries were found */
+  if (res < 0) {
+    uint8_t t,s;
+
+    t = dh->dir.d64.track;
+    s = dh->dir.d64.sector;
+
+    if (get_next_sector(path->part, &dh->dir.d64.track, &dh->dir.d64.sector))
+      return 1;
+
+    /* Link the old sector to the new */
+    ops_scratch[0] = dh->dir.d64.track;
+    ops_scratch[1] = dh->dir.d64.sector;
+    if (image_write(path->part, sector_offset(path->part,t,s), ops_scratch, 2, 0))
+      return 1;
+
+    if (allocate_sector(path->part, dh->dir.d64.track, dh->dir.d64.sector))
+      return 1;
+
+    /* DNP only: Increment the block count in the parent directory */
+    if (partition[path->part].imagetype == D64_TYPE_DNP) {
+      if (image_read(path->part,
+                     DNP_DIRHEADER_PARENTENTRY_TRACK + sector_offset(path->part,
+                                                                     path->dir.dxx.track,
+                                                                     path->dir.dxx.sector),
+                     ops_scratch, 3))
+        return 1;
+
+      if (ops_scratch[0] != 0) {
+        /* Read block count of entry in parent directory */
+        if (image_read(path->part,
+                       sector_offset(path->part, ops_scratch[0], ops_scratch[1]) + ops_scratch[2] + DIR_OFS_SIZE_LOW - 2,
+                       ops_scratch + 3, 2))
+          return 1;
+
+        uint16_t *blocks = (uint16_t *)(ops_scratch + 3);
+        (*blocks)++;
+
+        /* Write new block count */
+        if (image_write(path->part,
+                        sector_offset(path->part, ops_scratch[0], ops_scratch[1]) + ops_scratch[2] + DIR_OFS_SIZE_LOW - 2,
+                        ops_scratch + 3, 2, 1))
+          return 1;
+      }
+    }
+
+    /* Clear the new directory sector */
+    memset(ops_scratch, 0, 32);
+    ops_scratch[1] = 0xff;
+    for (uint8_t i=0;i<256/32;i++) {
+      dh->dir.d64.entry = i;
+      if (write_entry(path->part, &dh->dir.d64, ops_scratch, 0))
+        return 1;
+
+      ops_scratch[1] = 0;
+    }
+
+    /* Mark full sector as used */
+    ops_scratch[1] = 0xff;
+    dh->dir.d64.entry = 0;
+
+  } else {
+    /* nextdirentry has already incremented this variable, undo it */
+    dh->dir.d64.entry--;
+  }
+
+  return 0;
+}
+
+/**
+ * d64_read - refill-callback used for reading
+ * @buf: target buffer
+ *
+ * This is the callback used as refill for files opened for reading.
+ */
+static uint8_t d64_read(buffer_t *buf) {
+  /* Store the current sector, used for append */
+  buf->pvt.d64.track  = buf->data[0];
+  buf->pvt.d64.sector = buf->data[1];
+
+  if (checked_read(buf->pvt.d64.part, buf->data[0], buf->data[1], buf->data, 256, ERROR_ILLEGAL_TS_LINK)) {
+    free_buffer(buf);
+    return 1;
+  }
+
+  buf->position = 2;
+
+  if (buf->data[0] == 0) {
+    /* Final sector of the file */
+    buf->lastused = buf->data[1];
+    buf->sendeoi  = 1;
+  } else {
+    buf->lastused = 255;
+    buf->sendeoi  = 0;
+  }
+
+  return 0;
+}
+
+/**
+ * d64_seek - seek-callback
+ * @buf     : target buffer
+ * @position: offset to seek to
+ * @index   : offset within the record to seek to
+ *
+ * This is the function used as the seek callback. Since seeking
+ * isn't supported for D64 files it just sets an error message
+ * and returns 1.
+ */
+static uint8_t d64_seek(buffer_t *buf, uint32_t position, uint8_t index) {
+  set_error(ERROR_SYNTAX_UNABLE);
+  return 1;
+}
+
+/**
+ * d64_write - refill-callback used for writing
+ * @buf: target buffer
+ *
+ * This is the callback used as refill for files opened for writing.
+ */
+static uint8_t d64_write(buffer_t *buf) {
+  uint8_t t, s, savederror;
+
+  savederror = 0;
+  t = buf->pvt.d64.track;
+  s = buf->pvt.d64.sector;
+
+  buf->pvt.d64.blocks++;
+
+  /* Mark as last sector in case something below fails */
+  buf->data[0] = 0;
+  buf->data[1] = buf->lastused;
+
+  /* Find another free sector */
+  if (get_next_sector(buf->pvt.d64.part, &t, &s)) {
+    t = 0;
+    savederror = current_error;
+    goto storedata;
+  }
+
+  buf->data[0] = t;
+  buf->data[1] = s;
+
+  /* Allocate it */
+  if (allocate_sector(buf->pvt.d64.part, t, s)) {
+    free_buffer(buf);
+    return 1;
+  }
+
+ storedata:
+  /* Store data in the already-reserved sector */
+  if (image_write(buf->pvt.d64.part,
+                  sector_offset(buf->pvt.d64.part,
+                                buf->pvt.d64.track,
+                                buf->pvt.d64.sector),
+                  buf->data, 256, 1)) {
+    free_buffer(buf);
+    return 1;
+  }
+
+  buf->pvt.d64.track  = t;
+  buf->pvt.d64.sector = s;
+  buf->position  = 2;
+  buf->lastused  = 1;
+  buf->mustflush = 0;
+  mark_buffer_clean(buf);
+
+  if (savederror) {
+    set_error(savederror);
+    free_buffer(buf);
+    return 1;
+  } else
+    return 0;
+}
+
+static uint8_t d64_write_cleanup(buffer_t *buf) {
+  uint8_t t,s;
+
+  buf->data[0] = 0;
+  buf->data[1] = buf->lastused;
+
+  t = buf->pvt.d64.track;
+  s = buf->pvt.d64.sector;
+  buf->pvt.d64.blocks++;
+
+  /* Track=0 means that there was an error somewhere earlier */
+  if (t == 0)
+    return 1;
+
+  /* Store data */
+  if (image_write(buf->pvt.d64.part, sector_offset(buf->pvt.d64.part,t,s), buf->data, 256, 1))
+    return 1;
+
+  /* Update directory entry */
+  if (read_entry(buf->pvt.d64.part, &buf->pvt.d64.dh, ops_scratch))
+    return 1;
+
+  ops_scratch[DIR_OFS_FILE_TYPE] |= FLAG_SPLAT;
+  ops_scratch[DIR_OFS_SIZE_LOW]   = buf->pvt.d64.blocks & 0xff;
+  ops_scratch[DIR_OFS_SIZE_HI]    = buf->pvt.d64.blocks >> 8;
+  update_timestamp(ops_scratch);
+
+  if (write_entry(buf->pvt.d64.part, &buf->pvt.d64.dh, ops_scratch, 1))
+    return 1;
+
+  buf->cleanup = callback_dummy;
+  free_buffer(buf);
+
+  return 0;
+}
+
+
+/* ------------------------------------------------------------------------- */
+/*  fileops-API                                                              */
+/* ------------------------------------------------------------------------- */
+
+uint8_t d64_mount(path_t *path, uint8_t *name) {
+  uint8_t imagetype;
+  uint8_t part = path->part;
+  uint32_t fsize = partition[part].imagehandle.fsize;
+
+  switch (fsize) {
+  case 174848:
+    imagetype = D64_TYPE_D41;
+    memcpy_P(&partition[part].d64data, &d41param, sizeof(struct param_s));
+    break;
+
+  case 175531:
+    imagetype = D64_TYPE_D41 | D64_HAS_ERRORINFO;
+    memcpy_P(&partition[part].d64data, &d41param, sizeof(struct param_s));
+    break;
+
+  case 349696:
+    imagetype = D64_TYPE_D71;
+    memcpy_P(&partition[part].d64data, &d71param, sizeof(struct param_s));
+    break;
+
+  case 351062:
+    imagetype = D64_TYPE_D71 | D64_HAS_ERRORINFO;
+    memcpy_P(&partition[part].d64data, &d71param, sizeof(struct param_s));
+    break;
+
+  case 819200:
+    imagetype = D64_TYPE_D81;
+    memcpy_P(&partition[part].d64data, &d81param, sizeof(struct param_s));
+    break;
+
+  case 822400:
+    imagetype = D64_TYPE_D81 | D64_HAS_ERRORINFO;
+    memcpy_P(&partition[part].d64data, &d81param, sizeof(struct param_s));
+    break;
+
+  default:
+    if ((fsize % (256*256L)) != 0) {
+      set_error(ERROR_IMAGE_INVALID);
+      return 1;
+    }
+
+    /* sanity check: ignore 40-track D64 images */
+    if (fsize == 196608) {
+      uint8_t *ptr = ustrrchr(name, '.');
+
+      if (ptr[2] == '6' && ptr[3] == '4') {
+        set_error(ERROR_IMAGE_INVALID);
+        return 1;
+      }
+    }
+
+    imagetype = D64_TYPE_DNP;
+    memcpy_P(&partition[part].d64data, &dnpparam, sizeof(struct param_s));
+    partition[part].d64data.last_track = fsize / (256*256L);
+  }
+
+  /* allocate the first BAM buffer if required */
+  if (bam_buffer == NULL) {
+    if (bam_buffer_alloc(&bam_buffer))
+      return 1;
+  }
+
+  partition[part].imagetype = imagetype;
+  path->dir.dxx.track  = get_param(part, DIR_TRACK);
+  path->dir.dxx.sector = get_param(part, DIR_START_SECTOR);
+
+  bam_refcount++;
+
+  if (imagetype & D64_HAS_ERRORINFO)
+    /* Invalidate error cache */
+    errorcache.part = 255;
+
+  return 0;
+}
+
+static uint8_t d64_opendir(dh_t *dh, path_t *path) {
+  dh->part = path->part;
+  dh->dir.d64.track  = path->dir.dxx.track;
+  dh->dir.d64.sector = path->dir.dxx.sector;
+  dh->dir.d64.entry  = 0;
+
+  if (partition[path->part].imagetype == D64_TYPE_DNP) {
+    /* Read the real first directory sector from the header sector */
+    uint8_t tmp[2];
+    if (image_read(path->part,
+                   sector_offset(path->part, dh->dir.d64.track, dh->dir.d64.sector),
+                   tmp, 2))
+      return 1;
+
+    dh->dir.d64.track  = tmp[0];
+    dh->dir.d64.sector = tmp[1];
+  }
+  return 0;
+}
+
+static int8_t d64_readdir(dh_t *dh, cbmdirent_t *dent) {
+  int8_t res;
+
+  do {
+    res = nextdirentry(dh);
+    if (res)
+      return res;
+
+    if (ops_scratch[DIR_OFS_FILE_TYPE] != 0)
+      break;
+  } while (1);
+
+  memset(dent, 0, sizeof(cbmdirent_t));
+
+  dent->opstype = OPSTYPE_DXX;
+  dent->typeflags = ops_scratch[DIR_OFS_FILE_TYPE] ^ FLAG_SPLAT;
+
+  if ((dent->typeflags & TYPE_MASK) > TYPE_DIR)
+    /* Change invalid types to DEL */
+    /* FIXME: Should exclude DIR on non-DNP */
+    dent->typeflags &= (uint8_t)~TYPE_MASK;
+
+  dent->pvt.dxx.dh = dh->dir.d64;
+  dent->pvt.dxx.dh.entry -= 1; /* undo increment in nextdirentry */
+  dent->blocksize = ops_scratch[DIR_OFS_SIZE_LOW] + 256 * ops_scratch[DIR_OFS_SIZE_HI];
+  dent->remainder = 0xff;
+  memcpy(dent->name, ops_scratch + DIR_OFS_FILE_NAME, CBM_NAME_LENGTH);
+  strnsubst(dent->name, 16, 0xa0, 0);
+
+  /* sanitize values in case they were not stored */
+  dent->date.minute=  ops_scratch[DIR_OFS_MINUTE] % 60;
+  dent->date.hour  =  ops_scratch[DIR_OFS_HOUR] % 24;
+  dent->date.day   = (ops_scratch[DIR_OFS_DAY]   - 1) % 31 + 1;
+  dent->date.month = (ops_scratch[DIR_OFS_MONTH] - 1) % 12 + 1;
+  dent->date.year  =  ops_scratch[DIR_OFS_YEAR] % 100;
+  /* adjust year into 1980..2079 range */
+  if (dent->date.year < 80)
+    dent->date.year += 100;
+
+  return 0;
+}
+
+/* Reads and converts a string from the dir header sector (BAM for D41/D71) to the buffer */
+/* Used by d64_get(disk|dir)label and d64_getid */
+static uint8_t read_string_from_dirheader(path_t *path, uint8_t *buffer, param_t what, uint8_t size) {
+  uint8_t sector;
+
+  if (partition[path->part].imagetype == D64_TYPE_DNP)
+    sector = path->dir.dxx.sector;
+  else
+    sector = 0;
+
+  if (image_read(path->part,
+                 sector_offset(path->part, path->dir.dxx.track, sector)
+                 + get_param(path->part, what),
+                 buffer, size))
+    return 1;
+
+  strnsubst(buffer, size, 0xa0, 0x20);
+  return 0;
+}
+
+static uint8_t d64_getdirlabel(path_t *path, uint8_t *label) {
+  return read_string_from_dirheader(path, label, LABEL_OFFSET, 16);
+}
+
+static uint8_t d64_getdisklabel(uint8_t part, uint8_t *label) {
+  if (partition[part].imagetype == D64_TYPE_DNP) {
+    /* Read directly from root dir header */
+    if (image_read(part, 256 + DNP_LABEL_OFFSET, label, 16))
+      return 1;
+  } else {
+    /* Use getdirlabel instead */
+    path_t curpath;
+
+    curpath.part = part;
+    curpath.dir = partition[part].current_dir;
+    if (d64_getdirlabel(&curpath, label))
+      return 1;
+  }
+
+  /* Zero-terminate label */
+  uint8_t *ptr = label+16;
+  *ptr-- = 0;
+  while (ptr != label && *ptr == ' ')
+    *ptr-- = 0;
+
+  return 0;
+}
+
+static uint8_t d64_getid(path_t *path, uint8_t *id) {
+  return read_string_from_dirheader(path, id, ID_OFFSET, 5);
+}
+
+static uint16_t d64_freeblocks(uint8_t part) {
+  uint16_t blocks = 0;
+  uint8_t i;
+
+  for (i = 1; i != 0 && i <= get_param(part, LAST_TRACK); i++) {
+    /* Skip directory track */
+    switch (partition[part].imagetype & D64_TYPE_MASK) {
+    case D64_TYPE_D81:
+      if (i == D81_BAM_TRACK)
+        continue;
+      break;
+
+    case D64_TYPE_DNP:
+      // DNP doesn't exclude anything
+      break;
+
+    case D64_TYPE_D41:
+    case D64_TYPE_D71:
+    default:
+      if (i == D41_BAM_TRACK || i == D71_BAM2_TRACK)
+        continue; // continue the for loop
+      break;      // break out of the switch
+
+    }
+
+    blocks += sectors_free(part,i);
+  }
+
+  return blocks;
+}
+
+static void d64_open_read(path_t *path, cbmdirent_t *dent, buffer_t *buf) {
+  /* Read the directory entry of the file */
+  if (read_entry(path->part, &dent->pvt.dxx.dh, ops_scratch))
+    return;
+
+  buf->data[0] = ops_scratch[DIR_OFS_TRACK];
+  buf->data[1] = ops_scratch[DIR_OFS_SECTOR];
+
+  buf->pvt.d64.part = path->part;
+
+  buf->read    = 1;
+  buf->refill  = d64_read;
+  buf->seek    = d64_seek;
+  stick_buffer(buf);
+
+  buf->refill(buf);
+}
+
+static void d64_open_write(path_t *path, cbmdirent_t *dent, uint8_t type, buffer_t *buf, uint8_t append) {
+  dh_t dh;
+  uint8_t *ptr;
+
+  /* Check for read-only image file */
+  if (!(partition[path->part].imagehandle.flag & FA_WRITE)) {
+    set_error(ERROR_WRITE_PROTECT);
+    return;
+  }
+
+  if (append) {
+    /* Append case: Open the file and read the last sector */
+    d64_open_read(path, dent, buf);
+    while (!current_error && buf->data[0])
+      buf->refill(buf);
+
+    if (current_error)
+      return;
+
+    /* Modify the buffer for writing */
+    buf->pvt.d64.dh     = dent->pvt.dxx.dh;
+    buf->pvt.d64.blocks = ops_scratch[DIR_OFS_SIZE_LOW] + 256 * ops_scratch[DIR_OFS_SIZE_HI]-1;
+    buf->read       = 0;
+    buf->position   = buf->lastused+1;
+    if (buf->position == 0)
+      buf->mustflush = 1;
+    else
+      buf->mustflush = 0;
+    buf->refill     = d64_write;
+    buf->cleanup    = d64_write_cleanup;
+    buf->seek       = d64_seek;
+    mark_write_buffer(buf);
+
+    update_timestamp(ops_scratch);
+    write_entry(buf->pvt.d64.part, &buf->pvt.d64.dh, ops_scratch, 1);
+
+    return;
+  }
+
+  /* Non-append case */
+
+  /* Search for an empty directory entry */
+  if (find_empty_entry(path, &dh))
+    return;
+
+  /* Create directory entry in ops_scratch */
+  uint8_t *name = dent->name;
+  memset(ops_scratch + 2, 0, sizeof(ops_scratch) - 2);  /* Don't overwrite the link pointer! */
+  memset(ops_scratch + DIR_OFS_FILE_NAME, 0xa0, CBM_NAME_LENGTH);
+  ptr = ops_scratch + DIR_OFS_FILE_NAME;
+  while (*name) *ptr++ = *name++;
+  ops_scratch[DIR_OFS_FILE_TYPE] = type;
+
+  /* Find a free sector and allocate it */
+  uint8_t t,s;
+
+  if (get_first_sector(path->part,&t,&s))
+    return;
+
+  ops_scratch[DIR_OFS_TRACK]  = t;
+  ops_scratch[DIR_OFS_SECTOR] = s;
+
+  if (allocate_sector(path->part,t,s))
+    return;
+
+  /* Write the directory entry */
+  update_timestamp(ops_scratch);
+  if (write_entry(path->part, &dh.dir.d64, ops_scratch, 1))
+    return;
+
+  /* Prepare the data buffer */
+  mark_write_buffer(buf);
+  buf->position       = 2;
+  buf->lastused       = 2;
+  buf->cleanup        = d64_write_cleanup;
+  buf->refill         = d64_write;
+  buf->seek           = d64_seek;
+  buf->data[2]        = 13; /* Verified on VICE */
+  buf->pvt.d64.dh     = dh.dir.d64;
+  buf->pvt.d64.part   = path->part;
+  buf->pvt.d64.track  = t;
+  buf->pvt.d64.sector = s;
+}
+
+static void d64_open_rel(path_t *path, cbmdirent_t *dent, buffer_t *buf, uint8_t length, uint8_t mode) {
+  set_error(ERROR_SYNTAX_UNABLE);
+}
+
+static uint8_t d64_delete(path_t *path, cbmdirent_t *dent) {
+  uint8_t linkbuf[2];
+
+  /* Read the directory entry of the file */
+  if (read_entry(path->part, &dent->pvt.dxx.dh, ops_scratch))
+    return 255;
+
+  /* Free the sector chain in the BAM */
+  linkbuf[0] = ops_scratch[DIR_OFS_TRACK];
+  linkbuf[1] = ops_scratch[DIR_OFS_SECTOR];
+
+  do {
+    free_sector(path->part, linkbuf[0], linkbuf[1]);
+
+    if (checked_read(path->part, linkbuf[0], linkbuf[1], linkbuf, 2, ERROR_ILLEGAL_TS_LINK))
+      return 255;
+  } while (linkbuf[0]);
+
+  /* Clear directory entry */
+  ops_scratch[DIR_OFS_FILE_TYPE] = 0;
+  if (write_entry(path->part, &dent->pvt.dxx.dh, ops_scratch, 1))
+    return 255;
+
+  return 1;
+}
+
+static void d64_read_sector(buffer_t *buf, uint8_t part, uint8_t track, uint8_t sector) {
+  checked_read(part, track, sector, buf->data, 256, ERROR_ILLEGAL_TS_COMMAND);
+}
+
+static void d64_write_sector(buffer_t *buf, uint8_t part, uint8_t track, uint8_t sector) {
+  if (track < 1 || track > get_param(part, LAST_TRACK) ||
+      sector >= sectors_per_track(part, track)) {
+    set_error_ts(ERROR_ILLEGAL_TS_COMMAND,track,sector);
+  } else
+    image_write(part, sector_offset(part,track,sector), buf->data, 256, 1);
+}
+
+static void d64_rename(path_t *path, cbmdirent_t *dent, uint8_t *newname) {
+  uint8_t *ptr;
+
+  /* Read the directory entry of the file */
+  if (read_entry(path->part, &dent->pvt.dxx.dh, ops_scratch))
+    return;
+
+  memset(ops_scratch + DIR_OFS_FILE_NAME, 0xa0, CBM_NAME_LENGTH);
+  ptr = ops_scratch + DIR_OFS_FILE_NAME;
+  while (*newname) *ptr++ = *newname++;
+
+  write_entry(path->part, &dent->pvt.dxx.dh, ops_scratch, 1);
+}
+
+
+/**
+ * d64_raw_directory - open directory track as file
+ * @buf: target buffer
+ *
+ * This function opens the directory track as a file on the
+ * buffer passed in buf. Used when $ is opened on a secondary
+ * address > 0.
+ */
+void d64_raw_directory(path_t *path, buffer_t *buf) {
+  /* Copy&Waste from d64_open_read */
+  buf->data[0] = path->dir.dxx.track;
+  if (partition[path->part].imagetype == D64_TYPE_DNP)
+    buf->data[1] = path->dir.dxx.sector;
+  else
+    buf->data[1] = 0;
+
+  buf->pvt.d64.part = path->part;
+
+  buf->read    = 1;
+  buf->refill  = d64_read;
+  buf->seek    = d64_seek;
+  stick_buffer(buf);
+
+  buf->refill(buf);
+}
+
+/**
+ * d64_chdir - chdir for Dxx files
+ * @path   : path object of the location of dirname
+ * @dirname: directory to be changed into
+ *
+ * Changes the directory in the path object for DNP files,
+ * returns an error for everything else.
+ * Returns 0 if successful, 1 otherwise.
+ */
+static uint8_t d64_chdir(path_t *path, cbmdirent_t *dirname) {
+  if (partition[path->part].imagetype != D64_TYPE_DNP)
+    return image_chdir(path,dirname);
+
+  if (dirname->name[0] == 0) {
+    /* Empty string: root directory */
+    path->dir.dxx.track  = 1;
+    path->dir.dxx.sector = 1;
+    return 0;
+  }
+
+  if (dirname->name[0] == '_' && dirname->name[1] == 0) {
+    /* Move up a directory, unmount if at the root */
+    uint8_t parent[2];
+
+    if (image_read(path->part,
+                   sector_offset(path->part, path->dir.dxx.track, path->dir.dxx.sector) + DNP_DIRHEADER_PARENTHDR_TRACK,
+                   parent, 2))
+      return 1;
+
+    if (parent[0] == 0)
+      /* Already at the root directory */
+      return image_unmount(path->part);
+
+    path->dir.dxx.track  = parent[0];
+    path->dir.dxx.sector = parent[1];
+    return 0;
+  }
+
+  if (read_entry(path->part, &dirname->pvt.dxx.dh, ops_scratch))
+    return 1;
+
+  path->dir.dxx.track  = ops_scratch[DIR_OFS_TRACK];
+  path->dir.dxx.sector = ops_scratch[DIR_OFS_SECTOR];
+
+  return 0;
+}
+
+/**
+ * d64_mkdir - mkdir for Dxx files
+ * @path   : path object of the location of dirname
+ * @dirname: directory to be created
+ *
+ * Creates a subdirectory for DNP files, returns an error
+ * for everything else.
+ */
+static void d64_mkdir(path_t *path, uint8_t *dirname) {
+  dh_t dh;
+  buffer_t *buf;
+  uint8_t h_track,h_sector,d_track,d_sector;
+  uint8_t *ptr, *name;
+
+  if (partition[path->part].imagetype != D64_TYPE_DNP) {
+    set_error(ERROR_SYNTAX_UNABLE);
+    return;
+  }
+
+  buf = alloc_buffer();
+  if (buf == NULL)
+    return;
+
+  /* Find an empty directory entry */
+  if (find_empty_entry(path, &dh))
+    return;
+
+  /* Find a free track/sector for the dir header */
+  h_track  = path->dir.dxx.track;
+  h_sector = path->dir.dxx.sector;
+
+  if (get_next_sector(path->part, &h_track, &h_sector)) {
+    set_error(ERROR_DISK_FULL);
+    return;
+  }
+
+  /* Allocate it now so the next call to get_next doesn't return it again */
+  if (allocate_sector(path->part, h_track, h_sector))
+    return;
+
+  /* Find a free track/sector for the first directory sector */
+  d_track  = h_track;
+  d_sector = h_sector;
+
+  if (get_next_sector(path->part, &d_track, &d_sector)) {
+    set_error(ERROR_DISK_FULL);
+    free_sector(path->part, h_track, h_sector);
+    return;
+  }
+
+  if (allocate_sector(path->part, d_track, d_sector))
+    return;
+
+  /* Build a directory header */
+  memset(buf->data, 0, 256);
+  memset(buf->data + DNP_LABEL_OFFSET, 0xa0, DNP_LABEL_AREA_SIZE);
+
+  /* Unfortunately this generates much smaller code on AVR */
+  ptr = buf->data;
+  *ptr++ = d_track;
+  *ptr++ = d_sector;
+  *ptr++ = 'H';
+
+  /* Note: The CMD FD manual says these bytes point to the root header, */
+  /*       but all observed DNP files actually store the t/s of the     */
+  /*       sector itself here.                                          */
+  ptr = buf->data + DNP_DIRHEADER_ROOTHDR_TRACK;
+  *ptr++ = h_track;
+  *ptr++ = h_sector;
+
+  *ptr++ = path->dir.dxx.track;
+  *ptr++ = path->dir.dxx.sector;
+
+  *ptr++ = dh.dir.d64.track;
+  *ptr++ = dh.dir.d64.sector;
+  *ptr++ = dh.dir.d64.entry * 32 + 2;
+
+  /* Fill name and ID */
+  ptr = buf->data + DNP_LABEL_OFFSET;
+  name = dirname;
+  while (*name) *ptr++ = *name++;
+
+  ptr = buf->data + DNP_ID_OFFSET;
+  *ptr++ = dirname[0];
+  *ptr++ = dirname[1];
+   ptr++;
+  *ptr++ = '1';
+  *ptr++ = 'H';
+
+  /* Write directory header sector */
+  if (image_write(path->part,
+                  sector_offset(path->part, h_track, h_sector),
+                  buf->data, 256, 0))
+    return;
+
+  /* Create empty directory sector */
+  memset(buf->data, 0, 256);
+  buf->data[1] = 0xff;
+  if (image_write(path->part,
+                  sector_offset(path->part, d_track, d_sector),
+                  buf->data, 256, 0))
+    return;
+
+  /* Create the directory entry */
+  /* FIXME: Isn't similiar code duplicated in open_write and rename? */
+  memset(ops_scratch + 2, 0, sizeof(ops_scratch) - 2);
+  memset(ops_scratch + DIR_OFS_FILE_NAME, 0xa0, CBM_NAME_LENGTH);
+
+  ptr = ops_scratch + DIR_OFS_FILE_NAME;
+  while (*dirname) *ptr++ = *dirname++;
+
+  ops_scratch[DIR_OFS_FILE_TYPE] = TYPE_DIR | FLAG_SPLAT;
+  ops_scratch[DIR_OFS_TRACK]     = h_track;
+  ops_scratch[DIR_OFS_SECTOR]    = h_sector;
+  ops_scratch[DIR_OFS_SIZE_LOW]  = 2;
+  update_timestamp(ops_scratch);
+
+  image_write(path->part, sector_offset(path->part, dh.dir.d64.track, dh.dir.d64.sector)
+                          + dh.dir.d64.entry * 32 + 2, ops_scratch + 2, 30, 1);
+}
+
+/**
+ * d64_invalidate - invalidate internal state
+ *
+ * This function invalidates all cached state when
+ * a card change is detected.
+ */
+void d64_invalidate(void) {
+  free_buffer(bam_buffer);
+  bam_buffer   = NULL;
+  free_buffer(bam_buffer2);
+  bam_buffer2  = NULL;
+  bam_refcount = 0;
+}
+
+/**
+ * d64_unmount - unmount disk image
+ * @part: partition number
+ *
+ * This function in called on image unmount and handles
+ * refcounting for the BAM buffers.
+ */
+void d64_unmount(uint8_t part) {
+  /* invalidate BAM buffers that point to the current partition */
+  if (bam_buffer) {
+    bam_buffer->cleanup(bam_buffer);
+    if (bam_buffer->pvt.bam.part == part)
+      bam_buffer->pvt.bam.part = 255;
+  }
+
+  if (bam_buffer2) {
+    bam_buffer2->cleanup(bam_buffer2);
+    if (bam_buffer2->pvt.bam.part == part)
+      bam_buffer2->pvt.bam.part = 255;
+  }
+
+  /* decrease BAM buffer refcounter - it can never be zero while a Dxx is mounted*/
+  if (--bam_refcount) {
+    free_buffer(bam_buffer);
+    free_buffer(bam_buffer2);
+    bam_buffer  = NULL;
+    bam_buffer2 = NULL;
+  }
+}
+
+
+/* ------------------------------------------------------------------------- */
+/*  Formatting disk images                                                   */
+/* ------------------------------------------------------------------------- */
+
+/* create a 1581/DNP BAM signature */
+static void format_add_bam_signature(uint8_t doschar, uint8_t *idbuf) {
+  uint8_t *ptr = bam_buffer->data + 2;
+
+  *ptr++ = doschar;
+  *ptr++ = doschar ^ 0xff;
+  *ptr++ = idbuf[0];
+  *ptr++ = idbuf[1];
+  *ptr++ = 0xc0;
+}
+
+/* copy name and id into some buffer */
+static void format_copy_label(uint8_t part, uint8_t *data, uint8_t *name, uint8_t *idbuf) {
+  uint8_t *ptr;
+  uint8_t count;
+
+  ptr = data + get_param(part, LABEL_OFFSET);
+  memset(ptr, 0xa0, 25); /* 25=name+id+dos+spaces+padding */
+
+  count = 16;
+  while (*name && count--)
+    *ptr++ = *name++;
+
+  memcpy(data + get_param(part, ID_OFFSET), idbuf, 5);
+}
+
+static void format_d41_image(uint8_t part, buffer_t *buf, uint8_t *name, uint8_t *idbuf) {
+  /* allocate BAM and first directory sector */
+  for (uint8_t s=0; s<2; s++)
+    allocate_sector(part, D41_BAM_TRACK, s);
+
+  /* 18/0 is now available via bam_buffer */
+  uint8_t *ptr = bam_buffer->data;
+  *ptr++ = 18;
+  *ptr++ = 1;
+  *ptr++ = 0x41;
+
+  /* copy disk label and ID */
+  idbuf[3] = '2';
+  idbuf[4] = 'A';
+  format_copy_label(part, bam_buffer->data, name, idbuf);
+  /* two additional 0xa0 characters on 5.25" disks */
+  bam_buffer->data[0xa9] = 0xa0;
+  bam_buffer->data[0xaa] = 0xa0;
+
+  clear_dir_sector(part, D41_BAM_TRACK, 1, buf->data);
+}
+
+static void format_d71_image(uint8_t part, buffer_t *buf, uint8_t *name, uint8_t *idbuf) {
+  /* almost everything is the same as D41 */
+  format_d41_image(part, buf, name, idbuf);
+
+  /* add double-sided marker in 18/0 (still in bam_buffer) */
+  bam_buffer->data[3] = 0x80;
+
+  /* allocate all of track 53 */
+  for (uint8_t s=0; s<19; s++)
+    allocate_sector(part, D71_BAM2_TRACK, s);
+}
+
+static void format_d81_image(uint8_t part, buffer_t *buf, uint8_t *name, uint8_t *idbuf) {
+  /* allocate 40/0 to 40/3 */
+  for (uint8_t s=0; s<4; s++)
+    allocate_sector(part, D81_BAM_TRACK, s);
+
+  /* bam_buffer buffer now holds 40/1 */
+  bam_buffer->data[0] = 40;
+  bam_buffer->data[1] = 2;
+  format_add_bam_signature('D', idbuf);
+  // mustflush was already set by allocate_sector
+
+  /* switch bam_buffer to 40/2 */
+  (void)sectors_free(part, 41);
+  bam_buffer->data[0] = 0;
+  bam_buffer->data[1] = 0xff;
+  format_add_bam_signature('D', idbuf);
+  bam_buffer->mustflush = 1;
+
+  /* build contents of 40/0 */
+  uint8_t *ptr = buf->data;
+  *ptr++ = 40;
+  *ptr++ = 3;
+  *ptr++ = 'D';
+
+  /* copy disk label and ID to buffer */
+  idbuf[3] = '3';
+  idbuf[4] = 'D';
+  format_copy_label(part, buf->data, name, idbuf);
+
+  /* write 40/0 */
+  if (image_write(part, /*sector_offset(part, 40, 0)*/ (40-1)*40*256L,
+                  buf->data, 256, 0))
+    return;
+
+  clear_dir_sector(part, D81_BAM_TRACK, 3, buf->data);
+}
+
+static void format_dnp_image(uint8_t part, buffer_t *buf, uint8_t *name, uint8_t *idbuf) {
+  /* Note: Formatting is only accepted while in the root dir, so the
+           d64param struct doesn't need to be changed */
+  for (uint8_t s=0; s<35; s++)
+    allocate_sector(part, DNP_BAM_TRACK, s);
+
+  /* add BAM signature - first BAM sector is in bam_buffer because of allocate_sector */
+  format_add_bam_signature('H', idbuf);
+  bam_buffer->data[DNP_BAM_LAST_TRACK_OFS] = get_param(part, LAST_TRACK);
+
+  /* build root dirheader */
+  uint8_t *ptr = buf->data;
+  memset(ptr, 0, 256);
+  *ptr++ = 1;
+  *ptr++ = 34;
+  *ptr++ = 'H';
+  idbuf[3] = '1';
+  idbuf[4] = 'H';
+  format_copy_label(part, buf->data, name, idbuf);
+  buf->data[DNP_DIRHEADER_ROOTHDR_TRACK]  = 1;
+  buf->data[DNP_DIRHEADER_ROOTHDR_SECTOR] = 1;
+
+  /* write 1/1 */
+  if (image_write(part, /*sector_offset(part, 1, 1)*/ 256,
+                  buf->data, 256, 0))
+    return;
+
+  clear_dir_sector(part, 1, DNP_ROOTDIR_SECTOR, buf->data);
+}
+
+static void d64_format(uint8_t part, uint8_t *name, uint8_t *id) {
+  buffer_t *buf;
+  uint8_t  idbuf[5];
+  uint16_t t;
+  uint16_t  s;
+
+  /* allow format on DNP only when in the root directory */
+  if (partition[part].imagetype == D64_TYPE_DNP &&
+      (partition[part].current_dir.dxx.track  != 1 ||
+       partition[part].current_dir.dxx.sector != 1)) {
+    /* just ignore, CMD HD doesn't return an error either */
+    return;
+  }
+
+  /* grab a buffer as work area */
+  buf = alloc_buffer();
+  if (buf == NULL)
+    return;
+
+  mark_write_buffer(buf);
+  unstick_buffer(buf);
+  mark_buffer_dirty(buf);
+  memset(buf->data, 0, 256);
+
+  /* Flush BAM buffers and mark their contents as invalid */
+  d64_bam_commit();
+  bam_buffer->pvt.bam.part = 0xff;
+  if (bam_buffer2)
+    bam_buffer2->pvt.bam.part = 0xff;
+
+  if (id != NULL) {
+    /* Clear the data area of the disk image */
+    for (t=1; t<=get_param(part, LAST_TRACK); t++) {
+      for (s=0; s<sectors_per_track(part, t); s++) {
+        if (image_write(part, sector_offset(part, t, s),
+                        buf->data, 256, 0))
+          return;
+      }
+    }
+
+    /* Copy the new ID into the buffer */
+    idbuf[0] = id[0];
+    idbuf[1] = id[1];
+  } else {
+    /* Read the old ID into the buffer */
+    path_t path;
+    path.part = part;
+    path.dir.dxx.track  = get_param(part, DIR_TRACK);
+    path.dir.dxx.sector = 1; // only relevant for DNP
+    if (d64_getid(&path, idbuf))
+      return;
+
+    /* clear the entire directory track */
+    /* This is not accurate, but I do not care. */
+    t = get_param(part, DIR_TRACK);
+    for (s=0; s < sectors_per_track(part, t); s++) {
+      if (image_write(part, sector_offset(part, t, s),
+                      buf->data, 256, 0))
+        return;
+    }
+  }
+  idbuf[2] = 0xa0;
+
+  /* Mark all sectors as free */
+  for (t=1; t<=get_param(part, LAST_TRACK); t++) {
+    for (s=0; s<sectors_per_track(part, t); s++)
+      free_sector(part,t,s);
+  }
+
+  /* call imagetype-specific format function */
+  partition[part].d64data.format_function(part, buf, name, idbuf);
+
+  /* FIXME: Clear the error info block */
+}
+
+
+/* ------------------------------------------------------------------------- */
+/*  ops struct                                                               */
+/* ------------------------------------------------------------------------- */
+
+const PROGMEM fileops_t d64ops = {
+  d64_open_read,
+  d64_open_write,
+  d64_open_rel,
+  d64_delete,
+  d64_getdisklabel,
+  d64_getdirlabel,
+  d64_getid,
+  d64_freeblocks,
+  d64_read_sector,
+  d64_write_sector,
+  d64_format,
+  d64_opendir,
+  d64_readdir,
+  d64_mkdir,
+  d64_chdir,
+  d64_rename
+};
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/d64ops.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/d64ops.h
new file mode 100644
index 00000000..65710ed0
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/d64ops.h
@@ -0,0 +1,64 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   d64ops.h: Definitions for the D64 operations
+
+*/
+
+#ifndef D64OPS_H
+#define D64OPS_H
+
+#include "wrapops.h"
+
+/* Offsets in a D64 directory entry, also needed for raw dirs */
+#define DIR_OFS_FILE_TYPE       2
+#define DIR_OFS_TRACK           3
+#define DIR_OFS_SECTOR          4
+#define DIR_OFS_FILE_NAME       5
+#define DIR_OFS_YEAR            0x19
+#define DIR_OFS_MONTH           0x1a
+#define DIR_OFS_DAY             0x1b
+#define DIR_OFS_HOUR            0x1c
+#define DIR_OFS_MINUTE          0x1d
+#define DIR_OFS_SIZE_LOW        0x1e
+#define DIR_OFS_SIZE_HI         0x1f
+
+/* Disk image types - values must match G-P partition type byte */
+#define D64_TYPE_MASK 0x7f
+#define D64_TYPE_NONE 0
+#define D64_TYPE_DNP  1
+#define D64_TYPE_D41  2
+#define D64_TYPE_D71  3
+#define D64_TYPE_D81  4
+#define D64_HAS_ERRORINFO 128
+
+extern const fileops_t d64ops;
+
+uint8_t d64_mount(path_t *path, uint8_t *name);
+void    d64_unmount(uint8_t part);
+
+/* commit BAM buffer contents to storage medium */
+uint8_t d64_bam_commit(void);
+
+void d64_raw_directory(path_t *path, buffer_t *buf);
+void d64_invalidate(void);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/dirent.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/dirent.h
new file mode 100644
index 00000000..2a1da4ce
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/dirent.h
@@ -0,0 +1,276 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   dirent.h: Various data structures for directory browsing
+
+*/
+
+#ifndef DIRENT_H
+#define DIRENT_H
+
+#include "eeprom-fs.h"
+#include "ff.h"
+
+#define CBM_NAME_LENGTH 16
+
+#define TYPE_LENGTH 3
+#define TYPE_MASK 7
+#define EXT_TYPE_MASK 15
+
+/* Standard file types */
+#define TYPE_DEL 0
+#define TYPE_SEQ 1
+#define TYPE_PRG 2
+#define TYPE_USR 3
+#define TYPE_REL 4
+#define TYPE_CBM 5
+#define TYPE_DIR 6
+
+/* Internal file types used for the partition directory */
+#define TYPE_NAT 8
+
+/* Internal file type used to force files without header on FAT (for M2I) */
+#define TYPE_RAW 15
+
+/// Hidden is an unused bit on CBM
+#define FLAG_HIDDEN (1<<5)
+#define FLAG_RO     (1<<6)
+#define FLAG_SPLAT  (1<<7)
+
+/* forward declaration to avoid an include loop */
+struct buffer_s;
+
+/**
+ * @date      : 1900-based year
+ * @month     : month, 1..12
+ * @day       : day,   1..(28-31)
+ * @hour      : hour   0..23
+ * @minute    : minute 0..59
+ * @second    : second 0..59 (FIXME: leap seconds ;) )
+ *
+ * This struct holds a file timestamp. It must have the "packed" attribute
+ * with the fields in descending order of magnitude because it is compared
+ * using memcmp.
+ */
+typedef struct date {
+  uint8_t  year;
+  uint8_t  month;
+  uint8_t  day;
+  uint8_t  hour;
+  uint8_t  minute;
+  uint8_t  second;
+}  __attribute__((packed)) date_t;
+
+/**
+ * struct dir_t - struct of directory references for various ops
+ * @fat: cluster number of the directory start for FAT
+ * @dxx: track/sector of the first directory sector for Dxx
+ */
+typedef struct {
+  uint32_t fat;
+  struct {
+    uint8_t track;
+    uint8_t sector;
+  } dxx;
+} dir_t;
+
+/**
+ * struct path_t - struct to reference a directory
+ * @part: partition number (0-based)
+ * @dir : directory reference
+ *
+ * This structure is passed around to various functions as
+ * a reference to a specific partition and directory.
+ * File operation type is implicitly given by partitions[part].fop
+ * until multi-type references on a single partition are implemented.
+ */
+typedef struct {
+  uint8_t  part;
+  dir_t    dir;
+} path_t;
+
+/**
+ * struct d64dh - D64 directory handle
+ * @track : track of the current directory sector
+ * @sector: sector of the current directory sector
+ * @entry : number of the current directory entry in its sector
+ *
+ * This structure addresses an entry in a D64 directory by its track,
+ * sector and entry (8 entries per sector).
+ */
+struct d64dh {
+  uint8_t track;
+  uint8_t sector;
+  uint8_t entry;
+};
+
+/* Ops type selector for cbmdirent_t */
+typedef enum {
+  OPSTYPE_UNDEFINED = 0,
+  OPSTYPE_FAT,
+  OPSTYPE_FAT_X00,  /* X00 files can never be disk images */
+                    /* and should match case-sensitive    */
+  OPSTYPE_M2I,
+  OPSTYPE_DXX,
+  OPSTYPE_EEFS
+} opstype_t;
+
+/**
+ * struct cbmdirent_t - directory entry for CBM names
+ * @name      : 0-padded commodore file name
+ * @typeflags : OR of file type and flags
+ * @blocksize : Size in blocks of 254 bytes
+ * @remainder : (filesize MOD 254) or 0xff if unknown
+ * @date      : Last modified date
+ * @opstype   : selects which part of the pvt union is valid
+ * @pvt       : fileops-specific private data
+ * @pvt.fat.cluster : Start cluster of the entry
+ * @pvt.fat.realname: Actual 8.3 name of the file (preferred if present)
+ * @pvt.dxx.dh      : Dxx directory handle for the dir entry of this file
+ * @pvt.m2i.offset  : Offset in the M2I file
+ *
+ * This structure holds a CBM filename, its type and its size. The typeflags
+ * are almost compatible to the file type byte in a D64 image, but the splat
+ * bit is inverted. The name is padded with 0-bytes and will always be
+ * zero-terminated. If it was read from a D64 file, it may contain valid
+ * characters beyond the first 0-byte which should be displayed in the
+ * directory, but ignored for name matching purposes.
+ * realname is either an empty string or the actual ASCII 8.3 file name
+ * of the file if the data in the name field was modified compared
+ * to the on-disk name (e.g. extension hiding or x00).
+ * year/month/day/hour/minute/second specify the time stamp of the file.
+ * It is recommended to set it to 1982-08-31 00:00:00 if unknown because
+ * this is currently the value used by FatFs for new files.
+ */
+typedef struct {
+  uint8_t   name[CBM_NAME_LENGTH+1];
+  uint8_t   typeflags;
+  uint16_t  blocksize;
+  uint8_t   remainder;
+  date_t    date;
+  opstype_t opstype;
+  union {
+    struct {
+      uint32_t cluster;
+      uint8_t  realname[8+3+1+1];
+    } fat;
+    struct {
+      struct d64dh dh;
+    } dxx;
+    struct {
+      uint16_t offset;
+    } m2i;
+  } pvt;
+} cbmdirent_t;
+
+/**
+ * struct d64fh - D64 file handle
+ * @dh    : d64dh pointing to the directory entry
+ * @part  : partition
+ * @track : current track
+ * @sector: current sector
+ * @blocks: number of sectors allocated before the current
+ *
+ * This structure holds the information required to write to a file
+ * in a D64 image and update its directory entry upon close.
+ */
+typedef struct d64fh {
+  struct d64dh dh;
+  uint8_t part;
+  uint8_t track;
+  uint8_t sector;
+  uint16_t blocks;
+} d64fh_t;
+
+/**
+ * struct dh_t - union of all directory handles
+ * @part: partition number for the handle
+ * @fat : fat directory handle
+ * @m2i : m2i directory handle (offset of entry in the file)
+ * @d64 : d64 directory handle
+ *
+ * This is a union of directory handles for all supported file types
+ * which is used as an opaque type to be passed between openddir and
+ * readdir.
+ */
+typedef struct dh_s {
+  uint8_t part;
+  union {
+    DIR          fat;
+    uint16_t     m2i;
+    struct d64dh d64;
+    eefs_dir_t   eefs;
+  } dir;
+} dh_t;
+
+/* This enum must match the struct param_s below! */
+typedef enum { DIR_TRACK = 0, DIR_START_SECTOR,
+               LAST_TRACK, LABEL_OFFSET, ID_OFFSET,
+               FILE_INTERLEAVE, DIR_INTERLEAVE
+               /* , FORMAT_FUNCTION */ } param_t;
+
+/**
+ * struct param_s - Dxx image file parameters
+ * @dir_track       : track of the (current) directory
+ * @dir_start_sector: first sector of the directory on dir_track
+ * @last_track      : highest valid track number
+ * @label_offset    : byte offset of the disk label from the beginning of dir_track/0
+ * @id_offset       : as label_offset, for the disk ID
+ * @file_interleave : interleave factor for file sectors
+ * @dir_interleave  : interleave factor for directory sectors
+ * @format_function : image-specific format function
+ *
+ * This structure holds those parameters that differ between various Dxx
+ * disk images and which could be abstracted out easily.
+ */
+struct param_s {
+  uint8_t dir_track;
+  uint8_t dir_start_sector;
+  uint8_t last_track;
+  uint8_t label_offset;
+  uint8_t id_offset;
+  uint8_t file_interleave;
+  uint8_t dir_interleave;
+  // Insert new fields here, otherwise get_param will fail!
+  void    (*format_function)(uint8_t part, struct buffer_s *buf, uint8_t *name, uint8_t *idbuf);
+};
+
+/**
+ * struct partition_t - per-partition data
+ * @fatfs      : FatFs per-drive/partition structure
+ * @current_dir: current directory on FAT as seen by sd2iec
+ * @fop        : pointer to the fileops structure for this partition
+ * @imagehandle: file handle of a mounted image file on this partition
+ * @imagetype  : disk image type mounted on this partition
+ * @d64data    : extended information about a mounted Dxx image
+ *
+ * This data structure holds per-partition data.
+ */
+typedef struct partition_s {
+  FATFS                  fatfs;
+  dir_t                  current_dir;
+  const struct fileops_s *fop;
+  FIL                    imagehandle;
+  uint8_t                imagetype;
+  struct param_s         d64data;
+} partition_t;
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/diskchange.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/diskchange.c
new file mode 100644
index 00000000..cba4bace
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/diskchange.c
@@ -0,0 +1,359 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   diskchange.c: Disk image changer
+
+*/
+
+#include <stdbool.h>
+#include <string.h>
+#include "config.h"
+#include "buffers.h"
+#include "display.h"
+#include "doscmd.h"
+#include "errormsg.h"
+#include "fatops.h"
+#include "flags.h"
+#include "ff.h"
+#include "led.h"
+#include "parser.h"
+#include "progmem.h"
+#include "timer.h"
+#include "utils.h"
+#include "ustring.h"
+#include "diskchange.h"
+
+static const char PROGMEM autoswap_lst_name[] = "AUTOSWAP.LST";
+static const char PROGMEM autoswap_gen_name[] = "AUTOSWAP.GEN"; // FIXME: must be 15 chars or less
+static const char PROGMEM petscii_marker[8]   = "#PETSCII";
+
+static FIL     swaplist;
+static path_t  swappath;
+static uint8_t linenum;
+
+#define BLINK_BACKWARD 1
+#define BLINK_FORWARD  2
+#define BLINK_HOME     3
+
+static void confirm_blink(uint8_t type) {
+  uint8_t i;
+
+  for (i=0;i<2;i++) {
+    tick_t targettime;
+
+#ifdef SINGLE_LED
+    set_dirty_led(1);
+#else
+    if (!i || type & 1)
+      set_dirty_led(1);
+    if (!i || type & 2)
+      set_busy_led(1);
+#endif
+    targettime = ticks + MS_TO_TICKS(100);
+    while (time_before(ticks,targettime)) ;
+
+    set_dirty_led(0);
+    set_busy_led(0);
+    targettime = ticks + MS_TO_TICKS(100);
+    while (time_before(ticks,targettime)) ;
+  }
+}
+
+static uint8_t mount_line(void) {
+  FRESULT res;
+  UINT bytesread;
+  uint8_t i,*str,*strend, *buffer_start;
+  uint16_t curpos;
+  bool got_colon = false;
+  uint8_t olderror = current_error;
+  current_error = ERROR_OK;
+
+  /* Kill all buffers */
+  free_multiple_buffers(FMB_USER_CLEAN);
+
+  curpos = 0;
+  strend = NULL;
+  buffer_start = command_buffer + 1;
+  globalflags |= SWAPLIST_ASCII;
+
+  for (i=0;i<=linenum;i++) {
+    str = buffer_start;
+
+    res = f_lseek(&swaplist,curpos);
+    if (res != FR_OK) {
+      parse_error(res,1);
+      return 0;
+    }
+
+    res = f_read(&swaplist, str, CONFIG_COMMAND_BUFFER_SIZE - 1, &bytesread);
+    if (res != FR_OK) {
+      parse_error(res,1);
+      return 0;
+    }
+
+    /* Terminate string in buffer */
+    if (bytesread < CONFIG_COMMAND_BUFFER_SIZE - 1)
+      str[bytesread] = 0;
+
+    if (bytesread == 0) {
+      if (linenum == 255) {
+        /* Last entry requested, found it */
+        linenum = i-1;
+      } else {
+        /* End of file - restart loop to read the first entry */
+        linenum = 0;
+      }
+      i = -1; /* I could've used goto instead... */
+      curpos = 0;
+      continue;
+    }
+
+    /* Skip name */
+    got_colon = false;
+
+    while (*str != '\r' && *str != '\n') {
+      if (*str == ':')
+        got_colon = true;
+      str++;
+    }
+
+    strend = str;
+
+    /* Skip line terminator */
+    while (*str == '\r' || *str == '\n') str++;
+
+    /* check for PETSCII marker */
+    if (curpos == 0) {
+      if (!memcmp_P(buffer_start, petscii_marker, sizeof(petscii_marker))) {
+        /* swaplist is in PETSCII, ignore this line */
+        globalflags &= ~SWAPLIST_ASCII;
+        i--;
+      }
+    }
+
+    curpos += str - buffer_start;
+  }
+
+  /* Terminate file name */
+  *strend = 0;
+
+  if (partition[swappath.part].fop != &fatops)
+    image_unmount(swappath.part);
+
+  /* Start in the partition+directory of the swap list */
+  current_part = swappath.part;
+  display_current_part(current_part);
+  partition[current_part].current_dir = swappath.dir;
+
+  /* add a colon if neccessary */
+  if (!got_colon && buffer_start[0] != '/') {
+    command_buffer[0] = ':';
+    buffer_start = command_buffer;
+  }
+
+  /* recode entry if neccessary */
+  if (globalflags & SWAPLIST_ASCII)
+    asc2pet(buffer_start);
+
+  /* parse and change */
+  do_chdir(buffer_start);
+
+  if (current_error != 0 && current_error != ERROR_DOSVERSION) {
+    current_error = olderror;
+    return 0;
+  }
+
+  return 1;
+}
+
+/**
+ * create_changelist - create a swap list in a directory
+ * @path    : path where the swap list should be created
+ * @filename: name of the swap list file
+ *
+ * This function creates a swap list in @path by scanning that
+ * directory and writing the names of all disk images it finds
+ * into @filename. Returns nonzero if at least one image was found.
+ */
+static uint8_t create_changelist(path_t *path, uint8_t *filename) {
+  FRESULT res;
+  FILINFO finfo;
+  DIR dh;
+  FIL fh;
+  UINT byteswritten;
+  uint8_t *name;
+  uint8_t found = 0;
+
+  /* open directory */
+  res = l_opendir(&partition[path->part].fatfs, path->dir.fat, &dh);
+  if (res != FR_OK)
+    return 0;
+
+  /* open file */
+  res = f_open(&partition[path->part].fatfs, &fh, filename, FA_WRITE | FA_CREATE_ALWAYS);
+  if (res != FR_OK)
+    return 0;
+
+  /* scan directory */
+  set_busy_led(1);
+  finfo.lfn = ops_scratch;
+
+  while (1) {
+    res = f_readdir(&dh, &finfo);
+    if (res != FR_OK)
+      break;
+
+    if (finfo.fname[0] == 0)
+      break;
+
+    if (!(finfo.fattrib & AM_DIR)) {
+      if (check_imageext(finfo.fname) == IMG_IS_DISK) {
+        /* write the name of disk image to file */
+        found = 1;
+
+        if (ops_scratch[0] != 0)
+          name = ops_scratch;
+        else
+          name = finfo.fname;
+
+        res = f_write(&fh, name, ustrlen(name), &byteswritten);
+        if (res != FR_OK || byteswritten == 0)
+          break;
+
+        /* add line terminator */
+        finfo.fname[0] = 0x0d;
+        finfo.fname[1] = 0x0a;
+        res = f_write(&fh, finfo.fname, 2, &byteswritten);
+        if (res != FR_OK || byteswritten == 0)
+          break;
+      }
+    }
+  }
+
+  f_close(&fh);
+
+  set_busy_led(0);
+
+  return found;
+}
+
+static void set_changelist_internal(path_t *path, uint8_t *filename, uint8_t at_end) {
+  FRESULT res;
+
+  /* Assume this isn't the auto-swap list */
+  globalflags &= (uint8_t)~AUTOSWAP_ACTIVE;
+
+  /* Remove the old swaplist */
+  if (swaplist.fs != NULL) {
+    f_close(&swaplist);
+    memset(&swaplist,0,sizeof(swaplist));
+  }
+
+  if (ustrlen(filename) == 0)
+    return;
+
+  /* Open a new swaplist */
+  partition[path->part].fatfs.curr_dir = path->dir.fat;
+  res = f_open(&partition[path->part].fatfs, &swaplist, filename, FA_READ | FA_OPEN_EXISTING);
+  if (res != FR_OK) {
+    parse_error(res,1);
+    return;
+  }
+
+  /* Remember its directory so relative paths work */
+  swappath = *path;
+
+  if (at_end)
+    linenum = 255;
+  else
+    linenum = 0;
+
+  if (mount_line())
+    confirm_blink(BLINK_HOME);
+}
+
+void set_changelist(path_t *path, uint8_t *filename) {
+  set_changelist_internal(path, filename, 0);
+}
+
+void change_disk(void) {
+  path_t path;
+
+  if (swaplist.fs == NULL) {
+    /* No swaplist active, try using AUTOSWAP.LST */
+    /* change_disk is called from the IEC idle loop, so ops_scratch is free */
+    ustrcpy_P(ops_scratch, autoswap_lst_name);
+    path.dir  = partition[current_part].current_dir;
+    path.part = current_part;
+    if (key_pressed(KEY_PREV))
+      set_changelist_internal(&path, ops_scratch, 1);
+    else
+      set_changelist_internal(&path, ops_scratch, 0);
+
+    if (swaplist.fs == NULL) {
+      /* No swap list found, create one if key was "home" */
+      if (key_pressed(KEY_HOME)) {
+        uint8_t swapname[16]; // FIXME: magic constant
+
+        ustrcpy_P(swapname, autoswap_gen_name);
+
+        if (create_changelist(&path, swapname)) {
+          set_changelist_internal(&path, swapname, 0);
+          globalflags |= AUTOSWAP_ACTIVE;
+        }
+      }
+
+      /* reset error and exit */
+      set_error(ERROR_OK);
+      reset_key(0xff); // <- lazy
+      return;
+    } else {
+      /* Autoswaplist found, mark it as active                */
+      /* and exit because the first image is already mounted. */
+      globalflags |= AUTOSWAP_ACTIVE;
+      reset_key(0xff); // <- lazy
+      return;
+    }
+  }
+
+  /* Mount the next image in the list */
+  if (key_pressed(KEY_NEXT)) {
+    linenum++;
+    reset_key(KEY_NEXT);
+    if (mount_line())
+      confirm_blink(BLINK_FORWARD);
+  } else if (key_pressed(KEY_PREV)) {
+    linenum--;
+    reset_key(KEY_PREV);
+    if (mount_line())
+      confirm_blink(BLINK_BACKWARD);
+  } else if (key_pressed(KEY_HOME)) {
+    linenum = 0;
+    reset_key(KEY_HOME);
+    if (mount_line())
+      confirm_blink(BLINK_HOME);
+  }
+}
+
+void change_init(void) {
+  memset(&swaplist,0,sizeof(swaplist));
+  globalflags &= (uint8_t)~AUTOSWAP_ACTIVE;
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/diskchange.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/diskchange.h
new file mode 100644
index 00000000..73ca3eb2
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/diskchange.h
@@ -0,0 +1,35 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   diskchange.h: Disk image changer
+
+*/
+
+#ifndef DISKCHANGE_H
+#define DISKCHANGE_H
+
+#include "dirent.h"
+
+void change_init(void);
+void change_disk(void);
+void set_changelist(path_t *path, uint8_t *filename);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/diskio.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/diskio.c
new file mode 100644
index 00000000..5b275470
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/diskio.c
@@ -0,0 +1,166 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   diskio.c: Generic disk access routines and supporting stuff
+
+*/
+
+#include "config.h"
+#include "diskio.h"
+#include "ata.h"
+#include "sdcard.h"
+
+volatile enum diskstates disk_state;
+
+#ifdef NEED_DISKMUX
+
+uint32_t drive_config;
+
+/* This function calculates the default drive configuration. */
+/* Its result is static after compilation, but doing this in */
+/* C in less messy than doing it with the preprocessor.      */
+uint32_t get_default_driveconfig(void) {
+  uint32_t result = 0xffffffffL;
+
+  /* Order matters: Whatever is checked first will be last in the config */
+#ifdef CONFIG_TWINSD
+  result = (result << 4) + (DISK_TYPE_SD  << DRIVE_BITS) + 1;
+#endif
+#ifdef HAVE_SD
+  result = (result << 4) + (DISK_TYPE_SD  << DRIVE_BITS) + 0;
+#endif
+#ifdef HAVE_ATA
+  result = (result << 4) + (DISK_TYPE_ATA << DRIVE_BITS) + 0;
+#endif
+  return result;
+}
+
+void disk_init(void) {
+#ifdef HAVE_SD
+  sd_init();
+#endif
+#ifdef HAVE_ATA
+  ata_init();
+#endif
+}
+
+DSTATUS disk_status(BYTE drv) {
+  switch(drv >> DRIVE_BITS) {
+#ifdef HAVE_ATA
+  case DISK_TYPE_ATA:
+    return ata_status(drv & DRIVE_MASK);
+
+  case DISK_TYPE_ATA2:
+    return ata_status((drv & DRIVE_MASK) + 2);
+#endif
+
+#ifdef HAVE_SD
+  case DISK_TYPE_SD:
+    return sd_status(drv & DRIVE_MASK);
+#endif
+
+  default:
+    return STA_NOINIT|STA_NODISK;
+  }
+}
+
+DSTATUS disk_initialize(BYTE drv) {
+  switch(drv >> DRIVE_BITS) {
+#ifdef HAVE_ATA
+  case DISK_TYPE_ATA:
+    return ata_initialize(drv & DRIVE_MASK);
+
+  case DISK_TYPE_ATA2:
+    return ata_initialize((drv & DRIVE_MASK) + 2);
+#endif
+
+#ifdef HAVE_SD
+  case DISK_TYPE_SD:
+    return sd_initialize(drv & DRIVE_MASK);
+#endif
+
+  default:
+    return STA_NOINIT|STA_NODISK;
+  }
+}
+
+DRESULT disk_read(BYTE drv, BYTE *buffer, DWORD sector, BYTE count) {
+  switch(drv >> DRIVE_BITS) {
+#ifdef HAVE_ATA
+  case DISK_TYPE_ATA:
+    return ata_read(drv & DRIVE_MASK,buffer,sector,count);
+
+  case DISK_TYPE_ATA2:
+    return ata_read((drv & DRIVE_MASK) + 2,buffer,sector,count);
+#endif
+
+#ifdef HAVE_SD
+  case DISK_TYPE_SD:
+    return sd_read(drv & DRIVE_MASK,buffer,sector,count);
+#endif
+
+  default:
+    return RES_ERROR;
+  }
+}
+
+DRESULT disk_write(BYTE drv, const BYTE *buffer, DWORD sector, BYTE count) {
+  switch(drv >> DRIVE_BITS) {
+#ifdef HAVE_ATA
+  case DISK_TYPE_ATA:
+    return ata_write(drv & DRIVE_MASK,buffer,sector,count);
+
+  case DISK_TYPE_ATA2:
+    return ata_write((drv & DRIVE_MASK) + 2,buffer,sector,count);
+#endif
+
+#ifdef HAVE_SD
+  case DISK_TYPE_SD:
+    return sd_write(drv & DRIVE_MASK,buffer,sector,count);
+#endif
+
+  default:
+    return RES_ERROR;
+  }
+}
+
+DRESULT disk_getinfo(BYTE drv, BYTE page, void *buffer) {
+  switch(drv >> DRIVE_BITS) {
+#ifdef HAVE_ATA
+  case DISK_TYPE_ATA:
+    return ata_getinfo(drv & DRIVE_MASK,page,buffer);
+
+  case DISK_TYPE_ATA2:
+    return ata_getinfo((drv & DRIVE_MASK) + 2,page,buffer);
+#endif
+
+#ifdef HAVE_SD
+  case DISK_TYPE_SD:
+    return sd_getinfo(drv & DRIVE_MASK,page,buffer);
+#endif
+
+  default:
+    return RES_ERROR;
+  }
+}
+
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/diskio.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/diskio.h
new file mode 100644
index 00000000..f27d522b
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/diskio.h
@@ -0,0 +1,124 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   diskio.h: Definitions for the disk access routines
+
+   Based on diskio.h from FatFS by ChaN, see ff.c for
+   for full copyright details.
+
+*/
+
+#ifndef DISKIO_H
+#define DISKIO_H
+
+#include "integer.h"
+
+/* Status of Disk Functions */
+typedef BYTE    DSTATUS;
+
+/* Disk Status Bits (DSTATUS) */
+#define STA_NOINIT              0x01    /* Drive not initialized */
+#define STA_NODISK              0x02    /* No medium in the drive */
+#define STA_PROTECT             0x04    /* Write protected */
+
+/* Results of Disk Functions */
+typedef enum {
+        RES_OK = 0,             /* 0: Successful */
+        RES_ERROR,              /* 1: R/W Error */
+        RES_WRPRT,              /* 2: Write Protected */
+        RES_NOTRDY,             /* 3: Not Ready */
+        RES_PARERR              /* 4: Invalid Parameter */
+} DRESULT;
+
+/**
+ * struct diskinfo0_t - disk info data structure for page 0
+ * @validbytes : Number of valid bytes in this struct
+ * @maxpage    : Highest diskinfo page supported
+ * @disktype   : type of the disk (DISK_TYPE_* values)
+ * @sectorsize : sector size divided by 256
+ * @sectorcount: number of sectors on the disk
+ *
+ * This is the struct returned in the data buffer when disk_getinfo
+ * is called with page=0.
+ */
+typedef struct {
+  uint8_t  validbytes;
+  uint8_t  maxpage;
+  uint8_t  disktype;
+  uint8_t  sectorsize;   /* divided by 256 */
+  uint32_t sectorcount;  /* 2 TB should be enough... (512 byte sectors) */
+} diskinfo0_t;
+
+/*---------------------------------------*/
+/* Prototypes for disk control functions */
+
+DSTATUS disk_initialize (BYTE);
+DSTATUS disk_status (BYTE);
+DRESULT disk_read (BYTE, BYTE*, DWORD, BYTE);
+DRESULT disk_write (BYTE, const BYTE*, DWORD, BYTE);
+#define disk_ioctl(a,b,c) RES_OK
+DRESULT disk_getinfo(BYTE drv, BYTE page, void *buffer);
+
+void disk_init(void);
+
+/* Will be set to DISK_ERROR if any access on the card fails */
+enum diskstates { DISK_CHANGED = 0, DISK_REMOVED, DISK_OK, DISK_ERROR };
+
+extern volatile enum diskstates disk_state;
+
+/* Disk type - part of the external API except for ATA2! */
+#define DISK_TYPE_ATA        0
+#define DISK_TYPE_ATA2       1
+#define DISK_TYPE_SD         2
+/* #define DISK_TYPE_DF         3 - removed */
+#define DISK_TYPE_NONE       7
+
+#ifdef NEED_DISKMUX
+
+/* Disk mux configuration */
+
+extern uint32_t drive_config;
+
+uint32_t get_default_driveconfig(void);
+
+#  define set_map_drive(drv,val) (drive_config = \
+      (drive_config & (0xffffffff - (0x0f << (drv * 4)))) \
+                    | (val << (drv * 4)))
+#  define map_drive(drv) ((drive_config >> (4 * drv)) & 0x0f)
+#  define set_drive_config(config)  drive_config = config
+
+/* Number of bits used for the drive, the disk type */
+/* uses the remainder (4 bits per entry).           */
+#  define DRIVE_BITS           1
+
+/* Calculate mask from the shift value */
+#  define DRIVE_MASK           ((1 << DRIVE_BITS)-1)
+
+#else // NEED_DISKMUX
+
+#  define set_map_drive(drv,val) do {} while(0)
+#  define map_drive(drv) (drv)
+#  define set_drive_config(conf) do {} while(0)
+#  define get_default_driveconfig() 0
+
+#endif // NEED_DISKMUX
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/display.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/display.c
new file mode 100644
index 00000000..65cf2e33
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/display.c
@@ -0,0 +1,256 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   display.c: Remote display interface
+
+*/
+
+#include <string.h>
+#include "config.h"
+#include "buffers.h"
+#include "eeprom-conf.h"
+#include "fatops.h"
+#include "i2c.h"
+#include "iec.h"
+#include "parser.h"
+#include "progmem.h"
+#include "ustring.h"
+#include "utils.h"
+#include "display.h"
+
+#include "uart.h"
+
+/* All menu entries are converted from PETSCII on the display side */
+static const PROGMEM char systemmenu[] = {
+  "\xc3""HANGE DIRECTORY\0"
+  "\xc3""HANGE ADDRESS\0"
+  "\xd3""TORE SETTINGS\0"
+  "\xc3""ANCEL\0"
+};
+#define SYSMENU_CHDIR  0
+#define SYSMENU_CHADDR 1
+#define SYSMENU_STORE  2
+#define SYSMENU_CANCEL 3
+
+static enum { MENU_NONE = 0, MENU_SYSTEM, MENU_CHDIR, MENU_CHADDR } menustate;
+
+static uint8_t displaybuffer[CONFIG_DISPLAY_BUFFER_SIZE];
+
+uint8_t display_found;
+
+void display_send_prefixed(uint8_t cmd, uint8_t prefixbyte, uint8_t len, const uint8_t *buffer) {
+  displaybuffer[0] = prefixbyte;
+  memcpy(displaybuffer+1, buffer, min(sizeof(displaybuffer)-1, len));
+  i2c_write_registers(DISPLAY_I2C_ADDR, cmd, min(len+1,sizeof(displaybuffer)), displaybuffer);
+}
+
+static void menu_chdir(void) {
+  cbmdirent_t dent;
+  dh_t    dh;
+  path_t  path;
+  int8_t  res;
+
+  menustate = MENU_CHDIR;
+  display_menu_reset();
+  ustrcpy_P(displaybuffer,PSTR("\xc3""ANCEL"));
+  display_menu_add(displaybuffer);
+
+  displaybuffer[0] = '_';
+  displaybuffer[1] = 0;
+  display_menu_add(displaybuffer);
+
+  path.part = current_part;
+  path.dir  = partition[current_part].current_dir;
+
+  if (opendir(&dh, &path)) {
+    menustate = MENU_NONE;
+    return;
+  }
+
+  while (1) {
+    res = readdir(&dh, &dent);
+
+    if (res > 0)
+      return;
+    if (res < 0)
+      break;
+
+    /* Skip hidden files and only add image files on FAT */
+    if (!(dent.typeflags & FLAG_HIDDEN)) {
+      if ((dent.typeflags & TYPE_MASK) == TYPE_DIR) {
+        display_menu_add(dent.name);
+      } else if (dent.opstype == OPSTYPE_FAT &&
+                 check_imageext(dent.pvt.fat.realname) != IMG_UNKNOWN) {
+        display_menu_add(dent.name);
+      }
+    }
+  }
+  display_menu_show(0);
+}
+
+static void menu_chaddr(void) {
+  uint8_t i;
+
+  menustate = MENU_CHADDR;
+  memset(displaybuffer,0,3);
+  display_menu_reset();
+  for (i=4;i<31;i++) {
+    if (i < 10)
+      displaybuffer[0] = ' ';
+    else
+      displaybuffer[0] = '0' + i/10;
+    displaybuffer[1] = '0' + i%10;
+    display_menu_add(displaybuffer);
+  }
+  display_menu_show(device_address-4);
+}
+
+void display_service(void) {
+  if (menustate == MENU_NONE) {
+    /* No menu active, upload+run system menu */
+    uint8_t i;
+
+    /* Dummy read to reset the interrupt line */
+    i2c_read_register(DISPLAY_I2C_ADDR, DISPLAY_MENU_GETSELECTION);
+
+    display_menu_reset();
+    i = 0;
+    while (pgm_read_byte(systemmenu+i)) {
+      ustrcpy_P(displaybuffer, systemmenu+i);
+      display_menu_add(displaybuffer);
+      i += ustrlen(displaybuffer)+1;
+    }
+    display_menu_show(0);
+    menustate = MENU_SYSTEM;
+
+  } else if (menustate == MENU_SYSTEM) {
+    /* Selection on the system menu */
+    uint8_t sel = i2c_read_register(DISPLAY_I2C_ADDR, DISPLAY_MENU_GETSELECTION);
+
+    switch (sel) {
+    case SYSMENU_CHDIR:
+      menu_chdir();
+      break;
+
+    case SYSMENU_CHADDR:
+      menu_chaddr();
+      break;
+
+    case SYSMENU_STORE:
+      menustate = MENU_NONE;
+      write_configuration();
+      break;
+
+    case SYSMENU_CANCEL:
+      menustate = MENU_NONE;
+      return;
+    }
+  } else if (menustate == MENU_CHADDR) {
+    /* New address selected */
+    uint8_t sel = i2c_read_register(DISPLAY_I2C_ADDR, DISPLAY_MENU_GETSELECTION);
+
+    device_address = sel+4;
+    menustate = MENU_NONE;
+    display_address(device_address);
+  } else if (menustate == MENU_CHDIR) {
+    /* New directory selected */
+    uint8_t sel = i2c_read_register(DISPLAY_I2C_ADDR, DISPLAY_MENU_GETSELECTION);
+    path_t path;
+    cbmdirent_t dent;
+
+    menustate = MENU_NONE;
+    if (sel == 0)
+      /* Cancel */
+      return;
+
+    /* Read directory name into displaybuffer */
+    path.part = current_part;
+    path.dir  = partition[current_part].current_dir;
+
+    if (sel == 1) {
+      /* Previous directory */
+      dent.name[0] = '_';
+      dent.name[1] = 0;
+    } else {
+      i2c_read_registers(DISPLAY_I2C_ADDR, DISPLAY_MENU_GETENTRY, sizeof(displaybuffer), displaybuffer);
+
+      if (first_match(&path, displaybuffer, FLAG_HIDDEN, &dent))
+        return;
+    }
+
+    chdir(&path, &dent);
+    update_current_dir(&path);
+  }
+}
+
+
+void display_send_cmd(uint8_t cmd, uint8_t len, const void *buf) {
+  if (display_found)
+    /* repeat until successful - the display may be busy */
+    while (i2c_write_registers(DISPLAY_I2C_ADDR, cmd, len, buf)) ;
+}
+
+
+void display_send_cmd_byte(uint8_t cmd, uint8_t val) {
+  display_send_cmd(cmd, 1, &val);
+}
+
+
+uint8_t display_init(uint8_t len, uint8_t *message) {
+  display_intrq_init();
+  display_found = !i2c_write_registers(DISPLAY_I2C_ADDR, DISPLAY_INIT, len, message);
+  return display_found;
+}
+
+
+void display_filename_write(uint8_t part, uint8_t len, const unsigned char *buf) {
+  display_send_prefixed(DISPLAY_FILENAME_WRITE, part, len, buf);
+}
+
+void display_menu_show(uint8_t start) {
+  display_send_cmd_byte(DISPLAY_MENU_SHOW, start);
+}
+
+
+void display_address(uint8_t dev) {
+  display_send_cmd_byte(DISPLAY_ADDRESS, dev);
+}
+
+
+void display_current_part(uint8_t part) {
+  display_send_cmd_byte(DISPLAY_CURRENT_PART, part);
+}
+
+
+void display_menu_add(const unsigned char *string) {
+  display_send_cmd(DISPLAY_MENU_ADD, strlen((const char*) string) + 1, string);
+}
+
+
+void display_menu_reset(void) {
+  display_send_cmd(DISPLAY_MENU_RESET, 0, NULL);
+}
+
+
+void display_current_directory(uint8_t part, const unsigned char *name) {
+  display_send_prefixed(DISPLAY_CURRENT_DIR, part, ustrlen(name), name);
+}
+
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/display.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/display.h
new file mode 100644
index 00000000..32335cc6
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/display.h
@@ -0,0 +1,91 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   display.h: Remote display interface
+
+*/
+
+#ifndef DISPLAY_H
+#define DISPLAY_H
+
+#ifdef CONFIG_REMOTE_DISPLAY
+
+extern uint8_t display_found;
+
+#include "i2c.h"
+
+void display_send_prefixed(uint8_t cmd, uint8_t prefixbyte, uint8_t len, const uint8_t *buffer);
+uint8_t display_init(uint8_t len, uint8_t *message);
+void display_service(void);
+void display_send_cmd(uint8_t cmd, uint8_t len, const void *buf);
+void display_send_cmd_byte(uint8_t cmd, uint8_t val);
+
+void display_filename_write(uint8_t part, uint8_t len, const unsigned char* buf);
+void display_menu_show(uint8_t start);
+void display_address(uint8_t dev);
+void display_current_part(uint8_t part);
+void display_menu_add(const unsigned char* string);
+void display_menu_reset(void);
+void display_current_directory(uint8_t part, const unsigned char* name);
+
+#else // CONFIG_REMOTE_DISPLAY
+
+# define display_found 0
+# define display_send_prefixed(a,b,c,d) do { } while (0)
+# define display_init(a,b)              0
+# define display_service()              do {} while (0)
+# define display_send_cmd(cmd,len,buf)  do {} while (0)
+# define display_send_cmd_byte(cmd,v)   do {} while (0)
+
+# define display_filename_write(a,b,c)  do {} while (0)
+# define display_menu_show(a)           do {} while (0)
+# define display_address(a)             do {} while (0)
+# define display_current_part(a)        do {} while (0)
+# define display_menu_add(a)            do {} while (0)
+# define display_menu_reset()           do {} while (0)
+# define display_current_directory(a,b) do {} while (0)
+
+#endif // CONFIG_REMOTE_DISPLAY
+
+#define DISPLAY_I2C_ADDR 0x64
+
+// Note: All partitions are 0-based internal partiton numbers!
+enum display_commands {
+  DISPLAY_INIT = 0,          // PETSCII version string
+  DISPLAY_ADDRESS,           // uint8_t device address
+  DISPLAY_FILENAME_READ,     // uint8_t part, PETSCII file name
+  DISPLAY_FILENAME_WRITE,    // uint8_t part, PETSCII file name
+  DISPLAY_DOSCOMMAND,        // PETSCII command string
+  DISPLAY_ERRORCHANNEL,      // PETSCII error channel message
+  DISPLAY_CURRENT_DIR,       // uint8_t part, PETSCII directory name
+  DISPLAY_CURRENT_PART,      // uint8_t part
+  DISPLAY_MENU_RESET = 0x40, // -
+  DISPLAY_MENU_ADD,          // zero-terminated PETSCII string
+  DISPLAY_MENU_SHOW,         // uint8_t startentry
+  DISPLAY_MENU_GETSELECTION, // returns the number of the selected menu entry
+  DISPLAY_MENU_GETENTRY,     // returns the text of the selected menu entry
+};
+
+#define display_filename_read(part,len,buf)     display_send_prefixed(DISPLAY_FILENAME_READ,part,len,buf)
+#define display_doscommand(len,buf)             display_send_cmd(DISPLAY_DOSCOMMAND,len,buf)
+#define display_errorchannel(len,buf)           display_send_cmd(DISPLAY_ERRORCHANNEL,len,buf)
+
+#endif // DISPLAY_H
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/doscmd.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/doscmd.c
new file mode 100644
index 00000000..01c1df20
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/doscmd.c
@@ -0,0 +1,2166 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   doscmd.c: Command channel parser
+
+*/
+
+#include <ctype.h>
+#include <stdlib.h>
+#include <string.h>
+#include "config.h"
+#include "crc.h"
+#include "d64ops.h"
+#include "dirent.h"
+#include "diskchange.h"
+#include "diskio.h"
+#include "display.h"
+#include "eeprom-conf.h"
+#include "errormsg.h"
+#include "fastloader.h"
+#include "fastloader-ll.h"
+#include "fatops.h"
+#include "ff.h"
+#include "fileops.h"
+#include "filesystem.h"
+#include "flags.h"
+#include "iec.h"
+#include "led.h"
+#include "parser.h"
+#include "system.h"
+#include "time.h"
+#include "rtc.h"
+#include "uart.h"
+#include "ustring.h"
+#include "utils.h"
+#include "wrapops.h"
+#include "doscmd.h"
+
+#define CURSOR_RIGHT 0x1d
+
+static FIL romfile;
+
+/* ---- Fastloader tables ---- */
+
+enum {
+  RXTX_NONE,
+
+  RXTX_GEOS_1MHZ,
+  RXTX_GEOS_2MHZ,
+  RXTX_GEOS_1581_21,
+  RXTX_WHEELS_1MHZ,
+  RXTX_WHEELS_2MHZ,
+  RXTX_WHEELS44_1541,
+  RXTX_WHEELS44_1581,
+
+  RXTX_FC3OF_PAL,
+  RXTX_FC3OF_NTSC,
+};
+
+typedef uint8_t (*fastloader_rx_t)(void);
+typedef uint8_t (*fastloader_tx_t)(uint8_t byte);
+typedef void    (*fastloader_handler_t)(uint8_t param);
+
+struct fastloader_rxtx_s {
+  fastloader_rx_t rxfunc;
+  fastloader_tx_t txfunc;
+};
+
+static const PROGMEM struct fastloader_rxtx_s fl_rxtx_table[] = {
+#ifdef CONFIG_LOADER_GEOS
+  [RXTX_GEOS_1MHZ]     = { geos_get_byte_1mhz,     geos_send_byte_1mhz     },
+  [RXTX_GEOS_2MHZ]     = { geos_get_byte_2mhz,     geos_send_byte_2mhz     },
+  [RXTX_GEOS_1581_21]  = { geos_get_byte_2mhz,     geos_send_byte_1581_21  },
+# ifdef CONFIG_LOADER_WHEELS
+  [RXTX_WHEELS_1MHZ]   = { wheels_get_byte_1mhz,   wheels_send_byte_1mhz   },
+  [RXTX_WHEELS_2MHZ]   = { geos_get_byte_2mhz,     geos_send_byte_1581_21  },
+  [RXTX_WHEELS44_1541] = { wheels44_get_byte_1mhz, wheels_send_byte_1mhz   },
+  [RXTX_WHEELS44_1581] = { wheels44_get_byte_2mhz, wheels44_send_byte_2mhz },
+# endif
+#endif
+#ifdef CONFIG_LOADER_FC3
+  [RXTX_FC3OF_PAL]     = { NULL, fc3_oldfreeze_pal_send  },
+  [RXTX_FC3OF_NTSC]    = { NULL, fc3_oldfreeze_ntsc_send },
+#endif
+};
+
+struct fastloader_crc_s {
+  uint16_t crc;
+  uint8_t  loadertype;
+  uint8_t  rxtx;
+};
+
+static const PROGMEM struct fastloader_crc_s fl_crc_table[] = {
+#ifdef CONFIG_LOADER_TURBODISK
+  { 0x9c9f, FL_TURBODISK,        RXTX_NONE          },
+#endif
+#ifdef CONFIG_LOADER_FC3
+  { 0xdab0, FL_FC3_LOAD,         RXTX_NONE          }, // Final Cartridge III
+  { 0x973b, FL_FC3_LOAD,         RXTX_NONE          }, // Final Cartridge III variation
+  { 0x7e38, FL_FC3_LOAD,         RXTX_NONE          }, // EXOS v3
+  { 0x1b30, FL_FC3_SAVE,         RXTX_NONE          }, // note: really early CRC; lots of C64 code at the end
+  { 0x8b0e, FL_FC3_SAVE,         RXTX_NONE          }, // variation
+  { 0x9930, FL_FC3_FREEZED,      RXTX_NONE          },
+  { 0x0281, FL_FC3_OLDFREEZED,   RXTX_FC3OF_PAL     }, // older freezed-file loader, PAL
+  { 0xc196, FL_FC3_OLDFREEZED,   RXTX_FC3OF_NTSC    }, // older freezed-file loader, NTSC
+#endif
+#ifdef CONFIG_LOADER_DREAMLOAD
+  { 0x2e69, FL_DREAMLOAD,        RXTX_NONE          },
+#endif
+#ifdef CONFIG_LOADER_ULOAD3
+  { 0xdd81, FL_ULOAD3,           RXTX_NONE          },
+#endif
+#ifdef CONFIG_LOADER_ELOAD1
+  { 0x393e, FL_ELOAD1,           RXTX_NONE          },
+#endif
+#ifdef CONFIG_LOADER_EPYXCART
+  { 0x5a01, FL_EPYXCART,         RXTX_NONE          },
+#endif
+#ifdef CONFIG_LOADER_GEOS
+  { 0xb979, FL_GEOS_S1_64,       RXTX_GEOS_1MHZ     }, // GEOS 64 stage 1
+  { 0x2469, FL_GEOS_S1_128,      RXTX_GEOS_1MHZ     }, // GEOS 128 stage 1
+  { 0x4d79, FL_GEOS_S23_1541,    RXTX_GEOS_1MHZ     }, // GEOS 64 1541 stage 2
+  { 0xb2bc, FL_GEOS_S23_1541,    RXTX_GEOS_1MHZ     }, // GEOS 128 1541 stage 2
+  { 0xb272, FL_GEOS_S23_1541,    RXTX_GEOS_1MHZ     }, // GEOS 64/128 1541 stage 3 (Configure)
+  { 0xdaed, FL_GEOS_S23_1571,    RXTX_GEOS_2MHZ     }, // GEOS 64/128 1571 stage 3 (Configure)
+  { 0x3f8d, FL_GEOS_S23_1581,    RXTX_GEOS_2MHZ     }, // GEOS 64/128 1581 Configure 2.0
+  { 0xc947, FL_GEOS_S23_1581,    RXTX_GEOS_1581_21  }, // GEOS 64/128 1581 Configure 2.1
+# ifdef CONFIG_LOADER_WHEELS
+  { 0xf140, FL_WHEELS_S1_64,     RXTX_WHEELS_1MHZ   }, // Wheels 64 stage 1
+  { 0x737e, FL_WHEELS_S1_128,    RXTX_WHEELS_1MHZ   }, // Wheels 128 stage 1
+  { 0x755a, FL_WHEELS_S2,        RXTX_WHEELS_1MHZ   }, // Wheels 64 1541 stage 2
+  { 0x2920, FL_WHEELS_S2,        RXTX_WHEELS_1MHZ   }, // Wheels 128 1541 stage 2
+  { 0x18e9, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 64 1571
+  { 0x9804, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 64 1581
+  { 0x48f5, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 64 FD native partition
+  { 0x1356, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 64 FD emulation partition
+  { 0xe885, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 64 HD native partition
+  { 0x4eca, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 64 HD emulation partition
+  { 0xdbf6, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 128 1571
+  { 0xe4ab, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 128 1581
+  { 0x6de5, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 128 FD native
+  { 0x30ff, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 128 FD emulation
+  { 0x46e7, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 128 HD native
+  { 0x2253, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 128 HD emulation
+  { 0xc26a, FL_WHEELS44_S2,      RXTX_WHEELS44_1541 }, // Wheels 64/128 4.4 1541
+  { 0x550c, FL_WHEELS44_S2,      RXTX_WHEELS44_1541 }, // Wheels 64/128 4.4 1571
+  { 0x825b, FL_WHEELS44_S2_1581, RXTX_WHEELS44_1581 }, // Wheels 64/128 4.4 1581
+  { 0x245b, FL_WHEELS44_S2_1581, RXTX_WHEELS44_1581 }, // Wheels 64/128 4.4 1581
+  { 0x7021, FL_WHEELS44_S2_1581, RXTX_WHEELS44_1581 }, // Wheels 64/128 4.4 1581
+  { 0xd537, FL_WHEELS44_S2_1581, RXTX_WHEELS44_1581 }, // Wheels 64/128 4.4 1581
+  { 0xf635, FL_WHEELS44_S2_1581, RXTX_WHEELS44_1581 }, // Wheels 64/128 4.4 1581
+# endif
+#endif
+#ifdef CONFIG_LOADER_NIPPON
+  { 0x43c1, FL_NIPPON,           RXTX_NONE          }, // Nippon
+#endif
+#ifdef CONFIG_LOADER_AR6
+  { 0x4870, FL_AR6_1581_LOAD,    RXTX_NONE          },
+  { 0x2925, FL_AR6_1581_SAVE,    RXTX_NONE          },
+#endif
+#ifdef CONFIG_LOADER_MMZAK
+  { 0x12a6, FL_MMZAK,            RXTX_NONE          }, // Maniac Mansion/Zak McKracken
+#endif
+#ifdef CONFIG_LOADER_GIJOE
+  { 0x0c92, FL_GI_JOE,           RXTX_NONE          }, // hacked-up GI Joe loader seen in an Eidolon crack
+#endif
+
+  { 0, FL_NONE, 0 }, // end marker
+};
+
+struct fastloader_handler_s {
+  uint16_t             address;
+  uint8_t              loadertype;
+  fastloader_handler_t handler;
+  uint8_t              parameter;
+};
+
+static const PROGMEM struct fastloader_handler_s fl_handler_table[] = {
+#ifdef CONFIG_LOADER_TURBODISK
+  { 0x0303, FL_TURBODISK,        load_turbodisk, 0 },
+#endif
+#ifdef CONFIG_LOADER_FC3
+  { 0x059a, FL_FC3_LOAD,         load_fc3,       0 }, // FC3
+  { 0x0400, FL_FC3_LOAD,         load_fc3,       0 }, // EXOS
+  { 0x059c, FL_FC3_SAVE,         save_fc3,       0 },
+  { 0x059a, FL_FC3_SAVE,         save_fc3,       0 }, // variation
+  { 0x0403, FL_FC3_FREEZED,      load_fc3,       1 },
+  { 0x057f, FL_FC3_OLDFREEZED,   load_fc3oldfreeze, 0},
+
+#endif
+#ifdef CONFIG_LOADER_DREAMLOAD
+  { 0x0700, FL_DREAMLOAD,        load_dreamload, 0 },
+#endif
+#ifdef CONFIG_LOADER_ULOAD3
+  { 0x0336, FL_ULOAD3,           load_uload3,    0 },
+#endif
+#ifdef CONFIG_LOADER_ELOAD1
+  { 0x0300, FL_ELOAD1,           load_eload1,    0 },
+#endif
+#ifdef CONFIG_LOADER_GIJOE
+  { 0x0500, FL_GI_JOE,           load_gijoe,     0 },
+#endif
+#ifdef CONFIG_LOADER_EPYXCART
+  { 0x01a9, FL_EPYXCART,         load_epyxcart,  0 },
+#endif
+#ifdef CONFIG_LOADER_GEOS
+  { 0x0457, FL_GEOS_S1_64,       load_geos_s1,   0 },
+  { 0x0470, FL_GEOS_S1_128,      load_geos_s1,   1 },
+  { 0x03e2, FL_GEOS_S23_1541,    load_geos,      0 },
+  { 0x03dc, FL_GEOS_S23_1541,    load_geos,      0 },
+  { 0x03ff, FL_GEOS_S23_1571,    load_geos,      0 },
+  { 0x040f, FL_GEOS_S23_1581,    load_geos,      0 },
+# ifdef CONFIG_LOADER_WHEELS
+  { 0x0400, FL_WHEELS_S1_64,     load_wheels_s1, 0 },
+  { 0x0400, FL_WHEELS_S1_128,    load_wheels_s1, 1 },
+  { 0x0300, FL_WHEELS_S2,        load_wheels_s2, 0 },
+  { 0x0400, FL_WHEELS44_S2,      load_wheels_s2, 0 },
+  { 0x0300, FL_WHEELS44_S2_1581, load_wheels_s2, 0 },
+  { 0x0500, FL_WHEELS44_S2_1581, load_wheels_s2, 0 },
+# endif
+#endif
+#ifdef CONFIG_LOADER_NIPPON
+  { 0x0300, FL_NIPPON,           load_nippon,    0 },
+#endif
+#ifdef CONFIG_LOADER_AR6
+  { 0x0500, FL_AR6_1581_LOAD,    load_ar6_1581,  0 },
+  { 0x05f4, FL_AR6_1581_SAVE,    save_ar6_1581,  0 },
+#endif
+#ifdef CONFIG_LOADER_MMZAK
+  { 0x0500, FL_MMZAK,            load_mmzak,     0 },
+#endif
+
+  { 0, FL_NONE, NULL, 0 }, // end marker
+};
+
+struct fastloader_capture_s {
+  uint8_t  loadertype;
+  uint16_t startaddr;
+  uint8_t  length;     // length - 1
+  uint8_t  buffer_id;
+};
+
+static const PROGMEM struct fastloader_capture_s fl_capture_table[] = {
+#ifdef CONFIG_LOADER_GEOS
+  { FL_GEOS_S1_64,  0x42a, 255, BUFFER_SYS_CAPTURE1 },
+  { FL_GEOS_S1_128, 0x44f, 255, BUFFER_SYS_CAPTURE1 },
+#endif
+
+  { FL_NONE, 0, 0, 0 }  // end marker
+};
+
+/* ---- Minimal drive rom emulation ---- */
+
+typedef struct magic_value_s {
+  uint16_t address;
+  uint8_t  val[2];
+} magic_value_t;
+
+/* These are address/value pairs used by some programs to detect a 1541. */
+/* Currently we remember two bytes per address since that's the longest  */
+/* block required. */
+static const PROGMEM magic_value_t c1541_magics[] = {
+  { 0xfea0, { 0x0d, 0xed } }, /* used by DreamLoad and ULoad Model 3 */
+  { 0xe5c6, { 0x34, 0xb1 } }, /* used by DreamLoad and ULoad Model 3 */
+  { 0xfffe, { 0x00, 0x00 } }, /* Disable AR6 fastloader */
+  { 0,      { 0, 0 } }        /* end mark */
+};
+
+/* System partition G-P answer */
+static const PROGMEM uint8_t system_partition_info[] = {
+  0xff,0xe2,0x00,0x53,0x59,0x53,0x54,0x45,
+  0x4d,0xa0,0xa0,0xa0,0xa0,0xa0,0xa0,0xa0,
+  0xa0,0xa0,0xa0,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x0d
+};
+
+#ifndef globalflags
+/* AVR uses GPIOR for this */
+uint8_t globalflags;
+#endif
+
+uint8_t command_buffer[CONFIG_COMMAND_BUFFER_SIZE+2];
+uint8_t command_length,original_length;
+
+date_t date_match_start;
+date_t date_match_end;
+
+uint16_t datacrc = 0xffff;
+static fastloaderid_t previous_loader;
+
+/* partial fastloader data capture */
+static uint16_t  capture_address, capture_remain;
+static uint8_t   capture_offset;
+static buffer_t *capture_buffer;
+
+#ifdef CONFIG_STACK_TRACKING
+//FIXME: AVR-only code
+uint16_t minstack = RAMEND;
+
+void __cyg_profile_func_enter (void *this_fn, void *call_site) __attribute__((no_instrument_function));
+void __cyg_profile_func_exit  (void *this_fn, void *call_site) __attribute__((alias("__cyg_profile_func_enter")));
+
+void __cyg_profile_func_enter (void *this_fn, void *call_site) {
+  if (SP < minstack) minstack = SP;
+}
+#endif
+
+#ifdef HAVE_RTC
+/* Days of the week as used by the CMD FD */
+static const PROGMEM uint8_t downames[] = "SUN.MON.TUESWED.THURFRI.SAT.";
+
+/* Skeleton of the ASCII time format */
+static const PROGMEM uint8_t asciitime_skel[] = " xx/xx/xx xx:xx:xx xM\r";
+#endif
+
+
+/* ------------------------------------------------------------------------- */
+/*  Drive code exec helpers                                                  */
+/* ------------------------------------------------------------------------- */
+
+#ifdef CONFIG_CAPTURE_LOADERS
+static uint8_t loader_buffer[CONFIG_CAPTURE_BUFFER_SIZE];
+static uint8_t *loader_ptr = loader_buffer;
+static uint8_t capture_count = 0;
+
+/* Convert byte to two-character hex string */
+static uint8_t *byte_to_hex(uint8_t num, uint8_t *str) {
+  uint8_t tmp;
+
+  tmp = (num & 0xf0) >> 4;
+  if (tmp < 10)
+    *str++ = '0' + tmp;
+  else
+    *str++ = 'a' + tmp - 10;
+
+  tmp = num & 0x0f;
+  if (tmp < 10)
+    *str++ = '0' + tmp;
+  else
+    *str++ = 'a' + tmp - 10;
+
+  return str;
+}
+
+/* Copy command to capture buffer */
+static void dump_command(void) {
+  if (loader_ptr - loader_buffer + command_length + 2+1 < CONFIG_CAPTURE_BUFFER_SIZE) {
+    *loader_ptr++ = 'C';
+    *loader_ptr++ = command_length;
+    memcpy(loader_ptr, command_buffer, command_length);
+    loader_ptr += command_length;
+  } else {
+    *loader_ptr = 'X';
+  }
+}
+
+/* Dump buffer state */
+static void dump_buffer_state(void) {
+  if (CONFIG_CAPTURE_BUFFER_SIZE - (loader_ptr - loader_buffer) > sizeof(buffer_t)*CONFIG_BUFFER_COUNT+2) {
+    *loader_ptr++ = 'B';
+    *loader_ptr++ = sizeof(buffer_t);
+    *loader_ptr++ = CONFIG_BUFFER_COUNT;
+    memcpy(loader_ptr, buffers, sizeof(buffer_t) * CONFIG_BUFFER_COUNT);
+    loader_ptr += sizeof(buffer_t) * CONFIG_BUFFER_COUNT;
+  }
+}
+
+/* Save capture buffer to disk */
+static void save_capbuffer(void) {
+  uint8_t *ptr;
+  FIL datafile;
+
+  /* Use CRC and counter as file name */
+  ptr = byte_to_hex(datacrc >> 8, ops_scratch);
+  ptr = byte_to_hex(datacrc & 0xff, ptr);
+  *ptr++ = '-';
+  ptr = byte_to_hex(capture_count++, ptr);
+  *ptr++ = '.';
+  *ptr++ = 'd';
+  *ptr++ = 'm';
+  *ptr++ = 'p';
+  *ptr   = 0;
+
+  FRESULT res = f_open(&partition[0].fatfs, &datafile, ops_scratch, FA_WRITE | FA_CREATE_ALWAYS);
+  if (res == FR_OK) {
+    UINT byteswritten;
+
+    /* Skip the error checks here */
+    f_write(&datafile, loader_buffer, loader_ptr - loader_buffer, &byteswritten);
+    f_close(&datafile);
+  }
+
+  /* Reset capture buffer */
+  loader_ptr = loader_buffer;
+
+  /* Notify the user */
+  set_error(ERROR_DRIVE_NOT_READY);
+}
+#endif // CONFIG_CAPTURE_LOADERS
+
+static void run_loader(uint16_t address) {
+  if (detected_loader == FL_NONE) {
+    uart_puts_P(PSTR("Code exec at "));
+    uart_puthex(address >> 8);
+    uart_puthex(address & 0xff);
+    uart_puts_P(PSTR(", CRC "));
+    uart_puthex(datacrc >> 8);
+    uart_puthex(datacrc & 0xff);
+    uart_putcrlf();
+  }
+
+  if (detected_loader == FL_NONE)
+    detected_loader = previous_loader;
+
+#ifdef CONFIG_CAPTURE_LOADERS
+  if (detected_loader == FL_NONE && datacrc != 0xffff) {
+    dump_command();
+    dump_buffer_state();
+    save_capbuffer();
+  }
+#endif
+
+  /* Try to find a handler for loader */
+  const struct fastloader_handler_s *ptr = fl_handler_table;
+  uint8_t loader,parameter;
+  fastloader_handler_t handler;
+
+  while ( (loader = pgm_read_byte(&ptr->loadertype)) != FL_NONE ) {
+    if (detected_loader == loader &&
+        address == pgm_read_word(&ptr->address)) {
+      /* Found it */
+      handler   = (fastloader_handler_t)pgm_read_word(&ptr->handler);
+      parameter = pgm_read_byte(&ptr->parameter);
+
+      /* Call */
+      handler(parameter);
+
+      break;
+    }
+    ptr++;
+  }
+
+  datacrc = 0xffff;
+  previous_loader = detected_loader;
+  detected_loader = FL_NONE;
+}
+
+
+/* ------------------------------------------------------------------------- */
+/*  Parsing helpers                                                          */
+/* ------------------------------------------------------------------------- */
+
+/* Fill the end of the command buffer with 0x00  */
+/* so C string functions can work on file names. */
+
+static void clean_cmdbuffer(void) {
+  memset(command_buffer+command_length, 0, sizeof(command_buffer)-command_length);
+}
+
+
+/* Parse parameters of block commands in the command buffer */
+/* Returns number of parameters (up to 4) or <0 on error    */
+static int8_t parse_blockparam(uint8_t values[]) {
+  uint8_t paramcount = 0;
+  uint8_t *str;
+
+  str = ustrchr(command_buffer, ':');
+  if (!str) {
+    if (ustrlen(command_buffer) < 3)
+      return -1;
+    str = command_buffer + 2;
+  }
+
+  str++;
+
+  while (*str && paramcount < 4) {
+    /* Skip all spaces, cursor-rights and commas - CC7C */
+    while (*str == ' ' || *str == CURSOR_RIGHT || *str == ',') str++;
+    if (!*str)
+      break;
+
+    values[paramcount++] = parse_number(&str);
+  }
+
+  return paramcount;
+}
+
+static uint8_t parse_bool(void) {
+  switch (command_buffer[2]) {
+  case '+':
+    return 1;
+
+  case '-':
+    return 0;
+
+  default:
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    return 255;
+  }
+}
+
+/* ------------------------------------------------------------------------- */
+/*  Command handlers                                                         */
+/* ------------------------------------------------------------------------- */
+
+/* ------------------- */
+/*  CD/MD/RD commands  */
+/* ------------------- */
+
+/* --- MD --- */
+static void parse_mkdir(void) {
+  path_t  path;
+  uint8_t *name;
+
+  /* MD requires a colon */
+  if (!ustrchr(command_buffer, ':')) {
+    set_error(ERROR_SYNTAX_NONAME);
+    return;
+  }
+  if (parse_path(command_buffer+2, &path, &name, 0))
+    return;
+  mkdir(&path,name);
+}
+
+/* --- CD --- */
+
+/* internal version of CD that is used by CD and diskchange.c */
+void do_chdir(uint8_t *parsestr) {
+  path_t      path;
+  uint8_t    *name;
+  cbmdirent_t dent;
+
+  if (parse_path(parsestr, &path, &name, 1))
+    return;
+
+  /* clear '*' file */
+  previous_file_dirent.name[0] = 0;
+
+  if (ustrlen(name) != 0) {
+    /* Path component after the : */
+    if (name[0] == '_') {
+      /* Going up a level */
+      ustrcpy(dent.name, name);
+      if (chdir(&path,&dent))
+        return;
+    } else {
+      /* A directory name - try to match it */
+      if (first_match(&path, name, FLAG_HIDDEN, &dent))
+        return;
+
+      if (chdir(&path, &dent))
+        return;
+    }
+  } else {
+    /* reject if there is no / in the string */
+    if (!ustrchr(parsestr, '/')) {
+      set_error(ERROR_FILE_NOT_FOUND_39);
+      return;
+    }
+  }
+
+  update_current_dir(&path);
+}
+
+static void parse_chdir(void) {
+  do_chdir(command_buffer + 2);
+
+  if (globalflags & AUTOSWAP_ACTIVE)
+    set_changelist(NULL, NULLSTRING);
+}
+
+/* --- RD --- */
+static void parse_rmdir(void) {
+  uint8_t *str;
+  uint8_t res;
+  uint8_t part;
+  path_t  path;
+  cbmdirent_t dent,chkdent;
+  dh_t dh;
+
+  /* No deletion across subdirectories */
+  if (ustrchr(command_buffer, '/')) {
+    set_error(ERROR_SYNTAX_NONAME);
+    return;
+  }
+
+  /* Parse partition number */
+  str = command_buffer+2;
+  part = parse_partition(&str);
+  if (*str != ':') {
+    set_error(ERROR_SYNTAX_NONAME);
+  } else {
+    path.part = part;
+    path.dir  = partition[part].current_dir;
+
+    if (first_match(&path, str+1, TYPE_DIR, &dent) != 0)
+      return;
+
+    /* Check if there is anything in that directory */
+    if (chdir(&path, &dent))
+      return;
+
+    if (opendir(&dh, &path))
+      return;
+
+    if (readdir(&dh, &chkdent) != -1) {
+      if (current_error == 0)
+        set_error(ERROR_FILE_EXISTS);
+      return;
+    }
+
+    path.dir = partition[part].current_dir;
+
+    res = file_delete(&path, &dent);
+    if (res != 255)
+      set_error_ts(ERROR_SCRATCHED,res,0);
+  }
+}
+
+/* --- CD/MD/RD subparser --- */
+static void parse_dircommand(void) {
+  clean_cmdbuffer();
+
+  switch (command_buffer[0]) {
+  case 'M':
+    parse_mkdir();
+    break;
+
+  case 'C':
+    parse_chdir();
+    break;
+
+  case 'R':
+    parse_rmdir();
+    break;
+
+  default:
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    break;
+  }
+}
+
+
+/* ------------ */
+/*  B commands  */
+/* ------------ */
+static void parse_block(void) {
+  uint8_t  *str;
+  buffer_t *buf;
+  uint8_t  params[4];
+  int8_t   pcount;
+
+  clean_cmdbuffer();
+
+  str = ustrchr(command_buffer, '-');
+  if (!str) {
+    set_error(ERROR_SYNTAX_UNABLE);
+    return;
+  }
+
+  memset(params,0,sizeof(params));
+  pcount = parse_blockparam(params);
+  if (pcount < 0)
+    return;
+
+  str++;
+  switch (*str) {
+  case 'R':
+  case 'W':
+    /* Block-Read  - CD56 */
+    /* Block-Write - CD73 */
+    buf = find_buffer(params[0]);
+    if (!buf) {
+      set_error(ERROR_NO_CHANNEL);
+      return;
+    }
+
+    if (*str == 'R') {
+      read_sector(buf, buf->pvt.buffer.part, params[2], params[3]);
+      if (command_buffer[0] == 'B') {
+        buf->position = 1;
+        buf->lastused = buf->data[0];
+      } else {
+        buf->position = 0;
+        buf->lastused = 255;
+      }
+    } else {
+      if (command_buffer[0] == 'B')
+        buf->data[0] = buf->position-1; // FIXME: Untested, verify!
+      write_sector(buf, buf->pvt.buffer.part, params[2], params[3]);
+    }
+    break;
+
+  case 'P':
+    /* Buffer-Position - CDBD */
+    buf = find_buffer(params[0]);
+    if (!buf) {
+      set_error(ERROR_NO_CHANNEL);
+      return;
+    }
+    if (buf->pvt.buffer.size != 1) {
+      /* Extended position for large buffers */
+      uint8_t count = params[2];
+
+      /* Walk the chain, wrap whenever necessary */
+      buf->secondary = BUFFER_SEC_CHAIN - params[0];
+      buf = buf->pvt.buffer.first;
+      while (count--) {
+        if (buf->pvt.buffer.next != NULL)
+          buf = buf->pvt.buffer.next;
+        else
+          buf = buf->pvt.buffer.first;
+      }
+      buf->secondary = params[0];
+      buf->mustflush = 0;
+    }
+    buf->position = params[1];
+    break;
+
+  default:
+    set_error(ERROR_SYNTAX_UNABLE);
+    return;
+  }
+}
+
+
+/* ---------- */
+/*  C - Copy  */
+/* ---------- */
+static void parse_copy(void) {
+  path_t srcpath,dstpath;
+  uint8_t *srcname,*dstname,*tmp;
+  uint8_t savedtype;
+  int8_t res;
+  buffer_t *srcbuf,*dstbuf;
+  cbmdirent_t dent;
+
+  clean_cmdbuffer();
+
+  /* Find the = */
+  srcname = ustrchr(command_buffer,'=');
+  if (srcname == NULL) {
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    return;
+  }
+  *srcname++ = 0;
+
+  /* Parse the destination name */
+  if (parse_path(command_buffer+1, &dstpath, &dstname, 0))
+    return;
+
+  if (ustrlen(dstname) == 0) {
+    set_error(ERROR_SYNTAX_NONAME);
+    return;
+  }
+
+  /* Check for invalid characters in the destination name */
+  if (check_invalid_name(dstname)) {
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    return;
+  }
+
+  /* Check if the destination file exists */
+  res = first_match(&dstpath, dstname, FLAG_HIDDEN, &dent);
+  if (res == 0) {
+    set_error(ERROR_FILE_EXISTS);
+    return;
+  }
+
+  if (res > 0)
+    return;
+
+  set_error(ERROR_OK);
+
+  srcbuf = alloc_buffer();
+  dstbuf = alloc_buffer();
+  if (srcbuf == NULL || dstbuf == NULL)
+    return;
+
+  savedtype = 0;
+  srcname = ustr1tok(srcname,',',&tmp);
+  while (srcname != NULL) {
+    /* Parse the source path */
+    if (parse_path(srcname, &srcpath, &srcname, 0))
+      goto cleanup;
+
+    /* Open the current source file */
+    res = first_match(&srcpath, srcname, FLAG_HIDDEN, &dent);
+    if (res != 0)
+      goto cleanup;
+
+    /* Note: A 1541 can't copy REL files. We try to do better. */
+    if ((dent.typeflags & TYPE_MASK) == TYPE_REL) {
+      if (savedtype != 0 && savedtype != TYPE_REL) {
+        set_error(ERROR_FILE_TYPE_MISMATCH);
+        goto cleanup;
+      }
+      open_rel(&srcpath, &dent, srcbuf, 0, 1);
+    } else {
+      if (savedtype != 0 && savedtype == TYPE_REL) {
+        set_error(ERROR_FILE_TYPE_MISMATCH);
+        goto cleanup;
+      }
+      open_read(&srcpath, &dent, srcbuf);
+    }
+
+    if (current_error != 0)
+      goto cleanup;
+
+    /* Open the destination file (first source only) */
+    if (savedtype == 0) {
+      savedtype = dent.typeflags & TYPE_MASK;
+      memset(&dent, 0, sizeof(dent));
+      ustrncpy(dent.name, dstname, CBM_NAME_LENGTH);
+      if (savedtype == TYPE_REL)
+        open_rel(&dstpath, &dent, dstbuf, srcbuf->recordlen, 1);
+      else
+        open_write(&dstpath, &dent, savedtype, dstbuf, 0);
+    }
+
+    while (1) {
+      uint8_t tocopy;
+
+      if (savedtype == TYPE_REL)
+        tocopy = srcbuf->recordlen;
+      else
+        tocopy = 256-dstbuf->position;
+
+      if (tocopy > (srcbuf->lastused - srcbuf->position+1))
+        tocopy = srcbuf->lastused - srcbuf->position + 1;
+
+      if (tocopy > 256-dstbuf->position)
+        tocopy = 256-dstbuf->position;
+
+      memcpy(dstbuf->data + dstbuf->position,
+             srcbuf->data + srcbuf->position,
+             tocopy);
+      mark_buffer_dirty(dstbuf);
+      srcbuf->position += tocopy-1;  /* add 1 less, simplifies the test later */
+      dstbuf->position += tocopy;
+      dstbuf->lastused  = dstbuf->position-1;
+
+      /* End if we just copied the last data block */
+      if (srcbuf->sendeoi && srcbuf->position == srcbuf->lastused)
+        break;
+
+      /* Refill the buffers if required */
+      if (srcbuf->recordlen || srcbuf->position++ == srcbuf->lastused)
+        if (srcbuf->refill(srcbuf))
+          goto cleanup;
+
+      if (dstbuf->recordlen || dstbuf->position == 0)
+        if (dstbuf->refill(dstbuf))
+          goto cleanup;
+    }
+
+    /* Close current source file */
+    /* Free and reallocate the buffer. This is required because most of the  */
+    /* file_open code assumes that it will get a "pristine" buffer with      */
+    /* 0 is most of the fields. Allocation cannot fail at this point because */
+    /* there is at least one free buffer.                                    */
+    cleanup_and_free_buffer(srcbuf);
+    srcbuf = alloc_buffer();
+
+    /* Next file */
+    srcname = ustr1tok(NULL,',',&tmp);
+  }
+
+  cleanup:
+  /* Close the buffers */
+  srcbuf->cleanup(srcbuf);
+  cleanup_and_free_buffer(dstbuf);
+}
+
+
+/* ----------------------- */
+/*  CP - Change Partition  */
+/* ----------------------- */
+static void parse_changepart(void) {
+  uint8_t *str;
+  uint8_t part;
+
+  if (command_buffer[1] == 'P') {
+    clean_cmdbuffer();
+    str  = command_buffer + 2;
+    part = parse_partition(&str);
+  } else {
+    /* Shift-P - binary version */
+    part = command_buffer[2] - 1;
+  }
+
+  if(part>=max_part) {
+    set_error_ts(ERROR_PARTITION_ILLEGAL,part+1,0);
+    return;
+  }
+
+  current_part = part;
+  if (globalflags & AUTOSWAP_ACTIVE)
+    set_changelist(NULL, NULLSTRING);
+
+  display_current_part(current_part);
+
+  set_error_ts(ERROR_PARTITION_SELECTED, part+1, 0);
+}
+
+
+/* ------------ */
+/*  D commands  */
+/* ------------ */
+static void parse_direct(void) {
+  buffer_t *buf;
+  uint8_t drive;
+  uint32_t sector;
+  DRESULT res;
+
+  /* This also guards against attempts to use the old Duplicate command. */
+  /* Its syntax is D1=0, so buffer[2] would never have a value that is   */
+  /* a valid secondary address.                                          */
+  buf = find_buffer(command_buffer[2]);
+  if (!buf) {
+    set_error(ERROR_NO_CHANNEL);
+    return;
+  }
+
+  if (buf->pvt.buffer.size > 1) {
+    uint8_t oldsec = buf->secondary;
+    buf->secondary = BUFFER_SEC_CHAIN - oldsec;
+    buf = buf->pvt.buffer.first;
+    buf->secondary = oldsec;
+  }
+
+  buf->position = 0;
+  buf->lastused = 255;
+
+  drive = command_buffer[3];
+  sector = *((uint32_t *)(command_buffer+4));
+
+  switch (command_buffer[1]) {
+  case 'I':
+    /* Get information */
+    memset(buf->data,0,256);
+    if (disk_getinfo(drive, command_buffer[4], buf->data) != RES_OK) {
+      set_error(ERROR_DRIVE_NOT_READY);
+      return;
+    }
+    break;
+
+  case 'R':
+    /* Read sector */
+    if (buf->pvt.buffer.size < 2) { // FIXME: Assumes 512-byte sectors
+      set_error(ERROR_BUFFER_TOO_SMALL);
+      return;
+    }
+    res = disk_read(drive, buf->data, sector, 1);
+    switch (res) {
+    case RES_OK:
+      return;
+
+    case RES_ERROR:
+      set_error(ERROR_READ_NOHEADER); // Any random READ ERROR
+      return;
+
+    case RES_PARERR:
+    case RES_NOTRDY:
+    default:
+      set_error_ts(ERROR_DRIVE_NOT_READY,res,0);
+      return;
+    }
+
+  case 'W':
+    /* Write sector */
+    if (buf->pvt.buffer.size < 2) { // FIXME: Assumes 512-byte sectors
+      set_error(ERROR_BUFFER_TOO_SMALL);
+      return;
+    }
+    res = disk_write(drive, buf->data, sector, 1);
+    switch(res) {
+    case RES_OK:
+      return;
+
+    case RES_WRPRT:
+      set_error(ERROR_WRITE_PROTECT);
+      return;
+
+    case RES_ERROR:
+      set_error(ERROR_WRITE_VERIFY);
+      return;
+
+    case RES_NOTRDY:
+    case RES_PARERR:
+    default:
+      set_error_ts(ERROR_DRIVE_NOT_READY,res,0);
+      return;
+    }
+
+  default:
+    set_error(ERROR_SYNTAX_UNABLE);
+    break;
+  }
+}
+
+
+/* -------------------------- */
+/*  G-P - Get Partition info  */
+/* -------------------------- */
+static void parse_getpartition(void) {
+  uint8_t *ptr;
+  uint8_t part;
+
+  if (command_length < 3) /* FIXME: should this set an error? */
+    return;
+
+  if (command_buffer[1] != '-' || command_buffer[2] != 'P') {
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    return;
+  }
+
+  if (command_length == 3 || command_buffer[3] == 0xff)
+    part = current_part + 1;
+  else
+    part = command_buffer[3];
+
+  buffers[ERRORBUFFER_IDX].position = 0;
+  buffers[ERRORBUFFER_IDX].lastused = 30;
+
+  memset(error_buffer,0,30);
+  error_buffer[30] = 13;
+  ptr = error_buffer;
+
+  if (part > max_part) {
+    /* Nonexisting partition - return empty answer */
+    ptr[30] = 13;
+    return;
+  }
+
+  if (part == 0) {
+    /* System partition - return static info */
+    memcpy_P(ptr, system_partition_info, sizeof(system_partition_info));
+    return;
+  }
+
+  part -= 1;
+
+  /* Create partition info */
+  if (partition[part].fop == &d64ops) {
+    /* Use type of mounted image as partition type */
+    *ptr++ = partition[part].imagetype & D64_TYPE_MASK;
+  } else {
+    /* Use native for anything else */
+    *ptr++ = 1;
+  }
+  *ptr++ = 0xe2; // 1.6MB disk - "reserved" for HD
+
+  *ptr++ = part+1;
+
+  /* Read partition label */
+  memset(ptr, 0xa0, 16);
+  if (disk_label(part, ops_scratch)) {
+    return;
+  }
+
+  uint8_t *inptr  = ops_scratch;
+  uint8_t *outptr = ptr;
+  while (*inptr)
+    *outptr++ = *inptr++;
+
+  ptr += 16;
+  *ptr++ = (partition[part].fatfs.fatbase >> 16) & 0xff;
+  *ptr++ = (partition[part].fatfs.fatbase >>  8) & 0xff;
+  *ptr++ = (partition[part].fatfs.fatbase      ) & 0xff;
+  ptr += 5; // reserved bytes
+
+  uint32_t size = (partition[part].fatfs.max_clust - 1) * partition[part].fatfs.csize;
+  *ptr++ = (size >> 16) & 0xff;
+  *ptr++ = (size >>  8) & 0xff;
+  *ptr   = size & 0xff;
+}
+
+
+/* ---------------- */
+/*  I - Initialize  */
+/* ---------------- */
+static void parse_initialize(void) {
+  if (disk_state != DISK_OK)
+    set_error_ts(ERROR_READ_NOSYNC,18,0);
+  else
+    free_multiple_buffers(FMB_USER_CLEAN);
+}
+
+
+/* ------------ */
+/*  M commands  */
+/* ------------ */
+
+/* --- M-E --- */
+static void handle_memexec(void) {
+  uint16_t address;
+
+  if (command_length < 5)
+    return;
+
+  address = command_buffer[3] + (command_buffer[4]<<8);
+  run_loader(address);
+}
+
+/* --- M-R --- */
+static void handle_memread(void) {
+  FRESULT res;
+  uint16_t address, check;
+  magic_value_t *p;
+
+  if (command_length < 6)
+    return;
+
+  address = command_buffer[3] + (command_buffer[4]<<8);
+
+  if (address >= 0x8000 && rom_filename[0] != 0) {
+    /* Try to use the rom file as data source - look in the current dir first */
+    partition[current_part].fatfs.curr_dir = partition[current_part].current_dir.fat;
+    res = f_open(&partition[current_part].fatfs, &romfile, rom_filename, FA_READ | FA_OPEN_EXISTING);
+
+    if (res != FR_OK) {
+      /* Not successful, try root dir */
+      partition[current_part].fatfs.curr_dir = 0;
+      res = f_open(&partition[current_part].fatfs, &romfile, rom_filename, FA_READ | FA_OPEN_EXISTING);
+
+      if (res != FR_OK) {
+        /* Not successful, try root of drive 0 */
+        partition[0].fatfs.curr_dir = 0;
+        res = f_open(&partition[0].fatfs, &romfile, rom_filename, FA_READ | FA_OPEN_EXISTING);
+
+        if (res != FR_OK)
+          /* No file available - use internal table */
+          goto use_internal;
+      }
+    }
+
+    /* One of the f_open calls was successful */
+    address -= 0x8000;
+    if (romfile.fsize < 32*1024U)
+      /* Allow 16K 1541 roms */
+      address &= 0x3fff;
+
+    if ((romfile.fsize & 0x3fff) != 0)
+      /* Skip header bytes */
+      address += romfile.fsize & 0x3fff;
+
+    res = f_lseek(&romfile, address);
+    if (res != FR_OK)
+      goto use_internal;
+
+    /* Clamp maximum read length to buffer size */
+    uint8_t bytes = command_buffer[5];
+    if (bytes > sizeof(error_buffer))
+      bytes = sizeof(error_buffer);
+
+    UINT bytesread;
+    res = f_read(&romfile, error_buffer, bytes, &bytesread);
+    if (res != FR_OK || bytesread != bytes)
+      goto use_internal;
+
+    /* Note: f_close isn't neccessary in FatFs for read-only files */
+
+  } else {
+  use_internal:
+    /* Check some special addresses used for drive detection. */
+    p = (magic_value_t*) c1541_magics;
+    while ( (check = pgm_read_word(&p->address)) ) {
+      if (check == address) {
+        error_buffer[0] = pgm_read_byte(p->val);
+        error_buffer[1] = pgm_read_byte(p->val + 1);
+        break;
+      }
+      p++;
+    }
+  }
+
+  /* possibly the host wants to read more bytes than error_buffer size */
+  /* we ignore this knowing that we return nonsense in this case       */
+  buffers[ERRORBUFFER_IDX].data     = error_buffer;
+  buffers[ERRORBUFFER_IDX].position = 0;
+  buffers[ERRORBUFFER_IDX].lastused = command_buffer[5]-1;
+}
+
+/* --- M-W --- */
+/* helper function for copying to capture buffer, needed twice */
+static void capture_fl_data(uint16_t address, uint8_t length) {
+  uint8_t dataofs = capture_address - address;
+  uint8_t bytes   = min(capture_remain, length - dataofs);
+
+  memcpy(capture_buffer->data + capture_offset,
+         command_buffer + 6 + dataofs,
+         bytes);
+
+  capture_offset  += bytes;
+  capture_address += bytes;
+  capture_remain  -= bytes;
+
+  /* everything done, clear pointer to disable */
+  if (capture_remain == 0)
+    capture_buffer = NULL;
+}
+
+
+static void handle_memwrite(void) {
+  uint16_t address;
+  uint8_t  i, length;
+
+  if (command_length < 6)
+    return;
+
+  address = command_buffer[3] + (command_buffer[4]<<8);
+  length  = command_buffer[5];
+
+  if (address == 119) {
+    /* Change device address, 1541 style */
+    device_address = command_buffer[6] & 0x1f;
+    display_address(device_address);
+    return;
+  }
+
+  if (address == 0x1c06 || address == 0x1c07 || address == 0x1802) {
+    /* Ignored addresses:                                          */
+    /* - VIA 2 timer (1c06, 1c07), determines IRQ frequency        */
+    /* - VIA 1 DDRB, written by N0SD0S to fix Action Replay issues */
+    return;
+  }
+
+  previous_loader = FL_NONE;
+
+  for (i=0;i<command_buffer[5];i++) {
+    datacrc = crc16_update(datacrc, command_buffer[i+6]);
+
+#ifdef CONFIG_LOADER_GIJOE
+    /* Identical code, but lots of different upload variations */
+    if (datacrc == 0x38a2 && command_buffer[i+6] == 0x60)
+      detected_loader = FL_GI_JOE;
+#endif
+  }
+
+  /* Figure out the fastloader based on the current CRC */
+  const struct fastloader_crc_s *crcptr = fl_crc_table;
+  uint8_t loader;
+
+  while ( (loader = pgm_read_byte(&crcptr->loadertype)) != FL_NONE ) {
+    if (datacrc == pgm_read_word(&crcptr->crc))
+      break;
+
+    crcptr++;
+  }
+
+  /* Set RX/TX function pointers */
+  if (loader != FL_NONE) {
+    detected_loader = loader;
+
+#ifdef CONFIG_HAVE_IEC
+    uint8_t index;
+
+    index = pgm_read_word(&crcptr->rxtx);
+
+    if (index != RXTX_NONE) {
+      fast_get_byte  = (fastloader_rx_t)pgm_read_word(&(fl_rxtx_table[index].rxfunc));
+      fast_send_byte = (fastloader_tx_t)pgm_read_word(&(fl_rxtx_table[index].txfunc));
+    }
+#endif
+  }
+
+  /* partially capture uploaded data */
+  if (capture_buffer != NULL)
+    capture_fl_data(address, length);
+
+  /* check for partial capture start in this block */
+  if (loader != FL_NONE && capture_buffer == NULL) {
+    const struct fastloader_capture_s *capptr = fl_capture_table;
+    uint8_t ltype;
+
+    do {
+      ltype = pgm_read_byte(&capptr->loadertype);
+      if (ltype == loader) {
+        capture_address = pgm_read_word(&capptr->startaddr);
+        capture_remain  = pgm_read_byte(&capptr->length) + 1;
+        capture_offset  = 0;
+
+        capture_buffer  = alloc_system_buffer();
+        if (!capture_buffer)
+          break;
+
+        stick_buffer(capture_buffer);
+        capture_buffer->secondary = pgm_read_byte(&capptr->buffer_id);
+
+        break;
+      }
+      capptr++;
+    } while (ltype != FL_NONE);
+
+    /* capture data from this block */
+    if (ltype != FL_NONE)
+      capture_fl_data(address, length);
+  }
+
+#ifdef CONFIG_CAPTURE_LOADERS
+  dump_command();
+#endif
+
+  if (detected_loader == FL_NONE) {
+    uart_puts_P(PSTR("M-W CRC result: "));
+    uart_puthex(datacrc >> 8);
+    uart_puthex(datacrc & 0xff);
+    uart_putcrlf();
+  }
+}
+
+/* --- M subparser --- */
+static void parse_memory(void) {
+  if (command_buffer[2] == 'W')
+    handle_memwrite();
+  else if (command_buffer[2] == 'E')
+    handle_memexec();
+  else if (command_buffer[2] == 'R')
+    handle_memread();
+  else
+    set_error(ERROR_SYNTAX_UNKNOWN);
+}
+
+/* --------- */
+/*  N - New  */
+/* --------- */
+static void parse_new(void) {
+  uint8_t *name, *id;
+  uint8_t part;
+
+  clean_cmdbuffer();
+
+  name = command_buffer+1;
+  part = parse_partition(&name);
+  name = ustrchr(command_buffer, ':');
+  if (name++ == NULL) {
+    set_error(ERROR_SYNTAX_NONAME);
+    return;
+  }
+
+  id = ustrchr(name, ',');
+  if (id != NULL) {
+    *id = 0;
+    id++;
+  }
+
+  format(part, name, id);
+}
+
+
+/* -------------- */
+/*  P - Position  */
+/* -------------- */
+static void parse_position(void) {
+  buffer_t *buf;
+
+  command_length = original_length;
+  clean_cmdbuffer();
+
+  if(command_length < 2 || (buf = find_buffer(command_buffer[1] & 0x0f)) == NULL) {
+    set_error(ERROR_NO_CHANNEL);
+    return;
+  }
+
+  if (buf->seek == NULL) {
+    set_error(ERROR_SYNTAX_UNABLE);
+    return;
+  }
+
+  if (buf->recordlen) {
+    /* REL file */
+    uint16_t record;
+    uint8_t  pos;
+    record = 1;
+    pos = 1;
+
+    if (command_length > 1)
+      record = command_buffer[2];
+    if (command_length > 2)
+      record |= command_buffer[3] << 8;
+    if (command_length > 3)
+      pos = command_buffer[4];
+
+    if (pos > buf->recordlen) {
+      set_error(ERROR_RECORD_OVERFLOW);
+      return;
+    }
+
+    if (record)
+      record--;
+
+    if (pos)
+      pos--;
+
+    buf->seek(buf, record * (uint32_t)buf->recordlen, pos);
+  } else {
+    /* Non-REL seek uses a straight little-endian offset */
+    union {
+      uint32_t l;
+      uint8_t  c[4];
+    } offset;
+
+    // smaller than memcpy
+    /* WARNING: Endian-dependant */
+    offset.c[0] = command_buffer[2];
+    offset.c[1] = command_buffer[3];
+    offset.c[2] = command_buffer[4];
+    offset.c[3] = command_buffer[5];
+
+    buf->seek(buf, offset.l, 0);
+  }
+}
+
+
+/* ------------ */
+/*  R - Rename  */
+/* ------------ */
+static void parse_rename(void) {
+  path_t oldpath,newpath;
+  uint8_t *oldname,*newname;
+  cbmdirent_t dent;
+  int8_t res;
+
+  clean_cmdbuffer();
+
+  /* Find the boundary between the names */
+  oldname = ustrchr(command_buffer,'=');
+  if (oldname == NULL) {
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    return;
+  }
+  *oldname++ = 0;
+
+  /* Parse both names */
+  if (parse_path(command_buffer+1, &newpath, &newname, 0))
+    return;
+
+  if (parse_path(oldname, &oldpath, &oldname, 0))
+    return;
+
+  /* Rename can't move files across directories */
+  if (memcmp(&oldpath.dir, &newpath.dir, sizeof(newpath.dir))) {
+    set_error(ERROR_FILE_NOT_FOUND);
+    return;
+  }
+
+  /* Check for invalid characters in the new name */
+  if (check_invalid_name(newname)) {
+    /* This isn't correct for all cases, but for most. */
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    return;
+  }
+
+  /* Don't allow an empty new name */
+  /* The 1541 renames the file to "=" in this case, but I consider that a bug. */
+  if (ustrlen(newname) == 0) {
+    set_error(ERROR_SYNTAX_NONAME);
+    return;
+  }
+
+  /* Check if the new name already exists */
+  res = first_match(&newpath, newname, FLAG_HIDDEN, &dent);
+  if (res == 0) {
+    set_error(ERROR_FILE_EXISTS);
+    return;
+  }
+
+  if (res > 0)
+    /* first_match generated an error other than File Not Found, abort */
+    return;
+
+  /* Clear the FNF */
+  set_error(ERROR_OK);
+
+  /* Check if the old name exists */
+  if (first_match(&oldpath, oldname, FLAG_HIDDEN, &dent))
+    return;
+
+  rename(&oldpath, &dent, newname);
+}
+
+
+/* ------------- */
+/*  S - Scratch  */
+/* ------------- */
+static void parse_scratch(void) {
+  cbmdirent_t dent;
+  int8_t  res;
+  uint8_t count,cnt;
+  uint8_t *filename,*tmp,*name;
+  path_t  path;
+
+  clean_cmdbuffer();
+
+  filename = ustr1tok(command_buffer+1,',',&tmp);
+
+  set_dirty_led(1);
+  count = 0;
+  /* Loop over all file names */
+  while (filename != NULL) {
+    parse_path(filename, &path, &name, 0);
+
+    if (opendir(&matchdh, &path))
+      return;
+
+    while (1) {
+      res = next_match(&matchdh, name, NULL, NULL, FLAG_HIDDEN, &dent);
+      if (res < 0)
+        break;
+      if (res > 0)
+        return;
+
+      /* Skip directories */
+      if ((dent.typeflags & TYPE_MASK) == TYPE_DIR)
+        continue;
+      cnt = file_delete(&path, &dent);
+      if (cnt != 255)
+        count += cnt;
+      else
+        return;
+    }
+
+    filename = ustr1tok(NULL,',',&tmp);
+  }
+
+  set_error_ts(ERROR_SCRATCHED,count,0);
+}
+
+
+#ifdef HAVE_RTC
+/* ------------------ */
+/*  T - Time commands */
+/* ------------------ */
+
+/* --- T-R --- */
+static void parse_timeread(void) {
+  struct tm time;
+  uint8_t *ptr = error_buffer;
+  uint8_t hour;
+
+  if (rtc_state != RTC_OK) {
+    set_error(ERROR_SYNTAX_UNABLE);
+    return;
+  }
+
+  read_rtc(&time);
+  hour = time.tm_hour % 12;
+  if (hour == 0) hour = 12;
+
+  switch (command_buffer[3]) {
+  case 'A': /* ASCII format */
+    buffers[ERRORBUFFER_IDX].lastused = 25;
+    memcpy_P(error_buffer+4, asciitime_skel, sizeof(asciitime_skel));
+    memcpy_P(error_buffer, downames + 4*time.tm_wday, 4);
+    appendnumber(error_buffer+5, time.tm_mon+1);
+    appendnumber(error_buffer+8, time.tm_mday);
+    appendnumber(error_buffer+11, time.tm_year % 100);
+    appendnumber(error_buffer+14, hour);
+    appendnumber(error_buffer+17, time.tm_min);
+    appendnumber(error_buffer+20, time.tm_sec);
+    if (time.tm_hour < 12)
+      error_buffer[23] = 'A';
+    else
+      error_buffer[23] = 'P';
+    break;
+
+  case 'B': /* BCD format */
+    buffers[ERRORBUFFER_IDX].lastused = 8;
+    *ptr++ = time.tm_wday;
+    *ptr++ = int2bcd(time.tm_year % 100);
+    *ptr++ = int2bcd(time.tm_mon+1);
+    *ptr++ = int2bcd(time.tm_mday);
+    *ptr++ = int2bcd(hour);
+    *ptr++ = int2bcd(time.tm_min);
+    *ptr++ = int2bcd(time.tm_sec);
+    *ptr++ = (time.tm_hour >= 12);
+    *ptr   = 13;
+    break;
+
+  case 'D': /* Decimal format */
+    buffers[ERRORBUFFER_IDX].lastused = 8;
+    *ptr++ = time.tm_wday;
+    *ptr++ = time.tm_year;
+    *ptr++ = time.tm_mon+1;
+    *ptr++ = time.tm_mday;
+    *ptr++ = hour;
+    *ptr++ = time.tm_min;
+    *ptr++ = time.tm_sec;
+    *ptr++ = (time.tm_hour >= 12);
+    *ptr   = 13;
+    break;
+
+  case 'I': /* ISO 8601 format plus DOW */
+    buffers[ERRORBUFFER_IDX].lastused = 23;
+    ptr = appendnumber(ptr, 19 + (time.tm_year / 100));
+    ptr = appendnumber(ptr, time.tm_year % 100);
+    *ptr++ = '-';
+    ptr = appendnumber(ptr, time.tm_mon + 1);
+    *ptr++ = '-';
+    ptr = appendnumber(ptr, time.tm_mday);
+    *ptr++ = 'T';
+    ptr = appendnumber(ptr, time.tm_hour);
+    *ptr++ = ':';
+    ptr = appendnumber(ptr, time.tm_min);
+    *ptr++ = ':';
+    ptr = appendnumber(ptr, time.tm_sec);
+    *ptr   = ' ';
+    memcpy_P(error_buffer + 20, downames + 4*time.tm_wday, 3);
+    error_buffer[23] = 13;
+    break;
+
+  default: /* Unknown format */
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    break;
+  }
+}
+
+/* --- T-W --- */
+static void parse_timewrite(void) {
+
+  /* day of week calculation by M. Keith and T. Craver via */
+  /* https://en.wikipedia.org/wiki/Determination_of_the_day_of_the_week */
+  uint8_t day_of_week(uint16_t y, uint8_t m, uint8_t d) {
+    y += 1900;
+    return (d+=m<3?y--:y-2,23*m/9+d+4+y/4-y/100+y/400)%7;
+  }
+
+  struct tm time;
+  uint8_t i, *ptr;
+
+  switch (command_buffer[3]) {
+  case 'A': /* ASCII format */
+    if (command_length < 27) { // Allow dropping the AM/PM marker for 24h format
+      set_error(ERROR_SYNTAX_UNABLE);
+      return;
+    }
+    for (i=0;i<7;i++) {
+      if (memcmp_P(command_buffer+4, downames + 4*i, 2) == 0) // only need to compare 2
+        break;
+    }
+    if (i == 7) {
+      set_error(ERROR_SYNTAX_UNABLE);
+      return;
+    }
+    time.tm_wday = i;
+    ptr = command_buffer + 9;
+    time.tm_mon  = parse_number(&ptr);
+    ptr++;
+    time.tm_mday = parse_number(&ptr);
+    ptr++;
+    time.tm_year = parse_number(&ptr);
+    ptr++;
+    time.tm_hour = parse_number(&ptr);
+    ptr++;
+    time.tm_min  = parse_number(&ptr);
+    ptr++;
+    time.tm_sec  = parse_number(&ptr);
+    if (command_buffer[28] == 'M') {
+      /* Adjust for AM/PM only if AM/PM is actually supplied */
+      if (time.tm_hour == 12)
+        time.tm_hour = 0;
+      if (command_buffer[27] == 'P')
+        time.tm_hour += 12;
+    }
+    break;
+
+  case 'B': /* BCD format */
+    if (command_length < 12) {
+      set_error(ERROR_SYNTAX_UNABLE);
+      return;
+    }
+    time.tm_wday = command_buffer[4];
+    time.tm_year = bcd2int(command_buffer[5]);
+    time.tm_mon  = bcd2int(command_buffer[6]);
+    time.tm_mday = bcd2int(command_buffer[7]);
+    time.tm_hour = bcd2int(command_buffer[8]);
+    /* Hour range is 1-12, change 12:xx to 0:xx for easier conversion */
+    if (time.tm_hour == 12)
+      time.tm_hour = 0;
+    time.tm_min  = bcd2int(command_buffer[9]);
+    time.tm_sec  = bcd2int(command_buffer[10]);
+    if (command_buffer[11])
+      time.tm_hour += 12;
+    break;
+
+  case 'D': /* Decimal format */
+    if (command_length < 12) {
+      set_error(ERROR_SYNTAX_UNABLE);
+      return;
+    }
+    time.tm_wday = command_buffer[4];
+    time.tm_year = command_buffer[5];
+    time.tm_mon  = command_buffer[6];
+    time.tm_mday = command_buffer[7];
+    time.tm_hour = command_buffer[8];
+    /* Hour range is 1-12, change 12:xx to 0:xx for easier conversion */
+    if (time.tm_hour == 12)
+      time.tm_hour = 0;
+    time.tm_min  = command_buffer[9];
+    time.tm_sec  = command_buffer[10];
+    if (command_buffer[11])
+      time.tm_hour += 12;
+    break;
+
+  case 'I': /* ISO 8601 format, calculated day of week */
+    if (command_length < 23) {
+      set_error(ERROR_SYNTAX_UNABLE);
+      return;
+    }
+
+    ptr = command_buffer + 4;
+    time.tm_year = parse_number(&ptr) - 1900;
+    ptr++;
+    time.tm_mon  = parse_number(&ptr);
+    ptr++;
+    time.tm_mday = parse_number(&ptr);
+    ptr++;
+    time.tm_hour = parse_number(&ptr);
+    ptr++;
+    time.tm_min  = parse_number(&ptr);
+    ptr++;
+    time.tm_sec  = parse_number(&ptr);
+    time.tm_wday = day_of_week(time.tm_year, time.tm_mon, time.tm_mday);
+    break;
+
+  default: /* Unknown format */
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    return;
+  }
+
+  /* final adjustment of month to 0-11 range */
+  time.tm_mon--;
+
+  /* Y2K fix for legacy apps */
+  if (time.tm_year < 80)
+    time.tm_year += 100;
+
+  /* The CMD drives don't check for validity, we do - partially */
+  if (time.tm_mday ==  0 || time.tm_mday >  31 ||
+      time.tm_mon  >  11 ||
+      time.tm_wday >   6 ||
+      time.tm_hour >  23 ||
+      time.tm_min  >  59 ||
+      time.tm_sec  >  59) {
+    set_error(ERROR_SYNTAX_UNABLE);
+    return;
+  }
+
+  set_rtc(&time);
+}
+
+/* --- T subparser --- */
+static void parse_time(void) {
+  if (rtc_state == RTC_NOT_FOUND)
+    set_error(ERROR_SYNTAX_UNKNOWN);
+  else {
+    if (command_buffer[2] == 'R') {
+      parse_timeread();
+    } else if (command_buffer[2] == 'W') {
+      parse_timewrite();
+    } else
+      set_error(ERROR_SYNTAX_UNKNOWN);
+  }
+}
+#endif /* HAVE_RTC */
+
+
+/* ------------ */
+/*  U commands  */
+/* ------------ */
+static void parse_user(void) {
+  switch (command_buffer[1]) {
+  case 'A':
+  case '1':
+    /* Tiny little hack: Rewrite as (B)-R and call that                */
+    /* This will always work because there is either a : in the string */
+    /* or the drive will start parsing at buf[3].                      */
+    command_buffer[0] = '-';
+    command_buffer[1] = 'R';
+    parse_block();
+    break;
+
+  case 'B':
+  case '2':
+    /* Tiny little hack: see above case for rationale */
+    command_buffer[0] = '-';
+    command_buffer[1] = 'W';
+    parse_block();
+    break;
+
+  case 'C': case 'D': case 'E': case 'F': case 'G': case 'H':
+  case '3': case '4': case '5': case '6': case '7': case '8':
+    /* start program in buffer */
+    run_loader(0x500 + 3 * (command_buffer[1] - '3'));
+    break;
+
+  case 'I':
+  case '9':
+    if (command_length == 2) {
+      /* Soft-reset - just return the dos version */
+      set_error(ERROR_DOSVERSION);
+      return;
+    }
+    switch (command_buffer[2]) {
+    case '+':
+      globalflags &= (uint8_t)~VC20MODE;
+      break;
+
+    case '-':
+      globalflags |= VC20MODE;
+      break;
+
+    default:
+      /* Soft-reset - just return the dos version */
+      set_error(ERROR_DOSVERSION);
+      break;
+    }
+    break;
+
+  case 'J':
+  case ':':
+    /* Reset - technically hard-reset */
+    /* Faked because Ultima 5 sends UJ. */
+    free_multiple_buffers(FMB_USER);
+    set_error(ERROR_DOSVERSION);
+    break;
+
+  case 202: /* Shift-J */
+    /* The real hard reset command */
+    system_reset();
+    break;
+
+  case '0':
+    /* U0 - only device address changes for now */
+    if ((command_buffer[2] & 0x1f) == 0x1e &&
+        command_buffer[3] >= 4 &&
+        command_buffer[3] <= 30) {
+      device_address = command_buffer[3];
+      display_address(device_address);
+      break;
+    }
+    /* Fall through */
+
+  default:
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    break;
+  }
+}
+
+
+/* ------------ */
+/*  X commands  */
+/* ------------ */
+static void parse_xcommand(void) {
+  uint8_t num;
+  uint8_t *str;
+  path_t path;
+
+  clean_cmdbuffer();
+
+  switch (command_buffer[1]) {
+  case 'E':
+    /* Change file extension mode */
+    str = command_buffer+2;
+    if (*str == '+') {
+      globalflags |= EXTENSION_HIDING;
+    } else if (*str == '-') {
+      globalflags &= (uint8_t)~EXTENSION_HIDING;
+    } else {
+      num = parse_number(&str);
+      if (num > 4) {
+        set_error(ERROR_SYNTAX_UNKNOWN);
+      } else {
+        file_extension_mode = num;
+        if (num >= 3)
+          globalflags |= EXTENSION_HIDING;
+      }
+    }
+    set_error_ts(ERROR_STATUS,device_address,0);
+    break;
+
+  case 'D':
+    /* drive config */
+#ifdef NEED_DISKMUX
+    str = command_buffer+2;
+    if(*str == '?') {
+      set_error_ts(ERROR_STATUS,device_address,1);
+      break;
+    }
+    num = parse_number(&str);
+    if(num < 8) {
+      while(*str == ' ')
+        str++;
+      if(*str == '=') {
+        uint8_t val, i;
+        str++;
+        val = parse_number(&str);
+        if(val <= 0x0f) {
+          for(i = 0;(val != 0x0f) && i < 8; i++) {
+            if(i != num && map_drive(num) == val) {
+              /* Trying to set the same drive mapping in two places. */
+              set_error(ERROR_SYNTAX_UNKNOWN);
+              break;
+            }
+          }
+          switch(val >> DRIVE_BITS) {
+          case DISK_TYPE_NONE:
+# ifdef HAVE_SD
+          case DISK_TYPE_SD:
+# endif
+# ifdef HAVE_ATA
+          case DISK_TYPE_ATA:
+# endif
+            if(map_drive(num) != val) {
+              set_map_drive(num,val);
+              /* sanity check.  If the user has truly turned off all drives, turn the
+               * defaults back on
+               */
+              if(drive_config == 0xffffffff)
+                set_drive_config(get_default_driveconfig());
+              filesystem_init(0);
+            }
+            break;
+          default:
+            set_error(ERROR_SYNTAX_UNKNOWN);
+            break;
+          }
+          break;
+        }
+      }
+    } else
+      set_error(ERROR_SYNTAX_UNKNOWN);
+#else
+    // return error for units without MUX support
+    set_error(ERROR_SYNTAX_UNKNOWN);
+#endif
+    break;
+
+  case 'I':
+    /* image-as-directory mode */
+    str = command_buffer + 2;
+    num = parse_number(&str);
+    if (num <= 2) {
+      image_as_dir = num;
+    } else {
+      set_error(ERROR_SYNTAX_UNKNOWN);
+    }
+    break;
+
+  case 'W':
+    /* Write configuration */
+    write_configuration();
+    set_error_ts(ERROR_STATUS,device_address,0);
+    break;
+
+  case 'R':
+    /* Set Rom-file */
+    if (command_buffer[2] == ':') {
+      if (command_length > ROM_NAME_LENGTH+3) {
+        set_error(ERROR_SYNTAX_TOOLONG);
+      } else {
+        ustrcpy(rom_filename, command_buffer+3);
+      }
+    } else {
+      /* Clear rom name */
+      rom_filename[0] = 0;
+    }
+    break;
+
+  case 'S':
+    /* Swaplist */
+    if (parse_path(command_buffer+2, &path, &str, 0))
+      return;
+
+    set_changelist(&path, str);
+    break;
+
+  case '*':
+    /* Post-* matching */
+    num = parse_bool();
+    if (num != 255) {
+      if (num)
+        globalflags |= POSTMATCH;
+      else
+        globalflags &= (uint8_t)~POSTMATCH;
+
+      set_error_ts(ERROR_STATUS,device_address,0);
+    }
+    break;
+
+#ifdef CONFIG_STACK_TRACKING
+  case '?':
+    /* Output the largest stack size seen */
+    //FIXME: AVR-only code
+    set_error_ts(ERROR_LONGVERSION,(RAMEND-minstack)>>8,(RAMEND-minstack)&0xff);
+    break;
+#else
+  case '?':
+    /* Output the long version string */
+    set_error(ERROR_LONGVERSION);
+    break;
+#endif
+
+#ifdef CONFIG_PARALLEL_DOLPHIN
+  case 'Q': // fast load
+    load_dolphin();
+    break;
+
+  case 'Z': // fast save
+    save_dolphin();
+    break;
+#endif
+
+  default:
+    if (command_length != 1)
+      /* unknown command */
+      set_error(ERROR_SYNTAX_UNKNOWN);
+    else
+      /* plain X by itself, show the extended status */
+      set_error_ts(ERROR_STATUS, device_address, 0);
+
+    break;
+  }
+}
+
+
+/* ------------------------------------------------------------------------- */
+/*  Main command parser function                                             */
+/* ------------------------------------------------------------------------- */
+
+void parse_doscommand(void) {
+  /* Set default message: Everything ok */
+  set_error(ERROR_OK);
+
+  /* Abort if the command is too long */
+  if (command_length == CONFIG_COMMAND_BUFFER_SIZE) {
+    set_error(ERROR_SYNTAX_TOOLONG);
+    return;
+  }
+
+#ifdef CONFIG_COMMAND_CHANNEL_DUMP
+  /* Debugging aid: Dump the whole command via serial */
+  if (detected_loader == FL_NONE) {
+    /* Dump only if no loader was detected because it may ruin the timing */
+    uart_trace(command_buffer,0,command_length);
+  }
+#endif
+
+  /* Remove one CR at end of command */
+  original_length = command_length;
+  if (command_length > 0 && command_buffer[command_length-1] == 0x0d)
+    command_length--;
+
+  /* Abort if there is no command */
+  if (command_length == 0) {
+    set_error(ERROR_SYNTAX_UNABLE);
+    return;
+  }
+
+  /* Send command to display */
+  display_doscommand(command_length, command_buffer);
+
+  /* MD/CD/RD clash with other commands, so they're checked first */
+  if (command_buffer[0] != 'X' && command_buffer[1] == 'D') {
+    parse_dircommand();
+    return;
+  }
+
+  switch (command_buffer[0]) {
+  case 'B':
+    /* Block-Something */
+    parse_block();
+    break;
+
+  case 'C':
+    /* Copy or Change Partition */
+    if (command_buffer[1] == 'P' || command_buffer[1] == 0xd0)
+      parse_changepart();
+    else
+      /* Copy a file */
+      parse_copy();
+    break;
+
+  case 'D':
+    /* Direct sector access (was duplicate in CBM drives) */
+    parse_direct();
+    break;
+
+  case 'G':
+    /* Get-Partition */
+    parse_getpartition();
+    break;
+
+  case 'I':
+    /* Initialize */
+    parse_initialize();
+    break;
+
+  case 'M':
+    /* Memory-something */
+    parse_memory();
+    break;
+
+  case 'N':
+    /* New */
+    parse_new();
+    break;
+
+  case 'P':
+    /* Position */
+    parse_position();
+    break;
+
+  case 'R':
+    /* Rename */
+    parse_rename();
+    break;
+
+  case 'S':
+    if(command_length == 3 && command_buffer[1] == '-') {
+      /* Swap drive number */
+      set_error(ERROR_SYNTAX_UNABLE);
+      break;
+    }
+    /* Scratch */
+    parse_scratch();
+    break;
+
+#ifdef HAVE_RTC
+  case 'T':
+    parse_time();
+    break;
+#endif
+
+  case 'U':
+    parse_user();
+    break;
+
+  case 'X':
+    parse_xcommand();
+    break;
+
+  default:
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    break;
+  }
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/doscmd.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/doscmd.h
new file mode 100644
index 00000000..07cf5468
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/doscmd.h
@@ -0,0 +1,39 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   doscmd.h: Definitions for the command channel parser
+
+*/
+
+#ifndef DOSCMD_H
+#define DOSCMD_H
+
+extern uint8_t command_buffer[CONFIG_COMMAND_BUFFER_SIZE+2];
+extern uint8_t command_length;
+extern date_t date_match_start;
+extern date_t date_match_end;
+
+extern uint16_t datacrc;
+
+void parse_doscommand(void);
+void do_chdir(uint8_t *parsestr);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ds1307-3231.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ds1307-3231.c
new file mode 100644
index 00000000..9abb41a1
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ds1307-3231.c
@@ -0,0 +1,168 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   ds1307-3231.c: RTC support for DS1307/DS3231 chips
+
+   The exported functions in this file are weak-aliased to their corresponding
+   versions defined in rtc.h so when this file is the only RTC implementation
+   compiled in they will be automatically used by the linker.
+
+*/
+
+#include <stdint.h>
+#include <string.h>
+#include "config.h"
+#include "i2c.h"
+#include "progmem.h"
+#include "uart.h"
+#include "ustring.h"
+#include "utils.h"
+#include "time.h"
+#include "rtc.h"
+#include "ds1307-3231.h"
+
+#if defined(CONFIG_RTC_DS3231) && defined(CONFIG_RTC_DS1307)
+#  error "Cannot use both CONFIG_RTC_DS3231 and CONFIG_RTC_DS1307 at the same time!"
+#endif
+
+#define RTC_ADDR 0xd0
+
+#define REG_SECOND      0
+#define REG_MINUTE      1
+#define REG_HOUR        2
+#define REG_DOW         3
+#define REG_DOM         4
+#define REG_MONTH       5
+#define REG_YEAR        6
+
+#ifdef CONFIG_RTC_DS3231
+#  define REG_AL1_SECOND  7
+#  define REG_AL1_MINUTE  8
+#  define REG_AL1_HOUR    9
+#  define REG_AL1_DAY    10
+#  define REG_AL2_MINUTE 11
+#  define REG_AL2_HOUR   12
+#  define REG_AL2_DAY    13
+#  define REG_CONTROL    14
+#  define REG_CTLSTATUS  15
+#  define REG_AGING      16
+#  define REG_TEMP_MSB   17
+#  define REG_TEMP_LSB   18
+#else
+#  define REG_CONTROL    7
+#endif
+
+#define STATUS_OSF     0x80  // oscillator stopped (1307: CH bit in reg 0)
+
+/* Read the current time from the RTC */
+void dsrtc_read(struct tm *time) {
+  uint8_t tmp[7];
+
+  /* Set to default value in case we abort */
+  memcpy_P(time, &rtc_default_date, sizeof(struct tm));
+  if (rtc_state != RTC_OK)
+    return;
+
+  if (i2c_read_registers(RTC_ADDR, REG_SECOND, 7, &tmp))
+    return;
+
+  time->tm_sec  = bcd2int(tmp[REG_SECOND] & 0x7f);
+  time->tm_min  = bcd2int(tmp[REG_MINUTE]);
+  time->tm_hour = bcd2int(tmp[REG_HOUR]);
+  time->tm_mday = bcd2int(tmp[REG_DOM]);
+  time->tm_mon  = bcd2int(tmp[REG_MONTH] & 0x7f) - 1;
+  time->tm_wday = bcd2int(tmp[REG_DOW]) - 1;
+  time->tm_year = bcd2int(tmp[REG_YEAR]) + 100 * !!(tmp[REG_MONTH] & 0x80) + 100;
+  // FIXME: Leap year calculation is wrong in 2100
+}
+void read_rtc(struct tm *time) __attribute__ ((weak, alias("dsrtc_read")));
+
+/* Set the time in the RTC */
+void dsrtc_set(struct tm *time) {
+  uint8_t tmp[7];
+
+  if (rtc_state == RTC_NOT_FOUND)
+    return;
+
+  tmp[REG_SECOND] = int2bcd(time->tm_sec);
+  tmp[REG_MINUTE] = int2bcd(time->tm_min);
+  tmp[REG_HOUR]   = int2bcd(time->tm_hour);
+  tmp[REG_DOW]    = int2bcd(time->tm_wday+1);
+  tmp[REG_DOM]    = int2bcd(time->tm_mday);
+  tmp[REG_MONTH]  = int2bcd(time->tm_mon+1) | 0x80 * (time->tm_year >= 2100);
+  tmp[REG_YEAR]   = int2bcd(time->tm_year % 100);
+  i2c_write_registers(RTC_ADDR, REG_SECOND, 7, tmp);
+  i2c_write_register(RTC_ADDR, REG_CONTROL, 0);   // 3231: enable oscillator on battery, interrupts off
+                                                  // 1307: disable SQW output
+#ifdef CONFIG_RTC_DS3231
+  i2c_write_register(RTC_ADDR, REG_CTLSTATUS, 0); // clear "oscillator stopped" flag
+#endif
+  rtc_state = RTC_OK;
+}
+void set_rtc(struct tm *time) __attribute__ ((weak, alias("dsrtc_set")));
+
+#ifdef CONFIG_RTC_DS3231
+/* DS3231 version, checks oscillator stop flag in status register */
+void dsrtc_init(void) {
+  int16_t tmp;
+
+  rtc_state = RTC_NOT_FOUND;
+
+  uart_puts_P(PSTR("DS3231 "));
+  tmp = i2c_read_register(RTC_ADDR, REG_CTLSTATUS);
+  if (tmp < 0) {
+    uart_puts_P(PSTR("not found"));
+  } else {
+    if (tmp & STATUS_OSF) {
+      rtc_state = RTC_INVALID;
+      uart_puts_P(PSTR("invalid"));
+    } else {
+      rtc_state = RTC_OK;
+      uart_puts_P(PSTR("ok"));
+    }
+  }
+  uart_putcrlf();
+}
+void rtc_init(void) __attribute__ ((weak, alias("dsrtc_init")));
+
+#else
+/* DS1307 version, checks clock halt bit in seconds register */
+void dsrtc_init(void) {
+  int16_t tmp;
+
+  rtc_state = RTC_NOT_FOUND;
+  uart_puts_P(PSTR("DS1307 "));
+  tmp = i2c_read_register(RTC_ADDR, REG_SECOND);
+  if (tmp < 0) {
+    uart_puts_P(PSTR("not found"));
+  } else {
+    if (tmp & STATUS_OSF) {
+      rtc_state = RTC_INVALID;
+      uart_puts_P(PSTR("invalid"));
+    } else {
+      rtc_state = RTC_OK;
+      uart_puts_P(PSTR("ok"));
+    }
+  }
+  uart_putcrlf();
+}
+void rtc_init(void) __attribute__ ((weak, alias("dsrtc_init")));
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ds1307-3231.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ds1307-3231.h
new file mode 100644
index 00000000..c194e4e9
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ds1307-3231.h
@@ -0,0 +1,35 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   ds1307-3231.h: RTC support for DS1307/DS3231 chips
+
+*/
+
+#ifndef DS1307_3231_H
+#define DS1307_3231_H
+
+#include "time.h"
+
+void dsrtc_init(void);
+void dsrtc_read(struct tm *time);
+void dsrtc_set(struct tm *time);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/eefs-ops.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/eefs-ops.c
new file mode 100644
index 00000000..65b0706b
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/eefs-ops.c
@@ -0,0 +1,397 @@
+#pragma GCC diagnostic warning "-Wunused-function"
+
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   eefs-ops.c: eepromfs operations
+
+*/
+
+#include <stdbool.h>
+#include <string.h>
+#include "config.h"
+#include "eeprom-fs.h"
+#include "errormsg.h"
+#include "fatops.h"
+#include "led.h"
+#include "parser.h"
+#include "ustring.h"
+#include "eefs-ops.h"
+
+/* ------------------------------------------------------------------------- */
+/*  data structures, constants, global variables                             */
+/* ------------------------------------------------------------------------- */
+
+//                                           1234567890123456
+static const PROGMEM uint8_t disk_label[] = "EEPROMFS        ";
+static const PROGMEM uint8_t disk_id[]    = "EE 2A";
+
+uint8_t eefs_partition;
+
+/* ------------------------------------------------------------------------- */
+/*  Utility functions                                                        */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * repad_filename - change file name to 0xa0-padded format
+ * @name: pointer to file name
+ *
+ * This function changes the file name at @name from a C string
+ * to a 0xa0-padded file name.
+ */
+static void repad_filename(uint8_t *name) {
+  uint8_t len = ustrlen(name);
+
+  memset(name + len, 0xa0, CBM_NAME_LENGTH - len);
+}
+
+/**
+ * terminate_filename - change 0xa0-padded file name to C string
+ * @name: pointer to file name
+ *
+ * This function changes the file name at @name from 0xa0-padded format
+ * to a C string.
+ */
+static void terminate_filename(uint8_t *name) {
+  for (uint8_t i = 0; i < CBM_NAME_LENGTH; i++) {
+    if (name[i] == 0xa0)
+      name[i] = 0;
+  }
+}
+
+/**
+ * translate_error - translate an EEFS error code into a Commodore error message
+ * @res: EEFS error code to be translated
+ *
+ * This function sets the error channel according to the problem given in
+ * @res.
+ */
+static void translate_error(eefs_error_t res) {
+  switch (res) {
+  case EEFS_ERROR_OK:
+    set_error(ERROR_OK);
+    break;
+
+  case EEFS_ERROR_FILENOTFOUND:
+    set_error(ERROR_FILE_NOT_FOUND);
+    break;
+
+  case EEFS_ERROR_FILEEXISTS:
+    set_error(ERROR_FILE_EXISTS);
+    break;
+
+  case EEFS_ERROR_DIRFULL:
+  case EEFS_ERROR_DISKFULL:
+    set_error_ts(ERROR_DISK_FULL, res, 0);
+    break;
+
+  case EEFS_ERROR_INVALID:
+    set_error(ERROR_SYNTAX_UNABLE);
+    break;
+
+  case EEFS_ERROR_UNIMPLEMENTED:
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    break;
+
+  default:
+    set_error_ts(ERROR_SYNTAX_UNABLE, res, 99);
+    break;
+  }
+}
+
+/**
+ * eefs_refill_read - refill-callback for reading
+ * @buf: target buffer
+ *
+ * This is the refill-callback function for files opened for reading.
+ */
+static uint8_t eefs_refill_read(buffer_t *buf) {
+  eefs_error_t res;
+  uint16_t bytes_read;
+
+  res = eepromfs_read(&buf->pvt.eefh, buf->data + 2, 254, &bytes_read);
+  if (res != EEFS_ERROR_OK) {
+    translate_error(res);
+    free_buffer(buf);
+    return 1;
+  }
+
+  buf->position = 2;
+  buf->lastused = bytes_read + 1;
+
+  /* check if the last byte of file is in the buffer */
+  if (bytes_read < 254 ||
+      buf->pvt.eefh.cur_offset == buf->pvt.eefh.size) {
+    buf->sendeoi = 1;
+  } else {
+    buf->sendeoi = 0;
+  }
+
+  return 0;
+}
+
+/**
+ * eefs_refill_write - refill-callback for writing
+ * @buf: target buffer
+ *
+ * This is the refill-callback function for files opened for writing.
+ */
+static uint8_t eefs_refill_write(buffer_t *buf) {
+  eefs_error_t res;
+  uint16_t byteswritten;
+
+  /* fix up lastused for incomplete blocks */
+  if (!buf->mustflush)
+    buf->lastused = buf->position - 1;
+
+  res = eepromfs_write(&buf->pvt.eefh, buf->data + 2, buf->lastused - 1, &byteswritten);
+  if (res != EEFS_ERROR_OK) { // eepromfs never returns OK if the write was incomplete
+    translate_error(res);
+    eepromfs_close(&buf->pvt.eefh);
+    free_buffer(buf);
+    return 1;
+  }
+
+  mark_buffer_clean(buf);
+  buf->mustflush = 0;
+  buf->position  = 2;
+  buf->lastused  = 2;
+
+  return 0;
+}
+
+// note: no cleanup-callback for reading
+
+/**
+ * eefs_cleanup_write - cleanup-callback for writing
+ * @buf: target buffer
+ *
+ * This is the cleanup-callback function for files opened for writing.
+ */
+static uint8_t eefs_cleanup_write(buffer_t *buf) {
+  if (!buf->allocated)
+    return 0;
+
+  /* write remaining data */
+  if (buf->refill(buf))
+    return 1;
+
+  eepromfs_close(&buf->pvt.eefh);
+  buf->cleanup = callback_dummy;
+  return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+/*  fileops-API                                                              */
+/* ------------------------------------------------------------------------- */
+
+void eefsops_init(void) {
+  eefs_partition = 255;
+
+  /* do not add if all partitions are already in use */
+  if (max_part >= CONFIG_MAX_PARTITIONS)
+    return;
+
+  eefs_partition = max_part;
+  partition[eefs_partition].fop = &eefs_ops;
+  max_part++;
+
+  eepromfs_init();
+}
+
+static void eefs_open_read(path_t *path, cbmdirent_t *dent, buffer_t *buf) {
+  eefs_error_t res;
+
+  repad_filename(dent->name);
+
+  res = eepromfs_open(dent->name, &buf->pvt.eefh, EEFS_MODE_READ);
+  translate_error(res);
+
+  if (res != EEFS_ERROR_OK)
+    return;
+
+  /* set up the buffer */
+  buf->read   = 1;
+  buf->refill = eefs_refill_read;
+  // no cleanup/close function needed for read-only files
+  stick_buffer(buf);
+
+  buf->refill(buf);
+}
+
+static void eefs_open_write(path_t *path, cbmdirent_t *dent, uint8_t type,
+                            buffer_t *buf, uint8_t append) {
+  eefs_error_t res;
+
+  repad_filename(dent->name);
+
+  if (append) {
+    res = eepromfs_open(dent->name, &buf->pvt.eefh, EEFS_MODE_APPEND);
+  } else {
+    res = eepromfs_open(dent->name, &buf->pvt.eefh, EEFS_MODE_WRITE);
+  }
+  translate_error(res);
+
+  if (res != EEFS_ERROR_OK)
+    return;
+
+  /* set up buffer fields for writing */
+  mark_write_buffer(buf);
+  buf->position = 2;
+  buf->lastused = 2;
+  buf->data[2]  = 0x0d;
+  buf->refill   = eefs_refill_write;
+  buf->cleanup  = eefs_cleanup_write;
+}
+
+static void eefs_open_rel(path_t *path, cbmdirent_t *dent, buffer_t *buf,
+                          uint8_t recordlen, uint8_t mode) {
+  set_error(ERROR_SYNTAX_UNABLE);
+}
+
+static uint8_t eefs_delete(path_t *path, cbmdirent_t *dent) {
+  eefs_error_t res;
+
+  set_dirty_led(1);
+
+  repad_filename(dent->name);
+  res = eepromfs_delete(dent->name);
+  translate_error(res);
+
+  update_leds();
+
+  /* check result, can only be not_found or ok */
+  if (res == EEFS_ERROR_OK)
+    return 1;
+  else
+    return 0;
+}
+
+static uint8_t eefs_disk_label(uint8_t part, uint8_t *label) {
+  // copy with zero-termination
+  memcpy_P(label, disk_label, 17);
+  return 0;
+}
+
+static uint8_t eefs_dir_label(path_t *path, uint8_t *label) {
+  // copy without zero-termination
+  memcpy_P(label, disk_label, 16);
+  return 0;
+}
+
+static uint8_t eefs_disk_id(path_t *path, uint8_t *id) {
+  memcpy_P(id, disk_id, 5);
+  return 0;
+}
+
+static uint16_t eefs_disk_free(uint8_t part) {
+  // converted to 256-byte-blocks as a rough CBM block approximation
+  return eepromfs_free_sectors() / (256 / EEPROMFS_SECTORSIZE);
+}
+
+static void eefs_read_sector(buffer_t *buf, uint8_t part, uint8_t track, uint8_t sector) {
+  set_error_ts(ERROR_READ_NOHEADER, track, sector);
+}
+
+static void eefs_write_sector(buffer_t *buf, uint8_t part, uint8_t track, uint8_t sector) {
+  set_error_ts(ERROR_READ_NOHEADER, track, sector);
+}
+
+static void eefs_format(uint8_t drv, uint8_t *name, uint8_t *id) {
+  eepromfs_format();
+}
+
+static uint8_t eefs_opendir(dh_t *dh, path_t *path) {
+  dh->part = path->part;
+  eepromfs_opendir(&dh->dir.eefs);
+  return 0;
+}
+
+static int8_t eefs_readdir(dh_t *dh, cbmdirent_t *dent) {
+  eefs_dirent_t eedent;
+  uint8_t       res;
+
+  /* clear eefs-dirent to ensure a zero-terminated file name */
+  memset(&eedent, 0, sizeof(eefs_dirent_t));
+
+  res = eepromfs_readdir(&dh->dir.eefs, &eedent);
+
+  if (res)
+    return -1;
+
+  /* clear result buffer */
+  memset(dent, 0, sizeof(cbmdirent_t));
+
+  dent->opstype   = OPSTYPE_EEFS;
+  dent->typeflags = TYPE_PRG;
+  dent->blocksize = (eedent.size + 255) / 256; // FIXME: Maybe change to 254-byte blocks?
+  terminate_filename(eedent.name);
+  memcpy(dent->name, eedent.name, CBM_NAME_LENGTH);
+
+  // FIXME: add fake date/time fields, add a clear_dent() function to do the memset and this
+
+  return 0;
+}
+
+/**
+ * eefs_chdir - chdir for eefs
+ * @path   : path object of the location of dirname
+ * @dirname: directory to be changed into
+ *
+ * Always returns 0 for success.
+ */
+static uint8_t eefs_chdir(path_t *path, cbmdirent_t *dent) {
+  // always ignore
+  return 0;
+}
+
+static void eefs_rename(path_t *path, cbmdirent_t *oldname, uint8_t *newname) {
+  eefs_error_t res;
+
+  repad_filename(oldname->name);
+  repad_filename(newname);
+
+  res = eepromfs_rename(oldname->name, newname);
+  translate_error(res);
+}
+
+/* ------------------------------------------------------------------------- */
+/*  ops struct                                                               */
+/* ------------------------------------------------------------------------- */
+
+const PROGMEM fileops_t eefs_ops = {
+  eefs_open_read,
+  eefs_open_write,
+  eefs_open_rel,
+  eefs_delete,
+  eefs_disk_label,
+  eefs_dir_label,
+  eefs_disk_id,
+  eefs_disk_free,
+  eefs_read_sector,
+  eefs_write_sector,
+  eefs_format,
+  eefs_opendir,
+  eefs_readdir,
+  image_mkdir,
+  eefs_chdir,
+  eefs_rename
+};
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/eefs-ops.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/eefs-ops.h
new file mode 100644
index 00000000..717a3739
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/eefs-ops.h
@@ -0,0 +1,38 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   eefs-ops.h: eepromfs operations
+
+*/
+
+#ifndef EEFS_OPS_H
+#define EEFS_OPS_H
+
+#include "wrapops.h"
+
+/* number of the partition that eefs took, 255 if none */
+extern uint8_t eefs_partition;
+
+extern const fileops_t eefs_ops;
+
+void eefsops_init(void);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/eeprom-conf.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/eeprom-conf.c
new file mode 100644
index 00000000..cb4983d3
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/eeprom-conf.c
@@ -0,0 +1,188 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   eeprom-conf.c: Persistent configuration storage
+
+*/
+
+#include <string.h>
+#include "config.h"
+#include "arch-eeprom.h"
+#include "diskio.h"
+#include "fatops.h"
+#include "flags.h"
+#include "iec.h"
+#include "timer.h"
+#include "ustring.h"
+#include "eeprom-conf.h"
+
+uint8_t rom_filename[ROM_NAME_LENGTH+1];
+
+/**
+ * struct storedconfig - in-eeprom data structure
+ * @dummy      : EEPROM position 0 is unused
+ * @checksum   : Checksum over the EEPROM contents
+ * @structsize : size of the eeprom structure
+ * @unused     : unused byte kept for structure compatibility
+ * @globalflags: subset of the globalflags variable
+ * @address    : device address set by software
+ * @hardaddress: device address set by jumpers
+ * @fileexts   : file extension mapping mode
+ * @drvflags0  : 16 bits of drv mappings, organized as 4 nybbles.
+ * @drvflags1  : 16 bits of drv mappings, organized as 4 nybbles.
+ * @imagedirs  : Disk images-as-directory mode
+ * @romname    : M-R rom emulation file name (zero-padded, but not terminated)
+ *
+ * This is the data structure for the contents of the EEPROM.
+ *
+ * Do not remove any fields!
+ * Only add fields at the end!
+ */
+static EEMEM struct {
+  uint8_t  dummy;
+  uint8_t  checksum;
+  uint16_t structsize;
+  uint8_t  unused;
+  uint8_t  global_flags;
+  uint8_t  address;
+  uint8_t  hardaddress;
+  uint8_t  fileexts;
+  uint16_t drvconfig0;
+  uint16_t drvconfig1;
+  uint8_t  imagedirs;
+  uint8_t  romname[ROM_NAME_LENGTH];
+} __attribute__((packed)) storedconfig;
+
+/**
+ * read_configuration - reads configuration from EEPROM
+ *
+ * This function reads the stored configuration values from the EEPROM.
+ * If the stored checksum doesn't match the calculated one nothing will
+ * be changed.
+ */
+void read_configuration(void) {
+  uint_fast16_t i,size;
+  uint8_t checksum, tmp;
+
+  /* Set default values */
+  globalflags         |= POSTMATCH;            /* Post-* matching enabled */
+  file_extension_mode  = 1;                    /* Store x00 extensions except for PRG */
+  set_drive_config(get_default_driveconfig()); /* Set the default drive configuration */
+  memset(rom_filename, 0, sizeof(rom_filename));
+
+  /* Use the NEXT button to skip reading the EEPROM configuration */
+  if (!(buttons_read() & BUTTON_NEXT)) {
+    ignore_keys();
+    return;
+  }
+
+  size = eeprom_read_word(&storedconfig.structsize);
+
+  /* abort if the size bytes are not set */
+  if (size == 0xffff) {
+    eeprom_safety();
+    return;
+  }
+
+  /* Calculate checksum of EEPROM contents */
+  checksum = 0;
+  for (i=2; i<size; i++)
+    checksum += eeprom_read_byte((uint8_t *)i);
+
+  /* Abort if the checksum doesn't match */
+  if (checksum != eeprom_read_byte(&storedconfig.checksum)) {
+    eeprom_safety();
+    return;
+  }
+
+  /* Read data from EEPROM */
+  tmp = eeprom_read_byte(&storedconfig.global_flags);
+  globalflags &= (uint8_t)~(POSTMATCH |
+                            EXTENSION_HIDING);
+  globalflags |= tmp;
+
+  if (eeprom_read_byte(&storedconfig.hardaddress) == device_hw_address())
+    device_address = eeprom_read_byte(&storedconfig.address);
+
+  file_extension_mode = eeprom_read_byte(&storedconfig.fileexts);
+
+#ifdef NEED_DISKMUX
+  if (size > 9) {
+    uint32_t tmpconfig;
+    tmpconfig = eeprom_read_word(&storedconfig.drvconfig0);
+    tmpconfig |= (uint32_t)eeprom_read_word(&storedconfig.drvconfig1) << 16;
+    set_drive_config(tmpconfig);
+  }
+
+  /* sanity check.  If the user has truly turned off all drives, turn the
+   * defaults back on
+   */
+  if(drive_config == 0xffffffff)
+    set_drive_config(get_default_driveconfig());
+#endif
+
+  if (size > 13)
+    image_as_dir = eeprom_read_byte(&storedconfig.imagedirs);
+
+  if (size > 29)
+    eeprom_read_block(rom_filename, &storedconfig.romname, ROM_NAME_LENGTH);
+
+  /* Prevent problems due to accidental writes */
+  eeprom_safety();
+}
+
+/**
+ * write_configuration - stores configuration data to EEPROM
+ *
+ * This function stores the current configuration values to the EEPROM.
+ */
+void write_configuration(void) {
+  uint_fast16_t i;
+  uint8_t checksum;
+
+  /* Write configuration to EEPROM */
+  eeprom_write_word(&storedconfig.structsize, sizeof(storedconfig));
+  eeprom_write_byte(&storedconfig.global_flags,
+                    globalflags & (POSTMATCH |
+                                   EXTENSION_HIDING));
+  eeprom_write_byte(&storedconfig.address, device_address);
+  eeprom_write_byte(&storedconfig.hardaddress, device_hw_address());
+  eeprom_write_byte(&storedconfig.fileexts, file_extension_mode);
+#ifdef NEED_DISKMUX
+  eeprom_write_word(&storedconfig.drvconfig0, drive_config);
+  eeprom_write_word(&storedconfig.drvconfig1, drive_config >> 16);
+#endif
+  eeprom_write_byte(&storedconfig.imagedirs, image_as_dir);
+  memset(rom_filename+ustrlen(rom_filename), 0, sizeof(rom_filename)-ustrlen(rom_filename));
+  eeprom_write_block(rom_filename, &storedconfig.romname, ROM_NAME_LENGTH);
+
+  /* Calculate checksum over EEPROM contents */
+  checksum = 0;
+  for (i=2;i<sizeof(storedconfig);i++)
+    checksum += eeprom_read_byte((uint8_t *) i);
+
+  /* Store checksum to EEPROM */
+  eeprom_write_byte(&storedconfig.checksum, checksum);
+
+  /* Prevent problems due to accidental writes */
+  eeprom_safety();
+}
+
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/eeprom-conf.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/eeprom-conf.h
new file mode 100644
index 00000000..d43840f0
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/eeprom-conf.h
@@ -0,0 +1,36 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   eeprom-conf.h: Persistent configuration storage
+
+*/
+
+#ifndef EEPROM_CONF_H
+#define EEPROM_CONF_H
+
+#define ROM_NAME_LENGTH 16
+
+extern uint8_t rom_filename[ROM_NAME_LENGTH+1];
+
+void read_configuration(void);
+void write_configuration(void);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/eeprom-fs.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/eeprom-fs.c
new file mode 100644
index 00000000..192a3b1f
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/eeprom-fs.c
@@ -0,0 +1,702 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   eeprom-fs.c: Tiny file system in the unused EEPROM space
+
+*/
+
+#include "config.h"
+#include <alloca.h>
+#include <assert.h>
+#include <stdbool.h>
+#include <stddef.h>
+#include <string.h>
+#include "arch-eeprom.h"
+#include "buffers.h"
+#include "eeprom-fs.h"
+
+/* ------------------------------------------------------------------------- */
+/*  data structures, constants, global variables                             */
+/* ------------------------------------------------------------------------- */
+
+/* avoid writing unchanged bytes to the EEPROM  */
+/* currently implemented only for the directory */
+#define EEPROMFS_MINIMIZE_WRITES
+
+/* a buffer with at least 32 bytes */
+#define EEPROMFS_BUFFER ops_scratch
+
+/* another buffer with at least 32 bytes */
+/* used only once to initialize a uint8_t pointer, */
+/* so using an expression or alloca() is ok        */
+#define EEPROMFS_CMP_BUFFER alloca(32)
+
+/* marker for free sectors */
+#define SECTOR_FREE      0xff
+
+/* file flags */
+#define EEFS_FLAG_DELETED   (1<<0)
+#define EEFS_FLAG_LISTENTRY (1<<1)
+// TODO: hidden, read-only?
+
+typedef struct {
+  uint8_t  sectors[12];            // must be in same position in both name and list
+  uint8_t  name[EEFS_NAME_LENGTH];
+  uint16_t size;
+  uint8_t  flags;
+  uint8_t  nextentry;
+} nameentry_t;
+
+typedef struct {
+  uint8_t  sectors[30];
+  uint8_t  flags;
+  uint8_t  nextentry;
+} listentry_t;
+
+_Static_assert(sizeof(nameentry_t) == sizeof(listentry_t),
+               "nameentry and listentry sizes must match");
+_Static_assert(offsetof(nameentry_t, sectors) == offsetof(listentry_t, sectors),
+               "sector list must start at same offset in both structs");
+
+#define DATA_OFFSET  (EEPROMFS_OFFSET + EEPROMFS_ENTRIES * sizeof(nameentry_t))
+#define SECTOR_COUNT ((EEPROMFS_SIZE - EEPROMFS_ENTRIES * sizeof(nameentry_t)) / EEPROMFS_SECTORSIZE)
+
+_Static_assert(SECTOR_COUNT < 256,     "eepromfs must have less than 256 sectors");
+_Static_assert(EEPROMFS_ENTRIES < 256, "eepromfs must have less than 256 directory entries");
+
+static uint8_t used_sectors[(SECTOR_COUNT + 7) / 8];
+static uint8_t used_entries[(EEPROMFS_ENTRIES + 7) / 8];
+static uint8_t free_sectors;
+
+static nameentry_t *nameptr = (nameentry_t *)EEPROMFS_BUFFER;
+static listentry_t *listptr = (listentry_t *)EEPROMFS_BUFFER;
+
+/* ------------------------------------------------------------------------- */
+/*  Utility functions                                                        */
+/* ------------------------------------------------------------------------- */
+
+static void set_bit(uint8_t *bitmap, uint8_t bit, bool state) {
+  if (state)
+    bitmap[bit / 8] |= 1 << (bit % 8);
+  else
+    bitmap[bit / 8] &= ~(1 << (bit % 8));
+}
+
+static bool get_bit(uint8_t *bitmap, uint8_t bit) {
+  return bitmap[bit / 8] & (1 << (bit % 8));
+}
+
+/**
+ * read_entry - read a directory entry
+ * @index: index of the directory entry
+ *
+ * This function reads the directory entry @index
+ * from the EEPROM into the buffer.
+ */
+static void read_entry(uint8_t index) {
+  eeprom_read_block(EEPROMFS_BUFFER,
+                    (uint8_t *)(EEPROMFS_OFFSET + sizeof(nameentry_t) * index),
+                    sizeof(nameentry_t));
+}
+
+/**
+ * write_entry - write a directory entry
+ * @index: index of the directory entry
+ *
+ * This function writes the directory entry @index
+ * from the buffer into the EEPROM.
+ */
+static void write_entry(uint8_t index) {
+#ifdef EEPROMFS_MINIMIZE_WRITES
+  /* write just the changed bytes to the EEPROM */
+
+  uint8_t *orig = EEPROMFS_CMP_BUFFER;
+  uint8_t i, nonmatch_start;
+  bool cur_nonmatching = false;
+
+  /* read current entry to minimize writes */
+  eeprom_read_block(orig,
+                    (uint8_t *)(EEPROMFS_OFFSET + sizeof(nameentry_t) * index),
+                    sizeof(nameentry_t));
+
+  for (i = 0; i < sizeof(nameentry_t); i++) {
+    if (cur_nonmatching) {
+      if (EEPROMFS_BUFFER[i] == orig[i]) {
+        cur_nonmatching = false;
+
+        eeprom_write_block(EEPROMFS_BUFFER + nonmatch_start,
+                             (uint8_t *)(EEPROMFS_OFFSET + sizeof(nameentry_t) * index + nonmatch_start),
+                             i - nonmatch_start);
+      }
+    } else {
+      if (EEPROMFS_BUFFER[i] != orig[i]) {
+        cur_nonmatching = true;
+        nonmatch_start  = i;
+      }
+    }
+  }
+
+  if (cur_nonmatching) {
+    /* final block */
+    eeprom_write_block(EEPROMFS_BUFFER + nonmatch_start,
+                       (uint8_t *)(EEPROMFS_OFFSET + sizeof(nameentry_t) * index + nonmatch_start),
+                       sizeof(nameentry_t) - nonmatch_start);
+  }
+
+#else
+  /* write everything */
+  eeprom_write_block(EEPROMFS_BUFFER,
+                     (uint8_t *)(EEPROMFS_OFFSET + sizeof(nameentry_t) * index),
+                     sizeof(nameentry_t));
+#endif
+}
+
+/**
+ * curentry_is_listentry - checks if the current entry is a listentry
+ *
+ * This function checks if the entry currently in the buffer is
+ * a listentry. Returns true if yes, false if not.
+ */
+static bool curentry_is_listentry(void) {
+  if (listptr->flags & EEFS_FLAG_LISTENTRY)
+    return true;
+  else
+    return false;
+}
+
+/**
+ * curentry_max_sectors - returns the maximum number of sectors storable in the current entry
+ *
+ * This function returns the maximum number of sector numbers
+ * that can be stored in the direntry currently in the buffer.
+ */
+static uint8_t curentry_max_sectors(void) {
+  if (curentry_is_listentry())
+    return sizeof(listptr->sectors);
+  else
+    return sizeof(nameptr->sectors);
+}
+
+/**
+ * mark_sector - mark a sector as free/used
+ * @sector: number of the sector to mark
+ * @used  : mark as used (true) or free (false)
+ *
+ * This function marks the sector @sector as used or
+ * free depending on @used and updates the free_sectors
+ * counter. Assumes that it will always be used to
+ * flip the state of a sector.
+ */
+static void mark_sector(uint8_t sector, bool used) {
+  assert(get_bit(used_sectors, sector) != used);
+
+  set_bit(used_sectors, sector, used);
+  if (used)
+    free_sectors--;
+  else
+    free_sectors++;
+}
+
+/**
+ * next_free_sector - find the next free sector
+ * @start: sector to start the search at
+ *
+ * This function searches for the next free sector, starting
+ * at @start (to allow some small amount of wear-levelling).
+ * Returns a sector number or SECTOR_FREE if none is available.
+ */
+static uint8_t next_free_sector(uint8_t start) {
+  uint8_t cur = start;
+
+  while (get_bit(used_sectors, cur)) {
+    cur++;
+    if (cur == SECTOR_COUNT)
+      cur = 0;
+
+    if (cur == start)
+      return SECTOR_FREE;
+  }
+
+  return cur;
+}
+
+/**
+ * find_entry - find a directory entry by name
+ * @name: pointer to file name array
+ *
+ * This function searches for a directory entry with the file
+ * name @name. All characters of the name must be a binary match.
+ * Returns the index of the entry or 0xff if not found.
+ */
+static uint8_t find_entry(uint8_t *name) {
+  uint8_t idx = 0;
+
+  while (idx < EEPROMFS_ENTRIES) {
+    read_entry(idx++);
+
+    if (nameptr->flags & (EEFS_FLAG_DELETED | EEFS_FLAG_LISTENTRY))
+      continue;
+
+    if (!memcmp(nameptr->name, name, EEFS_NAME_LENGTH))
+      return idx - 1;
+  }
+
+  return 0xff;
+}
+
+/**
+ * next_free_entry - find an empty directory entry
+ * @start: entry to start search at
+ *
+ * This function searches for an empty directory entry, starting at entry
+ * @start to provide a simple wear-levelling mechanism. The entry is NOT
+ * marked as used. Returns the index of the entry or 0xff if none available
+ * and marks it as used in used_entries.
+ */
+static uint8_t next_free_entry(uint8_t start) {
+  uint8_t cur = start;
+
+  while (get_bit(used_entries, cur)) {
+    cur++;
+    if (cur == EEPROMFS_ENTRIES)
+      cur = 0;
+
+    if (cur == start)
+      return 0xff;
+  }
+
+  set_bit(used_entries, cur, true);
+
+  return cur;
+}
+
+/**
+ * min - returns minimum of two numbers
+ * @a: first number
+ * @b: second number
+ *
+ * This function returns the numerically smaller of @a and @b.
+ */
+static uint16_t min(uint16_t a, uint16_t b) {
+  if (a < b)
+    return a;
+  else
+    return b;
+}
+
+/* ------------------------------------------------------------------------- */
+/*  external API                                                             */
+/* ------------------------------------------------------------------------- */
+
+void eepromfs_init(void) {
+  uint8_t i, j;
+
+  free_sectors = SECTOR_COUNT;
+  memset(used_sectors, 0, sizeof(used_sectors));
+  memset(used_entries, 0, sizeof(used_entries));
+
+  /* scan all directory entries */
+  for (i = 0; i < EEPROMFS_ENTRIES; i++) {
+    read_entry(i);
+
+    /* check if entry is in use */
+    if (!(nameptr->flags & EEFS_FLAG_DELETED)) {
+      set_bit(used_entries, i, true);
+
+      /* mark their sectors as used */
+      for (j = 0; j < curentry_max_sectors(); j++) {
+        if (listptr->sectors[j] != SECTOR_FREE)
+          mark_sector(listptr->sectors[j], true);
+      }
+    }
+  }
+}
+
+void eepromfs_format(void) {
+  uint32_t *addr = (uint32_t *)EEPROMFS_OFFSET;
+
+  while (addr < (uint32_t *)(EEPROMFS_OFFSET + EEPROMFS_SIZE)) {
+    uint32_t val;
+
+    eeprom_read_block(&val, addr, sizeof(val));
+    if (val != 0xffffffffUL) {
+      /* clear only if neccessary to reduce number of writes */
+      val = 0xffffffffUL;
+      eeprom_write_block(&val, addr, sizeof(val));
+    }
+    addr++;
+  }
+
+  /* data structures have changed, re-init */
+  eepromfs_init();
+}
+
+uint8_t eepromfs_free_sectors(void) {
+  return free_sectors;
+}
+
+void eepromfs_opendir(eefs_dir_t *dh) {
+  dh->entry = 0;
+}
+
+/**
+ * eepromfs_readdir - read a directory entry
+ * @dh   : pointer to directory handle
+ * @entry: pointer to dirent structore for the result
+ *
+ * This function reads the next entry from the directory
+ * handle @dh to the dirent structure @entry. Returns
+ * zero if an entry was returned or non-zero if there
+ * was no more entry to read.
+ */
+uint8_t eepromfs_readdir(eefs_dir_t *dh, eefs_dirent_t *entry) {
+  /* loop until a valid new entry is found */
+  while (dh->entry < EEPROMFS_ENTRIES) {
+    /* read current entry */
+    read_entry(dh->entry++);
+
+    if (nameptr->flags & EEFS_FLAG_DELETED)
+      continue;
+
+    if (curentry_is_listentry())
+      continue;
+
+    /* copy information */
+    memcpy(entry->name, nameptr->name, EEFS_NAME_LENGTH);
+    entry->flags = nameptr->flags;
+    entry->size  = nameptr->size;
+    return 0;
+  }
+
+  return 1;
+}
+
+/**
+ * eepromfs_open - open a file
+ * @name : pointer to file name
+ * @fh   : pointer to file handle
+ * @flags: access flags
+ *
+ * This function sets up the handle give via @fh for access to the
+ * file named in @name. Depending on the settings in @flags this
+ * can be a read, write or append-access. Returns zero if successful,
+ * non-zero if not.
+ */
+eefs_error_t eepromfs_open(uint8_t *name, eefs_fh_t *fh, uint8_t flags) {
+  uint8_t diridx;
+
+  memset(fh, 0, sizeof(eefs_fh_t));
+
+  diridx = find_entry(name);
+
+  if (flags == EEFS_MODE_WRITE) {
+    /* write: forbid multiple files with the same name */
+    if (diridx != 0xff)
+      return EEFS_ERROR_FILEEXISTS;
+
+    /* allocate directory entry */
+    fh->entry = next_free_entry(0);
+    if (fh->entry == 0xff)
+      return EEFS_ERROR_DIRFULL;
+
+    fh->cur_entry  = fh->entry;
+    fh->cur_sindex = (uint8_t)-1;
+    fh->filemode   = EEFS_MODE_WRITE;
+
+    /* create direntry */
+    memset(EEPROMFS_BUFFER, 0xff, sizeof(nameentry_t));
+    memcpy(nameptr->name, name, EEFS_NAME_LENGTH);
+    nameptr->size  = 0;
+    nameptr->flags = 0;
+    write_entry(fh->entry);
+
+  } else {
+    /* read, append: return error if the file does not exist */
+    if (diridx == 0xff)
+      return EEFS_ERROR_FILENOTFOUND;
+
+    fh->entry = diridx;
+    fh->size  = nameptr->size;
+
+    if (flags == EEFS_MODE_APPEND) {
+      /* load last direntry */
+      while (listptr->nextentry != 0xff) {
+        diridx = listptr->nextentry;
+        read_entry(diridx);
+      }
+
+      /* search for last allocated sector */
+      uint8_t sectoridx = 0;
+      for (uint8_t i = 0; i < curentry_max_sectors(); i++) {
+        if (listptr->sectors[i] == SECTOR_FREE)
+          break;
+
+        sectoridx = i;
+      }
+
+      fh->cur_sector  = listptr->sectors[sectoridx];
+      fh->cur_entry   = diridx;
+      fh->cur_offset  = fh->size;
+      fh->cur_soffset = fh->size % EEPROMFS_SECTORSIZE;
+      fh->filemode    = EEFS_MODE_WRITE;
+
+    } else {
+      /* read mode */
+      fh->cur_sector = nameptr->sectors[0];
+      fh->cur_entry  = diridx;
+      fh->filemode   = EEFS_MODE_READ;
+    }
+  } // non-write
+
+  return EEFS_ERROR_OK;
+}
+
+/**
+ * eepromfs_write - write to a file
+ * @fh           : pointer to file handle
+ * @data         : pointer to data to be written
+ * @length       : number of bytes to write
+ * @bytes_written: pointer to output var for number of bytes written
+ *
+ * This function writes @length bytes from @data to the file opened on @fh.
+ * The actual number of bytes written to the file is stored in
+ * @bytes_written. Returns an eepromfs error code depending on the
+ * result.
+ */
+eefs_error_t eepromfs_write(eefs_fh_t *fh, void *data, uint16_t length, uint16_t *bytes_written) {
+  uint8_t *bdata = data;
+
+  if (fh->filemode != EEFS_MODE_WRITE)
+    return EEFS_ERROR_INVALID;
+
+  *bytes_written = 0;
+
+  while (length > 0) {
+    if (fh->cur_soffset == 0) {
+      /* need to allocate another sector */
+      uint8_t next_sector = next_free_sector(fh->cur_sector);
+
+      if (next_sector == SECTOR_FREE)
+        return EEFS_ERROR_DISKFULL;
+
+      fh->cur_sector = next_sector;
+
+      /* mark it in the direntry */
+      read_entry(fh->cur_entry);
+
+      fh->cur_sindex++;
+      if (fh->cur_sindex >= curentry_max_sectors()) {
+        /* need to allocate another direntry */
+        uint8_t next_entry = next_free_entry(fh->cur_entry);
+
+        if (next_entry == 0xff)
+          return EEFS_ERROR_DIRFULL;
+
+        /* write link */
+        listptr->nextentry = next_entry;
+        write_entry(fh->cur_entry);
+
+        /* build new entry in buffer */
+        memset(listptr, 0xff, sizeof(listentry_t));
+        listptr->flags = EEFS_FLAG_LISTENTRY;
+
+        fh->cur_entry  = next_entry;
+        fh->cur_sindex = 0;
+      }
+
+      /* mark sector as used in internal bookkeeping */
+      mark_sector(next_sector, true);
+
+      /* write new sector number to direntry */
+      listptr->sectors[fh->cur_sindex] = next_sector;
+      write_entry(fh->cur_entry);
+    }
+
+    uint8_t bytes_to_write = min(length, EEPROMFS_SECTORSIZE - fh->cur_soffset);
+    eeprom_write_block(bdata,
+                       (uint8_t *)(DATA_OFFSET + EEPROMFS_SECTORSIZE * fh->cur_sector + fh->cur_soffset),
+                       bytes_to_write);
+
+    /* adjust state */
+    bdata           += bytes_to_write;
+    fh->size        += bytes_to_write;
+    fh->cur_offset  += bytes_to_write;
+    fh->cur_soffset  = (fh->cur_soffset + bytes_to_write) % EEPROMFS_SECTORSIZE;
+    length          -= bytes_to_write;
+    *bytes_written  += bytes_to_write;
+  }
+
+  return EEFS_ERROR_OK;
+}
+
+/**
+ * eepromfs_read - read from a file
+ * @fh        : pointer to file handle
+ * @data      : pointer to buffer for data to be read
+ * @length    : number of bytes to read
+ * @bytes_read: pointer to output var for number of bytes read
+ *
+ * This function writes @length bytes from @data to the file opened on @fh.
+ * The actual number of bytes written to the file is stored in
+ * @bytes_written. Returns an eepromfs error code depending on the
+ * result.
+ */
+eefs_error_t eepromfs_read(eefs_fh_t *fh, void *data, uint16_t length, uint16_t *bytes_read) {
+  uint8_t *bdata = data;
+
+  if (fh->filemode != EEFS_MODE_READ)
+    return EEFS_ERROR_INVALID;
+
+  *bytes_read = 0;
+
+  if (length > fh->size - fh->cur_offset)
+    length = fh->size - fh->cur_offset;
+
+  while (length > 0) {
+    uint8_t bytes_to_read = min(length, EEPROMFS_SECTORSIZE - fh->cur_soffset);
+
+    eeprom_read_block(bdata,
+                      (uint8_t *)(DATA_OFFSET + EEPROMFS_SECTORSIZE * fh->cur_sector + fh->cur_soffset),
+                      bytes_to_read);
+
+    /* adjust state */
+    *bytes_read    += bytes_to_read;
+    bdata          += bytes_to_read;
+    length         -= bytes_to_read;
+    fh->cur_offset += bytes_to_read;
+    fh->cur_soffset = (fh->cur_soffset + bytes_to_read) % EEPROMFS_SECTORSIZE;
+
+    if (fh->cur_offset != fh->size && fh->cur_soffset == 0) {
+      // FIXME: If rw-mode-support is added, this code generates a state that
+      //        differs from the assumptions in the write path
+      //        (current sector advances here, write assumes it hasn't)
+      /* move to next sector */
+      read_entry(fh->cur_entry);
+      fh->cur_sindex++;
+
+      if (fh->cur_sindex >= curentry_max_sectors()) {
+        /* all sectors within current entry are processed */
+        assert(listptr->nextentry != 0xff);
+
+        fh->cur_entry  = listptr->nextentry;
+        fh->cur_sindex = 0;
+        read_entry(fh->cur_entry);
+      }
+
+      assert(listptr->sectors[fh->cur_sindex] != SECTOR_FREE);
+
+      fh->cur_sector = listptr->sectors[fh->cur_sindex];
+    }
+  }
+
+  return EEFS_ERROR_OK;
+}
+
+/**
+ * eepromfs_close - close a file
+ * @fh: handle of the file to close
+ *
+ * This function closes the file opened on @fh.
+ * No return value.
+ */
+void eepromfs_close(eefs_fh_t *fh) {
+  // FIXME: Read mode check could be removed if write_entry only writes changed bytes (EEPROMFS_MINIMIZE_WRITES)
+  if (fh->filemode != EEFS_MODE_READ) {
+    /* write new file length */
+    read_entry(fh->entry);
+    nameptr->size = fh->size;
+    write_entry(fh->entry);
+  }
+  fh->filemode = 0;
+}
+
+/**
+ * eepromfs_rename - rename a file
+ * @oldname: current file name
+ * @newname: new file name
+ *
+ * This function renames the file @oldname to @newname.
+ * Returns an eepromfs error code depending on the result.
+ */
+eefs_error_t eepromfs_rename(uint8_t *oldname, uint8_t *newname) {
+  uint8_t diridx;
+
+  /* check if the new file name already exists */
+  diridx = find_entry(newname);
+
+  if (diridx != 0xff)
+    return EEFS_ERROR_FILEEXISTS;
+
+  /* read the directory entry */
+  diridx = find_entry(oldname);
+
+  if (diridx == 0xff)
+    return EEFS_ERROR_FILENOTFOUND;
+
+  memcpy(nameptr->name, newname, EEFS_NAME_LENGTH);
+
+  write_entry(diridx);
+
+  return EEFS_ERROR_OK;
+}
+
+/**
+ * eepromfs_delete - delete a file
+ * @name: name of the file to delete
+ *
+ * This function deletes the file @name.
+ * Returns an eepromfs error code depending on the result.
+ */
+// FIXME: If this operation is interrupted it could
+// leave a chain of listentries with no nameentry
+// Add a small fsck in init?
+eefs_error_t eepromfs_delete(uint8_t *name) {
+  uint8_t diridx, old_diridx;
+
+  /* look up the first directory entry */
+  diridx = find_entry(name);
+  if (diridx == 0xff)
+    return EEFS_ERROR_FILENOTFOUND;
+
+  while (diridx != 0xff) {
+    /* free all sectors from the current entry */
+    for (uint8_t i = 0; i < curentry_max_sectors(); i++) {
+      if (listptr->sectors[i] == SECTOR_FREE)
+        break;
+
+      mark_sector(listptr->sectors[i], false);
+    }
+
+    /* remember number of next entry */
+    old_diridx = diridx;
+    diridx = listptr->nextentry;
+
+    /* erase the current entry */
+    memset(listptr, 0xff, sizeof(*listptr));
+    write_entry(old_diridx);
+
+    /* read next entry */
+    if (diridx != 0xff)
+      read_entry(diridx);
+  }
+
+  return EEFS_ERROR_OK;
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/eeprom-fs.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/eeprom-fs.h
new file mode 100644
index 00000000..d60e86df
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/eeprom-fs.h
@@ -0,0 +1,83 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   eeprom-fs.h: Tiny file system in the unused EEPROM space
+
+*/
+
+#ifndef EEPROM_FS_H
+#define EEPROM_FS_H
+
+#include <stdint.h>
+
+// NOTE: Not tested with anything but 16
+#define EEFS_NAME_LENGTH 16
+
+/* flags for eepromfs_open */
+#define EEFS_MODE_READ   0
+#define EEFS_MODE_WRITE  1
+#define EEFS_MODE_APPEND 2
+
+/* error return values */
+typedef enum {
+  EEFS_ERROR_OK = 0,
+  EEFS_ERROR_FILENOTFOUND,
+  EEFS_ERROR_FILEEXISTS,
+  EEFS_ERROR_DIRFULL,
+  EEFS_ERROR_DISKFULL,
+  EEFS_ERROR_INVALID,
+  EEFS_ERROR_UNIMPLEMENTED,
+} eefs_error_t;
+
+typedef struct {
+  uint8_t entry;
+} eefs_dir_t;
+
+typedef struct {
+  uint16_t size;
+  uint8_t  name[EEFS_NAME_LENGTH+1]; // note: last byte is not touched
+  uint8_t  flags;
+} eefs_dirent_t;
+
+typedef struct {
+  uint16_t size;        // current file size
+  uint16_t cur_offset;  // current offset within file
+  uint8_t  entry;       // (first) directory entry of the file
+  uint8_t  cur_sector;  // current sector
+  uint8_t  cur_soffset; // current offset in the sector, points "next" byte on read+write
+  uint8_t  cur_entry;   // index of the current directory entry
+  uint8_t  cur_sindex;  // index of the current sector in the entry
+  uint8_t  filemode;    // read/write/append - FIXME: read-only?
+} eefs_fh_t;
+
+void         eepromfs_init(void);
+void         eepromfs_format(void);
+uint8_t      eepromfs_free_sectors(void);
+void         eepromfs_opendir(eefs_dir_t *dh);
+uint8_t      eepromfs_readdir(eefs_dir_t *dh, eefs_dirent_t *entry);
+eefs_error_t eepromfs_open(uint8_t *name, eefs_fh_t *fh, uint8_t flags);
+eefs_error_t eepromfs_write(eefs_fh_t *fh, void *data, uint16_t length, uint16_t *bytes_written);
+eefs_error_t eepromfs_read(eefs_fh_t *fh, void *data, uint16_t length, uint16_t *bytes_read);
+void         eepromfs_close(eefs_fh_t *fh);
+eefs_error_t eepromfs_rename(uint8_t *oldname, uint8_t *newname);
+eefs_error_t eepromfs_delete(uint8_t *name);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/errormsg.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/errormsg.c
new file mode 100644
index 00000000..6ece0beb
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/errormsg.c
@@ -0,0 +1,269 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   errormsg.c: Generates Commodore-compatible error messages
+
+*/
+
+#include <ctype.h>
+#include <stdlib.h>
+#include <string.h>
+#include "config.h"
+#include "buffers.h"
+#include "diskio.h"
+#include "display.h"
+#include "eeprom-conf.h"
+#include "fatops.h"
+#include "flags.h"
+#include "led.h"
+#include "progmem.h"
+#include "ustring.h"
+#include "utils.h"
+#include "errormsg.h"
+
+uint8_t current_error;
+uint8_t error_buffer[CONFIG_ERROR_BUFFER_SIZE];
+
+/// Version number string, will be added to message 73
+const char PROGMEM versionstr[] = "SD2IEC V" VERSION;
+
+/// Long version string, used for message 9
+const char PROGMEM longverstr[] = LONGVERSION;
+
+#define EC(x) x+0x80
+
+/// Abbreviations used in the main error strings
+static const PROGMEM uint8_t abbrevs[] = {
+  EC(0), 'F','I','L','E',
+  EC(1), 'R','E','A','D',
+  EC(2), 'W','R','I','T','E',
+  EC(3), ' ','E','R','R','O','R',
+  EC(4), ' ','N','O','T',' ',
+  EC(5), 'D','I','S','K',' ',
+  EC(6), 'O','P','E','N',
+  EC(7), 'R','E','C','O','R','D',
+  EC(8), 'P','A','R','T','I','T','I','O','N',' ',
+  EC(9), 'S','E','L','E','C','T','E','D',
+  EC(10), 'I','L','L','E','G','A','L',
+  EC(11), ' ','T','O','O',' ',
+  EC(12), 'N','O',' ',
+  EC(127)
+};
+
+/// Error string table
+static const PROGMEM uint8_t messages[] = {
+  EC(00),
+    ' ','O','K',
+  EC(01),
+    0,'S',' ','S','C','R','A','T','C','H','E','D',
+  EC(02),
+    8,9,
+  EC(20), EC(21), EC(22), EC(23), EC(24), EC(27),
+    1,3,
+  EC(25), EC(28),
+    2,3,
+  EC(26),
+    2,' ','P','R','O','T','E','C','T',' ','O','N',
+  EC(29),
+    5,'I','D',' ','M','I','S','M','A','T','C','H',
+  EC(30), EC(31), EC(32), EC(33), EC(34),
+    'S','Y','N','T','A','X',3,
+  EC(39), EC(62),
+    0,4,'F','O','U','N','D',
+  EC(50),
+    7,4,'P','R','E','S','E','N','T',
+  EC(51),
+    'O','V','E','R','F','L','O','W',' ','I','N',' ',7,
+  EC(52),
+    0,11,'L','A','R','G','E',
+  EC(60),
+    2,' ',0,' ',6,
+  EC(61),
+    0,4,6,
+  EC(63),
+    0,' ','E','X','I','S','T','S',
+  EC(64),
+    0,' ','T','Y','P','E',' ','M','I','S','M','A','T','C','H',
+  EC(65),
+    12,'B','L','O','C','K',
+  EC(66), EC(67),
+    10,' ','T','R','A','C','K',' ','O','R',' ','S','E','C','T','O','R',
+  EC(70),
+    12,'C','H','A','N','N','E','L',
+  EC(71),
+    'D','I','R',3,
+  EC(72),
+    5,'F','U','L','L',
+  EC(74),
+    'D','R','I','V','E',4,1,'Y',
+  EC(77),
+    9,' ',8,10,
+  EC(78),
+    'B','U','F','F','E','R',11,'S','M','A','L','L',
+  EC(79),
+    'I','M','A','G','E',' ',0,' ','I','N','V','A','L','I','D',
+  EC(99),
+    'C','L','O','C','K',' ','U','N','S','T','A','B','L','E',
+  EC(127)
+};
+
+static uint8_t *appendmsg(uint8_t *msg, const uint8_t *table, const uint8_t entry) {
+  uint8_t i,tmp;
+
+  i = 0;
+  do {
+    tmp = pgm_read_byte(table+i++);
+    if (tmp == EC(entry) || tmp == EC(127))
+      break;
+  } while (1);
+
+  if (tmp == EC(127)) {
+    /* Unknown error */
+    *msg++ = '?';
+  } else {
+    /* Skip over remaining error numbers */
+    while (pgm_read_byte(table+i) >= EC(0)) i++;
+
+    /* Copy error string to buffer */
+    do {
+      tmp = pgm_read_byte(table+i++);
+
+      if (tmp < 32) {
+        /* Abbreviation found, handle by recursion */
+        msg = appendmsg(msg,abbrevs,tmp);
+        continue;
+      }
+
+      if (tmp < EC(0))
+        /* Don't copy error numbers */
+        *msg++ = tmp;
+    } while (tmp < EC(0));
+  }
+
+  return msg;
+}
+
+static uint8_t *appendbool(uint8_t *msg, uint8_t ch, uint8_t value) {
+  if (ch)
+    *msg++ = ch;
+
+  if (value)
+    *msg++ = '+';
+  else
+    *msg++ = '-';
+
+  *msg++ = ':';
+
+  return msg;
+}
+
+void set_error(uint8_t errornum) {
+  set_error_ts(errornum,0,0);
+}
+
+void set_error_ts(uint8_t errornum, uint8_t track, uint8_t sector) {
+  uint8_t *msg = error_buffer;
+  uint8_t i = 0;
+
+  current_error = errornum;
+  buffers[ERRORBUFFER_IDX].data     = error_buffer;
+  buffers[ERRORBUFFER_IDX].lastused = 0;
+  buffers[ERRORBUFFER_IDX].position = 0;
+  memset(error_buffer,0,sizeof(error_buffer));
+
+  msg = appendnumber(msg,errornum);
+  *msg++ = ',';
+
+  if (errornum == ERROR_STATUS) {
+    switch(sector) {
+    case 0:
+    default:
+      *msg++ = 'E';
+      msg = appendnumber(msg, file_extension_mode);
+      msg = appendbool(msg, 0, globalflags & EXTENSION_HIDING);
+
+      msg = appendbool(msg, '*', globalflags & POSTMATCH);
+
+      *msg++ = 'I';
+      msg = appendnumber(msg, image_as_dir);
+
+      *msg++ = ':';
+      *msg++ = 'R';
+      ustrcpy(msg, rom_filename);
+      msg += ustrlen(rom_filename);
+
+      break;
+    case 1: // Drive Config
+      *msg++ = 'D';
+      while(i < 8) {
+        if(map_drive(i) != 0x0f) {
+          *msg++ = ':';
+          msg = appendnumber(msg,i);
+          *msg++ = '=';
+          msg = appendnumber(msg,map_drive(i));
+        }
+        i++;
+      }
+      break;
+    }
+
+  } else if (errornum == ERROR_LONGVERSION || errornum == ERROR_DOSVERSION) {
+    /* Start with the name and version number */
+    while ((*msg++ = pgm_read_byte(versionstr+i++))) ;
+
+    /* Append the long version if requested */
+    if (errornum == ERROR_LONGVERSION) {
+      i = 0;
+      msg--;
+      while ((*msg++ = toupper((int)pgm_read_byte(longverstr+i++)))) ;
+    }
+
+    msg--;
+  } else {
+    msg = appendmsg(msg,messages,errornum);
+  }
+  *msg++ = ',';
+
+  msg = appendnumber(msg,track);
+  *msg++ = ',';
+
+  msg = appendnumber(msg,sector);
+  *msg = 13;
+
+  if (errornum >= 20 && errornum != ERROR_DOSVERSION) {
+    // FIXME: Compare to E648
+    // NOTE: 1571 doesn't write the BAM and closes some buffers if an error occured
+    led_state |= LED_ERROR;
+  } else {
+    led_state &= (uint8_t)~LED_ERROR;
+    set_error_led(0);
+  }
+  buffers[ERRORBUFFER_IDX].lastused = msg - error_buffer;
+
+  /* Send message without the final 0x0d */
+  display_errorchannel(msg - error_buffer, error_buffer);
+}
+
+/* Callback for the error channel buffer */
+uint8_t set_ok_message(buffer_t *buf) {
+  set_error(0);
+  return 0;
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/errormsg.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/errormsg.h
new file mode 100644
index 00000000..c2a827df
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/errormsg.h
@@ -0,0 +1,88 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   errormsg.h: Definitions for the error message generator
+
+*/
+
+#ifndef ERRORMSG_H
+#define ERRORMSG_H
+
+#include <stdint.h>
+#include "buffers.h"
+#include "progmem.h"
+
+extern uint8_t current_error;
+extern uint8_t error_buffer[CONFIG_ERROR_BUFFER_SIZE];
+
+
+void set_error_ts(uint8_t errornum, uint8_t track, uint8_t sector);
+void set_error(uint8_t errornum);
+uint8_t set_ok_message(buffer_t *buf);
+
+// Commodore DOS error codes
+#define ERROR_OK                  0
+#define ERROR_SCRATCHED           1
+#define ERROR_PARTITION_SELECTED  2
+#define ERROR_STATUS              3
+#define ERROR_LONGVERSION         9
+#define ERROR_READ_NOHEADER      20
+#define ERROR_READ_NOSYNC        21
+#define ERROR_READ_NODATA        22
+#define ERROR_READ_CHECKSUM      23
+#define ERROR_WRITE_VERIFY       25
+#define ERROR_WRITE_PROTECT      26
+#define ERROR_READ_HDRCHECKSUM   27
+#define ERROR_DISK_ID_MISMATCH   29
+#define ERROR_SYNTAX_UNKNOWN     30
+#define ERROR_SYNTAX_UNABLE      31
+#define ERROR_SYNTAX_TOOLONG     32
+#define ERROR_SYNTAX_JOKER       33
+#define ERROR_SYNTAX_NONAME      34
+#define ERROR_FILE_NOT_FOUND_39  39
+#define ERROR_RECORD_MISSING     50
+#define ERROR_RECORD_OVERFLOW    51
+#define ERROR_FILE_TOO_LARGE     52
+#define ERROR_WRITE_FILE_OPEN    60
+#define ERROR_FILE_NOT_OPEN      61
+#define ERROR_FILE_NOT_FOUND     62
+#define ERROR_FILE_EXISTS        63
+#define ERROR_FILE_TYPE_MISMATCH 64
+#define ERROR_NO_BLOCK           65
+#define ERROR_ILLEGAL_TS_COMMAND 66
+#define ERROR_ILLEGAL_TS_LINK    67
+#define ERROR_NO_CHANNEL         70
+#define ERROR_DIR_ERROR          71
+#define ERROR_DISK_FULL          72
+#define ERROR_DOSVERSION         73
+#define ERROR_DRIVE_NOT_READY    74
+#define ERROR_PARTITION_ILLEGAL  77
+#define ERROR_BUFFER_TOO_SMALL   78
+#define ERROR_IMAGE_INVALID      79
+#define ERROR_CLOCK_UNSTABLE     99
+
+/// Version number string, will be added to message 73
+extern const char PROGMEM versionstr[];
+
+/// Long version string, used for message 9
+extern const char PROGMEM longverstr[];
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/fastloader-ll.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/fastloader-ll.h
new file mode 100644
index 00000000..baa4b03c
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/fastloader-ll.h
@@ -0,0 +1,81 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   fastloader-ll.h: Definitions for low-level fastloader routines
+
+*/
+
+#ifndef FASTLOADERLL_H
+#define FASTLOADERLL_H
+
+#ifdef CONFIG_HAVE_IEC
+void turbodisk_byte(uint8_t value);
+void turbodisk_buffer(uint8_t *data, uint8_t length);
+
+uint8_t jiffy_receive(iec_bus_t *busstate);
+uint8_t jiffy_send(uint8_t value, uint8_t eoi, uint8_t loadflags);
+
+void clk_data_handshake(void);
+void fastloader_fc3_send_block(uint8_t *data);
+uint8_t fc3_get_byte(void);
+uint8_t fc3_oldfreeze_pal_send(uint8_t byte);
+uint8_t fc3_oldfreeze_ntsc_send(uint8_t byte);
+
+uint8_t dreamload_get_byte(void);
+void dreamload_send_byte(uint8_t byte);
+
+int16_t uload3_get_byte(void);
+void uload3_send_byte(uint8_t byte);
+
+uint8_t epyxcart_send_byte(uint8_t byte);
+
+uint8_t geos_get_byte_1mhz(void);
+uint8_t geos_get_byte_2mhz(void);
+uint8_t geos_send_byte_1mhz(uint8_t byte);
+uint8_t geos_send_byte_2mhz(uint8_t byte);
+uint8_t geos_send_byte_1581_21(uint8_t byte);
+
+uint8_t wheels_send_byte_1mhz(uint8_t byte);
+uint8_t wheels_get_byte_1mhz(void);
+
+uint8_t wheels44_get_byte_1mhz(void);
+uint8_t wheels44_get_byte_2mhz(void);
+uint8_t wheels44_send_byte_2mhz(uint8_t byte);
+
+void ar6_1581_send_byte(uint8_t byte);
+uint8_t ar6_1581p_get_byte(void);
+
+typedef enum { PARALLEL_DIR_IN = 0,
+               PARALLEL_DIR_OUT } parallel_dir_t;
+
+uint8_t parallel_read(void);
+void parallel_write(uint8_t value);
+void parallel_send_handshake(void);
+
+#ifdef HAVE_PARALLEL
+void parallel_set_dir(parallel_dir_t direction);
+#else
+# define parallel_set_dir(x) do {} while (0)
+#endif
+
+#endif
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/fastloader.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/fastloader.c
new file mode 100644
index 00000000..a5cead13
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/fastloader.c
@@ -0,0 +1,2450 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+   Final Cartridge III, DreamLoad, ELoad fastloader support:
+   Copyright (C) 2008-2011  Thomas Giesel <skoe@directbox.com>
+   Nippon Loader support:
+   Copyright (C) 2010  Joerg Jungermann <abra@borkum.net>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   fastloader.c: High level handling of fastloader protocols
+
+*/
+
+#ifdef __AVR__
+# include <avr/boot.h>
+#endif
+#include <stdbool.h>
+#include <string.h>
+#include "config.h"
+#include "atomic.h"
+#include "buffers.h"
+#include "d64ops.h"
+#include "diskchange.h"
+#include "display.h"
+#include "doscmd.h"
+#include "errormsg.h"
+#include "fastloader-ll.h"
+#include "fileops.h"
+#include "iec-bus.h"
+#include "iec.h"
+#include "led.h"
+#include "parser.h"
+#include "timer.h"
+#include "ustring.h"
+#include "wrapops.h"
+#include "fastloader.h"
+
+#define UNUSED_PARAMETER uint8_t __attribute__((unused)) unused__
+
+uint8_t detected_loader;
+
+/* Function pointer to the current byte transmit/receive functions */
+/* (to simplify loaders with multiple variations of these)         */
+uint8_t (*fast_send_byte)(uint8_t byte);
+uint8_t (*fast_get_byte)(void);
+
+/* track to load, used as a kind of jobcode */
+volatile uint8_t fl_track;
+
+/* sector to load, used as a kind of jobcode */
+volatile uint8_t fl_sector;
+
+#ifdef PARALLEL_ENABLED
+/* parallel byte received */
+volatile uint8_t parallel_rxflag;
+#endif
+
+/* Small helper for fastloaders that need to detect disk changes */
+static uint8_t __attribute__((unused)) check_keys(void) {
+  /* Check for disk changes etc. */
+  if (key_pressed(KEY_NEXT | KEY_PREV | KEY_HOME)) {
+    change_disk();
+  }
+  if (key_pressed(KEY_SLEEP)) {
+    reset_key(KEY_SLEEP);
+    set_busy_led(0);
+    set_dirty_led(1);
+
+    /* wait for release */
+    while (key_pressed(IGNORE_KEYS)) ;
+
+    return 1;
+  }
+
+  return 0;
+}
+
+
+/*
+ *
+ *  Turbodisk
+ *
+ */
+#ifdef CONFIG_LOADER_TURBODISK
+void load_turbodisk(UNUSED_PARAMETER) {
+  uint8_t i,len,firstsector;
+  buffer_t *buf;
+
+#if defined __AVR_ATmega644__   || \
+    defined __AVR_ATmega644P__  || \
+    defined __AVR_ATmega1284P__ || \
+    defined __AVR_ATmega1281__
+  /* Lock out clock sources that aren't stable enough for this protocol */
+  uint8_t tmp = boot_lock_fuse_bits_get(GET_LOW_FUSE_BITS) & 0x0f;
+  if (tmp == 2) {
+    set_error(ERROR_CLOCK_UNSTABLE);
+    return;
+  }
+#endif
+
+  set_clock(0);
+  uart_flush();
+
+  /* Copy filename to beginning of buffer */
+  len = command_buffer[9];
+  for (i=0;i<len;i++)
+    command_buffer[i] = command_buffer[10+i];
+
+  command_buffer[len] = 0;
+  command_length = len;
+
+  /* Open the file */
+  file_open(0);
+  buf = find_buffer(0);
+  if (!buf) {
+    ATOMIC_BLOCK( ATOMIC_FORCEON ) {
+      turbodisk_byte(0xff);
+      set_clock(1);
+      set_data(1);
+    }
+    return;
+  }
+
+  firstsector = 1;
+
+  ATOMIC_BLOCK( ATOMIC_FORCEON ) {
+    while (1) {
+      /* Send the status byte */
+      if (buf->sendeoi) {
+        turbodisk_byte(0);
+      } else {
+        turbodisk_byte(1);
+      }
+
+      if (firstsector) {
+        /* Load address is transferred seperately */
+        i = buf->position;
+        turbodisk_byte(buf->data[i++]);
+        turbodisk_byte(buf->data[i++]);
+        buf->position  = i;
+        firstsector    = 0;
+      }
+
+      if (buf->sendeoi) {
+        /* Last sector is sent byte-by-byte */
+        turbodisk_byte(buf->lastused - buf->position + 2);
+
+        i = buf->position;
+        do {
+          turbodisk_byte(buf->data[i]);
+        } while (i++ < buf->lastused);
+
+        break;
+      } else {
+        /* Send the complete 254 byte buffer */
+        turbodisk_buffer(buf->data + buf->position, 254);
+        if (buf->refill(buf)) {
+          /* Some error, abort */
+          turbodisk_byte(0xff);
+          break;
+        }
+      }
+    }
+  }
+  cleanup_and_free_buffer(buf);
+
+  set_clock(1);
+}
+#endif
+
+
+/*
+ *
+ *  Final Cartridge 3 / EXOS
+ *
+ */
+#ifdef CONFIG_LOADER_FC3
+void load_fc3(uint8_t freezed) {
+  buffer_t *buf;
+  unsigned char step,pos;
+  unsigned char sector_counter = 0;
+  unsigned char block[4];
+
+  buf = find_buffer(0);
+
+  if (!buf) {
+    /* error, abort and pull down CLOCK and DATA to inform the host */
+    set_data(0);
+    set_clock(0);
+    return;
+  }
+
+  /* to make sure the C64 VIC DMA is off */
+  delay_ms(20);
+
+  for(;;) {
+    clk_data_handshake();
+
+    /* Starting buffer position */
+    /* Rewinds by 2 bytes for the first sector and normal loader */
+    pos = 2;
+
+    /* construct first 4-byte block */
+    /* The 0x07 in the first byte is never used */
+    block[1] = sector_counter++;
+    if (buf->sendeoi) {
+      /* Last sector, send number of bytes */
+      block[2] = buf->lastused;
+    } else {
+      /* Send 0 for full sector */
+      block[2] = 0;
+    }
+    /* First data byte */
+    block[3] = buf->data[pos++];
+
+    if (!freezed)
+      delay_us(190);
+    fastloader_fc3_send_block(block);
+
+    /* send the next 64 4-byte-blocks, the last 3 bytes are read behind
+       the buffer, good that we don't have an MMU ;) */
+    for (step = 0; step < 64; step++) {
+      if (!IEC_ATN)
+        goto cleanup;
+
+      if (freezed)
+        clk_data_handshake();
+      else
+        delay_us(190);
+      fastloader_fc3_send_block(buf->data + pos);
+      pos += 4;
+    }
+
+    if (buf->sendeoi) {
+      /* pull down DATA to inform the host about the last sector */
+      set_data(0);
+      break;
+    } else {
+      if (buf->refill(buf)) {
+        /* error, abort and pull down CLOCK and DATA to inform the host */
+        set_data(0);
+        set_clock(0);
+        break;
+      }
+    }
+  }
+
+ cleanup:
+  cleanup_and_free_buffer(buf);
+}
+
+void save_fc3(UNUSED_PARAMETER) {
+  unsigned char n;
+  unsigned char size;
+  unsigned char eof = 0;
+  buffer_t *buf;
+
+  buf = find_buffer(1);
+  /* Check if this is a writable file */
+  if (!buf || !buf->write)
+      return;
+
+  /* to make sure the host pulled DATA low and is ready */
+  delay_ms(5);
+
+  do {
+    set_data(0);
+
+    size = fc3_get_byte();
+
+    if (size == 0) {
+      /* a full block is coming, no EOF */
+      size = 254;
+    }
+    else {
+      /* this will be the last block */
+      size--;
+      eof = 1;
+    }
+
+    for (n = 0; n < size; n++) {
+      /* Flush buffer if full */
+      if (buf->mustflush) {
+        buf->refill(buf);
+        /* the FC3 just ignores things like "disk full", so do we */
+      }
+
+      buf->data[buf->position] = fc3_get_byte();
+
+      if (buf->lastused < buf->position)
+        buf->lastused = buf->position;
+      buf->position++;
+
+      /* Mark buffer for flushing if position wrapped */
+      if (buf->position == 0)
+        buf->mustflush = 1;
+    }
+  }
+  while (!eof);
+
+  cleanup_and_free_buffer(buf);
+}
+
+void load_fc3oldfreeze(UNUSED_PARAMETER) {
+  buffer_t *buf;
+  uint16_t i;
+
+  /* mark as busy */
+  set_srq(0);
+  set_clock(1);
+  set_data(0);
+
+  /* wait until C64 has finished UNLISTEN */
+  delay_us(1);
+  start_timeout(100);
+  while (!IEC_CLOCK && !has_timed_out()) ;
+
+  buf = find_buffer(0);
+
+  if (!buf) {
+    /* error */
+    return;
+  }
+
+  /* sector loop */
+  while (1) {
+    /* send sector data */
+    for (i = 2; i <= buf->lastused; i++) {
+      if (fast_send_byte(buf->data[i])) {
+        /* ATN active, abort */
+        goto done;
+      }
+    }
+
+    /* check for end of file */
+    if (buf->sendeoi)
+      break;
+
+    /* read next sector */
+    if (buf->refill(buf)) {
+      /* error */
+      break;
+    }
+  }
+
+ done:
+  cleanup_and_free_buffer(buf);
+}
+
+#endif
+
+
+/*
+ *
+ *  Dreamload
+ *
+ */
+#ifdef CONFIG_LOADER_DREAMLOAD
+#ifndef HAVE_CLOCK_IRQ
+#  error "Sorry, DreamLoad is only supported on platforms with a CLK interrupt"
+#endif
+
+static void dreamload_send_block(const uint8_t* p) {
+  uint8_t checksum = 0;
+  int     n;
+
+  ATOMIC_BLOCK( ATOMIC_FORCEON ) {
+    // checksum is EOR of all bytes
+    for (n = 0; n < 256; n++)
+      checksum ^= p[n];
+
+    // send status, data bytes and checksum
+    dreamload_send_byte(0);
+    for (n = 0; n < 256; n++) {
+      dreamload_send_byte(*p);
+      p++;
+    }
+    dreamload_send_byte(checksum);
+
+    // release CLOCK and DATA
+    set_clock(1);
+    set_data(1);
+  }
+}
+
+void load_dreamload(UNUSED_PARAMETER) {
+  uint16_t n;
+  uint8_t  type;
+  buffer_t *buf;
+
+  /* disable IRQs while loading the final code, so no jobcodes are read */
+  ATOMIC_BLOCK( ATOMIC_FORCEON ) {
+    set_clock_irq(0);
+    set_atn_irq(0);
+
+    /* Release clock and data */
+    set_clock(1);
+    set_data(1);
+
+    /* wait until the C64 has released clock */
+    while (!IEC_CLOCK) ;
+
+    /* load final drive code, fixed length */
+    type = 0;
+    for (n = 4 * 256; n != 0; --n) {
+      type ^= dreamload_get_byte();
+    }
+
+    if ((type == 0xac) || (type == 0xdc)) {
+      set_atn_irq(1);
+      detected_loader = FL_DREAMLOAD_OLD;
+    } else {
+      set_clock_irq(1);
+    }
+
+    /* mark no job waiting, enable IRQs to get job codes */
+    fl_track = 0xff;
+  }
+
+  buf = alloc_system_buffer();
+  if (!buf) {
+    /* &@$% :-( */
+    goto error;
+  }
+
+  /* Find the start sector of the current directory */
+  dh_t dh;
+  path_t curpath;
+
+  curpath.part = current_part;
+  curpath.dir  = partition[current_part].current_dir;
+  opendir(&dh, &curpath);
+
+  for (;;) {
+
+    while (fl_track == 0xff) {
+      if (check_keys()) {
+        fl_track = 0;
+        fl_sector = 0;
+        break;
+      }
+    }
+
+    set_busy_led(1);
+
+    /* Output the track/sector for debugging purposes */
+    uart_puthex(fl_track);
+    uart_putc('/');
+    uart_puthex(fl_sector);
+    uart_putcrlf();
+
+    if (fl_track == 0) {
+      // check special commands first
+      if (fl_sector == 0) {
+        // end loader
+        set_busy_led(0);
+        break;
+      } else if (fl_sector == 1) {
+        // command: load first sector of directory
+        // slow down 18/1 loading, so diskswap has a higher chance
+        tick_t targettime = ticks + MS_TO_TICKS(1000);
+        while (time_before(ticks,targettime)) ;
+
+        read_sector(buf, current_part, dh.dir.d64.track, dh.dir.d64.sector);
+        dreamload_send_block(buf->data);
+      }
+      else {
+        // fl_sector == 2 is canonical
+        set_busy_led(0);
+      }
+    } else {
+      read_sector(buf, current_part, fl_track, fl_sector);
+      dreamload_send_block(buf->data);
+    }
+    fl_track = 0xff;
+  }
+
+error:
+  free_buffer(buf);
+  set_clock_irq(0);
+  set_atn_irq(0);
+}
+#endif
+
+
+/*
+ *
+ * ULoad Model 3
+ *
+ */
+#ifdef CONFIG_LOADER_ULOAD3
+static uint8_t uload3_transferchain(uint8_t track, uint8_t sector, uint8_t saving) {
+  buffer_t *buf;
+  uint8_t i,bytecount,first;
+
+  first = 1;
+
+  buf = alloc_buffer();
+  if (!buf) {
+    uload3_send_byte(0xff);
+    return 0;
+  }
+
+  do {
+    /* read current sector */
+    read_sector(buf, current_part, track, sector);
+    if (current_error != 0) {
+      uload3_send_byte(0xff);
+      return 0;
+    }
+
+    /* send number of bytes in sector */
+    if (buf->data[0] == 0) {
+      bytecount = buf->data[1]-1;
+    } else {
+      bytecount = 254;
+    }
+    uload3_send_byte(bytecount);
+
+    if (saving) {
+      if (first) {
+        /* send load address */
+        first = 0;
+        uload3_send_byte(buf->data[2]);
+        uload3_send_byte(buf->data[3]);
+        i = 2;
+      } else
+        i = 0;
+
+      /* receive sector contents */
+      for (;i<bytecount;i++) {
+        int16_t tmp = uload3_get_byte();
+        if (tmp < 0)
+          return 1;
+
+        buf->data[i+2] = tmp;
+      }
+
+      /* write sector */
+      write_sector(buf, current_part, track, sector);
+      if (current_error != 0) {
+        uload3_send_byte(0xff);
+        return 0;
+      }
+    } else {
+      /* reading: send sector contents */
+      for (i=0;i<bytecount;i++)
+        uload3_send_byte(buf->data[i+2]);
+    }
+
+    track  = buf->data[0];
+    sector = buf->data[1];
+  } while (track != 0);
+
+  /* send end marker */
+  uload3_send_byte(0);
+
+  free_buffer(buf);
+  return 0;
+}
+
+void load_uload3(UNUSED_PARAMETER) {
+  int16_t cmd,tmp;
+  uint8_t t,s;
+  dh_t dh;
+  path_t curpath;
+
+  curpath.part = current_part;
+  curpath.dir  = partition[current_part].current_dir;
+  opendir(&dh, &curpath);
+
+  while (1) {
+    /* read command */
+    cmd = uload3_get_byte();
+    if (cmd < 0) {
+      /* ATN received */
+      break;
+    }
+
+    switch (cmd) {
+    case 1: /* load a file */
+    case 2: /* save and replace a file */
+      tmp = uload3_get_byte();
+      if (tmp < 0)
+        return;
+      t = tmp;
+
+      tmp = uload3_get_byte();
+      if (tmp < 0)
+        /* ATN received */
+        return;
+      s = tmp;
+
+      if (uload3_transferchain(t,s, (cmd == 2)))
+        return;
+
+      break;
+
+    case '$':
+      /* read directory */
+      uload3_transferchain(dh.dir.d64.track, dh.dir.d64.sector, 0);
+      break;
+
+    default:
+      /* unknown command */
+      uload3_send_byte(0xff);
+      break;
+    }
+  }
+}
+#endif
+
+
+/*
+ *
+ * eload
+ *
+ */
+#ifdef CONFIG_LOADER_ELOAD1
+void load_eload1(UNUSED_PARAMETER) {
+  buffer_t *buf;
+  int16_t cmd;
+  uint8_t count, pos, end;
+
+  while (1) {
+    /* read command */
+    cmd = uload3_get_byte();
+    if (cmd < 0) {
+      /* ATN received */
+      break;
+    }
+
+    switch (cmd) {
+    case 1: /* load a file */
+      buf = find_buffer(0);
+
+      if (!buf) {
+        if (!IEC_ATN)
+          return;
+        uload3_send_byte(0xff); /* error */
+        return;
+      }
+
+      end = 0;
+      do {
+        count = buf->lastused - 1;
+        if (!IEC_ATN)
+          return;
+        uload3_send_byte(count);
+        pos = 2;
+        while (count--) {
+          if (!IEC_ATN)
+            return;
+          uload3_send_byte(buf->data[pos++]);
+        }
+        if (buf->sendeoi) {
+          uload3_send_byte(0); /* EOF */
+          end = 1;
+        }
+        else if (buf->refill(buf)) {
+          uload3_send_byte(0xff); /* error */
+          end = 1;
+        }
+      } while (!end);
+      break;
+
+    default:
+      /* unknown command */
+      uload3_send_byte(0xff);
+      break;
+    }
+  }
+}
+
+#endif
+
+
+/*
+ *
+ *  GIJoe/EPYX common code
+ *
+ */
+#if defined(CONFIG_LOADER_GIJOE) || defined(CONFIG_LOADER_EPYXCART)
+/* Returns the byte read or <0 if the user aborts */
+/* Aborting on ATN is not reliable for at least one version */
+static int16_t gijoe_read_byte(void) {
+  uint8_t i;
+  uint8_t value = 0;
+
+  for (i=0;i<4;i++) {
+    while (IEC_CLOCK)
+      if (check_keys())
+        return -1;
+
+    value >>= 1;
+
+    delay_us(3);
+    if (!IEC_DATA)
+      value |= 0x80;
+
+    while (!IEC_CLOCK)
+      if (check_keys())
+        return -1;
+
+    value >>= 1;
+
+    delay_us(3);
+    if (!IEC_DATA)
+      value |= 0x80;
+  }
+
+  return value;
+}
+#endif
+
+
+/*
+ *
+ * GI Joe
+ *
+ */
+#ifdef CONFIG_LOADER_GIJOE
+static void gijoe_send_byte(uint8_t value) {
+  uint8_t i;
+
+  ATOMIC_BLOCK( ATOMIC_FORCEON ) {
+    for (i=0;i<4;i++) {
+      /* Wait for clock high */
+      while (!IEC_CLOCK) ;
+
+      set_data(value & 1);
+      value >>= 1;
+
+      /* Wait for clock low */
+      while (IEC_CLOCK) ;
+
+      set_data(value & 1);
+      value >>= 1;
+    }
+  }
+}
+
+void load_gijoe(UNUSED_PARAMETER) {
+  buffer_t *buf;
+
+  set_data(1);
+  set_clock(1);
+  set_atn_irq(0);
+
+  /* Wait until the bus has settled */
+  delay_ms(10);
+  while (!IEC_DATA || !IEC_CLOCK) ;
+
+  while (1) {
+    /* Handshake */
+    set_clock(0);
+
+    while (IEC_DATA)
+      if (check_keys())
+        return;
+
+    set_clock(1);
+    uart_flush();
+
+    /* First byte is ignored */
+    if (gijoe_read_byte() < 0)
+      return;
+
+    /* Read two file name characters */
+    command_buffer[0] = gijoe_read_byte();
+    command_buffer[1] = gijoe_read_byte();
+
+    set_clock(0);
+
+    command_buffer[2] = '*';
+    command_buffer[3] = 0;
+    command_length = 3;
+
+    /* Open the file */
+    file_open(0);
+    uart_flush();
+    buf = find_buffer(0);
+    if (!buf) {
+      set_clock(1);
+      gijoe_send_byte(0xfe);
+      gijoe_send_byte(0xfe);
+      gijoe_send_byte(0xac);
+      gijoe_send_byte(0xf7);
+      continue;
+    }
+
+    /* file is open, transfer */
+    while (1) {
+      uint8_t i = buf->position;
+
+      set_clock(1);
+      delay_us(2);
+
+      do {
+        if (buf->data[i] == 0xac)
+          gijoe_send_byte(0xac);
+
+        gijoe_send_byte(buf->data[i]);
+      } while (i++ < buf->lastused);
+
+      /* Send end marker and wait for the next name */
+      if (buf->sendeoi) {
+        gijoe_send_byte(0xac);
+        gijoe_send_byte(0xff);
+
+        cleanup_and_free_buffer(buf);
+        break;
+      }
+
+      /* Send "another sector following" marker */
+      gijoe_send_byte(0xac);
+      gijoe_send_byte(0xc3);
+      delay_us(50);
+      set_clock(0);
+
+      /* Read next block */
+      if (buf->refill(buf)) {
+        /* Send error marker */
+        gijoe_send_byte(0xfe);
+        gijoe_send_byte(0xfe);
+        gijoe_send_byte(0xac);
+        gijoe_send_byte(0xf7);
+
+        cleanup_and_free_buffer(buf);
+        break;
+      }
+    }
+  }
+}
+#endif
+
+
+/*
+ *
+ * Epyx Fast Load Cartridge
+ *
+ */
+#ifdef CONFIG_LOADER_EPYXCART
+void load_epyxcart(UNUSED_PARAMETER) {
+  uint8_t checksum = 0;
+  int16_t b,i;
+
+  uart_flush(); // Pending output can mess up our timing
+
+  /* Initial handshake */
+  set_data(1);
+  set_clock(0);
+  set_atn_irq(0);
+
+  while (IEC_DATA)
+    if (!IEC_ATN)
+      return;
+
+  set_clock(1);
+
+  /* Receive and checksum stage 2 */
+  for (i=0;i<256;i++) {
+    b = gijoe_read_byte();
+
+    if (b < 0)
+      return;
+
+    if (i < 237)
+      /* Stage 2 has some junk bytes at the end, ignore them */
+      checksum ^= b;
+  }
+
+  /* Check for known stage2 loaders */
+  if (checksum != 0x91 && checksum != 0x5b) {
+    return;
+  }
+
+  /* Receive file name */
+  i = gijoe_read_byte();
+  if (i < 0) {
+    return;
+  }
+
+  command_length = i;
+
+  do {
+    b = gijoe_read_byte();
+    if (b < 0)
+      return;
+
+    command_buffer[--i] = b;
+  } while (i > 0);
+
+  set_clock(0);
+
+  /* Open the file */
+  file_open(0);
+
+  buffer_t *buf = find_buffer(0);
+  if (buf == NULL) {
+    set_clock(1);
+    return;
+  }
+
+  /* Transfer data */
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    while (1) {
+      set_clock(1);
+      set_data(1);
+
+      /* send number of bytes in sector */
+      if (epyxcart_send_byte(buf->lastused-1)) {
+        break;
+      }
+
+      /* send data */
+      for (i=2;i<=buf->lastused;i++) {
+        if (epyxcart_send_byte(buf->data[i])) {
+          break;
+        }
+      }
+
+      if (!IEC_ATN)
+        break;
+
+      /* exit after final sector */
+      if (buf->sendeoi)
+        break;
+
+      /* read next sector */
+      set_clock(0);
+      if (buf->refill(buf))
+        break;
+    }
+  }
+
+  set_clock(1);
+  set_data(1);
+  cleanup_and_free_buffer(buf);
+}
+#endif
+
+
+/*
+ *
+ *  GEOS
+ *
+ */
+#ifdef CONFIG_LOADER_GEOS
+
+/* Receive a fixed-length data block */
+static void geos_receive_datablock(void *data_, uint16_t length) {
+  uint8_t *data = (uint8_t*)data_;
+
+  data += length-1;
+
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    while (!IEC_CLOCK);
+    set_data(1);
+    while (length--)
+      *data-- = fast_get_byte();
+    set_data(0);
+  }
+}
+
+/* Receive a data block from the computer */
+static void geos_receive_lenblock(uint8_t *data) {
+  uint8_t exitflag = 0;
+  uint16_t length = 0;
+
+  /* Receive data length */
+  while (!IEC_CLOCK && IEC_ATN)
+    if (check_keys()) {
+      /* User-requested exit */
+      exitflag = 1;
+      break;
+    }
+
+  /* Exit if ATN is low */
+  if (!IEC_ATN || exitflag) {
+    *data++ = 0;
+    *data   = 0;
+    return;
+  }
+
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    set_data(1);
+    length = fast_get_byte();
+    set_data(0);
+  }
+
+  if (length == 0)
+    length = 256;
+
+  geos_receive_datablock(data, length);
+}
+
+/* Send a single byte to the computer after waiting for CLOCK high */
+static void geos_transmit_byte_wait(uint8_t byte) {
+  ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
+    /* Wait until clock is high */
+    while (!IEC_CLOCK) ;
+    set_data(1);
+
+    /* Send byte */
+    fast_send_byte(byte);
+    set_clock(1);
+    set_data(0);
+  }
+
+  delay_us(25); // educated guess
+}
+
+/* Send data block to computer */
+static void geos_transmit_buffer_s3(uint8_t *data, uint16_t len) {
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    /* Wait until clock is high */
+    while (!IEC_CLOCK) ;
+    set_data(1);
+
+    /* Send data block */
+    uint16_t i = len;
+    data += len - 1;
+
+    while (i--) {
+      fast_send_byte(*data--);
+    }
+
+    set_clock(1);
+    set_data(0);
+
+    delay_us(15); // guessed
+  }
+}
+
+static void geos_transmit_buffer_s2(uint8_t *data, uint16_t len) {
+  /* Send length byte */
+  geos_transmit_byte_wait(len);
+
+  /* the rest is the same as in stage 3 */
+  geos_transmit_buffer_s3(data, len);
+}
+
+/* Send job status to computer */
+static void geos_transmit_status(void) {
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    /* Send a single 1 byte as length indicator */
+    geos_transmit_byte_wait(1);
+
+    /* Send (faked) job result code */
+    if (current_error == 0)
+      geos_transmit_byte_wait(1);
+    else
+      if (current_error == ERROR_WRITE_PROTECT)
+        geos_transmit_byte_wait(8);
+      else
+        geos_transmit_byte_wait(2); // random non-ok job status
+  }
+}
+
+/* GEOS READ operation */
+static void geos_read_sector(uint8_t track, uint8_t sector, buffer_t *buf) {
+  uart_putc('R');
+  uart_puthex(track);
+  uart_putc('/');
+  uart_puthex(sector);
+  uart_putcrlf();
+
+  read_sector(buf, current_part, track, sector);
+}
+
+/* GEOS WRITE operation */
+static void geos_write_sector_41(uint8_t track, uint8_t sector, buffer_t *buf) {
+  uart_putc('W');
+  uart_puthex(track);
+  uart_putc('/');
+  uart_puthex(sector);
+  uart_putcrlf();
+
+  /* Provide "unwritten data present" feedback */
+  mark_buffer_dirty(buf);
+
+  /* Receive data */
+  geos_receive_lenblock(buf->data);
+
+  /* Write to image */
+  write_sector(buf, current_part, track, sector);
+
+  /* Reset "unwritten data" feedback */
+  mark_buffer_clean(buf);
+}
+
+/* GEOS WRITE_71 operation */
+static void geos_write_sector_71(uint8_t track, uint8_t sector, buffer_t *buf) {
+  uart_putc('W');
+  uart_puthex(track);
+  uart_putc('/');
+  uart_puthex(sector);
+  uart_putcrlf();
+
+  /* Provide "unwritten data present" feedback */
+  mark_buffer_dirty(buf);
+
+  /* Receive data */
+  geos_receive_datablock(buf->data, 256);
+
+  /* Write to image */
+  write_sector(buf, current_part, track, sector);
+
+  /* Send status */
+  geos_transmit_status();
+
+  /* Reset "unwritten data" feedback */
+  mark_buffer_clean(buf);
+}
+
+
+/* GEOS stage 2/3 loader */
+void load_geos(UNUSED_PARAMETER) {
+  buffer_t *cmdbuf = alloc_system_buffer();
+  buffer_t *databuf = alloc_system_buffer();
+  uint8_t *cmddata;
+  uint16_t cmd;
+
+  if (!cmdbuf || !databuf)
+    return;
+
+  cmddata = cmdbuf->data;
+
+  /* Initial handshake */
+  uart_flush();
+  delay_ms(1);
+  set_data(0);
+  while (IEC_CLOCK) ;
+
+  while (1) {
+    /* Receive command block */
+    set_busy_led(0);
+    geos_receive_lenblock(cmddata);
+    set_busy_led(1);
+
+    //uart_trace(cmddata, 0, 4);
+
+    cmd = cmddata[0] | (cmddata[1] << 8);
+
+    switch (cmd) {
+    case 0x0320: // 1541 stage 3 transmit
+      geos_transmit_buffer_s3(databuf->data, 256);
+      geos_transmit_status();
+      break;
+
+    case 0x031f: // 1571; 1541 stage 2 status (only seen in GEOS 1.3)
+                 // 1581 transmit
+      if (detected_loader == FL_GEOS_S23_1581) {
+        if (cmddata[2] & 0x80) {
+          geos_transmit_buffer_s3(databuf->data, 2);
+        } else {
+          geos_transmit_buffer_s3(databuf->data, 256);
+        }
+      }
+      geos_transmit_status();
+      break;
+
+    case 0x0325: // 1541 stage 3 status
+    case 0x032b: // 1581 status
+      geos_transmit_status();
+      break;
+
+    case 0x0000: // internal QUIT
+    case 0x0412: // 1541 stage 2 quit
+    case 0x0420: // 1541 stage 3 quit
+    case 0x0457: // 1581 quit
+    case 0x0475: // 1571 stage 3 quit
+      while (!IEC_CLOCK) ;
+      set_data(1);
+      return;
+
+    case 0x0432: // 1541 stage 2 transmit
+      if (current_error != 0) {
+        geos_transmit_status();
+      } else {
+        geos_transmit_buffer_s2(databuf->data, 256);
+      }
+      break;
+
+    case 0x0439: // 1541 stage 3 set address
+    case 0x04a5: // 1571 stage 3 set address
+      // Note: identical in stage 2, address 0428, probably unused
+      device_address = cmddata[2] & 0x1f;
+      display_address(device_address);
+      break;
+
+    case 0x049b: // 1581 initialize
+    case 0x04b9: // 1581 flush
+    case 0x04dc: // 1541 stage 3 initialize
+    case 0x0504: // 1541 stage 2 initialize - only seen in GEOS 1.3
+    case 0x057e: // 1571 initialize
+      /* Doesn't do anything that needs to be reimplemented */
+      break;
+
+    case 0x057c: // 1541 stage 2/3 write
+      geos_write_sector_41(cmddata[2], cmddata[3], databuf);
+      break;
+
+    case 0x058e: // 1541 stage 2/3 read
+    case 0x04cc: // 1581 read
+      geos_read_sector(cmddata[2] & 0x7f, cmddata[3], databuf);
+      break;
+
+    case 0x04af: // 1571 read_and_send
+      geos_read_sector(cmddata[2], cmddata[3], databuf);
+      geos_transmit_buffer_s3(databuf->data, 256);
+      geos_transmit_status();
+      break;
+
+    case 0x047c: // 1581 write
+    case 0x05fe: // 1571 write
+      geos_write_sector_71(cmddata[2], cmddata[3], databuf);
+      break;
+
+    default:
+      uart_puts_P(PSTR("unknown:\r\n"));
+      uart_trace(cmddata, 0, 4);
+      return;
+    }
+  }
+}
+
+/* Stage 1 only - send a sector chain to the computer */
+static void geos_send_chain(uint8_t track, uint8_t sector,
+                            buffer_t *buf, uint8_t *key) {
+  uint8_t bytes;
+  uint8_t *keyptr,*dataptr;
+
+  do {
+    /* Read sector - no error recovery on computer side */
+    read_sector(buf, current_part, track, sector);
+
+    /* Decrypt contents if we have a key */
+    if (key != NULL) {
+      keyptr = key;
+      dataptr = buf->data + 2;
+      bytes = 254;
+      while (bytes--)
+        *dataptr++ ^= *keyptr++;
+    }
+
+    /* Read link pointer */
+    track = buf->data[0];
+    sector = buf->data[1];
+
+    if (track == 0) {
+      bytes = sector - 1;
+    } else {
+      bytes = 254;
+    }
+
+    /* Send buffer contents */
+    geos_transmit_buffer_s2(buf->data + 2, bytes);
+  } while (track != 0);
+
+  geos_transmit_byte_wait(0);
+}
+
+static const PROGMEM uint8_t geos64_chains[] = {
+  19, 13,
+  20, 15,
+  20, 17,
+  0
+};
+
+static const PROGMEM uint8_t geos128_chains[] = {
+  19, 12,
+  20, 15,
+  23, 6,
+  24, 4,
+  0
+};
+
+/* GEOS 64 stage 1 loader */
+void load_geos_s1(uint8_t version) {
+  buffer_t *encrbuf = find_buffer(BUFFER_SYS_CAPTURE1);
+  buffer_t *databuf = alloc_buffer();
+  uint8_t *encdata = NULL;
+  uint8_t track, sector;
+  const uint8_t *chainptr;
+
+  if (!encrbuf || !databuf)
+    return;
+
+  if (version == 0) {
+    chainptr = geos64_chains;
+  } else {
+    chainptr = geos128_chains;
+  }
+
+  /* Initial handshake */
+  uart_flush();
+  delay_ms(1);
+  set_data(0);
+  while (IEC_CLOCK) ;
+
+  /* Send sector chains */
+  while (1) {
+    track = pgm_read_byte(chainptr++);
+
+    if (track == 0)
+      break;
+
+    sector = pgm_read_byte(chainptr++);
+
+    /* Transfer sector chain */
+    geos_send_chain(track, sector, databuf, encdata);
+
+    /* Turn on decryption after the first chain */
+    encdata = encrbuf->data;
+  }
+
+  /* Done! */
+  free_buffer(encrbuf);
+  set_data(1);
+}
+
+#endif
+
+/*
+ *
+ *  Wheels
+ *
+ */
+#ifdef CONFIG_LOADER_WHEELS
+
+/* Send data block to computer */
+static void wheels44_transmit_buffer(uint8_t *data, uint16_t len) {
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    /* Wait until clock is high */
+    while (!IEC_CLOCK) ;
+    set_data(1);
+
+    /* Send data block */
+    uint16_t i = len;
+    data += len - 1;
+
+    while (i--) {
+      fast_send_byte(*data--);
+    }
+
+    set_clock(1);
+    set_data(1);
+
+    delay_us(5);
+    while (IEC_CLOCK) ;
+
+    set_data(0);
+    delay_us(15); // guessed
+  }
+}
+
+/* Send a single byte to the computer after waiting for CLOCK high */
+static void wheels_transmit_byte_wait(uint8_t byte) {
+  if (detected_loader == FL_WHEELS44_S2_1581) {
+    ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
+      /* Wait until clock is high */
+      while (!IEC_CLOCK) ;
+      set_data(1);
+
+      /* Send byte */
+      fast_send_byte(byte);
+      set_clock(1);
+      set_data(1);
+
+      delay_us(5);
+      while (IEC_CLOCK) ;
+      set_data(0);
+    }
+
+    delay_us(15); // educated guess
+  } else {
+    geos_transmit_byte_wait(byte);
+    delay_us(15); // educated guess
+    while (IEC_CLOCK) ;
+  }
+}
+
+/* Send a fixed-length data block */
+static void wheels_transmit_datablock(void *data_, uint16_t length) {
+  uint8_t *data = (uint8_t*)data_;
+
+  if (detected_loader == FL_WHEELS44_S2_1581) {
+    wheels44_transmit_buffer(data, length);
+  } else {
+    geos_transmit_buffer_s3(data, length);
+
+    while (IEC_CLOCK) ;
+  }
+}
+
+/* Receive a fixed-length data block */
+static void wheels_receive_datablock(void *data_, uint16_t length) {
+  uint8_t *data = (uint8_t*)data_;
+
+  data += length-1;
+
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    while (!IEC_CLOCK) ;
+    set_data(1);
+    while (length--)
+      *data-- = fast_get_byte();
+
+    if (detected_loader == FL_WHEELS44_S2 ||
+        detected_loader == FL_WHEELS44_S2_1581)
+      while (IEC_CLOCK) ;
+
+    set_data(0);
+  }
+}
+
+/* Wheels STATUS operation (030f) */
+static void wheels_transmit_status(void) {
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    /* Send (faked) job result code */
+    if (current_error == 0)
+      wheels_transmit_byte_wait(1);
+    else
+      if (current_error == ERROR_WRITE_PROTECT)
+        wheels_transmit_byte_wait(8);
+      else
+        wheels_transmit_byte_wait(2); // random non-ok job status
+  }
+}
+
+/* Wheels CHECK_CHANGE operation (031b) */
+static void wheels_check_diskchange(void) {
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    if (dir_changed) {
+      /* Disk has changed */
+      wheels_transmit_byte_wait(3);
+    } else {
+      /* Disk not changed */
+      if (detected_loader == FL_WHEELS44_S2 &&
+          (partition[current_part].imagetype & D64_TYPE_MASK) == D64_TYPE_D71) {
+        wheels_transmit_byte_wait(0x80);
+      } else {
+        wheels_transmit_byte_wait(0);
+      }
+    }
+
+    dir_changed = 0;
+    while (IEC_CLOCK) ;
+  }
+}
+
+/* Wheels WRITE operation (0306) */
+static void wheels_write_sector(uint8_t track, uint8_t sector, buffer_t *buf) {
+  uart_putc('W');
+  uart_puthex(track);
+  uart_putc('/');
+  uart_puthex(sector);
+  uart_putcrlf();
+
+  /* Provide "unwritten data present" feedback */
+  mark_buffer_dirty(buf);
+
+  /* Receive data */
+  wheels_receive_datablock(buf->data, 256);
+
+  /* Write to image */
+  write_sector(buf, current_part, track, sector);
+
+  /* Send status */
+  wheels_transmit_status();
+
+  /* Reset "unwritten data" feedback */
+  mark_buffer_clean(buf);
+}
+
+/* Wheels READ operation (0309) */
+static void wheels_read_sector(uint8_t track, uint8_t sector, buffer_t *buf, uint16_t bytes) {
+  uart_putc('R');
+  uart_puthex(track);
+  uart_putc('/');
+  uart_puthex(sector);
+  uart_putcrlf();
+
+  read_sector(buf, current_part, track, sector);
+  wheels_transmit_datablock(buf->data, bytes);
+  wheels_transmit_status();
+}
+
+/* Wheels NATIVE_FREE operation (0312) */
+static void wheels_native_free(void) {
+  /* Cheat: Ignore the limits set by the C64 */
+  uint16_t freeblocks;
+
+  freeblocks = disk_free(current_part);
+  wheels_transmit_datablock(&freeblocks, 2);
+  wheels_transmit_status();
+}
+
+/* Wheels GET_CURRENT_PART_DIR (0315) */
+static void wheels_get_current_part_dir(void) {
+  uint8_t data[3];
+
+  data[0] = partition[current_part].current_dir.dxx.track;
+  data[1] = partition[current_part].current_dir.dxx.sector;
+  data[2] = current_part+1;
+  wheels_transmit_datablock(&data, 3);
+}
+
+/* Wheels SET_CURRENT_PART_DIR operation (0318) */
+static void wheels_set_current_part_dir(void) {
+  uint8_t data[3];
+
+  wheels_receive_datablock(&data, 3);
+
+  if (data[2] != 0)
+    current_part = data[2]-1;
+
+  partition[current_part].current_dir.dxx.track  = data[0];
+  partition[current_part].current_dir.dxx.sector = data[1];
+}
+
+/* -------- */
+
+/* Wheels stage 1 loader */
+void load_wheels_s1(const uint8_t version) {
+  buffer_t *buf;
+
+  uart_flush();
+  delay_ms(2);
+  while (IEC_CLOCK) ;
+  set_data(0);
+
+  /* copy file name to command buffer */
+  if (version == 0) {
+    ustrcpy_P(command_buffer, PSTR("SYSTEM1"));
+  } else {
+    ustrcpy_P(command_buffer, PSTR("128SYSTEM1"));
+  }
+  command_length = ustrlen(command_buffer);
+
+  /* open file */
+  file_open(0);
+  buf = find_buffer(0);
+  if (!buf)
+    goto wheels_exit;
+
+  while (1) {
+    /* Transmit current sector */
+    wheels_transmit_datablock(buf->data, 256);
+
+    /* Check for last sector */
+    if (buf->sendeoi)
+      break;
+
+    /* Advance to next sector */
+    if (buf->refill(buf)) {
+      /* Error, abort - original loader doesn't handle this */
+      break;
+    }
+  }
+
+ wheels_exit:
+  while (!IEC_CLOCK) ;
+  set_data(1);
+  set_clock(1);
+  if (buf) {
+    cleanup_and_free_buffer(buf);
+  }
+}
+
+/* Wheels stage 2 loader */
+void load_wheels_s2(UNUSED_PARAMETER) {
+  struct {
+    uint16_t address;
+    uint8_t  track;
+    uint8_t  sector;
+  } cmdbuffer;
+  buffer_t *databuf = alloc_system_buffer();
+
+  if (!databuf)
+    return;
+
+  /* Initial handshake */
+  uart_flush();
+  delay_ms(1);
+  while (IEC_CLOCK) ;
+  set_data(0);
+  set_clock(1);
+  delay_us(3);
+
+  while (1) {
+    /* Receive command block - redundant clock line check for check_keys */
+    while (!IEC_CLOCK && IEC_ATN) {
+      if (check_keys()) {
+        /* User-requested exit */
+        return;
+      }
+    }
+
+    wheels_receive_datablock(&cmdbuffer, 4);
+    set_busy_led(1);
+    //uart_trace(&cmdbuffer, 0, 4);
+
+    switch (cmdbuffer.address & 0xff) {
+    case 0x03: // QUIT
+      while (!IEC_CLOCK) ;
+      set_data(1);
+      return;
+
+    case 0x06: // WRITE
+      wheels_write_sector(cmdbuffer.track, cmdbuffer.sector, databuf);
+      break;
+
+    case 0x09: // READ
+      wheels_read_sector(cmdbuffer.track, cmdbuffer.sector, databuf, 256);
+      break;
+
+    case 0x0c: // READLINK
+      wheels_read_sector(cmdbuffer.track, cmdbuffer.sector, databuf, 2);
+      break;
+
+    case 0x0f: // STATUS
+      wheels_transmit_status();
+      break;
+
+    case 0x12: // NATIVE_FREE
+      wheels_native_free();
+      break;
+
+    case 0x15: // GET_CURRENT_PART_DIR
+      wheels_get_current_part_dir();
+      break;
+
+    case 0x18: // SET_CURRENT_PART_DIR
+      wheels_set_current_part_dir();
+      break;
+
+    case 0x1b: // CHECK_CHANGE
+      wheels_check_diskchange();
+      break;
+
+    default:
+      uart_puts_P(PSTR("unknown:\r\n"));
+      uart_trace(&cmdbuffer, 0, 4);
+      return;
+    }
+
+    set_busy_led(0);
+
+    /* wait until clock is low */
+    while (IEC_CLOCK && IEC_ATN) {
+      if (check_keys()) {
+        /* User-requested exit */
+        return;
+      }
+    }
+  }
+}
+
+#endif
+
+
+/*
+ *
+ * Nippon Loader
+ *
+ */
+#ifdef CONFIG_LOADER_NIPPON
+
+/* protocol sync: wait for Clock low, if ATN is also low, then return signal to resync */
+static uint8_t nippon_atn_clock_handshake(void) {
+  if (IEC_ATN) {
+    while(IEC_CLOCK) ;
+    return 1;
+  } else {
+    set_clock(0);
+    while(IEC_ATN) ;
+    return 0;
+  }
+}
+
+
+/* reads a byte from IEC, if loader is out of sync return false */
+static uint8_t nippon_read_byte(uint8_t *b) {
+  uint8_t tmp = 0, i;
+
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    set_clock(1);
+    set_data(1);
+    delay_us(3); // allow for slow rise times
+    for (i=8; i; i--) {
+      if (! nippon_atn_clock_handshake())
+        return 0;
+      tmp = (tmp >> 1) | (IEC_DATA ? 0 : 128);
+      while(!IEC_CLOCK) ;
+    }
+    set_clock(0);
+    set_data(1);
+    *b = tmp;
+    return 1;
+  }
+  return 1; // not reached
+}
+
+/* sends a byte via IEC, if loader is out of sync return false */
+static uint8_t nippon_send_byte(uint8_t b) {
+  uint8_t i;
+
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    set_clock(1);
+    delay_us(3); // allow for slow rise times
+    for (i=8; i; i--) {
+      if (! nippon_atn_clock_handshake())
+        return 0;
+      set_data(b & 1);
+      b = b >> 1;
+      while(!IEC_CLOCK) ;
+    }
+    set_clock(0);
+    set_data(1);
+    return 1;
+  }
+  return 1; // not reached
+}
+
+/* nippon idle loop */
+void load_nippon(UNUSED_PARAMETER) {
+  uint8_t t, s, i=0, j;
+  buffer_t *buf;
+
+  /* init */
+  uart_puts_P(PSTR("NIPPON"));
+  set_atn_irq(0);
+  buf = alloc_system_buffer();
+  if (!buf) {
+    uart_puts_P(PSTR("BUF ERR")); uart_putcrlf();
+    return;
+  }
+
+  /* loop until IEC master sends a track greater than $80 = exit code */
+  while (1) {
+
+    /* initial state */
+    /* timing is critical for ATN/CLK here, endless loop in $0bf0 at the cevi
+     * raise ATN CLK quick, before setting LEDs output to serial console
+     */
+    set_data(1);
+    set_clock(1);
+    set_busy_led(0);
+    uart_putcrlf(); uart_putc('L'); // idle loop entered
+
+    /* wait for IEC master or human master to command us something */
+    while(IEC_ATN && !(i = check_keys())) ;
+    if (i)
+      break; /* user requested exit */
+    set_clock(0);
+    set_busy_led(1);
+
+    /* fetch command, sector and track, on failure resync/reinit protocol
+     * if track > 128 exit loader
+     * if sector > 128 read sector, else write */
+    while(!IEC_ATN) ;
+    if (! nippon_read_byte(&t))
+      continue;
+    uart_putc('T');
+    uart_puthex(t);
+    if (t & 128)
+      break;
+
+    if (! nippon_read_byte(&s))
+      continue;
+    uart_putc('S');
+    uart_puthex(s & 0x7f);
+
+    if (s & 128) {
+      /* read sector */
+      s &= 0x7f;
+      uart_putc('R');
+      read_sector(buf, current_part, t, s);
+      i = 0;
+      do {
+        if (! nippon_send_byte(buf->data[i]))
+          break;
+        i++;
+      } while (i);
+    }
+    else {
+      /* write sector */
+      uart_putc('W');
+      i = 0;
+      do {
+        if (! (j = nippon_read_byte(&(buf->data[i]))))
+          break;
+        i++;
+      } while (i);
+      if (!j)
+        break;
+      write_sector(buf, current_part, t, s);
+    }
+  }
+
+  /* exit */
+
+  free_buffer(buf);
+  uart_puts_P(PSTR("NEXT")); uart_putcrlf();
+}
+#endif
+
+#ifdef CONFIG_LOADER_AR6
+/*
+ *
+ * Action Replay 6 loaders/savers
+ *
+ */
+
+/* 1581 loader */
+void load_ar6_1581(UNUSED_PARAMETER) {
+  buffer_t *buf;
+  uint16_t i;
+
+  buf = find_buffer(0);
+  if (!buf) {
+    /* The file should've been open? */
+    return;
+  }
+
+  set_clock(0);
+  set_data(1);
+  delay_ms(1);
+
+  while (1) {
+    /* Send number of bytes in sector */
+    ar6_1581_send_byte(buf->lastused-1);
+
+    /* Send bytes in sector */
+    for (i=2; i<=buf->lastused; i++)
+      ar6_1581_send_byte(buf->data[i]);
+
+    /* Check for end of file */
+    if (buf->sendeoi)
+      break;
+
+    /* Read next sector */
+    if (buf->refill(buf)) {
+      /* Error, end transmission */
+      break;
+    }
+  }
+
+  /* Send end marker */
+  ar6_1581_send_byte(0);
+  delay_ms(1);
+  set_clock(1);
+  set_data(1);
+}
+
+/* 1581 saver */
+void save_ar6_1581(UNUSED_PARAMETER) {
+  buffer_t *buf;
+  uint8_t i;
+
+  buf = find_buffer(1);
+
+  if (!buf) {
+    /* File isn't open */
+    return;
+  }
+
+  set_clock(0);
+  set_data(1);
+  delay_ms(1);
+
+  do {
+    mark_buffer_dirty(buf);
+
+    /* Receive sector */
+    i = 0;
+    do {
+      buf->data[i] = ar6_1581p_get_byte();
+      i++;
+    } while (i != 0);
+
+    /* Set end */
+    // FIXME: Although this works, it is not exactly clean:
+    //        The code here should update lastused and mustflush.
+    if (buf->data[0] == 0) {
+      buf->position = buf->data[1];
+    } else
+      buf->position = 0;
+
+    /* Write data */
+    if (buf->refill(buf))
+      break;
+  } while (buf->data[0] != 0);
+
+  cleanup_and_free_buffer(buf);
+}
+
+#endif
+
+
+#ifdef PARALLEL_ENABLED
+/*
+ *
+ *  Generic parallel speeder
+ *
+ */
+
+/* parallel handshake interrupt handler */
+PARALLEL_HANDLER {
+  parallel_rxflag = 1;
+}
+#endif
+
+
+#ifdef CONFIG_PARALLEL_DOLPHIN
+/*
+ *
+ *  DolphinDOS
+ *
+ */
+
+/**
+ * _dolphin_getc - receive one byte from the parallel port (DD A816)
+ *
+ * This function tries to receive one byte via parallel and returns
+ * it if successful. Returns -1 instead if the device state has
+ * changed.
+ */
+static int16_t _dolphin_getc(void) {
+  /* wait until CLOCK is high */
+  while (!IEC_CLOCK)   // A818
+    if (iec_check_atn())
+      return -1;
+
+  set_data(1);         // A81F
+
+  /* start EOI timeout */
+  start_timeout(86);
+
+  /* wait until CLOCK is low or 86 microseconds passed */
+  uint8_t tmp;
+  do {
+    if (iec_check_atn())
+      return -1;
+    tmp = has_timed_out();
+  } while (!tmp && IEC_CLOCK);
+
+  if (tmp) { // A835
+    /* acknowledge EOI */
+    set_data(0);
+    delay_us(57);
+    set_data(1);
+
+    uart_putc('E');
+    iec_data.iecflags |= EOI_RECVD;
+
+    /* wait until CLOCK is low - A849 */
+    while (IEC_CLOCK)
+      if (iec_check_atn())
+        return -1;
+  }
+
+  /* read byte */
+  uint8_t b = parallel_read();
+  parallel_send_handshake();
+
+  set_data(0);
+  return b;
+}
+
+/* disable interrupts in _dolphin_getc */
+int16_t dolphin_getc(void) {
+  int16_t val;
+
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    val = _dolphin_getc();
+  }
+  return val;
+}
+
+/**
+ * dolphin_putc - send a byte over parallel for DolphinDOS (A866)
+ * @data    : byte to be sent
+ * @with_eoi: Flags if the byte should be send with an EOI condition
+ *
+ * This is the DolphinDOS parallel byte transfer function.
+ * Returns 0 normally or -1 if ATN is low.
+ */
+/* DolphinDOS parallel byte transfer - A866 */
+uint8_t dolphin_putc(uint8_t data, uint8_t with_eoi) {
+  set_clock(1);
+
+  /* wait until DATA is high */
+  while (!IEC_DATA)   // A870
+    if (iec_check_atn())
+      return -1;
+
+  if (with_eoi) {
+    /* signal EOI by waiting for a pulse on DATA */
+    while (IEC_DATA)  // A87C
+      if (iec_check_atn())
+        return -1;
+
+    while (!IEC_DATA) // A883
+      if (iec_check_atn())
+        return -1;
+  }
+
+  /* send byte - A88A */
+  parallel_write(data);
+  parallel_send_handshake();
+  set_clock(0);
+
+  /* wait until DATA is low */
+  while (IEC_DATA)    // A89A
+    if (iec_check_atn())
+      return -1;
+
+  return 0;
+}
+
+/* send a byte with hardware handshaking */
+static void dolphin_write_hs(uint8_t value) {
+  parallel_write(value);
+  parallel_clear_rxflag();
+  parallel_send_handshake();
+  while (!parallel_rxflag) ;
+}
+
+/* DolphinDOS XQ command */
+void load_dolphin(void) {
+  /* find the already open buffer */
+  buffer_t *buf = find_buffer(0);
+
+  if (!buf)
+    return;
+
+  buf->position = 2;
+
+  /* initial handshaking */
+  // note about the delays: 100us work, not optimized
+  // (doesn't matter much outside the loop)
+  delay_us(100); // experimental delay
+  parallel_set_dir(PARALLEL_DIR_OUT);
+  set_clock(0);
+  parallel_clear_rxflag();
+  delay_us(100); // experimental delay
+  parallel_send_handshake();
+  uart_flush();
+  delay_us(100); // experimental delay
+
+  /* every sector except the last */
+  uint8_t i;
+
+  while (!buf->sendeoi) {
+    iec_bus_t bus_state = iec_bus_read();
+
+    /* transmit first byte */
+    dolphin_write_hs(buf->data[2]);
+
+    /* check DATA state before transmission */
+    if (bus_state & IEC_BIT_DATA) {
+      cleanup_and_free_buffer(buf);
+      return;
+    }
+
+    /* transmit the rest of the sector */
+    for (i = 3; i != 0; i++)
+      dolphin_write_hs(buf->data[i]);
+
+    /* read next sector */
+    if (buf->refill(buf)) {
+      cleanup_and_free_buffer(buf);
+      return;
+    }
+  }
+
+  /* last sector */
+  i = 2;
+  do {
+    dolphin_write_hs(buf->data[i]);
+  } while (i++ < buf->lastused);
+
+  /* final handshake */
+  set_clock(1);
+  while (!IEC_DATA) ;
+  parallel_send_handshake();
+  parallel_set_dir(PARALLEL_DIR_IN);
+
+  cleanup_and_free_buffer(buf);
+}
+
+/* DolphinDOS XZ command */
+void save_dolphin(void) {
+  buffer_t *buf;
+  uint8_t eoi;
+
+  /* find the already open file */
+  buf = find_buffer(1);
+
+  if (!buf)
+    return;
+
+  /* reset buffer position */
+  buf->position = 2;
+  buf->lastused = 2;
+
+  /* experimental delay to avoid hangs */
+  delay_us(100);
+
+  /* handshaking */
+  parallel_set_dir(PARALLEL_DIR_IN);
+  set_data(0);
+  parallel_clear_rxflag();
+  parallel_send_handshake();
+  uart_flush();
+
+  /* receive data */
+  do {
+    /* flush buffer if full */
+    if (buf->mustflush)
+      if (buf->refill(buf))
+        return; // FIXME: check error handling in Dolphin
+
+    while (!parallel_rxflag) ;
+
+    buf->data[buf->position] = parallel_read();
+    mark_buffer_dirty(buf);
+
+    if (buf->lastused < buf->position)
+      buf->lastused = buf->position;
+    buf->position++;
+
+    /* mark for flushing on wrap */
+    if (buf->position == 0)
+      buf->mustflush = 1;
+
+    eoi = !!IEC_CLOCK;
+
+    parallel_clear_rxflag();
+    parallel_send_handshake();
+  } while (!eoi);
+
+  /* the file will be closed with ATN+0xe1 by DolphinDOS */
+}
+#endif
+
+#ifdef CONFIG_LOADER_MMZAK
+/*
+ *
+ *  Maniac Mansion / Zak McKracken
+ *
+ */
+
+/**
+ * mmzak_send_byte - send one byte
+ * @byte: value to transmit
+ *
+ * This function sends one byte with the MM/Zak protocol.
+ * Returns false if successful, true if user aborted.
+ */
+static bool mmzak_send_byte(uint8_t byte) {
+  for (uint8_t i = 0; i < 4; i++) {
+    /* wait until ready */
+    while (!IEC_CLOCK)
+      if (check_keys())
+        return true;
+
+    /* send top bit */
+    if (byte & 0x80)
+      set_data(1);
+    else
+      set_data(0);
+
+    byte <<= 1;
+
+    /* wait until ready */
+    while (IEC_CLOCK)
+      if (check_keys())
+        return true;
+
+    /* send top bit */
+    if (byte & 0x80)
+      set_data(1);
+    else
+      set_data(0);
+
+    byte <<= 1;
+  }
+
+  return false;
+}
+
+/**
+ * mmzak_read_byte - receive one byte
+ *
+ * This function receives one byte with the MM/Zak protocol and
+ * returns it if successful. Returns -1 instead if user aborted.
+ */
+static int16_t mmzak_read_byte(void) {
+  uint8_t value = 0;
+
+  for (uint8_t i = 0; i < 4; i++) {
+    /* wait until clock is low */
+    while (IEC_CLOCK)
+      if (check_keys())
+        return -1;
+
+    value <<= 1;
+
+    delay_us(3);
+    if (!IEC_DATA)
+      value |= 1;
+
+    /* wait until clock is high */
+    while (!IEC_CLOCK)
+      if (check_keys())
+        return -1;
+
+    value <<= 1;
+
+    delay_us(3);
+    if (!IEC_DATA)
+      value |= 1;
+  }
+
+  return value;
+}
+
+/**
+ * mmzak_send_error - signal an error to the C64
+ *
+ * This function sends an error result to the C64.
+ * Returns false if successful, true on user abort.
+ */
+static bool mmzak_send_error(void) {
+  set_clock(1);
+  set_data(1);
+  if (mmzak_send_byte(0x01))
+    return true;
+
+  if (mmzak_send_byte(0x11))
+    return true;
+
+  return false;
+}
+
+/**
+ * mmzak_read_sector - read and transmit a sector
+ * @track : track number
+ * @sector: sector number
+ * @buf   : buffer to use
+ *
+ * This function reads the given sector and transmits it to the C64.
+ * Returns false if successful, true on user abort.
+ */
+static bool mmzak_read_sector(uint8_t track, uint8_t sector, buffer_t *buf) {
+  read_sector(buf, current_part, track, sector);
+  if (current_error != 0) {
+    /* read failed, send error */
+    return mmzak_send_error();
+  }
+
+  set_clock(1);
+  set_data(1);
+  delay_us(3);
+
+  /* send contents */
+  uint8_t *ptr = buf->data;
+
+  for (uint16_t i = 0; i < 256; i++) {
+    if (*ptr == 0x01)
+      if (mmzak_send_byte(0x01))
+        return true;
+
+    if (mmzak_send_byte(*ptr++))
+      return true;
+  }
+
+  /* send status */
+  if (mmzak_send_byte(0x01))
+    return true;
+
+  if (mmzak_send_byte(0x81))
+    return true;
+
+  set_clock(0);
+  set_data(1);
+    
+  return false;
+}
+
+/**
+ * mmzak_write_sector - receive and write a sector
+ * @track : track number
+ * @sector: sector number
+ * @buf   : buffer to use
+ *
+ * This function receives a sector from the C64 and writes it to disk.
+ * Returns false if successful, true on user abort.
+ */
+static bool mmzak_write_sector(uint8_t track, uint8_t sector, buffer_t *buf) {
+  set_clock(1);
+  set_data(1);
+  delay_us(3);
+
+  /* receive data */
+  uint8_t *ptr = buf->data;
+  mark_buffer_dirty(buf);
+
+  for (uint16_t i = 0; i < 256; i++) {
+    int16_t v = mmzak_read_byte();
+
+    if (v < 0)
+      return true;
+
+    *ptr++ = v;
+  }
+
+  set_clock(0);
+
+  /* write data */
+  write_sector(buf, current_part, track, sector);
+  mark_buffer_clean(buf);
+
+  if (current_error != 0) {
+    return mmzak_send_error();
+  }
+
+  return false;
+}
+
+void load_mmzak(UNUSED_PARAMETER) {
+  buffer_t *buf = alloc_system_buffer();
+
+  if (buf == NULL)
+    return;
+
+  set_atn_irq(0);
+
+  /* initial handshake */
+  /* FIXME: Not sure if needed, actually uses the ATN-ACK HW on a 1541 */
+  for (uint8_t i = 0; i < 8; i++) {
+    set_clock(1);
+    set_data(0);
+    delay_us(1285);
+    set_data(1);
+    delay_us(1290);
+  }
+
+  /* wait until bus is released */
+  while ((iec_bus_read() & (IEC_BIT_CLOCK | IEC_BIT_DATA)) !=
+         (IEC_BIT_CLOCK | IEC_BIT_DATA)) {
+    if (check_keys())
+      return;
+  }
+
+  /* command loop */
+  bool done = false;
+
+  while (!done) {
+    int16_t v;
+    uint8_t track, sector, command;
+
+    /* signal our readyness */
+    set_clock(0);
+    set_data(1);
+    set_busy_led(0);
+    delay_us(3);
+
+    /* wait for C64 */
+    while (IEC_DATA) { // wait until data is low
+      if (check_keys()) {
+        done = true;
+        break;
+      }
+    }
+
+    if (done)
+      break;
+
+    set_clock(1);
+
+    /* receive command block */
+    v = mmzak_read_byte();
+    if (v < 0)
+      break;
+    track = v;
+
+    v = mmzak_read_byte();
+    if (v < 0)
+      break;
+    sector = v;
+
+    v = mmzak_read_byte();
+    if (v < 0)
+      break;
+    command = v;
+
+    set_busy_led(1);
+    set_clock(0);
+
+    /* check command */
+    switch (command) {
+    case 0x20:
+      /* exit loader */
+      done = true;
+      break;
+
+    case 0x30:
+      /* read sector */
+      if (mmzak_read_sector(track, sector, buf))
+        done = true;
+      break;
+
+    case 0x40:
+      /* write sector */
+      if (mmzak_write_sector(track, sector, buf))
+        done = true;
+      break;
+
+    default:
+      /* unknown, signal error */
+      if (mmzak_send_error())
+        done = true;
+      break;
+    }
+  }
+
+  set_busy_led(0);
+}
+#endif // CONFIG_LOADER_MMZAK
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/fastloader.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/fastloader.h
new file mode 100644
index 00000000..3e218741
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/fastloader.h
@@ -0,0 +1,102 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   fastloader.h: Definitions for the high level fast loader handling
+
+*/
+
+#ifndef FASTLOADER_H
+#define FASTLOADER_H
+
+/* these two values are needed in the assembler implementation for AVR */
+#define FLCODE_DREAMLOAD     1
+#define FLCODE_DREAMLOAD_OLD 2
+
+#ifndef __ASSEMBLER__
+
+typedef enum {
+  FL_NONE          = 0,
+  FL_DREAMLOAD     = FLCODE_DREAMLOAD,
+  FL_DREAMLOAD_OLD = FLCODE_DREAMLOAD_OLD,
+  FL_TURBODISK,
+  FL_FC3_LOAD,
+  FL_FC3_SAVE,
+  FL_FC3_FREEZED,
+  FL_ULOAD3,
+  FL_GI_JOE,
+  FL_EPYXCART,
+  FL_GEOS_S1_64,
+  FL_GEOS_S1_128,
+  FL_GEOS_S23_1541,
+  FL_GEOS_S23_1571,
+  FL_GEOS_S23_1581,
+  FL_WHEELS_S1_64,
+  FL_WHEELS_S1_128,
+  FL_WHEELS_S2,
+  FL_WHEELS44_S2,
+  FL_WHEELS44_S2_1581,
+  FL_NIPPON,
+  FL_AR6_1581_LOAD,
+  FL_AR6_1581_SAVE,
+  FL_ELOAD1,
+  FL_FC3_OLDFREEZED,
+  FL_MMZAK,
+} fastloaderid_t;
+
+extern fastloaderid_t detected_loader;
+extern volatile uint8_t fl_track;
+extern volatile uint8_t fl_sector;
+extern uint8_t (*fast_send_byte)(uint8_t byte);
+extern uint8_t (*fast_get_byte)(void);
+
+void load_turbodisk(uint8_t);
+void load_fc3(uint8_t freezed);
+void load_fc3oldfreeze(uint8_t);
+void save_fc3(uint8_t);
+void load_dreamload(uint8_t);
+void load_uload3(uint8_t);
+void load_eload1(uint8_t);
+void load_gijoe(uint8_t);
+void load_epyxcart(uint8_t);
+void load_geos(uint8_t);
+void load_geos_s1(uint8_t version);
+void load_wheels_s1(uint8_t version);
+void load_wheels_s2(uint8_t);
+void load_nippon(uint8_t);
+void load_ar6_1581(uint8_t);
+void save_ar6_1581(uint8_t);
+void load_mmzak(uint8_t);
+
+int16_t dolphin_getc(void);
+uint8_t dolphin_putc(uint8_t data, uint8_t with_eoi);
+void load_dolphin(void);
+void save_dolphin(void);
+
+# ifdef PARALLEL_ENABLED
+extern volatile uint8_t parallel_rxflag;
+static inline void parallel_clear_rxflag(void) { parallel_rxflag = 0; }
+# else
+#  define parallel_rxflag 0
+static inline void parallel_clear_rxflag(void) {}
+# endif
+
+#endif // not assembler
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/fatops.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/fatops.c
new file mode 100644
index 00000000..27089220
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/fatops.c
@@ -0,0 +1,1646 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+   ASCII/PET conversion Copyright (C) 2008 Jim Brain <brain@jbrain.com>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   fatops.c: FAT operations
+
+*/
+
+#include <ctype.h>
+#include <string.h>
+#include <stdbool.h>
+#include <stdint.h>
+#include "config.h"
+#include "buffers.h"
+#include "d64ops.h"
+#include "diskchange.h"
+#include "diskio.h"
+#include "display.h"
+#include "doscmd.h"
+#include "errormsg.h"
+#include "ff.h"
+#include "fileops.h"
+#include "flags.h"
+#include "led.h"
+#include "m2iops.h"
+#include "p00cache.h"
+#include "parser.h"
+#include "progmem.h"
+#include "uart.h"
+#include "utils.h"
+#include "ustring.h"
+#include "wrapops.h"
+#include "fatops.h"
+
+#define P00_HEADER_SIZE       26
+#define P00_CBMNAME_OFFSET    8
+#define P00_RECORDLEN_OFFSET  25
+
+#define BOOTSECTOR_FILE       "bootsect.128"
+
+static const PROGMEM char p00marker[] = "C64File";
+#define P00MARKER_LENGTH 7
+
+typedef enum { EXT_UNKNOWN, EXT_IS_X00, EXT_IS_TYPE } exttype_t;
+
+uint8_t file_extension_mode;
+
+/* ------------------------------------------------------------------------- */
+/*  Utility functions                                                        */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * parse_error - translates a ff FRESULT into a commodore error message
+ * @res     : FRESULT to be translated
+ * @readflag: Flags if it was a read operation
+ *
+ * This function sets the error channel according to the problem given in
+ * res. readflag specifies if a READ ERROR or WRITE ERROR should be used
+ * if the error is FR_RW_ERROR.
+ */
+void parse_error(FRESULT res, uint8_t readflag) {
+  switch (res) {
+  case FR_OK:
+    set_error(ERROR_OK);
+    break;
+
+  case FR_NO_FILE:
+    set_error_ts(ERROR_FILE_NOT_FOUND,res,0);
+    break;
+
+  case FR_NO_PATH:
+  case FR_NOT_DIRECTORY:
+    set_error_ts(ERROR_FILE_NOT_FOUND_39,res,0);
+    break;
+
+  case FR_INVALID_NAME:
+    set_error_ts(ERROR_SYNTAX_JOKER,res,0);
+    break;
+
+  case FR_NOT_READY:
+  case FR_INVALID_DRIVE:
+  case FR_NOT_ENABLED:
+  case FR_NO_FILESYSTEM:
+    set_error_ts(ERROR_DRIVE_NOT_READY,res,0);
+    break;
+
+  case FR_RW_ERROR:
+    /* Just a random READ ERROR */
+    if (readflag)
+      set_error_ts(ERROR_READ_NOHEADER,res,0);
+    else
+      set_error_ts(ERROR_WRITE_VERIFY,res,0);
+    break;
+
+  case FR_WRITE_PROTECTED:
+    set_error_ts(ERROR_WRITE_PROTECT,res,0);
+    break;
+
+  case FR_EXIST:
+    set_error_ts(ERROR_FILE_EXISTS,res,0);
+    break;
+
+  case FR_DIR_NOT_EMPTY:
+    // FIXME: What do the CMD drives return when removing a non-empty directory?
+    set_error_ts(ERROR_FILE_EXISTS,res,0);
+    break;
+
+  case FR_DENIED:
+    set_error_ts(ERROR_DISK_FULL,res,0);
+    break;
+
+  case FR_IS_READONLY:
+  case FR_IS_DIRECTORY:
+    set_error_ts(ERROR_FILE_EXISTS,res,0);
+    break;
+
+  case FR_INVALID_OBJECT:
+    set_error_ts(ERROR_DRIVE_NOT_READY,res,0);
+    break;
+
+  default:
+    set_error_ts(ERROR_SYNTAX_UNABLE,res,99);
+    break;
+  }
+}
+
+/**
+ * check_extension - check for known file-type-based name extensions
+ * @name: pointer to the file name
+ * @ext : pointer to pointer to the file extension
+ *
+ * This function checks if the given file name has an extension that
+ * indicates a specific file type like PRG/SEQ/P00/S00/... The ext
+ * pointer will be set to the first character of the extension if
+ * any is present or NULL if not. Returns EXT_IS_X00 for x00,
+ * EXT_IS_TYPE for PRG/SEQ/... or EXT_UNKNOWN for an unknown file extension.
+ */
+static exttype_t check_extension(uint8_t *name, uint8_t **ext) {
+  uint8_t f,s,t;
+
+  /* Search for the file extension */
+  if ((*ext = ustrrchr(name, '.')) != NULL) {
+    f = *(++(*ext));
+    s = *(*ext+1);
+    t = *(*ext+2);
+    if ((f == 'P' || f == 'S' ||
+         f == 'U' || f == 'R') &&
+        isdigit(s) && isdigit(t))
+      return EXT_IS_X00;
+    else if ((f=='P' && s == 'R' && t == 'G') ||
+             (f=='S' && s == 'E' && t == 'Q') ||
+             (f=='R' && s == 'E' && t == 'L') ||
+             (f=='U' && s == 'S' && t == 'R'))
+      return EXT_IS_TYPE;
+  }
+  return EXT_UNKNOWN;
+}
+
+/**
+ * check_imageext - check for a known image file extension
+ * @name: pointer to the file name
+ *
+ * This function checks if the given file name has an extension that
+ * indicates a known image file type. Returns IMG_IS_M2I for M2I files,
+ * IMG_IS_DISK for D64/D41/D71/D81 files or IMG_UNKNOWN for an unknown
+ * file extension.
+ */
+imgtype_t check_imageext(uint8_t *name) {
+  uint8_t f,s,t;
+  uint8_t *ext = ustrrchr(name, '.');
+
+  if (ext == NULL)
+    return IMG_UNKNOWN;
+
+  f = toupper(*++ext);
+  s = toupper(*++ext);
+  t = toupper(*++ext);
+
+#ifdef CONFIG_M2I
+  if (f == 'M' && s == '2' && t == 'I')
+    return IMG_IS_M2I;
+#endif
+
+  if (f == 'D')
+    if ((s == '6' && t == '4') ||
+        (s == 'N' && t == 'P') ||
+        ((s == '4' || s == '7' || s == '8') &&
+         (t == '1')))
+      return IMG_IS_DISK;
+
+ return IMG_UNKNOWN;
+}
+
+/**
+ * pet2asc - convert string from PETSCII to ASCII
+ * @buf: pointer to the string to be converted
+ *
+ * This function converts the string in the given buffer from PETSCII to
+ * ASCII in-place.
+ */
+static void pet2asc(uint8_t *buf) {
+  uint8_t ch;
+  while (*buf) {
+    ch = *buf;
+    if (ch > (128+64) && ch < (128+91))
+      ch -= 128;
+    else if (ch > (96-32) && ch < (123-32))
+      ch += 32;
+    else if (ch > (192-128) && ch < (219-128))
+      ch += 128;
+    else if (ch == 255)
+      ch = '~';
+    *buf = ch;
+    buf++;
+  }
+}
+
+/**
+ * is_valid_fat_char - checks if a character is valid on FAT
+ * @c: character to check
+ *
+ * This function checks if @c is a valid character for a FAT
+ * file name. Returns true if it is, false if not.
+ */
+static bool is_valid_fat_char(const uint8_t c) {
+  if (isalnum(c) || c == '!' ||
+      (c >= '#' && c <= ')') ||
+      c == '-')
+    return true;
+  else
+    return false;
+}
+
+/**
+ * is_valid_fat_name - checks if a file name is valid on FAT
+ * @name: name to check
+ *
+ * This function checks if @name is a valid name for a FAT
+ * file. Returns true if it is, false if not.
+ */
+static bool is_valid_fat_name(const uint8_t *name) {
+  const uint8_t *ptr = name;
+
+  /* check for leading space */
+  if (*name == ' ')
+    return false;
+
+  /* check all characters for validity */
+  while (*ptr) {
+    if (!is_valid_fat_char(*ptr++))
+      return false;
+  }
+
+  /* check the last character */
+  ptr--;
+
+  if (*ptr == ' ')
+    return false;
+
+  if (*ptr == '.')
+    return false;
+
+  return true;
+}
+
+/**
+ * build_name - convert PETSCII file name to valid FAT name
+ * @name: pointer to a PETSCII file name to be converted
+ * @type: file type
+ *
+ * This function converts a PETSCII file name to a suitable
+ * FAT file name in-place. Returns a pointer to the last
+ * character of the PC64 file extension if it was
+ * created or NULL if not.
+ */
+static uint8_t* build_name(uint8_t *name, uint8_t type) {
+  /* convert to PETSCII */
+  pet2asc(name);
+
+#ifdef CONFIG_M2I
+  /* do not add a header for raw files, even if the name may be invalid */
+  if (type == TYPE_RAW)
+    return NULL;
+#endif
+
+  /* known disk-image extensions are always without header or suffix */
+  if (type == TYPE_PRG && check_imageext(name) != IMG_UNKNOWN)
+    return NULL;
+
+  /* PC64 mode or invalid FAT name? */
+  if ((file_extension_mode == 1 && type != TYPE_PRG) ||
+      file_extension_mode == 2 ||
+      !is_valid_fat_name(name)) {
+
+      uint8_t *x00ext = NULL;
+
+      /* Append .[PSUR]00 suffix to the file name */
+      while (*name) {
+        if (is_valid_fat_char(*name)) {
+          name++;
+        } else {
+          *name++ = '_';
+        }
+      }
+      *name++ = '.';
+      *name++ = pgm_read_byte(filetypes+3*type);
+      *name++ = '0';
+      x00ext = name;
+      *name++ = '0';
+      *name   = 0;
+
+      return x00ext;
+  }
+
+  /* type-suffix mode? */
+  if ((file_extension_mode == 3 && type != TYPE_PRG) ||
+      (file_extension_mode == 4)) {
+    /* Append type suffix to the file name */
+    while (*name) name++;
+    *name++ = '.';
+    memcpy_P(name, filetypes + TYPE_LENGTH * (type & EXT_TYPE_MASK), TYPE_LENGTH);
+    *(name+3) = 0;
+
+    return NULL;
+  }
+
+  /* extension mode 0 and no special case */
+  return NULL;
+}
+
+/* ------------------------------------------------------------------------- */
+/*  Callbacks                                                                */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * fat_file_read - read the next data block into the buffer
+ * @buf: buffer to be worked on
+ *
+ * This function reads the next block of data from the associated file into
+ * the given buffer. Used as a refill-callback when reading files
+ */
+static uint8_t fat_file_read(buffer_t *buf) {
+  FRESULT res;
+  UINT bytesread;
+
+  uart_putc('#');
+
+  buf->fptr = buf->pvt.fat.fh.fptr - buf->pvt.fat.headersize;
+
+  res = f_read(&buf->pvt.fat.fh, buf->data+2, (buf->recordlen ? buf->recordlen : 254), &bytesread);
+  if (res != FR_OK) {
+    parse_error(res,1);
+    free_buffer(buf);
+    return 1;
+  }
+
+  /* The bus protocol can't handle 0-byte-files */
+  if (bytesread == 0) {
+    bytesread = 1;
+    /* Experimental data suggests that this may be correct */
+    buf->data[2] = (buf->recordlen ? 255 : 13);
+  }
+
+  buf->position = 2;
+  buf->lastused = bytesread+1;
+  if(buf->recordlen) // strip nulls from end of REL record.
+    while(!buf->data[buf->lastused] && --(buf->lastused) > 1);
+  if (bytesread < 254
+      || (buf->pvt.fat.fh.fsize - buf->pvt.fat.fh.fptr) == 0
+      || buf->recordlen
+     )
+    buf->sendeoi = 1;
+  else
+    buf->sendeoi = 0;
+
+  return 0;
+}
+
+/**
+ * write_data - write the current buffer data
+ * @buf: buffer to be worked on
+ *
+ * This function writes the current contents of the given buffer into its
+ * associated file.
+ */
+static uint8_t write_data(buffer_t *buf) {
+  FRESULT res;
+  UINT byteswritten;
+
+  uart_putc('/');
+
+  if(!buf->mustflush)
+    buf->lastused = buf->position - 1;
+
+  if(buf->recordlen > buf->lastused - 1)
+    memset(buf->data + buf->lastused + 1,0,buf->recordlen - (buf->lastused - 1));
+
+  if(buf->recordlen)
+    buf->lastused = buf->recordlen + 1;
+
+  res = f_write(&buf->pvt.fat.fh, buf->data+2, buf->lastused-1, &byteswritten);
+  if (res != FR_OK) {
+    uart_putc('r');
+    parse_error(res,1);
+    f_close(&buf->pvt.fat.fh);
+    free_buffer(buf);
+    return 1;
+  }
+
+  if (byteswritten != buf->lastused-1U) {
+    uart_putc('l');
+    set_error(ERROR_DISK_FULL);
+    f_close(&buf->pvt.fat.fh);
+    free_buffer(buf);
+    return 1;
+  }
+
+  mark_buffer_clean(buf);
+  buf->mustflush = 0;
+  buf->position  = 2;
+  buf->lastused  = 2;
+  buf->fptr      = buf->pvt.fat.fh.fptr - buf->pvt.fat.headersize;
+
+  return 0;
+}
+
+/**
+ * fat_file_write - refill-callback for files opened for writing
+ * @buf: target buffer
+ *
+ * This function writes the contents of buf to the associated file.
+ */
+static uint8_t fat_file_write(buffer_t *buf) {
+  FRESULT res = FR_OK;
+  uint32_t fptr;
+  uint32_t i = 0;
+
+  fptr = buf->pvt.fat.fh.fsize - buf->pvt.fat.headersize;
+
+  // on a REL file, the fptr will be be at the end of the record we just read.  Reposition.
+  if (buf->fptr != fptr) {
+    res = f_lseek(&buf->pvt.fat.fh, buf->pvt.fat.headersize + buf->fptr);
+    if (res != FR_OK) {
+      parse_error(res,1);
+      f_close(&buf->pvt.fat.fh);
+      free_buffer(buf);
+      return 1;
+    }
+  }
+
+  if(buf->fptr > fptr)
+    i = buf->fptr - fptr;
+
+  if (res == FR_OK) {
+    if (write_data(buf))
+      return 1;
+  }
+
+  if(i) {
+    // we need to fill bytes.
+    // position to old end of file.
+    res = f_lseek(&buf->pvt.fat.fh, buf->pvt.fat.headersize + fptr);
+    buf->mustflush = 0;
+    buf->fptr = fptr;
+    buf->data[2] = (buf->recordlen?255:0);
+    memset(buf->data + 3,0,253);
+    while(res == FR_OK && i) {
+      if (buf->recordlen)
+        buf->lastused = buf->recordlen;
+      else
+        buf->lastused = (i>254 ? 254 : (uint8_t) i);
+
+      i -= buf->lastused;
+      buf->position = buf->lastused + 2;
+
+      if(write_data(buf))
+        return 1;
+    }
+    res = f_lseek(&buf->pvt.fat.fh, buf->pvt.fat.fh.fsize);
+    if (res != FR_OK) {
+      uart_putc('r');
+      parse_error(res,1);
+      f_close(&buf->pvt.fat.fh);
+      free_buffer(buf);
+      return 1;
+    }
+    buf->fptr = buf->pvt.fat.fh.fptr - buf->pvt.fat.headersize;
+  }
+
+  return 0;
+}
+
+/**
+ * fat_file_seek - callback for seek
+ * @buf     : buffer to be worked on
+ * @position: offset to seek to
+ * @index   : offset within the record to seek to
+ *
+ * This function seeks to the offset position in the file associated
+ * with the given buffer and sets the read pointer to the byte given
+ * in index, effectively seeking to (position+index) for normal files.
+ * Returns 1 if an error occured, 0 otherwise.
+ */
+uint8_t fat_file_seek(buffer_t *buf, uint32_t position, uint8_t index) {
+  uint32_t pos = position + buf->pvt.fat.headersize;
+
+  if (buf->dirty)
+    if (fat_file_write(buf))
+      return 1;
+
+  if (buf->pvt.fat.fh.fsize >= pos) {
+    FRESULT res = f_lseek(&buf->pvt.fat.fh, pos);
+    if (res != FR_OK) {
+      parse_error(res,0);
+      f_close(&buf->pvt.fat.fh);
+      free_buffer(buf);
+      return 1;
+    }
+
+    if (fat_file_read(buf))
+      return 1;
+  } else {
+    buf->data[2]  = (buf->recordlen ? 255:13);
+    buf->lastused = 2;
+    buf->fptr     = position;
+    set_error(ERROR_RECORD_MISSING);
+  }
+
+  buf->position = index + 2;
+  if(index + 2 > buf->lastused)
+    buf->position = buf->lastused;
+
+  return 0;
+}
+
+/**
+ * fat_file_sync - synchronize the current REL file.
+ * @buf: buffer to be worked on
+ *
+ */
+static uint8_t fat_file_sync(buffer_t *buf) {
+  return fat_file_seek(buf,buf->fptr + buf->recordlen,0);
+}
+
+/**
+ * fat_file_close - close the file associated with a buffer
+ * @buf: buffer to be worked on
+ *
+ * This function closes the file associated with the given buffer. If the buffer
+ * was opened for writing the data contents will be stored if required.
+ * Additionally the buffer will be marked as free.
+ * Used as a cleanup-callback for reading and writing.
+ */
+static uint8_t fat_file_close(buffer_t *buf) {
+  FRESULT res;
+
+  if (!buf->allocated) return 0;
+
+  if (buf->write) {
+    /* Write the remaining data using the callback */
+    if (buf->refill(buf))
+      return 1;
+  }
+
+  res = f_close(&buf->pvt.fat.fh);
+  parse_error(res,1);
+  buf->cleanup = callback_dummy;
+
+  if (res != FR_OK)
+    return 1;
+  else
+    return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+/*  Internal handlers for the various operations                             */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * fat_open_read - opens a file for reading
+ * @path: path of the file
+ * @dent: pointer to cbmdirent with name of the file
+ * @buf : buffer to be used
+ *
+ * This functions opens a file in the FAT filesystem for reading and sets up
+ * buf to access it.
+ */
+void fat_open_read(path_t *path, cbmdirent_t *dent, buffer_t *buf) {
+  FRESULT res;
+  uint8_t *name;
+
+  pet2asc(dent->name);
+  if (dent->pvt.fat.realname[0])
+    name = dent->pvt.fat.realname;
+  else
+    name = dent->name;
+
+  partition[path->part].fatfs.curr_dir = path->dir.fat;
+  res = f_open(&partition[path->part].fatfs,&buf->pvt.fat.fh, name, FA_READ | FA_OPEN_EXISTING);
+  if (res != FR_OK) {
+    parse_error(res,1);
+    return;
+  }
+
+  if (dent->opstype == OPSTYPE_FAT_X00) {
+    /* It's a [PSUR]00 file, skip the header */
+    /* If anything goes wrong here, refill will notice too */
+    f_lseek(&buf->pvt.fat.fh, P00_HEADER_SIZE);
+    buf->pvt.fat.headersize = P00_HEADER_SIZE;
+  }
+
+  buf->read      = 1;
+  buf->cleanup   = fat_file_close;
+  buf->refill    = fat_file_read;
+  buf->seek      = fat_file_seek;
+
+  stick_buffer(buf);
+
+  /* Call the refill once for the first block of data */
+  buf->refill(buf);
+}
+
+/**
+ * create_file - creates a file
+ * @path     : path of the file
+ * @dent     : name of the file
+ * @type     : type of the file
+ * @buf      : buffer to be used
+ * @recordlen: length of record, if REL file.
+ *
+ * This function opens a file in the FAT filesystem for writing and sets up
+ * buf to access it. type is ignored here because FAT has no equivalent of
+ * file types.
+ */
+FRESULT create_file(path_t *path, cbmdirent_t *dent, uint8_t type, buffer_t *buf, uint8_t recordlen) {
+  FRESULT res;
+  uint8_t *name, *x00ext;
+
+  x00ext = NULL;
+
+  /* check if the FAT name is already defined (used only for M2I) */
+#ifdef CONFIG_M2I
+  if (dent->pvt.fat.realname[0])
+    name = dent->pvt.fat.realname;
+  else
+#endif
+  {
+    ustrcpy(ops_scratch, dent->name);
+    x00ext = build_name(ops_scratch, type);
+    name = ops_scratch;
+  }
+
+  partition[path->part].fatfs.curr_dir = path->dir.fat;
+  do {
+    res = f_open(&partition[path->part].fatfs, &buf->pvt.fat.fh, name,FA_WRITE | FA_CREATE_NEW | (recordlen?FA_READ:0));
+    if (res == FR_EXIST && x00ext != NULL) {
+      /* File exists, increment extension */
+      *x00ext += 1;
+      if (*x00ext == '9'+1) {
+        *x00ext = '0';
+        *(x00ext-1) += 1;
+        if (*(x00ext-1) == '9'+1)
+          break;
+      }
+    }
+  } while (res == FR_EXIST);
+
+  if (res != FR_OK)
+    return res;
+
+  if (x00ext != NULL || recordlen) {
+    UINT byteswritten;
+
+    if(x00ext != NULL) {
+      /* Write a [PSUR]00 header */
+
+      memset(ops_scratch, 0, P00_HEADER_SIZE);
+      ustrcpy_P(ops_scratch, p00marker);
+      memcpy(ops_scratch+P00_CBMNAME_OFFSET, dent->name, CBM_NAME_LENGTH);
+      if(recordlen)
+        ops_scratch[P00_RECORDLEN_OFFSET] = recordlen;
+      buf->pvt.fat.headersize = P00_HEADER_SIZE;
+    } else if(recordlen) {
+      ops_scratch[0] = recordlen;
+      buf->pvt.fat.headersize = 1;
+    }
+    res = f_write(&buf->pvt.fat.fh, ops_scratch, buf->pvt.fat.headersize, &byteswritten);
+    if (res != FR_OK || byteswritten != buf->pvt.fat.headersize) {
+      return res;
+    }
+  }
+
+  return FR_OK;
+}
+
+/**
+ * fat_open_write - opens a file for writing
+ * @path  : path of the file
+ * @dent  : name of the file
+ * @type  : type of the file
+ * @buf   : buffer to be used
+ * @append: Flags if the new data should be appended to the end of file
+ *
+ * This function opens a file in the FAT filesystem for writing and sets up
+ * buf to access it. type is ignored here because FAT has no equivalent of
+ * file types.
+ */
+void fat_open_write(path_t *path, cbmdirent_t *dent, uint8_t type, buffer_t *buf, uint8_t append) {
+  FRESULT res;
+
+  if (append) {
+    partition[path->part].fatfs.curr_dir = path->dir.fat;
+    res = f_open(&partition[path->part].fatfs, &buf->pvt.fat.fh, dent->pvt.fat.realname, FA_WRITE | FA_OPEN_EXISTING);
+    if (dent->opstype == OPSTYPE_FAT_X00)
+      /* It's a [PSUR]00 file */
+      buf->pvt.fat.headersize = P00_HEADER_SIZE;
+    if (res == FR_OK)
+      res = f_lseek(&buf->pvt.fat.fh, buf->pvt.fat.fh.fsize);
+    buf->fptr = buf->pvt.fat.fh.fsize - buf->pvt.fat.headersize;
+  } else
+    res = create_file(path, dent, type, buf, 0);
+
+  if (res != FR_OK) {
+    parse_error(res,0);
+    return;
+  }
+
+  mark_write_buffer(buf);
+  buf->position  = 2;
+  buf->lastused  = 2;
+  buf->cleanup   = fat_file_close;
+  buf->refill    = fat_file_write;
+  buf->seek      = fat_file_seek;
+
+  /* If no data is written the file should end up with a single 0x0d byte */
+  buf->data[2] = 13;
+}
+
+/**
+ * fat_open_rel - creates a rel file.
+ * @path  : path of the file
+ * @dent  : name of the file
+ * @buf   : buffer to be used
+ * @length: record length
+ * @mode  : select between new or existing file
+ *
+ * This function opens a rel file and prepares it for access.
+ * If the mode parameter is 0, create a new file. If it is != 0,
+ * open an existing file.
+ */
+void fat_open_rel(path_t *path, cbmdirent_t *dent, buffer_t *buf, uint8_t length, uint8_t mode) {
+  FRESULT res;
+  UINT bytesread;
+
+  if(!mode) {
+    res = create_file(path, dent, TYPE_REL, buf, length);
+    bytesread = 1;
+    ops_scratch[0] = length;
+  } else {
+    partition[path->part].fatfs.curr_dir = path->dir.fat;
+    res = f_open(&partition[path->part].fatfs, &buf->pvt.fat.fh, dent->pvt.fat.realname, FA_WRITE | FA_READ | FA_OPEN_EXISTING);
+    if (res == FR_OK) {
+      if (dent->opstype == OPSTYPE_FAT_X00) {
+        res = f_lseek(&buf->pvt.fat.fh, P00_RECORDLEN_OFFSET);
+      }
+      if(res == FR_OK)
+        /* read record length */
+        res = f_read(&buf->pvt.fat.fh, ops_scratch, 1, &bytesread);
+      if(!length)
+        length = ops_scratch[0];
+    }
+  }
+
+  if (res != FR_OK || bytesread != 1) {
+    parse_error(res,0);
+    return;
+  }
+
+  buf->pvt.fat.headersize = (uint8_t)buf->pvt.fat.fh.fptr;
+  buf->recordlen  = length;
+  mark_write_buffer(buf);
+  buf->read      = 1;
+  buf->cleanup   = fat_file_close;
+  buf->refill    = fat_file_sync;
+  buf->seek      = fat_file_seek;
+
+  /* read the first record */
+  if (!fat_file_read(buf) && length != ops_scratch[0])
+    set_error(ERROR_RECORD_MISSING);
+}
+
+/* ------------------------------------------------------------------------- */
+/*  External interface for the various operations                            */
+/* ------------------------------------------------------------------------- */
+
+uint8_t fat_opendir(dh_t *dh, path_t *path) {
+  FRESULT res;
+
+  res = l_opendir(&partition[path->part].fatfs, path->dir.fat, &dh->dir.fat);
+  dh->part = path->part;
+  if (res != FR_OK) {
+    parse_error(res,1);
+    return 1;
+  }
+  return 0;
+}
+
+/**
+ * fat_readdir - readdir wrapper for FAT
+ * @dh  : directory handle as set up by opendir
+ * @dent: CBM directory entry for returning data
+ *
+ * This function reads the next directory entry into dent.
+ * Returns 1 if an error occured, -1 if there are no more
+ * directory entries and 0 if successful.
+ */
+int8_t fat_readdir(dh_t *dh, cbmdirent_t *dent) {
+  FRESULT res;
+  FILINFO finfo;
+  uint8_t *ptr,*nameptr;
+  uint8_t typechar;
+
+  finfo.lfn = ops_scratch;
+
+  do {
+    res = f_readdir(&dh->dir.fat, &finfo);
+    if (res != FR_OK) {
+      if (res == FR_INVALID_OBJECT)
+        set_error(ERROR_DIR_ERROR);
+      else
+        parse_error(res,1);
+      return 1;
+    }
+  } while ((finfo.fname[0] && (finfo.fattrib & AM_VOL)) ||
+           (finfo.fname[0] == '.' && finfo.fname[1] == 0) ||
+           (finfo.fname[0] == '.' && finfo.fname[1] == '.' && finfo.fname[2] == 0));
+
+  memset(dent, 0, sizeof(cbmdirent_t));
+
+  if (!finfo.fname[0])
+    return -1;
+
+  dent->opstype = OPSTYPE_FAT;
+
+  /* Copy name */
+  ustrcpy(dent->pvt.fat.realname, finfo.fname);
+
+  if (!finfo.lfn[0] || ustrlen(finfo.lfn) > CBM_NAME_LENGTH+4) {
+    nameptr = finfo.fname;
+  } else {
+    /* Convert only LFNs to PETSCII, 8.3 are always upper-case */
+    nameptr = finfo.lfn;
+    asc2pet(nameptr);
+  }
+
+  /* File type */
+  if (finfo.fattrib & AM_DIR) {
+    dent->typeflags = TYPE_DIR;
+    /* Hide directories starting with . */
+    if (*nameptr == '.')
+      dent->typeflags |= FLAG_HIDDEN;
+
+  } else {
+    /* Search for the file extension */
+    exttype_t ext = check_extension(finfo.fname, &ptr);
+    if (ext == EXT_IS_X00) {
+      /* [PSRU]00 file - try to read the internal name */
+      uint8_t *name = p00cache_lookup(dh->part, finfo.clust);
+      typechar = *ptr;
+
+      if (name != NULL) {
+        /* lookup successful */
+        memcpy(dent->name, name, CBM_NAME_LENGTH);
+      } else {
+        /* read name from file */
+        UINT bytesread;
+
+        res = l_opencluster(&partition[dh->part].fatfs, &partition[dh->part].imagehandle, finfo.clust);
+        if (res != FR_OK)
+          goto notp00;
+
+        res = f_read(&partition[dh->part].imagehandle, ops_scratch, P00_HEADER_SIZE, &bytesread);
+        if (res != FR_OK)
+          goto notp00;
+
+        if (memcmp_P(ops_scratch, p00marker, P00MARKER_LENGTH))
+          goto notp00;
+
+        /* Copy the internal name - dent->name is still zeroed */
+        ustrcpy(dent->name, ops_scratch + P00_CBMNAME_OFFSET);
+
+        /* Some programs pad the name with 0xa0 instead of 0 */
+        ptr = dent->name;
+        for (uint8_t i=0;i<16;i++,ptr++)
+          if (*ptr == 0xa0)
+            *ptr = 0;
+
+        /* add name to cache */
+        p00cache_add(dh->part, finfo.clust, dent->name);
+      }
+      finfo.fsize -= P00_HEADER_SIZE;
+      dent->opstype = OPSTYPE_FAT_X00;
+
+    } else if (ext == EXT_IS_TYPE && (globalflags & EXTENSION_HIDING)) {
+      /* Type extension */
+      typechar = *ptr;
+      uint8_t i = ustrlen(nameptr)-4;
+      nameptr[i] = 0;
+
+    } else { /* ext == EXT_UNKNOWN or EXT_IS_TYPE but hiding disabled */
+      /* Unknown extension: PRG */
+      typechar = 'P';
+    }
+
+  notp00:
+    /* Set the file type */
+    switch (typechar) {
+    case 'P':
+      dent->typeflags = TYPE_PRG;
+      break;
+
+    case 'S':
+      dent->typeflags = TYPE_SEQ;
+      break;
+
+    case 'U':
+      dent->typeflags = TYPE_USR;
+      break;
+
+    case 'R':
+      dent->typeflags = TYPE_REL;
+      break;
+    }
+  }
+
+  /* Copy file name into dirent if it fits */
+  if (dent->opstype != OPSTYPE_FAT_X00) {
+    if (ustrlen(nameptr) > CBM_NAME_LENGTH) {
+      ustrcpy(dent->name, finfo.fname);
+    } else {
+      ustrcpy(dent->name, nameptr);
+    }
+
+    ptr = dent->name;
+    while (*ptr) {
+      if (*ptr == '~') *ptr = 0xff;
+      ptr++;
+    }
+  }
+
+  if (finfo.fsize > 16255746)
+    /* File too large -> size 63999 blocks */
+    dent->blocksize = 63999;
+  else
+    dent->blocksize = (finfo.fsize+253) / 254;
+
+  dent->remainder = finfo.fsize % 254;
+
+  /* Read-Only and hidden flags */
+  if (finfo.fattrib & AM_RDO)
+    dent->typeflags |= FLAG_RO;
+
+  if (finfo.fattrib & (AM_HID|AM_SYS))
+    dent->typeflags |= FLAG_HIDDEN;
+
+  /* Cluster number */
+  dent->pvt.fat.cluster = finfo.clust;
+
+  /* Date/Time */
+  dent->date.year  = (finfo.fdate >> 9) + 80;
+  dent->date.month = (finfo.fdate >> 5) & 0x0f;
+  dent->date.day   = finfo.fdate & 0x1f;
+
+  dent->date.hour   = finfo.ftime >> 11;
+  dent->date.minute = (finfo.ftime >> 5) & 0x3f;
+  dent->date.second = (finfo.ftime & 0x1f) << 1;
+
+  return 0;
+}
+
+/**
+ * fat_delete - Delete a file/directory on FAT
+ * @path: path to the file/directory
+ * @dent: pointer to cbmdirent with name of the file/directory to be deleted
+ *
+ * This function deletes the file filename in path and returns
+ * 0 if not found, 1 if deleted or 255 if an error occured.
+ */
+uint8_t fat_delete(path_t *path, cbmdirent_t *dent) {
+  FRESULT res;
+  uint8_t *name;
+
+  set_dirty_led(1);
+  if (dent->pvt.fat.realname[0]) {
+    name = dent->pvt.fat.realname;
+    p00cache_invalidate();
+  } else {
+    name = dent->name;
+    pet2asc(name);
+  }
+  partition[path->part].fatfs.curr_dir = path->dir.fat;
+  res = f_unlink(&partition[path->part].fatfs, name);
+
+  update_leds();
+
+  parse_error(res,0);
+  if (res == FR_OK)
+    return 1;
+  else if (res == FR_NO_FILE)
+    return 0;
+  else
+    return 255;
+}
+
+/**
+ * fat_chdir - change directory in FAT and/or mount image
+ * @path: path object for the location of dirname
+ * @dent: Name of the directory/image to be changed into
+ *
+ * This function changes the directory of the path object to dirname.
+ * If dirname specifies a file with a known extension (e.g. M2I or D64), the
+ * current(!) directory will be changed to the directory of the file and
+ * it will be mounted as an image file. Returns 0 if successful,
+ * 1 otherwise.
+ */
+uint8_t fat_chdir(path_t *path, cbmdirent_t *dent) {
+  FRESULT res;
+
+  partition[path->part].fatfs.curr_dir = path->dir.fat;
+
+  /* Left arrow moves one directory up */
+  if (dent->name[0] == '_' && dent->name[1] == 0) {
+    FILINFO finfo;
+
+    ops_scratch[0] = '.';
+    ops_scratch[1] = '.';
+    ops_scratch[2] = 0;
+
+    res = f_stat(&partition[path->part].fatfs, ops_scratch, &finfo);
+    if (res != FR_OK) {
+      parse_error(res,1);
+      return 1;
+    }
+
+    dent->pvt.fat.cluster = finfo.clust;
+    dent->typeflags = TYPE_DIR;
+  } else if (dent->name[0] == 0) {
+    /* Empty string moves to the root dir */
+    path->dir.fat = 0;
+    return 0;
+  }
+
+  if ((dent->typeflags & TYPE_MASK) == TYPE_DIR) {
+    /* It's a directory, change to its cluster */
+    path->dir.fat = dent->pvt.fat.cluster;
+  } else {
+    /* Changing into a file, could be a mount request */
+    if (check_imageext(dent->pvt.fat.realname) != IMG_UNKNOWN) {
+      /* D64/M2I mount request */
+      free_multiple_buffers(FMB_USER_CLEAN);
+      /* Open image file */
+      res = f_open(&partition[path->part].fatfs,
+                   &partition[path->part].imagehandle,
+                   dent->pvt.fat.realname, FA_OPEN_EXISTING|FA_READ|FA_WRITE);
+
+      /* Try to open read-only if medium or file is read-only */
+      if (res == FR_DENIED || res == FR_WRITE_PROTECTED)
+        res = f_open(&partition[path->part].fatfs,
+                     &partition[path->part].imagehandle,
+                     dent->pvt.fat.realname, FA_OPEN_EXISTING|FA_READ);
+
+      if (res != FR_OK) {
+        parse_error(res,1);
+        return 1;
+      }
+
+#ifdef CONFIG_M2I
+      if (check_imageext(dent->pvt.fat.realname) == IMG_IS_M2I)
+        partition[path->part].fop = &m2iops;
+      else
+#endif
+        {
+          if (d64_mount(path, dent->pvt.fat.realname))
+            return 1;
+          partition[path->part].fop = &d64ops;
+        }
+
+      return 0;
+    }
+  }
+  return 0;
+}
+
+/* Create a new directory */
+void fat_mkdir(path_t *path, uint8_t *dirname) {
+  FRESULT res;
+
+  partition[path->part].fatfs.curr_dir = path->dir.fat;
+  pet2asc(dirname);
+  res = f_mkdir(&partition[path->part].fatfs, dirname);
+  parse_error(res,0);
+}
+
+/**
+ * fat_getvolumename - Get the volume label
+ * @part : partition to request
+ * @label: pointer to the buffer for the label (16 characters+zero-termination)
+ *
+ * This function reads the FAT volume label and stores it zero-terminated
+ * in label. Returns 0 if successfull, != 0 if an error occured.
+ */
+static uint8_t fat_getvolumename(uint8_t part, uint8_t *label) {
+  DIR dh;
+  FILINFO finfo;
+  FRESULT res;
+  uint8_t i,j;
+
+  finfo.lfn = NULL;
+  memset(label, 0, CBM_NAME_LENGTH+1);
+
+  res = l_opendir(&partition[part].fatfs, 0, &dh);
+
+  if (res != FR_OK) {
+    parse_error(res,0);
+    return 1;
+  }
+
+  while ((res = f_readdir(&dh, &finfo)) == FR_OK) {
+    if (!finfo.fname[0]) break;
+    if ((finfo.fattrib & (AM_VOL|AM_SYS|AM_HID)) == AM_VOL) {
+      i=0;
+      j=0;
+      while (finfo.fname[i]) {
+        /* Skip dots */
+        if (finfo.fname[i] == '.') {
+          i++;
+          continue;
+        }
+        label[j++] = finfo.fname[i++];
+      }
+      return 0;
+    }
+  }
+  return 0;
+}
+
+/**
+ * fat_getdirlabel - Get the directory label
+ * @path : path object of the directory
+ * @label: pointer to the buffer for the label (16 characters)
+ *
+ * This function reads the FAT volume label (if in root directory) or FAT
+ * directory name (if not) and stored it space-padded
+ * in the first 16 bytes of label.
+ * Returns 0 if successfull, != 0 if an error occured.
+ */
+uint8_t fat_getdirlabel(path_t *path, uint8_t *label) {
+  DIR dh;
+  FILINFO finfo;
+  FRESULT res;
+  uint8_t *name = ops_scratch;
+
+  finfo.lfn = ops_scratch;
+  memset(label, ' ', CBM_NAME_LENGTH);
+
+  res = l_opendir(&partition[path->part].fatfs, path->dir.fat, &dh);
+  if (res != FR_OK)
+    goto gl_error;
+
+  while ((res = f_readdir(&dh, &finfo)) == FR_OK) {
+    if(finfo.fname[0] == '\0' || finfo.fname[0] != '.') {
+      res = fat_getvolumename(path->part, name);
+      break;
+    }
+    if(finfo.fname[0] == '.' && finfo.fname[1] == '.' && finfo.fname[2] == 0) {
+      if((res = l_opendir(&partition[path->part].fatfs,finfo.clust,&dh)) != FR_OK) // open .. dir.
+        break;
+      while ((res = f_readdir(&dh, &finfo)) == FR_OK) {
+        if(finfo.fname[0] == '\0')
+          break;
+        if (finfo.clust == path->dir.fat) {
+          if(!*name)
+            name = finfo.fname;
+          else
+            asc2pet(name);
+          break;
+        }
+      }
+      break;
+    }
+  }
+
+  if (*name)
+    memcpy(label, name, ustrlen(name));
+
+  if (res == FR_OK)
+    return 0;
+
+gl_error:
+  parse_error(res,0);
+  return 1;
+}
+
+/**
+ * fat_getid - "Read" a disk id
+ * @path: path object
+ * @id  : pointer to the buffer for the id (5 characters)
+ *
+ * This function creates a disk ID from the FAT type (12/16/32)
+ * and the usual " 2A" of a 1541 in the first 5 bytes of id.
+ * Always returns 0 for success.
+ */
+uint8_t fat_getid(path_t *path, uint8_t *id) {
+  switch (partition[path->part].fatfs.fs_type) {
+  case FS_FAT12:
+    *id++ = '1';
+    *id++ = '2';
+    break;
+
+  case FS_FAT16:
+    *id++ = '1';
+    *id++ = '6';
+    break;
+
+  case FS_FAT32:
+    *id++ = '3';
+    *id++ = '2';
+    break;
+  }
+
+  *id++ = ' ';
+  *id++ = '2';
+  *id++ = 'A';
+  return 0;
+}
+
+/* Returns the number of free blocks */
+uint16_t fat_freeblocks(uint8_t part) {
+  FATFS *fs = &partition[part].fatfs;
+  DWORD clusters;
+
+  if (l_getfree(fs, NULLSTRING, &clusters, 65535) == FR_OK) {
+    if (clusters > 65535)
+      return 65535;
+    else
+      return clusters;
+  } else
+    return 0;
+}
+
+
+/**
+ * fat_readwrite_sector - simulate direct sector access
+ * @buf   : target buffer
+ * @part  : partition number
+ * @track : track to read
+ * @sector: sector to read
+ * @rwflag: read/write flag
+ *
+ * This function allows access to a file called bootsect.128
+ * as track 1 sector 0 to enable the auto-boot function of
+ * the C128 on FAT directories. If rwflag is false (0),
+ * the sector will be written; otherwise it will be read.
+ */
+static void fat_readwrite_sector(buffer_t *buf, uint8_t part,
+                                 uint8_t track, uint8_t sector, uint8_t rwflag) {
+  FRESULT res;
+  UINT bytes;
+  uint8_t mode;
+
+  if (track != 1 || sector != 0) {
+    set_error_ts(ERROR_READ_NOHEADER, track, sector);
+    return;
+  }
+
+  if (rwflag)
+    mode = FA_OPEN_EXISTING | FA_READ;
+  else
+    mode = FA_OPEN_ALWAYS   | FA_WRITE;
+
+  /* since this is fatops, the imagehandle is currently unused       */
+  /* (saves a noticable chunk of stack compared to a local variable) */
+  res = f_open(&partition[part].fatfs,
+               &partition[part].imagehandle,
+               (const UCHAR *)BOOTSECTOR_FILE,
+               mode);
+  if (res != FR_OK) {
+    parse_error(res, rwflag);
+    return;
+  }
+
+  if (rwflag)
+    res = f_read(&partition[part].imagehandle, buf->data, 256, &bytes);
+  else
+    res = f_write(&partition[part].imagehandle, buf->data, 256, &bytes);
+
+  if (res != FR_OK || bytes != 256)
+    parse_error(res, rwflag);
+
+  res = f_close(&partition[part].imagehandle);
+  if (res != FR_OK)
+    parse_error(res, rwflag);
+
+  return;
+}
+
+/**
+ * fat_read_sector - simulate direct sector reads
+ * @buf   : target buffer
+ * @part  : partition number
+ * @track : track to read
+ * @sector: sector to read
+ *
+ * Wrapper for fat_readwrite_sector in read mode
+ */
+void fat_read_sector(buffer_t *buf, uint8_t part, uint8_t track, uint8_t sector) {
+  fat_readwrite_sector(buf, part, track, sector, 1);
+}
+
+/**
+ * fat_write_sector - simulate direct sector writes
+ * @buf   : source buffer
+ * @part  : partition number
+ * @track : track to write
+ * @sector: sector to write
+ *
+ * Wrapper for fat_readwrite_sector in write mode
+ */
+void fat_write_sector(buffer_t *buf, uint8_t part, uint8_t track, uint8_t sector) {
+  fat_readwrite_sector(buf, part, track, sector, 0);
+}
+
+
+/**
+ * fat_rename - rename a file
+ * @path   : path object
+ * @dent   : pointer to cbmdirent with old file name
+ * @newname: new file name
+ *
+ * This function renames the file in dent in the directory referenced by
+ * path to newname.
+ */
+void fat_rename(path_t *path, cbmdirent_t *dent, uint8_t *newname) {
+  uint8_t *ext;
+  FRESULT res;
+  UINT byteswritten;
+
+  partition[path->part].fatfs.curr_dir = path->dir.fat;
+
+  if (dent->opstype == OPSTYPE_FAT_X00) {
+    /* [PSUR]00 rename, just change the internal file name */
+    p00cache_invalidate();
+
+    res = f_open(&partition[path->part].fatfs, &partition[path->part].imagehandle,
+                 dent->pvt.fat.realname, FA_WRITE|FA_OPEN_EXISTING);
+    if (res != FR_OK) {
+      parse_error(res,0);
+      return;
+    }
+
+    res = f_lseek(&partition[path->part].imagehandle, P00_CBMNAME_OFFSET);
+    if (res != FR_OK) {
+      parse_error(res,0);
+      return;
+    }
+
+    /* Copy the new name into dent->name so we can overwrite all 16 bytes */
+    memset(dent->name, 0, CBM_NAME_LENGTH);
+    ustrcpy(dent->name, newname);
+
+    res = f_write(&partition[path->part].imagehandle, dent->name, CBM_NAME_LENGTH, &byteswritten);
+    if (res != FR_OK || byteswritten != CBM_NAME_LENGTH) {
+      parse_error(res,0);
+      return;
+    }
+
+    res = f_close(&partition[path->part].imagehandle);
+    if (res != FR_OK) {
+      parse_error(res,0);
+      return;
+    }
+  } else {
+    switch (check_extension(dent->pvt.fat.realname, &ext)) {
+    case EXT_IS_TYPE:
+      /* Keep type extension */
+      ustrcpy(ops_scratch, newname);
+      build_name(ops_scratch, dent->typeflags & TYPE_MASK);
+      res = f_rename(&partition[path->part].fatfs, dent->pvt.fat.realname, ops_scratch);
+      if (res != FR_OK)
+        parse_error(res, 0);
+      break;
+
+    default:
+      /* Normal rename */
+      pet2asc(dent->name);
+      pet2asc(newname);
+      res = f_rename(&partition[path->part].fatfs, dent->name, newname);
+      if (res != FR_OK)
+        parse_error(res, 0);
+      break;
+    }
+  }
+}
+
+/**
+ * fatops_init - Initialize fatops module
+ * @preserve_path: Preserve the current directory if non-zero
+ *
+ * This function will initialize the fatops module and force
+ * mounting of the card. It can safely be called again if re-mounting
+ * is required.
+ */
+void fatops_init(uint8_t preserve_path) {
+  FRESULT res;
+  uint8_t realdrive,drive,part;
+
+  max_part = 0;
+  drive = 0;
+  part = 0;
+  while (max_part < CONFIG_MAX_PARTITIONS && drive < MAX_DRIVES) {
+    partition[max_part].fop = &fatops;
+
+    /* Map drive numbers in just one place */
+    realdrive = map_drive(drive);
+    res=f_mount((realdrive * 16) + part, &partition[max_part].fatfs);
+
+    if (!preserve_path)
+      partition[max_part].current_dir.fat = 0;
+
+    if (res == FR_OK)
+      max_part++;
+
+    if (res != FR_NOT_READY && res != FR_INVALID_OBJECT && part < 15 &&
+        /* Don't try to mount partitions on an unpartitioned medium */
+        !(res == FR_OK && part == 0))
+      /* Try all partitions */
+      part++;
+    else {
+      /* End of extended partition chain, try next drive */
+      part = 0;
+      drive++;
+    }
+  }
+
+  if (!preserve_path) {
+    current_part = 0;
+    display_current_part(0);
+    set_changelist(NULL, NULLSTRING);
+    previous_file_dirent.name[0] = 0; // clear '*' file
+  }
+
+  /* Invalidate some caches */
+  d64_invalidate();
+  p00cache_invalidate();
+
+#ifndef HAVE_HOTPLUG
+  if (!max_part) {
+    set_error_ts(ERROR_DRIVE_NOT_READY,0,0);
+    return;
+  }
+#endif
+}
+
+/**
+ * image_unmount - generic unmounting function for images
+ * @part: partition number
+ *
+ * This function will clear all buffers, close the image file and
+ * restore file operations to fatops. It can be used for unmounting
+ * any image file types that don't require special cleanups.
+ * Returns 0 if successful, 1 otherwise.
+ */
+uint8_t image_unmount(uint8_t part) {
+  FRESULT res;
+
+  free_multiple_buffers(FMB_USER_CLEAN);
+
+  /* call D64 unmount function to handle BAM refcounting etc. */
+  // FIXME: ops entry?
+  if (partition[part].fop == &d64ops)
+    d64_unmount(part);
+
+  if (display_found) {
+    /* Send current path to display */
+    path_t path;
+
+    path.part    = part;
+    path.dir.fat = partition[part].current_dir.fat;
+    fat_getdirlabel(&path, ops_scratch);
+    display_current_directory(part, ops_scratch);
+  }
+
+  partition[part].fop = &fatops;
+  res = f_close(&partition[part].imagehandle);
+  if (res != FR_OK) {
+    parse_error(res,0);
+    return 1;
+  }
+  return 0;
+}
+
+/**
+ * image_chdir - generic chdir for image files
+ * @path: path object of the location of dirname
+ * @dent: directory to be changed into
+ *
+ * This function will ignore any names except _ (left arrow)
+ * and unmount the image if that is found. It can be used as
+ * chdir for all image types that don't support subdirectories
+ * themselves. Returns 0 if successful, 1 otherwise.
+ */
+uint8_t image_chdir(path_t *path, cbmdirent_t *dent) {
+  if (dent->name[0] == '_' && dent->name[1] == 0) {
+    /* Unmount request */
+    return image_unmount(path->part);
+  }
+  return 1;
+}
+
+/**
+ * image_mkdir - generic mkdir for image files
+ * @path   : path of the directory
+ * @dirname: name of the directory to be created
+ *
+ * This function does nothing.
+ */
+void image_mkdir(path_t *path, uint8_t *dirname) {
+  set_error(ERROR_SYNTAX_UNABLE);
+  return;
+}
+
+/**
+ * image_read - Seek to a specified image offset and read data
+ * @part  : partition number
+ * @offset: offset to be seeked to
+ * @buffer: pointer to where the data should be read to
+ * @bytes : number of bytes to read from the image file
+ *
+ * This function seeks to offset in the image file and reads bytes
+ * byte into buffer. It returns 0 on success, 1 if less than
+ * bytes byte could be read and 2 on failure.
+ */
+uint8_t image_read(uint8_t part, DWORD offset, void *buffer, uint16_t bytes) {
+  FRESULT res;
+  UINT bytesread;
+
+  if (offset != -1) {
+    res = f_lseek(&partition[part].imagehandle, offset);
+    if (res != FR_OK) {
+      parse_error(res,1);
+      return 2;
+    }
+  }
+
+  res = f_read(&partition[part].imagehandle, buffer, bytes, &bytesread);
+  if (res != FR_OK) {
+    parse_error(res,1);
+    return 2;
+  }
+
+  if (bytesread != bytes)
+    return 1;
+
+  return 0;
+}
+
+/**
+ * image_write - Seek to a specified image offset and write data
+ * @part  : partition number
+ * @offset: offset to be seeked to
+ * @buffer: pointer to the data to be written
+ * @bytes : number of bytes to read from the image file
+ * @flush : Flags if written data should be flushed to disk immediately
+ *
+ * This function seeks to offset in the image file and writes bytes
+ * byte into buffer. It returns 0 on success, 1 if less than
+ * bytes byte could be written and 2 on failure.
+ */
+uint8_t image_write(uint8_t part, DWORD offset, void *buffer, uint16_t bytes, uint8_t flush) {
+  FRESULT res;
+  UINT byteswritten;
+
+  if (offset != -1) {
+    res = f_lseek(&partition[part].imagehandle, offset);
+    if (res != FR_OK) {
+      parse_error(res,0);
+      return 2;
+    }
+  }
+
+  res = f_write(&partition[part].imagehandle, buffer, bytes, &byteswritten);
+  if (res != FR_OK) {
+    parse_error(res,1);
+    return 2;
+  }
+
+  if (byteswritten != bytes)
+    return 1;
+
+  if (flush)
+    f_sync(&partition[part].imagehandle);
+
+  return 0;
+}
+
+/* Dummy function for format */
+void format_dummy(uint8_t drive, uint8_t *name, uint8_t *id) {
+  set_error(ERROR_SYNTAX_UNKNOWN);
+}
+
+const PROGMEM fileops_t fatops = {  // These should be at bottom, to be consistent with d64ops and m2iops
+  &fat_open_read,
+  &fat_open_write,
+  &fat_open_rel,
+  &fat_delete,
+  &fat_getvolumename,
+  &fat_getdirlabel,
+  &fat_getid,
+  &fat_freeblocks,
+  &fat_read_sector,
+  &fat_write_sector,
+  &format_dummy,
+  &fat_opendir,
+  &fat_readdir,
+  &fat_mkdir,
+  &fat_chdir,
+  &fat_rename
+};
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/fatops.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/fatops.h
new file mode 100644
index 00000000..1b5d2a7e
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/fatops.h
@@ -0,0 +1,65 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   fatops.h: Definitions for the FAT operations
+
+*/
+
+#ifndef FATOPS_H
+#define FATOPS_H
+
+#include "buffers.h"
+#include "dirent.h"
+#include "wrapops.h"
+#include "ff.h"
+
+/* API */
+void     fatops_init(uint8_t preserve_dir);
+void     parse_error(FRESULT res, uint8_t readflag);
+uint8_t  fat_delete(path_t *path, cbmdirent_t *dent);
+uint8_t  fat_chdir(path_t *path, cbmdirent_t *dent);
+void     fat_mkdir(path_t *path, uint8_t *dirname);
+void     fat_open_read(path_t *path, cbmdirent_t *filename, buffer_t *buf);
+void     fat_open_write(path_t *path, cbmdirent_t *filename, uint8_t type, buffer_t *buf, uint8_t append);
+uint8_t  fat_getdirlabel(path_t *path, uint8_t *label);
+uint8_t  fat_getid(path_t *path, uint8_t *id);
+uint16_t fat_freeblocks(uint8_t part);
+uint8_t  fat_opendir(dh_t *dh, path_t *dir);
+int8_t   fat_readdir(dh_t *dh, cbmdirent_t *dent);
+void     fat_read_sector(buffer_t *buf, uint8_t part, uint8_t track, uint8_t sector);
+void     fat_write_sector(buffer_t *buf, uint8_t part, uint8_t track, uint8_t sector);
+void     format_dummy(uint8_t drive, uint8_t *name, uint8_t *id);
+
+extern const fileops_t fatops;
+extern uint8_t file_extension_mode;
+
+/* Generic helpers */
+uint8_t image_unmount(uint8_t part);
+uint8_t image_chdir(path_t *path, cbmdirent_t *dent);
+void    image_mkdir(path_t *path, uint8_t *dirname);
+uint8_t image_read(uint8_t part, DWORD offset, void *buffer, uint16_t bytes);
+uint8_t image_write(uint8_t part, DWORD offset, void *buffer, uint16_t bytes, uint8_t flush);
+
+typedef enum { IMG_UNKNOWN, IMG_IS_M2I, IMG_IS_DISK } imgtype_t;
+
+imgtype_t check_imageext(uint8_t *name);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ff.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ff.c
new file mode 100644
index 00000000..2aa90903
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ff.c
@@ -0,0 +1,3041 @@
+/*----------------------------------------------------------------------------/
+/  FatFs - FAT file system module  R0.06                     (C)ChaN, 2008
+/-----------------------------------------------------------------------------/
+/ The FatFs module is an experimenal project to implement FAT file system to
+/ cheap microcontrollers. This is a free software and is opened for education,
+/ research and development under license policy of following trems.
+/
+/  Copyright (C) 2008, ChaN, all right reserved.
+/
+/ * The FatFs module is a free software and there is no warranty.
+/ * You can use, modify and/or redistribute it for personal, non-profit or
+/ * commercial use without restriction under your responsibility.
+/ * Redistributions of source code must retain the above copyright notice.
+/
+/---------------------------------------------------------------------------/
+/  Feb 26, 2006  R0.00  Prototype.
+/
+/  Apr 29, 2006  R0.01  First stable version.
+/
+/  Jun 01, 2006  R0.02  Added FAT12 support.
+/                       Removed unbuffered mode.
+/                       Fixed a problem on small (<32M) patition.
+/  Jun 10, 2006  R0.02a Added a configuration option (_FS_MINIMUM).
+/
+/  Sep 22, 2006  R0.03  Added f_rename().
+/                       Changed option _FS_MINIMUM to _FS_MINIMIZE.
+/  Dec 11, 2006  R0.03a Improved cluster scan algolithm to write files fast.
+/                       Fixed f_mkdir() creates incorrect directory on FAT32.
+/
+/  Feb 04, 2007  R0.04  Supported multiple drive system.
+/                       Changed some interfaces for multiple drive system.
+/                       Changed f_mountdrv() to f_mount().
+/                       Added f_mkfs().
+/  Apr 01, 2007  R0.04a Supported multiple partitions on a plysical drive.
+/                       Added a capability of extending file size to f_lseek().
+/                       Added minimization level 3.
+/                       Fixed an endian sensitive code in f_mkfs().
+/  May 05, 2007  R0.04b Added a configuration option _USE_NTFLAG.
+/                       Added FSInfo support.
+/                       Fixed DBCS name can result FR_INVALID_NAME.
+/                       Fixed short seek (<= csize) collapses the file object.
+/
+/  Aug 25, 2007  R0.05  Changed arguments of f_read(), f_write() and f_mkfs().
+/                       Fixed f_mkfs() on FAT32 creates incorrect FSInfo.
+/                       Fixed f_mkdir() on FAT32 creates incorrect directory.
+/  Feb 03, 2008  R0.05a Added f_truncate() and f_utime().
+/                       Fixed off by one error at FAT sub-type determination.
+/                       Fixed btr in f_read() can be mistruncated.
+/                       Fixed cached sector is not flushed when create and close
+/                       without write.
+/
+/  Apr 01, 2008 R0.06   Added fputc(), fputs(), fprintf() and fgets().
+/                       Improved performance of f_lseek() on moving to the same
+/                       or following cluster.
+/---------------------------------------------------------------------------*/
+
+#include <string.h>
+#include "config.h"
+#include "ff.h"         /* FatFs declarations */
+#include "diskio.h"     /* Include file for user provided disk functions */
+#include "progmem.h"
+
+
+/*--------------------------------------------------------------------------
+
+   Module Private Functions
+
+---------------------------------------------------------------------------*/
+#if _USE_DRIVE_PREFIX != 0
+static
+FATFS *FatFs[_LOGICAL_DRIVES];  /* Pointer to the file system objects (logical drives) */
+#endif
+//static
+//WORD fsid;              /* File system mount ID */
+
+#if _USE_LFN!=0
+static const PROGMEM
+BYTE LFN_pos[13]={1,3,5,7,9,14,16,18,20,22,24,28,30};
+#endif
+
+#if _USE_1_BUF != 0
+# define FSBUF static_buf
+static
+BUF static_buf;
+#else
+# define FSBUF (fs->buf)
+#endif
+
+#if _USE_FS_BUF != 0
+# define FPBUF FSBUF
+#else
+# define FPBUF (fp->buf)
+#endif
+
+/*-----------------------------------------------------------------------*/
+/* Change window offset                                                  */
+/*-----------------------------------------------------------------------*/
+
+static
+BOOL move_window (      /* TRUE: successful, FALSE: failed */
+  FATFS *fs,            /* File system object */
+  BUF *buf,
+  DWORD sector          /* Sector number to make apperance in the fs->buf.data[] */
+)                       /* Move to zero only writes back dirty window */
+{
+  DWORD wsect;
+#if _USE_1_BUF != 0
+  FATFS* ofs = buf->fs;
+#else
+#define ofs fs
+#endif
+
+
+  wsect = buf->sect;
+#if _USE_1_BUF != 0
+  if (wsect != sector || fs != ofs) {   /* Changed current window */
+#else
+  if (wsect != sector) {                /* Changed current window */
+#endif
+#if !_FS_READONLY
+    BYTE n;
+    if (buf->dirty) {                   /* Write back dirty window if needed */
+      if (disk_write(ofs->drive, buf->data, wsect, 1) != RES_OK)
+        return FALSE;
+      buf->dirty = FALSE;
+      if (wsect < (ofs->fatbase + ofs->sects_fat)) {  /* In FAT area */
+        for (n = ofs->n_fats; n >= 2; n--) {          /* Reflect the change to FAT copy */
+          wsect += ofs->sects_fat;
+          disk_write(ofs->drive, buf->data, wsect, 1);
+        }
+      }
+    }
+#endif
+    if (sector) {
+      if (disk_read(fs->drive, buf->data, sector, 1) != RES_OK)
+        return FALSE;
+      buf->sect = sector;
+#if _USE_1_BUF != 0
+      buf->fs=fs;
+#endif
+    }
+  }
+  return TRUE;
+}
+
+
+
+
+static
+BOOL move_fs_window(
+  FATFS* fs,
+  DWORD  sector
+)
+{
+  return move_window(fs,&FSBUF,sector);
+}
+
+
+
+
+static
+BOOL move_fp_window(
+  FIL* fp,
+  DWORD  sector
+)
+{
+  return move_window(fp->fs,&FPBUF,sector);
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Clean-up cached data                                                  */
+/*-----------------------------------------------------------------------*/
+
+#if !_FS_READONLY
+static
+FRESULT sync (          /* FR_OK: successful, FR_RW_ERROR: failed */
+  FATFS *fs             /* File system object */
+)
+{
+  FSBUF.dirty = TRUE;
+  if (!move_fs_window(fs, 0)) return FR_RW_ERROR;
+#if _USE_FSINFO
+  /* Update FSInfo sector if needed */
+  if (fs->fs_type == FS_FAT32 && fs->fsi_flag) {
+    FSBUF.sect = 0;
+    memset(FSBUF.data, 0, 512);
+    ST_WORD(&FSBUF.data[BS_55AA], 0xAA55);
+    ST_DWORD(&FSBUF.data[FSI_LeadSig], 0x41615252);
+    ST_DWORD(&FSBUF.data[FSI_StrucSig], 0x61417272);
+    ST_DWORD(&FSBUF.data[FSI_Free_Count], fs->free_clust);
+    ST_DWORD(&FSBUF.data[FSI_Nxt_Free], fs->last_clust);
+    disk_write(fs->drive, FSBUF.data, fs->fsi_sector, 1);
+    fs->fsi_flag = 0;
+  }
+#endif
+  /* Make sure that no pending write process in the physical drive */
+  if (disk_ioctl(fs->drive, CTRL_SYNC, NULL) != RES_OK)
+    return FR_RW_ERROR;
+  return FR_OK;
+}
+#endif
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Get a cluster status                                                  */
+/*-----------------------------------------------------------------------*/
+
+static
+DWORD get_cluster (     /* 0,>=2: successful, 1: failed */
+  FATFS *fs,            /* File system object */
+  DWORD clust           /* Cluster# to get the link information */
+)
+{
+  WORD wc, bc;
+  DWORD fatsect;
+
+
+  if (clust >= 2 && clust < fs->max_clust) {        /* Is it a valid cluster#? */
+    fatsect = fs->fatbase;
+    switch (fs->fs_type) {
+    case FS_FAT12 :
+      bc = (WORD)clust * 3 / 2;
+      if (!move_fs_window(fs, fatsect + (bc / SS(fs)))) break;
+      wc = FSBUF.data[bc & (SS(fs) - 1)]; bc++;
+      if (!move_fs_window(fs, fatsect + (bc / SS(fs)))) break;
+      wc |= (WORD)FSBUF.data[bc & (SS(fs) - 1)] << 8;
+      return (clust & 1) ? (wc >> 4) : (wc & 0xFFF);
+
+    case FS_FAT16 :
+      if (!move_fs_window(fs, fatsect + (clust / (SS(fs) / 2)))) break;
+      return LD_WORD(&FSBUF.data[((WORD)clust * 2) & (SS(fs) - 1)]);
+
+    case FS_FAT32 :
+      if (!move_fs_window(fs, fatsect + (clust / (SS(fs) / 4)))) break;
+      return LD_DWORD(&FSBUF.data[((WORD)clust * 4) & (SS(fs) - 1)]) & 0x0FFFFFFF;
+    }
+  }
+
+  return 1; /* Out of cluster range, or an error occured */
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Change a cluster status                                               */
+/*-----------------------------------------------------------------------*/
+
+#if !_FS_READONLY
+static
+BOOL put_cluster (      /* TRUE: successful, FALSE: failed */
+  FATFS *fs,            /* File system object */
+  DWORD clust,          /* Cluster# to change  (must be 2 to fs->max_clust-1) */
+  DWORD val             /* New value to mark the cluster */
+)
+{
+  WORD bc;
+  BYTE *p;
+  DWORD fatsect;
+
+
+  fatsect = fs->fatbase;
+  switch (fs->fs_type) {
+  case FS_FAT12 :
+    bc = (WORD)clust * 3 / 2;
+    if (!move_fs_window(fs, fatsect + (bc / SS(fs)))) return FALSE;
+    p = &FSBUF.data[bc & (SS(fs) - 1)];
+    *p = (clust & 1) ? ((*p & 0x0F) | ((BYTE)val << 4)) : (BYTE)val;
+    bc++;
+    FSBUF.dirty = TRUE;
+    if (!move_fs_window(fs, fatsect + (bc / SS(fs)))) return FALSE;
+    p = &FSBUF.data[bc & (SS(fs) - 1)];
+    *p = (clust & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F));
+    break;
+
+  case FS_FAT16 :
+    if (!move_fs_window(fs, fatsect + (clust / (SS(fs) / 2)))) return FALSE;
+    ST_WORD(&FSBUF.data[((WORD)clust * 2) & (SS(fs) - 1)], (WORD)val);
+    break;
+
+  case FS_FAT32 :
+    if (!move_fs_window(fs, fatsect + (clust / (SS(fs) / 4)))) return FALSE;
+    ST_DWORD(&FSBUF.data[((WORD)clust * 4) & (SS(fs) - 1)], val);
+    break;
+
+  default :
+    return FALSE;
+  }
+  FSBUF.dirty = TRUE;
+  return TRUE;
+}
+#endif /* !_FS_READONLY */
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Remove a cluster chain                                                */
+/*-----------------------------------------------------------------------*/
+
+#if !_FS_READONLY
+static
+BOOL remove_chain (     /* TRUE: successful, FALSE: failed */
+  FATFS *fs,            /* File system object */
+  DWORD clust           /* Cluster# to remove chain from */
+)
+{
+  DWORD nxt;
+
+
+  while (clust >= 2 && clust < fs->max_clust) {
+    nxt = get_cluster(fs, clust);
+    if (nxt == 1) return FALSE;
+    if (!put_cluster(fs, clust, 0)) return FALSE;
+    if (fs->free_clust != 0xFFFFFFFF) {
+      fs->free_clust++;
+#if _USE_FSINFO
+      fs->fsi_flag = 1;
+#endif
+    }
+    clust = nxt;
+  }
+  return TRUE;
+}
+#endif
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Stretch or create a cluster chain                                     */
+/*-----------------------------------------------------------------------*/
+
+#if !_FS_READONLY
+static
+DWORD create_chain (    /* 0: No free cluster, 1: Error, >=2: New cluster number */
+  FATFS *fs,            /* File system object */
+  DWORD clust           /* Cluster# to stretch, 0 means create new */
+)
+{
+  DWORD cstat, ncl, scl, mcl = fs->max_clust;
+
+
+  if (clust == 0) {                       /* Create new chain */
+    scl = fs->last_clust;                 /* Get suggested start point */
+    if (scl == 0 || scl >= mcl) scl = 1;
+  }
+  else {                                  /* Stretch existing chain */
+    cstat = get_cluster(fs, clust);       /* Check the cluster status */
+    if (cstat < 2) return 1;              /* It is an invalid cluster */
+    if (cstat < mcl) return cstat;        /* It is already followed by next cluster */
+    scl = clust;
+  }
+
+  ncl = scl;                              /* Start cluster */
+  for (;;) {
+    ncl++;                                /* Next cluster */
+    if (ncl >= mcl) {                     /* Wrap around */
+      ncl = 2;
+      if (ncl > scl) return 0;            /* No free custer */
+    }
+    cstat = get_cluster(fs, ncl);         /* Get the cluster status */
+    if (cstat == 0) break;                /* Found a free cluster */
+    if (cstat == 1) return 1;             /* Any error occured */
+    if (ncl == scl) return 0;             /* No free custer */
+  }
+
+  if (!put_cluster(fs, ncl, 0x0FFFFFFF)) return 1;      /* Mark the new cluster "in use" */
+  if (clust && !put_cluster(fs, clust, ncl)) return 1;  /* Link it to previous one if needed */
+
+  fs->last_clust = ncl;                   /* Update fsinfo */
+  if (fs->free_clust != 0xFFFFFFFF) {
+    fs->free_clust--;
+#if _USE_FSINFO
+    fs->fsi_flag = 1;
+#endif
+  }
+
+  return ncl;   /* Return new cluster number */
+}
+#endif /* !_FS_READONLY */
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Get sector# from cluster#                                             */
+/*-----------------------------------------------------------------------*/
+
+static
+DWORD clust2sect (      /* !=0: sector number, 0: failed - invalid cluster# */
+  FATFS *fs,            /* File system object */
+  DWORD clust           /* Cluster# to be converted */
+)
+{
+  clust -= 2;
+  if (clust >= (fs->max_clust - 2)) return 0;       /* Invalid cluster# */
+  return clust * fs->csize + fs->database;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Move directory pointer to next                                        */
+/*-----------------------------------------------------------------------*/
+
+static
+BOOL next_dir_entry (   /* TRUE: successful, FALSE: could not move next */
+  DIR *dj               /* Pointer to directory object */
+)
+{
+  DWORD clust;
+  WORD idx;
+
+
+  idx = dj->index + 1;
+  if ((idx & ((SS(dj->fs) - 1) / 32)) == 0) {        /* Table sector changed? */
+    dj->sect++;                                      /* Next sector */
+    if (dj->clust == 0) {                            /* In static table */
+      if (idx >= dj->fs->n_rootdir) return FALSE;    /* Reached to end of table */
+    } else {                                         /* In dynamic table */
+      if (((idx / (SS(dj->fs) / 32)) & (dj->fs->csize - 1)) == 0) {  /* Cluster changed? */
+        clust = get_cluster(dj->fs, dj->clust);      /* Get next cluster */
+        if (clust < 2 || clust >= dj->fs->max_clust) /* Reached to end of table */
+          return FALSE;
+        dj->clust = clust;                           /* Initialize for new cluster */
+        dj->sect = clust2sect(dj->fs, clust);
+      }
+    }
+  }
+  dj->index = idx;  /* Lower several bits of dj->index indicates offset in dj->sect */
+  return TRUE;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Get file status from directory entry                                  */
+/*-----------------------------------------------------------------------*/
+
+#if _FS_MINIMIZE <= 1
+static
+void get_fileinfo (     /* No return code */
+  FILINFO *finfo,       /* Ptr to store the file information */
+  const BYTE *dir       /* Ptr to the directory entry */
+)
+{
+  BYTE n, c, a;
+  UCHAR *p;
+
+
+  p = &finfo->fname[0];
+  a = _USE_NTFLAG ? dir[DIR_NTres] : 0;   /* NT flag */
+  for (n = 0; n < 8; n++) {   /* Convert file name (body) */
+    c = dir[n];
+    if (c == ' ') break;
+    if (c == 0x05) c = 0xE5;
+    if (a & 0x08 && c >= 'A' && c <= 'Z') c += 0x20;
+    *p++ = c;
+  }
+  if (dir[8] != ' ') {        /* Convert file name (extension) */
+    *p++ = '.';
+    for (n = 8; n < 11; n++) {
+      c = dir[n];
+      if (c == ' ') break;
+      if (a & 0x10 && c >= 'A' && c <= 'Z') c += 0x20;
+      *p++ = c;
+    }
+  }
+  *p = '\0';
+
+  finfo->fattrib = dir[DIR_Attr];               /* Attribute */
+  finfo->fsize = LD_DWORD(&dir[DIR_FileSize]);  /* Size */
+  finfo->fdate = LD_WORD(&dir[DIR_WrtDate]);    /* Date */
+  finfo->ftime = LD_WORD(&dir[DIR_WrtTime]);    /* Time */
+  finfo->clust = ((DWORD)LD_WORD(&dir[DIR_FstClusHI]) << 16)
+    | LD_WORD(&dir[DIR_FstClusLO]);            /* Get cluster# */
+}
+#endif /* _FS_MINIMIZE <= 1 */
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Pick a paragraph and create the name in format of directory entry     */
+/*-----------------------------------------------------------------------*/
+
+static
+UCHAR make_dirfile (     /* 1: error - detected an invalid format, '\0'or'/': next character */
+  const UCHAR **path,    /* Pointer to the file path pointer */
+  UCHAR *dirname,        /* Pointer to directory name buffer {Name(8), Ext(3), NT flag(1)} */
+  BOOL* lfn              /* is this an LFN name? */
+)
+{
+  BYTE n, t, c, a, b;
+
+
+  *lfn=FALSE;
+  memset(dirname, ' ', 8+3);  /* Fill buffer with spaces */
+  a = 0; b = 0x18;            /* NT flag */
+  n = 0; t = 8;
+  for (;;) {
+    c = *(*path)++;
+    if (c == '\0' || c == '/') {           /* Reached to end of str or directory separator */
+      if (n == 0) break;
+      dirname[11] = _USE_NTFLAG ? (a & b) : 0;
+      return c;
+    }
+    if (c < ' ' || c == 0x7F) break;       /* Reject invisible chars */
+    if (c == ' ') goto md_l3;
+    if (c == '.') {
+#if _USE_CHDIR != 0 || _USE_CURR_DIR != 0
+      if (n == 0 || (n == 1 && *dirname == '.'))
+        goto md_l2;
+#endif
+      if (!(a & 1) && n >= 1 && n <= 8) {  /* Enter extension part */
+        n = 8; t = 11; continue;
+      }
+      goto md_l3;
+    }
+    if (_USE_SJIS &&
+      ((c >= 0x81 && c <= 0x9F) ||         /* Accept S-JIS code */
+        (c >= 0xE0 && c <= 0xFC))) {
+      if (n == 0 && c == 0xE5)             /* Change heading \xE5 to \x05 */
+        c = 0x05;
+      a ^= 0x01; goto md_l2;
+    }
+    if (c == '"') break;                   /* Reject " */
+    if (c <= ')') goto md_l1;              /* Accept ! # $ % & ' ( ) */
+    if (c <= ',') goto md_l3;              /* Reject * + , */
+    if (c <= '9') goto md_l1;              /* Accept - 0-9 */
+    if (c <= '?') goto md_l3;              /* Reject : ; < = > ? */
+    if (!(a & 1)) {     /* These checks are not applied to S-JIS 2nd byte */
+      if (c == '|') goto md_l3;            /* Reject | */
+      if (c >= '[' && c <= ']') goto md_l3;/* Reject [ \ ] */
+      if (_USE_NTFLAG && c >= 'A' && c <= 'Z')
+        (t == 8) ? (b &= (BYTE)~0x08) : (b &= (BYTE)~0x10);
+      if (c >= 'a' && c <= 'z') {          /* Convert to upper case */
+        c -= 0x20;
+        if (_USE_NTFLAG) (t == 8) ? (a |= 0x08) : (a |= 0x10);
+      }
+    }
+  md_l1:
+    a &= (BYTE)~0x01;
+  md_l2:
+    if (n >= t) goto md_l3;
+    dirname[n++] = c;
+  }
+  return 1;
+  md_l3:
+#if _USE_LFN != 0
+  do {
+    if(c== '\\' || c==':' || c=='*' || c=='?' || c == '"' || c == '<' || c == '>' || c=='|')
+      return 1;
+    c = *(*path)++;
+  } while (c != '\0' && c != '/');     /* Reached to end of str or directory separator */
+  *lfn=TRUE;
+  return c;
+#else
+  return 1;
+#endif
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Trace a file path                                                     */
+/*-----------------------------------------------------------------------*/
+
+static
+FRESULT trace_path (     /* FR_OK(0): successful, !=0: error code */
+  DIR *dj,               /* Pointer to directory object to return last directory */
+  UCHAR *fn,             /* Pointer to last segment name to return {file(8),ext(3),attr(1)} */
+  const UCHAR *path,     /* Full-path string to trace a file or directory */
+  BYTE **dir             /* Pointer to pointer to found entry to return */
+#if _USE_LFN != 0
+  ,DIR *fileobj,         /* Pointer DIR holding the beginning of the LFN, identical to dj if none */
+  const UCHAR** spath,   /* path to start of last item's name */
+  UINT *len              /* length of LFN entry, 0=non-LFN */
+#endif
+)
+{
+  DWORD clust;
+  UCHAR ds;
+  BYTE *dptr = NULL;
+  FATFS *fs = dj->fs;
+  BOOL lfn;
+#if _USE_LFN != 0
+  BYTE a,b,i,j;
+  BOOL match;
+  UINT l;
+  BOOL store=TRUE;
+#endif
+
+  /* Initialize directory object */
+#if _USE_CHDIR != 0 || _USE_CURR_DIR != 0
+  if(fs->curr_dir==0 || (*path!=0 && path[0]=='/')) {
+#endif
+    clust = fs->dirbase;
+    if (fs->fs_type == FS_FAT32) {
+      dj->clust = dj->sclust = clust;
+      dj->sect = clust2sect(fs, clust);
+    } else {
+      dj->clust = dj->sclust = 0;
+      dj->sect = clust;
+    }
+#if _USE_CHDIR != 0 || _USE_CURR_DIR !=0
+  } else {
+    clust=fs->curr_dir;
+    dj->clust = dj->sclust = clust;
+    dj->sect = clust2sect(fs, clust);
+  }
+#endif
+  dj->index = 0;
+
+#if _USE_LFN != 0
+  //fileobj->id=dj->id;
+  fileobj->fs=dj->fs;
+#endif
+
+#if _USE_CHDIR != 0
+  while (path[0] == '/') path++;
+#endif
+
+  if (*path == '\0') {          /* Null path means the root directory */
+    *dir = NULL; return FR_OK;
+  }
+
+  for (;;) {
+#if _USE_LFN != 0
+    *spath=path;     // save this off, as we may need it for the LFN
+    match=TRUE;
+    l=0;
+#endif
+    ds = make_dirfile(&path, fn, &lfn);     /* Get a paragraph into fn[] */
+#if _USE_LFN != 0
+    if(lfn)
+      *len=path-*spath-1; /* this might not be ANSI-compatible, not sure */
+    else
+      *len=0;
+#endif
+    if (ds == 1) return FR_INVALID_NAME;
+    for (;;) {
+      if (!move_fs_window(fs, dj->sect)) return FR_RW_ERROR;
+#if _USE_LFN != 0
+      if (store) {
+        fileobj->clust = dj->clust;
+        fileobj->sect  = dj->sect;
+        fileobj->index = dj->index;
+        store = FALSE;
+        if (!lfn)
+          /* We don't know the length of the LFN, estimate it */
+          *len = 0;
+      }
+#endif
+      dptr = &FSBUF.data[(dj->index & ((SS(fs) - 1) / 32)) * 32];  /* Pointer to the directory entry */
+      if (dptr[DIR_Name] == 0)            /* Has it reached to end of dir? */
+        return !ds ? FR_NO_FILE : FR_NO_PATH;
+#if _USE_LFN != 0
+      if (dptr[DIR_Name] != 0xE5) {            /* Matched? */
+        if((dptr[DIR_Attr] & AM_LFN) == AM_LFN) {
+          if (lfn) {
+            i=((dptr[0]&0x1f)-1)*13;
+            j=0;
+            while(j<13 && match) {
+              a=dptr[pgm_read_byte(LFN_pos+j)];
+              b=dptr[pgm_read_byte(LFN_pos+j++)+1];
+              if(!a && !b) {
+                j--;
+                break;
+              }
+              b=(*spath)[i++];
+              if (b >= 'a' && b <= 'z') {          /* Convert to upper case */
+                b -= 0x20;
+              }
+              if (a >= 'a' && a <= 'z') {          /* Convert to upper case */
+                a -= 0x20;
+              }
+              if(a!= b) {
+                match=FALSE;
+              }
+            }
+            l+=j;
+          } else {
+            /* Track the length of the LFN entry in case it belongs to our file */
+            *len = *len + 13;
+          }
+        } else if ((dptr[DIR_Attr] & AM_LFN) != AM_LFN) {  /* we're a normal entry */
+          if (lfn) {
+            if(lfn && (match && l == *len)) { /* match */
+                memcpy(fn,&dptr[DIR_Name], 8+3);
+                fn[11] = dptr[DIR_NTres];
+                break;
+            }
+            l=0;
+            match=TRUE;
+          } else {
+            /* No LFN to match against */
+            if (dptr[DIR_Name] != 0xE5            /* Matched? */
+                && !(dptr[DIR_Attr] & AM_VOL)
+                && !memcmp(&dptr[DIR_Name], fn, 8+3) ) {
+              break;
+            }
+          }
+          store = TRUE;
+        }
+      } else
+        /* This is a deleted entry, move fileobj forward */
+        store = TRUE;
+#else
+      if (dptr[DIR_Name] != 0xE5                  /* Matched? */
+          && !(dptr[DIR_Attr] & AM_VOL)
+          && !memcmp(&dptr[DIR_Name], fn, 8+3) ) {
+        break;
+      }
+#endif
+      if (!next_dir_entry(dj)) {                  /* Next directory pointer */
+#if _USE_LFN != 0
+        if (!lfn)
+          *len = 0;
+#endif
+        return !ds ? FR_NO_FILE : FR_NO_PATH;
+      }
+    }
+    if (!ds) { *dir = dptr; return FR_OK; }             /* Matched with end of path */
+    if (!(dptr[DIR_Attr] & AM_DIR)) return FR_NO_PATH;  /* Cannot trace because it is a file */
+    clust = ((DWORD)LD_WORD(&dptr[DIR_FstClusHI]) << 16)
+      | LD_WORD(&dptr[DIR_FstClusLO]);                  /* Get cluster# of the directory */
+    dj->clust = dj->sclust = clust;                     /* Restart scanning at the new directory */
+    dj->sect = clust2sect(fs, clust);
+    dj->index = 2;
+  }
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Reserve a directory entry                                             */
+/*-----------------------------------------------------------------------*/
+
+#if !_FS_READONLY
+static
+FRESULT reserve_direntry (  /* FR_OK: successful, FR_DENIED: no free entry, FR_RW_ERROR: a disk error occured */
+  DIR *dj,                  /* Target directory to create new entry */
+  BYTE **dir                /* Pointer to pointer to created entry to retutn */
+#if _USE_LFN != 0
+  ,UINT len
+#endif
+)
+{
+  DWORD clust, sector;
+  BYTE c, n, *dptr;
+  FATFS *fs = dj->fs;
+
+#if _USE_LFN != 0
+  BYTE entries=0;
+  WORD isave=0;
+  DWORD csave=0,ssave=0;
+
+  len=(len+25)/13;
+#endif
+  /* Re-initialize directory object */
+  clust = dj->sclust;
+  if (clust != 0) {     /* Dynamic directory table */
+    dj->clust = clust;
+    dj->sect = clust2sect(fs, clust);
+  } else {              /* Static directory table */
+    dj->sect = fs->dirbase;
+  }
+  dj->index = 0;
+
+  do {
+    if (!move_fs_window(fs, dj->sect)) return FR_RW_ERROR;
+    dptr = &FSBUF.data[(dj->index & ((SS(fs) - 1) / 32)) * 32];  /* Pointer to the directory entry */
+    c = dptr[DIR_Name];
+    if (c == 0 || c == 0xE5) {      /* Found an empty entry */
+#if _USE_LFN != 0
+      /* capture initial entry. */
+      if((entries++) == 0) {
+        *dir=dptr;
+        isave=dj->index;
+        ssave=dj->sect;
+        csave=dj->clust;
+      }
+      if(entries==len) {
+        dj->index=isave;
+        dj->sect=ssave;
+        dj->clust=csave;
+        return FR_OK;
+      }
+    } else if(entries!=len){
+      entries=0;
+#else
+      *dir = dptr; return FR_OK;
+#endif
+    }
+  } while (next_dir_entry(dj));                 /* Next directory pointer */
+  /* Reached to end of the directory table */
+  /* Abort when it is a static table or could not stretch dynamic table */
+  if (clust == 0 || !(clust = create_chain(fs, dj->clust))) return FR_DENIED;
+  if (clust == 1 || !move_fs_window(fs, 0)) return FR_RW_ERROR;
+  /* Cleanup the expanded table */
+  FSBUF.sect = sector = clust2sect(fs, clust);
+  memset(FSBUF.data, 0, SS(fs));
+  for (n = fs->csize; n; n--) {
+    if (disk_write(fs->drive, FSBUF.data, sector, 1) != RES_OK)
+      return FR_RW_ERROR;
+    sector++;
+  }
+  FSBUF.dirty = TRUE;
+#if _USE_LFN != 0
+  if(entries) {   // we had to expand the table, but now we need to go back.
+    if (!move_fs_window(fs, ssave)) return FR_RW_ERROR;
+    dj->index=isave;
+    dj->sect=ssave;
+    dj->clust=csave;
+  } else {
+    /* We allocated a new cluster for all entries, point dj there */
+    dj->index = 0;
+    dj->sect  = FSBUF.sect;
+    dj->clust = clust;
+    *dir = FSBUF.data;
+  }
+#else
+  *dir = FSBUF.data;
+#endif
+
+  return FR_OK;
+}
+#endif /* !_FS_READONLY */
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Load boot record and check if it is a FAT boot record                 */
+/*-----------------------------------------------------------------------*/
+
+static const PROGMEM UCHAR fat32string[] = "FAT32";
+
+static
+BYTE check_fs (     /* 0:The FAT boot record, 1:Valid boot record but not a FAT, 2:Not a boot record or error */
+  FATFS *fs,        /* File system object */
+  DWORD sect        /* Sector# (lba) to check if it is a FAT boot record or not */
+)
+{
+  if (!move_fs_window(fs, sect))                    /* Load boot record, save off old data in process */
+    return 2;
+  if (!sect) {
+    if (disk_read(fs->drive, FSBUF.data, sect, 1) != RES_OK)  /* Load boot record, if sector 0 */
+      return 2;
+    FSBUF.sect = 0;
+  }
+  if (LD_WORD(&FSBUF.data[BS_55AA]) != 0xAA55)      /* Check record signature (always placed at offset 510 even if the sector size is >512) */
+    return 2;
+
+  if (!memcmp_P(&FSBUF.data[BS_FilSysType], fat32string, 3))        /* Check FAT signature */
+    return 0;
+  if (!memcmp_P(&FSBUF.data[BS_FilSysType32], fat32string, 5) && !(FSBUF.data[BPB_ExtFlags] & 0x80))
+    return 0;
+
+  return 1;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Mount a drive                                                         */
+/*-----------------------------------------------------------------------*/
+
+FRESULT mount_drv(
+  BYTE drv,
+  FATFS* fs,
+  BYTE chk_wp           /* !=0: Check media write protection for write access */
+)
+{
+  DSTATUS stat;
+  BYTE fmt, *tbl;
+  DWORD bootsect, fatsize, totalsect, maxclust;
+
+  memset(fs, 0, sizeof(FATFS));       /* Clean-up the file system object */
+  fs->drive = LD2PD(drv);             /* Bind the logical drive and a physical drive */
+  stat = disk_initialize(fs->drive);  /* Initialize low level disk I/O layer */
+  if (stat & STA_NOINIT)              /* Check if the drive is ready */
+    return FR_NOT_READY;
+#if S_MAX_SIZ > 512                   /* Get disk sector size if needed */
+  if (disk_ioctl(fs->drive, GET_SECTOR_SIZE, &SS(fs)) != RES_OK || SS(fs) > S_MAX_SIZ)
+    return FR_NO_FILESYSTEM;
+#endif
+#if !_FS_READONLY
+  if (chk_wp && (stat & STA_PROTECT)) /* Check write protection if needed */
+    return FR_WRITE_PROTECTED;
+#endif
+#if _MULTI_PARTITION == 0
+  /* Search FAT partition on the drive */
+  fmt = check_fs(fs, bootsect = 0);   /* Check sector 0 as an SFD format */
+  if (fmt == 1) {                     /* Not a FAT boot record, it may be patitioned */
+    /* Check a partition listed in top of the partition table */
+    tbl = &FSBUF.data[MBR_Table + LD2PT(drv) * 16]; /* Partition table */
+    if (tbl[4]) {                     /* Is the partition existing? */
+      bootsect = LD_DWORD(&tbl[8]);   /* Partition offset in LBA */
+      fmt = check_fs(fs, bootsect);   /* Check the partition */
+    }
+  }
+#else
+  /* Check only the partition that was requested */
+  if (LD2PT(drv) == 0) {
+    /* Unpartitioned media */
+    fmt = check_fs(fs, bootsect = 0);
+  } else {
+    /* Read MBR */
+    fmt = 1;
+    if (disk_read(fs->drive, FSBUF.data, 0, 1) != RES_OK)
+      goto failed;
+
+    if (LD2PT(drv) < 5) {
+      /* Primary partition */
+      tbl = &FSBUF.data[MBR_Table + (LD2PT(drv)-1) * 16];
+      fmt = 1;
+      if (tbl[4]) {
+        bootsect = LD_DWORD(&tbl[8]);
+        fmt = check_fs(fs, bootsect);
+      }
+    } else {
+      /* Logical drive */
+      BYTE i,curr;
+      fmt = 1;
+      bootsect = 0;
+      fatsize = 0;  // Used to store the offset of the first extended part
+      curr = LD2PT(drv)-4;
+      /* Walk the chain of extended partitions */
+      do {
+        /* Check for an extended partition */
+        for (i=0;i<4;i++) {
+          tbl = &FSBUF.data[MBR_Table + i*16];
+          if (tbl[4] == 5 || tbl[4] == 0x0f)
+            break;
+        }
+        if (i == 4) {
+          fmt = 255;
+          goto failed;
+        }
+        bootsect = fatsize + LD_DWORD(&tbl[8]);
+
+        if (fatsize == 0)
+          fatsize = bootsect;
+
+        /* Read the next sector in the partition chain */
+        if (disk_read(fs->drive, FSBUF.data, bootsect, 1) != RES_OK)
+          goto failed;
+      } while (--curr);
+      /* Look for the non-extended, non-empty partition entry */
+      for (i=0;i<4;i++) {
+        tbl = &FSBUF.data[MBR_Table + i*16];
+        if (tbl[4] && tbl[4] != 5 && tbl[4] != 0x0f)
+          break;
+      }
+      if (i == 4) {
+        /* End of extended partition chain */
+        fmt = 255;
+        goto failed;
+      }
+      bootsect = bootsect + LD_DWORD(&tbl[8]);
+      fmt = check_fs(fs, bootsect);
+    }
+  }
+ failed:
+
+#endif
+
+  if (fmt || LD_WORD(&FSBUF.data[BPB_BytsPerSec]) != SS(fs)) { /* No valid FAT patition is found */
+    if (fmt == 255) {
+      /* At end of extended partition chain */
+      return FR_INVALID_OBJECT;
+    } else {
+      /* No file system found */
+      return FR_NO_FILESYSTEM;
+    }
+  }
+
+  /* Initialize the file system object */
+  fatsize = LD_WORD(&FSBUF.data[BPB_FATSz16]);      /* Number of sectors per FAT */
+  if (!fatsize) fatsize = LD_DWORD(&FSBUF.data[BPB_FATSz32]);
+  fs->sects_fat = fatsize;
+  fs->n_fats = FSBUF.data[BPB_NumFATs];             /* Number of FAT copies */
+  fatsize *= fs->n_fats;                            /* (Number of sectors in FAT area) */
+  fs->fatbase = bootsect + LD_WORD(&FSBUF.data[BPB_RsvdSecCnt]); /* FAT start sector (lba) */
+  fs->csize = FSBUF.data[BPB_SecPerClus];           /* Number of sectors per cluster */
+  fs->n_rootdir = LD_WORD(&FSBUF.data[BPB_RootEntCnt]); /* Nmuber of root directory entries */
+  totalsect = LD_WORD(&FSBUF.data[BPB_TotSec16]);   /* Number of sectors on the file system */
+  if (!totalsect) totalsect = LD_DWORD(&FSBUF.data[BPB_TotSec32]);
+  fs->max_clust = maxclust = (totalsect             /* max_clust = Last cluster# + 1 */
+    - LD_WORD(&FSBUF.data[BPB_RsvdSecCnt]) - fatsize - fs->n_rootdir / (SS(fs)/32)
+    ) / fs->csize + 2;
+
+  fmt = FS_FAT12;                     /* Determine the FAT sub type */
+  if (maxclust >= 0xFF7) fmt = FS_FAT16;
+  if (maxclust >= 0xFFF7) fmt = FS_FAT32;
+  fs->fs_type = fmt;
+
+  if (fmt == FS_FAT32)
+    fs->dirbase = LD_DWORD(&FSBUF.data[BPB_RootClus]);  /* Root directory start cluster */
+  else
+    fs->dirbase = fs->fatbase + fatsize;            /* Root directory start sector (lba) */
+  fs->database = fs->fatbase + fatsize + fs->n_rootdir / (SS(fs)/32);  /* Data start sector (lba) */
+
+#if !_FS_READONLY
+  fs->free_clust = 0xFFFFFFFF;
+# if _USE_FSINFO
+  /* Get fsinfo if needed */
+  if (fmt == FS_FAT32) {
+    fs->fsi_sector = bootsect + LD_WORD(&FSBUF.data[BPB_FSInfo]);
+    //if (disk_read(fs->drive, FSBUF.data, fs->fsi_sector, 1) == RES_OK &&
+    if (move_fs_window(fs,fs->fsi_sector) &&
+      LD_WORD(&FSBUF.data[BS_55AA]) == 0xAA55 &&
+      LD_DWORD(&FSBUF.data[FSI_LeadSig]) == 0x41615252 &&
+      LD_DWORD(&FSBUF.data[FSI_StrucSig]) == 0x61417272) {
+      fs->last_clust = LD_DWORD(&FSBUF.data[FSI_Nxt_Free]);
+      fs->free_clust = LD_DWORD(&FSBUF.data[FSI_Free_Count]);
+    }
+  }
+# endif
+#endif
+  fs->fs_type = fmt;      /* FAT syb-type */
+  //fs->id = ++fsid;                    /* File system mount ID */
+  return FR_OK;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Make sure that the file system is valid                               */
+/*-----------------------------------------------------------------------*/
+
+static
+FRESULT auto_mount (    /* FR_OK(0): successful, !=0: any error occured */
+  const UCHAR **path,   /* Pointer to pointer to the path name (drive number) */
+  FATFS **rfs,          /* Pointer to pointer to the found file system object */
+  BYTE chk_wp           /* !=0: Check media write protection for write access */
+)
+{
+  DSTATUS stat;
+  const UCHAR *p = *path;
+#if _USE_DRIVE_PREFIX != 0
+  BYTE drv;
+
+  /* Get drive number from the path name */
+  while (*p == ' ') p++;              /* Strip leading spaces */
+# if _MULTI_PARTITION != 0
+  *path=p;
+  drv = 0;
+  while(*p >= '0' && *p<='9') {
+    if(drv >= 25 && *p > '5')
+      return FR_INVALID_DRIVE;
+    drv = drv*10+((*p++)-'0');
+  }
+  if(*p != ':') {
+    p = *path;
+    drv = 0;
+  }
+# else
+  drv = p[0] - '0';                   /* Is there a drive number? */
+  if (drv <= 9 && p[1] == ':')
+    p += 2;                           /* Found a drive number, get and strip it */
+  else
+    drv = 0;                          /* No drive number is given, use drive number 0 as default */
+# endif
+#endif
+#if _USE_CHDIR == 0
+  if (*p == '/') p++;                 /* Strip heading slash */
+#endif
+  *path = p;                          /* Return pointer to the path name */
+
+  /* Check if the drive number is valid or not */
+#if _USE_DRIVE_PREFIX != 0
+  if (drv >= _LOGICAL_DRIVES) return FR_INVALID_DRIVE;    /* Is the drive number valid? */
+  *rfs = FatFs[drv];                  /* Returen pointer to the corresponding file system object */
+#endif
+  if (!*rfs) return FR_NOT_ENABLED;   /* Is the file system object registered? */
+
+  if ((*rfs)->fs_type) {              /* If the logical drive has been mounted */
+    stat = disk_status((*rfs)->drive);
+    if (!(stat & STA_NOINIT)) {       /* and physical drive is kept initialized (has not been changed), */
+#if !_FS_READONLY
+      if (chk_wp && (stat & STA_PROTECT))         /* Check write protection if needed */
+        return FR_WRITE_PROTECTED;
+#endif
+      return FR_OK;                   /* The file system object is valid */
+    }
+  }
+
+  /* The logical drive must be re-mounted.  */
+
+#if _USE_DEFERRED_MOUNT != 0
+  return mount_drv(drv,*rfs, chk_wp);
+#else
+  return FR_NOT_READY;
+#endif
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Check if the file/dir object is valid or not                          */
+/*-----------------------------------------------------------------------*/
+
+static
+FRESULT validate (    /* FR_OK(0): The object is valid, !=0: Invalid */
+  const FATFS *fs     /* Pointer to the file system object */
+  //,WORD id             /* Member id of the target object to be checked */
+)
+{
+  if (!fs || !fs->fs_type /*|| fs->id != id */)
+    return FR_INVALID_OBJECT;
+  if (disk_status(fs->drive) & STA_NOINIT)
+    return FR_NOT_READY;
+
+  return FR_OK;
+}
+
+
+
+
+#if _USE_LFN != 0
+static
+BYTE compute_checksum(UCHAR *buf) {
+  BYTE i,rc;
+  rc=buf[0];
+  for(i=1;i<11;i++) {
+    rc=(rc&1?(rc>>1)| 0x80:rc>>1);
+    rc+=buf[i];
+  }
+  return rc;
+}
+
+
+
+
+static
+BYTE dos_char(
+    BYTE x
+)
+{
+  if(x>('a'-1) && x<('z'+1))
+    x=x-'a'+'A';
+  else if(x>(' '-1) && x<'+') {
+  } else if(x>('A'-1) && x<('Z'+1)) {
+  } else if(x>('0'-1) && x<('9'+1)) {
+  } else if(x&0x80) {
+  } else switch(x) {
+    case ',':
+    case '-':
+    case '^':
+    case '~':
+    case '=':
+    case '_':
+    case '`':
+    case '{':
+    case '}':
+      break;
+    default:
+      x='_';
+      break;
+  }
+  return x;
+}
+
+
+
+
+static
+void create_short_name(
+  const UCHAR* name,
+  UINT len,
+  UCHAR* buf
+)
+{
+  BYTE i=0,k,l=0;
+  BYTE j=len;
+
+  memset(buf,' ',11);
+  buf[11]=0;
+  if(name[0]!='.') {
+    while(--j) { /* find the last '.' */
+      if(name[j]=='.') break;
+    }
+    k=j+1;
+    i=8;
+    if(k>1) {
+      while(k<len && i<11) {
+        if(name[k]!=' ') {
+          // build extension
+          buf[i++]=dos_char(name[k]);
+        }
+        k++;
+      }
+    } else
+      j=6;
+  }
+  i=0; /* now build start */
+  while(i<6 && l<j) {
+    if(name[l]!=' ' && name[l]!='.') {
+      buf[i++]=dos_char(name[l]);
+    }
+    l++;
+  }
+  if(i<3) {
+    buf[i++]='A'; /* FIXME: replace this with a way to generate a random or hash hex word. */
+    buf[i++]='B';
+    buf[i++]='C';
+    buf[i++]='D';
+  }
+  buf[i++]='~';
+  buf[i++]='1';
+  if(((BYTE)buf[0])==0xe5)
+    buf[0]=0x05;
+}
+
+
+
+
+static
+BOOL fix_short_name(
+  UCHAR *buf
+)
+{
+  BYTE i=8;
+  BOOL c=FALSE;
+  while(buf[--i]==' ');
+  do {
+    if(buf[i]=='9') {
+      buf[i]='0';
+      c=TRUE;
+    } else if(c && buf[i]=='~') {
+        buf[i]='1';
+        break;
+    } else {
+      buf[i]++;
+      c=FALSE;
+      break;
+    }
+  } while (--i);
+  if(c) {
+    if(!i) return FALSE;
+    buf[i-1]='~';
+  }
+  return TRUE;
+}
+
+
+
+
+static
+FRESULT chk_filename( /* FR_EXIST means name is taken. */
+  DIR *dj,            /* Target directory to create new entry */
+  UCHAR* fn           /* name to check */
+)
+{
+  BYTE *dptr;
+  FATFS *fs = dj->fs;
+  DWORD clust;
+
+  /* Re-initialize directory object */
+  clust = dj->sclust;
+  if (clust) {          /* Dyanmic directory table */
+    dj->clust = clust;
+    dj->sect  = clust2sect(fs, clust);
+  } else {              /* Static directory table */
+    dj->sect  = fs->dirbase;
+  }
+  dj->index = 0;
+
+  do {
+    if (!move_fs_window(fs, dj->sect)) return FR_RW_ERROR;
+    dptr = &FSBUF.data[(dj->index & ((SS(fs) - 1) / 32)) * 32]; /* Pointer to the directory entry */
+    if(dptr[DIR_Name] == 0) {         /* if we got here, we have a match */
+      return FR_OK;
+    } else if(*dptr!=0xe5
+              && (dptr[DIR_Attr] & AM_LFN) != AM_LFN
+              && !(dptr[DIR_Attr] & AM_VOL)
+              && !memcmp(&dptr[DIR_Name], fn, 8+3) )  /* start over. */
+      return FR_EXIST;
+  } while (next_dir_entry(dj));       /* Next directory pointer */
+  /* Reached to end of the directory table */
+  return FR_OK;
+}
+
+FRESULT add_direntry(
+  DIR *dj,              /* Target directory to create new entry */
+  BYTE **dir,           /* pointer to created entry */
+  const UCHAR* spath,
+  UINT len,
+  UCHAR* fn
+)
+{
+  FATFS *fs = dj->fs;
+  DWORD clust,sect;
+  WORD index;
+  BYTE entries,i,j,k;
+  BYTE chk;
+
+  entries=i=(len+12)/13;
+
+  fn[11]=0;             /* ALL uppercase */
+
+  clust = dj->clust;    /* save off entries needed. */
+  index = dj->index;
+  sect  = dj->sect;
+  create_short_name(spath,len,fn);
+  for(;;) {
+    if(!chk_filename(dj,fn)) break;
+    if(!fix_short_name(fn))
+      return FR_EXIST;
+  }
+  chk=compute_checksum(fn);
+  dj->clust = clust;    /* we now have a good name, use it */
+  dj->index = index;
+  dj->sect  = sect;
+  while(move_fs_window(fs, dj->sect)) {
+    *dir = &FSBUF.data[(dj->index & ((SS(fs) - 1) / 32)) * 32]; /* Pointer to the directory entry */
+    if(!i)
+      return FR_OK;
+    FSBUF.dirty = TRUE;
+    memset(*dir, 0, 32);              /* Initialize the new entry with open name */
+    (*dir)[DIR_Name]=(i==entries?0x40:0) | (i);
+    j=0;
+    i--;
+    k=(i)*13;
+    while(j<13 && k<len) {
+      (*dir)[pgm_read_byte(LFN_pos+j++)]=spath[k++];
+    }
+    j++;
+    while(j<13) {
+      (*dir)[pgm_read_byte(LFN_pos+j)]=0xff;
+      (*dir)[pgm_read_byte(LFN_pos+j++)+1]=0xff;
+    }
+    (*dir)[DIR_Attr]=AM_LFN;
+    (*dir)[DIR_Chksum]=chk;
+    if(!next_dir_entry(dj)) break;
+  }
+  return FR_RW_ERROR;
+}
+#endif
+
+
+
+
+/*--------------------------------------------------------------------------
+
+   Public Functions
+
+--------------------------------------------------------------------------*/
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Mount/Unmount a Locical Drive                                         */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_mount (
+  BYTE drv,   /* Logical drive number to be mounted/unmounted */
+  FATFS *fs   /* Pointer to new file system object (NULL for unmount)*/
+)
+{
+#if _USE_DRIVE_PREFIX != 0
+  if (drv >= _LOGICAL_DRIVES) return FR_INVALID_DRIVE;
+
+  if (FatFs[drv]) FatFs[drv]->fs_type = 0;  /* Clear old object */
+
+  FatFs[drv] = fs;      /* Register and clear new object */
+#endif
+  if (fs) fs->fs_type = 0;
+
+#if _USE_DEFERRED_MOUNT == 0
+  return mount_drv(drv,fs,0);
+#else
+  return FR_OK;
+#endif
+}
+
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Open or Create a File                                                 */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_open (
+#if _USE_DRIVE_PREFIX == 0
+  FATFS *fs,           /* Pointer to file system object */
+#endif
+  FIL *fp,             /* Pointer to the blank file object */
+  const UCHAR *path,   /* Pointer to the file name */
+  BYTE mode            /* Access mode and file open mode flags */
+)
+{
+  FRESULT res;
+  DIR dj;
+  BYTE *dir = NULL;
+  UCHAR fn[8+3+1];
+#if _USE_DRIVE_PREFIX != 0
+  FATFS *fs = NULL;
+#endif
+#if _USE_LFN != 0
+  UINT len;
+  DIR fileobj;
+  const UCHAR* spath;
+#endif
+
+
+#if _USE_FS_BUF == 0
+  FPBUF.dirty=FALSE;
+#endif
+  fp->fs = NULL;        /* Clear file object */
+#if !_FS_READONLY
+  mode &= (FA_READ|FA_WRITE|FA_CREATE_ALWAYS|FA_OPEN_ALWAYS|FA_CREATE_NEW);
+  res = auto_mount(&path, &fs, (BYTE)(mode & (FA_WRITE|FA_CREATE_ALWAYS|FA_OPEN_ALWAYS|FA_CREATE_NEW)));
+#else
+  mode &= FA_READ;
+  res = auto_mount(&path, &fs, 0);
+#endif
+  if (res != FR_OK) return res;
+  dj.fs = fs;
+
+#if _USE_LFN != 0
+  res = trace_path(&dj, fn, path, &dir, &fileobj, &spath, &len); /* Trace the file path */
+#else
+  res = trace_path(&dj, fn, path, &dir);   /* Trace the file path */
+#endif
+#if !_FS_READONLY
+  /* Create or Open a file */
+# if _USE_CHDIR != 0
+  if(fn[0]=='.')
+    return FR_INVALID_NAME;
+# endif
+  if (mode & (FA_CREATE_ALWAYS|FA_OPEN_ALWAYS|FA_CREATE_NEW)) {
+    DWORD ps, rs;
+    if (res != FR_OK) {               /* No file, create new */
+      if (res != FR_NO_FILE) return res;
+# if _USE_LFN != 0
+      res = reserve_direntry(&dj, &dir,len);
+      if (res != FR_OK) return res;
+      if(len && add_direntry(&dj,&dir,spath,len,fn)) return FR_RW_ERROR;
+# else
+      res = reserve_direntry(&dj, &dir);
+      if (res != FR_OK) return res;
+# endif
+      memset(dir, 0, 32);             /* Initialize the new entry with open name */
+      memcpy(&dir[DIR_Name], fn, 8+3);
+      dir[DIR_NTres] = fn[11];
+      mode |= FA_CREATE_ALWAYS;
+    }
+    else {                            /* Any object is already existing */
+      if (mode & FA_CREATE_NEW)       /* Cannot create new */
+        return FR_EXIST;
+      if (!dir)                       /* Cannot overwrite it */
+        return FR_DENIED;
+      if (dir[DIR_Attr] & AM_DIR)
+    return FR_IS_DIRECTORY;
+      if (dir[DIR_Attr] & AM_RDO)
+    return FR_IS_READONLY;
+      if (mode & FA_CREATE_ALWAYS) {      /* Resize it to zero if needed */
+        rs = ((DWORD)LD_WORD(&dir[DIR_FstClusHI]) << 16) | LD_WORD(&dir[DIR_FstClusLO]);  /* Get start cluster */
+        ST_WORD(&dir[DIR_FstClusHI], 0);  /* cluster = 0 */
+        ST_WORD(&dir[DIR_FstClusLO], 0);
+        ST_DWORD(&dir[DIR_FileSize], 0);  /* size = 0 */
+        FSBUF.dirty = TRUE;
+        ps = FSBUF.sect;                  /* Remove the cluster chain */
+        if (!remove_chain(fs, rs) || !move_fs_window(fs, ps))
+          return FR_RW_ERROR;
+        fs->last_clust = rs - 1;          /* Reuse the cluster hole */
+      }
+    }
+    if (mode & FA_CREATE_ALWAYS) {
+      dir[DIR_Attr] = 0;                  /* Reset attribute */
+      ps = get_fattime();
+      ST_DWORD(&dir[DIR_CrtTime], ps);    /* Created time */
+      mode |= FA__WRITTEN;        /* Set file changed flag */
+    }
+  }
+  /* Open an existing file */
+  else {
+#endif /* !_FS_READONLY */
+    if (res != FR_OK) return res;     /* Trace failed */
+    if (!dir || (dir[DIR_Attr] & AM_DIR))              /* It is a directory */
+      return FR_NO_FILE;
+#if !_FS_READONLY
+    if ((mode & FA_WRITE) && (dir[DIR_Attr] & AM_RDO)) /* R/O violation */
+      return FR_DENIED;
+  }
+
+  fp->dir_sect = FSBUF.sect;          /* Pointer to the directory entry */
+  fp->dir_ptr = dir;
+#endif
+  fp->flag = mode;                    /* File access mode */
+  fp->org_clust =                     /* File start cluster */
+    ((DWORD)LD_WORD(&dir[DIR_FstClusHI]) << 16) | LD_WORD(&dir[DIR_FstClusLO]);
+  fp->fsize = LD_DWORD(&dir[DIR_FileSize]);         /* File size */
+  fp->fptr = 0;                                     /* Initialize file pointer */
+  fp->csect = 1;                                    /* Sector counter */
+  fp->fs = fs; //fp->id = fs->id;       /* Owner file system object of the file */
+
+#if !_FS_READONLY
+  if (mode & (FA_CREATE_ALWAYS|FA_OPEN_ALWAYS|FA_CREATE_NEW))
+    sync(fs);                         /* sync buffer in case the file was just created */
+                                      /* can't sync earlier, modifies FSBUF.sect       */
+#endif
+  return FR_OK;
+}
+
+FRESULT l_opencluster (
+  FATFS *fs,           /* Pointer to file system object */
+  FIL *fp,             /* Pointer to the blank file object */
+  DWORD clust          /* Cluster number to be opened */
+)
+{
+  fp->flag = FA_READ;
+  fp->org_clust = clust;
+  fp->fsize = (DWORD)fs->csize * SS(fs);
+  fp->fptr = 0;
+  fp->csect = 1;
+  fp->fs = fs;
+
+  return FR_OK;
+}
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Read File                                                             */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_read (
+  FIL *fp,      /* Pointer to the file object */
+  void *buff,   /* Pointer to data buffer */
+  UINT btr,     /* Number of bytes to read */
+  UINT *br      /* Pointer to number of bytes read */
+)
+{
+  FRESULT res;
+  DWORD clust, sect, remain;
+  UINT rcnt, cc;
+  BYTE *rbuff = buff;
+  FATFS *fs = fp->fs;
+
+
+  *br = 0;
+  res = validate(fs /*, fp->id*/);                   /* Check validity of the object */
+  if (res != FR_OK) return res;
+  if (fp->flag & FA__ERROR) return FR_RW_ERROR; /* Check error flag */
+  if (!(fp->flag & FA_READ)) return FR_DENIED;  /* Check access mode */
+  remain = fp->fsize - fp->fptr;
+  if (btr > remain) btr = (UINT)remain;         /* Truncate read count by number of bytes left */
+
+  for ( ;  btr;                                 /* Repeat until all data transferred */
+    rbuff += rcnt, fp->fptr += rcnt, *br += rcnt, btr -= rcnt) {
+    if ((fp->fptr & (SS(fs) - 1)) == 0) {       /* On the sector boundary */
+      if (--fp->csect) {                        /* Decrement left sector counter */
+        sect = fp->curr_sect + 1;               /* Get current sector */
+      } else {                                  /* On the cluster boundary, get next cluster */
+        clust = (fp->fptr == 0) ?
+          fp->org_clust : get_cluster(fs, fp->curr_clust);
+        if (clust < 2 || clust >= fs->max_clust)
+          goto fr_error;
+        fp->curr_clust = clust;                 /* Current cluster */
+        sect = clust2sect(fs, clust);           /* Get current sector */
+        fp->csect = fs->csize;                  /* Re-initialize the left sector counter */
+      }
+#if !_FS_READONLY
+      if(!move_fp_window(fp,0)) goto fr_error;
+#endif
+      fp->curr_sect = sect;           /* Update current sector */
+      cc = btr / SS(fs);              /* When left bytes >= SS(fs), */
+      if (cc) {                       /* Read maximum contiguous sectors directly */
+        if (cc > fp->csect) cc = fp->csect;
+        if (disk_read(fs->drive, rbuff, sect, (BYTE)cc) != RES_OK)
+          goto fr_error;
+        fp->csect -= (BYTE)(cc - 1);
+        fp->curr_sect += cc - 1;
+        rcnt = cc * SS(fs);
+        continue;
+      }
+    }
+    if(btr) {  /* if we actually have bytes to read in singles, copy them in */
+      rcnt = SS(fs) - ((WORD)fp->fptr & (SS(fs) - 1));       /* Copy fractional bytes from file I/O buffer */
+      if (rcnt > btr) rcnt = btr;
+      if(!move_fp_window(fp,fp->curr_sect)) goto fr_error;   /* are we there or not? */
+      memcpy(rbuff, &FPBUF.data[fp->fptr & (SS(fs) - 1)], rcnt);
+    }
+  }
+
+  return FR_OK;
+
+fr_error: /* Abort this file due to an unrecoverable error */
+  fp->flag |= FA__ERROR;
+  return FR_RW_ERROR;
+}
+
+
+
+
+#if !_FS_READONLY
+/*-----------------------------------------------------------------------*/
+/* Write File                                                            */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_write (
+  FIL *fp,          /* Pointer to the file object */
+  const void *buff, /* Pointer to the data to be written */
+  UINT btw,         /* Number of bytes to write */
+  UINT *bw          /* Pointer to number of bytes written */
+)
+{
+  FRESULT res;
+  DWORD clust, sect;
+  UINT wcnt, cc;
+  const BYTE *wbuff = buff;
+  FATFS *fs = fp->fs;
+
+
+  *bw = 0;
+  res = validate(fs /*, fp->id*/);                     /* Check validity of the object */
+  if (res != FR_OK) return res;
+  if (fp->flag & FA__ERROR) return FR_RW_ERROR;   /* Check error flag */
+  if (!(fp->flag & FA_WRITE)) return FR_DENIED;   /* Check access mode */
+  if (fp->fsize + btw < fp->fsize) return FR_OK;  /* File size cannot reach 4GB */
+
+  for ( ;  btw;                                   /* Repeat until all data transferred */
+    wbuff += wcnt, fp->fptr += wcnt, *bw += wcnt, btw -= wcnt) {
+    if ((fp->fptr & (SS(fs) - 1)) == 0) {         /* On the sector boundary */
+      if (--fp->csect) {                          /* Decrement left sector counter */
+        sect = fp->curr_sect + 1;                 /* Get current sector */
+      } else {                                    /* On the cluster boundary, get next cluster */
+        if (fp->fptr == 0) {                      /* Is top of the file */
+          clust = fp->org_clust;
+          if (clust == 0)                         /* No cluster is created yet */
+            fp->org_clust = clust = create_chain(fs, 0);    /* Create a new cluster chain */
+        } else {                                  /* Middle or end of file */
+          clust = create_chain(fs, fp->curr_clust);         /* Trace or streach cluster chain */
+        }
+        if (clust == 0) break;                    /* Disk full */
+        if (clust == 1 || clust >= fs->max_clust) goto fw_error;
+        fp->curr_clust = clust;                   /* Current cluster */
+        sect = clust2sect(fs, clust);             /* Get current sector */
+        fp->csect = fs->csize;                    /* Re-initialize the left sector counter */
+      }
+      if(!move_fp_window(fp,0)) goto fw_error;
+      fp->curr_sect = sect;                       /* Update current sector */
+      cc = btw / SS(fs);                          /* When left bytes >= SS(fs), */
+      if (cc) {                                   /* Write maximum contiguous sectors directly */
+        if (cc > fp->csect) cc = fp->csect;
+        if (disk_write(fs->drive, wbuff, sect, (BYTE)cc) != RES_OK)
+          goto fw_error;
+        fp->csect -= (BYTE)(cc - 1);
+        fp->curr_sect += cc - 1;
+        wcnt = cc * SS(fs);
+        continue;
+      }
+    }
+    if(btw) {
+      wcnt = SS(fs) - ((WORD)fp->fptr & (SS(fs) - 1));  /* Copy fractional bytes to file I/O buffer */
+      if (wcnt > btw) wcnt = btw;
+      if (
+#if _USE_1_BUF == 0
+      fp->fptr < fp->fsize &&       /* Fill sector buffer with file data if needed */
+#endif
+      !move_fp_window(fp,fp->curr_sect))
+    goto fw_error;
+      memcpy(&FPBUF.data[fp->fptr & (SS(fs) - 1)], wbuff, wcnt);
+      FPBUF.dirty=TRUE;
+    }
+  }
+
+  if (fp->fptr > fp->fsize) fp->fsize = fp->fptr; /* Update file size if needed */
+  fp->flag |= FA__WRITTEN;                        /* Set file changed flag */
+  return FR_OK;
+
+fw_error: /* Abort this file due to an unrecoverable error */
+  fp->flag |= FA__ERROR;
+  return FR_RW_ERROR;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Synchronize the file object                                           */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_sync (
+  FIL *fp   /* Pointer to the file object */
+)
+{
+  FRESULT res;
+  DWORD tim;
+  BYTE *dir;
+  FATFS *fs = fp->fs;
+
+
+  res = validate(fs /*, fp->id*/);       /* Check validity of the object */
+  if (res == FR_OK) {
+    if (fp->flag & FA__WRITTEN) {   /* Has the file been written? */
+      /* Write back data buffer if needed */
+      if(!move_fp_window(fp,0)) return FR_RW_ERROR;
+      /* Update the directory entry */
+      if (!move_fs_window(fs, fp->dir_sect))
+        return FR_RW_ERROR;
+      dir = fp->dir_ptr;
+      dir[DIR_Attr] |= AM_ARC;                        /* Set archive bit */
+      ST_DWORD(&dir[DIR_FileSize], fp->fsize);        /* Update file size */
+      ST_WORD(&dir[DIR_FstClusLO], fp->org_clust);    /* Update start cluster */
+      ST_WORD(&dir[DIR_FstClusHI], fp->org_clust >> 16);
+      tim = get_fattime();                            /* Updated time */
+      ST_DWORD(&dir[DIR_WrtTime], tim);
+      fp->flag &= (BYTE)~FA__WRITTEN;
+      res = sync(fs);
+    }
+  }
+  return res;
+}
+
+#endif /* !_FS_READONLY */
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Close File                                                            */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_close (
+  FIL *fp   /* Pointer to the file object to be closed */
+)
+{
+  FRESULT res;
+
+
+#if !_FS_READONLY
+  res = f_sync(fp);
+#else
+  res = validate(fp->fs /*, fp->id*/);
+#endif
+  if (res == FR_OK) fp->fs = NULL;
+  return res;
+}
+
+
+
+
+#if _FS_MINIMIZE <= 2
+/*-----------------------------------------------------------------------*/
+/* Seek File R/W Pointer                                                 */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_lseek (
+  FIL *fp,    /* Pointer to the file object */
+  DWORD ofs   /* File pointer from top of file */
+)
+{
+  FRESULT res;
+  DWORD clust, csize;
+  CHAR csect;
+  FATFS *fs = fp->fs;
+
+  res = validate(fs /*, fp->id*/);          /* Check validity of the object */
+  if (res != FR_OK) return res;
+  if (fp->flag & FA__ERROR) return FR_RW_ERROR;
+  if (fp->fptr == ofs)        /* Don't seek if the target is the current position */
+    return FR_OK;
+  if (!move_fp_window(fp,0)) goto fk_error; /* JLB not sure I need this. */
+    if (ofs > fp->fsize                     /* In read-only mode, clip offset with the file size */
+#if !_FS_READONLY
+         && !(fp->flag & FA_WRITE)
+#endif
+        ) ofs = fp->fsize;
+
+
+  /* Move file R/W pointer if needed */
+  if (ofs) {
+    csize = (DWORD)fs->csize * SS(fs);        /* Cluster size in unit of byte */
+    if(ofs/csize == (fp->fptr-1)/csize) {
+      /* Source and Target are in the same cluster.  Just reset sector fields */
+      fp->fptr = ofs;
+      ofs-=(((DWORD)(ofs/csize))*csize); /* subtract off up to current cluster */
+    } else {
+      fp->csect = 1;
+
+      if(fp->fptr && ofs > fp->fptr) {
+        fp->fptr = (((DWORD)((fp->fptr-1)/csize))*csize);  /* Set file R/W pointer to start of cluster */
+        ofs-=fp->fptr;            /* subtract off clusters traversed */
+        clust = fp->curr_clust;   /* Get current cluster */
+      } else {
+        fp->fptr = 0;             /* Set file R/W pointer to top of the file */
+        clust = fp->org_clust;    /* Get start cluster */
+      }
+
+#if !_FS_READONLY
+      if (clust == 0) {                       /* If the file does not have a cluster chain, create new cluster chain */
+        clust = create_chain(fs, 0);
+        if (clust == 1) goto fk_error;
+        fp->org_clust = clust;
+      }
+#endif
+      if (clust) {                /* If the file has a cluster chain, it can be followed */
+        for (;;) {                                  /* Loop to skip leading clusters */
+          fp->curr_clust = clust;                   /* Update current cluster */
+          if (ofs <= csize) break;
+#if !_FS_READONLY
+          if (fp->flag & FA_WRITE)                  /* Check if in write mode or not */
+            clust = create_chain(fs, clust);        /* Force streached if in write mode */
+          else
+#endif
+            clust = get_cluster(fs, clust);         /* Only follow cluster chain if not in write mode */
+          if (clust == 0) {                         /* Stop if could not follow the cluster chain */
+            ofs = csize; break;
+          }
+          if (clust < 2 || clust >= fs->max_clust) goto fk_error;
+          fp->fptr += csize;                        /* Update R/W pointer */
+          ofs -= csize;
+        }
+        fp->fptr += ofs;                            /* Update file R/W pointer */
+      }
+    }
+    csect = (CHAR)((ofs - 1) / SS(fs));         /* Sector offset in the cluster */
+    fp->curr_sect = clust2sect(fs, fp->curr_clust) + csect;  /* Current sector */
+    fp->csect = fs->csize - csect;        /* Left sector counter in the cluster */
+  } else {
+    fp->fptr = 0; fp->csect = 1;          /* Set file R/W pointer to top of the file */
+  }
+#if !_FS_READONLY
+	if (fp->fptr > fp->fsize) {			        /* Set changed flag if the file was extended */
+    fp->fsize = fp->fptr;
+    fp->flag |= FA__WRITTEN;
+  }
+#endif
+
+  return FR_OK;
+
+fk_error: /* Abort this file due to an unrecoverable error */
+  fp->flag |= FA__ERROR;
+  return FR_RW_ERROR;
+}
+
+
+
+
+#if _FS_MINIMIZE <= 1
+/*-----------------------------------------------------------------------*/
+/* Create a directroy object                                             */
+/*-----------------------------------------------------------------------*/
+
+#if 0
+FRESULT f_opendir (
+#if _USE_DRIVE_PREFIX == 0
+  FATFS *fs,          /* Pointer to file system object */
+#endif
+  DIR *dj,            /* Pointer to directory object to create */
+  const UCHAR *path   /* Pointer to the directory path */
+)
+{
+  FRESULT res;
+  BYTE *dir;
+  UCHAR fn[8+3+1];
+#if _USE_DRIVE_PREFIX != 0
+  FATFS *fs;
+#endif
+#if _USE_LFN != 0
+  DIR fileobj;
+  const UCHAR* spath;
+  UINT len;
+#endif
+
+
+  res = auto_mount(&path, &fs, 0);
+  if (res == FR_OK) {
+    dj->fs = fs;
+#if _USE_LFN != 0
+    res = trace_path(dj, fn, path, &dir, &fileobj, &spath, &len);
+#else
+    res = trace_path(dj, fn, path, &dir);      /* trace the file path */
+#endif
+    if (res == FR_OK) {                        /* Trace completed */
+      if (dir != NULL) {                       /* It is not the root dir */
+        if (dir[DIR_Attr] & AM_DIR) {          /* The entry is a directory */
+          dj->clust = ((DWORD)LD_WORD(&dir[DIR_FstClusHI]) << 16) | LD_WORD(&dir[DIR_FstClusLO]);
+          dj->sect = clust2sect(fs, dj->clust);
+#if _USE_CHDIR != 0  || _USE_CURR_DIR != 0
+          dj->index = 0;
+#else
+          dj->index = 2;
+#endif
+       } else {                               /* The entry is not a directory */
+          res = FR_NO_FILE;
+        }
+      }
+      //dj->id = fs->id;
+    }
+  }
+  return res;
+}
+#endif
+
+
+
+
+/**
+ * l_opendir - open a directory by cluster number
+ * @fs     : Pointer to the FATFS structure of the target file system
+ * @dj     : Pointer to the DIR structure to be filled
+ * @cluster: Number of the start cluster of the directory (0=root)
+ *
+ * This functions works like f_opendir, but instead of a path the directory
+ * to be opened is specified by the FATFS structure and the starting cluster
+ * number. Use 0 for the cluster to open the root directory.
+ * Always returns FR_OK.
+ */
+FRESULT l_opendir(FATFS* fs, DWORD cluster, DIR *dj) {
+  dj->fs = fs;
+  //dj->id = fs->id;
+
+  if (cluster == 0) {
+    /* Open the root directory */
+    cluster = fs->dirbase;
+    if (fs->fs_type == FS_FAT32) {
+      dj->clust = dj->sclust = cluster;
+      dj->sect  = clust2sect(fs, cluster);
+    } else {
+      dj->clust = dj->sclust = 0;
+      dj->sect  = cluster;
+    }
+    dj->index = 0;
+  } else {
+    /* Open a non-root directory */
+    dj->clust = dj->sclust = cluster;
+    dj->sect  = clust2sect(fs, cluster);
+#if _USE_CHDIR != 0 || _USE_CURR_DIR != 0
+    dj->index = 0;
+#else
+    dj->index = 2;
+#endif
+  }
+  return FR_OK;
+}
+
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Read Directory Entry in Sequense                                      */
+/*-----------------------------------------------------------------------*/
+
+
+FRESULT f_readdir (
+  DIR *dj,           /* Pointer to the directory object */
+  FILINFO *finfo     /* Pointer to file information to return */
+)
+{
+  BYTE *dir, c, res;
+  FATFS *fs = dj->fs;
+#if _USE_LFN != 0
+  WORD len=0;
+  BYTE i,pos;
+# ifdef _MAX_LFN_LENGTH
+  BOOL skiplfn = FALSE;
+# endif
+
+  if (finfo->lfn) {
+    finfo->lfn[0]=0;   /* set first char to null */
+# if _USE_LFN_DBCS != 0
+    finfo->lfn[1]=0;
+# endif
+  }
+#endif
+
+  res = validate(fs /*, dj->id*/);         /* Check validity of the object */
+  if (res != FR_OK) return res;
+
+  finfo->fname[0] = 0;
+  while (dj->sect) {
+    if (!move_fs_window(fs, dj->sect))
+      return FR_RW_ERROR;
+    dir = &FSBUF.data[(dj->index & ((SS(fs) - 1) >> 5)) * 32]; /* pointer to the directory entry */
+    c = dir[DIR_Name];
+    if (c == 0) break;                /* Has it reached to end of dir? */
+#if _USE_LFN != 0
+    if (c != 0xE5) {                  /* Is it a valid entry? */
+      if(finfo->lfn && ((dir[DIR_Attr] & AM_LFN) == AM_LFN)) {
+        pos=((*dir & 0x1f)-1)*S_LFN_OFFSET;  /* get offset */
+# ifdef _MAX_LFN_LENGTH
+        if (skiplfn || pos >= _MAX_LFN_LENGTH * S_LFN_INCREMENT) {
+          skiplfn = TRUE;
+          goto skippedlfn;
+        }
+# endif
+        i=0;
+        while(i<13) {
+          if(!dir[pgm_read_byte(LFN_pos+i)] && !dir[pgm_read_byte(LFN_pos+i)+1])
+            break;
+          if (pos >= _MAX_LFN_LENGTH) {
+            len = 0;
+            i = 0;
+            skiplfn = TRUE;
+            break;
+          }
+          finfo->lfn[pos]=dir[pgm_read_byte(LFN_pos+i)];
+# if _USE_LFN_DBCS != 0
+          finfo->lfn[pos+1]=dir[pgm_read_byte(LFN_pos+i)+1];
+# endif
+          pos+=S_LFN_INCREMENT;
+          i++;
+        }
+        len+=i;
+      } else {
+# ifdef _MAX_LFN_LENGTH
+        skiplfn = FALSE;
+# endif
+        if (finfo->lfn) {
+          finfo->lfn[len*S_LFN_INCREMENT]=0;
+# if _USE_LFN_DBCS != 0
+          finfo->lfn[len*S_LFN_INCREMENT+1]=0;
+# endif
+        }
+        get_fileinfo(finfo, dir);
+      }
+    }
+# ifdef _MAX_LFN_LENGTH
+  skippedlfn:
+#endif
+#else
+    if (c != 0xE5 && ((dir[DIR_Attr] & AM_LFN) != AM_LFN))        /* Is it a valid entry? */
+      get_fileinfo(finfo, dir);
+#endif
+    if (!next_dir_entry(dj)) dj->sect = 0;                /* Next entry */
+    if (finfo->fname[0]) break;       /* Found valid entry */
+  }
+
+  return FR_OK;
+}
+
+
+
+
+#if _FS_MINIMIZE == 0
+/*-----------------------------------------------------------------------*/
+/* Get File Status                                                       */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_stat (
+#if _USE_DRIVE_PREFIX == 0
+  FATFS *fs,           /* Pointer to file system object */
+#endif
+  const UCHAR *path,   /* Pointer to the file path */
+  FILINFO *finfo       /* Pointer to file information to return */
+)
+{
+  FRESULT res;
+  DIR dj;
+  BYTE *dir;
+  UCHAR fn[8+3+1];
+#if _USE_DRIVE_PREFIX != 0
+  FATFS *fs;
+#endif
+#if _USE_LFN != 0
+  DIR fileobj;
+  const UCHAR* spath;
+  UINT len;
+#endif
+
+
+  res = auto_mount(&path, &fs, 0);
+  if (res == FR_OK) {
+    dj.fs = fs;
+
+#if _USE_LFN != 0
+    res = trace_path(&dj, fn, path, &dir, &fileobj, &spath, &len);
+#else
+    res = trace_path(&dj, fn, path, &dir);       /* trace the file path */
+#endif
+    if (res == FR_OK) {                          /* Trace completed */
+      if (dir)                                   /* Found an object */
+        get_fileinfo(finfo, dir);
+      else                                       /* It is root dir */
+        res = FR_INVALID_NAME;
+    }
+  }
+
+  return res;
+}
+
+
+
+#if !_FS_READONLY
+/*-----------------------------------------------------------------------*/
+/* Truncate File                                                         */
+/*-----------------------------------------------------------------------*/
+# if _USE_TRUNCATE
+FRESULT f_truncate (
+  FIL *fp   /* Pointer to the file object */
+)
+{
+  FRESULT res;
+  DWORD ncl;
+  FATFS *fs=fp->fs;
+
+
+  res = validate(fs /*, fp->id */);   /* Check validity of the object */
+  if (res != FR_OK) return res;
+  if (fp->flag & FA__ERROR) return FR_RW_ERROR; /* Check error flag */
+  if (!(fp->flag & FA_WRITE)) return FR_DENIED; /* Check access mode */
+
+  if (fp->fsize > fp->fptr) {
+    fp->fsize = fp->fptr; /* Set file size to current R/W point */
+    fp->flag |= FA__WRITTEN;
+    if (fp->fptr == 0) {  /* When set file size to zero, remove entire cluster chain */
+      if (!remove_chain(fp->fs, fp->org_clust)) goto ft_error;
+      fp->org_clust = 0;
+    } else {        /* When truncate a part of the file, remove remaining clusters */
+      ncl = get_cluster(fp->fs, fp->curr_clust);
+      if (ncl < 2) goto ft_error;
+      if (ncl < fp->fs->max_clust) {
+        if (!put_cluster(fp->fs, fp->curr_clust, 0x0FFFFFFF)) goto ft_error;
+        if (!remove_chain(fp->fs, ncl)) goto ft_error;
+      }
+    }
+  }
+
+  return FR_OK;
+
+ft_error: /* Abort this file due to an unrecoverable error */
+  fp->flag |= FA__ERROR;
+  return FR_RW_ERROR;
+}
+#endif
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Get Number of Free Clusters, stop if maxclust found                   */
+/*-----------------------------------------------------------------------*/
+
+FRESULT l_getfree (
+  FATFS *fs,          /* Pointer to file system object */
+  const UCHAR *drv,   /* Pointer to the logical drive number (root dir) */
+  DWORD *nclust,      /* Pointer to the variable to return number of free clusters */
+  DWORD maxclust      /* Stop after maxclust free clusters were found (0 = no limit) */
+)
+{
+  FRESULT res;
+  DWORD n, clust, sect;
+  BYTE fat, f, *p;
+
+  /* Get drive number */
+  res = auto_mount(&drv, &fs, 0);
+  if (res != FR_OK) return res;
+
+  /* If number of free cluster is valid, return it without cluster scan. */
+  if (fs->free_clust <= fs->max_clust - 2) {
+    *nclust = fs->free_clust;
+    return FR_OK;
+  }
+
+  /* Get number of free clusters */
+  fat = fs->fs_type;
+  n = 0;
+  if (fat == FS_FAT12) {
+    clust = 2;
+    do {
+      if ((WORD)get_cluster(fs, clust) == 0) n++;
+    } while (++clust < fs->max_clust);
+  } else {
+    clust = fs->max_clust;
+    sect = fs->fatbase;
+    f = 0; p = 0;
+    do {
+      if (maxclust && n >= maxclust) {
+        n = maxclust;
+        break;
+      }
+      if (!f) {
+        if (!move_fs_window(fs, sect++)) return FR_RW_ERROR;
+        p = FSBUF.data;
+      }
+      if (fat == FS_FAT16) {
+        if (LD_WORD(p) == 0) n++;
+        p += 2; f += 1;
+      } else {
+        if (LD_DWORD(p) == 0) n++;
+        p += 4; f += 2;
+      }
+    } while (--clust);
+  }
+  if (n < maxclust) {
+    fs->free_clust = n;
+#if _USE_FSINFO
+    if (fat == FS_FAT32) fs->fsi_flag = 1;
+#endif
+  }
+
+  *nclust = n;
+  return FR_OK;
+}
+
+/*-----------------------------------------------------------------------*/
+/* Get Number of Free Clusters                                           */
+/*-----------------------------------------------------------------------*/
+FRESULT f_getfree (
+#if _USE_DRIVE_PREFIX == 0
+  FATFS *fs,          /* Pointer to file system object */
+#endif
+  const UCHAR *drv,   /* Pointer to the logical drive number (root dir) */
+  DWORD *nclust       /* Pointer to the variable to return number of free clusters */
+#if _USE_DRIVE_PREFIX != 0
+  ,FATFS **fatfs      /* Pointer to pointer to corresponding file system object to return */
+#endif
+)
+{
+  FRESULT res;
+#if _USE_DRIVE_PREFIX != 0
+  FATFS *fs;
+#endif
+
+  /* Get drive number */
+  res = auto_mount(&drv, &fs, 0);
+  if (res != FR_OK) return res;
+#if _USE_DRIVE_PREFIX != 0
+  *fatfs = fs;
+#endif
+  return l_getfree(fs, drv, nclust, 0);
+}
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Delete a File or Directory                                            */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_unlink (
+#if _USE_DRIVE_PREFIX == 0
+  FATFS *fs,           /* Pointer to file system object */
+#endif
+  const UCHAR *path    /* Pointer to the file or directory path */
+)
+{
+  FRESULT res;
+  DIR dj;
+  BYTE *dir, *sdir;
+  DWORD dclust;
+  DWORD __attribute__((unused)) dsect;
+  UCHAR fn[8+3+1];
+#if _USE_DRIVE_PREFIX != 0
+  FATFS *fs;
+#endif
+#if _USE_LFN != 0
+  DIR fileobj;
+  const UCHAR* spath;
+  UINT len;
+#endif
+
+
+  res = auto_mount(&path, &fs, 1);
+  if (res != FR_OK) return res;
+  dj.fs = fs;
+
+#if _USE_LFN != 0
+  res = trace_path(&dj, fn, path, &dir, &fileobj, &spath, &len);
+#else
+  res = trace_path(&dj, fn, path, &dir);        /* trace the file path */
+#endif
+  if (res != FR_OK) return res;                 /* Trace failed */
+  if (dir == NULL) return FR_INVALID_NAME;      /* It is the root directory */
+  if (dir[DIR_Attr] & AM_RDO) return FR_DENIED; /* It is a R/O object */
+# if _USE_CHDIR != 0
+  if(fn[0]=='.')
+    return FR_INVALID_NAME;
+# endif
+  dsect = FSBUF.sect;
+  dclust = ((DWORD)LD_WORD(&dir[DIR_FstClusHI]) << 16) | LD_WORD(&dir[DIR_FstClusLO]);
+
+  if (dir[DIR_Attr] & AM_DIR) {                 /* It is a sub-directory */
+#if _USE_CHDIR != 0 || _USE_CURR_DIR != 0
+    if (dclust == fs->curr_dir)                 /* Never delete the current directory */
+      return FR_DIR_NOT_EMPTY;
+#endif
+    dj.clust = dclust;                          /* Check if the sub-dir is empty or not */
+    dj.sect = clust2sect(fs, dclust);
+    dj.index = 2;
+    do {
+      if (!move_fs_window(fs, dj.sect)) return FR_RW_ERROR;
+      sdir = &FSBUF.data[(dj.index & ((SS(fs) - 1) >> 5)) * 32];
+      if (sdir[DIR_Name] == 0) break;
+      if (sdir[DIR_Name] != 0xE5 && !(sdir[DIR_Attr] & AM_VOL))
+        return FR_DIR_NOT_EMPTY;                /* The directory is not empty */
+    } while (next_dir_entry(&dj));
+  }
+
+#if _USE_LFN != 0
+  len=(len+25)/13;
+  while(len--) {
+    if (!move_fs_window(fs, fileobj.sect)) return FR_RW_ERROR;  /* Mark the directory entry 'deleted' */
+    dir = &FSBUF.data[(fileobj.index & ((SS(fs) - 1) >> 5)) * 32];
+    dir[DIR_Name] = 0xE5;
+    FSBUF.dirty = TRUE;
+    if (len && !next_dir_entry(&fileobj))             /* Next directory pointer */
+      return FR_RW_ERROR;
+  }
+#else
+  if (!move_fs_window(fs, dsect)) return FR_RW_ERROR; /* Mark the directory entry 'deleted' */
+  dir[DIR_Name] = 0xE5;
+  FSBUF.dirty = TRUE;
+#endif
+  if (!remove_chain(fs, dclust)) return FR_RW_ERROR;  /* Remove the cluster chain */
+
+  return sync(fs);
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Create a Directory                                                    */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_mkdir (
+#if _USE_DRIVE_PREFIX == 0
+  FATFS *fs,           /* Pointer to file system object */
+#endif
+  const UCHAR *path      /* Pointer to the directory path */
+)
+{
+  FRESULT res;
+  DIR dj;
+  BYTE *dir, *fw, n;
+  UCHAR fn[8+3+1];
+  DWORD sect, dsect, dclust, pclust, tim;
+#if _USE_DRIVE_PREFIX != 0
+  FATFS *fs;
+#endif
+#if _USE_LFN != 0
+  UINT len;
+  DIR fileobj;
+  const UCHAR* spath;
+#endif
+
+
+  res = auto_mount(&path, &fs, 1);
+  if (res != FR_OK) return res;
+  dj.fs = fs;
+
+#if _USE_LFN != 0
+  res = trace_path(&dj, fn, path, &dir, &fileobj, &spath, &len);
+#else
+  res = trace_path(&dj, fn, path, &dir);       /* trace the file path */
+#endif
+  if (res == FR_OK) return FR_EXIST;           /* Any file or directory is already existing */
+  if (res != FR_NO_FILE) return res;
+
+#if _USE_CHDIR != 0
+  if(fn[0]=='.')
+    return FR_INVALID_NAME;
+#endif
+#if _USE_LFN != 0
+  res = reserve_direntry(&dj, &dir,len);       /* Reserve a directory entry */
+#else
+  res = reserve_direntry(&dj, &dir);           /* Reserve a directory entry */
+#endif
+  if (res != FR_OK) return res;
+  sect = FSBUF.sect;
+  dclust = create_chain(fs, 0);                /* Allocate a cluster for new directory table */
+  if (dclust == 1) return FR_RW_ERROR;
+  dsect = clust2sect(fs, dclust);
+  if (!dsect) return FR_DENIED;
+  if (!move_fs_window(fs, dsect)) return FR_RW_ERROR;
+
+  fw = FSBUF.data;
+  memset(fw, 0, SS(fs));                       /* Clear the new directory table */
+  for (n = 1; n < fs->csize; n++) {
+    if (disk_write(fs->drive, fw, ++dsect, 1) != RES_OK)
+      return FR_RW_ERROR;
+  }
+  memset(&fw[DIR_Name], ' ', 8+3);             /* Create "." entry */
+  fw[DIR_Name] = '.';
+  fw[DIR_Attr] = AM_DIR;
+  tim = get_fattime();
+  ST_DWORD(&fw[DIR_WrtTime], tim);
+  memcpy(&fw[32], &fw[0], 32); fw[33] = '.';   /* Create ".." entry */
+  ST_WORD(&fw[   DIR_FstClusLO], dclust);
+  ST_WORD(&fw[   DIR_FstClusHI], dclust >> 16);
+  pclust = dj.sclust;
+  if (fs->fs_type == FS_FAT32 && pclust == fs->dirbase) pclust = 0;
+  ST_WORD(&fw[32+DIR_FstClusLO], pclust);
+  ST_WORD(&fw[32+DIR_FstClusHI], pclust >> 16);
+  FSBUF.dirty = TRUE;
+
+  if (!move_fs_window(fs, sect)) return FR_RW_ERROR;
+#if _USE_LFN != 0
+  if(len && add_direntry(&dj,&dir,spath,len,fn)) return FR_RW_ERROR;
+#endif
+  memset(&dir[0], 0, 32);                      /* Initialize the new entry */
+  memcpy(&dir[DIR_Name], fn, 8+3);             /* Name */
+  dir[DIR_NTres] = fn[11];
+  FSBUF.dirty = TRUE;
+  dir[DIR_Attr] = AM_DIR;                      /* Attribute */
+  ST_DWORD(&dir[DIR_WrtTime], tim);            /* Crated time */
+  ST_WORD(&dir[DIR_FstClusLO], dclust);        /* Table start cluster */
+  ST_WORD(&dir[DIR_FstClusHI], dclust >> 16);
+
+  return sync(fs);
+}
+
+
+
+#if _USE_CHDIR != 0
+/*-----------------------------------------------------------------------*/
+/* Change the current directory                                          */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_chdir (
+#if _USE_DRIVE_PREFIX == 0
+  FATFS *fs,           /* Pointer to file system object */
+#endif
+  const UCHAR *path    /* Pointer to the file name */
+)
+{
+#if _USE_DRIVE_PREFIX != 0
+  FATFS *fs;
+#endif
+  FRESULT res;
+  BYTE *dir;
+  DIR dj;
+  UCHAR fn[8+3+1];
+#if _USE_LFN != 0
+  UINT len;
+  DIR fileobj;
+  const UCHAR* spath;
+#endif
+
+  res = auto_mount(&path, &fs, 0);
+  if (res != FR_OK) return res;
+  dj.fs = fs;
+
+  /* Trace the file path */
+#if _USE_LFN != 0
+  res = trace_path(&dj, fn, path, &dir, &fileobj, &spath, &len);
+#else
+  res = trace_path(&dj, fn, path, &dir);   /* trace the file path */
+#endif
+
+  if (res == FR_OK) {
+    if (dir == NULL) {
+      fs->curr_dir = 0;
+    } else if (dir[DIR_Attr] & AM_DIR) {
+      fs->curr_dir =
+        ((DWORD)LD_WORD(&dir[DIR_FstClusHI]) << 16) |
+        LD_WORD(&dir[DIR_FstClusLO]);
+      } else
+        return FR_NOT_DIRECTORY;
+  }
+
+  return res;
+}
+#endif
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Change File Attribute                                                 */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_chmod (
+#if _USE_DRIVE_PREFIX == 0
+  FATFS *fs,           /* Pointer to file system object */
+#endif
+  const UCHAR *path,   /* Pointer to the file path */
+  BYTE value,          /* Attribute bits */
+  BYTE mask            /* Attribute mask to change */
+)
+{
+  FRESULT res;
+  DIR dj;
+  BYTE *dir;
+  UCHAR fn[8+3+1];
+#if _USE_DRIVE_PREFIX != 0
+  FATFS *fs;
+#endif
+#if _USE_LFN != 0
+  UINT len;
+  DIR fileobj;
+  const UCHAR* spath;
+#endif
+
+
+  res = auto_mount(&path, &fs, 1);
+  if (res == FR_OK) {
+    dj.fs = fs;
+#if _USE_LFN != 0
+    res = trace_path(&dj, fn, path, &dir, &fileobj, &spath, &len);       /* trace the file path */
+#else
+    res = trace_path(&dj, fn, path, &dir);       /* trace the file path */
+#endif
+    if (res == FR_OK) {                          /* Trace completed */
+      if (!dir || fn[0]=='.') {
+        res = FR_INVALID_NAME;                   /* Root directory */
+      } else {
+        mask &= AM_RDO|AM_HID|AM_SYS|AM_ARC;     /* Valid attribute mask */
+        dir[DIR_Attr] = (value & mask) | (dir[DIR_Attr] & (BYTE)~mask); /* Apply attribute change */
+        res = sync(fs);
+      }
+    }
+  }
+  return res;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Change Timestamp                                                      */
+/*-----------------------------------------------------------------------*/
+#if _USE_UTIME
+FRESULT f_utime (
+#if _USE_DRIVE_PREFIX == 0
+  FATFS *fs,            /* Pointer to file system object */
+#endif
+  const UCHAR *path,    /* Pointer to the file/directory name */
+  const FILINFO *finfo  /* Pointer to the timestamp to be set */
+)
+{
+#if _USE_DRIVE_PREFIX != 0
+  FATFS *fs;
+#endif
+  FRESULT res;
+  DIR dj;
+  BYTE *dir;
+  CHAR fn[8+3+1];
+#if _USE_LFN != 0
+  UINT len;
+  DIR fileobj;
+  const UCHAR* spath;
+#endif
+
+  res = auto_mount(&path, &fs, 1);
+  if (res == FR_OK) {
+    dj.fs=fs;
+#if _USE_LFN != 0
+    res = trace_path(&dj, fn, path, &dir, &fileobj, &spath, &len);
+#else
+    res = trace_path(&dj, fn, path, &dir);   /* trace the file path */
+#endif
+    if (res == FR_OK) {                      /* Trace completed */
+      if (!dir) {
+        res = FR_INVALID_NAME;               /* Root directory */
+      } else {
+        ST_WORD(&dir[DIR_WrtTime], finfo->ftime);
+        ST_WORD(&dir[DIR_WrtDate], finfo->fdate);
+        res = sync(fs);
+      }
+    }
+  }
+  return res;
+}
+#endif
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Rename File/Directory                                                 */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_rename (
+#if _USE_DRIVE_PREFIX == 0
+  FATFS *fs,              /* Pointer to file system object */
+#endif
+  const UCHAR *path_old,   /* Pointer to the old name */
+  const UCHAR *path_new    /* Pointer to the new name */
+)
+{
+  FRESULT res;
+  DIR dj;
+  DWORD __attribute__((unused)) sect_old;
+  BYTE *dir_old, *dir_new, direntry[32-11];
+  UCHAR fn[8+3+1];
+#if _USE_DRIVE_PREFIX != 0
+  FATFS *fs;
+#endif
+#if _USE_LFN != 0
+  UINT len_old, len_new;
+  DIR fileobj;
+  const UCHAR* spath;
+#endif
+
+
+  res = auto_mount(&path_old, &fs, 1);
+  if (res != FR_OK) return res;
+  dj.fs = fs;
+
+#if _USE_LFN != 0
+  res = trace_path(&dj, fn, path_old, &dir_old, &fileobj, &spath, &len_old);
+#else
+  res = trace_path(&dj, fn, path_old, &dir_old);       /* trace the file path */
+#endif
+  if (res != FR_OK) return res;                        /* The old object is not found */
+  if (!dir_old) return FR_NO_FILE;
+  sect_old = FSBUF.sect;                               /* Save the object information */
+  memcpy(direntry, &dir_old[DIR_Attr], 32-11);
+
+#if _USE_LFN != 0
+  res = trace_path(&dj, fn, path_new, &dir_new, &fileobj, &spath, &len_new);
+#else
+  res = trace_path(&dj, fn, path_new, &dir_new);       /* trace the file path */
+#endif
+  if (res == FR_OK) return FR_EXIST;                   /* The new object name is already existing */
+  if (res != FR_NO_FILE) return res;                   /* Is there no old name? */
+#if _USE_CHDIR != 0
+  if(fn[0]=='.')
+    return FR_INVALID_NAME;
+#endif
+#if _USE_LFN != 0
+  res = reserve_direntry(&dj, &dir_new,len_new);       /* Reserve a directory entry */
+  if (res != FR_OK) return res;
+
+  if(len_new && add_direntry(&dj,&dir_new,spath,len_new,fn))  /* need to get shortname, check it, and add all names */
+    return FR_RW_ERROR;
+#else
+  res = reserve_direntry(&dj, &dir_new);               /* Reserve a directory entry */
+  if (res != FR_OK) return res;
+#endif
+  memcpy(&dir_new[DIR_Attr], direntry, 32-11);         /* Create new entry */
+  memcpy(&dir_new[DIR_Name], fn, 8+3);
+  dir_new[DIR_NTres] = fn[11];
+  FSBUF.dirty = TRUE;
+
+#if _USE_LFN != 0
+  /* Trace it again, fileobj was clobbered while tracing the new path */
+  res = trace_path(&dj, fn, path_old, &dir_old, &fileobj, &spath, &len_old);
+  len_old=(len_old+25)/13;
+  while(len_old--) {
+    if (!move_fs_window(fs, fileobj.sect)) return FR_RW_ERROR;    /* Mark the directory entry 'deleted' */
+    dir_old = &FSBUF.data[(fileobj.index & ((SS(fs) - 1) >> 5)) * 32];
+    dir_old[DIR_Name] = 0xE5;
+    FSBUF.dirty = TRUE;
+    if (!next_dir_entry(&fileobj))                     /* Next directory pointer */
+      return FR_RW_ERROR;
+  }
+#else
+  if (!move_fs_window(fs, sect_old)) return FR_RW_ERROR;          /* Remove old entry */
+  dir_old[DIR_Name] = 0xE5;
+#endif
+
+  return sync(fs);
+}
+
+#endif /* !_FS_READONLY */
+#endif /* _FS_MINIMIZE == 0 */
+#endif /* _FS_MINIMIZE <= 1 */
+#endif /* _FS_MINIMIZE <= 2 */
+
+
+
+#if _USE_MKFS && !_FS_READONLY
+/*-----------------------------------------------------------------------*/
+/* Create File System on the Drive                                       */
+/*-----------------------------------------------------------------------*/
+
+#define N_ROOTDIR 512           /* Multiple of 32 and <= 2048 */
+#define N_FATS    1             /* 1 or 2 */
+#define MAX_SECTOR  64000000UL  /* Maximum partition size */
+#define MIN_SECTOR  2000UL      /* Minimum partition size */
+
+
+FRESULT f_mkfs (
+  BYTE drv,         /* Logical drive number */
+  BYTE partition,   /* Partitioning rule 0:FDISK, 1:SFD */
+  WORD allocsize    /* Allocation unit size [bytes] */
+)
+{
+  BYTE fmt, m, *tbl;
+  DWORD b_part, b_fat, b_dir, b_data;     /* Area offset (LBA) */
+  DWORD n_part, n_rsv, n_fat, n_dir;      /* Area size */
+  DWORD n_clust, n;
+  FATFS *fs;
+  DSTATUS stat;
+
+
+  /* Check validity of the parameters */
+  if (drv >= _LOGICAL_DRIVES) return FR_INVALID_DRIVE;
+  if (partition >= 2) return FR_MKFS_ABORTED;
+  for (n = 512; n <= 32768U && n != allocsize; n <<= 1);
+  if (n != allocsize) return FR_MKFS_ABORTED;
+
+  /* Check mounted drive and clear work area */
+  fs = FatFs[drv];
+  if (!fs) return FR_NOT_ENABLED;
+  fs->fs_type = 0;
+  drv = LD2PD(drv);
+
+  /* Get disk statics */
+  stat = disk_initialize(drv);
+  if (stat & STA_NOINIT) return FR_NOT_READY;
+  if (stat & STA_PROTECT) return FR_WRITE_PROTECTED;
+  if (disk_ioctl(drv, GET_SECTOR_COUNT, &n_part) != RES_OK || n_part < MIN_SECTOR)
+    return FR_MKFS_ABORTED;
+  if (n_part > MAX_SECTOR) n_part = MAX_SECTOR;
+  b_part = (!partition) ? 63 : 0;         /* Boot sector */
+  n_part -= b_part;
+#if S_MAX_SIZ > 512                       /* Check disk sector size */
+  if (disk_ioctl(drv, GET_SECTOR_SIZE, &SS(fs)) != RES_OK
+    || SS(fs) > S_MAX_SIZ
+    || SS(fs) > allocsize)
+    return FR_MKFS_ABORTED;
+#endif
+  allocsize /= SS(fs);                     /* Number of sectors per cluster */
+
+  /* Pre-compute number of clusters and FAT type */
+  n_clust = n_part / allocsize;
+  fmt = FS_FAT12;
+  if (n_clust >= 0xFF5) fmt = FS_FAT16;
+  if (n_clust >= 0xFFF5) fmt = FS_FAT32;
+
+  /* Determine offset and size of FAT structure */
+  switch (fmt) {
+  case FS_FAT12:
+    n_fat = ((n_clust * 3 + 1) / 2 + 3 + SS(fs) - 1) / SS(fs);
+    n_rsv = 1 + partition;
+    n_dir = N_ROOTDIR * 32 / SS(fs);
+    break;
+  case FS_FAT16:
+    n_fat = ((n_clust * 2) + 4 + SS(fs) - 1) / SS(fs);
+    n_rsv = 1 + partition;
+    n_dir = N_ROOTDIR * 32 / SS(fs);
+    break;
+  default:
+    n_fat = ((n_clust * 4) + 8 + SS(fs) - 1) / SS(fs);
+    n_rsv = 33 - partition;
+    n_dir = 0;
+  }
+  b_fat = b_part + n_rsv;                 /* FATs start sector */
+  b_dir = b_fat + n_fat * N_FATS;         /* Directory start sector */
+  b_data = b_dir + n_dir;                 /* Data start sector */
+
+  /* Align data start sector to erase block boundary (for flash memory media) */
+  if (disk_ioctl(drv, GET_BLOCK_SIZE, &n) != RES_OK) return FR_MKFS_ABORTED;
+  n = (b_data + n - 1) & ~(n - 1);
+  n_fat += (n - b_data) / N_FATS;
+  /* b_dir and b_data are no longer used below */
+
+  /* Determine number of cluster and final check of validity of the FAT type */
+  n_clust = (n_part - n_rsv - n_fat * N_FATS - n_dir) / allocsize;
+  if (   (fmt == FS_FAT16 && n_clust < 0xFF5)
+    || (fmt == FS_FAT32 && n_clust < 0xFFF5))
+    return FR_MKFS_ABORTED;
+
+  /* Create partition table if needed */
+  if (!partition) {
+    DWORD n_disk = b_part + n_part;
+
+    tbl = &FSBUF.data[MBR_Table];
+    ST_DWORD(&tbl[0], 0x00010180);        /* Partition start in CHS */
+    if (n_disk < 63UL * 255 * 1024) {     /* Partition end in CHS */
+      n_disk = n_disk / 63 / 255;
+      tbl[7] = (BYTE)n_disk;
+      tbl[6] = (BYTE)((n_disk >> 2) | 63);
+    } else {
+      ST_WORD(&tbl[6], 0xFFFF);
+    }
+    tbl[5] = 254;
+    if (fmt != FS_FAT32)                  /* System ID */
+      tbl[4] = (n_part < 0x10000) ? 0x04 : 0x06;
+    else
+      tbl[4] = 0x0c;
+    ST_DWORD(&tbl[8], 63);                /* Partition start in LBA */
+    ST_DWORD(&tbl[12], n_part);           /* Partition size in LBA */
+    ST_WORD(&tbl[64], 0xAA55);            /* Signature */
+    if (disk_write(drv, FSBUF.data, 0, 1) != RES_OK)
+      return FR_RW_ERROR;
+  }
+
+  /* Create boot record */
+  tbl = FSBUF.data;                       /* Clear buffer */
+  memset(tbl, 0, SS(fs));
+  ST_DWORD(&tbl[BS_jmpBoot], 0x90FEEB);   /* Boot code (jmp $, nop) */
+  ST_WORD(&tbl[BPB_BytsPerSec], SS(fs));  /* Sector size */
+  tbl[BPB_SecPerClus] = (BYTE)allocsize;  /* Sectors per cluster */
+  ST_WORD(&tbl[BPB_RsvdSecCnt], n_rsv);   /* Reserved sectors */
+  tbl[BPB_NumFATs] = N_FATS;              /* Number of FATs */
+  ST_WORD(&tbl[BPB_RootEntCnt], SS(fs) / 32 * n_dir);      /* Number of rootdir entries */
+  if (n_part < 0x10000) {                 /* Number of total sectors */
+    ST_WORD(&tbl[BPB_TotSec16], n_part);
+  } else {
+    ST_DWORD(&tbl[BPB_TotSec32], n_part);
+  }
+  tbl[BPB_Media] = 0xF8;                  /* Media descripter */
+  ST_WORD(&tbl[BPB_SecPerTrk], 63);       /* Number of sectors per track */
+  ST_WORD(&tbl[BPB_NumHeads], 255);       /* Number of heads */
+  ST_DWORD(&tbl[BPB_HiddSec], b_part);    /* Hidden sectors */
+  n = get_fattime();                      /* Use current time as a VSN */
+  if (fmt != FS_FAT32) {
+    ST_DWORD(&tbl[BS_VolID], n);          /* Volume serial number */
+    ST_WORD(&tbl[BPB_FATSz16], n_fat);    /* Number of secters per FAT */
+    tbl[BS_DrvNum] = 0x80;                /* Drive number */
+    tbl[BS_BootSig] = 0x29;               /* Extended boot signature */
+    memcpy(&tbl[BS_VolLab], "NO NAME    FAT     ", 19);   /* Volume lavel, FAT signature */
+  } else {
+    ST_DWORD(&tbl[BS_VolID32], n);        /* Volume serial number */
+    ST_DWORD(&tbl[BPB_FATSz32], n_fat);   /* Number of secters per FAT */
+    ST_DWORD(&tbl[BPB_RootClus], 2);      /* Root directory cluster (2) */
+    ST_WORD(&tbl[BPB_FSInfo], 1);         /* FSInfo record (bs+1) */
+    ST_WORD(&tbl[BPB_BkBootSec], 6);      /* Backup boot record (bs+6) */
+    tbl[BS_DrvNum32] = 0x80;              /* Drive number */
+    tbl[BS_BootSig32] = 0x29;             /* Extended boot signature */
+    memcpy(&tbl[BS_VolLab32], "NO NAME    FAT32   ", 19); /* Volume lavel, FAT signature */
+  }
+  ST_WORD(&tbl[BS_55AA], 0xAA55);         /* Signature */
+  if (disk_write(drv, tbl, b_part+0, 1) != RES_OK)
+    return FR_RW_ERROR;
+  if (fmt == FS_FAT32)
+    disk_write(drv, tbl, b_part+6, 1);
+
+  /* Initialize FAT area */
+  for (m = 0; m < N_FATS; m++) {
+    memset(tbl, 0, SS(fs));               /* 1st sector of the FAT  */
+    if (fmt != FS_FAT32) {
+      n = (fmt == FS_FAT12) ? 0x00FFFFF8 : 0xFFFFFFF8;
+      ST_DWORD(&tbl[0], n);               /* Reserve cluster #0-1 (FAT12/16) */
+    } else {
+      ST_DWORD(&tbl[0], 0xFFFFFFF8);      /* Reserve cluster #0-1 (FAT32) */
+      ST_DWORD(&tbl[4], 0xFFFFFFFF);
+      ST_DWORD(&tbl[8], 0x0FFFFFFF);      /* Reserve cluster #2 for root dir */
+    }
+    if (disk_write(drv, tbl, b_fat++, 1) != RES_OK)
+      return FR_RW_ERROR;
+    memset(tbl, 0, SS(fs));               /* Following FAT entries are filled by zero */
+    for (n = 1; n < n_fat; n++) {
+      if (disk_write(drv, tbl, b_fat++, 1) != RES_OK)
+        return FR_RW_ERROR;
+    }
+  }
+
+  /* Initialize Root directory */
+  m = (BYTE)((fmt == FS_FAT32) ? allocsize : n_dir);
+  do {
+    if (disk_write(drv, tbl, b_fat++, 1) != RES_OK)
+      return FR_RW_ERROR;
+  } while (--m);
+
+  /* Create FSInfo record if needed */
+  if (fmt == FS_FAT32) {
+    ST_WORD(&tbl[BS_55AA], 0xAA55);
+    ST_DWORD(&tbl[FSI_LeadSig], 0x41615252);
+    ST_DWORD(&tbl[FSI_StrucSig], 0x61417272);
+    ST_DWORD(&tbl[FSI_Free_Count], n_clust - 1);
+    ST_DWORD(&tbl[FSI_Nxt_Free], 0xFFFFFFFF);
+    disk_write(drv, tbl, b_part+1, 1);
+    disk_write(drv, tbl, b_part+7, 1);
+  }
+
+  return (disk_ioctl(drv, CTRL_SYNC, NULL) == RES_OK) ? FR_OK : FR_RW_ERROR;
+}
+
+#endif /* _USE_MKFS && !_FS_READONLY */
+
+
+
+
+#if _USE_STRFUNC >= 1
+/*-----------------------------------------------------------------------*/
+/* Get a string from the file                                            */
+/*-----------------------------------------------------------------------*/
+char* fgets (
+    char* buff, /* Pointer to the string buffer to read */
+    int len,    /* Size of string buffer */
+    FIL* fil    /* Pointer to the file object */
+)
+{
+    int i = 0;
+    char *p = buff;
+    UINT rc;
+
+
+    while (i < len - 1) {           /* Read bytes until buffer gets filled */
+        f_read(fil, p, 1, &rc);
+        if (rc != 1) break;         /* Break when no data to read */
+#if _USE_STRFUNC >= 2
+        if (*p == '\r') continue;   /* Strip '\r' */
+#endif
+        i++;
+        if (*p++ == '\n') break;    /* Break when reached end of line */
+    }
+    *p = 0;
+    return i ? buff : 0;            /* When no data read (eof or error), return with error. */
+}
+
+
+
+#if !_FS_READONLY
+#include <stdarg.h>
+/*-----------------------------------------------------------------------*/
+/* Put a character to the file                                           */
+/*-----------------------------------------------------------------------*/
+int fputc (
+    int chr,    /* A character to be output */
+    FIL* fil    /* Ponter to the file object */
+)
+{
+    UINT bw;
+    char c;
+
+
+#if _USE_STRFUNC >= 2
+    if (chr == '\n') fputc ('\r', fil); /* LF -> CRLF conversion */
+#endif
+    if (!fil) { /* Special value may be used to switch the destination to any other device */
+    /*  put_console(chr);   */
+        return chr;
+    }
+    c = (char)chr;
+    f_write(fil, &c, 1, &bw);   /* Write a byte to the file */
+    return bw ? chr : EOF;      /* Return the resulut */
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Put a string to the file                                              */
+/*-----------------------------------------------------------------------*/
+int fputs (
+    const char* str,    /* Pointer to the string to be output */
+    FIL* fil            /* Pointer to the file object */
+)
+{
+    int n;
+
+
+    for (n = 0; *str; str++, n++) {
+        if (fputc(*str, fil) == EOF) return EOF;
+    }
+    return n;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Put a formatted string to the file                                    */
+/*-----------------------------------------------------------------------*/
+int fprintf (
+    FIL* fil,           /* Pointer to the file object */
+    const char* str,    /* Pointer to the format string */
+    ...                 /* Optional arguments... */
+)
+{
+    va_list arp;
+    UCHAR c, f, r;
+    ULONG val;
+    char s[16];
+    int i, w, res, cc;
+
+
+    va_start(arp, str);
+
+    for (cc = res = 0; cc != EOF; res += cc) {
+        c = *str++;
+        if (c == 0) break;          /* End of string */
+        if (c != '%') {             /* Non escape cahracter */
+            cc = fputc(c, fil);
+            if (cc != EOF) cc = 1;
+            continue;
+        }
+        w = f = 0;
+        c = *str++;
+        if (c == '0') {             /* Flag: '0' padding */
+            f = 1; c = *str++;
+        }
+        while (c >= '0' && c <= '9') {  /* Precision */
+            w = w * 10 + (c - '0');
+            c = *str++;
+        }
+        if (c == 'l') {             /* Prefix: Size is long int */
+            f |= 2; c = *str++;
+        }
+        if (c == 's') {             /* Type is string */
+            cc = fputs(va_arg(arp, char*), fil);
+            continue;
+        }
+        if (c == 'c') {             /* Type is character */
+            cc = fputc(va_arg(arp, char), fil);
+            if (cc != EOF) cc = 1;
+            continue;
+        }
+        r = 0;
+        if (c == 'd') r = 10;       /* Type is signed decimal */
+        if (c == 'u') r = 10;       /* Type is unsigned decimal */
+        if (c == 'X') r = 16;       /* Type is unsigned hexdecimal */
+        if (r == 0) break;          /* Unknown type */
+        if (f & 2) {                /* Get the value */
+            val = (ULONG)va_arg(arp, long);
+        } else {
+            val = (c == 'd') ? (ULONG)(long)va_arg(arp, int) : (ULONG)va_arg(arp, unsigned int);
+        }
+        /* Put numeral string */
+        if (c == 'd') {
+            if (val >= 0x80000000) {
+                val = 0 - val;
+                f |= 4;
+            }
+        }
+        i = sizeof(s) - 1; s[i] = 0;
+        do {
+            c = (UCHAR)(val % r + '0');
+            if (c > '9') c += 7;
+            s[--i] = c;
+            val /= r;
+        } while (i && val);
+        if (i && (f & 4)) s[--i] = '-';
+        w = sizeof(s) - 1 - w;
+        while (i && i > w) s[--i] = (f & 1) ? '0' : ' ';
+        cc = fputs(&s[i], fil);
+    }
+
+    va_end(arp);
+    return (cc == EOF) ? cc : res;
+}
+
+#endif /* !_FS_READONLY */
+#endif /* _USE_STRFUNC >= 1*/
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ff.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ff.h
new file mode 100644
index 00000000..87c408bc
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ff.h
@@ -0,0 +1,446 @@
+/*--------------------------------------------------------------------------/
+/  FatFs - FAT file system module include file  R0.06        (C)ChaN, 2008
+/---------------------------------------------------------------------------/
+/ FatFs module is an experimenal project to implement FAT file system to
+/ cheap microcontrollers. This is a free software and is opened for education,
+/ research and development under license policy of following trems.
+/
+/  Copyright (C) 2008, ChaN, all right reserved.
+/
+/ * The FatFs module is a free software and there is no warranty.
+/ * You can use, modify and/or redistribute it for personal, non-profit or
+/ * commercial use without any restriction under your responsibility.
+/ * Redistributions of source code must retain the above copyright notice.
+/
+/---------------------------------------------------------------------------*/
+
+#ifndef _FATFS
+
+#define _MCU_ENDIAN     1
+/* The _MCU_ENDIAN defines which access method is used to the FAT structure.
+/  1: Enable word access.
+/  2: Disable word access and use byte-by-byte access instead.
+/  When the architectural byte order of the MCU is big-endian and/or address
+/  miss-aligned access results incorrect behavior, the _MCU_ENDIAN must be set
+/  to 2. If it is not the case, it can be set to 1 for good code efficiency. */
+
+#define _FS_READONLY    0
+/* Setting _FS_READONLY to 1 defines read only configuration. This removes
+/  writing functions, f_write, f_sync, f_unlink, f_mkdir, f_chmod, f_rename,
+/  f_truncate and useless f_getfree. */
+
+#define _FS_MINIMIZE    0
+/* The _FS_MINIMIZE option defines minimization level to remove some functions.
+/  0: Full function.
+/  1: f_stat, f_getfree, f_unlink, f_mkdir, f_chmod, f_truncate and f_rename are removed.
+/  2: f_opendir and f_readdir are removed in addition to level 1.
+/  3: f_lseek is removed in addition to level 2. */
+
+#define _USE_STRFUNC    0
+/* To enable string functions, set _USE_STRFUNC to 1 or 2. */
+
+#define _DRIVES     MAX_DRIVES
+/* Number of physical drives to be used. This affects the size of internal
+ * table. (when using _USE_DRIVE_PREFIX */
+
+#define _USE_MKFS   0
+/* When _USE_MKFS is set to 1 and _FS_READONLY is set to 0, f_mkfs function is
+/  enabled. */
+
+#define _MULTI_PARTITION    1
+/* When _MULTI_PARTITION is set to 0, each logical drive is bound to the same
+/  physical drive number and can mount only 1st primary partition.
+/
+/  When it is set to 1, the low _PARTITION_MASK bits of each partition represent
+/  the partition and the high (8-_PARTITION_MASK) bits represent the physical
+/  drive */
+
+#define _PARTITION_MASK     4
+
+#define _USE_FSINFO 1
+/* To enable FSInfo support on FAT32 volume, set _USE_FSINFO to 1. */
+
+#define _USE_SJIS   0
+/* When _USE_SJIS is set to 1, Shift-JIS code transparency is enabled, otherwise
+/  only US-ASCII(7bit) code can be accepted as file/directory name. */
+
+#define _USE_NTFLAG 0
+/* When _USE_NTFLAG is set to 1, upper/lower case of the file name is preserved.
+/  Note that the files are always accessed in case insensitive. */
+
+#define _USE_CHDIR 0
+
+#define _USE_CURR_DIR 1
+
+#define _USE_LFN 1
+
+/* Maximum number of characters to return for a LFN */
+/* The buffer used for FILINFO.lfn must be at least */
+/* _MAX_LFN_LENGTH+1 characters long!               */
+/* Note that if _USE_LFN_DBCS is set, this value    */
+/* represents the characters needed, not bytes      */
+#define _MAX_LFN_LENGTH 20
+
+/* When _USE_LFN_DBCS is set to 1, FILINFO.lfn will contain a DBCS string, not
+/  a simple ASCII string  */
+#define _USE_LFN_DBCS 0
+
+/* When set to 1, All FIL objects will use the buffer.  This reduces memory
+/  requirements as open files will only require space for a FIL object, but
+/  operate slower. When set, ff.c will behave like tff.c, but will allow
+/  multiple filesystems.  */
+#define _USE_FS_BUF 1
+
+/* When set to 1, All objects will use a static  buffer.  This reduces memory
+/  requirements to the absolute minimum ~512 bytes for the buffer, but will
+/  operate slower.  This option can only be set if _USE_FS_BUF is set.  */
+#define _USE_1_BUF 1
+
+/* If set to 1, FatFs will manage the FATFS structures after mounting.  If
+/  set to 0, the caller must send the correct drive FATFS structure for each
+/  call.  Normally, this should be set to 1, but if the caller wants to use
+/  low level l_* functions or skip sending the drive number in the path string,
+/  this must be turned off.  */
+#define _USE_DRIVE_PREFIX 0
+
+/* If set to 1, FatFS will delay mounting the drive until first use.  Normally,
+/  this should be turned on.  However, it cannot be used with
+/  _USE_DRIVE_PREFIX = 0  */
+#define _USE_DEFERRED_MOUNT 0
+
+/* New features in 0.05a, not required yet */
+#define _USE_TRUNCATE 0
+#define _USE_UTIME   0
+
+#include "integer.h"
+
+#if _USE_LFN_DBCS != 0
+#define S_LFN_OFFSET 26
+#define S_LFN_INCREMENT 2
+#else
+#define S_LFN_OFFSET 13
+#define S_LFN_INCREMENT 1
+#endif
+
+/* Definitions corresponds to multiple sector size (not tested) */
+#define S_MAX_SIZ   512U            /* Do not change */
+#if S_MAX_SIZ > 512U
+#define SS(fs)  ((fs)->s_size)
+#else
+#define SS(fs)  512U
+#endif
+
+#if _USE_1_BUF == 1 && _USE_FS_BUF == 0
+#error You can only use 1_BUF with _USE_FS_BUF at present
+#define _USE_1_BUF 0
+#endif
+
+typedef struct _BUF {
+  DWORD sect;
+  BYTE  dirty;              /* dirty flag (1:must be written back) */
+//BYTE  pad1;
+#if _USE_1_BUF != 0
+  struct _FATFS *fs;
+#endif
+  BYTE  data[S_MAX_SIZ];    /* Disk access window for Directory/FAT */
+} BUF;
+
+/* File system object structure */
+typedef struct _FATFS {
+  //WORD    id;             /* File system mount ID */
+    WORD    n_rootdir;      /* Number of root directory entries */
+    DWORD   sects_fat;      /* Sectors per fat */
+    DWORD   max_clust;      /* Maximum cluster# + 1 */
+    DWORD   fatbase;        /* FAT start sector */
+    DWORD   dirbase;        /* Root directory start sector (cluster# for FAT32) */
+    DWORD   database;       /* Data start sector */
+#if _USE_CHDIR != 0 || _USE_CURR_DIR != 0
+    DWORD curr_dir;
+#endif
+#if !_FS_READONLY
+    DWORD   last_clust;     /* Last allocated cluster */
+    DWORD   free_clust;     /* Number of free clusters */
+#if _USE_FSINFO
+    DWORD   fsi_sector;     /* fsinfo sector */
+    BYTE    fsi_flag;       /* fsinfo dirty flag (1:must be written back) */
+  //BYTE    pad2;
+#endif
+#endif
+    BYTE    fs_type;        /* FAT sub type */
+    BYTE    csize;          /* Number of sectors per cluster */
+#if S_MAX_SIZ > 512U
+    WORD    s_size;         /* Sector size */
+#endif
+    BYTE    n_fats;         /* Number of FAT copies */
+    BYTE    drive;          /* Physical drive number */
+#if _USE_1_BUF == 0
+    BUF   buf;
+#endif
+} FATFS;
+
+/* Directory object structure */
+typedef struct _DIR {
+  //WORD    id;         /* Owner file system mount ID */
+    WORD    index;      /* Current index */
+    FATFS*  fs;         /* Pointer to the owner file system object */
+    DWORD   sclust;     /* Start cluster */
+    DWORD   clust;      /* Current cluster */
+    DWORD   sect;       /* Current sector */
+} DIR;
+
+
+/* File object structure */
+typedef struct _FIL {
+  //WORD    id;             /* Owner file system mount ID */
+    BYTE    flag;           /* File status flags */
+    BYTE    csect;          /* Sector address in the cluster */
+    FATFS*  fs;             /* Pointer to the owner file system object */
+    DWORD   fptr;           /* File R/W pointer */
+    DWORD   fsize;          /* File size */
+    DWORD   org_clust;      /* File start cluster */
+    DWORD   curr_clust;     /* Current cluster */
+    DWORD   curr_sect;      /* Current sector */
+#if _FS_READONLY == 0
+    DWORD   dir_sect;       /* Sector containing the directory entry */
+    BYTE*   dir_ptr;        /* Ponter to the directory entry in the window */
+#endif
+#if _USE_LESS_BUF == 0 && _USE_1_BUF == 0
+    BUF   buf;              /* File R/W buffer */
+#endif
+} FIL;
+
+
+/* File status structure */
+typedef struct _FILINFO {
+    DWORD fsize;            /* Size */
+    WORD fdate;             /* Date */
+    WORD ftime;             /* Time */
+    BYTE fattrib;           /* Attribute */
+    DWORD clust;            /* Start cluster */
+    UCHAR fname[8+1+3+1];   /* Name (8.3 format) */
+#if _USE_LFN != 0
+    UCHAR* lfn;
+#endif
+} FILINFO;
+
+
+
+/* Definitions corresponds to multi partition */
+
+#if _MULTI_PARTITION != 0   /* Multiple partition cfg */
+
+#define LD2PD(drv) (drv >> (8-_PARTITION_MASK))       /* Get physical drive# */
+#define LD2PT(drv) (drv & ((1<<_PARTITION_MASK)-1))   /* Get partition# */
+#define _LOGICAL_DRIVES (_DRIVES * (1<<_PARTITION_MASK))
+
+#else                               /* Single partition cfg */
+
+#define LD2PD(drv) (drv)            /* Physical drive# is equal to logical drive# */
+#define LD2PT(drv) 0                /* Always mounts the 1st partition */
+#define _LOGICAL_DRIVES _DRIVES
+
+#endif
+
+
+/* File function return code (FRESULT) */
+
+typedef enum {
+    FR_OK = 0,          /* 0 */
+    FR_NOT_READY,       /* 1 */
+    FR_NO_FILE,         /* 2 */
+    FR_NO_PATH,         /* 3 */
+    FR_INVALID_NAME,    /* 4 */
+    FR_INVALID_DRIVE,   /* 5 */
+    FR_DENIED,          /* 6 */
+    FR_EXIST,           /* 7 */
+    FR_RW_ERROR,        /* 8 */
+    FR_WRITE_PROTECTED, /* 9 */
+    FR_NOT_ENABLED,     /* 10 */
+    FR_NO_FILESYSTEM,   /* 11 */
+    FR_INVALID_OBJECT,  /* 12 */
+    FR_MKFS_ABORTED,    /* 13 */
+    FR_IS_DIRECTORY,    /* 13 */
+    FR_IS_READONLY,     /* 14 */
+    FR_DIR_NOT_EMPTY,   /* 15 */
+    FR_NOT_DIRECTORY    /* 16 */
+} FRESULT;
+
+
+
+/*-----------------------------------------------------*/
+/* FatFs module application interface                  */
+
+#if _USE_DRIVE_PREFIX == 0
+FRESULT f_mount (BYTE, FATFS*);                             /* Mount/Unmount a logical drive */
+FRESULT f_open (FATFS*, FIL*, const UCHAR*, BYTE);          /* Open or create a file */
+FRESULT f_read (FIL*, void*, UINT, UINT*);                  /* Read data from a file */
+FRESULT f_write (FIL*, const void*, UINT, UINT*);           /* Write data to a file */
+FRESULT f_lseek (FIL*, DWORD);                              /* Move file pointer of a file object */
+FRESULT f_close (FIL*);                                     /* Close an open file object */
+FRESULT f_opendir (FATFS*, DIR*, const UCHAR*);             /* Open an existing directory */
+FRESULT f_readdir (DIR*, FILINFO*);                         /* Read a directory item */
+FRESULT f_stat (FATFS*, const UCHAR*, FILINFO*);            /* Get file status */
+FRESULT f_getfree (FATFS*, const UCHAR*, DWORD*);           /* Get number of free clusters on the drive */
+FRESULT f_sync (FIL*);                                      /* Flush cached data of a writing file */
+FRESULT f_unlink (FATFS*, const UCHAR*);                    /* Delete an existing file or directory */
+FRESULT f_mkdir (FATFS*, const UCHAR*);                     /* Create a new directory */
+FRESULT f_chmod (FATFS*, const UCHAR*, BYTE, BYTE);         /* Change file/dir attriburte */
+FRESULT f_rename (FATFS*, const UCHAR*, const UCHAR*);      /* Rename/Move a file or directory */
+FRESULT f_mkfs (BYTE, BYTE, WORD);                          /* Create a file system on the drive */
+FRESULT f_chdir (FATFS*, const UCHAR*);                     /* Change current directory */
+
+#else
+
+FRESULT f_mount (BYTE, FATFS*);                             /* Mount/Unmount a logical drive */
+FRESULT f_open (FIL*, const UCHAR*, BYTE);                  /* Open or create a file */
+FRESULT f_read (FIL*, void*, UINT, UINT*);                  /* Read data from a file */
+FRESULT f_write (FIL*, const void*, UINT, UINT*);           /* Write data to a file */
+FRESULT f_lseek (FIL*, DWORD);                              /* Move file pointer of a file object */
+FRESULT f_close (FIL*);                                     /* Close an open file object */
+FRESULT f_opendir (DIR*, const UCHAR*);                     /* Open an existing directory */
+FRESULT f_readdir (DIR*, FILINFO*);                         /* Read a directory item */
+FRESULT f_stat (const UCHAR*, FILINFO*);                    /* Get file status */
+FRESULT f_getfree (const UCHAR*, DWORD*, FATFS**);          /* Get number of free clusters on the drive */
+FRESULT f_sync (FIL*);                                      /* Flush cached data of a writing file */
+FRESULT f_unlink (const UCHAR*);                            /* Delete an existing file or directory */
+FRESULT f_mkdir (const UCHAR*);                             /* Create a new directory */
+FRESULT f_chmod (const UCHAR*, BYTE, BYTE);                 /* Change file/dir attriburte */
+FRESULT f_rename (const UCHAR*, const UCHAR*);              /* Rename/Move a file or directory */
+FRESULT f_mkfs (BYTE, BYTE, WORD);                          /* Create a file system on the drive */
+FRESULT f_chdir (const UCHAR*);                             /* Change current directory */
+
+#endif
+
+/* Low Level functions */
+FRESULT l_opendir(FATFS* fs, DWORD cluster, DIR *dirobj);   /* Open an existing directory by its start cluster */
+FRESULT l_opencluster(FATFS *fs, FIL *fp, DWORD clust);     /* Open a cluster by number as a read-only file */
+FRESULT l_getfree (FATFS*, const UCHAR*, DWORD*, DWORD);    /* Get number of free clusters on the drive, limited */
+
+#if _USE_STRFUNC
+#define feof(fp) ((fp)->fptr == (fp)->fsize)
+#define EOF -1
+int fputc (int, FIL*);                              /* Put a character to the file */
+int fputs (const char*, FIL*);                      /* Put a string to the file */
+int fprintf (FIL*, const char*, ...);               /* Put a formatted string to the file */
+char* fgets (char*, int, FIL*);                     /* Get a string from the file */
+#endif
+
+/* User defined function to give a current time to fatfs module */
+
+#ifdef HAVE_RTC
+DWORD get_fattime (void); /* 31-25: Year(0-127 org.1980), 24-21: Month(1-12), 20-16: Day(1-31) */
+                            /* 15-11: Hour(0-23), 10-5: Minute(0-59), 4-0: Second(0-29 *2) */
+#else
+/* Fixed time: 1982-08-31 0:00:00, same month as the introduction of the C64 */
+#  define get_fattime() 0x51f0000
+#endif
+
+/* File access control and file status flags (FIL.flag) */
+
+#define FA_READ             0x01
+#define FA_OPEN_EXISTING    0x00
+#if _FS_READONLY == 0
+#define FA_WRITE            0x02
+#define FA_CREATE_NEW       0x04
+#define FA_CREATE_ALWAYS    0x08
+#define FA_OPEN_ALWAYS      0x10
+#define FA__WRITTEN         0x20
+#define FA__DIRTY           0x40
+#endif
+#define FA__ERROR           0x80
+
+
+/* FAT sub type (FATFS.fs_type) */
+
+#define FS_FAT12    1
+#define FS_FAT16    2
+#define FS_FAT32    3
+
+
+/* File attribute bits for directory entry */
+
+#define AM_RDO  0x01    /* Read only */
+#define AM_HID  0x02    /* Hidden */
+#define AM_SYS  0x04    /* System */
+#define AM_VOL  0x08    /* Volume label */
+#define AM_LFN  0x0F    /* LFN entry */
+#define AM_DIR  0x10    /* Directory */
+#define AM_ARC  0x20    /* Archive */
+
+
+
+/* Offset of FAT structure members */
+
+#define BS_jmpBoot          0
+#define BS_OEMName          3
+#define BPB_BytsPerSec      11
+#define BPB_SecPerClus      13
+#define BPB_RsvdSecCnt      14
+#define BPB_NumFATs         16
+#define BPB_RootEntCnt      17
+#define BPB_TotSec16        19
+#define BPB_Media           21
+#define BPB_FATSz16         22
+#define BPB_SecPerTrk       24
+#define BPB_NumHeads        26
+#define BPB_HiddSec         28
+#define BPB_TotSec32        32
+#define BS_55AA             510
+
+#define BS_DrvNum           36
+#define BS_BootSig          38
+#define BS_VolID            39
+#define BS_VolLab           43
+#define BS_FilSysType       54
+
+#define BPB_FATSz32         36
+#define BPB_ExtFlags        40
+#define BPB_FSVer           42
+#define BPB_RootClus        44
+#define BPB_FSInfo          48
+#define BPB_BkBootSec       50
+#define BS_DrvNum32         64
+#define BS_BootSig32        66
+#define BS_VolID32          67
+#define BS_VolLab32         71
+#define BS_FilSysType32     82
+
+#define FSI_LeadSig         0
+#define FSI_StrucSig        484
+#define FSI_Free_Count      488
+#define FSI_Nxt_Free        492
+
+#define MBR_Table           446
+
+#define DIR_Name            0
+#define DIR_Attr            11
+#define DIR_NTres           12
+#define DIR_Chksum          13
+#define DIR_CrtTime         14
+#define DIR_CrtDate         16
+#define DIR_FstClusHI       20
+#define DIR_WrtTime         22
+#define DIR_WrtDate         24
+#define DIR_FstClusLO       26
+#define DIR_FileSize        28
+
+
+
+/* Multi-byte word access macros  */
+
+#if _MCU_ENDIAN == 1    /* Use word access */
+#define LD_WORD(ptr)        (WORD)(*(WORD*)(BYTE*)(ptr))
+#define LD_DWORD(ptr)       (DWORD)(*(DWORD*)(BYTE*)(ptr))
+#define ST_WORD(ptr,val)    *(WORD*)(BYTE*)(ptr)=(WORD)(val)
+#define ST_DWORD(ptr,val)   *(DWORD*)(BYTE*)(ptr)=(DWORD)(val)
+#elif _MCU_ENDIAN == 2  /* Use byte-by-byte access */
+#define LD_WORD(ptr)        (WORD)(((WORD)*(volatile BYTE*)((ptr)+1)<<8)|(WORD)*(volatile BYTE*)(ptr))
+#define LD_DWORD(ptr)       (DWORD)(((DWORD)*(volatile BYTE*)((ptr)+3)<<24)|((DWORD)*(volatile BYTE*)((ptr)+2)<<16)|((WORD)*(volatile BYTE*)((ptr)+1)<<8)|*(volatile BYTE*)(ptr))
+#define ST_WORD(ptr,val)    *(volatile BYTE*)(ptr)=(BYTE)(val); *(volatile BYTE*)((ptr)+1)=(BYTE)((WORD)(val)>>8)
+#define ST_DWORD(ptr,val)   *(volatile BYTE*)(ptr)=(BYTE)(val); *(volatile BYTE*)((ptr)+1)=(BYTE)((WORD)(val)>>8); *(volatile BYTE*)((ptr)+2)=(BYTE)((DWORD)(val)>>16); *(volatile BYTE*)((ptr)+3)=(BYTE)((DWORD)(val)>>24)
+#else
+#error Do not forget to set _MCU_ENDIAN properly!
+#endif
+
+#define _FATFS
+#endif /* _FATFS */
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/fileops.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/fileops.c
new file mode 100644
index 00000000..4ece417b
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/fileops.c
@@ -0,0 +1,1063 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   fileops.c: Generic file operations
+
+*/
+
+#include <ctype.h>
+#include <stdint.h>
+#include <string.h>
+#include "config.h"
+#include "buffers.h"
+#include "d64ops.h"
+#include "dirent.h"
+#include "display.h"
+#include "doscmd.h"
+#include "eefs-ops.h"
+#include "errormsg.h"
+#include "fatops.h"
+#include "flags.h"
+#include "ff.h"
+#include "m2iops.h"
+#include "parser.h"
+#include "progmem.h"
+#include "uart.h"
+#include "ustring.h"
+#include "utils.h"
+#include "wrapops.h"
+#include "fileops.h"
+
+/* ------------------------------------------------------------------------- */
+/*  global variables                                                         */
+/* ------------------------------------------------------------------------- */
+
+uint8_t       image_as_dir;
+cbmdirent_t   previous_file_dirent;
+static path_t previous_file_path;
+
+
+/* ------------------------------------------------------------------------- */
+/*  Some constants used for directory generation                             */
+/* ------------------------------------------------------------------------- */
+
+#define HEADER_OFFSET_DRIVE 4
+#define HEADER_OFFSET_NAME  8
+#define HEADER_OFFSET_ID   26
+
+/* offsets within a D64 BAM sector for raw directory emulation */
+#define BAM_OFFSET_NAME  0x90
+#define BAM_OFFSET_ID    0xa2
+#define BAM_A0_AREA_SIZE (0xaa - 0x90 + 1)
+
+/* NOTE: I wonder if RLE-packing would save space in flash? */
+const PROGMEM uint8_t dirheader[] = {
+  1, 4,                            /* BASIC start address */
+  1, 1,                            /* next line pointer */
+  0, 0,                            /* line number 0 */
+  0x12, 0x22,                      /* Reverse on, quote */
+  'S','D','2','I','E','C',' ',' ', /* 16 spaces as the disk name */
+  ' ',' ',' ',' ',' ',' ',' ',' ', /* will be overwritten if needed */
+  0x22,0x20,                       /* quote, space */
+  'I','K',' ','2','A',             /* id IK, shift-space, dosmarker 2A */
+  00                               /* line-end marker */
+};
+
+const PROGMEM uint8_t syspart_line[] = {
+    1, 1, /* next line pointer */
+    0, 0, /* number of free blocks (to be filled later) */
+    ' ',' ',' ',
+    '"','S','Y','S','T','E','M','"',
+    ' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',
+    'S','Y','S',
+    0x20, 0x20, 0x00 /* Filler and end marker */
+  };
+
+const PROGMEM uint8_t dirfooter[] = {
+  1, 1, /* next line pointer */
+  0, 0, /* number of free blocks (to be filled later */
+  'B','L','O','C','K','S',' ','F','R','E','E','.',
+  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, /* Filler and end marker */
+  0x20, 0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00
+};
+
+const PROGMEM uint8_t filetypes[] = {
+  'D','E','L', // 0
+  'S','E','Q', // 1
+  'P','R','G', // 2
+  'U','S','R', // 3
+  'R','E','L', // 4
+  'C','B','M', // 5
+  'D','I','R', // 6
+  '?','?','?', // 7
+  'N','A','T', // 8
+  '4','1',' ', // 9
+  '7','1',' ', // 10
+  '8','1',' ', // 11
+};
+
+/* ------------------------------------------------------------------------- */
+/*  Utility functions                                                        */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * createentry - create a single directory entry in buf
+ * @dent  : directory entry to be added
+ * @buf   : buffer to be used
+ * @format: entry format
+ *
+ * This function creates a directory entry for dent in the selected format
+ * in the given buffer.
+ */
+static void createentry(cbmdirent_t *dent, buffer_t *buf, dirformat_t format) {
+  uint8_t i;
+  uint8_t *data = buf->data;
+
+  if(format == DIR_FMT_CMD_LONG)
+    i=63;
+  else if(format == DIR_FMT_CMD_SHORT)
+    i=41;
+  else
+    i=31;
+
+  buf->lastused  = i;
+  /* Clear the line */
+  memset(data, ' ', i);
+  /* Line end marker */
+  data[i] = 0;
+
+  /* Next line pointer, 1571-compatible =) */
+  if (dent->remainder != 0xff)
+    /* store remainder in low byte of link pointer          */
+    /* +2 so it is never 0 (end-marker) or 1 (normal value) */
+    *data++ = dent->remainder+2;
+  else
+    *data++ = 1;
+  *data++ = 1;
+
+  *data++ = dent->blocksize & 0xff;
+  *data++ = dent->blocksize >> 8;
+
+  /* Filler before file name */
+  data++;
+  if (dent->blocksize < 100)
+    data++;
+  if (dent->blocksize < 10)
+    data++;
+  *data++ = '"';
+
+  /* copy and adjust the filename - C783 */
+  memcpy(data, dent->name, CBM_NAME_LENGTH);
+  for (i=0;i<=CBM_NAME_LENGTH;i++)
+    if (dent->name[i] == 0x22 || dent->name[i] == 0 || i == 16) {
+      data[i] = '"';
+      while (i<=CBM_NAME_LENGTH) {
+        if (data[i] == 0)
+          data[i] = ' ';
+        else
+          data[i] &= 0x7f;
+        i++;
+      }
+    }
+
+  /* Skip name and final quote */
+  data += CBM_NAME_LENGTH+1;
+
+  if (dent->typeflags & FLAG_SPLAT)
+    *data = '*';
+
+  /* File type */
+  memcpy_P(data+1, filetypes + TYPE_LENGTH * (dent->typeflags & EXT_TYPE_MASK),
+           (format & DIR_FMT_CMD_SHORT) ? 1 : TYPE_LENGTH);
+
+  /* RO marker */
+  if (dent->typeflags & FLAG_RO)
+    data[4] = '<';
+
+  if(format & DIR_FMT_CMD_LONG) {
+    data += 7;
+    data = appendnumber(data,dent->date.month);
+    *data++ = '/';
+    data = appendnumber(data,dent->date.day);
+    *data++ = '/';
+    data = appendnumber(data,dent->date.year % 100) + 3;
+    data = appendnumber(data,(dent->date.hour>12?dent->date.hour-12:dent->date.hour));
+    *data++ = '.';
+    data = appendnumber(data,dent->date.minute) + 1;
+    *data++ = (dent->date.hour>11?'P':'A');
+    *data++ = 'M';
+    while (*data)
+      *data++ = 1;
+  } else if(format == DIR_FMT_CMD_SHORT) {
+    /* Add date/time stamp */
+    data+=3;
+    data = appendnumber(data,dent->date.month);
+    *data++ = '/';
+    data = appendnumber(data,dent->date.day) + 1;
+    data = appendnumber(data,(dent->date.hour>12?dent->date.hour-12:dent->date.hour));
+    *data++ = '.';
+    data = appendnumber(data,dent->date.minute) + 1;
+    *data++ = (dent->date.hour>11?'P':'A');
+    while(*data)
+      *data++ = 1;
+  } else {
+    /* Extension: Hidden marker */
+    if (dent->typeflags & FLAG_HIDDEN)
+      data[5] = 'H';
+  }
+}
+
+/* ------------------------------------------------------------------------- */
+/*  Callbacks                                                                */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * dir_footer - generate the directory footer
+ * @buf: buffer to be used
+ *
+ * This is the final callback used during directory generation. It generates
+ * the "BLOCKS FREE" message and indicates that this is the final buffer to
+ * be sent. Always returns 0 for success.
+ */
+static uint8_t dir_footer(buffer_t *buf) {
+  uint16_t blocks;
+
+  /* Copy the "BLOCKS FREE" message */
+  memcpy_P(buf->data, dirfooter, sizeof(dirfooter));
+
+  blocks = disk_free(buf->pvt.dir.dh.part);
+  buf->data[2] = blocks & 0xff;
+  buf->data[3] = blocks >> 8;
+
+  buf->position = 0;
+  buf->lastused = 31;
+  buf->sendeoi  = 1;
+
+  return 0;
+}
+
+/* Callback for the partition directory */
+static uint8_t pdir_refill(buffer_t* buf) {
+  cbmdirent_t dent;
+
+  buf->position = 0;
+
+  /* read volume name */
+  while(buf->pvt.pdir.part < max_part) {
+    if (disk_label(buf->pvt.pdir.part, dent.name)) {
+      free_buffer(buf);
+      return 1;
+    }
+
+    dent.blocksize = buf->pvt.pdir.part+1;
+
+    if (partition[buf->pvt.pdir.part].fop == &d64ops) {
+      /* Use the correct partition type for Dxx images */
+      dent.typeflags = (partition[buf->pvt.pdir.part].imagetype & D64_TYPE_MASK)
+                       + TYPE_NAT - 1;
+    } else {
+      /* Anything else is "native" */
+      dent.typeflags = TYPE_NAT;
+    }
+
+    buf->pvt.pdir.part++;
+
+    /* Parse the name pattern */
+    if (buf->pvt.pdir.matchstr &&
+        !match_name(buf->pvt.pdir.matchstr, &dent, 0))
+      continue;
+
+    createentry(&dent, buf, DIR_FMT_CBM);
+    return 0;
+  }
+  buf->lastused = 1;
+  buf->sendeoi = 1;
+  memset(buf->data,0,2);
+  return 0;
+}
+
+/**
+ * dir_refill - generate the next directory entry
+ * @buf: buffer to be used
+ *
+ * This function generates a single directory entry with the next matching
+ * file. If there is no more matching file the footer will be generated
+ * instead. Used as a callback during directory generation.
+ */
+static uint8_t dir_refill(buffer_t *buf) {
+  cbmdirent_t dent;
+
+  uart_putc('+');
+
+  buf->position = 0;
+
+  if (buf->pvt.dir.counter) {
+    /* Redisplay image file as directory */
+    buf->pvt.dir.counter = 0;
+    memcpy(&dent, buf->data+256-sizeof(dent), sizeof(dent));
+    dent.typeflags = TYPE_DIR;
+    createentry(&dent, buf, buf->pvt.dir.format);
+    return 0;
+  }
+
+  switch (next_match(&buf->pvt.dir.dh,
+                     buf->pvt.dir.matchstr,
+                     buf->pvt.dir.match_start,
+                     buf->pvt.dir.match_end,
+                     buf->pvt.dir.filetype,
+                     &dent)) {
+  case 0:
+    if (image_as_dir != IMAGE_DIR_NORMAL &&
+        dent.opstype == OPSTYPE_FAT &&
+        check_imageext(dent.pvt.fat.realname) != IMG_UNKNOWN) {
+      if (image_as_dir == IMAGE_DIR_DIR) {
+        dent.typeflags = (dent.typeflags & 0xf0) | TYPE_DIR;
+      } else {
+        /* Prepare to redisplay image file as directory */
+        buf->pvt.dir.counter = 1;
+        /* Use the end of the buffer as temporary storage */
+        memcpy(buf->data+256-sizeof(dent), &dent, sizeof(dent));
+      }
+    }
+    createentry(&dent, buf, buf->pvt.dir.format);
+    return 0;
+
+  case -1:
+    return dir_footer(buf);
+
+  default:
+    free_buffer(buf);
+    return 1;
+  }
+}
+
+/**
+ * rawdir_dummy_refill - generate raw dummy directory entries
+ * @buf: buffer to be used
+ *
+ * This function generates an empty raw directory entry which is
+ * used to pad a raw directory to its correct size.
+ */
+static uint8_t rawdir_dummy_refill(buffer_t *buf) {
+  if (buf->pvt.dir.counter++)
+    buf->position = 0;
+  else
+    buf->position = 2;
+
+  if (buf->pvt.dir.counter == 8)
+    buf->sendeoi = 1;
+
+  return 0;
+}
+
+/**
+ * rawdir_refill - generate the next raw directory entry
+ * @buf: buffer to be used
+ *
+ * This function generates a single raw directory entry for the next file.
+ * Used as a callback during directory generation.
+ */
+static uint8_t rawdir_refill(buffer_t *buf) {
+  cbmdirent_t dent;
+
+  memset(buf->data, 0, 32);
+
+  if ((buf->pvt.dir.counter & 0x80) == 0) {
+    switch (readdir(&buf->pvt.dir.dh, &dent)) {
+    case -1:
+      /* last entry, switch to dummy entries */
+      return rawdir_dummy_refill(buf);
+
+    default:
+      /* error in readdir */
+      free_buffer(buf);
+      return 1;
+
+    case 0:
+      /* entry found, creation below */
+      break;
+    }
+
+    if (image_as_dir != IMAGE_DIR_NORMAL &&
+        dent.opstype == OPSTYPE_FAT &&
+        check_imageext(dent.pvt.fat.realname) != IMG_UNKNOWN) {
+      if (image_as_dir == IMAGE_DIR_DIR) {
+        dent.typeflags = (dent.typeflags & 0xf0) | TYPE_DIR;
+      } else {
+        /* Prepare to redisplay image file as directory */
+        buf->pvt.dir.counter |= 0x80;
+        memcpy(buf->data+256-sizeof(dent), &dent, sizeof(dent));
+      }
+    }
+  } else {
+    /* Redisplay image file as directory */
+    buf->pvt.dir.counter &= 0x7f;
+    memcpy(&dent, buf->data+256-sizeof(dent), sizeof(dent));
+    dent.typeflags = TYPE_DIR;
+  }
+
+  buf->data[DIR_OFS_TRACK]     = 1;
+  buf->data[DIR_OFS_SIZE_LOW]  = dent.blocksize & 0xff;
+  buf->data[DIR_OFS_SIZE_HI ]  = dent.blocksize >> 8;
+  buf->data[DIR_OFS_FILE_TYPE] = dent.typeflags ^ FLAG_SPLAT;
+
+  /* Copy file name without 0-byte */
+  memset(buf->data + DIR_OFS_FILE_NAME, 0xa0, CBM_NAME_LENGTH);
+  memcpy(buf->data + DIR_OFS_FILE_NAME, dent.name, ustrlen(dent.name));
+
+  /* Every 8th entry is two bytes shorter   */
+  /* because the t/s link bytes are skipped */
+  if ((buf->pvt.dir.counter++) & 0x7f)
+    buf->position = 0;
+  else
+    buf->position = 2;
+
+  buf->lastused = 31;
+
+  if ((buf->pvt.dir.counter & 0x7f) == 8)
+    buf->pvt.dir.counter &= 0x80;
+
+  return 0;
+}
+
+/**
+ * load_directory - Prepare directory generation and create header
+ * @secondary: secondary address used for reading the directory
+ *
+ * This function prepeares directory reading and fills the buffer
+ * with the header line of the directory listing.
+ * BUG: There is a not-well-known feature in the 1541/1571 disk
+ * drives (and possibly others) that returns unparsed directory
+ * sectors if $ is opened with a secondary address != 0. This
+ * is not emulated here.
+ */
+static void load_directory(uint8_t secondary) {
+  buffer_t *buf;
+  path_t path;
+  uint8_t pos=1;
+
+  buf = alloc_buffer();
+  if (!buf)
+    return;
+
+  uint8_t *name;
+
+  buf->secondary = secondary;
+  buf->read      = 1;
+  buf->lastused  = 31;
+
+  if (command_length > 2 && secondary == 0) {
+    if(command_buffer[1]=='=') {
+      if(command_buffer[2]=='P') {
+        /* Parse Partition Directory */
+
+        /* copy static header to start of buffer */
+        memcpy_P(buf->data, dirheader, sizeof(dirheader));
+        memcpy_P(buf->data + 32, syspart_line, sizeof(syspart_line));
+        buf->lastused  = 63;
+
+        /* set partition number */
+        buf->data[HEADER_OFFSET_DRIVE] = max_part;
+
+        /* Let the refill callback handle everything else */
+        buf->refill = pdir_refill;
+
+        if(command_length>3) {
+          /* Parse the name pattern */
+          if (parse_path(command_buffer+3, &path, &name, 0))
+            return;
+
+          buf->pvt.pdir.matchstr = name;
+        }
+        stick_buffer(buf);
+
+        return;
+      } else if(command_buffer[2]=='T') {
+        buf->pvt.dir.format = DIR_FMT_CMD_SHORT;
+        pos=3;
+      }
+    }
+  }
+
+  if (command_buffer[pos]) { /* do we have a path to scan? */
+    if (command_length > 2) {
+      /* Parse the name pattern */
+      if (parse_path(command_buffer+pos, &path, &name, 0))
+        return;
+
+      if (opendir(&buf->pvt.dir.dh, &path))
+        return;
+
+      buf->pvt.dir.matchstr = name;
+
+      /* Check for a filetype match */
+      name = ustrchr(name, '=');
+      if (name != NULL) {
+        *name++ = 0;
+        switch (*name) {
+        case 'S':
+          buf->pvt.dir.filetype = TYPE_SEQ;
+          break;
+
+        case 'P':
+          buf->pvt.dir.filetype = TYPE_PRG;
+          break;
+
+        case 'U':
+          buf->pvt.dir.filetype = TYPE_USR;
+          break;
+
+        case 'R':
+          buf->pvt.dir.filetype = TYPE_REL;
+          break;
+
+        case 'C': /* This is guessed, not verified */
+          buf->pvt.dir.filetype = TYPE_CBM;
+          break;
+
+        case 'B': /* CMD compatibility */
+        case 'D': /* Specifying DEL matches everything anyway */
+          buf->pvt.dir.filetype = TYPE_DIR;
+          break;
+
+        case 'H': /* Extension: Also show hidden files */
+          buf->pvt.dir.filetype = FLAG_HIDDEN;
+          break;
+        }
+        if(buf->pvt.dir.filetype) {
+          name++;
+          if(*name++ != ',') {
+            goto scandone;
+          }
+        }
+        while(*name) {
+          switch(*name++) {
+          case '>':
+            if(parse_date(&date_match_start,&name))
+              goto scandone;
+            if(date_match_start.month && date_match_start.day) // ignore 00/00/00
+              buf->pvt.dir.match_start = &date_match_start;
+            break;
+          case '<':
+            if(parse_date(&date_match_end,&name))
+              goto scandone;
+            if(date_match_end.month && date_match_end.day) // ignore 00/00/00
+              buf->pvt.dir.match_end = &date_match_end;
+            break;
+          case 'L':
+            /* don't switch to long format if 'N' has already been sent */
+            if(buf->pvt.dir.format != DIR_FMT_CBM)
+              buf->pvt.dir.format = DIR_FMT_CMD_LONG;
+            break;
+          case 'N':
+            buf->pvt.dir.format=DIR_FMT_CBM; /* turn off extended listing */
+            break;
+          default:
+            goto scandone;
+          }
+          if(*name && *name++ != ',') {
+            goto scandone;
+          }
+        }
+      }
+    } else {
+      /* Command string is two characters long, parse the drive */
+      if (command_buffer[1] == '0')
+        path.part = current_part;
+      else if (isdigit(command_buffer[1]))
+        path.part = command_buffer[1] - '0' - 1;
+#ifdef CONFIG_HAVE_EEPROMFS
+      else if (command_buffer[1] == '!' && eefs_partition != 255)
+        path.part = eefs_partition;
+#endif
+      else {
+        buf->pvt.dir.matchstr = command_buffer + 1;
+        path.part = current_part;
+      }
+      if (path.part >= max_part) {
+        set_error(ERROR_DRIVE_NOT_READY);
+        return;
+      }
+      path.dir = partition[path.part].current_dir;
+      if (opendir(&buf->pvt.dir.dh, &path))
+        return;
+    }
+  } else {
+    path.part = current_part;
+    path.dir  = partition[path.part].current_dir;  // if you do not do this, get_label will fail below.
+    if (opendir(&buf->pvt.dir.dh, &path))
+      return;
+  }
+
+scandone:
+  if (secondary != 0) {
+    /* Raw directory */
+
+    if (partition[path.part].fop == &d64ops) {
+      /* No need to fake it for D64 files */
+      d64_raw_directory(&path, buf);
+      return;
+    }
+
+    /* prepare a fake BAM sector */
+    memset(buf->data, 0, 256);
+    memset(buf->data + BAM_OFFSET_NAME - 2, 0xa0, BAM_A0_AREA_SIZE);
+
+    /* fill label and id */
+    if (dir_label(&path, buf->data + BAM_OFFSET_NAME - 2))
+      return;
+
+    if (disk_id(&path, buf->data + BAM_OFFSET_ID - 2))
+      return;
+
+    /* change padding of label and id to 0xa0 */
+    name = buf->data + BAM_OFFSET_NAME - 2 + CBM_NAME_LENGTH;
+    while (*--name == ' ')
+      *name = 0xa0;
+
+    if (buf->data[BAM_OFFSET_ID+2-2] == 0x20)
+      buf->data[BAM_OFFSET_ID+2-2] = 0xa0;
+
+    /* DOS version marker */
+    buf->data[0] = 'A';
+
+    buf->refill = rawdir_refill;
+    buf->lastused = 253;
+  } else {
+
+    /* copy static header to start of buffer */
+    memcpy_P(buf->data, dirheader, sizeof(dirheader));
+
+    /* set partition number */
+    buf->data[HEADER_OFFSET_DRIVE] = path.part+1;
+
+    /* read directory name */
+    if (dir_label(&path, buf->data+HEADER_OFFSET_NAME))
+      return;
+
+    /* read id */
+    if (disk_id(&path,buf->data+HEADER_OFFSET_ID))
+      return;
+
+    /* Let the refill callback handle everything else */
+    buf->refill = dir_refill;
+  }
+
+  /* Keep the buffer around */
+  stick_buffer(buf);
+
+  return;
+
+}
+
+/**
+ * directbuffer_refill - refill callback for direct buffers
+ * @buf: buffer to be used
+ *
+ * This function is used as the refill callback for direct buffers ('#')
+ * and will switch to the next or the first buffer in the chain. Always
+ * returns 0.
+ */
+uint8_t directbuffer_refill(buffer_t *buf) {
+  uint8_t sec = buf->secondary;
+
+  buf->secondary = BUFFER_SEC_CHAIN - sec;
+
+  if (buf->pvt.buffer.next == NULL)
+    buf = buf->pvt.buffer.first;
+  else
+    buf = buf->pvt.buffer.next;
+
+  buf->secondary = sec;
+  buf->position  = 0;
+  buf->mustflush = 0;
+  return 0;
+}
+
+/**
+ * largebuffer_cleanup - cleanup callback for large buffers
+ * @buf: buffer to be cleaned
+ *
+ * This function is used as the cleanup callback for large buffer and
+ * will free all buffers used in the large buffer chain. This does mean
+ * that the free_buffer call done after calling cleanup will be
+ * passed an already-freed buffer, but that case is accounted for in
+ * free_buffer and results in a no-op. Always returns 0.
+ */
+static uint8_t largebuffer_cleanup(buffer_t *buf) {
+  buf = buf->pvt.buffer.first;
+  while (buf != NULL) {
+    free_buffer(buf);
+    buf = buf->pvt.buffer.next;
+  }
+  return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+/*  External interface for the various operations                            */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * open_buffer - function to open a direct-access buffer
+ * @secondary: secondary address used
+ *
+ * This function is called when the computer wants to open a direct
+ * access buffer (#).
+ */
+static void open_buffer(uint8_t secondary) {
+  buffer_t *buf,*prev;
+  uint8_t count;
+
+  if (command_length == 3 && command_buffer[1] == '#') {
+    /* Open a large buffer */
+    count = command_buffer[2] - '0';
+    if (count == 0)
+      return;
+
+    /* Allocate a chain of linked buffers */
+    buf = alloc_linked_buffers(count);
+    if (buf == NULL)
+      return;
+
+    do {
+      buf->secondary       = BUFFER_SEC_CHAIN - secondary;
+      buf->refill          = directbuffer_refill;
+      buf->cleanup         = largebuffer_cleanup;
+      buf->read            = 1;
+      buf->lastused        = 255;
+      buf->pvt.buffer.part = current_part; // for completeness, not needed for large buffers yet
+      mark_write_buffer(buf);
+      prev = buf;
+      buf = buf->pvt.buffer.next;
+    } while (buf != NULL);
+
+    prev->sendeoi = 1;
+    buf = prev->pvt.buffer.first;
+
+    /* Set the first buffer as active by using the real secondary */
+    buf->secondary = secondary;
+
+  } else {
+    /* Normal buffer request */
+    // FIXME: This command can specify a specific buffer number.
+    buf = alloc_buffer();
+    if (!buf)
+      return;
+
+    buf->secondary        = secondary;
+    buf->read             = 1;
+    buf->position         = 1;  /* Sic! */
+    buf->lastused         = 255;
+    buf->sendeoi          = 1;
+    buf->pvt.buffer.size  = 1;
+    buf->pvt.buffer.part  = current_part;
+    /* directbuffer_refill is used to check for # buffers in iec.c */
+    buf->refill           = directbuffer_refill;
+    buf->pvt.buffer.first = buf;
+    mark_write_buffer(buf);
+  }
+  return;
+}
+
+/**
+ * file_open_previous - reopens the last opened file
+ *
+ * This function reopens the last opened file in read mode.
+ * The secondary address for this is always 0.
+ */
+void file_open_previous(void) {
+  cbmdirent_t dent = previous_file_dirent;
+  path_t      path = previous_file_path;
+  buffer_t *buf = alloc_buffer();
+
+  if (!buf)
+    return;
+
+  buf->secondary = 0;
+
+  display_filename_read(path.part, CBM_NAME_LENGTH, dent.name);
+  open_read(&path, &dent, buf);
+}
+
+/**
+ * file_open - open a file on given secondary
+ * @secondary: secondary address used in OPEN call
+ *
+ * This function opens the file named in command_buffer on the given
+ * secondary address. All special names and prefixes/suffixed are handled
+ * here, e.g. $/#/@/,S,W
+ */
+void file_open(uint8_t secondary) {
+  buffer_t *buf;
+  uint8_t i = 0;
+  uint8_t recordlen = 0;
+
+  /* If the secondary is already in use, close the existing buffer */
+  buf = find_buffer(secondary);
+  if (buf != NULL) {
+    /* FIXME: What should we do if an error occurs? */
+    cleanup_and_free_buffer(buf);
+  }
+
+  /* Assume everything will go well unless proven otherwise */
+  set_error(ERROR_OK);
+
+  /* Strip 0x0d characters from end of name (C2BD-C2CA) */
+  if (command_length > 1) {
+    if (command_buffer[command_length-1] == 0x0d)
+      command_length -= 1;
+    else if (command_buffer[command_length-2] == 0x0d)
+      command_length -= 2;
+  }
+
+  /* Clear the remainder of the command buffer, simplifies parsing */
+  memset(command_buffer+command_length, 0, sizeof(command_buffer)-command_length);
+
+  uart_trace(command_buffer,0,command_length);
+
+  /* Direct access? */
+  if (command_buffer[0] == '#') {
+    open_buffer(secondary);
+    return;
+  }
+
+  /* Parse type+mode suffixes */
+  uint8_t *ptr = command_buffer;
+  enum open_modes mode = OPEN_READ;
+  uint8_t filetype = TYPE_DEL;
+
+  /* check for a single * to load the previous file */
+  if (secondary         == 0 &&
+      command_length    == 1 &&
+      command_buffer[0] == '*') {
+    if (previous_file_dirent.name[0]) {
+      /* previous file is valid */
+      file_open_previous();
+      return;
+    }
+
+    /* force file type to PRG - d7cd/d81c */
+    filetype = TYPE_PRG;
+  }
+
+  /* check file type and mode */
+  while(i++ < 2 && *ptr && (ptr = ustrchr(ptr, ','))) {
+    *ptr = 0;
+    ptr++;
+    switch (*ptr) {
+    case 0:
+      break;
+
+    case 'R': /* Read */
+      mode = OPEN_READ;
+      break;
+
+    case 'W': /* Write */
+      mode = OPEN_WRITE;
+      break;
+
+    case 'A': /* Append */
+      mode = OPEN_APPEND;
+      break;
+
+    case 'M': /* Modify */
+      mode = OPEN_MODIFY;
+      break;
+
+    case 'D': /* DEL */
+      filetype = TYPE_DEL;
+      break;
+
+    case 'S': /* SEQ */
+      filetype = TYPE_SEQ;
+      break;
+
+    case 'P': /* PRG */
+      filetype = TYPE_PRG;
+      break;
+
+    case 'U': /* USR */
+      filetype = TYPE_USR;
+      break;
+
+    case 'L': /* REL */
+      filetype = TYPE_REL;
+      mode = OPEN_WRITE;
+      if((ptr = ustrchr(ptr, ',')))
+        recordlen = *(++ptr);
+      i = 2;  // stop the scan
+      break;
+    }
+  }
+
+  /* Load directory? */
+  if (command_buffer[0] == '$') {
+    load_directory(secondary);
+    return;
+  }
+
+  /* Parse path+partition numbers */
+  uint8_t *fname;
+  int8_t res;
+  cbmdirent_t dent;
+  path_t path;
+
+  /* Parse path and file name */
+  if (parse_path(command_buffer, &path, &fname, 0))
+      return;
+
+#ifdef CONFIG_M2I
+  /* For M2I only: Remove trailing spaces from name */
+  if (partition[path.part].fop == &m2iops) {
+    res = ustrlen(fname);
+    while (--res && fname[res] == ' ')
+      fname[res] = 0;
+  }
+#endif
+
+  /* Filename matching */
+  if (opendir(&matchdh, &path))
+    return;
+
+  do {
+    res = next_match(&matchdh, fname, NULL, NULL, FLAG_HIDDEN, &dent);
+    if (res > 0)
+      /* Error, abort */
+      return;
+
+    /* Don't match on DEL or DIR */
+    if ((dent.typeflags & TYPE_MASK) != TYPE_DEL &&
+        (dent.typeflags & TYPE_MASK) != TYPE_DIR)
+      break;
+
+    /* But do match if it's for writing */
+    if (mode == OPEN_WRITE || secondary == 1)
+      break;
+  } while (res == 0);
+
+  if(res && filetype == TYPE_REL && !recordlen) {
+    set_error(ERROR_SYNTAX_UNABLE);
+    return;
+  }
+
+  /* If match found is a REL... */
+  if(!res && (dent.typeflags & TYPE_MASK) == TYPE_REL) {
+    /* requested type must be REL or DEL */
+    if(filetype != TYPE_REL && filetype != TYPE_DEL) {
+      set_error(ERROR_FILE_TYPE_MISMATCH);
+      return;
+    }
+    filetype = TYPE_REL;
+    mode = OPEN_MODIFY;
+  }
+
+  /* Force mode+type for secondaries 0/1 */
+  switch (secondary) {
+  case 0:
+    mode = OPEN_READ;
+    if (filetype == TYPE_DEL)
+      filetype = TYPE_PRG;
+    break;
+
+  case 1:
+    mode = OPEN_WRITE;
+    if (filetype == TYPE_DEL)
+      filetype = TYPE_PRG;
+    break;
+
+  default:
+    if (filetype == TYPE_DEL)
+      filetype = TYPE_SEQ;
+  }
+
+  if (mode == OPEN_WRITE) {
+    if (res == 0) {
+      /* Match found */
+      if (command_buffer[0] == '@') {
+        /* Make sure there is a free buffer to open the new file later */
+        if (!check_free_buffers()) {
+          set_error(ERROR_NO_CHANNEL);
+          return;
+        }
+
+        /* Copy dent because file_delete may change it */
+        cbmdirent_t dentcopy = dent;
+
+        /* Rewrite existing file: Delete the old one */
+        if (file_delete(&path, &dentcopy) == 255)
+          return;
+
+#ifdef CONFIG_M2I
+        /* Force fatops to create a new name based on the (long) CBM- */
+        /* name instead of creating one with the old SFN and no LFN.  */
+        if (dent.opstype == OPSTYPE_FAT || dent.opstype == OPSTYPE_FAT_X00)
+          dent.pvt.fat.realname[0] = 0;
+#endif
+      } else {
+        /* Write existing file without replacement: Raise error */
+        set_error(ERROR_FILE_EXISTS);
+        return;
+      }
+    } else {
+      /* Normal write or non-existing rewrite */
+      /* Doesn't exist: Copy name to dent */
+      memset(&dent, 0, sizeof(dent));
+      ustrncpy(dent.name, fname, CBM_NAME_LENGTH);
+      set_error(ERROR_OK); // because first_match has set FNF
+    }
+  } else if (res != 0) {
+    /* File not found */
+    set_error(ERROR_FILE_NOT_FOUND);
+    return;
+  }
+
+  /* Grab a buffer */
+  buf = alloc_buffer();
+  if (!buf)
+    return;
+
+  buf->secondary = secondary;
+
+  if(filetype == TYPE_REL) {
+    display_filename_write(path.part,CBM_NAME_LENGTH,dent.name);
+    open_rel(&path, &dent, buf, recordlen, (mode == OPEN_MODIFY));
+    return;
+  }
+
+  previous_file_path   = path;
+  previous_file_dirent = dent;
+
+  switch (mode) {
+  case OPEN_MODIFY:
+  case OPEN_READ:
+    /* Modify is the same as read, but allows reading *ed files.        */
+    /* FAT doesn't have anything equivalent, so both are mapped to READ */
+    display_filename_read(path.part,CBM_NAME_LENGTH,dent.name);
+    open_read(&path, &dent, buf);
+    break;
+
+  case OPEN_WRITE:
+  case OPEN_APPEND:
+    display_filename_write(path.part,CBM_NAME_LENGTH,dent.name);
+    open_write(&path, &dent, filetype, buf, (mode == OPEN_APPEND));
+    break;
+  }
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/fileops.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/fileops.h
new file mode 100644
index 00000000..14164a93
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/fileops.h
@@ -0,0 +1,48 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   fileops.h: Definitions for file operations
+
+*/
+
+#ifndef FILEOPS_H
+#define FILEOPS_H
+
+#include "buffers.h"
+#include "dirent.h"
+#include "progmem.h"
+
+enum open_modes { OPEN_READ, OPEN_WRITE, OPEN_APPEND, OPEN_MODIFY };
+extern const PROGMEM uint8_t filetypes[];
+
+/* saved dirent of the last opened file */
+extern cbmdirent_t previous_file_dirent;
+
+/* Refill-callback for large buffers, only used for comparision */
+uint8_t directbuffer_refill(buffer_t *buf);
+
+/* reopen the last opened file on secondary 0 */
+void file_open_previous(void);
+
+/* Parses a filename in command_buffer and opens that file */
+void file_open(uint8_t secondary);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/filesystem.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/filesystem.h
new file mode 100644
index 00000000..dfa8a805
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/filesystem.h
@@ -0,0 +1,48 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   filesystem.h: small abstractions for multi-filesystem support
+
+*/
+
+#ifndef FILESYSTEM_H
+#define FILESYSTEM_H
+
+#include "fatops.h"
+#include "eefs-ops.h"
+
+// FIXME: Move d64_invalidate and maybe p00cache_invalidate out of fatops.c?
+
+#ifdef CONFIG_HAVE_EEPROMFS
+/* initialize both fatops and eefs */
+static inline void filesystem_init(uint8_t preserve_dir) {
+  fatops_init(preserve_dir);
+  eefsops_init();
+}
+#else
+/* just fatops */
+static inline void filesystem_init(uint8_t preserve_dir) {
+  fatops_init(preserve_dir);
+}
+#endif
+
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/flags.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/flags.h
new file mode 100644
index 00000000..62e58291
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/flags.h
@@ -0,0 +1,55 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   flags.h: Definitions for some global flags
+
+*/
+
+#ifndef FLAGS_H
+#define FLAGS_H
+
+#ifdef __AVR__
+/* GPIOR0 is a bit-addressable register reserved for user data */
+#  define globalflags (GPIOR0)
+#else
+/* Global flags, variable defined in doscmd.c */
+extern uint8_t globalflags;
+#endif
+
+/** flag values **/
+/* transient flags */
+#define VC20MODE         (1<<0)
+#define AUTOSWAP_ACTIVE  (1<<2)
+#define SWAPLIST_ASCII   (1<<5)
+
+/* permanent (EEPROM-saved) flags */
+/* 1<<1 was JIFFY_ENABLED */
+#define EXTENSION_HIDING (1<<3)
+#define POSTMATCH        (1<<4)
+
+/* Disk image-as-directory mode, defined in fileops.c */
+extern uint8_t image_as_dir;
+
+#define IMAGE_DIR_NORMAL 0
+#define IMAGE_DIR_DIR    1
+#define IMAGE_DIR_BOTH   2
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/i2c.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/i2c.h
new file mode 100644
index 00000000..e4b74ce7
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/i2c.h
@@ -0,0 +1,58 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   i2c.h: Definitions for I2C transfers
+
+   There is no i2c.c, the functions defined here are currently implemented
+   by softi2c.c. An additional implementation using the hardware I2C/TWI
+   peripheral should implement the same functions so either implementation
+   can be used.
+
+*/
+
+#ifndef I2C_H
+#define I2C_H
+
+#ifdef HAVE_I2C
+
+typedef struct i2cblock_s {
+  unsigned int       length;
+  void              *data;
+  struct i2cblock_s *next;
+} i2cblock_t;
+
+void i2c_init(void);
+uint8_t i2c_write_register(uint8_t address, uint8_t reg, uint8_t val);
+uint8_t i2c_write_registers(uint8_t address, uint8_t startreg, uint8_t count, const void *data);
+int16_t i2c_read_register(uint8_t address, uint8_t reg);
+uint8_t i2c_read_registers(uint8_t address, uint8_t startreg, uint8_t count, void *data);
+
+/* send a chain of i2cblock_t over the bus */
+uint8_t i2c_write_blocks(uint8_t address, i2cblock_t *head);
+
+/* write @writeblocks i2cblock_t over the bus, switch to read mode and fill the remaining ones */
+uint8_t i2c_read_blocks(uint8_t address, i2cblock_t *head, unsigned char writeblocks);
+
+#else
+#  define i2c_init() do {} while (0)
+#endif
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/iec-bus.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/iec-bus.h
new file mode 100644
index 00000000..33119f15
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/iec-bus.h
@@ -0,0 +1,51 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   iec-bus.h: A few wrappers around the port definitions
+
+*/
+
+#ifndef IEC_BUS_H
+#define IEC_BUS_H
+
+/* output functions are defined in arch-config.h */
+
+/*** Input definitions (generic versions) ***/
+#ifndef IEC_ATN
+#  define IEC_ATN   (IEC_INPUT & IEC_BIT_ATN)
+#  define IEC_DATA  (IEC_INPUT & IEC_BIT_DATA)
+#  define IEC_CLOCK (IEC_INPUT & IEC_BIT_CLOCK)
+#  define IEC_SRQ   (IEC_INPUT & IEC_BIT_SRQ)
+#endif
+
+#ifdef IEC_INPUTS_INVERTED
+static inline iec_bus_t iec_bus_read(void) {
+  return (~IEC_INPUT) & (IEC_BIT_ATN | IEC_BIT_DATA | IEC_BIT_CLOCK | IEC_BIT_SRQ);
+}
+#else
+static inline iec_bus_t iec_bus_read(void) {
+  return IEC_INPUT & (IEC_BIT_ATN | IEC_BIT_DATA | IEC_BIT_CLOCK | IEC_BIT_SRQ);
+}
+#endif
+
+void iec_interface_init(void);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/iec.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/iec.c
new file mode 100644
index 00000000..5cdb6263
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/iec.c
@@ -0,0 +1,797 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   iec.c: IEC handling code, stateful version
+
+   This code is a close reimplementation of the bus handling in a 1571
+   to be as compatible to original drives as possible. Hex addresses in
+   comments refer to the part of the 1571 rom that particular section
+   is based on.
+
+*/
+
+#include <string.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include "config.h"
+#include "atomic.h"
+#include "buffers.h"
+#include "d64ops.h"
+#include "diskchange.h"
+#include "diskio.h"
+#include "display.h"
+#include "doscmd.h"
+#include "errormsg.h"
+#include "fastloader.h"
+#include "fastloader-ll.h"
+#include "fatops.h"
+#include "flags.h"
+#include "fileops.h"
+#include "filesystem.h"
+#include "iec-bus.h"
+#include "led.h"
+#include "system.h"
+#include "timer.h"
+#include "uart.h"
+#include "iec.h"
+
+/* ------------------------------------------------------------------------- */
+/*  Global variables                                                         */
+/* ------------------------------------------------------------------------- */
+
+/* Current device address */
+uint8_t device_address;
+
+iec_data_t iec_data;
+
+/* ------------------------------------------------------------------------- */
+/*  Very low-level bus handling                                              */
+/* ------------------------------------------------------------------------- */
+
+/// Debounce IEC input - see E9C0
+static iec_bus_t iec_debounced(void) {
+  iec_bus_t tmp;
+
+  do {
+    tmp = iec_bus_read();
+    delay_us(2); /* 1571 uses LDA/CMP/BNE, approximate by waiting 2us */
+  } while (tmp != iec_bus_read());
+  return tmp;
+}
+
+/// Checks if ATN has changed and changes state to match (EA59)
+uint8_t iec_check_atn(void) {
+  if (iec_data.bus_state == BUS_ATNACTIVE)
+    if (IEC_ATN) {
+      iec_data.bus_state = BUS_ATNPROCESS; // A9AC
+      return 1;
+    } else
+      return 0;
+  else
+    if (!IEC_ATN) {
+      iec_data.bus_state = BUS_FOUNDATN;   // A7B3
+      return 1;
+    } else
+      return 0;
+}
+
+/* IEC ATN handler (if Dreamload is not used) */
+#ifndef CONFIG_LOADER_DREAMLOAD
+IEC_ATN_HANDLER {
+  if (!IEC_ATN) {
+    set_data(0);
+  }
+}
+#endif
+
+/* ------------------------------------------------------------------------- */
+/*  Byte transfer routines                                                   */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * _iec_getc - receive one byte from the CBM serial bus (E9C9)
+ *
+ * This function tries receives one byte from the serial bus and returns it
+ * if successful. Returns -1 instead if the device state has changed, the
+ * caller should return to the main loop immediately in that case.
+ */
+static int16_t _iec_getc(void) {
+  uint8_t i,val;
+  iec_bus_t tmp;
+
+  val = 0;
+
+  do {                                                 // E9CD-E9D5
+    if (iec_check_atn()) return -1;
+  } while (!(iec_debounced() & IEC_BIT_CLOCK));
+
+  set_data(1);                                         // E9D7
+  /* Wait until all other devices released the data line    */
+  while (!IEC_DATA) ;                                  // FF20
+
+  /* Timer for EOI detection */
+  start_timeout(256);
+
+  do {
+    if (iec_check_atn()) return -1;                    // E9DF
+    tmp = has_timed_out();                             // E9EE
+  } while ((iec_debounced() & IEC_BIT_CLOCK) && !tmp);
+
+  /* See if timeout happened -> EOI */
+  if (tmp) {
+    set_data(0);                                       // E9F2
+    delay_us(73);                       // E9F5-E9F8, delay calculated from all
+    set_data(1);                        //   instructions between IO accesses
+
+    uart_putc('E');
+
+    do {
+      if (iec_check_atn())                             // E9FD
+        return -1;
+    } while (iec_debounced() & IEC_BIT_CLOCK);
+
+    iec_data.iecflags|=EOI_RECVD;                      // EA07
+  }
+
+  for (i=0;i<8;i++) {
+    /* Check for JiffyDOS                                       */
+    /*   Source: http://home.arcor.de/jochen.adler/ajnjil-t.htm */
+    if (iec_data.bus_state == BUS_ATNACTIVE && i == 7) {
+      start_timeout(218);
+
+      do {
+        tmp = iec_bus_read();
+
+        /* If there is a delay before the last bit, the controller uses JiffyDOS */
+        if (!(iec_data.iecflags & JIFFY_ACTIVE) && has_timed_out()) {
+          if ((val>>1) < 0x60 && ((val>>1) & 0x1f) == device_address) {
+            /* If it's for us, notify controller that we support Jiffy too */
+            set_data(0);
+            delay_us(101); // nlq says 405us, but the code shows only 101
+            set_data(1);
+            iec_data.iecflags |= JIFFY_ACTIVE;
+          }
+        }
+      } while (!(tmp & IEC_BIT_CLOCK));
+    } else {
+      /* Capture data on rising edge */
+      do {                                             // EA0B
+        tmp = iec_bus_read();
+      } while (!(tmp & IEC_BIT_CLOCK));
+    }
+
+    val = (val >> 1) | (!!(tmp & IEC_BIT_DATA) << 7);  // EA18
+
+    do {                                               // EA1A
+      if (iec_check_atn()) return -1;
+    } while (iec_debounced() & IEC_BIT_CLOCK);
+  }
+
+  delay_us(5); // Test
+  set_data(0);                                         // EA28
+  delay_us(50);  /* Slow down a little bit, may or may not fix some problems */
+  return val;
+}
+
+/**
+ * iec_getc - wrapper around _iec_getc to disable interrupts
+ *
+ * This function wraps iec_getc to disable interrupts there and is completely
+ * inlined by the compiler. It could be inlined in the C code too, but is kept
+ * seperately for clarity.
+ */
+static int16_t iec_getc(void) {
+  int16_t val;
+
+  ATOMIC_BLOCK( ATOMIC_FORCEON ) {
+    val = _iec_getc();
+  }
+  return val;
+}
+
+
+/**
+ * iec_putc - send a byte over the serial bus (E916)
+ * @data    : byte to be sent
+ * @with_eoi: Flags if the byte should be send with an EOI condition
+ *
+ * This function sends the byte data over the serial bus, optionally including
+ * a marker for the EOI condition. Returns 0 normally or -1 if the bus state has
+ * changed, the caller should return to the main loop in that case.
+ */
+static uint8_t iec_putc(uint8_t data, const uint8_t with_eoi) {
+  uint8_t i;
+
+  if (iec_check_atn()) return -1;                      // E916
+
+  if (iec_data.iecflags & JIFFY_ACTIVE) {
+    /* This is the non-load Jiffy case */
+    if (jiffy_send(data, with_eoi, 0)) {
+      iec_check_atn();
+      return -1;
+    }
+    return 0;
+  }
+
+  i = iec_debounced();
+
+  delay_us(60); // Fudged delay
+  set_clock(1);
+
+  if (i & IEC_BIT_DATA) { // E923
+    /* The 1571 jumps to E937 at this point, but I think            */
+    /* this is not necessary - the following loop will fall through */
+  }
+
+  do {
+    if (iec_check_atn()) return -1;                    // E925
+  } while (!(iec_debounced() & IEC_BIT_DATA));
+
+  if (with_eoi || (i & IEC_BIT_DATA)) {
+    do {
+      if (iec_check_atn()) return -1;                  // E937
+    } while (!(iec_debounced() & IEC_BIT_DATA));
+
+    do {
+      if (iec_check_atn()) return -1;                  // E941
+    } while (iec_debounced() & IEC_BIT_DATA);
+  }
+
+  set_clock(0);                                        // E94B
+  delay_us(40); // estimated
+  do {
+    if (iec_check_atn()) return -1;
+  } while (!(iec_debounced() & IEC_BIT_DATA));
+  delay_us(21); // calculated - E951 (best case after bus read) - E95B
+
+  for (i=0;i<8;i++) {
+    if (!(iec_debounced() & IEC_BIT_DATA)) { // E95C
+      iec_data.bus_state = BUS_CLEANUP;
+      return -1;
+    }
+    delay_us(45);     // calculated
+
+    set_data(data & 1<<i);
+    delay_us(22);     // calculated
+    set_clock(1);
+    if (globalflags & VC20MODE)
+      delay_us(34);   // Calculated delay
+    else
+      delay_us(75);   // Calculated delay
+
+    set_clock(0);     // FEFB
+    delay_us(22);     // calculated
+    set_data(1);      // FEFE
+    delay_us(14);     // Settle time, approximate
+  }
+
+  do {
+    if (iec_check_atn()) return -1;
+  } while (iec_debounced() & IEC_BIT_DATA);
+
+  /* More stuff that's not in the original rom:
+   *   Wait for 250us or until DATA is high or ATN is low.
+   * This fixes a problem with Castle Wolfenstein.
+   * Bus traces seem to indicate that a real 1541 needs
+   * about 350us between two bytes, sd2iec is usually WAY faster.
+   */
+  start_timeout(250);
+  while (!IEC_DATA && IEC_ATN && !has_timed_out()) ;
+
+  return 0;
+}
+
+
+/* ------------------------------------------------------------------------- */
+/*  Listen+Talk-Handling                                                     */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * iec_listen_handler - handle an incoming LISTEN request (EA2E)
+ * @cmd: command byte received from the bus
+ *
+ * This function handles a listen request from the computer.
+ */
+static uint8_t iec_listen_handler(const uint8_t cmd) {
+  int16_t c;
+  buffer_t *buf;
+
+  uart_putc('L');
+
+  buf = find_buffer(cmd & 0x0f);
+
+  /* Abort if there is no buffer or it's not open for writing */
+  /* and it isn't an OPEN command                             */
+  if ((buf == NULL || !buf->write) && (cmd & 0xf0) != 0xf0) {
+    uart_putc('c');
+    iec_data.bus_state = BUS_CLEANUP;
+    return 1;
+  }
+
+  while (1) {
+    if (iec_data.iecflags & JIFFY_ACTIVE) {
+      iec_bus_t flags;
+      set_atn_irq(1);
+      c = jiffy_receive(&flags);
+      if (!(flags & IEC_BIT_ATN))
+        /* ATN was active at the end of the transfer */
+        c = iec_getc();
+      else
+        if(flags & IEC_BIT_CLOCK)
+          iec_data.iecflags |= EOI_RECVD;
+        else
+          iec_data.iecflags &= (uint8_t)~EOI_RECVD;
+    } else {
+      if (iec_data.iecflags & DOLPHIN_ACTIVE)
+        c = dolphin_getc();
+      else
+        c = iec_getc();
+    }
+    if (c < 0) return 1;
+
+    if ((cmd & 0x0f) == 0x0f || (cmd & 0xf0) == 0xf0) {
+      if (command_length < CONFIG_COMMAND_BUFFER_SIZE)
+        command_buffer[command_length++] = c;
+      if (iec_data.iecflags & EOI_RECVD)
+        // Filenames are just a special type of command =)
+        iec_data.iecflags |= COMMAND_RECVD;
+    } else {
+      /* Flush buffer if full */
+      if (buf->mustflush) {
+        if (buf->refill(buf))
+          return 1;
+        /* Search the buffer again, it can change when using large buffers. */
+        buf = find_buffer(cmd & 0x0f);
+      }
+
+      buf->data[buf->position] = c;
+      mark_buffer_dirty(buf);
+
+      if (buf->lastused < buf->position)
+        buf->lastused = buf->position;
+      buf->position++;
+
+      /* Mark buffer for flushing if position wrapped */
+      if (buf->position == 0)
+        buf->mustflush = 1;
+
+      /* REL files must be syncronized on EOI */
+      if(buf->recordlen && (iec_data.iecflags & EOI_RECVD))
+        if (buf->refill(buf))
+          return 1;
+    }
+  }
+}
+
+/**
+ * iec_talk_handler - handle an incoming TALK request (E909)
+ * @cmd: command byte received from the bus
+ *
+ * This function handles a talk request from the computer.
+ */
+static uint8_t iec_talk_handler(uint8_t cmd) {
+  buffer_t *buf;
+
+  uart_putc('T');
+
+  buf = find_buffer(cmd & 0x0f);
+  if (buf == NULL)
+    return 0; /* 0 because we didn't change the state here */
+
+  if (iec_data.iecflags & JIFFY_ACTIVE)
+    /* wait 360us (J1541 E781) to make sure the C64 is at fbb7/fb0c */
+    delay_us(360);
+
+  if (iec_data.iecflags & JIFFY_LOAD) {
+    /* See if the C64 has passed fb06 or if we should abort */
+    do {                /* J1541 FF30 - wait until DATA inactive/high */
+      if (iec_check_atn()) return -1;
+    } while (!IEC_DATA);
+    /* The LOAD path is only used after the first two bytes have been */
+    /* read. Reset the buffer position because there is a chance that */
+    /* the third byte has slipped through.                            */
+    buf->position = 4;
+
+    /* Ready-signal for the first block */
+    set_data(0);
+    set_clock(1);
+    /* FFA0 - this delay is required so the C64 can see data low even */
+    /*        if it hits a badline at the worst possible moment       */
+    delay_us(50);
+  }
+
+  while (buf->read) {
+    do {
+      uint8_t finalbyte = (buf->position == buf->lastused);
+      if (iec_data.iecflags & JIFFY_LOAD) {
+        /* Send a byte using the LOAD protocol variant */
+        /* The final byte in the buffer must be sent with Clock low   */
+        /* to signal that the next transfer will take some time.      */
+        /* The C64 samples this just after it has set Data Low before */
+        /* the first bitpair. If this marker is not set the time      */
+        /* between two bytes outside the assembler function must not  */
+        /* exceed ~38 C64 cycles (estimated) or the computer may      */
+        /* see a previous data bit as the marker.                     */
+        if (jiffy_send(buf->data[buf->position],0,128 | !finalbyte)) {
+          /* Abort if ATN was seen */
+          iec_check_atn();
+          return -1;
+        }
+
+        if (finalbyte && buf->sendeoi) {
+          /* Send EOI marker */
+          delay_us(100);
+          set_clock(1);
+          delay_us(100);
+          set_clock(0);
+          delay_us(100);
+          set_clock(1);
+        }
+      } else {
+        uint8_t res;
+
+        if (finalbyte && buf->sendeoi) {
+          /* Send with EOI */
+          if (iec_data.iecflags & DOLPHIN_ACTIVE)
+            res = dolphin_putc(buf->data[buf->position], 1);
+          else
+            res = iec_putc(buf->data[buf->position], 1);
+
+          if (iec_data.iecflags & JIFFY_ACTIVE) {
+            /* Jiffy resets the EOI condition on the bus after 30-40us. */
+            /* We use 50 to play it safe.                               */
+            delay_us(50);
+            set_data(1);
+            set_clock(0);
+          }
+          if (res) {
+            uart_putc('Q');
+            return 1;
+          }
+        } else {
+          /* Send without EOI */
+          if (iec_data.iecflags & DOLPHIN_ACTIVE)
+            res = dolphin_putc(buf->data[buf->position], 0);
+          else
+            res = iec_putc(buf->data[buf->position], 0);
+
+          if (res) {
+            uart_putc('V');
+            return 1;
+          }
+        }
+      }
+    } while (buf->position++ < buf->lastused);
+
+    if (buf->sendeoi &&
+        (cmd & 0x0f) != 0x0f &&
+        !buf->recordlen &&
+        buf->refill != directbuffer_refill) {
+      buf->read = 0;
+      break;
+    }
+
+    if (buf->refill(buf)) {
+      iec_data.bus_state = BUS_CLEANUP;
+      return 1;
+    }
+
+    /* Search the buffer again, it can change when using large buffers */
+    buf = find_buffer(cmd & 0x0f);
+
+    if (iec_data.iecflags & JIFFY_LOAD) {
+      /* wait until the C64 is at FB06, use timeout in case the STOP key is pressed */
+      start_timeout(120);
+      while (!IEC_DATA && !has_timed_out()) ;
+
+      /* check if ATN changed */
+      if (iec_check_atn())
+        return -1;
+
+      /* Signal to the C64 that we're ready to send the next block */
+      set_data(0);
+      set_clock(1);
+
+      /* FFA0 - this delay is required so the C64 can see data low even */
+      /*        if it hits a badline at the worst possible moment       */
+      delay_us(50);
+    }
+  }
+
+  return 0;
+}
+
+
+
+/* ------------------------------------------------------------------------- */
+/*  Initialization and main loop                                             */
+/* ------------------------------------------------------------------------- */
+
+
+void iec_init(void) {
+  /* Keep DATA low if there is already a request on the bus */
+  if (!IEC_ATN)
+    set_data(0);
+
+  /* Prepare IEC interrupts */
+  iec_interrupts_init();
+
+  /* Read the hardware-set device address */
+  device_hw_address_init();
+  delay_ms(1);
+  device_address = device_hw_address();
+}
+void bus_init(void) __attribute__((weak, alias("iec_init")));
+
+void iec_mainloop(void) {
+  int16_t cmd = 0; // make gcc happy...
+
+  set_error(ERROR_DOSVERSION);
+
+  iec_data.bus_state = BUS_IDLE;
+
+  while (1) {
+    switch (iec_data.bus_state) {
+    case BUS_SLEEP:
+      set_atn_irq(0);
+      set_data(1);
+      set_clock(1);
+      set_error(ERROR_OK);
+      set_busy_led(0);
+      set_dirty_led(1);
+
+      /* Wait until the sleep key is used again */
+      while (!key_pressed(KEY_SLEEP))
+        system_sleep();
+      reset_key(KEY_SLEEP);
+
+      update_leds();
+
+      iec_data.bus_state = BUS_IDLE;
+      break;
+
+    case BUS_IDLE:  // EBFF
+      /* Wait for ATN */
+      parallel_set_dir(PARALLEL_DIR_IN);
+      set_atn_irq(1);
+      while (IEC_ATN) {
+        if (key_pressed(KEY_NEXT | KEY_PREV | KEY_HOME)) {
+          change_disk();
+        } else if (key_pressed(KEY_SLEEP)) {
+          reset_key(KEY_SLEEP);
+          iec_data.bus_state = BUS_SLEEP;
+          break;
+        } else if (display_found && key_pressed(KEY_DISPLAY)) {
+          display_service();
+          reset_key(KEY_DISPLAY);
+        }
+        system_sleep();
+      }
+
+      if (iec_data.bus_state != BUS_SLEEP)
+        iec_data.bus_state = BUS_FOUNDATN;
+      break;
+
+    case BUS_FOUNDATN: // E85B
+      /* Pull data low to say we're here */
+      set_clock(1);
+      set_data(0);
+      set_atn_irq(0);
+
+      iec_data.device_state = DEVICE_IDLE;
+      iec_data.bus_state    = BUS_ATNACTIVE;
+      iec_data.iecflags &= (uint8_t)~(EOI_RECVD | JIFFY_ACTIVE | JIFFY_LOAD);
+
+      /* Slight protocol violation:                        */
+      /*   Wait until clock is low or 250us have passed    */
+      /*   The C64 doesn't always pull down the clock line */
+      /*   before ATN, this loop should keep us in sync.   */
+
+      start_timeout(250);
+      while (IEC_CLOCK && !has_timed_out())
+        if (IEC_ATN)
+          iec_data.bus_state = BUS_ATNPROCESS;
+
+      while (!IEC_CLOCK)
+        if (IEC_ATN)
+          iec_data.bus_state = BUS_ATNPROCESS;
+
+      break;
+
+    case BUS_ATNACTIVE: // E884
+      cmd = iec_getc();
+
+      if (cmd < 0) {
+        /* iec_check_atn changed our state */
+        uart_putc('C');
+        break;
+      }
+
+      uart_putc('A');
+      uart_puthex(cmd);
+      uart_putcrlf();
+
+      if (cmd == 0x3f) { /* Unlisten */
+        if (iec_data.device_state == DEVICE_LISTEN)
+          iec_data.device_state = DEVICE_IDLE;
+        iec_data.bus_state = BUS_ATNFINISH;
+      } else if (cmd == 0x5f) { /* Untalk */
+        if (iec_data.device_state == DEVICE_TALK)
+          iec_data.device_state = DEVICE_IDLE;
+        iec_data.bus_state = BUS_ATNFINISH;
+      } else if (cmd == 0x40+device_address) { /* Talk */
+        iec_data.device_state = DEVICE_TALK;
+        iec_data.bus_state = BUS_FORME;
+      } else if (cmd == 0x20+device_address) { /* Listen */
+        iec_data.device_state = DEVICE_LISTEN;
+        iec_data.bus_state = BUS_FORME;
+      } else if ((cmd & 0x60) == 0x60) {
+        /* Check for OPEN/CLOSE/DATA */
+        /* JiffyDOS uses a slightly modified protocol for LOAD that */
+        /* is activated by using 0x61 instead of 0x60 in the TALK   */
+        /* state. The original floppy code has additional checks    */
+        /* that force the non-load Jiffy protocol for file types    */
+        /* other than SEQ and PRG.                                  */
+        /* Please note that $ is special-cased in the kernal so it  */
+        /* will never trigger this.                                 */
+        if (cmd == 0x61 && iec_data.device_state == DEVICE_TALK) {
+          cmd = 0x60;
+          iec_data.iecflags |= JIFFY_LOAD;
+        }
+
+        iec_data.secondary_address = cmd & 0x0f;
+        /* 1571 handles close (0xe0-0xef) here, so we do that too. */
+        if ((cmd & 0xf0) == 0xe0) {
+          if (cmd == 0xef) {
+            /* Close all buffers if sec. 15 is closed */
+            if (free_multiple_buffers(FMB_USER_CLEAN)) {
+              /* The 1571 error generator/handler always jumps to BUS_CLEANUP */
+              iec_data.bus_state = BUS_CLEANUP;
+              break;
+            }
+          } else {
+            /* Close a single buffer */
+            buffer_t *buf;
+            buf = find_buffer(iec_data.secondary_address);
+            if (buf != NULL) {
+              if (buf->cleanup(buf)) {
+                free_buffer(buf);
+                iec_data.bus_state = BUS_CLEANUP;
+                break;
+              }
+              /* Free the buffer */
+              free_buffer(buf);
+            }
+          }
+          iec_data.bus_state = BUS_FORME;
+        } else {
+          iec_data.bus_state = BUS_ATNFINISH;
+        }
+      } else {
+        // Not me
+        iec_data.bus_state = BUS_NOTFORME;
+      }
+      break;
+
+    case BUS_FORME: // E8D2
+      if (!IEC_ATN)
+        iec_data.bus_state = BUS_ATNACTIVE;
+      else
+        iec_data.bus_state = BUS_ATNPROCESS;
+      break;
+
+    case BUS_NOTFORME: // E8FD
+      set_atn_irq(0);
+      set_clock(1);
+      set_data(1);
+      iec_data.bus_state = BUS_ATNFINISH;
+      break;
+
+    case BUS_ATNFINISH: // E902 + DolphinDOS A7CC
+      iec_data.iecflags &= ~DOLPHIN_ACTIVE;
+      parallel_clear_rxflag();
+
+      while (!IEC_ATN) {
+        if (iec_data.device_state != DEVICE_IDLE &&
+            parallel_rxflag) {
+          /* parallel byte received */
+          parallel_clear_rxflag();
+          iec_data.iecflags |= DOLPHIN_ACTIVE;
+          parallel_send_handshake();
+
+          if (iec_data.device_state == DEVICE_TALK)
+            parallel_set_dir(PARALLEL_DIR_OUT);
+          else
+            parallel_set_dir(PARALLEL_DIR_IN);
+        }
+      }
+
+      iec_data.bus_state = BUS_ATNPROCESS;
+      break;
+
+    case BUS_ATNPROCESS: // E8D7
+      set_atn_irq(1);
+
+      if (iec_data.device_state == DEVICE_LISTEN) {
+        if (iec_listen_handler(cmd))
+          break;
+      } else if (iec_data.device_state == DEVICE_TALK) {
+        set_data(1);
+        delay_us(50);    // Implicit delay, fudged
+        set_clock(0);
+        delay_us(70);    // Implicit delay, estimated
+
+        if (iec_talk_handler(cmd))
+          break;
+
+      }
+      iec_data.bus_state = BUS_CLEANUP;
+      break;
+
+    case BUS_CLEANUP:
+      set_atn_irq(1);
+      // 836B
+      set_clock(1);
+      set_data(1);
+
+      //   0x255 -> A61C
+      /* Handle commands and filenames */
+      if (iec_data.iecflags & COMMAND_RECVD) {
+
+#ifdef HAVE_HOTPLUG
+        /* This seems to be a nice point to handle card changes */
+        if (disk_state != DISK_OK) {
+          set_busy_led(1);
+          /* If the disk was changed the buffer contents are useless */
+          if (disk_state == DISK_CHANGED || disk_state == DISK_REMOVED) {
+            free_multiple_buffers(FMB_ALL);
+            change_init();
+            filesystem_init(0);
+          } else
+            /* Disk state indicated an error, try to recover by initialising */
+            filesystem_init(1);
+
+          update_leds();
+        }
+#endif
+
+        if (iec_data.secondary_address == 0x0f) {
+          /* Command channel */
+          parse_doscommand();
+        } else {
+          /* Filename in command buffer */
+          datacrc = 0xffff;
+          file_open(iec_data.secondary_address);
+        }
+        command_length = 0;
+        iec_data.iecflags &= (uint8_t)~COMMAND_RECVD;
+      }
+
+      /* We're done, clean up unused buffers */
+      free_multiple_buffers(FMB_UNSTICKY);
+      d64_bam_commit();
+
+      iec_data.bus_state = BUS_IDLE;
+      break;
+    }
+  }
+}
+void bus_mainloop(void) __attribute__ ((weak, alias("iec_mainloop")));
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/iec.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/iec.h
new file mode 100644
index 00000000..3e21be61
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/iec.h
@@ -0,0 +1,72 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   iec.h: Definitions for the IEC handling code
+
+*/
+
+#ifndef IEC_H
+#define IEC_H
+
+#include "bus.h"
+
+/**
+ * struct iecflags_t - Bitfield of various flags, mostly IEC-related
+ * @eoi_recvd      : Received EOI with the last byte read
+ * @command_recvd  : Command or filename received
+ * @jiffy_active   : JiffyDOS-capable master detected
+ * @jiffy_load     : JiffyDOS LOAD operation detected
+ * @dolphin_active : DolphinDOS parallel mode active
+ *
+ * NOTE: This was converted from a struct with bitfields to
+ *       a single variable with macros because the struct
+ *       version created worse code on AVR.
+ *
+ * This is a bitfield for a number of boolean variables used
+ * (FIXME: This seems to be truncated)
+ */
+
+#define EOI_RECVD       (1<<0)
+#define COMMAND_RECVD   (1<<1)
+#define JIFFY_ACTIVE    (1<<2)
+#define JIFFY_LOAD      (1<<3)
+
+#ifdef CONFIG_PARALLEL_DOLPHIN
+#  define DOLPHIN_ACTIVE (1<<4)
+#else
+#  define DOLPHIN_ACTIVE 0
+#endif
+
+typedef struct {
+  uint8_t iecflags;
+  enum { BUS_IDLE = 0, BUS_ATNACTIVE, BUS_FOUNDATN, BUS_FORME, BUS_NOTFORME, BUS_ATNFINISH, BUS_ATNPROCESS, BUS_CLEANUP, BUS_SLEEP } bus_state;
+  enum { DEVICE_IDLE = 0, DEVICE_LISTEN, DEVICE_TALK } device_state;
+  uint8_t secondary_address;
+} iec_data_t;
+
+extern iec_data_t iec_data;
+
+uint8_t iec_check_atn(void);
+void iec_init(void);
+
+void  __attribute__ ((noreturn)) iec_mainloop(void);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ieee.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ieee.c
new file mode 100644
index 00000000..f2038bf5
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ieee.c
@@ -0,0 +1,722 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   ieee.c: IEEE-488 handling code by Nils Eilers <nils.eilers@gmx.de>
+
+*/
+
+#include "config.h"
+#include <avr/io.h>
+#include <avr/pgmspace.h>
+#include <avr/interrupt.h>
+#include <util/delay.h>
+#include <util/atomic.h>
+#include <string.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include "timer.h"
+#include "uart.h"
+#include "buffers.h"
+#include "d64ops.h"
+#include "diskchange.h"
+#include "diskio.h"
+#include "doscmd.h"
+#include "fatops.h"
+#include "fileops.h"
+#include "filesystem.h"
+#include "led.h"
+#include "ieee.h"
+#include "fastloader.h"
+#include "errormsg.h"
+#include "ctype.h"
+#include "display.h"
+#include "system.h"
+
+/*
+  Debug output:
+
+  AXX   : ATN 0xXX
+  c     : listen_handler cancelled
+  C     : CLOSE
+  l     : UNLISTEN
+  L     : LISTEN
+  D     : DATA 0x60
+  O     : OPEN 0xfX
+  ?XX   : unknown cmd 0xXX
+  .     : timeout after ATN
+
+*/
+
+#define FLAG_EOI 256
+#define FLAG_ATN 512
+
+#define IEEE_TIMEOUT_MS 64
+
+#define uart_puts_p(__s) uart_puts_P(PSTR(__s))
+#define EOI_RECVD       (1<<0)
+#define COMMAND_RECVD   (1<<1)
+#define ATN_POLLED      -3      // 0xfd
+#define TIMEOUT_ABORT   -4      // 0xfc
+
+/* ------------------------------------------------------------------------- */
+/*  Global variables                                                         */
+/* ------------------------------------------------------------------------- */
+
+uint8_t detected_loader = FL_NONE;      /* Workaround serial fastloader */
+uint8_t device_address;                 /* Current device address */
+static tick_t timeout;                  /* timeout on getticks()=timeout */
+
+/**
+ * struct ieeeflags_t - Bitfield of various flags, mostly IEEE-related
+ * @eoi_recvd      : Received EOI with the last byte read
+ * @command_recvd  : Command or filename received
+ *
+ * This is a bitfield for a number of boolean variables used
+ */
+
+struct {
+  uint8_t ieeeflags;
+  enum {    BUS_IDLE = 0,
+            BUS_FOUNDATN,
+            BUS_ATNPROCESS,
+            BUS_SLEEP
+  } bus_state;
+
+  enum {    DEVICE_IDLE = 0,
+            DEVICE_LISTEN,
+            DEVICE_TALK
+  } device_state;
+  uint8_t secondary_address;
+} ieee_data;
+
+/* ------------------------------------------------------------------------- */
+/*  Initialization and very low-level bus handling                           */
+/* ------------------------------------------------------------------------- */
+
+static inline void set_eoi_state(uint8_t x)
+{
+  if(x) {                                           // Set EOI high
+    IEEE_DDR_EOI &= (uint8_t)~_BV(IEEE_PIN_EOI);    // EOI as input
+    IEEE_PORT_EOI |= (uint8_t)_BV(IEEE_PIN_EOI);    // Enable pull-up
+  } else {                                          // Set EOI low
+    IEEE_PORT_EOI &= (uint8_t)~_BV(IEEE_PIN_EOI);   // EOI low
+    IEEE_DDR_EOI |= (uint8_t) _BV(IEEE_PIN_EOI);    // EOI as output
+  }
+}
+
+/* Read port bits */
+# define IEEE_ATN        (IEEE_INPUT_ATN  & _BV(IEEE_PIN_ATN))
+# define IEEE_NDAC       (IEEE_INPUT_NDAC & _BV(IEEE_PIN_NDAC))
+# define IEEE_NRFD       (IEEE_INPUT_NRFD & _BV(IEEE_PIN_NRFD))
+# define IEEE_DAV        (IEEE_INPUT_DAV  & _BV(IEEE_PIN_DAV))
+# define IEEE_EOI        (IEEE_INPUT_EOI  & _BV(IEEE_PIN_EOI))
+
+#ifdef HAVE_7516X
+# define ddr_change_by_atn() \
+    if(ieee_data.device_state == DEVICE_TALK) ieee_ports_listen()
+# define set_ieee_data(data) IEEE_D_PORT = (uint8_t) ~ data
+
+  static inline void set_te_state(uint8_t x)
+  {
+    if(x) IEEE_PORT_TE |= _BV(IEEE_PIN_TE);
+    else  IEEE_PORT_TE &= ~_BV(IEEE_PIN_TE);
+  }
+
+  static inline void set_ndac_state(uint8_t x)
+  {
+    if (x) IEEE_PORT_NDAC |= _BV(IEEE_PIN_NDAC);
+    else   IEEE_PORT_NDAC &= ~_BV(IEEE_PIN_NDAC);
+  }
+
+  static inline void set_nrfd_state(uint8_t x)
+  {
+    if(x) IEEE_PORT_NRFD |= _BV(IEEE_PIN_NRFD);
+    else  IEEE_PORT_NRFD &= ~_BV(IEEE_PIN_NRFD);
+  }
+
+  static inline void set_dav_state(uint8_t x)
+  {
+    if(x) IEEE_PORT_DAV |= _BV(IEEE_PIN_DAV);
+    else  IEEE_PORT_DAV &= ~_BV(IEEE_PIN_DAV);
+  }
+
+  // Configure bus to passive/listen or talk
+  // Toogle direction of I/O pins and safely avoid connecting two outputs
+
+  static inline void ieee_ports_listen (void)
+  {
+    IEEE_D_DDR = 0;                                 // data ports as inputs
+    IEEE_D_PORT = 0xff;                     // enable pull-ups for data lines
+    IEEE_DDR_DAV &= (uint8_t) ~_BV(IEEE_PIN_DAV);   // DAV as input
+    IEEE_DDR_EOI &= (uint8_t) ~_BV(IEEE_PIN_EOI);   // EOI as input
+    set_te_state(0);                                // 7516x listen
+    IEEE_DDR_NDAC |= _BV(IEEE_PIN_NDAC);            // NDAC as output
+    IEEE_DDR_NRFD |= _BV(IEEE_PIN_NRFD);            // NRFD as output
+    IEEE_PORT_DAV |= _BV(IEEE_PIN_DAV);             // Enable pull-up for DAV
+    IEEE_PORT_EOI |= _BV(IEEE_PIN_EOI);             // Enable pull-up for EOI
+  }
+
+  static inline void ieee_ports_talk (void)
+  {
+    IEEE_DDR_NDAC &= (uint8_t)~_BV(IEEE_PIN_NDAC);  // NDAC as input
+    IEEE_DDR_NRFD &= (uint8_t)~_BV(IEEE_PIN_NRFD);  // NRFD as input
+    IEEE_PORT_NDAC |= _BV(IEEE_PIN_NDAC);           // Enable pull-up for NDAC
+    IEEE_PORT_NRFD |= _BV(IEEE_PIN_NRFD);           // Enable pull-up for NRFD
+    set_te_state(1);                                // 7516x talk enable
+    IEEE_D_PORT = 0xff;                             // all data lines high
+    IEEE_D_DDR = 0xff;                              // data ports as outputs
+    set_dav_state(1);                               // Set DAV high
+    IEEE_DDR_DAV |= _BV(IEEE_PIN_DAV);              // DAV as output
+    set_eoi_state(1);                               // Set EOI high
+    IEEE_DDR_EOI |= _BV(IEEE_PIN_EOI);              // EOI as output
+  }
+
+  static void inline ieee_bus_idle (void)
+  {
+    ieee_ports_listen();
+    set_ndac_state(1);
+    set_nrfd_state(1);
+  }
+
+#else   /* HAVE_7516X */
+  /* ----------------------------------------------------------------------- */
+  /*  Poor men's variant without IEEE bus drivers                            */
+  /* ----------------------------------------------------------------------- */
+
+  static inline void set_ndac_state (uint8_t x)
+  {
+    if(x) {                                             // Set NDAC high
+      IEEE_DDR_NDAC &= (uint8_t)~_BV(IEEE_PIN_NDAC);    // NDAC as input
+      IEEE_PORT_NDAC |= _BV(IEEE_PIN_NDAC);             // Enable pull-up
+    } else {                                            // Set NDAC low
+      IEEE_PORT_NDAC &= (uint8_t)~_BV(IEEE_PIN_NDAC);   // NDAC low
+      IEEE_DDR_NDAC |= _BV(IEEE_PIN_NDAC);              // NDAC as output
+    }
+  }
+
+  static inline void set_nrfd_state (uint8_t x)
+  {
+    if(x) {                                             // Set NRFD high
+      IEEE_DDR_NRFD &= (uint8_t)~_BV(IEEE_PIN_NRFD);    // NRFD as input
+      IEEE_PORT_NRFD |= _BV(IEEE_PIN_NRFD);             // Enable pull-up
+    } else {                                            // Set NRFD low
+      IEEE_PORT_NRFD &= (uint8_t)~_BV(IEEE_PIN_NRFD);   // NRFD low
+      IEEE_DDR_NRFD |= (uint8_t) _BV(IEEE_PIN_NRFD);    // NRFD as output
+    }
+  }
+
+  static inline void set_dav_state (uint8_t x)
+  {
+    if(x) {                                             // Set DAV high
+      IEEE_DDR_DAV &= (uint8_t)~_BV(IEEE_PIN_DAV);      // DAV as input
+      IEEE_PORT_DAV |= _BV(IEEE_PIN_DAV);               // Enable pull-up
+    } else {                                            // Set DAV low
+      IEEE_PORT_DAV &= (uint8_t)~_BV(IEEE_PIN_DAV);     // DAV low
+      IEEE_DDR_DAV |= _BV(IEEE_PIN_DAV);                // DAV as output
+    }
+  }
+
+# define set_te_state(dummy) do { } while (0)       // ignore TE
+
+  static inline void set_ieee_data (uint8_t data)
+  {
+    IEEE_D_DDR = data;
+    IEEE_D_PORT = (uint8_t) ~ data;
+  }
+
+  static inline void ieee_bus_idle (void)
+  {
+    IEEE_D_DDR = 0;                 // Data ports as input
+    IEEE_D_PORT = 0xff;             // Enable pull-ups for data lines
+    IEEE_DDR_DAV  &= (uint8_t) ~_BV(IEEE_PIN_DAV);  // DAV as input
+    IEEE_DDR_EOI  &= (uint8_t) ~_BV(IEEE_PIN_EOI);  // EOI as input
+    IEEE_DDR_NDAC &= (uint8_t) ~_BV(IEEE_PIN_NDAC); // NDAC as input
+    IEEE_DDR_NRFD &= (uint8_t) ~_BV(IEEE_PIN_NRFD); // NRFD as input
+    IEEE_PORT_DAV |= _BV(IEEE_PIN_DAV);             // Enable pull-up for DAV
+    IEEE_PORT_EOI |= _BV(IEEE_PIN_EOI);             // Enable pull-up for EOI
+    IEEE_PORT_NDAC |= _BV(IEEE_PIN_NDAC);           // Enable pull-up for NDAC
+    IEEE_PORT_NRFD |= _BV(IEEE_PIN_NRFD);           // Enable pull-up for NRFD
+  }
+
+  static void ieee_ports_listen (void) {
+    ieee_bus_idle();
+  }
+
+  static void ieee_ports_talk (void) {
+    ieee_bus_idle();
+  }
+
+# define ddr_change_by_atn() do { } while (0)
+
+#endif  /* HAVE_7516X */
+
+/* Init IEEE bus */
+void ieee_init(void) {
+  ieee_bus_idle();
+
+  /* Prepare IEEE interrupts */
+  ieee_interrupts_init();
+
+  /* Read the hardware-set device address */
+  device_hw_address_init();
+  delay_ms(1);
+  device_address = device_hw_address();
+
+  /* Init vars and flags */
+  command_length = 0;
+  ieee_data.ieeeflags &= (uint8_t) ~ (COMMAND_RECVD || EOI_RECVD);
+}
+void bus_init(void) __attribute__((weak, alias("ieee_init")));
+
+/* Interrupt routine that simulates the hardware-auto-acknowledge of ATN
+   at falling edge of ATN. If pin change interrupts are used, we have to
+   check for rising or falling edge in software first! */
+IEEE_ATN_HANDLER {
+#ifdef IEEE_PCMSK
+  if(!IEEE_ATN) {
+#else
+  {
+#endif
+    ddr_change_by_atn();        /* Switch NDAC+NRFD to outputs */
+    set_ndac_state(0);          /* Poll NDAC and NRFD low */
+    set_nrfd_state(0);
+  }
+}
+
+/* ------------------------------------------------------------------------- */
+/*  Byte transfer routines                                                   */
+/* ------------------------------------------------------------------------- */
+
+
+/**
+ * ieee_getc - receive one byte from the IEEE-488 bus
+ *
+ * This function tries receives one byte from the IEEE-488 bus and returns it
+ * if successful. Flags (EOI, ATN) are passed in the more significant byte.
+ * Returns TIMEOUT_ABORT if a timeout occured
+ */
+
+int ieee_getc(void) {
+  int c = 0;
+
+  /* PET waits for NRFD high */
+  set_ndac_state(0);            /* data not yet accepted */
+  set_nrfd_state(1);            /* ready for new data */
+
+  /* Wait for DAV low, check timeout */
+  timeout = getticks() + MS_TO_TICKS(IEEE_TIMEOUT_MS);
+  do {                          /* wait for data valid */
+    if(time_after(getticks(), timeout)) return TIMEOUT_ABORT;
+  } while (IEEE_DAV);
+
+  set_nrfd_state(0);    /* not ready for new data, data not yet read */
+
+  c = (uint8_t) ~ IEEE_D_PIN;   /* read data */
+  if(!IEEE_EOI) c |= FLAG_EOI;  /* end of transmission? */
+  if(!IEEE_ATN) c |= FLAG_ATN;  /* data or command? */
+
+  set_ndac_state(1);            /* data accepted, read complete */
+
+  /* Wait for DAV high, check timeout */
+  timeout = getticks() + MS_TO_TICKS(IEEE_TIMEOUT_MS);
+  do {              /* wait for controller to remove data from bus */
+    if(time_after(getticks(), timeout)) return TIMEOUT_ABORT;
+  } while (!IEEE_DAV);
+  set_ndac_state(0);            /* next data not yet accepted */
+
+  return c;
+}
+
+
+/**
+ * ieee_putc - send a byte
+ * @data    : byte to be sent
+ * @with_eoi: Flags if the byte should be send with an EOI condition
+ *
+ * This function sends the byte data over the IEEE-488 bus and pulls
+ * EOI if it is the last byte.
+ * Returns
+ *  0 normally,
+ * ATN_POLLED if ATN was set or
+ * TIMEOUT_ABORT if a timeout occured
+ * On negative returns, the caller should return to the IEEE main loop.
+ */
+
+static uint8_t ieee_putc(uint8_t data, const uint8_t with_eoi) {
+  ieee_ports_talk();
+  set_eoi_state (!with_eoi);
+  set_ieee_data (data);
+  if(!IEEE_ATN) return ATN_POLLED;
+  _delay_us(11);    /* Allow data to settle */
+  if(!IEEE_ATN) return ATN_POLLED;
+
+  /* Wait for NRFD high , check timeout */
+  timeout = getticks() + MS_TO_TICKS(IEEE_TIMEOUT_MS);
+  do {
+    if(!IEEE_ATN) return ATN_POLLED;
+    if(time_after(getticks(), timeout)) return TIMEOUT_ABORT;
+  } while (!IEEE_NRFD);
+  set_dav_state(0);
+
+  /* Wait for NRFD low, check timeout */
+  timeout = getticks() + MS_TO_TICKS(IEEE_TIMEOUT_MS);
+  do {
+    if(!IEEE_ATN) return ATN_POLLED;
+    if(time_after(getticks(), timeout)) return TIMEOUT_ABORT;
+  } while (IEEE_NRFD);
+
+  /* Wait for NDAC high , check timeout */
+  timeout = getticks() + MS_TO_TICKS(IEEE_TIMEOUT_MS);
+  do {
+    if(!IEEE_ATN) return ATN_POLLED;
+    if(time_after(getticks(), timeout)) return TIMEOUT_ABORT;
+  } while (!IEEE_NDAC);
+  set_dav_state(1);
+  return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+/*  Listen+Talk-Handling                                                     */
+/* ------------------------------------------------------------------------- */
+
+static int16_t ieee_listen_handler (uint8_t cmd)
+/* Receive characters from IEEE-bus and write them to the
+   listen buffer adressed by ieee_data.secondary_address.
+   If a new command is received (ATN set), return it
+*/
+{
+  buffer_t *buf;
+  int16_t c;
+
+  ieee_data.secondary_address = cmd & 0x0f;
+  buf = find_buffer(ieee_data.secondary_address);
+
+  /* Abort if there is no buffer or it's not open for writing */
+  /* and it isn't an OPEN command                             */
+  if ((buf == NULL || !buf->write) && (cmd & 0xf0) != 0xf0) {
+    uart_putc('c');
+    return -1;
+  }
+
+  switch(cmd & 0xf0) {
+    case 0x60:
+      uart_puts_p("DATA L ");
+      break;
+    case 0xf0:
+      uart_puts_p("OPEN ");
+      break;
+    default:
+      uart_puts_p("Unknown LH! ");
+      break;
+  }
+  uart_puthex(ieee_data.secondary_address);
+  uart_putcrlf();
+
+  c = -1;
+  for(;;) {
+    /* Get a character ignoring timeout but but watching ATN */
+    while((c = ieee_getc()) < 0);
+    if (c  & FLAG_ATN) return c;
+
+    uart_putc('<');
+    if (c & FLAG_EOI) {
+      uart_puts_p("EOI ");
+      ieee_data.ieeeflags |= EOI_RECVD;
+    } else ieee_data.ieeeflags &= ~EOI_RECVD;
+
+    uart_puthex(c); uart_putc(' ');
+    c &= 0xff; /* needed for isprint */
+    if(isprint(c)) uart_putc(c); else uart_putc('?');
+    uart_putcrlf();
+
+    if((cmd & 0x0f) == 0x0f || (cmd & 0xf0) == 0xf0) {
+      if (command_length < CONFIG_COMMAND_BUFFER_SIZE)
+        command_buffer[command_length++] = c;
+      if (ieee_data.ieeeflags & EOI_RECVD)
+        /* Filenames are just a special type of command =) */
+        ieee_data.ieeeflags |= COMMAND_RECVD;
+    } else {
+      /* Flush buffer if full */
+      if (buf->mustflush) {
+        if (buf->refill(buf)) return -2;
+        /* Search the buffer again,                     */
+        /* it can change when using large buffers       */
+        buf = find_buffer(ieee_data.secondary_address);
+      }
+
+      buf->data[buf->position] = c;
+      mark_buffer_dirty(buf);
+
+      if (buf->lastused < buf->position) buf->lastused = buf->position;
+      buf->position++;
+
+      /* Mark buffer for flushing if position wrapped */
+      if (buf->position == 0) buf->mustflush = 1;
+
+      /* REL files must be syncronized on EOI */
+      if(buf->recordlen && (ieee_data.ieeeflags & EOI_RECVD)) {
+        if (buf->refill(buf)) return -2;
+      }
+    }   /* else-buffer */
+  }     /* for(;;) */
+}
+
+static uint8_t ieee_talk_handler (void)
+{
+  buffer_t *buf;
+  uint8_t finalbyte;
+  uint8_t c;
+  uint8_t res;
+
+  buf = find_buffer(ieee_data.secondary_address);
+  if(buf == NULL) return -1;
+
+  while (buf->read) {
+    do {
+      finalbyte = (buf->position == buf->lastused);
+      c = buf->data[buf->position];
+      if (finalbyte && buf->sendeoi) {
+        /* Send with EOI */
+        res = ieee_putc(c, 1);
+        if(!res) uart_puts_p("EOI: ");
+      } else {
+        /* Send without EOI */
+        res = ieee_putc(c, 0);
+      }
+      if(res) {
+        if(res==0xfc) {
+          uart_puts_P(PSTR("*** TIMEOUT ABORT***")); uart_putcrlf();
+        }
+        if(res!=0xfd) {
+          uart_putc('c'); uart_puthex(res);
+        }
+        return 1;
+      } else {
+        uart_putc('>');
+        uart_puthex(c); uart_putc(' ');
+        if(isprint(c)) uart_putc(c); else uart_putc('?');
+        uart_putcrlf();
+      }
+    } while (buf->position++ < buf->lastused);
+
+    if(buf->sendeoi && ieee_data.secondary_address != 0x0f &&
+      !buf->recordlen && buf->refill != directbuffer_refill) {
+      buf->read = 0;
+      break;
+    }
+
+    if (buf->refill(buf)) {
+      return -1;
+    }
+
+    /* Search the buffer again, it can change when using large buffers */
+    buf = find_buffer(ieee_data.secondary_address);
+  }
+  return 0;
+}
+
+static void cmd_handler (void)
+{
+  /* Handle commands and filenames */
+  if (ieee_data.ieeeflags & COMMAND_RECVD) {
+# ifdef HAVE_HOTPLUG
+    /* This seems to be a nice point to handle card changes */
+    if (disk_state != DISK_OK) {
+      set_busy_led(1);
+      /* If the disk was changed the buffer contents are useless */
+      if (disk_state == DISK_CHANGED || disk_state == DISK_REMOVED) {
+        free_multiple_buffers(FMB_ALL);
+        change_init();
+        filesystem_init(0);
+      } else {
+        /* Disk state indicated an error, try to recover by initialising */
+        filesystem_init(1);
+      }
+      update_leds();
+    }
+# endif
+    if (ieee_data.secondary_address == 0x0f) {
+      parse_doscommand();                   /* Command channel */
+    } else {
+      datacrc = 0xffff;                     /* Filename in command buffer */
+      file_open(ieee_data.secondary_address);
+    }
+    command_length = 0;
+    ieee_data.ieeeflags &= (uint8_t) ~COMMAND_RECVD;
+  } /* COMMAND_RECVD */
+
+  /* We're done, clean up unused buffers */
+  free_multiple_buffers(FMB_UNSTICKY);
+  d64_bam_commit();
+}
+
+/* ------------------------------------------------------------------------- */
+/*  Main loop                                                                */
+/* ------------------------------------------------------------------------- */
+
+void ieee_mainloop(void) {
+  int16_t cmd = 0;
+
+  set_error(ERROR_DOSVERSION);
+
+  ieee_data.bus_state = BUS_IDLE;
+  ieee_data.device_state = DEVICE_IDLE;
+  for(;;) {
+    switch(ieee_data.bus_state) {
+      case BUS_SLEEP:                               /* BUS_SLEEP */
+        set_atn_irq(0);
+        ieee_bus_idle();
+        set_error(ERROR_OK);
+        set_busy_led(0);
+        uart_puts_P(PSTR("ieee.c/sleep ")); set_dirty_led(1);
+
+        /* Wait until the sleep key is used again */
+        while (!key_pressed(KEY_SLEEP))
+          system_sleep();
+        reset_key(KEY_SLEEP);
+
+        set_atn_irq(1);
+        update_leds();
+
+        ieee_data.bus_state = BUS_IDLE;
+        break;
+
+      case BUS_IDLE:                                /* BUS_IDLE */
+        ieee_bus_idle();
+        while(IEEE_ATN) {   ;               /* wait for ATN */
+          if (key_pressed(KEY_NEXT | KEY_PREV | KEY_HOME)) {
+            change_disk();
+          } else if (key_pressed(KEY_SLEEP)) {
+            reset_key(KEY_SLEEP);
+            ieee_data.bus_state = BUS_SLEEP;
+            break;
+          } else if (display_found && key_pressed(KEY_DISPLAY)) {
+            display_service();
+            reset_key(KEY_DISPLAY);
+          }
+          system_sleep();
+      }
+
+      if (ieee_data.bus_state != BUS_SLEEP)
+        ieee_data.bus_state = BUS_FOUNDATN;
+      break;
+
+      case BUS_FOUNDATN:                            /* BUS_FOUNDATN */
+        ieee_data.bus_state = BUS_ATNPROCESS;
+        cmd = ieee_getc();
+      break;
+
+      case BUS_ATNPROCESS:                          /* BUS_ATNPROCESS */
+        if(cmd < 0) {
+          uart_putc('c');
+          ieee_data.bus_state = BUS_IDLE;
+          break;
+        } else cmd &= 0xFF;
+        uart_puts_p("ATN "); uart_puthex(cmd);
+        uart_putcrlf();
+
+        if (cmd == 0x3f) {                                  /* UNLISTEN */
+          if(ieee_data.device_state == DEVICE_LISTEN) {
+            ieee_data.device_state = DEVICE_IDLE;
+            uart_puts_p("UNLISTEN\r\n");
+          }
+          ieee_data.bus_state = BUS_IDLE;
+          break;
+        } else if (cmd == 0x5f) {                           /* UNTALK */
+          if(ieee_data.device_state == DEVICE_TALK) {
+            ieee_data.device_state = DEVICE_IDLE;
+            uart_puts_p("UNTALK\r\n");
+          }
+          ieee_data.bus_state = BUS_IDLE;
+          break;
+        } else if (cmd == (0x40 + device_address)) {        /* TALK */
+          uart_puts_p("TALK ");
+          uart_puthex(device_address); uart_putcrlf();
+          ieee_data.device_state = DEVICE_TALK;
+          /* disk drives never talk immediatly after TALK, so stay idle
+             and wait for a secondary address given by 0x60-0x6f DATA */
+          ieee_data.bus_state = BUS_IDLE;
+          break;
+        } else if (cmd == (0x20 + device_address)) {        /* LISTEN */
+          ieee_data.device_state = DEVICE_LISTEN;
+          uart_puts_p("LISTEN ");
+          uart_puthex(device_address); uart_putcrlf();
+          ieee_data.bus_state = BUS_IDLE;
+          break;
+        } else if ((cmd & 0xf0) == 0x60) {                  /* DATA */
+          /* 8250LP sends data while ATN is still active, so wait
+             for bus controller to release ATN or we will misinterpret
+             data as a command */
+          while(!IEEE_ATN);
+          if(ieee_data.device_state == DEVICE_LISTEN) {
+            cmd = ieee_listen_handler(cmd);
+            cmd_handler();
+            break;
+          } else if (ieee_data.device_state == DEVICE_TALK) {
+            ieee_data.secondary_address = cmd & 0x0f;
+            uart_puts_p("DATA T ");
+            uart_puthex(ieee_data.secondary_address);
+            uart_putcrlf();
+            if(ieee_talk_handler() == TIMEOUT_ABORT) {
+              ieee_data.device_state = DEVICE_IDLE;
+            }
+            ieee_data.bus_state = BUS_IDLE;
+            break;
+          } else {
+            ieee_data.bus_state = BUS_IDLE;
+            break;
+          }
+        } else if (ieee_data.device_state == DEVICE_IDLE) {
+          ieee_data.bus_state = BUS_IDLE;
+          break;
+          /* ----- if we reach this, we're LISTENer or TALKer ----- */
+        } else if ((cmd & 0xf0) == 0xe0) {                  /* CLOSE */
+          ieee_data.secondary_address = cmd & 0x0f;
+          uart_puts_p("CLOSE ");
+          uart_puthex(ieee_data.secondary_address);
+          uart_putcrlf();
+          /* Close all buffers if sec. 15 is closed */
+          if(ieee_data.secondary_address == 15) {
+            free_multiple_buffers(FMB_USER_CLEAN);
+          } else {
+            /* Close a single buffer */
+            buffer_t *buf;
+            buf = find_buffer (ieee_data.secondary_address);
+            if (buf != NULL) {
+              buf->cleanup(buf);
+              free_buffer(buf);
+            }
+          }
+          ieee_data.bus_state = BUS_IDLE;
+          break;
+        } else if ((cmd & 0xf0) == 0xf0) {                  /* OPEN */
+          cmd = ieee_listen_handler(cmd);
+          cmd_handler();
+          break;
+        } else {
+          /* Command for other device or unknown command */
+          ieee_data.bus_state = BUS_IDLE;
+        }
+      break;
+    }   /* switch   */
+  }     /* for()    */
+}
+void bus_mainloop(void) __attribute__ ((weak, alias("ieee_mainloop")));
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ieee.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ieee.h
new file mode 100644
index 00000000..b4adb146
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ieee.h
@@ -0,0 +1,35 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   ieee.h: Definitions for the IEEE-488 handling code
+
+*/
+
+#ifndef IEEE_H
+#define IEEE_H
+
+#include "bus.h"
+
+void ieee_init(void);
+
+void __attribute__ ((noreturn)) ieee_mainloop(void);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/integer.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/integer.h
new file mode 100644
index 00000000..c120dc7c
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/integer.h
@@ -0,0 +1,30 @@
+/* Integer definitions for ff, based on example code from ChaN */
+
+#ifndef _INTEGER
+
+#include <stdint.h>
+
+/* These types are assumed as 16-bit or larger integer */
+typedef int16_t  INT;
+typedef uint16_t UINT;
+
+/* These types are assumed as 8-bit integer */
+typedef int8_t  CHAR;
+typedef uint8_t UCHAR;
+typedef uint8_t BYTE;
+
+/* These types are assumed as 16-bit integer */
+typedef int16_t  SHORT;
+typedef uint16_t USHORT;
+typedef uint16_t WORD;
+
+/* These types are assumed as 32-bit integer */
+typedef int32_t  LONG;
+typedef uint32_t ULONG;
+typedef uint32_t DWORD;
+
+/* Boolean type */
+typedef enum { FALSE = 0, TRUE } BOOL;
+
+#define _INTEGER
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/led.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/led.c
new file mode 100644
index 00000000..3f91e4cd
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/led.c
@@ -0,0 +1,46 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   led.c: Overdesigned LED handling
+
+*/
+
+#include "config.h"
+#include "buffers.h"
+#include "led.h"
+
+volatile uint8_t led_state;
+
+/* Notice: leds_init() is in config.h because it's hardware-specific */
+
+/**
+ * update_leds - set LEDs to correspond to the buffer status
+ *
+ * This function sets the busy/dirty LEDs to correspond to the current state
+ * of the buffers, i.e. busy on of at least one non-system buffer is
+ * allocated and dirty on if at least one buffer is dirty.
+ * Call if you have manually changed the LEDs and you want to restore the
+ * "default" state.
+ */
+void update_leds(void) {
+  set_busy_led(active_buffers != 0);
+  set_dirty_led(get_dirty_buffer_count() != 0);
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/led.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/led.h
new file mode 100644
index 00000000..840d1fa1
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/led.h
@@ -0,0 +1,58 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   led.h: Definitions for the LEDs
+
+*/
+
+#ifndef LED_H
+#define LED_H
+
+#include "config.h"
+#include "uart.h"
+
+/* LED-to-bit mapping - BUSY/DIRTY are only used for SINGLE_LED */
+#define LED_ERROR      1
+#define LED_BUSY       2
+#define LED_DIRTY      4
+
+extern volatile uint8_t led_state;
+
+/* Update the LEDs to match the buffer state */
+void update_leds(void);
+
+/* Wrapped in do..while to avoid "ambigious else" warnings */
+#ifdef SINGLE_LED
+#  define set_dirty_led(x) do{if (x) { led_state |= LED_DIRTY; } else { led_state &= (uint8_t)~LED_DIRTY; }}while(0)
+#  define set_busy_led(x)  do{if (x) { led_state |= LED_BUSY ; } else { led_state &= (uint8_t)~LED_BUSY ; }}while(0)
+#  define set_error_led(x) do{if (x) { led_state |= LED_ERROR; } else { led_state &= (uint8_t)~LED_ERROR; }}while(0)
+#else
+static inline __attribute__((always_inline)) void set_error_led(uint8_t state) {
+  if (state) {
+    led_state |= LED_ERROR;
+  } else {
+    led_state &= ~LED_ERROR;
+    update_leds();
+  }
+}
+#endif
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/arch-config.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/arch-config.h
new file mode 100644
index 00000000..be71b15b
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/arch-config.h
@@ -0,0 +1,604 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   arch-config.h: The main architecture-specific config header
+
+*/
+
+#ifndef ARCH_CONFIG_H
+#define ARCH_CONFIG_H
+
+#include <arm/NXP/LPC17xx/LPC17xx.h>
+#include <arm/bits.h>
+
+/* ----- Common definitions for all LPC17xx hardware variants ------ */
+
+/* PLL settings for 100MHz from a 12MHz crystal */
+#define PLL_MULTIPLIER 25
+#define PLL_PREDIV     2
+#define PLL_DIVISOR    3
+
+/* Return value of buttons_read() */
+typedef unsigned int rawbutton_t;
+
+/* Interrupt handler for system tick */
+#define SYSTEM_TICK_HANDLER void SysTick_Handler(void)
+
+/* SSP clock divisors (must be even) - 400kHz slow, 16.7MHz fast */
+#define SSP_CLK_DIVISOR_FAST 6
+#define SSP_CLK_DIVISOR_SLOW 250
+
+/* IEC in/out are always seperate */
+#define IEC_SEPARATE_OUT
+
+/* The GPIO interrupt is demuxed in system.c, function names are fixed */
+#define SD_CHANGE_HANDLER  void sdcard_change_handler(void)
+#define IEC_ATN_HANDLER    void iec_atn_handler(void)
+#define IEC_CLOCK_HANDLER  void iec_clock_handler(void)
+#define PARALLEL_HANDLER   void parallel_handler(void)
+
+static inline void device_hw_address_init(void) {
+  // Nothing, pins are input+pullups by default
+}
+
+static inline void iec_interrupts_init(void) {
+  // Nothing, handled in arch-timer.c
+}
+
+/* P00 name cache is in AHB ram */
+#define P00CACHE_ATTRIB __attribute__((section(".ahbram")))
+
+// FIXME: Add a fully-commented example configuration that
+//        demonstrates all configuration possilibilites
+
+/* EEPROMFS: offset and size must be multiples of 4 */
+/* to actually enable it, CONFIG_HAVE_EEPROMFS must be set in config */
+#  define EEPROMFS_OFFSET     512
+#  define EEPROMFS_SIZE       7680
+#  define EEPROMFS_ENTRIES    16
+#  define EEPROMFS_SECTORSIZE 64
+
+
+#if CONFIG_HARDWARE_VARIANT == 100
+/* ---------- Hardware configuration: mbed LPC1768 ---------- */
+#  define HAVE_SD
+#  define SD_SUPPLY_VOLTAGE (1L<<21)
+#  define SPI_ON_SSP 0
+
+#  define SD_DETECT_PIN  25
+
+/* SSP 0, SD0-CS P0.16 */
+/* SD1: Detect P0.25, WP P0.26 */
+/* SD2: Not defined yet        */
+static inline void sdcard_interface_init(void) {
+  /* configure SD0-CS as output, high */
+  LPC_GPIO0->FIOSET  = BV(16);
+  LPC_GPIO0->FIODIR |= BV(16);
+
+  /* Connect SSP0 */
+  LPC_PINCON->PINSEL0 |= BV(31);        // SCK
+  LPC_PINCON->PINSEL1 |= BV(3) | BV(5); // MISO/MOSI
+
+  /* GPIOs are input-with-pullup by default, so Detect and WP "just work" */
+
+  /* Enable both rising and falling interrupt for change line */
+  LPC_GPIOINT->IO0IntEnR |= BV(SD_DETECT_PIN);
+  LPC_GPIOINT->IO0IntEnF |= BV(SD_DETECT_PIN);
+
+  /* Note: The GPIO interrupt is enabled in system_init_late */
+}
+
+static inline void sdcard_set_ss(int state) {
+  if (state)
+    LPC_GPIO0->FIOSET = BV(16);
+  else
+    LPC_GPIO0->FIOCLR = BV(16);
+}
+
+static inline uint8_t sdcard_detect(void) {
+  return !BITBAND(LPC_GPIO0->FIOPIN, SD_DETECT_PIN);
+}
+
+static inline uint8_t sdcard_wp(void) {
+  return BITBAND(LPC_GPIO0->FIOPIN, 26);
+}
+
+static inline uint8_t device_hw_address(void) {
+  return 8 + BITBAND(LPC_GPIO2->FIOPIN, 5) + 2*BITBAND(LPC_GPIO2->FIOPIN, 4);
+}
+
+#define HAVE_SD_LED
+
+static inline void leds_init(void) {
+  LPC_GPIO1->FIODIR |= BV(18) | BV(20) | BV(21) | BV(23);
+  LPC_GPIO1->FIOCLR  = BV(18) | BV(20) | BV(21) | BV(23);
+}
+
+static inline __attribute__((always_inline)) void set_busy_led(uint8_t state) {
+  if (state)
+    BITBAND(LPC_GPIO1->FIOSET, 18) = 1;
+  else
+    BITBAND(LPC_GPIO1->FIOCLR, 18) = 1;
+}
+
+static inline __attribute__((always_inline)) void set_dirty_led(uint8_t state) {
+  if (state)
+    BITBAND(LPC_GPIO1->FIOSET, 20) = 1;
+  else
+    BITBAND(LPC_GPIO1->FIOCLR, 20) = 1;
+}
+
+static inline __attribute__((always_inline)) void set_test_led(uint8_t state) {
+  if (state)
+    BITBAND(LPC_GPIO1->FIOSET, 21) = 1;
+  else
+    BITBAND(LPC_GPIO1->FIOCLR, 21) = 1;
+}
+
+static inline __attribute__((always_inline)) void set_sd_led(uint8_t state) {
+  if (state)
+    BITBAND(LPC_GPIO1->FIOSET, 23) = 1;
+  else
+    BITBAND(LPC_GPIO1->FIOCLR, 23) = 1;
+}
+
+static inline void toggle_dirty_led(void) {
+  BITBAND(LPC_GPIO1->FIOPIN, 20) = !BITBAND(LPC_GPIO1->FIOPIN, 20);
+}
+
+/* IEC input bits */
+#  define IEC_INPUT             LPC_GPIO0->FIOPIN
+#  define IEC_INPUTS_INVERTED
+#  define IEC_PIN_ATN           23
+#  define IEC_PIN_CLOCK         4
+#  define IEC_PIN_DATA          5
+#  define IEC_PIN_SRQ           24
+#  define IEC_TIMER_ATN         LPC_TIM3
+#  define IEC_TIMER_CLOCK       LPC_TIM2
+#  define IEC_TIMER_DATA        LPC_TIM2
+#  define IEC_TIMER_SRQ         LPC_TIM3
+#  define IEC_CAPTURE_ATN       0
+#  define IEC_CAPTURE_CLOCK     0
+#  define IEC_CAPTURE_DATA      1
+#  define IEC_CAPTURE_SRQ       1
+
+/* IEC output bits - must be EMR of the same timer used for input */
+/* optionally all lines can be on timer 2 (4 match registers) */
+#  define IEC_OUTPUTS_INVERTED
+#  define IEC_ALL_MATCHES_ON_TIMER2
+#  define IEC_OPIN_ATN          2
+#  define IEC_OPIN_CLOCK        0
+#  define IEC_OPIN_DATA         1
+#  define IEC_OPIN_SRQ          3
+#  define IEC_MATCH_ATN         MR2
+#  define IEC_MATCH_CLOCK       MR0
+#  define IEC_MATCH_DATA        MR1
+#  define IEC_MATCH_SRQ         MR3
+/* name the two IEC timers as A and B (simplifies initialisation), A is the main reference */
+/* Note: timer A is also used for timeouts */
+#  define IEC_TIMER_A           LPC_TIM2
+#  define IEC_TIMER_B           LPC_TIM3
+/* interrupts */
+#  define IEC_TIMER_A_IRQn      TIMER2_IRQn
+#  define IEC_TIMER_B_IRQn      TIMER3_IRQn
+#  define IEC_TIMER_A_HANDLER   TIMER2_IRQHandler
+#  define IEC_TIMER_B_HANDLER   TIMER3_IRQHandler
+/* LPC_SC->PCONP bits */
+#  define IEC_TIMER_A_PCONBIT   22
+#  define IEC_TIMER_B_PCONBIT   23
+/* PCLKSELx registers */
+#  define IEC_TIMER_A_PCLKREG   PCLKSEL1
+#  define IEC_TIMER_B_PCLKREG   PCLKSEL1
+/* PCLKSELx bits for 1:1 prescaler */
+#  define IEC_TIMER_A_PCLKBIT   12
+#  define IEC_TIMER_B_PCLKBIT   14
+
+/* timeout timer - one of the two remaining ones */
+#  define TIMEOUT_TIMER         LPC_TIM0
+#  define TIMEOUT_TIMER_PCONBIT 1
+#  define TIMEOUT_TIMER_PCLKREG PCLKSEL0
+#  define TIMEOUT_TIMER_PCLKBIT 2
+
+static inline void iec_pins_connect(void) {
+  /* Enable all capture and match pins of timer 2 */
+  LPC_PINCON->PINSEL0 |= 0b111111111111 << 8;
+
+  /* Enable capture pins of timer 3 */
+  LPC_PINCON->PINSEL1 |= 0b1111 << 14;
+}
+
+#  define BUTTON_NEXT           BV(3)
+#  define BUTTON_PREV           BV(2)
+
+static inline rawbutton_t buttons_read(void) {
+  return LPC_GPIO2->FIOPIN & (BUTTON_NEXT | BUTTON_PREV);
+}
+
+static inline void buttons_init(void) {
+  // None
+}
+
+#  define I2C_NUMBER          1
+#  define I2C_PCLKDIV         1
+#  define I2C_CLOCK           100000
+#  define I2C_EEPROM_ADDRESS  0xa0
+#  define I2C_EEPROM_SIZE     256
+#  define I2C_EEPROM_PAGESIZE 8
+
+static inline __attribute__((always_inline)) void i2c_pins_connect(void) {
+  /* I2C pins open drain */
+  LPC_PINCON->PINMODE_OD0 |= BV(0) | BV(1);
+  LPC_PINCON->PINSEL0     |= BV(0) | BV(1) | // SDA1
+                             BV(2) | BV(3);  // SCL1
+}
+
+#  define UART_NUMBER 0
+
+static inline __attribute__((always_inline)) void uart_pins_connect(void) {
+  /* use internal debug port on mbed */
+  LPC_PINCON->PINSEL0 |= BV(4) | BV(6);
+}
+
+#elif CONFIG_HARDWARE_VARIANT == 101
+/* ---------- Hardware configuration: arm2iec v1.x ---------- */
+#  define HAVE_SD
+#  define SD_SUPPLY_VOLTAGE (1L<<21)
+
+/* SSP 1, SD0-CS P0.6 */
+/* SD1: Detect P0.0, WP P0.1 */
+/* SD2: Not defined yet      */
+
+#  define SPI_ON_SSP 1
+#  define SD_DETECT_PIN  0
+#  define SD_WP_PIN      1
+#  define SD_CS_PIN      6
+
+static inline void sdcard_interface_init(void) {
+  /* configure SD0-CS as output, high */
+  LPC_GPIO0->FIOSET  = BV(SD_CS_PIN);
+  LPC_GPIO0->FIODIR |= BV(SD_CS_PIN);
+
+  /* Connect SSP1 */
+  LPC_PINCON->PINSEL0 |= BV(15) | BV(17) | BV(19); // SCK, MISO, MOSI
+
+  /* GPIOs are input-with-pullup by default, so Detect and WP "just work" */
+
+  /* Enable both rising and falling interrupt for change line */
+  LPC_GPIOINT->IO0IntEnR |= BV(SD_DETECT_PIN);
+  LPC_GPIOINT->IO0IntEnF |= BV(SD_DETECT_PIN);
+
+  /* Note: The GPIO interrupt is enabled in system_init_late */
+}
+
+static inline void sdcard_set_ss(int state) {
+  if (state)
+    LPC_GPIO0->FIOSET = BV(SD_CS_PIN);
+  else
+    LPC_GPIO0->FIOCLR = BV(SD_CS_PIN);
+}
+
+static inline uint8_t sdcard_detect(void) {
+  return !BITBAND(LPC_GPIO0->FIOPIN, SD_DETECT_PIN);
+}
+
+static inline uint8_t sdcard_wp(void) {
+  return BITBAND(LPC_GPIO0->FIOPIN, SD_WP_PIN);
+}
+
+static inline uint8_t device_hw_address(void) {
+  /* DIP switches are P4.29, P4.28, P2.26, P3.25 */
+  return 8 +   !BITBAND(LPC_GPIO4->FIOPIN, 29)
+           + 2*!BITBAND(LPC_GPIO4->FIOPIN, 28)
+           + 4*!BITBAND(LPC_GPIO3->FIOPIN, 26)
+           + 8*!BITBAND(LPC_GPIO3->FIOPIN, 25);
+}
+
+#define HAVE_SD_LED
+
+static inline void leds_init(void) {
+  /* 22 onboard red, 27 red, 28 yellow */
+  LPC_GPIO0->FIODIR |= BV(22) | BV(27) | BV(28);
+  LPC_GPIO0->FIOSET  =          BV(27) | BV(28);
+  LPC_GPIO0->FIOCLR  = BV(22);
+  /* green */
+  LPC_GPIO2->FIODIR |= BV(13);
+  LPC_GPIO2->FIOSET  = BV(13);
+}
+
+static inline __attribute__((always_inline)) void set_busy_led(uint8_t state) {
+  /* green */
+  if (state)
+    BITBAND(LPC_GPIO2->FIOCLR, 13) = 1;
+  else
+    BITBAND(LPC_GPIO2->FIOSET, 13) = 1;
+}
+
+static inline __attribute__((always_inline)) void set_dirty_led(uint8_t state) {
+  /* red */
+  if (state)
+    BITBAND(LPC_GPIO0->FIOCLR, 27) = 1;
+  else
+    BITBAND(LPC_GPIO0->FIOSET, 27) = 1;
+}
+
+static inline __attribute__((always_inline)) void set_test_led(uint8_t state) {
+  /* onboard red */
+  if (state)
+    BITBAND(LPC_GPIO0->FIOSET, 22) = 1;
+  else
+    BITBAND(LPC_GPIO0->FIOCLR, 22) = 1;
+}
+
+static inline __attribute__((always_inline)) void set_sd_led(uint8_t state) {
+  /* yellow */
+  if (state)
+    BITBAND(LPC_GPIO0->FIOCLR, 28) = 1;
+  else
+    BITBAND(LPC_GPIO0->FIOSET, 28) = 1;
+}
+
+static inline void toggle_dirty_led(void) {
+  BITBAND(LPC_GPIO0->FIOPIN, 27) = !BITBAND(LPC_GPIO0->FIOPIN, 27);
+}
+
+/* IEC input bits */
+#  define IEC_INPUT             LPC_GPIO1->FIOPIN
+#  define IEC_INPUTS_INVERTED
+#  define IEC_PIN_ATN           18
+#  define IEC_PIN_CLOCK         26
+#  define IEC_PIN_DATA          27
+#  define IEC_PIN_SRQ           19
+#  define IEC_TIMER_ATN         LPC_TIM1
+#  define IEC_TIMER_CLOCK       LPC_TIM0
+#  define IEC_TIMER_DATA        LPC_TIM0
+#  define IEC_TIMER_SRQ         LPC_TIM1
+#  define IEC_CAPTURE_ATN       0
+#  define IEC_CAPTURE_CLOCK     0
+#  define IEC_CAPTURE_DATA      1
+#  define IEC_CAPTURE_SRQ       1
+
+/* IEC output bits - must be EMR of the same timer used for input */
+/* optionally all lines can be on timer 2 (4 match registers) */
+#  define IEC_OPIN_ATN          0
+#  define IEC_OPIN_CLOCK        0
+#  define IEC_OPIN_DATA         1
+#  define IEC_OPIN_SRQ          1
+#  define IEC_MATCH_ATN         MR0
+#  define IEC_MATCH_CLOCK       MR0
+#  define IEC_MATCH_DATA        MR1
+#  define IEC_MATCH_SRQ         MR1
+/* name the two IEC timers as A and B (simplifies initialisation), A is the main reference */
+/* Note: timer A is also used for timeouts */
+#  define IEC_TIMER_A           LPC_TIM1
+#  define IEC_TIMER_B           LPC_TIM0
+/* interrupts */
+#  define IEC_TIMER_A_IRQn      TIMER1_IRQn
+#  define IEC_TIMER_B_IRQn      TIMER0_IRQn
+#  define IEC_TIMER_A_HANDLER   TIMER1_IRQHandler
+#  define IEC_TIMER_B_HANDLER   TIMER0_IRQHandler
+/* LPC_SC->PCONP bits */
+#  define IEC_TIMER_A_PCONBIT   2
+#  define IEC_TIMER_B_PCONBIT   1
+/* PCLKSELx registers */
+#  define IEC_TIMER_A_PCLKREG   PCLKSEL0
+#  define IEC_TIMER_B_PCLKREG   PCLKSEL0
+/* PCLKSELx bits for 1:1 prescaler */
+#  define IEC_TIMER_A_PCLKBIT   2
+#  define IEC_TIMER_B_PCLKBIT   4
+
+/* parallel cable */
+#  define HAVE_PARALLEL
+#  define PARALLEL_PGPIO        LPC_GPIO2
+#  define PARALLEL_POD          PINMODE_OD2
+#  define PARALLEL_PSTARTBIT    0           // start bit on port
+#  define PARALLEL_HGPIO        LPC_GPIO2
+#  define PARALLEL_HOD          PINMODE_OD2
+#  define PARALLEL_HSK_IN_BIT   8
+#  define PARALLEL_HSK_OUT_BIT  11
+#  define PARALLEL_HSK_ON_GPIO2
+
+
+/* timeout timer - one of the two remaining ones */
+#  define TIMEOUT_TIMER         LPC_TIM2
+#  define TIMEOUT_TIMER_PCONBIT 22
+#  define TIMEOUT_TIMER_PCLKREG PCLKSEL1
+#  define TIMEOUT_TIMER_PCLKBIT 12
+
+static inline void iec_pins_connect(void) {
+  /* Enable all capture and match pins of timers 0+1 */
+  LPC_PINCON->PINSEL3 |= 0b1111111111000011000011110000;
+}
+
+#  define BUTTON_NEXT           BV(24)
+#  define BUTTON_PREV           BV(22)  // GPIO0, shifted
+#  define BUTTON_MENU           BV(23)
+#  define BUTTON_SWAP           BV(21)
+
+static inline rawbutton_t buttons_read(void) {
+  return (LPC_GPIO1->FIOPIN & (BUTTON_NEXT | BUTTON_MENU | BUTTON_SWAP)) |
+        ((LPC_GPIO0->FIOPIN << 1) & BUTTON_PREV);
+}
+
+static inline void buttons_init(void) {
+  // None
+}
+
+#  define I2C_NUMBER          1
+#  define I2C_PCLKDIV         1
+#  define I2C_CLOCK           100000
+#  define I2C_EEPROM_ADDRESS  0xa0
+#  define I2C_EEPROM_SIZE     8192
+#  define I2C_EEPROM_PAGESIZE 32
+
+static inline __attribute__((always_inline)) void i2c_pins_connect(void) {
+  /* I2C pins open drain */
+  LPC_PINCON->PINMODE_OD0 |= BV(19) | BV(20);
+  LPC_PINCON->PINSEL1     |= BV(7) | BV(6) | // SDA1
+                             BV(9) | BV(8);  // SCL1
+}
+
+#  define UART_NUMBER 0
+
+static inline __attribute__((always_inline)) void uart_pins_connect(void) {
+  /* same port as the boot loader */
+  LPC_PINCON->PINSEL0 |= BV(4) | BV(6);
+}
+
+#else
+#  error "CONFIG_HARDWARE_VARIANT is unset or set to an unknown value."
+#endif
+
+
+/* ---------------- End of user-configurable options ---------------- */
+
+/* GPIO interrupt port-to-array-offset */
+#ifdef SD_CHANGE_ON_GPIO2
+#  define SD_CHANGE_GPIOINT 1
+#else
+#  define SD_CHANGE_GPIOINT 0
+#endif
+
+#ifdef PARALLEL_HSK_ON_GPIO2
+#  define PARALLEL_HSK_GPIOINT 1
+#else
+#  define PARALLEL_HSK_GPIOINT 0
+#endif
+
+/* Bit number to bit value, used in iec_bus_read() */
+#define IEC_BIT_ATN      BV(IEC_PIN_ATN)
+#define IEC_BIT_DATA     BV(IEC_PIN_DATA)
+#define IEC_BIT_CLOCK    BV(IEC_PIN_CLOCK)
+#define IEC_BIT_SRQ      BV(IEC_PIN_SRQ)
+
+/* Return type of iec_bus_read() */
+typedef uint32_t iec_bus_t;
+
+/* Shortcut input macros using the CM3 bitband feature */
+#ifdef IEC_INPUTS_INVERTED
+#  define IEC_IN_COND_INV(x) (!(x))
+#else
+#  define IEC_IN_COND_INV(x) (x)
+#endif
+
+#define IEC_ATN   IEC_IN_COND_INV(BITBAND(IEC_INPUT, IEC_PIN_ATN))
+#define IEC_CLOCK IEC_IN_COND_INV(BITBAND(IEC_INPUT, IEC_PIN_CLOCK))
+#define IEC_DATA  IEC_IN_COND_INV(BITBAND(IEC_INPUT, IEC_PIN_DATA))
+#define IEC_SRQ   IEC_IN_COND_INV(BITBAND(IEC_INPUT, IEC_PIN_SRQ))
+
+
+/* Generate match timer macros */
+#ifdef IEC_ALL_MATCHES_ON_TIMER2
+#  define IEC_MTIMER_ATN   LPC_TIM2
+#  define IEC_MTIMER_CLOCK LPC_TIM2
+#  define IEC_MTIMER_DATA  LPC_TIM2
+#  define IEC_MTIMER_SRQ   LPC_TIM2
+#else
+#  define IEC_MTIMER_ATN   IEC_TIMER_ATN
+#  define IEC_MTIMER_CLOCK IEC_TIMER_CLOCK
+#  define IEC_MTIMER_DATA  IEC_TIMER_DATA
+#  define IEC_MTIMER_SRQ   IEC_TIMER_SRQ
+#endif
+
+/* IEC output with bitband access */
+#ifdef IEC_OUTPUTS_INVERTED
+#  define COND_INV(x) (!(x))
+#else
+#  define COND_INV(x) (x)
+#endif
+
+static inline __attribute__((always_inline)) void set_atn(unsigned int state) {
+  if (COND_INV(state))
+    BITBAND(IEC_MTIMER_ATN->EMR, IEC_OPIN_ATN) = 1;
+  else
+    BITBAND(IEC_MTIMER_ATN->EMR, IEC_OPIN_ATN) = 0;
+}
+
+static inline __attribute__((always_inline)) void set_clock(unsigned int state) {
+  if (COND_INV(state))
+    BITBAND(IEC_MTIMER_CLOCK->EMR, IEC_OPIN_CLOCK) = 1;
+  else
+    BITBAND(IEC_MTIMER_CLOCK->EMR, IEC_OPIN_CLOCK) = 0;
+}
+
+static inline __attribute__((always_inline)) void set_data(unsigned int state) {
+  if (COND_INV(state))
+    BITBAND(IEC_MTIMER_DATA->EMR, IEC_OPIN_DATA) = 1;
+  else
+    BITBAND(IEC_MTIMER_DATA->EMR, IEC_OPIN_DATA) = 0;
+}
+
+static inline __attribute__((always_inline)) void set_srq(unsigned int state) {
+  if (COND_INV(state))
+    BITBAND(IEC_MTIMER_SRQ->EMR, IEC_OPIN_SRQ) = 1;
+  else
+    BITBAND(IEC_MTIMER_SRQ->EMR, IEC_OPIN_SRQ) = 0;
+}
+
+/* Enable/disable ATN interrupt */
+static inline __attribute__((always_inline)) void set_atn_irq(uint8_t state) {
+  if (state) {
+    IEC_TIMER_ATN->CCR |=   0b111 << (3 * IEC_CAPTURE_ATN);
+  } else {
+    IEC_TIMER_ATN->CCR &= ~(0b111 << (3 * IEC_CAPTURE_ATN));
+  }
+}
+
+/* Enable/disable CLOCK interrupt */
+static inline __attribute__((always_inline)) void set_clock_irq(uint8_t state) {
+  if (state) {
+    IEC_TIMER_CLOCK->CCR |=   0b111 << (3 * IEC_CAPTURE_CLOCK);
+  } else {
+    IEC_TIMER_CLOCK->CCR &= ~(0b111 << (3 * IEC_CAPTURE_CLOCK));
+  }
+}
+#define HAVE_CLOCK_IRQ
+
+#undef COND_INV
+
+#ifdef HAVE_PARALLEL
+static inline void parallel_init(void) {
+  /* set HSK_OUT to output, open drain, weak-high (pullup is default-on) */
+  PARALLEL_HGPIO->FIOPIN |= BV(PARALLEL_HSK_OUT_BIT);
+  PARALLEL_HGPIO->FIODIR |= BV(PARALLEL_HSK_OUT_BIT);
+  LPC_PINCON->PARALLEL_HOD |= BV(PARALLEL_HSK_OUT_BIT);
+  LPC_PINCON->PARALLEL_POD |= 0xff << PARALLEL_PSTARTBIT;
+
+# ifdef PARALLEL_HSK_ON_GPIO2
+  LPC_GPIOINT->IO2IntEnF |= BV(PARALLEL_HSK_IN_BIT);
+# else
+  LPC_GPIOINT->IO0IntEnF |= BV(PARALLEL_HSK_IN_BIT);
+# endif
+}
+#else
+static inline void parallel_init(void) {}
+#endif
+
+/* Display interrupt request line */
+// FIXME2: Init function!
+static inline void display_intrq_init(void) {
+}
+
+// FIXME: Define and add!
+static inline unsigned int display_intrq_active(void) {
+  return 0;
+}
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/arch-eeprom.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/arch-eeprom.c
new file mode 100644
index 00000000..e03db6ec
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/arch-eeprom.c
@@ -0,0 +1,141 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   arch-eeprom.c: EEPROM access functions
+
+*/
+
+#include "config.h"
+#include <arm/NXP/LPC17xx/LPC17xx.h>
+#include "i2c.h"
+#include "arch-eeprom.h"
+
+#if I2C_EEPROM_SIZE > 256
+#  define EEPROM_ADDR_BYTES 2
+#  define EEPROM_ADDR_MASK  0xffff
+#else
+#  define EEPROM_ADDR_BYTES 1
+#  define EEPROM_ADDR_MASK  0xff
+#endif
+
+static uint8_t addrbuf[EEPROM_ADDR_BYTES];
+static i2cblock_t data_block;
+static i2cblock_t addr_block = {
+  EEPROM_ADDR_BYTES, &addrbuf, &data_block
+};
+
+/* set address byte(s) in addr_block */
+static void set_address(uint16_t addr) {
+  if (EEPROM_ADDR_BYTES == 2) {
+    addrbuf[0] = (addr & 0xff00) >> 8;
+    addrbuf[1] = addr & 0xff;
+  } else {
+    addrbuf[0] = addr & 0xff;
+  }
+}
+
+/* converts from a pointer to an address in the EEPROM */
+static uint16_t convert_address(void *a) {
+  unsigned int addr = (unsigned int)a & EEPROM_ADDR_MASK;
+
+  return addr;
+}
+
+static void wait_write_finish(void) {
+  /* try reading until the chip responds */
+  uint8_t dummy;
+
+  data_block.length = 1;
+  data_block.data = &dummy;
+  while (i2c_read_blocks(I2C_EEPROM_ADDRESS, &addr_block, 1)) ;
+}
+
+uint8_t eeprom_read_byte(void *addr) {
+  uint8_t val;
+
+  set_address(convert_address(addr));
+  data_block.data   = &val;
+  data_block.length = 1;
+  i2c_read_blocks(I2C_EEPROM_ADDRESS, &addr_block, 1);
+
+  return val;
+}
+
+uint16_t eeprom_read_word(void *addr) {
+  uint16_t val;
+
+  set_address(convert_address(addr));
+  data_block.data   = &val;
+  data_block.length = 2;
+  i2c_read_blocks(I2C_EEPROM_ADDRESS, &addr_block, 1);
+
+  return val;
+}
+
+void eeprom_read_block(void *destptr, void *addr, unsigned int length) {
+  set_address(convert_address(addr));
+
+  data_block.length = length;
+  data_block.data   = destptr;
+  i2c_read_blocks(I2C_EEPROM_ADDRESS, &addr_block, 1);
+}
+
+void eeprom_write_byte(void *addr, uint8_t value) {
+  set_address(convert_address(addr));
+
+  data_block.data   = &value;
+  data_block.length = 1;
+  i2c_write_blocks(I2C_EEPROM_ADDRESS, &addr_block);
+
+  wait_write_finish();
+}
+
+void eeprom_write_word(void *addr, uint16_t value) {
+  eeprom_write_block(&value, addr, 2);
+}
+
+void eeprom_write_block(void *srcptr, void *addr, unsigned int length) {
+  uint16_t address = convert_address(addr);
+  uint8_t *srcbuf = srcptr;
+
+  /* write data without crossing page boundaries */
+  while (length > 0) {
+    unsigned int curlen;
+
+    /* limit to the current page */
+    if (((address & (I2C_EEPROM_PAGESIZE - 1)) + length ) >= I2C_EEPROM_PAGESIZE) {
+      curlen = I2C_EEPROM_PAGESIZE - (address & (I2C_EEPROM_PAGESIZE - 1));
+    } else {
+      curlen = length;
+    }
+
+    set_address(address);
+    data_block.data   = srcbuf;
+    data_block.length = curlen;
+
+    i2c_write_blocks(I2C_EEPROM_ADDRESS, &addr_block);
+    wait_write_finish();
+
+    address += curlen;
+    srcbuf  += curlen;
+    length  -= curlen;
+  }
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/arch-eeprom.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/arch-eeprom.h
new file mode 100644
index 00000000..a6b5f850
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/arch-eeprom.h
@@ -0,0 +1,42 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   arch-eeprom.h: EEPROM access functions
+
+*/
+
+#ifndef ARCH_EEPROM_H
+#define ARCH_EEPROM_H
+
+/* EEPROM structure hack, section is mapped to 0x80000000 in the linker script */
+#define EEMEM __attribute__((section(".eeprom")))
+
+/* No safety required */
+#define eeprom_safety() do {} while (0)
+
+uint8_t  eeprom_read_byte(void *addr);
+uint16_t eeprom_read_word(void *addr);
+void     eeprom_read_block(void *destptr, void *addr, unsigned int length);
+void     eeprom_write_byte(void *addr, uint8_t value);
+void     eeprom_write_word(void *addr, uint16_t value);
+void     eeprom_write_block(void *srcptr, void *addr, unsigned int length);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/arch-timer.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/arch-timer.c
new file mode 100644
index 00000000..a8895042
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/arch-timer.c
@@ -0,0 +1,140 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   arch-timer.c: Architecture-specific timer functions
+
+*/
+
+#include "config.h"
+#include <arm/NXP/LPC17xx/LPC17xx.h>
+#include <arm/bits.h>
+#include "timer.h"
+
+/* bit definitions */
+#define RITINT 0
+#define RITEN  3
+#define PCRIT 16
+
+void timer_init(void) {
+  /* turn on power to RIT */
+  BITBAND(LPC_SC->PCONP, PCRIT) = 1;
+
+  /* clear RIT mask */
+  LPC_RIT->RIMASK = 0; //xffffffff;
+
+  /* PCLK = CCLK */
+  BITBAND(LPC_SC->PCLKSEL1, 26) = 1;
+
+  /* enable SysTick */
+  SysTick_Config(SysTick->CALIB & SysTick_CALIB_TENMS_Msk);
+
+  /*** set up IEC timers to count microseconds ***/
+
+  /* enable power to timers */
+  BITBAND(LPC_SC->PCONP, IEC_TIMER_A_PCONBIT)   = 1;
+  BITBAND(LPC_SC->PCONP, IEC_TIMER_B_PCONBIT)   = 1;
+  BITBAND(LPC_SC->PCONP, TIMEOUT_TIMER_PCONBIT) = 1;
+
+  /* Use full 100MHz clock */
+  BITBAND(LPC_SC->IEC_TIMER_A_PCLKREG, IEC_TIMER_A_PCLKBIT)     = 1;
+  BITBAND(LPC_SC->IEC_TIMER_B_PCLKREG, IEC_TIMER_B_PCLKBIT)     = 1;
+  BITBAND(LPC_SC->TIMEOUT_TIMER_PCLKREG, TIMEOUT_TIMER_PCLKBIT) = 1;
+
+  /* keep timers reset */
+  BITBAND(IEC_TIMER_A->TCR, 1)   = 1;
+  BITBAND(IEC_TIMER_B->TCR, 1)   = 1;
+  BITBAND(TIMEOUT_TIMER->TCR, 1) = 1;
+
+  /* prescale 100MHz down to 10 */
+  IEC_TIMER_A->PR   = 10-1;
+  IEC_TIMER_B->PR   = 10-1;
+  TIMEOUT_TIMER->PR = 10-1;
+
+  /* enable all capture interrupts for IEC */
+  IEC_TIMER_A->CCR = 0b100100;
+  IEC_TIMER_B->CCR = 0b100100;
+
+  /* Move timers out of reset */
+  BITBAND(IEC_TIMER_A->TCR, 1)   = 0;
+  BITBAND(IEC_TIMER_B->TCR, 1)   = 0;
+  BITBAND(TIMEOUT_TIMER->TCR, 1) = 0;
+
+  /* stop timeout-timer on match */
+  BITBAND(TIMEOUT_TIMER->MCR, 2) = 1; // MR0S - stop timer on match
+
+  /* Enable timers */
+  BITBAND(IEC_TIMER_A->TCR, 0)   = 1;
+  BITBAND(IEC_TIMER_B->TCR, 0)   = 1;
+  BITBAND(TIMEOUT_TIMER->TCR, 0) = 1;
+
+  /* enable interrupts for the IEC timers */
+  NVIC_EnableIRQ(IEC_TIMER_A_IRQn);
+  NVIC_EnableIRQ(IEC_TIMER_B_IRQn);
+}
+
+void delay_us(unsigned int time) {
+  /* Prepare RIT */
+  LPC_RIT->RICOUNTER = 0;
+  LPC_RIT->RICOMPVAL = (CONFIG_MCU_FREQ / 1000000) * time;
+  LPC_RIT->RICTRL    = BV(RITEN) | BV(RITINT);
+
+  /* Wait until RIT signals an interrupt */
+  while (!(BITBAND(LPC_RIT->RICTRL, RITINT))) ;
+
+  /* Disable RIT */
+  LPC_RIT->RICTRL = 0;
+}
+
+void delay_ms(unsigned int time) {
+  /* Prepare RIT */
+  LPC_RIT->RICOUNTER = 0;
+  LPC_RIT->RICTRL    = BV(RITEN) | BV(RITINT);
+  LPC_RIT->RICOMPVAL = (CONFIG_MCU_FREQ / 1000) * time;
+
+  /* Wait until RIT signals an interrupt */
+  while (!(BITBAND(LPC_RIT->RICTRL, RITINT))) ;
+
+  /* Disable RIT */
+  LPC_RIT->RICTRL = 0;
+}
+
+/**
+ * start_timeout - start a timeout
+ * @usecs: number of microseconds before timeout
+ *
+ * This function sets up a timer so it times out after the specified
+ * number of microseconds.
+ */
+void start_timeout(unsigned int usecs) {
+  TIMEOUT_TIMER->TC  = 0;
+  TIMEOUT_TIMER->MR0 = usecs*10;
+  BITBAND(TIMEOUT_TIMER->TCR, 0) = 1; // start timer
+}
+
+/**
+ * has_timed_out - returns true if timeout was reached
+ *
+ * This function returns true if the timer started by start_timeout
+ * has reached its timeout value.
+ */
+unsigned int has_timed_out(void) {
+  return !BITBAND(TIMEOUT_TIMER->TCR, 0);
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/arch-timer.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/arch-timer.h
new file mode 100644
index 00000000..c61c29a2
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/arch-timer.h
@@ -0,0 +1,43 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   arch-timer.h: Architecture-specific system timer definitions
+
+*/
+
+#ifndef ARCH_TIMER_H
+#define ARCH_TIMER_H
+
+/* Types for unsigned and signed tick values */
+typedef uint32_t tick_t;
+typedef int32_t stick_t;
+
+/* Delay functions */
+// FIXME: Is delay_us accurate enough as function?
+void delay_us(unsigned int time);
+void delay_ms(unsigned int time);
+
+/* Timeout functions */
+// FIXME: Accurate enough as function?
+void start_timeout(unsigned int usecs);
+unsigned int has_timed_out(void);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/atomic.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/atomic.h
new file mode 100644
index 00000000..2c512731
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/atomic.h
@@ -0,0 +1,311 @@
+/* Copyright (c) 2007 Dean Camera
+   All rights reserved.
+
+   Adapted for Cortex-M3 by Ingo Korb
+
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+
+   * Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+
+   * Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in
+     the documentation and/or other materials provided with the
+     distribution.
+
+   * Neither the name of the copyright holders nor the names of
+     contributors may be used to endorse or promote products derived
+     from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+  POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/* $Id: atomic.h,v 1.3 2007/12/20 14:17:56 joerg_wunsch Exp $ */
+
+#ifndef _UTIL_ATOMIC_H_
+#define _UTIL_ATOMIC_H_ 1
+
+#if !defined(__DOXYGEN__)
+/* Internal helper functions. */
+static __inline__ unsigned int __iSeiRetVal(void)
+{
+    asm volatile("cpsie i");
+    return 1;
+}
+
+static __inline__ unsigned int __iCliRetVal(void)
+{
+    asm volatile("cpsid i");
+    return 1;
+}
+
+static __inline__ void __iSeiParam(const unsigned int *__s)
+{
+    __asm__ volatile ("cpsie i" ::: "memory");
+    (void)__s;
+}
+
+static __inline__ void __iCliParam(const unsigned int *__s)
+{
+    __asm__ volatile ("cpsid i" ::: "memory");
+    (void)__s;
+}
+
+static __inline__ void __iRestore(const unsigned int *__s)
+{
+    unsigned int s = *__s;
+    __asm__ volatile ("MSR primask, %0" :: "r" (s) : "memory");
+}
+
+static __inline__ unsigned int __get_primask(void)
+{
+    unsigned int mask = 0;
+
+    __asm__ volatile ("MRS %0, primask" : "=r" (mask) );
+    return mask;
+}
+#endif	/* !__DOXYGEN__ */
+
+/** \file */
+/** \defgroup util_atomic <util/atomic.h> Atomically and Non-Atomically Executed Code Blocks
+
+    \code
+    #include <util/atomic.h>
+    \endcode
+
+    \note The macros in this header file require the ISO/IEC 9899:1999
+    ("ISO C99") feature of for loop variables that are declared inside
+    the for loop itself.  For that reason, this header file can only
+    be used if the standard level of the compiler (option --std=) is
+    set to either \c c99 or \c gnu99.
+
+    The macros in this header file deal with code blocks that are
+    guaranteed to be excuted Atomically or Non-Atmomically.  The term
+    "Atomic" in this context refers to the unability of the respective
+    code to be interrupted.
+
+    These macros operate via automatic manipulation of the Global
+    Interrupt Status (I) bit of the SREG register. Exit paths from
+    both block types are all managed automatically without the need
+    for special considerations, i. e. the interrupt status will be
+    restored to the same value it has been when entering the
+    respective block.
+
+    A typical example that requires atomic access is a 16 (or more)
+    bit variable that is shared between the main execution path and an
+    ISR.  While declaring such a variable as volatile ensures that the
+    compiler will not optimize accesses to it away, it does not
+    guarantee atomic access to it.  Assuming the following example:
+
+    \code
+#include <inttypes.h>
+#include <avr/interrupt.h>
+#include <avr/io.h>
+
+volatile uint16_t ctr;
+
+ISR(TIMER1_OVF_vect)
+{
+  ctr--;
+}
+
+...
+int
+main(void)
+{
+   ...
+   ctr = 0x200;
+   start_timer();
+   while (ctr != 0)
+     // wait
+       ;
+   ...
+}
+    \endcode
+
+    There is a chance where the main context will exit its wait loop
+    when the variable \c ctr just reached the value 0xFF.  This happens
+    because the compiler cannot natively access a 16-bit variable
+    atomically in an 8-bit CPU.  So the variable is for example at
+    0x100, the compiler then tests the low byte for 0, which succeeds.
+    It then proceeds to test the high byte, but that moment the ISR
+    triggers, and the main context is interrupted.  The ISR will
+    decrement the variable from 0x100 to 0xFF, and the main context
+    proceeds.  It now tests the high byte of the variable which is
+    (now) also 0, so it concludes the variable has reached 0, and
+    terminates the loop.
+
+    Using the macros from this header file, the above code can be
+    rewritten like:
+
+    \code
+#include <inttypes.h>
+#include <avr/interrupt.h>
+#include <avr/io.h>
+#include <util/atomic.h>
+
+volatile uint16_t ctr;
+
+ISR(TIMER1_OVF_vect)
+{
+  ctr--;
+}
+
+...
+int
+main(void)
+{
+   ...
+   ctr = 0x200;
+   start_timer();
+   sei();
+   uint16_t ctr_copy;
+   do
+   {
+     ATOMIC_BLOCK(ATOMIC_FORCEON)
+     {
+       ctr_copy = ctr;
+     }
+   }
+   while (ctr_copy != 0);
+   ...
+}
+    \endcode
+
+    This will install the appropriate interrupt protection before
+    accessing variable \c ctr, so it is guaranteed to be consistently
+    tested.  If the global interrupt state were uncertain before
+    entering the ATOMIC_BLOCK, it should be executed with the
+    parameter ATOMIC_RESTORESTATE rather than ATOMIC_FORCEON.
+
+*/
+
+/** \def ATOMIC_BLOCK(type)
+    \ingroup util_atomic
+
+    Creates a block of code that is guaranteed to be executed
+    atomically. Upon entering the block the Global Interrupt Status
+    flag in SREG is disabled, and re-enabled upon exiting the block
+    from any exit path.
+
+    Two possible macro parameters are permitted, ATOMIC_RESTORESTATE
+    and ATOMIC_FORCEON.
+*/
+#if defined(__DOXYGEN__)
+#define ATOMIC_BLOCK(type)
+#else
+#define ATOMIC_BLOCK(type) for ( type, __ToDo = __iCliRetVal(); \
+	                       __ToDo ; __ToDo = 0 )
+#endif	/* __DOXYGEN__ */
+
+/** \def NONATOMIC_BLOCK(type)
+    \ingroup util_atomic
+
+    Creates a block of code that is executed non-atomically. Upon
+    entering the block the Global Interrupt Status flag in SREG is
+    enabled, and disabled upon exiting the block from any exit
+    path. This is useful when nested inside ATOMIC_BLOCK sections,
+    allowing for non-atomic execution of small blocks of code while
+    maintaining the atomic access of the other sections of the parent
+    ATOMIC_BLOCK.
+
+    Two possible macro parameters are permitted,
+    NONATOMIC_RESTORESTATE and NONATOMIC_FORCEOFF.
+*/
+#if defined(__DOXYGEN__)
+#define NONATOMIC_BLOCK(type)
+#else
+#define NONATOMIC_BLOCK(type) for ( type, __ToDo = __iSeiRetVal(); \
+	                          __ToDo ;  __ToDo = 0 )
+#endif	/* __DOXYGEN__ */
+
+/** \def ATOMIC_RESTORESTATE
+    \ingroup util_atomic
+
+    This is a possible parameter for ATOMIC_BLOCK. When used, it will
+    cause the ATOMIC_BLOCK to restore the previous state of the SREG
+    register, saved before the Global Interrupt Status flag bit was
+    disabled. The net effect of this is to make the ATOMIC_BLOCK's
+    contents guaranteed atomic, without changing the state of the
+    Global Interrupt Status flag when execution of the block
+    completes.
+*/
+#if defined(__DOXYGEN__)
+#define ATOMIC_RESTORESTATE
+#else
+#define ATOMIC_RESTORESTATE unsigned int sreg_save \
+        __attribute__((__cleanup__(__iRestore))) = __get_primask()
+#endif	/* __DOXYGEN__ */
+
+/** \def ATOMIC_FORCEON
+    \ingroup util_atomic
+
+    This is a possible parameter for ATOMIC_BLOCK. When used, it will
+    cause the ATOMIC_BLOCK to force the state of the SREG register on
+    exit, enabling the Global Interrupt Status flag bit. This saves on
+    flash space as the previous value of the SREG register does not
+    need to be saved at the start of the block.
+
+    Care should be taken that ATOMIC_FORCEON is only used when it is
+    known that interrupts are enabled before the block's execution or
+    when the side effects of enabling global interrupts at the block's
+    completion are known and understood.
+*/
+#if defined(__DOXYGEN__)
+#define ATOMIC_FORCEON
+#else
+#define ATOMIC_FORCEON unsigned int sreg_save \
+	__attribute__((__cleanup__(__iSeiParam))) = 0
+#endif	/* __DOXYGEN__ */
+
+/** \def NONATOMIC_RESTORESTATE
+    \ingroup util_atomic
+
+    This is a possible parameter for NONATOMIC_BLOCK. When used, it
+    will cause the NONATOMIC_BLOCK to restore the previous state of
+    the SREG register, saved before the Global Interrupt Status flag
+    bit was enabled. The net effect of this is to make the
+    NONATOMIC_BLOCK's contents guaranteed non-atomic, without changing
+    the state of the Global Interrupt Status flag when execution of
+    the block completes.
+*/
+#if defined(__DOXYGEN__)
+#define NONATOMIC_RESTORESTATE
+#else
+#define NONATOMIC_RESTORESTATE unsigned int sreg_save \
+         __attribute__((__cleanup__(__iRestore))) = __get_primask()
+#endif	/* __DOXYGEN__ */
+
+/** \def NONATOMIC_FORCEOFF
+    \ingroup util_atomic
+
+    This is a possible parameter for NONATOMIC_BLOCK. When used, it
+    will cause the NONATOMIC_BLOCK to force the state of the SREG
+    register on exit, disabling the Global Interrupt Status flag
+    bit. This saves on flash space as the previous value of the SREG
+    register does not need to be saved at the start of the block.
+
+    Care should be taken that NONATOMIC_FORCEOFF is only used when it
+    is known that interrupts are disabled before the block's execution
+    or when the side effects of disabling global interrupts at the
+    block's completion are known and understood.
+*/
+#if defined(__DOXYGEN__)
+#define NONATOMIC_FORCEOFF
+#else
+#define NONATOMIC_FORCEOFF unsigned int sreg_save \
+	__attribute__((__cleanup__(__iCliParam))) = 0
+#endif	/* __DOXYGEN__ */
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/bootinfo.S b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/bootinfo.S
new file mode 100644
index 00000000..3b888000
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/bootinfo.S
@@ -0,0 +1,12 @@
+/* LPC176x SD boot loader info block
+ *
+ * Written 2012 by Ingo Korb, no copyright claimed
+ */
+#include "asmconfig.h"
+
+        .syntax unified
+
+        /* this is an empty info block, it will be filled by an external script */
+        .word   0xffffffff         /* CONFIG_BOOT_DEVID */
+        .short  0xffff             /* BOOT_VERSION      */
+        .short  0xffff             /* CRC16 CCITT       */
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/crc.S b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/crc.S
new file mode 100644
index 00000000..b1de222c
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/crc.S
@@ -0,0 +1,135 @@
+/* CRC-7/CRC-16 (XModem and standard) implementation for Cortex M3
+ *
+ * Written 2010 by Ingo Korb, no copyright claimed
+ */
+
+        .syntax unified
+        .section .text
+
+        /* uint8_t crc7update(uint8_t crc, const uint8_t data) */
+        .global crc7update
+        .thumb_func
+crc7update:
+        mov     r2, #8          // number of bits to process
+        lsl     r1, r1, #24     // pre-shift data byte to top of word
+
+loop:
+        lsl     r0, r0, #1      // shift CRC
+        lsls    r1, r1, #1      // shift data byte (highest bit now in C)
+        bcc     0f              // jump if bit was 0
+        eor     r0, r0, #0x80   // invert top bit of CRC if not
+0:      tst     r0, #0x80       // test top bit of CRC
+        beq     1f              // skip if top bit is clear
+        eor     r0, r0, #0x09   // apply polinomial
+1:      subs    r2, r2, #1      // decrememt bit cointer
+        bne     loop            // loop for next bit
+        uxtb    r0, r0          // clear top bits of result
+        bx      lr              // return
+
+
+        /* uint16_t crc_xmodem_block(uint16_t crc, uint8_t *data, uint32_t len) */
+        .global crc_xmodem_block
+        .thumb_func
+crc_xmodem_block:
+        adr     r12, crc_xmodem_table // load address of crc table
+blockloop:
+        ldrb.w  r3, [r1], #1          // read data byte
+        eor     r3,  r3, r0, lsr #8   // EOR data byte
+        ldrh    r3, [r12, r3, lsl #1] // load value from CRC table
+        eor     r0,  r3, r0, lsl #8   // update CRC
+        uxth    r0, r0                // clear top bits of result
+        subs    r2, r2, #1            // decrement length
+        bne     blockloop             // loop while length > 0
+        bx      lr                    // return
+
+        /* uint16_t crc_xmodem_update(uint16_t crc, uint8_t data) */
+        .global crc_xmodem_update
+        .thumb_func
+crc_xmodem_update:
+        adr     r2, crc_xmodem_table // load address of crc table
+        eor     r1,  r1, r0, lsr #8  // EOR data byte
+        ldrh    r3, [r2, r1, lsl #1] // load value from CRC table
+        eor     r0,  r3, r0, lsl #8  // update CRC
+        uxth    r0, r0               // clear top bits of result
+        bx      lr                   // return
+
+        /* uint16_t crc16_update(uint16_t crc, uint8_t data) */
+        .global crc16_update
+        .thumb_func
+crc16_update:
+        adr     r2, crc16_table      // load address of crc table
+        eor     r1,  r1, r0          // EOR data byte
+        uxtb    r1,  r1              // clear upper bits
+        ldrh    r3, [r2, r1, lsl #1] // load value from CRC table
+        eor     r0,  r3, r0, lsr #8  // update CRC
+        bx      lr                   // return
+
+crc_xmodem_table:
+        .short 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7
+        .short 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef
+        .short 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6
+        .short 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de
+        .short 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485
+        .short 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d
+        .short 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4
+        .short 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc
+        .short 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823
+        .short 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b
+        .short 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12
+        .short 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a
+        .short 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41
+        .short 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49
+        .short 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70
+        .short 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78
+        .short 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f
+        .short 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067
+        .short 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e
+        .short 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256
+        .short 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d
+        .short 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405
+        .short 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c
+        .short 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634
+        .short 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab
+        .short 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3
+        .short 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a
+        .short 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92
+        .short 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9
+        .short 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1
+        .short 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8
+        .short 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
+
+crc16_table:
+        .short 0x0000, 0xc0c1, 0xc181, 0x0140, 0xc301, 0x03c0, 0x0280, 0xc241
+        .short 0xc601, 0x06c0, 0x0780, 0xc741, 0x0500, 0xc5c1, 0xc481, 0x0440
+        .short 0xcc01, 0x0cc0, 0x0d80, 0xcd41, 0x0f00, 0xcfc1, 0xce81, 0x0e40
+        .short 0x0a00, 0xcac1, 0xcb81, 0x0b40, 0xc901, 0x09c0, 0x0880, 0xc841
+        .short 0xd801, 0x18c0, 0x1980, 0xd941, 0x1b00, 0xdbc1, 0xda81, 0x1a40
+        .short 0x1e00, 0xdec1, 0xdf81, 0x1f40, 0xdd01, 0x1dc0, 0x1c80, 0xdc41
+        .short 0x1400, 0xd4c1, 0xd581, 0x1540, 0xd701, 0x17c0, 0x1680, 0xd641
+        .short 0xd201, 0x12c0, 0x1380, 0xd341, 0x1100, 0xd1c1, 0xd081, 0x1040
+        .short 0xf001, 0x30c0, 0x3180, 0xf141, 0x3300, 0xf3c1, 0xf281, 0x3240
+        .short 0x3600, 0xf6c1, 0xf781, 0x3740, 0xf501, 0x35c0, 0x3480, 0xf441
+        .short 0x3c00, 0xfcc1, 0xfd81, 0x3d40, 0xff01, 0x3fc0, 0x3e80, 0xfe41
+        .short 0xfa01, 0x3ac0, 0x3b80, 0xfb41, 0x3900, 0xf9c1, 0xf881, 0x3840
+        .short 0x2800, 0xe8c1, 0xe981, 0x2940, 0xeb01, 0x2bc0, 0x2a80, 0xea41
+        .short 0xee01, 0x2ec0, 0x2f80, 0xef41, 0x2d00, 0xedc1, 0xec81, 0x2c40
+        .short 0xe401, 0x24c0, 0x2580, 0xe541, 0x2700, 0xe7c1, 0xe681, 0x2640
+        .short 0x2200, 0xe2c1, 0xe381, 0x2340, 0xe101, 0x21c0, 0x2080, 0xe041
+        .short 0xa001, 0x60c0, 0x6180, 0xa141, 0x6300, 0xa3c1, 0xa281, 0x6240
+        .short 0x6600, 0xa6c1, 0xa781, 0x6740, 0xa501, 0x65c0, 0x6480, 0xa441
+        .short 0x6c00, 0xacc1, 0xad81, 0x6d40, 0xaf01, 0x6fc0, 0x6e80, 0xae41
+        .short 0xaa01, 0x6ac0, 0x6b80, 0xab41, 0x6900, 0xa9c1, 0xa881, 0x6840
+        .short 0x7800, 0xb8c1, 0xb981, 0x7940, 0xbb01, 0x7bc0, 0x7a80, 0xba41
+        .short 0xbe01, 0x7ec0, 0x7f80, 0xbf41, 0x7d00, 0xbdc1, 0xbc81, 0x7c40
+        .short 0xb401, 0x74c0, 0x7580, 0xb541, 0x7700, 0xb7c1, 0xb681, 0x7640
+        .short 0x7200, 0xb2c1, 0xb381, 0x7340, 0xb101, 0x71c0, 0x7080, 0xb041
+        .short 0x5000, 0x90c1, 0x9181, 0x5140, 0x9301, 0x53c0, 0x5280, 0x9241
+        .short 0x9601, 0x56c0, 0x5780, 0x9741, 0x5500, 0x95c1, 0x9481, 0x5440
+        .short 0x9c01, 0x5cc0, 0x5d80, 0x9d41, 0x5f00, 0x9fc1, 0x9e81, 0x5e40
+        .short 0x5a00, 0x9ac1, 0x9b81, 0x5b40, 0x9901, 0x59c0, 0x5880, 0x9841
+        .short 0x8801, 0x48c0, 0x4980, 0x8941, 0x4b00, 0x8bc1, 0x8a81, 0x4a40
+        .short 0x4e00, 0x8ec1, 0x8f81, 0x4f40, 0x8d01, 0x4dc0, 0x4c80, 0x8c41
+        .short 0x4400, 0x84c1, 0x8581, 0x4540, 0x8701, 0x47c0, 0x4680, 0x8641
+        .short 0x8201, 0x42c0, 0x4380, 0x8341, 0x4100, 0x81c1, 0x8081, 0x4040
+
+        .end
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/crc.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/crc.h
new file mode 100644
index 00000000..a2429090
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/crc.h
@@ -0,0 +1,34 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   crc.h: Definitions for CRC calculation routines (ARM version)
+
+*/
+
+#ifndef CRC_H
+#define CRC_H
+
+uint8_t crc7update(uint8_t crc, uint8_t data);
+uint16_t crc_xmodem_update(uint16_t crc, uint8_t data);
+uint16_t crc_xmodem_block(uint16_t crc, const uint8_t *data, uint32_t length);
+uint16_t crc16_update(uint16_t crc, uint8_t data);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/fastloader-ll.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/fastloader-ll.c
new file mode 100644
index 00000000..98ca334b
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/fastloader-ll.c
@@ -0,0 +1,1133 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   fastloader-ll.c: C implementation of low-level fastloader code
+
+*/
+
+#include "config.h"
+#include <arm/NXP/LPC17xx/LPC17xx.h>
+#include <arm/bits.h>
+#include "fastloader.h"
+#include "iec-bus.h"
+#include "system.h"
+#include "timer.h"
+#include "fastloader-ll.h"
+
+#define ATNABORT 1
+#define NO_ATNABORT 0
+
+#define WAIT 1
+#define NO_WAIT 0
+
+#ifdef IEC_OUTPUTS_INVERTED
+#  define EMR_LOW  2
+#  define EMR_HIGH 1
+#else
+#  define EMR_LOW  1
+#  define EMR_HIGH 2
+#endif
+
+typedef struct {
+  uint32_t pairtimes[4];
+  uint8_t  clockbits[4];
+  uint8_t  databits[4];
+  uint8_t  eorvalue;
+} generic_2bit_t;
+
+static uint32_t reference_time;
+static uint32_t timer_a_ccr, timer_b_ccr;
+
+/* ---------- utility functions ---------- */
+
+static void fastloader_setup(void) {
+  /*** set up timer A+B to count synchronized 100ns-units ***/
+
+  /* Reset timers */
+  BITBAND(IEC_TIMER_A->TCR, 1) = 1;
+  BITBAND(IEC_TIMER_B->TCR, 1) = 1;
+
+  /* Move both timers out of reset */
+  BITBAND(IEC_TIMER_A->TCR, 1) = 0;
+  BITBAND(IEC_TIMER_B->TCR, 1) = 0;
+
+  /* compensate for timer B offset */
+  //FIXME: Values are wrong for 10MHz timers
+  //LPC_TIM2->PC = 0;
+  //LPC_TIM3->PC = 22;
+
+  /* disable IEC interrupts */
+  NVIC_DisableIRQ(IEC_TIMER_A_IRQn);
+  NVIC_DisableIRQ(IEC_TIMER_B_IRQn);
+
+  /* Clear all capture/match functions except interrupts */
+  timer_a_ccr = IEC_TIMER_A->CCR;
+  timer_b_ccr = IEC_TIMER_B->CCR;
+  IEC_TIMER_A->CCR = 0b100100;
+  IEC_TIMER_B->CCR = 0b100100;
+  IEC_TIMER_A->MCR = 0b001001001001;
+  IEC_TIMER_B->MCR = 0b001001001001;
+
+  /* Enable both timers */
+  BITBAND(IEC_TIMER_A->TCR, 0) = 1;
+  BITBAND(IEC_TIMER_B->TCR, 0) = 1;
+}
+
+static void fastloader_teardown(void) {
+  /* Reenable stop-on-match for timer A */
+  BITBAND(IEC_TIMER_A->MCR, 2) = 1;
+
+  /* Reset all match conditions */
+  IEC_TIMER_A->EMR &= 0b1111;
+  IEC_TIMER_B->EMR &= 0b1111;
+
+  /* clear capture/match interrupts */
+  IEC_TIMER_A->MCR = 0;
+  IEC_TIMER_B->MCR = 0;
+  IEC_TIMER_A->CCR = timer_a_ccr;
+  IEC_TIMER_B->CCR = timer_b_ccr;
+  IEC_TIMER_A->IR  = 0b111111;
+  IEC_TIMER_B->IR  = 0b111111;
+
+  /* reenable IEC interrupts */
+  NVIC_EnableIRQ(IEC_TIMER_A_IRQn);
+  NVIC_EnableIRQ(IEC_TIMER_B_IRQn);
+}
+
+/**
+ * wait_atn - wait until ATN has the specified level and capture time
+ * @state: line level to wait for (0 low, 1 high)
+ *
+ * This function waits until the ATN line has the specified level and captures
+ * the time when its level changed.
+ */
+static __attribute__((unused)) void wait_atn(unsigned int state) {
+  /* set up capture */
+  BITBAND(IEC_TIMER_ATN->CCR, 3*IEC_CAPTURE_ATN + IEC_IN_COND_INV(!state)) = 1;
+
+  /* clear interrupt flag */
+  IEC_TIMER_ATN->IR = BV(4 + IEC_CAPTURE_ATN);
+
+  /* wait until interrupt flag is set */
+  while (!BITBAND(IEC_TIMER_ATN->IR, 4+IEC_CAPTURE_ATN)) ;
+
+  /* read event time */
+  if (IEC_CAPTURE_ATN == 0) {
+    reference_time = IEC_TIMER_ATN->CR0;
+  } else {
+    reference_time = IEC_TIMER_ATN->CR1;
+  }
+
+  /* reset capture mode */
+  IEC_TIMER_ATN->CCR = 0b100100;
+}
+
+/* wait_clock - see wait_atn, aborts on ATN low if atnabort is true */
+static __attribute__((unused)) void wait_clock(unsigned int state, unsigned int atnabort) {
+  /* set up capture */
+  BITBAND(IEC_TIMER_CLOCK->CCR, 3*IEC_CAPTURE_CLOCK + IEC_IN_COND_INV(!state)) = 1;
+
+  /* clear interrupt flag */
+  IEC_TIMER_CLOCK->IR = BV(4 + IEC_CAPTURE_CLOCK);
+
+  /* wait until interrupt flag is set */
+  while (!BITBAND(IEC_TIMER_CLOCK->IR, 4+IEC_CAPTURE_CLOCK))
+    if (atnabort && !IEC_ATN)
+      break;
+
+  if (atnabort && !IEC_ATN) {
+    /* read current time */
+    reference_time = IEC_TIMER_CLOCK->TC;
+  } else {
+    /* read event time */
+    if (IEC_CAPTURE_CLOCK == 0) {
+      reference_time = IEC_TIMER_CLOCK->CR0;
+    } else {
+      reference_time = IEC_TIMER_CLOCK->CR1;
+    }
+  }
+
+  /* reset capture mode */
+  IEC_TIMER_CLOCK->CCR = 0b100100;
+}
+
+/* wait_data - see wait_atn */
+static __attribute__((unused)) void wait_data(unsigned int state, unsigned int atnabort) {
+  /* set up capture */
+  BITBAND(IEC_TIMER_DATA->CCR, 3*IEC_CAPTURE_DATA + IEC_IN_COND_INV(!state)) = 1;
+
+  /* clear interrupt flag */
+  IEC_TIMER_DATA->IR = BV(4 + IEC_CAPTURE_DATA);
+
+  /* wait until interrupt flag is set */
+  while (!BITBAND(IEC_TIMER_DATA->IR, 4+IEC_CAPTURE_DATA))
+    if (atnabort && !IEC_ATN)
+      break;
+
+  if (atnabort && !IEC_ATN) {
+    /* read current time */
+    reference_time = IEC_TIMER_DATA->TC;
+  } else {
+    /* read event time */
+    if (IEC_CAPTURE_DATA == 0) {
+      reference_time = IEC_TIMER_DATA->CR0;
+    } else {
+      reference_time = IEC_TIMER_DATA->CR1;
+    }
+  }
+
+  /* reset capture mode */
+  IEC_TIMER_CLOCK->CCR = 0b100100;
+}
+
+/**
+ * set_clock_at - sets clock line at a specified time offset
+ * @time : change time in 100ns after reference_time
+ * @state: new line state (0 low, 1 high)
+ * @wait : wait until change happened if 1
+ *
+ * This function sets the clock line to a specified state at a defined time
+ * after the reference_time set by a previous wait_* function.
+ */
+static __attribute__((unused)) void set_clock_at(uint32_t time, unsigned int state, unsigned int wait) {
+  /* check if requested time is possible */
+  // FIXME: Wrap in debugging macro?
+  if (IEC_MTIMER_CLOCK->TC > reference_time+time)
+    set_test_led(1);
+
+  /* set match time */
+  IEC_MTIMER_CLOCK->IEC_MATCH_CLOCK = reference_time + time;
+
+  /* reset match interrupt flag */
+  IEC_MTIMER_CLOCK->IR = BV(IEC_OPIN_CLOCK);
+
+  /* set match action */
+  if (state) {
+    IEC_MTIMER_CLOCK->EMR = (IEC_MTIMER_CLOCK->EMR & ~(3 << (4+IEC_OPIN_CLOCK*2))) |
+                             EMR_HIGH << (4+IEC_OPIN_CLOCK*2);
+  } else {
+    IEC_MTIMER_CLOCK->EMR = (IEC_MTIMER_CLOCK->EMR & ~(3 << (4+IEC_OPIN_CLOCK*2))) |
+                             EMR_LOW << (4+IEC_OPIN_CLOCK*2);
+  }
+
+  /* optional: wait for match */
+  if (wait)
+    while (!BITBAND(IEC_MTIMER_CLOCK->IR, IEC_OPIN_CLOCK)) ;
+}
+
+/* set_data_at - see set_clock_at */
+static __attribute__((unused)) void set_data_at(uint32_t time, unsigned int state, unsigned int wait) {
+  /* check if requested time is possible */
+  // FIXME: Wrap in debugging macro?
+  if (IEC_MTIMER_DATA->TC > reference_time+time)
+    set_test_led(1);
+
+  /* set match time */
+  IEC_MTIMER_DATA->IEC_MATCH_DATA = reference_time + time;
+
+  /* reset match interrupt flag */
+  IEC_MTIMER_DATA->IR = BV(IEC_OPIN_DATA);
+
+  /* set match action */
+  if (state) {
+    IEC_MTIMER_DATA->EMR = (IEC_MTIMER_DATA->EMR & ~(3 << (4+IEC_OPIN_DATA*2))) |
+                            EMR_HIGH << (4+IEC_OPIN_DATA*2);
+  } else {
+    IEC_MTIMER_DATA->EMR = (IEC_MTIMER_DATA->EMR & ~(3 << (4+IEC_OPIN_DATA*2))) |
+                            EMR_LOW << (4+IEC_OPIN_DATA*2);
+  }
+
+  /* optional: wait for match */
+  if (wait)
+    while (!BITBAND(IEC_MTIMER_DATA->IR, IEC_OPIN_DATA)) ;
+}
+
+/* set_srq_at - see set_clock_at (nice for debugging) */
+static __attribute__((unused)) void set_srq_at(uint32_t time, unsigned int state, unsigned int wait) {
+  /* check if requested time is possible */
+  // FIXME: Wrap in debugging macro?
+  if (IEC_MTIMER_SRQ->TC > reference_time+time)
+    set_test_led(1);
+
+  /* set match time */
+  IEC_MTIMER_SRQ->IEC_MATCH_SRQ = reference_time + time;
+
+  /* reset match interrupt flag */
+  IEC_MTIMER_SRQ->IR = BV(IEC_OPIN_SRQ);
+
+  /* set match action */
+  if (state) {
+    IEC_MTIMER_SRQ->EMR = (IEC_MTIMER_SRQ->EMR & ~(3 << (4+IEC_OPIN_SRQ*2))) |
+                           EMR_HIGH << (4+IEC_OPIN_SRQ*2);
+  } else {
+    IEC_MTIMER_SRQ->EMR = (IEC_MTIMER_SRQ->EMR & ~(3 << (4+IEC_OPIN_SRQ*2))) |
+                           EMR_LOW << (4+IEC_OPIN_SRQ*2);
+  }
+
+  /* optional: wait for match */
+  if (wait)
+    while (!BITBAND(IEC_MTIMER_SRQ->IR, IEC_OPIN_SRQ)) ;
+}
+
+/**
+ * read_bus_at - reads the IEC bus at a certain time
+ * @time: read time in 100ns after reference_time
+ *
+ * This function returns the current IEC bus state at a certain time
+ * after the reference_time set by a previous wait_* function.
+ */
+static __attribute__((unused)) uint32_t read_bus_at(uint32_t time) {
+  /* check if requested time is possible */
+  // FIXME: Wrap in debugging macro?
+  if (IEC_TIMER_A->TC >= reference_time+time)
+    set_test_led(1);
+
+  // FIXME: This could be done in hardware using DMA
+  /* Wait until specified time */
+  while (IEC_TIMER_A->TC < reference_time+time) ;
+
+  return iec_bus_read();
+}
+
+/**
+ * now - returns current timer count
+ *
+ * This function returns the current timer value
+ */
+static __attribute__((unused)) uint32_t now(void) {
+  return IEC_TIMER_A->TC;
+}
+
+/**
+ * generic_load_2bit - generic 2-bit fastloader transmit
+ * @def : pointer to fastloader definition struct
+ * @byte: data byte
+ *
+ * This function implements generic 2-bit fastloader
+ * transmission based on a generic_2bit_t struct.
+ */
+static __attribute__((unused)) void generic_load_2bit(const generic_2bit_t *def, uint8_t byte) {
+  unsigned int i;
+
+  byte ^= def->eorvalue;
+
+  for (i=0;i<4;i++) {
+    set_clock_at(def->pairtimes[i], byte & (1 << def->clockbits[i]), NO_WAIT);
+    set_data_at (def->pairtimes[i], byte & (1 << def->databits[i]),  WAIT);
+  }
+}
+
+/**
+ * generic_save_2bit - generic 2-bit fastsaver receive
+ * @def: pointer to fastloader definition struct
+ *
+ * This function implements genereic 2-bit fastsaver reception
+ * based on a generic_2bit_t struct.
+ */
+static __attribute__((unused)) uint8_t generic_save_2bit(const generic_2bit_t *def) {
+  unsigned int i;
+  uint8_t result = 0;
+
+  for (i=0;i<4;i++) {
+    uint32_t bus = read_bus_at(def->pairtimes[i]);
+
+    result |= (!!(bus & IEC_BIT_CLOCK)) << def->clockbits[i];
+    result |= (!!(bus & IEC_BIT_DATA))  << def->databits[i];
+  }
+
+  return result ^ def->eorvalue;
+}
+
+/* --------- low level fastloader implementations ---------- */
+
+/* ---------------- */
+/* --- JiffyDos --- */
+/* ---------------- */
+
+static const generic_2bit_t jiffy_receive_def = {
+  .pairtimes = {185, 315, 425, 555},
+  .clockbits = {4, 6, 3, 2},
+  .databits  = {5, 7, 1, 0},
+  .eorvalue  = 0xff
+};
+
+static const generic_2bit_t jiffy_send_def = {
+  .pairtimes = {100, 200, 310, 410},
+  .clockbits = {0, 2, 4, 6},
+  .databits  = {1, 3, 5, 7},
+  .eorvalue  = 0
+};
+
+uint8_t jiffy_receive(iec_bus_t *busstate) {
+  uint8_t result;
+
+  fastloader_setup();
+  disable_interrupts();
+
+  /* Initial handshake - wait for rising clock, but emulate ATN-ACK */
+  set_clock(1);
+  set_data(1);
+  do {
+    wait_clock(1, ATNABORT);
+    if (!IEC_ATN)
+      set_data(0);
+  } while (!IEC_CLOCK);
+
+  /* receive byte */
+  result = generic_save_2bit(&jiffy_receive_def);
+
+  /* read EOI info */
+  *busstate = read_bus_at(670);
+
+  /* exit with data low */
+  set_data_at(730, 0, WAIT);
+  delay_us(10);
+
+  enable_interrupts();
+  fastloader_teardown();
+  return result;
+}
+
+uint8_t jiffy_send(uint8_t value, uint8_t eoi, uint8_t loadflags) {
+  unsigned int loadmode = loadflags & 0x80;
+  unsigned int skipeoi  = loadflags & 0x7f;
+
+  fastloader_setup();
+  disable_interrupts();
+
+  /* Initial handshake */
+  set_data(1);
+  set_clock(1);
+  delay_us(3);
+
+  if (loadmode) {
+    /* LOAD mode: start marker is data low */
+    while (!IEC_DATA) ; // wait until data actually is high again
+    wait_data(0, ATNABORT);
+  } else {
+    /* single byte mode: start marker is data high */
+    wait_data(1, ATNABORT);
+  }
+
+  /* transmit data */
+  generic_load_2bit(&jiffy_send_def, value);
+
+  /* Send EOI info */
+  if (!skipeoi) {
+    if (eoi) {
+      set_clock_at(520, 1, NO_WAIT);
+      set_data_at (520, 0, WAIT);
+    } else {
+      /* LOAD mode also uses this for the final byte of a block */
+      set_clock_at(520, 0, NO_WAIT);
+      set_data_at (520, 1, WAIT);
+    }
+
+    /* wait until data is low */
+    delay_us(3); // allow for slow rise time
+    while (IEC_DATA && IEC_ATN) ;
+  }
+
+  /* hold time */
+  delay_us(10);
+
+  enable_interrupts();
+  fastloader_teardown();
+  return !IEC_ATN;
+}
+
+/* ----------------- */
+/* --- Turbodisk --- */
+/* ----------------- */
+
+static const generic_2bit_t turbodisk_byte_def = {
+  .pairtimes = {310, 600, 890, 1180},
+  .clockbits = {7, 5, 3, 1},
+  .databits  = {6, 4, 2, 0},
+  .eorvalue  = 0
+};
+
+void turbodisk_byte(uint8_t value) {
+  fastloader_setup();
+
+  /* wait for handshake */
+  while (IEC_DATA) ;
+  set_clock(1);
+  wait_data(1, NO_ATNABORT);
+
+  /* transmit data */
+  generic_load_2bit(&turbodisk_byte_def, value);
+
+  /* exit with clock low, data high */
+  set_clock_at(1470, 0, NO_WAIT);
+  set_data_at( 1470, 1, WAIT);
+  delay_us(5);
+
+  fastloader_teardown();
+}
+
+void turbodisk_buffer(uint8_t *data, uint8_t length) {
+  unsigned int pair;
+  uint32_t ticks;
+
+  fastloader_setup();
+
+  /* wait for handshake */
+  while (IEC_DATA) ;
+  set_clock(1);
+  wait_data(1, NO_ATNABORT);
+
+  ticks = 70;
+  while (length--) {
+    uint8_t byte = *data++;
+
+    ticks += 120;
+    for (pair = 0; pair < 4; pair++) {
+      ticks += 240;
+      set_clock_at(ticks, byte & 0x80, NO_WAIT);
+      set_data_at (ticks, byte & 0x40, WAIT);
+      ticks += 50;
+      byte <<= 2;
+    }
+    ticks += 100;
+  }
+
+  ticks += 110;
+
+  set_clock_at(ticks, 0, NO_WAIT);
+  set_data_at( ticks, 1, WAIT);
+  delay_us(5);
+
+  fastloader_teardown();
+}
+
+/* ------------------------- */
+/* --- Final Cartridge 3 --- */
+/* ------------------------- */
+
+/* Used by the FC3 C part */
+void clk_data_handshake(void) {
+  set_clock(0);
+  while (IEC_DATA && IEC_ATN) ;
+
+  if (!IEC_ATN)
+    return;
+
+  set_clock(1);
+  while (!IEC_DATA && IEC_ATN) ;
+}
+
+void fastloader_fc3_send_block(uint8_t *data) {
+  uint32_t ticks;
+  unsigned int byte, pair;
+
+  fastloader_setup();
+  disable_interrupts();
+
+  /* start in one microsecond */
+  reference_time = now() + 10;
+  set_clock_at(0, 0, WAIT);
+
+  /* Transmit data */
+  ticks = 120;
+  for (byte = 0; byte < 4; byte++) {
+    uint8_t value = *data++;
+
+    for (pair = 0; pair < 4; pair++) {
+      set_clock_at(ticks, value & 1, NO_WAIT);
+      set_data_at (ticks, value & 2, WAIT);
+      value >>= 2;
+      ticks += 120;
+    }
+    ticks += 20;
+  }
+
+  set_clock_at(ticks, 1, NO_WAIT);
+  set_data_at (ticks, 1, WAIT);
+  // Note: Hold time is in the C part
+
+  enable_interrupts();
+  fastloader_teardown();
+}
+
+static const generic_2bit_t fc3_get_def = {
+  .pairtimes = {170, 300, 420, 520},
+  .clockbits = {7, 6, 3, 2},
+  .databits  = {5, 4, 1, 0},
+  .eorvalue  = 0xff
+};
+
+uint8_t fc3_get_byte(void) {
+  uint8_t result;
+
+  fastloader_setup();
+  disable_interrupts();
+
+  /* delay (guessed, see AVR version) */
+  delay_us(10);
+
+  /* wait for handshake */
+  set_data(1);
+  wait_clock(1, NO_ATNABORT);
+
+  /* receive data */
+  result = generic_save_2bit(&fc3_get_def);
+
+  /* exit with data low */
+  set_data(0);
+
+  enable_interrupts();
+  fastloader_teardown();
+  return result;
+}
+
+static const generic_2bit_t fc3_oldfreeze_pal_def = {
+  .pairtimes = {140, 220, 300, 380},
+  .clockbits = {0, 2, 4, 6},
+  .databits  = {1, 3, 5, 7},
+  .eorvalue  = 0xff
+};
+
+static const generic_2bit_t fc3_oldfreeze_ntsc_def = {
+  .pairtimes = {140, 240, 340, 440},
+  .clockbits = {0, 2, 4, 6},
+  .databits  = {1, 3, 5, 7},
+  .eorvalue  = 0xff
+};
+
+static uint8_t fc3_oldfreeze_send(const uint8_t byte,
+                                  const generic_2bit_t *timingdef,
+                                  unsigned int busytime) {
+  fastloader_setup();
+  disable_interrupts();
+
+  /* clear busy */
+  set_clock(1);
+  set_data(1);
+  delay_us(15);
+  if (!IEC_ATN)
+    goto exit;
+
+  /* wait for start signal */
+  wait_clock(1, ATNABORT);
+  if (!IEC_ATN)
+    goto exit;
+
+  /* transmit data */
+  generic_load_2bit(timingdef, byte);
+
+  /* re-enable busy signal */
+  set_clock_at(busytime, 1, NO_WAIT);
+  set_data_at (busytime, 0, WAIT);
+  delay_us(1); // a little settle time for clock
+
+ exit:
+  enable_interrupts();
+  fastloader_teardown();
+  return !IEC_ATN;
+}
+
+uint8_t fc3_oldfreeze_pal_send(const uint8_t byte) {
+  return fc3_oldfreeze_send(byte, &fc3_oldfreeze_pal_def, 460);
+}
+
+uint8_t fc3_oldfreeze_ntsc_send(const uint8_t byte) {
+  return fc3_oldfreeze_send(byte, &fc3_oldfreeze_ntsc_def, 520);
+}
+
+
+/* ---------------------------- */
+/* --- Action Replay 6 1581 --- */
+/* ---------------------------- */
+
+static const generic_2bit_t ar6_1581_send_def = {
+  .pairtimes = {50, 130, 210, 290},
+  .clockbits = {0, 2, 4, 6},
+  .databits  = {1, 3, 5, 7},
+  .eorvalue  = 0
+};
+
+static const generic_2bit_t ar6_1581p_get_def = {
+  .pairtimes = {120, 220, 380, 480},
+  .clockbits = {7, 6, 3, 2},
+  .databits  = {5, 4, 1, 0},
+  .eorvalue  = 0xff
+};
+
+void ar6_1581_send_byte(uint8_t byte) {
+  fastloader_setup();
+  disable_interrupts();
+
+  /* wait for handshake */
+  set_clock(1);
+  wait_data(1, NO_ATNABORT);
+
+  /* transmit data */
+  generic_load_2bit(&ar6_1581_send_def, byte);
+
+  /* exit with clock low, data high */
+  set_clock_at(375, 0, NO_WAIT);
+  set_data_at( 375, 1, WAIT);
+
+  /* short delay to make sure bus has settled */
+  delay_us(10);
+
+  enable_interrupts();
+  fastloader_teardown();
+}
+
+uint8_t ar6_1581p_get_byte(void) {
+  uint8_t result;
+
+  fastloader_setup();
+  disable_interrupts();
+
+  set_clock(1);
+
+  /* wait for handshake */
+  while (IEC_DATA) ;
+  wait_data(1, NO_ATNABORT);
+
+  /* receive data */
+  result = generic_save_2bit(&ar6_1581p_get_def);
+
+  /* exit with clock low */
+  set_clock_at(530, 0, WAIT);
+
+  enable_interrupts();
+  fastloader_teardown();
+  return result;
+}
+
+
+/* ----------------- */
+/* --- Dreamload --- */
+/* ----------------- */
+
+#ifdef CONFIG_LOADER_DREAMLOAD
+
+void dreamload_send_byte(uint8_t byte) {
+  unsigned int i;
+
+  for (i=0; i<2; i++) {
+    /* send bits 0,1 to bus */
+    set_clock(byte & 1);
+    set_data (byte & 2);
+
+    /* wait until ATN is low */
+    while (IEC_ATN) ;
+
+    /* send bits 2,3 to bus */
+    set_clock(byte & 4);
+    set_data (byte & 8);
+
+    /* wait until ATN is high */
+    while (!IEC_ATN) ;
+
+    /* move upper nibble down */
+    byte >>= 4;
+  }
+}
+
+uint8_t dreamload_get_byte(void) {
+  unsigned int i;
+  uint8_t result = 0;
+
+  for (i=0;i<4;i++) {
+    /* wait until clock is low */
+    while (IEC_CLOCK) ;
+
+    /* read data bit a moment later */
+    delay_us(3);
+    result = (result << 1) | !IEC_DATA;
+
+    /* wait until clock is high */
+    while (!IEC_CLOCK) ;
+
+    /* read data bit a moment later */
+    delay_us(3);
+    result = (result << 1) | !IEC_DATA;
+  }
+
+  return result;
+}
+
+static uint8_t dreamload_get_byte_old(void) {
+  unsigned int i;
+  iec_bus_t tmp;
+  uint8_t result = 0;
+
+  for (i=0; i<2; i++) {
+    /* shift bits to upper nibble */
+    result <<= 4;
+
+    /* wait until ATN is low */
+    while (IEC_ATN) ;
+
+    /* read two bits a moment later */
+    delay_us(3);
+    tmp = iec_bus_read();
+    result |= (!(tmp & IEC_BIT_CLOCK)) << 3;
+    result |= (!(tmp & IEC_BIT_DATA))  << 1;
+
+    /* wait until ATN is high */
+    while (!IEC_ATN) ;
+
+    /* read two bits a moment later */
+    delay_us(3);
+    tmp = iec_bus_read();
+    result |= (!(tmp & IEC_BIT_CLOCK)) << 2;
+    result |= (!(tmp & IEC_BIT_DATA))  << 0;
+  }
+
+  return result;
+}
+
+IEC_ATN_HANDLER {
+  /* just return if ATN is high */
+  if (IEC_ATN)
+    return;
+
+  if (detected_loader == FL_DREAMLOAD_OLD) {
+    /* handle Dreamload (old) if it's the current fast loader */
+    fl_track  = dreamload_get_byte_old();
+    fl_sector = dreamload_get_byte_old();
+  } else {
+    /* standard ATN acknowledge */
+    set_data(0);
+  }
+}
+
+IEC_CLOCK_HANDLER {
+  if (detected_loader == FL_DREAMLOAD && !IEC_CLOCK) {
+    /* handle Dreamload if it's the current fast loader and clock is low */
+    fl_track  = dreamload_get_byte();
+    fl_sector = dreamload_get_byte();
+  }
+}
+
+#endif
+
+/* --------------------- */
+/* --- ULoad Model 3 --- */
+/* --------------------- */
+static const generic_2bit_t uload3_get_def = {
+  .pairtimes = {140, 240, 380, 480},
+  .clockbits = {7, 6, 3, 2},
+  .databits  = {5, 4, 1, 0},
+  .eorvalue  = 0xff
+};
+
+static const generic_2bit_t uload3_send_def = {
+  .pairtimes = {140, 220, 300, 380},
+  .clockbits = {0, 2, 4, 6},
+  .databits  = {1, 3, 5, 7},
+  .eorvalue  = 0
+};
+
+int16_t uload3_get_byte(void) {
+  uint8_t result;
+
+  /* initial handshake */
+  set_clock(0);
+  while (IEC_DATA && IEC_ATN) ;
+  if (!IEC_ATN)
+    return -1;
+
+  fastloader_setup();
+  disable_interrupts();
+
+  /* wait for start signal */
+  set_clock(1);
+  wait_data(1, NO_ATNABORT);
+
+  /* receive data */
+  result = generic_save_2bit(&uload3_get_def);
+
+  /* wait until the C64 releases the bus */
+  delay_us(20);
+
+  enable_interrupts();
+  fastloader_teardown();
+  return result;
+}
+
+void uload3_send_byte(uint8_t byte) {
+  fastloader_setup();
+  disable_interrupts();
+
+  /* initial handshake */
+  set_data(0);
+  while (IEC_CLOCK && IEC_ATN) ;
+  if (!IEC_ATN)
+    goto exit;
+
+  /* wait for start signal */
+  set_data(1);
+  wait_clock(1, ATNABORT);
+  if (!IEC_ATN)
+    goto exit;
+
+  /* transmit data */
+  generic_load_2bit(&uload3_send_def, byte);
+
+  /* exit with clock+data high */
+  set_clock_at(480, 1, NO_WAIT);
+  set_data_at (480, 1, WAIT);
+
+ exit:
+  enable_interrupts();
+  fastloader_teardown();
+}
+
+
+/* --------------------- */
+/* --- Epyx FastLoad --- */
+/* --------------------- */
+
+static const generic_2bit_t epyxcart_send_def = {
+  .pairtimes = {100, 200, 300, 400},
+  .clockbits = {7, 6, 3, 2},
+  .databits  = {5, 4, 1, 0},
+  .eorvalue  = 0xff
+};
+
+uint8_t epyxcart_send_byte(uint8_t byte) {
+  uint8_t result = 0;
+
+  fastloader_setup();
+  disable_interrupts();
+
+  /* clear bus */
+  set_data(1);
+  set_clock(1);
+  delay_us(3);
+
+  /* wait for start signal */
+  wait_data(1, ATNABORT);
+  if (!IEC_ATN) {
+    result = 1;
+    goto exit;
+  }
+
+  /* transmit data */
+  generic_load_2bit(&epyxcart_send_def, byte);
+
+  /* data hold time */
+  delay_us(20);
+
+ exit:
+  disable_interrupts();
+  fastloader_teardown();
+  return result;
+}
+
+
+/* ------------ */
+/* --- GEOS --- */
+/* ------------ */
+
+/* --- reception --- */
+static const generic_2bit_t geos_1mhz_get_def = {
+  .pairtimes = {150, 290, 430, 590},
+  .clockbits = {4, 6, 3, 2},
+  .databits  = {5, 7, 1, 0},
+  .eorvalue  = 0xff
+};
+
+static const generic_2bit_t geos_2mhz_get_def = {
+  .pairtimes = {150, 290, 395, 505},
+  .clockbits = {4, 6, 3, 2},
+  .databits  = {5, 7, 1, 0},
+  .eorvalue  = 0xff
+};
+
+static uint8_t geos_get_generic(const generic_2bit_t *timingdef, uint8_t holdtime_us) {
+  uint8_t result;
+
+  fastloader_setup();
+
+  /* initial handshake */
+  /* wait_* expects edges, so waiting for clock high isn't needed */
+  wait_clock(0, NO_ATNABORT);
+
+  /* receive data */
+  result = generic_save_2bit(timingdef);
+  delay_us(holdtime_us);
+
+  fastloader_teardown();
+  return result;
+}
+
+uint8_t geos_get_byte_1mhz(void) {
+  return geos_get_generic(&geos_1mhz_get_def, 12);
+}
+
+uint8_t geos_get_byte_2mhz(void) {
+  return geos_get_generic(&geos_2mhz_get_def, 12);
+}
+
+/* --- transmission --- */
+static const generic_2bit_t geos_1mhz_send_def = {
+  .pairtimes = {180, 280, 390, 510},
+  .clockbits = {3, 2, 4, 6},
+  .databits  = {1, 0, 5, 7},
+  .eorvalue  = 0x0f
+};
+
+static const generic_2bit_t geos_2mhz_send_def = {
+  .pairtimes = {90, 200, 320, 440},
+  .clockbits = {3, 2, 4, 6},
+  .databits  = {1, 0, 5, 7},
+  .eorvalue  = 0x0f
+};
+
+static const generic_2bit_t geos_1581_21_send_def = {
+  .pairtimes = {70, 140, 240, 330},
+  .clockbits = {0, 2, 4, 6},
+  .databits  = {1, 3, 5, 7},
+  .eorvalue  = 0
+};
+
+static void geos_send_generic(uint8_t byte, const generic_2bit_t *timingdef, unsigned int holdtime_us) {
+  fastloader_setup();
+
+  /* initial handshake */
+  set_clock(1);
+  set_data(1);
+  wait_clock(0, NO_ATNABORT);
+
+  /* send data */
+  generic_load_2bit(timingdef, byte);
+
+  /* hold time */
+  delay_us(holdtime_us);
+
+  fastloader_teardown();
+}
+
+uint8_t geos_send_byte_1mhz(uint8_t byte) {
+  geos_send_generic(byte, &geos_1mhz_send_def, 19);
+  return 0;
+}
+
+uint8_t geos_send_byte_2mhz(uint8_t byte) {
+  geos_send_generic(byte, &geos_2mhz_send_def, 22);
+  return 0;
+}
+
+uint8_t geos_send_byte_1581_21(uint8_t byte) {
+  geos_send_generic(byte, &geos_1581_21_send_def, 12);
+  return 0;
+}
+
+
+/* -------------- */
+/* --- Wheels --- */
+/* -------------- */
+
+/* --- reception --- */
+static const generic_2bit_t wheels_1mhz_get_def = {
+  .pairtimes = {160, 260, 410, 540},
+  .clockbits = {7, 6, 3, 2},
+  .databits  = {5, 4, 1, 0},
+  .eorvalue  = 0xff
+};
+
+static const generic_2bit_t wheels44_1mhz_get_def = {
+  .pairtimes = {170, 280, 450, 610},
+  .clockbits = {7, 6, 3, 2},
+  .databits  = {5, 4, 1, 0},
+  .eorvalue  = 0xff
+};
+
+static const generic_2bit_t wheels44_2mhz_get_def = {
+  .pairtimes = {150, 260, 370, 480},
+  .clockbits = {0, 2, 4, 6},
+  .databits  = {1, 3, 5, 7},
+  .eorvalue  = 0xff
+};
+
+uint8_t wheels_get_byte_1mhz(void) {
+  return geos_get_generic(&wheels_1mhz_get_def, 20);
+}
+
+uint8_t wheels44_get_byte_1mhz(void) {
+  return geos_get_generic(&wheels44_1mhz_get_def, 20);
+}
+
+uint8_t wheels44_get_byte_2mhz(void) {
+  return geos_get_generic(&wheels44_2mhz_get_def, 12);
+}
+
+/* --- transmission --- */
+static const generic_2bit_t wheels_1mhz_send_def = {
+  .pairtimes = {90, 230, 370, 510},
+  .clockbits = {3, 2, 7, 6},
+  .databits  = {1, 0, 5, 4},
+  .eorvalue  = 0xff
+};
+
+static const generic_2bit_t wheels44_2mhz_send_def = {
+  .pairtimes = {70, 150, 260, 370},
+  .clockbits = {0, 2, 4, 6},
+  .databits  = {1, 3, 5, 7},
+  .eorvalue  = 0
+};
+
+uint8_t wheels_send_byte_1mhz(uint8_t byte) {
+  geos_send_generic(byte, &wheels_1mhz_send_def, 22);
+  return 0;
+}
+
+uint8_t wheels44_send_byte_2mhz(uint8_t byte) {
+  geos_send_generic(byte, &wheels44_2mhz_send_def, 15);
+  return 0;
+}
+
+
+/* ---------------- */
+/* --- Parallel --- */
+/* ---------------- */
+
+uint8_t parallel_read(void) {
+  return (PARALLEL_PGPIO->FIOPIN >> PARALLEL_PSTARTBIT) & 0xff;
+}
+
+void parallel_write(uint8_t value) {
+  PARALLEL_PGPIO->FIOPIN =
+    (PARALLEL_PGPIO->FIOPIN & ~(0xff << PARALLEL_PSTARTBIT)) |
+    (value << PARALLEL_PSTARTBIT);
+  delay_us(1);
+}
+
+void parallel_set_dir(parallel_dir_t direction) {
+  if (direction == PARALLEL_DIR_IN) {
+    /* set all lines high - FIODIR is not used in open drain mode */
+    PARALLEL_PGPIO->FIOSET |= 0xff << PARALLEL_PSTARTBIT;
+  }
+}
+
+void parallel_send_handshake(void) {
+  PARALLEL_HGPIO->FIOCLR = BV(PARALLEL_HSK_OUT_BIT);
+  delay_us(2);
+  PARALLEL_HGPIO->FIOSET = BV(PARALLEL_HSK_OUT_BIT);
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/i2c_lpc17xx.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/i2c_lpc17xx.c
new file mode 100644
index 00000000..93c42f4a
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/i2c_lpc17xx.c
@@ -0,0 +1,316 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   i2c_lpc17xx.c: Hardware I2C bus master for LPC17xx
+
+*/
+
+#include <stdbool.h>
+#include <stddef.h>
+#include <arm/NXP/LPC17xx/LPC17xx.h>
+#include <arm/bits.h>
+#include "config.h"
+#include "i2c.h"
+
+#if I2C_NUMBER == 0
+#  define I2C_REGS    LPC_I2C0
+#  define I2C_PCLKREG PCLKSEL0
+#  define I2C_PCLKBIT 14
+#  define I2C_HANDLER I2C0_IRQHandler
+#  define I2C_IRQ     I2C0_IRQn
+#elif I2C_NUMBER == 1
+#  define I2C_REGS    LPC_I2C1
+#  define I2C_PCLKREG PCLKSEL1
+#  define I2C_PCLKBIT 6
+#  define I2C_HANDLER I2C1_IRQHandler
+#  define I2C_IRQ     I2C1_IRQn
+#elif I2C_NUMBER == 2
+#  define I2C_REGS    LPC_I2C2
+#  define I2C_PCLKREG PCLKSEL1
+#  define I2C_PCLKBIT 20
+#  define I2C_HANDLER I2C2_IRQHandler
+#  define I2C_IRQ     I2C2_IRQn
+#else
+#  error I2C_NUMBER is not set or has an invalid value!
+#endif
+
+#define I2CEN  6
+#define I2CSTA 5
+#define I2CSTO 4
+#define I2CSI  3
+#define I2CAA  2
+
+#define RESULT_NONE      0
+#define RESULT_ADDR_NACK 1
+#define RESULT_DATA_NACK 2
+#define RESULT_BUSERROR  3
+#define RESULT_DONE      4
+
+/* internal buffers for read/write_register(s) */
+static uint8_t    reg_buffer;
+static i2cblock_t data_block;
+static i2cblock_t reg_block = {
+  1, &reg_buffer, &data_block
+};
+
+static i2cblock_t *current_block;
+static unsigned int count;
+static unsigned char address, write_buffers;
+static bool read_mode;
+static volatile unsigned char *bufferptr;
+static volatile char result;
+
+/* returns true if no more data is available */
+static bool data_available(void) {
+  /* if count is 0, there was no new buffer to switch to */
+  return (count != 0);
+}
+
+/* returns true if only one more byte can be stored/read */
+static bool on_last_byte(void) {
+  if (count == 1 && current_block->next == NULL)
+    return true;
+  else
+    return false;
+}
+
+/* returns the next byte from the buffer chain */
+static uint8_t read_byte(void) {
+  uint8_t b = *bufferptr++;
+  count--;
+
+  if (count == 0 && current_block->next != NULL) {
+    current_block = current_block->next;
+    count     = current_block->length;
+    bufferptr = current_block->data;
+    write_buffers--;
+  }
+
+  return b;
+}
+
+/* write one byte to the buffer chain */
+static void write_byte(uint8_t v) {
+  *bufferptr++ = v;
+  count--;
+
+  if (count == 0 && current_block->next) {
+    /* at least one more buffer */
+    current_block = current_block->next;
+    count         = current_block->length;
+    bufferptr     = current_block->data;
+  }
+}
+
+void I2C_HANDLER(void) {
+  unsigned int tmp = I2C_REGS->I2STAT;
+
+  switch (tmp) { //I2C_REGS->I2STAT) {
+  case 0x08: // START transmitted
+  case 0x10: // repeated START transmitted
+    /* send address */
+    I2C_REGS->I2DAT = address;
+    I2C_REGS->I2CONCLR = BV(I2CSTA) | BV(I2CSI);
+    break;
+
+  case 0x18: // SLA+W transmitted, ACK received
+    /* send first data byte */
+    I2C_REGS->I2DAT = read_byte();
+    I2C_REGS->I2CONCLR = BV(I2CSTA) | BV(I2CSI);
+    break;
+
+  case 0x20: // SLA+W transmitted, no ACK
+  case 0x30: // byte transmitted, no ACK
+  case 0x48: // SLA+R transmitted, no ACK
+    /* send stop */
+    result = RESULT_ADDR_NACK;
+    I2C_REGS->I2CONSET = BV(I2CSTO);
+    I2C_REGS->I2CONCLR = BV(I2CSTA) | BV(I2CSI);
+    break;
+
+  case 0x28: // byte transmitted, ACK received
+    /* send next data byte or stop */
+    if (read_mode && write_buffers == 0) {
+      /* switch to master receiver mode */
+      address |= 1;
+      I2C_REGS->I2CONSET = BV(I2CSTA);
+      I2C_REGS->I2CONCLR = BV(I2CSI);
+    } else {
+      if (data_available()) {
+        I2C_REGS->I2DAT = read_byte();
+        I2C_REGS->I2CONCLR = BV(I2CSTA) | BV(I2CSI);
+      } else {
+        I2C_REGS->I2CONSET = BV(I2CSTO);
+        I2C_REGS->I2CONCLR = BV(I2CSTA) | BV(I2CSI);
+        result = RESULT_DONE;
+      }
+    }
+    break;
+
+  case 0x38: // arbitration lost
+    /* try to send start again (assumes arbitration was not lost in data transmission */
+    I2C_REGS->I2CONSET = BV(I2CSTA);
+    I2C_REGS->I2CONCLR = BV(I2CSTO) | BV(I2CSI);
+    break;
+
+  case 0x40: // SLA+R transmitted, ACK received
+    /* prepare read cycle */
+    if (on_last_byte())
+      I2C_REGS->I2CONCLR = BV(I2CAA);
+    else
+      I2C_REGS->I2CONSET = BV(I2CAA);
+
+    I2C_REGS->I2CONCLR = BV(I2CSTA) | BV(I2CSI);
+    break;
+
+  case 0x50: // data byte received, ACK sent
+    /* decide to ACK/NACK next cycle, read current byte */
+    if (on_last_byte())
+      I2C_REGS->I2CONCLR = BV(I2CAA);
+    else
+      I2C_REGS->I2CONSET = BV(I2CAA);
+
+    write_byte(I2C_REGS->I2DAT);
+    I2C_REGS->I2CONCLR = BV(I2CSTA) | BV(I2CSI);
+    break;
+
+  case 0x58: // data byte received, no ACK sent
+    /* read last byte, send stop */
+    write_byte(I2C_REGS->I2DAT);
+    I2C_REGS->I2CONSET = BV(I2CSTO);
+    I2C_REGS->I2CONCLR = BV(I2CSTA) | BV(I2CSI);
+    result = RESULT_DONE;
+    break;
+
+  case 0x00: // bus error
+    I2C_REGS->I2CONSET = BV(I2CSTO);
+    I2C_REGS->I2CONCLR = BV(I2CSTA) | BV(I2CSI);
+    result = RESULT_BUSERROR;
+    break;
+
+  default:
+    //printf("i2c:%02x\n",tmp);
+    break;
+  }
+}
+
+void i2c_init(void) {
+  /* Set up I2C clock prescaler */
+  if (I2C_PCLKDIV == 1) {
+    BITBAND(LPC_SC->I2C_PCLKREG, I2C_PCLKBIT  ) = 1;
+    BITBAND(LPC_SC->I2C_PCLKREG, I2C_PCLKBIT+1) = 0;
+  } else if (I2C_PCLKDIV == 2) {
+    BITBAND(LPC_SC->I2C_PCLKREG, I2C_PCLKBIT  ) = 0;
+    BITBAND(LPC_SC->I2C_PCLKREG, I2C_PCLKBIT+1) = 1;
+  } else if (I2C_PCLKDIV == 4) {
+    BITBAND(LPC_SC->I2C_PCLKREG, I2C_PCLKBIT  ) = 0;
+    BITBAND(LPC_SC->I2C_PCLKREG, I2C_PCLKBIT+1) = 0;
+  } else { // Fallback: Divide by 8
+    BITBAND(LPC_SC->I2C_PCLKREG, I2C_PCLKBIT  ) = 1;
+    BITBAND(LPC_SC->I2C_PCLKREG, I2C_PCLKBIT+1) = 1;
+  }
+
+  /* Set I2C clock (symmetric) */
+  I2C_REGS->I2SCLH = CONFIG_MCU_FREQ / I2C_CLOCK / I2C_PCLKDIV / 2;
+  I2C_REGS->I2SCLL = CONFIG_MCU_FREQ / I2C_CLOCK / I2C_PCLKDIV / 2;
+
+  /* Enable I2C interrupt */
+  NVIC_EnableIRQ(I2C_IRQ);
+
+  /* Enable I2C */
+  BITBAND(I2C_REGS->I2CONSET, I2CEN) = 1;
+  I2C_REGS->I2CONCLR = BV(I2CSTA) | BV(I2CSI) | BV(I2CAA);
+
+  /* connect to I/O pins */
+  i2c_pins_connect();
+}
+
+uint8_t i2c_write_registers(uint8_t address_, uint8_t startreg, uint8_t count_, const void *data) {
+  reg_buffer        = startreg;
+  data_block.length = count_;
+  data_block.data   = (void *)data;
+
+  return i2c_write_blocks(address_, &reg_block);
+}
+
+uint8_t i2c_write_register(uint8_t address, uint8_t reg, uint8_t val) {
+  return i2c_write_registers(address, reg, 1, &val);
+}
+
+uint8_t i2c_read_registers(uint8_t address_, uint8_t startreg, uint8_t count_, void *data) {
+  reg_buffer        = startreg;
+  data_block.length = count_;
+  data_block.data   = data;
+
+  uint8_t res = i2c_read_blocks(address_, &reg_block, 1);
+
+  /* tell gcc that the contents of data have changed */
+  asm volatile ("" : "=m" (*(char *)data));
+
+  return res;
+}
+
+int16_t i2c_read_register(uint8_t address, uint8_t reg) {
+  uint8_t tmp = 0;
+
+  if (i2c_read_registers(address, reg, 1, &tmp))
+    return -1;
+  else
+    return tmp;
+}
+
+uint8_t i2c_write_blocks(uint8_t addr, i2cblock_t *head) {
+  result        = RESULT_NONE;
+  address       = addr;
+  bufferptr     = head->data;
+  count         = head->length;
+  read_mode     = false;
+  write_buffers = 0;
+  current_block = head;
+
+  /* send start condition */
+  BITBAND(I2C_REGS->I2CONSET, I2CSTA) = 1;
+
+  /* wait until ISR is done */
+  while (result == RESULT_NONE)
+    __WFI();
+
+  return (result != RESULT_DONE);
+}
+
+uint8_t i2c_read_blocks(uint8_t addr, i2cblock_t *head, unsigned char writeblocks) {
+  result        = RESULT_NONE;
+  address       = addr & 0xfe;
+  bufferptr     = head->data;
+  count         = head->length;
+  read_mode     = true;
+  write_buffers = writeblocks;
+  current_block = head;
+
+  /* send start condition */
+  BITBAND(I2C_REGS->I2CONSET, I2CSTA) = 1;
+
+  /* wait until ISR is done */
+  while (result == RESULT_NONE)
+    __WFI();
+
+  return (result != RESULT_DONE);
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/iec-bus.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/iec-bus.c
new file mode 100644
index 00000000..af72928f
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/iec-bus.c
@@ -0,0 +1,42 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   iec-bus.c: Architecture-specific IEC bus initialisation
+
+   This is not in arch-config.h becaue using the set_* functions
+   from iec-bus.h simplifies the code and the ARM version isn't
+   space-constrained yet.
+*/
+
+#include "config.h"
+#include "iec-bus.h"
+
+void iec_interface_init(void) {
+  /* Set up outputs before switching the pins */
+  set_atn(1);
+  set_data(1);
+  set_clock(1);
+  set_srq(1);
+
+  iec_pins_connect();
+  parallel_init();
+}
+void bus_interface_init(void) __attribute__ ((weak, alias("iec_interface_init")));
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/printf.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/printf.c
new file mode 100644
index 00000000..509433bb
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/printf.c
@@ -0,0 +1,291 @@
+/* Small, noncompliant, not-full-featured printf implementation
+ *
+ *
+ * Copyright (c) 2010-2016  Ingo Korb
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Ingo Korb nor the
+ *       names of the contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *
+ * FIXME: Selection of output function should be more flexible
+ */
+
+#include <stdio.h>
+#include <stdarg.h>
+#include <string.h>
+#include "config.h"
+#include "uart.h"
+
+void uart_putchar(char c);
+#define outfunc(x) uart_putchar(x)
+
+#define FLAG_ZEROPAD   1
+#define FLAG_LEFTADJ   2
+#define FLAG_BLANK     4
+#define FLAG_FORCESIGN 8
+#define FLAG_WIDTH     16
+#define FLAG_LONG      32
+#define FLAG_UNSIGNED  64
+#define FLAG_NEGATIVE  128
+
+/* Digits used for conversion */
+static const char hexdigits[] = "0123456789abcdef";
+
+/* Temporary buffer used for numbers - just large enough for 32 bit in octal */
+static char buffer[12];
+
+/* Output string length */
+static unsigned int outlength;
+
+/* Output pointer */
+static char *outptr;
+static int maxlen;
+
+/* printf */
+static void outchar(char x) {
+  if (maxlen) {
+    maxlen--;
+    outfunc(x);
+    outlength++;
+  }
+}
+
+/* sprintf */
+static void outstr(char x) {
+  if (maxlen) {
+    maxlen--;
+    *outptr++ = x;
+    outlength++;
+  }
+}
+
+static int internal_nprintf(void (*output_function)(char c), const char *fmt, va_list ap) {
+  unsigned int width;
+  unsigned int flags;
+  unsigned int base = 0;
+  char *ptr = NULL;
+
+  outlength = 0;
+
+  while (*fmt) {
+    while (1) {
+      if (*fmt == 0)
+        goto end;
+
+      if (*fmt == '%') {
+        fmt++;
+        if (*fmt != '%')
+          break;
+      }
+
+      output_function(*fmt++);
+    }
+
+    flags = 0;
+    width = 0;
+
+    /* read all flags */
+    do {
+      if (flags < FLAG_WIDTH) {
+        switch (*fmt) {
+        case '0':
+          flags |= FLAG_ZEROPAD;
+          continue;
+
+        case '-':
+          flags |= FLAG_LEFTADJ;
+          continue;
+
+        case ' ':
+          flags |= FLAG_BLANK;
+          continue;
+
+        case '+':
+          flags |= FLAG_FORCESIGN;
+          continue;
+        }
+      }
+
+      if (flags < FLAG_LONG) {
+        if (*fmt >= '0' && *fmt <= '9') {
+          unsigned char tmp = *fmt - '0';
+          width = 10*width + tmp;
+          flags |= FLAG_WIDTH;
+          continue;
+        }
+
+        if (*fmt == 'h')
+          continue;
+
+        if (*fmt == 'l') {
+          flags |= FLAG_LONG;
+          continue;
+        }
+      }
+
+      break;
+    } while (*fmt++);
+
+    /* Strings */
+    if (*fmt == 'c' || *fmt == 's') {
+      switch (*fmt) {
+      case 'c':
+        buffer[0] = va_arg(ap, int);
+        ptr = buffer;
+        break;
+
+      case 's':
+        ptr = va_arg(ap, char *);
+        break;
+      }
+
+      goto output;
+    }
+
+    /* Numbers */
+    switch (*fmt) {
+    case 'u':
+      flags |= FLAG_UNSIGNED;
+    case 'd':
+      base = 10;
+      break;
+
+    case 'o':
+      base = 8;
+      flags |= FLAG_UNSIGNED;
+      break;
+
+    case 'p': // pointer
+      output_function('0');
+      output_function('x');
+      width -= 2;
+    case 'x':
+      base = 16;
+      flags |= FLAG_UNSIGNED;
+      break;
+    }
+
+    unsigned int num;
+
+    if (!(flags & FLAG_UNSIGNED)) {
+      int tmp = va_arg(ap, int);
+      if (tmp < 0) {
+        num = -tmp;
+        flags |= FLAG_NEGATIVE;
+      } else
+        num = tmp;
+    } else {
+      num = va_arg(ap, unsigned int);
+    }
+
+    /* Convert number into buffer */
+    ptr = buffer + sizeof(buffer);
+    *--ptr = 0;
+    do {
+      *--ptr = hexdigits[num % base];
+      num /= base;
+    } while (num != 0);
+
+    /* Sign */
+    if (flags & FLAG_NEGATIVE) {
+      output_function('-');
+      width--;
+    } else if (flags & FLAG_FORCESIGN) {
+      output_function('+');
+      width--;
+    } else if (flags & FLAG_BLANK) {
+      output_function(' ');
+      width--;
+    }
+
+  output:
+    /* left padding */
+    if ((flags & FLAG_WIDTH) && !(flags & FLAG_LEFTADJ)) {
+      while (strlen(ptr) < width) {
+        if (flags & FLAG_ZEROPAD)
+          output_function('0');
+        else
+          output_function(' ');
+        width--;
+      }
+    }
+
+    /* data */
+    while (*ptr) {
+      output_function(*ptr++);
+      if (width)
+        width--;
+    }
+
+    /* right padding */
+    if (flags & FLAG_WIDTH) {
+      while (width) {
+        output_function(' ');
+        width--;
+      }
+    }
+
+    fmt++;
+  }
+
+ end:
+  return outlength;
+}
+
+int printf(const char *format, ...) {
+  va_list ap;
+  int res;
+
+  maxlen = -1;
+  va_start(ap, format);
+  res = internal_nprintf(outchar, format, ap);
+  va_end(ap);
+  return res;
+}
+
+int snprintf(char *str, size_t size, const char *format, ...) {
+  va_list ap;
+  int res;
+
+  maxlen = size;
+  outptr = str;
+  va_start(ap, format);
+  res = internal_nprintf(outstr, format, ap);
+  va_end(ap);
+  if (res < size)
+    str[res] = 0;
+  return res;
+}
+
+/* Required for gcc compatibility */
+int puts(const char *str) {
+  uart_puts_P(str);
+  uart_putchar('\n');
+  return 0;
+}
+
+#undef putchar
+int putchar(int c) {
+  uart_putchar(c);
+  return 0;
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/progmem.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/progmem.h
new file mode 100644
index 00000000..13421ebe
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/progmem.h
@@ -0,0 +1,40 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   progmem.h: avr/pgmspace.h wrapper header
+
+*/
+
+#ifndef PROGMEM_H
+#define PROGMEM_H
+
+/* No-op wrappers for AVR progmem functions */
+#define PROGMEM const
+#define PSTR(x) (x)
+#define pgm_read_word(x) (*(x))
+#define pgm_read_byte(x) (*(x))
+
+#define memcpy_P(dest,src,n) memcpy(dest,src,n)
+#define memcmp_P(s1,s2,n)    memcmp(s1,s2,n)
+#define strcpy_P(dest,src)   strcpy(dest,src)
+#define strcmp_P(s1,s2)      strcmp(s1,s2)
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/pseudoboot.S b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/pseudoboot.S
new file mode 100644
index 00000000..8718f2d4
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/pseudoboot.S
@@ -0,0 +1,100 @@
+/* pre-startup code for LPC17xx
+ *
+ * Written 2012 by Ingo Korb, no copyright claimed
+ */
+#include "asmconfig.h"
+
+/* address definitions */
+/* CMSIS only provides C structs, nothing assembler-friendly */
+#define VTOR_Offset 8
+        
+        .syntax unified
+
+        .section .bootvectors
+
+        .macro  except label
+        .word   __unhandled_exception
+        .endm
+
+        /* Cortex M3 standard except vectors */
+        .word   __stack
+        .word   _trampoline_start
+        except  NMI_Handler
+        except  HardFault_Handler  /* 2 */
+        except  MemManage_Handler
+        except  BusFault_Handler   /* 4 */
+        except  UsageFault_Handler
+        .word   0
+        .word   0
+        .word   0
+        .word   0
+        except  SVC_Handler     /* 10 */
+        except  DebugMon_Handler
+        .word   0
+        except  PendSV_Handler
+        except  SysTick_Handler
+
+        /* External interrupt vectors */
+        except  WDT_IRQHandler
+        except  TIMER0_IRQHandler
+        except  TIMER1_IRQHandler
+        except  TIMER2_IRQHandler
+        except  TIMER3_IRQHandler
+        except  UART0_IRQHandler  /* 20 */
+        except  UART1_IRQHandler
+        except  UART2_IRQHandler
+        except  UART3_IRQHandler
+        except  PWM1_IRQHandler
+        except  I2C0_IRQHandler
+        except  I2C1_IRQHandler
+        except  I2C2_IRQHandler  /* 27 */
+        except  SPI_IRQHandler
+        except  SSP0_IRQHandler
+        except  SSP1_IRQHandler
+        except  PLL0_IRQHandler
+        except  RTC_IRQHandler
+        except  EINT0_IRQHandler
+        except  EINT1_IRQHandler
+        except  EINT2_IRQHandler
+        except  EINT3_IRQHandler
+        except  ADC_IRQHandler
+        except  BOD_IRQHandler
+        except  USB_IRQHandler
+        except  CAN_IRQHandler
+        except  DMA_IRQHandler
+        except  I2S_IRQHandler
+        except  ENET_IRQHandler
+        except  RIT_IRQHandler
+        except  MCPWM_IRQHandler
+        except  QEI_IRQHandler
+        except  PLL1_IRQHandler
+
+
+        /* include the bootloader information block */
+        .section .bootinfo
+
+#include "lpc17xx/bootinfo.S"
+
+        /* ASCII string with additional information, zero-terminated */
+        .ascii "sd2iec " VERSION LONGVERSION
+        .byte   0
+        
+
+        .section .boottrampoline, "x"
+
+        .global _trampoline_start
+        .thumb_func
+
+_trampoline_start:
+        /* change vector table offset */
+        ldr     r0, =0x4000
+        ldr     r1, =SCB_BASE
+        str     r0, [r1, #VTOR_Offset]
+
+        /* load start address */
+        ldr     r1, [r0, #4]
+
+        /* jump to main code */
+        bx      r1
+
+        .end
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/rtc_lpc17xx.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/rtc_lpc17xx.c
new file mode 100644
index 00000000..9db5ada7
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/rtc_lpc17xx.c
@@ -0,0 +1,92 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   rtc_lpc17xx.c: RTC support for the LPC17xx internal RTC
+
+*/
+
+#include <arm/NXP/LPC17xx/LPC17xx.h>
+#include <arm/bits.h>
+#include <string.h>
+#include "config.h"
+#include "time.h"
+#include "uart.h"
+#include "rtc.h"
+#include "rtc_lpc17xx.h"
+
+#define SIGNATURE_GPREG0 0xdeadbeef
+#define SIGNATURE_GPREG1 0xfce2ea31
+
+#define CLKEN  0
+#define CTCRST 1
+
+void lpcrtc_init(void) {
+  if (LPC_RTC->CCR & BV(CLKEN)) {
+    /* Check for signature in battery-backed bytes to determine if RTC was set*/
+    if (LPC_RTC->GPREG0 == SIGNATURE_GPREG0 &&
+        LPC_RTC->GPREG1 == SIGNATURE_GPREG1) {
+      uart_puts_P(PSTR("LPC RTC ok"));
+      rtc_state = RTC_OK;
+    } else {
+      uart_puts_P(PSTR("LPC RTC invalid (signature)"));
+      rtc_state = RTC_INVALID;
+    }
+  } else {
+    uart_puts_P(PSTR("LPC RTC invalid (disabled)"));
+    rtc_state = RTC_INVALID;
+  }
+  uart_putcrlf();
+}
+void rtc_init(void) __attribute__ ((weak, alias("lpcrtc_init")));
+
+void lpcrtc_read(struct tm *time) {
+  if (rtc_state != RTC_OK) {
+    memcpy(time, &rtc_default_date, sizeof(struct tm));
+    return;
+  }
+
+  do {
+    time->tm_sec  = LPC_RTC->SEC;
+    time->tm_min  = LPC_RTC->MIN;
+    time->tm_hour = LPC_RTC->HOUR;
+    time->tm_mday = LPC_RTC->DOM;
+    time->tm_mon  = LPC_RTC->MONTH;
+    time->tm_year = LPC_RTC->YEAR - 1900;
+    time->tm_wday = LPC_RTC->DOW;
+  } while (time->tm_sec != LPC_RTC->SEC);
+}
+void read_rtc(struct tm *time) __attribute__ ((weak, alias("lpcrtc_read")));
+
+void lpcrtc_set(struct tm *time) {
+  LPC_RTC->CCR    = BV(CTCRST);
+  LPC_RTC->SEC    = time->tm_sec;
+  LPC_RTC->MIN    = time->tm_min;
+  LPC_RTC->HOUR   = time->tm_hour;
+  LPC_RTC->DOM    = time->tm_mday;
+  LPC_RTC->MONTH  = time->tm_mon;
+  LPC_RTC->YEAR   = time->tm_year + 1900;
+  LPC_RTC->DOW    = time->tm_wday;
+  LPC_RTC->CCR    = BV(CLKEN);
+  LPC_RTC->GPREG0 = SIGNATURE_GPREG0;
+  LPC_RTC->GPREG1 = SIGNATURE_GPREG1;
+  rtc_state       = RTC_OK;
+}
+void set_rtc(struct tm *time) __attribute__ ((weak, alias("lpcrtc_set")));
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/spi.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/spi.c
new file mode 100644
index 00000000..0a559699
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/spi.c
@@ -0,0 +1,215 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   spi.c: Low-level SPI routines
+
+*/
+
+#include <arm/NXP/LPC17xx/LPC17xx.h>
+#include <arm/bits.h>
+#include "config.h"
+#include "spi.h"
+
+#define SSP_TFE 0   // Transmit FIFO empty
+#define SSP_TNF 1   // Transmit FIFO not full
+#define SSP_RNE 2   // Receive FIFO not empty
+#define SSP_RFF 3   // Receive FIFO full
+#define SSP_BSY 4   // Busy
+
+#if SPI_ON_SSP == 0
+#  define SSP_REGS LPC_SSP0
+#  define SSP_PCLKREG PCLKSEL1
+#  define SSP_PCLKBIT 10
+#  define SSP_DMAID_TX 0
+#  define SSP_DMAID_RX 1
+#elif SPI_ON_SSP == 1
+#  define SSP_REGS LPC_SSP1
+#  define SSP_PCLKREG PCLKSEL0
+#  define SSP_PCLKBIT 20
+#  define SSP_DMAID_TX 2
+#  define SSP_DMAID_RX 3
+#else
+#  error "Unknown SSP unit specified!"
+#endif
+
+void spi_init(spi_speed_t speed) {
+  /* Set clock prescaler to 1:1 */
+  BITBAND(LPC_SC->SSP_PCLKREG, SSP_PCLKBIT) = 1;
+
+  /* configure data format - 8 bits, SPI, CPOL=0, CPHA=0, 1 clock per bit */
+  SSP_REGS->CR0 = (8-1);
+
+  /* set clock prescaler */
+  if (speed == SPI_SPEED_FAST) {
+    SSP_REGS->CPSR = SSP_CLK_DIVISOR_FAST;
+  } else {
+    SSP_REGS->CPSR = SSP_CLK_DIVISOR_SLOW;
+  }
+
+  /* Enable SSP */
+  SSP_REGS->CR1 = BV(1);
+
+  /* Enable DMA controller, little-endian mode */
+  BITBAND(LPC_SC->PCONP, 29) = 1;
+  LPC_GPDMA->DMACConfig = 1;
+}
+
+void spi_tx_byte(uint8_t data) {
+  /* Wait until TX fifo can accept data */
+  while (!BITBAND(SSP_REGS->SR, SSP_TNF)) ;
+
+  /* Send byte */
+  SSP_REGS->DR = data;
+}
+
+uint8_t spi_rx_byte(void) {
+  /* Wait until SSP is not busy */
+  while (BITBAND(SSP_REGS->SR, SSP_BSY)) ;
+
+  /* Clear RX fifo */
+  while (BITBAND(SSP_REGS->SR, SSP_RNE))
+    (void) SSP_REGS->DR;
+
+  /* Transmit a single dummy byte */
+  SSP_REGS->DR = 0xff;
+
+  /* Wait until answer has been received */
+  while (!BITBAND(SSP_REGS->SR, SSP_RNE)) ;
+
+  return SSP_REGS->DR;
+}
+
+void spi_tx_block(const void *ptr, unsigned int length) {
+  const uint8_t *data = (const uint8_t *)ptr;
+
+  while (length--) {
+    /* Wait until TX fifo can accept data */
+    while (!BITBAND(SSP_REGS->SR, SSP_TNF)) ;
+
+    SSP_REGS->DR = *data++;
+  }
+}
+
+void spi_rx_block(void *ptr, unsigned int length) {
+  uint8_t *data = (uint8_t *)ptr;
+  unsigned int txlen = length;
+
+  /* Wait until SSP is not busy */
+  while (BITBAND(SSP_REGS->SR, SSP_BSY)) ;
+
+  /* Clear RX fifo */
+  while (BITBAND(SSP_REGS->SR, SSP_RNE))
+    (void) SSP_REGS->DR;
+
+  if ((length & 3) != 0 || ((uint32_t)ptr & 3) != 0) {
+    /* Odd length or unaligned buffer */
+    while (length > 0) {
+      /* Wait until TX or RX FIFO are ready */
+      while (txlen > 0 && !BITBAND(SSP_REGS->SR, SSP_TNF) &&
+             !BITBAND(SSP_REGS->SR, SSP_RNE)) ;
+
+      /* Try to receive data */
+      while (length > 0 && BITBAND(SSP_REGS->SR, SSP_RNE)) {
+        *data++ = SSP_REGS->DR;
+        length--;
+      }
+
+      /* Send dummy data until TX full or RX ready */
+      while (txlen > 0 && BITBAND(SSP_REGS->SR, SSP_TNF) && !BITBAND(SSP_REGS->SR, SSP_RNE)) {
+        txlen--;
+        SSP_REGS->DR = 0xff;
+      }
+    }
+  } else {
+    /* Clear interrupt flags of DMA channels 0 */
+    LPC_GPDMA->DMACIntTCClear = BV(0);
+    LPC_GPDMA->DMACIntErrClr  = BV(0);
+
+    /* Set up RX DMA channel */
+    LPC_GPDMACH0->DMACCSrcAddr  = (uint32_t)&SSP_REGS->DR;
+    LPC_GPDMACH0->DMACCDestAddr = (uint32_t)ptr;
+    LPC_GPDMACH0->DMACCLLI      = 0; // no linked list
+    LPC_GPDMACH0->DMACCControl  = length
+      | (0 << 12) // source burst size 1
+      | (0 << 15) // destination burst size 1
+      | (0 << 18) // source transfer width 1 byte
+      | (2 << 21) // destination transfer width 4 bytes
+      | (0 << 26) // source address not incremented
+      | (1 << 27) // destination address incremented
+      ;
+    LPC_GPDMACH0->DMACCConfig = 1 // enable channel
+      | (SSP_DMAID_RX << 1) // data source SSP RX
+      | (2 << 11) // transfer from peripheral to memory
+      ;
+
+    /* Enable RX FIFO DMA */
+    SSP_REGS->DMACR = 1;
+
+    /* Write <length> bytes into TX FIFO */
+    while (txlen > 0) {
+      while (txlen > 0 && BITBAND(SSP_REGS->SR, SSP_TNF)) {
+        txlen--;
+        SSP_REGS->DR = 0xff;
+      }
+    }
+
+    /* Wait until DMA channel disables itself */
+    while (LPC_GPDMACH0->DMACCConfig & 1) ;
+
+    /* Disable RX FIFO DMA */
+    SSP_REGS->DMACR = 0;
+  }
+}
+
+void spi_set_speed(spi_speed_t speed) {
+  /* Wait until TX fifo is empty */
+  while (!BITBAND(SSP_REGS->SR, 0)) ;
+
+  /* Disable SSP (FIXME: Is this required?) */
+  SSP_REGS->CR1 = 0;
+
+  /* Change clock divisor */
+  if (speed == SPI_SPEED_FAST) {
+    SSP_REGS->CPSR = SSP_CLK_DIVISOR_FAST;
+  } else {
+    SSP_REGS->CPSR = SSP_CLK_DIVISOR_SLOW;
+  }
+
+  /* Enable SSP */
+  SSP_REGS->CR1 = BV(1);
+}
+
+void spi_select_device(spi_device_t dev) {
+  /* Wait until TX fifo is empty */
+  while (!BITBAND(SSP_REGS->SR, 0)) ;
+
+  if (dev == SPIDEV_CARD0 || dev == SPIDEV_ALLCARDS)
+    sdcard_set_ss(0);
+  else
+    sdcard_set_ss(1);
+
+#ifdef CONFIG_TWINSD
+  if (dev == SPIDEV_CARD1 || dev == SPIDEV_ALLCARDS)
+    sdcard2_set_ss(0);
+  else
+    sdcard2_set_ss(1);
+#endif
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/spi.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/spi.h
new file mode 100644
index 00000000..83e4bd0e
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/spi.h
@@ -0,0 +1,59 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   spi.h: Definitions for the low-level SPI routines - ARM version
+
+*/
+#ifndef SPI_H
+#define SPI_H
+
+/* Low speed 400kHz for init, fast speed <=20MHz (MMC limit) */
+typedef enum { SPI_SPEED_FAST, SPI_SPEED_SLOW } spi_speed_t;
+
+/* Available SPI devices - special case to select all SD cards for initialisation */
+/* Note: SD cards must be 1 and 2 */
+typedef enum { SPIDEV_NONE     = 0,
+               SPIDEV_CARD0    = 1,
+               SPIDEV_CARD1    = 2,
+               SPIDEV_ALLCARDS = 3 } spi_device_t;
+
+/* Initialize SPI interface */
+void spi_init(spi_speed_t speed);
+
+/* Select device */
+void spi_select_device(spi_device_t dev);
+
+/* Transmit a single byte */
+void spi_tx_byte(uint8_t data);
+
+/* Receive a data block */
+void spi_tx_block(const void *data, unsigned int length);
+
+/* Receive a single byte */
+uint8_t spi_rx_byte(void);
+
+/* Receive a data block */
+void spi_rx_block(void *data, unsigned int length);
+
+/* Switch speed of SPI interface */
+void spi_set_speed(spi_speed_t speed);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/startup.S b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/startup.S
new file mode 100644
index 00000000..86b7aa3b
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/startup.S
@@ -0,0 +1,115 @@
+/* startup code for LPC17xx
+ *
+ * Written 2010 by Ingo Korb, no copyright claimed
+ */
+#include "asmconfig.h"
+
+        .syntax unified
+
+        .section .vectors
+
+        .macro  except label
+        .weak   \label
+        .set    \label, __unhandled_exception
+        .word   \label
+        .endm
+
+        /* Cortex M3 standard except vectors */
+        .word   __stack
+        .word   _start
+        except  NMI_Handler
+        except  HardFault_Handler  /* 2 */
+        except  MemManage_Handler
+        except  BusFault_Handler   /* 4 */
+        except  UsageFault_Handler
+        .word   0
+        .word   0
+        .word   0
+        .word   0
+        except  SVC_Handler     /* 10 */
+        except  DebugMon_Handler
+        .word   0
+        except  PendSV_Handler
+        except  SysTick_Handler
+
+        /* External interrupt vectors */
+        except  WDT_IRQHandler
+        except  TIMER0_IRQHandler
+        except  TIMER1_IRQHandler
+        except  TIMER2_IRQHandler
+        except  TIMER3_IRQHandler
+        except  UART0_IRQHandler  /* 20 */
+        except  UART1_IRQHandler
+        except  UART2_IRQHandler
+        except  UART3_IRQHandler
+        except  PWM1_IRQHandler
+        except  I2C0_IRQHandler
+        except  I2C1_IRQHandler
+        except  I2C2_IRQHandler  /* 27 */
+        except  SPI_IRQHandler
+        except  SSP0_IRQHandler
+        except  SSP1_IRQHandler
+        except  PLL0_IRQHandler
+        except  RTC_IRQHandler
+        except  EINT0_IRQHandler
+        except  EINT1_IRQHandler
+        except  EINT2_IRQHandler
+        except  EINT3_IRQHandler
+        except  ADC_IRQHandler
+        except  BOD_IRQHandler
+        except  USB_IRQHandler
+        except  CAN_IRQHandler
+        except  DMA_IRQHandler
+        except  I2S_IRQHandler
+        except  ENET_IRQHandler
+        except  RIT_IRQHandler
+        except  MCPWM_IRQHandler
+        except  QEI_IRQHandler
+        except  PLL1_IRQHandler
+
+
+        /* include the bootloader information block */
+        .section .mainbootinfo
+
+#include "lpc17xx/bootinfo.S"
+
+
+        .section .text
+
+        .global _start
+        .thumb_func
+_start:
+        /* copy data section to ram */
+        ldr     r0, =__data_load_start
+        ldr     r1, =__data_load_end
+        ldr     r2, =__data_start
+dataloop:
+        ldr.w   r3, [r0], #4
+        str.w   r3, [r2], #4
+        cmp     r0, r1
+        blo     dataloop
+
+        /* clear bss section */
+        ldr     r0, =__bss_start__
+        ldr     r1, =__bss_end__
+        ldr     r2, =0
+bssloop:
+        str.w   r2, [r0], #4
+        cmp     r0, r1
+        blo     bssloop
+
+        /* start main() */
+        b       main
+
+
+        /* dummy exception handler: endless loop */
+        .weak __unhandled_exception
+        .thumb_func
+__unhandled_exception:
+        /* turn on LED 4 on an mbed module */
+        //ldr     r0, =0x2009c038
+        //ldr     r1, =0x800000
+        //str     r1, [r0]
+        b       __unhandled_exception
+
+        .end
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/system.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/system.c
new file mode 100644
index 00000000..8445bccd
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/system.c
@@ -0,0 +1,204 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   system.c: System-specific initialisation (LPC17xx version)
+
+*/
+
+#include "config.h"
+#include <arm/NXP/LPC17xx/LPC17xx.h>
+#include <arm/bits.h>
+#include "system.h"
+
+
+/* single-copy "rewrite" of LPC_GPIOINT_TypeDef */
+/* for array-like access to the two ports       */
+typedef struct {
+  volatile uint32_t IntStatus;  // only exists in [0]
+  volatile uint32_t IOIntStatR;
+  volatile uint32_t IOIntStatF;
+  volatile uint32_t IOIntClr;
+  volatile uint32_t IOIntEnR;
+  volatile uint32_t IOIntEnF;
+  volatile uint32_t unused[2];
+} lpc_gpioint_single_t;
+
+static lpc_gpioint_single_t *lpc_gpioint_ptr = (lpc_gpioint_single_t *)LPC_GPIOINT;
+
+/* Early system initialisation */
+void system_init_early(void) {
+  __disable_irq();
+  return;
+}
+
+/* Late initialisation, increase CPU clock */
+void system_init_late(void) {
+  /* Set flash accelerator to 5 CPU cycle access time */
+  LPC_SC->FLASHCFG = (LPC_SC->FLASHCFG & 0xffff0fff) | (4 << 12);
+
+  /* Enable main oscillator, range 1-20MHz */
+  BITBAND(LPC_SC->SCS, 5) = 1;
+
+  /* Wait until stable */
+  while (!BITBAND(LPC_SC->SCS, 6)) ;
+
+  /* Use main oscillator as system clock source */
+  LPC_SC->CLKSRCSEL = 1;
+
+  /* Set up PLL0 multiplier and pre-divisor */
+  LPC_SC->PLL0CFG  = ((PLL_PREDIV-1) << 16) | (PLL_MULTIPLIER-1);
+  LPC_SC->PLL0FEED = 0xaa;
+  LPC_SC->PLL0FEED = 0x55;
+
+  /* Enable PLL0 */
+  LPC_SC->PLL0CON  = 1;
+  LPC_SC->PLL0FEED = 0xaa;
+  LPC_SC->PLL0FEED = 0x55;
+
+  /* Increase CPU clock divider */
+  LPC_SC->CCLKCFG = PLL_DIVISOR-1;
+
+  /* Wait until PLL locks */
+  while (!(LPC_SC->PLL0STAT & BV(26))) ;
+
+  /* Connect PLL0 */
+  LPC_SC->PLL0CON  = 3;
+  LPC_SC->PLL0FEED = 0xaa;
+  LPC_SC->PLL0FEED = 0x55;
+
+  /* Enable GPIO interrupt */
+  NVIC_EnableIRQ(EINT3_IRQn);
+
+  // FIXME: Debugging
+  //LPC_GPIO0->FIODIR |= BV(11) | BV(10);
+  //LPC_GPIO2->FIODIR |= BV(0) | BV(1);
+  //set_debugstate(0);
+}
+
+/* Put MCU in low-power mode */
+void system_sleep(void) {
+  __WFI();
+}
+
+/* Reset MCU */
+void system_reset(void) {
+  __disable_irq();
+
+  /* force watchdog reset */
+  LPC_WDT->WDTC = 256;            // minimal timeout
+  LPC_WDT->WDCLKSEL = BV(31);     // internal RC, lock register
+  LPC_WDT->WDMOD = BV(0) | BV(1); // enable watchdog and reset-by-watchdog
+  LPC_WDT->WDFEED = 0xaa;
+  LPC_WDT->WDFEED = 0x55;         // initial feed to really enable WDT
+
+  while (1) ;
+}
+
+/* Disable interrupts */
+void disable_interrupts(void) {
+  __disable_irq();
+}
+
+/* Enable interrupts */
+void enable_interrupts(void) {
+  __enable_irq();
+}
+
+/*** Timer/GPIO interrupt demux ***/
+
+/* Declare handler functions */
+SD_CHANGE_HANDLER;
+PARALLEL_HANDLER;
+IEC_ATN_HANDLER;
+IEC_CLOCK_HANDLER;
+
+/* timer interrupts, used to detect IEC pin changes */
+void IEC_TIMER_A_HANDLER(void) {
+  if (IEC_TIMER_ATN == IEC_TIMER_A) {
+    if (BITBAND(IEC_TIMER_ATN->IR, 4 + IEC_CAPTURE_ATN)) {
+      IEC_TIMER_ATN->IR = 1 << (4 + IEC_CAPTURE_ATN);
+      iec_atn_handler();
+    }
+  }
+
+#ifdef CONFIG_LOADER_DREAMLOAD
+  if (IEC_TIMER_CLOCK == IEC_TIMER_A) {
+    if (BITBAND(IEC_TIMER_CLOCK->IR, 4 + IEC_CAPTURE_CLOCK)) {
+      IEC_TIMER_CLOCK->IR = 1 << (4 + IEC_CAPTURE_CLOCK);
+      iec_clock_handler();
+    }
+  }
+#endif
+}
+
+void IEC_TIMER_B_HANDLER(void) {
+  if (IEC_TIMER_ATN == IEC_TIMER_B) {
+    if (BITBAND(IEC_TIMER_ATN->IR, 4 + IEC_CAPTURE_ATN)) {
+      IEC_TIMER_ATN->IR = 1 << (4 + IEC_CAPTURE_ATN);
+      iec_atn_handler();
+    }
+  }
+
+#ifdef CONFIG_LOADER_DREAMLOAD
+  if (IEC_TIMER_CLOCK == IEC_TIMER_B) {
+    if (BITBAND(IEC_TIMER_CLOCK->IR, 4 + IEC_CAPTURE_CLOCK)) {
+      IEC_TIMER_CLOCK->IR = 1 << (4 + IEC_CAPTURE_CLOCK);
+      iec_clock_handler();
+    }
+  }
+#endif
+}
+
+/* GPIO interrupt handler, shared with EINT3 */
+void EINT3_IRQHandler(void) {
+  if (BITBAND(lpc_gpioint_ptr[SD_CHANGE_GPIOINT].IOIntStatF, SD_DETECT_PIN) ||
+      BITBAND(lpc_gpioint_ptr[SD_CHANGE_GPIOINT].IOIntStatR, SD_DETECT_PIN)) {
+    BITBAND(lpc_gpioint_ptr[SD_CHANGE_GPIOINT].IOIntClr, SD_DETECT_PIN) = 1;
+    sdcard_change_handler();
+  }
+
+#ifdef PARALLEL_ENABLED
+  if (BITBAND(lpc_gpioint_ptr[PARALLEL_HSK_GPIOINT].IOIntStatF, PARALLEL_HSK_IN_BIT)) {
+    BITBAND(lpc_gpioint_ptr[PARALLEL_HSK_GPIOINT].IOIntClr, PARALLEL_HSK_IN_BIT) = 1;
+    parallel_handler();
+  }
+#endif
+}
+
+void HardFault_Handler(void) {
+  set_test_led(1);
+  while (1) ;
+}
+
+void MemManage_Handler(void) {
+  set_test_led(1);
+  while (1) ;
+}
+
+void BusFault_Handler(void) {
+  set_test_led(1);
+  while (1);
+}
+
+void UsageFault_Handler(void) {
+  set_test_led(1);
+  while (1) ;
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/uart.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/uart.c
new file mode 100644
index 00000000..d656cdc0
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/lpc17xx/uart.c
@@ -0,0 +1,259 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   uart.c: UART access routines for LPC17xx
+
+*/
+
+#include <arm/NXP/LPC17xx/LPC17xx.h>
+#include <arm/bits.h>
+#include "config.h"
+#include "uart.h"
+
+/* clock prescaler - static for now */
+#define CONFIG_UART_PCLKDIV 1
+
+/* A few symbols to make this code work for all four UARTs */
+#if defined(UART_NUMBER) && UART_NUMBER == 0
+#  define UART_PCONBIT 3
+#  define UART_PCLKREG PCLKSEL0
+#  define UART_PCLKBIT 6
+#  define UART_REGS    LPC_UART0
+#  define UART_HANDLER UART0_IRQHandler
+#  define UART_IRQ     UART0_IRQn
+#elif UART_NUMBER == 1
+#  define UART_PCONBIT 4
+#  define UART_PCLKREG PCLKSEL0
+#  define UART_PCLKBIT 8
+#  define UART_REGS    LPC_UART1
+#  define UART_HANDLER UART1_IRQHandler
+#  define UART_IRQ     UART1_IRQn
+#elif UART_NUMBER == 2
+#  define UART_PCONBIT 24
+#  define UART_PCLKREG PCLKSEL1
+#  define UART_PCLKBIT 16
+#  define UART_REGS    LPC_UART2
+#  define UART_HANDLER UART2_IRQHandler
+#  define UART_IRQ     UART2_IRQn
+#elif UART_NUMBER == 3
+#  define UART_PCONBIT 25
+#  define UART_PCLKREG PCLKSEL1
+#  define UART_PCLKBIT 18
+#  define UART_REGS    LPC_UART3
+#  define UART_HANDLER UART3_IRQHandler
+#  define UART_IRQ     UART3_IRQn
+#else
+#  error UART_NUMBER is not set or has an invalid value!
+#endif
+
+static unsigned int baud2divisor(unsigned int baudrate) {
+  return CONFIG_MCU_FREQ / CONFIG_UART_PCLKDIV / 16 / baudrate;
+}
+
+static char txbuf[1 << CONFIG_UART_TX_BUF_SHIFT];
+static volatile unsigned int read_idx,write_idx;
+
+void UART_HANDLER(void) {
+  int iir = UART_REGS->IIR;
+
+  if (!(iir & 1)) {
+    /* Interrupt is pending */
+    switch (iir & 14) {
+#if UART_NUMBER == 1
+    case 0: /* modem status */
+      (void) UART_REGS->MSR; // dummy read to clear
+      break;
+#endif
+
+    case 2: /* THR empty - send */
+      if (read_idx != write_idx) {
+        int maxchars = 16;
+        while (read_idx != write_idx && --maxchars > 0) {
+          UART_REGS->THR = (unsigned char)txbuf[read_idx];
+          read_idx = (read_idx+1) & (sizeof(txbuf)-1);
+        }
+        if (read_idx == write_idx) {
+          /* buffer empty - turn off THRE interrupt */
+          BITBAND(UART_REGS->IER, 1) = 0;
+        }
+      }
+      break;
+
+    case 12: /* RX timeout */
+    case  4: /* data received - not implemented yet */
+      (void) UART_REGS->RBR; // dummy read to clear
+      break;
+
+    case 6: /* RX error */
+      (void) UART_REGS->LSR; // dummy read to clear
+
+    default: break;
+    }
+  }
+}
+
+void uart_putc(char c) {
+  unsigned int tmp = (write_idx+1) & (sizeof(txbuf)-1) ;
+
+  if (read_idx == write_idx && (BITBAND(UART_REGS->LSR, 5))) {
+    /* buffer empty, THR empty -> send immediately */
+    UART_REGS->THR = (unsigned char)c;
+  } else {
+#ifdef CONFIG_DEADLOCK_ME_HARDER
+    while (tmp == read_idx) ;
+#endif
+    BITBAND(UART_REGS->IER, 1) = 0; // turn off UART interrupt
+    txbuf[write_idx] = c;
+    write_idx = tmp;
+    BITBAND(UART_REGS->IER, 1) = 1;
+  }
+}
+
+/* Just for printf */
+void uart_putchar(char c) {
+  if (c == '\n')
+    uart_putc('\r');
+  uart_putc(c);
+}
+
+/* Polling version only */
+unsigned char uart_getc(void) {
+  /* wait for character */
+  while (!(BITBAND(UART_REGS->LSR, 0))) ;
+
+  return UART_REGS->RBR;
+}
+
+/* Returns true if a char is ready */
+unsigned char uart_gotc(void) {
+  return BITBAND(UART_REGS->LSR, 0);
+}
+
+void uart_init(void) {
+  /* Turn on power to UART */
+  BITBAND(LPC_SC->PCONP, UART_PCONBIT) = 1;
+
+  /* UART clock = CPU clock - this block is reduced at compile-time */
+  if (CONFIG_UART_PCLKDIV == 1) {
+    BITBAND(LPC_SC->UART_PCLKREG, UART_PCLKBIT  ) = 1;
+    BITBAND(LPC_SC->UART_PCLKREG, UART_PCLKBIT+1) = 0;
+  } else if (CONFIG_UART_PCLKDIV == 2) {
+    BITBAND(LPC_SC->UART_PCLKREG, UART_PCLKBIT  ) = 0;
+    BITBAND(LPC_SC->UART_PCLKREG, UART_PCLKBIT+1) = 1;
+  } else if (CONFIG_UART_PCLKDIV == 4) {
+    BITBAND(LPC_SC->UART_PCLKREG, UART_PCLKBIT  ) = 0;
+    BITBAND(LPC_SC->UART_PCLKREG, UART_PCLKBIT+1) = 0;
+  } else { // Fallback: Divide by 8
+    BITBAND(LPC_SC->UART_PCLKREG, UART_PCLKBIT  ) = 1;
+    BITBAND(LPC_SC->UART_PCLKREG, UART_PCLKBIT+1) = 1;
+  }
+
+  /* set baud rate - no fractional stuff for now */
+  UART_REGS->LCR = BV(7) | 3; // always 8n1
+  UART_REGS->DLL = baud2divisor(CONFIG_UART_BAUDRATE) & 0xff;
+  UART_REGS->DLM = (baud2divisor(CONFIG_UART_BAUDRATE) >> 8) & 0xff;
+  BITBAND(UART_REGS->LCR, 7) = 0;
+
+  /* reset and enable FIFO */
+  UART_REGS->FCR = BV(0);
+
+  /* enable transmit interrupt */
+  BITBAND(UART_REGS->IER, 1) = 1;
+  NVIC_EnableIRQ(UART_IRQ);
+
+  /* connect to I/O pins */
+  uart_pins_connect();
+}
+
+/* --- generic code below --- */
+void uart_puthex(uint8_t num) {
+  uint8_t tmp;
+  tmp = (num & 0xf0) >> 4;
+  if (tmp < 10)
+    uart_putc('0'+tmp);
+  else
+    uart_putc('a'+tmp-10);
+
+  tmp = num & 0x0f;
+  if (tmp < 10)
+    uart_putc('0'+tmp);
+  else
+    uart_putc('a'+tmp-10);
+}
+
+void uart_trace(void *ptr, uint16_t start, uint16_t len) {
+  uint16_t i;
+  uint8_t j;
+  uint8_t ch;
+  uint8_t *data = ptr;
+
+  data+=start;
+  for(i=0;i<len;i+=16) {
+
+    uart_puthex(start>>8);
+    uart_puthex(start&0xff);
+    uart_putc('|');
+    uart_putc(' ');
+    for(j=0;j<16;j++) {
+      if(i+j<len) {
+        ch=*(data + j);
+        uart_puthex(ch);
+      } else {
+        uart_putc(' ');
+        uart_putc(' ');
+      }
+      uart_putc(' ');
+    }
+    uart_putc('|');
+    for(j=0;j<16;j++) {
+      if(i+j<len) {
+        ch=*(data++);
+        if(ch<32 || ch>0x7e)
+          ch='.';
+        uart_putc(ch);
+      } else {
+        uart_putc(' ');
+      }
+    }
+    uart_putc('|');
+    uart_putcrlf();
+    start+=16;
+  }
+}
+
+void uart_flush(void) {
+  while (read_idx != write_idx) ;
+}
+
+void uart_puts(const char *text) {
+  while (*text) {
+    uart_putc(*text++);
+  }
+}
+
+void uart_puts_P(const char *text) {
+  uart_puts(text);
+}
+
+void uart_putcrlf(void) {
+  uart_putc(13);
+  uart_putc(10);
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/m2iops.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/m2iops.c
new file mode 100644
index 00000000..f07db095
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/m2iops.c
@@ -0,0 +1,454 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   m2iops.c: M2I operations
+
+*/
+
+#include <stdint.h>
+#include <string.h>
+#include "config.h"
+#include "buffers.h"
+#include "dirent.h"
+#include "errormsg.h"
+#include "fatops.h"
+#include "ff.h"
+#include "led.h"
+#include "parser.h"
+#include "progmem.h"
+#include "ustring.h"
+#include "wrapops.h"
+#include "m2iops.h"
+
+
+#define M2I_ENTRY_LEN      33
+#define M2I_ENTRY_OFFSET   18
+#define M2I_CBMNAME_OFFSET 15
+#define M2I_FATNAME_OFFSET 2
+#define M2I_FATNAME_LEN    12
+
+/* ------------------------------------------------------------------------- */
+/*  Utility functions                                                        */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * name_repad - changes CBM name padding in ops_scratch
+ * @oldchar: char to be substituted
+ * @newchar: char to be substituded with
+ *
+ * This function changes the padding of the CBM name in ops_scratch from oldchar
+ * to newchar. Please note that strnsubst is not a straigt replacement for
+ * this function.
+ */
+static void name_repad(uint8_t oldchar, uint8_t newchar) {
+  uint8_t i = CBM_NAME_LENGTH-1;
+  uint8_t *str;
+
+  str = ops_scratch + M2I_CBMNAME_OFFSET;
+  while (i > 0 && str[i] == oldchar)
+    str[i--] = newchar;
+}
+
+/**
+ * parsetype - change type letter to CBM filetype in ops_scratch
+ *
+ * This function replaces the type letter in the M2I line in ops_scratch
+ * with a CBM file type. Returns 1 for deleted or unknown type letters,
+ * 0 otherwise.
+ */
+static uint8_t parsetype(void) {
+  switch (ops_scratch[0] | 0x20) { /* Lowercase the letter */
+  case 'd':
+    ops_scratch[0] = TYPE_DEL;
+    return 0;
+
+  case 's':
+    ops_scratch[0] = TYPE_SEQ;
+    return 0;
+
+  case 'p':
+    ops_scratch[0] = TYPE_PRG;
+    return 0;
+
+  case 'u':
+    ops_scratch[0] = TYPE_USR;
+    return 0;
+
+  default:
+    return 1;
+  }
+}
+
+/**
+ * load_entry - load M2I entry at offset into ops_scratch
+ * @part  : partition number
+ * @offset: offset in M2I file to be loaded
+ *
+ * This function loads the M2I line at offset into ops_scratch and zero-
+ * terminates the FAT name within.  Returns 0 if successful, 1 at
+ * end of file or 255 on error.
+ */
+static uint8_t load_entry(uint8_t part, uint16_t offset) {
+  uint8_t i;
+
+  i = image_read(part, offset, ops_scratch, M2I_ENTRY_LEN);
+
+  if (i > 1)
+    return 255;
+
+  if (i == 1)
+    /* Incomplete entry read, assuming end of file */
+    return 1;
+
+  /* Be nice and zero-terminate the FAT filename */
+  i = 0;
+  while (ops_scratch[M2I_FATNAME_OFFSET + i] != ' ' && i < M2I_FATNAME_LEN) i++;
+  ops_scratch[M2I_FATNAME_OFFSET + i] = 0;
+
+  return 0;
+}
+
+/**
+ * find_empty_entry - returns the offset of the first empty M2I entry
+ * @part: partition number
+ *
+ * This function looks for a deleted entry in an M2I file and returns
+ * it offset. Returns 1 on error or an offset if successful. The
+ * offset may point to a position beyond the end of file if there
+ * were no free entries available.
+ */
+static uint16_t find_empty_entry(uint8_t part) {
+  uint16_t pos = M2I_ENTRY_OFFSET;
+  uint8_t i;
+
+  while (1) {
+    i = load_entry(part, pos);
+
+    if (i) {
+      if (i == 255)
+        return 1;
+      else
+        return pos;
+    }
+
+    if (ops_scratch[0] == '-')
+      return pos;
+
+    pos += M2I_ENTRY_LEN;
+  }
+}
+
+/**
+ * open_existing - open an existing file
+ * @path      : path handle
+ * @dent      : pointer to cbmdirent struct with name of the file
+ * @type      : type of the file (not checked)
+ * @buf       : buffer to be used
+ * @appendflag: Flags if the file should be opened for appending
+ *
+ * This function searches the file name in an M2I file and opens it
+ * either in read or append mode according to appendflag by calling
+ * the appropiate fat_* functions.
+ */
+static void open_existing(path_t *path, cbmdirent_t *dent, uint8_t type, buffer_t *buf, uint8_t appendflag) {
+  if (load_entry(path->part, dent->pvt.m2i.offset)) {
+    set_error(ERROR_FILE_NOT_FOUND);
+    return;
+  }
+
+  if (parsetype()) {
+    set_error(ERROR_FILE_NOT_FOUND);
+    return;
+  }
+
+  ustrcpy(dent->pvt.fat.realname, ops_scratch + M2I_FATNAME_OFFSET);
+
+  if (appendflag)
+    fat_open_write(path, dent, type, buf, 1);
+  else
+    fat_open_read(path, dent, buf);
+}
+
+/* ------------------------------------------------------------------------- */
+/*  fileops-API                                                              */
+/* ------------------------------------------------------------------------- */
+
+static uint8_t m2i_opendir(dh_t *dh, path_t *path) {
+  dh->part    = path->part;
+  dh->dir.m2i = M2I_ENTRY_OFFSET;
+  return 0;
+}
+
+static int8_t m2i_readdir(dh_t *dh, cbmdirent_t *dent) {
+  uint8_t i;
+
+  while (1) {
+    i = load_entry(dh->part, dh->dir.m2i);
+    if (i) {
+      if (i == 255)
+        return 1;
+      else
+        return -1;
+    }
+
+    memset(dent, 0, sizeof(cbmdirent_t));
+    dent->pvt.m2i.offset = dh->dir.m2i;
+
+    dh->dir.m2i += M2I_ENTRY_LEN;
+
+    /* Check file type */
+    if (parsetype())
+      continue;
+
+    dent->opstype   = OPSTYPE_M2I;
+    dent->typeflags = ops_scratch[0];
+
+    /* Copy CBM file name */
+    name_repad(' ', 0);
+    memcpy(dent->name, ops_scratch + M2I_CBMNAME_OFFSET, CBM_NAME_LENGTH);
+
+    /* Get file size */
+    if (dent->typeflags != TYPE_DEL) {
+      /* Let's annoy some users */
+      FILINFO finfo;
+
+      FRESULT res = f_stat(&partition[dh->part].fatfs, ops_scratch + M2I_FATNAME_OFFSET, &finfo);
+      if (res != FR_OK) {
+        if (res == FR_NO_FILE)
+          continue;
+        else {
+          parse_error(res,1);
+          return 1;
+        }
+      }
+
+      if (finfo.fsize > 16255746)
+        /* File too large -> size 63999 blocks */
+        dent->blocksize = 63999;
+      else
+        dent->blocksize = (finfo.fsize+253) / 254;
+
+      dent->remainder = finfo.fsize % 254;
+    } else
+      dent->blocksize = 0;
+
+    /* Fake Date/Time */
+    dent->date.year  = 82;
+    dent->date.month = 8;
+    dent->date.day   = 31;
+
+    return 0;
+  }
+}
+
+static uint8_t m2i_getdisklabel(uint8_t part, uint8_t *label) {
+  label[16] = 0;
+  return image_read(part, 0, label, 16);
+}
+
+static uint8_t m2i_getdirlabel(path_t *path, uint8_t *label) {
+  return image_read(path->part, 0, label, 16);
+}
+
+static void m2i_open_read(path_t *path, cbmdirent_t *dent, buffer_t *buf) {
+  open_existing(path, dent, TYPE_RAW, buf, 0);
+}
+
+static void m2i_open_write(path_t *path, cbmdirent_t *dent, uint8_t type, buffer_t *buf, uint8_t append) {
+  uint16_t offset;
+  uint8_t *str;
+  uint8_t *nameptr;
+  uint8_t i;
+  FRESULT res;
+
+  /* Check for read-only image file */
+  if (!(partition[path->part].imagehandle.flag & FA_WRITE)) {
+    set_error(ERROR_WRITE_PROTECT);
+    return;
+  }
+
+  if (append) {
+    open_existing(path, dent, type, buf, 1);
+  } else {
+    if (check_invalid_name(dent->name)) {
+      set_error(ERROR_SYNTAX_JOKER);
+      return;
+    }
+
+    /* Find an empty entry */
+    offset = find_empty_entry(path->part);
+    if (offset < M2I_ENTRY_OFFSET)
+      return;
+
+    memset(ops_scratch, ' ', sizeof(ops_scratch));
+    str = ops_scratch;
+
+    switch (type & TYPE_MASK) {
+    case TYPE_DEL:
+      *str++ = 'D';
+      break;
+
+    case TYPE_SEQ:
+      *str++ = 'S';
+      break;
+
+    case TYPE_PRG:
+      *str++ = 'P';
+      break;
+
+    case TYPE_USR:
+      *str++ = 'U';
+      break;
+
+    default:
+      /* Unknown type - play it safe, don't create a file */
+      return;
+    }
+
+    *str++ = ':';
+
+    /* Generate a FAT name */
+    for (i=0;i<8;i++) {
+      *str++ = '0';
+    }
+    *str = 0;
+
+    do {
+      FILINFO finfo;
+
+      finfo.lfn = NULL;
+      /* See if it's already there */
+      res = f_stat(&partition[path->part].fatfs, ops_scratch + M2I_FATNAME_OFFSET, &finfo);
+      if (res == FR_OK) {
+        str = ops_scratch + M2I_FATNAME_OFFSET+7;
+        /* Increment name */
+        while (1) {
+          if (++(*str) > '9') {
+            *str-- = '0';
+            continue;
+          }
+          break;
+        }
+      }
+    } while (res == FR_OK);
+
+    if (res != FR_NO_FILE)
+      return;
+
+    /* Copy the CBM file name */
+    nameptr = dent->name;
+    str = ops_scratch + M2I_CBMNAME_OFFSET;
+    while (*nameptr)
+      *str++ = *nameptr++;
+
+    /* Update dent with the new FAT name */
+    ustrcpy(dent->pvt.fat.realname, ops_scratch + M2I_FATNAME_OFFSET);
+
+    /* Finish creating the M2I entry */
+    ops_scratch[M2I_FATNAME_OFFSET + 8]  = ' ';
+    ops_scratch[M2I_FATNAME_OFFSET + 12] = ':';
+    ops_scratch[M2I_CBMNAME_OFFSET + CBM_NAME_LENGTH] = 13;
+    ops_scratch[M2I_CBMNAME_OFFSET + CBM_NAME_LENGTH + 1] = 10;
+
+    /* Write it */
+    if (image_write(path->part, offset, ops_scratch, M2I_ENTRY_LEN, 1))
+      return;
+
+    /* Write the actual file - always without P00 header */
+    fat_open_write(path, dent, TYPE_RAW, buf, append);
+
+    /* Abort on error */
+    if (current_error) {
+      /* No error checking here. Either it works or everything has failed. */
+      ops_scratch[0] = '-';
+      image_write(path->part, offset, ops_scratch, 1, 1);
+    }
+  }
+}
+
+static void m2i_open_rel(path_t *path, cbmdirent_t *dent, buffer_t *buf, uint8_t length, uint8_t mode) {
+  set_error(ERROR_SYNTAX_UNABLE);
+}
+
+static uint8_t m2i_delete(path_t *path, cbmdirent_t *dent) {
+  uint16_t offset;
+
+  offset = dent->pvt.m2i.offset;// find_entry
+  if (load_entry(path->part, offset))
+    return 255;
+
+  /* Ignore the result, we'll have to delete the entry anyway */
+  ustrcpy(dent->name, ops_scratch + M2I_FATNAME_OFFSET);
+  fat_delete(path, dent);
+
+  ops_scratch[0] = '-';
+  if (image_write(path->part, offset, ops_scratch, 1, 1))
+    return 0;
+  else
+    return 1;
+}
+
+static void m2i_rename(path_t *path, cbmdirent_t *dent, uint8_t *newname) {
+  uint16_t offset;
+  uint8_t *ptr;
+
+  set_busy_led(1);
+  /* Locate entry in the M2I file */
+  offset = dent->pvt.m2i.offset;
+  if (load_entry(path->part, offset)) {
+    update_leds();
+    return;
+  }
+
+  /* Re-load the entry because load_entry modifies it */
+  /* Assume this never fails because load_entry was successful */
+  image_read(path->part, offset, ops_scratch, M2I_ENTRY_LEN);
+
+  /* Copy the new filename */
+  ptr = ops_scratch + M2I_CBMNAME_OFFSET;
+  memset(ptr, ' ', CBM_NAME_LENGTH);
+  while (*newname)
+    *ptr++ = *newname++;
+
+  /* Write new entry */
+  image_write(path->part, offset, ops_scratch, M2I_ENTRY_LEN, 1);
+
+  update_leds();
+}
+
+const PROGMEM fileops_t m2iops = {
+  m2i_open_read,
+  m2i_open_write,
+  m2i_open_rel,
+  m2i_delete,
+  m2i_getdisklabel,
+  m2i_getdirlabel,
+  fat_getid,
+  fat_freeblocks,
+  fat_read_sector,
+  fat_write_sector,
+  format_dummy,
+  m2i_opendir,
+  m2i_readdir,
+  image_mkdir,
+  image_chdir,
+  m2i_rename
+};
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/m2iops.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/m2iops.h
new file mode 100644
index 00000000..da4d30a6
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/m2iops.h
@@ -0,0 +1,33 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   m2iops.h: Definitions for the M2I operations
+
+*/
+
+#ifndef M2IOPS_H
+#define M2IOPS_H
+
+#include "wrapops.h"
+
+extern const fileops_t m2iops;
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/main.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/main.c
new file mode 100644
index 00000000..397b0910
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/main.c
@@ -0,0 +1,125 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   main.c: Lots of init calls for the submodules
+
+*/
+
+#include <stdio.h>
+#include <string.h>
+#include "config.h"
+#include "buffers.h"
+#include "bus.h"
+#include "diskchange.h"
+#include "diskio.h"
+#include "display.h"
+#include "eeprom-conf.h"
+#include "errormsg.h"
+#include "fatops.h"
+#include "ff.h"
+#include "filesystem.h"
+#include "i2c.h"
+#include "led.h"
+#include "time.h"
+#include "rtc.h"
+#include "spi.h"
+#include "system.h"
+#include "timer.h"
+#include "uart.h"
+#include "ustring.h"
+#include "utils.h"
+
+
+#if defined(__AVR__) && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ > 1))
+int main(void) __attribute__((OS_main));
+#endif
+int main(void) {
+  /* Early system initialisation */
+  board_init();
+  system_init_early();
+  leds_init();
+
+  set_busy_led(1);
+  set_dirty_led(0);
+
+  /* Due to an erratum in the LPC17xx chips anything that may change */
+  /* peripheral clock scalers must come before system_init_late()    */
+  uart_init();
+#ifndef SPI_LATE_INIT
+  spi_init(SPI_SPEED_SLOW);
+#endif
+  timer_init();
+  bus_interface_init();
+  i2c_init();
+
+  /* Second part of system initialisation, switches to full speed on ARM */
+  system_init_late();
+  enable_interrupts();
+
+  /* Internal-only initialisation, called here because it's faster */
+  buffers_init();
+  buttons_init();
+
+  /* Anything that does something which needs the system clock */
+  /* should be placed after system_init_late() */
+  bus_init();    // needs delay
+  rtc_init();    // accesses I2C
+  disk_init();   // accesses card
+  read_configuration();
+
+  filesystem_init(0);
+  change_init();
+
+  uart_puts_P(PSTR("\r\nsd2iec " VERSION " #"));
+  uart_puthex(device_address);
+  uart_putcrlf();
+
+#ifdef CONFIG_REMOTE_DISPLAY
+  /* at this point all buffers should be free, */
+  /* so just use the data area of the first to build the string */
+  uint8_t *strbuf = buffers[0].data;
+  ustrcpy_P(strbuf, versionstr);
+  ustrcpy_P(strbuf+ustrlen(strbuf), longverstr);
+  if (display_init(ustrlen(strbuf), strbuf)) {
+    display_address(device_address);
+    display_current_part(0);
+  }
+#endif
+
+  set_busy_led(0);
+
+#if defined(HAVE_SD) && BUTTON_PREV != 0
+  /* card switch diagnostic aid - hold down PREV button to use */
+  if (!(buttons_read() & BUTTON_PREV)) {
+    while (buttons_read() & BUTTON_NEXT) {
+      set_dirty_led(sdcard_detect());
+# ifndef SINGLE_LED
+      set_busy_led(sdcard_wp());
+# endif
+    }
+    reset_key(0xff);
+  }
+#endif
+
+  bus_mainloop();
+
+  while (1);
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/p00cache.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/p00cache.c
new file mode 100644
index 00000000..4d955488
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/p00cache.c
@@ -0,0 +1,81 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   p00cache.c: [PSUR]00 name cache
+
+*/
+
+#include <stddef.h>
+#include <string.h>
+#include <stdio.h>
+#include "config.h"
+#include "dirent.h"
+#include "p00cache.h"
+
+#include "uart.h"
+
+typedef struct {
+  uint32_t cluster;
+  uint8_t  name[CBM_NAME_LENGTH];
+} p00name_t;
+
+static P00CACHE_ATTRIB p00name_t p00cache[CONFIG_P00CACHE_SIZE / sizeof(p00name_t)];
+static uint8_t      cache_part;
+static unsigned int entries;
+
+void p00cache_invalidate(void) {
+  cache_part = -1;
+  entries    = 0;
+}
+
+uint8_t *p00cache_lookup(uint8_t part, uint32_t cluster) {
+  /* fail if it's for a different partition */
+  if (part != cache_part)
+    return NULL;
+
+  /* linear search for the correct cluster number */
+  /* (binary search was only 6-8% faster overall) */
+  for (unsigned int i=0; i<entries; i++) {
+    if (p00cache[i].cluster == cluster)
+      return p00cache[i].name;
+  }
+
+  /* noting found */
+  return NULL;
+}
+
+void p00cache_add(uint8_t part, uint32_t cluster, uint8_t *name) {
+  /* don't add if the cache is full */
+  if (entries == sizeof(p00cache)/sizeof(p00cache[0]))
+    return;
+
+  /* invalidate if it's for a different partition */
+  // FIXME: ignore instead and add invalidate to CP?
+  if (part != cache_part) {
+    p00cache_invalidate();
+    cache_part = part;
+  }
+
+  /* add entry at end of list */
+  p00cache[entries].cluster = cluster;
+  memcpy(p00cache[entries].name, name, CBM_NAME_LENGTH);
+  entries++;
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/p00cache.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/p00cache.h
new file mode 100644
index 00000000..76b91e8f
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/p00cache.h
@@ -0,0 +1,45 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   p00cache.h: Data structures for the [PSUR]00 name cache
+
+*/
+
+#ifndef P00CACHE_H
+#define P00CACHE_H
+
+#include <stdint.h>
+
+#ifdef CONFIG_P00CACHE
+
+void     p00cache_invalidate(void);
+uint8_t *p00cache_lookup(uint8_t part, uint32_t cluster);
+void     p00cache_add(uint8_t part, uint32_t cluster, uint8_t *name);
+
+#else
+
+#  define p00cache_invalidate() do {} while (0)
+#  define p00cache_lookup(p,c)  NULL
+#  define p00cache_add(p,c,n)   do {} while (0)
+
+#endif
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/parser.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/parser.c
new file mode 100644
index 00000000..e7060c6d
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/parser.c
@@ -0,0 +1,476 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   parser.c: Common file name parsers
+
+*/
+
+#include <stdio.h>
+
+#include <ctype.h>
+#include <stdint.h>
+#include <string.h>
+#include "config.h"
+#include "dirent.h"
+#include "display.h"
+#include "eefs-ops.h"
+#include "errormsg.h"
+#include "fatops.h"
+#include "flags.h"
+#include "ustring.h"
+#include "parser.h"
+
+partition_t partition[CONFIG_MAX_PARTITIONS];
+uint8_t current_part;
+uint8_t max_part;
+uint8_t dir_changed;
+
+/* Updates current_dir in the partition array and sends */
+/* the new dir to the display.                          */
+void update_current_dir(path_t *path){
+  partition[path->part].current_dir = path->dir;
+  dir_changed = 1;
+
+  if (display_found && path->part == current_part) {
+    uint8_t dirname[CBM_NAME_LENGTH+1];
+    uint8_t *ptr = dirname + CBM_NAME_LENGTH;
+
+    dir_label(path, dirname);
+    *ptr-- = 0;
+
+    while (*ptr == ' ') *ptr-- = 0;
+    display_current_directory(path->part, dirname);
+  }
+}
+
+/**
+ * check_invalid_name - check for invalid characters in a file name
+ * @name: pointer to the file name
+ *
+ * This function checks if the passed name contains any characters
+ * that are not valid in a CBM file name. Returns 1 if invalid
+ * characters are found, 0 if not.
+ */
+uint8_t check_invalid_name(uint8_t *name) {
+  while (*name) {
+    if (*name == '=' || *name == '"' ||
+        *name == '*' || *name == '?' ||
+        *name == ',')
+      return 1;
+    name++;
+  }
+  return 0;
+}
+
+/* Convert a PETSCII character to lower-case */
+static uint8_t tolower_pet(uint8_t c) {
+  if (c >= 0x61 && c <= 0x7a)
+    c -= 0x20;
+  else if (c >= 0xc1 && c <= 0xda)
+    c -= 0x80;
+  return c;
+}
+
+/**
+ * parse_partition - parse a partition number from a file name
+ * @buf     : pointer to pointer to filename
+ *
+ * This function parses the partition number from the file name
+ * specified in buf and advances buf to point at the first character
+ * that isn't part of the number. Returns a 0-based partition number.
+ */
+uint8_t parse_partition(uint8_t **buf) {
+  uint8_t part=0;
+
+#ifdef CONFIG_HAVE_EEPROMFS
+  /* special case: recognize "!:" as alias for the eefs partition */
+  if (eefs_partition != 255 && (*buf)[0] == '!' && (*buf)[1] == ':') {
+    (*buf) += 2;
+    return eefs_partition;
+  }
+#endif
+
+  while (isdigit(**buf) || **buf == ' ' || **buf == '@') {
+    if(isdigit(**buf))
+      part=part*10+(**buf-'0');
+    (*buf)++;
+  }
+  if (part == 0)
+    return current_part;
+  else
+    return part-1;
+}
+
+
+/**
+ * match_name - Match a pattern against a file name
+ * @matchstr  : pattern to be matched
+ * @dent      : pointer to the directory entry to be matched against
+ * @ignorecase: ignore the case of the file names
+ *
+ * This function tests if matchstr matches name in dent.
+ * Returns 1 for a match, 0 otherwise.
+ */
+uint8_t match_name(uint8_t *matchstr, cbmdirent_t *dent, uint8_t ignorecase) {
+  uint8_t *filename = dent->name;
+  uint8_t *starpos;
+  uint8_t m,f;
+
+#if 0
+  /* Shortcut for chaining fastloaders ("!*file") */
+  if (*filename == *matchstr && matchstr[1] == '*')
+    return 1;
+#endif
+
+  while (*filename) {
+    if (ignorecase) {
+      m = tolower_pet(*matchstr);
+      f = tolower_pet(*filename);
+    } else {
+      m = *matchstr;
+      f = *filename;
+    }
+    switch (m) {
+    case '?':
+      filename++;
+      matchstr++;
+      break;
+
+    case '*':
+      if (globalflags & POSTMATCH) {
+        starpos = matchstr;
+        matchstr += ustrlen(matchstr)-1;
+        filename += ustrlen(filename)-1;
+        while (matchstr != starpos) {
+          if (ignorecase) {
+            m = tolower_pet(*matchstr);
+            f = tolower_pet(*filename);
+          } else {
+            m = *matchstr;
+            f = *filename;
+          }
+          if (m != f && m != '?')
+            return 0;
+          filename--;
+          matchstr--;
+        }
+      }
+      return 1;
+
+    default:
+      if (m != f)
+        return 0;
+      matchstr++;
+      filename++;
+      break;
+    }
+  }
+  if (*matchstr && *matchstr != '*')
+    return 0;
+  else
+    return 1;
+}
+
+/**
+ * next_match - get next matching directory entry
+ * @dh        : directory handle
+ * @matchstr  : pattern to be matched
+ * @start     : start date
+ * @end       : end date
+ * @type      : required file type (0 for any)
+ * @dent      : pointer to a directory entry for returning the match
+ *
+ * This function looks for the next directory entry matching matchstr and
+ * type (if != 0) and returns it in dent. Return values of the function are
+ * -1 if no match could be found, 1 if an error occured or 0 if a match was
+ * found.
+ */
+int8_t next_match(dh_t *dh, uint8_t *matchstr, date_t *start, date_t *end, uint8_t type, cbmdirent_t *dent) {
+  int8_t res;
+
+  while (1) {
+    res = readdir(dh, dent);
+    if (res == 0) {
+      /* Skip if the type doesn't match */
+      if ((type & TYPE_MASK) &&
+          (dent->typeflags & TYPE_MASK) != (type & TYPE_MASK))
+        continue;
+
+      /* Skip hidden files */
+      if ((dent->typeflags & FLAG_HIDDEN) &&
+          !(type & FLAG_HIDDEN))
+        continue;
+
+      /* Skip if the name doesn't match */
+      if (matchstr) {
+        if (dent->opstype == OPSTYPE_FAT) {
+          /* FAT: Ignore case */
+          if (!match_name(matchstr, dent, 1))
+            continue;
+        } else {
+          /* Honor case */
+          if (!match_name(matchstr, dent, 0))
+            continue;
+        }
+      }
+
+      /* skip if earlier than start date */
+      if (start &&
+          memcmp(&dent->date, start, sizeof(date_t)) < 0)
+        continue;
+
+      /* skip if later than end date */
+      if (end &&
+          memcmp(&dent->date, end, sizeof(date_t)) > 0)
+        continue;
+    }
+
+    return res;
+  }
+}
+
+/**
+ * first_match - get the first matching directory entry
+ * @path    : pointer to a path object
+ * @matchstr: pattern to be matched
+ * @type    : required file type (0 for any)
+ * @dent    : pointer to a directory entry for returning the match
+ *
+ * This function looks for the first directory entry matching matchstr and
+ * type (if != 0) in path and returns it in dent. Uses matchdh for matching
+ * and returns the same values as next_match. This function is just a
+ * convenience wrapper around opendir+next_match, it is not required to call
+ * it before using next_match.
+ */
+int8_t first_match(path_t *path, uint8_t *matchstr, uint8_t type, cbmdirent_t *dent) {
+  int8_t res;
+
+  if (opendir(&matchdh, path))
+    return 1;
+
+  res = next_match(&matchdh, matchstr, NULL, NULL, type, dent);
+  if (res < 0)
+    set_error(ERROR_FILE_NOT_FOUND);
+  return res;
+}
+
+/**
+ * parse_path - parse CMD style directory specification
+ * @in    : input buffer
+ * @path  : pointer to path object
+ * @name  : pointer to pointer to filename (may be NULL)
+ * @for_cd: parse path from CD command
+ *
+ * This function parses a CMD style directory specification in the input
+ * buffer. If successful, the path object will be set up for accessing
+ * the path named in the input buffer. Returns 0 if successful or 1 if an
+ * error occured.
+ * If @for_cd is true, no colon is required in the input string and parsing
+ * is ended successfully if the last component in the path is an image file.
+ */
+uint8_t parse_path(uint8_t *in, path_t *path, uint8_t **name, uint8_t for_cd) {
+  cbmdirent_t dent;
+  uint8_t *end;
+  uint8_t saved;
+  uint8_t part;
+
+  if (for_cd || ustrchr(in, ':')) {
+    /* Skip partition number */
+    part=parse_partition(&in);
+    if(part>=max_part) {
+      set_error(ERROR_DRIVE_NOT_READY);
+      return 1;
+    }
+
+    path->part = part;
+    path->dir  = partition[part].current_dir;
+
+    if (*in != '/') {
+      *name = ustrchr(in, ':');
+      if (*name == NULL)
+        *name = in;
+      else
+        *name += 1;
+      return 0;
+    }
+
+    while (*in) {
+      switch (*in++) {
+      case '/':
+        switch (*in) {
+        case '/':
+          /* Double slash -> root */
+          dent.name[0] = 0;
+          chdir(path, &dent);
+          break;
+
+        case 0:
+          /* End of path found, no name */
+          *name = in;
+          return 0;
+
+        case ':':
+          /* End of path found */
+          *name = in+1;
+          return 0;
+
+        default:
+          /* Extract path component and match it */
+          end = in;
+          while (*end && *end != '/' && *end != ':') end++;
+          saved = *end;
+          *end = 0;
+          if (first_match(path, in, FLAG_HIDDEN, &dent)) {
+            /* first_match has set an error already */
+            if (current_error == ERROR_FILE_NOT_FOUND)
+              set_error(ERROR_FILE_NOT_FOUND_39);
+            return 1;
+          }
+
+          if ((dent.typeflags & TYPE_MASK) != TYPE_DIR) {
+            /* Not a directory */
+            /* FIXME: Try to mount as image here so they can be accessed like a directory */
+            if (for_cd && saved == 0 && check_imageext(in) != IMG_UNKNOWN) {
+              /* no further path components, last one is an image file */
+              *name = in;
+              return 0;
+            } else {
+              set_error(ERROR_FILE_NOT_FOUND_39);
+              return 1;
+            }
+          }
+
+          /* Match found, move path */
+          chdir(path, &dent);
+          *end = saved;
+          in = end;
+          break;
+        }
+        break;
+
+      case 0:
+        /* End of path found, no name */
+        *name = in-1;  // -1 to fix the ++ in switch
+        return 0;
+
+      case ':':
+        /* End of path found */
+        *name = in;
+        return 0;
+      }
+    }
+  } else {
+    /* No :, use current dir/path */
+    path->part = current_part;
+    path->dir  = partition[current_part].current_dir;
+  }
+
+  *name = in;
+  return 0;
+}
+
+
+
+/* Parse a decimal number at str and return a pointer to the following char */
+uint16_t parse_number(uint8_t **str) {
+  uint16_t res = 0;
+
+  /* Skip leading spaces */
+  while (**str == ' ') (*str)++;
+
+  /* Parse decimal number */
+  while (isdigit(**str)) {
+    res *= 10;
+    res += (*(*str)++) - '0';
+  }
+
+  return res;
+}
+
+/* Parse a CMD-style date and return a pointer to the following char */
+uint8_t parse_date(date_t *date, uint8_t **str) {
+  uint8_t ch;
+
+  date->month = parse_number(str);
+  if (date->month > 12 || *(*str)++ != '/') return 1;
+
+  date->day = parse_number(str);
+  if (date->day > 31 || *(*str)++ != '/') return 1;
+
+  date->year = parse_number(str);
+  /* Y2K */
+  if (date->year < 80)
+    date->year += 100;
+
+  /* Shortcut: Just a date without time */
+  if (!**str || *(*str) == ',') {
+    date->hour = 0;
+    date->minute = 0;
+    date->second = 0;
+    return 0;
+  }
+  if (*(*str)++ != ' ') return 1;
+
+  date->hour = parse_number(str);
+  ch = *(*str)++;
+  if (date->hour > 23 || (ch != ':' && ch != '.')) return 1;
+
+  date->minute = parse_number(str);
+  ch = *(*str)++;
+  if (date->minute > 59) return 1;
+
+  switch (ch) {
+  case ':':
+  case '.':
+    date->second = parse_number(str);
+    if (date->second > 59 || *(*str)++ != ' ') return 1;
+    break;
+
+  case ' ':
+    date->second = 0;
+    break;
+
+  case ',':
+  case 0:
+    /* No AM/PM */
+    (*str)--;
+    date->second = 0;
+    return 0;
+
+  default:
+    return 1;
+  }
+
+  switch(*(*str)++) {
+  case 'A':
+    break;
+  case 'P':
+    date->hour+=12;
+    break;
+  default:
+    return 1;
+  }
+  if (date->hour > 23)
+    return 1;
+
+  if (*(*str)++ != 'M') return 1; // JLB need to check to see if CMD is this anal
+  return 0;
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/parser.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/parser.h
new file mode 100644
index 00000000..abf6554e
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/parser.h
@@ -0,0 +1,68 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   parser.h: Definitions for the common file name parsers
+
+*/
+
+#ifndef PARSER_H
+#define PARSER_H
+
+#include "dirent.h"
+#include "ff.h"
+
+extern partition_t partition[CONFIG_MAX_PARTITIONS];
+extern uint8_t current_part;
+extern uint8_t max_part;
+
+/* Non-zero after any directory change */
+/* Used for disk (image) change detection in some fastloaders */
+/* Must be reset by its user */
+extern uint8_t dir_changed;
+
+/* Update current_dir in partition array */
+void update_current_dir(path_t *path);
+
+/* Parse a partition number */
+uint8_t parse_partition(uint8_t **buf);
+
+/* Performs CBM DOS pattern matching */
+uint8_t match_name(uint8_t *matchstr, cbmdirent_t *dent, uint8_t ignorecase);
+
+/* Returns the next matching dirent */
+int8_t next_match(dh_t *dh, uint8_t *matchstr, date_t *start, date_t *end, uint8_t type, cbmdirent_t *dent);
+
+/* Returns the first matching dirent */
+int8_t first_match(path_t *path, uint8_t *matchstr, uint8_t type, cbmdirent_t *dent);
+
+/* Parses CMD-style directory specifications */
+uint8_t parse_path(uint8_t *in, path_t *path, uint8_t **name, uint8_t parse_always);
+
+/* Check for invalid characters in a name */
+uint8_t check_invalid_name(uint8_t *name);
+
+/* Parse a decimal number at str and return a pointer to the following char */
+uint16_t parse_number(uint8_t **str);
+
+/* parse CMD-style dates */
+uint8_t parse_date(date_t *date, uint8_t **str);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/pcf8583.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/pcf8583.c
new file mode 100644
index 00000000..6b08bc8e
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/pcf8583.c
@@ -0,0 +1,150 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   pcf8583.c: RTC support for PCF8583 chips
+
+   The exported functions in this file are weak-aliased to their corresponding
+   versions defined in rtc.h so when this file is the only RTC implementation
+   compiled in they will be automatically used by the linker.
+
+*/
+
+#include <stdint.h>
+#include <string.h>
+#include "config.h"
+#include "i2c.h"
+#include "progmem.h"
+#include "uart.h"
+#include "ustring.h"
+#include "utils.h"
+#include "time.h"
+#include "rtc.h"
+#include "pcf8583.h"
+
+#define PCF8583_ADDR 0xa0
+
+#define REG_CONTROL 0
+#define REG_S100    1
+#define REG_SECONDS 2
+#define REG_MINUTES 3
+#define REG_HOURS   4
+#define REG_YDATE   5
+#define REG_WMONTH  6
+/* Use the first four ram bytes to store the year and its complement.       */
+/* If the complement doesn't match the RTC contents are considered invalid. */
+#define REG_YEAR1   16
+#define REG_YEAR2   17
+#define REG_YEARC1  18
+#define REG_YEARC2  19
+
+#define CTL_STOP_CLOCK  0x80
+#define CTL_START_CLOCK 0
+
+/* Read the current time from the RTC */
+/* Will auto-adjust the stored year if required */
+void pcf8583_read(struct tm *time) {
+  union {
+    uint8_t  bytes[5];
+    uint16_t words[2];
+  } tmp;
+
+  /* Set to default value in case we abort */
+  memcpy_P(time, &rtc_default_date, sizeof(struct tm));
+  if (rtc_state != RTC_OK)
+    return;
+
+  if (i2c_read_registers(PCF8583_ADDR, REG_SECONDS, 5, &tmp))
+    return;
+
+  time->tm_sec  = bcd2int(tmp.bytes[0]);
+  time->tm_min  = bcd2int(tmp.bytes[1]);
+  time->tm_hour = bcd2int(tmp.bytes[2]);
+  time->tm_mday = bcd2int(tmp.bytes[3] & 0b00111111);
+  time->tm_mon  = bcd2int(tmp.bytes[4] & 0b00011111)-1;
+  time->tm_wday = bcd2int(tmp.bytes[4] >> 5);
+
+  /* Check for year rollover */
+  tmp.bytes[4] = tmp.bytes[3] >> 6;
+  i2c_read_registers(PCF8583_ADDR, REG_YEAR1, 4, &tmp);
+  if ((tmp.words[0] & 3) != tmp.bytes[4]) {
+    /* Year rolled over, increment until the lower two bits match */
+    while ((tmp.words[0] & 3) != tmp.bytes[4]) tmp.words[0]++;
+    tmp.words[1] = tmp.words[0] ^ 0xffffU;
+
+    /* Store new year to RTC ram */
+    i2c_write_registers(PCF8583_ADDR, REG_YEAR1, 4, &tmp);
+  }
+
+  time->tm_year = tmp.words[0]-1900;
+}
+void read_rtc(struct tm *time) __attribute__ ((weak, alias("pcf8583_read")));
+
+/* Set the time in the RTC */
+void pcf8583_set(struct tm *time) {
+  union {
+    uint8_t  bytes[5];
+    uint16_t words[2];
+  } tmp;
+
+  if (rtc_state == RTC_NOT_FOUND)
+    return;
+
+  i2c_write_register(PCF8583_ADDR, REG_CONTROL, CTL_STOP_CLOCK);
+  tmp.bytes[0] = int2bcd(time->tm_sec);
+  tmp.bytes[1] = int2bcd(time->tm_min);
+  tmp.bytes[2] = int2bcd(time->tm_hour);
+  tmp.bytes[3] = int2bcd(time->tm_mday) | ((time->tm_year & 3) << 6);
+  tmp.bytes[4] = int2bcd(time->tm_mon+1)| ((time->tm_wday    ) << 5);
+  i2c_write_registers(PCF8583_ADDR, REG_SECONDS, 5, &tmp);
+  tmp.words[0] = time->tm_year + 1900;
+  tmp.words[1] = (time->tm_year + 1900) ^ 0xffffU;
+  i2c_write_registers(PCF8583_ADDR, REG_YEAR1, 4, &tmp);
+  i2c_write_register(PCF8583_ADDR, REG_CONTROL, CTL_START_CLOCK);
+  rtc_state = RTC_OK;
+}
+void set_rtc(struct tm *time) __attribute__ ((weak, alias("pcf8583_set")));
+
+void pcf8583_init(void) {
+  uint8_t tmp[4];
+
+  rtc_state = RTC_NOT_FOUND;
+  uart_puts_P(PSTR("RTC "));
+  if (i2c_write_register(PCF8583_ADDR, REG_CONTROL, CTL_START_CLOCK) ||
+      i2c_read_registers(PCF8583_ADDR, REG_YEAR1, 4, tmp)) {
+    uart_puts_P(PSTR("not found"));
+  } else {
+    if (tmp[0] == (tmp[2] ^ 0xff) &&
+        tmp[1] == (tmp[3] ^ 0xff)) {
+      rtc_state = RTC_OK;
+      uart_puts_P(PSTR("ok"));
+
+      /* Dummy RTC read to update the year if required */
+      struct tm time;
+      read_rtc(&time);
+    } else {
+      rtc_state = RTC_INVALID;
+      uart_puts_P(PSTR("invalid"));
+    }
+  }
+
+  uart_putcrlf();
+}
+void rtc_init(void) __attribute__ ((weak, alias("pcf8583_init")));
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/pcf8583.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/pcf8583.h
new file mode 100644
index 00000000..fcc3b980
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/pcf8583.h
@@ -0,0 +1,35 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   pcf8583.h: RTC support for PCF8583 chips
+
+*/
+
+#ifndef PCF8583_H
+#define PCF8583_H
+
+#include "time.h"
+
+void pcf8583_init(void);
+void pcf8583_read(struct tm *time);
+void pcf8583_set(struct tm *time);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/rtc.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/rtc.c
new file mode 100644
index 00000000..f4ba712c
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/rtc.c
@@ -0,0 +1,165 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   rtc.c: FatFS support function
+
+*/
+
+#include <inttypes.h>
+#include "config.h"
+#include "ds1307-3231.h"
+#include "pcf8583.h"
+#include "progmem.h"
+#include "rtc_lpc17xx.h"
+#include "softrtc.h"
+#include "time.h"
+#include "rtc.h"
+
+rtcstate_t rtc_state;
+
+/* Default date/time if the RTC isn't present or not set: 1982-08-31 00:00:00 */
+const PROGMEM struct tm rtc_default_date = {
+  0, 0, 0, 31, 8-1, 82, 2
+};
+
+/* Return current time in a FAT-compatible format */
+uint32_t get_fattime(void) {
+  struct tm time;
+
+  read_rtc(&time);
+  return ((uint32_t)time.tm_year-80) << 25 |
+    ((uint32_t)time.tm_mon+1) << 21 |
+    ((uint32_t)time.tm_mday)  << 16 |
+    ((uint32_t)time.tm_hour)  << 11 |
+    ((uint32_t)time.tm_min)   << 5  |
+    ((uint32_t)time.tm_sec)   >> 1;
+}
+
+#ifdef NEED_RTCMUX
+/* RTC "multiplexer" to select the best available RTC at runtime */
+
+typedef enum { RTC_NONE, RTC_SOFTWARE, RTC_PCF8583,
+               RTC_LPC17XX, RTC_DSRTC } rtc_type_t;
+
+static rtc_type_t current_rtc = RTC_NONE;
+
+void rtc_init(void) {
+#if defined(CONFIG_RTC_DS3231) || defined(CONFIG_RTC_DS1307)
+  dsrtc_init();
+  if (rtc_state != RTC_NOT_FOUND) {
+    current_rtc = RTC_DSRTC;
+    return;
+  }
+#endif
+
+#ifdef CONFIG_RTC_PCF8583
+  pcf8583_init();
+  if (rtc_state != RTC_NOT_FOUND) {
+    current_rtc = RTC_PCF8583;
+    return;
+  }
+#endif
+
+#ifdef CONFIG_RTC_LPC17XX
+  lpcrtc_init();
+  if (rtc_state != RTC_NOT_FOUND) {
+    current_rtc = RTC_LPC17XX;
+    return;
+  }
+#endif
+
+#ifdef CONFIG_RTC_SOFTWARE
+  softrtc_init();
+  /* This is the fallback RTC that will always work */
+  return;
+#endif
+
+  /* none of the enabled RTCs were found */
+  rtc_state = RTC_NOT_FOUND;
+}
+
+void read_rtc(struct tm *time) {
+  switch (current_rtc) {
+
+#if defined(CONFIG_RTC_DS3231) || defined(CONFIG_RTC_DS1307)
+  case RTC_DSRTC:
+    dsrtc_read(time);
+    break;
+#endif
+
+#ifdef CONFIG_RTC_PCF8583
+  case RTC_PCF8583:
+    pcf8583_read(time);
+    break;
+#endif
+
+#ifdef CONFIG_RTC_LPC17XX
+  case RTC_LPC17XX:
+    lpcrtc_read(time);
+    break;
+#endif
+
+#ifdef CONFIG_RTC_SOFTWARE
+  case RTC_SOFTWARE:
+    softrtc_read(time);
+    break;
+#endif
+
+  case RTC_NONE:
+  default:
+    return;
+  }
+}
+
+void set_rtc(struct tm *time) {
+  switch (current_rtc) {
+
+#if defined(CONFIG_RTC_DS3231) || defined(CONFIG_RTC_DS1307)
+  case RTC_DSRTC:
+    dsrtc_set(time);
+    break;
+#endif
+
+#ifdef CONFIG_RTC_PCF8583
+  case RTC_PCF8583:
+    pcf8583_set(time);
+    break;
+#endif
+
+#ifdef CONFIG_RTC_LPC17XX
+  case RTC_LPC17XX:
+    lpcrtc_set(time);
+    break;
+#endif
+
+#ifdef CONFIG_RTC_SOFTWARE
+  case RTC_SOFTWARE:
+    softrtc_set(time);
+    break;
+#endif
+
+  case RTC_NONE:
+  default:
+    return;
+  }
+}
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/rtc.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/rtc.h
new file mode 100644
index 00000000..75c4965a
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/rtc.h
@@ -0,0 +1,62 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   rtc.h: Definitions for RTC support
+
+   There is no rtc.c, the functions defined here are implemented by a
+   device-specific .c file, e.g. pcf8583.c.
+
+*/
+
+#ifndef RTC_H
+#define RTC_H
+
+#include "time.h"
+
+typedef enum {
+  RTC_NOT_FOUND,  /* No RTC present                    */
+  RTC_INVALID,    /* RTC present, but contents invalid */
+  RTC_OK          /* RTC present and working           */
+} rtcstate_t;
+
+# ifdef HAVE_RTC
+
+extern const /* PROGMEM */ struct tm rtc_default_date;
+extern rtcstate_t rtc_state;
+
+/* detect and initialize RTC */
+void rtc_init(void);
+
+/* Return current time in struct tm */
+void read_rtc(struct tm *time);
+
+/* Set time from struct tm */
+void set_rtc(struct tm *time);
+
+# else  // HAVE_RTC
+
+#  define rtc_state RTC_NOT_FOUND
+
+#  define rtc_init()    do {} while(0)
+
+# endif // HAVE_RTC
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/rtc_lpc17xx.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/rtc_lpc17xx.h
new file mode 100644
index 00000000..7bd149b2
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/rtc_lpc17xx.h
@@ -0,0 +1,35 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   rtc_lpc17xx.h: RTC support for the LPC17xx internal RTC
+
+*/
+
+#ifndef RTC_LPC17XX_H
+#define RTC_LPC17XX_H
+
+#include "time.h"
+
+void lpcrtc_init(void);
+void lpcrtc_read(struct tm *time);
+void lpcrtc_set(struct tm *time);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/sdcard.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/sdcard.c
new file mode 100644
index 00000000..8c96e681
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/sdcard.c
@@ -0,0 +1,758 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   sdcard.c: SD/MMC access routines
+
+
+   The exported functions in this file are weak-aliased to their corresponding
+   versions defined in diskio.h so when this file is the only diskio provider
+   compiled in they will be automatically used by the linker.
+
+*/
+
+#include "config.h"
+#include "crc.h"
+#include "diskio.h"
+#include "spi.h"
+#include "timer.h"
+#include "uart.h"
+#include "sdcard.h"
+
+#ifdef CONFIG_TWINSD
+#  define MAX_CARDS 2
+#else
+#  define MAX_CARDS 1
+#endif
+
+/* SD/MMC commands */
+#define GO_IDLE_STATE             0x40
+#define SEND_OP_COND              0x41
+#define SWITCH_FUNC               0x46
+#define SEND_IF_COND              0x48
+#define SEND_CSD                  0x49
+#define SEND_CID                  0x4a
+#define STOP_TRANSMISSION         0x4c
+#define SEND_STATUS               0x4d
+#define SET_BLOCKLEN              0x50
+#define READ_SINGLE_BLOCK         0x51
+#define READ_MULTIPLE_BLOCK       0x52
+#define WRITE_BLOCK               0x58
+#define WRITE_MULTIPLE_BLOCK      0x59
+#define PROGRAM_CSD               0x5b
+#define SET_WRITE_PROT            0x5c
+#define CLR_WRITE_PROT            0x5d
+#define SEND_WRITE_PROT           0x5e
+#define ERASE_WR_BLK_STAR_ADDR    0x60
+#define ERASE_WR_BLK_END_ADDR     0x61
+#define ERASE                     0x66
+#define LOCK_UNLOCK               0x6a
+#define APP_CMD                   0x77
+#define GEN_CMD                   0x78
+#define READ_OCR                  0x7a
+#define CRC_ON_OFF                0x7b
+
+/* SD ACMDs */
+#define SD_STATUS                 0x4d
+#define SD_SEND_NUM_WR_BLOCKS     0x56
+#define SD_SET_WR_BLK_ERASE_COUNT 0x57
+#define SD_SEND_OP_COND           0x69
+#define SD_SET_CLR_CARD_DETECT    0x6a
+#define SD_SEND_SCR               0x73
+
+/* R1 status bits */
+#define STATUS_IN_IDLE            0x01
+#define STATUS_ERASE_RESET        0x02
+#define STATUS_ILLEGAL_COMMAND    0x04
+#define STATUS_CRC_ERROR          0x08
+#define STATUS_ERASE_SEQ_ERROR    0x10
+#define STATUS_ADDRESS_ERROR      0x20
+#define STATUS_PARAMETER_ERROR    0x40
+
+/* card types */
+#define CARD_MMCSD 0
+#define CARD_SDHC  1
+
+static uint8_t cardtype[MAX_CARDS];
+
+/* ------------------------------------------------------------------------- */
+/*  Utility functions                                                        */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * swap_word - swaps the bytes in a uint32 value
+ * @input: input byte
+ *
+ * This function swaps the words in a uint32 value to convert
+ * between little and big endian. Returns the word with bytes
+ * swapped.
+ */
+#ifdef __thumb2__
+static inline uint32_t swap_word(uint32_t input) {
+  uint32_t result;
+  asm("rev %[result], %[input]" : [result] "=r" (result) : [input] "r" (input));
+  return result;
+}
+#else
+static inline uint32_t swap_word(uint32_t input) {
+  union {
+    uint32_t val32;
+    uint8_t  val8[4];
+  } in,out;
+
+  /* Compiles to a few movs on AVR */
+  in.val32 = input;
+  out.val8[0] = in.val8[3];
+  out.val8[1] = in.val8[2];
+  out.val8[2] = in.val8[1];
+  out.val8[3] = in.val8[0];
+  return out.val32;
+}
+#endif
+
+/**
+ * getbits - read value from bit buffer
+ * @buffer: pointer to the data buffer
+ * @start : index of the first bit in the value
+ * @bits  : number of bits in the value
+ *
+ * This function returns a value from the memory region passed as
+ * buffer, starting with bit "start" and "bits" bit long. The buffer
+ * is assumed to be MSB first, passing 0 for start will read starting
+ * from the highest-value bit of the first byte of the buffer.
+ */
+static uint32_t getbits(void *buffer, uint16_t start, int8_t bits) {
+  uint8_t *buf = buffer;
+  uint32_t result = 0;
+
+  if ((start % 8) != 0) {
+    /* Unaligned start */
+    result += buf[start / 8] & (0xff >> (start % 8));
+    bits  -= 8 - (start % 8);
+    start += 8 - (start % 8);
+  }
+  while (bits >= 8) {
+    result = (result << 8) + buf[start / 8];
+    start += 8;
+    bits -= 8;
+  }
+  if (bits > 0) {
+    result = result << bits;
+    result = result + (buf[start / 8] >> (8-bits));
+  } else if (bits < 0) {
+    /* Fraction of a single byte */
+    result = result >> -bits;
+  }
+  return result;
+}
+
+/* ------------------------------------------------------------------------- */
+/*  internal SD functions                                                    */
+/* ------------------------------------------------------------------------- */
+
+/* Detect changes of SD card 0 */
+#ifdef SD_CHANGE_HANDLER
+SD_CHANGE_HANDLER {
+  if (sdcard_detect())
+    disk_state = DISK_CHANGED;
+  else
+    disk_state = DISK_REMOVED;
+}
+#endif
+
+#if defined(CONFIG_TWINSD) && defined(SD2_CHANGE_HANDLER)
+/* Detect changes of SD card 1 */
+SD2_CHANGE_HANDLER {
+  if (sdcard2_detect())
+    disk_state = DISK_CHANGED;
+  else
+    disk_state = DISK_REMOVED;
+}
+#endif
+
+/* wait for a certain byte from the card */
+/* (with 500ms timeout) */
+static uint8_t expect_byte(uint8_t value) {
+  uint8_t b;
+  tick_t  timeout = getticks() + HZ/2;
+
+  do {
+    b = spi_rx_byte();
+  } while (b != value && time_before(getticks(), timeout));
+
+  return b == value;
+}
+
+/* deselect card(s) and send 24 clocks */
+/* (was 8, but some cards prefer more) */
+static void deselect_card(void) {
+  spi_select_device(SPIDEV_NONE);
+  set_sd_led(0);
+  spi_rx_byte();
+  spi_rx_byte();
+  spi_rx_byte();
+}
+
+/* check if card in @drv is write protected */
+static uint8_t sd_wrprot(uint8_t drv) {
+#ifdef CONFIG_TWINSD
+  if (drv != 0)
+    return sdcard2_wp();
+  else
+#endif
+    return sdcard_wp();
+}
+
+/**
+ * sendCommand - send a command to the SD card
+ * @card     : card number to be accessed
+ * @cmd      : command to be sent
+ * @parameter: parameter to be sent
+ *
+ * This function calculates the correct CRC7 for the command and
+ * parameter and transmits all of it to the SD card.
+ */
+static uint8_t send_command(const uint8_t  card,
+                            const uint8_t  cmd,
+                            const uint32_t parameter) {
+  tick_t   timeout;
+  uint8_t  crc, errors, res;
+  uint32_t tmp;
+
+  // FIXME: Only works on little-endian
+  // (but is much more efficient on AVR)
+  union {
+    uint32_t val32;
+    uint8_t  val8[4];
+  } convert;
+
+  /* calculate CRC for command+parameter */
+  convert.val32 = parameter;
+  crc = crc7update(0,   cmd);
+  crc = crc7update(crc, convert.val8[3]);
+  crc = crc7update(crc, convert.val8[2]);
+  crc = crc7update(crc, convert.val8[1]);
+  crc = crc7update(crc, convert.val8[0]);
+  crc = (crc << 1) | 1;
+
+  errors = 0;
+  while (errors < CONFIG_SD_AUTO_RETRIES) {
+    /* select card */
+    spi_select_device(card+1);
+    set_sd_led(1);
+
+    /* send command */
+    spi_tx_byte(cmd);
+    tmp = swap_word(parameter); // AVR spi_tx_block clobbers the buffer
+    spi_tx_block(&tmp, 4);
+    spi_tx_byte(crc);
+
+    /* wait up to 500ms for a valid response */
+    timeout = getticks() + HZ/2;
+    do {
+      res = spi_rx_byte();
+    } while ((res & 0x80) &&
+             time_before(getticks(), timeout));
+
+    /* check for CRC error */
+    if (res & STATUS_CRC_ERROR) {
+      uart_putc('x');
+      deselect_card();
+      errors++;
+      continue;
+    }
+
+    break; // FIXME: Ugly control flow
+  }
+
+  return res;
+}
+
+/* ------------------------------------------------------------------------- */
+/*  external SD functions                                                    */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * sd_init - initialize SD interface
+ *
+ * This function initializes the SD interface hardware
+ */
+void sd_init(void) {
+  sdcard_interface_init();
+}
+void disk_init(void) __attribute__ ((weak, alias("sd_init")));
+
+
+/**
+ * sd_status - get card status
+ * @drv: drive
+ *
+ * This function reads the current status of the chosen
+ * SD card. Returns STA_PROTECT for a write-protected
+ * card, STA_NOINIT|STA_NODISK if no card is present in
+ * the selected slot, RES_OK if a card is present and
+ * not write-protected.
+ */
+DSTATUS sd_status(BYTE drv) {
+#ifdef CONFIG_TWINSD
+  if (drv != 0) {
+    if (sdcard2_detect()) {
+      if (sdcard2_wp()) {
+        return STA_PROTECT;
+      } else {
+        return RES_OK;
+      }
+    } else {
+      return STA_NOINIT | STA_NODISK;
+    }
+  } else
+#endif
+  if (sdcard_detect())
+    if (sdcard_wp())
+      return STA_PROTECT;
+    else
+      return RES_OK;
+  else
+    return STA_NOINIT | STA_NODISK;
+}
+DSTATUS disk_status(BYTE drv) __attribute__ ((weak, alias("sd_status")));
+
+
+/**
+ * sd_initialize - initialize SD card
+ * @drv   : drive
+ *
+ * This function tries to initialize the selected SD card.
+ */
+DSTATUS sd_initialize(BYTE drv) {
+  uint32_t parameter;
+  uint16_t tries = 3;
+  uint8_t  i,res;
+  tick_t   timeout;
+
+  if (drv >= MAX_CARDS)
+    return STA_NOINIT | STA_NODISK;
+
+  /* skip initialisation if the card is not present */
+  if (sd_status(drv) & STA_NODISK)
+    return sd_status(drv);
+
+#ifdef SPI_LATE_INIT
+  /* JLB: Should be in sd_init, but some uIEC versions have
+   * IEC lines tied to SPI, so I moved it here to resolve the
+   * conflict.
+   */
+  spi_init(SPI_SPEED_SLOW);
+#else
+  spi_set_speed(SPI_SPEED_SLOW);
+#endif
+
+ retry:
+  disk_state = DISK_ERROR;
+  cardtype[drv] = CARD_MMCSD;
+
+  /* send 80 clocks with SS high */
+  spi_select_device(SPIDEV_NONE);
+  set_sd_led(0);
+
+  for (i=0; i<10; i++)
+    spi_tx_byte(0xff);
+
+#ifdef CONFIG_TWINSD
+  /* move both cards into SPI mode at the same time */
+  if (drv == 0) {
+    spi_select_device(SPIDEV_ALLCARDS);
+    spi_tx_byte(GO_IDLE_STATE);
+    parameter = 0;
+    spi_tx_block(&parameter, 0);
+    spi_tx_byte(0x95);
+
+    /* send ten more bytes and ignore status */
+    for (i=0; i<10; i++)
+      spi_tx_byte(0xff);
+  }
+#endif
+
+  /* switch card to idle state */
+  res = send_command(drv, GO_IDLE_STATE, 0);
+  deselect_card();
+  if (res & 0x80)
+    return STA_NOINIT;
+
+  /* attempt initialisation again if it failed */
+  if (res != 1) {
+    if (--tries)
+      goto retry;
+    else
+      return STA_NOINIT;
+  }
+
+  /* send interface conditions (required for SDHC) */
+  res = send_command(drv, SEND_IF_COND, 0b000110101010);
+  if (res == 1) {
+    /* read answer and check */
+    spi_rx_block(&parameter, 4);
+    parameter = swap_word(parameter);
+    deselect_card();
+    if (((parameter >> 8) & 0x0f) != 0b0001)
+      /* the card did not accept the voltage specs */
+      return STA_NOINIT | STA_NODISK;
+
+    /* do not check pattern echo because IIRC */
+    /* some MMC cards would fail here */
+  } else {
+    deselect_card();
+  }
+
+  deselect_card();
+
+  /* tell SD/SDHC cards to initialize */
+  timeout = getticks() + HZ/2;
+  do {
+    /* send APP_CMD */
+    res = send_command(drv, APP_CMD, 0);
+    deselect_card();
+    if (res != 1)
+      goto not_sd;
+
+    /* send SD_SEND_OP_COND */
+    res = send_command(drv, SD_SEND_OP_COND, 1L<<30);
+    deselect_card();
+  } while (res == 1 && time_before(getticks(), timeout));
+
+  /* failure just means that the card isn't SDHC */
+  /* there are MMC cards that accept APP_CMD but not SD_SEND_OP_COND */
+  if (res != 0)
+    goto not_sd;
+
+  /* send READ_OCR to detect SDHC cards */
+  res = send_command(drv, READ_OCR, 0);
+
+  if (res <= 1) {
+    parameter = 0;
+    spi_rx_block(&parameter, 4);
+
+    /* check card type */
+    if (parameter & swap_word(0x40000000))
+      cardtype[drv] = CARD_SDHC;
+  }
+
+  deselect_card();
+
+ not_sd:
+  /* tell MMC cards to initialize (SD ignores this) */
+  timeout = getticks() + HZ/2;
+  do {
+    res = send_command(drv, SEND_OP_COND, 1L<<30);
+    deselect_card();
+  } while (res != 0 && time_before(getticks(), timeout));
+
+  if (res != 0)
+    return STA_NOINIT;
+
+  /* enable CRC checks */
+  res = send_command(drv, CRC_ON_OFF, 1);
+  deselect_card();
+  if (res > 1)
+    return STA_NOINIT | STA_NODISK;
+
+  /* set block size to 512 */
+  res = send_command(drv, SET_BLOCKLEN, 512);
+  deselect_card();
+  if (res != 0)
+    return STA_NOINIT;
+
+  spi_set_speed(SPI_SPEED_FAST);
+  disk_state = DISK_OK;
+
+  return sd_status(drv);
+}
+DSTATUS disk_initialize(BYTE drv) __attribute__ ((weak, alias("sd_initialize")));
+
+
+/**
+ * sd_read - reads sectors from the SD card to buffer
+ * @drv   : drive
+ * @buffer: pointer to the buffer
+ * @sector: first sector to be read
+ * @count : number of sectors to be read
+ *
+ * This function reads count sectors from the SD card starting
+ * at sector to buffer. Returns RES_ERROR if an error occured or
+ * RES_OK if successful. Up to SD_AUTO_RETRIES will be made if
+ * the calculated data CRC does not match the one sent by the
+ * card. If there were errors during the command transmission
+ * disk_state will be set to DISK_ERROR and no retries are made.
+ */
+DRESULT sd_read(BYTE drv, BYTE *buffer, DWORD sector, BYTE count) {
+  uint8_t  res, sec, errors;
+  uint16_t crc, recvcrc;
+
+  if (drv >= MAX_CARDS)
+    return RES_PARERR;
+
+  /* convert sector number to byte offset for non-SDHC cards */
+  if (cardtype[drv] == CARD_MMCSD)
+    sector <<= 9;
+
+  for (sec = 0; sec < count; sec++) {
+    errors = 0;
+    while (errors < CONFIG_SD_AUTO_RETRIES) {
+      /* send read command */
+      if (cardtype[drv] & CARD_SDHC)
+        res = send_command(drv, READ_SINGLE_BLOCK, sector + sec);
+      else
+        res = send_command(drv, READ_SINGLE_BLOCK, sector + (sec << 9));
+
+      /* fail if the command wasn't accepted */
+      if (res != 0) {
+        deselect_card();
+        disk_state = DISK_ERROR;
+        return RES_ERROR;
+      }
+
+      /* wait for start block token */
+      if (!expect_byte(0xfe)) {
+        deselect_card();
+        disk_state = DISK_ERROR;
+        return RES_ERROR;
+      }
+
+      /* transfer data */
+      crc = 0;
+#ifdef CONFIG_SD_BLOCKTRANSFER
+      /* transfer data first, calculate CRC afterwards */
+      spi_rx_block(buffer, 512);
+
+      recvcrc = spi_rx_byte() << 8 | spi_rx_byte();
+      crc = crc_xmodem_block(0, buffer, 512);
+#else
+      /* interleave transfer/CRC calculation, AVR-optimized */
+      uint16_t i;
+      uint8_t  tmp;
+      BYTE     *ptr = buffer;
+
+      /* start SPI data exchange */
+      SPDR = 0xff;
+
+      for (i=0; i<512; i++) {
+        /* wait until byte available */
+        loop_until_bit_is_set(SPSR, SPIF);
+        tmp = SPDR;
+        /* transmit the next byte while the current one is processed */
+        SPDR = 0xff;
+
+        *ptr++ = tmp;
+        crc = crc_xmodem_update(crc, tmp);
+      }
+      /* wait for the first CRC byte */
+      loop_until_bit_is_set(SPSR, SPIF);
+
+      recvcrc  = SPDR << 8;
+      recvcrc |= spi_rx_byte();
+#endif
+
+      /* check CRC */
+      if (recvcrc != crc) {
+        uart_putc('X');
+        deselect_card();
+        errors++;
+        continue;
+      }
+
+      break; // FIXME: Ugly control flow
+    }
+    deselect_card();
+
+    if (errors >= CONFIG_SD_AUTO_RETRIES)
+      return RES_ERROR;
+
+    buffer += 512;
+  }
+
+  return RES_OK;
+}
+DRESULT disk_read(BYTE drv, BYTE *buffer, DWORD sector, BYTE count) __attribute__ ((weak, alias("sd_read")));
+
+
+/**
+ * sd_write - writes sectors from buffer to the SD card
+ * @drv   : drive
+ * @buffer: pointer to the buffer
+ * @sector: first sector to be written
+ * @count : number of sectors to be written
+ *
+ * This function writes count sectors from buffer to the SD card
+ * starting at sector. Returns RES_ERROR if an error occured,
+ * RES_WPRT if the card is currently write-protected or RES_OK
+ * if successful. Up to SD_AUTO_RETRIES will be made if the card
+ * signals a CRC error. If there were errors during the command
+ * transmission disk_state will be set to DISK_ERROR and no retries
+ * are made.
+ */
+DRESULT sd_write(BYTE drv, const BYTE *buffer, DWORD sector, BYTE count) {
+  uint8_t  res, sec, errors;
+  uint16_t crc;
+
+  if (drv >= MAX_CARDS)
+    return RES_PARERR;
+
+  /* check write protect */
+  if (sd_wrprot(drv))
+    return RES_WRPRT;
+
+  /* convert sector number to byte offset for non-SDHC cards */
+  if (cardtype[drv] == CARD_MMCSD)
+    sector <<= 9;
+
+  for (sec = 0; sec < count; sec++) {
+    errors = 0;
+    while (errors < CONFIG_SD_AUTO_RETRIES) {
+      /* send write command */
+      if (cardtype[drv] & CARD_SDHC)
+        res = send_command(drv, WRITE_BLOCK, sector + sec);
+      else
+        res = send_command(drv, WRITE_BLOCK, sector + (sec << 9));
+
+      /* fail if the command wasn't accepted */
+      if (res != 0) {
+        deselect_card();
+        disk_state = DISK_ERROR;
+        return RES_ERROR;
+      }
+
+      /* send data token */
+      spi_tx_byte(0xfe);
+
+      /* transfer data */
+#ifdef CONFIG_SD_BLOCKTRANSFER
+      spi_tx_block(buffer, 512);
+      crc = crc_xmodem_block(0, buffer, 512);
+#else
+      /* interleave transfer/CRC calculations, AVR-optimized */
+      uint16_t i;
+      const BYTE *ptr = buffer;
+
+      crc = 0;
+      spi_select_device(drv+1);
+      for (i=0; i<512; i++) {
+        SPDR = *ptr;
+        crc = crc_xmodem_update(crc, *ptr++);
+        loop_until_bit_is_set(SPSR, SPIF);
+      }
+#endif
+
+      /* send CRC */
+      spi_tx_byte(crc >> 8);
+      spi_tx_byte(crc & 0xff);
+
+      /* read status byte */
+      res = spi_rx_byte();
+
+      /* retry on error */
+      if ((res & 0x0f) != 0x05) {
+        uart_putc('X');
+        deselect_card();
+        errors++;
+        continue;
+      }
+
+      /* wait until write is finished */
+      // FIXME: Timeout?
+      do {
+        res = spi_rx_byte();
+      } while (res == 0);
+
+      break; // FIXME: Ugly control flow
+    }
+    deselect_card();
+
+    if (errors >= CONFIG_SD_AUTO_RETRIES) {
+      return RES_ERROR;
+    }
+
+    buffer += 512;
+  }
+
+  return RES_OK;
+}
+DRESULT disk_write(BYTE drv, const BYTE *buffer, DWORD sector, BYTE count) __attribute__ ((weak, alias("sd_write")));
+
+
+/**
+ * sd_getinfo - read card information
+ * @drv   : drive
+ * @page  : information page
+ * @buffer: target buffer
+ *
+ * This function returns the requested information page @page
+ * for card @drv in the buffer @buffer. Currently only page
+ * 0 is supported which is the diskinfo0_t structure defined
+ * in diskio.h. Returns a DRESULT to indicate success/failure.
+ */
+DRESULT sd_getinfo(BYTE drv, BYTE page, void *buffer) {
+  uint8_t buf[18];
+  uint8_t res;
+  uint32_t capacity;
+
+  if (drv >= MAX_CARDS)
+    return RES_NOTRDY;
+
+  if (sd_status(drv) & STA_NODISK)
+    return RES_NOTRDY;
+
+  if (page != 0)
+    return RES_ERROR;
+
+  /* Try to calculate the total number of sectors on the card */
+  if (send_command(drv, SEND_CSD, 0) != 0) {
+    deselect_card();
+    return RES_ERROR;
+  }
+
+  /* Wait for data token */
+  // FIXME: Timeout?
+  do {
+    res = spi_rx_byte();
+  } while (res == 0);
+
+  spi_rx_block(buf, 18);
+  deselect_card();
+
+  if (cardtype[drv] & CARD_SDHC) {
+    /* Special CSD for SDHC cards */
+    capacity = (1 + getbits(buf,127-69,22)) * 1024;
+  } else {
+    /* Assume that MMC-CSD 1.0/1.1/1.2 and SD-CSD 1.1 are the same... */
+    uint8_t exponent = 2 + getbits(buf, 127-49, 3);
+    capacity = 1 + getbits(buf, 127-73, 12);
+    exponent += getbits(buf, 127-83,4) - 9;
+    while (exponent--) capacity *= 2;
+  }
+
+  diskinfo0_t *di = buffer;
+  di->validbytes  = sizeof(diskinfo0_t);
+  di->disktype    = DISK_TYPE_SD;
+  di->sectorsize  = 2;
+  di->sectorcount = capacity;
+
+  return RES_OK;
+}
+DRESULT disk_getinfo(BYTE drv, BYTE page, void *buffer) __attribute__ ((weak, alias("sd_getinfo")));
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/sdcard.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/sdcard.h
new file mode 100644
index 00000000..eb0b34f4
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/sdcard.h
@@ -0,0 +1,39 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   sdcard.h: Definitions for the SD/MMC access routines
+
+*/
+
+#ifndef SDCARD_H
+#define SDCARD_H
+
+#include "diskio.h"
+
+/* These functions are weak-aliased to disk_... */
+void    sd_init(void);
+DSTATUS sd_status(BYTE drv);
+DSTATUS sd_initialize(BYTE drv);
+DRESULT sd_read(BYTE drv, BYTE *buffer, DWORD sector, BYTE count);
+DRESULT sd_write(BYTE drv, const BYTE *buffer, DWORD sector, BYTE count);
+DRESULT sd_getinfo(BYTE drv, BYTE page, void *buffer);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/softrtc.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/softrtc.h
new file mode 100644
index 00000000..37f93d70
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/softrtc.h
@@ -0,0 +1,41 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   softrtc.h: software RTC emulation
+
+*/
+
+#ifndef SOFTRTC_H
+#define SOFTRTC_H
+
+#include "time.h"
+
+void softrtc_read(struct tm *time);
+void softrtc_set(struct tm *time);
+void softrtc_init(void);
+
+#ifdef CONFIG_RTC_SOFTWARE
+void softrtc_tick(void);
+#else
+#  define softrtc_tick() do {} while (0)
+#endif
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/system.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/system.h
new file mode 100644
index 00000000..2eae87e6
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/system.h
@@ -0,0 +1,45 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   system.h: System-specific initialisation
+
+*/
+
+#ifndef SYSTEM_H
+#define SYSTEM_H
+
+/* Early initialisation, called immediately in main() */
+void system_init_early(void);
+
+/* Late initialisation, called after all hardware is set up */
+void system_init_late(void);
+
+/* Put MCU into low-power mode until the next interrupt */
+void system_sleep(void);
+
+/* Reset MCU */
+__attribute__((noreturn)) void system_reset(void);
+
+/* Enable/disable interrupts */
+void disable_interrupts(void);
+void enable_interrupts(void);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/time.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/time.h
new file mode 100644
index 00000000..5452d409
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/time.h
@@ -0,0 +1,41 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   time.h: Time structure definition
+
+*/
+
+#ifndef TIME_H
+#define TIME_H
+
+typedef uint32_t softtime_t;
+struct tm {
+  uint8_t tm_sec;  // 0..59
+  uint8_t tm_min;  // 0..59
+  uint8_t tm_hour; // 0..23
+  uint8_t tm_mday; // 1..[28..31]
+  uint8_t tm_mon;  // 0..11
+  uint8_t tm_year; // since 1900, i.e. 2000 is 100
+  uint8_t tm_wday; // 0 to 6, sunday is 0
+  // A Unix struct tm has a few more fields we don't need in this application
+};
+
+#endif	/* TIME_H */
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/timer.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/timer.c
new file mode 100644
index 00000000..70c284a4
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/timer.c
@@ -0,0 +1,116 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   timer.c: System timer (and button debouncer)
+
+*/
+
+#include "config.h"
+#include "diskchange.h"
+#include "display.h"
+#include "led.h"
+#include "time.h"
+#include "rtc.h"
+#include "softrtc.h"
+#include "timer.h"
+
+#define DEBOUNCE_TICKS 4
+#define SLEEP_TICKS    2*HZ
+
+volatile tick_t ticks;
+// Logical buttons
+volatile uint8_t active_keys;
+
+// Physical buttons
+rawbutton_t buttonstate;
+tick_t      lastbuttonchange;
+
+/* Called by the timer interrupt when the button state has changed */
+static void buttons_changed(void) {
+  /* Check if the previous state was stable for two ticks */
+  if (time_after(ticks, lastbuttonchange + DEBOUNCE_TICKS)) {
+    if (active_keys & IGNORE_KEYS) {
+      active_keys &= ~IGNORE_KEYS;
+    } else if (BUTTON_PREV && /* match only if PREV exists */
+               !(buttonstate & (BUTTON_PREV|BUTTON_NEXT))) {
+      /* Both buttons held down */
+        active_keys |= KEY_HOME;
+    } else if (!(buttonstate & BUTTON_NEXT) &&
+               (buttons_read() & BUTTON_NEXT)) {
+      /* "Next" button released */
+      active_keys |= KEY_NEXT;
+    } else if (BUTTON_PREV && /* match only if PREV exists */
+               !(buttonstate & BUTTON_PREV) &&
+               (buttons_read() & BUTTON_NEXT)) {
+      active_keys |= KEY_PREV;
+    }
+  }
+
+  lastbuttonchange = ticks;
+  buttonstate = buttons_read();
+}
+
+/* The main timer interrupt */
+SYSTEM_TICK_HANDLER {
+  rawbutton_t tmp = buttons_read();
+
+  if (tmp != buttonstate) {
+    buttons_changed();
+  }
+
+  ticks++;
+
+#ifdef SINGLE_LED
+  if (led_state & LED_ERROR) {
+    if ((ticks & 15) == 0)
+      toggle_led();
+  } else {
+    set_led((led_state & LED_BUSY) || (led_state & LED_DIRTY));
+  }
+#else
+  if (led_state & LED_ERROR)
+    if ((ticks & 15) == 0)
+      toggle_dirty_led();
+#endif
+
+  /* Sleep button triggers when held down for 2sec */
+  if (time_after(ticks, lastbuttonchange + DEBOUNCE_TICKS)) {
+    if (!(buttonstate & BUTTON_NEXT) &&
+        (!BUTTON_PREV || (buttonstate & BUTTON_PREV)) &&
+        time_after(ticks, lastbuttonchange + SLEEP_TICKS) &&
+        !key_pressed(KEY_SLEEP)) {
+      /* Set ignore flag so the release doesn't trigger KEY_NEXT */
+      active_keys |= KEY_SLEEP | IGNORE_KEYS;
+      /* Avoid triggering for the next two seconds */
+      lastbuttonchange = ticks;
+    }
+  }
+
+  /* send tick to the software RTC emulation */
+  softrtc_tick();
+
+#ifdef CONFIG_REMOTE_DISPLAY
+  /* Check if the display wants to be queried */
+  if (display_intrq_active()) {
+    active_keys |= KEY_DISPLAY;
+  }
+#endif
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/timer.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/timer.h
new file mode 100644
index 00000000..1a3caf98
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/timer.h
@@ -0,0 +1,93 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   timer.h: System timer (and button-debouncer)
+
+*/
+
+#ifndef TIMER_H
+#define TIMER_H
+
+#include "arch-timer.h"
+#include "atomic.h"
+
+// Bit masks for the (simulated) keys
+#define KEY_NEXT    (1<<0)
+#define KEY_PREV    (1<<1)
+#define KEY_HOME    (1<<2)
+#define KEY_SLEEP   (1<<3)
+/* Remote display service request */
+#define KEY_DISPLAY (1<<4)
+
+#define IGNORE_KEYS (1<<7)
+
+/// Logical keys that were pressed - must be reset by the reader.
+extern volatile uint8_t active_keys;
+
+#define key_pressed(x) (active_keys & (x))
+#define reset_key(x)   active_keys &= (uint8_t)~(x)
+#define ignore_keys()  active_keys = IGNORE_KEYS;
+
+/// Global timing variable, 100 ticks per second
+/// Use getticks() !
+extern volatile tick_t ticks;
+
+/**
+ * getticks - return the current system tick count
+ *
+ * This inline function returns the current system tick count.
+ */
+static inline tick_t getticks(void) {
+  tick_t tmp;
+  ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
+    tmp = ticks;
+  }
+  return tmp;
+}
+
+#define HZ 100
+
+#define MS_TO_TICKS(x) (x/10)
+
+/* Adapted from Linux 2.6 include/linux/jiffies.h:
+ *
+ *      These inlines deal with timer wrapping correctly. You are
+ *      strongly encouraged to use them
+ *      1. Because people otherwise forget
+ *      2. Because if the timer wrap changes in future you won't have to
+ *         alter your driver code.
+ *
+ * time_after(a,b) returns true if the time a is after time b.
+ *
+ * Do this with "<0" and ">=0" to only test the sign of the result. A
+ * good compiler would generate better code (and a really good compiler
+ * wouldn't care). Gcc is currently neither.
+ * (">=0" refers to the time_after_eq macro which wasn't copied)
+ */
+#define time_after(a,b)         \
+         ((stick_t)(b) - (stick_t)(a) < 0)
+#define time_before(a,b)        time_after(b,a)
+
+
+/* Timer initialisation - defined in $ARCH/timer-init.c */
+void timer_init(void);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/uart.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/uart.h
new file mode 100644
index 00000000..45621e6b
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/uart.h
@@ -0,0 +1,59 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   uart.h: Definitions for the UART access routines
+
+*/
+
+#ifndef UART_H
+#define UART_H
+
+#ifdef CONFIG_UART_DEBUG
+
+#include "progmem.h"
+
+void uart_init(void);
+unsigned char uart_getc(void);
+void uart_putc(char c);
+void uart_puthex(uint8_t num);
+void uart_trace(void *ptr, uint16_t start, uint16_t len);
+void uart_flush(void);
+void uart_puts_P(const char *text);
+void uart_putcrlf(void);
+
+#ifdef __AVR__
+#  define printf(str,...) printf_P(PSTR(str), ##__VA_ARGS__)
+#endif
+
+#else
+
+#define uart_init()    do {} while(0)
+#define uart_getc()    0
+#define uart_putc(x)   do {} while(0)
+#define uart_puthex(x) do {} while(0)
+#define uart_flush()   do {} while(0)
+#define uart_puts_P(x) do {} while(0)
+#define uart_putcrlf() do {} while(0)
+#define uart_trace(a,b,c) do {} while(0)
+
+#endif
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ustring.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ustring.h
new file mode 100644
index 00000000..5c1b619f
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/ustring.h
@@ -0,0 +1,41 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   ustring.h: uint8_t wrappers for string.h-functions
+
+*/
+
+#ifndef USTRING_H
+#define USTRING_H
+
+#include <string.h>
+
+#define ustrcasecmp_P(s1,s2) (strcasecmp_P((char *)(s1), (s2)))
+#define ustrchr(s,c)         ((uint8_t *)strchr((char *)(s), (c)))
+#define ustrcmp(s1,s2)       (strcmp((char *)(s1), (char *)(s2)))
+#define ustrcmp_P(s1,s2)     (strcmp_P((char *)(s1), (s2)))
+#define ustrcpy(s1,s2)       (strcpy((char *)(s1), (char *)(s2)))
+#define ustrcpy_P(s1,s2)     (strcpy_P((char *)(s1), (s2)))
+#define ustrncpy(s1,s2,n)    (strncpy((char *)(s1), (char *)(s2),(n)))
+#define ustrlen(s)           (strlen((char *)(s)))
+#define ustrrchr(s,c)        ((uint8_t *)strrchr((char *)(s), (c)))
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/utils.c b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/utils.c
new file mode 100644
index 00000000..eace4c32
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/utils.c
@@ -0,0 +1,102 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   utils.c: Misc. utility functions that didn't fit elsewhere
+
+*/
+
+#include <stdint.h>
+#include <stddef.h>
+#include "utils.h"
+
+/* Append a decimal number to a string */
+uint8_t *appendnumber(uint8_t *msg, uint8_t value) {
+  if (value >= 100) {
+    *msg++ = '0' + value/100;
+    value %= 100;
+  }
+
+  *msg++ = '0' + value/10;
+  *msg++ = '0' + value%10;
+
+  return msg;
+}
+
+/* Convert a one-byte BCD value to a normal integer */
+uint8_t bcd2int(uint8_t value) {
+  return (value & 0x0f) + 10*(value >> 4);
+}
+
+/* Convert a uint8_t into a BCD value */
+uint8_t int2bcd(uint8_t value) {
+  return (value % 10) + 16*(value/10);
+}
+
+/* Similiar to strtok_r, but only a single delimiting character  */
+uint8_t *ustr1tok(uint8_t *str, const uint8_t delim, uint8_t **saveptr) {
+  uint8_t *tmp;
+
+  if (str == NULL)
+    str = *saveptr;
+
+  /* Skip leading delimiters */
+  while (*str == delim) str++;
+
+  /* If there is anything left... */
+  if (*str) {
+    /* Search for the next delimiter */
+    tmp = str;
+    while (*tmp && *tmp != delim) tmp++;
+
+    /* Terminate the string there */
+    if (*tmp != 0)
+      *tmp++ = 0;
+
+    *saveptr = tmp;
+
+    return str;
+  } else
+    return NULL;
+}
+
+/**
+ * asc2pet - convert string from ASCII to PETSCII
+ * @buf: pointer to the string to be converted
+ *
+ * This function converts the string in the given buffer from ASCII to
+ * PETSCII in-place.
+ */
+void asc2pet(uint8_t *buf) {
+  uint8_t ch;
+  while (*buf) {
+    ch = *buf;
+    if (ch > 64 && ch < 91)
+      ch += 128;
+    else if (ch > 96 && ch < 123)
+      ch -= 32;
+    else if (ch > 192 && ch < 219)
+      ch -= 128;
+    else if (ch == '~')
+      ch = 255;
+    *buf = ch;
+    buf++;
+  }
+}
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/utils.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/utils.h
new file mode 100644
index 00000000..89d15810
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/utils.h
@@ -0,0 +1,55 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   utils.c: Misc. utility functions that didn't fit elsewhere
+
+*/
+
+#ifndef UTILS_H
+#define UTILS_H
+
+/* Side-effect safe min/max */
+#define max(a,b) \
+       ({ typeof (a) _a = (a); \
+           typeof (b) _b = (b); \
+         _a > _b ? _a : _b; })
+
+#define min(a,b) \
+       ({ typeof (a) _a = (a); \
+           typeof (b) _b = (b); \
+         _a < _b ? _a : _b; })
+
+
+/* Write a number to a string as ASCII */
+uint8_t *appendnumber(uint8_t *msg, uint8_t value);
+
+/* Convert between integer and BCD */
+uint8_t bcd2int(uint8_t value);
+uint8_t int2bcd(uint8_t value);
+
+/* Tokenize a string like strtok_r, but with a single delimiter character only */
+uint8_t *ustr1tok(uint8_t *str, const uint8_t delim, uint8_t **saveptr);
+
+/* ASCII to PETSCII string conversion */
+void asc2pet(uint8_t *buf);
+// note: not moving pet2asc out of fatops saves 6 bytes on AVR
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/wrapops.h b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/wrapops.h
new file mode 100644
index 00000000..b4c1f908
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src-1.0.0alpha0-98/src/wrapops.h
@@ -0,0 +1,107 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2016  Ingo Korb <ingo@akana.de>
+
+   Inspired by MMC2IEC by Lars Pontoppidan et al.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   wrapops.h: Lots of ugly defines to allow switchable file operations
+
+   The structure-of-pgmspace-function-pointers access scheme used here
+   was inspired by code from MMC2IEC by Lars Pontoppidan.
+
+   typeof-usage suggested by T. Diedrich.
+*/
+
+#ifndef WRAPOPS_H
+#define WRAPOPS_H
+
+#include "buffers.h"
+#include "fileops.h"
+#include "ff.h"
+#include "progmem.h"
+
+/**
+ * struct fileops_t - function pointers to file operations
+ * @open_read   : open a file for reading
+ * @open_write  : open a file for writing/appending
+ * @open_rel    : open a relative file
+ * @file_delete : delete a file
+ * @disk_label  : read disk label (up to 17 bytes, 0-terminated)
+ * @dir_label   : read dir label  (16 characters, space-padded, unterminated)
+ * @disk_id     : read disk id
+ * @disk_free   : read free space of disk
+ * @read_sector : read a sector from the disk
+ * @write_sector: write a sector to the disk
+ * @format      : format the disk
+ * @opendir     : open a directory
+ * @readdir     : read an entry from a directory
+ * @mkdir       : create a directory
+ * @chdir       : change current directory
+ * @rename      : rename a file
+ *
+ * This structure holds function pointers for the various
+ * abstracted operations on the supported file systems/images.
+ * Instances of this structure must always be allocated in flash
+ * and no field may be set to NULL.
+ */
+typedef struct fileops_s {
+  void     (*open_read)(path_t *path, cbmdirent_t *name, buffer_t *buf);
+  void     (*open_write)(path_t *path, cbmdirent_t *name, uint8_t type, buffer_t *buf, uint8_t append);
+  void     (*open_rel)(path_t *path, cbmdirent_t *name, buffer_t *buf, uint8_t recordlen, uint8_t mode);
+  uint8_t  (*file_delete)(path_t *path, cbmdirent_t *name);
+  uint8_t  (*disk_label)(uint8_t part, uint8_t *label);
+  uint8_t  (*dir_label)(path_t *path, uint8_t *label);
+  uint8_t  (*disk_id)(path_t *path, uint8_t *id);
+  uint16_t (*disk_free)(uint8_t part);
+  void     (*read_sector)(buffer_t *buf, uint8_t part, uint8_t track, uint8_t sector);
+  void     (*write_sector)(buffer_t *buf, uint8_t part, uint8_t track, uint8_t sector);
+  void     (*format)(uint8_t drv, uint8_t *name, uint8_t *id);
+  uint8_t  (*opendir)(dh_t *dh, path_t *path);
+  int8_t   (*readdir)(dh_t *dh, cbmdirent_t *dent);
+  void     (*mkdir)(path_t *path, uint8_t *dirname);
+  uint8_t  (*chdir)(path_t *path, cbmdirent_t *dent);
+  void     (*rename)(path_t *path, cbmdirent_t *oldname, uint8_t *newname);
+} fileops_t;
+
+/* Helper-Define to avoid lots of typedefs */
+#ifdef __AVR__
+#  define pgmcall(x) ((typeof(x))pgm_read_word(&(x)))
+#else
+/* No-op macro - avoids issues with different function pointer sizes */
+#  define pgmcall(x) x
+#endif
+
+/* Wrappers to make the indirect calls look like normal functions */
+#define open_read(path,name,buf) ((pgmcall(partition[(path)->part].fop->open_read))(path,name,buf))
+#define open_write(path,name,type,buf,app) ((pgmcall(partition[(path)->part].fop->open_write))(path,name,type,buf,app))
+#define open_rel(path,name,buf,len,mode) ((pgmcall(partition[(path)->part].fop->open_rel))(path,name,buf,len,mode))
+#define file_delete(path,name) ((pgmcall(partition[(path)->part].fop->file_delete))(path,name))
+#define disk_label(part,label) ((pgmcall(partition[part].fop->disk_label))(part,label))
+#define dir_label(path,label) ((pgmcall(partition[(path)->part].fop->dir_label))(path,label))
+#define disk_id(path,id) ((pgmcall(partition[(path)->part].fop->disk_id))(path,id))
+#define disk_free(drv) ((pgmcall(partition[drv].fop->disk_free))(drv))
+#define read_sector(buf,drv,t,s) ((pgmcall(partition[(drv)].fop->read_sector))(buf,drv,t,s))
+#define write_sector(buf,drv,t,s) ((pgmcall(partition[(drv)].fop->write_sector))(buf,drv,t,s))
+#define format(drv,name,id) ((pgmcall(partition[(drv)].fop->format))(drv,name,id))
+#define opendir(dh,path) ((pgmcall(partition[(path)->part].fop->opendir))(dh,path))
+#define readdir(dh,dent) ((pgmcall(partition[(dh)->part].fop->readdir))(dh,dent))
+#define mkdir(path,dir) ((pgmcall(partition[(path)->part].fop->mkdir))(path,dir))
+#define chdir(path,dent) ((pgmcall(partition[(path)->part].fop->chdir))(path,dent))
+#define rename(path,old,new) ((pgmcall(partition[(path)->part].fop->rename))(path,old,new))
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/README b/trunk/AVRProjects/sd2iec/src/README
new file mode 100644
index 00000000..8e341a81
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/README
@@ -0,0 +1,6 @@
+For a description of SD2IEC see
+http://www.c64-wiki.com/index.php/SD2IEC
+...and contribute! :-)
+
+Hardware/PCB design by Shadowolf.
+Loosely based on MMC2IEC by LarsP.
diff --git a/trunk/AVRProjects/sd2iec/src/pax_global_header b/trunk/AVRProjects/sd2iec/src/pax_global_header
new file mode 100644
index 00000000..645c0485
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/pax_global_header
@@ -0,0 +1 @@
+52 comment=a90cc2e4c02755ae33396adf2d3e212e1743c6f6
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/buffers.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/buffers.o.d
new file mode 100644
index 00000000..c6e5ed9d
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/buffers.o.d
@@ -0,0 +1,22 @@
+obj-m1284p/buffers.o: buffers.c config.h obj-m1284p/autoconf.h \
+ avrcompat.h dirent.h ff.h integer.h errormsg.h buffers.h led.h uart.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+dirent.h:
+
+ff.h:
+
+integer.h:
+
+errormsg.h:
+
+buffers.h:
+
+led.h:
+
+uart.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/d64ops.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/d64ops.o.d
new file mode 100644
index 00000000..eb44f5f7
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/d64ops.o.d
@@ -0,0 +1,29 @@
+obj-m1284p/d64ops.o: d64ops.c config.h obj-m1284p/autoconf.h avrcompat.h \
+ buffers.h dirent.h ff.h integer.h errormsg.h fatops.h wrapops.h \
+ fileops.h parser.h d64ops.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+buffers.h:
+
+dirent.h:
+
+ff.h:
+
+integer.h:
+
+errormsg.h:
+
+fatops.h:
+
+wrapops.h:
+
+fileops.h:
+
+parser.h:
+
+d64ops.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/diskchange.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/diskchange.o.d
new file mode 100644
index 00000000..d7012c9b
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/diskchange.o.d
@@ -0,0 +1,46 @@
+obj-m1284p/diskchange.o: diskchange.c config.h obj-m1284p/autoconf.h \
+ avrcompat.h buffers.h dirent.h ff.h integer.h display.h i2c.h doscmd.h \
+ errormsg.h fatops.h wrapops.h fileops.h flags.h led.h uart.h parser.h \
+ timer.h ustring.h diskchange.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+buffers.h:
+
+dirent.h:
+
+ff.h:
+
+integer.h:
+
+display.h:
+
+i2c.h:
+
+doscmd.h:
+
+errormsg.h:
+
+fatops.h:
+
+wrapops.h:
+
+fileops.h:
+
+flags.h:
+
+led.h:
+
+uart.h:
+
+parser.h:
+
+timer.h:
+
+ustring.h:
+
+diskchange.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/diskio.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/diskio.o.d
new file mode 100644
index 00000000..c05b95c6
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/diskio.o.d
@@ -0,0 +1,18 @@
+obj-m1284p/diskio.o: diskio.c config.h obj-m1284p/autoconf.h avrcompat.h \
+ diskio.h integer.h ata.h dataflash.h sdcard.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+diskio.h:
+
+integer.h:
+
+ata.h:
+
+dataflash.h:
+
+sdcard.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/display.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/display.o.d
new file mode 100644
index 00000000..be79d0f5
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/display.o.d
@@ -0,0 +1,40 @@
+obj-m1284p/display.o: display.c config.h obj-m1284p/autoconf.h \
+ avrcompat.h buffers.h dirent.h ff.h integer.h eeprom.h fatops.h \
+ wrapops.h fileops.h i2c.h iec.h parser.h ustring.h utils.h display.h \
+ uart.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+buffers.h:
+
+dirent.h:
+
+ff.h:
+
+integer.h:
+
+eeprom.h:
+
+fatops.h:
+
+wrapops.h:
+
+fileops.h:
+
+i2c.h:
+
+iec.h:
+
+parser.h:
+
+ustring.h:
+
+utils.h:
+
+display.h:
+
+uart.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/doscmd.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/doscmd.o.d
new file mode 100644
index 00000000..3ed0f7be
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/doscmd.o.d
@@ -0,0 +1,63 @@
+obj-m1284p/doscmd.o: doscmd.c config.h obj-m1284p/autoconf.h avrcompat.h \
+ d64ops.h wrapops.h buffers.h dirent.h ff.h integer.h fileops.h \
+ diskchange.h diskio.h display.h i2c.h eeprom.h errormsg.h fastloader.h \
+ fastloader-ll.h fatops.h flags.h iec.h m2iops.h parser.h time.h rtc.h \
+ uart.h ustring.h utils.h doscmd.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+d64ops.h:
+
+wrapops.h:
+
+buffers.h:
+
+dirent.h:
+
+ff.h:
+
+integer.h:
+
+fileops.h:
+
+diskchange.h:
+
+diskio.h:
+
+display.h:
+
+i2c.h:
+
+eeprom.h:
+
+errormsg.h:
+
+fastloader.h:
+
+fastloader-ll.h:
+
+fatops.h:
+
+flags.h:
+
+iec.h:
+
+m2iops.h:
+
+parser.h:
+
+time.h:
+
+rtc.h:
+
+uart.h:
+
+ustring.h:
+
+utils.h:
+
+doscmd.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/eeprom.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/eeprom.o.d
new file mode 100644
index 00000000..3883bb4e
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/eeprom.o.d
@@ -0,0 +1,35 @@
+obj-m1284p/eeprom.o: eeprom.c config.h obj-m1284p/autoconf.h avrcompat.h \
+ diskio.h integer.h fatops.h buffers.h dirent.h ff.h wrapops.h fileops.h \
+ flags.h iec.h timer.h ustring.h eeprom.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+diskio.h:
+
+integer.h:
+
+fatops.h:
+
+buffers.h:
+
+dirent.h:
+
+ff.h:
+
+wrapops.h:
+
+fileops.h:
+
+flags.h:
+
+iec.h:
+
+timer.h:
+
+ustring.h:
+
+eeprom.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/errormsg.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/errormsg.o.d
new file mode 100644
index 00000000..1c7973b0
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/errormsg.o.d
@@ -0,0 +1,44 @@
+obj-m1284p/errormsg.o: errormsg.c config.h obj-m1284p/autoconf.h \
+ avrcompat.h buffers.h dirent.h ff.h integer.h diskio.h display.h i2c.h \
+ eeprom.h fatops.h wrapops.h fileops.h flags.h led.h uart.h ustring.h \
+ utils.h errormsg.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+buffers.h:
+
+dirent.h:
+
+ff.h:
+
+integer.h:
+
+diskio.h:
+
+display.h:
+
+i2c.h:
+
+eeprom.h:
+
+fatops.h:
+
+wrapops.h:
+
+fileops.h:
+
+flags.h:
+
+led.h:
+
+uart.h:
+
+ustring.h:
+
+utils.h:
+
+errormsg.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/fastloader.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/fastloader.o.d
new file mode 100644
index 00000000..ef9cfc8e
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/fastloader.o.d
@@ -0,0 +1,53 @@
+obj-m1284p/fastloader.o: fastloader.c config.h obj-m1284p/autoconf.h \
+ avrcompat.h buffers.h dirent.h ff.h integer.h d64ops.h wrapops.h \
+ fileops.h diskchange.h display.h i2c.h doscmd.h errormsg.h \
+ fastloader-ll.h iec-ll.h iec.h led.h uart.h parser.h timer.h ustring.h \
+ fastloader.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+buffers.h:
+
+dirent.h:
+
+ff.h:
+
+integer.h:
+
+d64ops.h:
+
+wrapops.h:
+
+fileops.h:
+
+diskchange.h:
+
+display.h:
+
+i2c.h:
+
+doscmd.h:
+
+errormsg.h:
+
+fastloader-ll.h:
+
+iec-ll.h:
+
+iec.h:
+
+led.h:
+
+uart.h:
+
+parser.h:
+
+timer.h:
+
+ustring.h:
+
+fastloader.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/fatops.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/fatops.o.d
new file mode 100644
index 00000000..da22a9e9
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/fatops.o.d
@@ -0,0 +1,50 @@
+obj-m1284p/fatops.o: fatops.c config.h obj-m1284p/autoconf.h avrcompat.h \
+ buffers.h dirent.h ff.h integer.h d64ops.h wrapops.h fileops.h \
+ diskchange.h diskio.h display.h i2c.h doscmd.h errormsg.h flags.h led.h \
+ uart.h m2iops.h parser.h ustring.h fatops.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+buffers.h:
+
+dirent.h:
+
+ff.h:
+
+integer.h:
+
+d64ops.h:
+
+wrapops.h:
+
+fileops.h:
+
+diskchange.h:
+
+diskio.h:
+
+display.h:
+
+i2c.h:
+
+doscmd.h:
+
+errormsg.h:
+
+flags.h:
+
+led.h:
+
+uart.h:
+
+m2iops.h:
+
+parser.h:
+
+ustring.h:
+
+fatops.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/ff.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/ff.o.d
new file mode 100644
index 00000000..a865fb5a
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/ff.o.d
@@ -0,0 +1,14 @@
+obj-m1284p/ff.o: ff.c config.h obj-m1284p/autoconf.h avrcompat.h ff.h \
+ integer.h diskio.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+ff.h:
+
+integer.h:
+
+diskio.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/fileops.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/fileops.o.d
new file mode 100644
index 00000000..7309c007
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/fileops.o.d
@@ -0,0 +1,46 @@
+obj-m1284p/fileops.o: fileops.c config.h obj-m1284p/autoconf.h \
+ avrcompat.h buffers.h dirent.h ff.h integer.h d64ops.h wrapops.h \
+ fileops.h display.h i2c.h doscmd.h errormsg.h fatops.h flags.h m2iops.h \
+ parser.h uart.h ustring.h utils.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+buffers.h:
+
+dirent.h:
+
+ff.h:
+
+integer.h:
+
+d64ops.h:
+
+wrapops.h:
+
+fileops.h:
+
+display.h:
+
+i2c.h:
+
+doscmd.h:
+
+errormsg.h:
+
+fatops.h:
+
+flags.h:
+
+m2iops.h:
+
+parser.h:
+
+uart.h:
+
+ustring.h:
+
+utils.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/iec.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/iec.o.d
new file mode 100644
index 00000000..411c8d51
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/iec.o.d
@@ -0,0 +1,52 @@
+obj-m1284p/iec.o: iec.c config.h obj-m1284p/autoconf.h avrcompat.h \
+ buffers.h dirent.h ff.h integer.h diskchange.h diskio.h display.h i2c.h \
+ doscmd.h errormsg.h fastloader.h fastloader-ll.h fatops.h wrapops.h \
+ fileops.h flags.h iec-ll.h led.h uart.h timer.h iec.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+buffers.h:
+
+dirent.h:
+
+ff.h:
+
+integer.h:
+
+diskchange.h:
+
+diskio.h:
+
+display.h:
+
+i2c.h:
+
+doscmd.h:
+
+errormsg.h:
+
+fastloader.h:
+
+fastloader-ll.h:
+
+fatops.h:
+
+wrapops.h:
+
+fileops.h:
+
+flags.h:
+
+iec-ll.h:
+
+led.h:
+
+uart.h:
+
+timer.h:
+
+iec.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/led.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/led.o.d
new file mode 100644
index 00000000..fbacd479
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/led.o.d
@@ -0,0 +1,20 @@
+obj-m1284p/led.o: led.c config.h obj-m1284p/autoconf.h avrcompat.h \
+ buffers.h dirent.h ff.h integer.h led.h uart.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+buffers.h:
+
+dirent.h:
+
+ff.h:
+
+integer.h:
+
+led.h:
+
+uart.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/m2iops.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/m2iops.o.d
new file mode 100644
index 00000000..62d52a98
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/m2iops.o.d
@@ -0,0 +1,35 @@
+obj-m1284p/m2iops.o: m2iops.c config.h obj-m1284p/autoconf.h avrcompat.h \
+ buffers.h dirent.h ff.h integer.h errormsg.h fatops.h wrapops.h \
+ fileops.h led.h uart.h parser.h ustring.h m2iops.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+buffers.h:
+
+dirent.h:
+
+ff.h:
+
+integer.h:
+
+errormsg.h:
+
+fatops.h:
+
+wrapops.h:
+
+fileops.h:
+
+led.h:
+
+uart.h:
+
+parser.h:
+
+ustring.h:
+
+m2iops.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/main.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/main.o.d
new file mode 100644
index 00000000..1601bfde
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/main.o.d
@@ -0,0 +1,52 @@
+obj-m1284p/main.o: main.c config.h obj-m1284p/autoconf.h avrcompat.h \
+ buffers.h dirent.h ff.h integer.h diskchange.h diskio.h display.h i2c.h \
+ eeprom.h errormsg.h fatops.h wrapops.h fileops.h iec.h led.h uart.h \
+ time.h rtc.h timer.h ustring.h utils.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+buffers.h:
+
+dirent.h:
+
+ff.h:
+
+integer.h:
+
+diskchange.h:
+
+diskio.h:
+
+display.h:
+
+i2c.h:
+
+eeprom.h:
+
+errormsg.h:
+
+fatops.h:
+
+wrapops.h:
+
+fileops.h:
+
+iec.h:
+
+led.h:
+
+uart.h:
+
+time.h:
+
+rtc.h:
+
+timer.h:
+
+ustring.h:
+
+utils.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/parser.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/parser.o.d
new file mode 100644
index 00000000..9422dc8d
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/parser.o.d
@@ -0,0 +1,35 @@
+obj-m1284p/parser.o: parser.c config.h obj-m1284p/autoconf.h avrcompat.h \
+ dirent.h ff.h integer.h display.h i2c.h errormsg.h buffers.h fatops.h \
+ wrapops.h fileops.h flags.h ustring.h parser.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+dirent.h:
+
+ff.h:
+
+integer.h:
+
+display.h:
+
+i2c.h:
+
+errormsg.h:
+
+buffers.h:
+
+fatops.h:
+
+wrapops.h:
+
+fileops.h:
+
+flags.h:
+
+ustring.h:
+
+parser.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/pcf8583.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/pcf8583.o.d
new file mode 100644
index 00000000..a1e40f1b
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/pcf8583.o.d
@@ -0,0 +1,20 @@
+obj-m1284p/pcf8583.o: pcf8583.c config.h obj-m1284p/autoconf.h \
+ avrcompat.h i2c.h uart.h ustring.h utils.h time.h rtc.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+i2c.h:
+
+uart.h:
+
+ustring.h:
+
+utils.h:
+
+time.h:
+
+rtc.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/rtc.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/rtc.o.d
new file mode 100644
index 00000000..898bc081
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/rtc.o.d
@@ -0,0 +1,12 @@
+obj-m1284p/rtc.o: rtc.c config.h obj-m1284p/autoconf.h avrcompat.h time.h \
+ rtc.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+time.h:
+
+rtc.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/sdcard.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/sdcard.o.d
new file mode 100644
index 00000000..203a9a4f
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/sdcard.o.d
@@ -0,0 +1,22 @@
+obj-m1284p/sdcard.o: sdcard.c config.h obj-m1284p/autoconf.h avrcompat.h \
+ crc7.h diskio.h integer.h spi.h timer.h uart.h sdcard.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+crc7.h:
+
+diskio.h:
+
+integer.h:
+
+spi.h:
+
+timer.h:
+
+uart.h:
+
+sdcard.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/softi2c.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/softi2c.o.d
new file mode 100644
index 00000000..39f155e2
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/softi2c.o.d
@@ -0,0 +1,10 @@
+obj-m1284p/softi2c.o: softi2c.c config.h obj-m1284p/autoconf.h \
+ avrcompat.h i2c.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+i2c.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/spi.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/spi.o.d
new file mode 100644
index 00000000..35832a0c
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/spi.o.d
@@ -0,0 +1,5 @@
+obj-m1284p/spi.o: spi.c avrcompat.h spi.h
+
+avrcompat.h:
+
+spi.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/timer.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/timer.o.d
new file mode 100644
index 00000000..70343fa0
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/timer.o.d
@@ -0,0 +1,31 @@
+obj-m1284p/timer.o: timer.c config.h obj-m1284p/autoconf.h avrcompat.h \
+ diskchange.h dirent.h ff.h integer.h display.h i2c.h led.h uart.h time.h \
+ rtc.h timer.h
+
+config.h:
+
+obj-m1284p/autoconf.h:
+
+avrcompat.h:
+
+diskchange.h:
+
+dirent.h:
+
+ff.h:
+
+integer.h:
+
+display.h:
+
+i2c.h:
+
+led.h:
+
+uart.h:
+
+time.h:
+
+rtc.h:
+
+timer.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/utils.o.d b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/utils.o.d
new file mode 100644
index 00000000..e818d00e
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/.dep/utils.o.d
@@ -0,0 +1,3 @@
+obj-m1284p/utils.o: utils.c utils.h
+
+utils.h:
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/COPYING b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/COPYING
new file mode 100644
index 00000000..d511905c
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/COPYING
@@ -0,0 +1,339 @@
+		    GNU GENERAL PUBLIC LICENSE
+		       Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+			    Preamble
+
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users.  This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it.  (Some other Free Software Foundation software is covered by
+the GNU Lesser General Public License instead.)  You can apply it to
+your programs, too.
+
+  When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+
+  To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+
+  For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have.  You must make sure that they, too, receive or can get the
+source code.  And you must show them these terms so they know their
+rights.
+
+  We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+
+  Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software.  If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors' reputations.
+
+  Finally, any free program is threatened constantly by software
+patents.  We wish to avoid the danger that redistributors of a free
+program will individually obtain patent licenses, in effect making the
+program proprietary.  To prevent this, we have made it clear that any
+patent must be licensed for everyone's free use or not licensed at all.
+
+  The precise terms and conditions for copying, distribution and
+modification follow.
+
+		    GNU GENERAL PUBLIC LICENSE
+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+  0. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License.  The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
+either verbatim or with modifications and/or translated into another
+language.  (Hereinafter, translation is included without limitation in
+the term "modification".)  Each licensee is addressed as "you".
+
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope.  The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+
+  1. You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+
+  2. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+
+    a) You must cause the modified files to carry prominent notices
+    stating that you changed the files and the date of any change.
+
+    b) You must cause any work that you distribute or publish, that in
+    whole or in part contains or is derived from the Program or any
+    part thereof, to be licensed as a whole at no charge to all third
+    parties under the terms of this License.
+
+    c) If the modified program normally reads commands interactively
+    when run, you must cause it, when started running for such
+    interactive use in the most ordinary way, to print or display an
+    announcement including an appropriate copyright notice and a
+    notice that there is no warranty (or else, saying that you provide
+    a warranty) and that users may redistribute the program under
+    these conditions, and telling the user how to view a copy of this
+    License.  (Exception: if the Program itself is interactive but
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+
+These requirements apply to the modified work as a whole.  If
+identifiable sections of that work are not derived from the Program,
+and can be reasonably considered independent and separate works in
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+sections when you distribute them as separate works.  But when you
+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote it.
+
+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
+collective works based on the Program.
+
+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
+
+  3. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
+
+    a) Accompany it with the complete corresponding machine-readable
+    source code, which must be distributed under the terms of Sections
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+    b) Accompany it with a written offer, valid for at least three
+    years, to give any third party, for a charge no more than your
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+
+    c) Accompany it with the information you received as to the offer
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+distribution of the source code, even though third parties are not
+compelled to copy the source along with the object code.
+
+  4. You may not copy, modify, sublicense, or distribute the Program
+except as expressly provided under this License.  Any attempt
+otherwise to copy, modify, sublicense or distribute the Program is
+void, and will automatically terminate your rights under this License.
+However, parties who have received copies, or rights, from you under
+this License will not have their licenses terminated so long as such
+parties remain in full compliance.
+
+  5. You are not required to accept this License, since you have not
+signed it.  However, nothing else grants you permission to modify or
+distribute the Program or its derivative works.  These actions are
+prohibited by law if you do not accept this License.  Therefore, by
+modifying or distributing the Program (or any work based on the
+Program), you indicate your acceptance of this License to do so, and
+all its terms and conditions for copying, distributing or modifying
+the Program or works based on it.
+
+  6. Each time you redistribute the Program (or any work based on the
+Program), the recipient automatically receives a license from the
+original licensor to copy, distribute or modify the Program subject to
+these terms and conditions.  You may not impose any further
+restrictions on the recipients' exercise of the rights granted herein.
+You are not responsible for enforcing compliance by third parties to
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+  7. If, as a consequence of a court judgment or allegation of patent
+infringement or for any other reason (not limited to patent issues),
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+may not distribute the Program at all.  For example, if a patent
+license would not permit royalty-free redistribution of the Program by
+all those who receive copies directly or indirectly through you, then
+the only way you could satisfy both it and this License would be to
+refrain entirely from distribution of the Program.
+
+If any portion of this section is held invalid or unenforceable under
+any particular circumstance, the balance of the section is intended to
+apply and the section as a whole is intended to apply in other
+circumstances.
+
+It is not the purpose of this section to induce you to infringe any
+patents or other property right claims or to contest validity of any
+such claims; this section has the sole purpose of protecting the
+integrity of the free software distribution system, which is
+implemented by public license practices.  Many people have made
+generous contributions to the wide range of software distributed
+through that system in reliance on consistent application of that
+system; it is up to the author/donor to decide if he or she is willing
+to distribute software through any other system and a licensee cannot
+impose that choice.
+
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+
+  8. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
+may add an explicit geographical distribution limitation excluding
+those countries, so that distribution is permitted only in or among
+countries not thus excluded.  In such case, this License incorporates
+the limitation as if written in the body of this License.
+
+  9. The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time.  Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+Each version is given a distinguishing version number.  If the Program
+specifies a version number of this License which applies to it and "any
+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation.  If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+
+  10. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
+to ask for permission.  For software which is copyrighted by the Free
+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this.  Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+
+			    NO WARRANTY
+
+  11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE RISK AS
+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+
+  12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+		     END OF TERMS AND CONDITIONS
+
+	    How to Apply These Terms to Your New Programs
+
+  If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+  To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+    <one line to give the program's name and a brief idea of what it does.>
+    Copyright (C) <year>  <name of author>
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License along
+    with this program; if not, write to the Free Software Foundation, Inc.,
+    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+    Gnomovision version 69, Copyright (C) year name of author
+    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+    This is free software, and you are welcome to redistribute it
+    under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License.  Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  Here is a sample; alter the names:
+
+  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+  `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+  <signature of Ty Coon>, 1 April 1989
+  Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs.  If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library.  If this is what you want to do, use the GNU Lesser General
+Public License instead of this License.
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/Makefile b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/Makefile
new file mode 100644
index 00000000..766c1d93
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/Makefile
@@ -0,0 +1,660 @@
+# Hey Emacs, this is a -*- makefile -*-
+
+# Define version number
+MAJOR = 0
+MINOR = 10
+PATCHLEVEL = 3
+FIX =
+
+# Forces bootloader version to 0, comment out for release
+PRERELEASE =
+
+#----------------------------------------------------------------------------
+# WinAVR Makefile Template written by Eric B. Weddington, Joerg Wunsch, et al.
+#
+# Released to the Public Domain
+#
+# Additional material for this makefile was written by:
+# Peter Fleury
+# Tim Henigan
+# Colin O'Flynn
+# Reiner Patommel
+# Markus Pfaff
+# Sander Pool
+# Frederik Rouleau
+# Carlos Lamas
+#
+#
+# Extensively modified for sd2iec by Ingo Korb
+#
+# To rebuild project do "make clean" then "make all".
+#----------------------------------------------------------------------------
+
+# Read configuration file
+ifdef CONFIG
+ CONFIGSUFFIX = $(CONFIG:config%=%)
+else
+ CONFIG = config
+ CONFIGSUFFIX =
+endif
+
+# Enable verbose compilation with "make V=1"
+ifdef V
+ Q :=
+ E := @:
+else
+ Q := @
+ E := @echo
+endif
+
+# Include the configuration file
+include $(CONFIG)
+
+# Set MCU name and length of binary for bootloader
+# WARNING: Fuse settings not tested!
+MCU := $(CONFIG_MCU)
+	
+ifeq ($(MCU),atmega128)
+  BINARY_LENGTH = 0x1f000
+#  EFUSE = 0xff
+#  HFUSE = 0x91
+#  LFUSE = 0xaf
+else ifeq ($(MCU),atmega1281)
+  BINARY_LENGTH = 0x1f000
+  BOOTLDRSIZE = 0x0800
+  EFUSE = 0xff
+  HFUSE = 0xd2
+  LFUSE = 0xfc
+else ifeq ($(MCU),atmega2561)
+  BINARY_LENGTH = 0x3f000
+  EFUSE = 0xfd
+  HFUSE = 0x93
+  LFUSE = 0xef
+else ifeq ($(MCU),atmega644)
+  BINARY_LENGTH = 0xf000
+  EFUSE = 0xfd
+  HFUSE = 0x91
+  LFUSE = 0xef
+else ifeq ($(MCU),atmega644p)
+  BINARY_LENGTH = 0xf000
+  EFUSE = 0xfd
+  HFUSE = 0x91
+  LFUSE = 0xef
+else ifeq ($(MCU),atmega1284p)
+  BINARY_LENGTH = 0x1f000
+  EFUSE = 0xfd
+  HFUSE = 0xd2
+  LFUSE = 0xe7
+else
+.PHONY: nochip
+nochip:
+	@echo '=============================================================='
+	@echo 'No known target chip specified.'
+	@echo
+	@echo 'Please edit the Makefile.'
+	@exit 1
+endif
+
+# Directory for all generated files
+OBJDIR := obj-$(CONFIG_MCU:atmega%=m%)$(CONFIGSUFFIX)
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+
+# Target file name (without extension).
+TARGET = $(OBJDIR)/sd2iec
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = buffers.c fatops.c fileops.c iec.c main.c errormsg.c doscmd.c ff.c fastloader.c m2iops.c d64ops.c diskchange.c eeprom.c parser.c utils.c timer.c led.c diskio.c sdcard.c spi.c
+
+ifeq ($(CONFIG_UART_DEBUG),y)
+  SRC += uart.c
+endif
+
+ifeq ($(CONFIG_REMOTE_DISPLAY),y)
+  SRC += display.c
+  NEED_I2C := y
+endif
+
+# Various RTC implementations
+ifeq ($(CONFIG_RTC_VARIANT),2)
+  SRC += rtc.c pcf8583.c
+  NEED_I2C := y
+endif
+ifeq ($(CONFIG_RTC_VARIANT),1)
+  SRC += rtc.c softrtc.c
+endif
+
+# No hardware I2C module yet
+ifdef NEED_I2C
+  SRC += softi2c.c
+endif
+
+# Additional hardware support enabled in the config file
+ifdef CONFIG_ADD_SD
+  SRC += sdcard.c spi.c
+endif
+
+ifdef CONFIG_ADD_ATA
+  SRC += ata.c
+endif
+
+ifdef CONFIG_ADD_DF
+  SRC += spi.c dataflash.c
+endif
+
+# List Assembler source files here.
+#     Make them always end in a capital .S.  Files ending in a lowercase .s
+#     will not be considered source files but generated files (assembler
+#     output from the compiler), and will be deleted upon "make clean"!
+#     Even though the DOS/Win* filesystem matches both .s and .S the same,
+#     it will preserve the spelling of the filenames, and gcc itself does
+#     care about how the name is spelled on its command-line.
+ASRC = fastloader-ll.S crc7asm.S
+
+
+# Optimization level, can be [0, 1, 2, 3, s].
+#     0 = turn off optimization. s = optimize for size.
+#     (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+# Use s -mcall-prologues when you really need size...
+#OPT = 2
+OPT = s
+
+# Debugging format.
+#     Native formats for AVR-GCC's -g are dwarf-2 [default] or stabs.
+#     AVR Studio 4.10 requires dwarf-2.
+#     AVR [Extended] COFF format requires stabs, plus an avr-objcopy run.
+DEBUG = dwarf-2
+
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+#     Use forward slashes for directory separators.
+#     For a directory that has spaces, enclose it in quotes.
+EXTRAINCDIRS =
+
+
+# Compiler flag to set the C Standard level.
+#     c89   = "ANSI" C
+#     gnu89 = c89 plus GCC extensions
+#     c99   = ISO C99 standard (not yet fully implemented)
+#     gnu99 = c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+
+# Place -D or -U options here
+CDEFS = -DF_CPU=$(CONFIG_MCU_FREQ)UL
+
+# Calculate bootloader version
+ifdef PRERELEASE
+BOOT_VERSION := 0
+else
+BOOT_VERSION := 0x$(MAJOR)$(MINOR)$(PATCHLEVEL)$(FIX)
+endif
+
+# Create a version number define
+ifdef PATCHLEVEL
+ifdef FIX
+PROGRAMVERSION := $(MAJOR).$(MINOR).$(PATCHLEVEL).$(FIX)
+else
+PROGRAMVERSION := $(MAJOR).$(MINOR).$(PATCHLEVEL)
+BOOT_VERSION := $(BOOT_VERSION)0
+endif
+else
+PROGRAMVERSION := $(MAJOR).$(MINOR)
+BOOT_VERSION := $(BOOT_VERSION)00
+endif
+
+ifdef PRERELEASE
+PROGRAMVERSION := $(PROGRAMVERSION)$(PRERELEASE)
+endif
+
+LONGVERSION := -$(CONFIG_MCU:atmega%=m%)$(CONFIGSUFFIX)
+
+CDEFS += -DVERSION=\"$(PROGRAMVERSION)\" -DLONGVERSION=\"$(LONGVERSION)\"
+
+# Place -I options here
+CINCS =
+
+
+# Define programs and commands.
+# CC must be defined here to generate the correct CFLAGS
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+WINSHELL = cmd
+AWK = gawk
+CRCGEN = crcgen-new
+
+
+#---------------- Compiler Options ----------------
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT) -fno-strict-aliasing
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+#CFLAGS += -Wall -Wstrict-prototypes -Werror
+CFLAGS += -Wall -Wstrict-prototypes
+#CFLAGS += -Wa,-adhlns=$(OBJDIR)/$(<:.c=.lst)
+CFLAGS += -I$(OBJDIR)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+CFLAGS += -ffunction-sections -fdata-sections
+CFLAGS += -mcall-prologues
+
+# these are needed for GCC 4.3.2, which is more aggressive at inlining
+# gcc-4.2 knows one of those, but it tends to increase code size
+ifeq ($(shell $(CC) --version|$(AWK) -f gcctest.awk),YES)
+#CFLAGS += --param inline-call-cost=3
+CFLAGS += -fno-inline-small-functions
+CFLAGS += -fno-move-loop-invariants
+CFLAGS += -fno-split-wide-types
+
+# turn these on to keep the functions in the same order as in the source
+# this is only useful if you're looking at disassembly
+#CFLAGS += -fno-reorder-blocks
+#CFLAGS += -fno-reorder-blocks-and-partition
+#CFLAGS += -fno-reorder-functions
+#CFLAGS += -fno-toplevel-reorder
+endif
+
+ifeq ($(CONFIG_STACK_TRACKING),y)
+  CFLAGS += -finstrument-functions
+endif
+
+
+#---------------- Assembler Options ----------------
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(OBJDIR)/$(<:.S=.lst),-gstabs -I$(OBJDIR)
+
+
+#---------------- Library Options ----------------
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+# If this is left blank, then it will use the Standard printf version.
+PRINTF_LIB =
+#PRINTF_LIB = $(PRINTF_LIB_MIN)
+#PRINTF_LIB = $(PRINTF_LIB_FLOAT)
+
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+# If this is left blank, then it will use the Standard scanf version.
+SCANF_LIB =
+#SCANF_LIB = $(SCANF_LIB_MIN)
+#SCANF_LIB = $(SCANF_LIB_FLOAT)
+
+
+MATH_LIB = -lm
+
+
+
+#---------------- External Memory Options ----------------
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+
+
+#---------------- Linker Options ----------------
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+LDFLAGS += -Wl,--gc-sections
+ifeq ($(CONFIG_LINKER_RELAX),y)
+  LDFLAGS += -Wl,-O9,--relax
+endif
+
+
+
+#---------------- Programming Options (avrdude) ----------------
+
+# Programming hardware: alf avr910 avrisp bascom bsd
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500 stk500v2
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+AVRDUDE_PROGRAMMER = stk200
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = lpt1    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+# AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+# Allow fuse overrides from the config file
+ifdef CONFIG_EFUSE
+  EFUSE := CONFIG_EFUSE
+endif
+ifdef CONFIG_HFUSE
+  HFUSE := CONFIG_HFUSE
+endif
+ifdef CONFIG_LFUSE
+  LFUSE := CONFIG_LFUSE
+endif
+
+# Calculate command line arguments for fuses
+AVRDUDE_WRITE_FUSES :=
+ifdef EFUSE
+  AVRDUDE_WRITE_FUSES += -U efuse:w:$(EFUSE):m
+endif
+ifdef HFUSE
+  AVRDUDE_WRITE_FUSES += -U hfuse:w:$(HFUSE):m
+endif
+ifdef LFUSE
+  AVRDUDE_WRITE_FUSES += -U lfuse:w:$(LFUSE):m
+endif
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude>
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+#---------------- Debugging Options ----------------
+
+# For simulavr only - target MCU frequency.
+DEBUG_MFREQ = $(CONFIG_MCU_FREQ)
+
+# Set the DEBUG_UI to either gdb or insight.
+# DEBUG_UI = gdb
+DEBUG_UI = insight
+
+# Set the debugging back-end to either avarice, simulavr.
+DEBUG_BACKEND = avarice
+#DEBUG_BACKEND = simulavr
+
+# GDB Init Filename.
+GDBINIT_FILE = __avr_gdbinit
+
+# When using avarice settings for the JTAG
+JTAG_DEV = /dev/com1
+
+# Debugging port used to communicate between GDB / avarice / simulavr.
+DEBUG_PORT = 4242
+
+# Debugging host used to communicate between GDB / avarice / simulavr, normally
+#     just set to localhost unless doing some sort of crazy debugging when
+#     avarice is running on a different computer.
+DEBUG_HOST = localhost
+
+
+
+#============================================================================
+
+
+# De-dupe the list of C source files
+CSRC := $(sort $(SRC))
+
+# Define all object files.
+OBJ := $(patsubst %,$(OBJDIR)/%,$(CSRC:.c=.o) $(ASRC:.S=.o))
+
+# Define all listing files.
+LST := $(patsubst %,$(OBJDIR)/%,$(CSRC:.c=.lst) $(ASRC:.S=.lst))
+
+
+# Compiler flags to generate dependency files.
+GENDEPFLAGS = -MMD -MP -MF .dep/$(@F).d
+
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS) $(CDEFS)
+
+
+
+
+
+# Default target.
+all: build
+
+build: elf bin hex
+	$(E) "  SIZE   $(TARGET).elf"
+	$(Q)$(ELFSIZE)|grep -v debug
+
+elf: $(TARGET).elf
+bin: $(TARGET).bin
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss
+sym: $(TARGET).sym
+
+# A little helper target for the maintainer =)
+copy2card:
+	mount /mnt
+	cp $(TARGET).bin /mnt
+	umount /mnt
+	sync
+
+
+# Doxygen output:
+doxygen:
+	-rm -rf doxyinput
+	mkdir doxyinput
+	cp *.h *.c doxyinput
+	src2doxy.pl doxyinput/*.h doxyinput/*.c
+	doxygen doxygen.conf
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+AVRMEM = avr-mem.sh $(TARGET).elf $(MCU)
+
+# Program the device.
+program: bin hex eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH)  $(AVRDUDE_WRITE_EEPROM)
+
+# Set fuses of the device
+fuses: $(CONFIG)
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FUSES)
+
+# Generate avr-gdb config/init file which does the following:
+#     define the reset signal, load the target file, connect to target, and set
+#     a breakpoint at main().
+gdb-config:
+	@$(REMOVE) $(GDBINIT_FILE)
+	@echo define reset >> $(GDBINIT_FILE)
+	@echo SIGNAL SIGHUP >> $(GDBINIT_FILE)
+	@echo end >> $(GDBINIT_FILE)
+	@echo file $(TARGET).elf >> $(GDBINIT_FILE)
+	@echo target remote $(DEBUG_HOST):$(DEBUG_PORT)  >> $(GDBINIT_FILE)
+ifeq ($(DEBUG_BACKEND),simulavr)
+	@echo load  >> $(GDBINIT_FILE)
+endif
+	@echo break main >> $(GDBINIT_FILE)
+
+debug: gdb-config $(TARGET).elf
+ifeq ($(DEBUG_BACKEND), avarice)
+	@echo Starting AVaRICE - Press enter when "waiting to connect" message displays.
+	@$(WINSHELL) /c start avarice --jtag $(JTAG_DEV) --erase --program --file \
+	$(TARGET).elf $(DEBUG_HOST):$(DEBUG_PORT)
+	@$(WINSHELL) /c pause
+
+else
+	@$(WINSHELL) /c start simulavr --gdbserver --device $(MCU) --clock-freq \
+	$(DEBUG_MFREQ) --port $(DEBUG_PORT)
+endif
+	@$(WINSHELL) /c start avr-$(DEBUG_UI) --command=$(GDBINIT_FILE)
+
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000
+
+
+coff: $(TARGET).elf
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+# Generate autoconf.h from config
+.PRECIOUS : $(OBJDIR)/autoconf.h
+$(OBJDIR)/autoconf.h: $(CONFIG) | $(OBJDIR)
+	$(E) "  CONF2H $(CONFIG)"
+	$(Q)$(AWK) -f conf2h.awk $(CONFIG) > $(OBJDIR)/autoconf.h
+
+# Create final output files (.hex, .eep) from ELF output file.
+ifeq ($(CONFIG_BOOTLOADER),y)
+$(OBJDIR)/%.bin: $(OBJDIR)/%.elf
+	$(E) "  BIN    $@"
+	$(Q)$(OBJCOPY) -O binary -R .eeprom $< $@
+	$(E) "  CRCGEN $@"
+	-$(Q)$(CRCGEN) $@ $(BINARY_LENGTH) $(CONFIG_BOOT_DEVID) $(BOOT_VERSION)
+	$(E) "  COPY   $(CONFIG_HARDWARE_NAME)-firmware-$(PROGRAMVERSION).bin"
+	$(Q)$(COPY) $@ $(OBJDIR)/$(CONFIG_HARDWARE_NAME)-firmware-$(PROGRAMVERSION).bin
+else
+$(OBJDIR)/%.bin: $(OBJDIR)/%.elf
+	$(E) "  BIN    $@"
+	$(Q)$(OBJCOPY) -O binary -R .eeprom $< $@
+endif
+
+
+$(OBJDIR)/%.hex: $(OBJDIR)/%.elf
+	$(E) "  HEX    $@"
+	$(Q)$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+$(OBJDIR)/%.eep: $(OBJDIR)/%.elf
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+$(OBJDIR)/%.lss: $(OBJDIR)/%.elf
+	$(E) "  LSS    $<"
+	$(Q)$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+$(OBJDIR)/%.sym: $(OBJDIR)/%.elf
+	$(E) "  SYM    $<"
+	$(E)$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+$(OBJDIR)/%.elf: $(OBJ)
+	$(E) "  LINK   $@"
+	$(Q)$(CC) $(ALL_CFLAGS) $^ --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+$(OBJDIR)/%.o : %.c | $(OBJDIR) $(OBJDIR)/autoconf.h
+	$(E) "  CC     $<"
+	$(Q)$(CC) -c $(ALL_CFLAGS) $< -o $@
+
+
+# Compile: create assembler files from C source files.
+$(OBJDIR)/%.s : %.c | $(OBJDIR) $(OBJDIR)/autoconf.h
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+$(OBJDIR)/%.o : %.S | $(OBJDIR) $(OBJDIR)/autoconf.h
+	$(E) "  AS     $<"
+	$(Q)$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+# Create preprocessed source for use in sending a bug report.
+$(OBJDIR)/%.i : %.c | $(OBJDIR) $(OBJDIR)/autoconf.h
+	$(CC) -E -mmcu=$(MCU) -I. $(CFLAGS) $< -o $@
+
+# Create the output directory
+$(OBJDIR):
+	$(E) "  MKDIR  $(OBJDIR)"
+	$(Q)mkdir $(OBJDIR)
+
+# Target: clean project.
+clean: begin clean_list end
+
+clean_list :
+	$(E) "  CLEAN"
+	$(Q)$(REMOVE) $(TARGET).hex
+	$(Q)$(REMOVE) $(TARGET).bin
+	$(Q)$(REMOVE) $(TARGET).eep
+	$(Q)$(REMOVE) $(TARGET).cof
+	$(Q)$(REMOVE) $(TARGET).elf
+	$(Q)$(REMOVE) $(TARGET).map
+	$(Q)$(REMOVE) $(TARGET).sym
+	$(Q)$(REMOVE) $(TARGET).lss
+	$(Q)$(REMOVE) $(OBJ)
+	$(Q)$(REMOVE) $(OBJDIR)/autoconf.h
+	$(Q)$(REMOVE) $(OBJDIR)/*.bin
+	$(Q)$(REMOVE) $(LST)
+	$(Q)$(REMOVE) $(CSRC:.c=.s)
+	$(Q)$(REMOVE) $(CSRC:.c=.d)
+	$(Q)$(REMOVE) .dep/*
+	$(Q)$(REMOVE) -rf codedoc
+	$(Q)$(REMOVE) -rf doxyinput
+	-$(Q)rmdir $(OBJDIR)
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+# Manual dependency for the assembler module
+$(OBJDIR)/fastloader-ll.o: config.h fastloader.h $(OBJDIR)/autoconf.h
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program debug gdb-config doxygen
+
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/NEWS b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/NEWS
new file mode 100644
index 00000000..67200997
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/NEWS
@@ -0,0 +1,267 @@
+2012-02-26 - release 0.10.3
+        - Bugfix: Un-break I2C display communication
+
+2011-12-18 - release 0.10.2
+        - Bugfix: End of generated raw directory was incorrect
+        - Bugfix: Various compilation fixes when fastloaders are disabled
+        - ULoad M3 automatically exits when ATN becomes active
+        - Minor code space improvements
+        - New fastloader: ELoad Version 1 (EasyProg)
+
+2010-12-25 - release 0.10.1
+        - Bugfix: Remove remains of previous commands while parsing B-*
+        - Bugfix: Fix response of UI command for unknown suffix chars
+        - small improvement of JiffyDOS transfer speeds
+
+2010-11-07 - release 0.10.0
+        - Deprecation notice:
+          E-R and E-W commands will be removed in the next release
+        - Improved reliability of Nippon loader
+
+2010-10-31 - release 0.10.0pre5
+        - Bugfix: Avoid duplicate file name when DEL/DIR matches
+        - Bugfix: Reduce chance of data corruption in Wheels
+        - Bugfix: Slightly relax IEC timing while waiting for command
+        - Added AR6 1581 fastloader+saver (PAL)
+
+2010-10-26 - release 0.10.0pre4
+        - Bugfix: Wheels with SuperCPU timing issue corrected
+        - Bugfix: Rare problem with ~ in FAT file names fixed
+        - Added compile-time option to capture fastloader code
+        - Added Wheels 4.4 fast loaders
+        - Added another variation of the Epyx Fastload cart
+        - Added Nippon fast loader
+
+2010-10-16 - release 0.10.0pre3
+        - Bugfix: Wheels 128 loader detection fixed
+        - Added a second Epyx Fastload variation
+
+2010-10-15 - release 0.10.0pre2
+        - Bugfix: G-P answer fixed
+        - Bugfix: Strip 0x0d from file names when appropiate
+        - Wheels support
+
+2010-08-06 - release 0.10.0pre1
+        - GEOS 2.0 support (d64/d71/d81 images only)
+        - File-based M-R emulation
+        - Removed "oldnkc" configuration
+
+2010-08-02 - release 0.9.3
+        - Bugfix: Extension hiding works again with names >12 characters
+        - Bugfix: Increase data hold time during standard TALK
+        - Testing aid: card detect-to-LED function
+
+2010-06-21 - release 0.9.2
+        - Bugfix: Rename was broken on FAT
+        - Turbodisk is now disabled when running on internal RC clock
+        - button debounce timeout increased
+
+2010-03-07 - release 0.9.1
+        - Bugfix: Filling unused REL records used wrong offsets
+        - Bugfix: Unbreak case-insensitive matching of FAT file names
+        - Bugfix: Fix raw directory mode for D64/D71/D81
+        - Bugfix: Tell the display about REL files too
+        - add preliminary support for the ATmega1284P
+
+2010-02-28 - release 0.9.0
+        - Bugfix: REL offset calculation for records 256,512,...
+        - Bugfix: Non-REL P command parameters now match README
+        - Bugfix: Reading after EOI behaves correctly now
+        - Red LED only active while unwritten data in memory
+        - Remove XC,XJ commands
+        - New fastloader: ULoad Model 3
+        - New fastloader: G.I. Joe (said to be commonly ripped)
+        - New fastloader: Epyx FastLoad cartridge
+        - Support reading raw directory ($ with secondary > 0)
+        - "display disk images as directories"-mode
+        - DNP support
+        - remote display support
+        - build system doesn't require gawk anymore
+
+2009-12-16 - release 0.8.3
+        - Bugfix: Really prevent random corruption on FAT32 media
+        - Bugfix: Free buffer after copying files
+
+2009-09-27 - release 0.8.2
+        - Bugfix: Prevent random storage corruption on FAT32 media
+        - Bugfix: Image files not mountable if read-only file or media
+        - Bugfix: Do not clear error channel if sec. 15 is closed
+        - Add a dummy RTC read during init (to update year if required)
+        - Enable I2C RTC support in LarsP configuration for Final Expansion 3
+        - Acknowledge ATN during initialisation to stall C64 if required
+
+2009-05-24 - release 0.8.1a
+        - Fix bootloader version number generation
+
+2009-05-20 - release 0.8.1
+        - Fix uIEC/IDE SD card change detection
+        - Dreamload support for uIEC
+        - Mark the RTC time as valid after setting the clock
+        - Delay SPI initialisation until absolutely required
+        - Show disk change confirmation even when the error blink is active
+        - Exit the FC3 fastloader if ATN is active
+        - Fix indentation of 1000+ block files
+        - Remove 0-byte from the long version message
+        - Fix multiple save-with-replace bugs
+        - Ignore directories when matching file name wildcards
+
+2009-03-08 - release 0.8.0
+        - direct sector access of the real storage device
+        - ignore DEL files in file_open
+        - drive mapper
+        - EXOS V3 fastloader support
+        - requires avr-libc 1.6.x
+
+2008-10-02 - release 0.8.0pre1
+        - Implement Dreamload emulation
+        - RTC support
+        - Dataflash support
+        - Multi-file scratch
+        - Copy command
+        - Large buffer support
+        - Final Cartridge 3 freezed file fastloader support
+        - D71/D81 disk image support
+        - parse FSINFO sector for faster FAT32 free space calculation
+        - partial REL file support
+
+2008-07-09 - release 0.7.3
+        - Bugfix: Free buffers on error in M2I and D64
+          (fixes "D64 size increases to 1.1M when its free space runs out")
+
+2008-06-10 - release 0.7.2
+        - Bugfix: rename doesn't corrupt files with hidden extensions anymore
+        - Bugfix: RD works again
+        - Bugfix: On uIEC the ATN ACK interrupt was never disabled
+        - case-insensitive matching of FAT filenames
+
+2008-06-05 - release 0.7.1
+        - Bugfix: Mark sectors 18/0 and 18/1 as used during D64 format
+        - Bugfix: Single-char dir patterns are directory numbers
+        - Bugfix: Short N: on D64 should clean only the first dir sector
+        - case-insensitive matching of FAT filenames
+        - ask the AR6 to not use its fastloader/-saver
+
+2008-05-02 - release 0.7.0
+        - does not support the ATmega32 anymore
+        - Match trailing part of names after * too
+          + option to disable that
+        - Multi-drive/partition support
+        - Dual SD card support (some configurations)
+        - Rename
+        - transparent support for P/S/U/R00 files (read+create)
+          + option to disable x00 writing
+        - file-type suffix detection+generation
+          + option to disable that
+        - Final Cartridge III fast-load/save
+        - Sleep mode
+        - Extended swaplist navigation (next/prev/home)
+        - extended version query
+        - CMD-style timestamped short directory listings
+        - CMD-style partition directory
+        - CMD-style G-P command (get partition info)
+        - FAT32 free block count can be disabled
+        - D64 error info block parsing
+        - stricter, but better parser (supports wildcards in path names)
+
+2008-03-27 - release 0.6.4
+        - Change some details of the SD card initialisation
+        - Bugfix: Initialize cards only when sd2iec is accessed to avoid
+                  hogging the bus during this time.
+        - Prepare NKC configuration for bootloader and mega644
+
+2008-03-19 - release 0.6.3
+        - Bugfix: Ignore trailing separation characters of B-* parameters
+        - Bugfix: Always ignore volume labels while scanning for LFNs
+        - Bugfix: SDHC was always disabled in 0.6.x
+        - Bugfix: Ignore spaces in drive number
+        - Bugfix: Fix possible error after changing partitioned cards
+        - Bugfix: Case-insensitive name matching in the FAT library
+                  (but not in sd2iec)
+        - Bugfix: Fix compile error with larsp configuration on mega644
+        - Wait for the release of the disk change key before trying to
+          access a swap list
+        - Remove some ancient not-true-anymore statements from README
+        - Improve sector read performance
+        - Reduce unecessary reads during seeking
+ 
+2008-02-24 - release 0.6.2
+        - Bugfix: Read the correct pins when determining the device
+                  address in LarsP and NKC configurations
+
+2008-02-22 - release 0.6.1
+        - support for NKC MMC2IEC boards (untested)
+        - case-insensitive matching of M2I and D64
+
+2008-02-20 - release 0.6
+        - Bugfix: Properly emulate B-R/B-W (fixes Pirates!)
+        - Bugfix: Close buffers on I (fixes Drazpaint)
+        - Bugfix: Create new error message after closing channel 15
+        - Bugfix: Check for illegal track/sector while D64 is active
+        - reworked source configuration system
+        - externalized bootloader signature generation
+        - Support for long file names on FAT
+        - M-R returns (random) data
+        - New commands E-R, E-W: Read/write reserved area of EEPROM
+        - Added U0> for device address changes
+        - device address is stored in the EEPROM
+        - Directories starting with . are hidden in FAT
+        - support for sd2iec 1.0 PCBs
+
+2008-01-13 - release 0.5.1
+        - Bugfix: Really disable JTAG - fixes very slow access on some
+          hardware variants
+
+2008-01-12 - release 0.5
+        - Bugfix: Recode ~/pi in both directions
+        - Bugfix: Fastloaders now work on LarsP-style hardware too
+        - Disk change key support
+        - Full JiffyDos support
+        - EEPROM configuration storage
+        - Full support for D64, read/write/sector access
+
+2007-12-25 - release 0.4.2
+        - Bugfix: LarsP-style hardware actually works now
+
+2007-12-19 - release 0.4.1
+        - Bugfix: Creating a new file within an M2I image wrote
+                  a terminating zero byte into the M2I directory entry
+        - Bugfix: Another guesstimated delay in iec_putc
+        - AVR Studio project file updated
+
+2007-12-07 - release 0.4
+        - Extended DOS commands:
+          - Enable/Disable JiffyDOS
+          - Set oscillator calibration
+        - Full support for M2I images
+
+2007-11-29 - release 0.3
+        - disable interrupts during iec_getc
+        - add full CRC checking in SD code with retries on errors
+        - software fastloader support: Turbodisk protocol
+        - card change detection
+        - better file name parsing
+        - directory loading supports wildcards
+        - support for file overwrite (@)
+        - option to display hidden files in directory
+        - filename matching for open
+        - filename matching for scratch
+
+2007-11-02 - release 0.2.1
+        - bugfix: Don't cause repeated entries at the end of the directory
+        - bugfix: Don't repeast the last block of a saved file (1:256 chance)
+        - bugfix: Increase all timeouts in the card initialisation
+        - Recode 0xff in filenames to ~, both characters map to the pi
+          symbol on the C64
+
+2007-11-01 - release 0.2
+        - conditional compilation via make command line for chip type
+          and IO pin assignment (Shadowwolf/LarsP)
+        - object files are generated in a subdirectory
+        - bug fixes in IEC and buffer handling
+        - added project file for AVR Studio (untested)
+        - support for subdirectories
+        - support for UI+/UI- commands (faster bus for VC20)
+        - slightly improved command parser
+
+2007-10-16 - release 0.1
+        Initial release
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/README b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/README
new file mode 100644
index 00000000..dde5a824
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/README
@@ -0,0 +1,825 @@
+sd2iec - a controller/interface adapting storage devices to the CBM serial bus
+Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+Parts based on code from others, see comments in main.c for details.
+JiffyDos send based on code by M.Kiesel
+Fat LFN support and lots of other ideas+code by Jim Brain
+Final Cartridge III fastloader support by Thomas Giesel
+
+Free software under GPL version 2 ONLY, see comments in main.c and
+COPYING for details.
+
+FIXME:This file still needs to be expanded. A lot.
+
+Deprecation notices
+===================
+The following feature(s) will be removed in the next release:
+- M2I support
+   M2I support has been redundant since the introduction of transparent
+   P00 support. To continue to use your M2I-format software, convert
+   your files to P00 format (e.g. with m2itopc64.c) and set your device
+   to extension mode 2 (XE2).
+
+Introduction:
+=============
+sd2iec is firmware, used in hardware designs like MMC2IEC, SD2IEC, or uIEC,
+that allows the Commodore serial bus to access removable storage devices
+(MMC, SD, CF) - think of it as a 1541 with a modern storage medium instead
+of disks. The project was inspired by (and uses a few bits of code from)
+MMC2IEC[1] by Lars Pontoppidan and once ran on the same hardware before it
+grew too big for the ATmega32 used there.
+
+Currently, the firmware provide good DOS and file-level compatibility with CBM
+drives, but much work remains.  Unless specifically noted, anything that tries
+to execute code on the 1541 will not work, this includes every software
+fastloader.
+
+[1] Homepage: http://pontoppidan.info/lars/index.php?proj=mmc2iec
+
+Please note: Whenever this file talks about "D64 images" the text applies to
+all Dxx image types, i.e. D64/D71/D81/DNP unless specifically noted.
+
+If you are the author of a program that needs to detect sd2iec for
+some reason, DO NOT use M-R for this purpose. Use the UI command
+instead and check the message you get for "sd2iec" and "uiec" instead.
+
+
+Supported commands:
+===================
+- General notes:
+  Any command not listed below is currently not supported.
+
+- Directory filters:
+  To show only directories, both =B (CMD-compatible) and =D can be used.
+  On a real Commodore drive D matches everything.
+  To include hidden files in the directory, use *=H - on a 1541 this doesn't
+  do anything. sd2iec marks hidden files with an H after the lock mark,
+  i.e. "PRG<H" or "PRG H".
+
+  CMD-style "short" and "long" directory listings with timestamps are supported
+  ("$=T"), including timestamp filters. Please read a CMD manual for the syntax
+  until this file is updated.
+
+- Partition directory:
+  The CMD-style partition directory ($=P) is supported, including filters
+  ($=P:S*). All partitions are listed with type "FAT", although this could
+  change to "NAT" later for compatibility.
+
+- CD/MD/RD:
+  Subdirectory access is compatible to the syntax used by the CMD drives,
+  although drive/partition numbers are completely ignored.
+
+  Quick syntax overview:
+    CD:_         changes into the parent dir (_ is the left arrow on the C64)
+    CD_          dito
+    CD:foo       changes into foo
+    CD/foo       dito
+    CD//foo      changes into \foo
+    CD/foo/:bar  changes into foo\bar
+    CD/foo/bar   dito
+
+  You can use wildcards anywhere in the path. To change into an M2I or D64
+  image the image file must be named after the :, it will not be recognized
+  otherwise.
+
+  MD uses a syntax similiar to CD and will create the directory listed
+  after the colon (:) relative to any directory listed before it.
+
+    MD/foo/:bar  creates bar in foo
+    MD//foo/:bar creates bar in \foo
+
+  RD can only remove subdirectories of the current directory.
+
+    RD:foo       deletes foo
+
+  CD is also used to mount/unmount image files. Just change into them
+  as if they were a directory and use CD:_ (left arrow on the C64) to leave.
+  Please note that image files are detected by file extension and file size
+  and there is no reliable way to see if a file is a valid image file.
+
+- CP, C<Shift-P>
+  This changes the current partition, see "Partitions" below for details.
+
+- C:
+  File copy command, should be CMD compatible. The syntax is
+   C[partition][path]:targetname=[[partition][path]:]sourcename[,[[p][p]:]sourcename...]
+  You can use this command to copy multiple files into a single target
+  file in which case all source files will be appended into the target
+  file. Parsing restarts for every source file name which means that
+  every source name is assumed to be relative to the current directory.
+  You can use wildcards in the source names, but only the first
+  file matching will be copied.
+
+  Copying REL files should work, but isn't tested well. Mixing REL and
+  non-REL files in an append operation isn't supported.
+
+- D
+  Direct sector access, this is a command group introduced by sd2iec.
+  Some Commodore drives use D for disk duplication between two drives
+  in the same unit, an attempt to use that command with sd2iec should
+  result in an error message.
+
+  D has three subcommands: DI (Info), DR (Read) and DW (Write).
+  Each of those commands requires a buffer to be opened (similiar
+  to U1/U2), but due to the larger sector size of the storage devices
+  used by sd2iec it needs to be a large buffer of size 2 (512 bytes)
+  or larger. The exception is the DI command with page set to 0,
+  its result will always fir into a standard 256 byte buffer.
+  If you try to use one of the commands with a buffer that is too
+  small a new error message is returned, "78,BUFFER TOO SMALL,00,00".
+
+  In the following paragraphs the secondary address that was used
+  to open the buffer is called "bufchan".
+
+  - DI
+    In BASIC notation the command format is
+      "DI"+chr$(bufchan)+chr$(device)+chr$(page)
+
+    "device" is the number of the physical device to be queried,
+    "page" the information page to be retrieved. Currently the
+    only page implemented is page 0 which will return the
+    following data structure:
+     1 byte : Number of valid bytes in this structure
+              This includes this byte and is meant to provide
+              backwards compatibility if this structure is extended
+              at a later time. New fields will always be added to
+              the end so old programs can still read the fields
+              they know about.
+     1 byte : Highest diskinfo page supported
+              Always 0 for now, will increase if more information
+              pages are added (planned: Complete ATA IDENTIFY
+              output for IDE and CSD for SD)
+     1 byte : Disk type
+              This field identifies the device type, currently
+              implemented values are:
+                0  IDE
+                2  SD
+                3  Dataflash
+     1 byte : Sector size divided by 256
+              This field holds the sector size of the storage device
+              divided by 256.
+     4 bytes: Number of sectors on the device 
+              A little-endian (same byte order as the 6502) value
+              of the number of sectors on the storage device.
+              If there is ever a need to increase the reported
+              capacity beyond 2TB (for 512 byte sectors) this
+              field will return 0 and a 64-bit value will be added
+              to this diskinfo page.
+
+    If you want to determine if there is a device that responds
+    to a given number, read info page 0 for it. If there is no
+    device present that corresponds to the number you will see
+    a DRIVE NOT READY error on the error channel and the
+    "number of valid bytes" entry in the structure will be 0.
+
+    Do not assume that device numbers are stable between releases
+    and do not assume that they are continuous either. To scan
+    for all present devices you should query at least 0-7 for now,
+    but this limit may increase in later releases.
+
+  - DR/DW
+    In BASIC notation the command format would be
+      "DR"+chr$(bufchan)+chr$(device)
+          +chr$(sector AND 255)
+          +chr$((sector/256) AND 255)
+          +chr$((sector/65536) AND 255)
+          +chr$((sector/16777216) AND 255)
+    (or "DW" instead of "DR)
+    but this won't work on the C64 because AND does not accept
+    parameters larger than 32767. The principle should be clear
+    though, the last four bytes are a 32 bit sector number in
+    little-endian byte order.
+
+    DR reads the sector to the buffer, DW writes the contents
+    of the buffer to the sector. Both commands will update the
+    error channel if an error occurs, for DR the 20,READ ERROR
+    was chosen to represent read errors; for write problems
+    during DW it sets 25,WRITE ERROR for errors and 26,WRITE
+    PROTECT ON if the device is read-only.
+
+- G-P
+  Get partition info, see CMD FD/HD manual for details. The reported
+  information is partially faked, feedback is welcome.
+
+- P
+  Positioning doesn't just work for REL files but also for regular
+  files on a FAT partition. When used for regular files the format
+  is "P"+chr$(channel)+chr$(lo)+chr$(midlo)+chr$(midhi)+chr$(hi)
+  which will seek to the 0-based offset hi*2^24+midhi*65536+256*midlo+lo
+  in the file. If you send less than four bytes for the offset, the
+  missing bytes are assumed to be zero.
+
+- N:
+  Format works only if a D64 image is already mounted. This command is
+  limited to 1541 disk images, usually known as .D64.
+
+- R
+  Renaming files should work the same as it does on CMD drives, although
+  the errors flagged for invalid characters in the name may differ.
+
+- S:
+  Name matching is fully supported, directories are ignored.
+  Scratching of multiple files separated by , is also supported with no
+  limit to the number of files except for the maximum command line length
+  (usually 100 to 120 characters).
+
+- T-R and T-W
+  If your hardware features RTC support the commands T-R (time read) and T-W
+  (time write) are available. If the RTC isn't present, both commands return
+  30,SYNTAX ERROR,00,00; if the RTC is present but not set correctly T-R will
+  return 31,SYNTAX ERROR,00,00.
+
+  Both commands expect a fourth character that specifies the time format
+  to be used, T-W expects that the new time follows that character in EXACTLY
+  the format returned by T-R with the same format char. Do NOT add a space
+  between the "T-W" and the time string.
+
+  The possible formats are:
+   - "A"SCII: "SUN. 01/20/08 01:23:45 PM"+CHR$(13)
+      The day-of-week string can be any of "SUN.", "MON.", "TUES", "WED.",
+      "THUR", "FRI.", "SAT.". The year field is modulo 100.
+   - "B"CD or "D"ecimal:
+     Both these formats use 9 bytes to specify the time. For BCD everything
+     is BCD-encoded, for Decimal the numbers are sent/parsed as-is.
+      Byte 0: Day of the week (0 for sunday)
+           1: Year (modulo 100 for BCD; -1900 for Decimal, i.e. 108 for 2008)
+           2: Month (1-based)
+           3: Day (1-based)
+           4: Hour   (1-12)
+           5: Minute (0-59)
+           6: Second (0-59)
+           7: AM/PM-Flag (0 is AM, everything else is PM)
+           8: CHR$(13)
+
+      When the time is set a year less than 80 is interpreted as 20xx.
+
+- U0
+  Device address changing with "U0>"+chr$(new address) is supported,
+  other U0 commands are currently not implemented.
+
+- U1/U2/B-R/B-W
+  Block reading and writing is fully supported while a D64 image is mounted.
+
+- B-P
+  Supported, not checked against the original rom at all.
+
+- UI+/UI-
+  Switching the slightly faster bus protocol for the VC20 on and off works,
+  it hasn't been tested much though.
+
+- UI/UJ
+  Soft/Hard reset - UI just sets the "73,..." message on the error channel,
+  UJ closes all active buffers but doesn't reset the current directory,
+  mounted image, swap list or anything else.
+
+- U<Shift-J>
+  Real hard reset - this command causes a restart of the AVR processor
+  (skipping the bootloader if installed). <Shift-J> is character code 202.
+
+- X: Extended commands. If you use JiffyDOS, you can send them by using
+  @"X..." - without quotes you'll just receive an error.
+
+  - XEnum    Sets the "file extension mode". This setting controls if
+             files on FAT are written with an x00 header and extension or not.
+             Possible values for num are:
+               0: Never write x00 format files.
+               1: Write x00 format files for SEQ/USR/REL, but not for PRG
+               2: Always write x00 format files.
+               3: Use SEQ/USR/REL file extensions, no x00 header
+               4: Same as 3, but also for PRG
+             If you set mode 3 or 4, extension hiding is automatically enabled.
+             This setting can be saved in the EEPROM using XW, the default
+             value is 1.
+
+             For compatibility with existing programs that write D64 files,
+             PRG files that have D64, D41, D71, D81, DNP or M2I as an extension
+             will always be written without an x00 header and without
+             any additional PRG file extension.
+
+  - XE+/XE-  Enable/disable extension hiding. If enabled, files in FAT with
+             a PRG/SEQ/USR/REL extension will have their extension removed
+             and the file type changed to the type specified by the file
+             extension - e.g. APPLICATION.PRG will become a PRG file named
+             "APPLICATION", "README.SEQ" will become a SEQ file named "README".
+             This flag can be saved in the EEPROM using XW, the default
+             value is disabled (-).
+
+  - XInum    Switches the display mode for mountables files (i.e. disk images
+             and M2I). num can be 0, in which case the file will be shown
+             with its normal type in the directory or 1 which will show all
+             mountable files as DIRectory entries (but they can still be
+             accessed as files too) or 2 in which case they will show up
+             twice - once with its normal type and once as directory.
+             The default value is 0 and this setting can be stored
+             permanently using XW.
+
+             It may be useful to set it to 1 or 2 when using software that
+             was originally written for CMD devices and which wouldn't
+             recognize disk images/M2I files as mountable on its own.
+             However, due to limitations of the current implementation of
+             the CD command such software may still fail to mount a disk
+             image with this option enabled.
+
+  - XB+/XB-  Enable/disable free block calculation for FAT32 drives.
+             As the free block calculation for FAT32 can take a lot of time
+             it can be disabled using XB-. If it is disabled, sd2iec will
+             always report "1 BLOCKS FREE" for FAT32 drives. The free block
+             calculation on FAT12/FAT16 isn't affected because it takes just
+             two seconds at most. This flag can be saved in the EEPROM using
+             XW, the default value is enabled (+).
+
+  - X*+/X*-  Enable/disable 1581-style * matching. If enabled, characters
+             after a * will be matched against the end of the file name.
+             If disabled, any characters after a * will be ignored.
+             This flag can be saved in the EEPROM using XW, the default value
+             is enabled (+).
+
+  - XDdrv=val Configure drives.  On ATA-based units or units with multiple
+             drive types, this command can be used to enable or reorder
+             the drives.  drv is the drive slot (0-7), while val is one
+             of:
+                0: Master ATA device
+                1: Slave ATA device
+                4: Primary SD/MMC device
+                5: Secondary SD/MMC device
+                6: Dataflash device
+               15: no device
+
+             Note that only devices supported by the specific hardware
+             can be selected.  Unsupported device types will return an
+             error if requested.  Also, note that you cannot select a device
+             in multiple drive slots.  Finally, while it is possible to
+             re-order ATA devices using this functionality, it is strongly
+             discouraged.  Use the master/slave jumpers on the ATA devices
+             instead.  To reset the drive configuration, set all drive slots
+             to "no device".  This value can be permanently saved in the
+             EEPROM using XW.
+
+    XD?      View the current drive configuration.  Example result:
+             "03,D:00=04:01=00:02=01,10,01".  The track indicates the
+             current device address, while the sector indicates extended
+             drive configuration status information.
+
+  - X        X without any following characters reports the current state
+             of all extended parameters via the error channel, similiar
+             to DolphinDOS. Example result: "03,J-:C152:E01+:B+:*+,08,00"
+             The track indicates the current device address.
+
+  - XS:name  Set up a swap list - see "Changing Disk Images" below.
+    XS       Disable swap list
+
+  - XR:name  Set the file used for file-based M-R emulation.
+    XR       Disable file-based M-R emulation.
+             See "M-R, M-W, M-E" below. This setting can be
+             permanently saved in the EEPROM using XW.
+
+  - XW       Store configuration to EEPROM
+             This commands stores the current configuration in the EEPROM.
+             It will automatically be read when the AVR is reset, so
+             any changes you made will persist even after turning off
+             the hardware.
+
+             The stored configuration include the extension mode,
+             drive configuration and the current device address.
+             If you have changed the device address by software,
+             sd2iec will power up with that address unless
+             you have changed the device address jumpers (if available) to
+             a different setting than the one active at the time the
+             configuration was saved. You can think of this feature as
+             changing the meaning of one specific setting of the jumpers
+             to a different address if this sounds logical enough to you.
+
+             The "hardware overrides software overrides hardware" priority
+             was chosen to allow accessing sd2iec even when it is soft-
+             configured for a device number that is already taken by
+             another device on the bus without having to remove that
+             device to reconfigure sd2iec (e.g. when using a C128D).
+
+  - X?       Extended version query
+             This commands returns the extended version string which
+             consists of the version, the processor type set at build time
+             and the suffix of the configuration file (usually corresponds
+             to the short name of the hardware sd2iec was compiled for).
+
+- M-R, M-W, M-E
+  When no file is set up using XR, M-R will check a small internal
+  table of common drive-detection addresses and return data that
+  forces most of the supported fast loaders into a compatible mode
+  (e.g. 1541 mode for Dreamload and ULoad Model 3, disabled fastloader
+  for Action Replay 6). If the address is not recognized, more-or-less
+  random data will be returned.
+
+  Unfortunately GEOS reads rather large parts of the drive rom using
+  M-R to detect the drive, which cannot be reasonably added into the
+  internal table. To enable the GEOS drive detection to work properly
+  with sd2iec and to allow switching between 1541/71/81 modes,
+  file-based M-R emulation has been implemented. If a file has been
+  set up as M-R data source using the XR command, its contents will be
+  returned for M-R commands that try to read an address in the range
+  of $8000-$ffff. The rom file should be a copy of the rom contents of
+  a 1541/71/81 drive (any headers will be skipped automatically), its
+  name must be 16 characters or less. When an M-R command is received,
+  the file will be searched in three locations on the storage medium:
+    1) in the current directory of the current partition
+    2) in the root directory of the current partition
+    3) in the root directory of the first partition
+
+  The internal emulation table will be used if the file wasn't found
+  in any of those locations or an error occured while reading
+  it. Please be aware that the rom file is ONLY used for M-R
+  commands. Except for some very specific situations where drive
+  detection fails (e.g. GEOS) it will probably decrease compatibility
+  of sd2iec because most of the implemented fast loaders will only
+  recognize the 1541 variation of the loader.
+
+  Memory writing knows about the address used for changing the device
+  address on a 1541 and will change the address of sd2iec to the
+  requested value. It will also check if the transmitted data
+  corresponds to any of the known software fastloaders so the correct
+  emulation code can be used when M-E is called.
+
+- E-R, E-W
+  NOTICE: These commands will be removed in the next release.
+
+  Both commands work like M-R and M-W, but instead of reading/writing RAM
+  they allow access to a user-area of the EEPROM. This area currently holds
+  512 bytes and accesses beyond its end will result in a 32 SYNTAX ERROR.
+  It is strongly recommended to work on a protocol for sharing this area
+  between multiple applications that want to store their configuration in
+  there, but that is beyond the scope of this project.
+
+  As the contents of the EEPROM have to be copied to RAM before they can
+  be sent to the computer it is not possible to read more data with a
+  single command than the error message buffer (default size: 36 bytes)
+  can hold. Similiarly, writing is restricted by the size of the command
+  buffer (at least 42 bytes for compatibility, expected to be at least
+  100 bytes in release versions).
+
+  The user-area does not interfere with the stored configuration (XW) in
+  any way.
+
+Large buffers:
+==============
+To support commands which directly access the storage devices support
+for larger buffers was added. A large buffer can be allocated by
+opening a file named "##<d>" (exactly three characters" with <d> replaced
+by a single digit specifying the number of 256-byte buffers to be
+chained into one large buffer - e.g. "##2" for a 512 byte buffer,
+"##4" for 1024 bytes etc. Unlike a standard buffer where the read/write
+pointer is set to byte 1, a large buffer will start with the r/w pointer
+pointing to byte 0 because that seems to be more sensible to the author.
+
+If there aren't enough free buffers to support the size you requested
+a 70,NO CHANNEL message is set in the error channel and no file is
+opened. If the file name isn't exactly three bytes long a standard
+buffer ("#") will be allocated instead for compatibility.
+
+The B-P command supports a third parameter that holds the high byte
+of the buffer position, For example, "B-P 9 4 1" positions to byte
+260 (1*256+4) of the buffer on secondary address 9.
+
+No command is implemented at this time which uses large buffers.
+
+Long File Names:
+================
+Long file names (i.e names not within the 8.3 limits) are supported on
+FAT, but for compatibility reasons the 8.3 name is used if the long
+name exceeds 16 characters. If you use anything but ASCII characters
+on the PC or their PETSCII equivalents on the Commodore you may
+get strange characters on the other system because the LFN use
+unicode characters on disk, but sd2iec parses only the low byte
+of each character in the name.
+
+Partition:
+==========
+sd2iec features a multi-partition support similiar to that of the CMD
+drives. The partitions (which may be on separate drives for some hardware
+configurations) are accessed using the drive number of the commands
+sent from the computer and are numbered starting with 1. Partition 0
+is a special case: Because most software doesn't support drive numbers
+or always sends drive number 0, this partition points to the currently
+selected partition. By default, accesses to partition 0 will access
+partition 1, this can be changed by sending "CP<num>" over the command
+channel with <num> being an ASCII number from 1 to 255. "C<Shift-P"
+(0x42 0xd0) works the same, but expects a binary partition number as the
+third character of the command.
+
+Software fastloaders:
+=====================
+Note: Using sd2iec without an external crystal or similiar precise
+      clock source is not a supported configuration.
+      If you try that anyway, be prepared to suffer from random
+      data corruption. You have been warned.
+      Some fastloader implementations will actively refuse to work
+      if you use an unsuitable clock source.
+
+  Turbodisk
+  ---------
+  Turbodisk is detected by the CRC of its 493 byte long floppy code and
+  the M-E address 0x0303. The same code seems to be used under various names,
+  among them "Turbodisk" (both 2.1 and 2.2) and "Fast-Load".
+  It is not known if there is an NTSC-compatible version of this fastloader.
+
+  Final Cartridge III
+  -------------------
+  Both the fast loader and the fast saver of Final Cartridge III are supported.
+  The FC3 is both PAL and NTSC compatible.
+
+  The slightly different fastloader used for files freezed with the FC3
+  is also supported.
+
+  EXOS V3 and The Beast System
+  ----------------------------
+  Both supported, the loader used by these kernals is very similiar to
+  the FC3 fast loader.
+
+  Action Replay 6
+  ---------------
+  The AR6 reads a byte from the drive rom to check which fastloader it should
+  use. When file-based M-R emulation is disabled sd2iec returns a value that
+  should force the cartridge to use the standard kernal loader instead of its
+  many fastloaders/-savers. This means that accessind sd2iec with
+  file-based rom emulation enabled will fail because the cartridge
+  will enable fastloader that will probably not be recognized.
+
+  Currently the only recognized AR6 fastloader and fastsaver are the
+  ones for the 1581.
+
+  Dreamload
+  ---------
+  Dreamload uses direct track/sector access, so it is only supported
+  on D64 or similiar disk image formats. As sd2iec has to wait for commands
+  from the C64 constantly the disk change buttons may become unresponsive,
+  try multiple times if you need to. Dreamload is a "captive" fastloader,
+  sd2iec stay in Dreamload mode until it receives a "quit loader" command
+  from the C64. To force sd2iec to resume normal operation, hold the disk
+  change button until the red LED turns on (just like sleep mode).
+
+  Please note that Dreamload does not work with more than one device on the
+  serial bus due to the way it uses the ATN line.
+
+  ULoad Model 3
+  -------------
+  ULoad Model 3 uses direct track/sector access, so it is only supported
+  on D64 or similiar disk image formats. Currently there is exactly one
+  supported variant of ULoad Model 3, which is the one used by
+  Ultima 3 Gold. There are no other known variants at this time, but
+  this may change.
+
+  If you are a coder and want to use ULoad Model 3 in your own program,
+  either configure it to produce the same drive code as U3Gold or
+  contact me so we can work out a way to trigger ULoad M3 support
+  without uploading any drive code at all.
+
+  G.I. Joe Loader
+  ---------------
+  Said to be the most-ripped IRQ loader. Unfortunately this is a
+  "captive" fastloader similiar to dreamload (but not restricted
+  to disk images because it is file name-based) and there is no
+  reliable way to detect if the computer has been reset to switch
+  back to the standard protocol. To exit this loader, hold down
+  the disk change button until the red LED turns on, just like
+  sleep mode.
+
+  Epyx FastLoad Cartridge
+  -----------------------
+  ONLY the fast loader from this cartridge is supported, no
+  disk editor/copier/whatever functions.
+
+  GEOS
+  ----
+  GEOS 2.0 can be booted from D64 images made from original disks
+  as well as D41/71/81 images created using geoMakeBoot (make sure to
+  Configure the system for a 1541/1571/1581 before using geoMakeBoot).
+  When file-based M-R emulation is disabled, GEOS may detect sd2iec as
+  a 1541 or 1581, depending on the version of Configure used. This may
+  cause the system to fail to boot, e.g. if sd2iec is detected as a 1581
+  while booting from a D64 disk image. It is recommended to set up file-
+  based M-R emulation when using GEOS to avoid these problems.
+
+  GEOS 1.3 may or may not work - it boots, but wasn't tested in-depth.
+  Gateway seems to work but was not tested beyond booting it from a D64
+  image.
+
+  Using the buttons for changing the current disk image is supported,
+  but do make sure that you only access disk images that the drive
+  type that is selected in GEOS would support (i.e. D64 for a 1541,
+  D64/D71 for a 1571 and D81 for a 1581).
+
+  Wheels
+  ------
+  Wheels can be booted from any disk image type it supports. The correct
+  rom emulation file (XR) MUST be set, especially for CMD HD emulation.
+
+  Do not use the disk change feature to change disk images when HD emulation
+  is in use - Wheels does not check for disk changes on that drive!
+  For other drive types the restrictions on disk image type of GEOS also
+  apply to Wheels.
+
+  ELoad Version 1
+  ---------------
+  This loader was made for EasyProg but may also be used in other programs.
+  It detects and supports the sd2iec natively.
+
+JiffyDOS:
+=========
+The JiffyDOS protocol has very relaxed timing constraints compared to
+Turbodisk, but still not as relaxed as the standard Commodore IEC protocol.
+
+x00 files:
+==========
+P00/S00/U00/R00 files are transparently supported, that means they show
+up in the directory listing with their internal file name instead of the
+FAT file name. Renaming them only changes the internal name. The XE
+command defines if x00 extensions are used when writing files, by
+default sd2iec uses them for SEQ/USR/REL files but not for PRG.
+Parsing of x00 files is always enabled even when writing them is not.
+
+x00 files are recognized by checking both the extension of the file
+(P/S/U/R with a two-digit suffix) and the header signature.
+
+Disk Images:
+============
+Disk images are recognized by their file extension (.D64, .D41, .D71, .D81,
+.DNP) and their file size (must be one of 174848, 175531, 349696, 351062,
+819200 or a multiple of 65536 for DNP). If the image has an error info block
+appended it will be used to simulate read errors. Writing to a sector with
+an error will always work, but it will not clear the indicated error.
+D81 images with error info blocks are not supported.
+
+Warning: There is at least one program out there (DirMaster v2.1/Style by
+THE WIZ) which generates broken DNP files. The usual symptom is that
+moving from a subdirectory that was created with this program back to
+its parent directory using CD:_ (left arrow) sets the current directory
+not to the parent directory, but to an incorrect sector instead. A
+workaround for this problem in sd2iec would require an unreasonable
+amount of system resources, so it is recommended to avoid creating
+subdirectories with this version of DirMaster. It is possible to fix
+this problem using a hex editor, but the exact process is beyond the scope
+of this document.
+
+M2I files:
+==========
+NOTICE: Support for M2I files will be removed in the next release, see
+        the deprecation notices at the top of this file for advice.
+
+M2I files are fully supported. sd2iec supports SEQ and USR files in this
+format in addition to PRG and DEL which were already implemented in MMC2IEC.
+For compatibility reasons the file type is not checked when opening files.
+Inside an M2I file the files are always shown as 0 (DEL) or 1 blocks
+because calling stat for every file was slowing down the directory listing
+too much. For compatibility with existing M2I files the data files do not
+use P00 headers even when the file type is SEQ or USR.
+
+REL files:
+==========
+Partial REL file support is implemented. It should work fine for existing
+files, but creating new files and/or adding records to existing files
+may fail. REL files in disk images are not supported yet, only as files
+on a FAT medium. When x00 support is disabled the first byte of a REL
+file is assumed to be the record length.
+
+Changing Disk Images
+====================
+Because some programs require more than one disk side there is support
+for changing the currently mounted disk image with a button connected
+to the disk change pin.
+
+If your circuit doesn't have a disk change pin/button you might be able to
+add it yourself:
+- For the original MMC2IEC:
+  Connect a button from PA4 to ground. PA4 is pin 36 on the DIL version
+  of the controller or pin 33 on the surface-mount version.
+- For Shadowolf's MMC2IEC 1.x PCBs:
+  Connect a button from PC4 to ground. PC4 is pin 23 on the DIL version
+  of the controller or pin 23 on the surface-mount version.
+- Any other circuit without disk change pin on a convenient connector
+  somewhere and no button dedicated to that function: Please check
+  with the supplier of the board and read config.h in the sources
+  to find out how to connect it.
+
+To use this functionality, create a text file that lists the file
+names of all disk images you want to swap between, one per line.
+The file names are parsed in the same way as the CD command, so you
+can include a path to the image if desired.
+
+Examples:
+=== example 1 ===
+FOO.D64
+BAR.D64
+BAZ.D64
+=== end of example 1 ===
+
+=== example 2 ===
+//NEATGAME/:DISK1A.D64
+//NEATGAME/:DISK1B.D64
+//NEATGAME/:DISK2A.D64
+//NEATGAME/:DISK2B.D64
+=== end of example 2 ===
+
+The swap list is enabled by sending "XS:filename" over the command channel
+with filename being the name of the image list you created, parsed
+in the same way as any other file name.
+
+After sending XS the first image in the list is automatically
+mounted. To switch to the next image in the list, push the button. If
+the new image was mounted successfully both LEDs will blink twice.
+When you've reached the last image in the list pushing the button will
+mount the first image again. All of this is completely compatible with
+normal image mounting/unmounting, so you can unmount the disk image
+any time you want and resume the mount cycle later by pushing the
+button.
+
+Due to the way this feature is implemented you are not limited to a
+swap list containing just D64 images, M2I and even FAT directories
+will work too.  FIXME: Does that still work?
+
+If you press the button when no list has been set before or when the
+previous list was cleared by sending XS the software will look for a
+file called AUTOSWAP.LST in the current (FAT-)directory and use this
+as the current swap list until you deactivate it or manually change
+the directory (otherwise an AUTOSWAP.LST in the new directory would be
+ignored until you send XS, killing the nice "it just works" feeling).
+
+FIXME: Integrate the following into the preceding
+
+The second disk change button is on
+- PA5 for LarsP
+- PC3 for Shadowolf's MMC2IEC 1.x
+- PC2 for Shadowolf's sd2iec 1.x ("Reserve" on the header)
+- PG4 for uIEC
+
+Either of those buttons will trigger the use of AUTOSWAP.LST.
+If a swap list is already active, the first button will switch
+to the next image in the list, the second button will switch
+to the previous image in the list and pushing both buttons
+together will switch to the first image in the list.
+
+The confirmation blink is red+green followed by
+green for "next", by red for "previous" and by
+red+green for "first".
+
+Sleep Mode:
+===========
+If you hold the disk change button down for two seconds, sd2iec will
+enter "sleep mode". In this mode it doesn't listen to the bus at all
+until you hold down the disk change button for two seconds again
+which resumes normal operation. Sleep mode allows you to keep
+sd2iec connected to the serial bus even when you load something
+from a different drive that uses a fast loader that doesn't
+work with more than one device on the bus.
+
+While sleep mode is active, the red LED will be on and the green LED
+will be off.
+
+Card detection test:
+====================
+Because some SD slots seem to suffer from bad/unreliable card detect
+switches a test mode for this has been implemented on the units that
+have SD card support. If you hold down the PREV button during powerup,
+the red (dirty) LED will reflect the card detect status - if the LED
+is on the card detect switch is closed. Please note that this does not
+indicate successful communication with the card but merely that the
+mechanical switch in the SD card slot is closed.
+
+On units with two sd2iec-controlled LEDs, the green (busy) LED will
+indicate the state of the write protect switch - if the LED is lit,
+the write protection is on. Due to the way the write protect notch
+works on SD cards, the indication is only valid when the card is fully
+inserted into the slot.
+
+To exit from the diagnostic mode, power-cycle the device or push the
+NEXT button once.
+
+Other important notes:
+======================
+- When you hold down the disk change (forward) button during power
+  on the software will use default values instead of those stored
+  in the EEPROM.
+- File overwrite (@foo) is implemented by deleting the file first.
+- File sizes in the directory are in blocks (of 254 bytes), but
+  the blocks free message actually reports free clusters. It is
+  a compromise of compatibility, accuracy and code size.
+- If known, the low byte of the next line link pointer of the directory
+  listing will be set to (filesize MOD 254)+2, so you can calculate the
+  true size of the file if required. The 2 is added so it can never be
+  mistaken for an end marker (0) or for the default value (1, used by at
+  least the 1541 and 1571 disk drives).
+- If your hardware supports more than one SD card, changing either one
+  will reset the current partition to 1 and the current directory of
+  all partitions to the root drive. Doing this just for the card that
+  was changed would cause lots of problems if the number of partitions
+  on the previous and the newly inserted cards are different.
+
+Compilation notes:
+==================
+sd2iec requires avr-libc version 1.6.x.
+
+sd2iec is set up to be compiled in multiple configurations, controlled by
+configuration files. By default the Makefile looks for a file named
+'config', but you can override it by providing the name on the make
+command line with "make CONFIG=filename".
+
+An example configuration file named "config-example" is provided with
+the source code, as well as abridged files corresponding to the
+release binaries. If you want to compile sd2iec for a custom hardware
+you may have to edit config.h too to change the port definitions.
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/ata.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/ata.c
new file mode 100644
index 00000000..628ea359
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/ata.c
@@ -0,0 +1,429 @@
+/*
+    Copyright Jim Brain and Brain Innovations, 2005
+
+    This file is part of uIEC.
+
+    uIEC is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    uIEC is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with uIEC; if not, write to the Free Software
+    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+    The exported functions in this file are weak-aliased to their corresponding
+    versions defined in diskio.h so when this file is the only diskio provider
+    compiled in they will be automatically used by the linker.
+
+*/
+#include <inttypes.h>
+#include <util/delay.h>
+#include <avr/interrupt.h>
+#include <avr/io.h>
+#include "config.h"
+
+#include "diskio.h"
+#include "ata.h"
+
+/*--------------------------------------------------------------------------
+
+   Module Private Functions
+
+---------------------------------------------------------------------------*/
+
+
+static DSTATUS ATA_drv_flags[2];
+
+#define ATA_WRITE_CMD(cmd) { ata_write_reg(ATA_REG_CMD,cmd); }
+
+/* Yes, this is a very inaccurate delay mechanism, but this interface only
+ * uses it for timeout that will cause a fatal error, so it should be fine.
+ * About the only downside is a possible additional delay if a drive is not
+ * present on the bus.
+ */
+
+#define DELAY_VALUE(ms) ((double)F_CPU/40000UL * ms)
+#define ATA_INIT_TIMEOUT 31000  /* 31 sec */
+
+/*-----------------------------------------------------------------------*/
+/* Read an ATA register                                                  */
+/*-----------------------------------------------------------------------*/
+
+static BYTE ata_read_reg(BYTE reg) {
+  BYTE data;
+
+  ATA_PORT_CTRL_OUT = reg;
+  ATA_PORT_CTRL_OUT &= (BYTE)~ATA_PIN_RD;
+  ATA_PORT_CTRL_OUT &= (BYTE)~ATA_PIN_RD;
+  ATA_PORT_CTRL_OUT &= (BYTE)~ATA_PIN_RD;
+  data = ATA_PORT_DATA_LO_IN;
+  ATA_PORT_CTRL_OUT |= ATA_PIN_RD;
+  return data;
+}
+
+
+/*-----------------------------------------------------------------------*/
+/* Write a byte to an ATA register                                       */
+/*-----------------------------------------------------------------------*/
+
+static void ata_write_reg(BYTE reg, BYTE data) {
+  ATA_PORT_DATA_LO_DDR = 0xff;            /* bring to output */
+  ATA_PORT_DATA_LO_OUT = data;
+  ATA_PORT_CTRL_OUT = reg;
+  ATA_PORT_CTRL_OUT &= (BYTE)~ATA_PIN_WR;
+  ATA_PORT_CTRL_OUT &= (BYTE)~ATA_PIN_WR; /* delay */
+  ATA_PORT_CTRL_OUT |= ATA_PIN_WR;
+  ATA_PORT_DATA_LO_OUT = 0xff;
+  ATA_PORT_DATA_LO_DDR = 0x00;            /* bring to input */
+}
+
+
+/*-----------------------------------------------------------------------*/
+/* Wait for Data Ready                                                   */
+/*-----------------------------------------------------------------------*/
+
+static BOOL ata_wait_data(void) {
+  BYTE s;
+  DWORD i = DELAY_VALUE(1000);
+  do {
+    if(!--i) return FALSE;
+    s=ata_read_reg(ATA_REG_STATUS);
+  } while((s & (ATA_STATUS_BSY | ATA_STATUS_DRQ)) != ATA_STATUS_DRQ && !(s & ATA_STATUS_ERR));
+  //} while((s&ATA_STATUS_BSY)!= 0 && (s&ATA_STATUS_ERR)==0 && (s & (ATA_STATUS_DRDY | ATA_STATUS_DRQ)) != (ATA_STATUS_DRDY | ATA_STATUS_DRQ));
+  if(s & ATA_STATUS_ERR)
+    return FALSE;
+
+  ata_read_reg(ATA_REG_ALTSTAT);
+  return TRUE;
+}
+
+
+static void ata_select_sector(BYTE drv, DWORD sector, BYTE count) {
+  if(ATA_drv_flags[drv] & STA_48BIT) {
+    ata_write_reg (ATA_REG_COUNT, 0);
+    ata_write_reg (ATA_REG_COUNT, count);
+    ata_write_reg (ATA_REG_LBA0, (uint8_t)(sector >> 24));
+    ata_write_reg (ATA_REG_LBA0, (uint8_t)sector);
+    ata_write_reg (ATA_REG_LBA1, 0);
+    ata_write_reg (ATA_REG_LBA1, (uint8_t)(sector >> 16));
+    ata_write_reg (ATA_REG_LBA2, 0);
+    ata_write_reg (ATA_REG_LBA2, (uint8_t)(sector >> 8));
+    ata_write_reg (ATA_REG_LBA3, ATA_LBA3_LBA
+                                 | (drv ? ATA_DEV_SLAVE : ATA_DEV_MASTER));
+  } else {
+    ata_write_reg(ATA_REG_COUNT, count);
+    ata_write_reg(ATA_REG_LBA0, (BYTE)sector);
+    ata_write_reg(ATA_REG_LBA1, (BYTE)(sector >> 8));
+    ata_write_reg(ATA_REG_LBA2, (BYTE)(sector >> 16));
+    ata_write_reg(ATA_REG_LBA3, ((BYTE)(sector >> 24) & 0x0F)
+                                | ATA_LBA3_LBA
+                                | ( drv ? ATA_DEV_SLAVE : ATA_DEV_MASTER));
+  }
+}
+
+
+/*-----------------------------------------------------------------------*/
+/* Read a part of data block                                             */
+/*-----------------------------------------------------------------------*/
+
+static void ata_read_part (BYTE *buff, BYTE ofs, BYTE count) {
+  BYTE c = 0, dl, dh;
+
+  ATA_PORT_CTRL_OUT = ATA_REG_DATA;          /* Select Data register */
+  do {
+    ATA_PORT_CTRL_OUT &= (BYTE)~ATA_PIN_RD;  /* IORD = L */
+    ATA_PORT_CTRL_OUT &= (BYTE)~ATA_PIN_RD;  /* delay */
+    dl = ATA_PORT_DATA_LO_IN;                /* Read even data */
+    dh = ATA_PORT_DATA_HI_IN;                /* Read odd data */
+    ATA_PORT_CTRL_OUT |= ATA_PIN_RD;         /* IORD = H */
+    if (count && (c >= ofs)) {               /* Pick up a part of block */
+      *buff++ = dl;
+      *buff++ = dh;
+      count--;
+    }
+  } while (++c);
+  ata_read_reg(ATA_REG_ALTSTAT);
+  ata_read_reg(ATA_REG_STATUS);
+}
+
+/*--------------------------------------------------------------------------
+
+   Public Functions
+
+---------------------------------------------------------------------------*/
+
+
+static void reset_disk(void) {
+  ATA_PORT_CTRL_OUT = (BYTE)~ATA_PIN_RESET;
+  // wait a bit for the drive to reset.
+  _delay_ms(RESET_DELAY);
+  ATA_PORT_CTRL_OUT |= ATA_PIN_RESET;
+  ATA_drv_flags[0] = STA_NOINIT;
+  ATA_drv_flags[1] = STA_NOINIT;
+}
+
+
+#ifdef CF_CHANGE_VECT
+ISR(CF_CHANGE_VECT) {
+  if (CFCARD_DETECT)
+    disk_state = DISK_CHANGED;
+  else
+    disk_state = DISK_REMOVED;
+}
+#endif
+
+
+void ata_init(void) {
+  CFCARD_DETECT_SETUP();
+  CF_CHANGE_SETUP();
+  disk_state=DISK_OK;
+  ATA_drv_flags[0] = STA_NOINIT | STA_FIRSTTIME;
+  if(ATA_PORT_DATA_HI_OUT == 0xff)
+    ATA_drv_flags[0] = STA_NOINIT | STA_NODISK;
+  ATA_drv_flags[1] = STA_NOINIT | STA_FIRSTTIME;
+
+  /* Initialize the ATA control port */
+  ATA_PORT_CTRL_OUT=0xff;
+  ATA_PORT_CTRL_DDR=0xff;
+}
+void disk_init(void) __attribute__ ((weak, alias("ata_init")));
+
+
+/*-----------------------------------------------------------------------*/
+/* Initialize Disk Drive                                                 */
+/*-----------------------------------------------------------------------*/
+
+DSTATUS ata_initialize (BYTE drv) {
+  BYTE data[(83 - 49 + 1) * 2];
+  DWORD i = DELAY_VALUE(ATA_INIT_TIMEOUT);
+
+  if(drv>1) return STA_NOINIT;
+  if(!(ATA_drv_flags[drv] & STA_FIRSTTIME) && disk_state != DISK_OK)
+    reset_disk();
+  if(ATA_drv_flags[drv] & STA_NODISK) return STA_NOINIT; // cannot initialize a drive with no disk in it.
+  // we need to set the drive.
+  ata_write_reg (ATA_REG_LBA3, ATA_LBA3_LBA | (drv ? ATA_DEV_SLAVE : ATA_DEV_MASTER));
+  do {
+    if (!--i) goto di_error;
+  } while ((ata_read_reg(ATA_REG_STATUS) & (ATA_STATUS_BSY | ATA_STATUS_DRDY)) == ATA_STATUS_BSY);
+
+  ata_write_reg(ATA_REG_DEVCTRL, ATA_DEVCTRL_SRST | ATA_DEVCTRL_NIEN);  /* Software reset */
+  _delay_ms(20);
+  ata_write_reg(ATA_REG_DEVCTRL, ATA_DEVCTRL_NIEN);
+  _delay_ms(20);
+  i = DELAY_VALUE(ATA_INIT_TIMEOUT);
+  do {
+    if (!--i) goto di_error;
+  } while ((ata_read_reg(ATA_REG_STATUS) & (ATA_STATUS_DRDY|ATA_STATUS_BSY)) != ATA_STATUS_DRDY);
+
+  ata_write_reg (ATA_REG_FEATURES, 3); /* set PIO mode 0 */
+  ata_write_reg (ATA_REG_COUNT, 1);
+  ATA_WRITE_CMD (ATA_CMD_SETFEATURES);
+  i = DELAY_VALUE(1000);
+  do {
+    if(!--i) goto di_error;
+  } while(ata_read_reg(ATA_REG_STATUS) & ATA_STATUS_BSY);  /* Wait cmd ready */
+  ATA_WRITE_CMD(ATA_CMD_IDENTIFY);
+  if(!ata_wait_data()) goto di_error;
+  ata_read_part(data, 49, 83 - 49 + 1);
+  if(!(data[1] & 0x02)) goto di_error; /* No LBA support */
+  if(data[(83 - 49) * 2 + 1] & 0x04)   /* 48 bit addressing... */
+    ATA_drv_flags[drv] |= STA_48BIT;
+  ATA_drv_flags[drv] &= (BYTE)~( STA_NOINIT | STA_NODISK);
+
+  disk_state = DISK_OK;
+  return 0;
+
+di_error:
+  ATA_drv_flags[drv]=(STA_NOINIT | STA_NODISK); // no disk in drive
+  return STA_NOINIT | STA_NODISK;
+}
+DSTATUS disk_initialize (BYTE drv) __attribute__ ((weak, alias("ata_initialize")));
+
+
+/*-----------------------------------------------------------------------*/
+/* Return Disk Status                                                    */
+/*-----------------------------------------------------------------------*/
+
+DSTATUS ata_status (BYTE drv) {
+  if(drv>1)
+     return STA_NOINIT;
+  return ATA_drv_flags[drv] & (STA_NOINIT | STA_NODISK);
+}
+DSTATUS disk_status (BYTE drv) __attribute__ ((weak, alias("ata_status")));
+
+
+/*-----------------------------------------------------------------------*/
+/* Read Sector(s)                                                        */
+/*-----------------------------------------------------------------------*/
+
+DRESULT ata_read (BYTE drv, BYTE *data, DWORD sector, BYTE count) {
+  BYTE c, iord_l, iord_h;
+
+  if (drv > 1 || !count) return RES_PARERR;
+  if (ATA_drv_flags[drv] & STA_NOINIT) return RES_NOTRDY;
+
+  /* Issue Read Sector(s) command */
+  ata_select_sector(drv, sector, count);
+  ATA_WRITE_CMD(ATA_drv_flags[drv] & STA_48BIT ? ATA_CMD_READ_EXT : ATA_CMD_READ);
+
+  iord_h = ATA_REG_DATA;
+  iord_l = ATA_REG_DATA & (BYTE)~ATA_PIN_RD;
+  do {
+    if (!ata_wait_data()) return RES_ERROR; /* Wait data ready */
+    ATA_PORT_CTRL_OUT = ATA_REG_DATA;
+    c = 0;
+    do {
+      ATA_PORT_CTRL_OUT = iord_l;       /* IORD = L */
+      ATA_PORT_CTRL_OUT = iord_l;       /* delay */
+      ATA_PORT_CTRL_OUT = iord_l;       /* delay */
+      ATA_PORT_CTRL_OUT = iord_l;       /* delay */
+      ATA_PORT_CTRL_OUT = iord_l;       /* delay */
+      *data++ = ATA_PORT_DATA_LO_IN;    /* Get even data */
+      *data++ = ATA_PORT_DATA_HI_IN;    /* Get odd data */
+      ATA_PORT_CTRL_OUT = iord_h;       /* IORD = H */
+      ATA_PORT_CTRL_OUT = iord_h;       /* delay */
+      ATA_PORT_CTRL_OUT = iord_h;       /* delay */
+      ATA_PORT_CTRL_OUT = iord_h;       /* delay */
+    } while (++c);
+  } while (--count);
+
+  ata_read_reg(ATA_REG_ALTSTAT);
+  ata_read_reg(ATA_REG_STATUS);
+
+  return RES_OK;
+}
+DRESULT disk_read (BYTE drv, BYTE *data, DWORD sector, BYTE count) __attribute__ ((weak, alias("ata_read")));
+
+
+/*-----------------------------------------------------------------------*/
+/* Write Sector(s)                                                       */
+/*-----------------------------------------------------------------------*/
+
+#if _READONLY == 0
+DRESULT ata_write (BYTE drv, const BYTE *data, DWORD sector, BYTE count) {
+  BYTE s, c, iowr_l, iowr_h;
+
+  if (drv > 1 || !count) return RES_PARERR;
+  if (ATA_drv_flags[drv] & STA_NOINIT) return RES_NOTRDY;
+
+  /* Issue Write Setor(s) command */
+  ata_select_sector(drv,sector,count);
+  ATA_WRITE_CMD(ATA_drv_flags[drv] & STA_48BIT ? ATA_CMD_WRITE_EXT : ATA_CMD_WRITE);
+
+  iowr_h = ATA_REG_DATA;
+  iowr_l = ATA_REG_DATA & (BYTE)~ATA_PIN_WR;
+  do {
+    if (!ata_wait_data()) return RES_ERROR;
+    ATA_PORT_CTRL_OUT = ATA_REG_DATA;
+    ATA_PORT_DATA_LO_DDR = 0xff;      /* bring to output */
+    ATA_PORT_DATA_HI_DDR = 0xff;      /* bring to output */
+    c = 0;
+    do {
+      ATA_PORT_DATA_LO_OUT = *data++; /* Set even data */
+      ATA_PORT_DATA_HI_OUT = *data++; /* Set odd data */
+      ATA_PORT_CTRL_OUT = iowr_l;     /* IOWR = L */
+      ATA_PORT_CTRL_OUT = iowr_h;     /* IOWR = H */
+    } while (++c);
+  } while (--count);
+  ATA_PORT_DATA_LO_OUT = 0xff;        /* Set D0-D15 as input */
+  ATA_PORT_DATA_HI_OUT = 0xff;
+  ATA_PORT_DATA_LO_DDR = 0x00;        /* bring to input */
+  ATA_PORT_DATA_HI_DDR = 0x00;        /* bring to input */
+
+  DWORD i = DELAY_VALUE(1000);
+  do {
+    if(!--i) return RES_ERROR;
+    s=ata_read_reg(ATA_REG_STATUS);   /* Wait cmd ready */
+  } while(s & ATA_STATUS_BSY);
+  if (s & ATA_STATUS_ERR) return RES_ERROR;
+  ata_read_reg(ATA_REG_ALTSTAT);
+  ata_read_reg(ATA_REG_STATUS);
+
+  return RES_OK;
+}
+DRESULT disk_write (BYTE drv, const BYTE *data, DWORD sector, BYTE count) __attribute__ ((weak, alias("ata_write")));
+#endif /* _READONLY == 0 */
+
+
+/*-----------------------------------------------------------------------*/
+/* Miscellaneous Functions                                               */
+/*-----------------------------------------------------------------------*/
+
+#if _USE_IOCTL != 0
+DRESULT ata_ioctl (BYTE drv, BYTE ctrl, void *buff) {
+  BYTE n, dl, dh, ofs, w, *ptr = buff;
+
+  if (drv > 1) return RES_PARERR;
+  if (ATA_drv_flags[drv] & STA_NOINIT) return RES_NOTRDY;
+
+  switch (ctrl) {
+    case GET_SECTOR_COUNT : /* Get number of sectors on the disk (DWORD) */
+      ofs = 60; w = 2; n = 0;
+      break;
+
+    case GET_SECTOR_SIZE :  /* Get sectors on the disk (WORD) */
+      *(WORD*)buff = 512;
+      return RES_OK;
+
+    case GET_BLOCK_SIZE :   /* Get erase block size in sectors (DWORD) */
+      *(DWORD*)buff = 1;
+      return RES_OK;
+
+    case CTRL_SYNC :        /* Nothing to do */
+      return RES_OK;
+
+    case ATA_GET_REV :      /* Get firmware revision (8 chars) */
+      ofs = 23; w = 4; n = 4;
+      break;
+
+    case ATA_GET_MODEL :    /* Get model name (40 chars) */
+      ofs = 27; w = 20; n = 20;
+      break;
+
+    case ATA_GET_SN :       /* Get serial number (20 chars) */
+      ofs = 10; w = 10; n = 10;
+      break;
+
+    default:
+      return RES_PARERR;
+  }
+
+  ATA_WRITE_CMD(ATA_CMD_IDENTIFY);
+  if (!ata_wait_data()) return RES_ERROR;
+  ata_read_part(ptr, ofs, w);
+  while (n--) {
+    dl = *ptr; dh = *(ptr+1);
+    *ptr++ = dh; *ptr++ = dl;
+  }
+
+  return RES_OK;
+}
+DRESULT disk_ioctl (BYTE drv, BYTE ctrl, void *buff) __attribute__ ((weak, alias("ata_ioctl")));
+#endif /*  _USE_IOCTL != 0 */
+
+DRESULT ata_getinfo(BYTE drv, BYTE page, void *buffer) {
+  diskinfo0_t *di = buffer;
+
+  if (page != 0)
+    return RES_ERROR;
+
+  ATA_WRITE_CMD(ATA_CMD_IDENTIFY);
+  if (!ata_wait_data()) return RES_ERROR;
+
+  ata_read_part((BYTE *)&di->sectorcount, 60, 2);
+
+  di->validbytes = sizeof(diskinfo0_t);
+  di->disktype   = DISK_TYPE_ATA;
+  di->sectorsize = 2;
+
+  return RES_OK;
+}
+DRESULT disk_getinfo(BYTE drv, BYTE page, void *buffer) __attribute__ ((weak, alias("ata_getinfo")));
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/ata.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/ata.h
new file mode 100644
index 00000000..d25fb1dc
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/ata.h
@@ -0,0 +1,82 @@
+#ifndef ATA_H_
+#define ATA_H_
+
+/* ATA command */
+#define ATA_CMD_RESET        0x08 /* DEVICE RESET */
+#define ATA_CMD_READ         0x20 /* READ SECTOR(S) */
+#define ATA_CMD_WRITE        0x30 /* WRITE SECTOR(S) */
+#define ATA_CMD_IDENTIFY     0xec /* DEVICE IDENTIFY */
+#define ATA_CMD_SETFEATURES  0xef /* SET FEATURES */
+#define ATA_CMD_SPINDOWN     0xe0
+#define ATA_CMD_SPINUP       0xe1
+#define ATA_CMD_READ_EXT     0x24
+#define ATA_CMD_WRITE_EXT    0x34
+
+/* ATA register bit definitions */
+#define ATA_LBA3_LBA         0x40
+
+#define ATA_STATUS_BSY       0x80
+#define ATA_STATUS_DRDY      0x40
+#define ATA_STATUS_DRQ       0x08
+#define ATA_STATUS_ERR       0x01
+
+#define ATA_DEVCTRL_SRST     0x40
+#define ATA_DEVCTRL_NIEN     0x20
+
+/* Control Ports */
+#define ATA_PORT_CTRL_OUT    PORTF
+#define ATA_PORT_CTRL_DDR    DDRF
+#define ATA_PORT_DATA_HI_OUT PORTC
+#define ATA_PORT_DATA_HI_DDR DDRC
+#define ATA_PORT_DATA_HI_IN  PINC
+#define ATA_PORT_DATA_LO_OUT PORTA
+#define ATA_PORT_DATA_LO_DDR DDRA
+#define ATA_PORT_DATA_LO_IN  PINA
+
+/* Bit definitions for Control Port */
+
+#define ATA_PIN_RESET        (1<<PIN5)
+#define ATA_PIN_WR           (1<<PIN7)
+#define ATA_PIN_RD           (1<<PIN6)
+#define ATA_PIN_A0           (1<<PIN2)
+#define ATA_PIN_A1           (1<<PIN3)
+#define ATA_PIN_A2           (1<<PIN4)
+#define ATA_PIN_CS0          (1<<PIN0)
+#define ATA_PIN_CS1          (1<<PIN1)
+
+#define ATA_REG_BASE         (ATA_PIN_RD | ATA_PIN_WR | ATA_PIN_RESET)
+#define ATA_REG_DATA             (ATA_REG_BASE | ATA_PIN_CS1)
+
+#define ATA_REG_ERROR        (ATA_REG_BASE | ATA_PIN_CS1 | ATA_PIN_A0)
+#define ATA_REG_FEATURES     ATA_REG_ERROR
+#define ATA_REG_COUNT        (ATA_REG_BASE | ATA_PIN_CS1 | ATA_PIN_A1)
+#define ATA_REG_LBA0         (ATA_REG_BASE | ATA_PIN_CS1 | ATA_PIN_A1 | ATA_PIN_A0)
+#define ATA_REG_LBA1         (ATA_REG_BASE | ATA_PIN_CS1 | ATA_PIN_A2)
+#define ATA_REG_LBA2         (ATA_REG_BASE | ATA_PIN_CS1 | ATA_PIN_A2 | ATA_PIN_A0)
+#define ATA_REG_LBA3         (ATA_REG_BASE | ATA_PIN_CS1 | ATA_PIN_A2 | ATA_PIN_A1)
+#define ATA_REG_STATUS       (ATA_REG_BASE | ATA_PIN_CS1 | ATA_PIN_A2 | ATA_PIN_A1 | ATA_PIN_A0)
+#define ATA_REG_CMD          ATA_REG_STATUS
+#define ATA_REG_ALTSTAT      (ATA_REG_BASE | ATA_PIN_CS0 | ATA_PIN_A2 | ATA_PIN_A1)
+#define ATA_REG_DEVCTRL      (ATA_REG_BASE | ATA_PIN_CS0 | ATA_PIN_A2 | ATA_PIN_A1 | ATA_PIN_A0)
+
+#define ATA_DEV_MASTER       0x00
+#define ATA_DEV_SLAVE        0x10
+
+#define STA_48BIT            0x08
+#define STA_FIRSTTIME        0x80
+
+#define RESET_DELAY          100   /* ms to hold RESET line low to init CF and IDE */
+
+/* These functions are weak-aliased to disk_... */
+void ata_init(void);
+DSTATUS ata_initialize (BYTE drv);
+DSTATUS ata_status (BYTE drv);
+DRESULT ata_read (BYTE drv, BYTE *data, DWORD sector, BYTE count);
+DRESULT ata_write (BYTE drv, const BYTE *data, DWORD sector, BYTE count);
+#if _USE_IOCTL != 0
+DRESULT ata_ioctl (BYTE drv, BYTE ctrl, void *buff);
+#endif
+DRESULT ata_getinfo(BYTE drv, BYTE page, void *buffer);
+
+
+#endif /*ATA_H_*/
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/avrcompat.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/avrcompat.h
new file mode 100644
index 00000000..7bb71b32
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/avrcompat.h
@@ -0,0 +1,205 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   avrcompat.h: Compatibility defines for multiple target chips
+*/
+
+#ifndef AVRCOMPAT_H
+#define AVRCOMPAT_H
+
+/* USART */
+
+#if defined __AVR_ATmega644__  \
+ || defined __AVR_ATmega644P__ \
+ || defined __AVR_ATmega1281__ \
+ || defined __AVR_ATmega2561__ \
+ || defined __AVR_ATmega1284P__
+
+#  ifdef USE_UART1
+#    define RXC   RXC1
+#    define RXEN  RXEN1
+#    define TXC   TXC1
+#    define TXEN  TXEN1
+#    define UBRRH UBRR1H
+#    define UBRRL UBRR1L
+#    define UCSRA UCSR1A
+#    define UCSRB UCSR1B
+#    define UCSRC UCSR1C
+#    define UCSZ0 UCSZ10
+#    define UCSZ1 UCSZ11
+#    define UDR   UDR1
+#    define UDRIE UDRIE1
+#    define RXCIE RXCIE1
+#    define USART_UDRE_vect USART1_UDRE_vect
+#    define USART_RX_vect   USART1_RX_vect
+#  else
+     /* Default is USART0 */
+#    define RXC   RXC0
+#    define RXEN  RXEN0
+#    define TXC   TXC0
+#    define TXEN  TXEN0
+#    define UBRRH UBRR0H
+#    define UBRRL UBRR0L
+#    define UCSRA UCSR0A
+#    define UCSRB UCSR0B
+#    define UCSRC UCSR0C
+#    define UCSZ0 UCSZ00
+#    define UCSZ1 UCSZ01
+#    define UDR   UDR0
+#    define UDRIE UDRIE0
+#    define RXCIE RXCIE0
+#    define USART_UDRE_vect USART0_UDRE_vect
+#    define USART_RX_vect   USART0_RX_vect
+#  endif
+
+#elif defined __AVR_ATmega48__ || defined __AVR_ATmega88__ || defined __AVR_ATmega168__
+/* These chips include the USART number in their register names, */
+/* but not in the ISR name. */
+#    define RXC   RXC0
+#    define RXEN  RXEN0
+#    define TXC   TXC0
+#    define TXEN  TXEN0
+#    define UBRRH UBRR0H
+#    define UBRRL UBRR0L
+#    define UCSRA UCSR0A
+#    define UCSRB UCSR0B
+#    define UCSRC UCSR0C
+#    define UCSZ0 UCSZ00
+#    define UCSZ1 UCSZ01
+#    define UDR   UDR0
+#    define UDRIE UDRIE0
+
+#elif defined __AVR_ATmega32__
+#  define TIMER2_COMPA_vect TIMER2_COMP_vect
+#  define TCCR0B TCCR0
+#  define TCCR2A TCCR2
+#  define TCCR2B TCCR2
+#  define TIFR0  TIFR
+#  define TIMSK2 TIMSK
+#  define OCIE2A OCIE2
+#  define OCR2A  OCR2
+
+#elif defined __AVR_ATmega128__
+#  define UBRRH  UBRR0H
+#  define UBRRL  UBRR0L
+#  define UCSRA  UCSR0A
+#  define UCSRB  UCSR0B
+#  define UCSRC  UCSR0C
+#  define UDR    UDR0
+#  define USART_UDRE_vect USART0_UDRE_vect
+#  define TIMER2_COMPA_vect TIMER2_COMP_vect
+#  define TCCR0B TCCR0
+#  define TCCR2A TCCR2
+#  define TCCR2B TCCR2
+#  define TIFR0  TIFR
+#  define TIMSK1 TIMSK
+#  define TIMSK2 TIMSK
+#  define OCIE2A OCIE2
+#  define OCR2A  OCR2
+
+#else
+#  error Unknown chip! (USART)
+#endif
+
+/* SPI and I2C */
+#if defined __AVR_ATmega32__    \
+ || defined __AVR_ATmega644__   \
+ || defined __AVR_ATmega644P__  \
+ || defined __AVR_ATmega1284P__
+
+#  define SPI_PORT   PORTB
+#  define SPI_DDR    DDRB
+#  define SPI_SS     _BV(PB4)
+#  define SPI_MOSI   _BV(PB5)
+#  define SPI_MISO   _BV(PB6)
+#  define SPI_SCK    _BV(PB7)
+#  define HWI2C_PORT PORTC
+#  define HWI2C_SDA  _BV(PC1)
+#  define HWI2C_SCL  _BV(PC0)
+
+#elif defined __AVR_ATmega128__ || defined __AVR_ATmega1281__ || defined __AVR_ATmega2561__
+
+#  define SPI_PORT  PORTB
+#  define SPI_DDR   DDRB
+#  define SPI_SS    _BV(PB0)
+#  define SPI_SCK   _BV(PB1)
+#  define SPI_MOSI  _BV(PB2)
+#  define SPI_MISO  _BV(PB3)
+#  define HWI2C_PORT PORTD
+#  define HWI2C_SDA  _BV(PD1)
+#  define HWI2C_SCL  _BV(PD0)
+
+#elif defined __AVR_ATmega48__ || defined __AVR_ATmega88__ || defined __AVR_ATmega168__
+
+#  define SPI_PORT   PORTB
+#  define SPI_DDR    DDRB
+#  define SPI_SS     _BV(PB2)
+#  define SPI_SCK    _BV(PB5)
+#  define SPI_MOSI   _BV(PB3)
+#  define SPI_MISO   _BV(PB4)
+#  define HWI2C_PORT PORTC
+#  define HWI2C_SDA  _BV(PC4)
+#  define HWI2C_SCL  _BV(PC5)
+
+#else
+#  error Unknown chip! (SPI/TWI)
+#endif
+
+#define SPI_MASK (SPI_SS|SPI_MOSI|SPI_MISO|SPI_SCK)
+
+/* Fix for incompatible include in avr-libc for the 1284P */
+#if defined __AVR_ATmega1284P__ && !defined(PA0)
+#  define PA0 0
+#  define PA1 1
+#  define PA2 2
+#  define PA3 3
+#  define PA4 4
+#  define PA5 5
+#  define PA6 6
+#  define PA7 7
+#  define PB0 0
+#  define PB1 1
+#  define PB2 2
+#  define PB3 3
+#  define PB4 4
+#  define PB5 5
+#  define PB6 6
+#  define PB7 7
+#  define PC0 0
+#  define PC1 1
+#  define PC2 2
+#  define PC3 3
+#  define PC4 4
+#  define PC5 5
+#  define PC6 6
+#  define PC7 7
+#  define PD0 0
+#  define PD1 1
+#  define PD2 2
+#  define PD3 3
+#  define PD4 4
+#  define PD5 5
+#  define PD6 6
+#  define PD7 7
+#endif
+
+#endif /* AVRCOMPAT_H */
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/buffers.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/buffers.c
new file mode 100644
index 00000000..33ef0576
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/buffers.c
@@ -0,0 +1,303 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   buffers.c: Internal buffer management
+*/
+
+#include <avr/io.h>
+#include <stdint.h>
+#include <string.h>
+#include "config.h"
+#include "dirent.h"
+#include "errormsg.h"
+#include "ff.h"
+#include "led.h"
+#include "buffers.h"
+
+dh_t    matchdh;
+uint8_t entrybuf[33];
+
+/// One additional buffer structure for channel 15
+buffer_t buffers[CONFIG_BUFFER_COUNT+1];
+
+/// The actual data buffers
+static uint8_t bufferdata[CONFIG_BUFFER_COUNT*256];
+
+/// Number of active data buffers + 16 * number of dirty buffers
+uint8_t active_buffers;
+
+/**
+ * callback_dummy - dummy function for the buffer callbacks
+ * @buf: pointer to a buffer
+ *
+ * This is the default function used for all buffer callbacks so
+ * the caller doesn't need to check if the callbacks are valid.
+ * It always returns 0 for success.
+ */
+uint8_t callback_dummy(buffer_t *buf) {
+  return 0;
+}
+
+/**
+ * buffers_init - initializes the buffer data structures
+ *
+ * This function initialized all the buffer-related data structures.
+ */
+void buffers_init(void) {
+  uint8_t i;
+
+  memset(buffers,0,sizeof(buffers));
+  for (i=0;i<CONFIG_BUFFER_COUNT;i++)
+    buffers[i].data = bufferdata + 256*i;
+
+  buffers[CONFIG_BUFFER_COUNT].data      = error_buffer;
+  buffers[CONFIG_BUFFER_COUNT].secondary = 15;
+  buffers[CONFIG_BUFFER_COUNT].allocated = 1;
+  buffers[CONFIG_BUFFER_COUNT].read      = 1;
+  buffers[CONFIG_BUFFER_COUNT].write     = 1;
+  buffers[CONFIG_BUFFER_COUNT].sendeoi   = 1;
+  buffers[CONFIG_BUFFER_COUNT].refill    = set_ok_message;
+  buffers[CONFIG_BUFFER_COUNT].cleanup   = callback_dummy;
+}
+
+/**
+ * alloc_specific_buffer - allocate a specific buffer for system use
+ *
+ * This function allocates the specified buffer and marks it as used.
+ * Returns without doing anything if the buffer is already allocated.
+ */
+static void alloc_specific_buffer(uint8_t bufnum) {
+  if (!buffers[bufnum].allocated) {
+    /* Clear everything except the data pointer */
+    memset(sizeof(uint8_t *)+(char *)&(buffers[bufnum]),0,sizeof(buffer_t)-sizeof(uint8_t *));
+    buffers[bufnum].allocated = 1;
+    buffers[bufnum].secondary = BUFFER_SEC_SYSTEM;
+    buffers[bufnum].refill    = callback_dummy;
+    buffers[bufnum].cleanup   = callback_dummy;
+  }
+}
+
+/**
+ * alloc_system_buffer - allocate a buffer for system use
+ *
+ * This function allocates a buffer and marks it as used. Returns a
+ * pointer to the buffer structure or NULL of no buffer is free.
+ */
+buffer_t *alloc_system_buffer(void) {
+  uint8_t i;
+
+  for (i=0;i<CONFIG_BUFFER_COUNT;i++) {
+    if (!buffers[i].allocated) {
+      alloc_specific_buffer(i);
+      return &buffers[i];
+    }
+  }
+
+  set_error(ERROR_NO_CHANNEL);
+  return NULL;
+}
+
+/**
+ * alloc_buffer - allocates a buffer
+ *
+ * This function allocates a buffer and marks it as used. It will also
+ * turn on the busy LED to notify the user. Returns a pointer to the
+ * buffer structure or NULL if no buffer is free.
+ */
+buffer_t *alloc_buffer(void) {
+  buffer_t *buf = alloc_system_buffer();
+  if (buf != NULL) {
+    buf->secondary = 0;
+    active_buffers++;
+    set_busy_led(1);
+  }
+  return buf;
+}
+
+/**
+ * alloc_linked_buffers - allocates linked buffers
+ * @count    : Number of buffers to allocate
+ *
+ * This function allocates count buffers, marks them as used and
+ * links them. It will also turn on the busy LED to notify the user.
+ * Returns a pointer to the first buffer structure or NULL if
+ * not enough buffers are free. The data segments of the allocated
+ * buffers are guranteed to be continuous.
+ */
+buffer_t *alloc_linked_buffers(uint8_t count) {
+  uint8_t i,freebufs,start;
+
+  freebufs = 0;
+  start    = 0;
+  for (i=0;i<CONFIG_BUFFER_COUNT;i++) {
+    if (buffers[i].allocated) {
+      /* Look for continuous buffers */
+      /* Switching data segments is possible, but probably not required */
+      freebufs = 0;
+    } else {
+      if (freebufs == 0)
+        start = i;
+      freebufs++;
+      /* Found enough free space */
+      if (freebufs == count)
+        break;
+    }
+  }
+
+  if (freebufs < count) {
+    set_error(ERROR_NO_CHANNEL);
+    return NULL;
+  }
+
+  /* Chain the buffers */
+  for (i=0;i<count;i++) {
+    alloc_specific_buffer(start+i);
+    active_buffers++;
+    buffers[start+i].secondary = 0;
+    buffers[start+i].pvt.buffer.next  = &buffers[start+i+1];
+    buffers[start+i].pvt.buffer.first = &buffers[start];
+    buffers[start+i].pvt.buffer.size  = count;
+  }
+
+  set_busy_led(1);
+
+  buffers[start+count-1].pvt.buffer.next = NULL;
+
+  return &buffers[start];
+}
+
+/**
+ * cleanup_and_free_buffer - cleanup and deallocate a buffer
+ * @buffer: pointer to the buffer structure to cleanup and mark as free
+ *
+ * This function calls the cleanup function and deallocates the buffer.
+ */
+void cleanup_and_free_buffer(buffer_t *buffer) {
+  buffer->cleanup(buffer);
+  free_buffer(buffer);
+}
+
+/**
+ * free_buffer - deallocate a buffer
+ * @buffer: pointer to the buffer structure to mark as free
+ *
+ * This function deallocates the given buffer. If the pointer is NULL,
+ * the buffer is already freed or the buffer is assigned to secondary
+ * address 15 nothing will happen. This function will also update the
+ * two LEDs accordings to the remaining number of open and writeable
+ * buffers.
+ */
+void free_buffer(buffer_t *buffer) {
+  if (buffer == NULL) return;
+  if (buffer->secondary == 15) return;
+  if (!buffer->allocated) return;
+
+  buffer->allocated = 0;
+
+  if (buffer->dirty)
+    active_buffers -= 16;
+  if (buffer->secondary < BUFFER_SEC_SYSTEM)
+    active_buffers--;
+
+  update_leds();
+}
+
+/**
+ * free_multiple_buffers - deallocates multiple buffers
+ * @flags: Defines which buffers should be deallocated
+ *
+ * This function iterates over all buffers and frees those which match the
+ * specification in flags (see FMB_* defines). If FMB_CLEAN is set it will
+ * also call the cleanup function for those buffers which are about to be
+ * freed. When FMB_CLEAN is set, the function returns 0 if all cleanup
+ * functions returned 0 or 1 if at least one did not. When FMB_CLEAN is not
+ * set, returns 0.
+ */
+uint8_t free_multiple_buffers(uint8_t flags) {
+  uint8_t i,res;
+
+  res = 0;
+
+  for (i=0;i<CONFIG_BUFFER_COUNT;i++) {
+    if (buffers[i].allocated) {
+      if ((flags & FMB_FREE_SYSTEM) || buffers[i].secondary < BUFFER_SEC_SYSTEM) {
+        if ((flags & FMB_FREE_STICKY) || !buffers[i].sticky) {
+          if (flags & FMB_CLEAN) {
+            res = res || buffers[i].cleanup(&buffers[i]);
+          }
+          free_buffer(&buffers[i]);
+        }
+      }
+    }
+  }
+
+  return res;
+}
+
+/**
+ * find_buffer - find the buffer corresponding to a secondary address
+ * @secondary: secondary address to look for
+ *
+ * This function returns a pointer to the first buffer structure whose
+ * secondary address is the same as the one given. Returns NULL if
+ * no matching buffer was found.
+ */
+buffer_t *find_buffer(uint8_t secondary) {
+  uint8_t i;
+
+  for (i=0;i<CONFIG_BUFFER_COUNT+1;i++) {
+    if (buffers[i].allocated && buffers[i].secondary == secondary)
+      return &buffers[i];
+  }
+  return NULL;
+}
+
+/**
+ * mark_buffer_dirty - mark a buffer as dirty
+ * @buf: pointer to the buffer
+ *
+ * This function marks the given buffer as dirty, tracks
+ * this in active_buffers and turns on the dirty LED.
+ */
+void mark_buffer_dirty(buffer_t *buf) {
+  if (!buf->dirty) {
+    buf->dirty = 1;
+    active_buffers += 16;
+    set_dirty_led(1);
+  }
+}
+
+/**
+ * mark_buffer_clean - mark a buffer as clean
+ * @buf: pointer to the buffer
+ *
+ * This function marks the given buffer as clean, tracks
+ * this in active_buffers and turns off the dirty LED if required.
+ */
+void mark_buffer_clean(buffer_t *buf) {
+  if (buf->dirty) {
+    buf->dirty = 0;
+    active_buffers -= 16;
+    if (get_dirty_buffer_count() == 0)
+      set_dirty_led(0);
+  }
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/buffers.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/buffers.h
new file mode 100644
index 00000000..fcc626ec
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/buffers.h
@@ -0,0 +1,194 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   buffers.h: Data structures for the internal buffers
+*/
+
+#ifndef BUFFERS_H
+#define BUFFERS_H
+
+#include <stdint.h>
+#include "dirent.h"
+
+#define BUFFER_SEC_SYSTEM 100
+
+/* Special-purpose buffer numbers */
+#define BUFFER_SYS_BAM     (BUFFER_SEC_SYSTEM+1)
+#define BUFFER_SYS_GEOSKEY (BUFFER_SEC_SYSTEM+2)
+#define BUFFER_SEC_CHAIN   (BUFFER_SEC_SYSTEM-1)
+
+/* Flags for free_multiple_buffers */
+#define FMB_CLEAN          (1<<0)
+#define FMB_FREE_SYSTEM    (1<<1)
+#define FMB_FREE_STICKY    (1<<2)
+#define FMB_ALL            (FMB_FREE_STICKY|FMB_FREE_SYSTEM)
+#define FMB_ALL_CLEAN      (FMB_FREE_STICKY|FMB_FREE_SYSTEM|FMB_CLEAN)
+#define FMB_USER           (FMB_FREE_STICKY)
+#define FMB_USER_CLEAN     (FMB_FREE_STICKY|FMB_CLEAN)
+#define FMB_UNSTICKY       (FMB_FREE_SYSTEM)
+#define FMB_UNSTICKY_CLEAN (FMB_FREE_SYSTEM|FMB_CLEAN)
+
+typedef enum { DIR_FMT_CBM, DIR_FMT_CMD_SHORT, DIR_FMT_CMD_LONG } dirformat_t;
+
+/**
+ * struct buffer_s - buffer handling structire
+ * @data     : Pointer to the data area of the buffer, MUST be the first field
+ * @lastused : Index to the last used byted
+ * @position : Index of the byte that will be read/written next
+ * @seconday : Secondary address the buffer is associated with
+ * @recordlen: Record length, if buffer points to a REL file
+ * @allocated: Flags if the buffer is allocated or not
+ * @mustflush: Flags if the buffer must be flushed before adding characters
+ * @read     : Flags if the buffer was opened for reading
+ * @write    : Flags if the buffer was opened for writing
+ * @sendeoi  : Flags if the last byte should be sent with EOI
+ * @sticky   : Flags if the buffer will survive garbage collection
+ * @refill   : Callback to refill/write out the buffer, returns true on error
+ * @cleanup  : Callback to clean up and save remaining data, returns true on error
+ *
+ * Most allocated buffers point into the same bufferdata array, but
+ * the error channel uses the same structure to avoid special-casing it
+ * everywhere.
+ */
+typedef struct buffer_s {
+  /* The error channel uses the same data structure for convenience reasons, */
+  /* so data must be a pointer. It also allows swapping the buffers around   */
+  /* in case I ever add external ram (not XRAM) to the design (which will    */
+  /* require locking =( ).                                                   */
+  uint8_t *data;
+  uint8_t lastused;
+  uint8_t position;
+  uint8_t secondary;
+  uint8_t recordlen;
+  uint32_t fptr;
+  int     allocated:1;
+  int     mustflush:1;
+  int     read:1;
+  int     write:1;
+  int     dirty:1;
+  int     sendeoi:1;
+  int     sticky:1;
+  uint8_t (*seek) (struct buffer_s *buffer, uint32_t position, uint8_t index);
+  uint8_t (*refill)(struct buffer_s *buffer);
+  uint8_t (*cleanup)(struct buffer_s *buffer);
+
+  /* private: */
+  union {
+    struct {
+      dh_t dh;             /* Directory handle */
+      uint8_t filetype;    /* File type */
+      dirformat_t format;  /* Dir format */
+      uint8_t *matchstr;   /* Pointer to filename pattern */
+      date_t *match_start; /* Start matching date */
+      date_t *match_end;   /* End matching date */
+      uint8_t counter;     /* used for counting raw entries */
+    } dir;
+    struct {
+      FIL fh;              /* File access via FAT */
+      uint8_t headersize;  /* offset to start of file data */
+    } fat;
+    d64fh_t d64;           /* File access on D64  */
+    struct {
+      uint8_t part;        /* partition number for $=P */
+      uint8_t *matchstr;   /* Pointer to filename pattern */
+    } pdir;
+    struct {
+      uint8_t refcount;    /* Reference counter, buffer is free if == 0 */
+      uint8_t part;        /* partition number where the BAM came from */
+      uint8_t track;       /* BAM-track (if more than one) */
+      uint8_t sector;      /* BAM-sector (if more than one) */
+    } bam;
+    struct {
+      uint8_t size;           /* Number of buffers in chain  */
+      struct buffer_s *first; /* Pointer to the first buffer */
+      struct buffer_s *next;  /* Pointer to the next buffer  */
+    } buffer;
+  } pvt;
+} buffer_t;
+
+extern dh_t matchdh;         /// Directory handle used in file matching
+extern buffer_t buffers[];   /// Simplifies access to the error buffer length
+
+extern uint8_t entrybuf[33]; /// Buffer for directory entries to be parsed
+
+/* Initializes the buffer structures */
+void buffers_init(void);
+
+/* Dummy callback */
+uint8_t callback_dummy(buffer_t *buf);
+
+/* Allocates a buffer for internal use */
+buffer_t *alloc_system_buffer(void);
+
+/* Allocates a buffer - returns pointer to buffer or NULL if failure */
+buffer_t *alloc_buffer(void);
+
+/* Allocates linked buffers - returns pointer to first buffer or NULL if failure */
+/* Buffers are guranteed to have continuous data segments. */
+buffer_t *alloc_linked_buffers(uint8_t count);
+
+/* Call the cleanup function and deallocate a buffer */
+void cleanup_and_free_buffer(buffer_t *buffer);
+
+/* Deallocates a buffer */
+void free_buffer(buffer_t *buffer);
+
+/* Deallocates multiple buffers */
+uint8_t free_multiple_buffers(uint8_t flags);
+
+/* Mark a buffer as sticky */
+/* Smaller than a #define for some reason: */
+static void inline stick_buffer(buffer_t *buf) { buf->sticky = 1; }
+
+/* Finds the buffer corresponding to a secondary address */
+/* Returns pointer to buffer on success or NULL on failure */
+buffer_t *find_buffer(uint8_t secondary);
+
+/* Number of currently allocated buffers + 16 * number of write buffers */
+extern uint8_t active_buffers;
+
+/* Check if any buffers are free */
+#define check_free_buffers() ((active_buffers & 0x0f) < CONFIG_BUFFER_COUNT)
+
+/* Return the number of dirty buffers */
+#define get_dirty_buffer_count() (active_buffers >> 4)
+
+/* Mark a buffer as write-buffer */
+static inline void mark_write_buffer(buffer_t *buf) {
+  buf->write = 1;
+}
+
+/* Mark a buffer as dirty */
+void mark_buffer_dirty(buffer_t *buf);
+
+/* Mark a buffer as clean */
+void mark_buffer_clean(buffer_t *buf);
+
+
+#ifdef __AVR__
+/* AVR-specific hack: Address 1 is r1 which is always zero in C code */
+#  define NULLSTRING ((uint8_t *)1)
+#else
+#  define NULLSTRING ""
+#endif
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/conf2h.awk b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/conf2h.awk
new file mode 100644
index 00000000..3818f89c
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/conf2h.awk
@@ -0,0 +1,29 @@
+#! /usr/bin/gawk -f
+
+# Trivial little script to convert from a makefile-style configuration
+# file to a C header. No copyright claimed.
+
+BEGIN {
+  print "// autoconf.h generated from " ARGV[1] " at " strftime() "\n" \
+    "#ifndef AUTOCONF_H\n" \
+    "#define AUTOCONF_H"
+}
+
+/^#/ { sub(/^#/,"//") }
+
+/^CONFIG_.*=/ {
+  if (/=n$/) {
+    sub(/^/,"// ");
+  } else {
+    sub(/^/,"#define ")
+    if (/=y$/) {
+      sub(/=.*$/,"")
+    } else {
+      sub(/=/," ")
+    }
+  }
+}
+
+{ print }
+
+END { print "#endif" }
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config
new file mode 100644
index 00000000..096a71c6
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config
@@ -0,0 +1,60 @@
+# This may not look like it, but it's a -*- makefile -*-
+#
+# sd2iec - SD/MMC to Commodore serial bus interface/controller
+# Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+#
+# Inspiration and low-level SD/MMC access based on code from MMC2IEC
+#   by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+#
+#  FAT filesystem access based on code from ChaN, see tff.c|h.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License only.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+#  config-sw2: sd2iec configuration for Shadowolf's sd2iec PCBs
+#              version 1.x
+#
+#
+# This file is included in the main sd2iec Makefile and also parsed
+# into autoconf.h.
+
+CONFIG_MCU=atmega1284p
+CONFIG_LINKER_RELAX=y
+CONFIG_MCU_FREQ=8000000
+CONFIG_BOOTLOADER=y
+CONFIG_BOOT_DEVID=0x31434549
+CONFIG_COMMAND_CHANNEL_DUMP=y
+CONFIG_LOADER_TURBODISK=y
+CONFIG_LOADER_FC3=y
+CONFIG_LOADER_DREAMLOAD=y
+CONFIG_LOADER_ULOAD3=y
+CONFIG_LOADER_GIJOE=y
+CONFIG_LOADER_EPYXCART=y
+CONFIG_LOADER_GEOS=y
+CONFIG_LOADER_WHEELS=y
+CONFIG_LOADER_NIPPON=y
+CONFIG_LOADER_AR6=y
+CONFIG_LOADER_ELOAD1=y
+CONFIG_HARDWARE_VARIANT=5
+CONFIG_HARDWARE_NAME=sd2iec-sw2
+CONFIG_SD_AUTO_RETRIES=10
+CONFIG_SD_DATACRC=y
+CONFIG_ERROR_BUFFER_SIZE=46
+CONFIG_COMMAND_BUFFER_SIZE=120
+CONFIG_BUFFER_COUNT=6
+CONFIG_EEPROM_SIZE=512
+CONFIG_EEPROM_OFFSET=512
+CONFIG_MAX_PARTITIONS=4
+CONFIG_RTC_VARIANT=2
+CONFIG_REMOTE_DISPLAY=y
+CONFIG_DISPLAY_BUFFER_SIZE=40
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config-example b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config-example
new file mode 100644
index 00000000..f1de4692
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config-example
@@ -0,0 +1,177 @@
+# This may not look like it, but it's a -*- makefile -*-
+#
+# sd2iec - SD/MMC to Commodore serial bus interface/controller
+# Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+#
+# Inspiration and low-level SD/MMC access based on code from MMC2IEC
+#   by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+#
+#  FAT filesystem access based on code from ChaN, see tff.c|h.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License only.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+#  config: User-configurable options to simplify hardware changes and/or
+#          reduce the code/ram requirements of the code.
+#
+#
+# This file is included in the main sd2iec Makefile and also parsed
+# into autoconf.h.
+
+# MCU to compile for
+CONFIG_MCU=atmega644p
+
+# Use the -relax parameter when linking?
+# Passing -O9 and -relax to the linker saves ~650 bytes of flash,
+# but the option is broken in certain binutils versions.
+# (known troublemakers: binutils 2.17, 2.18 seems fine)
+CONFIG_LINKER_RELAX=n
+
+# MCU frequency in Hz - the fastloader code is hardcoded for 8MHz
+CONFIG_MCU_FREQ=8000000
+
+# Add a bootloader signature
+CONFIG_BOOTLOADER=n
+
+# Value of the signature word
+CONFIG_BOOT_DEVID=0x49454321
+
+
+# Enable UART debugging - requires 24 bytes plus buffer size in RAM
+CONFIG_UART_DEBUG=n
+
+# Baud rate of the UART, not used if CONFIG_UART_DEBUG is disabled
+CONFIG_UART_BAUDRATE=19200
+
+# log2 of the UART buffer size, i.e. 6 for 64, 7 for 128, 8 for 256 etc.
+CONFIG_UART_BUF_SHIFT=6
+
+# Output a hex dump of all received commands via serial?
+# Not used if CONFIG_UART_DEBUG is disabled.
+CONFIG_COMMAND_CHANNEL_DUMP=y
+
+
+# Enable Turbodisk soft fastloader support
+# This option requires an external crystal oscillator!
+CONFIG_LOADER_TURBODISK=y
+
+# Enable Final Cartridge III fast loader
+CONFIG_LOADER_FC3=y
+
+# Enable Dreamload fast loader
+CONFIG_LOADER_DREAMLOAD=y
+
+# Enable ULoad Model 3 fast loader
+CONFIG_LOADER_ULOAD3=y
+
+# Enable G.I. Joe fast loader
+CONFIG_LOADER_GIJOE=y
+
+# Enable Epyx Fast Load cartridge fast loader
+CONFIG_LOADER_EPYXCART=y
+
+# Enable GEOS fast loaders
+CONFIG_LOADER_GEOS=y
+
+# Enable Wheels fast loaders (requires CONFIG_LOADER_GEOS=y)
+CONFIG_LOADER_WHEELS=y
+
+# Enable Nippon fast loader
+CONFIG_LOADER_NIPPON=y
+
+# Enable (some) Action Replay 6 fast loaders
+CONFIG_LOADER_AR6=y
+
+# Enable ELoad Version 1 fast loader
+CONFIG_LOADER_ELOAD1=y
+
+# Select which hardware to compile for
+# Valid values:
+#   1 - custom configuration in config.h
+#   2 - Shadowolf MMC2IEC PCBs version 1.x
+#   3 - original MMC2IEC
+#   4 - uIEC
+#   5 - Shadowolf sd2iec PCBs version 1.x
+#   6 - unused, was NKC-modified MMC2IEC
+#   7 - uIEC/SD
+CONFIG_HARDWARE_VARIANT=1
+CONFIG_HARDWARE_NAME=sd2iec-example
+
+# Number of retries if the SD communication fails
+CONFIG_SD_AUTO_RETRIES=10
+
+# Use CRC checks for all SD data transmissions?
+CONFIG_SD_DATACRC=y
+
+# Use two SD cards? Works only if SD2 hardware definitions
+# in config.h are present for the selected hardware variant.
+CONFIG_TWINSD=y
+
+# Additional storage device support
+# You don't need to enable the "native" storage device of your hardware
+# here, the build system will add that itself (requires definitions in
+# config.h).
+#
+# At this time no hardware is set up to support storage devices other than
+# its native one.
+#
+# Add SD support
+#CONFIG_ADD_SD=y
+# Add ATA support
+#CONFIG_ADD_ATA=y
+# Add DataFlash support
+#CONFIG_ADD_DF=y
+
+# Length of error message buffer - 1571 uses 36 bytes
+# Increased to 46 because the long version message can be a bit long
+CONFIG_ERROR_BUFFER_SIZE=46
+
+# Length of command/filename buffer - 1571 uses 42 bytes
+# The buffer is actually 2 bytes larger to simplify parsing.
+CONFIG_COMMAND_BUFFER_SIZE=120
+
+# Number of sector buffers (256 byte+a bit of overhead)
+#  In general: More buffers -> More open files at the same time
+CONFIG_BUFFER_COUNT=6
+
+# Size of the EEPROM user area
+CONFIG_EEPROM_SIZE=512
+
+# Offset of the EEPROM user area
+CONFIG_EEPROM_OFFSET=512
+
+# Track the stack size
+# Warning: This option increases the code size a lot.
+CONFIG_STACK_TRACKING=n
+
+# Maximum number of partitions
+CONFIG_MAX_PARTITIONS=2
+
+# Real Time Clock option
+# Valid values are:
+#   0 - None
+#   1 - software RTC
+#   2 - PCF8563 using softi2c
+CONFIG_RTC_VARIANT=0
+
+# I2C display
+CONFIG_REMOTE_DISPLAY=y
+
+# Display buffer size
+# This buffer is used as temporary space when sending commands to
+# the display. Longer texts will be truncated.
+CONFIG_DISPLAY_BUFFER_SIZE=40
+
+# Capture unknown loaders to file
+#CONFIG_CAPTURE_LOADERS=y
+#CONFIG_CAPTURE_BUFFER_SIZE=3000
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config-larsp b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config-larsp
new file mode 100644
index 00000000..1ebb05df
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config-larsp
@@ -0,0 +1,60 @@
+# This may not look like it, but it's a -*- makefile -*-
+#
+# sd2iec - SD/MMC to Commodore serial bus interface/controller
+# Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+#
+# Inspiration and low-level SD/MMC access based on code from MMC2IEC
+#   by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+#
+#  FAT filesystem access based on code from ChaN, see tff.c|h.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License only.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+# config-larsp: sd2iec configuration for Lars Pontoppidan's MMC2IEC
+#
+#
+# This file is included in the main sd2iec Makefile and also parsed
+# into autoconf.h.
+
+CONFIG_MCU=atmega644p
+CONFIG_LINKER_RELAX=y
+CONFIG_MCU_FREQ=8000000
+CONFIG_BOOTLOADER=y
+CONFIG_BOOT_DEVID=0x5053524c
+CONFIG_COMMAND_CHANNEL_DUMP=y
+# In case someone added a crystal to his board
+CONFIG_LOADER_TURBODISK=y
+CONFIG_LOADER_FC3=y
+CONFIG_LOADER_DREAMLOAD=y
+CONFIG_LOADER_ULOAD3=y
+CONFIG_LOADER_GIJOE=y
+CONFIG_LOADER_EPYXCART=y
+CONFIG_LOADER_GEOS=y
+CONFIG_LOADER_WHEELS=y
+CONFIG_LOADER_NIPPON=y
+CONFIG_LOADER_AR6=y
+CONFIG_LOADER_ELOAD1=y
+CONFIG_HARDWARE_VARIANT=3
+CONFIG_HARDWARE_NAME=mmc2iec
+CONFIG_SD_AUTO_RETRIES=10
+CONFIG_SD_DATACRC=y
+CONFIG_ERROR_BUFFER_SIZE=46
+CONFIG_COMMAND_BUFFER_SIZE=120
+CONFIG_BUFFER_COUNT=6
+CONFIG_EEPROM_SIZE=512
+CONFIG_EEPROM_OFFSET=512
+CONFIG_MAX_PARTITIONS=2
+CONFIG_RTC_VARIANT=2
+CONFIG_REMOTE_DISPLAY=y
+CONFIG_DISPLAY_BUFFER_SIZE=40
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config-sw1 b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config-sw1
new file mode 100644
index 00000000..31d9d77e
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config-sw1
@@ -0,0 +1,59 @@
+# This may not look like it, but it's a -*- makefile -*-
+#
+# sd2iec - SD/MMC to Commodore serial bus interface/controller
+# Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+#
+# Inspiration and low-level SD/MMC access based on code from MMC2IEC
+#   by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+#
+#  FAT filesystem access based on code from ChaN, see tff.c|h.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License only.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+#  config-sw1: sd2iec configuration for Shadowolf's MMC2IEC PCBs
+#              version 1.0-1.9
+#
+#
+# This file is included in the main sd2iec Makefile and also parsed
+# into autoconf.h.
+
+CONFIG_MCU=atmega644p
+CONFIG_LINKER_RELAX=y
+CONFIG_MCU_FREQ=8000000
+CONFIG_BOOTLOADER=y
+CONFIG_BOOT_DEVID=0x49454321
+CONFIG_UART_DEBUG=n
+CONFIG_COMMAND_CHANNEL_DUMP=n
+# Turbodisk requires a crystal which is usually only present on 1.8 or later
+CONFIG_LOADER_TURBODISK=y
+CONFIG_LOADER_FC3=y
+CONFIG_LOADER_DREAMLOAD=y
+CONFIG_LOADER_ULOAD3=y
+CONFIG_LOADER_GIJOE=y
+CONFIG_LOADER_EPYXCART=y
+CONFIG_LOADER_GEOS=y
+CONFIG_LOADER_WHEELS=y
+CONFIG_LOADER_NIPPON=y
+CONFIG_LOADER_AR6=y
+CONFIG_LOADER_ELOAD1=y
+CONFIG_HARDWARE_VARIANT=2
+CONFIG_HARDWARE_NAME=sd2iec-sw1
+CONFIG_SD_AUTO_RETRIES=10
+CONFIG_SD_DATACRC=y
+CONFIG_ERROR_BUFFER_SIZE=46
+CONFIG_COMMAND_BUFFER_SIZE=120
+CONFIG_BUFFER_COUNT=6
+CONFIG_EEPROM_SIZE=512
+CONFIG_EEPROM_OFFSET=512
+CONFIG_MAX_PARTITIONS=2
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config-sw2 b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config-sw2
new file mode 100644
index 00000000..d092ce80
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config-sw2
@@ -0,0 +1,60 @@
+# This may not look like it, but it's a -*- makefile -*-
+#
+# sd2iec - SD/MMC to Commodore serial bus interface/controller
+# Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+#
+# Inspiration and low-level SD/MMC access based on code from MMC2IEC
+#   by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+#
+#  FAT filesystem access based on code from ChaN, see tff.c|h.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License only.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+#  config-sw2: sd2iec configuration for Shadowolf's sd2iec PCBs
+#              version 1.x
+#
+#
+# This file is included in the main sd2iec Makefile and also parsed
+# into autoconf.h.
+
+CONFIG_MCU=atmega644p
+CONFIG_LINKER_RELAX=y
+CONFIG_MCU_FREQ=8000000
+CONFIG_BOOTLOADER=y
+CONFIG_BOOT_DEVID=0x31434549
+CONFIG_COMMAND_CHANNEL_DUMP=y
+CONFIG_LOADER_TURBODISK=y
+CONFIG_LOADER_FC3=y
+CONFIG_LOADER_DREAMLOAD=y
+CONFIG_LOADER_ULOAD3=y
+CONFIG_LOADER_GIJOE=y
+CONFIG_LOADER_EPYXCART=y
+CONFIG_LOADER_GEOS=y
+CONFIG_LOADER_WHEELS=y
+CONFIG_LOADER_NIPPON=y
+CONFIG_LOADER_AR6=y
+CONFIG_LOADER_ELOAD1=y
+CONFIG_HARDWARE_VARIANT=5
+CONFIG_HARDWARE_NAME=sd2iec-sw2
+CONFIG_SD_AUTO_RETRIES=10
+CONFIG_SD_DATACRC=y
+CONFIG_ERROR_BUFFER_SIZE=46
+CONFIG_COMMAND_BUFFER_SIZE=120
+CONFIG_BUFFER_COUNT=6
+CONFIG_EEPROM_SIZE=512
+CONFIG_EEPROM_OFFSET=512
+CONFIG_MAX_PARTITIONS=4
+CONFIG_RTC_VARIANT=2
+CONFIG_REMOTE_DISPLAY=y
+CONFIG_DISPLAY_BUFFER_SIZE=40
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config-uIEC b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config-uIEC
new file mode 100644
index 00000000..ee01c83d
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config-uIEC
@@ -0,0 +1,65 @@
+# This may not look like it, but it's a -*- makefile -*-
+#
+# sd2iec - SD/MMC to Commodore serial bus interface/controller
+# Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+#
+# Inspiration and low-level SD/MMC access based on code from MMC2IEC
+#   by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+#
+#  FAT filesystem access based on code from ChaN, see tff.c|h.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License only.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+#  config: User-configurable options to simplify hardware changes and/or
+#          reduce the code/ram requirements of the code.
+#
+#
+# This file is included in the main sd2iec Makefile and also parsed
+# into autoconf.h.
+
+CONFIG_MCU=atmega1281
+CONFIG_LINKER_RELAX=y
+CONFIG_MCU_FREQ=8000000
+CONFIG_BOOTLOADER=y
+CONFIG_BOOT_DEVID=0x32304955
+CONFIG_UART_DEBUG=y
+CONFIG_UART_BAUDRATE=38400
+CONFIG_UART_BUF_SHIFT=6
+CONFIG_DEADLOCK_ME_HARDER=n
+CONFIG_COMMAND_CHANNEL_DUMP=y
+CONFIG_LOADER_TURBODISK=y
+CONFIG_LOADER_FC3=y
+CONFIG_LOADER_DREAMLOAD=y
+CONFIG_LOADER_ULOAD3=y
+CONFIG_LOADER_GIJOE=y
+CONFIG_LOADER_EPYXCART=y
+CONFIG_LOADER_GEOS=y
+CONFIG_LOADER_WHEELS=y
+CONFIG_LOADER_NIPPON=y
+CONFIG_LOADER_AR6=y
+CONFIG_LOADER_ELOAD1=y
+CONFIG_HARDWARE_VARIANT=4
+CONFIG_HARDWARE_NAME=uIEC
+CONFIG_SD_AUTO_RETRIES=10
+CONFIG_SD_DATACRC=y
+CONFIG_ERROR_BUFFER_SIZE=46
+CONFIG_COMMAND_BUFFER_SIZE=254
+CONFIG_BUFFER_COUNT=15
+CONFIG_EEPROM_SIZE=512
+CONFIG_EEPROM_OFFSET=512
+CONFIG_MAX_PARTITIONS=20
+CONFIG_RTC_VARIANT=1
+CONFIG_ADD_ATA=1
+CONFIG_REMOTE_DISPLAY=y
+CONFIG_DISPLAY_BUFFER_SIZE=40
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config-uIEC3 b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config-uIEC3
new file mode 100644
index 00000000..1a472512
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config-uIEC3
@@ -0,0 +1,63 @@
+# This may not look like it, but it's a -*- makefile -*-
+#
+# sd2iec - SD/MMC to Commodore serial bus interface/controller
+# Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+#
+# Inspiration and low-level SD/MMC access based on code from MMC2IEC
+#   by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+#
+#  FAT filesystem access based on code from ChaN, see tff.c|h.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License only.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+#  config: User-configurable options to simplify hardware changes and/or
+#          reduce the code/ram requirements of the code.
+#
+#
+# This file is included in the main sd2iec Makefile and also parsed
+# into autoconf.h.
+
+CONFIG_MCU=atmega1281
+CONFIG_LINKER_RELAX=y
+CONFIG_MCU_FREQ=8000000
+CONFIG_BOOTLOADER=y
+CONFIG_BOOT_DEVID=0x33304955
+CONFIG_UART_DEBUG=y
+CONFIG_UART_BAUDRATE=38400
+CONFIG_UART_BUF_SHIFT=6
+CONFIG_DEADLOCK_ME_HARDER=n
+CONFIG_COMMAND_CHANNEL_DUMP=y
+CONFIG_LOADER_TURBODISK=y
+CONFIG_LOADER_FC3=y
+CONFIG_LOADER_DREAMLOAD=y
+CONFIG_LOADER_ULOAD3=y
+CONFIG_LOADER_GIJOE=y
+CONFIG_LOADER_EPYXCART=y
+CONFIG_LOADER_GEOS=y
+CONFIG_LOADER_WHEELS=y
+CONFIG_LOADER_NIPPON=y
+CONFIG_LOADER_AR6=y
+CONFIG_LOADER_ELOAD1=y
+CONFIG_HARDWARE_VARIANT=7
+CONFIG_HARDWARE_NAME=uIEC
+CONFIG_TWINSD=n
+CONFIG_SD_AUTO_RETRIES=10
+CONFIG_SD_DATACRC=y
+CONFIG_ERROR_BUFFER_SIZE=46
+CONFIG_COMMAND_BUFFER_SIZE=254
+CONFIG_BUFFER_COUNT=15
+CONFIG_EEPROM_SIZE=512
+CONFIG_EEPROM_OFFSET=512
+CONFIG_MAX_PARTITIONS=20
+CONFIG_RTC_VARIANT=1
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config.h
new file mode 100644
index 00000000..735f268d
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/config.h
@@ -0,0 +1,700 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   config.h: User-configurable options to simplify hardware changes and/or
+             reduce the code/ram requirements of the code.
+
+
+   Based on MMC2IEC, original copyright header follows:
+
+//
+// Title        : MMC2IEC - Configuration
+// Author       : Lars Pontoppidan
+// Date         : Jan. 2007
+// Version      : 0.7
+// Target MCU   : AtMega32(L) at 8 MHz
+//
+//
+// DISCLAIMER:
+// The author is in no way responsible for any problems or damage caused by
+// using this code. Use at your own risk.
+//
+// LICENSE:
+// This code is distributed under the GNU Public License
+// which can be found at http://www.gnu.org/licenses/gpl.txt
+//
+
+*/
+
+#ifndef CONFIG_H
+#define CONFIG_H
+
+#include "autoconf.h"
+
+/* Include avrcompat.h to get the PA0..PD7 macros on 1284P */
+#include "avrcompat.h"
+
+#if CONFIG_HARDWARE_VARIANT==1
+/* Configure for your own hardware                     */
+/* Example values are for the "Shadowolf 1.x" variant. */
+
+/* Name the software should return in the Dos version messate (73) */
+/* This should be upper-case because it isn't PETSCII-converted.   */
+#  define HW_NAME "SD2IEC"
+
+/*** SD card support ***/
+/* If your device supports SD cards by default, define this symbol. */
+#  define HAVE_SD
+
+/* CARD_DETECT must return non-zero when card is inserted */
+/* This must be a pin capable of generating interrupts.   */
+#  define SDCARD_DETECT         (!(PIND & _BV(PD2)))
+#  define SDCARD_DETECT_SETUP() do { DDRD &= ~_BV(PD2); PORTD |= _BV(PD2); } while(0)
+
+/* Set up the card detect pin to generate an interrupt on every change */
+#  if defined __AVR_ATmega32__
+#    define SD_CHANGE_SETUP()  do { MCUCR |= _BV(ISC00); GICR |= _BV(INT0); } while(0)
+#  elif defined __AVR_ATmega644__ || defined __AVR_ATmega644P__ || defined __AVR_ATmega1284P__
+#    define SD_CHANGE_SETUP()  do { EICRA |= _BV(ISC00); EIMSK |= _BV(INT0); } while(0)
+#  else
+#    error Unknown chip!
+#  endif
+
+/* Name of the interrupt of the card detect pin */
+#  define SD_CHANGE_VECT INT0_vect
+
+/* CARD Write Protect must return non-zero when card is write protected */
+#  define SDCARD_WP         (PIND & _BV(PD6))
+#  define SDCARD_WP_SETUP() do { DDRD &= ~ _BV(PD6); PORTD |= _BV(PD6); } while(0)
+
+/* SD Card supply voltage - choose the one appropiate to your board */
+/* #  define SD_SUPPLY_VOLTAGE (1L<<15)  / * 2.7V - 2.8V */
+/* #  define SD_SUPPLY_VOLTAGE (1L<<16)  / * 2.8V - 2.9V */
+/* #  define SD_SUPPLY_VOLTAGE (1L<<17)  / * 2.9V - 3.0V */
+#  define SD_SUPPLY_VOLTAGE (1L<<18)  /* 3.0V - 3.1V */
+/* #  define SD_SUPPLY_VOLTAGE (1L<<19)  / * 3.1V - 3.2V */
+/* #  define SD_SUPPLY_VOLTAGE (1L<<20)  / * 3.2V - 3.3V */
+/* #  define SD_SUPPLY_VOLTAGE (1L<<21)  / * 3.3V - 3.4V */
+/* #  define SD_SUPPLY_VOLTAGE (1L<<22)  / * 3.4V - 3.5V */
+/* #  define SD_SUPPLY_VOLTAGE (1L<<23)  / * 3.5V - 3.6V */
+
+/* Support for a second SD card - use CONFIG_TWINSD=y in your config file to enable! */
+/* The code assumes that detect/select/write-protect lines of the */
+/* second card are all on the same port.                          */
+#   define SD2_PORT             PORTC
+#   define SD2_PIN              PINC
+#   define SD2_PRESENT          _BV(PB2)
+#   define SD2_CS               _BV(PC6)
+#   define SD2_WP               (PINC & _BV(PC7))
+
+/* Same sd SD_DETECT above. */
+#   define SD2_DETECT           (!(PINB & SD2_PRESENT))
+
+/* Full setup of the SD2 port, excluding interrupts. */
+#   define SD2_SETUP()          do { SD2_PORT |= SD2_CS|SD2_WP; DDRC |= SD2_CS; DDRC &= ~SD2_WP; DDRB &= ~SD2_PRESENT; PORTB |= SD2_PRESENT; } while (0)
+
+/* Interrupt vector for card 2 change detection */
+#   define SD2_CHANGE_VECT      INT2_vect
+
+/* Set up and enable the card 2 change interrupt */
+#   define SD2_CHANGE_SETUP()   do { EICRA |= _BV(ISC20); EIMSK |= _BV(INT2);  } while (0)
+
+
+/*** AT45DB161D dataflash support ***/
+/* You can use an Atmel AT45DB161D chip as data storage/additional drive */
+//#  define HAVE_DF
+//#  define DATAFLASH_PORT        PORTD
+//#  define DATAFLASH_DDR         DDRD
+//#  define DATAFLASH_SELECT      _BV(PD2)
+
+
+/*** Device address selection ***/
+/* DEVICE_SELECT should return the selected device number,   */
+/* DEVICE_SELECT_SETUP() is called once to set up the ports. */
+#  define DEVICE_SELECT       (8+!(PIND & _BV(PD7))+2*!(PIND & _BV(PD5)))
+#  define DEVICE_SELECT_SETUP() do { \
+      DDRD  &= ~(_BV(PD7)|_BV(PD5)); \
+      PORTD |=   _BV(PD7)|_BV(PD5);  \
+   } while (0)
+
+
+/*** LEDs ***/
+/* If your hardware only has a single LED, use only the DIRTY_LED defines */
+/* and set SINGLE_LED. See uIEC below for an example.                     */
+/* #  define SINGLE_LED */
+
+/* BUSY led, recommended color: green */
+/* R.Riedel - using PORTC instead of the original PORTA here plus inverse polarity */
+#  define BUSY_LED_SETDDR() DDRC  |= _BV(PC0)
+#  define BUSY_LED_ON()     PORTC |= _BV(PC0)
+#  define BUSY_LED_OFF()    PORTC &= ~_BV(PC0)
+
+/* DIRTY led, recommended color: red */
+/* R.Riedel - using PORTC instead of the original PORTA here plus inverse polarity */
+#  define DIRTY_LED_SETDDR() DDRC  |= _BV(PC1)
+#  define DIRTY_LED_ON()     PORTC |= _BV(PC1)
+#  define DIRTY_LED_OFF()    PORTC &= ~_BV(PC1)
+#  define DIRTY_LED_PORT     PORTC
+#  define DIRTY_LED_BIT()    _BV(PC1)
+
+/* Software power LED */
+/* Currently used on uIEC/SD only */
+//#  define POWER_LED_DDR         DDRG
+//#  define POWER_LED_PORT        PORTG
+//#  define POWER_LED_BIT         _BV(PG1)
+//#  define POWER_LED_POLARITY    0
+
+
+/*** IEC signals ***/
+/* R.Riedel - using PORTA instead of the original PORTC for the IEC */
+
+#  define IEC_PIN  PINA
+#  define IEC_DDR  DDRA
+#  define IEC_PORT PORTA
+
+/* Pins assigned for the IEC lines */
+#  define IEC_PIN_ATN   PA0
+#  define IEC_PIN_DATA  PA1
+#  define IEC_PIN_CLOCK PA2
+#  define IEC_PIN_SRQ   PA3
+
+/* Use separate input/output lines?                                    */
+/* The code assumes that the input is NOT inverted, but the output is. */
+//#  define IEC_SEPARATE_OUT
+//#  define IEC_OPIN_ATN   PA4
+//#  define IEC_OPIN_DATA  PA5
+//#  define IEC_OPIN_CLOCK PA6
+//#  define IEC_OPIN_SRQ   PA7
+
+/* You can use different ports for input and output bits. The code tries */
+/* to not stomp on the unused bits. IEC output is on IEC_PORT.           */
+/* Not well-tested yet.                                                  */
+//#  define IEC_DDRIN      DDRX
+//#  define IEC_DDROUT     DDRY
+//#  define IEC_PORTIN     PORTX
+
+/* ATN interrupt (not required) */
+/* If this is commented out, the ATN line will be polled by a timer interrupt instead */
+//#  define IEC_ATN_INT         PCINT0
+//#  define IEC_ATN_INT_VECT    PCINT0_vect
+//#  define IEC_ATN_INT_SETUP() do { PCMSK0 = _BV(PCINT0); PCIFR |= _BV(PCIF0); } while (0)
+
+/* CLK interrupt (not required) */
+/* Dreamload requires interrupts for both the ATN and CLK lines. If both are served by */
+/* the same PCINT vector, define that as ATN interrupt above and define IEC_PCMSK.     */
+//#  define IEC_PCMSK             PCMSK0
+/* If the CLK line has its own dedicated interrupt, use the following definitions: */
+//#  define IEC_CLK_INT           INT5
+//#  define IEC_CLK_INT_VECT      INT5_vect
+//#  define IEC_CLK_INT_SETUP()   do { EICRB |= _BV(ISC50); } while (0)
+
+
+/*** User interface ***/
+/* Macros for the registers of the port where the buttons are connected */
+/* All buttons must be on the same port. */
+#  define BUTTON_PIN  PINC
+#  define BUTTON_PORT PORTC
+#  define BUTTON_DDR  DDRC
+
+/* Mask value to isolate the button bits */
+#  define BUTTON_MASK (_BV(PC3)|_BV(PC4))
+
+/* Button NEXT changes to the next disk image and enables sleep mode (held) */
+#  define BUTTON_NEXT _BV(PC4)
+
+/* Button PREV changes to the previous disk image */
+/* If you don't have/need this button, define it as 0. */
+#  define BUTTON_PREV _BV(PC3)
+
+/* Software I2C lines for the RTC */
+#  define SOFTI2C_PORT    PORTC
+#  define SOFTI2C_PIN     PINC
+#  define SOFTI2C_DDR     DDRC
+#  define SOFTI2C_BIT_SCL PC4
+#  define SOFTI2C_BIT_SDA PC5
+#  define SOFTI2C_DELAY   6
+
+
+/* Pre-configurated hardware variants */
+
+#elif CONFIG_HARDWARE_VARIANT==2
+/* Hardware configuration: Shadowolf 1 */
+#  define HW_NAME "SD2IEC"
+#  define HAVE_SD
+#  define SDCARD_DETECT         (!(PIND & _BV(PD2)))
+#  define SDCARD_DETECT_SETUP() do { DDRD &= ~_BV(PD2); PORTD |= _BV(PD2); } while(0)
+#  if defined __AVR_ATmega32__
+#    define SD_CHANGE_SETUP()   do { MCUCR |= _BV(ISC00); GICR |= _BV(INT0); } while(0)
+#  elif defined __AVR_ATmega644__ || defined __AVR_ATmega644P__ || defined __AVR_ATmega1284P__
+#    define SD_CHANGE_SETUP()   do { EICRA |= _BV(ISC00); EIMSK |= _BV(INT0); } while(0)
+#  else
+#    error Unknown chip!
+#  endif
+#  define SD_CHANGE_VECT        INT0_vect
+#  define SDCARD_WP             (PIND & _BV(PD6))
+#  define SDCARD_WP_SETUP()     do { DDRD &= ~ _BV(PD6); PORTD |= _BV(PD6); } while(0)
+#  define SD_SUPPLY_VOLTAGE     (1L<<18)
+#  define DEVICE_SELECT         (8+!(PIND & _BV(PD7))+2*!(PIND & _BV(PD5)))
+#  define DEVICE_SELECT_SETUP() do {        \
+             DDRD  &= ~(_BV(PD7)|_BV(PD5)); \
+             PORTD |=   _BV(PD7)|_BV(PD5);  \
+          } while (0)
+#  define BUSY_LED_SETDDR()     DDRC  |= _BV(PC0)
+#  define BUSY_LED_ON()         PORTC |= _BV(PC0)
+#  define BUSY_LED_OFF()        PORTC &= ~_BV(PC0)
+#  define DIRTY_LED_SETDDR()    DDRC  |= _BV(PC1)
+#  define DIRTY_LED_ON()        PORTC |= _BV(PC1)
+#  define DIRTY_LED_OFF()       PORTC &= ~_BV(PC1)
+#  define DIRTY_LED_PORT        PORTC
+#  define DIRTY_LED_BIT()       _BV(PC1)
+#  define IEC_PIN               PINA
+#  define IEC_DDR               DDRA
+#  define IEC_PORT              PORTA
+#  define IEC_PIN_ATN           PA0
+#  define IEC_PIN_DATA          PA1
+#  define IEC_PIN_CLOCK         PA2
+#  define IEC_PIN_SRQ           PA3
+#  define IEC_ATN_INT_VECT      PCINT0_vect
+#  define IEC_ATN_INT_SETUP()   do { PCICR |= _BV(PCIE0); PCIFR |= _BV(PCIF0); } while (0)
+#  define IEC_PCMSK             PCMSK0
+#  define BUTTON_PIN            PINC
+#  define BUTTON_PORT           PORTC
+#  define BUTTON_DDR            DDRC
+#  define BUTTON_MASK           (_BV(PC3)|_BV(PC4))
+#  define BUTTON_NEXT           _BV(PC4)
+#  define BUTTON_PREV           _BV(PC3)
+
+
+#elif CONFIG_HARDWARE_VARIANT == 3
+/* Hardware configuration: LarsP */
+#  define HW_NAME "SD2IEC"
+#  define HAVE_SD
+#  define SDCARD_DETECT         (!(PIND & _BV(PD2)))
+#  define SDCARD_DETECT_SETUP() do { DDRD &= ~_BV(PD2); PORTD |= _BV(PD2); } while(0)
+#  if defined __AVR_ATmega32__
+#    define SD_CHANGE_SETUP()   do { MCUCR |= _BV(ISC00); GICR |= _BV(INT0); } while(0)
+#  elif defined __AVR_ATmega644__ || defined __AVR_ATmega644P__ || defined __AVR_ATmega1284P__
+#    define SD_CHANGE_SETUP()   do { EICRA |= _BV(ISC00); EIMSK |= _BV(INT0); } while(0)
+#  else
+#    error Unknown chip!
+#  endif
+#  define SD_CHANGE_VECT        INT0_vect
+#  define SDCARD_WP             (PIND & _BV(PD6))
+#  define SDCARD_WP_SETUP()     do { DDRD &= ~ _BV(PD6); PORTD |= _BV(PD6); } while(0)
+#  define SD_CHANGE_ICR         MCUCR
+#  define SD_SUPPLY_VOLTAGE     (1L<<21)
+#  define DEVICE_SELECT         (8+!(PINA & _BV(PA2))+2*!(PINA & _BV(PA3)))
+#  define DEVICE_SELECT_SETUP() do {        \
+             DDRA  &= ~(_BV(PA2)|_BV(PA3)); \
+             PORTA |=   _BV(PA2)|_BV(PA3);  \
+          } while (0)
+#  define BUSY_LED_SETDDR()     DDRA  |= _BV(PA0)
+#  define BUSY_LED_ON()         PORTA &= ~_BV(PA0)
+#  define BUSY_LED_OFF()        PORTA |= _BV(PA0)
+#  define DIRTY_LED_SETDDR()    DDRA  |= _BV(PA1)
+#  define DIRTY_LED_ON()        PORTA &= ~_BV(PA1)
+#  define DIRTY_LED_OFF()       PORTA |= _BV(PA1)
+#  define DIRTY_LED_PORT        PORTA
+#  define DIRTY_LED_BIT()       _BV(PA1)
+#  define IEC_PIN               PINC
+#  define IEC_DDR               DDRC
+#  define IEC_PORT              PORTC
+#  define IEC_PIN_ATN           PC0
+#  define IEC_PIN_DATA          PC1
+#  define IEC_PIN_CLOCK         PC2
+#  define IEC_PIN_SRQ           PC3
+#  define IEC_ATN_INT_VECT      PCINT2_vect
+#  define IEC_ATN_INT_SETUP()   do { PCICR |= _BV(PCIE2); PCIFR |= _BV(PCIF2); } while (0)
+#  define IEC_PCMSK             PCMSK2
+#  define BUTTON_PIN            PINA
+#  define BUTTON_PORT           PORTA
+#  define BUTTON_DDR            DDRA
+#  define BUTTON_MASK           (_BV(PA4)|_BV(PA5))
+#  define BUTTON_NEXT           _BV(PA4)
+#  define BUTTON_PREV           _BV(PA5)
+#  define SOFTI2C_PORT          PORTC
+#  define SOFTI2C_PIN           PINC
+#  define SOFTI2C_DDR           DDRC
+#  define SOFTI2C_BIT_SCL       PC6
+#  define SOFTI2C_BIT_SDA       PC5
+#  define SOFTI2C_BIT_INTRQ     PC7
+#  define SOFTI2C_DELAY         6
+
+
+#elif CONFIG_HARDWARE_VARIANT == 4
+/* Hardware configuration: uIEC */
+#  define HW_NAME "UIEC"
+#  define HAVE_ATA
+#  define CFCARD_DETECT         (!(PINE & _BV(PE7)))
+#  define CFCARD_DETECT_SETUP() do { DDRE &= ~_BV(PE7); PORTE |= _BV(PE7); } while(0)
+#  define CF_CHANGE_SETUP()     do { EICRB |= _BV(ISC70); EIMSK |= _BV(INT7); } while(0)
+#  define CF_CHANGE_VECT        INT7_vect
+#  define HAVE_SD
+#  define SDCARD_DETECT         (!(PINB & _BV(PB7)))
+#  define SDCARD_DETECT_SETUP() do { DDRB &= ~_BV(PB7); PORTB |= _BV(PB7); } while(0)
+#  define SD_CHANGE_SETUP()     do { PCMSK0 |= _BV(PCINT7); PCICR |= _BV(PCIE0); PCIFR |= _BV(PCIF0); } while (0)
+#  define SD_CHANGE_VECT        PCINT0_vect
+#  define SDCARD_WP             (PINB & _BV(PB6))
+#  define SDCARD_WP_SETUP()     do { DDRB &= ~ _BV(PB6); PORTB |= _BV(PB6); } while(0)
+#  define SD_SUPPLY_VOLTAGE     (1L<<21)
+/* No device jumpers on uIEC */
+#  define DEVICE_SELECT         10
+#  define DEVICE_SELECT_SETUP() do {} while (0)
+#  define SINGLE_LED
+#  define DIRTY_LED_SETDDR()    DDRE  |= _BV(PE3)
+#  define DIRTY_LED_ON()        PORTE |= _BV(PE3)
+#  define DIRTY_LED_OFF()       PORTE &= ~_BV(PE3)
+#  define DIRTY_LED_PORT        PORTE
+#  define DIRTY_LED_BIT()       _BV(PE3)
+#  define IEC_PIN               PINE
+#  define IEC_DDR               DDRE
+#  define IEC_PORT              PORTE
+#  define IEC_PIN_ATN           PE6
+#  define IEC_PIN_DATA          PE4
+#  define IEC_PIN_CLOCK         PE5
+#  define IEC_PIN_SRQ           PE2
+#  define IEC_ATN_INT           INT6
+#  define IEC_ATN_INT_VECT      INT6_vect
+#  define IEC_CLK_INT           INT5
+#  define IEC_CLK_INT_VECT      INT5_vect
+#  define IEC_ATN_INT_SETUP()   do { EICRB |= _BV(ISC60); } while (0)
+#  define IEC_CLK_INT_SETUP()   do { EICRB |= _BV(ISC50); } while (0)
+#  undef  IEC_PCMSK
+#  define BUTTON_PIN            PING
+#  define BUTTON_PORT           PORTG
+#  define BUTTON_DDR            DDRG
+#  define BUTTON_MASK           (_BV(PG3)|_BV(PG4))
+#  define BUTTON_NEXT           _BV(PG4)
+#  define BUTTON_PREV           _BV(PG3)
+#  define SOFTI2C_PORT          PORTD
+#  define SOFTI2C_PIN           PIND
+#  define SOFTI2C_DDR           DDRD
+#  define SOFTI2C_BIT_SCL       PD0
+#  define SOFTI2C_BIT_SDA       PD1
+#  define SOFTI2C_BIT_INTRQ     PD2
+#  define SOFTI2C_DELAY         6
+
+/* Use diskmux code to optionally turn off second IDE drive */
+#  define NEED_DISKMUX
+
+#elif CONFIG_HARDWARE_VARIANT == 5
+/* Hardware configuration: Shadowolf 2 aka sd2iec 1.x */
+#  define HW_NAME "SD2IEC"
+#  define HAVE_SD
+#  define SDCARD_DETECT         (!(PIND & _BV(PD2)))
+#  define SDCARD_DETECT_SETUP() do { DDRD &= ~_BV(PD2); PORTD |= _BV(PD2); } while(0)
+#  if defined __AVR_ATmega32__
+#    define SD_CHANGE_SETUP()   do { MCUCR |= _BV(ISC00); GICR |= _BV(INT0); } while(0)
+#  elif defined __AVR_ATmega644__ || defined __AVR_ATmega644P__ || defined __AVR_ATmega1284P__
+#    define SD_CHANGE_SETUP()   do { EICRA |= _BV(ISC00); EIMSK |= _BV(INT0); } while(0)
+#  else
+#    error Unknown chip!
+#  endif
+#  define SD_CHANGE_VECT        INT0_vect
+#  define SDCARD_WP             (PIND & _BV(PD6))
+#  define SDCARD_WP_SETUP()     do { DDRD &= ~ _BV(PD6); PORTD |= _BV(PD6); } while(0)
+#  define SD_SUPPLY_VOLTAGE     (1L<<18)
+#  define DEVICE_SELECT         (8+!(PIND & _BV(PD7))+2*!(PIND & _BV(PD5)))
+#  define DEVICE_SELECT_SETUP() do {        \
+             DDRD  &= ~(_BV(PD7)|_BV(PD5)); \
+             PORTD |=   _BV(PD7)|_BV(PD5);  \
+          } while (0)
+#  define BUSY_LED_SETDDR()     DDRC  |= _BV(PC0)
+#  define BUSY_LED_ON()         PORTC |= _BV(PC0)
+#  define BUSY_LED_OFF()        PORTC &= ~_BV(PC0)
+#  define DIRTY_LED_SETDDR()    DDRC  |= _BV(PC1)
+#  define DIRTY_LED_ON()        PORTC |= _BV(PC1)
+#  define DIRTY_LED_OFF()       PORTC &= ~_BV(PC1)
+#  define DIRTY_LED_PORT        PORTC
+#  define DIRTY_LED_BIT()       _BV(PC1)
+#  define IEC_PIN               PINA
+#  define IEC_DDR               DDRA
+#  define IEC_PORT              PORTA
+#  define IEC_PIN_ATN           PA0
+#  define IEC_PIN_DATA          PA1
+#  define IEC_PIN_CLOCK         PA2
+#  define IEC_PIN_SRQ           PA3
+#  define IEC_SEPARATE_OUT
+#  define IEC_OPIN_ATN          PA4
+#  define IEC_OPIN_DATA         PA5
+#  define IEC_OPIN_CLOCK        PA6
+#  define IEC_OPIN_SRQ          PA7
+#  define IEC_ATN_INT_VECT      PCINT0_vect
+#  define IEC_ATN_INT_SETUP()   do { PCICR |= _BV(PCIE0); PCIFR |= _BV(PCIF0); } while (0)
+#  define IEC_PCMSK             PCMSK0
+#  define BUTTON_PIN            PINC
+#  define BUTTON_PORT           PORTC
+#  define BUTTON_DDR            DDRC
+#  define BUTTON_MASK           (_BV(PC2)|_BV(PC3))
+#  define BUTTON_NEXT           _BV(PC3)
+#  define BUTTON_PREV           _BV(PC2)
+#  define SOFTI2C_PORT          PORTC
+#  define SOFTI2C_PIN           PINC
+#  define SOFTI2C_DDR           DDRC
+#  define SOFTI2C_BIT_SCL       PC4
+#  define SOFTI2C_BIT_SDA       PC5
+#  define SOFTI2C_BIT_INTRQ     PC6
+#  define SOFTI2C_DELAY         6
+
+#  ifdef CONFIG_TWINSD
+/* Support for multiple SD cards */
+#   define SD2_PORT             PORTD
+#   define SD2_PIN              PIND
+#   define SD2_PRESENT          _BV(PB2)
+#   define SD2_CS               _BV(PD3)
+#   define SD2_WP               (PINC & _BV(PC7))
+#   define SD2_DETECT           (!(PINB & SD2_PRESENT))
+#   define SD2_SETUP()          do { SD2_PORT |= SD2_CS; PORTC |= SD2_WP; DDRD |= SD2_CS; DDRC &= ~SD2_WP; DDRB &= ~SD2_PRESENT; PORTB |= SD2_PRESENT; } while (0)
+#   define SD2_CHANGE_VECT      INT2_vect
+#   define SD2_CHANGE_SETUP()   do { EICRA |= _BV(ISC20); EIMSK |= _BV(INT2);  } while (0)
+#  endif
+
+
+/* Hardware configuration 6 was old NKC MMC2IEC */
+
+
+#elif CONFIG_HARDWARE_VARIANT == 7
+/* Hardware configuration: uIEC v3 */
+#  define HW_NAME "UIEC"
+#  define HAVE_SD
+#  define SDCARD_DETECT         (!(PINE & _BV(PE6)))
+#  define SDCARD_DETECT_SETUP() do { DDRE &= ~_BV(PE6); PORTE |= _BV(PE6); } while(0)
+#  define SD_CHANGE_SETUP()     do { EICRB |= _BV(ISC60); EIMSK |= _BV(INT6); } while(0)
+#  define SD_CHANGE_VECT        INT6_vect
+#  define SDCARD_WP             (PINE & _BV(PE2))
+#  define SDCARD_WP_SETUP()     do { DDRE &= ~ _BV(PE2); PORTE |= _BV(PE2); } while(0)
+#  define SD_SUPPLY_VOLTAGE     (1L<<21)
+/* No device jumpers on uIEC */
+#  define DEVICE_SELECT         10
+#  define DEVICE_SELECT_SETUP() do {} while (0)
+#  define SINGLE_LED
+#  define DIRTY_LED_SETDDR()    DDRG  |= _BV(PG0)
+#  define DIRTY_LED_ON()        PORTG |= _BV(PG0)
+#  define DIRTY_LED_OFF()       PORTG &= ~_BV(PG0)
+#  define DIRTY_LED_PORT        PORTG
+#  define DIRTY_LED_BIT()       _BV(PG0)
+#  define POWER_LED_DDR         DDRG
+#  define POWER_LED_PORT        PORTG
+#  define POWER_LED_BIT         _BV(PG1)
+#  define POWER_LED_POLARITY    0
+#  define IEC_PIN               PINB
+#  define IEC_DDRIN             DDRB
+#  define IEC_PORTIN            PORTB
+#  define IEC_PIN_ATN           PB4
+#  define IEC_PIN_DATA          PB5
+#  define IEC_PIN_CLOCK         PB6
+#  define IEC_PIN_SRQ           PB7
+#  define IEC_SEPARATE_OUT
+#  define IEC_PORT              PORTD
+#  define IEC_DDROUT            DDRD
+#  define IEC_OPIN_ATN          PD4
+#  define IEC_OPIN_DATA         PD5
+#  define IEC_OPIN_CLOCK        PD6
+#  define IEC_OPIN_SRQ          PD7
+#  define IEC_ATN_INT_VECT      PCINT0_vect
+#  define IEC_ATN_INT_SETUP()   do { PCICR |= _BV(PCIE0); PCIFR |= _BV(PCIF0); } while (0)
+#  define IEC_PCMSK             PCMSK0
+#  define BUTTON_PIN            PING
+#  define BUTTON_PORT           PORTG
+#  define BUTTON_DDR            DDRG
+#  define BUTTON_MASK           (_BV(PG3)|_BV(PG4))
+#  define BUTTON_NEXT           _BV(PG4)
+#  define BUTTON_PREV           _BV(PG3)
+
+#elif CONFIG_HARDWARE_VARIANT == 99
+/* Hardware configuration: sdlite - not for production use */
+#  define HW_NAME "SD2IEC"
+#  define HAVE_SD
+#  define SDCARD_DETECT         1
+#  define SDCARD_DETECT_SETUP() do { } while(0)
+#  define SD_CHANGE_SETUP()     do { } while(0)
+#  define SDCARD_WP             0
+#  define SDCARD_WP_SETUP()     do { } while(0)
+#  define SD_SUPPLY_VOLTAGE     (1L<<21)
+#  define DATAFLASH_PORT        PORTD
+#  define DATAFLASH_DDR         DDRD
+#  define DATAFLASH_SELECT      _BV(PD2)
+#  define DEVICE_SELECT         8
+#  define DEVICE_SELECT_SETUP() do {} while(0)
+#  define SINGLE_LED
+#  define DIRTY_LED_SETDDR()    DDRD  |= _BV(PD7)
+#  define DIRTY_LED_ON()        PORTD |= _BV(PD7)
+#  define DIRTY_LED_OFF()       PORTD &= ~_BV(PD7)
+#  define DIRTY_LED_PORT        PORTD
+#  define DIRTY_LED_BIT()       _BV(PD7)
+#  define IEC_PIN               PINB
+#  define IEC_DDR               DDRB
+#  define IEC_PORT              PORTB
+#  define IEC_PIN_ATN           PB0
+#  define IEC_PIN_DATA          PB2
+#  define IEC_PIN_CLOCK         PB1
+#  define IEC_PIN_SRQ           PB3
+#  define IEC_ATN_INT_VECT      PCINT1_vect
+#  define IEC_ATN_INT_SETUP()   do { PCICR |= _BV(PCIE1); PCIFR |= _BV(PCIF1); } while (0)
+#  define IEC_PCMSK             PCMSK1
+#  define BUTTON_PIN            PIND
+#  define BUTTON_PORT           PORTD
+#  define BUTTON_DDR            DDRD
+#  define BUTTON_MASK           (_BV(PD5)|_BV(PD6))
+#  define BUTTON_NEXT           _BV(PD6)
+#  define BUTTON_PREV           _BV(PD5)
+
+
+#else
+#  error "CONFIG_HARDWARE_VARIANT is unset or set to an unknown value."
+#endif
+
+
+/* ---------------- End of user-configurable options ---------------- */
+
+#define IEC_BIT_ATN      _BV(IEC_PIN_ATN)
+#define IEC_BIT_DATA     _BV(IEC_PIN_DATA)
+#define IEC_BIT_CLOCK    _BV(IEC_PIN_CLOCK)
+#define IEC_BIT_SRQ      _BV(IEC_PIN_SRQ)
+
+#ifdef IEC_SEPARATE_OUT
+#  define IEC_OBIT_ATN   _BV(IEC_OPIN_ATN)
+#  define IEC_OBIT_DATA  _BV(IEC_OPIN_DATA)
+#  define IEC_OBIT_CLOCK _BV(IEC_OPIN_CLOCK)
+#  define IEC_OBIT_SRQ   _BV(IEC_OPIN_SRQ)
+#  define IEC_OUT        IEC_PORT
+#else
+#  define IEC_OPIN_ATN   IEC_PIN_ATN
+#  define IEC_OPIN_DATA  IEC_PIN_DATA
+#  define IEC_OPIN_CLOCK IEC_PIN_CLOCK
+#  define IEC_OPIN_SRQ   IEC_PIN_SRQ
+#  define IEC_OBIT_ATN   IEC_BIT_ATN
+#  define IEC_OBIT_DATA  IEC_BIT_DATA
+#  define IEC_OBIT_CLOCK IEC_BIT_CLOCK
+#  define IEC_OBIT_SRQ   IEC_BIT_SRQ
+#  define IEC_OUT        IEC_DDR
+#endif
+
+#ifndef IEC_PORTIN
+#  define IEC_PORTIN IEC_PORT
+#endif
+
+#ifndef IEC_DDRIN
+#  define IEC_DDRIN  IEC_DDR
+#  define IEC_DDROUT IEC_DDR
+#endif
+
+#ifdef IEC_PCMSK
+   /* For hardware configurations using PCINT for IEC IRQs */
+#  define set_atn_irq(x) \
+     if (x) { IEC_PCMSK |= _BV(IEC_PIN_ATN); } \
+     else { IEC_PCMSK &= (uint8_t)~_BV(IEC_PIN_ATN); }
+#  define set_clock_irq(x) \
+     if (x) { IEC_PCMSK |= _BV(IEC_PIN_CLOCK); } \
+     else { IEC_PCMSK &= (uint8_t)~_BV(IEC_PIN_CLOCK); }
+#else
+#  ifdef IEC_ATN_INT
+     /* Hardware has an ATN interrupt */
+#    define set_atn_irq(x) \
+       if (x) { EIMSK |= _BV(IEC_ATN_INT); } \
+       else { EIMSK &= (uint8_t)~_BV(IEC_ATN_INT); }
+#  else
+     /* Polling: Yuck. */
+#    define set_atn_irq(x) \
+       if (x) { TIMSK2 |= _BV(OCIE2A); } \
+       else { TIMSK2 &= (uint8_t)~_BV(OCIE2A); }
+#  endif // IEC_ATN_INT
+
+#  ifdef IEC_CLK_INT
+     /* Hardware has a CLK interrupt */
+#    define set_clock_irq(x) \
+       if (x) { EIMSK |= _BV(IEC_CLK_INT); } \
+       else { EIMSK &= (uint8_t)~_BV(IEC_CLK_INT); }
+#  endif
+#endif
+
+/* Create no-op interrupt setups if they are undefined */
+#ifndef IEC_ATN_INT_SETUP
+#  define IEC_ATN_INT_SETUP() do {} while (0)
+#endif
+#ifndef IEC_CLK_INT_SETUP
+#  define IEC_CLK_INT_SETUP() do {} while (0)
+#endif
+
+/* Disable COMMAND_CHANNEL_DUMP if UART_DEBUG is disabled */
+#ifndef CONFIG_UART_DEBUG
+#  undef CONFIG_COMMAND_CHANNEL_DUMP
+#endif
+
+/* An interrupt for detecting card changes implies hotplugging capability */
+#if defined(SD_CHANGE_VECT) || defined (CF_CHANGE_VECT)
+#  define HAVE_HOTPLUG
+#endif
+
+/* Generate dummy functions for the BUSY LED if required */
+#ifdef SINGLE_LED
+#  define BUSY_LED_SETDDR() do {} while(0)
+#  define BUSY_LED_ON()     do {} while(0)
+#  define BUSY_LED_OFF()    do {} while(0)
+#endif
+
+/* Translate CONFIG_ADD symbols to HAVE symbols */
+/* By using two symbols for this purpose it's easier to determine if */
+/* support was enabled by default or added in the config file.       */
+#if defined(CONFIG_ADD_SD) && !defined(HAVE_SD)
+#  define HAVE_SD
+#endif
+
+#if defined(CONFIG_ADD_ATA) && !defined(HAVE_ATA)
+#  define HAVE_ATA
+#endif
+
+#if defined(CONFIG_ADD_DF) && !defined(HAVE_DF)
+#  define HAVE_DF
+#endif
+
+/* Create some temporary symbols so we can calculate the number of */
+/* enabled storage devices.                                        */
+#ifdef HAVE_SD
+#  define TMP_SD 1
+#endif
+#ifdef HAVE_ATA
+#  define TMP_ATA 1
+#endif
+#ifdef HAVE_DF
+#  define TMP_DF 1
+#endif
+
+/* Enable the diskmux if more than one storage device is enabled. */
+#if !defined(NEED_DISKMUX) && (TMP_SD + TMP_ATA + TMP_DF) > 1
+#  define NEED_DISKMUX
+#endif
+
+/* Remove the temporary symbols */
+#undef TMP_SD
+#undef TMP_ATA
+#undef TMP_DF
+
+/* Hardcoded maximum - reducing this won't save any ram */
+#define MAX_DRIVES 8
+
+/* Sanity check */
+#if defined(CONFIG_LOADER_WHEELS) && !defined(CONFIG_LOADER_GEOS)
+#  error "CONFIG_LOADER_GEOS must be enabled for Wheels support!"
+#endif
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/crc7.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/crc7.h
new file mode 100644
index 00000000..06272a53
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/crc7.h
@@ -0,0 +1,33 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   crc7.h: Definitions for CRC7 calculation routines
+
+*/
+
+#ifndef CRC7_H
+#define CRC7_H
+
+uint8_t crc7update(uint8_t crc, uint8_t data);
+
+#endif
+
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/crc7asm.S b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/crc7asm.S
new file mode 100644
index 00000000..f53d1fae
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/crc7asm.S
@@ -0,0 +1,51 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN, see tff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   crc7asm.S: space-efficient CRC7 implementation for AVR
+
+*/
+
+        .section .text
+
+        .global crc7update
+        ;; uint8_t crc7update(uint8_t crc, uint8_t data)
+        ;;
+        ;; input : r24: crc, r22: data
+        ;; output: r24: new crc
+crc7update:
+        ldi     r18, 8       ; number of bits to process
+        ldi     r19, 0x09    ; CRC7 polynomial
+        ldi     r20, 0x80    ; constant for inverting the top bit of the CRC
+
+loop:   lsl     r24          ; shift CRC
+        lsl     r22          ; shift data byte
+        brcc    0f           ; jump if top data bit was 0
+        eor     r24, r20     ; invert top bit of CRC if not
+0:      bst     r24, 7       ; read top bit of CRC
+        brtc    1f           ; skip if top bit of CRC is now clear
+        eor     r24, r19     ; apply polynomial
+1:      dec     r18          ; decrement bit counter
+        brne    loop         ; loop for next bit
+        andi    r24, 0x7f    ; clear top bit of CRC
+        ret                  ; return
+
+        .end
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/d64ops.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/d64ops.c
new file mode 100644
index 00000000..ab751074
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/d64ops.c
@@ -0,0 +1,1693 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   d64ops.c: D64 operations
+
+*/
+
+#include <avr/pgmspace.h>
+#include <stdint.h>
+#include <string.h>
+#include "config.h"
+#include "buffers.h"
+#include "dirent.h"
+#include "errormsg.h"
+#include "fatops.h"
+#include "ff.h"
+#include "parser.h"
+#include "wrapops.h"
+#include "d64ops.h"
+
+#define D41_ERROR_OFFSET 174848
+#define D71_ERROR_OFFSET 349696
+
+#define D41_BAM_TRACK           18
+#define D41_BAM_SECTOR          0
+#define D41_BAM_BYTES_PER_TRACK 4
+#define D41_BAM_BITFIELD_BYTES  3
+
+#define D81_BAM_TRACK           40
+#define D81_BAM_SECTOR1         1
+#define D81_BAM_SECTOR2         2
+#define D81_BAM_OFFSET          10
+#define D81_BAM_BYTES_PER_TRACK 6
+#define D81_BAM_BITFIELD_BYTES  5
+
+#define D71_BAM2_TRACK  53
+#define D71_BAM2_SECTOR 0
+#define D71_BAM2_BYTES_PER_TRACK 3
+#define D71_BAM_COUNTER2OFFSET   0xdd
+
+#define DNP_BAM_TRACK                     1
+#define DNP_BAM_SECTOR                    2
+#define DNP_BAM_BYTES_PER_TRACK          32
+#define DNP_DIRHEADER_DIR_TRACK           0
+#define DNP_DIRHEADER_DIR_SECTOR          1
+#define DNP_DIRHEADER_ROOTHDR_TRACK      32
+#define DNP_DIRHEADER_ROOTHDR_SECTOR     33
+#define DNP_DIRHEADER_PARENTHDR_TRACK    34
+#define DNP_DIRHEADER_PARENTHDR_SECTOR   35
+#define DNP_DIRHEADER_PARENTENTRY_TRACK  36
+#define DNP_DIRHEADER_PARENTENTRY_SECTOR 37
+#define DNP_DIRHEADER_PARENTENTRY_OFFSET 38
+#define DNP_LABEL_OFFSET                  4
+#define DNP_LABEL_AREA_SIZE             (28-4+1)
+#define DNP_ID_OFFSET                    22
+
+/* No errorinfo support for D81 */
+#define MAX_SECTORS_PER_TRACK 21
+
+typedef enum { BAM_BITFIELD, BAM_FREECOUNT } bamdata_t;
+
+struct {
+  uint8_t part;
+  uint8_t track;
+  uint8_t errors[MAX_SECTORS_PER_TRACK];
+} errorcache;
+
+buffer_t *bam_buffer;
+
+/* ------------------------------------------------------------------------- */
+/*  Forward declarations                                                     */
+/* ------------------------------------------------------------------------- */
+
+static uint8_t d64_opendir(dh_t *dh, path_t *path);
+
+/* ------------------------------------------------------------------------- */
+/*  Utility functions                                                        */
+/* ------------------------------------------------------------------------- */
+
+static const PROGMEM struct param_s d41param = {
+  18, 1, 35, 0x90, 0xa2, 10, 3
+};
+
+static const PROGMEM struct param_s d71param = {
+  18, 1, 70, 0x90, 0xa2, 6, 3
+};
+
+static const PROGMEM struct param_s d81param = {
+  40, 3, 80, 0x04, 0x16, 1, 1
+};
+
+static const PROGMEM struct param_s dnpparam = {
+  1, 1, 0, DNP_LABEL_OFFSET, DNP_ID_OFFSET, 1, 1
+};
+
+/**
+ * get_param - get a format-dependent parameter
+ * @part : partition number
+ * @param: parameter to retrieve
+ *
+ * Returns a parameter that is format-dependent for the image type mounted
+ * on the specified partition.
+ */
+static uint8_t get_param(uint8_t part, param_t param) {
+  return *(((uint8_t *)&partition[part].d64data)+param);
+}
+
+/**
+ * sector_lba - Transform a track/sector pair into a LBA sector number
+ * @part  : partition number
+ * @track : Track number
+ * @sector: Sector number
+ *
+ * Calculates an LBA-style sector number for a given track/sector pair.
+ */
+/* This version used the least code of all tested variants. */
+static uint16_t sector_lba(uint8_t part, uint8_t track, const uint8_t sector) {
+  uint16_t offset = 0;
+
+  track--; /* Track numbers are 1-based */
+
+  switch (partition[part].imagetype & D64_TYPE_MASK) {
+  case D64_TYPE_D41:
+  case D64_TYPE_D71:
+  default:
+    if (track >= 35) {
+      offset = 683;
+      track -= 35;
+    }
+    if (track < 17)
+      return track*21 + sector + offset;
+    if (track < 24)
+      return 17*21 + (track-17)*19 + sector + offset;
+    if (track < 30)
+      return 17*21 + 7*19 + (track-24)*18 + sector + offset;
+    return 17*21 + 7*19 + 6*18 + (track-30)*17 + sector + offset;
+
+  case D64_TYPE_D81:
+    return track*40 + sector;
+
+  case D64_TYPE_DNP:
+    return track*256 + sector;
+  }
+}
+
+/**
+ * sector_offset - Transform a track/sector pair into a D64 offset
+ * @part  : partition number
+ * @track : Track number
+ * @sector: Sector number
+ *
+ * Calculates an offset into a D64 file from a track and sector number.
+ */
+static uint32_t sector_offset(uint8_t part, uint8_t track, const uint8_t sector) {
+  return 256L * sector_lba(part,track,sector);
+}
+
+/**
+ * sectors_per_track - number of sectors on given track
+ * @part : partition number
+ * @track: Track number
+ *
+ * This function returns the number of sectors on the given track
+ * of a 1541/71/81 disk. Invalid track numbers will return invalid results.
+ */
+static uint16_t sectors_per_track(uint8_t part, uint8_t track) {
+  switch (partition[part].imagetype & D64_TYPE_MASK) {
+  case D64_TYPE_D41:
+  case D64_TYPE_D71:
+  default:
+    if (track > 35)
+      track -= 35;
+    if (track < 18)
+      return 21;
+    if (track < 25)
+      return 19;
+    if (track < 31)
+      return 18;
+    return 17;
+
+  case D64_TYPE_D81:
+    return 40;
+
+  case D64_TYPE_DNP:
+    return 256;
+  }
+}
+
+/**
+ * checked_read - read a specified sector after range-checking
+ * @part  : partition number
+ * @track : track number to be read
+ * @sector: sector number to be read
+ * @buf   : pointer to where the data should be read to
+ * @len   : number of bytes to be read
+ * @error : error number to be flagged if the range check fails
+ *
+ * This function checks if the track and sector are within the
+ * limits for the image format and calls image_read to read
+ * the data if they are. Returns the result of image_read or
+ * 2 if the range check failed.
+ */
+static uint8_t checked_read(uint8_t part, uint8_t track, uint8_t sector, uint8_t *buf, uint16_t len, uint8_t error) {
+  if (track < 1 || track > get_param(part, LAST_TRACK) ||
+      sector >= sectors_per_track(part, track)) {
+    set_error_ts(error,track,sector);
+    return 2;
+  }
+
+  if (partition[part].imagetype & D64_HAS_ERRORINFO) {
+    /* Check if the sector is marked as bad */
+    if (errorcache.part != part || errorcache.track != track) {
+      /* Read the error info for this track */
+      memset(errorcache.errors, 1, sizeof(errorcache.errors));
+      /* Needs fix for errorinfo on anything but D64/D71! */
+      if ((partition[part].imagetype & D64_TYPE_MASK) == D64_TYPE_D41) {
+        if (image_read(part, D41_ERROR_OFFSET+sector_lba(part,track,0),
+                       errorcache.errors, sectors_per_track(part, track)) >= 2)
+          return 2;
+      } else {
+        if (image_read(part, D71_ERROR_OFFSET+sector_lba(part,track,0),
+                       errorcache.errors, sectors_per_track(part, track)) >= 2)
+          return 2;
+      }
+      errorcache.part  = part;
+      errorcache.track = track;
+    }
+
+    /* Calculate error message from the code */
+    if (errorcache.errors[sector] >= 2 && errorcache.errors[sector] <= 11) {
+      /* Most codes can be mapped directly */
+      set_error_ts(errorcache.errors[sector]-2+20,track,sector);
+      return 2;
+    }
+    if (errorcache.errors[sector] == 15) {
+      /* Drive not ready */
+      set_error(74);
+      return 2;
+    }
+    /* 1 is OK, unknown values are accepted too */
+  }
+
+  return image_read(part, sector_offset(part,track,sector), buf, len);
+}
+
+/**
+ * read_entry - read a single directory entry
+ * @part: partition number
+ * @dh  : pointer to d64dh pointing to the entry
+ * @buf : pointer to the buffer where the data should be stored
+ *
+ * This function reads a single directory entry specified by dh
+ * into the buffer buf which needs to be at least 32 bytes big.
+ * Assumes that it is never called with an invalid track/sector.
+ * Returns the same as image_read (0 success, 1 partial read, 2 failed)
+ */
+static uint8_t read_entry(uint8_t part, struct d64dh *dh, uint8_t *buf) {
+  return image_read(part, sector_offset(part, dh->track, dh->sector) +
+                          dh->entry * 32, buf, 32);
+}
+
+/**
+ * strnsubst - substitute one character with another in a buffer
+ * @buffer : pointer to the buffer
+ * @len    : length of buffer
+ * @oldchar: character to be replaced
+ * @newchar: character to be used as a replacement
+ *
+ * This functions changes all occurences of oldchar in the first len
+ * byte of buffer with newchar. Although it is named str*, it doesn't
+ * care about zero bytes in any way.
+ */
+static void strnsubst(uint8_t *buffer, uint8_t len, uint8_t oldchar, uint8_t newchar) {
+  uint8_t i=len-1;
+
+  do {
+    if (buffer[i] == oldchar)
+      buffer[i] = newchar;
+  } while (i--);
+}
+
+/**
+ * d64_bam_flush - write BAM buffer to disk
+ * @buf: pointer to the BAM buffer
+ *
+ * This function writes the contents of the BAM buffer to the disk image.
+ * Returns 0 if successful, != 0 otherwise.
+ */
+static uint8_t d64_bam_flush(buffer_t *buf) {
+  uint8_t res;
+
+  if (buf->mustflush && buf->pvt.bam.part < max_part) {
+    res = image_write(buf->pvt.bam.part,
+                      sector_offset(buf->pvt.bam.part,
+                                    buf->pvt.bam.track,
+                                    buf->pvt.bam.sector),
+                      buf->data, 256, 1);
+    buf->mustflush = 0;
+    return res;
+  } else
+    return 0;
+}
+
+/**
+ * move_bam_window - read correct BAM sector into window.
+ * @part  : partition
+ * @track : track number
+ * @type  : type of pointer requested
+ * @ptr   : pointer to track information in BAM sector
+ *
+ * This function reads the correct BAM sector into memory for the requested
+ * track, flushing an existing BAM sector to disk if needed.  It also
+ * calculates the correct pointer into the BAM sector for the appropriate
+ * track.  Since the BAM contains both sector counts and sector allocation
+ * bitmaps, type is used to signal which reference is desired.
+ * Returns 0 if successful, != 0 otherwise.
+ */
+static uint8_t move_bam_window(uint8_t part, uint8_t track, bamdata_t type, uint8_t **ptr) {
+  uint8_t res;
+  uint8_t t,s, pos;
+
+  switch(partition[part].imagetype & D64_TYPE_MASK) {
+  case D64_TYPE_D41:
+  default:
+    t   = D41_BAM_TRACK;
+    s   = D41_BAM_SECTOR;
+    pos = D41_BAM_BYTES_PER_TRACK * track + (type == BAM_BITFIELD ? 1:0);
+    break;
+
+  case D64_TYPE_D71:
+    if (track > 35 && type == BAM_BITFIELD) {
+      t   = D71_BAM2_TRACK;
+      s   = D71_BAM2_SECTOR;
+      pos = (track - 36) * D71_BAM2_BYTES_PER_TRACK;
+    } else {
+      t = D41_BAM_TRACK;
+      s = D41_BAM_SECTOR;
+      if (track > 35) {
+        pos = (track - 36) + D71_BAM_COUNTER2OFFSET;
+      } else {
+        pos = D41_BAM_BYTES_PER_TRACK * track + (type == BAM_BITFIELD ? 1:0);
+      }
+    }
+    break;
+
+  case D64_TYPE_D81:
+    t   = D81_BAM_TRACK;
+    s   = (track < 41 ? D81_BAM_SECTOR1 : D81_BAM_SECTOR2);
+    if (track > 40)
+      track -= 40;
+    pos = D81_BAM_OFFSET + track * D81_BAM_BYTES_PER_TRACK + (type == BAM_BITFIELD ? 1:0);
+    break;
+
+  case D64_TYPE_DNP:
+    t   = DNP_BAM_TRACK;
+    s   = DNP_BAM_SECTOR + (track >> 3);
+    pos = (track & 0x07) * 32;
+    break;
+  }
+
+  if (bam_buffer->pvt.bam.part != part
+      || bam_buffer->pvt.bam.track != t
+      || bam_buffer->pvt.bam.sector != s) {
+    /* Need to read the BAM sector */
+    if((res = bam_buffer->cleanup(bam_buffer)))
+      return res;
+
+    res = image_read(part, sector_offset(part, t, s), bam_buffer->data, 256);
+    if(res)
+      return res;
+
+    bam_buffer->pvt.bam.part   = part;
+    bam_buffer->pvt.bam.track  = t;
+    bam_buffer->pvt.bam.sector = s;
+  }
+
+  *ptr = bam_buffer->data + pos;
+  return 0;
+}
+
+/**
+ * is_free - checks if the given sector is marked as free
+ * @part  : partition
+ * @track : track number
+ * @sector: sector number
+ *
+ * This function checks if the given sector is marked as free in
+ * the BAM of drive "part". Returns 0 if allocated, >0 if free, <0 on error.
+ */
+static int8_t is_free(uint8_t part, uint8_t track, uint8_t sector) {
+  uint8_t res;
+  uint8_t *ptr = NULL;
+
+  res = move_bam_window(part,track,BAM_BITFIELD,&ptr);
+  if(res)
+    return -1;
+
+  if (partition[part].imagetype == D64_TYPE_DNP)
+    return (ptr[sector>>3] & (0x80>>(sector&7))) != 0;
+  else
+    return (ptr[sector>>3] & (1<<(sector&7))) != 0;
+}
+
+/**
+ * sectors_free - returns the number of free sectors on a given track
+ * @part  : partition
+ * @track : track number
+ *
+ * This function returns the number of free sectors on the given track
+ * of partition part.
+ */
+static uint16_t sectors_free(uint8_t part, uint8_t track) {
+  uint8_t *trackmap = NULL;
+
+  if (track < 1 || track > get_param(part, LAST_TRACK))
+    return 0;
+
+  switch (partition[part].imagetype & D64_TYPE_MASK) {
+
+  case D64_TYPE_DNP:
+    if(move_bam_window(part,track,BAM_FREECOUNT,&trackmap))
+      return 0;
+
+    uint16_t blocks = 0;
+    for (uint8_t i=0;i < DNP_BAM_BYTES_PER_TRACK;i++) {
+      // From http://everything2.com/title/counting%25201%2520bits
+      uint8_t b = (trackmap[i] & 0x55) + (trackmap[i]>>1 & 0x55);
+      b = (b & 0x33) + (b >> 2 & 0x33);
+      b = (b & 0x0f) + (b >> 4 & 0x0f);
+      blocks += b;
+    }
+    return blocks;
+
+  case D64_TYPE_D71:
+  case D64_TYPE_D81:
+  case D64_TYPE_D41:
+  default:
+    if(move_bam_window(part,track,BAM_FREECOUNT,&trackmap))
+      return 0;
+    return *trackmap;
+  }
+}
+
+/**
+ * allocate_sector - mark a sector as used
+ * @part  : partitoin
+ * @track : track number
+ * @sector: sector number
+ *
+ * This function marks the given sector as used in the BAM of drive part.
+ * If the sector was already marked as used nothing is changed.
+ * Returns 0 if successful, 1 on error.
+ */
+static uint8_t allocate_sector(uint8_t part, uint8_t track, uint8_t sector) {
+  uint8_t *trackmap;
+  int8_t res = is_free(part,track,sector);
+
+  if (res < 0)
+    return 1;
+
+  if (res != 0) {
+    /* do the bitfield first, since is_free already set it up for us. */
+    if(move_bam_window(part,track,BAM_BITFIELD,&trackmap))
+      return 1;
+
+    bam_buffer->mustflush = 1;
+
+    if (partition[part].imagetype == D64_TYPE_DNP) {
+      /* For some reason DNP has its bitfield reversed */
+      trackmap[sector>>3] &= (uint8_t)~(0x80>>(sector&7));
+
+      /* DNP has no counter in its BAM */
+      return 0;
+    }
+
+    trackmap[sector>>3] &= (uint8_t)~(1<<(sector&7));
+
+    if(move_bam_window(part,track,BAM_FREECOUNT,&trackmap))
+      return 1;
+
+    if (trackmap[0] > 0) {
+      trackmap[0]--;
+      bam_buffer->mustflush = 1;
+    }
+  }
+  return 0;
+}
+
+/**
+ * free_sector - mark a sector as free
+ * @part  : partition
+ * @track : track number
+ * @sector: sector number
+ *
+ * This function marks the given sector as free in the BAM of partition
+ * part. If the sector was already marked as free nothing is changed.
+ * Returns 0 if successful, 1 on error.
+ */
+static uint8_t free_sector(uint8_t part, uint8_t track, uint8_t sector) {
+  uint8_t *trackmap;
+  int8_t res = is_free(part,track,sector);
+
+  if (res < 0)
+    return 1;
+
+  if (res == 0) {
+    /* do the bitfield first, since is_free already set it up for us. */
+    if(move_bam_window(part,track,BAM_BITFIELD,&trackmap))
+      return 1;
+
+    bam_buffer->mustflush = 1;
+
+    if (partition[part].imagetype == D64_TYPE_DNP) {
+      /* For some reason DNP has its bitfield reversed */
+      trackmap[sector>>3] |= 0x80>>(sector&7);
+
+      /* DNP has no counter in its BAM */
+      return 0;
+    }
+
+    trackmap[sector>>3] |= 1<<(sector&7);
+
+    if(move_bam_window(part,track,BAM_FREECOUNT,&trackmap))
+      return 1;
+
+    if(trackmap[0] < sectors_per_track(part, track)) {
+      trackmap[0]++;
+      bam_buffer->mustflush = 1;
+    }
+  }
+  return 0;
+}
+
+/**
+ * get_first_sector - calculate the first sector for a new file
+ * @part  : partition
+ * @track : pointer to a variable holding the track
+ * @sector: pointer to a variable holding the sector
+ *
+ * This function calculates the first sector to be allocated for a new
+ * file. The algorithm is based on the description found at
+ * http://ist.uwaterloo.ca/~schepers/formats/DISK.TXT
+ * Returns 0 if successful or 1 if any error occured.
+ *
+ * This code will not skip track 53 of a D71 if there are any free
+ * sectors on it - this behaviour is consistent with that of a 1571
+ * with a revision 3.0 ROM.
+ */
+static uint8_t get_first_sector(uint8_t part, uint8_t *track, uint8_t *sector) {
+  int8_t distance = 1;
+
+  /* DNP uses a simple "first free" allocation scheme, starting at track 2.  */
+  /* It is not known if this is the same algorithm as used in the original   */
+  /* CMD drives, but track 1 seems to be semi-reserved for directory sectors.*/
+  if (partition[part].imagetype == D64_TYPE_DNP) {
+    *track = 2;
+    while (sectors_free(part, *track) == 0) {
+      (*track)++;
+
+      if (*track == get_param(part, LAST_TRACK) ||
+          *track == 0) {
+        /* Wrap to track 1 */
+        *track = 1;
+      }
+
+      if (*track == 2)
+        /* If we're at track 2 again there are no free sectors anywhere */
+        return 1;
+    }
+  } else {
+    /* Look for a track with free sectors close to the directory */
+    while (distance < get_param(part, LAST_TRACK)) {
+      if (sectors_free(part, get_param(part, DIR_TRACK)-distance))
+        break;
+
+      /* Invert sign */
+      distance = -distance;
+
+      /* Increase distance every second try */
+      if (distance > 0)
+        distance++;
+    }
+
+    if (distance == get_param(part, LAST_TRACK)) {
+      if (current_error == ERROR_OK)
+        set_error(ERROR_DISK_FULL);
+      return 1;
+    }
+
+    *track = get_param(part, DIR_TRACK)-distance;
+  }
+
+  /* Search for the first free sector on this track */
+  for (*sector = 0;*sector < sectors_per_track(part, *track); *sector += 1)
+    if (is_free(part, *track, *sector) > 0)
+      return 0;
+
+  /* If we're here the BAM is invalid or couldn't be read */
+  if (current_error == ERROR_OK)
+    set_error(ERROR_DISK_FULL);
+  return 1;
+}
+
+/**
+ * get_next_sector - calculate the next sector for a file
+ * @part  : partition
+ * @track : pointer to a variable holding the track
+ * @sector: pointer to a variable holding the sector
+ *
+ * This function calculates the next sector to be allocated for a file
+ * based on the current sector in the variables pointed to by track/sector.
+ * The algorithm is based on the description found at
+ * http://ist.uwaterloo.ca/~schepers/formats/DISK.TXT
+ * Returns 0 if successful or 1 if any error occured.
+ */
+static uint8_t get_next_sector(uint8_t part, uint8_t *track, uint8_t *sector) {
+  if (partition[part].imagetype == D64_TYPE_DNP) {
+    uint8_t newtrack = *track;
+
+    /* Find a track with free sectors */
+    while (sectors_free(part, newtrack) == 0) {
+      newtrack++;
+
+      if (newtrack == get_param(part, LAST_TRACK) ||
+          newtrack == 0) {
+        /* Wrap to track 1 */
+        newtrack = 1;
+      }
+
+      if (newtrack == *track)
+        /* Returned to the start track -> no free sectors anywhere */
+        return 1;
+    }
+
+    uint8_t newsector;
+
+    if (newtrack == *track) {
+      /* Same track: start at the previous sector */
+      newsector = *sector;
+    } else {
+      /* New track: start at sector 0 */
+      newsector = 0;
+    }
+
+    while (!is_free(part, newtrack, newsector))
+      newsector++; // will automatically wrap from 255->0
+
+    *track = newtrack;
+    *sector = newsector;
+
+    return 0;
+  }
+
+  uint8_t interleave,tries;
+
+  if (*track == get_param(part, DIR_TRACK)) {
+    if (sectors_free(part, get_param(part, DIR_TRACK)) == 0) {
+      if (current_error == ERROR_OK)
+        set_error(ERROR_DISK_FULL);
+      return 1;
+    }
+    interleave = get_param(part, DIR_INTERLEAVE);
+  } else
+    interleave = get_param(part, FILE_INTERLEAVE);
+
+  /* Look for a track with free sectors */
+  tries = 0;
+  while (tries < 3 && !sectors_free(part, *track)) {
+    /* No more space on current track, try another */
+    if (*track < get_param(part, DIR_TRACK))
+      *track -= 1;
+    else {
+      *track += 1;
+      /* Skip track 53 on D71 images */
+      if ((partition[part].imagetype & D64_TYPE_MASK) == D64_TYPE_D71 &&
+          *track == D71_BAM2_TRACK)
+        *track += 1;
+    }
+
+    if (*track < 1) {
+      *track = get_param(part, DIR_TRACK) + 1;
+      *sector = 0;
+      tries++;
+    }
+    if (*track > get_param(part, LAST_TRACK)) {
+      *track = get_param(part, DIR_TRACK) - 1;
+      *sector = 0;
+      tries++;
+    }
+  }
+
+  if (tries == 3) {
+    if (current_error == ERROR_OK)
+      set_error(ERROR_DISK_FULL);
+    return 1;
+  }
+
+  /* Look for a sector at interleave distance */
+  *sector += interleave;
+  if (*sector >= sectors_per_track(part, *track)) {
+    *sector -= sectors_per_track(part, *track);
+    if (*sector != 0)
+      *sector -= 1;
+  }
+
+  /* Increase distance until an empty sector is found */
+  tries = 99;
+  while (is_free(part,*track,*sector) <= 0 && tries--) {
+    *sector += 1;
+    if (*sector >= sectors_per_track(part, *track))
+      *sector = 0;
+  }
+
+  if (tries)
+    return 0;
+
+  if (current_error == ERROR_OK)
+    set_error(ERROR_DISK_FULL);
+  return 1;
+}
+
+/**
+ * nextdirentry - read the next dir entry to entrybuf
+ * @dh: directory handle
+ *
+ * This function reads the next directory entry from the disk
+ * into entrybuf. Returns 1 if an error occured, -1 if there
+ * are no more directory entries and 0 if successful. This
+ * function will return every entry, even deleted ones.
+ */
+static int8_t nextdirentry(dh_t *dh) {
+  /* End of directory entries in this sector? */
+  if (dh->dir.d64.entry == 8) {
+    /* Read link pointer */
+    if (checked_read(dh->part, dh->dir.d64.track, dh->dir.d64.sector, entrybuf, 2, ERROR_ILLEGAL_TS_LINK))
+      return 1;
+
+    /* Final directory sector? */
+    if (entrybuf[0] == 0)
+      return -1;
+
+    dh->dir.d64.track  = entrybuf[0];
+    dh->dir.d64.sector = entrybuf[1];
+    dh->dir.d64.entry  = 0;
+  }
+
+  if (dh->dir.d64.track < 1 || dh->dir.d64.track > get_param(dh->part, LAST_TRACK) ||
+      dh->dir.d64.sector >= sectors_per_track(dh->part, dh->dir.d64.track)) {
+    set_error_ts(ERROR_ILLEGAL_TS_LINK,dh->dir.d64.track,dh->dir.d64.sector);
+    return 1;
+  }
+
+  if (read_entry(dh->part, &dh->dir.d64, entrybuf))
+    return 1;
+
+  dh->dir.d64.entry++;
+
+  return 0;
+}
+
+/**
+ * find_empty_entry - find an empty directory entry
+ * @path: path of the directory
+ * @dh: directory handle
+ *
+ * This funtion finds an empty entry in the directory, creating
+ * a new directory sector if required.
+ * Returns 0 if successful or 1 if not.
+ */
+static uint8_t find_empty_entry(path_t *path, dh_t *dh) {
+  int8_t res;
+
+  d64_opendir(dh, path);
+  do {
+    res = nextdirentry(dh);
+    if (res > 0)
+      return 1;
+  } while (res == 0 && entrybuf[DIR_OFS_FILE_TYPE] != 0);
+
+  /* Allocate a new directory sector if no empty entries were found */
+  if (res < 0) {
+    uint8_t t,s;
+
+    t = dh->dir.d64.track;
+    s = dh->dir.d64.sector;
+
+    if (get_next_sector(path->part, &dh->dir.d64.track, &dh->dir.d64.sector))
+      return 1;
+
+    /* Link the old sector to the new */
+    entrybuf[0] = dh->dir.d64.track;
+    entrybuf[1] = dh->dir.d64.sector;
+    if (image_write(path->part, sector_offset(path->part,t,s), entrybuf, 2, 0))
+      return 1;
+
+    if (allocate_sector(path->part, dh->dir.d64.track, dh->dir.d64.sector))
+      return 1;
+
+    /* DNP only: Increment the block count in the parent directory */
+    if (partition[path->part].imagetype == D64_TYPE_DNP) {
+      if (image_read(path->part,
+                     DNP_DIRHEADER_PARENTENTRY_TRACK + sector_offset(path->part,
+                                                                     path->dir.dxx.track,
+                                                                     path->dir.dxx.sector),
+                     entrybuf, 3))
+        return 1;
+
+      if (entrybuf[0] != 0) {
+        /* Read block count of entry in parent directory */
+        if (image_read(path->part,
+                       sector_offset(path->part, entrybuf[0], entrybuf[1]) + entrybuf[2] + DIR_OFS_SIZE_LOW - 2,
+                       entrybuf + 3, 2))
+          return 1;
+
+        uint16_t *blocks = (uint16_t *)(entrybuf + 3);
+        (*blocks)++;
+
+        /* Write new block count */
+        if (image_write(path->part,
+                        sector_offset(path->part, entrybuf[0], entrybuf[1]) + entrybuf[2] + DIR_OFS_SIZE_LOW - 2,
+                        entrybuf + 3, 2, 1))
+          return 1;
+      }
+    }
+
+    /* Clear the new directory sector */
+    memset(entrybuf, 0, 32);
+    entrybuf[1] = 0xff;
+    for (uint8_t i=0;i<256/32;i++) {
+      if (image_write(path->part,
+                      sector_offset(path->part,
+                                    dh->dir.d64.track,
+                                    dh->dir.d64.sector)+32*i,
+                      entrybuf, 32, 0))
+        return 1;
+
+      entrybuf[1] = 0;
+    }
+
+    /* Mark full sector as used */
+    entrybuf[1] = 0xff;
+    dh->dir.d64.entry = 0;
+
+  } else {
+    /* nextdirentry has already incremented this variable, undo it */
+    dh->dir.d64.entry--;
+  }
+
+  return 0;
+}
+
+/**
+ * d64_read - refill-callback used for reading
+ * @buf: target buffer
+ *
+ * This is the callback used as refill for files opened for reading.
+ */
+static uint8_t d64_read(buffer_t *buf) {
+  /* Store the current sector, used for append */
+  buf->pvt.d64.track  = buf->data[0];
+  buf->pvt.d64.sector = buf->data[1];
+
+  if (checked_read(buf->pvt.d64.part, buf->data[0], buf->data[1], buf->data, 256, ERROR_ILLEGAL_TS_LINK)) {
+    free_buffer(buf);
+    return 1;
+  }
+
+  buf->position = 2;
+
+  if (buf->data[0] == 0) {
+    /* Final sector of the file */
+    buf->lastused = buf->data[1];
+    buf->sendeoi  = 1;
+  } else {
+    buf->lastused = 255;
+    buf->sendeoi  = 0;
+  }
+
+  return 0;
+}
+
+/**
+ * d64_seek - seek-callback
+ * @buf     : target buffer
+ * @position: offset to seek to
+ * @index   : offset within the record to seek to
+ *
+ * This is the function used as the seek callback. Since seeking
+ * isn't supported for D64 files it just sets an error message
+ * and returns 1.
+ */
+static uint8_t d64_seek(buffer_t *buf, uint32_t position, uint8_t index) {
+  set_error(ERROR_SYNTAX_UNABLE);
+  return 1;
+}
+
+/**
+ * d64_write - refill-callback used for writing
+ * @buf: target buffer
+ *
+ * This is the callback used as refill for files opened for writing.
+ */
+static uint8_t d64_write(buffer_t *buf) {
+  uint8_t t,s,savederror;
+
+  savederror = 0;
+  t = buf->pvt.d64.track;
+  s = buf->pvt.d64.sector;
+
+  buf->pvt.d64.blocks++;
+
+  /* Mark as last sector in case something below fails */
+  buf->data[0] = 0;
+  buf->data[1] = buf->lastused;
+
+  /* Find another free sector */
+  if (get_next_sector(buf->pvt.d64.part, &t, &s)) {
+    t = 0;
+    savederror = current_error;
+    goto storedata;
+  }
+
+  buf->data[0] = t;
+  buf->data[1] = s;
+
+  /* Allocate it */
+  if (allocate_sector(buf->pvt.d64.part, t, s)) {
+    free_buffer(buf);
+    return 1;
+  }
+  if (bam_buffer->cleanup(bam_buffer)) {
+    free_buffer(buf);
+    return 1;
+  }
+
+ storedata:
+  /* Store data in the already-reserved sector */
+  if (image_write(buf->pvt.d64.part,
+                  sector_offset(buf->pvt.d64.part,
+                                buf->pvt.d64.track,
+                                buf->pvt.d64.sector),
+                  buf->data, 256, 1)) {
+    free_buffer(buf);
+    return 1;
+  }
+
+  buf->pvt.d64.track  = t;
+  buf->pvt.d64.sector = s;
+  buf->position  = 2;
+  buf->lastused  = 1;
+  buf->mustflush = 0;
+  mark_buffer_clean(buf);
+
+  if (savederror) {
+    set_error(savederror);
+    free_buffer(buf);
+    return 1;
+  } else
+    return 0;
+}
+
+static uint8_t d64_write_cleanup(buffer_t *buf) {
+  uint8_t t,s;
+
+  buf->data[0] = 0;
+  buf->data[1] = buf->lastused;
+
+  t = buf->pvt.d64.track;
+  s = buf->pvt.d64.sector;
+  buf->pvt.d64.blocks++;
+
+  /* Track=0 means that there was an error somewhere earlier */
+  if (t == 0)
+    return 1;
+
+  /* Store data */
+  if (image_write(buf->pvt.d64.part, sector_offset(buf->pvt.d64.part,t,s), buf->data, 256, 1))
+    return 1;
+
+  /* Update directory entry */
+  t = buf->pvt.d64.dh.track;
+  s = buf->pvt.d64.dh.sector;
+  if (image_read(buf->pvt.d64.part, sector_offset(buf->pvt.d64.part,t,s)+32*buf->pvt.d64.dh.entry, entrybuf, 32))
+    return 1;
+
+  entrybuf[DIR_OFS_FILE_TYPE] |= FLAG_SPLAT;
+  entrybuf[DIR_OFS_SIZE_LOW]   = buf->pvt.d64.blocks & 0xff;
+  entrybuf[DIR_OFS_SIZE_HI]    = buf->pvt.d64.blocks >> 8;
+
+  if (image_write(buf->pvt.d64.part, sector_offset(buf->pvt.d64.part,t,s)+32*buf->pvt.d64.dh.entry, entrybuf, 32, 1))
+    return 1;
+
+  buf->cleanup = callback_dummy;
+  free_buffer(buf);
+
+  return 0;
+}
+
+
+/* ------------------------------------------------------------------------- */
+/*  fileops-API                                                              */
+/* ------------------------------------------------------------------------- */
+
+uint8_t d64_mount(path_t *path) {
+  uint8_t imagetype;
+  uint8_t part = path->part;
+  uint32_t fsize = partition[part].imagehandle.fsize;
+
+  switch (fsize) {
+  case 174848:
+    imagetype = D64_TYPE_D41;
+    memcpy_P(&partition[part].d64data, &d41param, sizeof(struct param_s));
+    break;
+
+  case 175531:
+    imagetype = D64_TYPE_D41 | D64_HAS_ERRORINFO;
+    memcpy_P(&partition[part].d64data, &d41param, sizeof(struct param_s));
+    break;
+
+  case 349696:
+    imagetype = D64_TYPE_D71;
+    memcpy_P(&partition[part].d64data, &d71param, sizeof(struct param_s));
+    break;
+
+  case 351062:
+    imagetype = D64_TYPE_D71 | D64_HAS_ERRORINFO;
+    memcpy_P(&partition[part].d64data, &d71param, sizeof(struct param_s));
+    break;
+
+  case 819200:
+    imagetype = D64_TYPE_D81;
+    memcpy_P(&partition[part].d64data, &d81param, sizeof(struct param_s));
+    break;
+
+    /* Warning: If you enable this, increase the MAX_SECTORS_PER_TRACK #define
+                and the offset calculation in checked_read!
+  case 822400:
+    imagetype = D64_TYPE_D81 | D64_HAS_ERRORINFO;
+    memcpy_P(&partition[part].d64data, &d81param, sizeof(struct param_s));
+    break;
+    */
+
+  default:
+    if ((fsize % (256*256L)) != 0) {
+      set_error(ERROR_IMAGE_INVALID);
+      return 1;
+    }
+    imagetype = D64_TYPE_DNP;
+    memcpy_P(&partition[part].d64data, &dnpparam, sizeof(struct param_s));
+    partition[part].d64data.last_track = fsize / (256*256L);
+  }
+
+  /* Allocate a BAM buffer if required */
+  if (bam_buffer == NULL) {
+    bam_buffer = alloc_system_buffer();
+    if (!bam_buffer)
+      return 1;
+
+    bam_buffer->secondary    = BUFFER_SYS_BAM;
+    bam_buffer->pvt.bam.part = 255;
+    bam_buffer->cleanup      = d64_bam_flush;
+    stick_buffer(bam_buffer);
+  }
+
+  partition[part].imagetype = imagetype;
+  path->dir.dxx.track  = get_param(part, DIR_TRACK);
+  path->dir.dxx.sector = get_param(part, DIR_START_SECTOR);
+
+  bam_buffer->pvt.bam.refcount++;
+
+  if (imagetype & D64_HAS_ERRORINFO)
+    /* Invalidate error cache */
+    errorcache.part = 255;
+
+  return 0;
+}
+
+static uint8_t d64_opendir(dh_t *dh, path_t *path) {
+  dh->part = path->part;
+  dh->dir.d64.track  = path->dir.dxx.track;
+  dh->dir.d64.sector = path->dir.dxx.sector;
+  dh->dir.d64.entry  = 0;
+
+  if (partition[path->part].imagetype == D64_TYPE_DNP) {
+    /* Read the real first directory sector from the header sector */
+    uint8_t tmp[2];
+    if (image_read(path->part,
+                   sector_offset(path->part, dh->dir.d64.track, dh->dir.d64.sector),
+                   tmp, 2))
+      return 1;
+
+    dh->dir.d64.track  = tmp[0];
+    dh->dir.d64.sector = tmp[1];
+  }
+  return 0;
+}
+
+static int8_t d64_readdir(dh_t *dh, cbmdirent_t *dent) {
+  int8_t res;
+
+  do {
+    res = nextdirentry(dh);
+    if (res)
+      return res;
+
+    if (entrybuf[DIR_OFS_FILE_TYPE] != 0)
+      break;
+  } while (1);
+
+  memset(dent, 0, sizeof(cbmdirent_t));
+
+  dent->opstype = OPSTYPE_DXX;
+  dent->typeflags = entrybuf[DIR_OFS_FILE_TYPE] ^ FLAG_SPLAT;
+
+  if ((dent->typeflags & TYPE_MASK) > TYPE_DIR)
+    /* Change invalid types to DEL */
+    /* FIXME: Should exclude DIR on non-DNP */
+    dent->typeflags &= (uint8_t)~TYPE_MASK;
+
+  dent->pvt.dxx.dh = dh->dir.d64;
+  dent->pvt.dxx.dh.entry -= 1; /* undo increment in nextdirentry */
+  dent->blocksize = entrybuf[DIR_OFS_SIZE_LOW] + 256*entrybuf[DIR_OFS_SIZE_HI];
+  dent->remainder = 0xff;
+  memcpy(dent->name, entrybuf+DIR_OFS_FILE_NAME, CBM_NAME_LENGTH);
+  strnsubst(dent->name, 16, 0xa0, 0);
+
+  /* Fake Date/Time */
+  dent->date.year  = 82;
+  dent->date.month = 8;
+  dent->date.day   = 31;
+
+  return 0;
+}
+
+/* Reads and converts a string from the dir header sector (BAM for D41/D71) to the buffer */
+/* Used by d64_get(disk|dir)label and d64_getid */
+static uint8_t read_string_from_dirheader(path_t *path, uint8_t *buffer, param_t what, uint8_t size) {
+  uint8_t sector;
+
+  if (partition[path->part].imagetype == D64_TYPE_DNP)
+    sector = path->dir.dxx.sector;
+  else
+    sector = 0;
+
+  if (image_read(path->part,
+                 sector_offset(path->part, path->dir.dxx.track, sector)
+                 + get_param(path->part, what),
+                 buffer, size))
+    return 1;
+
+  strnsubst(buffer, size, 0xa0, 0x20);
+  return 0;
+}
+
+static uint8_t d64_getdirlabel(path_t *path, uint8_t *label) {
+  return read_string_from_dirheader(path, label, LABEL_OFFSET, 16);
+}
+
+static uint8_t d64_getdisklabel(uint8_t part, uint8_t *label) {
+  if (partition[part].imagetype == D64_TYPE_DNP) {
+    /* Read directly from root dir header */
+    if (image_read(part, 256 + DNP_LABEL_OFFSET, label, 16))
+      return 1;
+  } else {
+    /* Use getdirlabel instead */
+    path_t curpath;
+
+    curpath.part = part;
+    curpath.dir = partition[part].current_dir;
+    if (d64_getdirlabel(&curpath, label))
+      return 1;
+  }
+
+  /* Zero-terminate label */
+  uint8_t *ptr = label+16;
+  *ptr-- = 0;
+  while (ptr != label && *ptr == ' ')
+    *ptr-- = 0;
+
+  return 0;
+}
+
+static uint8_t d64_getid(path_t *path, uint8_t *id) {
+  return read_string_from_dirheader(path, id, ID_OFFSET, 5);
+}
+
+static uint16_t d64_freeblocks(uint8_t part) {
+  uint16_t blocks = 0;
+  uint8_t i;
+
+  for (i = 1; i != 0 && i <= get_param(part, LAST_TRACK); i++) {
+    /* Skip directory track */
+    switch (partition[part].imagetype & D64_TYPE_MASK) {
+    case D64_TYPE_D81:
+      if (i == D81_BAM_TRACK)
+        continue;
+      break;
+
+    case D64_TYPE_DNP:
+      // DNP doesn't exclude anything
+      break;
+
+    case D64_TYPE_D41:
+    case D64_TYPE_D71:
+    default:
+      if (i == D41_BAM_TRACK || i == D71_BAM2_TRACK)
+        continue; // continue the for loop
+      break;      // break out of the switch
+
+    }
+
+    blocks += sectors_free(part,i);
+  }
+
+  return blocks;
+}
+
+static void d64_open_read(path_t *path, cbmdirent_t *dent, buffer_t *buf) {
+  /* Read the directory entry of the file */
+  if (read_entry(path->part, &dent->pvt.dxx.dh, entrybuf))
+    return;
+
+  buf->data[0] = entrybuf[DIR_OFS_TRACK];
+  buf->data[1] = entrybuf[DIR_OFS_SECTOR];
+
+  buf->pvt.d64.part = path->part;
+
+  buf->read    = 1;
+  buf->refill  = d64_read;
+  buf->seek    = d64_seek;
+  stick_buffer(buf);
+
+  buf->refill(buf);
+}
+
+static void d64_open_write(path_t *path, cbmdirent_t *dent, uint8_t type, buffer_t *buf, uint8_t append) {
+  dh_t dh;
+  uint8_t *ptr;
+
+  /* Check for read-only image file */
+  if (!(partition[path->part].imagehandle.flag & FA_WRITE)) {
+    set_error(ERROR_WRITE_PROTECT);
+    return;
+  }
+
+  if (append) {
+    /* Append case: Open the file and read the last sector */
+    d64_open_read(path, dent, buf);
+    while (!current_error && buf->data[0])
+      buf->refill(buf);
+
+    if (current_error)
+      return;
+
+    /* Modify the buffer for writing */
+    buf->pvt.d64.dh     = dent->pvt.dxx.dh;
+    buf->pvt.d64.blocks = entrybuf[DIR_OFS_SIZE_LOW] + 256*entrybuf[DIR_OFS_SIZE_HI]-1;
+    buf->read       = 0;
+    buf->position   = buf->lastused+1;
+    if (buf->position == 0)
+      buf->mustflush = 1;
+    else
+      buf->mustflush = 0;
+    buf->refill     = d64_write;
+    buf->cleanup    = d64_write_cleanup;
+    buf->seek       = d64_seek;
+    mark_write_buffer(buf);
+    stick_buffer(buf);
+
+    return;
+  }
+
+  /* Non-append case */
+
+  /* Search for an empty directotry entry */
+  if (find_empty_entry(path, &dh))
+    return;
+
+  /* Create directory entry in entrybuf */
+  uint8_t *name = dent->name;
+  memset(entrybuf+2, 0, sizeof(entrybuf)-2);  /* Don't overwrite the link pointer! */
+  memset(entrybuf+DIR_OFS_FILE_NAME, 0xa0, CBM_NAME_LENGTH);
+  ptr = entrybuf+DIR_OFS_FILE_NAME;
+  while (*name) *ptr++ = *name++;
+  entrybuf[DIR_OFS_FILE_TYPE] = type;
+
+  /* Find a free sector and allocate it */
+  uint8_t t,s;
+
+  if (get_first_sector(path->part,&t,&s))
+    return;
+
+  entrybuf[DIR_OFS_TRACK]  = t;
+  entrybuf[DIR_OFS_SECTOR] = s;
+
+  if (allocate_sector(path->part,t,s))
+    return;
+
+  if (bam_buffer->cleanup(bam_buffer))
+    return;
+
+  /* Write the directory entry */
+  if (image_write(path->part, sector_offset(path->part, dh.dir.d64.track,dh.dir.d64.sector)+
+                  dh.dir.d64.entry*32, entrybuf, 32, 1))
+    return;
+
+  /* Prepare the data buffer */
+  mark_write_buffer(buf);
+  buf->position       = 2;
+  buf->lastused       = 2;
+  buf->cleanup        = d64_write_cleanup;
+  buf->refill         = d64_write;
+  buf->seek           = d64_seek;
+  buf->data[2]        = 13; /* Verified on VICE */
+  buf->pvt.d64.dh     = dh.dir.d64;
+  buf->pvt.d64.part   = path->part;
+  buf->pvt.d64.track  = t;
+  buf->pvt.d64.sector = s;
+  stick_buffer(buf);
+}
+
+static void d64_open_rel(path_t *path, cbmdirent_t *dent, buffer_t *buf, uint8_t length, uint8_t mode) {
+  set_error(ERROR_SYNTAX_UNABLE);
+}
+
+static uint8_t d64_delete(path_t *path, cbmdirent_t *dent) {
+  uint8_t linkbuf[2];
+
+  /* Read the directory entry of the file */
+  if (read_entry(path->part, &dent->pvt.dxx.dh, entrybuf))
+    return 255;
+
+  /* Free the sector chain in the BAM */
+  linkbuf[0] = entrybuf[DIR_OFS_TRACK];
+  linkbuf[1] = entrybuf[DIR_OFS_SECTOR];
+  do {
+    free_sector(path->part, linkbuf[0], linkbuf[1]);
+
+    if (checked_read(path->part, linkbuf[0], linkbuf[1], linkbuf, 2, ERROR_ILLEGAL_TS_LINK))
+      return 255;
+  } while (linkbuf[0]);
+
+  /* Clear directory entry */
+  entrybuf[DIR_OFS_FILE_TYPE] = 0;
+  if (image_write(path->part, sector_offset(path->part, dent->pvt.dxx.dh.track, dent->pvt.dxx.dh.sector)
+                  + dent->pvt.dxx.dh.entry * 32, entrybuf, 32, 1))
+    return 255;
+
+  /* Write new BAM */
+  if (bam_buffer->cleanup(bam_buffer))
+    return 255;
+  else
+    return 1;
+}
+
+static void d64_read_sector(buffer_t *buf, uint8_t part, uint8_t track, uint8_t sector) {
+  checked_read(part, track, sector, buf->data, 256, ERROR_ILLEGAL_TS_COMMAND);
+}
+
+static void d64_write_sector(buffer_t *buf, uint8_t part, uint8_t track, uint8_t sector) {
+  if (track < 1 || track > get_param(part, LAST_TRACK) ||
+      sector >= sectors_per_track(part, track)) {
+    set_error_ts(ERROR_ILLEGAL_TS_COMMAND,track,sector);
+  } else
+    image_write(part, sector_offset(part,track,sector), buf->data, 256, 1);
+}
+
+static void d64_rename(path_t *path, cbmdirent_t *dent, uint8_t *newname) {
+  uint8_t *ptr;
+
+  /* Read the directory entry of the file */
+  if (read_entry(path->part, &dent->pvt.dxx.dh, entrybuf))
+    return;
+
+  memset(entrybuf+DIR_OFS_FILE_NAME, 0xa0, CBM_NAME_LENGTH);
+  ptr = entrybuf+DIR_OFS_FILE_NAME;
+  while (*newname) *ptr++ = *newname++;
+
+  image_write(path->part,
+              sector_offset(path->part, dent->pvt.dxx.dh.track, dent->pvt.dxx.dh.sector)+
+              dent->pvt.dxx.dh.entry*32, entrybuf, 32, 1);
+}
+
+static void d64_format(uint8_t part, uint8_t *name, uint8_t *id) {
+  buffer_t *buf;
+  uint8_t  *ptr;
+  uint8_t  idbuf[2];
+  uint8_t  t,s;
+
+  /* Limit to D64 until fixed */
+  if (partition[part].imagetype != D64_TYPE_D41) {
+    set_error(ERROR_SYNTAX_UNABLE);
+    return;
+  }
+
+  buf = alloc_buffer();
+  if (buf == NULL)
+    return;
+
+  mark_write_buffer(buf);
+  mark_buffer_dirty(buf);
+  memset(buf->data, 0, 256);
+
+  /* Flush BAM buffer and mark its contents as invalid */
+  bam_buffer->cleanup(bam_buffer);
+  bam_buffer->pvt.bam.part = 0xff;
+
+  if (id != NULL) {
+    uint16_t i;
+
+    /* Clear the data area of the disk image */
+    for (i=0;i<683 /* FIXME: TOTAL_SECTORS */ ;i++)
+      if (image_write(part, 256L * i, buf->data, 256, 0))
+        return;
+
+    /* Copy the new ID into the buffer */
+    idbuf[0] = id[0];
+    idbuf[1] = id[1];
+  } else {
+    /* Read the old ID into the buffer */
+    if (image_read(part, sector_offset(part, get_param(part, DIR_TRACK),0) + get_param(part, ID_OFFSET), idbuf, 2))
+      return;
+  }
+
+  /* Clear the first directory sector */
+  buf->data[1] = 0xff;
+  if (image_write(part,
+                  sector_offset(part,
+                                get_param(part, DIR_TRACK),
+                                get_param(part, DIR_START_SECTOR)),
+                  buf->data, 256, 0))
+    return;
+
+  /* Mark all sectors as free */
+  for (t=1; t<=get_param(part, LAST_TRACK); t++)
+    for (s=0; s<sectors_per_track(part, t); s++)
+      if (t != 18 || s > 1)
+        free_sector(part,t,s);
+
+  ptr = bam_buffer->data;
+  ptr[0] = get_param(part, DIR_TRACK);
+  ptr[1] = get_param(part, DIR_START_SECTOR);
+  ptr[2] = 0x41;
+  memset(ptr+0x90, 0xa0, 0xaa-0x90+1);
+
+  /* Copy the disk label */
+  ptr += 0x90;
+  t = 16;
+  while (*name && t--)
+    *ptr++ = *name++;
+
+  /* Set the ID */
+  bam_buffer->data[get_param(part, ID_OFFSET)  ] = idbuf[0];
+  bam_buffer->data[get_param(part, ID_OFFSET)+1] = idbuf[1];
+  bam_buffer->data[get_param(part, ID_OFFSET)+3] = '2';
+  bam_buffer->data[get_param(part, ID_OFFSET)+4] = 'A';
+
+  /* Write the new BAM - mustflush is set because free_sector was used */
+  bam_buffer->cleanup(bam_buffer);
+
+  /* FIXME: Clear the error info block */
+}
+
+/**
+ * d64_raw_directory - open directory track as file
+ * @buf: target buffer
+ *
+ * This function opens the directory track as a file on the
+ * buffer passed in buf. Used when $ is opened on a secondary
+ * address > 0.
+ */
+void d64_raw_directory(path_t *path, buffer_t *buf) {
+  /* Copy&Waste from d64_open_read */
+  buf->data[0] = path->dir.dxx.track;
+  if (partition[path->part].imagetype == D64_TYPE_DNP)
+    buf->data[1] = path->dir.dxx.sector;
+  else
+    buf->data[1] = 0;
+
+  buf->pvt.d64.part = path->part;
+
+  buf->read    = 1;
+  buf->refill  = d64_read;
+  buf->seek    = d64_seek;
+  stick_buffer(buf);
+
+  buf->refill(buf);
+}
+
+/**
+ * d64_chdir - chdir for Dxx files
+ * @path   : path object of the location of dirname
+ * @dirname: directory to be changed into
+ *
+ * Changes the directory in the path object for DNP files,
+ * returns an error for everything else.
+ * Returns 0 if successful, 1 otherwise.
+ */
+static uint8_t d64_chdir(path_t *path, cbmdirent_t *dirname) {
+  if (partition[path->part].imagetype != D64_TYPE_DNP)
+    return image_chdir(path,dirname);
+
+  if (dirname->name[0] == 0) {
+    /* Empty string: root directory */
+    path->dir.dxx.track  = 1;
+    path->dir.dxx.sector = 1;
+    return 0;
+  }
+
+  if (dirname->name[0] == '_' && dirname->name[1] == 0) {
+    /* Move up a directory, unmount if at the root */
+    uint8_t parent[2];
+
+    if (image_read(path->part,
+                   sector_offset(path->part, path->dir.dxx.track, path->dir.dxx.sector) + DNP_DIRHEADER_PARENTHDR_TRACK,
+                   parent, 2))
+      return 1;
+
+    if (parent[0] == 0)
+      /* Already at the root directory */
+      return image_unmount(path->part);
+
+    path->dir.dxx.track  = parent[0];
+    path->dir.dxx.sector = parent[1];
+    return 0;
+  }
+
+  if (read_entry(path->part, &dirname->pvt.dxx.dh, entrybuf))
+    return 1;
+
+  path->dir.dxx.track  = entrybuf[DIR_OFS_TRACK];
+  path->dir.dxx.sector = entrybuf[DIR_OFS_SECTOR];
+
+  return 0;
+}
+
+/**
+ * d64_mkdir - mkdir for Dxx files
+ * @path   : path object of the location of dirname
+ * @dirname: directory to be created
+ *
+ * Creates a subdirectory for DNP files, returns an error
+ * for everything else.
+ */
+static void d64_mkdir(path_t *path, uint8_t *dirname) {
+  dh_t dh;
+  buffer_t *buf;
+  uint8_t h_track,h_sector,d_track,d_sector;
+  uint8_t *ptr, *name;
+
+  if (partition[path->part].imagetype != D64_TYPE_DNP) {
+    set_error(ERROR_SYNTAX_UNABLE);
+    return;
+  }
+
+  buf = alloc_buffer();
+  if (buf == NULL)
+    return;
+
+  /* Find an empty direcory entry */
+  if (find_empty_entry(path, &dh))
+    return;
+
+  /* Find a free track/sector for the dir header */
+  h_track  = path->dir.dxx.track;
+  h_sector = path->dir.dxx.sector;
+
+  if (get_next_sector(path->part, &h_track, &h_sector)) {
+    set_error(ERROR_DISK_FULL);
+    return;
+  }
+
+  /* Allocate it now so the next call to get_next doesn't return it again */
+  if (allocate_sector(path->part, h_track, h_sector))
+    return;
+
+  /* Find a free track/sector for the first directory sector */
+  d_track  = h_track;
+  d_sector = h_sector;
+
+  if (get_next_sector(path->part, &d_track, &d_sector)) {
+    set_error(ERROR_DISK_FULL);
+    free_sector(path->part, h_track, h_sector);
+    return;
+  }
+
+  if (allocate_sector(path->part, d_track, d_sector))
+    return;
+
+  /* Build a directory header */
+  memset(buf->data, 0, 256);
+  memset(buf->data + DNP_LABEL_OFFSET, 0xa0, DNP_LABEL_AREA_SIZE);
+
+  /* Unfortunately this generates much smaller code on AVR */
+  ptr = buf->data;
+  *ptr++ = d_track;
+  *ptr++ = d_sector;
+  *ptr++ = 'H';
+
+  /* Note: The CMD FD manual says these bytes point to the root header, */
+  /*       but all observed DNP files actually store the t/s of the     */
+  /*       sector itself here.                                          */
+  ptr = buf->data + DNP_DIRHEADER_ROOTHDR_TRACK;
+  *ptr++ = h_track;
+  *ptr++ = h_sector;
+
+  *ptr++ = path->dir.dxx.track;
+  *ptr++ = path->dir.dxx.sector;
+
+  *ptr++ = dh.dir.d64.track;
+  *ptr++ = dh.dir.d64.sector;
+  *ptr++ = dh.dir.d64.entry * 32 + 2;
+
+  /* Fill name and ID */
+  ptr = buf->data + DNP_LABEL_OFFSET;
+  name = dirname;
+  while (*name) *ptr++ = *name++;
+
+  ptr = buf->data + DNP_ID_OFFSET;
+  *ptr++ = dirname[0];
+  *ptr++ = dirname[1];
+   ptr++;
+  *ptr++ = '1';
+  *ptr++ = 'H';
+
+  /* Write directory header sector */
+  if (image_write(path->part,
+                  sector_offset(path->part, h_track, h_sector),
+                  buf->data, 256, 0))
+    return;
+
+  /* Create empty directory sector */
+  memset(buf->data, 0, 256);
+  buf->data[1] = 0xff;
+  if (image_write(path->part,
+                  sector_offset(path->part, d_track, d_sector),
+                  buf->data, 256, 0))
+    return;
+
+  /* Create the directory entry */
+  /* FIXME: Isn't similiar code duplicated in open_write and rename? */
+  memset(entrybuf+2, 0, sizeof(entrybuf)-2);
+  memset(entrybuf+DIR_OFS_FILE_NAME, 0xa0, CBM_NAME_LENGTH);
+
+  ptr = entrybuf + DIR_OFS_FILE_NAME;
+  while (*dirname) *ptr++ = *dirname++;
+
+  entrybuf[DIR_OFS_FILE_TYPE] = TYPE_DIR | FLAG_SPLAT;
+  entrybuf[DIR_OFS_TRACK]     = h_track;
+  entrybuf[DIR_OFS_SECTOR]    = h_sector;
+  entrybuf[DIR_OFS_SIZE_LOW]  = 2;
+
+  image_write(path->part, sector_offset(path->part, dh.dir.d64.track, dh.dir.d64.sector)
+                          + dh.dir.d64.entry * 32 + 2, entrybuf+2, 30, 1);
+}
+
+const PROGMEM fileops_t d64ops = {
+  d64_open_read,
+  d64_open_write,
+  d64_open_rel,
+  d64_delete,
+  d64_getdisklabel,
+  d64_getdirlabel,
+  d64_getid,
+  d64_freeblocks,
+  d64_read_sector,
+  d64_write_sector,
+  d64_format,
+  d64_opendir,
+  d64_readdir,
+  d64_mkdir,
+  d64_chdir,
+  d64_rename
+};
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/d64ops.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/d64ops.h
new file mode 100644
index 00000000..762ad1fc
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/d64ops.h
@@ -0,0 +1,57 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   d64ops.h: Definitions for the D64 operations
+
+*/
+
+#ifndef D64OPS_H
+#define D64OPS_H
+
+#include "wrapops.h"
+
+/* Offsets in a D64 directory entry, also needed for raw dirs */
+#define DIR_OFS_FILE_TYPE       2
+#define DIR_OFS_TRACK           3
+#define DIR_OFS_SECTOR          4
+#define DIR_OFS_FILE_NAME       5
+#define DIR_OFS_SIZE_LOW        0x1e
+#define DIR_OFS_SIZE_HI         0x1f
+
+/* Disk image types - values must match G-P partition type byte */
+#define D64_TYPE_MASK 0x7f
+#define D64_TYPE_NONE 0
+#define D64_TYPE_DNP  1
+#define D64_TYPE_D41  2
+#define D64_TYPE_D71  3
+#define D64_TYPE_D81  4
+#define D64_HAS_ERRORINFO 128
+
+extern const fileops_t d64ops;
+
+extern buffer_t *bam_buffer;
+
+uint8_t d64_mount(path_t *path);
+
+void d64_raw_directory(path_t *path, buffer_t *buf);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/dataflash.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/dataflash.c
new file mode 100644
index 00000000..5285018b
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/dataflash.c
@@ -0,0 +1,351 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   dataflash.c: AT45DB161D dataflash access routines
+
+   The exported functions in this file are weak-aliased to their corresponding
+   versions defined in diskio.h so when this file is the only diskio provider
+   compiled in they will be automatically used by the linker.
+
+*/
+
+#include <avr/io.h>
+#include <util/crc16.h>
+#include "config.h"
+#include "crc7.h"
+#include "diskio.h"
+#include "spi.h"
+#include "uart.h"
+#include "dataflash.h"
+
+#define STATUS_READY       128
+#define STATUS_COMPAREFAIL  64
+#define STATUS_PROTECTED     2
+#define STATUS_PAGES512      1
+
+#define CMD_READ_CONT_LOW      0x03
+#define CMD_MEM_TO_BUFFER_1    0x53
+#define CMD_MEM_TO_BUFFER_2    0x55
+#define CMD_PAGE_ERASE         0x81
+#define CMD_BUFFER_ERASE_PGM_1 0x83
+#define CMD_BUFFER_WRITE_1     0x84
+#define CMD_BUFFER_ERASE_PGM_2 0x86
+#define CMD_BUFFER_WRITE_2     0x87
+#define CMD_STATUS             0xd7
+
+
+#define SECTORS_PER_DEVICE 16
+#define PAGES_PER_SECTOR   256
+#define SECTOR_SHIFT       8
+#define SECTOR_MASK        0x0f00
+#define MAX_WRITES_BEFORE_REFRESH 10000
+
+/* Per-sector write counters */
+static uint16_t sectorwrites[SECTORS_PER_DEVICE];
+
+static inline void select_df(uint8_t state) {
+  if (state) {
+    DATAFLASH_PORT &= ~DATAFLASH_SELECT;
+  } else {
+    DATAFLASH_PORT |= DATAFLASH_SELECT;
+  }
+}
+
+static inline uint8_t wait_until_ready(void) {
+  uint8_t res;
+
+  select_df(1);
+  spiTransferByte(CMD_STATUS);
+  do {
+    res = spiTransferByte(0xff);
+  } while (!(res & STATUS_READY));
+  select_df(0);
+  return res;
+}
+
+static inline void send_address(uint16_t page, uint16_t byte) {
+  spiTransferByte((page >> 6) & 0xff);
+  spiTransferByte(((page << 2) & 0xff) + (byte >> 8));
+  spiTransferByte(byte & 0xff);
+}
+
+void df_init(void) {
+  uint8_t  i;
+  uint16_t j,maxwrites,maxbelow10k,tmp;
+
+  spiInit();
+  DATAFLASH_PORT |= DATAFLASH_SELECT;
+  DATAFLASH_DDR  |= DATAFLASH_SELECT;
+
+  for (i=0;i<SECTORS_PER_DEVICE;i++) {
+    maxwrites  = 0;
+    maxbelow10k = 0;
+    for (j=0;j<PAGES_PER_SECTOR;j++) {
+      /* Read write counter */
+      select_df(1);
+      spiTransferByte(CMD_READ_CONT_LOW);
+      send_address(i * PAGES_PER_SECTOR + j, 514);
+      tmp  = spiTransferByte(0xff);
+      tmp += spiTransferByte(0xff) << 8;
+      select_df(0);
+      if (tmp != 0xffff) {
+        if (tmp <= MAX_WRITES_BEFORE_REFRESH && tmp > maxbelow10k)
+          maxbelow10k = tmp;
+        if (tmp > maxwrites)
+          maxwrites = tmp;
+      }
+    }
+    if (maxbelow10k != 0)
+      sectorwrites[i] = maxbelow10k;
+    else
+      sectorwrites[i] = maxwrites;
+
+    uart_puts_P(PSTR("maxw "));
+    uart_puthex(i);
+    uart_putc(' ');
+    uart_puthex(sectorwrites[i] >> 8);
+    uart_puthex(sectorwrites[i] & 0xff);
+    uart_putcrlf();
+  }
+
+  disk_state = DISK_OK;
+}
+void disk_init(void) __attribute__ ((weak, alias("df_init")));
+
+
+DSTATUS df_status(BYTE drv) {
+  if (drv == 0) {
+    if (wait_until_ready() & STATUS_PROTECTED)
+      return STA_PROTECT;
+    else
+      return RES_OK;
+  } else
+    return STA_NOINIT|STA_NODISK;
+}
+DSTATUS disk_status(BYTE drv) __attribute__ ((weak, alias("df_status")));
+
+
+DSTATUS df_initialize(BYTE drv) {
+  /* Dataflash initialisation already happened in disk_init */
+  if (drv == 0)
+    return RES_OK;
+  else
+    return STA_NOINIT|STA_NODISK;
+}
+DSTATUS disk_initialize(BYTE drv) __attribute__ ((weak, alias("df_initialize")));
+
+
+/**
+ * df_read - reads sectors from the dataflash to buffer
+ * @drv   : drive (unused)
+ * @buffer: pointer to the buffer
+ * @sector: first sector to be read
+ * @count : number of sectors to be read
+ *
+ * This function reads count sectors from the dataflash starting
+ * at sector to buffer. Returns RES_ERROR if an error occured or
+ * RES_OK if successful.
+ */
+DRESULT df_read(BYTE drv, BYTE *buffer, DWORD sector, BYTE count) {
+  uint16_t i,crc,recvcrc,wcount;
+  uint8_t tmp,sec;
+
+  if (drv != 0)
+    return RES_PARERR;
+
+  for (sec=0;sec<count;sec++) {
+    if (sector >= SECTORS_PER_DEVICE * PAGES_PER_SECTOR)
+      return RES_ERROR;
+
+    select_df(1);
+    spiTransferByte(CMD_READ_CONT_LOW);
+    send_address(sector,0);
+
+    // Get data
+    crc = 0;
+    // Initiate data exchange over SPI
+    SPDR = 0xff;
+
+    for (i=0; i<512; i++) {
+      // Wait until data has been received
+      loop_until_bit_is_set(SPSR, SPIF);
+      tmp = SPDR;
+      // Transmit the next byte while we store the current one
+      SPDR = 0xff;
+
+      *(buffer++) = tmp;
+      crc = _crc_xmodem_update(crc, tmp);
+    }
+    // Wait until the first CRC byte is received
+    loop_until_bit_is_set(SPSR, SPIF);
+
+    // Check CRC
+    recvcrc = (SPDR << 8) + spiTransferByte(0xff);
+
+    // Read write counter
+    wcount = (spiTransferByte(0xff) << 8) + spiTransferByte(0xff);
+
+    select_df(0);
+
+    // Compare CRC - skip if sector was never written to
+    if (wcount != 0xffff && recvcrc != crc)
+      return RES_ERROR;
+
+    sector++;
+  }
+
+  return RES_OK;
+}
+DRESULT disk_read(BYTE drv, BYTE *buffer, DWORD sector, BYTE count) __attribute__ ((weak, alias("df_read")));
+
+
+/**
+ * df_write - writes sectors from buffer to the dataflash
+ * @drv   : drive (unused)
+ * @buffer: pointer to the buffer
+ * @sector: first sector to be written
+ * @count : number of sectors to be written
+ *
+ * This function writes count sectors from buffer to the SD card
+ * starting at sector. Returns RES_ERROR if an error occured or
+ * RES_OK if successful. This function will also handle rewriting
+ * pages when the write count gets close to the specified maximum.
+ */
+DRESULT df_write(BYTE drv, const BYTE *buffer, DWORD sector, BYTE count) {
+  uint8_t sec,j;
+  uint16_t crc,i,wcount;
+
+  if (drv != 0)
+    return RES_PARERR;
+
+  for (sec=0;sec<count;sec++) {
+    select_df(1);
+
+    /* Write data into chip buffer */
+    spiTransferByte(CMD_BUFFER_WRITE_1);
+    spiTransferByte(0);
+    spiTransferByte(0);
+    spiTransferByte(0);
+
+    /* Transfer data */
+    crc = 0;
+    for (i=0; i<512; i++) {
+      crc = _crc_xmodem_update(crc, *buffer);
+      spiTransferByte(*(buffer++));
+    }
+
+    /* Transfer CRC */
+    spiTransferByte(crc >> 8);
+    spiTransferByte(crc & 0xff);
+
+    /* Transfer write counter */
+    wcount = ++sectorwrites[sector >> SECTOR_SHIFT];
+    if (wcount >= 2*MAX_WRITES_BEFORE_REFRESH) {
+      /* Wrap counter */
+      wcount = 1;
+      sectorwrites[sector >> SECTOR_SHIFT] = 1;
+    }
+    spiTransferByte(wcount & 0xff);
+    spiTransferByte(wcount >> 8);
+
+    /* Fill remainder of page */
+    for (j=0;j<12;j++)
+      spiTransferByte(0xff);
+
+    select_df(0);
+
+    /* Write buffer to memory with erase */
+    select_df(1);
+    spiTransferByte(CMD_BUFFER_ERASE_PGM_1);
+    send_address(sector,0);
+    select_df(0);
+
+    wait_until_ready();
+
+    /* Refresh a page if required */
+    if ((wcount >= MAX_WRITES_BEFORE_REFRESH-(2*PAGES_PER_SECTOR-1) &&
+         wcount <= MAX_WRITES_BEFORE_REFRESH) ||
+        (wcount >= 2*MAX_WRITES_BEFORE_REFRESH-(2*PAGES_PER_SECTOR-1) &&
+         wcount <= 2*MAX_WRITES_BEFORE_REFRESH)) {
+      /* Calculate page to refresh */
+      uint16_t refreshpage = wcount;
+
+      if (wcount > MAX_WRITES_BEFORE_REFRESH)
+        refreshpage -= MAX_WRITES_BEFORE_REFRESH;
+
+      refreshpage = (refreshpage - (MAX_WRITES_BEFORE_REFRESH-(2*PAGES_PER_SECTOR-1))) / 2;
+      uart_puts_P(PSTR("refresh page "));
+      uart_puthex(refreshpage >> 8);
+      uart_puthex(refreshpage & 0xff);
+      uart_puts_P(PSTR(" wcount "));
+      uart_puthex(wcount >> 8);
+      uart_puthex(wcount & 0xff);
+      uart_putcrlf();
+      refreshpage += sector & SECTOR_MASK;
+
+      /* Read page into the buffer */
+      select_df(1);
+      spiTransferByte(CMD_MEM_TO_BUFFER_1);
+      send_address(refreshpage, 0);
+      select_df(0);
+      wait_until_ready();
+
+      /* Update write counter of page */
+      wcount++;
+      sectorwrites[sector >> SECTOR_SHIFT] = wcount;
+      select_df(1);
+      spiTransferByte(CMD_BUFFER_WRITE_1);
+      send_address(0,512);
+      spiTransferByte(wcount & 0xff);
+      spiTransferByte(wcount >> 8);
+      select_df(0);
+
+      /* Write buffer to memory */
+      select_df(1);
+      spiTransferByte(CMD_BUFFER_ERASE_PGM_1);
+      send_address(refreshpage,0);
+      select_df(0);
+
+      wait_until_ready();
+    }
+
+    sector++;
+  }
+
+  return RES_OK;
+}
+DRESULT disk_write(BYTE drv, const BYTE *buffer, DWORD sector, BYTE count) __attribute__ ((weak, alias("df_write")));
+
+DRESULT df_getinfo(BYTE drv, BYTE page, void *buffer) {
+  diskinfo0_t *di = buffer;
+
+  if (page != 0)
+    return RES_ERROR;
+
+  di->validbytes  = sizeof(diskinfo0_t);
+  di->disktype    = DISK_TYPE_DF;
+  di->sectorsize  = 2;
+  di->sectorcount = SECTORS_PER_DEVICE * PAGES_PER_SECTOR;
+
+  return RES_OK;
+}
+DRESULT disk_getinfo(BYTE drv, BYTE page, void *buffer) __attribute__ ((weak, alias("df_getinfo")));
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/dataflash.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/dataflash.h
new file mode 100644
index 00000000..69a162d2
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/dataflash.h
@@ -0,0 +1,40 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   dataflash.h: Definitions for the dataflash access routines
+
+*/
+
+#ifndef DATAFLASH_H
+#define DATAFLASH_H
+
+#include "diskio.h"
+
+/* These functions are weak-aliased to disk_... */
+void    df_init(void);
+DSTATUS df_status(BYTE drv);
+DSTATUS df_initialize(BYTE drv);
+DRESULT df_read(BYTE drv, BYTE *buffer, DWORD sector, BYTE count);
+DRESULT df_write(BYTE drv, const BYTE *buffer, DWORD sector, BYTE count);
+DRESULT df_getinfo(BYTE drv, BYTE page, void *buffer);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/dirent.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/dirent.h
new file mode 100644
index 00000000..de906497
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/dirent.h
@@ -0,0 +1,267 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   dirent.h: Various data structures for directory browsing
+
+*/
+
+#ifndef DIRENT_H
+#define DIRENT_H
+
+#include "ff.h"
+
+#define CBM_NAME_LENGTH 16
+
+#define TYPE_LENGTH 3
+#define TYPE_MASK 7
+#define EXT_TYPE_MASK 15
+
+/* Standard file types */
+#define TYPE_DEL 0
+#define TYPE_SEQ 1
+#define TYPE_PRG 2
+#define TYPE_USR 3
+#define TYPE_REL 4
+#define TYPE_CBM 5
+#define TYPE_DIR 6
+
+/* Internal file types used for the partition directory */
+#define TYPE_NAT 8
+
+/* Internal file type used to force files without header on FAT */
+#define TYPE_RAW 15
+
+/// Hidden is an unused bit on CBM
+#define FLAG_HIDDEN (1<<5)
+#define FLAG_RO     (1<<6)
+#define FLAG_SPLAT  (1<<7)
+
+/**
+ * @date      : 1900-based year
+ * @month     : month
+ * @day       : day
+ * @hour      : hour (24 hours, 0-based)
+ * @minute    : minute
+ * @second    : second
+ *
+ * This struct holds a file timestamp. It must have the "packed" attribute
+ * with the fields in descending order of magnitude because it is compared
+ * using memcmp.
+ */
+typedef struct date {
+  uint8_t  year;
+  uint8_t  month;
+  uint8_t  day;
+  uint8_t  hour;
+  uint8_t  minute;
+  uint8_t  second;
+}  __attribute__((packed)) date_t;
+
+/**
+ * struct dir_t - struct of directory references for various ops
+ * @fat: cluster number of the directory start for FAT
+ * @dxx: track/sector of the first directory sector for Dxx
+ */
+typedef struct {
+  uint32_t fat;
+  struct {
+    uint8_t track;
+    uint8_t sector;
+  } dxx;
+} dir_t;
+
+/**
+ * struct path_t - struct to reference a directory
+ * @part: partition number (0-based)
+ * @dir : directory reference
+ *
+ * This structure is passed around to various functions as
+ * a reference to a specific partition and directory.
+ * File operation type is implicitly given by partitions[part].fop
+ * until multi-type references on a single partition are implemented.
+ */
+typedef struct {
+  uint8_t  part;
+  dir_t    dir;
+} path_t;
+
+/**
+ * struct d64dh - D64 directory handle
+ * @track : track of the current directory sector
+ * @sector: sector of the current directory sector
+ * @entry : number of the current directory entry in its sector
+ *
+ * This structure addresses an entry in a D64 directory by its track,
+ * sector and entry (8 entries per sector).
+ */
+struct d64dh {
+  uint8_t track;
+  uint8_t sector;
+  uint8_t entry;
+};
+
+/* Ops type selector for cbmdirent_t */
+typedef enum {
+  OPSTYPE_UNDEFINED = 0,
+  OPSTYPE_FAT,
+  OPSTYPE_FAT_X00,  /* X00 files can never be disk images */
+                    /* and should match case-sensitive    */
+  OPSTYPE_M2I,
+  OPSTYPE_DXX
+} opstype_t;
+
+/**
+ * struct cbmdirent_t - directory entry for CBM names
+ * @name      : 0-padded commodore file name
+ * @typeflags : OR of file type and flags
+ * @blocksize : Size in blocks of 254 bytes
+ * @remainder : (filesize MOD 254) or 0xff if unknown
+ * @date      : Last modified date
+ * @opstype   : selects which part of the pvt union is valid
+ * @pvt       : fileops-specific private data
+ * @pvt.fat.cluster : Start cluster of the entry
+ * @pvt.fat.realname: Actual 8.3 name of the file (preferred if present)
+ * @pvt.dxx.dh      : Dxx directory handle for the dir entry of this file
+ * @pvt.m2i.offset  : Offset in the M2I file
+ *
+ * This structure holds a CBM filename, its type and its size. The typeflags
+ * are almost compatible to the file type byte in a D64 image, but the splat
+ * bit is inverted. The name is padded with 0-bytes and will always be
+ * zero-terminated. If it was read from a D64 file, it may contain valid
+ * characters beyond the first 0-byte which should be displayed in the
+ * directory, but ignored for name matching purposes.
+ * realname is either an empty string or the actual ASCII 8.3 file name
+ * of the file if the data in the name field was modified compared
+ * to the on-disk name (e.g. extension hiding or x00).
+ * year/month/day/hour/minute/second specify the time stamp of the file.
+ * It is recommended to set it to 1982-08-31 00:00:00 if unknown because
+ * this is currently the value used by FatFs for new files.
+ */
+typedef struct {
+  uint8_t   name[CBM_NAME_LENGTH+1];
+  uint8_t   typeflags;
+  uint16_t  blocksize;
+  uint8_t   remainder;
+  date_t    date;
+  opstype_t opstype;
+  union {
+    struct {
+      uint32_t cluster;
+      uint8_t  realname[8+3+1+1];
+    } fat;
+    struct {
+      struct d64dh dh;
+    } dxx;
+    struct {
+      uint16_t offset;
+    } m2i;
+  } pvt;
+} cbmdirent_t;
+
+/**
+ * struct d64fh - D64 file handle
+ * @dh    : d64dh pointing to the directory entry
+ * @part  : partition
+ * @track : current track
+ * @sector: current sector
+ * @blocks: number of sectors allocated before the current
+ *
+ * This structure holds the information required to write to a file
+ * in a D64 image and update its directory entry upon close.
+ */
+typedef struct d64fh {
+  struct d64dh dh;
+  uint8_t part;
+  uint8_t track;
+  uint8_t sector;
+  uint16_t blocks;
+} d64fh_t;
+
+/**
+ * struct dh_t - union of all directory handles
+ * @part: partition number for the handle
+ * @fat : fat directory handle
+ * @m2i : m2i directory handle (offset of entry in the file)
+ * @d64 : d64 directory handle
+ *
+ * This is a union of directory handles for all supported file types
+ * which is used as an opaque type to be passed between openddir and
+ * readdir.
+ */
+typedef struct dh_s {
+  uint8_t part;
+  union {
+    DIR fat;
+    uint16_t m2i;
+    struct d64dh d64;
+  } dir;
+} dh_t;
+
+/* This enum must match the struct param_s below! */
+typedef enum { DIR_TRACK = 0, DIR_START_SECTOR,
+               LAST_TRACK, LABEL_OFFSET, ID_OFFSET,
+               FILE_INTERLEAVE, DIR_INTERLEAVE } param_t;
+
+/**
+ * struct param_s - Dxx image file parameters
+ * @dir_track       : track of the (current) directory
+ * @dir_start_sector: first sector of the directory on dir_track
+ * @last_track      : highest valid track number
+ * @label_offset    : byte offset of the disk label from the beginning of dir_track/0
+ * @id_offset       : as label_offset, for the disk ID
+ * @file_interleave : interleave factor for file sectors
+ * @dir_interleave  : interleave factor for directory sectors
+ *
+ * This structure holds those parameters that differ between various Dxx
+ * disk images and which could be abstracted out easily.
+ */
+struct param_s {
+  uint8_t dir_track;
+  uint8_t dir_start_sector;
+  uint8_t last_track;
+  uint8_t label_offset;
+  uint8_t id_offset;
+  uint8_t file_interleave;
+  uint8_t dir_interleave;
+};
+
+/**
+ * struct partition_t - per-partition data
+ * @fatfs      : FatFs per-drive/partition structure
+ * @current_dir: current directory on FAT as seen by sd2iec
+ * @fop        : pointer to the fileops structure for this partition
+ * @imagehandle: file handle of a mounted image file on this partition
+ * @imagetype  : disk image type mounted on this partition
+ * @d64data    : extended information about a mounted Dxx image
+ *
+ * This data structure holds per-partition data.
+ */
+typedef struct partition_s {
+  FATFS                  fatfs;
+  dir_t                  current_dir;
+  const struct fileops_s *fop;
+  FIL                    imagehandle;
+  uint8_t                imagetype;
+  struct param_s         d64data;
+} partition_t;
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/diskchange.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/diskchange.c
new file mode 100644
index 00000000..244241d0
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/diskchange.c
@@ -0,0 +1,248 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   diskchange.c: Disk image changer
+
+*/
+
+#include <avr/io.h>
+#include <avr/pgmspace.h>
+#include <string.h>
+#include "config.h"
+#include "buffers.h"
+#include "display.h"
+#include "doscmd.h"
+#include "errormsg.h"
+#include "fatops.h"
+#include "flags.h"
+#include "ff.h"
+#include "led.h"
+#include "parser.h"
+#include "timer.h"
+#include "ustring.h"
+#include "diskchange.h"
+
+static const char PROGMEM autoswap_name[] = "AUTOSWAP.LST";
+
+static FIL     swaplist;
+static path_t  swappath;
+static uint8_t linenum;
+
+#define BLINK_BACKWARD 1
+#define BLINK_FORWARD  2
+#define BLINK_HOME     3
+
+static void confirm_blink(uint8_t type) {
+  uint8_t i;
+
+  for (i=0;i<2;i++) {
+    tick_t targettime;
+
+#ifdef SINGLE_LED
+    DIRTY_LED_ON();
+#else
+    if (!i || type & 1)
+      DIRTY_LED_ON();
+    if (!i || type & 2)
+      BUSY_LED_ON();
+#endif
+    targettime = ticks + MS_TO_TICKS(100);
+    while (time_before(ticks,targettime)) ;
+
+    DIRTY_LED_OFF();
+    BUSY_LED_OFF();
+    targettime = ticks + MS_TO_TICKS(100);
+    while (time_before(ticks,targettime)) ;
+  }
+}
+
+static uint8_t mount_line(void) {
+  FRESULT res;
+  UINT bytesread;
+  uint8_t i,*str,*strend;
+  uint16_t curpos;
+
+  uint8_t olderror = current_error;
+  current_error = ERROR_OK;
+
+  /* Kill all buffers */
+  free_multiple_buffers(FMB_USER_CLEAN);
+
+  curpos = 0;
+  strend = NULL;
+
+  for (i=0;i<=linenum;i++) {
+    str = command_buffer;
+
+    res = f_lseek(&swaplist,curpos);
+    if (res != FR_OK) {
+      parse_error(res,1);
+      return 0;
+    }
+
+    res = f_read(&swaplist, str, CONFIG_COMMAND_BUFFER_SIZE, &bytesread);
+    if (res != FR_OK) {
+      parse_error(res,1);
+      return 0;
+    }
+
+    /* Terminate string in buffer */
+    if (bytesread < CONFIG_COMMAND_BUFFER_SIZE)
+      str[bytesread] = 0;
+
+    if (bytesread == 0) {
+      if (linenum == 255) {
+        /* Last entry requested, found it */
+        linenum = i-1;
+      } else {
+        /* End of file - restart loop to read the first entry */
+        linenum = 0;
+      }
+      i = -1; /* I could've used goto instead... */
+      curpos = 0;
+      continue;
+    }
+
+    /* Skip name */
+    while (*str != '\r' && *str != '\n') str++;
+
+    strend = str;
+
+    /* Skip line terminator */
+    while (*str == '\r' || *str == '\n') str++;
+
+    curpos += str - command_buffer;
+  }
+
+  /* Terminate file name */
+  *strend = 0;
+
+  if (partition[swappath.part].fop != &fatops)
+    image_unmount(swappath.part);
+
+  /* Parse the path */
+  path_t path;
+
+  /* Start in the partition+directory of the swap list */
+  current_part = swappath.part;
+  display_current_part(current_part);
+  partition[current_part].current_dir = swappath.dir;
+
+  if (parse_path(command_buffer, &path, &str, 0)) {
+    current_error = olderror;
+    return 0;
+  }
+
+  /* Mount the disk image */
+  cbmdirent_t dent;
+
+  if (!first_match(&path, str, FLAG_HIDDEN, &dent)) {
+    chdir(&path, &dent);
+    update_current_dir(&path);
+  }
+
+  if (current_error != 0 && current_error != ERROR_DOSVERSION) {
+    current_error = olderror;
+    return 0;
+  }
+
+  return 1;
+}
+
+void set_changelist(path_t *path, uint8_t *filename) {
+  FRESULT res;
+
+  /* Assume this isn't the auto-swap list */
+  globalflags &= (uint8_t)~AUTOSWAP_ACTIVE;
+
+  /* Remove the old swaplist */
+  if (swaplist.fs != NULL) {
+    f_close(&swaplist);
+    memset(&swaplist,0,sizeof(swaplist));
+  }
+
+  if (ustrlen(filename) == 0)
+    return;
+
+  /* Open a new swaplist */
+  partition[path->part].fatfs.curr_dir = path->dir.fat;
+  res = f_open(&partition[path->part].fatfs, &swaplist, filename, FA_READ | FA_OPEN_EXISTING);
+  if (res != FR_OK) {
+    parse_error(res,1);
+    return;
+  }
+
+  /* Remember its directory so relative paths work */
+  swappath = *path;
+
+  linenum = 0;
+  if (mount_line())
+    confirm_blink(BLINK_HOME);
+}
+
+
+void change_disk(void) {
+  path_t path;
+
+  if (swaplist.fs == NULL) {
+    /* No swaplist active, try using AUTOSWAP.LST */
+    /* change_disk is called from the IEC idle loop, so entrybuf is free */
+    reset_key(0xff); // <- lazy
+    ustrcpy_P(entrybuf, autoswap_name);
+    path.dir  = partition[current_part].current_dir;
+    path.part = current_part;
+    set_changelist(&path, entrybuf);
+    if (swaplist.fs == NULL) {
+      /* No swap list found, clear error and exit */
+      set_error(ERROR_OK);
+      return;
+    } else {
+      /* Autoswaplist found, mark it as active                */
+      /* and exit because the first image is already mounted. */
+      globalflags |= AUTOSWAP_ACTIVE;
+      return;
+    }
+  }
+
+  /* Mount the next image in the list */
+  if (key_pressed(KEY_NEXT)) {
+    linenum++;
+    reset_key(KEY_NEXT);
+    if (mount_line())
+      confirm_blink(BLINK_FORWARD);
+  } else if (key_pressed(KEY_PREV)) {
+    linenum--;
+    reset_key(KEY_PREV);
+    if (mount_line())
+      confirm_blink(BLINK_BACKWARD);
+  } else if (key_pressed(KEY_HOME)) {
+    linenum = 0;
+    reset_key(KEY_HOME);
+    if (mount_line())
+      confirm_blink(BLINK_HOME);
+  }
+}
+
+void change_init(void) {
+  memset(&swaplist,0,sizeof(swaplist));
+  globalflags &= (uint8_t)~AUTOSWAP_ACTIVE;
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/diskchange.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/diskchange.h
new file mode 100644
index 00000000..059937b3
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/diskchange.h
@@ -0,0 +1,36 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   diskchange.h: Disk image changer
+
+*/
+
+#ifndef DISKCHANGE_H
+#define DISKCHANGE_H
+
+#include "dirent.h"
+
+void change_init(void);
+void change_disk(void);
+void set_changelist(path_t *path, uint8_t *filename);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/diskio.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/diskio.c
new file mode 100644
index 00000000..dbaed2ec
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/diskio.c
@@ -0,0 +1,199 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   diskio.c: Generic disk access routines and supporting stuff
+
+*/
+
+#include "config.h"
+#include "diskio.h"
+#include "ata.h"
+#include "dataflash.h"
+#include "sdcard.h"
+
+volatile enum diskstates disk_state;
+
+#ifdef NEED_DISKMUX
+
+uint32_t drive_config;
+
+/* This function calculates the default drive configuration. */
+/* Its result is static after compilation, but doing this in */
+/* C in less messy than doing it with the preprocessor.      */
+uint32_t get_default_driveconfig(void) {
+  uint32_t result = 0xffffffffL;
+
+  /* Order matters: Whatever is checked first will be last in the config */
+#ifdef HAVE_DF
+  result = (result << 4) + (DISK_TYPE_DF  << DRIVE_BITS) + 0;
+#endif
+#ifdef CONFIG_TWINSD
+  result = (result << 4) + (DISK_TYPE_SD  << DRIVE_BITS) + 1;
+#endif
+#ifdef HAVE_SD
+  result = (result << 4) + (DISK_TYPE_SD  << DRIVE_BITS) + 0;
+#endif
+#ifdef HAVE_ATA
+  result = (result << 4) + (DISK_TYPE_ATA << DRIVE_BITS) + 0;
+#endif
+  return result;
+}
+
+void disk_init(void) {
+#ifdef HAVE_SD
+  sd_init();
+#endif
+#ifdef HAVE_ATA
+  ata_init();
+#endif
+#ifdef HAVE_DF
+  df_init();
+#endif
+}
+
+DSTATUS disk_status(BYTE drv) {
+  switch(drv >> DRIVE_BITS) {
+#ifdef HAVE_DF
+  case DISK_TYPE_DF:
+    return df_status(drv & DRIVE_MASK);
+#endif
+
+#ifdef HAVE_ATA
+  case DISK_TYPE_ATA:
+    return ata_status(drv & DRIVE_MASK);
+
+  case DISK_TYPE_ATA2:
+    return ata_status((drv & DRIVE_MASK) + 2);
+#endif
+
+#ifdef HAVE_SD
+  case DISK_TYPE_SD:
+    return sd_status(drv & DRIVE_MASK);
+#endif
+
+  default:
+    return STA_NOINIT|STA_NODISK;
+  }
+}
+
+DSTATUS disk_initialize(BYTE drv) {
+  switch(drv >> DRIVE_BITS) {
+#ifdef HAVE_DF
+  case DISK_TYPE_DF:
+    return df_initialize(drv & DRIVE_MASK);
+#endif
+
+#ifdef HAVE_ATA
+  case DISK_TYPE_ATA:
+    return ata_initialize(drv & DRIVE_MASK);
+
+  case DISK_TYPE_ATA2:
+    return ata_initialize((drv & DRIVE_MASK) + 2);
+#endif
+
+#ifdef HAVE_SD
+  case DISK_TYPE_SD:
+    return sd_initialize(drv & DRIVE_MASK);
+#endif
+
+  default:
+    return STA_NOINIT|STA_NODISK;
+  }
+}
+
+DRESULT disk_read(BYTE drv, BYTE *buffer, DWORD sector, BYTE count) {
+  switch(drv >> DRIVE_BITS) {
+#ifdef HAVE_DF
+  case DISK_TYPE_DF:
+    return df_read(drv & DRIVE_MASK,buffer,sector,count);
+#endif
+
+#ifdef HAVE_ATA
+  case DISK_TYPE_ATA:
+    return ata_read(drv & DRIVE_MASK,buffer,sector,count);
+
+  case DISK_TYPE_ATA2:
+    return ata_read((drv & DRIVE_MASK) + 2,buffer,sector,count);
+#endif
+
+#ifdef HAVE_SD
+  case DISK_TYPE_SD:
+    return sd_read(drv & DRIVE_MASK,buffer,sector,count);
+#endif
+
+  default:
+    return RES_ERROR;
+  }
+}
+
+DRESULT disk_write(BYTE drv, const BYTE *buffer, DWORD sector, BYTE count) {
+  switch(drv >> DRIVE_BITS) {
+#ifdef HAVE_DF
+  case DISK_TYPE_DF:
+    return df_write(drv & DRIVE_MASK,buffer,sector,count);
+#endif
+
+#ifdef HAVE_ATA
+  case DISK_TYPE_ATA:
+    return ata_write(drv & DRIVE_MASK,buffer,sector,count);
+
+  case DISK_TYPE_ATA2:
+    return ata_write((drv & DRIVE_MASK) + 2,buffer,sector,count);
+#endif
+
+#ifdef HAVE_SD
+  case DISK_TYPE_SD:
+    return sd_write(drv & DRIVE_MASK,buffer,sector,count);
+#endif
+
+  default:
+    return RES_ERROR;
+  }
+}
+
+DRESULT disk_getinfo(BYTE drv, BYTE page, void *buffer) {
+  switch(drv >> DRIVE_BITS) {
+#ifdef HAVE_DF
+  case DISK_TYPE_DF:
+    return df_getinfo(drv & DRIVE_MASK,page,buffer);
+#endif
+
+#ifdef HAVE_ATA
+  case DISK_TYPE_ATA:
+    return ata_getinfo(drv & DRIVE_MASK,page,buffer);
+
+  case DISK_TYPE_ATA2:
+    return ata_getinfo((drv & DRIVE_MASK) + 2,page,buffer);
+#endif
+
+#ifdef HAVE_SD
+  case DISK_TYPE_SD:
+    return sd_getinfo(drv & DRIVE_MASK,page,buffer);
+#endif
+
+  default:
+    return RES_ERROR;
+  }
+}
+
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/diskio.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/diskio.h
new file mode 100644
index 00000000..273c13c4
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/diskio.h
@@ -0,0 +1,125 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   diskio.h: Definitions for the disk access routines
+
+   Based on diskio.h from FatFS by ChaN, see ff.c for
+   for full copyright details.
+
+*/
+
+#ifndef DISKIO_H
+#define DISKIO_H
+
+#include "integer.h"
+
+/* Status of Disk Functions */
+typedef BYTE    DSTATUS;
+
+/* Disk Status Bits (DSTATUS) */
+#define STA_NOINIT              0x01    /* Drive not initialized */
+#define STA_NODISK              0x02    /* No medium in the drive */
+#define STA_PROTECT             0x04    /* Write protected */
+
+/* Results of Disk Functions */
+typedef enum {
+        RES_OK = 0,             /* 0: Successful */
+        RES_ERROR,              /* 1: R/W Error */
+        RES_WRPRT,              /* 2: Write Protected */
+        RES_NOTRDY,             /* 3: Not Ready */
+        RES_PARERR              /* 4: Invalid Parameter */
+} DRESULT;
+
+/**
+ * struct diskinfo0_t - disk info data structure for page 0
+ * @validbytes : Number of valid bytes in this struct
+ * @maxpage    : Highest diskinfo page supported
+ * @disktype   : type of the disk (DISK_TYPE_* values)
+ * @sectorsize : sector size divided by 256
+ * @sectorcount: number of sectors on the disk
+ *
+ * This is the struct returned in the data buffer when disk_getinfo
+ * is called with page=0.
+ */
+typedef struct {
+  uint8_t  validbytes;
+  uint8_t  maxpage;
+  uint8_t  disktype;
+  uint8_t  sectorsize;   /* divided by 256 */
+  uint32_t sectorcount;  /* 2 TB should be enough... (512 byte sectors) */
+} diskinfo0_t;
+
+/*---------------------------------------*/
+/* Prototypes for disk control functions */
+
+DSTATUS disk_initialize (BYTE);
+DSTATUS disk_status (BYTE);
+DRESULT disk_read (BYTE, BYTE*, DWORD, BYTE);
+DRESULT disk_write (BYTE, const BYTE*, DWORD, BYTE);
+#define disk_ioctl(a,b,c) RES_OK
+DRESULT disk_getinfo(BYTE drv, BYTE page, void *buffer);
+
+void disk_init(void);
+
+/* Will be set to DISK_ERROR if any access on the card fails */
+enum diskstates { DISK_CHANGED = 0, DISK_REMOVED, DISK_OK, DISK_ERROR };
+
+extern volatile enum diskstates disk_state;
+
+/* Disk type - part of the external API except for ATA2! */
+#define DISK_TYPE_ATA        0
+#define DISK_TYPE_ATA2       1
+#define DISK_TYPE_SD         2
+#define DISK_TYPE_DF         3
+#define DISK_TYPE_NONE       7
+
+#ifdef NEED_DISKMUX
+
+/* Disk mux configuration */
+
+extern uint32_t drive_config;
+
+uint32_t get_default_driveconfig(void);
+
+#  define set_map_drive(drv,val) (drive_config = \
+      (drive_config & (0xffffffff - (0x0f << (drv * 4)))) \
+                    | (val << (drv * 4)))
+#  define map_drive(drv) ((drive_config >> (4 * drv)) & 0x0f)
+#  define set_drive_config(config)  drive_config = config
+
+/* Number of bits used for the drive, the disk type */
+/* uses the remainder (4 bits per entry).           */
+#  define DRIVE_BITS           1
+
+/* Calculate mask from the shift value */
+#  define DRIVE_MASK           ((1 << DRIVE_BITS)-1)
+
+#else // NEED_DISKMUX
+
+#  define set_map_drive(drv,val) do {} while(0)
+#  define map_drive(drv) (drv)
+#  define set_drive_config(conf) do {} while(0)
+#  define get_default_driveconfig() 0
+
+#endif // NEED_DISKMUX
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/display.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/display.c
new file mode 100644
index 00000000..838999a2
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/display.c
@@ -0,0 +1,256 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   display.c: Remote display interface
+
+*/
+
+#include <avr/pgmspace.h>
+#include <string.h>
+#include "config.h"
+#include "buffers.h"
+#include "eeprom.h"
+#include "fatops.h"
+#include "i2c.h"
+#include "iec.h"
+#include "parser.h"
+#include "ustring.h"
+#include "utils.h"
+#include "display.h"
+
+#include "uart.h"
+
+/* All menu entries are converted from PETSCII on the display side */
+static const PROGMEM char systemmenu[] = {
+  "\xc3""HANGE DIRECTORY\0"
+  "\xc3""HANGE ADDRESS\0"
+  "\xd3""TORE SETTINGS\0"
+  "\xc3""ANCEL\0"
+};
+#define SYSMENU_CHDIR  0
+#define SYSMENU_CHADDR 1
+#define SYSMENU_STORE  2
+#define SYSMENU_CANCEL 3
+
+static enum { MENU_NONE = 0, MENU_SYSTEM, MENU_CHDIR, MENU_CHADDR } menustate;
+
+static uint8_t displaybuffer[CONFIG_DISPLAY_BUFFER_SIZE];
+
+uint8_t display_found;
+
+void display_send_prefixed(uint8_t cmd, uint8_t prefixbyte, uint8_t len, const uint8_t *buffer) {
+  displaybuffer[0] = prefixbyte;
+  memcpy(displaybuffer+1, buffer, min(sizeof(displaybuffer)-1, len));
+  i2c_write_registers(DISPLAY_I2C_ADDR, cmd, min(len+1,sizeof(displaybuffer)), displaybuffer);
+}
+
+static void menu_chdir(void) {
+  cbmdirent_t dent;
+  dh_t    dh;
+  path_t  path;
+  int8_t  res;
+
+  menustate = MENU_CHDIR;
+  display_menu_reset();
+  ustrcpy_P(displaybuffer,PSTR("\xc3""ANCEL"));
+  display_menu_add(displaybuffer);
+
+  displaybuffer[0] = '_';
+  displaybuffer[1] = 0;
+  display_menu_add(displaybuffer);
+
+  path.part = current_part;
+  path.dir  = partition[current_part].current_dir;
+
+  if (opendir(&dh, &path)) {
+    menustate = MENU_NONE;
+    return;
+  }
+
+  while (1) {
+    res = readdir(&dh, &dent);
+
+    if (res > 0)
+      return;
+    if (res < 0)
+      break;
+
+    /* Skip hidden files and only add image files on FAT */
+    if (!(dent.typeflags & FLAG_HIDDEN)) {
+      if ((dent.typeflags & TYPE_MASK) == TYPE_DIR) {
+        display_menu_add(dent.name);
+      } else if (dent.opstype == OPSTYPE_FAT &&
+                 check_imageext(dent.pvt.fat.realname) != IMG_UNKNOWN) {
+        display_menu_add(dent.name);
+      }
+    }
+  }
+  display_menu_show(0);
+}
+
+static void menu_chaddr(void) {
+  uint8_t i;
+
+  menustate = MENU_CHADDR;
+  memset(displaybuffer,0,3);
+  display_menu_reset();
+  for (i=4;i<31;i++) {
+    if (i < 10)
+      displaybuffer[0] = ' ';
+    else
+      displaybuffer[0] = '0' + i/10;
+    displaybuffer[1] = '0' + i%10;
+    display_menu_add(displaybuffer);
+  }
+  display_menu_show(device_address-4);
+}
+
+void display_service(void) {
+  if (menustate == MENU_NONE) {
+    /* No menu active, upload+run system menu */
+    uint8_t i;
+
+    /* Dummy read to reset the interrupt line */
+    i2c_read_register(DISPLAY_I2C_ADDR, DISPLAY_MENU_GETSELECTION);
+
+    display_menu_reset();
+    i = 0;
+    while (pgm_read_byte(systemmenu+i)) {
+      ustrcpy_P(displaybuffer, systemmenu+i);
+      display_menu_add(displaybuffer);
+      i += ustrlen(displaybuffer)+1;
+    }
+    display_menu_show(0);
+    menustate = MENU_SYSTEM;
+
+  } else if (menustate == MENU_SYSTEM) {
+    /* Selection on the system menu */
+    uint8_t sel = i2c_read_register(DISPLAY_I2C_ADDR, DISPLAY_MENU_GETSELECTION);
+
+    switch (sel) {
+    case SYSMENU_CHDIR:
+      menu_chdir();
+      break;
+
+    case SYSMENU_CHADDR:
+      menu_chaddr();
+      break;
+
+    case SYSMENU_STORE:
+      menustate = MENU_NONE;
+      write_configuration();
+      break;
+
+    case SYSMENU_CANCEL:
+      menustate = MENU_NONE;
+      return;
+    }
+  } else if (menustate == MENU_CHADDR) {
+    /* New address selected */
+    uint8_t sel = i2c_read_register(DISPLAY_I2C_ADDR, DISPLAY_MENU_GETSELECTION);
+
+    device_address = sel+4;
+    menustate = MENU_NONE;
+    display_address(device_address);
+  } else if (menustate == MENU_CHDIR) {
+    /* New directory selected */
+    uint8_t sel = i2c_read_register(DISPLAY_I2C_ADDR, DISPLAY_MENU_GETSELECTION);
+    path_t path;
+    cbmdirent_t dent;
+
+    menustate = MENU_NONE;
+    if (sel == 0)
+      /* Cancel */
+      return;
+
+    /* Read directory name into displaybuffer */
+    path.part = current_part;
+    path.dir  = partition[current_part].current_dir;
+
+    if (sel == 1) {
+      /* Previous directory */
+      dent.name[0] = '_';
+      dent.name[1] = 0;
+    } else {
+      i2c_read_registers(DISPLAY_I2C_ADDR, DISPLAY_MENU_GETENTRY, sizeof(displaybuffer), displaybuffer);
+
+      if (first_match(&path, displaybuffer, FLAG_HIDDEN, &dent))
+        return;
+    }
+
+    chdir(&path, &dent);
+    update_current_dir(&path);
+  }
+}
+
+
+void display_send_cmd(uint8_t cmd, uint8_t len, const void *buf) {
+  if (display_found)
+    /* repeat until successful - the display may be busy */
+    while (i2c_write_registers(DISPLAY_I2C_ADDR, cmd, len, buf)) ;
+}
+
+
+void display_send_cmd_byte(uint8_t cmd, uint8_t val) {
+  display_send_cmd(cmd, 1, &val);
+}
+
+
+uint8_t display_init(uint8_t len, uint8_t *message) {
+  display_found = !i2c_write_registers(DISPLAY_I2C_ADDR, DISPLAY_INIT, len, message);
+  return display_found;
+}
+
+
+void display_filename_write(uint8_t part, uint8_t len, const unsigned char *buf) {
+  display_send_prefixed(DISPLAY_FILENAME_WRITE, part, len, buf);
+}
+
+void display_menu_show(uint8_t start) {
+  display_send_cmd_byte(DISPLAY_MENU_SHOW, start);
+}
+
+
+void display_address(uint8_t dev) {
+  display_send_cmd_byte(DISPLAY_ADDRESS, dev);
+}
+
+
+void display_current_part(uint8_t part) {
+  display_send_cmd_byte(DISPLAY_CURRENT_PART, part);
+}
+
+
+void display_menu_add(const unsigned char *string) {
+  display_send_cmd(DISPLAY_MENU_ADD, strlen((const char*) string) + 1, string);
+}
+
+
+void display_menu_reset(void) {
+  display_send_cmd(DISPLAY_MENU_RESET, 0, NULL);
+}
+
+
+void display_current_directory(uint8_t part, const unsigned char *name) {
+  display_send_prefixed(DISPLAY_CURRENT_DIR, part, ustrlen(name), name);
+}
+
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/display.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/display.h
new file mode 100644
index 00000000..de01e26f
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/display.h
@@ -0,0 +1,92 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   display.h: Remote display interface
+
+*/
+
+#ifndef DISPLAY_H
+#define DISPLAY_H
+
+#ifdef CONFIG_REMOTE_DISPLAY
+
+extern uint8_t display_found;
+
+#include "i2c.h"
+
+void display_send_prefixed(uint8_t cmd, uint8_t prefixbyte, uint8_t len, const uint8_t *buffer);
+uint8_t display_init(uint8_t len, uint8_t *message);
+void display_service(void);
+void display_send_cmd(uint8_t cmd, uint8_t len, const void *buf);
+void display_send_cmd_byte(uint8_t cmd, uint8_t val);
+
+void display_filename_write(uint8_t part, uint8_t len, const unsigned char* buf);
+void display_menu_show(uint8_t start);
+void display_address(uint8_t dev);
+void display_current_part(uint8_t part);
+void display_menu_add(const unsigned char* string);
+void display_menu_reset(void);
+void display_current_directory(uint8_t part, const unsigned char* name);
+
+#else // CONFIG_REMOTE_DISPLAY
+
+# define display_found 0
+# define display_send_prefixed(a,b,c,d) do { } while (0)
+# define display_init(a,b)              0
+# define display_service()              do {} while (0)
+# define display_send_cmd(cmd,len,buf)  do {} while (0)
+# define display_send_cmd_byte(cmd,v)   do {} while (0)
+
+# define display_filename_write(a,b,c)  do {} while (0)
+# define display_menu_show(a)           do {} while (0)
+# define display_address(a)             do {} while (0)
+# define display_current_part(a)        do {} while (0)
+# define display_menu_add(a)            do {} while (0)
+# define display_menu_reset()           do {} while (0)
+# define display_current_directory(a,b) do {} while (0)
+
+#endif // CONFIG_REMOTE_DISPLAY
+
+#define DISPLAY_I2C_ADDR 0x64
+
+// Note: All partitions are 0-based internal partiton numbers!
+enum display_commands {
+  DISPLAY_INIT = 0,          // PETSCII version string
+  DISPLAY_ADDRESS,           // uint8_t device address
+  DISPLAY_FILENAME_READ,     // uint8_t part, PETSCII file name
+  DISPLAY_FILENAME_WRITE,    // uint8_t part, PETSCII file name
+  DISPLAY_DOSCOMMAND,        // PETSCII command string
+  DISPLAY_ERRORCHANNEL,      // PETSCII error channel message
+  DISPLAY_CURRENT_DIR,       // uint8_t part, PETSCII directory name
+  DISPLAY_CURRENT_PART,      // uint8_t part
+  DISPLAY_MENU_RESET = 0x40, // -
+  DISPLAY_MENU_ADD,          // zero-terminated PETSCII string
+  DISPLAY_MENU_SHOW,         // uint8_t startentry
+  DISPLAY_MENU_GETSELECTION, // returns the number of the selected menu entry
+  DISPLAY_MENU_GETENTRY,     // returns the text of the selected menu entry
+};
+
+#define display_filename_read(part,len,buf)     display_send_prefixed(DISPLAY_FILENAME_READ,part,len,buf)
+#define display_doscommand(len,buf)             display_send_cmd(DISPLAY_DOSCOMMAND,len,buf)
+#define display_errorchannel(len,buf)           display_send_cmd(DISPLAY_ERRORCHANNEL,len,buf)
+
+#endif // DISPLAY_H
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/actionreplay.txt b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/actionreplay.txt
new file mode 100644
index 00000000..2e3053b4
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/actionreplay.txt
@@ -0,0 +1,82 @@
+Action Replay fast loader/saver protocols
+=========================================
+
+Documented by Ingo Korb
+
+Note 1: This document is currently incomplete, many of the loaders
+supported by the AR6 are missing.
+
+Note 2: The contents of this document have been tested only on a PAL
+system, because the author currently has no NTSC Action Replay
+cartridge.
+
+Note 3: An Action Replay 6 cartridge has been used as reference, other
+versions may or may not use different fast loaders.
+
+1541 fastloader
+---------------
+The default 1541 fast loader is a track loader that does the file name
+matching on the C64 instead of the drive. It has not been further
+analyzed due to this limitation.
+
+1581 fastloader
+---------------
+The 1581 fastloader opens the target file on secondary address 0 to
+read the start address. When the loader is uploaded, it will pull the
+clock line low and the data line high to signal that it's currently
+busy processing. It is recommended to add a short delay (one
+millisecond is sufficient) at this point because the C64 will miss the
+drive becoming ready if the time between M-E and the first byte
+transmission is too short.
+
+Bytes are transmitted according to this timing, synchronized by the
+low-to-high transision of the data line initated by the C64:
+
+   Time  Clock Data
+   ----------------
+    0us    1   0->1 (timing reference)
+    5us    b0   b1
+   13us    b2   b3
+   21us    b4   b5
+   29us    b6   b7
+ 37.5us    0    1
+
+Each sector of the file is transferred by sending the number of valid
+bytes in the current sector (i.e. 254 for a full sector or the second
+byte minus one for the last one on a D64-style disk) followed by the
+data bytes of the sector in forward order.
+
+After transmitting the last sector a single byte with value 0 is sent
+to the computer to mark the end of the transmission. There is no way
+to signal read errors to the computer. The computer will send a
+command to close the file itself.
+
+1581 fastsaver
+--------------
+Note: This fastsaver is known to use different timing on PAL and NTSC.
+
+The 1581 fastsaver opens the target file on secondary address 1 for
+writing. When the loader is uploaded, it will pull the clock line low
+and the data line high. The original code waits approximately 800
+microseonds at this point.
+
+For every sector of the file (254 bytes of data), 256(!) bytes are
+received in forward order. The first two bytes of this data block are
+not part of file contents. If the first byte is non-zero, more sectors
+will follow. If the first byte is zero, the second byte is the offset
+in the received data buffer (including the two initial bytes) of the
+first byte that is not part of the file anymore (0 if everything is
+part of the file).
+
+The timing for receiving a single byte in the PAL version is:
+
+   Time  Clock Data
+   ----------------
+  setup    1    1   (set lines high on the drive side)
+    0us    1   0->1 (wait for change, not level! - timing reference)
+   12us   !b7  !b5
+   22us   !b6  !b4
+   38us   !b3  !b1
+   48us   !b2  !b0
+   53us    0    1   (set by drive)
+
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/buffers.txt b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/buffers.txt
new file mode 100644
index 00000000..932a229d
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/buffers.txt
@@ -0,0 +1,54 @@
+Notes on buffer_t and its use
+-----------------------------
+
+buffer_t is the struct holding all information for the dynamically allocated
+buffers in sd2iec. Usually they are associated with a secondary address,
+but they can also be used for internal purposes, e.g. to read the file
+names in a swaplist or to store the BAM of a mounted disk image.
+
+If you allocate a temporary buffer or do an early return from a function
+that has allocated a buffer for some purpose you do not need to do
+anything - every buffer returned from alloc_buffer or alloc_system_buffer
+is maked as "not sticky" which means that it will get freed without calling
+the cleanup function at the end of the IEC mainloop.
+
+If you do need a buffer that should stay around for longer than that
+(e.g. for a buffer associated with a file), call stick_buffer(buffer_t *)
+on it. After doing this you need to make sure that free_buffer(buffer_t *)
+is called on the buffer when it isn't needed anymore.
+
+Another independent distinction in buffer types is system buffers vs.
+user buffers. alloc_system_buffer will return a buffer with the secondary
+field set to BUFFER_SEC_SYSTEM while alloc_buffer returns a buffer
+with the secondary field set to 0. This difference is used when updating
+the device LEDs - the number of allocated user buffers is tracked in
+active_buffers and the BUSY LED will be turned on by alloc_buffer
+and off by free_buffer as long as at least one user buffer is allocated.
+Similiar to that the DIRTY LED is controlled by mark_write_buffer and
+free_buffer - please do not call mark_write_buffer on a system buffer.
+
+free_multiple_buffers takes a flag parameter which specifies which buffer(s)
+should be freed. It is a bit field with the following base values:
+ - FMB_CLEAN
+     Call the cleanup callback before freeing the buffer. If this is
+     specified, the return value of free_multiple_buffers will be 1 if
+     any of the called cleanup functions returned a non-zero value
+     or 0 otherwise.
+ - FMB_FREE_STICKY
+     Free sticky buffers too (will free only not-sticky buffers otherwise)
+ - FMB_FREE_SYSTEM
+     Free system buffers too (will free only non-system buffers otherwise)
+
+For convenience there are a few macros for common use cases:
+ - FMB_ALL
+     free all buffers, no cleanups
+ - FMB_ALL_CLEAN
+     free all buffers and call their cleanup functions
+ - FMB_USER
+     free all non-system buffers, no cleanups
+ - FMB_USER_CLEAN
+     free all non-system buffers and call their cleanup functions
+ - FMB_UNSTICKY
+     free all non-sticky buffers, no cleanups
+ - FMB_UNSTICKY_CLEAN
+     free all non-sticky buffers and call their cleanup functions
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/dreamload.txt b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/dreamload.txt
new file mode 100644
index 00000000..6667e7a5
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/dreamload.txt
@@ -0,0 +1,141 @@
+The DreamLoad Fast Loader Protocol
+==================================
+
+analysed by Thomas Giesel
+
+This document describes the fast loader protocol implemented in DreamLoad. The
+description may not be accurate in any point.
+
+DreamLoad is a two bit IRQ fast loader. This means that the timing of the C64
+(host) may be deferred by IRQs at any time. The timing is given by the host,
+so the drive code must be always listening. The only exception is after the
+host sent a command to load a sector to the drive. Then the host starts the
+protocol after having seen the first two bits (always 0) on the bus.
+
+All the directory and sector chain stuff is done by the host.
+
+DRIVE DETECTION
+===============
+
+DreamLoad reads out some bytes from the drive memory using "m-r" to detect the
+drive type. To find a 1541 it expects following values:
+
+0xfea0: 0x0d
+0xe5c6: 0x34 0xb1
+
+Then it uploads the initial loader using "m-w".
+
+INITIAL LOADER
+==============
+
+The first part of code uploaded by the host into the drive is a short program
+which has the task to download the final drive code using the send protocol
+described below. The initial loader contains the length of the final drive
+code. It's a simple loop which receives 1024 bytes from the host, stores them
+into the drive RAM and starts the final drive code.
+
+BYTE TO DRIVE PROTOCOL
+======================
+
+This protocol is used by the host to send the final drive code and in newer
+versions of DreamLoad also to send commands to the drive.
+
+The ATN line is not used for this transfer.
+
+The drive has to wait for CLOCK to become low. A short time later it reads
+bit 7 from DATA (low = 1). After the next CLOCK high bit 6 is read from DATA
+This procedure is repeated 4 times to read all 8 bits.
+
+Note that the host write CLOCK and DATA at once, nevertheless the drive must
+read them in two steps to avoid race conditions cause by the ramp times.
+
+OLD BYTE TO DRIVE PROTOCOL
+==========================
+
+Older implementations of DreamLoad us a different protocol for the command
+bytes.
+
+The drive waits for ATN low, then it reads bit 5 from DATA and 7 from CLOCK.
+After the next ATN high bit 4 follows on DATA and bit 6 on CLOCK.
+This is repeated for bits 1, 3, 0, 2.
+
+BYTE TO HOST PROTOCOL
+=====================
+
+This protocol is used to send bytes from the drive to the host.
+
+Bit 0 of each byte is sent on CLOCK, bit 1 on DATA. High level means 1. This
+bit pair is acknowledged by the host by pulling ATN down. Directly after this
+ack the drive must put the next two bytes on CLOCK and DATA, the will be ack'd
+with a high level on ATN. The rest of the byte follow in the same manner.
+
+If there there are no additional bytes to be transfered, the drive releases
+DATA and CLOCK to high.
+
+BLOCK TO HOST PROTOCOL
+======================
+
+The first byte is a status code. If it is 0 a block of 256 bytes will follow.
+As the host waits for DATA to become low before receiving this byte, bit 1 must
+always be zero in this byte.
+
+Is the value is not 0, it is an error indication. No additional bytes follow in
+this case. The C64 code returns an error flag to the application in this case.
+
+After a block a checksum follows. All bytes of the block are EORed beginning
+with 0, the result is transfered as checksum.
+
+DREAMLOAD VARIANTS
+==================
+
+This is a list of DreamLoad version at the programs they were found in.
+EORing all bytes of the final code gives the version code used below.
+The versions 0xac and 0xdc use the old byte protocol.
+
+Checksum 0x48:
+Cauldron by Exceed, Resource, The Dreams (2008)
+http://noname.c64.org/csdb/release/?id=64204
+state: works
+
+8-bit Garden by Digital Sounds System (2008)
+http://noname.c64.org/csdb/release/?id=64142
+state: works
+
+Breakpoint 2008 Invitation by Resource, The Dreams (2008)
+http://noname.c64.org/csdb/release/?id=62891
+state: works
+
+Checksum 0xac:
+Perfect Pixels by Chorus (2007)
+http://noname.c64.org/csdb/release/?id=59862
+state: works
+
+69 positions 100% by Vulture Design (2006)
+http://noname.c64.org/csdb/release/?id=45031
+state: works, including disk change
+
+Deep 90% by Chorus (2006)
+http://noname.c64.org/csdb/release/?id=36852
+state: works
+
+The True Story About Knoops by The Dreams (2003)
+http://noname.c64.org/csdb/release/?id=9748
+state: works
+
+Flut by K2 (2004)
+http://noname.c64.org/csdb/release/?id=12744
+state: works, including disk change
+
+Checksum 0xdc:
+Darwin by The Dreams (2004)
+http://noname.c64.org/csdb/release/?id=12732
+state: works
+
+Checksum 0xbf:
+Error 23 91% by Resource, The Dreams (2006)
+http://noname.c64.org/csdb/release/?id=32411
+state: 91% version works, older 90% version doesn't
+
+10 Years HVSC by HVSC Crew (2006)
+http://noname.c64.org/csdb/release/?id=44014
+state: works, including disk change
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/eload.txt b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/eload.txt
new file mode 100644
index 00000000..b0fb35aa
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/eload.txt
@@ -0,0 +1,91 @@
+ELoad Version 1 Protocol
+========================
+
+Eload Version 1 by Thomas Giesel, http://www.skoe.de/easyflash
+documented by Ingo Korb, Thomas Giesel
+
+ELoad Version 1 is based on ULoad Model 3, it uses a very similar protocol.
+It is a 2-bit byte-synchronizing fast loader that doesn't use ATN.
+
+Files are opened using the standard DOS procedure with secondary address 0.
+It opens the file and reads the first byte to check if the file exists and
+is readable. It does not close the file before starting the fast loader, so
+it just starts with the last sector loaded.
+
+ELoad detects sd2iec or uIEC directly by examining the ID string.
+
+ELoad has its own "idle loop" that reads a command byte and reacts
+accordingly. It aborts when the ATN line is low while waiting for
+synchronization in the byte receive or send subroutine.
+Version 1 supports "Load a file" only.
+
+"Idle loop"
+-----------
+1) Receive a byte
+2) If byte is 1, call "Load a file"
+5) Otherwise send a 0xff byte
+6) Go to 1
+
+Load a file (command code 1)
+----------------------------
+1) Start with the last file opened
+2) Read sector into buffer (up to 254 data bytes)
+   If reading failed: Send 0xff, return to Idle loop
+   If no data left (EOF): Send 0, return to Idle loop
+   Otherwise: Send number of bytes used in this sector
+3) Send that many data bytes
+4) Go to 2
+
+
+Low level
+=========
+
+Receiving a byte
+----------------
+1) set clock low, data high
+2) wait until data is low; if ATN is low return to the standard bus loop
+3) set clock high, data high
+4) wait until data is high
+5) transfer data (see table below)
+6) invert resulting byte
+7) delay for about 20 microseconds to make sure the C64 has returned
+   the bus to clock high/data high, otherwise the next send/receive
+   call can fail
+
+Sampling times for reception:
+
+Time Clk Data
+-------------
+ 0us (1) 0->1   (data low -> high transition in step 4 is the timing reference)
+14us  b7   b5
+24us  b6   b4
+38us  b3   b1
+48us  b2   b0
+
+The original transfer code reads the first data sample between 11us and 17us
+after the data line transition.
+
+Sending a byte
+--------------
+1) set clock high, data low
+2) wait until clock is low; if ATN is low return to the standard bus loop
+3) set clock high, data high
+4) wait until clock is high
+5) transfer data (see table below)
+6) set clock high, data high
+
+Timing for transmission:
+
+Time Clk Data
+-------------
+ 0us 0->1 (1)   (clock low -> high transition in step 4 is the timing reference)
+14us  b0   b1
+22us  b2   b3
+30us  b4   b5
+38us  b6   b7
+48us  1    1    (step 6)
+
+Note: Bits are sent without inversion, i.e. low for a 0-bit, high for a 1-bit.
+
+The original transfer code sends the first bit pair between 12us and 15us
+after the clock line transition.
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/epyxfastload.txt b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/epyxfastload.txt
new file mode 100644
index 00000000..49f323b5
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/epyxfastload.txt
@@ -0,0 +1,61 @@
+Epyx Fast Load Cartridge Protocol
+=================================
+
+Documented by Ingo Korb
+
+This document describes the fast loader protocol used by the
+Epyx Fast Load cartridge. The cartridge has some other options that also
+upload custom drive code, but those are beyond the scope of this file.
+
+General
+-------
+The Epyx Fast Load cartridge (EFL) uses a two-stage upload process. The
+first stage is sent using M-E and executes at 0x1a9. This first stage
+receives another 256 bytes from the computer and jumpts to that code.
+
+First stage protocol
+--------------------
+The first stage sets data high and clock low and waits until data is low.
+It then releases clock and reads 256 bytes using the same protocol as
+G.I.Joe (see that document). There are at least two versions of the
+second stage, but they are protocol-compatible. Both don't need the
+full 256 bytes that are uploaded - only 237/238 bytes are actually
+used during execution. XORing the first 237 bytes together yields a
+result of 0x91 and 0x5b respectively.
+
+Second stage protocol
+---------------------
+The second stage also uses the same byte reception protocol as the G.I.Joe
+loader. It first receives one byte which is the length of the file name
+to be read and then receives that many bytes for the file name, starting
+with the last character of the name.
+
+After receiving the file name, clock is pulled low and the file is opened.
+If opening fails, set clock high and return to the standard dos idle loop.
+
+Every sector of the file is transferred in order. First data and clock
+are released, then the actual number of bytes following is sent
+(byte transfer protocol described below), then the data bytes of
+the sector. If another sector is following, pull clock low, read the
+data from the storage medium and repeat this process.
+
+After the last sector is transferred, set clock and data high and
+return to the standard dos idle loop.
+
+Sending a byte
+--------------
+To send a byte, set clock and data high, wait until data is low and send
+the inverted bits as shown in this table:
+
+Time Clk Data
+-------------
+ 0us  (1) 0->1  (data low -> high transition is the timing reference)
+10us  !b7 !b5
+20us  !b6 !b4
+30us  !b3 !b1
+40us  !b2 !b0
+60us  -    -
+
+The final delay is used to ensure that the C64 has time to read bit 2/0.
+The original drive code needs about 20-30 cycles to prepare the next
+byte for transmission.
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/fc3-protocol.txt b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/fc3-protocol.txt
new file mode 100644
index 00000000..cb527952
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/fc3-protocol.txt
@@ -0,0 +1,184 @@
+The Final Cartridge III Fast Loader and Saver Protocol
+======================================================
+
+analysed by Thomas Giesel
+notes about the Freezer-variation and EXOS V3 by Ingo Korb
+
+This document describes the fast loader and saver protocol of the FC3. The
+description may not be accurate in any point.
+
+LOADING
+=======
+
+First of all the FC3 opens the file and reads the first two bytes to check the
+load address. It does not close the file before starting the fast loader, so
+that one just starts with the last sector loaded.
+
+When the loader starts it sets both data and clock to high to signal that it
+is currently busy.
+
+The FC3 does always transfer whole blocks, even if not all bytes are used.
+Each block is transferred in 65 tuples with 4 bytes each.
+
+Before sending a block the drives pulls CLOCK low and waits for the host to
+respond by pulling DATA low. Then drive and host release these lines.
+
+The first tuple is sent about 180 us after this handshake. As each tuple has
+its own synchronization this timing doesn't need to be accurate. Between two
+tuples there are about 190 us. In sd2iec these to delays were originally
+reduced to 150 us which works fine for the FC3, but fails with EXOS.
+
+1st tuple:
+0: not used (always 7, data marker on disk)
+1: block counter, starting at 0
+2: 0 if all bytes must be used, number of bytes otherwise
+3: First byte of block
+
+The protocol is able to transfer sectors out-of-file-order as they are read
+from disk, the block counter is used to store them in the correct order on
+the C64 side.
+
+2nd..64th tuple:
+4 bytes from block
+
+65th tuple:
+0: last byte of block
+1..3: not used
+
+Each tuple is syncronized by the drive pulling CLOCK low, then 2 bits are
+transfered at once until the 4 bytes are done. Bit 0 is on CLOCK, Bit 1 on
+DATA and so on. Electrical 0 means binary 0. Finally CLOCK and DATA are
+released to high level.
+
+EOF is marked by pulling DATA low instead of starting a new handshake.
+I/O errors are marked by pulling DATA and CLOCK low.
+
+The "|" marks are the point of time when the bus is written or read.
+
+===============================================================================
+C64 read (PAL)
+ 1   (+12)   13  (+12)   25  (+12)    37  (+12)   49   (+14)    63 (+12)  cycle
+-|||||||-----|||||||-----|||||||------|||||||-----|||||||-------|||||||--
+ 1..7        13.2..19.2  25.4..31.4   37.6..43.6  49.7..55.7    63.9..69.9   us
+ (sync)
+
+1541 write
+|-----------|-----------|------------|-----------|------------|----------
+0   (+12)   12  (+12)   24   (+13)   37  (+12)   49   (+13)   62  (+12)      us
+CLK low     1st pair    2nd pair     3rd pair    4th pair     5th pair
+
+sd2iec write
+|-----------|-----------|-----------|-----------|-------------|----------
+0  (+12)    12  (+12)   24  (+12)   36  (+12)   48   (+14)    62  (+12)      us
+
+===============================================================================
+C64 read (PAL) cont'd
+     75  (+12)   87  (+12)   99   (+14)     113  (+12)   125   (+12)      cycle
+...--|||||||-----|||||||-----|||||||--------|||||||------|||||||---------
+     76.1..82.1  88.3..94.3  00.5..06.5     14.7..20.7   26.9..32.9          us
+
+1541 write
+..-|------------|-----------|------------|-----------|-------------------
+   74   (+13)   87   (+12)  99   (+13)   112  (+12)  124  (+13)              us
+   6th pair     7th pair    8th pair     9th pair    10th pair
+
+sd2iec write
+..-|-----------|-----------|-------------|-----------|-------------------
+   74  (+12)   86  (+12)   98   (+14)    112  (+12)  124  (+12)              us
+
+===============================================================================
+C64 read (PAL) cont'd
+        137  (+12)  149   (+14)   163  (+12)   175  (+12)  187  (+12)     cycle
+...-----|||||||-----|||||||-------|||||||------|||||||-----|||||||-------
+        39.1..45.1  51.2..57.2    65.4..71.4   77.6..83.6  89.8..95.8        us
+
+1541 write
+...---|-----------|------------|-----------|------------|----------------
+      137  (+12)  149  (+13)   162  (+12)  174  (+13)   187  (+12)           us
+      11th pair   12th pair    13th pair   14th pair    15th pair
+
+sd2iec write
+...--|-----------|-------------|-----------|-----------|----------------
+     136  (+12)  148  (+14)    162  (+12)  174  (+12)  186  (+12)            us
+
+===============================================================================
+C64 read (PAL) cont'd
+           199                                                            cycle
+...--------|||||||-------------------------------------------------------
+           02.0..08.0                                                        us
+
+1541 write
+...-----|----------------------------------------------------------------
+        199  (+16)                                                           us
+        16th pair
+
+sd2iec write
+...----|----------------------------------------------------------------
+       198   (+14)                                                           us
+
+
+Fastloader in freezed files
+===========================
+Programs freezed using the "F.DISK" command of the FC3 use a fast loader
+similiar to the normal FC3 fastloader. Like the normal fastloader it opens
+the target file for reading with the standard protocol and it also uses
+the same protocol and timing to transmit a four-byte tuple to the C64.
+However, the handshaking inbetween and the contents of the first tuple
+are different. The freezer-variant transmits the data from disk directly
+which means that the first tuple contains a 0x07, the track and sector
+of the next sector in a file and the first data byte. Everything but
+the data byte is ignored by the C64-side code, so the blocks must
+be sent in file order.
+
+Both end-of-file and error conditions are signalled by pulling DATA low.
+A full clock/data handshake is done before the transmission of every tuple
+which means that the fixed delays between tuples can be dropped.
+
+The freeze-loader closes and reopens the data file using the standard
+protocol after the fast protocol has finished transmitting the file.
+
+EXOS V3
+=======
+The protocol used by the EXOS V3 kernal by J. Schemmel is exactly the same
+as the one used by the FC3, but it seems that the C64-side code is slightly
+less efficient - the delay between two tuples must be increased a bit
+(150us fails, 190us works, exact limit not tested) or loading will hang.
+
+Judging from the code differences and the relative release dates both
+are probably derived from a common source whose code was optimized in
+different ways by the two authors.
+
+There is also a kernal called "The Beast System" which is based on EXOS
+and uses the same fast loader code.
+
+SAVING
+======
+
+The FC3 first opens the file for writing, if this works well, it starts its
+drive code. This code receives and saves the data.
+
+The first byte marks the size of the block. If this byte is 0, a full block of
+254 bytes follows which is not the last one. If other numbers are received,
+n - 1 bytes will follow and this will be the last block. Note that transferred
+blocks do not correspond to disk sectors, as each full block has 254 bytes,
+also the first one which contains the start address.
+
+The drive releases DATA to show that it's ready to receive data. Then the C64
+releases CLOCK to synchronize the file transfer.
+
+The following diagram shows the position of each bit being transfered. The bits
+are send low-active.
+
+C64 write (PAL)
+0   (+12)   12  (+10) 22    (+16)    38  (+10) 48  (+10) 58               cycle
+|-----------|---------|--------------|---------|---------|---------------
+0           11.8      21.7           37.4      47.3      57.1                us
+CLOCK high  D=5       D=4            D=1       D=0       CLOCK low
+(sync)      C=7       C=6            C=3       C=2       (busy)
+
+sd2iec read
+|----------------|------------|-----------|---------|--------------------
+0     (+17)      17   (+13)   30  (+12)   42  (+10) 52                       us
+
+After reading the last pair of bits the drive pulls DATA down to show it's
+busy. Apparently there's no mechanism to signal situations like "disk full".
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/geos-protocol.txt b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/geos-protocol.txt
new file mode 100644
index 00000000..19950adf
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/geos-protocol.txt
@@ -0,0 +1,395 @@
+GEOS fast loader protocol
+=========================
+
+Documented by Ingo Korb
+
+GEOS 64 2.0 uses multiple (but similiar) drive codes during its boot process,
+all of them uploaded using M-W. The protocol is the same for every
+drive type (FIXME: check FD/HD), but the addresses sent differ between
+drives and also between stages. The first stage loader sends hard-coded
+sector chains to the computer, stage 2 and 3 receive commands (actually
+jump addresses in drive memory) from the computer. Copy protection checks
+happen in both stage 1 and 2, but the check in stage 2 is completely
+transparent for a reimplementation that does not plan on failing it.
+
+GEOS 128 2.0 uses a stage 2 loader that is almost identical to the
+GEOS 64 stage 3 loader, handling it the same in emulation will work
+because the changes are only related to copy protection checks.
+
+GEOS 1.3 uses the same stage 1 and 2 code as GEOS 2.0, but does not
+upload a stage 3 version. It was not tested in-depth, some operation
+addresses may be missing.
+
+An implementation of this speeder will need to reserve a 256 byte
+buffer for data and a second buffer of at least 4 bytes (no larger
+transfers have been observed yet, but the protocol could support
+up to 256 bytes containing arbitrary 6502 code) for receiving commands.
+
+During boot GEOS will try to auto-detect the drive type by reading
+large parts of the rom using M-R. The specifics of this rom check have
+not been analyzed yet, but GEOS will assume a 1541 for the boot drive
+and no drive for any other when it sees semi-random data (as in the
+implementation of M-R in sd2iec). Selecting a drive in Configure will
+also result in a rom check, but it seems to accept the choice anyway
+if nonsensical data is returned.
+
+This file is roughly ordered from lowest to highest protocol level.
+
+
+Low-Level byte reception
+------------------------
+Both data and clock should be set to high already from previous
+operations. Using the high->low transition of clock as a timing
+reference, receive bits as shown in the following tables. The timing
+differs for 1MHz (1541) and 2MHz (1571/1581) drives.
+
+1MHz:
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+   15us   !b4  !b5
+   29us   !b6  !b7
+   43us   !b3  !b1
+   59us   !b2  !b0
+
+2MHz:
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+   15us   !b4  !b5
+   29us   !b6  !b7
+   39.5us !b3  !b1
+   50.5us !b2  !b0
+
+During a block reception, the time from the completion of one byte and
+the beginning of the next is 9+11us (before+after). Without a bit of
+post-transfer delay the next transfer may be garbled.
+
+
+Low-Level byte transmission
+---------------------------
+To transmit a data byte, do this:
+- release both clock and data
+(- add a small delay so the bus can charge to high level)
+- wait until clock is low
+- use the following tables for bit timings, using the low->high transition of
+  the clock line as timing reference - there are three variations for
+  1MHz (1541), 2MHz (1571/1581 in Configure 2.0 or 2.1) drives:
+
+1MHz:
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+   18us   !b3  !b1
+   28us   !b2  !b0
+   39us    b4   b5
+   51us    b6   b7
+   70us    -    -   (hold time so the C64 has time to read b6/b7)
+
+2MHz for 1571 (always) and 1581 (Configure 2.0):
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+    9us   !b3  !b1
+   20us   !b2  !b0
+   32us    b4   b5
+   44us    b6   b7
+   66us    -    -   (hold time so the C64 has time to read b6/b7)
+
+2MHz for 1581 (Configure 2.1):
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+    7us    b0   b1
+   14us    b2   b3
+   24us    b4   b5
+   33us    b6   b7
+   45us    -    -   (hold time so the C64 has time to read b6/b7)
+
+
+Note: This description assumes that the reimplementation can
+synchronize to the falling edge of the clock line with much less
+jitter than a 1541 can. The original 1MHz code also tests for the
+rising edge of the 10us pulse on the clock line in order to reduce the
+timing jitter from seven to five clock cycles.
+
+
+Receiving a block
+-----------------
+Data is transferred from the C64 to the drive in blocks of variable
+size from 1-256 bytes. A block transfer of k bytes happens as follows:
+
+- wait until clock is high
+- set data high
+(- delay 15us?)
+- receive k bytes, starting at the end of the buffer
+- set data low
+
+To receive a block from the C64, this block transfer is invoked
+twice. First a one-byte transfer is used to set the block length (0
+stands for 256 bytes), then a second transfer with that number of
+bytes is used to transfer the data. Please note that the data is
+transferred backwards (i.e. sending buffer[k-1], [k-2], ..., [0]).
+
+
+Transmitting the job result (STATUS)
+------------------------------------
+The STATUS operation is called occasionally to check if a previous
+operation has completed successfully. It transmits a single byte which
+is a job status code read from $0000 in the original implementation. A
+minimal implementation that just sends 1 for ok and 2 if a disk
+read/write operation failed is sufficient. The STATUS operation does
+the following:
+
+- wait until clock is high
+- set data high
+- send a single 0x01 byte as length indicator
+- set clock high, data low
+- delay 15us (time guessed, but works)
+- wait until clock is low
+- set data high
+- send the status byte
+- set clock high, data low
+- delay 15us (time guessed, but works)
+
+
+Transmitting the data buffer (TRANSMIT_3)
+-----------------------------------------
+The TRANSMIT operation of stage 3 is usually called after reading a
+sector to transfer its contents to the C64. It works as follows:
+
+- wait until clock is high
+- set data high
+- transmit all 256 bytes of the buffer, starting at last byte
+- set clock high, data low
+- delay 15us (time guessed, but works)
+- call the STATUS operation
+
+Please note that the transmit operation transfers data backwards, just
+as receive does.
+
+
+Transmitting the data buffer (TRANSMIT_2)
+-----------------------------------------
+Stage 2 uses a slightly different implementation of TRANSMIT. Instead
+of always sending the data buffer it will instead execute a STATUS
+operation if a previous operation returned an error and a modified
+TRANSMIT operation if the previous operation was successful. The
+modified TRANSMIT operation works as follows:
+
+- wait until clock is high
+- set data high
+- send a single 0x00 byte as length indicator
+- set clock high, data low
+- delay 15us (time guessed, but works)
+(same steps as TRANSMIT_3 from here)
+- wait until clock is high
+- set data high
+- transmit all 256 bytes of the buffer, starting at last byte
+- set clock high, data low
+- delay 15us (time guessed, but works)
+- call the STATUS operation
+
+
+Transmitting the data buffer (TRANSMIT_81)
+------------------------------------------
+The 1581 code uses yet another variation on the transmit scheme. If
+bit 7 of the first parameter byte is 0, it sends all 256 bytes of the
+buffer followed by a status operation (exactly as TRANSMIT_3). If bit
+7 if the first parameter byte is 1, it just sends the first two bytes
+(still in reverse order) before running STATUS.
+
+
+Reading a sector (READ)
+-----------------------
+The READ operation requires no communication with the computer. The
+first parameter (see main loop entry below) is the track, the second
+parameter is the sector number.
+
+
+Reading and transmitting a sector (READ_AND_SEND)
+-------------------------------------------------
+This operation is only found in the 1571 (FIXME: 1581 too?) drive
+code. It reads the track/sector sent as parameter (as READ) and
+immediately transmits it to the computer, followed by a STATUS
+operation (same as TRANSMIT_3).
+
+
+Writing a sector (WRITE_41)
+---------------------------
+The WRITE_41 operation receives a block into the data buffer and writes
+it to the track/sector specified by the first/second parameter (see
+main loop entry below).
+
+
+Writing a sector (WRITE_71)
+---------------------------
+The 1571/1581 code uses a slightly different WRITE operation.
+It still uses the first/second parameter as track/sector, but always
+receives exactly 256 bytes (without length byte prefix). After
+receiving the data, the STATUS operation is called
+
+
+Exiting the fastloader (QUIT)
+-----------------------------
+GEOS only enables its fast loader on one drive at a time and will also
+quit it if it needs to run standard CBM DOS commands, e.g. for
+formatting a disk. At least during boot the system will assume that
+the fast loader code is still present in the drive ram and M-E it
+without another upload. The QUIT operation does the following:
+
+- wait until clock is high
+- set data high
+- return to the standard serial bus handler
+
+Note: The original stage 2 does not wait, but using the stage 3
+      implementation for stage 2 works fine.
+
+
+Initializing a disk (INITIALIZE)
+--------------------------------
+In the original code this operation will try to find a readable track
+and set the bit rate to the correct value for this track. A
+reimplementation can completely ignore this operation. In the 1581
+code this operation implicitly calls FLUSH.
+
+
+Flushing dirty buffers (FLUSH)
+------------------------------
+The 1581 code has an operation that is not seen in the 1541/1571
+code. It flushes dirty buffer contents to disks, without any
+communication with the computer. A reimplementation can handle it the
+same way as INITIALIZE, i.e. ignore it.
+
+
+Change device address (SET_ADDRESS)
+-----------------------------------
+This operation is used when swapping the C drive with either A or B
+and changes the device address used during standard serial
+communication. The parameter byte is the new address ORed with 0x20.
+
+
+Stage 2/3 initialisation and main loop
+--------------------------------------
+The diskTurbo protocol uses a very simple handshake when it is
+executed with M-E:
+
+- set data low
+- wait until CLOCK is low
+
+After that it enters its own main loop which runs until a QUIT
+operation is received. The main loop just does a block receive into
+the command buffer, which should transfer just 2-4 bytes (FIXME: Check
+that). The first two bytes are used as an indirect jump address (low
+byte first), the third and fourth byte (if they exist) are optional
+parameters for the operation.
+
+Because of the indirect jump used it is possible that this
+documentation is missing operations, but the seven operations listed
+are the only ones that have been seen during testing and all the code
+uploaded to the drive has been accounted for.
+
+The following addresses have been observed in the various stages and
+drive variations until now. (FIXME: Unique between all variations?)
+
+Addr   Function
+----  ----------
+031f  STATUS        (1541 stage 2 - only used in GEOS 1.3; 1571)
+031f  TRANSMIT_81   (1581)
+0320  TRANSMIT_3    (1541 stage 3)
+0325  STATUS        (1541 stage 3)
+032b  STATUS        (1581)
+0412  QUIT          (1541 stage 2)
+0420  QUIT          (1541 stage 3)
+0428  SET_ADDRESS   (1541 stage 2 - guessed from code, not seen in action yet)
+0432  TRANSMIT_2    (1541 stage 2)
+0439  SET_ADDRESS   (1541 stage 3)
+0457  QUIT          (1581)
+0475  QUIT          (1571)
+047c  WRITE_71      (1581) [sic!]
+049b  INITIALIZE    (1581)
+04a5  SET_ADDRESS   (1571)
+04af  READ_AND_SEND (1571)
+04b9  FLUSH         (1581)
+04cc  READ          (1581)
+04dc  INITIALIZE    (1541 stage 3)
+0504  INITIALIZE    (1541 stage 2 - only used in GEOS 1.3)
+057c  WRITE_41      (1541 stage 2 and 3)
+057e  INITIALIZE    (1571)
+058e  READ          (1541 stage 2 and 3)
+05fe  WRITE_71      (1571)
+
+Please note that address 031f is used with different functions in the
+1541/71 and 1581 code.
+
+There is no SET_ADDRESS function for the 1581, GEOS uses the standard
+U0> command instead.
+
+
+Stage 1 sector chain transfer
+-----------------------------
+The chain transfer in stage 1 works similiarly to a file transfer from
+a D64 in standard mode - a track/sector number is passed to the transfer
+subroutine which will read that sector, transfer its data and switch
+to the next track/sector specified in the first two bytes of the
+sector unless the track byte is 0 to mark the end of the chain.
+
+A transfer of a single sector in a chain works like this:
+- read the current sector (specified by track and sector numbers,
+  initial value passed as parameter)
+- decrypt the data starting at offset 2 of the sector if necessary
+- calculate the actual number of bytes in the sector
+  (sectordata[1]-1 if sectordata[0] is zero; 254 otherwise)
+- wait until clock is low
+- set data high
+- send the actual number of bytes in the sector
+- set clock high, data low
+- delay 15us
+(same steps as TRANSMIT_3 from here, just with a different number of bytes)
+- wait until clock is high
+- set data high
+- transmit data bytes, starting at the last byte
+- set clock high, data low
+- delay 15us (time guessed, but works)
+- call the STATUS operation
+- if sectordata[0] is non-zero:
+  - use sectordata[0] as current track, sectordata[1] as current sector
+  - transfer the next sector
+
+After sending the last sector in the chain, one more byte must be sent:
+- wait until clock is high
+- set data high
+- send a 0-byte
+- set clock high, data low
+- delay 15us
+
+
+Stage 1 operation
+-----------------
+Stage 1 is a fixed-function loader that sends three hard-coded sector
+chains to the computer, decrypting the second and third by XORing the
+data bytes with parts of its own code. The decryption key can be
+captured from the M-W commands used to upload stage 1, the key
+consists of 254 bytes starting at memory address 0x042a for GEOS 64 or
+0x044f for GEOS 128.
+
+To decrypt a data buffer before sending it to the computer, XOR each
+byte of the data buffer with the corresponding byte of the key, i.e.:
+    for (i=0;i<254;i++)
+      buffer[i] = buffer[i] ^ key[i];
+
+The stage 1 loader in GEOS 64 does the following:
+- set data low
+- wait until clock is low
+- transfer the sector chain starting at track 19 sector 13
+  (without decryption)
+- transfer the sector chain starting at track 20 sector 15
+  (including decryption)
+- transfer the sector chain starting at track 20 sector 17
+  (including decryption)
+- set data high
+- return to the standard serial bus handler
+
+In GEOS 128 the operation is basically the same, but the sector chains
+are different. The unencrypted one is 19/12, followed by decrypted
+chains 20/15, 23/6 and 24/4.
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/gijoe.txt b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/gijoe.txt
new file mode 100644
index 00000000..2b0f53df
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/gijoe.txt
@@ -0,0 +1,93 @@
+G.I. Joe Loader Protocol
+========================
+
+Documented by Ingo Korb
+
+Said to be the most-ripped IRQ loader, although only three programs using
+it have been located yet:
+- G.I. Joe
+- Crown (cracked by Sharks)
+- Cucumber Juice II by Hitmen (switch to IRQ loader mode manually)
+
+Each of these uploads the drive code with M-W statements of different
+length, but all of them send the commands in increasing memory address
+order. A CRC-based detection scheme may need to compare the CRC after
+every byte instead of every command to trigger reliably.
+
+The protocol used in this loader is completely synchronous, triggered
+by both edges of the CLK line; ATN is unused but may change anyway
+in some implementations of the C64 side.
+
+High Level
+==========
+
+After the M-E command has been received, set both DATA and CLK high
+and disable ATN acknowledge. The original drive code uses a slightly
+weird loop to wait until the bus is completely idle at this point,
+simply waiting 10 milliseconds and then looping until both DATA and
+CLK are high seems to be sufficient.
+
+Main loop
+---------
+1) Set CLK low
+2) Wait until DATA is low
+3) Set CLK high
+4) Read a byte, discard it
+5) Read two bytes
+6) Set CLK low
+7) Try to open a file whose name starts with the two bytes received in step 5
+8) If not successful, send error and restart main loop
+9) Send file contents
+10) Send 0xac 0xff
+11) (Close file if neccessary)
+12) Restart main loop
+
+Sending file contents
+---------------------
+1) Send file in blocks of 254 bytes (or less for the last block):
+  2) Set CLK high
+  3) Send all bytes in file order - if byte is 0xac, send twice
+  4) If another block is available to send:
+    5) Send 0xac 0xc3
+    6) Set CLK low
+5) Send 0xac 0xff as end marker
+6) (Close file if necessary)
+
+If a read error is encountered while sending the file contents,
+send error and return to main loop.
+
+Sending error
+-------------
+1) Set CLK high
+2) Send 0xfe 0xfe 0xac 0xf7
+3) (Close file if neccessary)
+
+Low Level
+=========
+
+Receiving a byte
+----------------
+1) byte = 0
+2) Repeat 4 times:
+  3) Wait until CLK is low
+  4) (for safety only: delay ~5 microseconds)
+  5) byte = byte >> 1
+  6) Read DATA
+  7) If DATA was low in step 6: byte = byte | 0x80
+  8) Wait until CLK is high
+  9) (for safety only: delay ~5 microseconds)
+ 10) byte = byte >> 1
+ 11) Read DATA
+ 12) If DATA was low in step 11: byte = byte | 0x80
+
+
+Sending a byte
+--------------
+1) Repeat 4 times:
+  2) Wait until CLK is high
+  3) Set data to (byte & 1)
+  4) byte = byte >> 1
+  5) Wait until CLK is low
+  6) Set data to (byte & 1)
+  7) byte = byte >> 1
+
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/nippon-loader.txt b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/nippon-loader.txt
new file mode 100644
index 00000000..2d9e7484
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/nippon-loader.txt
@@ -0,0 +1,387 @@
+Nippon Loader (by Joerg Jungermann)
+=============
+This document describes the reverse engineered portion of the loader used
+in the german adventure role playing game "Nippon".
+It is unknown if this loader is used in other releases.
+
+The loader is not fast, but the timing is relaxed.
+It works without crystal and allows IRQs to be enabled on the C64 side.
+
+
+State machine
+-------------
+The code executed in the 15x1 implements the following state machine.
+ATN low and CLOCK are used to syncronise C64 and Floppy. The data is transmitted via DATA.
+
+The state machine is started by uploading multiple chunks of code in 16byte blocks to drives
+memory from $0300 to $041f. The last block uploaded begins at $0410 and has the checksum $43c1.
+Therefor it is used to identify the loader, if a successive call using M-E executes code at $0300.
+
+       START
+      +---------+
+ +->--|idle loop|
+ |    +---------+
+ |       |
+ |       | ATN low
+ ^       |
+ |       |
+ |       V
+ |    +-------+  T > $80       +-----------------+
+ |    |get T/S|--------------->| exit to CBM-DOS |
+ |    +-------+                +-----------------+
+ |       |  |
+ |       |  +------------------+
+ |       |                     |
+ ^       | S < $80             | S > $80
+ |       V                     V
+ |    +---------+            +----------------------+
+ +-<--|write T/S|            |read T/S with S &= $7f|
+ |    +---------+            +----------------------+
+ |                                   V
+ +--<--------------------<-----------+
+
+
+Idle loop
+---------
+The idle loop set ATN,CLOCK and DATA high, and waits for ATN low to get track, sector and command.
+
+
+Get track & sector
+------------------
+In this state the drive code expects two bytes from the C64. Before any bit is received or sent over
+the IEC bus a special handshake is done to synchronize drive and computer.
+
+The first byte identifies the track for the next action.
+If the track byte is larger than $80 (bit 7 is set) the drive code jumps to the 1541 reset vector.
+This is usually called, if the game is left throug the in game menu.
+
+The second byte fetched contains the command and the sector information: Bit 7 determines if command
+read or write. if bit 7 is set the command is read, otherwise write.
+The sector is the 2nd byte & $80.
+
+
+Synchronisatiion handshake
+--------------------------
+This handshake is done before any bit transfer.
+1. If ATN low, set CLOCK low and jump back to idle loop. Drive code is out of sync with Cevi.
+   Strangly nothing is done to detect such errors an C64 side, except for a endless loop,
+   so the game will work or simply crash.
+2. Wait CLOCK to become low
+
+
+Read byte
+---------
+1. CLK, DATA are set high
+2. Until 8 bits are received via IEC
+ a. Wait for syncronisation handshake to finish, first bit received is bit 0.
+ b. read one bit from DATA
+3. set CLK low and DATA high
+
+Write byte
+----------
+1. CLK, DATA are set high
+2. Until 8 bits are send over IEC
+ a. Wait for syncronisation handshake to finish
+ b. write one bit to DATA, first bit sent is bit 0
+3. set CLK low and DATA high
+
+Read T/S
+--------
+1. Sector T/S is fetched into buffer
+2. Byte after byte is tranfered starting with byte 0 to byte $ff. A full sector is transfered.
+
+Write T/S
+--------
+1. $ff bytes are fetched into a buffer.
+2. Buffer is written as sector T/S.
+
+
+
+Disassembled floppy code
+------------------------
+; CBM Dasm V2.24
+
+*=$0300
+
+; $1800 bits
+;   bit 7  - ATN in inverted, to read bus bit 4 must be 0
+;  ......
+;   bit 4  - ATN out inverted
+;   bit 3  - Clock out inverted
+;   bit 2  - Clock in inverted, to read bus bit 3 must be 0
+;   bit 1  - Data out inverted
+;   bit 0  - Data in inverted, to read bus bit 1 must be 0
+
+; $C6 = tmp ? counter ? transfer byte
+
+; set drive led off and IRQs off
+0300    20  ED  03   JSR $03ED       
+0303    A2  45       LDX #$45        
+0305    86  C6       STX $C6         
+; stack pointer init
+0307    9A           TXS             
+
+; idle loop - wait for ATN low
+; set ATN = CLK = Data = high
+0308    A9  00       LDA #$00        
+030A    8D  00  18   STA $1800       
+030D    AD  00  18   LDA $1800       
+; when ATN low Acc > $80 branch
+0310    30  18       BMI $032A       
+0312    C6  C6       DEC $C6         
+; branch when $c6 is not $00
+0314    D0  F2       BNE $0308       
+; set CLK to 0
+0316    09  08       ORA #$08        
+0318    8D  00  18   STA $1800       
+031B    EA           NOP             
+031C    EA           NOP             
+031D    EA           NOP             
+031E    EA           NOP             
+; branch if ATN low
+031F    AD  00  18   LDA $1800       
+0322    30  0B       BMI $032F       
+; ab undzumal nen irq zulassen
+0324    58           CLI             
+0325    EA           NOP             
+0326    78           SEI             
+0327    4C  08  03   JMP $0308       
+
+
+; fetch track byte
+; CLK to low
+032A    09  08       ORA #$08        
+032C    8D  00  18   STA $1800       
+; wait for ATN high
+032F    AD  00  18   LDA $1800       
+0332    30  FB       BMI $032F       
+; drive LED on
+0334    20  F7  03   JSR $03F7       
+; fetch track byte from IEC
+0337    20  6D  03   JSR $036D       
+; if Accu > $80 reset floppy, exit this code
+033A    10  03       BPL $033F       
+033C    4C  A0  EA   JMP $EAA0       
+
+; store track byte in command for buffer 4
+033F    85  0E       STA $0E         
+
+; fetch a byte from IEC
+0341    20  6D  03   JSR $036D       
+; if Acc < $80 fetch $100 bytes in buffer 4, else read sector to buffer 4
+0344    30  13       BMI $0359       
+; store sector in command for buffer 4
+0346    85  0F       STA $0F         
+; fetch $100 bytes via IEC to $0700 buffer 4
+0348    A0  00       LDY #$00        
+034A    20  6D  03   JSR $036D       
+034D    99  00  07   STA $0700,Y     
+0350    C8           INY             
+0351    D0  F7       BNE $034A       
+; store bytes in buffer 4 to track/sector job 4
+0353    20  01  04   JSR $0401       
+; restart idle loop
+0356    4C  00  03   JMP $0300       
+; store sector in command for buffer 4
+0359    29  7F       AND #$7F        
+035B    85  0F       STA $0F         
+; read sector to buffer 4
+035D    20  04  04   JSR $0404       
+; transfer $100 bytes via IEC
+0360    A0  00       LDY #$00        
+0362    B9  00  07   LDA $0700,Y     
+; send byte
+0365    20  93  03   JSR $0393       
+0368    C8           INY             
+0369    D0  F7       BNE $0362       
+; branch always to idle loop
+036B    F0  93       BEQ $0300       
+
+
+
+; fetch a byte to Accu via IEC
+; bit counter to 8 count down 
+036D    A2  08       LDX #$08        
+; set CLK DATA high
+036F    AD  00  18   LDA $1800       
+0372    29  F5       AND #$F5        
+0374    8D  00  18   STA $1800       
+; wait for ATN, CLOCK low
+0377    20  C2  03   JSR $03C2       
+; fetch DATA in to Carry-Flag
+037A    AD  00  18   LDA $1800       
+037D    4A           LSR             
+; push carry to bit 7 of $c6
+037E    66  C6       ROR $C6         
+; wait Clock high
+0380    20  BA  03   JSR $03BA       
+; bit count decrement
+0383    CA           DEX             
+; fetch next bit
+0384    D0  F1       BNE $0377       
+; data out high, clock low
+0386    AD  00  18   LDA $1800       
+0389    29  FD       AND #$FD        
+038B    09  08       ORA #$08        
+038D    8D  00  18   STA $1800       
+; byte in accu holen
+0390    A5  C6       LDA $C6         
+0392    60           RTS             
+
+
+
+; tranfer byte in Accu via IEC
+; invert Accu and store to $c6
+0393    49  FF       EOR #$FF        
+0395    85  C6       STA $C6         
+; byte counter
+0397    A2  08       LDX #$08        
+; set CLK high
+0399    A9  F7       LDA #$F7        
+039B    2D  00  18   AND $1800       
+039E    8D  00  18   STA $1800       
+; wait for ATN, CLOCK low
+03A1    20  C2  03   JSR $03C2       
+; fetch a bit from $C6
+03A4    A9  00       LDA #$00        
+03A6    46  C6       LSR $C6         
+; bracch if bit to transfer 0 carry clear 
+03A8    90  05       BCC $03AF       
+; bit = 1
+03AA    20  E4  03   JSR $03E4       
+; branch always
+03AD    D0  03       BNE $03B2       
+; bit = 0
+03AF    20  DB  03   JSR $03DB       
+; wait for clock high
+03B2    20  BA  03   JSR $03BA       
+; decrement byte counter
+03B5    CA           DEX 
+; do it till 8 bytes are transfered
+03B6    D0  E9       BNE $03A1
+; branch always
+03B8    F0  CC       BEQ $0386       
+
+
+
+; wait for Clock high
+03BA    A9  04       LDA #$04        
+03BC    2C  00  18   BIT $1800       
+03BF    D0  F9       BNE $03BA       
+03C1    60           RTS             
+
+
+
+; wait for atn, clock low
+; when ATN high and Clock high reinit
+03C2    A9  04       LDA #$04        
+03C4    2C  00  18   BIT $1800       
+; branch if ATN low
+03C7    30  03       BMI $03CC       
+; when CLOCK high wait again for ATN high
+03C9    F0  F7       BEQ $03C2       
+; when ATN, Clock low return
+03CB    60           RTS             
+; set clock low
+03CC    0A           ASL             
+03CD    0D  00  18   ORA $1800       
+03D0    8D  00  18   STA $1800       
+; wait for ATN high
+03D3    2C  00  18   BIT $1800       
+03D6    30  FB       BMI $03D3       
+; reinit
+03D8    4C  00  03   JMP $0300       
+
+
+; set Data high
+03DB    A9  FD       LDA #$FD        
+03DD    2D  00  18   AND $1800       
+03E0    8D  00  18   STA $1800       
+03E3    60           RTS             
+
+; set Data low
+03E4    A9  02       LDA #$02        
+03E6    0D  00  18   ORA $1800       
+03E9    8D  00  18   STA $1800       
+03EC    60           RTS             
+
+
+; drive LED off
+03ED    78           SEI             
+03EE    A9  F7       LDA #$F7        
+03F0    2D  00  1C   AND $1C00       
+03F3    8D  00  1C   STA $1C00       
+03F6    60           RTS             
+
+; drive LED on
+03F7    78           SEI             
+03F8    A9  08       LDA #$08        
+03FA    0D  00  1C   ORA $1C00       
+03FD    8D  00  1C   STA $1C00       
+0400    60           RTS             
+
+
+; exec write sector job code, wait for end
+0401    A9  90       LDA #$90        
+0403    2C  A9  80   BIT $80A9       
+
+; exec read sector job code, wait for end
+  0404 LDA #$80
+0406    85  04       STA $04         
+0408    58           CLI             
+0409    A5  04       LDA $04         
+040B    30  FC       BMI $0409       
+040D    78           SEI             
+040E    60           RTS             
+
+
+040F    50  85       BVC $0396       
+0411    48           PHA             
+0412    60           RTS             
+
+
+0413    0D  00  18   ORA $1800       
+0416    8D  00  18   STA $1800       
+0419    2C  00  18   BIT $1800       
+041C    30  FB       BMI $0419       
+041E    4C  00  03   JMP $0300       
+
+
+0421    A9  FD       LDA #$FD        
+0423    2D  00  18   AND $1800       
+0426    8D  00  18   STA $1800       
+0429    60           RTS             
+
+
+042A    A9  02       LDA #$02        
+042C    0D  00  18   ORA $1800       
+042F    8D  00  18   STA $1800       
+0432    60           RTS             
+
+
+0433    78           SEI             
+0434    A9  F7       LDA #$F7        
+0436    2D  00  1C   AND $1C00       
+0439    8D  00  1C   STA $1C00       
+043C    60           RTS             
+
+
+043D    A9  90       LDA #$90        
+043F    2C  A9  80   BIT $80A9       
+0442    85  04       STA $04         
+0444    A5  04       LDA $04         
+0446    30  FC       BMI $0444       
+0448    60           RTS             
+
+
+0449    04                   
+044A    30  FC       BMI $0448       
+044C    60           RTS             
+
+
+044D    FF                   
+044E    FF                   
+044F    FF                   
+0450-04FF    00           BRK             
+
+; End of file.
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/uloadm3.txt b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/uloadm3.txt
new file mode 100644
index 00000000..ee4dc945
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/uloadm3.txt
@@ -0,0 +1,129 @@
+ULoad Model 3 Protocol
+======================
+
+ULoad Model 3 by MagerValp, http://www.paradroid.net/uload/
+documented by Ingo Korb
+
+ULoad Model 3 is a 2-bit byte-synchronizing fast loader that
+doesn't use ATN and assumes a track/sector-organized medium with
+a standard CBM directory layout. It uses the same drive detection
+code as Dreamload, but unlike Dreamload it can also change existing
+files.
+
+High level
+==========
+
+ULoad Model 3 has its own "idle loop" that reads a command byte and
+reacts accordingly. It aborts when the ATN line is low while waiting
+for synchronisation in the byte receive subroutine.
+
+"Idle loop"
+-----------
+1) Receive a byte
+2) If byte is 1, call "Load a file"
+3) If byte is 2, call "Replace a file"
+4) If byte is 36 ('$'), call "Directory"
+5) Otherwise send a 0xff byte
+6) Go to 1
+
+Load a file (command code 1)
+----------------------------
+1) Receive a byte, store as track number
+2) Receive a byte, store as sector number
+3) Call Chain transmission
+
+Replace a file (command code 2)
+-------------------------------
+1) Receive a byte, store as track number
+2) Receive a byte, store as sector number
+3) Read current track/sector to buffer
+   If reading was not successful: Send 0xff, return to Idle loop
+4) Get the number of bytes used in the current sector
+   (buffer[1]-1 if buffer[0] is 0, 254 otherwise)
+5) Send number of byte used
+6) If this is the first sector:
+   a) Send buffer[2] (start address low)
+   b) Send buffer[3] (start address high)
+   c) Start at buffer[4], reduce number of bytes by 2
+   Otherwise:
+   a) Start at buffer[2]
+7) Receive <number of bytes> bytes into buffer
+8) Write buffer contents to disk, same track/sector
+   If writing was not successful: Send 0xff, return to Idle loop
+9) Set track = buffer[0], sector = buffer[1]
+10) If track != 0, go to 3
+11) Send 0
+12) Return to Idle loop
+
+Directory
+---------
+1) Get the start of directory from somewhere, store as track/sector
+   (track 18 sector 1 on a 1541)
+2) Call Chain transmission
+
+Chain transmission
+------------------
+1) Read current track/sector to buffer
+   If reading was not successful: Send 0xff, return to Idle loop
+2) Get the number of bytes used in the current sector
+   (buffer[1]-1 if buffer[0] is 0, 254 otherwise)
+3) Send number of bytes used
+4) Send that many bytes, starting at buffer[2]
+5) Set track = buffer[0], sector = buffer[1]
+6) If track != 0, go to 1
+7) Send 0
+8) Return to Idle loop
+
+
+Low level
+=========
+
+Receiving a byte
+----------------
+1) set clock low, data high
+2) wait until data is low; if ATN is low return to the standard bus loop
+3) set clock high, data high
+4) wait until data is high
+5) transfer data (see table below)
+6) invert resulting byte
+7) delay for about 20 microseconds to make sure the C64 has returned
+   the bus to clock high/data high, otherwise the next send/receive
+   call can fail
+
+Sampling times for reception:
+
+Time Clk Data
+-------------
+ 0us (1) 0->1   (data low -> high transition in step 4 is the timing reference)
+14us  b7   b5
+24us  b6   b4
+38us  b3   b1
+48us  b2   b0
+
+The original transfer code reads the first data sample between 11us and 17us
+after the data line transition.
+
+Sending a byte
+--------------
+1) set clock high, data low
+2) wait until clock is low; no ATN abort in the original, but it wouldn't hurt
+3) set clock high, data high
+4) wait until clock is high
+5) transfer data (see table below)
+6) set clock high, data high
+
+Timing for transmission:
+
+Time Clk Data
+-------------
+ 0us 0->1 (1)   (clock low -> high transition in step 4 is the timing reference)
+14us  b0   b1
+22us  b2   b3
+30us  b4   b5
+38us  b6   b7
+48us  1    1    (step 6)
+
+Note: Bits are sent without inversion, i.e. low for a 0-bit, high for a 1-bit.
+
+The original transfer code sends the first bit pair between 11us and 17us
+after the clock line transition.
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/wheels-protocol.txt b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/wheels-protocol.txt
new file mode 100644
index 00000000..c4b5436c
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doc/wheels-protocol.txt
@@ -0,0 +1,404 @@
+Wheels fast loader protocol
+===========================
+
+Documented by Ingo Korb
+
+Wheels 4.4 note
+---------------
+Although the analyzed pre-4.4 versions of wheels had a nice,
+consistent loader design with just two different byte
+transmission/reception variations and a fully compatible protocol
+between all drive types, Wheels 4.4 ditched that for some reason. The
+protocol is still similiar to the previous versions, but there are
+some important differences which depend on the drive type. The pre-4.4
+versions are used as the baseline in this document, changes in 4.4 are
+noted where appropiate.
+
+Low-Level byte transmission
+---------------------------
+Both data and clock should be set to high already from previous
+operations. Using the high->low transition of clock as a timing
+reference, send bits as shown in the following table. For older
+versions of Wheels the timing and bit order only differs between 1MHz
+(154) and 2MHz (everything else) drives. Wheels 4.4 runs the 1571 in
+1MHz mode using the 1541 timing from previous Wheels versions and
+uses a slowed-down timing for the 1581 and CMD drives.
+
+1541 (all versions) and 1571 (Wheels 4.4):
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+    9us   !b3  !b1
+   23us   !b2  !b0
+   37us   !b7  !b5
+   51us   !b6  !b4
+   73us    -    -   (hold time so the C64 has time to read b6/b4)
+
+2MHz (Wheels pre-4.4 - identical to GEOS 1581 with Configure 2.1):
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+    7us    b0   b1
+   14us    b2   b3
+   24us    b4   b5
+   33us    b6   b7
+   45us    -    -   (hold time so the C64 has time to read b6/b7)
+
+1581/CMD (Wheels 4.4):
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+    7us    b0   b1
+   15us    b2   b3
+   26us    b4   b5
+   37us    b6   b7
+   52us    -    -   (hold time so the C64 has time to read b6/b7)
+
+
+Low-Level byte reception
+------------------------
+Both data and clock should be set to high already from previous
+operations. Using the high->low transition of clock as a timing
+reference, receive bits as shown in the following table. The timing
+and bit order differs for 1MHz (1541) and 2MHz (everything else)
+drives:
+
+1MHz (Wheels pre-4.4):
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+   16us   !b7  !b5
+   26us   !b6  !b4
+   41us   !b3  !b1
+   54us   !b2  !b0
+
+2MHz (Wheels pre-4.4 - identical to GEOS 2MHz timing):
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+   15us   !b4  !b5
+   29us   !b6  !b7
+   39.5us !b3  !b1
+   50.5us !b2  !b0
+
+1541/1571 (Wheels 4.4):
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+   17us   !b7  !b5
+   28us   !b6  !b4
+   45us   !b3  !b1
+   61us   !b2  !b0
+
+1581/CMD (Wheels 4.4):
+   Time  Clock Data
+   ----------------
+    0us  1->0  (1)  (timing reference)
+   15us   !b0  !b1
+   26us   !b2  !b3
+   37us   !b4  !b5
+   48us   !b6  !b7
+   60us   -    -    (recommended delay before returning)
+
+
+Receiving a block
+-----------------
+Data is transferred from the C64 to the drive in blocks of variable
+size from 1-256 bytes. A block transfer of k bytes happens as follows:
+
+- wait until clock is high
+- set data high
+(- delay 15us?)
+- receive k bytes, starting at the end of the buffer
+- Wheels 4.4 only: Wait until clock is low
+- set data low
+
+Unlike GEOS, the block length is always determined on the drive
+side. The only sizes used are 4 bytes for commands and 256 bytes when
+receiving a sector to write.
+
+Transmitting a block
+--------------------
+When transferring data to the C64 the block size is variable from 1 to
+256 bytes and is not explicitly sent to the computer. A block transfer
+of k bytes happens as follows:
+
+- wait until clock is high
+- set data and clock high
+- transmit all k data bytes, starting with the last byte
+- delay 20us
+- Wheels pre-4.4 and 4.4 on 1541/1571:
+  - set data low, clock high
+  - wait until clock is low
+- Wheels 4.4 on 1581/CMD
+  - set data and clock high
+  - wait until clock is low
+  - set data low
+
+
+Parallel block transfer (HD only)
+---------------------------------
+Note: This section is based on a disassembly of the drive code only
+and has not been verified in reality.
+
+Wheels can utilize the parallel port of the CMD HD for increased
+transfer speed. Before every block transfer the drive checks if a flag
+byte at $031e (inside the drive code) has bit 7 set - if it is set,
+parallel mode is used instead of the serial transfer described
+above. The flag is never set within the drive code, it is assumed that
+it'll be set when the code is uploaded (if at all). The flag is reset
+in the drive code in a single place - if the high byte of the RPC
+address is anything except $03, the code calls STATUS, sets clock/data
+high, clears the parallel flag and runs QUIT to exit.
+
+NOTE: Wheels 4.4 does not use the serial port at all after starting
+the drive code with the parallel mode flag set. Instead of waiting for
+a certain state on the clock line it waits for the inverted state on
+bit 6 of port B (PB6) of the 8255 and instead of setting the data line low
+or high it sets bit 7 of port C (PC7) of the 8255 to high/low. It is
+currently assumed that those two pins are connected to the handshake
+lines of the parallel connector of the HD, but it is not known if this
+connection is inverted or not.
+
+Parallel block reception pre-4.4
+--------------------------------
+The parallel block reception is called instead of the standard block
+reception subroutine and expects a byte count (1-256) as parameter.
+
+- wait until clock is high
+- set data and clock high
+- reception loop:
+  - wait until clock is low
+  - read parallel port
+  - set data low
+  - store received byte
+  - decrement count
+  - exit loop if count is now 0
+
+  - wait until clock is high
+  - read parallel port
+  - set data high
+  - store received byte
+  - decrement count
+  - exit loop if count is now 0
+- wait until clock is low (always, exit point in loop doesn't matter)
+- set data low (same)
+
+Parallel block reception 4.4
+----------------------------
+Again the parallel block reception is called instead of the standard
+block reception subroutine.
+
+- reception loop (one iteration per byte):
+  - wait until PB6 is 0
+  - read parallel port
+  - set PC7 to 1
+  - wait until PB6 is 1
+  - set PC7 to 0
+  - store received byte
+
+Parallel block transmission pre-4.4
+-----------------------------------
+The parallel block transmission is called instead of the standard
+block transmission subroutine and expects a byte count (1-256) as
+parameter.
+
+- set parallel port to output
+- wait until clock is high
+- set clock and data high
+- transmission loop:
+  - wait until clock is low
+  - read next data byte
+  - send byte to parallel port
+  - set data low
+  - wait until clock is high
+  - decrement count
+  - exit loop if count is now 0
+
+  - read next data byte
+  - send byte to parallel port
+  - set data high
+  - decrement count
+  - exit loop if count is now 0
+- set clock/data high
+- wait until clock is low
+- set data low
+- set parallel port to input
+
+Parallel block transmission 4.4
+-------------------------------
+Again the parallel block transmission is called instead of the
+standard block transmission subroutine.
+
+- set parallel port to output
+- reception loop (one iteration per byte):
+  - read next data byte
+  - wait until PB6 is 0
+  - send byte to parallel port
+  - set PC7 to 1
+  - wait until PB6 is 1
+  - set PC7 to 0
+- set parallel port to input
+
+Stage 1 loader
+--------------
+Note: This stage is only used for 1541/1571 drives, all others load
+the system file with standard KERNAL calls.
+
+The stage 1 loader is a fixed-filename loader that searches for a
+predetermined file and transmits it to the computer. The file name is
+"SYSTEM1" for the C64 version and "128SYSTEM1" for the C128. In the
+1541 loader it is located at $5d9 in drive memory, the number of
+characters compared is at $597. The name in drive memory is terminated
+with a $a0 character that is included in the comparision.
+
+The stage 1 loader does the following:
+- wait until clock is low
+- set data low
+- attempt to open the target file (SYSTEM1 or 128SYSTEM1)
+  - return to the dos main loop if the file wasn't found
+- transfer each sector of the file:
+  - wait until clock is high
+  - set clock/data high
+  - transmit the sector contents starting at the end
+  - set data low
+  - wait until clock is low
+  - advance to the next sector in the chain
+  - exit after the last sector of the file was transferred
+- wait until clock is low
+- set clock/data high
+- return to the dos main loop
+
+
+Stage 2 functions
+=================
+Note: Addresses are for Wheels versions before 4.4. In 4.4 the jump
+table is moved to 0403 for the 1541/1571, to 0503 for the CMD FD/HD,
+but stays at 0303 for the 1581.
+
+Exiting the fastloader (QUIT - 0303)
+------------------------------------
+This function exits the fast loader and returns to the standard dos
+main loop. Wheels may restart the loader with M-E without re-uploading
+the drive code.
+
+- wait until clock is high
+- set clock/data high
+- return to the dos main loop
+
+Writing a sector (WRITE - 0306)
+-------------------------------
+This function receives a sector (256 bytes) and writes them to the
+track/sector already received in the function call. After writing it
+jumps to the STATUS function.
+
+Reading a sector (READ - 0309)
+------------------------------
+This function reads the track/sector that was received together with
+the function address and transmits it to the computer. Regardless of
+the success of the read operation, the full 256 bytes of data are
+always transmitted as a block transfer. After transmitting the sector
+data the loader jumps to the STATUS function.
+
+Reading a sector link pointer (READLINK - 030c)
+-----------------------------------------------
+This function works exactly as READ, but transmits only the first two
+bytes of the sector instead of its full contents.
+
+Transmitting the job result (STATUS - 030f)
+-------------------------------------------
+This function uses the block transfer operation to transmit a single
+byte to the C64. This byte is the job result code from the buffer that
+is used for disk operations.
+
+Calculating the number of free blocks (NATIVE_FREE - 0312)
+----------------------------------------------------------
+This function calculates the number of free blocks in a CMD native
+partition. The first parameter byte is the sector number of the last
+BAM sector that should be read, the second parameter is the last
+byte in that sector that should be added into the result ($00 means
+every byte). Currently there has been no situation observed in which
+those two parameters had values that would limit the calculation to
+less than the entire partition.
+
+The function transmits two bytes to the C64 which are the number of
+free sectors in the current partition (must be CMD native, but isn't
+used for anything else anyway) in little-endian byte order. After
+transmitting this function calls the STATUS function.
+
+Reading the current partition and dir (GET_CURRENT_PART_DIR - 0315)
+-------------------------------------------------------------------
+This function transmits three bytes to the C64. The first two are the
+track and sector of the directory head sector of the current directory
+in the current partition, the third is the number of the current
+partition (1-based as usual).
+
+Setting the current partition and dir (SET_CURRENT_PART_DIR - 0318)
+-------------------------------------------------------------------
+This function changes the current directory and/or partition. It
+received three bytes from the C64. The third byte is the new current
+partition (0 indicates no change), the first two bytes are used as the
+current directory head track and sector in that partition.
+
+Checking for disk change (CHECK_CHANGE - 031b)
+----------------------------------------------
+This function transmits a single byte to the computer using the block
+transfer operation. The byte is either $00 if the disk was not changed
+or $03 if it was. On a 1541 the flag value is obtained from address
+$1c which will be set on a disk change, but is not reset at all while
+the loader is running. If this function returns a "disk changed"
+state, Wheels will exit the loader and send the Initialize dos
+command. A simple implementation that always returns $03 works fine
+for 1541/71/81 modes, but will fail if a CMD FD is emulated.
+
+In Wheels 4.4 an implementation that always returns $03 will fail for
+every drive type (except HD). For a 1571 Wheels 4.4 expects a return
+value of 0 for single-sided disks or $80 for double-sided disks (value
+taken from byte 4 of sector 18/0).
+
+
+Stage 2 loader
+--------------
+The stage 2 loader uses a remote function call system similiar to the
+GEOS 2.0 stage 2/3 loaders. It starts with a simple handshake:
+
+- wait until clock is low
+- set data low
+
+After that it starts its main loop:
+
+- wait until clock is high
+- turn on drive LED
+- receive 4 bytes (in transmission order: sector, track, highbyte, lowbyte)
+- jump to the address received
+- wait until clock is low
+- turn off drive LED
+- restart loader main loop
+
+Unlike the GEOS loaders Wheels calls every function using a jump table
+located at $0303-$031d, so the addresses transmitted are the same for
+every drive type.
+
+0303: QUIT
+0306: WRITE
+0309: READ
+030c: READLINK
+030f: STATUS
+0312: NATIVE_FREE
+0315: GET_CURRENT_PART_DIR
+0318: SET_CURRENT_PART_DIR
+031b: CHECK_CHANGE
+
+NOTE: Wheels 4.4 moves the jump table to 0403 on the 1541 and 1571 or
+0503 on the CMD FD/HD, but the functions and their order is the same.
+
+For CMD drives there are two variations of the loader - one is used
+for native partitions and implements NATIVE_FREE and
+GET_CURRENT_PART_DIR, the other is used for 1581 partitions and omits
+those two functions.
+
+The CMD FD is the only drive that implements all of these
+functions. For the HD, the CHECK_CHANGE function is always dummied out
+(nop/nop/rts), for standard Commodore drives the NATIVE_FREE,
+GET_CURRENT_PART_DIR and SET_CURRENT_PART_DIR functions are dummied
+out (nop/nop/rts).
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doscmd.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doscmd.c
new file mode 100644
index 00000000..131218e0
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doscmd.c
@@ -0,0 +1,2108 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   doscmd.c: Command channel parser
+
+*/
+
+#include <util/delay.h>
+#include <avr/eeprom.h>
+#include <avr/wdt.h>
+#include <avr/interrupt.h>
+#include <ctype.h>
+#include <stdlib.h>
+#include <string.h>
+#include <util/crc16.h>
+#include "config.h"
+#include "d64ops.h"
+#include "dirent.h"
+#include "diskchange.h"
+#include "diskio.h"
+#include "display.h"
+#include "eeprom.h"
+#include "errormsg.h"
+#include "fastloader.h"
+#include "fastloader-ll.h"
+#include "fatops.h"
+#include "ff.h"
+#include "flags.h"
+#include "iec.h"
+#include "m2iops.h"
+#include "parser.h"
+#include "time.h"
+#include "rtc.h"
+#include "uart.h"
+#include "ustring.h"
+#include "utils.h"
+#include "wrapops.h"
+#include "doscmd.h"
+
+#define CURSOR_RIGHT 0x1d
+
+static void (*restart_call)(void) = 0;
+
+static FIL romfile;
+
+/* ---- Fastloader tables ---- */
+
+enum {
+  RXTX_NONE,
+  RXTX_GEOS_1MHZ,
+  RXTX_GEOS_2MHZ,
+  RXTX_GEOS_1581_21,
+  RXTX_WHEELS_1MHZ,
+  RXTX_WHEELS_2MHZ,
+  RXTX_WHEELS44_1541,
+  RXTX_WHEELS44_1581,
+};
+
+typedef uint8_t (*fastloader_rx_t)(void);
+typedef void    (*fastloader_tx_t)(uint8_t byte);
+typedef void    (*fastloader_handler_t)(uint8_t param);
+
+struct fastloader_rxtx_s {
+  fastloader_rx_t rxfunc;
+  fastloader_tx_t txfunc;
+};
+
+static const PROGMEM struct fastloader_rxtx_s fl_rxtx_table[] = {
+#ifdef CONFIG_LOADER_GEOS
+  [RXTX_GEOS_1MHZ]     = { geos_get_byte_1mhz,     geos_send_byte_1mhz     },
+  [RXTX_GEOS_2MHZ]     = { geos_get_byte_2mhz,     geos_send_byte_2mhz     },
+  [RXTX_GEOS_1581_21]  = { geos_get_byte_2mhz,     geos_send_byte_1581_21  },
+# ifdef CONFIG_LOADER_WHEELS
+  [RXTX_WHEELS_1MHZ]   = { wheels_get_byte_1mhz,   wheels_send_byte_1mhz   },
+  [RXTX_WHEELS_2MHZ]   = { geos_get_byte_2mhz,     geos_send_byte_1581_21  },
+  [RXTX_WHEELS44_1541] = { wheels44_get_byte_1mhz, wheels_send_byte_1mhz   },
+  [RXTX_WHEELS44_1581] = { wheels44_get_byte_2mhz, wheels44_send_byte_2mhz },
+# endif
+#endif
+};
+
+struct fastloader_crc_s {
+  uint16_t crc;
+  uint8_t  loadertype;
+  uint8_t  rxtx;
+};
+
+static const PROGMEM struct fastloader_crc_s fl_crc_table[] = {
+#ifdef CONFIG_LOADER_TURBODISK
+  { 0x9c9f, FL_TURBODISK,        RXTX_NONE          },
+#endif
+#ifdef CONFIG_LOADER_FC3
+  { 0x6510, FL_FC3_LOAD,         RXTX_NONE          }, // Final Cartridge III
+  { 0x7e38, FL_FC3_LOAD,         RXTX_NONE          }, // EXOS v3
+  { 0x2c86, FL_FC3_SAVE,         RXTX_NONE          },
+  { 0x9930, FL_FC3_FREEZED,      RXTX_NONE          },
+#endif
+#ifdef CONFIG_LOADER_DREAMLOAD
+  { 0x2e69, FL_DREAMLOAD,        RXTX_NONE          },
+#endif
+#ifdef CONFIG_LOADER_ULOAD3
+  { 0xdd81, FL_ULOAD3,           RXTX_NONE          },
+#endif
+#ifdef CONFIG_LOADER_ELOAD1
+  { 0x393e, FL_ELOAD1,           RXTX_NONE          },
+#endif
+#ifdef CONFIG_LOADER_EPYXCART
+  { 0x5a01, FL_EPYXCART,         RXTX_NONE          },
+#endif
+#ifdef CONFIG_LOADER_GEOS
+  { 0x4d79, FL_GEOS_S23_1541,    RXTX_GEOS_1MHZ     }, // GEOS 64 1541 stage 2
+  { 0xb2bc, FL_GEOS_S23_1541,    RXTX_GEOS_1MHZ     }, // GEOS 128 1541 stage 2
+  { 0xb272, FL_GEOS_S23_1541,    RXTX_GEOS_1MHZ     }, // GEOS 64/128 1541 stage 3 (Configure)
+  { 0xdaed, FL_GEOS_S23_1571,    RXTX_GEOS_2MHZ     }, // GEOS 64/128 1571 stage 3 (Configure)
+  { 0x3f8d, FL_GEOS_S23_1581,    RXTX_GEOS_2MHZ     }, // GEOS 64/128 1581 Configure 2.0
+  { 0xc947, FL_GEOS_S23_1581,    RXTX_GEOS_1581_21  }, // GEOS 64/128 1581 Configure 2.1
+# ifdef CONFIG_LOADER_WHEELS
+  { 0xf140, FL_WHEELS_S1_64,     RXTX_WHEELS_1MHZ   }, // Wheels 64 stage 1
+  { 0x737e, FL_WHEELS_S1_128,    RXTX_WHEELS_1MHZ   }, // Wheels 128 stage 1
+  { 0x755a, FL_WHEELS_S2,        RXTX_WHEELS_1MHZ   }, // Wheels 64 1541 stage 2
+  { 0x2920, FL_WHEELS_S2,        RXTX_WHEELS_1MHZ   }, // Wheels 128 1541 stage 2
+  { 0x18e9, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 64 1571
+  { 0x9804, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 64 1581
+  { 0x48f5, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 64 FD native partition
+  { 0x1356, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 64 FD emulation partition
+  { 0xe885, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 64 HD native partition
+  { 0x4eca, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 64 HD emulation partition
+  { 0xdbf6, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 128 1571
+  { 0xe4ab, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 128 1581
+  { 0x6de5, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 128 FD native
+  { 0x30ff, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 128 FD emulation
+  { 0x46e7, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 128 HD native
+  { 0x2253, FL_WHEELS_S2,        RXTX_WHEELS_2MHZ   }, // Wheels 128 HD emulation
+  { 0xc26a, FL_WHEELS44_S2,      RXTX_WHEELS44_1541 }, // Wheels 64/128 4.4 1541
+  { 0x550c, FL_WHEELS44_S2,      RXTX_WHEELS44_1541 }, // Wheels 64/128 4.4 1571
+  { 0x825b, FL_WHEELS44_S2_1581, RXTX_WHEELS44_1581 }, // Wheels 64/128 4.4 1581
+  { 0x245b, FL_WHEELS44_S2_1581, RXTX_WHEELS44_1581 }, // Wheels 64/128 4.4 1581
+  { 0x7021, FL_WHEELS44_S2_1581, RXTX_WHEELS44_1581 }, // Wheels 64/128 4.4 1581
+  { 0xd537, FL_WHEELS44_S2_1581, RXTX_WHEELS44_1581 }, // Wheels 64/128 4.4 1581
+  { 0xf635, FL_WHEELS44_S2_1581, RXTX_WHEELS44_1581 }, // Wheels 64/128 4.4 1581
+# endif
+#endif
+#ifdef CONFIG_LOADER_NIPPON
+  { 0x43c1, FL_NIPPON,           RXTX_NONE          }, // Nippon
+#endif
+#ifdef CONFIG_LOADER_AR6
+  { 0x4870, FL_AR6_1581_LOAD,    RXTX_NONE          },
+  { 0x2925, FL_AR6_1581_SAVE,    RXTX_NONE          },
+#endif
+
+  { 0, FL_NONE, 0 }, // end marker
+};
+
+struct fastloader_handler_s {
+  uint16_t             address;
+  uint8_t              loadertype;
+  fastloader_handler_t handler;
+  uint8_t              parameter;
+};
+
+static const PROGMEM struct fastloader_handler_s fl_handler_table[] = {
+#ifdef CONFIG_LOADER_TURBODISK
+  { 0x0303, FL_TURBODISK,        load_turbodisk, 0 },
+#endif
+#ifdef CONFIG_LOADER_FC3
+  { 0x059a, FL_FC3_LOAD,         load_fc3,       0 }, // FC3
+  { 0x0400, FL_FC3_LOAD,         load_fc3,       0 }, // EXOS
+  { 0x059c, FL_FC3_SAVE,         save_fc3,       0 },
+  { 0x0403, FL_FC3_FREEZED,      load_fc3,       1 },
+#endif
+#ifdef CONFIG_LOADER_DREAMLOAD
+  { 0x0700, FL_DREAMLOAD,        load_dreamload, 0 },
+#endif
+#ifdef CONFIG_LOADER_ULOAD3
+  { 0x0336, FL_ULOAD3,           load_uload3,    0 },
+#endif
+#ifdef CONFIG_LOADER_ELOAD1
+  { 0x0300, FL_ELOAD1,           load_eload1,    0 },
+#endif
+#ifdef CONFIG_LOADER_GIJOE
+  { 0x0500, FL_GI_JOE,           load_gijoe,     0 },
+#endif
+#ifdef CONFIG_LOADER_EPYXCART
+  { 0x01a9, FL_EPYXCART,         load_epyxcart,  0 },
+#endif
+#ifdef CONFIG_LOADER_GEOS
+  { 0x0457, FL_GEOS_S1,          load_geos_s1,   0 },
+  { 0x0470, FL_GEOS_S1,          load_geos_s1,   1 },
+  { 0x03e2, FL_GEOS_S23_1541,    load_geos,      0 },
+  { 0x03dc, FL_GEOS_S23_1541,    load_geos,      0 },
+  { 0x03ff, FL_GEOS_S23_1571,    load_geos,      0 },
+  { 0x040f, FL_GEOS_S23_1581,    load_geos,      0 },
+# ifdef CONFIG_LOADER_WHEELS
+  { 0x0400, FL_WHEELS_S1_64,     load_wheels_s1, 0 },
+  { 0x0400, FL_WHEELS_S1_128,    load_wheels_s1, 1 },
+  { 0x0300, FL_WHEELS_S2,        load_wheels_s2, 0 },
+  { 0x0400, FL_WHEELS44_S2,      load_wheels_s2, 0 },
+  { 0x0300, FL_WHEELS44_S2_1581, load_wheels_s2, 0 },
+  { 0x0500, FL_WHEELS44_S2_1581, load_wheels_s2, 0 },
+# endif
+#endif
+#ifdef CONFIG_LOADER_NIPPON
+  { 0x0300, FL_NIPPON,           load_nippon,    0 },
+#endif
+#ifdef CONFIG_LOADER_AR6
+  { 0x0500, FL_AR6_1581_LOAD,    load_ar6_1581,  0 },
+  { 0x05f4, FL_AR6_1581_SAVE,    save_ar6_1581,  0 },
+#endif
+
+  { 0, FL_NONE, NULL, 0 }, // end marker
+};
+
+/* ---- Minimal drive rom emulation ---- */
+
+typedef struct magic_value_s {
+  uint16_t address;
+  uint8_t  val[2];
+} magic_value_t;
+
+/* These are address/value pairs used by some programs to detect a 1541. */
+/* Currently we remember two bytes per address since that's the longest  */
+/* block required. */
+static const PROGMEM magic_value_t c1541_magics[] = {
+  { 0xfea0, { 0x0d, 0xed } }, /* used by DreamLoad and ULoad Model 3 */
+  { 0xe5c6, { 0x34, 0xb1 } }, /* used by DreamLoad and ULoad Model 3 */
+  { 0xfffe, { 0x00, 0x00 } }, /* Disable AR6 fastloader */
+  { 0,      { 0, 0 } }        /* end mark */
+};
+
+/* System partition G-P answer */
+static const PROGMEM uint8_t system_partition_info[] = {
+  0xff,0xe2,0x00,0x53,0x59,0x53,0x54,0x45,
+  0x4d,0xa0,0xa0,0xa0,0xa0,0xa0,0xa0,0xa0,
+  0xa0,0xa0,0xa0,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x0d
+};
+
+#ifndef __AVR__
+/* AVR uses GPIOR for this */
+uint8_t globalflags;
+#endif
+
+uint8_t command_buffer[CONFIG_COMMAND_BUFFER_SIZE+2];
+uint8_t command_length,original_length;
+
+date_t date_match_start;
+date_t date_match_end;
+
+uint16_t datacrc = 0xffff;
+static uint8_t previous_loader;
+
+#ifdef CONFIG_STACK_TRACKING
+uint16_t minstack = RAMEND;
+
+void __cyg_profile_func_enter (void *this_fn, void *call_site) __attribute__((no_instrument_function));
+void __cyg_profile_func_exit  (void *this_fn, void *call_site) __attribute__((alias("__cyg_profile_func_enter")));
+
+void __cyg_profile_func_enter (void *this_fn, void *call_site) {
+  if (SP < minstack) minstack = SP;
+}
+#endif
+
+#if CONFIG_RTC_VARIANT > 0
+/* Days of the week as used by the CMD FD */
+static const PROGMEM uint8_t downames[] = "SUN.MON.TUESWED.THURFRI.SAT.";
+
+/* Skeleton of the ASCII time format */
+static const PROGMEM uint8_t asciitime_skel[] = " xx/xx/xx xx:xx:xx xM\r";
+#endif
+
+#ifdef CONFIG_CAPTURE_LOADERS
+static uint8_t loader_buffer[CONFIG_CAPTURE_BUFFER_SIZE];
+static uint8_t *loader_ptr = loader_buffer;
+static uint8_t capture_count = 0;
+
+/* ------------------------------------------------------------------------- */
+/*  Capture helpers                                                          */
+/* ------------------------------------------------------------------------- */
+
+/* Convert byte to two-character hex string */
+static uint8_t *byte_to_hex(uint8_t num, uint8_t *str) {
+  uint8_t tmp;
+
+  tmp = (num & 0xf0) >> 4;
+  if (tmp < 10)
+    *str++ = '0' + tmp;
+  else
+    *str++ = 'a' + tmp - 10;
+
+  tmp = num & 0x0f;
+  if (tmp < 10)
+    *str++ = '0' + tmp;
+  else
+    *str++ = 'a' + tmp - 10;
+
+  return str;
+}
+
+/* Copy command to capture buffer */
+static void dump_command(void) {
+  if (loader_ptr - loader_buffer + command_length + 2+1 < CONFIG_CAPTURE_BUFFER_SIZE) {
+    *loader_ptr++ = 'C';
+    *loader_ptr++ = command_length;
+    memcpy(loader_ptr, command_buffer, command_length);
+    loader_ptr += command_length;
+  } else {
+    *loader_ptr = 'X';
+  }
+}
+
+/* Dump buffer state */
+static void dump_buffer_state(void) {
+  if (CONFIG_CAPTURE_BUFFER_SIZE - (loader_ptr - loader_buffer) > sizeof(buffer_t)*CONFIG_BUFFER_COUNT+2) {
+    *loader_ptr++ = 'B';
+    *loader_ptr++ = sizeof(buffer_t);
+    *loader_ptr++ = CONFIG_BUFFER_COUNT;
+    memcpy(loader_ptr, buffers, sizeof(buffer_t) * CONFIG_BUFFER_COUNT);
+    loader_ptr += sizeof(buffer_t) * CONFIG_BUFFER_COUNT;
+  }
+}
+
+/* Save capture buffer to disk */
+static void save_capbuffer(void) {
+  uint8_t *ptr;
+  FIL datafile;
+
+  /* Use CRC and counter as file name */
+  ptr = byte_to_hex(datacrc >> 8, entrybuf);
+  ptr = byte_to_hex(datacrc & 0xff, ptr);
+  *ptr++ = '-';
+  ptr = byte_to_hex(capture_count++, ptr);
+  *ptr++ = '.';
+  *ptr++ = 'd';
+  *ptr++ = 'm';
+  *ptr++ = 'p';
+  *ptr   = 0;
+
+  FRESULT res = f_open(&partition[0].fatfs, &datafile, entrybuf, FA_WRITE | FA_CREATE_ALWAYS);
+  if (res == FR_OK) {
+    UINT byteswritten;
+
+    /* Skip the error checks here */
+    f_write(&datafile, loader_buffer, loader_ptr - loader_buffer, &byteswritten);
+    f_close(&datafile);
+  }
+
+  /* Reset capture buffer */
+  loader_ptr = loader_buffer;
+
+  /* Notify the user */
+  set_error(ERROR_DRIVE_NOT_READY);
+}
+
+#endif
+
+/* ------------------------------------------------------------------------- */
+/*  Parsing helpers                                                          */
+/* ------------------------------------------------------------------------- */
+
+/* Fill the end of the command buffer with 0x00  */
+/* so C string functions can work on file names. */
+
+static void clean_cmdbuffer(void) {
+  memset(command_buffer+command_length, 0, sizeof(command_buffer)-command_length);
+}
+
+
+/* Parse parameters of block commands in the command buffer */
+/* Returns number of parameters (up to 4) or <0 on error    */
+static int8_t parse_blockparam(uint8_t values[]) {
+  uint8_t paramcount = 0;
+  uint8_t *str;
+
+  str = ustrchr(command_buffer, ':');
+  if (!str) {
+    if (ustrlen(command_buffer) < 3)
+      return -1;
+    str = command_buffer + 2;
+  }
+
+  str++;
+
+  while (*str && paramcount < 4) {
+    /* Skip all spaces, cursor-rights and commas - CC7C */
+    while (*str == ' ' || *str == 0x1d || *str == ',') str++;
+    if (!*str)
+      break;
+
+    values[paramcount++] = parse_number(&str);
+  }
+
+  return paramcount;
+}
+
+static uint8_t parse_bool(void) {
+  switch (command_buffer[2]) {
+  case '+':
+    return 1;
+
+  case '-':
+    return 0;
+
+  default:
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    return 255;
+  }
+}
+
+/* ------------------------------------------------------------------------- */
+/*  Command handlers                                                         */
+/* ------------------------------------------------------------------------- */
+
+/* ------------------- */
+/*  CD/MD/RD commands  */
+/* ------------------- */
+
+/* --- MD --- */
+static void parse_mkdir(void) {
+  path_t  path;
+  uint8_t *name;
+
+  /* MD requires a colon */
+  if (!ustrchr(command_buffer, ':')) {
+    set_error(ERROR_SYNTAX_NONAME);
+    return;
+  }
+  if (parse_path(command_buffer+2, &path, &name, 0))
+    return;
+  mkdir(&path,name);
+}
+
+/* --- CD --- */
+static void parse_chdir(void) {
+  path_t  path;
+  uint8_t *name;
+  cbmdirent_t dent;
+
+  if (parse_path(command_buffer+2, &path, &name, 1))
+    return;
+
+  if (ustrlen(name) != 0) {
+    /* Path component after the : */
+    if (name[0] == '_') {
+      /* Going up a level */
+      ustrcpy(dent.name, name);
+      if (chdir(&path,&dent))
+        return;
+    } else {
+      /* A directory name - try to match it */
+      if (first_match(&path, name, FLAG_HIDDEN, &dent))
+        return;
+
+      if (chdir(&path, &dent))
+        return;
+    }
+  } else {
+    if (!ustrchr(command_buffer, '/')) {
+      set_error(ERROR_FILE_NOT_FOUND_39);
+      return;
+    }
+  }
+
+  update_current_dir(&path);
+
+  if (globalflags & AUTOSWAP_ACTIVE)
+    set_changelist(NULL, NULLSTRING);
+}
+
+/* --- RD --- */
+static void parse_rmdir(void) {
+  uint8_t *str;
+  uint8_t res;
+  uint8_t part;
+  path_t  path;
+  cbmdirent_t dent,chkdent;
+  dh_t dh;
+
+  /* No deletion across subdirectories */
+  if (ustrchr(command_buffer, '/')) {
+    set_error(ERROR_SYNTAX_NONAME);
+    return;
+  }
+
+  /* Parse partition number */
+  str = command_buffer+2;
+  part = parse_partition(&str);
+  if (*str != ':') {
+    set_error(ERROR_SYNTAX_NONAME);
+  } else {
+    path.part = part;
+    path.dir  = partition[part].current_dir;
+
+    if (first_match(&path, str+1, TYPE_DIR, &dent) != 0)
+      return;
+
+    /* Check if there is anything in that directory */
+    if (chdir(&path, &dent))
+      return;
+
+    if (opendir(&dh, &path))
+      return;
+
+    if (readdir(&dh, &chkdent) != -1) {
+      if (current_error == 0)
+        set_error(ERROR_FILE_EXISTS);
+      return;
+    }
+
+    path.dir = partition[part].current_dir;
+
+    res = file_delete(&path, &dent);
+    if (res != 255)
+      set_error_ts(ERROR_SCRATCHED,res,0);
+  }
+}
+
+/* --- CD/MD/RD subparser --- */
+static void parse_dircommand(void) {
+  clean_cmdbuffer();
+
+  switch (command_buffer[0]) {
+  case 'M':
+    parse_mkdir();
+    break;
+
+  case 'C':
+    parse_chdir();
+    break;
+
+  case 'R':
+    parse_rmdir();
+    break;
+
+  default:
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    break;
+  }
+}
+
+
+/* ------------ */
+/*  B commands  */
+/* ------------ */
+static void parse_block(void) {
+  uint8_t  *str;
+  buffer_t *buf;
+  uint8_t  params[4];
+  int8_t   pcount;
+
+  clean_cmdbuffer();
+
+  str = ustrchr(command_buffer, '-');
+  if (!str) {
+    set_error(ERROR_SYNTAX_UNABLE);
+    return;
+  }
+
+  memset(params,0,sizeof(params));
+  pcount = parse_blockparam(params);
+  if (pcount < 0)
+    return;
+
+  str++;
+  switch (*str) {
+  case 'R':
+  case 'W':
+    /* Block-Read  - CD56 */
+    /* Block-Write - CD73 */
+    buf = find_buffer(params[0]);
+    if (!buf) {
+      set_error(ERROR_NO_CHANNEL);
+      return;
+    }
+
+    /* Use current partition for 0 */
+    if (params[1] == 0)
+      params[1] = current_part;
+
+    if (*str == 'R') {
+      read_sector(buf,params[1],params[2],params[3]);
+      if (command_buffer[0] == 'B') {
+        buf->position = 1;
+        buf->lastused = buf->data[0];
+      } else {
+        buf->position = 0;
+        buf->lastused = 255;
+      }
+    } else {
+      if (command_buffer[0] == 'B')
+        buf->data[0] = buf->position-1; // FIXME: Untested, verify!
+      write_sector(buf,params[1],params[2],params[3]);
+    }
+    break;
+
+  case 'P':
+    /* Buffer-Position - CDBD */
+    buf = find_buffer(params[0]);
+    if (!buf) {
+      set_error(ERROR_NO_CHANNEL);
+      return;
+    }
+    if (buf->pvt.buffer.size != 1) {
+      /* Extended position for large buffers */
+      uint8_t count = params[2];
+
+      /* Walk the chain, wrap whenever necessary */
+      buf->secondary = BUFFER_SEC_CHAIN - params[0];
+      buf = buf->pvt.buffer.first;
+      while (count--) {
+        if (buf->pvt.buffer.next != NULL)
+          buf = buf->pvt.buffer.next;
+        else
+          buf = buf->pvt.buffer.first;
+      }
+      buf->secondary = params[0];
+      buf->mustflush = 0;
+    }
+    buf->position = params[1];
+    break;
+
+  default:
+    set_error(ERROR_SYNTAX_UNABLE);
+    return;
+  }
+}
+
+
+/* ---------- */
+/*  C - Copy  */
+/* ---------- */
+static void parse_copy(void) {
+  path_t srcpath,dstpath;
+  uint8_t *srcname,*dstname,*tmp;
+  uint8_t savedtype;
+  int8_t res;
+  buffer_t *srcbuf,*dstbuf;
+  cbmdirent_t dent;
+
+  clean_cmdbuffer();
+
+  /* Find the = */
+  srcname = ustrchr(command_buffer,'=');
+  if (srcname == NULL) {
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    return;
+  }
+  *srcname++ = 0;
+
+  /* Parse the destination name */
+  if (parse_path(command_buffer+1, &dstpath, &dstname, 0))
+    return;
+
+  if (ustrlen(dstname) == 0) {
+    set_error(ERROR_SYNTAX_NONAME);
+    return;
+  }
+
+  /* Check for invalid characters in the destination name */
+  if (check_invalid_name(dstname)) {
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    return;
+  }
+
+  /* Check if the destination file exists */
+  res = first_match(&dstpath, dstname, FLAG_HIDDEN, &dent);
+  if (res == 0) {
+    set_error(ERROR_FILE_EXISTS);
+    return;
+  }
+
+  if (res > 0)
+    return;
+
+  set_error(ERROR_OK);
+
+  srcbuf = alloc_buffer();
+  dstbuf = alloc_buffer();
+  if (srcbuf == NULL || dstbuf == NULL)
+    return;
+
+  savedtype = 0;
+  srcname = ustr1tok(srcname,',',&tmp);
+  while (srcname != NULL) {
+    /* Parse the source path */
+    if (parse_path(srcname, &srcpath, &srcname, 0))
+      goto cleanup;
+
+    /* Open the current source file */
+    res = first_match(&srcpath, srcname, FLAG_HIDDEN, &dent);
+    if (res != 0)
+      goto cleanup;
+
+    /* Note: A 1541 can't copy REL files. We try to do better. */
+    if ((dent.typeflags & TYPE_MASK) == TYPE_REL) {
+      if (savedtype != 0 && savedtype != TYPE_REL) {
+        set_error(ERROR_FILE_TYPE_MISMATCH);
+        goto cleanup;
+      }
+      open_rel(&srcpath, &dent, srcbuf, 0, 1);
+    } else {
+      if (savedtype != 0 && savedtype == TYPE_REL) {
+        set_error(ERROR_FILE_TYPE_MISMATCH);
+        goto cleanup;
+      }
+      open_read(&srcpath, &dent, srcbuf);
+    }
+
+    if (current_error != 0)
+      goto cleanup;
+
+    /* Open the destination file (first source only) */
+    if (savedtype == 0) {
+      savedtype = dent.typeflags & TYPE_MASK;
+      memset(&dent, 0, sizeof(dent));
+      ustrncpy(dent.name, dstname, CBM_NAME_LENGTH);
+      if (savedtype == TYPE_REL)
+        open_rel(&dstpath, &dent, dstbuf, srcbuf->recordlen, 1);
+      else
+        open_write(&dstpath, &dent, savedtype, dstbuf, 0);
+    }
+
+    while (1) {
+      uint8_t tocopy;
+
+      if (savedtype == TYPE_REL)
+        tocopy = srcbuf->recordlen;
+      else
+        tocopy = 256-dstbuf->position;
+
+      if (tocopy > (srcbuf->lastused - srcbuf->position+1))
+        tocopy = srcbuf->lastused - srcbuf->position + 1;
+
+      if (tocopy > 256-dstbuf->position)
+        tocopy = 256-dstbuf->position;
+
+      memcpy(dstbuf->data + dstbuf->position,
+             srcbuf->data + srcbuf->position,
+             tocopy);
+      mark_buffer_dirty(dstbuf);
+      srcbuf->position += tocopy-1;  /* add 1 less, simplifies the test later */
+      dstbuf->position += tocopy;
+      dstbuf->lastused  = dstbuf->position-1;
+
+      /* End if we just copied the last data block */
+      if (srcbuf->sendeoi && srcbuf->position == srcbuf->lastused)
+        break;
+
+      /* Refill the buffers if required */
+      if (srcbuf->recordlen || srcbuf->position++ == srcbuf->lastused)
+        if (srcbuf->refill(srcbuf))
+          goto cleanup;
+
+      if (dstbuf->recordlen || dstbuf->position == 0)
+        if (dstbuf->refill(dstbuf))
+          goto cleanup;
+    }
+
+    /* Close current source file */
+    /* Free and reallocate the buffer. This is required because most of the  */
+    /* file_open code assumes that it will get a "pristine" buffer with      */
+    /* 0 is most of the fields. Allocation cannot fail at this point because */
+    /* there is at least one free buffer.                                    */
+    cleanup_and_free_buffer(srcbuf);
+    srcbuf = alloc_buffer();
+
+    /* Next file */
+    srcname = ustr1tok(NULL,',',&tmp);
+  }
+
+  cleanup:
+  /* Close the buffers */
+  srcbuf->cleanup(srcbuf);
+  cleanup_and_free_buffer(dstbuf);
+}
+
+
+/* ----------------------- */
+/*  CP - Change Partition  */
+/* ----------------------- */
+static void parse_changepart(void) {
+  uint8_t *str;
+  uint8_t part;
+
+  switch(command_buffer[1]) {
+  case 'P':
+    clean_cmdbuffer();
+    str  = command_buffer + 2;
+    part = parse_partition(&str);
+    break;
+
+  case 0xd0: /* Shift-P */
+    /* binary version */
+    part = command_buffer[2] - 1;
+    break;
+  }
+
+  if(part>=max_part) {
+    set_error_ts(ERROR_PARTITION_ILLEGAL,part+1,0);
+    return;
+  }
+
+  current_part=part;
+  if (globalflags & AUTOSWAP_ACTIVE)
+    set_changelist(NULL, NULLSTRING);
+
+  display_current_part(current_part);
+
+  set_error_ts(ERROR_PARTITION_SELECTED, part+1, 0);
+}
+
+
+/* ------------ */
+/*  D commands  */
+/* ------------ */
+static void parse_direct(void) {
+  buffer_t *buf;
+  uint8_t drive;
+  uint32_t sector;
+  DRESULT res;
+
+  /* This also guards against attempts to use the old Duplicate command. */
+  /* Its syntax is D1=0, so buffer[2] would never have a value that is   */
+  /* a valid secondary address.                                          */
+  buf = find_buffer(command_buffer[2]);
+  if (!buf) {
+    set_error(ERROR_NO_CHANNEL);
+    return;
+  }
+
+  if (buf->pvt.buffer.size > 1) {
+    uint8_t oldsec = buf->secondary;
+    buf->secondary = BUFFER_SEC_CHAIN - oldsec;
+    buf = buf->pvt.buffer.first;
+    buf->secondary = oldsec;
+  }
+
+  buf->position = 0;
+  buf->lastused = 255;
+
+  drive = command_buffer[3];
+  sector = *((uint32_t *)(command_buffer+4));
+
+  switch (command_buffer[1]) {
+  case 'I':
+    /* Get information */
+    memset(buf->data,0,256);
+    if (disk_getinfo(drive, command_buffer[4], buf->data) != RES_OK) {
+      set_error(ERROR_DRIVE_NOT_READY);
+      return;
+    }
+    break;
+
+  case 'R':
+    /* Read sector */
+    if (buf->pvt.buffer.size < 2) { // FIXME: Assumes 512-byte sectors
+      set_error(ERROR_BUFFER_TOO_SMALL);
+      return;
+    }
+    res = disk_read(drive, buf->data, sector, 1);
+    switch (res) {
+    case RES_OK:
+      return;
+
+    case RES_ERROR:
+      set_error(ERROR_READ_NOHEADER); // Any random READ ERROR
+      return;
+
+    case RES_PARERR:
+    case RES_NOTRDY:
+    default:
+      set_error_ts(ERROR_DRIVE_NOT_READY,res,0);
+      return;
+    }
+
+  case 'W':
+    /* Write sector */
+    if (buf->pvt.buffer.size < 2) { // FIXME: Assumes 512-byte sectors
+      set_error(ERROR_BUFFER_TOO_SMALL);
+      return;
+    }
+    res = disk_write(drive, buf->data, sector, 1);
+    switch(res) {
+    case RES_OK:
+      return;
+
+    case RES_WRPRT:
+      set_error(ERROR_WRITE_PROTECT);
+      return;
+
+    case RES_ERROR:
+      set_error(ERROR_WRITE_VERIFY);
+      return;
+
+    case RES_NOTRDY:
+    case RES_PARERR:
+    default:
+      set_error_ts(ERROR_DRIVE_NOT_READY,res,0);
+      return;
+    }
+
+  default:
+    set_error(ERROR_SYNTAX_UNABLE);
+    break;
+  }
+}
+
+
+/* ------------ */
+/*  E commands  */
+/* ------------ */
+
+/* --- E-R --- */
+static void handle_eeread(uint16_t address, uint8_t length) {
+  if (length > CONFIG_ERROR_BUFFER_SIZE) {
+    set_error(ERROR_SYNTAX_TOOLONG);
+    return;
+  }
+
+  buffers[CONFIG_BUFFER_COUNT].position = 0;
+  buffers[CONFIG_BUFFER_COUNT].lastused = length-1;
+
+  uint8_t *ptr = error_buffer;
+  while (length--)
+    *ptr++ = eeprom_read_byte((uint8_t *)(CONFIG_EEPROM_OFFSET + address++));
+}
+
+/* --- E-W --- */
+static void handle_eewrite(uint16_t address, uint8_t length) {
+  uint8_t *ptr = command_buffer+6;
+  while (length--)
+    eeprom_write_byte((uint8_t *)(CONFIG_EEPROM_OFFSET + address++), *ptr++);
+}
+
+/* --- E subparser --- */
+static void parse_eeprom(void) {
+  uint16_t address = command_buffer[3] + (command_buffer[4] << 8);
+  uint8_t  length  = command_buffer[5];
+
+  if (command_length < 6) {
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    return;
+  }
+
+  if (command_buffer[1] != '-' || (command_buffer[2] != 'W' && command_buffer[2] != 'R'))
+    set_error(ERROR_SYNTAX_UNKNOWN);
+
+  if (address > CONFIG_EEPROM_SIZE || address+length > CONFIG_EEPROM_SIZE) {
+    set_error(ERROR_SYNTAX_TOOLONG);
+    return;
+  }
+
+  if (command_buffer[2] == 'W')
+    handle_eewrite(address, length);
+  else
+    handle_eeread(address, length);
+}
+
+
+/* -------------------------- */
+/*  G-P - Get Partition info  */
+/* -------------------------- */
+static void parse_getpartition(void) {
+  uint8_t *ptr;
+  uint8_t part;
+
+  if (command_length < 3) /* FIXME: should this set an error? */
+    return;
+
+  if (command_buffer[1] != '-' || command_buffer[2] != 'P') {
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    return;
+  }
+
+  if (command_length == 3 || command_buffer[3] == 0xff)
+    part = current_part + 1;
+  else
+    part = command_buffer[3];
+
+  buffers[CONFIG_BUFFER_COUNT].position = 0;
+  buffers[CONFIG_BUFFER_COUNT].lastused = 30;
+
+  memset(error_buffer,0,30);
+  error_buffer[30] = 13;
+  ptr = error_buffer;
+
+  if (part > max_part) {
+    /* Nonexisting partition - return empty answer */
+    ptr[30] = 13;
+    return;
+  }
+
+  if (part == 0) {
+    /* System partition - return static info */
+    memcpy_P(ptr, system_partition_info, sizeof(system_partition_info));
+    return;
+  }
+
+  part -= 1;
+
+  /* Create partition info */
+  if (partition[part].fop == &d64ops) {
+    /* Use type of mounted image as partition type */
+    *ptr++ = partition[part].imagetype & D64_TYPE_MASK;
+  } else {
+    /* Use native for anything else */
+    *ptr++ = 1;
+  }
+  *ptr++ = 0xe2; // 1.6MB disk - "reserved" for HD
+
+  *ptr++ = part+1;
+
+  /* Read partition label */
+  memset(ptr, 0xa0, 16);
+  if (disk_label(part, entrybuf)) {
+    return;
+  }
+
+  uint8_t *inptr  = entrybuf;
+  uint8_t *outptr = ptr;
+  while (*inptr)
+    *outptr++ = *inptr++;
+
+  ptr += 16;
+  *ptr++ = (partition[part].fatfs.fatbase >> 16) & 0xff;
+  *ptr++ = (partition[part].fatfs.fatbase >>  8) & 0xff;
+  *ptr++ = (partition[part].fatfs.fatbase      ) & 0xff;
+  ptr += 5; // reserved bytes
+
+  uint32_t size = (partition[part].fatfs.max_clust - 1) * partition[part].fatfs.csize;
+  *ptr++ = (size >> 16) & 0xff;
+  *ptr++ = (size >>  8) & 0xff;
+  *ptr   = size & 0xff;
+}
+
+
+/* ---------------- */
+/*  I - Initialize  */
+/* ---------------- */
+static void parse_initialize(void) {
+  if (disk_state != DISK_OK)
+    set_error_ts(ERROR_READ_NOSYNC,18,0);
+  else
+    free_multiple_buffers(FMB_USER_CLEAN);
+}
+
+
+/* ------------ */
+/*  M commands  */
+/* ------------ */
+
+/* --- M-E --- */
+static void handle_memexec(void) {
+  uint16_t address;
+
+  if (command_length < 5)
+    return;
+
+  if (detected_loader == FL_NONE) {
+    uart_puts_P(PSTR("M-E at "));
+    uart_puthex(command_buffer[4]);
+    uart_puthex(command_buffer[3]);
+    uart_puts_P(PSTR(", CRC "));
+    uart_puthex(datacrc >> 8);
+    uart_puthex(datacrc & 0xff);
+    uart_putcrlf();
+  }
+
+  if (detected_loader == FL_NONE)
+    detected_loader = previous_loader;
+
+#ifdef CONFIG_CAPTURE_LOADERS
+  if (detected_loader == FL_NONE && datacrc != 0xffff) {
+    dump_command();
+    dump_buffer_state();
+    save_capbuffer();
+  }
+#endif
+
+  /* Try to find handler for loader */
+  const struct fastloader_handler_s *ptr = fl_handler_table;
+  uint8_t loader,parameter;
+  fastloader_handler_t handler;
+
+  address = command_buffer[3] + (command_buffer[4]<<8);
+  while ( (loader = pgm_read_byte(&ptr->loadertype)) != FL_NONE ) {
+    if (detected_loader == loader &&
+        address == pgm_read_word(&ptr->address)) {
+      /* Found it */
+      handler   = (fastloader_handler_t)pgm_read_word(&ptr->handler);
+      parameter = pgm_read_byte(&ptr->parameter);
+
+      /* Call */
+      handler(parameter);
+
+      break;
+    }
+    ptr++;
+  }
+
+  datacrc = 0xffff;
+  previous_loader = detected_loader;
+  detected_loader = FL_NONE;
+}
+
+/* --- M-R --- */
+static void handle_memread(void) {
+  FRESULT res;
+  uint16_t address, check;
+  magic_value_t *p;
+
+  if (command_length < 6)
+    return;
+
+  address = command_buffer[3] + (command_buffer[4]<<8);
+
+  if (address >= 0x8000 && rom_filename[0] != 0) {
+    /* Try to use the rom file as data source - look in the current dir first */
+    partition[current_part].fatfs.curr_dir = partition[current_part].current_dir.fat;
+    res = f_open(&partition[current_part].fatfs, &romfile, rom_filename, FA_READ | FA_OPEN_EXISTING);
+
+    if (res != FR_OK) {
+      /* Not successful, try root dir */
+      partition[current_part].fatfs.curr_dir = 0;
+      res = f_open(&partition[current_part].fatfs, &romfile, rom_filename, FA_READ | FA_OPEN_EXISTING);
+
+      if (res != FR_OK) {
+        /* Not successful, try root of drive 0 */
+        partition[0].fatfs.curr_dir = 0;
+        res = f_open(&partition[0].fatfs, &romfile, rom_filename, FA_READ | FA_OPEN_EXISTING);
+
+        if (res != FR_OK)
+          /* No file available - use internal table */
+          goto use_internal;
+      }
+    }
+
+    /* One of the f_open calls was successful */
+    address -= 0x8000;
+    if (romfile.fsize < 32*1024U)
+      /* Allow 16K 1541 roms */
+      address &= 0x3fff;
+
+    if ((romfile.fsize & 0x3fff) != 0)
+      /* Skip header bytes */
+      address += romfile.fsize & 0x3fff;
+
+    res = f_lseek(&romfile, address);
+    if (res != FR_OK)
+      goto use_internal;
+
+    /* Clamp maximum read length to buffer size */
+    uint8_t bytes = command_buffer[5];
+    if (bytes > sizeof(error_buffer))
+      bytes = sizeof(error_buffer);
+
+    UINT bytesread;
+    res = f_read(&romfile, error_buffer, bytes, &bytesread);
+    if (res != FR_OK || bytesread != bytes)
+      goto use_internal;
+
+    /* Note: f_close isn't neccessary in FatFs for read-only files */
+
+  } else {
+  use_internal:
+    /* Check some special addresses used for drive detection. */
+    p = (magic_value_t*) c1541_magics;
+    while ( (check = pgm_read_word(&p->address)) ) {
+      if (check == address) {
+        error_buffer[0] = pgm_read_byte(p->val);
+        error_buffer[1] = pgm_read_byte(p->val + 1);
+        break;
+      }
+      p++;
+    }
+  }
+
+  /* possibly the host wants to read more bytes than error_buffer size */
+  /* we ignore this knowing that we return nonsense in this case       */
+  buffers[CONFIG_BUFFER_COUNT].data     = error_buffer;
+  buffers[CONFIG_BUFFER_COUNT].position = 0;
+  buffers[CONFIG_BUFFER_COUNT].lastused = command_buffer[5]-1;
+}
+
+/* --- M-W --- */
+static void handle_memwrite(void) {
+  uint16_t address;
+  uint8_t  length,i;
+  
+
+  if (command_length < 6)
+    return;
+
+  address = command_buffer[3] + (command_buffer[4]<<8);
+  length  = command_buffer[5];
+
+  if (address == 119) {
+    /* Change device address, 1541 style */
+    device_address = command_buffer[6] & 0x1f;
+    display_address(device_address);
+    return;
+  }
+
+  if (address == 0x1c06 || address == 0x1c07) {
+    /* Ignore attempts to increase the VIA timer frequency */
+    return;
+  }
+
+  previous_loader = FL_NONE;
+
+  for (i=0;i<command_buffer[5];i++) {
+    datacrc = _crc16_update(datacrc, command_buffer[i+6]);
+
+#ifdef CONFIG_LOADER_GIJOE
+    /* Identical code, but lots of different upload variations */
+    if (datacrc == 0x38a2 && command_buffer[i+6] == 0x60)
+      detected_loader = FL_GI_JOE;
+#endif
+  }
+
+  /* Figure out the fastloader based on the current CRC */
+  const struct fastloader_crc_s *crcptr = fl_crc_table;
+  uint8_t loader;
+
+  while ( (loader = pgm_read_byte(&crcptr->loadertype)) != FL_NONE ) {
+    if (datacrc == pgm_read_word(&crcptr->crc))
+      break;
+
+    crcptr++;
+  }
+
+  /* Set RX/TX function pointers */
+  if (loader != FL_NONE) {
+    uint8_t index;
+
+    detected_loader = loader;
+    index = pgm_read_word(&crcptr->rxtx);
+
+#ifdef CONFIG_LOADER_GEOS
+    if (index != 0) {
+      geos_get_byte  = (fastloader_rx_t)pgm_read_word(&(fl_rxtx_table[index].rxfunc));
+      geos_send_byte = (fastloader_tx_t)pgm_read_word(&(fl_rxtx_table[index].txfunc));
+    }
+#endif
+  }
+
+
+#ifdef CONFIG_LOADER_GEOS
+  /* Capture decryption key */
+
+  if (detected_loader == FL_GEOS_S1_KEY) {
+    /* Copy encryption key */
+    buffer_t *buf = find_buffer(BUFFER_SYS_GEOSKEY);
+
+    if (buf->position < 256-32) {
+      /* Middle blocks - copy completely */
+      memcpy(buf->data + buf->position, command_buffer + 6, 32);
+      buf->position += 32;
+    } else {
+      /* Last interesting block, also the last block of the loader */
+      memcpy(buf->data + buf->position, command_buffer + 6, 254-buf->position);
+
+      /* Same ID for both, the address can be used to distinguish them */
+      detected_loader = FL_GEOS_S1;
+      geos_send_byte = geos_send_byte_1mhz;
+    }
+  }
+
+  if (datacrc == 0xb979 || datacrc == 0x2469) {
+    /* GEOS stage 1 encryption key starts in this block */
+    buffer_t *buf = alloc_system_buffer();
+
+    if (buf == NULL)
+      return;
+
+    stick_buffer(buf);
+    buf->secondary = BUFFER_SYS_GEOSKEY;
+    if (datacrc == 0xb979) {
+      /* GEOS 64 1.3/2.0 */
+      buf->position = 32-10;
+      memcpy(buf->data, command_buffer + 6 + 10, 32-10);
+    } else { // datacrc == 0x2469
+      /* GEOS 128 2.0 */
+      buf->position = 32-15;
+      memcpy(buf->data, command_buffer + 6 + 15, 32-15);
+    }
+
+    detected_loader = FL_GEOS_S1_KEY;
+  }
+
+#endif
+
+#ifdef CONFIG_CAPTURE_LOADERS
+  dump_command();
+#endif
+
+  if (detected_loader == FL_NONE) {
+    uart_puts_P(PSTR("M-W CRC result: "));
+    uart_puthex(datacrc >> 8);
+    uart_puthex(datacrc & 0xff);
+    uart_putcrlf();
+  }
+}
+
+/* --- M subparser --- */
+static void parse_memory(void) {
+  if (command_buffer[2] == 'W')
+    handle_memwrite();
+  else if (command_buffer[2] == 'E')
+    handle_memexec();
+  else if (command_buffer[2] == 'R')
+    handle_memread();
+  else
+    set_error(ERROR_SYNTAX_UNKNOWN);
+}
+
+/* --------- */
+/*  N - New  */
+/* --------- */
+static void parse_new(void) {
+  uint8_t *name, *id;
+  uint8_t part;
+
+  clean_cmdbuffer();
+
+  name = command_buffer+1;
+  part = parse_partition(&name);
+  name = ustrchr(command_buffer, ':');
+  if (name++ == NULL) {
+    set_error(ERROR_SYNTAX_NONAME);
+    return;
+  }
+
+  id = ustrchr(name, ',');
+  if (id != NULL) {
+    *id = 0;
+    id++;
+  }
+
+  format(part, name, id);
+}
+
+
+/* -------------- */
+/*  P - Position  */
+/* -------------- */
+static void parse_position(void) {
+  buffer_t *buf;
+
+  command_length = original_length;
+  clean_cmdbuffer();
+
+  if(command_length < 2 || (buf = find_buffer(command_buffer[1] & 0x0f)) == NULL) {
+    set_error(ERROR_NO_CHANNEL);
+    return;
+  }
+
+  if (buf->seek == NULL) {
+    set_error(ERROR_SYNTAX_UNABLE);
+    return;
+  }
+
+  if (buf->recordlen) {
+    /* REL file */
+    uint16_t record;
+    uint8_t  pos;
+    record = 1;
+    pos = 1;
+
+    if (command_length > 1)
+      record = command_buffer[2];
+    if (command_length > 2)
+      record |= command_buffer[3] << 8;
+    if (command_length > 3)
+      pos = command_buffer[4];
+
+    if (pos > buf->recordlen) {
+      set_error(ERROR_RECORD_OVERFLOW);
+      return;
+    }
+
+    if (record)
+      record--;
+
+    if (pos)
+      pos--;
+
+    buf->seek(buf, record * (uint32_t)buf->recordlen, pos);
+  } else {
+    /* Non-REL seek uses a straight little-endian offset */
+    union {
+      uint32_t l;
+      uint8_t  c[4];
+    } offset;
+
+    // smaller than memcpy
+    /* WARNING: Endian-dependant */
+    offset.c[0] = command_buffer[2];
+    offset.c[1] = command_buffer[3];
+    offset.c[2] = command_buffer[4];
+    offset.c[3] = command_buffer[5];
+
+    buf->seek(buf, offset.l, 0);
+  }
+}
+
+
+/* ------------ */
+/*  R - Rename  */
+/* ------------ */
+static void parse_rename(void) {
+  path_t oldpath,newpath;
+  uint8_t *oldname,*newname;
+  cbmdirent_t dent;
+  int8_t res;
+
+  clean_cmdbuffer();
+
+  /* Find the boundary between the names */
+  oldname = ustrchr(command_buffer,'=');
+  if (oldname == NULL) {
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    return;
+  }
+  *oldname++ = 0;
+
+  /* Parse both names */
+  if (parse_path(command_buffer+1, &newpath, &newname, 0))
+    return;
+
+  if (parse_path(oldname, &oldpath, &oldname, 0))
+    return;
+
+  /* Rename can't move files across directories */
+  if (memcmp(&oldpath.dir, &newpath.dir, sizeof(newpath.dir))) {
+    set_error(ERROR_FILE_NOT_FOUND);
+    return;
+  }
+
+  /* Check for invalid characters in the new name */
+  if (check_invalid_name(newname)) {
+    /* This isn't correct for all cases, but for most. */
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    return;
+  }
+
+  /* Don't allow an empty new name */
+  /* The 1541 renames the file to "=" in this case, but I consider that a bug. */
+  if (ustrlen(newname) == 0) {
+    set_error(ERROR_SYNTAX_NONAME);
+    return;
+  }
+
+  /* Check if the new name already exists */
+  res = first_match(&newpath, newname, FLAG_HIDDEN, &dent);
+  if (res == 0) {
+    set_error(ERROR_FILE_EXISTS);
+    return;
+  }
+
+  if (res > 0)
+    /* first_match generated an error other than File Not Found, abort */
+    return;
+
+  /* Clear the FNF */
+  set_error(ERROR_OK);
+
+  /* Check if the old name exists */
+  if (first_match(&oldpath, oldname, FLAG_HIDDEN, &dent))
+    return;
+
+  rename(&oldpath, &dent, newname);
+}
+
+
+/* ------------- */
+/*  S - Scratch  */
+/* ------------- */
+static void parse_scratch(void) {
+  cbmdirent_t dent;
+  int8_t  res;
+  uint8_t count,cnt;
+  uint8_t *filename,*tmp,*name;
+  path_t  path;
+
+  clean_cmdbuffer();
+
+  filename = ustr1tok(command_buffer+1,',',&tmp);
+
+  DIRTY_LED_ON();
+  count = 0;
+  /* Loop over all file names */
+  while (filename != NULL) {
+    parse_path(filename, &path, &name, 0);
+
+    if (opendir(&matchdh, &path))
+      return;
+
+    while (1) {
+      res = next_match(&matchdh, name, NULL, NULL, FLAG_HIDDEN, &dent);
+      if (res < 0)
+        break;
+      if (res > 0)
+        return;
+
+      /* Skip directories */
+      if ((dent.typeflags & TYPE_MASK) == TYPE_DIR)
+        continue;
+      cnt = file_delete(&path, &dent);
+      if (cnt != 255)
+        count += cnt;
+      else
+        return;
+    }
+
+    filename = ustr1tok(NULL,',',&tmp);
+  }
+
+  set_error_ts(ERROR_SCRATCHED,count,0);
+}
+
+
+#if CONFIG_RTC_VARIANT > 0
+/* ------------------ */
+/*  T - Time commands */
+/* ------------------ */
+
+/* --- T-R --- */
+static void parse_timeread(void) {
+  struct tm time;
+  uint8_t *ptr = error_buffer;
+  uint8_t hour;
+
+  if (rtc_state != RTC_OK) {
+    set_error(ERROR_SYNTAX_UNABLE);
+    return;
+  }
+
+  read_rtc(&time);
+  hour = time.tm_hour % 12;
+  if (hour == 0) hour = 12;
+
+  switch (command_buffer[3]) {
+  case 'A': /* ASCII format */
+    buffers[CONFIG_BUFFER_COUNT].lastused = 25;
+    memcpy_P(error_buffer+4, asciitime_skel, sizeof(asciitime_skel));
+    memcpy_P(error_buffer, downames + 4*time.tm_wday, 4);
+    appendnumber(error_buffer+5, time.tm_mon+1);
+    appendnumber(error_buffer+8, time.tm_mday);
+    appendnumber(error_buffer+11, time.tm_year % 100);
+    appendnumber(error_buffer+14, hour);
+    appendnumber(error_buffer+17, time.tm_min);
+    appendnumber(error_buffer+20, time.tm_sec);
+    if (time.tm_hour < 12)
+      error_buffer[23] = 'A';
+    else
+      error_buffer[23] = 'P';
+    break;
+
+  case 'B': /* BCD format */
+    buffers[CONFIG_BUFFER_COUNT].lastused = 8;
+    *ptr++ = time.tm_wday;
+    *ptr++ = int2bcd(time.tm_year % 100);
+    *ptr++ = int2bcd(time.tm_mon+1);
+    *ptr++ = int2bcd(time.tm_mday);
+    *ptr++ = int2bcd(hour);
+    *ptr++ = int2bcd(time.tm_min);
+    *ptr++ = int2bcd(time.tm_sec);
+    *ptr++ = (time.tm_hour >= 12);
+    *ptr   = 13;
+    break;
+
+  case 'D': /* Decimal format */
+    buffers[CONFIG_BUFFER_COUNT].lastused = 8;
+    *ptr++ = time.tm_wday;
+    *ptr++ = time.tm_year;
+    *ptr++ = time.tm_mon+1;
+    *ptr++ = time.tm_mday;
+    *ptr++ = hour;
+    *ptr++ = time.tm_min;
+    *ptr++ = time.tm_sec;
+    *ptr++ = (time.tm_hour >= 12);
+    *ptr   = 13;
+    break;
+
+  default: /* Unknown format */
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    break;
+  }
+}
+
+/* --- T-W --- */
+static void parse_timewrite(void) {
+  struct tm time;
+  uint8_t i, *ptr;
+
+  switch (command_buffer[3]) {
+  case 'A': /* ASCII format */
+    if (command_length < 27) { // Allow dropping the AM/PM marker for 24h format
+      set_error(ERROR_SYNTAX_UNABLE);
+      return;
+    }
+    for (i=0;i<7;i++) {
+      if (memcmp_P(command_buffer+4, downames + 4*i, 4) == 0)
+        break;
+    }
+    if (i == 7) {
+      set_error(ERROR_SYNTAX_UNKNOWN); // FIXME: Check the real error
+      return;
+    }
+    time.tm_wday = i;
+    ptr = command_buffer + 9;
+    time.tm_mon  = parse_number(&ptr)-1;
+    ptr++;
+    time.tm_mday = parse_number(&ptr);
+    ptr++;
+    time.tm_year = parse_number(&ptr);
+    ptr++;
+    time.tm_hour = parse_number(&ptr);
+    ptr++;
+    time.tm_min  = parse_number(&ptr);
+    ptr++;
+    time.tm_sec  = parse_number(&ptr);
+    if (command_buffer[28] == 'M') {
+      /* Adjust for AM/PM only if AM/PM is actually supplied */
+      if (time.tm_hour == 12)
+        time.tm_hour = 0;
+      if (command_buffer[27] == 'P')
+        time.tm_hour += 12;
+    }
+    break;
+
+  case 'B': /* BCD format */
+    if (command_length < 12) {
+      set_error(ERROR_SYNTAX_UNABLE);
+      return;
+    }
+    time.tm_wday = command_buffer[4];
+    time.tm_year = bcd2int(command_buffer[5]);
+    time.tm_mon  = bcd2int(command_buffer[6])-1;
+    time.tm_mday = bcd2int(command_buffer[7]);
+    time.tm_hour = bcd2int(command_buffer[8]);
+    /* Hour range is 1-12, change 12:xx to 0:xx for easier conversion */
+    if (time.tm_hour == 12)
+      time.tm_hour = 0;
+    time.tm_min  = bcd2int(command_buffer[9]);
+    time.tm_sec  = bcd2int(command_buffer[10]);
+    if (command_buffer[11])
+      time.tm_hour += 12;
+    break;
+
+  case 'D': /* Decimal format */
+    if (command_length < 12) {
+      set_error(ERROR_SYNTAX_UNABLE);
+      return;
+    }
+    time.tm_wday = command_buffer[4];
+    time.tm_year = command_buffer[5];
+    time.tm_mon  = command_buffer[6]-1;
+    time.tm_mday = command_buffer[7];
+    time.tm_hour = command_buffer[8];
+    /* Hour range is 1-12, change 12:xx to 0:xx for easier conversion */
+    if (time.tm_hour == 12)
+      time.tm_hour = 0;
+    time.tm_min  = command_buffer[9];
+    time.tm_sec  = command_buffer[10];
+    if (command_buffer[11])
+      time.tm_hour += 12;
+    break;
+
+  default: /* Unknown format */
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    return;
+  }
+
+  /* Y2K fix for legacy apps */
+  if (time.tm_year < 80)
+    time.tm_year += 100;
+
+  /* The CMD drives don't check for validity, we do - partially */
+  if (time.tm_mday ==  0 || time.tm_mday >  31 ||
+      time.tm_mon  >  11 ||
+      time.tm_wday >   6 ||
+      time.tm_hour >  23 ||
+      time.tm_min  >  59 ||
+      time.tm_sec  >  59) {
+    set_error(ERROR_SYNTAX_UNABLE);
+    return;
+  }
+
+  set_rtc(&time);
+}
+
+/* --- T subparser --- */
+static void parse_time(void) {
+  if (rtc_state == RTC_NOT_FOUND)
+    set_error(ERROR_SYNTAX_UNKNOWN);
+  else {
+    if (command_buffer[2] == 'R') {
+      parse_timeread();
+    } else if (command_buffer[2] == 'W') {
+      parse_timewrite();
+    } else
+      set_error(ERROR_SYNTAX_UNKNOWN);
+  }
+}
+#endif /* CONFIG_RTC_VARIANT */
+
+
+/* ------------ */
+/*  U commands  */
+/* ------------ */
+static void parse_user(void) {
+  switch (command_buffer[1]) {
+  case 'A':
+  case '1':
+    /* Tiny little hack: Rewrite as (B)-R and call that                */
+    /* This will always work because there is either a : in the string */
+    /* or the drive will start parsing at buf[3].                      */
+    command_buffer[0] = '-';
+    command_buffer[1] = 'R';
+    parse_block();
+    break;
+
+  case 'B':
+  case '2':
+    /* Tiny little hack: see above case for rationale */
+    command_buffer[0] = '-';
+    command_buffer[1] = 'W';
+    parse_block();
+    break;
+
+  case 'I':
+  case '9':
+    if (command_length == 2) {
+      /* Soft-reset - just return the dos version */
+      set_error(ERROR_DOSVERSION);
+      return;
+    }
+    switch (command_buffer[2]) {
+    case '+':
+      globalflags &= (uint8_t)~VC20MODE;
+      break;
+
+    case '-':
+      globalflags |= VC20MODE;
+      break;
+
+    default:
+      /* Soft-reset - just return the dos version */
+      set_error(ERROR_DOSVERSION);
+      break;
+    }
+    break;
+
+  case 'J':
+  case ':':
+    /* Reset - technically hard-reset */
+    /* Faked because Ultima 5 sends UJ. */
+    free_multiple_buffers(FMB_USER);
+    set_error(ERROR_DOSVERSION);
+    break;
+
+  case 202: /* Shift-J */
+    /* The real hard reset command */
+    cli();
+    restart_call();
+    break;
+
+  case '0':
+    /* U0 - only device address changes for now */
+    if ((command_buffer[2] & 0x1f) == 0x1e &&
+        command_buffer[3] >= 4 &&
+        command_buffer[3] <= 30) {
+      device_address = command_buffer[3];
+      display_address(device_address);
+      break;
+    }
+    /* Fall through */
+
+  default:
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    break;
+  }
+}
+
+
+/* ------------ */
+/*  X commands  */
+/* ------------ */
+static void parse_xcommand(void) {
+  uint8_t num;
+  uint8_t *str;
+  path_t path;
+
+  clean_cmdbuffer();
+
+  switch (command_buffer[1]) {
+  case 'B':
+    /* Free-block count faking */
+    num = parse_bool();
+    if (num != 255) {
+      if (num)
+        globalflags |= FAT32_FREEBLOCKS;
+      else
+        globalflags &= (uint8_t)~FAT32_FREEBLOCKS;
+
+      set_error_ts(ERROR_STATUS,device_address,0);
+    }
+    break;
+
+  case 'E':
+    /* Change file extension mode */
+    str = command_buffer+2;
+    if (*str == '+') {
+      globalflags |= EXTENSION_HIDING;
+    } else if (*str == '-') {
+      globalflags &= (uint8_t)~EXTENSION_HIDING;
+    } else {
+      num = parse_number(&str);
+      if (num > 4) {
+        set_error(ERROR_SYNTAX_UNKNOWN);
+      } else {
+        file_extension_mode = num;
+        if (num >= 3)
+          globalflags |= EXTENSION_HIDING;
+      }
+    }
+    set_error_ts(ERROR_STATUS,device_address,0);
+    break;
+
+  case 'D':
+    /* drive config */
+#ifdef NEED_DISKMUX
+    str = command_buffer+2;
+    if(*str == '?') {
+      set_error_ts(ERROR_STATUS,device_address,1);
+      break;
+    }
+    num = parse_number(&str);
+    if(num < 8) {
+      while(*str == ' ')
+        str++;
+      if(*str == '=') {
+        uint8_t val, i;
+        str++;
+        val = parse_number(&str);
+        if(val <= 0x0f) {
+          for(i = 0;(val != 0x0f) && i < 8; i++) {
+            if(i != num && map_drive(num) == val) {
+              /* Trying to set the same drive mapping in two places. */
+              set_error(ERROR_SYNTAX_UNKNOWN);
+              break;
+            }
+          }
+          switch(val >> DRIVE_BITS) {
+          case DISK_TYPE_NONE:
+#ifdef HAVE_DF
+          case DISK_TYPE_DF:
+#endif
+#ifdef HAVE_SD
+          case DISK_TYPE_SD:
+#endif
+#ifdef HAVE_ATA
+          case DISK_TYPE_ATA:
+#endif
+            if(map_drive(num) != val) {
+              set_map_drive(num,val);
+              /* sanity check.  If the user has truly turned off all drives, turn the
+               * defaults back on
+               */
+              if(drive_config == 0xffffffff)
+                set_drive_config(get_default_driveconfig());
+              fatops_init(0);
+            }
+            break;
+          default:
+            set_error(ERROR_SYNTAX_UNKNOWN);
+            break;
+          }
+          break;
+        }
+      }
+    } else
+      set_error(ERROR_SYNTAX_UNKNOWN);
+#else
+    // return error for units without MUX support
+    set_error(ERROR_SYNTAX_UNKNOWN);
+#endif
+    break;
+
+  case 'I':
+    /* image-as-directory mode */
+    str = command_buffer + 2;
+    num = parse_number(&str);
+    if (num <= 2) {
+      image_as_dir = num;
+    } else {
+      set_error(ERROR_SYNTAX_UNKNOWN);
+    }
+    break;
+
+  case 'W':
+    /* Write configuration */
+    write_configuration();
+    set_error_ts(ERROR_STATUS,device_address,0);
+    break;
+
+  case 'R':
+    /* Set Rom-file */
+    if (command_buffer[2] == ':') {
+      if (command_length > ROM_NAME_LENGTH+3) {
+        set_error(ERROR_SYNTAX_TOOLONG);
+      } else {
+        ustrcpy(rom_filename, command_buffer+3);
+      }
+    } else {
+      /* Clear rom name */
+      rom_filename[0] = 0;
+    }
+    break;
+
+  case 'S':
+    /* Swaplist */
+    if (parse_path(command_buffer+2, &path, &str, 0))
+      return;
+
+    set_changelist(&path, str);
+    break;
+
+  case '*':
+    /* Post-* matching */
+    num = parse_bool();
+    if (num != 255) {
+      if (num)
+        globalflags |= POSTMATCH;
+      else
+        globalflags &= (uint8_t)~POSTMATCH;
+
+      set_error_ts(ERROR_STATUS,device_address,0);
+    }
+    break;
+
+#ifdef CONFIG_STACK_TRACKING
+  case '?':
+    /* Output the largest stack size seen */
+    set_error_ts(ERROR_LONGVERSION,(RAMEND-minstack)>>8,(RAMEND-minstack)&0xff);
+    break;
+#else
+  case '?':
+    /* Output the long version string */
+    set_error(ERROR_LONGVERSION);
+    break;
+#endif
+
+  default:
+    /* Unknown command, just show the status */
+    set_error_ts(ERROR_STATUS,device_address,0);
+    break;
+  }
+}
+
+
+/* ------------------------------------------------------------------------- */
+/*  Main command parser function                                             */
+/* ------------------------------------------------------------------------- */
+
+void parse_doscommand(void) {
+  /* Set default message: Everything ok */
+  set_error(ERROR_OK);
+
+  /* Abort if the command is too long */
+  if (command_length == CONFIG_COMMAND_BUFFER_SIZE) {
+    set_error(ERROR_SYNTAX_TOOLONG);
+    return;
+  }
+
+#ifdef CONFIG_COMMAND_CHANNEL_DUMP
+  /* Debugging aid: Dump the whole command via serial */
+  if (detected_loader == FL_NONE) {
+    /* Dump only if no loader was detected because it may ruin the timing */
+    uart_flush();
+    uart_trace(command_buffer,0,command_length);
+  }
+#endif
+
+  /* Remove one CR at end of command */
+  original_length = command_length;
+  if (command_length > 0 && command_buffer[command_length-1] == 0x0d)
+    command_length--;
+
+  /* Abort if there is no command */
+  if (command_length == 0) {
+    set_error(ERROR_SYNTAX_UNABLE);
+    return;
+  }
+
+  /* Send command to display */
+  display_doscommand(command_length, command_buffer);
+
+  /* MD/CD/RD clash with other commands, so they're checked first */
+  if (command_buffer[0] != 'X' && command_buffer[1] == 'D') {
+    parse_dircommand();
+    return;
+  }
+
+  switch (command_buffer[0]) {
+  case 'B':
+    /* Block-Something */
+    parse_block();
+    break;
+
+  case 'C':
+    /* Copy or Change Partition */
+    if (command_buffer[1] == 'P' || command_buffer[1] == 0xd0)
+      parse_changepart();
+    else
+      /* Copy a file */
+      parse_copy();
+    break;
+
+  case 'D':
+    /* Direct sector access (was duplicate in CBM drives) */
+    parse_direct();
+    break;
+
+  case 'E':
+    /* EEPROM-something */
+    parse_eeprom();
+    break;
+
+  case 'G':
+    /* Get-Partition */
+    parse_getpartition();
+    break;
+
+  case 'I':
+    /* Initialize */
+    parse_initialize();
+    break;
+
+  case 'M':
+    /* Memory-something */
+    parse_memory();
+    break;
+
+  case 'N':
+    /* New */
+    parse_new();
+    break;
+
+  case 'P':
+    /* Position */
+    parse_position();
+    break;
+
+  case 'R':
+    /* Rename */
+    parse_rename();
+    break;
+
+  case 'S':
+    if(command_length == 3 && command_buffer[1] == '-') {
+      /* Swap drive number */
+      set_error(ERROR_SYNTAX_UNABLE);
+      break;
+    }
+    /* Scratch */
+    parse_scratch();
+    break;
+
+#if CONFIG_RTC_VARIANT > 0
+  case 'T':
+    parse_time();
+    break;
+#endif
+
+  case 'U':
+    parse_user();
+    break;
+
+  case 'X':
+    parse_xcommand();
+    break;
+
+  default:
+    set_error(ERROR_SYNTAX_UNKNOWN);
+    break;
+  }
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doscmd.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doscmd.h
new file mode 100644
index 00000000..68f87144
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doscmd.h
@@ -0,0 +1,39 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   doscmd.h: Definitions for the command channel parser
+
+*/
+
+#ifndef DOSCMD_H
+#define DOSCMD_H
+
+extern uint8_t command_buffer[CONFIG_COMMAND_BUFFER_SIZE+2];
+extern uint8_t command_length;
+extern date_t date_match_start;
+extern date_t date_match_end;
+
+extern uint16_t datacrc;
+
+void parse_doscommand(void);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doxygen.conf b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doxygen.conf
new file mode 100644
index 00000000..753a7181
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/doxygen.conf
@@ -0,0 +1,1310 @@
+# Doxyfile 1.5.4
+
+# This file describes the settings to be used by the documentation system
+# doxygen (www.doxygen.org) for a project
+#
+# All text after a hash (#) is considered a comment and will be ignored
+# The format is:
+#       TAG = value [value, ...]
+# For lists items can also be appended using:
+#       TAG += value [value, ...]
+# Values that contain spaces should be placed between quotes (" ")
+
+#---------------------------------------------------------------------------
+# Project related configuration options
+#---------------------------------------------------------------------------
+
+# This tag specifies the encoding used for all characters in the config file that
+# follow. The default is UTF-8 which is also the encoding used for all text before
+# the first occurrence of this tag. Doxygen uses libiconv (or the iconv built into
+# libc) for the transcoding. See http://www.gnu.org/software/libiconv for the list of
+# possible encodings.
+
+DOXYFILE_ENCODING      = UTF-8
+
+# The PROJECT_NAME tag is a single word (or a sequence of words surrounded
+# by quotes) that should identify the project.
+
+PROJECT_NAME           = sd2iec
+
+# The PROJECT_NUMBER tag can be used to enter a project or revision number.
+# This could be handy for archiving the generated documentation or
+# if some version control system is used.
+
+PROJECT_NUMBER         =
+
+# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute)
+# base path where the generated documentation will be put.
+# If a relative path is entered, it will be relative to the location
+# where doxygen was started. If left blank the current directory will be used.
+
+OUTPUT_DIRECTORY       = codedoc
+
+# If the CREATE_SUBDIRS tag is set to YES, then doxygen will create
+# 4096 sub-directories (in 2 levels) under the output directory of each output
+# format and will distribute the generated files over these directories.
+# Enabling this option can be useful when feeding doxygen a huge amount of
+# source files, where putting all generated files in the same directory would
+# otherwise cause performance problems for the file system.
+
+CREATE_SUBDIRS         = NO
+
+# The OUTPUT_LANGUAGE tag is used to specify the language in which all
+# documentation generated by doxygen is written. Doxygen will use this
+# information to generate all constant output in the proper language.
+# The default language is English, other supported languages are:
+# Afrikaans, Arabic, Brazilian, Catalan, Chinese, Chinese-Traditional,
+# Croatian, Czech, Danish, Dutch, Finnish, French, German, Greek, Hungarian,
+# Italian, Japanese, Japanese-en (Japanese with English messages), Korean,
+# Korean-en, Lithuanian, Norwegian, Polish, Portuguese, Romanian, Russian,
+# Serbian, Slovak, Slovene, Spanish, Swedish, and Ukrainian.
+
+OUTPUT_LANGUAGE        = English
+
+# If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will
+# include brief member descriptions after the members that are listed in
+# the file and class documentation (similar to JavaDoc).
+# Set to NO to disable this.
+
+BRIEF_MEMBER_DESC      = YES
+
+# If the REPEAT_BRIEF tag is set to YES (the default) Doxygen will prepend
+# the brief description of a member or function before the detailed description.
+# Note: if both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the
+# brief descriptions will be completely suppressed.
+
+REPEAT_BRIEF           = YES
+
+# This tag implements a quasi-intelligent brief description abbreviator
+# that is used to form the text in various listings. Each string
+# in this list, if found as the leading text of the brief description, will be
+# stripped from the text and the result after processing the whole list, is
+# used as the annotated text. Otherwise, the brief description is used as-is.
+# If left blank, the following values are used ("$name" is automatically
+# replaced with the name of the entity): "The $name class" "The $name widget"
+# "The $name file" "is" "provides" "specifies" "contains"
+# "represents" "a" "an" "the"
+
+ABBREVIATE_BRIEF       =
+
+# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then
+# Doxygen will generate a detailed section even if there is only a brief
+# description.
+
+ALWAYS_DETAILED_SEC    = NO
+
+# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all
+# inherited members of a class in the documentation of that class as if those
+# members were ordinary class members. Constructors, destructors and assignment
+# operators of the base classes will not be shown.
+
+INLINE_INHERITED_MEMB  = NO
+
+# If the FULL_PATH_NAMES tag is set to YES then Doxygen will prepend the full
+# path before files name in the file list and in the header files. If set
+# to NO the shortest path that makes the file name unique will be used.
+
+FULL_PATH_NAMES        = NO
+
+# If the FULL_PATH_NAMES tag is set to YES then the STRIP_FROM_PATH tag
+# can be used to strip a user-defined part of the path. Stripping is
+# only done if one of the specified strings matches the left-hand part of
+# the path. The tag can be used to show relative paths in the file list.
+# If left blank the directory from which doxygen is run is used as the
+# path to strip.
+
+STRIP_FROM_PATH        =
+
+# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of
+# the path mentioned in the documentation of a class, which tells
+# the reader which header file to include in order to use a class.
+# If left blank only the name of the header file containing the class
+# definition is used. Otherwise one should specify the include paths that
+# are normally passed to the compiler using the -I flag.
+
+STRIP_FROM_INC_PATH    =
+
+# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter
+# (but less readable) file names. This can be useful is your file systems
+# doesn't support long names like on DOS, Mac, or CD-ROM.
+
+SHORT_NAMES            = NO
+
+# If the JAVADOC_AUTOBRIEF tag is set to YES then Doxygen
+# will interpret the first line (until the first dot) of a JavaDoc-style
+# comment as the brief description. If set to NO, the JavaDoc
+# comments will behave just like regular Qt-style comments
+# (thus requiring an explicit @brief command for a brief description.)
+
+JAVADOC_AUTOBRIEF      = NO
+
+# If the QT_AUTOBRIEF tag is set to YES then Doxygen will
+# interpret the first line (until the first dot) of a Qt-style
+# comment as the brief description. If set to NO, the comments
+# will behave just like regular Qt-style comments (thus requiring
+# an explicit \brief command for a brief description.)
+
+QT_AUTOBRIEF           = YES
+
+# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make Doxygen
+# treat a multi-line C++ special comment block (i.e. a block of //! or ///
+# comments) as a brief description. This used to be the default behaviour.
+# The new default is to treat a multi-line C++ comment block as a detailed
+# description. Set this tag to YES if you prefer the old behaviour instead.
+
+MULTILINE_CPP_IS_BRIEF = NO
+
+# If the DETAILS_AT_TOP tag is set to YES then Doxygen
+# will output the detailed description near the top, like JavaDoc.
+# If set to NO, the detailed description appears after the member
+# documentation.
+
+DETAILS_AT_TOP         = NO
+
+# If the INHERIT_DOCS tag is set to YES (the default) then an undocumented
+# member inherits the documentation from any documented member that it
+# re-implements.
+
+INHERIT_DOCS           = YES
+
+# If the SEPARATE_MEMBER_PAGES tag is set to YES, then doxygen will produce
+# a new page for each member. If set to NO, the documentation of a member will
+# be part of the file/class/namespace that contains it.
+
+SEPARATE_MEMBER_PAGES  = NO
+
+# The TAB_SIZE tag can be used to set the number of spaces in a tab.
+# Doxygen uses this value to replace tabs by spaces in code fragments.
+
+TAB_SIZE               = 8
+
+# This tag can be used to specify a number of aliases that acts
+# as commands in the documentation. An alias has the form "name=value".
+# For example adding "sideeffect=\par Side Effects:\n" will allow you to
+# put the command \sideeffect (or @sideeffect) in the documentation, which
+# will result in a user-defined paragraph with heading "Side Effects:".
+# You can put \n's in the value part of an alias to insert newlines.
+
+ALIASES                =
+
+# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C
+# sources only. Doxygen will then generate output that is more tailored for C.
+# For instance, some of the names that are used will be different. The list
+# of all members will be omitted, etc.
+
+OPTIMIZE_OUTPUT_FOR_C  = YES
+
+# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java
+# sources only. Doxygen will then generate output that is more tailored for Java.
+# For instance, namespaces will be presented as packages, qualified scopes
+# will look different, etc.
+
+OPTIMIZE_OUTPUT_JAVA   = NO
+
+# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want to
+# include (a tag file for) the STL sources as input, then you should
+# set this tag to YES in order to let doxygen match functions declarations and
+# definitions whose arguments contain STL classes (e.g. func(std::string); v.s.
+# func(std::string) {}). This also make the inheritance and collaboration
+# diagrams that involve STL classes more complete and accurate.
+
+BUILTIN_STL_SUPPORT    = NO
+
+# If you use Microsoft's C++/CLI language, you should set this option to YES to
+# enable parsing support.
+
+CPP_CLI_SUPPORT        = NO
+
+# Set the SIP_SUPPORT tag to YES if your project consists of sip sources only.
+# Doxygen will parse them like normal C++ but will assume all classes use public
+# instead of private inheritance when no explicit protection keyword is present.
+
+SIP_SUPPORT            = NO
+
+# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC
+# tag is set to YES, then doxygen will reuse the documentation of the first
+# member in the group (if any) for the other members of the group. By default
+# all members of a group must be documented explicitly.
+
+DISTRIBUTE_GROUP_DOC   = NO
+
+# Set the SUBGROUPING tag to YES (the default) to allow class member groups of
+# the same type (for instance a group of public functions) to be put as a
+# subgroup of that type (e.g. under the Public Functions section). Set it to
+# NO to prevent subgrouping. Alternatively, this can be done per class using
+# the \nosubgrouping command.
+
+SUBGROUPING            = YES
+
+# When TYPEDEF_HIDES_STRUCT is enabled, a typedef of a struct (or union) is
+# documented as struct with the name of the typedef. So
+# typedef struct TypeS {} TypeT, will appear in the documentation as a struct
+# with name TypeT. When disabled the typedef will appear as a member of a file,
+# namespace, or class. And the struct will be named TypeS. This can typically
+# be useful for C code where the coding convention is that all structs are
+# typedef'ed and only the typedef is referenced never the struct's name.
+
+TYPEDEF_HIDES_STRUCT   = NO
+
+#---------------------------------------------------------------------------
+# Build related configuration options
+#---------------------------------------------------------------------------
+
+# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in
+# documentation are documented, even if no documentation was available.
+# Private class members and static file members will be hidden unless
+# the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES
+
+EXTRACT_ALL            = YES
+
+# If the EXTRACT_PRIVATE tag is set to YES all private members of a class
+# will be included in the documentation.
+
+EXTRACT_PRIVATE        = NO
+
+# If the EXTRACT_STATIC tag is set to YES all static members of a file
+# will be included in the documentation.
+
+EXTRACT_STATIC         = YES
+
+# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs)
+# defined locally in source files will be included in the documentation.
+# If set to NO only classes defined in header files are included.
+
+EXTRACT_LOCAL_CLASSES  = YES
+
+# This flag is only useful for Objective-C code. When set to YES local
+# methods, which are defined in the implementation section but not in
+# the interface are included in the documentation.
+# If set to NO (the default) only methods in the interface are included.
+
+EXTRACT_LOCAL_METHODS  = NO
+
+# If this flag is set to YES, the members of anonymous namespaces will be extracted
+# and appear in the documentation as a namespace called 'anonymous_namespace{file}',
+# where file will be replaced with the base name of the file that contains the anonymous
+# namespace. By default anonymous namespace are hidden.
+
+EXTRACT_ANON_NSPACES   = NO
+
+# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all
+# undocumented members of documented classes, files or namespaces.
+# If set to NO (the default) these members will be included in the
+# various overviews, but no documentation section is generated.
+# This option has no effect if EXTRACT_ALL is enabled.
+
+HIDE_UNDOC_MEMBERS     = NO
+
+# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all
+# undocumented classes that are normally visible in the class hierarchy.
+# If set to NO (the default) these classes will be included in the various
+# overviews. This option has no effect if EXTRACT_ALL is enabled.
+
+HIDE_UNDOC_CLASSES     = NO
+
+# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all
+# friend (class|struct|union) declarations.
+# If set to NO (the default) these declarations will be included in the
+# documentation.
+
+HIDE_FRIEND_COMPOUNDS  = NO
+
+# If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any
+# documentation blocks found inside the body of a function.
+# If set to NO (the default) these blocks will be appended to the
+# function's detailed documentation block.
+
+HIDE_IN_BODY_DOCS      = NO
+
+# The INTERNAL_DOCS tag determines if documentation
+# that is typed after a \internal command is included. If the tag is set
+# to NO (the default) then the documentation will be excluded.
+# Set it to YES to include the internal documentation.
+
+INTERNAL_DOCS          = NO
+
+# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate
+# file names in lower-case letters. If set to YES upper-case letters are also
+# allowed. This is useful if you have classes or files whose names only differ
+# in case and if your file system supports case sensitive file names. Windows
+# and Mac users are advised to set this option to NO.
+
+CASE_SENSE_NAMES       = YES
+
+# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen
+# will show members with their full class and namespace scopes in the
+# documentation. If set to YES the scope will be hidden.
+
+HIDE_SCOPE_NAMES       = NO
+
+# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen
+# will put a list of the files that are included by a file in the documentation
+# of that file.
+
+SHOW_INCLUDE_FILES     = YES
+
+# If the INLINE_INFO tag is set to YES (the default) then a tag [inline]
+# is inserted in the documentation for inline members.
+
+INLINE_INFO            = YES
+
+# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen
+# will sort the (detailed) documentation of file and class members
+# alphabetically by member name. If set to NO the members will appear in
+# declaration order.
+
+SORT_MEMBER_DOCS       = YES
+
+# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the
+# brief documentation of file, namespace and class members alphabetically
+# by member name. If set to NO (the default) the members will appear in
+# declaration order.
+
+SORT_BRIEF_DOCS        = NO
+
+# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be
+# sorted by fully-qualified names, including namespaces. If set to
+# NO (the default), the class list will be sorted only by class name,
+# not including the namespace part.
+# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES.
+# Note: This option applies only to the class list, not to the
+# alphabetical list.
+
+SORT_BY_SCOPE_NAME     = NO
+
+# The GENERATE_TODOLIST tag can be used to enable (YES) or
+# disable (NO) the todo list. This list is created by putting \todo
+# commands in the documentation.
+
+GENERATE_TODOLIST      = YES
+
+# The GENERATE_TESTLIST tag can be used to enable (YES) or
+# disable (NO) the test list. This list is created by putting \test
+# commands in the documentation.
+
+GENERATE_TESTLIST      = YES
+
+# The GENERATE_BUGLIST tag can be used to enable (YES) or
+# disable (NO) the bug list. This list is created by putting \bug
+# commands in the documentation.
+
+GENERATE_BUGLIST       = YES
+
+# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or
+# disable (NO) the deprecated list. This list is created by putting
+# \deprecated commands in the documentation.
+
+GENERATE_DEPRECATEDLIST= YES
+
+# The ENABLED_SECTIONS tag can be used to enable conditional
+# documentation sections, marked by \if sectionname ... \endif.
+
+ENABLED_SECTIONS       =
+
+# The MAX_INITIALIZER_LINES tag determines the maximum number of lines
+# the initial value of a variable or define consists of for it to appear in
+# the documentation. If the initializer consists of more lines than specified
+# here it will be hidden. Use a value of 0 to hide initializers completely.
+# The appearance of the initializer of individual variables and defines in the
+# documentation can be controlled using \showinitializer or \hideinitializer
+# command in the documentation regardless of this setting.
+
+MAX_INITIALIZER_LINES  = 30
+
+# Set the SHOW_USED_FILES tag to NO to disable the list of files generated
+# at the bottom of the documentation of classes and structs. If set to YES the
+# list will mention the files that were used to generate the documentation.
+
+SHOW_USED_FILES        = YES
+
+# If the sources in your project are distributed over multiple directories
+# then setting the SHOW_DIRECTORIES tag to YES will show the directory hierarchy
+# in the documentation. The default is NO.
+
+SHOW_DIRECTORIES       = NO
+
+# The FILE_VERSION_FILTER tag can be used to specify a program or script that
+# doxygen should invoke to get the current version for each file (typically from the
+# version control system). Doxygen will invoke the program by executing (via
+# popen()) the command <command> <input-file>, where <command> is the value of
+# the FILE_VERSION_FILTER tag, and <input-file> is the name of an input file
+# provided by doxygen. Whatever the program writes to standard output
+# is used as the file version. See the manual for examples.
+
+FILE_VERSION_FILTER    =
+
+#---------------------------------------------------------------------------
+# configuration options related to warning and progress messages
+#---------------------------------------------------------------------------
+
+# The QUIET tag can be used to turn on/off the messages that are generated
+# by doxygen. Possible values are YES and NO. If left blank NO is used.
+
+QUIET                  = YES
+
+# The WARNINGS tag can be used to turn on/off the warning messages that are
+# generated by doxygen. Possible values are YES and NO. If left blank
+# NO is used.
+
+WARNINGS               = YES
+
+# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings
+# for undocumented members. If EXTRACT_ALL is set to YES then this flag will
+# automatically be disabled.
+
+WARN_IF_UNDOCUMENTED   = YES
+
+# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for
+# potential errors in the documentation, such as not documenting some
+# parameters in a documented function, or documenting parameters that
+# don't exist or using markup commands wrongly.
+
+WARN_IF_DOC_ERROR      = YES
+
+# This WARN_NO_PARAMDOC option can be abled to get warnings for
+# functions that are documented, but have no documentation for their parameters
+# or return value. If set to NO (the default) doxygen will only warn about
+# wrong or incomplete parameter documentation, but not about the absence of
+# documentation.
+
+WARN_NO_PARAMDOC       = NO
+
+# The WARN_FORMAT tag determines the format of the warning messages that
+# doxygen can produce. The string should contain the $file, $line, and $text
+# tags, which will be replaced by the file and line number from which the
+# warning originated and the warning text. Optionally the format may contain
+# $version, which will be replaced by the version of the file (if it could
+# be obtained via FILE_VERSION_FILTER)
+
+WARN_FORMAT            = "$file:$line: $text"
+
+# The WARN_LOGFILE tag can be used to specify a file to which warning
+# and error messages should be written. If left blank the output is written
+# to stderr.
+
+WARN_LOGFILE           =
+
+#---------------------------------------------------------------------------
+# configuration options related to the input files
+#---------------------------------------------------------------------------
+
+# The INPUT tag can be used to specify the files and/or directories that contain
+# documented source files. You may enter file names like "myfile.cpp" or
+# directories like "/usr/src/myproject". Separate the files or directories
+# with spaces.
+
+INPUT                  = doxyinput
+
+# This tag can be used to specify the character encoding of the source files that
+# doxygen parses. Internally doxygen uses the UTF-8 encoding, which is also the default
+# input encoding. Doxygen uses libiconv (or the iconv built into libc) for the transcoding.
+# See http://www.gnu.org/software/libiconv for the list of possible encodings.
+
+INPUT_ENCODING         = UTF-8
+
+# If the value of the INPUT tag contains directories, you can use the
+# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp
+# and *.h) to filter out the source-files in the directories. If left
+# blank the following patterns are tested:
+# *.c *.cc *.cxx *.cpp *.c++ *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh *.hxx
+# *.hpp *.h++ *.idl *.odl *.cs *.php *.php3 *.inc *.m *.mm *.py *.f90
+
+FILE_PATTERNS          = *.c *.h
+
+# The RECURSIVE tag can be used to turn specify whether or not subdirectories
+# should be searched for input files as well. Possible values are YES and NO.
+# If left blank NO is used.
+
+RECURSIVE              = NO
+
+# The EXCLUDE tag can be used to specify files and/or directories that should
+# excluded from the INPUT source files. This way you can easily exclude a
+# subdirectory from a directory tree whose root is specified with the INPUT tag.
+
+EXCLUDE                =
+
+# The EXCLUDE_SYMLINKS tag can be used select whether or not files or
+# directories that are symbolic links (a Unix filesystem feature) are excluded
+# from the input.
+
+EXCLUDE_SYMLINKS       = NO
+
+# If the value of the INPUT tag contains directories, you can use the
+# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude
+# certain files from those directories. Note that the wildcards are matched
+# against the file with absolute path, so to exclude all test directories
+# for example use the pattern */test/*
+
+EXCLUDE_PATTERNS       =
+
+# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names
+# (namespaces, classes, functions, etc.) that should be excluded from the output.
+# The symbol name can be a fully qualified name, a word, or if the wildcard * is used,
+# a substring. Examples: ANamespace, AClass, AClass::ANamespace, ANamespace::*Test
+
+EXCLUDE_SYMBOLS        =
+
+# The EXAMPLE_PATH tag can be used to specify one or more files or
+# directories that contain example code fragments that are included (see
+# the \include command).
+
+EXAMPLE_PATH           =
+
+# If the value of the EXAMPLE_PATH tag contains directories, you can use the
+# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp
+# and *.h) to filter out the source-files in the directories. If left
+# blank all files are included.
+
+EXAMPLE_PATTERNS       =
+
+# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be
+# searched for input files to be used with the \include or \dontinclude
+# commands irrespective of the value of the RECURSIVE tag.
+# Possible values are YES and NO. If left blank NO is used.
+
+EXAMPLE_RECURSIVE      = NO
+
+# The IMAGE_PATH tag can be used to specify one or more files or
+# directories that contain image that are included in the documentation (see
+# the \image command).
+
+IMAGE_PATH             =
+
+# The INPUT_FILTER tag can be used to specify a program that doxygen should
+# invoke to filter for each input file. Doxygen will invoke the filter program
+# by executing (via popen()) the command <filter> <input-file>, where <filter>
+# is the value of the INPUT_FILTER tag, and <input-file> is the name of an
+# input file. Doxygen will then use the output that the filter program writes
+# to standard output.  If FILTER_PATTERNS is specified, this tag will be
+# ignored.
+
+INPUT_FILTER           =
+
+# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern
+# basis.  Doxygen will compare the file name with each pattern and apply the
+# filter if there is a match.  The filters are a list of the form:
+# pattern=filter (like *.cpp=my_cpp_filter). See INPUT_FILTER for further
+# info on how filters are used. If FILTER_PATTERNS is empty, INPUT_FILTER
+# is applied to all files.
+
+FILTER_PATTERNS        =
+
+# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using
+# INPUT_FILTER) will be used to filter the input files when producing source
+# files to browse (i.e. when SOURCE_BROWSER is set to YES).
+
+FILTER_SOURCE_FILES    = NO
+
+#---------------------------------------------------------------------------
+# configuration options related to source browsing
+#---------------------------------------------------------------------------
+
+# If the SOURCE_BROWSER tag is set to YES then a list of source files will
+# be generated. Documented entities will be cross-referenced with these sources.
+# Note: To get rid of all source code in the generated output, make sure also
+# VERBATIM_HEADERS is set to NO. If you have enabled CALL_GRAPH or CALLER_GRAPH
+# then you must also enable this option. If you don't then doxygen will produce
+# a warning and turn it on anyway
+
+SOURCE_BROWSER         = YES
+
+# Setting the INLINE_SOURCES tag to YES will include the body
+# of functions and classes directly in the documentation.
+
+INLINE_SOURCES         = YES
+
+# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct
+# doxygen to hide any special comment blocks from generated source code
+# fragments. Normal C and C++ comments will always remain visible.
+
+STRIP_CODE_COMMENTS    = NO
+
+# If the REFERENCED_BY_RELATION tag is set to YES (the default)
+# then for each documented function all documented
+# functions referencing it will be listed.
+
+REFERENCED_BY_RELATION = YES
+
+# If the REFERENCES_RELATION tag is set to YES (the default)
+# then for each documented function all documented entities
+# called/used by that function will be listed.
+
+REFERENCES_RELATION    = YES
+
+# If the REFERENCES_LINK_SOURCE tag is set to YES (the default)
+# and SOURCE_BROWSER tag is set to YES, then the hyperlinks from
+# functions in REFERENCES_RELATION and REFERENCED_BY_RELATION lists will
+# link to the source code.  Otherwise they will link to the documentstion.
+
+REFERENCES_LINK_SOURCE = YES
+
+# If the USE_HTAGS tag is set to YES then the references to source code
+# will point to the HTML generated by the htags(1) tool instead of doxygen
+# built-in source browser. The htags tool is part of GNU's global source
+# tagging system (see http://www.gnu.org/software/global/global.html). You
+# will need version 4.8.6 or higher.
+
+USE_HTAGS              = NO
+
+# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen
+# will generate a verbatim copy of the header file for each class for
+# which an include is specified. Set to NO to disable this.
+
+VERBATIM_HEADERS       = YES
+
+#---------------------------------------------------------------------------
+# configuration options related to the alphabetical class index
+#---------------------------------------------------------------------------
+
+# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index
+# of all compounds will be generated. Enable this if the project
+# contains a lot of classes, structs, unions or interfaces.
+
+ALPHABETICAL_INDEX     = NO
+
+# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then
+# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns
+# in which this list will be split (can be a number in the range [1..20])
+
+COLS_IN_ALPHA_INDEX    = 5
+
+# In case all classes in a project start with a common prefix, all
+# classes will be put under the same header in the alphabetical index.
+# The IGNORE_PREFIX tag can be used to specify one or more prefixes that
+# should be ignored while generating the index headers.
+
+IGNORE_PREFIX          =
+
+#---------------------------------------------------------------------------
+# configuration options related to the HTML output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_HTML tag is set to YES (the default) Doxygen will
+# generate HTML output.
+
+GENERATE_HTML          = YES
+
+# The HTML_OUTPUT tag is used to specify where the HTML docs will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
+# put in front of it. If left blank `html' will be used as the default path.
+
+HTML_OUTPUT            = html
+
+# The HTML_FILE_EXTENSION tag can be used to specify the file extension for
+# each generated HTML page (for example: .htm,.php,.asp). If it is left blank
+# doxygen will generate files with .html extension.
+
+HTML_FILE_EXTENSION    = .html
+
+# The HTML_HEADER tag can be used to specify a personal HTML header for
+# each generated HTML page. If it is left blank doxygen will generate a
+# standard header.
+
+HTML_HEADER            =
+
+# The HTML_FOOTER tag can be used to specify a personal HTML footer for
+# each generated HTML page. If it is left blank doxygen will generate a
+# standard footer.
+
+HTML_FOOTER            =
+
+# The HTML_STYLESHEET tag can be used to specify a user-defined cascading
+# style sheet that is used by each HTML page. It can be used to
+# fine-tune the look of the HTML output. If the tag is left blank doxygen
+# will generate a default style sheet. Note that doxygen will try to copy
+# the style sheet file to the HTML output directory, so don't put your own
+# stylesheet in the HTML output directory as well, or it will be erased!
+
+HTML_STYLESHEET        =
+
+# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes,
+# files or namespaces will be aligned in HTML using tables. If set to
+# NO a bullet list will be used.
+
+HTML_ALIGN_MEMBERS     = YES
+
+# If the GENERATE_HTMLHELP tag is set to YES, additional index files
+# will be generated that can be used as input for tools like the
+# Microsoft HTML help workshop to generate a compressed HTML help file (.chm)
+# of the generated HTML documentation.
+
+GENERATE_HTMLHELP      = NO
+
+# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML
+# documentation will contain sections that can be hidden and shown after the
+# page has loaded. For this to work a browser that supports
+# JavaScript and DHTML is required (for instance Mozilla 1.0+, Firefox
+# Netscape 6.0+, Internet explorer 5.0+, Konqueror, or Safari).
+
+HTML_DYNAMIC_SECTIONS  = NO
+
+# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can
+# be used to specify the file name of the resulting .chm file. You
+# can add a path in front of the file if the result should not be
+# written to the html output directory.
+
+CHM_FILE               =
+
+# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can
+# be used to specify the location (absolute path including file name) of
+# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run
+# the HTML help compiler on the generated index.hhp.
+
+HHC_LOCATION           =
+
+# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag
+# controls if a separate .chi index file is generated (YES) or that
+# it should be included in the master .chm file (NO).
+
+GENERATE_CHI           = NO
+
+# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag
+# controls whether a binary table of contents is generated (YES) or a
+# normal table of contents (NO) in the .chm file.
+
+BINARY_TOC             = NO
+
+# The TOC_EXPAND flag can be set to YES to add extra items for group members
+# to the contents of the HTML help documentation and to the tree view.
+
+TOC_EXPAND             = NO
+
+# The DISABLE_INDEX tag can be used to turn on/off the condensed index at
+# top of each HTML page. The value NO (the default) enables the index and
+# the value YES disables it.
+
+DISABLE_INDEX          = NO
+
+# This tag can be used to set the number of enum values (range [1..20])
+# that doxygen will group on one line in the generated HTML documentation.
+
+ENUM_VALUES_PER_LINE   = 4
+
+# If the GENERATE_TREEVIEW tag is set to YES, a side panel will be
+# generated containing a tree-like index structure (just like the one that
+# is generated for HTML Help). For this to work a browser that supports
+# JavaScript, DHTML, CSS and frames is required (for instance Mozilla 1.0+,
+# Netscape 6.0+, Internet explorer 5.0+, or Konqueror). Windows users are
+# probably better off using the HTML help feature.
+
+GENERATE_TREEVIEW      = YES
+
+# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be
+# used to set the initial width (in pixels) of the frame in which the tree
+# is shown.
+
+TREEVIEW_WIDTH         = 250
+
+#---------------------------------------------------------------------------
+# configuration options related to the LaTeX output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will
+# generate Latex output.
+
+GENERATE_LATEX         = NO
+
+# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
+# put in front of it. If left blank `latex' will be used as the default path.
+
+LATEX_OUTPUT           = latex
+
+# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be
+# invoked. If left blank `latex' will be used as the default command name.
+
+LATEX_CMD_NAME         = latex
+
+# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to
+# generate index for LaTeX. If left blank `makeindex' will be used as the
+# default command name.
+
+MAKEINDEX_CMD_NAME     = makeindex
+
+# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact
+# LaTeX documents. This may be useful for small projects and may help to
+# save some trees in general.
+
+COMPACT_LATEX          = NO
+
+# The PAPER_TYPE tag can be used to set the paper type that is used
+# by the printer. Possible values are: a4, a4wide, letter, legal and
+# executive. If left blank a4wide will be used.
+
+PAPER_TYPE             = a4wide
+
+# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX
+# packages that should be included in the LaTeX output.
+
+EXTRA_PACKAGES         =
+
+# The LATEX_HEADER tag can be used to specify a personal LaTeX header for
+# the generated latex document. The header should contain everything until
+# the first chapter. If it is left blank doxygen will generate a
+# standard header. Notice: only use this tag if you know what you are doing!
+
+LATEX_HEADER           =
+
+# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated
+# is prepared for conversion to pdf (using ps2pdf). The pdf file will
+# contain links (just like the HTML output) instead of page references
+# This makes the output suitable for online browsing using a pdf viewer.
+
+PDF_HYPERLINKS         = NO
+
+# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of
+# plain latex in the generated Makefile. Set this option to YES to get a
+# higher quality PDF documentation.
+
+USE_PDFLATEX           = NO
+
+# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode.
+# command to the generated LaTeX files. This will instruct LaTeX to keep
+# running if errors occur, instead of asking the user for help.
+# This option is also used when generating formulas in HTML.
+
+LATEX_BATCHMODE        = NO
+
+# If LATEX_HIDE_INDICES is set to YES then doxygen will not
+# include the index chapters (such as File Index, Compound Index, etc.)
+# in the output.
+
+LATEX_HIDE_INDICES     = NO
+
+#---------------------------------------------------------------------------
+# configuration options related to the RTF output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output
+# The RTF output is optimized for Word 97 and may not look very pretty with
+# other RTF readers or editors.
+
+GENERATE_RTF           = NO
+
+# The RTF_OUTPUT tag is used to specify where the RTF docs will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
+# put in front of it. If left blank `rtf' will be used as the default path.
+
+RTF_OUTPUT             = rtf
+
+# If the COMPACT_RTF tag is set to YES Doxygen generates more compact
+# RTF documents. This may be useful for small projects and may help to
+# save some trees in general.
+
+COMPACT_RTF            = NO
+
+# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated
+# will contain hyperlink fields. The RTF file will
+# contain links (just like the HTML output) instead of page references.
+# This makes the output suitable for online browsing using WORD or other
+# programs which support those fields.
+# Note: wordpad (write) and others do not support links.
+
+RTF_HYPERLINKS         = NO
+
+# Load stylesheet definitions from file. Syntax is similar to doxygen's
+# config file, i.e. a series of assignments. You only have to provide
+# replacements, missing definitions are set to their default value.
+
+RTF_STYLESHEET_FILE    =
+
+# Set optional variables used in the generation of an rtf document.
+# Syntax is similar to doxygen's config file.
+
+RTF_EXTENSIONS_FILE    =
+
+#---------------------------------------------------------------------------
+# configuration options related to the man page output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_MAN tag is set to YES (the default) Doxygen will
+# generate man pages
+
+GENERATE_MAN           = NO
+
+# The MAN_OUTPUT tag is used to specify where the man pages will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
+# put in front of it. If left blank `man' will be used as the default path.
+
+MAN_OUTPUT             = man
+
+# The MAN_EXTENSION tag determines the extension that is added to
+# the generated man pages (default is the subroutine's section .3)
+
+MAN_EXTENSION          = .3
+
+# If the MAN_LINKS tag is set to YES and Doxygen generates man output,
+# then it will generate one additional man file for each entity
+# documented in the real man page(s). These additional files
+# only source the real man page, but without them the man command
+# would be unable to find the correct page. The default is NO.
+
+MAN_LINKS              = NO
+
+#---------------------------------------------------------------------------
+# configuration options related to the XML output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_XML tag is set to YES Doxygen will
+# generate an XML file that captures the structure of
+# the code including all documentation.
+
+GENERATE_XML           = NO
+
+# The XML_OUTPUT tag is used to specify where the XML pages will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
+# put in front of it. If left blank `xml' will be used as the default path.
+
+XML_OUTPUT             = xml
+
+# The XML_SCHEMA tag can be used to specify an XML schema,
+# which can be used by a validating XML parser to check the
+# syntax of the XML files.
+
+XML_SCHEMA             =
+
+# The XML_DTD tag can be used to specify an XML DTD,
+# which can be used by a validating XML parser to check the
+# syntax of the XML files.
+
+XML_DTD                =
+
+# If the XML_PROGRAMLISTING tag is set to YES Doxygen will
+# dump the program listings (including syntax highlighting
+# and cross-referencing information) to the XML output. Note that
+# enabling this will significantly increase the size of the XML output.
+
+XML_PROGRAMLISTING     = YES
+
+#---------------------------------------------------------------------------
+# configuration options for the AutoGen Definitions output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will
+# generate an AutoGen Definitions (see autogen.sf.net) file
+# that captures the structure of the code including all
+# documentation. Note that this feature is still experimental
+# and incomplete at the moment.
+
+GENERATE_AUTOGEN_DEF   = NO
+
+#---------------------------------------------------------------------------
+# configuration options related to the Perl module output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_PERLMOD tag is set to YES Doxygen will
+# generate a Perl module file that captures the structure of
+# the code including all documentation. Note that this
+# feature is still experimental and incomplete at the
+# moment.
+
+GENERATE_PERLMOD       = NO
+
+# If the PERLMOD_LATEX tag is set to YES Doxygen will generate
+# the necessary Makefile rules, Perl scripts and LaTeX code to be able
+# to generate PDF and DVI output from the Perl module output.
+
+PERLMOD_LATEX          = NO
+
+# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be
+# nicely formatted so it can be parsed by a human reader.  This is useful
+# if you want to understand what is going on.  On the other hand, if this
+# tag is set to NO the size of the Perl module output will be much smaller
+# and Perl will parse it just the same.
+
+PERLMOD_PRETTY         = YES
+
+# The names of the make variables in the generated doxyrules.make file
+# are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX.
+# This is useful so different doxyrules.make files included by the same
+# Makefile don't overwrite each other's variables.
+
+PERLMOD_MAKEVAR_PREFIX =
+
+#---------------------------------------------------------------------------
+# Configuration options related to the preprocessor
+#---------------------------------------------------------------------------
+
+# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will
+# evaluate all C-preprocessor directives found in the sources and include
+# files.
+
+ENABLE_PREPROCESSING   = YES
+
+# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro
+# names in the source code. If set to NO (the default) only conditional
+# compilation will be performed. Macro expansion can be done in a controlled
+# way by setting EXPAND_ONLY_PREDEF to YES.
+
+MACRO_EXPANSION        = NO
+
+# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES
+# then the macro expansion is limited to the macros specified with the
+# PREDEFINED and EXPAND_AS_DEFINED tags.
+
+EXPAND_ONLY_PREDEF     = NO
+
+# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files
+# in the INCLUDE_PATH (see below) will be search if a #include is found.
+
+SEARCH_INCLUDES        = YES
+
+# The INCLUDE_PATH tag can be used to specify one or more directories that
+# contain include files that are not input files but should be processed by
+# the preprocessor.
+
+INCLUDE_PATH           =
+
+# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard
+# patterns (like *.h and *.hpp) to filter out the header-files in the
+# directories. If left blank, the patterns specified with FILE_PATTERNS will
+# be used.
+
+INCLUDE_FILE_PATTERNS  =
+
+# The PREDEFINED tag can be used to specify one or more macro names that
+# are defined before the preprocessor is started (similar to the -D option of
+# gcc). The argument of the tag is a list of macros of the form: name
+# or name=definition (no spaces). If the definition and the = are
+# omitted =1 is assumed. To prevent a macro definition from being
+# undefined via #undef or recursively expanded use the := operator
+# instead of the = operator.
+
+PREDEFINED             =
+
+# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then
+# this tag can be used to specify a list of macro names that should be expanded.
+# The macro definition that is found in the sources will be used.
+# Use the PREDEFINED tag if you want to use a different macro definition.
+
+EXPAND_AS_DEFINED      =
+
+# If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then
+# doxygen's preprocessor will remove all function-like macros that are alone
+# on a line, have an all uppercase name, and do not end with a semicolon. Such
+# function macros are typically used for boiler-plate code, and will confuse
+# the parser if not removed.
+
+SKIP_FUNCTION_MACROS   = YES
+
+#---------------------------------------------------------------------------
+# Configuration::additions related to external references
+#---------------------------------------------------------------------------
+
+# The TAGFILES option can be used to specify one or more tagfiles.
+# Optionally an initial location of the external documentation
+# can be added for each tagfile. The format of a tag file without
+# this location is as follows:
+#   TAGFILES = file1 file2 ...
+# Adding location for the tag files is done as follows:
+#   TAGFILES = file1=loc1 "file2 = loc2" ...
+# where "loc1" and "loc2" can be relative or absolute paths or
+# URLs. If a location is present for each tag, the installdox tool
+# does not have to be run to correct the links.
+# Note that each tag file must have a unique name
+# (where the name does NOT include the path)
+# If a tag file is not located in the directory in which doxygen
+# is run, you must also specify the path to the tagfile here.
+
+TAGFILES               =
+
+# When a file name is specified after GENERATE_TAGFILE, doxygen will create
+# a tag file that is based on the input files it reads.
+
+GENERATE_TAGFILE       =
+
+# If the ALLEXTERNALS tag is set to YES all external classes will be listed
+# in the class index. If set to NO only the inherited external classes
+# will be listed.
+
+ALLEXTERNALS           = NO
+
+# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed
+# in the modules index. If set to NO, only the current project's groups will
+# be listed.
+
+EXTERNAL_GROUPS        = YES
+
+# The PERL_PATH should be the absolute path and name of the perl script
+# interpreter (i.e. the result of `which perl').
+
+PERL_PATH              = /usr/bin/perl
+
+#---------------------------------------------------------------------------
+# Configuration options related to the dot tool
+#---------------------------------------------------------------------------
+
+# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will
+# generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base
+# or super classes. Setting the tag to NO turns the diagrams off. Note that
+# this option is superseded by the HAVE_DOT option below. This is only a
+# fallback. It is recommended to install and use dot, since it yields more
+# powerful graphs.
+
+CLASS_DIAGRAMS         = YES
+
+# You can define message sequence charts within doxygen comments using the \msc
+# command. Doxygen will then run the mscgen tool (see http://www.mcternan.me.uk/mscgen/) to
+# produce the chart and insert it in the documentation. The MSCGEN_PATH tag allows you to
+# specify the directory where the mscgen tool resides. If left empty the tool is assumed to
+# be found in the default search path.
+
+MSCGEN_PATH            =
+
+# If set to YES, the inheritance and collaboration graphs will hide
+# inheritance and usage relations if the target is undocumented
+# or is not a class.
+
+HIDE_UNDOC_RELATIONS   = YES
+
+# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is
+# available from the path. This tool is part of Graphviz, a graph visualization
+# toolkit from AT&T and Lucent Bell Labs. The other options in this section
+# have no effect if this option is set to NO (the default)
+
+HAVE_DOT               = NO
+
+# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen
+# will generate a graph for each documented class showing the direct and
+# indirect inheritance relations. Setting this tag to YES will force the
+# the CLASS_DIAGRAMS tag to NO.
+
+CLASS_GRAPH            = YES
+
+# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen
+# will generate a graph for each documented class showing the direct and
+# indirect implementation dependencies (inheritance, containment, and
+# class references variables) of the class with other documented classes.
+
+COLLABORATION_GRAPH    = YES
+
+# If the GROUP_GRAPHS and HAVE_DOT tags are set to YES then doxygen
+# will generate a graph for groups, showing the direct groups dependencies
+
+GROUP_GRAPHS           = YES
+
+# If the UML_LOOK tag is set to YES doxygen will generate inheritance and
+# collaboration diagrams in a style similar to the OMG's Unified Modeling
+# Language.
+
+UML_LOOK               = NO
+
+# If set to YES, the inheritance and collaboration graphs will show the
+# relations between templates and their instances.
+
+TEMPLATE_RELATIONS     = NO
+
+# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT
+# tags are set to YES then doxygen will generate a graph for each documented
+# file showing the direct and indirect include dependencies of the file with
+# other documented files.
+
+INCLUDE_GRAPH          = YES
+
+# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and
+# HAVE_DOT tags are set to YES then doxygen will generate a graph for each
+# documented header file showing the documented files that directly or
+# indirectly include this file.
+
+INCLUDED_BY_GRAPH      = YES
+
+# If the CALL_GRAPH, SOURCE_BROWSER and HAVE_DOT tags are set to YES then doxygen will
+# generate a call dependency graph for every global function or class method.
+# Note that enabling this option will significantly increase the time of a run.
+# So in most cases it will be better to enable call graphs for selected
+# functions only using the \callgraph command.
+
+CALL_GRAPH             = NO
+
+# If the CALLER_GRAPH, SOURCE_BROWSER and HAVE_DOT tags are set to YES then doxygen will
+# generate a caller dependency graph for every global function or class method.
+# Note that enabling this option will significantly increase the time of a run.
+# So in most cases it will be better to enable caller graphs for selected
+# functions only using the \callergraph command.
+
+CALLER_GRAPH           = NO
+
+# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen
+# will graphical hierarchy of all classes instead of a textual one.
+
+GRAPHICAL_HIERARCHY    = YES
+
+# If the DIRECTORY_GRAPH, SHOW_DIRECTORIES and HAVE_DOT tags are set to YES
+# then doxygen will show the dependencies a directory has on other directories
+# in a graphical way. The dependency relations are determined by the #include
+# relations between the files in the directories.
+
+DIRECTORY_GRAPH        = YES
+
+# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images
+# generated by dot. Possible values are png, jpg, or gif
+# If left blank png will be used.
+
+DOT_IMAGE_FORMAT       = png
+
+# The tag DOT_PATH can be used to specify the path where the dot tool can be
+# found. If left blank, it is assumed the dot tool can be found in the path.
+
+DOT_PATH               =
+
+# The DOTFILE_DIRS tag can be used to specify one or more directories that
+# contain dot files that are included in the documentation (see the
+# \dotfile command).
+
+DOTFILE_DIRS           =
+
+# The MAX_DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of
+# nodes that will be shown in the graph. If the number of nodes in a graph
+# becomes larger than this value, doxygen will truncate the graph, which is
+# visualized by representing a node as a red box. Note that doxygen if the number
+# of direct children of the root node in a graph is already larger than
+# MAX_DOT_GRAPH_NOTES then the graph will not be shown at all. Also note
+# that the size of a graph can be further restricted by MAX_DOT_GRAPH_DEPTH.
+
+DOT_GRAPH_MAX_NODES    = 50
+
+# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the
+# graphs generated by dot. A depth value of 3 means that only nodes reachable
+# from the root by following a path via at most 3 edges will be shown. Nodes
+# that lay further from the root node will be omitted. Note that setting this
+# option to 1 or 2 may greatly reduce the computation time needed for large
+# code bases. Also note that the size of a graph can be further restricted by
+# DOT_GRAPH_MAX_NODES. Using a depth of 0 means no depth restriction.
+
+MAX_DOT_GRAPH_DEPTH    = 0
+
+# Set the DOT_TRANSPARENT tag to YES to generate images with a transparent
+# background. This is disabled by default, which results in a white background.
+# Warning: Depending on the platform used, enabling this option may lead to
+# badly anti-aliased labels on the edges of a graph (i.e. they become hard to
+# read).
+
+DOT_TRANSPARENT        = YES
+
+# Set the DOT_MULTI_TARGETS tag to YES allow dot to generate multiple output
+# files in one run (i.e. multiple -o and -T options on the command line). This
+# makes dot run faster, but since only newer versions of dot (>1.8.10)
+# support this, this feature is disabled by default.
+
+DOT_MULTI_TARGETS      = NO
+
+# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will
+# generate a legend page explaining the meaning of the various boxes and
+# arrows in the dot generated graphs.
+
+GENERATE_LEGEND        = YES
+
+# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will
+# remove the intermediate dot files that are used to generate
+# the various graphs.
+
+DOT_CLEANUP            = YES
+
+#---------------------------------------------------------------------------
+# Configuration::additions related to the search engine
+#---------------------------------------------------------------------------
+
+# The SEARCHENGINE tag specifies whether or not a search engine should be
+# used. If set to NO the values of all tags below this one will be ignored.
+
+SEARCHENGINE           = NO
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/eeprom.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/eeprom.c
new file mode 100644
index 00000000..d7048dda
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/eeprom.c
@@ -0,0 +1,185 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   eeprom.c: Persistent configuration storage
+
+*/
+
+#include <avr/eeprom.h>
+#include <avr/io.h>
+#include <string.h>
+#include "config.h"
+#include "diskio.h"
+#include "fatops.h"
+#include "flags.h"
+#include "iec.h"
+#include "timer.h"
+#include "ustring.h"
+#include "eeprom.h"
+
+uint8_t rom_filename[ROM_NAME_LENGTH+1];
+
+/**
+ * struct storedconfig - in-eeprom data structure
+ * @dummy      : EEPROM position 0 is unused
+ * @checksum   : Checksum over the EEPROM contents
+ * @structsize : size of the eeprom structure
+ * @unused     : unused byte kept for structure compatibility
+ * @globalflags: subset of the globalflags variable
+ * @address    : device address set by software
+ * @hardaddress: device address set by jumpers
+ * @fileexts   : file extension mapping mode
+ * @drvflags0  : 16 bits of drv mappings, organized as 4 nybbles.
+ * @drvflags1  : 16 bits of drv mappings, organized as 4 nybbles.
+ * @imagedirs  : Disk images-as-directory mode
+ * @romname    : M-R rom emulation file name (zero-padded, but not terminated)
+ *
+ * This is the data structure for the contents of the EEPROM.
+ *
+ * Do not remove any fields!
+ * Only add fields at the end!
+ */
+static EEMEM struct {
+  uint8_t  dummy;
+  uint8_t  checksum;
+  uint16_t structsize;
+  uint8_t  unused;
+  uint8_t  global_flags;
+  uint8_t  address;
+  uint8_t  hardaddress;
+  uint8_t  fileexts;
+  uint16_t drvconfig0;
+  uint16_t drvconfig1;
+  uint8_t  imagedirs;
+  uint8_t  romname[ROM_NAME_LENGTH];
+} storedconfig;
+
+/**
+ * read_configuration - reads configuration from EEPROM
+ *
+ * This function reads the stored configuration values from the EEPROM.
+ * If the stored checksum doesn't match the calculated one nothing will
+ * be changed.
+ */
+void read_configuration(void) {
+  uint16_t i,size;
+  uint8_t checksum, tmp;
+
+  /* Set default values */
+  globalflags         |= POSTMATCH;            /* Post-* matching enabled */
+  globalflags         |= FAT32_FREEBLOCKS;     /* Calculate the number of free blocks on FAT32 */
+  file_extension_mode  = 1;                    /* Store x00 extensions except for PRG */
+  set_drive_config(get_default_driveconfig()); /* Set the default drive configuration */
+  memset(rom_filename, 0, sizeof(rom_filename));
+
+  /* Use the NEXT button to skip reading the EEPROM configuration */
+  if (!(BUTTON_PIN & BUTTON_NEXT)) {
+    ignore_keys();
+    return;
+  }
+
+  size = eeprom_read_word(&storedconfig.structsize);
+
+  /* Calculate checksum of EEPROM contents */
+  checksum = 0;
+  for (i=2; i<size; i++)
+    checksum += eeprom_read_byte((uint8_t *)i);
+
+  /* Abort if the checksum doesn't match */
+  if (checksum != eeprom_read_byte(&storedconfig.checksum)) {
+    EEAR = 0;
+    return;
+  }
+
+  /* Read data from EEPROM */
+  tmp = eeprom_read_byte(&storedconfig.global_flags);
+  globalflags &= (uint8_t)~(POSTMATCH |
+                            EXTENSION_HIDING | FAT32_FREEBLOCKS);
+  globalflags |= tmp;
+
+  if (eeprom_read_byte(&storedconfig.hardaddress) == DEVICE_SELECT)
+    device_address = eeprom_read_byte(&storedconfig.address);
+
+  file_extension_mode = eeprom_read_byte(&storedconfig.fileexts);
+
+#ifdef NEED_DISKMUX
+  if (size > 9) {
+    uint32_t tmpconfig;
+    tmpconfig = eeprom_read_word(&storedconfig.drvconfig0);
+    tmpconfig |= (uint32_t)eeprom_read_word(&storedconfig.drvconfig1) << 16;
+    set_drive_config(tmpconfig);
+  }
+
+  /* sanity check.  If the user has truly turned off all drives, turn the
+   * defaults back on
+   */
+  if(drive_config == 0xffffffff)
+    set_drive_config(get_default_driveconfig());
+#endif
+
+  if (size > 13)
+    image_as_dir = eeprom_read_byte(&storedconfig.imagedirs);
+
+  if (size > 29)
+    eeprom_read_block(rom_filename, &storedconfig.romname, ROM_NAME_LENGTH);
+
+  /* Paranoia: Set EEPROM address register to the dummy entry */
+  EEAR = 0;
+}
+
+/**
+ * write_configuration - stores configuration data to EEPROM
+ *
+ * This function stores the current configuration values to the EEPROM.
+ */
+void write_configuration(void) {
+  uint16_t i;
+  uint8_t checksum;
+
+  /* Write configuration to EEPROM */
+  eeprom_write_word(&storedconfig.structsize, sizeof(storedconfig));
+  eeprom_write_byte(&storedconfig.global_flags,
+                    globalflags & (POSTMATCH |
+                                   EXTENSION_HIDING | FAT32_FREEBLOCKS));
+  eeprom_write_byte(&storedconfig.address, device_address);
+  eeprom_write_byte(&storedconfig.hardaddress, DEVICE_SELECT);
+  eeprom_write_byte(&storedconfig.fileexts, file_extension_mode);
+#ifdef NEED_DISKMUX
+  eeprom_write_word(&storedconfig.drvconfig0, drive_config);
+  eeprom_write_word(&storedconfig.drvconfig1, drive_config >> 16);
+#endif
+  eeprom_write_byte(&storedconfig.imagedirs, image_as_dir);
+  memset(rom_filename+ustrlen(rom_filename), 0, sizeof(rom_filename)-ustrlen(rom_filename));
+  eeprom_write_block(rom_filename, &storedconfig.romname, ROM_NAME_LENGTH);
+
+  /* Calculate checksum over EEPROM contents */
+  checksum = 0;
+  for (i=2;i<sizeof(storedconfig);i++)
+    checksum += eeprom_read_byte((uint8_t *) i);
+
+  /* Store checksum to EEPROM */
+  eeprom_write_byte(&storedconfig.checksum, checksum);
+
+  /* Paranoia: Set EEPROM address register to the dummy entry */
+  EEAR = 0;
+}
+
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/eeprom.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/eeprom.h
new file mode 100644
index 00000000..ce112948
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/eeprom.h
@@ -0,0 +1,37 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   eeprom.h: Persistent configuration storage
+
+*/
+
+#ifndef EEPROM_H
+#define EEPROM_H
+
+#define ROM_NAME_LENGTH 16
+
+extern uint8_t rom_filename[ROM_NAME_LENGTH+1];
+
+void read_configuration(void);
+void write_configuration(void);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/errormsg.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/errormsg.c
new file mode 100644
index 00000000..8c9de0a9
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/errormsg.c
@@ -0,0 +1,278 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   errormsg.c: Generates Commodore-compatible error messages
+
+*/
+#define __PROG_TYPES_COMPAT__
+#include <avr/pgmspace.h>
+#include <avr/io.h>
+#include <ctype.h>
+#include <stdlib.h>
+#include <string.h>
+#include "config.h"
+#include "buffers.h"
+#include "diskio.h"
+#include "display.h"
+#include "eeprom.h"
+#include "fatops.h"
+#include "flags.h"
+#include "led.h"
+#include "ustring.h"
+#include "utils.h"
+#include "errormsg.h"
+
+uint8_t current_error;
+uint8_t error_buffer[CONFIG_ERROR_BUFFER_SIZE];
+
+/// Version number string, will be added to message 73
+const char PROGMEM versionstr[] = HW_NAME " V" VERSION;
+
+/// Long version string, used for message 9
+const char PROGMEM longverstr[] = LONGVERSION;
+
+#define EC(x) x+0x80
+
+/// Abbreviations used in the main error strings
+static const prog_uint8_t abbrevs[] = {
+  EC(0), 'F','I','L','E',
+  EC(1), 'R','E','A','D',
+  EC(2), 'W','R','I','T','E',
+  EC(3), ' ','E','R','R','O','R',
+  EC(4), ' ','N','O','T',' ',
+  EC(5), 'D','I','S','K',' ',
+  EC(6), 'O','P','E','N',
+  EC(7), 'R','E','C','O','R','D',
+  EC(8), 'P','A','R','T','I','T','I','O','N',' ',
+  EC(9), 'S','E','L','E','C','T','E','D',
+  EC(10), 'I','L','L','E','G','A','L',
+  EC(11), ' ','T','O','O',' ',
+  EC(12), 'N','O',' ',
+  EC(127)
+};
+
+/// Error string table
+static const prog_uint8_t messages[] = {
+  EC(00),
+    ' ','O','K',
+  EC(01),
+    0,'S',' ','S','C','R','A','T','C','H','E','D',
+  EC(02),
+    8,9,
+  EC(20), EC(21), EC(22), EC(23), EC(24), EC(27),
+    1,3,
+  EC(25), EC(28),
+    2,3,
+  EC(26),
+    2,' ','P','R','O','T','E','C','T',' ','O','N',
+  EC(29),
+    5,'I','D',' ','M','I','S','M','A','T','C','H',
+  EC(30), EC(31), EC(32), EC(33), EC(34),
+    'S','Y','N','T','A','X',3,
+  EC(39), EC(62),
+    0,4,'F','O','U','N','D',
+  EC(50),
+    7,4,'P','R','E','S','E','N','T',
+  EC(51),
+    'O','V','E','R','F','L','O','W',' ','I','N',' ',7,
+  EC(52),
+    0,11,'L','A','R','G','E',
+  EC(60),
+    2,' ',0,' ',6,
+  EC(61),
+    0,4,6,
+  EC(63),
+    0,' ','E','X','I','S','T','S',
+  EC(64),
+    0,' ','T','Y','P','E',' ','M','I','S','M','A','T','C','H',
+  EC(65),
+    12,'B','L','O','C','K',
+  EC(66), EC(67),
+    10,' ','T','R','A','C','K',' ','O','R',' ','S','E','C','T','O','R',
+  EC(70),
+    12,'C','H','A','N','N','E','L',
+  EC(71),
+    'D','I','R',3,
+  EC(72),
+    5,'F','U','L','L',
+  EC(74),
+    'D','R','I','V','E',4,1,'Y',
+  EC(77),
+    9,' ',8,10,
+  EC(78),
+    'B','U','F','F','E','R',11,'S','M','A','L','L',
+  EC(79),
+    'I','M','A','G','E',' ',0,' ','I','N','V','A','L','I','D',
+  EC(99),
+    'C','L','O','C','K',' ','U','N','S','T','A','B','L','E',
+  EC(127)
+};
+
+/* Workaround for the make-challenged */
+#ifndef VERSION
+#  warning "VERSION not defined, using dummy"
+#  define VERSION "X.X"
+#endif
+
+static uint8_t *appendmsg(uint8_t *msg, const prog_uint8_t *table, const uint8_t entry) {
+  uint8_t i,tmp;
+
+  i = 0;
+  do {
+    tmp = pgm_read_byte(table+i++);
+    if (tmp == EC(entry) || tmp == EC(127))
+      break;
+  } while (1);
+
+  if (tmp == EC(127)) {
+    /* Unknown error */
+    *msg++ = '?';
+  } else {
+    /* Skip over remaining error numbers */
+    while (pgm_read_byte(table+i) >= EC(0)) i++;
+
+    /* Copy error string to buffer */
+    do {
+      tmp = pgm_read_byte(table+i++);
+
+      if (tmp < 32) {
+        /* Abbreviation found, handle by recursion */
+        msg = appendmsg(msg,abbrevs,tmp);
+        continue;
+      }
+
+      if (tmp < EC(0))
+        /* Don't copy error numbers */
+        *msg++ = tmp;
+    } while (tmp < EC(0));
+  }
+
+  return msg;
+}
+
+static uint8_t *appendbool(uint8_t *msg, uint8_t ch, uint8_t value) {
+  if (ch)
+    *msg++ = ch;
+
+  if (value)
+    *msg++ = '+';
+  else
+    *msg++ = '-';
+
+  *msg++ = ':';
+
+  return msg;
+}
+
+void set_error(uint8_t errornum) {
+  set_error_ts(errornum,0,0);
+}
+
+void set_error_ts(uint8_t errornum, uint8_t track, uint8_t sector) {
+  uint8_t *msg = error_buffer;
+  uint8_t i = 0;
+
+  current_error = errornum;
+  buffers[CONFIG_BUFFER_COUNT].data     = error_buffer;
+  buffers[CONFIG_BUFFER_COUNT].lastused = 0;
+  buffers[CONFIG_BUFFER_COUNT].position = 0;
+  memset(error_buffer,0,sizeof(error_buffer));
+
+  msg = appendnumber(msg,errornum);
+  *msg++ = ',';
+
+  if (errornum == ERROR_STATUS) {
+    switch(sector) {
+    case 0:
+    default:
+      *msg++ = 'E';
+      msg = appendnumber(msg, file_extension_mode);
+      msg = appendbool(msg, 0, globalflags & EXTENSION_HIDING);
+
+      msg = appendbool(msg, '*', globalflags & POSTMATCH);
+
+      msg = appendbool(msg, 'B', globalflags & FAT32_FREEBLOCKS);
+
+      *msg++ = 'I';
+      msg = appendnumber(msg, image_as_dir);
+
+      *msg++ = ':';
+      *msg++ = 'R';
+      ustrcpy(msg, rom_filename);
+      msg += ustrlen(rom_filename);
+
+      break;
+    case 1: // Drive Config
+      *msg++ = 'D';
+      while(i < 8) {
+        if(map_drive(i) != 0x0f) {
+          *msg++ = ':';
+          msg = appendnumber(msg,i);
+          *msg++ = '=';
+          msg = appendnumber(msg,map_drive(i));
+        }
+        i++;
+      }
+      break;
+    }
+
+  } else if (errornum == ERROR_LONGVERSION || errornum == ERROR_DOSVERSION) {
+    /* Start with the name and version number */
+    while ((*msg++ = pgm_read_byte(versionstr+i++))) ;
+
+    /* Append the long version if requested */
+    if (errornum == ERROR_LONGVERSION) {
+      i = 0;
+      msg--;
+      while ((*msg++ = toupper(pgm_read_byte(longverstr+i++)))) ;
+    }
+
+    msg--;
+  } else {
+    msg = appendmsg(msg,messages,errornum);
+  }
+  *msg++ = ',';
+
+  msg = appendnumber(msg,track);
+  *msg++ = ',';
+
+  msg = appendnumber(msg,sector);
+  *msg = 13;
+
+  if (errornum >= 20 && errornum != ERROR_DOSVERSION) {
+    // FIXME: Compare to E648
+    // NOTE: 1571 doesn't write the BAM and closes some buffers if an error occured
+    led_state |= LED_ERROR;
+  } else {
+    led_state &= (uint8_t)~LED_ERROR;
+    set_error_led(0);
+  }
+  buffers[CONFIG_BUFFER_COUNT].lastused = msg - error_buffer;
+  /* Send message without the final 0x0d */
+  display_errorchannel(msg - error_buffer, error_buffer);
+}
+
+/* Callback for the error channel buffer */
+uint8_t set_ok_message(buffer_t *buf) {
+  set_error(0);
+  return 0;
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/errormsg.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/errormsg.h
new file mode 100644
index 00000000..257990ae
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/errormsg.h
@@ -0,0 +1,88 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   errormsg.h: Definitions for the error message generator
+
+*/
+
+#ifndef ERRORMSG_H
+#define ERRORMSG_H
+#include <avr/pgmspace.h>
+#include <stdint.h>
+#include "buffers.h"
+
+extern uint8_t current_error;
+extern uint8_t error_buffer[CONFIG_ERROR_BUFFER_SIZE];
+
+
+void set_error_ts(uint8_t errornum, uint8_t track, uint8_t sector);
+void set_error(uint8_t errornum);
+uint8_t set_ok_message(buffer_t *buf);
+
+// Commodore DOS error codes
+#define ERROR_OK                  0
+#define ERROR_SCRATCHED           1
+#define ERROR_PARTITION_SELECTED  2
+#define ERROR_STATUS              3
+#define ERROR_LONGVERSION         9
+#define ERROR_READ_NOHEADER      20
+#define ERROR_READ_NOSYNC        21
+#define ERROR_READ_NODATA        22
+#define ERROR_READ_CHECKSUM      23
+#define ERROR_WRITE_VERIFY       25
+#define ERROR_WRITE_PROTECT      26
+#define ERROR_READ_HDRCHECKSUM   27
+#define ERROR_DISK_ID_MISMATCH   29
+#define ERROR_SYNTAX_UNKNOWN     30
+#define ERROR_SYNTAX_UNABLE      31
+#define ERROR_SYNTAX_TOOLONG     32
+#define ERROR_SYNTAX_JOKER       33
+#define ERROR_SYNTAX_NONAME      34
+#define ERROR_FILE_NOT_FOUND_39  39
+#define ERROR_RECORD_MISSING     50
+#define ERROR_RECORD_OVERFLOW    51
+#define ERROR_FILE_TOO_LARGE     52
+#define ERROR_WRITE_FILE_OPEN    60
+#define ERROR_FILE_NOT_OPEN      61
+#define ERROR_FILE_NOT_FOUND     62
+#define ERROR_FILE_EXISTS        63
+#define ERROR_FILE_TYPE_MISMATCH 64
+#define ERROR_NO_BLOCK           65
+#define ERROR_ILLEGAL_TS_COMMAND 66
+#define ERROR_ILLEGAL_TS_LINK    67
+#define ERROR_NO_CHANNEL         70
+#define ERROR_DIR_ERROR          71
+#define ERROR_DISK_FULL          72
+#define ERROR_DOSVERSION         73
+#define ERROR_DRIVE_NOT_READY    74
+#define ERROR_PARTITION_ILLEGAL  77
+#define ERROR_BUFFER_TOO_SMALL   78
+#define ERROR_IMAGE_INVALID      79
+#define ERROR_CLOCK_UNSTABLE     99
+
+/// Version number string, will be added to message 73
+extern const char PROGMEM versionstr[];
+
+/// Long version string, used for message 9
+extern const char PROGMEM longverstr[];
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fastloader-ll.S b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fastloader-ll.S
new file mode 100644
index 00000000..116e701b
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fastloader-ll.S
@@ -0,0 +1,1620 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+   Copyright (C) 2007-2008  M.Kiesel <mayne@users.sourceforge.net>
+   Final Cartridge III, DreamLoad fastloader support:
+   Copyright (C) 2008  Thomas Giesel <skoe@directbox.com>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN, see tff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   fastloader.S: Low level fastloader transfer routines.
+
+   Thanks to Jochen Adler for his Jiffy docs at http://www.nlq.de/
+
+*/
+
+
+#include "config.h"
+#include "fastloader.h"
+#include <avr/io.h>
+
+/* Timing offsets for JiffyDos read/write */
+/* These values are added to the delayloop counter before the first      */
+/* bitpair read/write. They were determined experimentally to center the */
+/* range of working OSCCAL values around the default value.              */
+#define JIFFY_OFFSET_WRITE 30
+#define JIFFY_OFFSET_READ  30
+
+        .section .text
+
+#if defined(IEC_ATN_INT_VECT) && defined(CONFIG_LOADER_DREAMLOAD)
+        ;; ===================================================================
+        ;; ATN(+CLK) Interrupt service routine for IEC bus
+        ;; ===================================================================
+        ;
+        ; Functions called from here may change these registers:
+        ; r0, r18, r19, r24
+        ; Other registers must be saved and restored by the called functions
+        ;
+        .global IEC_ATN_INT_VECT
+IEC_ATN_INT_VECT:
+        ; functions called from here must only change these registers:
+        push    r18
+        in      r18, _SFR_IO_ADDR(SREG)
+        push    r18
+        push    r19
+        push    r24
+        push    r0
+
+#ifdef IEC_PCMSK
+        lds     r18, _SFR_ADDR(IEC_PCMSK)
+        bst     r18, IEC_PIN_ATN        ; only check ATN
+        brtc    iiv_atn_irq_end         ; if it is an IRQ source
+#endif
+
+        ; check if ATN is low
+        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+        rjmp    iiv_atn_irq_end
+
+        ; ATN is low, continue depending from active fast loader
+        lds     r18, detected_loader
+        cpi     r18, FL_DREAMLOAD_OLD
+        brne    iiv_not_fl_dreamload_old
+        ; dreamload (old), receive a command code
+        rcall   dreamload_get_command_old
+        rjmp    iiv_atn_irq_end         ; no other ATN action needed
+
+iiv_not_fl_dreamload_old:
+        ; no custom behaviour, this is ATN ACK
+        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA    ; DATA low
+
+iiv_atn_irq_end:
+#ifdef IEC_PCMSK
+        lds     r18, _SFR_ADDR(IEC_PCMSK)
+        bst     r18, IEC_PIN_CLOCK      ; only check CLOCK
+        brtc    iiv_clock_irq_end       ; if it is an IRQ source
+
+        ; check if CLOCK is low
+        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+        rjmp    iiv_clock_irq_end
+
+        ; CLOCK is low, continue depending from active fast loader
+        lds     r18, detected_loader
+        cpi     r18, FL_DREAMLOAD
+        brne    iiv_not_fl_dreamload
+        ; dreamload, receive a command code
+        rcall   dreamload_get_command
+        rjmp    iiv_clock_irq_end       ; no other CLOCK action needed
+
+iiv_not_fl_dreamload:
+#endif // ifdef IEC_PCMSK
+
+iiv_clock_irq_end:
+
+        pop     r0
+        pop     r24
+        pop     r19
+        pop     r18
+        out     _SFR_IO_ADDR(SREG), r18
+        pop     r18
+        reti
+#endif // ifdef IEC_ATN_INT_VECT
+
+
+#ifdef IEC_CLK_INT_VECT
+        ;; ===================================================================
+        ;; CLK Interrupt service routine for IEC bus
+        ;; ===================================================================
+        ;
+        ; Functions called from here may change these registers:
+        ; r0, r18, r19, r24
+        ; Other registers must be saved and restored by the called functions
+        ;
+        .global IEC_CLK_INT_VECT
+IEC_CLK_INT_VECT:
+        ; functions called from here must only change these registers:
+        push    r18
+        in      r18, _SFR_IO_ADDR(SREG)
+        push    r18
+        push    r19
+        push    r24
+        push    r0
+
+        ; check if CLOCK is low
+        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+        rjmp    clk_irq_end
+
+        ; CLOCK is low, continue depending from active fast loader
+#ifdef CONFIG_LOADER_DREAMLOAD
+        lds     r18, detected_loader
+        cpi     r18, FL_DREAMLOAD
+        brne    clk_not_fl_dreamload
+        ; dreamload, receive a command code
+        rcall   dreamload_get_command
+        rjmp    clk_irq_end       ; no other CLOCK action needed
+clk_not_fl_dreamload:
+#endif // ifdef CONFIG_LOADER_DREAMLOAD
+
+clk_irq_end:
+
+        pop     r0
+        pop     r24
+        pop     r19
+        pop     r18
+        out     _SFR_IO_ADDR(SREG), r18
+        pop     r18
+        reti
+#endif // ifdef IEC_CLK_INT_VECT
+
+
+        ;; ===================================================================
+        ;;  Utility routines
+        ;; ===================================================================
+
+        ;;  Used by the macro below, don't call directly
+cycleloop2:
+        nop                     ; 1
+cycleloop1:
+        nop                     ; 1
+cycleloop0:
+        dec     r18             ; 1
+        brne    cycleloop0      ; 2/1
+        ret                     ; 4
+
+        ;; This macro waits for the specified number of cycles
+        ;;  Uses r18
+        .macro delay_cycles num
+        ldi     r18, 1 + (\num - 10) / 3 ; 1
+        .if (\num - 10) % 3 == 0
+        rcall   cycleloop0      ; 3
+        .elseif (\num - 10) % 3 == 1
+        rcall   cycleloop1      ; 3
+        .else
+        rcall   cycleloop2      ; 3
+        .endif
+        .endm
+
+
+        ;; Including the rcall this will delay for 8 cycles
+delay1us:
+        nop                     ; 1
+        ret                     ; 4
+
+        ;; wait for ATN high
+wait_atn_high:
+        sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+        rjmp    wait_atn_high
+        ret
+
+        ;; wait for ATN low
+wait_atn_low:
+        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+        rjmp    wait_atn_low
+        ret
+
+
+        ;; ====================================================================
+        ;;  JiffyDOS
+        ;; ====================================================================
+
+        ;;
+        ;; Receives a single byte using the JiffyDOS protocol
+        ;; return uint8_t reveicedbyte (r24)
+        ;;
+        .global jiffy_receive
+jiffy_receive:
+        ;; Disable interrupts
+        cli
+
+        ;; Move pointer to EOF variable into Z
+        movw    r30,r24
+        clr     r24             ; clear output register
+        clr     r25             ; clear high byte of return value
+
+        ;; Set clock+data high
+        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+
+        ;; Wait until clock is high and emulate ATN-Ack
+0:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA ; Data low if ATN is low
+        sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+        rjmp    0b
+
+        ;; Wait for 13us from clock high -> 104 cycles
+        delay_cycles 104 + JIFFY_OFFSET_READ ; 104 + Offset
+
+        ;; Read bit 5+4
+        in      r0, _SFR_IO_ADDR(IEC_PIN) ; 1
+
+        ;; Store bits in r24
+        bst     r0, IEC_PIN_DATA  ; 1 - get data bit
+        bld     r24, 5            ; 1 - store as bit 5
+        bst     r0, IEC_PIN_CLOCK ; 1 - get clock bit
+        bld     r24, 4            ; 1 - store as bit 4
+
+        ;; Wait 13us -> 104-5=99 cycles
+        delay_cycles 99         ; 99
+
+        ;; Read bit 7+6
+        in      r0, _SFR_IO_ADDR(IEC_PIN) ; 1
+
+        ;; Store bits in r24
+        bst     r0, IEC_PIN_DATA  ; 1 - get data bit
+        bld     r24, 7            ; 1 - store as bit 7
+        bst     r0, IEC_PIN_CLOCK ; 1 - get clock bit
+        bld     r24, 6            ; 1 - store as bit 6
+
+        ;; Wait 11us -> 88-5=83 cycles
+        delay_cycles 83         ; 83
+
+        ;; Read bit 1+3 [sic]
+        in      r0, _SFR_IO_ADDR(IEC_PIN) ; 1
+        bst     r0, IEC_PIN_DATA  ; 1 - get data bit
+        bld     r24, 1            ; 1 - store as bit 1
+        bst     r0, IEC_PIN_CLOCK ; 1 - get clock bit
+        bld     r24, 3            ; 1 - store as bit 3
+
+        ;; Wait 13us -> 104-5=99 cycles
+        delay_cycles 99         ; 99
+
+        ;; Read Bit 0+2
+        in      r0, _SFR_IO_ADDR(IEC_PIN) ; 1
+        bst     r0, IEC_PIN_DATA  ; 1 - get data bit
+        bld     r24, 0            ; 1 - store as bit 0
+        bst     r0, IEC_PIN_CLOCK ; 1 - get clock bit
+        bld     r24, 2            ; 1 - store as bit 2
+
+        ;; Wait 13us -> 104-5=99 cycles
+        delay_cycles 99         ; 99
+
+        ;; Read EOI mark
+        in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+
+        ;; Wait 6us -> 48-1=47 cycles
+        delay_cycles 47         ; 47
+
+        ;; Data low
+        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA ; 1
+        delay_cycles 10*8       ; make sure the C64 can see that
+
+        ;; Post-process data and store last bus state
+        com     r24             ; invert received data (result)
+        st      Z, r19          ; store last bus state
+        sei                     ; enable interrupts
+        ret
+
+
+
+        ;; Shifts the lowest two bits from r0 to r19
+        ;; and sends then on the bus at cycle 12
+        ;; Needs 16 cycles including the rcall
+jiffy_sendbits:
+        in      r19, _SFR_IO_ADDR(IEC_OUT) ; 1 - read port
+        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+                                    ; 1 - mask IEC bits
+        bst     r0, 0               ; 1 - get bit 0
+        bld     r19, IEC_OPIN_CLOCK ; 1 - send on the clock line
+        bst     r0, 1               ; 1 - get bit 1
+        bld     r19, IEC_OPIN_DATA  ; 1 - send on the data line
+        lsr     r0                  ; 1 - remove source bits
+        lsr     r0                  ; 1
+        out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1 - output the bit pair
+        ret                         ; 4
+
+        ;;
+        ;; Sends a single byte using the Jiffy protocol
+        ;; uint8_t value (r24), uint8_t eoi (r22), uint8_t loadflags (r20)
+        ;; return uint8_t atnactive (r24)
+        ;;
+        ;; eoi should always be 0 for LOAD because the eoi marker is
+        ;; transmitted in a different way there (see C code).
+        ;;
+        ;; Loadflags has a dual purpose:
+        ;;  - if it's != 0, the start condition will be modified for Jiffy-LOAD
+        ;;  - bit 7 will be cleared after that
+        ;;  - if it's still != 0, the function will exit after sending
+        ;;    the last bitpair - required for all but the final byte of a block
+        ;;    during LOAD
+        .global jiffy_send
+jiffy_send:
+        cli                     ; Disable interrupts
+
+        ;; Calculate bus wait condition based on current state
+        ;; The loop below will spin while ATN and Clock are high and
+        ;; - Data is low  (single-byte transfer)
+        ;; - Data is high (LOAD)
+        ldi     r21, IEC_BIT_CLOCK | IEC_BIT_ATN
+        tst     r20             ; loadflag set?
+        breq    0f              ; Yes, skip
+                ; No: Set data bit
+        ori     r21, IEC_BIT_DATA
+
+0:      andi    r20, 0x7f       ; Clear bit 7 of loadflags
+
+        ;; Calculate bus state for EOI/not-EOI mark
+        tst     r22             ; EOI flag set?
+        breq    0f              ; No, branch
+
+        in      r22, _SFR_IO_ADDR(IEC_OUT)
+        andi    r22, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+        ori     r22, IEC_OBIT_DATA ; Data low, Clock hi on EOI
+        rjmp    1f
+
+0:      in      r22, _SFR_IO_ADDR(IEC_OUT)
+        andi    r22, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+        ori     r22, IEC_OBIT_CLOCK ; Data hi, Clock low on non-EOI
+
+1:
+        ;; Set clock and data high/inactive - FFB5
+        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+                ; this is the actual ready signal for the C64
+        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+
+        ;; Wait 1us to allow the bus to settle (J1541 needs 4us here)
+        rcall   delay1us
+
+        ;; Set up a few registers
+        mov     r0, r24         ; move data byte to r0
+        com     r0              ; invert data byte
+
+        ;; Wait for start condition (calculated above) from C64 - FFB8
+0:      in      r24, _SFR_IO_ADDR(IEC_PIN)
+        andi    r24, IEC_BIT_CLOCK | IEC_BIT_DATA | IEC_BIT_ATN ; 1
+        cp      r24, r21        ; 1
+        breq    0b              ; 1
+
+        ;; Check for ATN (J1541 doesn't do this, but I'm paranoid)
+        ;; Doesn't work, further analysis required
+        andi    r24, IEC_BIT_ATN ; 1
+        breq    js_finish        ; 1 - jump if ATN is low
+
+        ;; Output the first bitpair 6us (48 cycles) after the start
+        ;; 6us is the best-case time from bus check to transmission in J1541
+        delay_cycles 31 + JIFFY_OFFSET_WRITE
+                                ; 31 = 48-17
+        rcall   jiffy_sendbits  ; 12+4 - [FFBD]
+
+        ;; Output the second bitpair 10us (80 cycles) after the first
+        delay_cycles 64         ; 64 = 80-16
+
+        rcall   jiffy_sendbits  ; 12+4 - [FFC4]
+
+        ;; Output the third bitpair 11us (88 cycles) after the second
+        delay_cycles 72         ; 72 = 88-16
+
+        rcall   jiffy_sendbits  ; 12+4 - [FFCC]
+
+        ;; Output the fourth bitpair 10us (80 cycles) after the third
+        delay_cycles 64         ; 64 = 80-16
+
+        rcall   jiffy_sendbits  ; 12+4 - [FFD3]
+
+        ;; Skip sending EOI for LOAD code path
+        tst     r20             ; 1
+        brne    js_finish       ; 1
+
+        ;; Output EOI marker 11us (88 cycles) after the last bitpair
+        delay_cycles 81         ; 81 = 88-7
+
+        out     _SFR_IO_ADDR(IEC_OUT), r22 ; 1 - output EOI marker [FFDB]
+
+        ;; Wait 1us to allow the bus to settle (J1541 needs 4us here)
+        rcall   delay1us
+
+        ;; Wait until data is low, check ATN [FFDE]
+        ;; This loop won't wait when EOI is signalled.
+0:      in      r24, _SFR_IO_ADDR(IEC_PIN) ; Read bus
+        sbrs    r24, IEC_PIN_ATN           ; Skip if ATN is high
+        rjmp    js_finish                  ; ATN low, exit loop
+        sbrc    r24, IEC_PIN_DATA          ; Skip if Data is low
+        rjmp    0b                         ; No Data, no ATN -> loop
+
+js_finish:
+        com     r24             ; invert port state (ATN low returns true)
+        andi    r24, IEC_BIT_ATN ; single out ATN bit
+
+        sei                     ; re-enable interrupts
+        ret
+
+
+#ifdef CONFIG_LOADER_TURBODISK
+        ;; ====================================================================
+        ;;  Turbodisk
+        ;; ====================================================================
+
+        ;;
+        ;; Sends a single byte in r24 using the Turbodisk protocol
+        ;;
+        .global turbodisk_byte
+turbodisk_byte:
+        ;; Wait until data is low
+        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+        rjmp    turbodisk_byte
+
+        ;; Byte preparation
+        com     r24             ; Invert the data byte
+
+        ;; All bus lines high
+        in      r18, _SFR_IO_ADDR(IEC_OUT)
+        andi    r18, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+        out     _SFR_IO_ADDR(IEC_OUT), r18
+
+        ;; Wait until data is high
+0:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA ; 2
+        rjmp    0b
+
+        rcall   delay1us        ; Move the timing window slightly
+
+        ldi     r20, 4          ; 1 - Bitpair counter
+
+tdbitloop:
+        in      r19, _SFR_IO_ADDR(IEC_OUT) ; 1 - read & mask unused IEC port lines
+        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ) ; 1
+        bst     r24, 7              ; 1 - grab bit 7
+        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+        bst     r24, 6              ; 1 - grab bit 6
+        bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+        lsl     r24                 ; 1 - remove source bits
+        lsl     r24                 ; 1
+
+        ;; Wait for 28us from data high -> 224-9=215 cycles
+        delay_cycles 215        ; 215
+
+        out     _SFR_IO_ADDR(IEC_OUT), r19      ; 1 - output the bit pair
+
+        rcall   delay1us        ; 8 - additional us for loops 2-4
+
+        dec     r20             ; 1 - Decrement bitpair counter
+        brne    tdbitloop       ; 2/1 - loop until done
+
+        ;; Wait for 26us from last bitpair -> 208-12=196 cycles
+        delay_cycles 196        ; 196
+
+        ;; Data high, Clock low
+        in      r18, _SFR_IO_ADDR(IEC_OUT)
+        andi    r18, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+        ori     r18, IEC_OBIT_CLOCK
+        out     _SFR_IO_ADDR(IEC_OUT), r18
+
+        ret
+
+
+        ;;
+        ;; Sends a complete buffer of r22 bytes at r24/r25 using the Turbodisk protocol
+        ;;
+        .global turbodisk_buffer
+turbodisk_buffer:
+        ;; Wait until data is low
+        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+        rjmp    turbodisk_buffer
+
+        ;; All bus lines high
+        in      r18, _SFR_IO_ADDR(IEC_OUT)
+        andi    r18, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+        out     _SFR_IO_ADDR(IEC_OUT), r18
+
+        movw    r30,r24         ; output pointer
+
+        ;; Wait until data is high
+0:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA ; 2
+        rjmp    0b
+
+        ;; Initial delay of 4 us + move the timing window by 1 us for stability
+        delay_cycles (4+1)*8    ; 40
+
+        ;; 287 AVR cycles from here to first LDA $DD00 on C64 side ($F822)
+tdbyteloop:
+        ld      r0, Z+          ; 2 - load byte
+        ldi     r20, 4          ; 1 - bitpair counter
+        com     r0              ; 1 - invert data byte
+
+        ;; Waste another 12 us -> 96-4=92 cycles
+        delay_cycles 92         ; 92
+
+tdbitloop2:
+        in      r19, _SFR_IO_ADDR(IEC_OUT) ; 1 - read & mask unused IEC port lines
+        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ) ; 1
+        bst     r0, 7               ; 1 - grab bit 7
+        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+        bst     r0, 6               ; 1 - grab bit 6
+        bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+        lsl     r0                  ; 1 - remove source bits
+        lsl     r0                  ; 1
+
+        ;; Wait another 24 us -> 192-9=183 cycles
+        delay_cycles 183        ; 183
+
+        out     _SFR_IO_ADDR(IEC_OUT), r19      ; 1 - output the bit pair
+
+        ;; 5 us -> 40-3=37 cycles
+        delay_cycles 37         ; 37
+
+        dec     r20             ; 1 - Decrement bitpair counter
+        brne    tdbitloop2      ; 2/1 - loop until done
+
+        ;; Wait 10 us -> 80-3+1=78 cycles
+        delay_cycles 78         ; 78
+
+        dec     r22             ; 1 - Decrement byte counter
+        brne    tdbyteloop      ; 2/1 - loop until done
+
+        ;; Final delay: 11 us -> 88 cycles
+        delay_cycles 88         ; 88
+
+        ;; Data high, Clock low
+        in      r18, _SFR_IO_ADDR(IEC_OUT)
+        andi    r18, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+        ori     r18, IEC_OBIT_CLOCK
+        out     _SFR_IO_ADDR(IEC_OUT), r18
+
+        ret
+#endif
+
+#if defined(CONFIG_LOADER_DREAMLOAD) || defined(CONFIG_LOADER_FC3) || defined(CONFIG_LOADER_ULOAD3) || defined(CONFIG_LOADER_ELOAD1) || defined(CONFIG_LOADER_GEOS)
+        ;;
+        ;; Set bit 0 of r0 on CLOCK and bit 1 on DATA
+        ;; A bit value of one means pull down
+        ;; After sending these two bits r0 is shifted right two bits
+        ;;
+        ;; r19 is used as scratch reg here
+        ;;
+        ;; Takes 10 cycles before OUT (incl. rcall)
+        ;; Takes 6 cycles to return after OUT
+        ;;
+send_bits_to_clk_data:
+        ; rcall                  ; 3
+        in   r19, _SFR_IO_ADDR(IEC_OUT) ; 1 - read & mask unused IEC port lines
+        andi r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ) ; 1
+        bst  r0, 0               ; 1 - take bit 0 (lsb)
+        bld  r19, IEC_OPIN_CLOCK ; 1 - for CLOCK line
+        bst  r0, 1               ; 1 - take bit 1
+        bld  r19, IEC_OPIN_DATA  ; 1 - for DATA line
+        out  _SFR_IO_ADDR(IEC_OUT), r19 ; 1 - output the bit pair
+
+        lsr  r0                  ; 1
+        lsr  r0                  ; 1 - prepare next two bits
+
+        ret                      ; 4
+
+        ;;
+        ;; Get DATA  => bit 0
+        ;; and CLOCK => bit 2 of r24
+        ;; Low level means value 0 here
+        ;;
+        ;; r19 is used as scratch reg here
+        ;;
+        ;; Takes 4 cycles before IN (incl. rcall)
+        ;; Takes 8 cycles to return after IN
+        ;;
+get_bits_from_clk_data:
+        ; rcall                         ; 3
+        in      r19, _SFR_IO_ADDR(IEC_PIN)  ; 1
+        bst     r19, IEC_PIN_DATA       ; 1
+        bld     r24, 0                  ; 1
+        bst     r19, IEC_PIN_CLOCK      ; 1
+        bld     r24, 2                  ; 1
+        ret                             ; 4
+
+#endif
+
+#if defined(CONFIG_LOADER_FC3) || defined(CONFIG_LOADER_ULOAD3) || defined(CONFIG_LOADER_ELOAD1)
+        ;;
+        ;; Do this kind of handshake:
+        ;; set CLOCK low, wait for DATA going low,
+        ;; release CLOCK, wait for DATA going high
+        ;; returns without waiting if ATN is low
+        ;;
+        ;; cycles from DATA high to return to caller: 5-10
+        ;;
+        .global clk_data_handshake
+clk_data_handshake:
+        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+1:
+        sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+        rjmp    2f
+        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+        rjmp    1b
+        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+1:
+        sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+        rjmp    2f
+        sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+        rjmp    1b
+2:
+        ret
+#endif
+
+#ifdef CONFIG_LOADER_FC3
+        ;;
+        ;; Sends four bytes at r24/r25 using the FC3 protocol
+        ;;
+        .global fastloader_fc3_send_block
+fastloader_fc3_send_block:
+        cli
+        movw    r30,r24         ; Z = output pointer
+
+        ; pull CLOCK low for sync
+        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK ; 1
+
+        ; 12 us between sync and bitpair
+        delay_cycles 12 * 8 - 14 ; 83
+
+        ldi     r21, 4          ; 1 - byte counter
+fc3_byteloop:
+        ld      r0, Z+          ; 2 - load byte
+
+        com     r0              ; 1 - negate all bits
+
+        ldi     r20, 4          ; 1 - bitpair counter
+fc3_bitloop:
+        ; send r0[0,1] to CLOCK and DATA, shift r0 right two times
+        ; changes r19
+        rcall   send_bits_to_clk_data ; 10 + 6
+
+        ; wait 12 us between bitpair
+        delay_cycles 12*8-19
+
+        dec     r20             ; 1 - decrement bitpair counter
+        brne    fc3_bitloop     ; 2/1 - loop until done
+fc3_next_byte:
+        ; wait 2 us more between two bytes (16 cycles = -1 + 17)
+        rcall   delay1us        ; 8
+        rjmp    0f              ; 2
+0:
+        dec     r21             ; 1 - decrement byte counter
+        brne    fc3_byteloop    ; 2/1 - loop until done
+
+        ; release CLOCK and DATA
+        in      r19, _SFR_IO_ADDR(IEC_OUT) ; read & mask unused IEC port lines
+        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+        out     _SFR_IO_ADDR(IEC_OUT), r19 ; release CLOCK and DATA
+
+        sei
+        ret
+
+        ;;
+        ;; Receive one byte using the FC3 save protocol
+        ;;
+        .global fc3_get_byte
+fc3_get_byte:
+        cli
+
+        clr     r24     ; clear data byte
+
+        ; wait a moment before releasing data, otherwise the loop would run
+        ; too fast. I confess that this value is guessed.
+        delay_cycles 10 * 8
+
+        ; release DATA
+        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+
+        ; wait until CLOCK goes high
+1:
+        sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK ; 1/2?
+        rjmp    1b
+
+        ; 17 us later...
+        delay_cycles 17 * 8 - 6
+
+        ; get bits 5,7 @ 0,2 - changes r19
+        rcall   get_bits_from_clk_data  ; 4 + 8 r24 = .....7.5
+        lsl     r24                     ; 1     r24 = ....7.5.
+
+        ; 13 us later...
+        delay_cycles 13 * 8 - 13
+
+        ; get bits 4,6 @ 0,2 - changes r19
+        rcall   get_bits_from_clk_data  ; 4 + 8 r24 = ....7654
+        swap    r24                     ; 1     r24 = 7654....
+        lsr     r24                     ; 1     r24 = .7654...
+
+        ; 12 us later...
+        delay_cycles 12 * 8 - 14
+
+        ; get bits 1,3 @ 0,2 - changes r19
+        rcall   get_bits_from_clk_data  ; 4 + 8 r24 = .76543.1
+        lsl     r24                     ; 1     r24 = 76543.1.
+
+        ; 10 us later...
+        delay_cycles 10 * 8 - 13
+
+        ; get bits 0,2 @ 0,2 - changes r19
+        rcall   get_bits_from_clk_data  ; 4 + 8 r24 = 76543210
+
+        ; Pull DATA down
+        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+
+        sei
+        com     r24     ; negate all bits
+        clr     r25     ; clear hi-byte of return val
+        ret
+#endif
+
+#ifdef CONFIG_LOADER_DREAMLOAD
+        ;;
+        ;; Receive a command (track/sector) using the DreamLoad protocol
+        ;;
+dreamload_get_command:
+        rcall   dreamload_get_byte
+        sts     fl_track, r24
+        rcall   dreamload_get_byte
+        sts     fl_sector, r24
+        ret
+
+        ;;
+        ;; Receive a byte using the DreamLoad protocol
+        ;;
+        .global dreamload_get_byte
+dreamload_get_byte:
+
+        ldi     r18, 4  ; 4 * 2 bits to load
+dl_bitloop:
+        ; wait until clock goes low
+1:
+        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+        rjmp    1b
+
+        lsl     r24
+
+        ; read data a short time later
+        in      r19, _SFR_IO_ADDR(IEC_PIN)
+        bst     r19, IEC_PIN_DATA
+        bld     r24, 0
+
+        ; wait until clock goes high
+2:
+        sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+        rjmp    2b
+
+        lsl     r24
+
+        ; read data a short time later
+        in      r19, _SFR_IO_ADDR(IEC_PIN)
+        bst     r19, IEC_PIN_DATA
+        bld     r24, 0
+
+        dec     r18
+        brne     dl_bitloop
+
+        com     r24     ; negate all bits
+        ret
+
+        ;;
+        ;; Receive a command (track/sector) using the old DreamLoad protocol
+        ;;
+dreamload_get_command_old:
+        rcall   dreamload_get_byte_old
+        sts     fl_track, r24
+        rcall   dreamload_get_byte_old
+        sts     fl_sector, r24
+        ret
+
+        ;;
+        ;; Receive a byte using the old DreamLoad protocol
+        ;;
+dreamload_get_byte_old:
+        ; 2 nibbles
+        ldi     r18, 2
+dlgb_nibble:
+        swap    r24                     ; 2nd loop: r24 = 7654....
+        lsr     r24                     ; 2nd loop: r24 = .7654...
+
+        rcall   wait_atn_low
+        ; 1st: get bits 5,7 @ 0,2 / 2nd: get bits 1,3 @ 0,2 - changes r19
+        rcall   get_bits_from_clk_data  ; 1st: r24 = .....7.5 / 2nd: .76543.1
+        lsl     r24                     ; 1st: r24 = ....7.5. / 2nd: 76543.1.
+
+        rcall   wait_atn_high
+        ; 1st: get bits 4,6 @ 0,2 / 2nd: get bits 0,2 @ 0,2 - changes r19
+        rcall   get_bits_from_clk_data  ; 1st: r24 = ....7654 / 2nd: 76543210
+
+        dec     r18
+        brne    dlgb_nibble
+
+        com     r24     ; negate all bits
+        ret
+
+        ;;
+        ;; Send the byte in r24 using the DreamLoad protocol
+        ;;
+        .global dreamload_send_byte
+dreamload_send_byte:
+
+        ; inverse all bits
+        mov     r0, r24
+        com     r0
+
+        ldi     r18, 2          ; loop counter
+
+dsb_bitloop:
+        ; send r0[0,1] to CLOCK and DATA, shift r0 right two times
+        ; changes r19
+        rcall   send_bits_to_clk_data
+        rcall   wait_atn_low
+
+        ; send r0[0,1] to CLOCK and DATA, shift r0 right two times
+        ; changes r19
+        rcall   send_bits_to_clk_data
+        rcall   wait_atn_high
+
+        dec     r18             ; decrement bitpair counter
+        brne    dsb_bitloop     ; loop until done
+        ret
+#endif
+
+#if defined CONFIG_LOADER_ULOAD3 || defined CONFIG_LOADER_ELOAD1
+        ;;
+        ;; Receive a byte using the ULoad Model 3 protocol
+        ;;
+        .global uload3_get_byte
+uload3_get_byte:
+        cli
+        ldi     r25, 0xff       ; prepare a negative return value
+        clr     r24
+        rcall   clk_data_handshake
+        sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN ;skip ret if ATN is high
+        rjmp    uload3_abort                       ;return if ATN is low
+
+        ;; assuming an average of 10 cycles between DATA high and the following instruction
+        delay_cycles 14 * 8 - 10 - 4
+
+        ;; read bits 7/5
+        rcall   get_bits_from_clk_data ;4+8 r24 = _____7_5
+        lsl     r24                    ;1   r24 = ____7_5_
+
+        delay_cycles 10 * 8 - 13
+
+        ;; read bits 6/4
+        rcall   get_bits_from_clk_data ;4+8 r24 = ____7654
+        swap    r24                    ;1   r24 = 7654____
+        lsr     r24                    ;1   r24 = _7654___
+
+        delay_cycles 14 * 8 - 14
+
+        ;; read bits 3/1
+        rcall   get_bits_from_clk_data ;4+8 r24 = _76543_1
+        lsl     r24                    ;1   r24 = 76543_1_
+
+        delay_cycles 10 * 8 - 13
+
+        ;; read bits 2/0
+        rcall   get_bits_from_clk_data ;4+8 r24 = 76543210
+
+        delay_cycles 20*8       ; wait a bit so the C64 can return the bus to idle state
+
+        clr     r25             ; clear upper byte of return value
+        com     r24             ; invert data byte
+
+uload3_abort:
+        sei
+        ret
+
+
+        ;;
+        ;; Send a byte using the ULoad Model 3 protocol
+        ;;
+        .global uload3_send_byte
+uload3_send_byte:
+        cli
+
+        ;; DATA low
+        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+
+        ;; wait for CLOCK low
+1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+        rjmp    2f
+        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+        rjmp    1b
+
+        ;; DATA high
+        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+
+        ;; wait for CLOCK high - 2 to 7 cycles, assuming 5
+1:
+        sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+        rjmp    2f
+        sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+        rjmp    1b
+
+        ;; prepare transmission
+        mov     r0, r24         ;1 - move data to output register
+        com     r0              ;1 - invert byte
+        ldi     r24, 4          ;1 - number of loops
+        delay_cycles (14-8) * 8 - 8 + 6 + 3 ; initial delay before first bit pair
+
+uload3_bitloop:
+        delay_cycles 8 * 8 - 16 - 3   ; delay between bit pairs
+        rcall   send_bits_to_clk_data ;10+6
+        dec     r24                   ;1 - decrement pair counter
+        brne    uload3_bitloop        ;2 - continue loop
+
+        delay_cycles 10*8 - 9   ; delay before releasing clock/data
+
+        ;; release CLOCK+DATA
+        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+        rcall   delay1us        ; safety
+2:
+        sei
+        ret
+#endif
+
+#ifdef CONFIG_LOADER_EPYXCART
+        ;; send bits 7 and 5 of r0 to clock/data
+        ;; masked contents of IEC_OUT expected in r19
+        ;; 8 cycles from rcall to out, 4 to return
+epyx_bitpair:
+        ;; rcall - 3
+        bst     r0, 7                      ; 1
+        bld     r19, IEC_OPIN_CLOCK        ; 1
+        bst     r0, 5                      ; 1
+        bld     r19, IEC_OPIN_DATA         ; 1
+        out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1
+        ret                                ; 4
+
+        ;;
+        ;; Send a byte using the Epyx Fastload cartridge protocol
+        ;;
+        .global epyxcart_send_byte
+epyxcart_send_byte:
+        ;; DATA and CLOCK high
+        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+        rcall   delay1us
+
+        ;; prepare data
+        in      r19, _SFR_IO_ADDR(IEC_OUT)
+        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+
+        ;; wait for DATA high or ATN low
+1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+        rjmp    epyxcart_atnabort
+        sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+        rjmp    1b
+
+        mov     r0, r24             ; 1
+        delay_cycles (10*8 - 9)
+        rcall   epyx_bitpair        ; 8+4 - bits 7 and 5
+
+        lsl     r0                  ; 1
+        delay_cycles (10*8 - 13)
+        rcall   epyx_bitpair        ; 8+4 - bits 6 and 4
+
+        swap    r24                 ; 1
+        mov     r0, r24             ; 1
+        delay_cycles (10*8 - 14)
+        rcall   epyx_bitpair        ; 8+4 - bits 3 and 1
+
+        lsl     r0                  ; 1
+        delay_cycles (10*8 - 13)
+        rcall   epyx_bitpair        ; 8+4 - bits 2 and 0
+
+        delay_cycles 20*8  ; final delay so the data stays valid long enough
+
+        clr     r24
+        ret
+
+epyxcart_atnabort:
+        ldi     r24, 1
+        ret
+
+#endif
+
+#ifdef CONFIG_LOADER_GEOS
+        ;;
+        ;; read a byte using the GEOS protocol (common part)
+        ;;
+geos_get_byte_common:
+        clr     r24
+
+        ;; wait until clock is high
+1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+        rjmp    1b
+
+        ;; wait until clock is low
+1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK ; 1/2
+        rjmp    1b
+
+        ;; delay
+        delay_cycles 15*8 - 2
+
+        ;; get bits 4 and 5
+        in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+        bst     r19, IEC_PIN_CLOCK         ; 1
+        bld     r24, 4-1                   ; 1 - r24 = ....4...
+        bst     r19, IEC_PIN_DATA          ; 1
+        bld     r24, 5-1                   ; 1 - r24 = ...54...
+
+        ;; delay
+        delay_cycles 14*8 - 5
+
+        ;; get bits 6 and 7
+        in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+        bst     r19, IEC_PIN_CLOCK         ; 1
+        bld     r24, 6-1                   ; 1 - r24 = ..654...
+        bst     r19, IEC_PIN_DATA          ; 1
+        bld     r24, 7-1                   ; 1 - r24 = .7654...
+
+        ret                                ; 4
+
+        ;;
+        ;; read a byte using the GEOS 1MHz (1541) protocol
+        ;;
+        .global geos_get_byte_1mhz
+geos_get_byte_1mhz:
+        rcall   geos_get_byte_common   ; 3
+
+        ;; delay
+        delay_cycles 14*8 - 9 - 4
+
+        ;; get bits 3 and 1
+        rcall   get_bits_from_clk_data ; 4+8 - r24 = .76543.1
+        lsl     r24                    ; 1     r24 = 76543.1.
+
+        ;; delay
+        delay_cycles 16*8 - 9 - 4
+
+        ;; get bits 2 and 0
+        rcall   get_bits_from_clk_data ; 4+8 - r24 = 76543210
+
+        ;; post-process received value and return
+        delay_cycles 11*8
+        com     r24             ; negate all bits
+        clr     r25             ; clear high byte of return value
+        ret
+
+
+        ;;
+        ;; read a byte using the GEOS 2MHz (1571/81) protocol
+        ;;
+        .global geos_get_byte_2mhz
+geos_get_byte_2mhz:
+        rcall   geos_get_byte_common   ; 3
+
+        ;; delay
+        delay_cycles 19*4 - 9 - 4
+
+        ;; get bits 3 and 1
+        rcall   get_bits_from_clk_data ; 4+8 - r24 = .76543.1
+        lsl     r24                    ; 1     r24 = 76543.1.
+
+        ;; delay
+        delay_cycles 22*4 - 9 - 4
+
+        ;; get bits 2 and 0
+        rcall   get_bits_from_clk_data ; 4+8 - r24 = 76543210
+
+        ;;  post process received value and return
+        delay_cycles 11*8
+        com     r24             ; negate all bits
+        clr     r25             ; clear high byte of return value
+        ret
+
+
+        ;;
+        ;; common part of all geos_send_byte implementations
+        ;;  returns 7 cycles after clock low
+        ;;
+geos_send_byte_common:
+        ;; CLOCK/DATA high
+        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+        rcall   delay1us
+
+        ;; wait until CLOCK is low
+1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+        rjmp    1b
+
+        ;; preserve non-IEC lines on IEC_OUT port
+        in      r19, _SFR_IO_ADDR(IEC_OUT) ; 1
+        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ) ; 1
+        mov     r0, r19             ; 1
+        ret                         ; 4
+
+        ;;
+        ;; send a byte using the GEOS 1MHz protocol
+        ;; called with byte in r24, no return value
+        ;;
+        .global geos_send_byte_1mhz
+geos_send_byte_1mhz:
+        rcall   geos_send_byte_common ; 7
+
+        ;; prepare bits 3+1
+        bst     r24, 3              ; 1 - read bit 3
+        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+        bst     r24, 1              ; 1 - read bit 1
+        bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+
+        ;; delay (1MHz speeder)
+        delay_cycles 18*8 - 14
+        rjmp    geos_send_byte_tail   ; 2
+
+
+        ;;
+        ;; send a byte using the GEOS 2MHz protocol
+        ;; called with byte in r24, no return value
+        ;;
+        .global geos_send_byte_2mhz
+geos_send_byte_2mhz:
+        rcall   geos_send_byte_common ; 7
+
+        ;; prepare bits 3+1
+        bst     r24, 3              ; 1 - read bit 3
+        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+        bst     r24, 1              ; 1 - read bit 1
+        bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+
+        ;; delay (2MHz speeder)
+1:      delay_cycles 9*8 - 12
+
+geos_send_byte_tail:
+        ;; send to bus
+        out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1 - send to bus
+
+        ;; prepare bits 2+0
+        mov     r19, r0             ; 1
+        bst     r24, 2              ; 1 - read bit 2
+        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+        bst     r24, 0              ; 1 - read bit 0
+        bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+
+        ;; delay
+        delay_cycles 10*8 - 6
+
+        ;; send to bus
+        out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1
+
+        ;; prepare bits 4+5
+        com     r24                 ; 1 - remaining bits are sent with high=1
+        mov     r19, r0             ; 1
+        bst     r24, 4              ; 1 - read bit 4
+        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+        bst     r24, 5              ; 1 - read bit 5
+        bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+
+        ;; delay
+        delay_cycles 11*8 - 7
+
+        ;; send to bus
+        out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1
+
+        ;; prepare bits 6+7
+        mov     r19, r0             ; 1
+        bst     r24, 6              ; 1 - read bit 6
+        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+        bst     r24, 7              ; 1 - read bit 7
+        bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+
+        ;; delay
+        delay_cycles 12*8 - 6
+
+        ;; send to bus
+        out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1
+
+        ;; final delay
+        delay_cycles 22*8
+
+        ret
+
+
+        ;;
+        ;; send a byte using the 2MHz 1581 Configure 2.1 GEOS protocol
+        ;; called with byte in r24, no return value
+        ;;
+        .global geos_send_byte_1581_21
+geos_send_byte_1581_21:
+        com     r24                   ; invert so the bits are sent with high=1
+        rcall   geos_send_byte_common ; 7
+        mov     r0, r24               ; 1 - move data to target register
+
+        ;; delay
+        delay_cycles 7*8 - 18
+
+        ;; send bits 0+1
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; delay
+        delay_cycles 7*8 - 16
+
+        ;; send bits 2+3
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; delay
+        delay_cycles 10*8 - 16
+
+        ;; send bits 4+5
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; delay
+        delay_cycles 9*8 - 16
+
+        ;; send bits 6+7
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; final delay
+        delay_cycles 12*8
+
+        ret
+
+#endif
+
+#ifdef CONFIG_LOADER_WHEELS
+        ;;
+        ;; send a byte using the Wheels protocol
+        ;; called with byte in r24, no return value
+        ;;
+        .global wheels_send_byte_1mhz
+wheels_send_byte_1mhz:
+        rcall   geos_send_byte_common ; 7
+
+        rcall   wheels_nibble       ; 3 - send lower nibble
+        swap    r24                 ; 1 - swap nibbles
+
+        delay_cycles (14-9)*8 + 15 - 14
+        rcall   wheels_nibble       ; 3 - send upper nibble
+
+        ;; final delay
+        delay_cycles 22*8
+        ret
+
+wheels_nibble:
+        ;; prepare bits 3+1 (7+5)
+        mov     r19, r0             ; 1
+        bst     r24, 3              ; 1 - read bit 3
+        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+        bst     r24, 1              ; 1 - read bit 1
+        bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+
+        ;; delay
+        delay_cycles 9*8 - 15
+
+        ;; send to bus
+        out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1 - send to bus
+
+        ;; prepare bits 2+0 (6+4)
+        mov     r19, r0             ; 1
+        bst     r24, 2              ; 1 - read bit 2
+        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+        bst     r24, 0              ; 1 - read bit 0
+        bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+
+        ;; delay
+        delay_cycles 14*8 - 6
+
+        ;; send to bus
+        out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1 - send to bus
+        ret                                ; 4
+
+
+        ;;
+        ;; read a byte using the Wheels protocol
+        ;;
+        .global wheels_get_byte_1mhz
+wheels_get_byte_1mhz:
+        clr     r24
+
+        ;; wait until clock is high
+1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+        rjmp    1b
+
+        ;; wait until clock is low
+1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK ; 1/2
+        rjmp    1b
+
+        ;; delay
+        delay_cycles 16 * 8 - 5
+
+        ;; read bits 7/5
+        rcall   get_bits_from_clk_data ; 4+8 r24 = _____7_5
+        lsl     r24                    ; 1   r24 = ____7_5_
+
+        delay_cycles 10 * 8 - 13
+
+        ;; read bits 6/4
+        rcall   get_bits_from_clk_data ; 4+8 r24 = ____7654
+        swap    r24                    ; 1   r24 = 7654____
+        lsr     r24                    ; 1   r24 = _7654___
+
+        delay_cycles 15 * 8 - 14
+
+        ;; read bits 3/1
+        rcall   get_bits_from_clk_data ; 4+8 r24 = _76543_1
+        lsl     r24                    ; 1   r24 = 76543_1_
+
+        delay_cycles 13 * 8 - 13
+
+        ;; read bits 2/0
+        rcall   get_bits_from_clk_data ; 4+8 r24 = 76543210
+
+        delay_cycles 20*8
+
+        clr     r25             ; clear upper byte of return value
+        com     r24             ; invert data byte
+
+        ret
+
+        ;;
+        ;; read a byte using the Wheels 4.4 1MHz protocol
+        ;;
+        .global wheels44_get_byte_1mhz
+wheels44_get_byte_1mhz:
+        clr     r24
+
+        ;; wait until clock is high
+1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+        rjmp    1b
+
+        ;; wait until clock is low
+1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK ; 1/2
+        rjmp    1b
+
+        ;; delay
+        delay_cycles 17 * 8 - 5
+
+        ;; read bits 7/5
+        rcall   get_bits_from_clk_data ; 4+8 r24 = _____7_5
+        lsl     r24                    ; 1   r24 = ____7_5_
+
+        delay_cycles 11 * 8 - 13
+
+        ;; read bits 6/4
+        rcall   get_bits_from_clk_data ; 4+8 r24 = ____7654
+        swap    r24                    ; 1   r24 = 7654____
+        lsr     r24                    ; 1   r24 = _7654___
+
+        delay_cycles 17 * 8 - 14
+
+        ;; read bits 3/1
+        rcall   get_bits_from_clk_data ; 4+8 r24 = _76543_1
+        lsl     r24                    ; 1   r24 = 76543_1_
+
+        delay_cycles 16 * 8 - 13
+
+        ;; read bits 2/0
+        rcall   get_bits_from_clk_data ; 4+8 r24 = 76543210
+
+        delay_cycles 20*8
+
+        clr     r25             ; clear upper byte of return value
+        com     r24             ; invert data byte
+
+        ret
+
+        ;;
+        ;; read a byte using the Wheels 4.4 2MHz protocol
+        ;;
+        .global wheels44_get_byte_2mhz
+wheels44_get_byte_2mhz:
+        clr     r24
+
+        ;; wait until clock is high
+1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+        rjmp    1b
+
+        ;; wait until clock is low
+1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK ; 1/2
+        rjmp    1b
+
+        ;; delay
+        delay_cycles 15*8 - 2
+
+        ;; get bits 0 and 1
+        in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+        bst     r19, IEC_PIN_CLOCK         ; 1
+        bld     r24, 0                     ; 1 - r24 = .......0
+        bst     r19, IEC_PIN_DATA          ; 1
+        bld     r24, 1                     ; 1 - r24 = ......10
+
+        ;; delay
+        delay_cycles 11*8 - 5
+
+        ;; get bits 2 and 3
+        in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+        bst     r19, IEC_PIN_CLOCK         ; 1
+        bld     r24, 2                     ; 1 - r24 = .....210
+        bst     r19, IEC_PIN_DATA          ; 1
+        bld     r24, 3                     ; 1 - r24 = ....3210
+
+        ;; delay
+        delay_cycles 11*8 - 5
+
+        ;; get bits 4 and 5
+        in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+        bst     r19, IEC_PIN_CLOCK         ; 1
+        bld     r24, 4                     ; 1 - r24 = ...43210
+        bst     r19, IEC_PIN_DATA          ; 1
+        bld     r24, 5                     ; 1 - r24 = ..543210
+
+        ;; delay
+        delay_cycles 11*8 - 5
+
+        ;; get bits 6 and 7
+        in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+        bst     r19, IEC_PIN_CLOCK         ; 1
+        bld     r24, 6                     ; 1 - r24 = .6543210
+        bst     r19, IEC_PIN_DATA          ; 1
+        bld     r24, 7                     ; 1 - r24 = 76543210
+
+        ;; safety delay
+        delay_cycles 12*8
+
+        ;; post process received value and return
+        com     r24                  ; negate all bits
+        clr     r25                  ; clear high byte of return value
+        ret
+
+
+        ;;
+        ;; send a byte using the Wheels 4.4 2MHz protocol
+        ;; called with byte in r24, no return value
+        ;;
+        .global wheels44_send_byte_2mhz
+wheels44_send_byte_2mhz:
+        com     r24                   ; invert so the bits are sent with high=1
+        rcall   geos_send_byte_common ; 7
+        mov     r0, r24               ; 1 - move data to target register
+
+        ;; delay
+        delay_cycles 7*8 - 18
+
+        ;; send bits 0+1
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; delay
+        delay_cycles 8*8 - 16
+
+        ;; send bits 2+3
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; delay
+        delay_cycles 11*8 - 16
+
+        ;; send bits 4+5
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; delay
+        delay_cycles 11*8 - 16
+
+        ;; send bits 6+7
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; final delay
+        delay_cycles 14*8
+
+        ret
+
+#endif
+
+#ifdef CONFIG_LOADER_AR6
+        ;;
+        ;; send a byte using the AR6-1581 protocol
+        ;; called with byte in r24, no return value
+        ;;
+        .global ar6_1581_send_byte
+ar6_1581_send_byte:
+        cli
+
+        ;; set up data byte for transmission
+        com     r24
+        mov     r0, r24
+
+        ;; clock high
+        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+
+        ;; wait until data is high
+1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+        rjmp    1b
+
+        ;; delay
+        delay_cycles 5*8 - 10
+
+        ;; send bits 0+1
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; delay
+        delay_cycles 8*8 - 16
+
+        ;; send bits 2+3
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; delay
+        delay_cycles 8*8 - 16
+
+        ;; send bits 4+5
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; delay
+        delay_cycles 8*8 - 16
+
+        ;; send bits 6+7
+        rcall   send_bits_to_clk_data ; 10+6
+
+        ;; delay
+        delay_cycles 8*8+4 - 6 - 2
+
+        ;; set clock low, data high
+        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA  ; 1
+        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK ; 1
+
+        sei
+        ret
+
+        ;;
+        ;; receive a byte using the AR6-1581-PAL protocol
+        ;; returns byte in r24
+        ;;
+        .global ar6_1581p_get_byte
+ar6_1581p_get_byte:
+        cli
+
+        clr     r24
+
+        ;; clock high
+        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+
+        ;; wait until data is low
+1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+        rjmp    1b
+
+        ;; wait until data is high
+1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+        rjmp    1b
+
+        ;; delay
+        delay_cycles 12*8 - 4
+
+        ;; receive bits 7+5
+        rcall   get_bits_from_clk_data ; 4+8 - r24 = .....7.5
+        lsl     r24                    ; 1   - r24 = ....7.5.
+
+        ;; delay
+        delay_cycles 10*8 - 9 - 4
+
+        ;; receive bits 6+4
+        rcall   get_bits_from_clk_data ; 4+8 - r24 = ....7654
+        swap    r24                    ; 1   - r24 = 7654....
+        lsr     r24                    ; 1   - r24 = .7654...
+
+        ;; delay
+        delay_cycles 16*8 - 10 - 4
+
+        ;; receive bits 3+1
+        rcall   get_bits_from_clk_data ; 4+8 - r24 = .76543.1
+        lsl     r24                    ; 1   - r24 = 76543.1.
+
+        ;; delay
+        delay_cycles 10*8 - 9 - 4
+
+        ;; receive bits 2+0
+        rcall   get_bits_from_clk_data ; 4+8 - r24 = 76543210
+
+        ;; delay
+        delay_cycles 5*8 - 8 - 1
+
+        ;; set clock low
+        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+
+        ;; post-processing
+        sei
+        com     r24
+        clr     r25
+        ret
+#endif
+        .end
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fastloader-ll.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fastloader-ll.h
new file mode 100644
index 00000000..88e45968
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fastloader-ll.h
@@ -0,0 +1,64 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   fastloader-ll.h: Definitions for low-level fastloader routines
+
+*/
+
+#ifndef FASTLOADERLL_H
+#define FASTLOADERLL_H
+
+void turbodisk_byte(uint8_t value);
+void turbodisk_buffer(uint8_t *data, uint8_t length);
+
+uint8_t jiffy_receive(uint8_t *busstate);
+uint8_t jiffy_send(uint8_t value, uint8_t eoi, uint8_t loadflags);
+
+void clk_data_handshake(void);
+void fastloader_fc3_send_block(uint8_t *data);
+uint8_t fc3_get_byte(void);
+
+uint8_t dreamload_get_byte(void);
+void dreamload_send_byte(uint8_t byte);
+
+int16_t uload3_get_byte(void);
+void uload3_send_byte(uint8_t byte);
+
+uint8_t epyxcart_send_byte(uint8_t byte);
+
+uint8_t geos_get_byte_1mhz(void);
+uint8_t geos_get_byte_2mhz(void);
+void geos_send_byte_1mhz(uint8_t byte);
+void geos_send_byte_2mhz(uint8_t byte);
+void geos_send_byte_1581_21(uint8_t byte);
+
+void wheels_send_byte_1mhz(uint8_t byte);
+uint8_t wheels_get_byte_1mhz(void);
+
+uint8_t wheels44_get_byte_1mhz(void);
+uint8_t wheels44_get_byte_2mhz(void);
+void wheels44_send_byte_2mhz(uint8_t byte);
+
+void ar6_1581_send_byte(uint8_t byte);
+uint8_t ar6_1581p_get_byte(void);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fastloader.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fastloader.c
new file mode 100644
index 00000000..81146179
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fastloader.c
@@ -0,0 +1,1847 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+   Final Cartridge III, DreamLoad, ELoad fastloader support:
+   Copyright (C) 2008-2011  Thomas Giesel <skoe@directbox.com>
+   Nippon Loader support:
+   Copyright (C) 2010  Joerg Jungermann <abra@borkum.net>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   fastloader.c: High level handling of fastloader protocols
+
+*/
+
+#define __PROG_TYPES_COMPAT__
+#include <avr/boot.h>
+#include <avr/io.h>
+#include <avr/interrupt.h>
+#include <util/delay.h>
+#include <util/atomic.h>
+#include <string.h>
+#include "config.h"
+#include "buffers.h"
+#include "d64ops.h"
+#include "diskchange.h"
+#include "display.h"
+#include "doscmd.h"
+#include "errormsg.h"
+#include "fastloader-ll.h"
+#include "fileops.h"
+#include "iec-ll.h"
+#include "iec.h"
+#include "led.h"
+#include "parser.h"
+#include "timer.h"
+#include "ustring.h"
+#include "wrapops.h"
+#include "fastloader.h"
+
+#define UNUSED_PARAMETER uint8_t __attribute__((unused)) unused__
+
+uint8_t detected_loader;
+
+/* track to load, used as a kind of jobcode */
+volatile uint8_t fl_track;
+
+/* sector to load, used as a kind of jobcode */
+volatile uint8_t fl_sector;
+
+/* Small helper for fastloaders that need to detect disk changes */
+static uint8_t check_keys(void) {
+  /* Check for disk changes etc. */
+  if (key_pressed(KEY_NEXT | KEY_PREV | KEY_HOME)) {
+    change_disk();
+  }
+  if (key_pressed(KEY_SLEEP)) {
+    reset_key(KEY_SLEEP);
+    set_busy_led(0);
+    set_dirty_led(1);
+    return 1;
+  }
+
+  return 0;
+}
+
+
+/*
+ *
+ *  Turbodisk
+ *
+ */
+#ifdef CONFIG_LOADER_TURBODISK
+void load_turbodisk(UNUSED_PARAMETER) {
+  uint8_t i,len,firstsector;
+  buffer_t *buf;
+
+#if defined __AVR_ATmega644__   || \
+    defined __AVR_ATmega644P__  || \
+    defined __AVR_ATmega1284P__ || \
+    defined __AVR_ATmega1281__
+  /* Lock out clock sources that aren't stable enough for this protocol */
+  uint8_t tmp = boot_lock_fuse_bits_get(GET_LOW_FUSE_BITS) & 0x0f;
+  if (tmp == 2) {
+    set_error(ERROR_CLOCK_UNSTABLE);
+    return;
+  }
+#endif
+
+  set_clock(0);
+  uart_flush();
+
+  /* Copy filename to beginning of buffer */
+  len = command_buffer[9];
+  for (i=0;i<len;i++)
+    command_buffer[i] = command_buffer[10+i];
+
+  command_buffer[len] = 0;
+  command_length = len;
+
+  /* Open the file */
+  file_open(0);
+  buf = find_buffer(0);
+  if (!buf) {
+    ATOMIC_BLOCK( ATOMIC_FORCEON ) {
+      turbodisk_byte(0xff);
+      set_clock(1);
+      set_data(1);
+    }
+    return;
+  }
+
+  firstsector = 1;
+
+  ATOMIC_BLOCK( ATOMIC_FORCEON ) {
+    while (1) {
+      /* Send the status byte */
+      if (buf->sendeoi) {
+        turbodisk_byte(0);
+      } else {
+        turbodisk_byte(1);
+      }
+
+      if (firstsector) {
+        /* Load address is transferred seperately */
+        i = buf->position;
+        turbodisk_byte(buf->data[i++]);
+        turbodisk_byte(buf->data[i++]);
+        buf->position  = i;
+        firstsector    = 0;
+      }
+
+      if (buf->sendeoi) {
+        /* Last sector is sent byte-by-byte */
+        turbodisk_byte(buf->lastused - buf->position + 2);
+
+        i = buf->position;
+        do {
+          turbodisk_byte(buf->data[i]);
+        } while (i++ < buf->lastused);
+
+        break;
+      } else {
+        /* Send the complete 254 byte buffer */
+        turbodisk_buffer(buf->data + buf->position, 254);
+        if (buf->refill(buf)) {
+          /* Some error, abort */
+          turbodisk_byte(0xff);
+          break;
+        }
+      }
+    }
+  }
+  cleanup_and_free_buffer(buf);
+
+  set_clock(1);
+}
+#endif
+
+
+/*
+ *
+ *  Final Cartridge 3 / EXOS
+ *
+ */
+#ifdef CONFIG_LOADER_FC3
+void load_fc3(uint8_t freezed) {
+  buffer_t *buf;
+  unsigned char step,pos;
+  unsigned char sector_counter = 0;
+  unsigned char block[4];
+
+  buf = find_buffer(0);
+
+  if (!buf) {
+    /* error, abort and pull down CLOCK and DATA to inform the host */
+    IEC_OUT |= IEC_OBIT_CLOCK | IEC_OBIT_DATA;
+    return;
+  }
+
+  /* to make sure the C64 VIC DMA is off */
+  _delay_ms(20);
+
+  for(;;) {
+    clk_data_handshake();
+
+    /* Starting buffer position */
+    /* Rewinds by 2 bytes for the first sector and normal loader */
+    pos = 2;
+
+    /* construct first 4-byte block */
+    /* The 0x07 in the first byte is never used */
+    block[1] = sector_counter++;
+    if (buf->sendeoi) {
+      /* Last sector, send number of bytes */
+      block[2] = buf->lastused;
+    } else {
+      /* Send 0 for full sector */
+      block[2] = 0;
+    }
+    /* First data byte */
+    block[3] = buf->data[pos++];
+
+    if (!freezed)
+      _delay_ms(0.19);
+    fastloader_fc3_send_block(block);
+
+    /* send the next 64 4-byte-blocks, the last 3 bytes are read behind
+       the buffer, good that we don't have an MMU ;) */
+    for (step = 0; step < 64; step++) {
+      if (!IEC_ATN)
+        goto cleanup;
+
+      if (freezed)
+        clk_data_handshake();
+      else
+        _delay_ms(0.19);
+      fastloader_fc3_send_block(buf->data + pos);
+      pos += 4;
+    }
+
+    if (buf->sendeoi) {
+      /* pull down DATA to inform the host about the last sector */
+      set_data(0);
+      break;
+    } else {
+      if (buf->refill(buf)) {
+        /* error, abort and pull down CLOCK and DATA to inform the host */
+        IEC_OUT |= IEC_OBIT_CLOCK | IEC_OBIT_DATA;
+        break;
+      }
+    }
+  }
+
+ cleanup:
+  cleanup_and_free_buffer(buf);
+}
+
+void save_fc3(UNUSED_PARAMETER) {
+  unsigned char n;
+  unsigned char size;
+  unsigned char eof = 0;
+  buffer_t *buf;
+
+  buf = find_buffer(1);
+  /* Check if this is a writable file */
+  if (!buf || !buf->write)
+      return;
+
+  /* to make sure the host pulled DATA low and is ready */
+  _delay_ms(5);
+
+  do {
+    set_data(0);
+
+    size = fc3_get_byte();
+
+    if (size == 0) {
+      /* a full block is coming, no EOF */
+      size = 254;
+    }
+    else {
+      /* this will be the last block */
+      size--;
+      eof = 1;
+    }
+
+    for (n = 0; n < size; n++) {
+      /* Flush buffer if full */
+      if (buf->mustflush) {
+        buf->refill(buf);
+        /* the FC3 just ignores things like "disk full", so do we */
+      }
+
+      buf->data[buf->position] = fc3_get_byte();
+
+      if (buf->lastused < buf->position)
+        buf->lastused = buf->position;
+      buf->position++;
+
+      /* Mark buffer for flushing if position wrapped */
+      if (buf->position == 0)
+        buf->mustflush = 1;
+    }
+  }
+  while (!eof);
+
+  cleanup_and_free_buffer(buf);
+}
+#endif
+
+
+/*
+ *
+ *  Dreamload
+ *
+ */
+#ifdef CONFIG_LOADER_DREAMLOAD
+#ifndef set_clock_irq
+#  error "Sorry, DreamLoad is only supported on platforms with a CLK interrupt"
+#endif
+
+static void dreamload_send_block(const uint8_t* p) {
+  uint8_t checksum = 0;
+  int     n;
+
+  ATOMIC_BLOCK( ATOMIC_FORCEON ) {
+
+    // checksum is EOR of all bytes
+    for (n = 0; n < 256; n++)
+      checksum ^= p[n];
+
+    // send status, data bytes and checksum
+    dreamload_send_byte(0);
+    for (n = 0; n < 256; n++) {
+      dreamload_send_byte(*p);
+      p++;
+    }
+    dreamload_send_byte(checksum);
+
+    // release CLOCK and DATA
+    IEC_OUT &= (uint8_t)~(IEC_OBIT_ATN|IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_SRQ);
+  }
+}
+
+void load_dreamload(UNUSED_PARAMETER) {
+  uint16_t n;
+  uint8_t  type;
+  buffer_t *buf;
+
+  /* disable IRQs while loading the final code, so no jobcodes are read */
+  ATOMIC_BLOCK( ATOMIC_FORCEON ) {
+    set_clock_irq(0);
+    set_atn_irq(0);
+
+    // Release clock and data
+    IEC_OUT &= (uint8_t)~(IEC_OBIT_ATN|IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_SRQ);
+
+    /* load final drive code, fixed length */
+    type = 0;
+    for (n = 4 * 256; n != 0; --n) {
+      type ^= dreamload_get_byte();
+    }
+
+    if ((type == 0xac) || (type == 0xdc)) {
+      set_atn_irq(1);
+      detected_loader = FL_DREAMLOAD_OLD;
+    } else {
+      set_clock_irq(1);
+    }
+
+    /* mark no job waiting, enable IRQs to get job codes */
+    fl_track = 0xff;
+  }
+
+  buf = alloc_system_buffer();
+  if (!buf) {
+    /* &§$% :-( */
+    goto error;
+  }
+
+  /* Find the start sector of the current directory */
+  dh_t dh;
+  path_t curpath;
+
+  curpath.part = current_part;
+  curpath.dir  = partition[current_part].current_dir;
+  opendir(&dh, &curpath);
+
+  for (;;) {
+
+    while (fl_track == 0xff) {
+      if (check_keys()) {
+        fl_track = 0;
+        fl_sector = 0;
+        break;
+      }
+    }
+
+    set_busy_led(1);
+
+    /* Output the track/sector for debugging purposes */
+    uart_puthex(fl_track);
+    uart_putc('/');
+    uart_puthex(fl_sector);
+    uart_putcrlf();
+
+    if (fl_track == 0) {
+      // check special commands first
+      if (fl_sector == 0) {
+        // end loader
+        set_busy_led(0);
+        break;
+      } else if (fl_sector == 1) {
+        // command: load first sector of directory
+        // slow down 18/1 loading, so diskswap has a higher chance
+        tick_t targettime = ticks + MS_TO_TICKS(1000);
+        while (time_before(ticks,targettime)) ;
+
+        read_sector(buf, current_part, dh.dir.d64.track, dh.dir.d64.sector);
+        dreamload_send_block(buf->data);
+      }
+      else {
+        // fl_sector == 2 is canonical
+        set_busy_led(0);
+      }
+    } else {
+      read_sector(buf, current_part, fl_track, fl_sector);
+      dreamload_send_block(buf->data);
+    }
+    fl_track = 0xff;
+  }
+
+error:
+  free_buffer(buf);
+  set_clock_irq(0);
+  set_atn_irq(0);
+}
+#endif
+
+
+/*
+ *
+ * ULoad Model 3
+ *
+ */
+#ifdef CONFIG_LOADER_ULOAD3
+static uint8_t uload3_transferchain(uint8_t track, uint8_t sector, uint8_t saving) {
+  buffer_t *buf;
+  uint8_t i,bytecount,first;
+
+  first = 1;
+
+  buf = alloc_buffer();
+  if (!buf) {
+    uload3_send_byte(0xff);
+    return 0;
+  }
+
+  do {
+    /* read current sector */
+    read_sector(buf, current_part, track, sector);
+    if (current_error != 0) {
+      uload3_send_byte(0xff);
+      return 0;
+    }
+
+    /* send number of bytes in sector */
+    if (buf->data[0] == 0) {
+      bytecount = buf->data[1]-1;
+    } else {
+      bytecount = 254;
+    }
+    uload3_send_byte(bytecount);
+
+    if (saving) {
+      if (first) {
+        /* send load address */
+        first = 0;
+        uload3_send_byte(buf->data[2]);
+        uload3_send_byte(buf->data[3]);
+        i = 2;
+      } else
+        i = 0;
+
+      /* receive sector contents */
+      for (;i<bytecount;i++) {
+        int16_t tmp = uload3_get_byte();
+        if (tmp < 0)
+          return 1;
+
+        buf->data[i+2] = tmp;
+      }
+
+      /* write sector */
+      write_sector(buf, current_part, track, sector);
+      if (current_error != 0) {
+        uload3_send_byte(0xff);
+        return 0;
+      }
+    } else {
+      /* reading: send sector contents */
+      for (i=0;i<bytecount;i++)
+        uload3_send_byte(buf->data[i+2]);
+    }
+
+    track  = buf->data[0];
+    sector = buf->data[1];
+  } while (track != 0);
+
+  /* send end marker */
+  uload3_send_byte(0);
+
+  free_buffer(buf);
+  return 0;
+}
+
+void load_uload3(UNUSED_PARAMETER) {
+  int16_t cmd,tmp;
+  uint8_t t,s;
+  dh_t dh;
+  path_t curpath;
+
+  curpath.part = current_part;
+  curpath.dir  = partition[current_part].current_dir;
+  opendir(&dh, &curpath);
+
+  while (1) {
+    /* read command */
+    cmd = uload3_get_byte();
+    if (cmd < 0) {
+      /* ATN received */
+      break;
+    }
+
+    switch (cmd) {
+    case 1: /* load a file */
+    case 2: /* save and replace a file */
+      tmp = uload3_get_byte();
+      if (tmp < 0)
+        return;
+      t = tmp;
+
+      tmp = uload3_get_byte();
+      if (tmp < 0)
+        /* ATN received */
+        return;
+      s = tmp;
+
+      if (uload3_transferchain(t,s, (cmd == 2)))
+        return;
+
+      break;
+
+    case '$':
+      /* read directory */
+      uload3_transferchain(dh.dir.d64.track, dh.dir.d64.sector, 0);
+      break;
+
+    default:
+      /* unknown command */
+      uload3_send_byte(0xff);
+      break;
+    }
+  }
+}
+#endif
+
+
+/*
+ *
+ * eload
+ *
+ */
+#ifdef CONFIG_LOADER_ELOAD1
+void load_eload1(UNUSED_PARAMETER) {
+  buffer_t *buf;
+  int16_t cmd;
+  uint8_t count, pos, end;
+
+  while (1) {
+    /* read command */
+    cmd = uload3_get_byte();
+    if (cmd < 0) {
+      /* ATN received */
+      break;
+    }
+
+    switch (cmd) {
+    case 1: /* load a file */
+      buf = find_buffer(0);
+
+      if (!buf) {
+        if (!IEC_ATN)
+          return;
+        uload3_send_byte(0xff); /* error */
+        return;
+      }
+
+      end = 0;
+      do {
+        count = buf->lastused - 1;
+        if (!IEC_ATN)
+          return;
+        uload3_send_byte(count);
+        pos = 2;
+        while (count--) {
+          if (!IEC_ATN)
+            return;
+          uload3_send_byte(buf->data[pos++]);
+        }
+        if (buf->sendeoi) {
+          uload3_send_byte(0); /* EOF */
+          end = 1;
+        }
+        else if (buf->refill(buf)) {
+          uload3_send_byte(0xff); /* error */
+          end = 1;
+        }
+      } while (!end);
+      break;
+
+    default:
+      /* unknown command */
+      uload3_send_byte(0xff);
+      break;
+    }
+  }
+}
+
+#endif
+
+
+/*
+ *
+ *  GIJoe/EPYX common code
+ *
+ */
+#if defined(CONFIG_LOADER_GIJOE) || defined(CONFIG_LOADER_EPYXCART)
+/* Returns the byte read or <0 if the user aborts */
+/* Aborting on ATN is not reliable for at least one version */
+static int16_t gijoe_read_byte(void) {
+  uint8_t i;
+  uint8_t value = 0;
+
+  for (i=0;i<4;i++) {
+    while (IEC_CLOCK)
+      if (check_keys())
+        return -1;
+
+    value >>= 1;
+
+    if (!IEC_DATA)
+      value |= 0x80;
+
+    while (!IEC_CLOCK)
+      if (check_keys())
+        return -1;
+
+    value >>= 1;
+
+    if (!IEC_DATA)
+      value |= 0x80;
+  }
+
+  return value;
+}
+#endif
+
+
+/*
+ *
+ * GI Joe
+ *
+ */
+#ifdef CONFIG_LOADER_GIJOE
+static void gijoe_send_byte(uint8_t value) {
+  uint8_t i;
+
+  ATOMIC_BLOCK( ATOMIC_FORCEON ) {
+    for (i=0;i<4;i++) {
+      /* Wait for clock high */
+      while (!IEC_CLOCK) ;
+
+      set_data(value & 1);
+      value >>= 1;
+
+      /* Wait for clock low */
+      while (IEC_CLOCK) ;
+
+      set_data(value & 1);
+      value >>= 1;
+    }
+  }
+}
+
+void load_gijoe(UNUSED_PARAMETER) {
+  buffer_t *buf;
+
+  set_data(1);
+  set_clock(1);
+  set_atn_irq(0);
+
+  /* Wait until the bus has settled */
+  _delay_ms(10);
+  while (!IEC_DATA || !IEC_CLOCK) ;
+
+  while (1) {
+    /* Handshake */
+    set_clock(0);
+
+    while (IEC_DATA)
+      if (check_keys())
+        return;
+
+    set_clock(1);
+    uart_flush();
+
+    /* First byte is ignored */
+    if (gijoe_read_byte() < 0)
+      return;
+
+    /* Read two file name characters */
+    command_buffer[0] = gijoe_read_byte();
+    command_buffer[1] = gijoe_read_byte();
+
+    set_clock(0);
+
+    command_buffer[2] = '*';
+    command_buffer[3] = 0;
+    command_length = 3;
+
+    /* Open the file */
+    file_open(0);
+    uart_flush();
+    buf = find_buffer(0);
+    if (!buf) {
+      set_clock(1);
+      gijoe_send_byte(0xfe);
+      gijoe_send_byte(0xfe);
+      gijoe_send_byte(0xac);
+      gijoe_send_byte(0xf7);
+      continue;
+    }
+
+    /* file is open, transfer */
+    while (1) {
+      uint8_t i = buf->position;
+
+      set_clock(1);
+      _delay_us(2);
+
+      do {
+        if (buf->data[i] == 0xac)
+          gijoe_send_byte(0xac);
+
+        gijoe_send_byte(buf->data[i]);
+      } while (i++ < buf->lastused);
+
+      /* Send end marker and wait for the next name */
+      if (buf->sendeoi) {
+        gijoe_send_byte(0xac);
+        gijoe_send_byte(0xff);
+
+        cleanup_and_free_buffer(buf);
+        break;
+      }
+
+      /* Send "another sector following" marker */
+      gijoe_send_byte(0xac);
+      gijoe_send_byte(0xc3);
+      _delay_us(50);
+      set_clock(0);
+
+      /* Read next block */
+      if (buf->refill(buf)) {
+        /* Send error marker */
+        gijoe_send_byte(0xfe);
+        gijoe_send_byte(0xfe);
+        gijoe_send_byte(0xac);
+        gijoe_send_byte(0xf7);
+
+        cleanup_and_free_buffer(buf);
+        break;
+      }
+    }
+  }
+}
+#endif
+
+
+/*
+ *
+ * Epyx Fast Load Cartridge
+ *
+ */
+#ifdef CONFIG_LOADER_EPYXCART
+void load_epyxcart(UNUSED_PARAMETER) {
+  uint8_t checksum = 0;
+  int16_t b,i;
+
+  uart_flush(); // Pending output can mess up our timing
+
+  /* Initial handshake */
+  set_data(1);
+  set_clock(0);
+  set_atn_irq(0);
+
+  while (IEC_DATA)
+    if (!IEC_ATN)
+      return;
+
+  set_clock(1);
+
+  /* Receive and checksum stage 2 */
+  for (i=0;i<256;i++) {
+    b = gijoe_read_byte();
+
+    if (b < 0)
+      return;
+
+    if (i < 237)
+      /* Stage 2 has some junk bytes at the end, ignore them */
+      checksum ^= b;
+  }
+
+  /* Check for known stage2 loaders */
+  if (checksum != 0x91 && checksum != 0x5b) {
+    return;
+  }
+
+  /* Receive file name */
+  i = gijoe_read_byte();
+  if (i < 0) {
+    return;
+  }
+
+  command_length = i;
+
+  do {
+    b = gijoe_read_byte();
+    if (b < 0)
+      return;
+
+    command_buffer[--i] = b;
+  } while (i > 0);
+
+  set_clock(0);
+
+  /* Open the file */
+  file_open(0);
+
+  buffer_t *buf = find_buffer(0);
+  if (buf == NULL) {
+    set_clock(1);
+    return;
+  }
+
+  /* Transfer data */
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    while (1) {
+      set_clock(1);
+      set_data(1);
+
+      /* send number of bytes in sector */
+      if (epyxcart_send_byte(buf->lastused-1)) {
+        break;
+      }
+
+      /* send data */
+      for (i=2;i<=buf->lastused;i++) {
+        if (epyxcart_send_byte(buf->data[i])) {
+          break;
+        }
+      }
+
+      if (!IEC_ATN)
+        break;
+
+      /* exit after final sector */
+      if (buf->sendeoi)
+        break;
+
+      /* read next sector */
+      set_clock(0);
+      if (buf->refill(buf))
+        break;
+    }
+  }
+
+  set_clock(1);
+  set_data(1);
+  cleanup_and_free_buffer(buf);
+}
+#endif
+
+
+/*
+ *
+ *  GEOS
+ *
+ */
+#ifdef CONFIG_LOADER_GEOS
+
+/* Function pointer to the current byte transmit function */
+void (*geos_send_byte)(uint8_t byte);
+uint8_t (*geos_get_byte)(void);
+
+/* Receive a fixed-length data block */
+static void geos_receive_datablock(void *data_, uint16_t length) {
+  uint8_t *data = (uint8_t*)data_;
+
+  data += length-1;
+
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    while (!IEC_CLOCK);
+    set_data(1);
+    while (length--)
+      *data-- = geos_get_byte();
+    set_data(0);
+  }
+}
+
+/* Receive a data block from the computer */
+static void geos_receive_lenblock(uint8_t *data) {
+  uint8_t exitflag = 0;
+  uint16_t length;
+
+  /* Receive data length */
+  while (!IEC_CLOCK && IEC_ATN)
+    if (check_keys()) {
+      /* User-requested exit */
+      exitflag = 1;
+      break;
+    }
+
+  /* Exit if ATN is low */
+  if (!IEC_ATN || exitflag) {
+    *data++ = 0;
+    *data   = 0;
+    return;
+  }
+
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    set_data(1);
+    length = geos_get_byte();
+    set_data(0);
+  }
+
+  if (length == 0)
+    length = 256;
+
+  geos_receive_datablock(data, length);
+}
+
+/* Send a single byte to the computer after waiting for CLOCK high */
+static void geos_transmit_byte_wait(uint8_t byte) {
+  ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
+    /* Wait until clock is high */
+    while (!IEC_CLOCK) ;
+    set_data(1);
+
+    /* Send byte */
+    geos_send_byte(byte);
+    set_clock(1);
+    set_data(0);
+  }
+
+  _delay_us(25); // educated guess
+}
+
+/* Send data block to computer */
+static void geos_transmit_buffer_s3(uint8_t *data, uint16_t len) {
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    /* Wait until clock is high */
+    while (!IEC_CLOCK) ;
+    set_data(1);
+
+    /* Send data block */
+    uint16_t i = len;
+    data += len - 1;
+
+    while (i--) {
+      geos_send_byte(*data--);
+    }
+
+    set_clock(1);
+    set_data(0);
+
+    _delay_us(15); // guessed
+  }
+}
+
+static void geos_transmit_buffer_s2(uint8_t *data, uint16_t len) {
+  /* Send length byte */
+  geos_transmit_byte_wait(len);
+
+  /* the rest is the same as in stage 3 */
+  geos_transmit_buffer_s3(data, len);
+}
+
+/* Send job status to computer */
+static void geos_transmit_status(void) {
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    /* Send a single 1 byte as length indicator */
+    geos_transmit_byte_wait(1);
+
+    /* Send (faked) job result code */
+    if (current_error == 0)
+      geos_transmit_byte_wait(1);
+    else
+      if (current_error == ERROR_WRITE_PROTECT)
+        geos_transmit_byte_wait(8);
+      else
+        geos_transmit_byte_wait(2); // random non-ok job status
+  }
+}
+
+/* GEOS READ operation */
+static void geos_read_sector(uint8_t track, uint8_t sector, buffer_t *buf) {
+  uart_putc('R');
+  uart_puthex(track);
+  uart_putc('/');
+  uart_puthex(sector);
+  uart_putcrlf();
+
+  read_sector(buf, current_part, track, sector);
+}
+
+/* GEOS WRITE operation */
+static void geos_write_sector_41(uint8_t track, uint8_t sector, buffer_t *buf) {
+  uart_putc('W');
+  uart_puthex(track);
+  uart_putc('/');
+  uart_puthex(sector);
+  uart_putcrlf();
+
+  /* Provide "unwritten data present" feedback */
+  mark_buffer_dirty(buf);
+
+  /* Receive data */
+  geos_receive_lenblock(buf->data);
+
+  /* Write to image */
+  write_sector(buf, current_part, track, sector);
+
+  /* Reset "unwritten data" feedback */
+  mark_buffer_clean(buf);
+}
+
+/* GEOS WRITE_71 operation */
+static void geos_write_sector_71(uint8_t track, uint8_t sector, buffer_t *buf) {
+  uart_putc('W');
+  uart_puthex(track);
+  uart_putc('/');
+  uart_puthex(sector);
+  uart_putcrlf();
+
+  /* Provide "unwritten data present" feedback */
+  mark_buffer_dirty(buf);
+
+  /* Receive data */
+  geos_receive_datablock(buf->data, 256);
+
+  /* Write to image */
+  write_sector(buf, current_part, track, sector);
+
+  /* Send status */
+  geos_transmit_status();
+
+  /* Reset "unwritten data" feedback */
+  mark_buffer_clean(buf);
+}
+
+
+/* GEOS stage 2/3 loader */
+void load_geos(UNUSED_PARAMETER) {
+  buffer_t *cmdbuf = alloc_system_buffer();
+  buffer_t *databuf = alloc_system_buffer();
+  uint8_t *cmddata;
+  uint16_t cmd;
+
+  if (!cmdbuf || !databuf)
+    return;
+
+  cmddata = cmdbuf->data;
+
+  /* Initial handshake */
+  uart_flush();
+  _delay_ms(1);
+  set_data(0);
+  while (IEC_CLOCK) ;
+
+  while (1) {
+    /* Receive command block */
+    set_busy_led(0);
+    geos_receive_lenblock(cmddata);
+    set_busy_led(1);
+
+    //uart_trace(cmddata, 0, 4);
+
+    cmd = cmddata[0] | (cmddata[1] << 8);
+
+    switch (cmd) {
+    case 0x0320: // 1541 stage 3 transmit
+      geos_transmit_buffer_s3(databuf->data, 256);
+      geos_transmit_status();
+      break;
+
+    case 0x031f: // 1571; 1541 stage 2 status (only seen in GEOS 1.3)
+                 // 1581 transmit
+      if (detected_loader == FL_GEOS_S23_1581) {
+        if (cmddata[2] & 0x80) {
+          geos_transmit_buffer_s3(databuf->data, 2);
+        } else {
+          geos_transmit_buffer_s3(databuf->data, 256);
+        }
+      }
+      geos_transmit_status();
+      break;
+
+    case 0x0325: // 1541 stage 3 status
+    case 0x032b: // 1581 status
+      geos_transmit_status();
+      break;
+
+    case 0x0000: // internal QUIT
+    case 0x0412: // 1541 stage 2 quit
+    case 0x0420: // 1541 stage 3 quit
+    case 0x0457: // 1581 quit
+    case 0x0475: // 1571 stage 3 quit
+      while (!IEC_CLOCK) ;
+      set_data(1);
+      return;
+
+    case 0x0432: // 1541 stage 2 transmit
+      if (current_error != 0) {
+        geos_transmit_status();
+      } else {
+        geos_transmit_buffer_s2(databuf->data, 256);
+      }
+      break;
+
+    case 0x0439: // 1541 stage 3 set address
+    case 0x04a5: // 1571 stage 3 set address
+      // Note: identical in stage 2, address 0428, probably unused
+      device_address = cmddata[2] & 0x1f;
+      display_address(device_address);
+      break;
+
+    case 0x049b: // 1581 initialize
+    case 0x04b9: // 1581 flush
+    case 0x04dc: // 1541 stage 3 initialize
+    case 0x0504: // 1541 stage 2 initialize - only seen in GEOS 1.3
+    case 0x057e: // 1571 initialize
+      /* Doesn't do anything that needs to be reimplemented */
+      break;
+
+    case 0x057c: // 1541 stage 2/3 write
+      geos_write_sector_41(cmddata[2], cmddata[3], databuf);
+      break;
+
+    case 0x058e: // 1541 stage 2/3 read
+    case 0x04cc: // 1581 read
+      geos_read_sector(cmddata[2], cmddata[3], databuf);
+      break;
+
+    case 0x04af: // 1571 read_and_send
+      geos_read_sector(cmddata[2], cmddata[3], databuf);
+      geos_transmit_buffer_s3(databuf->data, 256);
+      geos_transmit_status();
+      break;
+
+    case 0x047c: // 1581 write
+    case 0x05fe: // 1571 write
+      geos_write_sector_71(cmddata[2], cmddata[3], databuf);
+      break;
+
+    default:
+      uart_puts_P(PSTR("unknown:\r\n"));
+      uart_trace(cmddata, 0, 4);
+      return;
+    }
+  }
+}
+
+/* Stage 1 only - send a sector chain to the computer */
+static void geos_send_chain(uint8_t track, uint8_t sector,
+                            buffer_t *buf, uint8_t *key) {
+  uint8_t bytes;
+  uint8_t *keyptr,*dataptr;
+
+  do {
+    /* Read sector - no error recovery on computer side */
+    read_sector(buf, current_part, track, sector);
+
+    /* Decrypt contents if we have a key */
+    if (key != NULL) {
+      keyptr = key;
+      dataptr = buf->data + 2;
+      bytes = 254;
+      while (bytes--)
+        *dataptr++ ^= *keyptr++;
+    }
+
+    /* Read link pointer */
+    track = buf->data[0];
+    sector = buf->data[1];
+
+    if (track == 0) {
+      bytes = sector - 1;
+    } else {
+      bytes = 254;
+    }
+
+    /* Send buffer contents */
+    geos_transmit_buffer_s2(buf->data + 2, bytes);
+  } while (track != 0);
+
+  geos_transmit_byte_wait(0);
+}
+
+static const PROGMEM uint8_t geos64_chains[] = {
+  19, 13,
+  20, 15,
+  20, 17,
+  0
+};
+
+static const PROGMEM uint8_t geos128_chains[] = {
+  19, 12,
+  20, 15,
+  23, 6,
+  24, 4,
+  0
+};
+
+/* GEOS 64 stage 1 loader */
+void load_geos_s1(uint8_t version) {
+  buffer_t *encrbuf = find_buffer(BUFFER_SYS_GEOSKEY);
+  buffer_t *databuf = alloc_buffer();
+  uint8_t *encdata = NULL;
+  uint8_t track, sector;
+  const prog_uint8_t *chainptr;
+
+  if (!encrbuf || !databuf)
+    return;
+
+  if (version == 0) {
+    chainptr = geos64_chains;
+  } else {
+    chainptr = geos128_chains;
+  }
+
+  /* Initial handshake */
+  uart_flush();
+  _delay_ms(1);
+  set_data(0);
+  while (IEC_CLOCK) ;
+
+  /* Send sector chains */
+  while (1) {
+    track = pgm_read_byte(chainptr++);
+
+    if (track == 0)
+      break;
+
+    sector = pgm_read_byte(chainptr++);
+
+    /* Transfer sector chain */
+    geos_send_chain(track, sector, databuf, encdata);
+
+    /* Turn on decryption after the first chain */
+    encdata = encrbuf->data;
+  }
+
+  /* Done! */
+  free_buffer(encrbuf);
+  set_data(1);
+}
+
+#endif
+
+/*
+ *
+ *  Wheels
+ *
+ */
+#ifdef CONFIG_LOADER_WHEELS
+
+/* Send data block to computer */
+static void wheels44_transmit_buffer(uint8_t *data, uint16_t len) {
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    /* Wait until clock is high */
+    while (!IEC_CLOCK) ;
+    set_data(1);
+
+    /* Send data block */
+    uint16_t i = len;
+    data += len - 1;
+
+    while (i--) {
+      geos_send_byte(*data--);
+    }
+
+    set_clock(1);
+    set_data(1);
+
+    _delay_us(5);
+    while (IEC_CLOCK) ;
+
+    set_data(0);
+    _delay_us(15); // guessed
+  }
+}
+
+/* Send a single byte to the computer after waiting for CLOCK high */
+static void wheels_transmit_byte_wait(uint8_t byte) {
+  if (detected_loader == FL_WHEELS44_S2_1581) {
+    ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
+      /* Wait until clock is high */
+      while (!IEC_CLOCK) ;
+      set_data(1);
+
+      /* Send byte */
+      geos_send_byte(byte);
+      set_clock(1);
+      set_data(1);
+
+      _delay_us(5);
+      while (IEC_CLOCK) ;
+      set_data(0);
+    }
+
+    _delay_us(15); // educated guess
+  } else {
+    geos_transmit_byte_wait(byte);
+    _delay_us(15); // educated guess
+    while (IEC_CLOCK) ;
+  }
+}
+
+/* Send a fixed-length data block */
+static void wheels_transmit_datablock(void *data_, uint16_t length) {
+  uint8_t *data = (uint8_t*)data_;
+
+  if (detected_loader == FL_WHEELS44_S2_1581) {
+    wheels44_transmit_buffer(data, length);
+  } else {
+    geos_transmit_buffer_s3(data, length);
+
+    while (IEC_CLOCK) ;
+  }
+}
+
+/* Receive a fixed-length data block */
+static void wheels_receive_datablock(void *data_, uint16_t length) {
+  uint8_t *data = (uint8_t*)data_;
+
+  data += length-1;
+
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    while (!IEC_CLOCK) ;
+    set_data(1);
+    while (length--)
+      *data-- = geos_get_byte();
+
+    if (detected_loader == FL_WHEELS44_S2 ||
+        detected_loader == FL_WHEELS44_S2_1581)
+      while (IEC_CLOCK) ;
+
+    set_data(0);
+  }
+}
+
+/* Wheels STATUS operation (030f) */
+static void wheels_transmit_status(void) {
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    /* Send (faked) job result code */
+    if (current_error == 0)
+      wheels_transmit_byte_wait(1);
+    else
+      if (current_error == ERROR_WRITE_PROTECT)
+        wheels_transmit_byte_wait(8);
+      else
+        wheels_transmit_byte_wait(2); // random non-ok job status
+  }
+}
+
+/* Wheels CHECK_CHANGE operation (031b) */
+static void wheels_check_diskchange(void) {
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    if (dir_changed) {
+      /* Disk has changed */
+      wheels_transmit_byte_wait(3);
+    } else {
+      /* Disk not changed */
+      if (detected_loader == FL_WHEELS44_S2 &&
+          (partition[current_part].imagetype & D64_TYPE_MASK) == D64_TYPE_D71) {
+        wheels_transmit_byte_wait(0x80);
+      } else {
+        wheels_transmit_byte_wait(0);
+      }
+    }
+
+    dir_changed = 0;
+    while (IEC_CLOCK) ;
+  }
+}
+
+/* Wheels WRITE operation (0306) */
+static void wheels_write_sector(uint8_t track, uint8_t sector, buffer_t *buf) {
+  uart_putc('W');
+  uart_puthex(track);
+  uart_putc('/');
+  uart_puthex(sector);
+  uart_putcrlf();
+
+  /* Provide "unwritten data present" feedback */
+  mark_buffer_dirty(buf);
+
+  /* Receive data */
+  wheels_receive_datablock(buf->data, 256);
+
+  /* Write to image */
+  write_sector(buf, current_part, track, sector);
+
+  /* Send status */
+  wheels_transmit_status();
+
+  /* Reset "unwritten data" feedback */
+  mark_buffer_clean(buf);
+}
+
+/* Wheels READ operation (0309) */
+static void wheels_read_sector(uint8_t track, uint8_t sector, buffer_t *buf, uint16_t bytes) {
+  uart_putc('R');
+  uart_puthex(track);
+  uart_putc('/');
+  uart_puthex(sector);
+  uart_putcrlf();
+
+  read_sector(buf, current_part, track, sector);
+  wheels_transmit_datablock(buf->data, bytes);
+  wheels_transmit_status();
+}
+
+/* Wheels NATIVE_FREE operation (0312) */
+static void wheels_native_free(void) {
+  /* Cheat: Ignore the limits set by the C64 */
+  uint16_t freeblocks;
+
+  freeblocks = disk_free(current_part);
+  wheels_transmit_datablock(&freeblocks, 2);
+  wheels_transmit_status();
+}
+
+/* Wheels GET_CURRENT_PART_DIR (0315) */
+static void wheels_get_current_part_dir(void) {
+  uint8_t data[3];
+
+  data[0] = partition[current_part].current_dir.dxx.track;
+  data[1] = partition[current_part].current_dir.dxx.sector;
+  data[2] = current_part+1;
+  wheels_transmit_datablock(&data, 3);
+}
+
+/* Wheels SET_CURRENT_PART_DIR operation (0318) */
+static void wheels_set_current_part_dir(void) {
+  uint8_t data[3];
+
+  wheels_receive_datablock(&data, 3);
+
+  if (data[2] != 0)
+    current_part = data[2]-1;
+
+  partition[current_part].current_dir.dxx.track  = data[0];
+  partition[current_part].current_dir.dxx.sector = data[1];
+}
+
+/* -------- */
+
+/* Wheels stage 1 loader */
+void load_wheels_s1(const uint8_t version) {
+  buffer_t *buf;
+
+  uart_flush();
+  _delay_ms(2);
+  while (IEC_CLOCK) ;
+  set_data(0);
+
+  /* copy file name to command buffer */
+  if (version == 0) {
+    ustrcpy_P(command_buffer, PSTR("SYSTEM1"));
+  } else {
+    ustrcpy_P(command_buffer, PSTR("128SYSTEM1"));
+  }
+  command_length = ustrlen(command_buffer);
+
+  /* open file */
+  file_open(0);
+  buf = find_buffer(0);
+  if (!buf)
+    goto wheels_exit;
+
+  while (1) {
+    /* Transmit current sector */
+    wheels_transmit_datablock(buf->data, 256);
+
+    /* Check for last sector */
+    if (buf->sendeoi)
+      break;
+
+    /* Advance to next sector */
+    if (buf->refill(buf)) {
+      /* Error, abort - original loader doesn't handle this */
+      break;
+    }
+  }
+
+ wheels_exit:
+  while (!IEC_CLOCK) ;
+  set_data(1);
+  set_clock(1);
+  if (buf) {
+    cleanup_and_free_buffer(buf);
+  }
+}
+
+/* Wheels stage 2 loader */
+void load_wheels_s2(UNUSED_PARAMETER) {
+  struct {
+    uint16_t address;
+    uint8_t  track;
+    uint8_t  sector;
+  } cmdbuffer;
+  buffer_t *databuf = alloc_system_buffer();
+
+  if (!databuf)
+    return;
+
+  /* Initial handshake */
+  uart_flush();
+  _delay_ms(1);
+  while (IEC_CLOCK) ;
+  set_data(0);
+  set_clock(1);
+
+  while (1) {
+    /* Receive command block - redundant clock line check for check_keys */
+    while (!IEC_CLOCK && IEC_ATN) {
+      if (check_keys()) {
+        /* User-requested exit */
+        return;
+      }
+    }
+
+    wheels_receive_datablock(&cmdbuffer, 4);
+    set_busy_led(1);
+    //uart_trace(&cmdbuffer, 0, 4);
+
+    switch (cmdbuffer.address & 0xff) {
+    case 0x03: // QUIT
+      while (!IEC_CLOCK) ;
+      set_data(1);
+      return;
+
+    case 0x06: // WRITE
+      wheels_write_sector(cmdbuffer.track, cmdbuffer.sector, databuf);
+      break;
+
+    case 0x09: // READ
+      wheels_read_sector(cmdbuffer.track, cmdbuffer.sector, databuf, 256);
+      break;
+
+    case 0x0c: // READLINK
+      wheels_read_sector(cmdbuffer.track, cmdbuffer.sector, databuf, 2);
+      break;
+
+    case 0x0f: // STATUS
+      wheels_transmit_status();
+      break;
+
+    case 0x12: // NATIVE_FREE
+      wheels_native_free();
+      break;
+
+    case 0x15: // GET_CURRENT_PART_DIR
+      wheels_get_current_part_dir();
+      break;
+
+    case 0x18: // SET_CURRENT_PART_DIR
+      wheels_set_current_part_dir();
+      break;
+
+    case 0x1b: // CHECK_CHANGE
+      wheels_check_diskchange();
+      break;
+
+    default:
+      uart_puts_P(PSTR("unknown:\r\n"));
+      uart_trace(&cmdbuffer, 0, 4);
+      return;
+    }
+
+    set_busy_led(0);
+
+    /* wait until clock is low */
+    while (IEC_CLOCK && IEC_ATN) {
+      if (check_keys()) {
+        /* User-requested exit */
+        return;
+      }
+    }
+  }
+}
+
+#endif
+
+
+/*
+ *
+ * Nippon Loader
+ *
+ */
+#ifdef CONFIG_LOADER_NIPPON
+
+/* protocol sync: wait for Clock low, if ATN is also low, then return signal to resync */
+static uint8_t nippon_atn_clock_handshake(void) {
+  if (IEC_ATN) {
+    while(IEC_CLOCK) ;
+    return 1;
+  } else {
+    set_clock(0);
+    while(IEC_ATN) ;
+    return 0;
+  }
+}
+
+
+/* reads a byte from IEC, if loader is out of sync return false */
+static uint8_t nippon_read_byte(uint8_t *b) {
+  uint8_t tmp = 0, i;
+
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    set_clock(1);
+    set_data(1);
+    for (i=8; i; i--) {
+      if (! nippon_atn_clock_handshake())
+        return 0;
+      tmp = (tmp >> 1) | (IEC_DATA ? 0 : 128);
+      while(!IEC_CLOCK) ;
+    }
+    set_clock(0);
+    set_data(1);
+    *b = tmp;
+    return 1;
+  }
+  return 1; // not reached
+}
+
+/* sends a byte via IEC, if loader is out of sync return false */
+static uint8_t nippon_send_byte(uint8_t b) {
+  uint8_t i;
+
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    set_clock(1);
+    for (i=8; i; i--) {
+      if (! nippon_atn_clock_handshake())
+        return 0;
+      set_data(b & 1);
+      b = b >> 1;
+      while(!IEC_CLOCK) ;
+    }
+    set_clock(0);
+    set_data(1);
+    return 1;
+  }
+  return 1; // not reached
+}
+
+/* nippon idle loop */
+void load_nippon(UNUSED_PARAMETER) {
+  uint8_t t, s, i=0, j;
+  buffer_t *buf;
+
+  /* init */
+  uart_puts_P(PSTR("NIPPON"));
+  set_atn_irq(0);
+  buf = alloc_system_buffer();
+  if (!buf) {
+    uart_puts_P(PSTR("BUF ERR")); uart_putcrlf();
+    return;
+  }
+
+  /* loop until IEC master sends a track greater than $80 = exit code */
+  while (1) {
+
+    /* initial state */
+    /* timing is critical for ATN/CLK here, endless loop in $0bf0 at the cevi
+     * raise ATN CLK quick, before setting LEDs output to serial console
+     */
+    IEC_OUT &= (uint8_t)~(IEC_OBIT_ATN|IEC_OBIT_DATA|IEC_OBIT_CLOCK);
+    set_busy_led(0);
+    uart_putcrlf(); uart_putc('L'); // idle loop entered
+
+    /* wait for IEC master or human master to command us something */
+    while(IEC_ATN && !(i = check_keys())) ;
+    if (i)
+      break; /* user requested exit */
+    set_clock(0);
+    set_busy_led(1);
+
+    /* fetch command, sector and track, on failure resync/reinit protocol
+     * if track > 128 exit loader
+     * if sector > 128 read sector, else write */
+    while(!IEC_ATN) ;
+    if (! nippon_read_byte(&t))
+      continue;
+    uart_putc('T');
+    uart_puthex(t);
+    if (t & 128)
+      break;
+
+    if (! nippon_read_byte(&s))
+      continue;
+    uart_putc('S');
+    uart_puthex(s & 0x7f);
+
+    if (s & 128) {
+      /* read sector */
+      s &= 0x7f;
+      uart_putc('R');
+      read_sector(buf, current_part, t, s);
+      i = 0;
+      do {
+        if (! nippon_send_byte(buf->data[i]))
+          break;
+        i++;
+      } while (i);
+    }
+    else {
+      /* write sector */
+      uart_putc('W');
+      i = 0;
+      do {
+        if (! (j = nippon_read_byte(&(buf->data[i]))))
+          break;
+        i++;
+      } while (i);
+      if (!j)
+        break;
+      write_sector(buf, current_part, t, s);
+    }
+  }
+
+  /* exit */
+
+  free_buffer(buf);
+  uart_puts_P(PSTR("NEXT")); uart_putcrlf();
+}
+#endif
+
+#ifdef CONFIG_LOADER_AR6
+/*
+ *
+ * Action Replay 6 loaders/savers
+ *
+ */
+
+/* 1581 loader */
+void load_ar6_1581(UNUSED_PARAMETER) {
+  buffer_t *buf;
+  uint16_t i;
+
+  buf = find_buffer(0);
+  if (!buf) {
+    /* The file should've been open? */
+    return;
+  }
+
+  set_clock(0);
+  set_data(1);
+  _delay_ms(1);
+
+  while (1) {
+    /* Send number of bytes in sector */
+    ar6_1581_send_byte(buf->lastused-1);
+
+    /* Send bytes in sector */
+    for (i=2; i<=buf->lastused; i++)
+      ar6_1581_send_byte(buf->data[i]);
+
+    /* Check for end of file */
+    if (buf->sendeoi)
+      break;
+
+    /* Read next sector */
+    if (buf->refill(buf)) {
+      /* Error, end transmission */
+      break;
+    }
+  }
+
+  /* Send end marker */
+  ar6_1581_send_byte(0);
+  _delay_ms(1);
+  set_clock(1);
+  set_data(1);
+}
+
+/* 1581 saver */
+void save_ar6_1581(UNUSED_PARAMETER) {
+  buffer_t *buf;
+  uint8_t i;
+
+  buf = find_buffer(1);
+
+  if (!buf) {
+    /* File isn't open */
+    return;
+  }
+
+  set_clock(0);
+  set_data(1);
+  _delay_ms(1);
+
+  do {
+    mark_buffer_dirty(buf);
+
+    /* Receive sector */
+    i = 0;
+    do {
+      buf->data[i] = ar6_1581p_get_byte();
+      i++;
+    } while (i != 0);
+
+    /* Set end */
+    if (buf->data[0] == 0) {
+      buf->position = buf->data[1];
+    } else
+      buf->position = 0;
+
+    /* Write data */
+    if (buf->refill(buf))
+      break;
+  } while (buf->data[0] != 0);
+
+  cleanup_and_free_buffer(buf);
+}
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fastloader.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fastloader.h
new file mode 100644
index 00000000..7903f3ec
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fastloader.h
@@ -0,0 +1,80 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   fastloader.h: Definitions for the high level fast loader handling
+
+*/
+
+#ifndef FASTLOADER_H
+#define FASTLOADER_H
+
+#define FL_NONE              0
+#define FL_TURBODISK         1
+#define FL_FC3_LOAD          2
+#define FL_FC3_SAVE          3
+#define FL_DREAMLOAD         4
+#define FL_DREAMLOAD_OLD     5
+#define FL_FC3_FREEZED       6
+#define FL_ULOAD3            7
+#define FL_GI_JOE            8
+#define FL_EPYXCART          9
+#define FL_GEOS_S1          10
+#define FL_GEOS_S1_KEY      11
+#define FL_GEOS_S23_1541    12
+#define FL_GEOS_S23_1571    13
+#define FL_GEOS_S23_1581    14
+#define FL_WHEELS_S1_64     15
+#define FL_WHEELS_S1_128    16
+#define FL_WHEELS_S2        17
+#define FL_WHEELS44_S2      18
+#define FL_WHEELS44_S2_1581 19
+#define FL_NIPPON           20
+#define FL_AR6_1581_LOAD    21
+#define FL_AR6_1581_SAVE    22
+#define FL_ELOAD1           23
+
+#ifndef __ASSEMBLER__
+
+extern uint8_t detected_loader;
+extern volatile uint8_t fl_track;
+extern volatile uint8_t fl_sector;
+extern void (*geos_send_byte)(uint8_t byte);
+extern uint8_t (*geos_get_byte)(void);
+
+void load_turbodisk(uint8_t);
+void load_fc3(uint8_t freezed);
+void save_fc3(uint8_t);
+void load_dreamload(uint8_t);
+void load_uload3(uint8_t);
+void load_eload1(uint8_t);
+void load_gijoe(uint8_t);
+void load_epyxcart(uint8_t);
+void load_geos(uint8_t);
+void load_geos_s1(uint8_t version);
+void load_wheels_s1(uint8_t version);
+void load_wheels_s2(uint8_t);
+void load_nippon(uint8_t);
+void load_ar6_1581(uint8_t);
+void save_ar6_1581(uint8_t);
+
+#endif
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fatops.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fatops.c
new file mode 100644
index 00000000..d7a8b878
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fatops.c
@@ -0,0 +1,1510 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+   ASCII/PET conversion Copyright (C) 2008 Jim Brain <brain@jbrain.com>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   fatops.c: FAT operations
+
+*/
+
+#include <avr/pgmspace.h>
+#include <ctype.h>
+#include <string.h>
+#include <stdint.h>
+#include "config.h"
+#include "buffers.h"
+#include "d64ops.h"
+#include "diskchange.h"
+#include "diskio.h"
+#include "display.h"
+#include "doscmd.h"
+#include "errormsg.h"
+#include "ff.h"
+#include "fileops.h"
+#include "flags.h"
+#include "led.h"
+#include "m2iops.h"
+#include "parser.h"
+#include "uart.h"
+#include "ustring.h"
+#include "wrapops.h"
+#include "fatops.h"
+
+#define P00_HEADER_SIZE       26
+#define P00_CBMNAME_OFFSET    8
+#define P00_RECORDLEN_OFFSET  25
+
+static const PROGMEM char p00marker[] = "C64File";
+
+typedef enum { EXT_UNKNOWN, EXT_IS_X00, EXT_IS_TYPE } exttype_t;
+
+uint8_t file_extension_mode;
+
+/* ------------------------------------------------------------------------- */
+/*  Utility functions                                                        */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * parse_error - translates a ff FRESULT into a commodore error message
+ * @res     : FRESULT to be translated
+ * @readflag: Flags if it was a read operation
+ *
+ * This function sets the error channel according to the problem given in
+ * res. readflag specifies if a READ ERROR or WRITE ERROR should be used
+ * if the error is FR_RW_ERROR.
+ */
+void parse_error(FRESULT res, uint8_t readflag) {
+  switch (res) {
+  case FR_OK:
+    set_error(ERROR_OK);
+    break;
+
+  case FR_NO_FILE:
+    set_error_ts(ERROR_FILE_NOT_FOUND,res,0);
+    break;
+
+  case FR_NO_PATH:
+  case FR_NOT_DIRECTORY:
+    set_error_ts(ERROR_FILE_NOT_FOUND_39,res,0);
+    break;
+
+  case FR_INVALID_NAME:
+    set_error_ts(ERROR_SYNTAX_JOKER,res,0);
+    break;
+
+  case FR_NOT_READY:
+  case FR_INVALID_DRIVE:
+  case FR_NOT_ENABLED:
+  case FR_NO_FILESYSTEM:
+    set_error_ts(ERROR_DRIVE_NOT_READY,res,0);
+    break;
+
+  case FR_RW_ERROR:
+    /* Just a random READ ERROR */
+    if (readflag)
+      set_error_ts(ERROR_READ_NOHEADER,res,0);
+    else
+      set_error_ts(ERROR_WRITE_VERIFY,res,0);
+    break;
+
+  case FR_WRITE_PROTECTED:
+    set_error_ts(ERROR_WRITE_PROTECT,res,0);
+    break;
+
+  case FR_EXIST:
+    set_error_ts(ERROR_FILE_EXISTS,res,0);
+    break;
+
+  case FR_DIR_NOT_EMPTY:
+    // FIXME: What do the CMD drives return when removing a non-empty directory?
+    set_error_ts(ERROR_FILE_EXISTS,res,0);
+    break;
+
+  case FR_DENIED:
+    set_error_ts(ERROR_DISK_FULL,res,0);
+    break;
+
+  case FR_IS_READONLY:
+  case FR_IS_DIRECTORY:
+    set_error_ts(ERROR_FILE_EXISTS,res,0);
+    break;
+
+  case FR_INVALID_OBJECT:
+    set_error_ts(ERROR_DRIVE_NOT_READY,res,0);
+    break;
+
+  default:
+    set_error_ts(ERROR_SYNTAX_UNABLE,res,99);
+    break;
+  }
+}
+
+/**
+ * check_extension - check for known file-type-based name extensions
+ * @name: pointer to the file name
+ * @ext : pointer to pointer to the file extension
+ *
+ * This function checks if the given file name has an extension that
+ * indicates a specific file type like PRG/SEQ/P00/S00/... The ext
+ * pointer will be set to the first character of the extension if
+ * any is present or NULL if not. Returns EXT_IS_X00 for x00,
+ * EXT_IS_TYPE for PRG/SEQ/... or EXT_UNKNOWN for an unknown file extension.
+ */
+static exttype_t check_extension(uint8_t *name, uint8_t **ext) {
+  uint8_t f,s,t;
+
+  /* Search for the file extension */
+  if ((*ext = ustrrchr(name, '.')) != NULL) {
+    f = *(++(*ext));
+    s = *(*ext+1);
+    t = *(*ext+2);
+    if ((f == 'P' || f == 'S' ||
+         f == 'U' || f == 'R') &&
+        isdigit(s) && isdigit(t))
+      return EXT_IS_X00;
+    else if ((f=='P' && s == 'R' && t == 'G') ||
+             (f=='S' && s == 'E' && t == 'Q') ||
+             (f=='R' && s == 'E' && t == 'L') ||
+             (f=='U' && s == 'S' && t == 'R'))
+      return EXT_IS_TYPE;
+  }
+  return EXT_UNKNOWN;
+}
+
+/**
+ * check_imageext - check for a known image file extension
+ * @name: pointer to the file name
+ *
+ * This function checks if the given file name has an extension that
+ * indicates a known image file type. Returns IMG_IS_M2I for M2I files,
+ * IMG_IS_DISK for D64/D41/D71/D81 files or IMG_UNKNOWN for an unknown
+ * file extension.
+ */
+imgtype_t check_imageext(uint8_t *name) {
+  uint8_t f,s,t;
+  uint8_t *ext = ustrrchr(name, '.');
+
+  if (ext == NULL)
+    return IMG_UNKNOWN;
+
+  f = toupper(*++ext);
+  s = toupper(*++ext);
+  t = toupper(*++ext);
+
+  if (f == 'M' && s == '2' && t == 'I')
+    return IMG_IS_M2I;
+
+  if (f == 'D')
+    if ((s == '6' && t == '4') ||
+        (s == 'N' && t == 'P') ||
+        ((s == '4' || s == '7' || s == '8') &&
+         (t == '1')))
+      return IMG_IS_DISK;
+
+ return IMG_UNKNOWN;
+}
+
+/**
+ * asc2pet - convert string from ASCII to PETSCII
+ * @buf: pointer to the string to be converted
+ *
+ * This function converts the string in the given buffer from ASCII to
+ * PETSCII in-place.
+ */
+static void asc2pet(uint8_t *buf) {
+  uint8_t ch;
+  while (*buf) {
+    ch = *buf;
+    if (ch > 64 && ch < 91)
+      ch += 128;
+    else if (ch > 96 && ch < 123)
+      ch -= 32;
+    else if (ch > 192 && ch < 219)
+      ch -= 128;
+    else if (ch == '~')
+      ch = 255;
+    *buf = ch;
+    buf++;
+  }
+}
+
+/**
+ * pet2asc - convert string from PETSCII to ASCII
+ * @buf: pointer to the string to be converted
+ *
+ * This function converts the string in the given buffer from PETSCII to
+ * ASCII in-place.
+ */
+static void pet2asc(uint8_t *buf) {
+  uint8_t ch;
+  while (*buf) {
+    ch = *buf;
+    if (ch > (128+64) && ch < (128+91))
+      ch -= 128;
+    else if (ch > (96-32) && ch < (123-32))
+      ch += 32;
+    else if (ch > (192-128) && ch < (219-128))
+      ch += 128;
+    else if (ch == 255)
+      ch = '~';
+    *buf = ch;
+    buf++;
+  }
+}
+
+static uint8_t* build_name(uint8_t *name, uint8_t type) {
+  uint8_t *x00ext = NULL;
+
+  pet2asc(name);
+  if (type != TYPE_RAW && file_extension_mode != 0 &&
+      !(type == TYPE_PRG && check_imageext(name) != IMG_UNKNOWN)) {
+    if ((file_extension_mode == 1 && type != TYPE_PRG) ||
+        (file_extension_mode == 2)
+        ) {
+      /* Append .[PSUR]00 suffix to the file name */
+      while (*name) {
+        if (isalnum(*name) || *name == '!' ||
+            (*name >= '#' && *name <= ')') ||
+            *name == '-') {
+          name++;
+        } else {
+          *name++ = '_';
+        }
+      }
+      *name++ = '.';
+      *name++ = pgm_read_byte(filetypes+3*type);
+      *name++ = '0';
+      x00ext = name;
+      *name++ = '0';
+      *name   = 0;
+    } else if ((file_extension_mode == 3 && type != TYPE_PRG) ||
+               (file_extension_mode == 4)) {
+      /* Append type suffix to the file name */
+      while (*name) name++;
+      *name++ = '.';
+      memcpy_P(name, filetypes + TYPE_LENGTH * (type & EXT_TYPE_MASK), TYPE_LENGTH);
+      *(name+3) = 0;
+    }
+  }
+  return x00ext;
+}
+
+/* ------------------------------------------------------------------------- */
+/*  Callbacks                                                                */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * fat_file_read - read the next data block into the buffer
+ * @buf: buffer to be worked on
+ *
+ * This function reads the next block of data from the associated file into
+ * the given buffer. Used as a refill-callback when reading files
+ */
+static uint8_t fat_file_read(buffer_t *buf) {
+  FRESULT res;
+  UINT bytesread;
+
+  uart_putc('#');
+
+  buf->fptr = buf->pvt.fat.fh.fptr - buf->pvt.fat.headersize;
+
+  res = f_read(&buf->pvt.fat.fh, buf->data+2, (buf->recordlen ? buf->recordlen : 254), &bytesread);
+  if (res != FR_OK) {
+    parse_error(res,1);
+    free_buffer(buf);
+    return 1;
+  }
+
+  /* The bus protocol can't handle 0-byte-files */
+  if (bytesread == 0) {
+    bytesread = 1;
+    /* Experimental data suggests that this may be correct */
+    buf->data[2] = (buf->recordlen ? 255 : 13);
+  }
+
+  buf->position = 2;
+  buf->lastused = bytesread+1;
+  if(buf->recordlen) // strip nulls from end of REL record.
+    while(!buf->data[buf->lastused] && --(buf->lastused) > 1);
+  if (bytesread < 254
+      || (buf->pvt.fat.fh.fsize - buf->pvt.fat.fh.fptr) == 0
+      || buf->recordlen
+     )
+    buf->sendeoi = 1;
+  else
+    buf->sendeoi = 0;
+
+  return 0;
+}
+
+/**
+ * write_data - write the current buffer data
+ * @buf: buffer to be worked on
+ *
+ * This function writes the current contents of the given buffer into its
+ * associated file.
+ */
+static uint8_t write_data(buffer_t *buf) {
+  FRESULT res;
+  UINT byteswritten;
+
+  uart_putc('/');
+
+  if(!buf->mustflush)
+    buf->lastused = buf->position - 1;
+
+  if(buf->recordlen > buf->lastused - 1)
+    memset(buf->data + buf->lastused + 1,0,buf->recordlen - (buf->lastused - 1));
+
+  if(buf->recordlen)
+    buf->lastused = buf->recordlen + 1;
+
+  res = f_write(&buf->pvt.fat.fh, buf->data+2, buf->lastused-1, &byteswritten);
+  if (res != FR_OK) {
+    uart_putc('r');
+    parse_error(res,1);
+    f_close(&buf->pvt.fat.fh);
+    free_buffer(buf);
+    return 1;
+  }
+
+  if (byteswritten != buf->lastused-1U) {
+    uart_putc('l');
+    set_error(ERROR_DISK_FULL);
+    f_close(&buf->pvt.fat.fh);
+    free_buffer(buf);
+    return 1;
+  }
+
+  mark_buffer_clean(buf);
+  buf->mustflush = 0;
+  buf->position  = 2;
+  buf->lastused  = 2;
+  buf->fptr      = buf->pvt.fat.fh.fptr - buf->pvt.fat.headersize;
+
+  return 0;
+}
+
+/**
+ * fat_file_write - refill-callback for files opened for writing
+ * @buf: target buffer
+ *
+ * This function writes the contents of buf to the associated file.
+ */
+static uint8_t fat_file_write(buffer_t *buf) {
+  FRESULT res = FR_OK;
+  uint32_t fptr;
+  uint32_t i = 0;
+
+  fptr = buf->pvt.fat.fh.fsize - buf->pvt.fat.headersize;
+
+  // on a REL file, the fptr will be be at the end of the record we just read.  Reposition.
+  if (buf->fptr != fptr) {
+    res = f_lseek(&buf->pvt.fat.fh, buf->pvt.fat.headersize + buf->fptr);
+    if (res != FR_OK) {
+      parse_error(res,1);
+      f_close(&buf->pvt.fat.fh);
+      free_buffer(buf);
+      return 1;
+    }
+  }
+
+  if(buf->fptr > fptr)
+    i = buf->fptr - fptr;
+
+  if (res == FR_OK) {
+    if (write_data(buf))
+      return 1;
+  }
+
+  if(i) {
+    // we need to fill bytes.
+    // position to old end of file.
+    res = f_lseek(&buf->pvt.fat.fh, buf->pvt.fat.headersize + fptr);
+    buf->mustflush = 0;
+    buf->fptr = fptr;
+    buf->data[2] = (buf->recordlen?255:0);
+    memset(buf->data + 3,0,253);
+    while(res == FR_OK && i) {
+      if (buf->recordlen)
+        buf->lastused = buf->recordlen;
+      else
+        buf->lastused = (i>254 ? 254 : (uint8_t) i);
+
+      i -= buf->lastused;
+      buf->position = buf->lastused + 2;
+
+      if(write_data(buf))
+        return 1;
+    }
+    res = f_lseek(&buf->pvt.fat.fh, buf->pvt.fat.fh.fsize);
+    if (res != FR_OK) {
+      uart_putc('r');
+      parse_error(res,1);
+      f_close(&buf->pvt.fat.fh);
+      free_buffer(buf);
+      return 1;
+    }
+    buf->fptr = buf->pvt.fat.fh.fptr - buf->pvt.fat.headersize;
+  }
+
+  return 0;
+}
+
+/**
+ * fat_file_seek - callback for seek
+ * @buf     : buffer to be worked on
+ * @position: offset to seek to
+ * @index   : offset within the record to seek to
+ *
+ * This function seeks to the offset position in the file associated
+ * with the given buffer and sets the read pointer to the byte given
+ * in index, effectively seeking to (position+index) for normal files.
+ * Returns 1 if an error occured, 0 otherwise.
+ */
+uint8_t fat_file_seek(buffer_t *buf, uint32_t position, uint8_t index) {
+  uint32_t pos = position + buf->pvt.fat.headersize;
+
+  if (buf->dirty)
+    if (fat_file_write(buf))
+      return 1;
+
+  if (buf->pvt.fat.fh.fsize >= pos) {
+    FRESULT res = f_lseek(&buf->pvt.fat.fh, pos);
+    if (res != FR_OK) {
+      parse_error(res,0);
+      f_close(&buf->pvt.fat.fh);
+      free_buffer(buf);
+      return 1;
+    }
+
+    if (fat_file_read(buf))
+      return 1;
+  } else {
+    buf->data[2]  = (buf->recordlen ? 255:13);
+    buf->lastused = 2;
+    buf->fptr     = position;
+    set_error(ERROR_RECORD_MISSING);
+  }
+
+  buf->position = index + 2;
+  if(index + 2 > buf->lastused)
+    buf->position = buf->lastused;
+
+  return 0;
+}
+
+/**
+ * fat_file_sync - synchronize the current REL file.
+ * @buf: buffer to be worked on
+ *
+ */
+static uint8_t fat_file_sync(buffer_t *buf) {
+  return fat_file_seek(buf,buf->fptr + buf->recordlen,0);
+}
+
+/**
+ * fat_file_close - close the file associated with a buffer
+ * @buf: buffer to be worked on
+ *
+ * This function closes the file associated with the given buffer. If the buffer
+ * was opened for writing the data contents will be stored if required.
+ * Additionally the buffer will be marked as free.
+ * Used as a cleanup-callback for reading and writing.
+ */
+static uint8_t fat_file_close(buffer_t *buf) {
+  FRESULT res;
+
+  if (!buf->allocated) return 0;
+
+  if (buf->write) {
+    /* Write the remaining data using the callback */
+    buf->refill(buf);
+  }
+
+  res = f_close(&buf->pvt.fat.fh);
+  parse_error(res,1);
+  buf->cleanup = callback_dummy;
+
+  if (res != FR_OK)
+    return 1;
+  else
+    return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+/*  Internal handlers for the various operations                             */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * fat_open_read - opens a file for reading
+ * @path: path of the file
+ * @dent: pointer to cbmdirent with name of the file
+ * @buf : buffer to be used
+ *
+ * This functions opens a file in the FAT filesystem for reading and sets up
+ * buf to access it.
+ */
+void fat_open_read(path_t *path, cbmdirent_t *dent, buffer_t *buf) {
+  FRESULT res;
+  uint8_t *name;
+
+  pet2asc(dent->name);
+  if (dent->pvt.fat.realname[0])
+    name = dent->pvt.fat.realname;
+  else
+    name = dent->name;
+
+  partition[path->part].fatfs.curr_dir = path->dir.fat;
+  res = f_open(&partition[path->part].fatfs,&buf->pvt.fat.fh, name, FA_READ | FA_OPEN_EXISTING);
+  if (res != FR_OK) {
+    parse_error(res,1);
+    return;
+  }
+
+  if (dent->opstype == OPSTYPE_FAT_X00) {
+    /* It's a [PSUR]00 file, skip the header */
+    /* If anything goes wrong here, refill will notice too */
+    f_lseek(&buf->pvt.fat.fh, P00_HEADER_SIZE);
+    buf->pvt.fat.headersize = P00_HEADER_SIZE;
+  }
+
+  buf->read      = 1;
+  buf->cleanup   = fat_file_close;
+  buf->refill    = fat_file_read;
+  buf->seek      = fat_file_seek;
+
+  stick_buffer(buf);
+
+  /* Call the refill once for the first block of data */
+  buf->refill(buf);
+}
+
+/**
+ * create_file - creates a file
+ * @path     : path of the file
+ * @dent     : name of the file
+ * @type     : type of the file
+ * @buf      : buffer to be used
+ * @recordlen: length of record, if REL file.
+ *
+ * This function opens a file in the FAT filesystem for writing and sets up
+ * buf to access it. type is ignored here because FAT has no equivalent of
+ * file types.
+ */
+FRESULT create_file(path_t *path, cbmdirent_t *dent, uint8_t type, buffer_t *buf, uint8_t recordlen) {
+  FRESULT res;
+  uint8_t *name, *x00ext;
+
+  x00ext = NULL;
+
+  /* FIXME: Add a comment why the "true" part of this if is required */
+  if (dent->pvt.fat.realname[0])
+    name = dent->pvt.fat.realname;
+  else {
+    ustrcpy(entrybuf, dent->name);
+    x00ext = build_name(entrybuf,type);
+    name = entrybuf;
+  }
+
+  partition[path->part].fatfs.curr_dir = path->dir.fat;
+  do {
+    res = f_open(&partition[path->part].fatfs, &buf->pvt.fat.fh, name,FA_WRITE | FA_CREATE_NEW | (recordlen?FA_READ:0));
+    if (res == FR_EXIST && x00ext != NULL) {
+      /* File exists, increment extension */
+      *x00ext += 1;
+      if (*x00ext == '9'+1) {
+        *x00ext = '0';
+        *(x00ext-1) += 1;
+        if (*(x00ext-1) == '9'+1)
+          break;
+      }
+    }
+  } while (res == FR_EXIST);
+
+  if (res != FR_OK)
+    return res;
+
+  if (x00ext != NULL || recordlen) {
+    UINT byteswritten;
+
+    if(x00ext != NULL) {
+      /* Write a [PSUR]00 header */
+
+      memset(entrybuf, 0, P00_HEADER_SIZE);
+      ustrcpy_P(entrybuf, p00marker);
+      memcpy(entrybuf+P00_CBMNAME_OFFSET, dent->name, CBM_NAME_LENGTH);
+      if(recordlen)
+        entrybuf[P00_RECORDLEN_OFFSET] = recordlen;
+      buf->pvt.fat.headersize = P00_HEADER_SIZE;
+    } else if(recordlen) {
+      entrybuf[0] = recordlen;
+      buf->pvt.fat.headersize = 1;
+    }
+    res = f_write(&buf->pvt.fat.fh, entrybuf, buf->pvt.fat.headersize, &byteswritten);
+    if (res != FR_OK || byteswritten != buf->pvt.fat.headersize) {
+      return res;
+    }
+  }
+
+  return FR_OK;
+}
+
+/**
+ * fat_open_write - opens a file for writing
+ * @path  : path of the file
+ * @dent  : name of the file
+ * @type  : type of the file
+ * @buf   : buffer to be used
+ * @append: Flags if the new data should be appended to the end of file
+ *
+ * This function opens a file in the FAT filesystem for writing and sets up
+ * buf to access it. type is ignored here because FAT has no equivalent of
+ * file types.
+ */
+void fat_open_write(path_t *path, cbmdirent_t *dent, uint8_t type, buffer_t *buf, uint8_t append) {
+  FRESULT res;
+
+  if (append) {
+    partition[path->part].fatfs.curr_dir = path->dir.fat;
+    res = f_open(&partition[path->part].fatfs, &buf->pvt.fat.fh, dent->pvt.fat.realname, FA_WRITE | FA_OPEN_EXISTING);
+    if (dent->opstype == OPSTYPE_FAT_X00)
+      /* It's a [PSUR]00 file */
+      buf->pvt.fat.headersize = P00_HEADER_SIZE;
+    if (res == FR_OK)
+      res = f_lseek(&buf->pvt.fat.fh, buf->pvt.fat.fh.fsize);
+    buf->fptr = buf->pvt.fat.fh.fsize - buf->pvt.fat.headersize;
+  } else
+    res = create_file(path, dent, type, buf, 0);
+
+  if (res != FR_OK) {
+    parse_error(res,0);
+    return;
+  }
+
+  mark_write_buffer(buf);
+  buf->position  = 2;
+  buf->lastused  = 2;
+  buf->cleanup   = fat_file_close;
+  buf->refill    = fat_file_write;
+  buf->seek      = fat_file_seek;
+
+  /* If no data is written the file should end up with a single 0x0d byte */
+  buf->data[2] = 13;
+
+  stick_buffer(buf);
+}
+
+/**
+ * fat_open_rel - creates a rel file.
+ * @path  : path of the file
+ * @dent  : name of the file
+ * @buf   : buffer to be used
+ * @length: record length
+ * @mode  : select between new or existing file
+ *
+ * This function opens a rel file and prepares it for access.
+ * If the mode parameter is 0, create a new file. If it is != 0,
+ * open an existing file.
+ */
+void fat_open_rel(path_t *path, cbmdirent_t *dent, buffer_t *buf, uint8_t length, uint8_t mode) {
+  FRESULT res;
+  UINT bytesread;
+
+  if(!mode) {
+    res = create_file(path, dent, TYPE_REL, buf, length);
+    bytesread = 1;
+    entrybuf[0] = length;
+  } else {
+    partition[path->part].fatfs.curr_dir = path->dir.fat;
+    res = f_open(&partition[path->part].fatfs, &buf->pvt.fat.fh, dent->pvt.fat.realname, FA_WRITE | FA_READ | FA_OPEN_EXISTING);
+    if (res == FR_OK) {
+      if (dent->opstype == OPSTYPE_FAT_X00) {
+        res = f_lseek(&buf->pvt.fat.fh, P00_RECORDLEN_OFFSET);
+      }
+      if(res == FR_OK)
+        /* read record length */
+        res = f_read(&buf->pvt.fat.fh, entrybuf, 1, &bytesread);
+      if(!length)
+        length = entrybuf[0];
+    }
+  }
+
+  if (res != FR_OK || bytesread != 1) {
+    parse_error(res,0);
+    return;
+  }
+
+  buf->pvt.fat.headersize = (uint8_t)buf->pvt.fat.fh.fptr;
+  buf->recordlen  = length;
+  mark_write_buffer(buf);
+  buf->read      = 1;
+  buf->cleanup   = fat_file_close;
+  buf->refill    = fat_file_sync;
+  buf->seek      = fat_file_seek;
+
+  stick_buffer(buf);
+
+  /* read the first record */
+  if(!fat_file_read(buf) && length != entrybuf[0])
+    set_error(ERROR_RECORD_MISSING);
+}
+
+/* ------------------------------------------------------------------------- */
+/*  External interface for the various operations                            */
+/* ------------------------------------------------------------------------- */
+
+uint8_t fat_opendir(dh_t *dh, path_t *path) {
+  FRESULT res;
+
+  res = l_opendir(&partition[path->part].fatfs, path->dir.fat, &dh->dir.fat);
+  dh->part = path->part;
+  if (res != FR_OK) {
+    parse_error(res,1);
+    return 1;
+  }
+  return 0;
+}
+
+/**
+ * fat_readdir - readdir wrapper for FAT
+ * @dh  : directory handle as set up by opendir
+ * @dent: CBM directory entry for returning data
+ *
+ * This function reads the next directory entry into dent.
+ * Returns 1 if an error occured, -1 if there are no more
+ * directory entries and 0 if successful.
+ */
+int8_t fat_readdir(dh_t *dh, cbmdirent_t *dent) {
+  FRESULT res;
+  FILINFO finfo;
+  uint8_t *ptr,*nameptr;
+  uint8_t typechar;
+
+  finfo.lfn = entrybuf;
+
+  do {
+    res = f_readdir(&dh->dir.fat, &finfo);
+    if (res != FR_OK) {
+      if (res == FR_INVALID_OBJECT)
+        set_error(ERROR_DIR_ERROR);
+      else
+        parse_error(res,1);
+      return 1;
+    }
+  } while ((finfo.fname[0] && (finfo.fattrib & AM_VOL)) ||
+           (finfo.fname[0] == '.' && finfo.fname[1] == 0) ||
+           (finfo.fname[0] == '.' && finfo.fname[1] == '.' && finfo.fname[2] == 0));
+
+  memset(dent, 0, sizeof(cbmdirent_t));
+
+  if (!finfo.fname[0])
+    return -1;
+
+  dent->opstype = OPSTYPE_FAT;
+
+  /* Copy name */
+  ustrcpy(dent->pvt.fat.realname, finfo.fname);
+
+  if (!finfo.lfn[0] || ustrlen(finfo.lfn) > CBM_NAME_LENGTH+4) {
+    nameptr = finfo.fname;
+  } else {
+    /* Convert only LFNs to PETSCII, 8.3 are always upper-case */
+    nameptr = finfo.lfn;
+    asc2pet(nameptr);
+  }
+
+  /* File type */
+  if (finfo.fattrib & AM_DIR) {
+    dent->typeflags = TYPE_DIR;
+    /* Hide directories starting with . */
+    if (*nameptr == '.')
+      dent->typeflags |= FLAG_HIDDEN;
+
+  } else {
+    /* Search for the file extension */
+    exttype_t ext = check_extension(finfo.fname, &ptr);
+    if (ext == EXT_IS_X00) {
+      /* [PSRU]00 file - try to read the internal name */
+      UINT bytesread;
+
+      typechar = *ptr;
+      res = l_opencluster(&partition[dh->part].fatfs, &partition[dh->part].imagehandle, finfo.clust);
+      if (res != FR_OK)
+        goto notp00;
+
+      res = f_read(&partition[dh->part].imagehandle, entrybuf, P00_HEADER_SIZE, &bytesread);
+      if (res != FR_OK)
+        goto notp00;
+
+      if (ustrcmp_P(entrybuf, p00marker))
+        goto notp00;
+
+      /* Copy the internal name - dent->name is still zeroed */
+      ustrcpy(dent->name, entrybuf+P00_CBMNAME_OFFSET);
+
+      /* Some programs pad the name with 0xa0 instead of 0 */
+      ptr = dent->name;
+      for (uint8_t i=0;i<16;i++,ptr++)
+        if (*ptr == 0xa0)
+          *ptr = 0;
+
+      finfo.fsize -= P00_HEADER_SIZE;
+      dent->opstype = OPSTYPE_FAT_X00;
+
+    } else if (ext == EXT_IS_TYPE && (globalflags & EXTENSION_HIDING)) {
+      /* Type extension */
+      typechar = *ptr;
+      uint8_t i = ustrlen(nameptr)-4;
+      nameptr[i] = 0;
+
+    } else { /* ext == EXT_UNKNOWN or EXT_IS_TYPE but hiding disabled */
+      /* Unknown extension: PRG */
+      typechar = 'P';
+    }
+
+  notp00:
+    /* Set the file type */
+    switch (typechar) {
+    case 'P':
+      dent->typeflags = TYPE_PRG;
+      break;
+
+    case 'S':
+      dent->typeflags = TYPE_SEQ;
+      break;
+
+    case 'U':
+      dent->typeflags = TYPE_USR;
+      break;
+
+    case 'R':
+      dent->typeflags = TYPE_REL;
+      break;
+    }
+  }
+
+  /* Copy file name into dirent if it fits */
+  if (dent->opstype != OPSTYPE_FAT_X00) {
+    if (ustrlen(nameptr) > CBM_NAME_LENGTH) {
+      ustrcpy(dent->name, finfo.fname);
+    } else {
+      ustrcpy(dent->name, nameptr);
+    }
+
+    ptr = dent->name;
+    while (*ptr) {
+      if (*ptr == '~') *ptr = 0xff;
+      ptr++;
+    }
+  }
+
+  if (finfo.fsize > 16255746)
+    /* File too large -> size 63999 blocks */
+    dent->blocksize = 63999;
+  else
+    dent->blocksize = (finfo.fsize+253) / 254;
+
+  dent->remainder = finfo.fsize % 254;
+
+  /* Read-Only and hidden flags */
+  if (finfo.fattrib & AM_RDO)
+    dent->typeflags |= FLAG_RO;
+
+  if (finfo.fattrib & (AM_HID|AM_SYS))
+    dent->typeflags |= FLAG_HIDDEN;
+
+  /* Cluster number */
+  dent->pvt.fat.cluster = finfo.clust;
+
+  /* Date/Time */
+  dent->date.year  = (finfo.fdate >> 9) + 80;
+  dent->date.month = (finfo.fdate >> 5) & 0x0f;
+  dent->date.day   = finfo.fdate & 0x1f;
+
+  dent->date.hour   = finfo.ftime >> 11;
+  dent->date.minute = (finfo.ftime >> 5) & 0x3f;
+  dent->date.second = (finfo.ftime & 0x1f) << 1;
+
+  return 0;
+}
+
+/**
+ * fat_delete - Delete a file/directory on FAT
+ * @path: path to the file/directory
+ * @dent: pointer to cbmdirent with name of the file/directory to be deleted
+ *
+ * This function deletes the file filename in path and returns
+ * 0 if not found, 1 if deleted or 255 if an error occured.
+ */
+uint8_t fat_delete(path_t *path, cbmdirent_t *dent) {
+  FRESULT res;
+  uint8_t *name;
+
+  set_dirty_led(1);
+  if (dent->pvt.fat.realname[0]) {
+    name = dent->pvt.fat.realname;
+  } else {
+    name = dent->name;
+    pet2asc(name);
+  }
+  partition[path->part].fatfs.curr_dir = path->dir.fat;
+  res = f_unlink(&partition[path->part].fatfs, name);
+
+  update_leds();
+
+  parse_error(res,0);
+  if (res == FR_OK)
+    return 1;
+  else if (res == FR_NO_FILE)
+    return 0;
+  else
+    return 255;
+}
+
+/**
+ * fat_chdir - change directory in FAT and/or mount image
+ * @path: path object for the location of dirname
+ * @dent: Name of the directory/image to be changed into
+ *
+ * This function changes the directory of the path object to dirname.
+ * If dirname specifies a file with a known extension (e.g. M2I or D64), the
+ * current(!) directory will be changed to the directory of the file and
+ * it will be mounted as an image file. Returns 0 if successful,
+ * 1 otherwise.
+ */
+uint8_t fat_chdir(path_t *path, cbmdirent_t *dent) {
+  FRESULT res;
+
+  partition[path->part].fatfs.curr_dir = path->dir.fat;
+
+  /* Left arrow moves one directory up */
+  if (dent->name[0] == '_' && dent->name[1] == 0) {
+    FILINFO finfo;
+
+    entrybuf[0] = '.';
+    entrybuf[1] = '.';
+    entrybuf[2] = 0;
+
+    res = f_stat(&partition[path->part].fatfs, entrybuf, &finfo);
+    if (res != FR_OK) {
+      parse_error(res,1);
+      return 1;
+    }
+
+    dent->pvt.fat.cluster = finfo.clust;
+    dent->typeflags = TYPE_DIR;
+  } else if (dent->name[0] == 0) {
+    /* Empty string moves to the root dir */
+    path->dir.fat = 0;
+    return 0;
+  }
+
+  if ((dent->typeflags & TYPE_MASK) == TYPE_DIR) {
+    /* It's a directory, change to its cluster */
+    path->dir.fat = dent->pvt.fat.cluster;
+  } else {
+    /* Changing into a file, could be a mount request */
+    if (check_imageext(dent->pvt.fat.realname) != IMG_UNKNOWN) {
+      /* D64/M2I mount request */
+      free_multiple_buffers(FMB_USER_CLEAN);
+      /* Open image file */
+      res = f_open(&partition[path->part].fatfs,
+                   &partition[path->part].imagehandle,
+                   dent->pvt.fat.realname, FA_OPEN_EXISTING|FA_READ|FA_WRITE);
+
+      /* Try to open read-only if medium or file is read-only */
+      if (res == FR_DENIED || res == FR_WRITE_PROTECTED)
+        res = f_open(&partition[path->part].fatfs,
+                     &partition[path->part].imagehandle,
+                     dent->pvt.fat.realname, FA_OPEN_EXISTING|FA_READ);
+
+      if (res != FR_OK) {
+        parse_error(res,1);
+        return 1;
+      }
+
+      if (check_imageext(dent->pvt.fat.realname) == IMG_IS_M2I)
+        partition[path->part].fop = &m2iops;
+      else {
+        if (d64_mount(path))
+          return 1;
+        partition[path->part].fop = &d64ops;
+      }
+
+      return 0;
+    }
+  }
+  return 0;
+}
+
+/* Create a new directory */
+void fat_mkdir(path_t *path, uint8_t *dirname) {
+  FRESULT res;
+
+  partition[path->part].fatfs.curr_dir = path->dir.fat;
+  pet2asc(dirname);
+  res = f_mkdir(&partition[path->part].fatfs, dirname);
+  parse_error(res,0);
+}
+
+/**
+ * fat_getvolumename - Get the volume label
+ * @part : partition to request
+ * @label: pointer to the buffer for the label (16 characters+zero-termination)
+ *
+ * This function reads the FAT volume label and stores it zero-terminated
+ * in label. Returns 0 if successfull, != 0 if an error occured.
+ */
+static uint8_t fat_getvolumename(uint8_t part, uint8_t *label) {
+  DIR dh;
+  FILINFO finfo;
+  FRESULT res;
+  uint8_t i,j;
+
+  finfo.lfn = NULL;
+  memset(label, 0, CBM_NAME_LENGTH+1);
+
+  res = l_opendir(&partition[part].fatfs, 0, &dh);
+
+  if (res != FR_OK) {
+    parse_error(res,0);
+    return 1;
+  }
+
+  while ((res = f_readdir(&dh, &finfo)) == FR_OK) {
+    if (!finfo.fname[0]) break;
+    if ((finfo.fattrib & (AM_VOL|AM_SYS|AM_HID)) == AM_VOL) {
+      i=0;
+      j=0;
+      while (finfo.fname[i]) {
+        /* Skip dots */
+        if (finfo.fname[i] == '.') {
+          i++;
+          continue;
+        }
+        label[j++] = finfo.fname[i++];
+      }
+      return 0;
+    }
+  }
+  return 0;
+}
+
+/**
+ * fat_getdirlabel - Get the directory label
+ * @path : path object of the directory
+ * @label: pointer to the buffer for the label (16 characters)
+ *
+ * This function reads the FAT volume label (if in root directory) or FAT
+ * directory name (if not) and stored it space-padded
+ * in the first 16 bytes of label.
+ * Returns 0 if successfull, != 0 if an error occured.
+ */
+uint8_t fat_getdirlabel(path_t *path, uint8_t *label) {
+  DIR dh;
+  FILINFO finfo;
+  FRESULT res;
+  uint8_t *name = entrybuf;
+
+  finfo.lfn = entrybuf;
+  memset(label, ' ', CBM_NAME_LENGTH);
+
+  res = l_opendir(&partition[path->part].fatfs, path->dir.fat, &dh);
+  if (res != FR_OK)
+    goto gl_error;
+
+  while ((res = f_readdir(&dh, &finfo)) == FR_OK) {
+    if(finfo.fname[0] == '\0' || finfo.fname[0] != '.') {
+      res = fat_getvolumename(path->part, name);
+      break;
+    }
+    if(finfo.fname[0] == '.' && finfo.fname[1] == '.' && finfo.fname[2] == 0) {
+      if((res = l_opendir(&partition[path->part].fatfs,finfo.clust,&dh)) != FR_OK) // open .. dir.
+        break;
+      while ((res = f_readdir(&dh, &finfo)) == FR_OK) {
+        if(finfo.fname[0] == '\0')
+          break;
+        if (finfo.clust == path->dir.fat) {
+          if(!*name)
+            name = finfo.fname;
+          else
+            asc2pet(name);
+          break;
+        }
+      }
+      break;
+    }
+  }
+
+  if (*name)
+    memcpy(label, name, ustrlen(name));
+
+  if (res == FR_OK)
+    return 0;
+
+gl_error:
+  parse_error(res,0);
+  return 1;
+}
+
+/**
+ * fat_getid - "Read" a disk id
+ * @path: path object
+ * @id  : pointer to the buffer for the id (5 characters)
+ *
+ * This function creates a disk ID from the FAT type (12/16/32)
+ * and the usual " 2A" of a 1541 in the first 5 bytes of id.
+ * Always returns 0 for success.
+ */
+uint8_t fat_getid(path_t *path, uint8_t *id) {
+  switch (partition[path->part].fatfs.fs_type) {
+  case FS_FAT12:
+    *id++ = '1';
+    *id++ = '2';
+    break;
+
+  case FS_FAT16:
+    *id++ = '1';
+    *id++ = '6';
+    break;
+
+  case FS_FAT32:
+    *id++ = '3';
+    *id++ = '2';
+    break;
+  }
+
+  *id++ = ' ';
+  *id++ = '2';
+  *id++ = 'A';
+  return 0;
+}
+
+/* Returns the number of free blocks */
+uint16_t fat_freeblocks(uint8_t part) {
+  FATFS *fs = &partition[part].fatfs;
+  DWORD clusters;
+
+  if (!(globalflags & FAT32_FREEBLOCKS) &&
+      fs->fs_type == FS_FAT32)
+    return 1;
+
+  if (l_getfree(fs, NULLSTRING, &clusters, 65535) == FR_OK) {
+    if (clusters > 65535)
+      return 65535;
+    else
+      return clusters;
+  } else
+    return 0;
+}
+
+/* Dummy function for direct sector access */
+/* FIXME: Read/Write a file "BOOT.BIN" in the currect directory */
+/*        (e.g. for the C128 boot sector)                       */
+void fat_sectordummy(buffer_t *buf, uint8_t part, uint8_t track, uint8_t sector) {
+  set_error_ts(ERROR_READ_NOHEADER,track,sector);
+}
+
+/**
+ * fat_rename - rename a file
+ * @path   : path object
+ * @dent   : pointer to cbmdirent with old file name
+ * @newname: new file name
+ *
+ * This function renames the file in dent in the directory referenced by
+ * path to newname.
+ */
+void fat_rename(path_t *path, cbmdirent_t *dent, uint8_t *newname) {
+  uint8_t *ext;
+  FRESULT res;
+  UINT byteswritten;
+
+  partition[path->part].fatfs.curr_dir = path->dir.fat;
+
+  if (dent->opstype == OPSTYPE_FAT_X00) {
+    /* [PSUR]00 rename, just change the internal file name */
+    res = f_open(&partition[path->part].fatfs, &partition[path->part].imagehandle, dent->pvt.fat.realname, FA_WRITE|FA_OPEN_EXISTING);
+    if (res != FR_OK) {
+      parse_error(res,0);
+      return;
+    }
+
+    res = f_lseek(&partition[path->part].imagehandle, P00_CBMNAME_OFFSET);
+    if (res != FR_OK) {
+      parse_error(res,0);
+      return;
+    }
+
+    /* Copy the new name into dent->name so we can overwrite all 16 bytes */
+    memset(dent->name, 0, CBM_NAME_LENGTH);
+    ustrcpy(dent->name, newname);
+
+    res = f_write(&partition[path->part].imagehandle, dent->name, CBM_NAME_LENGTH, &byteswritten);
+    if (res != FR_OK || byteswritten != CBM_NAME_LENGTH) {
+      parse_error(res,0);
+      return;
+    }
+
+    res = f_close(&partition[path->part].imagehandle);
+    if (res != FR_OK) {
+      parse_error(res,0);
+      return;
+    }
+  } else {
+    switch (check_extension(dent->pvt.fat.realname, &ext)) {
+    case EXT_IS_TYPE:
+      /* Keep type extension */
+      ustrcpy(entrybuf, newname);
+      build_name(entrybuf, dent->typeflags & TYPE_MASK);
+      res = f_rename(&partition[path->part].fatfs, dent->pvt.fat.realname, entrybuf);
+      if (res != FR_OK)
+        parse_error(res, 0);
+      break;
+
+    default:
+      /* Normal rename */
+      pet2asc(dent->name);
+      pet2asc(newname);
+      res = f_rename(&partition[path->part].fatfs, dent->name, newname);
+      if (res != FR_OK)
+        parse_error(res, 0);
+      break;
+    }
+  }
+}
+
+/**
+ * fatops_init - Initialize fatops module
+ * @preserve_path: Preserve the current directory if non-zero
+ *
+ * This function will initialize the fatops module and force
+ * mounting of the card. It can safely be called again if re-mounting
+ * is required.
+ */
+void fatops_init(uint8_t preserve_path) {
+  FRESULT res;
+  uint8_t realdrive,drive,part;
+
+  max_part = 0;
+  drive = 0;
+  part = 0;
+  while (max_part < CONFIG_MAX_PARTITIONS && drive < MAX_DRIVES) {
+    partition[max_part].fop = &fatops;
+
+    /* Map drive numbers in just one place */
+    realdrive = map_drive(drive);
+    res=f_mount((realdrive * 16) + part, &partition[max_part].fatfs);
+
+    if (!preserve_path)
+      partition[max_part].current_dir.fat = 0;
+
+    if (res == FR_OK)
+      max_part++;
+
+    if (res != FR_NOT_READY && res != FR_INVALID_OBJECT && part < 15 &&
+        /* Don't try to mount partitions on an unpartitioned medium */
+        !(res == FR_OK && part == 0))
+      /* Try all partitions */
+      part++;
+    else {
+      /* End of extended partition chain, try next drive */
+      part = 0;
+      drive++;
+    }
+  }
+
+  if (!preserve_path) {
+    current_part = 0;
+    display_current_part(0);
+    set_changelist(NULL, NULLSTRING);
+  }
+
+  /* Remove BAM buffer */
+  free_buffer(bam_buffer);
+  bam_buffer = NULL;
+
+#ifndef HAVE_HOTPLUG
+  if (!max_part) {
+    set_error_ts(ERROR_DRIVE_NOT_READY,0,0);
+    return;
+  }
+#endif
+}
+
+/**
+ * image_unmount - generic unmounting function for images
+ * @part: partition number
+ *
+ * This function will clear all buffers, close the image file and
+ * restore file operations to fatops. It can be used for unmounting
+ * any image file types that don't require special cleanups.
+ * Returns 0 if successful, 1 otherwise.
+ */
+uint8_t image_unmount(uint8_t part) {
+  FRESULT res;
+  buffer_t *buf;
+
+  free_multiple_buffers(FMB_USER_CLEAN);
+
+  /* Free the BAM buffer if this was the last D64 */
+  // FIXME: Move to d64ops.c/d64_unmount
+  if (partition[part].fop == &d64ops) {
+    buf = find_buffer(BUFFER_SYS_BAM);
+    if (buf) {
+      buf->cleanup(buf);
+      if (--buf->pvt.bam.refcount) {
+        /* Invalidate the BAM buffer contents */
+        buf->pvt.bam.part = 255;
+      } else {
+        /* Last image unmounted */
+        free_buffer(buf);
+        bam_buffer = NULL;
+      }
+    }
+  }
+
+  if (display_found) {
+    /* Send current path to display */
+    path_t path;
+
+    path.part    = part;
+    path.dir.fat = partition[part].current_dir.fat;
+    fat_getdirlabel(&path, entrybuf);
+    display_current_directory(part,entrybuf);
+  }
+
+  partition[part].fop = &fatops;
+  res = f_close(&partition[part].imagehandle);
+  if (res != FR_OK) {
+    parse_error(res,0);
+    return 1;
+  }
+  return 0;
+}
+
+/**
+ * image_chdir - generic chdir for image files
+ * @path: path object of the location of dirname
+ * @dent: directory to be changed into
+ *
+ * This function will ignore any names except _ (left arrow)
+ * and unmount the image if that is found. It can be used as
+ * chdir for all image types that don't support subdirectories
+ * themselves. Returns 0 if successful, 1 otherwise.
+ */
+uint8_t image_chdir(path_t *path, cbmdirent_t *dent) {
+  if (dent->name[0] == '_' && dent->name[1] == 0) {
+    /* Unmount request */
+    return image_unmount(path->part);
+  }
+  return 1;
+}
+
+/**
+ * image_mkdir - generic mkdir for image files
+ * @path   : path of the directory
+ * @dirname: name of the directory to be created
+ *
+ * This function does nothing.
+ */
+void image_mkdir(path_t *path, uint8_t *dirname) {
+  set_error(ERROR_SYNTAX_UNABLE);
+  return;
+}
+
+/**
+ * image_read - Seek to a specified image offset and read data
+ * @part  : partition number
+ * @offset: offset to be seeked to
+ * @buffer: pointer to where the data should be read to
+ * @bytes : number of bytes to read from the image file
+ *
+ * This function seeks to offset in the image file and reads bytes
+ * byte into buffer. It returns 0 on success, 1 if less than
+ * bytes byte could be read and 2 on failure.
+ */
+uint8_t image_read(uint8_t part, DWORD offset, void *buffer, uint16_t bytes) {
+  FRESULT res;
+  UINT bytesread;
+
+  if (offset != -1) {
+    res = f_lseek(&partition[part].imagehandle, offset);
+    if (res != FR_OK) {
+      parse_error(res,1);
+      return 2;
+    }
+  }
+
+  res = f_read(&partition[part].imagehandle, buffer, bytes, &bytesread);
+  if (res != FR_OK) {
+    parse_error(res,1);
+    return 2;
+  }
+
+  if (bytesread != bytes)
+    return 1;
+
+  return 0;
+}
+
+/**
+ * image_write - Seek to a specified image offset and write data
+ * @part  : partition number
+ * @offset: offset to be seeked to
+ * @buffer: pointer to the data to be written
+ * @bytes : number of bytes to read from the image file
+ * @flush : Flags if written data should be flushed to disk immediately
+ *
+ * This function seeks to offset in the image file and writes bytes
+ * byte into buffer. It returns 0 on success, 1 if less than
+ * bytes byte could be written and 2 on failure.
+ */
+uint8_t image_write(uint8_t part, DWORD offset, void *buffer, uint16_t bytes, uint8_t flush) {
+  FRESULT res;
+  UINT byteswritten;
+
+  if (offset != -1) {
+    res = f_lseek(&partition[part].imagehandle, offset);
+    if (res != FR_OK) {
+      parse_error(res,0);
+      return 2;
+    }
+  }
+
+  res = f_write(&partition[part].imagehandle, buffer, bytes, &byteswritten);
+  if (res != FR_OK) {
+    parse_error(res,1);
+    return 2;
+  }
+
+  if (byteswritten != bytes)
+    return 1;
+
+  if (flush)
+    f_sync(&partition[part].imagehandle);
+
+  return 0;
+}
+
+/* Dummy function for format */
+void format_dummy(uint8_t drive, uint8_t *name, uint8_t *id) {
+  set_error(ERROR_SYNTAX_UNKNOWN);
+}
+
+const PROGMEM fileops_t fatops = {  // These should be at bottom, to be consistent with d64ops and m2iops
+  &fat_open_read,
+  &fat_open_write,
+  &fat_open_rel,
+  &fat_delete,
+  &fat_getvolumename,
+  &fat_getdirlabel,
+  &fat_getid,
+  &fat_freeblocks,
+  &fat_sectordummy,
+  &fat_sectordummy,
+  &format_dummy,
+  &fat_opendir,
+  &fat_readdir,
+  &fat_mkdir,
+  &fat_chdir,
+  &fat_rename
+};
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fatops.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fatops.h
new file mode 100644
index 00000000..7ae609b2
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fatops.h
@@ -0,0 +1,65 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   fatops.h: Definitions for the FAT operations
+
+*/
+
+#ifndef FATOPS_H
+#define FATOPS_H
+
+#include "buffers.h"
+#include "dirent.h"
+#include "wrapops.h"
+#include "ff.h"
+
+/* API */
+void     fatops_init(uint8_t preserve_dir);
+void     parse_error(FRESULT res, uint8_t readflag);
+uint8_t  fat_delete(path_t *path, cbmdirent_t *dent);
+uint8_t  fat_chdir(path_t *path, cbmdirent_t *dent);
+void     fat_mkdir(path_t *path, uint8_t *dirname);
+void     fat_open_read(path_t *path, cbmdirent_t *filename, buffer_t *buf);
+void     fat_open_write(path_t *path, cbmdirent_t *filename, uint8_t type, buffer_t *buf, uint8_t append);
+uint8_t  fat_getdirlabel(path_t *path, uint8_t *label);
+uint8_t  fat_getid(path_t *path, uint8_t *id);
+uint16_t fat_freeblocks(uint8_t part);
+uint8_t  fat_opendir(dh_t *dh, path_t *dir);
+int8_t   fat_readdir(dh_t *dh, cbmdirent_t *dent);
+void     fat_sectordummy(buffer_t *buf, uint8_t part, uint8_t track, uint8_t sector);
+void     format_dummy(uint8_t drive, uint8_t *name, uint8_t *id);
+
+extern const fileops_t fatops;
+extern uint8_t file_extension_mode;
+
+/* Generic helpers */
+uint8_t image_unmount(uint8_t part);
+uint8_t image_chdir(path_t *path, cbmdirent_t *dent);
+void    image_mkdir(path_t *path, uint8_t *dirname);
+uint8_t image_read(uint8_t part, DWORD offset, void *buffer, uint16_t bytes);
+uint8_t image_write(uint8_t part, DWORD offset, void *buffer, uint16_t bytes, uint8_t flush);
+
+typedef enum { IMG_UNKNOWN, IMG_IS_M2I, IMG_IS_DISK } imgtype_t;
+
+imgtype_t check_imageext(uint8_t *name);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/ff.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/ff.c
new file mode 100644
index 00000000..2c953280
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/ff.c
@@ -0,0 +1,3040 @@
+/*----------------------------------------------------------------------------/
+/  FatFs - FAT file system module  R0.06                     (C)ChaN, 2008
+/-----------------------------------------------------------------------------/
+/ The FatFs module is an experimenal project to implement FAT file system to
+/ cheap microcontrollers. This is a free software and is opened for education,
+/ research and development under license policy of following trems.
+/
+/  Copyright (C) 2008, ChaN, all right reserved.
+/
+/ * The FatFs module is a free software and there is no warranty.
+/ * You can use, modify and/or redistribute it for personal, non-profit or
+/ * commercial use without restriction under your responsibility.
+/ * Redistributions of source code must retain the above copyright notice.
+/
+/---------------------------------------------------------------------------/
+/  Feb 26, 2006  R0.00  Prototype.
+/
+/  Apr 29, 2006  R0.01  First stable version.
+/
+/  Jun 01, 2006  R0.02  Added FAT12 support.
+/                       Removed unbuffered mode.
+/                       Fixed a problem on small (<32M) patition.
+/  Jun 10, 2006  R0.02a Added a configuration option (_FS_MINIMUM).
+/
+/  Sep 22, 2006  R0.03  Added f_rename().
+/                       Changed option _FS_MINIMUM to _FS_MINIMIZE.
+/  Dec 11, 2006  R0.03a Improved cluster scan algolithm to write files fast.
+/                       Fixed f_mkdir() creates incorrect directory on FAT32.
+/
+/  Feb 04, 2007  R0.04  Supported multiple drive system.
+/                       Changed some interfaces for multiple drive system.
+/                       Changed f_mountdrv() to f_mount().
+/                       Added f_mkfs().
+/  Apr 01, 2007  R0.04a Supported multiple partitions on a plysical drive.
+/                       Added a capability of extending file size to f_lseek().
+/                       Added minimization level 3.
+/                       Fixed an endian sensitive code in f_mkfs().
+/  May 05, 2007  R0.04b Added a configuration option _USE_NTFLAG.
+/                       Added FSInfo support.
+/                       Fixed DBCS name can result FR_INVALID_NAME.
+/                       Fixed short seek (<= csize) collapses the file object.
+/
+/  Aug 25, 2007  R0.05  Changed arguments of f_read(), f_write() and f_mkfs().
+/                       Fixed f_mkfs() on FAT32 creates incorrect FSInfo.
+/                       Fixed f_mkdir() on FAT32 creates incorrect directory.
+/  Feb 03, 2008  R0.05a Added f_truncate() and f_utime().
+/                       Fixed off by one error at FAT sub-type determination.
+/                       Fixed btr in f_read() can be mistruncated.
+/                       Fixed cached sector is not flushed when create and close
+/                       without write.
+/
+/  Apr 01, 2008 R0.06   Added fputc(), fputs(), fprintf() and fgets().
+/                       Improved performance of f_lseek() on moving to the same
+/                       or following cluster.
+/---------------------------------------------------------------------------*/
+
+#include <avr/pgmspace.h>
+#include <string.h>
+#include "config.h"
+#include "ff.h"         /* FatFs declarations */
+#include "diskio.h"     /* Include file for user provided disk functions */
+
+
+/*--------------------------------------------------------------------------
+
+   Module Private Functions
+
+---------------------------------------------------------------------------*/
+#if _USE_DRIVE_PREFIX != 0
+static
+FATFS *FatFs[_LOGICAL_DRIVES];  /* Pointer to the file system objects (logical drives) */
+#endif
+//static
+//WORD fsid;              /* File system mount ID */
+
+#if _USE_LFN!=0
+static const PROGMEM
+BYTE LFN_pos[13]={1,3,5,7,9,14,16,18,20,22,24,28,30};
+#endif
+
+#if _USE_1_BUF != 0
+# define FSBUF static_buf
+static
+BUF static_buf;
+#else
+# define FSBUF (fs->buf)
+#endif
+
+#if _USE_FS_BUF != 0
+# define FPBUF FSBUF
+#else
+# define FPBUF (fp->buf)
+#endif
+
+/*-----------------------------------------------------------------------*/
+/* Change window offset                                                  */
+/*-----------------------------------------------------------------------*/
+
+static
+BOOL move_window (      /* TRUE: successful, FALSE: failed */
+  FATFS *fs,            /* File system object */
+  BUF *buf,
+  DWORD sector          /* Sector number to make apperance in the fs->buf.data[] */
+)                       /* Move to zero only writes back dirty window */
+{
+  DWORD wsect;
+#if _USE_1_BUF != 0
+  FATFS* ofs = buf->fs;
+#else
+#define ofs fs
+#endif
+
+
+  wsect = buf->sect;
+#if _USE_1_BUF != 0
+  if (wsect != sector || fs != ofs) {   /* Changed current window */
+#else
+  if (wsect != sector) {                /* Changed current window */
+#endif
+#if !_FS_READONLY
+    BYTE n;
+    if (buf->dirty) {                   /* Write back dirty window if needed */
+      if (disk_write(ofs->drive, buf->data, wsect, 1) != RES_OK)
+        return FALSE;
+      buf->dirty = FALSE;
+      if (wsect < (ofs->fatbase + ofs->sects_fat)) {  /* In FAT area */
+        for (n = ofs->n_fats; n >= 2; n--) {          /* Reflect the change to FAT copy */
+          wsect += ofs->sects_fat;
+          disk_write(ofs->drive, buf->data, wsect, 1);
+        }
+      }
+    }
+#endif
+    if (sector) {
+      if (disk_read(fs->drive, buf->data, sector, 1) != RES_OK)
+        return FALSE;
+      buf->sect = sector;
+#if _USE_1_BUF != 0
+      buf->fs=fs;
+#endif
+    }
+  }
+  return TRUE;
+}
+
+
+
+
+static
+BOOL move_fs_window(
+  FATFS* fs,
+  DWORD  sector
+)
+{
+  return move_window(fs,&FSBUF,sector);
+}
+
+
+
+
+static
+BOOL move_fp_window(
+  FIL* fp,
+  DWORD  sector
+)
+{
+  return move_window(fp->fs,&FPBUF,sector);
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Clean-up cached data                                                  */
+/*-----------------------------------------------------------------------*/
+
+#if !_FS_READONLY
+static
+FRESULT sync (          /* FR_OK: successful, FR_RW_ERROR: failed */
+  FATFS *fs             /* File system object */
+)
+{
+  FSBUF.dirty = TRUE;
+  if (!move_fs_window(fs, 0)) return FR_RW_ERROR;
+#if _USE_FSINFO
+  /* Update FSInfo sector if needed */
+  if (fs->fs_type == FS_FAT32 && fs->fsi_flag) {
+    FSBUF.sect = 0;
+    memset(FSBUF.data, 0, 512);
+    ST_WORD(&FSBUF.data[BS_55AA], 0xAA55);
+    ST_DWORD(&FSBUF.data[FSI_LeadSig], 0x41615252);
+    ST_DWORD(&FSBUF.data[FSI_StrucSig], 0x61417272);
+    ST_DWORD(&FSBUF.data[FSI_Free_Count], fs->free_clust);
+    ST_DWORD(&FSBUF.data[FSI_Nxt_Free], fs->last_clust);
+    disk_write(fs->drive, FSBUF.data, fs->fsi_sector, 1);
+    fs->fsi_flag = 0;
+  }
+#endif
+  /* Make sure that no pending write process in the physical drive */
+  if (disk_ioctl(fs->drive, CTRL_SYNC, NULL) != RES_OK)
+    return FR_RW_ERROR;
+  return FR_OK;
+}
+#endif
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Get a cluster status                                                  */
+/*-----------------------------------------------------------------------*/
+
+static
+DWORD get_cluster (     /* 0,>=2: successful, 1: failed */
+  FATFS *fs,            /* File system object */
+  DWORD clust           /* Cluster# to get the link information */
+)
+{
+  WORD wc, bc;
+  DWORD fatsect;
+
+
+  if (clust >= 2 && clust < fs->max_clust) {        /* Is it a valid cluster#? */
+    fatsect = fs->fatbase;
+    switch (fs->fs_type) {
+    case FS_FAT12 :
+      bc = (WORD)clust * 3 / 2;
+      if (!move_fs_window(fs, fatsect + (bc / SS(fs)))) break;
+      wc = FSBUF.data[bc & (SS(fs) - 1)]; bc++;
+      if (!move_fs_window(fs, fatsect + (bc / SS(fs)))) break;
+      wc |= (WORD)FSBUF.data[bc & (SS(fs) - 1)] << 8;
+      return (clust & 1) ? (wc >> 4) : (wc & 0xFFF);
+
+    case FS_FAT16 :
+      if (!move_fs_window(fs, fatsect + (clust / (SS(fs) / 2)))) break;
+      return LD_WORD(&FSBUF.data[((WORD)clust * 2) & (SS(fs) - 1)]);
+
+    case FS_FAT32 :
+      if (!move_fs_window(fs, fatsect + (clust / (SS(fs) / 4)))) break;
+      return LD_DWORD(&FSBUF.data[((WORD)clust * 4) & (SS(fs) - 1)]) & 0x0FFFFFFF;
+    }
+  }
+
+  return 1; /* Out of cluster range, or an error occured */
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Change a cluster status                                               */
+/*-----------------------------------------------------------------------*/
+
+#if !_FS_READONLY
+static
+BOOL put_cluster (      /* TRUE: successful, FALSE: failed */
+  FATFS *fs,            /* File system object */
+  DWORD clust,          /* Cluster# to change  (must be 2 to fs->max_clust-1) */
+  DWORD val             /* New value to mark the cluster */
+)
+{
+  WORD bc;
+  BYTE *p;
+  DWORD fatsect;
+
+
+  fatsect = fs->fatbase;
+  switch (fs->fs_type) {
+  case FS_FAT12 :
+    bc = (WORD)clust * 3 / 2;
+    if (!move_fs_window(fs, fatsect + (bc / SS(fs)))) return FALSE;
+    p = &FSBUF.data[bc & (SS(fs) - 1)];
+    *p = (clust & 1) ? ((*p & 0x0F) | ((BYTE)val << 4)) : (BYTE)val;
+    bc++;
+    FSBUF.dirty = TRUE;
+    if (!move_fs_window(fs, fatsect + (bc / SS(fs)))) return FALSE;
+    p = &FSBUF.data[bc & (SS(fs) - 1)];
+    *p = (clust & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F));
+    break;
+
+  case FS_FAT16 :
+    if (!move_fs_window(fs, fatsect + (clust / (SS(fs) / 2)))) return FALSE;
+    ST_WORD(&FSBUF.data[((WORD)clust * 2) & (SS(fs) - 1)], (WORD)val);
+    break;
+
+  case FS_FAT32 :
+    if (!move_fs_window(fs, fatsect + (clust / (SS(fs) / 4)))) return FALSE;
+    ST_DWORD(&FSBUF.data[((WORD)clust * 4) & (SS(fs) - 1)], val);
+    break;
+
+  default :
+    return FALSE;
+  }
+  FSBUF.dirty = TRUE;
+  return TRUE;
+}
+#endif /* !_FS_READONLY */
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Remove a cluster chain                                                */
+/*-----------------------------------------------------------------------*/
+
+#if !_FS_READONLY
+static
+BOOL remove_chain (     /* TRUE: successful, FALSE: failed */
+  FATFS *fs,            /* File system object */
+  DWORD clust           /* Cluster# to remove chain from */
+)
+{
+  DWORD nxt;
+
+
+  while (clust >= 2 && clust < fs->max_clust) {
+    nxt = get_cluster(fs, clust);
+    if (nxt == 1) return FALSE;
+    if (!put_cluster(fs, clust, 0)) return FALSE;
+    if (fs->free_clust != 0xFFFFFFFF) {
+      fs->free_clust++;
+#if _USE_FSINFO
+      fs->fsi_flag = 1;
+#endif
+    }
+    clust = nxt;
+  }
+  return TRUE;
+}
+#endif
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Stretch or create a cluster chain                                     */
+/*-----------------------------------------------------------------------*/
+
+#if !_FS_READONLY
+static
+DWORD create_chain (    /* 0: No free cluster, 1: Error, >=2: New cluster number */
+  FATFS *fs,            /* File system object */
+  DWORD clust           /* Cluster# to stretch, 0 means create new */
+)
+{
+  DWORD cstat, ncl, scl, mcl = fs->max_clust;
+
+
+  if (clust == 0) {                       /* Create new chain */
+    scl = fs->last_clust;                 /* Get suggested start point */
+    if (scl == 0 || scl >= mcl) scl = 1;
+  }
+  else {                                  /* Stretch existing chain */
+    cstat = get_cluster(fs, clust);       /* Check the cluster status */
+    if (cstat < 2) return 1;              /* It is an invalid cluster */
+    if (cstat < mcl) return cstat;        /* It is already followed by next cluster */
+    scl = clust;
+  }
+
+  ncl = scl;                              /* Start cluster */
+  for (;;) {
+    ncl++;                                /* Next cluster */
+    if (ncl >= mcl) {                     /* Wrap around */
+      ncl = 2;
+      if (ncl > scl) return 0;            /* No free custer */
+    }
+    cstat = get_cluster(fs, ncl);         /* Get the cluster status */
+    if (cstat == 0) break;                /* Found a free cluster */
+    if (cstat == 1) return 1;             /* Any error occured */
+    if (ncl == scl) return 0;             /* No free custer */
+  }
+
+  if (!put_cluster(fs, ncl, 0x0FFFFFFF)) return 1;      /* Mark the new cluster "in use" */
+  if (clust && !put_cluster(fs, clust, ncl)) return 1;  /* Link it to previous one if needed */
+
+  fs->last_clust = ncl;                   /* Update fsinfo */
+  if (fs->free_clust != 0xFFFFFFFF) {
+    fs->free_clust--;
+#if _USE_FSINFO
+    fs->fsi_flag = 1;
+#endif
+  }
+
+  return ncl;   /* Return new cluster number */
+}
+#endif /* !_FS_READONLY */
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Get sector# from cluster#                                             */
+/*-----------------------------------------------------------------------*/
+
+static
+DWORD clust2sect (      /* !=0: sector number, 0: failed - invalid cluster# */
+  FATFS *fs,            /* File system object */
+  DWORD clust           /* Cluster# to be converted */
+)
+{
+  clust -= 2;
+  if (clust >= (fs->max_clust - 2)) return 0;       /* Invalid cluster# */
+  return clust * fs->csize + fs->database;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Move directory pointer to next                                        */
+/*-----------------------------------------------------------------------*/
+
+static
+BOOL next_dir_entry (   /* TRUE: successful, FALSE: could not move next */
+  DIR *dj               /* Pointer to directory object */
+)
+{
+  DWORD clust;
+  WORD idx;
+
+
+  idx = dj->index + 1;
+  if ((idx & ((SS(dj->fs) - 1) / 32)) == 0) {        /* Table sector changed? */
+    dj->sect++;                                      /* Next sector */
+    if (dj->clust == 0) {                            /* In static table */
+      if (idx >= dj->fs->n_rootdir) return FALSE;    /* Reached to end of table */
+    } else {                                         /* In dynamic table */
+      if (((idx / (SS(dj->fs) / 32)) & (dj->fs->csize - 1)) == 0) {  /* Cluster changed? */
+        clust = get_cluster(dj->fs, dj->clust);      /* Get next cluster */
+        if (clust < 2 || clust >= dj->fs->max_clust) /* Reached to end of table */
+          return FALSE;
+        dj->clust = clust;                           /* Initialize for new cluster */
+        dj->sect = clust2sect(dj->fs, clust);
+      }
+    }
+  }
+  dj->index = idx;  /* Lower several bits of dj->index indicates offset in dj->sect */
+  return TRUE;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Get file status from directory entry                                  */
+/*-----------------------------------------------------------------------*/
+
+#if _FS_MINIMIZE <= 1
+static
+void get_fileinfo (     /* No return code */
+  FILINFO *finfo,       /* Ptr to store the file information */
+  const BYTE *dir       /* Ptr to the directory entry */
+)
+{
+  BYTE n, c, a;
+  UCHAR *p;
+
+
+  p = &finfo->fname[0];
+  a = _USE_NTFLAG ? dir[DIR_NTres] : 0;   /* NT flag */
+  for (n = 0; n < 8; n++) {   /* Convert file name (body) */
+    c = dir[n];
+    if (c == ' ') break;
+    if (c == 0x05) c = 0xE5;
+    if (a & 0x08 && c >= 'A' && c <= 'Z') c += 0x20;
+    *p++ = c;
+  }
+  if (dir[8] != ' ') {        /* Convert file name (extension) */
+    *p++ = '.';
+    for (n = 8; n < 11; n++) {
+      c = dir[n];
+      if (c == ' ') break;
+      if (a & 0x10 && c >= 'A' && c <= 'Z') c += 0x20;
+      *p++ = c;
+    }
+  }
+  *p = '\0';
+
+  finfo->fattrib = dir[DIR_Attr];               /* Attribute */
+  finfo->fsize = LD_DWORD(&dir[DIR_FileSize]);  /* Size */
+  finfo->fdate = LD_WORD(&dir[DIR_WrtDate]);    /* Date */
+  finfo->ftime = LD_WORD(&dir[DIR_WrtTime]);    /* Time */
+  finfo->clust = ((DWORD)LD_WORD(&dir[DIR_FstClusHI]) << 16)
+    | LD_WORD(&dir[DIR_FstClusLO]);            /* Get cluster# */
+}
+#endif /* _FS_MINIMIZE <= 1 */
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Pick a paragraph and create the name in format of directory entry     */
+/*-----------------------------------------------------------------------*/
+
+static
+UCHAR make_dirfile (     /* 1: error - detected an invalid format, '\0'or'/': next character */
+  const UCHAR **path,    /* Pointer to the file path pointer */
+  UCHAR *dirname,        /* Pointer to directory name buffer {Name(8), Ext(3), NT flag(1)} */
+  BOOL* lfn              /* is this an LFN name? */
+)
+{
+  BYTE n, t, c, a, b;
+
+
+  *lfn=FALSE;
+  memset(dirname, ' ', 8+3);  /* Fill buffer with spaces */
+  a = 0; b = 0x18;            /* NT flag */
+  n = 0; t = 8;
+  for (;;) {
+    c = *(*path)++;
+    if (c == '\0' || c == '/') {           /* Reached to end of str or directory separator */
+      if (n == 0) break;
+      dirname[11] = _USE_NTFLAG ? (a & b) : 0;
+      return c;
+    }
+    if (c < ' ' || c == 0x7F) break;       /* Reject invisible chars */
+    if (c == ' ') goto md_l3;
+    if (c == '.') {
+#if _USE_CHDIR != 0 || _USE_CURR_DIR != 0
+      if (n == 0 || (n == 1 && *dirname == '.'))
+        goto md_l2;
+#endif
+      if (!(a & 1) && n >= 1 && n <= 8) {  /* Enter extension part */
+        n = 8; t = 11; continue;
+      }
+      goto md_l3;
+    }
+    if (_USE_SJIS &&
+      ((c >= 0x81 && c <= 0x9F) ||         /* Accept S-JIS code */
+        (c >= 0xE0 && c <= 0xFC))) {
+      if (n == 0 && c == 0xE5)             /* Change heading \xE5 to \x05 */
+        c = 0x05;
+      a ^= 0x01; goto md_l2;
+    }
+    if (c == '"') break;                   /* Reject " */
+    if (c <= ')') goto md_l1;              /* Accept ! # $ % & ' ( ) */
+    if (c <= ',') goto md_l3;              /* Reject * + , */
+    if (c <= '9') goto md_l1;              /* Accept - 0-9 */
+    if (c <= '?') goto md_l3;              /* Reject : ; < = > ? */
+    if (!(a & 1)) {     /* These checks are not applied to S-JIS 2nd byte */
+      if (c == '|') goto md_l3;            /* Reject | */
+      if (c >= '[' && c <= ']') goto md_l3;/* Reject [ \ ] */
+      if (_USE_NTFLAG && c >= 'A' && c <= 'Z')
+        (t == 8) ? (b &= (BYTE)~0x08) : (b &= (BYTE)~0x10);
+      if (c >= 'a' && c <= 'z') {          /* Convert to upper case */
+        c -= 0x20;
+        if (_USE_NTFLAG) (t == 8) ? (a |= 0x08) : (a |= 0x10);
+      }
+    }
+  md_l1:
+    a &= (BYTE)~0x01;
+  md_l2:
+    if (n >= t) goto md_l3;
+    dirname[n++] = c;
+  }
+  return 1;
+  md_l3:
+#if _USE_LFN != 0
+  do {
+    if(c== '\\' || c==':' || c=='*' || c=='?' || c == '"' || c == '<' || c == '>' || c=='|')
+      return 1;
+    c = *(*path)++;
+  } while (c != '\0' && c != '/');     /* Reached to end of str or directory separator */
+  *lfn=TRUE;
+  return c;
+#else
+  return 1;
+#endif
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Trace a file path                                                     */
+/*-----------------------------------------------------------------------*/
+
+static
+FRESULT trace_path (     /* FR_OK(0): successful, !=0: error code */
+  DIR *dj,               /* Pointer to directory object to return last directory */
+  UCHAR *fn,             /* Pointer to last segment name to return {file(8),ext(3),attr(1)} */
+  const UCHAR *path,     /* Full-path string to trace a file or directory */
+  BYTE **dir             /* Pointer to pointer to found entry to return */
+#if _USE_LFN != 0
+  ,DIR *fileobj,         /* Pointer DIR holding the beginning of the LFN, identical to dj if none */
+  const UCHAR** spath,   /* path to start of last item's name */
+  UINT *len              /* length of LFN entry, 0=non-LFN */
+#endif
+)
+{
+  DWORD clust;
+  UCHAR ds;
+  BYTE *dptr = NULL;
+  FATFS *fs = dj->fs;
+  BOOL lfn;
+#if _USE_LFN != 0
+  BYTE a,b,i,j;
+  BOOL match;
+  UINT l;
+  BOOL store=TRUE;
+#endif
+
+  /* Initialize directory object */
+#if _USE_CHDIR != 0 || _USE_CURR_DIR != 0
+  if(fs->curr_dir==0 || (*path!=0 && path[0]=='/')) {
+#endif
+    clust = fs->dirbase;
+    if (fs->fs_type == FS_FAT32) {
+      dj->clust = dj->sclust = clust;
+      dj->sect = clust2sect(fs, clust);
+    } else {
+      dj->clust = dj->sclust = 0;
+      dj->sect = clust;
+    }
+#if _USE_CHDIR != 0 || _USE_CURR_DIR !=0
+  } else {
+    clust=fs->curr_dir;
+    dj->clust = dj->sclust = clust;
+    dj->sect = clust2sect(fs, clust);
+  }
+#endif
+  dj->index = 0;
+
+#if _USE_LFN != 0
+  //fileobj->id=dj->id;
+  fileobj->fs=dj->fs;
+#endif
+
+#if _USE_CHDIR != 0
+  while (path[0] == '/') path++;
+#endif
+
+  if (*path == '\0') {          /* Null path means the root directory */
+    *dir = NULL; return FR_OK;
+  }
+
+  for (;;) {
+#if _USE_LFN != 0
+    *spath=path;     // save this off, as we may need it for the LFN
+    match=TRUE;
+    l=0;
+#endif
+    ds = make_dirfile(&path, fn, &lfn);     /* Get a paragraph into fn[] */
+#if _USE_LFN != 0
+    if(lfn)
+      *len=path-*spath-1; /* this might not be ANSI-compatible, not sure */
+    else
+      *len=0;
+#endif
+    if (ds == 1) return FR_INVALID_NAME;
+    for (;;) {
+      if (!move_fs_window(fs, dj->sect)) return FR_RW_ERROR;
+#if _USE_LFN != 0
+      if (store) {
+        fileobj->clust = dj->clust;
+        fileobj->sect  = dj->sect;
+        fileobj->index = dj->index;
+        store = FALSE;
+        if (!lfn)
+          /* We don't know the length of the LFN, estimate it */
+          *len = 0;
+      }
+#endif
+      dptr = &FSBUF.data[(dj->index & ((SS(fs) - 1) / 32)) * 32];  /* Pointer to the directory entry */
+      if (dptr[DIR_Name] == 0)            /* Has it reached to end of dir? */
+        return !ds ? FR_NO_FILE : FR_NO_PATH;
+#if _USE_LFN != 0
+      if (dptr[DIR_Name] != 0xE5) {            /* Matched? */
+        if((dptr[DIR_Attr] & AM_LFN) == AM_LFN) {
+          if (lfn) {
+            i=((dptr[0]&0x1f)-1)*13;
+            j=0;
+            while(j<13 && match) {
+              a=dptr[pgm_read_byte(LFN_pos+j)];
+              b=dptr[pgm_read_byte(LFN_pos+j++)+1];
+              if(!a && !b) {
+                j--;
+                break;
+              }
+              b=(*spath)[i++];
+              if (b >= 'a' && b <= 'z') {          /* Convert to upper case */
+                b -= 0x20;
+              }
+              if (a >= 'a' && a <= 'z') {          /* Convert to upper case */
+                a -= 0x20;
+              }
+              if(a!= b) {
+                match=FALSE;
+              }
+            }
+            l+=j;
+          } else {
+            /* Track the length of the LFN entry in case it belongs to our file */
+            *len = *len + 13;
+          }
+        } else if ((dptr[DIR_Attr] & AM_LFN) != AM_LFN) {  /* we're a normal entry */
+          if (lfn) {
+            if(lfn && (match && l == *len)) { /* match */
+                memcpy(fn,&dptr[DIR_Name], 8+3);
+                fn[11] = dptr[DIR_NTres];
+                break;
+            }
+            l=0;
+            match=TRUE;
+          } else {
+            /* No LFN to match against */
+            if (dptr[DIR_Name] != 0xE5            /* Matched? */
+                && !(dptr[DIR_Attr] & AM_VOL)
+                && !memcmp(&dptr[DIR_Name], fn, 8+3) ) {
+              break;
+            }
+          }
+          store = TRUE;
+        }
+      } else
+        /* This is a deleted entry, move fileobj forward */
+        store = TRUE;
+#else
+      if (dptr[DIR_Name] != 0xE5                  /* Matched? */
+          && !(dptr[DIR_Attr] & AM_VOL)
+          && !memcmp(&dptr[DIR_Name], fn, 8+3) ) {
+        break;
+      }
+#endif
+      if (!next_dir_entry(dj)) {                  /* Next directory pointer */
+#if _USE_LFN != 0
+        if (!lfn)
+          *len = 0;
+#endif
+        return !ds ? FR_NO_FILE : FR_NO_PATH;
+      }
+    }
+    if (!ds) { *dir = dptr; return FR_OK; }             /* Matched with end of path */
+    if (!(dptr[DIR_Attr] & AM_DIR)) return FR_NO_PATH;  /* Cannot trace because it is a file */
+    clust = ((DWORD)LD_WORD(&dptr[DIR_FstClusHI]) << 16)
+      | LD_WORD(&dptr[DIR_FstClusLO]);                  /* Get cluster# of the directory */
+    dj->clust = dj->sclust = clust;                     /* Restart scanning at the new directory */
+    dj->sect = clust2sect(fs, clust);
+    dj->index = 2;
+  }
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Reserve a directory entry                                             */
+/*-----------------------------------------------------------------------*/
+
+#if !_FS_READONLY
+static
+FRESULT reserve_direntry (  /* FR_OK: successful, FR_DENIED: no free entry, FR_RW_ERROR: a disk error occured */
+  DIR *dj,                  /* Target directory to create new entry */
+  BYTE **dir                /* Pointer to pointer to created entry to retutn */
+#if _USE_LFN != 0
+  ,UINT len
+#endif
+)
+{
+  DWORD clust, sector;
+  BYTE c, n, *dptr;
+  FATFS *fs = dj->fs;
+
+#if _USE_LFN != 0
+  BYTE entries=0;
+  WORD isave=0;
+  DWORD csave=0,ssave=0;
+
+  len=(len+25)/13;
+#endif
+  /* Re-initialize directory object */
+  clust = dj->sclust;
+  if (clust != 0) {     /* Dynamic directory table */
+    dj->clust = clust;
+    dj->sect = clust2sect(fs, clust);
+  } else {              /* Static directory table */
+    dj->sect = fs->dirbase;
+  }
+  dj->index = 0;
+
+  do {
+    if (!move_fs_window(fs, dj->sect)) return FR_RW_ERROR;
+    dptr = &FSBUF.data[(dj->index & ((SS(fs) - 1) / 32)) * 32];  /* Pointer to the directory entry */
+    c = dptr[DIR_Name];
+    if (c == 0 || c == 0xE5) {      /* Found an empty entry */
+#if _USE_LFN != 0
+      /* capture initial entry. */
+      if((entries++) == 0) {
+        *dir=dptr;
+        isave=dj->index;
+        ssave=dj->sect;
+        csave=dj->clust;
+      }
+      if(entries==len) {
+        dj->index=isave;
+        dj->sect=ssave;
+        dj->clust=csave;
+        return FR_OK;
+      }
+    } else if(entries!=len){
+      entries=0;
+#else
+      *dir = dptr; return FR_OK;
+#endif
+    }
+  } while (next_dir_entry(dj));                 /* Next directory pointer */
+  /* Reached to end of the directory table */
+  /* Abort when it is a static table or could not stretch dynamic table */
+  if (clust == 0 || !(clust = create_chain(fs, dj->clust))) return FR_DENIED;
+  if (clust == 1 || !move_fs_window(fs, 0)) return FR_RW_ERROR;
+  /* Cleanup the expanded table */
+  FSBUF.sect = sector = clust2sect(fs, clust);
+  memset(FSBUF.data, 0, SS(fs));
+  for (n = fs->csize; n; n--) {
+    if (disk_write(fs->drive, FSBUF.data, sector, 1) != RES_OK)
+      return FR_RW_ERROR;
+    sector++;
+  }
+  FSBUF.dirty = TRUE;
+#if _USE_LFN != 0
+  if(entries) {   // we had to expand the table, but now we need to go back.
+    if (!move_fs_window(fs, ssave)) return FR_RW_ERROR;
+    dj->index=isave;
+    dj->sect=ssave;
+    dj->clust=csave;
+  } else {
+    /* We allocated a new cluster for all entries, point dj there */
+    dj->index = 0;
+    dj->sect  = FSBUF.sect;
+    dj->clust = clust;
+    *dir = FSBUF.data;
+  }
+#else
+  *dir = FSBUF.data;
+#endif
+
+  return FR_OK;
+}
+#endif /* !_FS_READONLY */
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Load boot record and check if it is a FAT boot record                 */
+/*-----------------------------------------------------------------------*/
+
+static const PROGMEM UCHAR fat32string[] = "FAT32";
+
+static
+BYTE check_fs (     /* 0:The FAT boot record, 1:Valid boot record but not a FAT, 2:Not a boot record or error */
+  FATFS *fs,        /* File system object */
+  DWORD sect        /* Sector# (lba) to check if it is a FAT boot record or not */
+)
+{
+  if (!move_fs_window(fs, sect))                    /* Load boot record, save off old data in process */
+    return 2;
+  if (!sect) {
+    if (disk_read(fs->drive, FSBUF.data, sect, 1) != RES_OK)  /* Load boot record, if sector 0 */
+      return 2;
+    FSBUF.sect = 0;
+  }
+  if (LD_WORD(&FSBUF.data[BS_55AA]) != 0xAA55)      /* Check record signature (always placed at offset 510 even if the sector size is >512) */
+    return 2;
+
+  if (!memcmp_P(&FSBUF.data[BS_FilSysType], fat32string, 3))        /* Check FAT signature */
+    return 0;
+  if (!memcmp_P(&FSBUF.data[BS_FilSysType32], fat32string, 5) && !(FSBUF.data[BPB_ExtFlags] & 0x80))
+    return 0;
+
+  return 1;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Mount a drive                                                         */
+/*-----------------------------------------------------------------------*/
+
+FRESULT mount_drv(
+  BYTE drv,
+  FATFS* fs,
+  BYTE chk_wp           /* !=0: Check media write protection for write access */
+)
+{
+  DSTATUS stat;
+  BYTE fmt, *tbl;
+  DWORD bootsect, fatsize, totalsect, maxclust;
+
+  memset(fs, 0, sizeof(FATFS));       /* Clean-up the file system object */
+  fs->drive = LD2PD(drv);             /* Bind the logical drive and a physical drive */
+  stat = disk_initialize(fs->drive);  /* Initialize low level disk I/O layer */
+  if (stat & STA_NOINIT)              /* Check if the drive is ready */
+    return FR_NOT_READY;
+#if S_MAX_SIZ > 512                   /* Get disk sector size if needed */
+  if (disk_ioctl(fs->drive, GET_SECTOR_SIZE, &SS(fs)) != RES_OK || SS(fs) > S_MAX_SIZ)
+    return FR_NO_FILESYSTEM;
+#endif
+#if !_FS_READONLY
+  if (chk_wp && (stat & STA_PROTECT)) /* Check write protection if needed */
+    return FR_WRITE_PROTECTED;
+#endif
+#if _MULTI_PARTITION == 0
+  /* Search FAT partition on the drive */
+  fmt = check_fs(fs, bootsect = 0);   /* Check sector 0 as an SFD format */
+  if (fmt == 1) {                     /* Not a FAT boot record, it may be patitioned */
+    /* Check a partition listed in top of the partition table */
+    tbl = &FSBUF.data[MBR_Table + LD2PT(drv) * 16]; /* Partition table */
+    if (tbl[4]) {                     /* Is the partition existing? */
+      bootsect = LD_DWORD(&tbl[8]);   /* Partition offset in LBA */
+      fmt = check_fs(fs, bootsect);   /* Check the partition */
+    }
+  }
+#else
+  /* Check only the partition that was requested */
+  if (LD2PT(drv) == 0) {
+    /* Unpartitioned media */
+    fmt = check_fs(fs, bootsect = 0);
+  } else {
+    /* Read MBR */
+    fmt = 1;
+    if (disk_read(fs->drive, FSBUF.data, 0, 1) != RES_OK)
+      goto failed;
+
+    if (LD2PT(drv) < 5) {
+      /* Primary partition */
+      tbl = &FSBUF.data[MBR_Table + (LD2PT(drv)-1) * 16];
+      fmt = 1;
+      if (tbl[4]) {
+        bootsect = LD_DWORD(&tbl[8]);
+        fmt = check_fs(fs, bootsect);
+      }
+    } else {
+      /* Logical drive */
+      BYTE i,curr;
+      fmt = 1;
+      bootsect = 0;
+      fatsize = 0;  // Used to store the offset of the first extended part
+      curr = LD2PT(drv)-4;
+      /* Walk the chain of extended partitions */
+      do {
+        /* Check for an extended partition */
+        for (i=0;i<4;i++) {
+          tbl = &FSBUF.data[MBR_Table + i*16];
+          if (tbl[4] == 5 || tbl[4] == 0x0f)
+            break;
+        }
+        if (i == 4) {
+          fmt = 255;
+          goto failed;
+        }
+        bootsect = fatsize + LD_DWORD(&tbl[8]);
+
+        if (fatsize == 0)
+          fatsize = bootsect;
+
+        /* Read the next sector in the partition chain */
+        if (disk_read(fs->drive, FSBUF.data, bootsect, 1) != RES_OK)
+          goto failed;
+      } while (--curr);
+      /* Look for the non-extended, non-empty partition entry */
+      for (i=0;i<4;i++) {
+        tbl = &FSBUF.data[MBR_Table + i*16];
+        if (tbl[4] && tbl[4] != 5 && tbl[4] != 0x0f)
+          break;
+      }
+      if (i == 4) {
+        /* End of extended partition chain */
+        fmt = 255;
+        goto failed;
+      }
+      bootsect = bootsect + LD_DWORD(&tbl[8]);
+      fmt = check_fs(fs, bootsect);
+    }
+  }
+ failed:
+
+#endif
+
+  if (fmt || LD_WORD(&FSBUF.data[BPB_BytsPerSec]) != SS(fs)) { /* No valid FAT patition is found */
+    if (fmt == 255) {
+      /* At end of extended partition chain */
+      return FR_INVALID_OBJECT;
+    } else {
+      /* No file system found */
+      return FR_NO_FILESYSTEM;
+    }
+  }
+
+  /* Initialize the file system object */
+  fatsize = LD_WORD(&FSBUF.data[BPB_FATSz16]);      /* Number of sectors per FAT */
+  if (!fatsize) fatsize = LD_DWORD(&FSBUF.data[BPB_FATSz32]);
+  fs->sects_fat = fatsize;
+  fs->n_fats = FSBUF.data[BPB_NumFATs];             /* Number of FAT copies */
+  fatsize *= fs->n_fats;                            /* (Number of sectors in FAT area) */
+  fs->fatbase = bootsect + LD_WORD(&FSBUF.data[BPB_RsvdSecCnt]); /* FAT start sector (lba) */
+  fs->csize = FSBUF.data[BPB_SecPerClus];           /* Number of sectors per cluster */
+  fs->n_rootdir = LD_WORD(&FSBUF.data[BPB_RootEntCnt]); /* Nmuber of root directory entries */
+  totalsect = LD_WORD(&FSBUF.data[BPB_TotSec16]);   /* Number of sectors on the file system */
+  if (!totalsect) totalsect = LD_DWORD(&FSBUF.data[BPB_TotSec32]);
+  fs->max_clust = maxclust = (totalsect             /* max_clust = Last cluster# + 1 */
+    - LD_WORD(&FSBUF.data[BPB_RsvdSecCnt]) - fatsize - fs->n_rootdir / (SS(fs)/32)
+    ) / fs->csize + 2;
+
+  fmt = FS_FAT12;                     /* Determine the FAT sub type */
+  if (maxclust >= 0xFF7) fmt = FS_FAT16;
+  if (maxclust >= 0xFFF7) fmt = FS_FAT32;
+  fs->fs_type = fmt;
+
+  if (fmt == FS_FAT32)
+    fs->dirbase = LD_DWORD(&FSBUF.data[BPB_RootClus]);  /* Root directory start cluster */
+  else
+    fs->dirbase = fs->fatbase + fatsize;            /* Root directory start sector (lba) */
+  fs->database = fs->fatbase + fatsize + fs->n_rootdir / (SS(fs)/32);  /* Data start sector (lba) */
+
+#if !_FS_READONLY
+  fs->free_clust = 0xFFFFFFFF;
+# if _USE_FSINFO
+  /* Get fsinfo if needed */
+  if (fmt == FS_FAT32) {
+    fs->fsi_sector = bootsect + LD_WORD(&FSBUF.data[BPB_FSInfo]);
+    //if (disk_read(fs->drive, FSBUF.data, fs->fsi_sector, 1) == RES_OK &&
+    if (move_fs_window(fs,fs->fsi_sector) &&
+      LD_WORD(&FSBUF.data[BS_55AA]) == 0xAA55 &&
+      LD_DWORD(&FSBUF.data[FSI_LeadSig]) == 0x41615252 &&
+      LD_DWORD(&FSBUF.data[FSI_StrucSig]) == 0x61417272) {
+      fs->last_clust = LD_DWORD(&FSBUF.data[FSI_Nxt_Free]);
+      fs->free_clust = LD_DWORD(&FSBUF.data[FSI_Free_Count]);
+    }
+  }
+# endif
+#endif
+  fs->fs_type = fmt;      /* FAT syb-type */
+  //fs->id = ++fsid;                    /* File system mount ID */
+  return FR_OK;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Make sure that the file system is valid                               */
+/*-----------------------------------------------------------------------*/
+
+static
+FRESULT auto_mount (    /* FR_OK(0): successful, !=0: any error occured */
+  const UCHAR **path,   /* Pointer to pointer to the path name (drive number) */
+  FATFS **rfs,          /* Pointer to pointer to the found file system object */
+  BYTE chk_wp           /* !=0: Check media write protection for write access */
+)
+{
+  DSTATUS stat;
+  const UCHAR *p = *path;
+#if _USE_DRIVE_PREFIX != 0
+  BYTE drv;
+
+  /* Get drive number from the path name */
+  while (*p == ' ') p++;              /* Strip leading spaces */
+# if _MULTI_PARTITION != 0
+  *path=p;
+  drv = 0;
+  while(*p >= '0' && *p<='9') {
+    if(drv >= 25 && *p > '5')
+      return FR_INVALID_DRIVE;
+    drv = drv*10+((*p++)-'0');
+  }
+  if(*p != ':') {
+    p = *path;
+    drv = 0;
+  }
+# else
+  drv = p[0] - '0';                   /* Is there a drive number? */
+  if (drv <= 9 && p[1] == ':')
+    p += 2;                           /* Found a drive number, get and strip it */
+  else
+    drv = 0;                          /* No drive number is given, use drive number 0 as default */
+# endif
+#endif
+#if _USE_CHDIR == 0
+  if (*p == '/') p++;                 /* Strip heading slash */
+#endif
+  *path = p;                          /* Return pointer to the path name */
+
+  /* Check if the drive number is valid or not */
+#if _USE_DRIVE_PREFIX != 0
+  if (drv >= _LOGICAL_DRIVES) return FR_INVALID_DRIVE;    /* Is the drive number valid? */
+  *rfs = FatFs[drv];                  /* Returen pointer to the corresponding file system object */
+#endif
+  if (!*rfs) return FR_NOT_ENABLED;   /* Is the file system object registered? */
+
+  if ((*rfs)->fs_type) {              /* If the logical drive has been mounted */
+    stat = disk_status((*rfs)->drive);
+    if (!(stat & STA_NOINIT)) {       /* and physical drive is kept initialized (has not been changed), */
+#if !_FS_READONLY
+      if (chk_wp && (stat & STA_PROTECT))         /* Check write protection if needed */
+        return FR_WRITE_PROTECTED;
+#endif
+      return FR_OK;                   /* The file system object is valid */
+    }
+  }
+
+  /* The logical drive must be re-mounted.  */
+
+#if _USE_DEFERRED_MOUNT != 0
+  return mount_drv(drv,*rfs, chk_wp);
+#else
+  return FR_NOT_READY;
+#endif
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Check if the file/dir object is valid or not                          */
+/*-----------------------------------------------------------------------*/
+
+static
+FRESULT validate (    /* FR_OK(0): The object is valid, !=0: Invalid */
+  const FATFS *fs     /* Pointer to the file system object */
+  //,WORD id             /* Member id of the target object to be checked */
+)
+{
+  if (!fs || !fs->fs_type /*|| fs->id != id */)
+    return FR_INVALID_OBJECT;
+  if (disk_status(fs->drive) & STA_NOINIT)
+    return FR_NOT_READY;
+
+  return FR_OK;
+}
+
+
+
+
+#if _USE_LFN != 0
+static
+BYTE compute_checksum(UCHAR *buf) {
+  BYTE i,rc;
+  rc=buf[0];
+  for(i=1;i<11;i++) {
+    rc=(rc&1?(rc>>1)| 0x80:rc>>1);
+    rc+=buf[i];
+  }
+  return rc;
+}
+
+
+
+
+static
+BYTE dos_char(
+    BYTE x
+)
+{
+  if(x>('a'-1) && x<('z'+1))
+    x=x-'a'+'A';
+  else if(x>(' '-1) && x<'+') {
+  } else if(x>('A'-1) && x<('Z'+1)) {
+  } else if(x>('0'-1) && x<('9'+1)) {
+  } else if(x&0x80) {
+  } else switch(x) {
+    case ',':
+    case '-':
+    case '^':
+    case '~':
+    case '=':
+    case '_':
+    case '`':
+    case '{':
+    case '}':
+      break;
+    default:
+      x='_';
+      break;
+  }
+  return x;
+}
+
+
+
+
+static
+void create_short_name(
+  const UCHAR* name,
+  UINT len,
+  UCHAR* buf
+)
+{
+  BYTE i=0,k,l=0;
+  BYTE j=len;
+
+  memset(buf,' ',11);
+  buf[11]=0;
+  if(name[0]!='.') {
+    while(--j) { /* find the last '.' */
+      if(name[j]=='.') break;
+    }
+    k=j+1;
+    i=8;
+    if(k>1) {
+      while(k<len && i<11) {
+        if(name[k]!=' ') {
+          // build extension
+          buf[i++]=dos_char(name[k]);
+        }
+        k++;
+      }
+    } else
+      j=6;
+  }
+  i=0; /* now build start */
+  while(i<6 && l<j) {
+    if(name[l]!=' ' && name[l]!='.') {
+      buf[i++]=dos_char(name[l]);
+    }
+    l++;
+  }
+  if(i<3) {
+    buf[i++]='A'; /* FIXME: replace this with a way to generate a random or hash hex word. */
+    buf[i++]='B';
+    buf[i++]='C';
+    buf[i++]='D';
+  }
+  buf[i++]='~';
+  buf[i++]='1';
+  if(((BYTE)buf[0])==0xe5)
+    buf[0]=0x05;
+}
+
+
+
+
+static
+BOOL fix_short_name(
+  UCHAR *buf
+)
+{
+  BYTE i=8;
+  BOOL c=FALSE;
+  while(buf[--i]==' ');
+  do {
+    if(buf[i]=='9') {
+      buf[i]='0';
+      c=TRUE;
+    } else if(c && buf[i]=='~') {
+        buf[i]='1';
+        break;
+    } else {
+      buf[i]++;
+      c=FALSE;
+      break;
+    }
+  } while (--i);
+  if(c) {
+    if(!i) return FALSE;
+    buf[i-1]='~';
+  }
+  return TRUE;
+}
+
+
+
+
+static
+FRESULT chk_filename( /* FR_EXIST means name is taken. */
+  DIR *dj,            /* Target directory to create new entry */
+  UCHAR* fn           /* name to check */
+)
+{
+  BYTE *dptr;
+  FATFS *fs = dj->fs;
+  DWORD clust;
+
+  /* Re-initialize directory object */
+  clust = dj->sclust;
+  if (clust) {          /* Dyanmic directory table */
+    dj->clust = clust;
+    dj->sect  = clust2sect(fs, clust);
+  } else {              /* Static directory table */
+    dj->sect  = fs->dirbase;
+  }
+  dj->index = 0;
+
+  do {
+    if (!move_fs_window(fs, dj->sect)) return FR_RW_ERROR;
+    dptr = &FSBUF.data[(dj->index & ((SS(fs) - 1) / 32)) * 32]; /* Pointer to the directory entry */
+    if(dptr[DIR_Name] == 0) {         /* if we got here, we have a match */
+      return FR_OK;
+    } else if(*dptr!=0xe5
+              && (dptr[DIR_Attr] & AM_LFN) != AM_LFN
+              && !(dptr[DIR_Attr] & AM_VOL)
+              && !memcmp(&dptr[DIR_Name], fn, 8+3) )  /* start over. */
+      return FR_EXIST;
+  } while (next_dir_entry(dj));       /* Next directory pointer */
+  /* Reached to end of the directory table */
+  return FR_OK;
+}
+
+FRESULT add_direntry(
+  DIR *dj,              /* Target directory to create new entry */
+  BYTE **dir,           /* pointer to created entry */
+  const UCHAR* spath,
+  UINT len,
+  UCHAR* fn
+)
+{
+  FATFS *fs = dj->fs;
+  DWORD clust,sect;
+  WORD index;
+  BYTE entries,i,j,k;
+  BYTE chk;
+
+  entries=i=(len+12)/13;
+
+  fn[11]=0;             /* ALL uppercase */
+
+  clust = dj->clust;    /* save off entries needed. */
+  index = dj->index;
+  sect  = dj->sect;
+  create_short_name(spath,len,fn);
+  for(;;) {
+    if(!chk_filename(dj,fn)) break;
+    if(!fix_short_name(fn))
+      return FR_EXIST;
+  }
+  chk=compute_checksum(fn);
+  dj->clust = clust;    /* we now have a good name, use it */
+  dj->index = index;
+  dj->sect  = sect;
+  while(move_fs_window(fs, dj->sect)) {
+    *dir = &FSBUF.data[(dj->index & ((SS(fs) - 1) / 32)) * 32]; /* Pointer to the directory entry */
+    if(!i)
+      return FR_OK;
+    FSBUF.dirty = TRUE;
+    memset(*dir, 0, 32);              /* Initialize the new entry with open name */
+    (*dir)[DIR_Name]=(i==entries?0x40:0) | (i);
+    j=0;
+    i--;
+    k=(i)*13;
+    while(j<13 && k<len) {
+      (*dir)[pgm_read_byte(LFN_pos+j++)]=spath[k++];
+    }
+    j++;
+    while(j<13) {
+      (*dir)[pgm_read_byte(LFN_pos+j)]=0xff;
+      (*dir)[pgm_read_byte(LFN_pos+j++)+1]=0xff;
+    }
+    (*dir)[DIR_Attr]=AM_LFN;
+    (*dir)[DIR_Chksum]=chk;
+    if(!next_dir_entry(dj)) break;
+  }
+  return FR_RW_ERROR;
+}
+#endif
+
+
+
+
+/*--------------------------------------------------------------------------
+
+   Public Functions
+
+--------------------------------------------------------------------------*/
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Mount/Unmount a Locical Drive                                         */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_mount (
+  BYTE drv,   /* Logical drive number to be mounted/unmounted */
+  FATFS *fs   /* Pointer to new file system object (NULL for unmount)*/
+)
+{
+#if _USE_DRIVE_PREFIX != 0
+  if (drv >= _LOGICAL_DRIVES) return FR_INVALID_DRIVE;
+
+  if (FatFs[drv]) FatFs[drv]->fs_type = 0;  /* Clear old object */
+
+  FatFs[drv] = fs;      /* Register and clear new object */
+#endif
+  if (fs) fs->fs_type = 0;
+
+#if _USE_DEFERRED_MOUNT == 0
+  return mount_drv(drv,fs,0);
+#else
+  return FR_OK;
+#endif
+}
+
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Open or Create a File                                                 */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_open (
+#if _USE_DRIVE_PREFIX == 0
+  FATFS *fs,           /* Pointer to file system object */
+#endif
+  FIL *fp,             /* Pointer to the blank file object */
+  const UCHAR *path,   /* Pointer to the file name */
+  BYTE mode            /* Access mode and file open mode flags */
+)
+{
+  FRESULT res;
+  DIR dj;
+  BYTE *dir = NULL;
+  UCHAR fn[8+3+1];
+#if _USE_DRIVE_PREFIX != 0
+  FATFS *fs = NULL;
+#endif
+#if _USE_LFN != 0
+  UINT len;
+  DIR fileobj;
+  const UCHAR* spath;
+#endif
+
+
+#if _USE_FS_BUF == 0
+  FPBUF.dirty=FALSE;
+#endif
+  fp->fs = NULL;        /* Clear file object */
+#if !_FS_READONLY
+  mode &= (FA_READ|FA_WRITE|FA_CREATE_ALWAYS|FA_OPEN_ALWAYS|FA_CREATE_NEW);
+  res = auto_mount(&path, &fs, (BYTE)(mode & (FA_WRITE|FA_CREATE_ALWAYS|FA_OPEN_ALWAYS|FA_CREATE_NEW)));
+#else
+  mode &= FA_READ;
+  res = auto_mount(&path, &fs, 0);
+#endif
+  if (res != FR_OK) return res;
+  dj.fs = fs;
+
+#if _USE_LFN != 0
+  res = trace_path(&dj, fn, path, &dir, &fileobj, &spath, &len); /* Trace the file path */
+#else
+  res = trace_path(&dj, fn, path, &dir);   /* Trace the file path */
+#endif
+#if !_FS_READONLY
+  /* Create or Open a file */
+# if _USE_CHDIR != 0
+  if(fn[0]=='.')
+    return FR_INVALID_NAME;
+# endif
+  if (mode & (FA_CREATE_ALWAYS|FA_OPEN_ALWAYS|FA_CREATE_NEW)) {
+    DWORD ps, rs;
+    if (res != FR_OK) {               /* No file, create new */
+      if (res != FR_NO_FILE) return res;
+# if _USE_LFN != 0
+      res = reserve_direntry(&dj, &dir,len);
+      if (res != FR_OK) return res;
+      if(len && add_direntry(&dj,&dir,spath,len,fn)) return FR_RW_ERROR;
+# else
+      res = reserve_direntry(&dj, &dir);
+      if (res != FR_OK) return res;
+# endif
+      memset(dir, 0, 32);             /* Initialize the new entry with open name */
+      memcpy(&dir[DIR_Name], fn, 8+3);
+      dir[DIR_NTres] = fn[11];
+      mode |= FA_CREATE_ALWAYS;
+    }
+    else {                            /* Any object is already existing */
+      if (mode & FA_CREATE_NEW)       /* Cannot create new */
+        return FR_EXIST;
+      if (!dir)                       /* Cannot overwrite it */
+        return FR_DENIED;
+      if (dir[DIR_Attr] & AM_DIR)
+    return FR_IS_DIRECTORY;
+      if (dir[DIR_Attr] & AM_RDO)
+    return FR_IS_READONLY;
+      if (mode & FA_CREATE_ALWAYS) {      /* Resize it to zero if needed */
+        rs = ((DWORD)LD_WORD(&dir[DIR_FstClusHI]) << 16) | LD_WORD(&dir[DIR_FstClusLO]);  /* Get start cluster */
+        ST_WORD(&dir[DIR_FstClusHI], 0);  /* cluster = 0 */
+        ST_WORD(&dir[DIR_FstClusLO], 0);
+        ST_DWORD(&dir[DIR_FileSize], 0);  /* size = 0 */
+        FSBUF.dirty = TRUE;
+        ps = FSBUF.sect;                  /* Remove the cluster chain */
+        if (!remove_chain(fs, rs) || !move_fs_window(fs, ps))
+          return FR_RW_ERROR;
+        fs->last_clust = rs - 1;          /* Reuse the cluster hole */
+      }
+    }
+    if (mode & FA_CREATE_ALWAYS) {
+      dir[DIR_Attr] = 0;                  /* Reset attribute */
+      ps = get_fattime();
+      ST_DWORD(&dir[DIR_CrtTime], ps);    /* Created time */
+      mode |= FA__WRITTEN;        /* Set file changed flag */
+    }
+  }
+  /* Open an existing file */
+  else {
+#endif /* !_FS_READONLY */
+    if (res != FR_OK) return res;     /* Trace failed */
+    if (!dir || (dir[DIR_Attr] & AM_DIR))              /* It is a directory */
+      return FR_NO_FILE;
+#if !_FS_READONLY
+    if ((mode & FA_WRITE) && (dir[DIR_Attr] & AM_RDO)) /* R/O violation */
+      return FR_DENIED;
+  }
+
+  fp->dir_sect = FSBUF.sect;          /* Pointer to the directory entry */
+  fp->dir_ptr = dir;
+#endif
+  fp->flag = mode;                    /* File access mode */
+  fp->org_clust =                     /* File start cluster */
+    ((DWORD)LD_WORD(&dir[DIR_FstClusHI]) << 16) | LD_WORD(&dir[DIR_FstClusLO]);
+  fp->fsize = LD_DWORD(&dir[DIR_FileSize]);         /* File size */
+  fp->fptr = 0;                                     /* Initialize file pointer */
+  fp->csect = 1;                                    /* Sector counter */
+  fp->fs = fs; //fp->id = fs->id;       /* Owner file system object of the file */
+
+#if !_FS_READONLY
+  if (mode & (FA_CREATE_ALWAYS|FA_OPEN_ALWAYS|FA_CREATE_NEW))
+    sync(fs);                         /* sync buffer in case the file was just created */
+                                      /* can't sync earlier, modifies FSBUF.sect       */
+#endif
+  return FR_OK;
+}
+
+FRESULT l_opencluster (
+  FATFS *fs,           /* Pointer to file system object */
+  FIL *fp,             /* Pointer to the blank file object */
+  DWORD clust          /* Cluster number to be opened */
+)
+{
+  fp->flag = FA_READ;
+  fp->org_clust = clust;
+  fp->fsize = (DWORD)fs->csize * SS(fs);
+  fp->fptr = 0;
+  fp->csect = 1;
+  fp->fs = fs;
+
+  return FR_OK;
+}
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Read File                                                             */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_read (
+  FIL *fp,      /* Pointer to the file object */
+  void *buff,   /* Pointer to data buffer */
+  UINT btr,     /* Number of bytes to read */
+  UINT *br      /* Pointer to number of bytes read */
+)
+{
+  FRESULT res;
+  DWORD clust, sect, remain;
+  UINT rcnt, cc;
+  BYTE *rbuff = buff;
+  FATFS *fs = fp->fs;
+
+
+  *br = 0;
+  res = validate(fs /*, fp->id*/);                   /* Check validity of the object */
+  if (res != FR_OK) return res;
+  if (fp->flag & FA__ERROR) return FR_RW_ERROR; /* Check error flag */
+  if (!(fp->flag & FA_READ)) return FR_DENIED;  /* Check access mode */
+  remain = fp->fsize - fp->fptr;
+  if (btr > remain) btr = (UINT)remain;         /* Truncate read count by number of bytes left */
+
+  for ( ;  btr;                                 /* Repeat until all data transferred */
+    rbuff += rcnt, fp->fptr += rcnt, *br += rcnt, btr -= rcnt) {
+    if ((fp->fptr & (SS(fs) - 1)) == 0) {       /* On the sector boundary */
+      if (--fp->csect) {                        /* Decrement left sector counter */
+        sect = fp->curr_sect + 1;               /* Get current sector */
+      } else {                                  /* On the cluster boundary, get next cluster */
+        clust = (fp->fptr == 0) ?
+          fp->org_clust : get_cluster(fs, fp->curr_clust);
+        if (clust < 2 || clust >= fs->max_clust)
+          goto fr_error;
+        fp->curr_clust = clust;                 /* Current cluster */
+        sect = clust2sect(fs, clust);           /* Get current sector */
+        fp->csect = fs->csize;                  /* Re-initialize the left sector counter */
+      }
+#if !_FS_READONLY
+      if(!move_fp_window(fp,0)) goto fr_error;
+#endif
+      fp->curr_sect = sect;           /* Update current sector */
+      cc = btr / SS(fs);              /* When left bytes >= SS(fs), */
+      if (cc) {                       /* Read maximum contiguous sectors directly */
+        if (cc > fp->csect) cc = fp->csect;
+        if (disk_read(fs->drive, rbuff, sect, (BYTE)cc) != RES_OK)
+          goto fr_error;
+        fp->csect -= (BYTE)(cc - 1);
+        fp->curr_sect += cc - 1;
+        rcnt = cc * SS(fs);
+        continue;
+      }
+    }
+    if(btr) {  /* if we actually have bytes to read in singles, copy them in */
+      rcnt = SS(fs) - ((WORD)fp->fptr & (SS(fs) - 1));       /* Copy fractional bytes from file I/O buffer */
+      if (rcnt > btr) rcnt = btr;
+      if(!move_fp_window(fp,fp->curr_sect)) goto fr_error;   /* are we there or not? */
+      memcpy(rbuff, &FPBUF.data[fp->fptr & (SS(fs) - 1)], rcnt);
+    }
+  }
+
+  return FR_OK;
+
+fr_error: /* Abort this file due to an unrecoverable error */
+  fp->flag |= FA__ERROR;
+  return FR_RW_ERROR;
+}
+
+
+
+
+#if !_FS_READONLY
+/*-----------------------------------------------------------------------*/
+/* Write File                                                            */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_write (
+  FIL *fp,          /* Pointer to the file object */
+  const void *buff, /* Pointer to the data to be written */
+  UINT btw,         /* Number of bytes to write */
+  UINT *bw          /* Pointer to number of bytes written */
+)
+{
+  FRESULT res;
+  DWORD clust, sect;
+  UINT wcnt, cc;
+  const BYTE *wbuff = buff;
+  FATFS *fs = fp->fs;
+
+
+  *bw = 0;
+  res = validate(fs /*, fp->id*/);                     /* Check validity of the object */
+  if (res != FR_OK) return res;
+  if (fp->flag & FA__ERROR) return FR_RW_ERROR;   /* Check error flag */
+  if (!(fp->flag & FA_WRITE)) return FR_DENIED;   /* Check access mode */
+  if (fp->fsize + btw < fp->fsize) return FR_OK;  /* File size cannot reach 4GB */
+
+  for ( ;  btw;                                   /* Repeat until all data transferred */
+    wbuff += wcnt, fp->fptr += wcnt, *bw += wcnt, btw -= wcnt) {
+    if ((fp->fptr & (SS(fs) - 1)) == 0) {         /* On the sector boundary */
+      if (--fp->csect) {                          /* Decrement left sector counter */
+        sect = fp->curr_sect + 1;                 /* Get current sector */
+      } else {                                    /* On the cluster boundary, get next cluster */
+        if (fp->fptr == 0) {                      /* Is top of the file */
+          clust = fp->org_clust;
+          if (clust == 0)                         /* No cluster is created yet */
+            fp->org_clust = clust = create_chain(fs, 0);    /* Create a new cluster chain */
+        } else {                                  /* Middle or end of file */
+          clust = create_chain(fs, fp->curr_clust);         /* Trace or streach cluster chain */
+        }
+        if (clust == 0) break;                    /* Disk full */
+        if (clust == 1 || clust >= fs->max_clust) goto fw_error;
+        fp->curr_clust = clust;                   /* Current cluster */
+        sect = clust2sect(fs, clust);             /* Get current sector */
+        fp->csect = fs->csize;                    /* Re-initialize the left sector counter */
+      }
+      if(!move_fp_window(fp,0)) goto fw_error;
+      fp->curr_sect = sect;                       /* Update current sector */
+      cc = btw / SS(fs);                          /* When left bytes >= SS(fs), */
+      if (cc) {                                   /* Write maximum contiguous sectors directly */
+        if (cc > fp->csect) cc = fp->csect;
+        if (disk_write(fs->drive, wbuff, sect, (BYTE)cc) != RES_OK)
+          goto fw_error;
+        fp->csect -= (BYTE)(cc - 1);
+        fp->curr_sect += cc - 1;
+        wcnt = cc * SS(fs);
+        continue;
+      }
+    }
+    if(btw) {
+      wcnt = SS(fs) - ((WORD)fp->fptr & (SS(fs) - 1));  /* Copy fractional bytes to file I/O buffer */
+      if (wcnt > btw) wcnt = btw;
+      if (
+#if _USE_1_BUF == 0
+      fp->fptr < fp->fsize &&       /* Fill sector buffer with file data if needed */
+#endif
+      !move_fp_window(fp,fp->curr_sect))
+    goto fw_error;
+      memcpy(&FPBUF.data[fp->fptr & (SS(fs) - 1)], wbuff, wcnt);
+      FPBUF.dirty=TRUE;
+    }
+  }
+
+  if (fp->fptr > fp->fsize) fp->fsize = fp->fptr; /* Update file size if needed */
+  fp->flag |= FA__WRITTEN;                        /* Set file changed flag */
+  return FR_OK;
+
+fw_error: /* Abort this file due to an unrecoverable error */
+  fp->flag |= FA__ERROR;
+  return FR_RW_ERROR;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Synchronize the file object                                           */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_sync (
+  FIL *fp   /* Pointer to the file object */
+)
+{
+  FRESULT res;
+  DWORD tim;
+  BYTE *dir;
+  FATFS *fs = fp->fs;
+
+
+  res = validate(fs /*, fp->id*/);       /* Check validity of the object */
+  if (res == FR_OK) {
+    if (fp->flag & FA__WRITTEN) {   /* Has the file been written? */
+      /* Write back data buffer if needed */
+      if(!move_fp_window(fp,0)) return FR_RW_ERROR;
+      /* Update the directory entry */
+      if (!move_fs_window(fs, fp->dir_sect))
+        return FR_RW_ERROR;
+      dir = fp->dir_ptr;
+      dir[DIR_Attr] |= AM_ARC;                        /* Set archive bit */
+      ST_DWORD(&dir[DIR_FileSize], fp->fsize);        /* Update file size */
+      ST_WORD(&dir[DIR_FstClusLO], fp->org_clust);    /* Update start cluster */
+      ST_WORD(&dir[DIR_FstClusHI], fp->org_clust >> 16);
+      tim = get_fattime();                            /* Updated time */
+      ST_DWORD(&dir[DIR_WrtTime], tim);
+      fp->flag &= (BYTE)~FA__WRITTEN;
+      res = sync(fs);
+    }
+  }
+  return res;
+}
+
+#endif /* !_FS_READONLY */
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Close File                                                            */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_close (
+  FIL *fp   /* Pointer to the file object to be closed */
+)
+{
+  FRESULT res;
+
+
+#if !_FS_READONLY
+  res = f_sync(fp);
+#else
+  res = validate(fp->fs /*, fp->id*/);
+#endif
+  if (res == FR_OK) fp->fs = NULL;
+  return res;
+}
+
+
+
+
+#if _FS_MINIMIZE <= 2
+/*-----------------------------------------------------------------------*/
+/* Seek File R/W Pointer                                                 */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_lseek (
+  FIL *fp,    /* Pointer to the file object */
+  DWORD ofs   /* File pointer from top of file */
+)
+{
+  FRESULT res;
+  DWORD clust, csize;
+  CHAR csect;
+  FATFS *fs = fp->fs;
+
+  res = validate(fs /*, fp->id*/);          /* Check validity of the object */
+  if (res != FR_OK) return res;
+  if (fp->flag & FA__ERROR) return FR_RW_ERROR;
+  if (fp->fptr == ofs)        /* Don't seek if the target is the current position */
+    return FR_OK;
+  if (!move_fp_window(fp,0)) goto fk_error; /* JLB not sure I need this. */
+    if (ofs > fp->fsize                     /* In read-only mode, clip offset with the file size */
+#if !_FS_READONLY
+         && !(fp->flag & FA_WRITE)
+#endif
+        ) ofs = fp->fsize;
+
+
+  /* Move file R/W pointer if needed */
+  if (ofs) {
+    csize = (DWORD)fs->csize * SS(fs);        /* Cluster size in unit of byte */
+    if(ofs/csize == (fp->fptr-1)/csize) {
+      /* Source and Target are in the same cluster.  Just reset sector fields */
+      fp->fptr = ofs;
+      ofs-=(((DWORD)(ofs/csize))*csize); /* subtract off up to current cluster */
+    } else {
+      fp->csect = 1;
+
+      if(fp->fptr && ofs > fp->fptr) {
+        fp->fptr = (((DWORD)((fp->fptr-1)/csize))*csize);  /* Set file R/W pointer to start of cluster */
+        ofs-=fp->fptr;            /* subtract off clusters traversed */
+        clust = fp->curr_clust;   /* Get current cluster */
+      } else {
+        fp->fptr = 0;             /* Set file R/W pointer to top of the file */
+        clust = fp->org_clust;    /* Get start cluster */
+      }
+
+#if !_FS_READONLY
+      if (clust == 0) {                       /* If the file does not have a cluster chain, create new cluster chain */
+        clust = create_chain(fs, 0);
+        if (clust == 1) goto fk_error;
+        fp->org_clust = clust;
+      }
+#endif
+      if (clust) {                /* If the file has a cluster chain, it can be followed */
+        for (;;) {                                  /* Loop to skip leading clusters */
+          fp->curr_clust = clust;                   /* Update current cluster */
+          if (ofs <= csize) break;
+#if !_FS_READONLY
+          if (fp->flag & FA_WRITE)                  /* Check if in write mode or not */
+            clust = create_chain(fs, clust);        /* Force streached if in write mode */
+          else
+#endif
+            clust = get_cluster(fs, clust);         /* Only follow cluster chain if not in write mode */
+          if (clust == 0) {                         /* Stop if could not follow the cluster chain */
+            ofs = csize; break;
+          }
+          if (clust < 2 || clust >= fs->max_clust) goto fk_error;
+          fp->fptr += csize;                        /* Update R/W pointer */
+          ofs -= csize;
+        }
+        fp->fptr += ofs;                            /* Update file R/W pointer */
+      }
+    }
+    csect = (CHAR)((ofs - 1) / SS(fs));         /* Sector offset in the cluster */
+    fp->curr_sect = clust2sect(fs, fp->curr_clust) + csect;  /* Current sector */
+    fp->csect = fs->csize - csect;        /* Left sector counter in the cluster */
+  } else {
+    fp->fptr = 0; fp->csect = 1;          /* Set file R/W pointer to top of the file */
+  }
+#if !_FS_READONLY
+	if (fp->fptr > fp->fsize) {			        /* Set changed flag if the file was extended */
+    fp->fsize = fp->fptr;
+    fp->flag |= FA__WRITTEN;
+  }
+#endif
+
+  return FR_OK;
+
+fk_error: /* Abort this file due to an unrecoverable error */
+  fp->flag |= FA__ERROR;
+  return FR_RW_ERROR;
+}
+
+
+
+
+#if _FS_MINIMIZE <= 1
+/*-----------------------------------------------------------------------*/
+/* Create a directroy object                                             */
+/*-----------------------------------------------------------------------*/
+
+#if 0
+FRESULT f_opendir (
+#if _USE_DRIVE_PREFIX == 0
+  FATFS *fs,          /* Pointer to file system object */
+#endif
+  DIR *dj,            /* Pointer to directory object to create */
+  const UCHAR *path   /* Pointer to the directory path */
+)
+{
+  FRESULT res;
+  BYTE *dir;
+  UCHAR fn[8+3+1];
+#if _USE_DRIVE_PREFIX != 0
+  FATFS *fs;
+#endif
+#if _USE_LFN != 0
+  DIR fileobj;
+  const UCHAR* spath;
+  UINT len;
+#endif
+
+
+  res = auto_mount(&path, &fs, 0);
+  if (res == FR_OK) {
+    dj->fs = fs;
+#if _USE_LFN != 0
+    res = trace_path(dj, fn, path, &dir, &fileobj, &spath, &len);
+#else
+    res = trace_path(dj, fn, path, &dir);      /* trace the file path */
+#endif
+    if (res == FR_OK) {                        /* Trace completed */
+      if (dir != NULL) {                       /* It is not the root dir */
+        if (dir[DIR_Attr] & AM_DIR) {          /* The entry is a directory */
+          dj->clust = ((DWORD)LD_WORD(&dir[DIR_FstClusHI]) << 16) | LD_WORD(&dir[DIR_FstClusLO]);
+          dj->sect = clust2sect(fs, dj->clust);
+#if _USE_CHDIR != 0  || _USE_CURR_DIR != 0
+          dj->index = 0;
+#else
+          dj->index = 2;
+#endif
+       } else {                               /* The entry is not a directory */
+          res = FR_NO_FILE;
+        }
+      }
+      //dj->id = fs->id;
+    }
+  }
+  return res;
+}
+#endif
+
+
+
+
+/**
+ * l_opendir - open a directory by cluster number
+ * @fs     : Pointer to the FATFS structure of the target file system
+ * @dj     : Pointer to the DIR structure to be filled
+ * @cluster: Number of the start cluster of the directory (0=root)
+ *
+ * This functions works like f_opendir, but instead of a path the directory
+ * to be opened is specified by the FATFS structure and the starting cluster
+ * number. Use 0 for the cluster to open the root directory.
+ * Always returns FR_OK.
+ */
+FRESULT l_opendir(FATFS* fs, DWORD cluster, DIR *dj) {
+  dj->fs = fs;
+  //dj->id = fs->id;
+
+  if (cluster == 0) {
+    /* Open the root directory */
+    cluster = fs->dirbase;
+    if (fs->fs_type == FS_FAT32) {
+      dj->clust = dj->sclust = cluster;
+      dj->sect  = clust2sect(fs, cluster);
+    } else {
+      dj->clust = dj->sclust = 0;
+      dj->sect  = cluster;
+    }
+    dj->index = 0;
+  } else {
+    /* Open a non-root directory */
+    dj->clust = dj->sclust = cluster;
+    dj->sect  = clust2sect(fs, cluster);
+#if _USE_CHDIR != 0 || _USE_CURR_DIR != 0
+    dj->index = 0;
+#else
+    dj->index = 2;
+#endif
+  }
+  return FR_OK;
+}
+
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Read Directory Entry in Sequense                                      */
+/*-----------------------------------------------------------------------*/
+
+
+FRESULT f_readdir (
+  DIR *dj,           /* Pointer to the directory object */
+  FILINFO *finfo     /* Pointer to file information to return */
+)
+{
+  BYTE *dir, c, res;
+  FATFS *fs = dj->fs;
+#if _USE_LFN != 0
+  WORD len=0;
+  BYTE i,pos;
+# ifdef _MAX_LFN_LENGTH
+  BOOL skiplfn = FALSE;
+# endif
+
+  if (finfo->lfn) {
+    finfo->lfn[0]=0;   /* set first char to null */
+# if _USE_LFN_DBCS != 0
+    finfo->lfn[1]=0;
+# endif
+  }
+#endif
+
+  res = validate(fs /*, dj->id*/);         /* Check validity of the object */
+  if (res != FR_OK) return res;
+
+  finfo->fname[0] = 0;
+  while (dj->sect) {
+    if (!move_fs_window(fs, dj->sect))
+      return FR_RW_ERROR;
+    dir = &FSBUF.data[(dj->index & ((SS(fs) - 1) >> 5)) * 32]; /* pointer to the directory entry */
+    c = dir[DIR_Name];
+    if (c == 0) break;                /* Has it reached to end of dir? */
+#if _USE_LFN != 0
+    if (c != 0xE5) {                  /* Is it a valid entry? */
+      if(finfo->lfn && ((dir[DIR_Attr] & AM_LFN) == AM_LFN)) {
+        pos=((*dir & 0x1f)-1)*S_LFN_OFFSET;  /* get offset */
+# ifdef _MAX_LFN_LENGTH
+        if (skiplfn || pos >= _MAX_LFN_LENGTH * S_LFN_INCREMENT) {
+          skiplfn = TRUE;
+          goto skippedlfn;
+        }
+# endif
+        i=0;
+        while(i<13) {
+          if(!dir[pgm_read_byte(LFN_pos+i)] && !dir[pgm_read_byte(LFN_pos+i)+1])
+            break;
+          if (pos >= _MAX_LFN_LENGTH) {
+            len = 0;
+            i = 0;
+            skiplfn = TRUE;
+            break;
+          }
+          finfo->lfn[pos]=dir[pgm_read_byte(LFN_pos+i)];
+# if _USE_LFN_DBCS != 0
+          finfo->lfn[pos+1]=dir[pgm_read_byte(LFN_pos+i)+1];
+# endif
+          pos+=S_LFN_INCREMENT;
+          i++;
+        }
+        len+=i;
+      } else {
+# ifdef _MAX_LFN_LENGTH
+        skiplfn = FALSE;
+# endif
+        if (finfo->lfn) {
+          finfo->lfn[len*S_LFN_INCREMENT]=0;
+# if _USE_LFN_DBCS != 0
+          finfo->lfn[len*S_LFN_INCREMENT+1]=0;
+# endif
+        }
+        get_fileinfo(finfo, dir);
+      }
+    }
+# ifdef _MAX_LFN_LENGTH
+  skippedlfn:
+#endif
+#else
+    if (c != 0xE5 && ((dir[DIR_Attr] & AM_LFN) != AM_LFN))        /* Is it a valid entry? */
+      get_fileinfo(finfo, dir);
+#endif
+    if (!next_dir_entry(dj)) dj->sect = 0;                /* Next entry */
+    if (finfo->fname[0]) break;       /* Found valid entry */
+  }
+
+  return FR_OK;
+}
+
+
+
+
+#if _FS_MINIMIZE == 0
+/*-----------------------------------------------------------------------*/
+/* Get File Status                                                       */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_stat (
+#if _USE_DRIVE_PREFIX == 0
+  FATFS *fs,           /* Pointer to file system object */
+#endif
+  const UCHAR *path,   /* Pointer to the file path */
+  FILINFO *finfo       /* Pointer to file information to return */
+)
+{
+  FRESULT res;
+  DIR dj;
+  BYTE *dir;
+  UCHAR fn[8+3+1];
+#if _USE_DRIVE_PREFIX != 0
+  FATFS *fs;
+#endif
+#if _USE_LFN != 0
+  DIR fileobj;
+  const UCHAR* spath;
+  UINT len;
+#endif
+
+
+  res = auto_mount(&path, &fs, 0);
+  if (res == FR_OK) {
+    dj.fs = fs;
+
+#if _USE_LFN != 0
+    res = trace_path(&dj, fn, path, &dir, &fileobj, &spath, &len);
+#else
+    res = trace_path(&dj, fn, path, &dir);       /* trace the file path */
+#endif
+    if (res == FR_OK) {                          /* Trace completed */
+      if (dir)                                   /* Found an object */
+        get_fileinfo(finfo, dir);
+      else                                       /* It is root dir */
+        res = FR_INVALID_NAME;
+    }
+  }
+
+  return res;
+}
+
+
+
+#if !_FS_READONLY
+/*-----------------------------------------------------------------------*/
+/* Truncate File                                                         */
+/*-----------------------------------------------------------------------*/
+# if _USE_TRUNCATE
+FRESULT f_truncate (
+  FIL *fp   /* Pointer to the file object */
+)
+{
+  FRESULT res;
+  DWORD ncl;
+  FATFS *fs=fp->fs;
+
+
+  res = validate(fs /*, fp->id */);   /* Check validity of the object */
+  if (res != FR_OK) return res;
+  if (fp->flag & FA__ERROR) return FR_RW_ERROR; /* Check error flag */
+  if (!(fp->flag & FA_WRITE)) return FR_DENIED; /* Check access mode */
+
+  if (fp->fsize > fp->fptr) {
+    fp->fsize = fp->fptr; /* Set file size to current R/W point */
+    fp->flag |= FA__WRITTEN;
+    if (fp->fptr == 0) {  /* When set file size to zero, remove entire cluster chain */
+      if (!remove_chain(fp->fs, fp->org_clust)) goto ft_error;
+      fp->org_clust = 0;
+    } else {        /* When truncate a part of the file, remove remaining clusters */
+      ncl = get_cluster(fp->fs, fp->curr_clust);
+      if (ncl < 2) goto ft_error;
+      if (ncl < fp->fs->max_clust) {
+        if (!put_cluster(fp->fs, fp->curr_clust, 0x0FFFFFFF)) goto ft_error;
+        if (!remove_chain(fp->fs, ncl)) goto ft_error;
+      }
+    }
+  }
+
+  return FR_OK;
+
+ft_error: /* Abort this file due to an unrecoverable error */
+  fp->flag |= FA__ERROR;
+  return FR_RW_ERROR;
+}
+#endif
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Get Number of Free Clusters, stop if maxclust found                   */
+/*-----------------------------------------------------------------------*/
+
+FRESULT l_getfree (
+  FATFS *fs,          /* Pointer to file system object */
+  const UCHAR *drv,   /* Pointer to the logical drive number (root dir) */
+  DWORD *nclust,      /* Pointer to the variable to return number of free clusters */
+  DWORD maxclust      /* Stop after maxclust free clusters were found (0 = no limit) */
+)
+{
+  FRESULT res;
+  DWORD n, clust, sect;
+  BYTE fat, f, *p;
+
+  /* Get drive number */
+  res = auto_mount(&drv, &fs, 0);
+  if (res != FR_OK) return res;
+
+  /* If number of free cluster is valid, return it without cluster scan. */
+  if (fs->free_clust <= fs->max_clust - 2) {
+    *nclust = fs->free_clust;
+    return FR_OK;
+  }
+
+  /* Get number of free clusters */
+  fat = fs->fs_type;
+  n = 0;
+  if (fat == FS_FAT12) {
+    clust = 2;
+    do {
+      if ((WORD)get_cluster(fs, clust) == 0) n++;
+    } while (++clust < fs->max_clust);
+  } else {
+    clust = fs->max_clust;
+    sect = fs->fatbase;
+    f = 0; p = 0;
+    do {
+      if (maxclust && n >= maxclust) {
+        n = maxclust;
+        break;
+      }
+      if (!f) {
+        if (!move_fs_window(fs, sect++)) return FR_RW_ERROR;
+        p = FSBUF.data;
+      }
+      if (fat == FS_FAT16) {
+        if (LD_WORD(p) == 0) n++;
+        p += 2; f += 1;
+      } else {
+        if (LD_DWORD(p) == 0) n++;
+        p += 4; f += 2;
+      }
+    } while (--clust);
+  }
+  if (n < maxclust) {
+    fs->free_clust = n;
+#if _USE_FSINFO
+    if (fat == FS_FAT32) fs->fsi_flag = 1;
+#endif
+  }
+
+  *nclust = n;
+  return FR_OK;
+}
+
+/*-----------------------------------------------------------------------*/
+/* Get Number of Free Clusters                                           */
+/*-----------------------------------------------------------------------*/
+FRESULT f_getfree (
+#if _USE_DRIVE_PREFIX == 0
+  FATFS *fs,          /* Pointer to file system object */
+#endif
+  const UCHAR *drv,   /* Pointer to the logical drive number (root dir) */
+  DWORD *nclust       /* Pointer to the variable to return number of free clusters */
+#if _USE_DRIVE_PREFIX != 0
+  ,FATFS **fatfs      /* Pointer to pointer to corresponding file system object to return */
+#endif
+)
+{
+  FRESULT res;
+#if _USE_DRIVE_PREFIX != 0
+  FATFS *fs;
+#endif
+
+  /* Get drive number */
+  res = auto_mount(&drv, &fs, 0);
+  if (res != FR_OK) return res;
+#if _USE_DRIVE_PREFIX != 0
+  *fatfs = fs;
+#endif
+  return l_getfree(fs, drv, nclust, 0);
+}
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Delete a File or Directory                                            */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_unlink (
+#if _USE_DRIVE_PREFIX == 0
+  FATFS *fs,           /* Pointer to file system object */
+#endif
+  const UCHAR *path    /* Pointer to the file or directory path */
+)
+{
+  FRESULT res;
+  DIR dj;
+  BYTE *dir, *sdir;
+  DWORD dclust, dsect;
+  UCHAR fn[8+3+1];
+#if _USE_DRIVE_PREFIX != 0
+  FATFS *fs;
+#endif
+#if _USE_LFN != 0
+  DIR fileobj;
+  const UCHAR* spath;
+  UINT len;
+#endif
+
+
+  res = auto_mount(&path, &fs, 1);
+  if (res != FR_OK) return res;
+  dj.fs = fs;
+
+#if _USE_LFN != 0
+  res = trace_path(&dj, fn, path, &dir, &fileobj, &spath, &len);
+#else
+  res = trace_path(&dj, fn, path, &dir);        /* trace the file path */
+#endif
+  if (res != FR_OK) return res;                 /* Trace failed */
+  if (dir == NULL) return FR_INVALID_NAME;      /* It is the root directory */
+  if (dir[DIR_Attr] & AM_RDO) return FR_DENIED; /* It is a R/O object */
+# if _USE_CHDIR != 0
+  if(fn[0]=='.')
+    return FR_INVALID_NAME;
+# endif
+  dsect = FSBUF.sect;
+  dclust = ((DWORD)LD_WORD(&dir[DIR_FstClusHI]) << 16) | LD_WORD(&dir[DIR_FstClusLO]);
+
+  if (dir[DIR_Attr] & AM_DIR) {                 /* It is a sub-directory */
+#if _USE_CHDIR != 0 || _USE_CURR_DIR != 0
+    if (dclust == fs->curr_dir)                 /* Never delete the current directory */
+      return FR_DIR_NOT_EMPTY;
+#endif
+    dj.clust = dclust;                          /* Check if the sub-dir is empty or not */
+    dj.sect = clust2sect(fs, dclust);
+    dj.index = 2;
+    do {
+      if (!move_fs_window(fs, dj.sect)) return FR_RW_ERROR;
+      sdir = &FSBUF.data[(dj.index & ((SS(fs) - 1) >> 5)) * 32];
+      if (sdir[DIR_Name] == 0) break;
+      if (sdir[DIR_Name] != 0xE5 && !(sdir[DIR_Attr] & AM_VOL))
+        return FR_DIR_NOT_EMPTY;                /* The directory is not empty */
+    } while (next_dir_entry(&dj));
+  }
+
+#if _USE_LFN != 0
+  len=(len+25)/13;
+  while(len--) {
+    if (!move_fs_window(fs, fileobj.sect)) return FR_RW_ERROR;  /* Mark the directory entry 'deleted' */
+    dir = &FSBUF.data[(fileobj.index & ((SS(fs) - 1) >> 5)) * 32];
+    dir[DIR_Name] = 0xE5;
+    FSBUF.dirty = TRUE;
+    if (len && !next_dir_entry(&fileobj))             /* Next directory pointer */
+      return FR_RW_ERROR;
+  }
+#else
+  if (!move_fs_window(fs, dsect)) return FR_RW_ERROR; /* Mark the directory entry 'deleted' */
+  dir[DIR_Name] = 0xE5;
+  FSBUF.dirty = TRUE;
+#endif
+  if (!remove_chain(fs, dclust)) return FR_RW_ERROR;  /* Remove the cluster chain */
+
+  return sync(fs);
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Create a Directory                                                    */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_mkdir (
+#if _USE_DRIVE_PREFIX == 0
+  FATFS *fs,           /* Pointer to file system object */
+#endif
+  const UCHAR *path      /* Pointer to the directory path */
+)
+{
+  FRESULT res;
+  DIR dj;
+  BYTE *dir, *fw, n;
+  UCHAR fn[8+3+1];
+  DWORD sect, dsect, dclust, pclust, tim;
+#if _USE_DRIVE_PREFIX != 0
+  FATFS *fs;
+#endif
+#if _USE_LFN != 0
+  UINT len;
+  DIR fileobj;
+  const UCHAR* spath;
+#endif
+
+
+  res = auto_mount(&path, &fs, 1);
+  if (res != FR_OK) return res;
+  dj.fs = fs;
+
+#if _USE_LFN != 0
+  res = trace_path(&dj, fn, path, &dir, &fileobj, &spath, &len);
+#else
+  res = trace_path(&dj, fn, path, &dir);       /* trace the file path */
+#endif
+  if (res == FR_OK) return FR_EXIST;           /* Any file or directory is already existing */
+  if (res != FR_NO_FILE) return res;
+
+#if _USE_CHDIR != 0
+  if(fn[0]=='.')
+    return FR_INVALID_NAME;
+#endif
+#if _USE_LFN != 0
+  res = reserve_direntry(&dj, &dir,len);       /* Reserve a directory entry */
+#else
+  res = reserve_direntry(&dj, &dir);           /* Reserve a directory entry */
+#endif
+  if (res != FR_OK) return res;
+  sect = FSBUF.sect;
+  dclust = create_chain(fs, 0);                /* Allocate a cluster for new directory table */
+  if (dclust == 1) return FR_RW_ERROR;
+  dsect = clust2sect(fs, dclust);
+  if (!dsect) return FR_DENIED;
+  if (!move_fs_window(fs, dsect)) return FR_RW_ERROR;
+
+  fw = FSBUF.data;
+  memset(fw, 0, SS(fs));                       /* Clear the new directory table */
+  for (n = 1; n < fs->csize; n++) {
+    if (disk_write(fs->drive, fw, ++dsect, 1) != RES_OK)
+      return FR_RW_ERROR;
+  }
+  memset(&fw[DIR_Name], ' ', 8+3);             /* Create "." entry */
+  fw[DIR_Name] = '.';
+  fw[DIR_Attr] = AM_DIR;
+  tim = get_fattime();
+  ST_DWORD(&fw[DIR_WrtTime], tim);
+  memcpy(&fw[32], &fw[0], 32); fw[33] = '.';   /* Create ".." entry */
+  ST_WORD(&fw[   DIR_FstClusLO], dclust);
+  ST_WORD(&fw[   DIR_FstClusHI], dclust >> 16);
+  pclust = dj.sclust;
+  if (fs->fs_type == FS_FAT32 && pclust == fs->dirbase) pclust = 0;
+  ST_WORD(&fw[32+DIR_FstClusLO], pclust);
+  ST_WORD(&fw[32+DIR_FstClusHI], pclust >> 16);
+  FSBUF.dirty = TRUE;
+
+  if (!move_fs_window(fs, sect)) return FR_RW_ERROR;
+#if _USE_LFN != 0
+  if(len && add_direntry(&dj,&dir,spath,len,fn)) return FR_RW_ERROR;
+#endif
+  memset(&dir[0], 0, 32);                      /* Initialize the new entry */
+  memcpy(&dir[DIR_Name], fn, 8+3);             /* Name */
+  dir[DIR_NTres] = fn[11];
+  FSBUF.dirty = TRUE;
+  dir[DIR_Attr] = AM_DIR;                      /* Attribute */
+  ST_DWORD(&dir[DIR_WrtTime], tim);            /* Crated time */
+  ST_WORD(&dir[DIR_FstClusLO], dclust);        /* Table start cluster */
+  ST_WORD(&dir[DIR_FstClusHI], dclust >> 16);
+
+  return sync(fs);
+}
+
+
+
+#if _USE_CHDIR != 0
+/*-----------------------------------------------------------------------*/
+/* Change the current directory                                          */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_chdir (
+#if _USE_DRIVE_PREFIX == 0
+  FATFS *fs,           /* Pointer to file system object */
+#endif
+  const UCHAR *path    /* Pointer to the file name */
+)
+{
+#if _USE_DRIVE_PREFIX != 0
+  FATFS *fs;
+#endif
+  FRESULT res;
+  BYTE *dir;
+  DIR dj;
+  UCHAR fn[8+3+1];
+#if _USE_LFN != 0
+  UINT len;
+  DIR fileobj;
+  const UCHAR* spath;
+#endif
+
+  res = auto_mount(&path, &fs, 0);
+  if (res != FR_OK) return res;
+  dj.fs = fs;
+
+  /* Trace the file path */
+#if _USE_LFN != 0
+  res = trace_path(&dj, fn, path, &dir, &fileobj, &spath, &len);
+#else
+  res = trace_path(&dj, fn, path, &dir);   /* trace the file path */
+#endif
+
+  if (res == FR_OK) {
+    if (dir == NULL) {
+      fs->curr_dir = 0;
+    } else if (dir[DIR_Attr] & AM_DIR) {
+      fs->curr_dir =
+        ((DWORD)LD_WORD(&dir[DIR_FstClusHI]) << 16) |
+        LD_WORD(&dir[DIR_FstClusLO]);
+      } else
+        return FR_NOT_DIRECTORY;
+  }
+
+  return res;
+}
+#endif
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Change File Attribute                                                 */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_chmod (
+#if _USE_DRIVE_PREFIX == 0
+  FATFS *fs,           /* Pointer to file system object */
+#endif
+  const UCHAR *path,   /* Pointer to the file path */
+  BYTE value,          /* Attribute bits */
+  BYTE mask            /* Attribute mask to change */
+)
+{
+  FRESULT res;
+  DIR dj;
+  BYTE *dir;
+  UCHAR fn[8+3+1];
+#if _USE_DRIVE_PREFIX != 0
+  FATFS *fs;
+#endif
+#if _USE_LFN != 0
+  UINT len;
+  DIR fileobj;
+  const UCHAR* spath;
+#endif
+
+
+  res = auto_mount(&path, &fs, 1);
+  if (res == FR_OK) {
+    dj.fs = fs;
+#if _USE_LFN != 0
+    res = trace_path(&dj, fn, path, &dir, &fileobj, &spath, &len);       /* trace the file path */
+#else
+    res = trace_path(&dj, fn, path, &dir);       /* trace the file path */
+#endif
+    if (res == FR_OK) {                          /* Trace completed */
+      if (!dir || fn[0]=='.') {
+        res = FR_INVALID_NAME;                   /* Root directory */
+      } else {
+        mask &= AM_RDO|AM_HID|AM_SYS|AM_ARC;     /* Valid attribute mask */
+        dir[DIR_Attr] = (value & mask) | (dir[DIR_Attr] & (BYTE)~mask); /* Apply attribute change */
+        res = sync(fs);
+      }
+    }
+  }
+  return res;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Change Timestamp                                                      */
+/*-----------------------------------------------------------------------*/
+#if _USE_UTIME
+FRESULT f_utime (
+#if _USE_DRIVE_PREFIX == 0
+  FATFS *fs,            /* Pointer to file system object */
+#endif
+  const UCHAR *path,    /* Pointer to the file/directory name */
+  const FILINFO *finfo  /* Pointer to the timestamp to be set */
+)
+{
+#if _USE_DRIVE_PREFIX != 0
+  FATFS *fs;
+#endif
+  FRESULT res;
+  DIR dj;
+  BYTE *dir;
+  CHAR fn[8+3+1];
+#if _USE_LFN != 0
+  UINT len;
+  DIR fileobj;
+  const UCHAR* spath;
+#endif
+
+  res = auto_mount(&path, &fs, 1);
+  if (res == FR_OK) {
+    dj.fs=fs;
+#if _USE_LFN != 0
+    res = trace_path(&dj, fn, path, &dir, &fileobj, &spath, &len);
+#else
+    res = trace_path(&dj, fn, path, &dir);   /* trace the file path */
+#endif
+    if (res == FR_OK) {                      /* Trace completed */
+      if (!dir) {
+        res = FR_INVALID_NAME;               /* Root directory */
+      } else {
+        ST_WORD(&dir[DIR_WrtTime], finfo->ftime);
+        ST_WORD(&dir[DIR_WrtDate], finfo->fdate);
+        res = sync(fs);
+      }
+    }
+  }
+  return res;
+}
+#endif
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Rename File/Directory                                                 */
+/*-----------------------------------------------------------------------*/
+
+FRESULT f_rename (
+#if _USE_DRIVE_PREFIX == 0
+  FATFS *fs,              /* Pointer to file system object */
+#endif
+  const UCHAR *path_old,   /* Pointer to the old name */
+  const UCHAR *path_new    /* Pointer to the new name */
+)
+{
+  FRESULT res;
+  DIR dj;
+  DWORD sect_old;
+  BYTE *dir_old, *dir_new, direntry[32-11];
+  UCHAR fn[8+3+1];
+#if _USE_DRIVE_PREFIX != 0
+  FATFS *fs;
+#endif
+#if _USE_LFN != 0
+  UINT len_old, len_new;
+  DIR fileobj;
+  const UCHAR* spath;
+#endif
+
+
+  res = auto_mount(&path_old, &fs, 1);
+  if (res != FR_OK) return res;
+  dj.fs = fs;
+
+#if _USE_LFN != 0
+  res = trace_path(&dj, fn, path_old, &dir_old, &fileobj, &spath, &len_old);
+#else
+  res = trace_path(&dj, fn, path_old, &dir_old);       /* trace the file path */
+#endif
+  if (res != FR_OK) return res;                        /* The old object is not found */
+  if (!dir_old) return FR_NO_FILE;
+  sect_old = FSBUF.sect;                               /* Save the object information */
+  memcpy(direntry, &dir_old[DIR_Attr], 32-11);
+
+#if _USE_LFN != 0
+  res = trace_path(&dj, fn, path_new, &dir_new, &fileobj, &spath, &len_new);
+#else
+  res = trace_path(&dj, fn, path_new, &dir_new);       /* trace the file path */
+#endif
+  if (res == FR_OK) return FR_EXIST;                   /* The new object name is already existing */
+  if (res != FR_NO_FILE) return res;                   /* Is there no old name? */
+#if _USE_CHDIR != 0
+  if(fn[0]=='.')
+    return FR_INVALID_NAME;
+#endif
+#if _USE_LFN != 0
+  res = reserve_direntry(&dj, &dir_new,len_new);       /* Reserve a directory entry */
+  if (res != FR_OK) return res;
+
+  if(len_new && add_direntry(&dj,&dir_new,spath,len_new,fn))  /* need to get shortname, check it, and add all names */
+    return FR_RW_ERROR;
+#else
+  res = reserve_direntry(&dj, &dir_new);               /* Reserve a directory entry */
+  if (res != FR_OK) return res;
+#endif
+  memcpy(&dir_new[DIR_Attr], direntry, 32-11);         /* Create new entry */
+  memcpy(&dir_new[DIR_Name], fn, 8+3);
+  dir_new[DIR_NTres] = fn[11];
+  FSBUF.dirty = TRUE;
+
+#if _USE_LFN != 0
+  /* Trace it again, fileobj was clobbered while tracing the new path */
+  res = trace_path(&dj, fn, path_old, &dir_old, &fileobj, &spath, &len_old);
+  len_old=(len_old+25)/13;
+  while(len_old--) {
+    if (!move_fs_window(fs, fileobj.sect)) return FR_RW_ERROR;    /* Mark the directory entry 'deleted' */
+    dir_old = &FSBUF.data[(fileobj.index & ((SS(fs) - 1) >> 5)) * 32];
+    dir_old[DIR_Name] = 0xE5;
+    FSBUF.dirty = TRUE;
+    if (!next_dir_entry(&fileobj))                     /* Next directory pointer */
+      return FR_RW_ERROR;
+  }
+#else
+  if (!move_fs_window(fs, sect_old)) return FR_RW_ERROR;          /* Remove old entry */
+  dir_old[DIR_Name] = 0xE5;
+#endif
+
+  return sync(fs);
+}
+
+#endif /* !_FS_READONLY */
+#endif /* _FS_MINIMIZE == 0 */
+#endif /* _FS_MINIMIZE <= 1 */
+#endif /* _FS_MINIMIZE <= 2 */
+
+
+
+#if _USE_MKFS && !_FS_READONLY
+/*-----------------------------------------------------------------------*/
+/* Create File System on the Drive                                       */
+/*-----------------------------------------------------------------------*/
+
+#define N_ROOTDIR 512           /* Multiple of 32 and <= 2048 */
+#define N_FATS    1             /* 1 or 2 */
+#define MAX_SECTOR  64000000UL  /* Maximum partition size */
+#define MIN_SECTOR  2000UL      /* Minimum partition size */
+
+
+FRESULT f_mkfs (
+  BYTE drv,         /* Logical drive number */
+  BYTE partition,   /* Partitioning rule 0:FDISK, 1:SFD */
+  WORD allocsize    /* Allocation unit size [bytes] */
+)
+{
+  BYTE fmt, m, *tbl;
+  DWORD b_part, b_fat, b_dir, b_data;     /* Area offset (LBA) */
+  DWORD n_part, n_rsv, n_fat, n_dir;      /* Area size */
+  DWORD n_clust, n;
+  FATFS *fs;
+  DSTATUS stat;
+
+
+  /* Check validity of the parameters */
+  if (drv >= _LOGICAL_DRIVES) return FR_INVALID_DRIVE;
+  if (partition >= 2) return FR_MKFS_ABORTED;
+  for (n = 512; n <= 32768U && n != allocsize; n <<= 1);
+  if (n != allocsize) return FR_MKFS_ABORTED;
+
+  /* Check mounted drive and clear work area */
+  fs = FatFs[drv];
+  if (!fs) return FR_NOT_ENABLED;
+  fs->fs_type = 0;
+  drv = LD2PD(drv);
+
+  /* Get disk statics */
+  stat = disk_initialize(drv);
+  if (stat & STA_NOINIT) return FR_NOT_READY;
+  if (stat & STA_PROTECT) return FR_WRITE_PROTECTED;
+  if (disk_ioctl(drv, GET_SECTOR_COUNT, &n_part) != RES_OK || n_part < MIN_SECTOR)
+    return FR_MKFS_ABORTED;
+  if (n_part > MAX_SECTOR) n_part = MAX_SECTOR;
+  b_part = (!partition) ? 63 : 0;         /* Boot sector */
+  n_part -= b_part;
+#if S_MAX_SIZ > 512                       /* Check disk sector size */
+  if (disk_ioctl(drv, GET_SECTOR_SIZE, &SS(fs)) != RES_OK
+    || SS(fs) > S_MAX_SIZ
+    || SS(fs) > allocsize)
+    return FR_MKFS_ABORTED;
+#endif
+  allocsize /= SS(fs);                     /* Number of sectors per cluster */
+
+  /* Pre-compute number of clusters and FAT type */
+  n_clust = n_part / allocsize;
+  fmt = FS_FAT12;
+  if (n_clust >= 0xFF5) fmt = FS_FAT16;
+  if (n_clust >= 0xFFF5) fmt = FS_FAT32;
+
+  /* Determine offset and size of FAT structure */
+  switch (fmt) {
+  case FS_FAT12:
+    n_fat = ((n_clust * 3 + 1) / 2 + 3 + SS(fs) - 1) / SS(fs);
+    n_rsv = 1 + partition;
+    n_dir = N_ROOTDIR * 32 / SS(fs);
+    break;
+  case FS_FAT16:
+    n_fat = ((n_clust * 2) + 4 + SS(fs) - 1) / SS(fs);
+    n_rsv = 1 + partition;
+    n_dir = N_ROOTDIR * 32 / SS(fs);
+    break;
+  default:
+    n_fat = ((n_clust * 4) + 8 + SS(fs) - 1) / SS(fs);
+    n_rsv = 33 - partition;
+    n_dir = 0;
+  }
+  b_fat = b_part + n_rsv;                 /* FATs start sector */
+  b_dir = b_fat + n_fat * N_FATS;         /* Directory start sector */
+  b_data = b_dir + n_dir;                 /* Data start sector */
+
+  /* Align data start sector to erase block boundary (for flash memory media) */
+  if (disk_ioctl(drv, GET_BLOCK_SIZE, &n) != RES_OK) return FR_MKFS_ABORTED;
+  n = (b_data + n - 1) & ~(n - 1);
+  n_fat += (n - b_data) / N_FATS;
+  /* b_dir and b_data are no longer used below */
+
+  /* Determine number of cluster and final check of validity of the FAT type */
+  n_clust = (n_part - n_rsv - n_fat * N_FATS - n_dir) / allocsize;
+  if (   (fmt == FS_FAT16 && n_clust < 0xFF5)
+    || (fmt == FS_FAT32 && n_clust < 0xFFF5))
+    return FR_MKFS_ABORTED;
+
+  /* Create partition table if needed */
+  if (!partition) {
+    DWORD n_disk = b_part + n_part;
+
+    tbl = &FSBUF.data[MBR_Table];
+    ST_DWORD(&tbl[0], 0x00010180);        /* Partition start in CHS */
+    if (n_disk < 63UL * 255 * 1024) {     /* Partition end in CHS */
+      n_disk = n_disk / 63 / 255;
+      tbl[7] = (BYTE)n_disk;
+      tbl[6] = (BYTE)((n_disk >> 2) | 63);
+    } else {
+      ST_WORD(&tbl[6], 0xFFFF);
+    }
+    tbl[5] = 254;
+    if (fmt != FS_FAT32)                  /* System ID */
+      tbl[4] = (n_part < 0x10000) ? 0x04 : 0x06;
+    else
+      tbl[4] = 0x0c;
+    ST_DWORD(&tbl[8], 63);                /* Partition start in LBA */
+    ST_DWORD(&tbl[12], n_part);           /* Partition size in LBA */
+    ST_WORD(&tbl[64], 0xAA55);            /* Signature */
+    if (disk_write(drv, FSBUF.data, 0, 1) != RES_OK)
+      return FR_RW_ERROR;
+  }
+
+  /* Create boot record */
+  tbl = FSBUF.data;                       /* Clear buffer */
+  memset(tbl, 0, SS(fs));
+  ST_DWORD(&tbl[BS_jmpBoot], 0x90FEEB);   /* Boot code (jmp $, nop) */
+  ST_WORD(&tbl[BPB_BytsPerSec], SS(fs));  /* Sector size */
+  tbl[BPB_SecPerClus] = (BYTE)allocsize;  /* Sectors per cluster */
+  ST_WORD(&tbl[BPB_RsvdSecCnt], n_rsv);   /* Reserved sectors */
+  tbl[BPB_NumFATs] = N_FATS;              /* Number of FATs */
+  ST_WORD(&tbl[BPB_RootEntCnt], SS(fs) / 32 * n_dir);      /* Number of rootdir entries */
+  if (n_part < 0x10000) {                 /* Number of total sectors */
+    ST_WORD(&tbl[BPB_TotSec16], n_part);
+  } else {
+    ST_DWORD(&tbl[BPB_TotSec32], n_part);
+  }
+  tbl[BPB_Media] = 0xF8;                  /* Media descripter */
+  ST_WORD(&tbl[BPB_SecPerTrk], 63);       /* Number of sectors per track */
+  ST_WORD(&tbl[BPB_NumHeads], 255);       /* Number of heads */
+  ST_DWORD(&tbl[BPB_HiddSec], b_part);    /* Hidden sectors */
+  n = get_fattime();                      /* Use current time as a VSN */
+  if (fmt != FS_FAT32) {
+    ST_DWORD(&tbl[BS_VolID], n);          /* Volume serial number */
+    ST_WORD(&tbl[BPB_FATSz16], n_fat);    /* Number of secters per FAT */
+    tbl[BS_DrvNum] = 0x80;                /* Drive number */
+    tbl[BS_BootSig] = 0x29;               /* Extended boot signature */
+    memcpy(&tbl[BS_VolLab], "NO NAME    FAT     ", 19);   /* Volume lavel, FAT signature */
+  } else {
+    ST_DWORD(&tbl[BS_VolID32], n);        /* Volume serial number */
+    ST_DWORD(&tbl[BPB_FATSz32], n_fat);   /* Number of secters per FAT */
+    ST_DWORD(&tbl[BPB_RootClus], 2);      /* Root directory cluster (2) */
+    ST_WORD(&tbl[BPB_FSInfo], 1);         /* FSInfo record (bs+1) */
+    ST_WORD(&tbl[BPB_BkBootSec], 6);      /* Backup boot record (bs+6) */
+    tbl[BS_DrvNum32] = 0x80;              /* Drive number */
+    tbl[BS_BootSig32] = 0x29;             /* Extended boot signature */
+    memcpy(&tbl[BS_VolLab32], "NO NAME    FAT32   ", 19); /* Volume lavel, FAT signature */
+  }
+  ST_WORD(&tbl[BS_55AA], 0xAA55);         /* Signature */
+  if (disk_write(drv, tbl, b_part+0, 1) != RES_OK)
+    return FR_RW_ERROR;
+  if (fmt == FS_FAT32)
+    disk_write(drv, tbl, b_part+6, 1);
+
+  /* Initialize FAT area */
+  for (m = 0; m < N_FATS; m++) {
+    memset(tbl, 0, SS(fs));               /* 1st sector of the FAT  */
+    if (fmt != FS_FAT32) {
+      n = (fmt == FS_FAT12) ? 0x00FFFFF8 : 0xFFFFFFF8;
+      ST_DWORD(&tbl[0], n);               /* Reserve cluster #0-1 (FAT12/16) */
+    } else {
+      ST_DWORD(&tbl[0], 0xFFFFFFF8);      /* Reserve cluster #0-1 (FAT32) */
+      ST_DWORD(&tbl[4], 0xFFFFFFFF);
+      ST_DWORD(&tbl[8], 0x0FFFFFFF);      /* Reserve cluster #2 for root dir */
+    }
+    if (disk_write(drv, tbl, b_fat++, 1) != RES_OK)
+      return FR_RW_ERROR;
+    memset(tbl, 0, SS(fs));               /* Following FAT entries are filled by zero */
+    for (n = 1; n < n_fat; n++) {
+      if (disk_write(drv, tbl, b_fat++, 1) != RES_OK)
+        return FR_RW_ERROR;
+    }
+  }
+
+  /* Initialize Root directory */
+  m = (BYTE)((fmt == FS_FAT32) ? allocsize : n_dir);
+  do {
+    if (disk_write(drv, tbl, b_fat++, 1) != RES_OK)
+      return FR_RW_ERROR;
+  } while (--m);
+
+  /* Create FSInfo record if needed */
+  if (fmt == FS_FAT32) {
+    ST_WORD(&tbl[BS_55AA], 0xAA55);
+    ST_DWORD(&tbl[FSI_LeadSig], 0x41615252);
+    ST_DWORD(&tbl[FSI_StrucSig], 0x61417272);
+    ST_DWORD(&tbl[FSI_Free_Count], n_clust - 1);
+    ST_DWORD(&tbl[FSI_Nxt_Free], 0xFFFFFFFF);
+    disk_write(drv, tbl, b_part+1, 1);
+    disk_write(drv, tbl, b_part+7, 1);
+  }
+
+  return (disk_ioctl(drv, CTRL_SYNC, NULL) == RES_OK) ? FR_OK : FR_RW_ERROR;
+}
+
+#endif /* _USE_MKFS && !_FS_READONLY */
+
+
+
+
+#if _USE_STRFUNC >= 1
+/*-----------------------------------------------------------------------*/
+/* Get a string from the file                                            */
+/*-----------------------------------------------------------------------*/
+char* fgets (
+    char* buff, /* Pointer to the string buffer to read */
+    int len,    /* Size of string buffer */
+    FIL* fil    /* Pointer to the file object */
+)
+{
+    int i = 0;
+    char *p = buff;
+    UINT rc;
+
+
+    while (i < len - 1) {           /* Read bytes until buffer gets filled */
+        f_read(fil, p, 1, &rc);
+        if (rc != 1) break;         /* Break when no data to read */
+#if _USE_STRFUNC >= 2
+        if (*p == '\r') continue;   /* Strip '\r' */
+#endif
+        i++;
+        if (*p++ == '\n') break;    /* Break when reached end of line */
+    }
+    *p = 0;
+    return i ? buff : 0;            /* When no data read (eof or error), return with error. */
+}
+
+
+
+#if !_FS_READONLY
+#include <stdarg.h>
+/*-----------------------------------------------------------------------*/
+/* Put a character to the file                                           */
+/*-----------------------------------------------------------------------*/
+int fputc (
+    int chr,    /* A character to be output */
+    FIL* fil    /* Ponter to the file object */
+)
+{
+    UINT bw;
+    char c;
+
+
+#if _USE_STRFUNC >= 2
+    if (chr == '\n') fputc ('\r', fil); /* LF -> CRLF conversion */
+#endif
+    if (!fil) { /* Special value may be used to switch the destination to any other device */
+    /*  put_console(chr);   */
+        return chr;
+    }
+    c = (char)chr;
+    f_write(fil, &c, 1, &bw);   /* Write a byte to the file */
+    return bw ? chr : EOF;      /* Return the resulut */
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Put a string to the file                                              */
+/*-----------------------------------------------------------------------*/
+int fputs (
+    const char* str,    /* Pointer to the string to be output */
+    FIL* fil            /* Pointer to the file object */
+)
+{
+    int n;
+
+
+    for (n = 0; *str; str++, n++) {
+        if (fputc(*str, fil) == EOF) return EOF;
+    }
+    return n;
+}
+
+
+
+
+/*-----------------------------------------------------------------------*/
+/* Put a formatted string to the file                                    */
+/*-----------------------------------------------------------------------*/
+int fprintf (
+    FIL* fil,           /* Pointer to the file object */
+    const char* str,    /* Pointer to the format string */
+    ...                 /* Optional arguments... */
+)
+{
+    va_list arp;
+    UCHAR c, f, r;
+    ULONG val;
+    char s[16];
+    int i, w, res, cc;
+
+
+    va_start(arp, str);
+
+    for (cc = res = 0; cc != EOF; res += cc) {
+        c = *str++;
+        if (c == 0) break;          /* End of string */
+        if (c != '%') {             /* Non escape cahracter */
+            cc = fputc(c, fil);
+            if (cc != EOF) cc = 1;
+            continue;
+        }
+        w = f = 0;
+        c = *str++;
+        if (c == '0') {             /* Flag: '0' padding */
+            f = 1; c = *str++;
+        }
+        while (c >= '0' && c <= '9') {  /* Precision */
+            w = w * 10 + (c - '0');
+            c = *str++;
+        }
+        if (c == 'l') {             /* Prefix: Size is long int */
+            f |= 2; c = *str++;
+        }
+        if (c == 's') {             /* Type is string */
+            cc = fputs(va_arg(arp, char*), fil);
+            continue;
+        }
+        if (c == 'c') {             /* Type is character */
+            cc = fputc(va_arg(arp, char), fil);
+            if (cc != EOF) cc = 1;
+            continue;
+        }
+        r = 0;
+        if (c == 'd') r = 10;       /* Type is signed decimal */
+        if (c == 'u') r = 10;       /* Type is unsigned decimal */
+        if (c == 'X') r = 16;       /* Type is unsigned hexdecimal */
+        if (r == 0) break;          /* Unknown type */
+        if (f & 2) {                /* Get the value */
+            val = (ULONG)va_arg(arp, long);
+        } else {
+            val = (c == 'd') ? (ULONG)(long)va_arg(arp, int) : (ULONG)va_arg(arp, unsigned int);
+        }
+        /* Put numeral string */
+        if (c == 'd') {
+            if (val >= 0x80000000) {
+                val = 0 - val;
+                f |= 4;
+            }
+        }
+        i = sizeof(s) - 1; s[i] = 0;
+        do {
+            c = (UCHAR)(val % r + '0');
+            if (c > '9') c += 7;
+            s[--i] = c;
+            val /= r;
+        } while (i && val);
+        if (i && (f & 4)) s[--i] = '-';
+        w = sizeof(s) - 1 - w;
+        while (i && i > w) s[--i] = (f & 1) ? '0' : ' ';
+        cc = fputs(&s[i], fil);
+    }
+
+    va_end(arp);
+    return (cc == EOF) ? cc : res;
+}
+
+#endif /* !_FS_READONLY */
+#endif /* _USE_STRFUNC >= 1*/
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/ff.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/ff.h
new file mode 100644
index 00000000..920591fb
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/ff.h
@@ -0,0 +1,446 @@
+/*--------------------------------------------------------------------------/
+/  FatFs - FAT file system module include file  R0.06        (C)ChaN, 2008
+/---------------------------------------------------------------------------/
+/ FatFs module is an experimenal project to implement FAT file system to
+/ cheap microcontrollers. This is a free software and is opened for education,
+/ research and development under license policy of following trems.
+/
+/  Copyright (C) 2008, ChaN, all right reserved.
+/
+/ * The FatFs module is a free software and there is no warranty.
+/ * You can use, modify and/or redistribute it for personal, non-profit or
+/ * commercial use without any restriction under your responsibility.
+/ * Redistributions of source code must retain the above copyright notice.
+/
+/---------------------------------------------------------------------------*/
+
+#ifndef _FATFS
+
+#define _MCU_ENDIAN     1
+/* The _MCU_ENDIAN defines which access method is used to the FAT structure.
+/  1: Enable word access.
+/  2: Disable word access and use byte-by-byte access instead.
+/  When the architectural byte order of the MCU is big-endian and/or address
+/  miss-aligned access results incorrect behavior, the _MCU_ENDIAN must be set
+/  to 2. If it is not the case, it can be set to 1 for good code efficiency. */
+
+#define _FS_READONLY    0
+/* Setting _FS_READONLY to 1 defines read only configuration. This removes
+/  writing functions, f_write, f_sync, f_unlink, f_mkdir, f_chmod, f_rename,
+/  f_truncate and useless f_getfree. */
+
+#define _FS_MINIMIZE    0
+/* The _FS_MINIMIZE option defines minimization level to remove some functions.
+/  0: Full function.
+/  1: f_stat, f_getfree, f_unlink, f_mkdir, f_chmod, f_truncate and f_rename are removed.
+/  2: f_opendir and f_readdir are removed in addition to level 1.
+/  3: f_lseek is removed in addition to level 2. */
+
+#define _USE_STRFUNC    0
+/* To enable string functions, set _USE_STRFUNC to 1 or 2. */
+
+#define _DRIVES     MAX_DRIVES
+/* Number of physical drives to be used. This affects the size of internal
+ * table. (when using _USE_DRIVE_PREFIX */
+
+#define _USE_MKFS   0
+/* When _USE_MKFS is set to 1 and _FS_READONLY is set to 0, f_mkfs function is
+/  enabled. */
+
+#define _MULTI_PARTITION    1
+/* When _MULTI_PARTITION is set to 0, each logical drive is bound to the same
+/  physical drive number and can mount only 1st primary partition.
+/
+/  When it is set to 1, the low _PARTITION_MASK bits of each partition represent
+/  the partition and the high (8-_PARTITION_MASK) bits represent the physical
+/  drive */
+
+#define _PARTITION_MASK     4
+
+#define _USE_FSINFO 1
+/* To enable FSInfo support on FAT32 volume, set _USE_FSINFO to 1. */
+
+#define _USE_SJIS   0
+/* When _USE_SJIS is set to 1, Shift-JIS code transparency is enabled, otherwise
+/  only US-ASCII(7bit) code can be accepted as file/directory name. */
+
+#define _USE_NTFLAG 0
+/* When _USE_NTFLAG is set to 1, upper/lower case of the file name is preserved.
+/  Note that the files are always accessed in case insensitive. */
+
+#define _USE_CHDIR 0
+
+#define _USE_CURR_DIR 1
+
+#define _USE_LFN 1
+
+/* Maximum number of characters to return for a LFN */
+/* The buffer used for FILINFO.lfn must be at least */
+/* _MAX_LFN_LENGTH+1 characters long!               */
+/* Note that if _USE_LFN_DBCS is set, this value    */
+/* represents the characters needed, not bytes      */
+#define _MAX_LFN_LENGTH 20
+
+/* When _USE_LFN_DBCS is set to 1, FILINFO.lfn will contain a DBCS string, not
+/  a simple ASCII string  */
+#define _USE_LFN_DBCS 0
+
+/* When set to 1, All FIL objects will use the buffer.  This reduces memory
+/  requirements as open files will only require space for a FIL object, but
+/  operate slower. When set, ff.c will behave like tff.c, but will allow
+/  multiple filesystems.  */
+#define _USE_FS_BUF 1
+
+/* When set to 1, All objects will use a static  buffer.  This reduces memory
+/  requirements to the absolute minimum ~512 bytes for the buffer, but will
+/  operate slower.  This option can only be set if _USE_FS_BUF is set.  */
+#define _USE_1_BUF 1
+
+/* If set to 1, FatFs will manage the FATFS structures after mounting.  If
+/  set to 0, the caller must send the correct drive FATFS structure for each
+/  call.  Normally, this should be set to 1, but if the caller wants to use
+/  low level l_* functions or skip sending the drive number in the path string,
+/  this must be turned off.  */
+#define _USE_DRIVE_PREFIX 0
+
+/* If set to 1, FatFS will delay mounting the drive until first use.  Normally,
+/  this should be turned on.  However, it cannot be used with
+/  _USE_DRIVE_PREFIX = 0  */
+#define _USE_DEFERRED_MOUNT 0
+
+/* New features in 0.05a, not required yet */
+#define _USE_TRUNCATE 0
+#define _USE_UTIME   0
+
+#include "integer.h"
+
+#if _USE_LFN_DBCS != 0
+#define S_LFN_OFFSET 26
+#define S_LFN_INCREMENT 2
+#else
+#define S_LFN_OFFSET 13
+#define S_LFN_INCREMENT 1
+#endif
+
+/* Definitions corresponds to multiple sector size (not tested) */
+#define S_MAX_SIZ   512U            /* Do not change */
+#if S_MAX_SIZ > 512U
+#define SS(fs)  ((fs)->s_size)
+#else
+#define SS(fs)  512U
+#endif
+
+#if _USE_1_BUF == 1 && _USE_FS_BUF == 0
+#error You can only use 1_BUF with _USE_FS_BUF at present
+#define _USE_1_BUF 0
+#endif
+
+typedef struct _BUF {
+  DWORD sect;
+  BYTE  dirty;              /* dirty flag (1:must be written back) */
+//BYTE  pad1;
+#if _USE_1_BUF != 0
+  struct _FATFS *fs;
+#endif
+  BYTE  data[S_MAX_SIZ];    /* Disk access window for Directory/FAT */
+} BUF;
+
+/* File system object structure */
+typedef struct _FATFS {
+  //WORD    id;             /* File system mount ID */
+    WORD    n_rootdir;      /* Number of root directory entries */
+    DWORD   sects_fat;      /* Sectors per fat */
+    DWORD   max_clust;      /* Maximum cluster# + 1 */
+    DWORD   fatbase;        /* FAT start sector */
+    DWORD   dirbase;        /* Root directory start sector (cluster# for FAT32) */
+    DWORD   database;       /* Data start sector */
+#if _USE_CHDIR != 0 || _USE_CURR_DIR != 0
+    DWORD curr_dir;
+#endif
+#if !_FS_READONLY
+    DWORD   last_clust;     /* Last allocated cluster */
+    DWORD   free_clust;     /* Number of free clusters */
+#if _USE_FSINFO
+    DWORD   fsi_sector;     /* fsinfo sector */
+    BYTE    fsi_flag;       /* fsinfo dirty flag (1:must be written back) */
+  //BYTE    pad2;
+#endif
+#endif
+    BYTE    fs_type;        /* FAT sub type */
+    BYTE    csize;          /* Number of sectors per cluster */
+#if S_MAX_SIZ > 512U
+    WORD    s_size;         /* Sector size */
+#endif
+    BYTE    n_fats;         /* Number of FAT copies */
+    BYTE    drive;          /* Physical drive number */
+#if _USE_1_BUF == 0
+    BUF   buf;
+#endif
+} FATFS;
+
+/* Directory object structure */
+typedef struct _DIR {
+  //WORD    id;         /* Owner file system mount ID */
+    WORD    index;      /* Current index */
+    FATFS*  fs;         /* Pointer to the owner file system object */
+    DWORD   sclust;     /* Start cluster */
+    DWORD   clust;      /* Current cluster */
+    DWORD   sect;       /* Current sector */
+} DIR;
+
+
+/* File object structure */
+typedef struct _FIL {
+  //WORD    id;             /* Owner file system mount ID */
+    BYTE    flag;           /* File status flags */
+    BYTE    csect;          /* Sector address in the cluster */
+    FATFS*  fs;             /* Pointer to the owner file system object */
+    DWORD   fptr;           /* File R/W pointer */
+    DWORD   fsize;          /* File size */
+    DWORD   org_clust;      /* File start cluster */
+    DWORD   curr_clust;     /* Current cluster */
+    DWORD   curr_sect;      /* Current sector */
+#if _FS_READONLY == 0
+    DWORD   dir_sect;       /* Sector containing the directory entry */
+    BYTE*   dir_ptr;        /* Ponter to the directory entry in the window */
+#endif
+#if _USE_LESS_BUF == 0 && _USE_1_BUF == 0
+    BUF   buf;              /* File R/W buffer */
+#endif
+} FIL;
+
+
+/* File status structure */
+typedef struct _FILINFO {
+    DWORD fsize;            /* Size */
+    WORD fdate;             /* Date */
+    WORD ftime;             /* Time */
+    BYTE fattrib;           /* Attribute */
+    DWORD clust;            /* Start cluster */
+    UCHAR fname[8+1+3+1];   /* Name (8.3 format) */
+#if _USE_LFN != 0
+    UCHAR* lfn;
+#endif
+} FILINFO;
+
+
+
+/* Definitions corresponds to multi partition */
+
+#if _MULTI_PARTITION != 0   /* Multiple partition cfg */
+
+#define LD2PD(drv) (drv >> (8-_PARTITION_MASK))       /* Get physical drive# */
+#define LD2PT(drv) (drv & ((1<<_PARTITION_MASK)-1))   /* Get partition# */
+#define _LOGICAL_DRIVES (_DRIVES * (1<<_PARTITION_MASK))
+
+#else                               /* Single partition cfg */
+
+#define LD2PD(drv) (drv)            /* Physical drive# is equal to logical drive# */
+#define LD2PT(drv) 0                /* Always mounts the 1st partition */
+#define _LOGICAL_DRIVES _DRIVES
+
+#endif
+
+
+/* File function return code (FRESULT) */
+
+typedef enum {
+    FR_OK = 0,          /* 0 */
+    FR_NOT_READY,       /* 1 */
+    FR_NO_FILE,         /* 2 */
+    FR_NO_PATH,         /* 3 */
+    FR_INVALID_NAME,    /* 4 */
+    FR_INVALID_DRIVE,   /* 5 */
+    FR_DENIED,          /* 6 */
+    FR_EXIST,           /* 7 */
+    FR_RW_ERROR,        /* 8 */
+    FR_WRITE_PROTECTED, /* 9 */
+    FR_NOT_ENABLED,     /* 10 */
+    FR_NO_FILESYSTEM,   /* 11 */
+    FR_INVALID_OBJECT,  /* 12 */
+    FR_MKFS_ABORTED,    /* 13 */
+    FR_IS_DIRECTORY,    /* 13 */
+    FR_IS_READONLY,     /* 14 */
+    FR_DIR_NOT_EMPTY,   /* 15 */
+    FR_NOT_DIRECTORY    /* 16 */
+} FRESULT;
+
+
+
+/*-----------------------------------------------------*/
+/* FatFs module application interface                  */
+
+#if _USE_DRIVE_PREFIX == 0
+FRESULT f_mount (BYTE, FATFS*);                             /* Mount/Unmount a logical drive */
+FRESULT f_open (FATFS*, FIL*, const UCHAR*, BYTE);          /* Open or create a file */
+FRESULT f_read (FIL*, void*, UINT, UINT*);                  /* Read data from a file */
+FRESULT f_write (FIL*, const void*, UINT, UINT*);           /* Write data to a file */
+FRESULT f_lseek (FIL*, DWORD);                              /* Move file pointer of a file object */
+FRESULT f_close (FIL*);                                     /* Close an open file object */
+FRESULT f_opendir (FATFS*, DIR*, const UCHAR*);             /* Open an existing directory */
+FRESULT f_readdir (DIR*, FILINFO*);                         /* Read a directory item */
+FRESULT f_stat (FATFS*, const UCHAR*, FILINFO*);            /* Get file status */
+FRESULT f_getfree (FATFS*, const UCHAR*, DWORD*);           /* Get number of free clusters on the drive */
+FRESULT f_sync (FIL*);                                      /* Flush cached data of a writing file */
+FRESULT f_unlink (FATFS*, const UCHAR*);                    /* Delete an existing file or directory */
+FRESULT f_mkdir (FATFS*, const UCHAR*);                     /* Create a new directory */
+FRESULT f_chmod (FATFS*, const UCHAR*, BYTE, BYTE);         /* Change file/dir attriburte */
+FRESULT f_rename (FATFS*, const UCHAR*, const UCHAR*);      /* Rename/Move a file or directory */
+FRESULT f_mkfs (BYTE, BYTE, WORD);                          /* Create a file system on the drive */
+FRESULT f_chdir (FATFS*, const UCHAR*);                     /* Change current directory */
+
+#else
+
+FRESULT f_mount (BYTE, FATFS*);                             /* Mount/Unmount a logical drive */
+FRESULT f_open (FIL*, const UCHAR*, BYTE);                  /* Open or create a file */
+FRESULT f_read (FIL*, void*, UINT, UINT*);                  /* Read data from a file */
+FRESULT f_write (FIL*, const void*, UINT, UINT*);           /* Write data to a file */
+FRESULT f_lseek (FIL*, DWORD);                              /* Move file pointer of a file object */
+FRESULT f_close (FIL*);                                     /* Close an open file object */
+FRESULT f_opendir (DIR*, const UCHAR*);                     /* Open an existing directory */
+FRESULT f_readdir (DIR*, FILINFO*);                         /* Read a directory item */
+FRESULT f_stat (const UCHAR*, FILINFO*);                    /* Get file status */
+FRESULT f_getfree (const UCHAR*, DWORD*, FATFS**);          /* Get number of free clusters on the drive */
+FRESULT f_sync (FIL*);                                      /* Flush cached data of a writing file */
+FRESULT f_unlink (const UCHAR*);                            /* Delete an existing file or directory */
+FRESULT f_mkdir (const UCHAR*);                             /* Create a new directory */
+FRESULT f_chmod (const UCHAR*, BYTE, BYTE);                 /* Change file/dir attriburte */
+FRESULT f_rename (const UCHAR*, const UCHAR*);              /* Rename/Move a file or directory */
+FRESULT f_mkfs (BYTE, BYTE, WORD);                          /* Create a file system on the drive */
+FRESULT f_chdir (const UCHAR*);                             /* Change current directory */
+
+#endif
+
+/* Low Level functions */
+FRESULT l_opendir(FATFS* fs, DWORD cluster, DIR *dirobj);   /* Open an existing directory by its start cluster */
+FRESULT l_opencluster(FATFS *fs, FIL *fp, DWORD clust);     /* Open a cluster by number as a read-only file */
+FRESULT l_getfree (FATFS*, const UCHAR*, DWORD*, DWORD);    /* Get number of free clusters on the drive, limited */
+
+#if _USE_STRFUNC
+#define feof(fp) ((fp)->fptr == (fp)->fsize)
+#define EOF -1
+int fputc (int, FIL*);                              /* Put a character to the file */
+int fputs (const char*, FIL*);                      /* Put a string to the file */
+int fprintf (FIL*, const char*, ...);               /* Put a formatted string to the file */
+char* fgets (char*, int, FIL*);                     /* Get a string from the file */
+#endif
+
+/* User defined function to give a current time to fatfs module */
+
+#if CONFIG_RTC_VARIANT > 0
+DWORD get_fattime (void); /* 31-25: Year(0-127 org.1980), 24-21: Month(1-12), 20-16: Day(1-31) */
+                            /* 15-11: Hour(0-23), 10-5: Minute(0-59), 4-0: Second(0-29 *2) */
+#else
+/* Fixed time: 1982-08-31 0:00:00, same month as the introduction of the C64 */
+#  define get_fattime() 0x51f0000
+#endif
+
+/* File access control and file status flags (FIL.flag) */
+
+#define FA_READ             0x01
+#define FA_OPEN_EXISTING    0x00
+#if _FS_READONLY == 0
+#define FA_WRITE            0x02
+#define FA_CREATE_NEW       0x04
+#define FA_CREATE_ALWAYS    0x08
+#define FA_OPEN_ALWAYS      0x10
+#define FA__WRITTEN         0x20
+#define FA__DIRTY           0x40
+#endif
+#define FA__ERROR           0x80
+
+
+/* FAT sub type (FATFS.fs_type) */
+
+#define FS_FAT12    1
+#define FS_FAT16    2
+#define FS_FAT32    3
+
+
+/* File attribute bits for directory entry */
+
+#define AM_RDO  0x01    /* Read only */
+#define AM_HID  0x02    /* Hidden */
+#define AM_SYS  0x04    /* System */
+#define AM_VOL  0x08    /* Volume label */
+#define AM_LFN  0x0F    /* LFN entry */
+#define AM_DIR  0x10    /* Directory */
+#define AM_ARC  0x20    /* Archive */
+
+
+
+/* Offset of FAT structure members */
+
+#define BS_jmpBoot          0
+#define BS_OEMName          3
+#define BPB_BytsPerSec      11
+#define BPB_SecPerClus      13
+#define BPB_RsvdSecCnt      14
+#define BPB_NumFATs         16
+#define BPB_RootEntCnt      17
+#define BPB_TotSec16        19
+#define BPB_Media           21
+#define BPB_FATSz16         22
+#define BPB_SecPerTrk       24
+#define BPB_NumHeads        26
+#define BPB_HiddSec         28
+#define BPB_TotSec32        32
+#define BS_55AA             510
+
+#define BS_DrvNum           36
+#define BS_BootSig          38
+#define BS_VolID            39
+#define BS_VolLab           43
+#define BS_FilSysType       54
+
+#define BPB_FATSz32         36
+#define BPB_ExtFlags        40
+#define BPB_FSVer           42
+#define BPB_RootClus        44
+#define BPB_FSInfo          48
+#define BPB_BkBootSec       50
+#define BS_DrvNum32         64
+#define BS_BootSig32        66
+#define BS_VolID32          67
+#define BS_VolLab32         71
+#define BS_FilSysType32     82
+
+#define FSI_LeadSig         0
+#define FSI_StrucSig        484
+#define FSI_Free_Count      488
+#define FSI_Nxt_Free        492
+
+#define MBR_Table           446
+
+#define DIR_Name            0
+#define DIR_Attr            11
+#define DIR_NTres           12
+#define DIR_Chksum          13
+#define DIR_CrtTime         14
+#define DIR_CrtDate         16
+#define DIR_FstClusHI       20
+#define DIR_WrtTime         22
+#define DIR_WrtDate         24
+#define DIR_FstClusLO       26
+#define DIR_FileSize        28
+
+
+
+/* Multi-byte word access macros  */
+
+#if _MCU_ENDIAN == 1    /* Use word access */
+#define LD_WORD(ptr)        (WORD)(*(WORD*)(BYTE*)(ptr))
+#define LD_DWORD(ptr)       (DWORD)(*(DWORD*)(BYTE*)(ptr))
+#define ST_WORD(ptr,val)    *(WORD*)(BYTE*)(ptr)=(WORD)(val)
+#define ST_DWORD(ptr,val)   *(DWORD*)(BYTE*)(ptr)=(DWORD)(val)
+#elif _MCU_ENDIAN == 2  /* Use byte-by-byte access */
+#define LD_WORD(ptr)        (WORD)(((WORD)*(volatile BYTE*)((ptr)+1)<<8)|(WORD)*(volatile BYTE*)(ptr))
+#define LD_DWORD(ptr)       (DWORD)(((DWORD)*(volatile BYTE*)((ptr)+3)<<24)|((DWORD)*(volatile BYTE*)((ptr)+2)<<16)|((WORD)*(volatile BYTE*)((ptr)+1)<<8)|*(volatile BYTE*)(ptr))
+#define ST_WORD(ptr,val)    *(volatile BYTE*)(ptr)=(BYTE)(val); *(volatile BYTE*)((ptr)+1)=(BYTE)((WORD)(val)>>8)
+#define ST_DWORD(ptr,val)   *(volatile BYTE*)(ptr)=(BYTE)(val); *(volatile BYTE*)((ptr)+1)=(BYTE)((WORD)(val)>>8); *(volatile BYTE*)((ptr)+2)=(BYTE)((DWORD)(val)>>16); *(volatile BYTE*)((ptr)+3)=(BYTE)((DWORD)(val)>>24)
+#else
+#error Do not forget to set _MCU_ENDIAN properly!
+#endif
+
+#define _FATFS
+#endif /* _FATFS */
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fileops.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fileops.c
new file mode 100644
index 00000000..e7173c90
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fileops.c
@@ -0,0 +1,1005 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   fileops.c: Generic file operations
+
+*/
+
+#include <avr/pgmspace.h>
+#include <stdint.h>
+#include <string.h>
+#include "config.h"
+#include "buffers.h"
+#include "d64ops.h"
+#include "dirent.h"
+#include "display.h"
+#include "doscmd.h"
+#include "errormsg.h"
+#include "fatops.h"
+#include "flags.h"
+#include "ff.h"
+#include "m2iops.h"
+#include "parser.h"
+#include "uart.h"
+#include "ustring.h"
+#include "utils.h"
+#include "wrapops.h"
+#include "fileops.h"
+
+uint8_t image_as_dir;
+
+/* ------------------------------------------------------------------------- */
+/*  Some constants used for directory generation                             */
+/* ------------------------------------------------------------------------- */
+
+#define HEADER_OFFSET_DRIVE 4
+#define HEADER_OFFSET_NAME  8
+#define HEADER_OFFSET_ID   26
+
+/* offsets within a D64 BAM sector for raw directory emulation */
+#define BAM_OFFSET_NAME  0x90
+#define BAM_OFFSET_ID    0xa2
+#define BAM_A0_AREA_SIZE (0xaa - 0x90 + 1)
+
+/* NOTE: I wonder if RLE-packing would save space in flash? */
+const PROGMEM uint8_t dirheader[] = {
+  1, 4,                            /* BASIC start address */
+  1, 1,                            /* next line pointer */
+  0, 0,                            /* line number 0 */
+  0x12, 0x22,                      /* Reverse on, quote */
+  'S','D','2','I','E','C',' ',' ', /* 16 spaces as the disk name */
+  ' ',' ',' ',' ',' ',' ',' ',' ', /* will be overwritten if needed */
+  0x22,0x20,                       /* quote, space */
+  'I','K',' ','2','A',             /* id IK, shift-space, dosmarker 2A */
+  00                               /* line-end marker */
+};
+
+const PROGMEM uint8_t syspart_line[] = {
+    1, 1, /* next line pointer */
+    0, 0, /* number of free blocks (to be filled later) */
+    ' ',' ',' ',
+    '"','S','Y','S','T','E','M','"',
+    ' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',
+    'S','Y','S',
+    0x20, 0x20, 0x00 /* Filler and end marker */
+  };
+
+const PROGMEM uint8_t dirfooter[] = {
+  1, 1, /* next line pointer */
+  0, 0, /* number of free blocks (to be filled later */
+  'B','L','O','C','K','S',' ','F','R','E','E','.',
+  0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, /* Filler and end marker */
+  0x20, 0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00
+};
+
+const PROGMEM uint8_t filetypes[] = {
+  'D','E','L', // 0
+  'S','E','Q', // 1
+  'P','R','G', // 2
+  'U','S','R', // 3
+  'R','E','L', // 4
+  'C','B','M', // 5
+  'D','I','R', // 6
+  '?','?','?', // 7
+  'N','A','T', // 8
+  '4','1',' ', // 9
+  '7','1',' ', // 10
+  '8','1',' ', // 11
+};
+
+/* ------------------------------------------------------------------------- */
+/*  Utility functions                                                        */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * createentry - create a single directory entry in buf
+ * @dent  : directory entry to be added
+ * @buf   : buffer to be used
+ * @format: entry format
+ *
+ * This function creates a directory entry for dent in the selected format
+ * in the given buffer.
+ */
+static void createentry(cbmdirent_t *dent, buffer_t *buf, dirformat_t format) {
+  uint8_t i;
+  uint8_t *data = buf->data;
+
+  if(format == DIR_FMT_CMD_LONG)
+    i=63;
+  else if(format == DIR_FMT_CMD_SHORT)
+    i=41;
+  else
+    i=31;
+
+  buf->lastused  = i;
+  /* Clear the line */
+  memset(data, ' ', i);
+  /* Line end marker */
+  data[i] = 0;
+
+  /* Next line pointer, 1571-compatible =) */
+  if (dent->remainder != 0xff)
+    /* store remainder in low byte of link pointer          */
+    /* +2 so it is never 0 (end-marker) or 1 (normal value) */
+    *data++ = dent->remainder+2;
+  else
+    *data++ = 1;
+  *data++ = 1;
+
+  *data++ = dent->blocksize & 0xff;
+  *data++ = dent->blocksize >> 8;
+
+  /* Filler before file name */
+  data++;
+  if (dent->blocksize < 100)
+    data++;
+  if (dent->blocksize < 10)
+    data++;
+  *data++ = '"';
+
+  /* copy and adjust the filename - C783 */
+  memcpy(data, dent->name, CBM_NAME_LENGTH);
+  for (i=0;i<=CBM_NAME_LENGTH;i++)
+    if (dent->name[i] == 0x22 || dent->name[i] == 0 || i == 16) {
+      data[i] = '"';
+      while (i<=CBM_NAME_LENGTH) {
+        if (data[i] == 0)
+          data[i] = ' ';
+        else
+          data[i] &= 0x7f;
+        i++;
+      }
+    }
+
+  /* Skip name and final quote */
+  data += CBM_NAME_LENGTH+1;
+
+  if (dent->typeflags & FLAG_SPLAT)
+    *data = '*';
+
+  /* File type */
+  memcpy_P(data+1, filetypes + TYPE_LENGTH * (dent->typeflags & EXT_TYPE_MASK),
+           (format & DIR_FMT_CMD_SHORT) ? 1 : TYPE_LENGTH);
+
+  /* RO marker */
+  if (dent->typeflags & FLAG_RO)
+    data[4] = '<';
+
+  if(format & DIR_FMT_CMD_LONG) {
+    data += 7;
+    data = appendnumber(data,dent->date.month);
+    *data++ = '/';
+    data = appendnumber(data,dent->date.day);
+    *data++ = '/';
+    data = appendnumber(data,dent->date.year % 100) + 3;
+    data = appendnumber(data,(dent->date.hour>12?dent->date.hour-12:dent->date.hour));
+    *data++ = '.';
+    data = appendnumber(data,dent->date.minute) + 1;
+    *data++ = (dent->date.hour>11?'P':'A');
+    *data++ = 'M';
+    while (*data)
+      *data++ = 1;
+  } else if(format == DIR_FMT_CMD_SHORT) {
+    /* Add date/time stamp */
+    data+=3;
+    data = appendnumber(data,dent->date.month);
+    *data++ = '/';
+    data = appendnumber(data,dent->date.day) + 1;
+    data = appendnumber(data,(dent->date.hour>12?dent->date.hour-12:dent->date.hour));
+    *data++ = '.';
+    data = appendnumber(data,dent->date.minute) + 1;
+    *data++ = (dent->date.hour>11?'P':'A');
+    while(*data)
+      *data++ = 1;
+  } else {
+    /* Extension: Hidden marker */
+    if (dent->typeflags & FLAG_HIDDEN)
+      data[5] = 'H';
+  }
+}
+
+/* ------------------------------------------------------------------------- */
+/*  Callbacks                                                                */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * dir_footer - generate the directory footer
+ * @buf: buffer to be used
+ *
+ * This is the final callback used during directory generation. It generates
+ * the "BLOCKS FREE" message and indicates that this is the final buffer to
+ * be sent. Always returns 0 for success.
+ */
+static uint8_t dir_footer(buffer_t *buf) {
+  uint16_t blocks;
+
+  /* Copy the "BLOCKS FREE" message */
+  memcpy_P(buf->data, dirfooter, sizeof(dirfooter));
+
+  blocks = disk_free(buf->pvt.dir.dh.part);
+  buf->data[2] = blocks & 0xff;
+  buf->data[3] = blocks >> 8;
+
+  buf->position = 0;
+  buf->lastused = 31;
+  buf->sendeoi  = 1;
+
+  return 0;
+}
+
+/* Callback for the partition directory */
+static uint8_t pdir_refill(buffer_t* buf) {
+  cbmdirent_t dent;
+
+  buf->position = 0;
+
+  /* read volume name */
+  while(buf->pvt.pdir.part < max_part) {
+    if (disk_label(buf->pvt.pdir.part, dent.name)) {
+      free_buffer(buf);
+      return 1;
+    }
+
+    dent.blocksize = buf->pvt.pdir.part+1;
+
+    if (partition[buf->pvt.pdir.part].fop == &d64ops) {
+      /* Use the correct partition type for Dxx images */
+      dent.typeflags = (partition[buf->pvt.pdir.part].imagetype & D64_TYPE_MASK)
+                       + TYPE_NAT - 1;
+    } else {
+      /* Anything else is "native" */
+      dent.typeflags = TYPE_NAT;
+    }
+
+    buf->pvt.pdir.part++;
+
+    /* Parse the name pattern */
+    if (buf->pvt.pdir.matchstr &&
+        !match_name(buf->pvt.pdir.matchstr, &dent, 0))
+      continue;
+
+    createentry(&dent, buf, DIR_FMT_CBM);
+    return 0;
+  }
+  buf->lastused = 1;
+  buf->sendeoi = 1;
+  memset(buf->data,0,2);
+  return 0;
+}
+
+/**
+ * dir_refill - generate the next directory entry
+ * @buf: buffer to be used
+ *
+ * This function generates a single directory entry with the next matching
+ * file. If there is no more matching file the footer will be generated
+ * instead. Used as a callback during directory generation.
+ */
+static uint8_t dir_refill(buffer_t *buf) {
+  cbmdirent_t dent;
+
+  uart_putc('+');
+
+  buf->position = 0;
+
+  if (buf->pvt.dir.counter) {
+    /* Redisplay image file as directory */
+    buf->pvt.dir.counter = 0;
+    memcpy(&dent, buf->data+256-sizeof(dent), sizeof(dent));
+    dent.typeflags = TYPE_DIR;
+    createentry(&dent, buf, buf->pvt.dir.format);
+    return 0;
+  }
+
+  switch (next_match(&buf->pvt.dir.dh,
+                     buf->pvt.dir.matchstr,
+                     buf->pvt.dir.match_start,
+                     buf->pvt.dir.match_end,
+                     buf->pvt.dir.filetype,
+                     &dent)) {
+  case 0:
+    if (image_as_dir != IMAGE_DIR_NORMAL &&
+        dent.opstype == OPSTYPE_FAT &&
+        check_imageext(dent.pvt.fat.realname) != IMG_UNKNOWN) {
+      if (image_as_dir == IMAGE_DIR_DIR) {
+        dent.typeflags = (dent.typeflags & 0xf0) | TYPE_DIR;
+      } else {
+        /* Prepare to redisplay image file as directory */
+        buf->pvt.dir.counter = 1;
+        /* Use the end of the buffer as temporary storage */
+        memcpy(buf->data+256-sizeof(dent), &dent, sizeof(dent));
+      }
+    }
+    createentry(&dent, buf, buf->pvt.dir.format);
+    return 0;
+
+  case -1:
+    return dir_footer(buf);
+
+  default:
+    free_buffer(buf);
+    return 1;
+  }
+}
+
+/**
+ * rawdir_dummy_refill - generate raw dummy directory entries
+ * @buf: buffer to be used
+ *
+ * This function generates an empty raw directory entry which is
+ * used to pad a raw directory to its correct size.
+ */
+static uint8_t rawdir_dummy_refill(buffer_t *buf) {
+  if (buf->pvt.dir.counter++)
+    buf->position = 0;
+  else
+    buf->position = 2;
+
+  if (buf->pvt.dir.counter == 8)
+    buf->sendeoi = 1;
+
+  return 0;
+}
+
+/**
+ * rawdir_refill - generate the next raw directory entry
+ * @buf: buffer to be used
+ *
+ * This function generates a single raw directory entry for the next file.
+ * Used as a callback during directory generation.
+ */
+static uint8_t rawdir_refill(buffer_t *buf) {
+  cbmdirent_t dent;
+
+  memset(buf->data, 0, 32);
+
+  if ((buf->pvt.dir.counter & 0x80) == 0) {
+    switch (readdir(&buf->pvt.dir.dh, &dent)) {
+    case -1:
+      /* last entry, switch to dummy entries */
+      return rawdir_dummy_refill(buf);
+
+    default:
+      /* error in readdir */
+      free_buffer(buf);
+      return 1;
+
+    case 0:
+      /* entry found, creation below */
+      break;
+    }
+
+    if (image_as_dir != IMAGE_DIR_NORMAL &&
+        dent.opstype == OPSTYPE_FAT &&
+        check_imageext(dent.pvt.fat.realname) != IMG_UNKNOWN) {
+      if (image_as_dir == IMAGE_DIR_DIR) {
+        dent.typeflags = (dent.typeflags & 0xf0) | TYPE_DIR;
+      } else {
+        /* Prepare to redisplay image file as directory */
+        buf->pvt.dir.counter |= 0x80;
+        memcpy(buf->data+256-sizeof(dent), &dent, sizeof(dent));
+      }
+    }
+  } else {
+    /* Redisplay image file as directory */
+    buf->pvt.dir.counter &= 0x7f;
+    memcpy(&dent, buf->data+256-sizeof(dent), sizeof(dent));
+    dent.typeflags = TYPE_DIR;
+  }
+
+  buf->data[DIR_OFS_TRACK]     = 1;
+  buf->data[DIR_OFS_SIZE_LOW]  = dent.blocksize & 0xff;
+  buf->data[DIR_OFS_SIZE_HI ]  = dent.blocksize >> 8;
+  buf->data[DIR_OFS_FILE_TYPE] = dent.typeflags ^ FLAG_SPLAT;
+
+  /* Copy file name without 0-byte */
+  memset(buf->data + DIR_OFS_FILE_NAME, 0xa0, CBM_NAME_LENGTH);
+  memcpy(buf->data + DIR_OFS_FILE_NAME, dent.name, ustrlen(dent.name));
+
+  /* Every 8th entry is two bytes shorter   */
+  /* because the t/s link bytes are skipped */
+  if ((buf->pvt.dir.counter++) & 0x7f)
+    buf->position = 0;
+  else
+    buf->position = 2;
+
+  buf->lastused = 31;
+
+  if ((buf->pvt.dir.counter & 0x7f) == 8)
+    buf->pvt.dir.counter &= 0x80;
+
+  return 0;
+}
+
+/**
+ * load_directory - Prepare directory generation and create header
+ * @secondary: secondary address used for reading the directory
+ *
+ * This function prepeares directory reading and fills the buffer
+ * with the header line of the directory listing.
+ * BUG: There is a not-well-known feature in the 1541/1571 disk
+ * drives (and possibly others) that returns unparsed directory
+ * sectors if $ is opened with a secondary address != 0. This
+ * is not emulated here.
+ */
+static void load_directory(uint8_t secondary) {
+  buffer_t *buf;
+  path_t path;
+  uint8_t pos=1;
+
+  buf = alloc_buffer();
+  if (!buf)
+    return;
+
+  uint8_t *name;
+
+  buf->secondary = secondary;
+  buf->read      = 1;
+  buf->lastused  = 31;
+
+  if (command_length > 2 && secondary == 0) {
+    if(command_buffer[1]=='=') {
+      if(command_buffer[2]=='P') {
+        /* Parse Partition Directory */
+
+        /* copy static header to start of buffer */
+        memcpy_P(buf->data, dirheader, sizeof(dirheader));
+        memcpy_P(buf->data + 32, syspart_line, sizeof(syspart_line));
+        buf->lastused  = 63;
+
+        /* set partition number */
+        buf->data[HEADER_OFFSET_DRIVE] = max_part;
+
+        /* Let the refill callback handle everything else */
+        buf->refill = pdir_refill;
+
+        if(command_length>3) {
+          /* Parse the name pattern */
+          if (parse_path(command_buffer+3, &path, &name, 0))
+            return;
+
+          buf->pvt.pdir.matchstr = name;
+        }
+        stick_buffer(buf);
+
+        return;
+      } else if(command_buffer[2]=='T') {
+        buf->pvt.dir.format = DIR_FMT_CMD_SHORT;
+        pos=3;
+      }
+    }
+  }
+
+  if (command_buffer[pos]) { /* do we have a path to scan? */
+    if (command_length > 2) {
+      /* Parse the name pattern */
+      if (parse_path(command_buffer+pos, &path, &name, 0))
+        return;
+
+      if (opendir(&buf->pvt.dir.dh, &path))
+        return;
+
+      buf->pvt.dir.matchstr = name;
+
+      /* Check for a filetype match */
+      name = ustrchr(name, '=');
+      if (name != NULL) {
+        *name++ = 0;
+        switch (*name) {
+        case 'S':
+          buf->pvt.dir.filetype = TYPE_SEQ;
+          break;
+
+        case 'P':
+          buf->pvt.dir.filetype = TYPE_PRG;
+          break;
+
+        case 'U':
+          buf->pvt.dir.filetype = TYPE_USR;
+          break;
+
+        case 'R':
+          buf->pvt.dir.filetype = TYPE_REL;
+          break;
+
+        case 'C': /* This is guessed, not verified */
+          buf->pvt.dir.filetype = TYPE_CBM;
+          break;
+
+        case 'B': /* CMD compatibility */
+        case 'D': /* Specifying DEL matches everything anyway */
+          buf->pvt.dir.filetype = TYPE_DIR;
+          break;
+
+        case 'H': /* Extension: Also show hidden files */
+          buf->pvt.dir.filetype = FLAG_HIDDEN;
+          break;
+        }
+        if(buf->pvt.dir.filetype) {
+          name++;
+          if(*name++ != ',') {
+            goto scandone;
+          }
+        }
+        while(*name) {
+          switch(*name++) {
+          case '>':
+            if(parse_date(&date_match_start,&name))
+              goto scandone;
+            if(date_match_start.month && date_match_start.day) // ignore 00/00/00
+              buf->pvt.dir.match_start = &date_match_start;
+            break;
+          case '<':
+            if(parse_date(&date_match_end,&name))
+              goto scandone;
+            if(date_match_end.month && date_match_end.day) // ignore 00/00/00
+              buf->pvt.dir.match_end = &date_match_end;
+            break;
+          case 'L':
+            /* don't switch to long format if 'N' has already been sent */
+            if(buf->pvt.dir.format != DIR_FMT_CBM)
+              buf->pvt.dir.format = DIR_FMT_CMD_LONG;
+            break;
+          case 'N':
+            buf->pvt.dir.format=DIR_FMT_CBM; /* turn off extended listing */
+            break;
+          default:
+            goto scandone;
+          }
+          if(*name && *name++ != ',') {
+            goto scandone;
+          }
+        }
+      }
+    } else {
+      /* Command string is two characters long, parse the drive */
+      if (command_buffer[1] == '0')
+        path.part = current_part;
+      else
+        path.part = command_buffer[1] - '0' - 1;
+      if (path.part >= max_part) {
+        set_error(ERROR_DRIVE_NOT_READY);
+        return;
+      }
+      path.dir = partition[path.part].current_dir;
+      if (opendir(&buf->pvt.dir.dh, &path))
+        return;
+    }
+  } else {
+    path.part = current_part;
+    path.dir  = partition[path.part].current_dir;  // if you do not do this, get_label will fail below.
+    if (opendir(&buf->pvt.dir.dh, &path))
+      return;
+  }
+
+scandone:
+  if (secondary != 0) {
+    /* Raw directory */
+
+    if (partition[path.part].fop == &d64ops) {
+      /* No need to fake it for D64 files */
+      d64_raw_directory(&path, buf);
+      return;
+    }
+
+    /* prepare a fake BAM sector */
+    memset(buf->data, 0, 256);
+    memset(buf->data + BAM_OFFSET_NAME - 2, 0xa0, BAM_A0_AREA_SIZE);
+
+    /* fill label and id */
+    if (dir_label(&path, buf->data + BAM_OFFSET_NAME - 2))
+      return;
+
+    if (disk_id(&path, buf->data + BAM_OFFSET_ID - 2))
+      return;
+
+    /* change padding of label and id to 0xa0 */
+    name = buf->data + BAM_OFFSET_NAME - 2 + CBM_NAME_LENGTH;
+    while (*--name == ' ')
+      *name = 0xa0;
+
+    if (buf->data[BAM_OFFSET_ID+2-2] == 0x20)
+      buf->data[BAM_OFFSET_ID+2-2] = 0xa0;
+
+    /* DOS version marker */
+    buf->data[0] = 'A';
+
+    buf->refill = rawdir_refill;
+    buf->lastused = 253;
+  } else {
+
+    /* copy static header to start of buffer */
+    memcpy_P(buf->data, dirheader, sizeof(dirheader));
+
+    /* set partition number */
+    buf->data[HEADER_OFFSET_DRIVE] = path.part+1;
+
+    /* read directory name */
+    if (dir_label(&path, buf->data+HEADER_OFFSET_NAME))
+      return;
+
+    /* read id */
+    if (disk_id(&path,buf->data+HEADER_OFFSET_ID))
+      return;
+
+    /* Let the refill callback handle everything else */
+    buf->refill = dir_refill;
+  }
+
+  /* Keep the buffer around */
+  stick_buffer(buf);
+
+  return;
+
+}
+
+/**
+ * directbuffer_refill - refill callback for direct buffers
+ * @buf: buffer to be used
+ *
+ * This function is used as the refill callback for direct buffers ('#')
+ * and will switch to the next or the first buffer in the chain. Always
+ * returns 0.
+ */
+uint8_t directbuffer_refill(buffer_t *buf) {
+  uint8_t sec = buf->secondary;
+
+  buf->secondary = BUFFER_SEC_CHAIN - sec;
+
+  if (buf->pvt.buffer.next == NULL)
+    buf = buf->pvt.buffer.first;
+  else
+    buf = buf->pvt.buffer.next;
+
+  buf->secondary = sec;
+  buf->position  = 0;
+  buf->mustflush = 0;
+  return 0;
+}
+
+/**
+ * largebuffer_cleanup - cleanup callback for large buffers
+ * @buf: buffer to be cleaned
+ *
+ * This function is used as the cleanup callback for large buffer and
+ * will free all buffers used in the large buffer chain. This does mean
+ * that the free_buffer call done after calling cleanup will be
+ * passed an already-freed buffer, but that case is accounted for in
+ * free_buffer and results in a no-op. Always returns 0.
+ */
+static uint8_t largebuffer_cleanup(buffer_t *buf) {
+  buf = buf->pvt.buffer.first;
+  while (buf != NULL) {
+    free_buffer(buf);
+    buf = buf->pvt.buffer.next;
+  }
+  return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+/*  External interface for the various operations                            */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * open_buffer - function to open a direct-access buffer
+ * @secondary: secondary address used
+ *
+ * This function is called when the computer wants to open a direct
+ * access buffer (#).
+ */
+static void open_buffer(uint8_t secondary) {
+  buffer_t *buf,*prev;
+  uint8_t count;
+
+  if (command_length == 3 && command_buffer[1] == '#') {
+    /* Open a large buffer */
+    count = command_buffer[2] - '0';
+    if (count == 0)
+      return;
+
+    /* Allocate a chain of linked buffers */
+    buf = alloc_linked_buffers(count);
+    if (buf == NULL)
+      return;
+
+    do {
+      buf->secondary = BUFFER_SEC_CHAIN - secondary;
+      buf->refill    = directbuffer_refill;
+      buf->cleanup   = largebuffer_cleanup;
+      buf->read      = 1;
+      buf->lastused  = 255;
+      stick_buffer(buf);
+      mark_write_buffer(buf);
+      prev = buf;
+      buf = buf->pvt.buffer.next;
+    } while (buf != NULL);
+
+    prev->sendeoi = 1;
+    buf = prev->pvt.buffer.first;
+
+    /* Set the first buffer as active by using the real secondary */
+    buf->secondary = secondary;
+
+  } else {
+    /* Normal buffer request */
+    // FIXME: This command can specify a specific buffer number.
+    buf = alloc_buffer();
+    if (!buf)
+      return;
+
+    buf->secondary = secondary;
+    buf->read      = 1;
+    buf->position  = 1;  /* Sic! */
+    buf->lastused  = 255;
+    buf->sendeoi   = 1;
+    buf->pvt.buffer.size  = 1;
+    /* directbuffer_refill is used to check for # buffers in iec.c */
+    buf->refill           = directbuffer_refill;
+    buf->pvt.buffer.first = buf;
+    mark_write_buffer(buf);
+    stick_buffer(buf);
+  }
+  return;
+}
+
+/**
+ * file_open - open a file on given secondary
+ * @secondary: secondary address used in OPEN call
+ *
+ * This function opens the file named in command_buffer on the given
+ * secondary address. All special names and prefixes/suffixed are handled
+ * here, e.g. $/#/@/,S,W
+ */
+void file_open(uint8_t secondary) {
+  buffer_t *buf;
+  uint8_t i = 0;
+  uint8_t recordlen = 0;
+
+  /* If the secondary is already in use, close the existing buffer */
+  buf = find_buffer(secondary);
+  if (buf != NULL) {
+    /* FIXME: What should we do if an error occurs? */
+    cleanup_and_free_buffer(buf);
+  }
+
+  /* Assume everything will go well unless proven otherwise */
+  set_error(ERROR_OK);
+
+  /* Strip 0x0d characters from end of name (C2BD-C2CA) */
+  if (command_length > 1) {
+    if (command_buffer[command_length-1] == 0x0d)
+      command_length -= 1;
+    else if (command_buffer[command_length-2] == 0x0d)
+      command_length -= 2;
+  }
+
+  /* Clear the remainder of the command buffer, simplifies parsing */
+  memset(command_buffer+command_length, 0, sizeof(command_buffer)-command_length);
+
+  uart_trace(command_buffer,0,command_length);
+
+  /* Load directory? */
+  if (command_buffer[0] == '$') {
+    load_directory(secondary);
+    return;
+  }
+
+  /* Direct access? */
+  if (command_buffer[0] == '#') {
+    open_buffer(secondary);
+    return;
+  }
+
+  /* Parse type+mode suffixes */
+  uint8_t *ptr = command_buffer;
+  enum open_modes mode = OPEN_READ;
+  uint8_t filetype = TYPE_DEL;
+
+  while(i++ < 2 && *ptr && (ptr = ustrchr(ptr, ','))) {
+    *ptr = 0;
+    ptr++;
+    switch (*ptr) {
+    case 0:
+      break;
+
+    case 'R': /* Read */
+      mode = OPEN_READ;
+      break;
+
+    case 'W': /* Write */
+      mode = OPEN_WRITE;
+      break;
+
+    case 'A': /* Append */
+      mode = OPEN_APPEND;
+      break;
+
+    case 'M': /* Modify */
+      mode = OPEN_MODIFY;
+      break;
+
+    case 'D': /* DEL */
+      filetype = TYPE_DEL;
+      break;
+
+    case 'S': /* SEQ */
+      filetype = TYPE_SEQ;
+      break;
+
+    case 'P': /* PRG */
+      filetype = TYPE_PRG;
+      break;
+
+    case 'U': /* USR */
+      filetype = TYPE_USR;
+      break;
+
+    case 'L': /* REL */
+      filetype = TYPE_REL;
+      mode = OPEN_WRITE;
+      if((ptr = ustrchr(ptr, ',')))
+        recordlen = *(++ptr);
+      i = 2;  // stop the scan
+      break;
+    }
+  }
+
+  /* Parse path+partition numbers */
+  uint8_t *fname;
+  int8_t res;
+  cbmdirent_t dent;
+  path_t path;
+
+  /* Parse path and file name */
+  if (parse_path(command_buffer, &path, &fname, 0))
+      return;
+
+  /* For M2I only: Remove trailing spaces from name */
+  if (partition[path.part].fop == &m2iops) {
+    res = ustrlen(fname);
+    while (--res && fname[res] == ' ')
+      fname[res] = 0;
+  }
+
+  /* Filename matching */
+  if (opendir(&matchdh, &path))
+    return;
+
+  do {
+    res = next_match(&matchdh, fname, NULL, NULL, FLAG_HIDDEN, &dent);
+    if (res > 0)
+      /* Error, abort */
+      return;
+
+    /* Don't match on DEL or DIR */
+    if ((dent.typeflags & TYPE_MASK) != TYPE_DEL &&
+        (dent.typeflags & TYPE_MASK) != TYPE_DIR)
+      break;
+
+    /* But do match if it's for writing */
+    if (mode == OPEN_WRITE || secondary == 1)
+      break;
+  } while (res == 0);
+
+  if(res && filetype == TYPE_REL && !recordlen) {
+    set_error(ERROR_SYNTAX_UNABLE);
+    return;
+  }
+
+  /* If match found is a REL... */
+  if(!res && (dent.typeflags & TYPE_MASK) == TYPE_REL) {
+    /* requested type must be REL or DEL */
+    if(filetype != TYPE_REL && filetype != TYPE_DEL) {
+      set_error(ERROR_FILE_TYPE_MISMATCH);
+      return;
+    }
+    filetype = TYPE_REL;
+    mode = OPEN_MODIFY;
+  }
+
+  /* Force mode+type for secondaries 0/1 */
+  switch (secondary) {
+  case 0:
+    mode = OPEN_READ;
+    if (filetype == TYPE_DEL)
+      filetype = TYPE_PRG;
+    break;
+
+  case 1:
+    mode = OPEN_WRITE;
+    if (filetype == TYPE_DEL)
+      filetype = TYPE_PRG;
+    break;
+
+  default:
+    if (filetype == TYPE_DEL)
+      filetype = TYPE_SEQ;
+  }
+
+  if (mode == OPEN_WRITE) {
+    if (res == 0) {
+      /* Match found */
+      if (command_buffer[0] == '@') {
+        /* Make sure there is a free buffer to open the new file later */
+        if (!check_free_buffers()) {
+          set_error(ERROR_NO_CHANNEL);
+          return;
+        }
+
+        /* Copy dent because file_delete may change it */
+        cbmdirent_t dentcopy = dent;
+
+        /* Rewrite existing file: Delete the old one */
+        if (file_delete(&path, &dentcopy) == 255)
+          return;
+
+        /* Force fatops to create a new name based on the (long) CBM- */
+        /* name instead of creating one with the old SFN and no LFN.  */
+        if (dent.opstype == OPSTYPE_FAT || dent.opstype == OPSTYPE_FAT_X00)
+          dent.pvt.fat.realname[0] = 0;
+      } else {
+        /* Write existing file without replacement: Raise error */
+        set_error(ERROR_FILE_EXISTS);
+        return;
+      }
+    } else {
+      /* Normal write or non-existing rewrite */
+      /* Doesn't exist: Copy name to dent */
+      memset(&dent, 0, sizeof(dent));
+      ustrncpy(dent.name, fname, CBM_NAME_LENGTH);
+      set_error(ERROR_OK); // because first_match has set FNF
+    }
+  } else if (res != 0) {
+    /* File not found */
+    set_error(ERROR_FILE_NOT_FOUND);
+    return;
+  }
+
+  /* Grab a buffer */
+  buf = alloc_buffer();
+  if (!buf)
+    return;
+
+  buf->secondary = secondary;
+
+  if(filetype == TYPE_REL) {
+    display_filename_write(path.part,CBM_NAME_LENGTH,dent.name);
+    open_rel(&path, &dent, buf, recordlen, (mode == OPEN_MODIFY));
+    return;
+  }
+
+  switch (mode) {
+  case OPEN_MODIFY:
+  case OPEN_READ:
+    /* Modify is the same as read, but allows reading *ed files.        */
+    /* FAT doesn't have anything equivalent, so both are mapped to READ */
+    display_filename_read(path.part,CBM_NAME_LENGTH,dent.name);
+    open_read(&path, &dent, buf);
+    break;
+
+  case OPEN_WRITE:
+  case OPEN_APPEND:
+    display_filename_write(path.part,CBM_NAME_LENGTH,dent.name);
+    open_write(&path, &dent, filetype, buf, (mode == OPEN_APPEND));
+    break;
+  }
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fileops.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fileops.h
new file mode 100644
index 00000000..1e256b53
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/fileops.h
@@ -0,0 +1,43 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   fileops.h: Definitions for file operations
+
+*/
+
+#ifndef FILEOPS_H
+#define FILEOPS_H
+
+#include <avr/pgmspace.h>
+#include "dirent.h"
+#include "buffers.h"
+
+enum open_modes { OPEN_READ, OPEN_WRITE, OPEN_APPEND, OPEN_MODIFY };
+extern const PROGMEM uint8_t filetypes[];
+
+/* Refill-callback for large buffers, only used for comparision */
+uint8_t directbuffer_refill(buffer_t *buf);
+
+/* Parses a filename in command_buffer and opens that file */
+void file_open(uint8_t secondary);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/flags.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/flags.h
new file mode 100644
index 00000000..b5418e27
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/flags.h
@@ -0,0 +1,53 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   flags.h: Definitions for some global flags
+
+*/
+
+#ifndef FLAGS_H
+#define FLAGS_H
+
+#ifdef __AVR__
+/* GPIOR0 is a bit-addressable register reserved for user data */
+#  define globalflags (GPIOR0)
+#else
+/* Global flags, variable defined in doscmd.c */
+extern uint8_t globalflags;
+#endif
+
+/* Values for those flags */
+#define VC20MODE         (1<<0)
+/* 1<<1 was JIFFY_ENABLED */
+#define AUTOSWAP_ACTIVE  (1<<2)
+#define EXTENSION_HIDING (1<<3)
+#define POSTMATCH        (1<<4)
+#define FAT32_FREEBLOCKS (1<<5)
+
+/* Disk image-as-directory mode, defined in fileops.c */
+extern uint8_t image_as_dir;
+
+#define IMAGE_DIR_NORMAL 0
+#define IMAGE_DIR_DIR    1
+#define IMAGE_DIR_BOTH   2
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/gcctest.awk b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/gcctest.awk
new file mode 100644
index 00000000..fdd343c2
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/gcctest.awk
@@ -0,0 +1,13 @@
+#! /usr/bin/gawk -f
+#
+# Parse the output of (avr-)gcc --version for the version number
+# and output YES if it is at least 4.3.
+
+$3 ~ /[0-9]+\.[0-9]+\.[0-9]+/ {
+  split($3, ver, ".");
+  major = 0+ver[1];
+  minor = 0+ver[2];
+  if (major > 4 || (major == 4 && minor > 2)) {
+    print "YES";
+  }
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/i2c.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/i2c.h
new file mode 100644
index 00000000..474a2e0c
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/i2c.h
@@ -0,0 +1,41 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   i2c.h: Definitions for I2C transfers
+
+   There is no i2c.c, the functions defined here are currently implemented
+   by softi2c.c. An additional implementation using the hardware I2C/TWI
+   peripheral should implement the same functions so either implementation
+   can be used.
+
+*/
+
+#ifndef I2C_H
+#define I2C_H
+
+void i2c_init(void);
+uint8_t i2c_write_register(uint8_t address, uint8_t reg, uint8_t val);
+uint8_t i2c_write_registers(uint8_t address, uint8_t startreg, uint8_t count, const void *data);
+int16_t i2c_read_register(uint8_t address, uint8_t reg);
+uint8_t i2c_read_registers(uint8_t address, uint8_t startreg, uint8_t count, void *data);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/iec-ll.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/iec-ll.h
new file mode 100644
index 00000000..4d869dc6
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/iec-ll.h
@@ -0,0 +1,42 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   iec-ll.h: A few wrappers around the port definitions
+
+*/
+
+#ifndef IEC_LL_H
+#define IEC_LL_H
+
+#define set_atn(state)   do { if (state) IEC_OUT &= ~IEC_OBIT_ATN;   else IEC_OUT |= IEC_OBIT_ATN;   } while(0)
+#define set_data(state)  do { if (state) IEC_OUT &= ~IEC_OBIT_DATA;  else IEC_OUT |= IEC_OBIT_DATA;  } while(0)
+#define set_clock(state) do { if (state) IEC_OUT &= ~IEC_OBIT_CLOCK; else IEC_OUT |= IEC_OBIT_CLOCK; } while(0)
+#define set_srq(state)   do { if (state) IEC_OUT &= ~IEC_OBIT_SRQ;   else IEC_OUT |= IEC_OBIT_SRQ;   } while(0)
+#define toggle_srq()     IEC_PIN |= IEC_OBIT_SRQ
+
+
+#define IEC_ATN   (IEC_PIN & IEC_BIT_ATN)
+#define IEC_DATA  (IEC_PIN & IEC_BIT_DATA)
+#define IEC_CLOCK (IEC_PIN & IEC_BIT_CLOCK)
+#define IEC_SRQ   (IEC_PIN & IEC_BIT_SRQ)
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/iec.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/iec.c
new file mode 100644
index 00000000..136abb59
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/iec.c
@@ -0,0 +1,811 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   iec.c: IEC handling code, stateful version
+
+   This code is a close reimplementation of the bus handling in a 1571
+   to be as compatible to original drives as possible. Hex addresses in
+   comments refer to the part of the 1571 rom that particular section
+   is based on.
+
+*/
+
+#include <avr/io.h>
+#include <avr/pgmspace.h>
+#include <avr/interrupt.h>
+#include <util/delay.h>
+#include <util/atomic.h>
+#include <string.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include "config.h"
+#include "avrcompat.h"
+#include "buffers.h"
+#include "diskchange.h"
+#include "diskio.h"
+#include "display.h"
+#include "doscmd.h"
+#include "errormsg.h"
+#include "fastloader.h"
+#include "fastloader-ll.h"
+#include "fatops.h"
+#include "flags.h"
+#include "fileops.h"
+#include "iec-ll.h"
+#include "led.h"
+#include "timer.h"
+#include "uart.h"
+#include "iec.h"
+
+/* ------------------------------------------------------------------------- */
+/*  Global variables                                                         */
+/* ------------------------------------------------------------------------- */
+
+/* Current device address */
+uint8_t device_address;
+
+/**
+ * struct iecflags_t - Bitfield of various flags, mostly IEC-related
+ * @eoi_recvd      : Received EOI with the last byte read
+ * @command_recvd  : Command or filename received
+ * @jiffy_active   : JiffyDOS-capable master detected
+ * @jiffy_load     : JiffyDOS LOAD operation detected
+ *
+ * This is a bitfield for a number of boolean variables used
+ */
+
+#define EOI_RECVD       (1<<0)
+#define COMMAND_RECVD   (1<<1)
+#define JIFFY_ACTIVE    (1<<2)
+#define JIFFY_LOAD      (1<<3)
+
+struct {
+  uint8_t iecflags;
+  enum { BUS_IDLE = 0, BUS_ATNACTIVE, BUS_FOUNDATN, BUS_FORME, BUS_NOTFORME, BUS_ATNFINISH, BUS_ATNPROCESS, BUS_CLEANUP, BUS_SLEEP } bus_state;
+  enum { DEVICE_IDLE = 0, DEVICE_LISTEN, DEVICE_TALK } device_state;
+  uint8_t secondary_address;
+} iec_data;
+
+
+/* ------------------------------------------------------------------------- */
+/*  Very low-level bus handling                                              */
+/* ------------------------------------------------------------------------- */
+
+/// Debounce IEC input - see E9C0
+static uint8_t iec_pin(void) {
+  uint8_t tmp;
+
+  do {
+    tmp = IEC_PIN & (IEC_BIT_ATN | IEC_BIT_DATA | IEC_BIT_CLOCK | IEC_BIT_SRQ);
+    _delay_us(2); /* 1571 uses LDA/CMP/BNE, approximate by waiting 2us */
+  } while (tmp != (IEC_PIN & (IEC_BIT_ATN | IEC_BIT_DATA | IEC_BIT_CLOCK | IEC_BIT_SRQ)));
+  return tmp;
+}
+
+/// Checks if ATN has changed and changes state to match (EA59)
+static uint8_t check_atn(void) {
+  if (iec_data.bus_state == BUS_ATNACTIVE)
+    if (IEC_ATN) {
+      iec_data.bus_state = BUS_ATNPROCESS; // A9AC
+      return 1;
+    } else
+      return 0;
+  else
+    if (!IEC_ATN) {
+      iec_data.bus_state = BUS_FOUNDATN;   // A7B3
+      return 1;
+    } else
+      return 0;
+}
+
+#ifndef IEC_ATN_INT_VECT
+
+/// Interrupt routine that simulates the hardware-auto-acknowledge of ATN
+/* This currently runs once every 500 microseconds, keep small! */
+ISR(TIMER2_COMPA_vect) {
+  if (!IEC_ATN) {
+    set_data(0);
+  }
+}
+
+#endif
+
+/* ------------------------------------------------------------------------- */
+/*  Byte transfer routines                                                   */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * _iec_getc - receive one byte from the CBM serial bus (E9C9)
+ *
+ * This function tries receives one byte from the serial bus and returns it
+ * if successful. Returns -1 instead if the device state has changed, the
+ * caller should return to the main loop immediately in that case.
+ */
+static int16_t _iec_getc(void) {
+  uint8_t i,val,tmp;
+
+  val = 0;
+
+  do {                                                 // E9CD-E9D5
+    if (check_atn()) return -1;
+  } while (!(iec_pin() & IEC_BIT_CLOCK));
+
+  set_data(1);                                         // E9D7
+  /* Wait until all other devices released the data line    */
+  while (!IEC_DATA) ;                                  // FF20
+
+  /* Timer for EOI detection */
+  start_timeout(TIMEOUT_US(256));
+
+  do {
+    if (check_atn()) return -1;                        // E9DF
+    tmp = has_timed_out();                             // E9EE
+  } while ((iec_pin() & IEC_BIT_CLOCK) && !tmp);
+
+  /* See if timeout happened -> EOI */
+  if (tmp) {
+    set_data(0);                                       // E9F2
+    _delay_us(73);                      // E9F5-E9F8, delay calculated from all
+    set_data(1);                        //   instructions between IO accesses
+
+    uart_putc('E');
+
+    do {
+      if (check_atn())                                 // E9FD
+        return -1;
+    } while (iec_pin() & IEC_BIT_CLOCK);
+
+    iec_data.iecflags|=EOI_RECVD;                      // EA07
+  }
+
+  for (i=0;i<8;i++) {
+    /* Check for JiffyDOS                                       */
+    /*   Source: http://home.arcor.de/jochen.adler/ajnjil-t.htm */
+    if (iec_data.bus_state == BUS_ATNACTIVE && i == 7) {
+      start_timeout(TIMEOUT_US(218));
+
+      do {
+        tmp = IEC_PIN & (IEC_BIT_ATN | IEC_BIT_DATA | IEC_BIT_CLOCK | IEC_BIT_SRQ);
+
+        /* If there is a delay before the last bit, the controller uses JiffyDOS */
+        if (!(iec_data.iecflags & JIFFY_ACTIVE) && has_timed_out()) {
+          if ((val>>1) < 0x60 && ((val>>1) & 0x1f) == device_address) {
+            /* If it's for us, notify controller that we support Jiffy too */
+            set_data(0);
+            _delay_us(101); // nlq says 405us, but the code shows only 101
+            set_data(1);
+            iec_data.iecflags |= JIFFY_ACTIVE;
+          }
+        }
+      } while (!(tmp & IEC_BIT_CLOCK));
+    } else {
+      /* Capture data on rising edge */
+      do {                                             // EA0B
+        tmp = IEC_PIN & (IEC_BIT_ATN | IEC_BIT_DATA | IEC_BIT_CLOCK | IEC_BIT_SRQ);
+      } while (!(tmp & IEC_BIT_CLOCK));
+    }
+
+    val = (val >> 1) | (!!(tmp & IEC_BIT_DATA) << 7);  // EA18
+
+    do {                                               // EA1A
+      if (check_atn()) return -1;
+    } while (iec_pin() & IEC_BIT_CLOCK);
+  }
+
+  _delay_us(5); // Test
+  set_data(0);                                         // EA28
+  _delay_us(50);  /* Slow down a little bit, may or may not fix some problems */
+  return val;
+}
+
+/**
+ * iec_getc - wrapper around _iec_getc to disable interrupts
+ *
+ * This function wraps iec_getc to disable interrupts there and is completely
+ * inlined by the compiler. It could be inlined in the C code too, but is kept
+ * seperately for clarity.
+ */
+static int16_t iec_getc(void) {
+  int16_t val;
+
+  ATOMIC_BLOCK( ATOMIC_FORCEON ) {
+    val = _iec_getc();
+  }
+  return val;
+}
+
+
+/**
+ * iec_putc - send a byte over the serial bus (E916)
+ * @data    : byte to be sent
+ * @with_eoi: Flags if the byte should be send with an EOI condition
+ *
+ * This function sends the byte data over the serial bus, optionally including
+ * a marker for the EOI condition. Returns 0 normally or -1 if the bus state has
+ * changed, the caller should return to the main loop in that case.
+ */
+static uint8_t iec_putc(uint8_t data, const uint8_t with_eoi) {
+  uint8_t i;
+
+  if (check_atn()) return -1;                          // E916
+
+  if (iec_data.iecflags & JIFFY_ACTIVE) {
+    /* This is the non-load Jiffy case */
+    if (jiffy_send(data, with_eoi, 0)) {
+      check_atn();
+      return -1;
+    }
+    return 0;
+  }
+
+  i = iec_pin();
+
+  _delay_us(60); // Fudged delay
+  set_clock(1);
+
+  if (i & IEC_BIT_DATA) { // E923
+    /* The 1571 jumps to E937 at this point, but I think            */
+    /* this is not necessary - the following loop will fall through */
+  }
+
+  do {
+    if (check_atn()) return -1;                        // E925
+  } while (!(iec_pin() & IEC_BIT_DATA));
+
+  if (with_eoi || (i & IEC_BIT_DATA)) {
+    do {
+      if (check_atn()) return -1;                      // E937
+    } while (!(iec_pin() & IEC_BIT_DATA));
+
+    do {
+      if (check_atn()) return -1;                      // E941
+    } while (iec_pin() & IEC_BIT_DATA);
+  }
+
+  set_clock(0);                                        // E94B
+  _delay_us(60); // Yet another "looked at the bus trace and guessed until it worked" delay
+  do {
+    if (check_atn()) return -1;
+  } while (!(iec_pin() & IEC_BIT_DATA));
+
+  for (i=0;i<8;i++) {
+    if (!(iec_pin() & IEC_BIT_DATA)) { // E95C
+      iec_data.bus_state = BUS_CLEANUP;
+      return -1;
+    }
+
+    set_data(data & 1<<i);
+    _delay_us(70);    // Implicid delay, fudged
+    set_clock(1);     // E976
+    if (globalflags & VC20MODE)
+      _delay_us(34);  // Calculated delay
+    else
+      _delay_us(75);  // Calculated delay
+
+    set_clock(0);     // FEFB
+    set_data(1);      // FEFE
+    _delay_us(5);     // Settle time
+  }
+
+  do {
+    if (check_atn()) return -1;
+  } while (iec_pin() & IEC_BIT_DATA);
+
+  /* More stuff that's not in the original rom:
+   *   Wait for 250us or until DATA is high or ATN is low.
+   * This fixes a problem with Castle Wolfenstein.
+   * Bus traces seem to indicate that a real 1541 needs
+   * about 350us between two bytes, sd2iec is usually WAY faster.
+   */
+  start_timeout(TIMEOUT_US(250));
+  while (!IEC_DATA && IEC_ATN && !has_timed_out()) ;
+
+  return 0;
+}
+
+
+/* ------------------------------------------------------------------------- */
+/*  Listen+Talk-Handling                                                     */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * iec_listen_handler - handle an incoming LISTEN request (EA2E)
+ * @cmd: command byte received from the bus
+ *
+ * This function handles a listen request from the computer.
+ */
+static uint8_t iec_listen_handler(const uint8_t cmd) {
+  int16_t c;
+  buffer_t *buf;
+
+  uart_putc('L');
+
+  buf = find_buffer(cmd & 0x0f);
+
+  /* Abort if there is no buffer or it's not open for writing */
+  /* and it isn't an OPEN command                             */
+  if ((buf == NULL || !buf->write) && (cmd & 0xf0) != 0xf0) {
+    uart_putc('c');
+    iec_data.bus_state = BUS_CLEANUP;
+    return 1;
+  }
+
+  while (1) {
+    if (iec_data.iecflags & JIFFY_ACTIVE) {
+      uint8_t flags;
+      set_atn_irq(1);
+      c = jiffy_receive(&flags);
+      if (!(flags & IEC_BIT_ATN))
+        /* ATN was active at the end of the transfer */
+        c = iec_getc();
+      else
+        if(flags & IEC_BIT_CLOCK)
+          iec_data.iecflags |= EOI_RECVD;
+        else
+          iec_data.iecflags &= (uint8_t)~EOI_RECVD;
+    } else
+      c = iec_getc();
+    if (c < 0) return 1;
+
+    if ((cmd & 0x0f) == 0x0f || (cmd & 0xf0) == 0xf0) {
+      if (command_length < CONFIG_COMMAND_BUFFER_SIZE)
+        command_buffer[command_length++] = c;
+      if (iec_data.iecflags & EOI_RECVD)
+        // Filenames are just a special type of command =)
+        iec_data.iecflags |= COMMAND_RECVD;
+    } else {
+      /* Flush buffer if full */
+      if (buf->mustflush) {
+        if (buf->refill(buf))
+          return 1;
+        /* Search the buffer again, it can change when using large buffers. */
+        buf = find_buffer(cmd & 0x0f);
+      }
+
+      buf->data[buf->position] = c;
+      mark_buffer_dirty(buf);
+
+      if (buf->lastused < buf->position)
+        buf->lastused = buf->position;
+      buf->position++;
+
+      /* Mark buffer for flushing if position wrapped */
+      if (buf->position == 0)
+        buf->mustflush = 1;
+
+      /* REL files must be syncronized on EOI */
+      if(buf->recordlen && (iec_data.iecflags & EOI_RECVD))
+        if (buf->refill(buf))
+          return 1;
+    }
+  }
+}
+
+/**
+ * iec_talk_handler - handle an incoming TALK request (E909)
+ * @cmd: command byte received from the bus
+ *
+ * This function handles a talk request from the computer.
+ */
+static uint8_t iec_talk_handler(uint8_t cmd) {
+  buffer_t *buf;
+
+  uart_putc('T');
+
+  buf = find_buffer(cmd & 0x0f);
+  if (buf == NULL)
+    return 0; /* 0 because we didn't change the state here */
+
+  if (iec_data.iecflags & JIFFY_ACTIVE)
+    /* wait 360us (J1541 E781) to make sure the C64 is at fbb7/fb0c */
+    _delay_ms(0.36);
+
+  if (iec_data.iecflags & JIFFY_LOAD) {
+    /* See if the C64 has passed fb06 or if we should abort */
+    do {                /* J1541 FF30 - wait until DATA inactive/high */
+      if (check_atn()) return -1;
+    } while (!IEC_DATA);
+    /* The LOAD path is only used after the first two bytes have been */
+    /* read. Reset the buffer position because there is a chance that */
+    /* the third byte has slipped through.                            */
+    buf->position = 4;
+  }
+
+  if (iec_data.iecflags & JIFFY_LOAD) {
+    /* Ready-signal for the first block */
+    set_data(0);
+    set_clock(1);
+    /* FFA0 - this delay is required so the C64 can see data low even */
+    /*        if it hits a badline at the worst possible moment       */
+    _delay_us(50);
+  }
+
+  while (buf->read) {
+    do {
+      uint8_t finalbyte = (buf->position == buf->lastused);
+      if (iec_data.iecflags & JIFFY_LOAD) {
+        /* Send a byte using the LOAD protocol variant */
+        /* The final byte in the buffer must be sent with Clock low   */
+        /* to signal that the next transfer will take some time.      */
+        /* The C64 samples this just after it has set Data Low before */
+        /* the first bitpair. If this marker is not set the time      */
+        /* between two bytes outside the assembler function must not  */
+        /* exceed ~38 C64 cycles (estimated) or the computer may      */
+        /* see a previous data bit as the marker.                     */
+        if (jiffy_send(buf->data[buf->position],0,128 | !finalbyte)) {
+          /* Abort if ATN was seen */
+          check_atn();
+          return -1;
+        }
+
+        if (finalbyte && buf->sendeoi) {
+          /* Send EOI marker */
+          _delay_us(100);
+          set_clock(1);
+          _delay_us(100);
+          set_clock(0);
+          _delay_us(100);
+          set_clock(1);
+        }
+      } else {
+        if (finalbyte && buf->sendeoi) {
+          /* Send with EOI */
+          uint8_t res = iec_putc(buf->data[buf->position],1);
+          if (iec_data.iecflags & JIFFY_ACTIVE) {
+            /* Jiffy resets the EOI condition on the bus after 30-40us. */
+            /* We use 50 to play it safe.                               */
+            _delay_us(50);
+            set_data(1);
+            set_clock(0);
+          }
+          if (res) {
+            uart_putc('Q');
+            return 1;
+          }
+        } else {
+          /* Send without EOI */
+          if (iec_putc(buf->data[buf->position],0)) {
+            uart_putc('V');
+            return 1;
+          }
+        }
+      }
+    } while (buf->position++ < buf->lastused);
+
+    if (buf->sendeoi &&
+        (cmd & 0x0f) != 0x0f &&
+        !buf->recordlen &&
+        buf->refill != directbuffer_refill) {
+      buf->read = 0;
+      break;
+    }
+
+    if (buf->refill(buf)) {
+      iec_data.bus_state = BUS_CLEANUP;
+      return 1;
+    }
+
+    /* Search the buffer again, it can change when using large buffers */
+    buf = find_buffer(cmd & 0x0f);
+
+    if (iec_data.iecflags & JIFFY_LOAD) {
+      /* wait until the C64 is at FB06, use timeout in case the STOP key is pressed */
+      start_timeout(TIMEOUT_US(120));
+      while (!IEC_DATA && !has_timed_out()) ;
+
+      /* check if ATN changed */
+      if (check_atn())
+        return -1;
+
+      /* Signal to the C64 that we're ready to send the next block */
+      set_data(0);
+      set_clock(1);
+
+      /* FFA0 - this delay is required so the C64 can see data low even */
+      /*        if it hits a badline at the worst possible moment       */
+      _delay_us(50);
+    }
+  }
+
+  return 0;
+}
+
+
+
+/* ------------------------------------------------------------------------- */
+/*  Initialization and main loop                                             */
+/* ------------------------------------------------------------------------- */
+
+
+void iec_init(void) {
+#ifdef IEC_SEPARATE_OUT
+  /* Set up the input port - pullups on all lines */
+  IEC_DDRIN  &= (uint8_t)~(IEC_BIT_ATN  | IEC_BIT_CLOCK  | IEC_BIT_DATA  | IEC_BIT_SRQ);
+  IEC_PORTIN |= IEC_BIT_ATN | IEC_BIT_CLOCK | IEC_BIT_DATA | IEC_BIT_SRQ;
+  /* Set up the output port - all lines high */
+  IEC_DDROUT |=            IEC_OBIT_ATN | IEC_OBIT_CLOCK | IEC_OBIT_DATA | IEC_OBIT_SRQ;
+  IEC_PORT   &= (uint8_t)~(IEC_OBIT_ATN | IEC_OBIT_CLOCK | IEC_OBIT_DATA | IEC_OBIT_SRQ);
+#else
+  /* Pullups would be nice, but AVR can't switch from */
+  /* low output to hi-z input directly                */
+  IEC_DDR  &= (uint8_t)~(IEC_BIT_ATN | IEC_BIT_CLOCK | IEC_BIT_DATA | IEC_BIT_SRQ);
+  IEC_PORT &= (uint8_t)~(IEC_BIT_ATN | IEC_BIT_CLOCK | IEC_BIT_DATA | IEC_BIT_SRQ);
+#endif
+
+  /* Keep DATA low if there is already a request on the bus */
+  if (!IEC_ATN)
+    set_data(0);
+
+  /* Prepare IEC interrupts (if any) */
+  IEC_ATN_INT_SETUP();
+  IEC_CLK_INT_SETUP();
+
+#ifndef IEC_ATN_INT_VECT
+  /* Issue an interrupt every 500us with timer 2 for ATN-Acknowledge.    */
+  /* The exact timing isn't critical, it just has to be faster than 1ms. */
+  /* Every 800us was too slow in rare situations.                        */
+  OCR2A = 125;
+  TCNT2 = 0;
+  /* On the mega32 both registers are the same, so OR those bits in */
+  TCCR2B = 0;
+  TCCR2A |= _BV(WGM21); // CTC mode
+  TCCR2B |= _BV(CS20) | _BV(CS21); // prescaler /32
+#endif
+
+  /* Read the hardware-set device address */
+  DEVICE_SELECT_SETUP();
+  _delay_ms(1);
+  device_address = DEVICE_SELECT;
+}
+
+void iec_mainloop(void) {
+  int16_t cmd = 0; // make gcc happy...
+
+  set_error(ERROR_DOSVERSION);
+
+  iec_data.bus_state = BUS_IDLE;
+
+  while (1) {
+    switch (iec_data.bus_state) {
+    case BUS_SLEEP:
+      set_atn_irq(0);
+      set_data(1);
+      set_clock(1);
+      set_error(ERROR_OK);
+      set_busy_led(0);
+      set_dirty_led(1);
+
+      /* Wait until the sleep key is used again */
+      while (!key_pressed(KEY_SLEEP)) ;
+      reset_key(KEY_SLEEP);
+
+      update_leds();
+
+      iec_data.bus_state = BUS_IDLE;
+      break;
+
+    case BUS_IDLE:  // EBFF
+      /* Wait for ATN */
+      set_atn_irq(1);
+      while (IEC_ATN) {
+        if (key_pressed(KEY_NEXT | KEY_PREV | KEY_HOME)) {
+          change_disk();
+        } else if (key_pressed(KEY_SLEEP)) {
+          reset_key(KEY_SLEEP);
+          iec_data.bus_state = BUS_SLEEP;
+          break;
+        } else if (display_found && key_pressed(KEY_DISPLAY)) {
+          display_service();
+          reset_key(KEY_DISPLAY);
+        }
+      }
+
+      if (iec_data.bus_state != BUS_SLEEP)
+        iec_data.bus_state = BUS_FOUNDATN;
+      break;
+
+    case BUS_FOUNDATN: // E85B
+      /* Pull data low to say we're here */
+      set_clock(1);
+      set_data(0);
+      set_atn_irq(0);
+
+      iec_data.device_state = DEVICE_IDLE;
+      iec_data.bus_state    = BUS_ATNACTIVE;
+      iec_data.iecflags &= (uint8_t)~(EOI_RECVD | JIFFY_ACTIVE | JIFFY_LOAD);
+
+      /* Slight protocol violation:                        */
+      /*   Wait until clock is low or 250us have passed    */
+      /*   The C64 doesn't always pull down the clock line */
+      /*   before ATN, this loop should keep us in sync.   */
+
+      start_timeout(TIMEOUT_US(250));
+      while (IEC_CLOCK && !has_timed_out())
+        if (IEC_ATN)
+          iec_data.bus_state = BUS_ATNPROCESS;
+
+      while (!IEC_CLOCK)
+        if (IEC_ATN)
+          iec_data.bus_state = BUS_ATNPROCESS;
+
+      break;
+
+    case BUS_ATNACTIVE: // E884
+      cmd = iec_getc();
+
+      if (cmd < 0) {
+        /* check_atn changed our state */
+        uart_putc('C');
+        break;
+      }
+
+      uart_putc('A');
+      uart_puthex(cmd);
+      uart_putcrlf();
+
+      if (cmd == 0x3f) { /* Unlisten */
+        if (iec_data.device_state == DEVICE_LISTEN)
+          iec_data.device_state = DEVICE_IDLE;
+        iec_data.bus_state = BUS_ATNFINISH;
+      } else if (cmd == 0x5f) { /* Untalk */
+        if (iec_data.device_state == DEVICE_TALK)
+          iec_data.device_state = DEVICE_IDLE;
+        iec_data.bus_state = BUS_ATNFINISH;
+      } else if (cmd == 0x40+device_address) { /* Talk */
+        iec_data.device_state = DEVICE_TALK;
+        iec_data.bus_state = BUS_FORME;
+      } else if (cmd == 0x20+device_address) { /* Listen */
+        iec_data.device_state = DEVICE_LISTEN;
+        iec_data.bus_state = BUS_FORME;
+      } else if ((cmd & 0x60) == 0x60) {
+        /* Check for OPEN/CLOSE/DATA */
+        /* JiffyDOS uses a slightly modified protocol for LOAD that */
+        /* is activated by using 0x61 instead of 0x60 in the TALK   */
+        /* state. The original floppy code has additional checks    */
+        /* that force the non-load Jiffy protocol for file types    */
+        /* other than SEQ and PRG.                                  */
+        /* Please note that $ is special-cased in the kernal so it  */
+        /* will never trigger this.                                 */
+        if (cmd == 0x61 && iec_data.device_state == DEVICE_TALK) {
+          cmd = 0x60;
+          iec_data.iecflags |= JIFFY_LOAD;
+        }
+
+        iec_data.secondary_address = cmd & 0x0f;
+        /* 1571 handles close (0xe0-0xef) here, so we do that too. */
+        if ((cmd & 0xf0) == 0xe0) {
+          if (cmd == 0xef) {
+            /* Close all buffers if sec. 15 is closed */
+            if (free_multiple_buffers(FMB_USER_CLEAN)) {
+              /* The 1571 error generator/handler always jumps to BUS_CLEANUP */
+              iec_data.bus_state = BUS_CLEANUP;
+              break;
+            }
+          } else {
+            /* Close a single buffer */
+            buffer_t *buf;
+            buf = find_buffer(iec_data.secondary_address);
+            if (buf != NULL) {
+              if (buf->cleanup(buf)) {
+                free_buffer(buf);
+                iec_data.bus_state = BUS_CLEANUP;
+                break;
+              }
+              /* Free the buffer */
+              free_buffer(buf);
+            }
+          }
+          iec_data.bus_state = BUS_FORME;
+        } else {
+          iec_data.bus_state = BUS_ATNFINISH;
+        }
+      } else {
+        // Not me
+        iec_data.bus_state = BUS_NOTFORME;
+      }
+      break;
+
+    case BUS_FORME: // E8D2
+      if (!IEC_ATN)
+        iec_data.bus_state = BUS_ATNACTIVE;
+      else
+        iec_data.bus_state = BUS_ATNPROCESS;
+      break;
+
+    case BUS_NOTFORME: // E8FD
+      set_atn_irq(0);
+      set_clock(1);
+      set_data(1);
+      iec_data.bus_state = BUS_ATNFINISH;
+      break;
+
+    case BUS_ATNFINISH: // E902
+      while (!IEC_ATN) ;
+      iec_data.bus_state = BUS_ATNPROCESS;
+      break;
+
+    case BUS_ATNPROCESS: // E8D7
+      set_atn_irq(1);
+
+      if (iec_data.device_state == DEVICE_LISTEN) {
+        if (iec_listen_handler(cmd))
+          break;
+      } else if (iec_data.device_state == DEVICE_TALK) {
+        set_data(1);
+        _delay_us(50);   // Implicit delay, fudged
+        set_clock(0);
+        _delay_us(70);   // Implicit delay, estimated
+
+        if (iec_talk_handler(cmd))
+          break;
+
+      }
+      iec_data.bus_state = BUS_CLEANUP;
+      break;
+
+    case BUS_CLEANUP:
+      set_atn_irq(1);
+      // 836B
+      set_clock(1);
+      set_data(1);
+
+      //   0x255 -> A61C
+      /* Handle commands and filenames */
+      if (iec_data.iecflags & COMMAND_RECVD) {
+
+#ifdef HAVE_HOTPLUG
+        /* This seems to be a nice point to handle card changes */
+        if (disk_state != DISK_OK) {
+          set_busy_led(1);
+          /* If the disk was changed the buffer contents are useless */
+          if (disk_state == DISK_CHANGED || disk_state == DISK_REMOVED) {
+            free_multiple_buffers(FMB_ALL);
+            change_init();
+            fatops_init(0);
+          } else
+            /* Disk state indicated an error, try to recover by initialising */
+            fatops_init(1);
+
+          update_leds();
+        }
+#endif
+
+        if (iec_data.secondary_address == 0x0f) {
+          /* Command channel */
+          parse_doscommand();
+        } else {
+          /* Filename in command buffer */
+          datacrc = 0xffff;
+          file_open(iec_data.secondary_address);
+        }
+        command_length = 0;
+        iec_data.iecflags &= (uint8_t)~COMMAND_RECVD;
+      }
+
+      /* We're done, clean up unused buffers */
+      free_multiple_buffers(FMB_UNSTICKY);
+
+      iec_data.bus_state = BUS_IDLE;
+      break;
+    }
+  }
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/iec.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/iec.h
new file mode 100644
index 00000000..b8f2470f
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/iec.h
@@ -0,0 +1,37 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   iec.h: Definitions for the IEC handling code
+
+*/
+
+#ifndef IEC_H
+#define IEC_H
+
+extern uint8_t device_address;
+
+void iec_init(void);
+
+void iec_mainloop(void) __attribute__ ((noreturn));
+void iec_mainloop(void);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/integer.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/integer.h
new file mode 100644
index 00000000..c120dc7c
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/integer.h
@@ -0,0 +1,30 @@
+/* Integer definitions for ff, based on example code from ChaN */
+
+#ifndef _INTEGER
+
+#include <stdint.h>
+
+/* These types are assumed as 16-bit or larger integer */
+typedef int16_t  INT;
+typedef uint16_t UINT;
+
+/* These types are assumed as 8-bit integer */
+typedef int8_t  CHAR;
+typedef uint8_t UCHAR;
+typedef uint8_t BYTE;
+
+/* These types are assumed as 16-bit integer */
+typedef int16_t  SHORT;
+typedef uint16_t USHORT;
+typedef uint16_t WORD;
+
+/* These types are assumed as 32-bit integer */
+typedef int32_t  LONG;
+typedef uint32_t ULONG;
+typedef uint32_t DWORD;
+
+/* Boolean type */
+typedef enum { FALSE = 0, TRUE } BOOL;
+
+#define _INTEGER
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/Makefile b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/Makefile
new file mode 100644
index 00000000..4a3d5317
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/Makefile
@@ -0,0 +1,545 @@
+# Hey Emacs, this is a -*- makefile -*-
+
+# FIXME: Reduce overlap between this and the main Makefile
+
+# Define version number
+MAJOR = 0
+MINOR = 0
+PATCHLEVEL = 1
+FIX =
+
+#----------------------------------------------------------------------------
+# WinAVR Makefile Template written by Eric B. Weddington, Joerg Wunsch, et al.
+#
+# Released to the Public Domain
+#
+# Additional material for this makefile was written by:
+# Peter Fleury
+# Tim Henigan
+# Colin O'Flynn
+# Reiner Patommel
+# Markus Pfaff
+# Sander Pool
+# Frederik Rouleau
+#
+#
+# Extensively modified for sd2iec by Ingo Korb
+#
+# To rebuild project do "make clean" then "make all".
+#----------------------------------------------------------------------------
+
+# Read configuration file
+ifdef CONFIG
+ CONFIGSUFFIX = $(CONFIG:config%=%)
+else
+ CONFIG = config
+ CONFIGSUFFIX =
+endif
+
+# Enable verbose compilation with "make V=1"
+ifdef V
+ Q :=
+ E := @:
+else
+ Q := @
+ E := @echo
+endif
+
+# Include the configuration file
+include $(CONFIG)
+
+# Set MCU name and length of binary for bootloader
+MCU := $(CONFIG_MCU)
+ifeq ($(CONFIG_BOOTLOADER),y)
+  ifeq ($(MCU),atmega32)
+    BINARY_LENGTH = 0x7800
+  else ifeq ($(MCU),atmega128)
+    BINARY_LENGTH = 0x1f000
+  else ifeq ($(MCU),atmega1281)
+    BINARY_LENGTH = 0x1f000
+  else ifeq ($(MCU),atmega2561)
+    BINARY_LENGTH = 0x3f000
+  else ifeq ($(MCU),atmega644)
+    BINARY_LENGTH = 0xf000
+  else ifeq ($(MCU),atmega644p)
+    BINARY_LENGTH = 0xf000
+  else
+.PHONY: nochip
+nochip:
+	@echo '=============================================================='
+	@echo 'No known target chip specified.'
+	@echo
+	@echo 'Please disable CONFIG_BOOTLOADER or add the size of the'
+	@echo 'binary to the Makefile.'
+	@exit 1
+  endif
+endif
+
+# Directory for all generated files
+OBJDIR := obj-$(CONFIG_MCU:atmega%=m%)$(CONFIGSUFFIX)
+
+# CPU clock
+F_CPU := $(CONFIG_MCU_FREQ)
+
+# Output format. (can be srec, ihex, binary)
+FORMAT = ihex
+
+
+# Target file name (without extension).
+TARGET = $(OBJDIR)/i2clcd
+
+# List C source files here. (C dependencies are automatically generated.)
+SRC = main.c lcd.c menu.c encoder.c timer.c
+
+# List Assembler source files here.
+#     Make them always end in a capital .S.  Files ending in a lowercase .s
+#     will not be considered source files but generated files (assembler
+#     output from the compiler), and will be deleted upon "make clean"!
+#     Even though the DOS/Win* filesystem matches both .s and .S the same,
+#     it will preserve the spelling of the filenames, and gcc itself does
+#     care about how the name is spelled on its command-line.
+ASRC =
+
+
+# Optimization level, can be [0, 1, 2, 3, s]. 
+#     0 = turn off optimization. s = optimize for size.
+#     (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
+# Use s -mcall-prologues when you really need size...
+#OPT = 2
+OPT = s
+
+# Debugging format.
+#     Native formats for AVR-GCC's -g are dwarf-2 [default] or stabs.
+#     AVR Studio 4.10 requires dwarf-2.
+#     AVR [Extended] COFF format requires stabs, plus an avr-objcopy run.
+DEBUG = dwarf-2
+
+
+# List any extra directories to look for include files here.
+#     Each directory must be seperated by a space.
+#     Use forward slashes for directory separators.
+#     For a directory that has spaces, enclose it in quotes.
+EXTRAINCDIRS =
+
+
+# Compiler flag to set the C Standard level.
+#     c89   = "ANSI" C
+#     gnu89 = c89 plus GCC extensions
+#     c99   = ISO C99 standard (not yet fully implemented)
+#     gnu99 = c99 plus GCC extensions
+CSTANDARD = -std=gnu99
+
+
+# Place -D or -U options here
+CDEFS = -DF_CPU=$(F_CPU)UL
+
+# Calculate bootloader version
+BOOT_VERSION = 0x$(MAJOR)$(MINOR)$(PATCHLEVEL)$(FIX)
+
+# Create a version number define
+ifdef PATCHLEVEL
+ifdef FIX
+PROGRAMVERSION := $(MAJOR).$(MINOR).$(PATCHLEVEL).$(FIX)
+else
+PROGRAMVERSION := $(MAJOR).$(MINOR).$(PATCHLEVEL)
+endif
+else
+PROGRAMVERSION := $(MAJOR).$(MINOR)
+endif
+
+LONGVERSION := -$(CONFIG_MCU:atmega%=m%)$(CONFIGSUFFIX)
+
+CDEFS += -DVERSION=\"$(PROGRAMVERSION)\" -DLONGVERSION=\"$(LONGVERSION)\"
+
+# Place -I options here
+CINCS = -I..
+
+
+
+#---------------- Compiler Options ----------------
+#  -g*:          generate debugging information
+#  -O*:          optimization level
+#  -f...:        tuning, see GCC manual and avr-libc documentation
+#  -Wall...:     warning level
+#  -Wa,...:      tell GCC to pass this to the assembler.
+#    -adhlns...: create assembler listing
+CFLAGS = -g$(DEBUG)
+CFLAGS += $(CDEFS) $(CINCS)
+CFLAGS += -O$(OPT)
+CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
+CFLAGS += -Wall -Wstrict-prototypes -Werror
+#CFLAGS += -Wa,-adhlns=$(OBJDIR)/$(<:.c=.lst)
+CFLAGS += -I$(OBJDIR)
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+CFLAGS += $(CSTANDARD)
+
+ifeq ($(CONFIG_STACK_TRACKING),y)
+  CFLAGS += -finstrument-functions
+endif
+
+
+#---------------- Assembler Options ----------------
+#  -Wa,...:   tell GCC to pass this to the assembler.
+#  -ahlms:    create listing
+#  -gstabs:   have the assembler create line number information; note that
+#             for use in COFF files, additional information about filenames
+#             and function names needs to be present in the assembler source
+#             files -- see avr-libc docs [FIXME: not yet described there]
+ASFLAGS = -Wa,-adhlns=$(OBJDIR)/$(<:.S=.lst),-gstabs -I$(OBJDIR)
+
+
+#---------------- Library Options ----------------
+# Minimalistic printf version
+PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
+
+# Floating point printf version (requires MATH_LIB = -lm below)
+PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
+
+# If this is left blank, then it will use the Standard printf version.
+PRINTF_LIB = 
+#PRINTF_LIB = $(PRINTF_LIB_MIN)
+#PRINTF_LIB = $(PRINTF_LIB_FLOAT)
+
+
+# Minimalistic scanf version
+SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
+
+# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
+SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
+
+# If this is left blank, then it will use the Standard scanf version.
+SCANF_LIB = 
+#SCANF_LIB = $(SCANF_LIB_MIN)
+#SCANF_LIB = $(SCANF_LIB_FLOAT)
+
+
+MATH_LIB = -lm
+
+
+
+#---------------- External Memory Options ----------------
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# used for variables (.data/.bss) and heap (malloc()).
+#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
+
+# 64 KB of external RAM, starting after internal RAM (ATmega128!),
+# only used for heap (malloc()).
+#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
+
+EXTMEMOPTS =
+
+
+
+#---------------- Linker Options ----------------
+#  -Wl,...:     tell GCC to pass this to linker.
+#    -Map:      create map file
+#    --cref:    add cross reference to  map file
+LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
+LDFLAGS += $(EXTMEMOPTS)
+LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
+ifeq ($(CONFIG_LINKER_RELAX),y)
+  LDFLAGS += -Wl,-O9,-relax
+endif
+
+
+
+#---------------- Programming Options (avrdude) ----------------
+
+# Programming hardware: alf avr910 avrisp bascom bsd 
+# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500 stk500v2
+#
+# Type: avrdude -c ?
+# to get a full listing.
+#
+AVRDUDE_PROGRAMMER = stk200
+
+# com1 = serial port. Use lpt1 to connect to parallel port.
+AVRDUDE_PORT = lpt1    # programmer connected to serial device
+
+AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
+# AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
+
+
+# Uncomment the following if you want avrdude's erase cycle counter.
+# Note that this counter needs to be initialized first using -Yn,
+# see avrdude manual.
+#AVRDUDE_ERASE_COUNTER = -y
+
+# Uncomment the following if you do /not/ wish a verification to be
+# performed after programming the device.
+#AVRDUDE_NO_VERIFY = -V
+
+# Increase verbosity level.  Please use this when submitting bug
+# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude> 
+# to submit bug reports.
+#AVRDUDE_VERBOSE = -v -v
+
+AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER)
+AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
+AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
+AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
+
+
+
+#---------------- Debugging Options ----------------
+
+# For simulavr only - target MCU frequency.
+DEBUG_MFREQ = $(F_CPU)
+
+# Set the DEBUG_UI to either gdb or insight.
+# DEBUG_UI = gdb
+DEBUG_UI = insight
+
+# Set the debugging back-end to either avarice, simulavr.
+DEBUG_BACKEND = avarice
+#DEBUG_BACKEND = simulavr
+
+# GDB Init Filename.
+GDBINIT_FILE = __avr_gdbinit
+
+# When using avarice settings for the JTAG
+JTAG_DEV = /dev/com1
+
+# Debugging port used to communicate between GDB / avarice / simulavr.
+DEBUG_PORT = 4242
+
+# Debugging host used to communicate between GDB / avarice / simulavr, normally
+#     just set to localhost unless doing some sort of crazy debugging when 
+#     avarice is running on a different computer.
+DEBUG_HOST = localhost
+
+
+
+#============================================================================
+
+# Define programs and commands.
+SHELL = sh
+CC = avr-gcc
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SIZE = avr-size
+NM = avr-nm
+AVRDUDE = avrdude
+REMOVE = rm -f
+COPY = cp
+WINSHELL = cmd
+
+
+# De-dupe the list of C source files
+CSRC := $(sort $(SRC))
+
+# Define all object files.
+OBJ := $(patsubst %,$(OBJDIR)/%,$(CSRC:.c=.o) $(ASRC:.S=.o))
+
+# Define all listing files.
+LST := $(patsubst %,$(OBJDIR)/%,$(CSRC:.c=.lst) $(ASRC:.S=.lst))
+
+
+# Compiler flags to generate dependency files.
+GENDEPFLAGS = -MMD -MP -MF .dep/$(@F).d
+
+
+# Combine all necessary flags and optional flags.
+# Add target processor to flags.
+ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
+ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS) $(CDEFS)
+
+
+
+
+
+# Default target.
+all: build
+
+build: elf bin hex
+	$(E) "  SIZE   $(TARGET).elf"
+	$(Q)$(ELFSIZE)|grep -v debug
+
+elf: $(TARGET).elf
+bin: $(TARGET).bin
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lss: $(TARGET).lss 
+sym: $(TARGET).sym
+
+# A little helper target for the maintainer =)
+copy2card:
+	mount /mnt
+	cp $(TARGET).bin /mnt
+	umount /mnt
+	sync
+
+
+# Doxygen output:
+doxygen:
+	-rm -rf doxyinput
+	mkdir doxyinput
+	cp *.h *.c doxyinput
+	src2doxy.pl doxyinput/*.h doxyinput/*.c
+	doxygen doxygen.conf
+
+# Display size of file.
+HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
+ELFSIZE = $(SIZE) -A $(TARGET).elf
+AVRMEM = avr-mem.sh $(TARGET).elf $(MCU)
+
+# Program the device.  
+program: $(TARGET).hex $(TARGET).eep
+	$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH)  $(AVRDUDE_WRITE_EEPROM)
+
+
+# Generate avr-gdb config/init file which does the following:
+#     define the reset signal, load the target file, connect to target, and set 
+#     a breakpoint at main().
+gdb-config: 
+	@$(REMOVE) $(GDBINIT_FILE)
+	@echo define reset >> $(GDBINIT_FILE)
+	@echo SIGNAL SIGHUP >> $(GDBINIT_FILE)
+	@echo end >> $(GDBINIT_FILE)
+	@echo file $(TARGET).elf >> $(GDBINIT_FILE)
+	@echo target remote $(DEBUG_HOST):$(DEBUG_PORT)  >> $(GDBINIT_FILE)
+ifeq ($(DEBUG_BACKEND),simulavr)
+	@echo load  >> $(GDBINIT_FILE)
+endif	
+	@echo break main >> $(GDBINIT_FILE)
+
+debug: gdb-config $(TARGET).elf
+ifeq ($(DEBUG_BACKEND), avarice)
+	@echo Starting AVaRICE - Press enter when "waiting to connect" message displays.
+	@$(WINSHELL) /c start avarice --jtag $(JTAG_DEV) --erase --program --file \
+	$(TARGET).elf $(DEBUG_HOST):$(DEBUG_PORT)
+	@$(WINSHELL) /c pause
+
+else
+	@$(WINSHELL) /c start simulavr --gdbserver --device $(MCU) --clock-freq \
+	$(DEBUG_MFREQ) --port $(DEBUG_PORT)
+endif
+	@$(WINSHELL) /c start avr-$(DEBUG_UI) --command=$(GDBINIT_FILE)
+
+
+
+
+# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
+COFFCONVERT=$(OBJCOPY) --debugging \
+--change-section-address .data-0x800000 \
+--change-section-address .bss-0x800000 \
+--change-section-address .noinit-0x800000 \
+--change-section-address .eeprom-0x810000 
+
+
+coff: $(TARGET).elf
+	$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
+
+
+extcoff: $(TARGET).elf
+	$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
+
+
+# Generate autoconf.h from config
+.PRECIOUS : $(OBJDIR)/autoconf.h
+$(OBJDIR)/autoconf.h: $(CONFIG) | $(OBJDIR)
+	$(E) "  CONF2H $(CONFIG)"
+	$(Q)gawk -f ../conf2h.awk $(CONFIG) > $(OBJDIR)/autoconf.h
+
+# Create final output files (.hex, .eep) from ELF output file.
+ifeq ($(CONFIG_BOOTLOADER),y)
+$(OBJDIR)/%.bin: $(OBJDIR)/%.elf
+	$(E) "  BIN    $@"
+	$(Q)$(OBJCOPY) -O binary -R .eeprom $< $@
+	$(E) "  CRCGEN $@"
+	-$(Q)crcgen-new $@ $(BINARY_LENGTH) $(CONFIG_BOOT_DEVID) $(BOOT_VERSION)
+	$(E) "  COPY   $(CONFIG_HARDWARE_NAME)-bootloader-$(PROGRAMVERSION).bin"
+	$(Q)$(COPY) $@ $(OBJDIR)/$(CONFIG_HARDWARE_NAME)-bootloader-$(PROGRAMVERSION).bin
+else
+$(OBJDIR)/%.bin: $(OBJDIR)/%.elf
+	$(E) "  BIN    $@"
+	$(Q)$(OBJCOPY) -O binary -R .eeprom $< $@
+endif
+
+
+$(OBJDIR)/%.hex: $(OBJDIR)/%.elf
+	$(E) "  HEX    $@"
+	$(Q)$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
+
+$(OBJDIR)/%.eep: $(OBJDIR)/%.elf
+	-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
+	--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
+
+# Create extended listing file from ELF output file.
+$(OBJDIR)/%.lss: $(OBJDIR)/%.elf
+	$(E) "  LSS    $<"
+	$(Q)$(OBJDUMP) -h -S $< > $@
+
+# Create a symbol table from ELF output file.
+$(OBJDIR)/%.sym: $(OBJDIR)/%.elf
+	$(E) "  SYM    $<"
+	$(E)$(NM) -n $< > $@
+
+
+
+# Link: create ELF output file from object files.
+.SECONDARY : $(TARGET).elf
+.PRECIOUS : $(OBJ)
+$(OBJDIR)/%.elf: $(OBJ)
+	$(E) "  LINK   $@"
+	$(Q)$(CC) $(ALL_CFLAGS) $^ --output $@ $(LDFLAGS)
+
+
+# Compile: create object files from C source files.
+$(OBJDIR)/%.o : %.c | $(OBJDIR) $(OBJDIR)/autoconf.h
+	$(E) "  CC     $<"
+	$(Q)$(CC) -c $(ALL_CFLAGS) $< -o $@ 
+
+
+# Compile: create assembler files from C source files.
+$(OBJDIR)/%.s : %.c | $(OBJDIR) $(OBJDIR)/autoconf.h
+	$(CC) -S $(ALL_CFLAGS) $< -o $@
+
+
+# Assemble: create object files from assembler source files.
+$(OBJDIR)/%.o : %.S | $(OBJDIR) $(OBJDIR)/autoconf.h
+	$(E) "  AS     $<"
+	$(Q)$(CC) -c $(ALL_ASFLAGS) $< -o $@
+
+# Create preprocessed source for use in sending a bug report.
+$(OBJDIR)/%.i : %.c | $(OBJDIR) $(OBJDIR)/autoconf.h
+	$(CC) -E -mmcu=$(MCU) -I. $(CFLAGS) $< -o $@ 
+
+# Create the output directory
+$(OBJDIR):
+	$(E) "  MKDIR  $(OBJDIR)"
+	$(Q)mkdir $(OBJDIR)
+
+# Target: clean project.
+clean: begin clean_list end
+
+clean_list :
+	$(E) "  CLEAN"
+	$(Q)$(REMOVE) $(TARGET).hex
+	$(Q)$(REMOVE) $(TARGET).bin
+	$(Q)$(REMOVE) $(TARGET).eep
+	$(Q)$(REMOVE) $(TARGET).cof
+	$(Q)$(REMOVE) $(TARGET).elf
+	$(Q)$(REMOVE) $(TARGET).map
+	$(Q)$(REMOVE) $(TARGET).sym
+	$(Q)$(REMOVE) $(TARGET).lss
+	$(Q)$(REMOVE) $(OBJ)
+	$(Q)$(REMOVE) $(OBJDIR)/autoconf.h
+	$(Q)$(REMOVE) $(OBJDIR)/*.bin
+	$(Q)$(REMOVE) $(LST)
+	$(Q)$(REMOVE) $(CSRC:.c=.s)
+	$(Q)$(REMOVE) $(CSRC:.c=.d)
+	$(Q)$(REMOVE) .dep/*
+	$(Q)$(REMOVE) -rf codedoc
+	$(Q)$(REMOVE) -rf doxyinput
+	-$(Q)rmdir $(OBJDIR)
+
+# Include the dependency files.
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+# Listing of phony targets.
+.PHONY : all begin finish end sizebefore sizeafter gccversion \
+build elf hex eep lss sym coff extcoff \
+clean clean_list program debug gdb-config doxygen
+
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/README b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/README
new file mode 100644
index 00000000..d90c5c6a
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/README
@@ -0,0 +1,191 @@
+The code in this directory is meant to run on a second AVR chip,
+connected to the one running sd2iec over I2C plus one additional line
+called IntRequest. 
+
+It is only meant as an example, a display compatible to the 27x4 it is
+currently set up for is probably hard to find. To adapt the code for a
+different display, change config.h as noted in its comments and adjust
+the layout in main.c (status line length, positions of the
+address/partition fields, if changing the number of lines also edit
+set_part(), every call to set_line and set_line_part, "case
+DISPLAY_ADDRESS:" branch in parse_display).
+
+The two-chip design was chosen to minimize the resource requirements
+on the drive side. Although a simple status-only display could be
+implemented just on the drive AVR, the ram requirements for a
+directory selection menu can be rather high if there are many entries
+with a high average length. On an ATmega324 or other 2K ram chips it
+should be possible to display 100 entries with an average length of
+12, on an ATmega644 the average length is increased to more than 30
+for the same number of entries.
+
+The drive side has no knowledge of the presentation method and/or
+layout used by the display side, it just sends status information and
+menu entries to the display which is free to use or discard any of
+the status informations as required. Menus are only shown after the
+user interacts with the display in which case the display AVR uses the
+IntRequest line to signal the drive side. The drive side does not
+remember which data it sent for the menu entries, so it may expect to
+read them back exactly as sent for further processing.
+
+
+Random Protocol Details
+=======================
+The display uses I2C address 0x64 (already shifted, so writing uses
+0x65) to communicate. The first byte written is the command number,
+everything after that are command-specific parameters. Whenever a
+command requires a string parameter, the string is sent in PETSCII
+encoding. Strings are NOT zero-terminated unless noted. Partition
+numbers are 0-based, to get the user-visible number just add 1.
+
+Menus
+-----
+The model for menus used in the communication between drive and
+display is an ordered list of strings, one for each menu entry. Menu
+entries must be stored on the display side, although entries may be
+dropped if the local memory is exhausted. The buffered menu entries
+are cleared by the DISPLAY_MENU_RESET command, entries are added one
+by one using the DISPLAY_MENU_ADD command. The order of menu entries
+should be preserved both for reasonable presentation to the user and
+for returning the correct entry number to the drive. Menu entries are
+sent as PETSCII, the only character in PETSCII that is not in ASCII
+that should really be supported is the left arrow (code 0x5f) because
+it is used in directory listings as a shorthand for the parent
+directory.
+
+Commands
+--------
+The format of the command description:
+<enum name>: <numerical value sent>
+Parameter(s): <parameters included>
+
+<description>
+Parameter types are given as "string" (PETSCII character string,
+NOT zero-terminated unless noted otherwise) or "byte" (single byte
+value, unsigned).
+
+
+DISPLAY_INIT: 0
+Parameter: string version
+
+This command is issued during startup and should clear the display,
+display the version string (if desired) and leave any menu that may
+still be active. It is recommended to lower-case the version string
+before displaying it.
+
+
+DISPLAY_ADDRESS: 1
+Parameter: byte address
+
+This command is issued during startup and whenever the IEC address the
+device is listening on changes.
+
+
+DISPLAY_FILENAME_READ: 2
+Parameters: byte partition, string filename
+
+This command is issued when a file is opened for reading. The
+partition byte is the partition the file is on, the file name is the
+actual file name that is opened with wildcards already resolved. The
+file name is always zero-terminated; additional data may be sent after
+the terminating zero-byte, but should be ignored.
+
+
+DISPLAY_FILENAME_WRITE: 3
+Parameters: byte partition, string filename
+
+This command works exactly as DISPLAY_FILENAME_READ, but is issued
+when a file is opened for writing or appending or if the file is a REL
+file.
+
+
+DISPLAY_DOSCOMMAND: 4
+Parameter: string command
+
+This command is issued when the drive receives a command on the
+command channel and transmits the command as-is. Please note that some
+dos commands may contain binary data (e.g. M-W and P), so please
+filter the data as required to make sure your output device isn't
+confused by random data sent to it. The command string is NOT
+zero-terminated.
+
+
+DISPLAY_ERRORCHANNEL: 5
+Parameter: string message
+
+This command is issued whenever the error channel conents change,
+which may be multiple times during the execution of a single drive
+operation. The message is sent without the final 0x0d character, but
+otherwise exactly as it is stored in the message buffer on the drive
+side.
+
+
+DISPLAY_CURRENT_DIR: 6
+Parameters: byte partition, string name
+
+This command is issued when the current directory on a partition
+changes and transmits the affected partition number as well as the
+name of the new directory. The name is the same as the string in the
+header line of a directory listing. 
+
+
+DISPLAY_CURRENT_PART: 7
+Parameter: byte partition
+
+This command is issued when the current partition is changed using the
+dos command "CP".
+
+
+DISPLAY_MENU_RESET: 64
+Parameter: nothing
+
+This command resets the menu. The display should return to the status
+screen (the data for that must be saved internally) and clear out the
+menu entry buffer.
+
+
+DISPLAY_MENU_ADD: 65
+Parameter: string entry
+
+This command adds a new menu entry to the buffer. The entry string is
+always zero-terminated. If the menu buffer is full (too many lines or
+not enough memory to store another string) it may be ignored. Adding
+menu entres while a menu is currently displayed is not required.
+
+
+DISPLAY_MENU_SHOW: 66
+Parameter: byte position
+
+This command switches from the status display to the menu display
+using the menu entries in the buffer. The position parameter specifies
+which entry should be selected initially and is 0-based. It is used
+for the device address menu to select the current address as default.
+
+
+DISPLAY_MENU_GETSELECTION: 67
+Parameter: nothing
+
+This command is issued to read the entry number (0-based) of the
+currently selected entry. The number is returned as a single byte value
+on the next read on address 0x64.
+
+
+DISPLAY_MENU_GETENTRY: 68
+Parameter: nothing
+
+This command is issued to read the entry string of the currently
+selected entry. The string is returned without zero-termination in
+PETSCII encoding on the next read on address 0x64. The data in the
+menu buffer may be modified to do this as the menu will be reset soon
+after this command.
+
+
+Interrupt Request Line
+----------------------
+The interrupt request line is used by the display to signal the drive
+that it has received user interaction that needs the attention of the
+drive. It should be pulled low until an I2C read to the display's
+address has been issued. The current display implementation issues an
+interrupt request whenever the user pushes the button connected to the
+display controller, the drive will either set up a menu or read a menu
+selection in response.
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/config-example b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/config-example
new file mode 100644
index 00000000..ffe68458
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/config-example
@@ -0,0 +1,55 @@
+# This may not look like it, but it's a -*- makefile -*-
+#
+# sd2iec - SD/MMC to Commodore serial bus interface/controller
+# Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+#
+# Inspiration and low-level SD/MMC access based on code from MMC2IEC
+#   by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+#
+#  FAT filesystem access based on code from ChaN, see tff.c|h.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; version 2 of the License only.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+#  config: User-configurable options to simplify hardware changes and/or
+#          reduce the code/ram requirements of the code.
+#
+# This is the config-example file for the display.
+#
+#
+# This file is included in the main Makefile and also parsed
+# into autoconf.h.
+
+# MCU to compile for
+CONFIG_MCU=atmega644
+
+# Use the -relax parameter when linking?
+# Passing -O9 and -relax to the linker saves a bit of flash,
+# but the option is broken in certain binutils versions.
+# (known troublemakers: binutils 2.17, 2.18 seems fine)
+CONFIG_LINKER_RELAX=n
+
+# MCU frequency in Hz
+CONFIG_MCU_FREQ=8000000
+
+# Display buffer size
+# This buffer is used during reception of I2C messages,
+# data that doesn't fit will be silently dropped.
+CONFIG_I2C_BUFFER_SIZE=40
+
+# Maximum number of menu entries
+# This is the maximum number of menu entries that can
+# be used. Further entries are silently dropped,
+# the actual number of menu entries may be lower than this
+# limit if there isn't enough free ram to store the text.
+CONFIG_MAX_MENU_ENTRIES=100
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/config.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/config.h
new file mode 100644
index 00000000..410fb2d0
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/config.h
@@ -0,0 +1,91 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   config.h: User-configurable options to simplify hardware changes and/or
+             reduce the code/ram requirements of the code.
+
+   This is the display-side config.h.
+*/
+
+#ifndef CONFIG_H
+#define CONFIG_H
+
+#include "autoconf.h"
+
+/* LCD pin assignments. The code assumes that the data lines are */
+/* continuous and in ascending order and the control lines are   */
+/* connected to the same port as the data lines.                 */
+#define LCD_PORT         PORTA
+#define LCD_PIN          PINA
+#define LCD_DDR          DDRA
+
+#define LCD_RS           _BV(PA0)
+#define LCD_RW           _BV(PA1)
+#define LCD_E1           _BV(PA2)
+
+/* Number of bits to left-shift data nibbles,         */
+/* e.g. 4 if the data lines are connected to PA4-PA7. */
+#define LCD_DATA_SHIFT   4
+
+/* E2 is used for dual-controller displays that split the displayed */
+/* lines between two LCD controllers. Define to 0 for a single-     */
+/* controller display.                                              */
+#define LCD_E2           _BV(PA3)
+
+/* Number of lines and columns of the display.              */
+/* Set LCD_ROWS_BOTTOM to 0 for single-controller displays. */
+#define LCD_COLUMNS     27
+#define LCD_ROWS_TOP    2
+#define LCD_ROWS_BOTTOM 2
+
+/* Start address of the display lines in the controller ram. For dual- */
+/* controller displays it is assumed that both use the same addresses. */
+#define LCD_ROWADDR {0x00, 0x40}
+
+/* Example for a single-controller 4 row display: */
+//#define LCD_ROWADDR {0x00, 0x40, 0x14, 0x54}
+
+/* Encoder port assignments */
+#define ENCODER_PIN         PINC
+#define ENCODER_PORT        PORTC
+#define ENCODER_DDR         DDRC
+#define ENCODER_PCMSK       PCMSK2
+#define ENCODER_INT_VECT    PCINT2_vect
+#define ENCODER_INT_SETUP() do { PCICR |= _BV(PCIE2); PCIFR |= _BV(PCIF2); } while (0)
+
+/* Encoder pins - A is the line that toggles between "clicks", */
+/*                B is the one that toggles at "clicks".       */
+/* If in doubt: Try it, if the menu arrow "flickers" swap the lines */
+#define ENCODER_A      _BV(PC2)
+#define ENCODER_B      _BV(PC3)
+#define ENCODER_BUTTON _BV(PC4)
+
+/* Interrupt request line from the display to sd2iec */
+#define INTRQ_PORT    PORTD
+#define INTRQ_BIT     _BV(PD6)
+#define INTRQ_SETUP() do { PORTD |= _BV(PD6); DDRD |= _BV(PD6); } while (0)
+
+/* Scroll-timing */
+#define TICKS_BEFORE_SCROLLING (1*HZ)
+#define TICKS_PER_CHARACTER (HZ/5)
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/encoder.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/encoder.c
new file mode 100644
index 00000000..d3a39561
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/encoder.c
@@ -0,0 +1,93 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   encoder.c: Encoder and button polling
+
+*/
+
+#include "config.h"
+#include <avr/io.h>
+#include <util/delay.h>
+#include "timer.h"
+#include "encoder.h"
+
+volatile int8_t  encoder_position;
+volatile uint8_t button_state;
+volatile tick_t  last_button_change;
+
+static uint8_t laststate;
+static tick_t  debounce_timer;
+
+/* Encoder gets its own on-change ISR, polling would require ~1000Hz */
+ISR(ENCODER_INT_VECT) {
+  uint8_t curstate;
+
+  curstate = ENCODER_PIN & (ENCODER_A | ENCODER_B);
+
+  // Encoder
+  if ((laststate & ENCODER_A) ^ (curstate & ENCODER_A)) {
+    if (!!(curstate & ENCODER_A) == !!(curstate & ENCODER_B)) {
+      encoder_position--;
+    } else {
+      encoder_position++;
+    }
+    laststate = curstate;
+  }
+}
+
+/* Polling is easier for debouncing a button and works fine at 100Hz */
+void encoder_buttonisr(void) {
+  uint8_t curstate;
+
+  // Button
+  curstate = !(ENCODER_PIN & ENCODER_BUTTON);
+  if (curstate != button_state) {
+    if (last_button_change != debounce_timer) {
+      if (time_after(ticks,debounce_timer + HZ/20)) {
+	last_button_change = ticks;
+	debounce_timer = ticks;
+	button_state = curstate;
+      }
+    } else {
+      debounce_timer = ticks;
+    }
+  } else {
+    // bounced - reset timer
+    debounce_timer = last_button_change;
+  }
+}
+
+void encoder_init(void) {
+  ENCODER_DDR  &= (uint8_t)~(ENCODER_A | ENCODER_B | ENCODER_BUTTON);
+  ENCODER_PORT |= ENCODER_A | ENCODER_B | ENCODER_BUTTON;
+  _delay_ms(5); // long wires...
+  laststate = ENCODER_PIN & (ENCODER_A | ENCODER_B);
+
+  encoder_position = 0;
+  button_state = !(ENCODER_PIN & ENCODER_BUTTON);
+  last_button_change = 0;
+  debounce_timer = 0;
+
+  ENCODER_PCMSK |= ENCODER_A; /* No B! */
+  ENCODER_INT_SETUP();
+}
+
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/encoder.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/encoder.h
new file mode 100644
index 00000000..7a47f4cd
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/encoder.h
@@ -0,0 +1,39 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   encoder.h: Encoder and button polling
+
+*/
+
+#ifndef ENCODER_H
+#define ENCODER_H
+
+#include "timer.h"
+
+void encoder_init(void);
+void encoder_buttonisr(void);
+
+extern volatile int8_t  encoder_position;
+extern volatile uint8_t button_state;
+extern volatile tick_t  last_button_change;
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/lcd.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/lcd.c
new file mode 100644
index 00000000..5c51424d
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/lcd.c
@@ -0,0 +1,258 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   lcd.c: HD44780-compatible display access
+
+*/
+
+#include "config.h"
+#include <avr/io.h>
+#include <avr/pgmspace.h>
+#include <util/delay.h>
+#include <stdio.h>
+#include "lcd.h"
+
+#define LCD_UPPER 1
+#define LCD_LOWER 2
+#define LCD_BOTH  3
+
+#define DISPLAY_ON   0x0c
+
+#define SET_DD_ADDRESS 0x80
+
+uint8_t cursor_x;
+uint8_t cursor_y;
+uint8_t cursor_mode;
+
+#ifdef USE_LCD_STDOUT
+static FILE lcd_stdout = FDEV_SETUP_STREAM(lcd_putc, NULL, _FDEV_SETUP_WRITE);
+#endif
+
+static const PROGMEM uint8_t lcd_rowaddr[] = LCD_ROWADDR;
+static uint8_t cursor_controller;
+
+static void inline lcd1_strobe(void) {
+  LCD_PORT |=  LCD_E1;
+  _delay_us(1);
+  LCD_PORT &= (uint8_t)~LCD_E1;
+}
+
+static void inline lcd2_strobe(void) {
+  LCD_PORT |=  LCD_E2;
+  _delay_us(1);
+  LCD_PORT &= (uint8_t)~LCD_E2;
+}
+
+static void lcd_strobe(uint8_t controller) {
+  if (controller & LCD_UPPER)
+    lcd1_strobe();
+  if ((LCD_ROWS_BOTTOM > 0) && (controller & LCD_LOWER))
+    lcd2_strobe();
+}
+
+
+static void lcd_wait(uint8_t controller) {
+  uint8_t tmp;
+
+  LCD_DDR = LCD_RS | LCD_RW | LCD_E1 | LCD_E2;
+  
+  LCD_PORT |=  LCD_RW;
+  LCD_PORT &= (uint8_t)~LCD_RS;
+
+  if (controller & LCD_UPPER) {
+    do {
+      LCD_PORT |= LCD_E1;
+      _delay_us(5);
+      tmp = (LCD_PIN >> LCD_DATA_SHIFT) & 0x08;
+      LCD_PORT &= (uint8_t)~LCD_E1;
+      _delay_us(5);
+      LCD_PORT |= LCD_E1;
+      _delay_us(5);
+      LCD_PORT &= (uint8_t)~LCD_E1;
+    } while (tmp);
+  }
+  if ((LCD_ROWS_BOTTOM > 0) && (controller & LCD_LOWER)) {
+    do {
+      LCD_PORT |= LCD_E2;
+      _delay_us(5);
+      tmp = (LCD_PIN >> LCD_DATA_SHIFT) & 0x08;
+      LCD_PORT &= (uint8_t)~LCD_E2;
+      _delay_us(5);
+      LCD_PORT |= LCD_E2;
+      _delay_us(5);
+      LCD_PORT &= (uint8_t)~LCD_E2;
+    } while (tmp);
+  }
+  LCD_PORT = 0;
+  LCD_DDR  = 0xff;
+}
+
+static void lcd_write(uint8_t controller, uint8_t rs, uint8_t value) {
+  uint8_t tmp;
+
+  if (rs)
+    tmp = LCD_RS;
+  else
+    tmp = 0;
+
+  lcd_wait(controller);
+
+  LCD_PORT = tmp | (uint8_t)((value >> 4) << LCD_DATA_SHIFT);
+  lcd_strobe(controller);
+  LCD_PORT = tmp | (uint8_t)((value & 0x0f) << LCD_DATA_SHIFT);
+  lcd_strobe(controller);
+}
+
+void lcd_init(void) {
+  LCD_PORT = 0;
+  LCD_DDR  = 0xff;
+  _delay_ms(15);
+
+  LCD_PORT = 0x03 << LCD_DATA_SHIFT;
+  lcd_strobe(LCD_BOTH);
+  _delay_ms(5);
+  lcd_strobe(LCD_BOTH);
+  _delay_ms(0.100);
+  lcd_strobe(LCD_BOTH);
+  lcd_wait(LCD_BOTH);
+
+  LCD_PORT = 0x02 << LCD_DATA_SHIFT;
+  lcd_strobe(LCD_BOTH);
+  lcd_wait(LCD_BOTH);
+
+  lcd_write(LCD_BOTH,0,0x28); // System Set: 4 Bit, 2 Zeilen, 5x7
+  // FIXME: Einmal sollte eigentlich reichen?
+  lcd_write(LCD_BOTH,0,0x28); // System Set: 4 Bit, 2 Zeilen, 5x7
+  lcd_write(LCD_BOTH,0,0x08); // Display aus
+  lcd_write(LCD_BOTH,0,0x0c); // Display an, kein Cursor
+  lcd_write(LCD_BOTH,0,0x06); // Cursor beim Schreiben vorwaerts
+  lcd_write(LCD_BOTH,0,0x01); // Anzeige loeschen
+
+  cursor_x = 0;
+  cursor_y = 0;
+  cursor_mode = LCD_CURSOR_NONE;
+  cursor_controller = LCD_UPPER;
+
+#ifdef USE_LCD_STDOUT
+  stdout = &lcd_stdout;
+#endif
+}
+
+// Anzeige des Cursors auf richtigem Display aktivieren
+void static updatecursor(void) {
+  if (LCD_ROWS_BOTTOM == 0 || cursor_y < LCD_ROWS_TOP) {
+    lcd_write(LCD_UPPER,0,DISPLAY_ON | cursor_mode);
+    lcd_write(LCD_LOWER,0,DISPLAY_ON);
+  } else {
+    lcd_write(LCD_UPPER,0,DISPLAY_ON);
+    lcd_write(LCD_LOWER,0,DISPLAY_ON | cursor_mode);
+  }
+}
+
+void lcd_clrscr(void) {
+  lcd_write(LCD_BOTH,0,0x01);
+  cursor_x = 0;
+  cursor_y = 0;
+  cursor_controller = LCD_UPPER;
+  updatecursor();
+}
+
+void lcd_setcursormode(uint8_t mode) {
+  cursor_mode = mode;
+  lcd_gotoxy(cursor_x,cursor_y);
+}
+
+void lcd_gotoxy(uint8_t x, uint8_t y) {
+  cursor_x = x;
+  cursor_y = y;
+  if (LCD_ROWS_BOTTOM == 0 || y < LCD_ROWS_TOP) {
+    lcd_write(LCD_UPPER,0,SET_DD_ADDRESS + x +
+              pgm_read_byte(lcd_rowaddr + y));
+    cursor_controller = LCD_UPPER;
+  } else {
+    lcd_write(LCD_LOWER,0,SET_DD_ADDRESS + x +
+              pgm_read_byte(lcd_rowaddr + y - LCD_ROWS_TOP));
+    cursor_controller = LCD_LOWER;
+  }
+}
+
+void lcd_putch(char c) {
+  lcd_write(cursor_controller,1,c);
+  if (++cursor_x > LCD_COLUMNS-1)
+    lcd_gotoxy(0,(cursor_y+1) % LCD_ROWS);
+}
+
+#ifdef USE_LCD_STDOUT
+int lcd_putc(char c, FILE *stream) {
+  if (c == '\n') {
+    lcd_gotoxy(0,(cursor_y+1) % LCD_ROWS);
+  } else {
+    lcd_putch(c);
+  }
+  return 0;
+}
+#endif
+
+void lcd_puts_P(prog_char *text) {
+  uint8_t ch;
+
+  while ((ch = pgm_read_byte(text++))) {
+    if (ch == '\n') {
+      lcd_gotoxy(0,(cursor_y+1) % LCD_ROWS);
+    } else {
+      lcd_putch(ch);
+    }
+  }
+  updatecursor();
+}
+
+void lcd_putxy_P(uint8_t xpos, uint8_t ypos, prog_char *text) {
+  if (xpos > (LCD_COLUMNS-1) || ypos > (LCD_ROWS-1)) return;
+
+  lcd_gotoxy(xpos,ypos);
+  lcd_puts_P(text);
+}
+
+void lcd_puts(char *text) {
+  while (*text) {
+    lcd_putch(*text++);
+  }
+  updatecursor();
+}
+
+void lcd_putxy(uint8_t xpos, uint8_t ypos, char *text) {
+  if (xpos > (LCD_COLUMNS-1) || ypos > (LCD_ROWS-1)) return;
+
+  lcd_gotoxy(xpos,ypos);
+  lcd_puts(text);
+}
+
+void lcd_customchar(uint8_t num, uint8_t b0, uint8_t b1,
+		    uint8_t b2,  uint8_t b3, uint8_t b4,
+		    uint8_t b5,  uint8_t b6, uint8_t b7) {
+  if (num > 7) return;
+  lcd_write(LCD_BOTH,0,0x40+8*num);
+  lcd_write(LCD_BOTH,1,b0);
+  lcd_write(LCD_BOTH,1,b1);
+  lcd_write(LCD_BOTH,1,b2);
+  lcd_write(LCD_BOTH,1,b3);
+  lcd_write(LCD_BOTH,1,b4);
+  lcd_write(LCD_BOTH,1,b5);
+  lcd_write(LCD_BOTH,1,b6);
+  lcd_write(LCD_BOTH,1,b7);
+  lcd_gotoxy(cursor_x,cursor_y);
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/lcd.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/lcd.h
new file mode 100644
index 00000000..9f761059
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/lcd.h
@@ -0,0 +1,55 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   lcd.h: HD44780-compatible display access
+
+*/
+
+#ifndef LCD_H
+#define LCD_H
+
+#include <avr/pgmspace.h>
+
+#define LCD_CURSOR_NONE  0x00
+#define LCD_CURSOR_LINE  0x02
+#define LCD_CURSOR_BLOCK 0x01
+
+#define LCD_ROWS    (LCD_ROWS_TOP+LCD_ROWS_BOTTOM)
+
+void lcd_init(void);
+void lcd_clrscr(void);
+void lcd_putxy_P(uint8_t xpos, uint8_t ypos, prog_char *text);
+void lcd_putxy(uint8_t xpos, uint8_t ypos, char *text);
+void lcd_puts_P(prog_char *text);
+void lcd_puts(char *text);
+void lcd_setcursormode(uint8_t mode);
+void lcd_gotoxy(uint8_t x, uint8_t y);
+void lcd_putch(char c);
+void lcd_customchar(uint8_t num, uint8_t b0, uint8_t b1,
+		    uint8_t b2,  uint8_t b3, uint8_t b4,
+		    uint8_t b5,  uint8_t b6, uint8_t b7);
+
+#ifdef USE_LCD_STDOUT
+# include <stdio.h>
+int lcd_putc(char c, FILE *stream);
+#endif
+
+extern uint8_t cursor_x;
+extern uint8_t cursor_y;
+extern uint8_t cursor_mode;
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/main.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/main.c
new file mode 100644
index 00000000..0513ba3f
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/main.c
@@ -0,0 +1,535 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   main.c: Main display code
+
+*/
+
+#include "config.h"
+#include <avr/io.h>
+#include <avr/interrupt.h>
+#include <avr/pgmspace.h>
+#include <avr/sleep.h>
+#include <avr/power.h>
+#include <util/atomic.h>
+#include <util/delay.h>
+#include <ctype.h>
+#include <stdio.h>
+#include <string.h>
+#include "avrcompat.h"
+#include "display.h"
+#include "encoder.h"
+#include "lcd.h"
+#include "menu.h"
+#include "timer.h"
+#include "utils.h"
+
+/* ------------------------------------------------------------------------- */
+/*  Global variables                                                         */
+/* ------------------------------------------------------------------------- */
+
+/* Status line */
+static const PROGMEM char status_line_str[] = "P___                    A__";
+#define STATUS_ADDR 25
+#define STATUS_PART 1
+
+/* Buffers for the LCD rows */
+typedef struct {
+  char    contents[CONFIG_I2C_BUFFER_SIZE+1];
+  int8_t  scrollofs;
+  tick_t  scrolltick;
+  int     updated:1;
+  int     scrolling:1;
+} linebuffer_t;
+
+static linebuffer_t lcdline[LCD_ROWS];
+
+static volatile uint8_t updatedisplay;
+
+/* Menu state */
+static enum { MST_INACTIVE = 0, MST_RESET, MST_INIT, MST_ACTIVE } menustate;
+static int8_t menuentry;
+
+/* I2C rx buffer and tx pointers */
+static uint8_t rxbuffer[CONFIG_I2C_BUFFER_SIZE];
+static uint8_t *rxbufptr = rxbuffer;
+static uint8_t *txdata;
+static uint8_t txlen;
+
+/* ------------------------------------------------------------------------- */
+/*  Utility functions                                                        */
+/* ------------------------------------------------------------------------- */
+
+/* Set INTRQ-pin to low (state == 0) or high (state != 0) */
+static inline void set_intrq(uint8_t state) {
+  if (state)
+    INTRQ_PORT |= INTRQ_BIT;
+  else
+    INTRQ_PORT &= (uint8_t)~INTRQ_BIT;
+}
+
+/**
+ * pet2asc - convert string from PETSCII to ASCII
+ * @buf: pointer to the string to be converted
+ *
+ * This function converts the string in the given buffer from PETSCII to
+ * ASCII in-place. Modified for LCD use, substitutes _ with 0x01 to
+ * use the custom "left arrow" character.
+ */
+static void pet2asc(uint8_t *buf) {
+  uint8_t ch;
+  while (*buf) {
+    ch = *buf;
+    if (ch == 95) // left arrow, use custom LCD char
+      ch = 0x01;
+    if (ch > (128+64) && ch < (128+91))
+      ch -= 128;
+    else if (ch > (96-32) && ch < (123-32))
+      ch += 32;
+    else if (ch > (192-128) && ch < (219-128))
+      ch += 128;
+    else if (ch == 255)
+      ch = '~';
+    *buf = ch;
+    buf++;
+  }
+}
+
+/**
+ * asc2pet - convert string from ASCII to PETSCII
+ * @buf: pointer to the string to be converted
+ *
+ * This function converts the string in the given buffer from ASCII to
+ * PETSCII in-place. Modified for LCD use, substitutes the custom
+ * "left arrow" character 0x01 with _.
+ */
+static void asc2pet(uint8_t *buf) {
+  uint8_t ch;
+  while (*buf) {
+    ch = *buf;
+    if (ch == 1) // left arrow
+      ch = '_';
+    if (ch > 64 && ch < 91)
+      ch += 128;
+    else if (ch > 96 && ch < 123)
+      ch -= 32;
+    else if (ch > 192 && ch < 219)
+      ch -= 128;
+    else if (ch == '~')
+      ch = 255;
+    *buf = ch;
+    buf++;
+  }
+}
+
+/**
+ * set_line - format text data for display line
+ * @line   : output in this display line
+ * @len    : length of string
+ * @string : string to be displayed
+ * @convert: do PETSCII conversion
+ *
+ * This function will copy up to len bytes from string to
+ * the lcd-line buffer for line, marking it as updated.
+ * If convert is non-zero, PETSCII to ASCII conversion will
+ * be applied to string first. Copying stops at the first
+ * ASCII character > 126.
+ */
+static void set_line(uint8_t line, uint8_t len, uint8_t *string, uint8_t convert) {
+  char *ptr = lcdline[line].contents;
+
+  memset(&lcdline[line],0,sizeof(linebuffer_t));
+  lcdline[line].updated = 1;
+  updatedisplay++;
+
+  if (convert)
+    pet2asc(string);
+
+  while (*string <= 126 && len-- > 0)
+    *ptr++ = *string++;
+}
+
+/**
+ * set_line_part - format partition+text data for display line
+ * @line   : output in this display line
+ * @prefix : prefix character
+ * @len    : length of string
+ * @data   : data to be displayed
+ *
+ * This function will copy data to the lcd-line buffer for line,
+ * marking it as updated. If prefix is non-zero, it will be
+ * the first character in the new line contents. The first
+ * byte of data is displayed as a decimal number followed by
+ * a colon, followed by the remainder of data converted
+ * from PETSCII to ASCII. Copying stops at the first ASCII
+ * character > 126.
+ */
+static void set_line_part(uint8_t line, uint8_t prefix, uint8_t len, uint8_t *data) {
+  char *ptr = lcdline[line].contents;
+
+  memset(&lcdline[line],0,sizeof(linebuffer_t));
+  lcdline[line].updated = 1;
+  updatedisplay++;
+
+  if (prefix)
+    *ptr++ = prefix;
+
+  data[0] += 1;
+  if (data[0] > 100)
+    *ptr++ = '0'+data[0]/100;
+  if (data[0] > 10)
+    *ptr++ = '0'+(data[0]%100)/10;
+  *ptr++ = '0'+(data[0]%10);
+
+  *ptr++ = ':';
+  pet2asc(++data);
+  while (*data <= 126 && --len > 0)
+    *ptr++ = *data++;
+}
+
+/**
+ * set_part - set the partition number in the status line
+ * @part: new partition number
+ *
+ * This function updates the partition number in the fourth
+ * line of the display to show part.
+ */
+static void set_part(uint8_t part) {
+  char *ptr = &lcdline[3].contents[STATUS_PART];
+
+  lcdline[3].contents[STATUS_PART]   = ' ';
+  lcdline[3].contents[STATUS_PART+1] = ' ';
+  lcdline[3].contents[STATUS_PART+2] = ' ';
+  if (part > 100)
+    *ptr++ = '0'+part/100;
+  if (part > 10)
+    *ptr++ = '0'+(part%100)/10;
+  *ptr = '0'+(part%10);
+
+  lcdline[3].updated = 1;
+  updatedisplay++;
+}
+
+/**
+ * parse_display - parse display message
+ * @length: length of message
+ * @data  : message contents
+ *
+ * This function parses a display message received over
+ * I2C and acts upon it.
+ */
+static void parse_display(uint8_t length, uint8_t *data) {
+  uint8_t i;
+
+  switch (data[0]) {
+  case DISPLAY_INIT:
+    lcd_clrscr();
+    menu_resetlines();
+    menuentry = -1;
+    menustate = MST_RESET;
+    for (i=0;i<sizeof(lcdline)/sizeof(linebuffer_t);i++) {
+      memset(&lcdline[i],0,sizeof(linebuffer_t));
+    }
+    for (i=0;i<length-1;i++)
+      data[i+1] = tolower(data[i+1]);
+    set_line(0, length-1, data+1, 0);
+    strcpy_P(lcdline[3].contents, status_line_str);
+    break;
+
+  case DISPLAY_ADDRESS:
+    lcdline[3].contents[STATUS_ADDR]   = '0'+data[1] / 10;
+    lcdline[3].contents[STATUS_ADDR+1] = '0'+data[1] % 10;
+    lcdline[3].updated = 1;
+    updatedisplay++;
+    break;
+
+  case DISPLAY_FILENAME_READ:
+    set_line_part(0, 'L', length-1, data+1);
+    break;
+
+  case DISPLAY_FILENAME_WRITE:
+    set_line_part(0, 'S', length-1, data+1);
+    break;
+
+  case DISPLAY_DOSCOMMAND:
+    set_line(0, length-1, data+1, 1);
+    break;
+
+  case DISPLAY_ERRORCHANNEL:
+    set_line(2, length-1, data+1, 1);
+    break;
+
+  case DISPLAY_CURRENT_DIR:
+    if (length == 2) {
+      /* Special case: root dir */
+      length = 3;
+      data[2] = '/';
+    }
+    set_line_part(1, 0, length-1, data+1);
+    break;
+
+  case DISPLAY_CURRENT_PART:
+    set_part(data[1]+1);
+    break;
+
+  case DISPLAY_MENU_RESET:
+    menu_resetlines();
+    menustate = MST_RESET;
+    break;
+
+  case DISPLAY_MENU_ADD:
+    pet2asc(data+1);
+    menu_addline((char *)data+1);
+    break;
+
+  case DISPLAY_MENU_SHOW:
+    menustate = MST_INIT;
+    if (length > 1)
+      menuentry = data[1];
+    else
+      menuentry = 0;
+    break;
+
+  case DISPLAY_MENU_GETSELECTION:
+    txdata = (uint8_t *)&menuentry;
+    txlen = 1;
+    break;
+
+  case DISPLAY_MENU_GETENTRY:
+    asc2pet((uint8_t *)menulines[menuentry]);
+    txdata = (uint8_t *)menulines[menuentry];
+    txlen = strlen(menulines[menuentry]);
+    break;
+  }
+}
+
+/* I2C interrupt function, calls parse_display */
+ISR(TWI_vect) {
+  //uart_puthex(TWSR & 0b11111000);uart_putcrlf();
+
+  /* gcc produces 16-bit comparisons with masking instead of shifts */
+  switch(TWSR >> 3) {
+
+    /* ----- Slave receiver ----- */
+
+  case (0x60 >> 3): // Own SLA+W received
+    rxbufptr = rxbuffer;
+    TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWINT) | _BV(TWEA); // Return ACK for data byte
+    break;
+
+  case (0x80 >> 3): // Own SLA+W active, data received and ACKed
+    *rxbufptr = TWDR;
+    rxbufptr++;
+    if (rxbufptr == rxbuffer+sizeof(rxbuffer))
+      TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWINT); // Buffer full, stop ACKing
+    else
+      TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWINT) | _BV(TWEA);
+    break;
+
+  case (0x88 >> 3): // Own SLA+W active, data received and NAKed
+  case (0xa0 >> 3): // STOP condition received while we were addressed
+    parse_display(rxbufptr-rxbuffer, rxbuffer);
+
+    rxbufptr = rxbuffer;
+    /* Return ACK for address */
+    TWCR = _BV(TWEN) | _BV(TWIE) |  _BV(TWINT) | _BV(TWEA);
+    break;
+
+    /* ----- Slave transmitter ----- */
+
+  case (0xa8 >> 3): // SLA+R received, ACK returned
+  case (0xb8 >> 3): // Data byte transmitted in slave tx mode, ACK received
+    /* Transmit a byte and expect ACK */
+    set_intrq(1);
+    if (txlen > 0) {
+      TWDR = *txdata++;
+      txlen--;
+    } else
+      TWDR = 0;
+    TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWINT) | _BV(TWEA);
+    break;
+
+  case (0xc0 >> 3): // Data byte transmitted in slave tx mode, NACK received
+  case (0xc8 >> 3): // Data byte transmitted in slave tx mode, ACK received whick NACK expected
+    /* Switch to not-addressed slave mode */
+    /* Return ACK for address */
+    TWCR = _BV(TWEN) | _BV(TWIE) |  _BV(TWINT) | _BV(TWEA);
+    break;
+
+
+    /* ----- General status codes ----- */
+
+  case (0xf8 >> 3): // No relevant state information available
+    break;
+
+  case (0x00 >> 3): // Illegal bus condition
+    TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWSTO) | _BV(TWINT) | _BV(TWEA);
+    break;
+
+  default:
+    //uart_puthex(TWSR & 0b11111000); uart_putcrlf();
+    TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWINT) | _BV(TWEA);
+    break;
+  }
+}
+
+/**
+ * update_display - update display contents based on lcdline array
+ *
+ * This function reads the contents of the lcdline array and
+ * updates and/or scrolls lines as neccessary.
+ */
+static void update_display(void) {
+  static uint8_t scrolling;
+  char    tmpbuf[LCD_COLUMNS+1];
+  char   *ptr;
+  uint8_t i,j,flag;
+  int8_t  scrollofs;
+
+  flag = 0;
+  ATOMIC_BLOCK(ATOMIC_FORCEON) {
+    if (updatedisplay) {
+      flag = 1;
+      updatedisplay--;
+    }
+  }
+  if (!flag && !scrolling)
+    return;
+
+  scrolling = 0;
+  tmpbuf[LCD_COLUMNS] = 0;
+  for (i=0;i<LCD_ROWS;i++) {
+    ptr = tmpbuf;
+    flag = 0;
+    ATOMIC_BLOCK(ATOMIC_FORCEON) {
+      if (lcdline[i].updated ||
+          (lcdline[i].scrolling && time_after(ticks,lcdline[i].scrolltick))) {
+
+        if (!lcdline[i].scrolling) {
+          scrollofs = 0;
+          if (strlen(lcdline[i].contents) > LCD_COLUMNS) {
+            /* Initialize scrolling for this line */
+            lcdline[i].scrolling = 1;
+            lcdline[i].scrollofs = -1;
+            lcdline[i].scrolltick = ticks + 2*TICKS_BEFORE_SCROLLING;
+          }
+        } else {
+          /* Line is scrolling (scrolling gets reset when updated is set) */
+          scrollofs = lcdline[i].scrollofs + 1;
+          if (scrollofs == strlen(lcdline[i].contents)-LCD_COLUMNS) {
+            /* Scrolled to the end: Wait longer */
+            lcdline[i].scrolltick = ticks + 2*TICKS_BEFORE_SCROLLING;
+          } else if (scrollofs > strlen(lcdline[i].contents)-LCD_COLUMNS) {
+            /* Beyond the end: Reset, wait longer */
+            scrollofs = 0;
+            lcdline[i].scrolltick = ticks + 2*TICKS_BEFORE_SCROLLING;
+          } else {
+            lcdline[i].scrolltick = ticks + TICKS_PER_CHARACTER;
+          }
+          lcdline[i].scrollofs = scrollofs;
+        }
+
+        for (j=0;j<LCD_COLUMNS && lcdline[i].contents[j+scrollofs];j++)
+          *ptr++ = lcdline[i].contents[j+scrollofs];
+        for (;j<LCD_COLUMNS;j++)
+          *ptr++ = ' ';
+
+        lcdline[i].updated = 0;
+        flag = 1;
+      }
+    }
+    if (lcdline[i].scrolling)
+        scrolling = 1;
+
+    if (flag) {
+      lcd_gotoxy(0,i);
+      lcd_puts(tmpbuf);
+    }
+  }
+}
+
+
+int main(void) {
+  // Disable JTAG
+#if defined __AVR_ATmega644__ || defined __AVR_ATmega644P__ || defined __AVR_ATmega2561__
+  asm volatile("in  r24, %0\n"
+               "ori r24, 0x80\n"
+               "out %0, r24\n"
+               "out %0, r24\n"
+               :
+               : "I" (_SFR_IO_ADDR(MCUCR))
+               : "r24"
+               );
+#else
+#  error Unknown chip!
+#endif
+
+  /* I2C initialisation, no need to set TWBR because we don't act as master */
+  HWI2C_PORT |= HWI2C_SDA | HWI2C_SCL;
+  TWAR = DISPLAY_I2C_ADDR;
+  TWCR = _BV(TWEA) | _BV(TWEN) | _BV(TWIE);
+
+  INTRQ_SETUP();
+
+  lcd_init();
+  lcd_customchar(1,0,4,8,31,8,4,0,0); // define left arrow
+  menu_init();
+  encoder_init();
+  timer_init();
+
+  strcpy_P((char *)rxbuffer,PSTR("Waiting for data..."));
+  set_line(0,strlen((char *)rxbuffer),rxbuffer,0);
+
+  sei();
+
+  uint8_t prevkey,curkey;
+
+  prevkey = 0;
+  while (1) {
+    if (menustate == MST_INIT) {
+      menuentry = menu_display(1,menuentry);
+      menustate = MST_ACTIVE;
+    } else if (menustate == MST_ACTIVE) {
+      menuentry = menu_display(0,menuentry);
+    } else if (menustate == MST_RESET) {
+      lcd_clrscr();
+      ATOMIC_BLOCK(ATOMIC_FORCEON) {
+        updatedisplay++;
+        for (uint8_t i=0;i<LCD_ROWS;i++)
+          lcdline[i].updated = 1;
+        menustate = MST_INACTIVE;
+      }
+    } else {
+      update_display();
+    }
+
+    curkey = button_state;
+    if (!prevkey && curkey) {
+      if (menustate == MST_ACTIVE) {
+        menustate = MST_RESET;
+      }
+      set_intrq(0);
+    }
+
+    prevkey = curkey;
+  }
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/menu.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/menu.c
new file mode 100644
index 00000000..729be040
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/menu.c
@@ -0,0 +1,187 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+   
+   menu.c: Generic menu code
+
+*/
+
+#include "config.h"
+#include <avr/io.h>
+#include <string.h>
+#include "encoder.h"
+#include "lcd.h"
+#include "timer.h"
+#include "utils.h"
+#include "menu.h"
+
+
+char *menulines[CONFIG_MAX_MENU_ENTRIES];
+static uint8_t entrycount;
+static char *menuheap;
+extern char __heap_start;
+
+static void show_menu(char **entries, uint8_t count, uint8_t start) {
+  uint8_t i,j;
+
+  lcd_gotoxy(0,0);
+  lcd_putch(' ');
+
+  /* Output menu entries */
+  for (i=0;i<min(count-start,LCD_ROWS);i++) {
+    for (j=0;j<LCD_COLUMNS-1 && entries[i+start][j];j++)
+      lcd_putch(entries[i+start][j]);
+    for (;j<LCD_COLUMNS;j++)
+      lcd_putch(' ');
+  }
+
+  /* Clear remaining rows */
+  for (;i<LCD_ROWS;i++)
+    for (j=0;j<LCD_COLUMNS;j++)
+      lcd_putch(' ');
+}
+
+void menu_init(void) {
+  /* Arrow for highlighing an entry */
+  lcd_customchar(3,0x08,0x0c,0x0e,0x0f,0x0e,0x0c,0x08,0x00);
+  menu_resetlines();
+}
+
+void menu_resetlines(void) {
+  menuheap = &__heap_start;
+  entrycount = 0;
+}
+  
+uint8_t menu_addline(char *line) {
+  /* Check remaining heap space */
+  if (((uint16_t)menuheap+strlen(line)+1) > SP-32 || entrycount >= CONFIG_MAX_MENU_ENTRIES) {
+    return 1;
+  }
+
+  strcpy(menuheap,line);
+  menulines[entrycount++] = menuheap;
+  menuheap += strlen(line)+1;
+
+  return 0;
+}
+
+
+uint8_t menu_display(uint8_t init, uint8_t startentry) {
+  static int8_t  prevoffset,curoffset,preventry,scrollofs;
+  static int8_t  curencoder,prevencoder,curentry;
+  static uint8_t entrylen;
+  static tick_t  scrolltime;
+
+  if (init) {
+    lcd_setcursormode(LCD_CURSOR_NONE);
+    lcd_clrscr();
+
+    prevencoder = encoder_position;
+    prevoffset  = -1;
+    preventry   = curentry;
+    scrollofs   = -1;
+    scrolltime  = 0;
+    entrylen    = strlen(menulines[curentry]);
+    if (startentry < entrycount)
+      curentry = startentry;
+    else
+      curentry = 0;
+
+    curoffset = curentry-LCD_ROWS/2+1;
+    if (curoffset+LCD_ROWS-1 >= entrycount) curoffset = entrycount-LCD_ROWS;
+    if (curoffset < 0) curoffset = 0;
+  }
+
+  curencoder = encoder_position;
+
+  /* Encoder position changed */
+  if (curencoder != prevencoder) {
+    curentry += (curencoder-prevencoder);
+    if (curentry >= entrycount) curentry = 0;
+    if (curentry < 0) curentry = entrycount-1;
+  }
+
+  /* Move offset until the marker is back into visible area */
+  while (curentry-curoffset < 1 && curoffset > 0) curoffset--;
+  while (curentry-curoffset >= LCD_ROWS-1 && curentry < entrycount-1) curoffset++;
+  if (curentry-curoffset >= LCD_ROWS) {
+    /* Special case for wrapping to the last entry */
+    curoffset = curentry-LCD_ROWS+1;
+  }
+
+  /* Redraw when offset changed */
+  if (curoffset != prevoffset) {
+    show_menu(menulines,entrycount,curoffset);
+    prevoffset = curoffset;
+    scrollofs  = -1;
+
+    lcd_gotoxy(0,curentry-curoffset);
+    lcd_putch(3);
+
+    entrylen = strlen(menulines[curentry]);
+    preventry = curentry;
+  } else if (preventry != curentry) {
+    /* Move marker if only the entry changed */
+    lcd_gotoxy(0,preventry-curoffset);
+    lcd_putch(' ');
+
+    if (scrollofs != -1) {
+      uint8_t i;
+
+      lcd_gotoxy(1,preventry-curoffset);
+      for (i=0;i<LCD_COLUMNS-1;i++)
+        lcd_putch(menulines[preventry][i]);
+      scrollofs = -1;
+    }
+
+    lcd_gotoxy(0,curentry-curoffset);
+    lcd_putch(3);
+
+    entrylen = strlen(menulines[curentry]);
+
+    preventry = curentry;
+  }
+
+  /* Current entry is too long -> scroll */
+  if (entrylen >= LCD_COLUMNS) {
+    if (scrollofs == -1) {
+      /* Haven't scrolled yet, start in a few ticks */
+      scrollofs  = 0;
+      scrolltime = getticks() + TICKS_BEFORE_SCROLLING;
+    } else if (time_after(getticks(),scrolltime)) {
+      /* Scrolling */
+      uint8_t i;
+
+      scrollofs++;
+      if (scrollofs > entrylen+2) scrollofs = 0;
+      scrolltime += TICKS_PER_CHARACTER;
+
+      lcd_gotoxy(1,curentry-curoffset);
+      for (i=0;i<LCD_COLUMNS-1;i++) {
+        if (scrollofs+i < entrylen) {
+          lcd_putch(menulines[curentry][scrollofs+i]);
+        } else if (scrollofs+i < entrylen+3) {
+          lcd_putch(' ');
+        } else
+          lcd_putch(menulines[curentry][scrollofs+i-entrylen-3]);
+      }
+    }
+  }
+
+  prevencoder = curencoder;
+
+  return curentry;
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/menu.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/menu.h
new file mode 100644
index 00000000..0b9bc866
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/menu.h
@@ -0,0 +1,32 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+   
+   menu.h: Generic menu code
+
+*/
+
+#ifndef MENU_H
+#define MENU_H
+
+extern char *menulines[CONFIG_MAX_MENU_ENTRIES];
+
+void    menu_init(void);
+uint8_t menu_display(uint8_t init, uint8_t startentry);
+void    menu_resetlines(void);
+uint8_t menu_addline(char *line);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/timer.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/timer.c
new file mode 100644
index 00000000..65f1690d
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/lcd-i2c/timer.c
@@ -0,0 +1,47 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   timer.c: System timer
+
+*/
+
+#include "config.h"
+#include <avr/interrupt.h>
+#include <avr/io.h>
+#include "avrcompat.h"
+#include "encoder.h"
+#include "timer.h"
+
+volatile tick_t ticks;
+
+/* The main timer interrupt */
+ISR(TIMER1_COMPA_vect) {
+  ticks++;
+  encoder_buttonisr();
+}
+
+void timer_init(void) {
+  /* Count F_CPU/8 in timer 0 */
+  TCCR0B = _BV(CS01);
+
+  /* Set up a 100Hz interrupt using timer 1 */
+  OCR1A  = 1250*((float)F_CPU/8000000.0) -1;
+  TCNT1  = 0;
+  TCCR1A = 0;
+  TCCR1B = _BV(WGM12) | _BV(CS10) | _BV(CS11);
+  TIMSK1 |= _BV(OCIE1A);
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/led.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/led.c
new file mode 100644
index 00000000..6b6ff50a
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/led.c
@@ -0,0 +1,46 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   led.c: Overdesigned LED handling
+
+*/
+
+#include <avr/io.h>
+#include "config.h"
+#include "buffers.h"
+#include "led.h"
+
+volatile uint8_t led_state;
+
+/**
+ * update_leds - set LEDs to correspond to the buffer status
+ *
+ * This function sets the busy/dirty LEDs to correspond to the current state
+ * of the buffers, i.e. busy on of at least one non-system buffer is
+ * allocated and dirty on if at least one buffer is dirty.
+ * Call if you have manually changed the LEDs and you want to restore the
+ * "default" state.
+ */
+void update_leds(void) {
+  set_busy_led(active_buffers != 0);
+  set_dirty_led(get_dirty_buffer_count() != 0);
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/led.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/led.h
new file mode 100644
index 00000000..54287e66
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/led.h
@@ -0,0 +1,71 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   led.h: Definitions for the LEDs
+
+*/
+
+#ifndef LED_H
+#define LED_H
+
+#include "config.h"
+#include "uart.h"
+
+/* LED-to-bit mapping - BUSY/DIRTY are only used for SINGLE_LED */
+#define LED_ERROR      1
+#define LED_BUSY       2
+#define LED_DIRTY      4
+
+extern volatile uint8_t led_state;
+
+/* Update the LEDs to match the buffer state */
+void update_leds(void);
+
+/* Wrapped in do..while to avoid "ambigious else" warnings */
+#ifdef SINGLE_LED
+#  define set_dirty_led(x) do{if (x) { led_state |= LED_DIRTY; } else { led_state &= (uint8_t)~LED_DIRTY; }}while(0)
+#  define set_busy_led(x)  do{if (x) { led_state |= LED_BUSY ; } else { led_state &= (uint8_t)~LED_BUSY ; }}while(0)
+#  define set_error_led(x) do{if (x) { led_state |= LED_ERROR; } else { led_state &= (uint8_t)~LED_ERROR; }}while(0)
+#else
+#  define set_dirty_led(x) do{if (x) { DIRTY_LED_ON(); } else { DIRTY_LED_OFF(); }}while(0)
+#  define set_busy_led(x)  do{if (x) { BUSY_LED_ON();  } else { BUSY_LED_OFF();  }}while(0)
+#  define set_error_led(x) do{if (x) { led_state |= LED_ERROR; } else { led_state &= (uint8_t)~LED_ERROR; update_leds(); }}while(0)
+#endif
+
+#ifdef POWER_LED_DDR
+static inline void set_power_led(uint8_t state) {
+  if (!!state ^ POWER_LED_POLARITY) {
+    POWER_LED_PORT |= POWER_LED_BIT;
+  } else {
+    POWER_LED_PORT &= (uint8_t)~POWER_LED_BIT;
+  }
+}
+
+static inline void power_led_init(void) {
+  POWER_LED_DDR |= POWER_LED_BIT;
+}
+#else
+#  define set_power_led(x) do {} while (0)
+#  define power_led_init() do {} while (0)
+#endif
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/m2iops.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/m2iops.c
new file mode 100644
index 00000000..2dc0a9dd
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/m2iops.c
@@ -0,0 +1,463 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   m2iops.c: M2I operations
+
+*/
+
+#include <avr/pgmspace.h>
+#include <stdint.h>
+#include <string.h>
+#include "config.h"
+#include "buffers.h"
+#include "dirent.h"
+#include "errormsg.h"
+#include "fatops.h"
+#include "ff.h"
+#include "led.h"
+#include "parser.h"
+#include "ustring.h"
+#include "wrapops.h"
+#include "m2iops.h"
+
+
+#define M2I_ENTRY_LEN      33
+#define M2I_ENTRY_OFFSET   18
+#define M2I_CBMNAME_OFFSET 15
+#define M2I_FATNAME_OFFSET 2
+#define M2I_FATNAME_LEN    12
+
+/* ------------------------------------------------------------------------- */
+/*  Utility functions                                                        */
+/* ------------------------------------------------------------------------- */
+
+/**
+ * name_repad - changes CBM name padding in entrybuf
+ * @oldchar: char to be substituted
+ * @newchar: char to be substituded with
+ *
+ * This function changes the padding of the CBM name in entrybuf from oldchar
+ * to newchar. Please note that strnsubst is not a straigt replacement for
+ * this function.
+ */
+static void name_repad(uint8_t oldchar, uint8_t newchar) {
+  uint8_t i = CBM_NAME_LENGTH-1;
+  uint8_t *str;
+
+  str = entrybuf+M2I_CBMNAME_OFFSET;
+  while (i > 0 && str[i] == oldchar)
+    str[i--] = newchar;
+}
+
+/**
+ * parsetype - change type letter to CBM filetype in entrybuf
+ *
+ * This function replaces the type letter in the M2I line in entrybuf
+ * with a CBM file type. Returns 1 for deleted or unknown type letters,
+ * 0 otherwise.
+ */
+static uint8_t parsetype(void) {
+  switch (entrybuf[0] | 0x20) { /* Lowercase the letter */
+  case 'd':
+    entrybuf[0] = TYPE_DEL;
+    return 0;
+
+  case 's':
+    entrybuf[0] = TYPE_SEQ;
+    return 0;
+
+  case 'p':
+    entrybuf[0] = TYPE_PRG;
+    return 0;
+
+  case 'u':
+    entrybuf[0] = TYPE_USR;
+    return 0;
+
+  default:
+    return 1;
+  }
+}
+
+/**
+ * load_entry - load M2I entry at offset into entrybuf
+ * @part  : partition number
+ * @offset: offset in M2I file to be loaded
+ *
+ * This function loads the M2I line at offset into entrybuf and zero-
+ * terminates the FAT name within.  Returns 0 if successful, 1 at
+ * end of file or 255 on error.
+ */
+static uint8_t load_entry(uint8_t part, uint16_t offset) {
+  uint8_t i;
+
+  i = image_read(part, offset, entrybuf, M2I_ENTRY_LEN);
+
+  if (i > 1)
+    return 255;
+
+  if (i == 1)
+    /* Incomplete entry read, assuming end of file */
+    return 1;
+
+  /* Be nice and zero-terminate the FAT filename */
+  i = 0;
+  while (entrybuf[M2I_FATNAME_OFFSET+i] != ' ' && i < M2I_FATNAME_LEN) i++;
+  entrybuf[M2I_FATNAME_OFFSET+i] = 0;
+
+  return 0;
+}
+
+/**
+ * find_empty_entry - returns the offset of the first empty M2I entry
+ * @part: partition number
+ *
+ * This function looks for a deleted entry in an M2I file and returns
+ * it offset. Returns 1 on error or an offset if successful. The
+ * offset may point to a position beyond the end of file if there
+ * were no free entries available.
+ */
+static uint16_t find_empty_entry(uint8_t part) {
+  uint16_t pos = M2I_ENTRY_OFFSET;
+  uint8_t i;
+
+  while (1) {
+    i = load_entry(part, pos);
+
+    if (i) {
+      if (i == 255)
+        return 1;
+      else
+        return pos;
+    }
+
+    if (entrybuf[0] == '-')
+      return pos;
+
+    pos += M2I_ENTRY_LEN;
+  }
+}
+
+/**
+ * open_existing - open an existing file
+ * @path      : path handle
+ * @dent      : pointer to cbmdirent struct with name of the file
+ * @type      : type of the file (not checked)
+ * @buf       : buffer to be used
+ * @appendflag: Flags if the file should be opened for appending
+ *
+ * This function searches the file name in an M2I file and opens it
+ * either in read or append mode according to appendflag by calling
+ * the appropiate fat_* functions.
+ */
+static void open_existing(path_t *path, cbmdirent_t *dent, uint8_t type, buffer_t *buf, uint8_t appendflag) {
+  if (load_entry(path->part, dent->pvt.m2i.offset)) {
+    set_error(ERROR_FILE_NOT_FOUND);
+    return;
+  }
+
+  if (parsetype()) {
+    set_error(ERROR_FILE_NOT_FOUND);
+    return;
+  }
+
+  ustrcpy(dent->pvt.fat.realname, entrybuf+M2I_FATNAME_OFFSET);
+
+  if (appendflag)
+    fat_open_write(path, dent, type, buf, 1);
+  else
+    fat_open_read(path, dent, buf);
+}
+
+/* ------------------------------------------------------------------------- */
+/*  fileops-API                                                              */
+/* ------------------------------------------------------------------------- */
+
+static uint8_t m2i_opendir(dh_t *dh, path_t *path) {
+  dh->part    = path->part;
+  dh->dir.m2i = M2I_ENTRY_OFFSET;
+  return 0;
+}
+
+static int8_t m2i_readdir(dh_t *dh, cbmdirent_t *dent) {
+  uint8_t i;
+
+  while (1) {
+    i = load_entry(dh->part, dh->dir.m2i);
+    if (i) {
+      if (i == 255)
+        return 1;
+      else
+        return -1;
+    }
+
+    memset(dent, 0, sizeof(cbmdirent_t));
+    dent->pvt.m2i.offset = dh->dir.m2i;
+
+    dh->dir.m2i += M2I_ENTRY_LEN;
+
+    /* Check file type */
+    if (parsetype())
+      continue;
+
+    dent->opstype   = OPSTYPE_M2I;
+    dent->typeflags = entrybuf[0];
+
+    /* Copy CBM file name */
+    name_repad(' ', 0);
+    memcpy(dent->name, entrybuf+M2I_CBMNAME_OFFSET, CBM_NAME_LENGTH);
+
+    /* Get file size */
+    if (dent->typeflags != TYPE_DEL) {
+      /* Sorry, but I have to fake the sizes.                        */
+      /* Reading the correct size as above requires a directory scan */
+      /* per file which means that the single FAT buffer switches    */
+      /* between the M2I file and the directory for every single     */
+      /* file -> slooooow (<1 file/s for an M2I with 500 entries)    */
+      dent->blocksize = 1;
+      dent->remainder = 0xff;
+#if 0
+      FILINFO finfo;
+
+      res = f_stat(entrybuf+M2I_FATNAME_OFFSET, &finfo);
+      if (res != FR_OK) {
+        if (res == FR_NO_FILE)
+          continue;
+        else {
+          parse_error(res,1);
+          return 1;
+        }
+      }
+
+      if (finfo.fsize > 16255746)
+        /* File too large -> size 63999 blocks */
+        dent->blocksize = 63999;
+      else
+        dent->blocksize = (finfo.fsize+253) / 254;
+
+      dent->remainder = finfo.fsize % 254;
+#endif
+    } else
+      dent->blocksize = 0;
+
+    /* Fake Date/Time */
+    dent->date.year  = 82;
+    dent->date.month = 8;
+    dent->date.day   = 31;
+
+    return 0;
+  }
+}
+
+static uint8_t m2i_getdisklabel(uint8_t part, uint8_t *label) {
+  label[16] = 0;
+  return image_read(part, 0, label, 16);
+}
+
+static uint8_t m2i_getdirlabel(path_t *path, uint8_t *label) {
+  return image_read(path->part, 0, label, 16);
+}
+
+static void m2i_open_read(path_t *path, cbmdirent_t *dent, buffer_t *buf) {
+  open_existing(path, dent, TYPE_RAW, buf, 0);
+}
+
+static void m2i_open_write(path_t *path, cbmdirent_t *dent, uint8_t type, buffer_t *buf, uint8_t append) {
+  uint16_t offset;
+  uint8_t *str;
+  uint8_t *nameptr;
+  uint8_t i;
+  FRESULT res;
+
+  /* Check for read-only image file */
+  if (!(partition[path->part].imagehandle.flag & FA_WRITE)) {
+    set_error(ERROR_WRITE_PROTECT);
+    return;
+  }
+
+  if (append) {
+    open_existing(path, dent, type, buf, 1);
+  } else {
+    if (check_invalid_name(dent->name)) {
+      set_error(ERROR_SYNTAX_JOKER);
+      return;
+    }
+
+    /* Find an empty entry */
+    offset = find_empty_entry(path->part);
+    if (offset < M2I_ENTRY_OFFSET)
+      return;
+
+    memset(entrybuf, ' ', sizeof(entrybuf));
+    str = entrybuf;
+
+    switch (type & TYPE_MASK) {
+    case TYPE_DEL:
+      *str++ = 'D';
+      break;
+
+    case TYPE_SEQ:
+      *str++ = 'S';
+      break;
+
+    case TYPE_PRG:
+      *str++ = 'P';
+      break;
+
+    case TYPE_USR:
+      *str++ = 'U';
+      break;
+
+    default:
+      /* Unknown type - play it safe, don't create a file */
+      return;
+    }
+
+    *str++ = ':';
+
+    /* Generate a FAT name */
+    for (i=0;i<8;i++) {
+      *str++ = '0';
+    }
+    *str = 0;
+
+    do {
+      FILINFO finfo;
+
+      finfo.lfn = NULL;
+      /* See if it's already there */
+      res = f_stat(&partition[path->part].fatfs, entrybuf+M2I_FATNAME_OFFSET, &finfo);
+      if (res == FR_OK) {
+        str = entrybuf+M2I_FATNAME_OFFSET+7;
+        /* Increment name */
+        while (1) {
+          if (++(*str) > '9') {
+            *str-- = '0';
+            continue;
+          }
+          break;
+        }
+      }
+    } while (res == FR_OK);
+
+    if (res != FR_NO_FILE)
+      return;
+
+    /* Copy the CBM file name */
+    nameptr = dent->name;
+    str = entrybuf+M2I_CBMNAME_OFFSET;
+    while (*nameptr)
+      *str++ = *nameptr++;
+
+    /* Update dent with the new FAT name */
+    ustrcpy(dent->pvt.fat.realname, entrybuf+M2I_FATNAME_OFFSET);
+
+    /* Finish creating the M2I entry */
+    entrybuf[M2I_FATNAME_OFFSET+8]  = ' ';
+    entrybuf[M2I_FATNAME_OFFSET+12] = ':';
+    entrybuf[M2I_CBMNAME_OFFSET+CBM_NAME_LENGTH] = 13;
+    entrybuf[M2I_CBMNAME_OFFSET+CBM_NAME_LENGTH+1] = 10;
+
+    /* Write it */
+    if (image_write(path->part, offset, entrybuf, M2I_ENTRY_LEN, 1))
+      return;
+
+    /* Write the actual file - always without P00 header */
+    fat_open_write(path, dent, TYPE_RAW, buf, append);
+
+    /* Abort on error */
+    if (current_error) {
+      /* No error checking here. Either it works or everything has failed. */
+      entrybuf[0] = '-';
+      image_write(path->part, offset, entrybuf, 1, 1);
+    }
+  }
+}
+
+static void m2i_open_rel(path_t *path, cbmdirent_t *dent, buffer_t *buf, uint8_t length, uint8_t mode) {
+  set_error(ERROR_SYNTAX_UNABLE);
+}
+
+static uint8_t m2i_delete(path_t *path, cbmdirent_t *dent) {
+  uint16_t offset;
+
+  offset = dent->pvt.m2i.offset;// find_entry
+  if (load_entry(path->part, offset))
+    return 255;
+
+  /* Ignore the result, we'll have to delete the entry anyway */
+  ustrcpy(dent->name, entrybuf+M2I_FATNAME_OFFSET);
+  fat_delete(path, dent);
+
+  entrybuf[0] = '-';
+  if (image_write(path->part, offset, entrybuf, 1, 1))
+    return 0;
+  else
+    return 1;
+}
+
+static void m2i_rename(path_t *path, cbmdirent_t *dent, uint8_t *newname) {
+  uint16_t offset;
+  uint8_t *ptr;
+
+  set_busy_led(1);
+  /* Locate entry in the M2I file */
+  offset = dent->pvt.m2i.offset;
+  if (load_entry(path->part, offset)) {
+    update_leds();
+    return;
+  }
+
+  /* Re-load the entry because load_entry modifies it */
+  /* Assume this never fails because load_entry was successful */
+  image_read(path->part, offset, entrybuf, M2I_ENTRY_LEN);
+
+  /* Copy the new filename */
+  ptr = entrybuf+M2I_CBMNAME_OFFSET;
+  memset(ptr, ' ', CBM_NAME_LENGTH);
+  while (*newname)
+    *ptr++ = *newname++;
+
+  /* Write new entry */
+  image_write(path->part, offset, entrybuf, M2I_ENTRY_LEN, 1);
+
+  update_leds();
+}
+
+const PROGMEM fileops_t m2iops = {
+  m2i_open_read,
+  m2i_open_write,
+  m2i_open_rel,
+  m2i_delete,
+  m2i_getdisklabel,
+  m2i_getdirlabel,
+  fat_getid,
+  fat_freeblocks,
+  fat_sectordummy,
+  fat_sectordummy,
+  format_dummy,
+  m2i_opendir,
+  m2i_readdir,
+  image_mkdir,
+  image_chdir,
+  m2i_rename
+};
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/m2iops.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/m2iops.h
new file mode 100644
index 00000000..ebd9c212
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/m2iops.h
@@ -0,0 +1,34 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   m2iops.h: Definitions for the M2I operations
+
+*/
+
+#ifndef M2IOPS_H
+#define M2IOPS_H
+
+#include "wrapops.h"
+
+extern const fileops_t m2iops;
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/main.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/main.c
new file mode 100644
index 00000000..4e93f3fe
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/main.c
@@ -0,0 +1,187 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   main.c: Lots of init calls for the submodules
+
+*/
+
+#include <stdio.h>
+#include <string.h>
+#include <avr/boot.h>
+#include <avr/interrupt.h>
+#include <avr/pgmspace.h>
+#include <avr/power.h>
+#include <avr/wdt.h>
+#include <util/delay.h>
+#include "config.h"
+#include "buffers.h"
+#include "diskchange.h"
+#include "diskio.h"
+#include "display.h"
+#include "eeprom.h"
+#include "errormsg.h"
+#include "fatops.h"
+#include "ff.h"
+#include "i2c.h"
+#include "iec.h"
+#include "led.h"
+#include "time.h"
+#include "rtc.h"
+#include "timer.h"
+#include "uart.h"
+#include "ustring.h"
+#include "utils.h"
+
+
+/* Make sure the watchdog is disabled as soon as possible    */
+/* Copy this code to your bootloader if you use one and your */
+/* MCU doesn't disable the WDT after reset!                  */
+void get_mcusr(void) \
+      __attribute__((naked)) \
+      __attribute__((section(".init3")));
+void get_mcusr(void)
+{
+  MCUSR = 0;
+  wdt_disable();
+}
+
+#ifdef CONFIG_MEMPOISON
+void poison_memory(void) \
+  __attribute__((naked)) \
+  __attribute__((section(".init1")));
+void poison_memory(void) {
+  register uint16_t i;
+  register uint8_t  *ptr;
+
+  asm("clr r1\n");
+  /* There is no RAMSTARt variable =( */
+  if (RAMEND > 2048 && RAMEND < 4096) {
+    /* 2K memory */
+    ptr = (void *)RAMEND-2047;
+    for (i=0;i<2048;i++)
+      ptr[i] = 0x55;
+  } else if (RAMEND > 4096 && RAMEND < 8192) {
+    /* 4K memory */
+    ptr = (void *)RAMEND-4095;
+    for (i=0;i<4096;i++)
+      ptr[i] = 0x55;
+  } else {
+    /* Assume 8K memory */
+    ptr = (void *)RAMEND-8191;
+    for (i=0;i<8192;i++)
+      ptr[i] = 0x55;
+  }
+}
+#endif
+
+#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ > 1)
+int main(void) __attribute__((OS_main));
+#endif
+int main(void) {
+#if defined __AVR_ATmega644__  || defined __AVR_ATmega644P__ || \
+    defined __AVR_ATmega1281__ || defined __AVR_ATmega2561__ || \
+    defined __AVR_ATmega1284P__
+  asm volatile("in  r24, %0\n"
+               "ori r24, 0x80\n"
+               "out %0, r24\n"
+               "out %0, r24\n"
+               :
+               : "I" (_SFR_IO_ADDR(MCUCR))
+               : "r24"
+               );
+#elif defined __AVR_ATmega32__
+  asm volatile ("in  r24, %0\n"
+                "ori r24, 0x80\n"
+                "out %0, r24\n"
+                "out %0, r24\n"
+                :
+                : "I" (_SFR_IO_ADDR(MCUCSR))
+                : "r24"
+                );
+#elif defined __AVR_ATmega128__ || defined __AVR_ATmega1281__
+  /* Just assume that JTAG doesn't hurt us on the m128 */
+#else
+#  error Unknown chip!
+#endif
+
+#ifdef CLOCK_PRESCALE
+  clock_prescale_set(CLOCK_PRESCALE);
+#endif
+
+#if CONFIG_HARDWARE_VARIANT == 4
+  /* uIEC/CF: Force control lines of the external SRAM high */
+  DDRG  = _BV(PG0) | _BV(PG1) | _BV(PG2);
+  PORTG = _BV(PG0) | _BV(PG1) | _BV(PG2);
+#endif
+
+  BUSY_LED_SETDDR();
+  DIRTY_LED_SETDDR();
+  power_led_init();
+
+  set_power_led(1);
+  set_busy_led(1);
+  set_dirty_led(0);
+
+  uart_init();
+  sei();
+  buffers_init();
+  timer_init();
+  iec_init();
+  rtc_init();
+  disk_init();
+  read_configuration();
+
+  fatops_init(0);
+  change_init();
+
+  uart_puts_P(PSTR("\nsd2iec " VERSION " #"));
+  uart_puthex(device_address);
+  uart_putcrlf();
+
+#ifdef CONFIG_REMOTE_DISPLAY
+  ustrcpy_P(entrybuf,versionstr);
+  ustrcpy_P(entrybuf+ustrlen(entrybuf),longverstr);
+  if (display_init(ustrlen(entrybuf), entrybuf)) {
+    display_address(device_address);
+    display_current_part(0);
+  }
+#endif
+
+  set_busy_led(0);
+
+#ifdef HAVE_SD
+  /* card switch diagnostic aid - hold down PREV button to use */
+  if (!(BUTTON_PIN & BUTTON_PREV)) {
+    while (BUTTON_PIN & BUTTON_NEXT) {
+      set_dirty_led(SDCARD_DETECT);
+# ifdef BUSY_LED_ON
+      set_busy_led(SDCARD_WP);
+# endif
+    }
+    reset_key(0xff);
+  }
+#endif
+
+  iec_mainloop();
+
+  while (1);
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/autoconf.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/autoconf.h
new file mode 100644
index 00000000..412d7c17
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/autoconf.h
@@ -0,0 +1,64 @@
+// autoconf.h generated from config at Tue Nov 05 12:34:22  2013
+#ifndef AUTOCONF_H
+#define AUTOCONF_H
+// This may not look like it, but it's a -*- makefile -*-
+//
+// sd2iec - SD/MMC to Commodore serial bus interface/controller
+// Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+//
+// Inspiration and low-level SD/MMC access based on code from MMC2IEC
+//   by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+//
+//  FAT filesystem access based on code from ChaN, see tff.c|h.
+//
+//  This program is free software; you can redistribute it and/or modify
+//  it under the terms of the GNU General Public License as published by
+//  the Free Software Foundation; version 2 of the License only.
+//
+//  This program is distributed in the hope that it will be useful,
+//  but WITHOUT ANY WARRANTY; without even the implied warranty of
+//  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+//  GNU General Public License for more details.
+//
+//  You should have received a copy of the GNU General Public License
+//  along with this program; if not, write to the Free Software
+//  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+//
+//  config-sw2: sd2iec configuration for Shadowolf's sd2iec PCBs
+//              version 1.x
+//
+//
+// This file is included in the main sd2iec Makefile and also parsed
+// into autoconf.h.
+
+#define CONFIG_MCU atmega1284p
+#define CONFIG_LINKER_RELAX
+#define CONFIG_MCU_FREQ 8000000
+#define CONFIG_BOOTLOADER
+#define CONFIG_BOOT_DEVID 0x31434549
+#define CONFIG_COMMAND_CHANNEL_DUMP
+#define CONFIG_LOADER_TURBODISK
+#define CONFIG_LOADER_FC3
+#define CONFIG_LOADER_DREAMLOAD
+#define CONFIG_LOADER_ULOAD3
+#define CONFIG_LOADER_GIJOE
+#define CONFIG_LOADER_EPYXCART
+#define CONFIG_LOADER_GEOS
+#define CONFIG_LOADER_WHEELS
+#define CONFIG_LOADER_NIPPON
+#define CONFIG_LOADER_AR6
+#define CONFIG_LOADER_ELOAD1
+#define CONFIG_HARDWARE_VARIANT 5
+#define CONFIG_HARDWARE_NAME sd2iec-sw2
+#define CONFIG_SD_AUTO_RETRIES 10
+#define CONFIG_SD_DATACRC
+#define CONFIG_ERROR_BUFFER_SIZE 46
+#define CONFIG_COMMAND_BUFFER_SIZE 120
+#define CONFIG_BUFFER_COUNT 6
+#define CONFIG_EEPROM_SIZE 512
+#define CONFIG_EEPROM_OFFSET 512
+#define CONFIG_MAX_PARTITIONS 4
+#define CONFIG_RTC_VARIANT 2
+#define CONFIG_REMOTE_DISPLAY
+#define CONFIG_DISPLAY_BUFFER_SIZE 40
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/crc7asm.lst b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/crc7asm.lst
new file mode 100644
index 00000000..424a5f9f
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/crc7asm.lst
@@ -0,0 +1,59 @@
+   1               	# 1 "crc7asm.S"
+   1               	/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   0               	
+   0               	
+   2               	/MMC to Commodore serial bus interface/controller
+   3               	   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+   4               	
+   5               	   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+   6               	     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+   7               	
+   8               	   FAT filesystem access based on code from ChaN, see tff.c|h.
+   9               	
+  10               	   This program is free software; you can redistribute it and/or modify
+  11               	   it under the terms of the GNU General Public License as published by
+  12               	   the Free Software Foundation; version 2 of the License only.
+  13               	
+  14               	   This program is distributed in the hope that it will be useful,
+  15               	   but WITHOUT ANY WARRANTY; without even the implied warranty of
+  16               	   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  17               	   GNU General Public License for more details.
+  18               	
+  19               	   You should have received a copy of the GNU General Public License
+  20               	   along with this program; if not, write to the Free Software
+  21               	   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+  22               	
+  23               	
+  24               	   crc7asm.S: space-efficient CRC7 implementation for AVR
+  25               	
+  26               	*/
+  27               	
+  28               	        .section .text
+  29               	
+  30               	        .global crc7update
+  31               	        ;; uint8_t crc7update(uint8_t crc, uint8_t data)
+  32               	        ;;
+  33               	        ;; input : r24: crc, r22: data
+  34               	        ;; output: r24: new crc
+  35:crc7asm.S     **** crc7update:
+  36:crc7asm.S     ****         ldi     r18, 8       ; number of bits to process
+  37:crc7asm.S     ****         ldi     r19, 0x09    ; CRC7 polynomial
+  38               	        ldi     r20, 0x80    ; constant for inverting the top bit of the CRC
+  39:crc7asm.S     **** 
+  40:crc7asm.S     **** loop:   lsl     r24          ; shift CRC
+  41:crc7asm.S     ****         lsl     r22          ; shift data byte
+  42:crc7asm.S     ****         brcc    0f           ; jump if top data bit was 0
+  43:crc7asm.S     ****         eor     r24, r20     ; invert top bit of CRC if not
+  44:crc7asm.S     **** 0:      bst     r24, 7       ; read top bit of CRC
+  45:crc7asm.S     ****         brtc    1f           ; skip if top bit of CRC is now clear
+  46:crc7asm.S     ****         eor     r24, r19     ; apply polynomial
+  47:crc7asm.S     **** 1:      dec     r18          ; decrement bit counter
+  48:crc7asm.S     ****         brne    loop         ; loop for next bit
+  49:crc7asm.S     ****         andi    r24, 0x7f    ; clear top bit of CRC
+  50               	        ret                  ; return
+  51               	
+DEFINED SYMBOLS
+           crc7asm.S:34     .text:00000000 crc7update
+           crc7asm.S:39     .text:00000006 loop
+
+NO UNDEFINED SYMBOLS
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/fastloader-ll.lst b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/fastloader-ll.lst
new file mode 100644
index 00000000..ef345380
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/fastloader-ll.lst
@@ -0,0 +1,2171 @@
+   1               	# 1 "fastloader-ll.S"
+   1               	/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   0               	
+   0               	
+   2               	  Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+   3               	   Copyright (C) 2007-2008  M.Kiesel <mayne@users.sourceforge.net>
+   4               	   Final Cartridge III, DreamLoad fastloader support:
+   5               	   Copyright (C) 2008  Thomas Giesel <skoe@directbox.com>
+   6               	
+   7               	   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+   8               	     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+   9               	
+  10               	   FAT filesystem access based on code from ChaN, see tff.c|h.
+  11               	
+  12               	   This program is free software; you can redistribute it and/or modify
+  13               	   it under the terms of the GNU General Public License as published by
+  14               	   the Free Software Foundation; version 2 of the License only.
+  15               	
+  16               	   This program is distributed in the hope that it will be useful,
+  17               	   but WITHOUT ANY WARRANTY; without even the implied warranty of
+  18               	   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  19               	   GNU General Public License for more details.
+  20               	
+  21               	   You should have received a copy of the GNU General Public License
+  22               	   along with this program; if not, write to the Free Software
+  23               	   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+  24               	
+  25               	
+  26               	   fastloader.S: Low level fastloader transfer routines.
+  27               	
+  28               	   Thanks to Jochen Adler for his Jiffy docs at http://www.nlq.de/
+  29               	
+  30               	*/
+  31               	
+  32               	
+  33               	#include "config.h"
+   1               	/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   2               	   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+   3               	
+   4               	   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+   5               	     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+   6               	
+   7               	   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+   8               	
+   9               	   This program is free software; you can redistribute it and/or modify
+  10               	   it under the terms of the GNU General Public License as published by
+  11               	   the Free Software Foundation; version 2 of the License only.
+  12               	
+  13               	   This program is distributed in the hope that it will be useful,
+  14               	   but WITHOUT ANY WARRANTY; without even the implied warranty of
+  15               	   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  16               	   GNU General Public License for more details.
+  17               	
+  18               	   You should have received a copy of the GNU General Public License
+  19               	   along with this program; if not, write to the Free Software
+  20               	   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+  21               	
+  22               	
+  23               	   config.h: User-configurable options to simplify hardware changes and/or
+  24               	             reduce the code/ram requirements of the code.
+  25               	
+  26               	
+  27               	   Based on MMC2IEC, original copyright header follows:
+  28               	
+  29               	//
+  30               	// Title        : MMC2IEC - Configuration
+  31               	// Author       : Lars Pontoppidan
+  32               	// Date         : Jan. 2007
+  33               	// Version      : 0.7
+  34               	// Target MCU   : AtMega32(L) at 8 MHz
+  35               	//
+  36               	//
+  37               	// DISCLAIMER:
+  38               	// The author is in no way responsible for any problems or damage caused by
+  39               	// using this code. Use at your own risk.
+  40               	//
+  41               	// LICENSE:
+  42               	// This code is distributed under the GNU Public License
+  43               	// which can be found at http://www.gnu.org/licenses/gpl.txt
+  44               	//
+  45               	
+  46               	*/
+  47               	
+  48               	#ifndef CONFIG_H
+  49               	#define CONFIG_H
+  50               	
+  51               	#include "autoconf.h"
+   1               	// autoconf.h generated from config at Tue Nov 05 12:34:22  2013
+  52               	on 1284P */
+  53               	#include "avrcompat.h"
+  54               	
+   1               	/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+  55               	 CONFIG_HARDWARE_VARIANT==1
+  34               	 <avr/io.h>
+   1               	/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+  35               	/* Timing offsets for JiffyDos read/write */
+   1               	/* Copyright (c) 2002,2003,2005,2006,2007 Marek Michalkiewicz, Joerg Wunsch
+   2               	   Copyright (c) 2007 Eric B. Weddington
+   3               	   All rights reserved.
+   4               	
+   5               	   Redistribution and use in source and binary forms, with or without
+   6               	   modification, are permitted provided that the following conditions are met:
+   7               	
+   8               	   * Redistributions of source code must retain the above copyright
+   9               	     notice, this list of conditions and the following disclaimer.
+  10               	
+  11               	   * Redistributions in binary form must reproduce the above copyright
+  12               	     notice, this list of conditions and the following disclaimer in
+  13               	     the documentation and/or other materials provided with the
+  14               	     distribution.
+  15               	
+  16               	   * Neither the name of the copyright holders nor the names of
+  17               	     contributors may be used to endorse or promote products derived
+  18               	     from this software without specific prior written permission.
+  19               	
+  20               	  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  21               	  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  22               	  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  23               	  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  24               	  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  25               	  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  26               	  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  27               	  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  28               	  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  29               	  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+  30               	  POSSIBILITY OF SUCH DAMAGE. */
+  31               	
+  32               	/* $Id: io.h,v 1.52.2.28 2009/12/20 17:02:53 arcanum Exp $ */
+  33               	
+  34               	/** \file */
+  35               	/** \defgroup avr_io <avr/io.h>: AVR device-specific IO definitions
+  36               	    \code #include <avr/io.h> \endcode
+  37               	
+  38               	    This header file includes the apropriate IO definitions for the
+  39               	    device that has been specified by the <tt>-mmcu=</tt> compiler
+  40               	    command-line switch.  This is done by diverting to the appropriate
+  41               	    file <tt>&lt;avr/io</tt><em>XXXX</em><tt>.h&gt;</tt> which should
+  42               	    never be included directly.  Some register names common to all
+  43               	    AVR devices are defined directly within <tt>&lt;avr/common.h&gt;</tt>,
+  44               	    which is included in <tt>&lt;avr/io.h&gt;</tt>,
+  45               	    but most of the details come from the respective include file.
+  46               	
+  47               	    Note that this file always includes the following files:
+  48               	    \code 
+  49               	    #include <avr/sfr_defs.h>
+  50               	    #include <avr/portpins.h>
+  51               	    #include <avr/common.h>
+  52               	    #include <avr/version.h>
+  53               	    \endcode
+  54               	    See \ref avr_sfr for more details about that header file.
+  55               	
+  56               	    Included are definitions of the IO register set and their
+  57               	    respective bit values as specified in the Atmel documentation.
+  58               	    Note that inconsistencies in naming conventions,
+  59               	    so even identical functions sometimes get different names on
+  60               	    different devices.
+  61               	
+  62               	    Also included are the specific names useable for interrupt
+  63               	    function definitions as documented
+  64               	    \ref avr_signames "here".
+  65               	
+  66               	    Finally, the following macros are defined:
+  67               	
+  68               	    - \b RAMEND
+  69               	    <br>
+  70               	    The last on-chip RAM address.
+  71               	    <br>
+  72               	    - \b XRAMEND
+  73               	    <br>
+  74               	    The last possible RAM location that is addressable. This is equal to 
+  75               	    RAMEND for devices that do not allow for external RAM. For devices 
+  76               	    that allow external RAM, this will be larger than RAMEND.
+  77               	    <br>
+  78               	    - \b E2END
+  79               	    <br>
+  80               	    The last EEPROM address.
+  81               	    <br>
+  82               	    - \b FLASHEND
+  83               	    <br>
+  84               	    The last byte address in the Flash program space.
+  85               	    <br>
+  86               	    - \b SPM_PAGESIZE
+  87               	    <br>
+  88               	    For devices with bootloader support, the flash pagesize
+  89               	    (in bytes) to be used for the \c SPM instruction. 
+  90               	    - \b E2PAGESIZE
+  91               	    <br>
+  92               	    The size of the EEPROM page.
+  93               	    
+  94               	*/
+  95               	
+  96               	#ifndef _AVR_IO_H_
+  97               	#define _AVR_IO_H_
+  98               	
+  99               	#include <avr/sfr_defs.h>
+   1               	/* Copyright (c) 2002, Marek Michalkiewicz <marekm@amelek.gda.pl>
+ 100               	
+ 101               	#if defined (__AVR_AT94K__)
+ 102               	#  include <avr/ioat94k.h>
+ 103               	#elif defined (__AVR_AT43USB320__)
+ 104               	#  include <avr/io43u32x.h>
+ 105               	#elif defined (__AVR_AT43USB355__)
+ 106               	#  include <avr/io43u35x.h>
+ 107               	#elif defined (__AVR_AT76C711__)
+ 108               	#  include <avr/io76c711.h>
+ 109               	#elif defined (__AVR_AT86RF401__)
+ 110               	#  include <avr/io86r401.h>
+ 111               	#elif defined (__AVR_AT90PWM1__)
+ 112               	#  include <avr/io90pwm1.h>
+ 113               	#elif defined (__AVR_AT90PWM2__)
+ 114               	#  include <avr/io90pwmx.h>
+ 115               	#elif defined (__AVR_AT90PWM2B__)
+ 116               	#  include <avr/io90pwm2b.h>
+ 117               	#elif defined (__AVR_AT90PWM3__)
+ 118               	#  include <avr/io90pwmx.h>
+ 119               	#elif defined (__AVR_AT90PWM3B__)
+ 120               	#  include <avr/io90pwm3b.h>
+ 121               	#elif defined (__AVR_AT90PWM216__)
+ 122               	#  include <avr/io90pwm216.h>
+ 123               	#elif defined (__AVR_AT90PWM316__)
+ 124               	#  include <avr/io90pwm316.h>
+ 125               	#elif defined (__AVR_AT90PWM81__)
+ 126               	#  include <avr/io90pwm81.h>
+ 127               	#elif defined (__AVR_ATmega8U2__)
+ 128               	#  include <avr/iom8u2.h>
+ 129               	#elif defined (__AVR_ATmega16M1__)
+ 130               	#  include <avr/iom16m1.h>
+ 131               	#elif defined (__AVR_ATmega16U2__)
+ 132               	#  include <avr/iom16u2.h>
+ 133               	#elif defined (__AVR_ATmega16U4__)
+ 134               	#  include <avr/iom16u4.h>
+ 135               	#elif defined (__AVR_ATmega32C1__)
+ 136               	#  include <avr/iom32c1.h>
+ 137               	#elif defined (__AVR_ATmega32M1__)
+ 138               	#  include <avr/iom32m1.h>
+ 139               	#elif defined (__AVR_ATmega32U2__)
+ 140               	#  include <avr/iom32u2.h>
+ 141               	#elif defined (__AVR_ATmega32U4__)
+ 142               	#  include <avr/iom32u4.h>
+ 143               	#elif defined (__AVR_ATmega32U6__)
+ 144               	#  include <avr/iom32u6.h>
+ 145               	#elif defined (__AVR_ATmega64C1__)
+ 146               	#  include <avr/iom64c1.h>
+ 147               	#elif defined (__AVR_ATmega64M1__)
+ 148               	#  include <avr/iom64m1.h>
+ 149               	#elif defined (__AVR_ATmega128__)
+ 150               	#  include <avr/iom128.h>
+ 151               	#elif defined (__AVR_ATmega1280__)
+ 152               	#  include <avr/iom1280.h>
+ 153               	#elif defined (__AVR_ATmega1281__)
+ 154               	#  include <avr/iom1281.h>
+ 155               	#elif defined (__AVR_ATmega1284P__)
+ 156               	#  include <avr/iom1284p.h>
+   1               	/* Copyright (c) 2007 Atmel Corporation
+ 157               	#elif defined (__AVR_ATmega128RFA1__)
+ 158               	#  include <avr/iom128rfa1.h>
+ 159               	#elif defined (__AVR_ATmega2560__)
+ 160               	#  include <avr/iom2560.h>
+ 161               	#elif defined (__AVR_ATmega2561__)
+ 162               	#  include <avr/iom2561.h>
+ 163               	#elif defined (__AVR_AT90CAN32__)
+ 164               	#  include <avr/iocan32.h>
+ 165               	#elif defined (__AVR_AT90CAN64__)
+ 166               	#  include <avr/iocan64.h>
+ 167               	#elif defined (__AVR_AT90CAN128__)
+ 168               	#  include <avr/iocan128.h>
+ 169               	#elif defined (__AVR_AT90USB82__)
+ 170               	#  include <avr/iousb82.h>
+ 171               	#elif defined (__AVR_AT90USB162__)
+ 172               	#  include <avr/iousb162.h>
+ 173               	#elif defined (__AVR_AT90USB646__)
+ 174               	#  include <avr/iousb646.h>
+ 175               	#elif defined (__AVR_AT90USB647__)
+ 176               	#  include <avr/iousb647.h>
+ 177               	#elif defined (__AVR_AT90USB1286__)
+ 178               	#  include <avr/iousb1286.h>
+ 179               	#elif defined (__AVR_AT90USB1287__)
+ 180               	#  include <avr/iousb1287.h>
+ 181               	#elif defined (__AVR_ATmega64__)
+ 182               	#  include <avr/iom64.h>
+ 183               	#elif defined (__AVR_ATmega640__)
+ 184               	#  include <avr/iom640.h>
+ 185               	#elif defined (__AVR_ATmega644__) || defined (__AVR_ATmega644A__)
+ 186               	#  include <avr/iom644.h>
+ 187               	#elif defined (__AVR_ATmega644P__)
+ 188               	#  include <avr/iom644p.h>
+ 189               	#elif defined (__AVR_ATmega644PA__)
+ 190               	#  include <avr/iom644pa.h>
+ 191               	#elif defined (__AVR_ATmega645__) || defined (__AVR_ATmega645A__) || defined (__AVR_ATmega645P__)
+ 192               	#  include <avr/iom645.h>
+ 193               	#elif defined (__AVR_ATmega6450__) || defined (__AVR_ATmega6450A__) || defined (__AVR_ATmega6450P__
+ 194               	#  include <avr/iom6450.h>
+ 195               	#elif defined (__AVR_ATmega649__) || defined (__AVR_ATmega649A__)
+ 196               	#  include <avr/iom649.h>
+ 197               	#elif defined (__AVR_ATmega6490__) || defined (__AVR_ATmega6490A__) || defined (__AVR_ATmega6490P__
+ 198               	#  include <avr/iom6490.h>
+ 199               	#elif defined (__AVR_ATmega649P__)
+ 200               	#  include <avr/iom649p.h>
+ 201               	#elif defined (__AVR_ATmega64HVE__)
+ 202               	#  include <avr/iom64hve.h>
+ 203               	#elif defined (__AVR_ATmega103__)
+ 204               	#  include <avr/iom103.h>
+ 205               	#elif defined (__AVR_ATmega32__)
+ 206               	#  include <avr/iom32.h>
+ 207               	#elif defined (__AVR_ATmega323__)
+ 208               	#  include <avr/iom323.h>
+ 209               	#elif defined (__AVR_ATmega324P__) || defined (__AVR_ATmega324A__)
+ 210               	#  include <avr/iom324.h>
+ 211               	#elif defined (__AVR_ATmega324PA__)
+ 212               	#  include <avr/iom324pa.h>
+ 213               	#elif defined (__AVR_ATmega325__)
+ 214               	#  include <avr/iom325.h>
+ 215               	#elif defined (__AVR_ATmega325P__)
+ 216               	#  include <avr/iom325.h>
+ 217               	#elif defined (__AVR_ATmega3250__)
+ 218               	#  include <avr/iom3250.h>
+ 219               	#elif defined (__AVR_ATmega3250P__)
+ 220               	#  include <avr/iom3250.h>
+ 221               	#elif defined (__AVR_ATmega328P__) || defined (__AVR_ATmega328__)
+ 222               	#  include <avr/iom328p.h>
+ 223               	#elif defined (__AVR_ATmega329__)
+ 224               	#  include <avr/iom329.h>
+ 225               	#elif defined (__AVR_ATmega329P__) || defined (__AVR_ATmega329PA__)
+ 226               	#  include <avr/iom329.h>
+ 227               	#elif defined (__AVR_ATmega3290__)
+ 228               	#  include <avr/iom3290.h>
+ 229               	#elif defined (__AVR_ATmega3290P__)
+ 230               	#  include <avr/iom3290.h>
+ 231               	#elif defined (__AVR_ATmega32HVB__)
+ 232               	#  include <avr/iom32hvb.h>
+ 233               	#elif defined (__AVR_ATmega406__)
+ 234               	#  include <avr/iom406.h>
+ 235               	#elif defined (__AVR_ATmega16__)
+ 236               	#  include <avr/iom16.h>
+ 237               	#elif defined (__AVR_ATmega16A__)
+ 238               	#  include <avr/iom16a.h>
+ 239               	#elif defined (__AVR_ATmega161__)
+ 240               	#  include <avr/iom161.h>
+ 241               	#elif defined (__AVR_ATmega162__)
+ 242               	#  include <avr/iom162.h>
+ 243               	#elif defined (__AVR_ATmega163__)
+ 244               	#  include <avr/iom163.h>
+ 245               	#elif defined (__AVR_ATmega164P__) || defined (__AVR_ATmega164A__)
+ 246               	#  include <avr/iom164.h>
+ 247               	#elif defined (__AVR_ATmega165__) || defined (__AVR_ATmega165A__)
+ 248               	#  include <avr/iom165.h>
+ 249               	#elif defined (__AVR_ATmega165P__)
+ 250               	#  include <avr/iom165p.h>
+ 251               	#elif defined (__AVR_ATmega168__) || defined (__AVR_ATmega168A__)
+ 252               	#  include <avr/iom168.h>
+ 253               	#elif defined (__AVR_ATmega168P__)
+ 254               	#  include <avr/iom168p.h>
+ 255               	#elif defined (__AVR_ATmega169__) || defined (__AVR_ATmega169A__)
+ 256               	#  include <avr/iom169.h>
+ 257               	#elif defined (__AVR_ATmega169P__)
+ 258               	#  include <avr/iom169p.h>
+ 259               	#elif defined (__AVR_ATmega169PA__)
+ 260               	#  include <avr/iom169pa.h>
+ 261               	#elif defined (__AVR_ATmega8HVA__)
+ 262               	#  include <avr/iom8hva.h>
+ 263               	#elif defined (__AVR_ATmega16HVA__)
+ 264               	#  include <avr/iom16hva.h>
+ 265               	#elif defined (__AVR_ATmega16HVA2__)
+ 266               	#  include <avr/iom16hva2.h>
+ 267               	#elif defined (__AVR_ATmega16HVB__)
+ 268               	#  include <avr/iom16hvb.h>
+ 269               	#elif defined (__AVR_ATmega8__)
+ 270               	#  include <avr/iom8.h>
+ 271               	#elif defined (__AVR_ATmega48__) || defined (__AVR_ATmega48A__)
+ 272               	#  include <avr/iom48.h>
+ 273               	#elif defined (__AVR_ATmega48P__)
+ 274               	#  include <avr/iom48p.h>
+ 275               	#elif defined (__AVR_ATmega88__) || defined (__AVR_ATmega88A__)
+ 276               	#  include <avr/iom88.h>
+ 277               	#elif defined (__AVR_ATmega88P__)
+ 278               	#  include <avr/iom88p.h>
+ 279               	#elif defined (__AVR_ATmega88PA__)
+ 280               	#  include <avr/iom88pa.h>
+ 281               	#elif defined (__AVR_ATmega8515__)
+ 282               	#  include <avr/iom8515.h>
+ 283               	#elif defined (__AVR_ATmega8535__)
+ 284               	#  include <avr/iom8535.h>
+ 285               	#elif defined (__AVR_AT90S8535__)
+ 286               	#  include <avr/io8535.h>
+ 287               	#elif defined (__AVR_AT90C8534__)
+ 288               	#  include <avr/io8534.h>
+ 289               	#elif defined (__AVR_AT90S8515__)
+ 290               	#  include <avr/io8515.h>
+ 291               	#elif defined (__AVR_AT90S4434__)
+ 292               	#  include <avr/io4434.h>
+ 293               	#elif defined (__AVR_AT90S4433__)
+ 294               	#  include <avr/io4433.h>
+ 295               	#elif defined (__AVR_AT90S4414__)
+ 296               	#  include <avr/io4414.h>
+ 297               	#elif defined (__AVR_ATtiny22__)
+ 298               	#  include <avr/iotn22.h>
+ 299               	#elif defined (__AVR_ATtiny26__)
+ 300               	#  include <avr/iotn26.h>
+ 301               	#elif defined (__AVR_AT90S2343__)
+ 302               	#  include <avr/io2343.h>
+ 303               	#elif defined (__AVR_AT90S2333__)
+ 304               	#  include <avr/io2333.h>
+ 305               	#elif defined (__AVR_AT90S2323__)
+ 306               	#  include <avr/io2323.h>
+ 307               	#elif defined (__AVR_AT90S2313__)
+ 308               	#  include <avr/io2313.h>
+ 309               	#elif defined (__AVR_ATtiny2313__)
+ 310               	#  include <avr/iotn2313.h>
+ 311               	#elif defined (__AVR_ATtiny2313A__)
+ 312               	#  include <avr/iotn2313a.h>
+ 313               	#elif defined (__AVR_ATtiny13__)
+ 314               	#  include <avr/iotn13.h>
+ 315               	#elif defined (__AVR_ATtiny13A__)
+ 316               	#  include <avr/iotn13a.h>
+ 317               	#elif defined (__AVR_ATtiny25__)
+ 318               	#  include <avr/iotn25.h>
+ 319               	#elif defined (__AVR_ATtiny4313__)
+ 320               	#  include <avr/iotn4313.h>
+ 321               	#elif defined (__AVR_ATtiny45__)
+ 322               	#  include <avr/iotn45.h>
+ 323               	#elif defined (__AVR_ATtiny85__)
+ 324               	#  include <avr/iotn85.h>
+ 325               	#elif defined (__AVR_ATtiny24__)
+ 326               	#  include <avr/iotn24.h>
+ 327               	#elif defined (__AVR_ATtiny24A__)
+ 328               	#  include <avr/iotn24a.h>
+ 329               	#elif defined (__AVR_ATtiny44__)
+ 330               	#  include <avr/iotn44.h>
+ 331               	#elif defined (__AVR_ATtiny44A__)
+ 332               	#  include <avr/iotn44a.h>
+ 333               	#elif defined (__AVR_ATtiny84__)
+ 334               	#  include <avr/iotn84.h>
+ 335               	#elif defined (__AVR_ATtiny261__)
+ 336               	#  include <avr/iotn261.h>
+ 337               	#elif defined (__AVR_ATtiny261A__)
+ 338               	#  include <avr/iotn261a.h>
+ 339               	#elif defined (__AVR_ATtiny461__)
+ 340               	#  include <avr/iotn461.h>
+ 341               	#elif defined (__AVR_ATtiny461A__)
+ 342               	#  include <avr/iotn461a.h>
+ 343               	#elif defined (__AVR_ATtiny861__)
+ 344               	#  include <avr/iotn861.h>
+ 345               	#elif defined (__AVR_ATtiny861A__)
+ 346               	#  include <avr/iotn861a.h>
+ 347               	#elif defined (__AVR_ATtiny43U__)
+ 348               	#  include <avr/iotn43u.h>
+ 349               	#elif defined (__AVR_ATtiny48__)
+ 350               	#  include <avr/iotn48.h>
+ 351               	#elif defined (__AVR_ATtiny88__)
+ 352               	#  include <avr/iotn88.h>
+ 353               	#elif defined (__AVR_ATtiny87__)
+ 354               	#  include <avr/iotn87.h>
+ 355               	#elif defined (__AVR_ATtiny167__)
+ 356               	#  include <avr/iotn167.h>
+ 357               	#elif defined (__AVR_AT90SCR100__)
+ 358               	#  include <avr/io90scr100.h>
+ 359               	#elif defined (__AVR_ATxmega16A4__)
+ 360               	#  include <avr/iox16a4.h>
+ 361               	#elif defined (__AVR_ATxmega16D4__)
+ 362               	#  include <avr/iox16d4.h>
+ 363               	#elif defined (__AVR_ATxmega32A4__)
+ 364               	#  include <avr/iox32a4.h>
+ 365               	#elif defined (__AVR_ATxmega32D4__)
+ 366               	#  include <avr/iox32d4.h>
+ 367               	#elif defined (__AVR_ATxmega64A1__)
+ 368               	#  include <avr/iox64a1.h>
+ 369               	#elif defined (__AVR_ATxmega64A3__)
+ 370               	#  include <avr/iox64a3.h>
+ 371               	#elif defined (__AVR_ATxmega64D3__)
+ 372               	#  include <avr/iox64d3.h>
+ 373               	#elif defined (__AVR_ATxmega128A1__)
+ 374               	#  include <avr/iox128a1.h>
+ 375               	#elif defined (__AVR_ATxmega128A3__)
+ 376               	#  include <avr/iox128a3.h>
+ 377               	#elif defined (__AVR_ATxmega128D3__)
+ 378               	#  include <avr/iox128d3.h>
+ 379               	#elif defined (__AVR_ATxmega192A3__)
+ 380               	#  include <avr/iox192a3.h>
+ 381               	#elif defined (__AVR_ATxmega192D3__)
+ 382               	#  include <avr/iox192d3.h>
+ 383               	#elif defined (__AVR_ATxmega256A3__)
+ 384               	#  include <avr/iox256a3.h>
+ 385               	#elif defined (__AVR_ATxmega256A3B__)
+ 386               	#  include <avr/iox256a3b.h>
+ 387               	#elif defined (__AVR_ATxmega256D3__)
+ 388               	#  include <avr/iox256d3.h>
+ 389               	#elif defined (__AVR_ATA6289__)
+ 390               	#  include <avr/ioa6289.h>
+ 391               	/* avr1: the following only supported for assembler programs */
+ 392               	#elif defined (__AVR_ATtiny28__)
+ 393               	#  include <avr/iotn28.h>
+ 394               	#elif defined (__AVR_AT90S1200__)
+ 395               	#  include <avr/io1200.h>
+ 396               	#elif defined (__AVR_ATtiny15__)
+ 397               	#  include <avr/iotn15.h>
+ 398               	#elif defined (__AVR_ATtiny12__)
+ 399               	#  include <avr/iotn12.h>
+ 400               	#elif defined (__AVR_ATtiny11__)
+ 401               	#  include <avr/iotn11.h>
+ 402               	#else
+ 403               	#  if !defined(__COMPILING_AVR_LIBC__)
+ 404               	#    warning "device type not defined"
+ 405               	#  endif
+ 406               	#endif
+ 407               	
+ 408               	#include <avr/portpins.h>
+   1               	/* Copyright (c) 2003  Theodore A. Roth
+ 409               	
+ 410               	#include <avr/common.h>
+   1               	/* Copyright (c) 2007 Eric B. Weddington
+ 411               	
+ 412               	#include <avr/version.h>
+   1               	/* Copyright (c) 2005, Joerg Wunsch                               -*- c -*-
+ 413               	
+ 414               	/* Include fuse.h after individual IO header files. */
+ 415               	#include <avr/fuse.h>
+   1               	/* Copyright (c) 2007, Atmel Corporation
+ 416               	
+ 417               	/* Include lock.h after individual IO header files. */
+ 418               	#include <avr/lock.h>
+   1               	/* Copyright (c) 2007, Atmel Corporation
+ 419               	
+  36               	* These values are added to the delayloop counter before the first      */
+  37               	/* bitpair read/write. They were determined experimentally to center the */
+  38               	/* range of working OSCCAL values around the default value.              */
+  39               	#define JIFFY_OFFSET_WRITE 30
+  40               	#define JIFFY_OFFSET_READ  30
+  41               	
+  42               	        .section .text
+  43               	
+  44               	#if defined(IEC_ATN_INT_VECT) && defined(CONFIG_LOADER_DREAMLOAD)
+  45               	        ;; ===================================================================
+  46               	        ;; ATN(+CLK) Interrupt service routine for IEC bus
+  47               	        ;; ===================================================================
+  48               	        ;
+  49               	        ; Functions called from here may change these registers:
+  50               	        ; r0, r18, r19, r24
+  51               	        ; Other registers must be saved and restored by the called functions
+  52               	        ;
+  53               	        .global IEC_ATN_INT_VECT
+  54               	IEC_ATN_INT_VECT:
+  55               	        ; functions called from here must only change these registers:
+  56               	        push    r18
+  57               	        in      r18, _SFR_IO_ADDR(SREG)
+  58:fastloader-ll.S ****         push    r18
+  59:fastloader-ll.S ****         push    r19
+  60:fastloader-ll.S ****         push    r24
+  61:fastloader-ll.S ****         push    r0
+  62:fastloader-ll.S **** 
+  63:fastloader-ll.S **** #ifdef IEC_PCMSK
+  64               	        lds     r18, _SFR_ADDR(IEC_PCMSK)
+  65               	        bst     r18, IEC_PIN_ATN        ; only check ATN
+  66:fastloader-ll.S ****         brtc    iiv_atn_irq_end         ; if it is an IRQ source
+  67:fastloader-ll.S **** #endif
+  68:fastloader-ll.S **** 
+  69               	        ; check if ATN is low
+  70               	        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+  71               	        rjmp    iiv_atn_irq_end
+  72:fastloader-ll.S **** 
+  73:fastloader-ll.S ****         ; ATN is low, continue depending from active fast loader
+  74               	        lds     r18, detected_loader
+  75               	        cpi     r18, FL_DREAMLOAD_OLD
+  76:fastloader-ll.S ****         brne    iiv_not_fl_dreamload_old
+  77:fastloader-ll.S ****         ; dreamload (old), receive a command code
+  78:fastloader-ll.S ****         rcall   dreamload_get_command_old
+  79               	        rjmp    iiv_atn_irq_end         ; no other ATN action needed
+  80:fastloader-ll.S **** 
+  81:fastloader-ll.S **** iiv_not_fl_dreamload_old:
+  82               	        ; no custom behaviour, this is ATN ACK
+  83               	        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA    ; DATA low
+  84               	
+  85:fastloader-ll.S **** iiv_atn_irq_end:
+  86               	#ifdef IEC_PCMSK
+  87               	        lds     r18, _SFR_ADDR(IEC_PCMSK)
+  88               	        bst     r18, IEC_PIN_CLOCK      ; only check CLOCK
+  89:fastloader-ll.S ****         brtc    iiv_clock_irq_end       ; if it is an IRQ source
+  90:fastloader-ll.S **** 
+  91:fastloader-ll.S ****         ; check if CLOCK is low
+  92               	        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+  93               	        rjmp    iiv_clock_irq_end
+  94:fastloader-ll.S **** 
+  95:fastloader-ll.S ****         ; CLOCK is low, continue depending from active fast loader
+  96               	        lds     r18, detected_loader
+  97               	        cpi     r18, FL_DREAMLOAD
+  98:fastloader-ll.S ****         brne    iiv_not_fl_dreamload
+  99:fastloader-ll.S ****         ; dreamload, receive a command code
+ 100:fastloader-ll.S ****         rcall   dreamload_get_command
+ 101               	        rjmp    iiv_clock_irq_end       ; no other CLOCK action needed
+ 102:fastloader-ll.S **** 
+ 103:fastloader-ll.S **** iiv_not_fl_dreamload:
+ 104               	#endif // ifdef IEC_PCMSK
+ 105               	
+ 106               	iiv_clock_irq_end:
+ 107               	
+ 108               	        pop     r0
+ 109               	        pop     r24
+ 110:fastloader-ll.S ****         pop     r19
+ 111:fastloader-ll.S ****         pop     r18
+ 112:fastloader-ll.S ****         out     _SFR_IO_ADDR(SREG), r18
+ 113:fastloader-ll.S ****         pop     r18
+ 114:fastloader-ll.S ****         reti
+ 115:fastloader-ll.S **** #endif // ifdef IEC_ATN_INT_VECT
+ 116:fastloader-ll.S **** 
+ 117               	
+ 118               	#ifdef IEC_CLK_INT_VECT
+ 119               	        ;; ===================================================================
+ 120               	        ;; CLK Interrupt service routine for IEC bus
+ 121               	        ;; ===================================================================
+ 122               	        ;
+ 123               	        ; Functions called from here may change these registers:
+ 124               	        ; r0, r18, r19, r24
+ 125               	        ; Other registers must be saved and restored by the called functions
+ 126               	        ;
+ 127               	        .global IEC_CLK_INT_VECT
+ 128               	IEC_CLK_INT_VECT:
+ 129               	        ; functions called from here must only change these registers:
+ 130               	        push    r18
+ 131               	        in      r18, _SFR_IO_ADDR(SREG)
+ 132               	        push    r18
+ 133               	        push    r19
+ 134               	        push    r24
+ 135               	        push    r0
+ 136               	
+ 137               	        ; check if CLOCK is low
+ 138               	        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 139               	        rjmp    clk_irq_end
+ 140               	
+ 141               	        ; CLOCK is low, continue depending from active fast loader
+ 142               	#ifdef CONFIG_LOADER_DREAMLOAD
+ 143               	        lds     r18, detected_loader
+ 144               	        cpi     r18, FL_DREAMLOAD
+ 145               	        brne    clk_not_fl_dreamload
+ 146               	        ; dreamload, receive a command code
+ 147               	        rcall   dreamload_get_command
+ 148               	        rjmp    clk_irq_end       ; no other CLOCK action needed
+ 149               	clk_not_fl_dreamload:
+ 150               	#endif // ifdef CONFIG_LOADER_DREAMLOAD
+ 151               	
+ 152               	clk_irq_end:
+ 153               	
+ 154               	        pop     r0
+ 155               	        pop     r24
+ 156               	        pop     r19
+ 157               	        pop     r18
+ 158               	        out     _SFR_IO_ADDR(SREG), r18
+ 159               	        pop     r18
+ 160               	        reti
+ 161               	#endif // ifdef IEC_CLK_INT_VECT
+ 162               	
+ 163               	
+ 164               	        ;; ===================================================================
+ 165               	        ;;  Utility routines
+ 166               	        ;; ===================================================================
+ 167               	
+ 168               	        ;;  Used by the macro below, don't call directly
+ 169               	cycleloop2:
+ 170               	        nop                     ; 1
+ 171               	cycleloop1:
+ 172:fastloader-ll.S ****         nop                     ; 1
+ 173               	cycleloop0:
+ 174:fastloader-ll.S ****         dec     r18             ; 1
+ 175               	        brne    cycleloop0      ; 2/1
+ 176:fastloader-ll.S ****         ret                     ; 4
+ 177:fastloader-ll.S **** 
+ 178:fastloader-ll.S ****         ;; This macro waits for the specified number of cycles
+ 179               	        ;;  Uses r18
+ 180               	        .macro delay_cycles num
+ 181               	        ldi     r18, 1 + (\num - 10) / 3 ; 1
+ 182               	        .if (\num - 10) % 3 == 0
+ 183               	        rcall   cycleloop0      ; 3
+ 184               	        .elseif (\num - 10) % 3 == 1
+ 185               	        rcall   cycleloop1      ; 3
+ 186               	        .else
+ 187               	        rcall   cycleloop2      ; 3
+ 188               	        .endif
+ 189               	        .endm
+ 190               	
+ 191               	
+ 192               	        ;; Including the rcall this will delay for 8 cycles
+ 193               	delay1us:
+ 194               	        nop                     ; 1
+ 195               	        ret                     ; 4
+ 196:fastloader-ll.S **** 
+ 197:fastloader-ll.S ****         ;; wait for ATN high
+ 198               	wait_atn_high:
+ 199               	        sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 200               	        rjmp    wait_atn_high
+ 201:fastloader-ll.S ****         ret
+ 202:fastloader-ll.S **** 
+ 203:fastloader-ll.S ****         ;; wait for ATN low
+ 204               	wait_atn_low:
+ 205               	        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 206               	        rjmp    wait_atn_low
+ 207:fastloader-ll.S ****         ret
+ 208:fastloader-ll.S **** 
+ 209:fastloader-ll.S **** 
+ 210               	        ;; ====================================================================
+ 211               	        ;;  JiffyDOS
+ 212               	        ;; ====================================================================
+ 213               	
+ 214               	        ;;
+ 215               	        ;; Receives a single byte using the JiffyDOS protocol
+ 216               	        ;; return uint8_t reveicedbyte (r24)
+ 217               	        ;;
+ 218               	        .global jiffy_receive
+ 219               	jiffy_receive:
+ 220               	        ;; Disable interrupts
+ 221               	        cli
+ 222               	
+ 223:fastloader-ll.S ****         ;; Move pointer to EOF variable into Z
+ 224               	        movw    r30,r24
+ 225               	        clr     r24             ; clear output register
+ 226:fastloader-ll.S ****         clr     r25             ; clear high byte of return value
+ 227:fastloader-ll.S **** 
+ 228:fastloader-ll.S ****         ;; Set clock+data high
+ 229               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 230               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 231:fastloader-ll.S **** 
+ 232:fastloader-ll.S ****         ;; Wait until clock is high and emulate ATN-Ack
+ 233               	0:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 234               	        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA ; Data low if ATN is low
+ 235:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 236:fastloader-ll.S ****         rjmp    0b
+ 237:fastloader-ll.S **** 
+ 238:fastloader-ll.S ****         ;; Wait for 13us from clock high -> 104 cycles
+ 239               	        delay_cycles 104 + JIFFY_OFFSET_READ ; 104 + Offset
+ 240               	
+ 241:fastloader-ll.S ****         ;; Read bit 5+4
+ 242               	        in      r0, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 243               	
+ 244:fastloader-ll.S ****         ;; Store bits in r24
+ 245               	        bst     r0, IEC_PIN_DATA  ; 1 - get data bit
+ 246               	        bld     r24, 5            ; 1 - store as bit 5
+ 247:fastloader-ll.S ****         bst     r0, IEC_PIN_CLOCK ; 1 - get clock bit
+ 248:fastloader-ll.S ****         bld     r24, 4            ; 1 - store as bit 4
+ 249:fastloader-ll.S **** 
+ 250:fastloader-ll.S ****         ;; Wait 13us -> 104-5=99 cycles
+ 251               	        delay_cycles 99         ; 99
+ 252               	
+ 253:fastloader-ll.S ****         ;; Read bit 7+6
+ 254               	        in      r0, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 255               	
+ 256:fastloader-ll.S ****         ;; Store bits in r24
+ 257               	        bst     r0, IEC_PIN_DATA  ; 1 - get data bit
+ 258               	        bld     r24, 7            ; 1 - store as bit 7
+ 259:fastloader-ll.S ****         bst     r0, IEC_PIN_CLOCK ; 1 - get clock bit
+ 260:fastloader-ll.S ****         bld     r24, 6            ; 1 - store as bit 6
+ 261:fastloader-ll.S **** 
+ 262:fastloader-ll.S ****         ;; Wait 11us -> 88-5=83 cycles
+ 263               	        delay_cycles 83         ; 83
+ 264               	
+ 265:fastloader-ll.S ****         ;; Read bit 1+3 [sic]
+ 266               	        in      r0, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 267               	        bst     r0, IEC_PIN_DATA  ; 1 - get data bit
+ 268:fastloader-ll.S ****         bld     r24, 1            ; 1 - store as bit 1
+ 269:fastloader-ll.S ****         bst     r0, IEC_PIN_CLOCK ; 1 - get clock bit
+ 270:fastloader-ll.S ****         bld     r24, 3            ; 1 - store as bit 3
+ 271:fastloader-ll.S **** 
+ 272:fastloader-ll.S ****         ;; Wait 13us -> 104-5=99 cycles
+ 273               	        delay_cycles 99         ; 99
+ 274               	
+ 275:fastloader-ll.S ****         ;; Read Bit 0+2
+ 276               	        in      r0, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 277               	        bst     r0, IEC_PIN_DATA  ; 1 - get data bit
+ 278:fastloader-ll.S ****         bld     r24, 0            ; 1 - store as bit 0
+ 279:fastloader-ll.S ****         bst     r0, IEC_PIN_CLOCK ; 1 - get clock bit
+ 280:fastloader-ll.S ****         bld     r24, 2            ; 1 - store as bit 2
+ 281:fastloader-ll.S **** 
+ 282:fastloader-ll.S ****         ;; Wait 13us -> 104-5=99 cycles
+ 283               	        delay_cycles 99         ; 99
+ 284               	
+ 285:fastloader-ll.S ****         ;; Read EOI mark
+ 286               	        in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 287               	
+ 288:fastloader-ll.S ****         ;; Wait 6us -> 48-1=47 cycles
+ 289               	        delay_cycles 47         ; 47
+ 290               	
+ 291:fastloader-ll.S ****         ;; Data low
+ 292               	        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA ; 1
+ 293               	        delay_cycles 10*8       ; make sure the C64 can see that
+ 294:fastloader-ll.S **** 
+ 295:fastloader-ll.S ****         ;; Post-process data and store last bus state
+ 296               	        com     r24             ; invert received data (result)
+ 297               	        st      Z, r19          ; store last bus state
+ 298:fastloader-ll.S ****         sei                     ; enable interrupts
+ 299:fastloader-ll.S ****         ret
+ 300:fastloader-ll.S **** 
+ 301:fastloader-ll.S **** 
+ 302               	
+ 303               	        ;; Shifts the lowest two bits from r0 to r19
+ 304               	        ;; and sends then on the bus at cycle 12
+ 305               	        ;; Needs 16 cycles including the rcall
+ 306               	jiffy_sendbits:
+ 307               	        in      r19, _SFR_IO_ADDR(IEC_OUT) ; 1 - read port
+ 308               	        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 309:fastloader-ll.S ****                                     ; 1 - mask IEC bits
+ 310:fastloader-ll.S ****         bst     r0, 0               ; 1 - get bit 0
+ 311               	        bld     r19, IEC_OPIN_CLOCK ; 1 - send on the clock line
+ 312:fastloader-ll.S ****         bst     r0, 1               ; 1 - get bit 1
+ 313:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - send on the data line
+ 314:fastloader-ll.S ****         lsr     r0                  ; 1 - remove source bits
+ 315:fastloader-ll.S ****         lsr     r0                  ; 1
+ 316:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1 - output the bit pair
+ 317:fastloader-ll.S ****         ret                         ; 4
+ 318:fastloader-ll.S **** 
+ 319:fastloader-ll.S ****         ;;
+ 320               	        ;; Sends a single byte using the Jiffy protocol
+ 321               	        ;; uint8_t value (r24), uint8_t eoi (r22), uint8_t loadflags (r20)
+ 322               	        ;; return uint8_t atnactive (r24)
+ 323               	        ;;
+ 324               	        ;; eoi should always be 0 for LOAD because the eoi marker is
+ 325               	        ;; transmitted in a different way there (see C code).
+ 326               	        ;;
+ 327               	        ;; Loadflags has a dual purpose:
+ 328               	        ;;  - if it's != 0, the start condition will be modified for Jiffy-LOAD
+ 329               	        ;;  - bit 7 will be cleared after that
+ 330               	        ;;  - if it's still != 0, the function will exit after sending
+ 331               	        ;;    the last bitpair - required for all but the final byte of a block
+ 332               	        ;;    during LOAD
+ 333               	        .global jiffy_send
+ 334               	jiffy_send:
+ 335               	        cli                     ; Disable interrupts
+ 336               	
+ 337:fastloader-ll.S ****         ;; Calculate bus wait condition based on current state
+ 338               	        ;; The loop below will spin while ATN and Clock are high and
+ 339               	        ;; - Data is low  (single-byte transfer)
+ 340               	        ;; - Data is high (LOAD)
+ 341               	        ldi     r21, IEC_BIT_CLOCK | IEC_BIT_ATN
+ 342               	        tst     r20             ; loadflag set?
+ 343:fastloader-ll.S ****         breq    0f              ; Yes, skip
+ 344:fastloader-ll.S ****                 ; No: Set data bit
+ 345:fastloader-ll.S ****         ori     r21, IEC_BIT_DATA
+ 346               	
+ 347:fastloader-ll.S **** 0:      andi    r20, 0x7f       ; Clear bit 7 of loadflags
+ 348               	
+ 349:fastloader-ll.S ****         ;; Calculate bus state for EOI/not-EOI mark
+ 350               	        tst     r22             ; EOI flag set?
+ 351               	        breq    0f              ; No, branch
+ 352:fastloader-ll.S **** 
+ 353:fastloader-ll.S ****         in      r22, _SFR_IO_ADDR(IEC_OUT)
+ 354               	        andi    r22, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 355:fastloader-ll.S ****         ori     r22, IEC_OBIT_DATA ; Data low, Clock hi on EOI
+ 356:fastloader-ll.S ****         rjmp    1f
+ 357:fastloader-ll.S **** 
+ 358:fastloader-ll.S **** 0:      in      r22, _SFR_IO_ADDR(IEC_OUT)
+ 359               	        andi    r22, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 360:fastloader-ll.S ****         ori     r22, IEC_OBIT_CLOCK ; Data hi, Clock low on non-EOI
+ 361:fastloader-ll.S **** 
+ 362:fastloader-ll.S **** 1:
+ 363               	        ;; Set clock and data high/inactive - FFB5
+ 364               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 365               	                ; this is the actual ready signal for the C64
+ 366:fastloader-ll.S ****         cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 367               	
+ 368:fastloader-ll.S ****         ;; Wait 1us to allow the bus to settle (J1541 needs 4us here)
+ 369               	        rcall   delay1us
+ 370               	
+ 371:fastloader-ll.S ****         ;; Set up a few registers
+ 372               	        mov     r0, r24         ; move data byte to r0
+ 373               	        com     r0              ; invert data byte
+ 374:fastloader-ll.S **** 
+ 375:fastloader-ll.S ****         ;; Wait for start condition (calculated above) from C64 - FFB8
+ 376               	0:      in      r24, _SFR_IO_ADDR(IEC_PIN)
+ 377               	        andi    r24, IEC_BIT_CLOCK | IEC_BIT_DATA | IEC_BIT_ATN ; 1
+ 378:fastloader-ll.S ****         cp      r24, r21        ; 1
+ 379:fastloader-ll.S ****         breq    0b              ; 1
+ 380:fastloader-ll.S **** 
+ 381:fastloader-ll.S ****         ;; Check for ATN (J1541 doesn't do this, but I'm paranoid)
+ 382               	        ;; Doesn't work, further analysis required
+ 383               	        andi    r24, IEC_BIT_ATN ; 1
+ 384               	        breq    js_finish        ; 1 - jump if ATN is low
+ 385:fastloader-ll.S **** 
+ 386:fastloader-ll.S ****         ;; Output the first bitpair 6us (48 cycles) after the start
+ 387               	        ;; 6us is the best-case time from bus check to transmission in J1541
+ 388               	        delay_cycles 31 + JIFFY_OFFSET_WRITE
+ 389               	                                ; 31 = 48-17
+ 390:fastloader-ll.S ****         rcall   jiffy_sendbits  ; 12+4 - [FFBD]
+ 391               	
+ 392:fastloader-ll.S ****         ;; Output the second bitpair 10us (80 cycles) after the first
+ 393               	        delay_cycles 64         ; 64 = 80-16
+ 394               	
+ 395:fastloader-ll.S ****         rcall   jiffy_sendbits  ; 12+4 - [FFC4]
+ 396               	
+ 397:fastloader-ll.S ****         ;; Output the third bitpair 11us (88 cycles) after the second
+ 398               	        delay_cycles 72         ; 72 = 88-16
+ 399               	
+ 400:fastloader-ll.S ****         rcall   jiffy_sendbits  ; 12+4 - [FFCC]
+ 401               	
+ 402:fastloader-ll.S ****         ;; Output the fourth bitpair 10us (80 cycles) after the third
+ 403               	        delay_cycles 64         ; 64 = 80-16
+ 404               	
+ 405:fastloader-ll.S ****         rcall   jiffy_sendbits  ; 12+4 - [FFD3]
+ 406               	
+ 407:fastloader-ll.S ****         ;; Skip sending EOI for LOAD code path
+ 408               	        tst     r20             ; 1
+ 409               	        brne    js_finish       ; 1
+ 410:fastloader-ll.S **** 
+ 411:fastloader-ll.S ****         ;; Output EOI marker 11us (88 cycles) after the last bitpair
+ 412               	        delay_cycles 81         ; 81 = 88-7
+ 413               	
+ 414:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r22 ; 1 - output EOI marker [FFDB]
+ 415               	
+ 416:fastloader-ll.S ****         ;; Wait 1us to allow the bus to settle (J1541 needs 4us here)
+ 417               	        rcall   delay1us
+ 418               	
+ 419:fastloader-ll.S ****         ;; Wait until data is low, check ATN [FFDE]
+ 420               	        ;; This loop won't wait when EOI is signalled.
+ 421               	0:      in      r24, _SFR_IO_ADDR(IEC_PIN) ; Read bus
+ 422               	        sbrs    r24, IEC_PIN_ATN           ; Skip if ATN is high
+ 423:fastloader-ll.S ****         rjmp    js_finish                  ; ATN low, exit loop
+ 424:fastloader-ll.S ****         sbrc    r24, IEC_PIN_DATA          ; Skip if Data is low
+ 425:fastloader-ll.S ****         rjmp    0b                         ; No Data, no ATN -> loop
+ 426:fastloader-ll.S **** 
+ 427:fastloader-ll.S **** js_finish:
+ 428               	        com     r24             ; invert port state (ATN low returns true)
+ 429               	        andi    r24, IEC_BIT_ATN ; single out ATN bit
+ 430:fastloader-ll.S **** 
+ 431:fastloader-ll.S ****         sei                     ; re-enable interrupts
+ 432               	        ret
+ 433:fastloader-ll.S **** 
+ 434:fastloader-ll.S **** 
+ 435               	#ifdef CONFIG_LOADER_TURBODISK
+ 436               	        ;; ====================================================================
+ 437               	        ;;  Turbodisk
+ 438               	        ;; ====================================================================
+ 439               	
+ 440               	        ;;
+ 441               	        ;; Sends a single byte in r24 using the Turbodisk protocol
+ 442               	        ;;
+ 443               	        .global turbodisk_byte
+ 444               	turbodisk_byte:
+ 445               	        ;; Wait until data is low
+ 446               	        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+ 447               	        rjmp    turbodisk_byte
+ 448:fastloader-ll.S **** 
+ 449:fastloader-ll.S ****         ;; Byte preparation
+ 450               	        com     r24             ; Invert the data byte
+ 451               	
+ 452:fastloader-ll.S ****         ;; All bus lines high
+ 453               	        in      r18, _SFR_IO_ADDR(IEC_OUT)
+ 454               	        andi    r18, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 455:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r18
+ 456:fastloader-ll.S **** 
+ 457:fastloader-ll.S ****         ;; Wait until data is high
+ 458               	0:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA ; 2
+ 459               	        rjmp    0b
+ 460:fastloader-ll.S **** 
+ 461:fastloader-ll.S ****         rcall   delay1us        ; Move the timing window slightly
+ 462               	
+ 463:fastloader-ll.S ****         ldi     r20, 4          ; 1 - Bitpair counter
+ 464               	
+ 465:fastloader-ll.S **** tdbitloop:
+ 466               	        in      r19, _SFR_IO_ADDR(IEC_OUT) ; 1 - read & mask unused IEC port lines
+ 467               	        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ) ; 1
+ 468:fastloader-ll.S ****         bst     r24, 7              ; 1 - grab bit 7
+ 469:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+ 470:fastloader-ll.S ****         bst     r24, 6              ; 1 - grab bit 6
+ 471:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+ 472:fastloader-ll.S ****         lsl     r24                 ; 1 - remove source bits
+ 473:fastloader-ll.S ****         lsl     r24                 ; 1
+ 474:fastloader-ll.S **** 
+ 475:fastloader-ll.S ****         ;; Wait for 28us from data high -> 224-9=215 cycles
+ 476               	        delay_cycles 215        ; 215
+ 477               	
+ 478:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r19      ; 1 - output the bit pair
+ 479               	
+ 480:fastloader-ll.S ****         rcall   delay1us        ; 8 - additional us for loops 2-4
+ 481               	
+ 482:fastloader-ll.S ****         dec     r20             ; 1 - Decrement bitpair counter
+ 483               	        brne    tdbitloop       ; 2/1 - loop until done
+ 484:fastloader-ll.S **** 
+ 485:fastloader-ll.S ****         ;; Wait for 26us from last bitpair -> 208-12=196 cycles
+ 486               	        delay_cycles 196        ; 196
+ 487               	
+ 488:fastloader-ll.S ****         ;; Data high, Clock low
+ 489               	        in      r18, _SFR_IO_ADDR(IEC_OUT)
+ 490               	        andi    r18, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 491:fastloader-ll.S ****         ori     r18, IEC_OBIT_CLOCK
+ 492:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r18
+ 493:fastloader-ll.S **** 
+ 494:fastloader-ll.S ****         ret
+ 495               	
+ 496:fastloader-ll.S **** 
+ 497               	        ;;
+ 498               	        ;; Sends a complete buffer of r22 bytes at r24/r25 using the Turbodisk protocol
+ 499               	        ;;
+ 500               	        .global turbodisk_buffer
+ 501               	turbodisk_buffer:
+ 502               	        ;; Wait until data is low
+ 503               	        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+ 504               	        rjmp    turbodisk_buffer
+ 505:fastloader-ll.S **** 
+ 506:fastloader-ll.S ****         ;; All bus lines high
+ 507               	        in      r18, _SFR_IO_ADDR(IEC_OUT)
+ 508               	        andi    r18, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 509:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r18
+ 510:fastloader-ll.S **** 
+ 511:fastloader-ll.S ****         movw    r30,r24         ; output pointer
+ 512               	
+ 513:fastloader-ll.S ****         ;; Wait until data is high
+ 514               	0:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA ; 2
+ 515               	        rjmp    0b
+ 516:fastloader-ll.S **** 
+ 517:fastloader-ll.S ****         ;; Initial delay of 4 us + move the timing window by 1 us for stability
+ 518               	        delay_cycles (4+1)*8    ; 40
+ 519               	
+ 520:fastloader-ll.S ****         ;; 287 AVR cycles from here to first LDA $DD00 on C64 side ($F822)
+ 521               	tdbyteloop:
+ 522               	        ld      r0, Z+          ; 2 - load byte
+ 523               	        ldi     r20, 4          ; 1 - bitpair counter
+ 524:fastloader-ll.S ****         com     r0              ; 1 - invert data byte
+ 525:fastloader-ll.S **** 
+ 526:fastloader-ll.S ****         ;; Waste another 12 us -> 96-4=92 cycles
+ 527               	        delay_cycles 92         ; 92
+ 528               	
+ 529:fastloader-ll.S **** tdbitloop2:
+ 530               	        in      r19, _SFR_IO_ADDR(IEC_OUT) ; 1 - read & mask unused IEC port lines
+ 531               	        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ) ; 1
+ 532:fastloader-ll.S ****         bst     r0, 7               ; 1 - grab bit 7
+ 533:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+ 534:fastloader-ll.S ****         bst     r0, 6               ; 1 - grab bit 6
+ 535:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+ 536:fastloader-ll.S ****         lsl     r0                  ; 1 - remove source bits
+ 537:fastloader-ll.S ****         lsl     r0                  ; 1
+ 538:fastloader-ll.S **** 
+ 539:fastloader-ll.S ****         ;; Wait another 24 us -> 192-9=183 cycles
+ 540               	        delay_cycles 183        ; 183
+ 541               	
+ 542:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r19      ; 1 - output the bit pair
+ 543               	
+ 544:fastloader-ll.S ****         ;; 5 us -> 40-3=37 cycles
+ 545               	        delay_cycles 37         ; 37
+ 546               	
+ 547:fastloader-ll.S ****         dec     r20             ; 1 - Decrement bitpair counter
+ 548               	        brne    tdbitloop2      ; 2/1 - loop until done
+ 549:fastloader-ll.S **** 
+ 550:fastloader-ll.S ****         ;; Wait 10 us -> 80-3+1=78 cycles
+ 551               	        delay_cycles 78         ; 78
+ 552               	
+ 553:fastloader-ll.S ****         dec     r22             ; 1 - Decrement byte counter
+ 554               	        brne    tdbyteloop      ; 2/1 - loop until done
+ 555:fastloader-ll.S **** 
+ 556:fastloader-ll.S ****         ;; Final delay: 11 us -> 88 cycles
+ 557               	        delay_cycles 88         ; 88
+ 558               	
+ 559:fastloader-ll.S ****         ;; Data high, Clock low
+ 560               	        in      r18, _SFR_IO_ADDR(IEC_OUT)
+ 561               	        andi    r18, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 562:fastloader-ll.S ****         ori     r18, IEC_OBIT_CLOCK
+ 563:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r18
+ 564:fastloader-ll.S **** 
+ 565:fastloader-ll.S ****         ret
+ 566               	#endif
+ 567:fastloader-ll.S **** 
+ 568               	#if defined(CONFIG_LOADER_DREAMLOAD) || defined(CONFIG_LOADER_FC3) || defined(CONFIG_LOADER_ULOAD3)
+ 569               	        ;;
+ 570               	        ;; Set bit 0 of r0 on CLOCK and bit 1 on DATA
+ 571               	        ;; A bit value of one means pull down
+ 572               	        ;; After sending these two bits r0 is shifted right two bits
+ 573               	        ;;
+ 574               	        ;; r19 is used as scratch reg here
+ 575               	        ;;
+ 576               	        ;; Takes 10 cycles before OUT (incl. rcall)
+ 577               	        ;; Takes 6 cycles to return after OUT
+ 578               	        ;;
+ 579               	send_bits_to_clk_data:
+ 580               	        ; rcall                  ; 3
+ 581               	        in   r19, _SFR_IO_ADDR(IEC_OUT) ; 1 - read & mask unused IEC port lines
+ 582               	        andi r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ) ; 1
+ 583:fastloader-ll.S ****         bst  r0, 0               ; 1 - take bit 0 (lsb)
+ 584:fastloader-ll.S ****         bld  r19, IEC_OPIN_CLOCK ; 1 - for CLOCK line
+ 585:fastloader-ll.S ****         bst  r0, 1               ; 1 - take bit 1
+ 586:fastloader-ll.S ****         bld  r19, IEC_OPIN_DATA  ; 1 - for DATA line
+ 587:fastloader-ll.S ****         out  _SFR_IO_ADDR(IEC_OUT), r19 ; 1 - output the bit pair
+ 588:fastloader-ll.S **** 
+ 589:fastloader-ll.S ****         lsr  r0                  ; 1
+ 590               	        lsr  r0                  ; 1 - prepare next two bits
+ 591:fastloader-ll.S **** 
+ 592:fastloader-ll.S ****         ret                      ; 4
+ 593               	
+ 594:fastloader-ll.S ****         ;;
+ 595               	        ;; Get DATA  => bit 0
+ 596               	        ;; and CLOCK => bit 2 of r24
+ 597               	        ;; Low level means value 0 here
+ 598               	        ;;
+ 599               	        ;; r19 is used as scratch reg here
+ 600               	        ;;
+ 601               	        ;; Takes 4 cycles before IN (incl. rcall)
+ 602               	        ;; Takes 8 cycles to return after IN
+ 603               	        ;;
+ 604               	get_bits_from_clk_data:
+ 605               	        ; rcall                         ; 3
+ 606               	        in      r19, _SFR_IO_ADDR(IEC_PIN)  ; 1
+ 607               	        bst     r19, IEC_PIN_DATA       ; 1
+ 608:fastloader-ll.S ****         bld     r24, 0                  ; 1
+ 609:fastloader-ll.S ****         bst     r19, IEC_PIN_CLOCK      ; 1
+ 610:fastloader-ll.S ****         bld     r24, 2                  ; 1
+ 611:fastloader-ll.S ****         ret                             ; 4
+ 612:fastloader-ll.S **** 
+ 613:fastloader-ll.S **** #endif
+ 614               	
+ 615               	#if defined(CONFIG_LOADER_FC3) || defined(CONFIG_LOADER_ULOAD3) || defined(CONFIG_LOADER_ELOAD1)
+ 616               	        ;;
+ 617               	        ;; Do this kind of handshake:
+ 618               	        ;; set CLOCK low, wait for DATA going low,
+ 619               	        ;; release CLOCK, wait for DATA going high
+ 620               	        ;; returns without waiting if ATN is low
+ 621               	        ;;
+ 622               	        ;; cycles from DATA high to return to caller: 5-10
+ 623               	        ;;
+ 624               	        .global clk_data_handshake
+ 625               	clk_data_handshake:
+ 626               	        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 627               	1:
+ 628:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 629               	        rjmp    2f
+ 630:fastloader-ll.S ****         sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+ 631:fastloader-ll.S ****         rjmp    1b
+ 632:fastloader-ll.S ****         cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 633:fastloader-ll.S **** 1:
+ 634:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 635               	        rjmp    2f
+ 636:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+ 637:fastloader-ll.S ****         rjmp    1b
+ 638:fastloader-ll.S **** 2:
+ 639:fastloader-ll.S ****         ret
+ 640               	#endif
+ 641:fastloader-ll.S **** 
+ 642               	#ifdef CONFIG_LOADER_FC3
+ 643               	        ;;
+ 644               	        ;; Sends four bytes at r24/r25 using the FC3 protocol
+ 645               	        ;;
+ 646               	        .global fastloader_fc3_send_block
+ 647               	fastloader_fc3_send_block:
+ 648               	        cli
+ 649               	        movw    r30,r24         ; Z = output pointer
+ 650:fastloader-ll.S **** 
+ 651:fastloader-ll.S ****         ; pull CLOCK low for sync
+ 652               	        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK ; 1
+ 653               	
+ 654:fastloader-ll.S ****         ; 12 us between sync and bitpair
+ 655               	        delay_cycles 12 * 8 - 14 ; 83
+ 656               	
+ 657:fastloader-ll.S ****         ldi     r21, 4          ; 1 - byte counter
+ 658               	fc3_byteloop:
+ 659:fastloader-ll.S ****         ld      r0, Z+          ; 2 - load byte
+ 660               	
+ 661:fastloader-ll.S ****         com     r0              ; 1 - negate all bits
+ 662               	
+ 663:fastloader-ll.S ****         ldi     r20, 4          ; 1 - bitpair counter
+ 664               	fc3_bitloop:
+ 665:fastloader-ll.S ****         ; send r0[0,1] to CLOCK and DATA, shift r0 right two times
+ 666               	        ; changes r19
+ 667               	        rcall   send_bits_to_clk_data ; 10 + 6
+ 668               	
+ 669:fastloader-ll.S ****         ; wait 12 us between bitpair
+ 670               	        delay_cycles 12*8-19
+ 671               	
+ 672:fastloader-ll.S ****         dec     r20             ; 1 - decrement bitpair counter
+ 673               	        brne    fc3_bitloop     ; 2/1 - loop until done
+ 674:fastloader-ll.S **** fc3_next_byte:
+ 675:fastloader-ll.S ****         ; wait 2 us more between two bytes (16 cycles = -1 + 17)
+ 676               	        rcall   delay1us        ; 8
+ 677               	        rjmp    0f              ; 2
+ 678:fastloader-ll.S **** 0:
+ 679:fastloader-ll.S ****         dec     r21             ; 1 - decrement byte counter
+ 680               	        brne    fc3_byteloop    ; 2/1 - loop until done
+ 681:fastloader-ll.S **** 
+ 682:fastloader-ll.S ****         ; release CLOCK and DATA
+ 683               	        in      r19, _SFR_IO_ADDR(IEC_OUT) ; read & mask unused IEC port lines
+ 684               	        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 685:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r19 ; release CLOCK and DATA
+ 686:fastloader-ll.S **** 
+ 687:fastloader-ll.S ****         sei
+ 688               	        ret
+ 689:fastloader-ll.S **** 
+ 690:fastloader-ll.S ****         ;;
+ 691               	        ;; Receive one byte using the FC3 save protocol
+ 692               	        ;;
+ 693               	        .global fc3_get_byte
+ 694               	fc3_get_byte:
+ 695               	        cli
+ 696               	
+ 697:fastloader-ll.S ****         clr     r24     ; clear data byte
+ 698               	
+ 699:fastloader-ll.S ****         ; wait a moment before releasing data, otherwise the loop would run
+ 700               	        ; too fast. I confess that this value is guessed.
+ 701               	        delay_cycles 10 * 8
+ 702               	
+ 703:fastloader-ll.S ****         ; release DATA
+ 704               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 705               	
+ 706:fastloader-ll.S ****         ; wait until CLOCK goes high
+ 707               	1:
+ 708               	        sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK ; 1/2?
+ 709               	        rjmp    1b
+ 710:fastloader-ll.S **** 
+ 711:fastloader-ll.S ****         ; 17 us later...
+ 712               	        delay_cycles 17 * 8 - 6
+ 713               	
+ 714:fastloader-ll.S ****         ; get bits 5,7 @ 0,2 - changes r19
+ 715               	        rcall   get_bits_from_clk_data  ; 4 + 8 r24 = .....7.5
+ 716               	        lsl     r24                     ; 1     r24 = ....7.5.
+ 717:fastloader-ll.S **** 
+ 718:fastloader-ll.S ****         ; 13 us later...
+ 719               	        delay_cycles 13 * 8 - 13
+ 720               	
+ 721:fastloader-ll.S ****         ; get bits 4,6 @ 0,2 - changes r19
+ 722               	        rcall   get_bits_from_clk_data  ; 4 + 8 r24 = ....7654
+ 723               	        swap    r24                     ; 1     r24 = 7654....
+ 724:fastloader-ll.S ****         lsr     r24                     ; 1     r24 = .7654...
+ 725:fastloader-ll.S **** 
+ 726:fastloader-ll.S ****         ; 12 us later...
+ 727               	        delay_cycles 12 * 8 - 14
+ 728               	
+ 729:fastloader-ll.S ****         ; get bits 1,3 @ 0,2 - changes r19
+ 730               	        rcall   get_bits_from_clk_data  ; 4 + 8 r24 = .76543.1
+ 731               	        lsl     r24                     ; 1     r24 = 76543.1.
+ 732:fastloader-ll.S **** 
+ 733:fastloader-ll.S ****         ; 10 us later...
+ 734               	        delay_cycles 10 * 8 - 13
+ 735               	
+ 736:fastloader-ll.S ****         ; get bits 0,2 @ 0,2 - changes r19
+ 737               	        rcall   get_bits_from_clk_data  ; 4 + 8 r24 = 76543210
+ 738               	
+ 739:fastloader-ll.S ****         ; Pull DATA down
+ 740               	        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 741               	
+ 742:fastloader-ll.S ****         sei
+ 743               	        com     r24     ; negate all bits
+ 744:fastloader-ll.S ****         clr     r25     ; clear hi-byte of return val
+ 745:fastloader-ll.S ****         ret
+ 746:fastloader-ll.S **** #endif
+ 747:fastloader-ll.S **** 
+ 748               	#ifdef CONFIG_LOADER_DREAMLOAD
+ 749               	        ;;
+ 750               	        ;; Receive a command (track/sector) using the DreamLoad protocol
+ 751               	        ;;
+ 752               	dreamload_get_command:
+ 753               	        rcall   dreamload_get_byte
+ 754               	        sts     fl_track, r24
+ 755:fastloader-ll.S ****         rcall   dreamload_get_byte
+ 756:fastloader-ll.S ****         sts     fl_sector, r24
+ 757:fastloader-ll.S ****         ret
+ 758:fastloader-ll.S **** 
+ 759:fastloader-ll.S ****         ;;
+ 760               	        ;; Receive a byte using the DreamLoad protocol
+ 761               	        ;;
+ 762               	        .global dreamload_get_byte
+ 763               	dreamload_get_byte:
+ 764               	
+ 765               	        ldi     r18, 4  ; 4 * 2 bits to load
+ 766               	dl_bitloop:
+ 767:fastloader-ll.S ****         ; wait until clock goes low
+ 768               	1:
+ 769               	        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 770               	        rjmp    1b
+ 771:fastloader-ll.S **** 
+ 772:fastloader-ll.S ****         lsl     r24
+ 773               	
+ 774:fastloader-ll.S ****         ; read data a short time later
+ 775               	        in      r19, _SFR_IO_ADDR(IEC_PIN)
+ 776               	        bst     r19, IEC_PIN_DATA
+ 777:fastloader-ll.S ****         bld     r24, 0
+ 778:fastloader-ll.S **** 
+ 779:fastloader-ll.S ****         ; wait until clock goes high
+ 780               	2:
+ 781               	        sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 782               	        rjmp    2b
+ 783:fastloader-ll.S **** 
+ 784:fastloader-ll.S ****         lsl     r24
+ 785               	
+ 786:fastloader-ll.S ****         ; read data a short time later
+ 787               	        in      r19, _SFR_IO_ADDR(IEC_PIN)
+ 788               	        bst     r19, IEC_PIN_DATA
+ 789:fastloader-ll.S ****         bld     r24, 0
+ 790:fastloader-ll.S **** 
+ 791:fastloader-ll.S ****         dec     r18
+ 792               	        brne     dl_bitloop
+ 793:fastloader-ll.S **** 
+ 794:fastloader-ll.S ****         com     r24     ; negate all bits
+ 795               	        ret
+ 796:fastloader-ll.S **** 
+ 797:fastloader-ll.S ****         ;;
+ 798               	        ;; Receive a command (track/sector) using the old DreamLoad protocol
+ 799               	        ;;
+ 800               	dreamload_get_command_old:
+ 801               	        rcall   dreamload_get_byte_old
+ 802               	        sts     fl_track, r24
+ 803:fastloader-ll.S ****         rcall   dreamload_get_byte_old
+ 804:fastloader-ll.S ****         sts     fl_sector, r24
+ 805:fastloader-ll.S ****         ret
+ 806:fastloader-ll.S **** 
+ 807:fastloader-ll.S ****         ;;
+ 808               	        ;; Receive a byte using the old DreamLoad protocol
+ 809               	        ;;
+ 810               	dreamload_get_byte_old:
+ 811               	        ; 2 nibbles
+ 812               	        ldi     r18, 2
+ 813               	dlgb_nibble:
+ 814:fastloader-ll.S ****         swap    r24                     ; 2nd loop: r24 = 7654....
+ 815               	        lsr     r24                     ; 2nd loop: r24 = .7654...
+ 816:fastloader-ll.S **** 
+ 817:fastloader-ll.S ****         rcall   wait_atn_low
+ 818               	        ; 1st: get bits 5,7 @ 0,2 / 2nd: get bits 1,3 @ 0,2 - changes r19
+ 819:fastloader-ll.S ****         rcall   get_bits_from_clk_data  ; 1st: r24 = .....7.5 / 2nd: .76543.1
+ 820               	        lsl     r24                     ; 1st: r24 = ....7.5. / 2nd: 76543.1.
+ 821:fastloader-ll.S **** 
+ 822:fastloader-ll.S ****         rcall   wait_atn_high
+ 823               	        ; 1st: get bits 4,6 @ 0,2 / 2nd: get bits 0,2 @ 0,2 - changes r19
+ 824:fastloader-ll.S ****         rcall   get_bits_from_clk_data  ; 1st: r24 = ....7654 / 2nd: 76543210
+ 825               	
+ 826:fastloader-ll.S ****         dec     r18
+ 827               	        brne    dlgb_nibble
+ 828:fastloader-ll.S **** 
+ 829:fastloader-ll.S ****         com     r24     ; negate all bits
+ 830               	        ret
+ 831:fastloader-ll.S **** 
+ 832:fastloader-ll.S ****         ;;
+ 833               	        ;; Send the byte in r24 using the DreamLoad protocol
+ 834               	        ;;
+ 835               	        .global dreamload_send_byte
+ 836               	dreamload_send_byte:
+ 837               	
+ 838               	        ; inverse all bits
+ 839               	        mov     r0, r24
+ 840               	        com     r0
+ 841:fastloader-ll.S **** 
+ 842:fastloader-ll.S ****         ldi     r18, 2          ; loop counter
+ 843               	
+ 844:fastloader-ll.S **** dsb_bitloop:
+ 845               	        ; send r0[0,1] to CLOCK and DATA, shift r0 right two times
+ 846               	        ; changes r19
+ 847               	        rcall   send_bits_to_clk_data
+ 848               	        rcall   wait_atn_low
+ 849:fastloader-ll.S **** 
+ 850:fastloader-ll.S ****         ; send r0[0,1] to CLOCK and DATA, shift r0 right two times
+ 851               	        ; changes r19
+ 852               	        rcall   send_bits_to_clk_data
+ 853               	        rcall   wait_atn_high
+ 854:fastloader-ll.S **** 
+ 855:fastloader-ll.S ****         dec     r18             ; decrement bitpair counter
+ 856               	        brne    dsb_bitloop     ; loop until done
+ 857:fastloader-ll.S ****         ret
+ 858:fastloader-ll.S **** #endif
+ 859:fastloader-ll.S **** 
+ 860               	#if defined CONFIG_LOADER_ULOAD3 || defined CONFIG_LOADER_ELOAD1
+ 861               	        ;;
+ 862               	        ;; Receive a byte using the ULoad Model 3 protocol
+ 863               	        ;;
+ 864               	        .global uload3_get_byte
+ 865               	uload3_get_byte:
+ 866               	        cli
+ 867               	        ldi     r25, 0xff       ; prepare a negative return value
+ 868:fastloader-ll.S ****         clr     r24
+ 869:fastloader-ll.S ****         rcall   clk_data_handshake
+ 870:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN ;skip ret if ATN is high
+ 871:fastloader-ll.S ****         rjmp    uload3_abort                       ;return if ATN is low
+ 872:fastloader-ll.S **** 
+ 873:fastloader-ll.S ****         ;; assuming an average of 10 cycles between DATA high and the following instruction
+ 874               	        delay_cycles 14 * 8 - 10 - 4
+ 875               	
+ 876:fastloader-ll.S ****         ;; read bits 7/5
+ 877               	        rcall   get_bits_from_clk_data ;4+8 r24 = _____7_5
+ 878               	        lsl     r24                    ;1   r24 = ____7_5_
+ 879:fastloader-ll.S **** 
+ 880:fastloader-ll.S ****         delay_cycles 10 * 8 - 13
+ 881               	
+ 882:fastloader-ll.S ****         ;; read bits 6/4
+ 883               	        rcall   get_bits_from_clk_data ;4+8 r24 = ____7654
+ 884               	        swap    r24                    ;1   r24 = 7654____
+ 885:fastloader-ll.S ****         lsr     r24                    ;1   r24 = _7654___
+ 886:fastloader-ll.S **** 
+ 887:fastloader-ll.S ****         delay_cycles 14 * 8 - 14
+ 888               	
+ 889:fastloader-ll.S ****         ;; read bits 3/1
+ 890               	        rcall   get_bits_from_clk_data ;4+8 r24 = _76543_1
+ 891               	        lsl     r24                    ;1   r24 = 76543_1_
+ 892:fastloader-ll.S **** 
+ 893:fastloader-ll.S ****         delay_cycles 10 * 8 - 13
+ 894               	
+ 895:fastloader-ll.S ****         ;; read bits 2/0
+ 896               	        rcall   get_bits_from_clk_data ;4+8 r24 = 76543210
+ 897               	
+ 898:fastloader-ll.S ****         delay_cycles 20*8       ; wait a bit so the C64 can return the bus to idle state
+ 899               	
+ 900:fastloader-ll.S ****         clr     r25             ; clear upper byte of return value
+ 901               	        com     r24             ; invert data byte
+ 902:fastloader-ll.S **** 
+ 903:fastloader-ll.S **** uload3_abort:
+ 904               	        sei
+ 905               	        ret
+ 906:fastloader-ll.S **** 
+ 907:fastloader-ll.S **** 
+ 908               	        ;;
+ 909               	        ;; Send a byte using the ULoad Model 3 protocol
+ 910               	        ;;
+ 911               	        .global uload3_send_byte
+ 912               	uload3_send_byte:
+ 913               	        cli
+ 914               	
+ 915:fastloader-ll.S ****         ;; DATA low
+ 916               	        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 917               	
+ 918:fastloader-ll.S ****         ;; wait for CLOCK low
+ 919               	1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 920               	        rjmp    2f
+ 921:fastloader-ll.S ****         sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 922:fastloader-ll.S ****         rjmp    1b
+ 923:fastloader-ll.S **** 
+ 924:fastloader-ll.S ****         ;; DATA high
+ 925               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 926               	
+ 927:fastloader-ll.S ****         ;; wait for CLOCK high - 2 to 7 cycles, assuming 5
+ 928               	1:
+ 929               	        sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 930               	        rjmp    2f
+ 931:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 932:fastloader-ll.S ****         rjmp    1b
+ 933:fastloader-ll.S **** 
+ 934:fastloader-ll.S ****         ;; prepare transmission
+ 935               	        mov     r0, r24         ;1 - move data to output register
+ 936               	        com     r0              ;1 - invert byte
+ 937:fastloader-ll.S ****         ldi     r24, 4          ;1 - number of loops
+ 938:fastloader-ll.S ****         delay_cycles (14-8) * 8 - 8 + 6 + 3 ; initial delay before first bit pair
+ 939:fastloader-ll.S **** 
+ 940:fastloader-ll.S **** uload3_bitloop:
+ 941               	        delay_cycles 8 * 8 - 16 - 3   ; delay between bit pairs
+ 942               	        rcall   send_bits_to_clk_data ;10+6
+ 943:fastloader-ll.S ****         dec     r24                   ;1 - decrement pair counter
+ 944:fastloader-ll.S ****         brne    uload3_bitloop        ;2 - continue loop
+ 945:fastloader-ll.S **** 
+ 946:fastloader-ll.S ****         delay_cycles 10*8 - 9   ; delay before releasing clock/data
+ 947               	
+ 948:fastloader-ll.S ****         ;; release CLOCK+DATA
+ 949               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 950               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 951:fastloader-ll.S ****         rcall   delay1us        ; safety
+ 952:fastloader-ll.S **** 2:
+ 953:fastloader-ll.S ****         sei
+ 954               	        ret
+ 955:fastloader-ll.S **** #endif
+ 956:fastloader-ll.S **** 
+ 957               	#ifdef CONFIG_LOADER_EPYXCART
+ 958               	        ;; send bits 7 and 5 of r0 to clock/data
+ 959               	        ;; masked contents of IEC_OUT expected in r19
+ 960               	        ;; 8 cycles from rcall to out, 4 to return
+ 961               	epyx_bitpair:
+ 962               	        ;; rcall - 3
+ 963               	        bst     r0, 7                      ; 1
+ 964               	        bld     r19, IEC_OPIN_CLOCK        ; 1
+ 965:fastloader-ll.S ****         bst     r0, 5                      ; 1
+ 966:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA         ; 1
+ 967:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1
+ 968:fastloader-ll.S ****         ret                                ; 4
+ 969:fastloader-ll.S **** 
+ 970:fastloader-ll.S ****         ;;
+ 971               	        ;; Send a byte using the Epyx Fastload cartridge protocol
+ 972               	        ;;
+ 973               	        .global epyxcart_send_byte
+ 974               	epyxcart_send_byte:
+ 975               	        ;; DATA and CLOCK high
+ 976               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 977               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 978:fastloader-ll.S ****         rcall   delay1us
+ 979:fastloader-ll.S **** 
+ 980:fastloader-ll.S ****         ;; prepare data
+ 981               	        in      r19, _SFR_IO_ADDR(IEC_OUT)
+ 982               	        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 983:fastloader-ll.S **** 
+ 984:fastloader-ll.S ****         ;; wait for DATA high or ATN low
+ 985               	1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 986               	        rjmp    epyxcart_atnabort
+ 987:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+ 988:fastloader-ll.S ****         rjmp    1b
+ 989:fastloader-ll.S **** 
+ 990:fastloader-ll.S ****         mov     r0, r24             ; 1
+ 991               	        delay_cycles (10*8 - 9)
+ 992:fastloader-ll.S ****         rcall   epyx_bitpair        ; 8+4 - bits 7 and 5
+ 993:fastloader-ll.S **** 
+ 994:fastloader-ll.S ****         lsl     r0                  ; 1
+ 995               	        delay_cycles (10*8 - 13)
+ 996:fastloader-ll.S ****         rcall   epyx_bitpair        ; 8+4 - bits 6 and 4
+ 997:fastloader-ll.S **** 
+ 998:fastloader-ll.S ****         swap    r24                 ; 1
+ 999               	        mov     r0, r24             ; 1
+1000:fastloader-ll.S ****         delay_cycles (10*8 - 14)
+1001:fastloader-ll.S ****         rcall   epyx_bitpair        ; 8+4 - bits 3 and 1
+1002:fastloader-ll.S **** 
+1003:fastloader-ll.S ****         lsl     r0                  ; 1
+ 1004               	        delay_cycles (10*8 - 13)
+1005:fastloader-ll.S ****         rcall   epyx_bitpair        ; 8+4 - bits 2 and 0
+1006:fastloader-ll.S **** 
+1007:fastloader-ll.S ****         delay_cycles 20*8  ; final delay so the data stays valid long enough
+ 1008               	
+1009:fastloader-ll.S ****         clr     r24
+ 1010               	        ret
+1011:fastloader-ll.S **** 
+1012:fastloader-ll.S **** epyxcart_atnabort:
+ 1013               	        ldi     r24, 1
+ 1014               	        ret
+1015:fastloader-ll.S **** 
+1016:fastloader-ll.S **** #endif
+ 1017               	
+ 1018               	#ifdef CONFIG_LOADER_GEOS
+ 1019               	        ;;
+ 1020               	        ;; read a byte using the GEOS protocol (common part)
+ 1021               	        ;;
+ 1022               	geos_get_byte_common:
+ 1023               	        clr     r24
+ 1024               	
+1025:fastloader-ll.S ****         ;; wait until clock is high
+ 1026               	1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 1027               	        rjmp    1b
+1028:fastloader-ll.S **** 
+1029:fastloader-ll.S ****         ;; wait until clock is low
+ 1030               	1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK ; 1/2
+ 1031               	        rjmp    1b
+1032:fastloader-ll.S **** 
+1033:fastloader-ll.S ****         ;; delay
+ 1034               	        delay_cycles 15*8 - 2
+ 1035               	
+1036:fastloader-ll.S ****         ;; get bits 4 and 5
+ 1037               	        in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 1038               	        bst     r19, IEC_PIN_CLOCK         ; 1
+1039:fastloader-ll.S ****         bld     r24, 4-1                   ; 1 - r24 = ....4...
+1040:fastloader-ll.S ****         bst     r19, IEC_PIN_DATA          ; 1
+1041:fastloader-ll.S ****         bld     r24, 5-1                   ; 1 - r24 = ...54...
+1042:fastloader-ll.S **** 
+1043:fastloader-ll.S ****         ;; delay
+ 1044               	        delay_cycles 14*8 - 5
+ 1045               	
+1046:fastloader-ll.S ****         ;; get bits 6 and 7
+ 1047               	        in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 1048               	        bst     r19, IEC_PIN_CLOCK         ; 1
+1049:fastloader-ll.S ****         bld     r24, 6-1                   ; 1 - r24 = ..654...
+1050:fastloader-ll.S ****         bst     r19, IEC_PIN_DATA          ; 1
+1051:fastloader-ll.S ****         bld     r24, 7-1                   ; 1 - r24 = .7654...
+1052:fastloader-ll.S **** 
+1053:fastloader-ll.S ****         ret                                ; 4
+ 1054               	
+1055:fastloader-ll.S ****         ;;
+ 1056               	        ;; read a byte using the GEOS 1MHz (1541) protocol
+ 1057               	        ;;
+ 1058               	        .global geos_get_byte_1mhz
+ 1059               	geos_get_byte_1mhz:
+ 1060               	        rcall   geos_get_byte_common   ; 3
+ 1061               	
+1062:fastloader-ll.S ****         ;; delay
+ 1063               	        delay_cycles 14*8 - 9 - 4
+ 1064               	
+1065:fastloader-ll.S ****         ;; get bits 3 and 1
+ 1066               	        rcall   get_bits_from_clk_data ; 4+8 - r24 = .76543.1
+ 1067               	        lsl     r24                    ; 1     r24 = 76543.1.
+1068:fastloader-ll.S **** 
+1069:fastloader-ll.S ****         ;; delay
+ 1070               	        delay_cycles 16*8 - 9 - 4
+ 1071               	
+1072:fastloader-ll.S ****         ;; get bits 2 and 0
+ 1073               	        rcall   get_bits_from_clk_data ; 4+8 - r24 = 76543210
+ 1074               	
+1075:fastloader-ll.S ****         ;; post-process received value and return
+ 1076               	        delay_cycles 11*8
+ 1077               	        com     r24             ; negate all bits
+1078:fastloader-ll.S ****         clr     r25             ; clear high byte of return value
+1079:fastloader-ll.S ****         ret
+1080:fastloader-ll.S **** 
+1081:fastloader-ll.S **** 
+ 1082               	        ;;
+ 1083               	        ;; read a byte using the GEOS 2MHz (1571/81) protocol
+ 1084               	        ;;
+ 1085               	        .global geos_get_byte_2mhz
+ 1086               	geos_get_byte_2mhz:
+ 1087               	        rcall   geos_get_byte_common   ; 3
+ 1088               	
+1089:fastloader-ll.S ****         ;; delay
+ 1090               	        delay_cycles 19*4 - 9 - 4
+ 1091               	
+1092:fastloader-ll.S ****         ;; get bits 3 and 1
+ 1093               	        rcall   get_bits_from_clk_data ; 4+8 - r24 = .76543.1
+ 1094               	        lsl     r24                    ; 1     r24 = 76543.1.
+1095:fastloader-ll.S **** 
+1096:fastloader-ll.S ****         ;; delay
+ 1097               	        delay_cycles 22*4 - 9 - 4
+ 1098               	
+1099:fastloader-ll.S ****         ;; get bits 2 and 0
+ 1100               	        rcall   get_bits_from_clk_data ; 4+8 - r24 = 76543210
+ 1101               	
+1102:fastloader-ll.S ****         ;;  post process received value and return
+ 1103               	        delay_cycles 11*8
+ 1104               	        com     r24             ; negate all bits
+1105:fastloader-ll.S ****         clr     r25             ; clear high byte of return value
+1106:fastloader-ll.S ****         ret
+1107:fastloader-ll.S **** 
+1108:fastloader-ll.S **** 
+ 1109               	        ;;
+ 1110               	        ;; common part of all geos_send_byte implementations
+ 1111               	        ;;  returns 7 cycles after clock low
+ 1112               	        ;;
+ 1113               	geos_send_byte_common:
+ 1114               	        ;; CLOCK/DATA high
+ 1115               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 1116               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+1117:fastloader-ll.S ****         rcall   delay1us
+1118:fastloader-ll.S **** 
+1119:fastloader-ll.S ****         ;; wait until CLOCK is low
+ 1120               	1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 1121               	        rjmp    1b
+1122:fastloader-ll.S **** 
+1123:fastloader-ll.S ****         ;; preserve non-IEC lines on IEC_OUT port
+ 1124               	        in      r19, _SFR_IO_ADDR(IEC_OUT) ; 1
+ 1125               	        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ) ; 1
+1126:fastloader-ll.S ****         mov     r0, r19             ; 1
+1127:fastloader-ll.S ****         ret                         ; 4
+1128:fastloader-ll.S **** 
+1129:fastloader-ll.S ****         ;;
+ 1130               	        ;; send a byte using the GEOS 1MHz protocol
+ 1131               	        ;; called with byte in r24, no return value
+ 1132               	        ;;
+ 1133               	        .global geos_send_byte_1mhz
+ 1134               	geos_send_byte_1mhz:
+ 1135               	        rcall   geos_send_byte_common ; 7
+ 1136               	
+1137:fastloader-ll.S ****         ;; prepare bits 3+1
+ 1138               	        bst     r24, 3              ; 1 - read bit 3
+ 1139               	        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+1140:fastloader-ll.S ****         bst     r24, 1              ; 1 - read bit 1
+1141:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+1142:fastloader-ll.S **** 
+1143:fastloader-ll.S ****         ;; delay (1MHz speeder)
+ 1144               	        delay_cycles 18*8 - 14
+ 1145               	        rjmp    geos_send_byte_tail   ; 2
+1146:fastloader-ll.S **** 
+1147:fastloader-ll.S **** 
+ 1148               	        ;;
+ 1149               	        ;; send a byte using the GEOS 2MHz protocol
+ 1150               	        ;; called with byte in r24, no return value
+ 1151               	        ;;
+ 1152               	        .global geos_send_byte_2mhz
+ 1153               	geos_send_byte_2mhz:
+ 1154               	        rcall   geos_send_byte_common ; 7
+ 1155               	
+1156:fastloader-ll.S ****         ;; prepare bits 3+1
+ 1157               	        bst     r24, 3              ; 1 - read bit 3
+ 1158               	        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+1159:fastloader-ll.S ****         bst     r24, 1              ; 1 - read bit 1
+1160:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+1161:fastloader-ll.S **** 
+1162:fastloader-ll.S ****         ;; delay (2MHz speeder)
+ 1163               	1:      delay_cycles 9*8 - 12
+ 1164               	
+1165:fastloader-ll.S **** geos_send_byte_tail:
+ 1166               	        ;; send to bus
+ 1167               	        out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1 - send to bus
+ 1168               	
+1169:fastloader-ll.S ****         ;; prepare bits 2+0
+ 1170               	        mov     r19, r0             ; 1
+ 1171               	        bst     r24, 2              ; 1 - read bit 2
+1172:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+1173:fastloader-ll.S ****         bst     r24, 0              ; 1 - read bit 0
+1174:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+1175:fastloader-ll.S **** 
+1176:fastloader-ll.S ****         ;; delay
+ 1177               	        delay_cycles 10*8 - 6
+ 1178               	
+1179:fastloader-ll.S ****         ;; send to bus
+ 1180               	        out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1
+ 1181               	
+1182:fastloader-ll.S ****         ;; prepare bits 4+5
+ 1183               	        com     r24                 ; 1 - remaining bits are sent with high=1
+ 1184               	        mov     r19, r0             ; 1
+1185:fastloader-ll.S ****         bst     r24, 4              ; 1 - read bit 4
+1186:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+1187:fastloader-ll.S ****         bst     r24, 5              ; 1 - read bit 5
+1188:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+1189:fastloader-ll.S **** 
+1190:fastloader-ll.S ****         ;; delay
+ 1191               	        delay_cycles 11*8 - 7
+ 1192               	
+1193:fastloader-ll.S ****         ;; send to bus
+ 1194               	        out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1
+ 1195               	
+1196:fastloader-ll.S ****         ;; prepare bits 6+7
+ 1197               	        mov     r19, r0             ; 1
+ 1198               	        bst     r24, 6              ; 1 - read bit 6
+1199:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+1200:fastloader-ll.S ****         bst     r24, 7              ; 1 - read bit 7
+1201:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+1202:fastloader-ll.S **** 
+1203:fastloader-ll.S ****         ;; delay
+ 1204               	        delay_cycles 12*8 - 6
+ 1205               	
+1206:fastloader-ll.S ****         ;; send to bus
+ 1207               	        out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1
+ 1208               	
+1209:fastloader-ll.S ****         ;; final delay
+ 1210               	        delay_cycles 22*8
+ 1211               	
+1212:fastloader-ll.S ****         ret
+ 1213               	
+1214:fastloader-ll.S **** 
+ 1215               	        ;;
+ 1216               	        ;; send a byte using the 2MHz 1581 Configure 2.1 GEOS protocol
+ 1217               	        ;; called with byte in r24, no return value
+ 1218               	        ;;
+ 1219               	        .global geos_send_byte_1581_21
+ 1220               	geos_send_byte_1581_21:
+ 1221               	        com     r24                   ; invert so the bits are sent with high=1
+ 1222               	        rcall   geos_send_byte_common ; 7
+1223:fastloader-ll.S ****         mov     r0, r24               ; 1 - move data to target register
+1224:fastloader-ll.S **** 
+1225:fastloader-ll.S ****         ;; delay
+ 1226               	        delay_cycles 7*8 - 18
+ 1227               	
+1228:fastloader-ll.S ****         ;; send bits 0+1
+ 1229               	        rcall   send_bits_to_clk_data ; 10+6
+ 1230               	
+1231:fastloader-ll.S ****         ;; delay
+ 1232               	        delay_cycles 7*8 - 16
+ 1233               	
+1234:fastloader-ll.S ****         ;; send bits 2+3
+ 1235               	        rcall   send_bits_to_clk_data ; 10+6
+ 1236               	
+1237:fastloader-ll.S ****         ;; delay
+ 1238               	        delay_cycles 10*8 - 16
+ 1239               	
+1240:fastloader-ll.S ****         ;; send bits 4+5
+ 1241               	        rcall   send_bits_to_clk_data ; 10+6
+ 1242               	
+1243:fastloader-ll.S ****         ;; delay
+ 1244               	        delay_cycles 9*8 - 16
+ 1245               	
+1246:fastloader-ll.S ****         ;; send bits 6+7
+ 1247               	        rcall   send_bits_to_clk_data ; 10+6
+ 1248               	
+1249:fastloader-ll.S ****         ;; final delay
+ 1250               	        delay_cycles 12*8
+ 1251               	
+1252:fastloader-ll.S ****         ret
+ 1253               	
+1254:fastloader-ll.S **** #endif
+ 1255               	
+ 1256               	#ifdef CONFIG_LOADER_WHEELS
+ 1257               	        ;;
+ 1258               	        ;; send a byte using the Wheels protocol
+ 1259               	        ;; called with byte in r24, no return value
+ 1260               	        ;;
+ 1261               	        .global wheels_send_byte_1mhz
+ 1262               	wheels_send_byte_1mhz:
+ 1263               	        rcall   geos_send_byte_common ; 7
+ 1264               	
+1265:fastloader-ll.S ****         rcall   wheels_nibble       ; 3 - send lower nibble
+ 1266               	        swap    r24                 ; 1 - swap nibbles
+1267:fastloader-ll.S **** 
+1268:fastloader-ll.S ****         delay_cycles (14-9)*8 + 15 - 14
+ 1269               	        rcall   wheels_nibble       ; 3 - send upper nibble
+1270:fastloader-ll.S **** 
+1271:fastloader-ll.S ****         ;; final delay
+ 1272               	        delay_cycles 22*8
+ 1273               	        ret
+1274:fastloader-ll.S **** 
+1275:fastloader-ll.S **** wheels_nibble:
+ 1276               	        ;; prepare bits 3+1 (7+5)
+ 1277               	        mov     r19, r0             ; 1
+ 1278               	        bst     r24, 3              ; 1 - read bit 3
+1279:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+1280:fastloader-ll.S ****         bst     r24, 1              ; 1 - read bit 1
+1281:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+1282:fastloader-ll.S **** 
+1283:fastloader-ll.S ****         ;; delay
+ 1284               	        delay_cycles 9*8 - 15
+ 1285               	
+1286:fastloader-ll.S ****         ;; send to bus
+ 1287               	        out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1 - send to bus
+ 1288               	
+1289:fastloader-ll.S ****         ;; prepare bits 2+0 (6+4)
+ 1290               	        mov     r19, r0             ; 1
+ 1291               	        bst     r24, 2              ; 1 - read bit 2
+1292:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+1293:fastloader-ll.S ****         bst     r24, 0              ; 1 - read bit 0
+1294:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+1295:fastloader-ll.S **** 
+1296:fastloader-ll.S ****         ;; delay
+ 1297               	        delay_cycles 14*8 - 6
+ 1298               	
+1299:fastloader-ll.S ****         ;; send to bus
+ 1300               	        out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1 - send to bus
+ 1301               	        ret                                ; 4
+1302:fastloader-ll.S **** 
+1303:fastloader-ll.S **** 
+ 1304               	        ;;
+ 1305               	        ;; read a byte using the Wheels protocol
+ 1306               	        ;;
+ 1307               	        .global wheels_get_byte_1mhz
+ 1308               	wheels_get_byte_1mhz:
+ 1309               	        clr     r24
+ 1310               	
+1311:fastloader-ll.S ****         ;; wait until clock is high
+ 1312               	1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 1313               	        rjmp    1b
+1314:fastloader-ll.S **** 
+1315:fastloader-ll.S ****         ;; wait until clock is low
+ 1316               	1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK ; 1/2
+ 1317               	        rjmp    1b
+1318:fastloader-ll.S **** 
+1319:fastloader-ll.S ****         ;; delay
+ 1320               	        delay_cycles 16 * 8 - 5
+ 1321               	
+1322:fastloader-ll.S ****         ;; read bits 7/5
+ 1323               	        rcall   get_bits_from_clk_data ; 4+8 r24 = _____7_5
+ 1324               	        lsl     r24                    ; 1   r24 = ____7_5_
+1325:fastloader-ll.S **** 
+1326:fastloader-ll.S ****         delay_cycles 10 * 8 - 13
+ 1327               	
+1328:fastloader-ll.S ****         ;; read bits 6/4
+ 1329               	        rcall   get_bits_from_clk_data ; 4+8 r24 = ____7654
+ 1330               	        swap    r24                    ; 1   r24 = 7654____
+1331:fastloader-ll.S ****         lsr     r24                    ; 1   r24 = _7654___
+1332:fastloader-ll.S **** 
+1333:fastloader-ll.S ****         delay_cycles 15 * 8 - 14
+ 1334               	
+1335:fastloader-ll.S ****         ;; read bits 3/1
+ 1336               	        rcall   get_bits_from_clk_data ; 4+8 r24 = _76543_1
+ 1337               	        lsl     r24                    ; 1   r24 = 76543_1_
+1338:fastloader-ll.S **** 
+1339:fastloader-ll.S ****         delay_cycles 13 * 8 - 13
+ 1340               	
+1341:fastloader-ll.S ****         ;; read bits 2/0
+ 1342               	        rcall   get_bits_from_clk_data ; 4+8 r24 = 76543210
+ 1343               	
+1344:fastloader-ll.S ****         delay_cycles 20*8
+ 1345               	
+1346:fastloader-ll.S ****         clr     r25             ; clear upper byte of return value
+ 1347               	        com     r24             ; invert data byte
+1348:fastloader-ll.S **** 
+1349:fastloader-ll.S ****         ret
+ 1350               	
+1351:fastloader-ll.S ****         ;;
+ 1352               	        ;; read a byte using the Wheels 4.4 1MHz protocol
+ 1353               	        ;;
+ 1354               	        .global wheels44_get_byte_1mhz
+ 1355               	wheels44_get_byte_1mhz:
+ 1356               	        clr     r24
+ 1357               	
+1358:fastloader-ll.S ****         ;; wait until clock is high
+ 1359               	1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 1360               	        rjmp    1b
+1361:fastloader-ll.S **** 
+1362:fastloader-ll.S ****         ;; wait until clock is low
+ 1363               	1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK ; 1/2
+ 1364               	        rjmp    1b
+1365:fastloader-ll.S **** 
+1366:fastloader-ll.S ****         ;; delay
+ 1367               	        delay_cycles 17 * 8 - 5
+ 1368               	
+1369:fastloader-ll.S ****         ;; read bits 7/5
+ 1370               	        rcall   get_bits_from_clk_data ; 4+8 r24 = _____7_5
+ 1371               	        lsl     r24                    ; 1   r24 = ____7_5_
+1372:fastloader-ll.S **** 
+1373:fastloader-ll.S ****         delay_cycles 11 * 8 - 13
+ 1374               	
+1375:fastloader-ll.S ****         ;; read bits 6/4
+ 1376               	        rcall   get_bits_from_clk_data ; 4+8 r24 = ____7654
+ 1377               	        swap    r24                    ; 1   r24 = 7654____
+1378:fastloader-ll.S ****         lsr     r24                    ; 1   r24 = _7654___
+1379:fastloader-ll.S **** 
+1380:fastloader-ll.S ****         delay_cycles 17 * 8 - 14
+ 1381               	
+1382:fastloader-ll.S ****         ;; read bits 3/1
+ 1383               	        rcall   get_bits_from_clk_data ; 4+8 r24 = _76543_1
+ 1384               	        lsl     r24                    ; 1   r24 = 76543_1_
+1385:fastloader-ll.S **** 
+1386:fastloader-ll.S ****         delay_cycles 16 * 8 - 13
+ 1387               	
+1388:fastloader-ll.S ****         ;; read bits 2/0
+ 1389               	        rcall   get_bits_from_clk_data ; 4+8 r24 = 76543210
+ 1390               	
+1391:fastloader-ll.S ****         delay_cycles 20*8
+ 1392               	
+1393:fastloader-ll.S ****         clr     r25             ; clear upper byte of return value
+ 1394               	        com     r24             ; invert data byte
+1395:fastloader-ll.S **** 
+1396:fastloader-ll.S ****         ret
+ 1397               	
+1398:fastloader-ll.S ****         ;;
+ 1399               	        ;; read a byte using the Wheels 4.4 2MHz protocol
+ 1400               	        ;;
+ 1401               	        .global wheels44_get_byte_2mhz
+ 1402               	wheels44_get_byte_2mhz:
+ 1403               	        clr     r24
+ 1404               	
+1405:fastloader-ll.S ****         ;; wait until clock is high
+ 1406               	1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 1407               	        rjmp    1b
+1408:fastloader-ll.S **** 
+1409:fastloader-ll.S ****         ;; wait until clock is low
+ 1410               	1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK ; 1/2
+ 1411               	        rjmp    1b
+1412:fastloader-ll.S **** 
+1413:fastloader-ll.S ****         ;; delay
+ 1414               	        delay_cycles 15*8 - 2
+ 1415               	
+1416:fastloader-ll.S ****         ;; get bits 0 and 1
+ 1417               	        in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 1418               	        bst     r19, IEC_PIN_CLOCK         ; 1
+1419:fastloader-ll.S ****         bld     r24, 0                     ; 1 - r24 = .......0
+1420:fastloader-ll.S ****         bst     r19, IEC_PIN_DATA          ; 1
+1421:fastloader-ll.S ****         bld     r24, 1                     ; 1 - r24 = ......10
+1422:fastloader-ll.S **** 
+1423:fastloader-ll.S ****         ;; delay
+ 1424               	        delay_cycles 11*8 - 5
+ 1425               	
+1426:fastloader-ll.S ****         ;; get bits 2 and 3
+ 1427               	        in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 1428               	        bst     r19, IEC_PIN_CLOCK         ; 1
+1429:fastloader-ll.S ****         bld     r24, 2                     ; 1 - r24 = .....210
+1430:fastloader-ll.S ****         bst     r19, IEC_PIN_DATA          ; 1
+1431:fastloader-ll.S ****         bld     r24, 3                     ; 1 - r24 = ....3210
+1432:fastloader-ll.S **** 
+1433:fastloader-ll.S ****         ;; delay
+ 1434               	        delay_cycles 11*8 - 5
+ 1435               	
+1436:fastloader-ll.S ****         ;; get bits 4 and 5
+ 1437               	        in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 1438               	        bst     r19, IEC_PIN_CLOCK         ; 1
+1439:fastloader-ll.S ****         bld     r24, 4                     ; 1 - r24 = ...43210
+1440:fastloader-ll.S ****         bst     r19, IEC_PIN_DATA          ; 1
+1441:fastloader-ll.S ****         bld     r24, 5                     ; 1 - r24 = ..543210
+1442:fastloader-ll.S **** 
+1443:fastloader-ll.S ****         ;; delay
+ 1444               	        delay_cycles 11*8 - 5
+ 1445               	
+1446:fastloader-ll.S ****         ;; get bits 6 and 7
+ 1447               	        in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 1448               	        bst     r19, IEC_PIN_CLOCK         ; 1
+1449:fastloader-ll.S ****         bld     r24, 6                     ; 1 - r24 = .6543210
+1450:fastloader-ll.S ****         bst     r19, IEC_PIN_DATA          ; 1
+1451:fastloader-ll.S ****         bld     r24, 7                     ; 1 - r24 = 76543210
+1452:fastloader-ll.S **** 
+1453:fastloader-ll.S ****         ;; safety delay
+ 1454               	        delay_cycles 12*8
+ 1455               	
+1456:fastloader-ll.S ****         ;; post process received value and return
+ 1457               	        com     r24                  ; negate all bits
+ 1458               	        clr     r25                  ; clear high byte of return value
+1459:fastloader-ll.S ****         ret
+1460:fastloader-ll.S **** 
+1461:fastloader-ll.S **** 
+ 1462               	        ;;
+ 1463               	        ;; send a byte using the Wheels 4.4 2MHz protocol
+ 1464               	        ;; called with byte in r24, no return value
+ 1465               	        ;;
+ 1466               	        .global wheels44_send_byte_2mhz
+ 1467               	wheels44_send_byte_2mhz:
+ 1468               	        com     r24                   ; invert so the bits are sent with high=1
+ 1469               	        rcall   geos_send_byte_common ; 7
+1470:fastloader-ll.S ****         mov     r0, r24               ; 1 - move data to target register
+1471:fastloader-ll.S **** 
+1472:fastloader-ll.S ****         ;; delay
+ 1473               	        delay_cycles 7*8 - 18
+ 1474               	
+1475:fastloader-ll.S ****         ;; send bits 0+1
+ 1476               	        rcall   send_bits_to_clk_data ; 10+6
+ 1477               	
+1478:fastloader-ll.S ****         ;; delay
+ 1479               	        delay_cycles 8*8 - 16
+ 1480               	
+1481:fastloader-ll.S ****         ;; send bits 2+3
+ 1482               	        rcall   send_bits_to_clk_data ; 10+6
+ 1483               	
+1484:fastloader-ll.S ****         ;; delay
+ 1485               	        delay_cycles 11*8 - 16
+ 1486               	
+1487:fastloader-ll.S ****         ;; send bits 4+5
+ 1488               	        rcall   send_bits_to_clk_data ; 10+6
+ 1489               	
+1490:fastloader-ll.S ****         ;; delay
+ 1491               	        delay_cycles 11*8 - 16
+ 1492               	
+1493:fastloader-ll.S ****         ;; send bits 6+7
+ 1494               	        rcall   send_bits_to_clk_data ; 10+6
+ 1495               	
+1496:fastloader-ll.S ****         ;; final delay
+ 1497               	        delay_cycles 14*8
+ 1498               	
+1499:fastloader-ll.S ****         ret
+ 1500               	
+1501:fastloader-ll.S **** #endif
+ 1502               	
+ 1503               	#ifdef CONFIG_LOADER_AR6
+ 1504               	        ;;
+ 1505               	        ;; send a byte using the AR6-1581 protocol
+ 1506               	        ;; called with byte in r24, no return value
+ 1507               	        ;;
+ 1508               	        .global ar6_1581_send_byte
+ 1509               	ar6_1581_send_byte:
+ 1510               	        cli
+ 1511               	
+1512:fastloader-ll.S ****         ;; set up data byte for transmission
+ 1513               	        com     r24
+ 1514               	        mov     r0, r24
+1515:fastloader-ll.S **** 
+1516:fastloader-ll.S ****         ;; clock high
+ 1517               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 1518               	
+1519:fastloader-ll.S ****         ;; wait until data is high
+ 1520               	1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+ 1521               	        rjmp    1b
+1522:fastloader-ll.S **** 
+1523:fastloader-ll.S ****         ;; delay
+ 1524               	        delay_cycles 5*8 - 10
+ 1525               	
+1526:fastloader-ll.S ****         ;; send bits 0+1
+ 1527               	        rcall   send_bits_to_clk_data ; 10+6
+ 1528               	
+1529:fastloader-ll.S ****         ;; delay
+ 1530               	        delay_cycles 8*8 - 16
+ 1531               	
+1532:fastloader-ll.S ****         ;; send bits 2+3
+ 1533               	        rcall   send_bits_to_clk_data ; 10+6
+ 1534               	
+1535:fastloader-ll.S ****         ;; delay
+ 1536               	        delay_cycles 8*8 - 16
+ 1537               	
+1538:fastloader-ll.S ****         ;; send bits 4+5
+ 1539               	        rcall   send_bits_to_clk_data ; 10+6
+ 1540               	
+1541:fastloader-ll.S ****         ;; delay
+ 1542               	        delay_cycles 8*8 - 16
+ 1543               	
+1544:fastloader-ll.S ****         ;; send bits 6+7
+ 1545               	        rcall   send_bits_to_clk_data ; 10+6
+ 1546               	
+1547:fastloader-ll.S ****         ;; delay
+ 1548               	        delay_cycles 8*8+4 - 6 - 2
+ 1549               	
+1550:fastloader-ll.S ****         ;; set clock low, data high
+ 1551               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA  ; 1
+ 1552               	        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK ; 1
+1553:fastloader-ll.S **** 
+1554:fastloader-ll.S ****         sei
+ 1555               	        ret
+1556:fastloader-ll.S **** 
+1557:fastloader-ll.S ****         ;;
+ 1558               	        ;; receive a byte using the AR6-1581-PAL protocol
+ 1559               	        ;; returns byte in r24
+ 1560               	        ;;
+ 1561               	        .global ar6_1581p_get_byte
+ 1562               	ar6_1581p_get_byte:
+ 1563               	        cli
+ 1564               	
+1565:fastloader-ll.S ****         clr     r24
+ 1566               	
+1567:fastloader-ll.S ****         ;; clock high
+ 1568               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 1569               	
+1570:fastloader-ll.S ****         ;; wait until data is low
+ 1571               	1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+ 1572               	        rjmp    1b
+1573:fastloader-ll.S **** 
+1574:fastloader-ll.S ****         ;; wait until data is high
+ 1575               	1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+ 1576               	        rjmp    1b
+1577:fastloader-ll.S **** 
+1578:fastloader-ll.S ****         ;; delay
+ 1579               	        delay_cycles 12*8 - 4
+ 1580               	
+1581:fastloader-ll.S ****         ;; receive bits 7+5
+ 1582               	        rcall   get_bits_from_clk_data ; 4+8 - r24 = .....7.5
+ 1583               	        lsl     r24                    ; 1   - r24 = ....7.5.
+1584:fastloader-ll.S **** 
+1585:fastloader-ll.S ****         ;; delay
+ 1586               	        delay_cycles 10*8 - 9 - 4
+ 1587               	
+1588:fastloader-ll.S ****         ;; receive bits 6+4
+ 1589               	        rcall   get_bits_from_clk_data ; 4+8 - r24 = ....7654
+ 1590               	        swap    r24                    ; 1   - r24 = 7654....
+1591:fastloader-ll.S ****         lsr     r24                    ; 1   - r24 = .7654...
+1592:fastloader-ll.S **** 
+1593:fastloader-ll.S ****         ;; delay
+ 1594               	        delay_cycles 16*8 - 10 - 4
+ 1595               	
+1596:fastloader-ll.S ****         ;; receive bits 3+1
+ 1597               	        rcall   get_bits_from_clk_data ; 4+8 - r24 = .76543.1
+ 1598               	        lsl     r24                    ; 1   - r24 = 76543.1.
+1599:fastloader-ll.S **** 
+1600:fastloader-ll.S ****         ;; delay
+ 1601               	        delay_cycles 10*8 - 9 - 4
+ 1602               	
+1603:fastloader-ll.S ****         ;; receive bits 2+0
+ 1604               	        rcall   get_bits_from_clk_data ; 4+8 - r24 = 76543210
+ 1605               	
+1606:fastloader-ll.S ****         ;; delay
+ 1607               	        delay_cycles 5*8 - 8 - 1
+ 1608               	
+1609:fastloader-ll.S ****         ;; set clock low
+ 1610               	        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 1611               	
+1612:fastloader-ll.S ****         ;; post-processing
+ 1613               	        sei
+ 1614               	        com     r24
+1615:fastloader-ll.S ****         clr     r25
+1616:fastloader-ll.S ****         ret
+1617:fastloader-ll.S **** #endif
+1618:fastloader-ll.S ****         .end
+ 1619               	...
+DEFINED SYMBOLS
+     fastloader-ll.S:56     .text:00000000 __vector_4
+     fastloader-ll.S:87     .text:00000026 iiv_atn_irq_end
+     fastloader-ll.S:83     .text:00000024 iiv_not_fl_dreamload_old
+     fastloader-ll.S:802    .text:000002a4 dreamload_get_command_old
+     fastloader-ll.S:108    .text:0000003e iiv_clock_irq_end
+     fastloader-ll.S:105    .text:0000003e iiv_not_fl_dreamload
+     fastloader-ll.S:754    .text:00000274 dreamload_get_command
+     fastloader-ll.S:171    .text:0000004c cycleloop2
+     fastloader-ll.S:173    .text:0000004e cycleloop1
+     fastloader-ll.S:175    .text:00000050 cycleloop0
+     fastloader-ll.S:195    .text:00000056 delay1us
+     fastloader-ll.S:200    .text:0000005a wait_atn_high
+     fastloader-ll.S:206    .text:00000060 wait_atn_low
+     fastloader-ll.S:221    .text:00000066 jiffy_receive
+     fastloader-ll.S:308    .text:000000ca jiffy_sendbits
+     fastloader-ll.S:336    .text:000000de jiffy_send
+     fastloader-ll.S:429    .text:00000140 js_finish
+     fastloader-ll.S:446    .text:00000148 turbodisk_byte
+     fastloader-ll.S:467    .text:0000015c tdbitloop
+     fastloader-ll.S:503    .text:00000186 turbodisk_buffer
+     fastloader-ll.S:523    .text:0000019a tdbyteloop
+     fastloader-ll.S:531    .text:000001a4 tdbitloop2
+     fastloader-ll.S:581    .text:000001d8 send_bits_to_clk_data
+     fastloader-ll.S:606    .text:000001ec get_bits_from_clk_data
+     fastloader-ll.S:627    .text:000001f8 clk_data_handshake
+     fastloader-ll.S:649    .text:0000020e fastloader_fc3_send_block
+     fastloader-ll.S:660    .text:0000021a fc3_byteloop
+     fastloader-ll.S:666    .text:00000220 fc3_bitloop
+     fastloader-ll.S:676    .text:0000022a fc3_next_byte
+     fastloader-ll.S:696    .text:0000023c fc3_get_byte
+     fastloader-ll.S:765    .text:00000282 dreamload_get_byte
+     fastloader-ll.S:768    .text:00000284 dl_bitloop
+     fastloader-ll.S:812    .text:000002b2 dreamload_get_byte_old
+     fastloader-ll.S:815    .text:000002b4 dlgb_nibble
+     fastloader-ll.S:838    .text:000002ca dreamload_send_byte
+     fastloader-ll.S:846    .text:000002d0 dsb_bitloop
+     fastloader-ll.S:867    .text:000002de uload3_get_byte
+     fastloader-ll.S:905    .text:00000312 uload3_abort
+     fastloader-ll.S:914    .text:00000316 uload3_send_byte
+     fastloader-ll.S:942    .text:00000336 uload3_bitloop
+     fastloader-ll.S:963    .text:0000034e epyx_bitpair
+     fastloader-ll.S:976    .text:0000035a epyxcart_send_byte
+     fastloader-ll.S:1014   .text:00000396 epyxcart_atnabort
+     fastloader-ll.S:1024   .text:0000039a geos_get_byte_common
+     fastloader-ll.S:1061   .text:000003c2 geos_get_byte_1mhz
+     fastloader-ll.S:1088   .text:000003dc geos_get_byte_2mhz
+     fastloader-ll.S:1115   .text:000003f6 geos_send_byte_common
+     fastloader-ll.S:1136   .text:00000408 geos_send_byte_1mhz
+     fastloader-ll.S:1167   .text:00000426 geos_send_byte_tail
+     fastloader-ll.S:1155   .text:00000418 geos_send_byte_2mhz
+     fastloader-ll.S:1222   .text:00000460 geos_send_byte_1581_21
+     fastloader-ll.S:1264   .text:00000484 wheels_send_byte_1mhz
+     fastloader-ll.S:1277   .text:00000496 wheels_nibble
+     fastloader-ll.S:1310   .text:000004b8 wheels_get_byte_1mhz
+     fastloader-ll.S:1357   .text:000004ec wheels44_get_byte_1mhz
+     fastloader-ll.S:1404   .text:00000520 wheels44_get_byte_2mhz
+     fastloader-ll.S:1469   .text:0000056c wheels44_send_byte_2mhz
+     fastloader-ll.S:1511   .text:00000590 ar6_1581_send_byte
+     fastloader-ll.S:1564   .text:000005c0 ar6_1581p_get_byte
+
+UNDEFINED SYMBOLS
+detected_loader
+fl_track
+fl_sector
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/sd2iec-sw2-firmware-0.10.3.bin b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/sd2iec-sw2-firmware-0.10.3.bin
new file mode 100644
index 00000000..1c80d41e
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/sd2iec-sw2-firmware-0.10.3.bin differ
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/sd2iec.bin b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/sd2iec.bin
new file mode 100644
index 00000000..1c80d41e
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/sd2iec.bin differ
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/sd2iec.elf b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/sd2iec.elf
new file mode 100644
index 00000000..2f1897e6
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/sd2iec.elf differ
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/sd2iec.hex b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/sd2iec.hex
new file mode 100644
index 00000000..c9c0404e
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/sd2iec.hex
@@ -0,0 +1,3924 @@
+:100000001BC300000C942F733FC300003DC30000CE
+:100010003CC3000039C3000037C3000035C30000F3
+:1000200033C3000031C300002FC300002DC3000004
+:100030002BC300000C940C7827C3000025C30000DC
+:1000400023C3000021C300001FC300001DC3000024
+:100050001BC3000019C3000017C3000015C3000034
+:1000600013C3000011C300000FC300000DC3000044
+:100070000BC3000009C3000007C3000005C3000054
+:1000800003C3000001C30000FFC20000981F9B1FB4
+:1000900093213322002A9822002A5223002A002A80
+:1000A000002A5F238125002ABF25002A1F26AA26B1
+:1000B0002F27E628002A002A4E299B2F5330533041
+:1000C0009F2F53305330C72F53305330CD2F5330E1
+:1000D0005330F02F53305330D42F53305330F22F4E
+:1000E000533053300A3053305330253082388D38F6
+:1000F000853888388A388D389F3899388F389638BF
+:100100008D388D38A538A938A238A2389C3888385F
+:10011000E561E361E561ED61ED61ED61EA61ED618C
+:10012000ED61ED61ED61ED61ED61ED61DD61ED616F
+:10013000E161DB61ED61DF6131645B645B643B6401
+:100140005B645B645B645B645B645B645B644364CF
+:1001500036645B645B643F645B6428643D645B6439
+:1001600041645B642C644F68AA6884681D692369D4
+:100170002C693169BC6A3868B609EC12DF0EB20F1F
+:10018000390D360D330D070B9F0F7B140C159C0C8E
+:10019000B4148C11820D6D0912012390A20A03126E
+:1001A000014690A206032803500416010101010034
+:1001B000041601014155544F535741502E4C53548E
+:1001C00000C348414E4745204449524543544F528D
+:1001D0005900C348414E474520414444524553537A
+:1001E00000D3544F52452053455454494E47530071
+:1001F000C3414E43454C0000C3414E43454C00FFB4
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diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/sd2iec.map b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/sd2iec.map
new file mode 100644
index 00000000..456dc3ca
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p.orig/sd2iec.map
@@ -0,0 +1,2479 @@
+Archive member included because of file (symbol)
+
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr51\libgcc.a(_mulsi3.o)
+                              obj-m1284p/doscmd.o (__mulsi3)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr51\libgcc.a(_udivmodqi4.o)
+                              obj-m1284p/display.o (__udivmodqi4)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr51\libgcc.a(_udivmodhi4.o)
+                              obj-m1284p/ff.o (__udivmodhi4)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr51\libgcc.a(_udivmodsi4.o)
+                              obj-m1284p/fatops.o (__udivmodsi4)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr51\libgcc.a(_prologue.o)
+                              obj-m1284p/buffers.o (__prologue_saves__)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr51\libgcc.a(_epilogue.o)
+                              obj-m1284p/buffers.o (__epilogue_restores__)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr51\libgcc.a(_exit.o)
+                              c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51/crtm1284p.o (exit)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr51\libgcc.a(_tablejump.o)
+                              obj-m1284p/doscmd.o (__tablejump2__)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr51\libgcc.a(_clear_bss.o)
+                              obj-m1284p/buffers.o (__do_clear_bss)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(isalnum.o)
+                              obj-m1284p/fatops.o (isalnum)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(cty_isfalse.o)
+                              c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(isalnum.o) (__ctype_isfalse)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(isalpha.o)
+                              c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(isalnum.o) (isalpha)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(toupper.o)
+                              obj-m1284p/errormsg.o (toupper)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(memcmp_P.o)
+                              obj-m1284p/doscmd.o (memcmp_P)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(memcpy_P.o)
+                              obj-m1284p/d64ops.o (memcpy_P)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(strcmp_P.o)
+                              obj-m1284p/fatops.o (strcmp_P)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(strcpy_P.o)
+                              obj-m1284p/diskchange.o (strcpy_P)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(memcmp.o)
+                              obj-m1284p/doscmd.o (memcmp)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(memcpy.o)
+                              obj-m1284p/display.o (memcpy)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(memset.o)
+                              obj-m1284p/d64ops.o (memset)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(strchr.o)
+                              obj-m1284p/doscmd.o (strchr)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(strcpy.o)
+                              obj-m1284p/doscmd.o (strcpy)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(strncpy.o)
+                              obj-m1284p/doscmd.o (strncpy)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(strrchr.o)
+                              obj-m1284p/fatops.o (strrchr)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(eerd_block_atmega1284p.o)
+                              obj-m1284p/eeprom.o (__eerd_block_m1284p)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(eerd_byte_atmega1284p.o)
+                              obj-m1284p/doscmd.o (__eerd_byte_m1284p)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(eerd_word_atmega1284p.o)
+                              obj-m1284p/eeprom.o (__eerd_word_m1284p)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(eewr_block_atmega1284p.o)
+                              obj-m1284p/eeprom.o (__eewr_block_m1284p)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(eewr_byte_atmega1284p.o)
+                              obj-m1284p/doscmd.o (__eewr_byte_m1284p)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(eewr_word_atmega1284p.o)
+                              obj-m1284p/eeprom.o (__eewr_word_m1284p)
+
+Allocating common symbols
+Common symbol       size              file
+
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+lastbuttonchange    0x2               obj-m1284p/timer.o
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+date_match_end      0x6               obj-m1284p/doscmd.o
+dir_changed         0x1               obj-m1284p/parser.o
+file_extension_mode
+                    0x1               obj-m1284p/fatops.o
+fl_sector           0x1               obj-m1284p/fastloader.o
+ticks               0x2               obj-m1284p/timer.o
+image_as_dir        0x1               obj-m1284p/fileops.o
+fl_track            0x1               obj-m1284p/fastloader.o
+command_buffer      0x7a              obj-m1284p/doscmd.o
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+errorcache          0x17              obj-m1284p/d64ops.o
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+date_match_start    0x6               obj-m1284p/doscmd.o
+display_found       0x1               obj-m1284p/display.o
+
+Discarded input sections
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+LOAD obj-m1284p/buffers.o
+LOAD obj-m1284p/d64ops.o
+LOAD obj-m1284p/diskchange.o
+LOAD obj-m1284p/diskio.o
+LOAD obj-m1284p/display.o
+LOAD obj-m1284p/doscmd.o
+LOAD obj-m1284p/eeprom.o
+LOAD obj-m1284p/errormsg.o
+LOAD obj-m1284p/fastloader.o
+LOAD obj-m1284p/fatops.o
+LOAD obj-m1284p/ff.o
+LOAD obj-m1284p/fileops.o
+LOAD obj-m1284p/iec.o
+LOAD obj-m1284p/led.o
+LOAD obj-m1284p/m2iops.o
+LOAD obj-m1284p/main.o
+LOAD obj-m1284p/parser.o
+LOAD obj-m1284p/pcf8583.o
+LOAD obj-m1284p/rtc.o
+LOAD obj-m1284p/sdcard.o
+LOAD obj-m1284p/softi2c.o
+LOAD obj-m1284p/spi.o
+LOAD obj-m1284p/timer.o
+LOAD obj-m1284p/utils.o
+LOAD obj-m1284p/fastloader-ll.o
+LOAD obj-m1284p/crc7asm.o
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+LOAD c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr51\libgcc.a
+LOAD c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a
+LOAD c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr51\libgcc.a
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+ *(.gnu.linkonce.wi.*)
+
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+ *(.debug_abbrev)
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+
+.debug_line     0x00000000     0xc8b6
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+
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+
+.debug_str      0x00000000     0x254d
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+                                0x794 (size before relaxing)
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+                                 0xf5 (size before relaxing)
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+                                0x852 (size before relaxing)
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+                                0xdb7 (size before relaxing)
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+                                0x1c5 (size before relaxing)
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+                                0xb22 (size before relaxing)
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+                                0xa15 (size before relaxing)
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+                                0x6ec (size before relaxing)
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+                                0x88d (size before relaxing)
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+                                0x5de (size before relaxing)
+ .debug_str     0x00002098       0x12 obj-m1284p/led.o
+                                 0xdc (size before relaxing)
+ .debug_str     0x000020aa       0xbb obj-m1284p/m2iops.o
+                                0x7d5 (size before relaxing)
+ .debug_str     0x00002165       0x11 obj-m1284p/main.o
+                                0x11c (size before relaxing)
+ .debug_str     0x00002176       0xb6 obj-m1284p/parser.o
+                                0x68f (size before relaxing)
+ .debug_str     0x0000222c       0x36 obj-m1284p/pcf8583.o
+                                0x166 (size before relaxing)
+ .debug_str     0x00002262       0x12 obj-m1284p/rtc.o
+                                0x106 (size before relaxing)
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+                                0x35b (size before relaxing)
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+                                0x1ed (size before relaxing)
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+                                 0xfd (size before relaxing)
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+                                0x129 (size before relaxing)
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+                                 0xf3 (size before relaxing)
+
+.debug_loc      0x00000000     0xc3d2
+ *(.debug_loc)
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+ .debug_loc     0x0000c2a3      0x12f obj-m1284p/utils.o
+
+.debug_macinfo
+ *(.debug_macinfo)
+OUTPUT(obj-m1284p/sd2iec.elf elf32-avr)
+LOAD linker stubs
+
+.debug_ranges   0x00000000     0x1b80
+ .debug_ranges  0x00000000       0x70 obj-m1284p/buffers.o
+ .debug_ranges  0x00000070      0x170 obj-m1284p/d64ops.o
+ .debug_ranges  0x000001e0       0x38 obj-m1284p/diskchange.o
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+ .debug_ranges  0x000002d8      0x468 obj-m1284p/doscmd.o
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+ .debug_ranges  0x000017e8       0x18 obj-m1284p/led.o
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+ .debug_ranges  0x00001900       0x28 obj-m1284p/pcf8583.o
+ .debug_ranges  0x00001928       0x18 obj-m1284p/rtc.o
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+ .debug_ranges  0x00001b30       0x20 obj-m1284p/timer.o
+ .debug_ranges  0x00001b50       0x30 obj-m1284p/utils.o
+
+Cross Reference Table
+
+Symbol                                            File
+__bad_interrupt                                   c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51/crtm1284p.o
+__bss_end                                         c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr51\libgcc.a(_clear_bss.o)
+__bss_start                                       c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr51\libgcc.a(_clear_bss.o)
+__ctype_isfalse                                   c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(cty_isfalse.o)
+                                                  c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(isalpha.o)
+                                                  c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(isalnum.o)
+__ctype_istrue                                    c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(cty_isfalse.o)
+__data_end                                        c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51/crtm1284p.o
+__data_load_start                                 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51/crtm1284p.o
+__data_start                                      c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51/crtm1284p.o
+__do_clear_bss                                    c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr51\libgcc.a(_clear_bss.o)
+                                                  obj-m1284p/timer.o
+                                                  obj-m1284p/sdcard.o
+                                                  obj-m1284p/pcf8583.o
+                                                  obj-m1284p/parser.o
+                                                  obj-m1284p/led.o
+                                                  obj-m1284p/iec.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/ff.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/fastloader.o
+                                                  obj-m1284p/errormsg.o
+                                                  obj-m1284p/eeprom.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/display.o
+                                                  obj-m1284p/diskio.o
+                                                  obj-m1284p/diskchange.o
+                                                  obj-m1284p/d64ops.o
+                                                  obj-m1284p/buffers.o
+__do_copy_data                                    c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51/crtm1284p.o
+                                                  obj-m1284p/iec.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+__eerd_block_m1284p                               c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(eerd_block_atmega1284p.o)
+                                                  obj-m1284p/eeprom.o
+__eerd_blraw_m1284p                               c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(eerd_block_atmega1284p.o)
+                                                  c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(eerd_word_atmega1284p.o)
+__eerd_byte_m1284p                                c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(eerd_byte_atmega1284p.o)
+                                                  obj-m1284p/eeprom.o
+                                                  obj-m1284p/doscmd.o
+__eerd_word_m1284p                                c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(eerd_word_atmega1284p.o)
+                                                  obj-m1284p/eeprom.o
+__eewr_block_m1284p                               c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(eewr_block_atmega1284p.o)
+                                                  obj-m1284p/eeprom.o
+__eewr_byte_m1284p                                c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(eewr_byte_atmega1284p.o)
+                                                  c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(eewr_word_atmega1284p.o)
+                                                  obj-m1284p/eeprom.o
+                                                  obj-m1284p/doscmd.o
+__eewr_r18_m1284p                                 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(eewr_byte_atmega1284p.o)
+                                                  c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(eewr_word_atmega1284p.o)
+                                                  c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(eewr_block_atmega1284p.o)
+__eewr_word_m1284p                                c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(eewr_word_atmega1284p.o)
+                                                  obj-m1284p/eeprom.o
+__epilogue_restores__                             c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr51\libgcc.a(_epilogue.o)
+                                                  obj-m1284p/softi2c.o
+                                                  obj-m1284p/sdcard.o
+                                                  obj-m1284p/rtc.o
+                                                  obj-m1284p/pcf8583.o
+                                                  obj-m1284p/parser.o
+                                                  obj-m1284p/m2iops.o
+                                                  obj-m1284p/iec.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/ff.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/fastloader.o
+                                                  obj-m1284p/errormsg.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/display.o
+                                                  obj-m1284p/diskchange.o
+                                                  obj-m1284p/d64ops.o
+                                                  obj-m1284p/buffers.o
+__heap_end                                        c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51/crtm1284p.o
+__init                                            c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51/crtm1284p.o
+__mulsi3                                          c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr51\libgcc.a(_mulsi3.o)
+                                                  obj-m1284p/ff.o
+                                                  obj-m1284p/doscmd.o
+__prologue_saves__                                c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr51\libgcc.a(_prologue.o)
+                                                  obj-m1284p/softi2c.o
+                                                  obj-m1284p/sdcard.o
+                                                  obj-m1284p/rtc.o
+                                                  obj-m1284p/pcf8583.o
+                                                  obj-m1284p/parser.o
+                                                  obj-m1284p/m2iops.o
+                                                  obj-m1284p/iec.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/ff.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/fastloader.o
+                                                  obj-m1284p/errormsg.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/display.o
+                                                  obj-m1284p/diskchange.o
+                                                  obj-m1284p/d64ops.o
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+geos_send_byte_1mhz                               obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/doscmd.o
+geos_send_byte_2mhz                               obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/doscmd.o
+get_fattime                                       obj-m1284p/rtc.o
+                                                  obj-m1284p/ff.o
+get_mcusr                                         obj-m1284p/main.o
+i2c_init                                          obj-m1284p/softi2c.o
+                                                  obj-m1284p/pcf8583.o
+i2c_read_register                                 obj-m1284p/softi2c.o
+                                                  obj-m1284p/display.o
+i2c_read_registers                                obj-m1284p/softi2c.o
+                                                  obj-m1284p/pcf8583.o
+                                                  obj-m1284p/display.o
+i2c_write_register                                obj-m1284p/softi2c.o
+                                                  obj-m1284p/pcf8583.o
+i2c_write_registers                               obj-m1284p/softi2c.o
+                                                  obj-m1284p/pcf8583.o
+                                                  obj-m1284p/display.o
+iec_data                                          obj-m1284p/iec.o
+iec_init                                          obj-m1284p/iec.o
+                                                  obj-m1284p/main.o
+iec_mainloop                                      obj-m1284p/iec.o
+                                                  obj-m1284p/main.o
+image_as_dir                                      obj-m1284p/fileops.o
+                                                  obj-m1284p/errormsg.o
+                                                  obj-m1284p/eeprom.o
+                                                  obj-m1284p/doscmd.o
+image_chdir                                       obj-m1284p/fatops.o
+                                                  obj-m1284p/m2iops.o
+                                                  obj-m1284p/d64ops.o
+image_mkdir                                       obj-m1284p/fatops.o
+                                                  obj-m1284p/m2iops.o
+image_read                                        obj-m1284p/fatops.o
+                                                  obj-m1284p/m2iops.o
+                                                  obj-m1284p/d64ops.o
+image_unmount                                     obj-m1284p/fatops.o
+                                                  obj-m1284p/diskchange.o
+                                                  obj-m1284p/d64ops.o
+image_write                                       obj-m1284p/fatops.o
+                                                  obj-m1284p/m2iops.o
+                                                  obj-m1284p/d64ops.o
+int2bcd                                           obj-m1284p/utils.o
+                                                  obj-m1284p/pcf8583.o
+                                                  obj-m1284p/doscmd.o
+isalnum                                           c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(isalnum.o)
+                                                  obj-m1284p/fatops.o
+isalpha                                           c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(isalpha.o)
+                                                  c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(isalnum.o)
+islower                                           c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(isalpha.o)
+isupper                                           c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(isalpha.o)
+jiffy_receive                                     obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/iec.o
+jiffy_send                                        obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/iec.o
+l_getfree                                         obj-m1284p/ff.o
+                                                  obj-m1284p/fatops.o
+l_opencluster                                     obj-m1284p/ff.o
+                                                  obj-m1284p/fatops.o
+l_opendir                                         obj-m1284p/ff.o
+                                                  obj-m1284p/fatops.o
+lastbuttonchange                                  obj-m1284p/timer.o
+led_state                                         obj-m1284p/timer.o
+                                                  obj-m1284p/led.o
+                                                  obj-m1284p/errormsg.o
+load_ar6_1581                                     obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_dreamload                                    obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_eload1                                       obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_epyxcart                                     obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_fc3                                          obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_geos                                         obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_geos_s1                                      obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_gijoe                                        obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_nippon                                       obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_turbodisk                                    obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_uload3                                       obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_wheels_s1                                    obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_wheels_s2                                    obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+longverstr                                        obj-m1284p/errormsg.o
+                                                  obj-m1284p/main.o
+m2iops                                            obj-m1284p/m2iops.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/fatops.o
+main                                              obj-m1284p/main.o
+                                                  c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51/crtm1284p.o
+mark_buffer_clean                                 obj-m1284p/buffers.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/fastloader.o
+                                                  obj-m1284p/d64ops.o
+mark_buffer_dirty                                 obj-m1284p/buffers.o
+                                                  obj-m1284p/iec.o
+                                                  obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/d64ops.o
+match_name                                        obj-m1284p/parser.o
+                                                  obj-m1284p/fileops.o
+matchdh                                           obj-m1284p/parser.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/buffers.o
+max_part                                          obj-m1284p/parser.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/d64ops.o
+memcmp                                            c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(memcmp.o)
+                                                  obj-m1284p/parser.o
+                                                  obj-m1284p/ff.o
+                                                  obj-m1284p/doscmd.o
+memcmp_P                                          c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(memcmp_P.o)
+                                                  obj-m1284p/ff.o
+                                                  obj-m1284p/doscmd.o
+memcpy                                            c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(memcpy.o)
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/ff.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/display.o
+memcpy_P                                          c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(memcpy_P.o)
+                                                  obj-m1284p/pcf8583.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/d64ops.o
+memset                                            c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(memset.o)
+                                                  obj-m1284p/m2iops.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/ff.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/eeprom.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/d64ops.o
+mount_drv                                         obj-m1284p/ff.o
+next_match                                        obj-m1284p/parser.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/doscmd.o
+original_length                                   obj-m1284p/doscmd.o
+parse_date                                        obj-m1284p/parser.o
+                                                  obj-m1284p/fileops.o
+parse_doscommand                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/iec.o
+parse_error                                       obj-m1284p/fatops.o
+                                                  obj-m1284p/diskchange.o
+parse_number                                      obj-m1284p/parser.o
+                                                  obj-m1284p/doscmd.o
+parse_partition                                   obj-m1284p/parser.o
+                                                  obj-m1284p/doscmd.o
+parse_path                                        obj-m1284p/parser.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/diskchange.o
+partition                                         obj-m1284p/parser.o
+                                                  obj-m1284p/m2iops.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/display.o
+                                                  obj-m1284p/diskchange.o
+                                                  obj-m1284p/d64ops.o
+read_configuration                                obj-m1284p/eeprom.o
+                                                  obj-m1284p/main.o
+read_rtc                                          obj-m1284p/pcf8583.o
+                                                  obj-m1284p/rtc.o
+                                                  obj-m1284p/doscmd.o
+rom_filename                                      obj-m1284p/errormsg.o
+                                                  obj-m1284p/eeprom.o
+                                                  obj-m1284p/doscmd.o
+rtc_init                                          obj-m1284p/pcf8583.o
+                                                  obj-m1284p/main.o
+rtc_state                                         obj-m1284p/pcf8583.o
+                                                  obj-m1284p/doscmd.o
+save_ar6_1581                                     obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+save_fc3                                          obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+sd_getinfo                                        obj-m1284p/sdcard.o
+sd_init                                           obj-m1284p/sdcard.o
+sd_initialize                                     obj-m1284p/sdcard.o
+sd_read                                           obj-m1284p/sdcard.o
+sd_status                                         obj-m1284p/sdcard.o
+sd_write                                          obj-m1284p/sdcard.o
+set_changelist                                    obj-m1284p/diskchange.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/doscmd.o
+set_error                                         obj-m1284p/errormsg.o
+                                                  obj-m1284p/parser.o
+                                                  obj-m1284p/m2iops.o
+                                                  obj-m1284p/iec.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/diskchange.o
+                                                  obj-m1284p/d64ops.o
+                                                  obj-m1284p/buffers.o
+set_error_ts                                      obj-m1284p/errormsg.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/d64ops.o
+set_ok_message                                    obj-m1284p/errormsg.o
+                                                  obj-m1284p/buffers.o
+set_rtc                                           obj-m1284p/pcf8583.o
+                                                  obj-m1284p/doscmd.o
+spiInit                                           obj-m1284p/spi.o
+                                                  obj-m1284p/sdcard.o
+spiTransferByte                                   obj-m1284p/spi.o
+                                                  obj-m1284p/sdcard.o
+spiTransferLong                                   obj-m1284p/spi.o
+                                                  obj-m1284p/sdcard.o
+strchr                                            c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(strchr.o)
+                                                  obj-m1284p/parser.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/doscmd.o
+strcmp_P                                          c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(strcmp_P.o)
+                                                  obj-m1284p/fatops.o
+strcpy                                            c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(strcpy.o)
+                                                  obj-m1284p/m2iops.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/errormsg.o
+                                                  obj-m1284p/doscmd.o
+strcpy_P                                          c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(strcpy_P.o)
+                                                  obj-m1284p/main.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/fastloader.o
+                                                  obj-m1284p/display.o
+                                                  obj-m1284p/diskchange.o
+strncpy                                           c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(strncpy.o)
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/doscmd.o
+strrchr                                           c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(strrchr.o)
+                                                  obj-m1284p/fatops.o
+syspart_line                                      obj-m1284p/fileops.o
+ticks                                             obj-m1284p/timer.o
+                                                  obj-m1284p/sdcard.o
+                                                  obj-m1284p/fastloader.o
+                                                  obj-m1284p/diskchange.o
+timer_init                                        obj-m1284p/timer.o
+                                                  obj-m1284p/main.o
+toupper                                           c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr51\libc.a(toupper.o)
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/errormsg.o
+turbodisk_buffer                                  obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/fastloader.o
+turbodisk_byte                                    obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/fastloader.o
+uload3_get_byte                                   obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/fastloader.o
+uload3_send_byte                                  obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/fastloader.o
+update_current_dir                                obj-m1284p/parser.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/display.o
+                                                  obj-m1284p/diskchange.o
+update_leds                                       obj-m1284p/led.o
+                                                  obj-m1284p/m2iops.o
+                                                  obj-m1284p/iec.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/errormsg.o
+                                                  obj-m1284p/buffers.o
+ustr1tok                                          obj-m1284p/utils.o
+                                                  obj-m1284p/doscmd.o
+versionstr                                        obj-m1284p/errormsg.o
+                                                  obj-m1284p/main.o
+wheels44_get_byte_1mhz                            obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/doscmd.o
+wheels44_get_byte_2mhz                            obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/doscmd.o
+wheels44_send_byte_2mhz                           obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/doscmd.o
+wheels_get_byte_1mhz                              obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/doscmd.o
+wheels_send_byte_1mhz                             obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/doscmd.o
+write_configuration                               obj-m1284p/eeprom.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/display.o
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/autoconf.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/autoconf.h
new file mode 100644
index 00000000..4841f691
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/autoconf.h
@@ -0,0 +1,64 @@
+// autoconf.h generated from config at Mon Oct 05 12:02:40  2015
+#ifndef AUTOCONF_H
+#define AUTOCONF_H
+// This may not look like it, but it's a -*- makefile -*-
+//
+// sd2iec - SD/MMC to Commodore serial bus interface/controller
+// Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+//
+// Inspiration and low-level SD/MMC access based on code from MMC2IEC
+//   by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+//
+//  FAT filesystem access based on code from ChaN, see tff.c|h.
+//
+//  This program is free software; you can redistribute it and/or modify
+//  it under the terms of the GNU General Public License as published by
+//  the Free Software Foundation; version 2 of the License only.
+//
+//  This program is distributed in the hope that it will be useful,
+//  but WITHOUT ANY WARRANTY; without even the implied warranty of
+//  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+//  GNU General Public License for more details.
+//
+//  You should have received a copy of the GNU General Public License
+//  along with this program; if not, write to the Free Software
+//  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+//
+//  config-sw2: sd2iec configuration for Shadowolf's sd2iec PCBs
+//              version 1.x
+//
+//
+// This file is included in the main sd2iec Makefile and also parsed
+// into autoconf.h.
+
+#define CONFIG_MCU atmega1284p
+#define CONFIG_LINKER_RELAX
+#define CONFIG_MCU_FREQ 8000000
+#define CONFIG_BOOTLOADER
+#define CONFIG_BOOT_DEVID 0x31434549
+#define CONFIG_COMMAND_CHANNEL_DUMP
+#define CONFIG_LOADER_TURBODISK
+#define CONFIG_LOADER_FC3
+#define CONFIG_LOADER_DREAMLOAD
+#define CONFIG_LOADER_ULOAD3
+#define CONFIG_LOADER_GIJOE
+#define CONFIG_LOADER_EPYXCART
+#define CONFIG_LOADER_GEOS
+#define CONFIG_LOADER_WHEELS
+#define CONFIG_LOADER_NIPPON
+#define CONFIG_LOADER_AR6
+#define CONFIG_LOADER_ELOAD1
+#define CONFIG_HARDWARE_VARIANT 5
+#define CONFIG_HARDWARE_NAME sd2iec-sw2
+#define CONFIG_SD_AUTO_RETRIES 10
+#define CONFIG_SD_DATACRC
+#define CONFIG_ERROR_BUFFER_SIZE 46
+#define CONFIG_COMMAND_BUFFER_SIZE 120
+#define CONFIG_BUFFER_COUNT 6
+#define CONFIG_EEPROM_SIZE 512
+#define CONFIG_EEPROM_OFFSET 512
+#define CONFIG_MAX_PARTITIONS 4
+#define CONFIG_RTC_VARIANT 2
+#define CONFIG_REMOTE_DISPLAY
+#define CONFIG_DISPLAY_BUFFER_SIZE 40
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/crc7asm.lst b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/crc7asm.lst
new file mode 100644
index 00000000..e08ff5d0
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/crc7asm.lst
@@ -0,0 +1,58 @@
+   1               	# 1 "crc7asm.S"
+   1               	/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   0               	
+   2               	   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+   3               	
+   4               	   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+   5               	     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+   6               	
+   7               	   FAT filesystem access based on code from ChaN, see tff.c|h.
+   8               	
+   9               	   This program is free software; you can redistribute it and/or modify
+  10               	   it under the terms of the GNU General Public License as published by
+  11               	   the Free Software Foundation; version 2 of the License only.
+  12               	
+  13               	   This program is distributed in the hope that it will be useful,
+  14               	   but WITHOUT ANY WARRANTY; without even the implied warranty of
+  15               	   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  16               	   GNU General Public License for more details.
+  17               	
+  18               	   You should have received a copy of the GNU General Public License
+  19               	   along with this program; if not, write to the Free Software
+  20               	   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+  21               	
+  22               	
+  23               	   crc7asm.S: space-efficient CRC7 implementation for AVR
+  24               	
+  25               	*/
+  26               	
+  27               	        .section .text
+  28               	
+  29               	        .global crc7update
+  30               	        ;; uint8_t crc7update(uint8_t crc, uint8_t data)
+  31               	        ;;
+  32               	        ;; input : r24: crc, r22: data
+  33               	        ;; output: r24: new crc
+  34               	crc7update:
+  35:crc7asm.S     ****         ldi     r18, 8       ; number of bits to process
+  36:crc7asm.S     ****         ldi     r19, 0x09    ; CRC7 polynomial
+  37:crc7asm.S     ****         ldi     r20, 0x80    ; constant for inverting the top bit of the CRC
+  38               	
+  39:crc7asm.S     **** loop:   lsl     r24          ; shift CRC
+  40:crc7asm.S     ****         lsl     r22          ; shift data byte
+  41:crc7asm.S     ****         brcc    0f           ; jump if top data bit was 0
+  42:crc7asm.S     ****         eor     r24, r20     ; invert top bit of CRC if not
+  43:crc7asm.S     **** 0:      bst     r24, 7       ; read top bit of CRC
+  44:crc7asm.S     ****         brtc    1f           ; skip if top bit of CRC is now clear
+  45:crc7asm.S     ****         eor     r24, r19     ; apply polynomial
+  46:crc7asm.S     **** 1:      dec     r18          ; decrement bit counter
+  47:crc7asm.S     ****         brne    loop         ; loop for next bit
+  48:crc7asm.S     ****         andi    r24, 0x7f    ; clear top bit of CRC
+  49:crc7asm.S     ****         ret                  ; return
+  50               	
+  51               	        .end
+DEFINED SYMBOLS
+           crc7asm.S:34     .text:00000000 crc7update
+           crc7asm.S:39     .text:00000006 loop
+
+NO UNDEFINED SYMBOLS
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/fastloader-ll.lst b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/fastloader-ll.lst
new file mode 100644
index 00000000..ffa04dfd
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/fastloader-ll.lst
@@ -0,0 +1,2383 @@
+   1               	# 1 "fastloader-ll.S"
+   1               	/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   0               	
+   2               	   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+   3               	   Copyright (C) 2007-2008  M.Kiesel <mayne@users.sourceforge.net>
+   4               	   Final Cartridge III, DreamLoad fastloader support:
+   5               	   Copyright (C) 2008  Thomas Giesel <skoe@directbox.com>
+   6               	
+   7               	   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+   8               	     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+   9               	
+  10               	   FAT filesystem access based on code from ChaN, see tff.c|h.
+  11               	
+  12               	   This program is free software; you can redistribute it and/or modify
+  13               	   it under the terms of the GNU General Public License as published by
+  14               	   the Free Software Foundation; version 2 of the License only.
+  15               	
+  16               	   This program is distributed in the hope that it will be useful,
+  17               	   but WITHOUT ANY WARRANTY; without even the implied warranty of
+  18               	   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  19               	   GNU General Public License for more details.
+  20               	
+  21               	   You should have received a copy of the GNU General Public License
+  22               	   along with this program; if not, write to the Free Software
+  23               	   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+  24               	
+  25               	
+  26               	   fastloader.S: Low level fastloader transfer routines.
+  27               	
+  28               	   Thanks to Jochen Adler for his Jiffy docs at http://www.nlq.de/
+  29               	
+  30               	*/
+  31               	
+  32               	
+  33               	#include "config.h"
+   1               	/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   2               	   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+   3               	
+   4               	   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+   5               	     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+   6               	
+   7               	   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+   8               	
+   9               	   This program is free software; you can redistribute it and/or modify
+  10               	   it under the terms of the GNU General Public License as published by
+  11               	   the Free Software Foundation; version 2 of the License only.
+  12               	
+  13               	   This program is distributed in the hope that it will be useful,
+  14               	   but WITHOUT ANY WARRANTY; without even the implied warranty of
+  15               	   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  16               	   GNU General Public License for more details.
+  17               	
+  18               	   You should have received a copy of the GNU General Public License
+  19               	   along with this program; if not, write to the Free Software
+  20               	   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+  21               	
+  22               	
+  23               	   config.h: User-configurable options to simplify hardware changes and/or
+  24               	             reduce the code/ram requirements of the code.
+  25               	
+  26               	
+  27               	   Based on MMC2IEC, original copyright header follows:
+  28               	
+  29               	//
+  30               	// Title        : MMC2IEC - Configuration
+  31               	// Author       : Lars Pontoppidan
+  32               	// Date         : Jan. 2007
+  33               	// Version      : 0.7
+  34               	// Target MCU   : AtMega32(L) at 8 MHz
+  35               	//
+  36               	//
+  37               	// DISCLAIMER:
+  38               	// The author is in no way responsible for any problems or damage caused by
+  39               	// using this code. Use at your own risk.
+  40               	//
+  41               	// LICENSE:
+  42               	// This code is distributed under the GNU Public License
+  43               	// which can be found at http://www.gnu.org/licenses/gpl.txt
+  44               	//
+  45               	
+  46               	*/
+  47               	
+  48               	#ifndef CONFIG_H
+  49               	#define CONFIG_H
+  50               	
+  51               	#include "autoconf.h"
+   1               	// autoconf.h generated from config at Mon Oct 05 12:02:40  2015
+  52               	
+  53               	/* Include avrcompat.h to get the PA0..PD7 macros on 1284P */
+  54               	#include "avrcompat.h"
+   1               	/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+  55               	
+  34               	#include "fastloader.h"
+   1               	/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+  35               	#include <avr/io.h>
+   1               	/* Copyright (c) 2002,2003,2005,2006,2007 Marek Michalkiewicz, Joerg Wunsch
+   2               	   Copyright (c) 2007 Eric B. Weddington
+   3               	   All rights reserved.
+   4               	
+   5               	   Redistribution and use in source and binary forms, with or without
+   6               	   modification, are permitted provided that the following conditions are met:
+   7               	
+   8               	   * Redistributions of source code must retain the above copyright
+   9               	     notice, this list of conditions and the following disclaimer.
+  10               	
+  11               	   * Redistributions in binary form must reproduce the above copyright
+  12               	     notice, this list of conditions and the following disclaimer in
+  13               	     the documentation and/or other materials provided with the
+  14               	     distribution.
+  15               	
+  16               	   * Neither the name of the copyright holders nor the names of
+  17               	     contributors may be used to endorse or promote products derived
+  18               	     from this software without specific prior written permission.
+  19               	
+  20               	  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  21               	  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  22               	  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  23               	  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  24               	  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  25               	  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  26               	  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  27               	  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  28               	  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  29               	  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+  30               	  POSSIBILITY OF SUCH DAMAGE. */
+  31               	
+  32               	/* $Id$ */
+  33               	
+  34               	/** \file */
+  35               	/** \defgroup avr_io <avr/io.h>: AVR device-specific IO definitions
+  36               	    \code #include <avr/io.h> \endcode
+  37               	
+  38               	    This header file includes the apropriate IO definitions for the
+  39               	    device that has been specified by the <tt>-mmcu=</tt> compiler
+  40               	    command-line switch.  This is done by diverting to the appropriate
+  41               	    file <tt>&lt;avr/io</tt><em>XXXX</em><tt>.h&gt;</tt> which should
+  42               	    never be included directly.  Some register names common to all
+  43               	    AVR devices are defined directly within <tt>&lt;avr/common.h&gt;</tt>,
+  44               	    which is included in <tt>&lt;avr/io.h&gt;</tt>,
+  45               	    but most of the details come from the respective include file.
+  46               	
+  47               	    Note that this file always includes the following files:
+  48               	    \code 
+  49               	    #include <avr/sfr_defs.h>
+  50               	    #include <avr/portpins.h>
+  51               	    #include <avr/common.h>
+  52               	    #include <avr/version.h>
+  53               	    \endcode
+  54               	    See \ref avr_sfr for more details about that header file.
+  55               	
+  56               	    Included are definitions of the IO register set and their
+  57               	    respective bit values as specified in the Atmel documentation.
+  58               	    Note that inconsistencies in naming conventions,
+  59               	    so even identical functions sometimes get different names on
+  60               	    different devices.
+  61               	
+  62               	    Also included are the specific names useable for interrupt
+  63               	    function definitions as documented
+  64               	    \ref avr_signames "here".
+  65               	
+  66               	    Finally, the following macros are defined:
+  67               	
+  68               	    - \b RAMEND
+  69               	    <br>
+  70               	    The last on-chip RAM address.
+  71               	    <br>
+  72               	    - \b XRAMEND
+  73               	    <br>
+  74               	    The last possible RAM location that is addressable. This is equal to 
+  75               	    RAMEND for devices that do not allow for external RAM. For devices 
+  76               	    that allow external RAM, this will be larger than RAMEND.
+  77               	    <br>
+  78               	    - \b E2END
+  79               	    <br>
+  80               	    The last EEPROM address.
+  81               	    <br>
+  82               	    - \b FLASHEND
+  83               	    <br>
+  84               	    The last byte address in the Flash program space.
+  85               	    <br>
+  86               	    - \b SPM_PAGESIZE
+  87               	    <br>
+  88               	    For devices with bootloader support, the flash pagesize
+  89               	    (in bytes) to be used for the \c SPM instruction. 
+  90               	    - \b E2PAGESIZE
+  91               	    <br>
+  92               	    The size of the EEPROM page.
+  93               	    
+  94               	*/
+  95               	
+  96               	#ifndef _AVR_IO_H_
+  97               	#define _AVR_IO_H_
+  98               	
+  99               	#include <avr/sfr_defs.h>
+   1               	/* Copyright (c) 2002, Marek Michalkiewicz <marekm@amelek.gda.pl>
+ 100               	
+ 101               	#if defined (__AVR_AT94K__)
+ 102               	#  include <avr/ioat94k.h>
+ 103               	#elif defined (__AVR_AT43USB320__)
+ 104               	#  include <avr/io43u32x.h>
+ 105               	#elif defined (__AVR_AT43USB355__)
+ 106               	#  include <avr/io43u35x.h>
+ 107               	#elif defined (__AVR_AT76C711__)
+ 108               	#  include <avr/io76c711.h>
+ 109               	#elif defined (__AVR_AT86RF401__)
+ 110               	#  include <avr/io86r401.h>
+ 111               	#elif defined (__AVR_AT90PWM1__)
+ 112               	#  include <avr/io90pwm1.h>
+ 113               	#elif defined (__AVR_AT90PWM2__)
+ 114               	#  include <avr/io90pwmx.h>
+ 115               	#elif defined (__AVR_AT90PWM2B__)
+ 116               	#  include <avr/io90pwm2b.h>
+ 117               	#elif defined (__AVR_AT90PWM3__)
+ 118               	#  include <avr/io90pwmx.h>
+ 119               	#elif defined (__AVR_AT90PWM3B__)
+ 120               	#  include <avr/io90pwm3b.h>
+ 121               	#elif defined (__AVR_AT90PWM216__)
+ 122               	#  include <avr/io90pwm216.h>
+ 123               	#elif defined (__AVR_AT90PWM316__)
+ 124               	#  include <avr/io90pwm316.h>
+ 125               	#elif defined (__AVR_AT90PWM161__)
+ 126               	#  include <avr/io90pwm161.h>
+ 127               	#elif defined (__AVR_AT90PWM81__)
+ 128               	#  include <avr/io90pwm81.h>
+ 129               	#elif defined (__AVR_ATmega8U2__)
+ 130               	#  include <avr/iom8u2.h>
+ 131               	#elif defined (__AVR_ATmega16M1__)
+ 132               	#  include <avr/iom16m1.h>
+ 133               	#elif defined (__AVR_ATmega16U2__)
+ 134               	#  include <avr/iom16u2.h>
+ 135               	#elif defined (__AVR_ATmega16U4__)
+ 136               	#  include <avr/iom16u4.h>
+ 137               	#elif defined (__AVR_ATmega32C1__)
+ 138               	#  include <avr/iom32c1.h>
+ 139               	#elif defined (__AVR_ATmega32M1__)
+ 140               	#  include <avr/iom32m1.h>
+ 141               	#elif defined (__AVR_ATmega32U2__)
+ 142               	#  include <avr/iom32u2.h>
+ 143               	#elif defined (__AVR_ATmega32U4__)
+ 144               	#  include <avr/iom32u4.h>
+ 145               	#elif defined (__AVR_ATmega32U6__)
+ 146               	#  include <avr/iom32u6.h>
+ 147               	#elif defined (__AVR_ATmega64C1__)
+ 148               	#  include <avr/iom64c1.h>
+ 149               	#elif defined (__AVR_ATmega64M1__)
+ 150               	#  include <avr/iom64m1.h>
+ 151               	#elif defined (__AVR_ATmega128__)
+ 152               	#  include <avr/iom128.h>
+ 153               	#elif defined (__AVR_ATmega128A__)
+ 154               	#  include <avr/iom128a.h>
+ 155               	#elif defined (__AVR_ATmega1280__)
+ 156               	#  include <avr/iom1280.h>
+ 157               	#elif defined (__AVR_ATmega1281__)
+ 158               	#  include <avr/iom1281.h>
+ 159               	#elif defined (__AVR_ATmega1284__)
+ 160               	#  include <avr/iom1284.h>
+ 161               	#elif defined (__AVR_ATmega1284P__)
+ 162               	#  include <avr/iom1284p.h>
+   1               	/* Copyright (c) 2007 Atmel Corporation
+ 163               	#elif defined (__AVR_ATmega128RFA1__)
+ 164               	#  include <avr/iom128rfa1.h>
+ 165               	#elif defined (__AVR_ATmega128RFR2__)
+ 166               	#  include <avr/iom128rfr2.h>
+ 167               	#elif defined (__AVR_ATmega1284RFR2__)
+ 168               	#  include <avr/iom1284rfr2.h>
+ 169               	#elif defined (__AVR_ATmega256RFR2__)
+ 170               	#  include <avr/iom256rfr2.h>
+ 171               	#elif defined (__AVR_ATmega2564RFR2__)
+ 172               	#  include <avr/iom2564rfr2.h>
+ 173               	#elif defined (__AVR_ATmega2560__)
+ 174               	#  include <avr/iom2560.h>
+ 175               	#elif defined (__AVR_ATmega2561__)
+ 176               	#  include <avr/iom2561.h>
+ 177               	#elif defined (__AVR_AT90CAN32__)
+ 178               	#  include <avr/iocan32.h>
+ 179               	#elif defined (__AVR_AT90CAN64__)
+ 180               	#  include <avr/iocan64.h>
+ 181               	#elif defined (__AVR_AT90CAN128__)
+ 182               	#  include <avr/iocan128.h>
+ 183               	#elif defined (__AVR_AT90USB82__)
+ 184               	#  include <avr/iousb82.h>
+ 185               	#elif defined (__AVR_AT90USB162__)
+ 186               	#  include <avr/iousb162.h>
+ 187               	#elif defined (__AVR_AT90USB646__)
+ 188               	#  include <avr/iousb646.h>
+ 189               	#elif defined (__AVR_AT90USB647__)
+ 190               	#  include <avr/iousb647.h>
+ 191               	#elif defined (__AVR_AT90USB1286__)
+ 192               	#  include <avr/iousb1286.h>
+ 193               	#elif defined (__AVR_AT90USB1287__)
+ 194               	#  include <avr/iousb1287.h>
+ 195               	#elif defined (__AVR_ATmega64RFR2__)
+ 196               	#  include <avr/iom64rfr2.h>
+ 197               	#elif defined (__AVR_ATmega644RFR2__)
+ 198               	#  include <avr/iom644rfr2.h>
+ 199               	#elif defined (__AVR_ATmega64__)
+ 200               	#  include <avr/iom64.h>
+ 201               	#elif defined (__AVR_ATmega64A__)
+ 202               	#  include <avr/iom64a.h>
+ 203               	#elif defined (__AVR_ATmega640__)
+ 204               	#  include <avr/iom640.h>
+ 205               	#elif defined (__AVR_ATmega644__) 
+ 206               	#  include <avr/iom644.h>
+ 207               	#elif (defined __AVR_ATmega644A__)
+ 208               	#include <avr/iom644a.h>
+ 209               	#elif defined (__AVR_ATmega644P__)
+ 210               	#  include <avr/iom644p.h>
+ 211               	#elif defined (__AVR_ATmega644PA__)
+ 212               	#  include <avr/iom644pa.h>
+ 213               	#elif defined (__AVR_ATmega645__)
+ 214               	#  include <avr/iom645.h>
+ 215               	#elif (defined __AVR_ATmega645A__)
+ 216               	#include <avr/iom645a.h>
+ 217               	#elif (defined __AVR_ATmega645P__)
+ 218               	#include <avr/iom645p.h>
+ 219               	#elif defined (__AVR_ATmega6450__)
+ 220               	#  include <avr/iom6450.h>
+ 221               	#elif (defined __AVR_ATmega6450A__)
+ 222               	#include <avr/iom6450a.h>
+ 223               	#elif (defined __AVR_ATmega6450P__)
+ 224               	#include <avr/iom6450p.h>
+ 225               	#elif defined (__AVR_ATmega649__)
+ 226               	#  include <avr/iom649.h>
+ 227               	#elif (defined __AVR_ATmega649A__)
+ 228               	#include <avr/iom649a.h>
+ 229               	#elif defined (__AVR_ATmega6490__)
+ 230               	#  include <avr/iom6490.h>
+ 231               	#elif (defined __AVR_ATmega6490A__)
+ 232               	#include <avr/iom6490a.h>
+ 233               	#elif (defined __AVR_ATmega6490P__)
+ 234               	#include <avr/iom6490p.h>
+ 235               	#elif defined (__AVR_ATmega649P__)
+ 236               	#  include <avr/iom649p.h>
+ 237               	#elif defined (__AVR_ATmega64HVE__)
+ 238               	#  include <avr/iom64hve.h>
+ 239               	#elif defined (__AVR_ATmega64HVE2__)
+ 240               	#  include <avr/iom64hve2.h>
+ 241               	#elif defined (__AVR_ATmega103__)
+ 242               	#  include <avr/iom103.h>
+ 243               	#elif defined (__AVR_ATmega32__)
+ 244               	#  include <avr/iom32.h>
+ 245               	#elif defined (__AVR_ATmega32A__)
+ 246               	#  include <avr/iom32a.h>
+ 247               	#elif defined (__AVR_ATmega323__)
+ 248               	#  include <avr/iom323.h>
+ 249               	#elif defined (__AVR_ATmega324P__)
+ 250               	#  include <avr/iom324p.h>
+ 251               	#elif (defined __AVR_ATmega324A__)
+ 252               	#include <avr/iom324a.h>
+ 253               	#elif defined (__AVR_ATmega324PA__)
+ 254               	#  include <avr/iom324pa.h>
+ 255               	#elif defined (__AVR_ATmega325__)
+ 256               	#  include <avr/iom325.h>
+ 257               	#elif (defined __AVR_ATmega325A__)
+ 258               	#include <avr/iom325a.h>
+ 259               	#elif defined (__AVR_ATmega325P__)
+ 260               	#  include <avr/iom325p.h>
+ 261               	#elif defined (__AVR_ATmega325PA__)
+ 262               	#  include <avr/iom325pa.h>  
+ 263               	#elif defined (__AVR_ATmega3250__) 
+ 264               	#  include <avr/iom3250.h>
+ 265               	#elif (defined __AVR_ATmega3250A__)
+ 266               	#include <avr/iom3250a.h>
+ 267               	#elif defined (__AVR_ATmega3250P__)
+ 268               	#  include <avr/iom3250p.h>
+ 269               	#elif defined (__AVR_ATmega3250PA__)
+ 270               	#  include <avr/iom3250pa.h>  
+ 271               	#elif defined (__AVR_ATmega328P__)
+ 272               	#  include <avr/iom328p.h>
+ 273               	#elif (defined __AVR_ATmega328__)
+ 274               	#include <avr/iom328.h>
+ 275               	#elif defined (__AVR_ATmega329__)
+ 276               	#  include <avr/iom329.h>
+ 277               	#elif (defined __AVR_ATmega329A__)
+ 278               	#include <avr/iom329a.h>
+ 279               	#elif defined (__AVR_ATmega329P__) 
+ 280               	#  include <avr/iom329p.h>
+ 281               	#elif (defined __AVR_ATmega329PA__)
+ 282               	#include <avr/iom329pa.h>
+ 283               	#elif (defined __AVR_ATmega3290PA__)
+ 284               	#include <avr/iom3290pa.h>
+ 285               	#elif defined (__AVR_ATmega3290__)
+ 286               	#  include <avr/iom3290.h>
+ 287               	#elif (defined __AVR_ATmega3290A__)
+ 288               	#include <avr/iom3290a.h>
+ 289               	#elif defined (__AVR_ATmega3290P__)
+ 290               	#  include <avr/iom3290.h>
+ 291               	#elif defined (__AVR_ATmega32HVB__)
+ 292               	#  include <avr/iom32hvb.h>
+ 293               	#elif defined (__AVR_ATmega32HVBREVB__)
+ 294               	#  include <avr/iom32hvbrevb.h>
+ 295               	#elif defined (__AVR_ATmega406__)
+ 296               	#  include <avr/iom406.h>
+ 297               	#elif defined (__AVR_ATmega16__)
+ 298               	#  include <avr/iom16.h>
+ 299               	#elif defined (__AVR_ATmega16A__)
+ 300               	#  include <avr/iom16a.h>
+ 301               	#elif defined (__AVR_ATmega161__)
+ 302               	#  include <avr/iom161.h>
+ 303               	#elif defined (__AVR_ATmega162__)
+ 304               	#  include <avr/iom162.h>
+ 305               	#elif defined (__AVR_ATmega163__)
+ 306               	#  include <avr/iom163.h>
+ 307               	#elif defined (__AVR_ATmega164P__)
+ 308               	#  include <avr/iom164p.h>
+ 309               	#elif (defined __AVR_ATmega164A__)
+ 310               	#include <avr/iom164a.h>
+ 311               	#elif defined (__AVR_ATmega164PA__)
+ 312               	#  include <avr/iom164pa.h>
+ 313               	#elif defined (__AVR_ATmega165__)
+ 314               	#  include <avr/iom165.h>
+ 315               	#elif (defined __AVR_ATmega165A__)
+ 316               	#include <avr/iom165a.h>
+ 317               	#elif defined (__AVR_ATmega165P__)
+ 318               	#  include <avr/iom165p.h>
+ 319               	#elif defined (__AVR_ATmega165PA__)
+ 320               	#  include <avr/iom165pa.h>
+ 321               	#elif defined (__AVR_ATmega168__)
+ 322               	#  include <avr/iom168.h>
+ 323               	#elif (defined __AVR_ATmega168A__)
+ 324               	#include <avr/iom168a.h>
+ 325               	#elif defined (__AVR_ATmega168P__)
+ 326               	#  include <avr/iom168p.h>
+ 327               	#elif defined (__AVR_ATmega168PA__)
+ 328               	#  include <avr/iom168pa.h>
+ 329               	#elif defined (__AVR_ATmega168PB__)
+ 330               	#  include <avr/iom168pb.h>
+ 331               	#elif defined (__AVR_ATmega169__)
+ 332               	#  include <avr/iom169.h>
+ 333               	#elif (defined __AVR_ATmega169A__)
+ 334               	#include <avr/iom169a.h>
+ 335               	#elif defined (__AVR_ATmega169P__)
+ 336               	#  include <avr/iom169p.h>
+ 337               	#elif defined (__AVR_ATmega169PA__)
+ 338               	#  include <avr/iom169pa.h>
+ 339               	#elif defined (__AVR_ATmega8HVA__)
+ 340               	#  include <avr/iom8hva.h>
+ 341               	#elif defined (__AVR_ATmega16HVA__)
+ 342               	#  include <avr/iom16hva.h>
+ 343               	#elif defined (__AVR_ATmega16HVA2__)
+ 344               	#  include <avr/iom16hva2.h>
+ 345               	#elif defined (__AVR_ATmega16HVB__)
+ 346               	#  include <avr/iom16hvb.h>
+ 347               	#elif defined (__AVR_ATmega16HVBREVB__)
+ 348               	#  include <avr/iom16hvbrevb.h>
+ 349               	#elif defined (__AVR_ATmega8__)
+ 350               	#  include <avr/iom8.h>
+ 351               	#elif defined (__AVR_ATmega8A__)
+ 352               	#  include <avr/iom8a.h>
+ 353               	#elif (defined __AVR_ATmega48A__)
+ 354               	#  include <avr/iom48a.h>
+ 355               	#elif defined (__AVR_ATmega48__)
+ 356               	#  include <avr/iom48.h>
+ 357               	#elif defined (__AVR_ATmega48PA__)
+ 358               	#  include <avr/iom48pa.h>
+ 359               	#elif defined (__AVR_ATmega48PB__)
+ 360               	#  include <avr/iom48pb.h>
+ 361               	#elif defined (__AVR_ATmega48P__)
+ 362               	#  include <avr/iom48p.h>
+ 363               	#elif defined (__AVR_ATmega88__)
+ 364               	#  include <avr/iom88.h>
+ 365               	#elif (defined __AVR_ATmega88A__)
+ 366               	#  include <avr/iom88a.h>
+ 367               	#elif defined (__AVR_ATmega88P__)
+ 368               	#  include <avr/iom88p.h>
+ 369               	#elif defined (__AVR_ATmega88PA__)
+ 370               	#  include <avr/iom88pa.h>
+ 371               	#elif defined (__AVR_ATmega88PB__)
+ 372               	#  include <avr/iom88pb.h>
+ 373               	#elif defined (__AVR_ATmega8515__)
+ 374               	#  include <avr/iom8515.h>
+ 375               	#elif defined (__AVR_ATmega8535__)
+ 376               	#  include <avr/iom8535.h>
+ 377               	#elif defined (__AVR_AT90S8535__)
+ 378               	#  include <avr/io8535.h>
+ 379               	#elif defined (__AVR_AT90C8534__)
+ 380               	#  include <avr/io8534.h>
+ 381               	#elif defined (__AVR_AT90S8515__)
+ 382               	#  include <avr/io8515.h>
+ 383               	#elif defined (__AVR_AT90S4434__)
+ 384               	#  include <avr/io4434.h>
+ 385               	#elif defined (__AVR_AT90S4433__)
+ 386               	#  include <avr/io4433.h>
+ 387               	#elif defined (__AVR_AT90S4414__)
+ 388               	#  include <avr/io4414.h>
+ 389               	#elif defined (__AVR_ATtiny22__)
+ 390               	#  include <avr/iotn22.h>
+ 391               	#elif defined (__AVR_ATtiny26__)
+ 392               	#  include <avr/iotn26.h>
+ 393               	#elif defined (__AVR_AT90S2343__)
+ 394               	#  include <avr/io2343.h>
+ 395               	#elif defined (__AVR_AT90S2333__)
+ 396               	#  include <avr/io2333.h>
+ 397               	#elif defined (__AVR_AT90S2323__)
+ 398               	#  include <avr/io2323.h>
+ 399               	#elif defined (__AVR_AT90S2313__)
+ 400               	#  include <avr/io2313.h>
+ 401               	#elif defined (__AVR_ATtiny4__)
+ 402               	#  include <avr/iotn4.h>
+ 403               	#elif defined (__AVR_ATtiny5__)
+ 404               	#  include <avr/iotn5.h>
+ 405               	#elif defined (__AVR_ATtiny9__)
+ 406               	#  include <avr/iotn9.h>
+ 407               	#elif defined (__AVR_ATtiny10__)
+ 408               	#  include <avr/iotn10.h>
+ 409               	#elif defined (__AVR_ATtiny20__)
+ 410               	#  include <avr/iotn20.h>
+ 411               	#elif defined (__AVR_ATtiny40__)
+ 412               	#  include <avr/iotn40.h>
+ 413               	#elif defined (__AVR_ATtiny2313__)
+ 414               	#  include <avr/iotn2313.h>
+ 415               	#elif defined (__AVR_ATtiny2313A__)
+ 416               	#  include <avr/iotn2313a.h>
+ 417               	#elif defined (__AVR_ATtiny13__)
+ 418               	#  include <avr/iotn13.h>
+ 419               	#elif defined (__AVR_ATtiny13A__)
+ 420               	#  include <avr/iotn13a.h>
+ 421               	#elif defined (__AVR_ATtiny25__)
+ 422               	#  include <avr/iotn25.h>
+ 423               	#elif defined (__AVR_ATtiny4313__)
+ 424               	#  include <avr/iotn4313.h>
+ 425               	#elif defined (__AVR_ATtiny45__)
+ 426               	#  include <avr/iotn45.h>
+ 427               	#elif defined (__AVR_ATtiny85__)
+ 428               	#  include <avr/iotn85.h>
+ 429               	#elif defined (__AVR_ATtiny24__)
+ 430               	#  include <avr/iotn24.h>
+ 431               	#elif defined (__AVR_ATtiny24A__)
+ 432               	#  include <avr/iotn24a.h>
+ 433               	#elif defined (__AVR_ATtiny44__)
+ 434               	#  include <avr/iotn44.h>
+ 435               	#elif defined (__AVR_ATtiny44A__)
+ 436               	#  include <avr/iotn44a.h>
+ 437               	#elif defined (__AVR_ATtiny441__)
+ 438               	#  include <avr/iotn441.h>
+ 439               	#elif defined (__AVR_ATtiny84__)
+ 440               	#  include <avr/iotn84.h>
+ 441               	#elif defined (__AVR_ATtiny84A__)
+ 442               	#  include <avr/iotn84a.h>  
+ 443               	#elif defined (__AVR_ATtiny841__)
+ 444               	#  include <avr/iotn841.h>
+ 445               	#elif defined (__AVR_ATtiny261__)
+ 446               	#  include <avr/iotn261.h>
+ 447               	#elif defined (__AVR_ATtiny261A__)
+ 448               	#  include <avr/iotn261a.h>
+ 449               	#elif defined (__AVR_ATtiny461__)
+ 450               	#  include <avr/iotn461.h>
+ 451               	#elif defined (__AVR_ATtiny461A__)
+ 452               	#  include <avr/iotn461a.h>
+ 453               	#elif defined (__AVR_ATtiny861__)
+ 454               	#  include <avr/iotn861.h>
+ 455               	#elif defined (__AVR_ATtiny861A__)
+ 456               	#  include <avr/iotn861a.h>
+ 457               	#elif defined (__AVR_ATtiny43U__)
+ 458               	#  include <avr/iotn43u.h>
+ 459               	#elif defined (__AVR_ATtiny48__)
+ 460               	#  include <avr/iotn48.h>
+ 461               	#elif defined (__AVR_ATtiny88__)
+ 462               	#  include <avr/iotn88.h>
+ 463               	#elif defined (__AVR_ATtiny828__)
+ 464               	#  include <avr/iotn828.h>
+ 465               	#elif defined (__AVR_ATtiny87__)
+ 466               	#  include <avr/iotn87.h>
+ 467               	#elif defined (__AVR_ATtiny167__)
+ 468               	#  include <avr/iotn167.h>
+ 469               	#elif defined (__AVR_ATtiny1634__)
+ 470               	#  include <avr/iotn1634.h>
+ 471               	#elif defined (__AVR_AT90SCR100__)
+ 472               	#  include <avr/io90scr100.h>
+ 473               	#elif defined (__AVR_ATxmega16A4__)
+ 474               	#  include <avr/iox16a4.h>
+ 475               	#elif defined (__AVR_ATxmega16A4U__)
+ 476               	#  include <avr/iox16a4u.h>
+ 477               	#elif defined (__AVR_ATxmega16C4__)
+ 478               	#  include <avr/iox16c4.h>
+ 479               	#elif defined (__AVR_ATxmega16D4__)
+ 480               	#  include <avr/iox16d4.h>
+ 481               	#elif defined (__AVR_ATxmega32A4__)
+ 482               	#  include <avr/iox32a4.h>
+ 483               	#elif defined (__AVR_ATxmega32A4U__)
+ 484               	#  include <avr/iox32a4u.h>
+ 485               	#elif defined (__AVR_ATxmega32C3__)
+ 486               	#  include <avr/iox32c3.h>
+ 487               	#elif defined (__AVR_ATxmega32C4__)
+ 488               	#  include <avr/iox32c4.h>
+ 489               	#elif defined (__AVR_ATxmega32D3__)
+ 490               	#  include <avr/iox32d3.h>
+ 491               	#elif defined (__AVR_ATxmega32D4__)
+ 492               	#  include <avr/iox32d4.h>
+ 493               	#elif defined (__AVR_ATxmega8E5__)
+ 494               	#  include <avr/iox8e5.h>
+ 495               	#elif defined (__AVR_ATxmega16E5__)
+ 496               	#  include <avr/iox16e5.h>
+ 497               	#elif defined (__AVR_ATxmega32E5__)
+ 498               	#  include <avr/iox32e5.h>
+ 499               	#elif defined (__AVR_ATxmega64A1__)
+ 500               	#  include <avr/iox64a1.h>
+ 501               	#elif defined (__AVR_ATxmega64A1U__)
+ 502               	#  include <avr/iox64a1u.h>
+ 503               	#elif defined (__AVR_ATxmega64A3__)
+ 504               	#  include <avr/iox64a3.h>
+ 505               	#elif defined (__AVR_ATxmega64A3U__)
+ 506               	#  include <avr/iox64a3u.h>
+ 507               	#elif defined (__AVR_ATxmega64A4U__)
+ 508               	#  include <avr/iox64a4u.h>
+ 509               	#elif defined (__AVR_ATxmega64B1__)
+ 510               	#  include <avr/iox64b1.h>
+ 511               	#elif defined (__AVR_ATxmega64B3__)
+ 512               	#  include <avr/iox64b3.h>
+ 513               	#elif defined (__AVR_ATxmega64C3__)
+ 514               	#  include <avr/iox64c3.h>
+ 515               	#elif defined (__AVR_ATxmega64D3__)
+ 516               	#  include <avr/iox64d3.h>
+ 517               	#elif defined (__AVR_ATxmega64D4__)
+ 518               	#  include <avr/iox64d4.h>
+ 519               	#elif defined (__AVR_ATxmega128A1__)
+ 520               	#  include <avr/iox128a1.h>
+ 521               	#elif defined (__AVR_ATxmega128A1U__)
+ 522               	#  include <avr/iox128a1u.h>
+ 523               	#elif defined (__AVR_ATxmega128A4U__)
+ 524               	#  include <avr/iox128a4u.h>
+ 525               	#elif defined (__AVR_ATxmega128A3__)
+ 526               	#  include <avr/iox128a3.h>
+ 527               	#elif defined (__AVR_ATxmega128A3U__)
+ 528               	#  include <avr/iox128a3u.h>
+ 529               	#elif defined (__AVR_ATxmega128B1__)
+ 530               	#  include <avr/iox128b1.h>
+ 531               	#elif defined (__AVR_ATxmega128B3__)
+ 532               	#  include <avr/iox128b3.h>
+ 533               	#elif defined (__AVR_ATxmega128C3__)
+ 534               	#  include <avr/iox128c3.h>
+ 535               	#elif defined (__AVR_ATxmega128D3__)
+ 536               	#  include <avr/iox128d3.h>
+ 537               	#elif defined (__AVR_ATxmega128D4__)
+ 538               	#  include <avr/iox128d4.h>
+ 539               	#elif defined (__AVR_ATxmega192A3__)
+ 540               	#  include <avr/iox192a3.h>
+ 541               	#elif defined (__AVR_ATxmega192A3U__)
+ 542               	#  include <avr/iox192a3u.h>
+ 543               	#elif defined (__AVR_ATxmega192C3__)
+ 544               	#  include <avr/iox192c3.h>
+ 545               	#elif defined (__AVR_ATxmega192D3__)
+ 546               	#  include <avr/iox192d3.h>
+ 547               	#elif defined (__AVR_ATxmega256A3__)
+ 548               	#  include <avr/iox256a3.h>
+ 549               	#elif defined (__AVR_ATxmega256A3U__)
+ 550               	#  include <avr/iox256a3u.h>
+ 551               	#elif defined (__AVR_ATxmega256A3B__)
+ 552               	#  include <avr/iox256a3b.h>
+ 553               	#elif defined (__AVR_ATxmega256A3BU__)
+ 554               	#  include <avr/iox256a3bu.h>
+ 555               	#elif defined (__AVR_ATxmega256C3__)
+ 556               	#  include <avr/iox256c3.h>
+ 557               	#elif defined (__AVR_ATxmega256D3__)
+ 558               	#  include <avr/iox256d3.h>
+ 559               	#elif defined (__AVR_ATxmega384C3__)
+ 560               	#  include <avr/iox384c3.h>
+ 561               	#elif defined (__AVR_ATxmega384D3__)
+ 562               	#  include <avr/iox384d3.h>
+ 563               	#elif defined (__AVR_ATA5790__)
+ 564               	#  include <avr/ioa5790.h>
+ 565               	#elif defined (__AVR_ATA5790N__)
+ 566               	#  include <avr/ioa5790n.h>
+ 567               	#elif defined (__AVR_ATA5272__)
+ 568               	#  include <avr/ioa5272.h>
+ 569               	#elif defined (__AVR_ATA5505__)
+ 570               	#  include <avr/ioa5505.h>
+ 571               	#elif defined (__AVR_ATA5795__)
+ 572               	#  include <avr/ioa5795.h>
+ 573               	#elif defined (__AVR_ATA5702M322__)
+ 574               	#  include <avr/ioa5702m322.h>
+ 575               	#elif defined (__AVR_ATA5782__)
+ 576               	#  include <avr/ioa5782.h>
+ 577               	#elif defined (__AVR_ATA5831__)
+ 578               	#  include <avr/ioa5831.h>
+ 579               	#elif defined (__AVR_ATA6285__)
+ 580               	#  include <avr/ioa6285.h>
+ 581               	#elif defined (__AVR_ATA6286__)
+ 582               	#  include <avr/ioa6286.h>
+ 583               	#elif defined (__AVR_ATA6289__)
+ 584               	#  include <avr/ioa6289.h>
+ 585               	#elif defined (__AVR_ATA6612C__)
+ 586               	#  include <avr/ioa6612c.h>
+ 587               	#elif defined (__AVR_ATA6613C__)
+ 588               	#  include <avr/ioa6613c.h>
+ 589               	#elif defined (__AVR_ATA6614Q__)
+ 590               	#  include <avr/ioa6614q.h>
+ 591               	#elif defined (__AVR_ATA6616C__)
+ 592               	#  include <avr/ioa6616c.h>
+ 593               	#elif defined (__AVR_ATA6617C__)
+ 594               	#  include <avr/ioa6617c.h>
+ 595               	#elif defined (__AVR_ATA664251__)
+ 596               	#  include <avr/ioa664251.h>
+ 597               	/* avr1: the following only supported for assembler programs */
+ 598               	#elif defined (__AVR_ATtiny28__)
+ 599               	#  include <avr/iotn28.h>
+ 600               	#elif defined (__AVR_AT90S1200__)
+ 601               	#  include <avr/io1200.h>
+ 602               	#elif defined (__AVR_ATtiny15__)
+ 603               	#  include <avr/iotn15.h>
+ 604               	#elif defined (__AVR_ATtiny12__)
+ 605               	#  include <avr/iotn12.h>
+ 606               	#elif defined (__AVR_ATtiny11__)
+ 607               	#  include <avr/iotn11.h>
+ 608               	#elif defined (__AVR_M3000__)
+ 609               	#  include <avr/iom3000.h>
+ 610               	#else
+ 611               	#  if !defined(__COMPILING_AVR_LIBC__)
+ 612               	#    warning "device type not defined"
+ 613               	#  endif
+ 614               	#endif
+ 615               	
+ 616               	#include <avr/portpins.h>
+   1               	/* Copyright (c) 2003  Theodore A. Roth
+ 617               	
+ 618               	#include <avr/common.h>
+   1               	/* Copyright (c) 2007 Eric B. Weddington
+ 619               	
+ 620               	#include <avr/version.h>
+   1               	/* Copyright (c) 2005, Joerg Wunsch                               -*- c -*-
+ 621               	
+ 622               	#if __AVR_ARCH__ >= 100
+ 623               	#  include <avr/xmega.h>
+ 624               	#endif
+ 625               	
+ 626               	/* Include fuse.h after individual IO header files. */
+ 627               	#include <avr/fuse.h>
+   1               	/* Copyright (c) 2007, Atmel Corporation
+ 628               	
+ 629               	/* Include lock.h after individual IO header files. */
+ 630               	#include <avr/lock.h>
+   1               	/* Copyright (c) 2007, Atmel Corporation
+ 631               	
+  36               	
+  37               	/* Timing offsets for JiffyDos read/write */
+  38               	/* These values are added to the delayloop counter before the first      */
+  39               	/* bitpair read/write. They were determined experimentally to center the */
+  40               	/* range of working OSCCAL values around the default value.              */
+  41               	#define JIFFY_OFFSET_WRITE 30
+  42               	#define JIFFY_OFFSET_READ  30
+  43               	
+  44               	        .section .text
+  45               	
+  46               	#if defined(IEC_ATN_INT_VECT) && defined(CONFIG_LOADER_DREAMLOAD)
+  47               	        ;; ===================================================================
+  48               	        ;; ATN(+CLK) Interrupt service routine for IEC bus
+  49               	        ;; ===================================================================
+  50               	        ;
+  51               	        ; Functions called from here may change these registers:
+  52               	        ; r0, r18, r19, r24
+  53               	        ; Other registers must be saved and restored by the called functions
+  54               	        ;
+  55               	        .global IEC_ATN_INT_VECT
+  56               	IEC_ATN_INT_VECT:
+  57               	        ; functions called from here must only change these registers:
+  58:fastloader-ll.S ****         push    r18
+  59:fastloader-ll.S ****         in      r18, _SFR_IO_ADDR(SREG)
+  60:fastloader-ll.S ****         push    r18
+  61:fastloader-ll.S ****         push    r19
+  62:fastloader-ll.S ****         push    r24
+  63:fastloader-ll.S ****         push    r0
+  64               	
+  65               	#ifdef IEC_PCMSK
+  66:fastloader-ll.S ****         lds     r18, _SFR_ADDR(IEC_PCMSK)
+  67:fastloader-ll.S ****         bst     r18, IEC_PIN_ATN        ; only check ATN
+  68:fastloader-ll.S ****         brtc    iiv_atn_irq_end         ; if it is an IRQ source
+  69               	#endif
+  70               	
+  71               	        ; check if ATN is low
+  72:fastloader-ll.S ****         sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+  73:fastloader-ll.S ****         rjmp    iiv_atn_irq_end
+  74               	
+  75               	        ; ATN is low, continue depending from active fast loader
+  76:fastloader-ll.S ****         lds     r18, detected_loader
+  77:fastloader-ll.S ****         cpi     r18, FL_DREAMLOAD_OLD
+  78:fastloader-ll.S ****         brne    iiv_not_fl_dreamload_old
+  79               	        ; dreamload (old), receive a command code
+  80:fastloader-ll.S ****         rcall   dreamload_get_command_old
+  81:fastloader-ll.S ****         rjmp    iiv_atn_irq_end         ; no other ATN action needed
+  82               	
+  83               	iiv_not_fl_dreamload_old:
+  84               	        ; no custom behaviour, this is ATN ACK
+  85:fastloader-ll.S ****         sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA    ; DATA low
+  86               	
+  87               	iiv_atn_irq_end:
+  88               	#ifdef IEC_PCMSK
+  89:fastloader-ll.S ****         lds     r18, _SFR_ADDR(IEC_PCMSK)
+  90:fastloader-ll.S ****         bst     r18, IEC_PIN_CLOCK      ; only check CLOCK
+  91:fastloader-ll.S ****         brtc    iiv_clock_irq_end       ; if it is an IRQ source
+  92               	
+  93               	        ; check if CLOCK is low
+  94:fastloader-ll.S ****         sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+  95:fastloader-ll.S ****         rjmp    iiv_clock_irq_end
+  96               	
+  97               	        ; CLOCK is low, continue depending from active fast loader
+  98:fastloader-ll.S ****         lds     r18, detected_loader
+  99:fastloader-ll.S ****         cpi     r18, FL_DREAMLOAD
+ 100:fastloader-ll.S ****         brne    iiv_not_fl_dreamload
+ 101               	        ; dreamload, receive a command code
+ 102:fastloader-ll.S ****         rcall   dreamload_get_command
+ 103:fastloader-ll.S ****         rjmp    iiv_clock_irq_end       ; no other CLOCK action needed
+ 104               	
+ 105               	iiv_not_fl_dreamload:
+ 106               	#endif // ifdef IEC_PCMSK
+ 107               	
+ 108               	iiv_clock_irq_end:
+ 109               	
+ 110:fastloader-ll.S ****         pop     r0
+ 111:fastloader-ll.S ****         pop     r24
+ 112:fastloader-ll.S ****         pop     r19
+ 113:fastloader-ll.S ****         pop     r18
+ 114:fastloader-ll.S ****         out     _SFR_IO_ADDR(SREG), r18
+ 115:fastloader-ll.S ****         pop     r18
+ 116:fastloader-ll.S ****         reti
+ 117               	#endif // ifdef IEC_ATN_INT_VECT
+ 118               	
+ 119               	
+ 120               	#ifdef IEC_CLK_INT_VECT
+ 121               	        ;; ===================================================================
+ 122               	        ;; CLK Interrupt service routine for IEC bus
+ 123               	        ;; ===================================================================
+ 124               	        ;
+ 125               	        ; Functions called from here may change these registers:
+ 126               	        ; r0, r18, r19, r24
+ 127               	        ; Other registers must be saved and restored by the called functions
+ 128               	        ;
+ 129               	        .global IEC_CLK_INT_VECT
+ 130               	IEC_CLK_INT_VECT:
+ 131               	        ; functions called from here must only change these registers:
+ 132               	        push    r18
+ 133               	        in      r18, _SFR_IO_ADDR(SREG)
+ 134               	        push    r18
+ 135               	        push    r19
+ 136               	        push    r24
+ 137               	        push    r0
+ 138               	
+ 139               	        ; check if CLOCK is low
+ 140               	        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 141               	        rjmp    clk_irq_end
+ 142               	
+ 143               	        ; CLOCK is low, continue depending from active fast loader
+ 144               	#ifdef CONFIG_LOADER_DREAMLOAD
+ 145               	        lds     r18, detected_loader
+ 146               	        cpi     r18, FL_DREAMLOAD
+ 147               	        brne    clk_not_fl_dreamload
+ 148               	        ; dreamload, receive a command code
+ 149               	        rcall   dreamload_get_command
+ 150               	        rjmp    clk_irq_end       ; no other CLOCK action needed
+ 151               	clk_not_fl_dreamload:
+ 152               	#endif // ifdef CONFIG_LOADER_DREAMLOAD
+ 153               	
+ 154               	clk_irq_end:
+ 155               	
+ 156               	        pop     r0
+ 157               	        pop     r24
+ 158               	        pop     r19
+ 159               	        pop     r18
+ 160               	        out     _SFR_IO_ADDR(SREG), r18
+ 161               	        pop     r18
+ 162               	        reti
+ 163               	#endif // ifdef IEC_CLK_INT_VECT
+ 164               	
+ 165               	
+ 166               	        ;; ===================================================================
+ 167               	        ;;  Utility routines
+ 168               	        ;; ===================================================================
+ 169               	
+ 170               	        ;;  Used by the macro below, don't call directly
+ 171               	cycleloop2:
+ 172:fastloader-ll.S ****         nop                     ; 1
+ 173               	cycleloop1:
+ 174:fastloader-ll.S ****         nop                     ; 1
+ 175               	cycleloop0:
+ 176:fastloader-ll.S ****         dec     r18             ; 1
+ 177:fastloader-ll.S ****         brne    cycleloop0      ; 2/1
+ 178:fastloader-ll.S ****         ret                     ; 4
+ 179               	
+ 180               	        ;; This macro waits for the specified number of cycles
+ 181               	        ;;  Uses r18
+ 182               	        .macro delay_cycles num
+ 183               	        ldi     r18, 1 + (\num - 10) / 3 ; 1
+ 184               	        .if (\num - 10) % 3 == 0
+ 185               	        rcall   cycleloop0      ; 3
+ 186               	        .elseif (\num - 10) % 3 == 1
+ 187               	        rcall   cycleloop1      ; 3
+ 188               	        .else
+ 189               	        rcall   cycleloop2      ; 3
+ 190               	        .endif
+ 191               	        .endm
+ 192               	
+ 193               	
+ 194               	        ;; Including the rcall this will delay for 8 cycles
+ 195               	delay1us:
+ 196:fastloader-ll.S ****         nop                     ; 1
+ 197:fastloader-ll.S ****         ret                     ; 4
+ 198               	
+ 199               	        ;; wait for ATN high
+ 200               	wait_atn_high:
+ 201:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 202:fastloader-ll.S ****         rjmp    wait_atn_high
+ 203:fastloader-ll.S ****         ret
+ 204               	
+ 205               	        ;; wait for ATN low
+ 206               	wait_atn_low:
+ 207:fastloader-ll.S ****         sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 208:fastloader-ll.S ****         rjmp    wait_atn_low
+ 209:fastloader-ll.S ****         ret
+ 210               	
+ 211               	
+ 212               	        ;; ====================================================================
+ 213               	        ;;  JiffyDOS
+ 214               	        ;; ====================================================================
+ 215               	
+ 216               	        ;;
+ 217               	        ;; Receives a single byte using the JiffyDOS protocol
+ 218               	        ;; return uint8_t reveicedbyte (r24)
+ 219               	        ;;
+ 220               	        .global jiffy_receive
+ 221               	jiffy_receive:
+ 222               	        ;; Disable interrupts
+ 223:fastloader-ll.S ****         cli
+ 224               	
+ 225               	        ;; Move pointer to EOF variable into Z
+ 226:fastloader-ll.S ****         movw    r30,r24
+ 227:fastloader-ll.S ****         clr     r24             ; clear output register
+ 228:fastloader-ll.S ****         clr     r25             ; clear high byte of return value
+ 229               	
+ 230               	        ;; Set clock+data high
+ 231:fastloader-ll.S ****         cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 232:fastloader-ll.S ****         cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 233               	
+ 234               	        ;; Wait until clock is high and emulate ATN-Ack
+ 235:fastloader-ll.S **** 0:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 236:fastloader-ll.S ****         sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA ; Data low if ATN is low
+ 237:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 238:fastloader-ll.S ****         rjmp    0b
+ 239               	
+ 240               	        ;; Wait for 13us from clock high -> 104 cycles
+ 241:fastloader-ll.S ****         delay_cycles 104 + JIFFY_OFFSET_READ ; 104 + Offset
+ 242               	
+ 243               	        ;; Read bit 5+4
+ 244:fastloader-ll.S ****         in      r0, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 245               	
+ 246               	        ;; Store bits in r24
+ 247:fastloader-ll.S ****         bst     r0, IEC_PIN_DATA  ; 1 - get data bit
+ 248:fastloader-ll.S ****         bld     r24, 5            ; 1 - store as bit 5
+ 249:fastloader-ll.S ****         bst     r0, IEC_PIN_CLOCK ; 1 - get clock bit
+ 250:fastloader-ll.S ****         bld     r24, 4            ; 1 - store as bit 4
+ 251               	
+ 252               	        ;; Wait 13us -> 104-5=99 cycles
+ 253:fastloader-ll.S ****         delay_cycles 99         ; 99
+ 254               	
+ 255               	        ;; Read bit 7+6
+ 256:fastloader-ll.S ****         in      r0, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 257               	
+ 258               	        ;; Store bits in r24
+ 259:fastloader-ll.S ****         bst     r0, IEC_PIN_DATA  ; 1 - get data bit
+ 260:fastloader-ll.S ****         bld     r24, 7            ; 1 - store as bit 7
+ 261:fastloader-ll.S ****         bst     r0, IEC_PIN_CLOCK ; 1 - get clock bit
+ 262:fastloader-ll.S ****         bld     r24, 6            ; 1 - store as bit 6
+ 263               	
+ 264               	        ;; Wait 11us -> 88-5=83 cycles
+ 265:fastloader-ll.S ****         delay_cycles 83         ; 83
+ 266               	
+ 267               	        ;; Read bit 1+3 [sic]
+ 268:fastloader-ll.S ****         in      r0, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 269:fastloader-ll.S ****         bst     r0, IEC_PIN_DATA  ; 1 - get data bit
+ 270:fastloader-ll.S ****         bld     r24, 1            ; 1 - store as bit 1
+ 271:fastloader-ll.S ****         bst     r0, IEC_PIN_CLOCK ; 1 - get clock bit
+ 272:fastloader-ll.S ****         bld     r24, 3            ; 1 - store as bit 3
+ 273               	
+ 274               	        ;; Wait 13us -> 104-5=99 cycles
+ 275:fastloader-ll.S ****         delay_cycles 99         ; 99
+ 276               	
+ 277               	        ;; Read Bit 0+2
+ 278:fastloader-ll.S ****         in      r0, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 279:fastloader-ll.S ****         bst     r0, IEC_PIN_DATA  ; 1 - get data bit
+ 280:fastloader-ll.S ****         bld     r24, 0            ; 1 - store as bit 0
+ 281:fastloader-ll.S ****         bst     r0, IEC_PIN_CLOCK ; 1 - get clock bit
+ 282:fastloader-ll.S ****         bld     r24, 2            ; 1 - store as bit 2
+ 283               	
+ 284               	        ;; Wait 13us -> 104-5=99 cycles
+ 285:fastloader-ll.S ****         delay_cycles 99         ; 99
+ 286               	
+ 287               	        ;; Read EOI mark
+ 288:fastloader-ll.S ****         in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 289               	
+ 290               	        ;; Wait 6us -> 48-1=47 cycles
+ 291:fastloader-ll.S ****         delay_cycles 47         ; 47
+ 292               	
+ 293               	        ;; Data low
+ 294:fastloader-ll.S ****         sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA ; 1
+ 295:fastloader-ll.S ****         delay_cycles 10*8       ; make sure the C64 can see that
+ 296               	
+ 297               	        ;; Post-process data and store last bus state
+ 298:fastloader-ll.S ****         com     r24             ; invert received data (result)
+ 299:fastloader-ll.S ****         st      Z, r19          ; store last bus state
+ 300:fastloader-ll.S ****         sei                     ; enable interrupts
+ 301:fastloader-ll.S ****         ret
+ 302               	
+ 303               	
+ 304               	
+ 305               	        ;; Shifts the lowest two bits from r0 to r19
+ 306               	        ;; and sends then on the bus at cycle 12
+ 307               	        ;; Needs 16 cycles including the rcall
+ 308               	jiffy_sendbits:
+ 309:fastloader-ll.S ****         in      r19, _SFR_IO_ADDR(IEC_OUT) ; 1 - read port
+ 310:fastloader-ll.S ****         andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 311               	                                    ; 1 - mask IEC bits
+ 312:fastloader-ll.S ****         bst     r0, 0               ; 1 - get bit 0
+ 313:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - send on the clock line
+ 314:fastloader-ll.S ****         bst     r0, 1               ; 1 - get bit 1
+ 315:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - send on the data line
+ 316:fastloader-ll.S ****         lsr     r0                  ; 1 - remove source bits
+ 317:fastloader-ll.S ****         lsr     r0                  ; 1
+ 318:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1 - output the bit pair
+ 319:fastloader-ll.S ****         ret                         ; 4
+ 320               	
+ 321               	        ;;
+ 322               	        ;; Sends a single byte using the Jiffy protocol
+ 323               	        ;; uint8_t value (r24), uint8_t eoi (r22), uint8_t loadflags (r20)
+ 324               	        ;; return uint8_t atnactive (r24)
+ 325               	        ;;
+ 326               	        ;; eoi should always be 0 for LOAD because the eoi marker is
+ 327               	        ;; transmitted in a different way there (see C code).
+ 328               	        ;;
+ 329               	        ;; Loadflags has a dual purpose:
+ 330               	        ;;  - if it's != 0, the start condition will be modified for Jiffy-LOAD
+ 331               	        ;;  - bit 7 will be cleared after that
+ 332               	        ;;  - if it's still != 0, the function will exit after sending
+ 333               	        ;;    the last bitpair - required for all but the final byte of a block
+ 334               	        ;;    during LOAD
+ 335               	        .global jiffy_send
+ 336               	jiffy_send:
+ 337:fastloader-ll.S ****         cli                     ; Disable interrupts
+ 338               	
+ 339               	        ;; Calculate bus wait condition based on current state
+ 340               	        ;; The loop below will spin while ATN and Clock are high and
+ 341               	        ;; - Data is low  (single-byte transfer)
+ 342               	        ;; - Data is high (LOAD)
+ 343:fastloader-ll.S ****         ldi     r21, IEC_BIT_CLOCK | IEC_BIT_ATN
+ 344:fastloader-ll.S ****         tst     r20             ; loadflag set?
+ 345:fastloader-ll.S ****         breq    0f              ; Yes, skip
+ 346               	                ; No: Set data bit
+ 347:fastloader-ll.S ****         ori     r21, IEC_BIT_DATA
+ 348               	
+ 349:fastloader-ll.S **** 0:      andi    r20, 0x7f       ; Clear bit 7 of loadflags
+ 350               	
+ 351               	        ;; Calculate bus state for EOI/not-EOI mark
+ 352:fastloader-ll.S ****         tst     r22             ; EOI flag set?
+ 353:fastloader-ll.S ****         breq    0f              ; No, branch
+ 354               	
+ 355:fastloader-ll.S ****         in      r22, _SFR_IO_ADDR(IEC_OUT)
+ 356:fastloader-ll.S ****         andi    r22, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 357:fastloader-ll.S ****         ori     r22, IEC_OBIT_DATA ; Data low, Clock hi on EOI
+ 358:fastloader-ll.S ****         rjmp    1f
+ 359               	
+ 360:fastloader-ll.S **** 0:      in      r22, _SFR_IO_ADDR(IEC_OUT)
+ 361:fastloader-ll.S ****         andi    r22, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 362:fastloader-ll.S ****         ori     r22, IEC_OBIT_CLOCK ; Data hi, Clock low on non-EOI
+ 363               	
+ 364               	1:
+ 365               	        ;; Set clock and data high/inactive - FFB5
+ 366:fastloader-ll.S ****         cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 367               	                ; this is the actual ready signal for the C64
+ 368:fastloader-ll.S ****         cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 369               	
+ 370               	        ;; Wait 1us to allow the bus to settle (J1541 needs 4us here)
+ 371:fastloader-ll.S ****         rcall   delay1us
+ 372               	
+ 373               	        ;; Set up a few registers
+ 374:fastloader-ll.S ****         mov     r0, r24         ; move data byte to r0
+ 375:fastloader-ll.S ****         com     r0              ; invert data byte
+ 376               	
+ 377               	        ;; Wait for start condition (calculated above) from C64 - FFB8
+ 378:fastloader-ll.S **** 0:      in      r24, _SFR_IO_ADDR(IEC_PIN)
+ 379:fastloader-ll.S ****         andi    r24, IEC_BIT_CLOCK | IEC_BIT_DATA | IEC_BIT_ATN ; 1
+ 380:fastloader-ll.S ****         cp      r24, r21        ; 1
+ 381:fastloader-ll.S ****         breq    0b              ; 1
+ 382               	
+ 383               	        ;; Check for ATN (J1541 doesn't do this, but I'm paranoid)
+ 384               	        ;; Doesn't work, further analysis required
+ 385:fastloader-ll.S ****         andi    r24, IEC_BIT_ATN ; 1
+ 386:fastloader-ll.S ****         breq    js_finish        ; 1 - jump if ATN is low
+ 387               	
+ 388               	        ;; Output the first bitpair 6us (48 cycles) after the start
+ 389               	        ;; 6us is the best-case time from bus check to transmission in J1541
+ 390:fastloader-ll.S ****         delay_cycles 31 + JIFFY_OFFSET_WRITE
+ 391               	                                ; 31 = 48-17
+ 392:fastloader-ll.S ****         rcall   jiffy_sendbits  ; 12+4 - [FFBD]
+ 393               	
+ 394               	        ;; Output the second bitpair 10us (80 cycles) after the first
+ 395:fastloader-ll.S ****         delay_cycles 64         ; 64 = 80-16
+ 396               	
+ 397:fastloader-ll.S ****         rcall   jiffy_sendbits  ; 12+4 - [FFC4]
+ 398               	
+ 399               	        ;; Output the third bitpair 11us (88 cycles) after the second
+ 400:fastloader-ll.S ****         delay_cycles 72         ; 72 = 88-16
+ 401               	
+ 402:fastloader-ll.S ****         rcall   jiffy_sendbits  ; 12+4 - [FFCC]
+ 403               	
+ 404               	        ;; Output the fourth bitpair 10us (80 cycles) after the third
+ 405:fastloader-ll.S ****         delay_cycles 64         ; 64 = 80-16
+ 406               	
+ 407:fastloader-ll.S ****         rcall   jiffy_sendbits  ; 12+4 - [FFD3]
+ 408               	
+ 409               	        ;; Skip sending EOI for LOAD code path
+ 410:fastloader-ll.S ****         tst     r20             ; 1
+ 411:fastloader-ll.S ****         brne    js_finish       ; 1
+ 412               	
+ 413               	        ;; Output EOI marker 11us (88 cycles) after the last bitpair
+ 414:fastloader-ll.S ****         delay_cycles 81         ; 81 = 88-7
+ 415               	
+ 416:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r22 ; 1 - output EOI marker [FFDB]
+ 417               	
+ 418               	        ;; Wait 1us to allow the bus to settle (J1541 needs 4us here)
+ 419:fastloader-ll.S ****         rcall   delay1us
+ 420               	
+ 421               	        ;; Wait until data is low, check ATN [FFDE]
+ 422               	        ;; This loop won't wait when EOI is signalled.
+ 423:fastloader-ll.S **** 0:      in      r24, _SFR_IO_ADDR(IEC_PIN) ; Read bus
+ 424:fastloader-ll.S ****         sbrs    r24, IEC_PIN_ATN           ; Skip if ATN is high
+ 425:fastloader-ll.S ****         rjmp    js_finish                  ; ATN low, exit loop
+ 426:fastloader-ll.S ****         sbrc    r24, IEC_PIN_DATA          ; Skip if Data is low
+ 427:fastloader-ll.S ****         rjmp    0b                         ; No Data, no ATN -> loop
+ 428               	
+ 429               	js_finish:
+ 430:fastloader-ll.S ****         com     r24             ; invert port state (ATN low returns true)
+ 431:fastloader-ll.S ****         andi    r24, IEC_BIT_ATN ; single out ATN bit
+ 432               	
+ 433:fastloader-ll.S ****         sei                     ; re-enable interrupts
+ 434:fastloader-ll.S ****         ret
+ 435               	
+ 436               	
+ 437               	#ifdef CONFIG_LOADER_TURBODISK
+ 438               	        ;; ====================================================================
+ 439               	        ;;  Turbodisk
+ 440               	        ;; ====================================================================
+ 441               	
+ 442               	        ;;
+ 443               	        ;; Sends a single byte in r24 using the Turbodisk protocol
+ 444               	        ;;
+ 445               	        .global turbodisk_byte
+ 446               	turbodisk_byte:
+ 447               	        ;; Wait until data is low
+ 448:fastloader-ll.S ****         sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+ 449:fastloader-ll.S ****         rjmp    turbodisk_byte
+ 450               	
+ 451               	        ;; Byte preparation
+ 452:fastloader-ll.S ****         com     r24             ; Invert the data byte
+ 453               	
+ 454               	        ;; All bus lines high
+ 455:fastloader-ll.S ****         in      r18, _SFR_IO_ADDR(IEC_OUT)
+ 456:fastloader-ll.S ****         andi    r18, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 457:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r18
+ 458               	
+ 459               	        ;; Wait until data is high
+ 460:fastloader-ll.S **** 0:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA ; 2
+ 461:fastloader-ll.S ****         rjmp    0b
+ 462               	
+ 463:fastloader-ll.S ****         rcall   delay1us        ; Move the timing window slightly
+ 464               	
+ 465:fastloader-ll.S ****         ldi     r20, 4          ; 1 - Bitpair counter
+ 466               	
+ 467               	tdbitloop:
+ 468:fastloader-ll.S ****         in      r19, _SFR_IO_ADDR(IEC_OUT) ; 1 - read & mask unused IEC port lines
+ 469:fastloader-ll.S ****         andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ) ; 1
+ 470:fastloader-ll.S ****         bst     r24, 7              ; 1 - grab bit 7
+ 471:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+ 472:fastloader-ll.S ****         bst     r24, 6              ; 1 - grab bit 6
+ 473:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+ 474:fastloader-ll.S ****         lsl     r24                 ; 1 - remove source bits
+ 475:fastloader-ll.S ****         lsl     r24                 ; 1
+ 476               	
+ 477               	        ;; Wait for 28us from data high -> 224-9=215 cycles
+ 478:fastloader-ll.S ****         delay_cycles 215        ; 215
+ 479               	
+ 480:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r19      ; 1 - output the bit pair
+ 481               	
+ 482:fastloader-ll.S ****         rcall   delay1us        ; 8 - additional us for loops 2-4
+ 483               	
+ 484:fastloader-ll.S ****         dec     r20             ; 1 - Decrement bitpair counter
+ 485:fastloader-ll.S ****         brne    tdbitloop       ; 2/1 - loop until done
+ 486               	
+ 487               	        ;; Wait for 26us from last bitpair -> 208-12=196 cycles
+ 488:fastloader-ll.S ****         delay_cycles 196        ; 196
+ 489               	
+ 490               	        ;; Data high, Clock low
+ 491:fastloader-ll.S ****         in      r18, _SFR_IO_ADDR(IEC_OUT)
+ 492:fastloader-ll.S ****         andi    r18, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 493:fastloader-ll.S ****         ori     r18, IEC_OBIT_CLOCK
+ 494:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r18
+ 495               	
+ 496:fastloader-ll.S ****         ret
+ 497               	
+ 498               	
+ 499               	        ;;
+ 500               	        ;; Sends a complete buffer of r22 bytes at r24/r25 using the Turbodisk protocol
+ 501               	        ;;
+ 502               	        .global turbodisk_buffer
+ 503               	turbodisk_buffer:
+ 504               	        ;; Wait until data is low
+ 505:fastloader-ll.S ****         sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+ 506:fastloader-ll.S ****         rjmp    turbodisk_buffer
+ 507               	
+ 508               	        ;; All bus lines high
+ 509:fastloader-ll.S ****         in      r18, _SFR_IO_ADDR(IEC_OUT)
+ 510:fastloader-ll.S ****         andi    r18, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 511:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r18
+ 512               	
+ 513:fastloader-ll.S ****         movw    r30,r24         ; output pointer
+ 514               	
+ 515               	        ;; Wait until data is high
+ 516:fastloader-ll.S **** 0:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA ; 2
+ 517:fastloader-ll.S ****         rjmp    0b
+ 518               	
+ 519               	        ;; Initial delay of 4 us + move the timing window by 1 us for stability
+ 520:fastloader-ll.S ****         delay_cycles (4+1)*8    ; 40
+ 521               	
+ 522               	        ;; 287 AVR cycles from here to first LDA $DD00 on C64 side ($F822)
+ 523               	tdbyteloop:
+ 524:fastloader-ll.S ****         ld      r0, Z+          ; 2 - load byte
+ 525:fastloader-ll.S ****         ldi     r20, 4          ; 1 - bitpair counter
+ 526:fastloader-ll.S ****         com     r0              ; 1 - invert data byte
+ 527               	
+ 528               	        ;; Waste another 12 us -> 96-4=92 cycles
+ 529:fastloader-ll.S ****         delay_cycles 92         ; 92
+ 530               	
+ 531               	tdbitloop2:
+ 532:fastloader-ll.S ****         in      r19, _SFR_IO_ADDR(IEC_OUT) ; 1 - read & mask unused IEC port lines
+ 533:fastloader-ll.S ****         andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ) ; 1
+ 534:fastloader-ll.S ****         bst     r0, 7               ; 1 - grab bit 7
+ 535:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+ 536:fastloader-ll.S ****         bst     r0, 6               ; 1 - grab bit 6
+ 537:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+ 538:fastloader-ll.S ****         lsl     r0                  ; 1 - remove source bits
+ 539:fastloader-ll.S ****         lsl     r0                  ; 1
+ 540               	
+ 541               	        ;; Wait another 24 us -> 192-9=183 cycles
+ 542:fastloader-ll.S ****         delay_cycles 183        ; 183
+ 543               	
+ 544:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r19      ; 1 - output the bit pair
+ 545               	
+ 546               	        ;; 5 us -> 40-3=37 cycles
+ 547:fastloader-ll.S ****         delay_cycles 37         ; 37
+ 548               	
+ 549:fastloader-ll.S ****         dec     r20             ; 1 - Decrement bitpair counter
+ 550:fastloader-ll.S ****         brne    tdbitloop2      ; 2/1 - loop until done
+ 551               	
+ 552               	        ;; Wait 10 us -> 80-3+1=78 cycles
+ 553:fastloader-ll.S ****         delay_cycles 78         ; 78
+ 554               	
+ 555:fastloader-ll.S ****         dec     r22             ; 1 - Decrement byte counter
+ 556:fastloader-ll.S ****         brne    tdbyteloop      ; 2/1 - loop until done
+ 557               	
+ 558               	        ;; Final delay: 11 us -> 88 cycles
+ 559:fastloader-ll.S ****         delay_cycles 88         ; 88
+ 560               	
+ 561               	        ;; Data high, Clock low
+ 562:fastloader-ll.S ****         in      r18, _SFR_IO_ADDR(IEC_OUT)
+ 563:fastloader-ll.S ****         andi    r18, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 564:fastloader-ll.S ****         ori     r18, IEC_OBIT_CLOCK
+ 565:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r18
+ 566               	
+ 567:fastloader-ll.S ****         ret
+ 568               	#endif
+ 569               	
+ 570               	#if defined(CONFIG_LOADER_DREAMLOAD) || defined(CONFIG_LOADER_FC3) || defined(CONFIG_LOADER_ULOAD3)
+ 571               	        ;;
+ 572               	        ;; Set bit 0 of r0 on CLOCK and bit 1 on DATA
+ 573               	        ;; A bit value of one means pull down
+ 574               	        ;; After sending these two bits r0 is shifted right two bits
+ 575               	        ;;
+ 576               	        ;; r19 is used as scratch reg here
+ 577               	        ;;
+ 578               	        ;; Takes 10 cycles before OUT (incl. rcall)
+ 579               	        ;; Takes 6 cycles to return after OUT
+ 580               	        ;;
+ 581               	send_bits_to_clk_data:
+ 582               	        ; rcall                  ; 3
+ 583:fastloader-ll.S ****         in   r19, _SFR_IO_ADDR(IEC_OUT) ; 1 - read & mask unused IEC port lines
+ 584:fastloader-ll.S ****         andi r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ) ; 1
+ 585:fastloader-ll.S ****         bst  r0, 0               ; 1 - take bit 0 (lsb)
+ 586:fastloader-ll.S ****         bld  r19, IEC_OPIN_CLOCK ; 1 - for CLOCK line
+ 587:fastloader-ll.S ****         bst  r0, 1               ; 1 - take bit 1
+ 588:fastloader-ll.S ****         bld  r19, IEC_OPIN_DATA  ; 1 - for DATA line
+ 589:fastloader-ll.S ****         out  _SFR_IO_ADDR(IEC_OUT), r19 ; 1 - output the bit pair
+ 590               	
+ 591:fastloader-ll.S ****         lsr  r0                  ; 1
+ 592:fastloader-ll.S ****         lsr  r0                  ; 1 - prepare next two bits
+ 593               	
+ 594:fastloader-ll.S ****         ret                      ; 4
+ 595               	
+ 596               	        ;;
+ 597               	        ;; Get DATA  => bit 0
+ 598               	        ;; and CLOCK => bit 2 of r24
+ 599               	        ;; Low level means value 0 here
+ 600               	        ;;
+ 601               	        ;; r19 is used as scratch reg here
+ 602               	        ;;
+ 603               	        ;; Takes 4 cycles before IN (incl. rcall)
+ 604               	        ;; Takes 8 cycles to return after IN
+ 605               	        ;;
+ 606               	get_bits_from_clk_data:
+ 607               	        ; rcall                         ; 3
+ 608:fastloader-ll.S ****         in      r19, _SFR_IO_ADDR(IEC_PIN)  ; 1
+ 609:fastloader-ll.S ****         bst     r19, IEC_PIN_DATA       ; 1
+ 610:fastloader-ll.S ****         bld     r24, 0                  ; 1
+ 611:fastloader-ll.S ****         bst     r19, IEC_PIN_CLOCK      ; 1
+ 612:fastloader-ll.S ****         bld     r24, 2                  ; 1
+ 613:fastloader-ll.S ****         ret                             ; 4
+ 614               	
+ 615               	#endif
+ 616               	
+ 617               	#if defined(CONFIG_LOADER_FC3) || defined(CONFIG_LOADER_ULOAD3) || defined(CONFIG_LOADER_ELOAD1)
+ 618               	        ;;
+ 619               	        ;; Do this kind of handshake:
+ 620               	        ;; set CLOCK low, wait for DATA going low,
+ 621               	        ;; release CLOCK, wait for DATA going high
+ 622               	        ;; returns without waiting if ATN is low
+ 623               	        ;;
+ 624               	        ;; cycles from DATA high to return to caller: 5-10
+ 625               	        ;;
+ 626               	        .global clk_data_handshake
+ 627               	clk_data_handshake:
+ 628:fastloader-ll.S ****         sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 629               	1:
+ 630:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 631:fastloader-ll.S ****         rjmp    2f
+ 632:fastloader-ll.S ****         sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+ 633:fastloader-ll.S ****         rjmp    1b
+ 634:fastloader-ll.S ****         cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 635               	1:
+ 636:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 637:fastloader-ll.S ****         rjmp    2f
+ 638:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+ 639:fastloader-ll.S ****         rjmp    1b
+ 640               	2:
+ 641:fastloader-ll.S ****         ret
+ 642               	#endif
+ 643               	
+ 644               	#ifdef CONFIG_LOADER_FC3
+ 645               	        ;;
+ 646               	        ;; Sends four bytes at r24/r25 using the FC3 protocol
+ 647               	        ;;
+ 648               	        .global fastloader_fc3_send_block
+ 649               	fastloader_fc3_send_block:
+ 650:fastloader-ll.S ****         cli
+ 651:fastloader-ll.S ****         movw    r30,r24         ; Z = output pointer
+ 652               	
+ 653               	        ; pull CLOCK low for sync
+ 654:fastloader-ll.S ****         sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK ; 1
+ 655               	
+ 656               	        ; 12 us between sync and bitpair
+ 657:fastloader-ll.S ****         delay_cycles 12 * 8 - 14 ; 83
+ 658               	
+ 659:fastloader-ll.S ****         ldi     r21, 4          ; 1 - byte counter
+ 660               	fc3_byteloop:
+ 661:fastloader-ll.S ****         ld      r0, Z+          ; 2 - load byte
+ 662               	
+ 663:fastloader-ll.S ****         com     r0              ; 1 - negate all bits
+ 664               	
+ 665:fastloader-ll.S ****         ldi     r20, 4          ; 1 - bitpair counter
+ 666               	fc3_bitloop:
+ 667               	        ; send r0[0,1] to CLOCK and DATA, shift r0 right two times
+ 668               	        ; changes r19
+ 669:fastloader-ll.S ****         rcall   send_bits_to_clk_data ; 10 + 6
+ 670               	
+ 671               	        ; wait 12 us between bitpair
+ 672:fastloader-ll.S ****         delay_cycles 12*8-19
+ 673               	
+ 674:fastloader-ll.S ****         dec     r20             ; 1 - decrement bitpair counter
+ 675:fastloader-ll.S ****         brne    fc3_bitloop     ; 2/1 - loop until done
+ 676               	fc3_next_byte:
+ 677               	        ; wait 2 us more between two bytes (16 cycles = -1 + 17)
+ 678:fastloader-ll.S ****         rcall   delay1us        ; 8
+ 679:fastloader-ll.S ****         rjmp    0f              ; 2
+ 680               	0:
+ 681:fastloader-ll.S ****         dec     r21             ; 1 - decrement byte counter
+ 682:fastloader-ll.S ****         brne    fc3_byteloop    ; 2/1 - loop until done
+ 683               	
+ 684               	        ; release CLOCK and DATA
+ 685:fastloader-ll.S ****         in      r19, _SFR_IO_ADDR(IEC_OUT) ; read & mask unused IEC port lines
+ 686:fastloader-ll.S ****         andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 687:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r19 ; release CLOCK and DATA
+ 688               	
+ 689:fastloader-ll.S ****         sei
+ 690:fastloader-ll.S ****         ret
+ 691               	
+ 692               	        ;;
+ 693               	        ;; Receive one byte using the FC3 save protocol
+ 694               	        ;;
+ 695               	        .global fc3_get_byte
+ 696               	fc3_get_byte:
+ 697:fastloader-ll.S ****         cli
+ 698               	
+ 699:fastloader-ll.S ****         clr     r24     ; clear data byte
+ 700               	
+ 701               	        ; wait a moment before releasing data, otherwise the loop would run
+ 702               	        ; too fast. I confess that this value is guessed.
+ 703:fastloader-ll.S ****         delay_cycles 10 * 8
+ 704               	
+ 705               	        ; release DATA
+ 706:fastloader-ll.S ****         cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 707               	
+ 708               	        ; wait until CLOCK goes high
+ 709               	1:
+ 710:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK ; 1/2?
+ 711:fastloader-ll.S ****         rjmp    1b
+ 712               	
+ 713               	        ; 17 us later...
+ 714:fastloader-ll.S ****         delay_cycles 17 * 8 - 6
+ 715               	
+ 716               	        ; get bits 5,7 @ 0,2 - changes r19
+ 717:fastloader-ll.S ****         rcall   get_bits_from_clk_data  ; 4 + 8 r24 = .....7.5
+ 718:fastloader-ll.S ****         lsl     r24                     ; 1     r24 = ....7.5.
+ 719               	
+ 720               	        ; 13 us later...
+ 721:fastloader-ll.S ****         delay_cycles 13 * 8 - 13
+ 722               	
+ 723               	        ; get bits 4,6 @ 0,2 - changes r19
+ 724:fastloader-ll.S ****         rcall   get_bits_from_clk_data  ; 4 + 8 r24 = ....7654
+ 725:fastloader-ll.S ****         swap    r24                     ; 1     r24 = 7654....
+ 726:fastloader-ll.S ****         lsr     r24                     ; 1     r24 = .7654...
+ 727               	
+ 728               	        ; 12 us later...
+ 729:fastloader-ll.S ****         delay_cycles 12 * 8 - 14
+ 730               	
+ 731               	        ; get bits 1,3 @ 0,2 - changes r19
+ 732:fastloader-ll.S ****         rcall   get_bits_from_clk_data  ; 4 + 8 r24 = .76543.1
+ 733:fastloader-ll.S ****         lsl     r24                     ; 1     r24 = 76543.1.
+ 734               	
+ 735               	        ; 10 us later...
+ 736:fastloader-ll.S ****         delay_cycles 10 * 8 - 13
+ 737               	
+ 738               	        ; get bits 0,2 @ 0,2 - changes r19
+ 739:fastloader-ll.S ****         rcall   get_bits_from_clk_data  ; 4 + 8 r24 = 76543210
+ 740               	
+ 741               	        ; Pull DATA down
+ 742:fastloader-ll.S ****         sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 743               	
+ 744:fastloader-ll.S ****         sei
+ 745:fastloader-ll.S ****         com     r24     ; negate all bits
+ 746:fastloader-ll.S ****         clr     r25     ; clear hi-byte of return val
+ 747:fastloader-ll.S ****         ret
+ 748               	#endif
+ 749               	
+ 750               	#ifdef CONFIG_LOADER_DREAMLOAD
+ 751               	        ;;
+ 752               	        ;; Receive a command (track/sector) using the DreamLoad protocol
+ 753               	        ;;
+ 754               	dreamload_get_command:
+ 755:fastloader-ll.S ****         rcall   dreamload_get_byte
+ 756:fastloader-ll.S ****         sts     fl_track, r24
+ 757:fastloader-ll.S ****         rcall   dreamload_get_byte
+ 758:fastloader-ll.S ****         sts     fl_sector, r24
+ 759:fastloader-ll.S ****         ret
+ 760               	
+ 761               	        ;;
+ 762               	        ;; Receive a byte using the DreamLoad protocol
+ 763               	        ;;
+ 764               	        .global dreamload_get_byte
+ 765               	dreamload_get_byte:
+ 766               	
+ 767:fastloader-ll.S ****         ldi     r18, 4  ; 4 * 2 bits to load
+ 768               	dl_bitloop:
+ 769               	        ; wait until clock goes low
+ 770               	1:
+ 771:fastloader-ll.S ****         sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 772:fastloader-ll.S ****         rjmp    1b
+ 773               	
+ 774:fastloader-ll.S ****         lsl     r24
+ 775               	
+ 776               	        ; read data a short time later
+ 777:fastloader-ll.S ****         in      r19, _SFR_IO_ADDR(IEC_PIN)
+ 778:fastloader-ll.S ****         bst     r19, IEC_PIN_DATA
+ 779:fastloader-ll.S ****         bld     r24, 0
+ 780               	
+ 781               	        ; wait until clock goes high
+ 782               	2:
+ 783:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 784:fastloader-ll.S ****         rjmp    2b
+ 785               	
+ 786:fastloader-ll.S ****         lsl     r24
+ 787               	
+ 788               	        ; read data a short time later
+ 789:fastloader-ll.S ****         in      r19, _SFR_IO_ADDR(IEC_PIN)
+ 790:fastloader-ll.S ****         bst     r19, IEC_PIN_DATA
+ 791:fastloader-ll.S ****         bld     r24, 0
+ 792               	
+ 793:fastloader-ll.S ****         dec     r18
+ 794:fastloader-ll.S ****         brne     dl_bitloop
+ 795               	
+ 796:fastloader-ll.S ****         com     r24     ; negate all bits
+ 797:fastloader-ll.S ****         ret
+ 798               	
+ 799               	        ;;
+ 800               	        ;; Receive a command (track/sector) using the old DreamLoad protocol
+ 801               	        ;;
+ 802               	dreamload_get_command_old:
+ 803:fastloader-ll.S ****         rcall   dreamload_get_byte_old
+ 804:fastloader-ll.S ****         sts     fl_track, r24
+ 805:fastloader-ll.S ****         rcall   dreamload_get_byte_old
+ 806:fastloader-ll.S ****         sts     fl_sector, r24
+ 807:fastloader-ll.S ****         ret
+ 808               	
+ 809               	        ;;
+ 810               	        ;; Receive a byte using the old DreamLoad protocol
+ 811               	        ;;
+ 812               	dreamload_get_byte_old:
+ 813               	        ; 2 nibbles
+ 814:fastloader-ll.S ****         ldi     r18, 2
+ 815               	dlgb_nibble:
+ 816:fastloader-ll.S ****         swap    r24                     ; 2nd loop: r24 = 7654....
+ 817:fastloader-ll.S ****         lsr     r24                     ; 2nd loop: r24 = .7654...
+ 818               	
+ 819:fastloader-ll.S ****         rcall   wait_atn_low
+ 820               	        ; 1st: get bits 5,7 @ 0,2 / 2nd: get bits 1,3 @ 0,2 - changes r19
+ 821:fastloader-ll.S ****         rcall   get_bits_from_clk_data  ; 1st: r24 = .....7.5 / 2nd: .76543.1
+ 822:fastloader-ll.S ****         lsl     r24                     ; 1st: r24 = ....7.5. / 2nd: 76543.1.
+ 823               	
+ 824:fastloader-ll.S ****         rcall   wait_atn_high
+ 825               	        ; 1st: get bits 4,6 @ 0,2 / 2nd: get bits 0,2 @ 0,2 - changes r19
+ 826:fastloader-ll.S ****         rcall   get_bits_from_clk_data  ; 1st: r24 = ....7654 / 2nd: 76543210
+ 827               	
+ 828:fastloader-ll.S ****         dec     r18
+ 829:fastloader-ll.S ****         brne    dlgb_nibble
+ 830               	
+ 831:fastloader-ll.S ****         com     r24     ; negate all bits
+ 832:fastloader-ll.S ****         ret
+ 833               	
+ 834               	        ;;
+ 835               	        ;; Send the byte in r24 using the DreamLoad protocol
+ 836               	        ;;
+ 837               	        .global dreamload_send_byte
+ 838               	dreamload_send_byte:
+ 839               	
+ 840               	        ; inverse all bits
+ 841:fastloader-ll.S ****         mov     r0, r24
+ 842:fastloader-ll.S ****         com     r0
+ 843               	
+ 844:fastloader-ll.S ****         ldi     r18, 2          ; loop counter
+ 845               	
+ 846               	dsb_bitloop:
+ 847               	        ; send r0[0,1] to CLOCK and DATA, shift r0 right two times
+ 848               	        ; changes r19
+ 849:fastloader-ll.S ****         rcall   send_bits_to_clk_data
+ 850:fastloader-ll.S ****         rcall   wait_atn_low
+ 851               	
+ 852               	        ; send r0[0,1] to CLOCK and DATA, shift r0 right two times
+ 853               	        ; changes r19
+ 854:fastloader-ll.S ****         rcall   send_bits_to_clk_data
+ 855:fastloader-ll.S ****         rcall   wait_atn_high
+ 856               	
+ 857:fastloader-ll.S ****         dec     r18             ; decrement bitpair counter
+ 858:fastloader-ll.S ****         brne    dsb_bitloop     ; loop until done
+ 859:fastloader-ll.S ****         ret
+ 860               	#endif
+ 861               	
+ 862               	#if defined CONFIG_LOADER_ULOAD3 || defined CONFIG_LOADER_ELOAD1
+ 863               	        ;;
+ 864               	        ;; Receive a byte using the ULoad Model 3 protocol
+ 865               	        ;;
+ 866               	        .global uload3_get_byte
+ 867               	uload3_get_byte:
+ 868:fastloader-ll.S ****         cli
+ 869:fastloader-ll.S ****         ldi     r25, 0xff       ; prepare a negative return value
+ 870:fastloader-ll.S ****         clr     r24
+ 871:fastloader-ll.S ****         rcall   clk_data_handshake
+ 872:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN ;skip ret if ATN is high
+ 873:fastloader-ll.S ****         rjmp    uload3_abort                       ;return if ATN is low
+ 874               	
+ 875               	        ;; assuming an average of 10 cycles between DATA high and the following instruction
+ 876:fastloader-ll.S ****         delay_cycles 14 * 8 - 10 - 4
+ 877               	
+ 878               	        ;; read bits 7/5
+ 879:fastloader-ll.S ****         rcall   get_bits_from_clk_data ;4+8 r24 = _____7_5
+ 880:fastloader-ll.S ****         lsl     r24                    ;1   r24 = ____7_5_
+ 881               	
+ 882:fastloader-ll.S ****         delay_cycles 10 * 8 - 13
+ 883               	
+ 884               	        ;; read bits 6/4
+ 885:fastloader-ll.S ****         rcall   get_bits_from_clk_data ;4+8 r24 = ____7654
+ 886:fastloader-ll.S ****         swap    r24                    ;1   r24 = 7654____
+ 887:fastloader-ll.S ****         lsr     r24                    ;1   r24 = _7654___
+ 888               	
+ 889:fastloader-ll.S ****         delay_cycles 14 * 8 - 14
+ 890               	
+ 891               	        ;; read bits 3/1
+ 892:fastloader-ll.S ****         rcall   get_bits_from_clk_data ;4+8 r24 = _76543_1
+ 893:fastloader-ll.S ****         lsl     r24                    ;1   r24 = 76543_1_
+ 894               	
+ 895:fastloader-ll.S ****         delay_cycles 10 * 8 - 13
+ 896               	
+ 897               	        ;; read bits 2/0
+ 898:fastloader-ll.S ****         rcall   get_bits_from_clk_data ;4+8 r24 = 76543210
+ 899               	
+ 900:fastloader-ll.S ****         delay_cycles 20*8       ; wait a bit so the C64 can return the bus to idle state
+ 901               	
+ 902:fastloader-ll.S ****         clr     r25             ; clear upper byte of return value
+ 903:fastloader-ll.S ****         com     r24             ; invert data byte
+ 904               	
+ 905               	uload3_abort:
+ 906:fastloader-ll.S ****         sei
+ 907:fastloader-ll.S ****         ret
+ 908               	
+ 909               	
+ 910               	        ;;
+ 911               	        ;; Send a byte using the ULoad Model 3 protocol
+ 912               	        ;;
+ 913               	        .global uload3_send_byte
+ 914               	uload3_send_byte:
+ 915:fastloader-ll.S ****         cli
+ 916               	
+ 917               	        ;; DATA low
+ 918:fastloader-ll.S ****         sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 919               	
+ 920               	        ;; wait for CLOCK low
+ 921:fastloader-ll.S **** 1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 922:fastloader-ll.S ****         rjmp    2f
+ 923:fastloader-ll.S ****         sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 924:fastloader-ll.S ****         rjmp    1b
+ 925               	
+ 926               	        ;; DATA high
+ 927:fastloader-ll.S ****         cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 928               	
+ 929               	        ;; wait for CLOCK high - 2 to 7 cycles, assuming 5
+ 930               	1:
+ 931:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 932:fastloader-ll.S ****         rjmp    2f
+ 933:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 934:fastloader-ll.S ****         rjmp    1b
+ 935               	
+ 936               	        ;; prepare transmission
+ 937:fastloader-ll.S ****         mov     r0, r24         ;1 - move data to output register
+ 938:fastloader-ll.S ****         com     r0              ;1 - invert byte
+ 939:fastloader-ll.S ****         ldi     r24, 4          ;1 - number of loops
+ 940:fastloader-ll.S ****         delay_cycles (14-8) * 8 - 8 + 6 + 3 ; initial delay before first bit pair
+ 941               	
+ 942               	uload3_bitloop:
+ 943:fastloader-ll.S ****         delay_cycles 8 * 8 - 16 - 3   ; delay between bit pairs
+ 944:fastloader-ll.S ****         rcall   send_bits_to_clk_data ;10+6
+ 945:fastloader-ll.S ****         dec     r24                   ;1 - decrement pair counter
+ 946:fastloader-ll.S ****         brne    uload3_bitloop        ;2 - continue loop
+ 947               	
+ 948:fastloader-ll.S ****         delay_cycles 10*8 - 9   ; delay before releasing clock/data
+ 949               	
+ 950               	        ;; release CLOCK+DATA
+ 951:fastloader-ll.S ****         cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 952:fastloader-ll.S ****         cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 953:fastloader-ll.S ****         rcall   delay1us        ; safety
+ 954               	2:
+ 955:fastloader-ll.S ****         sei
+ 956:fastloader-ll.S ****         ret
+ 957               	#endif
+ 958               	
+ 959               	#ifdef CONFIG_LOADER_EPYXCART
+ 960               	        ;; send bits 7 and 5 of r0 to clock/data
+ 961               	        ;; masked contents of IEC_OUT expected in r19
+ 962               	        ;; 8 cycles from rcall to out, 4 to return
+ 963               	epyx_bitpair:
+ 964               	        ;; rcall - 3
+ 965:fastloader-ll.S ****         bst     r0, 7                      ; 1
+ 966:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK        ; 1
+ 967:fastloader-ll.S ****         bst     r0, 5                      ; 1
+ 968:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA         ; 1
+ 969:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1
+ 970:fastloader-ll.S ****         ret                                ; 4
+ 971               	
+ 972               	        ;;
+ 973               	        ;; Send a byte using the Epyx Fastload cartridge protocol
+ 974               	        ;;
+ 975               	        .global epyxcart_send_byte
+ 976               	epyxcart_send_byte:
+ 977               	        ;; DATA and CLOCK high
+ 978:fastloader-ll.S ****         cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 979:fastloader-ll.S ****         cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 980:fastloader-ll.S ****         rcall   delay1us
+ 981               	
+ 982               	        ;; prepare data
+ 983:fastloader-ll.S ****         in      r19, _SFR_IO_ADDR(IEC_OUT)
+ 984:fastloader-ll.S ****         andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 985               	
+ 986               	        ;; wait for DATA high or ATN low
+ 987:fastloader-ll.S **** 1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 988:fastloader-ll.S ****         rjmp    epyxcart_atnabort
+ 989:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+ 990:fastloader-ll.S ****         rjmp    1b
+ 991               	
+ 992:fastloader-ll.S ****         mov     r0, r24             ; 1
+ 993:fastloader-ll.S ****         delay_cycles (10*8 - 9)
+ 994:fastloader-ll.S ****         rcall   epyx_bitpair        ; 8+4 - bits 7 and 5
+ 995               	
+ 996:fastloader-ll.S ****         lsl     r0                  ; 1
+ 997:fastloader-ll.S ****         delay_cycles (10*8 - 13)
+ 998:fastloader-ll.S ****         rcall   epyx_bitpair        ; 8+4 - bits 6 and 4
+ 999               	
+1000:fastloader-ll.S ****         swap    r24                 ; 1
+1001:fastloader-ll.S ****         mov     r0, r24             ; 1
+1002:fastloader-ll.S ****         delay_cycles (10*8 - 14)
+1003:fastloader-ll.S ****         rcall   epyx_bitpair        ; 8+4 - bits 3 and 1
+ 1004               	
+1005:fastloader-ll.S ****         lsl     r0                  ; 1
+1006:fastloader-ll.S ****         delay_cycles (10*8 - 13)
+1007:fastloader-ll.S ****         rcall   epyx_bitpair        ; 8+4 - bits 2 and 0
+ 1008               	
+1009:fastloader-ll.S ****         delay_cycles 20*8  ; final delay so the data stays valid long enough
+ 1010               	
+1011:fastloader-ll.S ****         clr     r24
+1012:fastloader-ll.S ****         ret
+ 1013               	
+ 1014               	epyxcart_atnabort:
+1015:fastloader-ll.S ****         ldi     r24, 1
+1016:fastloader-ll.S ****         ret
+ 1017               	
+ 1018               	#endif
+ 1019               	
+ 1020               	#ifdef CONFIG_LOADER_GEOS
+ 1021               	        ;;
+ 1022               	        ;; read a byte using the GEOS protocol (common part)
+ 1023               	        ;;
+ 1024               	geos_get_byte_common:
+1025:fastloader-ll.S ****         clr     r24
+ 1026               	
+ 1027               	        ;; wait until clock is high
+1028:fastloader-ll.S **** 1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+1029:fastloader-ll.S ****         rjmp    1b
+ 1030               	
+ 1031               	        ;; wait until clock is low
+1032:fastloader-ll.S **** 1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK ; 1/2
+1033:fastloader-ll.S ****         rjmp    1b
+ 1034               	
+ 1035               	        ;; delay
+1036:fastloader-ll.S ****         delay_cycles 15*8 - 2
+ 1037               	
+ 1038               	        ;; get bits 4 and 5
+1039:fastloader-ll.S ****         in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+1040:fastloader-ll.S ****         bst     r19, IEC_PIN_CLOCK         ; 1
+1041:fastloader-ll.S ****         bld     r24, 4-1                   ; 1 - r24 = ....4...
+1042:fastloader-ll.S ****         bst     r19, IEC_PIN_DATA          ; 1
+1043:fastloader-ll.S ****         bld     r24, 5-1                   ; 1 - r24 = ...54...
+ 1044               	
+ 1045               	        ;; delay
+1046:fastloader-ll.S ****         delay_cycles 14*8 - 5
+ 1047               	
+ 1048               	        ;; get bits 6 and 7
+1049:fastloader-ll.S ****         in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+1050:fastloader-ll.S ****         bst     r19, IEC_PIN_CLOCK         ; 1
+1051:fastloader-ll.S ****         bld     r24, 6-1                   ; 1 - r24 = ..654...
+1052:fastloader-ll.S ****         bst     r19, IEC_PIN_DATA          ; 1
+1053:fastloader-ll.S ****         bld     r24, 7-1                   ; 1 - r24 = .7654...
+ 1054               	
+1055:fastloader-ll.S ****         ret                                ; 4
+ 1056               	
+ 1057               	        ;;
+ 1058               	        ;; read a byte using the GEOS 1MHz (1541) protocol
+ 1059               	        ;;
+ 1060               	        .global geos_get_byte_1mhz
+ 1061               	geos_get_byte_1mhz:
+1062:fastloader-ll.S ****         rcall   geos_get_byte_common   ; 3
+ 1063               	
+ 1064               	        ;; delay
+1065:fastloader-ll.S ****         delay_cycles 14*8 - 9 - 4
+ 1066               	
+ 1067               	        ;; get bits 3 and 1
+1068:fastloader-ll.S ****         rcall   get_bits_from_clk_data ; 4+8 - r24 = .76543.1
+1069:fastloader-ll.S ****         lsl     r24                    ; 1     r24 = 76543.1.
+ 1070               	
+ 1071               	        ;; delay
+1072:fastloader-ll.S ****         delay_cycles 16*8 - 9 - 4
+ 1073               	
+ 1074               	        ;; get bits 2 and 0
+1075:fastloader-ll.S ****         rcall   get_bits_from_clk_data ; 4+8 - r24 = 76543210
+ 1076               	
+ 1077               	        ;; post-process received value and return
+1078:fastloader-ll.S ****         delay_cycles 11*8
+1079:fastloader-ll.S ****         com     r24             ; negate all bits
+1080:fastloader-ll.S ****         clr     r25             ; clear high byte of return value
+1081:fastloader-ll.S ****         ret
+ 1082               	
+ 1083               	
+ 1084               	        ;;
+ 1085               	        ;; read a byte using the GEOS 2MHz (1571/81) protocol
+ 1086               	        ;;
+ 1087               	        .global geos_get_byte_2mhz
+ 1088               	geos_get_byte_2mhz:
+1089:fastloader-ll.S ****         rcall   geos_get_byte_common   ; 3
+ 1090               	
+ 1091               	        ;; delay
+1092:fastloader-ll.S ****         delay_cycles 19*4 - 9 - 4
+ 1093               	
+ 1094               	        ;; get bits 3 and 1
+1095:fastloader-ll.S ****         rcall   get_bits_from_clk_data ; 4+8 - r24 = .76543.1
+1096:fastloader-ll.S ****         lsl     r24                    ; 1     r24 = 76543.1.
+ 1097               	
+ 1098               	        ;; delay
+1099:fastloader-ll.S ****         delay_cycles 22*4 - 9 - 4
+ 1100               	
+ 1101               	        ;; get bits 2 and 0
+1102:fastloader-ll.S ****         rcall   get_bits_from_clk_data ; 4+8 - r24 = 76543210
+ 1103               	
+ 1104               	        ;;  post process received value and return
+1105:fastloader-ll.S ****         delay_cycles 11*8
+1106:fastloader-ll.S ****         com     r24             ; negate all bits
+1107:fastloader-ll.S ****         clr     r25             ; clear high byte of return value
+1108:fastloader-ll.S ****         ret
+ 1109               	
+ 1110               	
+ 1111               	        ;;
+ 1112               	        ;; common part of all geos_send_byte implementations
+ 1113               	        ;;  returns 7 cycles after clock low
+ 1114               	        ;;
+ 1115               	geos_send_byte_common:
+ 1116               	        ;; CLOCK/DATA high
+1117:fastloader-ll.S ****         cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+1118:fastloader-ll.S ****         cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+1119:fastloader-ll.S ****         rcall   delay1us
+ 1120               	
+ 1121               	        ;; wait until CLOCK is low
+1122:fastloader-ll.S **** 1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+1123:fastloader-ll.S ****         rjmp    1b
+ 1124               	
+ 1125               	        ;; preserve non-IEC lines on IEC_OUT port
+1126:fastloader-ll.S ****         in      r19, _SFR_IO_ADDR(IEC_OUT) ; 1
+1127:fastloader-ll.S ****         andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ) ; 1
+1128:fastloader-ll.S ****         mov     r0, r19             ; 1
+1129:fastloader-ll.S ****         ret                         ; 4
+ 1130               	
+ 1131               	        ;;
+ 1132               	        ;; send a byte using the GEOS 1MHz protocol
+ 1133               	        ;; called with byte in r24, no return value
+ 1134               	        ;;
+ 1135               	        .global geos_send_byte_1mhz
+ 1136               	geos_send_byte_1mhz:
+1137:fastloader-ll.S ****         rcall   geos_send_byte_common ; 7
+ 1138               	
+ 1139               	        ;; prepare bits 3+1
+1140:fastloader-ll.S ****         bst     r24, 3              ; 1 - read bit 3
+1141:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+1142:fastloader-ll.S ****         bst     r24, 1              ; 1 - read bit 1
+1143:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+ 1144               	
+ 1145               	        ;; delay (1MHz speeder)
+1146:fastloader-ll.S ****         delay_cycles 18*8 - 14
+1147:fastloader-ll.S ****         rjmp    geos_send_byte_tail   ; 2
+ 1148               	
+ 1149               	
+ 1150               	        ;;
+ 1151               	        ;; send a byte using the GEOS 2MHz protocol
+ 1152               	        ;; called with byte in r24, no return value
+ 1153               	        ;;
+ 1154               	        .global geos_send_byte_2mhz
+ 1155               	geos_send_byte_2mhz:
+1156:fastloader-ll.S ****         rcall   geos_send_byte_common ; 7
+ 1157               	
+ 1158               	        ;; prepare bits 3+1
+1159:fastloader-ll.S ****         bst     r24, 3              ; 1 - read bit 3
+1160:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+1161:fastloader-ll.S ****         bst     r24, 1              ; 1 - read bit 1
+1162:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+ 1163               	
+ 1164               	        ;; delay (2MHz speeder)
+1165:fastloader-ll.S **** 1:      delay_cycles 9*8 - 12
+ 1166               	
+ 1167               	geos_send_byte_tail:
+ 1168               	        ;; send to bus
+1169:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1 - send to bus
+ 1170               	
+ 1171               	        ;; prepare bits 2+0
+1172:fastloader-ll.S ****         mov     r19, r0             ; 1
+1173:fastloader-ll.S ****         bst     r24, 2              ; 1 - read bit 2
+1174:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+1175:fastloader-ll.S ****         bst     r24, 0              ; 1 - read bit 0
+1176:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+ 1177               	
+ 1178               	        ;; delay
+1179:fastloader-ll.S ****         delay_cycles 10*8 - 6
+ 1180               	
+ 1181               	        ;; send to bus
+1182:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1
+ 1183               	
+ 1184               	        ;; prepare bits 4+5
+1185:fastloader-ll.S ****         com     r24                 ; 1 - remaining bits are sent with high=1
+1186:fastloader-ll.S ****         mov     r19, r0             ; 1
+1187:fastloader-ll.S ****         bst     r24, 4              ; 1 - read bit 4
+1188:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+1189:fastloader-ll.S ****         bst     r24, 5              ; 1 - read bit 5
+1190:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+ 1191               	
+ 1192               	        ;; delay
+1193:fastloader-ll.S ****         delay_cycles 11*8 - 7
+ 1194               	
+ 1195               	        ;; send to bus
+1196:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1
+ 1197               	
+ 1198               	        ;; prepare bits 6+7
+1199:fastloader-ll.S ****         mov     r19, r0             ; 1
+1200:fastloader-ll.S ****         bst     r24, 6              ; 1 - read bit 6
+1201:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+1202:fastloader-ll.S ****         bst     r24, 7              ; 1 - read bit 7
+1203:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+ 1204               	
+ 1205               	        ;; delay
+1206:fastloader-ll.S ****         delay_cycles 12*8 - 6
+ 1207               	
+ 1208               	        ;; send to bus
+1209:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1
+ 1210               	
+ 1211               	        ;; final delay
+1212:fastloader-ll.S ****         delay_cycles 22*8
+ 1213               	
+1214:fastloader-ll.S ****         ret
+ 1215               	
+ 1216               	
+ 1217               	        ;;
+ 1218               	        ;; send a byte using the 2MHz 1581 Configure 2.1 GEOS protocol
+ 1219               	        ;; called with byte in r24, no return value
+ 1220               	        ;;
+ 1221               	        .global geos_send_byte_1581_21
+ 1222               	geos_send_byte_1581_21:
+1223:fastloader-ll.S ****         com     r24                   ; invert so the bits are sent with high=1
+1224:fastloader-ll.S ****         rcall   geos_send_byte_common ; 7
+1225:fastloader-ll.S ****         mov     r0, r24               ; 1 - move data to target register
+ 1226               	
+ 1227               	        ;; delay
+1228:fastloader-ll.S ****         delay_cycles 7*8 - 18
+ 1229               	
+ 1230               	        ;; send bits 0+1
+1231:fastloader-ll.S ****         rcall   send_bits_to_clk_data ; 10+6
+ 1232               	
+ 1233               	        ;; delay
+1234:fastloader-ll.S ****         delay_cycles 7*8 - 16
+ 1235               	
+ 1236               	        ;; send bits 2+3
+1237:fastloader-ll.S ****         rcall   send_bits_to_clk_data ; 10+6
+ 1238               	
+ 1239               	        ;; delay
+1240:fastloader-ll.S ****         delay_cycles 10*8 - 16
+ 1241               	
+ 1242               	        ;; send bits 4+5
+1243:fastloader-ll.S ****         rcall   send_bits_to_clk_data ; 10+6
+ 1244               	
+ 1245               	        ;; delay
+1246:fastloader-ll.S ****         delay_cycles 9*8 - 16
+ 1247               	
+ 1248               	        ;; send bits 6+7
+1249:fastloader-ll.S ****         rcall   send_bits_to_clk_data ; 10+6
+ 1250               	
+ 1251               	        ;; final delay
+1252:fastloader-ll.S ****         delay_cycles 12*8
+ 1253               	
+1254:fastloader-ll.S ****         ret
+ 1255               	
+ 1256               	#endif
+ 1257               	
+ 1258               	#ifdef CONFIG_LOADER_WHEELS
+ 1259               	        ;;
+ 1260               	        ;; send a byte using the Wheels protocol
+ 1261               	        ;; called with byte in r24, no return value
+ 1262               	        ;;
+ 1263               	        .global wheels_send_byte_1mhz
+ 1264               	wheels_send_byte_1mhz:
+1265:fastloader-ll.S ****         rcall   geos_send_byte_common ; 7
+ 1266               	
+1267:fastloader-ll.S ****         rcall   wheels_nibble       ; 3 - send lower nibble
+1268:fastloader-ll.S ****         swap    r24                 ; 1 - swap nibbles
+ 1269               	
+1270:fastloader-ll.S ****         delay_cycles (14-9)*8 + 15 - 14
+1271:fastloader-ll.S ****         rcall   wheels_nibble       ; 3 - send upper nibble
+ 1272               	
+ 1273               	        ;; final delay
+1274:fastloader-ll.S ****         delay_cycles 22*8
+1275:fastloader-ll.S ****         ret
+ 1276               	
+ 1277               	wheels_nibble:
+ 1278               	        ;; prepare bits 3+1 (7+5)
+1279:fastloader-ll.S ****         mov     r19, r0             ; 1
+1280:fastloader-ll.S ****         bst     r24, 3              ; 1 - read bit 3
+1281:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+1282:fastloader-ll.S ****         bst     r24, 1              ; 1 - read bit 1
+1283:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+ 1284               	
+ 1285               	        ;; delay
+1286:fastloader-ll.S ****         delay_cycles 9*8 - 15
+ 1287               	
+ 1288               	        ;; send to bus
+1289:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1 - send to bus
+ 1290               	
+ 1291               	        ;; prepare bits 2+0 (6+4)
+1292:fastloader-ll.S ****         mov     r19, r0             ; 1
+1293:fastloader-ll.S ****         bst     r24, 2              ; 1 - read bit 2
+1294:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+1295:fastloader-ll.S ****         bst     r24, 0              ; 1 - read bit 0
+1296:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+ 1297               	
+ 1298               	        ;; delay
+1299:fastloader-ll.S ****         delay_cycles 14*8 - 6
+ 1300               	
+ 1301               	        ;; send to bus
+1302:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1 - send to bus
+1303:fastloader-ll.S ****         ret                                ; 4
+ 1304               	
+ 1305               	
+ 1306               	        ;;
+ 1307               	        ;; read a byte using the Wheels protocol
+ 1308               	        ;;
+ 1309               	        .global wheels_get_byte_1mhz
+ 1310               	wheels_get_byte_1mhz:
+1311:fastloader-ll.S ****         clr     r24
+ 1312               	
+ 1313               	        ;; wait until clock is high
+1314:fastloader-ll.S **** 1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+1315:fastloader-ll.S ****         rjmp    1b
+ 1316               	
+ 1317               	        ;; wait until clock is low
+1318:fastloader-ll.S **** 1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK ; 1/2
+1319:fastloader-ll.S ****         rjmp    1b
+ 1320               	
+ 1321               	        ;; delay
+1322:fastloader-ll.S ****         delay_cycles 16 * 8 - 5
+ 1323               	
+ 1324               	        ;; read bits 7/5
+1325:fastloader-ll.S ****         rcall   get_bits_from_clk_data ; 4+8 r24 = _____7_5
+1326:fastloader-ll.S ****         lsl     r24                    ; 1   r24 = ____7_5_
+ 1327               	
+1328:fastloader-ll.S ****         delay_cycles 10 * 8 - 13
+ 1329               	
+ 1330               	        ;; read bits 6/4
+1331:fastloader-ll.S ****         rcall   get_bits_from_clk_data ; 4+8 r24 = ____7654
+1332:fastloader-ll.S ****         swap    r24                    ; 1   r24 = 7654____
+1333:fastloader-ll.S ****         lsr     r24                    ; 1   r24 = _7654___
+ 1334               	
+1335:fastloader-ll.S ****         delay_cycles 15 * 8 - 14
+ 1336               	
+ 1337               	        ;; read bits 3/1
+1338:fastloader-ll.S ****         rcall   get_bits_from_clk_data ; 4+8 r24 = _76543_1
+1339:fastloader-ll.S ****         lsl     r24                    ; 1   r24 = 76543_1_
+ 1340               	
+1341:fastloader-ll.S ****         delay_cycles 13 * 8 - 13
+ 1342               	
+ 1343               	        ;; read bits 2/0
+1344:fastloader-ll.S ****         rcall   get_bits_from_clk_data ; 4+8 r24 = 76543210
+ 1345               	
+1346:fastloader-ll.S ****         delay_cycles 20*8
+ 1347               	
+1348:fastloader-ll.S ****         clr     r25             ; clear upper byte of return value
+1349:fastloader-ll.S ****         com     r24             ; invert data byte
+ 1350               	
+1351:fastloader-ll.S ****         ret
+ 1352               	
+ 1353               	        ;;
+ 1354               	        ;; read a byte using the Wheels 4.4 1MHz protocol
+ 1355               	        ;;
+ 1356               	        .global wheels44_get_byte_1mhz
+ 1357               	wheels44_get_byte_1mhz:
+1358:fastloader-ll.S ****         clr     r24
+ 1359               	
+ 1360               	        ;; wait until clock is high
+1361:fastloader-ll.S **** 1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+1362:fastloader-ll.S ****         rjmp    1b
+ 1363               	
+ 1364               	        ;; wait until clock is low
+1365:fastloader-ll.S **** 1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK ; 1/2
+1366:fastloader-ll.S ****         rjmp    1b
+ 1367               	
+ 1368               	        ;; delay
+1369:fastloader-ll.S ****         delay_cycles 17 * 8 - 5
+ 1370               	
+ 1371               	        ;; read bits 7/5
+1372:fastloader-ll.S ****         rcall   get_bits_from_clk_data ; 4+8 r24 = _____7_5
+1373:fastloader-ll.S ****         lsl     r24                    ; 1   r24 = ____7_5_
+ 1374               	
+1375:fastloader-ll.S ****         delay_cycles 11 * 8 - 13
+ 1376               	
+ 1377               	        ;; read bits 6/4
+1378:fastloader-ll.S ****         rcall   get_bits_from_clk_data ; 4+8 r24 = ____7654
+1379:fastloader-ll.S ****         swap    r24                    ; 1   r24 = 7654____
+1380:fastloader-ll.S ****         lsr     r24                    ; 1   r24 = _7654___
+ 1381               	
+1382:fastloader-ll.S ****         delay_cycles 17 * 8 - 14
+ 1383               	
+ 1384               	        ;; read bits 3/1
+1385:fastloader-ll.S ****         rcall   get_bits_from_clk_data ; 4+8 r24 = _76543_1
+1386:fastloader-ll.S ****         lsl     r24                    ; 1   r24 = 76543_1_
+ 1387               	
+1388:fastloader-ll.S ****         delay_cycles 16 * 8 - 13
+ 1389               	
+ 1390               	        ;; read bits 2/0
+1391:fastloader-ll.S ****         rcall   get_bits_from_clk_data ; 4+8 r24 = 76543210
+ 1392               	
+1393:fastloader-ll.S ****         delay_cycles 20*8
+ 1394               	
+1395:fastloader-ll.S ****         clr     r25             ; clear upper byte of return value
+1396:fastloader-ll.S ****         com     r24             ; invert data byte
+ 1397               	
+1398:fastloader-ll.S ****         ret
+ 1399               	
+ 1400               	        ;;
+ 1401               	        ;; read a byte using the Wheels 4.4 2MHz protocol
+ 1402               	        ;;
+ 1403               	        .global wheels44_get_byte_2mhz
+ 1404               	wheels44_get_byte_2mhz:
+1405:fastloader-ll.S ****         clr     r24
+ 1406               	
+ 1407               	        ;; wait until clock is high
+1408:fastloader-ll.S **** 1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+1409:fastloader-ll.S ****         rjmp    1b
+ 1410               	
+ 1411               	        ;; wait until clock is low
+1412:fastloader-ll.S **** 1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK ; 1/2
+1413:fastloader-ll.S ****         rjmp    1b
+ 1414               	
+ 1415               	        ;; delay
+1416:fastloader-ll.S ****         delay_cycles 15*8 - 2
+ 1417               	
+ 1418               	        ;; get bits 0 and 1
+1419:fastloader-ll.S ****         in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+1420:fastloader-ll.S ****         bst     r19, IEC_PIN_CLOCK         ; 1
+1421:fastloader-ll.S ****         bld     r24, 0                     ; 1 - r24 = .......0
+1422:fastloader-ll.S ****         bst     r19, IEC_PIN_DATA          ; 1
+1423:fastloader-ll.S ****         bld     r24, 1                     ; 1 - r24 = ......10
+ 1424               	
+ 1425               	        ;; delay
+1426:fastloader-ll.S ****         delay_cycles 11*8 - 5
+ 1427               	
+ 1428               	        ;; get bits 2 and 3
+1429:fastloader-ll.S ****         in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+1430:fastloader-ll.S ****         bst     r19, IEC_PIN_CLOCK         ; 1
+1431:fastloader-ll.S ****         bld     r24, 2                     ; 1 - r24 = .....210
+1432:fastloader-ll.S ****         bst     r19, IEC_PIN_DATA          ; 1
+1433:fastloader-ll.S ****         bld     r24, 3                     ; 1 - r24 = ....3210
+ 1434               	
+ 1435               	        ;; delay
+1436:fastloader-ll.S ****         delay_cycles 11*8 - 5
+ 1437               	
+ 1438               	        ;; get bits 4 and 5
+1439:fastloader-ll.S ****         in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+1440:fastloader-ll.S ****         bst     r19, IEC_PIN_CLOCK         ; 1
+1441:fastloader-ll.S ****         bld     r24, 4                     ; 1 - r24 = ...43210
+1442:fastloader-ll.S ****         bst     r19, IEC_PIN_DATA          ; 1
+1443:fastloader-ll.S ****         bld     r24, 5                     ; 1 - r24 = ..543210
+ 1444               	
+ 1445               	        ;; delay
+1446:fastloader-ll.S ****         delay_cycles 11*8 - 5
+ 1447               	
+ 1448               	        ;; get bits 6 and 7
+1449:fastloader-ll.S ****         in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+1450:fastloader-ll.S ****         bst     r19, IEC_PIN_CLOCK         ; 1
+1451:fastloader-ll.S ****         bld     r24, 6                     ; 1 - r24 = .6543210
+1452:fastloader-ll.S ****         bst     r19, IEC_PIN_DATA          ; 1
+1453:fastloader-ll.S ****         bld     r24, 7                     ; 1 - r24 = 76543210
+ 1454               	
+ 1455               	        ;; safety delay
+1456:fastloader-ll.S ****         delay_cycles 12*8
+ 1457               	
+ 1458               	        ;; post process received value and return
+1459:fastloader-ll.S ****         com     r24                  ; negate all bits
+1460:fastloader-ll.S ****         clr     r25                  ; clear high byte of return value
+1461:fastloader-ll.S ****         ret
+ 1462               	
+ 1463               	
+ 1464               	        ;;
+ 1465               	        ;; send a byte using the Wheels 4.4 2MHz protocol
+ 1466               	        ;; called with byte in r24, no return value
+ 1467               	        ;;
+ 1468               	        .global wheels44_send_byte_2mhz
+ 1469               	wheels44_send_byte_2mhz:
+1470:fastloader-ll.S ****         com     r24                   ; invert so the bits are sent with high=1
+1471:fastloader-ll.S ****         rcall   geos_send_byte_common ; 7
+1472:fastloader-ll.S ****         mov     r0, r24               ; 1 - move data to target register
+ 1473               	
+ 1474               	        ;; delay
+1475:fastloader-ll.S ****         delay_cycles 7*8 - 18
+ 1476               	
+ 1477               	        ;; send bits 0+1
+1478:fastloader-ll.S ****         rcall   send_bits_to_clk_data ; 10+6
+ 1479               	
+ 1480               	        ;; delay
+1481:fastloader-ll.S ****         delay_cycles 8*8 - 16
+ 1482               	
+ 1483               	        ;; send bits 2+3
+1484:fastloader-ll.S ****         rcall   send_bits_to_clk_data ; 10+6
+ 1485               	
+ 1486               	        ;; delay
+1487:fastloader-ll.S ****         delay_cycles 11*8 - 16
+ 1488               	
+ 1489               	        ;; send bits 4+5
+1490:fastloader-ll.S ****         rcall   send_bits_to_clk_data ; 10+6
+ 1491               	
+ 1492               	        ;; delay
+1493:fastloader-ll.S ****         delay_cycles 11*8 - 16
+ 1494               	
+ 1495               	        ;; send bits 6+7
+1496:fastloader-ll.S ****         rcall   send_bits_to_clk_data ; 10+6
+ 1497               	
+ 1498               	        ;; final delay
+1499:fastloader-ll.S ****         delay_cycles 14*8
+ 1500               	
+1501:fastloader-ll.S ****         ret
+ 1502               	
+ 1503               	#endif
+ 1504               	
+ 1505               	#ifdef CONFIG_LOADER_AR6
+ 1506               	        ;;
+ 1507               	        ;; send a byte using the AR6-1581 protocol
+ 1508               	        ;; called with byte in r24, no return value
+ 1509               	        ;;
+ 1510               	        .global ar6_1581_send_byte
+ 1511               	ar6_1581_send_byte:
+1512:fastloader-ll.S ****         cli
+ 1513               	
+ 1514               	        ;; set up data byte for transmission
+1515:fastloader-ll.S ****         com     r24
+1516:fastloader-ll.S ****         mov     r0, r24
+ 1517               	
+ 1518               	        ;; clock high
+1519:fastloader-ll.S ****         cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 1520               	
+ 1521               	        ;; wait until data is high
+1522:fastloader-ll.S **** 1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+1523:fastloader-ll.S ****         rjmp    1b
+ 1524               	
+ 1525               	        ;; delay
+1526:fastloader-ll.S ****         delay_cycles 5*8 - 10
+ 1527               	
+ 1528               	        ;; send bits 0+1
+1529:fastloader-ll.S ****         rcall   send_bits_to_clk_data ; 10+6
+ 1530               	
+ 1531               	        ;; delay
+1532:fastloader-ll.S ****         delay_cycles 8*8 - 16
+ 1533               	
+ 1534               	        ;; send bits 2+3
+1535:fastloader-ll.S ****         rcall   send_bits_to_clk_data ; 10+6
+ 1536               	
+ 1537               	        ;; delay
+1538:fastloader-ll.S ****         delay_cycles 8*8 - 16
+ 1539               	
+ 1540               	        ;; send bits 4+5
+1541:fastloader-ll.S ****         rcall   send_bits_to_clk_data ; 10+6
+ 1542               	
+ 1543               	        ;; delay
+1544:fastloader-ll.S ****         delay_cycles 8*8 - 16
+ 1545               	
+ 1546               	        ;; send bits 6+7
+1547:fastloader-ll.S ****         rcall   send_bits_to_clk_data ; 10+6
+ 1548               	
+ 1549               	        ;; delay
+1550:fastloader-ll.S ****         delay_cycles 8*8+4 - 6 - 2
+ 1551               	
+ 1552               	        ;; set clock low, data high
+1553:fastloader-ll.S ****         cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA  ; 1
+1554:fastloader-ll.S ****         sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK ; 1
+ 1555               	
+1556:fastloader-ll.S ****         sei
+1557:fastloader-ll.S ****         ret
+ 1558               	
+ 1559               	        ;;
+ 1560               	        ;; receive a byte using the AR6-1581-PAL protocol
+ 1561               	        ;; returns byte in r24
+ 1562               	        ;;
+ 1563               	        .global ar6_1581p_get_byte
+ 1564               	ar6_1581p_get_byte:
+1565:fastloader-ll.S ****         cli
+ 1566               	
+1567:fastloader-ll.S ****         clr     r24
+ 1568               	
+ 1569               	        ;; clock high
+1570:fastloader-ll.S ****         cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 1571               	
+ 1572               	        ;; wait until data is low
+1573:fastloader-ll.S **** 1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+1574:fastloader-ll.S ****         rjmp    1b
+ 1575               	
+ 1576               	        ;; wait until data is high
+1577:fastloader-ll.S **** 1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+1578:fastloader-ll.S ****         rjmp    1b
+ 1579               	
+ 1580               	        ;; delay
+1581:fastloader-ll.S ****         delay_cycles 12*8 - 4
+ 1582               	
+ 1583               	        ;; receive bits 7+5
+1584:fastloader-ll.S ****         rcall   get_bits_from_clk_data ; 4+8 - r24 = .....7.5
+1585:fastloader-ll.S ****         lsl     r24                    ; 1   - r24 = ....7.5.
+ 1586               	
+ 1587               	        ;; delay
+1588:fastloader-ll.S ****         delay_cycles 10*8 - 9 - 4
+ 1589               	
+ 1590               	        ;; receive bits 6+4
+1591:fastloader-ll.S ****         rcall   get_bits_from_clk_data ; 4+8 - r24 = ....7654
+1592:fastloader-ll.S ****         swap    r24                    ; 1   - r24 = 7654....
+1593:fastloader-ll.S ****         lsr     r24                    ; 1   - r24 = .7654...
+ 1594               	
+ 1595               	        ;; delay
+1596:fastloader-ll.S ****         delay_cycles 16*8 - 10 - 4
+ 1597               	
+ 1598               	        ;; receive bits 3+1
+1599:fastloader-ll.S ****         rcall   get_bits_from_clk_data ; 4+8 - r24 = .76543.1
+1600:fastloader-ll.S ****         lsl     r24                    ; 1   - r24 = 76543.1.
+ 1601               	
+ 1602               	        ;; delay
+1603:fastloader-ll.S ****         delay_cycles 10*8 - 9 - 4
+ 1604               	
+ 1605               	        ;; receive bits 2+0
+1606:fastloader-ll.S ****         rcall   get_bits_from_clk_data ; 4+8 - r24 = 76543210
+ 1607               	
+ 1608               	        ;; delay
+1609:fastloader-ll.S ****         delay_cycles 5*8 - 8 - 1
+ 1610               	
+ 1611               	        ;; set clock low
+1612:fastloader-ll.S ****         sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 1613               	
+ 1614               	        ;; post-processing
+1615:fastloader-ll.S ****         sei
+1616:fastloader-ll.S ****         com     r24
+1617:fastloader-ll.S ****         clr     r25
+1618:fastloader-ll.S ****         ret
+ 1619               	#endif
+ 1620               	        .end
+DEFINED SYMBOLS
+     fastloader-ll.S:56     .text:00000000 __vector_4
+     fastloader-ll.S:87     .text:00000026 iiv_atn_irq_end
+     fastloader-ll.S:83     .text:00000024 iiv_not_fl_dreamload_old
+     fastloader-ll.S:802    .text:000002a4 dreamload_get_command_old
+     fastloader-ll.S:108    .text:0000003e iiv_clock_irq_end
+     fastloader-ll.S:105    .text:0000003e iiv_not_fl_dreamload
+     fastloader-ll.S:754    .text:00000274 dreamload_get_command
+     fastloader-ll.S:171    .text:0000004c cycleloop2
+     fastloader-ll.S:173    .text:0000004e cycleloop1
+     fastloader-ll.S:175    .text:00000050 cycleloop0
+     fastloader-ll.S:195    .text:00000056 delay1us
+     fastloader-ll.S:200    .text:0000005a wait_atn_high
+     fastloader-ll.S:206    .text:00000060 wait_atn_low
+     fastloader-ll.S:221    .text:00000066 jiffy_receive
+     fastloader-ll.S:308    .text:000000ca jiffy_sendbits
+     fastloader-ll.S:336    .text:000000de jiffy_send
+     fastloader-ll.S:429    .text:00000140 js_finish
+     fastloader-ll.S:446    .text:00000148 turbodisk_byte
+     fastloader-ll.S:467    .text:0000015c tdbitloop
+     fastloader-ll.S:503    .text:00000186 turbodisk_buffer
+     fastloader-ll.S:523    .text:0000019a tdbyteloop
+     fastloader-ll.S:531    .text:000001a4 tdbitloop2
+     fastloader-ll.S:581    .text:000001d8 send_bits_to_clk_data
+     fastloader-ll.S:606    .text:000001ec get_bits_from_clk_data
+     fastloader-ll.S:627    .text:000001f8 clk_data_handshake
+     fastloader-ll.S:649    .text:0000020e fastloader_fc3_send_block
+     fastloader-ll.S:660    .text:0000021a fc3_byteloop
+     fastloader-ll.S:666    .text:00000220 fc3_bitloop
+     fastloader-ll.S:676    .text:0000022a fc3_next_byte
+     fastloader-ll.S:696    .text:0000023c fc3_get_byte
+     fastloader-ll.S:765    .text:00000282 dreamload_get_byte
+     fastloader-ll.S:768    .text:00000284 dl_bitloop
+     fastloader-ll.S:812    .text:000002b2 dreamload_get_byte_old
+     fastloader-ll.S:815    .text:000002b4 dlgb_nibble
+     fastloader-ll.S:838    .text:000002ca dreamload_send_byte
+     fastloader-ll.S:846    .text:000002d0 dsb_bitloop
+     fastloader-ll.S:867    .text:000002de uload3_get_byte
+     fastloader-ll.S:905    .text:00000312 uload3_abort
+     fastloader-ll.S:914    .text:00000316 uload3_send_byte
+     fastloader-ll.S:942    .text:00000336 uload3_bitloop
+     fastloader-ll.S:963    .text:0000034e epyx_bitpair
+     fastloader-ll.S:976    .text:0000035a epyxcart_send_byte
+     fastloader-ll.S:1014   .text:00000396 epyxcart_atnabort
+     fastloader-ll.S:1024   .text:0000039a geos_get_byte_common
+     fastloader-ll.S:1061   .text:000003c2 geos_get_byte_1mhz
+     fastloader-ll.S:1088   .text:000003dc geos_get_byte_2mhz
+     fastloader-ll.S:1115   .text:000003f6 geos_send_byte_common
+     fastloader-ll.S:1136   .text:00000408 geos_send_byte_1mhz
+     fastloader-ll.S:1167   .text:00000426 geos_send_byte_tail
+     fastloader-ll.S:1155   .text:00000418 geos_send_byte_2mhz
+     fastloader-ll.S:1222   .text:00000460 geos_send_byte_1581_21
+     fastloader-ll.S:1264   .text:00000484 wheels_send_byte_1mhz
+     fastloader-ll.S:1277   .text:00000496 wheels_nibble
+     fastloader-ll.S:1310   .text:000004b8 wheels_get_byte_1mhz
+     fastloader-ll.S:1357   .text:000004ec wheels44_get_byte_1mhz
+     fastloader-ll.S:1404   .text:00000520 wheels44_get_byte_2mhz
+     fastloader-ll.S:1469   .text:0000056c wheels44_send_byte_2mhz
+     fastloader-ll.S:1511   .text:00000590 ar6_1581_send_byte
+     fastloader-ll.S:1564   .text:000005c0 ar6_1581p_get_byte
+
+UNDEFINED SYMBOLS
+detected_loader
+fl_track
+fl_sector
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/sd2iec-sw2-firmware-0.10.3.bin b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/sd2iec-sw2-firmware-0.10.3.bin
new file mode 100644
index 00000000..0777699c
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/sd2iec-sw2-firmware-0.10.3.bin differ
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/sd2iec.bin b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/sd2iec.bin
new file mode 100644
index 00000000..0777699c
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/sd2iec.bin differ
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/sd2iec.elf b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/sd2iec.elf
new file mode 100644
index 00000000..e630223e
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/sd2iec.elf differ
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/sd2iec.hex b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/sd2iec.hex
new file mode 100644
index 00000000..af88c734
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/sd2iec.hex
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diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/sd2iec.map b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/sd2iec.map
new file mode 100644
index 00000000..6c1a452d
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m1284p/sd2iec.map
@@ -0,0 +1,2712 @@
+Archive member included to satisfy reference by file (symbol)
+
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_mulsi3.o)
+                              obj-m1284p/ff.o (__mulsi3)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_udivmodqi4.o)
+                              obj-m1284p/display.o (__udivmodqi4)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_udivmodhi4.o)
+                              obj-m1284p/ff.o (__udivmodhi4)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_udivmodsi4.o)
+                              obj-m1284p/fatops.o (__udivmodsi4)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_exit.o)
+                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o (exit)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_tablejump.o)
+                              obj-m1284p/doscmd.o (__tablejump2__)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_copy_data.o)
+                              obj-m1284p/doscmd.o (__do_copy_data)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_clear_bss.o)
+                              obj-m1284p/buffers.o (__do_clear_bss)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_umulhisi3.o)
+                              obj-m1284p/doscmd.o (__umulhisi3)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_muluhisi3.o)
+                              obj-m1284p/doscmd.o (__muluhisi3)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_prologue.o)
+                              obj-m1284p/buffers.o (__prologue_saves__)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_epilogue.o)
+                              obj-m1284p/buffers.o (__epilogue_restores__)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(isalnum.o)
+                              obj-m1284p/fatops.o (isalnum)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(cty_isfalse.o)
+                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(isalnum.o) (__ctype_isfalse)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(isalpha.o)
+                              e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(isalnum.o) (isalpha)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(toupper.o)
+                              obj-m1284p/errormsg.o (toupper)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(memcmp_P.o)
+                              obj-m1284p/doscmd.o (memcmp_P)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(memcpy_P.o)
+                              obj-m1284p/d64ops.o (memcpy_P)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(strcmp_P.o)
+                              obj-m1284p/fatops.o (strcmp_P)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(strcpy_P.o)
+                              obj-m1284p/diskchange.o (strcpy_P)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(memcmp.o)
+                              obj-m1284p/doscmd.o (memcmp)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(memcpy.o)
+                              obj-m1284p/display.o (memcpy)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(memset.o)
+                              obj-m1284p/d64ops.o (memset)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(strchr.o)
+                              obj-m1284p/doscmd.o (strchr)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(strcpy.o)
+                              obj-m1284p/doscmd.o (strcpy)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(strncpy.o)
+                              obj-m1284p/doscmd.o (strncpy)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(strrchr.o)
+                              obj-m1284p/fatops.o (strrchr)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(eerd_block_atmega1284p.o)
+                              obj-m1284p/eeprom.o (__eerd_block_m1284p)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(eerd_byte_atmega1284p.o)
+                              obj-m1284p/doscmd.o (__eerd_byte_m1284p)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(eerd_word_atmega1284p.o)
+                              obj-m1284p/eeprom.o (__eerd_word_m1284p)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(eewr_block_atmega1284p.o)
+                              obj-m1284p/eeprom.o (__eewr_block_m1284p)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(eewr_byte_atmega1284p.o)
+                              obj-m1284p/doscmd.o (__eewr_byte_m1284p)
+e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(eewr_word_atmega1284p.o)
+                              obj-m1284p/eeprom.o (__eewr_word_m1284p)
+
+Allocating common symbols
+Common symbol       size              file
+
+matchdh             0x11              obj-m1284p/buffers.o
+lastbuttonchange    0x2               obj-m1284p/timer.o
+iec_data            0x4               obj-m1284p/iec.o
+buffers             0x150             obj-m1284p/buffers.o
+command_length      0x1               obj-m1284p/doscmd.o
+device_address      0x1               obj-m1284p/iec.o
+active_keys         0x1               obj-m1284p/timer.o
+buttonstate         0x1               obj-m1284p/timer.o
+led_state           0x1               obj-m1284p/led.o
+error_buffer        0x2e              obj-m1284p/errormsg.o
+current_part        0x1               obj-m1284p/parser.o
+original_length     0x1               obj-m1284p/doscmd.o
+max_part            0x1               obj-m1284p/parser.o
+entrybuf            0x21              obj-m1284p/buffers.o
+partition           0x164             obj-m1284p/parser.o
+detected_loader     0x1               obj-m1284p/fastloader.o
+geos_send_byte      0x2               obj-m1284p/fastloader.o
+rom_filename        0x11              obj-m1284p/eeprom.o
+current_error       0x1               obj-m1284p/errormsg.o
+geos_get_byte       0x2               obj-m1284p/fastloader.o
+disk_state          0x1               obj-m1284p/diskio.o
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+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o
+LOAD obj-m1284p/buffers.o
+LOAD obj-m1284p/d64ops.o
+LOAD obj-m1284p/diskchange.o
+LOAD obj-m1284p/diskio.o
+LOAD obj-m1284p/display.o
+LOAD obj-m1284p/doscmd.o
+LOAD obj-m1284p/eeprom.o
+LOAD obj-m1284p/errormsg.o
+LOAD obj-m1284p/fastloader.o
+LOAD obj-m1284p/fatops.o
+LOAD obj-m1284p/ff.o
+LOAD obj-m1284p/fileops.o
+LOAD obj-m1284p/iec.o
+LOAD obj-m1284p/led.o
+LOAD obj-m1284p/m2iops.o
+LOAD obj-m1284p/main.o
+LOAD obj-m1284p/parser.o
+LOAD obj-m1284p/pcf8583.o
+LOAD obj-m1284p/rtc.o
+LOAD obj-m1284p/sdcard.o
+LOAD obj-m1284p/softi2c.o
+LOAD obj-m1284p/spi.o
+LOAD obj-m1284p/timer.o
+LOAD obj-m1284p/utils.o
+LOAD obj-m1284p/fastloader-ll.o
+LOAD obj-m1284p/crc7asm.o
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libm.a
+START GROUP
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libm.a
+LOAD e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a
+END GROUP
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+ .debug_frame   0x00001b14       0x24 obj-m1284p/led.o
+ .debug_frame   0x00001b38      0x1c4 obj-m1284p/m2iops.o
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+ .debug_frame   0x000022b8       0x60 obj-m1284p/utils.o
+
+.debug_str      0x00000000     0x2904
+ *(.debug_str)
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+                                0x5ba (size before relaxing)
+ .debug_str     0x000004a0      0x59c obj-m1284p/d64ops.o
+                                0xb38 (size before relaxing)
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+ .debug_str     0x00000c9c       0x4c obj-m1284p/diskio.o
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+                                0xab7 (size before relaxing)
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+                                0x7a1 (size before relaxing)
+ .debug_str     0x0000253d        0x6 obj-m1284p/led.o
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+ .debug_str     0x00002543       0xbb obj-m1284p/m2iops.o
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+ .debug_str     0x000025fe       0x2f obj-m1284p/main.o
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+ .debug_str     0x0000262d       0x3b obj-m1284p/parser.o
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+ .debug_str     0x00002668       0x38 obj-m1284p/pcf8583.o
+                                0x2c8 (size before relaxing)
+ .debug_str     0x000026a0        0x6 obj-m1284p/rtc.o
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+ .debug_str     0x000026a6      0x19b obj-m1284p/sdcard.o
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+ .debug_str     0x000028ee       0x16 obj-m1284p/utils.o
+                                0x1e9 (size before relaxing)
+
+.debug_loc      0x00000000    0x11555
+ *(.debug_loc)
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+ .debug_loc     0x000003ea     0x276e obj-m1284p/d64ops.o
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+ .debug_loc     0x0000f658      0x8c9 obj-m1284p/parser.o
+ .debug_loc     0x0000ff21       0xb3 obj-m1284p/pcf8583.o
+ .debug_loc     0x0000ffd4       0x21 obj-m1284p/rtc.o
+ .debug_loc     0x0000fff5      0xe83 obj-m1284p/sdcard.o
+ .debug_loc     0x00010e78      0x499 obj-m1284p/softi2c.o
+ .debug_loc     0x00011311       0x4b obj-m1284p/spi.o
+ .debug_loc     0x0001135c       0x9f obj-m1284p/timer.o
+ .debug_loc     0x000113fb      0x15a obj-m1284p/utils.o
+
+.debug_macinfo
+ *(.debug_macinfo)
+
+.debug_weaknames
+ *(.debug_weaknames)
+
+.debug_funcnames
+ *(.debug_funcnames)
+
+.debug_typenames
+ *(.debug_typenames)
+
+.debug_varnames
+ *(.debug_varnames)
+
+.debug_pubtypes
+ *(.debug_pubtypes)
+
+.debug_ranges   0x00000000      0xa98
+ *(.debug_ranges)
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+ .debug_ranges  0x000001b0       0x30 obj-m1284p/diskchange.o
+ .debug_ranges  0x000001e0       0x68 obj-m1284p/display.o
+ .debug_ranges  0x00000248       0x58 obj-m1284p/doscmd.o
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+ .debug_ranges  0x000002b8       0x40 obj-m1284p/errormsg.o
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+ .debug_ranges  0x00000468      0x118 obj-m1284p/fatops.o
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+ .debug_ranges  0x00000708       0x40 obj-m1284p/fileops.o
+ .debug_ranges  0x00000748       0xb0 obj-m1284p/iec.o
+ .debug_ranges  0x000007f8       0x10 obj-m1284p/led.o
+ .debug_ranges  0x00000808       0x60 obj-m1284p/m2iops.o
+ .debug_ranges  0x00000868       0x18 obj-m1284p/main.o
+ .debug_ranges  0x00000880       0x58 obj-m1284p/parser.o
+ .debug_ranges  0x000008d8       0x20 obj-m1284p/pcf8583.o
+ .debug_ranges  0x000008f8       0x10 obj-m1284p/rtc.o
+ .debug_ranges  0x00000908       0xd0 obj-m1284p/sdcard.o
+ .debug_ranges  0x000009d8       0x60 obj-m1284p/softi2c.o
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+ .debug_ranges  0x00000a58       0x18 obj-m1284p/timer.o
+ .debug_ranges  0x00000a70       0x28 obj-m1284p/utils.o
+
+.debug_macro
+ *(.debug_macro)
+OUTPUT(obj-m1284p/sd2iec.elf elf32-avr)
+LOAD linker stubs
+
+Cross Reference Table
+
+Symbol                                            File
+__bad_interrupt                                   e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o
+__bss_end                                         e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_clear_bss.o)
+__bss_start                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_clear_bss.o)
+__ctype_isfalse                                   e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(cty_isfalse.o)
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(isalpha.o)
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(isalnum.o)
+__ctype_istrue                                    e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(cty_isfalse.o)
+__data_end                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_copy_data.o)
+__data_load_start                                 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_copy_data.o)
+__data_start                                      e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_copy_data.o)
+__do_clear_bss                                    e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_clear_bss.o)
+                                                  obj-m1284p/timer.o
+                                                  obj-m1284p/sdcard.o
+                                                  obj-m1284p/pcf8583.o
+                                                  obj-m1284p/parser.o
+                                                  obj-m1284p/led.o
+                                                  obj-m1284p/iec.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/ff.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/fastloader.o
+                                                  obj-m1284p/errormsg.o
+                                                  obj-m1284p/eeprom.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/display.o
+                                                  obj-m1284p/diskio.o
+                                                  obj-m1284p/diskchange.o
+                                                  obj-m1284p/d64ops.o
+                                                  obj-m1284p/buffers.o
+__do_copy_data                                    e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_copy_data.o)
+                                                  obj-m1284p/doscmd.o
+__eerd_block_m1284p                               e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(eerd_block_atmega1284p.o)
+                                                  obj-m1284p/eeprom.o
+__eerd_blraw_m1284p                               e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(eerd_block_atmega1284p.o)
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(eerd_word_atmega1284p.o)
+__eerd_byte_m1284p                                e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(eerd_byte_atmega1284p.o)
+                                                  obj-m1284p/eeprom.o
+                                                  obj-m1284p/doscmd.o
+__eerd_word_m1284p                                e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(eerd_word_atmega1284p.o)
+                                                  obj-m1284p/eeprom.o
+__eewr_block_m1284p                               e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(eewr_block_atmega1284p.o)
+                                                  obj-m1284p/eeprom.o
+__eewr_byte_m1284p                                e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(eewr_byte_atmega1284p.o)
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(eewr_word_atmega1284p.o)
+                                                  obj-m1284p/eeprom.o
+                                                  obj-m1284p/doscmd.o
+__eewr_r18_m1284p                                 e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(eewr_byte_atmega1284p.o)
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(eewr_word_atmega1284p.o)
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(eewr_block_atmega1284p.o)
+__eewr_word_m1284p                                e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(eewr_word_atmega1284p.o)
+                                                  obj-m1284p/eeprom.o
+__epilogue_restores__                             e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_epilogue.o)
+                                                  obj-m1284p/softi2c.o
+                                                  obj-m1284p/sdcard.o
+                                                  obj-m1284p/rtc.o
+                                                  obj-m1284p/pcf8583.o
+                                                  obj-m1284p/parser.o
+                                                  obj-m1284p/m2iops.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/ff.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/fastloader.o
+                                                  obj-m1284p/eeprom.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/display.o
+                                                  obj-m1284p/diskchange.o
+                                                  obj-m1284p/d64ops.o
+                                                  obj-m1284p/buffers.o
+__heap_end                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o
+__init                                            e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o
+__mulsi3                                          e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_mulsi3.o)
+                                                  obj-m1284p/ff.o
+__muluhisi3                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_muluhisi3.o)
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_mulsi3.o)
+                                                  obj-m1284p/ff.o
+                                                  obj-m1284p/doscmd.o
+__prologue_saves__                                e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_prologue.o)
+                                                  obj-m1284p/softi2c.o
+                                                  obj-m1284p/sdcard.o
+                                                  obj-m1284p/rtc.o
+                                                  obj-m1284p/pcf8583.o
+                                                  obj-m1284p/parser.o
+                                                  obj-m1284p/iec.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/ff.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/fastloader.o
+                                                  obj-m1284p/eeprom.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/display.o
+                                                  obj-m1284p/diskchange.o
+                                                  obj-m1284p/d64ops.o
+                                                  obj-m1284p/buffers.o
+__stack                                           e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o
+__tablejump2__                                    e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_tablejump.o)
+                                                  obj-m1284p/iec.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+__tablejump__                                     e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_tablejump.o)
+__udivmodhi4                                      e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_udivmodhi4.o)
+                                                  obj-m1284p/ff.o
+__udivmodqi4                                      e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_udivmodqi4.o)
+                                                  obj-m1284p/utils.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/display.o
+__udivmodsi4                                      e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_udivmodsi4.o)
+                                                  obj-m1284p/ff.o
+                                                  obj-m1284p/fatops.o
+__umulhisi3                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_umulhisi3.o)
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/avr51\libgcc.a(_muluhisi3.o)
+                                                  obj-m1284p/doscmd.o
+__vector_1                                        obj-m1284p/sdcard.o
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o
+__vector_10                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o
+__vector_11                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o
+__vector_12                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o
+__vector_13                                       obj-m1284p/timer.o
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o
+__vector_14                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o
+__vector_15                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o
+__vector_16                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o
+__vector_17                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o
+__vector_18                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o
+__vector_19                                       e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o
+__vector_2                                        e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o
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+isalnum                                           e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(isalnum.o)
+                                                  obj-m1284p/fatops.o
+isalpha                                           e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(isalpha.o)
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(isalnum.o)
+islower                                           e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(isalpha.o)
+isupper                                           e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(isalpha.o)
+jiffy_receive                                     obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/iec.o
+jiffy_send                                        obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/iec.o
+l_getfree                                         obj-m1284p/ff.o
+                                                  obj-m1284p/fatops.o
+l_opencluster                                     obj-m1284p/ff.o
+                                                  obj-m1284p/fatops.o
+l_opendir                                         obj-m1284p/ff.o
+                                                  obj-m1284p/fatops.o
+lastbuttonchange                                  obj-m1284p/timer.o
+led_state                                         obj-m1284p/led.o
+                                                  obj-m1284p/timer.o
+                                                  obj-m1284p/errormsg.o
+load_ar6_1581                                     obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_dreamload                                    obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_eload1                                       obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_epyxcart                                     obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_fc3                                          obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_geos                                         obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_geos_s1                                      obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_gijoe                                        obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_nippon                                       obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_turbodisk                                    obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_uload3                                       obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_wheels_s1                                    obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+load_wheels_s2                                    obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+longverstr                                        obj-m1284p/errormsg.o
+                                                  obj-m1284p/main.o
+m2iops                                            obj-m1284p/m2iops.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/fatops.o
+main                                              obj-m1284p/main.o
+                                                  e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51/crtm1284p.o
+mark_buffer_clean                                 obj-m1284p/buffers.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/fastloader.o
+                                                  obj-m1284p/d64ops.o
+mark_buffer_dirty                                 obj-m1284p/buffers.o
+                                                  obj-m1284p/iec.o
+                                                  obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/d64ops.o
+match_name                                        obj-m1284p/parser.o
+                                                  obj-m1284p/fileops.o
+matchdh                                           obj-m1284p/buffers.o
+                                                  obj-m1284p/parser.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/doscmd.o
+max_part                                          obj-m1284p/parser.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/d64ops.o
+memcmp                                            e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(memcmp.o)
+                                                  obj-m1284p/parser.o
+                                                  obj-m1284p/ff.o
+                                                  obj-m1284p/doscmd.o
+memcmp_P                                          e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(memcmp_P.o)
+                                                  obj-m1284p/ff.o
+                                                  obj-m1284p/doscmd.o
+memcpy                                            e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(memcpy.o)
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/ff.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/display.o
+memcpy_P                                          e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(memcpy_P.o)
+                                                  obj-m1284p/pcf8583.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/d64ops.o
+memset                                            e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(memset.o)
+                                                  obj-m1284p/m2iops.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/ff.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/eeprom.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/d64ops.o
+mount_drv                                         obj-m1284p/ff.o
+next_match                                        obj-m1284p/parser.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/doscmd.o
+original_length                                   obj-m1284p/doscmd.o
+parse_date                                        obj-m1284p/parser.o
+                                                  obj-m1284p/fileops.o
+parse_doscommand                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/iec.o
+parse_error                                       obj-m1284p/fatops.o
+                                                  obj-m1284p/diskchange.o
+parse_number                                      obj-m1284p/parser.o
+                                                  obj-m1284p/doscmd.o
+parse_partition                                   obj-m1284p/parser.o
+                                                  obj-m1284p/doscmd.o
+parse_path                                        obj-m1284p/parser.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/diskchange.o
+partition                                         obj-m1284p/parser.o
+                                                  obj-m1284p/m2iops.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/display.o
+                                                  obj-m1284p/diskchange.o
+                                                  obj-m1284p/d64ops.o
+read_configuration                                obj-m1284p/eeprom.o
+                                                  obj-m1284p/main.o
+read_rtc                                          obj-m1284p/pcf8583.o
+                                                  obj-m1284p/rtc.o
+                                                  obj-m1284p/doscmd.o
+rom_filename                                      obj-m1284p/eeprom.o
+                                                  obj-m1284p/errormsg.o
+                                                  obj-m1284p/doscmd.o
+rtc_init                                          obj-m1284p/pcf8583.o
+                                                  obj-m1284p/main.o
+rtc_state                                         obj-m1284p/pcf8583.o
+                                                  obj-m1284p/doscmd.o
+save_ar6_1581                                     obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+save_fc3                                          obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+sd_getinfo                                        obj-m1284p/sdcard.o
+sd_init                                           obj-m1284p/sdcard.o
+sd_initialize                                     obj-m1284p/sdcard.o
+sd_read                                           obj-m1284p/sdcard.o
+sd_status                                         obj-m1284p/sdcard.o
+sd_write                                          obj-m1284p/sdcard.o
+set_changelist                                    obj-m1284p/diskchange.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/doscmd.o
+set_error                                         obj-m1284p/errormsg.o
+                                                  obj-m1284p/parser.o
+                                                  obj-m1284p/m2iops.o
+                                                  obj-m1284p/iec.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/fastloader.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/diskchange.o
+                                                  obj-m1284p/d64ops.o
+                                                  obj-m1284p/buffers.o
+set_error_ts                                      obj-m1284p/errormsg.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/d64ops.o
+set_ok_message                                    obj-m1284p/errormsg.o
+                                                  obj-m1284p/buffers.o
+set_rtc                                           obj-m1284p/pcf8583.o
+                                                  obj-m1284p/doscmd.o
+spiInit                                           obj-m1284p/spi.o
+                                                  obj-m1284p/sdcard.o
+spiTransferByte                                   obj-m1284p/spi.o
+                                                  obj-m1284p/sdcard.o
+spiTransferLong                                   obj-m1284p/spi.o
+                                                  obj-m1284p/sdcard.o
+strchr                                            e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(strchr.o)
+                                                  obj-m1284p/parser.o
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/doscmd.o
+strcmp_P                                          e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(strcmp_P.o)
+                                                  obj-m1284p/fatops.o
+strcpy                                            e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(strcpy.o)
+                                                  obj-m1284p/m2iops.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/errormsg.o
+                                                  obj-m1284p/doscmd.o
+strcpy_P                                          e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(strcpy_P.o)
+                                                  obj-m1284p/main.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/fastloader.o
+                                                  obj-m1284p/display.o
+                                                  obj-m1284p/diskchange.o
+strncpy                                           e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(strncpy.o)
+                                                  obj-m1284p/fileops.o
+                                                  obj-m1284p/doscmd.o
+strrchr                                           e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(strrchr.o)
+                                                  obj-m1284p/fatops.o
+syspart_line                                      obj-m1284p/fileops.o
+ticks                                             obj-m1284p/timer.o
+                                                  obj-m1284p/sdcard.o
+                                                  obj-m1284p/fastloader.o
+                                                  obj-m1284p/diskchange.o
+timer_init                                        obj-m1284p/timer.o
+                                                  obj-m1284p/main.o
+toupper                                           e:/progs/arduino-1.7.4/hardware/tools/avr/bin/../lib/gcc/avr/4.8.1/../../../../avr/lib/avr51\libc.a(toupper.o)
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/errormsg.o
+turbodisk_buffer                                  obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/fastloader.o
+turbodisk_byte                                    obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/fastloader.o
+uload3_get_byte                                   obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/fastloader.o
+uload3_send_byte                                  obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/fastloader.o
+update_current_dir                                obj-m1284p/parser.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/display.o
+                                                  obj-m1284p/diskchange.o
+update_leds                                       obj-m1284p/led.o
+                                                  obj-m1284p/m2iops.o
+                                                  obj-m1284p/iec.o
+                                                  obj-m1284p/fatops.o
+                                                  obj-m1284p/errormsg.o
+                                                  obj-m1284p/buffers.o
+ustr1tok                                          obj-m1284p/utils.o
+                                                  obj-m1284p/doscmd.o
+versionstr                                        obj-m1284p/errormsg.o
+                                                  obj-m1284p/main.o
+wheels44_get_byte_1mhz                            obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/doscmd.o
+wheels44_get_byte_2mhz                            obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/doscmd.o
+wheels44_send_byte_2mhz                           obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/doscmd.o
+wheels_get_byte_1mhz                              obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/doscmd.o
+wheels_send_byte_1mhz                             obj-m1284p/fastloader-ll.o
+                                                  obj-m1284p/doscmd.o
+write_configuration                               obj-m1284p/eeprom.o
+                                                  obj-m1284p/doscmd.o
+                                                  obj-m1284p/display.o
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/autoconf.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/autoconf.h
new file mode 100644
index 00000000..57c530e7
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/autoconf.h
@@ -0,0 +1,64 @@
+// autoconf.h generated from config at Tue Nov 05 12:31:28  2013
+#ifndef AUTOCONF_H
+#define AUTOCONF_H
+// This may not look like it, but it's a -*- makefile -*-
+//
+// sd2iec - SD/MMC to Commodore serial bus interface/controller
+// Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+//
+// Inspiration and low-level SD/MMC access based on code from MMC2IEC
+//   by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+//
+//  FAT filesystem access based on code from ChaN, see tff.c|h.
+//
+//  This program is free software; you can redistribute it and/or modify
+//  it under the terms of the GNU General Public License as published by
+//  the Free Software Foundation; version 2 of the License only.
+//
+//  This program is distributed in the hope that it will be useful,
+//  but WITHOUT ANY WARRANTY; without even the implied warranty of
+//  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+//  GNU General Public License for more details.
+//
+//  You should have received a copy of the GNU General Public License
+//  along with this program; if not, write to the Free Software
+//  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+//
+//  config-sw2: sd2iec configuration for Shadowolf's sd2iec PCBs
+//              version 1.x
+//
+//
+// This file is included in the main sd2iec Makefile and also parsed
+// into autoconf.h.
+
+#define CONFIG_MCU atmega1284p
+#define CONFIG_LINKER_RELAX
+#define CONFIG_MCU_FREQ 8000000
+#define CONFIG_BOOTLOADER
+#define CONFIG_BOOT_DEVID 0x31434549
+#define CONFIG_COMMAND_CHANNEL_DUMP
+#define CONFIG_LOADER_TURBODISK
+#define CONFIG_LOADER_FC3
+#define CONFIG_LOADER_DREAMLOAD
+#define CONFIG_LOADER_ULOAD3
+#define CONFIG_LOADER_GIJOE
+#define CONFIG_LOADER_EPYXCART
+#define CONFIG_LOADER_GEOS
+#define CONFIG_LOADER_WHEELS
+#define CONFIG_LOADER_NIPPON
+#define CONFIG_LOADER_AR6
+#define CONFIG_LOADER_ELOAD1
+#define CONFIG_HARDWARE_VARIANT 5
+#define CONFIG_HARDWARE_NAME sd2iec-sw2
+#define CONFIG_SD_AUTO_RETRIES 10
+#define CONFIG_SD_DATACRC
+#define CONFIG_ERROR_BUFFER_SIZE 46
+#define CONFIG_COMMAND_BUFFER_SIZE 120
+#define CONFIG_BUFFER_COUNT 6
+#define CONFIG_EEPROM_SIZE 512
+#define CONFIG_EEPROM_OFFSET 512
+#define CONFIG_MAX_PARTITIONS 4
+#define CONFIG_RTC_VARIANT 2
+#define CONFIG_REMOTE_DISPLAY
+#define CONFIG_DISPLAY_BUFFER_SIZE 40
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/crc7asm.lst b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/crc7asm.lst
new file mode 100644
index 00000000..424a5f9f
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/crc7asm.lst
@@ -0,0 +1,59 @@
+   1               	# 1 "crc7asm.S"
+   1               	/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   0               	
+   0               	
+   2               	/MMC to Commodore serial bus interface/controller
+   3               	   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+   4               	
+   5               	   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+   6               	     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+   7               	
+   8               	   FAT filesystem access based on code from ChaN, see tff.c|h.
+   9               	
+  10               	   This program is free software; you can redistribute it and/or modify
+  11               	   it under the terms of the GNU General Public License as published by
+  12               	   the Free Software Foundation; version 2 of the License only.
+  13               	
+  14               	   This program is distributed in the hope that it will be useful,
+  15               	   but WITHOUT ANY WARRANTY; without even the implied warranty of
+  16               	   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  17               	   GNU General Public License for more details.
+  18               	
+  19               	   You should have received a copy of the GNU General Public License
+  20               	   along with this program; if not, write to the Free Software
+  21               	   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+  22               	
+  23               	
+  24               	   crc7asm.S: space-efficient CRC7 implementation for AVR
+  25               	
+  26               	*/
+  27               	
+  28               	        .section .text
+  29               	
+  30               	        .global crc7update
+  31               	        ;; uint8_t crc7update(uint8_t crc, uint8_t data)
+  32               	        ;;
+  33               	        ;; input : r24: crc, r22: data
+  34               	        ;; output: r24: new crc
+  35:crc7asm.S     **** crc7update:
+  36:crc7asm.S     ****         ldi     r18, 8       ; number of bits to process
+  37:crc7asm.S     ****         ldi     r19, 0x09    ; CRC7 polynomial
+  38               	        ldi     r20, 0x80    ; constant for inverting the top bit of the CRC
+  39:crc7asm.S     **** 
+  40:crc7asm.S     **** loop:   lsl     r24          ; shift CRC
+  41:crc7asm.S     ****         lsl     r22          ; shift data byte
+  42:crc7asm.S     ****         brcc    0f           ; jump if top data bit was 0
+  43:crc7asm.S     ****         eor     r24, r20     ; invert top bit of CRC if not
+  44:crc7asm.S     **** 0:      bst     r24, 7       ; read top bit of CRC
+  45:crc7asm.S     ****         brtc    1f           ; skip if top bit of CRC is now clear
+  46:crc7asm.S     ****         eor     r24, r19     ; apply polynomial
+  47:crc7asm.S     **** 1:      dec     r18          ; decrement bit counter
+  48:crc7asm.S     ****         brne    loop         ; loop for next bit
+  49:crc7asm.S     ****         andi    r24, 0x7f    ; clear top bit of CRC
+  50               	        ret                  ; return
+  51               	
+DEFINED SYMBOLS
+           crc7asm.S:34     .text:00000000 crc7update
+           crc7asm.S:39     .text:00000006 loop
+
+NO UNDEFINED SYMBOLS
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/fastloader-ll.lst b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/fastloader-ll.lst
new file mode 100644
index 00000000..8d1df93d
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/fastloader-ll.lst
@@ -0,0 +1,2210 @@
+   1               	# 1 "fastloader-ll.S"
+   1               	/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   0               	
+   0               	
+   2               	  Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+   3               	   Copyright (C) 2007-2008  M.Kiesel <mayne@users.sourceforge.net>
+   4               	   Final Cartridge III, DreamLoad fastloader support:
+   5               	   Copyright (C) 2008  Thomas Giesel <skoe@directbox.com>
+   6               	
+   7               	   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+   8               	     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+   9               	
+  10               	   FAT filesystem access based on code from ChaN, see tff.c|h.
+  11               	
+  12               	   This program is free software; you can redistribute it and/or modify
+  13               	   it under the terms of the GNU General Public License as published by
+  14               	   the Free Software Foundation; version 2 of the License only.
+  15               	
+  16               	   This program is distributed in the hope that it will be useful,
+  17               	   but WITHOUT ANY WARRANTY; without even the implied warranty of
+  18               	   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  19               	   GNU General Public License for more details.
+  20               	
+  21               	   You should have received a copy of the GNU General Public License
+  22               	   along with this program; if not, write to the Free Software
+  23               	   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+  24               	
+  25               	
+  26               	   fastloader.S: Low level fastloader transfer routines.
+  27               	
+  28               	   Thanks to Jochen Adler for his Jiffy docs at http://www.nlq.de/
+  29               	
+  30               	*/
+  31               	
+  32               	
+  33               	#include "config.h"
+   1               	/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   2               	   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+   3               	
+   4               	   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+   5               	     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+   6               	
+   7               	   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+   8               	
+   9               	   This program is free software; you can redistribute it and/or modify
+  10               	   it under the terms of the GNU General Public License as published by
+  11               	   the Free Software Foundation; version 2 of the License only.
+  12               	
+  13               	   This program is distributed in the hope that it will be useful,
+  14               	   but WITHOUT ANY WARRANTY; without even the implied warranty of
+  15               	   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  16               	   GNU General Public License for more details.
+  17               	
+  18               	   You should have received a copy of the GNU General Public License
+  19               	   along with this program; if not, write to the Free Software
+  20               	   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+  21               	
+  22               	
+  23               	   config.h: User-configurable options to simplify hardware changes and/or
+  24               	             reduce the code/ram requirements of the code.
+  25               	
+  26               	
+  27               	   Based on MMC2IEC, original copyright header follows:
+  28               	
+  29               	//
+  30               	// Title        : MMC2IEC - Configuration
+  31               	// Author       : Lars Pontoppidan
+  32               	// Date         : Jan. 2007
+  33               	// Version      : 0.7
+  34               	// Target MCU   : AtMega32(L) at 8 MHz
+  35               	//
+  36               	//
+  37               	// DISCLAIMER:
+  38               	// The author is in no way responsible for any problems or damage caused by
+  39               	// using this code. Use at your own risk.
+  40               	//
+  41               	// LICENSE:
+  42               	// This code is distributed under the GNU Public License
+  43               	// which can be found at http://www.gnu.org/licenses/gpl.txt
+  44               	//
+  45               	
+  46               	*/
+  47               	
+  48               	#ifndef CONFIG_H
+  49               	#define CONFIG_H
+  50               	
+  51               	#include "autoconf.h"
+   1               	// autoconf.h generated from config at Tue Nov 05 12:31:28  2013
+  52               	on 1284P */
+  53               	#include "avrcompat.h"
+  54               	
+   1               	/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+  55               	 CONFIG_HARDWARE_VARIANT==1
+  34               	 <avr/io.h>
+   1               	/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+  35               	/* Timing offsets for JiffyDos read/write */
+   1               	/* Copyright (c) 2002,2003,2005,2006,2007 Marek Michalkiewicz, Joerg Wunsch
+   2               	   Copyright (c) 2007 Eric B. Weddington
+   3               	   All rights reserved.
+   4               	
+   5               	   Redistribution and use in source and binary forms, with or without
+   6               	   modification, are permitted provided that the following conditions are met:
+   7               	
+   8               	   * Redistributions of source code must retain the above copyright
+   9               	     notice, this list of conditions and the following disclaimer.
+  10               	
+  11               	   * Redistributions in binary form must reproduce the above copyright
+  12               	     notice, this list of conditions and the following disclaimer in
+  13               	     the documentation and/or other materials provided with the
+  14               	     distribution.
+  15               	
+  16               	   * Neither the name of the copyright holders nor the names of
+  17               	     contributors may be used to endorse or promote products derived
+  18               	     from this software without specific prior written permission.
+  19               	
+  20               	  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  21               	  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  22               	  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  23               	  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  24               	  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  25               	  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  26               	  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  27               	  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  28               	  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  29               	  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+  30               	  POSSIBILITY OF SUCH DAMAGE. */
+  31               	
+  32               	/* $Id: io.h,v 1.52.2.28 2009/12/20 17:02:53 arcanum Exp $ */
+  33               	
+  34               	/** \file */
+  35               	/** \defgroup avr_io <avr/io.h>: AVR device-specific IO definitions
+  36               	    \code #include <avr/io.h> \endcode
+  37               	
+  38               	    This header file includes the apropriate IO definitions for the
+  39               	    device that has been specified by the <tt>-mmcu=</tt> compiler
+  40               	    command-line switch.  This is done by diverting to the appropriate
+  41               	    file <tt>&lt;avr/io</tt><em>XXXX</em><tt>.h&gt;</tt> which should
+  42               	    never be included directly.  Some register names common to all
+  43               	    AVR devices are defined directly within <tt>&lt;avr/common.h&gt;</tt>,
+  44               	    which is included in <tt>&lt;avr/io.h&gt;</tt>,
+  45               	    but most of the details come from the respective include file.
+  46               	
+  47               	    Note that this file always includes the following files:
+  48               	    \code 
+  49               	    #include <avr/sfr_defs.h>
+  50               	    #include <avr/portpins.h>
+  51               	    #include <avr/common.h>
+  52               	    #include <avr/version.h>
+  53               	    \endcode
+  54               	    See \ref avr_sfr for more details about that header file.
+  55               	
+  56               	    Included are definitions of the IO register set and their
+  57               	    respective bit values as specified in the Atmel documentation.
+  58               	    Note that inconsistencies in naming conventions,
+  59               	    so even identical functions sometimes get different names on
+  60               	    different devices.
+  61               	
+  62               	    Also included are the specific names useable for interrupt
+  63               	    function definitions as documented
+  64               	    \ref avr_signames "here".
+  65               	
+  66               	    Finally, the following macros are defined:
+  67               	
+  68               	    - \b RAMEND
+  69               	    <br>
+  70               	    The last on-chip RAM address.
+  71               	    <br>
+  72               	    - \b XRAMEND
+  73               	    <br>
+  74               	    The last possible RAM location that is addressable. This is equal to 
+  75               	    RAMEND for devices that do not allow for external RAM. For devices 
+  76               	    that allow external RAM, this will be larger than RAMEND.
+  77               	    <br>
+  78               	    - \b E2END
+  79               	    <br>
+  80               	    The last EEPROM address.
+  81               	    <br>
+  82               	    - \b FLASHEND
+  83               	    <br>
+  84               	    The last byte address in the Flash program space.
+  85               	    <br>
+  86               	    - \b SPM_PAGESIZE
+  87               	    <br>
+  88               	    For devices with bootloader support, the flash pagesize
+  89               	    (in bytes) to be used for the \c SPM instruction. 
+  90               	    - \b E2PAGESIZE
+  91               	    <br>
+  92               	    The size of the EEPROM page.
+  93               	    
+  94               	*/
+  95               	
+  96               	#ifndef _AVR_IO_H_
+  97               	#define _AVR_IO_H_
+  98               	
+  99               	#include <avr/sfr_defs.h>
+   1               	/* Copyright (c) 2002, Marek Michalkiewicz <marekm@amelek.gda.pl>
+ 100               	
+ 101               	#if defined (__AVR_AT94K__)
+ 102               	#  include <avr/ioat94k.h>
+ 103               	#elif defined (__AVR_AT43USB320__)
+ 104               	#  include <avr/io43u32x.h>
+ 105               	#elif defined (__AVR_AT43USB355__)
+ 106               	#  include <avr/io43u35x.h>
+ 107               	#elif defined (__AVR_AT76C711__)
+ 108               	#  include <avr/io76c711.h>
+ 109               	#elif defined (__AVR_AT86RF401__)
+ 110               	#  include <avr/io86r401.h>
+ 111               	#elif defined (__AVR_AT90PWM1__)
+ 112               	#  include <avr/io90pwm1.h>
+ 113               	#elif defined (__AVR_AT90PWM2__)
+ 114               	#  include <avr/io90pwmx.h>
+ 115               	#elif defined (__AVR_AT90PWM2B__)
+ 116               	#  include <avr/io90pwm2b.h>
+ 117               	#elif defined (__AVR_AT90PWM3__)
+ 118               	#  include <avr/io90pwmx.h>
+ 119               	#elif defined (__AVR_AT90PWM3B__)
+ 120               	#  include <avr/io90pwm3b.h>
+ 121               	#elif defined (__AVR_AT90PWM216__)
+ 122               	#  include <avr/io90pwm216.h>
+ 123               	#elif defined (__AVR_AT90PWM316__)
+ 124               	#  include <avr/io90pwm316.h>
+ 125               	#elif defined (__AVR_AT90PWM81__)
+ 126               	#  include <avr/io90pwm81.h>
+ 127               	#elif defined (__AVR_ATmega8U2__)
+ 128               	#  include <avr/iom8u2.h>
+ 129               	#elif defined (__AVR_ATmega16M1__)
+ 130               	#  include <avr/iom16m1.h>
+ 131               	#elif defined (__AVR_ATmega16U2__)
+ 132               	#  include <avr/iom16u2.h>
+ 133               	#elif defined (__AVR_ATmega16U4__)
+ 134               	#  include <avr/iom16u4.h>
+ 135               	#elif defined (__AVR_ATmega32C1__)
+ 136               	#  include <avr/iom32c1.h>
+ 137               	#elif defined (__AVR_ATmega32M1__)
+ 138               	#  include <avr/iom32m1.h>
+ 139               	#elif defined (__AVR_ATmega32U2__)
+ 140               	#  include <avr/iom32u2.h>
+ 141               	#elif defined (__AVR_ATmega32U4__)
+ 142               	#  include <avr/iom32u4.h>
+ 143               	#elif defined (__AVR_ATmega32U6__)
+ 144               	#  include <avr/iom32u6.h>
+ 145               	#elif defined (__AVR_ATmega64C1__)
+ 146               	#  include <avr/iom64c1.h>
+ 147               	#elif defined (__AVR_ATmega64M1__)
+ 148               	#  include <avr/iom64m1.h>
+ 149               	#elif defined (__AVR_ATmega128__)
+ 150               	#  include <avr/iom128.h>
+ 151               	#elif defined (__AVR_ATmega1280__)
+ 152               	#  include <avr/iom1280.h>
+ 153               	#elif defined (__AVR_ATmega1281__)
+ 154               	#  include <avr/iom1281.h>
+ 155               	#elif defined (__AVR_ATmega1284P__)
+ 156               	#  include <avr/iom1284p.h>
+ 157               	#elif defined (__AVR_ATmega128RFA1__)
+ 158               	#  include <avr/iom128rfa1.h>
+ 159               	#elif defined (__AVR_ATmega2560__)
+ 160               	#  include <avr/iom2560.h>
+ 161               	#elif defined (__AVR_ATmega2561__)
+ 162               	#  include <avr/iom2561.h>
+ 163               	#elif defined (__AVR_AT90CAN32__)
+ 164               	#  include <avr/iocan32.h>
+ 165               	#elif defined (__AVR_AT90CAN64__)
+ 166               	#  include <avr/iocan64.h>
+ 167               	#elif defined (__AVR_AT90CAN128__)
+ 168               	#  include <avr/iocan128.h>
+ 169               	#elif defined (__AVR_AT90USB82__)
+ 170               	#  include <avr/iousb82.h>
+ 171               	#elif defined (__AVR_AT90USB162__)
+ 172               	#  include <avr/iousb162.h>
+ 173               	#elif defined (__AVR_AT90USB646__)
+ 174               	#  include <avr/iousb646.h>
+ 175               	#elif defined (__AVR_AT90USB647__)
+ 176               	#  include <avr/iousb647.h>
+ 177               	#elif defined (__AVR_AT90USB1286__)
+ 178               	#  include <avr/iousb1286.h>
+ 179               	#elif defined (__AVR_AT90USB1287__)
+ 180               	#  include <avr/iousb1287.h>
+ 181               	#elif defined (__AVR_ATmega64__)
+ 182               	#  include <avr/iom64.h>
+ 183               	#elif defined (__AVR_ATmega640__)
+ 184               	#  include <avr/iom640.h>
+ 185               	#elif defined (__AVR_ATmega644__) || defined (__AVR_ATmega644A__)
+ 186               	#  include <avr/iom644.h>
+ 187               	#elif defined (__AVR_ATmega644P__)
+ 188               	#  include <avr/iom644p.h>
+   1               	/* Copyright (c) 2005 Anatoly Sokolov
+   2               	   All rights reserved.
+   3               	
+   4               	   Redistribution and use in source and binary forms, with or without
+   5               	   modification, are permitted provided that the following conditions are met:
+   6               	
+   7               	   * Redistributions of source code must retain the above copyright
+   8               	     notice, this list of conditions and the following disclaimer.
+   9               	
+  10               	   * Redistributions in binary form must reproduce the above copyright
+  11               	     notice, this list of conditions and the following disclaimer in
+  12               	     the documentation and/or other materials provided with the
+  13               	     distribution.
+  14               	
+  15               	   * Neither the name of the copyright holders nor the names of
+  16               	     contributors may be used to endorse or promote products derived
+  17               	     from this software without specific prior written permission.
+  18               	
+  19               	  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  20               	  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  21               	  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  22               	  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  23               	  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  24               	  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  25               	  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  26               	  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  27               	  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  28               	  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+  29               	  POSSIBILITY OF SUCH DAMAGE. */
+  30               	
+  31               	/* avr/iom644p.h - definitions for ATmega644P */
+  32               	
+  33               	/* $Id: iom644p.h,v 1.1.2.2 2009/04/25 21:01:29 arcanum Exp $ */
+  34               	
+  35               	#ifndef _AVR_IOM644P_H_
+  36               	#define _AVR_IOM644P_H_ 1
+  37               	
+  38               	#include <avr/iomxx4.h>
+   1               	/* Copyright (c) 2005, 2006, 2007 Anatoly Sokolov
+  39               	
+ 189               	#elif defined (__AVR_ATmega644PA__)
+ 190               	#  include <avr/iom644pa.h>
+ 191               	#elif defined (__AVR_ATmega645__) || defined (__AVR_ATmega645A__) || defined (__AVR_ATmega645P__)
+ 192               	#  include <avr/iom645.h>
+ 193               	#elif defined (__AVR_ATmega6450__) || defined (__AVR_ATmega6450A__) || defined (__AVR_ATmega6450P__
+ 194               	#  include <avr/iom6450.h>
+ 195               	#elif defined (__AVR_ATmega649__) || defined (__AVR_ATmega649A__)
+ 196               	#  include <avr/iom649.h>
+ 197               	#elif defined (__AVR_ATmega6490__) || defined (__AVR_ATmega6490A__) || defined (__AVR_ATmega6490P__
+ 198               	#  include <avr/iom6490.h>
+ 199               	#elif defined (__AVR_ATmega649P__)
+ 200               	#  include <avr/iom649p.h>
+ 201               	#elif defined (__AVR_ATmega64HVE__)
+ 202               	#  include <avr/iom64hve.h>
+ 203               	#elif defined (__AVR_ATmega103__)
+ 204               	#  include <avr/iom103.h>
+ 205               	#elif defined (__AVR_ATmega32__)
+ 206               	#  include <avr/iom32.h>
+ 207               	#elif defined (__AVR_ATmega323__)
+ 208               	#  include <avr/iom323.h>
+ 209               	#elif defined (__AVR_ATmega324P__) || defined (__AVR_ATmega324A__)
+ 210               	#  include <avr/iom324.h>
+ 211               	#elif defined (__AVR_ATmega324PA__)
+ 212               	#  include <avr/iom324pa.h>
+ 213               	#elif defined (__AVR_ATmega325__)
+ 214               	#  include <avr/iom325.h>
+ 215               	#elif defined (__AVR_ATmega325P__)
+ 216               	#  include <avr/iom325.h>
+ 217               	#elif defined (__AVR_ATmega3250__)
+ 218               	#  include <avr/iom3250.h>
+ 219               	#elif defined (__AVR_ATmega3250P__)
+ 220               	#  include <avr/iom3250.h>
+ 221               	#elif defined (__AVR_ATmega328P__) || defined (__AVR_ATmega328__)
+ 222               	#  include <avr/iom328p.h>
+ 223               	#elif defined (__AVR_ATmega329__)
+ 224               	#  include <avr/iom329.h>
+ 225               	#elif defined (__AVR_ATmega329P__) || defined (__AVR_ATmega329PA__)
+ 226               	#  include <avr/iom329.h>
+ 227               	#elif defined (__AVR_ATmega3290__)
+ 228               	#  include <avr/iom3290.h>
+ 229               	#elif defined (__AVR_ATmega3290P__)
+ 230               	#  include <avr/iom3290.h>
+ 231               	#elif defined (__AVR_ATmega32HVB__)
+ 232               	#  include <avr/iom32hvb.h>
+ 233               	#elif defined (__AVR_ATmega406__)
+ 234               	#  include <avr/iom406.h>
+ 235               	#elif defined (__AVR_ATmega16__)
+ 236               	#  include <avr/iom16.h>
+ 237               	#elif defined (__AVR_ATmega16A__)
+ 238               	#  include <avr/iom16a.h>
+ 239               	#elif defined (__AVR_ATmega161__)
+ 240               	#  include <avr/iom161.h>
+ 241               	#elif defined (__AVR_ATmega162__)
+ 242               	#  include <avr/iom162.h>
+ 243               	#elif defined (__AVR_ATmega163__)
+ 244               	#  include <avr/iom163.h>
+ 245               	#elif defined (__AVR_ATmega164P__) || defined (__AVR_ATmega164A__)
+ 246               	#  include <avr/iom164.h>
+ 247               	#elif defined (__AVR_ATmega165__) || defined (__AVR_ATmega165A__)
+ 248               	#  include <avr/iom165.h>
+ 249               	#elif defined (__AVR_ATmega165P__)
+ 250               	#  include <avr/iom165p.h>
+ 251               	#elif defined (__AVR_ATmega168__) || defined (__AVR_ATmega168A__)
+ 252               	#  include <avr/iom168.h>
+ 253               	#elif defined (__AVR_ATmega168P__)
+ 254               	#  include <avr/iom168p.h>
+ 255               	#elif defined (__AVR_ATmega169__) || defined (__AVR_ATmega169A__)
+ 256               	#  include <avr/iom169.h>
+ 257               	#elif defined (__AVR_ATmega169P__)
+ 258               	#  include <avr/iom169p.h>
+ 259               	#elif defined (__AVR_ATmega169PA__)
+ 260               	#  include <avr/iom169pa.h>
+ 261               	#elif defined (__AVR_ATmega8HVA__)
+ 262               	#  include <avr/iom8hva.h>
+ 263               	#elif defined (__AVR_ATmega16HVA__)
+ 264               	#  include <avr/iom16hva.h>
+ 265               	#elif defined (__AVR_ATmega16HVA2__)
+ 266               	#  include <avr/iom16hva2.h>
+ 267               	#elif defined (__AVR_ATmega16HVB__)
+ 268               	#  include <avr/iom16hvb.h>
+ 269               	#elif defined (__AVR_ATmega8__)
+ 270               	#  include <avr/iom8.h>
+ 271               	#elif defined (__AVR_ATmega48__) || defined (__AVR_ATmega48A__)
+ 272               	#  include <avr/iom48.h>
+ 273               	#elif defined (__AVR_ATmega48P__)
+ 274               	#  include <avr/iom48p.h>
+ 275               	#elif defined (__AVR_ATmega88__) || defined (__AVR_ATmega88A__)
+ 276               	#  include <avr/iom88.h>
+ 277               	#elif defined (__AVR_ATmega88P__)
+ 278               	#  include <avr/iom88p.h>
+ 279               	#elif defined (__AVR_ATmega88PA__)
+ 280               	#  include <avr/iom88pa.h>
+ 281               	#elif defined (__AVR_ATmega8515__)
+ 282               	#  include <avr/iom8515.h>
+ 283               	#elif defined (__AVR_ATmega8535__)
+ 284               	#  include <avr/iom8535.h>
+ 285               	#elif defined (__AVR_AT90S8535__)
+ 286               	#  include <avr/io8535.h>
+ 287               	#elif defined (__AVR_AT90C8534__)
+ 288               	#  include <avr/io8534.h>
+ 289               	#elif defined (__AVR_AT90S8515__)
+ 290               	#  include <avr/io8515.h>
+ 291               	#elif defined (__AVR_AT90S4434__)
+ 292               	#  include <avr/io4434.h>
+ 293               	#elif defined (__AVR_AT90S4433__)
+ 294               	#  include <avr/io4433.h>
+ 295               	#elif defined (__AVR_AT90S4414__)
+ 296               	#  include <avr/io4414.h>
+ 297               	#elif defined (__AVR_ATtiny22__)
+ 298               	#  include <avr/iotn22.h>
+ 299               	#elif defined (__AVR_ATtiny26__)
+ 300               	#  include <avr/iotn26.h>
+ 301               	#elif defined (__AVR_AT90S2343__)
+ 302               	#  include <avr/io2343.h>
+ 303               	#elif defined (__AVR_AT90S2333__)
+ 304               	#  include <avr/io2333.h>
+ 305               	#elif defined (__AVR_AT90S2323__)
+ 306               	#  include <avr/io2323.h>
+ 307               	#elif defined (__AVR_AT90S2313__)
+ 308               	#  include <avr/io2313.h>
+ 309               	#elif defined (__AVR_ATtiny2313__)
+ 310               	#  include <avr/iotn2313.h>
+ 311               	#elif defined (__AVR_ATtiny2313A__)
+ 312               	#  include <avr/iotn2313a.h>
+ 313               	#elif defined (__AVR_ATtiny13__)
+ 314               	#  include <avr/iotn13.h>
+ 315               	#elif defined (__AVR_ATtiny13A__)
+ 316               	#  include <avr/iotn13a.h>
+ 317               	#elif defined (__AVR_ATtiny25__)
+ 318               	#  include <avr/iotn25.h>
+ 319               	#elif defined (__AVR_ATtiny4313__)
+ 320               	#  include <avr/iotn4313.h>
+ 321               	#elif defined (__AVR_ATtiny45__)
+ 322               	#  include <avr/iotn45.h>
+ 323               	#elif defined (__AVR_ATtiny85__)
+ 324               	#  include <avr/iotn85.h>
+ 325               	#elif defined (__AVR_ATtiny24__)
+ 326               	#  include <avr/iotn24.h>
+ 327               	#elif defined (__AVR_ATtiny24A__)
+ 328               	#  include <avr/iotn24a.h>
+ 329               	#elif defined (__AVR_ATtiny44__)
+ 330               	#  include <avr/iotn44.h>
+ 331               	#elif defined (__AVR_ATtiny44A__)
+ 332               	#  include <avr/iotn44a.h>
+ 333               	#elif defined (__AVR_ATtiny84__)
+ 334               	#  include <avr/iotn84.h>
+ 335               	#elif defined (__AVR_ATtiny261__)
+ 336               	#  include <avr/iotn261.h>
+ 337               	#elif defined (__AVR_ATtiny261A__)
+ 338               	#  include <avr/iotn261a.h>
+ 339               	#elif defined (__AVR_ATtiny461__)
+ 340               	#  include <avr/iotn461.h>
+ 341               	#elif defined (__AVR_ATtiny461A__)
+ 342               	#  include <avr/iotn461a.h>
+ 343               	#elif defined (__AVR_ATtiny861__)
+ 344               	#  include <avr/iotn861.h>
+ 345               	#elif defined (__AVR_ATtiny861A__)
+ 346               	#  include <avr/iotn861a.h>
+ 347               	#elif defined (__AVR_ATtiny43U__)
+ 348               	#  include <avr/iotn43u.h>
+ 349               	#elif defined (__AVR_ATtiny48__)
+ 350               	#  include <avr/iotn48.h>
+ 351               	#elif defined (__AVR_ATtiny88__)
+ 352               	#  include <avr/iotn88.h>
+ 353               	#elif defined (__AVR_ATtiny87__)
+ 354               	#  include <avr/iotn87.h>
+ 355               	#elif defined (__AVR_ATtiny167__)
+ 356               	#  include <avr/iotn167.h>
+ 357               	#elif defined (__AVR_AT90SCR100__)
+ 358               	#  include <avr/io90scr100.h>
+ 359               	#elif defined (__AVR_ATxmega16A4__)
+ 360               	#  include <avr/iox16a4.h>
+ 361               	#elif defined (__AVR_ATxmega16D4__)
+ 362               	#  include <avr/iox16d4.h>
+ 363               	#elif defined (__AVR_ATxmega32A4__)
+ 364               	#  include <avr/iox32a4.h>
+ 365               	#elif defined (__AVR_ATxmega32D4__)
+ 366               	#  include <avr/iox32d4.h>
+ 367               	#elif defined (__AVR_ATxmega64A1__)
+ 368               	#  include <avr/iox64a1.h>
+ 369               	#elif defined (__AVR_ATxmega64A3__)
+ 370               	#  include <avr/iox64a3.h>
+ 371               	#elif defined (__AVR_ATxmega64D3__)
+ 372               	#  include <avr/iox64d3.h>
+ 373               	#elif defined (__AVR_ATxmega128A1__)
+ 374               	#  include <avr/iox128a1.h>
+ 375               	#elif defined (__AVR_ATxmega128A3__)
+ 376               	#  include <avr/iox128a3.h>
+ 377               	#elif defined (__AVR_ATxmega128D3__)
+ 378               	#  include <avr/iox128d3.h>
+ 379               	#elif defined (__AVR_ATxmega192A3__)
+ 380               	#  include <avr/iox192a3.h>
+ 381               	#elif defined (__AVR_ATxmega192D3__)
+ 382               	#  include <avr/iox192d3.h>
+ 383               	#elif defined (__AVR_ATxmega256A3__)
+ 384               	#  include <avr/iox256a3.h>
+ 385               	#elif defined (__AVR_ATxmega256A3B__)
+ 386               	#  include <avr/iox256a3b.h>
+ 387               	#elif defined (__AVR_ATxmega256D3__)
+ 388               	#  include <avr/iox256d3.h>
+ 389               	#elif defined (__AVR_ATA6289__)
+ 390               	#  include <avr/ioa6289.h>
+ 391               	/* avr1: the following only supported for assembler programs */
+ 392               	#elif defined (__AVR_ATtiny28__)
+ 393               	#  include <avr/iotn28.h>
+ 394               	#elif defined (__AVR_AT90S1200__)
+ 395               	#  include <avr/io1200.h>
+ 396               	#elif defined (__AVR_ATtiny15__)
+ 397               	#  include <avr/iotn15.h>
+ 398               	#elif defined (__AVR_ATtiny12__)
+ 399               	#  include <avr/iotn12.h>
+ 400               	#elif defined (__AVR_ATtiny11__)
+ 401               	#  include <avr/iotn11.h>
+ 402               	#else
+ 403               	#  if !defined(__COMPILING_AVR_LIBC__)
+ 404               	#    warning "device type not defined"
+ 405               	#  endif
+ 406               	#endif
+ 407               	
+ 408               	#include <avr/portpins.h>
+   1               	/* Copyright (c) 2003  Theodore A. Roth
+ 409               	
+ 410               	#include <avr/common.h>
+   1               	/* Copyright (c) 2007 Eric B. Weddington
+ 411               	
+ 412               	#include <avr/version.h>
+   1               	/* Copyright (c) 2005, Joerg Wunsch                               -*- c -*-
+ 413               	
+ 414               	/* Include fuse.h after individual IO header files. */
+ 415               	#include <avr/fuse.h>
+   1               	/* Copyright (c) 2007, Atmel Corporation
+ 416               	
+ 417               	/* Include lock.h after individual IO header files. */
+ 418               	#include <avr/lock.h>
+   1               	/* Copyright (c) 2007, Atmel Corporation
+ 419               	
+  36               	* These values are added to the delayloop counter before the first      */
+  37               	/* bitpair read/write. They were determined experimentally to center the */
+  38               	/* range of working OSCCAL values around the default value.              */
+  39               	#define JIFFY_OFFSET_WRITE 30
+  40               	#define JIFFY_OFFSET_READ  30
+  41               	
+  42               	        .section .text
+  43               	
+  44               	#if defined(IEC_ATN_INT_VECT) && defined(CONFIG_LOADER_DREAMLOAD)
+  45               	        ;; ===================================================================
+  46               	        ;; ATN(+CLK) Interrupt service routine for IEC bus
+  47               	        ;; ===================================================================
+  48               	        ;
+  49               	        ; Functions called from here may change these registers:
+  50               	        ; r0, r18, r19, r24
+  51               	        ; Other registers must be saved and restored by the called functions
+  52               	        ;
+  53               	        .global IEC_ATN_INT_VECT
+  54               	IEC_ATN_INT_VECT:
+  55               	        ; functions called from here must only change these registers:
+  56               	        push    r18
+  57               	        in      r18, _SFR_IO_ADDR(SREG)
+  58:fastloader-ll.S ****         push    r18
+  59:fastloader-ll.S ****         push    r19
+  60:fastloader-ll.S ****         push    r24
+  61:fastloader-ll.S ****         push    r0
+  62:fastloader-ll.S **** 
+  63:fastloader-ll.S **** #ifdef IEC_PCMSK
+  64               	        lds     r18, _SFR_ADDR(IEC_PCMSK)
+  65               	        bst     r18, IEC_PIN_ATN        ; only check ATN
+  66:fastloader-ll.S ****         brtc    iiv_atn_irq_end         ; if it is an IRQ source
+  67:fastloader-ll.S **** #endif
+  68:fastloader-ll.S **** 
+  69               	        ; check if ATN is low
+  70               	        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+  71               	        rjmp    iiv_atn_irq_end
+  72:fastloader-ll.S **** 
+  73:fastloader-ll.S ****         ; ATN is low, continue depending from active fast loader
+  74               	        lds     r18, detected_loader
+  75               	        cpi     r18, FL_DREAMLOAD_OLD
+  76:fastloader-ll.S ****         brne    iiv_not_fl_dreamload_old
+  77:fastloader-ll.S ****         ; dreamload (old), receive a command code
+  78:fastloader-ll.S ****         rcall   dreamload_get_command_old
+  79               	        rjmp    iiv_atn_irq_end         ; no other ATN action needed
+  80:fastloader-ll.S **** 
+  81:fastloader-ll.S **** iiv_not_fl_dreamload_old:
+  82               	        ; no custom behaviour, this is ATN ACK
+  83               	        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA    ; DATA low
+  84               	
+  85:fastloader-ll.S **** iiv_atn_irq_end:
+  86               	#ifdef IEC_PCMSK
+  87               	        lds     r18, _SFR_ADDR(IEC_PCMSK)
+  88               	        bst     r18, IEC_PIN_CLOCK      ; only check CLOCK
+  89:fastloader-ll.S ****         brtc    iiv_clock_irq_end       ; if it is an IRQ source
+  90:fastloader-ll.S **** 
+  91:fastloader-ll.S ****         ; check if CLOCK is low
+  92               	        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+  93               	        rjmp    iiv_clock_irq_end
+  94:fastloader-ll.S **** 
+  95:fastloader-ll.S ****         ; CLOCK is low, continue depending from active fast loader
+  96               	        lds     r18, detected_loader
+  97               	        cpi     r18, FL_DREAMLOAD
+  98:fastloader-ll.S ****         brne    iiv_not_fl_dreamload
+  99:fastloader-ll.S ****         ; dreamload, receive a command code
+ 100:fastloader-ll.S ****         rcall   dreamload_get_command
+ 101               	        rjmp    iiv_clock_irq_end       ; no other CLOCK action needed
+ 102:fastloader-ll.S **** 
+ 103:fastloader-ll.S **** iiv_not_fl_dreamload:
+ 104               	#endif // ifdef IEC_PCMSK
+ 105               	
+ 106               	iiv_clock_irq_end:
+ 107               	
+ 108               	        pop     r0
+ 109               	        pop     r24
+ 110:fastloader-ll.S ****         pop     r19
+ 111:fastloader-ll.S ****         pop     r18
+ 112:fastloader-ll.S ****         out     _SFR_IO_ADDR(SREG), r18
+ 113:fastloader-ll.S ****         pop     r18
+ 114:fastloader-ll.S ****         reti
+ 115:fastloader-ll.S **** #endif // ifdef IEC_ATN_INT_VECT
+ 116:fastloader-ll.S **** 
+ 117               	
+ 118               	#ifdef IEC_CLK_INT_VECT
+ 119               	        ;; ===================================================================
+ 120               	        ;; CLK Interrupt service routine for IEC bus
+ 121               	        ;; ===================================================================
+ 122               	        ;
+ 123               	        ; Functions called from here may change these registers:
+ 124               	        ; r0, r18, r19, r24
+ 125               	        ; Other registers must be saved and restored by the called functions
+ 126               	        ;
+ 127               	        .global IEC_CLK_INT_VECT
+ 128               	IEC_CLK_INT_VECT:
+ 129               	        ; functions called from here must only change these registers:
+ 130               	        push    r18
+ 131               	        in      r18, _SFR_IO_ADDR(SREG)
+ 132               	        push    r18
+ 133               	        push    r19
+ 134               	        push    r24
+ 135               	        push    r0
+ 136               	
+ 137               	        ; check if CLOCK is low
+ 138               	        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 139               	        rjmp    clk_irq_end
+ 140               	
+ 141               	        ; CLOCK is low, continue depending from active fast loader
+ 142               	#ifdef CONFIG_LOADER_DREAMLOAD
+ 143               	        lds     r18, detected_loader
+ 144               	        cpi     r18, FL_DREAMLOAD
+ 145               	        brne    clk_not_fl_dreamload
+ 146               	        ; dreamload, receive a command code
+ 147               	        rcall   dreamload_get_command
+ 148               	        rjmp    clk_irq_end       ; no other CLOCK action needed
+ 149               	clk_not_fl_dreamload:
+ 150               	#endif // ifdef CONFIG_LOADER_DREAMLOAD
+ 151               	
+ 152               	clk_irq_end:
+ 153               	
+ 154               	        pop     r0
+ 155               	        pop     r24
+ 156               	        pop     r19
+ 157               	        pop     r18
+ 158               	        out     _SFR_IO_ADDR(SREG), r18
+ 159               	        pop     r18
+ 160               	        reti
+ 161               	#endif // ifdef IEC_CLK_INT_VECT
+ 162               	
+ 163               	
+ 164               	        ;; ===================================================================
+ 165               	        ;;  Utility routines
+ 166               	        ;; ===================================================================
+ 167               	
+ 168               	        ;;  Used by the macro below, don't call directly
+ 169               	cycleloop2:
+ 170               	        nop                     ; 1
+ 171               	cycleloop1:
+ 172:fastloader-ll.S ****         nop                     ; 1
+ 173               	cycleloop0:
+ 174:fastloader-ll.S ****         dec     r18             ; 1
+ 175               	        brne    cycleloop0      ; 2/1
+ 176:fastloader-ll.S ****         ret                     ; 4
+ 177:fastloader-ll.S **** 
+ 178:fastloader-ll.S ****         ;; This macro waits for the specified number of cycles
+ 179               	        ;;  Uses r18
+ 180               	        .macro delay_cycles num
+ 181               	        ldi     r18, 1 + (\num - 10) / 3 ; 1
+ 182               	        .if (\num - 10) % 3 == 0
+ 183               	        rcall   cycleloop0      ; 3
+ 184               	        .elseif (\num - 10) % 3 == 1
+ 185               	        rcall   cycleloop1      ; 3
+ 186               	        .else
+ 187               	        rcall   cycleloop2      ; 3
+ 188               	        .endif
+ 189               	        .endm
+ 190               	
+ 191               	
+ 192               	        ;; Including the rcall this will delay for 8 cycles
+ 193               	delay1us:
+ 194               	        nop                     ; 1
+ 195               	        ret                     ; 4
+ 196:fastloader-ll.S **** 
+ 197:fastloader-ll.S ****         ;; wait for ATN high
+ 198               	wait_atn_high:
+ 199               	        sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 200               	        rjmp    wait_atn_high
+ 201:fastloader-ll.S ****         ret
+ 202:fastloader-ll.S **** 
+ 203:fastloader-ll.S ****         ;; wait for ATN low
+ 204               	wait_atn_low:
+ 205               	        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 206               	        rjmp    wait_atn_low
+ 207:fastloader-ll.S ****         ret
+ 208:fastloader-ll.S **** 
+ 209:fastloader-ll.S **** 
+ 210               	        ;; ====================================================================
+ 211               	        ;;  JiffyDOS
+ 212               	        ;; ====================================================================
+ 213               	
+ 214               	        ;;
+ 215               	        ;; Receives a single byte using the JiffyDOS protocol
+ 216               	        ;; return uint8_t reveicedbyte (r24)
+ 217               	        ;;
+ 218               	        .global jiffy_receive
+ 219               	jiffy_receive:
+ 220               	        ;; Disable interrupts
+ 221               	        cli
+ 222               	
+ 223:fastloader-ll.S ****         ;; Move pointer to EOF variable into Z
+ 224               	        movw    r30,r24
+ 225               	        clr     r24             ; clear output register
+ 226:fastloader-ll.S ****         clr     r25             ; clear high byte of return value
+ 227:fastloader-ll.S **** 
+ 228:fastloader-ll.S ****         ;; Set clock+data high
+ 229               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 230               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 231:fastloader-ll.S **** 
+ 232:fastloader-ll.S ****         ;; Wait until clock is high and emulate ATN-Ack
+ 233               	0:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 234               	        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA ; Data low if ATN is low
+ 235:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 236:fastloader-ll.S ****         rjmp    0b
+ 237:fastloader-ll.S **** 
+ 238:fastloader-ll.S ****         ;; Wait for 13us from clock high -> 104 cycles
+ 239               	        delay_cycles 104 + JIFFY_OFFSET_READ ; 104 + Offset
+ 240               	
+ 241:fastloader-ll.S ****         ;; Read bit 5+4
+ 242               	        in      r0, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 243               	
+ 244:fastloader-ll.S ****         ;; Store bits in r24
+ 245               	        bst     r0, IEC_PIN_DATA  ; 1 - get data bit
+ 246               	        bld     r24, 5            ; 1 - store as bit 5
+ 247:fastloader-ll.S ****         bst     r0, IEC_PIN_CLOCK ; 1 - get clock bit
+ 248:fastloader-ll.S ****         bld     r24, 4            ; 1 - store as bit 4
+ 249:fastloader-ll.S **** 
+ 250:fastloader-ll.S ****         ;; Wait 13us -> 104-5=99 cycles
+ 251               	        delay_cycles 99         ; 99
+ 252               	
+ 253:fastloader-ll.S ****         ;; Read bit 7+6
+ 254               	        in      r0, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 255               	
+ 256:fastloader-ll.S ****         ;; Store bits in r24
+ 257               	        bst     r0, IEC_PIN_DATA  ; 1 - get data bit
+ 258               	        bld     r24, 7            ; 1 - store as bit 7
+ 259:fastloader-ll.S ****         bst     r0, IEC_PIN_CLOCK ; 1 - get clock bit
+ 260:fastloader-ll.S ****         bld     r24, 6            ; 1 - store as bit 6
+ 261:fastloader-ll.S **** 
+ 262:fastloader-ll.S ****         ;; Wait 11us -> 88-5=83 cycles
+ 263               	        delay_cycles 83         ; 83
+ 264               	
+ 265:fastloader-ll.S ****         ;; Read bit 1+3 [sic]
+ 266               	        in      r0, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 267               	        bst     r0, IEC_PIN_DATA  ; 1 - get data bit
+ 268:fastloader-ll.S ****         bld     r24, 1            ; 1 - store as bit 1
+ 269:fastloader-ll.S ****         bst     r0, IEC_PIN_CLOCK ; 1 - get clock bit
+ 270:fastloader-ll.S ****         bld     r24, 3            ; 1 - store as bit 3
+ 271:fastloader-ll.S **** 
+ 272:fastloader-ll.S ****         ;; Wait 13us -> 104-5=99 cycles
+ 273               	        delay_cycles 99         ; 99
+ 274               	
+ 275:fastloader-ll.S ****         ;; Read Bit 0+2
+ 276               	        in      r0, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 277               	        bst     r0, IEC_PIN_DATA  ; 1 - get data bit
+ 278:fastloader-ll.S ****         bld     r24, 0            ; 1 - store as bit 0
+ 279:fastloader-ll.S ****         bst     r0, IEC_PIN_CLOCK ; 1 - get clock bit
+ 280:fastloader-ll.S ****         bld     r24, 2            ; 1 - store as bit 2
+ 281:fastloader-ll.S **** 
+ 282:fastloader-ll.S ****         ;; Wait 13us -> 104-5=99 cycles
+ 283               	        delay_cycles 99         ; 99
+ 284               	
+ 285:fastloader-ll.S ****         ;; Read EOI mark
+ 286               	        in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 287               	
+ 288:fastloader-ll.S ****         ;; Wait 6us -> 48-1=47 cycles
+ 289               	        delay_cycles 47         ; 47
+ 290               	
+ 291:fastloader-ll.S ****         ;; Data low
+ 292               	        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA ; 1
+ 293               	        delay_cycles 10*8       ; make sure the C64 can see that
+ 294:fastloader-ll.S **** 
+ 295:fastloader-ll.S ****         ;; Post-process data and store last bus state
+ 296               	        com     r24             ; invert received data (result)
+ 297               	        st      Z, r19          ; store last bus state
+ 298:fastloader-ll.S ****         sei                     ; enable interrupts
+ 299:fastloader-ll.S ****         ret
+ 300:fastloader-ll.S **** 
+ 301:fastloader-ll.S **** 
+ 302               	
+ 303               	        ;; Shifts the lowest two bits from r0 to r19
+ 304               	        ;; and sends then on the bus at cycle 12
+ 305               	        ;; Needs 16 cycles including the rcall
+ 306               	jiffy_sendbits:
+ 307               	        in      r19, _SFR_IO_ADDR(IEC_OUT) ; 1 - read port
+ 308               	        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 309:fastloader-ll.S ****                                     ; 1 - mask IEC bits
+ 310:fastloader-ll.S ****         bst     r0, 0               ; 1 - get bit 0
+ 311               	        bld     r19, IEC_OPIN_CLOCK ; 1 - send on the clock line
+ 312:fastloader-ll.S ****         bst     r0, 1               ; 1 - get bit 1
+ 313:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - send on the data line
+ 314:fastloader-ll.S ****         lsr     r0                  ; 1 - remove source bits
+ 315:fastloader-ll.S ****         lsr     r0                  ; 1
+ 316:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1 - output the bit pair
+ 317:fastloader-ll.S ****         ret                         ; 4
+ 318:fastloader-ll.S **** 
+ 319:fastloader-ll.S ****         ;;
+ 320               	        ;; Sends a single byte using the Jiffy protocol
+ 321               	        ;; uint8_t value (r24), uint8_t eoi (r22), uint8_t loadflags (r20)
+ 322               	        ;; return uint8_t atnactive (r24)
+ 323               	        ;;
+ 324               	        ;; eoi should always be 0 for LOAD because the eoi marker is
+ 325               	        ;; transmitted in a different way there (see C code).
+ 326               	        ;;
+ 327               	        ;; Loadflags has a dual purpose:
+ 328               	        ;;  - if it's != 0, the start condition will be modified for Jiffy-LOAD
+ 329               	        ;;  - bit 7 will be cleared after that
+ 330               	        ;;  - if it's still != 0, the function will exit after sending
+ 331               	        ;;    the last bitpair - required for all but the final byte of a block
+ 332               	        ;;    during LOAD
+ 333               	        .global jiffy_send
+ 334               	jiffy_send:
+ 335               	        cli                     ; Disable interrupts
+ 336               	
+ 337:fastloader-ll.S ****         ;; Calculate bus wait condition based on current state
+ 338               	        ;; The loop below will spin while ATN and Clock are high and
+ 339               	        ;; - Data is low  (single-byte transfer)
+ 340               	        ;; - Data is high (LOAD)
+ 341               	        ldi     r21, IEC_BIT_CLOCK | IEC_BIT_ATN
+ 342               	        tst     r20             ; loadflag set?
+ 343:fastloader-ll.S ****         breq    0f              ; Yes, skip
+ 344:fastloader-ll.S ****                 ; No: Set data bit
+ 345:fastloader-ll.S ****         ori     r21, IEC_BIT_DATA
+ 346               	
+ 347:fastloader-ll.S **** 0:      andi    r20, 0x7f       ; Clear bit 7 of loadflags
+ 348               	
+ 349:fastloader-ll.S ****         ;; Calculate bus state for EOI/not-EOI mark
+ 350               	        tst     r22             ; EOI flag set?
+ 351               	        breq    0f              ; No, branch
+ 352:fastloader-ll.S **** 
+ 353:fastloader-ll.S ****         in      r22, _SFR_IO_ADDR(IEC_OUT)
+ 354               	        andi    r22, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 355:fastloader-ll.S ****         ori     r22, IEC_OBIT_DATA ; Data low, Clock hi on EOI
+ 356:fastloader-ll.S ****         rjmp    1f
+ 357:fastloader-ll.S **** 
+ 358:fastloader-ll.S **** 0:      in      r22, _SFR_IO_ADDR(IEC_OUT)
+ 359               	        andi    r22, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 360:fastloader-ll.S ****         ori     r22, IEC_OBIT_CLOCK ; Data hi, Clock low on non-EOI
+ 361:fastloader-ll.S **** 
+ 362:fastloader-ll.S **** 1:
+ 363               	        ;; Set clock and data high/inactive - FFB5
+ 364               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 365               	                ; this is the actual ready signal for the C64
+ 366:fastloader-ll.S ****         cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 367               	
+ 368:fastloader-ll.S ****         ;; Wait 1us to allow the bus to settle (J1541 needs 4us here)
+ 369               	        rcall   delay1us
+ 370               	
+ 371:fastloader-ll.S ****         ;; Set up a few registers
+ 372               	        mov     r0, r24         ; move data byte to r0
+ 373               	        com     r0              ; invert data byte
+ 374:fastloader-ll.S **** 
+ 375:fastloader-ll.S ****         ;; Wait for start condition (calculated above) from C64 - FFB8
+ 376               	0:      in      r24, _SFR_IO_ADDR(IEC_PIN)
+ 377               	        andi    r24, IEC_BIT_CLOCK | IEC_BIT_DATA | IEC_BIT_ATN ; 1
+ 378:fastloader-ll.S ****         cp      r24, r21        ; 1
+ 379:fastloader-ll.S ****         breq    0b              ; 1
+ 380:fastloader-ll.S **** 
+ 381:fastloader-ll.S ****         ;; Check for ATN (J1541 doesn't do this, but I'm paranoid)
+ 382               	        ;; Doesn't work, further analysis required
+ 383               	        andi    r24, IEC_BIT_ATN ; 1
+ 384               	        breq    js_finish        ; 1 - jump if ATN is low
+ 385:fastloader-ll.S **** 
+ 386:fastloader-ll.S ****         ;; Output the first bitpair 6us (48 cycles) after the start
+ 387               	        ;; 6us is the best-case time from bus check to transmission in J1541
+ 388               	        delay_cycles 31 + JIFFY_OFFSET_WRITE
+ 389               	                                ; 31 = 48-17
+ 390:fastloader-ll.S ****         rcall   jiffy_sendbits  ; 12+4 - [FFBD]
+ 391               	
+ 392:fastloader-ll.S ****         ;; Output the second bitpair 10us (80 cycles) after the first
+ 393               	        delay_cycles 64         ; 64 = 80-16
+ 394               	
+ 395:fastloader-ll.S ****         rcall   jiffy_sendbits  ; 12+4 - [FFC4]
+ 396               	
+ 397:fastloader-ll.S ****         ;; Output the third bitpair 11us (88 cycles) after the second
+ 398               	        delay_cycles 72         ; 72 = 88-16
+ 399               	
+ 400:fastloader-ll.S ****         rcall   jiffy_sendbits  ; 12+4 - [FFCC]
+ 401               	
+ 402:fastloader-ll.S ****         ;; Output the fourth bitpair 10us (80 cycles) after the third
+ 403               	        delay_cycles 64         ; 64 = 80-16
+ 404               	
+ 405:fastloader-ll.S ****         rcall   jiffy_sendbits  ; 12+4 - [FFD3]
+ 406               	
+ 407:fastloader-ll.S ****         ;; Skip sending EOI for LOAD code path
+ 408               	        tst     r20             ; 1
+ 409               	        brne    js_finish       ; 1
+ 410:fastloader-ll.S **** 
+ 411:fastloader-ll.S ****         ;; Output EOI marker 11us (88 cycles) after the last bitpair
+ 412               	        delay_cycles 81         ; 81 = 88-7
+ 413               	
+ 414:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r22 ; 1 - output EOI marker [FFDB]
+ 415               	
+ 416:fastloader-ll.S ****         ;; Wait 1us to allow the bus to settle (J1541 needs 4us here)
+ 417               	        rcall   delay1us
+ 418               	
+ 419:fastloader-ll.S ****         ;; Wait until data is low, check ATN [FFDE]
+ 420               	        ;; This loop won't wait when EOI is signalled.
+ 421               	0:      in      r24, _SFR_IO_ADDR(IEC_PIN) ; Read bus
+ 422               	        sbrs    r24, IEC_PIN_ATN           ; Skip if ATN is high
+ 423:fastloader-ll.S ****         rjmp    js_finish                  ; ATN low, exit loop
+ 424:fastloader-ll.S ****         sbrc    r24, IEC_PIN_DATA          ; Skip if Data is low
+ 425:fastloader-ll.S ****         rjmp    0b                         ; No Data, no ATN -> loop
+ 426:fastloader-ll.S **** 
+ 427:fastloader-ll.S **** js_finish:
+ 428               	        com     r24             ; invert port state (ATN low returns true)
+ 429               	        andi    r24, IEC_BIT_ATN ; single out ATN bit
+ 430:fastloader-ll.S **** 
+ 431:fastloader-ll.S ****         sei                     ; re-enable interrupts
+ 432               	        ret
+ 433:fastloader-ll.S **** 
+ 434:fastloader-ll.S **** 
+ 435               	#ifdef CONFIG_LOADER_TURBODISK
+ 436               	        ;; ====================================================================
+ 437               	        ;;  Turbodisk
+ 438               	        ;; ====================================================================
+ 439               	
+ 440               	        ;;
+ 441               	        ;; Sends a single byte in r24 using the Turbodisk protocol
+ 442               	        ;;
+ 443               	        .global turbodisk_byte
+ 444               	turbodisk_byte:
+ 445               	        ;; Wait until data is low
+ 446               	        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+ 447               	        rjmp    turbodisk_byte
+ 448:fastloader-ll.S **** 
+ 449:fastloader-ll.S ****         ;; Byte preparation
+ 450               	        com     r24             ; Invert the data byte
+ 451               	
+ 452:fastloader-ll.S ****         ;; All bus lines high
+ 453               	        in      r18, _SFR_IO_ADDR(IEC_OUT)
+ 454               	        andi    r18, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 455:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r18
+ 456:fastloader-ll.S **** 
+ 457:fastloader-ll.S ****         ;; Wait until data is high
+ 458               	0:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA ; 2
+ 459               	        rjmp    0b
+ 460:fastloader-ll.S **** 
+ 461:fastloader-ll.S ****         rcall   delay1us        ; Move the timing window slightly
+ 462               	
+ 463:fastloader-ll.S ****         ldi     r20, 4          ; 1 - Bitpair counter
+ 464               	
+ 465:fastloader-ll.S **** tdbitloop:
+ 466               	        in      r19, _SFR_IO_ADDR(IEC_OUT) ; 1 - read & mask unused IEC port lines
+ 467               	        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ) ; 1
+ 468:fastloader-ll.S ****         bst     r24, 7              ; 1 - grab bit 7
+ 469:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+ 470:fastloader-ll.S ****         bst     r24, 6              ; 1 - grab bit 6
+ 471:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+ 472:fastloader-ll.S ****         lsl     r24                 ; 1 - remove source bits
+ 473:fastloader-ll.S ****         lsl     r24                 ; 1
+ 474:fastloader-ll.S **** 
+ 475:fastloader-ll.S ****         ;; Wait for 28us from data high -> 224-9=215 cycles
+ 476               	        delay_cycles 215        ; 215
+ 477               	
+ 478:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r19      ; 1 - output the bit pair
+ 479               	
+ 480:fastloader-ll.S ****         rcall   delay1us        ; 8 - additional us for loops 2-4
+ 481               	
+ 482:fastloader-ll.S ****         dec     r20             ; 1 - Decrement bitpair counter
+ 483               	        brne    tdbitloop       ; 2/1 - loop until done
+ 484:fastloader-ll.S **** 
+ 485:fastloader-ll.S ****         ;; Wait for 26us from last bitpair -> 208-12=196 cycles
+ 486               	        delay_cycles 196        ; 196
+ 487               	
+ 488:fastloader-ll.S ****         ;; Data high, Clock low
+ 489               	        in      r18, _SFR_IO_ADDR(IEC_OUT)
+ 490               	        andi    r18, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 491:fastloader-ll.S ****         ori     r18, IEC_OBIT_CLOCK
+ 492:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r18
+ 493:fastloader-ll.S **** 
+ 494:fastloader-ll.S ****         ret
+ 495               	
+ 496:fastloader-ll.S **** 
+ 497               	        ;;
+ 498               	        ;; Sends a complete buffer of r22 bytes at r24/r25 using the Turbodisk protocol
+ 499               	        ;;
+ 500               	        .global turbodisk_buffer
+ 501               	turbodisk_buffer:
+ 502               	        ;; Wait until data is low
+ 503               	        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+ 504               	        rjmp    turbodisk_buffer
+ 505:fastloader-ll.S **** 
+ 506:fastloader-ll.S ****         ;; All bus lines high
+ 507               	        in      r18, _SFR_IO_ADDR(IEC_OUT)
+ 508               	        andi    r18, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 509:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r18
+ 510:fastloader-ll.S **** 
+ 511:fastloader-ll.S ****         movw    r30,r24         ; output pointer
+ 512               	
+ 513:fastloader-ll.S ****         ;; Wait until data is high
+ 514               	0:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA ; 2
+ 515               	        rjmp    0b
+ 516:fastloader-ll.S **** 
+ 517:fastloader-ll.S ****         ;; Initial delay of 4 us + move the timing window by 1 us for stability
+ 518               	        delay_cycles (4+1)*8    ; 40
+ 519               	
+ 520:fastloader-ll.S ****         ;; 287 AVR cycles from here to first LDA $DD00 on C64 side ($F822)
+ 521               	tdbyteloop:
+ 522               	        ld      r0, Z+          ; 2 - load byte
+ 523               	        ldi     r20, 4          ; 1 - bitpair counter
+ 524:fastloader-ll.S ****         com     r0              ; 1 - invert data byte
+ 525:fastloader-ll.S **** 
+ 526:fastloader-ll.S ****         ;; Waste another 12 us -> 96-4=92 cycles
+ 527               	        delay_cycles 92         ; 92
+ 528               	
+ 529:fastloader-ll.S **** tdbitloop2:
+ 530               	        in      r19, _SFR_IO_ADDR(IEC_OUT) ; 1 - read & mask unused IEC port lines
+ 531               	        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ) ; 1
+ 532:fastloader-ll.S ****         bst     r0, 7               ; 1 - grab bit 7
+ 533:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+ 534:fastloader-ll.S ****         bst     r0, 6               ; 1 - grab bit 6
+ 535:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+ 536:fastloader-ll.S ****         lsl     r0                  ; 1 - remove source bits
+ 537:fastloader-ll.S ****         lsl     r0                  ; 1
+ 538:fastloader-ll.S **** 
+ 539:fastloader-ll.S ****         ;; Wait another 24 us -> 192-9=183 cycles
+ 540               	        delay_cycles 183        ; 183
+ 541               	
+ 542:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r19      ; 1 - output the bit pair
+ 543               	
+ 544:fastloader-ll.S ****         ;; 5 us -> 40-3=37 cycles
+ 545               	        delay_cycles 37         ; 37
+ 546               	
+ 547:fastloader-ll.S ****         dec     r20             ; 1 - Decrement bitpair counter
+ 548               	        brne    tdbitloop2      ; 2/1 - loop until done
+ 549:fastloader-ll.S **** 
+ 550:fastloader-ll.S ****         ;; Wait 10 us -> 80-3+1=78 cycles
+ 551               	        delay_cycles 78         ; 78
+ 552               	
+ 553:fastloader-ll.S ****         dec     r22             ; 1 - Decrement byte counter
+ 554               	        brne    tdbyteloop      ; 2/1 - loop until done
+ 555:fastloader-ll.S **** 
+ 556:fastloader-ll.S ****         ;; Final delay: 11 us -> 88 cycles
+ 557               	        delay_cycles 88         ; 88
+ 558               	
+ 559:fastloader-ll.S ****         ;; Data high, Clock low
+ 560               	        in      r18, _SFR_IO_ADDR(IEC_OUT)
+ 561               	        andi    r18, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 562:fastloader-ll.S ****         ori     r18, IEC_OBIT_CLOCK
+ 563:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r18
+ 564:fastloader-ll.S **** 
+ 565:fastloader-ll.S ****         ret
+ 566               	#endif
+ 567:fastloader-ll.S **** 
+ 568               	#if defined(CONFIG_LOADER_DREAMLOAD) || defined(CONFIG_LOADER_FC3) || defined(CONFIG_LOADER_ULOAD3)
+ 569               	        ;;
+ 570               	        ;; Set bit 0 of r0 on CLOCK and bit 1 on DATA
+ 571               	        ;; A bit value of one means pull down
+ 572               	        ;; After sending these two bits r0 is shifted right two bits
+ 573               	        ;;
+ 574               	        ;; r19 is used as scratch reg here
+ 575               	        ;;
+ 576               	        ;; Takes 10 cycles before OUT (incl. rcall)
+ 577               	        ;; Takes 6 cycles to return after OUT
+ 578               	        ;;
+ 579               	send_bits_to_clk_data:
+ 580               	        ; rcall                  ; 3
+ 581               	        in   r19, _SFR_IO_ADDR(IEC_OUT) ; 1 - read & mask unused IEC port lines
+ 582               	        andi r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ) ; 1
+ 583:fastloader-ll.S ****         bst  r0, 0               ; 1 - take bit 0 (lsb)
+ 584:fastloader-ll.S ****         bld  r19, IEC_OPIN_CLOCK ; 1 - for CLOCK line
+ 585:fastloader-ll.S ****         bst  r0, 1               ; 1 - take bit 1
+ 586:fastloader-ll.S ****         bld  r19, IEC_OPIN_DATA  ; 1 - for DATA line
+ 587:fastloader-ll.S ****         out  _SFR_IO_ADDR(IEC_OUT), r19 ; 1 - output the bit pair
+ 588:fastloader-ll.S **** 
+ 589:fastloader-ll.S ****         lsr  r0                  ; 1
+ 590               	        lsr  r0                  ; 1 - prepare next two bits
+ 591:fastloader-ll.S **** 
+ 592:fastloader-ll.S ****         ret                      ; 4
+ 593               	
+ 594:fastloader-ll.S ****         ;;
+ 595               	        ;; Get DATA  => bit 0
+ 596               	        ;; and CLOCK => bit 2 of r24
+ 597               	        ;; Low level means value 0 here
+ 598               	        ;;
+ 599               	        ;; r19 is used as scratch reg here
+ 600               	        ;;
+ 601               	        ;; Takes 4 cycles before IN (incl. rcall)
+ 602               	        ;; Takes 8 cycles to return after IN
+ 603               	        ;;
+ 604               	get_bits_from_clk_data:
+ 605               	        ; rcall                         ; 3
+ 606               	        in      r19, _SFR_IO_ADDR(IEC_PIN)  ; 1
+ 607               	        bst     r19, IEC_PIN_DATA       ; 1
+ 608:fastloader-ll.S ****         bld     r24, 0                  ; 1
+ 609:fastloader-ll.S ****         bst     r19, IEC_PIN_CLOCK      ; 1
+ 610:fastloader-ll.S ****         bld     r24, 2                  ; 1
+ 611:fastloader-ll.S ****         ret                             ; 4
+ 612:fastloader-ll.S **** 
+ 613:fastloader-ll.S **** #endif
+ 614               	
+ 615               	#if defined(CONFIG_LOADER_FC3) || defined(CONFIG_LOADER_ULOAD3) || defined(CONFIG_LOADER_ELOAD1)
+ 616               	        ;;
+ 617               	        ;; Do this kind of handshake:
+ 618               	        ;; set CLOCK low, wait for DATA going low,
+ 619               	        ;; release CLOCK, wait for DATA going high
+ 620               	        ;; returns without waiting if ATN is low
+ 621               	        ;;
+ 622               	        ;; cycles from DATA high to return to caller: 5-10
+ 623               	        ;;
+ 624               	        .global clk_data_handshake
+ 625               	clk_data_handshake:
+ 626               	        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 627               	1:
+ 628:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 629               	        rjmp    2f
+ 630:fastloader-ll.S ****         sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+ 631:fastloader-ll.S ****         rjmp    1b
+ 632:fastloader-ll.S ****         cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 633:fastloader-ll.S **** 1:
+ 634:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 635               	        rjmp    2f
+ 636:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+ 637:fastloader-ll.S ****         rjmp    1b
+ 638:fastloader-ll.S **** 2:
+ 639:fastloader-ll.S ****         ret
+ 640               	#endif
+ 641:fastloader-ll.S **** 
+ 642               	#ifdef CONFIG_LOADER_FC3
+ 643               	        ;;
+ 644               	        ;; Sends four bytes at r24/r25 using the FC3 protocol
+ 645               	        ;;
+ 646               	        .global fastloader_fc3_send_block
+ 647               	fastloader_fc3_send_block:
+ 648               	        cli
+ 649               	        movw    r30,r24         ; Z = output pointer
+ 650:fastloader-ll.S **** 
+ 651:fastloader-ll.S ****         ; pull CLOCK low for sync
+ 652               	        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK ; 1
+ 653               	
+ 654:fastloader-ll.S ****         ; 12 us between sync and bitpair
+ 655               	        delay_cycles 12 * 8 - 14 ; 83
+ 656               	
+ 657:fastloader-ll.S ****         ldi     r21, 4          ; 1 - byte counter
+ 658               	fc3_byteloop:
+ 659:fastloader-ll.S ****         ld      r0, Z+          ; 2 - load byte
+ 660               	
+ 661:fastloader-ll.S ****         com     r0              ; 1 - negate all bits
+ 662               	
+ 663:fastloader-ll.S ****         ldi     r20, 4          ; 1 - bitpair counter
+ 664               	fc3_bitloop:
+ 665:fastloader-ll.S ****         ; send r0[0,1] to CLOCK and DATA, shift r0 right two times
+ 666               	        ; changes r19
+ 667               	        rcall   send_bits_to_clk_data ; 10 + 6
+ 668               	
+ 669:fastloader-ll.S ****         ; wait 12 us between bitpair
+ 670               	        delay_cycles 12*8-19
+ 671               	
+ 672:fastloader-ll.S ****         dec     r20             ; 1 - decrement bitpair counter
+ 673               	        brne    fc3_bitloop     ; 2/1 - loop until done
+ 674:fastloader-ll.S **** fc3_next_byte:
+ 675:fastloader-ll.S ****         ; wait 2 us more between two bytes (16 cycles = -1 + 17)
+ 676               	        rcall   delay1us        ; 8
+ 677               	        rjmp    0f              ; 2
+ 678:fastloader-ll.S **** 0:
+ 679:fastloader-ll.S ****         dec     r21             ; 1 - decrement byte counter
+ 680               	        brne    fc3_byteloop    ; 2/1 - loop until done
+ 681:fastloader-ll.S **** 
+ 682:fastloader-ll.S ****         ; release CLOCK and DATA
+ 683               	        in      r19, _SFR_IO_ADDR(IEC_OUT) ; read & mask unused IEC port lines
+ 684               	        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 685:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r19 ; release CLOCK and DATA
+ 686:fastloader-ll.S **** 
+ 687:fastloader-ll.S ****         sei
+ 688               	        ret
+ 689:fastloader-ll.S **** 
+ 690:fastloader-ll.S ****         ;;
+ 691               	        ;; Receive one byte using the FC3 save protocol
+ 692               	        ;;
+ 693               	        .global fc3_get_byte
+ 694               	fc3_get_byte:
+ 695               	        cli
+ 696               	
+ 697:fastloader-ll.S ****         clr     r24     ; clear data byte
+ 698               	
+ 699:fastloader-ll.S ****         ; wait a moment before releasing data, otherwise the loop would run
+ 700               	        ; too fast. I confess that this value is guessed.
+ 701               	        delay_cycles 10 * 8
+ 702               	
+ 703:fastloader-ll.S ****         ; release DATA
+ 704               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 705               	
+ 706:fastloader-ll.S ****         ; wait until CLOCK goes high
+ 707               	1:
+ 708               	        sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK ; 1/2?
+ 709               	        rjmp    1b
+ 710:fastloader-ll.S **** 
+ 711:fastloader-ll.S ****         ; 17 us later...
+ 712               	        delay_cycles 17 * 8 - 6
+ 713               	
+ 714:fastloader-ll.S ****         ; get bits 5,7 @ 0,2 - changes r19
+ 715               	        rcall   get_bits_from_clk_data  ; 4 + 8 r24 = .....7.5
+ 716               	        lsl     r24                     ; 1     r24 = ....7.5.
+ 717:fastloader-ll.S **** 
+ 718:fastloader-ll.S ****         ; 13 us later...
+ 719               	        delay_cycles 13 * 8 - 13
+ 720               	
+ 721:fastloader-ll.S ****         ; get bits 4,6 @ 0,2 - changes r19
+ 722               	        rcall   get_bits_from_clk_data  ; 4 + 8 r24 = ....7654
+ 723               	        swap    r24                     ; 1     r24 = 7654....
+ 724:fastloader-ll.S ****         lsr     r24                     ; 1     r24 = .7654...
+ 725:fastloader-ll.S **** 
+ 726:fastloader-ll.S ****         ; 12 us later...
+ 727               	        delay_cycles 12 * 8 - 14
+ 728               	
+ 729:fastloader-ll.S ****         ; get bits 1,3 @ 0,2 - changes r19
+ 730               	        rcall   get_bits_from_clk_data  ; 4 + 8 r24 = .76543.1
+ 731               	        lsl     r24                     ; 1     r24 = 76543.1.
+ 732:fastloader-ll.S **** 
+ 733:fastloader-ll.S ****         ; 10 us later...
+ 734               	        delay_cycles 10 * 8 - 13
+ 735               	
+ 736:fastloader-ll.S ****         ; get bits 0,2 @ 0,2 - changes r19
+ 737               	        rcall   get_bits_from_clk_data  ; 4 + 8 r24 = 76543210
+ 738               	
+ 739:fastloader-ll.S ****         ; Pull DATA down
+ 740               	        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 741               	
+ 742:fastloader-ll.S ****         sei
+ 743               	        com     r24     ; negate all bits
+ 744:fastloader-ll.S ****         clr     r25     ; clear hi-byte of return val
+ 745:fastloader-ll.S ****         ret
+ 746:fastloader-ll.S **** #endif
+ 747:fastloader-ll.S **** 
+ 748               	#ifdef CONFIG_LOADER_DREAMLOAD
+ 749               	        ;;
+ 750               	        ;; Receive a command (track/sector) using the DreamLoad protocol
+ 751               	        ;;
+ 752               	dreamload_get_command:
+ 753               	        rcall   dreamload_get_byte
+ 754               	        sts     fl_track, r24
+ 755:fastloader-ll.S ****         rcall   dreamload_get_byte
+ 756:fastloader-ll.S ****         sts     fl_sector, r24
+ 757:fastloader-ll.S ****         ret
+ 758:fastloader-ll.S **** 
+ 759:fastloader-ll.S ****         ;;
+ 760               	        ;; Receive a byte using the DreamLoad protocol
+ 761               	        ;;
+ 762               	        .global dreamload_get_byte
+ 763               	dreamload_get_byte:
+ 764               	
+ 765               	        ldi     r18, 4  ; 4 * 2 bits to load
+ 766               	dl_bitloop:
+ 767:fastloader-ll.S ****         ; wait until clock goes low
+ 768               	1:
+ 769               	        sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 770               	        rjmp    1b
+ 771:fastloader-ll.S **** 
+ 772:fastloader-ll.S ****         lsl     r24
+ 773               	
+ 774:fastloader-ll.S ****         ; read data a short time later
+ 775               	        in      r19, _SFR_IO_ADDR(IEC_PIN)
+ 776               	        bst     r19, IEC_PIN_DATA
+ 777:fastloader-ll.S ****         bld     r24, 0
+ 778:fastloader-ll.S **** 
+ 779:fastloader-ll.S ****         ; wait until clock goes high
+ 780               	2:
+ 781               	        sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 782               	        rjmp    2b
+ 783:fastloader-ll.S **** 
+ 784:fastloader-ll.S ****         lsl     r24
+ 785               	
+ 786:fastloader-ll.S ****         ; read data a short time later
+ 787               	        in      r19, _SFR_IO_ADDR(IEC_PIN)
+ 788               	        bst     r19, IEC_PIN_DATA
+ 789:fastloader-ll.S ****         bld     r24, 0
+ 790:fastloader-ll.S **** 
+ 791:fastloader-ll.S ****         dec     r18
+ 792               	        brne     dl_bitloop
+ 793:fastloader-ll.S **** 
+ 794:fastloader-ll.S ****         com     r24     ; negate all bits
+ 795               	        ret
+ 796:fastloader-ll.S **** 
+ 797:fastloader-ll.S ****         ;;
+ 798               	        ;; Receive a command (track/sector) using the old DreamLoad protocol
+ 799               	        ;;
+ 800               	dreamload_get_command_old:
+ 801               	        rcall   dreamload_get_byte_old
+ 802               	        sts     fl_track, r24
+ 803:fastloader-ll.S ****         rcall   dreamload_get_byte_old
+ 804:fastloader-ll.S ****         sts     fl_sector, r24
+ 805:fastloader-ll.S ****         ret
+ 806:fastloader-ll.S **** 
+ 807:fastloader-ll.S ****         ;;
+ 808               	        ;; Receive a byte using the old DreamLoad protocol
+ 809               	        ;;
+ 810               	dreamload_get_byte_old:
+ 811               	        ; 2 nibbles
+ 812               	        ldi     r18, 2
+ 813               	dlgb_nibble:
+ 814:fastloader-ll.S ****         swap    r24                     ; 2nd loop: r24 = 7654....
+ 815               	        lsr     r24                     ; 2nd loop: r24 = .7654...
+ 816:fastloader-ll.S **** 
+ 817:fastloader-ll.S ****         rcall   wait_atn_low
+ 818               	        ; 1st: get bits 5,7 @ 0,2 / 2nd: get bits 1,3 @ 0,2 - changes r19
+ 819:fastloader-ll.S ****         rcall   get_bits_from_clk_data  ; 1st: r24 = .....7.5 / 2nd: .76543.1
+ 820               	        lsl     r24                     ; 1st: r24 = ....7.5. / 2nd: 76543.1.
+ 821:fastloader-ll.S **** 
+ 822:fastloader-ll.S ****         rcall   wait_atn_high
+ 823               	        ; 1st: get bits 4,6 @ 0,2 / 2nd: get bits 0,2 @ 0,2 - changes r19
+ 824:fastloader-ll.S ****         rcall   get_bits_from_clk_data  ; 1st: r24 = ....7654 / 2nd: 76543210
+ 825               	
+ 826:fastloader-ll.S ****         dec     r18
+ 827               	        brne    dlgb_nibble
+ 828:fastloader-ll.S **** 
+ 829:fastloader-ll.S ****         com     r24     ; negate all bits
+ 830               	        ret
+ 831:fastloader-ll.S **** 
+ 832:fastloader-ll.S ****         ;;
+ 833               	        ;; Send the byte in r24 using the DreamLoad protocol
+ 834               	        ;;
+ 835               	        .global dreamload_send_byte
+ 836               	dreamload_send_byte:
+ 837               	
+ 838               	        ; inverse all bits
+ 839               	        mov     r0, r24
+ 840               	        com     r0
+ 841:fastloader-ll.S **** 
+ 842:fastloader-ll.S ****         ldi     r18, 2          ; loop counter
+ 843               	
+ 844:fastloader-ll.S **** dsb_bitloop:
+ 845               	        ; send r0[0,1] to CLOCK and DATA, shift r0 right two times
+ 846               	        ; changes r19
+ 847               	        rcall   send_bits_to_clk_data
+ 848               	        rcall   wait_atn_low
+ 849:fastloader-ll.S **** 
+ 850:fastloader-ll.S ****         ; send r0[0,1] to CLOCK and DATA, shift r0 right two times
+ 851               	        ; changes r19
+ 852               	        rcall   send_bits_to_clk_data
+ 853               	        rcall   wait_atn_high
+ 854:fastloader-ll.S **** 
+ 855:fastloader-ll.S ****         dec     r18             ; decrement bitpair counter
+ 856               	        brne    dsb_bitloop     ; loop until done
+ 857:fastloader-ll.S ****         ret
+ 858:fastloader-ll.S **** #endif
+ 859:fastloader-ll.S **** 
+ 860               	#if defined CONFIG_LOADER_ULOAD3 || defined CONFIG_LOADER_ELOAD1
+ 861               	        ;;
+ 862               	        ;; Receive a byte using the ULoad Model 3 protocol
+ 863               	        ;;
+ 864               	        .global uload3_get_byte
+ 865               	uload3_get_byte:
+ 866               	        cli
+ 867               	        ldi     r25, 0xff       ; prepare a negative return value
+ 868:fastloader-ll.S ****         clr     r24
+ 869:fastloader-ll.S ****         rcall   clk_data_handshake
+ 870:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN ;skip ret if ATN is high
+ 871:fastloader-ll.S ****         rjmp    uload3_abort                       ;return if ATN is low
+ 872:fastloader-ll.S **** 
+ 873:fastloader-ll.S ****         ;; assuming an average of 10 cycles between DATA high and the following instruction
+ 874               	        delay_cycles 14 * 8 - 10 - 4
+ 875               	
+ 876:fastloader-ll.S ****         ;; read bits 7/5
+ 877               	        rcall   get_bits_from_clk_data ;4+8 r24 = _____7_5
+ 878               	        lsl     r24                    ;1   r24 = ____7_5_
+ 879:fastloader-ll.S **** 
+ 880:fastloader-ll.S ****         delay_cycles 10 * 8 - 13
+ 881               	
+ 882:fastloader-ll.S ****         ;; read bits 6/4
+ 883               	        rcall   get_bits_from_clk_data ;4+8 r24 = ____7654
+ 884               	        swap    r24                    ;1   r24 = 7654____
+ 885:fastloader-ll.S ****         lsr     r24                    ;1   r24 = _7654___
+ 886:fastloader-ll.S **** 
+ 887:fastloader-ll.S ****         delay_cycles 14 * 8 - 14
+ 888               	
+ 889:fastloader-ll.S ****         ;; read bits 3/1
+ 890               	        rcall   get_bits_from_clk_data ;4+8 r24 = _76543_1
+ 891               	        lsl     r24                    ;1   r24 = 76543_1_
+ 892:fastloader-ll.S **** 
+ 893:fastloader-ll.S ****         delay_cycles 10 * 8 - 13
+ 894               	
+ 895:fastloader-ll.S ****         ;; read bits 2/0
+ 896               	        rcall   get_bits_from_clk_data ;4+8 r24 = 76543210
+ 897               	
+ 898:fastloader-ll.S ****         delay_cycles 20*8       ; wait a bit so the C64 can return the bus to idle state
+ 899               	
+ 900:fastloader-ll.S ****         clr     r25             ; clear upper byte of return value
+ 901               	        com     r24             ; invert data byte
+ 902:fastloader-ll.S **** 
+ 903:fastloader-ll.S **** uload3_abort:
+ 904               	        sei
+ 905               	        ret
+ 906:fastloader-ll.S **** 
+ 907:fastloader-ll.S **** 
+ 908               	        ;;
+ 909               	        ;; Send a byte using the ULoad Model 3 protocol
+ 910               	        ;;
+ 911               	        .global uload3_send_byte
+ 912               	uload3_send_byte:
+ 913               	        cli
+ 914               	
+ 915:fastloader-ll.S ****         ;; DATA low
+ 916               	        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 917               	
+ 918:fastloader-ll.S ****         ;; wait for CLOCK low
+ 919               	1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 920               	        rjmp    2f
+ 921:fastloader-ll.S ****         sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 922:fastloader-ll.S ****         rjmp    1b
+ 923:fastloader-ll.S **** 
+ 924:fastloader-ll.S ****         ;; DATA high
+ 925               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 926               	
+ 927:fastloader-ll.S ****         ;; wait for CLOCK high - 2 to 7 cycles, assuming 5
+ 928               	1:
+ 929               	        sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 930               	        rjmp    2f
+ 931:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 932:fastloader-ll.S ****         rjmp    1b
+ 933:fastloader-ll.S **** 
+ 934:fastloader-ll.S ****         ;; prepare transmission
+ 935               	        mov     r0, r24         ;1 - move data to output register
+ 936               	        com     r0              ;1 - invert byte
+ 937:fastloader-ll.S ****         ldi     r24, 4          ;1 - number of loops
+ 938:fastloader-ll.S ****         delay_cycles (14-8) * 8 - 8 + 6 + 3 ; initial delay before first bit pair
+ 939:fastloader-ll.S **** 
+ 940:fastloader-ll.S **** uload3_bitloop:
+ 941               	        delay_cycles 8 * 8 - 16 - 3   ; delay between bit pairs
+ 942               	        rcall   send_bits_to_clk_data ;10+6
+ 943:fastloader-ll.S ****         dec     r24                   ;1 - decrement pair counter
+ 944:fastloader-ll.S ****         brne    uload3_bitloop        ;2 - continue loop
+ 945:fastloader-ll.S **** 
+ 946:fastloader-ll.S ****         delay_cycles 10*8 - 9   ; delay before releasing clock/data
+ 947               	
+ 948:fastloader-ll.S ****         ;; release CLOCK+DATA
+ 949               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 950               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 951:fastloader-ll.S ****         rcall   delay1us        ; safety
+ 952:fastloader-ll.S **** 2:
+ 953:fastloader-ll.S ****         sei
+ 954               	        ret
+ 955:fastloader-ll.S **** #endif
+ 956:fastloader-ll.S **** 
+ 957               	#ifdef CONFIG_LOADER_EPYXCART
+ 958               	        ;; send bits 7 and 5 of r0 to clock/data
+ 959               	        ;; masked contents of IEC_OUT expected in r19
+ 960               	        ;; 8 cycles from rcall to out, 4 to return
+ 961               	epyx_bitpair:
+ 962               	        ;; rcall - 3
+ 963               	        bst     r0, 7                      ; 1
+ 964               	        bld     r19, IEC_OPIN_CLOCK        ; 1
+ 965:fastloader-ll.S ****         bst     r0, 5                      ; 1
+ 966:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA         ; 1
+ 967:fastloader-ll.S ****         out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1
+ 968:fastloader-ll.S ****         ret                                ; 4
+ 969:fastloader-ll.S **** 
+ 970:fastloader-ll.S ****         ;;
+ 971               	        ;; Send a byte using the Epyx Fastload cartridge protocol
+ 972               	        ;;
+ 973               	        .global epyxcart_send_byte
+ 974               	epyxcart_send_byte:
+ 975               	        ;; DATA and CLOCK high
+ 976               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+ 977               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 978:fastloader-ll.S ****         rcall   delay1us
+ 979:fastloader-ll.S **** 
+ 980:fastloader-ll.S ****         ;; prepare data
+ 981               	        in      r19, _SFR_IO_ADDR(IEC_OUT)
+ 982               	        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ)
+ 983:fastloader-ll.S **** 
+ 984:fastloader-ll.S ****         ;; wait for DATA high or ATN low
+ 985               	1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_ATN
+ 986               	        rjmp    epyxcart_atnabort
+ 987:fastloader-ll.S ****         sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+ 988:fastloader-ll.S ****         rjmp    1b
+ 989:fastloader-ll.S **** 
+ 990:fastloader-ll.S ****         mov     r0, r24             ; 1
+ 991               	        delay_cycles (10*8 - 9)
+ 992:fastloader-ll.S ****         rcall   epyx_bitpair        ; 8+4 - bits 7 and 5
+ 993:fastloader-ll.S **** 
+ 994:fastloader-ll.S ****         lsl     r0                  ; 1
+ 995               	        delay_cycles (10*8 - 13)
+ 996:fastloader-ll.S ****         rcall   epyx_bitpair        ; 8+4 - bits 6 and 4
+ 997:fastloader-ll.S **** 
+ 998:fastloader-ll.S ****         swap    r24                 ; 1
+ 999               	        mov     r0, r24             ; 1
+1000:fastloader-ll.S ****         delay_cycles (10*8 - 14)
+1001:fastloader-ll.S ****         rcall   epyx_bitpair        ; 8+4 - bits 3 and 1
+1002:fastloader-ll.S **** 
+1003:fastloader-ll.S ****         lsl     r0                  ; 1
+ 1004               	        delay_cycles (10*8 - 13)
+1005:fastloader-ll.S ****         rcall   epyx_bitpair        ; 8+4 - bits 2 and 0
+1006:fastloader-ll.S **** 
+1007:fastloader-ll.S ****         delay_cycles 20*8  ; final delay so the data stays valid long enough
+ 1008               	
+1009:fastloader-ll.S ****         clr     r24
+ 1010               	        ret
+1011:fastloader-ll.S **** 
+1012:fastloader-ll.S **** epyxcart_atnabort:
+ 1013               	        ldi     r24, 1
+ 1014               	        ret
+1015:fastloader-ll.S **** 
+1016:fastloader-ll.S **** #endif
+ 1017               	
+ 1018               	#ifdef CONFIG_LOADER_GEOS
+ 1019               	        ;;
+ 1020               	        ;; read a byte using the GEOS protocol (common part)
+ 1021               	        ;;
+ 1022               	geos_get_byte_common:
+ 1023               	        clr     r24
+ 1024               	
+1025:fastloader-ll.S ****         ;; wait until clock is high
+ 1026               	1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 1027               	        rjmp    1b
+1028:fastloader-ll.S **** 
+1029:fastloader-ll.S ****         ;; wait until clock is low
+ 1030               	1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK ; 1/2
+ 1031               	        rjmp    1b
+1032:fastloader-ll.S **** 
+1033:fastloader-ll.S ****         ;; delay
+ 1034               	        delay_cycles 15*8 - 2
+ 1035               	
+1036:fastloader-ll.S ****         ;; get bits 4 and 5
+ 1037               	        in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 1038               	        bst     r19, IEC_PIN_CLOCK         ; 1
+1039:fastloader-ll.S ****         bld     r24, 4-1                   ; 1 - r24 = ....4...
+1040:fastloader-ll.S ****         bst     r19, IEC_PIN_DATA          ; 1
+1041:fastloader-ll.S ****         bld     r24, 5-1                   ; 1 - r24 = ...54...
+1042:fastloader-ll.S **** 
+1043:fastloader-ll.S ****         ;; delay
+ 1044               	        delay_cycles 14*8 - 5
+ 1045               	
+1046:fastloader-ll.S ****         ;; get bits 6 and 7
+ 1047               	        in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 1048               	        bst     r19, IEC_PIN_CLOCK         ; 1
+1049:fastloader-ll.S ****         bld     r24, 6-1                   ; 1 - r24 = ..654...
+1050:fastloader-ll.S ****         bst     r19, IEC_PIN_DATA          ; 1
+1051:fastloader-ll.S ****         bld     r24, 7-1                   ; 1 - r24 = .7654...
+1052:fastloader-ll.S **** 
+1053:fastloader-ll.S ****         ret                                ; 4
+ 1054               	
+1055:fastloader-ll.S ****         ;;
+ 1056               	        ;; read a byte using the GEOS 1MHz (1541) protocol
+ 1057               	        ;;
+ 1058               	        .global geos_get_byte_1mhz
+ 1059               	geos_get_byte_1mhz:
+ 1060               	        rcall   geos_get_byte_common   ; 3
+ 1061               	
+1062:fastloader-ll.S ****         ;; delay
+ 1063               	        delay_cycles 14*8 - 9 - 4
+ 1064               	
+1065:fastloader-ll.S ****         ;; get bits 3 and 1
+ 1066               	        rcall   get_bits_from_clk_data ; 4+8 - r24 = .76543.1
+ 1067               	        lsl     r24                    ; 1     r24 = 76543.1.
+1068:fastloader-ll.S **** 
+1069:fastloader-ll.S ****         ;; delay
+ 1070               	        delay_cycles 16*8 - 9 - 4
+ 1071               	
+1072:fastloader-ll.S ****         ;; get bits 2 and 0
+ 1073               	        rcall   get_bits_from_clk_data ; 4+8 - r24 = 76543210
+ 1074               	
+1075:fastloader-ll.S ****         ;; post-process received value and return
+ 1076               	        delay_cycles 11*8
+ 1077               	        com     r24             ; negate all bits
+1078:fastloader-ll.S ****         clr     r25             ; clear high byte of return value
+1079:fastloader-ll.S ****         ret
+1080:fastloader-ll.S **** 
+1081:fastloader-ll.S **** 
+ 1082               	        ;;
+ 1083               	        ;; read a byte using the GEOS 2MHz (1571/81) protocol
+ 1084               	        ;;
+ 1085               	        .global geos_get_byte_2mhz
+ 1086               	geos_get_byte_2mhz:
+ 1087               	        rcall   geos_get_byte_common   ; 3
+ 1088               	
+1089:fastloader-ll.S ****         ;; delay
+ 1090               	        delay_cycles 19*4 - 9 - 4
+ 1091               	
+1092:fastloader-ll.S ****         ;; get bits 3 and 1
+ 1093               	        rcall   get_bits_from_clk_data ; 4+8 - r24 = .76543.1
+ 1094               	        lsl     r24                    ; 1     r24 = 76543.1.
+1095:fastloader-ll.S **** 
+1096:fastloader-ll.S ****         ;; delay
+ 1097               	        delay_cycles 22*4 - 9 - 4
+ 1098               	
+1099:fastloader-ll.S ****         ;; get bits 2 and 0
+ 1100               	        rcall   get_bits_from_clk_data ; 4+8 - r24 = 76543210
+ 1101               	
+1102:fastloader-ll.S ****         ;;  post process received value and return
+ 1103               	        delay_cycles 11*8
+ 1104               	        com     r24             ; negate all bits
+1105:fastloader-ll.S ****         clr     r25             ; clear high byte of return value
+1106:fastloader-ll.S ****         ret
+1107:fastloader-ll.S **** 
+1108:fastloader-ll.S **** 
+ 1109               	        ;;
+ 1110               	        ;; common part of all geos_send_byte implementations
+ 1111               	        ;;  returns 7 cycles after clock low
+ 1112               	        ;;
+ 1113               	geos_send_byte_common:
+ 1114               	        ;; CLOCK/DATA high
+ 1115               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 1116               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA
+1117:fastloader-ll.S ****         rcall   delay1us
+1118:fastloader-ll.S **** 
+1119:fastloader-ll.S ****         ;; wait until CLOCK is low
+ 1120               	1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 1121               	        rjmp    1b
+1122:fastloader-ll.S **** 
+1123:fastloader-ll.S ****         ;; preserve non-IEC lines on IEC_OUT port
+ 1124               	        in      r19, _SFR_IO_ADDR(IEC_OUT) ; 1
+ 1125               	        andi    r19, ~(IEC_OBIT_DATA|IEC_OBIT_CLOCK|IEC_OBIT_ATN|IEC_OBIT_SRQ) ; 1
+1126:fastloader-ll.S ****         mov     r0, r19             ; 1
+1127:fastloader-ll.S ****         ret                         ; 4
+1128:fastloader-ll.S **** 
+1129:fastloader-ll.S ****         ;;
+ 1130               	        ;; send a byte using the GEOS 1MHz protocol
+ 1131               	        ;; called with byte in r24, no return value
+ 1132               	        ;;
+ 1133               	        .global geos_send_byte_1mhz
+ 1134               	geos_send_byte_1mhz:
+ 1135               	        rcall   geos_send_byte_common ; 7
+ 1136               	
+1137:fastloader-ll.S ****         ;; prepare bits 3+1
+ 1138               	        bst     r24, 3              ; 1 - read bit 3
+ 1139               	        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+1140:fastloader-ll.S ****         bst     r24, 1              ; 1 - read bit 1
+1141:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+1142:fastloader-ll.S **** 
+1143:fastloader-ll.S ****         ;; delay (1MHz speeder)
+ 1144               	        delay_cycles 18*8 - 14
+ 1145               	        rjmp    geos_send_byte_tail   ; 2
+1146:fastloader-ll.S **** 
+1147:fastloader-ll.S **** 
+ 1148               	        ;;
+ 1149               	        ;; send a byte using the GEOS 2MHz protocol
+ 1150               	        ;; called with byte in r24, no return value
+ 1151               	        ;;
+ 1152               	        .global geos_send_byte_2mhz
+ 1153               	geos_send_byte_2mhz:
+ 1154               	        rcall   geos_send_byte_common ; 7
+ 1155               	
+1156:fastloader-ll.S ****         ;; prepare bits 3+1
+ 1157               	        bst     r24, 3              ; 1 - read bit 3
+ 1158               	        bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+1159:fastloader-ll.S ****         bst     r24, 1              ; 1 - read bit 1
+1160:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+1161:fastloader-ll.S **** 
+1162:fastloader-ll.S ****         ;; delay (2MHz speeder)
+ 1163               	1:      delay_cycles 9*8 - 12
+ 1164               	
+1165:fastloader-ll.S **** geos_send_byte_tail:
+ 1166               	        ;; send to bus
+ 1167               	        out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1 - send to bus
+ 1168               	
+1169:fastloader-ll.S ****         ;; prepare bits 2+0
+ 1170               	        mov     r19, r0             ; 1
+ 1171               	        bst     r24, 2              ; 1 - read bit 2
+1172:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+1173:fastloader-ll.S ****         bst     r24, 0              ; 1 - read bit 0
+1174:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+1175:fastloader-ll.S **** 
+1176:fastloader-ll.S ****         ;; delay
+ 1177               	        delay_cycles 10*8 - 6
+ 1178               	
+1179:fastloader-ll.S ****         ;; send to bus
+ 1180               	        out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1
+ 1181               	
+1182:fastloader-ll.S ****         ;; prepare bits 4+5
+ 1183               	        com     r24                 ; 1 - remaining bits are sent with high=1
+ 1184               	        mov     r19, r0             ; 1
+1185:fastloader-ll.S ****         bst     r24, 4              ; 1 - read bit 4
+1186:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+1187:fastloader-ll.S ****         bst     r24, 5              ; 1 - read bit 5
+1188:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+1189:fastloader-ll.S **** 
+1190:fastloader-ll.S ****         ;; delay
+ 1191               	        delay_cycles 11*8 - 7
+ 1192               	
+1193:fastloader-ll.S ****         ;; send to bus
+ 1194               	        out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1
+ 1195               	
+1196:fastloader-ll.S ****         ;; prepare bits 6+7
+ 1197               	        mov     r19, r0             ; 1
+ 1198               	        bst     r24, 6              ; 1 - read bit 6
+1199:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+1200:fastloader-ll.S ****         bst     r24, 7              ; 1 - read bit 7
+1201:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+1202:fastloader-ll.S **** 
+1203:fastloader-ll.S ****         ;; delay
+ 1204               	        delay_cycles 12*8 - 6
+ 1205               	
+1206:fastloader-ll.S ****         ;; send to bus
+ 1207               	        out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1
+ 1208               	
+1209:fastloader-ll.S ****         ;; final delay
+ 1210               	        delay_cycles 22*8
+ 1211               	
+1212:fastloader-ll.S ****         ret
+ 1213               	
+1214:fastloader-ll.S **** 
+ 1215               	        ;;
+ 1216               	        ;; send a byte using the 2MHz 1581 Configure 2.1 GEOS protocol
+ 1217               	        ;; called with byte in r24, no return value
+ 1218               	        ;;
+ 1219               	        .global geos_send_byte_1581_21
+ 1220               	geos_send_byte_1581_21:
+ 1221               	        com     r24                   ; invert so the bits are sent with high=1
+ 1222               	        rcall   geos_send_byte_common ; 7
+1223:fastloader-ll.S ****         mov     r0, r24               ; 1 - move data to target register
+1224:fastloader-ll.S **** 
+1225:fastloader-ll.S ****         ;; delay
+ 1226               	        delay_cycles 7*8 - 18
+ 1227               	
+1228:fastloader-ll.S ****         ;; send bits 0+1
+ 1229               	        rcall   send_bits_to_clk_data ; 10+6
+ 1230               	
+1231:fastloader-ll.S ****         ;; delay
+ 1232               	        delay_cycles 7*8 - 16
+ 1233               	
+1234:fastloader-ll.S ****         ;; send bits 2+3
+ 1235               	        rcall   send_bits_to_clk_data ; 10+6
+ 1236               	
+1237:fastloader-ll.S ****         ;; delay
+ 1238               	        delay_cycles 10*8 - 16
+ 1239               	
+1240:fastloader-ll.S ****         ;; send bits 4+5
+ 1241               	        rcall   send_bits_to_clk_data ; 10+6
+ 1242               	
+1243:fastloader-ll.S ****         ;; delay
+ 1244               	        delay_cycles 9*8 - 16
+ 1245               	
+1246:fastloader-ll.S ****         ;; send bits 6+7
+ 1247               	        rcall   send_bits_to_clk_data ; 10+6
+ 1248               	
+1249:fastloader-ll.S ****         ;; final delay
+ 1250               	        delay_cycles 12*8
+ 1251               	
+1252:fastloader-ll.S ****         ret
+ 1253               	
+1254:fastloader-ll.S **** #endif
+ 1255               	
+ 1256               	#ifdef CONFIG_LOADER_WHEELS
+ 1257               	        ;;
+ 1258               	        ;; send a byte using the Wheels protocol
+ 1259               	        ;; called with byte in r24, no return value
+ 1260               	        ;;
+ 1261               	        .global wheels_send_byte_1mhz
+ 1262               	wheels_send_byte_1mhz:
+ 1263               	        rcall   geos_send_byte_common ; 7
+ 1264               	
+1265:fastloader-ll.S ****         rcall   wheels_nibble       ; 3 - send lower nibble
+ 1266               	        swap    r24                 ; 1 - swap nibbles
+1267:fastloader-ll.S **** 
+1268:fastloader-ll.S ****         delay_cycles (14-9)*8 + 15 - 14
+ 1269               	        rcall   wheels_nibble       ; 3 - send upper nibble
+1270:fastloader-ll.S **** 
+1271:fastloader-ll.S ****         ;; final delay
+ 1272               	        delay_cycles 22*8
+ 1273               	        ret
+1274:fastloader-ll.S **** 
+1275:fastloader-ll.S **** wheels_nibble:
+ 1276               	        ;; prepare bits 3+1 (7+5)
+ 1277               	        mov     r19, r0             ; 1
+ 1278               	        bst     r24, 3              ; 1 - read bit 3
+1279:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+1280:fastloader-ll.S ****         bst     r24, 1              ; 1 - read bit 1
+1281:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+1282:fastloader-ll.S **** 
+1283:fastloader-ll.S ****         ;; delay
+ 1284               	        delay_cycles 9*8 - 15
+ 1285               	
+1286:fastloader-ll.S ****         ;; send to bus
+ 1287               	        out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1 - send to bus
+ 1288               	
+1289:fastloader-ll.S ****         ;; prepare bits 2+0 (6+4)
+ 1290               	        mov     r19, r0             ; 1
+ 1291               	        bst     r24, 2              ; 1 - read bit 2
+1292:fastloader-ll.S ****         bld     r19, IEC_OPIN_CLOCK ; 1 - store in clock bit
+1293:fastloader-ll.S ****         bst     r24, 0              ; 1 - read bit 0
+1294:fastloader-ll.S ****         bld     r19, IEC_OPIN_DATA  ; 1 - store in data bit
+1295:fastloader-ll.S **** 
+1296:fastloader-ll.S ****         ;; delay
+ 1297               	        delay_cycles 14*8 - 6
+ 1298               	
+1299:fastloader-ll.S ****         ;; send to bus
+ 1300               	        out     _SFR_IO_ADDR(IEC_OUT), r19 ; 1 - send to bus
+ 1301               	        ret                                ; 4
+1302:fastloader-ll.S **** 
+1303:fastloader-ll.S **** 
+ 1304               	        ;;
+ 1305               	        ;; read a byte using the Wheels protocol
+ 1306               	        ;;
+ 1307               	        .global wheels_get_byte_1mhz
+ 1308               	wheels_get_byte_1mhz:
+ 1309               	        clr     r24
+ 1310               	
+1311:fastloader-ll.S ****         ;; wait until clock is high
+ 1312               	1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 1313               	        rjmp    1b
+1314:fastloader-ll.S **** 
+1315:fastloader-ll.S ****         ;; wait until clock is low
+ 1316               	1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK ; 1/2
+ 1317               	        rjmp    1b
+1318:fastloader-ll.S **** 
+1319:fastloader-ll.S ****         ;; delay
+ 1320               	        delay_cycles 16 * 8 - 5
+ 1321               	
+1322:fastloader-ll.S ****         ;; read bits 7/5
+ 1323               	        rcall   get_bits_from_clk_data ; 4+8 r24 = _____7_5
+ 1324               	        lsl     r24                    ; 1   r24 = ____7_5_
+1325:fastloader-ll.S **** 
+1326:fastloader-ll.S ****         delay_cycles 10 * 8 - 13
+ 1327               	
+1328:fastloader-ll.S ****         ;; read bits 6/4
+ 1329               	        rcall   get_bits_from_clk_data ; 4+8 r24 = ____7654
+ 1330               	        swap    r24                    ; 1   r24 = 7654____
+1331:fastloader-ll.S ****         lsr     r24                    ; 1   r24 = _7654___
+1332:fastloader-ll.S **** 
+1333:fastloader-ll.S ****         delay_cycles 15 * 8 - 14
+ 1334               	
+1335:fastloader-ll.S ****         ;; read bits 3/1
+ 1336               	        rcall   get_bits_from_clk_data ; 4+8 r24 = _76543_1
+ 1337               	        lsl     r24                    ; 1   r24 = 76543_1_
+1338:fastloader-ll.S **** 
+1339:fastloader-ll.S ****         delay_cycles 13 * 8 - 13
+ 1340               	
+1341:fastloader-ll.S ****         ;; read bits 2/0
+ 1342               	        rcall   get_bits_from_clk_data ; 4+8 r24 = 76543210
+ 1343               	
+1344:fastloader-ll.S ****         delay_cycles 20*8
+ 1345               	
+1346:fastloader-ll.S ****         clr     r25             ; clear upper byte of return value
+ 1347               	        com     r24             ; invert data byte
+1348:fastloader-ll.S **** 
+1349:fastloader-ll.S ****         ret
+ 1350               	
+1351:fastloader-ll.S ****         ;;
+ 1352               	        ;; read a byte using the Wheels 4.4 1MHz protocol
+ 1353               	        ;;
+ 1354               	        .global wheels44_get_byte_1mhz
+ 1355               	wheels44_get_byte_1mhz:
+ 1356               	        clr     r24
+ 1357               	
+1358:fastloader-ll.S ****         ;; wait until clock is high
+ 1359               	1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 1360               	        rjmp    1b
+1361:fastloader-ll.S **** 
+1362:fastloader-ll.S ****         ;; wait until clock is low
+ 1363               	1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK ; 1/2
+ 1364               	        rjmp    1b
+1365:fastloader-ll.S **** 
+1366:fastloader-ll.S ****         ;; delay
+ 1367               	        delay_cycles 17 * 8 - 5
+ 1368               	
+1369:fastloader-ll.S ****         ;; read bits 7/5
+ 1370               	        rcall   get_bits_from_clk_data ; 4+8 r24 = _____7_5
+ 1371               	        lsl     r24                    ; 1   r24 = ____7_5_
+1372:fastloader-ll.S **** 
+1373:fastloader-ll.S ****         delay_cycles 11 * 8 - 13
+ 1374               	
+1375:fastloader-ll.S ****         ;; read bits 6/4
+ 1376               	        rcall   get_bits_from_clk_data ; 4+8 r24 = ____7654
+ 1377               	        swap    r24                    ; 1   r24 = 7654____
+1378:fastloader-ll.S ****         lsr     r24                    ; 1   r24 = _7654___
+1379:fastloader-ll.S **** 
+1380:fastloader-ll.S ****         delay_cycles 17 * 8 - 14
+ 1381               	
+1382:fastloader-ll.S ****         ;; read bits 3/1
+ 1383               	        rcall   get_bits_from_clk_data ; 4+8 r24 = _76543_1
+ 1384               	        lsl     r24                    ; 1   r24 = 76543_1_
+1385:fastloader-ll.S **** 
+1386:fastloader-ll.S ****         delay_cycles 16 * 8 - 13
+ 1387               	
+1388:fastloader-ll.S ****         ;; read bits 2/0
+ 1389               	        rcall   get_bits_from_clk_data ; 4+8 r24 = 76543210
+ 1390               	
+1391:fastloader-ll.S ****         delay_cycles 20*8
+ 1392               	
+1393:fastloader-ll.S ****         clr     r25             ; clear upper byte of return value
+ 1394               	        com     r24             ; invert data byte
+1395:fastloader-ll.S **** 
+1396:fastloader-ll.S ****         ret
+ 1397               	
+1398:fastloader-ll.S ****         ;;
+ 1399               	        ;; read a byte using the Wheels 4.4 2MHz protocol
+ 1400               	        ;;
+ 1401               	        .global wheels44_get_byte_2mhz
+ 1402               	wheels44_get_byte_2mhz:
+ 1403               	        clr     r24
+ 1404               	
+1405:fastloader-ll.S ****         ;; wait until clock is high
+ 1406               	1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK
+ 1407               	        rjmp    1b
+1408:fastloader-ll.S **** 
+1409:fastloader-ll.S ****         ;; wait until clock is low
+ 1410               	1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_CLOCK ; 1/2
+ 1411               	        rjmp    1b
+1412:fastloader-ll.S **** 
+1413:fastloader-ll.S ****         ;; delay
+ 1414               	        delay_cycles 15*8 - 2
+ 1415               	
+1416:fastloader-ll.S ****         ;; get bits 0 and 1
+ 1417               	        in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 1418               	        bst     r19, IEC_PIN_CLOCK         ; 1
+1419:fastloader-ll.S ****         bld     r24, 0                     ; 1 - r24 = .......0
+1420:fastloader-ll.S ****         bst     r19, IEC_PIN_DATA          ; 1
+1421:fastloader-ll.S ****         bld     r24, 1                     ; 1 - r24 = ......10
+1422:fastloader-ll.S **** 
+1423:fastloader-ll.S ****         ;; delay
+ 1424               	        delay_cycles 11*8 - 5
+ 1425               	
+1426:fastloader-ll.S ****         ;; get bits 2 and 3
+ 1427               	        in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 1428               	        bst     r19, IEC_PIN_CLOCK         ; 1
+1429:fastloader-ll.S ****         bld     r24, 2                     ; 1 - r24 = .....210
+1430:fastloader-ll.S ****         bst     r19, IEC_PIN_DATA          ; 1
+1431:fastloader-ll.S ****         bld     r24, 3                     ; 1 - r24 = ....3210
+1432:fastloader-ll.S **** 
+1433:fastloader-ll.S ****         ;; delay
+ 1434               	        delay_cycles 11*8 - 5
+ 1435               	
+1436:fastloader-ll.S ****         ;; get bits 4 and 5
+ 1437               	        in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 1438               	        bst     r19, IEC_PIN_CLOCK         ; 1
+1439:fastloader-ll.S ****         bld     r24, 4                     ; 1 - r24 = ...43210
+1440:fastloader-ll.S ****         bst     r19, IEC_PIN_DATA          ; 1
+1441:fastloader-ll.S ****         bld     r24, 5                     ; 1 - r24 = ..543210
+1442:fastloader-ll.S **** 
+1443:fastloader-ll.S ****         ;; delay
+ 1444               	        delay_cycles 11*8 - 5
+ 1445               	
+1446:fastloader-ll.S ****         ;; get bits 6 and 7
+ 1447               	        in      r19, _SFR_IO_ADDR(IEC_PIN) ; 1
+ 1448               	        bst     r19, IEC_PIN_CLOCK         ; 1
+1449:fastloader-ll.S ****         bld     r24, 6                     ; 1 - r24 = .6543210
+1450:fastloader-ll.S ****         bst     r19, IEC_PIN_DATA          ; 1
+1451:fastloader-ll.S ****         bld     r24, 7                     ; 1 - r24 = 76543210
+1452:fastloader-ll.S **** 
+1453:fastloader-ll.S ****         ;; safety delay
+ 1454               	        delay_cycles 12*8
+ 1455               	
+1456:fastloader-ll.S ****         ;; post process received value and return
+ 1457               	        com     r24                  ; negate all bits
+ 1458               	        clr     r25                  ; clear high byte of return value
+1459:fastloader-ll.S ****         ret
+1460:fastloader-ll.S **** 
+1461:fastloader-ll.S **** 
+ 1462               	        ;;
+ 1463               	        ;; send a byte using the Wheels 4.4 2MHz protocol
+ 1464               	        ;; called with byte in r24, no return value
+ 1465               	        ;;
+ 1466               	        .global wheels44_send_byte_2mhz
+ 1467               	wheels44_send_byte_2mhz:
+ 1468               	        com     r24                   ; invert so the bits are sent with high=1
+ 1469               	        rcall   geos_send_byte_common ; 7
+1470:fastloader-ll.S ****         mov     r0, r24               ; 1 - move data to target register
+1471:fastloader-ll.S **** 
+1472:fastloader-ll.S ****         ;; delay
+ 1473               	        delay_cycles 7*8 - 18
+ 1474               	
+1475:fastloader-ll.S ****         ;; send bits 0+1
+ 1476               	        rcall   send_bits_to_clk_data ; 10+6
+ 1477               	
+1478:fastloader-ll.S ****         ;; delay
+ 1479               	        delay_cycles 8*8 - 16
+ 1480               	
+1481:fastloader-ll.S ****         ;; send bits 2+3
+ 1482               	        rcall   send_bits_to_clk_data ; 10+6
+ 1483               	
+1484:fastloader-ll.S ****         ;; delay
+ 1485               	        delay_cycles 11*8 - 16
+ 1486               	
+1487:fastloader-ll.S ****         ;; send bits 4+5
+ 1488               	        rcall   send_bits_to_clk_data ; 10+6
+ 1489               	
+1490:fastloader-ll.S ****         ;; delay
+ 1491               	        delay_cycles 11*8 - 16
+ 1492               	
+1493:fastloader-ll.S ****         ;; send bits 6+7
+ 1494               	        rcall   send_bits_to_clk_data ; 10+6
+ 1495               	
+1496:fastloader-ll.S ****         ;; final delay
+ 1497               	        delay_cycles 14*8
+ 1498               	
+1499:fastloader-ll.S ****         ret
+ 1500               	
+1501:fastloader-ll.S **** #endif
+ 1502               	
+ 1503               	#ifdef CONFIG_LOADER_AR6
+ 1504               	        ;;
+ 1505               	        ;; send a byte using the AR6-1581 protocol
+ 1506               	        ;; called with byte in r24, no return value
+ 1507               	        ;;
+ 1508               	        .global ar6_1581_send_byte
+ 1509               	ar6_1581_send_byte:
+ 1510               	        cli
+ 1511               	
+1512:fastloader-ll.S ****         ;; set up data byte for transmission
+ 1513               	        com     r24
+ 1514               	        mov     r0, r24
+1515:fastloader-ll.S **** 
+1516:fastloader-ll.S ****         ;; clock high
+ 1517               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 1518               	
+1519:fastloader-ll.S ****         ;; wait until data is high
+ 1520               	1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+ 1521               	        rjmp    1b
+1522:fastloader-ll.S **** 
+1523:fastloader-ll.S ****         ;; delay
+ 1524               	        delay_cycles 5*8 - 10
+ 1525               	
+1526:fastloader-ll.S ****         ;; send bits 0+1
+ 1527               	        rcall   send_bits_to_clk_data ; 10+6
+ 1528               	
+1529:fastloader-ll.S ****         ;; delay
+ 1530               	        delay_cycles 8*8 - 16
+ 1531               	
+1532:fastloader-ll.S ****         ;; send bits 2+3
+ 1533               	        rcall   send_bits_to_clk_data ; 10+6
+ 1534               	
+1535:fastloader-ll.S ****         ;; delay
+ 1536               	        delay_cycles 8*8 - 16
+ 1537               	
+1538:fastloader-ll.S ****         ;; send bits 4+5
+ 1539               	        rcall   send_bits_to_clk_data ; 10+6
+ 1540               	
+1541:fastloader-ll.S ****         ;; delay
+ 1542               	        delay_cycles 8*8 - 16
+ 1543               	
+1544:fastloader-ll.S ****         ;; send bits 6+7
+ 1545               	        rcall   send_bits_to_clk_data ; 10+6
+ 1546               	
+1547:fastloader-ll.S ****         ;; delay
+ 1548               	        delay_cycles 8*8+4 - 6 - 2
+ 1549               	
+1550:fastloader-ll.S ****         ;; set clock low, data high
+ 1551               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_DATA  ; 1
+ 1552               	        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK ; 1
+1553:fastloader-ll.S **** 
+1554:fastloader-ll.S ****         sei
+ 1555               	        ret
+1556:fastloader-ll.S **** 
+1557:fastloader-ll.S ****         ;;
+ 1558               	        ;; receive a byte using the AR6-1581-PAL protocol
+ 1559               	        ;; returns byte in r24
+ 1560               	        ;;
+ 1561               	        .global ar6_1581p_get_byte
+ 1562               	ar6_1581p_get_byte:
+ 1563               	        cli
+ 1564               	
+1565:fastloader-ll.S ****         clr     r24
+ 1566               	
+1567:fastloader-ll.S ****         ;; clock high
+ 1568               	        cbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 1569               	
+1570:fastloader-ll.S ****         ;; wait until data is low
+ 1571               	1:      sbic    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+ 1572               	        rjmp    1b
+1573:fastloader-ll.S **** 
+1574:fastloader-ll.S ****         ;; wait until data is high
+ 1575               	1:      sbis    _SFR_IO_ADDR(IEC_PIN), IEC_PIN_DATA
+ 1576               	        rjmp    1b
+1577:fastloader-ll.S **** 
+1578:fastloader-ll.S ****         ;; delay
+ 1579               	        delay_cycles 12*8 - 4
+ 1580               	
+1581:fastloader-ll.S ****         ;; receive bits 7+5
+ 1582               	        rcall   get_bits_from_clk_data ; 4+8 - r24 = .....7.5
+ 1583               	        lsl     r24                    ; 1   - r24 = ....7.5.
+1584:fastloader-ll.S **** 
+1585:fastloader-ll.S ****         ;; delay
+ 1586               	        delay_cycles 10*8 - 9 - 4
+ 1587               	
+1588:fastloader-ll.S ****         ;; receive bits 6+4
+ 1589               	        rcall   get_bits_from_clk_data ; 4+8 - r24 = ....7654
+ 1590               	        swap    r24                    ; 1   - r24 = 7654....
+1591:fastloader-ll.S ****         lsr     r24                    ; 1   - r24 = .7654...
+1592:fastloader-ll.S **** 
+1593:fastloader-ll.S ****         ;; delay
+ 1594               	        delay_cycles 16*8 - 10 - 4
+ 1595               	
+1596:fastloader-ll.S ****         ;; receive bits 3+1
+ 1597               	        rcall   get_bits_from_clk_data ; 4+8 - r24 = .76543.1
+ 1598               	        lsl     r24                    ; 1   - r24 = 76543.1.
+1599:fastloader-ll.S **** 
+1600:fastloader-ll.S ****         ;; delay
+ 1601               	        delay_cycles 10*8 - 9 - 4
+ 1602               	
+1603:fastloader-ll.S ****         ;; receive bits 2+0
+ 1604               	        rcall   get_bits_from_clk_data ; 4+8 - r24 = 76543210
+ 1605               	
+1606:fastloader-ll.S ****         ;; delay
+ 1607               	        delay_cycles 5*8 - 8 - 1
+ 1608               	
+1609:fastloader-ll.S ****         ;; set clock low
+ 1610               	        sbi     _SFR_IO_ADDR(IEC_OUT), IEC_OPIN_CLOCK
+ 1611               	
+1612:fastloader-ll.S ****         ;; post-processing
+ 1613               	        sei
+ 1614               	        com     r24
+1615:fastloader-ll.S ****         clr     r25
+1616:fastloader-ll.S ****         ret
+1617:fastloader-ll.S **** #endif
+1618:fastloader-ll.S ****         .end
+ 1619               	...
+DEFINED SYMBOLS
+     fastloader-ll.S:56     .text:00000000 __vector_4
+     fastloader-ll.S:87     .text:00000026 iiv_atn_irq_end
+     fastloader-ll.S:83     .text:00000024 iiv_not_fl_dreamload_old
+     fastloader-ll.S:802    .text:000002a4 dreamload_get_command_old
+     fastloader-ll.S:108    .text:0000003e iiv_clock_irq_end
+     fastloader-ll.S:105    .text:0000003e iiv_not_fl_dreamload
+     fastloader-ll.S:754    .text:00000274 dreamload_get_command
+     fastloader-ll.S:171    .text:0000004c cycleloop2
+     fastloader-ll.S:173    .text:0000004e cycleloop1
+     fastloader-ll.S:175    .text:00000050 cycleloop0
+     fastloader-ll.S:195    .text:00000056 delay1us
+     fastloader-ll.S:200    .text:0000005a wait_atn_high
+     fastloader-ll.S:206    .text:00000060 wait_atn_low
+     fastloader-ll.S:221    .text:00000066 jiffy_receive
+     fastloader-ll.S:308    .text:000000ca jiffy_sendbits
+     fastloader-ll.S:336    .text:000000de jiffy_send
+     fastloader-ll.S:429    .text:00000140 js_finish
+     fastloader-ll.S:446    .text:00000148 turbodisk_byte
+     fastloader-ll.S:467    .text:0000015c tdbitloop
+     fastloader-ll.S:503    .text:00000186 turbodisk_buffer
+     fastloader-ll.S:523    .text:0000019a tdbyteloop
+     fastloader-ll.S:531    .text:000001a4 tdbitloop2
+     fastloader-ll.S:581    .text:000001d8 send_bits_to_clk_data
+     fastloader-ll.S:606    .text:000001ec get_bits_from_clk_data
+     fastloader-ll.S:627    .text:000001f8 clk_data_handshake
+     fastloader-ll.S:649    .text:0000020e fastloader_fc3_send_block
+     fastloader-ll.S:660    .text:0000021a fc3_byteloop
+     fastloader-ll.S:666    .text:00000220 fc3_bitloop
+     fastloader-ll.S:676    .text:0000022a fc3_next_byte
+     fastloader-ll.S:696    .text:0000023c fc3_get_byte
+     fastloader-ll.S:765    .text:00000282 dreamload_get_byte
+     fastloader-ll.S:768    .text:00000284 dl_bitloop
+     fastloader-ll.S:812    .text:000002b2 dreamload_get_byte_old
+     fastloader-ll.S:815    .text:000002b4 dlgb_nibble
+     fastloader-ll.S:838    .text:000002ca dreamload_send_byte
+     fastloader-ll.S:846    .text:000002d0 dsb_bitloop
+     fastloader-ll.S:867    .text:000002de uload3_get_byte
+     fastloader-ll.S:905    .text:00000312 uload3_abort
+     fastloader-ll.S:914    .text:00000316 uload3_send_byte
+     fastloader-ll.S:942    .text:00000336 uload3_bitloop
+     fastloader-ll.S:963    .text:0000034e epyx_bitpair
+     fastloader-ll.S:976    .text:0000035a epyxcart_send_byte
+     fastloader-ll.S:1014   .text:00000396 epyxcart_atnabort
+     fastloader-ll.S:1024   .text:0000039a geos_get_byte_common
+     fastloader-ll.S:1061   .text:000003c2 geos_get_byte_1mhz
+     fastloader-ll.S:1088   .text:000003dc geos_get_byte_2mhz
+     fastloader-ll.S:1115   .text:000003f6 geos_send_byte_common
+     fastloader-ll.S:1136   .text:00000408 geos_send_byte_1mhz
+     fastloader-ll.S:1167   .text:00000426 geos_send_byte_tail
+     fastloader-ll.S:1155   .text:00000418 geos_send_byte_2mhz
+     fastloader-ll.S:1222   .text:00000460 geos_send_byte_1581_21
+     fastloader-ll.S:1264   .text:00000484 wheels_send_byte_1mhz
+     fastloader-ll.S:1277   .text:00000496 wheels_nibble
+     fastloader-ll.S:1310   .text:000004b8 wheels_get_byte_1mhz
+     fastloader-ll.S:1357   .text:000004ec wheels44_get_byte_1mhz
+     fastloader-ll.S:1404   .text:00000520 wheels44_get_byte_2mhz
+     fastloader-ll.S:1469   .text:0000056c wheels44_send_byte_2mhz
+     fastloader-ll.S:1511   .text:00000590 ar6_1581_send_byte
+     fastloader-ll.S:1564   .text:000005c0 ar6_1581p_get_byte
+
+UNDEFINED SYMBOLS
+detected_loader
+fl_track
+fl_sector
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/sd2iec-sw2-firmware-0.10.3.bin b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/sd2iec-sw2-firmware-0.10.3.bin
new file mode 100644
index 00000000..59b29b28
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/sd2iec-sw2-firmware-0.10.3.bin differ
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/sd2iec.bin b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/sd2iec.bin
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diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/sd2iec.elf b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/sd2iec.elf
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Binary files /dev/null and b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/sd2iec.elf differ
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/sd2iec.hex b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/sd2iec.hex
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diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/sd2iec.map b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/sd2iec.map
new file mode 100644
index 00000000..05eda8ce
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/obj-m644p/sd2iec.map
@@ -0,0 +1,2476 @@
+Archive member included because of file (symbol)
+
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_mulsi3.o)
+                              obj-m644p/doscmd.o (__mulsi3)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_udivmodqi4.o)
+                              obj-m644p/display.o (__udivmodqi4)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_udivmodhi4.o)
+                              obj-m644p/ff.o (__udivmodhi4)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_udivmodsi4.o)
+                              obj-m644p/fatops.o (__udivmodsi4)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_prologue.o)
+                              obj-m644p/buffers.o (__prologue_saves__)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_epilogue.o)
+                              obj-m644p/buffers.o (__epilogue_restores__)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_exit.o)
+                              c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5/crtm644p.o (exit)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_tablejump.o)
+                              obj-m644p/doscmd.o (__tablejump2__)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_copy_data.o)
+                              obj-m644p/doscmd.o (__do_copy_data)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_clear_bss.o)
+                              obj-m644p/buffers.o (__do_clear_bss)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(isalnum.o)
+                              obj-m644p/fatops.o (isalnum)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(cty_isfalse.o)
+                              c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(isalnum.o) (__ctype_isfalse)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(isalpha.o)
+                              c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(isalnum.o) (isalpha)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(toupper.o)
+                              obj-m644p/errormsg.o (toupper)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(memcmp_P.o)
+                              obj-m644p/doscmd.o (memcmp_P)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(memcpy_P.o)
+                              obj-m644p/d64ops.o (memcpy_P)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(strcmp_P.o)
+                              obj-m644p/fatops.o (strcmp_P)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(strcpy_P.o)
+                              obj-m644p/diskchange.o (strcpy_P)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(memcmp.o)
+                              obj-m644p/doscmd.o (memcmp)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(memcpy.o)
+                              obj-m644p/display.o (memcpy)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(memset.o)
+                              obj-m644p/d64ops.o (memset)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(strchr.o)
+                              obj-m644p/doscmd.o (strchr)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(strcpy.o)
+                              obj-m644p/doscmd.o (strcpy)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(strncpy.o)
+                              obj-m644p/doscmd.o (strncpy)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(strrchr.o)
+                              obj-m644p/fatops.o (strrchr)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(eerd_block_atmega644p.o)
+                              obj-m644p/eeprom.o (__eerd_block_m644p)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(eerd_byte_atmega644p.o)
+                              obj-m644p/doscmd.o (__eerd_byte_m644p)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(eerd_word_atmega644p.o)
+                              obj-m644p/eeprom.o (__eerd_word_m644p)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(eewr_block_atmega644p.o)
+                              obj-m644p/eeprom.o (__eewr_block_m644p)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(eewr_byte_atmega644p.o)
+                              obj-m644p/doscmd.o (__eewr_byte_m644p)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(eewr_word_atmega644p.o)
+                              obj-m644p/eeprom.o (__eewr_word_m644p)
+
+Allocating common symbols
+Common symbol       size              file
+
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+lastbuttonchange    0x2               obj-m644p/timer.o
+iec_data            0x4               obj-m644p/iec.o
+buffers             0x150             obj-m644p/buffers.o
+command_length      0x1               obj-m644p/doscmd.o
+device_address      0x1               obj-m644p/iec.o
+active_keys         0x1               obj-m644p/timer.o
+buttonstate         0x1               obj-m644p/timer.o
+led_state           0x1               obj-m644p/led.o
+error_buffer        0x2e              obj-m644p/errormsg.o
+current_part        0x1               obj-m644p/parser.o
+original_length     0x1               obj-m644p/doscmd.o
+max_part            0x1               obj-m644p/parser.o
+entrybuf            0x21              obj-m644p/buffers.o
+partition           0x164             obj-m644p/parser.o
+detected_loader     0x1               obj-m644p/fastloader.o
+geos_send_byte      0x2               obj-m644p/fastloader.o
+rom_filename        0x11              obj-m644p/eeprom.o
+current_error       0x1               obj-m644p/errormsg.o
+geos_get_byte       0x2               obj-m644p/fastloader.o
+disk_state          0x1               obj-m644p/diskio.o
+date_match_end      0x6               obj-m644p/doscmd.o
+dir_changed         0x1               obj-m644p/parser.o
+file_extension_mode
+                    0x1               obj-m644p/fatops.o
+fl_sector           0x1               obj-m644p/fastloader.o
+ticks               0x2               obj-m644p/timer.o
+image_as_dir        0x1               obj-m644p/fileops.o
+fl_track            0x1               obj-m644p/fastloader.o
+command_buffer      0x7a              obj-m644p/doscmd.o
+active_buffers      0x1               obj-m644p/buffers.o
+errorcache          0x17              obj-m644p/d64ops.o
+bam_buffer          0x2               obj-m644p/d64ops.o
+rtc_state           0x1               obj-m644p/pcf8583.o
+date_match_start    0x6               obj-m644p/doscmd.o
+display_found       0x1               obj-m644p/display.o
+
+Discarded input sections
+
+ .data          0x00000000        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5/crtm644p.o
+ .bss           0x00000000        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5/crtm644p.o
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+ .data          0x00000000        0x0 obj-m644p/buffers.o
+ .bss           0x00000000        0x0 obj-m644p/buffers.o
+ .text          0x00000000        0x0 obj-m644p/d64ops.o
+ .data          0x00000000        0x0 obj-m644p/d64ops.o
+ .bss           0x00000000        0x0 obj-m644p/d64ops.o
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+ .bss           0x00000000        0x0 obj-m644p/diskio.o
+ .text          0x00000000        0x0 obj-m644p/display.o
+ .data          0x00000000        0x0 obj-m644p/display.o
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+ .text          0x00000000        0x0 obj-m644p/doscmd.o
+ .data          0x00000000        0x0 obj-m644p/doscmd.o
+ .bss           0x00000000        0x0 obj-m644p/doscmd.o
+ .text          0x00000000        0x0 obj-m644p/eeprom.o
+ .data          0x00000000        0x0 obj-m644p/eeprom.o
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+ .text          0x00000000        0x0 obj-m644p/errormsg.o
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+                0x00000000        0x0 obj-m644p/ff.o
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+ .data          0x00000000        0x0 obj-m644p/fileops.o
+ .bss           0x00000000        0x0 obj-m644p/fileops.o
+ .text          0x00000000        0x0 obj-m644p/iec.o
+ .data          0x00000000        0x0 obj-m644p/iec.o
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+ .bss           0x00000000        0x0 obj-m644p/led.o
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+ .data          0x00000000        0x0 obj-m644p/main.o
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+ .text          0x00000000        0x0 obj-m644p/sdcard.o
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+ .text          0x00000000        0x0 obj-m644p/softi2c.o
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+ .data          0x00000000        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_mulsi3.o)
+ .bss           0x00000000        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_mulsi3.o)
+ .text          0x00000000        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_udivmodqi4.o)
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+ .text          0x00000000        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_epilogue.o)
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+ .bss           0x00000000        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_exit.o)
+ .text.libgcc   0x00000000        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_exit.o)
+ .text          0x00000000        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_tablejump.o)
+ .data          0x00000000        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_tablejump.o)
+ .bss           0x00000000        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_tablejump.o)
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+LOAD obj-m644p/buffers.o
+LOAD obj-m644p/d64ops.o
+LOAD obj-m644p/diskchange.o
+LOAD obj-m644p/diskio.o
+LOAD obj-m644p/display.o
+LOAD obj-m644p/doscmd.o
+LOAD obj-m644p/eeprom.o
+LOAD obj-m644p/errormsg.o
+LOAD obj-m644p/fastloader.o
+LOAD obj-m644p/fatops.o
+LOAD obj-m644p/ff.o
+LOAD obj-m644p/fileops.o
+LOAD obj-m644p/iec.o
+LOAD obj-m644p/led.o
+LOAD obj-m644p/m2iops.o
+LOAD obj-m644p/main.o
+LOAD obj-m644p/parser.o
+LOAD obj-m644p/pcf8583.o
+LOAD obj-m644p/rtc.o
+LOAD obj-m644p/sdcard.o
+LOAD obj-m644p/softi2c.o
+LOAD obj-m644p/spi.o
+LOAD obj-m644p/timer.o
+LOAD obj-m644p/utils.o
+LOAD obj-m644p/fastloader-ll.o
+LOAD obj-m644p/crc7asm.o
+LOAD c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libm.a
+LOAD c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a
+LOAD c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a
+LOAD c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a
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+
+.debug_macinfo
+ *(.debug_macinfo)
+OUTPUT(obj-m644p/sd2iec.elf elf32-avr)
+LOAD linker stubs
+
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+
+Cross Reference Table
+
+Symbol                                            File
+__bad_interrupt                                   c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5/crtm644p.o
+__bss_end                                         c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_clear_bss.o)
+__bss_start                                       c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_clear_bss.o)
+__ctype_isfalse                                   c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(cty_isfalse.o)
+                                                  c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(isalpha.o)
+                                                  c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(isalnum.o)
+__ctype_istrue                                    c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(cty_isfalse.o)
+__data_end                                        c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_copy_data.o)
+__data_load_start                                 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_copy_data.o)
+__data_start                                      c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_copy_data.o)
+__do_clear_bss                                    c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_clear_bss.o)
+                                                  obj-m644p/timer.o
+                                                  obj-m644p/sdcard.o
+                                                  obj-m644p/pcf8583.o
+                                                  obj-m644p/parser.o
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+                                                  obj-m644p/diskchange.o
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+__do_copy_data                                    c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_copy_data.o)
+                                                  obj-m644p/iec.o
+                                                  obj-m644p/fileops.o
+                                                  obj-m644p/fatops.o
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+__eerd_block_m644p                                c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(eerd_block_atmega644p.o)
+                                                  obj-m644p/eeprom.o
+__eerd_blraw_m644p                                c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(eerd_block_atmega644p.o)
+                                                  c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(eerd_word_atmega644p.o)
+__eerd_byte_m644p                                 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(eerd_byte_atmega644p.o)
+                                                  obj-m644p/eeprom.o
+                                                  obj-m644p/doscmd.o
+__eerd_word_m644p                                 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(eerd_word_atmega644p.o)
+                                                  obj-m644p/eeprom.o
+__eewr_block_m644p                                c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(eewr_block_atmega644p.o)
+                                                  obj-m644p/eeprom.o
+__eewr_byte_m644p                                 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(eewr_byte_atmega644p.o)
+                                                  c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(eewr_word_atmega644p.o)
+                                                  obj-m644p/eeprom.o
+                                                  obj-m644p/doscmd.o
+__eewr_r18_m644p                                  c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(eewr_byte_atmega644p.o)
+                                                  c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(eewr_word_atmega644p.o)
+                                                  c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(eewr_block_atmega644p.o)
+__eewr_word_m644p                                 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(eewr_word_atmega644p.o)
+                                                  obj-m644p/eeprom.o
+__epilogue_restores__                             c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_epilogue.o)
+                                                  obj-m644p/softi2c.o
+                                                  obj-m644p/sdcard.o
+                                                  obj-m644p/rtc.o
+                                                  obj-m644p/pcf8583.o
+                                                  obj-m644p/parser.o
+                                                  obj-m644p/m2iops.o
+                                                  obj-m644p/iec.o
+                                                  obj-m644p/fileops.o
+                                                  obj-m644p/ff.o
+                                                  obj-m644p/fatops.o
+                                                  obj-m644p/fastloader.o
+                                                  obj-m644p/errormsg.o
+                                                  obj-m644p/doscmd.o
+                                                  obj-m644p/display.o
+                                                  obj-m644p/diskchange.o
+                                                  obj-m644p/d64ops.o
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+                                                  obj-m644p/doscmd.o
+get_fattime                                       obj-m644p/rtc.o
+                                                  obj-m644p/ff.o
+get_mcusr                                         obj-m644p/main.o
+i2c_init                                          obj-m644p/softi2c.o
+                                                  obj-m644p/pcf8583.o
+i2c_read_register                                 obj-m644p/softi2c.o
+                                                  obj-m644p/display.o
+i2c_read_registers                                obj-m644p/softi2c.o
+                                                  obj-m644p/pcf8583.o
+                                                  obj-m644p/display.o
+i2c_write_register                                obj-m644p/softi2c.o
+                                                  obj-m644p/pcf8583.o
+i2c_write_registers                               obj-m644p/softi2c.o
+                                                  obj-m644p/pcf8583.o
+                                                  obj-m644p/display.o
+iec_data                                          obj-m644p/iec.o
+iec_init                                          obj-m644p/iec.o
+                                                  obj-m644p/main.o
+iec_mainloop                                      obj-m644p/iec.o
+                                                  obj-m644p/main.o
+image_as_dir                                      obj-m644p/fileops.o
+                                                  obj-m644p/errormsg.o
+                                                  obj-m644p/eeprom.o
+                                                  obj-m644p/doscmd.o
+image_chdir                                       obj-m644p/fatops.o
+                                                  obj-m644p/m2iops.o
+                                                  obj-m644p/d64ops.o
+image_mkdir                                       obj-m644p/fatops.o
+                                                  obj-m644p/m2iops.o
+image_read                                        obj-m644p/fatops.o
+                                                  obj-m644p/m2iops.o
+                                                  obj-m644p/d64ops.o
+image_unmount                                     obj-m644p/fatops.o
+                                                  obj-m644p/diskchange.o
+                                                  obj-m644p/d64ops.o
+image_write                                       obj-m644p/fatops.o
+                                                  obj-m644p/m2iops.o
+                                                  obj-m644p/d64ops.o
+int2bcd                                           obj-m644p/utils.o
+                                                  obj-m644p/pcf8583.o
+                                                  obj-m644p/doscmd.o
+isalnum                                           c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(isalnum.o)
+                                                  obj-m644p/fatops.o
+isalpha                                           c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(isalpha.o)
+                                                  c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(isalnum.o)
+islower                                           c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(isalpha.o)
+isupper                                           c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(isalpha.o)
+jiffy_receive                                     obj-m644p/fastloader-ll.o
+                                                  obj-m644p/iec.o
+jiffy_send                                        obj-m644p/fastloader-ll.o
+                                                  obj-m644p/iec.o
+l_getfree                                         obj-m644p/ff.o
+                                                  obj-m644p/fatops.o
+l_opencluster                                     obj-m644p/ff.o
+                                                  obj-m644p/fatops.o
+l_opendir                                         obj-m644p/ff.o
+                                                  obj-m644p/fatops.o
+lastbuttonchange                                  obj-m644p/timer.o
+led_state                                         obj-m644p/timer.o
+                                                  obj-m644p/led.o
+                                                  obj-m644p/errormsg.o
+load_ar6_1581                                     obj-m644p/fastloader.o
+                                                  obj-m644p/doscmd.o
+load_dreamload                                    obj-m644p/fastloader.o
+                                                  obj-m644p/doscmd.o
+load_eload1                                       obj-m644p/fastloader.o
+                                                  obj-m644p/doscmd.o
+load_epyxcart                                     obj-m644p/fastloader.o
+                                                  obj-m644p/doscmd.o
+load_fc3                                          obj-m644p/fastloader.o
+                                                  obj-m644p/doscmd.o
+load_geos                                         obj-m644p/fastloader.o
+                                                  obj-m644p/doscmd.o
+load_geos_s1                                      obj-m644p/fastloader.o
+                                                  obj-m644p/doscmd.o
+load_gijoe                                        obj-m644p/fastloader.o
+                                                  obj-m644p/doscmd.o
+load_nippon                                       obj-m644p/fastloader.o
+                                                  obj-m644p/doscmd.o
+load_turbodisk                                    obj-m644p/fastloader.o
+                                                  obj-m644p/doscmd.o
+load_uload3                                       obj-m644p/fastloader.o
+                                                  obj-m644p/doscmd.o
+load_wheels_s1                                    obj-m644p/fastloader.o
+                                                  obj-m644p/doscmd.o
+load_wheels_s2                                    obj-m644p/fastloader.o
+                                                  obj-m644p/doscmd.o
+longverstr                                        obj-m644p/errormsg.o
+                                                  obj-m644p/main.o
+m2iops                                            obj-m644p/m2iops.o
+                                                  obj-m644p/fileops.o
+                                                  obj-m644p/fatops.o
+main                                              obj-m644p/main.o
+                                                  c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5/crtm644p.o
+mark_buffer_clean                                 obj-m644p/buffers.o
+                                                  obj-m644p/fatops.o
+                                                  obj-m644p/fastloader.o
+                                                  obj-m644p/d64ops.o
+mark_buffer_dirty                                 obj-m644p/buffers.o
+                                                  obj-m644p/iec.o
+                                                  obj-m644p/fastloader.o
+                                                  obj-m644p/doscmd.o
+                                                  obj-m644p/d64ops.o
+match_name                                        obj-m644p/parser.o
+                                                  obj-m644p/fileops.o
+matchdh                                           obj-m644p/parser.o
+                                                  obj-m644p/fileops.o
+                                                  obj-m644p/doscmd.o
+                                                  obj-m644p/buffers.o
+max_part                                          obj-m644p/parser.o
+                                                  obj-m644p/fileops.o
+                                                  obj-m644p/fatops.o
+                                                  obj-m644p/doscmd.o
+                                                  obj-m644p/d64ops.o
+memcmp                                            c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(memcmp.o)
+                                                  obj-m644p/parser.o
+                                                  obj-m644p/ff.o
+                                                  obj-m644p/doscmd.o
+memcmp_P                                          c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(memcmp_P.o)
+                                                  obj-m644p/ff.o
+                                                  obj-m644p/doscmd.o
+memcpy                                            c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(memcpy.o)
+                                                  obj-m644p/fileops.o
+                                                  obj-m644p/ff.o
+                                                  obj-m644p/fatops.o
+                                                  obj-m644p/doscmd.o
+                                                  obj-m644p/display.o
+memcpy_P                                          c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(memcpy_P.o)
+                                                  obj-m644p/pcf8583.o
+                                                  obj-m644p/fileops.o
+                                                  obj-m644p/fatops.o
+                                                  obj-m644p/doscmd.o
+                                                  obj-m644p/d64ops.o
+memset                                            c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(memset.o)
+                                                  obj-m644p/m2iops.o
+                                                  obj-m644p/fileops.o
+                                                  obj-m644p/ff.o
+                                                  obj-m644p/fatops.o
+                                                  obj-m644p/eeprom.o
+                                                  obj-m644p/doscmd.o
+                                                  obj-m644p/d64ops.o
+mount_drv                                         obj-m644p/ff.o
+next_match                                        obj-m644p/parser.o
+                                                  obj-m644p/fileops.o
+                                                  obj-m644p/doscmd.o
+original_length                                   obj-m644p/doscmd.o
+parse_date                                        obj-m644p/parser.o
+                                                  obj-m644p/fileops.o
+parse_doscommand                                  obj-m644p/doscmd.o
+                                                  obj-m644p/iec.o
+parse_error                                       obj-m644p/fatops.o
+                                                  obj-m644p/diskchange.o
+parse_number                                      obj-m644p/parser.o
+                                                  obj-m644p/doscmd.o
+parse_partition                                   obj-m644p/parser.o
+                                                  obj-m644p/doscmd.o
+parse_path                                        obj-m644p/parser.o
+                                                  obj-m644p/fileops.o
+                                                  obj-m644p/doscmd.o
+                                                  obj-m644p/diskchange.o
+partition                                         obj-m644p/parser.o
+                                                  obj-m644p/m2iops.o
+                                                  obj-m644p/fileops.o
+                                                  obj-m644p/fatops.o
+                                                  obj-m644p/fastloader.o
+                                                  obj-m644p/doscmd.o
+                                                  obj-m644p/display.o
+                                                  obj-m644p/diskchange.o
+                                                  obj-m644p/d64ops.o
+read_configuration                                obj-m644p/eeprom.o
+                                                  obj-m644p/main.o
+read_rtc                                          obj-m644p/pcf8583.o
+                                                  obj-m644p/rtc.o
+                                                  obj-m644p/doscmd.o
+rom_filename                                      obj-m644p/errormsg.o
+                                                  obj-m644p/eeprom.o
+                                                  obj-m644p/doscmd.o
+rtc_init                                          obj-m644p/pcf8583.o
+                                                  obj-m644p/main.o
+rtc_state                                         obj-m644p/pcf8583.o
+                                                  obj-m644p/doscmd.o
+save_ar6_1581                                     obj-m644p/fastloader.o
+                                                  obj-m644p/doscmd.o
+save_fc3                                          obj-m644p/fastloader.o
+                                                  obj-m644p/doscmd.o
+sd_getinfo                                        obj-m644p/sdcard.o
+sd_init                                           obj-m644p/sdcard.o
+sd_initialize                                     obj-m644p/sdcard.o
+sd_read                                           obj-m644p/sdcard.o
+sd_status                                         obj-m644p/sdcard.o
+sd_write                                          obj-m644p/sdcard.o
+set_changelist                                    obj-m644p/diskchange.o
+                                                  obj-m644p/fatops.o
+                                                  obj-m644p/doscmd.o
+set_error                                         obj-m644p/errormsg.o
+                                                  obj-m644p/parser.o
+                                                  obj-m644p/m2iops.o
+                                                  obj-m644p/iec.o
+                                                  obj-m644p/fileops.o
+                                                  obj-m644p/fatops.o
+                                                  obj-m644p/fastloader.o
+                                                  obj-m644p/doscmd.o
+                                                  obj-m644p/diskchange.o
+                                                  obj-m644p/d64ops.o
+                                                  obj-m644p/buffers.o
+set_error_ts                                      obj-m644p/errormsg.o
+                                                  obj-m644p/fatops.o
+                                                  obj-m644p/doscmd.o
+                                                  obj-m644p/d64ops.o
+set_ok_message                                    obj-m644p/errormsg.o
+                                                  obj-m644p/buffers.o
+set_rtc                                           obj-m644p/pcf8583.o
+                                                  obj-m644p/doscmd.o
+spiInit                                           obj-m644p/spi.o
+                                                  obj-m644p/sdcard.o
+spiTransferByte                                   obj-m644p/spi.o
+                                                  obj-m644p/sdcard.o
+spiTransferLong                                   obj-m644p/spi.o
+                                                  obj-m644p/sdcard.o
+strchr                                            c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(strchr.o)
+                                                  obj-m644p/parser.o
+                                                  obj-m644p/fileops.o
+                                                  obj-m644p/doscmd.o
+strcmp_P                                          c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(strcmp_P.o)
+                                                  obj-m644p/fatops.o
+strcpy                                            c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(strcpy.o)
+                                                  obj-m644p/m2iops.o
+                                                  obj-m644p/fatops.o
+                                                  obj-m644p/errormsg.o
+                                                  obj-m644p/doscmd.o
+strcpy_P                                          c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(strcpy_P.o)
+                                                  obj-m644p/main.o
+                                                  obj-m644p/fatops.o
+                                                  obj-m644p/fastloader.o
+                                                  obj-m644p/display.o
+                                                  obj-m644p/diskchange.o
+strncpy                                           c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(strncpy.o)
+                                                  obj-m644p/fileops.o
+                                                  obj-m644p/doscmd.o
+strrchr                                           c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(strrchr.o)
+                                                  obj-m644p/fatops.o
+syspart_line                                      obj-m644p/fileops.o
+ticks                                             obj-m644p/timer.o
+                                                  obj-m644p/sdcard.o
+                                                  obj-m644p/fastloader.o
+                                                  obj-m644p/diskchange.o
+timer_init                                        obj-m644p/timer.o
+                                                  obj-m644p/main.o
+toupper                                           c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a(toupper.o)
+                                                  obj-m644p/fatops.o
+                                                  obj-m644p/errormsg.o
+turbodisk_buffer                                  obj-m644p/fastloader-ll.o
+                                                  obj-m644p/fastloader.o
+turbodisk_byte                                    obj-m644p/fastloader-ll.o
+                                                  obj-m644p/fastloader.o
+uload3_get_byte                                   obj-m644p/fastloader-ll.o
+                                                  obj-m644p/fastloader.o
+uload3_send_byte                                  obj-m644p/fastloader-ll.o
+                                                  obj-m644p/fastloader.o
+update_current_dir                                obj-m644p/parser.o
+                                                  obj-m644p/doscmd.o
+                                                  obj-m644p/display.o
+                                                  obj-m644p/diskchange.o
+update_leds                                       obj-m644p/led.o
+                                                  obj-m644p/m2iops.o
+                                                  obj-m644p/iec.o
+                                                  obj-m644p/fatops.o
+                                                  obj-m644p/errormsg.o
+                                                  obj-m644p/buffers.o
+ustr1tok                                          obj-m644p/utils.o
+                                                  obj-m644p/doscmd.o
+versionstr                                        obj-m644p/errormsg.o
+                                                  obj-m644p/main.o
+wheels44_get_byte_1mhz                            obj-m644p/fastloader-ll.o
+                                                  obj-m644p/doscmd.o
+wheels44_get_byte_2mhz                            obj-m644p/fastloader-ll.o
+                                                  obj-m644p/doscmd.o
+wheels44_send_byte_2mhz                           obj-m644p/fastloader-ll.o
+                                                  obj-m644p/doscmd.o
+wheels_get_byte_1mhz                              obj-m644p/fastloader-ll.o
+                                                  obj-m644p/doscmd.o
+wheels_send_byte_1mhz                             obj-m644p/fastloader-ll.o
+                                                  obj-m644p/doscmd.o
+write_configuration                               obj-m644p/eeprom.o
+                                                  obj-m644p/doscmd.o
+                                                  obj-m644p/display.o
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/parser.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/parser.c
new file mode 100644
index 00000000..2261c201
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/parser.c
@@ -0,0 +1,458 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   parser.c: Common file name parsers
+
+*/
+
+#include <ctype.h>
+#include <stdint.h>
+#include <string.h>
+#include "config.h"
+#include "dirent.h"
+#include "display.h"
+#include "errormsg.h"
+#include "fatops.h"
+#include "flags.h"
+#include "ustring.h"
+#include "parser.h"
+
+partition_t partition[CONFIG_MAX_PARTITIONS];
+uint8_t current_part;
+uint8_t max_part;
+uint8_t dir_changed;
+
+/* Updates current_dir in the partition array and sends */
+/* the new dir to the display.                          */
+void update_current_dir(path_t *path){
+  partition[path->part].current_dir = path->dir;
+  dir_changed = 1;
+
+  if (display_found && path->part == current_part) {
+    uint8_t dirname[CBM_NAME_LENGTH+1];
+    uint8_t *ptr = dirname + CBM_NAME_LENGTH;
+
+    dir_label(path, dirname);
+    *ptr-- = 0;
+
+    while (*ptr == ' ') *ptr-- = 0;
+    display_current_directory(path->part, dirname);
+  }
+}
+
+/**
+ * check_invalid_name - check for invalid characters in a file name
+ * @name: pointer to the file name
+ *
+ * This function checks if the passed name contains any characters
+ * that are not valid in a CBM file name. Returns 1 if invalid
+ * characters are found, 0 if not.
+ */
+uint8_t check_invalid_name(uint8_t *name) {
+  while (*name) {
+    if (*name == '=' || *name == '"' ||
+        *name == '*' || *name == '?' ||
+        *name == ',')
+      return 1;
+    name++;
+  }
+  return 0;
+}
+
+/* Convert a PETSCII character to lower-case */
+static uint8_t tolower_pet(uint8_t c) {
+  if (c >= 0x61 && c <= 0x7a)
+    c -= 0x20;
+  else if (c >= 0xc1 && c <= 0xda)
+    c -= 0x80;
+  return c;
+}
+
+/**
+ * parse_partition - parse a partition number from a file name
+ * @buf     : pointer to pointer to filename
+ *
+ * This function parses the partition number from the file name
+ * specified in buf and advances buf to point at the first character
+ * that isn't part of the number. Returns a 0-based partition number.
+ */
+uint8_t parse_partition(uint8_t **buf) {
+  uint8_t part=0;
+
+  while (isdigit(**buf) || **buf == ' ' || **buf == '@') {
+    if(isdigit(**buf))
+      part=part*10+(**buf-'0');
+    (*buf)++;
+  }
+  if (part == 0)
+    return current_part;
+  else
+    return part-1;
+}
+
+
+/**
+ * match_name - Match a pattern against a file name
+ * @matchstr  : pattern to be matched
+ * @dent      : pointer to the directory entry to be matched against
+ * @ignorecase: ignore the case of the file names
+ *
+ * This function tests if matchstr matches name in dent.
+ * Returns 1 for a match, 0 otherwise.
+ */
+uint8_t match_name(uint8_t *matchstr, cbmdirent_t *dent, uint8_t ignorecase) {
+  uint8_t *filename = dent->name;
+  uint8_t *starpos;
+  uint8_t m,f;
+
+#if 0
+  /* Shortcut for chaining fastloaders ("!*file") */
+  if (*filename == *matchstr && matchstr[1] == '*')
+    return 1;
+#endif
+
+  while (*filename) {
+    if (ignorecase) {
+      m = tolower_pet(*matchstr);
+      f = tolower_pet(*filename);
+    } else {
+      m = *matchstr;
+      f = *filename;
+    }
+    switch (m) {
+    case '?':
+      filename++;
+      matchstr++;
+      break;
+
+    case '*':
+      if (globalflags & POSTMATCH) {
+        starpos = matchstr;
+        matchstr += ustrlen(matchstr)-1;
+        filename += ustrlen(filename)-1;
+        while (matchstr != starpos) {
+          if (ignorecase) {
+            m = tolower_pet(*matchstr);
+            f = tolower_pet(*filename);
+          } else {
+            m = *matchstr;
+            f = *filename;
+          }
+          if (m != f && m != '?')
+            return 0;
+          filename--;
+          matchstr--;
+        }
+      }
+      return 1;
+
+    default:
+      if (m != f)
+        return 0;
+      matchstr++;
+      filename++;
+      break;
+    }
+  }
+  if (*matchstr && *matchstr != '*')
+    return 0;
+  else
+    return 1;
+}
+
+/**
+ * next_match - get next matching directory entry
+ * @dh        : directory handle
+ * @matchstr  : pattern to be matched
+ * @start     : start date
+ * @end       : end date
+ * @type      : required file type (0 for any)
+ * @dent      : pointer to a directory entry for returning the match
+ *
+ * This function looks for the next directory entry matching matchstr and
+ * type (if != 0) and returns it in dent. Return values of the function are
+ * -1 if no match could be found, 1 if an error occured or 0 if a match was
+ * found.
+ */
+int8_t next_match(dh_t *dh, uint8_t *matchstr, date_t *start, date_t *end, uint8_t type, cbmdirent_t *dent) {
+  int8_t res;
+
+  while (1) {
+    res = readdir(dh, dent);
+    if (res == 0) {
+      /* Skip if the type doesn't match */
+      if ((type & TYPE_MASK) &&
+          (dent->typeflags & TYPE_MASK) != (type & TYPE_MASK))
+        continue;
+
+      /* Skip hidden files */
+      if ((dent->typeflags & FLAG_HIDDEN) &&
+          !(type & FLAG_HIDDEN))
+        continue;
+
+      /* Skip if the name doesn't match */
+      if (matchstr) {
+        if (dent->opstype == OPSTYPE_FAT) {
+          /* FAT: Ignore case */
+          if (!match_name(matchstr, dent, 1))
+            continue;
+        } else {
+          /* Honor case */
+          if (!match_name(matchstr, dent, 0))
+            continue;
+        }
+      }
+
+      /* skip if earlier than start date */
+      if (start &&
+          memcmp(&dent->date, start, sizeof(date_t)) < 0)
+        continue;
+
+      /* skip if later than end date */
+      if (end &&
+          memcmp(&dent->date, end, sizeof(date_t)) > 0)
+        continue;
+    }
+
+    return res;
+  }
+}
+
+/**
+ * first_match - get the first matching directory entry
+ * @path    : pointer to a path object
+ * @matchstr: pattern to be matched
+ * @type    : required file type (0 for any)
+ * @dent    : pointer to a directory entry for returning the match
+ *
+ * This function looks for the first directory entry matching matchstr and
+ * type (if != 0) in path and returns it in dent. Uses matchdh for matching
+ * and returns the same values as next_match. This function is just a
+ * convenience wrapper around opendir+next_match, it is not required to call
+ * it before using next_match.
+ */
+int8_t first_match(path_t *path, uint8_t *matchstr, uint8_t type, cbmdirent_t *dent) {
+  int8_t res;
+
+  if (opendir(&matchdh, path))
+    return 1;
+
+  res = next_match(&matchdh, matchstr, NULL, NULL, type, dent);
+  if (res < 0)
+    set_error(ERROR_FILE_NOT_FOUND);
+  return res;
+}
+
+/**
+ * parse_path - parse CMD style directory specification
+ * @in          : input buffer
+ * @path        : pointer to path object
+ * @name        : pointer to pointer to filename (may be NULL)
+ * @parse_always: force parsing even if no : is present in the input string
+ *
+ * This function parses a CMD style directory specification in the input
+ * buffer. If successful, the path object will be set up for accessing
+ * the path named in the input buffer. Returns 0 if successful or 1 if an
+ * error occured.
+ */
+uint8_t parse_path(uint8_t *in, path_t *path, uint8_t **name, uint8_t parse_always) {
+  cbmdirent_t dent;
+  uint8_t *end;
+  uint8_t saved;
+  uint8_t part;
+
+  if (parse_always || ustrchr(in, ':')) {
+    /* Skip partition number */
+    part=parse_partition(&in);
+    if(part>=max_part) {
+      set_error(ERROR_DRIVE_NOT_READY);
+      return 1;
+    }
+
+    path->part = part;
+    path->dir  = partition[part].current_dir;
+
+    if (*in != '/') {
+      *name = ustrchr(in, ':');
+      if (*name == NULL)
+        *name = in;
+      else
+        *name += 1;
+      return 0;
+    }
+
+    while (*in) {
+      switch (*in++) {
+      case '/':
+        switch (*in) {
+        case '/':
+          /* Double slash -> root */
+          dent.name[0] = 0;
+          chdir(path, &dent);
+          break;
+
+        case 0:
+          /* End of path found, no name */
+          *name = in;
+          return 0;
+
+        case ':':
+          /* End of path found */
+          *name = in+1;
+          return 0;
+
+        default:
+          /* Extract path component and match it */
+          end = in;
+          while (*end && *end != '/' && *end != ':') end++;
+          saved = *end;
+          *end = 0;
+          if (first_match(path, in, FLAG_HIDDEN, &dent)) {
+            /* first_match has set an error already */
+            if (current_error == ERROR_FILE_NOT_FOUND)
+              set_error(ERROR_FILE_NOT_FOUND_39);
+            return 1;
+          }
+
+          if ((dent.typeflags & TYPE_MASK) != TYPE_DIR) {
+            /* Not a directory */
+            /* FIXME: Try to mount as image here so they can be accessed like a directory */
+            set_error(ERROR_FILE_NOT_FOUND_39);
+            return 1;
+          }
+
+          /* Match found, move path */
+          chdir(path, &dent);
+          *end = saved;
+          in = end;
+          break;
+        }
+        break;
+
+      case 0:
+        /* End of path found, no name */
+        *name = in-1;  // -1 to fix the ++ in switch
+        return 0;
+
+      case ':':
+        /* End of path found */
+        *name = in;
+        return 0;
+      }
+    }
+  } else {
+    /* No :, use current dir/path */
+    path->part = current_part;
+    path->dir  = partition[current_part].current_dir;
+  }
+
+  *name = in;
+  return 0;
+}
+
+
+
+/* Parse a decimal number at str and return a pointer to the following char */
+uint8_t parse_number(uint8_t **str) {
+  uint8_t res = 0;
+
+  /* Skip leading spaces */
+  while (**str == ' ') (*str)++;
+
+  /* Parse decimal number */
+  while (isdigit(**str)) {
+    res *= 10;
+    res += (*(*str)++) - '0';
+  }
+
+  return res;
+}
+
+/* Parse a CMD-style date and return a pointer to the following char */
+uint8_t parse_date(date_t *date, uint8_t **str) {
+  uint8_t ch;
+
+  date->month = parse_number(str);
+  if (date->month > 12 || *(*str)++ != '/') return 1;
+
+  date->day = parse_number(str);
+  if (date->day > 31 || *(*str)++ != '/') return 1;
+
+  date->year = parse_number(str);
+  /* Y2K */
+  if (date->year < 80)
+    date->year += 100;
+
+  /* Shortcut: Just a date without time */
+  if (!**str || *(*str) == ',') {
+    date->hour = 0;
+    date->minute = 0;
+    date->second = 0;
+    return 0;
+  }
+  if (*(*str)++ != ' ') return 1;
+
+  date->hour = parse_number(str);
+  ch = *(*str)++;
+  if (date->hour > 23 || (ch != ':' && ch != '.')) return 1;
+
+  date->minute = parse_number(str);
+  ch = *(*str)++;
+  if (date->minute > 59) return 1;
+
+  switch (ch) {
+  case ':':
+  case '.':
+    date->second = parse_number(str);
+    if (date->second > 59 || *(*str)++ != ' ') return 1;
+    break;
+
+  case ' ':
+    date->second = 0;
+    break;
+
+  case ',':
+  case 0:
+    /* No AM/PM */
+    (*str)--;
+    date->second = 0;
+    return 0;
+
+  default:
+    return 1;
+  }
+
+  switch(*(*str)++) {
+  case 'A':
+    break;
+  case 'P':
+    date->hour+=12;
+    break;
+  default:
+    return 1;
+  }
+  if (date->hour > 23)
+    return 1;
+
+  if (*(*str)++ != 'M') return 1; // JLB need to check to see if CMD is this anal
+  return 0;
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/parser.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/parser.h
new file mode 100644
index 00000000..850bfb6d
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/parser.h
@@ -0,0 +1,69 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   parser.h: Definitions for the common file name parsers
+
+*/
+
+#ifndef PARSER_H
+#define PARSER_H
+
+#include "dirent.h"
+#include "ff.h"
+
+extern partition_t partition[CONFIG_MAX_PARTITIONS];
+extern uint8_t current_part;
+extern uint8_t max_part;
+
+/* Non-zero after any directory change */
+/* Used for disk (image) change detection in some fastloaders */
+/* Must be reset by its user */
+extern uint8_t dir_changed;
+
+/* Update current_dir in partition array */
+void update_current_dir(path_t *path);
+
+/* Parse a partition number */
+uint8_t parse_partition(uint8_t **buf);
+
+/* Performs CBM DOS pattern matching */
+uint8_t match_name(uint8_t *matchstr, cbmdirent_t *dent, uint8_t ignorecase);
+
+/* Returns the next matching dirent */
+int8_t next_match(dh_t *dh, uint8_t *matchstr, date_t *start, date_t *end, uint8_t type, cbmdirent_t *dent);
+
+/* Returns the first matching dirent */
+int8_t first_match(path_t *path, uint8_t *matchstr, uint8_t type, cbmdirent_t *dent);
+
+/* Parses CMD-style directory specifications */
+uint8_t parse_path(uint8_t *in, path_t *path, uint8_t **name, uint8_t parse_always);
+
+/* Check for invalid characters in a name */
+uint8_t check_invalid_name(uint8_t *name);
+
+/* Parse a decimal number at str and return a pointer to the following char */
+uint8_t parse_number(uint8_t **str);
+
+/* parse CMD-style dates */
+uint8_t parse_date(date_t *date, uint8_t **str);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/pcf8583.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/pcf8583.c
new file mode 100644
index 00000000..7837e3fc
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/pcf8583.c
@@ -0,0 +1,152 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   pcf8583.c: RTC support for PCF8583 chips
+
+   This file implements the functions defined in rtc.h.
+
+*/
+
+#include <avr/pgmspace.h>
+#include <stdint.h>
+#include <string.h>
+#include "config.h"
+#include "i2c.h"
+#include "uart.h"
+#include "ustring.h"
+#include "utils.h"
+#include "time.h"
+#include "rtc.h"
+
+#define PCF8583_ADDR 0xa0
+
+#define REG_CONTROL 0
+#define REG_S100    1
+#define REG_SECONDS 2
+#define REG_MINUTES 3
+#define REG_HOURS   4
+#define REG_YDATE   5
+#define REG_WMONTH  6
+/* Use the first four ram bytes to store the year and its complement.       */
+/* If the complement doesn't match the RTC contents are considered invalid. */
+#define REG_YEAR1   16
+#define REG_YEAR2   17
+#define REG_YEARC1  18
+#define REG_YEARC2  19
+
+#define CTL_STOP_CLOCK  0x80
+#define CTL_START_CLOCK 0
+
+/* Default date/time if the RTC isn't preset or not set: 1982-08-31 00:00:00 */
+PROGMEM const struct tm defaultdate = {
+  0, 0, 0, 31, 8, 82, 2
+};
+
+rtcstate_t rtc_state;
+
+/* Read the current time from the RTC */
+/* Will auto-adjust the stored year if required */
+void read_rtc(struct tm *time) {
+  union {
+    uint8_t  bytes[5];
+    uint16_t words[2];
+  } tmp;
+
+  /* Set to default value in case we abort */
+  memcpy_P(time, &defaultdate, sizeof(struct tm));
+  if (rtc_state != RTC_OK)
+    return;
+
+  if (i2c_read_registers(PCF8583_ADDR, REG_SECONDS, 5, &tmp))
+    return;
+
+  time->tm_sec  = bcd2int(tmp.bytes[0]);
+  time->tm_min  = bcd2int(tmp.bytes[1]);
+  time->tm_hour = bcd2int(tmp.bytes[2]);
+  time->tm_mday = bcd2int(tmp.bytes[3] & 0b00111111);
+  time->tm_mon  = bcd2int(tmp.bytes[4] & 0b00011111)-1;
+  time->tm_wday = bcd2int(tmp.bytes[4] >> 5);
+
+  /* Check for year rollover */
+  tmp.bytes[4] = tmp.bytes[3] >> 6;
+  i2c_read_registers(PCF8583_ADDR, REG_YEAR1, 4, &tmp);
+  if ((tmp.words[0] & 3) != tmp.bytes[4]) {
+    /* Year rolled over, increment until the lower two bits match */
+    while ((tmp.words[0] & 3) != tmp.bytes[4]) tmp.words[0]++;
+    tmp.words[1] = tmp.words[0] ^ 0xffffU;
+
+    /* Store new year to RTC ram */
+    i2c_write_registers(PCF8583_ADDR, REG_YEAR1, 4, &tmp);
+  }
+
+  time->tm_year = tmp.words[0]-1900;
+}
+
+/* Set the time in the RTC */
+void set_rtc(struct tm *time) {
+  union {
+    uint8_t  bytes[5];
+    uint16_t words[2];
+  } tmp;
+
+  if (rtc_state == RTC_NOT_FOUND)
+    return;
+
+  i2c_write_register(PCF8583_ADDR, REG_CONTROL, CTL_STOP_CLOCK);
+  tmp.bytes[0] = int2bcd(time->tm_sec);
+  tmp.bytes[1] = int2bcd(time->tm_min);
+  tmp.bytes[2] = int2bcd(time->tm_hour);
+  tmp.bytes[3] = int2bcd(time->tm_mday) | ((time->tm_year & 3) << 6);
+  tmp.bytes[4] = int2bcd(time->tm_mon+1)| ((time->tm_wday    ) << 5);
+  i2c_write_registers(PCF8583_ADDR, REG_SECONDS, 5, &tmp);
+  tmp.words[0] = time->tm_year + 1900;
+  tmp.words[1] = (time->tm_year + 1900) ^ 0xffffU;
+  i2c_write_registers(PCF8583_ADDR, REG_YEAR1, 4, &tmp);
+  i2c_write_register(PCF8583_ADDR, REG_CONTROL, CTL_START_CLOCK);
+  rtc_state = RTC_OK;
+}
+
+void rtc_init(void) {
+  uint8_t tmp[4];
+
+  i2c_init();
+  rtc_state = RTC_NOT_FOUND;
+  uart_puts_P(PSTR("RTC "));
+  if (i2c_write_register(PCF8583_ADDR, REG_CONTROL, CTL_START_CLOCK) ||
+      i2c_read_registers(PCF8583_ADDR, REG_YEAR1, 4, tmp)) {
+    uart_puts_P(PSTR("not found"));
+  } else {
+    if (tmp[0] == (tmp[2] ^ 0xff) &&
+        tmp[1] == (tmp[3] ^ 0xff)) {
+      rtc_state = RTC_OK;
+      uart_puts_P(PSTR("ok"));
+
+      /* Dummy RTC read to update the year if required */
+      struct tm time;
+      read_rtc(&time);
+    } else {
+      rtc_state = RTC_INVALID;
+      uart_puts_P(PSTR("invalid"));
+    }
+  }
+  uart_putcrlf();
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/rtc.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/rtc.c
new file mode 100644
index 00000000..59a06ba1
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/rtc.c
@@ -0,0 +1,16 @@
+#include <inttypes.h>
+#include "config.h"
+#include "time.h"
+#include "rtc.h"
+
+uint32_t get_fattime(void) {
+  struct tm time;
+
+  read_rtc(&time);
+  return ((uint32_t)time.tm_year-80) << 25 |
+    ((uint32_t)time.tm_mon+1) << 21 |
+    ((uint32_t)time.tm_mday)  << 16 |
+    ((uint32_t)time.tm_hour)  << 11 |
+    ((uint32_t)time.tm_min)   << 5  |
+    ((uint32_t)time.tm_sec)   >> 1;
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/rtc.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/rtc.h
new file mode 100644
index 00000000..c77c2c6c
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/rtc.h
@@ -0,0 +1,62 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   rtc.h: Definitions for RTC support
+
+   There is no rtc.c, the functions defined here are implemented by a
+   device-specific .c file, e.g. pcf8583.c.
+
+*/
+
+#ifndef RTC_H
+#define RTC_H
+
+typedef enum {
+  RTC_NOT_FOUND,  /* No RTC present                    */
+  RTC_INVALID,    /* RTC present, but contents invalid */
+  RTC_OK          /* RTC present and working           */
+} rtcstate_t;
+
+# if CONFIG_RTC_VARIANT > 0
+
+extern rtcstate_t rtc_state;
+
+void rtc_init(void);
+
+/* Return current time in struct tm */
+void read_rtc(struct tm *time);
+
+/* Set time from struct tm */
+void set_rtc(struct tm *time);
+
+#  if CONFIG_RTC_VARIANT == 1
+void increment_rtc(void);
+#  endif
+# else  // CONFIG_RTC_VARIANT
+
+#  define rtc_state RTC_NOT_FOUND
+
+#  define rtc_init()    do {} while(0)
+
+# endif // CONFIG_RTC_VARIANT
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/sd2iec.geany b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/sd2iec.geany
new file mode 100644
index 00000000..4ed985d5
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/sd2iec.geany
@@ -0,0 +1,29 @@
+
+[file_prefs]
+final_new_line=true
+ensure_convert_new_lines=false
+strip_trailing_spaces=false
+replace_tabs=false
+
+[indentation]
+indent_width=4
+indent_type=1
+indent_hard_tab_width=8
+detect_indent=false
+detect_indent_width=false
+indent_mode=2
+
+[project]
+name=sd2iec
+base_path=C:\\Users\\q242695\\AVRProjects\\sd2iec\\src\\sd2iec-0.10.3
+description=
+
+[long line marker]
+long_line_behaviour=1
+long_line_column=72
+
+[files]
+current_page=0
+FILE_NAME_0=760;C;0;EUTF-8;1;1;0;C%3A%5CUsers%5Cq242695%5CAVRProjects%5Csd2iec%5Csrc%5Csd2iec-0.10.3%5Cmain.c;0;4
+FILE_NAME_1=14338;Make;0;EUTF-8;1;1;0;C%3A%5CUsers%5Cq242695%5CAVRProjects%5Csd2iec%5Csrc%5Csd2iec-0.10.3%5CMakefile;0;4
+FILE_NAME_2=1246;Conf;0;EUTF-8;1;1;0;C%3A%5CUsers%5Cq242695%5CAVRProjects%5Csd2iec%5Csrc%5Csd2iec-0.10.3%5Cconfig;0;4
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/sdcard.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/sdcard.c
new file mode 100644
index 00000000..ee73a660
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/sdcard.c
@@ -0,0 +1,738 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   sdcard.c: SD/MMC access routines
+
+   Extended, optimized and cleaned version of code from MMC2IEC,
+   original copyright header follows:
+
+//
+// Title        : SD/MMC Card driver
+// Author       : Lars Pontoppidan, Aske Olsson, Pascal Dufour,
+// Date         : Jan. 2006
+// Version      : 0.42
+// Target MCU   : Atmel AVR Series
+//
+// CREDITS:
+// This module is developed as part of a project at the technical univerisity of
+// Denmark, DTU.
+//
+// DESCRIPTION:
+// This SD card driver implements the fundamental communication with a SD card.
+// The driver is confirmed working on 8 MHz and 14.7456 MHz AtMega32 and has
+// been tested successfully with a large number of different SD and MMC cards.
+//
+// DISCLAIMER:
+// The author is in no way responsible for any problems or damage caused by
+// using this code. Use at your own risk.
+//
+// LICENSE:
+// This code is distributed under the GNU Public License
+// which can be found at http://www.gnu.org/licenses/gpl.txt
+//
+
+  The exported functions in this file are weak-aliased to their corresponding
+  versions defined in diskio.h so when this file is the only diskio provider
+  compiled in they will be automatically used by the linker.
+
+*/
+
+#include <avr/io.h>
+#include <avr/interrupt.h>
+#include <avr/pgmspace.h>
+#include <util/crc16.h>
+#include "config.h"
+#include "avrcompat.h"
+#include "crc7.h"
+#include "diskio.h"
+#include "spi.h"
+#include "timer.h"
+#include "uart.h"
+#include "sdcard.h"
+
+#ifdef CONFIG_TWINSD
+#  define MAX_CARDS 2
+#else
+#  define MAX_CARDS 1
+#endif
+
+// SD/MMC commands
+#define GO_IDLE_STATE           0
+#define SEND_OP_COND            1
+#define SWITCH_FUNC             6
+#define SEND_IF_COND            8
+#define SEND_CSD                9
+#define SEND_CID               10
+#define STOP_TRANSMISSION      12
+#define SEND_STATUS            13
+#define SET_BLOCKLEN           16
+#define READ_SINGLE_BLOCK      17
+#define READ_MULTIPLE_BLOCK    18
+#define WRITE_BLOCK            24
+#define WRITE_MULTIPLE_BLOCK   25
+#define PROGRAM_CSD            27
+#define SET_WRITE_PROT         28
+#define CLR_WRITE_PROT         29
+#define SEND_WRITE_PROT        30
+#define ERASE_WR_BLK_STAR_ADDR 32
+#define ERASE_WR_BLK_END_ADDR  33
+#define ERASE                  38
+#define LOCK_UNLOCK            42
+#define APP_CMD                55
+#define GEN_CMD                56
+#define READ_OCR               58
+#define CRC_ON_OFF             59
+
+// SD ACMDs
+#define SD_STATUS                 13
+#define SD_SEND_NUM_WR_BLOCKS     22
+#define SD_SET_WR_BLK_ERASE_COUNT 23
+#define SD_SEND_OP_COND           41
+#define SD_SET_CLR_CARD_DETECT    42
+#define SD_SEND_SCR               51
+
+// R1 status bits
+#define STATUS_IN_IDLE          1
+#define STATUS_ERASE_RESET      2
+#define STATUS_ILLEGAL_COMMAND  4
+#define STATUS_CRC_ERROR        8
+#define STATUS_ERASE_SEQ_ERROR 16
+#define STATUS_ADDRESS_ERROR   32
+#define STATUS_PARAMETER_ERROR 64
+
+
+/* Card types - cardtype == 0 is MMC */
+#define CARD_SD   (1<<0)
+#define CARD_SDHC (1<<1)
+
+static uint8_t cardtype[MAX_CARDS];
+
+/**
+ * getbits - read value from bit buffer
+ * @buffer: pointer to the data buffer
+ * @start : index of the first bit in the value
+ * @bits  : number of bits in the value
+ *
+ * This function returns a value from the memory region passed as
+ * buffer, starting with bit "start" and "bits" bit long. The buffer
+ * is assumed to be MSB first, passing 0 for start will read starting
+ * from the highest-value bit of the first byte of the buffer.
+ */
+static uint32_t getbits(void *buffer, uint16_t start, int8_t bits) {
+  uint8_t *buf = buffer;
+  uint32_t result = 0;
+
+  if ((start % 8) != 0) {
+    /* Unaligned start */
+    result += buf[start / 8] & (0xff >> (start % 8));
+    bits  -= 8 - (start % 8);
+    start += 8 - (start % 8);
+  }
+  while (bits >= 8) {
+    result = (result << 8) + buf[start / 8];
+    start += 8;
+    bits -= 8;
+  }
+  if (bits > 0) {
+    result = result << bits;
+    result = result + (buf[start / 8] >> (8-bits));
+  } else if (bits < 0) {
+    /* Fraction of a single byte */
+    result = result >> -bits;
+  }
+  return result;
+}
+
+/**
+ * wait_for_response - waits for a response from the SD card
+ * @expected: expected data byte (0 for anything != 0)
+ *
+ * This function waits until reading from the SD card returns the
+ * byte in expected or until reading returns a non-zero byte if
+ * expected is 0. Returns false if the expected response wasn't
+ * received within 500ms or true if it was.
+ */
+static uint8_t wait_for_response(uint8_t expected) {
+  tick_t timeout = getticks() + HZ/2;
+
+  while (time_before(getticks(), timeout)) {
+    uint8_t byte = spiTransferByte(0xff);
+
+    if (expected == 0 && byte != 0)
+      return 1;
+
+    if (expected != 0 && byte == expected)
+      return 1;
+  }
+
+  return 0;
+}
+
+static void deselectCard(uint8_t card) {
+  // Send 8 clock cycles
+  SPI_SS_HIGH(card);
+  spiTransferByte(0xff);
+}
+
+/**
+ * sendCommand - send a command to the SD card
+ * @card     : card number to be accessed
+ * @command  : command to be sent
+ * @parameter: parameter to be sent
+ * @deselect : Flags if the card should be deselected afterwards
+ *
+ * This function calculates the correct CRC7 for the command and
+ * parameter and transmits all of it to the SD card. If requested
+ * the card will be deselected afterwards.
+ */
+static int sendCommand(const uint8_t  card,
+                       const uint8_t  command,
+                       const uint32_t parameter,
+                       const uint8_t  deselect) {
+  union {
+    uint32_t l;
+    uint8_t  c[4];
+  } long2char;
+
+  uint8_t i,crc,errorcount;
+  tick_t  timeout;
+
+  long2char.l = parameter;
+  crc = crc7update(0  , 0x40+command);
+  crc = crc7update(crc, long2char.c[3]);
+  crc = crc7update(crc, long2char.c[2]);
+  crc = crc7update(crc, long2char.c[1]);
+  crc = crc7update(crc, long2char.c[0]);
+  crc = (crc << 1) | 1;
+
+  errorcount = 0;
+  while (errorcount < CONFIG_SD_AUTO_RETRIES) {
+    // Select card
+    SPI_SS_LOW(card);
+#ifdef CONFIG_TWINSD
+    if (card == 0 && command == GO_IDLE_STATE)
+      /* Force both cards to SPI mode simultaneously */
+      SPI_SS_LOW(1);
+#endif
+
+    // Transfer command
+    spiTransferByte(0x40+command);
+    spiTransferLong(parameter);
+    spiTransferByte(crc);
+
+    // Wait for a valid response
+    timeout = getticks() + HZ/2;
+    do {
+      i = spiTransferByte(0xff);
+    } while (i & 0x80 && time_before(getticks(), timeout));
+
+#ifdef CONFIG_TWINSD
+    if (card == 0 && command == GO_IDLE_STATE)
+      SPI_SS_HIGH(1);
+#endif
+
+    // Check for CRC error
+    // can't reliably retry unless deselect is allowed
+    if (deselect && (i & STATUS_CRC_ERROR)) {
+      uart_putc('x');
+      deselectCard(card);
+      errorcount++;
+      continue;
+    }
+
+    if (deselect) deselectCard(card);
+    break;
+  }
+
+  return i;
+}
+
+// Extended init sequence for SDHC support
+static uint8_t extendedInit(const uint8_t card) {
+  uint8_t  i;
+  uint32_t answer;
+
+  // Send CMD8: SEND_IF_COND
+  //   0b000110101010 == 2.7-3.6V supply, check pattern 0xAA
+  i = sendCommand(card, SEND_IF_COND, 0b000110101010, 0);
+  if (i > 1) {
+    // Card returned an error, ok (MMC oder SD1.x) but not SDHC
+    deselectCard(card);
+    return 1;
+  }
+
+  // No error, continue SDHC initialization
+  answer = spiTransferLong(0);
+  deselectCard(card);
+
+  if (((answer >> 8) & 0x0f) != 0b0001) {
+    // Card didn't accept our voltage specification
+    return 0;
+  }
+
+  // Verify echo-back of check pattern
+  if ((answer & 0xff) != 0b10101010) {
+    // Check pattern mismatch, working but not SD2.0 compliant
+    // The specs say we should not use the card, but let's try anyway.
+    return 1;
+  }
+
+  return 1;
+}
+
+// SD common initialisation
+static void sdInit(const uint8_t card) {
+  uint8_t i;
+  uint16_t counter;
+
+  counter = 0xffff;
+  do {
+    // Prepare for ACMD, send CMD55: APP_CMD
+    i = sendCommand(card, APP_CMD, 0, 1);
+    if (i > 1) {
+      // Command not accepted, could be MMC
+      return;
+    }
+
+    // Send ACMD41: SD_SEND_OP_COND
+    //   1L<<30 == Host has High Capacity Support
+    i = sendCommand(card, SD_SEND_OP_COND, 1L<<30, 1);
+    // Repeat while card card accepts command but isn't ready
+  } while (i == 1 && --counter > 0);
+
+  // Ignore failures, there is at least one Sandisk MMC card
+  // that accepts CMD55, but not ACMD41.
+  if (i == 0)
+    /* We know that a card is SD if ACMD41 was accepted. */
+    cardtype[card] |= CARD_SD;
+}
+
+/* Detect changes of SD card 0 */
+#ifdef SD_CHANGE_VECT
+ISR(SD_CHANGE_VECT) {
+  if (SDCARD_DETECT)
+    disk_state = DISK_CHANGED;
+  else
+    disk_state = DISK_REMOVED;
+}
+#endif
+
+#ifdef CONFIG_TWINSD
+/* Detect changes of SD card 1 */
+ISR(SD2_CHANGE_VECT) {
+  if (SD2_DETECT)
+    disk_state = DISK_CHANGED;
+  else
+    disk_state = DISK_REMOVED;
+}
+#endif
+
+//
+// Public functions
+//
+void sd_init(void) {
+  SDCARD_DETECT_SETUP();
+  SDCARD_WP_SETUP();
+  SD_CHANGE_SETUP();
+#ifdef CONFIG_TWINSD
+  /* Initialize the control lines for card 2 */
+  SD2_SETUP();
+  SD2_CHANGE_SETUP();
+#endif
+}
+void disk_init(void) __attribute__ ((weak, alias("sd_init")));
+
+
+DSTATUS sd_status(BYTE drv) {
+#ifdef CONFIG_TWINSD
+  if (drv != 0) {
+    if (SD2_DETECT) {
+      if (SD2_PIN & SD2_WP) {
+        return STA_PROTECT;
+      } else {
+        return RES_OK;
+      }
+    } else {
+      return STA_NOINIT|STA_NODISK;
+    }
+  } else
+#endif
+  if (SDCARD_DETECT)
+    if (SDCARD_WP)
+      return STA_PROTECT;
+    else
+      return RES_OK;
+  else
+    return STA_NOINIT|STA_NODISK;
+}
+DSTATUS disk_status(BYTE drv) __attribute__ ((weak, alias("sd_status")));
+
+
+/**
+ * sd_initialize - initialize SD card
+ * @drv   : drive
+ *
+ * This function tries to initialize the selected SD card.
+ */
+DSTATUS sd_initialize(BYTE drv) {
+  uint8_t  i;
+  uint16_t counter;
+  uint32_t answer;
+
+  if (drv >= MAX_CARDS)
+    return STA_NOINIT|STA_NODISK;
+
+  /* Don't bother initializing a card that isn't there */
+  if (sd_status(drv) & STA_NODISK)
+    return sd_status(drv);
+
+  /* JLB: Should be in sd_init, but some uIEC versions have
+   * IEC lines tied to SPI, so I moved it here to resolve the
+   * conflict.
+   */
+  spiInit();
+
+  disk_state = DISK_ERROR;
+
+  cardtype[drv] = 0;
+
+  SPI_SS_HIGH(drv);
+
+  // Send 80 clks
+  for (i=0; i<10; i++) {
+    spiTransferByte(0xFF);
+  }
+
+  // Reset card
+  i = sendCommand(drv, GO_IDLE_STATE, 0, 1);
+  if (i != 1) {
+    return STA_NOINIT | STA_NODISK;
+  }
+
+  if (!extendedInit(drv))
+    return STA_NOINIT | STA_NODISK;
+
+  sdInit(drv);
+
+  counter = 0xffff;
+  // According to the spec READ_OCR should work at this point
+  // without retries. One of my Sandisk-cards thinks otherwise.
+  do {
+    // Send CMD58: READ_OCR
+    i = sendCommand(drv, READ_OCR, 0, 0);
+    if (i > 1)
+      deselectCard(drv);
+  } while (i > 1 && counter-- > 0);
+
+  if (counter > 0) {
+    answer = spiTransferLong(0);
+
+    // See if the card likes our supply voltage
+    if (!(answer & SD_SUPPLY_VOLTAGE)) {
+      // The code isn't set up to completely ignore the card,
+      // but at least report it as nonworking
+      deselectCard(drv);
+      return STA_NOINIT | STA_NODISK;
+    }
+
+    // See what card we've got
+    if (answer & 0x40000000) {
+      cardtype[drv] |= CARD_SDHC;
+    }
+  }
+
+  // Keep sending CMD1 (SEND_OP_COND) command until zero response
+  counter = 0xffff;
+  do {
+    i = sendCommand(drv, SEND_OP_COND, 1L<<30, 1);
+    counter--;
+  } while (i != 0 && counter > 0);
+
+  if (counter==0) {
+    return STA_NOINIT | STA_NODISK;
+  }
+
+#ifdef CONFIG_SD_DATACRC
+  // Enable CRC checking
+  // The SD spec says that the host "should" send CRC_ON_OFF before ACMD_SEND_OP_COND.
+  // The MMC manual I have says that CRC_ON_OFF isn't allowed before SEND_OP_COND.
+  // Let's just hope that all SD cards work with this order. =(
+  i = sendCommand(drv, CRC_ON_OFF, 1, 1);
+  if (i > 1) {
+    return STA_NOINIT | STA_NODISK;
+  }
+#endif
+
+  // Send MMC CMD16(SET_BLOCKLEN) to 512 bytes
+  i = sendCommand(drv, SET_BLOCKLEN, 512, 1);
+  if (i != 0) {
+    return STA_NOINIT | STA_NODISK;
+  }
+
+  // Thats it!
+  disk_state = DISK_OK;
+  return sd_status(drv);
+}
+DSTATUS disk_initialize(BYTE drv) __attribute__ ((weak, alias("sd_initialize")));
+
+
+/**
+ * sd_read - reads sectors from the SD card to buffer
+ * @drv   : drive
+ * @buffer: pointer to the buffer
+ * @sector: first sector to be read
+ * @count : number of sectors to be read
+ *
+ * This function reads count sectors from the SD card starting
+ * at sector to buffer. Returns RES_ERROR if an error occured or
+ * RES_OK if successful. Up to SD_AUTO_RETRIES will be made if
+ * the calculated data CRC does not match the one sent by the
+ * card. If there were errors during the command transmission
+ * disk_state will be set to DISK_ERROR and no retries are made.
+ */
+DRESULT sd_read(BYTE drv, BYTE *buffer, DWORD sector, BYTE count) {
+  uint8_t sec,res,tmp,errorcount;
+  uint16_t crc,recvcrc;
+
+  if (drv >= MAX_CARDS)
+    return RES_PARERR;
+
+  for (sec=0;sec<count;sec++) {
+    errorcount = 0;
+    while (errorcount < CONFIG_SD_AUTO_RETRIES) {
+      if (cardtype[drv] & CARD_SDHC)
+        res = sendCommand(drv, READ_SINGLE_BLOCK, sector+sec, 0);
+      else
+        res = sendCommand(drv, READ_SINGLE_BLOCK, (sector+sec) << 9, 0);
+
+      if (res != 0) {
+        SPI_SS_HIGH(drv);
+        disk_state = DISK_ERROR;
+        return RES_ERROR;
+      }
+
+      // Wait for data token
+      if (!wait_for_response(0xFE)) {
+        SPI_SS_HIGH(drv);
+        disk_state = DISK_ERROR;
+        return RES_ERROR;
+      }
+
+      uint16_t i;
+#ifdef CONFIG_SD_DATACRC
+      BYTE *oldbuffer = buffer;
+#endif
+
+      // Get data
+      crc = 0;
+      // Initiate data exchange over SPI
+      SPDR = 0xff;
+
+      for (i=0; i<512; i++) {
+        // Wait until data has been received
+        loop_until_bit_is_set(SPSR, SPIF);
+        tmp = SPDR;
+        // Transmit the next byte while we store the current one
+        SPDR = 0xff;
+
+        *(buffer++) = tmp;
+#ifdef CONFIG_SD_DATACRC
+        crc = _crc_xmodem_update(crc, tmp);
+#endif
+      }
+      // Wait until the first CRC byte is received
+      loop_until_bit_is_set(SPSR, SPIF);
+
+      // Check CRC
+      recvcrc = (SPDR << 8) + spiTransferByte(0xff);
+#ifdef CONFIG_SD_DATACRC
+      if (recvcrc != crc) {
+        uart_putc('X');
+        deselectCard(drv);
+        errorcount++;
+        buffer = oldbuffer;
+        continue;
+      }
+#endif
+
+      break;
+    }
+    deselectCard(drv);
+
+    if (errorcount >= CONFIG_SD_AUTO_RETRIES) return RES_ERROR;
+  }
+
+  return RES_OK;
+}
+DRESULT disk_read(BYTE drv, BYTE *buffer, DWORD sector, BYTE count) __attribute__ ((weak, alias("sd_read")));
+
+
+
+/**
+ * sd_write - writes sectors from buffer to the SD card
+ * @drv   : drive
+ * @buffer: pointer to the buffer
+ * @sector: first sector to be written
+ * @count : number of sectors to be written
+ *
+ * This function writes count sectors from buffer to the SD card
+ * starting at sector. Returns RES_ERROR if an error occured,
+ * RES_WPRT if the card is currently write-protected or RES_OK
+ * if successful. Up to SD_AUTO_RETRIES will be made if the card
+ * signals a CRC error. If there were errors during the command
+ * transmission disk_state will be set to DISK_ERROR and no retries
+ * are made.
+ */
+DRESULT sd_write(BYTE drv, const BYTE *buffer, DWORD sector, BYTE count) {
+  uint8_t res,sec,errorcount,status;
+  uint16_t crc;
+
+  if (drv >= MAX_CARDS)
+    return RES_PARERR;
+
+#ifdef CONFIG_TWINSD
+  if (drv != 0) {
+    if (SD2_PIN & SD2_WP)
+      return RES_WRPRT;
+  } else
+#endif
+
+  if (SDCARD_WP) return RES_WRPRT;
+
+  for (sec=0;sec<count;sec++) {
+    errorcount = 0;
+    while (errorcount < CONFIG_SD_AUTO_RETRIES) {
+      if (cardtype[drv] & CARD_SDHC)
+        res = sendCommand(drv, WRITE_BLOCK, sector+sec, 0);
+      else
+        res = sendCommand(drv, WRITE_BLOCK, (sector+sec)<<9, 0);
+
+      if (res != 0) {
+        SPI_SS_HIGH(drv);
+        disk_state = DISK_ERROR;
+        return RES_ERROR;
+      }
+
+      // Send data token
+      spiTransferByte(0xFE);
+
+      uint16_t i;
+      const BYTE *oldbuffer = buffer;
+
+      // Send data
+      crc = 0;
+      for (i=0; i<512; i++) {
+#ifdef CONFIG_SD_DATACRC
+        crc = _crc_xmodem_update(crc, *buffer);
+#endif
+        spiTransferByte(*(buffer++));
+      }
+
+      // Send CRC
+      spiTransferByte(crc >> 8);
+      spiTransferByte(crc & 0xff);
+
+      // Get and check status feedback
+      status = spiTransferByte(0xFF);
+
+      // Retry if neccessary
+      if ((status & 0x0F) != 0x05) {
+        uart_putc('X');
+        deselectCard(drv);
+        errorcount++;
+        buffer = oldbuffer;
+        continue;
+      }
+
+      // Wait for write finish
+      if (!wait_for_response(0)) {
+        SPI_SS_HIGH(drv);
+        disk_state = DISK_ERROR;
+        return RES_ERROR;
+      }
+      break;
+    }
+    deselectCard(drv);
+
+    if (errorcount >= CONFIG_SD_AUTO_RETRIES) {
+      if (!(status & STATUS_CRC_ERROR))
+        disk_state = DISK_ERROR;
+      return RES_ERROR;
+    }
+  }
+
+  return RES_OK;
+}
+DRESULT disk_write(BYTE drv, const BYTE *buffer, DWORD sector, BYTE count) __attribute__ ((weak, alias("sd_write")));
+
+DRESULT sd_getinfo(BYTE drv, BYTE page, void *buffer) {
+  uint8_t i;
+  uint8_t buf[18];
+  uint32_t capacity;
+
+  if (drv >= MAX_CARDS)
+    return RES_NOTRDY;
+
+  if (sd_status(drv) & STA_NODISK)
+    return RES_NOTRDY;
+
+  if (page != 0)
+    return RES_ERROR;
+
+  /* Try to calculate the total number of sectors on the card */
+  /* FIXME: Write a generic data read function and merge with sd_read */
+  if (sendCommand(drv, SEND_CSD, 0, 0) != 0) {
+    deselectCard(drv);
+    return RES_ERROR;
+  }
+
+  /* Wait for data token */
+  if (!wait_for_response(0xfe)) {
+    deselectCard(drv);
+    return RES_ERROR;
+  }
+
+  for (i=0;i<18;i++) {
+    buf[i] = spiTransferByte(0xff);
+  }
+  deselectCard(drv);
+
+  if (cardtype[drv] & CARD_SDHC) {
+    /* Special CSD for SDHC cards */
+    capacity = (1 + getbits(buf,127-69,22)) * 1024;
+  } else {
+    /* Assume that MMC-CSD 1.0/1.1/1.2 and SD-CSD 1.1 are the same... */
+    uint8_t exponent = 2 + getbits(buf, 127-49, 3);
+    capacity = 1 + getbits(buf, 127-73, 12);
+    exponent += getbits(buf, 127-83,4) - 9;
+    while (exponent--) capacity *= 2;
+  }
+
+  diskinfo0_t *di = buffer;
+  di->validbytes  = sizeof(diskinfo0_t);
+  di->disktype    = DISK_TYPE_SD;
+  di->sectorsize  = 2;
+  di->sectorcount = capacity;
+
+  return RES_OK;
+}
+DRESULT disk_getinfo(BYTE drv, BYTE page, void *buffer) __attribute__ ((weak, alias("sd_getinfo")));
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/sdcard.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/sdcard.h
new file mode 100644
index 00000000..a948bc60
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/sdcard.h
@@ -0,0 +1,40 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   sdcard.h: Definitions for the SD/MMC access routines
+
+*/
+
+#ifndef SDCARD_H
+#define SDCARD_H
+
+#include "diskio.h"
+
+/* These functions are weak-aliased to disk_... */
+void    sd_init(void);
+DSTATUS sd_status(BYTE drv);
+DSTATUS sd_initialize(BYTE drv);
+DRESULT sd_read(BYTE drv, BYTE *buffer, DWORD sector, BYTE count);
+DRESULT sd_write(BYTE drv, const BYTE *buffer, DWORD sector, BYTE count);
+DRESULT sd_getinfo(BYTE drv, BYTE page, void *buffer);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/softi2c.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/softi2c.c
new file mode 100644
index 00000000..f7a5c70d
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/softi2c.c
@@ -0,0 +1,210 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   softi2c.c: Software I2C bus master
+
+*/
+
+#include <avr/io.h>
+#include <util/delay.h>
+#include "config.h"
+#include "i2c.h"
+
+#define SOFTI2C_SDA _BV(SOFTI2C_BIT_SDA)
+#define SOFTI2C_SCL _BV(SOFTI2C_BIT_SCL)
+
+static void set_scl(uint8_t x) {
+  if (x) {
+    SOFTI2C_DDR  &= (uint8_t)~SOFTI2C_SCL;
+    SOFTI2C_PORT |= SOFTI2C_SCL;
+    // Clock stretching
+    loop_until_bit_is_set(SOFTI2C_PIN, SOFTI2C_BIT_SCL);
+  } else {
+    SOFTI2C_DDR  |= SOFTI2C_SCL;
+    SOFTI2C_PORT &= (uint8_t)~SOFTI2C_SCL;
+  }
+}
+
+static void set_sda(uint8_t x) {
+  if (x) {
+    SOFTI2C_DDR  &= (uint8_t)~SOFTI2C_SDA;
+    SOFTI2C_PORT |= SOFTI2C_SDA;
+  } else {
+    SOFTI2C_DDR  |= SOFTI2C_SDA;
+    SOFTI2C_PORT &= (uint8_t)~SOFTI2C_SDA;
+  }
+}
+
+
+static void start_condition(void) {
+  set_sda(1);
+  set_scl(1);
+  _delay_us(SOFTI2C_DELAY);
+  set_sda(0);
+  _delay_us(SOFTI2C_DELAY);
+  set_scl(0);
+}
+
+static void stop_condition(void) {
+  set_sda(0);
+  _delay_us(SOFTI2C_DELAY);
+  set_scl(1);
+  _delay_us(SOFTI2C_DELAY);
+  set_sda(1);
+  _delay_us(SOFTI2C_DELAY);
+}
+
+/* Returns value of the acknowledge bit */
+static uint8_t i2c_send_byte(uint8_t value) {
+  uint8_t i;
+
+  for (i=8;i!=0;i--) {
+    set_scl(0);
+    _delay_us(SOFTI2C_DELAY/2);
+    set_sda(value & 128);
+    _delay_us(SOFTI2C_DELAY/2);
+    set_scl(1);
+    _delay_us(SOFTI2C_DELAY);
+    value <<= 1;
+  }
+  set_scl(0);
+  _delay_us(SOFTI2C_DELAY/2);
+  set_sda(1);
+  _delay_us(SOFTI2C_DELAY/2);
+  set_scl(1);
+  _delay_us(SOFTI2C_DELAY/2);
+  i = !!(SOFTI2C_PIN & SOFTI2C_SDA);
+  _delay_us(SOFTI2C_DELAY/2);
+  set_scl(0);
+
+  return i;
+}
+
+/* Returns value of the byte read */
+static uint8_t i2c_recv_byte(uint8_t sendack) {
+  uint8_t i;
+  uint8_t value = 0;
+
+  set_sda(1);
+  _delay_us(SOFTI2C_DELAY/2);
+  for (i=8;i!=0;i--) {
+    _delay_us(SOFTI2C_DELAY/2);
+    set_scl(1);
+    _delay_us(SOFTI2C_DELAY/2);
+    value = (value << 1) + !!(SOFTI2C_PIN & SOFTI2C_SDA);
+    _delay_us(SOFTI2C_DELAY/2);
+    set_scl(0);
+    _delay_us(SOFTI2C_DELAY/2);
+  }
+  set_sda(!sendack);
+  _delay_us(SOFTI2C_DELAY/2);
+  set_scl(1);
+  _delay_us(SOFTI2C_DELAY);
+  set_scl(0);
+  set_sda(1);
+
+  return value;
+}
+
+/* Returns 1 if there was no ACK to the address */
+uint8_t i2c_write_register(uint8_t address, uint8_t reg, uint8_t val) {
+  start_condition();
+  if (i2c_send_byte(address)) {
+    stop_condition();
+    return 1;
+  }
+  i2c_send_byte(reg);
+  i2c_send_byte(val);
+  stop_condition();
+  return 0;
+}
+
+/* Returns 1 if there was no ACK to the address */
+uint8_t i2c_write_registers(uint8_t address, uint8_t startreg, uint8_t count, const void *data) {
+  uint8_t i;
+
+  start_condition();
+  if (i2c_send_byte(address)) {
+    stop_condition();
+    return 1;
+  }
+  i2c_send_byte(startreg);
+  for (i=0;i<count;i++)
+    i2c_send_byte(((uint8_t *)data)[i]);
+  stop_condition();
+  return 0;
+}
+
+/* Returns -1 if there was no ACK to the address, register contents otherwise */
+int16_t i2c_read_register(uint8_t address, uint8_t reg) {
+  uint8_t val;
+
+  start_condition();
+  if (i2c_send_byte(address)) {
+    stop_condition();
+    return -1;
+  }
+  i2c_send_byte(reg);
+  start_condition();
+  if (i2c_send_byte(address|1)) {
+    stop_condition();
+    return -1;
+  }
+  val = i2c_recv_byte(0);
+  stop_condition();
+  return val;
+}
+
+/* Returns 1 if there was no ACK to the address */
+uint8_t i2c_read_registers(uint8_t address, uint8_t startreg, uint8_t count, void *data) {
+  uint8_t i;
+
+  start_condition();
+  if (i2c_send_byte(address)) {
+    stop_condition();
+    return 1;
+  }
+  i2c_send_byte(startreg);
+  start_condition();
+  if (i2c_send_byte(address|1)) {
+    stop_condition();
+    return 1;
+  }
+  for (i=0;i<count-1;i++)
+    ((uint8_t *)data)[i] = i2c_recv_byte(1);
+  ((uint8_t *)data)[i] = i2c_recv_byte(0);
+  stop_condition();
+  return 0;
+}
+
+void i2c_init(void) {
+  /* Set I2C pins to input -> high with external pullups */
+  SOFTI2C_DDR  &= (uint8_t)~(SOFTI2C_SCL|SOFTI2C_SDA);
+  SOFTI2C_PORT &= (uint8_t)~(SOFTI2C_SCL|SOFTI2C_SDA);
+  /* Enable pullup on the interrupt line */
+#ifdef SOFTI2C_BIT_INTRQ
+  SOFTI2C_PORT |= _BV(SOFTI2C_BIT_INTRQ);
+#endif
+
+  set_sda(1);
+  set_scl(1);
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/softrtc.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/softrtc.c
new file mode 100644
index 00000000..41a900cf
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/softrtc.c
@@ -0,0 +1,147 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   softrtc.c: RTC support for non-RTC designs
+
+   This file implements the functions defined in rtc.h.
+
+*/
+
+#include <inttypes.h>
+#include <avr/interrupt.h>
+#include <avr/pgmspace.h>
+#include <util/atomic.h>
+#include "config.h"
+#include "time.h"
+#include "rtc.h"
+#include "uart.h"
+
+static volatile uint8_t ms;
+static time_t rtc = 1217647125; // Sat Aug  2 03:18:45 2008 UTC
+rtcstate_t rtc_state;
+static PROGMEM uint8_t month_days[12] = {
+  31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
+};
+
+#define days_in_year(a)   (is_leap(a) ? 366 : 365)
+#define days_in_month(a)  (pgm_read_byte(month_days + a))
+#define is_leap(year) \
+  ((year) % 4 == 0 && ((year) % 100 != 0 || (year) % 400 == 0))
+
+/* Minimal <time> functionality */
+
+// mktime copied code from Linux kernel source kernel/time.c, ca. 2.6.20
+
+/* Converts Gregorian date to seconds since 1970-01-01 00:00:00.
+ * Assumes input in normal date format, i.e. 1980-12-31 23:59:59
+ * => year=1980, mon=12, day=31, hour=23, min=59, sec=59.
+ *
+ * [For the Julian calendar (which was used in Russia before 1917,
+ * Britain & colonies before 1752, anywhere else before 1582,
+ * and is still in use by some communities) leave out the
+ * -year/100+year/400 terms, and add 10.]
+ *
+ * This algorithm was first published by Gauss (I think).
+ *
+ * WARNING: this function will overflow on 2106-02-07 06:28:16 on
+ * machines were long is 32-bit! (However, as time_t is signed, we
+ * will already get problems at other places on 2038-01-19 03:14:08)
+ */
+static time_t mktime(struct tm *tm)
+{
+  uint8_t mon = tm->tm_mon + 1;
+  uint16_t year = tm->tm_year + 1900;
+
+  if (0 >= (int) (mon -= 2)) {  /* 1..12 -> 11,12,1..10 */
+    mon += 12;  /* Puts Feb last since it has leap day */
+    year -= 1;
+  }
+  return (((
+      (uint32_t)(year/4 - year/100 + year/400 + 367*mon/12 + tm->tm_mday) +
+        (uint32_t)year*365 - 719499
+      )*24 + tm->tm_hour /* now have hours */
+     )*60 + tm->tm_min /* now have minutes */
+    )*60 + tm->tm_sec; /* finally seconds */
+}
+
+static void gmtime(time_t *t, struct tm * tm)
+{
+  uint32_t    tim = *t;
+  uint16_t    i;
+
+  tm->tm_sec=tim%60;
+  tim/=60; // now it is minutes
+  tm->tm_min=tim%60;
+  tim/=60; // now it is hours
+  tm->tm_hour=tim%24;
+  tim/=24; // now it is days
+  tm->tm_wday=(tim+4)%7;
+
+  /* Number of years in days */
+  for (i = 1970; tim >= days_in_year(i); i++)
+    tim -= days_in_year(i);
+  tm->tm_year = i - 1900;
+
+  /* Number of months in days left */
+  for (i = 0; tim >= days_in_month(i); i++) {
+    tim -= days_in_month(i);
+    if(i == 1 && is_leap(tm->tm_year))
+      tim-= 1;
+  }
+  tm->tm_mon = i;
+
+  /* Days are what is left over (+1) from all that. */
+  tm->tm_mday = tim + 1;
+}
+
+/* Public functions */
+
+void increment_rtc(void) {
+  ms++;
+  if(ms == 100) {
+    rtc++;
+    ms = 0;
+  }
+}
+
+/* Read the current time from the RTC */
+void read_rtc(struct tm *time) {
+  time_t t;
+
+  ATOMIC_BLOCK( ATOMIC_FORCEON ) {
+    t = rtc;
+  }
+  gmtime(&t,time);
+}
+
+/* Set the time in the RTC */
+void set_rtc(struct tm *time) {
+  time_t t = mktime(time);
+
+  ATOMIC_BLOCK( ATOMIC_FORCEON ) {
+    rtc = t;
+  }
+}
+
+void rtc_init(void) {
+  rtc_state = RTC_OK;
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/spi.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/spi.c
new file mode 100644
index 00000000..95c46114
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/spi.c
@@ -0,0 +1,131 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   spi.c: Low level SPI access
+
+   Extended, optimized and cleaned version of code from MMC2IEC,
+   original copyright header follows:
+
+//
+// Title        : SPI module
+// Author       : Lars Pontoppidan
+// Date         : January, 2007
+// Version      : 1.03
+// Target MCU   : Atmel AVR Series
+//
+// DESCRIPTION:
+// This module implements initialization, sending and receiving bytes using
+// hardware SPI on an AVR.
+//
+// DISCLAIMER:
+// The author is in no way responsible for any problems or damage caused by
+// using this code. Use at your own risk.
+//
+// LICENSE:
+// This code is distributed under the GNU Public License
+// which can be found at http://www.gnu.org/licenses/gpl.txt
+//
+
+*/
+
+// FIXME: Integrate into sdcard.c
+
+#include <avr/io.h>
+#include "avrcompat.h"
+#include "spi.h"
+
+// access routines
+void spiInit(void)
+{
+  uint8_t dummy;
+
+  // setup SPI I/O pins
+  SPI_PORT = (SPI_PORT & ~SPI_MASK) | SPI_SCK | SPI_SS | SPI_MISO;
+  SPI_DDR  = (SPI_DDR  & ~SPI_MASK) | SPI_SCK | SPI_SS | SPI_MOSI;
+
+  // setup SPI interface:
+  //   interrupts disabled, SPI enabled, MSB first, master mode,
+  //   leading edge rising, sample on leading edge, clock = f/16,
+  SPCR = 0b01010001;
+
+  // Enable SPI double speed mode -> clock = f/8
+  SPSR = _BV(SPI2X);
+
+  // clear status
+  dummy = SPSR;
+
+  // clear recieve buffer
+  dummy = SPDR;
+}
+
+
+uint8_t spiTransferByte(uint8_t data)
+{
+  // send the given data
+  SPDR = data;
+
+  // wait for transfer to complete
+  loop_until_bit_is_set(SPSR, SPIF);
+  // *** reading of the SPSR and SPDR are crucial
+  // *** to the clearing of the SPIF flag
+  // *** in non-interrupt mode
+
+  // return the received data
+  return SPDR;
+}
+
+
+uint32_t spiTransferLong(const uint32_t data)
+{
+  // It seems to be necessary to use the union in order to get efficient
+  // assembler code.
+  // Beware, endian unsafe union
+  union {
+    uint32_t l;
+    uint8_t  c[4];
+  } long2char;
+
+  long2char.l = data;
+
+  // send the given data
+  SPDR = long2char.c[3];
+  // wait for transfer to complete
+  loop_until_bit_is_set(SPSR, SPIF);
+  long2char.c[3] = SPDR;
+
+  SPDR = long2char.c[2];
+  // wait for transfer to complete
+  loop_until_bit_is_set(SPSR, SPIF);
+  long2char.c[2] = SPDR;
+
+  SPDR = long2char.c[1];
+  // wait for transfer to complete
+  loop_until_bit_is_set(SPSR, SPIF);
+  long2char.c[1] = SPDR;
+
+  SPDR = long2char.c[0];
+  // wait for transfer to complete
+  loop_until_bit_is_set(SPSR, SPIF);
+  long2char.c[0] = SPDR;
+
+  return long2char.l;
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/spi.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/spi.h
new file mode 100644
index 00000000..04127c11
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/spi.h
@@ -0,0 +1,68 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   spi.h: Definitions for the low-level SPI routines
+
+   Based on original code by Lars Pontoppidan et al., see spi.c
+   for full copyright details.
+
+*/
+
+#ifndef SPI_H
+#define SPI_H
+
+// function prototypes
+
+// SPI interface initializer
+void spiInit(void);
+
+// spiTransferByte(u08 data) waits until the SPI interface is ready
+// and then sends a single byte over the SPI port.  The function also
+// returns the byte that was received during transmission.
+uint8_t spiTransferByte(uint8_t data);
+
+// spiTransferLong(u08 data) waits until the SPI interface is ready
+// and then sends the long with MSB first over the SPI port.
+uint32_t spiTransferLong(uint32_t data);
+
+// Macros for setting slave select:
+#ifdef CONFIG_TWINSD
+# define SPI_SS_HIGH(card) do { \
+    if (card == 0) {            \
+      SPI_PORT |= SPI_SS;       \
+    } else {                    \
+      SD2_PORT |= SD2_CS;       \
+    }                           \
+  } while (0)
+#define SPI_SS_LOW(card) do {       \
+    if (card == 0) {                \
+      SPI_PORT &= (uint8_t)~SPI_SS; \
+    } else {                        \
+      SD2_PORT &= (uint8_t)~SD2_CS; \
+    }                               \
+  } while (0)
+#else
+# define SPI_SS_HIGH(card)  SPI_PORT |= SPI_SS
+# define SPI_SS_LOW(card)   SPI_PORT &= (uint8_t)~SPI_SS
+#endif
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/src2doxy.pl b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/src2doxy.pl
new file mode 100644
index 00000000..466a6ab3
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/src2doxy.pl
@@ -0,0 +1,75 @@
+#!/usr/bin/perl -w -i~
+
+# src2doxy.pl - create doxygen-compatible comments from readable C source
+# Copyright (C) 2008  Ingo Korb <ingo@akana.de>
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License only.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+# This script parses a subset of kernel-doc style comments and rewrites
+# them as something doxygen will understand.
+use strict;
+
+my $incomment = 0;
+my $inspecialcomment = 0;
+my @postcomment = ();
+my @outputstack;
+
+while (<>) {
+    my $filename;
+    ($filename = $ARGV) =~ s!.*/!!;
+
+    chomp;
+    s/\r$//;
+    s/\s+$//;
+
+    # doxygen is too stupid to understand after-the-variable comments
+    # without external help. WARNING: Will substitute within strings!
+    s!([^ \t]\s+)/// !$1///< !;
+    
+    $incomment = 1 if m!^/\*!;
+    if (m!^/\*\*$!) {
+        $inspecialcomment = 1;
+        # Kill output
+        $_ = "";
+        next;
+    }
+
+    if ($incomment) {
+        if (m!\*/$!) {
+            # End of comment
+            $incomment = 0;
+            $inspecialcomment = 0;
+            @outputstack = @postcomment;
+            @postcomment = ();
+        } elsif (/$filename:\s+(.*).?\s*$/) {
+            # Add file description
+            push @postcomment, "\n/*! \\file $ARGV\n * \\brief $1. */\n";
+        }
+        if ($inspecialcomment == 1) {
+            # First line of special comment: Brief description
+            $inspecialcomment = 2;
+            m/^\s*\*\s*((struct |union )?[^: \t]+):?\s+-?\s*(.*)\s*$/;
+            $_ = "/*! \\brief $3\n *";
+        } elsif ($inspecialcomment == 2) {
+            # Modify parameters
+            s/\@([^: \t]+)\s*:\s+(.*)\s*$/\\param $1 $2/;
+        }
+    }
+} continue {
+    print "$_\n";
+    while (scalar(@outputstack)) {
+        print shift @outputstack,"\n";
+    }
+}
+
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/time.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/time.h
new file mode 100644
index 00000000..2ee8803e
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/time.h
@@ -0,0 +1,16 @@
+#ifndef TIME_H
+#define TIME_H
+
+typedef uint32_t time_t;
+struct tm {
+  uint8_t tm_sec;  // 0..59
+  uint8_t tm_min;  // 0..59
+  uint8_t tm_hour; // 0..23
+  uint8_t tm_mday; // 1..[28..31]
+  uint8_t tm_mon;  // 0..11
+  uint8_t tm_year; // since 1900, i.e. 2000 is 100
+  uint8_t tm_wday; // 0 to 6, sunday is 6
+  // A Unix struct tm has a few more fields we don't need in this application
+};
+
+#endif	/* TIME_H */
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/timer.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/timer.c
new file mode 100644
index 00000000..99778a40
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/timer.c
@@ -0,0 +1,137 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   timer.c: System timer (and button debouncer)
+
+*/
+
+#include "config.h"
+#include <avr/interrupt.h>
+#include <avr/io.h>
+#include "avrcompat.h"
+#include "diskchange.h"
+#include "display.h"
+#include "led.h"
+#include "time.h"
+#include "rtc.h"
+#include "timer.h"
+
+#define DEBOUNCE_TICKS 4
+#define SLEEP_TICKS    2*HZ
+
+volatile tick_t ticks;
+// Logical buttons
+volatile uint8_t active_keys;
+
+// Physical buttons
+uint8_t buttonstate;
+tick_t  lastbuttonchange;
+
+/* Called by the timer interrupt when the button state has changed */
+static void buttons_changed(void) {
+  /* Check if the previous state was stable for two ticks */
+  if (time_after(ticks, lastbuttonchange + DEBOUNCE_TICKS)) {
+    if (active_keys & IGNORE_KEYS) {
+      active_keys &= ~IGNORE_KEYS;
+    } else if (!(buttonstate & (BUTTON_PREV|BUTTON_NEXT))) {
+      /* Both buttons held down */
+        active_keys |= KEY_HOME;
+    } else if (!(buttonstate & BUTTON_NEXT) &&
+               (BUTTON_PIN & BUTTON_NEXT)) {
+      /* "Next" button released */
+      active_keys |= KEY_NEXT;
+    } else if (!(buttonstate & BUTTON_PREV) &&
+               (BUTTON_PIN & BUTTON_NEXT)) {
+      active_keys |= KEY_PREV;
+    }
+  }
+
+  lastbuttonchange = ticks;
+  buttonstate = BUTTON_PIN & BUTTON_MASK;
+}
+
+/* The main timer interrupt */
+ISR(TIMER1_COMPA_vect) {
+  uint8_t tmp = BUTTON_PIN & BUTTON_MASK;
+
+  if (tmp != buttonstate) {
+    buttons_changed();
+  }
+
+  ticks++;
+
+#ifdef SINGLE_LED
+  if (led_state & LED_ERROR) {
+    if ((ticks & 15) == 0)
+      DIRTY_LED_PORT ^= DIRTY_LED_BIT();
+  } else {
+    if ((led_state & LED_BUSY) || (led_state & LED_DIRTY)) {
+      DIRTY_LED_ON();
+    } else {
+      DIRTY_LED_OFF();
+    }
+  }
+#else
+  if (led_state & LED_ERROR)
+    if ((ticks & 15) == 0)
+      DIRTY_LED_PORT ^= DIRTY_LED_BIT();
+#endif
+
+  /* Sleep button triggers when held down for 2sec */
+  if (time_after(ticks, lastbuttonchange + DEBOUNCE_TICKS)) {
+    if (!(buttonstate & BUTTON_NEXT) &&
+        (buttonstate & BUTTON_PREV) &&
+        time_after(ticks, lastbuttonchange + SLEEP_TICKS) &&
+        !key_pressed(KEY_SLEEP)) {
+      /* Set ignore flag so the release doesn't trigger KEY_NEXT */
+      active_keys |= KEY_SLEEP | IGNORE_KEYS;
+      /* Avoid triggering for the next two seconds */
+      lastbuttonchange = ticks;
+    }
+  }
+#if CONFIG_RTC_VARIANT == 1
+  increment_rtc();
+#endif
+
+#ifdef CONFIG_REMOTE_DISPLAY
+  /* Check if the display wants to be queried */
+  if (!(SOFTI2C_PIN & _BV(SOFTI2C_BIT_INTRQ))) {
+    active_keys |= KEY_DISPLAY;
+  }
+#endif
+}
+
+void timer_init(void) {
+  /* Count F_CPU/8 in timer 0 */
+  TCCR0B = _BV(CS01);
+
+  /* Set up a 100Hz interrupt using timer 1 */
+  OCR1A  = 1249;
+  TCNT1  = 0;
+  TCCR1A = 0;
+  TCCR1B = _BV(WGM12) | _BV(CS10) | _BV(CS11);
+  TIMSK1 |= _BV(OCIE1A);
+
+  /* Buttons */
+  BUTTON_DDR  &= (uint8_t)~BUTTON_MASK;
+  BUTTON_PORT |= BUTTON_MASK;
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/timer.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/timer.h
new file mode 100644
index 00000000..9da20a9f
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/timer.h
@@ -0,0 +1,116 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   timer.h: System timer (and button-debouncer)
+
+*/
+
+#ifndef TIMER_H
+#define TIMER_H
+
+#include <util/atomic.h>
+
+// Bit masks for the (simulated) keys
+#define KEY_NEXT    (1<<0)
+#define KEY_PREV    (1<<1)
+#define KEY_HOME    (1<<2)
+#define KEY_SLEEP   (1<<3)
+/* Remote display service request */
+#define KEY_DISPLAY (1<<4)
+
+#define IGNORE_KEYS (1<<7)
+
+/// Logical keys that were pressed - must be reset by the reader.
+extern volatile uint8_t active_keys;
+
+#define key_pressed(x) (active_keys & (x))
+#define reset_key(x) active_keys &= (uint8_t)~(x)
+#define ignore_keys() active_keys = IGNORE_KEYS;
+
+typedef uint16_t tick_t;
+
+/// Global timing variable, 100 ticks per second
+/// Use atomic access or getticks() !
+extern volatile tick_t ticks;
+#define HZ 100
+
+/**
+ * getticks - return the current system tick count
+ *
+ * This inline function returns the current system tick count.
+ */
+static inline tick_t getticks(void) {
+  tick_t tmp;
+  ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
+    tmp = ticks;
+  }
+  return tmp;
+}
+
+#define MS_TO_TICKS(x) (x/10)
+
+/* Adapted from Linux 2.6 include/linux/jiffies.h:
+ *
+ *      These inlines deal with timer wrapping correctly. You are
+ *      strongly encouraged to use them
+ *      1. Because people otherwise forget
+ *      2. Because if the timer wrap changes in future you won't have to
+ *         alter your driver code.
+ *
+ * time_after(a,b) returns true if the time a is after time b.
+ *
+ * Do this with "<0" and ">=0" to only test the sign of the result. A
+ * good compiler would generate better code (and a really good compiler
+ * wouldn't care). Gcc is currently neither.
+ * (">=0" refers to the time_after_eq macro which wasn't copied)
+ */
+#define time_after(a,b)         \
+         ((int16_t)(b) - (int16_t)(a) < 0)
+#define time_before(a,b)        time_after(b,a)
+
+
+/// Calculate timer start value for given timeout in microseconds
+#define TIMEOUT_US(x) (256-((float)F_CPU/8000000.0)*x)
+
+/**
+ * start_timeout - start a timeout using timer0
+ * @startval: starting value for timer
+ *
+ * This function sets timer 0 to the specified value and clears its overflow
+ * flag. Use in conjunction with TIMEOUT_US to cause a timer overflow after
+ * a specified number of microseconds. DON'T use a variable as a parameter to
+ * the TIMEOUT_US macro because that would require run-time float calculations.
+ */
+#define start_timeout(startval) do { TCNT0 = startval; TIFR0 |= _BV(TOV0); } while (0)
+
+/**
+ * has_timed_out - returns true if timeout was reached
+ *
+ * This function returns true if the overflow flag of timer 0 is set which
+ * (together with start_timeout and TIMEOUT_US) will happen when the
+ * specified time has elapsed.
+ */
+#define has_timed_out() (TIFR0 & _BV(TOV0))
+
+void timer_init(void);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/uart.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/uart.c
new file mode 100644
index 00000000..85ae33ef
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/uart.c
@@ -0,0 +1,164 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   uart.c: UART access routines
+
+*/
+
+#include <avr/io.h>
+#include <avr/interrupt.h>
+#include <avr/pgmspace.h>
+#include <stdio.h>
+#include "config.h"
+#include "avrcompat.h"
+#include "uart.h"
+
+static uint8_t txbuf[1 << CONFIG_UART_BUF_SHIFT];
+static volatile uint16_t read_idx;
+static volatile uint16_t write_idx;
+
+ISR(USART_UDRE_vect) {
+  if (read_idx == write_idx) return;
+  UDR = txbuf[read_idx];
+  read_idx = (read_idx+1) & (sizeof(txbuf)-1);
+  if (read_idx == write_idx)
+    UCSRB &= ~ _BV(UDRIE);
+}
+
+void uart_putc(char c) {
+  uint16_t t=(write_idx+1) & (sizeof(txbuf)-1);
+#ifndef CONFIG_DEADLOCK_ME_HARDER // :-)
+  UCSRB &= ~ _BV(UDRIE);   // turn off RS232 irq
+#else
+  while (t == read_idx);   // wait for free space
+#endif
+  txbuf[write_idx] = c;
+  write_idx = t;
+  //if (read_idx == write_idx) PORTD |= _BV(PD7);
+  UCSRB |= _BV(UDRIE);
+}
+
+void uart_puthex(uint8_t num) {
+  uint8_t tmp;
+  tmp = (num & 0xf0) >> 4;
+  if (tmp < 10)
+    uart_putc('0'+tmp);
+  else
+    uart_putc('a'+tmp-10);
+
+  tmp = num & 0x0f;
+  if (tmp < 10)
+    uart_putc('0'+tmp);
+  else
+    uart_putc('a'+tmp-10);
+}
+
+void uart_trace(void *ptr, uint16_t start, uint16_t len) {
+  uint16_t i;
+  uint8_t j;
+  uint8_t ch;
+  uint8_t *data = ptr;
+
+  data+=start;
+  for(i=0;i<len;i+=16) {
+
+    uart_puthex(start>>8);
+    uart_puthex(start&0xff);
+    uart_putc('|');
+    uart_putc(' ');
+    for(j=0;j<16;j++) {
+      if(i+j<len) {
+        ch=*(data + j);
+        uart_puthex(ch);
+      } else {
+        uart_putc(' ');
+        uart_putc(' ');
+      }
+      uart_putc(' ');
+    }
+    uart_putc('|');
+    for(j=0;j<16;j++) {
+      if(i+j<len) {
+        ch=*(data++);
+        if(ch<32 || ch>0x7e)
+          ch='.';
+        uart_putc(ch);
+      } else {
+        uart_putc(' ');
+      }
+    }
+    uart_putc('|');
+    uart_putcrlf();
+    start+=16;
+  }
+}
+
+static int ioputc(char c, FILE *stream) {
+  if (c == '\n') uart_putc('\r');
+  uart_putc(c);
+  return 0;
+}
+
+uint8_t uart_getc(void) {
+  loop_until_bit_is_set(UCSRA,RXC);
+  return UDR;
+}
+
+void uart_flush(void) {
+  while (read_idx != write_idx) ;
+}
+
+void uart_puts_P(prog_char *text) {
+  uint8_t ch;
+
+  while ((ch = pgm_read_byte(text++))) {
+    uart_putc(ch);
+  }
+}
+
+void uart_putcrlf(void) {
+  uart_putc(13);
+  uart_putc(10);
+}
+
+static FILE mystdout = FDEV_SETUP_STREAM(ioputc, NULL, _FDEV_SETUP_WRITE);
+
+void uart_init(void) {
+  /* Seriellen Port konfigurieren */
+
+  UBRRH = (int)((double)F_CPU/(16.0*CONFIG_UART_BAUDRATE)-1) >> 8;
+  UBRRL = (int)((double)F_CPU/(16.0*CONFIG_UART_BAUDRATE)-1) & 0xff;
+
+  UCSRB = _BV(RXEN) | _BV(TXEN);
+  // I really don't like random #ifdefs in the code =(
+#if defined __AVR_ATmega32__
+  UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0);
+#else
+  UCSRC = _BV(UCSZ1) | _BV(UCSZ0);
+#endif
+
+  stdout = &mystdout;
+
+  //UCSRB |= _BV(UDRIE);
+  read_idx  = 0;
+  write_idx = 0;
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/uart.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/uart.h
new file mode 100644
index 00000000..73a8910a
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/uart.h
@@ -0,0 +1,59 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   uart.h: Definitions for the UART access routines
+
+*/
+
+#ifndef UART_H
+#define UART_H
+
+#ifdef CONFIG_UART_DEBUG
+
+#include <avr/pgmspace.h>
+
+void uart_init(void);
+unsigned char uart_getc(void);
+void uart_putc(char c);
+void uart_puthex(uint8_t num);
+void uart_trace(void *ptr, uint16_t start, uint16_t len);
+void uart_flush(void);
+void uart_puts_P(prog_char *text);
+void uart_putcrlf(void);
+
+#include <stdio.h>
+#define dprintf(str,...) printf_P(PSTR(str), ##__VA_ARGS__)
+
+#else
+
+#define uart_init()    do {} while(0)
+#define uart_getc()    0
+#define uart_putc(x)   do {} while(0)
+#define uart_puthex(x) do {} while(0)
+#define uart_flush()   do {} while(0)
+#define uart_puts_P(x) do {} while(0)
+#define uart_putcrlf() do {} while(0)
+#define uart_trace(a,b,c) do {} while(0)
+
+#endif
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/ustring.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/ustring.h
new file mode 100644
index 00000000..8e19873a
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/ustring.h
@@ -0,0 +1,42 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   ustring.h: uint8_t wrappers for string.h-functions
+
+*/
+
+#ifndef USTRING_H
+#define USTRING_H
+
+#include <string.h>
+
+#define ustrcasecmp_P(s1,s2) (strcasecmp_P((char *)(s1), (s2)))
+#define ustrchr(s,c)         ((uint8_t *)strchr((char *)(s), (c)))
+#define ustrcmp(s1,s2)       (strcmp((char *)(s1), (char *)(s2)))
+#define ustrcmp_P(s1,s2)     (strcmp_P((char *)(s1), (s2)))
+#define ustrcpy(s1,s2)       (strcpy((char *)(s1), (char *)(s2)))
+#define ustrcpy_P(s1,s2)     (strcpy_P((char *)(s1), (s2)))
+#define ustrncpy(s1,s2,n)    (strncpy((char *)(s1), (char *)(s2),(n)))
+#define ustrlen(s)           (strlen((char *)(s)))
+#define ustrrchr(s,c)        ((uint8_t *)strrchr((char *)(s), (c)))
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/utils.c b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/utils.c
new file mode 100644
index 00000000..b1f9f215
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/utils.c
@@ -0,0 +1,78 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   utils.c: Misc. utility functions that didn't fit elsewhere
+
+*/
+
+#include <stdint.h>
+#include <stddef.h>
+#include "utils.h"
+
+uint8_t *appendnumber(uint8_t *msg, uint8_t value) {
+  if (value >= 100) {
+    *msg++ = '0' + value/100;
+    value %= 100;
+  }
+
+  *msg++ = '0' + value/10;
+  *msg++ = '0' + value%10;
+
+  return msg;
+}
+
+/* Convert a one-byte BCD value to a normal integer */
+uint8_t bcd2int(uint8_t value) {
+  return (value & 0x0f) + 10*(value >> 4);
+}
+
+/* Convert a uint8_t into a BCD value */
+uint8_t int2bcd(uint8_t value) {
+  return (value % 10) + 16*(value/10);
+}
+
+/* Similiar to strtok_r, but only a single delimiting character  */
+uint8_t *ustr1tok(uint8_t *str, const uint8_t delim, uint8_t **saveptr) {
+  uint8_t *tmp;
+
+  if (str == NULL)
+    str = *saveptr;
+
+  /* Skip leading delimiters */
+  while (*str == delim) str++;
+
+  /* If there is anything left... */
+  if (*str) {
+    /* Search for the next delimiter */
+    tmp = str;
+    while (*tmp && *tmp != delim) tmp++;
+
+    /* Terminate the string there */
+    if (*tmp != 0)
+      *tmp++ = 0;
+
+    *saveptr = tmp;
+
+    return str;
+  } else
+    return NULL;
+}
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/utils.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/utils.h
new file mode 100644
index 00000000..4aa3848c
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/utils.h
@@ -0,0 +1,52 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   utils.c: Misc. utility functions that didn't fit elsewhere
+
+*/
+
+#ifndef UTILS_H
+#define UTILS_H
+
+/* Side-effect safe min/max */
+#define max(a,b) \
+       ({ typeof (a) _a = (a); \
+           typeof (b) _b = (b); \
+         _a > _b ? _a : _b; })
+
+#define min(a,b) \
+       ({ typeof (a) _a = (a); \
+           typeof (b) _b = (b); \
+         _a < _b ? _a : _b; })
+
+
+/* Write a number to a string as ASCII */
+uint8_t *appendnumber(uint8_t *msg, uint8_t value);
+
+/* Convert between integer and BCD */
+uint8_t bcd2int(uint8_t value);
+uint8_t int2bcd(uint8_t value);
+
+/* Tokenize a string like strtok_r, but with a single delimiter character only */
+uint8_t *ustr1tok(uint8_t *str, const uint8_t delim, uint8_t **saveptr);
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/wrapops.h b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/wrapops.h
new file mode 100644
index 00000000..44c6e560
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec-0.10.3/wrapops.h
@@ -0,0 +1,103 @@
+/* sd2iec - SD/MMC to Commodore serial bus interface/controller
+   Copyright (C) 2007-2012  Ingo Korb <ingo@akana.de>
+
+   Inspiration and low-level SD/MMC access based on code from MMC2IEC
+     by Lars Pontoppidan et al., see sdcard.c|h and config.h.
+
+   FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 of the License only.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+   wrapops.h: Lots of ugly defines to allow switchable file operations
+
+   The structure-of-pgmspace-function-pointers access scheme used here
+   was inspired by code from MMC2IEC by Lars Pontoppidan.
+
+   typeof-usage suggested by T. Diedrich.
+*/
+
+#ifndef WRAPOPS_H
+#define WRAPOPS_H
+
+#include <avr/pgmspace.h>
+#include "buffers.h"
+#include "fileops.h"
+#include "ff.h"
+
+/**
+ * struct fileops_t - function pointers to file operations
+ * @open_read   : open a file for reading
+ * @open_write  : open a file for writing/appending
+ * @open_rel    : open a relative file
+ * @file_delete : delete a file
+ * @disk_label  : read disk label (up to 17 bytes, 0-terminated)
+ * @dir_label   : read dir label  (16 characters, space-padded, unterminated)
+ * @disk_id     : read disk id
+ * @disk_free   : read free space of disk
+ * @read_sector : read a sector from the disk
+ * @write_sector: write a sector to the disk
+ * @format      : format the disk
+ * @opendir     : open a directory
+ * @readdir     : read an entry from a directory
+ * @mkdir       : create a directory
+ * @chdir       : change current directory
+ * @rename      : rename a file
+ *
+ * This structure holds function pointers for the various
+ * abstracted operations on the supported file systems/images.
+ * Instances of this structure must always be allocated in flash
+ * and no field may be set to NULL.
+ */
+typedef struct fileops_s {
+  void     (*open_read)(path_t *path, cbmdirent_t *name, buffer_t *buf);
+  void     (*open_write)(path_t *path, cbmdirent_t *name, uint8_t type, buffer_t *buf, uint8_t append);
+  void     (*open_rel)(path_t *path, cbmdirent_t *name, buffer_t *buf, uint8_t recordlen, uint8_t mode);
+  uint8_t  (*file_delete)(path_t *path, cbmdirent_t *name);
+  uint8_t  (*disk_label)(uint8_t part, uint8_t *label);
+  uint8_t  (*dir_label)(path_t *path, uint8_t *label);
+  uint8_t  (*disk_id)(path_t *path, uint8_t *id);
+  uint16_t (*disk_free)(uint8_t part);
+  void     (*read_sector)(buffer_t *buf, uint8_t part, uint8_t track, uint8_t sector);
+  void     (*write_sector)(buffer_t *buf, uint8_t part, uint8_t track, uint8_t sector);
+  void     (*format)(uint8_t drv, uint8_t *name, uint8_t *id);
+  uint8_t  (*opendir)(dh_t *dh, path_t *path);
+  int8_t   (*readdir)(dh_t *dh, cbmdirent_t *dent);
+  void     (*mkdir)(path_t *path, uint8_t *dirname);
+  uint8_t  (*chdir)(path_t *path, cbmdirent_t *dent);
+  void     (*rename)(path_t *path, cbmdirent_t *oldname, uint8_t *newname);
+} fileops_t;
+
+/* Helper-Define to avoid lots of typedefs */
+#define pgmcall(x) ((typeof(x))pgm_read_word(&(x)))
+
+/* Wrappers to make the indirect calls look like normal functions */
+#define open_read(path,name,buf) ((pgmcall(partition[(path)->part].fop->open_read))(path,name,buf))
+#define open_write(path,name,type,buf,app) ((pgmcall(partition[(path)->part].fop->open_write))(path,name,type,buf,app))
+#define open_rel(path,name,buf,len,mode) ((pgmcall(partition[(path)->part].fop->open_rel))(path,name,buf,len,mode))
+#define file_delete(path,name) ((pgmcall(partition[(path)->part].fop->file_delete))(path,name))
+#define disk_label(part,label) ((pgmcall(partition[part].fop->disk_label))(part,label))
+#define dir_label(path,label) ((pgmcall(partition[(path)->part].fop->dir_label))(path,label))
+#define disk_id(path,id) ((pgmcall(partition[(path)->part].fop->disk_id))(path,id))
+#define disk_free(drv) ((pgmcall(partition[drv].fop->disk_free))(drv))
+#define read_sector(buf,drv,t,s) ((pgmcall(partition[(drv)].fop->read_sector))(buf,drv,t,s))
+#define write_sector(buf,drv,t,s) ((pgmcall(partition[(drv)].fop->write_sector))(buf,drv,t,s))
+#define format(drv,name,id) ((pgmcall(partition[(drv)].fop->format))(drv,name,id))
+#define opendir(dh,path) ((pgmcall(partition[(path)->part].fop->opendir))(dh,path))
+#define readdir(dh,dent) ((pgmcall(partition[(dh)->part].fop->readdir))(dh,dent))
+#define mkdir(path,dir) ((pgmcall(partition[(path)->part].fop->mkdir))(path,dir))
+#define chdir(path,dent) ((pgmcall(partition[(path)->part].fop->chdir))(path,dent))
+#define rename(path,old,new) ((pgmcall(partition[(path)->part].fop->rename))(path,old,new))
+
+#endif
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec_1.2.parts.txt b/trunk/AVRProjects/sd2iec/src/sd2iec_1.2.parts.txt
new file mode 100644
index 00000000..4761216b
--- /dev/null
+++ b/trunk/AVRProjects/sd2iec/src/sd2iec_1.2.parts.txt
@@ -0,0 +1,51 @@
+Part	Value	Package
+
+C1	100n	C1206
+C2	10µ	C_TANTAL_A
+C3	10µ	C_TANTAL_A
+C4	56p	C1206
+C5	56p	C1206
+C6	10µ	C_TANTAL_A
+D1	4148	DSOD-123
+IC1	MEGA644P	TQFP44
+IC3	LP2950_3.0	TO92
+LED1	red	LED1206
+LED2	green	LED1206
+Q1	8 MHz	HC49/S
+R10	22k	R1206
+R11	18	R1206
+R12	22k	R1206
+R2	10k	R1206
+R20	2,2R	R1206
+R3	10k	R1206
+R30	330	R1206
+R31	330	R1206
+R4	10k	R1206
+R7	18	R1206
+R8	22k	R1206
+R9	18	R1206
+T2	IRLML2402	SOT23
+T3	IRLML2402	SOT23
+T4	IRLML2402	SOT23
+X1	MM6_PIN	MICROMATCH-6
+X2	SD_SCDA1A1401	ALPS_SCDA1A1401
+
+Optional:
+R15	10k	R0805
+R16	10k	R0805
+R17	10k	R0805
+X3	PINH1X10	1X10
+X4	AVR-ISP_1X6	1X6_ISP
+X5	PINH1X3	1X3
+X7	PINH1X1	1X1
+
+Extra parts with no current use:
+R1	nB	R1206
+R100	nB	R1206
+R101	nB	R1206
+R13	nB	R0603
+R14	nB	R0805
+R5	nB	R1206
+R6	nB	R1206
+T1	nB	SOT23
+X6	nB	1X5
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec_1.2_bot.png b/trunk/AVRProjects/sd2iec/src/sd2iec_1.2_bot.png
new file mode 100644
index 00000000..6e08f535
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diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec_1.2_sch.png b/trunk/AVRProjects/sd2iec/src/sd2iec_1.2_sch.png
new file mode 100644
index 00000000..fe3fd245
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/src/sd2iec_1.2_sch.png differ
diff --git a/trunk/AVRProjects/sd2iec/src/sd2iec_1.2_top.png b/trunk/AVRProjects/sd2iec/src/sd2iec_1.2_top.png
new file mode 100644
index 00000000..3ddb0593
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/src/sd2iec_1.2_top.png differ
diff --git a/trunk/AVRProjects/sd2iec/src/unofficial_sd2iec_guide.pdf b/trunk/AVRProjects/sd2iec/src/unofficial_sd2iec_guide.pdf
new file mode 100644
index 00000000..f9aaebd4
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/src/unofficial_sd2iec_guide.pdf differ
diff --git a/trunk/AVRProjects/sd2iec/unofficial_sd2iec_guide.pdf b/trunk/AVRProjects/sd2iec/unofficial_sd2iec_guide.pdf
new file mode 100644
index 00000000..f9aaebd4
Binary files /dev/null and b/trunk/AVRProjects/sd2iec/unofficial_sd2iec_guide.pdf differ
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/Changelog.txt b/trunk/AVRProjects/usbasp.2011-05-28/Changelog.txt
new file mode 100644
index 00000000..b94a4417
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/Changelog.txt
@@ -0,0 +1,53 @@
+usbasp.2011-05-28 (v1.4)
+------------------------
+- added TPI support for ATTiny4/5/6/10 (by Slawomir FraÅ›)
+- added support for controllers with flash >128kb (by Slawomir FraÅ›)
+- fixed resync after program enable signal to pulse RST (based on patch by Marco S)
+- updated usb driver to V-USB Release 2010-07-15
+
+
+usbasp.2009-02-28 (v1.3)
+------------------------
+- added support for software control of ISP speed (based on patch by Jurgis Brigmanis)
+- included new AVRUSB driver version (Release 2008-11-26)
+- added libusb 0.1.12.1 windows drivers (needed for WinAVR version 20080512 or greater)
+
+usbasp.2007-10-23 (v1.2)
+------------------------
+- red LED turns on before connecting to target device: this signal can be used to control external tri-state buffers (by Pawel Szramowski)
+
+usbasp.2007-07-23
+-----------------
+- changed licence to GNU GPL v2
+- included new AVRUSB driver version (Release 2007-07-07); AVRUSB licence was changed to GNU GPL v2
+- fixed long addressing for Mega128 (by BoskiDialer)
+
+usbasp.2006-12-29
+-----------------
+- fixed returnvalue in usbWriteFunction (by Jeroen Koeter)
+- changed clock.h: adaptation for newer MCUs like ATMega48 (by Hanns-Konrad Unger)
+- improved Makefile to select target (by Hanns-Konrad Unger)
+- circuit diagram: added zener diodes to USB data lines 
+
+usbasp.2006-09-16
+-----------------
+- add usb reset on startup
+- included new AVRUSB driver version (Release 2006-07-18)
+- changed VID and PID to OBDEV's shared IDs to meet new licence conditions
+- removed avrdude patch from this package. USBasp is supported in latest avrdude CVS version 
+
+usbasp.2005-11-14
+-----------------
+- fixed blocksize restriction (programming the Mega128 now works) 
+  by Thomas Pfeifer (TP)
+- update patch for avrdude-5.0
+
+usbasp.2005-07-03
+-----------------
+- set USB_CFG_SAMPLE_EXACT in usbconfig.h to reduce problems with long cables
+- corrected vendor string
+- added notes on setting fuse bits
+
+usbasp.2005-04-21
+-----------------
+- first public version
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/Readme.txt b/trunk/AVRProjects/usbasp.2011-05-28/Readme.txt
new file mode 100644
index 00000000..120db461
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/Readme.txt
@@ -0,0 +1,142 @@
+This is the README file for USBasp.
+
+USBasp is a USB in-circuit programmer for Atmel AVR controllers. It simply
+consists of an ATMega88 or an ATMega8 and a couple of passive components.
+The programmer uses a firmware-only USB driver, no special USB controller
+is needed.
+
+Features:
+- Works under multiple platforms. Linux, Mac OS X and Windows are tested.
+- No special controllers or smd components are needed.
+- Programming speed is up to 5kBytes/sec.
+- SCK option to support targets with low clock speed (< 1,5MHz).
+- Planned: serial interface to target (e.g. for debugging).
+
+
+LICENSE
+
+USBasp is distributed under the terms and conditions of the GNU GPL version
+2 (see "firmware/usbdrv/License.txt" for details).
+
+USBasp is built with V-USB driver by OBJECTIVE DEVELOPMENT GmbH. See
+"firmware/usbdrv/" for further information.
+
+
+LIMITATIONS
+
+Hardware:
+This package includes a circuit diagram. This circuit can only be used for
+programming 5V target systems. For other systems a level converter is needed.
+
+Firmware:
+The firmware dosn't support USB Suspend Mode. A bidirectional serial
+interface to slave exists in hardware but the firmware doesn't support it yet.
+
+
+USE PRECOMPILED VERSION
+
+Firmware:
+Flash "bin/firmware/usbasp.atmega88.xxxx-xx-xx.hex" or
+"bin/firmware/usbasp.atmega8.xxxx-xx-xx.hex" to the used controller with a
+working programmer (e.g. with avrdude, uisp, ...). Set jumper J2 to activate
+USBasp firmware update function.
+You have to change the fuse bits for external crystal (see "make fuses").
+# TARGET=atmega8    HFUSE=0xc9  LFUSE=0xef
+# TARGET=atmega48   HFUSE=0xdd  LFUSE=0xff
+# TARGET=atmega88   HFUSE=0xdd  LFUSE=0xff
+
+Windows:
+Start Windows and connect USBasp to the system. When Windows asks for a
+driver, choose "bin/win-driver". On Win2k and WinXP systems, Windows will
+warn that the driver is is not 'digitally signed'. Ignore this message and
+continue with the installation.
+Now you can run avrdude. Examples:
+1. Enter terminal mode with an AT90S2313 connected to the programmer:
+   avrdude -c usbasp -p at90s2313 -t
+2. Write main.hex to the flash of an ATmega8:
+   avrdude -c usbasp -p atmega8 -U flash:w:main.hex
+
+Setting jumpers:
+J1 Power target
+   Supply target with 5V (USB voltage). Be careful with this option, the
+   circuit isn't protected against short circuit!
+J2 Jumper for firmware upgrade (not self-upgradable)
+   Set this jumper for flashing the ATMega(4)8 of USBasp with another working
+   programmer.
+J3 SCK option
+   If the target clock is lower than 1,5 MHz, you have to set this jumper.
+   Then SCK is scaled down from 375 kHz to about 8 kHz.
+
+
+BUILDING AND INSTALLING FROM SOURCE CODE
+
+Firmware:
+To compile the firmware
+1. install the GNU toolchain for AVR microcontrollers (avr-gcc, avr-libc),
+2. change directory to firmware/
+3. run "make main.hex"
+4. flash "main.hex" to the ATMega(4)8. E.g. with uisp or avrdude (check
+the Makefile option "make flash"). To flash the firmware you have
+to set jumper J2 and connect USBasp to a working programmer.
+You have to change the fuse bits for external crystal, (check the Makefile
+option "make fuses").
+
+Software (avrdude):
+AVRDUDE supports USBasp since version 5.2. 
+1. install libusb: http://libusb.sourceforge.net/
+2. get latest avrdude release: http://download.savannah.gnu.org/releases/avrdude/
+3. cd avrdude-X.X.X
+5. configure to your environment:
+   ./bootstrap (I had to comment out the two if-blocks which verify the
+                installed versions of autoconf and automake)
+   ./configure
+6. compile and install it:
+   make 
+   make install
+
+Notes on Windows (Cygwin):
+Download libusb-win32-device-bin-x.x.x.x.tar.gz from
+http://libusb-win32.sourceforge.net/ and unpack it.
+-> copy lib/gcc/libusb.a to lib-path
+-> copy include/usb.h to include-path
+cd avrdude
+./configure LDFLAGS="-static" --enable-versioned-doc=no
+make
+
+Notes on Darwin/MacOS X:
+after "./configure" I had to edit Makefile:
+change "avrdude_CPPFLAGS" to "AM_CPPFLAGS"
+(why is this needed only on mac? bug in configure.ac?)
+
+Notes on Linux:
+To use USBasp as non-root, you have to define some device rules. See
+bin/linux-nonroot for an example.
+
+FILES IN THE DISTRIBUTION
+
+Readme.txt ...................... The file you are currently reading
+firmware ........................ Source code of the controller firmware
+firmware/usbdrv ................. AVR USB driver by Objective Development
+firmware/usbdrv/License.txt ..... Public license for AVR USB driver and USBasp
+circuit ......................... Circuit diagram in PDF and EAGLE format
+bin ............................. Precompiled programs
+bin/win-driver .................. Windows driver
+bin/firmware .................... Precompiled firmware
+bin/linux-nonroot ............... Linux device rule file
+
+
+MORE INFORMATION
+
+For more information on USBasp and it's components please visit the
+following URLs:
+
+USBasp .......................... http://www.fischl.de/usbasp/
+
+Firmware-only V-USB driver ...... http://www.obdev.at/products/vusb/
+avrdude ......................... http://www.nongnu.org/avrdude/
+libusb .......................... http://libusb.sourceforge.net/
+libusb-win32 .................... http://libusb-win32.sourceforge.net/
+
+
+2011-05-28 Thomas Fischl <tfischl@gmx.de>
+http://www.fischl.de
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/firmware/Makefile b/trunk/AVRProjects/usbasp.2011-05-28/bin/firmware/Makefile
new file mode 100644
index 00000000..5fd3b387
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/bin/firmware/Makefile
@@ -0,0 +1,11 @@
+MCU_TARGET     = atmega8
+FLASHER        = avrdude -c usbasp -p $(MCU_TARGET)
+
+usbasp: fuses
+	$(FLASHER) -B 1 -U flash:w:usbasp.atmega8.2011-05-28.hex
+
+fuses:
+	$(FLASHER) -B 200 -U hfuse:w:0xC9:m -U lfuse:w:0xEF:m
+shell:
+	$(FLASHER) -t
+
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/firmware/Makefile48 b/trunk/AVRProjects/usbasp.2011-05-28/bin/firmware/Makefile48
new file mode 100644
index 00000000..2d2b466f
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/bin/firmware/Makefile48
@@ -0,0 +1,11 @@
+MCU_TARGET     = atmega48
+FLASHER        = avrdude -c usbasp -p $(MCU_TARGET)
+
+usbasp: fuses
+	$(FLASHER) -B 1 -U flash:w:usbasp.atmega48.2009-02-28.hex
+
+fuses:
+	$(FLASHER) -B 200 -U hfuse:w:0xdd:m -U lfuse:w:0xff:m
+shell:
+	$(FLASHER) -t
+
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/firmware/Makefile88 b/trunk/AVRProjects/usbasp.2011-05-28/bin/firmware/Makefile88
new file mode 100644
index 00000000..ca9eb48b
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/bin/firmware/Makefile88
@@ -0,0 +1,11 @@
+MCU_TARGET     = atmega88
+FLASHER        = avrdude -c usbasp -p $(MCU_TARGET)
+
+usbasp: fuses
+	$(FLASHER) -B 1 -U flash:w:usbasp.atmega88.2011-05-28.hex
+
+fuses:
+	$(FLASHER) -B 300 -U lfuse:w:0xff:m -U hfuse:w:0xdd:m 
+shell:
+	$(FLASHER) -B 200 -t
+
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/firmware/usbasp.atmega48.2009-02-28.hex b/trunk/AVRProjects/usbasp.2011-05-28/bin/firmware/usbasp.atmega48.2009-02-28.hex
new file mode 100644
index 00000000..81b09c28
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/bin/firmware/usbasp.atmega48.2009-02-28.hex
@@ -0,0 +1,242 @@
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diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/firmware/usbasp.atmega8.2011-05-28.hex b/trunk/AVRProjects/usbasp.2011-05-28/bin/firmware/usbasp.atmega8.2011-05-28.hex
new file mode 100644
index 00000000..dc54506f
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/bin/firmware/usbasp.atmega8.2011-05-28.hex
@@ -0,0 +1,296 @@
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diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/firmware/usbasp.atmega88.2011-05-28.hex b/trunk/AVRProjects/usbasp.2011-05-28/bin/firmware/usbasp.atmega88.2011-05-28.hex
new file mode 100644
index 00000000..cb3a64c3
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/bin/firmware/usbasp.atmega88.2011-05-28.hex
@@ -0,0 +1,297 @@
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diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/linux-nonroot/99-USBasp.rules b/trunk/AVRProjects/usbasp.2011-05-28/bin/linux-nonroot/99-USBasp.rules
new file mode 100644
index 00000000..8d04b7e9
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/bin/linux-nonroot/99-USBasp.rules
@@ -0,0 +1,4 @@
+# USBasp - USB programmer for Atmel AVR controllers
+# Copy this file to /etc/udev/rules.d so
+
+SUBSYSTEM=="usb", ENV{DEVTYPE}=="usb_device", SYSFS{idVendor}=="16c0", SYSFS{idProduct}=="05dc", MODE="0666"
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/linux-nonroot/install_rule b/trunk/AVRProjects/usbasp.2011-05-28/bin/linux-nonroot/install_rule
new file mode 100644
index 00000000..04de5fe2
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/bin/linux-nonroot/install_rule
@@ -0,0 +1,2 @@
+#!/bin/sh -x
+sudo cp 99-USBasp.rules /etc/udev/rules.d/99-USBasp.rules
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/Readme.txt b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/Readme.txt
new file mode 100644
index 00000000..ef4af858
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/Readme.txt
@@ -0,0 +1 @@
+With WinAVR version 20100110 or older, please use libusb_0.1.12.1.
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/libusb0.dll b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/libusb0.dll
new file mode 100644
index 00000000..9387beda
Binary files /dev/null and b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/libusb0.dll differ
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/libusb0.sys b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/libusb0.sys
new file mode 100644
index 00000000..0a02d3ee
Binary files /dev/null and b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/libusb0.sys differ
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/libusb0_x64.dll b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/libusb0_x64.dll
new file mode 100644
index 00000000..c89a59fe
Binary files /dev/null and b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/libusb0_x64.dll differ
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/libusb0_x64.sys b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/libusb0_x64.sys
new file mode 100644
index 00000000..07cf0858
Binary files /dev/null and b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/libusb0_x64.sys differ
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/testlibusb-win.exe b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/testlibusb-win.exe
new file mode 100644
index 00000000..a0c3e317
Binary files /dev/null and b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/testlibusb-win.exe differ
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/testlibusb.exe b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/testlibusb.exe
new file mode 100644
index 00000000..e6a0b629
Binary files /dev/null and b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/testlibusb.exe differ
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/usbasp.cat b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/usbasp.cat
new file mode 100644
index 00000000..2ef39c52
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/usbasp.cat
@@ -0,0 +1,3 @@
+This file will contain the digital signature of the files to be installed
+on the system.
+This file will be provided by Microsoft upon certification of your drivers.
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/usbasp.inf b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/usbasp.inf
new file mode 100644
index 00000000..ba518818
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/usbasp.inf
@@ -0,0 +1,136 @@
+[Version]
+Signature = "$Chicago$"
+provider  = %manufacturer%
+DriverVer = 03/20/2007,0.1.12.1
+CatalogFile = usbasp.cat
+CatalogFile.NT = usbasp.cat
+CatalogFile.NTAMD64 = usbasp_x64.cat
+
+Class = LibUsbDevices
+ClassGUID = {EB781AAF-9C70-4523-A5DF-642A87ECA567}
+
+[ClassInstall]
+AddReg=libusb_class_install_add_reg
+
+[ClassInstall32]
+AddReg=libusb_class_install_add_reg
+
+[libusb_class_install_add_reg]
+HKR,,,,"LibUSB-Win32 Devices"
+HKR,,Icon,,"-20"
+
+[Manufacturer]
+%manufacturer%=Devices,NT,NTAMD64
+
+;--------------------------------------------------------------------------
+; Files
+;--------------------------------------------------------------------------
+
+[SourceDisksNames]
+1 = "Libusb-Win32 Driver Installation Disk",,
+
+[SourceDisksFiles]
+libusb0.sys = 1,,
+libusb0.dll = 1,,
+libusb0_x64.sys = 1,,
+libusb0_x64.dll = 1,,
+
+[DestinationDirs]
+libusb_files_sys = 10,system32\drivers
+libusb_files_sys_x64 = 10,system32\drivers
+libusb_files_dll = 10,system32
+libusb_files_dll_wow64 = 10,syswow64
+libusb_files_dll_x64 = 10,system32
+
+[libusb_files_sys]
+libusb0.sys
+
+[libusb_files_sys_x64]
+libusb0.sys,libusb0_x64.sys
+
+[libusb_files_dll]
+libusb0.dll
+
+[libusb_files_dll_wow64]
+libusb0.dll
+
+[libusb_files_dll_x64]
+libusb0.dll,libusb0_x64.dll
+
+;--------------------------------------------------------------------------
+; Device driver
+;--------------------------------------------------------------------------
+
+[LIBUSB_DEV]
+CopyFiles = libusb_files_sys, libusb_files_dll
+AddReg    = libusb_add_reg
+
+[LIBUSB_DEV.NT]
+CopyFiles = libusb_files_sys, libusb_files_dll
+
+[LIBUSB_DEV.NTAMD64]
+CopyFiles = libusb_files_sys_x64, libusb_files_dll_wow64, libusb_files_dll_x64
+
+[LIBUSB_DEV.HW]
+DelReg = libusb_del_reg_hw
+AddReg = libusb_add_reg_hw
+
+[LIBUSB_DEV.NT.HW]
+DelReg = libusb_del_reg_hw
+AddReg = libusb_add_reg_hw
+
+[LIBUSB_DEV.NTAMD64.HW]
+DelReg = libusb_del_reg_hw
+AddReg = libusb_add_reg_hw
+
+[LIBUSB_DEV.NT.Services]
+AddService = libusb0, 0x00000002, libusb_add_service
+
+[LIBUSB_DEV.NTAMD64.Services]
+AddService = libusb0, 0x00000002, libusb_add_service
+
+[libusb_add_reg]
+HKR,,DevLoader,,*ntkern
+HKR,,NTMPDriver,,libusb0.sys
+
+; Older versions of this .inf file installed filter drivers. They are not
+; needed any more and must be removed
+[libusb_del_reg_hw]
+HKR,,LowerFilters
+HKR,,UpperFilters
+
+; Device properties
+[libusb_add_reg_hw]
+HKR,,SurpriseRemovalOK, 0x00010001, 1
+
+;--------------------------------------------------------------------------
+; Services
+;--------------------------------------------------------------------------
+
+[libusb_add_service]
+DisplayName    = "LibUsb-Win32 - Kernel Driver 03/20/2007, 0.1.12.1"
+ServiceType    = 1
+StartType      = 3
+ErrorControl   = 0
+ServiceBinary  = %12%\libusb0.sys
+
+;--------------------------------------------------------------------------
+; Devices
+;--------------------------------------------------------------------------
+
+[Devices]
+"USBasp"=LIBUSB_DEV, USB\VID_16c0&PID_05dc
+
+[Devices.NT]
+"USBasp"=LIBUSB_DEV, USB\VID_16c0&PID_05dc
+
+[Devices.NTAMD64]
+"USBasp"=LIBUSB_DEV, USB\VID_16c0&PID_05dc
+
+
+;--------------------------------------------------------------------------
+; Strings
+;--------------------------------------------------------------------------
+
+[Strings]
+manufacturer = "www.fischl.de"
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/usbasp_x64.cat b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/usbasp_x64.cat
new file mode 100644
index 00000000..2ef39c52
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_0.1.12.1/usbasp_x64.cat
@@ -0,0 +1,3 @@
+This file will contain the digital signature of the files to be installed
+on the system.
+This file will be provided by Microsoft upon certification of your drivers.
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/amd64/libusb0.dll b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/amd64/libusb0.dll
new file mode 100644
index 00000000..a8eb3385
Binary files /dev/null and b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/amd64/libusb0.dll differ
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/amd64/libusb0.sys b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/amd64/libusb0.sys
new file mode 100644
index 00000000..50bce8d5
Binary files /dev/null and b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/amd64/libusb0.sys differ
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/ia64/libusb0.dll b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/ia64/libusb0.dll
new file mode 100644
index 00000000..9a284238
Binary files /dev/null and b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/ia64/libusb0.dll differ
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/ia64/libusb0.sys b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/ia64/libusb0.sys
new file mode 100644
index 00000000..495d9069
Binary files /dev/null and b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/ia64/libusb0.sys differ
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/installer_x64.exe b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/installer_x64.exe
new file mode 100644
index 00000000..a9239290
Binary files /dev/null and b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/installer_x64.exe differ
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/installer_x86.exe b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/installer_x86.exe
new file mode 100644
index 00000000..90f53314
Binary files /dev/null and b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/installer_x86.exe differ
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/libusb-win32-bin-README.txt b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/libusb-win32-bin-README.txt
new file mode 100644
index 00000000..3d93c4e2
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/libusb-win32-bin-README.txt
@@ -0,0 +1,27 @@
+libusb-win32-bin v1.2.4.0 (04/08/2011) - [Package Information]
+
+ALL ARCHITECTURES:
+  x86\libusb0_x86.dll: x86 32-bit library. Must be renamed to libusb0.dll
+    On 64 bit, Installs to Windows\syswow64\libusb0.dll.
+    On 32 bit, Installs to Windows\system32\libusb0.dll.
+
+  x86\inf-wizard.exe: inf-wizard application with embedded libusb-win32
+    v1.2.4.0 binaries.
+
+X86 ONLY ARCHITECTURES:
+  x86\libusb0.sys: x86 32-bit driver.
+    Installs to Windows\system32\drivers\libusb0.sys
+
+AMD64-INTEL64 ONLY ARCHITECTURES:
+  amd64\libusb0.sys: x64 64-bit driver.
+    Installs to Windows\system32\drivers\libusb0.sys
+
+  amd64\libusb0.dll: x64 64-bit library.
+    Installs to Windows\system32\libusb0.dll
+
+IA64 ONLY ARCHITECTURES:
+  ia64\libusb0.sys: IA64 64-bit driver.
+    Installs to Windows\system32\drivers\libusb0.sys
+
+  ia64\libusb0.dll: IA64 64-bit library.
+    Installs to Windows\system32\libusb0.dll
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/license/libusb-win32/installer_license.txt b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/license/libusb-win32/installer_license.txt
new file mode 100644
index 00000000..6128be63
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/license/libusb-win32/installer_license.txt
@@ -0,0 +1,851 @@
+Copyright (c) 2002-2004 Stephan Meyer, <ste_meyer@web.de>
+Copyright (c) 2000-2004 Johannes Erdfelt, <johannes@erdfelt.com>
+Copyright (c) 2000-2004 Thomas Sailer, <sailer@ife.ee.ethz.ch>
+Copyright (c) 2010 Travis Robinson, <libusbdotnet@gmail.com>
+
+This software is distributed under the following licenses:
+Driver:      GNU General Public License (GPL)
+Library, Test Files, Installer:    GNU Lesser General Public License (LGPL)
+
+***********************************************************************
+                    GNU GENERAL PUBLIC LICENSE
+                       Version 3, 29 June 2007
+
+ Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+                            Preamble
+
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+
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+any other work released this way by its authors.  You can apply it to
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+
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/usbasp.cat b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/usbasp.cat
new file mode 100644
index 00000000..adfc8ccb
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/usbasp.cat
@@ -0,0 +1,3 @@
+This file will contain the digital signature of the files to be installed
+on the system.
+This file will be provided by Microsoft upon certification of your drivers.
\ No newline at end of file
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/usbasp.inf b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/usbasp.inf
new file mode 100644
index 00000000..a8d42720
Binary files /dev/null and b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/usbasp.inf differ
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/x86/libusb0.sys b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/x86/libusb0.sys
new file mode 100644
index 00000000..bf2e8bfe
Binary files /dev/null and b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/x86/libusb0.sys differ
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/x86/libusb0_x86.dll b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/x86/libusb0_x86.dll
new file mode 100644
index 00000000..2710e966
Binary files /dev/null and b/trunk/AVRProjects/usbasp.2011-05-28/bin/win-driver/libusb_1.2.4.0/x86/libusb0_x86.dll differ
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/circuit/USBasp.sch b/trunk/AVRProjects/usbasp.2011-05-28/circuit/USBasp.sch
new file mode 100644
index 00000000..f9ff4f3d
Binary files /dev/null and b/trunk/AVRProjects/usbasp.2011-05-28/circuit/USBasp.sch differ
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/circuit/USBasp_schematics.pdf b/trunk/AVRProjects/usbasp.2011-05-28/circuit/USBasp_schematics.pdf
new file mode 100644
index 00000000..5cd53da5
Binary files /dev/null and b/trunk/AVRProjects/usbasp.2011-05-28/circuit/USBasp_schematics.pdf differ
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/Makefile b/trunk/AVRProjects/usbasp.2011-05-28/firmware/Makefile
new file mode 100644
index 00000000..9540a4e7
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/Makefile
@@ -0,0 +1,135 @@
+#
+#   Makefile for usbasp
+#   20061119   Thomas Fischl        original
+#   20061120   Hanns-Konrad Unger   help: and TARGET=atmega48 added
+#
+
+# TARGET=atmega8    HFUSE=0xc9  LFUSE=0xef
+# TARGET=atmega48   HFUSE=0xdd  LFUSE=0xff
+# TARGET=at90s2313
+TARGET=atmega168
+HFUSE=0xc9
+LFUSE=0xef
+
+
+# ISP=bsd      PORT=/dev/parport0
+# ISP=ponyser  PORT=/dev/ttyS1
+# ISP=stk500   PORT=/dev/ttyS1
+# ISP=usbasp   PORT=/dev/usb/ttyUSB0
+# ISP=stk500v2 PORT=/dev/ttyUSB0
+ISP=usbasp
+PORT=/dev/usb/ttyUSB0
+
+help:
+	@echo "Usage: make                same as make help"
+	@echo "       make help           same as make"
+	@echo "       make main.hex       create main.hex"
+	@echo "       make clean          remove redundant data"
+	@echo "       make disasm         disasm main"
+	@echo "       make flash          upload main.hex into flash"
+	@echo "       make fuses          program fuses"
+	@echo "       make avrdude        test avrdude"
+	@echo "Current values:"
+	@echo "       TARGET=${TARGET}"
+	@echo "       LFUSE=${LFUSE}"
+	@echo "       HFUSE=${HFUSE}"
+	@echo "       CLOCK=12000000"
+	@echo "       ISP=${ISP}"
+	@echo "       PORT=${PORT}"
+
+COMPILE = avr-gcc -Wall -O2 -Iusbdrv -I. -mmcu=$(TARGET) # -DDEBUG_LEVEL=2
+
+OBJECTS = usbdrv/usbdrv.o usbdrv/usbdrvasm.o usbdrv/oddebug.o isp.o clock.o tpi.o main.o
+
+.c.o:
+	$(COMPILE) -c $< -o $@
+#-Wa,-ahlms=$<.lst
+
+.S.o:
+	$(COMPILE) -x assembler-with-cpp -c $< -o $@
+# "-x assembler-with-cpp" should not be necessary since this is the default
+# file type for the .S (with capital S) extension. However, upper case
+# characters are not always preserved on Windows. To ensure WinAVR
+# compatibility define the file type manually.
+
+.c.s:
+	$(COMPILE) -S $< -o $@
+
+clean:
+	rm -f main.hex main.lst main.obj main.cof main.list main.map main.eep.hex main.bin *.o main.s usbdrv/*.o
+
+# file targets:
+main.bin:	$(OBJECTS)
+	$(COMPILE) -o main.bin $(OBJECTS) -Wl,-Map,main.map
+
+main.hex:	main.bin
+	rm -f main.hex main.eep.hex
+	avr-objcopy -j .text -j .data -O ihex main.bin main.hex
+#	./checksize main.bin
+# do the checksize script as our last action to allow successful compilation
+# on Windows with WinAVR where the Unix commands will fail.
+
+disasm:	main.bin
+	avr-objdump -d main.bin
+
+cpp:
+	$(COMPILE) -E main.c
+
+flash:
+	avrdude -c ${ISP} -p ${TARGET} -P ${PORT} -U flash:w:main.hex
+
+fuses:
+	avrdude -c ${ISP} -p ${TARGET} -P ${PORT} -u -U hfuse:w:$(HFUSE):m -U lfuse:w:$(LFUSE):m
+
+avrdude:
+	avrdude -c ${ISP} -p ${TARGET} -P ${PORT} -v
+
+# Fuse atmega8 high byte HFUSE:
+# 0xc9 = 1 1 0 0   1 0 0 1 <-- BOOTRST (boot reset vector at 0x0000)
+#        ^ ^ ^ ^   ^ ^ ^------ BOOTSZ0
+#        | | | |   | +-------- BOOTSZ1
+#        | | | |   + --------- EESAVE (don't preserve EEPROM over chip erase)
+#        | | | +-------------- CKOPT (full output swing)
+#        | | +---------------- SPIEN (allow serial programming)
+#        | +------------------ WDTON (WDT not always on)
+#        +-------------------- RSTDISBL (reset pin is enabled)
+# Fuse atmega8 low byte LFUSE:
+# 0x9f = 1 0 0 1   1 1 1 1
+#        ^ ^ \ /   \--+--/
+#        | |  |       +------- CKSEL 3..0 (external >8M crystal)
+#        | |  +--------------- SUT 1..0 (crystal osc, BOD enabled)
+#        | +------------------ BODEN (BrownOut Detector enabled)
+#        +-------------------- BODLEVEL (2.7V)
+#
+# Fuse atmega48 high byte hfuse:
+# 0xdf = 1 1 0 1   1 1 1 1     factory setting
+#        ^ ^ ^ ^   ^ \-+-/
+#        | | | |   |   +------ BODLEVEL (Brown out disabled)
+#        | | | |   + --------- EESAVE (don't preserve EEPROM over chip erase)
+#        | | | +-------------- WDTON (WDT not always on)
+#        | | +---------------- SPIEN (allow serial programming)
+#        | +------------------ DWEN (debug wire is disabled)
+#        +-------------------- RSTDISBL (reset pin is enabled)
+# 0xdd = ext.reset, no DW, SPI, no watchdog, no save eeprom, BOD 2.7V
+# Fuse atmega48 low byte lfuse:
+# 0x62 = 0 1 1 0   0 0 1 0     factory setting
+#        ^ ^ \ /   \--+--/
+#        | |  |       +------- CKSEL 3..0 (internal 8Mhz Oszillator)
+#        | |  +--------------- SUT 1..0 (start-up time)
+#        | +------------------ CKOUT (no clock output)
+#        +-------------------- CKDIV8 (divide clock by 8)
+# 0xdc = divide/1,no clock output,fast raising power,low Pw Oszil. 3..8 Mhz
+# 0xe0 = divide/1,no clock output,fast raising power,external Oszil.
+# 0xff = divide/1,no clock output,slow raising power,low Pw Oszil 8..  Mhz
+
+
+SERIAL = `echo /dev/tty.USA19QI*`
+UISP = uisp -dprog=$S -dserial=$(SERIAL) -dpart=auto
+# The two lines above are for "uisp" and the AVR910 serial programmer connected
+# to a Keyspan USB to serial converter to a Mac running Mac OS X.
+# Choose your favorite programmer and interface.
+
+uisp:	all
+	$(UISP) --erase
+	$(UISP) --upload --verify if=main.hex
+
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/clock.c b/trunk/AVRProjects/usbasp.2011-05-28/firmware/clock.c
new file mode 100644
index 00000000..2e9b8331
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/clock.c
@@ -0,0 +1,24 @@
+/*
+ * clock.c - part of USBasp
+ *
+ * Autor..........: Thomas Fischl <tfischl@gmx.de>
+ * Description....: Provides functions for timing/waiting
+ * Licence........: GNU GPL v2 (see Readme.txt)
+ * Creation Date..: 2005-02-23
+ * Last change....: 2005-04-20
+ */
+
+#include <inttypes.h>
+#include <avr/io.h>
+#include "clock.h"
+
+/* wait time * 320 us */
+void clockWait(uint8_t time) {
+
+	uint8_t i;
+	for (i = 0; i < time; i++) {
+		uint8_t starttime = TIMERVALUE;
+		while ((uint8_t) (TIMERVALUE - starttime) < CLOCK_T_320us) {
+		}
+	}
+}
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/clock.h b/trunk/AVRProjects/usbasp.2011-05-28/firmware/clock.h
new file mode 100644
index 00000000..ae60a1ae
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/clock.h
@@ -0,0 +1,28 @@
+/*
+ * clock.h - part of USBasp
+ *
+ * Autor..........: Thomas Fischl <tfischl@gmx.de>
+ * Description....: Provides functions for timing/waiting
+ * Licence........: GNU GPL v2 (see Readme.txt)
+ * Creation Date..: 2005-02-23
+ * Last change....: 2006-11-16
+ */
+
+#ifndef __clock_h_included__
+#define	__clock_h_included__
+
+#define F_CPU           12000000L   /* 12MHz */
+#define TIMERVALUE      TCNT0
+#define CLOCK_T_320us	60
+
+#ifdef __AVR_ATmega8__
+#define TCCR0B  TCCR0
+#endif
+
+/* set prescaler to 64 */
+#define clockInit()  TCCR0B = (1 << CS01) | (1 << CS00);
+
+/* wait time * 320 us */
+void clockWait(uint8_t time);
+
+#endif /* __clock_h_included__ */
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/isp.c b/trunk/AVRProjects/usbasp.2011-05-28/firmware/isp.c
new file mode 100644
index 00000000..5e51bf05
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/isp.c
@@ -0,0 +1,336 @@
+/*
+ * isp.c - part of USBasp
+ *
+ * Autor..........: Thomas Fischl <tfischl@gmx.de>
+ * Description....: Provides functions for communication/programming
+ *                  over ISP interface
+ * Licence........: GNU GPL v2 (see Readme.txt)
+ * Creation Date..: 2005-02-23
+ * Last change....: 2010-01-19
+ */
+
+#include <avr/io.h>
+#include "isp.h"
+#include "clock.h"
+#include "usbasp.h"
+
+#define spiHWdisable() SPCR = 0
+
+uchar sck_sw_delay;
+uchar sck_spcr;
+uchar sck_spsr;
+uchar isp_hiaddr;
+
+void spiHWenable() {
+	SPCR = sck_spcr;
+	SPSR = sck_spsr;
+}
+
+void ispSetSCKOption(uchar option) {
+
+	if (option == USBASP_ISP_SCK_AUTO)
+		option = USBASP_ISP_SCK_375;
+
+	if (option >= USBASP_ISP_SCK_93_75) {
+		ispTransmit = ispTransmit_hw;
+		sck_spsr = 0;
+		sck_sw_delay = 1;	/* force RST#/SCK pulse for 320us */
+
+		switch (option) {
+
+		case USBASP_ISP_SCK_1500:
+			/* enable SPI, master, 1.5MHz, XTAL/8 */
+			sck_spcr = (1 << SPE) | (1 << MSTR) | (1 << SPR0);
+			sck_spsr = (1 << SPI2X);
+		case USBASP_ISP_SCK_750:
+			/* enable SPI, master, 750kHz, XTAL/16 */
+			sck_spcr = (1 << SPE) | (1 << MSTR) | (1 << SPR0);
+			break;
+		case USBASP_ISP_SCK_375:
+		default:
+			/* enable SPI, master, 375kHz, XTAL/32 (default) */
+			sck_spcr = (1 << SPE) | (1 << MSTR) | (1 << SPR1);
+			sck_spsr = (1 << SPI2X);
+			break;
+		case USBASP_ISP_SCK_187_5:
+			/* enable SPI, master, 187.5kHz XTAL/64 */
+			sck_spcr = (1 << SPE) | (1 << MSTR) | (1 << SPR1);
+			break;
+		case USBASP_ISP_SCK_93_75:
+			/* enable SPI, master, 93.75kHz XTAL/128 */
+			sck_spcr = (1 << SPE) | (1 << MSTR) | (1 << SPR1) | (1 << SPR0);
+			break;
+		}
+
+	} else {
+		ispTransmit = ispTransmit_sw;
+		switch (option) {
+
+		case USBASP_ISP_SCK_32:
+			sck_sw_delay = 3;
+
+			break;
+		case USBASP_ISP_SCK_16:
+			sck_sw_delay = 6;
+
+			break;
+		case USBASP_ISP_SCK_8:
+			sck_sw_delay = 12;
+
+			break;
+		case USBASP_ISP_SCK_4:
+			sck_sw_delay = 24;
+
+			break;
+		case USBASP_ISP_SCK_2:
+			sck_sw_delay = 48;
+
+			break;
+		case USBASP_ISP_SCK_1:
+			sck_sw_delay = 96;
+
+			break;
+		case USBASP_ISP_SCK_0_5:
+			sck_sw_delay = 192;
+
+			break;
+		}
+	}
+}
+
+void ispDelay() {
+
+	uint8_t starttime = TIMERVALUE;
+	while ((uint8_t) (TIMERVALUE - starttime) < sck_sw_delay) {
+	}
+}
+
+void ispConnect() {
+
+	/* all ISP pins are inputs before */
+	/* now set output pins */
+	ISP_DDR |= (1 << ISP_RST) | (1 << ISP_SCK) | (1 << ISP_MOSI);
+
+	/* reset device */
+	ISP_OUT &= ~(1 << ISP_RST); /* RST low */
+	ISP_OUT &= ~(1 << ISP_SCK); /* SCK low */
+
+	/* positive reset pulse > 2 SCK (target) */
+	ispDelay();
+	ISP_OUT |= (1 << ISP_RST); /* RST high */
+	ispDelay();
+	ISP_OUT &= ~(1 << ISP_RST); /* RST low */
+
+	if (ispTransmit == ispTransmit_hw) {
+		spiHWenable();
+	}
+	
+	/* Initial extended address value */
+	isp_hiaddr = 0;
+}
+
+void ispDisconnect() {
+
+	/* set all ISP pins inputs */
+	ISP_DDR &= ~((1 << ISP_RST) | (1 << ISP_SCK) | (1 << ISP_MOSI));
+	/* switch pullups off */
+	ISP_OUT &= ~((1 << ISP_RST) | (1 << ISP_SCK) | (1 << ISP_MOSI));
+
+	/* disable hardware SPI */
+	spiHWdisable();
+}
+
+uchar ispTransmit_sw(uchar send_byte) {
+
+	uchar rec_byte = 0;
+	uchar i;
+	for (i = 0; i < 8; i++) {
+
+		/* set MSB to MOSI-pin */
+		if ((send_byte & 0x80) != 0) {
+			ISP_OUT |= (1 << ISP_MOSI); /* MOSI high */
+		} else {
+			ISP_OUT &= ~(1 << ISP_MOSI); /* MOSI low */
+		}
+		/* shift to next bit */
+		send_byte = send_byte << 1;
+
+		/* receive data */
+		rec_byte = rec_byte << 1;
+		if ((ISP_IN & (1 << ISP_MISO)) != 0) {
+			rec_byte++;
+		}
+
+		/* pulse SCK */
+		ISP_OUT |= (1 << ISP_SCK); /* SCK high */
+		ispDelay();
+		ISP_OUT &= ~(1 << ISP_SCK); /* SCK low */
+		ispDelay();
+	}
+
+	return rec_byte;
+}
+
+uchar ispTransmit_hw(uchar send_byte) {
+	SPDR = send_byte;
+
+	while (!(SPSR & (1 << SPIF)))
+		;
+	return SPDR;
+}
+
+uchar ispEnterProgrammingMode() {
+	uchar check;
+	uchar count = 32;
+
+	while (count--) {
+		ispTransmit(0xAC);
+		ispTransmit(0x53);
+		check = ispTransmit(0);
+		ispTransmit(0);
+
+		if (check == 0x53) {
+			return 0;
+		}
+
+		spiHWdisable();
+
+		/* pulse RST */
+		ispDelay();
+		ISP_OUT |= (1 << ISP_RST); /* RST high */
+		ispDelay();
+		ISP_OUT &= ~(1 << ISP_RST); /* RST low */
+		ispDelay();
+
+		if (ispTransmit == ispTransmit_hw) {
+			spiHWenable();
+		}
+
+	}
+
+	return 1; /* error: device dosn't answer */
+}
+
+static void ispUpdateExtended(unsigned long address)
+{
+	uchar curr_hiaddr;
+
+	curr_hiaddr = (address >> 17);
+
+	/* check if extended address byte is changed */
+	if(isp_hiaddr != curr_hiaddr)
+	{
+		isp_hiaddr = curr_hiaddr;
+		/* Load Extended Address byte */
+		ispTransmit(0x4D);
+		ispTransmit(0x00);
+		ispTransmit(isp_hiaddr);
+		ispTransmit(0x00);
+	}
+}
+
+uchar ispReadFlash(unsigned long address) {
+
+	ispUpdateExtended(address);
+
+	ispTransmit(0x20 | ((address & 1) << 3));
+	ispTransmit(address >> 9);
+	ispTransmit(address >> 1);
+	return ispTransmit(0);
+}
+
+uchar ispWriteFlash(unsigned long address, uchar data, uchar pollmode) {
+
+	/* 0xFF is value after chip erase, so skip programming
+	 if (data == 0xFF) {
+	 return 0;
+	 }
+	 */
+
+	ispUpdateExtended(address);
+
+	ispTransmit(0x40 | ((address & 1) << 3));
+	ispTransmit(address >> 9);
+	ispTransmit(address >> 1);
+	ispTransmit(data);
+
+	if (pollmode == 0)
+		return 0;
+
+	if (data == 0x7F) {
+		clockWait(15); /* wait 4,8 ms */
+		return 0;
+	} else {
+
+		/* polling flash */
+		uchar retries = 30;
+		uint8_t starttime = TIMERVALUE;
+		while (retries != 0) {
+			if (ispReadFlash(address) != 0x7F) {
+				return 0;
+			};
+
+			if ((uint8_t) (TIMERVALUE - starttime) > CLOCK_T_320us) {
+				starttime = TIMERVALUE;
+				retries--;
+			}
+
+		}
+		return 1; /* error */
+	}
+
+}
+
+uchar ispFlushPage(unsigned long address, uchar pollvalue) {
+
+	ispUpdateExtended(address);
+	
+	ispTransmit(0x4C);
+	ispTransmit(address >> 9);
+	ispTransmit(address >> 1);
+	ispTransmit(0);
+
+	if (pollvalue == 0xFF) {
+		clockWait(15);
+		return 0;
+	} else {
+
+		/* polling flash */
+		uchar retries = 30;
+		uint8_t starttime = TIMERVALUE;
+
+		while (retries != 0) {
+			if (ispReadFlash(address) != 0xFF) {
+				return 0;
+			};
+
+			if ((uint8_t) (TIMERVALUE - starttime) > CLOCK_T_320us) {
+				starttime = TIMERVALUE;
+				retries--;
+			}
+
+		}
+
+		return 1; /* error */
+	}
+
+}
+
+uchar ispReadEEPROM(unsigned int address) {
+	ispTransmit(0xA0);
+	ispTransmit(address >> 8);
+	ispTransmit(address);
+	return ispTransmit(0);
+}
+
+uchar ispWriteEEPROM(unsigned int address, uchar data) {
+
+	ispTransmit(0xC0);
+	ispTransmit(address >> 8);
+	ispTransmit(address);
+	ispTransmit(data);
+
+	clockWait(30); // wait 9,6 ms
+
+	return 0;
+}
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/isp.h b/trunk/AVRProjects/usbasp.2011-05-28/firmware/isp.h
new file mode 100644
index 00000000..2300a58c
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/isp.h
@@ -0,0 +1,65 @@
+/*
+ * isp.h - part of USBasp
+ *
+ * Autor..........: Thomas Fischl <tfischl@gmx.de>
+ * Description....: Provides functions for communication/programming
+ *                  over ISP interface
+ * Licence........: GNU GPL v2 (see Readme.txt)
+ * Creation Date..: 2005-02-23
+ * Last change....: 2009-02-28
+ */
+
+#ifndef __isp_h_included__
+#define	__isp_h_included__
+
+#ifndef uchar
+#define	uchar	unsigned char
+#endif
+
+#define	ISP_OUT   PORTB
+#define ISP_IN    PINB
+#define ISP_DDR   DDRB
+#define ISP_RST   PB2
+#define ISP_MOSI  PB3
+#define ISP_MISO  PB4
+#define ISP_SCK   PB5
+
+/* Prepare connection to target device */
+void ispConnect();
+
+/* Close connection to target device */
+void ispDisconnect();
+
+/* read an write a byte from isp using software (slow) */
+uchar ispTransmit_sw(uchar send_byte);
+
+/* read an write a byte from isp using hardware (fast) */
+uchar ispTransmit_hw(uchar send_byte);
+
+/* enter programming mode */
+uchar ispEnterProgrammingMode();
+
+/* read byte from eeprom at given address */
+uchar ispReadEEPROM(unsigned int address);
+
+/* write byte to flash at given address */
+uchar ispWriteFlash(unsigned long address, uchar data, uchar pollmode);
+
+uchar ispFlushPage(unsigned long address, uchar pollvalue);
+
+/* read byte from flash at given address */
+uchar ispReadFlash(unsigned long address);
+
+/* write byte to eeprom at given address */
+uchar ispWriteEEPROM(unsigned int address, uchar data);
+
+/* pointer to sw or hw transmit function */
+uchar (*ispTransmit)(uchar);
+
+/* set SCK speed. call before ispConnect! */
+void ispSetSCKOption(uchar sckoption);
+
+/* load extended address byte */
+void ispLoadExtendedAddressByte(unsigned long address);
+
+#endif /* __isp_h_included__ */
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/main.bin b/trunk/AVRProjects/usbasp.2011-05-28/firmware/main.bin
new file mode 100644
index 00000000..f3029351
Binary files /dev/null and b/trunk/AVRProjects/usbasp.2011-05-28/firmware/main.bin differ
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/main.c b/trunk/AVRProjects/usbasp.2011-05-28/firmware/main.c
new file mode 100644
index 00000000..a225432e
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/main.c
@@ -0,0 +1,340 @@
+/*
+ * USBasp - USB in-circuit programmer for Atmel AVR controllers
+ *
+ * Thomas Fischl <tfischl@gmx.de>
+ *
+ * License........: GNU GPL v2 (see Readme.txt)
+ * Target.........: ATMega8 at 12 MHz
+ * Creation Date..: 2005-02-20
+ * Last change....: 2009-02-28
+ *
+ * PC2 SCK speed option.
+ * GND  -> slow (8khz SCK),
+ * open -> software set speed (default is 375kHz SCK)
+ */
+
+#include <avr/io.h>
+#include <avr/interrupt.h>
+#include <avr/pgmspace.h>
+#include <avr/wdt.h>
+
+#include "usbasp.h"
+#include "usbdrv.h"
+#include "isp.h"
+#include "clock.h"
+#include "tpi.h"
+#include "tpi_defs.h"
+
+static uchar replyBuffer[8];
+
+static uchar prog_state = PROG_STATE_IDLE;
+static uchar prog_sck = USBASP_ISP_SCK_AUTO;
+
+static uchar prog_address_newmode = 0;
+static unsigned long prog_address;
+static unsigned int prog_nbytes = 0;
+static unsigned int prog_pagesize;
+static uchar prog_blockflags;
+static uchar prog_pagecounter;
+
+uchar usbFunctionSetup(uchar data[8]) {
+
+	uchar len = 0;
+
+	if (data[1] == USBASP_FUNC_CONNECT) {
+
+		/* set SCK speed */
+		if ((PINC & (1 << PC2)) == 0) {
+			ispSetSCKOption(USBASP_ISP_SCK_8);
+		} else {
+			ispSetSCKOption(prog_sck);
+		}
+
+		/* set compatibility mode of address delivering */
+		prog_address_newmode = 0;
+
+		ledRedOn();
+		ispConnect();
+
+	} else if (data[1] == USBASP_FUNC_DISCONNECT) {
+		ispDisconnect();
+		ledRedOff();
+
+	} else if (data[1] == USBASP_FUNC_TRANSMIT) {
+		replyBuffer[0] = ispTransmit(data[2]);
+		replyBuffer[1] = ispTransmit(data[3]);
+		replyBuffer[2] = ispTransmit(data[4]);
+		replyBuffer[3] = ispTransmit(data[5]);
+		len = 4;
+
+	} else if (data[1] == USBASP_FUNC_READFLASH) {
+
+		if (!prog_address_newmode)
+			prog_address = (data[3] << 8) | data[2];
+
+		prog_nbytes = (data[7] << 8) | data[6];
+		prog_state = PROG_STATE_READFLASH;
+		len = 0xff; /* multiple in */
+
+	} else if (data[1] == USBASP_FUNC_READEEPROM) {
+
+		if (!prog_address_newmode)
+			prog_address = (data[3] << 8) | data[2];
+
+		prog_nbytes = (data[7] << 8) | data[6];
+		prog_state = PROG_STATE_READEEPROM;
+		len = 0xff; /* multiple in */
+
+	} else if (data[1] == USBASP_FUNC_ENABLEPROG) {
+		replyBuffer[0] = ispEnterProgrammingMode();
+		len = 1;
+
+	} else if (data[1] == USBASP_FUNC_WRITEFLASH) {
+
+		if (!prog_address_newmode)
+			prog_address = (data[3] << 8) | data[2];
+
+		prog_pagesize = data[4];
+		prog_blockflags = data[5] & 0x0F;
+		prog_pagesize += (((unsigned int) data[5] & 0xF0) << 4);
+		if (prog_blockflags & PROG_BLOCKFLAG_FIRST) {
+			prog_pagecounter = prog_pagesize;
+		}
+		prog_nbytes = (data[7] << 8) | data[6];
+		prog_state = PROG_STATE_WRITEFLASH;
+		len = 0xff; /* multiple out */
+
+	} else if (data[1] == USBASP_FUNC_WRITEEEPROM) {
+
+		if (!prog_address_newmode)
+			prog_address = (data[3] << 8) | data[2];
+
+		prog_pagesize = 0;
+		prog_blockflags = 0;
+		prog_nbytes = (data[7] << 8) | data[6];
+		prog_state = PROG_STATE_WRITEEEPROM;
+		len = 0xff; /* multiple out */
+
+	} else if (data[1] == USBASP_FUNC_SETLONGADDRESS) {
+
+		/* set new mode of address delivering (ignore address delivered in commands) */
+		prog_address_newmode = 1;
+		/* set new address */
+		prog_address = *((unsigned long*) &data[2]);
+
+	} else if (data[1] == USBASP_FUNC_SETISPSCK) {
+
+		/* set sck option */
+		prog_sck = data[2];
+		replyBuffer[0] = 0;
+		len = 1;
+
+	} else if (data[1] == USBASP_FUNC_TPI_CONNECT) {
+		tpi_dly_cnt = data[2] | (data[3] << 8);
+
+		/* RST high */
+		ISP_OUT |= (1 << ISP_RST);
+		ISP_DDR |= (1 << ISP_RST);
+
+		clockWait(3);
+
+		/* RST low */
+		ISP_OUT &= ~(1 << ISP_RST);
+		ledRedOn();
+
+		clockWait(16);
+		tpi_init();
+	
+	} else if (data[1] == USBASP_FUNC_TPI_DISCONNECT) {
+
+		tpi_send_byte(TPI_OP_SSTCS(TPISR));
+		tpi_send_byte(0);
+
+		clockWait(10);
+
+		/* pulse RST */
+		ISP_OUT |= (1 << ISP_RST);
+		clockWait(5);
+		ISP_OUT &= ~(1 << ISP_RST);
+		clockWait(5);
+
+		/* set all ISP pins inputs */
+		ISP_DDR &= ~((1 << ISP_RST) | (1 << ISP_SCK) | (1 << ISP_MOSI));
+		/* switch pullups off */
+		ISP_OUT &= ~((1 << ISP_RST) | (1 << ISP_SCK) | (1 << ISP_MOSI));
+
+		ledRedOff();
+	
+	} else if (data[1] == USBASP_FUNC_TPI_RAWREAD) {
+		replyBuffer[0] = tpi_recv_byte();
+		len = 1;
+	
+	} else if (data[1] == USBASP_FUNC_TPI_RAWWRITE) {
+		tpi_send_byte(data[2]);
+	
+	} else if (data[1] == USBASP_FUNC_TPI_READBLOCK) {
+		prog_address = (data[3] << 8) | data[2];
+		prog_nbytes = (data[7] << 8) | data[6];
+		prog_state = PROG_STATE_TPI_READ;
+		len = 0xff; /* multiple in */
+	
+	} else if (data[1] == USBASP_FUNC_TPI_WRITEBLOCK) {
+		prog_address = (data[3] << 8) | data[2];
+		prog_nbytes = (data[7] << 8) | data[6];
+		prog_state = PROG_STATE_TPI_WRITE;
+		len = 0xff; /* multiple out */
+	
+	} else if (data[1] == USBASP_FUNC_GETCAPABILITIES) {
+		replyBuffer[0] = USBASP_CAP_0_TPI;
+		replyBuffer[1] = 0;
+		replyBuffer[2] = 0;
+		replyBuffer[3] = 0;
+		len = 4;
+	}
+
+	usbMsgPtr = replyBuffer;
+
+	return len;
+}
+
+uchar usbFunctionRead(uchar *data, uchar len) {
+
+	uchar i;
+
+	/* check if programmer is in correct read state */
+	if ((prog_state != PROG_STATE_READFLASH) && (prog_state
+			!= PROG_STATE_READEEPROM) && (prog_state != PROG_STATE_TPI_READ)) {
+		return 0xff;
+	}
+
+	/* fill packet TPI mode */
+	if(prog_state == PROG_STATE_TPI_READ)
+	{
+		tpi_read_block(prog_address, data, len);
+		prog_address += len;
+		return len;
+	}
+
+	/* fill packet ISP mode */
+	for (i = 0; i < len; i++) {
+		if (prog_state == PROG_STATE_READFLASH) {
+			data[i] = ispReadFlash(prog_address);
+		} else {
+			data[i] = ispReadEEPROM(prog_address);
+		}
+		prog_address++;
+	}
+
+	/* last packet? */
+	if (len < 8) {
+		prog_state = PROG_STATE_IDLE;
+	}
+
+	return len;
+}
+
+uchar usbFunctionWrite(uchar *data, uchar len) {
+
+	uchar retVal = 0;
+	uchar i;
+
+	/* check if programmer is in correct write state */
+	if ((prog_state != PROG_STATE_WRITEFLASH) && (prog_state
+			!= PROG_STATE_WRITEEEPROM) && (prog_state != PROG_STATE_TPI_WRITE)) {
+		return 0xff;
+	}
+
+	if (prog_state == PROG_STATE_TPI_WRITE)
+	{
+		tpi_write_block(prog_address, data, len);
+		prog_address += len;
+		prog_nbytes -= len;
+		if(prog_nbytes <= 0)
+		{
+			prog_state = PROG_STATE_IDLE;
+			return 1;
+		}
+		return 0;
+	}
+
+	for (i = 0; i < len; i++) {
+
+		if (prog_state == PROG_STATE_WRITEFLASH) {
+			/* Flash */
+
+			if (prog_pagesize == 0) {
+				/* not paged */
+				ispWriteFlash(prog_address, data[i], 1);
+			} else {
+				/* paged */
+				ispWriteFlash(prog_address, data[i], 0);
+				prog_pagecounter--;
+				if (prog_pagecounter == 0) {
+					ispFlushPage(prog_address, data[i]);
+					prog_pagecounter = prog_pagesize;
+				}
+			}
+
+		} else {
+			/* EEPROM */
+			ispWriteEEPROM(prog_address, data[i]);
+		}
+
+		prog_nbytes--;
+
+		if (prog_nbytes == 0) {
+			prog_state = PROG_STATE_IDLE;
+			if ((prog_blockflags & PROG_BLOCKFLAG_LAST) && (prog_pagecounter
+					!= prog_pagesize)) {
+
+				/* last block and page flush pending, so flush it now */
+				ispFlushPage(prog_address, data[i]);
+			}
+
+			retVal = 1; // Need to return 1 when no more data is to be received
+		}
+
+		prog_address++;
+	}
+
+	return retVal;
+}
+
+int main(void) {
+	uchar i, j;
+
+	/* no pullups on USB and ISP pins */
+	PORTD = 0;
+	PORTB = 0;
+	/* all outputs except PD2 = INT0 */
+	DDRD = ~(1 << 2);
+
+	/* output SE0 for USB reset */
+	DDRB = ~0;
+	j = 0;
+	/* USB Reset by device only required on Watchdog Reset */
+	while (--j) {
+		i = 0;
+		/* delay >10ms for USB reset */
+		while (--i)
+			;
+	}
+	/* all USB and ISP pins inputs */
+	DDRB = 0;
+
+	/* all inputs except PC0, PC1 */
+	DDRC = 0x03;
+	PORTC = 0xfe;
+
+	/* init timer */
+	clockInit();
+
+	/* main event loop */
+	usbInit();
+	sei();
+	for (;;) {
+		usbPoll();
+	}
+	return 0;
+}
+
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/main.hex b/trunk/AVRProjects/usbasp.2011-05-28/firmware/main.hex
new file mode 100644
index 00000000..b1f56e0a
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/main.hex
@@ -0,0 +1,305 @@
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+:101290000E94730584B1837D84B985B1837D85B94E
+:1012A000419A80E0C8E0D1E08CCE0E94B305C8E04E
+:1012B000D1E08093080181E084CED80112968C9110
+:1012C0000E94900580E0C8E0D1E07BCEC8E0D1E08C
+:1012D00081E0809308011092090110920A01109296
+:0A12E0000B0184E06ECEF894FFCFFE
+:0212EA005AFFA9
+:00000001FF
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/main.map b/trunk/AVRProjects/usbasp.2011-05-28/firmware/main.map
new file mode 100644
index 00000000..979cb5f5
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/main.map
@@ -0,0 +1,449 @@
+Archive member included because of file (symbol)
+
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_exit.o)
+                              c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5/crtm168.o (exit)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_copy_data.o)
+                              usbdrv/usbdrv.o (__do_copy_data)
+c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_clear_bss.o)
+                              usbdrv/usbdrv.o (__do_clear_bss)
+
+Allocating common symbols
+Common symbol       size              file
+
+usbTxBuf            0xb               usbdrv/usbdrv.o
+tpi_dly_cnt         0x2               tpi.o
+usbDeviceAddr       0x1               usbdrv/usbdrv.o
+usbRxToken          0x1               usbdrv/usbdrv.o
+usbInputBufOffset   0x1               usbdrv/usbdrv.o
+sck_spsr            0x1               isp.o
+ispTransmit         0x2               isp.o
+sck_spcr            0x1               isp.o
+usbMsgPtr           0x2               usbdrv/usbdrv.o
+isp_hiaddr          0x1               isp.o
+usbRxLen            0x1               usbdrv/usbdrv.o
+usbNewDeviceAddr    0x1               usbdrv/usbdrv.o
+usbCurrentTok       0x1               usbdrv/usbdrv.o
+usbConfiguration    0x1               usbdrv/usbdrv.o
+usbRxBuf            0x16              usbdrv/usbdrv.o
+sck_sw_delay        0x1               isp.o
+
+Memory Configuration
+
+Name             Origin             Length             Attributes
+text             0x00000000         0x00020000         xr
+data             0x00800060         0x0000ffa0         rw !x
+eeprom           0x00810000         0x00010000         rw !x
+fuse             0x00820000         0x00000400         rw !x
+lock             0x00830000         0x00000400         rw !x
+signature        0x00840000         0x00000400         rw !x
+*default*        0x00000000         0xffffffff
+
+Linker script and memory map
+
+Address of section .data set to 0x800100
+LOAD c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5/crtm168.o
+LOAD usbdrv/usbdrv.o
+LOAD usbdrv/usbdrvasm.o
+LOAD usbdrv/oddebug.o
+LOAD isp.o
+LOAD clock.o
+LOAD tpi.o
+LOAD main.o
+LOAD c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a
+LOAD c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5\libc.a
+LOAD c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a
+
+.hash
+ *(.hash)
+
+.dynsym
+ *(.dynsym)
+
+.dynstr
+ *(.dynstr)
+
+.gnu.version
+ *(.gnu.version)
+
+.gnu.version_d
+ *(.gnu.version_d)
+
+.gnu.version_r
+ *(.gnu.version_r)
+
+.rel.init
+ *(.rel.init)
+
+.rela.init
+ *(.rela.init)
+
+.rel.text
+ *(.rel.text)
+ *(.rel.text.*)
+ *(.rel.gnu.linkonce.t*)
+
+.rela.text
+ *(.rela.text)
+ *(.rela.text.*)
+ *(.rela.gnu.linkonce.t*)
+
+.rel.fini
+ *(.rel.fini)
+
+.rela.fini
+ *(.rela.fini)
+
+.rel.rodata
+ *(.rel.rodata)
+ *(.rel.rodata.*)
+ *(.rel.gnu.linkonce.r*)
+
+.rela.rodata
+ *(.rela.rodata)
+ *(.rela.rodata.*)
+ *(.rela.gnu.linkonce.r*)
+
+.rel.data
+ *(.rel.data)
+ *(.rel.data.*)
+ *(.rel.gnu.linkonce.d*)
+
+.rela.data
+ *(.rela.data)
+ *(.rela.data.*)
+ *(.rela.gnu.linkonce.d*)
+
+.rel.ctors
+ *(.rel.ctors)
+
+.rela.ctors
+ *(.rela.ctors)
+
+.rel.dtors
+ *(.rel.dtors)
+
+.rela.dtors
+ *(.rela.dtors)
+
+.rel.got
+ *(.rel.got)
+
+.rela.got
+ *(.rela.got)
+
+.rel.bss
+ *(.rel.bss)
+
+.rela.bss
+ *(.rela.bss)
+
+.rel.plt
+ *(.rel.plt)
+
+.rela.plt
+ *(.rela.plt)
+
+.text           0x00000000     0x12ea
+ *(.vectors)
+ .vectors       0x00000000       0x68 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5/crtm168.o
+                0x00000000                __vectors
+                0x00000000                __vector_default
+ *(.vectors)
+ *(.progmem.gcc*)
+ *(.progmem*)
+ .progmem.data  0x00000068       0x52 usbdrv/usbdrv.o
+                0x00000096                usbDescriptorDevice
+                0x00000068                usbDescriptorString0
+                0x000000a8                usbDescriptorConfiguration
+                0x0000006c                usbDescriptorStringVendor
+                0x00000088                usbDescriptorStringDevice
+                0x000000ba                . = ALIGN (0x2)
+                0x000000ba                __trampolines_start = .
+ *(.trampolines)
+ .trampolines   0x000000ba        0x0 linker stubs
+ *(.trampolines*)
+                0x000000ba                __trampolines_end = .
+ *(.jumptables)
+ *(.jumptables*)
+ *(.lowtext)
+ *(.lowtext*)
+                0x000000ba                __ctors_start = .
+ *(.ctors)
+                0x000000ba                __ctors_end = .
+                0x000000ba                __dtors_start = .
+ *(.dtors)
+                0x000000ba                __dtors_end = .
+ SORT(*)(.ctors)
+ SORT(*)(.dtors)
+ *(.init0)
+ .init0         0x000000ba        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5/crtm168.o
+                0x000000ba                __init
+ *(.init0)
+ *(.init1)
+ *(.init1)
+ *(.init2)
+ .init2         0x000000ba        0xc c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5/crtm168.o
+ *(.init2)
+ *(.init3)
+ *(.init3)
+ *(.init4)
+ .init4         0x000000c6       0x16 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_copy_data.o)
+                0x000000c6                __do_copy_data
+ .init4         0x000000dc       0x10 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_clear_bss.o)
+                0x000000dc                __do_clear_bss
+ *(.init4)
+ *(.init5)
+ *(.init5)
+ *(.init6)
+ *(.init6)
+ *(.init7)
+ *(.init7)
+ *(.init8)
+ *(.init8)
+ *(.init9)
+ .init9         0x000000ec        0x8 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5/crtm168.o
+ *(.init9)
+ *(.text)
+ .text          0x000000f4        0x4 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5/crtm168.o
+                0x000000f4                __vector_22
+                0x000000f4                __vector_24
+                0x000000f4                __vector_12
+                0x000000f4                __bad_interrupt
+                0x000000f4                __vector_6
+                0x000000f4                __vector_3
+                0x000000f4                __vector_23
+                0x000000f4                __vector_25
+                0x000000f4                __vector_11
+                0x000000f4                __vector_13
+                0x000000f4                __vector_17
+                0x000000f4                __vector_19
+                0x000000f4                __vector_7
+                0x000000f4                __vector_5
+                0x000000f4                __vector_4
+                0x000000f4                __vector_9
+                0x000000f4                __vector_2
+                0x000000f4                __vector_21
+                0x000000f4                __vector_15
+                0x000000f4                __vector_8
+                0x000000f4                __vector_14
+                0x000000f4                __vector_10
+                0x000000f4                __vector_16
+                0x000000f4                __vector_18
+                0x000000f4                __vector_20
+ .text          0x000000f8      0x26e usbdrv/usbdrv.o
+                0x00000106                usbPoll
+                0x000000f8                usbInit
+ .text          0x00000366      0x28c usbdrv/usbdrvasm.o
+                0x00000398                __vector_1
+                0x00000366                usbCrc16
+                0x00000390                usbCrc16Append
+ .text          0x000005f2        0x0 usbdrv/oddebug.o
+ .text          0x000005f2      0x4f4 isp.o
+                0x00000734                ispDisconnect
+                0x00000600                ispSetSCKOption
+                0x00000972                ispFlushPage
+                0x00000786                ispTransmit_hw
+                0x00000880                ispReadFlash
+                0x00000a2a                ispWriteFlash
+                0x00000744                ispTransmit_sw
+                0x000008ec                ispReadEEPROM
+                0x000005f2                spiHWenable
+                0x00000792                ispEnterProgrammingMode
+                0x000006e8                ispConnect
+                0x00000928                ispWriteEEPROM
+                0x000006d8                ispDelay
+ .text          0x00000ae6       0x1a clock.o
+                0x00000ae6                clockWait
+ .text          0x00000b00       0xd2 tpi.o
+                0x00000b66                tpi_recv_byte
+                0x00000b98                tpi_read_block
+                0x00000bac                tpi_write_block
+                0x00000b20                tpi_send_byte
+                0x00000b00                tpi_init
+ .text          0x00000bd2      0x714 main.o
+                0x00000e9c                usbFunctionSetup
+                0x00000bd2                main
+                0x00000dae                usbFunctionRead
+                0x00000bf6                usbFunctionWrite
+ .text          0x000012e6        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_exit.o)
+ .text          0x000012e6        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_copy_data.o)
+ .text          0x000012e6        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_clear_bss.o)
+                0x000012e6                . = ALIGN (0x2)
+ *(.text.*)
+ .text.libgcc   0x000012e6        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_exit.o)
+ .text.libgcc   0x000012e6        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_copy_data.o)
+ .text.libgcc   0x000012e6        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_clear_bss.o)
+                0x000012e6                . = ALIGN (0x2)
+ *(.fini9)
+ .fini9         0x000012e6        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_exit.o)
+                0x000012e6                exit
+                0x000012e6                _exit
+ *(.fini9)
+ *(.fini8)
+ *(.fini8)
+ *(.fini7)
+ *(.fini7)
+ *(.fini6)
+ *(.fini6)
+ *(.fini5)
+ *(.fini5)
+ *(.fini4)
+ *(.fini4)
+ *(.fini3)
+ *(.fini3)
+ *(.fini2)
+ *(.fini2)
+ *(.fini1)
+ *(.fini1)
+ *(.fini0)
+ .fini0         0x000012e6        0x4 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_exit.o)
+ *(.fini0)
+                0x000012ea                _etext = .
+
+.data           0x00800100        0x2 load address 0x000012ea
+                0x00800100                PROVIDE (__data_start, .)
+ *(.data)
+ .data          0x00800100        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5/crtm168.o
+ .data          0x00800100        0x2 usbdrv/usbdrv.o
+                0x00800100                usbTxLen
+ .data          0x00800102        0x0 usbdrv/usbdrvasm.o
+ .data          0x00800102        0x0 usbdrv/oddebug.o
+ .data          0x00800102        0x0 isp.o
+ .data          0x00800102        0x0 clock.o
+ .data          0x00800102        0x0 tpi.o
+ .data          0x00800102        0x0 main.o
+ .data          0x00800102        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_exit.o)
+ .data          0x00800102        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_copy_data.o)
+ .data          0x00800102        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_clear_bss.o)
+ *(.data*)
+ *(.rodata)
+ *(.rodata*)
+ *(.gnu.linkonce.d*)
+                0x00800102                . = ALIGN (0x2)
+                0x00800102                _edata = .
+                0x00800102                PROVIDE (__data_end, .)
+
+.bss            0x00800102       0x48
+                0x00800102                PROVIDE (__bss_start, .)
+ *(.bss)
+ .bss           0x00800102        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/../../../../avr/lib/avr5/crtm168.o
+ .bss           0x00800102        0x1 usbdrv/usbdrv.o
+ .bss           0x00800103        0x0 usbdrv/usbdrvasm.o
+ .bss           0x00800103        0x0 usbdrv/oddebug.o
+ .bss           0x00800103        0x0 isp.o
+ .bss           0x00800103        0x0 clock.o
+ .bss           0x00800103        0x0 tpi.o
+ .bss           0x00800103       0x15 main.o
+ .bss           0x00800118        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_exit.o)
+ .bss           0x00800118        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_copy_data.o)
+ .bss           0x00800118        0x0 c:/program files/winavr-20100110/bin/../lib/gcc/avr/4.3.3/avr5\libgcc.a(_clear_bss.o)
+ *(.bss*)
+ *(COMMON)
+ COMMON         0x00800118       0x2a usbdrv/usbdrv.o
+                0x00800118                usbTxBuf
+                0x00800123                usbDeviceAddr
+                0x00800124                usbRxToken
+                0x00800125                usbInputBufOffset
+                0x00800126                usbMsgPtr
+                0x00800128                usbRxLen
+                0x00800129                usbNewDeviceAddr
+                0x0080012a                usbCurrentTok
+                0x0080012b                usbConfiguration
+                0x0080012c                usbRxBuf
+ COMMON         0x00800142        0x6 isp.o
+                0x00800142                sck_spsr
+                0x00800143                ispTransmit
+                0x00800145                sck_spcr
+                0x00800146                isp_hiaddr
+                0x00800147                sck_sw_delay
+ COMMON         0x00800148        0x2 tpi.o
+                0x00800148                tpi_dly_cnt
+                0x0080014a                PROVIDE (__bss_end, .)
+                0x000012ea                __data_load_start = LOADADDR (.data)
+                0x000012ec                __data_load_end = (__data_load_start + SIZEOF (.data))
+
+.noinit         0x0080014a        0x0
+                0x0080014a                PROVIDE (__noinit_start, .)
+ *(.noinit*)
+                0x0080014a                PROVIDE (__noinit_end, .)
+                0x0080014a                _end = .
+                0x0080014a                PROVIDE (__heap_start, .)
+
+.eeprom         0x00810000        0x0
+ *(.eeprom*)
+                0x00810000                __eeprom_end = .
+
+.fuse
+ *(.fuse)
+ *(.lfuse)
+ *(.hfuse)
+ *(.efuse)
+
+.lock
+ *(.lock*)
+
+.signature
+ *(.signature*)
+
+.stab
+ *(.stab)
+
+.stabstr
+ *(.stabstr)
+
+.stab.excl
+ *(.stab.excl)
+
+.stab.exclstr
+ *(.stab.exclstr)
+
+.stab.index
+ *(.stab.index)
+
+.stab.indexstr
+ *(.stab.indexstr)
+
+.comment
+ *(.comment)
+
+.debug
+ *(.debug)
+
+.line
+ *(.line)
+
+.debug_srcinfo
+ *(.debug_srcinfo)
+
+.debug_sfnames
+ *(.debug_sfnames)
+
+.debug_aranges
+ *(.debug_aranges)
+
+.debug_pubnames
+ *(.debug_pubnames)
+
+.debug_info
+ *(.debug_info)
+ *(.gnu.linkonce.wi.*)
+
+.debug_abbrev
+ *(.debug_abbrev)
+
+.debug_line
+ *(.debug_line)
+
+.debug_frame
+ *(.debug_frame)
+
+.debug_str
+ *(.debug_str)
+
+.debug_loc
+ *(.debug_loc)
+
+.debug_macinfo
+ *(.debug_macinfo)
+OUTPUT(main.bin elf32-avr)
+LOAD linker stubs
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/tpi.S b/trunk/AVRProjects/usbasp.2011-05-28/firmware/tpi.S
new file mode 100644
index 00000000..d8dc4e19
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/tpi.S
@@ -0,0 +1,258 @@
+/**
+ * \brief Size-optimized code for TPI
+ * \file tpi.s
+ * \author S³awomir Fraœ
+ */
+#include <avr/io.h>
+#include "tpi_defs.h"
+
+
+#define TPI_CLK_PORT PORTB
+#define TPI_CLK_DDR DDRB
+#define TPI_CLK_BIT 5
+#define TPI_DATAOUT_PORT PORTB
+#define TPI_DATAOUT_DDR DDRB
+#define TPI_DATAOUT_BIT 3
+#ifdef TPI_WITH_OPTO
+#	define TPI_DATAIN_PIN PINB
+#	define TPI_DATAIN_DDR DDRB
+#	define TPI_DATAIN_BIT 4
+#else
+#	define TPI_DATAIN_PIN PINB
+#	define TPI_DATAIN_BIT 3
+#endif
+
+.comm tpi_dly_cnt, 2
+
+
+/**
+ * TPI init
+ */
+.global tpi_init
+tpi_init:
+	/* CLK <= out */
+	sbi _SFR_IO_ADDR(TPI_CLK_DDR), TPI_CLK_BIT
+#ifdef TPI_WITH_OPTO
+	/* DATAIN <= pull-up */
+	cbi _SFR_IO_ADDR(TPI_DATAIN_DDR), TPI_DATAIN_BIT
+	sbi _SFR_IO_ADDR(TPI_DATAIN_PORT), TPI_DATAIN_BIT
+	/* DATAOUT <= high */
+	sbi _SFR_IO_ADDR(TPI_DATAOUT_DDR), TPI_DATAOUT_BIT
+	sbi _SFR_IO_ADDR(TPI_DATAOUT_PORT), TPI_DATAOUT_BIT
+#else
+	/* DATA <= pull-up */
+	cbi _SFR_IO_ADDR(TPI_DATAOUT_DDR), TPI_DATAOUT_BIT
+	sbi _SFR_IO_ADDR(TPI_DATAOUT_PORT), TPI_DATAOUT_BIT
+#endif
+
+	/* 32 bits */
+	ldi r21, 32
+1:
+		rcall tpi_bit_h
+	dec r21
+	brne 1b
+
+	ret
+
+
+/**
+ * Update PR
+ * in: r25:r24 <= PR
+ * lost: r18-r21,r24,r30-r31
+ */
+tpi_pr_update:
+	movw r20, r24
+	ldi r24, TPI_OP_SSTPR(0)
+	rcall tpi_send_byte
+	mov r24, r20
+	rcall tpi_send_byte
+	ldi r24, TPI_OP_SSTPR(1)
+	rcall tpi_send_byte
+	mov r24, r21
+//	rjmp tpi_send_byte
+
+
+/**
+ * Send one byte
+ * in: r24 <= byte
+ * lost: r18-r19,r30-r31
+ */
+.global tpi_send_byte
+tpi_send_byte:
+	/* start bit */
+	rcall tpi_bit_l
+	/* 8 data bits */
+	ldi r18, 8
+	ldi r19, 0
+1:
+		// parity
+		eor r19, r24
+		// get bit, shift
+		bst r24, 0
+		lsr r24
+		// send
+		rcall tpi_bit
+	dec r18
+	brne 1b
+	/* parity bit */
+	bst r19, 0
+	rcall tpi_bit
+	/* 2 stop bits */
+	rcall tpi_bit_h
+//	rjmp tpi_bit_h
+
+
+/**
+ * Exchange of one bit
+ * in: T <= bit_in
+ * out: T => bit_out
+ * lost: r30-r31
+ */
+tpi_bit_h:
+	set
+tpi_bit:
+	/* TPIDATA = T */
+#ifdef TPI_WITH_OPTO
+	// DATAOUT = high (opto should allow TPIDATA to be pulled low by external device)
+	// if(T == 0)
+	//   DATAOUT = low
+	sbi _SFR_IO_ADDR(TPI_DATAOUT_PORT), TPI_DATAOUT_BIT
+	brts 1f
+tpi_bit_l:
+		cbi _SFR_IO_ADDR(TPI_DATAOUT_PORT), TPI_DATAOUT_BIT
+1:
+#else
+	// DATAOUT = pull-up
+	// if(T == 0)
+	//   DATAOUT = low
+	cbi _SFR_IO_ADDR(TPI_DATAOUT_DDR), TPI_DATAOUT_BIT
+	sbi _SFR_IO_ADDR(TPI_DATAOUT_PORT), TPI_DATAOUT_BIT
+	brts 1f
+tpi_bit_l:
+		cbi _SFR_IO_ADDR(TPI_DATAOUT_PORT), TPI_DATAOUT_BIT
+		sbi _SFR_IO_ADDR(TPI_DATAOUT_DDR), TPI_DATAOUT_BIT
+1:
+#endif
+	/* delay(); */
+	lds r30, tpi_dly_cnt
+	lds r31, tpi_dly_cnt+1
+1:
+		sbiw r30, 1
+	brsh 1b
+	/* TPICLK = 1 */
+	sbi _SFR_IO_ADDR(TPI_CLK_PORT), TPI_CLK_BIT
+	/* T = TPIDATA */
+	in r30, _SFR_IO_ADDR(TPI_DATAIN_PIN)
+	bst r30, TPI_DATAIN_BIT
+	/* delay(); */
+	lds r30, tpi_dly_cnt
+	lds r31, tpi_dly_cnt+1
+1:
+		sbiw r30, 1
+	brsh 1b
+
+	/* TPICLK = 0 */
+	cbi _SFR_IO_ADDR(TPI_CLK_PORT), TPI_CLK_BIT
+	ret
+
+
+/**
+ * Receive one byte
+ * out: r24 => byte
+ * lost: r18-r19,r30-r31
+ */
+.global tpi_recv_byte
+tpi_recv_byte:
+	/* waitfor(start_bit, 192); */
+	ldi r18, 192
+1:
+		rcall tpi_bit_h
+		brtc .tpi_recv_found_start
+	dec r18
+	brne 1b
+	/* no start bit: set return value */
+.tpi_break_ret0:
+	ldi r24, 0
+	/* send 2 breaks (24++ bits) */
+	ldi r18, 26
+1:
+		rcall tpi_bit_l
+	dec r18
+	brne 1b
+	/* send hi */
+	rjmp tpi_bit_h
+	
+// ----
+.tpi_recv_found_start:
+	/* recv 8bits(+calc.parity) */
+	ldi r18, 8
+	ldi r19, 0
+1:
+		rcall tpi_bit_h
+		lsr r24
+		bld r24, 7
+		eor r19, r24
+	dec r18
+	brne 1b
+	/* recv parity */
+	rcall tpi_bit_h
+	bld r18, 7
+	eor r19, r18
+	brmi .tpi_break_ret0
+	/* recv stop bits */
+	rcall tpi_bit_h
+	rjmp tpi_bit_h
+
+
+/**
+ * Read Block
+ */
+.global tpi_read_block
+tpi_read_block:
+	// X <= dptr
+	movw XL, r22
+	// r23 <= len
+	mov r23, r20
+	/* set PR */
+	rcall tpi_pr_update
+	/* read data */	
+.tpi_read_loop:
+		ldi r24, TPI_OP_SLD_INC
+		rcall tpi_send_byte
+		rcall tpi_recv_byte
+		st X+, r24
+	dec r23
+	brne .tpi_read_loop
+	ret
+
+
+/**
+ * Write block
+ */
+.global tpi_write_block
+tpi_write_block:
+	// X <= sptr
+	movw XL, r22
+	// r23 <= len
+	mov r23, r20
+	/* set PR */
+	rcall tpi_pr_update
+	/* write data */
+.tpi_write_loop:
+		ldi r24, TPI_OP_SOUT(NVMCMD)
+		rcall tpi_send_byte
+		ldi r24, NVMCMD_WORD_WRITE
+		rcall tpi_send_byte
+		ldi r24, TPI_OP_SST_INC
+		rcall tpi_send_byte
+		ld r24, X+
+		rcall tpi_send_byte
+.tpi_nvmbsy_wait:
+			ldi r24, TPI_OP_SIN(NVMCSR)
+			rcall tpi_send_byte
+			rcall tpi_recv_byte
+			andi r24, NVMCSR_BSY
+		brne .tpi_nvmbsy_wait
+	dec r23
+	brne .tpi_write_loop
+	ret
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/tpi.h b/trunk/AVRProjects/usbasp.2011-05-28/firmware/tpi.h
new file mode 100644
index 00000000..e39d0e84
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/tpi.h
@@ -0,0 +1,47 @@
+/**
+ * \brief Header for tpi
+ * \file tpi.h
+ * \author S³awomir Fraœ
+ */
+#ifndef __TPI_H__
+#define __TPI_H__
+#include <stdint.h>
+
+
+/* Globals */
+/** Number of iterations in tpi_delay loop */
+extern uint16_t tpi_dly_cnt;
+
+
+/* Functions */
+/**
+ * TPI init
+ */
+void tpi_init(void);
+/**
+ * Send raw byte by TPI
+ * \param b Byte to send
+ */
+void tpi_send_byte(uint8_t b);
+/**
+ * Receive one raw byte from TPI
+ * \return Received byte
+ */
+uint8_t tpi_recv_byte(void);
+/**
+ * Read block
+ * \param addr Address of block
+ * \param dptr Pointer to dest memory block
+ * \param len Length of read
+ */
+void tpi_read_block(uint16_t addr, uint8_t* dptr, uint8_t len);
+/**
+ * Write block
+ * \param addr Address to program
+ * \param sptr Pointer to source block
+ * \param len Length of write
+ */
+void tpi_write_block(uint16_t addr, const uint8_t* sptr, uint8_t len);
+
+
+#endif /*__TPI_H__*/
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/tpi_defs.h b/trunk/AVRProjects/usbasp.2011-05-28/firmware/tpi_defs.h
new file mode 100644
index 00000000..9cf6ca1c
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/tpi_defs.h
@@ -0,0 +1,59 @@
+/**
+ * \brief Internal defs for tpi
+ * \file tpi_defs.h
+ * \author S³awomir Fraœ
+ */
+#ifndef __TPI_DEFS_H__
+#define __TPI_DEFS_H__
+
+/* TPI instructions */
+#define TPI_OP_SLD      0x20
+#define TPI_OP_SLD_INC  0x24
+#define TPI_OP_SST      0x60
+#define TPI_OP_SST_INC  0x64
+#define TPI_OP_SSTPR(a) (0x68 | (a))
+#define TPI_OP_SIN(a)   (0x10 | (((a)<<1)&0x60) | ((a)&0x0F) )
+#define TPI_OP_SOUT(a)  (0x90 | (((a)<<1)&0x60) | ((a)&0x0F) )
+#define TPI_OP_SLDCS(a) (0x80 | ((a)&0x0F) )
+#define TPI_OP_SSTCS(a) (0xC0 | ((a)&0x0F) )
+#define TPI_OP_SKEY     0xE0
+
+/* TPI control/status registers */
+#define TPIIR  0xF
+#define TPIPCR 0x2
+#define TPISR  0x0
+
+// TPIPCR bits
+#define TPIPCR_GT_2    0x04
+#define TPIPCR_GT_1    0x02
+#define TPIPCR_GT_0    0x01
+#define TPIPCR_GT_128b 0x00
+#define TPIPCR_GT_64b  0x01
+#define TPIPCR_GT_32b  0x02
+#define TPIPCR_GT_16b  0x03
+#define TPIPCR_GT_8b   0x04
+#define TPIPCR_GT_4b   0x05
+#define TPIPCR_GT_2b   0x06
+#define TPIPCR_GT_0b   0x07
+
+// TPISR bits
+#define TPISR_NVMEN    0x02
+
+/* NVM registers */
+#define NVMCSR         0x32
+#define NVMCMD         0x33
+
+// NVMCSR bits
+#define NVMCSR_BSY     0x80
+
+// NVMCMD values
+#define NVMCMD_NOP           0x00
+#define NVMCMD_CHIP_ERASE    0x10
+#define NVMCMD_SECTION_ERASE 0x14
+#define NVMCMD_WORD_WRITE    0x1D
+
+
+
+
+
+#endif /*__TPI_DEFS_H__*/
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbasp.h b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbasp.h
new file mode 100644
index 00000000..b60bd04e
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbasp.h
@@ -0,0 +1,70 @@
+/*
+ * usbasp.c - part of USBasp
+ *
+ * Autor..........: Thomas Fischl <tfischl@gmx.de>
+ * Description....: Definitions and macros for usbasp
+ * Licence........: GNU GPL v2 (see Readme.txt)
+ * Creation Date..: 2009-02-28
+ * Last change....: 2009-02-28
+ */
+
+#ifndef USBASP_H_
+#define USBASP_H_
+
+/* USB function call identifiers */
+#define USBASP_FUNC_CONNECT     1
+#define USBASP_FUNC_DISCONNECT  2
+#define USBASP_FUNC_TRANSMIT    3
+#define USBASP_FUNC_READFLASH   4
+#define USBASP_FUNC_ENABLEPROG  5
+#define USBASP_FUNC_WRITEFLASH  6
+#define USBASP_FUNC_READEEPROM  7
+#define USBASP_FUNC_WRITEEEPROM 8
+#define USBASP_FUNC_SETLONGADDRESS 9
+#define USBASP_FUNC_SETISPSCK 10
+#define USBASP_FUNC_TPI_CONNECT      11
+#define USBASP_FUNC_TPI_DISCONNECT   12
+#define USBASP_FUNC_TPI_RAWREAD      13
+#define USBASP_FUNC_TPI_RAWWRITE     14
+#define USBASP_FUNC_TPI_READBLOCK    15
+#define USBASP_FUNC_TPI_WRITEBLOCK   16
+#define USBASP_FUNC_GETCAPABILITIES 127
+
+/* USBASP capabilities */
+#define USBASP_CAP_0_TPI    0x01
+
+/* programming state */
+#define PROG_STATE_IDLE         0
+#define PROG_STATE_WRITEFLASH   1
+#define PROG_STATE_READFLASH    2
+#define PROG_STATE_READEEPROM   3
+#define PROG_STATE_WRITEEEPROM  4
+#define PROG_STATE_TPI_READ     5
+#define PROG_STATE_TPI_WRITE    6
+
+/* Block mode flags */
+#define PROG_BLOCKFLAG_FIRST    1
+#define PROG_BLOCKFLAG_LAST     2
+
+/* ISP SCK speed identifiers */
+#define USBASP_ISP_SCK_AUTO   0
+#define USBASP_ISP_SCK_0_5    1   /* 500 Hz */
+#define USBASP_ISP_SCK_1      2   /*   1 kHz */
+#define USBASP_ISP_SCK_2      3   /*   2 kHz */
+#define USBASP_ISP_SCK_4      4   /*   4 kHz */
+#define USBASP_ISP_SCK_8      5   /*   8 kHz */
+#define USBASP_ISP_SCK_16     6   /*  16 kHz */
+#define USBASP_ISP_SCK_32     7   /*  32 kHz */
+#define USBASP_ISP_SCK_93_75  8   /*  93.75 kHz */
+#define USBASP_ISP_SCK_187_5  9   /* 187.5  kHz */
+#define USBASP_ISP_SCK_375    10  /* 375 kHz   */
+#define USBASP_ISP_SCK_750    11  /* 750 kHz   */
+#define USBASP_ISP_SCK_1500   12  /* 1.5 MHz   */
+
+/* macros for gpio functions */
+#define ledRedOn()    PORTC &= ~(1 << PC1)
+#define ledRedOff()   PORTC |= (1 << PC1)
+#define ledGreenOn()  PORTC &= ~(1 << PC0)
+#define ledGreenOff() PORTC |= (1 << PC0)
+
+#endif /* USBASP_H_ */
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbconfig.h b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbconfig.h
new file mode 100644
index 00000000..203239ea
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbconfig.h
@@ -0,0 +1,240 @@
+/* Name: usbconfig.h
+ * Project: AVR USB driver
+ * Author: Christian Starkjohann, Thomas Fischl
+ * Creation Date: 2005-04-01
+ * Tabsize: 4
+ * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt) or proprietary (CommercialLicense.txt)
+ */
+
+#ifndef __usbconfig_h_included__
+#define __usbconfig_h_included__
+
+/*
+General Description:
+This file contains parts of the USB driver which can be configured and can or
+must be adapted to your hardware.
+
+Please note that the usbdrv contains a usbconfig-prototype.h file now. We
+recommend that you use that file as a template because it will always list
+the newest features and options.
+*/
+
+/* ---------------------------- Hardware Config ---------------------------- */
+
+#define USB_CFG_IOPORTNAME      B
+/* This is the port where the USB bus is connected. When you configure it to
+ * "B", the registers PORTB, PINB and DDRB will be used.
+ */
+#define USB_CFG_DMINUS_BIT      0
+/* This is the bit number in USB_CFG_IOPORT where the USB D- line is connected.
+ * This may be any bit in the port.
+ */
+#define USB_CFG_DPLUS_BIT       1
+/* This is the bit number in USB_CFG_IOPORT where the USB D+ line is connected.
+ * This may be any bit in the port. Please note that D+ must also be connected
+ * to interrupt pin INT0!
+ */
+#define USB_CFG_CLOCK_KHZ 12000
+/* Clock rate of the AVR in MHz. Legal values are 12000, 16000 or 16500.
+ * The 16.5 MHz version of the code requires no crystal, it tolerates +/- 1%
+ * deviation from the nominal frequency. All other rates require a precision
+ * of 2000 ppm and thus a crystal!
+ * Default if not specified: 12 MHz
+ */
+
+/* ----------------------- Optional Hardware Config ------------------------ */
+
+/* #define USB_CFG_PULLUP_IOPORTNAME   D */
+/* If you connect the 1.5k pullup resistor from D- to a port pin instead of
+ * V+, you can connect and disconnect the device from firmware by calling
+ * the macros usbDeviceConnect() and usbDeviceDisconnect() (see usbdrv.h).
+ * This constant defines the port on which the pullup resistor is connected.
+ */
+/* #define USB_CFG_PULLUP_BIT          4 */
+/* This constant defines the bit number in USB_CFG_PULLUP_IOPORT (defined
+ * above) where the 1.5k pullup resistor is connected. See description
+ * above for details.
+ */
+
+/* --------------------------- Functional Range ---------------------------- */
+
+#define USB_CFG_HAVE_INTRIN_ENDPOINT    0
+/* Define this to 1 if you want to compile a version with two endpoints: The
+ * default control endpoint 0 and an interrupt-in endpoint 1.
+ */
+#define USB_CFG_HAVE_INTRIN_ENDPOINT3   0
+/* Define this to 1 if you want to compile a version with three endpoints: The
+ * default control endpoint 0, an interrupt-in endpoint 1 and an interrupt-in
+ * endpoint 3. You must also enable endpoint 1 above.
+ */
+#define USB_CFG_IMPLEMENT_HALT          0
+/* Define this to 1 if you also want to implement the ENDPOINT_HALT feature
+ * for endpoint 1 (interrupt endpoint). Although you may not need this feature,
+ * it is required by the standard. We have made it a config option because it
+ * bloats the code considerably.
+ */
+#define USB_CFG_INTR_POLL_INTERVAL      10
+/* If you compile a version with endpoint 1 (interrupt-in), this is the poll
+ * interval. The value is in milliseconds and must not be less than 10 ms for
+ * low speed devices.
+ */
+#define USB_CFG_IS_SELF_POWERED         0
+/* Define this to 1 if the device has its own power supply. Set it to 0 if the
+ * device is powered from the USB bus.
+ */
+#define USB_CFG_MAX_BUS_POWER           50
+/* Set this variable to the maximum USB bus power consumption of your device.
+ * The value is in milliamperes. [It will be divided by two since USB
+ * communicates power requirements in units of 2 mA.]
+ */
+#define USB_CFG_IMPLEMENT_FN_WRITE      1
+/* Set this to 1 if you want usbFunctionWrite() to be called for control-out
+ * transfers. Set it to 0 if you don't need it and want to save a couple of
+ * bytes.
+ */
+#define USB_CFG_IMPLEMENT_FN_READ       1
+/* Set this to 1 if you need to send control replies which are generated
+ * "on the fly" when usbFunctionRead() is called. If you only want to send
+ * data from a static buffer, set it to 0 and return the data from
+ * usbFunctionSetup(). This saves a couple of bytes.
+ */
+#define USB_CFG_IMPLEMENT_FN_WRITEOUT   0
+/* Define this to 1 if you want to use interrupt-out (or bulk out) endpoint 1.
+ * You must implement the function usbFunctionWriteOut() which receives all
+ * interrupt/bulk data sent to endpoint 1.
+ */
+#define USB_CFG_HAVE_FLOWCONTROL        0
+/* Define this to 1 if you want flowcontrol over USB data. See the definition
+ * of the macros usbDisableAllRequests() and usbEnableAllRequests() in
+ * usbdrv.h.
+ */
+
+/* -------------------------- Device Description --------------------------- */
+
+#define  USB_CFG_VENDOR_ID  0xc0, 0x16  /* 5824 in dec, stands for VOTI */
+/* USB vendor ID for the device, low byte first. If you have registered your
+ * own Vendor ID, define it here. Otherwise you use obdev's free shared
+ * VID/PID pair. Be sure to read USBID-License.txt for rules!
+ */
+#define USB_CFG_DEVICE_ID   0xdc, 0x05  /* 1500 in dec, obdev's free PID */
+/* This is the ID of the product, low byte first. It is interpreted in the
+ * scope of the vendor ID. If you have registered your own VID with usb.org
+ * or if you have licensed a PID from somebody else, define it here. Otherwise
+ * you use obdev's free shared VID/PID pair. Be sure to read the rules in
+ * USBID-License.txt!
+ */
+#define USB_CFG_DEVICE_VERSION  0x04, 0x01
+/* Version number of the device: Minor number first, then major number.
+ */
+#define	USB_CFG_VENDOR_NAME     'w', 'w', 'w', '.', 'f', 'i', 's', 'c', 'h', 'l', '.', 'd', 'e'
+#define USB_CFG_VENDOR_NAME_LEN 13
+/* These two values define the vendor name returned by the USB device. The name
+ * must be given as a list of characters under single quotes. The characters
+ * are interpreted as Unicode (UTF-16) entities.
+ * If you don't want a vendor name string, undefine these macros.
+ * ALWAYS define a vendor name containing your Internet domain name if you use
+ * obdev's free shared VID/PID pair. See the file USBID-License.txt for
+ * details.
+ */
+#define	USB_CFG_DEVICE_NAME		'U', 'S', 'B', 'a', 's', 'p'
+#define	USB_CFG_DEVICE_NAME_LEN	6
+/* Same as above for the device name. If you don't want a device name, undefine
+ * the macros. See the file USBID-License.txt before you assign a name.
+ */
+/*#define USB_CFG_SERIAL_NUMBER   'N', 'o', 'n', 'e' */
+/*#define USB_CFG_SERIAL_NUMBER_LEN   0 */
+/* Same as above for the serial number. If you don't want a serial number,
+ * undefine the macros.
+ * It may be useful to provide the serial number through other means than at
+ * compile time. See the section about descriptor properties below for how
+ * to fine tune control over USB descriptors such as the string descriptor
+ * for the serial number.
+ */
+#define USB_CFG_DEVICE_CLASS    0xff
+#define USB_CFG_DEVICE_SUBCLASS 0
+/* See USB specification if you want to conform to an existing device class.
+ */
+#define USB_CFG_INTERFACE_CLASS     0
+#define USB_CFG_INTERFACE_SUBCLASS  0
+#define USB_CFG_INTERFACE_PROTOCOL  0
+/* See USB specification if you want to conform to an existing device class or
+ * protocol.
+ */
+#define USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH    0   /* total length of report descriptor */
+/* Define this to the length of the HID report descriptor, if you implement
+ * an HID device. Otherwise don't define it or define it to 0.
+ */
+
+/* ------------------- Fine Control over USB Descriptors ------------------- */
+/* If you don't want to use the driver's default USB descriptors, you can
+ * provide our own. These can be provided as (1) fixed length static data in
+ * flash memory, (2) fixed length static data in RAM or (3) dynamically at
+ * runtime in the function usbFunctionDescriptor(). See usbdrv.h for more
+ * information about this function.
+ * Descriptor handling is configured through the descriptor's properties. If
+ * no properties are defined or if they are 0, the default descriptor is used.
+ * Possible properties are:
+ *   + USB_PROP_IS_DYNAMIC: The data for the descriptor should be fetched
+ *     at runtime via usbFunctionDescriptor().
+ *   + USB_PROP_IS_RAM: The data returned by usbFunctionDescriptor() or found
+ *     in static memory is in RAM, not in flash memory.
+ *   + USB_PROP_LENGTH(len): If the data is in static memory (RAM or flash),
+ *     the driver must know the descriptor's length. The descriptor itself is
+ *     found at the address of a well known identifier (see below).
+ * List of static descriptor names (must be declared PROGMEM if in flash):
+ *   char usbDescriptorDevice[];
+ *   char usbDescriptorConfiguration[];
+ *   char usbDescriptorHidReport[];
+ *   char usbDescriptorString0[];
+ *   int usbDescriptorStringVendor[];
+ *   int usbDescriptorStringDevice[];
+ *   int usbDescriptorStringSerialNumber[];
+ * Other descriptors can't be provided statically, they must be provided
+ * dynamically at runtime.
+ *
+ * Descriptor properties are or-ed or added together, e.g.:
+ * #define USB_CFG_DESCR_PROPS_DEVICE   (USB_PROP_IS_RAM | USB_PROP_LENGTH(18))
+ *
+ * The following descriptors are defined:
+ *   USB_CFG_DESCR_PROPS_DEVICE
+ *   USB_CFG_DESCR_PROPS_CONFIGURATION
+ *   USB_CFG_DESCR_PROPS_STRINGS
+ *   USB_CFG_DESCR_PROPS_STRING_0
+ *   USB_CFG_DESCR_PROPS_STRING_VENDOR
+ *   USB_CFG_DESCR_PROPS_STRING_PRODUCT
+ *   USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER
+ *   USB_CFG_DESCR_PROPS_HID
+ *   USB_CFG_DESCR_PROPS_HID_REPORT
+ *   USB_CFG_DESCR_PROPS_UNKNOWN (for all descriptors not handled by the driver)
+ *
+ */
+
+#define USB_CFG_DESCR_PROPS_DEVICE                  0
+#define USB_CFG_DESCR_PROPS_CONFIGURATION           0
+#define USB_CFG_DESCR_PROPS_STRINGS                 0
+#define USB_CFG_DESCR_PROPS_STRING_0                0
+#define USB_CFG_DESCR_PROPS_STRING_VENDOR           0
+#define USB_CFG_DESCR_PROPS_STRING_PRODUCT          0
+#define USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER    0
+#define USB_CFG_DESCR_PROPS_HID                     0
+#define USB_CFG_DESCR_PROPS_HID_REPORT              0
+#define USB_CFG_DESCR_PROPS_UNKNOWN                 0
+
+/* ----------------------- Optional MCU Description ------------------------ */
+
+/* The following configurations have working defaults in usbdrv.h. You
+ * usually don't need to set them explicitly. Only if you want to run
+ * the driver on a device which is not yet supported or with a compiler
+ * which is not fully supported (such as IAR C) or if you use a differnt
+ * interrupt than INT0, you may have to define some of these.
+ */
+/* #define USB_INTR_CFG            MCUCR */
+/* #define USB_INTR_CFG_SET        ((1 << ISC00) | (1 << ISC01)) */
+/* #define USB_INTR_CFG_CLR        0 */
+/* #define USB_INTR_ENABLE         GIMSK */
+/* #define USB_INTR_ENABLE_BIT     INT0 */
+/* #define USB_INTR_PENDING        GIFR */
+/* #define USB_INTR_PENDING_BIT    INTF0 */
+
+#endif /* __usbconfig_h_included__ */
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/Changelog.txt b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/Changelog.txt
new file mode 100644
index 00000000..5c6354ab
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/Changelog.txt
@@ -0,0 +1,308 @@
+This file documents changes in the firmware-only USB driver for atmel's AVR
+microcontrollers. New entries are always appended to the end of the file.
+Scroll down to the bottom to see the most recent changes.
+
+2005-04-01:
+  - Implemented endpoint 1 as interrupt-in endpoint.
+  - Moved all configuration options to usbconfig.h which is not part of the
+    driver.
+  - Changed interface for usbVendorSetup().
+  - Fixed compatibility with ATMega8 device.
+  - Various minor optimizations.
+
+2005-04-11:
+  - Changed interface to application: Use usbFunctionSetup(), usbFunctionRead()
+    and usbFunctionWrite() now. Added configuration options to choose which
+    of these functions to compile in.
+  - Assembler module delivers receive data non-inverted now.
+  - Made register and bit names compatible with more AVR devices.
+
+2005-05-03:
+  - Allow address of usbRxBuf on any memory page as long as the buffer does
+    not cross 256 byte page boundaries.
+  - Better device compatibility: works with Mega88 now.
+  - Code optimization in debugging module.
+  - Documentation updates.
+
+2006-01-02:
+  - Added (free) default Vendor- and Product-IDs bought from voti.nl.
+  - Added USBID-License.txt file which defines the rules for using the free
+    shared VID/PID pair.
+  - Added Readme.txt to the usbdrv directory which clarifies administrative
+    issues.
+
+2006-01-25:
+  - Added "configured state" to become more standards compliant.
+  - Added "HALT" state for interrupt endpoint.
+  - Driver passes the "USB Command Verifier" test from usb.org now.
+  - Made "serial number" a configuration option.
+  - Minor optimizations, we now recommend compiler option "-Os" for best
+    results.
+  - Added a version number to usbdrv.h
+
+2006-02-03:
+  - New configuration variable USB_BUFFER_SECTION for the memory section where
+    the USB rx buffer will go. This defaults to ".bss" if not defined. Since
+    this buffer MUST NOT cross 256 byte pages (not even touch a page at the
+    end), the user may want to pass a linker option similar to
+    "-Wl,--section-start=.mybuffer=0x800060".
+  - Provide structure for usbRequest_t.
+  - New defines for USB constants.
+  - Prepared for HID implementations.
+  - Increased data size limit for interrupt transfers to 8 bytes.
+  - New macro usbInterruptIsReady() to query interrupt buffer state.
+
+2006-02-18:
+  - Ensure that the data token which is sent as an ack to an OUT transfer is
+    always zero sized. This fixes a bug where the host reports an error after
+    sending an out transfer to the device, although all data arrived at the
+    device.
+  - Updated docs in usbdrv.h to reflect changed API in usbFunctionWrite().
+
+* Release 2006-02-20
+
+  - Give a compiler warning when compiling with debugging turned on.
+  - Added Oleg Semyonov's changes for IAR-cc compatibility.
+  - Added new (optional) functions usbDeviceConnect() and usbDeviceDisconnect()
+    (also thanks to Oleg!).
+  - Rearranged tests in usbPoll() to save a couple of instructions in the most
+    likely case that no actions are pending.
+  - We need a delay between the SET ADDRESS request until the new address
+    becomes active. This delay was handled in usbPoll() until now. Since the
+    spec says that the delay must not exceed 2ms, previous versions required
+    aggressive polling during the enumeration phase. We have now moved the
+    handling of the delay into the interrupt routine.
+  - We must not reply with NAK to a SETUP transaction. We can only achieve this
+    by making sure that the rx buffer is empty when SETUP tokens are expected.
+    We therefore don't pass zero sized data packets from the status phase of
+    a transfer to usbPoll(). This change MAY cause troubles if you rely on
+    receiving a less than 8 bytes long packet in usbFunctionWrite() to
+    identify the end of a transfer. usbFunctionWrite() will NEVER be called
+    with a zero length.
+
+* Release 2006-03-14
+
+  - Improved IAR C support: tiny memory model, more devices
+  - Added template usbconfig.h file under the name usbconfig-prototype.h
+
+* Release 2006-03-26
+
+  - Added provision for one more interrupt-in endpoint (endpoint 3).
+  - Added provision for one interrupt-out endpoint (endpoint 1).
+  - Added flowcontrol macros for USB.
+  - Added provision for custom configuration descriptor.
+  - Allow ANY two port bits for D+ and D-.
+  - Merged (optional) receive endpoint number into global usbRxToken variable.
+  - Use USB_CFG_IOPORTNAME instead of USB_CFG_IOPORT. We now construct the
+    variable name from the single port letter instead of computing the address
+    of related ports from the output-port address.
+
+* Release 2006-06-26
+
+  - Updated documentation in usbdrv.h and usbconfig-prototype.h to reflect the
+    new features.
+  - Removed "#warning" directives because IAR does not understand them. Use
+    unused static variables instead to generate a warning.
+  - Do not include <avr/io.h> when compiling with IAR.
+  - Introduced USB_CFG_DESCR_PROPS_* in usbconfig.h to configure how each
+    USB descriptor should be handled. It is now possible to provide descriptor
+    data in Flash, RAM or dynamically at runtime.
+  - STALL is now a status in usbTxLen* instead of a message. We can now conform
+    to the spec and leave the stall status pending until it is cleared.
+  - Made usbTxPacketCnt1 and usbTxPacketCnt3 public. This allows the
+    application code to reset data toggling on interrupt pipes.
+
+* Release 2006-07-18
+
+  - Added an #if !defined __ASSEMBLER__ to the warning in usbdrv.h. This fixes
+    an assembler error.
+  - usbDeviceDisconnect() takes pull-up resistor to high impedance now.
+
+* Release 2007-02-01
+
+  - Merged in some code size improvements from usbtiny (thanks to Dick
+    Streefland for these optimizations!)
+  - Special alignment requirement for usbRxBuf not required any more. Thanks
+    again to Dick Streefland for this hint!
+  - Reverted to "#warning" instead of unused static variables -- new versions
+    of IAR CC should handle this directive.
+  - Changed Open Source license to GNU GPL v2 in order to make linking against
+    other free libraries easier. We no longer require publication of the
+    circuit diagrams, but we STRONGLY encourage it. If you improve the driver
+    itself, PLEASE grant us a royalty free license to your changes for our
+    commercial license.
+
+* Release 2007-03-29
+
+  - New configuration option "USB_PUBLIC" in usbconfig.h.
+  - Set USB version number to 1.10 instead of 1.01.
+  - Code used USB_CFG_DESCR_PROPS_STRING_DEVICE and
+    USB_CFG_DESCR_PROPS_STRING_PRODUCT inconsistently. Changed all occurrences
+    to USB_CFG_DESCR_PROPS_STRING_PRODUCT.
+  - New assembler module for 16.5 MHz RC oscillator clock with PLL in receiver
+    code.
+  - New assembler module for 16 MHz crystal.
+  - usbdrvasm.S contains common code only, clock-specific parts have been moved
+    to usbdrvasm12.S, usbdrvasm16.S and usbdrvasm165.S respectively.
+
+* Release 2007-06-25
+
+  - 16 MHz module: Do SE0 check in stuffed bits as well.
+
+* Release 2007-07-07
+
+  - Define hi8(x) for IAR compiler to limit result to 8 bits. This is necessary
+    for negative values.
+  - Added 15 MHz module contributed by V. Bosch.
+  - Interrupt vector name can now be configured. This is useful if somebody
+    wants to use a different hardware interrupt than INT0.
+
+* Release 2007-08-07
+
+  - Moved handleIn3 routine in usbdrvasm16.S so that relative jump range is
+    not exceeded.
+  - More config options: USB_RX_USER_HOOK(), USB_INITIAL_DATATOKEN,
+    USB_COUNT_SOF
+  - USB_INTR_PENDING can now be a memory address, not just I/O
+
+* Release 2007-09-19
+
+  - Split out common parts of assembler modules into separate include file
+  - Made endpoint numbers configurable so that given interface definitions
+    can be matched. See USB_CFG_EP3_NUMBER in usbconfig-prototype.h.
+  - Store endpoint number for interrupt/bulk-out so that usbFunctionWriteOut()
+    can handle any number of endpoints.
+  - Define usbDeviceConnect() and usbDeviceDisconnect() even if no
+    USB_CFG_PULLUP_IOPORTNAME is defined. Directly set D+ and D- to 0 in this
+    case.
+
+* Release 2007-12-01
+
+  - Optimize usbDeviceConnect() and usbDeviceDisconnect() for less code size
+    when USB_CFG_PULLUP_IOPORTNAME is not defined.
+
+* Release 2007-12-13
+
+  - Renamed all include-only assembler modules from *.S to *.inc so that
+    people don't add them to their project sources.
+  - Distribute leap bits in tx loop more evenly for 16 MHz module.
+  - Use "macro" and "endm" instead of ".macro" and ".endm" for IAR
+  - Avoid compiler warnings for constant expr range by casting some values in
+    USB descriptors.
+
+* Release 2008-01-21
+
+  - Fixed bug in 15 and 16 MHz module where the new address set with
+    SET_ADDRESS was already accepted at the next NAK or ACK we send, not at
+    the next data packet we send. This caused problems when the host polled
+    too fast. Thanks to Alexander Neumann for his help and patience debugging
+    this issue!
+
+* Release 2008-02-05
+
+  - Fixed bug in 16.5 MHz module where a register was used in the interrupt
+    handler before it was pushed. This bug was introduced with version
+    2007-09-19 when common parts were moved to a separate file.
+  - Optimized CRC routine (thanks to Reimar Doeffinger).
+
+* Release 2008-02-16
+
+  - Removed outdated IAR compatibility stuff (code sections).
+  - Added hook macros for USB_RESET_HOOK() and USB_SET_ADDRESS_HOOK().
+  - Added optional routine usbMeasureFrameLength() for calibration of the
+    internal RC oscillator.
+
+* Release 2008-02-28
+
+  - USB_INITIAL_DATATOKEN defaults to USBPID_DATA1 now, which means that we
+    start with sending USBPID_DATA0.
+  - Changed defaults in usbconfig-prototype.h
+  - Added free USB VID/PID pair for MIDI class devices
+  - Restructured AVR-USB as separate package, not part of PowerSwitch any more.
+
+* Release 2008-04-18
+
+  - Restructured usbdrv.c so that it is easier to read and understand.
+  - Better code optimization with gcc 4.
+  - If a second interrupt in endpoint is enabled, also add it to config
+    descriptor.
+  - Added config option for long transfers (above 254 bytes), see
+    USB_CFG_LONG_TRANSFERS in usbconfig.h.
+  - Added 20 MHz module contributed by Jeroen Benschop.
+
+* Release 2008-05-13
+
+  - Fixed bug in libs-host/hiddata.c function usbhidGetReport(): length
+    was not incremented, pointer to length was incremented instead.
+  - Added code to command line tool(s) which claims an interface. This code
+    is disabled by default, but may be necessary on newer Linux kernels.
+  - Added usbconfig.h option "USB_CFG_CHECK_DATA_TOGGLING".
+  - New header "usbportability.h" prepares ports to other development
+    environments.
+  - Long transfers (above 254 bytes) did not work when usbFunctionRead() was
+    used to supply the data. Fixed this bug. [Thanks to Alexander Neumann!]
+  - In hiddata.c (example code for sending/receiving data over HID), use
+    USB_RECIP_DEVICE instead of USB_RECIP_INTERFACE for control transfers so
+    that we need not claim the interface.
+  - in usbPoll() loop 20 times polling for RESET state instead of 10 times.
+    This accounts for the higher clock rates we now support.
+  - Added a module for 12.8 MHz RC oscillator with PLL in receiver loop.
+  - Added hook to SOF code so that oscillator can be tuned to USB frame clock.
+  - Added timeout to waitForJ loop. Helps preventing unexpected hangs.
+  - Added example code for oscillator tuning to libs-device (thanks to
+    Henrik Haftmann for the idea to this routine).
+  - Implemented option USB_CFG_SUPPRESS_INTR_CODE.
+
+* Release 2008-10-22
+
+  - Fixed libs-device/osctune.h: OSCCAL is memory address on ATMega88 and
+    similar, not offset of 0x20 needs to be added.
+  - Allow distribution under GPLv3 for those who have to link against other
+    code distributed under GPLv3.
+
+* Release 2008-11-26
+
+  - Removed libusb-win32 dependency for hid-data example in Makefile.windows.
+    It was never required and confused many people.
+  - Added extern uchar usbRxToken to usbdrv.h.
+  - Integrated a module with CRC checks at 18 MHz by Lukas Schrittwieser.
+
+* Release 2009-03-23
+
+  - Hid-mouse example used settings from hid-data example, fixed that.
+  - Renamed project to V-USB due to a trademark issue with Atmel(r).
+  - Changed CommercialLicense.txt and USBID-License.txt to make the
+    background of USB ID registration clearer.
+
+* Release 2009-04-15
+
+  - Changed CommercialLicense.txt to reflect the new range of PIDs from
+    Jason Kotzin.
+  - Removed USBID-License.txt in favor of USB-IDs-for-free.txt and
+    USB-ID-FAQ.txt
+  - Fixed a bug in the 12.8 MHz module: End Of Packet decection was made in
+    the center between bit 0 and 1 of each byte. This is where the data lines
+    are expected to change and the sampled data may therefore be nonsense.
+    We therefore check EOP ONLY if bits 0 AND 1 have both been read as 0 on D-.
+  - Fixed a bitstuffing problem in the 16 MHz module: If bit 6 was stuffed,
+    the unstuffing code in the receiver routine was 1 cycle too long. If
+    multiple bytes had the unstuffing in bit 6, the error summed up until the
+    receiver was out of sync.
+  - Included option for faster CRC routine.
+    Thanks to Slawomir Fras (BoskiDialer) for this code!
+  - Updated bits in Configuration Descriptor's bmAttributes according to
+    USB 1.1 (in particular bit 7, it is a must-be-set bit now).
+
+* Release 2009-08-22
+
+  - Moved first DBG1() after odDebugInit() in all examples.
+  - Use vector INT0_vect instead of SIG_INTERRUPT0 if defined. This makes
+    V-USB compatible with the new "p" suffix devices (e.g. ATMega328p).
+  - USB_CFG_CLOCK_KHZ setting is now required in usbconfig.h (no default any
+    more).
+  - New option USB_CFG_DRIVER_FLASH_PAGE allows boot loaders on devices with
+    more than 64 kB flash.
+  - Built-in configuration descriptor allows custom definition for second
+    endpoint now.
+
+* Release 2010-07-15
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/CommercialLicense.txt b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/CommercialLicense.txt
new file mode 100644
index 00000000..11d07d9d
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/CommercialLicense.txt
@@ -0,0 +1,166 @@
+V-USB Driver Software License Agreement
+Version 2009-08-03
+
+THIS LICENSE AGREEMENT GRANTS YOU CERTAIN RIGHTS IN A SOFTWARE. YOU CAN
+ENTER INTO THIS AGREEMENT AND ACQUIRE THE RIGHTS OUTLINED BELOW BY PAYING
+THE AMOUNT ACCORDING TO SECTION 4 ("PAYMENT") TO OBJECTIVE DEVELOPMENT.
+
+
+1 DEFINITIONS
+
+1.1 "OBJECTIVE DEVELOPMENT" shall mean OBJECTIVE DEVELOPMENT Software GmbH,
+Grosse Schiffgasse 1A/7, 1020 Wien, AUSTRIA.
+
+1.2 "You" shall mean the Licensee.
+
+1.3 "V-USB" shall mean all files included in the package distributed under
+the name "vusb" by OBJECTIVE DEVELOPMENT (http://www.obdev.at/vusb/)
+unless otherwise noted. This includes the firmware-only USB device
+implementation for Atmel AVR microcontrollers, some simple device examples
+and host side software examples and libraries.
+
+
+2 LICENSE GRANTS
+
+2.1 Source Code. OBJECTIVE DEVELOPMENT shall furnish you with the source
+code of V-USB.
+
+2.2 Distribution and Use. OBJECTIVE DEVELOPMENT grants you the
+non-exclusive right to use, copy and distribute V-USB with your hardware
+product(s), restricted by the limitations in section 3 below.
+
+2.3 Modifications. OBJECTIVE DEVELOPMENT grants you the right to modify
+the source code and your copy of V-USB according to your needs.
+
+2.4 USB IDs. OBJECTIVE DEVELOPMENT furnishes you with one or two USB
+Product ID(s), sent to you in e-mail. These Product IDs are reserved
+exclusively for you. OBJECTIVE DEVELOPMENT has obtained USB Product ID
+ranges under the Vendor ID 5824 from Wouter van Ooijen (Van Ooijen
+Technische Informatica, www.voti.nl) and under the Vendor ID 8352 from
+Jason Kotzin (Clay Logic, www.claylogic.com). Both owners of the Vendor IDs
+have obtained these IDs from the USB Implementers Forum, Inc.
+(www.usb.org). OBJECTIVE DEVELOPMENT disclaims all liability which might
+arise from the assignment of USB IDs.
+
+2.5 USB Certification. Although not part of this agreement, we want to make
+it clear that you cannot become USB certified when you use V-USB or a USB
+Product ID assigned by OBJECTIVE DEVELOPMENT. AVR microcontrollers don't
+meet the electrical specifications required by the USB specification and
+the USB Implementers Forum certifies only members who bought a Vendor ID of
+their own.
+
+
+3 LICENSE RESTRICTIONS
+
+3.1 Number of Units. Only one of the following three definitions is
+applicable. Which one is determined by the amount you pay to OBJECTIVE
+DEVELOPMENT, see section 4 ("Payment") below.
+
+Hobby License: You may use V-USB according to section 2 above in no more
+than 5 hardware units. These units must not be sold for profit.
+
+Entry Level License: You may use V-USB according to section 2 above in no
+more than 150 hardware units.
+
+Professional License: You may use V-USB according to section 2 above in
+any number of hardware units, except for large scale production ("unlimited
+fair use"). Quantities below 10,000 units are not considered large scale
+production. If your reach quantities which are obviously large scale
+production, you must pay a license fee of 0.10 EUR per unit for all units
+above 10,000.
+
+3.2 Rental. You may not rent, lease, or lend V-USB or otherwise encumber
+any copy of V-USB, or any of the rights granted herein.
+
+3.3 Transfer. You may not transfer your rights under this Agreement to
+another party without OBJECTIVE DEVELOPMENT's prior written consent. If
+such consent is obtained, you may permanently transfer this License to
+another party. The recipient of such transfer must agree to all terms and
+conditions of this Agreement.
+
+3.4 Reservation of Rights. OBJECTIVE DEVELOPMENT retains all rights not
+expressly granted.
+
+3.5 Non-Exclusive Rights. Your license rights under this Agreement are
+non-exclusive.
+
+3.6 Third Party Rights. This Agreement cannot grant you rights controlled
+by third parties. In particular, you are not allowed to use the USB logo or
+other trademarks owned by the USB Implementers Forum, Inc. without their
+consent. Since such consent depends on USB certification, it should be
+noted that V-USB will not pass certification because it does not
+implement checksum verification and the microcontroller ports do not meet
+the electrical specifications.
+
+
+4 PAYMENT
+
+The payment amount depends on the variation of this agreement (according to
+section 3.1) into which you want to enter. Concrete prices are listed on
+OBJECTIVE DEVELOPMENT's web site, usually at
+http://www.obdev.at/vusb/license.html. You agree to pay the amount listed
+there to OBJECTIVE DEVELOPMENT or OBJECTIVE DEVELOPMENT's payment processor
+or reseller.
+
+
+5 COPYRIGHT AND OWNERSHIP
+
+V-USB is protected by copyright laws and international copyright
+treaties, as well as other intellectual property laws and treaties. V-USB
+is licensed, not sold.
+
+
+6 TERM AND TERMINATION
+
+6.1 Term. This Agreement shall continue indefinitely. However, OBJECTIVE
+DEVELOPMENT may terminate this Agreement and revoke the granted license and
+USB-IDs if you fail to comply with any of its terms and conditions.
+
+6.2 Survival of Terms. All provisions regarding secrecy, confidentiality
+and limitation of liability shall survive termination of this agreement.
+
+
+7 DISCLAIMER OF WARRANTY AND LIABILITY
+
+LIMITED WARRANTY. V-USB IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY
+KIND. TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, OBJECTIVE
+DEVELOPMENT AND ITS SUPPLIERS HEREBY DISCLAIM ALL WARRANTIES, EITHER
+EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND
+NON-INFRINGEMENT, WITH REGARD TO V-USB, AND THE PROVISION OF OR FAILURE
+TO PROVIDE SUPPORT SERVICES. THIS LIMITED WARRANTY GIVES YOU SPECIFIC LEGAL
+RIGHTS. YOU MAY HAVE OTHERS, WHICH VARY FROM STATE/JURISDICTION TO
+STATE/JURISDICTION.
+
+LIMITATION OF LIABILITY. TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW,
+IN NO EVENT SHALL OBJECTIVE DEVELOPMENT OR ITS SUPPLIERS BE LIABLE FOR ANY
+SPECIAL, INCIDENTAL, INDIRECT, OR CONSEQUENTIAL DAMAGES WHATSOEVER
+(INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
+BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR ANY OTHER PECUNIARY
+LOSS) ARISING OUT OF THE USE OF OR INABILITY TO USE V-USB OR THE
+PROVISION OF OR FAILURE TO PROVIDE SUPPORT SERVICES, EVEN IF OBJECTIVE
+DEVELOPMENT HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN ANY
+CASE, OBJECTIVE DEVELOPMENT'S ENTIRE LIABILITY UNDER ANY PROVISION OF THIS
+AGREEMENT SHALL BE LIMITED TO THE AMOUNT ACTUALLY PAID BY YOU FOR V-USB.
+
+
+8 MISCELLANEOUS TERMS
+
+8.1 Marketing. OBJECTIVE DEVELOPMENT has the right to mention for marketing
+purposes that you entered into this agreement.
+
+8.2 Entire Agreement. This document represents the entire agreement between
+OBJECTIVE DEVELOPMENT and you. It may only be modified in writing signed by
+an authorized representative of both, OBJECTIVE DEVELOPMENT and you.
+
+8.3 Severability. In case a provision of these terms and conditions should
+be or become partly or entirely invalid, ineffective, or not executable,
+the validity of all other provisions shall not be affected.
+
+8.4 Applicable Law. This agreement is governed by the laws of the Republic
+of Austria.
+
+8.5 Responsible Courts. The responsible courts in Vienna/Austria will have
+exclusive jurisdiction regarding all disputes in connection with this
+agreement.
+
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/License.txt b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/License.txt
new file mode 100644
index 00000000..4460cfba
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/License.txt
@@ -0,0 +1,361 @@
+OBJECTIVE DEVELOPMENT GmbH's V-USB driver software is distributed under the
+terms and conditions of the GNU GPL version 2 or the GNU GPL version 3. It is
+your choice whether you apply the terms of version 2 or version 3. The full
+text of GPLv2 is included below. In addition to the requirements in the GPL,
+we STRONGLY ENCOURAGE you to do the following:
+
+(1) Publish your entire project on a web site and drop us a note with the URL.
+Use the form at http://www.obdev.at/vusb/feedback.html for your submission.
+
+(2) Adhere to minimum publication standards. Please include AT LEAST:
+    - a circuit diagram in PDF, PNG or GIF format
+    - full source code for the host software
+    - a Readme.txt file in ASCII format which describes the purpose of the
+      project and what can be found in which directories and which files
+    - a reference to http://www.obdev.at/vusb/
+
+(3) If you improve the driver firmware itself, please give us a free license
+to your modifications for our commercial license offerings.
+
+
+
+                    GNU GENERAL PUBLIC LICENSE
+                       Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+                       59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+                            Preamble
+
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users.  This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
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+
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+  The precise terms and conditions for copying, distribution and
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+
+                    GNU GENERAL PUBLIC LICENSE
+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+  0. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License.  The "Program", below,
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+
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+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
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+Whether that is true depends on what the Program does.
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+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
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+along with the Program.
+
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+
+  2. You may modify your copy or copies of the Program or any portion
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+distribute such modifications or work under the terms of Section 1
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+
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+
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+
+These requirements apply to the modified work as a whole.  If
+identifiable sections of that work are not derived from the Program,
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+
+  4. You may not copy, modify, sublicense, or distribute the Program
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+
+  6. Each time you redistribute the Program (or any work based on the
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+
+If any portion of this section is held invalid or unenforceable under
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+
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+
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+
+  8. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
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+
+  9. The Free Software Foundation may publish revised and/or new versions
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+
+Each version is given a distinguishing version number.  If the Program
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+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation.  If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+
+  10. If you wish to incorporate parts of the Program into other free
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+
+                            NO WARRANTY
+
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+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
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+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+                     END OF TERMS AND CONDITIONS
+
+            How to Apply These Terms to Your New Programs
+
+  If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+  To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+    <one line to give the program's name and a brief idea of what it does.>
+    Copyright (C) <year>  <name of author>
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+    Gnomovision version 69, Copyright (C) year name of author
+    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+    This is free software, and you are welcome to redistribute it
+    under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License.  Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  Here is a sample; alter the names:
+
+  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+  `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+  <signature of Ty Coon>, 1 April 1989
+  Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs.  If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library.  If this is what you want to do, use the GNU Library General
+Public License instead of this License.
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/Readme.txt b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/Readme.txt
new file mode 100644
index 00000000..970dc66b
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/Readme.txt
@@ -0,0 +1,172 @@
+This is the Readme file to Objective Development's firmware-only USB driver
+for Atmel AVR microcontrollers. For more information please visit
+http://www.obdev.at/vusb/
+
+This directory contains the USB firmware only. Copy it as-is to your own
+project and add all .c and .S files to your project (these files are marked
+with an asterisk in the list below). Then copy usbconfig-prototype.h as
+usbconfig.h to your project and edit it according to your configuration.
+
+
+TECHNICAL DOCUMENTATION
+=======================
+The technical documentation (API) for the firmware driver is contained in the
+file "usbdrv.h". Please read all of it carefully! Configuration options are
+documented in "usbconfig-prototype.h".
+
+The driver consists of the following files:
+  Readme.txt ............. The file you are currently reading.
+  Changelog.txt .......... Release notes for all versions of the driver.
+  usbdrv.h ............... Driver interface definitions and technical docs.
+* usbdrv.c ............... High level language part of the driver. Link this
+                           module to your code!
+* usbdrvasm.S ............ Assembler part of the driver. This module is mostly
+                           a stub and includes one of the usbdrvasm*.S files
+                           depending on processor clock. Link this module to
+                           your code!
+  usbdrvasm*.inc ......... Assembler routines for particular clock frequencies.
+                           Included by usbdrvasm.S, don't link it directly!
+  asmcommon.inc .......... Common assembler routines. Included by
+                           usbdrvasm*.inc, don't link it directly!
+  usbconfig-prototype.h .. Prototype for your own usbdrv.h file.
+* oddebug.c .............. Debug functions. Only used when DEBUG_LEVEL is
+                           defined to a value greater than 0. Link this module
+                           to your code!
+  oddebug.h .............. Interface definitions of the debug module.
+  usbportability.h ....... Header with compiler-dependent stuff.
+  usbdrvasm.asm .......... Compatibility stub for IAR-C-compiler. Use this
+                           module instead of usbdrvasm.S when you assembler
+                           with IAR's tools.
+  License.txt ............ Open Source license for this driver.
+  CommercialLicense.txt .. Optional commercial license for this driver.
+  USB-ID-FAQ.txt ......... General infos about USB Product- and Vendor-IDs.
+  USB-IDs-for-free.txt ... List and terms of use for free shared PIDs.
+
+(*) ... These files should be linked to your project.
+
+
+CPU CORE CLOCK FREQUENCY
+========================
+We supply assembler modules for clock frequencies of 12 MHz, 12.8 MHz, 15 MHz,
+16 MHz, 16.5 MHz 18 MHz and 20 MHz. Other clock rates are not supported. The
+actual clock rate must be configured in usbconfig.h.
+
+12 MHz Clock
+This is the traditional clock rate of V-USB because it's the lowest clock
+rate where the timing constraints of the USB spec can be met.
+
+15 MHz Clock
+Similar to 12 MHz, but some NOPs inserted. On the other hand, the higher clock
+rate allows for some loops which make the resulting code size somewhat smaller
+than the 12 MHz version.
+
+16 MHz Clock
+This clock rate has been added for users of the Arduino board and other
+ready-made boards which come with a fixed 16 MHz crystal. It's also an option
+if you need the slightly higher clock rate for performance reasons. Since
+16 MHz is not divisible by the USB low speed bit clock of 1.5 MHz, the code
+is somewhat tricky and has to insert a leap cycle every third byte.
+
+12.8 MHz and 16.5 MHz Clock
+The assembler modules for these clock rates differ from the other modules
+because they have been built for an RC oscillator with only 1% precision. The
+receiver code inserts leap cycles to compensate for clock deviations. 1% is
+also the precision which can be achieved by calibrating the internal RC
+oscillator of the AVR. Please note that only AVRs with internal 64 MHz PLL
+oscillator can reach 16.5 MHz with the RC oscillator. This includes the very
+popular ATTiny25, ATTiny45, ATTiny85 series as well as the ATTiny26. Almost
+all AVRs can reach 12.8 MHz, although this is outside the specified range.
+
+See the EasyLogger example at http://www.obdev.at/vusb/easylogger.html for
+code which calibrates the RC oscillator based on the USB frame clock.
+
+18 MHz Clock
+This module is closer to the USB specification because it performs an on the
+fly CRC check for incoming packets. Packets with invalid checksum are
+discarded as required by the spec. If you also implement checks for data
+PID toggling on application level (see option USB_CFG_CHECK_DATA_TOGGLING
+in usbconfig.h for more info), this ensures data integrity. Due to the CRC
+tables and alignment requirements, this code is bigger than modules for other
+clock rates. To activate this module, you must define USB_CFG_CHECK_CRC to 1
+and USB_CFG_CLOCK_KHZ to 18000 in usbconfig.h.
+
+20 MHz Clock
+This module is for people who won't do it with less than the maximum. Since
+20 MHz is not divisible by the USB low speed bit clock of 1.5 MHz, the code
+uses similar tricks as the 16 MHz module to insert leap cycles.
+
+
+USB IDENTIFIERS
+===============
+Every USB device needs a vendor- and a product-identifier (VID and PID). VIDs
+are obtained from usb.org for a price of 1,500 USD. Once you have a VID, you
+can assign PIDs at will.
+
+Since an entry level cost of 1,500 USD is too high for most small companies
+and hobbyists, we provide some VID/PID pairs for free. See the file
+USB-IDs-for-free.txt for details.
+
+Objective Development also has some license offerings which include product
+IDs. See http://www.obdev.at/vusb/ for details.
+
+
+DEVELOPMENT SYSTEM
+==================
+This driver has been developed and optimized for the GNU compiler version 3
+and 4. We recommend that you use the GNU compiler suite because it is freely
+available. V-USB has also been ported to the IAR compiler and assembler. It
+has been tested with IAR 4.10B/W32 and 4.12A/W32 on an ATmega8 with the
+"small" and "tiny" memory model. Not every release is tested with IAR CC and
+the driver may therefore fail to compile with IAR. Please note that gcc is
+more efficient for usbdrv.c because this module has been deliberately
+optimized for gcc.
+
+Gcc version 3 produces smaller code than version 4 due to new optimizing
+capabilities which don't always improve things on 8 bit CPUs. The code size
+generated by gcc 4 can be reduced with the compiler options
+-fno-move-loop-invariants, -fno-tree-scev-cprop and
+-fno-inline-small-functions in addition to -Os. On devices with more than
+8k of flash memory, we also recommend the linker option --relax (written as
+-Wl,--relax for gcc) to convert absolute calls into relative where possible.
+
+For more information about optimizing options see:
+
+    http://www.tty1.net/blog/2008-04-29-avr-gcc-optimisations_en.html
+
+These optimizations are good for gcc 4.x. Version 3.x of gcc does not support
+most of these options and produces good code anyway.
+
+
+USING V-USB FOR FREE
+====================
+The AVR firmware driver is published under the GNU General Public License
+Version 2 (GPL2) and the GNU General Public License Version 3 (GPL3). It is
+your choice whether you apply the terms of version 2 or version 3.
+
+If you decide for the free GPL2 or GPL3, we STRONGLY ENCOURAGE you to do the
+following things IN ADDITION to the obligations from the GPL:
+
+(1) Publish your entire project on a web site and drop us a note with the URL.
+Use the form at http://www.obdev.at/vusb/feedback.html for your submission.
+If you don't have a web site, you can publish the project in obdev's
+documentation wiki at
+http://www.obdev.at/goto.php?t=vusb-wiki&p=hosted-projects.
+
+(2) Adhere to minimum publication standards. Please include AT LEAST:
+    - a circuit diagram in PDF, PNG or GIF format
+    - full source code for the host software
+    - a Readme.txt file in ASCII format which describes the purpose of the
+      project and what can be found in which directories and which files
+    - a reference to http://www.obdev.at/vusb/
+
+(3) If you improve the driver firmware itself, please give us a free license
+to your modifications for our commercial license offerings.
+
+
+COMMERCIAL LICENSES FOR V-USB
+=============================
+If you don't want to publish your source code under the terms of the GPL,
+you can simply pay money for V-USB. As an additional benefit you get
+USB PIDs for free, reserved exclusively to you. See the file
+"CommercialLicense.txt" for details.
+
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/USB-ID-FAQ.txt b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/USB-ID-FAQ.txt
new file mode 100644
index 00000000..d1de8fb6
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/USB-ID-FAQ.txt
@@ -0,0 +1,149 @@
+Version 2009-08-22
+
+==========================
+WHY DO WE NEED THESE IDs?
+==========================
+
+USB is more than a low level protocol for data transport. It also defines a
+common set of requests which must be understood by all devices. And as part
+of these common requests, the specification defines data structures, the
+USB Descriptors, which are used to describe the properties of the device.
+
+From the perspective of an operating system, it is therefore possible to find
+out basic properties of a device (such as e.g. the manufacturer and the name
+of the device) without a device-specific driver. This is essential because
+the operating system can choose a driver to load based on this information
+(Plug-And-Play).
+
+Among the most important properties in the Device Descriptor are the USB
+Vendor- and Product-ID. Both are 16 bit integers. The most simple form of
+driver matching is based on these IDs. The driver announces the Vendor- and
+Product-IDs of the devices it can handle and the operating system loads the
+appropriate driver when the device is connected.
+
+It is obvious that this technique only works if the pair Vendor- plus
+Product-ID is unique: Only devices which require the same driver can have the
+same pair of IDs.
+
+
+=====================================================
+HOW DOES THE USB STANDARD ENSURE THAT IDs ARE UNIQUE?
+=====================================================
+
+Since it is so important that USB IDs are unique, the USB Implementers Forum,
+Inc. (usb.org) needs a way to enforce this legally. It is not forbidden by
+law to build a device and assign it any random numbers as IDs. Usb.org
+therefore needs an agreement to regulate the use of USB IDs. The agreement
+binds only parties who agreed to it, of course. Everybody else is free to use
+any numbers for their IDs.
+
+So how can usb.org ensure that every manufacturer of USB devices enters into
+an agreement with them? They do it via trademark licensing. Usb.org has
+registered the trademark "USB", all associated logos and related terms. If
+you want to put an USB logo on your product or claim that it is USB
+compliant, you must license these trademarks from usb.org. And this is where
+you enter into an agreement. See the "USB-IF Trademark License Agreement and
+Usage Guidelines for the USB-IF Logo" at
+http://www.usb.org/developers/logo_license/.
+
+Licensing the USB trademarks requires that you buy a USB Vendor-ID from
+usb.org (one-time fee of ca. 2,000 USD), that you become a member of usb.org
+(yearly fee of ca. 4,000 USD) and that you meet all the technical
+specifications from the USB spec.
+
+This means that most hobbyists and small companies will never be able to
+become USB compliant, just because membership is so expensive. And you can't
+be compliant with a driver based on V-USB anyway, because the AVR's port pins
+don't meet the electrical specifications for USB. So, in principle, all
+hobbyists and small companies are free to choose any random numbers for their
+IDs. They have nothing to lose...
+
+There is one exception worth noting, though: If you use a sub-component which
+implements USB, the vendor of the sub-components may guarantee USB
+compliance. This might apply to some or all of FTDI's solutions.
+
+
+=======================================================================
+WHY SHOULD YOU OBTAIN USB IDs EVEN IF YOU DON'T LICENSE USB TRADEMARKS?
+=======================================================================
+
+You have learned in the previous section that you are free to choose any
+numbers for your IDs anyway. So why not do exactly this? There is still the
+technical issue. If you choose IDs which are already in use by somebody else,
+operating systems will load the wrong drivers and your device won't work.
+Even if you choose IDs which are not currently in use, they may be in use in
+the next version of the operating system or even after an automatic update.
+
+So what you need is a pair of Vendor- and Product-IDs for which you have the
+guarantee that no USB compliant product uses them. This implies that no
+operating system will ever ship with drivers responsible for these IDs.
+
+
+==============================================
+HOW DOES OBJECTIVE DEVELOPMENT HANDLE USB IDs?
+==============================================
+
+Objective Development gives away pairs of USB-IDs with their V-USB licenses.
+In order to ensure that these IDs are unique, Objective Development has an
+agreement with the company/person who has bought the USB Vendor-ID from
+usb.org. This agreement ensures that a range of USB Product-IDs is reserved
+for assignment by Objective Development and that the owner of the Vendor-ID
+won't give it to anybody else.
+
+This means that you have to trust three parties to ensure uniqueness of
+your IDs:
+
+  - Objective Development, that they don't give the same PID to more than
+    one person.
+  - The owner of the Vendor-ID that they don't assign PIDs from the range
+    assigned to Objective Development to anybody else.
+  - Usb.org that they don't assign the same Vendor-ID a second time.
+
+
+==================================
+WHO IS THE OWNER OF THE VENDOR-ID?
+==================================
+
+Objective Development has obtained ranges of USB Product-IDs under two
+Vendor-IDs: Under Vendor-ID 5824 from Wouter van Ooijen (Van Ooijen
+Technische Informatica, www.voti.nl) and under Vendor-ID 8352 from Jason
+Kotzin (Clay Logic, www.claylogic.com). Both VID owners have received their
+Vendor-ID directly from usb.org.
+
+
+=========================================================================
+CAN I USE USB-IDs FROM OBJECTIVE DEVELOPMENT WITH OTHER DRIVERS/HARDWARE?
+=========================================================================
+
+The short answer is: Yes. All you get is a guarantee that the IDs are never
+assigned to anybody else. What more do you need?
+
+
+============================
+WHAT ABOUT SHARED ID PAIRS?
+============================
+
+Objective Development has reserved some PID/VID pairs for shared use. You
+have no guarantee of uniqueness for them, except that no USB compliant device
+uses them. In order to avoid technical problems, we must ensure that all
+devices with the same pair of IDs use the same driver on kernel level. For
+details, see the file USB-IDs-for-free.txt.
+
+
+======================================================
+I HAVE HEARD THAT SUB-LICENSING OF USB-IDs IS ILLEGAL?
+======================================================
+
+A 16 bit integer number cannot be protected by copyright laws. It is not
+sufficiently complex. And since none of the parties involved entered into the
+USB-IF Trademark License Agreement, we are not bound by this agreement. So
+there is no reason why it should be illegal to sub-license USB-IDs.
+
+
+=============================================
+WHO IS LIABLE IF THERE ARE INCOMPATIBILITIES?
+=============================================
+
+Objective Development disclaims all liabilities which might arise from the
+assignment of IDs. If you guarantee product features to your customers
+without proper disclaimer, YOU are liable for that.
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/USB-IDs-for-free.txt b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/USB-IDs-for-free.txt
new file mode 100644
index 00000000..2f4d59ad
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/USB-IDs-for-free.txt
@@ -0,0 +1,148 @@
+Version 2009-08-22
+
+===========================
+FREE USB-IDs FOR SHARED USE
+===========================
+
+Objective Development has reserved a set of USB Product-IDs for use according
+to the guidelines outlined below. For more information about the concept of
+USB IDs please see the file USB-ID-FAQ.txt. Objective Development guarantees
+that the IDs listed below are not used by any USB compliant devices.
+
+
+====================
+MECHANISM OF SHARING
+====================
+
+From a technical point of view, two different devices can share the same USB
+Vendor- and Product-ID if they require the same driver on operating system
+level. We make use of this fact by assigning separate IDs for various device
+classes. On application layer, devices must be distinguished by their textual
+name or serial number. We offer separate sets of IDs for discrimination by
+textual name and for serial number.
+
+Examples for shared use of USB IDs are included with V-USB in the "examples"
+subdirectory.
+
+
+======================================
+IDs FOR DISCRIMINATION BY TEXTUAL NAME
+======================================
+
+If you use one of the IDs listed below, your device and host-side software
+must conform to these rules:
+
+(1) The USB device MUST provide a textual representation of the manufacturer
+and product identification. The manufacturer identification MUST be available
+at least in USB language 0x0409 (English/US).
+
+(2) The textual manufacturer identification MUST contain either an Internet
+domain name (e.g. "mycompany.com") registered and owned by you, or an e-mail
+address under your control (e.g. "myname@gmx.net"). You can embed the domain
+name or e-mail address in any string you like, e.g.  "Objective Development
+http://www.obdev.at/vusb/".
+
+(3) You are responsible for retaining ownership of the domain or e-mail
+address for as long as any of your products are in use.
+
+(4) You may choose any string for the textual product identification, as long
+as this string is unique within the scope of your textual manufacturer
+identification.
+
+(5) Application side device look-up MUST be based on the textual manufacturer
+and product identification in addition to VID/PID matching. The driver
+matching MUST be a comparison of the entire strings, NOT a sub-string match.
+
+(6) For devices which implement a particular USB device class (e.g. HID), the
+operating system's default class driver MUST be used. If an operating system
+driver for Vendor Class devices is needed, this driver must be libusb or
+libusb-win32 (see http://libusb.org/ and
+http://libusb-win32.sourceforge.net/).
+
+Table if IDs for discrimination by textual name:
+
+PID dec (hex) | VID dec (hex) | Description of use
+==============+===============+============================================
+1500 (0x05dc) | 5824 (0x16c0) | For Vendor Class devices with libusb
+--------------+---------------+--------------------------------------------
+1503 (0x05df) | 5824 (0x16c0) | For generic HID class devices (which are
+              |               | NOT mice, keyboards or joysticks)
+--------------+---------------+--------------------------------------------
+1505 (0x05e1) | 5824 (0x16c0) | For CDC-ACM class devices (modems)
+--------------+---------------+--------------------------------------------
+1508 (0x05e4) | 5824 (0x16c0) | For MIDI class devices
+--------------+---------------+--------------------------------------------
+
+Note that Windows caches the textual product- and vendor-description for
+mice, keyboards and joysticks. Name-bsed discrimination is therefore not
+recommended for these device classes.
+
+
+=======================================
+IDs FOR DISCRIMINATION BY SERIAL NUMBER
+=======================================
+
+If you use one of the IDs listed below, your device and host-side software
+must conform to these rules:
+
+(1) The USB device MUST provide a textual representation of the serial
+number. The serial number string MUST be available at least in USB language
+0x0409 (English/US).
+
+(2) The serial number MUST start with either an Internet domain name (e.g.
+"mycompany.com") registered and owned by you, or an e-mail address under your
+control (e.g. "myname@gmx.net"), both terminated with a colon (":") character.
+You MAY append any string you like for further discrimination of your devices.
+
+(3) You are responsible for retaining ownership of the domain or e-mail
+address for as long as any of your products are in use.
+
+(5) Application side device look-up MUST be based on the serial number string
+in addition to VID/PID matching. The matching must start at the first
+character of the serial number string and include the colon character
+terminating your domain or e-mail address. It MAY stop anywhere after that.
+
+(6) For devices which implement a particular USB device class (e.g. HID), the
+operating system's default class driver MUST be used. If an operating system
+driver for Vendor Class devices is needed, this driver must be libusb or
+libusb-win32 (see http://libusb.org/ and
+http://libusb-win32.sourceforge.net/).
+
+Table if IDs for discrimination by serial number string:
+
+PID dec (hex)  | VID dec (hex) | Description of use
+===============+===============+===========================================
+10200 (0x27d8) | 5824 (0x16c0) | For Vendor Class devices with libusb
+---------------+---------------+-------------------------------------------
+10201 (0x27d9) | 5824 (0x16c0) | For generic HID class devices (which are
+               |               | NOT mice, keyboards or joysticks)
+---------------+---------------+-------------------------------------------
+10202 (0x27da) | 5824 (0x16c0) | For USB Mice
+---------------+---------------+-------------------------------------------
+10203 (0x27db) | 5824 (0x16c0) | For USB Keyboards
+---------------+---------------+-------------------------------------------
+10204 (0x27db) | 5824 (0x16c0) | For USB Joysticks
+---------------+---------------+-------------------------------------------
+10205 (0x27dc) | 5824 (0x16c0) | For CDC-ACM class devices (modems)
+---------------+---------------+-------------------------------------------
+10206 (0x27dd) | 5824 (0x16c0) | For MIDI class devices
+---------------+---------------+-------------------------------------------
+
+
+=================
+ORIGIN OF USB-IDs
+=================
+
+OBJECTIVE DEVELOPMENT Software GmbH has obtained all VID/PID pairs listed
+here from Wouter van Ooijen (see www.voti.nl) for exclusive disposition.
+Wouter van Ooijen has obtained the VID from the USB Implementers Forum, Inc.
+(see www.usb.org). The VID is registered for the company name "Van Ooijen
+Technische Informatica".
+
+
+==========
+DISCLAIMER
+==========
+
+OBJECTIVE DEVELOPMENT Software GmbH disclaims all liability for any
+problems which are caused by the shared use of these VID/PID pairs.
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/asmcommon.inc b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/asmcommon.inc
new file mode 100644
index 00000000..07d692be
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/asmcommon.inc
@@ -0,0 +1,188 @@
+/* Name: asmcommon.inc
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2007-11-05
+ * Tabsize: 4
+ * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * Revision: $Id$
+ */
+
+/* Do not link this file! Link usbdrvasm.S instead, which includes the
+ * appropriate implementation!
+ */
+
+/*
+General Description:
+This file contains assembler code which is shared among the USB driver
+implementations for different CPU cocks. Since the code must be inserted
+in the middle of the module, it's split out into this file and #included.
+
+Jump destinations called from outside:
+    sofError: Called when no start sequence was found.
+    se0: Called when a package has been successfully received.
+    overflow: Called when receive buffer overflows.
+    doReturn: Called after sending data.
+
+Outside jump destinations used by this module:
+    waitForJ: Called to receive an already arriving packet.
+    sendAckAndReti:
+    sendNakAndReti:
+    sendCntAndReti:
+    usbSendAndReti:
+
+The following macros must be defined before this file is included:
+    .macro POP_STANDARD
+    .endm
+    .macro POP_RETI
+    .endm
+*/
+
+#define token   x1
+
+overflow:
+    ldi     x2, 1<<USB_INTR_PENDING_BIT
+    USB_STORE_PENDING(x2)       ; clear any pending interrupts
+ignorePacket:
+    clr     token
+    rjmp    storeTokenAndReturn
+
+;----------------------------------------------------------------------------
+; Processing of received packet (numbers in brackets are cycles after center of SE0)
+;----------------------------------------------------------------------------
+;This is the only non-error exit point for the software receiver loop
+;we don't check any CRCs here because there is no time left.
+se0:
+    subi    cnt, USB_BUFSIZE    ;[5]
+    neg     cnt                 ;[6]
+    sub     YL, cnt             ;[7]
+    sbci    YH, 0               ;[8]
+    ldi     x2, 1<<USB_INTR_PENDING_BIT ;[9]
+    USB_STORE_PENDING(x2)       ;[10] clear pending intr and check flag later. SE0 should be over.
+    ld      token, y            ;[11]
+    cpi     token, USBPID_DATA0 ;[13]
+    breq    handleData          ;[14]
+    cpi     token, USBPID_DATA1 ;[15]
+    breq    handleData          ;[16]
+    lds     shift, usbDeviceAddr;[17]
+    ldd     x2, y+1             ;[19] ADDR and 1 bit endpoint number
+    lsl     x2                  ;[21] shift out 1 bit endpoint number
+    cpse    x2, shift           ;[22]
+    rjmp    ignorePacket        ;[23]
+/* only compute endpoint number in x3 if required later */
+#if USB_CFG_HAVE_INTRIN_ENDPOINT || USB_CFG_IMPLEMENT_FN_WRITEOUT
+    ldd     x3, y+2             ;[24] endpoint number + crc
+    rol     x3                  ;[26] shift in LSB of endpoint
+#endif
+    cpi     token, USBPID_IN    ;[27]
+    breq    handleIn            ;[28]
+    cpi     token, USBPID_SETUP ;[29]
+    breq    handleSetupOrOut    ;[30]
+    cpi     token, USBPID_OUT   ;[31]
+    brne    ignorePacket        ;[32] must be ack, nak or whatever
+;   rjmp    handleSetupOrOut    ; fallthrough
+
+;Setup and Out are followed by a data packet two bit times (16 cycles) after
+;the end of SE0. The sync code allows up to 40 cycles delay from the start of
+;the sync pattern until the first bit is sampled. That's a total of 56 cycles.
+handleSetupOrOut:               ;[32]
+#if USB_CFG_IMPLEMENT_FN_WRITEOUT   /* if we have data for endpoint != 0, set usbCurrentTok to address */
+    andi    x3, 0xf             ;[32]
+    breq    storeTokenAndReturn ;[33]
+    mov     token, x3           ;[34] indicate that this is endpoint x OUT
+#endif
+storeTokenAndReturn:
+    sts     usbCurrentTok, token;[35]
+doReturn:
+    POP_STANDARD                ;[37] 12...16 cycles
+    USB_LOAD_PENDING(YL)        ;[49]
+    sbrc    YL, USB_INTR_PENDING_BIT;[50] check whether data is already arriving
+    rjmp    waitForJ            ;[51] save the pops and pushes -- a new interrupt is already pending
+sofError:
+    POP_RETI                    ;macro call
+    reti
+
+handleData:
+#if USB_CFG_CHECK_CRC
+    CRC_CLEANUP_AND_CHECK       ; jumps to ignorePacket if CRC error
+#endif
+    lds     shift, usbCurrentTok;[18]
+    tst     shift               ;[20]
+    breq    doReturn            ;[21]
+    lds     x2, usbRxLen        ;[22]
+    tst     x2                  ;[24]
+    brne    sendNakAndReti      ;[25]
+; 2006-03-11: The following two lines fix a problem where the device was not
+; recognized if usbPoll() was called less frequently than once every 4 ms.
+    cpi     cnt, 4              ;[26] zero sized data packets are status phase only -- ignore and ack
+    brmi    sendAckAndReti      ;[27] keep rx buffer clean -- we must not NAK next SETUP
+#if USB_CFG_CHECK_DATA_TOGGLING
+    sts     usbCurrentDataToken, token  ; store for checking by C code
+#endif
+    sts     usbRxLen, cnt       ;[28] store received data, swap buffers
+    sts     usbRxToken, shift   ;[30]
+    lds     x2, usbInputBufOffset;[32] swap buffers
+    ldi     cnt, USB_BUFSIZE    ;[34]
+    sub     cnt, x2             ;[35]
+    sts     usbInputBufOffset, cnt;[36] buffers now swapped
+    rjmp    sendAckAndReti      ;[38] 40 + 17 = 57 until SOP
+
+handleIn:
+;We don't send any data as long as the C code has not processed the current
+;input data and potentially updated the output data. That's more efficient
+;in terms of code size than clearing the tx buffers when a packet is received.
+    lds     x1, usbRxLen        ;[30]
+    cpi     x1, 1               ;[32] negative values are flow control, 0 means "buffer free"
+    brge    sendNakAndReti      ;[33] unprocessed input packet?
+    ldi     x1, USBPID_NAK      ;[34] prepare value for usbTxLen
+#if USB_CFG_HAVE_INTRIN_ENDPOINT
+    andi    x3, 0xf             ;[35] x3 contains endpoint
+#if USB_CFG_SUPPRESS_INTR_CODE
+    brne    sendNakAndReti      ;[36]
+#else
+    brne    handleIn1           ;[36]
+#endif
+#endif
+    lds     cnt, usbTxLen       ;[37]
+    sbrc    cnt, 4              ;[39] all handshake tokens have bit 4 set
+    rjmp    sendCntAndReti      ;[40] 42 + 16 = 58 until SOP
+    sts     usbTxLen, x1        ;[41] x1 == USBPID_NAK from above
+    ldi     YL, lo8(usbTxBuf)   ;[43]
+    ldi     YH, hi8(usbTxBuf)   ;[44]
+    rjmp    usbSendAndReti      ;[45] 57 + 12 = 59 until SOP
+
+; Comment about when to set usbTxLen to USBPID_NAK:
+; We should set it back when we receive the ACK from the host. This would
+; be simple to implement: One static variable which stores whether the last
+; tx was for endpoint 0 or 1 and a compare in the receiver to distinguish the
+; ACK. However, we set it back immediately when we send the package,
+; assuming that no error occurs and the host sends an ACK. We save one byte
+; RAM this way and avoid potential problems with endless retries. The rest of
+; the driver assumes error-free transfers anyway.
+
+#if !USB_CFG_SUPPRESS_INTR_CODE && USB_CFG_HAVE_INTRIN_ENDPOINT /* placed here due to relative jump range */
+handleIn1:                      ;[38]
+#if USB_CFG_HAVE_INTRIN_ENDPOINT3
+; 2006-06-10 as suggested by O.Tamura: support second INTR IN / BULK IN endpoint
+    cpi     x3, USB_CFG_EP3_NUMBER;[38]
+    breq    handleIn3           ;[39]
+#endif
+    lds     cnt, usbTxLen1      ;[40]
+    sbrc    cnt, 4              ;[42] all handshake tokens have bit 4 set
+    rjmp    sendCntAndReti      ;[43] 47 + 16 = 63 until SOP
+    sts     usbTxLen1, x1       ;[44] x1 == USBPID_NAK from above
+    ldi     YL, lo8(usbTxBuf1)  ;[46]
+    ldi     YH, hi8(usbTxBuf1)  ;[47]
+    rjmp    usbSendAndReti      ;[48] 50 + 12 = 62 until SOP
+
+#if USB_CFG_HAVE_INTRIN_ENDPOINT3
+handleIn3:
+    lds     cnt, usbTxLen3      ;[41]
+    sbrc    cnt, 4              ;[43]
+    rjmp    sendCntAndReti      ;[44] 49 + 16 = 65 until SOP
+    sts     usbTxLen3, x1       ;[45] x1 == USBPID_NAK from above
+    ldi     YL, lo8(usbTxBuf3)  ;[47]
+    ldi     YH, hi8(usbTxBuf3)  ;[48]
+    rjmp    usbSendAndReti      ;[49] 51 + 12 = 63 until SOP
+#endif
+#endif
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/oddebug.c b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/oddebug.c
new file mode 100644
index 00000000..945457c1
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/oddebug.c
@@ -0,0 +1,50 @@
+/* Name: oddebug.c
+ * Project: AVR library
+ * Author: Christian Starkjohann
+ * Creation Date: 2005-01-16
+ * Tabsize: 4
+ * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * This Revision: $Id: oddebug.c 692 2008-11-07 15:07:40Z cs $
+ */
+
+#include "oddebug.h"
+
+#if DEBUG_LEVEL > 0
+
+#warning "Never compile production devices with debugging enabled"
+
+static void uartPutc(char c)
+{
+    while(!(ODDBG_USR & (1 << ODDBG_UDRE)));    /* wait for data register empty */
+    ODDBG_UDR = c;
+}
+
+static uchar    hexAscii(uchar h)
+{
+    h &= 0xf;
+    if(h >= 10)
+        h += 'a' - (uchar)10 - '0';
+    h += '0';
+    return h;
+}
+
+static void printHex(uchar c)
+{
+    uartPutc(hexAscii(c >> 4));
+    uartPutc(hexAscii(c));
+}
+
+void    odDebug(uchar prefix, uchar *data, uchar len)
+{
+    printHex(prefix);
+    uartPutc(':');
+    while(len--){
+        uartPutc(' ');
+        printHex(*data++);
+    }
+    uartPutc('\r');
+    uartPutc('\n');
+}
+
+#endif
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/oddebug.h b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/oddebug.h
new file mode 100644
index 00000000..d61309da
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/oddebug.h
@@ -0,0 +1,123 @@
+/* Name: oddebug.h
+ * Project: AVR library
+ * Author: Christian Starkjohann
+ * Creation Date: 2005-01-16
+ * Tabsize: 4
+ * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * This Revision: $Id: oddebug.h 692 2008-11-07 15:07:40Z cs $
+ */
+
+#ifndef __oddebug_h_included__
+#define __oddebug_h_included__
+
+/*
+General Description:
+This module implements a function for debug logs on the serial line of the
+AVR microcontroller. Debugging can be configured with the define
+'DEBUG_LEVEL'. If this macro is not defined or defined to 0, all debugging
+calls are no-ops. If it is 1, DBG1 logs will appear, but not DBG2. If it is
+2, DBG1 and DBG2 logs will be printed.
+
+A debug log consists of a label ('prefix') to indicate which debug log created
+the output and a memory block to dump in hex ('data' and 'len').
+*/
+
+
+#ifndef F_CPU
+#   define  F_CPU   12000000    /* 12 MHz */
+#endif
+
+/* make sure we have the UART defines: */
+#include "usbportability.h"
+
+#ifndef uchar
+#   define  uchar   unsigned char
+#endif
+
+#if DEBUG_LEVEL > 0 && !(defined TXEN || defined TXEN0) /* no UART in device */
+#   warning "Debugging disabled because device has no UART"
+#   undef   DEBUG_LEVEL
+#endif
+
+#ifndef DEBUG_LEVEL
+#   define  DEBUG_LEVEL 0
+#endif
+
+/* ------------------------------------------------------------------------- */
+
+#if DEBUG_LEVEL > 0
+#   define  DBG1(prefix, data, len) odDebug(prefix, data, len)
+#else
+#   define  DBG1(prefix, data, len)
+#endif
+
+#if DEBUG_LEVEL > 1
+#   define  DBG2(prefix, data, len) odDebug(prefix, data, len)
+#else
+#   define  DBG2(prefix, data, len)
+#endif
+
+/* ------------------------------------------------------------------------- */
+
+#if DEBUG_LEVEL > 0
+extern void odDebug(uchar prefix, uchar *data, uchar len);
+
+/* Try to find our control registers; ATMEL likes to rename these */
+
+#if defined UBRR
+#   define  ODDBG_UBRR  UBRR
+#elif defined UBRRL
+#   define  ODDBG_UBRR  UBRRL
+#elif defined UBRR0
+#   define  ODDBG_UBRR  UBRR0
+#elif defined UBRR0L
+#   define  ODDBG_UBRR  UBRR0L
+#endif
+
+#if defined UCR
+#   define  ODDBG_UCR   UCR
+#elif defined UCSRB
+#   define  ODDBG_UCR   UCSRB
+#elif defined UCSR0B
+#   define  ODDBG_UCR   UCSR0B
+#endif
+
+#if defined TXEN
+#   define  ODDBG_TXEN  TXEN
+#else
+#   define  ODDBG_TXEN  TXEN0
+#endif
+
+#if defined USR
+#   define  ODDBG_USR   USR
+#elif defined UCSRA
+#   define  ODDBG_USR   UCSRA
+#elif defined UCSR0A
+#   define  ODDBG_USR   UCSR0A
+#endif
+
+#if defined UDRE
+#   define  ODDBG_UDRE  UDRE
+#else
+#   define  ODDBG_UDRE  UDRE0
+#endif
+
+#if defined UDR
+#   define  ODDBG_UDR   UDR
+#elif defined UDR0
+#   define  ODDBG_UDR   UDR0
+#endif
+
+static inline void  odDebugInit(void)
+{
+    ODDBG_UCR |= (1<<ODDBG_TXEN);
+    ODDBG_UBRR = F_CPU / (19200 * 16L) - 1;
+}
+#else
+#   define odDebugInit()
+#endif
+
+/* ------------------------------------------------------------------------- */
+
+#endif /* __oddebug_h_included__ */
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbconfig-prototype.h b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbconfig-prototype.h
new file mode 100644
index 00000000..847710e2
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbconfig-prototype.h
@@ -0,0 +1,376 @@
+/* Name: usbconfig.h
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2005-04-01
+ * Tabsize: 4
+ * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * This Revision: $Id: usbconfig-prototype.h 785 2010-05-30 17:57:07Z cs $
+ */
+
+#ifndef __usbconfig_h_included__
+#define __usbconfig_h_included__
+
+/*
+General Description:
+This file is an example configuration (with inline documentation) for the USB
+driver. It configures V-USB for USB D+ connected to Port D bit 2 (which is
+also hardware interrupt 0 on many devices) and USB D- to Port D bit 4. You may
+wire the lines to any other port, as long as D+ is also wired to INT0 (or any
+other hardware interrupt, as long as it is the highest level interrupt, see
+section at the end of this file).
++ To create your own usbconfig.h file, copy this file to your project's
++ firmware source directory) and rename it to "usbconfig.h".
++ Then edit it accordingly.
+*/
+
+/* ---------------------------- Hardware Config ---------------------------- */
+
+#define USB_CFG_IOPORTNAME      D
+/* This is the port where the USB bus is connected. When you configure it to
+ * "B", the registers PORTB, PINB and DDRB will be used.
+ */
+#define USB_CFG_DMINUS_BIT      4
+/* This is the bit number in USB_CFG_IOPORT where the USB D- line is connected.
+ * This may be any bit in the port.
+ */
+#define USB_CFG_DPLUS_BIT       2
+/* This is the bit number in USB_CFG_IOPORT where the USB D+ line is connected.
+ * This may be any bit in the port. Please note that D+ must also be connected
+ * to interrupt pin INT0! [You can also use other interrupts, see section
+ * "Optional MCU Description" below, or you can connect D- to the interrupt, as
+ * it is required if you use the USB_COUNT_SOF feature. If you use D- for the
+ * interrupt, the USB interrupt will also be triggered at Start-Of-Frame
+ * markers every millisecond.]
+ */
+#define USB_CFG_CLOCK_KHZ       (F_CPU/1000)
+/* Clock rate of the AVR in kHz. Legal values are 12000, 12800, 15000, 16000,
+ * 16500, 18000 and 20000. The 12.8 MHz and 16.5 MHz versions of the code
+ * require no crystal, they tolerate +/- 1% deviation from the nominal
+ * frequency. All other rates require a precision of 2000 ppm and thus a
+ * crystal!
+ * Since F_CPU should be defined to your actual clock rate anyway, you should
+ * not need to modify this setting.
+ */
+#define USB_CFG_CHECK_CRC       0
+/* Define this to 1 if you want that the driver checks integrity of incoming
+ * data packets (CRC checks). CRC checks cost quite a bit of code size and are
+ * currently only available for 18 MHz crystal clock. You must choose
+ * USB_CFG_CLOCK_KHZ = 18000 if you enable this option.
+ */
+
+/* ----------------------- Optional Hardware Config ------------------------ */
+
+/* #define USB_CFG_PULLUP_IOPORTNAME   D */
+/* If you connect the 1.5k pullup resistor from D- to a port pin instead of
+ * V+, you can connect and disconnect the device from firmware by calling
+ * the macros usbDeviceConnect() and usbDeviceDisconnect() (see usbdrv.h).
+ * This constant defines the port on which the pullup resistor is connected.
+ */
+/* #define USB_CFG_PULLUP_BIT          4 */
+/* This constant defines the bit number in USB_CFG_PULLUP_IOPORT (defined
+ * above) where the 1.5k pullup resistor is connected. See description
+ * above for details.
+ */
+
+/* --------------------------- Functional Range ---------------------------- */
+
+#define USB_CFG_HAVE_INTRIN_ENDPOINT    0
+/* Define this to 1 if you want to compile a version with two endpoints: The
+ * default control endpoint 0 and an interrupt-in endpoint (any other endpoint
+ * number).
+ */
+#define USB_CFG_HAVE_INTRIN_ENDPOINT3   0
+/* Define this to 1 if you want to compile a version with three endpoints: The
+ * default control endpoint 0, an interrupt-in endpoint 3 (or the number
+ * configured below) and a catch-all default interrupt-in endpoint as above.
+ * You must also define USB_CFG_HAVE_INTRIN_ENDPOINT to 1 for this feature.
+ */
+#define USB_CFG_EP3_NUMBER              3
+/* If the so-called endpoint 3 is used, it can now be configured to any other
+ * endpoint number (except 0) with this macro. Default if undefined is 3.
+ */
+/* #define USB_INITIAL_DATATOKEN           USBPID_DATA1 */
+/* The above macro defines the startup condition for data toggling on the
+ * interrupt/bulk endpoints 1 and 3. Defaults to USBPID_DATA1.
+ * Since the token is toggled BEFORE sending any data, the first packet is
+ * sent with the oposite value of this configuration!
+ */
+#define USB_CFG_IMPLEMENT_HALT          0
+/* Define this to 1 if you also want to implement the ENDPOINT_HALT feature
+ * for endpoint 1 (interrupt endpoint). Although you may not need this feature,
+ * it is required by the standard. We have made it a config option because it
+ * bloats the code considerably.
+ */
+#define USB_CFG_SUPPRESS_INTR_CODE      0
+/* Define this to 1 if you want to declare interrupt-in endpoints, but don't
+ * want to send any data over them. If this macro is defined to 1, functions
+ * usbSetInterrupt() and usbSetInterrupt3() are omitted. This is useful if
+ * you need the interrupt-in endpoints in order to comply to an interface
+ * (e.g. HID), but never want to send any data. This option saves a couple
+ * of bytes in flash memory and the transmit buffers in RAM.
+ */
+#define USB_CFG_INTR_POLL_INTERVAL      10
+/* If you compile a version with endpoint 1 (interrupt-in), this is the poll
+ * interval. The value is in milliseconds and must not be less than 10 ms for
+ * low speed devices.
+ */
+#define USB_CFG_IS_SELF_POWERED         0
+/* Define this to 1 if the device has its own power supply. Set it to 0 if the
+ * device is powered from the USB bus.
+ */
+#define USB_CFG_MAX_BUS_POWER           100
+/* Set this variable to the maximum USB bus power consumption of your device.
+ * The value is in milliamperes. [It will be divided by two since USB
+ * communicates power requirements in units of 2 mA.]
+ */
+#define USB_CFG_IMPLEMENT_FN_WRITE      0
+/* Set this to 1 if you want usbFunctionWrite() to be called for control-out
+ * transfers. Set it to 0 if you don't need it and want to save a couple of
+ * bytes.
+ */
+#define USB_CFG_IMPLEMENT_FN_READ       0
+/* Set this to 1 if you need to send control replies which are generated
+ * "on the fly" when usbFunctionRead() is called. If you only want to send
+ * data from a static buffer, set it to 0 and return the data from
+ * usbFunctionSetup(). This saves a couple of bytes.
+ */
+#define USB_CFG_IMPLEMENT_FN_WRITEOUT   0
+/* Define this to 1 if you want to use interrupt-out (or bulk out) endpoints.
+ * You must implement the function usbFunctionWriteOut() which receives all
+ * interrupt/bulk data sent to any endpoint other than 0. The endpoint number
+ * can be found in 'usbRxToken'.
+ */
+#define USB_CFG_HAVE_FLOWCONTROL        0
+/* Define this to 1 if you want flowcontrol over USB data. See the definition
+ * of the macros usbDisableAllRequests() and usbEnableAllRequests() in
+ * usbdrv.h.
+ */
+#define USB_CFG_DRIVER_FLASH_PAGE       0
+/* If the device has more than 64 kBytes of flash, define this to the 64 k page
+ * where the driver's constants (descriptors) are located. Or in other words:
+ * Define this to 1 for boot loaders on the ATMega128.
+ */
+#define USB_CFG_LONG_TRANSFERS          0
+/* Define this to 1 if you want to send/receive blocks of more than 254 bytes
+ * in a single control-in or control-out transfer. Note that the capability
+ * for long transfers increases the driver size.
+ */
+/* #define USB_RX_USER_HOOK(data, len)     if(usbRxToken == (uchar)USBPID_SETUP) blinkLED(); */
+/* This macro is a hook if you want to do unconventional things. If it is
+ * defined, it's inserted at the beginning of received message processing.
+ * If you eat the received message and don't want default processing to
+ * proceed, do a return after doing your things. One possible application
+ * (besides debugging) is to flash a status LED on each packet.
+ */
+/* #define USB_RESET_HOOK(resetStarts)     if(!resetStarts){hadUsbReset();} */
+/* This macro is a hook if you need to know when an USB RESET occurs. It has
+ * one parameter which distinguishes between the start of RESET state and its
+ * end.
+ */
+/* #define USB_SET_ADDRESS_HOOK()              hadAddressAssigned(); */
+/* This macro (if defined) is executed when a USB SET_ADDRESS request was
+ * received.
+ */
+#define USB_COUNT_SOF                   0
+/* define this macro to 1 if you need the global variable "usbSofCount" which
+ * counts SOF packets. This feature requires that the hardware interrupt is
+ * connected to D- instead of D+.
+ */
+/* #ifdef __ASSEMBLER__
+ * macro myAssemblerMacro
+ *     in      YL, TCNT0
+ *     sts     timer0Snapshot, YL
+ *     endm
+ * #endif
+ * #define USB_SOF_HOOK                    myAssemblerMacro
+ * This macro (if defined) is executed in the assembler module when a
+ * Start Of Frame condition is detected. It is recommended to define it to
+ * the name of an assembler macro which is defined here as well so that more
+ * than one assembler instruction can be used. The macro may use the register
+ * YL and modify SREG. If it lasts longer than a couple of cycles, USB messages
+ * immediately after an SOF pulse may be lost and must be retried by the host.
+ * What can you do with this hook? Since the SOF signal occurs exactly every
+ * 1 ms (unless the host is in sleep mode), you can use it to tune OSCCAL in
+ * designs running on the internal RC oscillator.
+ * Please note that Start Of Frame detection works only if D- is wired to the
+ * interrupt, not D+. THIS IS DIFFERENT THAN MOST EXAMPLES!
+ */
+#define USB_CFG_CHECK_DATA_TOGGLING     0
+/* define this macro to 1 if you want to filter out duplicate data packets
+ * sent by the host. Duplicates occur only as a consequence of communication
+ * errors, when the host does not receive an ACK. Please note that you need to
+ * implement the filtering yourself in usbFunctionWriteOut() and
+ * usbFunctionWrite(). Use the global usbCurrentDataToken and a static variable
+ * for each control- and out-endpoint to check for duplicate packets.
+ */
+#define USB_CFG_HAVE_MEASURE_FRAME_LENGTH   0
+/* define this macro to 1 if you want the function usbMeasureFrameLength()
+ * compiled in. This function can be used to calibrate the AVR's RC oscillator.
+ */
+#define USB_USE_FAST_CRC                0
+/* The assembler module has two implementations for the CRC algorithm. One is
+ * faster, the other is smaller. This CRC routine is only used for transmitted
+ * messages where timing is not critical. The faster routine needs 31 cycles
+ * per byte while the smaller one needs 61 to 69 cycles. The faster routine
+ * may be worth the 32 bytes bigger code size if you transmit lots of data and
+ * run the AVR close to its limit.
+ */
+
+/* -------------------------- Device Description --------------------------- */
+
+#define  USB_CFG_VENDOR_ID       0xc0, 0x16 /* = 0x16c0 = 5824 = voti.nl */
+/* USB vendor ID for the device, low byte first. If you have registered your
+ * own Vendor ID, define it here. Otherwise you may use one of obdev's free
+ * shared VID/PID pairs. Be sure to read USB-IDs-for-free.txt for rules!
+ * *** IMPORTANT NOTE ***
+ * This template uses obdev's shared VID/PID pair for Vendor Class devices
+ * with libusb: 0x16c0/0x5dc.  Use this VID/PID pair ONLY if you understand
+ * the implications!
+ */
+#define  USB_CFG_DEVICE_ID       0xdc, 0x05 /* = 0x05dc = 1500 */
+/* This is the ID of the product, low byte first. It is interpreted in the
+ * scope of the vendor ID. If you have registered your own VID with usb.org
+ * or if you have licensed a PID from somebody else, define it here. Otherwise
+ * you may use one of obdev's free shared VID/PID pairs. See the file
+ * USB-IDs-for-free.txt for details!
+ * *** IMPORTANT NOTE ***
+ * This template uses obdev's shared VID/PID pair for Vendor Class devices
+ * with libusb: 0x16c0/0x5dc.  Use this VID/PID pair ONLY if you understand
+ * the implications!
+ */
+#define USB_CFG_DEVICE_VERSION  0x00, 0x01
+/* Version number of the device: Minor number first, then major number.
+ */
+#define USB_CFG_VENDOR_NAME     'o', 'b', 'd', 'e', 'v', '.', 'a', 't'
+#define USB_CFG_VENDOR_NAME_LEN 8
+/* These two values define the vendor name returned by the USB device. The name
+ * must be given as a list of characters under single quotes. The characters
+ * are interpreted as Unicode (UTF-16) entities.
+ * If you don't want a vendor name string, undefine these macros.
+ * ALWAYS define a vendor name containing your Internet domain name if you use
+ * obdev's free shared VID/PID pair. See the file USB-IDs-for-free.txt for
+ * details.
+ */
+#define USB_CFG_DEVICE_NAME     'T', 'e', 'm', 'p', 'l', 'a', 't', 'e'
+#define USB_CFG_DEVICE_NAME_LEN 8
+/* Same as above for the device name. If you don't want a device name, undefine
+ * the macros. See the file USB-IDs-for-free.txt before you assign a name if
+ * you use a shared VID/PID.
+ */
+/*#define USB_CFG_SERIAL_NUMBER   'N', 'o', 'n', 'e' */
+/*#define USB_CFG_SERIAL_NUMBER_LEN   0 */
+/* Same as above for the serial number. If you don't want a serial number,
+ * undefine the macros.
+ * It may be useful to provide the serial number through other means than at
+ * compile time. See the section about descriptor properties below for how
+ * to fine tune control over USB descriptors such as the string descriptor
+ * for the serial number.
+ */
+#define USB_CFG_DEVICE_CLASS        0xff    /* set to 0 if deferred to interface */
+#define USB_CFG_DEVICE_SUBCLASS     0
+/* See USB specification if you want to conform to an existing device class.
+ * Class 0xff is "vendor specific".
+ */
+#define USB_CFG_INTERFACE_CLASS     0   /* define class here if not at device level */
+#define USB_CFG_INTERFACE_SUBCLASS  0
+#define USB_CFG_INTERFACE_PROTOCOL  0
+/* See USB specification if you want to conform to an existing device class or
+ * protocol. The following classes must be set at interface level:
+ * HID class is 3, no subclass and protocol required (but may be useful!)
+ * CDC class is 2, use subclass 2 and protocol 1 for ACM
+ */
+/* #define USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH    42 */
+/* Define this to the length of the HID report descriptor, if you implement
+ * an HID device. Otherwise don't define it or define it to 0.
+ * If you use this define, you must add a PROGMEM character array named
+ * "usbHidReportDescriptor" to your code which contains the report descriptor.
+ * Don't forget to keep the array and this define in sync!
+ */
+
+/* #define USB_PUBLIC static */
+/* Use the define above if you #include usbdrv.c instead of linking against it.
+ * This technique saves a couple of bytes in flash memory.
+ */
+
+/* ------------------- Fine Control over USB Descriptors ------------------- */
+/* If you don't want to use the driver's default USB descriptors, you can
+ * provide our own. These can be provided as (1) fixed length static data in
+ * flash memory, (2) fixed length static data in RAM or (3) dynamically at
+ * runtime in the function usbFunctionDescriptor(). See usbdrv.h for more
+ * information about this function.
+ * Descriptor handling is configured through the descriptor's properties. If
+ * no properties are defined or if they are 0, the default descriptor is used.
+ * Possible properties are:
+ *   + USB_PROP_IS_DYNAMIC: The data for the descriptor should be fetched
+ *     at runtime via usbFunctionDescriptor(). If the usbMsgPtr mechanism is
+ *     used, the data is in FLASH by default. Add property USB_PROP_IS_RAM if
+ *     you want RAM pointers.
+ *   + USB_PROP_IS_RAM: The data returned by usbFunctionDescriptor() or found
+ *     in static memory is in RAM, not in flash memory.
+ *   + USB_PROP_LENGTH(len): If the data is in static memory (RAM or flash),
+ *     the driver must know the descriptor's length. The descriptor itself is
+ *     found at the address of a well known identifier (see below).
+ * List of static descriptor names (must be declared PROGMEM if in flash):
+ *   char usbDescriptorDevice[];
+ *   char usbDescriptorConfiguration[];
+ *   char usbDescriptorHidReport[];
+ *   char usbDescriptorString0[];
+ *   int usbDescriptorStringVendor[];
+ *   int usbDescriptorStringDevice[];
+ *   int usbDescriptorStringSerialNumber[];
+ * Other descriptors can't be provided statically, they must be provided
+ * dynamically at runtime.
+ *
+ * Descriptor properties are or-ed or added together, e.g.:
+ * #define USB_CFG_DESCR_PROPS_DEVICE   (USB_PROP_IS_RAM | USB_PROP_LENGTH(18))
+ *
+ * The following descriptors are defined:
+ *   USB_CFG_DESCR_PROPS_DEVICE
+ *   USB_CFG_DESCR_PROPS_CONFIGURATION
+ *   USB_CFG_DESCR_PROPS_STRINGS
+ *   USB_CFG_DESCR_PROPS_STRING_0
+ *   USB_CFG_DESCR_PROPS_STRING_VENDOR
+ *   USB_CFG_DESCR_PROPS_STRING_PRODUCT
+ *   USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER
+ *   USB_CFG_DESCR_PROPS_HID
+ *   USB_CFG_DESCR_PROPS_HID_REPORT
+ *   USB_CFG_DESCR_PROPS_UNKNOWN (for all descriptors not handled by the driver)
+ *
+ * Note about string descriptors: String descriptors are not just strings, they
+ * are Unicode strings prefixed with a 2 byte header. Example:
+ * int  serialNumberDescriptor[] = {
+ *     USB_STRING_DESCRIPTOR_HEADER(6),
+ *     'S', 'e', 'r', 'i', 'a', 'l'
+ * };
+ */
+
+#define USB_CFG_DESCR_PROPS_DEVICE                  0
+#define USB_CFG_DESCR_PROPS_CONFIGURATION           0
+#define USB_CFG_DESCR_PROPS_STRINGS                 0
+#define USB_CFG_DESCR_PROPS_STRING_0                0
+#define USB_CFG_DESCR_PROPS_STRING_VENDOR           0
+#define USB_CFG_DESCR_PROPS_STRING_PRODUCT          0
+#define USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER    0
+#define USB_CFG_DESCR_PROPS_HID                     0
+#define USB_CFG_DESCR_PROPS_HID_REPORT              0
+#define USB_CFG_DESCR_PROPS_UNKNOWN                 0
+
+/* ----------------------- Optional MCU Description ------------------------ */
+
+/* The following configurations have working defaults in usbdrv.h. You
+ * usually don't need to set them explicitly. Only if you want to run
+ * the driver on a device which is not yet supported or with a compiler
+ * which is not fully supported (such as IAR C) or if you use a differnt
+ * interrupt than INT0, you may have to define some of these.
+ */
+/* #define USB_INTR_CFG            MCUCR */
+/* #define USB_INTR_CFG_SET        ((1 << ISC00) | (1 << ISC01)) */
+/* #define USB_INTR_CFG_CLR        0 */
+/* #define USB_INTR_ENABLE         GIMSK */
+/* #define USB_INTR_ENABLE_BIT     INT0 */
+/* #define USB_INTR_PENDING        GIFR */
+/* #define USB_INTR_PENDING_BIT    INTF0 */
+/* #define USB_INTR_VECTOR         INT0_vect */
+
+#endif /* __usbconfig_h_included__ */
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrv.c b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrv.c
new file mode 100644
index 00000000..21ed554f
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrv.c
@@ -0,0 +1,625 @@
+/* Name: usbdrv.c
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2004-12-29
+ * Tabsize: 4
+ * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * This Revision: $Id: usbdrv.c 791 2010-07-15 15:56:13Z cs $
+ */
+
+#include "usbportability.h"
+#include "usbdrv.h"
+#include "oddebug.h"
+
+/*
+General Description:
+This module implements the C-part of the USB driver. See usbdrv.h for a
+documentation of the entire driver.
+*/
+
+/* ------------------------------------------------------------------------- */
+
+/* raw USB registers / interface to assembler code: */
+uchar usbRxBuf[2*USB_BUFSIZE];  /* raw RX buffer: PID, 8 bytes data, 2 bytes CRC */
+uchar       usbInputBufOffset;  /* offset in usbRxBuf used for low level receiving */
+uchar       usbDeviceAddr;      /* assigned during enumeration, defaults to 0 */
+uchar       usbNewDeviceAddr;   /* device ID which should be set after status phase */
+uchar       usbConfiguration;   /* currently selected configuration. Administered by driver, but not used */
+volatile schar usbRxLen;        /* = 0; number of bytes in usbRxBuf; 0 means free, -1 for flow control */
+uchar       usbCurrentTok;      /* last token received or endpoint number for last OUT token if != 0 */
+uchar       usbRxToken;         /* token for data we received; or endpont number for last OUT */
+volatile uchar usbTxLen = USBPID_NAK;   /* number of bytes to transmit with next IN token or handshake token */
+uchar       usbTxBuf[USB_BUFSIZE];/* data to transmit with next IN, free if usbTxLen contains handshake token */
+#if USB_COUNT_SOF
+volatile uchar  usbSofCount;    /* incremented by assembler module every SOF */
+#endif
+#if USB_CFG_HAVE_INTRIN_ENDPOINT && !USB_CFG_SUPPRESS_INTR_CODE
+usbTxStatus_t  usbTxStatus1;
+#   if USB_CFG_HAVE_INTRIN_ENDPOINT3
+usbTxStatus_t  usbTxStatus3;
+#   endif
+#endif
+#if USB_CFG_CHECK_DATA_TOGGLING
+uchar       usbCurrentDataToken;/* when we check data toggling to ignore duplicate packets */
+#endif
+
+/* USB status registers / not shared with asm code */
+uchar               *usbMsgPtr;     /* data to transmit next -- ROM or RAM address */
+static usbMsgLen_t  usbMsgLen = USB_NO_MSG; /* remaining number of bytes */
+static uchar        usbMsgFlags;    /* flag values see below */
+
+#define USB_FLG_MSGPTR_IS_ROM   (1<<6)
+#define USB_FLG_USE_USER_RW     (1<<7)
+
+/*
+optimizing hints:
+- do not post/pre inc/dec integer values in operations
+- assign value of USB_READ_FLASH() to register variables and don't use side effects in arg
+- use narrow scope for variables which should be in X/Y/Z register
+- assign char sized expressions to variables to force 8 bit arithmetics
+*/
+
+/* -------------------------- String Descriptors --------------------------- */
+
+#if USB_CFG_DESCR_PROPS_STRINGS == 0
+
+#if USB_CFG_DESCR_PROPS_STRING_0 == 0
+#undef USB_CFG_DESCR_PROPS_STRING_0
+#define USB_CFG_DESCR_PROPS_STRING_0    sizeof(usbDescriptorString0)
+PROGMEM char usbDescriptorString0[] = { /* language descriptor */
+    4,          /* sizeof(usbDescriptorString0): length of descriptor in bytes */
+    3,          /* descriptor type */
+    0x09, 0x04, /* language index (0x0409 = US-English) */
+};
+#endif
+
+#if USB_CFG_DESCR_PROPS_STRING_VENDOR == 0 && USB_CFG_VENDOR_NAME_LEN
+#undef USB_CFG_DESCR_PROPS_STRING_VENDOR
+#define USB_CFG_DESCR_PROPS_STRING_VENDOR   sizeof(usbDescriptorStringVendor)
+PROGMEM int  usbDescriptorStringVendor[] = {
+    USB_STRING_DESCRIPTOR_HEADER(USB_CFG_VENDOR_NAME_LEN),
+    USB_CFG_VENDOR_NAME
+};
+#endif
+
+#if USB_CFG_DESCR_PROPS_STRING_PRODUCT == 0 && USB_CFG_DEVICE_NAME_LEN
+#undef USB_CFG_DESCR_PROPS_STRING_PRODUCT
+#define USB_CFG_DESCR_PROPS_STRING_PRODUCT   sizeof(usbDescriptorStringDevice)
+PROGMEM int  usbDescriptorStringDevice[] = {
+    USB_STRING_DESCRIPTOR_HEADER(USB_CFG_DEVICE_NAME_LEN),
+    USB_CFG_DEVICE_NAME
+};
+#endif
+
+#if USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER == 0 && USB_CFG_SERIAL_NUMBER_LEN
+#undef USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER
+#define USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER    sizeof(usbDescriptorStringSerialNumber)
+PROGMEM int usbDescriptorStringSerialNumber[] = {
+    USB_STRING_DESCRIPTOR_HEADER(USB_CFG_SERIAL_NUMBER_LEN),
+    USB_CFG_SERIAL_NUMBER
+};
+#endif
+
+#endif  /* USB_CFG_DESCR_PROPS_STRINGS == 0 */
+
+/* --------------------------- Device Descriptor --------------------------- */
+
+#if USB_CFG_DESCR_PROPS_DEVICE == 0
+#undef USB_CFG_DESCR_PROPS_DEVICE
+#define USB_CFG_DESCR_PROPS_DEVICE  sizeof(usbDescriptorDevice)
+PROGMEM char usbDescriptorDevice[] = {    /* USB device descriptor */
+    18,         /* sizeof(usbDescriptorDevice): length of descriptor in bytes */
+    USBDESCR_DEVICE,        /* descriptor type */
+    0x10, 0x01,             /* USB version supported */
+    USB_CFG_DEVICE_CLASS,
+    USB_CFG_DEVICE_SUBCLASS,
+    0,                      /* protocol */
+    8,                      /* max packet size */
+    /* the following two casts affect the first byte of the constant only, but
+     * that's sufficient to avoid a warning with the default values.
+     */
+    (char)USB_CFG_VENDOR_ID,/* 2 bytes */
+    (char)USB_CFG_DEVICE_ID,/* 2 bytes */
+    USB_CFG_DEVICE_VERSION, /* 2 bytes */
+    USB_CFG_DESCR_PROPS_STRING_VENDOR != 0 ? 1 : 0,         /* manufacturer string index */
+    USB_CFG_DESCR_PROPS_STRING_PRODUCT != 0 ? 2 : 0,        /* product string index */
+    USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER != 0 ? 3 : 0,  /* serial number string index */
+    1,          /* number of configurations */
+};
+#endif
+
+/* ----------------------- Configuration Descriptor ------------------------ */
+
+#if USB_CFG_DESCR_PROPS_HID_REPORT != 0 && USB_CFG_DESCR_PROPS_HID == 0
+#undef USB_CFG_DESCR_PROPS_HID
+#define USB_CFG_DESCR_PROPS_HID     9   /* length of HID descriptor in config descriptor below */
+#endif
+
+#if USB_CFG_DESCR_PROPS_CONFIGURATION == 0
+#undef USB_CFG_DESCR_PROPS_CONFIGURATION
+#define USB_CFG_DESCR_PROPS_CONFIGURATION   sizeof(usbDescriptorConfiguration)
+PROGMEM char usbDescriptorConfiguration[] = {    /* USB configuration descriptor */
+    9,          /* sizeof(usbDescriptorConfiguration): length of descriptor in bytes */
+    USBDESCR_CONFIG,    /* descriptor type */
+    18 + 7 * USB_CFG_HAVE_INTRIN_ENDPOINT + 7 * USB_CFG_HAVE_INTRIN_ENDPOINT3 +
+                (USB_CFG_DESCR_PROPS_HID & 0xff), 0,
+                /* total length of data returned (including inlined descriptors) */
+    1,          /* number of interfaces in this configuration */
+    1,          /* index of this configuration */
+    0,          /* configuration name string index */
+#if USB_CFG_IS_SELF_POWERED
+    (1 << 7) | USBATTR_SELFPOWER,       /* attributes */
+#else
+    (1 << 7),                           /* attributes */
+#endif
+    USB_CFG_MAX_BUS_POWER/2,            /* max USB current in 2mA units */
+/* interface descriptor follows inline: */
+    9,          /* sizeof(usbDescrInterface): length of descriptor in bytes */
+    USBDESCR_INTERFACE, /* descriptor type */
+    0,          /* index of this interface */
+    0,          /* alternate setting for this interface */
+    USB_CFG_HAVE_INTRIN_ENDPOINT + USB_CFG_HAVE_INTRIN_ENDPOINT3, /* endpoints excl 0: number of endpoint descriptors to follow */
+    USB_CFG_INTERFACE_CLASS,
+    USB_CFG_INTERFACE_SUBCLASS,
+    USB_CFG_INTERFACE_PROTOCOL,
+    0,          /* string index for interface */
+#if (USB_CFG_DESCR_PROPS_HID & 0xff)    /* HID descriptor */
+    9,          /* sizeof(usbDescrHID): length of descriptor in bytes */
+    USBDESCR_HID,   /* descriptor type: HID */
+    0x01, 0x01, /* BCD representation of HID version */
+    0x00,       /* target country code */
+    0x01,       /* number of HID Report (or other HID class) Descriptor infos to follow */
+    0x22,       /* descriptor type: report */
+    USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH, 0,  /* total length of report descriptor */
+#endif
+#if USB_CFG_HAVE_INTRIN_ENDPOINT    /* endpoint descriptor for endpoint 1 */
+    7,          /* sizeof(usbDescrEndpoint) */
+    USBDESCR_ENDPOINT,  /* descriptor type = endpoint */
+    (char)0x81, /* IN endpoint number 1 */
+    0x03,       /* attrib: Interrupt endpoint */
+    8, 0,       /* maximum packet size */
+    USB_CFG_INTR_POLL_INTERVAL, /* in ms */
+#endif
+#if USB_CFG_HAVE_INTRIN_ENDPOINT3   /* endpoint descriptor for endpoint 3 */
+    7,          /* sizeof(usbDescrEndpoint) */
+    USBDESCR_ENDPOINT,  /* descriptor type = endpoint */
+    (char)(0x80 | USB_CFG_EP3_NUMBER), /* IN endpoint number 3 */
+    0x03,       /* attrib: Interrupt endpoint */
+    8, 0,       /* maximum packet size */
+    USB_CFG_INTR_POLL_INTERVAL, /* in ms */
+#endif
+};
+#endif
+
+/* ------------------------------------------------------------------------- */
+
+static inline void  usbResetDataToggling(void)
+{
+#if USB_CFG_HAVE_INTRIN_ENDPOINT && !USB_CFG_SUPPRESS_INTR_CODE
+    USB_SET_DATATOKEN1(USB_INITIAL_DATATOKEN);  /* reset data toggling for interrupt endpoint */
+#   if USB_CFG_HAVE_INTRIN_ENDPOINT3
+    USB_SET_DATATOKEN3(USB_INITIAL_DATATOKEN);  /* reset data toggling for interrupt endpoint */
+#   endif
+#endif
+}
+
+static inline void  usbResetStall(void)
+{
+#if USB_CFG_IMPLEMENT_HALT && USB_CFG_HAVE_INTRIN_ENDPOINT
+        usbTxLen1 = USBPID_NAK;
+#if USB_CFG_HAVE_INTRIN_ENDPOINT3
+        usbTxLen3 = USBPID_NAK;
+#endif
+#endif
+}
+
+/* ------------------------------------------------------------------------- */
+
+#if !USB_CFG_SUPPRESS_INTR_CODE
+#if USB_CFG_HAVE_INTRIN_ENDPOINT
+static void usbGenericSetInterrupt(uchar *data, uchar len, usbTxStatus_t *txStatus)
+{
+uchar   *p;
+char    i;
+
+#if USB_CFG_IMPLEMENT_HALT
+    if(usbTxLen1 == USBPID_STALL)
+        return;
+#endif
+    if(txStatus->len & 0x10){   /* packet buffer was empty */
+        txStatus->buffer[0] ^= USBPID_DATA0 ^ USBPID_DATA1; /* toggle token */
+    }else{
+        txStatus->len = USBPID_NAK; /* avoid sending outdated (overwritten) interrupt data */
+    }
+    p = txStatus->buffer + 1;
+    i = len;
+    do{                         /* if len == 0, we still copy 1 byte, but that's no problem */
+        *p++ = *data++;
+    }while(--i > 0);            /* loop control at the end is 2 bytes shorter than at beginning */
+    usbCrc16Append(&txStatus->buffer[1], len);
+    txStatus->len = len + 4;    /* len must be given including sync byte */
+    DBG2(0x21 + (((int)txStatus >> 3) & 3), txStatus->buffer, len + 3);
+}
+
+USB_PUBLIC void usbSetInterrupt(uchar *data, uchar len)
+{
+    usbGenericSetInterrupt(data, len, &usbTxStatus1);
+}
+#endif
+
+#if USB_CFG_HAVE_INTRIN_ENDPOINT3
+USB_PUBLIC void usbSetInterrupt3(uchar *data, uchar len)
+{
+    usbGenericSetInterrupt(data, len, &usbTxStatus3);
+}
+#endif
+#endif /* USB_CFG_SUPPRESS_INTR_CODE */
+
+/* ------------------ utilities for code following below ------------------- */
+
+/* Use defines for the switch statement so that we can choose between an
+ * if()else if() and a switch/case based implementation. switch() is more
+ * efficient for a LARGE set of sequential choices, if() is better in all other
+ * cases.
+ */
+#if USB_CFG_USE_SWITCH_STATEMENT
+#   define SWITCH_START(cmd)       switch(cmd){{
+#   define SWITCH_CASE(value)      }break; case (value):{
+#   define SWITCH_CASE2(v1,v2)     }break; case (v1): case(v2):{
+#   define SWITCH_CASE3(v1,v2,v3)  }break; case (v1): case(v2): case(v3):{
+#   define SWITCH_DEFAULT          }break; default:{
+#   define SWITCH_END              }}
+#else
+#   define SWITCH_START(cmd)       {uchar _cmd = cmd; if(0){
+#   define SWITCH_CASE(value)      }else if(_cmd == (value)){
+#   define SWITCH_CASE2(v1,v2)     }else if(_cmd == (v1) || _cmd == (v2)){
+#   define SWITCH_CASE3(v1,v2,v3)  }else if(_cmd == (v1) || _cmd == (v2) || (_cmd == v3)){
+#   define SWITCH_DEFAULT          }else{
+#   define SWITCH_END              }}
+#endif
+
+#ifndef USB_RX_USER_HOOK
+#define USB_RX_USER_HOOK(data, len)
+#endif
+#ifndef USB_SET_ADDRESS_HOOK
+#define USB_SET_ADDRESS_HOOK()
+#endif
+
+/* ------------------------------------------------------------------------- */
+
+/* We use if() instead of #if in the macro below because #if can't be used
+ * in macros and the compiler optimizes constant conditions anyway.
+ * This may cause problems with undefined symbols if compiled without
+ * optimizing!
+ */
+#define GET_DESCRIPTOR(cfgProp, staticName)         \
+    if(cfgProp){                                    \
+        if((cfgProp) & USB_PROP_IS_RAM)             \
+            flags = 0;                              \
+        if((cfgProp) & USB_PROP_IS_DYNAMIC){        \
+            len = usbFunctionDescriptor(rq);        \
+        }else{                                      \
+            len = USB_PROP_LENGTH(cfgProp);         \
+            usbMsgPtr = (uchar *)(staticName);      \
+        }                                           \
+    }
+
+/* usbDriverDescriptor() is similar to usbFunctionDescriptor(), but used
+ * internally for all types of descriptors.
+ */
+static inline usbMsgLen_t usbDriverDescriptor(usbRequest_t *rq)
+{
+usbMsgLen_t len = 0;
+uchar       flags = USB_FLG_MSGPTR_IS_ROM;
+
+    SWITCH_START(rq->wValue.bytes[1])
+    SWITCH_CASE(USBDESCR_DEVICE)    /* 1 */
+        GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_DEVICE, usbDescriptorDevice)
+    SWITCH_CASE(USBDESCR_CONFIG)    /* 2 */
+        GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_CONFIGURATION, usbDescriptorConfiguration)
+    SWITCH_CASE(USBDESCR_STRING)    /* 3 */
+#if USB_CFG_DESCR_PROPS_STRINGS & USB_PROP_IS_DYNAMIC
+        if(USB_CFG_DESCR_PROPS_STRINGS & USB_PROP_IS_RAM)
+            flags = 0;
+        len = usbFunctionDescriptor(rq);
+#else   /* USB_CFG_DESCR_PROPS_STRINGS & USB_PROP_IS_DYNAMIC */
+        SWITCH_START(rq->wValue.bytes[0])
+        SWITCH_CASE(0)
+            GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_STRING_0, usbDescriptorString0)
+        SWITCH_CASE(1)
+            GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_STRING_VENDOR, usbDescriptorStringVendor)
+        SWITCH_CASE(2)
+            GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_STRING_PRODUCT, usbDescriptorStringDevice)
+        SWITCH_CASE(3)
+            GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER, usbDescriptorStringSerialNumber)
+        SWITCH_DEFAULT
+            if(USB_CFG_DESCR_PROPS_UNKNOWN & USB_PROP_IS_DYNAMIC){
+                len = usbFunctionDescriptor(rq);
+            }
+        SWITCH_END
+#endif  /* USB_CFG_DESCR_PROPS_STRINGS & USB_PROP_IS_DYNAMIC */
+#if USB_CFG_DESCR_PROPS_HID_REPORT  /* only support HID descriptors if enabled */
+    SWITCH_CASE(USBDESCR_HID)       /* 0x21 */
+        GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_HID, usbDescriptorConfiguration + 18)
+    SWITCH_CASE(USBDESCR_HID_REPORT)/* 0x22 */
+        GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_HID_REPORT, usbDescriptorHidReport)
+#endif
+    SWITCH_DEFAULT
+        if(USB_CFG_DESCR_PROPS_UNKNOWN & USB_PROP_IS_DYNAMIC){
+            len = usbFunctionDescriptor(rq);
+        }
+    SWITCH_END
+    usbMsgFlags = flags;
+    return len;
+}
+
+/* ------------------------------------------------------------------------- */
+
+/* usbDriverSetup() is similar to usbFunctionSetup(), but it's used for
+ * standard requests instead of class and custom requests.
+ */
+static inline usbMsgLen_t usbDriverSetup(usbRequest_t *rq)
+{
+uchar   len  = 0, *dataPtr = usbTxBuf + 9;  /* there are 2 bytes free space at the end of the buffer */
+uchar   value = rq->wValue.bytes[0];
+#if USB_CFG_IMPLEMENT_HALT
+uchar   index = rq->wIndex.bytes[0];
+#endif
+
+    dataPtr[0] = 0; /* default reply common to USBRQ_GET_STATUS and USBRQ_GET_INTERFACE */
+    SWITCH_START(rq->bRequest)
+    SWITCH_CASE(USBRQ_GET_STATUS)           /* 0 */
+        uchar recipient = rq->bmRequestType & USBRQ_RCPT_MASK;  /* assign arith ops to variables to enforce byte size */
+        if(USB_CFG_IS_SELF_POWERED && recipient == USBRQ_RCPT_DEVICE)
+            dataPtr[0] =  USB_CFG_IS_SELF_POWERED;
+#if USB_CFG_IMPLEMENT_HALT
+        if(recipient == USBRQ_RCPT_ENDPOINT && index == 0x81)   /* request status for endpoint 1 */
+            dataPtr[0] = usbTxLen1 == USBPID_STALL;
+#endif
+        dataPtr[1] = 0;
+        len = 2;
+#if USB_CFG_IMPLEMENT_HALT
+    SWITCH_CASE2(USBRQ_CLEAR_FEATURE, USBRQ_SET_FEATURE)    /* 1, 3 */
+        if(value == 0 && index == 0x81){    /* feature 0 == HALT for endpoint == 1 */
+            usbTxLen1 = rq->bRequest == USBRQ_CLEAR_FEATURE ? USBPID_NAK : USBPID_STALL;
+            usbResetDataToggling();
+        }
+#endif
+    SWITCH_CASE(USBRQ_SET_ADDRESS)          /* 5 */
+        usbNewDeviceAddr = value;
+        USB_SET_ADDRESS_HOOK();
+    SWITCH_CASE(USBRQ_GET_DESCRIPTOR)       /* 6 */
+        len = usbDriverDescriptor(rq);
+        goto skipMsgPtrAssignment;
+    SWITCH_CASE(USBRQ_GET_CONFIGURATION)    /* 8 */
+        dataPtr = &usbConfiguration;  /* send current configuration value */
+        len = 1;
+    SWITCH_CASE(USBRQ_SET_CONFIGURATION)    /* 9 */
+        usbConfiguration = value;
+        usbResetStall();
+    SWITCH_CASE(USBRQ_GET_INTERFACE)        /* 10 */
+        len = 1;
+#if USB_CFG_HAVE_INTRIN_ENDPOINT && !USB_CFG_SUPPRESS_INTR_CODE
+    SWITCH_CASE(USBRQ_SET_INTERFACE)        /* 11 */
+        usbResetDataToggling();
+        usbResetStall();
+#endif
+    SWITCH_DEFAULT                          /* 7=SET_DESCRIPTOR, 12=SYNC_FRAME */
+        /* Should we add an optional hook here? */
+    SWITCH_END
+    usbMsgPtr = dataPtr;
+skipMsgPtrAssignment:
+    return len;
+}
+
+/* ------------------------------------------------------------------------- */
+
+/* usbProcessRx() is called for every message received by the interrupt
+ * routine. It distinguishes between SETUP and DATA packets and processes
+ * them accordingly.
+ */
+static inline void usbProcessRx(uchar *data, uchar len)
+{
+usbRequest_t    *rq = (void *)data;
+
+/* usbRxToken can be:
+ * 0x2d 00101101 (USBPID_SETUP for setup data)
+ * 0xe1 11100001 (USBPID_OUT: data phase of setup transfer)
+ * 0...0x0f for OUT on endpoint X
+ */
+    DBG2(0x10 + (usbRxToken & 0xf), data, len + 2); /* SETUP=1d, SETUP-DATA=11, OUTx=1x */
+    USB_RX_USER_HOOK(data, len)
+#if USB_CFG_IMPLEMENT_FN_WRITEOUT
+    if(usbRxToken < 0x10){  /* OUT to endpoint != 0: endpoint number in usbRxToken */
+        usbFunctionWriteOut(data, len);
+        return;
+    }
+#endif
+    if(usbRxToken == (uchar)USBPID_SETUP){
+        if(len != 8)    /* Setup size must be always 8 bytes. Ignore otherwise. */
+            return;
+        usbMsgLen_t replyLen;
+        usbTxBuf[0] = USBPID_DATA0;         /* initialize data toggling */
+        usbTxLen = USBPID_NAK;              /* abort pending transmit */
+        usbMsgFlags = 0;
+        uchar type = rq->bmRequestType & USBRQ_TYPE_MASK;
+        if(type != USBRQ_TYPE_STANDARD){    /* standard requests are handled by driver */
+            replyLen = usbFunctionSetup(data);
+        }else{
+            replyLen = usbDriverSetup(rq);
+        }
+#if USB_CFG_IMPLEMENT_FN_READ || USB_CFG_IMPLEMENT_FN_WRITE
+        if(replyLen == USB_NO_MSG){         /* use user-supplied read/write function */
+            /* do some conditioning on replyLen, but on IN transfers only */
+            if((rq->bmRequestType & USBRQ_DIR_MASK) != USBRQ_DIR_HOST_TO_DEVICE){
+                if(sizeof(replyLen) < sizeof(rq->wLength.word)){ /* help compiler with optimizing */
+                    replyLen = rq->wLength.bytes[0];
+                }else{
+                    replyLen = rq->wLength.word;
+                }
+            }
+            usbMsgFlags = USB_FLG_USE_USER_RW;
+        }else   /* The 'else' prevents that we limit a replyLen of USB_NO_MSG to the maximum transfer len. */
+#endif
+        if(sizeof(replyLen) < sizeof(rq->wLength.word)){ /* help compiler with optimizing */
+            if(!rq->wLength.bytes[1] && replyLen > rq->wLength.bytes[0])    /* limit length to max */
+                replyLen = rq->wLength.bytes[0];
+        }else{
+            if(replyLen > rq->wLength.word)     /* limit length to max */
+                replyLen = rq->wLength.word;
+        }
+        usbMsgLen = replyLen;
+    }else{  /* usbRxToken must be USBPID_OUT, which means data phase of setup (control-out) */
+#if USB_CFG_IMPLEMENT_FN_WRITE
+        if(usbMsgFlags & USB_FLG_USE_USER_RW){
+            uchar rval = usbFunctionWrite(data, len);
+            if(rval == 0xff){   /* an error occurred */
+                usbTxLen = USBPID_STALL;
+            }else if(rval != 0){    /* This was the final package */
+                usbMsgLen = 0;  /* answer with a zero-sized data packet */
+            }
+        }
+#endif
+    }
+}
+
+/* ------------------------------------------------------------------------- */
+
+/* This function is similar to usbFunctionRead(), but it's also called for
+ * data handled automatically by the driver (e.g. descriptor reads).
+ */
+static uchar usbDeviceRead(uchar *data, uchar len)
+{
+    if(len > 0){    /* don't bother app with 0 sized reads */
+#if USB_CFG_IMPLEMENT_FN_READ
+        if(usbMsgFlags & USB_FLG_USE_USER_RW){
+            len = usbFunctionRead(data, len);
+        }else
+#endif
+        {
+            uchar i = len, *r = usbMsgPtr;
+            if(usbMsgFlags & USB_FLG_MSGPTR_IS_ROM){    /* ROM data */
+                do{
+                    uchar c = USB_READ_FLASH(r);    /* assign to char size variable to enforce byte ops */
+                    *data++ = c;
+                    r++;
+                }while(--i);
+            }else{  /* RAM data */
+                do{
+                    *data++ = *r++;
+                }while(--i);
+            }
+            usbMsgPtr = r;
+        }
+    }
+    return len;
+}
+
+/* ------------------------------------------------------------------------- */
+
+/* usbBuildTxBlock() is called when we have data to transmit and the
+ * interrupt routine's transmit buffer is empty.
+ */
+static inline void usbBuildTxBlock(void)
+{
+usbMsgLen_t wantLen;
+uchar       len;
+
+    wantLen = usbMsgLen;
+    if(wantLen > 8)
+        wantLen = 8;
+    usbMsgLen -= wantLen;
+    usbTxBuf[0] ^= USBPID_DATA0 ^ USBPID_DATA1; /* DATA toggling */
+    len = usbDeviceRead(usbTxBuf + 1, wantLen);
+    if(len <= 8){           /* valid data packet */
+        usbCrc16Append(&usbTxBuf[1], len);
+        len += 4;           /* length including sync byte */
+        if(len < 12)        /* a partial package identifies end of message */
+            usbMsgLen = USB_NO_MSG;
+    }else{
+        len = USBPID_STALL;   /* stall the endpoint */
+        usbMsgLen = USB_NO_MSG;
+    }
+    usbTxLen = len;
+    DBG2(0x20, usbTxBuf, len-1);
+}
+
+/* ------------------------------------------------------------------------- */
+
+static inline void usbHandleResetHook(uchar notResetState)
+{
+#ifdef USB_RESET_HOOK
+static uchar    wasReset;
+uchar           isReset = !notResetState;
+
+    if(wasReset != isReset){
+        USB_RESET_HOOK(isReset);
+        wasReset = isReset;
+    }
+#endif
+}
+
+/* ------------------------------------------------------------------------- */
+
+USB_PUBLIC void usbPoll(void)
+{
+schar   len;
+uchar   i;
+
+    len = usbRxLen - 3;
+    if(len >= 0){
+/* We could check CRC16 here -- but ACK has already been sent anyway. If you
+ * need data integrity checks with this driver, check the CRC in your app
+ * code and report errors back to the host. Since the ACK was already sent,
+ * retries must be handled on application level.
+ * unsigned crc = usbCrc16(buffer + 1, usbRxLen - 3);
+ */
+        usbProcessRx(usbRxBuf + USB_BUFSIZE + 1 - usbInputBufOffset, len);
+#if USB_CFG_HAVE_FLOWCONTROL
+        if(usbRxLen > 0)    /* only mark as available if not inactivated */
+            usbRxLen = 0;
+#else
+        usbRxLen = 0;       /* mark rx buffer as available */
+#endif
+    }
+    if(usbTxLen & 0x10){    /* transmit system idle */
+        if(usbMsgLen != USB_NO_MSG){    /* transmit data pending? */
+            usbBuildTxBlock();
+        }
+    }
+    for(i = 20; i > 0; i--){
+        uchar usbLineStatus = USBIN & USBMASK;
+        if(usbLineStatus != 0)  /* SE0 has ended */
+            goto isNotReset;
+    }
+    /* RESET condition, called multiple times during reset */
+    usbNewDeviceAddr = 0;
+    usbDeviceAddr = 0;
+    usbResetStall();
+    DBG1(0xff, 0, 0);
+isNotReset:
+    usbHandleResetHook(i);
+}
+
+/* ------------------------------------------------------------------------- */
+
+USB_PUBLIC void usbInit(void)
+{
+#if USB_INTR_CFG_SET != 0
+    USB_INTR_CFG |= USB_INTR_CFG_SET;
+#endif
+#if USB_INTR_CFG_CLR != 0
+    USB_INTR_CFG &= ~(USB_INTR_CFG_CLR);
+#endif
+    USB_INTR_ENABLE |= (1 << USB_INTR_ENABLE_BIT);
+    usbResetDataToggling();
+#if USB_CFG_HAVE_INTRIN_ENDPOINT && !USB_CFG_SUPPRESS_INTR_CODE
+    usbTxLen1 = USBPID_NAK;
+#if USB_CFG_HAVE_INTRIN_ENDPOINT3
+    usbTxLen3 = USBPID_NAK;
+#endif
+#endif
+}
+
+/* ------------------------------------------------------------------------- */
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrv.h b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrv.h
new file mode 100644
index 00000000..3a78f307
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrv.h
@@ -0,0 +1,735 @@
+/* Name: usbdrv.h
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2004-12-29
+ * Tabsize: 4
+ * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * This Revision: $Id: usbdrv.h 793 2010-07-15 15:58:11Z cs $
+ */
+
+#ifndef __usbdrv_h_included__
+#define __usbdrv_h_included__
+#include "usbconfig.h"
+#include "usbportability.h"
+
+/*
+Hardware Prerequisites:
+=======================
+USB lines D+ and D- MUST be wired to the same I/O port. We recommend that D+
+triggers the interrupt (best achieved by using INT0 for D+), but it is also
+possible to trigger the interrupt from D-. If D- is used, interrupts are also
+triggered by SOF packets. D- requires a pull-up of 1.5k to +3.5V (and the
+device must be powered at 3.5V) to identify as low-speed USB device. A
+pull-down or pull-up of 1M SHOULD be connected from D+ to +3.5V to prevent
+interference when no USB master is connected. If you use Zener diodes to limit
+the voltage on D+ and D-, you MUST use a pull-down resistor, not a pull-up.
+We use D+ as interrupt source and not D- because it does not trigger on
+keep-alive and RESET states. If you want to count keep-alive events with
+USB_COUNT_SOF, you MUST use D- as an interrupt source.
+
+As a compile time option, the 1.5k pull-up resistor on D- can be made
+switchable to allow the device to disconnect at will. See the definition of
+usbDeviceConnect() and usbDeviceDisconnect() further down in this file.
+
+Please adapt the values in usbconfig.h according to your hardware!
+
+The device MUST be clocked at exactly 12 MHz, 15 MHz, 16 MHz or 20 MHz
+or at 12.8 MHz resp. 16.5 MHz +/- 1%. See usbconfig-prototype.h for details.
+
+
+Limitations:
+============
+Robustness with respect to communication errors:
+The driver assumes error-free communication. It DOES check for errors in
+the PID, but does NOT check bit stuffing errors, SE0 in middle of a byte,
+token CRC (5 bit) and data CRC (16 bit). CRC checks can not be performed due
+to timing constraints: We must start sending a reply within 7 bit times.
+Bit stuffing and misplaced SE0 would have to be checked in real-time, but CPU
+performance does not permit that. The driver does not check Data0/Data1
+toggling, but application software can implement the check.
+
+Input characteristics:
+Since no differential receiver circuit is used, electrical interference
+robustness may suffer. The driver samples only one of the data lines with
+an ordinary I/O pin's input characteristics. However, since this is only a
+low speed USB implementation and the specification allows for 8 times the
+bit rate over the same hardware, we should be on the safe side. Even the spec
+requires detection of asymmetric states at high bit rate for SE0 detection.
+
+Number of endpoints:
+The driver supports the following endpoints:
+
+- Endpoint 0, the default control endpoint.
+- Any number of interrupt- or bulk-out endpoints. The data is sent to
+  usbFunctionWriteOut() and USB_CFG_IMPLEMENT_FN_WRITEOUT must be defined
+  to 1 to activate this feature. The endpoint number can be found in the
+  global variable 'usbRxToken'.
+- One default interrupt- or bulk-in endpoint. This endpoint is used for
+  interrupt- or bulk-in transfers which are not handled by any other endpoint.
+  You must define USB_CFG_HAVE_INTRIN_ENDPOINT in order to activate this
+  feature and call usbSetInterrupt() to send interrupt/bulk data.
+- One additional interrupt- or bulk-in endpoint. This was endpoint 3 in
+  previous versions of this driver but can now be configured to any endpoint
+  number. You must define USB_CFG_HAVE_INTRIN_ENDPOINT3 in order to activate
+  this feature and call usbSetInterrupt3() to send interrupt/bulk data. The
+  endpoint number can be set with USB_CFG_EP3_NUMBER.
+
+Please note that the USB standard forbids bulk endpoints for low speed devices!
+Most operating systems allow them anyway, but the AVR will spend 90% of the CPU
+time in the USB interrupt polling for bulk data.
+
+Maximum data payload:
+Data payload of control in and out transfers may be up to 254 bytes. In order
+to accept payload data of out transfers, you need to implement
+'usbFunctionWrite()'.
+
+USB Suspend Mode supply current:
+The USB standard limits power consumption to 500uA when the bus is in suspend
+mode. This is not a problem for self-powered devices since they don't need
+bus power anyway. Bus-powered devices can achieve this only by putting the
+CPU in sleep mode. The driver does not implement suspend handling by itself.
+However, the application may implement activity monitoring and wakeup from
+sleep. The host sends regular SE0 states on the bus to keep it active. These
+SE0 states can be detected by using D- as the interrupt source. Define
+USB_COUNT_SOF to 1 and use the global variable usbSofCount to check for bus
+activity.
+
+Operation without an USB master:
+The driver behaves neutral without connection to an USB master if D- reads
+as 1. To avoid spurious interrupts, we recommend a high impedance (e.g. 1M)
+pull-down or pull-up resistor on D+ (interrupt). If Zener diodes are used,
+use a pull-down. If D- becomes statically 0, the driver may block in the
+interrupt routine.
+
+Interrupt latency:
+The application must ensure that the USB interrupt is not disabled for more
+than 25 cycles (this is for 12 MHz, faster clocks allow longer latency).
+This implies that all interrupt routines must either have the "ISR_NOBLOCK"
+attribute set (see "avr/interrupt.h") or be written in assembler with "sei"
+as the first instruction.
+
+Maximum interrupt duration / CPU cycle consumption:
+The driver handles all USB communication during the interrupt service
+routine. The routine will not return before an entire USB message is received
+and the reply is sent. This may be up to ca. 1200 cycles @ 12 MHz (= 100us) if
+the host conforms to the standard. The driver will consume CPU cycles for all
+USB messages, even if they address another (low-speed) device on the same bus.
+
+*/
+
+/* ------------------------------------------------------------------------- */
+/* --------------------------- Module Interface ---------------------------- */
+/* ------------------------------------------------------------------------- */
+
+#define USBDRV_VERSION  20100715
+/* This define uniquely identifies a driver version. It is a decimal number
+ * constructed from the driver's release date in the form YYYYMMDD. If the
+ * driver's behavior or interface changes, you can use this constant to
+ * distinguish versions. If it is not defined, the driver's release date is
+ * older than 2006-01-25.
+ */
+
+
+#ifndef USB_PUBLIC
+#define USB_PUBLIC
+#endif
+/* USB_PUBLIC is used as declaration attribute for all functions exported by
+ * the USB driver. The default is no attribute (see above). You may define it
+ * to static either in usbconfig.h or from the command line if you include
+ * usbdrv.c instead of linking against it. Including the C module of the driver
+ * directly in your code saves a couple of bytes in flash memory.
+ */
+
+#ifndef __ASSEMBLER__
+#ifndef uchar
+#define uchar   unsigned char
+#endif
+#ifndef schar
+#define schar   signed char
+#endif
+/* shortcuts for well defined 8 bit integer types */
+
+#if USB_CFG_LONG_TRANSFERS  /* if more than 254 bytes transfer size required */
+#   define usbMsgLen_t unsigned
+#else
+#   define usbMsgLen_t uchar
+#endif
+/* usbMsgLen_t is the data type used for transfer lengths. By default, it is
+ * defined to uchar, allowing a maximum of 254 bytes (255 is reserved for
+ * USB_NO_MSG below). If the usbconfig.h defines USB_CFG_LONG_TRANSFERS to 1,
+ * a 16 bit data type is used, allowing up to 16384 bytes (the rest is used
+ * for flags in the descriptor configuration).
+ */
+#define USB_NO_MSG  ((usbMsgLen_t)-1)   /* constant meaning "no message" */
+
+struct usbRequest;  /* forward declaration */
+
+USB_PUBLIC void usbInit(void);
+/* This function must be called before interrupts are enabled and the main
+ * loop is entered. We exepct that the PORT and DDR bits for D+ and D- have
+ * not been changed from their default status (which is 0). If you have changed
+ * them, set both back to 0 (configure them as input with no internal pull-up).
+ */
+USB_PUBLIC void usbPoll(void);
+/* This function must be called at regular intervals from the main loop.
+ * Maximum delay between calls is somewhat less than 50ms (USB timeout for
+ * accepting a Setup message). Otherwise the device will not be recognized.
+ * Please note that debug outputs through the UART take ~ 0.5ms per byte
+ * at 19200 bps.
+ */
+extern uchar *usbMsgPtr;
+/* This variable may be used to pass transmit data to the driver from the
+ * implementation of usbFunctionWrite(). It is also used internally by the
+ * driver for standard control requests.
+ */
+USB_PUBLIC usbMsgLen_t usbFunctionSetup(uchar data[8]);
+/* This function is called when the driver receives a SETUP transaction from
+ * the host which is not answered by the driver itself (in practice: class and
+ * vendor requests). All control transfers start with a SETUP transaction where
+ * the host communicates the parameters of the following (optional) data
+ * transfer. The SETUP data is available in the 'data' parameter which can
+ * (and should) be casted to 'usbRequest_t *' for a more user-friendly access
+ * to parameters.
+ *
+ * If the SETUP indicates a control-in transfer, you should provide the
+ * requested data to the driver. There are two ways to transfer this data:
+ * (1) Set the global pointer 'usbMsgPtr' to the base of the static RAM data
+ * block and return the length of the data in 'usbFunctionSetup()'. The driver
+ * will handle the rest. Or (2) return USB_NO_MSG in 'usbFunctionSetup()'. The
+ * driver will then call 'usbFunctionRead()' when data is needed. See the
+ * documentation for usbFunctionRead() for details.
+ *
+ * If the SETUP indicates a control-out transfer, the only way to receive the
+ * data from the host is through the 'usbFunctionWrite()' call. If you
+ * implement this function, you must return USB_NO_MSG in 'usbFunctionSetup()'
+ * to indicate that 'usbFunctionWrite()' should be used. See the documentation
+ * of this function for more information. If you just want to ignore the data
+ * sent by the host, return 0 in 'usbFunctionSetup()'.
+ *
+ * Note that calls to the functions usbFunctionRead() and usbFunctionWrite()
+ * are only done if enabled by the configuration in usbconfig.h.
+ */
+USB_PUBLIC usbMsgLen_t usbFunctionDescriptor(struct usbRequest *rq);
+/* You need to implement this function ONLY if you provide USB descriptors at
+ * runtime (which is an expert feature). It is very similar to
+ * usbFunctionSetup() above, but it is called only to request USB descriptor
+ * data. See the documentation of usbFunctionSetup() above for more info.
+ */
+#if USB_CFG_HAVE_INTRIN_ENDPOINT
+USB_PUBLIC void usbSetInterrupt(uchar *data, uchar len);
+/* This function sets the message which will be sent during the next interrupt
+ * IN transfer. The message is copied to an internal buffer and must not exceed
+ * a length of 8 bytes. The message may be 0 bytes long just to indicate the
+ * interrupt status to the host.
+ * If you need to transfer more bytes, use a control read after the interrupt.
+ */
+#define usbInterruptIsReady()   (usbTxLen1 & 0x10)
+/* This macro indicates whether the last interrupt message has already been
+ * sent. If you set a new interrupt message before the old was sent, the
+ * message already buffered will be lost.
+ */
+#if USB_CFG_HAVE_INTRIN_ENDPOINT3
+USB_PUBLIC void usbSetInterrupt3(uchar *data, uchar len);
+#define usbInterruptIsReady3()   (usbTxLen3 & 0x10)
+/* Same as above for endpoint 3 */
+#endif
+#endif /* USB_CFG_HAVE_INTRIN_ENDPOINT */
+#if USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH    /* simplified interface for backward compatibility */
+#define usbHidReportDescriptor  usbDescriptorHidReport
+/* should be declared as: PROGMEM char usbHidReportDescriptor[]; */
+/* If you implement an HID device, you need to provide a report descriptor.
+ * The HID report descriptor syntax is a bit complex. If you understand how
+ * report descriptors are constructed, we recommend that you use the HID
+ * Descriptor Tool from usb.org, see http://www.usb.org/developers/hidpage/.
+ * Otherwise you should probably start with a working example.
+ */
+#endif  /* USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH */
+#if USB_CFG_IMPLEMENT_FN_WRITE
+USB_PUBLIC uchar usbFunctionWrite(uchar *data, uchar len);
+/* This function is called by the driver to provide a control transfer's
+ * payload data (control-out). It is called in chunks of up to 8 bytes. The
+ * total count provided in the current control transfer can be obtained from
+ * the 'length' property in the setup data. If an error occurred during
+ * processing, return 0xff (== -1). The driver will answer the entire transfer
+ * with a STALL token in this case. If you have received the entire payload
+ * successfully, return 1. If you expect more data, return 0. If you don't
+ * know whether the host will send more data (you should know, the total is
+ * provided in the usbFunctionSetup() call!), return 1.
+ * NOTE: If you return 0xff for STALL, 'usbFunctionWrite()' may still be called
+ * for the remaining data. You must continue to return 0xff for STALL in these
+ * calls.
+ * In order to get usbFunctionWrite() called, define USB_CFG_IMPLEMENT_FN_WRITE
+ * to 1 in usbconfig.h and return 0xff in usbFunctionSetup()..
+ */
+#endif /* USB_CFG_IMPLEMENT_FN_WRITE */
+#if USB_CFG_IMPLEMENT_FN_READ
+USB_PUBLIC uchar usbFunctionRead(uchar *data, uchar len);
+/* This function is called by the driver to ask the application for a control
+ * transfer's payload data (control-in). It is called in chunks of up to 8
+ * bytes each. You should copy the data to the location given by 'data' and
+ * return the actual number of bytes copied. If you return less than requested,
+ * the control-in transfer is terminated. If you return 0xff, the driver aborts
+ * the transfer with a STALL token.
+ * In order to get usbFunctionRead() called, define USB_CFG_IMPLEMENT_FN_READ
+ * to 1 in usbconfig.h and return 0xff in usbFunctionSetup()..
+ */
+#endif /* USB_CFG_IMPLEMENT_FN_READ */
+
+extern uchar usbRxToken;    /* may be used in usbFunctionWriteOut() below */
+#if USB_CFG_IMPLEMENT_FN_WRITEOUT
+USB_PUBLIC void usbFunctionWriteOut(uchar *data, uchar len);
+/* This function is called by the driver when data is received on an interrupt-
+ * or bulk-out endpoint. The endpoint number can be found in the global
+ * variable usbRxToken. You must define USB_CFG_IMPLEMENT_FN_WRITEOUT to 1 in
+ * usbconfig.h to get this function called.
+ */
+#endif /* USB_CFG_IMPLEMENT_FN_WRITEOUT */
+#ifdef USB_CFG_PULLUP_IOPORTNAME
+#define usbDeviceConnect()      ((USB_PULLUP_DDR |= (1<<USB_CFG_PULLUP_BIT)), \
+                                  (USB_PULLUP_OUT |= (1<<USB_CFG_PULLUP_BIT)))
+#define usbDeviceDisconnect()   ((USB_PULLUP_DDR &= ~(1<<USB_CFG_PULLUP_BIT)), \
+                                  (USB_PULLUP_OUT &= ~(1<<USB_CFG_PULLUP_BIT)))
+#else /* USB_CFG_PULLUP_IOPORTNAME */
+#define usbDeviceConnect()      (USBDDR &= ~(1<<USBMINUS))
+#define usbDeviceDisconnect()   (USBDDR |= (1<<USBMINUS))
+#endif /* USB_CFG_PULLUP_IOPORTNAME */
+/* The macros usbDeviceConnect() and usbDeviceDisconnect() (intended to look
+ * like a function) connect resp. disconnect the device from the host's USB.
+ * If the constants USB_CFG_PULLUP_IOPORT and USB_CFG_PULLUP_BIT are defined
+ * in usbconfig.h, a disconnect consists of removing the pull-up resisitor
+ * from D-, otherwise the disconnect is done by brute-force pulling D- to GND.
+ * This does not conform to the spec, but it works.
+ * Please note that the USB interrupt must be disabled while the device is
+ * in disconnected state, or the interrupt handler will hang! You can either
+ * turn off the USB interrupt selectively with
+ *     USB_INTR_ENABLE &= ~(1 << USB_INTR_ENABLE_BIT)
+ * or use cli() to disable interrupts globally.
+ */
+extern unsigned usbCrc16(unsigned data, uchar len);
+#define usbCrc16(data, len) usbCrc16((unsigned)(data), len)
+/* This function calculates the binary complement of the data CRC used in
+ * USB data packets. The value is used to build raw transmit packets.
+ * You may want to use this function for data checksums or to verify received
+ * data. We enforce 16 bit calling conventions for compatibility with IAR's
+ * tiny memory model.
+ */
+extern unsigned usbCrc16Append(unsigned data, uchar len);
+#define usbCrc16Append(data, len)    usbCrc16Append((unsigned)(data), len)
+/* This function is equivalent to usbCrc16() above, except that it appends
+ * the 2 bytes CRC (lowbyte first) in the 'data' buffer after reading 'len'
+ * bytes.
+ */
+#if USB_CFG_HAVE_MEASURE_FRAME_LENGTH
+extern unsigned usbMeasureFrameLength(void);
+/* This function MUST be called IMMEDIATELY AFTER USB reset and measures 1/7 of
+ * the number of CPU cycles during one USB frame minus one low speed bit
+ * length. In other words: return value = 1499 * (F_CPU / 10.5 MHz)
+ * Since this is a busy wait, you MUST disable all interrupts with cli() before
+ * calling this function.
+ * This can be used to calibrate the AVR's RC oscillator.
+ */
+#endif
+extern uchar    usbConfiguration;
+/* This value contains the current configuration set by the host. The driver
+ * allows setting and querying of this variable with the USB SET_CONFIGURATION
+ * and GET_CONFIGURATION requests, but does not use it otherwise.
+ * You may want to reflect the "configured" status with a LED on the device or
+ * switch on high power parts of the circuit only if the device is configured.
+ */
+#if USB_COUNT_SOF
+extern volatile uchar   usbSofCount;
+/* This variable is incremented on every SOF packet. It is only available if
+ * the macro USB_COUNT_SOF is defined to a value != 0.
+ */
+#endif
+#if USB_CFG_CHECK_DATA_TOGGLING
+extern uchar    usbCurrentDataToken;
+/* This variable can be checked in usbFunctionWrite() and usbFunctionWriteOut()
+ * to ignore duplicate packets.
+ */
+#endif
+
+#define USB_STRING_DESCRIPTOR_HEADER(stringLength) ((2*(stringLength)+2) | (3<<8))
+/* This macro builds a descriptor header for a string descriptor given the
+ * string's length. See usbdrv.c for an example how to use it.
+ */
+#if USB_CFG_HAVE_FLOWCONTROL
+extern volatile schar   usbRxLen;
+#define usbDisableAllRequests()     usbRxLen = -1
+/* Must be called from usbFunctionWrite(). This macro disables all data input
+ * from the USB interface. Requests from the host are answered with a NAK
+ * while they are disabled.
+ */
+#define usbEnableAllRequests()      usbRxLen = 0
+/* May only be called if requests are disabled. This macro enables input from
+ * the USB interface after it has been disabled with usbDisableAllRequests().
+ */
+#define usbAllRequestsAreDisabled() (usbRxLen < 0)
+/* Use this macro to find out whether requests are disabled. It may be needed
+ * to ensure that usbEnableAllRequests() is never called when requests are
+ * enabled.
+ */
+#endif
+
+#define USB_SET_DATATOKEN1(token)   usbTxBuf1[0] = token
+#define USB_SET_DATATOKEN3(token)   usbTxBuf3[0] = token
+/* These two macros can be used by application software to reset data toggling
+ * for interrupt-in endpoints 1 and 3. Since the token is toggled BEFORE
+ * sending data, you must set the opposite value of the token which should come
+ * first.
+ */
+
+#endif  /* __ASSEMBLER__ */
+
+
+/* ------------------------------------------------------------------------- */
+/* ----------------- Definitions for Descriptor Properties ----------------- */
+/* ------------------------------------------------------------------------- */
+/* This is advanced stuff. See usbconfig-prototype.h for more information
+ * about the various methods to define USB descriptors. If you do nothing,
+ * the default descriptors will be used.
+ */
+#define USB_PROP_IS_DYNAMIC     (1 << 14)
+/* If this property is set for a descriptor, usbFunctionDescriptor() will be
+ * used to obtain the particular descriptor. Data directly returned via
+ * usbMsgPtr are FLASH data by default, combine (OR) with USB_PROP_IS_RAM to
+ * return RAM data.
+ */
+#define USB_PROP_IS_RAM         (1 << 15)
+/* If this property is set for a descriptor, the data is read from RAM
+ * memory instead of Flash. The property is used for all methods to provide
+ * external descriptors.
+ */
+#define USB_PROP_LENGTH(len)    ((len) & 0x3fff)
+/* If a static external descriptor is used, this is the total length of the
+ * descriptor in bytes.
+ */
+
+/* all descriptors which may have properties: */
+#ifndef USB_CFG_DESCR_PROPS_DEVICE
+#define USB_CFG_DESCR_PROPS_DEVICE                  0
+#endif
+#ifndef USB_CFG_DESCR_PROPS_CONFIGURATION
+#define USB_CFG_DESCR_PROPS_CONFIGURATION           0
+#endif
+#ifndef USB_CFG_DESCR_PROPS_STRINGS
+#define USB_CFG_DESCR_PROPS_STRINGS                 0
+#endif
+#ifndef USB_CFG_DESCR_PROPS_STRING_0
+#define USB_CFG_DESCR_PROPS_STRING_0                0
+#endif
+#ifndef USB_CFG_DESCR_PROPS_STRING_VENDOR
+#define USB_CFG_DESCR_PROPS_STRING_VENDOR           0
+#endif
+#ifndef USB_CFG_DESCR_PROPS_STRING_PRODUCT
+#define USB_CFG_DESCR_PROPS_STRING_PRODUCT          0
+#endif
+#ifndef USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER
+#define USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER    0
+#endif
+#ifndef USB_CFG_DESCR_PROPS_HID
+#define USB_CFG_DESCR_PROPS_HID                     0
+#endif
+#if !(USB_CFG_DESCR_PROPS_HID_REPORT)
+#   undef USB_CFG_DESCR_PROPS_HID_REPORT
+#   if USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH /* do some backward compatibility tricks */
+#       define USB_CFG_DESCR_PROPS_HID_REPORT       USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH
+#   else
+#       define USB_CFG_DESCR_PROPS_HID_REPORT       0
+#   endif
+#endif
+#ifndef USB_CFG_DESCR_PROPS_UNKNOWN
+#define USB_CFG_DESCR_PROPS_UNKNOWN                 0
+#endif
+
+/* ------------------ forward declaration of descriptors ------------------- */
+/* If you use external static descriptors, they must be stored in global
+ * arrays as declared below:
+ */
+#ifndef __ASSEMBLER__
+extern
+#if !(USB_CFG_DESCR_PROPS_DEVICE & USB_PROP_IS_RAM)
+PROGMEM
+#endif
+char usbDescriptorDevice[];
+
+extern
+#if !(USB_CFG_DESCR_PROPS_CONFIGURATION & USB_PROP_IS_RAM)
+PROGMEM
+#endif
+char usbDescriptorConfiguration[];
+
+extern
+#if !(USB_CFG_DESCR_PROPS_HID_REPORT & USB_PROP_IS_RAM)
+PROGMEM
+#endif
+char usbDescriptorHidReport[];
+
+extern
+#if !(USB_CFG_DESCR_PROPS_STRING_0 & USB_PROP_IS_RAM)
+PROGMEM
+#endif
+char usbDescriptorString0[];
+
+extern
+#if !(USB_CFG_DESCR_PROPS_STRING_VENDOR & USB_PROP_IS_RAM)
+PROGMEM
+#endif
+int usbDescriptorStringVendor[];
+
+extern
+#if !(USB_CFG_DESCR_PROPS_STRING_PRODUCT & USB_PROP_IS_RAM)
+PROGMEM
+#endif
+int usbDescriptorStringDevice[];
+
+extern
+#if !(USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER & USB_PROP_IS_RAM)
+PROGMEM
+#endif
+int usbDescriptorStringSerialNumber[];
+
+#endif /* __ASSEMBLER__ */
+
+/* ------------------------------------------------------------------------- */
+/* ------------------------ General Purpose Macros ------------------------- */
+/* ------------------------------------------------------------------------- */
+
+#define USB_CONCAT(a, b)            a ## b
+#define USB_CONCAT_EXPANDED(a, b)   USB_CONCAT(a, b)
+
+#define USB_OUTPORT(name)           USB_CONCAT(PORT, name)
+#define USB_INPORT(name)            USB_CONCAT(PIN, name)
+#define USB_DDRPORT(name)           USB_CONCAT(DDR, name)
+/* The double-define trick above lets us concatenate strings which are
+ * defined by macros.
+ */
+
+/* ------------------------------------------------------------------------- */
+/* ------------------------- Constant definitions -------------------------- */
+/* ------------------------------------------------------------------------- */
+
+#if !defined __ASSEMBLER__ && (!defined USB_CFG_VENDOR_ID || !defined USB_CFG_DEVICE_ID)
+#warning "You should define USB_CFG_VENDOR_ID and USB_CFG_DEVICE_ID in usbconfig.h"
+/* If the user has not defined IDs, we default to obdev's free IDs.
+ * See USB-IDs-for-free.txt for details.
+ */
+#endif
+
+/* make sure we have a VID and PID defined, byte order is lowbyte, highbyte */
+#ifndef USB_CFG_VENDOR_ID
+#   define  USB_CFG_VENDOR_ID   0xc0, 0x16  /* = 0x16c0 = 5824 = voti.nl */
+#endif
+
+#ifndef USB_CFG_DEVICE_ID
+#   if USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH
+#       define USB_CFG_DEVICE_ID    0xdf, 0x05  /* = 0x5df = 1503, shared PID for HIDs */
+#   elif USB_CFG_INTERFACE_CLASS == 2
+#       define USB_CFG_DEVICE_ID    0xe1, 0x05  /* = 0x5e1 = 1505, shared PID for CDC Modems */
+#   else
+#       define USB_CFG_DEVICE_ID    0xdc, 0x05  /* = 0x5dc = 1500, obdev's free PID */
+#   endif
+#endif
+
+/* Derive Output, Input and DataDirection ports from port names */
+#ifndef USB_CFG_IOPORTNAME
+#error "You must define USB_CFG_IOPORTNAME in usbconfig.h, see usbconfig-prototype.h"
+#endif
+
+#define USBOUT          USB_OUTPORT(USB_CFG_IOPORTNAME)
+#define USB_PULLUP_OUT  USB_OUTPORT(USB_CFG_PULLUP_IOPORTNAME)
+#define USBIN           USB_INPORT(USB_CFG_IOPORTNAME)
+#define USBDDR          USB_DDRPORT(USB_CFG_IOPORTNAME)
+#define USB_PULLUP_DDR  USB_DDRPORT(USB_CFG_PULLUP_IOPORTNAME)
+
+#define USBMINUS    USB_CFG_DMINUS_BIT
+#define USBPLUS     USB_CFG_DPLUS_BIT
+#define USBIDLE     (1<<USB_CFG_DMINUS_BIT) /* value representing J state */
+#define USBMASK     ((1<<USB_CFG_DPLUS_BIT) | (1<<USB_CFG_DMINUS_BIT))  /* mask for USB I/O bits */
+
+/* defines for backward compatibility with older driver versions: */
+#define USB_CFG_IOPORT          USB_OUTPORT(USB_CFG_IOPORTNAME)
+#ifdef USB_CFG_PULLUP_IOPORTNAME
+#define USB_CFG_PULLUP_IOPORT   USB_OUTPORT(USB_CFG_PULLUP_IOPORTNAME)
+#endif
+
+#ifndef USB_CFG_EP3_NUMBER  /* if not defined in usbconfig.h */
+#define USB_CFG_EP3_NUMBER  3
+#endif
+
+#ifndef USB_CFG_HAVE_INTRIN_ENDPOINT3
+#define USB_CFG_HAVE_INTRIN_ENDPOINT3   0
+#endif
+
+#define USB_BUFSIZE     11  /* PID, 8 bytes data, 2 bytes CRC */
+
+/* ----- Try to find registers and bits responsible for ext interrupt 0 ----- */
+
+#ifndef USB_INTR_CFG    /* allow user to override our default */
+#   if defined  EICRA
+#       define USB_INTR_CFG EICRA
+#   else
+#       define USB_INTR_CFG MCUCR
+#   endif
+#endif
+#ifndef USB_INTR_CFG_SET    /* allow user to override our default */
+#   if defined(USB_COUNT_SOF) || defined(USB_SOF_HOOK)
+#       define USB_INTR_CFG_SET (1 << ISC01)                    /* cfg for falling edge */
+        /* If any SOF logic is used, the interrupt must be wired to D- where
+         * we better trigger on falling edge
+         */
+#   else
+#       define USB_INTR_CFG_SET ((1 << ISC00) | (1 << ISC01))   /* cfg for rising edge */
+#   endif
+#endif
+#ifndef USB_INTR_CFG_CLR    /* allow user to override our default */
+#   define USB_INTR_CFG_CLR 0    /* no bits to clear */
+#endif
+
+#ifndef USB_INTR_ENABLE     /* allow user to override our default */
+#   if defined GIMSK
+#       define USB_INTR_ENABLE  GIMSK
+#   elif defined EIMSK
+#       define USB_INTR_ENABLE  EIMSK
+#   else
+#       define USB_INTR_ENABLE  GICR
+#   endif
+#endif
+#ifndef USB_INTR_ENABLE_BIT /* allow user to override our default */
+#   define USB_INTR_ENABLE_BIT  INT0
+#endif
+
+#ifndef USB_INTR_PENDING    /* allow user to override our default */
+#   if defined  EIFR
+#       define USB_INTR_PENDING EIFR
+#   else
+#       define USB_INTR_PENDING GIFR
+#   endif
+#endif
+#ifndef USB_INTR_PENDING_BIT    /* allow user to override our default */
+#   define USB_INTR_PENDING_BIT INTF0
+#endif
+
+/*
+The defines above don't work for the following chips
+at90c8534: no ISC0?, no PORTB, can't find a data sheet
+at86rf401: no PORTB, no MCUCR etc, low clock rate
+atmega103: no ISC0? (maybe omission in header, can't find data sheet)
+atmega603: not defined in avr-libc
+at43usb320, at43usb355, at76c711: have USB anyway
+at94k: is different...
+
+at90s1200, attiny11, attiny12, attiny15, attiny28: these have no RAM
+*/
+
+/* ------------------------------------------------------------------------- */
+/* ----------------- USB Specification Constants and Types ----------------- */
+/* ------------------------------------------------------------------------- */
+
+/* USB Token values */
+#define USBPID_SETUP    0x2d
+#define USBPID_OUT      0xe1
+#define USBPID_IN       0x69
+#define USBPID_DATA0    0xc3
+#define USBPID_DATA1    0x4b
+
+#define USBPID_ACK      0xd2
+#define USBPID_NAK      0x5a
+#define USBPID_STALL    0x1e
+
+#ifndef USB_INITIAL_DATATOKEN
+#define USB_INITIAL_DATATOKEN   USBPID_DATA1
+#endif
+
+#ifndef __ASSEMBLER__
+
+typedef struct usbTxStatus{
+    volatile uchar   len;
+    uchar   buffer[USB_BUFSIZE];
+}usbTxStatus_t;
+
+extern usbTxStatus_t   usbTxStatus1, usbTxStatus3;
+#define usbTxLen1   usbTxStatus1.len
+#define usbTxBuf1   usbTxStatus1.buffer
+#define usbTxLen3   usbTxStatus3.len
+#define usbTxBuf3   usbTxStatus3.buffer
+
+
+typedef union usbWord{
+    unsigned    word;
+    uchar       bytes[2];
+}usbWord_t;
+
+typedef struct usbRequest{
+    uchar       bmRequestType;
+    uchar       bRequest;
+    usbWord_t   wValue;
+    usbWord_t   wIndex;
+    usbWord_t   wLength;
+}usbRequest_t;
+/* This structure matches the 8 byte setup request */
+#endif
+
+/* bmRequestType field in USB setup:
+ * d t t r r r r r, where
+ * d ..... direction: 0=host->device, 1=device->host
+ * t ..... type: 0=standard, 1=class, 2=vendor, 3=reserved
+ * r ..... recipient: 0=device, 1=interface, 2=endpoint, 3=other
+ */
+
+/* USB setup recipient values */
+#define USBRQ_RCPT_MASK         0x1f
+#define USBRQ_RCPT_DEVICE       0
+#define USBRQ_RCPT_INTERFACE    1
+#define USBRQ_RCPT_ENDPOINT     2
+
+/* USB request type values */
+#define USBRQ_TYPE_MASK         0x60
+#define USBRQ_TYPE_STANDARD     (0<<5)
+#define USBRQ_TYPE_CLASS        (1<<5)
+#define USBRQ_TYPE_VENDOR       (2<<5)
+
+/* USB direction values: */
+#define USBRQ_DIR_MASK              0x80
+#define USBRQ_DIR_HOST_TO_DEVICE    (0<<7)
+#define USBRQ_DIR_DEVICE_TO_HOST    (1<<7)
+
+/* USB Standard Requests */
+#define USBRQ_GET_STATUS        0
+#define USBRQ_CLEAR_FEATURE     1
+#define USBRQ_SET_FEATURE       3
+#define USBRQ_SET_ADDRESS       5
+#define USBRQ_GET_DESCRIPTOR    6
+#define USBRQ_SET_DESCRIPTOR    7
+#define USBRQ_GET_CONFIGURATION 8
+#define USBRQ_SET_CONFIGURATION 9
+#define USBRQ_GET_INTERFACE     10
+#define USBRQ_SET_INTERFACE     11
+#define USBRQ_SYNCH_FRAME       12
+
+/* USB descriptor constants */
+#define USBDESCR_DEVICE         1
+#define USBDESCR_CONFIG         2
+#define USBDESCR_STRING         3
+#define USBDESCR_INTERFACE      4
+#define USBDESCR_ENDPOINT       5
+#define USBDESCR_HID            0x21
+#define USBDESCR_HID_REPORT     0x22
+#define USBDESCR_HID_PHYS       0x23
+
+//#define USBATTR_BUSPOWER        0x80  // USB 1.1 does not define this value any more
+#define USBATTR_SELFPOWER       0x40
+#define USBATTR_REMOTEWAKE      0x20
+
+/* USB HID Requests */
+#define USBRQ_HID_GET_REPORT    0x01
+#define USBRQ_HID_GET_IDLE      0x02
+#define USBRQ_HID_GET_PROTOCOL  0x03
+#define USBRQ_HID_SET_REPORT    0x09
+#define USBRQ_HID_SET_IDLE      0x0a
+#define USBRQ_HID_SET_PROTOCOL  0x0b
+
+/* ------------------------------------------------------------------------- */
+
+#endif /* __usbdrv_h_included__ */
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm.S b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm.S
new file mode 100644
index 00000000..45fcf183
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm.S
@@ -0,0 +1,393 @@
+/* Name: usbdrvasm.S
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2007-06-13
+ * Tabsize: 4
+ * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * Revision: $Id: usbdrvasm.S 785 2010-05-30 17:57:07Z cs $
+ */
+
+/*
+General Description:
+This module is the assembler part of the USB driver. This file contains
+general code (preprocessor acrobatics and CRC computation) and then includes
+the file appropriate for the given clock rate.
+*/
+
+#define __SFR_OFFSET 0      /* used by avr-libc's register definitions */
+#include "usbportability.h"
+#include "usbdrv.h"         /* for common defs */
+
+/* register names */
+#define x1      r16
+#define x2      r17
+#define shift   r18
+#define cnt     r19
+#define x3      r20
+#define x4      r21
+#define x5		r22
+#define bitcnt  x5
+#define phase   x4
+#define leap    x4
+
+/* Some assembler dependent definitions and declarations: */
+
+#ifdef __IAR_SYSTEMS_ASM__
+    extern  usbRxBuf, usbDeviceAddr, usbNewDeviceAddr, usbInputBufOffset
+    extern  usbCurrentTok, usbRxLen, usbRxToken, usbTxLen
+    extern  usbTxBuf, usbTxStatus1, usbTxStatus3
+#   if USB_COUNT_SOF
+        extern usbSofCount
+#   endif
+    public  usbCrc16
+    public  usbCrc16Append
+
+    COMMON  INTVEC
+#   ifndef USB_INTR_VECTOR
+        ORG     INT0_vect
+#   else /* USB_INTR_VECTOR */
+        ORG     USB_INTR_VECTOR
+#       undef   USB_INTR_VECTOR
+#   endif /* USB_INTR_VECTOR */
+#   define  USB_INTR_VECTOR usbInterruptHandler
+    rjmp    USB_INTR_VECTOR
+    RSEG    CODE
+
+#else /* __IAR_SYSTEMS_ASM__ */
+
+#   ifndef USB_INTR_VECTOR /* default to hardware interrupt INT0 */
+#       ifdef INT0_vect
+#           define USB_INTR_VECTOR  INT0_vect       // this is the "new" define for the vector
+#       else
+#           define USB_INTR_VECTOR  SIG_INTERRUPT0  // this is the "old" vector
+#       endif
+#   endif
+    .text
+    .global USB_INTR_VECTOR
+    .type   USB_INTR_VECTOR, @function
+    .global usbCrc16
+    .global usbCrc16Append
+#endif /* __IAR_SYSTEMS_ASM__ */
+
+
+#if USB_INTR_PENDING < 0x40 /* This is an I/O address, use in and out */
+#   define  USB_LOAD_PENDING(reg)   in reg, USB_INTR_PENDING
+#   define  USB_STORE_PENDING(reg)  out USB_INTR_PENDING, reg
+#else   /* It's a memory address, use lds and sts */
+#   define  USB_LOAD_PENDING(reg)   lds reg, USB_INTR_PENDING
+#   define  USB_STORE_PENDING(reg)  sts USB_INTR_PENDING, reg
+#endif
+
+#define usbTxLen1   usbTxStatus1
+#define usbTxBuf1   (usbTxStatus1 + 1)
+#define usbTxLen3   usbTxStatus3
+#define usbTxBuf3   (usbTxStatus3 + 1)
+
+
+;----------------------------------------------------------------------------
+; Utility functions
+;----------------------------------------------------------------------------
+
+#ifdef __IAR_SYSTEMS_ASM__
+/* Register assignments for usbCrc16 on IAR cc */
+/* Calling conventions on IAR:
+ * First parameter passed in r16/r17, second in r18/r19 and so on.
+ * Callee must preserve r4-r15, r24-r29 (r28/r29 is frame pointer)
+ * Result is passed in r16/r17
+ * In case of the "tiny" memory model, pointers are only 8 bit with no
+ * padding. We therefore pass argument 1 as "16 bit unsigned".
+ */
+RTMODEL "__rt_version", "3"
+/* The line above will generate an error if cc calling conventions change.
+ * The value "3" above is valid for IAR 4.10B/W32
+ */
+#   define argLen   r18 /* argument 2 */
+#   define argPtrL  r16 /* argument 1 */
+#   define argPtrH  r17 /* argument 1 */
+
+#   define resCrcL  r16 /* result */
+#   define resCrcH  r17 /* result */
+
+#   define ptrL     ZL
+#   define ptrH     ZH
+#   define ptr      Z
+#   define byte     r22
+#   define bitCnt   r19
+#   define polyL    r20
+#   define polyH    r21
+#   define scratch  r23
+
+#else  /* __IAR_SYSTEMS_ASM__ */ 
+/* Register assignments for usbCrc16 on gcc */
+/* Calling conventions on gcc:
+ * First parameter passed in r24/r25, second in r22/23 and so on.
+ * Callee must preserve r1-r17, r28/r29
+ * Result is passed in r24/r25
+ */
+#   define argLen   r22 /* argument 2 */
+#   define argPtrL  r24 /* argument 1 */
+#   define argPtrH  r25 /* argument 1 */
+
+#   define resCrcL  r24 /* result */
+#   define resCrcH  r25 /* result */
+
+#   define ptrL     XL
+#   define ptrH     XH
+#   define ptr      x
+#   define byte     r18
+#   define bitCnt   r19
+#   define polyL    r20
+#   define polyH    r21
+#   define scratch  r23
+
+#endif
+
+#if USB_USE_FAST_CRC
+
+; This implementation is faster, but has bigger code size
+; Thanks to Slawomir Fras (BoskiDialer) for this code!
+; It implements the following C pseudo-code:
+; unsigned table(unsigned char x)
+; {
+; unsigned    value;
+; 
+;     value = (unsigned)x << 6;
+;     value ^= (unsigned)x << 7;
+;     if(parity(x))
+;         value ^= 0xc001;
+;     return value;
+; }
+; unsigned usbCrc16(unsigned char *argPtr, unsigned char argLen)
+; {
+; unsigned crc = 0xffff;
+; 
+;     while(argLen--)
+;         crc = table(lo8(crc) ^ *argPtr++) ^ hi8(crc);
+;     return ~crc;
+; }
+
+; extern unsigned usbCrc16(unsigned char *argPtr, unsigned char argLen);
+;   argPtr  r24+25 / r16+r17
+;   argLen  r22 / r18
+; temp variables:
+;   byte    r18 / r22
+;   scratch r23
+;   resCrc  r24+r25 / r16+r17
+;   ptr     X / Z
+usbCrc16:
+    mov     ptrL, argPtrL
+    mov     ptrH, argPtrH
+    ldi     resCrcL, 0xFF
+    ldi     resCrcH, 0xFF
+    rjmp    usbCrc16LoopTest
+usbCrc16ByteLoop:
+    ld      byte, ptr+
+    eor     resCrcL, byte   ; resCrcL is now 'x' in table()
+    mov     byte, resCrcL   ; compute parity of 'x'
+    swap    byte
+    eor     byte, resCrcL
+    mov     scratch, byte
+    lsr     byte
+    lsr     byte
+    eor     byte, scratch
+    inc     byte
+    lsr     byte
+    andi    byte, 1         ; byte is now parity(x)
+    mov     scratch, resCrcL
+    mov     resCrcL, resCrcH
+    eor     resCrcL, byte   ; low byte of if(parity(x)) value ^= 0xc001;
+    neg     byte
+    andi    byte, 0xc0
+    mov     resCrcH, byte   ; high byte of if(parity(x)) value ^= 0xc001;
+    clr     byte
+    lsr     scratch
+    ror     byte
+    eor     resCrcH, scratch
+    eor     resCrcL, byte
+    lsr     scratch
+    ror     byte
+    eor     resCrcH, scratch
+    eor     resCrcL, byte
+usbCrc16LoopTest:
+    subi    argLen, 1
+    brsh    usbCrc16ByteLoop
+    com     resCrcL
+    com     resCrcH
+    ret
+
+#else   /* USB_USE_FAST_CRC */
+
+; This implementation is slower, but has less code size
+;
+; extern unsigned usbCrc16(unsigned char *argPtr, unsigned char argLen);
+;   argPtr  r24+25 / r16+r17
+;   argLen  r22 / r18
+; temp variables:
+;   byte    r18 / r22
+;   bitCnt  r19
+;   poly    r20+r21
+;   scratch r23
+;   resCrc  r24+r25 / r16+r17
+;   ptr     X / Z
+usbCrc16:
+    mov     ptrL, argPtrL
+    mov     ptrH, argPtrH
+    ldi     resCrcL, 0
+    ldi     resCrcH, 0
+    ldi     polyL, lo8(0xa001)
+    ldi     polyH, hi8(0xa001)
+    com     argLen      ; argLen = -argLen - 1: modified loop to ensure that carry is set
+    ldi     bitCnt, 0   ; loop counter with starnd condition = end condition
+    rjmp    usbCrcLoopEntry
+usbCrcByteLoop:
+    ld      byte, ptr+
+    eor     resCrcL, byte
+usbCrcBitLoop:
+    ror     resCrcH     ; carry is always set here (see brcs jumps to here)
+    ror     resCrcL
+    brcs    usbCrcNoXor
+    eor     resCrcL, polyL
+    eor     resCrcH, polyH
+usbCrcNoXor:
+    subi    bitCnt, 224 ; (8 * 224) % 256 = 0; this loop iterates 8 times
+    brcs    usbCrcBitLoop
+usbCrcLoopEntry:
+    subi    argLen, -1
+    brcs    usbCrcByteLoop
+usbCrcReady:
+    ret
+; Thanks to Reimar Doeffinger for optimizing this CRC routine!
+
+#endif /* USB_USE_FAST_CRC */
+
+; extern unsigned usbCrc16Append(unsigned char *data, unsigned char len);
+usbCrc16Append:
+    rcall   usbCrc16
+    st      ptr+, resCrcL
+    st      ptr+, resCrcH
+    ret
+
+#undef argLen
+#undef argPtrL
+#undef argPtrH
+#undef resCrcL
+#undef resCrcH
+#undef ptrL
+#undef ptrH
+#undef ptr
+#undef byte
+#undef bitCnt
+#undef polyL
+#undef polyH
+#undef scratch
+
+
+#if USB_CFG_HAVE_MEASURE_FRAME_LENGTH
+#ifdef __IAR_SYSTEMS_ASM__
+/* Register assignments for usbMeasureFrameLength on IAR cc */
+/* Calling conventions on IAR:
+ * First parameter passed in r16/r17, second in r18/r19 and so on.
+ * Callee must preserve r4-r15, r24-r29 (r28/r29 is frame pointer)
+ * Result is passed in r16/r17
+ * In case of the "tiny" memory model, pointers are only 8 bit with no
+ * padding. We therefore pass argument 1 as "16 bit unsigned".
+ */
+#   define resL     r16
+#   define resH     r17
+#   define cnt16L   r30
+#   define cnt16H   r31
+#   define cntH     r18
+
+#else  /* __IAR_SYSTEMS_ASM__ */ 
+/* Register assignments for usbMeasureFrameLength on gcc */
+/* Calling conventions on gcc:
+ * First parameter passed in r24/r25, second in r22/23 and so on.
+ * Callee must preserve r1-r17, r28/r29
+ * Result is passed in r24/r25
+ */
+#   define resL     r24
+#   define resH     r25
+#   define cnt16L   r24
+#   define cnt16H   r25
+#   define cntH     r26
+#endif
+#   define cnt16    cnt16L
+
+; extern unsigned usbMeasurePacketLength(void);
+; returns time between two idle strobes in multiples of 7 CPU clocks
+.global usbMeasureFrameLength
+usbMeasureFrameLength:
+    ldi     cntH, 6         ; wait ~ 10 ms for D- == 0
+    clr     cnt16L
+    clr     cnt16H
+usbMFTime16:
+    dec     cntH
+    breq    usbMFTimeout
+usbMFWaitStrobe:            ; first wait for D- == 0 (idle strobe)
+    sbiw    cnt16, 1        ;[0] [6]
+    breq    usbMFTime16     ;[2]
+    sbic    USBIN, USBMINUS ;[3]
+    rjmp    usbMFWaitStrobe ;[4]
+usbMFWaitIdle:              ; then wait until idle again
+    sbis    USBIN, USBMINUS ;1 wait for D- == 1
+    rjmp    usbMFWaitIdle   ;2
+    ldi     cnt16L, 1       ;1 represents cycles so far
+    clr     cnt16H          ;1
+usbMFWaitLoop:
+    in      cntH, USBIN     ;[0] [7]
+    adiw    cnt16, 1        ;[1]
+    breq    usbMFTimeout    ;[3]
+    andi    cntH, USBMASK   ;[4]
+    brne    usbMFWaitLoop   ;[5]
+usbMFTimeout:
+#if resL != cnt16L
+    mov     resL, cnt16L
+    mov     resH, cnt16H
+#endif
+    ret
+
+#undef resL
+#undef resH
+#undef cnt16
+#undef cnt16L
+#undef cnt16H
+#undef cntH
+
+#endif  /* USB_CFG_HAVE_MEASURE_FRAME_LENGTH */
+
+;----------------------------------------------------------------------------
+; Now include the clock rate specific code
+;----------------------------------------------------------------------------
+
+#ifndef USB_CFG_CLOCK_KHZ
+#   ifdef F_CPU
+#       define USB_CFG_CLOCK_KHZ (F_CPU/1000)
+#   else
+#       error "USB_CFG_CLOCK_KHZ not defined in usbconfig.h and no F_CPU set!"
+#   endif
+#endif
+
+#if USB_CFG_CHECK_CRC   /* separate dispatcher for CRC type modules */
+#   if USB_CFG_CLOCK_KHZ == 18000
+#       include "usbdrvasm18-crc.inc"
+#   else
+#       error "USB_CFG_CLOCK_KHZ is not one of the supported crc-rates!"
+#   endif
+#else   /* USB_CFG_CHECK_CRC */
+#   if USB_CFG_CLOCK_KHZ == 12000
+#       include "usbdrvasm12.inc"
+#   elif USB_CFG_CLOCK_KHZ == 12800
+#       include "usbdrvasm128.inc"
+#   elif USB_CFG_CLOCK_KHZ == 15000
+#       include "usbdrvasm15.inc"
+#   elif USB_CFG_CLOCK_KHZ == 16000
+#       include "usbdrvasm16.inc"
+#   elif USB_CFG_CLOCK_KHZ == 16500
+#       include "usbdrvasm165.inc"
+#   elif USB_CFG_CLOCK_KHZ == 20000
+#       include "usbdrvasm20.inc"
+#   else
+#       error "USB_CFG_CLOCK_KHZ is not one of the supported non-crc-rates!"
+#   endif
+#endif /* USB_CFG_CHECK_CRC */
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm.asm b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm.asm
new file mode 100644
index 00000000..9cc4e4d7
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm.asm
@@ -0,0 +1,21 @@
+/* Name: usbdrvasm.asm
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2006-03-01
+ * Tabsize: 4
+ * Copyright: (c) 2006 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * This Revision: $Id$
+ */
+
+/*
+General Description:
+The IAR compiler/assembler system prefers assembler files with file extension
+".asm". We simply provide this file as an alias for usbdrvasm.S.
+
+Thanks to Oleg Semyonov for his help with the IAR tools port!
+*/
+
+#include "usbdrvasm.S"
+
+end
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm12.inc b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm12.inc
new file mode 100644
index 00000000..c1167584
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm12.inc
@@ -0,0 +1,393 @@
+/* Name: usbdrvasm12.inc
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2004-12-29
+ * Tabsize: 4
+ * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * This Revision: $Id: usbdrvasm12.inc 740 2009-04-13 18:23:31Z cs $
+ */
+
+/* Do not link this file! Link usbdrvasm.S instead, which includes the
+ * appropriate implementation!
+ */
+
+/*
+General Description:
+This file is the 12 MHz version of the asssembler part of the USB driver. It
+requires a 12 MHz crystal (not a ceramic resonator and not a calibrated RC
+oscillator).
+
+See usbdrv.h for a description of the entire driver.
+
+Since almost all of this code is timing critical, don't change unless you
+really know what you are doing! Many parts require not only a maximum number
+of CPU cycles, but even an exact number of cycles!
+
+
+Timing constraints according to spec (in bit times):
+timing subject                                      min max    CPUcycles
+---------------------------------------------------------------------------
+EOP of OUT/SETUP to sync pattern of DATA0 (both rx) 2   16     16-128
+EOP of IN to sync pattern of DATA0 (rx, then tx)    2   7.5    16-60
+DATAx (rx) to ACK/NAK/STALL (tx)                    2   7.5    16-60
+*/
+
+;Software-receiver engine. Strict timing! Don't change unless you can preserve timing!
+;interrupt response time: 4 cycles + insn running = 7 max if interrupts always enabled
+;max allowable interrupt latency: 34 cycles -> max 25 cycles interrupt disable
+;max stack usage: [ret(2), YL, SREG, YH, shift, x1, x2, x3, cnt, x4] = 11 bytes
+;Numbers in brackets are maximum cycles since SOF.
+USB_INTR_VECTOR:
+;order of registers pushed: YL, SREG [sofError], YH, shift, x1, x2, x3, cnt
+    push    YL              ;2 [35] push only what is necessary to sync with edge ASAP
+    in      YL, SREG        ;1 [37]
+    push    YL              ;2 [39]
+;----------------------------------------------------------------------------
+; Synchronize with sync pattern:
+;----------------------------------------------------------------------------
+;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
+;sync up with J to K edge during sync pattern -- use fastest possible loops
+;The first part waits at most 1 bit long since we must be in sync pattern.
+;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
+;waitForJ, ensure that this prerequisite is met.
+waitForJ:
+    inc     YL
+    sbis    USBIN, USBMINUS
+    brne    waitForJ        ; just make sure we have ANY timeout
+waitForK:
+;The following code results in a sampling window of 1/4 bit which meets the spec.
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+#if USB_COUNT_SOF
+    lds     YL, usbSofCount
+    inc     YL
+    sts     usbSofCount, YL
+#endif  /* USB_COUNT_SOF */
+#ifdef USB_SOF_HOOK
+    USB_SOF_HOOK
+#endif
+    rjmp    sofError
+foundK:
+;{3, 5} after falling D- edge, average delay: 4 cycles [we want 4 for center sampling]
+;we have 1 bit time for setup purposes, then sample again. Numbers in brackets
+;are cycles from center of first sync (double K) bit after the instruction
+    push    YH                  ;2 [2]
+    lds     YL, usbInputBufOffset;2 [4]
+    clr     YH                  ;1 [5]
+    subi    YL, lo8(-(usbRxBuf));1 [6]
+    sbci    YH, hi8(-(usbRxBuf));1 [7]
+
+    sbis    USBIN, USBMINUS ;1 [8] we want two bits K [sample 1 cycle too early]
+    rjmp    haveTwoBitsK    ;2 [10]
+    pop     YH              ;2 [11] undo the push from before
+    rjmp    waitForK        ;2 [13] this was not the end of sync, retry
+haveTwoBitsK:
+;----------------------------------------------------------------------------
+; push more registers and initialize values while we sample the first bits:
+;----------------------------------------------------------------------------
+    push    shift           ;2 [16]
+    push    x1              ;2 [12]
+    push    x2              ;2 [14]
+
+    in      x1, USBIN       ;1 [17] <-- sample bit 0
+    ldi     shift, 0xff     ;1 [18]
+    bst     x1, USBMINUS    ;1 [19]
+    bld     shift, 0        ;1 [20]
+    push    x3              ;2 [22]
+    push    cnt             ;2 [24]
+    
+    in      x2, USBIN       ;1 [25] <-- sample bit 1
+    ser     x3              ;1 [26] [inserted init instruction]
+    eor     x1, x2          ;1 [27]
+    bst     x1, USBMINUS    ;1 [28]
+    bld     shift, 1        ;1 [29]
+    ldi     cnt, USB_BUFSIZE;1 [30] [inserted init instruction]
+    rjmp    rxbit2          ;2 [32]
+
+;----------------------------------------------------------------------------
+; Receiver loop (numbers in brackets are cycles within byte after instr)
+;----------------------------------------------------------------------------
+
+unstuff0:               ;1 (branch taken)
+    andi    x3, ~0x01   ;1 [15]
+    mov     x1, x2      ;1 [16] x2 contains last sampled (stuffed) bit
+    in      x2, USBIN   ;1 [17] <-- sample bit 1 again
+    ori     shift, 0x01 ;1 [18]
+    rjmp    didUnstuff0 ;2 [20]
+
+unstuff1:               ;1 (branch taken)
+    mov     x2, x1      ;1 [21] x1 contains last sampled (stuffed) bit
+    andi    x3, ~0x02   ;1 [22]
+    ori     shift, 0x02 ;1 [23]
+    nop                 ;1 [24]
+    in      x1, USBIN   ;1 [25] <-- sample bit 2 again
+    rjmp    didUnstuff1 ;2 [27]
+
+unstuff2:               ;1 (branch taken)
+    andi    x3, ~0x04   ;1 [29]
+    ori     shift, 0x04 ;1 [30]
+    mov     x1, x2      ;1 [31] x2 contains last sampled (stuffed) bit
+    nop                 ;1 [32]
+    in      x2, USBIN   ;1 [33] <-- sample bit 3
+    rjmp    didUnstuff2 ;2 [35]
+
+unstuff3:               ;1 (branch taken)
+    in      x2, USBIN   ;1 [34] <-- sample stuffed bit 3 [one cycle too late]
+    andi    x3, ~0x08   ;1 [35]
+    ori     shift, 0x08 ;1 [36]
+    rjmp    didUnstuff3 ;2 [38]
+
+unstuff4:               ;1 (branch taken)
+    andi    x3, ~0x10   ;1 [40]
+    in      x1, USBIN   ;1 [41] <-- sample stuffed bit 4
+    ori     shift, 0x10 ;1 [42]
+    rjmp    didUnstuff4 ;2 [44]
+
+unstuff5:               ;1 (branch taken)
+    andi    x3, ~0x20   ;1 [48]
+    in      x2, USBIN   ;1 [49] <-- sample stuffed bit 5
+    ori     shift, 0x20 ;1 [50]
+    rjmp    didUnstuff5 ;2 [52]
+
+unstuff6:               ;1 (branch taken)
+    andi    x3, ~0x40   ;1 [56]
+    in      x1, USBIN   ;1 [57] <-- sample stuffed bit 6
+    ori     shift, 0x40 ;1 [58]
+    rjmp    didUnstuff6 ;2 [60]
+
+; extra jobs done during bit interval:
+; bit 0:    store, clear [SE0 is unreliable here due to bit dribbling in hubs]
+; bit 1:    se0 check
+; bit 2:    overflow check
+; bit 3:    recovery from delay [bit 0 tasks took too long]
+; bit 4:    none
+; bit 5:    none
+; bit 6:    none
+; bit 7:    jump, eor
+rxLoop:
+    eor     x3, shift   ;1 [0] reconstruct: x3 is 0 at bit locations we changed, 1 at others
+    in      x1, USBIN   ;1 [1] <-- sample bit 0
+    st      y+, x3      ;2 [3] store data
+    ser     x3          ;1 [4]
+    nop                 ;1 [5]
+    eor     x2, x1      ;1 [6]
+    bst     x2, USBMINUS;1 [7]
+    bld     shift, 0    ;1 [8]
+    in      x2, USBIN   ;1 [9] <-- sample bit 1 (or possibly bit 0 stuffed)
+    andi    x2, USBMASK ;1 [10]
+    breq    se0         ;1 [11] SE0 check for bit 1
+    andi    shift, 0xf9 ;1 [12]
+didUnstuff0:
+    breq    unstuff0    ;1 [13]
+    eor     x1, x2      ;1 [14]
+    bst     x1, USBMINUS;1 [15]
+    bld     shift, 1    ;1 [16]
+rxbit2:
+    in      x1, USBIN   ;1 [17] <-- sample bit 2 (or possibly bit 1 stuffed)
+    andi    shift, 0xf3 ;1 [18]
+    breq    unstuff1    ;1 [19] do remaining work for bit 1
+didUnstuff1:
+    subi    cnt, 1      ;1 [20]
+    brcs    overflow    ;1 [21] loop control
+    eor     x2, x1      ;1 [22]
+    bst     x2, USBMINUS;1 [23]
+    bld     shift, 2    ;1 [24]
+    in      x2, USBIN   ;1 [25] <-- sample bit 3 (or possibly bit 2 stuffed)
+    andi    shift, 0xe7 ;1 [26]
+    breq    unstuff2    ;1 [27]
+didUnstuff2:
+    eor     x1, x2      ;1 [28]
+    bst     x1, USBMINUS;1 [29]
+    bld     shift, 3    ;1 [30]
+didUnstuff3:
+    andi    shift, 0xcf ;1 [31]
+    breq    unstuff3    ;1 [32]
+    in      x1, USBIN   ;1 [33] <-- sample bit 4
+    eor     x2, x1      ;1 [34]
+    bst     x2, USBMINUS;1 [35]
+    bld     shift, 4    ;1 [36]
+didUnstuff4:
+    andi    shift, 0x9f ;1 [37]
+    breq    unstuff4    ;1 [38]
+    nop2                ;2 [40]
+    in      x2, USBIN   ;1 [41] <-- sample bit 5
+    eor     x1, x2      ;1 [42]
+    bst     x1, USBMINUS;1 [43]
+    bld     shift, 5    ;1 [44]
+didUnstuff5:
+    andi    shift, 0x3f ;1 [45]
+    breq    unstuff5    ;1 [46]
+    nop2                ;2 [48]
+    in      x1, USBIN   ;1 [49] <-- sample bit 6
+    eor     x2, x1      ;1 [50]
+    bst     x2, USBMINUS;1 [51]
+    bld     shift, 6    ;1 [52]
+didUnstuff6:
+    cpi     shift, 0x02 ;1 [53]
+    brlo    unstuff6    ;1 [54]
+    nop2                ;2 [56]
+    in      x2, USBIN   ;1 [57] <-- sample bit 7
+    eor     x1, x2      ;1 [58]
+    bst     x1, USBMINUS;1 [59]
+    bld     shift, 7    ;1 [60]
+didUnstuff7:
+    cpi     shift, 0x04 ;1 [61]
+    brsh    rxLoop      ;2 [63] loop control
+unstuff7:
+    andi    x3, ~0x80   ;1 [63]
+    ori     shift, 0x80 ;1 [64]
+    in      x2, USBIN   ;1 [65] <-- sample stuffed bit 7
+    nop                 ;1 [66]
+    rjmp    didUnstuff7 ;2 [68]
+
+macro POP_STANDARD ; 12 cycles
+    pop     cnt
+    pop     x3
+    pop     x2
+    pop     x1
+    pop     shift
+    pop     YH
+    endm
+macro POP_RETI     ; 5 cycles
+    pop     YL
+    out     SREG, YL
+    pop     YL
+    endm
+
+#include "asmcommon.inc"
+
+;----------------------------------------------------------------------------
+; Transmitting data
+;----------------------------------------------------------------------------
+
+txByteLoop:
+txBitloop:
+stuffN1Delay:                   ;     [03]
+    ror     shift               ;[-5] [11] [59]
+    brcc    doExorN1            ;[-4]      [60]
+    subi    x4, 1               ;[-3]
+    brne    commonN1            ;[-2]
+    lsl     shift               ;[-1] compensate ror after rjmp stuffDelay
+    nop                         ;[00] stuffing consists of just waiting 8 cycles
+    rjmp    stuffN1Delay        ;[01] after ror, C bit is reliably clear
+
+sendNakAndReti:                 ;0 [-19] 19 cycles until SOP
+    ldi     x3, USBPID_NAK      ;1 [-18]
+    rjmp    usbSendX3           ;2 [-16]
+sendAckAndReti:                 ;0 [-19] 19 cycles until SOP
+    ldi     x3, USBPID_ACK      ;1 [-18]
+    rjmp    usbSendX3           ;2 [-16]
+sendCntAndReti:                 ;0 [-17] 17 cycles until SOP
+    mov     x3, cnt             ;1 [-16]
+usbSendX3:                      ;0 [-16]
+    ldi     YL, 20              ;1 [-15] 'x3' is R20
+    ldi     YH, 0               ;1 [-14]
+    ldi     cnt, 2              ;1 [-13]
+;   rjmp    usbSendAndReti      fallthrough
+
+; USB spec says:
+; idle = J
+; J = (D+ = 0), (D- = 1) or USBOUT = 0x01
+; K = (D+ = 1), (D- = 0) or USBOUT = 0x02
+; Spec allows 7.5 bit times from EOP to SOP for replies (= 60 cycles)
+
+;usbSend:
+;pointer to data in 'Y'
+;number of bytes in 'cnt' -- including sync byte
+;uses: x1...x2, x4, shift, cnt, Y [x1 = mirror USBOUT, x2 = USBMASK, x4 = bitstuff cnt]
+;Numbers in brackets are time since first bit of sync pattern is sent (start of instruction)
+usbSendAndReti:
+    in      x2, USBDDR          ;[-12] 12 cycles until SOP
+    ori     x2, USBMASK         ;[-11]
+    sbi     USBOUT, USBMINUS    ;[-10] prepare idle state; D+ and D- must have been 0 (no pullups)
+    out     USBDDR, x2          ;[-8] <--- acquire bus
+    in      x1, USBOUT          ;[-7] port mirror for tx loop
+    ldi     shift, 0x40         ;[-6] sync byte is first byte sent (we enter loop after ror)
+    ldi     x2, USBMASK         ;[-5]
+    push    x4                  ;[-4]
+doExorN1:
+    eor     x1, x2              ;[-2] [06] [62]
+    ldi     x4, 6               ;[-1] [07] [63]
+commonN1:
+stuffN2Delay:
+    out     USBOUT, x1          ;[00] [08] [64] <--- set bit
+    ror     shift               ;[01]
+    brcc    doExorN2            ;[02]
+    subi    x4, 1               ;[03]
+    brne    commonN2            ;[04]
+    lsl     shift               ;[05] compensate ror after rjmp stuffDelay
+    rjmp    stuffN2Delay        ;[06] after ror, C bit is reliably clear
+doExorN2:
+    eor     x1, x2              ;[04] [12]
+    ldi     x4, 6               ;[05] [13]
+commonN2:
+    nop                         ;[06] [14]
+    subi    cnt, 171            ;[07] [15] trick: (3 * 171) & 0xff = 1
+    out     USBOUT, x1          ;[08] [16] <--- set bit
+    brcs    txBitloop           ;[09]      [25] [41]
+
+stuff6Delay:
+    ror     shift               ;[42] [50]
+    brcc    doExor6             ;[43]
+    subi    x4, 1               ;[44]
+    brne    common6             ;[45]
+    lsl     shift               ;[46] compensate ror after rjmp stuffDelay
+    nop                         ;[47] stuffing consists of just waiting 8 cycles
+    rjmp    stuff6Delay         ;[48] after ror, C bit is reliably clear
+doExor6:
+    eor     x1, x2              ;[45] [53]
+    ldi     x4, 6               ;[46]
+common6:
+stuff7Delay:
+    ror     shift               ;[47] [55]
+    out     USBOUT, x1          ;[48] <--- set bit
+    brcc    doExor7             ;[49]
+    subi    x4, 1               ;[50]
+    brne    common7             ;[51]
+    lsl     shift               ;[52] compensate ror after rjmp stuffDelay
+    rjmp    stuff7Delay         ;[53] after ror, C bit is reliably clear
+doExor7:
+    eor     x1, x2              ;[51] [59]
+    ldi     x4, 6               ;[52]
+common7:
+    ld      shift, y+           ;[53]
+    tst     cnt                 ;[55]
+    out     USBOUT, x1          ;[56] <--- set bit
+    brne    txByteLoop          ;[57]
+
+;make SE0:
+    cbr     x1, USBMASK         ;[58] prepare SE0 [spec says EOP may be 15 to 18 cycles]
+    lds     x2, usbNewDeviceAddr;[59]
+    lsl     x2                  ;[61] we compare with left shifted address
+    subi    YL, 2 + 20          ;[62] Only assign address on data packets, not ACK/NAK in x3
+    sbci    YH, 0               ;[63]
+    out     USBOUT, x1          ;[00] <-- out SE0 -- from now 2 bits = 16 cycles until bus idle
+;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
+;set address only after data packet was sent, not after handshake
+    breq    skipAddrAssign      ;[01]
+    sts     usbDeviceAddr, x2   ; if not skipped: SE0 is one cycle longer
+skipAddrAssign:
+;end of usbDeviceAddress transfer
+    ldi     x2, 1<<USB_INTR_PENDING_BIT;[03] int0 occurred during TX -- clear pending flag
+    USB_STORE_PENDING(x2)       ;[04]
+    ori     x1, USBIDLE         ;[05]
+    in      x2, USBDDR          ;[06]
+    cbr     x2, USBMASK         ;[07] set both pins to input
+    mov     x3, x1              ;[08]
+    cbr     x3, USBMASK         ;[09] configure no pullup on both pins
+    pop     x4                  ;[10]
+    nop2                        ;[12]
+    nop2                        ;[14]
+    out     USBOUT, x1          ;[16] <-- out J (idle) -- end of SE0 (EOP signal)
+    out     USBDDR, x2          ;[17] <-- release bus now
+    out     USBOUT, x3          ;[18] <-- ensure no pull-up resistors are active
+    rjmp    doReturn
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm128.inc b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm128.inc
new file mode 100644
index 00000000..bcd6621c
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm128.inc
@@ -0,0 +1,750 @@
+/* Name: usbdrvasm128.inc
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2008-10-11
+ * Tabsize: 4
+ * Copyright: (c) 2008 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * This Revision: $Id: usbdrvasm128.inc 758 2009-08-06 10:12:54Z cs $
+ */
+
+/* Do not link this file! Link usbdrvasm.S instead, which includes the
+ * appropriate implementation!
+ */
+
+/*
+General Description:
+This file is the 12.8 MHz version of the USB driver. It is intended for use
+with the internal RC oscillator. Although 12.8 MHz is outside the guaranteed
+calibration range of the oscillator, almost all AVRs can reach this frequency.
+This version contains a phase locked loop in the receiver routine to cope with
+slight clock rate deviations of up to +/- 1%.
+
+See usbdrv.h for a description of the entire driver.
+
+LIMITATIONS
+===========
+Although it may seem very handy to save the crystal and use the internal
+RC oscillator of the CPU, this method (and this module) has some serious
+limitations:
+(1) The guaranteed calibration range of the oscillator is only 8.1 MHz.
+They typical range is 14.5 MHz and most AVRs can actually reach this rate.
+(2) Writing EEPROM and Flash may be unreliable (short data lifetime) since
+the write procedure is timed from the RC oscillator.
+(3) End Of Packet detection (SE0) should be in bit 1, bit it is only checked
+if bits 0 and 1 both read as 0 on D- and D+ read as 0 in the middle. This may
+cause problems with old hubs which delay SE0 by up to one cycle.
+(4) Code size is much larger than that of the other modules.
+
+Since almost all of this code is timing critical, don't change unless you
+really know what you are doing! Many parts require not only a maximum number
+of CPU cycles, but even an exact number of cycles!
+
+Implementation notes:
+======================
+min frequency: 67 cycles for 8 bit -> 12.5625 MHz
+max frequency: 69.286 cycles for 8 bit -> 12.99 MHz
+nominal frequency: 12.77 MHz ( = sqrt(min * max))
+
+sampling positions: (next even number in range [+/- 0.5])
+cycle index range: 0 ... 66
+bits:
+.5, 8.875, 17.25, 25.625, 34, 42.375, 50.75, 59.125
+[0/1], [9], [17], [25/+26], [34], [+42/43], [51], [59]
+
+bit number:     0   1   2   3   4   5   6   7
+spare cycles    1   2   1   2   1   1   1   0
+
+operations to perform:      duration cycle
+                            ----------------
+    eor     fix, shift          1 -> 00
+    andi    phase, USBMASK      1 -> 08
+    breq    se0                 1 -> 16 (moved to 11)
+    st      y+, data            2 -> 24, 25
+    mov     data, fix           1 -> 33
+    ser     data                1 -> 41
+    subi    cnt, 1              1 -> 49
+    brcs    overflow            1 -> 50
+
+layout of samples and operations:
+[##] = sample bit
+<##> = sample phase
+*##* = operation
+
+0:  *00* [01]  02   03   04  <05>  06   07
+1:  *08* [09]  10   11   12  <13>  14   15  *16*
+2:  [17]  18   19   20  <21>  22   23
+3:  *24* *25* [26]  27   28   29  <30>  31   32
+4:  *33* [34]  35   36   37  <38>  39   40
+5:  *41* [42]  43   44   45  <46>  47   48
+6:  *49* *50* [51]  52   53   54  <55>  56   57   58
+7:  [59]  60   61   62  <63>  64   65   66
+*****************************************************************************/
+
+/* we prefer positive expressions (do if condition) instead of negative
+ * (skip if condition), therefore use defines for skip instructions:
+ */
+#define ifioclr sbis
+#define ifioset sbic
+#define ifrclr  sbrs
+#define ifrset  sbrc
+
+/* The registers "fix" and "data" swap their meaning during the loop. Use
+ * defines to keep their name constant.
+ */
+#define fix     x2
+#define data    x1
+#undef phase        /* phase has a default definition to x4 */
+#define phase   x3
+
+
+USB_INTR_VECTOR:
+;order of registers pushed: YL, SREG [sofError], YH, shift, x1, x2, x3, cnt, r0
+    push    YL              ;2 push only what is necessary to sync with edge ASAP
+    in      YL, SREG        ;1
+    push    YL              ;2
+;----------------------------------------------------------------------------
+; Synchronize with sync pattern:
+;----------------------------------------------------------------------------
+;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
+;sync up with J to K edge during sync pattern -- use fastest possible loops
+;The first part waits at most 1 bit long since we must be in sync pattern.
+;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
+;waitForJ, ensure that this prerequisite is met.
+waitForJ:
+    inc     YL
+    sbis    USBIN, USBMINUS
+    brne    waitForJ        ; just make sure we have ANY timeout
+waitForK:
+;The following code results in a sampling window of 1/4 bit which meets the spec.
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS ;[0]
+    rjmp    foundK          ;[1]
+#if USB_COUNT_SOF
+    lds     YL, usbSofCount
+    inc     YL
+    sts     usbSofCount, YL
+#endif  /* USB_COUNT_SOF */
+#ifdef USB_SOF_HOOK
+    USB_SOF_HOOK
+#endif
+    rjmp    sofError
+
+foundK:
+;{3, 5} after falling D- edge, average delay: 4 cycles [we want 4 for center sampling]
+;we have 1 bit time for setup purposes, then sample again. Numbers in brackets
+;are cycles from center of first sync (double K) bit after the instruction
+    push    YH                  ;[2]
+    lds     YL, usbInputBufOffset;[4]
+    clr     YH                  ;[6]
+    subi    YL, lo8(-(usbRxBuf));[7]
+    sbci    YH, hi8(-(usbRxBuf));[8]
+
+    sbis    USBIN, USBMINUS     ;[9] we want two bits K [we want to sample at 8 + 4 - 1.5 = 10.5]
+    rjmp    haveTwoBitsK        ;[10]
+    pop     YH                  ;[11] undo the push from before
+    rjmp    waitForK            ;[13] this was not the end of sync, retry
+haveTwoBitsK:
+;----------------------------------------------------------------------------
+; push more registers and initialize values while we sample the first bits:
+;----------------------------------------------------------------------------
+#define fix     x2
+#define data    x1
+
+    push    shift               ;[12]
+    push    x1                  ;[14]
+    push    x2                  ;[16]
+    ldi     shift, 0x80         ;[18] prevent bit-unstuffing but init low bits to 0
+    ifioset USBIN, USBMINUS     ;[19] [01] <--- bit 0 [10.5 + 8 = 18.5]
+    ori     shift, 1<<0         ;[02]
+    push    x3                  ;[03]
+    push    cnt                 ;[05]
+    push    r0                  ;[07]
+    ifioset USBIN, USBMINUS     ;[09] <--- bit 1
+    ori     shift, 1<<1         ;[10]
+    ser     fix                 ;[11]
+    ldi     cnt, USB_BUFSIZE    ;[12]
+    mov     data, shift         ;[13]
+    lsl     shift               ;[14]
+    nop2                        ;[15]
+    ifioset USBIN, USBMINUS     ;[17] <--- bit 2
+    ori     data, 3<<2          ;[18] store in bit 2 AND bit 3
+    eor     shift, data         ;[19] do nrzi decoding
+    andi    data, 1<<3          ;[20]
+    in      phase, USBIN        ;[21] <- phase
+    brne    jumpToEntryAfterSet ;[22] if USBMINS at bit 3 was 1
+    nop                         ;[23]
+    rjmp    entryAfterClr       ;[24]
+jumpToEntryAfterSet:
+    rjmp    entryAfterSet       ;[24]
+
+;----------------------------------------------------------------------------
+; Receiver loop (numbers in brackets are cycles within byte after instr)
+;----------------------------------------------------------------------------
+#undef  fix
+#define  fix    x1
+#undef  data
+#define data    x2
+
+bit7IsSet:
+    ifrclr  phase, USBMINUS     ;[62] check phase only if D- changed
+    lpm                         ;[63]
+    in      phase, USBIN        ;[64] <- phase (one cycle too late)
+    ori     shift, 1 << 7       ;[65]
+    nop                         ;[66]
+;;;;rjmp    bit0AfterSet        ; -> [00] == [67] moved block up to save jump
+bit0AfterSet:
+    eor     fix, shift          ;[00]
+#undef  fix
+#define fix     x2
+#undef  data
+#define data    x1  /* we now have result in data, fix is reset to 0xff */
+    ifioclr USBIN, USBMINUS     ;[01] <--- sample 0
+    rjmp    bit0IsClr           ;[02]
+    andi    shift, ~(7 << 0)    ;[03]
+    breq    unstuff0s           ;[04]
+    in      phase, USBIN        ;[05] <- phase
+    rjmp    bit1AfterSet        ;[06]
+unstuff0s:
+    in      phase, USBIN        ;[06] <- phase (one cycle too late)
+    andi    fix, ~(1 << 0)      ;[07]
+    ifioclr USBIN, USBMINUS     ;[00]
+    ifioset USBIN, USBPLUS      ;[01]
+    rjmp    bit0IsClr           ;[02] executed if first expr false or second true
+se0AndStore:                    ; executed only if both bits 0
+    st      y+, x1              ;[15/17] cycles after start of byte
+    rjmp    se0                 ;[17/19]
+
+bit0IsClr:
+    ifrset  phase, USBMINUS     ;[04] check phase only if D- changed
+    lpm                         ;[05]
+    in      phase, USBIN        ;[06] <- phase (one cycle too late)
+    ori     shift, 1 << 0       ;[07]
+bit1AfterClr:
+    andi    phase, USBMASK      ;[08]
+    ifioset USBIN, USBMINUS     ;[09] <--- sample 1
+    rjmp    bit1IsSet           ;[10]
+    breq    se0AndStore         ;[11] if D- was 0 in bits 0 AND 1 and D+ was 0 in between, we have SE0
+    andi    shift, ~(7 << 1)    ;[12]
+    in      phase, USBIN        ;[13] <- phase
+    breq    unstuff1c           ;[14]
+    rjmp    bit2AfterClr        ;[15]
+unstuff1c:
+    andi    fix, ~(1 << 1)      ;[16]
+    nop2                        ;[08]
+    nop2                        ;[10]
+bit1IsSet:
+    ifrclr  phase, USBMINUS     ;[12] check phase only if D- changed
+    lpm                         ;[13]
+    in      phase, USBIN        ;[14] <- phase (one cycle too late)
+    ori     shift, 1 << 1       ;[15]
+    nop                         ;[16]
+bit2AfterSet:
+    ifioclr USBIN, USBMINUS     ;[17] <--- sample 2
+    rjmp    bit2IsClr           ;[18]
+    andi    shift, ~(7 << 2)    ;[19]
+    breq    unstuff2s           ;[20]
+    in      phase, USBIN        ;[21] <- phase
+    rjmp    bit3AfterSet        ;[22]
+unstuff2s:
+    in      phase, USBIN        ;[22] <- phase (one cycle too late)
+    andi    fix, ~(1 << 2)      ;[23]
+    nop2                        ;[16]
+    nop2                        ;[18]
+bit2IsClr:
+    ifrset  phase, USBMINUS     ;[20] check phase only if D- changed
+    lpm                         ;[21]
+    in      phase, USBIN        ;[22] <- phase (one cycle too late)
+    ori     shift, 1 << 2       ;[23]
+bit3AfterClr:
+    st      y+, data            ;[24]
+entryAfterClr:
+    ifioset USBIN, USBMINUS     ;[26] <--- sample 3
+    rjmp    bit3IsSet           ;[27]
+    andi    shift, ~(7 << 3)    ;[28]
+    breq    unstuff3c           ;[29]
+    in      phase, USBIN        ;[30] <- phase
+    rjmp    bit4AfterClr        ;[31]
+unstuff3c:
+    in      phase, USBIN        ;[31] <- phase (one cycle too late)
+    andi    fix, ~(1 << 3)      ;[32]
+    nop2                        ;[25]
+    nop2                        ;[27]
+bit3IsSet:
+    ifrclr  phase, USBMINUS     ;[29] check phase only if D- changed
+    lpm                         ;[30]
+    in      phase, USBIN        ;[31] <- phase (one cycle too late)
+    ori     shift, 1 << 3       ;[32]
+bit4AfterSet:
+    mov     data, fix           ;[33] undo this move by swapping defines
+#undef  fix
+#define fix     x1
+#undef  data
+#define data    x2
+    ifioclr USBIN, USBMINUS     ;[34] <--- sample 4
+    rjmp    bit4IsClr           ;[35]
+    andi    shift, ~(7 << 4)    ;[36]
+    breq    unstuff4s           ;[37]
+    in      phase, USBIN        ;[38] <- phase
+    rjmp    bit5AfterSet        ;[39]
+unstuff4s:
+    in      phase, USBIN        ;[39] <- phase (one cycle too late)
+    andi    fix, ~(1 << 4)      ;[40]
+    nop2                        ;[33]
+    nop2                        ;[35]
+bit4IsClr:
+    ifrset  phase, USBMINUS     ;[37] check phase only if D- changed
+    lpm                         ;[38]
+    in      phase, USBIN        ;[39] <- phase (one cycle too late)
+    ori     shift, 1 << 4       ;[40]
+bit5AfterClr:
+    ser     data                ;[41]
+    ifioset USBIN, USBMINUS     ;[42] <--- sample 5
+    rjmp    bit5IsSet           ;[43]
+    andi    shift, ~(7 << 5)    ;[44]
+    breq    unstuff5c           ;[45]
+    in      phase, USBIN        ;[46] <- phase
+    rjmp    bit6AfterClr        ;[47]
+unstuff5c:
+    in      phase, USBIN        ;[47] <- phase (one cycle too late)
+    andi    fix, ~(1 << 5)      ;[48]
+    nop2                        ;[41]
+    nop2                        ;[43]
+bit5IsSet:
+    ifrclr  phase, USBMINUS     ;[45] check phase only if D- changed
+    lpm                         ;[46]
+    in      phase, USBIN        ;[47] <- phase (one cycle too late)
+    ori     shift, 1 << 5       ;[48]
+bit6AfterSet:
+    subi    cnt, 1              ;[49]
+    brcs    jumpToOverflow      ;[50]
+    ifioclr USBIN, USBMINUS     ;[51] <--- sample 6
+    rjmp    bit6IsClr           ;[52]
+    andi    shift, ~(3 << 6)    ;[53]
+    cpi     shift, 2            ;[54]
+    in      phase, USBIN        ;[55] <- phase
+    brlt    unstuff6s           ;[56]
+    rjmp    bit7AfterSet        ;[57]
+
+jumpToOverflow:
+    rjmp    overflow
+
+unstuff6s:
+    andi    fix, ~(1 << 6)      ;[50]
+    lpm                         ;[51]
+bit6IsClr:
+    ifrset  phase, USBMINUS     ;[54] check phase only if D- changed
+    lpm                         ;[55]
+    in      phase, USBIN        ;[56] <- phase (one cycle too late)
+    ori     shift, 1 << 6       ;[57]
+    nop                         ;[58]
+bit7AfterClr:
+    ifioset USBIN, USBMINUS     ;[59] <--- sample 7
+    rjmp    bit7IsSet           ;[60]
+    andi    shift, ~(1 << 7)    ;[61]
+    cpi     shift, 4            ;[62]
+    in      phase, USBIN        ;[63] <- phase
+    brlt    unstuff7c           ;[64]
+    rjmp    bit0AfterClr        ;[65] -> [00] == [67]
+unstuff7c:
+    andi    fix, ~(1 << 7)      ;[58]
+    nop                         ;[59]
+    rjmp    bit7IsSet           ;[60]
+
+bit7IsClr:
+    ifrset  phase, USBMINUS     ;[62] check phase only if D- changed
+    lpm                         ;[63]
+    in      phase, USBIN        ;[64] <- phase (one cycle too late)
+    ori     shift, 1 << 7       ;[65]
+    nop                         ;[66]
+;;;;rjmp    bit0AfterClr        ; -> [00] == [67] moved block up to save jump
+bit0AfterClr:
+    eor     fix, shift          ;[00]
+#undef  fix
+#define fix     x2
+#undef  data
+#define data    x1  /* we now have result in data, fix is reset to 0xff */
+    ifioset USBIN, USBMINUS     ;[01] <--- sample 0
+    rjmp    bit0IsSet           ;[02]
+    andi    shift, ~(7 << 0)    ;[03]
+    breq    unstuff0c           ;[04]
+    in      phase, USBIN        ;[05] <- phase
+    rjmp    bit1AfterClr        ;[06]
+unstuff0c:
+    in      phase, USBIN        ;[06] <- phase (one cycle too late)
+    andi    fix, ~(1 << 0)      ;[07]
+    ifioclr USBIN, USBMINUS     ;[00]
+    ifioset USBIN, USBPLUS      ;[01]
+    rjmp    bit0IsSet           ;[02] executed if first expr false or second true
+    rjmp    se0AndStore         ;[03] executed only if both bits 0
+bit0IsSet:
+    ifrclr  phase, USBMINUS     ;[04] check phase only if D- changed
+    lpm                         ;[05]
+    in      phase, USBIN        ;[06] <- phase (one cycle too late)
+    ori     shift, 1 << 0       ;[07]
+bit1AfterSet:
+    andi    shift, ~(7 << 1)    ;[08] compensated by "ori shift, 1<<1" if bit1IsClr
+    ifioclr USBIN, USBMINUS     ;[09] <--- sample 1
+    rjmp    bit1IsClr           ;[10]
+    breq    unstuff1s           ;[11]
+    nop2                        ;[12] do not check for SE0 if bit 0 was 1
+    in      phase, USBIN        ;[14] <- phase (one cycle too late)
+    rjmp    bit2AfterSet        ;[15]
+unstuff1s:
+    in      phase, USBIN        ;[13] <- phase
+    andi    fix, ~(1 << 1)      ;[14]
+    lpm                         ;[07]
+    nop2                        ;[10]
+bit1IsClr:
+    ifrset  phase, USBMINUS     ;[12] check phase only if D- changed
+    lpm                         ;[13]
+    in      phase, USBIN        ;[14] <- phase (one cycle too late)
+    ori     shift, 1 << 1       ;[15]
+    nop                         ;[16]
+bit2AfterClr:
+    ifioset USBIN, USBMINUS     ;[17] <--- sample 2
+    rjmp    bit2IsSet           ;[18]
+    andi    shift, ~(7 << 2)    ;[19]
+    breq    unstuff2c           ;[20]
+    in      phase, USBIN        ;[21] <- phase
+    rjmp    bit3AfterClr        ;[22]
+unstuff2c:
+    in      phase, USBIN        ;[22] <- phase (one cycle too late)
+    andi    fix, ~(1 << 2)      ;[23]
+    nop2                        ;[16]
+    nop2                        ;[18]
+bit2IsSet:
+    ifrclr  phase, USBMINUS     ;[20] check phase only if D- changed
+    lpm                         ;[21]
+    in      phase, USBIN        ;[22] <- phase (one cycle too late)
+    ori     shift, 1 << 2       ;[23]
+bit3AfterSet:
+    st      y+, data            ;[24]
+entryAfterSet:
+    ifioclr USBIN, USBMINUS     ;[26] <--- sample 3
+    rjmp    bit3IsClr           ;[27]
+    andi    shift, ~(7 << 3)    ;[28]
+    breq    unstuff3s           ;[29]
+    in      phase, USBIN        ;[30] <- phase
+    rjmp    bit4AfterSet        ;[31]
+unstuff3s:
+    in      phase, USBIN        ;[31] <- phase (one cycle too late)
+    andi    fix, ~(1 << 3)      ;[32]
+    nop2                        ;[25]
+    nop2                        ;[27]
+bit3IsClr:
+    ifrset  phase, USBMINUS     ;[29] check phase only if D- changed
+    lpm                         ;[30]
+    in      phase, USBIN        ;[31] <- phase (one cycle too late)
+    ori     shift, 1 << 3       ;[32]
+bit4AfterClr:
+    mov     data, fix           ;[33] undo this move by swapping defines
+#undef  fix
+#define fix     x1
+#undef  data
+#define data    x2
+    ifioset USBIN, USBMINUS     ;[34] <--- sample 4
+    rjmp    bit4IsSet           ;[35]
+    andi    shift, ~(7 << 4)    ;[36]
+    breq    unstuff4c           ;[37]
+    in      phase, USBIN        ;[38] <- phase
+    rjmp    bit5AfterClr        ;[39]
+unstuff4c:
+    in      phase, USBIN        ;[39] <- phase (one cycle too late)
+    andi    fix, ~(1 << 4)      ;[40]
+    nop2                        ;[33]
+    nop2                        ;[35]
+bit4IsSet:
+    ifrclr  phase, USBMINUS     ;[37] check phase only if D- changed
+    lpm                         ;[38]
+    in      phase, USBIN        ;[39] <- phase (one cycle too late)
+    ori     shift, 1 << 4       ;[40]
+bit5AfterSet:
+    ser     data                ;[41]
+    ifioclr USBIN, USBMINUS     ;[42] <--- sample 5
+    rjmp    bit5IsClr           ;[43]
+    andi    shift, ~(7 << 5)    ;[44]
+    breq    unstuff5s           ;[45]
+    in      phase, USBIN        ;[46] <- phase
+    rjmp    bit6AfterSet        ;[47]
+unstuff5s:
+    in      phase, USBIN        ;[47] <- phase (one cycle too late)
+    andi    fix, ~(1 << 5)      ;[48]
+    nop2                        ;[41]
+    nop2                        ;[43]
+bit5IsClr:
+    ifrset  phase, USBMINUS     ;[45] check phase only if D- changed
+    lpm                         ;[46]
+    in      phase, USBIN        ;[47] <- phase (one cycle too late)
+    ori     shift, 1 << 5       ;[48]
+bit6AfterClr:
+    subi    cnt, 1              ;[49]
+    brcs    overflow            ;[50]
+    ifioset USBIN, USBMINUS     ;[51] <--- sample 6
+    rjmp    bit6IsSet           ;[52]
+    andi    shift, ~(3 << 6)    ;[53]
+    cpi     shift, 2            ;[54]
+    in      phase, USBIN        ;[55] <- phase
+    brlt    unstuff6c           ;[56]
+    rjmp    bit7AfterClr        ;[57]
+unstuff6c:
+    andi    fix, ~(1 << 6)      ;[50]
+    lpm                         ;[51]
+bit6IsSet:
+    ifrclr  phase, USBMINUS     ;[54] check phase only if D- changed
+    lpm                         ;[55]
+    in      phase, USBIN        ;[56] <- phase (one cycle too late)
+    ori     shift, 1 << 6       ;[57]
+bit7AfterSet:
+    ifioclr USBIN, USBMINUS     ;[59] <--- sample 7
+    rjmp    bit7IsClr           ;[60]
+    andi    shift, ~(1 << 7)    ;[61]
+    cpi     shift, 4            ;[62]
+    in      phase, USBIN        ;[63] <- phase
+    brlt    unstuff7s           ;[64]
+    rjmp    bit0AfterSet        ;[65] -> [00] == [67]
+unstuff7s:
+    andi    fix, ~(1 << 7)      ;[58]
+    nop                         ;[59]
+    rjmp    bit7IsClr           ;[60]
+
+macro POP_STANDARD ; 14 cycles
+    pop     r0
+    pop     cnt
+    pop     x3
+    pop     x2
+    pop     x1
+    pop     shift
+    pop     YH
+    endm
+macro POP_RETI     ; 5 cycles
+    pop     YL
+    out     SREG, YL
+    pop     YL
+    endm
+
+#include "asmcommon.inc"
+
+;----------------------------------------------------------------------------
+; Transmitting data
+;----------------------------------------------------------------------------
+
+txByteLoop:
+txBitloop:
+stuffN1Delay:                   ;     [03]
+    ror     shift               ;[-5] [11] [63]
+    brcc    doExorN1            ;[-4]      [64]
+    subi    x3, 1               ;[-3]
+    brne    commonN1            ;[-2]
+    lsl     shift               ;[-1] compensate ror after rjmp stuffDelay
+    nop                         ;[00] stuffing consists of just waiting 8 cycles
+    rjmp    stuffN1Delay        ;[01] after ror, C bit is reliably clear
+
+sendNakAndReti:
+    ldi     cnt, USBPID_NAK ;[-19]
+    rjmp    sendCntAndReti  ;[-18]
+sendAckAndReti:
+    ldi     cnt, USBPID_ACK ;[-17]
+sendCntAndReti:
+    mov     r0, cnt         ;[-16]
+    ldi     YL, 0           ;[-15] R0 address is 0
+    ldi     YH, 0           ;[-14]
+    ldi     cnt, 2          ;[-13]
+;   rjmp    usbSendAndReti      fallthrough
+
+; USB spec says:
+; idle = J
+; J = (D+ = 0), (D- = 1) or USBOUT = 0x01
+; K = (D+ = 1), (D- = 0) or USBOUT = 0x02
+; Spec allows 7.5 bit times from EOP to SOP for replies (= 60 cycles)
+
+;usbSend:
+;pointer to data in 'Y'
+;number of bytes in 'cnt' -- including sync byte
+;uses: x1...x3, shift, cnt, Y [x1 = mirror USBOUT, x2 = USBMASK, x3 = bitstuff cnt]
+;Numbers in brackets are time since first bit of sync pattern is sent (start of instruction)
+usbSendAndReti:
+    in      x2, USBDDR          ;[-10] 10 cycles until SOP
+    ori     x2, USBMASK         ;[-9]
+    sbi     USBOUT, USBMINUS    ;[-8] prepare idle state; D+ and D- must have been 0 (no pullups)
+    out     USBDDR, x2          ;[-6] <--- acquire bus
+    in      x1, USBOUT          ;[-5] port mirror for tx loop
+    ldi     shift, 0x40         ;[-4] sync byte is first byte sent (we enter loop after ror)
+    ldi     x2, USBMASK         ;[-3]
+doExorN1:
+    eor     x1, x2              ;[-2] [06] [62]
+    ldi     x3, 6               ;[-1] [07] [63]
+commonN1:
+stuffN2Delay:
+    out     USBOUT, x1          ;[00] [08] [64] <--- set bit
+    ror     shift               ;[01]
+    brcc    doExorN2            ;[02]
+    subi    x3, 1               ;[03]
+    brne    commonN2            ;[04]
+    lsl     shift               ;[05] compensate ror after rjmp stuffDelay
+    rjmp    stuffN2Delay        ;[06] after ror, C bit is reliably clear
+doExorN2:
+    eor     x1, x2              ;[04] [12]
+    ldi     x3, 6               ;[05] [13]
+commonN2:
+    nop2                        ;[06] [14]
+    subi    cnt, 171            ;[08] [16] trick: (3 * 171) & 0xff = 1
+    out     USBOUT, x1          ;[09] [17] <--- set bit
+    brcs    txBitloop           ;[10]      [27] [44]
+
+stuff6Delay:
+    ror     shift               ;[45] [53]
+    brcc    doExor6             ;[46]
+    subi    x3, 1               ;[47]
+    brne    common6             ;[48]
+    lsl     shift               ;[49] compensate ror after rjmp stuffDelay
+    nop                         ;[50] stuffing consists of just waiting 8 cycles
+    rjmp    stuff6Delay         ;[51] after ror, C bit is reliably clear
+doExor6:
+    eor     x1, x2              ;[48] [56]
+    ldi     x3, 6               ;[49]
+common6:
+stuff7Delay:
+    ror     shift               ;[50] [58]
+    out     USBOUT, x1          ;[51] <--- set bit
+    brcc    doExor7             ;[52]
+    subi    x3, 1               ;[53]
+    brne    common7             ;[54]
+    lsl     shift               ;[55] compensate ror after rjmp stuffDelay
+    rjmp    stuff7Delay         ;[56] after ror, C bit is reliably clear
+doExor7:
+    eor     x1, x2              ;[54] [62]
+    ldi     x3, 6               ;[55]
+common7:
+    ld      shift, y+           ;[56]
+    nop                         ;[58]
+    tst     cnt                 ;[59]
+    out     USBOUT, x1          ;[60] [00]<--- set bit
+    brne    txByteLoop          ;[61] [01]
+;make SE0:
+    cbr     x1, USBMASK         ;[02] prepare SE0 [spec says EOP may be 15 to 18 cycles]
+    lds     x2, usbNewDeviceAddr;[03]
+    lsl     x2                  ;[05] we compare with left shifted address
+    subi    YL, 2 + 0           ;[06] Only assign address on data packets, not ACK/NAK in r0
+    sbci    YH, 0               ;[07]
+    out     USBOUT, x1          ;[00] <-- out SE0 -- from now 2 bits = 16 cycles until bus idle
+;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
+;set address only after data packet was sent, not after handshake
+    breq    skipAddrAssign      ;[01]
+    sts     usbDeviceAddr, x2   ; if not skipped: SE0 is one cycle longer
+skipAddrAssign:
+;end of usbDeviceAddress transfer
+    ldi     x2, 1<<USB_INTR_PENDING_BIT;[03] int0 occurred during TX -- clear pending flag
+    USB_STORE_PENDING(x2)       ;[04]
+    ori     x1, USBIDLE         ;[05]
+    in      x2, USBDDR          ;[06]
+    cbr     x2, USBMASK         ;[07] set both pins to input
+    mov     x3, x1              ;[08]
+    cbr     x3, USBMASK         ;[09] configure no pullup on both pins
+    lpm                         ;[10]
+    lpm                         ;[13]
+    out     USBOUT, x1          ;[16] <-- out J (idle) -- end of SE0 (EOP signal)
+    out     USBDDR, x2          ;[17] <-- release bus now
+    out     USBOUT, x3          ;[18] <-- ensure no pull-up resistors are active
+    rjmp    doReturn
+
+
+
+/*****************************************************************************
+The following PHP script generates a code skeleton for the receiver routine:
+
+<?php
+
+function printCmdBuffer($thisBit)
+{
+global $cycle;
+
+    $nextBit = ($thisBit + 1) % 8;
+    $s = ob_get_contents();
+    ob_end_clean();
+    $s = str_replace("#", $thisBit, $s);
+    $s = str_replace("@", $nextBit, $s);
+    $lines = explode("\n", $s);
+    for($i = 0; $i < count($lines); $i++){
+        $s = $lines[$i];
+        if(ereg("\\[([0-9-][0-9])\\]", $s, $regs)){
+            $c = $cycle + (int)$regs[1];
+            $s = ereg_replace("\\[[0-9-][0-9]\\]", sprintf("[%02d]", $c), $s);
+        }
+        if(strlen($s) > 0)
+            echo "$s\n";
+    }
+}
+
+function printBit($isAfterSet, $bitNum)
+{
+    ob_start();
+    if($isAfterSet){
+?>
+    ifioclr USBIN, USBMINUS     ;[00] <--- sample
+    rjmp    bit#IsClr           ;[01]
+    andi    shift, ~(7 << #)    ;[02]
+    breq    unstuff#s           ;[03]
+    in      phase, USBIN        ;[04] <- phase
+    rjmp    bit@AfterSet        ;[05]
+unstuff#s:
+    in      phase, USBIN        ;[05] <- phase (one cycle too late)
+    andi    fix, ~(1 << #)      ;[06]
+    nop2                        ;[-1]
+    nop2                        ;[01]
+bit#IsClr:
+    ifrset  phase, USBMINUS     ;[03] check phase only if D- changed
+    lpm                         ;[04]
+    in      phase, USBIN        ;[05] <- phase (one cycle too late)
+    ori     shift, 1 << #       ;[06]
+<?php
+    }else{
+?>
+    ifioset USBIN, USBMINUS     ;[00] <--- sample
+    rjmp    bit#IsSet           ;[01]
+    andi    shift, ~(7 << #)    ;[02]
+    breq    unstuff#c           ;[03]
+    in      phase, USBIN        ;[04] <- phase
+    rjmp    bit@AfterClr        ;[05]
+unstuff#c:
+    in      phase, USBIN        ;[05] <- phase (one cycle too late)
+    andi    fix, ~(1 << #)      ;[06]
+    nop2                        ;[-1]
+    nop2                        ;[01]
+bit#IsSet:
+    ifrclr  phase, USBMINUS     ;[03] check phase only if D- changed
+    lpm                         ;[04]
+    in      phase, USBIN        ;[05] <- phase (one cycle too late)
+    ori     shift, 1 << #       ;[06]
+<?php
+    }
+    printCmdBuffer($bitNum);
+}
+
+$bitStartCycles = array(1, 9, 17, 26, 34, 42, 51, 59);
+for($i = 0; $i < 16; $i++){
+    $bit = $i % 8;
+    $emitClrCode = ($i + (int)($i / 8)) % 2;
+    $cycle = $bitStartCycles[$bit];
+    if($emitClrCode){
+        printf("bit%dAfterClr:\n", $bit);
+    }else{
+        printf("bit%dAfterSet:\n", $bit);
+    }
+    ob_start();
+    echo "    *****                       ;[-1]\n";
+    printCmdBuffer($bit);
+    printBit(!$emitClrCode, $bit);
+    if($i == 7)
+        echo "\n";
+}
+
+?>
+*****************************************************************************/
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm15.inc b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm15.inc
new file mode 100644
index 00000000..401b7f8f
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm15.inc
@@ -0,0 +1,423 @@
+/* Name: usbdrvasm15.inc
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: contributed by V. Bosch
+ * Creation Date: 2007-08-06
+ * Tabsize: 4
+ * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * Revision: $Id: usbdrvasm15.inc 740 2009-04-13 18:23:31Z cs $
+ */
+
+/* Do not link this file! Link usbdrvasm.S instead, which includes the
+ * appropriate implementation!
+ */
+
+/*
+General Description:
+This file is the 15 MHz version of the asssembler part of the USB driver. It
+requires a 15 MHz crystal (not a ceramic resonator and not a calibrated RC
+oscillator).
+
+See usbdrv.h for a description of the entire driver.
+
+Since almost all of this code is timing critical, don't change unless you
+really know what you are doing! Many parts require not only a maximum number
+of CPU cycles, but even an exact number of cycles!
+*/
+
+;max stack usage: [ret(2), YL, SREG, YH, bitcnt, shift, x1, x2, x3, x4, cnt] = 12 bytes
+;nominal frequency: 15 MHz -> 10.0 cycles per bit, 80.0 cycles per byte
+; Numbers in brackets are clocks counted from center of last sync bit
+; when instruction starts
+
+;----------------------------------------------------------------------------
+; order of registers pushed: 
+;	YL, SREG [sofError] YH, shift, x1, x2, x3, bitcnt, cnt, x4
+;----------------------------------------------------------------------------
+USB_INTR_VECTOR:              
+    push    YL                   ;2 	push only what is necessary to sync with edge ASAP
+    in      YL, SREG             ;1 
+    push    YL                   ;2 
+;----------------------------------------------------------------------------
+; Synchronize with sync pattern:
+;
+;   sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
+;   sync up with J to K edge during sync pattern -- use fastest possible loops
+;The first part waits at most 1 bit long since we must be in sync pattern.
+;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
+;waitForJ, ensure that this prerequisite is met.
+waitForJ:
+    inc     YL
+    sbis    USBIN, USBMINUS
+    brne    waitForJ        ; just make sure we have ANY timeout
+;-------------------------------------------------------------------------------
+; The following code results in a sampling window of < 1/4 bit 
+;	which meets the spec.
+;-------------------------------------------------------------------------------
+waitForK:			 ;- 
+    sbis    USBIN, USBMINUS      ;1 [00] <-- sample
+    rjmp    foundK               ;2 [01]
+    sbis    USBIN, USBMINUS	 ;	 <-- sample
+    rjmp    foundK
+    sbis    USBIN, USBMINUS	 ;	 <-- sample
+    rjmp    foundK
+    sbis    USBIN, USBMINUS	 ;	 <-- sample
+    rjmp    foundK
+    sbis    USBIN, USBMINUS	 ;	 <-- sample
+    rjmp    foundK
+    sbis    USBIN, USBMINUS	 ;	 <-- sample
+    rjmp    foundK
+#if USB_COUNT_SOF
+    lds     YL, usbSofCount
+    inc     YL
+    sts     usbSofCount, YL
+#endif  /* USB_COUNT_SOF */
+#ifdef USB_SOF_HOOK
+    USB_SOF_HOOK
+#endif
+    rjmp    sofError
+;------------------------------------------------------------------------------
+; {3, 5} after falling D- edge, average delay: 4 cycles [we want 5 for 
+;	center sampling] 
+; 	we have 1 bit time for setup purposes, then sample again. 
+;	Numbers in brackets are cycles from center of first sync (double K) 
+;	bit after the instruction
+;------------------------------------------------------------------------------
+foundK:                          ;- [02]
+    lds     YL, usbInputBufOffset;2 [03+04]	tx loop
+    push    YH                   ;2 [05+06]
+    clr     YH                   ;1 [07]
+    subi    YL, lo8(-(usbRxBuf)) ;1 [08] 	[rx loop init]
+    sbci    YH, hi8(-(usbRxBuf)) ;1 [09] 	[rx loop init]
+    push    shift                ;2 [10+11]
+    ser	    shift		 ;1 [12]
+    sbis    USBIN, USBMINUS      ;1 [-1] [13] <--sample:we want two bits K (sample 1 cycle too early)
+    rjmp    haveTwoBitsK         ;2 [00] [14]
+    pop     shift                ;2 	 [15+16] undo the push from before
+    pop     YH 			 ;2 	 [17+18] undo the push from before
+    rjmp    waitForK             ;2 	 [19+20] this was not the end of sync, retry
+; The entire loop from waitForK until rjmp waitForK above must not exceed two
+; bit times (= 20 cycles).
+
+;----------------------------------------------------------------------------
+; push more registers and initialize values while we sample the first bits:
+;----------------------------------------------------------------------------
+haveTwoBitsK:			;- [01]
+    push    x1              	;2 [02+03]
+    push    x2              	;2 [04+05]
+    push    x3              	;2 [06+07]
+    push    bitcnt              ;2 [08+09]	
+    in      x1, USBIN       	;1 [00] [10] <-- sample bit 0
+    bst     x1, USBMINUS    	;1 [01]
+    bld     shift, 0        	;1 [02]
+    push    cnt             	;2 [03+04]
+    ldi     cnt, USB_BUFSIZE	;1 [05] 
+    push    x4              	;2 [06+07] tx loop
+    rjmp    rxLoop          	;2 [08]
+;----------------------------------------------------------------------------
+; Receiver loop (numbers in brackets are cycles within byte after instr)
+;----------------------------------------------------------------------------
+unstuff0:               	;- [07] (branch taken)
+    andi    x3, ~0x01   	;1 [08]
+    mov     x1, x2      	;1 [09] x2 contains last sampled (stuffed) bit
+    in      x2, USBIN   	;1 [00] [10] <-- sample bit 1 again
+    andi    x2, USBMASK 	;1 [01]
+    breq    se0Hop         	;1 [02] SE0 check for bit 1 
+    ori     shift, 0x01 	;1 [03] 0b00000001
+    nop				;1 [04]
+    rjmp    didUnstuff0 	;2 [05]
+;-----------------------------------------------------
+unstuff1:               	;- [05] (branch taken)
+    mov     x2, x1      	;1 [06] x1 contains last sampled (stuffed) bit
+    andi    x3, ~0x02   	;1 [07]
+    ori     shift, 0x02 	;1 [08] 0b00000010
+    nop                 	;1 [09]
+    in      x1, USBIN   	;1 [00] [10] <-- sample bit 2 again
+    andi    x1, USBMASK 	;1 [01]
+    breq    se0Hop         	;1 [02] SE0 check for bit 2 
+    rjmp    didUnstuff1 	;2 [03]
+;-----------------------------------------------------
+unstuff2:               	;- [05] (branch taken)
+    andi    x3, ~0x04   	;1 [06]
+    ori     shift, 0x04 	;1 [07] 0b00000100
+    mov     x1, x2      	;1 [08] x2 contains last sampled (stuffed) bit
+    nop                 	;1 [09]
+    in      x2, USBIN   	;1 [00] [10] <-- sample bit 3
+    andi    x2, USBMASK 	;1 [01]
+    breq    se0Hop         	;1 [02] SE0 check for bit 3 
+    rjmp    didUnstuff2 	;2 [03]
+;-----------------------------------------------------
+unstuff3:               	;- [00] [10]  (branch taken)
+    in      x2, USBIN   	;1 [01] [11] <-- sample stuffed bit 3 one cycle too late
+    andi    x2, USBMASK 	;1 [02]
+    breq    se0Hop         	;1 [03] SE0 check for stuffed bit 3 
+    andi    x3, ~0x08   	;1 [04]
+    ori     shift, 0x08 	;1 [05] 0b00001000
+    rjmp    didUnstuff3 	;2 [06]
+;----------------------------------------------------------------------------
+; extra jobs done during bit interval:
+;
+; bit 0:    store, clear [SE0 is unreliable here due to bit dribbling in hubs], 
+; 		overflow check, jump to the head of rxLoop
+; bit 1:    SE0 check
+; bit 2:    SE0 check, recovery from delay [bit 0 tasks took too long]
+; bit 3:    SE0 check, recovery from delay [bit 0 tasks took too long]
+; bit 4:    SE0 check, none
+; bit 5:    SE0 check, none
+; bit 6:    SE0 check, none
+; bit 7:    SE0 check, reconstruct: x3 is 0 at bit locations we changed, 1 at others
+;----------------------------------------------------------------------------
+rxLoop:				;- [09]
+    in      x2, USBIN   	;1 [00] [10] <-- sample bit 1 (or possibly bit 0 stuffed)
+    andi    x2, USBMASK 	;1 [01]
+    brne    SkipSe0Hop		;1 [02]
+se0Hop:				;- [02]
+    rjmp    se0         	;2 [03] SE0 check for bit 1 
+SkipSe0Hop:			;- [03]
+    ser     x3          	;1 [04]
+    andi    shift, 0xf9 	;1 [05] 0b11111001
+    breq    unstuff0    	;1 [06]
+didUnstuff0:			;- [06]
+    eor     x1, x2      	;1 [07]
+    bst     x1, USBMINUS	;1 [08]
+    bld     shift, 1    	;1 [09] 
+    in      x1, USBIN   	;1 [00] [10] <-- sample bit 2 (or possibly bit 1 stuffed)
+    andi    x1, USBMASK 	;1 [01]
+    breq    se0Hop         	;1 [02] SE0 check for bit 2 
+    andi    shift, 0xf3 	;1 [03] 0b11110011
+    breq    unstuff1    	;1 [04] do remaining work for bit 1
+didUnstuff1:			;- [04]
+    eor     x2, x1      	;1 [05]
+    bst     x2, USBMINUS	;1 [06]
+    bld     shift, 2    	;1 [07]
+    nop2			;2 [08+09]
+    in      x2, USBIN   	;1 [00] [10] <-- sample bit 3 (or possibly bit 2 stuffed)
+    andi    x2, USBMASK 	;1 [01]
+    breq    se0Hop         	;1 [02] SE0 check for bit 3 
+    andi    shift, 0xe7 	;1 [03] 0b11100111
+    breq    unstuff2    	;1 [04]
+didUnstuff2:			;- [04]
+    eor     x1, x2      	;1 [05]
+    bst     x1, USBMINUS	;1 [06]
+    bld     shift, 3    	;1 [07]
+didUnstuff3:			;- [07]
+    andi    shift, 0xcf 	;1 [08] 0b11001111
+    breq    unstuff3    	;1 [09]
+    in      x1, USBIN   	;1 [00] [10] <-- sample bit 4
+    andi    x1, USBMASK 	;1 [01]
+    breq    se0Hop         	;1 [02] SE0 check for bit 4
+    eor     x2, x1      	;1 [03]
+    bst     x2, USBMINUS	;1 [04]
+    bld     shift, 4    	;1 [05]
+didUnstuff4:			;- [05]
+    andi    shift, 0x9f 	;1 [06] 0b10011111
+    breq    unstuff4    	;1 [07]
+    nop2			;2 [08+09]
+    in      x2, USBIN   	;1 [00] [10] <-- sample bit 5
+    andi    x2, USBMASK 	;1 [01]
+    breq    se0         	;1 [02] SE0 check for bit 5
+    eor     x1, x2      	;1 [03]
+    bst     x1, USBMINUS	;1 [04]
+    bld     shift, 5    	;1 [05]
+didUnstuff5:			;- [05]
+    andi    shift, 0x3f 	;1 [06] 0b00111111
+    breq    unstuff5    	;1 [07]
+    nop2			;2 [08+09]
+    in      x1, USBIN   	;1 [00] [10] <-- sample bit 6
+    andi    x1, USBMASK 	;1 [01]
+    breq    se0         	;1 [02] SE0 check for bit 6
+    eor     x2, x1      	;1 [03]
+    bst     x2, USBMINUS	;1 [04]
+    bld     shift, 6   	 	;1 [05]
+didUnstuff6:			;- [05]
+    cpi     shift, 0x02 	;1 [06] 0b00000010
+    brlo    unstuff6    	;1 [07]
+    nop2			;2 [08+09]
+    in      x2, USBIN   	;1 [00] [10] <-- sample bit 7
+    andi    x2, USBMASK 	;1 [01]
+    breq    se0         	;1 [02] SE0 check for bit 7
+    eor     x1, x2      	;1 [03]
+    bst     x1, USBMINUS	;1 [04]
+    bld     shift, 7    	;1 [05]
+didUnstuff7:			;- [05] 
+    cpi     shift, 0x04 	;1 [06] 0b00000100
+    brlo    unstuff7		;1 [07]
+    eor     x3, shift   	;1 [08] reconstruct: x3 is 0 at bit locations we changed, 1 at others
+    nop				;1 [09]
+    in      x1, USBIN   	;1 [00]	[10] <-- sample bit 0
+    st      y+, x3      	;2 [01+02] store data
+    eor     x2, x1      	;1 [03]
+    bst     x2, USBMINUS	;1 [04]
+    bld     shift, 0    	;1 [05]
+    subi    cnt, 1		;1 [06]
+    brcs    overflow	;1 [07]
+    rjmp    rxLoop		;2 [08]
+;-----------------------------------------------------
+unstuff4:               	;- [08] 
+    andi    x3, ~0x10   	;1 [09]
+    in      x1, USBIN   	;1 [00] [10] <-- sample stuffed bit 4
+    andi    x1, USBMASK 	;1 [01]
+    breq    se0         	;1 [02] SE0 check for stuffed bit 4
+    ori     shift, 0x10 	;1 [03]
+    rjmp    didUnstuff4 	;2 [04]
+;-----------------------------------------------------
+unstuff5:               	;- [08] 
+    ori     shift, 0x20 	;1 [09]
+    in      x2, USBIN   	;1 [00] [10] <-- sample stuffed bit 5
+    andi    x2, USBMASK 	;1 [01]
+    breq    se0         	;1 [02] SE0 check for stuffed bit 5
+    andi    x3, ~0x20   	;1 [03]
+    rjmp    didUnstuff5		;2 [04]
+;-----------------------------------------------------
+unstuff6:               	;- [08] 
+    andi    x3, ~0x40   	;1 [09]
+    in      x1, USBIN   	;1 [00] [10] <-- sample stuffed bit 6
+    andi    x1, USBMASK 	;1 [01]
+    breq    se0         	;1 [02] SE0 check for stuffed bit 6
+    ori     shift, 0x40 	;1 [03]
+    rjmp    didUnstuff6 	;2 [04]
+;-----------------------------------------------------
+unstuff7:			;- [08]
+    andi    x3, ~0x80   	;1 [09]
+    in      x2, USBIN   	;1 [00] [10] <-- sample stuffed bit 7
+    andi    x2, USBMASK 	;1 [01]
+    breq    se0         	;1 [02] SE0 check for stuffed bit 7
+    ori     shift, 0x80 	;1 [03]
+    rjmp    didUnstuff7 	;2 [04]
+    
+macro POP_STANDARD ; 16 cycles
+    pop     x4    
+    pop     cnt
+    pop     bitcnt
+    pop     x3
+    pop     x2
+    pop     x1
+    pop     shift
+    pop     YH
+    endm
+macro POP_RETI     ; 5 cycles
+    pop     YL
+    out     SREG, YL
+    pop     YL
+    endm
+
+#include "asmcommon.inc"
+
+;---------------------------------------------------------------------------
+; USB spec says:
+; idle = J
+; J = (D+ = 0), (D- = 1)
+; K = (D+ = 1), (D- = 0)
+; Spec allows 7.5 bit times from EOP to SOP for replies
+;---------------------------------------------------------------------------
+bitstuffN:		    	;- [04]
+    eor     x1, x4          	;1 [05]
+    clr	    x2			;1 [06]
+    nop				;1 [07]
+    rjmp    didStuffN       	;1 [08]
+;---------------------------------------------------------------------------    
+bitstuff6:		    	;- [04]
+    eor     x1, x4          	;1 [05]
+    clr	    x2			;1 [06]
+    rjmp    didStuff6       	;1 [07]
+;---------------------------------------------------------------------------
+bitstuff7:		    	;- [02]
+    eor     x1, x4          	;1 [03]
+    clr	    x2			;1 [06]
+    nop			    	;1 [05]
+    rjmp    didStuff7       	;1 [06]
+;---------------------------------------------------------------------------
+sendNakAndReti:			;- [-19]
+    ldi     x3, USBPID_NAK  	;1 [-18]
+    rjmp    sendX3AndReti   	;1 [-17]
+;---------------------------------------------------------------------------
+sendAckAndReti:			;- [-17]
+    ldi     cnt, USBPID_ACK 	;1 [-16]
+sendCntAndReti:			;- [-16]
+    mov     x3, cnt         	;1 [-15]
+sendX3AndReti:			;- [-15]
+    ldi     YL, 20          	;1 [-14] x3==r20 address is 20
+    ldi     YH, 0           	;1 [-13]
+    ldi     cnt, 2          	;1 [-12]
+;   rjmp    usbSendAndReti      fallthrough
+;---------------------------------------------------------------------------
+;usbSend:
+;pointer to data in 'Y'
+;number of bytes in 'cnt' -- including sync byte [range 2 ... 12]
+;uses: x1...x4, btcnt, shift, cnt, Y
+;Numbers in brackets are time since first bit of sync pattern is sent
+;We need not to match the transfer rate exactly because the spec demands 
+;only 1.5% precision anyway.
+usbSendAndReti:             	;- [-13] 13 cycles until SOP
+    in      x2, USBDDR      	;1 [-12]
+    ori     x2, USBMASK     	;1 [-11]
+    sbi     USBOUT, USBMINUS	;2 [-09-10] prepare idle state; D+ and D- must have been 0 (no pullups)
+    in      x1, USBOUT      	;1 [-08] port mirror for tx loop
+    out     USBDDR, x2      	;1 [-07] <- acquire bus
+	; need not init x2 (bitstuff history) because sync starts with 0 
+    ldi     x4, USBMASK     	;1 [-06] 	exor mask
+    ldi     shift, 0x80     	;1 [-05] 	sync byte is first byte sent
+    ldi     bitcnt, 6    	;1 [-04] 
+txBitLoop:		    	;- [-04] [06]
+    sbrs    shift, 0        	;1 [-03] [07]
+    eor     x1, x4          	;1 [-02] [08] 
+    ror     shift           	;1 [-01] [09]  
+didStuffN:		    	;-       [09]
+    out     USBOUT, x1      	;1 [00]  [10] <-- out N
+    ror     x2              	;1 [01]
+    cpi     x2, 0xfc        	;1 [02]
+    brcc    bitstuffN       	;1 [03]
+    dec     bitcnt          	;1 [04]
+    brne    txBitLoop       	;1 [05]
+    sbrs    shift, 0        	;1 [06]
+    eor     x1, x4          	;1 [07]
+    ror     shift           	;1 [08]
+didStuff6:			;- [08]
+    nop				;1 [09]
+    out     USBOUT, x1      	;1 [00] [10] <-- out 6
+    ror     x2              	;1 [01] 
+    cpi     x2, 0xfc        	;1 [02]
+    brcc    bitstuff6       	;1 [03]
+    sbrs    shift, 0        	;1 [04]
+    eor     x1, x4          	;1 [05]
+    ror     shift           	;1 [06]
+    ror     x2              	;1 [07]
+didStuff7:			;- [07]
+    ldi     bitcnt, 6    	;1 [08]
+    cpi     x2, 0xfc        	;1 [09]
+    out     USBOUT, x1      	;1 [00] [10] <-- out 7
+    brcc    bitstuff7       	;1 [01]
+    ld      shift, y+       	;2 [02+03]
+    dec     cnt             	;1 [04]
+    brne    txBitLoop      	;1 [05]
+makeSE0:
+    cbr     x1, USBMASK     	;1 [06] 	prepare SE0 [spec says EOP may be 19 to 23 cycles]
+    lds     x2, usbNewDeviceAddr;2 [07+08]
+    lsl     x2                  ;1 [09] we compare with left shifted address
+;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
+;set address only after data packet was sent, not after handshake
+    out     USBOUT, x1      	;1 [00] [10] <-- out SE0-- from now 2 bits==20 cycl. until bus idle
+    subi    YL, 20 + 2          ;1 [01] Only assign address on data packets, not ACK/NAK in x3
+    sbci    YH, 0           	;1 [02]
+    breq    skipAddrAssign  	;1 [03]
+    sts     usbDeviceAddr, x2	;2 [04+05] if not skipped: SE0 is one cycle longer
+;----------------------------------------------------------------------------
+;end of usbDeviceAddress transfer
+skipAddrAssign:				;- [03/04]
+    ldi     x2, 1<<USB_INTR_PENDING_BIT	;1 [05] int0 occurred during TX -- clear pending flag
+    USB_STORE_PENDING(x2)           ;1 [06]
+    ori     x1, USBIDLE     		;1 [07]
+    in      x2, USBDDR      		;1 [08]
+    cbr     x2, USBMASK     		;1 [09] set both pins to input
+    mov     x3, x1          		;1 [10]
+    cbr     x3, USBMASK     		;1 [11] configure no pullup on both pins
+    ldi     x4, 3           		;1 [12]
+se0Delay:				;- [12] [15] 
+    dec     x4              		;1 [13] [16] 
+    brne    se0Delay        		;1 [14] [17] 
+    nop2				;2      [18+19]
+    out     USBOUT, x1      		;1      [20] <--out J (idle) -- end of SE0 (EOP sig.)
+    out     USBDDR, x2      		;1      [21] <--release bus now
+    out     USBOUT, x3      		;1      [22] <--ensure no pull-up resistors are active
+    rjmp    doReturn			;1	[23]
+;---------------------------------------------------------------------------
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm16.inc b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm16.inc
new file mode 100644
index 00000000..207b6e48
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm16.inc
@@ -0,0 +1,346 @@
+/* Name: usbdrvasm16.inc
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2007-06-15
+ * Tabsize: 4
+ * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * Revision: $Id: usbdrvasm16.inc 760 2009-08-09 18:59:43Z cs $
+ */
+
+/* Do not link this file! Link usbdrvasm.S instead, which includes the
+ * appropriate implementation!
+ */
+
+/*
+General Description:
+This file is the 16 MHz version of the asssembler part of the USB driver. It
+requires a 16 MHz crystal (not a ceramic resonator and not a calibrated RC
+oscillator).
+
+See usbdrv.h for a description of the entire driver.
+
+Since almost all of this code is timing critical, don't change unless you
+really know what you are doing! Many parts require not only a maximum number
+of CPU cycles, but even an exact number of cycles!
+*/
+
+;max stack usage: [ret(2), YL, SREG, YH, bitcnt, shift, x1, x2, x3, x4, cnt] = 12 bytes
+;nominal frequency: 16 MHz -> 10.6666666 cycles per bit, 85.333333333 cycles per byte
+; Numbers in brackets are clocks counted from center of last sync bit
+; when instruction starts
+
+USB_INTR_VECTOR:
+;order of registers pushed: YL, SREG YH, [sofError], bitcnt, shift, x1, x2, x3, x4, cnt
+    push    YL                  ;[-25] push only what is necessary to sync with edge ASAP
+    in      YL, SREG            ;[-23]
+    push    YL                  ;[-22]
+    push    YH                  ;[-20]
+;----------------------------------------------------------------------------
+; Synchronize with sync pattern:
+;----------------------------------------------------------------------------
+;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
+;sync up with J to K edge during sync pattern -- use fastest possible loops
+;The first part waits at most 1 bit long since we must be in sync pattern.
+;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
+;waitForJ, ensure that this prerequisite is met.
+waitForJ:
+    inc     YL
+    sbis    USBIN, USBMINUS
+    brne    waitForJ        ; just make sure we have ANY timeout
+waitForK:
+;The following code results in a sampling window of < 1/4 bit which meets the spec.
+    sbis    USBIN, USBMINUS     ;[-15]
+    rjmp    foundK              ;[-14]
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+#if USB_COUNT_SOF
+    lds     YL, usbSofCount
+    inc     YL
+    sts     usbSofCount, YL
+#endif  /* USB_COUNT_SOF */
+#ifdef USB_SOF_HOOK
+    USB_SOF_HOOK
+#endif
+    rjmp    sofError
+foundK:                         ;[-12]
+;{3, 5} after falling D- edge, average delay: 4 cycles [we want 5 for center sampling]
+;we have 1 bit time for setup purposes, then sample again. Numbers in brackets
+;are cycles from center of first sync (double K) bit after the instruction
+    push    bitcnt              ;[-12]
+;   [---]                       ;[-11]
+    lds     YL, usbInputBufOffset;[-10]
+;   [---]                       ;[-9]
+    clr     YH                  ;[-8]
+    subi    YL, lo8(-(usbRxBuf));[-7] [rx loop init]
+    sbci    YH, hi8(-(usbRxBuf));[-6] [rx loop init]
+    push    shift               ;[-5]
+;   [---]                       ;[-4]
+    ldi     bitcnt, 0x55        ;[-3] [rx loop init]
+    sbis    USBIN, USBMINUS     ;[-2] we want two bits K (sample 2 cycles too early)
+    rjmp    haveTwoBitsK        ;[-1]
+    pop     shift               ;[0] undo the push from before
+    pop     bitcnt              ;[2] undo the push from before
+    rjmp    waitForK            ;[4] this was not the end of sync, retry
+; The entire loop from waitForK until rjmp waitForK above must not exceed two
+; bit times (= 21 cycles).
+
+;----------------------------------------------------------------------------
+; push more registers and initialize values while we sample the first bits:
+;----------------------------------------------------------------------------
+haveTwoBitsK:
+    push    x1              ;[1]
+    push    x2              ;[3]
+    push    x3              ;[5]
+    ldi     shift, 0        ;[7]
+    ldi     x3, 1<<4        ;[8] [rx loop init] first sample is inverse bit, compensate that
+    push    x4              ;[9] == leap
+
+    in      x1, USBIN       ;[11] <-- sample bit 0
+    andi    x1, USBMASK     ;[12]
+    bst     x1, USBMINUS    ;[13]
+    bld     shift, 7        ;[14]
+    push    cnt             ;[15]
+    ldi     leap, 0         ;[17] [rx loop init]
+    ldi     cnt, USB_BUFSIZE;[18] [rx loop init]
+    rjmp    rxbit1          ;[19] arrives at [21]
+
+;----------------------------------------------------------------------------
+; Receiver loop (numbers in brackets are cycles within byte after instr)
+;----------------------------------------------------------------------------
+
+; duration of unstuffing code should be 10.66666667 cycles. We adjust "leap"
+; accordingly to approximate this value in the long run.
+
+unstuff6:
+    andi    x2, USBMASK ;[03]
+    ori     x3, 1<<6    ;[04] will not be shifted any more
+    andi    shift, ~0x80;[05]
+    mov     x1, x2      ;[06] sampled bit 7 is actually re-sampled bit 6
+    subi    leap, -1    ;[07] total duration = 11 bits -> subtract 1/3
+    rjmp    didUnstuff6 ;[08]
+
+unstuff7:
+    ori     x3, 1<<7    ;[09] will not be shifted any more
+    in      x2, USBIN   ;[00] [10]  re-sample bit 7
+    andi    x2, USBMASK ;[01]
+    andi    shift, ~0x80;[02]
+    subi    leap, 2     ;[03] total duration = 10 bits -> add 1/3
+    rjmp    didUnstuff7 ;[04]
+
+unstuffEven:
+    ori     x3, 1<<6    ;[09] will be shifted right 6 times for bit 0
+    in      x1, USBIN   ;[00] [10]
+    andi    shift, ~0x80;[01]
+    andi    x1, USBMASK ;[02]
+    breq    se0         ;[03]
+    subi    leap, -1    ;[04] total duration = 11 bits -> subtract 1/3
+    nop2                ;[05]
+    rjmp    didUnstuffE ;[06]
+
+unstuffOdd:
+    ori     x3, 1<<5    ;[09] will be shifted right 4 times for bit 1
+    in      x2, USBIN   ;[00] [10]
+    andi    shift, ~0x80;[01]
+    andi    x2, USBMASK ;[02]
+    breq    se0         ;[03]
+    subi    leap, -1    ;[04] total duration = 11 bits -> subtract 1/3
+    nop2                ;[05]
+    rjmp    didUnstuffO ;[06]
+
+rxByteLoop:
+    andi    x1, USBMASK ;[03]
+    eor     x2, x1      ;[04]
+    subi    leap, 1     ;[05]
+    brpl    skipLeap    ;[06]
+    subi    leap, -3    ;1 one leap cycle every 3rd byte -> 85 + 1/3 cycles per byte
+    nop                 ;1
+skipLeap:
+    subi    x2, 1       ;[08]
+    ror     shift       ;[09]
+didUnstuff6:
+    cpi     shift, 0xfc ;[10]
+    in      x2, USBIN   ;[00] [11] <-- sample bit 7
+    brcc    unstuff6    ;[01]
+    andi    x2, USBMASK ;[02]
+    eor     x1, x2      ;[03]
+    subi    x1, 1       ;[04]
+    ror     shift       ;[05]
+didUnstuff7:
+    cpi     shift, 0xfc ;[06]
+    brcc    unstuff7    ;[07]
+    eor     x3, shift   ;[08] reconstruct: x3 is 1 at bit locations we changed, 0 at others
+    st      y+, x3      ;[09] store data
+rxBitLoop:
+    in      x1, USBIN   ;[00] [11] <-- sample bit 0/2/4
+    andi    x1, USBMASK ;[01]
+    eor     x2, x1      ;[02]
+    andi    x3, 0x3f    ;[03] topmost two bits reserved for 6 and 7
+    subi    x2, 1       ;[04]
+    ror     shift       ;[05]
+    cpi     shift, 0xfc ;[06]
+    brcc    unstuffEven ;[07]
+didUnstuffE:
+    lsr     x3          ;[08]
+    lsr     x3          ;[09]
+rxbit1:
+    in      x2, USBIN   ;[00] [10] <-- sample bit 1/3/5
+    andi    x2, USBMASK ;[01]
+    breq    se0         ;[02]
+    eor     x1, x2      ;[03]
+    subi    x1, 1       ;[04]
+    ror     shift       ;[05]
+    cpi     shift, 0xfc ;[06]
+    brcc    unstuffOdd  ;[07]
+didUnstuffO:
+    subi    bitcnt, 0xab;[08] == addi 0x55, 0x55 = 0x100/3
+    brcs    rxBitLoop   ;[09]
+
+    subi    cnt, 1      ;[10]
+    in      x1, USBIN   ;[00] [11] <-- sample bit 6
+    brcc    rxByteLoop  ;[01]
+    rjmp    overflow
+
+macro POP_STANDARD ; 14 cycles
+    pop     cnt
+    pop     x4
+    pop     x3
+    pop     x2
+    pop     x1
+    pop     shift
+    pop     bitcnt
+    endm
+macro POP_RETI     ; 7 cycles
+    pop     YH
+    pop     YL
+    out     SREG, YL
+    pop     YL
+    endm
+
+#include "asmcommon.inc"
+
+; USB spec says:
+; idle = J
+; J = (D+ = 0), (D- = 1)
+; K = (D+ = 1), (D- = 0)
+; Spec allows 7.5 bit times from EOP to SOP for replies
+
+bitstuffN:
+    eor     x1, x4          ;[5]
+    ldi     x2, 0           ;[6]
+    nop2                    ;[7]
+    nop                     ;[9]
+    out     USBOUT, x1      ;[10] <-- out
+    rjmp    didStuffN       ;[0]
+    
+bitstuff6:
+    eor     x1, x4          ;[5]
+    ldi     x2, 0           ;[6] Carry is zero due to brcc
+    rol     shift           ;[7] compensate for ror shift at branch destination
+    rjmp    didStuff6       ;[8]
+
+bitstuff7:
+    ldi     x2, 0           ;[2] Carry is zero due to brcc
+    rjmp    didStuff7       ;[3]
+
+
+sendNakAndReti:
+    ldi     x3, USBPID_NAK  ;[-18]
+    rjmp    sendX3AndReti   ;[-17]
+sendAckAndReti:
+    ldi     cnt, USBPID_ACK ;[-17]
+sendCntAndReti:
+    mov     x3, cnt         ;[-16]
+sendX3AndReti:
+    ldi     YL, 20          ;[-15] x3==r20 address is 20
+    ldi     YH, 0           ;[-14]
+    ldi     cnt, 2          ;[-13]
+;   rjmp    usbSendAndReti      fallthrough
+
+;usbSend:
+;pointer to data in 'Y'
+;number of bytes in 'cnt' -- including sync byte [range 2 ... 12]
+;uses: x1...x4, btcnt, shift, cnt, Y
+;Numbers in brackets are time since first bit of sync pattern is sent
+;We don't match the transfer rate exactly (don't insert leap cycles every third
+;byte) because the spec demands only 1.5% precision anyway.
+usbSendAndReti:             ; 12 cycles until SOP
+    in      x2, USBDDR      ;[-12]
+    ori     x2, USBMASK     ;[-11]
+    sbi     USBOUT, USBMINUS;[-10] prepare idle state; D+ and D- must have been 0 (no pullups)
+    in      x1, USBOUT      ;[-8] port mirror for tx loop
+    out     USBDDR, x2      ;[-7] <- acquire bus
+; need not init x2 (bitstuff history) because sync starts with 0
+    ldi     x4, USBMASK     ;[-6] exor mask
+    ldi     shift, 0x80     ;[-5] sync byte is first byte sent
+txByteLoop:
+    ldi     bitcnt, 0x35    ;[-4] [6] binary 0011 0101
+txBitLoop:
+    sbrs    shift, 0        ;[-3] [7]
+    eor     x1, x4          ;[-2] [8]
+    out     USBOUT, x1      ;[-1] [9] <-- out N
+    ror     shift           ;[0] [10]
+    ror     x2              ;[1]
+didStuffN:
+    cpi     x2, 0xfc        ;[2]
+    brcc    bitstuffN       ;[3]
+    lsr     bitcnt          ;[4]
+    brcc    txBitLoop       ;[5]
+    brne    txBitLoop       ;[6]
+
+    sbrs    shift, 0        ;[7]
+    eor     x1, x4          ;[8]
+didStuff6:
+    out     USBOUT, x1      ;[-1] [9] <-- out 6
+    ror     shift           ;[0] [10]
+    ror     x2              ;[1]
+    cpi     x2, 0xfc        ;[2]
+    brcc    bitstuff6       ;[3]
+    ror     shift           ;[4]
+didStuff7:
+    ror     x2              ;[5]
+    sbrs    x2, 7           ;[6]
+    eor     x1, x4          ;[7]
+    nop                     ;[8]
+    cpi     x2, 0xfc        ;[9]
+    out     USBOUT, x1      ;[-1][10] <-- out 7
+    brcc    bitstuff7       ;[0] [11]
+    ld      shift, y+       ;[1]
+    dec     cnt             ;[3]
+    brne    txByteLoop      ;[4]
+;make SE0:
+    cbr     x1, USBMASK     ;[5] prepare SE0 [spec says EOP may be 21 to 25 cycles]
+    lds     x2, usbNewDeviceAddr;[6]
+    lsl     x2              ;[8] we compare with left shifted address
+    subi    YL, 20 + 2      ;[9] Only assign address on data packets, not ACK/NAK in x3
+    sbci    YH, 0           ;[10]
+    out     USBOUT, x1      ;[11] <-- out SE0 -- from now 2 bits = 22 cycles until bus idle
+;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
+;set address only after data packet was sent, not after handshake
+    breq    skipAddrAssign  ;[0]
+    sts     usbDeviceAddr, x2; if not skipped: SE0 is one cycle longer
+skipAddrAssign:
+;end of usbDeviceAddress transfer
+    ldi     x2, 1<<USB_INTR_PENDING_BIT;[2] int0 occurred during TX -- clear pending flag
+    USB_STORE_PENDING(x2)   ;[3]
+    ori     x1, USBIDLE     ;[4]
+    in      x2, USBDDR      ;[5]
+    cbr     x2, USBMASK     ;[6] set both pins to input
+    mov     x3, x1          ;[7]
+    cbr     x3, USBMASK     ;[8] configure no pullup on both pins
+    ldi     x4, 4           ;[9]
+se0Delay:
+    dec     x4              ;[10] [13] [16] [19]
+    brne    se0Delay        ;[11] [14] [17] [20]
+    out     USBOUT, x1      ;[21] <-- out J (idle) -- end of SE0 (EOP signal)
+    out     USBDDR, x2      ;[22] <-- release bus now
+    out     USBOUT, x3      ;[23] <-- ensure no pull-up resistors are active
+    rjmp    doReturn
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm165.inc b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm165.inc
new file mode 100644
index 00000000..79b3c61c
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm165.inc
@@ -0,0 +1,453 @@
+/* Name: usbdrvasm165.inc
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2007-04-22
+ * Tabsize: 4
+ * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * Revision: $Id: usbdrvasm165.inc 740 2009-04-13 18:23:31Z cs $
+ */
+
+/* Do not link this file! Link usbdrvasm.S instead, which includes the
+ * appropriate implementation!
+ */
+
+/*
+General Description:
+This file is the 16.5 MHz version of the USB driver. It is intended for the
+ATTiny45 and similar controllers running on 16.5 MHz internal RC oscillator.
+This version contains a phase locked loop in the receiver routine to cope with
+slight clock rate deviations of up to +/- 1%.
+
+See usbdrv.h for a description of the entire driver.
+
+Since almost all of this code is timing critical, don't change unless you
+really know what you are doing! Many parts require not only a maximum number
+of CPU cycles, but even an exact number of cycles!
+*/
+
+;Software-receiver engine. Strict timing! Don't change unless you can preserve timing!
+;interrupt response time: 4 cycles + insn running = 7 max if interrupts always enabled
+;max allowable interrupt latency: 59 cycles -> max 52 cycles interrupt disable
+;max stack usage: [ret(2), r0, SREG, YL, YH, shift, x1, x2, x3, x4, cnt] = 12 bytes
+;nominal frequency: 16.5 MHz -> 11 cycles per bit
+; 16.3125 MHz < F_CPU < 16.6875 MHz (+/- 1.1%)
+; Numbers in brackets are clocks counted from center of last sync bit
+; when instruction starts
+
+
+USB_INTR_VECTOR:
+;order of registers pushed: YL, SREG [sofError], r0, YH, shift, x1, x2, x3, x4, cnt
+    push    YL                  ;[-23] push only what is necessary to sync with edge ASAP
+    in      YL, SREG            ;[-21]
+    push    YL                  ;[-20]
+;----------------------------------------------------------------------------
+; Synchronize with sync pattern:
+;----------------------------------------------------------------------------
+;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
+;sync up with J to K edge during sync pattern -- use fastest possible loops
+;The first part waits at most 1 bit long since we must be in sync pattern.
+;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
+;waitForJ, ensure that this prerequisite is met.
+waitForJ:
+    inc     YL
+    sbis    USBIN, USBMINUS
+    brne    waitForJ        ; just make sure we have ANY timeout
+waitForK:
+;The following code results in a sampling window of < 1/4 bit which meets the spec.
+    sbis    USBIN, USBMINUS     ;[-15]
+    rjmp    foundK              ;[-14]
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+#if USB_COUNT_SOF
+    lds     YL, usbSofCount
+    inc     YL
+    sts     usbSofCount, YL
+#endif  /* USB_COUNT_SOF */
+#ifdef USB_SOF_HOOK
+    USB_SOF_HOOK
+#endif
+    rjmp    sofError
+foundK:                         ;[-12]
+;{3, 5} after falling D- edge, average delay: 4 cycles [we want 5 for center sampling]
+;we have 1 bit time for setup purposes, then sample again. Numbers in brackets
+;are cycles from center of first sync (double K) bit after the instruction
+    push    r0                  ;[-12]
+;   [---]                       ;[-11]
+    push    YH                  ;[-10]
+;   [---]                       ;[-9]
+    lds     YL, usbInputBufOffset;[-8]
+;   [---]                       ;[-7]
+    clr     YH                  ;[-6]
+    subi    YL, lo8(-(usbRxBuf));[-5] [rx loop init]
+    sbci    YH, hi8(-(usbRxBuf));[-4] [rx loop init]
+    mov     r0, x2              ;[-3] [rx loop init]
+    sbis    USBIN, USBMINUS     ;[-2] we want two bits K (sample 2 cycles too early)
+    rjmp    haveTwoBitsK        ;[-1]
+    pop     YH                  ;[0] undo the pushes from before
+    pop     r0                  ;[2]
+    rjmp    waitForK            ;[4] this was not the end of sync, retry
+; The entire loop from waitForK until rjmp waitForK above must not exceed two
+; bit times (= 22 cycles).
+
+;----------------------------------------------------------------------------
+; push more registers and initialize values while we sample the first bits:
+;----------------------------------------------------------------------------
+haveTwoBitsK:               ;[1]
+    push    shift           ;[1]
+    push    x1              ;[3]
+    push    x2              ;[5]
+    push    x3              ;[7]
+    ldi     shift, 0xff     ;[9] [rx loop init]
+    ori     x3, 0xff        ;[10] [rx loop init] == ser x3, clear zero flag
+
+    in      x1, USBIN       ;[11] <-- sample bit 0
+    bst     x1, USBMINUS    ;[12]
+    bld     shift, 0        ;[13]
+    push    x4              ;[14] == phase
+;   [---]                   ;[15]
+    push    cnt             ;[16]
+;   [---]                   ;[17]
+    ldi     phase, 0        ;[18] [rx loop init]
+    ldi     cnt, USB_BUFSIZE;[19] [rx loop init]
+    rjmp    rxbit1          ;[20]
+;   [---]                   ;[21]
+
+;----------------------------------------------------------------------------
+; Receiver loop (numbers in brackets are cycles within byte after instr)
+;----------------------------------------------------------------------------
+/*
+byte oriented operations done during loop:
+bit 0: store data
+bit 1: SE0 check
+bit 2: overflow check
+bit 3: catch up
+bit 4: rjmp to achieve conditional jump range
+bit 5: PLL
+bit 6: catch up
+bit 7: jump, fixup bitstuff
+; 87 [+ 2] cycles
+------------------------------------------------------------------
+*/
+continueWithBit5:
+    in      x2, USBIN       ;[055] <-- bit 5
+    eor     r0, x2          ;[056]
+    or      phase, r0       ;[057]
+    sbrc    phase, USBMINUS ;[058]
+    lpm                     ;[059] optional nop3; modifies r0
+    in      phase, USBIN    ;[060] <-- phase
+    eor     x1, x2          ;[061]
+    bst     x1, USBMINUS    ;[062]
+    bld     shift, 5        ;[063]
+    andi    shift, 0x3f     ;[064]
+    in      x1, USBIN       ;[065] <-- bit 6
+    breq    unstuff5        ;[066] *** unstuff escape
+    eor     phase, x1       ;[067]
+    eor     x2, x1          ;[068]
+    bst     x2, USBMINUS    ;[069]
+    bld     shift, 6        ;[070]
+didUnstuff6:                ;[   ]
+    in      r0, USBIN       ;[071] <-- phase
+    cpi     shift, 0x02     ;[072]
+    brlo    unstuff6        ;[073] *** unstuff escape
+didUnstuff5:                ;[   ]
+    nop2                    ;[074]
+;   [---]                   ;[075]
+    in      x2, USBIN       ;[076] <-- bit 7
+    eor     x1, x2          ;[077]
+    bst     x1, USBMINUS    ;[078]
+    bld     shift, 7        ;[079]
+didUnstuff7:                ;[   ]
+    eor     r0, x2          ;[080]
+    or      phase, r0       ;[081]
+    in      r0, USBIN       ;[082] <-- phase
+    cpi     shift, 0x04     ;[083]
+    brsh    rxLoop          ;[084]
+;   [---]                   ;[085]
+unstuff7:                   ;[   ]
+    andi    x3, ~0x80       ;[085]
+    ori     shift, 0x80     ;[086]
+    in      x2, USBIN       ;[087] <-- sample stuffed bit 7
+    nop                     ;[088]
+    rjmp    didUnstuff7     ;[089]
+;   [---]                   ;[090]
+                            ;[080]
+
+unstuff5:                   ;[067]
+    eor     phase, x1       ;[068]
+    andi    x3, ~0x20       ;[069]
+    ori     shift, 0x20     ;[070]
+    in      r0, USBIN       ;[071] <-- phase
+    mov     x2, x1          ;[072]
+    nop                     ;[073]
+    nop2                    ;[074]
+;   [---]                   ;[075]
+    in      x1, USBIN       ;[076] <-- bit 6
+    eor     r0, x1          ;[077]
+    or      phase, r0       ;[078]
+    eor     x2, x1          ;[079]
+    bst     x2, USBMINUS    ;[080]
+    bld     shift, 6        ;[081] no need to check bitstuffing, we just had one
+    in      r0, USBIN       ;[082] <-- phase
+    rjmp    didUnstuff5     ;[083]
+;   [---]                   ;[084]
+                            ;[074]
+
+unstuff6:                   ;[074]
+    andi    x3, ~0x40       ;[075]
+    in      x1, USBIN       ;[076] <-- bit 6 again
+    ori     shift, 0x40     ;[077]
+    nop2                    ;[078]
+;   [---]                   ;[079]
+    rjmp    didUnstuff6     ;[080]
+;   [---]                   ;[081]
+                            ;[071]
+
+unstuff0:                   ;[013]
+    eor     r0, x2          ;[014]
+    or      phase, r0       ;[015]
+    andi    x2, USBMASK     ;[016] check for SE0
+    in      r0, USBIN       ;[017] <-- phase
+    breq    didUnstuff0     ;[018] direct jump to se0 would be too long
+    andi    x3, ~0x01       ;[019]
+    ori     shift, 0x01     ;[020]
+    mov     x1, x2          ;[021] mov existing sample
+    in      x2, USBIN       ;[022] <-- bit 1 again
+    rjmp    didUnstuff0     ;[023]
+;   [---]                   ;[024]
+                            ;[014]
+
+unstuff1:                   ;[024]
+    eor     r0, x1          ;[025]
+    or      phase, r0       ;[026]
+    andi    x3, ~0x02       ;[027]
+    in      r0, USBIN       ;[028] <-- phase
+    ori     shift, 0x02     ;[029]
+    mov     x2, x1          ;[030]
+    rjmp    didUnstuff1     ;[031]
+;   [---]                   ;[032]
+                            ;[022]
+
+unstuff2:                   ;[035]
+    eor     r0, x2          ;[036]
+    or      phase, r0       ;[037]
+    andi    x3, ~0x04       ;[038]
+    in      r0, USBIN       ;[039] <-- phase
+    ori     shift, 0x04     ;[040]
+    mov     x1, x2          ;[041]
+    rjmp    didUnstuff2     ;[042]
+;   [---]                   ;[043]
+                            ;[033]
+
+unstuff3:                   ;[043]
+    in      x2, USBIN       ;[044] <-- bit 3 again
+    eor     r0, x2          ;[045]
+    or      phase, r0       ;[046]
+    andi    x3, ~0x08       ;[047]
+    ori     shift, 0x08     ;[048]
+    nop                     ;[049]
+    in      r0, USBIN       ;[050] <-- phase
+    rjmp    didUnstuff3     ;[051]
+;   [---]                   ;[052]
+                            ;[042]
+
+unstuff4:                   ;[053]
+    andi    x3, ~0x10       ;[054]
+    in      x1, USBIN       ;[055] <-- bit 4 again
+    ori     shift, 0x10     ;[056]
+    rjmp    didUnstuff4     ;[057]
+;   [---]                   ;[058]
+                            ;[048]
+
+rxLoop:                     ;[085]
+    eor     x3, shift       ;[086] reconstruct: x3 is 0 at bit locations we changed, 1 at others
+    in      x1, USBIN       ;[000] <-- bit 0
+    st      y+, x3          ;[001]
+;   [---]                   ;[002]
+    eor     r0, x1          ;[003]
+    or      phase, r0       ;[004]
+    eor     x2, x1          ;[005]
+    in      r0, USBIN       ;[006] <-- phase
+    ser     x3              ;[007]
+    bst     x2, USBMINUS    ;[008]
+    bld     shift, 0        ;[009]
+    andi    shift, 0xf9     ;[010]
+rxbit1:                     ;[   ]
+    in      x2, USBIN       ;[011] <-- bit 1
+    breq    unstuff0        ;[012] *** unstuff escape
+    andi    x2, USBMASK     ;[013] SE0 check for bit 1
+didUnstuff0:                ;[   ] Z only set if we detected SE0 in bitstuff
+    breq    se0             ;[014]
+    eor     r0, x2          ;[015]
+    or      phase, r0       ;[016]
+    in      r0, USBIN       ;[017] <-- phase
+    eor     x1, x2          ;[018]
+    bst     x1, USBMINUS    ;[019]
+    bld     shift, 1        ;[020]
+    andi    shift, 0xf3     ;[021]
+didUnstuff1:                ;[   ]
+    in      x1, USBIN       ;[022] <-- bit 2
+    breq    unstuff1        ;[023] *** unstuff escape
+    eor     r0, x1          ;[024]
+    or      phase, r0       ;[025]
+    subi    cnt, 1          ;[026] overflow check
+    brcs    overflow        ;[027]
+    in      r0, USBIN       ;[028] <-- phase
+    eor     x2, x1          ;[029]
+    bst     x2, USBMINUS    ;[030]
+    bld     shift, 2        ;[031]
+    andi    shift, 0xe7     ;[032]
+didUnstuff2:                ;[   ]
+    in      x2, USBIN       ;[033] <-- bit 3
+    breq    unstuff2        ;[034] *** unstuff escape
+    eor     r0, x2          ;[035]
+    or      phase, r0       ;[036]
+    eor     x1, x2          ;[037]
+    bst     x1, USBMINUS    ;[038]
+    in      r0, USBIN       ;[039] <-- phase
+    bld     shift, 3        ;[040]
+    andi    shift, 0xcf     ;[041]
+didUnstuff3:                ;[   ]
+    breq    unstuff3        ;[042] *** unstuff escape
+    nop                     ;[043]
+    in      x1, USBIN       ;[044] <-- bit 4
+    eor     x2, x1          ;[045]
+    bst     x2, USBMINUS    ;[046]
+    bld     shift, 4        ;[047]
+didUnstuff4:                ;[   ]
+    eor     r0, x1          ;[048]
+    or      phase, r0       ;[049]
+    in      r0, USBIN       ;[050] <-- phase
+    andi    shift, 0x9f     ;[051]
+    breq    unstuff4        ;[052] *** unstuff escape
+    rjmp    continueWithBit5;[053]
+;   [---]                   ;[054]
+
+macro POP_STANDARD ; 16 cycles
+    pop     cnt
+    pop     x4
+    pop     x3
+    pop     x2
+    pop     x1
+    pop     shift
+    pop     YH
+    pop     r0
+    endm
+macro POP_RETI     ; 5 cycles
+    pop     YL
+    out     SREG, YL
+    pop     YL
+    endm
+
+#include "asmcommon.inc"
+
+
+; USB spec says:
+; idle = J
+; J = (D+ = 0), (D- = 1)
+; K = (D+ = 1), (D- = 0)
+; Spec allows 7.5 bit times from EOP to SOP for replies
+
+bitstuff7:
+    eor     x1, x4          ;[4]
+    ldi     x2, 0           ;[5]
+    nop2                    ;[6] C is zero (brcc)
+    rjmp    didStuff7       ;[8]
+
+bitstuffN:
+    eor     x1, x4          ;[5]
+    ldi     x2, 0           ;[6]
+    lpm                     ;[7] 3 cycle NOP, modifies r0
+    out     USBOUT, x1      ;[10] <-- out
+    rjmp    didStuffN       ;[0]
+
+#define bitStatus   x3
+
+sendNakAndReti:
+    ldi     cnt, USBPID_NAK ;[-19]
+    rjmp    sendCntAndReti  ;[-18]
+sendAckAndReti:
+    ldi     cnt, USBPID_ACK ;[-17]
+sendCntAndReti:
+    mov     r0, cnt         ;[-16]
+    ldi     YL, 0           ;[-15] R0 address is 0
+    ldi     YH, 0           ;[-14]
+    ldi     cnt, 2          ;[-13]
+;   rjmp    usbSendAndReti      fallthrough
+
+;usbSend:
+;pointer to data in 'Y'
+;number of bytes in 'cnt' -- including sync byte [range 2 ... 12]
+;uses: x1...x4, shift, cnt, Y
+;Numbers in brackets are time since first bit of sync pattern is sent
+usbSendAndReti:             ; 12 cycles until SOP
+    in      x2, USBDDR      ;[-12]
+    ori     x2, USBMASK     ;[-11]
+    sbi     USBOUT, USBMINUS;[-10] prepare idle state; D+ and D- must have been 0 (no pullups)
+    in      x1, USBOUT      ;[-8] port mirror for tx loop
+    out     USBDDR, x2      ;[-7] <- acquire bus
+; need not init x2 (bitstuff history) because sync starts with 0
+    ldi     x4, USBMASK     ;[-6] exor mask
+    ldi     shift, 0x80     ;[-5] sync byte is first byte sent
+    ldi     bitStatus, 0xff ;[-4] init bit loop counter, works for up to 12 bytes
+byteloop:
+bitloop:
+    sbrs    shift, 0        ;[8] [-3]
+    eor     x1, x4          ;[9] [-2]
+    out     USBOUT, x1      ;[10] [-1] <-- out
+    ror     shift           ;[0]
+    ror     x2              ;[1]
+didStuffN:
+    cpi     x2, 0xfc        ;[2]
+    brcc    bitstuffN       ;[3]
+    nop                     ;[4]
+    subi    bitStatus, 37   ;[5] 256 / 7 ~=~ 37
+    brcc    bitloop         ;[6] when we leave the loop, bitStatus has almost the initial value
+    sbrs    shift, 0        ;[7]
+    eor     x1, x4          ;[8]
+    ror     shift           ;[9]
+didStuff7:
+    out     USBOUT, x1      ;[10] <-- out
+    ror     x2              ;[0]
+    cpi     x2, 0xfc        ;[1]
+    brcc    bitstuff7       ;[2]
+    ld      shift, y+       ;[3]
+    dec     cnt             ;[5]
+    brne    byteloop        ;[6]
+;make SE0:
+    cbr     x1, USBMASK     ;[7] prepare SE0 [spec says EOP may be 21 to 25 cycles]
+    lds     x2, usbNewDeviceAddr;[8]
+    lsl     x2              ;[10] we compare with left shifted address
+    out     USBOUT, x1      ;[11] <-- out SE0 -- from now 2 bits = 22 cycles until bus idle
+;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
+;set address only after data packet was sent, not after handshake
+    subi    YL, 2           ;[0] Only assign address on data packets, not ACK/NAK in r0
+    sbci    YH, 0           ;[1]
+    breq    skipAddrAssign  ;[2]
+    sts     usbDeviceAddr, x2; if not skipped: SE0 is one cycle longer
+skipAddrAssign:
+;end of usbDeviceAddress transfer
+    ldi     x2, 1<<USB_INTR_PENDING_BIT;[4] int0 occurred during TX -- clear pending flag
+    USB_STORE_PENDING(x2)   ;[5]
+    ori     x1, USBIDLE     ;[6]
+    in      x2, USBDDR      ;[7]
+    cbr     x2, USBMASK     ;[8] set both pins to input
+    mov     x3, x1          ;[9]
+    cbr     x3, USBMASK     ;[10] configure no pullup on both pins
+    ldi     x4, 4           ;[11]
+se0Delay:
+    dec     x4              ;[12] [15] [18] [21]
+    brne    se0Delay        ;[13] [16] [19] [22]
+    out     USBOUT, x1      ;[23] <-- out J (idle) -- end of SE0 (EOP signal)
+    out     USBDDR, x2      ;[24] <-- release bus now
+    out     USBOUT, x3      ;[25] <-- ensure no pull-up resistors are active
+    rjmp    doReturn
+
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm18-crc.inc b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm18-crc.inc
new file mode 100644
index 00000000..f83347df
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm18-crc.inc
@@ -0,0 +1,707 @@
+/* Name: usbdrvasm18.inc
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Lukas Schrittwieser (based on 20 MHz usbdrvasm20.inc by Jeroen Benschop)
+ * Creation Date: 2009-01-20
+ * Tabsize: 4
+ * Copyright: (c) 2008 by Lukas Schrittwieser and OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * Revision: $Id: usbdrvasm18-crc.inc 740 2009-04-13 18:23:31Z cs $
+ */
+
+/* Do not link this file! Link usbdrvasm.S instead, which includes the
+ * appropriate implementation!
+ */
+
+/*
+General Description:
+This file is the 18 MHz version of the asssembler part of the USB driver. It
+requires a 18 MHz crystal (not a ceramic resonator and not a calibrated RC
+oscillator).
+
+See usbdrv.h for a description of the entire driver.
+
+Since almost all of this code is timing critical, don't change unless you
+really know what you are doing! Many parts require not only a maximum number
+of CPU cycles, but even an exact number of cycles!
+*/
+
+
+;max stack usage: [ret(2), YL, SREG, YH, [sofError], bitcnt(x5), shift, x1, x2, x3, x4, cnt, ZL, ZH] = 14 bytes
+;nominal frequency: 18 MHz -> 12 cycles per bit
+; Numbers in brackets are clocks counted from center of last sync bit
+; when instruction starts
+;register use in receive loop to receive the data bytes:
+; shift assembles the byte currently being received
+; x1 holds the D+ and D- line state
+; x2 holds the previous line state
+; cnt holds the number of bytes left in the receive buffer
+; x3 holds the higher crc byte (see algorithm below)
+; x4 is used as temporary register for the crc algorithm
+; x5 is used for unstuffing: when unstuffing the last received bit is inverted in shift (to prevent further
+;    unstuffing calls. In the same time the corresponding bit in x5 is cleared to mark the bit as beening iverted
+; zl lower crc value and crc table index
+; zh used for crc table accesses
+
+;--------------------------------------------------------------------------------------------------------------
+; CRC mods:
+;  table driven crc checker, Z points to table in prog space
+;   ZL is the lower crc byte, x3 is the higher crc byte
+;	x4 is used as temp register to store different results
+;	the initialization of the crc register is not 0xFFFF but 0xFE54. This is because during the receipt of the
+;	first data byte an virtual zero data byte is added to the crc register, this results in the correct initial
+;	value of 0xFFFF at beginning of the second data byte before the first data byte is added to the crc.
+;	The magic number 0xFE54 results form the crc table: At tabH[0x54] = 0xFF = crcH (required) and
+;	tabL[0x54] = 0x01  ->  crcL = 0x01 xor 0xFE = 0xFF
+;  bitcnt is renamed to x5 and is used for unstuffing purposes, the unstuffing works like in the 12MHz version
+;--------------------------------------------------------------------------------------------------------------
+; CRC algorithm:
+;	The crc register is formed by x3 (higher byte) and ZL (lower byte). The algorithm uses a 'reversed' form
+;	i.e. that it takes the least significant bit first and shifts to the right. So in fact the highest order
+;	bit seen from the polynomial devision point of view is the lsb of ZL. (If this sounds strange to you i
+;	propose a research on CRC :-) )
+;	Each data byte received is xored to ZL, the lower crc byte. This byte now builds the crc
+;	table index. Next the new high byte is loaded from the table and stored in x4 until we have space in x3
+;	(its destination).
+;	Afterwards the lower table is loaded from the table and stored in ZL (the old index is overwritten as
+;	we don't need it anymore. In fact this is a right shift by 8 bits.) Now the old crc high value is xored
+;	to ZL, this is the second shift of the old crc value. Now x4 (the temp reg) is moved to x3 and the crc
+; 	calculation is done.
+;	Prior to the first byte the two CRC register have to be initialized to 0xFFFF (as defined in usb spec)
+;	however the crc engine also runs during the receipt of the first byte, therefore x3 and zl are initialized
+;	to a magic number which results in a crc value of 0xFFFF after the first complete byte.
+;
+;	This algorithm is split into the extra cycles of the different bits:
+;	bit7:	XOR the received byte to ZL
+;	bit5:	load the new high byte to x4
+;	bit6:	load the lower xor byte from the table, xor zl and x3, store result in zl (=the new crc low value)
+;			move x4 (the new high byte) to x3, the crc value is ready
+;
+
+
+macro POP_STANDARD ; 18 cycles
+    pop		ZH
+    pop		ZL
+	pop     cnt
+    pop     x5
+    pop     x3
+    pop     x2
+    pop     x1
+    pop     shift
+    pop     x4
+    endm
+macro POP_RETI     ; 7 cycles
+    pop     YH
+    pop     YL
+    out     SREG, YL
+    pop     YL
+    endm
+
+macro CRC_CLEANUP_AND_CHECK
+	; the last byte has already been xored with the lower crc byte, we have to do the table lookup and xor
+	; x3 is the higher crc byte, zl the lower one
+	ldi		ZH, hi8(usbCrcTableHigh);[+1] get the new high byte from the table
+	lpm		x2, Z				;[+2][+3][+4]
+	ldi		ZH, hi8(usbCrcTableLow);[+5] get the new low xor byte from the table
+	lpm		ZL, Z				;[+6][+7][+8]
+	eor		ZL, x3				;[+7] xor the old high byte with the value from the table, x2:ZL now holds the crc value
+	cpi		ZL, 0x01			;[+8] if the crc is ok we have a fixed remainder value of 0xb001 in x2:ZL (see usb spec)
+	brne	ignorePacket		;[+9] detected a crc fault -> paket is ignored and retransmitted by the host
+	cpi		x2, 0xb0			;[+10]
+	brne	ignorePacket		;[+11] detected a crc fault -> paket is ignored and retransmitted by the host
+    endm
+
+
+USB_INTR_VECTOR:
+;order of registers pushed: YL, SREG, YH, [sofError], x4, shift, x1, x2, x3, x5, cnt, ZL, ZH
+    push    YL                  ;[-28] push only what is necessary to sync with edge ASAP
+    in      YL, SREG            ;[-26]
+    push    YL                  ;[-25]
+    push    YH                  ;[-23]
+;----------------------------------------------------------------------------
+; Synchronize with sync pattern:
+;----------------------------------------------------------------------------
+;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
+;sync up with J to K edge during sync pattern -- use fastest possible loops
+;The first part waits at most 1 bit long since we must be in sync pattern.
+;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
+;waitForJ, ensure that this prerequisite is met.
+waitForJ:
+    inc     YL
+    sbis    USBIN, USBMINUS
+    brne    waitForJ        ; just make sure we have ANY timeout
+waitForK:
+;The following code results in a sampling window of < 1/4 bit which meets the spec.
+    sbis    USBIN, USBMINUS     ;[-17]
+    rjmp    foundK              ;[-16]
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+#if USB_COUNT_SOF
+    lds     YL, usbSofCount
+    inc     YL
+    sts     usbSofCount, YL
+#endif  /* USB_COUNT_SOF */
+#ifdef USB_SOF_HOOK
+    USB_SOF_HOOK
+#endif
+    rjmp    sofError
+foundK:                         ;[-15]
+;{3, 5} after falling D- edge, average delay: 4 cycles
+;bit0 should be at 30  (2.5 bits) for center sampling. Currently at 4 so 26 cylces till bit 0 sample
+;use 1 bit time for setup purposes, then sample again. Numbers in brackets
+;are cycles from center of first sync (double K) bit after the instruction
+    push    x4                  ;[-14]
+;   [---]                       ;[-13]
+    lds     YL, usbInputBufOffset;[-12] used to toggle the two usb receive buffers
+;   [---]                       ;[-11]
+    clr     YH                  ;[-10]
+    subi    YL, lo8(-(usbRxBuf));[-9] [rx loop init]
+    sbci    YH, hi8(-(usbRxBuf));[-8] [rx loop init]
+    push    shift               ;[-7]
+;   [---]                       ;[-6]
+    ldi		shift, 0x80			;[-5] the last bit is the end of byte marker for the pid receiver loop
+    clc			      	      	;[-4] the carry has to be clear for receipt of pid bit 0
+    sbis    USBIN, USBMINUS     ;[-3] we want two bits K (sample 3 cycles too early)
+    rjmp    haveTwoBitsK        ;[-2]
+    pop     shift               ;[-1] undo the push from before
+    pop     x4                  ;[1]
+    rjmp    waitForK            ;[3] this was not the end of sync, retry
+; The entire loop from waitForK until rjmp waitForK above must not exceed two
+; bit times (= 24 cycles).
+
+;----------------------------------------------------------------------------
+; push more registers and initialize values while we sample the first bits:
+;----------------------------------------------------------------------------
+haveTwoBitsK:
+    push    x1                  ;[0]
+    push    x2                  ;[2]
+    push    x3                  ;[4] crc high byte
+    ldi     x2, 1<<USBPLUS      ;[6] [rx loop init] current line state is K state. D+=="1", D-=="0"
+    push    x5                  ;[7]
+    push    cnt                 ;[9]
+    ldi     cnt, USB_BUFSIZE    ;[11]
+
+
+;--------------------------------------------------------------------------------------------------------------
+; receives the pid byte
+; there is no real unstuffing algorithm implemented here as a stuffing bit is impossible in the pid byte.
+; That's because the last four bits of the byte are the inverted of the first four bits. If we detect a
+; unstuffing condition something went wrong and abort
+; shift has to be initialized to 0x80
+;--------------------------------------------------------------------------------------------------------------
+
+; pid bit 0 - used for even more register saving (we need the z pointer)
+	in      x1, USBIN           ;[0] sample line state
+    andi    x1, USBMASK         ;[1] filter only D+ and D- bits
+    eor		x2, x1				;[2] generate inverted of actual bit
+	sbrc	x2, USBMINUS		;[3] if the bit is set we received a zero
+	sec							;[4]
+	ror		shift				;[5] we perform no unstuffing check here as this is the first bit
+	mov		x2, x1				;[6]
+	push	ZL					;[7]
+								;[8]
+	push	ZH					;[9]
+								;[10]
+	ldi		x3, 0xFE			;[11] x3 is the high order crc value
+
+
+bitloopPid:						
+	in      x1, USBIN           ;[0] sample line state
+   	andi    x1, USBMASK         ;[1] filter only D+ and D- bits
+    breq    nse0                ;[2] both lines are low so handle se0	
+	eor		x2, x1				;[3] generate inverted of actual bit
+	sbrc	x2, USBMINUS		;[4] set the carry if we received a zero
+	sec							;[5]
+	ror		shift				;[6]
+	ldi		ZL, 0x54			;[7] ZL is the low order crc value
+	ser		x4					;[8] the is no bit stuffing check here as the pid bit can't be stuffed. if so
+								; some error occured. In this case the paket is discarded later on anyway.
+	mov		x2, x1				;[9] prepare for the next cycle
+	brcc	bitloopPid			;[10] while 0s drop out of shift we get the next bit
+	eor		x4, shift			;[11] invert all bits in shift and store result in x4
+
+;--------------------------------------------------------------------------------------------------------------
+; receives data bytes and calculates the crc
+; the last USBIN state has to be in x2
+; this is only the first half, due to branch distanc limitations the second half of the loop is near the end
+; of this asm file
+;--------------------------------------------------------------------------------------------------------------
+
+rxDataStart:
+    in      x1, USBIN           ;[0] sample line state (note: a se0 check is not useful due to bit dribbling)
+    ser		x5					;[1] prepare the unstuff marker register
+    eor		x2, x1             	;[2] generates the inverted of the actual bit
+    bst		x2, USBMINUS       	;[3] copy the bit from x2
+    bld		shift, 0	        ;[4] and store it in shift
+    mov		x2, shift	     	;[5] make a copy of shift for unstuffing check
+    andi	x2, 0xF9	      	;[6] mask the last six bits, if we got six zeros (which are six ones in fact)
+    breq	unstuff0	      	;[7] then Z is set now and we branch to the unstuffing handler
+didunstuff0:
+	subi    cnt, 1         		;[8] cannot use dec because it doesn't affect the carry flag
+    brcs    nOverflow    		;[9] Too many bytes received. Ignore packet							
+    st		Y+, x4				;[10] store the last received byte
+								;[11] st needs two cycles
+
+; bit1							
+	in		x2, USBIN			;[0] sample line state
+    andi	x1, USBMASK			;[1] check for se0 during bit 0
+    breq	nse0				;[2]
+    andi	x2, USBMASK			;[3] check se0 during bit 1
+    breq	nse0				;[4]
+	eor		x1, x2				;[5]
+    bst		x1, USBMINUS		;[6]
+    bld 	shift, 1	 		;[7]
+    mov		x1, shift			;[8]
+    andi	x1, 0xF3			;[9]
+    breq	unstuff1			;[10]
+didunstuff1:
+	nop							;[11]	
+
+; bit2
+	in      x1, USBIN           ;[0] sample line state
+    andi	x1, USBMASK			;[1] check for se0 (as there is nothing else to do here
+	breq	nOverflow	 		;[2]
+    eor		x2, x1              ;[3] generates the inverted of the actual bit
+    bst		x2, USBMINUS		;[4]
+    bld		shift, 2			;[5] store the bit
+    mov		x2, shift			;[6]
+    andi	x2, 0xE7			;[7] if we have six zeros here (which means six 1 in the stream)
+    breq	unstuff2			;[8] the next bit is a stuffing bit
+didunstuff2:
+	nop2						;[9]
+								;[10]
+	nop							;[11]					
+					
+; bit3							
+	in		x2, USBIN			;[0] sample line state
+    andi	x2, USBMASK			;[1] check for se0
+    breq	nOverflow           ;[2]
+    eor		x1, x2				;[3]
+    bst		x1, USBMINUS		;[4]
+    bld 	shift, 3	 		;[5]
+    mov		x1, shift			;[6]
+    andi	x1, 0xCF			;[7]
+    breq	unstuff3			;[8]
+didunstuff3:
+	nop							;[9]
+	rjmp 	rxDataBit4			;[10]
+								;[11]				
+
+; the avr branch instructions allow an offset of +63 insturction only, so we need this
+; 'local copy' of se0
+nse0:		
+	rjmp	se0					;[4]
+								;[5]
+; the same same as for se0 is needed for overflow and StuffErr
+nOverflow:
+stuffErr:
+	rjmp	overflow
+
+
+unstuff0:						;[8] this is the branch delay of breq unstuffX
+	andi	x1, USBMASK			;[9] do an se0 check here (if the last crc byte ends with 5 one's we might end up here
+	breq	didunstuff0			;[10] event tough the message is complete -> jump back and store the byte
+	ori		shift, 0x01			;[11] invert the last received bit to prevent furhter unstuffing
+	in		x2, USBIN			;[0] we have some free cycles so we could check for bit stuffing errors
+	andi	x5, 0xFE			;[1] mark this bit as inverted (will be corrected before storing shift)
+	eor		x1, x2				;[2] x1 and x2 have to be different because the stuff bit is always a zero
+	andi	x1, USBMASK			;[3] mask the interesting bits
+	breq	stuffErr			;[4] if the stuff bit is a 1-bit something went wrong
+	mov 	x1, x2				;[5] the next bit expects the last state to be in x1
+	rjmp 	didunstuff0			;[6]
+								;[7] jump delay of rjmp didunstuffX	
+
+unstuff1:						;[11] this is the jump delay of breq unstuffX
+	in		x1, USBIN			;[0] we have some free cycles so we could check for bit stuffing errors
+	ori		shift, 0x02			;[1] invert the last received bit to prevent furhter unstuffing
+	andi	x5, 0xFD			;[2] mark this bit as inverted (will be corrected before storing shift)
+	eor		x2, x1				;[3] x1 and x2 have to be different because the stuff bit is always a zero
+	andi	x2, USBMASK			;[4] mask the interesting bits
+	breq	stuffErr			;[5] if the stuff bit is a 1-bit something went wrong
+	mov 	x2, x1				;[6] the next bit expects the last state to be in x2
+	nop2						;[7]
+								;[8]
+	rjmp 	didunstuff1			;[9]
+								;[10] jump delay of rjmp didunstuffX		
+
+unstuff2:						;[9] this is the jump delay of breq unstuffX
+	ori		shift, 0x04			;[10] invert the last received bit to prevent furhter unstuffing
+	andi	x5, 0xFB			;[11] mark this bit as inverted (will be corrected before storing shift)
+	in		x2, USBIN			;[0] we have some free cycles so we could check for bit stuffing errors
+	eor		x1, x2				;[1] x1 and x2 have to be different because the stuff bit is always a zero
+	andi	x1, USBMASK			;[2] mask the interesting bits
+	breq	stuffErr			;[3] if the stuff bit is a 1-bit something went wrong
+	mov 	x1, x2				;[4] the next bit expects the last state to be in x1
+	nop2						;[5]
+								;[6]
+	rjmp 	didunstuff2			;[7]
+								;[8] jump delay of rjmp didunstuffX	
+
+unstuff3:						;[9] this is the jump delay of breq unstuffX
+	ori		shift, 0x08			;[10] invert the last received bit to prevent furhter unstuffing
+	andi	x5, 0xF7			;[11] mark this bit as inverted (will be corrected before storing shift)
+	in		x1, USBIN			;[0] we have some free cycles so we could check for bit stuffing errors
+	eor		x2, x1				;[1] x1 and x2 have to be different because the stuff bit is always a zero
+	andi	x2, USBMASK			;[2] mask the interesting bits
+	breq	stuffErr			;[3] if the stuff bit is a 1-bit something went wrong
+	mov 	x2, x1				;[4] the next bit expects the last state to be in x2
+	nop2						;[5]
+								;[6]
+	rjmp 	didunstuff3			;[7]
+								;[8] jump delay of rjmp didunstuffX			
+
+
+
+; the include has to be here due to branch distance restirctions
+#define __USE_CRC__
+#include "asmcommon.inc"
+
+	
+
+; USB spec says:
+; idle = J
+; J = (D+ = 0), (D- = 1)
+; K = (D+ = 1), (D- = 0)
+; Spec allows 7.5 bit times from EOP to SOP for replies
+; 7.5 bit times is 90 cycles. ...there is plenty of time
+
+
+sendNakAndReti:
+    ldi     x3, USBPID_NAK  ;[-18]
+    rjmp    sendX3AndReti   ;[-17]
+sendAckAndReti:
+    ldi     cnt, USBPID_ACK ;[-17]
+sendCntAndReti:
+    mov     x3, cnt         ;[-16]
+sendX3AndReti:
+    ldi     YL, 20          ;[-15] x3==r20 address is 20
+    ldi     YH, 0           ;[-14]
+    ldi     cnt, 2          ;[-13]
+;   rjmp    usbSendAndReti      fallthrough
+
+;usbSend:
+;pointer to data in 'Y'
+;number of bytes in 'cnt' -- including sync byte [range 2 ... 12]
+;uses: x1...x4, btcnt, shift, cnt, Y
+;Numbers in brackets are time since first bit of sync pattern is sent
+
+usbSendAndReti:             ; 12 cycles until SOP
+    in      x2, USBDDR      ;[-12]
+    ori     x2, USBMASK     ;[-11]
+    sbi     USBOUT, USBMINUS;[-10] prepare idle state; D+ and D- must have been 0 (no pullups)
+    in      x1, USBOUT      ;[-8] port mirror for tx loop
+    out     USBDDR, x2      ;[-6] <- acquire bus
+	ldi		x2, 0			;[-6] init x2 (bitstuff history) because sync starts with 0
+    ldi     x4, USBMASK     ;[-5] exor mask
+    ldi     shift, 0x80     ;[-4] sync byte is first byte sent
+txByteLoop:
+    ldi     bitcnt, 0x40    ;[-3]=[9]     binary 01000000
+txBitLoop:					; the loop sends the first 7 bits of the byte
+    sbrs    shift, 0        ;[-2]=[10] if we have to send a 1 don't change the line state
+    eor     x1, x4          ;[-1]=[11]
+    out     USBOUT, x1      ;[0]
+    ror     shift           ;[1]
+    ror     x2              ;[2] transfers the last sent bit to the stuffing history
+didStuffN:
+    nop	                    ;[3]
+    nop                     ;[4]
+    cpi     x2, 0xfc        ;[5] if we sent six consecutive ones
+    brcc    bitstuffN       ;[6]
+    lsr     bitcnt          ;[7]
+    brne    txBitLoop       ;[8] restart the loop while the 1 is still in the bitcount
+
+; transmit bit 7
+    sbrs    shift, 0        ;[9]
+    eor     x1, x4          ;[10]
+didStuff7:
+    ror     shift           ;[11]
+	out     USBOUT, x1      ;[0] transfer bit 7 to the pins
+    ror     x2              ;[1] move the bit into the stuffing history	
+    cpi     x2, 0xfc        ;[2]
+    brcc    bitstuff7       ;[3]
+    ld      shift, y+       ;[4] get next byte to transmit
+    dec     cnt             ;[5] decrement byte counter
+    brne    txByteLoop      ;[7] if we have more bytes start next one
+    						;[8] branch delay
+    						
+;make SE0:
+    cbr     x1, USBMASK     ;[8] 		prepare SE0 [spec says EOP may be 25 to 30 cycles]
+    lds     x2, usbNewDeviceAddr;[9]
+    lsl     x2              ;[11] 		we compare with left shifted address
+    out     USBOUT, x1      ;[0] 		<-- out SE0 -- from now 2 bits = 24 cycles until bus idle
+    subi    YL, 20 + 2      ;[1] 		Only assign address on data packets, not ACK/NAK in x3
+    sbci    YH, 0           ;[2]
+;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
+;set address only after data packet was sent, not after handshake
+    breq    skipAddrAssign  ;[3]
+    sts     usbDeviceAddr, x2		; if not skipped: SE0 is one cycle longer
+skipAddrAssign:
+;end of usbDeviceAddress transfer
+    ldi     x2, 1<<USB_INTR_PENDING_BIT;[5] int0 occurred during TX -- clear pending flag
+    USB_STORE_PENDING(x2)   ;[6]
+    ori     x1, USBIDLE     ;[7]
+    in      x2, USBDDR      ;[8]
+    cbr     x2, USBMASK     ;[9] set both pins to input
+    mov     x3, x1          ;[10]
+    cbr     x3, USBMASK     ;[11] configure no pullup on both pins
+    ldi     x4, 4           ;[12]
+se0Delay:
+    dec     x4              ;[13] [16] [19] [22]
+    brne    se0Delay        ;[14] [17] [20] [23]
+    out     USBOUT, x1      ;[24] <-- out J (idle) -- end of SE0 (EOP signal)
+    out     USBDDR, x2      ;[25] <-- release bus now
+    out     USBOUT, x3      ;[26] <-- ensure no pull-up resistors are active
+    rjmp    doReturn
+
+bitstuffN:
+    eor     x1, x4          ;[8] generate a zero
+    ldi     x2, 0           ;[9] reset the bit stuffing history
+    nop2                    ;[10]
+    out     USBOUT, x1      ;[0] <-- send the stuffing bit
+    rjmp    didStuffN       ;[1]
+
+bitstuff7:
+    eor     x1, x4          ;[5]
+    ldi     x2, 0           ;[6] reset bit stuffing history
+    clc						;[7] fill a zero into the shift register
+    rol     shift           ;[8] compensate for ror shift at branch destination
+    rjmp    didStuff7       ;[9]
+    						;[10] jump delay
+
+;--------------------------------------------------------------------------------------------------------------
+; receives data bytes and calculates the crc
+; second half of the data byte receiver loop
+; most parts of the crc algorithm are here
+;--------------------------------------------------------------------------------------------------------------
+
+nOverflow2:
+	rjmp overflow
+
+rxDataBit4:
+	in      x1, USBIN           ;[0] sample line state
+    andi	x1, USBMASK			;[1] check for se0
+    breq	nOverflow2			;[2]
+    eor		x2, x1              ;[3]
+    bst		x2, USBMINUS		;[4]
+    bld		shift, 4			;[5]
+    mov		x2, shift			;[6]
+    andi	x2, 0x9F			;[7]
+    breq	unstuff4			;[8]
+didunstuff4:
+	nop2						;[9][10]
+	nop							;[11]
+
+; bit5							
+	in		x2, USBIN			;[0] sample line state
+    ldi		ZH, hi8(usbCrcTableHigh);[1] use the table for the higher byte
+    eor		x1, x2				;[2]
+    bst		x1, USBMINUS		;[3]
+    bld 	shift, 5	 		;[4]
+    mov		x1, shift			;[5]
+    andi	x1, 0x3F			;[6]
+    breq	unstuff5			;[7]
+didunstuff5:
+	lpm		x4, Z				;[8] load the higher crc xor-byte and store it for later use
+								;[9] lpm needs 3 cycles
+								;[10]			
+	ldi		ZH, hi8(usbCrcTableLow);[11] load the lower crc xor byte adress
+
+; bit6	    					
+	in      x1, USBIN           ;[0] sample line state
+    eor		x2, x1              ;[1]
+    bst		x2, USBMINUS		;[2]
+    bld		shift, 6			;[3]
+    mov		x2, shift			;[4]
+    andi	x2, 0x7E			;[5]
+    breq	unstuff6			;[6]
+didunstuff6:
+	lpm		ZL, Z				;[7] load the lower xor crc byte
+								;[8] lpm needs 3 cycles
+	    						;[9]
+	eor		ZL, x3				;[10] xor the old high crc byte with the low xor-byte
+	mov		x3, x4				;[11] move the new high order crc value from temp to its destination
+			
+; bit7							
+	in		x2, USBIN			;[0] sample line state
+    eor		x1, x2				;[1]
+    bst		x1, USBMINUS		;[2]
+    bld 	shift, 7	 		;[3] now shift holds the complete but inverted data byte
+    mov		x1, shift			;[4]
+    andi	x1, 0xFC			;[5]
+    breq	unstuff7			;[6]
+didunstuff7:
+	eor		x5, shift			;[7] x5 marks all bits which have not been inverted by the unstuffing subs
+	mov		x4, x5				;[8] keep a copy of the data byte it will be stored during next bit0
+	eor		ZL, x4				;[9] feed the actual byte into the crc algorithm
+	rjmp	rxDataStart			;[10] next byte
+								;[11] during the reception of the next byte this one will be fed int the crc algorithm
+
+unstuff4:						;[9] this is the jump delay of rjmp unstuffX
+	ori		shift, 0x10			;[10] invert the last received bit to prevent furhter unstuffing
+	andi	x5, 0xEF			;[11] mark this bit as inverted (will be corrected before storing shift)
+	in		x2, USBIN			;[0] we have some free cycles so we could check for bit stuffing errors
+	eor		x1, x2				;[1] x1 and x2 have to be different because the stuff bit is always a zero
+	andi	x1, USBMASK			;[2] mask the interesting bits
+	breq	stuffErr2			;[3] if the stuff bit is a 1-bit something went wrong
+	mov 	x1, x2				;[4] the next bit expects the last state to be in x1
+	nop2						;[5]
+								;[6]
+	rjmp 	didunstuff4			;[7]
+								;[8] jump delay of rjmp didunstuffX	
+
+unstuff5:						;[8] this is the jump delay of rjmp unstuffX
+	nop							;[9]
+	ori		shift, 0x20			;[10] invert the last received bit to prevent furhter unstuffing
+	andi	x5, 0xDF			;[11] mark this bit as inverted (will be corrected before storing shift)
+	in		x1, USBIN			;[0] we have some free cycles so we could check for bit stuffing errors
+	eor		x2, x1				;[1] x1 and x2 have to be different because the stuff bit is always a zero
+	andi	x2, USBMASK			;[2] mask the interesting bits
+	breq	stuffErr2			;[3] if the stuff bit is a 1-bit something went wrong
+	mov 	x2, x1				;[4] the next bit expects the last state to be in x2
+	nop							;[5]
+	rjmp 	didunstuff5			;[6]
+								;[7] jump delay of rjmp didunstuffX													
+
+unstuff6:						;[7] this is the jump delay of rjmp unstuffX
+	nop2						;[8]
+								;[9]
+	ori		shift, 0x40			;[10] invert the last received bit to prevent furhter unstuffing
+	andi	x5, 0xBF			;[11] mark this bit as inverted (will be corrected before storing shift)
+	in		x2, USBIN			;[0] we have some free cycles so we could check for bit stuffing errors
+	eor		x1, x2				;[1] x1 and x2 have to be different because the stuff bit is always a zero
+	andi	x1, USBMASK			;[2] mask the interesting bits
+	breq	stuffErr2			;[3] if the stuff bit is a 1-bit something went wrong
+	mov 	x1, x2				;[4] the next bit expects the last state to be in x1
+	rjmp 	didunstuff6			;[5]
+								;[6] jump delay of rjmp didunstuffX	
+
+unstuff7:						;[7] this is the jump delay of rjmp unstuffX
+	nop							;[8]
+	nop							;[9]
+	ori		shift, 0x80			;[10] invert the last received bit to prevent furhter unstuffing
+	andi	x5, 0x7F			;[11] mark this bit as inverted (will be corrected before storing shift)
+	in		x1, USBIN			;[0] we have some free cycles so we could check for bit stuffing errors
+	eor		x2, x1				;[1] x1 and x2 have to be different because the stuff bit is always a zero
+	andi	x2, USBMASK			;[2] mask the interesting bits
+	breq	stuffErr2			;[3] if the stuff bit is a 1-bit something went wrong
+	mov 	x2, x1				;[4] the next bit expects the last state to be in x2
+	rjmp 	didunstuff7			;[5]
+								;[6] jump delay of rjmp didunstuff7
+
+; local copy of the stuffErr desitnation for the second half of the receiver loop
+stuffErr2:
+	rjmp	stuffErr
+
+;--------------------------------------------------------------------------------------------------------------
+; The crc table follows. It has to be aligned to enable a fast loading of the needed bytes.
+; There are two tables of 256 entries each, the low and the high byte table.
+; Table values were generated with the following C code:
+/*
+#include <stdio.h>
+int main (int argc, char **argv)
+{
+	int i, j;
+	for (i=0; i<512; i++){
+		unsigned short crc = i & 0xff;
+		for(j=0; j<8; j++) crc = (crc >> 1) ^ ((crc & 1) ? 0xa001 : 0);
+		if((i & 7) == 0) printf("\n.byte ");
+		printf("0x%02x, ", (i > 0xff ? (crc >> 8) : crc) & 0xff);
+		if(i == 255) printf("\n");
+	}
+	return 0;
+}
+
+// Use the following algorithm to compute CRC values:
+ushort computeCrc(uchar *msg, uchar msgLen)
+{
+    uchar i;
+	ushort crc = 0xffff;
+	for(i = 0; i < msgLen; i++)
+		crc = usbCrcTable16[lo8(crc) ^ msg[i]] ^ hi8(crc);
+    return crc;
+}
+*/
+
+.balign 256
+usbCrcTableLow:	
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
+.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
+
+; .balign 256
+usbCrcTableHigh:
+.byte 0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2
+.byte 0xC6, 0x06, 0x07, 0xC7, 0x05, 0xC5, 0xC4, 0x04
+.byte 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E
+.byte 0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09, 0x08, 0xC8
+.byte 0xD8, 0x18, 0x19, 0xD9, 0x1B, 0xDB, 0xDA, 0x1A
+.byte 0x1E, 0xDE, 0xDF, 0x1F, 0xDD, 0x1D, 0x1C, 0xDC
+.byte 0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6
+.byte 0xD2, 0x12, 0x13, 0xD3, 0x11, 0xD1, 0xD0, 0x10
+.byte 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32
+.byte 0x36, 0xF6, 0xF7, 0x37, 0xF5, 0x35, 0x34, 0xF4
+.byte 0x3C, 0xFC, 0xFD, 0x3D, 0xFF, 0x3F, 0x3E, 0xFE
+.byte 0xFA, 0x3A, 0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38
+.byte 0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A, 0xEA
+.byte 0xEE, 0x2E, 0x2F, 0xEF, 0x2D, 0xED, 0xEC, 0x2C
+.byte 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26
+.byte 0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0
+.byte 0xA0, 0x60, 0x61, 0xA1, 0x63, 0xA3, 0xA2, 0x62
+.byte 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4
+.byte 0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F, 0x6E, 0xAE
+.byte 0xAA, 0x6A, 0x6B, 0xAB, 0x69, 0xA9, 0xA8, 0x68
+.byte 0x78, 0xB8, 0xB9, 0x79, 0xBB, 0x7B, 0x7A, 0xBA
+.byte 0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C
+.byte 0xB4, 0x74, 0x75, 0xB5, 0x77, 0xB7, 0xB6, 0x76
+.byte 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0
+.byte 0x50, 0x90, 0x91, 0x51, 0x93, 0x53, 0x52, 0x92
+.byte 0x96, 0x56, 0x57, 0x97, 0x55, 0x95, 0x94, 0x54
+.byte 0x9C, 0x5C, 0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E
+.byte 0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58, 0x98
+.byte 0x88, 0x48, 0x49, 0x89, 0x4B, 0x8B, 0x8A, 0x4A
+.byte 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C
+.byte 0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86
+.byte 0x82, 0x42, 0x43, 0x83, 0x41, 0x81, 0x80, 0x40	
+
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm20.inc b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm20.inc
new file mode 100644
index 00000000..303abaf6
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbdrvasm20.inc
@@ -0,0 +1,360 @@
+/* Name: usbdrvasm20.inc
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Jeroen Benschop
+ * Based on usbdrvasm16.inc from Christian Starkjohann
+ * Creation Date: 2008-03-05
+ * Tabsize: 4
+ * Copyright: (c) 2008 by Jeroen Benschop and OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * Revision: $Id: usbdrvasm20.inc 740 2009-04-13 18:23:31Z cs $
+ */
+
+/* Do not link this file! Link usbdrvasm.S instead, which includes the
+ * appropriate implementation!
+ */
+
+/*
+General Description:
+This file is the 20 MHz version of the asssembler part of the USB driver. It
+requires a 20 MHz crystal (not a ceramic resonator and not a calibrated RC
+oscillator).
+
+See usbdrv.h for a description of the entire driver.
+
+Since almost all of this code is timing critical, don't change unless you
+really know what you are doing! Many parts require not only a maximum number
+of CPU cycles, but even an exact number of cycles!
+*/
+
+#define leap2   x3
+#ifdef __IAR_SYSTEMS_ASM__
+#define nextInst    $+2
+#else
+#define nextInst    .+0
+#endif
+
+;max stack usage: [ret(2), YL, SREG, YH, bitcnt, shift, x1, x2, x3, x4, cnt] = 12 bytes
+;nominal frequency: 20 MHz -> 13.333333 cycles per bit, 106.666667 cycles per byte
+; Numbers in brackets are clocks counted from center of last sync bit
+; when instruction starts
+;register use in receive loop:
+; shift assembles the byte currently being received
+; x1 holds the D+ and D- line state
+; x2 holds the previous line state
+; x4 (leap)  is used to add a leap cycle once every three bytes received
+; X3 (leap2) is used to add a leap cycle once every three stuff bits received
+; bitcnt is used to determine when a stuff bit is due
+; cnt holds the number of bytes left in the receive buffer
+
+USB_INTR_VECTOR:
+;order of registers pushed: YL, SREG YH, [sofError], bitcnt, shift, x1, x2, x3, x4, cnt
+    push    YL                  ;[-28] push only what is necessary to sync with edge ASAP
+    in      YL, SREG            ;[-26]
+    push    YL                  ;[-25]
+    push    YH                  ;[-23]
+;----------------------------------------------------------------------------
+; Synchronize with sync pattern:
+;----------------------------------------------------------------------------
+;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
+;sync up with J to K edge during sync pattern -- use fastest possible loops
+;The first part waits at most 1 bit long since we must be in sync pattern.
+;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
+;waitForJ, ensure that this prerequisite is met.
+waitForJ:
+    inc     YL
+    sbis    USBIN, USBMINUS
+    brne    waitForJ        ; just make sure we have ANY timeout
+waitForK:
+;The following code results in a sampling window of < 1/4 bit which meets the spec.
+    sbis    USBIN, USBMINUS     ;[-19]
+    rjmp    foundK              ;[-18]
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+    sbis    USBIN, USBMINUS
+    rjmp    foundK
+#if USB_COUNT_SOF
+    lds     YL, usbSofCount
+    inc     YL
+    sts     usbSofCount, YL
+#endif  /* USB_COUNT_SOF */
+#ifdef USB_SOF_HOOK
+    USB_SOF_HOOK
+#endif
+    rjmp    sofError
+foundK:                         ;[-16]
+;{3, 5} after falling D- edge, average delay: 4 cycles
+;bit0 should be at 34 for center sampling. Currently at 4 so 30 cylces till bit 0 sample
+;use 1 bit time for setup purposes, then sample again. Numbers in brackets
+;are cycles from center of first sync (double K) bit after the instruction
+    push    bitcnt              ;[-16]
+;   [---]                       ;[-15]
+    lds     YL, usbInputBufOffset;[-14]
+;   [---]                       ;[-13]
+    clr     YH                  ;[-12]
+    subi    YL, lo8(-(usbRxBuf));[-11] [rx loop init]
+    sbci    YH, hi8(-(usbRxBuf));[-10] [rx loop init]
+    push    shift               ;[-9]
+;   [---]                       ;[-8]
+    ldi     shift,0x40          ;[-7] set msb to "1" so processing bit7 can be detected
+    nop2                        ;[-6]
+;   [---]                       ;[-5]
+    ldi     bitcnt, 5           ;[-4] [rx loop init]
+    sbis    USBIN, USBMINUS     ;[-3] we want two bits K (sample 3 cycles too early)
+    rjmp    haveTwoBitsK        ;[-2]
+    pop     shift               ;[-1] undo the push from before
+    pop     bitcnt              ;[1] 
+    rjmp    waitForK            ;[3] this was not the end of sync, retry
+; The entire loop from waitForK until rjmp waitForK above must not exceed two
+; bit times (= 27 cycles).
+
+;----------------------------------------------------------------------------
+; push more registers and initialize values while we sample the first bits:
+;----------------------------------------------------------------------------
+haveTwoBitsK:
+    push    x1                  ;[0]
+    push    x2                  ;[2]
+    push    x3                  ;[4] (leap2)
+    ldi     leap2, 0x55         ;[6] add leap cycle on 2nd,5th,8th,... stuff bit
+    push    x4                  ;[7] == leap
+    ldi     leap, 0x55          ;[9] skip leap cycle on 2nd,5th,8th,... byte received
+    push    cnt                 ;[10]
+    ldi     cnt, USB_BUFSIZE    ;[12] [rx loop init]
+    ldi     x2, 1<<USBPLUS      ;[13] current line state is K state. D+=="1", D-=="0"
+bit0:       
+    in      x1, USBIN           ;[0] sample line state
+    andi    x1, USBMASK         ;[1] filter only D+ and D- bits
+    rjmp    handleBit           ;[2] make bit0 14 cycles long
+
+;----------------------------------------------------------------------------
+; Process bit7. However, bit 6 still may need unstuffing.
+;----------------------------------------------------------------------------
+
+b6checkUnstuff:
+    dec     bitcnt              ;[9]
+    breq    unstuff6            ;[10]
+bit7:
+    subi    cnt, 1              ;[11] cannot use dec becaus it does not affect the carry flag
+    brcs    overflow            ;[12] Too many bytes received. Ignore packet
+    in      x1, USBIN           ;[0] sample line state
+    andi    x1, USBMASK         ;[1] filter only D+ and D- bits
+    cpse    x1, x2              ;[2] when previous line state equals current line state, handle "1"
+    rjmp    b7handle0           ;[3] when line state differs, handle "0"
+    sec                         ;[4]
+    ror     shift               ;[5] shift "1" into the data
+    st      y+, shift           ;[6] store the data into the buffer
+    ldi     shift, 0x40         ;[7] reset data for receiving the next byte
+    subi    leap, 0x55          ;[9] trick to introduce a leap cycle every 3 bytes
+    brcc    nextInst            ;[10 or 11] it will fail after 85 bytes. However low speed can only receive 11
+    dec     bitcnt              ;[11 or 12]
+    brne    bit0                ;[12 or 13]
+    ldi     x1, 1               ;[13 or 14] unstuffing bit 7
+    in      bitcnt, USBIN       ;[0] sample stuff bit
+    rjmp    unstuff             ;[1]
+
+b7handle0:
+    mov     x2,x1               ;[5] Set x2 to current line state
+    ldi     bitcnt, 6           ;[6]
+    lsr     shift               ;[7] shift "0" into the data
+    st      y+, shift           ;[8] store data into the buffer
+    ldi     shift, 0x40         ;[10] reset data for receiving the next byte
+    subi    leap, 0x55          ;[11] trick to introduce a leap cycle every 3 bytes
+    brcs    bit0                ;[12] it will fail after 85 bytes. However low speed can only receive 11
+    rjmp    bit0                ;[13]
+
+
+;----------------------------------------------------------------------------
+; Handle unstuff
+; x1==0xFF indicate unstuffing bit6
+;----------------------------------------------------------------------------
+
+unstuff6:
+    ldi     x1,0xFF             ;[12] indicate unstuffing bit 6
+    in      bitcnt, USBIN       ;[0]  sample stuff bit
+    nop                         ;[1]  fix timing
+unstuff:                        ;b0-5  b6   b7
+    mov     x2,bitcnt           ;[3]  [2]  [3]  Set x2 to match line state
+    subi    leap2, 0x55         ;[4]  [3]  [4]  delay loop
+    brcs    nextInst            ;[5]  [4]  [5]  add one cycle every three stuff bits
+    sbci    leap2,0             ;[6]  [5]  [6]
+    ldi     bitcnt,6            ;[7]  [6]  [7]  reset bit stuff counter
+    andi    x2, USBMASK         ;[8]  [7]  [8] only keep D+ and D-
+    cpi     x1,0                ;[9]  [8]  [9]
+    brmi    bit7                ;[10] [9]  [10] finished unstuffing bit6 When x1<0
+    breq    bitloop             ;[11] ---  [11] finished unstuffing bit0-5 when x1=0
+    nop                         ;---  ---  [12]
+    in      x1, USBIN           ;---  ---  [0] sample line state for bit0
+    andi    x1, USBMASK         ;---  ---  [1] filter only D+ and D- bits
+    rjmp    handleBit           ;---  ---  [2] make bit0 14 cycles long
+
+;----------------------------------------------------------------------------
+; Receiver loop (numbers in brackets are cycles within byte after instr)
+;----------------------------------------------------------------------------
+bitloop:
+    in      x1, USBIN           ;[0] sample line state
+    andi    x1, USBMASK         ;[1] filter only D+ and D- bits
+    breq    se0                 ;[2] both lines are low so handle se0
+handleBit:
+    cpse    x1, x2              ;[3] when previous line state equals current line state, handle "1"
+    rjmp    handle0             ;[4] when line state differs, handle "0"
+    sec                         ;[5]
+    ror     shift               ;[6] shift "1" into the data
+    brcs    b6checkUnstuff      ;[7] When after shift C is set, next bit is bit7
+    nop2                        ;[8]
+    dec     bitcnt              ;[10]
+    brne    bitloop             ;[11]
+    ldi     x1,0                ;[12] indicate unstuff for bit other than bit6 or bit7
+    in      bitcnt, USBIN       ;[0] sample stuff bit
+    rjmp    unstuff             ;[1]
+
+handle0:
+    mov     x2, x1              ;[6] Set x2 to current line state
+    ldi     bitcnt, 6           ;[7] reset unstuff counter. 
+    lsr     shift               ;[8] shift "0" into the data
+    brcs    bit7                ;[9] When after shift C is set, next bit is bit7
+    nop                         ;[10]
+    rjmp    bitloop             ;[11] 
+    
+;----------------------------------------------------------------------------
+; End of receive loop. Now start handling EOP
+;----------------------------------------------------------------------------
+
+macro POP_STANDARD ; 14 cycles
+    pop     cnt
+    pop     x4
+    pop     x3
+    pop     x2
+    pop     x1
+    pop     shift
+    pop     bitcnt
+    endm
+macro POP_RETI     ; 7 cycles
+    pop     YH
+    pop     YL
+    out     SREG, YL
+    pop     YL
+    endm
+
+
+
+#include "asmcommon.inc"
+
+; USB spec says:
+; idle = J
+; J = (D+ = 0), (D- = 1)
+; K = (D+ = 1), (D- = 0)
+; Spec allows 7.5 bit times from EOP to SOP for replies
+; 7.5 bit times is 100 cycles. This implementation arrives a bit later at se0
+; then specified in the include file but there is plenty of time
+
+bitstuffN:
+    eor     x1, x4          ;[8]
+    ldi     x2, 0           ;[9]
+    nop2                    ;[10]
+    out     USBOUT, x1      ;[12] <-- out
+    rjmp    didStuffN       ;[0]
+    
+bitstuff7:
+    eor     x1, x4          ;[6]
+    ldi     x2, 0           ;[7] Carry is zero due to brcc
+    rol     shift           ;[8] compensate for ror shift at branch destination
+    nop2                    ;[9]
+    rjmp    didStuff7       ;[11]
+
+sendNakAndReti:
+    ldi     x3, USBPID_NAK  ;[-18]
+    rjmp    sendX3AndReti   ;[-17]
+sendAckAndReti:
+    ldi     cnt, USBPID_ACK ;[-17]
+sendCntAndReti:
+    mov     x3, cnt         ;[-16]
+sendX3AndReti:
+    ldi     YL, 20          ;[-15] x3==r20 address is 20
+    ldi     YH, 0           ;[-14]
+    ldi     cnt, 2          ;[-13]
+;   rjmp    usbSendAndReti      fallthrough
+
+;usbSend:
+;pointer to data in 'Y'
+;number of bytes in 'cnt' -- including sync byte [range 2 ... 12]
+;uses: x1...x4, btcnt, shift, cnt, Y
+;Numbers in brackets are time since first bit of sync pattern is sent
+;We don't match the transfer rate exactly (don't insert leap cycles every third
+;byte) because the spec demands only 1.5% precision anyway.
+usbSendAndReti:             ; 12 cycles until SOP
+    in      x2, USBDDR      ;[-12]
+    ori     x2, USBMASK     ;[-11]
+    sbi     USBOUT, USBMINUS;[-10] prepare idle state; D+ and D- must have been 0 (no pullups)
+    in      x1, USBOUT      ;[-8] port mirror for tx loop
+    out     USBDDR, x2      ;[-7] <- acquire bus
+; need not init x2 (bitstuff history) because sync starts with 0
+    ldi     x4, USBMASK     ;[-6] exor mask
+    ldi     shift, 0x80     ;[-5] sync byte is first byte sent
+txByteLoop:
+    ldi     bitcnt, 0x49    ;[-4]        [10] binary 01001001
+txBitLoop:
+    sbrs    shift, 0        ;[-3] [10]   [11]
+    eor     x1, x4          ;[-2] [11]   [12]
+    out     USBOUT, x1      ;[-1] [12]   [13]   <-- out N
+    ror     shift           ;[0]  [13]   [14]
+    ror     x2              ;[1]
+didStuffN:
+    nop2                    ;[2]
+    nop                     ;[4]
+    cpi     x2, 0xfc        ;[5]
+    brcc    bitstuffN       ;[6]
+    lsr     bitcnt          ;[7]
+    brcc    txBitLoop       ;[8]
+    brne    txBitLoop       ;[9]
+
+    sbrs    shift, 0        ;[10]
+    eor     x1, x4          ;[11]
+didStuff7:
+    out     USBOUT, x1      ;[-1] [13] <-- out 7
+    ror     shift           ;[0] [14]
+    ror     x2              ;[1]
+    nop                     ;[2]
+    cpi     x2, 0xfc        ;[3]
+    brcc    bitstuff7       ;[4]
+    ld      shift, y+       ;[5]
+    dec     cnt             ;[7]
+    brne    txByteLoop      ;[8]
+;make SE0:
+    cbr     x1, USBMASK     ;[9] prepare SE0 [spec says EOP may be 25 to 30 cycles]
+    lds     x2, usbNewDeviceAddr;[10]
+    lsl     x2              ;[12] we compare with left shifted address
+    out     USBOUT, x1      ;[13] <-- out SE0 -- from now 2 bits = 22 cycles until bus idle
+    subi    YL, 20 + 2      ;[0] Only assign address on data packets, not ACK/NAK in x3
+    sbci    YH, 0           ;[1]
+;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
+;set address only after data packet was sent, not after handshake
+    breq    skipAddrAssign  ;[2]
+    sts     usbDeviceAddr, x2; if not skipped: SE0 is one cycle longer
+skipAddrAssign:
+;end of usbDeviceAddress transfer
+    ldi     x2, 1<<USB_INTR_PENDING_BIT;[4] int0 occurred during TX -- clear pending flag
+    USB_STORE_PENDING(x2)   ;[5]
+    ori     x1, USBIDLE     ;[6]
+    in      x2, USBDDR      ;[7]
+    cbr     x2, USBMASK     ;[8] set both pins to input
+    mov     x3, x1          ;[9]
+    cbr     x3, USBMASK     ;[10] configure no pullup on both pins
+    ldi     x4, 5           ;[11]
+se0Delay:
+    dec     x4              ;[12] [15] [18] [21] [24]
+    brne    se0Delay        ;[13] [16] [19] [22] [25]
+    out     USBOUT, x1      ;[26] <-- out J (idle) -- end of SE0 (EOP signal)
+    out     USBDDR, x2      ;[27] <-- release bus now
+    out     USBOUT, x3      ;[28] <-- ensure no pull-up resistors are active
+    rjmp    doReturn
diff --git a/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbportability.h b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbportability.h
new file mode 100644
index 00000000..476184dc
--- /dev/null
+++ b/trunk/AVRProjects/usbasp.2011-05-28/firmware/usbdrv/usbportability.h
@@ -0,0 +1,144 @@
+/* Name: usbportability.h
+ * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
+ * Author: Christian Starkjohann
+ * Creation Date: 2008-06-17
+ * Tabsize: 4
+ * Copyright: (c) 2008 by OBJECTIVE DEVELOPMENT Software GmbH
+ * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
+ * This Revision: $Id: usbportability.h 785 2010-05-30 17:57:07Z cs $
+ */
+
+/*
+General Description:
+This header is intended to contain all (or at least most of) the compiler
+and library dependent stuff. The C code is written for avr-gcc and avr-libc.
+The API of other development environments is converted to gcc's and avr-libc's
+API by means of defines.
+
+This header also contains all system includes since they depend on the
+development environment.
+
+Thanks to Oleg Semyonov for his help with the IAR tools port!
+*/
+
+#ifndef __usbportability_h_INCLUDED__
+#define __usbportability_h_INCLUDED__
+
+/* We check explicitly for IAR and CodeVision. Default is avr-gcc/avr-libc. */
+
+/* ------------------------------------------------------------------------- */
+#if defined __IAR_SYSTEMS_ICC__ || defined __IAR_SYSTEMS_ASM__  /* check for IAR */
+/* ------------------------------------------------------------------------- */
+
+#ifndef ENABLE_BIT_DEFINITIONS
+#   define ENABLE_BIT_DEFINITIONS	1   /* Enable bit definitions */
+#endif
+
+/* Include IAR headers */
+#include <ioavr.h>
+#ifndef __IAR_SYSTEMS_ASM__
+#   include <inavr.h>
+#endif
+
+#define __attribute__(arg)  /* not supported on IAR */
+
+#ifdef __IAR_SYSTEMS_ASM__
+#   define __ASSEMBLER__    /* IAR does not define standard macro for asm */
+#endif
+
+#ifdef __HAS_ELPM__
+#   define PROGMEM __farflash
+#else
+#   define PROGMEM __flash
+#endif
+
+#define USB_READ_FLASH(addr)    (*(PROGMEM char *)(addr))
+
+/* The following definitions are not needed by the driver, but may be of some
+ * help if you port a gcc based project to IAR.
+ */
+#define cli()       __disable_interrupt()
+#define sei()       __enable_interrupt()
+#define wdt_reset() __watchdog_reset()
+#define _BV(x)      (1 << (x))
+
+/* assembler compatibility macros */
+#define nop2    rjmp    $+2 /* jump to next instruction */
+#define XL      r26
+#define XH      r27
+#define YL      r28
+#define YH      r29
+#define ZL      r30
+#define ZH      r31
+#define lo8(x)  LOW(x)
+#define hi8(x)  (((x)>>8) & 0xff)   /* not HIGH to allow XLINK to make a proper range check */
+
+/* Depending on the device you use, you may get problems with the way usbdrv.h
+ * handles the differences between devices. Since IAR does not use #defines
+ * for MCU registers, we can't check for the existence of a particular
+ * register with an #ifdef. If the autodetection mechanism fails, include
+ * definitions for the required USB_INTR_* macros in your usbconfig.h. See
+ * usbconfig-prototype.h and usbdrv.h for details.
+ */
+
+/* ------------------------------------------------------------------------- */
+#elif __CODEVISIONAVR__ /* check for CodeVision AVR */
+/* ------------------------------------------------------------------------- */
+/* This port is not working (yet) */
+
+/* #define F_CPU   _MCU_CLOCK_FREQUENCY_    seems to be defined automatically */
+
+#include <io.h>
+#include <delay.h>
+
+#define __attribute__(arg)  /* not supported on IAR */
+
+#define PROGMEM                 __flash
+#define USB_READ_FLASH(addr)    (*(PROGMEM char *)(addr))
+
+#ifndef __ASSEMBLER__
+static inline void  cli(void)
+{
+    #asm("cli");
+}
+static inline void  sei(void)
+{
+    #asm("sei");
+}
+#endif
+#define _delay_ms(t)    delay_ms(t)
+#define _BV(x)          (1 << (x))
+#define USB_CFG_USE_SWITCH_STATEMENT 1  /* macro for if() cascase fails for unknown reason */
+
+#define macro   .macro
+#define endm    .endmacro
+#define nop2    rjmp    .+0 /* jump to next instruction */
+
+/* ------------------------------------------------------------------------- */
+#else   /* default development environment is avr-gcc/avr-libc */
+/* ------------------------------------------------------------------------- */
+
+#include <avr/io.h>
+#ifdef __ASSEMBLER__
+#   define _VECTOR(N)   __vector_ ## N   /* io.h does not define this for asm */
+#else
+#   include <avr/pgmspace.h>
+#endif
+
+#if USB_CFG_DRIVER_FLASH_PAGE
+#   define USB_READ_FLASH(addr)    pgm_read_byte_far(((long)USB_CFG_DRIVER_FLASH_PAGE << 16) | (long)(addr))
+#else
+#   define USB_READ_FLASH(addr)    pgm_read_byte(addr)
+#endif
+
+#define macro   .macro
+#define endm    .endm
+#define nop2    rjmp    .+0 /* jump to next instruction */
+
+#endif  /* development environment */
+
+/* for conveniecne, ensure that PRG_RDB exists */
+#ifndef PRG_RDB
+#   define PRG_RDB(addr)    USB_READ_FLASH(addr)
+#endif
+#endif  /* __usbportability_h_INCLUDED__ */
diff --git a/trunk/AVRProjects/ym2149-streamer/Makefile b/trunk/AVRProjects/ym2149-streamer/Makefile
new file mode 100644
index 00000000..91d41600
--- /dev/null
+++ b/trunk/AVRProjects/ym2149-streamer/Makefile
@@ -0,0 +1,28 @@
+avrType=atmega328p
+avrFreq=16000000 # 16 Mhz
+programmerDev=/dev/ttyUSB0
+programmerType=arduino
+
+cflags=-DF_CPU=$(avrFreq) -mmcu=$(avrType) -Wall -Werror -Wextra -Os
+
+objects=$(patsubst %.c,%.o,$(wildcard *.c))
+
+
+.PHONY: clean flash
+
+all: main.hex
+
+%.o: %.c
+	avr-gcc $(cflags) -c $< -o $@
+
+main.elf: $(objects)
+	avr-gcc $(cflags) -o $@ $^
+
+main.hex: main.elf
+	avr-objcopy -j .text -j .data -O ihex $^ $@
+
+flash: main.hex
+	avrdude -p$(avrType) -c$(programmerType) -P$(programmerDev) -v -U flash:w:$<
+
+clean:
+	rm -f main.hex main.elf $(objects)
diff --git a/trunk/AVRProjects/ym2149-streamer/README.md b/trunk/AVRProjects/ym2149-streamer/README.md
new file mode 100644
index 00000000..5c58034b
--- /dev/null
+++ b/trunk/AVRProjects/ym2149-streamer/README.md
@@ -0,0 +1,40 @@
+Title: ym2149-streamer
+
+The ym2149-streamer allows sending Atari ST YM files to a YM2149 chip
+driven by an Arduino.
+
+Requirements
+------------
+
+The following libraries are required:
+
+* avr-gcc
+* avr-libc
+* avrdude
+
+How to do
+---------
+
+    $ make
+    $ make flash
+    $ python streamer.py <output_device> <ym_filepath>
+
+Where <output_device> would typically be `/dev/ttyUSB0`.
+
+More information
+----------------
+
+More information can be found on my blog:
+
+* [Streaming music to YM2149F][1]
+* [Driving YM2149F sound chip with an Arduino][2]
+* [Arduino Hello World without IDE][3]
+
+Besides, a video showing the [YM2149 & Arduino circuit playing a tune][4] is
+available.
+
+
+[1]: http://www.florentflament.com/blog/streaming-music-to-ym2149f.html
+[2]: http://www.florentflament.com/blog/driving-ym2149f-sound-chip-with-an-arduino.html
+[3]: http://www.florentflament.com/blog/arduino-hello-world-without-ide.html
+[4]: https://www.youtube.com/watch?v=MTRJdDbY048
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diff --git a/trunk/AVRProjects/ym2149-streamer/main.c b/trunk/AVRProjects/ym2149-streamer/main.c
new file mode 100644
index 00000000..1a2bd115
--- /dev/null
+++ b/trunk/AVRProjects/ym2149-streamer/main.c
@@ -0,0 +1,43 @@
+#include "uart.h"
+#include "ym2149.h"
+
+#define LED PORTB5  // Digital port 13 noted the board has an led on pin 13 already(should be yellow and be right below the pin)
+void set_led_out(void) {
+  DDRB |= 1 << LED;
+}
+
+void clear_registers(void) {
+  int i;
+  for (i=0; i<14; i++) {
+    send_data(i, 0);
+  }
+}
+
+int main() {
+  unsigned int i;
+  unsigned char data[16];
+
+  set_ym_clock();
+  set_bus_ctl();
+  initUART();
+  set_led_out();
+  clear_registers();
+
+  for/*ever*/(;;) {
+    for (i=0; i<16; i++) {
+      data[i] = getByte();
+    }
+    for (i=0; i<14; i++) {
+      send_data(i, data[i]);
+    }
+
+    // Have LED blink with noise (drums)
+    if (~data[7] & 0x38) {
+      PORTB |=   1 << LED;
+    } else {
+      PORTB &= ~(1 << LED);
+    }
+  }
+
+  return 0;
+}
diff --git a/trunk/AVRProjects/ym2149-streamer/streamer.py b/trunk/AVRProjects/ym2149-streamer/streamer.py
new file mode 100644
index 00000000..8312c01a
--- /dev/null
+++ b/trunk/AVRProjects/ym2149-streamer/streamer.py
@@ -0,0 +1,126 @@
+#!/usr/bin/env python
+
+import functools
+import itertools
+import struct
+import sys
+import time
+
+class YmReader(object):
+
+    def __parse_extra_infos(self):
+        # Thanks http://stackoverflow.com/questions/32774910/clean-way-to-read-a-null-terminated-c-style-string-from-a-file
+        toeof = iter(functools.partial(self.__fd.read, 1), '')
+        def readcstr():
+            return ''.join(itertools.takewhile('\0'.__ne__, toeof))
+        self.__header['song_name'] = readcstr()
+        self.__header['author_name'] = readcstr()
+        self.__header['song_comment'] = readcstr()
+
+    def __parse_header(self):
+        # See:
+        # http://leonard.oxg.free.fr/ymformat.html
+        # ftp://ftp.modland.com/pub/documents/format_documentation/Atari%20ST%20Sound%20Chip%20Emulator%20YM1-6%20(.ay,%20.ym).txt
+        ym_header = '> 4s 8s I I H I H I H'
+        s = self.__fd.read(struct.calcsize(ym_header))
+        d = {}
+        (d['id'],
+         d['check_string'],
+         d['nb_frames'],
+         d['song_attributes'],
+         d['nb_digidrums'],
+         d['chip_clock'],
+         d['frames_rate'],
+         d['loop_frame'],
+         d['extra_data'],
+        ) = struct.unpack(ym_header, s)
+        d['interleaved'] = d['song_attributes'] & 0x01 != 0
+        self.__header = d
+
+        if self.__header['nb_digidrums'] != 0:
+            raise Exception(
+                'Unsupported file format: Digidrums are not supported')
+        self.__parse_extra_infos()
+
+    def __read_data_interleaved(self):
+        cnt  = self.__header['nb_frames']
+        regs = [self.__fd.read(cnt) for i in xrange(16)]
+        self.__data=[''.join(f) for f in zip(*regs)]
+
+    def __read_data(self):
+        if not self.__header['interleaved']:
+            raise Exception(
+                'Unsupported file format: Only interleaved data are supported')
+        self.__read_data_interleaved()
+
+    def __check_eof(self):
+        if self.__fd.read(4) != 'End!':
+            print '*Warning* End! marker not found after frames'
+
+    def __init__(self, fd):
+        self.__fd = fd
+        self.__parse_header()
+        self.__data = []
+
+    def dump_header(self):
+        for k in ('id','check_string', 'nb_frames', 'song_attributes',
+                  'nb_digidrums', 'chip_clock', 'frames_rate', 'loop_frame',
+                  'extra_data', 'song_name', 'author_name', 'song_comment'):
+            print "{}: {}".format(k, self.__header[k])
+
+    def get_header(self):
+        return self.__header
+
+    def get_data(self):
+        if not self.__data:
+            self.__read_data()
+            self.__check_eof()
+        return self.__data
+
+
+def to_minsec(frames, frames_rate):
+    secs = frames / frames_rate
+    mins = secs / 60
+    secs = secs % 60
+    return (mins, secs)
+
+def main():
+    header = None
+    data = None
+
+    if len(sys.argv) != 3:
+        print "Syntax is: {} <output_device> <ym_filepath>".format(sys.argv[0])
+        exit(0)
+
+    with open(sys.argv[2]) as fd:
+        ym = YmReader(fd)
+        ym.dump_header()
+        header = ym.get_header()
+        data = ym.get_data()
+
+    song_min, song_sec = to_minsec(header['nb_frames'], header['frames_rate'])
+    print ""
+    with open(sys.argv[1], 'w') as fd:
+        time.sleep(2) # Wait for Arduino reset
+        frame_t = time.time()
+        for i in xrange(header['nb_frames']):
+            # Substract time spent in code
+            time.sleep(1./header['frames_rate'] - (time.time() - frame_t))
+            frame_t = time.time()
+            fd.write(data[i])
+            fd.flush()
+            i+= 1
+
+            # Additionnal processing
+            cur_min, cur_sec = to_minsec(i, header['frames_rate'])
+            sys.stdout.write(
+                "\x1b[2K\rPlaying {0:02}:{1:02} / {2:02}:{3:02}".format(
+                cur_min, cur_sec, song_min, song_sec))
+            sys.stdout.flush()
+
+        # Clear YM2149 registers
+        fd.write('\x00'*16)
+        fd.flush()
+
+if __name__ == '__main__':
+    main()
diff --git a/trunk/AVRProjects/ym2149-streamer/uart.c b/trunk/AVRProjects/ym2149-streamer/uart.c
new file mode 100644
index 00000000..26eac761
--- /dev/null
+++ b/trunk/AVRProjects/ym2149-streamer/uart.c
@@ -0,0 +1,111 @@
+/*
+ * uart.c
+ *
+ * Asynchronous UART example tested on ATMega328P (16 MHz)
+ *
+ * Toolchain: avr-gcc (4.3.3)
+ * Editor: Eclipse Kepler (4)
+ * Usage:
+ * 		Perform all settings in uart.h and enable by calling initUART(void)
+ * 		Compile:
+ * 				make all
+ *
+ * Functions:
+ * 		- First call initUART() to set up Baud rate and frame format
+ *		- initUART() calls macros TX_START() and RX_START() automatically
+ *		- To enable interrupts on reception, call RX_INTEN() macros
+ *		- Call functions getByte() and putByte(char) for character I/O
+ *		- Call functions writeString(char*) and readString() for string I/O
+ *
+ *  Created on: 21-Jan-2014
+ *      Author: Shrikant Giridhar
+ */
+
+#include "uart.h"
+
+// Debug Mode; comment out on Release
+//#define _DEBUG			0
+
+
+/*! \brief Configures baud rate (refer datasheet) */
+void initUART(void)
+{
+	// Not necessary; initialize anyway
+	DDRD |= _BV(PD1);
+	DDRD &= ~_BV(PD0);
+
+	// Set baud rate; lower byte and top nibble
+	UBRR0H = ((_UBRR) & 0xF00);
+	UBRR0L = (uint8_t) ((_UBRR) & 0xFF);
+
+	TX_START();
+	RX_START();
+
+	// Set frame format = 8-N-1
+	UCSR0C = (_DATA << UCSZ00);
+
+}
+
+/*! \brief Returns a byte from the serial buffer
+ * 	Use this function if the RX interrupt is not enabled.
+ * 	Returns 0 on empty buffer
+ */
+uint8_t getByte(void)
+{
+	// Check to see if something was received
+	while (!(UCSR0A & _BV(RXC0)));
+	return (uint8_t) UDR0;
+}
+
+
+/*! \brief Transmits a byte
+ * 	Use this function if the TX interrupt is not enabled.
+ * 	Blocks the serial port while TX completes
+ */
+void putByte(unsigned char data)
+{
+	// Stay here until data buffer is empty
+	while (!(UCSR0A & _BV(UDRE0)));
+	UDR0 = (unsigned char) data;
+
+}
+
+/*! \brief Writes an ASCII string to the TX buffer */
+void writeString(const char *str)
+{
+	while (*str != '\0')
+	{
+		putByte(*str);
+		++str;
+	}
+}
+
+const char* readString(void)
+{
+	static char rxstr[RX_BUFF];
+	static char* temp;
+	temp = rxstr;
+
+	while((*temp = getByte()) != '\n')
+	{
+		++temp;
+	}
+
+	return rxstr;
+}
+
+#if _DEBUG
+
+	int main(void)
+	{
+		initUART();
+		while(1)
+		{
+			writeString(readString());
+			putByte('\r');
+			putByte('\n');
+		}
+		return 0;
+	}
+
+#endif
diff --git a/trunk/AVRProjects/ym2149-streamer/uart.h b/trunk/AVRProjects/ym2149-streamer/uart.h
new file mode 100644
index 00000000..fef2ca92
--- /dev/null
+++ b/trunk/AVRProjects/ym2149-streamer/uart.h
@@ -0,0 +1,53 @@
+/*
+ * uart.h
+ *
+ * UART example for ATMega328P clocked at 16 MHz
+ *
+ * TODO :-
+ * 	- Implement string read function
+ * 	- Optimize for size
+ * 	- Add helper routines and compile to .a file
+ *
+ *  Created on: 22-Jan-2014
+ *      Author: Shrikant Giridhar
+ */
+
+#ifndef UART_H_
+#define UART_H_
+
+#include <avr/io.h>
+#include <stdint.h>
+
+/* Probably already defined somewhere else. Define here, if isn't. */
+#ifndef FOSC
+#define	FOSC			16000000UL
+#endif
+
+/* Settings */
+#define _BAUD			57600					// Baud rate (9600 is default)
+#define _DATA			0x03					// Number of data bits in frame = byte tranmission
+#define _UBRR			(FOSC/16)/_BAUD - 1		// Used for UBRRL and UBRRH
+
+#define RX_BUFF			10
+
+/* Useful macros */
+#define TX_START()		UCSR0B |= _BV(TXEN0)	// Enable TX
+#define TX_STOP()		UCSR0B &= ~_BV(TXEN0)	// Disable TX
+#define RX_START()		UCSR0B |= _BV(RXEN0)	// Enable RX
+#define RX_STOP()		UCSR0B &= ~_BV(RXEN0)	// Disable RX
+#define COMM_START()		TX_START(); RX_START()	// Enable communications
+
+/* Interrupt macros; Remember to set the GIE bit in SREG before using (see datasheet) */
+#define RX_INTEN()		UCSR0B |= _BV(RXCIE0)	// Enable interrupt on RX complete
+#define RX_INTDIS()		UCSR0B &= ~_BV(RXCIE0)	// Disable RX interrupt
+#define TX_INTEN()		UCSR0B |= _BV(TXCIE0)	// Enable interrupt on TX complete
+#define TX_INTDIS()		UCSR0B &= ~_BV(TXCIE0)	// Disable TX interrupt
+
+/* Prototypes */
+void initUART(void);
+uint8_t getByte(void);
+void putByte(unsigned char data);
+void writeString(const char *str);
+const char* readString(void);
+
+#endif /* UART_H_ */
diff --git a/trunk/AVRProjects/ym2149-streamer/ym2149.c b/trunk/AVRProjects/ym2149-streamer/ym2149.c
new file mode 100644
index 00000000..e129b83f
--- /dev/null
+++ b/trunk/AVRProjects/ym2149-streamer/ym2149.c
@@ -0,0 +1,79 @@
+#include "ym2149.h"
+
+// MSB (PB3) is connected to BDIR
+// LSB (PB2) is connected to BC1
+// +5V is connected to BC2
+#define DATA_READ (0x01 << 2)
+#define DATA_WRITE (0x02 << 2)
+#define ADDRESS_MODE (0x03 << 2)
+
+// Sets a 4MHz clock OC2A (PORTB3)
+void set_ym_clock(void) {
+  DDRB |= 0x01 << PORTB3;
+  // Toggle OC2A on compare match
+  TCCR2A &= ~(0x01 << COM2A1);
+  TCCR2A |=   0x01 << COM2A0;
+  // Clear Timer on Compare match
+  TCCR2B &= ~(0x01 << WGM22);
+  TCCR2A |=   0x01 << WGM21;
+  TCCR2A &= ~(0x01 << WGM20);
+  // Use CLK I/O without prescaling
+  TCCR2B &= ~(0x01 << CS22);
+  TCCR2B &= ~(0x01 << CS21);
+  TCCR2B |=   0x01 << CS20;
+  // Divide the 16MHz clock by 8 -> 2MHz
+  OCR2A = 3;
+}
+
+void set_bus_ctl(void) {
+  DDRC |= 0x0c; // Bits 2 and 3
+}
+void set_data_out(void) {
+  DDRC |= 0x03; // Bits 0 and 1
+  DDRD |= 0xfc; // Bits 2 to 7
+}
+void set_data_in(void) {
+  DDRC &= ~0x03; // Bits 0 and 1
+  DDRD &= ~0xfc; // Bits 2 to 7
+}
+
+void set_address(char addr) {
+  set_data_out();
+  PORTC = (PORTC & 0xf3) | ADDRESS_MODE;
+  PORTC = (PORTC & 0xfc) | (addr & 0x03); // 2 first bits ont PORTC
+  PORTD = (PORTD & 0x02) | (addr & 0xfc); // 6 last bits on PORTD
+  _delay_us(1.); //tAS = 300ns
+  PORTC = (PORTC & 0xf3) /*INACTIVE*/ ;
+  _delay_us(1.); //tAH = 80ns
+}
+
+void set_data(char data) {
+  set_data_out();
+  PORTC = (PORTC & 0xfc) | (data & 0x03); // 2 first bits ont PORTC
+  PORTD = (PORTD & 0x02) | (data & 0xfc); // 6 last bits on PORTD
+  PORTC = (PORTC & 0xf3) | DATA_WRITE;
+  _delay_us(1.); // 300ns < tDW < 10us
+  PORTC = (PORTC & 0xf3) /*INACTIVE*/ ; // To fit tDW max
+  _delay_us(1.); // tDH = 80ns
+}
+
+char get_data(void) {
+  char data;
+  set_data_in();
+  PORTC = (PORTC & 0xf3) | DATA_READ;
+  _delay_us(1.); // tDA = 400ns
+  data = (PIND & 0xfc) | (PINB & 0x03);
+  PORTC = (PORTC & 0xf3) /*INACTIVE*/ ;
+  _delay_us(1.); // tTS = 100ns
+  return data;
+}
+
+void send_data(char addr, char data) {
+  set_address(addr);
+  set_data(data);
+}
+
+char read_data(char addr) {
+  set_address(addr);
+  return get_data();
+}
diff --git a/trunk/AVRProjects/ym2149-streamer/ym2149.h b/trunk/AVRProjects/ym2149-streamer/ym2149.h
new file mode 100644
index 00000000..51b99acc
--- /dev/null
+++ b/trunk/AVRProjects/ym2149-streamer/ym2149.h
@@ -0,0 +1,8 @@
+#include <util/delay.h>
+#include <avr/io.h>
+
+void set_ym_clock(void);
+void set_bus_ctl(void);
+
+void send_data(char addr, char data);
+char read_data(char addr);
diff --git a/trunk/AVRProjects/ym2149-test/Makefile b/trunk/AVRProjects/ym2149-test/Makefile
new file mode 100644
index 00000000..3b72a545
--- /dev/null
+++ b/trunk/AVRProjects/ym2149-test/Makefile
@@ -0,0 +1,29 @@
+baud=115200
+avrType=atmega328p
+avrFreq=16000000 # 16 Mhz
+programmerDev=/dev/ttyUSB0
+programmerType=arduino
+
+cflags=-DF_CPU=$(avrFreq) -mmcu=$(avrType) -Wall -Werror -Wextra -Os
+
+objects=$(patsubst %.c,%.o,$(wildcard *.c))
+
+
+.PHONY: clean flash
+
+all: main.hex
+
+%.o: %.c
+	avr-gcc $(cflags) -c $< -o $@
+
+main.elf: $(objects)
+	avr-gcc $(cflags) -o $@ $^
+
+main.hex: main.elf
+	avr-objcopy -j .text -j .data -O ihex $^ $@
+
+flash: main.hex
+	avrdude -p$(avrType) -c$(programmerType) -P$(programmerDev) -b$(baud) -v -U flash:w:$<
+
+clean:
+	rm -f main.hex main.elf $(objects)
diff --git a/trunk/AVRProjects/ym2149-test/README.md b/trunk/AVRProjects/ym2149-test/README.md
new file mode 100644
index 00000000..97d53674
--- /dev/null
+++ b/trunk/AVRProjects/ym2149-test/README.md
@@ -0,0 +1,34 @@
+Title: ym2149-test
+
+The ym2149-test is a little firmware to check that the [YM2149 &
+Arduino circuit][2] is working properly.
+
+Requirements
+------------
+
+The following libraries are required:
+
+* avr-gcc
+* avr-libc
+* avrdude
+
+How to test the circuit
+-----------------------
+
+    $ make
+    $ make flash
+
+More information
+----------------
+
+More information can be found on my blog:
+
+* [Driving YM2149F sound chip with an Arduino][2]
+* [Arduino Hello World without IDE][3]
+
+Besides, a video showing the [YM2149 & Arduino circuit playing a tune][1] is
+available.
+
+[1]: https://www.youtube.com/watch?v=MTRJdDbY048
+[2]: http://www.florentflament.com/blog/driving-ym2149f-sound-chip-with-an-arduino.html
+[3]: http://www.florentflament.com/blog/arduino-hello-world-without-ide.html
diff --git a/trunk/AVRProjects/ym2149-test/main.c b/trunk/AVRProjects/ym2149-test/main.c
new file mode 100644
index 00000000..b89d0be4
--- /dev/null
+++ b/trunk/AVRProjects/ym2149-test/main.c
@@ -0,0 +1,43 @@
+#include <util/delay.h>
+#include "ym2149.h"
+
+// Notes
+// Np = 2e6 / (16 * Fn)
+#define C (2000000 / (16*130.81))
+#define D (2000000 / (16*146.83))
+#define E (2000000 / (16*164.81))
+#define F (2000000 / (16*174.61))
+#define G (2000000 / (16*196.00))
+#define A (2000000 / (16*220.00))
+#define B (2000000 / (16*246.94))
+
+int main() {
+  unsigned int i;
+  unsigned int data[7] = {C, D, E, F, G, A, B};
+
+  set_ym_clock();
+  set_bus_ctl();
+
+  // reset registers
+  for (i=0; i<16; i++) {
+    send_data(i, 0);
+  }
+  send_data(7, 0xf8); // Only output clear sound
+  send_data(8, 0x0f);
+  send_data(9, 0x0f);
+  send_data(10, 0x0f);
+
+  for/*ever*/(;;) {
+    for (i=0; i<7; i++) {
+      send_data(0, data[i] & 0xff);
+      send_data(1, data[i] >> 8);
+      send_data(2, data[i] >> 1 & 0xff);
+      send_data(3, data[i] >> 9);
+      send_data(4, data[i] >> 2 & 0xff);
+      send_data(5, data[i] >> 10);
+      _delay_ms(200.);
+    }
+  }
+
+  return 0;
+}
diff --git a/trunk/AVRProjects/ym2149-test/ym2149.c b/trunk/AVRProjects/ym2149-test/ym2149.c
new file mode 100644
index 00000000..30f9001a
--- /dev/null
+++ b/trunk/AVRProjects/ym2149-test/ym2149.c
@@ -0,0 +1,79 @@
+#include "ym2149.h"
+
+// MSB (PB3) is connected to BDIR
+// LSB (PB2) is connected to BC1
+// +5V is connected to BC2
+#define DATA_READ (0x01 << 2)
+#define DATA_WRITE (0x02 << 2)
+#define ADDRESS_MODE (0x03 << 2)
+
+// Sets a 4MHz clock OC2A (PORTB3)
+void set_ym_clock(void) {
+  DDRB |= 0x01 << PORTB3;
+  // Toggle OC2A on compare match
+  TCCR2A &= ~(0x01 << COM2A1);
+  TCCR2A |=   0x01 << COM2A0;
+  // Clear Timer on Compare match
+  TCCR2B &= ~(0x01 << WGM22);
+  TCCR2A |=   0x01 << WGM21;
+  TCCR2A &= ~(0x01 << WGM20);
+  // Use CLK I/O without prescaling
+  TCCR2B &= ~(0x01 << WGM22);
+  TCCR2B &= ~(0x01 << WGM21);
+  TCCR2B |=   0x01 << WGM20;
+  // Divide the 16MHz clock by 8 -> 2MHz
+  OCR2A = 3;
+}
+
+void set_bus_ctl(void) {
+  DDRC |= 0x0c; // Bits 2 and 3
+}
+void set_data_out(void) {
+  DDRC |= 0x03; // Bits 0 and 1
+  DDRD |= 0xfc; // Bits 2 to 7
+}
+void set_data_in(void) {
+  DDRC &= ~0x03; // Bits 0 and 1
+  DDRD &= ~0xfc; // Bits 2 to 7
+}
+
+void set_address(char addr) {
+  set_data_out();
+  PORTC = (PORTC & 0xf3) | ADDRESS_MODE;
+  PORTC = (PORTC & 0xfc) | (addr & 0x03); // 2 first bits ont PORTC
+  PORTD = (PORTD & 0x02) | (addr & 0xfc); // 6 last bits on PORTD
+  _delay_us(1.); //tAS = 300ns
+  PORTC = (PORTC & 0xf3) /*INACTIVE*/ ;
+  _delay_us(1.); //tAH = 80ns
+}
+
+void set_data(char data) {
+  set_data_out();
+  PORTC = (PORTC & 0xfc) | (data & 0x03); // 2 first bits ont PORTC
+  PORTD = (PORTD & 0x02) | (data & 0xfc); // 6 last bits on PORTD
+  PORTC = (PORTC & 0xf3) | DATA_WRITE;
+  _delay_us(1.); // 300ns < tDW < 10us
+  PORTC = (PORTC & 0xf3) /*INACTIVE*/ ; // To fit tDW max
+  _delay_us(1.); // tDH = 80ns
+}
+
+char get_data(void) {
+  char data;
+  set_data_in();
+  PORTC = (PORTC & 0xf3) | DATA_READ;
+  _delay_us(1.); // tDA = 400ns
+  data = (PIND & 0xfc) | (PINB & 0x03);
+  PORTC = (PORTC & 0xf3) /*INACTIVE*/ ;
+  _delay_us(1.); // tTS = 100ns
+  return data;
+}
+
+void send_data(char addr, char data) {
+  set_address(addr);
+  set_data(data);
+}
+
+char read_data(char addr) {
+  set_address(addr);
+  return get_data();
+}
diff --git a/trunk/AVRProjects/ym2149-test/ym2149.h b/trunk/AVRProjects/ym2149-test/ym2149.h
new file mode 100644
index 00000000..51b99acc
--- /dev/null
+++ b/trunk/AVRProjects/ym2149-test/ym2149.h
@@ -0,0 +1,8 @@
+#include <util/delay.h>
+#include <avr/io.h>
+
+void set_ym_clock(void);
+void set_bus_ctl(void);
+
+void send_data(char addr, char data);
+char read_data(char addr);